These ports ship on new boards revisions and are supported by newer firmware versions.
Unified · Split
| @@ -4004,6 +4004,11 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) · 4003 unmodified lines | ||
| 4004 | 4004 | case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G: |
| 4005 | 4005 | case NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G: |
| 4006 | 4006 | case NVM_CFG1_GLOB_NETWORK_PORT_MODE_4X25G: |
| 4007 | + case NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_2X50G_R1: | |
| 4008 | + case NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_4X50G_R1: | |
| 4009 | + case NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_1X100G_R2: | |
| 4010 | + case NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_2X100G_R2: | |
| 4011 | + case NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_1X100G_R4: | |
| 4007 | 4012 | break; |
| 4008 | 4013 | default: |
| 4009 | 4014 | DP_NOTICE(p_hwfn, "Unknown port mode in 0x%08x\n", core_cfg); |
| @@ -13015,6 +13015,11 @@ struct nvm_cfg1_glob { · 13014 unmodified lines | ||
| 13015 | 13015 | #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G 0xd |
| 13016 | 13016 | #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_4X25G 0xe |
| 13017 | 13017 | #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G 0xf |
| 13018 | +#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_2X50G_R1 0x11 | |
| 13019 | +#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_4X50G_R1 0x12 | |
| 13020 | +#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_1X100G_R2 0x13 | |
| 13021 | +#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_2X100G_R2 0x14 | |
| 13022 | +#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_AHP_1X100G_R4 0x15 | |
| 13018 | 13023 | |
| 13019 | 13024 | u32 e_lane_cfg1; |
| 13020 | 13025 | u32 e_lane_cfg2; |