Make sure that if we ever get a MIB counter overflow interrupt (normally masked off), that the IRQ is cleared.
Unified · Split
| @@ -2345,6 +2345,12 @@ static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) · 2344 unmodified lines | ||
| 2345 | 2345 | printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n", |
| 2346 | 2346 | dev->name, status); |
| 2347 | 2347 | |
| 2348 | + if (status & GM_IS_RX_CO_OV) | |
| 2349 | + gma_read16(hw, port, GM_RX_IRQ_SRC); | |
| 2350 | + | |
| 2351 | + if (status & GM_IS_TX_CO_OV) | |
| 2352 | + gma_read16(hw, port, GM_TX_IRQ_SRC); | |
| 2353 | + | |
| 2348 | 2354 | if (status & GM_IS_RX_FF_OR) { |
| 2349 | 2355 | ++sky2->net_stats.rx_fifo_errors; |
| 2350 | 2356 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_CLI_RX_FO); |