The number of GPA bits supported for a RISC-V Guest/VM is based on the MMU mode used by the G-stage translation. The KVM RISC-V will detect and use the best possible MMU mode for the G-stage in kvm_arch_init(). We add a generic VM capability KVM_CAP_VM_GPA_BITS which can be used by the KVM userspace to get the number of GPA (guest physical address) bits supported for a Guest/VM.
Unified · Split
| @@ -218,6 +218,7 @@ void kvm_riscv_stage2_free_pgd(struct kvm *kvm); · 217 unmodified lines | ||
| 218 | 218 | void kvm_riscv_stage2_update_hgatp(struct kvm_vcpu *vcpu); |
| 219 | 219 | void kvm_riscv_stage2_mode_detect(void); |
| 220 | 220 | unsigned long kvm_riscv_stage2_mode(void); |
| 221 | +int kvm_riscv_stage2_gpa_bits(void); | |
| 221 | 222 | |
| 222 | 223 | void kvm_riscv_stage2_vmid_detect(void); |
| 223 | 224 | unsigned long kvm_riscv_stage2_vmid_bits(void); |
| @@ -769,3 +769,8 @@ unsigned long kvm_riscv_stage2_mode(void) · 768 unmodified lines | ||
| 769 | 769 | { |
| 770 | 770 | return stage2_mode >> HGATP_MODE_SHIFT; |
| 771 | 771 | } |
| 772 | + | |
| 773 | +int kvm_riscv_stage2_gpa_bits(void) | |
| 774 | +{ | |
| 775 | + return stage2_gpa_bits; | |
| 776 | +} | |
| @@ -74,6 +74,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 73 unmodified lines | ||
| 74 | 74 | case KVM_CAP_NR_MEMSLOTS: |
| 75 | 75 | r = KVM_USER_MEM_SLOTS; |
| 76 | 76 | break; |
| 77 | + case KVM_CAP_VM_GPA_BITS: | |
| 78 | + r = kvm_riscv_stage2_gpa_bits(); | |
| 79 | + break; | |
| 77 | 80 | default: |
| 78 | 81 | r = 0; |
| 79 | 82 | break; |
| @@ -1131,6 +1131,7 @@ struct kvm_ppc_resize_hpt { · 1130 unmodified lines | ||
| 1131 | 1131 | #define KVM_CAP_EXIT_ON_EMULATION_FAILURE 204 |
| 1132 | 1132 | #define KVM_CAP_ARM_MTE 205 |
| 1133 | 1133 | #define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206 |
| 1134 | +#define KVM_CAP_VM_GPA_BITS 207 | |
| 1134 | 1135 | |
| 1135 | 1136 | #ifdef KVM_CAP_IRQ_ROUTING |
| 1136 | 1137 | |