Add and use #defines for L1 Substate register fields instead of hard-coding the masks. Also update comments to use names from the spec. No functional change intended.
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| @@ -1002,12 +1002,18 @@ · 1001 unmodified lines | ||
| 1002 | 1002 | #define PCI_L1SS_CAP_ASPM_L1_2 0x00000004 /* ASPM L1.2 Supported */ |
| 1003 | 1003 | #define PCI_L1SS_CAP_ASPM_L1_1 0x00000008 /* ASPM L1.1 Supported */ |
| 1004 | 1004 | #define PCI_L1SS_CAP_L1_PM_SS 0x00000010 /* L1 PM Substates Supported */ |
| 1005 | +#define PCI_L1SS_CAP_CM_RESTORE_TIME 0x0000ff00 /* Port Common_Mode_Restore_Time */ | |
| 1006 | +#define PCI_L1SS_CAP_P_PWR_ON_SCALE 0x00030000 /* Port T_POWER_ON scale */ | |
| 1007 | +#define PCI_L1SS_CAP_P_PWR_ON_VALUE 0x00f80000 /* Port T_POWER_ON value */ | |
| 1005 | 1008 | #define PCI_L1SS_CTL1 0x08 /* Control 1 Register */ |
| 1006 | 1009 | #define PCI_L1SS_CTL1_PCIPM_L1_2 0x00000001 /* PCI-PM L1.2 Enable */ |
| 1007 | 1010 | #define PCI_L1SS_CTL1_PCIPM_L1_1 0x00000002 /* PCI-PM L1.1 Enable */ |
| 1008 | 1011 | #define PCI_L1SS_CTL1_ASPM_L1_2 0x00000004 /* ASPM L1.2 Enable */ |
| 1009 | 1012 | #define PCI_L1SS_CTL1_ASPM_L1_1 0x00000008 /* ASPM L1.1 Enable */ |
| 1010 | 1013 | #define PCI_L1SS_CTL1_L1SS_MASK 0x0000000f |
| 1014 | +#define PCI_L1SS_CTL1_CM_RESTORE_TIME 0x0000ff00 /* Common_Mode_Restore_Time */ | |
| 1015 | +#define PCI_L1SS_CTL1_LTR_L12_TH_VALUE 0x03ff0000 /* LTR_L1.2_THRESHOLD_Value */ | |
| 1016 | +#define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000 /* LTR_L1.2_THRESHOLD_Scale */ | |
| 1011 | 1017 | #define PCI_L1SS_CTL2 0x0c /* Control 2 Register */ |
| 1012 | 1018 | |
| 1013 | 1019 | #endif /* LINUX_PCI_REGS_H */ |