ARM: Marvell MMP SoC patches for v5.5 This tag includes initial support for the Marvell MMP3 processor. MMP3 is used in OLPC XO-4 laptops, Panasonic Toughpad FZ-A1 tablet and Dell Wyse 3020/Tx0D thin clients. * tag 'mmp-soc-for-v5.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/lkundrak/linux-mmp: MAINTAINERS: mmp: add Git repository ARM: mmp: remove MMP3 USB PHY registers from regs-usb.h ARM: mmp: move cputype.h to include/linux/soc/ ARM: mmp: add SMP support ARM: mmp: add support for MMP3 SoC ARM: mmp: define MMP_CHIPID by the means of CIU_REG() ARM: mmp: DT: convert timer driver to use TIMER_OF_DECLARE ARM: mmp: map the PGU as well ARM: mmp: don't select CACHE_TAUROS2 on all ARCH_MMP ARM: l2c: add definition for FWA in PL310 aux register
Showing the changes to include/linux (1 of 24 files). Show all
Unified · Split
| @@ -0,0 +1,85 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | #ifndef __ASM_MACH_CPUTYPE_H | ||
| 3 | #define __ASM_MACH_CPUTYPE_H | ||
| 4 | |||
| 5 | #include <asm/cputype.h> | ||
| 6 | |||
| 7 | /* | ||
| 8 | * CPU Stepping CPU_ID CHIP_ID | ||
| 9 | * | ||
| 10 | * PXA168 S0 0x56158400 0x0000C910 | ||
| 11 | * PXA168 A0 0x56158400 0x00A0A168 | ||
| 12 | * PXA910 Y1 0x56158400 0x00F2C920 | ||
| 13 | * PXA910 A0 0x56158400 0x00F2C910 | ||
| 14 | * PXA910 A1 0x56158400 0x00A0C910 | ||
| 15 | * PXA920 Y0 0x56158400 0x00F2C920 | ||
| 16 | * PXA920 A0 0x56158400 0x00A0C920 | ||
| 17 | * PXA920 A1 0x56158400 0x00A1C920 | ||
| 18 | * MMP2 Z0 0x560f5811 0x00F00410 | ||
| 19 | * MMP2 Z1 0x560f5811 0x00E00410 | ||
| 20 | * MMP2 A0 0x560f5811 0x00A0A610 | ||
| 21 | * MMP3 A0 0x562f5842 0x00A02128 | ||
| 22 | * MMP3 B0 0x562f5842 0x00B02128 | ||
| 23 | */ | ||
| 24 | |||
| 25 | extern unsigned int mmp_chip_id; | ||
| 26 | |||
| 27 | #ifdef CONFIG_CPU_PXA168 | ||
| 28 | static inline int cpu_is_pxa168(void) | ||
| 29 | { | ||
| 30 | return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && | ||
| 31 | ((mmp_chip_id & 0xfff) == 0x168); | ||
| 32 | } | ||
| 33 | #else | ||
| 34 | #define cpu_is_pxa168() (0) | ||
| 35 | #endif | ||
| 36 | |||
| 37 | /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */ | ||
| 38 | #ifdef CONFIG_CPU_PXA910 | ||
| 39 | static inline int cpu_is_pxa910(void) | ||
| 40 | { | ||
| 41 | return (((read_cpuid_id() >> 8) & 0xff) == 0x84) && | ||
| 42 | (((mmp_chip_id & 0xfff) == 0x910) || | ||
| 43 | ((mmp_chip_id & 0xfff) == 0x920)); | ||
| 44 | } | ||
| 45 | #else | ||
| 46 | #define cpu_is_pxa910() (0) | ||
| 47 | #endif | ||
| 48 | |||
| 49 | #if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT) | ||
| 50 | static inline int cpu_is_mmp2(void) | ||
| 51 | { | ||
| 52 | return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && | ||
| 53 | (((mmp_chip_id & 0xfff) == 0x410) || | ||
| 54 | ((mmp_chip_id & 0xfff) == 0x610)); | ||
| 55 | } | ||
| 56 | #else | ||
| 57 | #define cpu_is_mmp2() (0) | ||
| 58 | #endif | ||
| 59 | |||
| 60 | #ifdef CONFIG_MACH_MMP3_DT | ||
| 61 | static inline int cpu_is_mmp3(void) | ||
| 62 | { | ||
| 63 | return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && | ||
| 64 | ((mmp_chip_id & 0xffff) == 0x2128); | ||
| 65 | } | ||
| 66 | |||
| 67 | static inline int cpu_is_mmp3_a0(void) | ||
| 68 | { | ||
| 69 | return (cpu_is_mmp3() && | ||
| 70 | ((mmp_chip_id & 0x00ff0000) == 0x00a00000)); | ||
| 71 | } | ||
| 72 | |||
| 73 | static inline int cpu_is_mmp3_b0(void) | ||
| 74 | { | ||
| 75 | return (cpu_is_mmp3() && | ||
| 76 | ((mmp_chip_id & 0x00ff0000) == 0x00b00000)); | ||
| 77 | } | ||
| 78 | |||
| 79 | #else | ||
| 80 | #define cpu_is_mmp3() (0) | ||
| 81 | #define cpu_is_mmp3_a0() (0) | ||
| 82 | #define cpu_is_mmp3_b0() (0) | ||
| 83 | #endif | ||
| 84 | |||
| 85 | #endif /* __ASM_MACH_CPUTYPE_H */ | ||