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Merge tag 'drm-intel-fixes-2021-12-02' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

- Fixing a regression where the backlight brightness control stopped working. - Fix the Intel HDR backlight support detection. - Reverting a w/a to fix a gpu Hang in TGL. The w/a itself was also for a hang, but in a much rarer scenario. The proper solution need to be done with help from user space and it will be addressed later. Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 4 years ago

Commit a687efe2 parents 1152b16 72641d85 files · +42 −13Browse files

Unified · Split

5 files
  1. drivers/gpu/drm/i915/display/intel_display_types.h +3 −0
  2. drivers/gpu/drm/i915/display/intel_dp.c +11 −0
  3. drivers/gpu/drm/i915/display/intel_dp.h +2 −0
  4. drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c +26 −6
  5. drivers/gpu/drm/i915/gt/intel_workarounds.c +0 −7
drivers/gpu/drm/i915/display/intel_display_types.h+3−0
@@ -1640,6 +1640,9 @@ struct intel_dp { · 1639 unmodified lines
1640 struct intel_dp_pcon_frl frl;1640 struct intel_dp_pcon_frl frl;
1641 1641
1642 struct intel_psr psr;1642 struct intel_psr psr;
1643
1644 /* When we last wrote the OUI for eDP */
1645 unsigned long last_oui_write;
1643};1646};
1644 1647
1645enum lspcon_vendor {1648enum lspcon_vendor {
drivers/gpu/drm/i915/display/intel_dp.c+11−0
@@ -29,6 +29,7 @@ · 28 unmodified lines
29#include <linux/i2c.h>29#include <linux/i2c.h>
30#include <linux/notifier.h>30#include <linux/notifier.h>
31#include <linux/slab.h>31#include <linux/slab.h>
32#include <linux/timekeeping.h>
32#include <linux/types.h>33#include <linux/types.h>
33 34
34#include <asm/byteorder.h>35#include <asm/byteorder.h>
@@ -1955,6 +1956,16 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful) · 1920 unmodified lines
1955 1956
1956 if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)1957 if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
1957 drm_err(&i915->drm, "Failed to write source OUI\n");1958 drm_err(&i915->drm, "Failed to write source OUI\n");
1959
1960 intel_dp->last_oui_write = jiffies;
1961}
1962
1963void intel_dp_wait_source_oui(struct intel_dp *intel_dp)
1964{
1965 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
1966
1967 drm_dbg_kms(&i915->drm, "Performing OUI wait\n");
1968 wait_remaining_ms_from_jiffies(intel_dp->last_oui_write, 30);
1958}1969}
1959 1970
1960/* If the device supports it, try to set the power state appropriately */1971/* If the device supports it, try to set the power state appropriately */
drivers/gpu/drm/i915/display/intel_dp.h+2−0
@@ -119,4 +119,6 @@ void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp, · 118 unmodified lines
119 const struct intel_crtc_state *crtc_state);119 const struct intel_crtc_state *crtc_state);
120void intel_dp_phy_test(struct intel_encoder *encoder);120void intel_dp_phy_test(struct intel_encoder *encoder);
121 121
122void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
123
122#endif /* __INTEL_DP_H__ */124#endif /* __INTEL_DP_H__ */
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c+26−6
@@ -36,6 +36,7 @@ · 35 unmodified lines
36 36
37#include "intel_backlight.h"37#include "intel_backlight.h"
38#include "intel_display_types.h"38#include "intel_display_types.h"
39#include "intel_dp.h"
39#include "intel_dp_aux_backlight.h"40#include "intel_dp_aux_backlight.h"
40 41
41/* TODO:42/* TODO:
@@ -106,6 +107,8 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector) · 64 unmodified lines
106 int ret;107 int ret;
107 u8 tcon_cap[4];108 u8 tcon_cap[4];
108 109
110 intel_dp_wait_source_oui(intel_dp);
111
109 ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));112 ret = drm_dp_dpcd_read(aux, INTEL_EDP_HDR_TCON_CAP0, tcon_cap, sizeof(tcon_cap));
110 if (ret != sizeof(tcon_cap))113 if (ret != sizeof(tcon_cap))
111 return false;114 return false;
@@ -204,6 +207,8 @@ intel_dp_aux_hdr_enable_backlight(const struct intel_crtc_state *crtc_state, · 92 unmodified lines
204 int ret;207 int ret;
205 u8 old_ctrl, ctrl;208 u8 old_ctrl, ctrl;
206 209
210 intel_dp_wait_source_oui(intel_dp);
211
207 ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);212 ret = drm_dp_dpcd_readb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, &old_ctrl);
208 if (ret != 1) {213 if (ret != 1) {
209 drm_err(&i915->drm, "Failed to read current backlight control mode: %d\n", ret);214 drm_err(&i915->drm, "Failed to read current backlight control mode: %d\n", ret);
@@ -293,6 +298,13 @@ intel_dp_aux_vesa_enable_backlight(const struct intel_crtc_state *crtc_state, · 83 unmodified lines
293 struct intel_panel *panel = &connector->panel;298 struct intel_panel *panel = &connector->panel;
294 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);299 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
295 300
301 if (!panel->backlight.edp.vesa.info.aux_enable) {
302 u32 pwm_level = intel_backlight_invert_pwm_level(connector,
303 panel->backlight.pwm_level_max);
304
305 panel->backlight.pwm_funcs->enable(crtc_state, conn_state, pwm_level);
306 }
307
296 drm_edp_backlight_enable(&intel_dp->aux, &panel->backlight.edp.vesa.info, level);308 drm_edp_backlight_enable(&intel_dp->aux, &panel->backlight.edp.vesa.info, level);
297}309}
298 310
@@ -304,6 +316,10 @@ static void intel_dp_aux_vesa_disable_backlight(const struct drm_connector_state · 5 unmodified lines
304 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);316 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder);
305 317
306 drm_edp_backlight_disable(&intel_dp->aux, &panel->backlight.edp.vesa.info);318 drm_edp_backlight_disable(&intel_dp->aux, &panel->backlight.edp.vesa.info);
319
320 if (!panel->backlight.edp.vesa.info.aux_enable)
321 panel->backlight.pwm_funcs->disable(old_conn_state,
322 intel_backlight_invert_pwm_level(connector, 0));
307}323}
308 324
309static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe)325static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, enum pipe pipe)
@@ -321,6 +337,15 @@ static int intel_dp_aux_vesa_setup_backlight(struct intel_connector *connector, · 11 unmodified lines
321 if (ret < 0)337 if (ret < 0)
322 return ret;338 return ret;
323 339
340 if (!panel->backlight.edp.vesa.info.aux_enable) {
341 ret = panel->backlight.pwm_funcs->setup(connector, pipe);
342 if (ret < 0) {
343 drm_err(&i915->drm,
344 "Failed to setup PWM backlight controls for eDP backlight: %d\n",
345 ret);
346 return ret;
347 }
348 }
324 panel->backlight.max = panel->backlight.edp.vesa.info.max;349 panel->backlight.max = panel->backlight.edp.vesa.info.max;
325 panel->backlight.min = 0;350 panel->backlight.min = 0;
326 if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) {351 if (current_mode == DP_EDP_BACKLIGHT_CONTROL_MODE_DPCD) {
@@ -340,12 +365,7 @@ intel_dp_aux_supports_vesa_backlight(struct intel_connector *connector) · 13 unmodified lines
340 struct intel_dp *intel_dp = intel_attached_dp(connector);365 struct intel_dp *intel_dp = intel_attached_dp(connector);
341 struct drm_i915_private *i915 = dp_to_i915(intel_dp);366 struct drm_i915_private *i915 = dp_to_i915(intel_dp);
342 367
343 /* TODO: We currently only support AUX only backlight configurations, not backlights which368 if (drm_edp_backlight_supported(intel_dp->edp_dpcd)) {
344 * require a mix of PWM and AUX controls to work. In the mean time, these machines typically
345 * work just fine using normal PWM controls anyway.
346 */
347 if ((intel_dp->edp_dpcd[1] & DP_EDP_BACKLIGHT_AUX_ENABLE_CAP) &&
348 drm_edp_backlight_supported(intel_dp->edp_dpcd)) {
349 drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n");369 drm_dbg_kms(&i915->drm, "AUX Backlight Control Supported!\n");
350 return true;370 return true;
351 }371 }
drivers/gpu/drm/i915/gt/intel_workarounds.c+0−7
@@ -621,13 +621,6 @@ static void gen12_ctx_workarounds_init(struct intel_engine_cs *engine, · 620 unmodified lines
621 FF_MODE2_GS_TIMER_MASK,621 FF_MODE2_GS_TIMER_MASK,
622 FF_MODE2_GS_TIMER_224,622 FF_MODE2_GS_TIMER_224,
623 0, false);623 0, false);
624
625 /*
626 * Wa_14012131227:dg1
627 * Wa_1508744258:tgl,rkl,dg1,adl-s,adl-p
628 */
629 wa_masked_en(wal, GEN7_COMMON_SLICE_CHICKEN1,
630 GEN9_RHWO_OPTIMIZATION_DISABLE);
631}624}
632 625
633static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,626static void dg1_ctx_workarounds_init(struct intel_engine_cs *engine,