Using a mask to represent bus DMA constraints has a set of limitations. The biggest one being it can only hold a power of two (minus one). The DMA mapping code is already aware of this and treats dev->bus_dma_mask as a limit. This quirk is already used by some architectures although still rare. With the introduction of the Raspberry Pi 4 we've found a new contender for the use of bus DMA limits, as its PCIe bus can only address the lower 3GB of memory (of a total of 4GB). This is impossible to represent with a mask. To make things worse the device-tree code rounds non power of two bus DMA limits to the next power of two, which is unacceptable in this case. In the light of this, rename dev->bus_dma_mask to dev->bus_dma_limit all over the tree and treat it as such. Note that dev->bus_dma_limit should contain the higher accessible DMA address.
Showing the changes to include/linux (3 of 13 files). Show all
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| @@ -1186,8 +1186,8 @@ struct dev_links_info { · 1185 unmodified lines | |||
| 1186 | * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all | 1186 | * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all |
| 1187 | * hardware supports 64-bit addresses for consistent allocations | 1187 | * hardware supports 64-bit addresses for consistent allocations |
| 1188 | * such descriptors. | 1188 | * such descriptors. |
| 1189 | * @bus_dma_mask: Mask of an upstream bridge or bus which imposes a smaller DMA | 1189 | * @bus_dma_limit: Limit of an upstream bridge or bus which imposes a smaller |
| 1190 | * limit than the device itself supports. | 1190 | * DMA limit than the device itself supports. |
| 1191 | * @dma_pfn_offset: offset of DMA memory range relatively of RAM | 1191 | * @dma_pfn_offset: offset of DMA memory range relatively of RAM |
| 1192 | * @dma_parms: A low level driver may set these to teach IOMMU code about | 1192 | * @dma_parms: A low level driver may set these to teach IOMMU code about |
| 1193 | * segment limitations. | 1193 | * segment limitations. |
| @@ -1270,7 +1270,7 @@ struct device { · 76 unmodified lines | |||
| 1270 | not all hardware supports | 1270 | not all hardware supports |
| 1271 | 64 bit addresses for consistent | 1271 | 64 bit addresses for consistent |
| 1272 | allocations such descriptors. */ | 1272 | allocations such descriptors. */ |
| 1273 | u64 bus_dma_mask; /* upstream dma_mask constraint */ | 1273 | u64 bus_dma_limit; /* upstream dma constraint */ |
| 1274 | unsigned long dma_pfn_offset; | 1274 | unsigned long dma_pfn_offset; |
| 1275 | 1275 | ||
| 1276 | struct device_dma_parameters *dma_parms; | 1276 | struct device_dma_parameters *dma_parms; |
| @@ -63,7 +63,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, · 62 unmodified lines | |||
| 63 | min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) | 63 | min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) |
| 64 | return false; | 64 | return false; |
| 65 | 65 | ||
| 66 | return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); | 66 | return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); |
| 67 | } | 67 | } |
| 68 | 68 | ||
| 69 | u64 dma_direct_get_required_mask(struct device *dev); | 69 | u64 dma_direct_get_required_mask(struct device *dev); |
| @@ -697,7 +697,7 @@ static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) · 696 unmodified lines | |||
| 697 | */ | 697 | */ |
| 698 | static inline bool dma_addressing_limited(struct device *dev) | 698 | static inline bool dma_addressing_limited(struct device *dev) |
| 699 | { | 699 | { |
| 700 | return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) < | 700 | return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < |
| 701 | dma_get_required_mask(dev); | 701 | dma_get_required_mask(dev); |
| 702 | } | 702 | } |
| 703 | 703 | ||