History

Merge tag 'omap-for-v4.14/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "soc changes for omaps for v4.14" from Tony Lindgren: SoC updates for omaps for v4.14. Most of the chages are to add support for new dra762 SoC. The other changes are are for legacy DMA code removal, and MMC quirk and iodelay config for dra7. * tag 'omap-for-v4.14/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: dra7: powerdomain data: Register SoC specific powerdomains ARM: dra762: Enable SMP for dra762 ARM: dra7: hwmod: Register dra76x specific hwmod ARM: dra762: Add support for device identification ARM: OMAP2+: board-generic: add support for dra762 family ARM: OMAP2+: Select PINCTRL_TI_IODELAY for SOC_DRA7XX ARM: OMAP2+: Add pdata-quirks for MMC/SD on DRA74x EVM ARM: OMAP2+: Remove unused legacy code for DMA

Arnd Bergmann committed 9 years ago

Commit a968bc52 parents 6a1aa09 3af6ccc11 files · +101 −148Browse files

Unified · Split

11 files
  1. Documentation/devicetree/bindings/arm/omap/omap.txt +3 −0
  2. arch/arm/mach-omap2/Kconfig +1 −0
  3. arch/arm/mach-omap2/board-generic.c +1 −0
  4. arch/arm/mach-omap2/dma.c +5 −143
  5. arch/arm/mach-omap2/id.c +9 −0
  6. arch/arm/mach-omap2/omap-smp.c +2 −2
  7. arch/arm/mach-omap2/omap_hwmod_7xx_data.c +9 −2
  8. arch/arm/mach-omap2/pdata-quirks.c +31 −0
  9. arch/arm/mach-omap2/powerdomains7xx_data.c +32 −1
  10. arch/arm/mach-omap2/soc.h +5 −0
  11. include/linux/platform_data/hsmmc-omap.h +3 −0
Documentation/devicetree/bindings/arm/omap/omap.txt+3−0
@@ -80,6 +80,9 @@ SoCs: · 79 unmodified lines
80- OMAP543280- OMAP5432
81 compatible = "ti,omap5432", "ti,omap5"81 compatible = "ti,omap5432", "ti,omap5"
82 82
83- DRA762
84 compatible = "ti,dra762", "ti,dra7"
85
83- DRA74286- DRA742
84 compatible = "ti,dra742", "ti,dra74", "ti,dra7"87 compatible = "ti,dra742", "ti,dra74", "ti,dra7"
85 88
arch/arm/mach-omap2/Kconfig+1−0
@@ -87,6 +87,7 @@ config SOC_DRA7XX · 86 unmodified lines
87 select OMAP_INTERCONNECT_BARRIER87 select OMAP_INTERCONNECT_BARRIER
88 select PM_OPP if PM88 select PM_OPP if PM
89 select ZONE_DMA if ARM_LPAE89 select ZONE_DMA if ARM_LPAE
90 select PINCTRL_TI_IODELAY if OF && PINCTRL
90 91
91config ARCH_OMAP2PLUS92config ARCH_OMAP2PLUS
92 bool93 bool
arch/arm/mach-omap2/board-generic.c+1−0
@@ -312,6 +312,7 @@ MACHINE_END · 311 unmodified lines
312 312
313#ifdef CONFIG_SOC_DRA7XX313#ifdef CONFIG_SOC_DRA7XX
314static const char *const dra74x_boards_compat[] __initconst = {314static const char *const dra74x_boards_compat[] __initconst = {
315 "ti,dra762",
315 "ti,am5728",316 "ti,am5728",
316 "ti,am5726",317 "ti,am5726",
317 "ti,dra742",318 "ti,dra742",
arch/arm/mach-omap2/dma.c+5−143
@@ -204,61 +204,6 @@ static unsigned configure_dma_errata(void) · 203 unmodified lines
204 return errata;204 return errata;
205}205}
206 206
207static const struct dma_slave_map omap24xx_sdma_map[] = {
208 { "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
209 { "omap-aes", "tx", SDMA_FILTER_PARAM(9) },
210 { "omap-aes", "rx", SDMA_FILTER_PARAM(10) },
211 { "omap-sham", "rx", SDMA_FILTER_PARAM(13) },
212 { "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
213 { "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
214 { "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
215 { "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
216 { "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
217 { "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
218 { "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
219 { "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
220 { "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
221 { "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
222 { "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
223 { "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
224 { "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
225 { "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
226 { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
227 { "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
228 { "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
229 { "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
230 { "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
231 { "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
232 { "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
233 { "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
234 { "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
235 { "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
236 { "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
237 { "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
238 { "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
239 { "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
240 { "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
241 { "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
242 { "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
243 { "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
244 { "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
245 { "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
246 { "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
247 { "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
248 { "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
249 { "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
250 { "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
251 { "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
252
253 /* external DMA requests when tusb6010 is used */
254 { "musb-tusb", "dmareq0", SDMA_FILTER_PARAM(2) },
255 { "musb-tusb", "dmareq1", SDMA_FILTER_PARAM(3) },
256 { "musb-tusb", "dmareq2", SDMA_FILTER_PARAM(14) }, /* OMAP2420 only */
257 { "musb-tusb", "dmareq3", SDMA_FILTER_PARAM(15) }, /* OMAP2420 only */
258 { "musb-tusb", "dmareq4", SDMA_FILTER_PARAM(16) }, /* OMAP2420 only */
259 { "musb-tusb", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
260};
261
262static const struct dma_slave_map omap24xx_sdma_dt_map[] = {207static const struct dma_slave_map omap24xx_sdma_dt_map[] = {
263 /* external DMA requests when tusb6010 is used */208 /* external DMA requests when tusb6010 is used */
264 { "musb-hdrc.1.auto", "dmareq0", SDMA_FILTER_PARAM(2) },209 { "musb-hdrc.1.auto", "dmareq0", SDMA_FILTER_PARAM(2) },
@@ -269,61 +214,6 @@ static const struct dma_slave_map omap24xx_sdma_dt_map[] = { · 4 unmodified lines
269 { "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */214 { "musb-hdrc.1.auto", "dmareq5", SDMA_FILTER_PARAM(64) }, /* OMAP2420 only */
270};215};
271 216
272static const struct dma_slave_map omap3xxx_sdma_map[] = {
273 { "omap-gpmc", "rxtx", SDMA_FILTER_PARAM(4) },
274 { "omap2_mcspi.2", "tx0", SDMA_FILTER_PARAM(15) },
275 { "omap2_mcspi.2", "rx0", SDMA_FILTER_PARAM(16) },
276 { "omap-mcbsp.3", "tx", SDMA_FILTER_PARAM(17) },
277 { "omap-mcbsp.3", "rx", SDMA_FILTER_PARAM(18) },
278 { "omap-mcbsp.4", "tx", SDMA_FILTER_PARAM(19) },
279 { "omap-mcbsp.4", "rx", SDMA_FILTER_PARAM(20) },
280 { "omap-mcbsp.5", "tx", SDMA_FILTER_PARAM(21) },
281 { "omap-mcbsp.5", "rx", SDMA_FILTER_PARAM(22) },
282 { "omap2_mcspi.2", "tx1", SDMA_FILTER_PARAM(23) },
283 { "omap2_mcspi.2", "rx1", SDMA_FILTER_PARAM(24) },
284 { "omap_i2c.3", "tx", SDMA_FILTER_PARAM(25) },
285 { "omap_i2c.3", "rx", SDMA_FILTER_PARAM(26) },
286 { "omap_i2c.1", "tx", SDMA_FILTER_PARAM(27) },
287 { "omap_i2c.1", "rx", SDMA_FILTER_PARAM(28) },
288 { "omap_i2c.2", "tx", SDMA_FILTER_PARAM(29) },
289 { "omap_i2c.2", "rx", SDMA_FILTER_PARAM(30) },
290 { "omap-mcbsp.1", "tx", SDMA_FILTER_PARAM(31) },
291 { "omap-mcbsp.1", "rx", SDMA_FILTER_PARAM(32) },
292 { "omap-mcbsp.2", "tx", SDMA_FILTER_PARAM(33) },
293 { "omap-mcbsp.2", "rx", SDMA_FILTER_PARAM(34) },
294 { "omap2_mcspi.0", "tx0", SDMA_FILTER_PARAM(35) },
295 { "omap2_mcspi.0", "rx0", SDMA_FILTER_PARAM(36) },
296 { "omap2_mcspi.0", "tx1", SDMA_FILTER_PARAM(37) },
297 { "omap2_mcspi.0", "rx1", SDMA_FILTER_PARAM(38) },
298 { "omap2_mcspi.0", "tx2", SDMA_FILTER_PARAM(39) },
299 { "omap2_mcspi.0", "rx2", SDMA_FILTER_PARAM(40) },
300 { "omap2_mcspi.0", "tx3", SDMA_FILTER_PARAM(41) },
301 { "omap2_mcspi.0", "rx3", SDMA_FILTER_PARAM(42) },
302 { "omap2_mcspi.1", "tx0", SDMA_FILTER_PARAM(43) },
303 { "omap2_mcspi.1", "rx0", SDMA_FILTER_PARAM(44) },
304 { "omap2_mcspi.1", "tx1", SDMA_FILTER_PARAM(45) },
305 { "omap2_mcspi.1", "rx1", SDMA_FILTER_PARAM(46) },
306 { "omap_hsmmc.1", "tx", SDMA_FILTER_PARAM(47) },
307 { "omap_hsmmc.1", "rx", SDMA_FILTER_PARAM(48) },
308 { "omap_uart.0", "tx", SDMA_FILTER_PARAM(49) },
309 { "omap_uart.0", "rx", SDMA_FILTER_PARAM(50) },
310 { "omap_uart.1", "tx", SDMA_FILTER_PARAM(51) },
311 { "omap_uart.1", "rx", SDMA_FILTER_PARAM(52) },
312 { "omap_uart.2", "tx", SDMA_FILTER_PARAM(53) },
313 { "omap_uart.2", "rx", SDMA_FILTER_PARAM(54) },
314 { "omap_hsmmc.0", "tx", SDMA_FILTER_PARAM(61) },
315 { "omap_hsmmc.0", "rx", SDMA_FILTER_PARAM(62) },
316 { "omap-aes", "tx", SDMA_FILTER_PARAM(65) },
317 { "omap-aes", "rx", SDMA_FILTER_PARAM(66) },
318 { "omap-sham", "rx", SDMA_FILTER_PARAM(69) },
319 { "omap2_mcspi.3", "tx0", SDMA_FILTER_PARAM(70) },
320 { "omap2_mcspi.3", "rx0", SDMA_FILTER_PARAM(71) },
321 { "omap_hsmmc.2", "tx", SDMA_FILTER_PARAM(77) },
322 { "omap_hsmmc.2", "rx", SDMA_FILTER_PARAM(78) },
323 { "omap_uart.3", "tx", SDMA_FILTER_PARAM(81) },
324 { "omap_uart.3", "rx", SDMA_FILTER_PARAM(82) },
325};
326
327static struct omap_system_dma_plat_info dma_plat_info __initdata = {217static struct omap_system_dma_plat_info dma_plat_info __initdata = {
328 .reg_map = reg_map,218 .reg_map = reg_map,
329 .channel_stride = 0x60,219 .channel_stride = 0x60,
@@ -352,24 +242,10 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) · 22 unmodified lines
352 p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;242 p.dma_attr = (struct omap_dma_dev_attr *)oh->dev_attr;
353 p.errata = configure_dma_errata();243 p.errata = configure_dma_errata();
354 244
355 if (!of_have_populated_dt()) {245 if (soc_is_omap24xx()) {
356 if (soc_is_omap24xx()) {246 /* DMA slave map for drivers not yet converted to DT */
357 p.slave_map = omap24xx_sdma_map;247 p.slave_map = omap24xx_sdma_dt_map;
358 p.slavecnt = ARRAY_SIZE(omap24xx_sdma_map);248 p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
359 } else if (soc_is_omap34xx() || soc_is_omap3630()) {
360 p.slave_map = omap3xxx_sdma_map;
361 p.slavecnt = ARRAY_SIZE(omap3xxx_sdma_map);
362 } else {
363 pr_err("%s: The legacy DMA map is not provided!\n",
364 __func__);
365 return -ENODEV;
366 }
367 } else {
368 if (soc_is_omap24xx()) {
369 /* DMA slave map for drivers not yet converted to DT */
370 p.slave_map = omap24xx_sdma_dt_map;
371 p.slavecnt = ARRAY_SIZE(omap24xx_sdma_dt_map);
372 }
373 }249 }
374 250
375 pdev = omap_device_build(name, 0, oh, &p, sizeof(p));251 pdev = omap_device_build(name, 0, oh, &p, sizeof(p));
@@ -413,21 +289,7 @@ static int __init omap2_system_dma_init_dev(struct omap_hwmod *oh, void *unused) · 37 unmodified lines
413 289
414static int __init omap2_system_dma_init(void)290static int __init omap2_system_dma_init(void)
415{291{
416 struct platform_device *pdev;292 return omap_hwmod_for_each_by_class("dma",
417 int res;
418
419 res = omap_hwmod_for_each_by_class("dma",
420 omap2_system_dma_init_dev, NULL);293 omap2_system_dma_init_dev, NULL);
421 if (res)
422 return res;
423
424 if (of_have_populated_dt())
425 return res;
426
427 pdev = platform_device_register_full(&omap_dma_dev_info);
428 if (IS_ERR(pdev))
429 return PTR_ERR(pdev);
430
431 return res;
432}294}
433omap_arch_initcall(omap2_system_dma_init);295omap_arch_initcall(omap2_system_dma_init);
arch/arm/mach-omap2/id.c+9−0
@@ -663,6 +663,15 @@ void __init dra7xxx_check_revision(void) · 662 unmodified lines
663 hawkeye = (idcode >> 12) & 0xffff;663 hawkeye = (idcode >> 12) & 0xffff;
664 rev = (idcode >> 28) & 0xff;664 rev = (idcode >> 28) & 0xff;
665 switch (hawkeye) {665 switch (hawkeye) {
666 case 0xbb50:
667 switch (rev) {
668 case 0:
669 default:
670 omap_revision = DRA762_REV_ES1_0;
671 break;
672 }
673 break;
674
666 case 0xb990:675 case 0xb990:
667 switch (rev) {676 switch (rev) {
668 case 0:677 case 0:
arch/arm/mach-omap2/omap-smp.c+2−2
@@ -342,7 +342,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) · 341 unmodified lines
342 c = &omap443x_cfg;342 c = &omap443x_cfg;
343 else if (soc_is_omap446x())343 else if (soc_is_omap446x())
344 c = &omap446x_cfg;344 c = &omap446x_cfg;
345 else if (soc_is_dra74x() || soc_is_omap54xx())345 else if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x())
346 c = &omap5_cfg;346 c = &omap5_cfg;
347 347
348 if (!c) {348 if (!c) {
@@ -355,7 +355,7 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) · 6 unmodified lines
355 cfg.startup_addr = c->startup_addr;355 cfg.startup_addr = c->startup_addr;
356 cfg.wakeupgen_base = omap_get_wakeupgen_base();356 cfg.wakeupgen_base = omap_get_wakeupgen_base();
357 357
358 if (soc_is_dra74x() || soc_is_omap54xx()) {358 if (soc_is_dra74x() || soc_is_omap54xx() || soc_is_dra76x()) {
359 if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)359 if ((__boot_cpu_mode & MODE_MASK) == HYP_MODE)
360 cfg.startup_addr = omap5_secondary_hyp_startup;360 cfg.startup_addr = omap5_secondary_hyp_startup;
361 omap5_erratum_workaround_801819();361 omap5_erratum_workaround_801819();
arch/arm/mach-omap2/omap_hwmod_7xx_data.c+9−2
@@ -4070,6 +4070,11 @@ static struct omap_hwmod_ocp_if *dra7xx_gp_hwmod_ocp_ifs[] __initdata = { · 4069 unmodified lines
4070};4070};
4071 4071
4072/* SoC variant specific hwmod links */4072/* SoC variant specific hwmod links */
4073static struct omap_hwmod_ocp_if *dra76x_hwmod_ocp_ifs[] __initdata = {
4074 &dra7xx_l4_per3__usb_otg_ss4,
4075 NULL,
4076};
4077
4073static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {4078static struct omap_hwmod_ocp_if *dra74x_hwmod_ocp_ifs[] __initdata = {
4074 &dra7xx_l4_per3__usb_otg_ss4,4079 &dra7xx_l4_per3__usb_otg_ss4,
4075 NULL,4080 NULL,
@@ -4095,12 +4100,14 @@ int __init dra7xx_hwmod_init(void) · 19 unmodified lines
4095 ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);4100 ret = omap_hwmod_register_links(dra74x_hwmod_ocp_ifs);
4096 else if (!ret && soc_is_dra72x())4101 else if (!ret && soc_is_dra72x())
4097 ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);4102 ret = omap_hwmod_register_links(dra72x_hwmod_ocp_ifs);
4103 else if (!ret && soc_is_dra76x())
4104 ret = omap_hwmod_register_links(dra76x_hwmod_ocp_ifs);
4098 4105
4099 if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)4106 if (!ret && omap_type() == OMAP2_DEVICE_TYPE_GP)
4100 ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);4107 ret = omap_hwmod_register_links(dra7xx_gp_hwmod_ocp_ifs);
4101 4108
4102 /* now for the IPs *NOT* in dra71 */4109 /* now for the IPs available only in dra74 and dra72 */
4103 if (!ret && !of_machine_is_compatible("ti,dra718"))4110 if (!ret && !of_machine_is_compatible("ti,dra718") && !soc_is_dra76x())
4104 ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);4111 ret = omap_hwmod_register_links(dra74x_dra72x_hwmod_ocp_ifs);
4105 4112
4106 return ret;4113 return ret;
arch/arm/mach-omap2/pdata-quirks.c+31−0
@@ -434,6 +434,26 @@ static void __init omap5_uevm_legacy_init(void) · 433 unmodified lines
434}434}
435#endif435#endif
436 436
437#ifdef CONFIG_SOC_DRA7XX
438static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
439static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
440static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
441
442static void __init dra7x_evm_mmc_quirk(void)
443{
444 if (omap_rev() == DRA752_REV_ES1_1 || omap_rev() == DRA752_REV_ES1_0) {
445 dra7_hsmmc_data_mmc1.version = "rev11";
446 dra7_hsmmc_data_mmc1.max_freq = 96000000;
447
448 dra7_hsmmc_data_mmc2.version = "rev11";
449 dra7_hsmmc_data_mmc2.max_freq = 48000000;
450
451 dra7_hsmmc_data_mmc3.version = "rev11";
452 dra7_hsmmc_data_mmc3.max_freq = 48000000;
453 }
454}
455#endif
456
437static struct pcs_pdata pcs_pdata;457static struct pcs_pdata pcs_pdata;
438 458
439void omap_pcs_legacy_init(int irq, void (*rearm)(void))459void omap_pcs_legacy_init(int irq, void (*rearm)(void))
@@ -560,6 +580,14 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = { · 120 unmodified lines
560 &omap4_iommu_pdata),580 &omap4_iommu_pdata),
561 OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",581 OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
562 &omap4_iommu_pdata),582 &omap4_iommu_pdata),
583#endif
584#ifdef CONFIG_SOC_DRA7XX
585 OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x4809c000, "4809c000.mmc",
586 &dra7_hsmmc_data_mmc1),
587 OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480b4000, "480b4000.mmc",
588 &dra7_hsmmc_data_mmc2),
589 OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
590 &dra7_hsmmc_data_mmc3),
563#endif591#endif
564 /* Common auxdata */592 /* Common auxdata */
565 OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),593 OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
@@ -589,6 +617,9 @@ static struct pdata_init pdata_quirks[] __initdata = { · 23 unmodified lines
589#endif617#endif
590#ifdef CONFIG_SOC_OMAP5618#ifdef CONFIG_SOC_OMAP5
591 { "ti,omap5-uevm", omap5_uevm_legacy_init, },619 { "ti,omap5-uevm", omap5_uevm_legacy_init, },
620#endif
621#ifdef CONFIG_SOC_DRA7XX
622 { "ti,dra7-evm", dra7x_evm_mmc_quirk, },
592#endif623#endif
593 { /* sentinel */ },624 { /* sentinel */ },
594};625};
arch/arm/mach-omap2/powerdomains7xx_data.c+32−1
@@ -29,6 +29,7 @@ · 28 unmodified lines
29#include "prcm44xx.h"29#include "prcm44xx.h"
30#include "prm7xx.h"30#include "prm7xx.h"
31#include "prcm_mpu7xx.h"31#include "prcm_mpu7xx.h"
32#include "soc.h"
32 33
33/* iva_7xx_pwrdm: IVA-HD power domain */34/* iva_7xx_pwrdm: IVA-HD power domain */
34static struct powerdomain iva_7xx_pwrdm = {35static struct powerdomain iva_7xx_pwrdm = {
@@ -63,6 +64,14 @@ static struct powerdomain custefuse_7xx_pwrdm = { · 28 unmodified lines
63 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,64 .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
64};65};
65 66
67/* custefuse_aon_7xx_pwrdm: Customer efuse controller power domain */
68static struct powerdomain custefuse_aon_7xx_pwrdm = {
69 .name = "custefuse_pwrdm",
70 .prcm_offs = DRA7XX_PRM_CUSTEFUSE_INST,
71 .prcm_partition = DRA7XX_PRM_PARTITION,
72 .pwrsts = PWRSTS_ON,
73};
74
66/* ipu_7xx_pwrdm: Audio back end power domain */75/* ipu_7xx_pwrdm: Audio back end power domain */
67static struct powerdomain ipu_7xx_pwrdm = {76static struct powerdomain ipu_7xx_pwrdm = {
68 .name = "ipu_pwrdm",77 .name = "ipu_pwrdm",
@@ -350,7 +359,6 @@ static struct powerdomain eve1_7xx_pwrdm = { · 281 unmodified lines
350static struct powerdomain *powerdomains_dra7xx[] __initdata = {359static struct powerdomain *powerdomains_dra7xx[] __initdata = {
351 &iva_7xx_pwrdm,360 &iva_7xx_pwrdm,
352 &rtc_7xx_pwrdm,361 &rtc_7xx_pwrdm,
353 &custefuse_7xx_pwrdm,
354 &ipu_7xx_pwrdm,362 &ipu_7xx_pwrdm,
355 &dss_7xx_pwrdm,363 &dss_7xx_pwrdm,
356 &l4per_7xx_pwrdm,364 &l4per_7xx_pwrdm,
@@ -374,9 +382,32 @@ static struct powerdomain *powerdomains_dra7xx[] __initdata = { · 17 unmodified lines
374 NULL382 NULL
375};383};
376 384
385static struct powerdomain *powerdomains_dra76x[] __initdata = {
386 &custefuse_aon_7xx_pwrdm,
387 NULL
388};
389
390static struct powerdomain *powerdomains_dra74x[] __initdata = {
391 &custefuse_7xx_pwrdm,
392 NULL
393};
394
395static struct powerdomain *powerdomains_dra72x[] __initdata = {
396 &custefuse_aon_7xx_pwrdm,
397 NULL
398};
399
377void __init dra7xx_powerdomains_init(void)400void __init dra7xx_powerdomains_init(void)
378{401{
379 pwrdm_register_platform_funcs(&omap4_pwrdm_operations);402 pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
380 pwrdm_register_pwrdms(powerdomains_dra7xx);403 pwrdm_register_pwrdms(powerdomains_dra7xx);
404
405 if (soc_is_dra76x())
406 pwrdm_register_pwrdms(powerdomains_dra76x);
407 else if (soc_is_dra74x())
408 pwrdm_register_pwrdms(powerdomains_dra74x);
409 else if (soc_is_dra72x())
410 pwrdm_register_pwrdms(powerdomains_dra72x);
411
381 pwrdm_complete_init();412 pwrdm_complete_init();
382}413}
arch/arm/mach-omap2/soc.h+5−0
@@ -167,6 +167,7 @@ IS_TI_SUBCLASS(816x, 0x816) · 166 unmodified lines
167IS_TI_SUBCLASS(814x, 0x814)167IS_TI_SUBCLASS(814x, 0x814)
168IS_AM_SUBCLASS(335x, 0x335)168IS_AM_SUBCLASS(335x, 0x335)
169IS_AM_SUBCLASS(437x, 0x437)169IS_AM_SUBCLASS(437x, 0x437)
170IS_DRA_SUBCLASS(76x, 0x76)
170IS_DRA_SUBCLASS(75x, 0x75)171IS_DRA_SUBCLASS(75x, 0x75)
171IS_DRA_SUBCLASS(72x, 0x72)172IS_DRA_SUBCLASS(72x, 0x72)
172 173
@@ -185,6 +186,7 @@ IS_DRA_SUBCLASS(72x, 0x72) · 12 unmodified lines
185#define soc_is_omap54xx() 0186#define soc_is_omap54xx() 0
186#define soc_is_omap543x() 0187#define soc_is_omap543x() 0
187#define soc_is_dra7xx() 0188#define soc_is_dra7xx() 0
189#define soc_is_dra76x() 0
188#define soc_is_dra74x() 0190#define soc_is_dra74x() 0
189#define soc_is_dra72x() 0191#define soc_is_dra72x() 0
190 192
@@ -314,9 +316,11 @@ IS_OMAP_TYPE(3430, 0x3430) · 123 unmodified lines
314 316
315#if defined(CONFIG_SOC_DRA7XX)317#if defined(CONFIG_SOC_DRA7XX)
316#undef soc_is_dra7xx318#undef soc_is_dra7xx
319#undef soc_is_dra76x
317#undef soc_is_dra74x320#undef soc_is_dra74x
318#undef soc_is_dra72x321#undef soc_is_dra72x
319#define soc_is_dra7xx() is_dra7xx()322#define soc_is_dra7xx() is_dra7xx()
323#define soc_is_dra76x() is_dra76x()
320#define soc_is_dra74x() is_dra75x()324#define soc_is_dra74x() is_dra75x()
321#define soc_is_dra72x() is_dra72x()325#define soc_is_dra72x() is_dra72x()
322#endif326#endif
@@ -386,6 +390,7 @@ IS_OMAP_TYPE(3430, 0x3430) · 63 unmodified lines
386#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))390#define OMAP5432_REV_ES2_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x20 << 8))
387 391
388#define DRA7XX_CLASS 0x07000000392#define DRA7XX_CLASS 0x07000000
393#define DRA762_REV_ES1_0 (DRA7XX_CLASS | (0x62 << 16) | (0x10 << 8))
389#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))394#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
390#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))395#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
391#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))396#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
include/linux/platform_data/hsmmc-omap.h+3−0
@@ -67,6 +67,9 @@ struct omap_hsmmc_platform_data { · 66 unmodified lines
67#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)67#define HSMMC_HAS_HSPE_SUPPORT (1 << 2)
68 unsigned features;68 unsigned features;
69 69
70 /* string specifying a particular variant of hardware */
71 char *version;
72
70 int gpio_cd; /* gpio (card detect) */73 int gpio_cd; /* gpio (card detect) */
71 int gpio_cod; /* gpio (cover detect) */74 int gpio_cod; /* gpio (cover detect) */
72 int gpio_wp; /* gpio (write protect) */75 int gpio_wp; /* gpio (write protect) */

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