History

ata: separate PATA timings code from libata-core.c

Separate PATA timings code from libata-core.c: * add PATA_TIMINGS config option and make corresponding PATA host drivers (and ATA ACPI code) select it * move following PATA timings code to libata-pata-timings.c: - ata_timing_quantize() - ata_timing_merge() - ata_timing_find_mode() - ata_timing_compute() * group above functions together in <linux/libata.h> * include libata-pata-timings.c in the build when PATA_TIMINGS config option is enabled * cover ata_timing_cycle2mode() with CONFIG_ATA_ACPI ifdef (it depends on code from libata-core.c and libata-pata-timings.c while its only user is ATA ACPI) Code size savings on m68k arch using (modified) atari_defconfig: text data bss dec hex filename before: 39688 573 40 40301 9d6d drivers/ata/libata-core.o after: 37820 572 40 38432 9620 drivers/ata/libata-core.o

Bartlomiej Zolnierkiewicz committed 6 years ago

Commit a9b2c121 parent 4e168185 files · +226 −187Browse files

Unified · Split

5 files
  1. drivers/ata/Kconfig +21 −0
  2. drivers/ata/Makefile +1 −0
  3. drivers/ata/libata-core.c +2 −181
  4. drivers/ata/libata-pata-timings.c +192 −0
  5. include/linux/libata.h +10 −6
drivers/ata/Kconfig+21−0
@@ -37,6 +37,9 @@ config ATA_NONSTANDARD · 36 unmodified lines
37config SATA_HOST37config SATA_HOST
38 bool38 bool
39 39
40config PATA_TIMINGS
41 bool
42
40config ATA_VERBOSE_ERROR43config ATA_VERBOSE_ERROR
41 bool "Verbose ATA error reporting"44 bool "Verbose ATA error reporting"
42 default y45 default y
@@ -51,6 +54,7 @@ config ATA_VERBOSE_ERROR · 8 unmodified lines
51config ATA_ACPI54config ATA_ACPI
52 bool "ATA ACPI Support"55 bool "ATA ACPI Support"
53 depends on ACPI56 depends on ACPI
57 select PATA_TIMINGS
54 default y58 default y
55 help59 help
56 This option adds support for ATA-related ACPI objects.60 This option adds support for ATA-related ACPI objects.
@@ -341,6 +345,7 @@ config PDC_ADMA · 284 unmodified lines
341config PATA_OCTEON_CF345config PATA_OCTEON_CF
342 tristate "OCTEON Boot Bus Compact Flash support"346 tristate "OCTEON Boot Bus Compact Flash support"
343 depends on CAVIUM_OCTEON_SOC347 depends on CAVIUM_OCTEON_SOC
348 select PATA_TIMINGS
344 help349 help
345 This option enables a polled compact flash driver for use with350 This option enables a polled compact flash driver for use with
346 compact flash cards attached to the OCTEON boot bus.351 compact flash cards attached to the OCTEON boot bus.
@@ -536,6 +541,7 @@ comment "PATA SFF controllers with BMDMA" · 189 unmodified lines
536config PATA_ALI541config PATA_ALI
537 tristate "ALi PATA support"542 tristate "ALi PATA support"
538 depends on PCI543 depends on PCI
544 select PATA_TIMINGS
539 help545 help
540 This option enables support for the ALi ATA interfaces546 This option enables support for the ALi ATA interfaces
541 found on the many ALi chipsets.547 found on the many ALi chipsets.
@@ -545,6 +551,7 @@ config PATA_ALI · 3 unmodified lines
545config PATA_AMD551config PATA_AMD
546 tristate "AMD/NVidia PATA support"552 tristate "AMD/NVidia PATA support"
547 depends on PCI553 depends on PCI
554 select PATA_TIMINGS
548 help555 help
549 This option enables support for the AMD and NVidia PATA556 This option enables support for the AMD and NVidia PATA
550 interfaces found on the chipsets for Athlon/Athlon64.557 interfaces found on the chipsets for Athlon/Athlon64.
@@ -579,6 +586,7 @@ config PATA_ATIIXP · 28 unmodified lines
579config PATA_ATP867X586config PATA_ATP867X
580 tristate "ARTOP/Acard ATP867X PATA support"587 tristate "ARTOP/Acard ATP867X PATA support"
581 depends on PCI588 depends on PCI
589 select PATA_TIMINGS
582 help590 help
583 This option enables support for ARTOP/Acard ATP867X PATA591 This option enables support for ARTOP/Acard ATP867X PATA
584 controllers.592 controllers.
@@ -588,6 +596,7 @@ config PATA_ATP867X · 3 unmodified lines
588config PATA_BK3710596config PATA_BK3710
589 tristate "Palmchip BK3710 PATA support"597 tristate "Palmchip BK3710 PATA support"
590 depends on ARCH_DAVINCI598 depends on ARCH_DAVINCI
599 select PATA_TIMINGS
591 help600 help
592 This option enables support for the integrated IDE controller on601 This option enables support for the integrated IDE controller on
593 the TI DaVinci SoC.602 the TI DaVinci SoC.
@@ -597,6 +606,7 @@ config PATA_BK3710 · 3 unmodified lines
597config PATA_CMD64X606config PATA_CMD64X
598 tristate "CMD64x PATA support"607 tristate "CMD64x PATA support"
599 depends on PCI608 depends on PCI
609 select PATA_TIMINGS
600 help610 help
601 This option enables support for the CMD64x series chips611 This option enables support for the CMD64x series chips
602 except for the CMD640.612 except for the CMD640.
@@ -642,6 +652,7 @@ config PATA_CS5536 · 39 unmodified lines
642config PATA_CYPRESS652config PATA_CYPRESS
643 tristate "Cypress CY82C693 PATA support (Very Experimental)"653 tristate "Cypress CY82C693 PATA support (Very Experimental)"
644 depends on PCI654 depends on PCI
655 select PATA_TIMINGS
645 help656 help
646 This option enables support for the Cypress/Contaq CY82C693657 This option enables support for the Cypress/Contaq CY82C693
647 chipset found in some Alpha systems658 chipset found in some Alpha systems
@@ -660,6 +671,7 @@ config PATA_EFAR · 12 unmodified lines
660config PATA_EP93XX671config PATA_EP93XX
661 tristate "Cirrus Logic EP93xx PATA support"672 tristate "Cirrus Logic EP93xx PATA support"
662 depends on ARCH_EP93XX673 depends on ARCH_EP93XX
674 select PATA_TIMINGS
663 help675 help
664 This option enables support for the PATA controller in676 This option enables support for the PATA controller in
665 the Cirrus Logic EP9312 and EP9315 ARM CPU.677 the Cirrus Logic EP9312 and EP9315 ARM CPU.
@@ -724,6 +736,7 @@ config PATA_HPT3X3_DMA · 58 unmodified lines
724config PATA_ICSIDE736config PATA_ICSIDE
725 tristate "Acorn ICS PATA support"737 tristate "Acorn ICS PATA support"
726 depends on ARM && ARCH_ACORN738 depends on ARM && ARCH_ACORN
739 select PATA_TIMINGS
727 help740 help
728 On Acorn systems, say Y here if you wish to use the ICS PATA741 On Acorn systems, say Y here if you wish to use the ICS PATA
729 interface card. This is not required for ICS partition support.742 interface card. This is not required for ICS partition support.
@@ -732,6 +745,7 @@ config PATA_ICSIDE · 2 unmodified lines
732config PATA_IMX745config PATA_IMX
733 tristate "PATA support for Freescale iMX"746 tristate "PATA support for Freescale iMX"
734 depends on ARCH_MXC747 depends on ARCH_MXC
748 select PATA_TIMINGS
735 help749 help
736 This option enables support for the PATA host available on Freescale750 This option enables support for the PATA host available on Freescale
737 iMX SoCs.751 iMX SoCs.
@@ -817,6 +831,7 @@ config PATA_NINJA32 · 79 unmodified lines
817config PATA_NS87415831config PATA_NS87415
818 tristate "Nat Semi NS87415 PATA support"832 tristate "Nat Semi NS87415 PATA support"
819 depends on PCI833 depends on PCI
834 select PATA_TIMINGS
820 help835 help
821 This option enables support for the National Semiconductor836 This option enables support for the National Semiconductor
822 NS87415 PCI-IDE controller.837 NS87415 PCI-IDE controller.
@@ -941,6 +956,7 @@ config PATA_TRIFLEX · 118 unmodified lines
941config PATA_VIA956config PATA_VIA
942 tristate "VIA PATA support"957 tristate "VIA PATA support"
943 depends on PCI958 depends on PCI
959 select PATA_TIMINGS
944 help960 help
945 This option enables support for the VIA PATA interfaces961 This option enables support for the VIA PATA interfaces
946 found on the many VIA chipsets.962 found on the many VIA chipsets.
@@ -974,6 +990,7 @@ comment "PIO-only SFF controllers" · 27 unmodified lines
974config PATA_CMD640_PCI990config PATA_CMD640_PCI
975 tristate "CMD640 PCI PATA support (Experimental)"991 tristate "CMD640 PCI PATA support (Experimental)"
976 depends on PCI992 depends on PCI
993 select PATA_TIMINGS
977 help994 help
978 This option enables support for the CMD640 PCI IDE995 This option enables support for the CMD640 PCI IDE
979 interface chip. Only the primary channel is currently996 interface chip. Only the primary channel is currently
@@ -1044,6 +1061,7 @@ config PATA_MPIIX · 64 unmodified lines
1044config PATA_NS874101061config PATA_NS87410
1045 tristate "Nat Semi NS87410 PATA support"1062 tristate "Nat Semi NS87410 PATA support"
1046 depends on PCI1063 depends on PCI
1064 select PATA_TIMINGS
1047 help1065 help
1048 This option enables support for the National Semiconductor1066 This option enables support for the National Semiconductor
1049 NS87410 PCI-IDE controller.1067 NS87410 PCI-IDE controller.
@@ -1124,6 +1142,7 @@ config PATA_RZ1000 · 74 unmodified lines
1124config PATA_SAMSUNG_CF1142config PATA_SAMSUNG_CF
1125 tristate "Samsung SoC PATA support"1143 tristate "Samsung SoC PATA support"
1126 depends on SAMSUNG_DEV_IDE1144 depends on SAMSUNG_DEV_IDE
1145 select PATA_TIMINGS
1127 help1146 help
1128 This option enables basic support for Samsung's S3C/S5P board1147 This option enables basic support for Samsung's S3C/S5P board
1129 PATA controllers via the new ATA layer1148 PATA controllers via the new ATA layer
@@ -1143,6 +1162,7 @@ comment "Generic fallback / legacy drivers" · 13 unmodified lines
1143config PATA_ACPI1162config PATA_ACPI
1144 tristate "ACPI firmware driver for PATA"1163 tristate "ACPI firmware driver for PATA"
1145 depends on ATA_ACPI && ATA_BMDMA && PCI1164 depends on ATA_ACPI && ATA_BMDMA && PCI
1165 select PATA_TIMINGS
1146 help1166 help
1147 This option enables an ACPI method driver which drives1167 This option enables an ACPI method driver which drives
1148 motherboard PATA controller interfaces through the ACPI1168 motherboard PATA controller interfaces through the ACPI
@@ -1162,6 +1182,7 @@ config ATA_GENERIC · 13 unmodified lines
1162config PATA_LEGACY1182config PATA_LEGACY
1163 tristate "Legacy ISA PATA support (Experimental)"1183 tristate "Legacy ISA PATA support (Experimental)"
1164 depends on (ISA || PCI)1184 depends on (ISA || PCI)
1185 select PATA_TIMINGS
1165 help1186 help
1166 This option enables support for ISA/VLB/PCI bus legacy PATA1187 This option enables support for ISA/VLB/PCI bus legacy PATA
1167 ports and allows them to be accessed via the new ATA layer.1188 ports and allows them to be accessed via the new ATA layer.
drivers/ata/Makefile+1−0
@@ -127,3 +127,4 @@ libata-$(CONFIG_ATA_SFF) += libata-sff.o · 126 unmodified lines
127libata-$(CONFIG_SATA_PMP) += libata-pmp.o127libata-$(CONFIG_SATA_PMP) += libata-pmp.o
128libata-$(CONFIG_ATA_ACPI) += libata-acpi.o128libata-$(CONFIG_ATA_ACPI) += libata-acpi.o
129libata-$(CONFIG_SATA_ZPODD) += libata-zpodd.o129libata-$(CONFIG_SATA_ZPODD) += libata-zpodd.o
130libata-$(CONFIG_PATA_TIMINGS) += libata-pata-timings.o
drivers/ata/libata-core.c+2−181
@@ -3204,187 +3204,7 @@ int sata_set_spd(struct ata_link *link) · 3203 unmodified lines
3204}3204}
3205EXPORT_SYMBOL_GPL(sata_set_spd);3205EXPORT_SYMBOL_GPL(sata_set_spd);
3206 3206
3207/*3207#ifdef CONFIG_ATA_ACPI
3208 * This mode timing computation functionality is ported over from
3209 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
3210 */
3211/*
3212 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
3213 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
3214 * for UDMA6, which is currently supported only by Maxtor drives.
3215 *
3216 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
3217 */
3218
3219static const struct ata_timing ata_timing[] = {
3220/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
3221 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
3222 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
3223 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
3224 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
3225 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
3226 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
3227 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
3228
3229 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
3230 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
3231 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
3232
3233 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
3234 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
3235 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
3236 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
3237 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
3238
3239/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
3240 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
3241 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
3242 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
3243 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
3244 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
3245 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
3246 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
3247
3248 { 0xFF }
3249};
3250
3251#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
3252#define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0)
3253
3254static void ata_timing_quantize(const struct ata_timing *t,
3255 struct ata_timing *q, int T, int UT)
3256{
3257 q->setup = EZ(t->setup, T);
3258 q->act8b = EZ(t->act8b, T);
3259 q->rec8b = EZ(t->rec8b, T);
3260 q->cyc8b = EZ(t->cyc8b, T);
3261 q->active = EZ(t->active, T);
3262 q->recover = EZ(t->recover, T);
3263 q->dmack_hold = EZ(t->dmack_hold, T);
3264 q->cycle = EZ(t->cycle, T);
3265 q->udma = EZ(t->udma, UT);
3266}
3267
3268void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
3269 struct ata_timing *m, unsigned int what)
3270{
3271 if (what & ATA_TIMING_SETUP)
3272 m->setup = max(a->setup, b->setup);
3273 if (what & ATA_TIMING_ACT8B)
3274 m->act8b = max(a->act8b, b->act8b);
3275 if (what & ATA_TIMING_REC8B)
3276 m->rec8b = max(a->rec8b, b->rec8b);
3277 if (what & ATA_TIMING_CYC8B)
3278 m->cyc8b = max(a->cyc8b, b->cyc8b);
3279 if (what & ATA_TIMING_ACTIVE)
3280 m->active = max(a->active, b->active);
3281 if (what & ATA_TIMING_RECOVER)
3282 m->recover = max(a->recover, b->recover);
3283 if (what & ATA_TIMING_DMACK_HOLD)
3284 m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
3285 if (what & ATA_TIMING_CYCLE)
3286 m->cycle = max(a->cycle, b->cycle);
3287 if (what & ATA_TIMING_UDMA)
3288 m->udma = max(a->udma, b->udma);
3289}
3290EXPORT_SYMBOL_GPL(ata_timing_merge);
3291
3292const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
3293{
3294 const struct ata_timing *t = ata_timing;
3295
3296 while (xfer_mode > t->mode)
3297 t++;
3298
3299 if (xfer_mode == t->mode)
3300 return t;
3301
3302 WARN_ONCE(true, "%s: unable to find timing for xfer_mode 0x%x\n",
3303 __func__, xfer_mode);
3304
3305 return NULL;
3306}
3307EXPORT_SYMBOL_GPL(ata_timing_find_mode);
3308
3309int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3310 struct ata_timing *t, int T, int UT)
3311{
3312 const u16 *id = adev->id;
3313 const struct ata_timing *s;
3314 struct ata_timing p;
3315
3316 /*
3317 * Find the mode.
3318 */
3319 s = ata_timing_find_mode(speed);
3320 if (!s)
3321 return -EINVAL;
3322
3323 memcpy(t, s, sizeof(*s));
3324
3325 /*
3326 * If the drive is an EIDE drive, it can tell us it needs extended
3327 * PIO/MW_DMA cycle timing.
3328 */
3329
3330 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
3331 memset(&p, 0, sizeof(p));
3332
3333 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
3334 if (speed <= XFER_PIO_2)
3335 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
3336 else if ((speed <= XFER_PIO_4) ||
3337 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
3338 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
3339 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
3340 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
3341
3342 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
3343 }
3344
3345 /*
3346 * Convert the timing to bus clock counts.
3347 */
3348
3349 ata_timing_quantize(t, t, T, UT);
3350
3351 /*
3352 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
3353 * S.M.A.R.T * and some other commands. We have to ensure that the
3354 * DMA cycle timing is slower/equal than the fastest PIO timing.
3355 */
3356
3357 if (speed > XFER_PIO_6) {
3358 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
3359 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
3360 }
3361
3362 /*
3363 * Lengthen active & recovery time so that cycle time is correct.
3364 */
3365
3366 if (t->act8b + t->rec8b < t->cyc8b) {
3367 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
3368 t->rec8b = t->cyc8b - t->act8b;
3369 }
3370
3371 if (t->active + t->recover < t->cycle) {
3372 t->active += (t->cycle - (t->active + t->recover)) / 2;
3373 t->recover = t->cycle - t->active;
3374 }
3375
3376 /*
3377 * In a few cases quantisation may produce enough errors to
3378 * leave t->cycle too low for the sum of active and recovery
3379 * if so we must correct this.
3380 */
3381 if (t->active + t->recover > t->cycle)
3382 t->cycle = t->active + t->recover;
3383
3384 return 0;
3385}
3386EXPORT_SYMBOL_GPL(ata_timing_compute);
3387
3388/**3208/**
3389 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration3209 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3390 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.3210 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
@@ -3435,6 +3255,7 @@ u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle) · 44 unmodified lines
3435 3255
3436 return last_mode;3256 return last_mode;
3437}3257}
3258#endif
3438 3259
3439/**3260/**
3440 * ata_down_xfermask_limit - adjust dev xfer masks downward3261 * ata_down_xfermask_limit - adjust dev xfer masks downward
drivers/ata/libata-pata-timings.c+192−0
@@ -0,0 +1,192 @@
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Helper library for PATA timings
4 *
5 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
6 * Copyright 2003-2004 Jeff Garzik
7 */
8
9#include <linux/kernel.h>
10#include <linux/module.h>
11#include <linux/libata.h>
12
13/*
14 * This mode timing computation functionality is ported over from
15 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
16 */
17/*
18 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
19 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
20 * for UDMA6, which is currently supported only by Maxtor drives.
21 *
22 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
23 */
24
25static const struct ata_timing ata_timing[] = {
26/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
27 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
28 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
29 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
30 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
31 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
32 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
33 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
34
35 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
36 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
37 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
38
39 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
40 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
41 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
42 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
43 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
44
45/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
46 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
47 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
48 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
49 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
50 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
51 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
52 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
53
54 { 0xFF }
55};
56
57#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
58#define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0)
59
60static void ata_timing_quantize(const struct ata_timing *t,
61 struct ata_timing *q, int T, int UT)
62{
63 q->setup = EZ(t->setup, T);
64 q->act8b = EZ(t->act8b, T);
65 q->rec8b = EZ(t->rec8b, T);
66 q->cyc8b = EZ(t->cyc8b, T);
67 q->active = EZ(t->active, T);
68 q->recover = EZ(t->recover, T);
69 q->dmack_hold = EZ(t->dmack_hold, T);
70 q->cycle = EZ(t->cycle, T);
71 q->udma = EZ(t->udma, UT);
72}
73
74void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
75 struct ata_timing *m, unsigned int what)
76{
77 if (what & ATA_TIMING_SETUP)
78 m->setup = max(a->setup, b->setup);
79 if (what & ATA_TIMING_ACT8B)
80 m->act8b = max(a->act8b, b->act8b);
81 if (what & ATA_TIMING_REC8B)
82 m->rec8b = max(a->rec8b, b->rec8b);
83 if (what & ATA_TIMING_CYC8B)
84 m->cyc8b = max(a->cyc8b, b->cyc8b);
85 if (what & ATA_TIMING_ACTIVE)
86 m->active = max(a->active, b->active);
87 if (what & ATA_TIMING_RECOVER)
88 m->recover = max(a->recover, b->recover);
89 if (what & ATA_TIMING_DMACK_HOLD)
90 m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
91 if (what & ATA_TIMING_CYCLE)
92 m->cycle = max(a->cycle, b->cycle);
93 if (what & ATA_TIMING_UDMA)
94 m->udma = max(a->udma, b->udma);
95}
96EXPORT_SYMBOL_GPL(ata_timing_merge);
97
98const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
99{
100 const struct ata_timing *t = ata_timing;
101
102 while (xfer_mode > t->mode)
103 t++;
104
105 if (xfer_mode == t->mode)
106 return t;
107
108 WARN_ONCE(true, "%s: unable to find timing for xfer_mode 0x%x\n",
109 __func__, xfer_mode);
110
111 return NULL;
112}
113EXPORT_SYMBOL_GPL(ata_timing_find_mode);
114
115int ata_timing_compute(struct ata_device *adev, unsigned short speed,
116 struct ata_timing *t, int T, int UT)
117{
118 const u16 *id = adev->id;
119 const struct ata_timing *s;
120 struct ata_timing p;
121
122 /*
123 * Find the mode.
124 */
125 s = ata_timing_find_mode(speed);
126 if (!s)
127 return -EINVAL;
128
129 memcpy(t, s, sizeof(*s));
130
131 /*
132 * If the drive is an EIDE drive, it can tell us it needs extended
133 * PIO/MW_DMA cycle timing.
134 */
135
136 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
137 memset(&p, 0, sizeof(p));
138
139 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
140 if (speed <= XFER_PIO_2)
141 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
142 else if ((speed <= XFER_PIO_4) ||
143 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
144 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
145 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
146 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
147
148 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
149 }
150
151 /*
152 * Convert the timing to bus clock counts.
153 */
154
155 ata_timing_quantize(t, t, T, UT);
156
157 /*
158 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
159 * S.M.A.R.T * and some other commands. We have to ensure that the
160 * DMA cycle timing is slower/equal than the fastest PIO timing.
161 */
162
163 if (speed > XFER_PIO_6) {
164 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
165 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
166 }
167
168 /*
169 * Lengthen active & recovery time so that cycle time is correct.
170 */
171
172 if (t->act8b + t->rec8b < t->cyc8b) {
173 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
174 t->rec8b = t->cyc8b - t->act8b;
175 }
176
177 if (t->active + t->recover < t->cycle) {
178 t->active += (t->cycle - (t->active + t->recover)) / 2;
179 t->recover = t->cycle - t->active;
180 }
181
182 /*
183 * In a few cases quantisation may produce enough errors to
184 * leave t->cycle too low for the sum of active and recovery
185 * if so we must correct this.
186 */
187 if (t->active + t->recover > t->cycle)
188 t->cycle = t->active + t->recover;
189
190 return 0;
191}
192EXPORT_SYMBOL_GPL(ata_timing_compute);
include/linux/libata.h+10−6
@@ -1205,12 +1205,6 @@ extern int ata_cable_unknown(struct ata_port *ap); · 1204 unmodified lines
1205 1205
1206/* Timing helpers */1206/* Timing helpers */
1207extern unsigned int ata_pio_need_iordy(const struct ata_device *);1207extern unsigned int ata_pio_need_iordy(const struct ata_device *);
1208extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode);
1209extern int ata_timing_compute(struct ata_device *, unsigned short,
1210 struct ata_timing *, int, int);
1211extern void ata_timing_merge(const struct ata_timing *,
1212 const struct ata_timing *, struct ata_timing *,
1213 unsigned int);
1214extern u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle);1208extern u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle);
1215 1209
1216/* PCI */1210/* PCI */
@@ -1807,6 +1801,16 @@ static inline int ata_dma_enabled(struct ata_device *adev) · 590 unmodified lines
1807 return (adev->dma_mode == 0xFF ? 0 : 1);1801 return (adev->dma_mode == 0xFF ? 0 : 1);
1808}1802}
1809 1803
1804/**************************************************************************
1805 * PATA timings - drivers/ata/libata-pata-timings.c
1806 */
1807extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode);
1808extern int ata_timing_compute(struct ata_device *, unsigned short,
1809 struct ata_timing *, int, int);
1810extern void ata_timing_merge(const struct ata_timing *,
1811 const struct ata_timing *, struct ata_timing *,
1812 unsigned int);
1813
1810/**************************************************************************1814/**************************************************************************
1811 * PMP - drivers/ata/libata-pmp.c1815 * PMP - drivers/ata/libata-pmp.c
1812 */1816 */