This just resets the dma_fence to NULL so it looks like it's never been signaled. This will be useful once we add the new wait API for allowing wait on "submit and signal" behavior. v2: - Take an array of sync objects (Dave Airlie) v3: - Throw -EINVAL if pad != 0
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| @@ -731,6 +731,12 @@ struct drm_syncobj_wait { · 730 unmodified lines | ||
| 731 | 731 | __u32 pad; |
| 732 | 732 | }; |
| 733 | 733 | |
| 734 | +struct drm_syncobj_array { | |
| 735 | + __u64 handles; | |
| 736 | + __u32 count_handles; | |
| 737 | + __u32 pad; | |
| 738 | +}; | |
| 739 | + | |
| 734 | 740 | #if defined(__cplusplus) |
| 735 | 741 | } |
| 736 | 742 | #endif |
| @@ -854,6 +860,7 @@ extern "C" { · 117 unmodified lines | ||
| 854 | 860 | #define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle) |
| 855 | 861 | #define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle) |
| 856 | 862 | #define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait) |
| 863 | +#define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array) | |
| 857 | 864 | |
| 858 | 865 | /** |
| 859 | 866 | * Device specific ioctls should only be in their respective headers |