Now that iop3xx and iop13xx are gone, the iop-adma driver no longer needs to deal with incompatible register layout defined in machine specific header files. Move the iop32x specific definitions into drivers/dma/iop-adma.h and the platform_data into include/linux/platform_data/dma-iop32x.h, and change the machine code to no longer reference those. The DMA0_ID/DMA1_ID/AAU_ID macros are required as part of the platform data interface and still need to be visible, so move those from one header to the other.
Unified · Split
| @@ -1,6 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | #ifndef IOP32X_ADMA_H | ||
| 3 | #define IOP32X_ADMA_H | ||
| 4 | #include <asm/hardware/iop3xx-adma.h> | ||
| 5 | #endif | ||
| 6 | |||
| @@ -6,8 +6,7 @@ · 5 unmodified lines | |||
| 6 | #include <linux/platform_device.h> | 6 | #include <linux/platform_device.h> |
| 7 | #include <asm/hardware/iop3xx.h> | 7 | #include <asm/hardware/iop3xx.h> |
| 8 | #include <linux/dma-mapping.h> | 8 | #include <linux/dma-mapping.h> |
| 9 | #include <mach/adma.h> | 9 | #include <linux/platform_data/dma-iop32x.h> |
| 10 | #include <asm/hardware/iop_adma.h> | ||
| 11 | 10 | ||
| 12 | #define IRQ_DMA0_EOT IRQ_IOP32X_DMA0_EOT | 11 | #define IRQ_DMA0_EOT IRQ_IOP32X_DMA0_EOT |
| 13 | #define IRQ_DMA0_EOC IRQ_IOP32X_DMA0_EOC | 12 | #define IRQ_DMA0_EOC IRQ_IOP32X_DMA0_EOC |
| @@ -294,8 +294,8 @@ config INTEL_IOATDMA · 293 unmodified lines | |||
| 294 | If unsure, say N. | 294 | If unsure, say N. |
| 295 | 295 | ||
| 296 | config INTEL_IOP_ADMA | 296 | config INTEL_IOP_ADMA |
| 297 | tristate "Intel IOP ADMA support" | 297 | tristate "Intel IOP32x ADMA support" |
| 298 | depends on ARCH_IOP32X | 298 | depends on ARCH_IOP32X || COMPILE_TEST |
| 299 | select DMA_ENGINE | 299 | select DMA_ENGINE |
| 300 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | 300 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 301 | help | 301 | help |
| @@ -22,8 +22,7 @@ · 21 unmodified lines | |||
| 22 | #include <linux/raid/pq.h> | 22 | #include <linux/raid/pq.h> |
| 23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
| 24 | 24 | ||
| 25 | #include <mach/adma.h> | 25 | #include "iop-adma.h" |
| 26 | |||
| 27 | #include "dmaengine.h" | 26 | #include "dmaengine.h" |
| 28 | 27 | ||
| 29 | #define to_iop_adma_chan(chan) container_of(chan, struct iop_adma_chan, common) | 28 | #define to_iop_adma_chan(chan) container_of(chan, struct iop_adma_chan, common) |
| @@ -6,8 +6,7 @@ · 5 unmodified lines | |||
| 6 | #define _ADMA_H | 6 | #define _ADMA_H |
| 7 | #include <linux/types.h> | 7 | #include <linux/types.h> |
| 8 | #include <linux/io.h> | 8 | #include <linux/io.h> |
| 9 | #include <mach/hardware.h> | 9 | #include <linux/platform_data/dma-iop32x.h> |
| 10 | #include <asm/hardware/iop_adma.h> | ||
| 11 | 10 | ||
| 12 | /* Memory copy units */ | 11 | /* Memory copy units */ |
| 13 | #define DMA_CCR(chan) (chan->mmr_base + 0x0) | 12 | #define DMA_CCR(chan) (chan->mmr_base + 0x0) |
| @@ -34,10 +33,6 @@ · 20 unmodified lines | |||
| 34 | #define AAU_EDCR1_IDX 17 | 33 | #define AAU_EDCR1_IDX 17 |
| 35 | #define AAU_EDCR2_IDX 26 | 34 | #define AAU_EDCR2_IDX 26 |
| 36 | 35 | ||
| 37 | #define DMA0_ID 0 | ||
| 38 | #define DMA1_ID 1 | ||
| 39 | #define AAU_ID 2 | ||
| 40 | |||
| 41 | struct iop3xx_aau_desc_ctrl { | 36 | struct iop3xx_aau_desc_ctrl { |
| 42 | unsigned int int_en:1; | 37 | unsigned int int_en:1; |
| 43 | unsigned int blk1_cmd_ctrl:3; | 38 | unsigned int blk1_cmd_ctrl:3; |
| @@ -17,6 +17,10 @@ · 16 unmodified lines | |||
| 17 | #endif | 17 | #endif |
| 18 | #define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x)) | 18 | #define iop_paranoia(x) BUG_ON(IOP_PARANOIA && (x)) |
| 19 | 19 | ||
| 20 | #define DMA0_ID 0 | ||
| 21 | #define DMA1_ID 1 | ||
| 22 | #define AAU_ID 2 | ||
| 23 | |||
| 20 | /** | 24 | /** |
| 21 | * struct iop_adma_device - internal representation of an ADMA device | 25 | * struct iop_adma_device - internal representation of an ADMA device |
| 22 | * @pdev: Platform device | 26 | * @pdev: Platform device |