Pull media updates from Mauro Carvalho Chehab: "This contains: - a new frontend/tuner driver set for si2168 and sa2157 - Videobuf 2 core now supports DVB too - A new gspca sub-driver (dtcs033) - saa7134 is now converted to use videobuf2 - add support for 4K timings - several other driver fixes and improvements PS. This pull request is shorter than usual, partly because I have some other patches on topic branches that I'll be sending you later this week" * 'v4l_for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (286 commits) [media] au0828-dvb: restore its permission to 644 [media] xc5000: delay tuner sleep to 5 seconds [media] xc5000: Don't use whitespace before tabs [media] xc5000: fix CamelCase [media] xc5000: Don't wrap msleep() [media] xc5000: get rid of positive error codes [media] au0828: reset streaming when a new frequency is set [media] au0828: Improve debug messages for urb_completion [media] au0828: Cancel stream-restart operation if frontend is disconnected [media] dib0700: fix RC support on Hauppauge Nova-TD [media] USB: as102_usb_drv.c: Remove useless return variables [media] v4l: Fix documentation of V4L2_PIX_FMT_H264_MVC and VP8 pixel formats [media] m5mols: Replace missing header [media] staging: lirc: Fix sparse warnings [media] fix mceusb endpoint type identification/handling [media] az6027: Added the PID for a new revision of the Elgato EyeTV Sat DVB-S Tuner [media] DocBook media: fix typo [media] adv7604: Add missing include to linux/types.h [media] v4l: Validate fields in the core code for subdev EDID ioctls [media] v4l: Add support for DV timings ioctls on subdev nodes ...
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| @@ -75,7 +75,7 @@ struct v4l2_edid { · 74 unmodified lines | ||
| 75 | 75 | __u32 start_block; |
| 76 | 76 | __u32 blocks; |
| 77 | 77 | __u32 reserved[5]; |
| 78 | − __u8 __user *edid; | |
| 78 | + __u8 *edid; | |
| 79 | 79 | }; |
| 80 | 80 | |
| 81 | 81 | #endif /* __V4L2_COMMON__ */ |
| @@ -173,6 +173,76 @@ · 172 unmodified lines | ||
| 173 | 173 | V4L2_DV_FL_CAN_REDUCE_FPS) \ |
| 174 | 174 | } |
| 175 | 175 | |
| 176 | +#define V4L2_DV_BT_CEA_3840X2160P24 { \ | |
| 177 | + .type = V4L2_DV_BT_656_1120, \ | |
| 178 | + V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 179 | + 297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 180 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 181 | +} | |
| 182 | + | |
| 183 | +#define V4L2_DV_BT_CEA_3840X2160P25 { \ | |
| 184 | + .type = V4L2_DV_BT_656_1120, \ | |
| 185 | + V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 186 | + 297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 187 | + V4L2_DV_BT_STD_CEA861, 0) \ | |
| 188 | +} | |
| 189 | + | |
| 190 | +#define V4L2_DV_BT_CEA_3840X2160P30 { \ | |
| 191 | + .type = V4L2_DV_BT_656_1120, \ | |
| 192 | + V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 193 | + 297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 194 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 195 | +} | |
| 196 | + | |
| 197 | +#define V4L2_DV_BT_CEA_3840X2160P50 { \ | |
| 198 | + .type = V4L2_DV_BT_656_1120, \ | |
| 199 | + V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 200 | + 594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 201 | + V4L2_DV_BT_STD_CEA861, 0) \ | |
| 202 | +} | |
| 203 | + | |
| 204 | +#define V4L2_DV_BT_CEA_3840X2160P60 { \ | |
| 205 | + .type = V4L2_DV_BT_656_1120, \ | |
| 206 | + V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 207 | + 594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 208 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 209 | +} | |
| 210 | + | |
| 211 | +#define V4L2_DV_BT_CEA_4096X2160P24 { \ | |
| 212 | + .type = V4L2_DV_BT_656_1120, \ | |
| 213 | + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 214 | + 297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \ | |
| 215 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 216 | +} | |
| 217 | + | |
| 218 | +#define V4L2_DV_BT_CEA_4096X2160P25 { \ | |
| 219 | + .type = V4L2_DV_BT_656_1120, \ | |
| 220 | + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 221 | + 297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ | |
| 222 | + V4L2_DV_BT_STD_CEA861, 0) \ | |
| 223 | +} | |
| 224 | + | |
| 225 | +#define V4L2_DV_BT_CEA_4096X2160P30 { \ | |
| 226 | + .type = V4L2_DV_BT_656_1120, \ | |
| 227 | + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 228 | + 297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ | |
| 229 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 230 | +} | |
| 231 | + | |
| 232 | +#define V4L2_DV_BT_CEA_4096X2160P50 { \ | |
| 233 | + .type = V4L2_DV_BT_656_1120, \ | |
| 234 | + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 235 | + 594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \ | |
| 236 | + V4L2_DV_BT_STD_CEA861, 0) \ | |
| 237 | +} | |
| 238 | + | |
| 239 | +#define V4L2_DV_BT_CEA_4096X2160P60 { \ | |
| 240 | + .type = V4L2_DV_BT_656_1120, \ | |
| 241 | + V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \ | |
| 242 | + 594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \ | |
| 243 | + V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_CAN_REDUCE_FPS) \ | |
| 244 | +} | |
| 245 | + | |
| 176 | 246 | |
| 177 | 247 | /* VESA Discrete Monitor Timings as per version 1.0, revision 12 */ |
| 178 | 248 | |
| @@ -52,7 +52,7 @@ enum v4l2_mbus_pixelcode { · 51 unmodified lines | ||
| 52 | 52 | V4L2_MBUS_FMT_RGB888_2X12_LE = 0x100c, |
| 53 | 53 | V4L2_MBUS_FMT_ARGB8888_1X32 = 0x100d, |
| 54 | 54 | |
| 55 | − /* YUV (including grey) - next is 0x2018 */ | |
| 55 | + /* YUV (including grey) - next is 0x2024 */ | |
| 56 | 56 | V4L2_MBUS_FMT_Y8_1X8 = 0x2001, |
| 57 | 57 | V4L2_MBUS_FMT_UV8_1X8 = 0x2015, |
| 58 | 58 | V4L2_MBUS_FMT_UYVY8_1_5X8 = 0x2002, |
| @@ -64,6 +64,8 @@ enum v4l2_mbus_pixelcode { · 5 unmodified lines | ||
| 64 | 64 | V4L2_MBUS_FMT_YUYV8_2X8 = 0x2008, |
| 65 | 65 | V4L2_MBUS_FMT_YVYU8_2X8 = 0x2009, |
| 66 | 66 | V4L2_MBUS_FMT_Y10_1X10 = 0x200a, |
| 67 | + V4L2_MBUS_FMT_UYVY10_2X10 = 0x2018, | |
| 68 | + V4L2_MBUS_FMT_VYUY10_2X10 = 0x2019, | |
| 67 | 69 | V4L2_MBUS_FMT_YUYV10_2X10 = 0x200b, |
| 68 | 70 | V4L2_MBUS_FMT_YVYU10_2X10 = 0x200c, |
| 69 | 71 | V4L2_MBUS_FMT_Y12_1X12 = 0x2013, |
| @@ -72,10 +74,20 @@ enum v4l2_mbus_pixelcode { · 2 unmodified lines | ||
| 72 | 74 | V4L2_MBUS_FMT_YUYV8_1X16 = 0x2011, |
| 73 | 75 | V4L2_MBUS_FMT_YVYU8_1X16 = 0x2012, |
| 74 | 76 | V4L2_MBUS_FMT_YDYUYDYV8_1X16 = 0x2014, |
| 77 | + V4L2_MBUS_FMT_UYVY10_1X20 = 0x201a, | |
| 78 | + V4L2_MBUS_FMT_VYUY10_1X20 = 0x201b, | |
| 75 | 79 | V4L2_MBUS_FMT_YUYV10_1X20 = 0x200d, |
| 76 | 80 | V4L2_MBUS_FMT_YVYU10_1X20 = 0x200e, |
| 77 | 81 | V4L2_MBUS_FMT_YUV10_1X30 = 0x2016, |
| 78 | 82 | V4L2_MBUS_FMT_AYUV8_1X32 = 0x2017, |
| 83 | + V4L2_MBUS_FMT_UYVY12_2X12 = 0x201c, | |
| 84 | + V4L2_MBUS_FMT_VYUY12_2X12 = 0x201d, | |
| 85 | + V4L2_MBUS_FMT_YUYV12_2X12 = 0x201e, | |
| 86 | + V4L2_MBUS_FMT_YVYU12_2X12 = 0x201f, | |
| 87 | + V4L2_MBUS_FMT_UYVY12_1X24 = 0x2020, | |
| 88 | + V4L2_MBUS_FMT_VYUY12_1X24 = 0x2021, | |
| 89 | + V4L2_MBUS_FMT_YUYV12_1X24 = 0x2022, | |
| 90 | + V4L2_MBUS_FMT_YVYU12_1X24 = 0x2023, | |
| 79 | 91 | |
| 80 | 92 | /* Bayer - next is 0x3019 */ |
| 81 | 93 | V4L2_MBUS_FMT_SBGGR8_1X8 = 0x3001, |
| @@ -151,26 +151,24 @@ struct v4l2_subdev_selection { · 150 unmodified lines | ||
| 151 | 151 | /* Backwards compatibility define --- to be removed */ |
| 152 | 152 | #define v4l2_subdev_edid v4l2_edid |
| 153 | 153 | |
| 154 | −#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format) | |
| 155 | −#define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format) | |
| 156 | −#define VIDIOC_SUBDEV_G_FRAME_INTERVAL \ | |
| 157 | − _IOWR('V', 21, struct v4l2_subdev_frame_interval) | |
| 158 | −#define VIDIOC_SUBDEV_S_FRAME_INTERVAL \ | |
| 159 | − _IOWR('V', 22, struct v4l2_subdev_frame_interval) | |
| 160 | −#define VIDIOC_SUBDEV_ENUM_MBUS_CODE \ | |
| 161 | − _IOWR('V', 2, struct v4l2_subdev_mbus_code_enum) | |
| 162 | −#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE \ | |
| 163 | − _IOWR('V', 74, struct v4l2_subdev_frame_size_enum) | |
| 164 | −#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL \ | |
| 165 | − _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum) | |
| 166 | −#define VIDIOC_SUBDEV_G_CROP _IOWR('V', 59, struct v4l2_subdev_crop) | |
| 167 | −#define VIDIOC_SUBDEV_S_CROP _IOWR('V', 60, struct v4l2_subdev_crop) | |
| 168 | −#define VIDIOC_SUBDEV_G_SELECTION \ | |
| 169 | − _IOWR('V', 61, struct v4l2_subdev_selection) | |
| 170 | −#define VIDIOC_SUBDEV_S_SELECTION \ | |
| 171 | − _IOWR('V', 62, struct v4l2_subdev_selection) | |
| 172 | −/* These two G/S_EDID ioctls are identical to the ioctls in videodev2.h */ | |
| 173 | −#define VIDIOC_SUBDEV_G_EDID _IOWR('V', 40, struct v4l2_edid) | |
| 174 | −#define VIDIOC_SUBDEV_S_EDID _IOWR('V', 41, struct v4l2_edid) | |
| 154 | +#define VIDIOC_SUBDEV_G_FMT _IOWR('V', 4, struct v4l2_subdev_format) | |
| 155 | +#define VIDIOC_SUBDEV_S_FMT _IOWR('V', 5, struct v4l2_subdev_format) | |
| 156 | +#define VIDIOC_SUBDEV_G_FRAME_INTERVAL _IOWR('V', 21, struct v4l2_subdev_frame_interval) | |
| 157 | +#define VIDIOC_SUBDEV_S_FRAME_INTERVAL _IOWR('V', 22, struct v4l2_subdev_frame_interval) | |
| 158 | +#define VIDIOC_SUBDEV_ENUM_MBUS_CODE _IOWR('V', 2, struct v4l2_subdev_mbus_code_enum) | |
| 159 | +#define VIDIOC_SUBDEV_ENUM_FRAME_SIZE _IOWR('V', 74, struct v4l2_subdev_frame_size_enum) | |
| 160 | +#define VIDIOC_SUBDEV_ENUM_FRAME_INTERVAL _IOWR('V', 75, struct v4l2_subdev_frame_interval_enum) | |
| 161 | +#define VIDIOC_SUBDEV_G_CROP _IOWR('V', 59, struct v4l2_subdev_crop) | |
| 162 | +#define VIDIOC_SUBDEV_S_CROP _IOWR('V', 60, struct v4l2_subdev_crop) | |
| 163 | +#define VIDIOC_SUBDEV_G_SELECTION _IOWR('V', 61, struct v4l2_subdev_selection) | |
| 164 | +#define VIDIOC_SUBDEV_S_SELECTION _IOWR('V', 62, struct v4l2_subdev_selection) | |
| 165 | +/* The following ioctls are identical to the ioctls in videodev2.h */ | |
| 166 | +#define VIDIOC_SUBDEV_G_EDID _IOWR('V', 40, struct v4l2_edid) | |
| 167 | +#define VIDIOC_SUBDEV_S_EDID _IOWR('V', 41, struct v4l2_edid) | |
| 168 | +#define VIDIOC_SUBDEV_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) | |
| 169 | +#define VIDIOC_SUBDEV_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) | |
| 170 | +#define VIDIOC_SUBDEV_ENUM_DV_TIMINGS _IOWR('V', 98, struct v4l2_enum_dv_timings) | |
| 171 | +#define VIDIOC_SUBDEV_QUERY_DV_TIMINGS _IOR('V', 99, struct v4l2_dv_timings) | |
| 172 | +#define VIDIOC_SUBDEV_DV_TIMINGS_CAP _IOWR('V', 100, struct v4l2_dv_timings_cap) | |
| 175 | 173 | |
| 176 | 174 | #endif |
| @@ -649,7 +649,6 @@ struct v4l2_plane { · 648 unmodified lines | ||
| 649 | 649 | * @length: size in bytes of the buffer (NOT its payload) for single-plane |
| 650 | 650 | * buffers (when type != *_MPLANE); number of elements in the |
| 651 | 651 | * planes array for multi-plane buffers |
| 652 | − * @input: input number from which the video data has has been captured | |
| 653 | 652 | * |
| 654 | 653 | * Contains data exchanged by application and driver using one of the Streaming |
| 655 | 654 | * I/O methods. |
| @@ -1107,12 +1106,15 @@ struct v4l2_dv_timings { · 451 unmodified lines | ||
| 1107 | 1106 | |
| 1108 | 1107 | /** struct v4l2_enum_dv_timings - DV timings enumeration |
| 1109 | 1108 | * @index: enumeration index |
| 1109 | + * @pad: the pad number for which to enumerate timings (used with | |
| 1110 | + * v4l-subdev nodes only) | |
| 1110 | 1111 | * @reserved: must be zeroed |
| 1111 | 1112 | * @timings: the timings for the given index |
| 1112 | 1113 | */ |
| 1113 | 1114 | struct v4l2_enum_dv_timings { |
| 1114 | 1115 | __u32 index; |
| 1115 | − __u32 reserved[3]; | |
| 1116 | + __u32 pad; | |
| 1117 | + __u32 reserved[2]; | |
| 1116 | 1118 | struct v4l2_dv_timings timings; |
| 1117 | 1119 | }; |
| 1118 | 1120 | |
| @@ -1150,11 +1152,14 @@ struct v4l2_bt_timings_cap { · 31 unmodified lines | ||
| 1150 | 1152 | |
| 1151 | 1153 | /** struct v4l2_dv_timings_cap - DV timings capabilities |
| 1152 | 1154 | * @type: the type of the timings (same as in struct v4l2_dv_timings) |
| 1155 | + * @pad: the pad number for which to query capabilities (used with | |
| 1156 | + * v4l-subdev nodes only) | |
| 1153 | 1157 | * @bt: the BT656/1120 timings capabilities |
| 1154 | 1158 | */ |
| 1155 | 1159 | struct v4l2_dv_timings_cap { |
| 1156 | 1160 | __u32 type; |
| 1157 | − __u32 reserved[3]; | |
| 1161 | + __u32 pad; | |
| 1162 | + __u32 reserved[2]; | |
| 1158 | 1163 | union { |
| 1159 | 1164 | struct v4l2_bt_timings_cap bt; |
| 1160 | 1165 | __u32 raw_data[32]; |
| @@ -1765,6 +1770,7 @@ struct v4l2_streamparm { · 604 unmodified lines | ||
| 1765 | 1770 | #define V4L2_EVENT_EOS 2 |
| 1766 | 1771 | #define V4L2_EVENT_CTRL 3 |
| 1767 | 1772 | #define V4L2_EVENT_FRAME_SYNC 4 |
| 1773 | +#define V4L2_EVENT_SOURCE_CHANGE 5 | |
| 1768 | 1774 | #define V4L2_EVENT_PRIVATE_START 0x08000000 |
| 1769 | 1775 | |
| 1770 | 1776 | /* Payload for V4L2_EVENT_VSYNC */ |
| @@ -1796,12 +1802,19 @@ struct v4l2_event_frame_sync { · 25 unmodified lines | ||
| 1796 | 1802 | __u32 frame_sequence; |
| 1797 | 1803 | }; |
| 1798 | 1804 | |
| 1805 | +#define V4L2_EVENT_SRC_CH_RESOLUTION (1 << 0) | |
| 1806 | + | |
| 1807 | +struct v4l2_event_src_change { | |
| 1808 | + __u32 changes; | |
| 1809 | +}; | |
| 1810 | + | |
| 1799 | 1811 | struct v4l2_event { |
| 1800 | 1812 | __u32 type; |
| 1801 | 1813 | union { |
| 1802 | 1814 | struct v4l2_event_vsync vsync; |
| 1803 | 1815 | struct v4l2_event_ctrl ctrl; |
| 1804 | 1816 | struct v4l2_event_frame_sync frame_sync; |
| 1817 | + struct v4l2_event_src_change src_change; | |
| 1805 | 1818 | __u8 data[64]; |
| 1806 | 1819 | } u; |
| 1807 | 1820 | __u32 pending; |