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drm/v3d: Add a CPU job submission

Create a new type of job, a CPU job. A CPU job is a type of job that performs operations that requires CPU intervention. The overall idea is to use user extensions to enable different types of CPU job, allowing the CPU job to perform different operations according to the type of user extension. The user extension ID identify the type of CPU job that must be dealt. Having a CPU job is interesting for synchronization purposes as a CPU job has a queue like any other V3D job and can be synchoronized by the multisync extension.

Melissa Wen committed 2 years ago

Commit aafc1a21 parent 464c61e5 files · +179 −1Browse files

Showing the changes to include/uapi/drm (1 of 5 files). Show all

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include/uapi/drm/v3d_drm.h+17−0
@@ -41,6 +41,7 @@ extern "C" { · 40 unmodified lines
41#define DRM_V3D_PERFMON_CREATE 0x0841#define DRM_V3D_PERFMON_CREATE 0x08
42#define DRM_V3D_PERFMON_DESTROY 0x0942#define DRM_V3D_PERFMON_DESTROY 0x09
43#define DRM_V3D_PERFMON_GET_VALUES 0x0a43#define DRM_V3D_PERFMON_GET_VALUES 0x0a
44#define DRM_V3D_SUBMIT_CPU 0x0b
44 45
45#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)46#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
46#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)47#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
@@ -56,6 +57,7 @@ extern "C" { · 9 unmodified lines
56 struct drm_v3d_perfmon_destroy)57 struct drm_v3d_perfmon_destroy)
57#define DRM_IOCTL_V3D_PERFMON_GET_VALUES DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_VALUES, \58#define DRM_IOCTL_V3D_PERFMON_GET_VALUES DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_PERFMON_GET_VALUES, \
58 struct drm_v3d_perfmon_get_values)59 struct drm_v3d_perfmon_get_values)
60#define DRM_IOCTL_V3D_SUBMIT_CPU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CPU, struct drm_v3d_submit_cpu)
59 61
60#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x0162#define DRM_V3D_SUBMIT_CL_FLUSH_CACHE 0x01
61#define DRM_V3D_SUBMIT_EXTENSION 0x0263#define DRM_V3D_SUBMIT_EXTENSION 0x02
@@ -93,6 +95,7 @@ enum v3d_queue { · 31 unmodified lines
93 V3D_TFU,95 V3D_TFU,
94 V3D_CSD,96 V3D_CSD,
95 V3D_CACHE_CLEAN,97 V3D_CACHE_CLEAN,
98 V3D_CPU,
96};99};
97 100
98/**101/**
@@ -276,6 +279,7 @@ enum drm_v3d_param { · 177 unmodified lines
276 DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH,279 DRM_V3D_PARAM_SUPPORTS_CACHE_FLUSH,
277 DRM_V3D_PARAM_SUPPORTS_PERFMON,280 DRM_V3D_PARAM_SUPPORTS_PERFMON,
278 DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT,281 DRM_V3D_PARAM_SUPPORTS_MULTISYNC_EXT,
282 DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE,
279};283};
280 284
281struct drm_v3d_get_param {285struct drm_v3d_get_param {
@@ -361,6 +365,19 @@ struct drm_v3d_submit_csd { · 79 unmodified lines
361 __u32 pad;365 __u32 pad;
362};366};
363 367
368struct drm_v3d_submit_cpu {
369 /* Pointer to a u32 array of the BOs that are referenced by the job. */
370 __u64 bo_handles;
371
372 /* Number of BO handles passed in (size is that times 4). */
373 __u32 bo_handle_count;
374
375 __u32 flags;
376
377 /* Pointer to an array of ioctl extensions*/
378 __u64 extensions;
379};
380
364enum {381enum {
365 V3D_PERFCNT_FEP_VALID_PRIMTS_NO_PIXELS,382 V3D_PERFCNT_FEP_VALID_PRIMTS_NO_PIXELS,
366 V3D_PERFCNT_FEP_VALID_PRIMS,383 V3D_PERFCNT_FEP_VALID_PRIMS,