Add callback function conv_clk_and_div_n to convert between SSC clock and its divider N. For rtl8411, the formula to calculate SSC clock divider N is different with the other card reader models.
Unified · Split
| @@ -178,6 +178,18 @@ static unsigned int rtl8411_cd_deglitch(struct rtsx_pcr *pcr) · 177 unmodified lines | ||
| 178 | 178 | return card_exist; |
| 179 | 179 | } |
| 180 | 180 | |
| 181 | +static int rtl8411_conv_clk_and_div_n(int input, int dir) | |
| 182 | +{ | |
| 183 | + int output; | |
| 184 | + | |
| 185 | + if (dir == CLK_TO_DIV_N) | |
| 186 | + output = input * 4 / 5 - 2; | |
| 187 | + else | |
| 188 | + output = (input + 2) * 5 / 4; | |
| 189 | + | |
| 190 | + return output; | |
| 191 | +} | |
| 192 | + | |
| 181 | 193 | static const struct pcr_ops rtl8411_pcr_ops = { |
| 182 | 194 | .extra_init_hw = rtl8411_extra_init_hw, |
| 183 | 195 | .optimize_phy = NULL, |
| @@ -189,6 +201,7 @@ static const struct pcr_ops rtl8411_pcr_ops = { · 5 unmodified lines | ||
| 189 | 201 | .card_power_off = rtl8411_card_power_off, |
| 190 | 202 | .switch_output_voltage = rtl8411_switch_output_voltage, |
| 191 | 203 | .cd_deglitch = rtl8411_cd_deglitch, |
| 204 | + .conv_clk_and_div_n = rtl8411_conv_clk_and_div_n, | |
| 192 | 205 | }; |
| 193 | 206 | |
| 194 | 207 | /* SD Pull Control Enable: |
| @@ -174,6 +174,7 @@ static const struct pcr_ops rts5209_pcr_ops = { · 173 unmodified lines | ||
| 174 | 174 | .card_power_off = rts5209_card_power_off, |
| 175 | 175 | .switch_output_voltage = rts5209_switch_output_voltage, |
| 176 | 176 | .cd_deglitch = NULL, |
| 177 | + .conv_clk_and_div_n = NULL, | |
| 177 | 178 | }; |
| 178 | 179 | |
| 179 | 180 | /* SD Pull Control Enable: |
| @@ -144,6 +144,7 @@ static const struct pcr_ops rts5229_pcr_ops = { · 143 unmodified lines | ||
| 144 | 144 | .card_power_off = rts5229_card_power_off, |
| 145 | 145 | .switch_output_voltage = rts5229_switch_output_voltage, |
| 146 | 146 | .cd_deglitch = NULL, |
| 147 | + .conv_clk_and_div_n = NULL, | |
| 147 | 148 | }; |
| 148 | 149 | |
| 149 | 150 | /* SD Pull Control Enable: |
| @@ -630,7 +630,10 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, · 629 unmodified lines | ||
| 630 | 630 | if (clk == pcr->cur_clock) |
| 631 | 631 | return 0; |
| 632 | 632 | |
| 633 | − N = (u8)(clk - 2); | |
| 633 | + if (pcr->ops->conv_clk_and_div_n) | |
| 634 | + N = (u8)pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); | |
| 635 | + else | |
| 636 | + N = (u8)(clk - 2); | |
| 634 | 637 | if ((clk <= 2) || (N > max_N)) |
| 635 | 638 | return -EINVAL; |
| 636 | 639 | |
| @@ -641,7 +644,14 @@ int rtsx_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, · 4 unmodified lines | ||
| 641 | 644 | /* Make sure that the SSC clock div_n is equal or greater than min_N */ |
| 642 | 645 | div = CLK_DIV_1; |
| 643 | 646 | while ((N < min_N) && (div < max_div)) { |
| 644 | − N = (N + 2) * 2 - 2; | |
| 647 | + if (pcr->ops->conv_clk_and_div_n) { | |
| 648 | + int dbl_clk = pcr->ops->conv_clk_and_div_n(N, | |
| 649 | + DIV_N_TO_CLK) * 2; | |
| 650 | + N = (u8)pcr->ops->conv_clk_and_div_n(dbl_clk, | |
| 651 | + CLK_TO_DIV_N); | |
| 652 | + } else { | |
| 653 | + N = (N + 2) * 2 - 2; | |
| 654 | + } | |
| 645 | 655 | div++; |
| 646 | 656 | } |
| 647 | 657 | dev_dbg(&(pcr->pci->dev), "N = %d, div = %d\n", N, div); |
| @@ -38,6 +38,9 @@ · 37 unmodified lines | ||
| 38 | 38 | #define RTSX_SD_CARD 0 |
| 39 | 39 | #define RTSX_MS_CARD 1 |
| 40 | 40 | |
| 41 | +#define CLK_TO_DIV_N 0 | |
| 42 | +#define DIV_N_TO_CLK 1 | |
| 43 | + | |
| 41 | 44 | struct platform_device; |
| 42 | 45 | |
| 43 | 46 | struct rtsx_slot { |
| @@ -704,6 +704,7 @@ struct pcr_ops { · 703 unmodified lines | ||
| 704 | 704 | int (*switch_output_voltage)(struct rtsx_pcr *pcr, |
| 705 | 705 | u8 voltage); |
| 706 | 706 | unsigned int (*cd_deglitch)(struct rtsx_pcr *pcr); |
| 707 | + int (*conv_clk_and_div_n)(int clk, int dir); | |
| 707 | 708 | }; |
| 708 | 709 | |
| 709 | 710 | enum PDEV_STAT {PDEV_STAT_IDLE, PDEV_STAT_RUN}; |