lael-labs/linux

CREDITS+4−0

 S: San Jose, California 95161-1311
 S: USA
+N: Hartmut Knaack
+E: knaack.h@gmx.de
+D: IIO subsystem and drivers
 N: Thorsten Knabe
 E: Thorsten Knabe <tek@rbg.informatik.tu-darmstadt.de>
 E: Thorsten Knabe <tek01@hrzpub.tu-darmstadt.de>

Documentation/ABI/testing/sysfs-bus-iio+62−28

 		buffered samples and events for device X.
 What:		/sys/bus/iio/devices/iio:deviceX/sampling_frequency
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency
 What:		/sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency
 What:		/sys/bus/iio/devices/triggerX/sampling_frequency
 KernelVersion:	2.6.35
 		resulting sampling frequency.  In many devices this
 		parameter has an effect on input filters etc. rather than
 		simply controlling when the input is sampled.  As this
-		effects data ready triggers, hardware buffers and the sysfs
+		affects data ready triggers, hardware buffers and the sysfs
 		direct access interfaces, it may be found in any of the
-		relevant directories.  If it effects all of the above
+		relevant directories.  If it affects all of the above
 		then it is to be found in the base device directory.
 What:		/sys/bus/iio/devices/iio:deviceX/sampling_frequency_available
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency_available
 What:		/sys/bus/iio/devices/iio:deviceX/in_proximity_sampling_frequency_available
 What:		/sys/.../iio:deviceX/buffer/sampling_frequency_available
 What:		/sys/bus/iio/devices/triggerX/sampling_frequency_available
 What:		/sys/bus/iio/devices/iio:deviceX/in_illuminance_scale
 What:		/sys/bus/iio/devices/iio:deviceX/in_countY_scale
 What:		/sys/bus/iio/devices/iio:deviceX/in_angl_scale
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_x_scale
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_y_scale
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_z_scale
 KernelVersion:	2.6.35
 Contact:	linux-iio@vger.kernel.org
 Description:
 		Hardware applied calibration offset (assumed to fix production
 		inaccuracies).
-What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_i_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltageY_q_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltage_i_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_i_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltage_q_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_q_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale
-What		/sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale
-what		/sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale
-what		/sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale
+What:		/sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale
 What:		/sys/bus/iio/devices/iio:deviceX/in_pressureY_calibscale
 What:		/sys/bus/iio/devices/iio:deviceX/in_pressure_calibscale
 What:		/sys/bus/iio/devices/iio:deviceX/in_illuminance_calibscale
 		If a discrete set of scale values is available, they
 		are listed in this attribute.
-What		/sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain
+What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_hardwaregain
 What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_red_hardwaregain
 What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_green_hardwaregain
 What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_blue_hardwaregain
 		Hardware applied gain factor. If shared across all channels,
 		<type>_hardwaregain is used.
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_hardwaregain_available
+KernelVersion:	5.10
+Contact:	linux-iio@vger.kernel.org
+Description:
+		Lists all available hardware applied gain factors. Shared across all
+		channels.
 What:		/sys/.../in_accel_filter_low_pass_3db_frequency
 What:		/sys/.../in_magn_filter_low_pass_3db_frequency
 What:		/sys/.../in_anglvel_filter_low_pass_3db_frequency
 What:		/sys/.../events/in_tempY_raw_thresh_rising_value
 What:		/sys/.../events/in_tempY_raw_thresh_falling_value
 What:		/sys/.../events/in_illuminance0_thresh_falling_value
-what:		/sys/.../events/in_illuminance0_thresh_rising_value
+What:		/sys/.../events/in_illuminance0_thresh_rising_value
-what:		/sys/.../events/in_proximity0_thresh_falling_value
+What:		/sys/.../events/in_proximity0_thresh_falling_value
-what:		/sys/.../events/in_proximity0_thresh_rising_value
+What:		/sys/.../events/in_proximity0_thresh_rising_value
 What:		/sys/.../events/in_illuminance_thresh_rising_value
 What:		/sys/.../events/in_illuminance_thresh_falling_value
 KernelVersion:	2.6.37
 What:		/sys/.../events/in_tempY_thresh_falling_hysteresis
 What:		/sys/.../events/in_tempY_thresh_either_hysteresis
 What:		/sys/.../events/in_illuminance0_thresh_falling_hysteresis
-what:		/sys/.../events/in_illuminance0_thresh_rising_hysteresis
+What:		/sys/.../events/in_illuminance0_thresh_rising_hysteresis
-what:		/sys/.../events/in_illuminance0_thresh_either_hysteresis
+What:		/sys/.../events/in_illuminance0_thresh_either_hysteresis
-what:		/sys/.../events/in_proximity0_thresh_falling_hysteresis
+What:		/sys/.../events/in_proximity0_thresh_falling_hysteresis
-what:		/sys/.../events/in_proximity0_thresh_rising_hysteresis
+What:		/sys/.../events/in_proximity0_thresh_rising_hysteresis
-what:		/sys/.../events/in_proximity0_thresh_either_hysteresis
+What:		/sys/.../events/in_proximity0_thresh_either_hysteresis
 KernelVersion:	3.13
 Contact:	linux-iio@vger.kernel.org
 Description:
 KernelVersion:	3.19
 Contact:	linux-iio@vger.kernel.org
 Description:
-		Enables or disables activitity events. Depending on direction
+		Enables or disables activity events. Depending on direction
 		an event is generated when sensor ENTERS or LEAVES a given state.
 What:		/sys/.../events/in_activity_still_thresh_rising_value
 		standardised CIE Erythemal Action Spectrum. UV index values range
 		from 0 (low) to >=11 (extreme).
+What:		/sys/.../iio:deviceX/in_intensity_integration_time
 What:		/sys/.../iio:deviceX/in_intensity_red_integration_time
 What:		/sys/.../iio:deviceX/in_intensity_green_integration_time
 What:		/sys/.../iio:deviceX/in_intensity_blue_integration_time
 Contact:	linux-iio@vger.kernel.org
 Description:
 		This attribute is used to get/set the integration time in
-		seconds.
+		seconds. If shared across all channels of a given type,
+		<type>_integration_time is used.
 What:		/sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_integration_time
 KernelVersion:	4.0
 What:		/sys/bus/iio/devices/iio:deviceX/in_concentrationX_ethanol_raw
 What:		/sys/bus/iio/devices/iio:deviceX/in_concentration_h2_raw
 What:		/sys/bus/iio/devices/iio:deviceX/in_concentrationX_h2_raw
+What:		/sys/bus/iio/devices/iio:deviceX/in_concentration_o2_raw
+What:		/sys/bus/iio/devices/iio:deviceX/in_concentrationX_o2_raw
 What:		/sys/bus/iio/devices/iio:deviceX/in_concentration_voc_raw
 What:		/sys/bus/iio/devices/iio:deviceX/in_concentrationX_voc_raw
 KernelVersion:	4.3
 Contact:	linux-iio@vger.kernel.org
 Description:
 		One of the following thermocouple types: B, E, J, K, N, R, S, T.
+What:		/sys/bus/iio/devices/iio:deviceX/in_temp_object_calibambient
+What:		/sys/bus/iio/devices/iio:deviceX/in_tempX_object_calibambient
+KernelVersion:	5.10
+Contact:	linux-iio@vger.kernel.org
+Description:
+		Calibrated ambient temperature for object temperature
+		calculation in milli degrees Celsius.
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_x_raw
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_y_raw
+What:		/sys/bus/iio/devices/iio:deviceX/in_intensity_z_raw
+KernelVersion:	5.10
+Contact:	linux-iio@vger.kernel.org
+Description:
+		Unscaled light intensity according to CIE 1931/DIN 5033 color space.
+		Units after application of scale are nano nanowatts per square meter.

Documentation/ABI/testing/sysfs-bus-iio-accel-adxl372+7−0

@@ -0,0 +1,7 @@
	1	What: /sys/bus/iio/devices/triggerX/name = "adxl372-devX-peak"
	2	KernelVersion:
	3	Contact: linux-iio@vger.kernel.org
	4	Description:
	5	The adxl372 accelerometer kernel module provides an additional trigger,
	6	which sets the device in a mode in which it will record only the peak acceleration
	7	sensed over the set period of time in the events sysfs.

Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc2010+9−0

@@ -0,0 +1,9 @@
	1	What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw
	2	What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw_available
	3	KernelVersion: 5.3.8
	4	Contact: linux-iio@vger.kernel.org
	5	Description:
	6	Controls the heater device within the humidity sensor to get
	7	rid of excess condensation.
	8
	9	Valid control values are 0 = OFF, and 1 = ON.

Documentation/ABI/testing/sysfs-bus-iio-light-tsl2772renamed from drivers/staging/iio/Documentation/light/sysfs-bus-iio-light-tsl2x7x+0−0

File renamed without changes.

Documentation/devicetree/bindings/iio/adc/ad7949.txt+0−16

@@ -1,16 +0,0 @@
1	* Analog Devices AD7949/AD7682/AD7689
2
3	Required properties:
4	- compatible: Should be one of
5	* "adi,ad7949"
6	* "adi,ad7682"
7	* "adi,ad7689"
8	- reg: spi chip select number for the device
9	- vref-supply: The regulator supply for ADC reference voltage
10
11	Example:
12	adc@0 {
13	compatible = "adi,ad7949";
14	reg = <0>;
15	vref-supply = <&vdd_supply>;
16	};

Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml+46−0

@@ -0,0 +1,46 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/adi,ad7291.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor
	8
	9	maintainers:
	10	- Michael Auchter <michael.auchter@ni.com>
	11
	12	description: \|
	13	Analog Devices AD7291 8-Channel I2C 12-Bit SAR ADC with Temperature Sensor
	14	https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- adi,ad7291
	20
	21	reg:
	22	maxItems: 1
	23
	24	vref-supply:
	25	description: \|
	26	The regulator supply for ADC reference voltage.
	27
	28	required:
	29	- compatible
	30	- reg
	31
	32	additionalProperties: false
	33
	34	examples:
	35	- \|
	36	i2c {
	37	#address-cells = <1>;
	38	#size-cells = <0>;
	39
	40	ad7291: adc@0 {
	41	compatible = "adi,ad7291";
	42	reg = <0>;
	43	vref-supply = <&adc_vref>;
	44	};
	45	};
	46	...

Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt+0−41

@@ -1,41 +0,0 @@
1	Analog Devices AD7768-1 ADC device driver
2
3	Required properties for the AD7768-1:
4
5	- compatible: Must be "adi,ad7768-1"
6	- reg: SPI chip select number for the device
7	- spi-max-frequency: Max SPI frequency to use
8	see: Documentation/devicetree/bindings/spi/spi-bus.txt
9	- clocks: phandle to the master clock (mclk)
10	see: Documentation/devicetree/bindings/clock/clock-bindings.txt
11	- clock-names: Must be "mclk".
12	- interrupts: IRQ line for the ADC
13	see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
14	- vref-supply: vref supply can be used as reference for conversion
15	- adi,sync-in-gpios: must be the device tree identifier of the SYNC-IN pin. Enables
16	synchronization of multiple devices that require simultaneous sampling.
17	A pulse is always required if the configuration is changed in any way, for example
18	if the filter decimation rate changes. As the line is active low, it should
19	be marked GPIO_ACTIVE_LOW.
20
21	Optional properties:
22
23	- reset-gpios : GPIO spec for the RESET pin. If specified, it will be asserted during
24	driver probe. As the line is active low, it should be marked GPIO_ACTIVE_LOW.
25
26	Example:
27
28	adc@0 {
29	compatible = "adi,ad7768-1";
30	reg = <0>;
31	spi-max-frequency = <2000000>;
32	spi-cpol;
33	spi-cpha;
34	vref-supply = <&adc_vref>;
35	interrupts = <25 IRQ_TYPE_EDGE_RISING>;
36	interrupt-parent = <&gpio>;
37	adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
38	reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
39	clocks = <&ad7768_mclk>;
40	clock-names = "mclk";
41	};

Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml+89−0

@@ -0,0 +1,89 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Analog Devices AD7768-1 ADC device driver
	8
	9	maintainers:
	10	- Michael Hennerich <michael.hennerich@analog.com>
	11
	12	description: \|
	13	Datasheet at:
	14	https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
	15
	16	properties:
	17	compatible:
	18	const: adi,ad7768-1
	19
	20	reg:
	21	maxItems: 1
	22
	23	clocks:
	24	maxItems: 1
	25
	26	clock-names:
	27	const: mclk
	28
	29	interrupts:
	30	maxItems: 1
	31
	32	vref-supply:
	33	description:
	34	ADC reference voltage supply
	35
	36	adi,sync-in-gpios:
	37	description:
	38	Enables synchronization of multiple devices that require simultaneous
	39	sampling. A pulse is always required if the configuration is changed
	40	in any way, for example if the filter decimation rate changes.
	41	As the line is active low, it should be marked GPIO_ACTIVE_LOW.
	42
	43	reset-gpios:
	44	maxItems: 1
	45
	46	spi-max-frequency: true
	47
	48	spi-cpol: true
	49	spi-cpha : true
	50
	51	"#io-channel-cells":
	52	const: 1
	53
	54	required:
	55	- compatible
	56	- reg
	57	- clocks
	58	- clock-names
	59	- vref-supply
	60	- spi-cpol
	61	- spi-cpha
	62	- adi,sync-in-gpios
	63
	64	additionalProperties: false
	65
	66	examples:
	67	- \|
	68	#include <dt-bindings/interrupt-controller/irq.h>
	69	#include <dt-bindings/gpio/gpio.h>
	70	spi {
	71	#address-cells = <1>;
	72	#size-cells = <0>;
	73
	74	adc@0 {
	75	compatible = "adi,ad7768-1";
	76	reg = <0>;
	77	spi-max-frequency = <2000000>;
	78	spi-cpol;
	79	spi-cpha;
	80	vref-supply = <&adc_vref>;
	81	interrupts = <25 IRQ_TYPE_EDGE_RISING>;
	82	interrupt-parent = <&gpio>;
	83	adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
	84	reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
	85	clocks = <&ad7768_mclk>;
	86	clock-names = "mclk";
	87	};
	88	};
	89	...

Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml+57−0

@@ -0,0 +1,57 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/adi,ad7949.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Analog Devices AD7949/AD7682/AD7689 analog to digital converters
	8
	9	maintainers:
	10	- Charles-Antoine Couret <charles-antoine.couret@essensium.com>
	11
	12	description: \|
	13	Specifications on the converters can be found at:
	14	AD7949:
	15	https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf
	16	AD7682/AD7698:
	17	https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf
	18
	19	properties:
	20	compatible:
	21	enum:
	22	- adi,ad7682
	23	- adi,ad7689
	24	- adi,ad7949
	25
	26	reg:
	27	maxItems: 1
	28
	29	vref-supply:
	30	description:
	31	ADC reference voltage supply
	32
	33	spi-max-frequency: true
	34
	35	"#io-channel-cells":
	36	const: 1
	37
	38	required:
	39	- compatible
	40	- reg
	41	- vref-supply
	42
	43	additionalProperties: false
	44
	45	examples:
	46	- \|
	47	spi {
	48	#address-cells = <1>;
	49	#size-cells = <0>;
	50
	51	adc@0 {
	52	compatible = "adi,ad7949";
	53	reg = <0>;
	54	vref-supply = <&vdd_supply>;
	55	};
	56	};
	57	...

Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml+12−3

 $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Analog Devices AD9467 High-Speed ADC
+title: Analog Devices AD9467 and similar High-Speed ADCs
 maintainers:
   - Michael Hennerich <michael.hennerich@analog.com>
   - Alexandru Ardelean <alexandru.ardelean@analog.com>
 description: |
-  The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital
+  The AD9467 and the parts similar with it, are high-speed analog-to-digital
-  converter (ADC).
+  converters (ADCs), operating in the range of 100 to 500 mega samples
+  per second (MSPS). Some parts support higher MSPS and some
+  lower MSPS, suitable for the intended application of each part.
+  All the parts support the register map described by Application Note AN-877
+   https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
+  https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
+  https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
   https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf
 properties:
   compatible:
     enum:
+      - adi,ad9265
+      - adi,ad9434
       - adi,ad9467
   reg:

Documentation/devicetree/bindings/iio/adc/ads1015.txt+0−73

@@ -1,73 +0,0 @@
1	ADS1015 (I2C)
2
3	This device is a 12-bit A-D converter with 4 inputs.
4
5	The inputs can be used single ended or in certain differential combinations.
6
7	For configuration all possible combinations are mapped to 8 channels:
8	0: Voltage over AIN0 and AIN1.
9	1: Voltage over AIN0 and AIN3.
10	2: Voltage over AIN1 and AIN3.
11	3: Voltage over AIN2 and AIN3.
12	4: Voltage over AIN0 and GND.
13	5: Voltage over AIN1 and GND.
14	6: Voltage over AIN2 and GND.
15	7: Voltage over AIN3 and GND.
16
17	Each channel can be configured individually:
18	- pga is the programmable gain amplifier (values are full scale)
19	0: +/- 6.144 V
20	1: +/- 4.096 V
21	2: +/- 2.048 V (default)
22	3: +/- 1.024 V
23	4: +/- 0.512 V
24	5: +/- 0.256 V
25	- data_rate in samples per second
26	0: 128
27	1: 250
28	2: 490
29	3: 920
30	4: 1600 (default)
31	5: 2400
32	6: 3300
33
34	1) The /ads1015 node
35
36	Required properties:
37
38	- compatible : must be "ti,ads1015"
39	- reg : I2C bus address of the device
40	- #address-cells : must be <1>
41	- #size-cells : must be <0>
42
43	The node contains child nodes for each channel that the platform uses.
44
45	Example ADS1015 node:
46
47	ads1015@49 {
48	compatible = "ti,ads1015";
49	reg = <0x49>;
50	#address-cells = <1>;
51	#size-cells = <0>;
52
53	[ child node definitions... ]
54	}
55
56	2) channel nodes
57
58	Required properties:
59
60	- reg : the channel number
61
62	Optional properties:
63
64	- ti,gain : the programmable gain amplifier setting
65	- ti,datarate : the converter data rate
66
67	Example ADS1015 channel node:
68
69	channel@4 {
70	reg = <4>;
71	ti,gain = <3>;
72	ti,datarate = <5>;
73	};

Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt+0−48

@@ -1,48 +0,0 @@
1	* Amlogic Meson SAR (Successive Approximation Register) A/D converter
2
3	Required properties:
4	- compatible: depending on the SoC this should be one of:
5	- "amlogic,meson8-saradc" for Meson8
6	- "amlogic,meson8b-saradc" for Meson8b
7	- "amlogic,meson8m2-saradc" for Meson8m2
8	- "amlogic,meson-gxbb-saradc" for GXBB
9	- "amlogic,meson-gxl-saradc" for GXL
10	- "amlogic,meson-gxm-saradc" for GXM
11	- "amlogic,meson-axg-saradc" for AXG
12	- "amlogic,meson-g12a-saradc" for AXG
13	along with the generic "amlogic,meson-saradc"
14	- reg: the physical base address and length of the registers
15	- interrupts: the interrupt indicating end of sampling
16	- clocks: phandle and clock identifier (see clock-names)
17	- clock-names: mandatory clocks:
18	- "clkin" for the reference clock (typically XTAL)
19	- "core" for the SAR ADC core clock
20	optional clocks:
21	- "adc_clk" for the ADC (sampling) clock
22	- "adc_sel" for the ADC (sampling) clock mux
23	- vref-supply: the regulator supply for the ADC reference voltage
24	- #io-channel-cells: must be 1, see ../iio-bindings.txt
25
26	Optional properties:
27	- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit
28	of the TSC (temperature sensor coefficient) on
29	Meson8b and Meson8m2 (which used to calibrate the
30	temperature sensor)
31	- nvmem-cells: phandle to the temperature_calib eFuse cells
32	- nvmem-cell-names: if present (to enable the temperature sensor
33	calibration) this must contain "temperature_calib"
34
35
36	Example:
37	saradc: adc@8680 {
38	compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
39	#io-channel-cells = <1>;
40	reg = <0x0 0x8680 0x0 0x34>;
41	interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
42	clocks = <&xtal>,
43	<&clkc CLKID_SAR_ADC>,
44	<&clkc CLKID_SANA>,
45	<&clkc CLKID_SAR_ADC_CLK>,
46	<&clkc CLKID_SAR_ADC_SEL>;
47	clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel";
48	};

Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml+149−0

@@ -0,0 +1,149 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Amlogic Meson SAR (Successive Approximation Register) A/D converter
	8
	9	maintainers:
	10	- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
	11
	12	description:
	13	Binding covers a range of ADCs found on Amlogic Meson SoCs.
	14
	15	properties:
	16	compatible:
	17	oneOf:
	18	- const: amlogic,meson-saradc
	19	- items:
	20	- enum:
	21	- amlogic,meson8-saradc
	22	- amlogic,meson8b-saradc
	23	- amlogic,meson8m2-saradc
	24	- amlogic,meson-gxbb-saradc
	25	- amlogic,meson-gxl-saradc
	26	- amlogic,meson-gxm-saradc
	27	- amlogic,meson-axg-saradc
	28	- amlogic,meson-g12a-saradc
	29	- const: amlogic,meson-saradc
	30
	31	reg:
	32	maxItems: 1
	33
	34	interrupts:
	35	description: Interrupt indicates end of sampling.
	36	maxItems: 1
	37
	38	clocks:
	39	minItems: 2
	40	maxItems: 4
	41
	42	clock-names:
	43	minItems: 2
	44	maxItems: 4
	45	items:
	46	- const: clkin
	47	- const: core
	48	- const: adc_clk
	49	- const: adc_sel
	50
	51	vref-supply: true
	52
	53	"#io-channel-cells":
	54	const: 1
	55
	56	amlogic,hhi-sysctrl:
	57	$ref: /schemas/types.yaml#/definitions/phandle
	58	description:
	59	Syscon which contains the 5th bit of the TSC (temperature sensor
	60	coefficient) on Meson8b and Meson8m2 (which used to calibrate the
	61	temperature sensor)
	62
	63	nvmem-cells:
	64	description: phandle to the temperature_calib eFuse cells
	65	maxItems: 1
	66
	67	nvmem-cell-names:
	68	const: temperature_calib
	69
	70	allOf:
	71	- if:
	72	properties:
	73	compatible:
	74	contains:
	75	enum:
	76	- amlogic,meson8-saradc
	77	- amlogic,meson8b-saradc
	78	- amlogic,meson8m2-saradc
	79	then:
	80	properties:
	81	clocks:
	82	maxItems: 2
	83	clock-names:
	84	maxItems: 2
	85	else:
	86	properties:
	87	nvmem-cells: false
	88	mvmem-cel-names: false
	89	clocks:
	90	minItems: 4
	91	clock-names:
	92	minItems: 4
	93
	94	- if:
	95	properties:
	96	compatible:
	97	contains:
	98	enum:
	99	- amlogic,meson8b-saradc
	100	- amlogic,meson8m2-saradc
	101	then:
	102	properties:
	103	amlogic,hhi-sysctrl: true
	104	else:
	105	properties:
	106	amlogic,hhi-sysctrl: false
	107
	108	required:
	109	- compatible
	110	- reg
	111	- interrupts
	112	- clocks
	113	- clock-names
	114	- "#io-channel-cells"
	115
	116	additionalProperties: false
	117
	118	examples:
	119	- \|
	120	#include <dt-bindings/interrupt-controller/irq.h>
	121	#include <dt-bindings/clock/gxbb-clkc.h>
	122	#include <dt-bindings/interrupt-controller/arm-gic.h>
	123	soc {
	124	#address-cells = <2>;
	125	#size-cells = <2>;
	126	adc@8680 {
	127	compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
	128	#io-channel-cells = <1>;
	129	reg = <0x0 0x8680 0x0 0x34>;
	130	interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
	131	clocks = <&xtal>,
	132	<&clkc CLKID_SAR_ADC>,
	133	<&clkc CLKID_SAR_ADC_CLK>,
	134	<&clkc CLKID_SAR_ADC_SEL>;
	135	clock-names = "clkin", "core", "adc_clk", "adc_sel";
	136	};
	137	adc@9680 {
	138	compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
	139	#io-channel-cells = <1>;
	140	reg = <0x0 0x9680 0x0 0x34>;
	141	interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
	142	clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
	143	clock-names = "clkin", "core";
	144	nvmem-cells = <&tsens_caldata>;
	145	nvmem-cell-names = "temperature_calib";
	146	amlogic,hhi-sysctrl = <&hhi>;
	147	};
	148	};
	149	...

Documentation/devicetree/bindings/iio/adc/aspeed,ast2400-adc.yaml+55−0

@@ -0,0 +1,55 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: ADC that forms part of an ASPEED server management processor.
	8
	9	maintainers:
	10	- Joel Stanley <joel@jms.id.au>
	11
	12	description:
	13	This device is a 10-bit converter for 16 voltage channels. All inputs are
	14	single ended.
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- aspeed,ast2400-adc
	20	- aspeed,ast2500-adc
	21
	22	reg:
	23	maxItems: 1
	24
	25	clocks:
	26	description:
	27	Input clock used to derive the sample clock. Expected to be the
	28	SoC's APB clock.
	29
	30	resets:
	31	maxItems: 1
	32
	33	"#io-channel-cells":
	34	const: 1
	35
	36	required:
	37	- compatible
	38	- reg
	39	- clocks
	40	- resets
	41	- "#io-channel-cells"
	42
	43	additionalProperties: false
	44
	45	examples:
	46	- \|
	47	#include <dt-bindings/clock/aspeed-clock.h>
	48	adc@1e6e9000 {
	49	compatible = "aspeed,ast2400-adc";
	50	reg = <0x1e6e9000 0xb0>;
	51	clocks = <&syscon ASPEED_CLK_APB>;
	52	resets = <&syscon ASPEED_RESET_ADC>;
	53	#io-channel-cells = <1>;
	54	};
	55	...

Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt+0−22

@@ -1,22 +0,0 @@
1	Aspeed ADC
2
3	This device is a 10-bit converter for 16 voltage channels. All inputs are
4	single ended.
5
6	Required properties:
7	- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc"
8	- reg: memory window mapping address and length
9	- clocks: Input clock used to derive the sample clock. Expected to be the
10	SoC's APB clock.
11	- resets: Reset controller phandle
12	- #io-channel-cells: Must be set to <1> to indicate channels are selected
13	by index.
14
15	Example:
16	adc@1e6e9000 {
17	compatible = "aspeed,ast2400-adc";
18	reg = <0x1e6e9000 0xb0>;
19	clocks = <&syscon ASPEED_CLK_APB>;
20	resets = <&syscon ASPEED_RESET_ADC>;
21	#io-channel-cells = <1>;
22	};

Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt+0−19

@@ -1,19 +0,0 @@
1	* Berlin Analog to Digital Converter (ADC)
2
3	The Berlin ADC has 8 channels, with one connected to a temperature sensor.
4	It is part of the system controller register set. The ADC node should be a
5	sub-node of the system controller node.
6
7	Required properties:
8	- compatible: must be "marvell,berlin2-adc"
9	- interrupts: the interrupts for the ADC and the temperature sensor
10	- interrupt-names: should be "adc" and "tsen"
11
12	Example:
13
14	adc: adc {
15	compatible = "marvell,berlin2-adc";
16	interrupt-parent = <&sic>;
17	interrupts = <12>, <14>;
18	interrupt-names = "adc", "tsen";
19	};

Documentation/devicetree/bindings/iio/adc/cc10001_adc.txt+0−22

@@ -1,22 +0,0 @@
1	* Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC)
2
3	Required properties:
4	- compatible: Should be "cosmic,10001-adc"
5	- reg: Should contain adc registers location and length.
6	- clock-names: Should contain "adc".
7	- clocks: Should contain a clock specifier for each entry in clock-names
8	- vref-supply: The regulator supply ADC reference voltage.
9
10	Optional properties:
11	- adc-reserved-channels: Bitmask of reserved channels,
12	i.e. channels that cannot be used by the OS.
13
14	Example:
15	adc: adc@18101600 {
16	compatible = "cosmic,10001-adc";
17	reg = <0x18101600 0x24>;
18	adc-reserved-channels = <0x2>;
19	clocks = <&adc_clk>;
20	clock-names = "adc";
21	vref-supply = <&reg_1v8>;
22	};

Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml+59−0

@@ -0,0 +1,59 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Cosmic Circuits CC-10001 ADC
	8
	9	maintainers:
	10	- Jonathan Cameron <jic23@kernel.org>
	11
	12	description:
	13	Cosmic Circuits 10001 10-bit ADC device.
	14
	15	properties:
	16	compatible:
	17	const: cosmic,10001-adc
	18
	19	reg:
	20	maxItems: 1
	21
	22	adc-reserved-channels:
	23	$ref: /schemas/types.yaml#/definitions/uint32
	24	description:
	25	Bitmask of reserved channels, i.e. channels that cannot be
	26	used by the OS.
	27
	28	clocks:
	29	maxItems: 1
	30
	31	clock-names:
	32	const: adc
	33
	34	vref-supply: true
	35
	36	"#io-channel-cells":
	37	const: 1
	38
	39
	40	required:
	41	- compatible
	42	- reg
	43	- clocks
	44	- clock-names
	45	- vref-supply
	46
	47	additionalProperties: false
	48
	49	examples:
	50	- \|
	51	adc@18101600 {
	52	compatible = "cosmic,10001-adc";
	53	reg = <0x18101600 0x24>;
	54	adc-reserved-channels = <0x2>;
	55	clocks = <&adc_clk>;
	56	clock-names = "adc";
	57	vref-supply = <&reg_1v8>;
	58	};
	59	...

Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt+0−17

@@ -1,17 +0,0 @@
1	Motorola CPCAP PMIC ADC binding
2
3	Required properties:
4	- compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc"
5	- interrupts: The interrupt number for the ADC device
6	- interrupt-names: Should be "adcdone"
7	- #io-channel-cells: Number of cells in an IIO specifier
8
9	Example:
10
11	cpcap_adc: adc {
12	compatible = "motorola,mapphone-cpcap-adc";
13	interrupt-parent = <&cpcap>;
14	interrupts = <8 IRQ_TYPE_NONE>;
15	interrupt-names = "adcdone";
16	#io-channel-cells = <1>;
17	};

Documentation/devicetree/bindings/iio/adc/da9150-gpadc.txt+0−16

@@ -1,16 +0,0 @@
1	Dialog Semiconductor DA9150 IIO GPADC bindings
2
3	Required properties:
4	- compatible: "dlg,da9150-gpadc" for DA9150 IIO GPADC
5	- #io-channel-cells: Should be set to <1>
6	(See Documentation/devicetree/bindings/iio/iio-bindings.txt for further info)
7
8	For further information on GPADC channels, see device datasheet.
9
10
11	Example:
12
13	gpadc: da9150-gpadc {
14	compatible = "dlg,da9150-gpadc";
15	#io-channel-cells = <1>;
16	};

Documentation/devicetree/bindings/iio/adc/dlg,da9150-gpadc.yaml+35−0

@@ -0,0 +1,35 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/dlg,da9150-gpadc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Dialog Semiconductor DA9150 IIO GPADC
	8
	9	maintainers:
	10	- Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
	11
	12	description:
	13	This patch adds support for general purpose ADC within the
	14	DA9150 Charger & Fuel-Gauge IC.
	15
	16	properties:
	17	compatible:
	18	const: dlg,da9150-gpadc
	19
	20	"#io-channel-cells":
	21	const: 1
	22
	23	required:
	24	- compatible
	25	- "#io-channel-cells"
	26
	27	additionalProperties: false
	28
	29	examples:
	30	- \|
	31	adc {
	32	compatible = "dlg,da9150-gpadc";
	33	#io-channel-cells = <1>;
	34	};
	35	...

Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt+0−57

@@ -1,57 +0,0 @@
1	Freescale i.MX25 ADC GCQ device
2
3	This is a generic conversion queue device that can convert any of the
4	analog inputs using the ADC unit of the i.MX25.
5
6	Required properties:
7	- compatible: Should be "fsl,imx25-gcq".
8	- reg: Should be the register range of the module.
9	- interrupts: Should be the interrupt number of the module.
10	Typically this is <1>.
11	- #address-cells: Should be <1> (setting for the subnodes)
12	- #size-cells: Should be <0> (setting for the subnodes)
13
14	Optional properties:
15	- vref-ext-supply: The regulator supplying the ADC reference voltage.
16	Required when at least one subnode uses the this reference.
17	- vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP.
18	Required when at least one subnode uses this reference.
19	- vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP.
20	Required when at least one subnode uses this reference.
21
22	Sub-nodes:
23	Optionally you can define subnodes which define the reference voltage
24	for the analog inputs.
25
26	Required properties for subnodes:
27	- reg: Should be the number of the analog input.
28	0: xp
29	1: yp
30	2: xn
31	3: yn
32	4: wiper
33	5: inaux0
34	6: inaux1
35	7: inaux2
36	Optional properties for subnodes:
37	- fsl,adc-refp: specifies the positive reference input as defined in
38	<dt-bindings/iio/adc/fsl-imx25-gcq.h>
39	- fsl,adc-refn: specifies the negative reference input as defined in
40	<dt-bindings/iio/adc/fsl-imx25-gcq.h>
41
42	Example:
43
44	adc: adc@50030800 {
45	compatible = "fsl,imx25-gcq";
46	reg = <0x50030800 0x60>;
47	interrupt-parent = <&tscadc>;
48	interrupts = <1>;
49	#address-cells = <1>;
50	#size-cells = <0>;
51
52	inaux@5 {
53	reg = <5>;
54	fsl,adc-refp = <MX25_ADC_REFP_INT>;
55	fsl,adc-refn = <MX25_ADC_REFN_NGND>;
56	};
57	};

Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.yaml+131−0

@@ -0,0 +1,131 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/fsl,imx25-gcq.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Freescale ADC GCQ device
	8
	9	description:
	10	This is a generic conversion queue device that can convert any of the
	11	analog inputs using the ADC unit of the i.MX25.
	12
	13	maintainers:
	14	- Jonathan Cameron <jic23@kernel.org>
	15
	16	properties:
	17	compatible:
	18	const: fsl,imx25-gcq
	19
	20	reg:
	21	maxItems: 1
	22
	23	interrupts:
	24	maxItems: 1
	25
	26	vref-ext-supply:
	27	description:
	28	The regulator supplying the ADC reference voltage.
	29	Required when at least one subnode uses the this reference.
	30
	31	vref-xp-supply:
	32	description:
	33	The regulator supplying the ADC reference voltage on pin XP.
	34	Required when at least one subnode uses this reference.
	35
	36	vref-yp-supply:
	37	description:
	38	The regulator supplying the ADC reference voltage on pin YP.
	39	Required when at least one subnode uses this reference.
	40
	41	"#io-channel-cells":
	42	const: 1
	43
	44	"#address-cells":
	45	const: 1
	46
	47	"#size-cells":
	48	const: 0
	49
	50	required:
	51	- compatible
	52	- reg
	53	- interrupts
	54	- "#address-cells"
	55	- "#size-cells"
	56
	57	patternProperties:
	58	"[a-z][a-z0-9]+@[0-9a-f]+$":
	59	type: object
	60	description:
	61	Child nodes used to define the reference voltages used for each channel
	62
	63	properties:
	64	reg:
	65	description: \|
	66	Number of the analog input.
	67	0: xp
	68	1: yp
	69	2: xn
	70	3: yn
	71	4: wiper
	72	5: inaux0
	73	6: inaux1
	74	7: inaux2
	75	items:
	76	- minimum: 0
	77	maximum: 7
	78
	79	fsl,adc-refp:
	80	$ref: /schemas/types.yaml#/definitions/uint32
	81	description: \|
	82	Specifies the positive reference input as defined in
	83	<dt-bindings/iio/adc/fsl-imx25-gcq.h>
	84	0: YP voltage reference
	85	1: XP voltage reference
	86	2: External voltage reference
	87	3: Internal voltage reference (default)
	88	minimum: 0
	89	maximum: 3
	90
	91	fsl,adc-refn:
	92	$ref: /schemas/types.yaml#/definitions/uint32
	93	description: \|
	94	Specifies the negative reference input as defined in
	95	<dt-bindings/iio/adc/fsl-imx25-gcq.h>
	96	0: XN ground reference
	97	1: YN ground reference
	98	2: Internal ground reference
	99	3: External ground reference (default)
	100	minimum: 0
	101	maximum: 3
	102
	103	required:
	104	- reg
	105
	106	additionalProperties: false
	107
	108	additionalProperties: false
	109
	110	examples:
	111	- \|
	112	#include <dt-bindings/iio/adc/fsl-imx25-gcq.h>
	113	soc {
	114	#address-cells = <1>;
	115	#size-cells = <1>;
	116	adc@50030800 {
	117	compatible = "fsl,imx25-gcq";
	118	reg = <0x50030800 0x60>;
	119	interrupt-parent = <&tscadc>;
	120	interrupts = <1>;
	121	#address-cells = <1>;
	122	#size-cells = <0>;
	123
	124	inaux@5 {
	125	reg = <5>;
	126	fsl,adc-refp = <MX25_ADC_REFP_INT>;
	127	fsl,adc-refn = <MX25_ADC_REFN_NGND>;
	128	};
	129	};
	130	};
	131	...

Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml+62−0

@@ -0,0 +1,62 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Freescale ADC found on the imx7d SoC
	8
	9	maintainers:
	10	- Haibo Chen <haibo.chen@nxp.com>
	11
	12	properties:
	13	compatible:
	14	const: fsl,imx7d-adc
	15
	16	reg:
	17	maxItems: 1
	18
	19	interrupts:
	20	maxItems: 1
	21
	22	clocks:
	23	maxItems: 1
	24
	25	clock-names:
	26	const: adc
	27
	28	vref-supply: true
	29
	30	"#io-channel-cells":
	31	const: 1
	32
	33	required:
	34	- compatible
	35	- reg
	36	- interrupts
	37	- clocks
	38	- clock-names
	39	- vref-supply
	40	- "#io-channel-cells"
	41
	42	additionalProperties: false
	43
	44	examples:
	45	- \|
	46	#include <dt-bindings/interrupt-controller/irq.h>
	47	#include <dt-bindings/clock/imx7d-clock.h>
	48	#include <dt-bindings/interrupt-controller/arm-gic.h>
	49	soc {
	50	#address-cells = <1>;
	51	#size-cells = <1>;
	52	adc@30610000 {
	53	compatible = "fsl,imx7d-adc";
	54	reg = <0x30610000 0x10000>;
	55	interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
	56	clocks = <&clks IMX7D_ADC_ROOT_CLK>;
	57	clock-names = "adc";
	58	vref-supply = <&reg_vcc_3v3_mcu>;
	59	#io-channel-cells = <1>;
	60	};
	61	};
	62	...

Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml+81−0

@@ -0,0 +1,81 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: ADC found on Freescale vf610 and similar SoCs
	8
	9	maintainers:
	10	- Fugang Duan <fugang.duan@nxp.com>
	11
	12	description:
	13	ADCs found on vf610/i.MX6slx and upward SoCs from Freescale.
	14
	15	properties:
	16	compatible:
	17	const: fsl,vf610-adc
	18
	19	reg:
	20	maxItems: 1
	21
	22	interrupts:
	23	maxItems: 1
	24
	25	clocks:
	26	description: ADC source clock (ipg clock)
	27	maxItems: 1
	28
	29	clock-names:
	30	const: adc
	31
	32	vref-supply:
	33	description: ADC reference voltage supply.
	34
	35	fsl,adck-max-frequency:
	36	$ref: /schemas/types.yaml#/definitions/uint32-array
	37	minItems: 3
	38	maxItems: 3
	39	description: \|
	40	Maximum frequencies from datasheet operating requirements.
	41	Three values necessary to cover the 3 conversion modes.
	42	* Frequency in normal mode (ADLPC=0, ADHSC=0)
	43	* Frequency in high-speed mode (ADLPC=0, ADHSC=1)
	44	* Frequency in low-power mode (ADLPC=1, ADHSC=0)
	45
	46	min-sample-time:
	47	$ref: /schemas/types.yaml#/definitions/uint32
	48	description:
	49	Minimum sampling time in nanoseconds. This value has
	50	to be chosen according to the conversion mode and the connected analog
	51	source resistance (R_as) and capacitance (C_as). Refer the datasheet's
	52	operating requirements. A safe default across a wide range of R_as and
	53	C_as as well as conversion modes is 1000ns.
	54
	55	"#io-channel-cells":
	56	const: 1
	57
	58	required:
	59	- compatible
	60	- reg
	61	- interrupts
	62	- clocks
	63	- clock-names
	64	- vref-supply
	65
	66	additionalProperties: false
	67
	68	examples:
	69	- \|
	70	#include <dt-bindings/clock/vf610-clock.h>
	71	adc@4003b000 {
	72	compatible = "fsl,vf610-adc";
	73	reg = <0x4003b000 0x1000>;
	74	interrupts = <0 53 0x04>;
	75	clocks = <&clks VF610_CLK_ADC0>;
	76	clock-names = "adc";
	77	fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>;
	78	vref-supply = <&reg_vcc_3v3_mcu>;
	79	min-sample-time = <10000>;
	80	};
	81	...

Documentation/devicetree/bindings/iio/adc/hi8435.txt+0−21

@@ -1,21 +0,0 @@
1	Holt Integrated Circuits HI-8435 threshold detector bindings
2
3	Required properties:
4	- compatible: should be "holt,hi8435"
5	- reg: spi chip select number for the device
6
7	Recommended properties:
8	- spi-max-frequency: definition as per
9	Documentation/devicetree/bindings/spi/spi-bus.txt
10
11	Optional properties:
12	- gpios: GPIO used for controlling the reset pin
13
14	Example:
15	sensor@0 {
16	compatible = "holt,hi8435";
17	reg = <0>;
18	gpios = <&gpio6 1 0>;
19
20	spi-max-frequency = <1000000>;
21	};

Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml+50−0

@@ -0,0 +1,50 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/holt,hi8435.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Holt Integrated Circuits HI-8435 SPI threshold detector
	8
	9	maintainers:
	10	- Vladimir Barinov <vladimir.barinov@cogentembedded.com>
	11
	12	description: \|
	13	Datasheet: http://www.holtic.com/documents/427-hi-8435_v-rev-lpdf.do
	14
	15	properties:
	16	compatible:
	17	const: holt,hi8435
	18
	19	reg:
	20	maxItems: 1
	21
	22	gpios:
	23	description:
	24	GPIO used for controlling the reset pin
	25	maxItems: 1
	26
	27	spi-max-frequency: true
	28
	29	"#io-channel-cells":
	30	const: 1
	31
	32	required:
	33	- compatible
	34	- reg
	35
	36	additionalProperties: false
	37
	38	examples:
	39	- \|
	40	spi {
	41	#address-cells = <1>;
	42	#size-cells = <0>;
	43	threshold-detector@0 {
	44	compatible = "holt,hi8435";
	45	reg = <0>;
	46	gpios = <&gpio6 1 0>;
	47	spi-max-frequency = <1000000>;
	48	};
	49	};
	50	...

Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt+0−24

@@ -1,24 +0,0 @@
1	Freescale imx7d ADC bindings
2
3	The devicetree bindings are for the ADC driver written for
4	imx7d SoC.
5
6	Required properties:
7	- compatible: Should be "fsl,imx7d-adc"
8	- reg: Offset and length of the register set for the ADC device
9	- interrupts: The interrupt number for the ADC device
10	- clocks: The root clock of the ADC controller
11	- clock-names: Must contain "adc", matching entry in the clocks property
12	- vref-supply: The regulator supply ADC reference voltage
13	- #io-channel-cells: Must be 1 as per ../iio-bindings.txt
14
15	Example:
16	adc1: adc@30610000 {
17	compatible = "fsl,imx7d-adc";
18	reg = <0x30610000 0x10000>;
19	interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
20	clocks = <&clks IMX7D_ADC_ROOT_CLK>;
21	clock-names = "adc";
22	vref-supply = <&reg_vcc_3v3_mcu>;
23	#io-channel-cells = <1>;
24	};

Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml+44−0

@@ -0,0 +1,44 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2497.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Linear Technology / Analog Devices LTC2497 ADC
	8
	9	maintainers:
	10	- Michael Hennerich <michael.hennerich@analog.com>
	11
	12	description: \|
	13	16bit ADC supporting up to 16 single ended or 8 differential inputs.
	14	I2C interface.
	15
	16	properties:
	17	compatible:
	18	const:
	19	lltc,ltc2497
	20
	21	reg: true
	22	vref-supply: true
	23	"#io-channel-cells":
	24	const: 1
	25
	26	required:
	27	- compatible
	28	- reg
	29	- vref-supply
	30
	31	examples:
	32	- \|
	33	i2c {
	34	#address-cells = <1>;
	35	#size-cells = <0>;
	36
	37	adc@76 {
	38	compatible = "lltc,ltc2497";
	39	reg = <0x76>;
	40	vref-supply = <&ltc2497_reg>;
	41	#io-channel-cells = <1>;
	42	};
	43	};
	44	...

Documentation/devicetree/bindings/iio/adc/lpc1850-adc.txt+0−20

@@ -1,20 +0,0 @@
1	NXP LPC1850 ADC bindings
2
3	Required properties:
4	- compatible: Should be "nxp,lpc1850-adc"
5	- reg: Offset and length of the register set for the ADC device
6	- interrupts: The interrupt number for the ADC device
7	- clocks: The root clock of the ADC controller
8	- vref-supply: The regulator supply ADC reference voltage
9	- resets: phandle to reset controller and line specifier
10
11	Example:
12
13	adc0: adc@400e3000 {
14	compatible = "nxp,lpc1850-adc";
15	reg = <0x400e3000 0x1000>;
16	interrupts = <17>;
17	clocks = <&ccu1 CLK_APB3_ADC0>;
18	vref-supply = <&reg_vdda>;
19	resets = <&rgu 40>;
20	};

Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt+0−21

@@ -1,21 +0,0 @@
1	* NXP LPC32xx SoC ADC controller
2
3	Required properties:
4	- compatible: must be "nxp,lpc3220-adc"
5	- reg: physical base address of the controller and length of memory mapped
6	region.
7	- interrupts: The ADC interrupt
8
9	Optional:
10	- vref-supply: The regulator supply ADC reference voltage, optional
11	for legacy reason, but highly encouraging to us in new device tree
12
13	Example:
14
15	adc@40048000 {
16	compatible = "nxp,lpc3220-adc";
17	reg = <0x40048000 0x1000>;
18	interrupt-parent = <&mic>;
19	interrupts = <39 0>;
20	vref-supply = <&vcc>;
21	};

Documentation/devicetree/bindings/iio/adc/ltc2497.txt+0−13

@@ -1,13 +0,0 @@
1	* Linear Technology / Analog Devices LTC2497 ADC
2
3	Required properties:
4	- compatible: Must be "lltc,ltc2497"
5	- reg: Must contain the ADC I2C address
6	- vref-supply: The regulator supply for ADC reference voltage
7
8	Example:
9	ltc2497: adc@76 {
10	compatible = "lltc,ltc2497";
11	reg = <0x76>;
12	vref-supply = <&ltc2497_reg>;
13	};

Documentation/devicetree/bindings/iio/adc/marvell,berlin2-adc.yaml+50−0

@@ -0,0 +1,50 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/marvell,berlin2-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Berlin 2 Analog to Digital Converter (ADC)
	8
	9	maintainers:
	10	- Antoine Tenart <antoine.tenart@free-electrons.com>
	11
	12	description:
	13	The Berlin ADC has 8 channels, with one connected to a temperature sensor.
	14	It is part of the system controller register set. The ADC node should be a
	15	sub-node of the system controller node.
	16
	17	properties:
	18	compatible:
	19	const: marvell,berlin2-adc
	20
	21	interrupts:
	22	minItems: 2
	23	maxItems: 2
	24
	25	interrupt-names:
	26	items:
	27	- const: adc
	28	- const: tsen
	29
	30	"#io-channel-cells":
	31	const: 1
	32
	33	required:
	34	- compatible
	35	- interrupts
	36	- interrupt-names
	37
	38	additionalProperties: false
	39
	40	examples:
	41	- \|
	42	sysctrl {
	43	adc {
	44	compatible = "marvell,berlin2-adc";
	45	interrupt-parent = <&sic>;
	46	interrupts = <12>, <14>;
	47	interrupt-names = "adc", "tsen";
	48	};
	49	};
	50	...

Documentation/devicetree/bindings/iio/adc/max11100.txt+0−18

@@ -1,18 +0,0 @@
1	* Maxim max11100 Analog to Digital Converter (ADC)
2
3	Required properties:
4	- compatible: Should be "maxim,max11100"
5	- reg: the adc unit address
6	- vref-supply: phandle to the regulator that provides reference voltage
7
8	Optional properties:
9	- spi-max-frequency: SPI maximum frequency
10
11	Example:
12
13	max11100: adc@0 {
14	compatible = "maxim,max11100";
15	reg = <0>;
16	vref-supply = <&adc0_vref>;
17	spi-max-frequency = <240000>;
18	};

Documentation/devicetree/bindings/iio/adc/max1118.txt+0−21

@@ -1,21 +0,0 @@
1	* MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs
2
3	Required properties:
4	- compatible: Should be one of
5	* "maxim,max1117"
6	* "maxim,max1118"
7	* "maxim,max1119"
8	- reg: spi chip select number for the device
9	- (max1118 only) vref-supply: The regulator supply for ADC reference voltage
10
11	Recommended properties:
12	- spi-max-frequency: Definition as per
13	Documentation/devicetree/bindings/spi/spi-bus.txt
14
15	Example:
16	adc@0 {
17	compatible = "maxim,max1118";
18	reg = <0>;
19	vref-supply = <&vdd_supply>;
20	spi-max-frequency = <1000000>;
21	};

Documentation/devicetree/bindings/iio/adc/max9611.txt+0−27

@@ -1,27 +0,0 @@
1	* Maxim max9611/max9612 current sense amplifier with 12-bits ADC interface
2
3	Maxim max9611/max9612 is an high-side current sense amplifier with integrated
4	12-bits ADC communicating over I2c bus.
5	The device node for this driver shall be a child of a I2c controller.
6
7	Required properties
8	- compatible: Should be "maxim,max9611" or "maxim,max9612"
9	- reg: The 7-bits long I2c address of the device
10	- shunt-resistor-micro-ohms: Value, in micro Ohms, of the current sense shunt
11	resistor
12
13	Example:
14
15	&i2c4 {
16	csa: adc@7c {
17	compatible = "maxim,max9611";
18	reg = <0x7c>;
19
20	shunt-resistor-micro-ohms = <5000>;
21	};
22	};
23
24	This device node describes a current sense amplifier sitting on I2c4 bus
25	with address 0x7c (read address is 0xf9, write address is 0xf8).
26	A sense resistor of 0,005 Ohm is installed between RS+ and RS- current-sensing
27	inputs.

Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml+49−0

@@ -0,0 +1,49 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/maxim,max11100.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Maxim MAX11100 ADC
	8
	9	maintainers:
	10	- Jacopo Mondi <jacopo@jmondi.org>
	11
	12	description: \|
	13	Single channel 16 bit ADC with SPI interface.
	14
	15	properties:
	16	compatible:
	17	const: maxim,max11100
	18
	19	reg:
	20	maxItems: 1
	21
	22	vref-supply:
	23	description: External reference, needed to establish input scaling.
	24
	25	spi-max-frequency:
	26	minimum: 100000
	27	maximum: 4800000
	28
	29	additionalProperties: false
	30
	31	required:
	32	- compatible
	33	- reg
	34	- vref-supply
	35
	36	examples:
	37	- \|
	38	spi {
	39	#address-cells = <1>;
	40	#size-cells = <0>;
	41
	42	adc@0 {
	43	compatible = "maxim,max11100";
	44	reg = <0>;
	45	vref-supply = <&adc_vref>;
	46	spi-max-frequency = <240000>;
	47	};
	48	};
	49	...

Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml+62−0

@@ -0,0 +1,62 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/maxim,max1118.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Maxim MAX1118 and similar ADCs
	8
	9	maintainers:
	10	- Akinobu Mita <akinobu.mita@gmail.com>
	11
	12	description: \|
	13	Dual channel 8bit ADCs.
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- maxim,max1117
	19	- maxim,max1118
	20	- maxim,max1119
	21
	22	reg:
	23	maxItems: 1
	24
	25	spi-max-frequency:
	26	maximum: 5000000
	27
	28	vref-supply:
	29	description: External reference, needed to establish input scaling
	30
	31	if:
	32	properties:
	33	compatible:
	34	contains:
	35	const: maxim,max1118
	36	then:
	37	required:
	38	- vref-supply
	39	else:
	40	properties:
	41	vref-supply: false
	42
	43	required:
	44	- compatible
	45	- reg
	46
	47	additionalProperties: false
	48
	49	examples:
	50	- \|
	51	spi {
	52	#address-cells = <1>;
	53	#size-cells = <0>;
	54
	55	adc@0 {
	56	compatible = "maxim,max1118";
	57	reg = <0>;
	58	vref-supply = <&adc_vref>;
	59	spi-max-frequency = <1000000>;
	60	};
	61	};
	62	...

Documentation/devicetree/bindings/iio/adc/maxim,max9611.yaml+51−0

@@ -0,0 +1,51 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/maxim,max9611.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Maxim MAX9611 and similar current sense amplifiers with integrated ADCs
	8
	9	maintainers:
	10	- Jacopo Mondi <jacopo@jmondi.org>
	11
	12	description: \|
	13	These devices combine a high-side current sense amplifier with a 12 bit ADC.
	14	They have an i2c interface.
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- maxim,max9611
	20	- maxim,max9612
	21
	22	reg:
	23	maxItems: 1
	24
	25	shunt-resistor-micro-ohms:
	26	$ref: /schemas/types.yaml#/definitions/uint32
	27	description: \|
	28	Value in micro Ohms of the shunt resistor connected between the RS+ and
	29	RS- inputs, across which the current is measured. Value needed to compute
	30	the scaling of the measured current.
	31
	32	additionalProperties: false
	33
	34	required:
	35	- compatible
	36	- reg
	37	- shunt-resistor-micro-ohms
	38
	39	examples:
	40	- \|
	41	i2c {
	42	#address-cells = <1>;
	43	#size-cells = <0>;
	44
	45	adc@7c {
	46	compatible = "maxim,max9611";
	47	reg = <0x7c>;
	48	shunt-resistor-micro-ohms = <5000>;
	49	};
	50	};
	51	...

Documentation/devicetree/bindings/iio/adc/mcp320x.txt+0−57

@@ -1,57 +0,0 @@
1	* Microchip Analog to Digital Converter (ADC)
2
3	The node for this driver must be a child node of a SPI controller, hence
4	all mandatory properties described in
5
6	Documentation/devicetree/bindings/spi/spi-bus.txt
7
8	must be specified.
9
10	Required properties:
11	- compatible: Must be one of the following, depending on the
12	model:
13	"mcp3001" (DEPRECATED)
14	"mcp3002" (DEPRECATED)
15	"mcp3004" (DEPRECATED)
16	"mcp3008" (DEPRECATED)
17	"mcp3201" (DEPRECATED)
18	"mcp3202" (DEPRECATED)
19	"mcp3204" (DEPRECATED)
20	"mcp3208" (DEPRECATED)
21	"mcp3301" (DEPRECATED)
22
23	"microchip,mcp3001"
24	"microchip,mcp3002"
25	"microchip,mcp3004"
26	"microchip,mcp3008"
27	"microchip,mcp3201"
28	"microchip,mcp3202"
29	"microchip,mcp3204"
30	"microchip,mcp3208"
31	"microchip,mcp3301"
32	"microchip,mcp3550-50"
33	"microchip,mcp3550-60"
34	"microchip,mcp3551"
35	"microchip,mcp3553"
36
37	NOTE: The use of the compatibles with no vendor prefix
38	is deprecated and only listed because old DT use them.
39
40	- spi-cpha, spi-cpol (boolean):
41	Either SPI mode (0,0) or (1,1) must be used, so specify
42	none or both of spi-cpha, spi-cpol. The MCP3550/1/3
43	is more efficient in mode (1,1) as only 3 instead of
44	4 bytes need to be read from the ADC, but not all SPI
45	masters support it.
46
47	- vref-supply: Phandle to the external reference voltage supply.
48
49	Examples:
50	spi_controller {
51	mcp3x0x@0 {
52	compatible = "microchip,mcp3002";
53	reg = <0>;
54	spi-max-frequency = <1000000>;
55	vref-supply = <&vref_reg>;
56	};
57	};

Documentation/devicetree/bindings/iio/adc/mcp3422.txt+0−19

@@ -1,19 +0,0 @@
1	* Microchip mcp3421/2/3/4/6/7/8 chip family (ADC)
2
3	Required properties:
4	- compatible: Should be
5	"microchip,mcp3421" or
6	"microchip,mcp3422" or
7	"microchip,mcp3423" or
8	"microchip,mcp3424" or
9	"microchip,mcp3425" or
10	"microchip,mcp3426" or
11	"microchip,mcp3427" or
12	"microchip,mcp3428"
13	- reg: I2C address for the device
14
15	Example:
16	adc@0 {
17	compatible = "microchip,mcp3424";
18	reg = <0x68>;
19	};

Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml+77−0

@@ -0,0 +1,77 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3201.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Microchip mcp3201 and similar ADCs
	8
	9	maintainers:
	10	- Oskar Andero <oskar.andero@gmail.com>
	11
	12	description: \|
	13	Family of simple ADCs with an I2C inteface.
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- microchip,mcp3001
	19	- microchip,mcp3002
	20	- microchip,mcp3004
	21	- microchip,mcp3008
	22	- microchip,mcp3201
	23	- microchip,mcp3202
	24	- microchip,mcp3204
	25	- microchip,mcp3208
	26	- microchip,mcp3301
	27	- microchip,mcp3550-50
	28	- microchip,mcp3550-60
	29	- microchip,mcp3551
	30	- microchip,mcp3553
	31
	32	reg:
	33	maxItems: 1
	34
	35	spi-max-frequency: true
	36	spi-cpha: true
	37	spi-cpol: true
	38
	39	vref-supply:
	40	description: External reference.
	41
	42	"#io-channel-cells":
	43	const: 1
	44
	45	dependencies:
	46	spi-cpol: [ spi-cpha ]
	47	spi-cpha: [ spi-cpol ]
	48
	49	required:
	50	- compatible
	51	- reg
	52	- vref-supply
	53
	54	additionalProperties: false
	55
	56	examples:
	57	- \|
	58	spi {
	59	#address-cells = <1>;
	60	#size-cells = <0>;
	61
	62	adc@0 {
	63	compatible = "microchip,mcp3002";
	64	reg = <0>;
	65	vref-supply = <&vref_reg>;
	66	spi-cpha;
	67	spi-cpol;
	68	#io-channel-cells = <1>;
	69	};
	70	adc@1 {
	71	compatible = "microchip,mcp3002";
	72	reg = <1>;
	73	vref-supply = <&vref_reg>;
	74	spi-max-frequency = <1500000>;
	75	};
	76	};
	77	...

Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml+53−0

@@ -0,0 +1,53 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Motorola CPCAP PMIC ADC binding
	8
	9	maintainers:
	10	- Tony Lindgren <tony@atomide.com>
	11
	12	description:
	13	On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC
	14	has ADCs that are used for battery charging and USB PHY VBUS and ID pin
	15	detection.
	16
	17	properties:
	18	compatible:
	19	enum:
	20	- motorola,cpcap-adc
	21	- motorola,mapphone-cpcap-adc
	22
	23	interrupts:
	24	maxItems: 1
	25
	26	interrupt-names:
	27	const: adcdone
	28
	29	"#io-channel-cells":
	30	const: 1
	31
	32	required:
	33	- compatible
	34	- interrupts
	35	- "#io-channel-cells"
	36
	37	additionalProperties: false
	38
	39	examples:
	40	- \|
	41	#include <dt-bindings/interrupt-controller/irq.h>
	42	pmic {
	43	#address-cells = <1>;
	44	#size-cells = <0>;
	45	adc {
	46	compatible = "motorola,mapphone-cpcap-adc";
	47	interrupt-parent = <&cpcap>;
	48	interrupts = <8 IRQ_TYPE_NONE>;
	49	interrupt-names = "adcdone";
	50	#io-channel-cells = <1>;
	51	};
	52	};
	53	...

Documentation/devicetree/bindings/iio/adc/nuvoton,nau7802.yaml+50−0

@@ -0,0 +1,50 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/nuvoton,nau7802.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Nuvoton NAU7802 I2c Analog to Digital Converter (ADC)
	8
	9	maintainers:
	10	- Alexandre Belloni <alexandre.belloni@bootlin.com>
	11	- Maxime Ripard <mripard@kernel.org>
	12
	13	properties:
	14	compatible:
	15	const: nuvoton,nau7802
	16
	17	reg:
	18	maxItems: 1
	19
	20	interrupts:
	21	maxItems: 1
	22
	23	nuvoton,vldo:
	24	$ref: /schemas/types.yaml#/definitions/uint32
	25	description:
	26	Internal reference voltage in millivolts to be configured.
	27	minimum: 2400
	28	maximum: 4500
	29
	30	"#io-channel-cells":
	31	const: 1
	32
	33	required:
	34	- compatible
	35	- reg
	36
	37	additionalProperties: false
	38
	39	examples:
	40	- \|
	41	i2c {
	42	#address-cells = <1>;
	43	#size-cells = <0>;
	44	nau7802@2a {
	45	compatible = "nuvoton,nau7802";
	46	reg = <0x2a>;
	47	nuvoton,vldo = <3000>;
	48	};
	49	};
	50	...

Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt+0−26

@@ -1,26 +0,0 @@
1	Nuvoton NPCM Analog to Digital Converter (ADC)
2
3	The NPCM ADC is a 10-bit converter for eight channel inputs.
4
5	Required properties:
6	- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC.
7	- reg: specifies physical base address and size of the registers.
8	- interrupts: Contain the ADC interrupt with flags for falling edge.
9	- resets : phandle to the reset control for this device.
10
11	Optional properties:
12	- clocks: phandle of ADC reference clock, in case the clock is not
13	added the ADC will use the default ADC sample rate.
14	- vref-supply: The regulator supply ADC reference voltage, in case the
15	vref-supply is not added the ADC will use internal voltage
16	reference.
17
18	Example:
19
20	adc: adc@f000c000 {
21	compatible = "nuvoton,npcm750-adc";
22	reg = <0xf000c000 0x8>;
23	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
24	clocks = <&clk NPCM7XX_CLK_ADC>;
25	resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
26	};

Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml+64−0

@@ -0,0 +1,64 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Nuvoton NPCM BMC Analog to Digital Converter (ADC)
	8
	9	maintainers:
	10	- Tomer Maimon <tmaimon77@gmail.com>
	11
	12	description:
	13	The NPCM ADC is a 10-bit converter for eight channel inputs.
	14
	15	properties:
	16	compatible:
	17	const: nuvoton,npcm750-adc
	18
	19	reg:
	20	maxItems: 1
	21
	22	interrupts:
	23	maxItems: 1
	24	description: ADC interrupt, should be set for falling edge.
	25
	26	resets:
	27	maxItems: 1
	28
	29	clocks:
	30	maxItems: 1
	31	description: If not provided the defulat ADC sample rate will be used.
	32
	33	vref-supply:
	34	description: If not supplied, the internal voltage reference will be used.
	35
	36	"#io-channel-cells":
	37	const: 1
	38
	39	required:
	40	- compatible
	41	- reg
	42	- interrupts
	43	- resets
	44
	45	additionalProperties: false
	46
	47	examples:
	48	- \|
	49	#include <dt-bindings/interrupt-controller/irq.h>
	50	#include <dt-bindings/interrupt-controller/arm-gic.h>
	51	#include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
	52	#include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
	53	soc {
	54	#address-cells = <1>;
	55	#size-cells = <1>;
	56	adc@f000c000 {
	57	compatible = "nuvoton,npcm750-adc";
	58	reg = <0xf000c000 0x8>;
	59	interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
	60	clocks = <&clk NPCM7XX_CLK_ADC>;
	61	resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>;
	62	};
	63	};
	64	...

Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt+0−18

@@ -1,18 +0,0 @@
1	* Nuvoton NAU7802 Analog to Digital Converter (ADC)
2
3	Required properties:
4	- compatible: Should be "nuvoton,nau7802"
5	- reg: Should contain the ADC I2C address
6
7	Optional properties:
8	- nuvoton,vldo: Internal reference voltage in millivolts to be
9	configured valid values are between 2400 mV and 4500 mV.
10	- interrupts: IRQ line for the ADC. If not used the driver will use
11	polling.
12
13	Example:
14	adc2: nau7802@2a {
15	compatible = "nuvoton,nau7802";
16	reg = <0x2a>;
17	nuvoton,vldo = <3000>;
18	};

Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml+61−0

@@ -0,0 +1,61 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: NXP LPC1850 ADC bindings
	8
	9	maintainers:
	10	- Joachim Eastwood <manabian@gmail.com>
	11
	12	description:
	13	Supports the ADC found on the LPC1850 SoC.
	14
	15	properties:
	16	compatible:
	17	const: nxp,lpc1850-adc
	18
	19	reg:
	20	maxItems: 1
	21
	22	interrupts:
	23	maxItems: 1
	24
	25	clocks:
	26	maxItems: 1
	27
	28	vref-supply: true
	29
	30	resets:
	31	maxItems: 1
	32
	33	"#io-channel-cells":
	34	const: 1
	35
	36	required:
	37	- compatible
	38	- reg
	39	- interrupts
	40	- clocks
	41	- vref-supply
	42	- resets
	43
	44	additionalProperties: false
	45
	46	examples:
	47	- \|
	48	#include <dt-bindings/clock/lpc18xx-ccu.h>
	49	soc {
	50	#address-cells = <1>;
	51	#size-cells = <1>;
	52	adc@400e3000 {
	53	compatible = "nxp,lpc1850-adc";
	54	reg = <0x400e3000 0x1000>;
	55	interrupts = <17>;
	56	clocks = <&ccu1 CLK_APB3_ADC0>;
	57	vref-supply = <&reg_vdda>;
	58	resets = <&rgu 40>;
	59	};
	60	};
	61	...

Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml+50−0

@@ -0,0 +1,50 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: NXP LPC3220 SoC ADC controller
	8
	9	maintainers:
	10	- Gregory Clement <gregory.clement@bootlin.com>
	11
	12	description:
	13	This hardware block has been used on several LPC32XX SoCs.
	14
	15	properties:
	16	compatible:
	17	const: nxp,lpc3220-adc
	18
	19	reg:
	20	maxItems: 1
	21
	22	interrupts:
	23	maxItems: 1
	24
	25	vref-supply: true
	26
	27	"#io-channel-cells":
	28	const: 1
	29
	30	required:
	31	- compatible
	32	- reg
	33	- interrupts
	34
	35	additionalProperties: false
	36
	37	examples:
	38	- \|
	39	soc {
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	adc@40048000 {
	43	compatible = "nxp,lpc3220-adc";
	44	reg = <0x40048000 0x1000>;
	45	interrupt-parent = <&mic>;
	46	interrupts = <39 0>;
	47	vref-supply = <&vcc>;
	48	};
	49	};
	50	...

Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml+13−2

     maxItems: 2
   interrupts:
-    maxItems: 1
+    description:
+      ADC interrupt followed by optional touchscreen interrupt.
+    minItems: 1
+    maxItems: 2
   "#io-channel-cells":
     const: 1
               - samsung,exynos-adc-v2
               - samsung,exynos3250-adc
               - samsung,exynos4212-adc
-              - samsung,s5pv210-adc
     then:
       required:
         - samsung,syscon-phandle
           items:
             - const: adc
+  - if:
+      required:
+        - has-touchscreen
+    then:
+      properties:
+        interrupts:
+          minItems: 2
+          maxItems: 2
 examples:
   - |
     adc: adc@12d10000 {

Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml+72−0

@@ -0,0 +1,72 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Spreadtrum SC27XX series PMICs ADC binding
	8
	9	maintainers:
	10	- Baolin Wang <baolin.wang7@gmail.com>
	11
	12	description:
	13	Supports the ADC found on these PMICs.
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- sprd,sc2720-adc
	19	- sprd,sc2721-adc
	20	- sprd,sc2723-adc
	21	- sprd,sc2730-adc
	22	- sprd,sc2731-adc
	23
	24	reg:
	25	maxItems: 1
	26
	27	interrupts:
	28	maxItems: 1
	29
	30	"#io-channel-cells":
	31	const: 1
	32
	33	hwlocks:
	34	maxItems: 1
	35
	36	nvmem-cells:
	37	maxItems: 2
	38
	39	nvmem-cell-names:
	40	items:
	41	- const: big_scale_calib
	42	- const: small_scale_calib
	43
	44	required:
	45	- compatible
	46	- reg
	47	- interrupts
	48	- "#io-channel-cells"
	49	- hwlocks
	50	- nvmem-cells
	51	- nvmem-cell-names
	52
	53	additionalProperties: false
	54
	55	examples:
	56	- \|
	57	#include <dt-bindings/interrupt-controller/irq.h>
	58	pmic {
	59	#address-cells = <1>;
	60	#size-cells = <0>;
	61	adc@480 {
	62	compatible = "sprd,sc2731-adc";
	63	reg = <0x480>;
	64	interrupt-parent = <&sc2731_pmic>;
	65	interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
	66	#io-channel-cells = <1>;
	67	hwlocks = <&hwlock 4>;
	68	nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
	69	nvmem-cell-names = "big_scale_calib", "small_scale_calib";
	70	};
	71	};
	72	...

Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt+0−40

@@ -1,40 +0,0 @@
1	Spreadtrum SC27XX series PMICs ADC binding
2
3	Required properties:
4	- compatible: Should be one of the following.
5	"sprd,sc2720-adc"
6	"sprd,sc2721-adc"
7	"sprd,sc2723-adc"
8	"sprd,sc2730-adc"
9	"sprd,sc2731-adc"
10	- reg: The address offset of ADC controller.
11	- interrupt-parent: The interrupt controller.
12	- interrupts: The interrupt number for the ADC device.
13	- #io-channel-cells: Number of cells in an IIO specifier.
14	- hwlocks: Reference to a phandle of a hwlock provider node.
15	- nvmem-cells: A phandle to the calibration cells provided by eFuse device.
16	- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib".
17
18	Example:
19
20	sc2731_pmic: pmic@0 {
21	compatible = "sprd,sc2731";
22	reg = <0>;
23	spi-max-frequency = <26000000>;
24	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
25	interrupt-controller;
26	#interrupt-cells = <2>;
27	#address-cells = <1>;
28	#size-cells = <0>;
29
30	pmic_adc: adc@480 {
31	compatible = "sprd,sc2731-adc";
32	reg = <0x480>;
33	interrupt-parent = <&sc2731_pmic>;
34	interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
35	#io-channel-cells = <1>;
36	hwlocks = <&hwlock 4>;
37	nvmem-cells = <&adc_big_scale>, <&adc_small_scale>;
38	nvmem-cell-names = "big_scale_calib", "small_scale_calib";
39	};
40	};

Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml+45−0

@@ -0,0 +1,45 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: ADC on an STMPE multifunction device.
	8
	9	maintainers:
	10	- Stefan Agner <stefan@agner.ch>
	11
	12	description:
	13	This ADC forms part of an ST microelectronics STMPE multifunction device .
	14	The ADC is shared with the STMPE touchscreen. As a result some ADC related
	15	settings are specified in the parent node.
	16	The node name myst be stmpe_adc and should be a child node of the stmpe node
	17	to which it belongs.
	18
	19	properties:
	20	compatible:
	21	const: st,stmpe-adc
	22
	23	st,norequest-mask:
	24	$ref: /schemas/types.yaml#/definitions/uint32
	25	description:
	26	Bitmask specifying which ADC channels should _not_ be
	27	requestable due to different usage (e.g. touch).
	28
	29	"#io-channel-cells":
	30	const: 1
	31
	32	required:
	33	- compatible
	34
	35	additionalProperties: false
	36
	37	examples:
	38	- \|
	39	stmpe {
	40	stmpe_adc {
	41	compatible = "st,stmpe-adc";
	42	st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
	43	};
	44	};
	45	...

Documentation/devicetree/bindings/iio/adc/stmpe-adc.txt+0−21

@@ -1,21 +0,0 @@
1	STMPE ADC driver
2	----------------
3
4	Required properties:
5	- compatible: "st,stmpe-adc"
6
7	Optional properties:
8	Note that the ADC is shared with the STMPE touchscreen. ADC related settings
9	have to be done in the mfd.
10	- st,norequest-mask: bitmask specifying which ADC channels should _not_ be
11	requestable due to different usage (e.g. touch)
12
13	Node name must be stmpe_adc and should be child node of stmpe node to
14	which it belongs.
15
16	Example:
17
18	stmpe_adc {
19	compatible = "st,stmpe-adc";
20	st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
21	};

Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml+56−0

@@ -0,0 +1,56 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,adc0832.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADC0832 and similar ADCs
	8
	9	maintainers:
	10	- Akinobu Mita <akinobu.mita@gmail.com>
	11
	12	description: \|
	13	8 bit ADCs with 1, 2, 4 or 8 inputs for single ended or differential
	14	conversion.
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- ti,adc0831
	20	- ti,adc0832
	21	- ti,adc0834
	22	- ti,adc0838
	23
	24	reg:
	25	maxItems: 1
	26
	27	spi-max-frequency: true
	28
	29	vref-supply:
	30	description: External reference, needed to establish input scaling
	31
	32	"#io-channel-cells":
	33	const: 1
	34
	35	required:
	36	- compatible
	37	- reg
	38	- vref-supply
	39
	40	additionalProperties: false
	41
	42	examples:
	43	- \|
	44	spi {
	45	#address-cells = <1>;
	46	#size-cells = <0>;
	47
	48	adc@0 {
	49	compatible = "ti,adc0832";
	50	reg = <0>;
	51	vref-supply = <&vdd_supply>;
	52	spi-max-frequency = <200000>;
	53	#io-channel-cells = <1>;
	54	};
	55	};
	56	...

Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml+47−0

@@ -0,0 +1,47 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,adc108s102.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADC108S102 and ADC128S102
	8
	9	maintainers:
	10	- Bogdan Pricop <bogdan.pricop@emutex.com>
	11
	12	description: \|
	13	Family of 8 channel, 10/12 bit, SPI, single ended ADCs.
	14
	15	properties:
	16	compatible:
	17	const:
	18	ti,adc108s102
	19
	20	reg: true
	21	vref-supply: true
	22	spi-max-frequency: true
	23	"#io-channel-cells":
	24	const: 1
	25
	26	required:
	27	- compatible
	28	- reg
	29	- vref-supply
	30
	31	additionalProperties: false
	32
	33	examples:
	34	- \|
	35	spi {
	36	#address-cells= <1>;
	37	#size-cells = <0>;
	38
	39	adc@0 {
	40	compatible = "ti,adc108s102";
	41	reg = <0>;
	42	vref-supply = <&vdd_supply>;
	43	spi-max-frequency = <1000000>;
	44	#io-channel-cells = <1>;
	45	};
	46	};
	47	...

Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml+86−0

@@ -0,0 +1,86 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADC12138 and similar self-calibrating ADCs
	8
	9	maintainers:
	10	- Akinobu Mita <akinobu.mita@gmail.com>
	11
	12	description: \|
	13	13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to
	14	correct for linearity, zero and full scale errors.
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- ti,adc12130
	20	- ti,adc12132
	21	- ti,adc12138
	22
	23	reg:
	24	maxItems: 1
	25
	26	interrupts:
	27	maxItems: 1
	28	description: End of Conversion (EOC) interrupt
	29
	30	clocks:
	31	maxItems: 1
	32	description: Conversion clock input.
	33
	34	spi-max-frequency: true
	35
	36	vref-p-supply:
	37	description: The regulator supply for positive analog voltage reference
	38
	39	vref-n-supply:
	40	description: \|
	41	The regulator supply for negative analog voltage reference
	42	(Note that this must not go below GND or exceed vref-p)
	43	If not specified, this is assumed to be analog ground.
	44
	45	ti,acquisition-time:
	46	$ref: /schemas/types.yaml#/definitions/uint32
	47	enum: [ 6, 10, 18, 34 ]
	48	description: \|
	49	The number of conversion clock periods for the S/H's acquisition time.
	50	For high source impedances, this value can be increased to 18 or 34.
	51	For less ADC accuracy and/or slower CCLK frequencies this value may be
	52	decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the
	53	datasheet for details.
	54
	55	"#io-channel-cells":
	56	const: 1
	57
	58	required:
	59	- compatible
	60	- reg
	61	- interrupts
	62	- clocks
	63	- vref-p-supply
	64
	65	additionalProperties: false
	66
	67	examples:
	68	- \|
	69	#include <dt-bindings/interrupt-controller/irq.h>
	70	spi {
	71	#address-cells = <1>;
	72	#size-cells = <0>;
	73
	74	adc@0 {
	75	compatible = "ti,adc12138";
	76	reg = <0>;
	77	interrupts = <28 IRQ_TYPE_EDGE_RISING>;
	78	interrupt-parent = <&gpio1>;
	79	clocks = <&cclk>;
	80	vref-p-supply = <&ldo4_reg>;
	81	spi-max-frequency = <5000000>;
	82	ti,acquisition-time = <6>;
	83	#io-channel-cells = <1>;
	84	};
	85	};
	86	...

Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml+59−0

@@ -0,0 +1,59 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,adc128s052.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADC128S052 and similar ADCs
	8
	9	maintainers:
	10	- Angelo Compagnucci <angelo.compagnucci@gmail.com>
	11
	12	description: \|
	13	Family of 12 bit SPI ADCs with 2 to 8 channels with a range of different
	14	target sample rates.
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- ti,adc122s021
	20	- ti,adc122s051
	21	- ti,adc122s101
	22	- ti,adc124s021
	23	- ti,adc124s051
	24	- ti,adc124s101
	25	- ti,adc128s052
	26
	27	reg:
	28	maxItems: 1
	29
	30	spi-max-frequency: true
	31
	32	vref-supply: true
	33
	34	"#io-channel-cells":
	35	const: 1
	36
	37	required:
	38	- compatible
	39	- reg
	40	- vref-supply
	41
	42	additionalProperties: false
	43
	44	examples:
	45	- \|
	46	#include <dt-bindings/interrupt-controller/irq.h>
	47	spi {
	48	#address-cells = <1>;
	49	#size-cells = <0>;
	50
	51	adc@0 {
	52	compatible = "ti,adc128s052";
	53	reg = <0>;
	54	vref-supply = <&vdd_supply>;
	55	spi-max-frequency = <1000000>;
	56	#io-channel-cells = <1>;
	57	};
	58	};
	59	...

Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml+51−0

@@ -0,0 +1,51 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,adc161s626.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADC141S626 and ADC161S626 ADCs
	8
	9	maintainers:
	10	- Matt Ranostay <matt.ranostay@konsulko.com>
	11
	12	description: \|
	13	Single channel 14/16bit differential ADCs
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- ti,adc141s626
	19	- ti,adc161s626
	20
	21	reg:
	22	maxItems: 1
	23
	24	spi-max-frequency: true
	25
	26	vdda-supply: true
	27
	28	"#io-channel-cells":
	29	const: 1
	30
	31	required:
	32	- compatible
	33	- reg
	34
	35	additionalProperties: false
	36
	37	examples:
	38	- \|
	39	spi {
	40	#address-cells = <1>;
	41	#size-cells = <0>;
	42
	43	adc@0 {
	44	compatible = "ti,adc161s626";
	45	vdda-supply = <&vdda_fixed>;
	46	reg = <0>;
	47	spi-max-frequency = <4300000>;
	48	#io-channel-cells = <1>;
	49	};
	50	};
	51	...

Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml+112−0

@@ -0,0 +1,112 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,ads1015.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: TI ADS1015 4 channel I2C analog to digital converter
	8
	9	maintainers:
	10	- Daniel Baluta <daniel.baluta@nxp.com>
	11
	12	description: \|
	13	Datasheet at: https://www.ti.com/lit/gpn/ads1015
	14	Supports both single ended and differential channels.
	15
	16	properties:
	17	compatible:
	18	const: ti,ads1015
	19
	20	reg:
	21	maxItems: 1
	22
	23	"#address-cells":
	24	const: 1
	25
	26	"#size-cells":
	27	const: 0
	28
	29	"#io-channel-cells":
	30	const: 1
	31
	32	required:
	33	- compatible
	34	- reg
	35	- "#address-cells"
	36	- "#size-cells"
	37
	38	additionalProperties: false
	39
	40	patternProperties:
	41	"^channel@[0-7]+$":
	42	type: object
	43	description:
	44	Child nodes needed for each channel that the platform uses.
	45
	46	properties:
	47	reg:
	48	description: \|
	49	0: Voltage over AIN0 and AIN1.
	50	1: Voltage over AIN0 and AIN3.
	51	2: Voltage over AIN1 and AIN3.
	52	3: Voltage over AIN2 and AIN3.
	53	4: Voltage over AIN0 and GND.
	54	5: Voltage over AIN1 and GND.
	55	6: Voltage over AIN2 and GND.
	56	7: Voltage over AIN3 and GND.
	57	items:
	58	- minimum: 0
	59	maximum: 7
	60
	61	ti,gain:
	62	$ref: /schemas/types.yaml#/definitions/uint32
	63	minimum: 0
	64	maximum: 5
	65	description: \|
	66	pga is the programmable gain amplifier (values are full scale)
	67	0: +/- 6.144 V
	68	1: +/- 4.096 V
	69	2: +/- 2.048 V (default)
	70	3: +/- 1.024 V
	71	4: +/- 0.512 V
	72	5: +/- 0.256 V
	73
	74	ti,datarate:
	75	$ref: /schemas/types.yaml#/definitions/uint32
	76	minimum: 0
	77	maximum: 6
	78	description: \|
	79	Data acquisition rate in samples per second
	80	0: 128
	81	1: 250
	82	2: 490
	83	3: 920
	84	4: 1600 (default)
	85	5: 2400
	86	6: 3300
	87
	88	required:
	89	- reg
	90
	91	examples:
	92	- \|
	93	i2c {
	94	#address-cells = <1>;
	95	#size-cells = <0>;
	96
	97	adc@49 {
	98	compatible = "ti,ads1015";
	99	reg = <0x49>;
	100	#address-cells = <1>;
	101	#size-cells = <0>;
	102	channel@0 {
	103	reg = <0>;
	104	};
	105	channel@4 {
	106	reg = <4>;
	107	ti,gain = <3>;
	108	ti,datarate = <5>;
	109	};
	110	};
	111	};
	112	...

Documentation/devicetree/bindings/iio/adc/ti,ads7950.yaml+65−0

@@ -0,0 +1,65 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,ads7950.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADS7950 and similar ADCs
	8
	9	maintainers:
	10	- David Lechner <david@lechnology.com>
	11
	12	description: \|
	13	Family of 4-16 channel, 8-12 bit ADCs with SPI interface.
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- ti,ads7950
	19	- ti,ads7951
	20	- ti,ads7952
	21	- ti,ads7953
	22	- ti,ads7954
	23	- ti,ads7955
	24	- ti,ads7956
	25	- ti,ads7957
	26	- ti,ads7958
	27	- ti,ads7959
	28	- ti,ads7960
	29	- ti,ads7961
	30
	31	reg:
	32	maxItems: 1
	33
	34	spi-max-frequency:
	35	maximum: 20000000
	36
	37	vref-supply:
	38	description: Supplies the 2.5V or 5V reference voltage
	39
	40	"#io-channel-cells":
	41	const: 1
	42
	43	required:
	44	- compatible
	45	- reg
	46	- vref-supply
	47	- "#io-channel-cells"
	48
	49	additionalProperties: false
	50
	51	examples:
	52	- \|
	53	spi {
	54	#address-cells = <1>;
	55	#size-cells = <0>;
	56
	57	adc@0 {
	58	compatible = "ti,ads7957";
	59	reg = <0>;
	60	vref-supply = <&refin_supply>;
	61	spi-max-frequency = <10000000>;
	62	#io-channel-cells = <1>;
	63	};
	64	};
	65	...

Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml+51−0

@@ -0,0 +1,51 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,ads8344.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments ADS8344 ADC
	8
	9	maintainers:
	10	- Gregory Clement <gregory.clement@bootlin.com>
	11
	12	description: \|
	13	16bit 8-channel ADC with single ended inputs.
	14
	15	properties:
	16	compatible:
	17	const: ti,ads8344
	18
	19	reg:
	20	maxItems: 1
	21
	22	spi-max-frequency: true
	23
	24	vref-supply:
	25	description: Supply the 2.5V or 5V reference voltage
	26
	27	"#io-channel-cells":
	28	const: 1
	29
	30	required:
	31	- compatible
	32	- reg
	33	- vref-supply
	34
	35	additionalProperties: false
	36
	37	examples:
	38	- \|
	39	spi {
	40	#address-cells = <1>;
	41	#size-cells = <0>;
	42
	43	adc@0 {
	44	compatible = "ti,ads8344";
	45	reg = <0>;
	46	vref-supply = <&refin_supply>;
	47	spi-max-frequency = <10000000>;
	48	#io-channel-cells = <1>;
	49	};
	50	};
	51	...

Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml+52−0

@@ -0,0 +1,52 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,tlc4541.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments TLC4541 and similar ADCs
	8
	9	maintainers:
	10	- Phil Reid <preid@electromag.com.au>
	11
	12	description: \|
	13	14/16bit single channel ADC with SPI interface.
	14
	15	properties:
	16	compatible:
	17	enum:
	18	- ti,tlc3541
	19	- ti,tlc4541
	20
	21	reg:
	22	maxItems: 1
	23
	24	spi-max-frequency: true
	25
	26	vref-supply: true
	27
	28	"#io-channel-cells":
	29	const: 1
	30
	31	required:
	32	- compatible
	33	- reg
	34	- vref-supply
	35
	36	additionalProperties: false
	37
	38	examples:
	39	- \|
	40	spi {
	41	#address-cells = <1>;
	42	#size-cells = <0>;
	43
	44	adc@0 {
	45	compatible = "ti,tlc4541";
	46	reg = <0>;
	47	vref-supply = <&vdd_supply>;
	48	spi-max-frequency = <200000>;
	49	#io-channel-cells = <1>;
	50	};
	51	};
	52	...

Documentation/devicetree/bindings/iio/adc/ti,twl4030-madc.yaml+48−0

@@ -0,0 +1,48 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: MADC subsystem in the TWL4030 power module
	8
	9	maintainers:
	10	- Sebastian Reichel <sre@kernel.org>
	11
	12	description:
	13	The MADC subsystem in the TWL4030 consists of a 10-bit ADC
	14	combined with a 16-input analog multiplexer.
	15
	16	properties:
	17	compatible:
	18	const: ti,twl4030-madc
	19
	20	interrupts:
	21	maxItems: 1
	22
	23	ti,system-uses-second-madc-irq:
	24	type: boolean
	25	description:
	26	Set if the second madc irq register should be used, which is intended
	27	to be used by Co-Processors (e.g. a modem).
	28
	29	"#io-channel-cells":
	30	const: 1
	31
	32	required:
	33	- compatible
	34	- interrupts
	35	- "#io-channel-cells"
	36
	37	additionalProperties: false
	38
	39	examples:
	40	- \|
	41	twl {
	42	madc {
	43	compatible = "ti,twl4030-madc";
	44	interrupts = <3>;
	45	#io-channel-cells = <1>;
	46	};
	47	};
	48	...

Documentation/devicetree/bindings/iio/adc/ti-adc0832.txt+0−19

@@ -1,19 +0,0 @@
1	* Texas Instruments' ADC0831/ADC0832/ADC0832/ADC0838
2
3	Required properties:
4	- compatible: Should be one of
5	* "ti,adc0831"
6	* "ti,adc0832"
7	* "ti,adc0834"
8	* "ti,adc0838"
9	- reg: spi chip select number for the device
10	- vref-supply: The regulator supply for ADC reference voltage
11	- spi-max-frequency: Max SPI frequency to use (< 400000)
12
13	Example:
14	adc@0 {
15	compatible = "ti,adc0832";
16	reg = <0>;
17	vref-supply = <&vdd_supply>;
18	spi-max-frequency = <200000>;
19	};

Documentation/devicetree/bindings/iio/adc/ti-adc108s102.txt+0−18

@@ -1,18 +0,0 @@
1	* Texas Instruments' ADC108S102 and ADC128S102 ADC chip
2
3	Required properties:
4	- compatible: Should be "ti,adc108s102"
5	- reg: spi chip select number for the device
6	- vref-supply: The regulator supply for ADC reference voltage
7
8	Recommended properties:
9	- spi-max-frequency: Definition as per
10	Documentation/devicetree/bindings/spi/spi-bus.txt
11
12	Example:
13	adc@0 {
14	compatible = "ti,adc108s102";
15	reg = <0>;
16	vref-supply = <&vdd_supply>;
17	spi-max-frequency = <1000000>;
18	};

Documentation/devicetree/bindings/iio/adc/ti-adc12138.txt+0−37

@@ -1,37 +0,0 @@
1	* Texas Instruments' ADC12130/ADC12132/ADC12138
2
3	Required properties:
4	- compatible: Should be one of
5	* "ti,adc12130"
6	* "ti,adc12132"
7	* "ti,adc12138"
8	- reg: SPI chip select number for the device
9	- interrupts: Should contain interrupt for EOC (end of conversion)
10	- clocks: phandle to conversion clock input
11	- spi-max-frequency: Definision as per
12	Documentation/devicetree/bindings/spi/spi-bus.txt
13	- vref-p-supply: The regulator supply for positive analog voltage reference
14
15	Optional properties:
16	- vref-n-supply: The regulator supply for negative analog voltage reference
17	(Note that this must not go below GND or exceed vref-p)
18	If not specified, this is assumed to be analog ground.
19	- ti,acquisition-time: The number of conversion clock periods for the S/H's
20	acquisition time. Should be one of 6, 10, 18, 34. If not specified,
21	default value of 10 is used.
22	For high source impedances, this value can be increased to 18 or 34.
23	For less ADC accuracy and/or slower CCLK frequencies this value may be
24	decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the
25	datasheet for details.
26
27	Example:
28	adc@0 {
29	compatible = "ti,adc12138";
30	reg = <0>;
31	interrupts = <28 IRQ_TYPE_EDGE_RISING>;
32	interrupt-parent = <&gpio1>;
33	clocks = <&cclk>;
34	vref-p-supply = <&ldo4_reg>;
35	spi-max-frequency = <5000000>;
36	ti,acquisition-time = <6>;
37	};

Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt+0−25

@@ -1,25 +0,0 @@
1	* Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip
2
3	Required properties:
4	- compatible: Should be one of:
5	- "ti,adc128s052"
6	- "ti,adc122s021"
7	- "ti,adc122s051"
8	- "ti,adc122s101"
9	- "ti,adc124s021"
10	- "ti,adc124s051"
11	- "ti,adc124s101"
12	- reg: spi chip select number for the device
13	- vref-supply: The regulator supply for ADC reference voltage
14
15	Recommended properties:
16	- spi-max-frequency: Definition as per
17	Documentation/devicetree/bindings/spi/spi-bus.txt
18
19	Example:
20	adc@0 {
21	compatible = "ti,adc128s052";
22	reg = <0>;
23	vref-supply = <&vdd_supply>;
24	spi-max-frequency = <1000000>;
25	};

Documentation/devicetree/bindings/iio/adc/ti-adc161s626.txt+0−18

@@ -1,18 +0,0 @@
1	* Texas Instruments ADC141S626 and ADC161S626 chips
2
3	Required properties:
4	- compatible: Should be "ti,adc141s626" or "ti,adc161s626"
5	- reg: spi chip select number for the device
6	- vdda-supply: supply voltage to VDDA pin
7
8	Recommended properties:
9	- spi-max-frequency: Definition as per
10	Documentation/devicetree/bindings/spi/spi-bus.txt
11
12	Example:
13	adc@0 {
14	compatible = "ti,adc161s626";
15	vdda-supply = <&vdda_fixed>;
16	reg = <0>;
17	spi-max-frequency = <4300000>;
18	};

Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt+0−23

@@ -1,23 +0,0 @@
1	* Texas Instruments ADS7950 family of A/DC chips
2
3	Required properties:
4	- compatible: Must be one of "ti,ads7950", "ti,ads7951", "ti,ads7952",
5	"ti,ads7953", "ti,ads7954", "ti,ads7955", "ti,ads7956", "ti,ads7957",
6	"ti,ads7958", "ti,ads7959", "ti,ads7960", or "ti,ads7961"
7	- reg: SPI chip select number for the device
8	- #io-channel-cells: Must be 1 as per ../iio-bindings.txt
9	- vref-supply: phandle to a regulator node that supplies the 2.5V or 5V
10	reference voltage
11
12	Recommended properties:
13	- spi-max-frequency: Definition as per
14	Documentation/devicetree/bindings/spi/spi-bus.txt
15
16	Example:
17	adc@0 {
18	compatible = "ti,ads7957";
19	reg = <0>;
20	#io-channel-cells = <1>;
21	vref-supply = <&refin_supply>;
22	spi-max-frequency = <10000000>;
23	};

Documentation/devicetree/bindings/iio/adc/ti-ads8344.txt+0−19

@@ -1,19 +0,0 @@
1	* Texas Instruments ADS8344 A/DC chip
2
3	Required properties:
4	- compatible: Must be "ti,ads8344"
5	- reg: SPI chip select number for the device
6	- vref-supply: phandle to a regulator node that supplies the
7	reference voltage
8
9	Recommended properties:
10	- spi-max-frequency: Definition as per
11	Documentation/devicetree/bindings/spi/spi-bus.txt
12
13	Example:
14	adc@0 {
15	compatible = "ti,ads8344";
16	reg = <0>;
17	vref-supply = <&refin_supply>;
18	spi-max-frequency = <10000000>;
19	};

Documentation/devicetree/bindings/iio/adc/twl4030-madc.txt+0−24

@@ -1,24 +0,0 @@
1	* TWL4030 Monitoring Analog to Digital Converter (MADC)
2
3	The MADC subsystem in the TWL4030 consists of a 10-bit ADC
4	combined with a 16-input analog multiplexer.
5
6	Required properties:
7	- compatible: Should contain "ti,twl4030-madc".
8	- interrupts: IRQ line for the MADC submodule.
9	- #io-channel-cells: Should be set to <1>.
10
11	Optional properties:
12	- ti,system-uses-second-madc-irq: boolean, set if the second madc irq register
13	should be used, which is intended to be used
14	by Co-Processors (e.g. a modem).
15
16	Example:
17
18	&twl {
19	madc {
20	compatible = "ti,twl4030-madc";
21	interrupts = <3>;
22	#io-channel-cells = <1>;
23	};
24	};

Documentation/devicetree/bindings/iio/adc/vf610-adc.txt+0−36

@@ -1,36 +0,0 @@
1	Freescale vf610 Analog to Digital Converter bindings
2
3	The devicetree bindings are for the new ADC driver written for
4	vf610/i.MX6slx and upward SoCs from Freescale.
5
6	Required properties:
7	- compatible: Should contain "fsl,vf610-adc"
8	- reg: Offset and length of the register set for the device
9	- interrupts: Should contain the interrupt for the device
10	- clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock.
11	- clock-names: Must contain "adc", matching entry in the clocks property.
12	- vref-supply: The regulator supply ADC reference voltage.
13
14	Recommended properties:
15	- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating
16	requirements. Three values are required, depending on conversion mode:
17	- Frequency in normal mode (ADLPC=0, ADHSC=0)
18	- Frequency in high-speed mode (ADLPC=0, ADHSC=1)
19	- Frequency in low-power mode (ADLPC=1, ADHSC=0)
20	- min-sample-time: Minimum sampling time in nanoseconds. This value has
21	to be chosen according to the conversion mode and the connected analog
22	source resistance (R_as) and capacitance (C_as). Refer the datasheet's
23	operating requirements. A safe default across a wide range of R_as and
24	C_as as well as conversion modes is 1000ns.
25
26	Example:
27	adc0: adc@4003b000 {
28	compatible = "fsl,vf610-adc";
29	reg = <0x4003b000 0x1000>;
30	interrupts = <0 53 0x04>;
31	clocks = <&clks VF610_CLK_ADC0>;
32	clock-names = "adc";
33	fsl,adck-max-frequency = <30000000>, <40000000>,
34	<20000000>;
35	vref-supply = <&reg_vcc_3v3_mcu>;
36	};

Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml+4−0

     http://www.atlas-scientific.com/_files/_datasheets/_oem/pH_oem_datasheet.pdf
     http://www.atlas-scientific.com/_files/_datasheets/_oem/RTD_oem_datasheet.pdf
     http://www.atlas-scientific.com/_files/_datasheets/_probe/EZO_CO2_Datasheet.pdf
+    https://www.atlas-scientific.com/files/EZO_O2_datasheet.pdf
+    https://www.atlas-scientific.com/files/EZO_HUM_Datasheet.pdf
 properties:
   compatible:
       - atlas,ph-sm
       - atlas,rtd-sm
       - atlas,co2-ezo
+      - atlas,o2-ezo
+      - atlas,hum-ezo
   reg:
     maxItems: 1

Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml+77−0

@@ -0,0 +1,77 @@
	1	# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
	2	%YAML 1.2
	3	---
	4	$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#"
	5	$schema: "http://devicetree.org/meta-schemas/core.yaml#"
	6
	7	title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC
	8
	9	maintainers:
	10	- Michael Hennerich <michael.hennerich@analog.com>
	11
	12	description: \|
	13	Bindings for the Linear Technology LTC2632/2634/2636 DAC
	14	Datasheet can be found here: https://www.analog.com/media/en/technical-documentation/data-sheets/LTC263[246].pdf
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- lltc,ltc2632-l12
	20	- lltc,ltc2632-l10
	21	- lltc,ltc2632-l8
	22	- lltc,ltc2632-h12
	23	- lltc,ltc2632-h10
	24	- lltc,ltc2632-h8
	25	- lltc,ltc2634-l12
	26	- lltc,ltc2634-l10
	27	- lltc,ltc2634-l8
	28	- lltc,ltc2634-h12
	29	- lltc,ltc2634-h10
	30	- lltc,ltc2634-h8
	31	- lltc,ltc2636-l12
	32	- lltc,ltc2636-l10
	33	- lltc,ltc2636-l8
	34	- lltc,ltc2636-h12
	35	- lltc,ltc2636-h10
	36	- lltc,ltc2636-h8
	37
	38	reg:
	39	maxItems: 1
	40
	41	spi-max-frequency:
	42	maximum: 2000000
	43
	44	vref-supply:
	45	description:
	46	Phandle to the external reference voltage supply. This should
	47	only be set if there is an external reference voltage connected to the VREF
	48	pin. If the property is not set the internal reference is used.
	49
	50	required:
	51	- compatible
	52	- reg
	53
	54	additionalProperties: false
	55
	56	examples:
	57	- \|
	58	vref: regulator-vref {
	59	compatible = "regulator-fixed";
	60	regulator-name = "vref-ltc2632";
	61	regulator-min-microvolt = <1250000>;
	62	regulator-max-microvolt = <1250000>;
	63	regulator-always-on;
	64	};
	65
	66	spi {
	67	#address-cells = <1>;
	68	#size-cells = <0>;
	69
	70	dac@0 {
	71	compatible = "lltc,ltc2632";
	72	reg = <0>; /* CS0 */
	73	spi-max-frequency = <1000000>;
	74	vref-supply = <&vref>;
	75	};
	76	};
	77	...

Documentation/devicetree/bindings/iio/dac/ltc2632.txt+0−49

@@ -1,49 +0,0 @@
1	Linear Technology LTC2632/2634/2636 DAC
2
3	Required properties:
4	- compatible: Has to contain one of the following:
5	lltc,ltc2632-l12
6	lltc,ltc2632-l10
7	lltc,ltc2632-l8
8	lltc,ltc2632-h12
9	lltc,ltc2632-h10
10	lltc,ltc2632-h8
11	lltc,ltc2634-l12
12	lltc,ltc2634-l10
13	lltc,ltc2634-l8
14	lltc,ltc2634-h12
15	lltc,ltc2634-h10
16	lltc,ltc2634-h8
17	lltc,ltc2636-l12
18	lltc,ltc2636-l10
19	lltc,ltc2636-l8
20	lltc,ltc2636-h12
21	lltc,ltc2636-h10
22	lltc,ltc2636-h8
23
24	Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
25	apply. In particular, "reg" and "spi-max-frequency" properties must be given.
26
27	Optional properties:
28	- vref-supply: Phandle to the external reference voltage supply. This should
29	only be set if there is an external reference voltage connected to the VREF
30	pin. If the property is not set the internal reference is used.
31
32	Example:
33
34	vref: regulator-vref {
35	compatible = "regulator-fixed";
36	regulator-name = "vref-ltc2632";
37	regulator-min-microvolt = <1250000>;
38	regulator-max-microvolt = <1250000>;
39	regulator-always-on;
40	};
41
42	spi_master {
43	dac: ltc2632@0 {
44	compatible = "lltc,ltc2632-l12";
45	reg = <0>; /* CS0 */
46	spi-max-frequency = <1000000>;
47	vref-supply = <&vref>; /* optional */
48	};
49	};

Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml+59−0

@@ -0,0 +1,59 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	# Copyright 2020 Analog Devices Inc.
	3	%YAML 1.2
	4	---
	5	$id: http://devicetree.org/schemas/iio/gyroscope/adi,adxrs290.yaml#
	6	$schema: http://devicetree.org/meta-schemas/core.yaml#
	7
	8	title: Analog Devices ADXRS290 Dual-Axis MEMS Gyroscope
	9
	10	maintainers:
	11	- Nishant Malpani <nish.malpani25@gmail.com>
	12
	13	description: \|
	14	Bindings for the Analog Devices ADXRS290 dual-axis MEMS gyroscope device.
	15	https://www.analog.com/media/en/technical-documentation/data-sheets/ADXRS290.pdf
	16
	17	properties:
	18	compatible:
	19	const: adi,adxrs290
	20
	21	reg:
	22	maxItems: 1
	23
	24	spi-max-frequency:
	25	maximum: 5000000
	26
	27	spi-cpol: true
	28
	29	spi-cpha: true
	30
	31	interrupts:
	32	maxItems: 1
	33
	34	required:
	35	- compatible
	36	- reg
	37	- spi-max-frequency
	38	- spi-cpol
	39	- spi-cpha
	40
	41	additionalProperties: false
	42
	43	examples:
	44	- \|
	45	#include <dt-bindings/interrupt-controller/irq.h>
	46	spi {
	47	#address-cells = <1>;
	48	#size-cells = <0>;
	49	gyro@0 {
	50	compatible = "adi,adxrs290";
	51	reg = <0>;
	52	spi-max-frequency = <5000000>;
	53	spi-cpol;
	54	spi-cpha;
	55	interrupt-parent = <&gpio>;
	56	interrupts = <25 IRQ_TYPE_EDGE_RISING>;
	57	};
	58	};
	59	...

Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml+45−0

@@ -0,0 +1,45 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/humidity/ti,hdc2010.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: HDC2010/HDC2080 humidity and temperature iio sensors
	8
	9	maintainers:
	10	- Eugene Zaikonnikov <ez@norophonic.com>
	11
	12	description: \|
	13	Relative humidity and tempereature sensors on I2C bus
	14
	15	Datasheets are available at:
	16	http://www.ti.com/product/HDC2010/datasheet
	17	http://www.ti.com/product/HDC2080/datasheet
	18
	19	properties:
	20	compatible:
	21	enum:
	22	- ti,hdc2010
	23	- ti,hdc2080
	24
	25	vdd-supply:
	26	maxItems: 1
	27
	28	reg:
	29	maxItems: 1
	30
	31	required:
	32	- compatible
	33	- reg
	34
	35	examples:
	36	- \|
	37	i2c0 {
	38	#address-cells = <1>;
	39	#size-cells = <0>;
	40
	41	humidity@40 {
	42	compatible = "ti,hdc2010";
	43	reg = <0x40>;
	44	};
	45	};

Documentation/devicetree/bindings/iio/light/ams,as73211.yaml+54−0

@@ -0,0 +1,54 @@
	1	# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/light/ams,as73211.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: AMS AS73211 JENCOLOR(R) Digital XYZ Sensor
	8
	9	maintainers:
	10	- Christian Eggers <ceggers@arri.de>
	11
	12	description: \|
	13	XYZ True Color Sensor with I2C Interface
	14	https://ams.com/documents/20143/36005/AS73211_DS000556_3-01.pdf/a65474c0-b302-c2fd-e30a-c98df87616df
	15
	16	properties:
	17	compatible:
	18	enum:
	19	- ams,as73211
	20
	21	reg:
	22	description:
	23	I2C address of the device (0x74...0x77).
	24	maxItems: 1
	25
	26	interrupts:
	27	description:
	28	Interrupt specifier for the READY interrupt generated by the device.
	29	maxItems: 1
	30
	31	required:
	32	- compatible
	33	- reg
	34
	35	additionalProperties: false
	36
	37	examples:
	38	- \|
	39	#include <dt-bindings/interrupt-controller/irq.h>
	40
	41	i2c {
	42	#address-cells = <1>;
	43	#size-cells = <0>;
	44
	45	as73211@74 {
	46	compatible = "ams,as73211";
	47	reg = <0x74>;
	48	pinctrl-names = "default";
	49	pinctrl-0 = <&pinctrl_color_sensor>;
	50	interrupt-parent = <&gpio2>;
	51	interrupts = <19 IRQ_TYPE_EDGE_RISING>; /* READY */
	52	};
	53	};
	54	...

Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml+4−0

@@ -24,6 +24,10 @@ properties: · 23 unmodified lines
24	- vishay,vcnl4020	24	- vishay,vcnl4020
25	- vishay,vcnl4040	25	- vishay,vcnl4040
26	- vishay,vcnl4200	26	- vishay,vcnl4200
		27
		28	interrupts:
		29	maxItems: 1
		30
27	reg:	31	reg:
28	maxItems: 1	32	maxItems: 1
29		33

Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml+65−0

@@ -0,0 +1,65 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/iio/proximity/semtech,sx9310.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Semtech's SX9310 capacitive proximity sensor
	8
	9	maintainers:
	10	- Daniel Campello <campello@chromium.org>
	11
	12	description: \|
	13	Semtech's SX9310/SX9311 capacitive proximity/button solution.
	14
	15	Specifications about the devices can be found at:
	16	https://www.semtech.com/products/smart-sensing/sar-sensors/sx9310
	17
	18	properties:
	19	compatible:
	20	enum:
	21	- semtech,sx9310
	22	- semtech,sx9311
	23
	24	reg:
	25	maxItems: 1
	26
	27	interrupts:
	28	description:
	29	The sole interrupt generated by the device used to announce the
	30	preceding reading request has finished and that data is
	31	available or that a close/far proximity event has happened.
	32	maxItems: 1
	33
	34	vdd-supply:
	35	description: Main power supply
	36
	37	svdd-supply:
	38	description: Host interface power supply
	39
	40	"#io-channel-cells":
	41	const: 1
	42
	43	required:
	44	- compatible
	45	- reg
	46	- "#io-channel-cells"
	47
	48	additionalProperties: false
	49
	50	examples:
	51	- \|
	52	#include <dt-bindings/interrupt-controller/irq.h>
	53	i2c {
	54	#address-cells = <1>;
	55	#size-cells = <0>;
	56	proximity@28 {
	57	compatible = "semtech,sx9310";
	58	reg = <0x28>;
	59	interrupt-parent = <&pio>;
	60	interrupts = <5 IRQ_TYPE_LEVEL_LOW 5>;
	61	vdd-supply = <&pp3300_a>;
	62	svdd-supply = <&pp1800_prox>;
	63	#io-channel-cells = <1>;
	64	};
	65	};

Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt+6−0

 	- compatible: must be "st,vl53l0x"
 	- reg: i2c address where to find the device
+Optional properties:
+	- interrupts:	Interrupt for notifying that new measurement is ready.
+			If no interrupt is specified, polling is used.
 Example:
 vl53l0x@29 {
 	compatible = "st,vl53l0x";
 	reg = <0x29>;
+	interrupt-parent = <&gpio>;
+	interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
 };

Documentation/devicetree/bindings/trivial-devices.yaml+16−0

@@ -132,6 +132,22 @@ properties: · 131 unmodified lines
132	- mcube,mc3230	132	- mcube,mc3230
133	# MEMSIC 2-axis 8-bit digital accelerometer	133	# MEMSIC 2-axis 8-bit digital accelerometer
134	- memsic,mxc6225	134	- memsic,mxc6225
		135	# Microchip differential I2C ADC, 1 Channel, 18 bit
		136	- microchip,mcp3421
		137	# Microchip differential I2C ADC, 2 Channel, 18 bit
		138	- microchip,mcp3422
		139	# Microchip differential I2C ADC, 2 Channel, 18 bit
		140	- microchip,mcp3423
		141	# Microchip differential I2C ADC, 4 Channel, 18 bit
		142	- microchip,mcp3424
		143	# Microchip differential I2C ADC, 1 Channel, 16 bit
		144	- microchip,mcp3425
		145	# Microchip differential I2C ADC, 2 Channel, 16 bit
		146	- microchip,mcp3426
		147	# Microchip differential I2C ADC, 2 Channel, 16 bit
		148	- microchip,mcp3427
		149	# Microchip differential I2C ADC, 4 Channel, 16 bit
		150	- microchip,mcp3428
135	# Microchip 7-bit Single I2C Digital POT (5k)	151	# Microchip 7-bit Single I2C Digital POT (5k)
136	- microchip,mcp4017-502	152	- microchip,mcp4017-502
137	# Microchip 7-bit Single I2C Digital POT (10k)	153	# Microchip 7-bit Single I2C Digital POT (10k)

MAINTAINERS+21−51

@@ -950,37 +950,12 @@ S: Supported · 949 unmodified lines
950	F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi	950	F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi
951	F: drivers/net/ethernet/amd/xgbe/	951	F: drivers/net/ethernet/amd/xgbe/
952		952
953	ANALOG DEVICES INC AD5686 DRIVER	953	AMS AS73211 DRIVER
954	M: Michael Hennerich <Michael.Hennerich@analog.com>	954	M: Christian Eggers <ceggers@arri.de>
955	L: linux-pm@vger.kernel.org
956	S: Supported
957	W: http://ez.analog.com/community/linux-device-drivers
958	F: drivers/iio/dac/ad5686*
959	F: drivers/iio/dac/ad5696*
960
961	ANALOG DEVICES INC AD5758 DRIVER
962	M: Michael Hennerich <Michael.Hennerich@analog.com>
963	L: linux-iio@vger.kernel.org
964	S: Supported
965	W: http://ez.analog.com/community/linux-device-drivers
966	F: Documentation/devicetree/bindings/iio/dac/ad5758.txt
967	F: drivers/iio/dac/ad5758.c
968
969	ANALOG DEVICES INC AD7091R5 DRIVER
970	M: Beniamin Bia <beniamin.bia@analog.com>
971	L: linux-iio@vger.kernel.org
972	S: Supported
973	W: http://ez.analog.com/community/linux-device-drivers
974	F: Documentation/devicetree/bindings/iio/adc/adi,ad7091r5.yaml
975	F: drivers/iio/adc/ad7091r5.c
976
977	ANALOG DEVICES INC AD7124 DRIVER
978	M: Michael Hennerich <Michael.Hennerich@analog.com>
979	L: linux-iio@vger.kernel.org	955	L: linux-iio@vger.kernel.org
980	S: Supported	956	S: Maintained
981	W: http://ez.analog.com/community/linux-device-drivers	957	F: Documentation/devicetree/bindings/iio/light/ams,as73211.yaml
982	F: Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml	958	F: drivers/iio/light/as73211.c
983	F: drivers/iio/adc/ad7124.c
984		959
985	ANALOG DEVICES INC AD7192 DRIVER	960	ANALOG DEVICES INC AD7192 DRIVER
986	M: Alexandru Tachici <alexandru.tachici@analog.com>	961	M: Alexandru Tachici <alexandru.tachici@analog.com>
@@ -998,15 +973,6 @@ W: http://ez.analog.com/community/linux-device-drivers · 11 unmodified lines
998	F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml	973	F: Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml
999	F: drivers/iio/adc/ad7292.c	974	F: drivers/iio/adc/ad7292.c
1000		975
1001	ANALOG DEVICES INC AD7606 DRIVER
1002	M: Michael Hennerich <Michael.Hennerich@analog.com>
1003	M: Beniamin Bia <beniamin.bia@analog.com>
1004	L: linux-iio@vger.kernel.org
1005	S: Supported
1006	W: http://ez.analog.com/community/linux-device-drivers
1007	F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml
1008	F: drivers/iio/adc/ad7606.c
1009
1010	ANALOG DEVICES INC AD7768-1 DRIVER	976	ANALOG DEVICES INC AD7768-1 DRIVER
1011	M: Michael Hennerich <Michael.Hennerich@analog.com>	977	M: Michael Hennerich <Michael.Hennerich@analog.com>
1012	L: linux-iio@vger.kernel.org	978	L: linux-iio@vger.kernel.org
@@ -1068,7 +1034,6 @@ F: drivers/iio/imu/adis16475.c · 55 unmodified lines
1068	F: Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml	1034	F: Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml
1069		1035
1070	ANALOG DEVICES INC ADM1177 DRIVER	1036	ANALOG DEVICES INC ADM1177 DRIVER
1071	M: Beniamin Bia <beniamin.bia@analog.com>
1072	M: Michael Hennerich <Michael.Hennerich@analog.com>	1037	M: Michael Hennerich <Michael.Hennerich@analog.com>
1073	L: linux-hwmon@vger.kernel.org	1038	L: linux-hwmon@vger.kernel.org
1074	S: Supported	1039	S: Supported
@@ -1115,6 +1080,13 @@ L: linux-media@vger.kernel.org · 40 unmodified lines
1115	S: Maintained	1080	S: Maintained
1116	F: drivers/media/i2c/adv7842*	1081	F: drivers/media/i2c/adv7842*
1117		1082
		1083	ANALOG DEVICES INC ADXRS290 DRIVER
		1084	M: Nishant Malpani <nish.malpani25@gmail.com>
		1085	L: linux-iio@vger.kernel.org
		1086	S: Supported
		1087	F: drivers/iio/gyro/adxrs290.c
		1088	F: Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml
		1089
1118	ANALOG DEVICES INC ASOC CODEC DRIVERS	1090	ANALOG DEVICES INC ASOC CODEC DRIVERS
1119	M: Lars-Peter Clausen <lars@metafoo.de>	1091	M: Lars-Peter Clausen <lars@metafoo.de>
1120	M: Nuno Sá <nuno.sa@analog.com>	1092	M: Nuno Sá <nuno.sa@analog.com>
@@ -1135,15 +1107,6 @@ S: Supported · 14 unmodified lines
1135	W: http://ez.analog.com/community/linux-device-drivers	1107	W: http://ez.analog.com/community/linux-device-drivers
1136	F: drivers/dma/dma-axi-dmac.c	1108	F: drivers/dma/dma-axi-dmac.c
1137		1109
1138	ANALOG DEVICES INC HMC425A DRIVER
1139	M: Beniamin Bia <beniamin.bia@analog.com>
1140	M: Michael Hennerich <michael.hennerich@analog.com>
1141	L: linux-iio@vger.kernel.org
1142	S: Supported
1143	W: http://ez.analog.com/community/linux-device-drivers
1144	F: Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml
1145	F: drivers/iio/amplifiers/hmc425a.c
1146
1147	ANALOG DEVICES INC IIO DRIVERS	1110	ANALOG DEVICES INC IIO DRIVERS
1148	M: Lars-Peter Clausen <lars@metafoo.de>	1111	M: Lars-Peter Clausen <lars@metafoo.de>
1149	M: Michael Hennerich <Michael.Hennerich@analog.com>	1112	M: Michael Hennerich <Michael.Hennerich@analog.com>
@@ -1152,8 +1115,11 @@ W: http://wiki.analog.com/ · 2 unmodified lines
1152	W: http://ez.analog.com/community/linux-device-drivers	1115	W: http://ez.analog.com/community/linux-device-drivers
1153	F: Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523	1116	F: Documentation/ABI/testing/sysfs-bus-iio-frequency-ad9523
1154	F: Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350	1117	F: Documentation/ABI/testing/sysfs-bus-iio-frequency-adf4350
		1118	F: Documentation/devicetree/bindings/iio//adi,
		1119	F: Documentation/devicetree/bindings/iio/dac/ad5758.txt
1155	F: drivers/iio//ad	1120	F: drivers/iio//ad
1156	F: drivers/iio/adc/ltc249*	1121	F: drivers/iio/adc/ltc249*
		1122	F: drivers/iio/amplifiers/hmc425a.c
1157	F: drivers/staging/iio//ad	1123	F: drivers/staging/iio//ad
1158	X: drivers/iio//adjd	1124	X: drivers/iio//adjd
1159		1125
@@ -7944,6 +7910,12 @@ F: drivers/crypto/hisilicon/sec2/sec_crypto.c · 6784 unmodified lines
7944	F: drivers/crypto/hisilicon/sec2/sec_crypto.h	7910	F: drivers/crypto/hisilicon/sec2/sec_crypto.h
7945	F: drivers/crypto/hisilicon/sec2/sec_main.c	7911	F: drivers/crypto/hisilicon/sec2/sec_main.c
7946		7912
		7913	HISILICON STAGING DRIVERS FOR HIKEY 960/970
		7914	M: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
		7915	L: devel@driverdev.osuosl.org
		7916	S: Maintained
		7917	F: drivers/staging/hikey9xx/
		7918
7947	HISILICON TRUE RANDOM NUMBER GENERATOR V2 SUPPORT	7919	HISILICON TRUE RANDOM NUMBER GENERATOR V2 SUPPORT
7948	M: Zaibo Xu <xuzaibo@huawei.com>	7920	M: Zaibo Xu <xuzaibo@huawei.com>
7949	S: Maintained	7921	S: Maintained
@@ -8521,7 +8493,6 @@ F: drivers/iio/multiplexer/iio-mux.c · 571 unmodified lines
8521		8493
8522	IIO SUBSYSTEM AND DRIVERS	8494	IIO SUBSYSTEM AND DRIVERS
8523	M: Jonathan Cameron <jic23@kernel.org>	8495	M: Jonathan Cameron <jic23@kernel.org>
8524	R: Hartmut Knaack <knaack.h@gmx.de>
8525	R: Lars-Peter Clausen <lars@metafoo.de>	8496	R: Lars-Peter Clausen <lars@metafoo.de>
8526	R: Peter Meerwald-Stadler <pmeerw@pmeerw.net>	8497	R: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
8527	L: linux-iio@vger.kernel.org	8498	L: linux-iio@vger.kernel.org
@@ -16533,7 +16504,6 @@ F: drivers/staging/rtl8712/ · 8005 unmodified lines
16533		16504
16534	STAGING - SEPS525 LCD CONTROLLER DRIVERS	16505	STAGING - SEPS525 LCD CONTROLLER DRIVERS
16535	M: Michael Hennerich <michael.hennerich@analog.com>	16506	M: Michael Hennerich <michael.hennerich@analog.com>
16536	M: Beniamin Bia <beniamin.bia@analog.com>
16537	L: linux-fbdev@vger.kernel.org	16507	L: linux-fbdev@vger.kernel.org
16538	S: Supported	16508	S: Supported
16539	F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml	16509	F: Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml

drivers/counter/microchip-tcb-capture.c+1−1

@@ -253,7 +253,7 @@ static struct counter_count mchp_tc_counts[] = { · 252 unmodified lines
253	},	253	},
254	};	254	};
255		255
256	static struct counter_ops mchp_tc_ops = {	256	static const struct counter_ops mchp_tc_ops = {
257	.signal_read = mchp_tc_count_signal_read,	257	.signal_read = mchp_tc_count_signal_read,
258	.count_read = mchp_tc_count_read,	258	.count_read = mchp_tc_count_read,
259	.function_get = mchp_tc_count_function_get,	259	.function_get = mchp_tc_count_function_get,

drivers/counter/ti-eqep.c+1−1

@@ -439,7 +439,7 @@ static int ti_eqep_remove(struct platform_device *pdev) · 438 unmodified lines
439	struct device *dev = &pdev->dev;	439	struct device *dev = &pdev->dev;
440		440
441	counter_unregister(&priv->counter);	441	counter_unregister(&priv->counter);
442	pm_runtime_put_sync(dev),	442	pm_runtime_put_sync(dev);
443	pm_runtime_disable(dev);	443	pm_runtime_disable(dev);
444		444
445	return 0;	445	return 0;

drivers/iio/Kconfig+1−1

@@ -63,7 +63,7 @@ config IIO_SW_TRIGGER · 62 unmodified lines
63	using the API provided.	63	using the API provided.
64		64
65	config IIO_TRIGGERED_EVENT	65	config IIO_TRIGGERED_EVENT
66	tristate	66	tristate "Enable triggered events support"
67	select IIO_TRIGGER	67	select IIO_TRIGGER
68	help	68	help
69	Provides helper functions for setting up triggered events.	69	Provides helper functions for setting up triggered events.

drivers/iio/accel/adis16201.c+3−23

 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
 	if (ret)
 		return ret;
 	ret = adis_initial_startup(st);
 	if (ret)
-		goto error_cleanup_buffer_trigger;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret < 0)
-		goto error_cleanup_buffer_trigger;
-	return 0;
-error_cleanup_buffer_trigger:
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return ret;
-}
-static int adis16201_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 static struct spi_driver adis16201_driver = {
 		.name = "adis16201",
 	},
 	.probe = adis16201_probe,
-	.remove = adis16201_remove,
 };
 module_spi_driver(adis16201_driver);

drivers/iio/accel/adis16209.c+3−22

 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
 	if (ret)
 		return ret;
 	ret = adis_initial_startup(st);
 	if (ret)
-		goto error_cleanup_buffer_trigger;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_cleanup_buffer_trigger;
-	return 0;
-error_cleanup_buffer_trigger:
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return ret;
-}
-static int adis16209_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 static struct spi_driver adis16209_driver = {
 		.name = "adis16209",
 	},
 	.probe = adis16209_probe,
-	.remove = adis16209_remove,
 };
 module_spi_driver(adis16209_driver);

drivers/iio/accel/adxl372.c+299−12

@@ -5,6 +5,7 @@ · 4 unmodified lines
5	* Copyright 2018 Analog Devices Inc.	5	* Copyright 2018 Analog Devices Inc.
6	*/	6	*/
7		7
		8	#include <linux/bitfield.h>
8	#include <linux/bitops.h>	9	#include <linux/bitops.h>
9	#include <linux/interrupt.h>	10	#include <linux/interrupt.h>
10	#include <linux/irq.h>	11	#include <linux/irq.h>
@@ -113,6 +114,11 @@ · 102 unmodified lines
113	#define ADXL372_STATUS_1_AWAKE(x) (((x) >> 6) & 0x1)	114	#define ADXL372_STATUS_1_AWAKE(x) (((x) >> 6) & 0x1)
114	#define ADXL372_STATUS_1_ERR_USR_REGS(x) (((x) >> 7) & 0x1)	115	#define ADXL372_STATUS_1_ERR_USR_REGS(x) (((x) >> 7) & 0x1)
115		116
		117	/* ADXL372_STATUS_2 */
		118	#define ADXL372_STATUS_2_INACT(x) (((x) >> 4) & 0x1)
		119	#define ADXL372_STATUS_2_ACT(x) (((x) >> 5) & 0x1)
		120	#define ADXL372_STATUS_2_AC2(x) (((x) >> 6) & 0x1)
		121
116	/* ADXL372_INT1_MAP */	122	/* ADXL372_INT1_MAP */
117	#define ADXL372_INT1_MAP_DATA_RDY_MSK BIT(0)	123	#define ADXL372_INT1_MAP_DATA_RDY_MSK BIT(0)
118	#define ADXL372_INT1_MAP_DATA_RDY_MODE(x) (((x) & 0x1) << 0)	124	#define ADXL372_INT1_MAP_DATA_RDY_MODE(x) (((x) & 0x1) << 0)
@@ -131,8 +137,17 @@ · 12 unmodified lines
131	#define ADXL372_INT1_MAP_LOW_MSK BIT(7)	137	#define ADXL372_INT1_MAP_LOW_MSK BIT(7)
132	#define ADXL372_INT1_MAP_LOW_MODE(x) (((x) & 0x1) << 7)	138	#define ADXL372_INT1_MAP_LOW_MODE(x) (((x) & 0x1) << 7)
133		139
		140	/* ADX372_THRESH */
		141	#define ADXL372_THRESH_VAL_H_MSK GENMASK(10, 3)
		142	#define ADXL372_THRESH_VAL_H_SEL(x) FIELD_GET(ADXL372_THRESH_VAL_H_MSK, x)
		143	#define ADXL372_THRESH_VAL_L_MSK GENMASK(2, 0)
		144	#define ADXL372_THRESH_VAL_L_SEL(x) FIELD_GET(ADXL372_THRESH_VAL_L_MSK, x)
		145
134	/* The ADXL372 includes a deep, 512 sample FIFO buffer */	146	/* The ADXL372 includes a deep, 512 sample FIFO buffer */
135	#define ADXL372_FIFO_SIZE 512	147	#define ADXL372_FIFO_SIZE 512
		148	#define ADXL372_X_AXIS_EN(x) ((x) & BIT(0))
		149	#define ADXL372_Y_AXIS_EN(x) ((x) & BIT(1))
		150	#define ADXL372_Z_AXIS_EN(x) ((x) & BIT(2))
136		151
137	/*	152	/*
138	* At +/- 200g with 12-bit resolution, scale is computed as:	153	* At +/- 200g with 12-bit resolution, scale is computed as:
@@ -222,6 +237,20 @@ static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = { · 83 unmodified lines
222	{ BIT(0) \| BIT(1) \| BIT(2), ADXL372_XYZ_FIFO },	237	{ BIT(0) \| BIT(1) \| BIT(2), ADXL372_XYZ_FIFO },
223	};	238	};
224		239
		240	static const struct iio_event_spec adxl372_events[] = {
		241	{
		242	.type = IIO_EV_TYPE_THRESH,
		243	.dir = IIO_EV_DIR_RISING,
		244	.mask_separate = BIT(IIO_EV_INFO_VALUE),
		245	.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD) \| BIT(IIO_EV_INFO_ENABLE),
		246	}, {
		247	.type = IIO_EV_TYPE_THRESH,
		248	.dir = IIO_EV_DIR_FALLING,
		249	.mask_separate = BIT(IIO_EV_INFO_VALUE),
		250	.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD) \| BIT(IIO_EV_INFO_ENABLE),
		251	},
		252	};
		253
225	#define ADXL372_ACCEL_CHANNEL(index, reg, axis) { \	254	#define ADXL372_ACCEL_CHANNEL(index, reg, axis) { \
226	.type = IIO_ACCEL, \	255	.type = IIO_ACCEL, \
227	.address = reg, \	256	.address = reg, \
@@ -239,6 +268,8 @@ static const struct adxl372_axis_lookup adxl372_axis_lookup_table[] = { · 11 unmodified lines
239	.shift = 4, \	268	.shift = 4, \
240	.endianness = IIO_BE, \	269	.endianness = IIO_BE, \
241	}, \	270	}, \
		271	.event_spec = adxl372_events, \
		272	.num_event_specs = ARRAY_SIZE(adxl372_events) \
242	}	273	}
243		274
244	static const struct iio_chan_spec adxl372_channels[] = {	275	static const struct iio_chan_spec adxl372_channels[] = {
@@ -252,8 +283,10 @@ struct adxl372_state { · 7 unmodified lines
252	struct device *dev;	283	struct device *dev;
253	struct regmap *regmap;	284	struct regmap *regmap;
254	struct iio_trigger *dready_trig;	285	struct iio_trigger *dready_trig;
		286	struct iio_trigger *peak_datardy_trig;
255	enum adxl372_fifo_mode fifo_mode;	287	enum adxl372_fifo_mode fifo_mode;
256	enum adxl372_fifo_format fifo_format;	288	enum adxl372_fifo_format fifo_format;
		289	unsigned int fifo_axis_mask;
257	enum adxl372_op_mode op_mode;	290	enum adxl372_op_mode op_mode;
258	enum adxl372_act_proc_mode act_proc_mode;	291	enum adxl372_act_proc_mode act_proc_mode;
259	enum adxl372_odr odr;	292	enum adxl372_odr odr;
@@ -261,10 +294,12 @@ struct adxl372_state { · 1 unmodified line
261	u32 act_time_ms;	294	u32 act_time_ms;
262	u32 inact_time_ms;	295	u32 inact_time_ms;
263	u8 fifo_set_size;	296	u8 fifo_set_size;
264	u8 int1_bitmask;	297	unsigned long int1_bitmask;
265	u8 int2_bitmask;	298	unsigned long int2_bitmask;
266	u16 watermark;	299	u16 watermark;
267	__be16 fifo_buf[ADXL372_FIFO_SIZE];	300	__be16 fifo_buf[ADXL372_FIFO_SIZE];
		301	bool peak_fifo_mode_en;
		302	struct mutex threshold_m; /* lock for threshold */
268	};	303	};
269		304
270	static const unsigned long adxl372_channel_masks[] = {	305	static const unsigned long adxl372_channel_masks[] = {
@@ -276,6 +311,46 @@ static const unsigned long adxl372_channel_masks[] = { · 5 unmodified lines
276	0	311	0
277	};	312	};
278		313
		314	static ssize_t adxl372_read_threshold_value(struct iio_dev *indio_dev, unsigned int addr,
		315	u16 *threshold)
		316	{
		317	struct adxl372_state *st = iio_priv(indio_dev);
		318	__be16 raw_regval;
		319	u16 regval;
		320	int ret;
		321
		322	ret = regmap_bulk_read(st->regmap, addr, &raw_regval, sizeof(raw_regval));
		323	if (ret < 0)
		324	return ret;
		325
		326	regval = be16_to_cpu(raw_regval);
		327	regval >>= 5;
		328
		329	*threshold = regval;
		330
		331	return 0;
		332	}
		333
		334	static ssize_t adxl372_write_threshold_value(struct iio_dev *indio_dev, unsigned int addr,
		335	u16 threshold)
		336	{
		337	struct adxl372_state *st = iio_priv(indio_dev);
		338	int ret;
		339
		340	mutex_lock(&st->threshold_m);
		341	ret = regmap_write(st->regmap, addr, ADXL372_THRESH_VAL_H_SEL(threshold));
		342	if (ret < 0)
		343	goto unlock;
		344
		345	ret = regmap_update_bits(st->regmap, addr + 1, GENMASK(7, 5),
		346	ADXL372_THRESH_VAL_L_SEL(threshold) << 5);
		347
		348	unlock:
		349	mutex_unlock(&st->threshold_m);
		350
		351	return ret;
		352	}
		353
279	static int adxl372_read_axis(struct adxl372_state *st, u8 addr)	354	static int adxl372_read_axis(struct adxl372_state *st, u8 addr)
280	{	355	{
281	__be16 regval;	356	__be16 regval;
@@ -453,8 +528,8 @@ static int adxl372_set_inactivity_time_ms(struct adxl372_state *st, · 171 unmodified lines
453	}	528	}
454		529
455	static int adxl372_set_interrupts(struct adxl372_state *st,	530	static int adxl372_set_interrupts(struct adxl372_state *st,
456	unsigned char int1_bitmask,	531	unsigned long int1_bitmask,
457	unsigned char int2_bitmask)	532	unsigned long int2_bitmask)
458	{	533	{
459	int ret;	534	int ret;
460		535
@@ -523,6 +598,39 @@ static int adxl372_get_status(struct adxl372_state *st, · 62 unmodified lines
523	return ret;	598	return ret;
524	}	599	}
525		600
		601	static void adxl372_arrange_axis_data(struct adxl372_state st, __be16 sample)
		602	{
		603	__be16 axis_sample[3];
		604	int i = 0;
		605
		606	memset(axis_sample, 0, 3 * sizeof(__be16));
		607	if (ADXL372_X_AXIS_EN(st->fifo_axis_mask))
		608	axis_sample[i++] = sample[0];
		609	if (ADXL372_Y_AXIS_EN(st->fifo_axis_mask))
		610	axis_sample[i++] = sample[1];
		611	if (ADXL372_Z_AXIS_EN(st->fifo_axis_mask))
		612	axis_sample[i++] = sample[2];
		613
		614	memcpy(sample, axis_sample, 3 * sizeof(__be16));
		615	}
		616
		617	static void adxl372_push_event(struct iio_dev *indio_dev, s64 timestamp, u8 status2)
		618	{
		619	unsigned int ev_dir = IIO_EV_DIR_NONE;
		620
		621	if (ADXL372_STATUS_2_ACT(status2))
		622	ev_dir = IIO_EV_DIR_RISING;
		623
		624	if (ADXL372_STATUS_2_INACT(status2))
		625	ev_dir = IIO_EV_DIR_FALLING;
		626
		627	if (ev_dir != IIO_EV_DIR_NONE)
		628	iio_push_event(indio_dev,
		629	IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_X_OR_Y_OR_Z,
		630	IIO_EV_TYPE_THRESH, ev_dir),
		631	timestamp);
		632	}
		633
526	static irqreturn_t adxl372_trigger_handler(int irq, void *p)	634	static irqreturn_t adxl372_trigger_handler(int irq, void *p)
527	{	635	{
528	struct iio_poll_func *pf = p;	636	struct iio_poll_func *pf = p;
@@ -536,6 +644,8 @@ static irqreturn_t adxl372_trigger_handler(int irq, void *p) · 7 unmodified lines
536	if (ret < 0)	644	if (ret < 0)
537	goto err;	645	goto err;
538		646
		647	adxl372_push_event(indio_dev, iio_get_time_ns(indio_dev), status2);
		648
539	if (st->fifo_mode != ADXL372_FIFO_BYPASSED &&	649	if (st->fifo_mode != ADXL372_FIFO_BYPASSED &&
540	ADXL372_STATUS_1_FIFO_FULL(status1)) {	650	ADXL372_STATUS_1_FIFO_FULL(status1)) {
541	/*	651	/*
@@ -554,8 +664,12 @@ static irqreturn_t adxl372_trigger_handler(int irq, void *p) · 12 unmodified lines
554	goto err;	664	goto err;
555		665
556	/* Each sample is 2 bytes */	666	/* Each sample is 2 bytes */
557	for (i = 0; i < fifo_entries; i += st->fifo_set_size)	667	for (i = 0; i < fifo_entries; i += st->fifo_set_size) {
		668	/* filter peak detection data */
		669	if (st->peak_fifo_mode_en)
		670	adxl372_arrange_axis_data(st, &st->fifo_buf[i]);
558	iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);	671	iio_push_to_buffers(indio_dev, &st->fifo_buf[i]);
		672	}
559	}	673	}
560	err:	674	err:
561	iio_trigger_notify_done(indio_dev->trig);	675	iio_trigger_notify_done(indio_dev->trig);
@@ -723,6 +837,129 @@ static int adxl372_write_raw(struct iio_dev *indio_dev, · 161 unmodified lines
723	}	837	}
724	}	838	}
725		839
		840	static int adxl372_read_event_value(struct iio_dev indio_dev, const struct iio_chan_spec chan,
		841	enum iio_event_type type, enum iio_event_direction dir,
		842	enum iio_event_info info, int val, int val2)
		843	{
		844	struct adxl372_state *st = iio_priv(indio_dev);
		845	unsigned int addr;
		846	u16 raw_value;
		847	int ret;
		848
		849	switch (info) {
		850	case IIO_EV_INFO_VALUE:
		851	switch (dir) {
		852	case IIO_EV_DIR_RISING:
		853	addr = ADXL372_X_THRESH_ACT_H + 2 * chan->scan_index;
		854	ret = adxl372_read_threshold_value(indio_dev, addr, &raw_value);
		855	if (ret < 0)
		856	return ret;
		857	val = raw_value ADXL372_USCALE;
		858	*val2 = 1000000;
		859	return IIO_VAL_FRACTIONAL;
		860	case IIO_EV_DIR_FALLING:
		861	addr = ADXL372_X_THRESH_INACT_H + 2 * chan->scan_index;
		862	ret = adxl372_read_threshold_value(indio_dev, addr, &raw_value);
		863	if (ret < 0)
		864	return ret;
		865	val = raw_value ADXL372_USCALE;
		866	*val2 = 1000000;
		867	return IIO_VAL_FRACTIONAL;
		868	default:
		869	return -EINVAL;
		870	}
		871	case IIO_EV_INFO_PERIOD:
		872	switch (dir) {
		873	case IIO_EV_DIR_RISING:
		874	*val = st->act_time_ms;
		875	*val2 = 1000;
		876	return IIO_VAL_FRACTIONAL;
		877	case IIO_EV_DIR_FALLING:
		878	*val = st->inact_time_ms;
		879	*val2 = 1000;
		880	return IIO_VAL_FRACTIONAL;
		881	default:
		882	return -EINVAL;
		883	}
		884	default:
		885	return -EINVAL;
		886	}
		887	}
		888
		889	static int adxl372_write_event_value(struct iio_dev indio_dev, const struct iio_chan_spec chan,
		890	enum iio_event_type type, enum iio_event_direction dir,
		891	enum iio_event_info info, int val, int val2)
		892	{
		893	struct adxl372_state *st = iio_priv(indio_dev);
		894	unsigned int val_ms;
		895	unsigned int addr;
		896	u16 raw_val;
		897
		898	switch (info) {
		899	case IIO_EV_INFO_VALUE:
		900	raw_val = DIV_ROUND_UP(val * 1000000, ADXL372_USCALE);
		901	switch (dir) {
		902	case IIO_EV_DIR_RISING:
		903	addr = ADXL372_X_THRESH_ACT_H + 2 * chan->scan_index;
		904	return adxl372_write_threshold_value(indio_dev, addr, raw_val);
		905	case IIO_EV_DIR_FALLING:
		906	addr = ADXL372_X_THRESH_INACT_H + 2 * chan->scan_index;
		907	return adxl372_write_threshold_value(indio_dev, addr, raw_val);
		908	default:
		909	return -EINVAL;
		910	}
		911	case IIO_EV_INFO_PERIOD:
		912	val_ms = val * 1000 + DIV_ROUND_UP(val2, 1000);
		913	switch (dir) {
		914	case IIO_EV_DIR_RISING:
		915	return adxl372_set_activity_time_ms(st, val_ms);
		916	case IIO_EV_DIR_FALLING:
		917	return adxl372_set_inactivity_time_ms(st, val_ms);
		918	default:
		919	return -EINVAL;
		920	}
		921	default:
		922	return -EINVAL;
		923	}
		924	}
		925
		926	static int adxl372_read_event_config(struct iio_dev indio_dev, const struct iio_chan_spec chan,
		927	enum iio_event_type type, enum iio_event_direction dir)
		928	{
		929	struct adxl372_state *st = iio_priv(indio_dev);
		930
		931	switch (dir) {
		932	case IIO_EV_DIR_RISING:
		933	return FIELD_GET(ADXL372_INT1_MAP_ACT_MSK, st->int1_bitmask);
		934	case IIO_EV_DIR_FALLING:
		935	return FIELD_GET(ADXL372_INT1_MAP_INACT_MSK, st->int1_bitmask);
		936	default:
		937	return -EINVAL;
		938	}
		939	}
		940
		941	static int adxl372_write_event_config(struct iio_dev indio_dev, const struct iio_chan_spec chan,
		942	enum iio_event_type type, enum iio_event_direction dir,
		943	int state)
		944	{
		945	struct adxl372_state *st = iio_priv(indio_dev);
		946
		947	switch (dir) {
		948	case IIO_EV_DIR_RISING:
		949	set_mask_bits(&st->int1_bitmask, ADXL372_INT1_MAP_ACT_MSK,
		950	ADXL372_INT1_MAP_ACT_MODE(state));
		951	break;
		952	case IIO_EV_DIR_FALLING:
		953	set_mask_bits(&st->int1_bitmask, ADXL372_INT1_MAP_INACT_MSK,
		954	ADXL372_INT1_MAP_INACT_MODE(state));
		955	break;
		956	default:
		957	return -EINVAL;
		958	}
		959
		960	return adxl372_set_interrupts(st, st->int1_bitmask, 0);
		961	}
		962
726	static ssize_t adxl372_show_filter_freq_avail(struct device *dev,	963	static ssize_t adxl372_show_filter_freq_avail(struct device *dev,
727	struct device_attribute *attr,	964	struct device_attribute *attr,
728	char *buf)	965	char *buf)
@@ -795,7 +1032,8 @@ static int adxl372_buffer_postenable(struct iio_dev *indio_dev) · 66 unmodified lines
795	unsigned int mask;	1032	unsigned int mask;
796	int i, ret;	1033	int i, ret;
797		1034
798	ret = adxl372_set_interrupts(st, ADXL372_INT1_MAP_FIFO_FULL_MSK, 0);	1035	st->int1_bitmask \|= ADXL372_INT1_MAP_FIFO_FULL_MSK;
		1036	ret = adxl372_set_interrupts(st, st->int1_bitmask, 0);
799	if (ret < 0)	1037	if (ret < 0)
800	return ret;	1038	return ret;
801		1039
@@ -810,13 +1048,22 @@ static int adxl372_buffer_postenable(struct iio_dev *indio_dev) · 8 unmodified lines
810	return -EINVAL;	1048	return -EINVAL;
811		1049
812	st->fifo_format = adxl372_axis_lookup_table[i].fifo_format;	1050	st->fifo_format = adxl372_axis_lookup_table[i].fifo_format;
		1051	st->fifo_axis_mask = adxl372_axis_lookup_table[i].bits;
813	st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask,	1052	st->fifo_set_size = bitmap_weight(indio_dev->active_scan_mask,
814	indio_dev->masklength);	1053	indio_dev->masklength);
		1054
		1055	/* Configure the FIFO to store sets of impact event peak. */
		1056	if (st->peak_fifo_mode_en) {
		1057	st->fifo_set_size = 3;
		1058	st->fifo_format = ADXL372_XYZ_PEAK_FIFO;
		1059	}
		1060
815	/*	1061	/*
816	* The 512 FIFO samples can be allotted in several ways, such as:	1062	* The 512 FIFO samples can be allotted in several ways, such as:
817	* 170 sample sets of concurrent 3-axis data	1063	* 170 sample sets of concurrent 3-axis data
818	* 256 sample sets of concurrent 2-axis data (user selectable)	1064	* 256 sample sets of concurrent 2-axis data (user selectable)
819	* 512 sample sets of single-axis data	1065	* 512 sample sets of single-axis data
		1066	* 170 sets of impact event peak (x, y, z)
820	*/	1067	*/
821	if ((st->watermark * st->fifo_set_size) > ADXL372_FIFO_SIZE)	1068	if ((st->watermark * st->fifo_set_size) > ADXL372_FIFO_SIZE)
822	st->watermark = (ADXL372_FIFO_SIZE / st->fifo_set_size);	1069	st->watermark = (ADXL372_FIFO_SIZE / st->fifo_set_size);
@@ -826,7 +1073,8 @@ static int adxl372_buffer_postenable(struct iio_dev *indio_dev) · 3 unmodified lines
826	ret = adxl372_configure_fifo(st);	1073	ret = adxl372_configure_fifo(st);
827	if (ret < 0) {	1074	if (ret < 0) {
828	st->fifo_mode = ADXL372_FIFO_BYPASSED;	1075	st->fifo_mode = ADXL372_FIFO_BYPASSED;
829	adxl372_set_interrupts(st, 0, 0);	1076	st->int1_bitmask &= ~ADXL372_INT1_MAP_FIFO_FULL_MSK;
		1077	adxl372_set_interrupts(st, st->int1_bitmask, 0);
830	return ret;	1078	return ret;
831	}	1079	}
832		1080
@@ -837,7 +1085,8 @@ static int adxl372_buffer_predisable(struct iio_dev *indio_dev) · 4 unmodified lines
837	{	1085	{
838	struct adxl372_state *st = iio_priv(indio_dev);	1086	struct adxl372_state *st = iio_priv(indio_dev);
839		1087
840	adxl372_set_interrupts(st, 0, 0);	1088	st->int1_bitmask &= ~ADXL372_INT1_MAP_FIFO_FULL_MSK;
		1089	adxl372_set_interrupts(st, st->int1_bitmask, 0);
841	st->fifo_mode = ADXL372_FIFO_BYPASSED;	1090	st->fifo_mode = ADXL372_FIFO_BYPASSED;
842	adxl372_configure_fifo(st);	1091	adxl372_configure_fifo(st);
843		1092
@@ -854,12 +1103,11 @@ static int adxl372_dready_trig_set_state(struct iio_trigger *trig, · 10 unmodified lines
854	{	1103	{
855	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);	1104	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
856	struct adxl372_state *st = iio_priv(indio_dev);	1105	struct adxl372_state *st = iio_priv(indio_dev);
857	unsigned long int mask = 0;
858		1106
859	if (state)	1107	if (state)
860	mask = ADXL372_INT1_MAP_FIFO_FULL_MSK;	1108	st->int1_bitmask \|= ADXL372_INT1_MAP_FIFO_FULL_MSK;
861		1109
862	return adxl372_set_interrupts(st, mask, 0);	1110	return adxl372_set_interrupts(st, st->int1_bitmask, 0);
863	}	1111	}
864		1112
865	static int adxl372_validate_trigger(struct iio_dev *indio_dev,	1113	static int adxl372_validate_trigger(struct iio_dev *indio_dev,
@@ -867,7 +1115,7 @@ static int adxl372_validate_trigger(struct iio_dev *indio_dev, · 1 unmodified line
867	{	1115	{
868	struct adxl372_state *st = iio_priv(indio_dev);	1116	struct adxl372_state *st = iio_priv(indio_dev);
869		1117
870	if (st->dready_trig != trig)	1118	if (st->dready_trig != trig && st->peak_datardy_trig != trig)
871	return -EINVAL;	1119	return -EINVAL;
872		1120
873	return 0;	1121	return 0;
@@ -878,6 +1126,25 @@ static const struct iio_trigger_ops adxl372_trigger_ops = { · 4 unmodified lines
878	.set_trigger_state = adxl372_dready_trig_set_state,	1126	.set_trigger_state = adxl372_dready_trig_set_state,
879	};	1127	};
880		1128
		1129	static int adxl372_peak_dready_trig_set_state(struct iio_trigger *trig,
		1130	bool state)
		1131	{
		1132	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
		1133	struct adxl372_state *st = iio_priv(indio_dev);
		1134
		1135	if (state)
		1136	st->int1_bitmask \|= ADXL372_INT1_MAP_FIFO_FULL_MSK;
		1137
		1138	st->peak_fifo_mode_en = state;
		1139
		1140	return adxl372_set_interrupts(st, st->int1_bitmask, 0);
		1141	}
		1142
		1143	static const struct iio_trigger_ops adxl372_peak_data_trigger_ops = {
		1144	.validate_device = &iio_trigger_validate_own_device,
		1145	.set_trigger_state = adxl372_peak_dready_trig_set_state,
		1146	};
		1147
881	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400");	1148	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("400 800 1600 3200 6400");
882	static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,	1149	static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
883	0444, adxl372_show_filter_freq_avail, NULL, 0);	1150	0444, adxl372_show_filter_freq_avail, NULL, 0);
@@ -897,6 +1164,10 @@ static const struct iio_info adxl372_info = { · 13 unmodified lines
897	.attrs = &adxl372_attrs_group,	1164	.attrs = &adxl372_attrs_group,
898	.read_raw = adxl372_read_raw,	1165	.read_raw = adxl372_read_raw,
899	.write_raw = adxl372_write_raw,	1166	.write_raw = adxl372_write_raw,
		1167	.read_event_config = adxl372_read_event_config,
		1168	.write_event_config = adxl372_write_event_config,
		1169	.read_event_value = adxl372_read_event_value,
		1170	.write_event_value = adxl372_write_event_value,
900	.debugfs_reg_access = &adxl372_reg_access,	1171	.debugfs_reg_access = &adxl372_reg_access,
901	.hwfifo_set_watermark = adxl372_set_watermark,	1172	.hwfifo_set_watermark = adxl372_set_watermark,
902	};	1173	};
@@ -925,6 +1196,8 @@ int adxl372_probe(struct device dev, struct regmap regmap, · 22 unmodified lines
925	st->regmap = regmap;	1196	st->regmap = regmap;
926	st->irq = irq;	1197	st->irq = irq;
927		1198
		1199	mutex_init(&st->threshold_m);
		1200
928	indio_dev->channels = adxl372_channels;	1201	indio_dev->channels = adxl372_channels;
929	indio_dev->num_channels = ARRAY_SIZE(adxl372_channels);	1202	indio_dev->num_channels = ARRAY_SIZE(adxl372_channels);
930	indio_dev->available_scan_masks = adxl372_channel_masks;	1203	indio_dev->available_scan_masks = adxl372_channel_masks;
@@ -955,13 +1228,27 @@ int adxl372_probe(struct device dev, struct regmap regmap, · 24 unmodified lines
955	if (st->dready_trig == NULL)	1228	if (st->dready_trig == NULL)
956	return -ENOMEM;	1229	return -ENOMEM;
957		1230
		1231	st->peak_datardy_trig = devm_iio_trigger_alloc(dev,
		1232	"%s-dev%d-peak",
		1233	indio_dev->name,
		1234	indio_dev->id);
		1235	if (!st->peak_datardy_trig)
		1236	return -ENOMEM;
		1237
958	st->dready_trig->ops = &adxl372_trigger_ops;	1238	st->dready_trig->ops = &adxl372_trigger_ops;
		1239	st->peak_datardy_trig->ops = &adxl372_peak_data_trigger_ops;
959	st->dready_trig->dev.parent = dev;	1240	st->dready_trig->dev.parent = dev;
		1241	st->peak_datardy_trig->dev.parent = dev;
960	iio_trigger_set_drvdata(st->dready_trig, indio_dev);	1242	iio_trigger_set_drvdata(st->dready_trig, indio_dev);
		1243	iio_trigger_set_drvdata(st->peak_datardy_trig, indio_dev);
961	ret = devm_iio_trigger_register(dev, st->dready_trig);	1244	ret = devm_iio_trigger_register(dev, st->dready_trig);
962	if (ret < 0)	1245	if (ret < 0)
963	return ret;	1246	return ret;
964		1247
		1248	ret = devm_iio_trigger_register(dev, st->peak_datardy_trig);
		1249	if (ret < 0)
		1250	return ret;
		1251
965	indio_dev->trig = iio_trigger_get(st->dready_trig);	1252	indio_dev->trig = iio_trigger_get(st->dready_trig);
966		1253
967	ret = devm_request_threaded_irq(dev, st->irq,	1254	ret = devm_request_threaded_irq(dev, st->irq,

drivers/iio/accel/adxl372_i2c.c+8−0

  */
 #include <linux/i2c.h>
+#include <linux/mod_devicetable.h>
 #include <linux/module.h>
 #include <linux/regmap.h>
 };
 MODULE_DEVICE_TABLE(i2c, adxl372_i2c_id);
+static const struct of_device_id adxl372_of_match[] = {
+	{ .compatible = "adi,adxl372" },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, adxl372_of_match);
 static struct i2c_driver adxl372_i2c_driver = {
 	.driver = {
 		.name = "adxl372_i2c",
+		.of_match_table = adxl372_of_match,
 	},
 	.probe = adxl372_i2c_probe,
 	.id_table = adxl372_i2c_id,

drivers/iio/accel/adxl372_spi.c+2−2

@@ -40,8 +40,8 @@ static const struct spi_device_id adxl372_spi_id[] = { · 39 unmodified lines
40	MODULE_DEVICE_TABLE(spi, adxl372_spi_id);	40	MODULE_DEVICE_TABLE(spi, adxl372_spi_id);
41		41
42	static const struct of_device_id adxl372_of_match[] = {	42	static const struct of_device_id adxl372_of_match[] = {
43	{ .compatible = "adi,adxl372" },	43	{ .compatible = "adi,adxl372" },
44	{ },	44	{ }
45	};	45	};
46	MODULE_DEVICE_TABLE(of, adxl372_of_match);	46	MODULE_DEVICE_TABLE(of, adxl372_of_match);
47		47

drivers/iio/accel/bma180.c+9−13

@@ -673,7 +673,7 @@ static const struct iio_chan_spec_ext_info bma023_ext_info[] = { · 672 unmodified lines
673	};	673	};
674		674
675	static const struct iio_chan_spec_ext_info bma180_ext_info[] = {	675	static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
676	IIO_ENUM("power_mode", true, &bma180_power_mode_enum),	676	IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum),
677	IIO_ENUM_AVAILABLE("power_mode", &bma180_power_mode_enum),	677	IIO_ENUM_AVAILABLE("power_mode", &bma180_power_mode_enum),
678	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),	678	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
679	{ }	679	{ }
@@ -1000,19 +1000,15 @@ static int bma180_probe(struct i2c_client *client, · 320 unmodified lines
1000	return ret;	1000	return ret;
1001		1001
1002	data->vdd_supply = devm_regulator_get(dev, "vdd");	1002	data->vdd_supply = devm_regulator_get(dev, "vdd");
1003	if (IS_ERR(data->vdd_supply)) {	1003	if (IS_ERR(data->vdd_supply))
1004	if (PTR_ERR(data->vdd_supply) != -EPROBE_DEFER)	1004	return dev_err_probe(dev, PTR_ERR(data->vdd_supply),
1005	dev_err(dev, "Failed to get vdd regulator %d\n",	1005	"Failed to get vdd regulator\n");
1006	(int)PTR_ERR(data->vdd_supply));	1006
1007	return PTR_ERR(data->vdd_supply);
1008	}
1009	data->vddio_supply = devm_regulator_get(dev, "vddio");	1007	data->vddio_supply = devm_regulator_get(dev, "vddio");
1010	if (IS_ERR(data->vddio_supply)) {	1008	if (IS_ERR(data->vddio_supply))
1011	if (PTR_ERR(data->vddio_supply) != -EPROBE_DEFER)	1009	return dev_err_probe(dev, PTR_ERR(data->vddio_supply),
1012	dev_err(dev, "Failed to get vddio regulator %d\n",	1010	"Failed to get vddio regulator\n");
1013	(int)PTR_ERR(data->vddio_supply));	1011
1014	return PTR_ERR(data->vddio_supply);
1015	}
1016	/* Typical voltage 2.4V these are min and max */	1012	/* Typical voltage 2.4V these are min and max */
1017	ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);	1013	ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000);
1018	if (ret)	1014	if (ret)

drivers/iio/accel/bma220_spi.c+41−44

@@ -2,16 +2,18 @@ · 1 unmodified line
2	/**	2	/**
3	* BMA220 Digital triaxial acceleration sensor driver	3	* BMA220 Digital triaxial acceleration sensor driver
4	*	4	*
5	* Copyright (c) 2016, Intel Corporation.	5	* Copyright (c) 2016,2020 Intel Corporation.
6	*/	6	*/
7		7
8	#include <linux/acpi.h>	8	#include <linux/bits.h>
9	#include <linux/kernel.h>	9	#include <linux/kernel.h>
		10	#include <linux/mod_devicetable.h>
10	#include <linux/module.h>	11	#include <linux/module.h>
		12	#include <linux/spi/spi.h>
		13
11	#include <linux/iio/buffer.h>	14	#include <linux/iio/buffer.h>
12	#include <linux/iio/iio.h>	15	#include <linux/iio/iio.h>
13	#include <linux/iio/sysfs.h>	16	#include <linux/iio/sysfs.h>
14	#include <linux/spi/spi.h>
15	#include <linux/iio/trigger_consumer.h>	17	#include <linux/iio/trigger_consumer.h>
16	#include <linux/iio/triggered_buffer.h>	18	#include <linux/iio/triggered_buffer.h>
17		19
@@ -23,14 +25,13 @@ · 5 unmodified lines
23	#define BMA220_REG_SUSPEND 0x18	25	#define BMA220_REG_SUSPEND 0x18
24		26
25	#define BMA220_CHIP_ID 0xDD	27	#define BMA220_CHIP_ID 0xDD
26	#define BMA220_READ_MASK 0x80	28	#define BMA220_READ_MASK BIT(7)
27	#define BMA220_RANGE_MASK 0x03	29	#define BMA220_RANGE_MASK GENMASK(1, 0)
28	#define BMA220_DATA_SHIFT 2	30	#define BMA220_DATA_SHIFT 2
29	#define BMA220_SUSPEND_SLEEP 0xFF	31	#define BMA220_SUSPEND_SLEEP 0xFF
30	#define BMA220_SUSPEND_WAKE 0x00	32	#define BMA220_SUSPEND_WAKE 0x00
31		33
32	#define BMA220_DEVICE_NAME "bma220"	34	#define BMA220_DEVICE_NAME "bma220"
33	#define BMA220_SCALE_AVAILABLE "0.623 1.248 2.491 4.983"
34		35
35	#define BMA220_ACCEL_CHANNEL(index, reg, axis) { \	36	#define BMA220_ACCEL_CHANNEL(index, reg, axis) { \
36	.type = IIO_ACCEL, \	37	.type = IIO_ACCEL, \
@@ -55,19 +56,8 @@ enum bma220_axis { · 18 unmodified lines
55	AXIS_Z,	56	AXIS_Z,
56	};	57	};
57		58
58	static IIO_CONST_ATTR(in_accel_scale_available, BMA220_SCALE_AVAILABLE);	59	static const int bma220_scale_table[][2] = {
59		60	{0, 623000}, {1, 248000}, {2, 491000}, {4, 983000},
60	static struct attribute *bma220_attributes[] = {
61	&iio_const_attr_in_accel_scale_available.dev_attr.attr,
62	NULL,
63	};
64
65	static const struct attribute_group bma220_attribute_group = {
66	.attrs = bma220_attributes,
67	};
68
69	static const int bma220_scale_table[][4] = {
70	{0, 623000}, {1, 248000}, {2, 491000}, {4, 983000}
71	};	61	};
72		62
73	struct bma220_data {	63	struct bma220_data {
@@ -182,10 +172,26 @@ static int bma220_write_raw(struct iio_dev *indio_dev, · 108 unmodified lines
182	return -EINVAL;	172	return -EINVAL;
183	}	173	}
184		174
		175	static int bma220_read_avail(struct iio_dev *indio_dev,
		176	struct iio_chan_spec const *chan,
		177	const int *vals, int type, int *length,
		178	long mask)
		179	{
		180	switch (mask) {
		181	case IIO_CHAN_INFO_SCALE:
		182	vals = (int )bma220_scale_table;
		183	*type = IIO_VAL_INT_PLUS_MICRO;
		184	length = ARRAY_SIZE(bma220_scale_table) 2;
		185	return IIO_AVAIL_LIST;
		186	default:
		187	return -EINVAL;
		188	}
		189	}
		190
185	static const struct iio_info bma220_info = {	191	static const struct iio_info bma220_info = {
186	.read_raw = bma220_read_raw,	192	.read_raw = bma220_read_raw,
187	.write_raw = bma220_write_raw,	193	.write_raw = bma220_write_raw,
188	.attrs = &bma220_attribute_group,	194	.read_avail = bma220_read_avail,
189	};	195	};
190		196
191	static int bma220_init(struct spi_device *spi)	197	static int bma220_init(struct spi_device *spi)
@@ -198,10 +204,12 @@ static int bma220_init(struct spi_device *spi) · 6 unmodified lines
198		204
199	/* Make sure the chip is powered on */	205	/* Make sure the chip is powered on */
200	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);	206	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
		207	if (ret == BMA220_SUSPEND_WAKE)
		208	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
201	if (ret < 0)	209	if (ret < 0)
202	return ret;	210	return ret;
203	else if (ret == BMA220_SUSPEND_WAKE)	211	if (ret == BMA220_SUSPEND_WAKE)
204	return bma220_read_reg(spi, BMA220_REG_SUSPEND);	212	return -EBUSY;
205		213
206	return 0;	214	return 0;
207	}	215	}
@@ -212,10 +220,12 @@ static int bma220_deinit(struct spi_device *spi) · 4 unmodified lines
212		220
213	/* Make sure the chip is powered off */	221	/* Make sure the chip is powered off */
214	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);	222	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
		223	if (ret == BMA220_SUSPEND_SLEEP)
		224	ret = bma220_read_reg(spi, BMA220_REG_SUSPEND);
215	if (ret < 0)	225	if (ret < 0)
216	return ret;	226	return ret;
217	else if (ret == BMA220_SUSPEND_SLEEP)	227	if (ret == BMA220_SUSPEND_SLEEP)
218	return bma220_read_reg(spi, BMA220_REG_SUSPEND);	228	return -EBUSY;
219		229
220	return 0;	230	return 0;
221	}	231	}
@@ -245,7 +255,7 @@ static int bma220_probe(struct spi_device *spi) · 23 unmodified lines
245	indio_dev->available_scan_masks = bma220_accel_scan_masks;	255	indio_dev->available_scan_masks = bma220_accel_scan_masks;
246		256
247	ret = bma220_init(data->spi_device);	257	ret = bma220_init(data->spi_device);
248	if (ret < 0)	258	if (ret)
249	return ret;	259	return ret;
250		260
251	ret = iio_triggered_buffer_setup(indio_dev, iio_pollfunc_store_time,	261	ret = iio_triggered_buffer_setup(indio_dev, iio_pollfunc_store_time,
@@ -278,56 +288,43 @@ static int bma220_remove(struct spi_device *spi) · 26 unmodified lines
278	return bma220_deinit(spi);	288	return bma220_deinit(spi);
279	}	289	}
280		290
281	#ifdef CONFIG_PM_SLEEP	291	static __maybe_unused int bma220_suspend(struct device *dev)
282	static int bma220_suspend(struct device *dev)
283	{	292	{
284	struct bma220_data *data =	293	struct bma220_data *data = iio_priv(dev_get_drvdata(dev));
285	iio_priv(spi_get_drvdata(to_spi_device(dev)));
286		294
287	/* The chip can be suspended/woken up by a simple register read. */	295	/* The chip can be suspended/woken up by a simple register read. */
288	return bma220_read_reg(data->spi_device, BMA220_REG_SUSPEND);	296	return bma220_read_reg(data->spi_device, BMA220_REG_SUSPEND);
289	}	297	}
290		298
291	static int bma220_resume(struct device *dev)	299	static __maybe_unused int bma220_resume(struct device *dev)
292	{	300	{
293	struct bma220_data *data =	301	struct bma220_data *data = iio_priv(dev_get_drvdata(dev));
294	iio_priv(spi_get_drvdata(to_spi_device(dev)));
295		302
296	return bma220_read_reg(data->spi_device, BMA220_REG_SUSPEND);	303	return bma220_read_reg(data->spi_device, BMA220_REG_SUSPEND);
297	}	304	}
298
299	static SIMPLE_DEV_PM_OPS(bma220_pm_ops, bma220_suspend, bma220_resume);	305	static SIMPLE_DEV_PM_OPS(bma220_pm_ops, bma220_suspend, bma220_resume);
300		306
301	#define BMA220_PM_OPS (&bma220_pm_ops)
302	#else
303	#define BMA220_PM_OPS NULL
304	#endif
305
306	static const struct spi_device_id bma220_spi_id[] = {	307	static const struct spi_device_id bma220_spi_id[] = {
307	{"bma220", 0},	308	{"bma220", 0},
308	{}	309	{}
309	};	310	};
310		311
311	#ifdef CONFIG_ACPI
312	static const struct acpi_device_id bma220_acpi_id[] = {	312	static const struct acpi_device_id bma220_acpi_id[] = {
313	{"BMA0220", 0},	313	{"BMA0220", 0},
314	{}	314	{}
315	};	315	};
316
317	MODULE_DEVICE_TABLE(spi, bma220_spi_id);	316	MODULE_DEVICE_TABLE(spi, bma220_spi_id);
318	#endif
319		317
320	static struct spi_driver bma220_driver = {	318	static struct spi_driver bma220_driver = {
321	.driver = {	319	.driver = {
322	.name = "bma220_spi",	320	.name = "bma220_spi",
323	.pm = BMA220_PM_OPS,	321	.pm = &bma220_pm_ops,
324	.acpi_match_table = ACPI_PTR(bma220_acpi_id),	322	.acpi_match_table = bma220_acpi_id,
325	},	323	},
326	.probe = bma220_probe,	324	.probe = bma220_probe,
327	.remove = bma220_remove,	325	.remove = bma220_remove,
328	.id_table = bma220_spi_id,	326	.id_table = bma220_spi_id,
329	};	327	};
330
331	module_spi_driver(bma220_driver);	328	module_spi_driver(bma220_driver);
332		329
333	MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");	330	MODULE_AUTHOR("Tiberiu Breana <tiberiu.a.breana@intel.com>");

drivers/iio/accel/cros_ec_accel_legacy.c+1−1

@@ -215,7 +215,7 @@ static int cros_ec_accel_legacy_probe(struct platform_device *pdev) · 214 unmodified lines
215	return -ENOMEM;	215	return -ENOMEM;
216		216
217	ret = cros_ec_sensors_core_init(pdev, indio_dev, true,	217	ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
218	cros_ec_sensors_capture, NULL);	218	cros_ec_sensors_capture, NULL, false);
219	if (ret)	219	if (ret)
220	return ret;	220	return ret;
221		221

drivers/iio/accel/mma8452.c+6−14

 	data->chip_info = match->data;
 	data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
-	if (IS_ERR(data->vdd_reg)) {
+	if (IS_ERR(data->vdd_reg))
-		if (PTR_ERR(data->vdd_reg) == -EPROBE_DEFER)
+		return dev_err_probe(&client->dev, PTR_ERR(data->vdd_reg),
-			return -EPROBE_DEFER;
+				     "failed to get VDD regulator!\n");
-		dev_err(&client->dev, "failed to get VDD regulator!\n");
-		return PTR_ERR(data->vdd_reg);
-	}
 	data->vddio_reg = devm_regulator_get(&client->dev, "vddio");
-	if (IS_ERR(data->vddio_reg)) {
+	if (IS_ERR(data->vddio_reg))
-		if (PTR_ERR(data->vddio_reg) == -EPROBE_DEFER)
+		return dev_err_probe(&client->dev, PTR_ERR(data->vddio_reg),
-			return -EPROBE_DEFER;
+				     "failed to get VDDIO regulator!\n");
-		dev_err(&client->dev, "failed to get VDDIO regulator!\n");
-		return PTR_ERR(data->vddio_reg);
-	}
 	ret = regulator_enable(data->vdd_reg);
 	if (ret) {

drivers/iio/adc/Kconfig+2−2

@@ -340,7 +340,7 @@ config AXP288_ADC · 339 unmodified lines
340		340
341	config BCM_IPROC_ADC	341	config BCM_IPROC_ADC
342	tristate "Broadcom IPROC ADC driver"	342	tristate "Broadcom IPROC ADC driver"
343	depends on ARCH_BCM_IPROC \|\| COMPILE_TEST	343	depends on (ARCH_BCM_IPROC && OF) \|\| COMPILE_TEST
344	depends on MFD_SYSCON	344	depends on MFD_SYSCON
345	default ARCH_BCM_CYGNUS	345	default ARCH_BCM_CYGNUS
346	help	346	help
@@ -863,7 +863,7 @@ config RN5T618_ADC · 516 unmodified lines
863		863
864	config ROCKCHIP_SARADC	864	config ROCKCHIP_SARADC
865	tristate "Rockchip SARADC driver"	865	tristate "Rockchip SARADC driver"
866	depends on ARCH_ROCKCHIP \|\| (ARM && COMPILE_TEST)	866	depends on ARCH_ROCKCHIP \|\| COMPILE_TEST
867	depends on RESET_CONTROLLER	867	depends on RESET_CONTROLLER
868	select IIO_BUFFER	868	select IIO_BUFFER
869	select IIO_TRIGGERED_BUFFER	869	select IIO_TRIGGERED_BUFFER

drivers/iio/adc/ad7291.c+21−14

 #include <linux/iio/sysfs.h>
 #include <linux/iio/events.h>
-#include <linux/platform_data/ad7291.h>
 /*
  * Simplified handling
  *
 static int ad7291_probe(struct i2c_client *client,
 			const struct i2c_device_id *id)
 {
-	struct ad7291_platform_data *pdata = client->dev.platform_data;
 	struct ad7291_chip_info *chip;
 	struct iio_dev *indio_dev;
 	int ret;
 		return -ENOMEM;
 	chip = iio_priv(indio_dev);
-	if (pdata && pdata->use_external_ref) {
-		chip->reg = devm_regulator_get(&client->dev, "vref");
-		if (IS_ERR(chip->reg))
-			return PTR_ERR(chip->reg);
-		ret = regulator_enable(chip->reg);
-		if (ret)
-			return ret;
-	}
 	mutex_init(&chip->state_lock);
 	/* this is only used for device removal purposes */
 	i2c_set_clientdata(client, indio_dev);
 			AD7291_T_SENSE_MASK | /* Tsense always enabled */
 			AD7291_ALERT_POLARITY; /* set irq polarity low level */
-	if (pdata && pdata->use_external_ref)
+	chip->reg = devm_regulator_get_optional(&client->dev, "vref");
+	if (IS_ERR(chip->reg)) {
+		if (PTR_ERR(chip->reg) != -ENODEV)
+			return PTR_ERR(chip->reg);
+		chip->reg = NULL;
+	}
+	if (chip->reg) {
+		ret = regulator_enable(chip->reg);
+		if (ret)
+			return ret;
 		chip->command |= AD7291_EXT_REF;
+	}
 	indio_dev->name = id->name;
 	indio_dev->channels = ad7291_channels;
 MODULE_DEVICE_TABLE(i2c, ad7291_id);
+static const struct of_device_id ad7291_of_match[] = {
+	{ .compatible = "adi,ad7291" },
+	{}
+};
+MODULE_DEVICE_TABLE(of, ad7291_of_match);
 static struct i2c_driver ad7291_driver = {
 	.driver = {
 		.name = KBUILD_MODNAME,
+		.of_match_table = ad7291_of_match,
 	},
 	.probe = ad7291_probe,
 	.remove = ad7291_remove,

drivers/iio/adc/ad7292.c+3−1

 	for_each_available_child_of_node(spi->dev.of_node, child) {
 		diff_channels = of_property_read_bool(child, "diff-channels");
-		if (diff_channels)
+		if (diff_channels) {
+			of_node_put(child);
 			break;
+		}
 	}
 	if (diff_channels) {

drivers/iio/adc/ad7949.c+1−1

@@ -39,7 +39,7 @@ static const struct ad7949_adc_spec ad7949_adc_spec[] = { · 38 unmodified lines
39	* struct ad7949_adc_chip - AD ADC chip	39	* struct ad7949_adc_chip - AD ADC chip
40	* @lock: protects write sequences	40	* @lock: protects write sequences
41	* @vref: regulator generating Vref	41	* @vref: regulator generating Vref
42	* @iio_dev: reference to iio structure	42	* @indio_dev: reference to iio structure
43	* @spi: reference to spi structure	43	* @spi: reference to spi structure
44	* @resolution: resolution of the chip	44	* @resolution: resolution of the chip
45	* @cfg: copy of the configuration register	45	* @cfg: copy of the configuration register

drivers/iio/adc/ad9467.c+90−34

 /* AN877_ADC_REG_OUTPUT_DELAY */
 #define AN877_ADC_DCO_DELAY_ENABLE		0x80
+/*
+ * Analog Devices AD9265 16-Bit, 125/105/80 MSPS ADC
+ */
+#define CHIPID_AD9265			0x64
+#define AD9265_DEF_OUTPUT_MODE		0x40
+#define AD9265_REG_VREF_MASK		0xC0
+/*
+ * Analog Devices AD9434 12-Bit, 370/500 MSPS ADC
+ */
+#define CHIPID_AD9434			0x6A
+#define AD9434_DEF_OUTPUT_MODE		0x00
+#define AD9434_REG_VREF_MASK		0xC0
 /*
  * Analog Devices AD9467 16-Bit, 200/250 MSPS ADC
  */
 #define AD9467_REG_VREF_MASK		0x0F
 enum {
+	ID_AD9265,
+	ID_AD9434,
 	ID_AD9467,
 };
+struct ad9467_chip_info {
+	struct adi_axi_adc_chip_info	axi_adc_info;
+	unsigned int			default_output_mode;
+	unsigned int			vref_mask;
+};
+#define to_ad9467_chip_info(_info)	\
+	container_of(_info, struct ad9467_chip_info, axi_adc_info)
 struct ad9467_state {
 	struct spi_device		*spi;
 	struct clk			*clk;
 	return 0;
 }
+static const unsigned int ad9265_scale_table[][2] = {
+	{1250, 0x00}, {1500, 0x40}, {1750, 0x80}, {2000, 0xC0},
+};
+static const unsigned int ad9434_scale_table[][2] = {
+	{1600, 0x1C}, {1580, 0x1D}, {1550, 0x1E}, {1520, 0x1F}, {1500, 0x00},
+	{1470, 0x01}, {1440, 0x02}, {1420, 0x03}, {1390, 0x04}, {1360, 0x05},
+	{1340, 0x06}, {1310, 0x07}, {1280, 0x08}, {1260, 0x09}, {1230, 0x0A},
+	{1200, 0x0B}, {1180, 0x0C},
+};
 static const unsigned int ad9467_scale_table[][2] = {
 	{2000, 0}, {2100, 6}, {2200, 7},
 	{2300, 8}, {2400, 9}, {2500, 10},
 	},								\
 }
+static const struct iio_chan_spec ad9434_channels[] = {
+	AD9467_CHAN(0, 0, 12, 'S'),
+};
 static const struct iio_chan_spec ad9467_channels[] = {
 	AD9467_CHAN(0, 0, 16, 'S'),
 };
-static const struct adi_axi_adc_chip_info ad9467_chip_tbl[] = {
+static const struct ad9467_chip_info ad9467_chip_tbl[] = {
+	[ID_AD9265] = {
+		.axi_adc_info = {
+			.id = CHIPID_AD9265,
+			.max_rate = 125000000UL,
+			.scale_table = ad9265_scale_table,
+			.num_scales = ARRAY_SIZE(ad9265_scale_table),
+			.channels = ad9467_channels,
+			.num_channels = ARRAY_SIZE(ad9467_channels),
+		},
+		.default_output_mode = AD9265_DEF_OUTPUT_MODE,
+		.vref_mask = AD9265_REG_VREF_MASK,
+	},
+	[ID_AD9434] = {
+		.axi_adc_info = {
+			.id = CHIPID_AD9434,
+			.max_rate = 500000000UL,
+			.scale_table = ad9434_scale_table,
+			.num_scales = ARRAY_SIZE(ad9434_scale_table),
+			.channels = ad9434_channels,
+			.num_channels = ARRAY_SIZE(ad9434_channels),
+		},
+		.default_output_mode = AD9434_DEF_OUTPUT_MODE,
+		.vref_mask = AD9434_REG_VREF_MASK,
+	},
 	[ID_AD9467] = {
-		.id = CHIPID_AD9467,
+		.axi_adc_info = {
-		.max_rate = 250000000UL,
+			.id = CHIPID_AD9467,
-		.scale_table = ad9467_scale_table,
+			.max_rate = 250000000UL,
-		.num_scales = ARRAY_SIZE(ad9467_scale_table),
+			.scale_table = ad9467_scale_table,
-		.channels = ad9467_channels,
+			.num_scales = ARRAY_SIZE(ad9467_scale_table),
-		.num_channels = ARRAY_SIZE(ad9467_channels),
+			.channels = ad9467_channels,
+			.num_channels = ARRAY_SIZE(ad9467_channels),
+		},
+		.default_output_mode = AD9467_DEF_OUTPUT_MODE,
+		.vref_mask = AD9467_REG_VREF_MASK,
 	},
 };
 static int ad9467_get_scale(struct adi_axi_adc_conv *conv, int *val, int *val2)
 {
 	const struct adi_axi_adc_chip_info *info = conv->chip_info;
+	const struct ad9467_chip_info *info1 = to_ad9467_chip_info(info);
 	struct ad9467_state *st = adi_axi_adc_conv_priv(conv);
-	unsigned int i, vref_val, vref_mask;
+	unsigned int i, vref_val;
 	vref_val = ad9467_spi_read(st->spi, AN877_ADC_REG_VREF);
-	switch (info->id) {
+	vref_val &= info1->vref_mask;
-	case CHIPID_AD9467:
-		vref_mask = AD9467_REG_VREF_MASK;
-		break;
-	default:
-		vref_mask = 0xFFFF;
-		break;
-	}
-	vref_val &= vref_mask;
 	for (i = 0; i < info->num_scales; i++) {
 		if (vref_val == info->scale_table[i][1])
 	return ad9467_outputmode_set(st->spi, st->output_mode);
 }
-static int ad9467_setup(struct ad9467_state *st, unsigned int chip_id)
-{
-	switch (chip_id) {
-	case CHIPID_AD9467:
-		st->output_mode = AD9467_DEF_OUTPUT_MODE |
-				  AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT;
-		return 0;
-	default:
-		return -EINVAL;
-	}
-}
 static void ad9467_clk_disable(void *data)
 {
 	struct ad9467_state *st = data;
 static int ad9467_probe(struct spi_device *spi)
 {
-	const struct adi_axi_adc_chip_info *info;
+	const struct ad9467_chip_info *info;
 	struct adi_axi_adc_conv *conv;
 	struct ad9467_state *st;
 	unsigned int id;
 	spi_set_drvdata(spi, st);
-	conv->chip_info = info;
+	conv->chip_info = &info->axi_adc_info;
 	id = ad9467_spi_read(spi, AN877_ADC_REG_CHIP_ID);
 	if (id != conv->chip_info->id) {
-		dev_err(&spi->dev, "Unrecognized CHIP_ID 0x%X\n", id);
+		dev_err(&spi->dev, "Mismatch CHIP_ID, got 0x%X, expected 0x%X\n",
+			id, conv->chip_info->id);
 		return -ENODEV;
 	}
 	conv->read_raw = ad9467_read_raw;
 	conv->preenable_setup = ad9467_preenable_setup;
-	return ad9467_setup(st, id);
+	st->output_mode = info->default_output_mode |
+			  AN877_ADC_OUTPUT_MODE_TWOS_COMPLEMENT;
+	return 0;
 }
 static const struct of_device_id ad9467_of_match[] = {
+	{ .compatible = "adi,ad9265", .data = &ad9467_chip_tbl[ID_AD9265], },
+	{ .compatible = "adi,ad9434", .data = &ad9467_chip_tbl[ID_AD9434], },
 	{ .compatible = "adi,ad9467", .data = &ad9467_chip_tbl[ID_AD9467], },
 	{}
 };

drivers/iio/adc/adi-axi-adc.c+1−1

@@ -276,7 +276,7 @@ static struct attribute *adi_axi_adc_attributes[] = { · 275 unmodified lines
276	static umode_t axi_adc_attr_is_visible(struct kobject *kobj,	276	static umode_t axi_adc_attr_is_visible(struct kobject *kobj,
277	struct attribute *attr, int n)	277	struct attribute *attr, int n)
278	{	278	{
279	struct device *dev = container_of(kobj, struct device, kobj);	279	struct device *dev = kobj_to_dev(kobj);
280	struct iio_dev *indio_dev = dev_to_iio_dev(dev);	280	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
281	struct adi_axi_adc_state *st = iio_priv(indio_dev);	281	struct adi_axi_adc_state *st = iio_priv(indio_dev);
282	struct adi_axi_adc_conv *conv = &st->client->conv;	282	struct adi_axi_adc_conv *conv = &st->client->conv;

drivers/iio/adc/at91-sama5d2_adc.c+15−11

 			       AT91_SAMA5D2_MAX_CHAN_IDX + 1);
 }
-static int at91_adc_buffer_preenable(struct iio_dev *indio_dev)
+static int at91_adc_buffer_prepare(struct iio_dev *indio_dev)
 {
 	int ret;
 	u8 bit;
 	/* we continue with the triggered buffer */
 	ret = at91_adc_dma_start(indio_dev);
 	if (ret) {
-		dev_err(&indio_dev->dev, "buffer postenable failed\n");
+		dev_err(&indio_dev->dev, "buffer prepare failed\n");
 		return ret;
 	}
 }
 static const struct iio_buffer_setup_ops at91_buffer_setup_ops = {
-	.preenable = &at91_adc_buffer_preenable,
 	.postdisable = &at91_adc_buffer_postdisable,
 };
 static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val)
 {
 	struct at91_adc_state *st = iio_priv(indio_dev);
+	int ret;
 	if (val > AT91_HWFIFO_MAX_SIZE)
 		return -EINVAL;
 	else if (val > 1)
 		at91_adc_dma_init(to_platform_device(&indio_dev->dev));
-	return 0;
+	/*
+	 * We can start the DMA only after setting the watermark and
+	 * having the DMA initialization completed
+	 */
+	ret = at91_adc_buffer_prepare(indio_dev);
+	if (ret)
+		at91_adc_dma_disable(to_platform_device(&indio_dev->dev));
+	return ret;
 }
 static int at91_adc_update_scan_mode(struct iio_dev *indio_dev,
 	mutex_init(&st->lock);
 	INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler);
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
-	if (!res)
+	if (IS_ERR(st->base))
-		return -EINVAL;
+		return PTR_ERR(st->base);
 	/* if we plan to use DMA, we need the physical address of the regs */
 	st->dma_st.phys_addr = res->start;
-	st->base = devm_ioremap_resource(&pdev->dev, res);
-	if (IS_ERR(st->base))
-		return PTR_ERR(st->base);
 	st->irq = platform_get_irq(pdev, 0);
 	if (st->irq <= 0) {
 		if (!st->irq)

drivers/iio/adc/axp20x_adc.c+7−7

 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
+#include <linux/property.h>
 #include <linux/regmap.h>
 #include <linux/thermal.h>
 struct axp20x_adc_iio {
 	struct regmap		*regmap;
-	struct axp_data		*data;
+	const struct axp_data	*data;
 };
 enum axp20x_adc_channel_v {
 	info->regmap = axp20x_dev->regmap;
 	indio_dev->modes = INDIO_DIRECT_MODE;
-	if (!pdev->dev.of_node) {
+	if (!dev_fwnode(&pdev->dev)) {
 		const struct platform_device_id *id;
 		id = platform_get_device_id(pdev);
-		info->data = (struct axp_data *)id->driver_data;
+		info->data = (const struct axp_data *)id->driver_data;
 	} else {
 		struct device *dev = &pdev->dev;
-		info->data = (struct axp_data *)of_device_get_match_data(dev);
+		info->data = device_get_match_data(dev);
 	}
 	indio_dev->name = platform_get_device_id(pdev)->name;
 static struct platform_driver axp20x_adc_driver = {
 	.driver = {
 		.name = "axp20x-adc",
-		.of_match_table = of_match_ptr(axp20x_adc_of_match),
+		.of_match_table = axp20x_adc_of_match,
 	},
 	.id_table = axp20x_adc_id_match,
 	.probe = axp20x_probe,

drivers/iio/adc/bcm_iproc_adc.c+2−2

@@ -4,7 +4,7 @@ · 3 unmodified lines
4	*/	4	*/
5		5
6	#include <linux/module.h>	6	#include <linux/module.h>
7	#include <linux/of.h>	7	#include <linux/mod_devicetable.h>
8	#include <linux/io.h>	8	#include <linux/io.h>
9	#include <linux/clk.h>	9	#include <linux/clk.h>
10	#include <linux/mfd/syscon.h>	10	#include <linux/mfd/syscon.h>
@@ -617,7 +617,7 @@ static struct platform_driver iproc_adc_driver = { · 606 unmodified lines
617	.remove = iproc_adc_remove,	617	.remove = iproc_adc_remove,
618	.driver = {	618	.driver = {
619	.name = "iproc-static-adc",	619	.name = "iproc-static-adc",
620	.of_match_table = of_match_ptr(iproc_adc_of_match),	620	.of_match_table = iproc_adc_of_match,
621	},	621	},
622	};	622	};
623	module_platform_driver(iproc_adc_driver);	623	module_platform_driver(iproc_adc_driver);

drivers/iio/adc/envelope-detector.c+6−10

@@ -348,11 +348,9 @@ static int envelope_detector_probe(struct platform_device *pdev) · 347 unmodified lines
348	indio_dev->num_channels = 1;	348	indio_dev->num_channels = 1;
349		349
350	env->dac = devm_iio_channel_get(dev, "dac");	350	env->dac = devm_iio_channel_get(dev, "dac");
351	if (IS_ERR(env->dac)) {	351	if (IS_ERR(env->dac))
352	if (PTR_ERR(env->dac) != -EPROBE_DEFER)	352	return dev_err_probe(dev, PTR_ERR(env->dac),
353	dev_err(dev, "failed to get dac input channel\n");	353	"failed to get dac input channel\n");
354	return PTR_ERR(env->dac);
355	}
356		354
357	env->comp_irq = platform_get_irq_byname(pdev, "comp");	355	env->comp_irq = platform_get_irq_byname(pdev, "comp");
358	if (env->comp_irq < 0)	356	if (env->comp_irq < 0)
@@ -360,11 +358,9 @@ static int envelope_detector_probe(struct platform_device *pdev) · 1 unmodified line
360		358
361	ret = devm_request_irq(dev, env->comp_irq, envelope_detector_comp_isr,	359	ret = devm_request_irq(dev, env->comp_irq, envelope_detector_comp_isr,
362	0, "envelope-detector", env);	360	0, "envelope-detector", env);
363	if (ret) {	361	if (ret)
364	if (ret != -EPROBE_DEFER)	362	return dev_err_probe(dev, ret, "failed to request interrupt\n");
365	dev_err(dev, "failed to request interrupt\n");	363
366	return ret;
367	}
368	env->comp_irq_trigger = irq_get_trigger_type(env->comp_irq);	364	env->comp_irq_trigger = irq_get_trigger_type(env->comp_irq);
369	if (env->comp_irq_trigger & IRQF_TRIGGER_RISING)	365	if (env->comp_irq_trigger & IRQF_TRIGGER_RISING)
370	env->comp_irq_trigger_inv \|= IRQF_TRIGGER_FALLING;	366	env->comp_irq_trigger_inv \|= IRQF_TRIGGER_FALLING;

drivers/iio/adc/exynos_adc.c+19−11

 	bool			read_ts;
 	u32			ts_x;
 	u32			ts_y;
+	/*
+	 * Lock to protect from potential concurrent access to the
+	 * completion callback during a manual conversion. For this driver
+	 * a wait-callback is used to wait for the conversion result,
+	 * so in the meantime no other read request (or conversion start)
+	 * must be performed, otherwise it would interfere with the
+	 * current conversion result.
+	 */
+	struct mutex		lock;
 };
 struct exynos_adc_data {
 		return -EINVAL;
 	}
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&info->lock);
 	reinit_completion(&info->completion);
 	/* Select the channel to be used and Trigger conversion */
 		ret = IIO_VAL_INT;
 	}
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&info->lock);
 	return ret;
 }
 	unsigned long timeout;
 	int ret;
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&info->lock);
 	info->read_ts = true;
 	reinit_completion(&info->completion);
 	}
 	info->read_ts = false;
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&info->lock);
 	return ret;
 }
 	}
 	info->vdd = devm_regulator_get(&pdev->dev, "vdd");
-	if (IS_ERR(info->vdd)) {
+	if (IS_ERR(info->vdd))
-		if (PTR_ERR(info->vdd) != -EPROBE_DEFER)
+		return dev_err_probe(&pdev->dev, PTR_ERR(info->vdd),
-			dev_err(&pdev->dev,
+				     "failed getting regulator");
-				"failed getting regulator, err = %ld\n",
-				PTR_ERR(info->vdd));
-		return PTR_ERR(info->vdd);
-	}
 	ret = regulator_enable(info->vdd);
 	if (ret)
 	indio_dev->channels = exynos_adc_iio_channels;
 	indio_dev->num_channels = info->data->num_channels;
+	mutex_init(&info->lock);
 	ret = request_irq(info->irq, exynos_adc_isr,
 					0, dev_name(&pdev->dev), info);
 	if (ret < 0) {

drivers/iio/adc/fsl-imx25-gcq.c+13−2

 	int irq;
 	struct regulator *vref[4];
 	u32 channel_vref_mv[MX25_NUM_CFGS];
+	/*
+	 * Lock to protect the device state during a potential concurrent
+	 * read access from userspace. Reading a raw value requires a sequence
+	 * of register writes, then a wait for a completion callback,
+	 * and finally a register read, during which userspace could issue
+	 * another read request. This lock protects a read access from
+	 * ocurring before another one has finished.
+	 */
+	struct mutex lock;
 };
 #define MX25_CQG_CHAN(chan, id) {\
 	switch (mask) {
 	case IIO_CHAN_INFO_RAW:
-		mutex_lock(&indio_dev->mlock);
+		mutex_lock(&priv->lock);
 		ret = mx25_gcq_get_raw_value(&indio_dev->dev, chan, priv, val);
-		mutex_unlock(&indio_dev->mlock);
+		mutex_unlock(&priv->lock);
 		return ret;
 	case IIO_CHAN_INFO_SCALE:
 		return PTR_ERR(priv->regs);
 	}
+	mutex_init(&priv->lock);
 	init_completion(&priv->completed);
 	ret = mx25_gcq_setup_cfgs(pdev, priv);

drivers/iio/adc/ltc2497-core.c+3−7

 		return ret;
 	ddata->ref = devm_regulator_get(dev, "vref");
-	if (IS_ERR(ddata->ref)) {
+	if (IS_ERR(ddata->ref))
-		if (PTR_ERR(ddata->ref) != -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(ddata->ref),
-			dev_err(dev, "Failed to get vref regulator: %pe\n",
+				     "Failed to get vref regulator\n");
-				ddata->ref);
-		return PTR_ERR(ddata->ref);
-	}
 	ret = regulator_enable(ddata->ref);
 	if (ret < 0) {

drivers/iio/adc/meson_saradc.c+6−12

 		if (ret == -ENODEV)
 			return 0;
-		if (ret != -EPROBE_DEFER)
+		return dev_err_probe(indio_dev->dev.parent, ret,
-			dev_err(indio_dev->dev.parent,
+				     "failed to get temperature_calib cell\n");
-				"failed to get temperature_calib cell\n");
-		return ret;
 	}
 	priv->tsc_regmap =
 	{
 		.compatible = "amlogic,meson8-saradc",
 		.data = &meson_sar_adc_meson8_data,
-	},
+	}, {
-	{
 		.compatible = "amlogic,meson8b-saradc",
 		.data = &meson_sar_adc_meson8b_data,
-	},
+	}, {
-	{
 		.compatible = "amlogic,meson8m2-saradc",
 		.data = &meson_sar_adc_meson8m2_data,
-	},
+	}, {
-	{
 		.compatible = "amlogic,meson-gxbb-saradc",
 		.data = &meson_sar_adc_gxbb_data,
 	}, {
 		.compatible = "amlogic,meson-g12a-saradc",
 		.data = &meson_sar_adc_g12a_data,
 	},
-	{},
+	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, meson_sar_adc_of_match);

drivers/iio/adc/palmas_gpadc.c+1−12

@@ -834,18 +834,7 @@ static struct platform_driver palmas_gpadc_driver = { · 833 unmodified lines
834	.of_match_table = of_palmas_gpadc_match_tbl,	834	.of_match_table = of_palmas_gpadc_match_tbl,
835	},	835	},
836	};	836	};
837		837	module_platform_driver(palmas_gpadc_driver);
838	static int __init palmas_gpadc_init(void)
839	{
840	return platform_driver_register(&palmas_gpadc_driver);
841	}
842	module_init(palmas_gpadc_init);
843
844	static void __exit palmas_gpadc_exit(void)
845	{
846	platform_driver_unregister(&palmas_gpadc_driver);
847	}
848	module_exit(palmas_gpadc_exit);
849		838
850	MODULE_DESCRIPTION("palmas GPADC driver");	839	MODULE_DESCRIPTION("palmas GPADC driver");
851	MODULE_AUTHOR("Pradeep Goudagunta<pgoudagunta@nvidia.com>");	840	MODULE_AUTHOR("Pradeep Goudagunta<pgoudagunta@nvidia.com>");

drivers/iio/adc/rcar-gyroadc.c+18−12

 			num_channels = ARRAY_SIZE(rcar_gyroadc_iio_channels_3);
 			break;
 		default:
-			return -EINVAL;
+			goto err_e_inval;
 		}
 		/*
 				dev_err(dev,
 					"Failed to get child reg property of ADC \"%pOFn\".\n",
 					child);
-				return ret;
+				goto err_of_node_put;
 			}
 			/* Channel number is too high. */
 				dev_err(dev,
 					"Only %i channels supported with %pOFn, but reg = <%i>.\n",
 					num_channels, child, reg);
-				return -EINVAL;
+				goto err_e_inval;
 			}
 		}
 			dev_err(dev,
 				"Channel %i uses different ADC mode than the rest.\n",
 				reg);
-			return -EINVAL;
+			goto err_e_inval;
 		}
 		/* Channel is valid, grab the regulator. */
 		if (IS_ERR(vref)) {
 			dev_dbg(dev, "Channel %i 'vref' supply not connected.\n",
 				reg);
-			return PTR_ERR(vref);
+			ret = PTR_ERR(vref);
+			goto err_of_node_put;
 		}
 		priv->vref[reg] = vref;
 		 * attached to the GyroADC at a time, so if we found it,
 		 * we can stop parsing here.
 		 */
-		if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A)
+		if (childmode == RCAR_GYROADC_MODE_SELECT_1_MB88101A) {
+			of_node_put(child);
 			break;
+		}
 	}
 	if (first) {
 	}
 	return 0;
+err_e_inval:
+	ret = -EINVAL;
+err_of_node_put:
+	of_node_put(child);
+	return ret;
 }
 static void rcar_gyroadc_deinit_supplies(struct iio_dev *indio_dev)
 		return PTR_ERR(priv->regs);
 	priv->clk = devm_clk_get(dev, "fck");
-	if (IS_ERR(priv->clk)) {
+	if (IS_ERR(priv->clk))
-		ret = PTR_ERR(priv->clk);
+		return dev_err_probe(dev, PTR_ERR(priv->clk),
-		if (ret != -EPROBE_DEFER)
+				     "Failed to get IF clock\n");
-			dev_err(dev, "Failed to get IF clock (ret=%i)\n", ret);
-		return ret;
-	}
 	ret = rcar_gyroadc_parse_subdevs(indio_dev);
 	if (ret)

drivers/iio/adc/stm32-adc-core.c+31−49

@@ -582,11 +582,9 @@ static int stm32_adc_core_switches_probe(struct device *dev, · 581 unmodified lines
582	priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg");	582	priv->syscfg = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
583	if (IS_ERR(priv->syscfg)) {	583	if (IS_ERR(priv->syscfg)) {
584	ret = PTR_ERR(priv->syscfg);	584	ret = PTR_ERR(priv->syscfg);
585	if (ret != -ENODEV) {	585	if (ret != -ENODEV)
586	if (ret != -EPROBE_DEFER)	586	return dev_err_probe(dev, ret, "Can't probe syscfg\n");
587	dev_err(dev, "Can't probe syscfg: %d\n", ret);	587
588	return ret;
589	}
590	priv->syscfg = NULL;	588	priv->syscfg = NULL;
591	}	589	}
592		590
@@ -596,12 +594,9 @@ static int stm32_adc_core_switches_probe(struct device *dev, · 3 unmodified lines
596	priv->booster = devm_regulator_get_optional(dev, "booster");	594	priv->booster = devm_regulator_get_optional(dev, "booster");
597	if (IS_ERR(priv->booster)) {	595	if (IS_ERR(priv->booster)) {
598	ret = PTR_ERR(priv->booster);	596	ret = PTR_ERR(priv->booster);
599	if (ret != -ENODEV) {	597	if (ret != -ENODEV)
600	if (ret != -EPROBE_DEFER)	598	return dev_err_probe(dev, ret, "can't get booster\n");
601	dev_err(dev, "can't get booster %d\n",	599
602	ret);
603	return ret;
604	}
605	priv->booster = NULL;	600	priv->booster = NULL;
606	}	601	}
607	}	602	}
@@ -612,11 +607,9 @@ static int stm32_adc_core_switches_probe(struct device *dev, · 4 unmodified lines
612	priv->vdd = devm_regulator_get_optional(dev, "vdd");	607	priv->vdd = devm_regulator_get_optional(dev, "vdd");
613	if (IS_ERR(priv->vdd)) {	608	if (IS_ERR(priv->vdd)) {
614	ret = PTR_ERR(priv->vdd);	609	ret = PTR_ERR(priv->vdd);
615	if (ret != -ENODEV) {	610	if (ret != -ENODEV)
616	if (ret != -EPROBE_DEFER)	611	return dev_err_probe(dev, ret, "can't get vdd\n");
617	dev_err(dev, "can't get vdd %d\n", ret);	612
618	return ret;
619	}
620	priv->vdd = NULL;	613	priv->vdd = NULL;
621	}	614	}
622	}	615	}
@@ -669,42 +662,24 @@ static int stm32_adc_probe(struct platform_device *pdev) · 46 unmodified lines
669	priv->common.phys_base = res->start;	662	priv->common.phys_base = res->start;
670		663
671	priv->vdda = devm_regulator_get(&pdev->dev, "vdda");	664	priv->vdda = devm_regulator_get(&pdev->dev, "vdda");
672	if (IS_ERR(priv->vdda)) {	665	if (IS_ERR(priv->vdda))
673	ret = PTR_ERR(priv->vdda);	666	return dev_err_probe(&pdev->dev, PTR_ERR(priv->vdda),
674	if (ret != -EPROBE_DEFER)	667	"vdda get failed\n");
675	dev_err(&pdev->dev, "vdda get failed, %d\n", ret);
676	return ret;
677	}
678		668
679	priv->vref = devm_regulator_get(&pdev->dev, "vref");	669	priv->vref = devm_regulator_get(&pdev->dev, "vref");
680	if (IS_ERR(priv->vref)) {	670	if (IS_ERR(priv->vref))
681	ret = PTR_ERR(priv->vref);	671	return dev_err_probe(&pdev->dev, PTR_ERR(priv->vref),
682	if (ret != -EPROBE_DEFER)	672	"vref get failed\n");
683	dev_err(&pdev->dev, "vref get failed, %d\n", ret);
684	return ret;
685	}
686		673
687	priv->aclk = devm_clk_get(&pdev->dev, "adc");	674	priv->aclk = devm_clk_get_optional(&pdev->dev, "adc");
688	if (IS_ERR(priv->aclk)) {	675	if (IS_ERR(priv->aclk))
689	ret = PTR_ERR(priv->aclk);	676	return dev_err_probe(&pdev->dev, PTR_ERR(priv->aclk),
690	if (ret != -ENOENT) {	677	"Can't get 'adc' clock\n");
691	if (ret != -EPROBE_DEFER)
692	dev_err(&pdev->dev, "Can't get 'adc' clock\n");
693	return ret;
694	}
695	priv->aclk = NULL;
696	}
697		678
698	priv->bclk = devm_clk_get(&pdev->dev, "bus");	679	priv->bclk = devm_clk_get_optional(&pdev->dev, "bus");
699	if (IS_ERR(priv->bclk)) {	680	if (IS_ERR(priv->bclk))
700	ret = PTR_ERR(priv->bclk);	681	return dev_err_probe(&pdev->dev, PTR_ERR(priv->bclk),
701	if (ret != -ENOENT) {	682	"Can't get 'bus' clock\n");
702	if (ret != -EPROBE_DEFER)
703	dev_err(&pdev->dev, "Can't get 'bus' clock\n");
704	return ret;
705	}
706	priv->bclk = NULL;
707	}
708		683
709	ret = stm32_adc_core_switches_probe(dev, priv);	684	ret = stm32_adc_core_switches_probe(dev, priv);
710	if (ret)	685	if (ret)
@@ -794,6 +769,13 @@ static int stm32_adc_core_runtime_resume(struct device *dev) · 83 unmodified lines
794	{	769	{
795	return stm32_adc_core_hw_start(dev);	770	return stm32_adc_core_hw_start(dev);
796	}	771	}
		772
		773	static int stm32_adc_core_runtime_idle(struct device *dev)
		774	{
		775	pm_runtime_mark_last_busy(dev);
		776
		777	return 0;
		778	}
797	#endif	779	#endif
798		780
799	static const struct dev_pm_ops stm32_adc_core_pm_ops = {	781	static const struct dev_pm_ops stm32_adc_core_pm_ops = {
@@ -801,7 +783,7 @@ static const struct dev_pm_ops stm32_adc_core_pm_ops = { · 1 unmodified line
801	pm_runtime_force_resume)	783	pm_runtime_force_resume)
802	SET_RUNTIME_PM_OPS(stm32_adc_core_runtime_suspend,	784	SET_RUNTIME_PM_OPS(stm32_adc_core_runtime_suspend,
803	stm32_adc_core_runtime_resume,	785	stm32_adc_core_runtime_resume,
804	NULL)	786	stm32_adc_core_runtime_idle)
805	};	787	};
806		788
807	static const struct stm32_adc_priv_cfg stm32f4_adc_priv_cfg = {	789	static const struct stm32_adc_priv_cfg stm32f4_adc_priv_cfg = {

drivers/iio/adc/stm32-adc.c+3−7

 	adc->dma_chan = dma_request_chan(dev, "rx");
 	if (IS_ERR(adc->dma_chan)) {
 		ret = PTR_ERR(adc->dma_chan);
-		if (ret != -ENODEV) {
+		if (ret != -ENODEV)
-			if (ret != -EPROBE_DEFER)
+			return dev_err_probe(dev, ret,
-				dev_err(dev,
+					     "DMA channel request failed with\n");
-					"DMA channel request failed with %d\n",
-					ret);
-			return ret;
-		}
 		/* DMA is optional: fall back to IRQ mode */
 		adc->dma_chan = NULL;

drivers/iio/adc/stm32-dfsdm-adc.c+3−7

 	/* Optionally request DMA */
 	ret = stm32_dfsdm_dma_request(dev, indio_dev);
 	if (ret) {
-		if (ret != -ENODEV) {
+		if (ret != -ENODEV)
-			if (ret != -EPROBE_DEFER)
+			return dev_err_probe(dev, ret,
-				dev_err(dev,
+					     "DMA channel request failed with\n");
-					"DMA channel request failed with %d\n",
-					ret);
-			return ret;
-		}
 		dev_dbg(dev, "No DMA support\n");
 		return 0;

drivers/iio/adc/stm32-dfsdm-core.c+7−13

 	if (!node)
 		return -EINVAL;
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	priv->dfsdm.base = devm_platform_get_and_ioremap_resource(pdev, 0,
-	if (!res) {
+							&res);
-		dev_err(&pdev->dev, "Failed to get memory resource\n");
-		return -ENODEV;
-	}
-	priv->dfsdm.phys_base = res->start;
-	priv->dfsdm.base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(priv->dfsdm.base))
 		return PTR_ERR(priv->dfsdm.base);
+	priv->dfsdm.phys_base = res->start;
 	/*
 	 * "dfsdm" clock is mandatory for DFSDM peripheral clocking.
 	 * "dfsdm" or "audio" clocks can be used as source clock for
 	 * on use case.
 	 */
 	priv->clk = devm_clk_get(&pdev->dev, "dfsdm");
-	if (IS_ERR(priv->clk)) {
+	if (IS_ERR(priv->clk))
-		ret = PTR_ERR(priv->clk);
+		return dev_err_probe(&pdev->dev, PTR_ERR(priv->clk),
-		if (ret != -EPROBE_DEFER)
+				     "Failed to get clock\n");
-			dev_err(&pdev->dev, "Failed to get clock (%d)\n", ret);
-		return ret;
-	}
 	priv->aclk = devm_clk_get(&pdev->dev, "audio");
 	if (IS_ERR(priv->aclk))

drivers/iio/adc/ti-adc081c.c+1−23

 #include <linux/i2c.h>
 #include <linux/module.h>
 #include <linux/mod_devicetable.h>
-#include <linux/acpi.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/buffer.h>
 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA))
 		return -EOPNOTSUPP;
-	if (ACPI_COMPANION(&client->dev)) {
+	model = &adcxx1c_models[id->driver_data];
-		const struct acpi_device_id *ad_id;
-		ad_id = acpi_match_device(client->dev.driver->acpi_match_table,
-					  &client->dev);
-		if (!ad_id)
-			return -ENODEV;
-		model = &adcxx1c_models[ad_id->driver_data];
-	} else {
-		model = &adcxx1c_models[id->driver_data];
-	}
 	iio = devm_iio_device_alloc(&client->dev, sizeof(*adc));
 	if (!iio)
 };
 MODULE_DEVICE_TABLE(of, adc081c_of_match);
-#ifdef CONFIG_ACPI
-static const struct acpi_device_id adc081c_acpi_match[] = {
-	{ "ADC081C", ADC081C },
-	{ "ADC101C", ADC101C },
-	{ "ADC121C", ADC121C },
-	{ }
-};
-MODULE_DEVICE_TABLE(acpi, adc081c_acpi_match);
-#endif
 static struct i2c_driver adc081c_driver = {
 	.driver = {
 		.name = "adc081c",
 		.of_match_table = adc081c_of_match,
-		.acpi_match_table = ACPI_PTR(adc081c_acpi_match),
 	},
 	.probe = adc081c_probe,
 	.remove = adc081c_remove,

drivers/iio/adc/ti-adc0832.c+8−3

 	struct regulator *reg;
 	struct mutex lock;
 	u8 mux_bits;
+	/*
+	 * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp
+	 * May be shorter if not all channels are enabled subject
+	 * to the timestamp remaining 8 byte aligned.
+	 */
+	u8 data[24] __aligned(8);
 	u8 tx_buf[2] ____cacheline_aligned;
 	u8 rx_buf[2];
 	struct iio_poll_func *pf = p;
 	struct iio_dev *indio_dev = pf->indio_dev;
 	struct adc0832 *adc = iio_priv(indio_dev);
-	u8 data[24] = { }; /* 16x 1 byte ADC data + 8 bytes timestamp */
 	int scan_index;
 	int i = 0;
 			goto out;
 		}
-		data[i] = ret;
+		adc->data[i] = ret;
 		i++;
 	}
-	iio_push_to_buffers_with_timestamp(indio_dev, data,
+	iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
 					   iio_get_time_ns(indio_dev));
 out:
 	mutex_unlock(&adc->lock);

drivers/iio/adc/ti-adc108s102.c+2−3

 #include <linux/iio/trigger_consumer.h>
 #include <linux/interrupt.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 #include <linux/spi/spi.h>
 	return 0;
 }
-#ifdef CONFIG_OF
 static const struct of_device_id adc108s102_of_match[] = {
 	{ .compatible = "ti,adc108s102" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, adc108s102_of_match);
-#endif
 #ifdef CONFIG_ACPI
 static const struct acpi_device_id adc108s102_acpi_ids[] = {
 static struct spi_driver adc108s102_driver = {
 	.driver = {
 		.name   = "adc108s102",
-		.of_match_table = of_match_ptr(adc108s102_of_match),
+		.of_match_table = adc108s102_of_match,
 		.acpi_match_table = ACPI_PTR(adc108s102_acpi_ids),
 	},
 	.probe		= adc108s102_probe,

drivers/iio/adc/ti-adc12138.c+9−4

 	struct completion complete;
 	/* The number of cclk periods for the S/H's acquisition time */
 	unsigned int acquisition_time;
+	/*
+	 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
+	 * Less may be need if not all channels are enabled, as long as
+	 * the 8 byte alignment of the timestamp is maintained.
+	 */
+	__be16 data[20] __aligned(8);
 	u8 tx_buf[2] ____cacheline_aligned;
 	u8 rx_buf[2];
 	struct iio_poll_func *pf = p;
 	struct iio_dev *indio_dev = pf->indio_dev;
 	struct adc12138 *adc = iio_priv(indio_dev);
-	__be16 data[20] = { }; /* 16x 2 bytes ADC data + 8 bytes timestamp */
 	__be16 trash;
 	int ret;
 	int scan_index;
 		reinit_completion(&adc->complete);
 		ret = adc12138_start_and_read_conv(adc, scan_chan,
-						   i ? &data[i - 1] : &trash);
+					i ? &adc->data[i - 1] : &trash);
 		if (ret) {
 			dev_warn(&adc->spi->dev,
 				 "failed to start conversion\n");
 	}
 	if (i) {
-		ret = adc12138_read_conv_data(adc, &data[i - 1]);
+		ret = adc12138_read_conv_data(adc, &adc->data[i - 1]);
 		if (ret) {
 			dev_warn(&adc->spi->dev,
 				 "failed to get conversion data\n");
 		}
 	}
-	iio_push_to_buffers_with_timestamp(indio_dev, data,
+	iio_push_to_buffers_with_timestamp(indio_dev, adc->data,
 					   iio_get_time_ns(indio_dev));
 out:
 	mutex_unlock(&adc->lock);

drivers/iio/adc/ti-adc128s052.c+2−1

 #include <linux/err.h>
 #include <linux/spi/spi.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/iio/iio.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 static struct spi_driver adc128_driver = {
 	.driver = {
 		.name = "adc128s052",
-		.of_match_table = of_match_ptr(adc128_of_match),
+		.of_match_table = adc128_of_match,
 		.acpi_match_table = ACPI_PTR(adc128_acpi_match),
 	},
 	.probe = adc128_probe,

drivers/iio/afe/iio-rescale.c+3−5

 	int ret;
 	source = devm_iio_channel_get(dev, NULL);
-	if (IS_ERR(source)) {
+	if (IS_ERR(source))
-		if (PTR_ERR(source) != -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(source),
-			dev_err(dev, "failed to get source channel\n");
+				     "failed to get source channel\n");
-		return PTR_ERR(source);
-	}
 	sizeof_ext_info = iio_get_channel_ext_info_count(source);
 	if (sizeof_ext_info) {

drivers/iio/amplifiers/Kconfig+1−0

@@ -18,6 +18,7 @@ config AD8366 · 17 unmodified lines
18	AD8366 Dual-Digital Variable Gain Amplifier (VGA)	18	AD8366 Dual-Digital Variable Gain Amplifier (VGA)
19	ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)	19	ADA4961 BiCMOS RF Digital Gain Amplifier (DGA)
20	ADL5240 Digitally controlled variable gain amplifier (VGA)	20	ADL5240 Digitally controlled variable gain amplifier (VGA)
		21	HMC1119 0.25 dB LSB, 7-Bit, Silicon Digital Attenuator
21		22
22	To compile this driver as a module, choose M here: the	23	To compile this driver as a module, choose M here: the
23	module will be called ad8366.	24	module will be called ad8366.

drivers/iio/amplifiers/hmc425a.c+3−6

 	st->gain = st->chip_info->default_gain;
 	st->gpios = devm_gpiod_get_array(&pdev->dev, "ctrl", GPIOD_OUT_LOW);
-	if (IS_ERR(st->gpios)) {
+	if (IS_ERR(st->gpios))
-		ret = PTR_ERR(st->gpios);
+		return dev_err_probe(&pdev->dev, PTR_ERR(st->gpios),
-		if (ret != -EPROBE_DEFER)
+				     "failed to get gpios\n");
-			dev_err(&pdev->dev, "failed to get gpios\n");
-		return ret;
-	}
 	if (st->gpios->ndescs != st->chip_info->num_gpios) {
 		dev_err(&pdev->dev, "%d GPIOs needed to operate\n",

drivers/iio/buffer/Kconfig+5−5

@@ -11,7 +11,7 @@ config IIO_BUFFER_CB · 10 unmodified lines
11	usage. That is, those where the data is pushed to the consumer.	11	usage. That is, those where the data is pushed to the consumer.
12		12
13	config IIO_BUFFER_DMA	13	config IIO_BUFFER_DMA
14	tristate	14	tristate "Industrial I/O DMA buffer infrastructure"
15	help	15	help
16	Provides the generic IIO DMA buffer infrastructure that can be used by	16	Provides the generic IIO DMA buffer infrastructure that can be used by
17	drivers for devices with DMA support to implement the IIO buffer.	17	drivers for devices with DMA support to implement the IIO buffer.
@@ -20,13 +20,13 @@ config IIO_BUFFER_DMA · 2 unmodified lines
20	infrastructure.	20	infrastructure.
21		21
22	config IIO_BUFFER_DMAENGINE	22	config IIO_BUFFER_DMAENGINE
23	tristate	23	tristate "Industrial I/O DMA buffer integration with DMAEngine"
24	select IIO_BUFFER_DMA	24	select IIO_BUFFER_DMA
25	help	25	help
26	Provides a bonding of the generic IIO DMA buffer infrastructure with the	26	Provides a bonding of the generic IIO DMA buffer infrastructure with the
27	DMAengine framework. This can be used by converter drivers with a DMA port	27	DMAEngine framework. This can be used by converter drivers with a DMA port
28	connected to an external DMA controller which is supported by the	28	connected to an external DMA controller which is supported by the
29	DMAengine framework.	29	DMAEngine framework.
30		30
31	Should be selected by drivers that want to use this functionality.	31	Should be selected by drivers that want to use this functionality.
32		32
@@ -48,7 +48,7 @@ config IIO_KFIFO_BUF · 15 unmodified lines
48	often to read from the buffer.	48	often to read from the buffer.
49		49
50	config IIO_TRIGGERED_BUFFER	50	config IIO_TRIGGERED_BUFFER
51	tristate	51	tristate "Industrial I/O triggered buffer support"
52	select IIO_TRIGGER	52	select IIO_TRIGGER
53	select IIO_KFIFO_BUF	53	select IIO_KFIFO_BUF
54	help	54	help

drivers/iio/buffer/industrialio-buffer-dmaengine.c+6−6

 	return container_of(buffer, struct dmaengine_buffer, queue.buffer);
 }
-static void iio_dmaengine_buffer_block_done(void *data)
+static void iio_dmaengine_buffer_block_done(void *data,
+		const struct dmaengine_result *result)
 {
 	struct iio_dma_buffer_block *block = data;
 	unsigned long flags;
 	spin_lock_irqsave(&block->queue->list_lock, flags);
 	list_del(&block->head);
 	spin_unlock_irqrestore(&block->queue->list_lock, flags);
+	block->bytes_used -= result->residue;
 	iio_dma_buffer_block_done(block);
 }
 	if (!desc)
 		return -ENOMEM;
-	desc->callback = iio_dmaengine_buffer_block_done;
+	desc->callback_result = iio_dmaengine_buffer_block_done;
 	desc->callback_param = block;
 	cookie = dmaengine_submit(desc);
  * Once done using the buffer iio_dmaengine_buffer_free() should be used to
  * release it.
  */
-struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
+static struct iio_buffer *iio_dmaengine_buffer_alloc(struct device *dev,
 	const char *channel)
 {
 	struct dmaengine_buffer *dmaengine_buffer;
 	kfree(dmaengine_buffer);
 	return ERR_PTR(ret);
 }
-EXPORT_SYMBOL(iio_dmaengine_buffer_alloc);
 /**
  * iio_dmaengine_buffer_free() - Free dmaengine buffer
  *
  * Frees a buffer previously allocated with iio_dmaengine_buffer_alloc().
  */
-void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
+static void iio_dmaengine_buffer_free(struct iio_buffer *buffer)
 {
 	struct dmaengine_buffer *dmaengine_buffer =
 		iio_buffer_to_dmaengine_buffer(buffer);
 	iio_buffer_put(buffer);
 }
-EXPORT_SYMBOL_GPL(iio_dmaengine_buffer_free);
 static void __devm_iio_dmaengine_buffer_free(struct device *dev, void *res)
 {

drivers/iio/chemical/ams-iaq-core.c+2−1

  */
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/mutex.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
 static struct i2c_driver ams_iaqcore_driver = {
 	.driver = {
 		.name	= "ams-iaq-core",
-		.of_match_table = of_match_ptr(ams_iaqcore_dt_ids),
+		.of_match_table = ams_iaqcore_dt_ids,
 	},
 	.probe = ams_iaqcore_probe,
 	.id_table = ams_iaqcore_id,

drivers/iio/chemical/atlas-ezo-sensor.c+79−9

@@ -16,10 +16,13 @@ · 15 unmodified lines
16	#include <linux/iio/iio.h>	16	#include <linux/iio/iio.h>
17		17
18	#define ATLAS_EZO_DRV_NAME "atlas-ezo-sensor"	18	#define ATLAS_EZO_DRV_NAME "atlas-ezo-sensor"
19	#define ATLAS_CO2_INT_TIME_IN_MS 950	19	#define ATLAS_INT_TIME_IN_MS 950
		20	#define ATLAS_INT_HUM_TIME_IN_MS 350
20		21
21	enum {	22	enum {
22	ATLAS_CO2_EZO,	23	ATLAS_CO2_EZO,
		24	ATLAS_O2_EZO,
		25	ATLAS_HUM_EZO,
23	};	26	};
24		27
25	struct atlas_ezo_device {	28	struct atlas_ezo_device {
@@ -38,15 +41,37 @@ struct atlas_ezo_data { · 12 unmodified lines
38	u8 buffer[8];	41	u8 buffer[8];
39	};	42	};
40		43
		44	#define ATLAS_CONCENTRATION_CHANNEL(_modifier) \
		45	{ \
		46	.type = IIO_CONCENTRATION, \
		47	.modified = 1,\
		48	.channel2 = _modifier, \
		49	.info_mask_separate = \
		50	BIT(IIO_CHAN_INFO_RAW) \| BIT(IIO_CHAN_INFO_SCALE), \
		51	.scan_index = 0, \
		52	.scan_type = { \
		53	.sign = 'u', \
		54	.realbits = 32, \
		55	.storagebits = 32, \
		56	.endianness = IIO_CPU, \
		57	}, \
		58	}
		59
41	static const struct iio_chan_spec atlas_co2_ezo_channels[] = {	60	static const struct iio_chan_spec atlas_co2_ezo_channels[] = {
		61	ATLAS_CONCENTRATION_CHANNEL(IIO_MOD_CO2),
		62	};
		63
		64	static const struct iio_chan_spec atlas_o2_ezo_channels[] = {
		65	ATLAS_CONCENTRATION_CHANNEL(IIO_MOD_O2),
		66	};
		67
		68	static const struct iio_chan_spec atlas_hum_ezo_channels[] = {
42	{	69	{
43	.type = IIO_CONCENTRATION,	70	.type = IIO_HUMIDITYRELATIVE,
44	.modified = 1,
45	.channel2 = IIO_MOD_CO2,
46	.info_mask_separate =	71	.info_mask_separate =
47	BIT(IIO_CHAN_INFO_RAW) \| BIT(IIO_CHAN_INFO_SCALE),	72	BIT(IIO_CHAN_INFO_RAW) \| BIT(IIO_CHAN_INFO_SCALE),
48	.scan_index = 0,	73	.scan_index = 0,
49	.scan_type = {	74	.scan_type = {
50	.sign = 'u',	75	.sign = 'u',
51	.realbits = 32,	76	.realbits = 32,
52	.storagebits = 32,	77	.storagebits = 32,
@@ -59,10 +84,30 @@ static struct atlas_ezo_device atlas_ezo_devices[] = { · 6 unmodified lines
59	[ATLAS_CO2_EZO] = {	84	[ATLAS_CO2_EZO] = {
60	.channels = atlas_co2_ezo_channels,	85	.channels = atlas_co2_ezo_channels,
61	.num_channels = 1,	86	.num_channels = 1,
62	.delay = ATLAS_CO2_INT_TIME_IN_MS,	87	.delay = ATLAS_INT_TIME_IN_MS,
		88	},
		89	[ATLAS_O2_EZO] = {
		90	.channels = atlas_o2_ezo_channels,
		91	.num_channels = 1,
		92	.delay = ATLAS_INT_TIME_IN_MS,
		93	},
		94	[ATLAS_HUM_EZO] = {
		95	.channels = atlas_hum_ezo_channels,
		96	.num_channels = 1,
		97	.delay = ATLAS_INT_HUM_TIME_IN_MS,
63	},	98	},
64	};	99	};
65		100
		101	static void atlas_ezo_sanitize(char *buf)
		102	{
		103	char *ptr = strchr(buf, '.');
		104
		105	if (!ptr)
		106	return;
		107
		108	memmove(ptr, ptr + 1, strlen(ptr));
		109	}
		110
66	static int atlas_ezo_read_raw(struct iio_dev *indio_dev,	111	static int atlas_ezo_read_raw(struct iio_dev *indio_dev,
67	struct iio_chan_spec const *chan,	112	struct iio_chan_spec const *chan,
68	int val, int val2, long mask)	113	int val, int val2, long mask)
@@ -96,6 +141,9 @@ static int atlas_ezo_read_raw(struct iio_dev *indio_dev, · 27 unmodified lines
96	return -EBUSY;	141	return -EBUSY;
97	}	142	}
98		143
		144	/* removing floating point for fixed number representation */
		145	atlas_ezo_sanitize(data->buffer + 2);
		146
99	ret = kstrtol(data->buffer + 1, 10, &tmp);	147	ret = kstrtol(data->buffer + 1, 10, &tmp);
100		148
101	*val = tmp;	149	*val = tmp;
@@ -105,9 +153,27 @@ static int atlas_ezo_read_raw(struct iio_dev *indio_dev, · 3 unmodified lines
105	return ret ? ret : IIO_VAL_INT;	153	return ret ? ret : IIO_VAL_INT;
106	}	154	}
107	case IIO_CHAN_INFO_SCALE:	155	case IIO_CHAN_INFO_SCALE:
108	*val = 0;	156	switch (chan->type) {
109	val2 = 100; / 0.0001 */	157	case IIO_HUMIDITYRELATIVE:
110	return IIO_VAL_INT_PLUS_MICRO;	158	*val = 10;
		159	return IIO_VAL_INT;
		160	case IIO_CONCENTRATION:
		161	break;
		162	default:
		163	return -EINVAL;
		164	}
		165
		166	/* IIO_CONCENTRATION modifiers */
		167	switch (chan->channel2) {
		168	case IIO_MOD_CO2:
		169	*val = 0;
		170	val2 = 100; / 0.0001 */
		171	return IIO_VAL_INT_PLUS_MICRO;
		172	case IIO_MOD_O2:
		173	*val = 100;
		174	return IIO_VAL_INT;
		175	}
		176	return -EINVAL;
111	}	177	}
112		178
113	return 0;	179	return 0;
@@ -119,12 +185,16 @@ static const struct iio_info atlas_info = { · 5 unmodified lines
119		185
120	static const struct i2c_device_id atlas_ezo_id[] = {	186	static const struct i2c_device_id atlas_ezo_id[] = {
121	{ "atlas-co2-ezo", ATLAS_CO2_EZO },	187	{ "atlas-co2-ezo", ATLAS_CO2_EZO },
		188	{ "atlas-o2-ezo", ATLAS_O2_EZO },
		189	{ "atlas-hum-ezo", ATLAS_HUM_EZO },
122	{}	190	{}
123	};	191	};
124	MODULE_DEVICE_TABLE(i2c, atlas_ezo_id);	192	MODULE_DEVICE_TABLE(i2c, atlas_ezo_id);
125		193
126	static const struct of_device_id atlas_ezo_dt_ids[] = {	194	static const struct of_device_id atlas_ezo_dt_ids[] = {
127	{ .compatible = "atlas,co2-ezo", .data = (void *)ATLAS_CO2_EZO, },	195	{ .compatible = "atlas,co2-ezo", .data = (void *)ATLAS_CO2_EZO, },
		196	{ .compatible = "atlas,o2-ezo", .data = (void *)ATLAS_O2_EZO, },
		197	{ .compatible = "atlas,hum-ezo", .data = (void *)ATLAS_HUM_EZO, },
128	{}	198	{}
129	};	199	};
130	MODULE_DEVICE_TABLE(of, atlas_ezo_dt_ids);	200	MODULE_DEVICE_TABLE(of, atlas_ezo_dt_ids);

drivers/iio/chemical/atlas-sensor.c+4−6

 #include <linux/irq.h>
 #include <linux/irq_work.h>
 #include <linux/i2c.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
 #include <linux/regmap.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/buffer.h>
 {
 	struct atlas_data *data;
 	struct atlas_device *chip;
-	const struct of_device_id *of_id;
 	struct iio_trigger *trig;
 	struct iio_dev *indio_dev;
 	int ret;
 	if (!indio_dev)
 		return -ENOMEM;
-	of_id = of_match_device(atlas_dt_ids, &client->dev);
+	if (!dev_fwnode(&client->dev))
-	if (!of_id)
 		chip = &atlas_devices[id->driver_data];
 	else
-		chip = &atlas_devices[(unsigned long)of_id->data];
+		chip = &atlas_devices[(unsigned long)device_get_match_data(&client->dev)];
 	indio_dev->info = &atlas_info;
 	indio_dev->name = ATLAS_DRV_NAME;
 static struct i2c_driver atlas_driver = {
 	.driver = {
 		.name	= ATLAS_DRV_NAME,
-		.of_match_table	= of_match_ptr(atlas_dt_ids),
+		.of_match_table	= atlas_dt_ids,
 		.pm	= &atlas_pm_ops,
 	},
 	.probe		= atlas_probe,

drivers/iio/chemical/scd30_core.c+2−7

 	indio_dev->available_scan_masks = scd30_scan_masks;
 	state->vdd = devm_regulator_get(dev, "vdd");
-	if (IS_ERR(state->vdd)) {
+	if (IS_ERR(state->vdd))
-		if (PTR_ERR(state->vdd) == -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(state->vdd), "failed to get regulator\n");
-			return -EPROBE_DEFER;
-		dev_err(dev, "failed to get regulator\n");
-		return PTR_ERR(state->vdd);
-	}
 	ret = regulator_enable(state->vdd);
 	if (ret)

drivers/iio/chemical/sgp30.c+14−15

 #include <linux/delay.h>
 #include <linux/kthread.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/mutex.h>
 #include <linux/i2c.h>
-#include <linux/of_device.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
  * @cmd:         SGP Command to issue
  * @buf:         Raw data buffer to use
  * @word_count:  Num words to read, excluding CRC bytes
+ * @duration_us: Time taken to sensor to take a reading and data to be ready.
  *
  * Return:       0 on success, negative error otherwise.
  */
 static int sgp_check_compat(struct sgp_data *data,
 			    unsigned int product_id)
 {
+	struct device *dev = &data->client->dev;
 	const struct sgp_version *supported_versions;
 	u16 ix, num_fs;
 	u16 product, generation, major, minor;
 	/* driver does not match product */
 	generation = SGP_VERS_GEN(data);
 	if (generation != 0) {
-		dev_err(&data->client->dev,
+		dev_err(dev,
 			"incompatible product generation %d != 0", generation);
 		return -ENODEV;
 	}
 	product = SGP_VERS_PRODUCT(data);
 	if (product != product_id) {
-		dev_err(&data->client->dev,
+		dev_err(dev, "sensor reports a different product: 0x%04hx\n",
-			"sensor reports a different product: 0x%04hx\n",
 			product);
 		return -ENODEV;
 	}
 	if (SGP_VERS_RESERVED(data))
-		dev_warn(&data->client->dev, "reserved bit is set\n");
+		dev_warn(dev, "reserved bit is set\n");
 	/* engineering samples are not supported: no interface guarantees */
 	if (SGP_VERS_ENG_BIT(data))
 		    minor >= supported_versions[ix].minor)
 			return 0;
 	}
-	dev_err(&data->client->dev, "unsupported sgp version: %d.%d\n",
+	dev_err(dev, "unsupported sgp version: %d.%d\n", major, minor);
-		major, minor);
 	return -ENODEV;
 }
 static int sgp_probe(struct i2c_client *client,
 		     const struct i2c_device_id *id)
 {
+	struct device *dev = &client->dev;
 	struct iio_dev *indio_dev;
 	struct sgp_data *data;
-	const struct of_device_id *of_id;
 	unsigned long product_id;
 	int ret;
-	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 	if (!indio_dev)
 		return -ENOMEM;
-	of_id = of_match_device(sgp_dt_ids, &client->dev);
+	if (dev_fwnode(dev))
-	if (of_id)
+		product_id = (unsigned long)device_get_match_data(dev);
-		product_id = (unsigned long)of_id->data;
 	else
 		product_id = id->driver_data;
 	sgp_init(data);
-	ret = devm_iio_device_register(&client->dev, indio_dev);
+	ret = devm_iio_device_register(dev, indio_dev);
 	if (ret) {
-		dev_err(&client->dev, "failed to register iio device\n");
+		dev_err(dev, "failed to register iio device\n");
 		return ret;
 	}
 static struct i2c_driver sgp_driver = {
 	.driver = {
 		.name = "sgp30",
-		.of_match_table = of_match_ptr(sgp_dt_ids),
+		.of_match_table = sgp_dt_ids,
 	},
 	.probe = sgp_probe,
 	.remove = sgp_remove,

drivers/iio/chemical/vz89x.c+8−10

 #include <linux/mutex.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 static int vz89x_probe(struct i2c_client *client,
 		       const struct i2c_device_id *id)
 {
+	struct device *dev = &client->dev;
 	struct iio_dev *indio_dev;
 	struct vz89x_data *data;
-	const struct of_device_id *of_id;
 	int chip_id;
-	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
+	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 	if (!indio_dev)
 		return -ENOMEM;
 	data = iio_priv(indio_dev);
 	else
 		return -EOPNOTSUPP;
-	of_id = of_match_device(vz89x_dt_ids, &client->dev);
+	if (!dev_fwnode(dev))
-	if (!of_id)
 		chip_id = id->driver_data;
 	else
-		chip_id = (unsigned long)of_id->data;
+		chip_id = (unsigned long)device_get_match_data(dev);
 	i2c_set_clientdata(client, indio_dev);
 	data->client = client;
 	mutex_init(&data->lock);
 	indio_dev->info = &vz89x_info;
-	indio_dev->name = dev_name(&client->dev);
+	indio_dev->name = dev_name(dev);
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	indio_dev->channels = data->chip->channels;
 	indio_dev->num_channels = data->chip->num_channels;
-	return devm_iio_device_register(&client->dev, indio_dev);
+	return devm_iio_device_register(dev, indio_dev);
 }
 static const struct i2c_device_id vz89x_id[] = {
 static struct i2c_driver vz89x_driver = {
 	.driver = {
 		.name	= "vz89x",
-		.of_match_table = of_match_ptr(vz89x_dt_ids),
+		.of_match_table = vz89x_dt_ids,
 	},
 	.probe = vz89x_probe,
 	.id_table = vz89x_id,

drivers/iio/common/cros_ec_sensors/cros_ec_lid_angle.c+2−1

@@ -97,7 +97,8 @@ static int cros_ec_lid_angle_probe(struct platform_device *pdev) · 96 unmodified lines
97	if (!indio_dev)	97	if (!indio_dev)
98	return -ENOMEM;	98	return -ENOMEM;
99		99
100	ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL, NULL);	100	ret = cros_ec_sensors_core_init(pdev, indio_dev, false, NULL,
		101	NULL, false);
101	if (ret)	102	if (ret)
102	return ret;	103	return ret;
103		104

drivers/iio/common/cros_ec_sensors/cros_ec_sensors.c+2−3

 	ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
 					cros_ec_sensors_capture,
-					cros_ec_sensors_push_data);
+					cros_ec_sensors_push_data,
+					true);
 	if (ret)
 		return ret;
-	iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
 	indio_dev->info = &ec_sensors_info;
 	state = iio_priv(indio_dev);
 	for (channel = state->channels, i = CROS_EC_SENSOR_X;

drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c+8−3

 static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
-const struct attribute *cros_ec_sensor_fifo_attributes[] = {
+static const struct attribute *cros_ec_sensor_fifo_attributes[] = {
 	&iio_dev_attr_hwfifo_timeout.dev_attr.attr,
 	&iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
 	NULL,
 };
-EXPORT_SYMBOL_GPL(cros_ec_sensor_fifo_attributes);
 int cros_ec_sensors_push_data(struct iio_dev *indio_dev,
 			      s16 *data,
  *    for backward compatibility.
  * @push_data:          function to call when cros_ec_sensorhub receives
  *    a sample for that sensor.
+ * @has_hw_fifo:	Set true if this device has/uses a HW FIFO
  *
  * Return: 0 on success, -errno on failure.
  */
 			      struct iio_dev *indio_dev,
 			      bool physical_device,
 			      cros_ec_sensors_capture_t trigger_capture,
-			      cros_ec_sensorhub_push_data_cb_t push_data)
+			      cros_ec_sensorhub_push_data_cb_t push_data,
+			      bool has_hw_fifo)
 {
 	struct device *dev = &pdev->dev;
 	struct cros_ec_sensors_core_state *state = iio_priv(indio_dev);
 					NULL);
 			if (ret)
 				return ret;
+			if (has_hw_fifo)
+				iio_buffer_set_attrs(indio_dev->buffer,
+						     cros_ec_sensor_fifo_attributes);
 		}
 	}

drivers/iio/common/ssp_sensors/ssp_dev.c+2−1

@@ -503,7 +503,8 @@ static int ssp_probe(struct spi_device *spi) · 502 unmodified lines
503	return -ENODEV;	503	return -ENODEV;
504	}	504	}
505		505
506	ret = mfd_add_devices(&spi->dev, -1, sensorhub_sensor_devs,	506	ret = mfd_add_devices(&spi->dev, PLATFORM_DEVID_NONE,
		507	sensorhub_sensor_devs,
507	ARRAY_SIZE(sensorhub_sensor_devs), NULL, 0, NULL);	508	ARRAY_SIZE(sensorhub_sensor_devs), NULL, 0, NULL);
508	if (ret < 0) {	509	if (ret < 0) {
509	dev_err(&spi->dev, "mfd add devices fail\n");	510	dev_err(&spi->dev, "mfd add devices fail\n");

drivers/iio/dac/ad5064.c+3−3

  * struct ad5064_chip_info - chip specific information
  * @shared_vref:	whether the vref supply is shared between channels
  * @internal_vref:	internal reference voltage. 0 if the chip has no
-			internal vref.
+ *			internal vref.
- * @channel:		channel specification
+ * @channels:		channel specification
  * @num_channels:	number of channels
  * @regmap_type:	register map layout variant
  */
  * @use_internal_vref:	set to true if the internal reference voltage should be
  *			used.
  * @write:		register write callback
+ * @lock:		maintain consistency between cached and dev state
  * @data:		i2c/spi transfer buffers
  */
 	bool				use_internal_vref;
 	ad5064_write_func		write;
-	/* Lock used to maintain consistency between cached and dev state */
 	struct mutex lock;
 	/*

drivers/iio/dac/ad5446.c+2−3

 #include <linux/regulator/consumer.h>
 #include <linux/err.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 };
 MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
-#ifdef CONFIG_OF
 static const struct of_device_id ad5446_of_ids[] = {
 	{ .compatible = "ti,dac7512" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ad5446_of_ids);
-#endif
 static int ad5446_spi_probe(struct spi_device *spi)
 {
 static struct spi_driver ad5446_spi_driver = {
 	.driver = {
 		.name	= "ad5446",
-		.of_match_table = of_match_ptr(ad5446_of_ids),
+		.of_match_table = ad5446_of_ids,
 	},
 	.probe		= ad5446_spi_probe,
 	.remove		= ad5446_spi_remove,

drivers/iio/dac/ad5592r-base.c+27−29

@@ -374,36 +374,36 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, · 373 unmodified lines
374	{	374	{
375	struct ad5592r_state *st = iio_priv(iio_dev);	375	struct ad5592r_state *st = iio_priv(iio_dev);
376	u16 read_val;	376	u16 read_val;
377	int ret;	377	int ret, mult;
378		378
379	switch (m) {	379	switch (m) {
380	case IIO_CHAN_INFO_RAW:	380	case IIO_CHAN_INFO_RAW:
381	mutex_lock(&st->lock);
382
383	if (!chan->output) {	381	if (!chan->output) {
		382	mutex_lock(&st->lock);
384	ret = st->ops->read_adc(st, chan->channel, &read_val);	383	ret = st->ops->read_adc(st, chan->channel, &read_val);
		384	mutex_unlock(&st->lock);
385	if (ret)	385	if (ret)
386	goto unlock;	386	return ret;
387		387
388	if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {	388	if ((read_val >> 12 & 0x7) != (chan->channel & 0x7)) {
389	dev_err(st->dev, "Error while reading channel %u\n",	389	dev_err(st->dev, "Error while reading channel %u\n",
390	chan->channel);	390	chan->channel);
391	ret = -EIO;	391	return -EIO;
392	goto unlock;
393	}	392	}
394		393
395	read_val &= GENMASK(11, 0);	394	read_val &= GENMASK(11, 0);
396		395
397	} else {	396	} else {
		397	mutex_lock(&st->lock);
398	read_val = st->cached_dac[chan->channel];	398	read_val = st->cached_dac[chan->channel];
		399	mutex_unlock(&st->lock);
399	}	400	}
400		401
401	dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",	402	dev_dbg(st->dev, "Channel %u read: 0x%04hX\n",
402	chan->channel, read_val);	403	chan->channel, read_val);
403		404
404	*val = (int) read_val;	405	*val = (int) read_val;
405	ret = IIO_VAL_INT;	406	return IIO_VAL_INT;
406	break;
407	case IIO_CHAN_INFO_SCALE:	407	case IIO_CHAN_INFO_SCALE:
408	*val = ad5592r_get_vref(st);	408	*val = ad5592r_get_vref(st);
409		409
@@ -412,24 +412,24 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, · 2 unmodified lines
412	*val = div_s64_rem(tmp, 1000000000LL, val2);	412	*val = div_s64_rem(tmp, 1000000000LL, val2);
413		413
414	return IIO_VAL_INT_PLUS_MICRO;	414	return IIO_VAL_INT_PLUS_MICRO;
415	} else {	415	}
416	int mult;
417		416
418	mutex_lock(&st->lock);	417	mutex_lock(&st->lock);
419		418
420	if (chan->output)	419	if (chan->output)
421	mult = !!(st->cached_gp_ctrl &	420	mult = !!(st->cached_gp_ctrl &
422	AD5592R_REG_CTRL_DAC_RANGE);	421	AD5592R_REG_CTRL_DAC_RANGE);
423	else	422	else
424	mult = !!(st->cached_gp_ctrl &	423	mult = !!(st->cached_gp_ctrl &
425	AD5592R_REG_CTRL_ADC_RANGE);	424	AD5592R_REG_CTRL_ADC_RANGE);
426		425
427	val = ++mult;	426	mutex_unlock(&st->lock);
428		427
429	*val2 = chan->scan_type.realbits;	428	val = ++mult;
430	ret = IIO_VAL_FRACTIONAL_LOG2;	429
431	}	430	*val2 = chan->scan_type.realbits;
432	break;	431
		432	return IIO_VAL_FRACTIONAL_LOG2;
433	case IIO_CHAN_INFO_OFFSET:	433	case IIO_CHAN_INFO_OFFSET:
434	ret = ad5592r_get_vref(st);	434	ret = ad5592r_get_vref(st);
435		435
@@ -439,15 +439,13 @@ static int ad5592r_read_raw(struct iio_dev *iio_dev, · 3 unmodified lines
439	val = (-34365 25) / ret;	439	val = (-34365 25) / ret;
440	else	440	else
441	val = (-75365 25) / ret;	441	val = (-75365 25) / ret;
442	ret = IIO_VAL_INT;	442
443	break;	443	mutex_unlock(&st->lock);
		444
		445	return IIO_VAL_INT;
444	default:	446	default:
445	return -EINVAL;	447	return -EINVAL;
446	}	448	}
447
448	unlock:
449	mutex_unlock(&st->lock);
450	return ret;
451	}	449	}
452		450
453	static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,	451	static int ad5592r_write_raw_get_fmt(struct iio_dev *indio_dev,
@@ -486,7 +484,7 @@ static const struct iio_chan_spec_ext_info ad5592r_ext_info[] = { · 32 unmodified lines
486	{	484	{
487	.name = "scale_available",	485	.name = "scale_available",
488	.read = ad5592r_show_scale_available,	486	.read = ad5592r_show_scale_available,
489	.shared = true,	487	.shared = IIO_SHARED_BY_TYPE,
490	},	488	},
491	{},	489	{},
492	};	490	};

drivers/iio/dac/ad5592r.c+3−4

 #include <linux/bitops.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
 #include <linux/spi/spi.h>
-#include <linux/acpi.h>
 #define AD5592R_GPIO_READBACK_EN	BIT(10)
 #define AD5592R_LDAC_READBACK_EN	BIT(6)
 static struct spi_driver ad5592r_spi_driver = {
 	.driver = {
 		.name = "ad5592r",
-		.of_match_table = of_match_ptr(ad5592r_of_match),
+		.of_match_table = ad5592r_of_match,
-		.acpi_match_table = ACPI_PTR(ad5592r_acpi_match),
+		.acpi_match_table = ad5592r_acpi_match,
 	},
 	.probe = ad5592r_spi_probe,
 	.remove = ad5592r_spi_remove,

drivers/iio/dac/ad5593r.c+3−4

 #include <linux/bitops.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/acpi.h>
 #define AD5593R_MODE_CONF		(0 << 4)
 #define AD5593R_MODE_DAC_WRITE		(1 << 4)
 static struct i2c_driver ad5593r_driver = {
 	.driver = {
 		.name = "ad5593r",
-		.of_match_table = of_match_ptr(ad5593r_of_match),
+		.of_match_table = ad5593r_of_match,
-		.acpi_match_table = ACPI_PTR(ad5593r_acpi_match),
+		.acpi_match_table = ad5593r_acpi_match,
 	},
 	.probe = ad5593r_i2c_probe,
 	.remove = ad5593r_i2c_remove,

drivers/iio/dac/ad5686.c+4−4

drivers/iio/dac/ad5686.h+1−1

@@ -104,7 +104,7 @@ typedef int (ad5686_read_func)(struct ad5686_state st, u8 addr); · 103 unmodified lines
104	struct ad5686_chip_info {	104	struct ad5686_chip_info {
105	u16 int_vref_mv;	105	u16 int_vref_mv;
106	unsigned int num_channels;	106	unsigned int num_channels;
107	struct iio_chan_spec *channels;	107	const struct iio_chan_spec *channels;
108	enum ad5686_regmap_type regmap_type;	108	enum ad5686_regmap_type regmap_type;
109	};	109	};
110		110

drivers/iio/dac/ad7303.c+5−1

 #include <linux/err.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/kernel.h>
 #include <linux/spi/spi.h>
 #include <linux/slab.h>
  * @spi:		the device for this driver instance
  * @config:		cached config register value
  * @dac_cache:		current DAC raw value (chip does not support readback)
+ * @vdd_reg:		reference to VDD regulator
+ * @vref_reg:		reference to VREF regulator
+ * @lock:		protect writes and cache updates
  * @data:		spi transfer buffer
  */
 static struct spi_driver ad7303_driver = {
 	.driver = {
 		.name = "ad7303",
-		.of_match_table = of_match_ptr(ad7303_spi_of_match),
+		.of_match_table = ad7303_spi_of_match,
 	},
 	.probe = ad7303_probe,
 	.remove = ad7303_remove,

drivers/iio/dac/dpot-dac.c+6−10

 	indio_dev->num_channels = 1;
 	dac->vref = devm_regulator_get(dev, "vref");
-	if (IS_ERR(dac->vref)) {
+	if (IS_ERR(dac->vref))
-		if (PTR_ERR(dac->vref) != -EPROBE_DEFER)
+		return dev_err_probe(&pdev->dev, PTR_ERR(dac->vref),
-			dev_err(&pdev->dev, "failed to get vref regulator\n");
+				     "failed to get vref regulator\n");
-		return PTR_ERR(dac->vref);
-	}
 	dac->dpot = devm_iio_channel_get(dev, "dpot");
-	if (IS_ERR(dac->dpot)) {
+	if (IS_ERR(dac->dpot))
-		if (PTR_ERR(dac->dpot) != -EPROBE_DEFER)
+		return dev_err_probe(&pdev->dev, PTR_ERR(dac->dpot),
-			dev_err(dev, "failed to get dpot input channel\n");
+				     "failed to get dpot input channel\n");
-		return PTR_ERR(dac->dpot);
-	}
 	ret = iio_get_channel_type(dac->dpot, &type);
 	if (ret < 0)

drivers/iio/dac/mcp4725.c+7−22

 #include <linux/err.h>
 #include <linux/delay.h>
 #include <linux/regulator/consumer.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of.h>
+#include <linux/property.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 	.attrs = &mcp4725_attribute_group,
 };
-#ifdef CONFIG_OF
 static int mcp4725_probe_dt(struct device *dev,
 			    struct mcp4725_platform_data *pdata)
 {
-	struct device_node *np = dev->of_node;
-	if (!np)
-		return -ENODEV;
 	/* check if is the vref-supply defined */
-	pdata->use_vref = of_property_read_bool(np, "vref-supply");
+	pdata->use_vref = device_property_read_bool(dev, "vref-supply");
 	pdata->vref_buffered =
-		of_property_read_bool(np, "microchip,vref-buffered");
+		device_property_read_bool(dev, "microchip,vref-buffered");
 	return 0;
 }
-#else
-static int mcp4725_probe_dt(struct device *dev,
-			    struct mcp4725_platform_data *platform_data)
-{
-	return -ENODEV;
-}
-#endif
 static int mcp4725_probe(struct i2c_client *client,
 			 const struct i2c_device_id *id)
 	data = iio_priv(indio_dev);
 	i2c_set_clientdata(client, indio_dev);
 	data->client = client;
-	if (client->dev.of_node)
+	if (dev_fwnode(&client->dev))
-		data->id = (enum chip_id)of_device_get_match_data(&client->dev);
+		data->id = (enum chip_id)device_get_match_data(&client->dev);
 	else
 		data->id = id->driver_data;
 	pdata = dev_get_platdata(&client->dev);
 };
 MODULE_DEVICE_TABLE(i2c, mcp4725_id);
-#ifdef CONFIG_OF
 static const struct of_device_id mcp4725_of_match[] = {
 	{
 		.compatible = "microchip,mcp4725",
 	{ }
 };
 MODULE_DEVICE_TABLE(of, mcp4725_of_match);
-#endif
 static struct i2c_driver mcp4725_driver = {
 	.driver = {
 		.name	= MCP4725_DRV_NAME,
-		.of_match_table = of_match_ptr(mcp4725_of_match),
+		.of_match_table = mcp4725_of_match,
 		.pm	= &mcp4725_pm_ops,
 	},
 	.probe		= mcp4725_probe,

drivers/iio/dac/stm32-dac-core.c+1−4

 	rst = devm_reset_control_get_optional_exclusive(dev, NULL);
 	if (rst) {
 		if (IS_ERR(rst)) {
-			ret = PTR_ERR(rst);
+			ret = dev_err_probe(dev, PTR_ERR(rst), "reset get failed\n");
-			if (ret != -EPROBE_DEFER)
-				dev_err(dev, "reset get failed, %d\n", ret);
 			goto err_hw_stop;
 		}

drivers/iio/dac/stm32-dac.c+9−4

 /**
  * struct stm32_dac - private data of DAC driver
  * @common:		reference to DAC common data
+ * @lock:		lock to protect against potential races when reading
+ *			and update CR, to keep it in sync with pm_runtime
  */
 struct stm32_dac {
 	struct stm32_dac_common *common;
+	struct mutex		lock;
 };
 static int stm32_dac_is_enabled(struct iio_dev *indio_dev, int channel)
 	int ret;
 	/* already enabled / disabled ? */
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&dac->lock);
 	ret = stm32_dac_is_enabled(indio_dev, ch);
 	if (ret < 0 || enable == !!ret) {
-		mutex_unlock(&indio_dev->mlock);
+		mutex_unlock(&dac->lock);
 		return ret < 0 ? ret : 0;
 	}
 		ret = pm_runtime_get_sync(dev);
 		if (ret < 0) {
 			pm_runtime_put_noidle(dev);
-			mutex_unlock(&indio_dev->mlock);
+			mutex_unlock(&dac->lock);
 			return ret;
 		}
 	}
 	ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en);
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&dac->lock);
 	if (ret < 0) {
 		dev_err(&indio_dev->dev, "%s failed\n", en ?
 			"Enable" : "Disable");
 	indio_dev->info = &stm32_dac_iio_info;
 	indio_dev->modes = INDIO_DIRECT_MODE;
+	mutex_init(&dac->lock);
 	ret = stm32_dac_chan_of_init(indio_dev);
 	if (ret < 0)
 		return ret;

drivers/iio/dac/ti-dac082s085.c+2−3

 #include <linux/iio/iio.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/regulator/consumer.h>
 #include <linux/spi/spi.h>
 	return 0;
 }
-#ifdef CONFIG_OF
 static const struct of_device_id ti_dac_of_id[] = {
 	{ .compatible = "ti,dac082s085" },
 	{ .compatible = "ti,dac102s085" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ti_dac_of_id);
-#endif
 static const struct spi_device_id ti_dac_spi_id[] = {
 	{ "dac082s085", dual_8bit  },
 static struct spi_driver ti_dac_driver = {
 	.driver = {
 		.name		= "ti-dac082s085",
-		.of_match_table	= of_match_ptr(ti_dac_of_id),
+		.of_match_table	= ti_dac_of_id,
 	},
 	.probe	  = ti_dac_probe,
 	.remove   = ti_dac_remove,

drivers/iio/dac/ti-dac5571.c+17−19

 #include <linux/iio/iio.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of.h>
 #include <linux/regulator/consumer.h>
 enum chip_id {
 	struct mutex lock;
 	struct regulator *vref;
 	u16 val[4];
-	bool powerdown;
+	bool powerdown[4];
-	u8 powerdown_mode;
+	u8 powerdown_mode[4];
 	struct dac5571_spec const *spec;
 	int (*dac5571_cmd)(struct dac5571_data *data, int channel, u16 val);
 	int (*dac5571_pwrdwn)(struct dac5571_data *data, int channel, u8 pwrdwn);
 {
 	struct dac5571_data *data = iio_priv(indio_dev);
-	return data->powerdown_mode;
+	return data->powerdown_mode[chan->channel];
 }
 static int dac5571_set_powerdown_mode(struct iio_dev *indio_dev,
 	struct dac5571_data *data = iio_priv(indio_dev);
 	int ret = 0;
-	if (data->powerdown_mode == mode)
+	if (data->powerdown_mode[chan->channel] == mode)
 		return 0;
 	mutex_lock(&data->lock);
-	if (data->powerdown) {
+	if (data->powerdown[chan->channel]) {
 		ret = data->dac5571_pwrdwn(data, chan->channel,
 					   DAC5571_POWERDOWN(mode));
 		if (ret)
 			goto out;
 	}
-	data->powerdown_mode = mode;
+	data->powerdown_mode[chan->channel] = mode;
  out:
 	mutex_unlock(&data->lock);
 {
 	struct dac5571_data *data = iio_priv(indio_dev);
-	return sprintf(buf, "%d\n", data->powerdown);
+	return sprintf(buf, "%d\n", data->powerdown[chan->channel]);
 }
 static ssize_t dac5571_write_powerdown(struct iio_dev *indio_dev,
 	if (ret)
 		return ret;
-	if (data->powerdown == powerdown)
+	if (data->powerdown[chan->channel] == powerdown)
 		return len;
 	mutex_lock(&data->lock);
 	if (powerdown)
 		ret = data->dac5571_pwrdwn(data, chan->channel,
-			    DAC5571_POWERDOWN(data->powerdown_mode));
+			    DAC5571_POWERDOWN(data->powerdown_mode[chan->channel]));
 	else
-		ret = data->dac5571_cmd(data, chan->channel, data->val[0]);
+		ret = data->dac5571_cmd(data, chan->channel,
+				data->val[chan->channel]);
 	if (ret)
 		goto out;
-	data->powerdown = powerdown;
+	data->powerdown[chan->channel] = powerdown;
  out:
 	mutex_unlock(&data->lock);
 		.name	   = "powerdown",
 		.read	   = dac5571_read_powerdown,
 		.write	   = dac5571_write_powerdown,
-		.shared	   = IIO_SHARED_BY_TYPE,
+		.shared	   = IIO_SEPARATE,
 	},
-	IIO_ENUM("powerdown_mode", IIO_SHARED_BY_TYPE, &dac5571_powerdown_mode),
+	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &dac5571_powerdown_mode),
 	IIO_ENUM_AVAILABLE("powerdown_mode", &dac5571_powerdown_mode),
 	{},
 };
 		if (val >= (1 << data->spec->resolution) || val < 0)
 			return -EINVAL;
-		if (data->powerdown)
+		if (data->powerdown[chan->channel])
 			return -EBUSY;
 		mutex_lock(&data->lock);
 	return 0;
 }
-#ifdef CONFIG_OF
 static const struct of_device_id dac5571_of_id[] = {
 	{.compatible = "ti,dac5571"},
 	{.compatible = "ti,dac6571"},
 	{}
 };
 MODULE_DEVICE_TABLE(of, dac5571_of_id);
-#endif
 static const struct i2c_device_id dac5571_id[] = {
 	{"dac5571", single_8bit},
 static struct i2c_driver dac5571_driver = {
 	.driver = {
 		   .name = "ti-dac5571",
-		   .of_match_table = of_match_ptr(dac5571_of_id),
+		   .of_match_table = dac5571_of_id,
 	},
 	.probe	  = dac5571_probe,
 	.remove   = dac5571_remove,

drivers/iio/dac/ti-dac7612.c+12−2

 	struct gpio_desc *loaddacs;
 	uint16_t cache[2];
+	/*
+	 * Lock to protect the state of the device from potential concurrent
+	 * write accesses from userspace. The write operation requires an
+	 * SPI write, then toggling of a GPIO, so the lock aims to protect
+	 * the sanity of the entire sequence of operation.
+	 */
+	struct mutex lock;
 	/*
 	 * DMA (thus cache coherency maintenance) requires the
 	 * transfer buffers to live in their own cache lines.
 	if (val == priv->cache[chan->channel])
 		return 0;
-	mutex_lock(&iio_dev->mlock);
+	mutex_lock(&priv->lock);
 	ret = dac7612_cmd_single(priv, chan->channel, val);
-	mutex_unlock(&iio_dev->mlock);
+	mutex_unlock(&priv->lock);
 	return ret;
 }
 	iio_dev->num_channels = ARRAY_SIZE(priv->cache);
 	iio_dev->name = spi_get_device_id(spi)->name;
+	mutex_init(&priv->lock);
 	for (i = 0; i < ARRAY_SIZE(priv->cache); i++) {
 		ret = dac7612_cmd_single(priv, i, 0);
 		if (ret)

drivers/iio/dummy/iio_dummy_evgen.c+3−1

 // SPDX-License-Identifier: GPL-2.0-only
-/**
+/*
  * Copyright (c) 2011 Jonathan Cameron
  *
  * Companion module to the iio simple dummy example driver.
 #define IIO_EVENTGEN_NO 10
 /**
+ * struct iio_dummy_eventgen - event generator specific state
  * @regs: irq regs we are faking
  * @lock: protect the evgen state
  * @inuse: mask of which irqs are connected
  * @irq_sim: interrupt simulator
  * @base: base of irq range
+ * @irq_sim_domain: irq simulator domain
  */
 struct iio_dummy_eventgen {
 	struct iio_dummy_regs regs[IIO_EVENTGEN_NO];

drivers/iio/frequency/ad9523.c+20−40

 	return 0;
 }
+static void ad9523_reg_disable(void *data)
+{
+	struct regulator *reg = data;
+	regulator_disable(reg);
+}
 static int ad9523_probe(struct spi_device *spi)
 {
 	struct ad9523_platform_data *pdata = spi->dev.platform_data;
 		ret = regulator_enable(st->reg);
 		if (ret)
 			return ret;
+		ret = devm_add_action_or_reset(&spi->dev, ad9523_reg_disable,
+					       st->reg);
+		if (ret)
+			return ret;
 	}
 	st->pwrdown_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",
 		GPIOD_OUT_HIGH);
-	if (IS_ERR(st->pwrdown_gpio)) {
+	if (IS_ERR(st->pwrdown_gpio))
-		ret = PTR_ERR(st->pwrdown_gpio);
+		return PTR_ERR(st->pwrdown_gpio);
-		goto error_disable_reg;
-	}
 	st->reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset",
 		GPIOD_OUT_LOW);
-	if (IS_ERR(st->reset_gpio)) {
+	if (IS_ERR(st->reset_gpio))
-		ret = PTR_ERR(st->reset_gpio);
+		return PTR_ERR(st->reset_gpio);
-		goto error_disable_reg;
-	}
 	if (st->reset_gpio) {
 		udelay(1);
 	st->sync_gpio = devm_gpiod_get_optional(&spi->dev, "sync",
 		GPIOD_OUT_HIGH);
-	if (IS_ERR(st->sync_gpio)) {
+	if (IS_ERR(st->sync_gpio))
-		ret = PTR_ERR(st->sync_gpio);
+		return PTR_ERR(st->sync_gpio);
-		goto error_disable_reg;
-	}
 	spi_set_drvdata(spi, indio_dev);
 	st->spi = spi;
 	ret = ad9523_setup(indio_dev);
 	if (ret < 0)
-		goto error_disable_reg;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_disable_reg;
-	dev_info(&spi->dev, "probed %s\n", indio_dev->name);
-	return 0;
-error_disable_reg:
-	if (!IS_ERR(st->reg))
-		regulator_disable(st->reg);
-	return ret;
-}
-static int ad9523_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct ad9523_state *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	if (!IS_ERR(st->reg))
-		regulator_disable(st->reg);
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 static const struct spi_device_id ad9523_id[] = {
 		.name	= "ad9523",
 	},
 	.probe		= ad9523_probe,
-	.remove		= ad9523_remove,
 	.id_table	= ad9523_id,
 };
 module_spi_driver(ad9523_driver);

drivers/iio/frequency/adf4350.c+15−6

 	unsigned long			regs[6];
 	unsigned long			regs_hw[6];
 	unsigned long long		freq_req;
+	/*
+	 * Lock to protect the state of the device from potential concurrent
+	 * writes. The device is configured via a sequence of SPI writes,
+	 * and this lock is meant to prevent the start of another sequence
+	 * before another one has finished.
+	 */
+	struct mutex			lock;
 	/*
 	 * DMA (thus cache coherency maintenance) requires the
 	 * transfer buffers to live in their own cache lines.
 	if (reg > ADF4350_REG5)
 		return -EINVAL;
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&st->lock);
 	if (readval == NULL) {
 		st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2));
 		ret = adf4350_sync_config(st);
 		*readval =  st->regs_hw[reg];
 		ret = 0;
 	}
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&st->lock);
 	return ret;
 }
 	if (ret)
 		return ret;
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&st->lock);
 	switch ((u32)private) {
 	case ADF4350_FREQ:
 		ret = adf4350_set_freq(st, readin);
 	default:
 		ret = -EINVAL;
 	}
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&st->lock);
 	return ret ? ret : len;
 }
 	unsigned long long val;
 	int ret = 0;
-	mutex_lock(&indio_dev->mlock);
+	mutex_lock(&st->lock);
 	switch ((u32)private) {
 	case ADF4350_FREQ:
 		val = (u64)((st->r0_int * st->r1_mod) + st->r0_fract) *
 		ret = -EINVAL;
 		val = 0;
 	}
-	mutex_unlock(&indio_dev->mlock);
+	mutex_unlock(&st->lock);
 	return ret < 0 ? ret : sprintf(buf, "%llu\n", val);
 }
 	indio_dev->channels = &adf4350_chan;
 	indio_dev->num_channels = 1;
+	mutex_init(&st->lock);
 	st->chspc = pdata->channel_spacing;
 	if (clk) {
 		st->clk = clk;

drivers/iio/gyro/Kconfig+12−0

@@ -41,6 +41,18 @@ config ADIS16260 · 40 unmodified lines
41	This driver can also be built as a module. If so, the module	41	This driver can also be built as a module. If so, the module
42	will be called adis16260.	42	will be called adis16260.
43		43
		44	config ADXRS290
		45	tristate "Analog Devices ADXRS290 Dual-Axis MEMS Gyroscope SPI driver"
		46	depends on SPI
		47	select IIO_BUFFER
		48	select IIO_TRIGGERED_BUFFER
		49	help
		50	Say yes here to build support for Analog Devices ADXRS290 programmable
		51	digital output gyroscope.
		52
		53	This driver can also be built as a module. If so, the module will be
		54	called adxrs290.
		55
44	config ADXRS450	56	config ADXRS450
45	tristate "Analog Devices ADXRS450/3 Digital Output Gyroscope SPI driver"	57	tristate "Analog Devices ADXRS450/3 Digital Output Gyroscope SPI driver"
46	depends on SPI	58	depends on SPI

drivers/iio/gyro/Makefile+1−0

@@ -8,6 +8,7 @@ obj-$(CONFIG_ADIS16080) += adis16080.o · 7 unmodified lines
8	obj-$(CONFIG_ADIS16130) += adis16130.o	8	obj-$(CONFIG_ADIS16130) += adis16130.o
9	obj-$(CONFIG_ADIS16136) += adis16136.o	9	obj-$(CONFIG_ADIS16136) += adis16136.o
10	obj-$(CONFIG_ADIS16260) += adis16260.o	10	obj-$(CONFIG_ADIS16260) += adis16260.o
		11	obj-$(CONFIG_ADXRS290) += adxrs290.o
11	obj-$(CONFIG_ADXRS450) += adxrs450.o	12	obj-$(CONFIG_ADXRS450) += adxrs450.o
12	obj-$(CONFIG_BMG160) += bmg160_core.o	13	obj-$(CONFIG_BMG160) += bmg160_core.o
13	obj-$(CONFIG_BMG160_I2C) += bmg160_i2c.o	14	obj-$(CONFIG_BMG160_I2C) += bmg160_i2c.o

drivers/iio/gyro/adis16080.c+1−1

@@ -38,7 +38,7 @@ struct adis16080_chip_info { · 37 unmodified lines
38	* @us: actual spi_device to write data	38	* @us: actual spi_device to write data
39	* @info: chip specific parameters	39	* @info: chip specific parameters
40	* @buf: transmit or receive buffer	40	* @buf: transmit or receive buffer
41	* @lock lock to protect buffer during reads	41	* @lock: lock to protect buffer during reads
42	**/	42	**/
43	struct adis16080_state {	43	struct adis16080_state {
44	struct spi_device *us;	44	struct spi_device *us;

drivers/iio/gyro/adis16136.c+13−24

 	},
 };
+static void adis16136_stop(void *data)
+{
+	adis16136_stop_device(data);
+}
 static int adis16136_probe(struct spi_device *spi)
 {
 	const struct spi_device_id *id = spi_get_device_id(spi);
 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(&adis16136->adis, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(&adis16136->adis, indio_dev, NULL);
 	if (ret)
 		return ret;
 	ret = adis16136_initial_setup(indio_dev);
 	if (ret)
-		goto error_cleanup_buffer;
+		return ret;
-	ret = iio_device_register(indio_dev);
+	ret = devm_add_action_or_reset(&spi->dev, adis16136_stop, indio_dev);
 	if (ret)
-		goto error_stop_device;
+		return ret;
-	adis16136_debugfs_init(indio_dev);
-	return 0;
-error_stop_device:
-	adis16136_stop_device(indio_dev);
-error_cleanup_buffer:
-	adis_cleanup_buffer_and_trigger(&adis16136->adis, indio_dev);
-	return ret;
-}
-static int adis16136_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis16136 *adis16136 = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
+	ret = devm_iio_device_register(&spi->dev, indio_dev);
-	adis16136_stop_device(indio_dev);
+	if (ret)
+		return ret;
-	adis_cleanup_buffer_and_trigger(&adis16136->adis, indio_dev);
+	adis16136_debugfs_init(indio_dev);
 	return 0;
 }
 	},
 	.id_table = adis16136_ids,
 	.probe = adis16136_probe,
-	.remove = adis16136_remove,
 };
 module_spi_driver(adis16136_driver);

drivers/iio/gyro/adis16260.c+11−22

 		BIT(ADIS16260_DIAG_STAT_POWER_LOW_BIT),
 };
+static void adis16260_stop(void *data)
+{
+	adis16260_stop_device(data);
+}
 static int adis16260_probe(struct spi_device *spi)
 {
 	const struct spi_device_id *id;
 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(&adis16260->adis, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(&adis16260->adis, indio_dev, NULL);
 	if (ret)
 		return ret;
 	/* Get the device into a sane initial state */
 	ret = adis_initial_startup(&adis16260->adis);
 	if (ret)
-		goto error_cleanup_buffer_trigger;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_cleanup_buffer_trigger;
-	return 0;
-error_cleanup_buffer_trigger:
-	adis_cleanup_buffer_and_trigger(&adis16260->adis, indio_dev);
-	return ret;
-}
-static int adis16260_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis16260 *adis16260 = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
+	ret = devm_add_action_or_reset(&spi->dev, adis16260_stop, indio_dev);
-	adis16260_stop_device(indio_dev);
+	if (ret)
-	adis_cleanup_buffer_and_trigger(&adis16260->adis, indio_dev);
+		return ret;
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 /*
 		.name = "adis16260",
 	},
 	.probe = adis16260_probe,
-	.remove = adis16260_remove,
 	.id_table = adis16260_id,
 };
 module_spi_driver(adis16260_driver);

drivers/iio/gyro/adxrs290.c+710−0

@@ -0,0 +1,710 @@
	1	// SPDX-License-Identifier: GPL-2.0-or-later
	2	/*
	3	* ADXRS290 SPI Gyroscope Driver
	4	*
	5	* Copyright (C) 2020 Nishant Malpani <nish.malpani25@gmail.com>
	6	* Copyright (C) 2020 Analog Devices, Inc.
	7	*/
	8
	9	#include <linux/bitfield.h>
	10	#include <linux/delay.h>
	11	#include <linux/device.h>
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/spi/spi.h>
	15
	16	#include <linux/iio/buffer.h>
	17	#include <linux/iio/iio.h>
	18	#include <linux/iio/sysfs.h>
	19	#include <linux/iio/trigger.h>
	20	#include <linux/iio/triggered_buffer.h>
	21	#include <linux/iio/trigger_consumer.h>
	22
	23	#define ADXRS290_ADI_ID 0xAD
	24	#define ADXRS290_MEMS_ID 0x1D
	25	#define ADXRS290_DEV_ID 0x92
	26
	27	#define ADXRS290_REG_ADI_ID 0x00
	28	#define ADXRS290_REG_MEMS_ID 0x01
	29	#define ADXRS290_REG_DEV_ID 0x02
	30	#define ADXRS290_REG_REV_ID 0x03
	31	#define ADXRS290_REG_SN0 0x04 /* Serial Number Registers, 4 bytes */
	32	#define ADXRS290_REG_DATAX0 0x08 /* Roll Rate o/p Data Regs, 2 bytes */
	33	#define ADXRS290_REG_DATAY0 0x0A /* Pitch Rate o/p Data Regs, 2 bytes */
	34	#define ADXRS290_REG_TEMP0 0x0C
	35	#define ADXRS290_REG_POWER_CTL 0x10
	36	#define ADXRS290_REG_FILTER 0x11
	37	#define ADXRS290_REG_DATA_RDY 0x12
	38
	39	#define ADXRS290_READ BIT(7)
	40	#define ADXRS290_TSM BIT(0)
	41	#define ADXRS290_MEASUREMENT BIT(1)
	42	#define ADXRS290_DATA_RDY_OUT BIT(0)
	43	#define ADXRS290_SYNC_MASK GENMASK(1, 0)
	44	#define ADXRS290_SYNC(x) FIELD_PREP(ADXRS290_SYNC_MASK, x)
	45	#define ADXRS290_LPF_MASK GENMASK(2, 0)
	46	#define ADXRS290_LPF(x) FIELD_PREP(ADXRS290_LPF_MASK, x)
	47	#define ADXRS290_HPF_MASK GENMASK(7, 4)
	48	#define ADXRS290_HPF(x) FIELD_PREP(ADXRS290_HPF_MASK, x)
	49
	50	#define ADXRS290_READ_REG(reg) (ADXRS290_READ \| (reg))
	51
	52	#define ADXRS290_MAX_TRANSITION_TIME_MS 100
	53
	54	enum adxrs290_mode {
	55	ADXRS290_MODE_STANDBY,
	56	ADXRS290_MODE_MEASUREMENT,
	57	};
	58
	59	enum adxrs290_scan_index {
	60	ADXRS290_IDX_X,
	61	ADXRS290_IDX_Y,
	62	ADXRS290_IDX_TEMP,
	63	ADXRS290_IDX_TS,
	64	};
	65
	66	struct adxrs290_state {
	67	struct spi_device *spi;
	68	/* Serialize reads and their subsequent processing */
	69	struct mutex lock;
	70	enum adxrs290_mode mode;
	71	unsigned int lpf_3db_freq_idx;
	72	unsigned int hpf_3db_freq_idx;
	73	struct iio_trigger *dready_trig;
	74	/* Ensure correct alignment of timestamp when present */
	75	struct {
	76	s16 channels[3];
	77	s64 ts __aligned(8);
	78	} buffer;
	79	};
	80
	81	/*
	82	* Available cut-off frequencies of the low pass filter in Hz.
	83	* The integer part and fractional part are represented separately.
	84	*/
	85	static const int adxrs290_lpf_3db_freq_hz_table[][2] = {
	86	[0] = {480, 0},
	87	[1] = {320, 0},
	88	[2] = {160, 0},
	89	[3] = {80, 0},
	90	[4] = {56, 600000},
	91	[5] = {40, 0},
	92	[6] = {28, 300000},
	93	[7] = {20, 0},
	94	};
	95
	96	/*
	97	* Available cut-off frequencies of the high pass filter in Hz.
	98	* The integer part and fractional part are represented separately.
	99	*/
	100	static const int adxrs290_hpf_3db_freq_hz_table[][2] = {
	101	[0] = {0, 0},
	102	[1] = {0, 11000},
	103	[2] = {0, 22000},
	104	[3] = {0, 44000},
	105	[4] = {0, 87000},
	106	[5] = {0, 175000},
	107	[6] = {0, 350000},
	108	[7] = {0, 700000},
	109	[8] = {1, 400000},
	110	[9] = {2, 800000},
	111	[10] = {11, 300000},
	112	};
	113
	114	static int adxrs290_get_rate_data(struct iio_dev indio_dev, const u8 cmd, int val)
	115	{
	116	struct adxrs290_state *st = iio_priv(indio_dev);
	117	int ret = 0;
	118	int temp;
	119
	120	mutex_lock(&st->lock);
	121	temp = spi_w8r16(st->spi, cmd);
	122	if (temp < 0) {
	123	ret = temp;
	124	goto err_unlock;
	125	}
	126
	127	*val = temp;
	128
	129	err_unlock:
	130	mutex_unlock(&st->lock);
	131	return ret;
	132	}
	133
	134	static int adxrs290_get_temp_data(struct iio_dev indio_dev, int val)
	135	{
	136	const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_TEMP0);
	137	struct adxrs290_state *st = iio_priv(indio_dev);
	138	int ret = 0;
	139	int temp;
	140
	141	mutex_lock(&st->lock);
	142	temp = spi_w8r16(st->spi, cmd);
	143	if (temp < 0) {
	144	ret = temp;
	145	goto err_unlock;
	146	}
	147
	148	/* extract lower 12 bits temperature reading */
	149	*val = temp & 0x0FFF;
	150
	151	err_unlock:
	152	mutex_unlock(&st->lock);
	153	return ret;
	154	}
	155
	156	static int adxrs290_get_3db_freq(struct iio_dev indio_dev, u8 val, u8 *val2)
	157	{
	158	const u8 cmd = ADXRS290_READ_REG(ADXRS290_REG_FILTER);
	159	struct adxrs290_state *st = iio_priv(indio_dev);
	160	int ret = 0;
	161	short temp;
	162
	163	mutex_lock(&st->lock);
	164	temp = spi_w8r8(st->spi, cmd);
	165	if (temp < 0) {
	166	ret = temp;
	167	goto err_unlock;
	168	}
	169
	170	*val = FIELD_GET(ADXRS290_LPF_MASK, temp);
	171	*val2 = FIELD_GET(ADXRS290_HPF_MASK, temp);
	172
	173	err_unlock:
	174	mutex_unlock(&st->lock);
	175	return ret;
	176	}
	177
	178	static int adxrs290_spi_write_reg(struct spi_device *spi, const u8 reg,
	179	const u8 val)
	180	{
	181	u8 buf[2];
	182
	183	buf[0] = reg;
	184	buf[1] = val;
	185
	186	return spi_write_then_read(spi, buf, ARRAY_SIZE(buf), NULL, 0);
	187	}
	188
	189	static int adxrs290_find_match(const int (*freq_tbl)[2], const int n,
	190	const int val, const int val2)
	191	{
	192	int i;
	193
	194	for (i = 0; i < n; i++) {
	195	if (freq_tbl[i][0] == val && freq_tbl[i][1] == val2)
	196	return i;
	197	}
	198
	199	return -EINVAL;
	200	}
	201
	202	static int adxrs290_set_filter_freq(struct iio_dev *indio_dev,
	203	const unsigned int lpf_idx,
	204	const unsigned int hpf_idx)
	205	{
	206	struct adxrs290_state *st = iio_priv(indio_dev);
	207	u8 val;
	208
	209	val = ADXRS290_HPF(hpf_idx) \| ADXRS290_LPF(lpf_idx);
	210
	211	return adxrs290_spi_write_reg(st->spi, ADXRS290_REG_FILTER, val);
	212	}
	213
	214	static int adxrs290_set_mode(struct iio_dev *indio_dev, enum adxrs290_mode mode)
	215	{
	216	struct adxrs290_state *st = iio_priv(indio_dev);
	217	int val, ret;
	218
	219	if (st->mode == mode)
	220	return 0;
	221
	222	mutex_lock(&st->lock);
	223
	224	ret = spi_w8r8(st->spi, ADXRS290_READ_REG(ADXRS290_REG_POWER_CTL));
	225	if (ret < 0)
	226	goto out_unlock;
	227
	228	val = ret;
	229
	230	switch (mode) {
	231	case ADXRS290_MODE_STANDBY:
	232	val &= ~ADXRS290_MEASUREMENT;
	233	break;
	234	case ADXRS290_MODE_MEASUREMENT:
	235	val \|= ADXRS290_MEASUREMENT;
	236	break;
	237	default:
	238	ret = -EINVAL;
	239	goto out_unlock;
	240	}
	241
	242	ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_POWER_CTL, val);
	243	if (ret < 0) {
	244	dev_err(&st->spi->dev, "unable to set mode: %d\n", ret);
	245	goto out_unlock;
	246	}
	247
	248	/* update cached mode */
	249	st->mode = mode;
	250
	251	out_unlock:
	252	mutex_unlock(&st->lock);
	253	return ret;
	254	}
	255
	256	static void adxrs290_chip_off_action(void *data)
	257	{
	258	struct iio_dev *indio_dev = data;
	259
	260	adxrs290_set_mode(indio_dev, ADXRS290_MODE_STANDBY);
	261	}
	262
	263	static int adxrs290_initial_setup(struct iio_dev *indio_dev)
	264	{
	265	struct adxrs290_state *st = iio_priv(indio_dev);
	266	struct spi_device *spi = st->spi;
	267	int ret;
	268
	269	ret = adxrs290_spi_write_reg(spi, ADXRS290_REG_POWER_CTL,
	270	ADXRS290_MEASUREMENT \| ADXRS290_TSM);
	271	if (ret < 0)
	272	return ret;
	273
	274	st->mode = ADXRS290_MODE_MEASUREMENT;
	275
	276	return devm_add_action_or_reset(&spi->dev, adxrs290_chip_off_action,
	277	indio_dev);
	278	}
	279
	280	static int adxrs290_read_raw(struct iio_dev *indio_dev,
	281	struct iio_chan_spec const *chan,
	282	int *val,
	283	int *val2,
	284	long mask)
	285	{
	286	struct adxrs290_state *st = iio_priv(indio_dev);
	287	unsigned int t;
	288	int ret;
	289
	290	switch (mask) {
	291	case IIO_CHAN_INFO_RAW:
	292	ret = iio_device_claim_direct_mode(indio_dev);
	293	if (ret)
	294	return ret;
	295
	296	switch (chan->type) {
	297	case IIO_ANGL_VEL:
	298	ret = adxrs290_get_rate_data(indio_dev,
	299	ADXRS290_READ_REG(chan->address),
	300	val);
	301	if (ret < 0)
	302	break;
	303
	304	ret = IIO_VAL_INT;
	305	break;
	306	case IIO_TEMP:
	307	ret = adxrs290_get_temp_data(indio_dev, val);
	308	if (ret < 0)
	309	break;
	310
	311	ret = IIO_VAL_INT;
	312	break;
	313	default:
	314	ret = -EINVAL;
	315	break;
	316	}
	317
	318	iio_device_release_direct_mode(indio_dev);
	319	return ret;
	320	case IIO_CHAN_INFO_SCALE:
	321	switch (chan->type) {
	322	case IIO_ANGL_VEL:
	323	/* 1 LSB = 0.005 degrees/sec */
	324	*val = 0;
	325	*val2 = 87266;
	326	return IIO_VAL_INT_PLUS_NANO;
	327	case IIO_TEMP:
	328	/* 1 LSB = 0.1 degrees Celsius */
	329	*val = 100;
	330	return IIO_VAL_INT;
	331	default:
	332	return -EINVAL;
	333	}
	334	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
	335	switch (chan->type) {
	336	case IIO_ANGL_VEL:
	337	t = st->lpf_3db_freq_idx;
	338	*val = adxrs290_lpf_3db_freq_hz_table[t][0];
	339	*val2 = adxrs290_lpf_3db_freq_hz_table[t][1];
	340	return IIO_VAL_INT_PLUS_MICRO;
	341	default:
	342	return -EINVAL;
	343	}
	344	case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
	345	switch (chan->type) {
	346	case IIO_ANGL_VEL:
	347	t = st->hpf_3db_freq_idx;
	348	*val = adxrs290_hpf_3db_freq_hz_table[t][0];
	349	*val2 = adxrs290_hpf_3db_freq_hz_table[t][1];
	350	return IIO_VAL_INT_PLUS_MICRO;
	351	default:
	352	return -EINVAL;
	353	}
	354	}
	355
	356	return -EINVAL;
	357	}
	358
	359	static int adxrs290_write_raw(struct iio_dev *indio_dev,
	360	struct iio_chan_spec const *chan,
	361	int val,
	362	int val2,
	363	long mask)
	364	{
	365	struct adxrs290_state *st = iio_priv(indio_dev);
	366	int ret, lpf_idx, hpf_idx;
	367
	368	ret = iio_device_claim_direct_mode(indio_dev);
	369	if (ret)
	370	return ret;
	371
	372	switch (mask) {
	373	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
	374	lpf_idx = adxrs290_find_match(adxrs290_lpf_3db_freq_hz_table,
	375	ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table),
	376	val, val2);
	377	if (lpf_idx < 0) {
	378	ret = -EINVAL;
	379	break;
	380	}
	381
	382	/* caching the updated state of the low-pass filter */
	383	st->lpf_3db_freq_idx = lpf_idx;
	384	/* retrieving the current state of the high-pass filter */
	385	hpf_idx = st->hpf_3db_freq_idx;
	386	ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
	387	break;
	388
	389	case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
	390	hpf_idx = adxrs290_find_match(adxrs290_hpf_3db_freq_hz_table,
	391	ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table),
	392	val, val2);
	393	if (hpf_idx < 0) {
	394	ret = -EINVAL;
	395	break;
	396	}
	397
	398	/* caching the updated state of the high-pass filter */
	399	st->hpf_3db_freq_idx = hpf_idx;
	400	/* retrieving the current state of the low-pass filter */
	401	lpf_idx = st->lpf_3db_freq_idx;
	402	ret = adxrs290_set_filter_freq(indio_dev, lpf_idx, hpf_idx);
	403	break;
	404
	405	default:
	406	ret = -EINVAL;
	407	break;
	408	}
	409
	410	iio_device_release_direct_mode(indio_dev);
	411	return ret;
	412	}
	413
	414	static int adxrs290_read_avail(struct iio_dev *indio_dev,
	415	struct iio_chan_spec const *chan,
	416	const int *vals, int type, int *length,
	417	long mask)
	418	{
	419	switch (mask) {
	420	case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
	421	vals = (const int )adxrs290_lpf_3db_freq_hz_table;
	422	*type = IIO_VAL_INT_PLUS_MICRO;
	423	/* Values are stored in a 2D matrix */
	424	length = ARRAY_SIZE(adxrs290_lpf_3db_freq_hz_table) 2;
	425
	426	return IIO_AVAIL_LIST;
	427	case IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY:
	428	vals = (const int )adxrs290_hpf_3db_freq_hz_table;
	429	*type = IIO_VAL_INT_PLUS_MICRO;
	430	/* Values are stored in a 2D matrix */
	431	length = ARRAY_SIZE(adxrs290_hpf_3db_freq_hz_table) 2;
	432
	433	return IIO_AVAIL_LIST;
	434	default:
	435	return -EINVAL;
	436	}
	437	}
	438
	439	static int adxrs290_reg_access_rw(struct spi_device *spi, unsigned int reg,
	440	unsigned int *readval)
	441	{
	442	int ret;
	443
	444	ret = spi_w8r8(spi, ADXRS290_READ_REG(reg));
	445	if (ret < 0)
	446	return ret;
	447
	448	*readval = ret;
	449
	450	return 0;
	451	}
	452
	453	static int adxrs290_reg_access(struct iio_dev *indio_dev, unsigned int reg,
	454	unsigned int writeval, unsigned int *readval)
	455	{
	456	struct adxrs290_state *st = iio_priv(indio_dev);
	457
	458	if (readval)
	459	return adxrs290_reg_access_rw(st->spi, reg, readval);
	460	else
	461	return adxrs290_spi_write_reg(st->spi, reg, writeval);
	462	}
	463
	464	static int adxrs290_data_rdy_trigger_set_state(struct iio_trigger *trig,
	465	bool state)
	466	{
	467	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
	468	struct adxrs290_state *st = iio_priv(indio_dev);
	469	int ret;
	470	u8 val;
	471
	472	val = state ? ADXRS290_SYNC(ADXRS290_DATA_RDY_OUT) : 0;
	473
	474	ret = adxrs290_spi_write_reg(st->spi, ADXRS290_REG_DATA_RDY, val);
	475	if (ret < 0)
	476	dev_err(&st->spi->dev, "failed to start data rdy interrupt\n");
	477
	478	return ret;
	479	}
	480
	481	static int adxrs290_reset_trig(struct iio_trigger *trig)
	482	{
	483	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
	484	int val;
	485
	486	/*
	487	* Data ready interrupt is reset after a read of the data registers.
	488	* Here, we only read the 16b DATAY registers as that marks the end of
	489	* a read of the data registers and initiates a reset for the interrupt
	490	* line.
	491	*/
	492	adxrs290_get_rate_data(indio_dev,
	493	ADXRS290_READ_REG(ADXRS290_REG_DATAY0), &val);
	494
	495	return 0;
	496	}
	497
	498	static const struct iio_trigger_ops adxrs290_trigger_ops = {
	499	.set_trigger_state = &adxrs290_data_rdy_trigger_set_state,
	500	.validate_device = &iio_trigger_validate_own_device,
	501	.try_reenable = &adxrs290_reset_trig,
	502	};
	503
	504	static irqreturn_t adxrs290_trigger_handler(int irq, void *p)
	505	{
	506	struct iio_poll_func *pf = p;
	507	struct iio_dev *indio_dev = pf->indio_dev;
	508	struct adxrs290_state *st = iio_priv(indio_dev);
	509	u8 tx = ADXRS290_READ_REG(ADXRS290_REG_DATAX0);
	510	int ret;
	511
	512	mutex_lock(&st->lock);
	513
	514	/* exercise a bulk data capture starting from reg DATAX0... */
	515	ret = spi_write_then_read(st->spi, &tx, sizeof(tx), st->buffer.channels,
	516	sizeof(st->buffer.channels));
	517	if (ret < 0)
	518	goto out_unlock_notify;
	519
	520	iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer,
	521	pf->timestamp);
	522
	523	out_unlock_notify:
	524	mutex_unlock(&st->lock);
	525	iio_trigger_notify_done(indio_dev->trig);
	526
	527	return IRQ_HANDLED;
	528	}
	529
	530	#define ADXRS290_ANGL_VEL_CHANNEL(reg, axis) { \
	531	.type = IIO_ANGL_VEL, \
	532	.address = reg, \
	533	.modified = 1, \
	534	.channel2 = IIO_MOD_##axis, \
	535	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	536	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \| \
	537	BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) \| \
	538	BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
	539	.info_mask_shared_by_type_available = \
	540	BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY) \| \
	541	BIT(IIO_CHAN_INFO_HIGH_PASS_FILTER_3DB_FREQUENCY), \
	542	.scan_index = ADXRS290_IDX_##axis, \
	543	.scan_type = { \
	544	.sign = 's', \
	545	.realbits = 16, \
	546	.storagebits = 16, \
	547	.endianness = IIO_LE, \
	548	}, \
	549	}
	550
	551	static const struct iio_chan_spec adxrs290_channels[] = {
	552	ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAX0, X),
	553	ADXRS290_ANGL_VEL_CHANNEL(ADXRS290_REG_DATAY0, Y),
	554	{
	555	.type = IIO_TEMP,
	556	.address = ADXRS290_REG_TEMP0,
	557	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \|
	558	BIT(IIO_CHAN_INFO_SCALE),
	559	.scan_index = ADXRS290_IDX_TEMP,
	560	.scan_type = {
	561	.sign = 's',
	562	.realbits = 12,
	563	.storagebits = 16,
	564	.endianness = IIO_LE,
	565	},
	566	},
	567	IIO_CHAN_SOFT_TIMESTAMP(ADXRS290_IDX_TS),
	568	};
	569
	570	static const unsigned long adxrs290_avail_scan_masks[] = {
	571	BIT(ADXRS290_IDX_X) \| BIT(ADXRS290_IDX_Y) \| BIT(ADXRS290_IDX_TEMP),
	572	0
	573	};
	574
	575	static const struct iio_info adxrs290_info = {
	576	.read_raw = &adxrs290_read_raw,
	577	.write_raw = &adxrs290_write_raw,
	578	.read_avail = &adxrs290_read_avail,
	579	.debugfs_reg_access = &adxrs290_reg_access,
	580	};
	581
	582	static int adxrs290_probe_trigger(struct iio_dev *indio_dev)
	583	{
	584	struct adxrs290_state *st = iio_priv(indio_dev);
	585	int ret;
	586
	587	if (!st->spi->irq) {
	588	dev_info(&st->spi->dev, "no irq, using polling\n");
	589	return 0;
	590	}
	591
	592	st->dready_trig = devm_iio_trigger_alloc(&st->spi->dev, "%s-dev%d",
	593	indio_dev->name,
	594	indio_dev->id);
	595	if (!st->dready_trig)
	596	return -ENOMEM;
	597
	598	st->dready_trig->dev.parent = &st->spi->dev;
	599	st->dready_trig->ops = &adxrs290_trigger_ops;
	600	iio_trigger_set_drvdata(st->dready_trig, indio_dev);
	601
	602	ret = devm_request_irq(&st->spi->dev, st->spi->irq,
	603	&iio_trigger_generic_data_rdy_poll,
	604	IRQF_ONESHOT, "adxrs290_irq", st->dready_trig);
	605	if (ret < 0)
	606	return dev_err_probe(&st->spi->dev, ret,
	607	"request irq %d failed\n", st->spi->irq);
	608
	609	ret = devm_iio_trigger_register(&st->spi->dev, st->dready_trig);
	610	if (ret) {
	611	dev_err(&st->spi->dev, "iio trigger register failed\n");
	612	return ret;
	613	}
	614
	615	indio_dev->trig = iio_trigger_get(st->dready_trig);
	616
	617	return 0;
	618	}
	619
	620	static int adxrs290_probe(struct spi_device *spi)
	621	{
	622	struct iio_dev *indio_dev;
	623	struct adxrs290_state *st;
	624	u8 val, val2;
	625	int ret;
	626
	627	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	628	if (!indio_dev)
	629	return -ENOMEM;
	630
	631	st = iio_priv(indio_dev);
	632	st->spi = spi;
	633
	634	indio_dev->name = "adxrs290";
	635	indio_dev->modes = INDIO_DIRECT_MODE;
	636	indio_dev->channels = adxrs290_channels;
	637	indio_dev->num_channels = ARRAY_SIZE(adxrs290_channels);
	638	indio_dev->info = &adxrs290_info;
	639	indio_dev->available_scan_masks = adxrs290_avail_scan_masks;
	640
	641	mutex_init(&st->lock);
	642
	643	val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_ADI_ID));
	644	if (val != ADXRS290_ADI_ID) {
	645	dev_err(&spi->dev, "Wrong ADI ID 0x%02x\n", val);
	646	return -ENODEV;
	647	}
	648
	649	val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_MEMS_ID));
	650	if (val != ADXRS290_MEMS_ID) {
	651	dev_err(&spi->dev, "Wrong MEMS ID 0x%02x\n", val);
	652	return -ENODEV;
	653	}
	654
	655	val = spi_w8r8(spi, ADXRS290_READ_REG(ADXRS290_REG_DEV_ID));
	656	if (val != ADXRS290_DEV_ID) {
	657	dev_err(&spi->dev, "Wrong DEV ID 0x%02x\n", val);
	658	return -ENODEV;
	659	}
	660
	661	/* default mode the gyroscope starts in */
	662	st->mode = ADXRS290_MODE_STANDBY;
	663
	664	/* switch to measurement mode and switch on the temperature sensor */
	665	ret = adxrs290_initial_setup(indio_dev);
	666	if (ret < 0)
	667	return ret;
	668
	669	/* max transition time to measurement mode */
	670	msleep(ADXRS290_MAX_TRANSITION_TIME_MS);
	671
	672	ret = adxrs290_get_3db_freq(indio_dev, &val, &val2);
	673	if (ret < 0)
	674	return ret;
	675
	676	st->lpf_3db_freq_idx = val;
	677	st->hpf_3db_freq_idx = val2;
	678
	679	ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
	680	&iio_pollfunc_store_time,
	681	&adxrs290_trigger_handler, NULL);
	682	if (ret < 0)
	683	return dev_err_probe(&spi->dev, ret,
	684	"iio triggered buffer setup failed\n");
	685
	686	ret = adxrs290_probe_trigger(indio_dev);
	687	if (ret < 0)
	688	return ret;
	689
	690	return devm_iio_device_register(&spi->dev, indio_dev);
	691	}
	692
	693	static const struct of_device_id adxrs290_of_match[] = {
	694	{ .compatible = "adi,adxrs290" },
	695	{ }
	696	};
	697	MODULE_DEVICE_TABLE(of, adxrs290_of_match);
	698
	699	static struct spi_driver adxrs290_driver = {
	700	.driver = {
	701	.name = "adxrs290",
	702	.of_match_table = adxrs290_of_match,
	703	},
	704	.probe = adxrs290_probe,
	705	};
	706	module_spi_driver(adxrs290_driver);
	707
	708	MODULE_AUTHOR("Nishant Malpani <nish.malpani25@gmail.com>");
	709	MODULE_DESCRIPTION("Analog Devices ADXRS290 Gyroscope SPI driver");
	710	MODULE_LICENSE("GPL");

drivers/iio/gyro/itg3200_buffer.c+11−4

@@ -46,13 +46,20 @@ static irqreturn_t itg3200_trigger_handler(int irq, void *p) · 45 unmodified lines
46	struct iio_poll_func *pf = p;	46	struct iio_poll_func *pf = p;
47	struct iio_dev *indio_dev = pf->indio_dev;	47	struct iio_dev *indio_dev = pf->indio_dev;
48	struct itg3200 *st = iio_priv(indio_dev);	48	struct itg3200 *st = iio_priv(indio_dev);
49	__be16 buf[ITG3200_SCAN_ELEMENTS + sizeof(s64)/sizeof(u16)];	49	/*
50		50	* Ensure correct alignment and padding including for the
51	int ret = itg3200_read_all_channels(st->i2c, buf);	51	* timestamp that may be inserted.
		52	*/
		53	struct {
		54	__be16 buf[ITG3200_SCAN_ELEMENTS];
		55	s64 ts __aligned(8);
		56	} scan;
		57
		58	int ret = itg3200_read_all_channels(st->i2c, scan.buf);
52	if (ret < 0)	59	if (ret < 0)
53	goto error_ret;	60	goto error_ret;
54		61
55	iio_push_to_buffers_with_timestamp(indio_dev, buf, pf->timestamp);	62	iio_push_to_buffers_with_timestamp(indio_dev, &scan, pf->timestamp);
56		63
57	iio_trigger_notify_done(indio_dev->trig);	64	iio_trigger_notify_done(indio_dev->trig);
58		65

drivers/iio/health/max30102.c+7−8

 /*
  * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
  *
- * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
+ * Copyright (C) 2017 Matt Ranostay <matt.ranostay@konsulko.com>
  *
  * Support for MAX30105 optical particle sensor
  * Copyright (C) 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
 #include <linux/irq.h>
 #include <linux/i2c.h>
 #include <linux/mutex.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
 #include <linux/regmap.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/buffer.h>
 static int max30102_led_init(struct max30102_data *data)
 {
 	struct device *dev = &data->client->dev;
-	struct device_node *np = dev->of_node;
 	unsigned int val;
 	int reg, ret;
-	ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
+	ret = device_property_read_u32(dev, "maxim,red-led-current-microamp", &val);
 	if (ret) {
 		dev_info(dev, "no red-led-current-microamp set\n");
 		return ret;
 	if (data->chip_id == max30105) {
-		ret = of_property_read_u32(np,
+		ret = device_property_read_u32(dev,
 			"maxim,green-led-current-microamp", &val);
 		if (ret) {
 			dev_info(dev, "no green-led-current-microamp set\n");
 			return ret;
 	}
-	ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
+	ret = device_property_read_u32(dev, "maxim,ir-led-current-microamp", &val);
 	if (ret) {
 		dev_info(dev, "no ir-led-current-microamp set\n");
 static struct i2c_driver max30102_driver = {
 	.driver = {
 		.name	= MAX30102_DRV_NAME,
-		.of_match_table	= of_match_ptr(max30102_dt_ids),
+		.of_match_table	= max30102_dt_ids,
 	},
 	.probe		= max30102_probe,
 	.remove		= max30102_remove,
 };
 module_i2c_driver(max30102_driver);
-MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
+MODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>");
 MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
 MODULE_LICENSE("GPL");

drivers/iio/humidity/Kconfig+10−0

@@ -38,6 +38,16 @@ config HDC100X · 37 unmodified lines
38	To compile this driver as a module, choose M here: the module	38	To compile this driver as a module, choose M here: the module
39	will be called hdc100x.	39	will be called hdc100x.
40		40
		41	config HDC2010
		42	tristate "TI HDC2010 relative humidity and temperature sensor"
		43	depends on I2C
		44	help
		45	Say yes here to build support for the Texas Instruments
		46	HDC2010 and HDC2080 relative humidity and temperature sensors.
		47
		48	To compile this driver as a module, choose M here: the module
		49	will be called hdc2010.
		50
41	config HID_SENSOR_HUMIDITY	51	config HID_SENSOR_HUMIDITY
42	tristate "HID Environmental humidity sensor"	52	tristate "HID Environmental humidity sensor"
43	depends on HID_SENSOR_HUB	53	depends on HID_SENSOR_HUB

drivers/iio/humidity/Makefile+1−0

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	obj-$(CONFIG_AM2315) += am2315.o	6	obj-$(CONFIG_AM2315) += am2315.o
7	obj-$(CONFIG_DHT11) += dht11.o	7	obj-$(CONFIG_DHT11) += dht11.o
8	obj-$(CONFIG_HDC100X) += hdc100x.o	8	obj-$(CONFIG_HDC100X) += hdc100x.o
		9	obj-$(CONFIG_HDC2010) += hdc2010.o
9	obj-$(CONFIG_HID_SENSOR_HUMIDITY) += hid-sensor-humidity.o	10	obj-$(CONFIG_HID_SENSOR_HUMIDITY) += hid-sensor-humidity.o
10		11
11	hts221-y := hts221_core.o \	12	hts221-y := hts221_core.o \

drivers/iio/humidity/hdc100x.c+2−1

 #include <linux/delay.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/init.h>
 #include <linux/i2c.h>
 static struct i2c_driver hdc100x_driver = {
 	.driver = {
 		.name	= "hdc100x",
-		.of_match_table = of_match_ptr(hdc100x_dt_ids),
+		.of_match_table = hdc100x_dt_ids,
 	},
 	.probe = hdc100x_probe,
 	.id_table = hdc100x_id,

drivers/iio/humidity/hdc2010.c+353−0

@@ -0,0 +1,353 @@
	1	// SPDX-License-Identifier: GPL-2.0+
	2	/*
	3	* hdc2010.c - Support for the TI HDC2010 and HDC2080
	4	* temperature + relative humidity sensors
	5	*
	6	* Copyright (C) 2020 Norphonic AS
	7	* Author: Eugene Zaikonnikov <ez@norphonic.com>
	8	*
	9	* Datasheet: https://www.ti.com/product/HDC2010/datasheet
	10	* Datasheet: https://www.ti.com/product/HDC2080/datasheet
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/init.h>
	15	#include <linux/i2c.h>
	16	#include <linux/bitops.h>
	17
	18	#include <linux/iio/iio.h>
	19	#include <linux/iio/sysfs.h>
	20
	21	#define HDC2010_REG_TEMP_LOW 0x00
	22	#define HDC2010_REG_TEMP_HIGH 0x01
	23	#define HDC2010_REG_HUMIDITY_LOW 0x02
	24	#define HDC2010_REG_HUMIDITY_HIGH 0x03
	25	#define HDC2010_REG_INTERRUPT_DRDY 0x04
	26	#define HDC2010_REG_TEMP_MAX 0x05
	27	#define HDC2010_REG_HUMIDITY_MAX 0x06
	28	#define HDC2010_REG_INTERRUPT_EN 0x07
	29	#define HDC2010_REG_TEMP_OFFSET_ADJ 0x08
	30	#define HDC2010_REG_HUMIDITY_OFFSET_ADJ 0x09
	31	#define HDC2010_REG_TEMP_THR_L 0x0a
	32	#define HDC2010_REG_TEMP_THR_H 0x0b
	33	#define HDC2010_REG_RH_THR_L 0x0c
	34	#define HDC2010_REG_RH_THR_H 0x0d
	35	#define HDC2010_REG_RESET_DRDY_INT_CONF 0x0e
	36	#define HDC2010_REG_MEASUREMENT_CONF 0x0f
	37
	38	#define HDC2010_MEAS_CONF GENMASK(2, 1)
	39	#define HDC2010_MEAS_TRIG BIT(0)
	40	#define HDC2010_HEATER_EN BIT(3)
	41	#define HDC2010_AMM GENMASK(6, 4)
	42
	43	struct hdc2010_data {
	44	struct i2c_client *client;
	45	struct mutex lock;
	46	u8 measurement_config;
	47	u8 interrupt_config;
	48	u8 drdy_config;
	49	};
	50
	51	enum hdc2010_addr_groups {
	52	HDC2010_GROUP_TEMP = 0,
	53	HDC2010_GROUP_HUMIDITY,
	54	};
	55
	56	struct hdc2010_reg_record {
	57	unsigned long primary;
	58	unsigned long peak;
	59	};
	60
	61	static const struct hdc2010_reg_record hdc2010_reg_translation[] = {
	62	[HDC2010_GROUP_TEMP] = {
	63	.primary = HDC2010_REG_TEMP_LOW,
	64	.peak = HDC2010_REG_TEMP_MAX,
	65	},
	66	[HDC2010_GROUP_HUMIDITY] = {
	67	.primary = HDC2010_REG_HUMIDITY_LOW,
	68	.peak = HDC2010_REG_HUMIDITY_MAX,
	69	},
	70	};
	71
	72	static IIO_CONST_ATTR(out_current_heater_raw_available, "0 1");
	73
	74	static struct attribute *hdc2010_attributes[] = {
	75	&iio_const_attr_out_current_heater_raw_available.dev_attr.attr,
	76	NULL
	77	};
	78
	79	static const struct attribute_group hdc2010_attribute_group = {
	80	.attrs = hdc2010_attributes,
	81	};
	82
	83	static const struct iio_chan_spec hdc2010_channels[] = {
	84	{
	85	.type = IIO_TEMP,
	86	.address = HDC2010_GROUP_TEMP,
	87	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \|
	88	BIT(IIO_CHAN_INFO_PEAK) \|
	89	BIT(IIO_CHAN_INFO_OFFSET) \|
	90	BIT(IIO_CHAN_INFO_SCALE),
	91	},
	92	{
	93	.type = IIO_HUMIDITYRELATIVE,
	94	.address = HDC2010_GROUP_HUMIDITY,
	95	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \|
	96	BIT(IIO_CHAN_INFO_PEAK) \|
	97	BIT(IIO_CHAN_INFO_SCALE),
	98	},
	99	{
	100	.type = IIO_CURRENT,
	101	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
	102	.extend_name = "heater",
	103	.output = 1,
	104	},
	105	};
	106
	107	static int hdc2010_update_drdy_config(struct hdc2010_data *data,
	108	char mask, char val)
	109	{
	110	u8 tmp = (~mask & data->drdy_config) \| val;
	111	int ret;
	112
	113	ret = i2c_smbus_write_byte_data(data->client,
	114	HDC2010_REG_RESET_DRDY_INT_CONF, tmp);
	115	if (ret)
	116	return ret;
	117
	118	data->drdy_config = tmp;
	119
	120	return 0;
	121	}
	122
	123	static int hdc2010_get_prim_measurement_word(struct hdc2010_data *data,
	124	struct iio_chan_spec const *chan)
	125	{
	126	struct i2c_client *client = data->client;
	127	s32 ret;
	128
	129	ret = i2c_smbus_read_word_data(client,
	130	hdc2010_reg_translation[chan->address].primary);
	131
	132	if (ret < 0)
	133	dev_err(&client->dev, "Could not read sensor measurement word\n");
	134
	135	return ret;
	136	}
	137
	138	static int hdc2010_get_peak_measurement_byte(struct hdc2010_data *data,
	139	struct iio_chan_spec const *chan)
	140	{
	141	struct i2c_client *client = data->client;
	142	s32 ret;
	143
	144	ret = i2c_smbus_read_byte_data(client,
	145	hdc2010_reg_translation[chan->address].peak);
	146
	147	if (ret < 0)
	148	dev_err(&client->dev, "Could not read sensor measurement byte\n");
	149
	150	return ret;
	151	}
	152
	153	static int hdc2010_get_heater_status(struct hdc2010_data *data)
	154	{
	155	return !!(data->drdy_config & HDC2010_HEATER_EN);
	156	}
	157
	158	static int hdc2010_read_raw(struct iio_dev *indio_dev,
	159	struct iio_chan_spec const chan, int val,
	160	int *val2, long mask)
	161	{
	162	struct hdc2010_data *data = iio_priv(indio_dev);
	163
	164	switch (mask) {
	165	case IIO_CHAN_INFO_RAW: {
	166	int ret;
	167
	168	if (chan->type == IIO_CURRENT) {
	169	*val = hdc2010_get_heater_status(data);
	170	return IIO_VAL_INT;
	171	}
	172	ret = iio_device_claim_direct_mode(indio_dev);
	173	if (ret)
	174	return ret;
	175	mutex_lock(&data->lock);
	176	ret = hdc2010_get_prim_measurement_word(data, chan);
	177	mutex_unlock(&data->lock);
	178	iio_device_release_direct_mode(indio_dev);
	179	if (ret < 0)
	180	return ret;
	181	*val = ret;
	182	return IIO_VAL_INT;
	183	}
	184	case IIO_CHAN_INFO_PEAK: {
	185	int ret;
	186
	187	ret = iio_device_claim_direct_mode(indio_dev);
	188	if (ret)
	189	return ret;
	190	mutex_lock(&data->lock);
	191	ret = hdc2010_get_peak_measurement_byte(data, chan);
	192	mutex_unlock(&data->lock);
	193	iio_device_release_direct_mode(indio_dev);
	194	if (ret < 0)
	195	return ret;
	196	/* Scaling up the value so we can use same offset as RAW */
	197	val = ret 256;
	198	return IIO_VAL_INT;
	199	}
	200	case IIO_CHAN_INFO_SCALE:
	201	*val2 = 65536;
	202	if (chan->type == IIO_TEMP)
	203	*val = 165000;
	204	else
	205	*val = 100000;
	206	return IIO_VAL_FRACTIONAL;
	207	case IIO_CHAN_INFO_OFFSET:
	208	*val = -15887;
	209	*val2 = 515151;
	210	return IIO_VAL_INT_PLUS_MICRO;
	211	default:
	212	return -EINVAL;
	213	}
	214	}
	215
	216	static int hdc2010_write_raw(struct iio_dev *indio_dev,
	217	struct iio_chan_spec const *chan,
	218	int val, int val2, long mask)
	219	{
	220	struct hdc2010_data *data = iio_priv(indio_dev);
	221	int new, ret;
	222
	223	switch (mask) {
	224	case IIO_CHAN_INFO_RAW:
	225	if (chan->type != IIO_CURRENT \|\| val2 != 0)
	226	return -EINVAL;
	227
	228	switch (val) {
	229	case 1:
	230	new = HDC2010_HEATER_EN;
	231	break;
	232	case 0:
	233	new = 0;
	234	break;
	235	default:
	236	return -EINVAL;
	237	}
	238
	239	mutex_lock(&data->lock);
	240	ret = hdc2010_update_drdy_config(data, HDC2010_HEATER_EN, new);
	241	mutex_unlock(&data->lock);
	242	return ret;
	243	default:
	244	return -EINVAL;
	245	}
	246	}
	247
	248	static const struct iio_info hdc2010_info = {
	249	.read_raw = hdc2010_read_raw,
	250	.write_raw = hdc2010_write_raw,
	251	.attrs = &hdc2010_attribute_group,
	252	};
	253
	254	static int hdc2010_probe(struct i2c_client *client,
	255	const struct i2c_device_id *id)
	256	{
	257	struct iio_dev *indio_dev;
	258	struct hdc2010_data *data;
	259	u8 tmp;
	260	int ret;
	261
	262	if (!i2c_check_functionality(client->adapter,
	263	I2C_FUNC_SMBUS_WORD_DATA \| I2C_FUNC_SMBUS_BYTE \| I2C_FUNC_I2C))
	264	return -EOPNOTSUPP;
	265
	266	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
	267	if (!indio_dev)
	268	return -ENOMEM;
	269
	270	data = iio_priv(indio_dev);
	271	i2c_set_clientdata(client, indio_dev);
	272	data->client = client;
	273	mutex_init(&data->lock);
	274
	275	indio_dev->dev.parent = &client->dev;
	276	/*
	277	* As DEVICE ID register does not differentiate between
	278	* HDC2010 and HDC2080, we have the name hardcoded
	279	*/
	280	indio_dev->name = "hdc2010";
	281	indio_dev->modes = INDIO_DIRECT_MODE;
	282	indio_dev->info = &hdc2010_info;
	283
	284	indio_dev->channels = hdc2010_channels;
	285	indio_dev->num_channels = ARRAY_SIZE(hdc2010_channels);
	286
	287	/* Enable Automatic Measurement Mode at 5Hz */
	288	ret = hdc2010_update_drdy_config(data, HDC2010_AMM, HDC2010_AMM);
	289	if (ret)
	290	return ret;
	291
	292	/*
	293	* We enable both temp and humidity measurement.
	294	* However the measurement won't start even in AMM until triggered.
	295	*/
	296	tmp = (data->measurement_config & ~HDC2010_MEAS_CONF) \|
	297	HDC2010_MEAS_TRIG;
	298
	299	ret = i2c_smbus_write_byte_data(client, HDC2010_REG_MEASUREMENT_CONF, tmp);
	300	if (ret) {
	301	dev_warn(&client->dev, "Unable to set up measurement\n");
	302	if (hdc2010_update_drdy_config(data, HDC2010_AMM, 0))
	303	dev_warn(&client->dev, "Unable to restore default AMM\n");
	304	return ret;
	305	}
	306
	307	data->measurement_config = tmp;
	308
	309	return iio_device_register(indio_dev);
	310	}
	311
	312	static int hdc2010_remove(struct i2c_client *client)
	313	{
	314	struct iio_dev *indio_dev = i2c_get_clientdata(client);
	315	struct hdc2010_data *data = iio_priv(indio_dev);
	316
	317	iio_device_unregister(indio_dev);
	318
	319	/* Disable Automatic Measurement Mode */
	320	if (hdc2010_update_drdy_config(data, HDC2010_AMM, 0))
	321	dev_warn(&client->dev, "Unable to restore default AMM\n");
	322
	323	return 0;
	324	}
	325
	326	static const struct i2c_device_id hdc2010_id[] = {
	327	{ "hdc2010" },
	328	{ "hdc2080" },
	329	{ }
	330	};
	331	MODULE_DEVICE_TABLE(i2c, hdc2010_id);
	332
	333	static const struct of_device_id hdc2010_dt_ids[] = {
	334	{ .compatible = "ti,hdc2010" },
	335	{ .compatible = "ti,hdc2080" },
	336	{ }
	337	};
	338	MODULE_DEVICE_TABLE(of, hdc2010_dt_ids);
	339
	340	static struct i2c_driver hdc2010_driver = {
	341	.driver = {
	342	.name = "hdc2010",
	343	.of_match_table = hdc2010_dt_ids,
	344	},
	345	.probe = hdc2010_probe,
	346	.remove = hdc2010_remove,
	347	.id_table = hdc2010_id,
	348	};
	349	module_i2c_driver(hdc2010_driver);
	350
	351	MODULE_AUTHOR("Eugene Zaikonnikov <ez@norphonic.com>");
	352	MODULE_DESCRIPTION("TI HDC2010 humidity and temperature sensor driver");
	353	MODULE_LICENSE("GPL");

drivers/iio/humidity/htu21.c+2−1

 #include <linux/kernel.h>
 #include <linux/stat.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 	.id_table = htu21_id,
 	.driver = {
 		   .name = "htu21",
-		   .of_match_table = of_match_ptr(htu21_of_match),
+		   .of_match_table = htu21_of_match,
 		   },
 };

drivers/iio/humidity/si7020.c+2−1

 #include <linux/delay.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/slab.h>
 #include <linux/sysfs.h>
 static struct i2c_driver si7020_driver = {
 	.driver = {
 		.name = "si7020",
-		.of_match_table = of_match_ptr(si7020_dt_ids),
+		.of_match_table = si7020_dt_ids,
 	},
 	.probe		= si7020_probe,
 	.id_table	= si7020_id,

drivers/iio/iio_core_trigger.h+2−2

@@ -30,7 +30,7 @@ int iio_trigger_detach_poll_func(struct iio_trigger *trig, · 29 unmodified lines
30	* iio_device_register_trigger_consumer() - set up an iio_dev to use triggers	30	* iio_device_register_trigger_consumer() - set up an iio_dev to use triggers
31	* @indio_dev: iio_dev associated with the device that will consume the trigger	31	* @indio_dev: iio_dev associated with the device that will consume the trigger
32	**/	32	**/
33	static int iio_device_register_trigger_consumer(struct iio_dev *indio_dev)	33	static inline int iio_device_register_trigger_consumer(struct iio_dev *indio_dev)
34	{	34	{
35	return 0;	35	return 0;
36	}	36	}
@@ -39,7 +39,7 @@ static int iio_device_register_trigger_consumer(struct iio_dev *indio_dev) · 2 unmodified lines
39	* iio_device_unregister_trigger_consumer() - reverse the registration process	39	* iio_device_unregister_trigger_consumer() - reverse the registration process
40	* @indio_dev: iio_dev associated with the device that consumed the trigger	40	* @indio_dev: iio_dev associated with the device that consumed the trigger
41	**/	41	**/
42	static void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev)	42	static inline void iio_device_unregister_trigger_consumer(struct iio_dev *indio_dev)
43	{	43	{
44	}	44	}
45		45

drivers/iio/imu/adis16400.c+30−42

  * @variant:	chip variant info
  * @filt_int:	integer part of requested filter frequency
  * @adis:	adis device
+ * @avail_scan_mask:	NULL terminated array of bitmaps of channels
+ *			that must be enabled together
  **/
 struct adis16400_state {
 	struct adis16400_chip_info	*variant;
 	ADIS16448,
 };
-static struct adis_burst adis16400_burst = {
-	.en = true,
-	.reg_cmd = ADIS16400_GLOB_CMD,
-};
 static int adis16334_get_freq(struct adis16400_state *st)
 {
 	int ret;
 	[ADIS16400_DIAG_STAT_POWER_LOW] = "Power supply below 4.75V",
 };
-#define ADIS16400_DATA(_timeouts)					\
+#define ADIS16400_DATA(_timeouts, _burst_len)				\
 {									\
 	.msc_ctrl_reg = ADIS16400_MSC_CTRL,				\
 	.glob_cmd_reg = ADIS16400_GLOB_CMD,				\
 		BIT(ADIS16400_DIAG_STAT_POWER_HIGH) |			\
 		BIT(ADIS16400_DIAG_STAT_POWER_LOW),			\
 	.timeouts = (_timeouts),					\
+	.burst_reg_cmd = ADIS16400_GLOB_CMD,				\
+	.burst_len = (_burst_len)					\
 }
 static const struct adis_timeout adis16300_timeouts = {
 		.temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16300_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16300_timeouts, 18),
 	},
 	[ADIS16334] = {
 		.channels = adis16334_channels,
 		.temp_offset = 25000000 / 67850, /* 25 C = 0x00 */
 		.set_freq = adis16334_set_freq,
 		.get_freq = adis16334_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16334_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16334_timeouts, 0),
 	},
 	[ADIS16350] = {
 		.channels = adis16350_channels,
 		.flags = ADIS16400_NO_BURST | ADIS16400_HAS_SLOW_MODE,
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16300_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16300_timeouts, 0),
 	},
 	[ADIS16360] = {
 		.channels = adis16350_channels,
 		.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16300_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16300_timeouts, 28),
 	},
 	[ADIS16362] = {
 		.channels = adis16350_channels,
 		.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16362_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16362_timeouts, 28),
 	},
 	[ADIS16364] = {
 		.channels = adis16350_channels,
 		.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16362_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16362_timeouts, 28),
 	},
 	[ADIS16367] = {
 		.channels = adis16350_channels,
 		.temp_offset = 25000000 / 136000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16300_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16300_timeouts, 28),
 	},
 	[ADIS16400] = {
 		.channels = adis16400_channels,
 		.temp_offset = 25000000 / 140000, /* 25 C = 0x00 */
 		.set_freq = adis16400_set_freq,
 		.get_freq = adis16400_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16400_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16400_timeouts, 24),
 	},
 	[ADIS16445] = {
 		.channels = adis16445_channels,
 		.temp_offset = 31000000 / 73860, /* 31 C = 0x00 */
 		.set_freq = adis16334_set_freq,
 		.get_freq = adis16334_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16445_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16445_timeouts, 16),
 	},
 	[ADIS16448] = {
 		.channels = adis16448_channels,
 		.temp_offset = 31000000 / 73860, /* 31 C = 0x00 */
 		.set_freq = adis16334_set_freq,
 		.get_freq = adis16334_get_freq,
-		.adis_data = ADIS16400_DATA(&adis16448_timeouts),
+		.adis_data = ADIS16400_DATA(&adis16448_timeouts, 24),
 	}
 };
 			st->avail_scan_mask[0] |= BIT(ch->scan_index);
 	}
 }
+static void adis16400_stop(void *data)
+{
+	adis16400_stop_device(data);
+}
 static int adis16400_probe(struct spi_device *spi)
 {
 	struct adis16400_state *st;
 	if (!(st->variant->flags & ADIS16400_NO_BURST)) {
 		adis16400_setup_chan_mask(st);
 		indio_dev->available_scan_masks = st->avail_scan_mask;
-		st->adis.burst = &adis16400_burst;
-		if (st->variant->flags & ADIS16400_BURST_DIAG_STAT)
-			st->adis.burst_extra_len = sizeof(u16);
 	}
 	adis16400_data = &st->variant->adis_data;
 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev,
+	ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, adis16400_trigger_handler);
-			adis16400_trigger_handler);
 	if (ret)
 		return ret;
 	/* Get the device into a sane initial state */
 	ret = adis16400_initial_setup(indio_dev);
 	if (ret)
-		goto error_cleanup_buffer;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_cleanup_buffer;
-	adis16400_debugfs_init(indio_dev);
-	return 0;
-error_cleanup_buffer:
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
-	return ret;
-}
-static int adis16400_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis16400_state *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
+	ret = devm_add_action_or_reset(&spi->dev, adis16400_stop, indio_dev);
-	adis16400_stop_device(indio_dev);
+	if (ret)
+		return ret;
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
+	ret = devm_iio_device_register(&spi->dev, indio_dev);
+	if (ret)
+		return ret;
+	adis16400_debugfs_init(indio_dev);
 	return 0;
 }
 	},
 	.id_table = adis16400_id,
 	.probe = adis16400_probe,
-	.remove = adis16400_remove,
 };
 module_spi_driver(adis16400_driver);

drivers/iio/imu/adis16460.c+4−21

 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
 	if (ret)
 		return ret;
 	ret = __adis_initial_startup(&st->adis);
 	if (ret)
-		goto error_cleanup_buffer;
+		return ret;
-	ret = iio_device_register(indio_dev);
+	ret = devm_iio_device_register(&spi->dev, indio_dev);
 	if (ret)
-		goto error_cleanup_buffer;
+		return ret;
 	adis16460_debugfs_init(indio_dev);
-	return 0;
-error_cleanup_buffer:
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
-	return ret;
-}
-static int adis16460_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis16460 *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
 	return 0;
 }
 	},
 	.id_table = adis16460_ids,
 	.probe = adis16460_probe,
-	.remove = adis16460_remove,
 };
 module_spi_driver(adis16460_driver);

drivers/iio/imu/adis16475.c+3−15

 		BIT(ADIS16475_DIAG_STAT_CLK),				\
 	.enable_irq = adis16475_enable_irq,				\
 	.timeouts = (_timeouts),					\
+	.burst_reg_cmd = ADIS16475_REG_GLOB_CMD,			\
+	.burst_len = ADIS16475_BURST_MAX_DATA,				\
+	.burst_max_len = ADIS16475_BURST32_MAX_DATA			\
 }
 static const struct adis16475_sync adis16475_sync_mode[] = {
 	.debugfs_reg_access = adis_debugfs_reg_access,
 };
-static struct adis_burst adis16475_burst = {
-	.en = true,
-	.reg_cmd = ADIS16475_REG_GLOB_CMD,
-	/*
-	 * adis_update_scan_mode_burst() sets the burst length in respect with
-	 * the number of channels and allocates 16 bits for each. However,
-	 * adis1647x devices also need space for DIAG_STAT, DATA_CNTR or
-	 * TIME_STAMP (depending on the clock mode but for us these bytes are
-	 * don't care...) and CRC.
-	 */
-	.extra_len = 3 * sizeof(u16),
-	.burst_max_len = ADIS16475_BURST32_MAX_DATA,
-};
 static bool adis16475_validate_crc(const u8 *buffer, u16 crc,
 				   const bool burst32)
 {
 	st = iio_priv(indio_dev);
 	spi_set_drvdata(spi, indio_dev);
-	st->adis.burst = &adis16475_burst;
 	st->info = device_get_match_data(&spi->dev);
 	if (!st->info)

drivers/iio/imu/adis16480.c+25−30

 	return 0;
 }
+static void adis16480_stop(void *data)
+{
+	adis16480_stop_device(data);
+}
+static void adis16480_clk_disable(void *data)
+{
+	clk_disable_unprepare(data);
+}
 static int adis16480_probe(struct spi_device *spi)
 {
 	const struct spi_device_id *id = spi_get_device_id(spi);
 	if (ret)
 		return ret;
+	ret = devm_add_action_or_reset(&spi->dev, adis16480_stop, indio_dev);
+	if (ret)
+		return ret;
 	ret = adis16480_config_irq_pin(spi->dev.of_node, st);
 	if (ret)
-		goto error_stop_device;
+		return ret;
 	ret = adis16480_get_ext_clocks(st);
 	if (ret)
-		goto error_stop_device;
+		return ret;
 	if (!IS_ERR_OR_NULL(st->ext_clk)) {
 		ret = adis16480_ext_clk_config(st, spi->dev.of_node, true);
 		if (ret)
-			goto error_stop_device;
+			return ret;
+		ret = devm_add_action_or_reset(&spi->dev, adis16480_clk_disable, st->ext_clk);
+		if (ret)
+			return ret;
 		st->clk_freq = clk_get_rate(st->ext_clk);
 		st->clk_freq *= 1000; /* micro */
 		st->clk_freq = st->chip_info->int_clk;
 	}
-	ret = adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, NULL);
 	if (ret)
-		goto error_clk_disable_unprepare;
+		return ret;
-	ret = iio_device_register(indio_dev);
+	ret = devm_iio_device_register(&spi->dev, indio_dev);
 	if (ret)
-		goto error_cleanup_buffer;
+		return ret;
 	adis16480_debugfs_init(indio_dev);
-	return 0;
-error_cleanup_buffer:
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
-error_clk_disable_unprepare:
-	clk_disable_unprepare(st->ext_clk);
-error_stop_device:
-	adis16480_stop_device(indio_dev);
-	return ret;
-}
-static int adis16480_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis16480 *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis16480_stop_device(indio_dev);
-	adis_cleanup_buffer_and_trigger(&st->adis, indio_dev);
-	clk_disable_unprepare(st->ext_clk);
 	return 0;
 }
 	},
 	.id_table = adis16480_ids,
 	.probe = adis16480_probe,
-	.remove = adis16480_remove,
 };
 module_spi_driver(adis16480_driver);

drivers/iio/imu/adis_buffer.c+9−67

@@ -26,12 +26,10 @@ static int adis_update_scan_mode_burst(struct iio_dev *indio_dev, · 25 unmodified lines
26	unsigned int burst_length, burst_max_length;	26	unsigned int burst_length, burst_max_length;
27	u8 *tx;	27	u8 *tx;
28		28
29	/* All but the timestamp channel */	29	burst_length = adis->data->burst_len + adis->burst_extra_len;
30	burst_length = (indio_dev->num_channels - 1) * sizeof(u16);
31	burst_length += adis->burst->extra_len + adis->burst_extra_len;
32		30
33	if (adis->burst->burst_max_len)	31	if (adis->data->burst_max_len)
34	burst_max_length = adis->burst->burst_max_len;	32	burst_max_length = adis->data->burst_max_len;
35	else	33	else
36	burst_max_length = burst_length;	34	burst_max_length = burst_length;
37		35
@@ -47,7 +45,7 @@ static int adis_update_scan_mode_burst(struct iio_dev *indio_dev, · 9 unmodified lines
47	}	45	}
48		46
49	tx = adis->buffer + burst_max_length;	47	tx = adis->buffer + burst_max_length;
50	tx[0] = ADIS_READ_REG(adis->burst->reg_cmd);	48	tx[0] = ADIS_READ_REG(adis->data->burst_reg_cmd);
51	tx[1] = 0;	49	tx[1] = 0;
52		50
53	adis->xfer[0].tx_buf = tx;	51	adis->xfer[0].tx_buf = tx;
@@ -76,7 +74,7 @@ int adis_update_scan_mode(struct iio_dev *indio_dev, · 22 unmodified lines
76	kfree(adis->xfer);	74	kfree(adis->xfer);
77	kfree(adis->buffer);	75	kfree(adis->buffer);
78		76
79	if (adis->burst && adis->burst->en)	77	if (adis->data->burst_len)
80	return adis_update_scan_mode_burst(indio_dev, scan_mask);	78	return adis_update_scan_mode_burst(indio_dev, scan_mask);
81		79
82	scan_count = indio_dev->scan_bytes / 2;	80	scan_count = indio_dev->scan_bytes / 2;
@@ -169,48 +167,6 @@ static void adis_buffer_cleanup(void *arg) · 86 unmodified lines
169	kfree(adis->xfer);	167	kfree(adis->xfer);
170	}	168	}
171		169
172	/**
173	* adis_setup_buffer_and_trigger() - Sets up buffer and trigger for the adis device
174	* @adis: The adis device.
175	* @indio_dev: The IIO device.
176	* @trigger_handler: Optional trigger handler, may be NULL.
177	*
178	* Returns 0 on success, a negative error code otherwise.
179	*
180	* This function sets up the buffer and trigger for a adis devices. If
181	* 'trigger_handler' is NULL the default trigger handler will be used. The
182	* default trigger handler will simply read the registers assigned to the
183	* currently active channels.
184	*
185	* adis_cleanup_buffer_and_trigger() should be called to free the resources
186	* allocated by this function.
187	*/
188	int adis_setup_buffer_and_trigger(struct adis adis, struct iio_dev indio_dev,
189	irqreturn_t (trigger_handler)(int, void ))
190	{
191	int ret;
192
193	if (!trigger_handler)
194	trigger_handler = adis_trigger_handler;
195
196	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
197	trigger_handler, NULL);
198	if (ret)
199	return ret;
200
201	if (adis->spi->irq) {
202	ret = adis_probe_trigger(adis, indio_dev);
203	if (ret)
204	goto error_buffer_cleanup;
205	}
206	return 0;
207
208	error_buffer_cleanup:
209	iio_triggered_buffer_cleanup(indio_dev);
210	return ret;
211	}
212	EXPORT_SYMBOL_GPL(adis_setup_buffer_and_trigger);
213
214	/**	170	/**
215	* devm_adis_setup_buffer_and_trigger() - Sets up buffer and trigger for	171	* devm_adis_setup_buffer_and_trigger() - Sets up buffer and trigger for
216	* the managed adis device	172	* the managed adis device
@@ -220,7 +176,10 @@ EXPORT_SYMBOL_GPL(adis_setup_buffer_and_trigger); · 3 unmodified lines
220	*	176	*
221	* Returns 0 on success, a negative error code otherwise.	177	* Returns 0 on success, a negative error code otherwise.
222	*	178	*
223	* This function perfoms exactly the same as adis_setup_buffer_and_trigger()	179	* This function sets up the buffer and trigger for a adis devices. If
		180	* 'trigger_handler' is NULL the default trigger handler will be used. The
		181	* default trigger handler will simply read the registers assigned to the
		182	* currently active channels.
224	*/	183	*/
225	int	184	int
226	devm_adis_setup_buffer_and_trigger(struct adis adis, struct iio_dev indio_dev,	185	devm_adis_setup_buffer_and_trigger(struct adis adis, struct iio_dev indio_dev,
@@ -248,20 +207,3 @@ devm_adis_setup_buffer_and_trigger(struct adis adis, struct iio_dev indio_dev, · 21 unmodified lines
248	}	207	}
249	EXPORT_SYMBOL_GPL(devm_adis_setup_buffer_and_trigger);	208	EXPORT_SYMBOL_GPL(devm_adis_setup_buffer_and_trigger);
250		209
251	/**
252	* adis_cleanup_buffer_and_trigger() - Free buffer and trigger resources
253	* @adis: The adis device.
254	* @indio_dev: The IIO device.
255	*
256	* Frees resources allocated by adis_setup_buffer_and_trigger()
257	*/
258	void adis_cleanup_buffer_and_trigger(struct adis *adis,
259	struct iio_dev *indio_dev)
260	{
261	if (adis->spi->irq)
262	adis_remove_trigger(adis);
263	kfree(adis->buffer);
264	kfree(adis->xfer);
265	iio_triggered_buffer_cleanup(indio_dev);
266	}
267	EXPORT_SYMBOL_GPL(adis_cleanup_buffer_and_trigger);

drivers/iio/imu/adis_trigger.c+0−60

@@ -55,53 +55,6 @@ static int adis_validate_irq_flag(struct adis *adis) · 54 unmodified lines
55		55
56	return 0;	56	return 0;
57	}	57	}
58	/**
59	* adis_probe_trigger() - Sets up trigger for a adis device
60	* @adis: The adis device
61	* @indio_dev: The IIO device
62	*
63	* Returns 0 on success or a negative error code
64	*
65	* adis_remove_trigger() should be used to free the trigger.
66	*/
67	int adis_probe_trigger(struct adis adis, struct iio_dev indio_dev)
68	{
69	int ret;
70
71	adis->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
72	indio_dev->id);
73	if (adis->trig == NULL)
74	return -ENOMEM;
75
76	adis_trigger_setup(adis);
77
78	ret = adis_validate_irq_flag(adis);
79	if (ret)
80	return ret;
81
82	ret = request_irq(adis->spi->irq,
83	&iio_trigger_generic_data_rdy_poll,
84	adis->irq_flag,
85	indio_dev->name,
86	adis->trig);
87	if (ret)
88	goto error_free_trig;
89
90	ret = iio_trigger_register(adis->trig);
91
92	indio_dev->trig = iio_trigger_get(adis->trig);
93	if (ret)
94	goto error_free_irq;
95
96	return 0;
97
98	error_free_irq:
99	free_irq(adis->spi->irq, adis->trig);
100	error_free_trig:
101	iio_trigger_free(adis->trig);
102	return ret;
103	}
104	EXPORT_SYMBOL_GPL(adis_probe_trigger);
105		58
106	/**	59	/**
107	* devm_adis_probe_trigger() - Sets up trigger for a managed adis device	60	* devm_adis_probe_trigger() - Sets up trigger for a managed adis device
@@ -137,16 +90,3 @@ int devm_adis_probe_trigger(struct adis adis, struct iio_dev indio_dev) · 29 unmodified lines
137	}	90	}
138	EXPORT_SYMBOL_GPL(devm_adis_probe_trigger);	91	EXPORT_SYMBOL_GPL(devm_adis_probe_trigger);
139		92
140	/**
141	* adis_remove_trigger() - Remove trigger for a adis devices
142	* @adis: The adis device
143	*
144	* Removes the trigger previously registered with adis_probe_trigger().
145	*/
146	void adis_remove_trigger(struct adis *adis)
147	{
148	iio_trigger_unregister(adis->trig);
149	free_irq(adis->spi->irq, adis->trig);
150	iio_trigger_free(adis->trig);
151	}
152	EXPORT_SYMBOL_GPL(adis_remove_trigger);

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+6−14

 	}
 	st->vdd_supply = devm_regulator_get(dev, "vdd");
-	if (IS_ERR(st->vdd_supply)) {
+	if (IS_ERR(st->vdd_supply))
-		if (PTR_ERR(st->vdd_supply) != -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(st->vdd_supply),
-			dev_err(dev, "Failed to get vdd regulator %d\n",
+				     "Failed to get vdd regulator\n");
-				(int)PTR_ERR(st->vdd_supply));
-		return PTR_ERR(st->vdd_supply);
-	}
 	st->vddio_supply = devm_regulator_get(dev, "vddio");
-	if (IS_ERR(st->vddio_supply)) {
+	if (IS_ERR(st->vddio_supply))
-		if (PTR_ERR(st->vddio_supply) != -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(st->vddio_supply),
-			dev_err(dev, "Failed to get vddio regulator %d\n",
+				     "Failed to get vddio regulator\n");
-				(int)PTR_ERR(st->vddio_supply));
-		return PTR_ERR(st->vddio_supply);
-	}
 	result = regulator_enable(st->vdd_supply);
 	if (result) {

drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h+9−3

 	u8 user_ctrl;
 };
+/*
+ * Maximum of 6 + 6 + 2 + 7 (for MPU9x50) = 21 round up to 24 and plus 8.
+ * May be less if fewer channels are enabled, as long as the timestamp
+ * remains 8 byte aligned
+ */
+#define INV_MPU6050_OUTPUT_DATA_SIZE         32
 /**
  *  struct inv_mpu6050_hw - Other important hardware information.
  *  @whoami:	Self identification byte from WHO_AM_I register
  *  @magn_raw_to_gauss:	coefficient to convert mag raw value to Gauss.
  *  @magn_orient:       magnetometer sensor chip orientation if available.
  *  @suspended_sensors:	sensors mask of sensors turned off for suspend
+ *  @data:		dma safe buffer used for bulk reads.
  */
 struct inv_mpu6050_state {
 	struct mutex lock;
 	s32 magn_raw_to_gauss[3];
 	struct iio_mount_matrix magn_orient;
 	unsigned int suspended_sensors;
+	u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] ____cacheline_aligned;
 };
 /*register and associated bit definition*/
 #define INV_ICM20608_TEMP_OFFSET	     8170
 #define INV_ICM20608_TEMP_SCALE		     3059976
-/* 6 + 6 + 2 + 7 (for MPU9x50) = 21 round up to 24 and plus 8 */
-#define INV_MPU6050_OUTPUT_DATA_SIZE         32
 #define INV_MPU6050_REG_INT_PIN_CFG	0x37
 #define INV_MPU6050_ACTIVE_HIGH		0x00
 #define INV_MPU6050_ACTIVE_LOW		0x80

drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c+6−8

 #include <linux/interrupt.h>
 #include <linux/poll.h>
 #include <linux/math64.h>
-#include <asm/unaligned.h>
 #include "inv_mpu_iio.h"
 /**
 	struct inv_mpu6050_state *st = iio_priv(indio_dev);
 	size_t bytes_per_datum;
 	int result;
-	u8 data[INV_MPU6050_OUTPUT_DATA_SIZE];
 	u16 fifo_count;
 	s64 timestamp;
 	int int_status;
 	 * read fifo_count register to know how many bytes are inside the FIFO
 	 * right now
 	 */
-	result = regmap_bulk_read(st->map, st->reg->fifo_count_h, data,
+	result = regmap_bulk_read(st->map, st->reg->fifo_count_h,
-				  INV_MPU6050_FIFO_COUNT_BYTE);
+				  st->data, INV_MPU6050_FIFO_COUNT_BYTE);
 	if (result)
 		goto end_session;
-	fifo_count = get_unaligned_be16(&data[0]);
+	fifo_count = be16_to_cpup((__be16 *)&st->data[0]);
 	/*
 	 * Handle fifo overflow by resetting fifo.
 	nb = fifo_count / bytes_per_datum;
 	inv_mpu6050_update_period(st, pf->timestamp, nb);
 	for (i = 0; i < nb; ++i) {
-		result = regmap_bulk_read(st->map, st->reg->fifo_r_w,
+		result = regmap_noinc_read(st->map, st->reg->fifo_r_w,
-					  data, bytes_per_datum);
+					   st->data, bytes_per_datum);
 		if (result)
 			goto flush_fifo;
 		/* skip first samples if needed */
 			continue;
 		}
 		timestamp = inv_mpu6050_get_timestamp(st);
-		iio_push_to_buffers_with_timestamp(indio_dev, data, timestamp);
+		iio_push_to_buffers_with_timestamp(indio_dev, st->data, timestamp);
 	}
 end_session:

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h+6−0

  * @iio_devs: Pointers to acc/gyro iio_dev instances.
  * @settings: Pointer to the specific sensor settings in use.
  * @orientation: sensor chip orientation relative to main hardware.
+ * @scan: Temporary buffers used to align data before iio_push_to_buffers()
  */
 struct st_lsm6dsx_hw {
 	struct device *dev;
 	const struct st_lsm6dsx_settings *settings;
 	struct iio_mount_matrix orientation;
+	/* Ensure natural alignment of buffer elements */
+	struct {
+		__le16 channels[3];
+		s64 ts __aligned(8);
+	} scan[3];
 };
 static __maybe_unused const struct iio_event_spec st_lsm6dsx_event = {

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c+26−16

 	int err, sip, acc_sip, gyro_sip, ts_sip, ext_sip, read_len, offset;
 	u16 fifo_len, pattern_len = hw->sip * ST_LSM6DSX_SAMPLE_SIZE;
 	u16 fifo_diff_mask = hw->settings->fifo_ops.fifo_diff.mask;
-	u8 gyro_buff[ST_LSM6DSX_IIO_BUFF_SIZE];
-	u8 acc_buff[ST_LSM6DSX_IIO_BUFF_SIZE];
-	u8 ext_buff[ST_LSM6DSX_IIO_BUFF_SIZE];
 	bool reset_ts = false;
 	__le16 fifo_status;
 	s64 ts = 0;
 		while (acc_sip > 0 || gyro_sip > 0 || ext_sip > 0) {
 			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
-				memcpy(gyro_buff, &hw->buff[offset],
+				memcpy(hw->scan[ST_LSM6DSX_ID_GYRO].channels,
-				       ST_LSM6DSX_SAMPLE_SIZE);
+				       &hw->buff[offset],
-				offset += ST_LSM6DSX_SAMPLE_SIZE;
+				       sizeof(hw->scan[ST_LSM6DSX_ID_GYRO].channels));
+				offset += sizeof(hw->scan[ST_LSM6DSX_ID_GYRO].channels);
 			}
 			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
-				memcpy(acc_buff, &hw->buff[offset],
+				memcpy(hw->scan[ST_LSM6DSX_ID_ACC].channels,
-				       ST_LSM6DSX_SAMPLE_SIZE);
+				       &hw->buff[offset],
-				offset += ST_LSM6DSX_SAMPLE_SIZE;
+				       sizeof(hw->scan[ST_LSM6DSX_ID_ACC].channels));
+				offset += sizeof(hw->scan[ST_LSM6DSX_ID_ACC].channels);
 			}
 			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
-				memcpy(ext_buff, &hw->buff[offset],
+				memcpy(hw->scan[ST_LSM6DSX_ID_EXT0].channels,
-				       ST_LSM6DSX_SAMPLE_SIZE);
+				       &hw->buff[offset],
-				offset += ST_LSM6DSX_SAMPLE_SIZE;
+				       sizeof(hw->scan[ST_LSM6DSX_ID_EXT0].channels));
+				offset += sizeof(hw->scan[ST_LSM6DSX_ID_EXT0].channels);
 			}
 			if (ts_sip-- > 0) {
 			if (gyro_sip > 0 && !(sip % gyro_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_GYRO],
-					gyro_buff, gyro_sensor->ts_ref + ts);
+					&hw->scan[ST_LSM6DSX_ID_GYRO],
+					gyro_sensor->ts_ref + ts);
 				gyro_sip--;
 			}
 			if (acc_sip > 0 && !(sip % acc_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_ACC],
-					acc_buff, acc_sensor->ts_ref + ts);
+					&hw->scan[ST_LSM6DSX_ID_ACC],
+					acc_sensor->ts_ref + ts);
 				acc_sip--;
 			}
 			if (ext_sip > 0 && !(sip % ext_sensor->decimator)) {
 				iio_push_to_buffers_with_timestamp(
 					hw->iio_devs[ST_LSM6DSX_ID_EXT0],
-					ext_buff, ext_sensor->ts_ref + ts);
+					&hw->scan[ST_LSM6DSX_ID_EXT0],
+					ext_sensor->ts_ref + ts);
 				ext_sip--;
 			}
 			sip++;
 {
 	u16 pattern_len = hw->sip * ST_LSM6DSX_TAGGED_SAMPLE_SIZE;
 	u16 fifo_len, fifo_diff_mask;
-	u8 iio_buff[ST_LSM6DSX_IIO_BUFF_SIZE], tag;
+	/*
+	 * Alignment needed as this can ultimately be passed to a
+	 * call to iio_push_to_buffers_with_timestamp() which
+	 * must be passed a buffer that is aligned to 8 bytes so
+	 * as to allow insertion of a naturally aligned timestamp.
+	 */
+	u8 iio_buff[ST_LSM6DSX_IIO_BUFF_SIZE] __aligned(8);
+	u8 tag;
 	bool reset_ts = false;
 	int i, err, read_len;
 	__le16 fifo_status;

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c+77−57

 					.addr = 0x20,
 					.mask = GENMASK(4, 3),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.mask = GENMASK(4, 3),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 3,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 					.addr = 0x10,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_G_TO_M_S_2(61), 0x0 },
+				.fs_avl[0] = {  IIO_G_TO_M_S_2(61000), 0x0 },
-				.fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 },
+				.fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 },
-				.fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 },
+				.fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 },
-				.fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 },
+				.fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 },
 				.fs_len = 4,
 			},
 			[ST_LSM6DSX_ID_GYRO] = {
 					.addr = 0x11,
 					.mask = GENMASK(3, 2),
 				},
-				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750), 0x0 },
+				.fs_avl[0] = {  IIO_DEGREE_TO_RAD(8750000), 0x0 },
-				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 },
+				.fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 },
-				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 },
+				.fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 },
-				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 },
+				.fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 },
 				.fs_len = 4,
 			},
 		},
 	case IIO_CHAN_INFO_SCALE:
 		*val = 0;
 		*val2 = sensor->gain;
-		ret = IIO_VAL_INT_PLUS_MICRO;
+		ret = IIO_VAL_INT_PLUS_NANO;
 		break;
 	default:
 		ret = -EINVAL;
 	fs_table = &hw->settings->fs_table[sensor->id];
 	for (i = 0; i < fs_table->fs_len; i++)
-		len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
+		len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ",
 				 fs_table->fs_avl[i].gain);
 	buf[len - 1] = '\n';
 	return len;
 }
+static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev,
+					struct iio_chan_spec const *chan,
+					long mask)
+{
+	switch (mask) {
+	case IIO_CHAN_INFO_SCALE:
+		switch (chan->type) {
+		case IIO_ANGL_VEL:
+		case IIO_ACCEL:
+			return IIO_VAL_INT_PLUS_NANO;
+		default:
+			return IIO_VAL_INT_PLUS_MICRO;
+		}
+	default:
+		return IIO_VAL_INT_PLUS_MICRO;
+	}
+}
 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
 		       st_lsm6dsx_sysfs_scale_avail, NULL, 0);
 	.read_event_config = st_lsm6dsx_read_event_config,
 	.write_event_config = st_lsm6dsx_write_event_config,
 	.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
+	.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
 };
 static struct attribute *st_lsm6dsx_gyro_attributes[] = {
 	.read_raw = st_lsm6dsx_read_raw,
 	.write_raw = st_lsm6dsx_write_raw,
 	.hwfifo_set_watermark = st_lsm6dsx_set_watermark,
+	.write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt,
 };
 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_shub.c+2−0

@@ -313,6 +313,8 @@ st_lsm6dsx_shub_read(struct st_lsm6dsx_sensor *sensor, u8 addr, · 312 unmodified lines
313		313
314	err = st_lsm6dsx_shub_read_output(hw, data,	314	err = st_lsm6dsx_shub_read_output(hw, data,
315	len & ST_LS6DSX_READ_OP_MASK);	315	len & ST_LS6DSX_READ_OP_MASK);
		316	if (err < 0)
		317	return err;
316		318
317	st_lsm6dsx_shub_master_enable(sensor, false);	319	st_lsm6dsx_shub_master_enable(sensor, false);
318		320

drivers/iio/industrialio-buffer.c+30−16

 	&dev_attr_data_available.attr,
 };
-int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev)
+static int __iio_buffer_alloc_sysfs_and_mask(struct iio_buffer *buffer,
+					     struct iio_dev *indio_dev)
 {
 	struct iio_dev_attr *p;
 	struct attribute **attr;
-	struct iio_buffer *buffer = indio_dev->buffer;
 	int ret, i, attrn, attrcount;
 	const struct iio_chan_spec *channels;
-	channels = indio_dev->channels;
-	if (channels) {
-		int ml = indio_dev->masklength;
-		for (i = 0; i < indio_dev->num_channels; i++)
-			ml = max(ml, channels[i].scan_index + 1);
-		indio_dev->masklength = ml;
-	}
-	if (!buffer)
-		return 0;
 	attrcount = 0;
 	if (buffer->attrs) {
 		while (buffer->attrs[attrcount] != NULL)
 	return ret;
 }
-void iio_buffer_free_sysfs_and_mask(struct iio_dev *indio_dev)
+int iio_buffer_alloc_sysfs_and_mask(struct iio_dev *indio_dev)
 {
 	struct iio_buffer *buffer = indio_dev->buffer;
+	const struct iio_chan_spec *channels;
+	int i;
+	channels = indio_dev->channels;
+	if (channels) {
+		int ml = indio_dev->masklength;
+		for (i = 0; i < indio_dev->num_channels; i++)
+			ml = max(ml, channels[i].scan_index + 1);
+		indio_dev->masklength = ml;
+	}
 	if (!buffer)
-		return;
+		return 0;
+	return __iio_buffer_alloc_sysfs_and_mask(buffer, indio_dev);
+}
+static void __iio_buffer_free_sysfs_and_mask(struct iio_buffer *buffer)
+{
 	bitmap_free(buffer->scan_mask);
 	kfree(buffer->buffer_group.attrs);
 	kfree(buffer->scan_el_group.attrs);
 	iio_free_chan_devattr_list(&buffer->scan_el_dev_attr_list);
 }
+void iio_buffer_free_sysfs_and_mask(struct iio_dev *indio_dev)
+{
+	struct iio_buffer *buffer = indio_dev->buffer;
+	if (!buffer)
+		return;
+	__iio_buffer_free_sysfs_and_mask(buffer);
+}
 /**
  * iio_validate_scan_mask_onehot() - Validates that exactly one channel is selected
  * @indio_dev: the iio device

drivers/iio/industrialio-core.c+4−1

 	[IIO_MOD_PM10] = "pm10",
 	[IIO_MOD_ETHANOL] = "ethanol",
 	[IIO_MOD_H2] = "h2",
+	[IIO_MOD_O2] = "o2",
 };
 /* relies on pairs of these shared then separate */
 	[IIO_CHAN_INFO_CALIBEMISSIVITY] = "calibemissivity",
 	[IIO_CHAN_INFO_OVERSAMPLING_RATIO] = "oversampling_ratio",
 	[IIO_CHAN_INFO_THERMOCOUPLE_TYPE] = "thermocouple_type",
+	[IIO_CHAN_INFO_CALIBAMBIENT] = "calibambient",
 };
 #if defined(CONFIG_DEBUG_FS)
-/**
+/*
  * There's also a CONFIG_DEBUG_FS guard in include/linux/iio/iio.h for
  * iio_get_debugfs_dentry() to make it inline if CONFIG_DEBUG_FS is undefined
  */
 /**
  * iio_device_alloc() - allocate an iio_dev from a driver
+ * @parent:		Parent device.
  * @sizeof_priv:	Space to allocate for private structure.
  **/
 struct iio_dev *iio_device_alloc(struct device *parent, int sizeof_priv)

drivers/iio/industrialio-event.c+25−26

 int iio_device_register_eventset(struct iio_dev *indio_dev)
 {
 	struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
+	struct iio_event_interface *ev_int;
 	struct iio_dev_attr *p;
 	int ret = 0, attrcount_orig = 0, attrcount, attrn;
 	struct attribute **attr;
 	      iio_check_for_dynamic_events(indio_dev)))
 		return 0;
-	iio_dev_opaque->event_interface =
+	ev_int = kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL);
-		kzalloc(sizeof(struct iio_event_interface), GFP_KERNEL);
+	if (ev_int == NULL)
-	if (iio_dev_opaque->event_interface == NULL)
 		return -ENOMEM;
-	INIT_LIST_HEAD(&iio_dev_opaque->event_interface->dev_attr_list);
+	iio_dev_opaque->event_interface = ev_int;
-	iio_setup_ev_int(iio_dev_opaque->event_interface);
+	INIT_LIST_HEAD(&ev_int->dev_attr_list);
+	iio_setup_ev_int(ev_int);
 	if (indio_dev->info->event_attrs != NULL) {
 		attr = indio_dev->info->event_attrs->attrs;
 		while (*attr++ != NULL)
 		attrcount += ret;
 	}
-	iio_dev_opaque->event_interface->group.name = iio_event_group_name;
+	ev_int->group.name = iio_event_group_name;
-	iio_dev_opaque->event_interface->group.attrs = kcalloc(attrcount + 1,
+	ev_int->group.attrs = kcalloc(attrcount + 1,
-							  sizeof(iio_dev_opaque->event_interface->group.attrs[0]),
+				      sizeof(ev_int->group.attrs[0]),
-							  GFP_KERNEL);
+				      GFP_KERNEL);
-	if (iio_dev_opaque->event_interface->group.attrs == NULL) {
+	if (ev_int->group.attrs == NULL) {
 		ret = -ENOMEM;
 		goto error_free_setup_event_lines;
 	}
 	if (indio_dev->info->event_attrs)
-		memcpy(iio_dev_opaque->event_interface->group.attrs,
+		memcpy(ev_int->group.attrs,
 		       indio_dev->info->event_attrs->attrs,
-		       sizeof(iio_dev_opaque->event_interface->group.attrs[0])
+		       sizeof(ev_int->group.attrs[0]) * attrcount_orig);
-		       *attrcount_orig);
 	attrn = attrcount_orig;
 	/* Add all elements from the list. */
-	list_for_each_entry(p,
+	list_for_each_entry(p, &ev_int->dev_attr_list, l)
-			    &iio_dev_opaque->event_interface->dev_attr_list,
+		ev_int->group.attrs[attrn++] = &p->dev_attr.attr;
-			    l)
+	indio_dev->groups[indio_dev->groupcounter++] = &ev_int->group;
-		iio_dev_opaque->event_interface->group.attrs[attrn++] =
-			&p->dev_attr.attr;
-	indio_dev->groups[indio_dev->groupcounter++] =
-		&iio_dev_opaque->event_interface->group;
 	return 0;
 error_free_setup_event_lines:
-	iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list);
+	iio_free_chan_devattr_list(&ev_int->dev_attr_list);
-	kfree(iio_dev_opaque->event_interface);
+	kfree(ev_int);
 	iio_dev_opaque->event_interface = NULL;
 	return ret;
 }
 void iio_device_unregister_eventset(struct iio_dev *indio_dev)
 {
 	struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
+	struct iio_event_interface *ev_int = iio_dev_opaque->event_interface;
-	if (iio_dev_opaque->event_interface == NULL)
+	if (ev_int == NULL)
 		return;
-	iio_free_chan_devattr_list(&iio_dev_opaque->event_interface->dev_attr_list);
+	iio_free_chan_devattr_list(&ev_int->dev_attr_list);
-	kfree(iio_dev_opaque->event_interface->group.attrs);
+	kfree(ev_int->group.attrs);
-	kfree(iio_dev_opaque->event_interface);
+	kfree(ev_int);
+	iio_dev_opaque->event_interface = NULL;
 }

drivers/iio/industrialio-trigger.c+2−1

@@ -516,7 +516,8 @@ static void iio_trig_subirqunmask(struct irq_data *d) · 515 unmodified lines
516	trig->subirqs[d->irq - trig->subirq_base].enabled = true;	516	trig->subirqs[d->irq - trig->subirq_base].enabled = true;
517	}	517	}
518		518
519	static struct iio_trigger viio_trigger_alloc(const char fmt, va_list vargs)	519	static __printf(1, 0)
		520	struct iio_trigger viio_trigger_alloc(const char fmt, va_list vargs)
520	{	521	{
521	struct iio_trigger *trig;	522	struct iio_trigger *trig;
522	int i;	523	int i;

drivers/iio/light/Kconfig+15−0

@@ -86,6 +86,21 @@ config APDS9960 · 85 unmodified lines
86	To compile this driver as a module, choose M here: the	86	To compile this driver as a module, choose M here: the
87	module will be called apds9960	87	module will be called apds9960
88		88
		89	config AS73211
		90	tristate "AMS AS73211 XYZ color sensor"
		91	depends on I2C
		92	select IIO_BUFFER
		93	select IIO_TRIGGERED_BUFFER
		94	help
		95	If you say yes here you get support for the AMS AS73211
		96	JENCOLOR(R) Digital XYZ Sensor.
		97
		98	For triggered measurements, you will need an additional trigger driver
		99	like IIO_HRTIMER_TRIGGER or IIO_SYSFS_TRIGGER.
		100
		101	This driver can also be built as a module. If so, the module
		102	will be called as73211.
		103
89	config BH1750	104	config BH1750
90	tristate "ROHM BH1750 ambient light sensor"	105	tristate "ROHM BH1750 ambient light sensor"
91	depends on I2C	106	depends on I2C

drivers/iio/light/Makefile+1−0

@@ -11,6 +11,7 @@ obj-$(CONFIG_AL3010) += al3010.o · 10 unmodified lines
11	obj-$(CONFIG_AL3320A) += al3320a.o	11	obj-$(CONFIG_AL3320A) += al3320a.o
12	obj-$(CONFIG_APDS9300) += apds9300.o	12	obj-$(CONFIG_APDS9300) += apds9300.o
13	obj-$(CONFIG_APDS9960) += apds9960.o	13	obj-$(CONFIG_APDS9960) += apds9960.o
		14	obj-$(CONFIG_AS73211) += as73211.o
14	obj-$(CONFIG_BH1750) += bh1750.o	15	obj-$(CONFIG_BH1750) += bh1750.o
15	obj-$(CONFIG_BH1780) += bh1780.o	16	obj-$(CONFIG_BH1780) += bh1780.o
16	obj-$(CONFIG_CM32181) += cm32181.o	17	obj-$(CONFIG_CM32181) += cm32181.o

drivers/iio/light/as73211.c+800−0

@@ -0,0 +1,800 @@
	1	// SPDX-License-Identifier: GPL-2.0-only
	2	/*
	3	* Support for AMS AS73211 JENCOLOR(R) Digital XYZ Sensor
	4	*
	5	* Author: Christian Eggers <ceggers@arri.de>
	6	*
	7	* Copyright (c) 2020 ARRI Lighting
	8	*
	9	* Color light sensor with 16-bit channels for x, y, z and temperature);
	10	* 7-bit I2C slave address 0x74 .. 0x77.
	11	*
	12	* Datasheet: https://ams.com/documents/20143/36005/AS73211_DS000556_3-01.pdf
	13	*/
	14
	15	#include <linux/bitfield.h>
	16	#include <linux/completion.h>
	17	#include <linux/delay.h>
	18	#include <linux/i2c.h>
	19	#include <linux/iio/buffer.h>
	20	#include <linux/iio/iio.h>
	21	#include <linux/iio/sysfs.h>
	22	#include <linux/iio/trigger_consumer.h>
	23	#include <linux/iio/triggered_buffer.h>
	24	#include <linux/module.h>
	25	#include <linux/mutex.h>
	26	#include <linux/pm.h>
	27
	28	#define HZ_PER_KHZ 1000
	29
	30	#define AS73211_DRV_NAME "as73211"
	31
	32	/* AS73211 configuration registers */
	33	#define AS73211_REG_OSR 0x0
	34	#define AS73211_REG_AGEN 0x2
	35	#define AS73211_REG_CREG1 0x6
	36	#define AS73211_REG_CREG2 0x7
	37	#define AS73211_REG_CREG3 0x8
	38
	39	/* AS73211 output register bank */
	40	#define AS73211_OUT_OSR_STATUS 0
	41	#define AS73211_OUT_TEMP 1
	42	#define AS73211_OUT_MRES1 2
	43	#define AS73211_OUT_MRES2 3
	44	#define AS73211_OUT_MRES3 4
	45
	46	#define AS73211_OSR_SS BIT(7)
	47	#define AS73211_OSR_PD BIT(6)
	48	#define AS73211_OSR_SW_RES BIT(3)
	49	#define AS73211_OSR_DOS_MASK GENMASK(2, 0)
	50	#define AS73211_OSR_DOS_CONFIG FIELD_PREP(AS73211_OSR_DOS_MASK, 0x2)
	51	#define AS73211_OSR_DOS_MEASURE FIELD_PREP(AS73211_OSR_DOS_MASK, 0x3)
	52
	53	#define AS73211_AGEN_DEVID_MASK GENMASK(7, 4)
	54	#define AS73211_AGEN_DEVID(x) FIELD_PREP(AS73211_AGEN_DEVID_MASK, (x))
	55	#define AS73211_AGEN_MUT_MASK GENMASK(3, 0)
	56	#define AS73211_AGEN_MUT(x) FIELD_PREP(AS73211_AGEN_MUT_MASK, (x))
	57
	58	#define AS73211_CREG1_GAIN_MASK GENMASK(7, 4)
	59	#define AS73211_CREG1_GAIN_1 11
	60	#define AS73211_CREG1_TIME_MASK GENMASK(3, 0)
	61
	62	#define AS73211_CREG3_CCLK_MASK GENMASK(1, 0)
	63
	64	#define AS73211_OSR_STATUS_OUTCONVOF BIT(15)
	65	#define AS73211_OSR_STATUS_MRESOF BIT(14)
	66	#define AS73211_OSR_STATUS_ADCOF BIT(13)
	67	#define AS73211_OSR_STATUS_LDATA BIT(12)
	68	#define AS73211_OSR_STATUS_NDATA BIT(11)
	69	#define AS73211_OSR_STATUS_NOTREADY BIT(10)
	70
	71	#define AS73211_SAMPLE_FREQ_BASE 1024000
	72
	73	#define AS73211_SAMPLE_TIME_NUM 15
	74	#define AS73211_SAMPLE_TIME_MAX_MS BIT(AS73211_SAMPLE_TIME_NUM - 1)
	75
	76	/* Available sample frequencies are 1.024MHz multiplied by powers of two. */
	77	static const int as73211_samp_freq_avail[] = {
	78	AS73211_SAMPLE_FREQ_BASE * 1,
	79	AS73211_SAMPLE_FREQ_BASE * 2,
	80	AS73211_SAMPLE_FREQ_BASE * 4,
	81	AS73211_SAMPLE_FREQ_BASE * 8,
	82	};
	83
	84	static const int as73211_hardwaregain_avail[] = {
	85	1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048,
	86	};
	87
	88	/**
	89	* struct as73211_data - Instance data for one AS73211
	90	* @client: I2C client.
	91	* @osr: Cached Operational State Register.
	92	* @creg1: Cached Configuration Register 1.
	93	* @creg2: Cached Configuration Register 2.
	94	* @creg3: Cached Configuration Register 3.
	95	* @mutex: Keeps cached registers in sync with the device.
	96	* @completion: Completion to wait for interrupt.
	97	* @int_time_avail: Available integration times (depend on sampling frequency).
	98	*/
	99	struct as73211_data {
	100	struct i2c_client *client;
	101	u8 osr;
	102	u8 creg1;
	103	u8 creg2;
	104	u8 creg3;
	105	struct mutex mutex;
	106	struct completion completion;
	107	int int_time_avail[AS73211_SAMPLE_TIME_NUM * 2];
	108	};
	109
	110	#define AS73211_COLOR_CHANNEL(_color, _si, _addr) { \
	111	.type = IIO_INTENSITY, \
	112	.modified = 1, \
	113	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \| BIT(IIO_CHAN_INFO_SCALE), \
	114	.info_mask_shared_by_type = \
	115	BIT(IIO_CHAN_INFO_SAMP_FREQ) \| \
	116	BIT(IIO_CHAN_INFO_HARDWAREGAIN) \| \
	117	BIT(IIO_CHAN_INFO_INT_TIME), \
	118	.info_mask_shared_by_type_available = \
	119	BIT(IIO_CHAN_INFO_SAMP_FREQ) \| \
	120	BIT(IIO_CHAN_INFO_HARDWAREGAIN) \| \
	121	BIT(IIO_CHAN_INFO_INT_TIME), \
	122	.channel2 = IIO_MOD_##_color, \
	123	.address = _addr, \
	124	.scan_index = _si, \
	125	.scan_type = { \
	126	.sign = 'u', \
	127	.realbits = 16, \
	128	.storagebits = 16, \
	129	.endianness = IIO_LE, \
	130	}, \
	131	}
	132
	133	#define AS73211_OFFSET_TEMP_INT (-66)
	134	#define AS73211_OFFSET_TEMP_MICRO 900000
	135	#define AS73211_SCALE_TEMP_INT 0
	136	#define AS73211_SCALE_TEMP_MICRO 50000
	137
	138	#define AS73211_SCALE_X 277071108 /* nW/m^2 */
	139	#define AS73211_SCALE_Y 298384270 /* nW/m^2 */
	140	#define AS73211_SCALE_Z 160241927 /* nW/m^2 */
	141
	142	/* Channel order MUST match devices result register order */
	143	#define AS73211_SCAN_INDEX_TEMP 0
	144	#define AS73211_SCAN_INDEX_X 1
	145	#define AS73211_SCAN_INDEX_Y 2
	146	#define AS73211_SCAN_INDEX_Z 3
	147	#define AS73211_SCAN_INDEX_TS 4
	148
	149	#define AS73211_SCAN_MASK_COLOR ( \
	150	BIT(AS73211_SCAN_INDEX_X) \| \
	151	BIT(AS73211_SCAN_INDEX_Y) \| \
	152	BIT(AS73211_SCAN_INDEX_Z))
	153
	154	#define AS73211_SCAN_MASK_ALL ( \
	155	BIT(AS73211_SCAN_INDEX_TEMP) \| \
	156	AS73211_SCAN_MASK_COLOR)
	157
	158	static const struct iio_chan_spec as73211_channels[] = {
	159	{
	160	.type = IIO_TEMP,
	161	.info_mask_separate =
	162	BIT(IIO_CHAN_INFO_RAW) \|
	163	BIT(IIO_CHAN_INFO_OFFSET) \|
	164	BIT(IIO_CHAN_INFO_SCALE),
	165	.address = AS73211_OUT_TEMP,
	166	.scan_index = AS73211_SCAN_INDEX_TEMP,
	167	.scan_type = {
	168	.sign = 'u',
	169	.realbits = 16,
	170	.storagebits = 16,
	171	.endianness = IIO_LE,
	172	}
	173	},
	174	AS73211_COLOR_CHANNEL(X, AS73211_SCAN_INDEX_X, AS73211_OUT_MRES1),
	175	AS73211_COLOR_CHANNEL(Y, AS73211_SCAN_INDEX_Y, AS73211_OUT_MRES2),
	176	AS73211_COLOR_CHANNEL(Z, AS73211_SCAN_INDEX_Z, AS73211_OUT_MRES3),
	177	IIO_CHAN_SOFT_TIMESTAMP(AS73211_SCAN_INDEX_TS),
	178	};
	179
	180	static unsigned int as73211_integration_time_1024cyc(struct as73211_data *data)
	181	{
	182	/*
	183	* Return integration time in units of 1024 clock cycles. Integration time
	184	* in CREG1 is in powers of 2 (x 1024 cycles).
	185	*/
	186	return BIT(FIELD_GET(AS73211_CREG1_TIME_MASK, data->creg1));
	187	}
	188
	189	static unsigned int as73211_integration_time_us(struct as73211_data *data,
	190	unsigned int integration_time_1024cyc)
	191	{
	192	/*
	193	* f_samp is configured in CREG3 in powers of 2 (x 1.024 MHz)
	194	* t_cycl is configured in CREG1 in powers of 2 (x 1024 cycles)
	195	* t_int_us = 1 / (f_samp) * t_cycl * US_PER_SEC
	196	* = 1 / (2^CREG3_CCLK * 1,024,000) * 2^CREG1_CYCLES * 1,024 * US_PER_SEC
	197	* = 2^(-CREG3_CCLK) * 2^CREG1_CYCLES * 1,000
	198	* In order to get rid of negative exponents, we extend the "fraction"
	199	* by 2^3 (CREG3_CCLK,max = 3)
	200	* t_int_us = 2^(3-CREG3_CCLK) * 2^CREG1_CYCLES * 125
	201	*/
	202	return BIT(3 - FIELD_GET(AS73211_CREG3_CCLK_MASK, data->creg3)) *
	203	integration_time_1024cyc * 125;
	204	}
	205
	206	static void as73211_integration_time_calc_avail(struct as73211_data *data)
	207	{
	208	int i;
	209
	210	for (i = 0; i < ARRAY_SIZE(data->int_time_avail) / 2; i++) {
	211	unsigned int time_us = as73211_integration_time_us(data, BIT(i));
	212
	213	data->int_time_avail[i * 2 + 0] = time_us / USEC_PER_SEC;
	214	data->int_time_avail[i * 2 + 1] = time_us % USEC_PER_SEC;
	215	}
	216	}
	217
	218	static unsigned int as73211_gain(struct as73211_data *data)
	219	{
	220	/* gain can be calculated from CREG1 as 2^(11 - CREG1_GAIN) */
	221	return BIT(AS73211_CREG1_GAIN_1 - FIELD_GET(AS73211_CREG1_GAIN_MASK, data->creg1));
	222	}
	223
	224	/* must be called with as73211_data::mutex held. */
	225	static int as73211_req_data(struct as73211_data *data)
	226	{
	227	unsigned int time_us = as73211_integration_time_us(data,
	228	as73211_integration_time_1024cyc(data));
	229	struct device *dev = &data->client->dev;
	230	union i2c_smbus_data smbus_data;
	231	u16 osr_status;
	232	int ret;
	233
	234	if (data->client->irq)
	235	reinit_completion(&data->completion);
	236
	237	/*
	238	* During measurement, there should be no traffic on the i2c bus as the
	239	* electrical noise would disturb the measurement process.
	240	*/
	241	i2c_lock_bus(data->client->adapter, I2C_LOCK_SEGMENT);
	242
	243	data->osr &= ~AS73211_OSR_DOS_MASK;
	244	data->osr \|= AS73211_OSR_DOS_MEASURE \| AS73211_OSR_SS;
	245
	246	smbus_data.byte = data->osr;
	247	ret = __i2c_smbus_xfer(data->client->adapter, data->client->addr,
	248	data->client->flags, I2C_SMBUS_WRITE,
	249	AS73211_REG_OSR, I2C_SMBUS_BYTE_DATA, &smbus_data);
	250	if (ret < 0) {
	251	i2c_unlock_bus(data->client->adapter, I2C_LOCK_SEGMENT);
	252	return ret;
	253	}
	254
	255	/*
	256	* Reset AS73211_OSR_SS (is self clearing) in order to avoid unintentional
	257	* triggering of further measurements later.
	258	*/
	259	data->osr &= ~AS73211_OSR_SS;
	260
	261	/*
	262	* Add 33% extra margin for the timeout. fclk,min = fclk,typ - 27%.
	263	*/
	264	time_us += time_us / 3;
	265	if (data->client->irq) {
	266	ret = wait_for_completion_timeout(&data->completion, usecs_to_jiffies(time_us));
	267	if (!ret) {
	268	dev_err(dev, "timeout waiting for READY IRQ\n");
	269	i2c_unlock_bus(data->client->adapter, I2C_LOCK_SEGMENT);
	270	return -ETIMEDOUT;
	271	}
	272	} else {
	273	/* Wait integration time */
	274	usleep_range(time_us, 2 * time_us);
	275	}
	276
	277	i2c_unlock_bus(data->client->adapter, I2C_LOCK_SEGMENT);
	278
	279	ret = i2c_smbus_read_word_data(data->client, AS73211_OUT_OSR_STATUS);
	280	if (ret < 0)
	281	return ret;
	282
	283	osr_status = ret;
	284	if (osr_status != (AS73211_OSR_DOS_MEASURE \| AS73211_OSR_STATUS_NDATA)) {
	285	if (osr_status & AS73211_OSR_SS) {
	286	dev_err(dev, "%s() Measurement has not stopped\n", __func__);
	287	return -ETIME;
	288	}
	289	if (osr_status & AS73211_OSR_STATUS_NOTREADY) {
	290	dev_err(dev, "%s() Data is not ready\n", __func__);
	291	return -ENODATA;
	292	}
	293	if (!(osr_status & AS73211_OSR_STATUS_NDATA)) {
	294	dev_err(dev, "%s() No new data available\n", __func__);
	295	return -ENODATA;
	296	}
	297	if (osr_status & AS73211_OSR_STATUS_LDATA) {
	298	dev_err(dev, "%s() Result buffer overrun\n", __func__);
	299	return -ENOBUFS;
	300	}
	301	if (osr_status & AS73211_OSR_STATUS_ADCOF) {
	302	dev_err(dev, "%s() ADC overflow\n", __func__);
	303	return -EOVERFLOW;
	304	}
	305	if (osr_status & AS73211_OSR_STATUS_MRESOF) {
	306	dev_err(dev, "%s() Measurement result overflow\n", __func__);
	307	return -EOVERFLOW;
	308	}
	309	if (osr_status & AS73211_OSR_STATUS_OUTCONVOF) {
	310	dev_err(dev, "%s() Timer overflow\n", __func__);
	311	return -EOVERFLOW;
	312	}
	313	dev_err(dev, "%s() Unexpected status value\n", __func__);
	314	return -EIO;
	315	}
	316
	317	return 0;
	318	}
	319
	320	static int as73211_read_raw(struct iio_dev indio_dev, struct iio_chan_spec const chan,
	321	int val, int val2, long mask)
	322	{
	323	struct as73211_data *data = iio_priv(indio_dev);
	324
	325	switch (mask) {
	326	case IIO_CHAN_INFO_RAW: {
	327	int ret;
	328
	329	ret = iio_device_claim_direct_mode(indio_dev);
	330	if (ret < 0)
	331	return ret;
	332
	333	ret = as73211_req_data(data);
	334	if (ret < 0) {
	335	iio_device_release_direct_mode(indio_dev);
	336	return ret;
	337	}
	338
	339	ret = i2c_smbus_read_word_data(data->client, chan->address);
	340	iio_device_release_direct_mode(indio_dev);
	341	if (ret < 0)
	342	return ret;
	343
	344	*val = ret;
	345	return IIO_VAL_INT;
	346	}
	347	case IIO_CHAN_INFO_OFFSET:
	348	*val = AS73211_OFFSET_TEMP_INT;
	349	*val2 = AS73211_OFFSET_TEMP_MICRO;
	350	return IIO_VAL_INT_PLUS_MICRO;
	351
	352	case IIO_CHAN_INFO_SCALE:
	353	switch (chan->type) {
	354	case IIO_TEMP:
	355	*val = AS73211_SCALE_TEMP_INT;
	356	*val2 = AS73211_SCALE_TEMP_MICRO;
	357	return IIO_VAL_INT_PLUS_MICRO;
	358
	359	case IIO_INTENSITY: {
	360	unsigned int scale;
	361
	362	switch (chan->channel2) {
	363	case IIO_MOD_X:
	364	scale = AS73211_SCALE_X;
	365	break;
	366	case IIO_MOD_Y:
	367	scale = AS73211_SCALE_Y;
	368	break;
	369	case IIO_MOD_Z:
	370	scale = AS73211_SCALE_Z;
	371	break;
	372	default:
	373	return -EINVAL;
	374	}
	375	scale /= as73211_gain(data);
	376	scale /= as73211_integration_time_1024cyc(data);
	377	*val = scale;
	378	return IIO_VAL_INT;
	379
	380	default:
	381	return -EINVAL;
	382	}}
	383
	384	case IIO_CHAN_INFO_SAMP_FREQ:
	385	/* f_samp is configured in CREG3 in powers of 2 (x 1.024 MHz) */
	386	val = BIT(FIELD_GET(AS73211_CREG3_CCLK_MASK, data->creg3))
	387	AS73211_SAMPLE_FREQ_BASE;
	388	return IIO_VAL_INT;
	389
	390	case IIO_CHAN_INFO_HARDWAREGAIN:
	391	*val = as73211_gain(data);
	392	return IIO_VAL_INT;
	393
	394	case IIO_CHAN_INFO_INT_TIME: {
	395	unsigned int time_us;
	396
	397	mutex_lock(&data->mutex);
	398	time_us = as73211_integration_time_us(data, as73211_integration_time_1024cyc(data));
	399	mutex_unlock(&data->mutex);
	400	*val = time_us / USEC_PER_SEC;
	401	*val2 = time_us % USEC_PER_SEC;
	402	return IIO_VAL_INT_PLUS_MICRO;
	403
	404	default:
	405	return -EINVAL;
	406	}}
	407	}
	408
	409	static int as73211_read_avail(struct iio_dev indio_dev, struct iio_chan_spec const chan,
	410	const int *vals, int type, int *length, long mask)
	411	{
	412	struct as73211_data *data = iio_priv(indio_dev);
	413
	414	switch (mask) {
	415	case IIO_CHAN_INFO_SAMP_FREQ:
	416	*length = ARRAY_SIZE(as73211_samp_freq_avail);
	417	*vals = as73211_samp_freq_avail;
	418	*type = IIO_VAL_INT;
	419	return IIO_AVAIL_LIST;
	420
	421	case IIO_CHAN_INFO_HARDWAREGAIN:
	422	*length = ARRAY_SIZE(as73211_hardwaregain_avail);
	423	*vals = as73211_hardwaregain_avail;
	424	*type = IIO_VAL_INT;
	425	return IIO_AVAIL_LIST;
	426
	427	case IIO_CHAN_INFO_INT_TIME:
	428	*length = ARRAY_SIZE(data->int_time_avail);
	429	*vals = data->int_time_avail;
	430	*type = IIO_VAL_INT_PLUS_MICRO;
	431	return IIO_AVAIL_LIST;
	432
	433	default:
	434	return -EINVAL;
	435	}
	436	}
	437
	438	static int _as73211_write_raw(struct iio_dev *indio_dev,
	439	struct iio_chan_spec const *chan __always_unused,
	440	int val, int val2, long mask)
	441	{
	442	struct as73211_data *data = iio_priv(indio_dev);
	443	int ret;
	444
	445	switch (mask) {
	446	case IIO_CHAN_INFO_SAMP_FREQ: {
	447	int reg_bits, freq_kHz = val / HZ_PER_KHZ; /* 1024, 2048, ... */
	448
	449	/* val must be 1024 * 2^x */
	450	if (val < 0 \|\| (freq_kHz * HZ_PER_KHZ) != val \|\|
	451	!is_power_of_2(freq_kHz) \|\| val2)
	452	return -EINVAL;
	453
	454	/* f_samp is configured in CREG3 in powers of 2 (x 1.024 MHz (=2^10)) */
	455	reg_bits = ilog2(freq_kHz) - 10;
	456	if (!FIELD_FIT(AS73211_CREG3_CCLK_MASK, reg_bits))
	457	return -EINVAL;
	458
	459	data->creg3 &= ~AS73211_CREG3_CCLK_MASK;
	460	data->creg3 \|= FIELD_PREP(AS73211_CREG3_CCLK_MASK, reg_bits);
	461	as73211_integration_time_calc_avail(data);
	462
	463	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_CREG3, data->creg3);
	464	if (ret < 0)
	465	return ret;
	466
	467	return 0;
	468	}
	469	case IIO_CHAN_INFO_HARDWAREGAIN: {
	470	unsigned int reg_bits;
	471
	472	if (val < 0 \|\| !is_power_of_2(val) \|\| val2)
	473	return -EINVAL;
	474
	475	/* gain can be calculated from CREG1 as 2^(11 - CREG1_GAIN) */
	476	reg_bits = AS73211_CREG1_GAIN_1 - ilog2(val);
	477	if (!FIELD_FIT(AS73211_CREG1_GAIN_MASK, reg_bits))
	478	return -EINVAL;
	479
	480	data->creg1 &= ~AS73211_CREG1_GAIN_MASK;
	481	data->creg1 \|= FIELD_PREP(AS73211_CREG1_GAIN_MASK, reg_bits);
	482
	483	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_CREG1, data->creg1);
	484	if (ret < 0)
	485	return ret;
	486
	487	return 0;
	488	}
	489	case IIO_CHAN_INFO_INT_TIME: {
	490	int val_us = val * USEC_PER_SEC + val2;
	491	int time_ms;
	492	int reg_bits;
	493
	494	/* f_samp is configured in CREG3 in powers of 2 (x 1.024 MHz) */
	495	int f_samp_1_024mhz = BIT(FIELD_GET(AS73211_CREG3_CCLK_MASK, data->creg3));
	496
	497	/*
	498	* time_ms = time_us * US_PER_MS * f_samp_1_024mhz / MHZ_PER_HZ
	499	* = time_us * f_samp_1_024mhz / 1000
	500	*/
	501	time_ms = (val_us * f_samp_1_024mhz) / 1000; /* 1 ms, 2 ms, ... (power of two) */
	502	if (time_ms < 0 \|\| !is_power_of_2(time_ms) \|\| time_ms > AS73211_SAMPLE_TIME_MAX_MS)
	503	return -EINVAL;
	504
	505	reg_bits = ilog2(time_ms);
	506	if (!FIELD_FIT(AS73211_CREG1_TIME_MASK, reg_bits))
	507	return -EINVAL; /* not possible due to previous tests */
	508
	509	data->creg1 &= ~AS73211_CREG1_TIME_MASK;
	510	data->creg1 \|= FIELD_PREP(AS73211_CREG1_TIME_MASK, reg_bits);
	511
	512	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_CREG1, data->creg1);
	513	if (ret < 0)
	514	return ret;
	515
	516	return 0;
	517
	518	default:
	519	return -EINVAL;
	520	}}
	521	}
	522
	523	static int as73211_write_raw(struct iio_dev indio_dev, struct iio_chan_spec const chan,
	524	int val, int val2, long mask)
	525	{
	526	struct as73211_data *data = iio_priv(indio_dev);
	527	int ret;
	528
	529	mutex_lock(&data->mutex);
	530
	531	ret = iio_device_claim_direct_mode(indio_dev);
	532	if (ret < 0)
	533	goto error_unlock;
	534
	535	/* Need to switch to config mode ... */
	536	if ((data->osr & AS73211_OSR_DOS_MASK) != AS73211_OSR_DOS_CONFIG) {
	537	data->osr &= ~AS73211_OSR_DOS_MASK;
	538	data->osr \|= AS73211_OSR_DOS_CONFIG;
	539
	540	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_OSR, data->osr);
	541	if (ret < 0)
	542	goto error_release;
	543	}
	544
	545	ret = _as73211_write_raw(indio_dev, chan, val, val2, mask);
	546
	547	error_release:
	548	iio_device_release_direct_mode(indio_dev);
	549	error_unlock:
	550	mutex_unlock(&data->mutex);
	551	return ret;
	552	}
	553
	554	static irqreturn_t as73211_ready_handler(int irq __always_unused, void *priv)
	555	{
	556	struct as73211_data *data = iio_priv(priv);
	557
	558	complete(&data->completion);
	559
	560	return IRQ_HANDLED;
	561	}
	562
	563	static irqreturn_t as73211_trigger_handler(int irq __always_unused, void *p)
	564	{
	565	struct iio_poll_func *pf = p;
	566	struct iio_dev *indio_dev = pf->indio_dev;
	567	struct as73211_data *data = iio_priv(indio_dev);
	568	struct {
	569	__le16 chan[4];
	570	s64 ts __aligned(8);
	571	} scan;
	572	int data_result, ret;
	573
	574	mutex_lock(&data->mutex);
	575
	576	data_result = as73211_req_data(data);
	577	if (data_result < 0 && data_result != -EOVERFLOW)
	578	goto done; /* don't push any data for errors other than EOVERFLOW */
	579
	580	if (*indio_dev->active_scan_mask == AS73211_SCAN_MASK_ALL) {
	581	/* Optimization for reading all (color + temperature) channels */
	582	u8 addr = as73211_channels[0].address;
	583	struct i2c_msg msgs[] = {
	584	{
	585	.addr = data->client->addr,
	586	.flags = 0,
	587	.len = 1,
	588	.buf = &addr,
	589	},
	590	{
	591	.addr = data->client->addr,
	592	.flags = I2C_M_RD,
	593	.len = sizeof(scan.chan),
	594	.buf = (u8 *)&scan.chan,
	595	},
	596	};
	597
	598	ret = i2c_transfer(data->client->adapter, msgs, ARRAY_SIZE(msgs));
	599	if (ret < 0)
	600	goto done;
	601	} else {
	602	/* Optimization for reading only color channels */
	603
	604	/* AS73211 starts reading at address 2 */
	605	ret = i2c_master_recv(data->client,
	606	(char )&scan.chan[1], 3 sizeof(scan.chan[1]));
	607	if (ret < 0)
	608	goto done;
	609	}
	610
	611	if (data_result) {
	612	/*
	613	* Saturate all channels (in case of overflows). Temperature channel
	614	* is not affected by overflows.
	615	*/
	616	scan.chan[1] = cpu_to_le16(U16_MAX);
	617	scan.chan[2] = cpu_to_le16(U16_MAX);
	618	scan.chan[3] = cpu_to_le16(U16_MAX);
	619	}
	620
	621	iio_push_to_buffers_with_timestamp(indio_dev, &scan, iio_get_time_ns(indio_dev));
	622
	623	done:
	624	mutex_unlock(&data->mutex);
	625	iio_trigger_notify_done(indio_dev->trig);
	626
	627	return IRQ_HANDLED;
	628	}
	629
	630	static const struct iio_info as73211_info = {
	631	.read_raw = as73211_read_raw,
	632	.read_avail = as73211_read_avail,
	633	.write_raw = as73211_write_raw,
	634	};
	635
	636	static int as73211_power(struct iio_dev *indio_dev, bool state)
	637	{
	638	struct as73211_data *data = iio_priv(indio_dev);
	639	int ret;
	640
	641	mutex_lock(&data->mutex);
	642
	643	if (state)
	644	data->osr &= ~AS73211_OSR_PD;
	645	else
	646	data->osr \|= AS73211_OSR_PD;
	647
	648	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_OSR, data->osr);
	649
	650	mutex_unlock(&data->mutex);
	651
	652	if (ret < 0)
	653	return ret;
	654
	655	return 0;
	656	}
	657
	658	static void as73211_power_disable(void *data)
	659	{
	660	struct iio_dev *indio_dev = data;
	661
	662	as73211_power(indio_dev, false);
	663	}
	664
	665	static int as73211_probe(struct i2c_client *client)
	666	{
	667	struct device *dev = &client->dev;
	668	struct as73211_data *data;
	669	struct iio_dev *indio_dev;
	670	int ret;
	671
	672	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
	673	if (!indio_dev)
	674	return -ENOMEM;
	675
	676	data = iio_priv(indio_dev);
	677	i2c_set_clientdata(client, indio_dev);
	678	data->client = client;
	679
	680	mutex_init(&data->mutex);
	681	init_completion(&data->completion);
	682
	683	indio_dev->info = &as73211_info;
	684	indio_dev->name = AS73211_DRV_NAME;
	685	indio_dev->channels = as73211_channels;
	686	indio_dev->num_channels = ARRAY_SIZE(as73211_channels);
	687	indio_dev->modes = INDIO_DIRECT_MODE;
	688
	689	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_OSR);
	690	if (ret < 0)
	691	return ret;
	692	data->osr = ret;
	693
	694	/* reset device */
	695	data->osr \|= AS73211_OSR_SW_RES;
	696	ret = i2c_smbus_write_byte_data(data->client, AS73211_REG_OSR, data->osr);
	697	if (ret < 0)
	698	return ret;
	699
	700	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_OSR);
	701	if (ret < 0)
	702	return ret;
	703	data->osr = ret;
	704
	705	/*
	706	* Reading AGEN is only possible after reset (AGEN is not available if
	707	* device is in measurement mode).
	708	*/
	709	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_AGEN);
	710	if (ret < 0)
	711	return ret;
	712
	713	/* At the time of writing this driver, only DEVID 2 and MUT 1 are known. */
	714	if ((ret & AS73211_AGEN_DEVID_MASK) != AS73211_AGEN_DEVID(2) \|\|
	715	(ret & AS73211_AGEN_MUT_MASK) != AS73211_AGEN_MUT(1))
	716	return -ENODEV;
	717
	718	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_CREG1);
	719	if (ret < 0)
	720	return ret;
	721	data->creg1 = ret;
	722
	723	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_CREG2);
	724	if (ret < 0)
	725	return ret;
	726	data->creg2 = ret;
	727
	728	ret = i2c_smbus_read_byte_data(data->client, AS73211_REG_CREG3);
	729	if (ret < 0)
	730	return ret;
	731	data->creg3 = ret;
	732	as73211_integration_time_calc_avail(data);
	733
	734	ret = as73211_power(indio_dev, true);
	735	if (ret < 0)
	736	return ret;
	737
	738	ret = devm_add_action_or_reset(dev, as73211_power_disable, indio_dev);
	739	if (ret)
	740	return ret;
	741
	742	ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL, as73211_trigger_handler, NULL);
	743	if (ret)
	744	return ret;
	745
	746	if (client->irq) {
	747	ret = devm_request_threaded_irq(&client->dev, client->irq,
	748	NULL,
	749	as73211_ready_handler,
	750	IRQF_ONESHOT,
	751	client->name, indio_dev);
	752	if (ret)
	753	return ret;
	754	}
	755
	756	return devm_iio_device_register(dev, indio_dev);
	757	}
	758
	759	static int __maybe_unused as73211_suspend(struct device *dev)
	760	{
	761	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
	762
	763	return as73211_power(indio_dev, false);
	764	}
	765
	766	static int __maybe_unused as73211_resume(struct device *dev)
	767	{
	768	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
	769
	770	return as73211_power(indio_dev, true);
	771	}
	772
	773	static SIMPLE_DEV_PM_OPS(as73211_pm_ops, as73211_suspend, as73211_resume);
	774
	775	static const struct of_device_id as73211_of_match[] = {
	776	{ .compatible = "ams,as73211" },
	777	{ }
	778	};
	779	MODULE_DEVICE_TABLE(of, as73211_of_match);
	780
	781	static const struct i2c_device_id as73211_id[] = {
	782	{ "as73211", 0 },
	783	{ }
	784	};
	785	MODULE_DEVICE_TABLE(i2c, as73211_id);
	786
	787	static struct i2c_driver as73211_driver = {
	788	.driver = {
	789	.name = AS73211_DRV_NAME,
	790	.of_match_table = as73211_of_match,
	791	.pm = &as73211_pm_ops,
	792	},
	793	.probe_new = as73211_probe,
	794	.id_table = as73211_id,
	795	};
	796	module_i2c_driver(as73211_driver);
	797
	798	MODULE_AUTHOR("Christian Eggers <ceggers@arri.de>");
	799	MODULE_DESCRIPTION("AS73211 XYZ True Color Sensor driver");
	800	MODULE_LICENSE("GPL");

drivers/iio/light/cros_ec_light_prox.c+2−3

 	ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
 					cros_ec_sensors_capture,
-					cros_ec_sensors_push_data);
+					cros_ec_sensors_push_data,
+					true);
 	if (ret)
 		return ret;
-	iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
 	indio_dev->info = &cros_ec_light_prox_info;
 	state = iio_priv(indio_dev);
 	state->core.type = state->core.resp->info.type;

drivers/iio/light/gp2ap002.c+1−1

@@ -566,7 +566,7 @@ static int gp2ap002_probe(struct i2c_client *client, · 565 unmodified lines
566		566
567	/*	567	/*
568	* Initialize the device and signal to runtime PM that now we are	568	* Initialize the device and signal to runtime PM that now we are
569	* definately up and using power.	569	* definitely up and using power.
570	*/	570	*/
571	ret = gp2ap002_init(gp2ap002);	571	ret = gp2ap002_init(gp2ap002);
572	if (ret) {	572	if (ret) {

drivers/iio/light/isl29018.c+3−6

 	chip->suspended = false;
 	chip->vcc_reg = devm_regulator_get(&client->dev, "vcc");
-	if (IS_ERR(chip->vcc_reg)) {
+	if (IS_ERR(chip->vcc_reg))
-		err = PTR_ERR(chip->vcc_reg);
+		return dev_err_probe(&client->dev, PTR_ERR(chip->vcc_reg),
-		if (err != -EPROBE_DEFER)
+				     "failed to get VCC regulator!\n");
-			dev_err(&client->dev, "failed to get VCC regulator!\n");
-		return err;
-	}
 	err = regulator_enable(chip->vcc_reg);
 	if (err) {

drivers/iio/light/si1145.c+11−8

  * @part_info:	Part information
  * @trig:	Pointer to iio trigger
  * @meas_rate:	Value of MEAS_RATE register. Only set in HW in auto mode
+ * @buffer:	Used to pack data read from sensor.
  */
 struct si1145_data {
 	struct i2c_client *client;
 	bool autonomous;
 	struct iio_trigger *trig;
 	int meas_rate;
+	/*
+	 * Ensure timestamp will be naturally aligned if present.
+	 * Maximum buffer size (may be only partly used if not all
+	 * channels are enabled):
+	 *   6*2 bytes channels data + 4 bytes alignment +
+	 *   8 bytes timestamp
+	 */
+	u8 buffer[24] __aligned(8);
 };
 /*
 	struct iio_poll_func *pf = private;
 	struct iio_dev *indio_dev = pf->indio_dev;
 	struct si1145_data *data = iio_priv(indio_dev);
-	/*
-	 * Maximum buffer size:
-	 *   6*2 bytes channels data + 4 bytes alignment +
-	 *   8 bytes timestamp
-	 */
-	u8 buffer[24];
 	int i, j = 0;
 	int ret;
 	u8 irq_status = 0;
 		ret = i2c_smbus_read_i2c_block_data_or_emulated(
 				data->client, indio_dev->channels[i].address,
-				sizeof(u16) * run, &buffer[j]);
+				sizeof(u16) * run, &data->buffer[j]);
 		if (ret < 0)
 			goto done;
 		j += run * sizeof(u16);
 			goto done;
 	}
-	iio_push_to_buffers_with_timestamp(indio_dev, buffer,
+	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
 		iio_get_time_ns(indio_dev));
 done:

drivers/iio/light/tsl2772.c+2−8

 	ret = devm_regulator_bulk_get(&clientp->dev,
 				      ARRAY_SIZE(chip->supplies),
 				      chip->supplies);
-	if (ret < 0) {
+	if (ret < 0)
-		if (ret != -EPROBE_DEFER)
+		return dev_err_probe(&clientp->dev, ret, "Failed to get regulators\n");
-			dev_err(&clientp->dev,
-				"Failed to get regulators: %d\n",
-				ret);
-		return ret;
-	}
 	ret = regulator_bulk_enable(ARRAY_SIZE(chip->supplies), chip->supplies);
 	if (ret < 0) {

drivers/iio/magnetometer/ak8974.c+4−10

  * Author: Linus Walleij <linus.walleij@linaro.org>
  */
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/kernel.h>
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 	ret = devm_regulator_bulk_get(&i2c->dev,
 				      ARRAY_SIZE(ak8974->regs),
 				      ak8974->regs);
-	if (ret < 0) {
+	if (ret < 0)
-		if (ret != -EPROBE_DEFER)
+		return dev_err_probe(&i2c->dev, ret, "cannot get regulators\n");
-			dev_err(&i2c->dev, "cannot get regulators: %d\n", ret);
-		else
-			dev_dbg(&i2c->dev,
-				"regulators unavailable, deferring probe\n");
-		return ret;
-	}
 	ret = regulator_bulk_enable(ARRAY_SIZE(ak8974->regs), ak8974->regs);
 	if (ret < 0) {
 	.driver	 = {
 		.name	= "ak8974",
 		.pm = &ak8974_dev_pm_ops,
-		.of_match_table = of_match_ptr(ak8974_of_match),
+		.of_match_table = ak8974_of_match,
 	},
 	.probe	  = ak8974_probe,
 	.remove	  = ak8974_remove,

drivers/iio/magnetometer/ak8975.c+3−5

  */
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
 #include <linux/i2c.h>
 #include <linux/delay.h>
 #include <linux/bitops.h>
 #include <linux/gpio/consumer.h>
-#include <linux/acpi.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pm_runtime.h>
 	.read_raw = &ak8975_read_raw,
 };
-#ifdef CONFIG_ACPI
 static const struct acpi_device_id ak_acpi_match[] = {
 	{"AK8975", AK8975},
 	{"AK8963", AK8963},
 	{ }
 };
 MODULE_DEVICE_TABLE(acpi, ak_acpi_match);
-#endif
 static void ak8975_fill_buffer(struct iio_dev *indio_dev)
 {
 	.driver = {
 		.name	= "ak8975",
 		.pm = &ak8975_dev_pm_ops,
-		.of_match_table = of_match_ptr(ak8975_of_match),
+		.of_match_table = ak8975_of_match,
-		.acpi_match_table = ACPI_PTR(ak_acpi_match),
+		.acpi_match_table = ak_acpi_match,
 	},
 	.probe		= ak8975_probe,
 	.remove		= ak8975_remove,

drivers/iio/magnetometer/hmc5843_core.c+2−2

@@ -245,7 +245,7 @@ static const struct iio_enum hmc5843_meas_conf_enum = { · 244 unmodified lines
245	};	245	};
246		246
247	static const struct iio_chan_spec_ext_info hmc5843_ext_info[] = {	247	static const struct iio_chan_spec_ext_info hmc5843_ext_info[] = {
248	IIO_ENUM("meas_conf", true, &hmc5843_meas_conf_enum),	248	IIO_ENUM("meas_conf", IIO_SHARED_BY_TYPE, &hmc5843_meas_conf_enum),
249	IIO_ENUM_AVAILABLE("meas_conf", &hmc5843_meas_conf_enum),	249	IIO_ENUM_AVAILABLE("meas_conf", &hmc5843_meas_conf_enum),
250	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, hmc5843_get_mount_matrix),	250	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, hmc5843_get_mount_matrix),
251	{ }	251	{ }
@@ -259,7 +259,7 @@ static const struct iio_enum hmc5983_meas_conf_enum = { · 7 unmodified lines
259	};	259	};
260		260
261	static const struct iio_chan_spec_ext_info hmc5983_ext_info[] = {	261	static const struct iio_chan_spec_ext_info hmc5983_ext_info[] = {
262	IIO_ENUM("meas_conf", true, &hmc5983_meas_conf_enum),	262	IIO_ENUM("meas_conf", IIO_SHARED_BY_TYPE, &hmc5983_meas_conf_enum),
263	IIO_ENUM_AVAILABLE("meas_conf", &hmc5983_meas_conf_enum),	263	IIO_ENUM_AVAILABLE("meas_conf", &hmc5983_meas_conf_enum),
264	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, hmc5843_get_mount_matrix),	264	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, hmc5843_get_mount_matrix),
265	{ }	265	{ }

drivers/iio/magnetometer/mag3110.c+6−14

 	data = iio_priv(indio_dev);
 	data->vdd_reg = devm_regulator_get(&client->dev, "vdd");
-	if (IS_ERR(data->vdd_reg)) {
+	if (IS_ERR(data->vdd_reg))
-		if (PTR_ERR(data->vdd_reg) == -EPROBE_DEFER)
+		return dev_err_probe(&client->dev, PTR_ERR(data->vdd_reg),
-			return -EPROBE_DEFER;
+				     "failed to get VDD regulator!\n");
-		dev_err(&client->dev, "failed to get VDD regulator!\n");
-		return PTR_ERR(data->vdd_reg);
-	}
 	data->vddio_reg = devm_regulator_get(&client->dev, "vddio");
-	if (IS_ERR(data->vddio_reg)) {
+	if (IS_ERR(data->vddio_reg))
-		if (PTR_ERR(data->vddio_reg) == -EPROBE_DEFER)
+		return dev_err_probe(&client->dev, PTR_ERR(data->vddio_reg),
-			return -EPROBE_DEFER;
+				     "failed to get VDDIO regulator!\n");
-		dev_err(&client->dev, "failed to get VDDIO regulator!\n");
-		return PTR_ERR(data->vddio_reg);
-	}
 	ret = regulator_enable(data->vdd_reg);
 	if (ret) {

drivers/iio/multiplexer/iio-mux.c+3−5

 		return -ENODEV;
 	parent = devm_iio_channel_get(dev, "parent");
-	if (IS_ERR(parent)) {
+	if (IS_ERR(parent))
-		if (PTR_ERR(parent) != -EPROBE_DEFER)
+		return dev_err_probe(dev, PTR_ERR(parent),
-			dev_err(dev, "failed to get parent channel\n");
+				     "failed to get parent channel\n");
-		return PTR_ERR(parent);
-	}
 	sizeof_ext_info = iio_get_channel_ext_info_count(parent);
 	if (sizeof_ext_info) {

drivers/iio/potentiometer/ad5272.c+2−3

 #include <linux/i2c.h>
 #include <linux/iio/iio.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #define  AD5272_RDAC_WR  1
 #define  AD5272_RDAC_RD  2
 	return devm_iio_device_register(dev, indio_dev);
 }
-#if defined(CONFIG_OF)
 static const struct of_device_id ad5272_dt_ids[] = {
 	{ .compatible = "adi,ad5272-020", .data = (void *)AD5272_020 },
 	{ .compatible = "adi,ad5272-050", .data = (void *)AD5272_050 },
 	{}
 };
 MODULE_DEVICE_TABLE(of, ad5272_dt_ids);
-#endif /* CONFIG_OF */
 static const struct i2c_device_id ad5272_id[] = {
 	{ "ad5272-020", AD5272_020 },
 static struct i2c_driver ad5272_driver = {
 	.driver = {
 		.name	= "ad5272",
-		.of_match_table = of_match_ptr(ad5272_dt_ids),
+		.of_match_table = ad5272_dt_ids,
 	},
 	.probe		= ad5272_probe,
 	.id_table	= ad5272_id,

drivers/iio/potentiometer/ds1803.c+2−4

 #include <linux/i2c.h>
 #include <linux/iio/iio.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
 #define DS1803_MAX_POS		255
 #define DS1803_WRITE(chan)	(0xa8 | ((chan) + 1))
 	return devm_iio_device_register(dev, indio_dev);
 }
-#if defined(CONFIG_OF)
 static const struct of_device_id ds1803_dt_ids[] = {
 	{ .compatible = "maxim,ds1803-010", .data = &ds1803_cfg[DS1803_010] },
 	{ .compatible = "maxim,ds1803-050", .data = &ds1803_cfg[DS1803_050] },
 	{}
 };
 MODULE_DEVICE_TABLE(of, ds1803_dt_ids);
-#endif /* CONFIG_OF */
 static const struct i2c_device_id ds1803_id[] = {
 	{ "ds1803-010", DS1803_010 },
 static struct i2c_driver ds1803_driver = {
 	.driver = {
 		.name	= "ds1803",
-		.of_match_table = of_match_ptr(ds1803_dt_ids),
+		.of_match_table = ds1803_dt_ids,
 	},
 	.probe		= ds1803_probe,
 	.id_table	= ds1803_id,

drivers/iio/potentiometer/max5432.c+4−4

@@ -11,8 +11,8 @@ · 10 unmodified lines
11	#include <linux/iio/iio.h>	11	#include <linux/iio/iio.h>
12	#include <linux/limits.h>	12	#include <linux/limits.h>
13	#include <linux/module.h>	13	#include <linux/module.h>
14	#include <linux/of.h>	14	#include <linux/mod_devicetable.h>
15	#include <linux/of_device.h>	15	#include <linux/property.h>
16		16
17	/* All chip variants have 32 wiper positions. */	17	/* All chip variants have 32 wiper positions. */
18	#define MAX5432_MAX_POS 31	18	#define MAX5432_MAX_POS 31
@@ -100,7 +100,7 @@ static int max5432_probe(struct i2c_client *client, · 81 unmodified lines
100		100
101	data = iio_priv(indio_dev);	101	data = iio_priv(indio_dev);
102	data->client = client;	102	data->client = client;
103	data->ohm = (unsigned long)of_device_get_match_data(dev);	103	data->ohm = (unsigned long)device_get_match_data(dev);
104		104
105	indio_dev->info = &max5432_info;	105	indio_dev->info = &max5432_info;
106	indio_dev->channels = max5432_channels;	106	indio_dev->channels = max5432_channels;
@@ -122,7 +122,7 @@ MODULE_DEVICE_TABLE(of, max5432_dt_ids); · 15 unmodified lines
122	static struct i2c_driver max5432_driver = {	122	static struct i2c_driver max5432_driver = {
123	.driver = {	123	.driver = {
124	.name = "max5432",	124	.name = "max5432",
125	.of_match_table = of_match_ptr(max5432_dt_ids),	125	.of_match_table = max5432_dt_ids,
126	},	126	},
127	.probe = max5432_probe,	127	.probe = max5432_probe,
128	};	128	};

drivers/iio/potentiometer/max5481.c+4−19

  * https://datasheets.maximintegrated.com/en/ds/MAX5481-MAX5484.pdf
  */
-#include <linux/acpi.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
+#include <linux/property.h>
 #include <linux/spi/spi.h>
 /* write wiper reg */
 	.write_raw = max5481_write_raw,
 };
-#if defined(CONFIG_OF)
 static const struct of_device_id max5481_match[] = {
 	{ .compatible = "maxim,max5481", .data = &max5481_cfg[max5481] },
 	{ .compatible = "maxim,max5482", .data = &max5481_cfg[max5482] },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, max5481_match);
-#endif
 static int max5481_probe(struct spi_device *spi)
 {
 	data->spi = spi;
-	data->cfg = of_device_get_match_data(&spi->dev);
+	data->cfg = device_get_match_data(&spi->dev);
 	if (!data->cfg)
 		data->cfg = &max5481_cfg[id->driver_data];
 };
 MODULE_DEVICE_TABLE(spi, max5481_id_table);
-#if defined(CONFIG_ACPI)
-static const struct acpi_device_id max5481_acpi_match[] = {
-	{ "max5481", max5481 },
-	{ "max5482", max5482 },
-	{ "max5483", max5483 },
-	{ "max5484", max5484 },
-	{ }
-};
-MODULE_DEVICE_TABLE(acpi, max5481_acpi_match);
-#endif
 static struct spi_driver max5481_driver = {
 	.driver = {
 		.name  = "max5481",
-		.of_match_table = of_match_ptr(max5481_match),
+		.of_match_table = max5481_match,
-		.acpi_match_table = ACPI_PTR(max5481_acpi_match),
 	},
 	.probe = max5481_probe,
 	.remove = max5481_remove,

drivers/iio/potentiometer/mcp4018.c+4−8

 #include <linux/i2c.h>
 #include <linux/iio/iio.h>
 #include <linux/module.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
+#include <linux/property.h>
 #define MCP4018_WIPER_MAX 127
 };
 MODULE_DEVICE_TABLE(i2c, mcp4018_id);
-#ifdef CONFIG_OF
 #define MCP4018_COMPATIBLE(of_compatible, cfg) {	\
 	.compatible = of_compatible,			\
 	.data = &mcp4018_cfg[cfg],			\
 };
 MODULE_DEVICE_TABLE(of, mcp4018_of_match);
-#endif
 static int mcp4018_probe(struct i2c_client *client)
 {
 	struct device *dev = &client->dev;
 	i2c_set_clientdata(client, indio_dev);
 	data->client = client;
-	data->cfg = of_device_get_match_data(dev);
+	data->cfg = device_get_match_data(dev);
 	if (!data->cfg)
 		data->cfg = &mcp4018_cfg[i2c_match_id(mcp4018_id, client)->driver_data];
 static struct i2c_driver mcp4018_driver = {
 	.driver = {
 		.name	= "mcp4018",
-		.of_match_table = of_match_ptr(mcp4018_of_match),
+		.of_match_table = mcp4018_of_match,
 	},
 	.probe_new	= mcp4018_probe,
 	.id_table	= mcp4018_id,

drivers/iio/potentiometer/mcp4131.c+4−4

 #include <linux/iio/iio.h>
 #include <linux/iio/types.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/mutex.h>
-#include <linux/of.h>
+#include <linux/property.h>
-#include <linux/of_device.h>
 #include <linux/spi/spi.h>
 #define MCP4131_WRITE		(0x00 << 2)
 	data = iio_priv(indio_dev);
 	spi_set_drvdata(spi, indio_dev);
 	data->spi = spi;
-	data->cfg = of_device_get_match_data(&spi->dev);
+	data->cfg = device_get_match_data(&spi->dev);
 	if (!data->cfg) {
 		devid = spi_get_device_id(spi)->driver_data;
 		data->cfg = &mcp4131_cfg[devid];
 static struct spi_driver mcp4131_driver = {
 	.driver = {
 		.name	= "mcp4131",
-		.of_match_table = of_match_ptr(mcp4131_dt_ids),
+		.of_match_table = mcp4131_dt_ids,
 	},
 	.probe		= mcp4131_probe,
 	.id_table	= mcp4131_id,

drivers/iio/potentiometer/mcp4531.c+4−7

 #include <linux/module.h>
 #include <linux/i2c.h>
 #include <linux/err.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
-#include <linux/of_device.h>
+#include <linux/property.h>
 #include <linux/iio/iio.h>
 };
 MODULE_DEVICE_TABLE(i2c, mcp4531_id);
-#ifdef CONFIG_OF
 #define MCP4531_COMPATIBLE(of_compatible, cfg) {	\
 			.compatible = of_compatible,	\
 			.data = &mcp4531_cfg[cfg],	\
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, mcp4531_of_match);
-#endif
 static int mcp4531_probe(struct i2c_client *client)
 {
 	i2c_set_clientdata(client, indio_dev);
 	data->client = client;
-	data->cfg = of_device_get_match_data(dev);
+	data->cfg = device_get_match_data(dev);
 	if (!data->cfg)
 		data->cfg = &mcp4531_cfg[i2c_match_id(mcp4531_id, client)->driver_data];
 static struct i2c_driver mcp4531_driver = {
 	.driver = {
 		.name	= "mcp4531",
-		.of_match_table = of_match_ptr(mcp4531_of_match),
+		.of_match_table = mcp4531_of_match,
 	},
 	.probe_new	= mcp4531_probe,
 	.id_table	= mcp4531_id,

drivers/iio/potentiostat/lmp91000.c+5−6

 #include <linux/module.h>
 #include <linux/i2c.h>
 #include <linux/delay.h>
-#include <linux/of.h>
+#include <linux/mod_devicetable.h>
 #include <linux/regmap.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/buffer.h>
 static int lmp91000_read_config(struct lmp91000_data *data)
 {
 	struct device *dev = data->dev;
-	struct device_node *np = dev->of_node;
 	unsigned int reg, val;
 	int i, ret;
-	ret = of_property_read_u32(np, "ti,tia-gain-ohm", &val);
+	ret = device_property_read_u32(dev, "ti,tia-gain-ohm", &val);
 	if (ret) {
-		if (!of_property_read_bool(np, "ti,external-tia-resistor")) {
+		if (!device_property_read_bool(dev, "ti,external-tia-resistor")) {
 			dev_err(dev, "no ti,tia-gain-ohm defined and external resistor not specified\n");
 			return ret;
 		}
 		return ret;
 	}
-	ret = of_property_read_u32(np, "ti,rload-ohm", &val);
+	ret = device_property_read_u32(dev, "ti,rload-ohm", &val);
 	if (ret) {
 		val = 100;
 		dev_info(dev, "no ti,rload-ohm defined, default to %d\n", val);
 static struct i2c_driver lmp91000_driver = {
 	.driver = {
 		.name = LMP91000_DRV_NAME,
-		.of_match_table = of_match_ptr(lmp91000_of_match),
+		.of_match_table = lmp91000_of_match,
 	},
 	.probe = lmp91000_probe,
 	.remove = lmp91000_remove,

drivers/iio/pressure/cros_ec_baro.c+2−3

 	ret = cros_ec_sensors_core_init(pdev, indio_dev, true,
 					cros_ec_sensors_capture,
-					cros_ec_sensors_push_data);
+					cros_ec_sensors_push_data,
+					true);
 	if (ret)
 		return ret;
-	iio_buffer_set_attrs(indio_dev->buffer, cros_ec_sensor_fifo_attributes);
 	indio_dev->info = &cros_ec_baro_info;
 	state = iio_priv(indio_dev);
 	state->core.type = state->core.resp->info.type;

drivers/iio/pressure/icp10100.c+2−1

 #include <linux/device.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/i2c.h>
 #include <linux/pm_runtime.h>
 #include <linux/crc8.h>
 	.driver = {
 		.name = "icp10100",
 		.pm = &icp10100_pm,
-		.of_match_table = of_match_ptr(icp10100_of_match),
+		.of_match_table = icp10100_of_match,
 	},
 	.probe = icp10100_probe,
 	.id_table = icp10100_id,

drivers/iio/pressure/ms5611_i2c.c+2−4

 #include <linux/delay.h>
 #include <linux/i2c.h>
 #include <linux/module.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
 #include <asm/unaligned.h>
 	return ms5611_remove(i2c_get_clientdata(client));
 }
-#if defined(CONFIG_OF)
 static const struct of_device_id ms5611_i2c_matches[] = {
 	{ .compatible = "meas,ms5611" },
 	{ .compatible = "meas,ms5607" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ms5611_i2c_matches);
-#endif
 static const struct i2c_device_id ms5611_id[] = {
 	{ "ms5611", MS5611 },
 static struct i2c_driver ms5611_driver = {
 	.driver = {
 		.name = "ms5611",
-		.of_match_table = of_match_ptr(ms5611_i2c_matches)
+		.of_match_table = ms5611_i2c_matches,
 	},
 	.id_table = ms5611_id,
 	.probe = ms5611_i2c_probe,

drivers/iio/pressure/ms5611_spi.c+2−4

 #include <linux/delay.h>
 #include <linux/module.h>
 #include <linux/spi/spi.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
 #include <asm/unaligned.h>
 	return ms5611_remove(spi_get_drvdata(spi));
 }
-#if defined(CONFIG_OF)
 static const struct of_device_id ms5611_spi_matches[] = {
 	{ .compatible = "meas,ms5611" },
 	{ .compatible = "meas,ms5607" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, ms5611_spi_matches);
-#endif
 static const struct spi_device_id ms5611_id[] = {
 	{ "ms5611", MS5611 },
 static struct spi_driver ms5611_driver = {
 	.driver = {
 		.name = "ms5611",
-		.of_match_table = of_match_ptr(ms5611_spi_matches)
+		.of_match_table = ms5611_spi_matches
 	},
 	.id_table = ms5611_id,
 	.probe = ms5611_spi_probe,

drivers/iio/pressure/ms5637.c+2−1

 #include <linux/kernel.h>
 #include <linux/stat.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/i2c.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 	.id_table = ms5637_id,
 	.driver = {
 		   .name = "ms5637",
-		   .of_match_table = of_match_ptr(ms5637_of_match),
+		   .of_match_table = ms5637_of_match,
 		   },
 };

drivers/iio/pressure/zpa2326_i2c.c+2−4

 #include <linux/module.h>
 #include <linux/regmap.h>
 #include <linux/i2c.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
 #include "zpa2326.h"
 /*
 };
 MODULE_DEVICE_TABLE(i2c, zpa2326_i2c_ids);
-#if defined(CONFIG_OF)
 static const struct of_device_id zpa2326_i2c_matches[] = {
 	{ .compatible = "murata,zpa2326" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, zpa2326_i2c_matches);
-#endif
 static struct i2c_driver zpa2326_i2c_driver = {
 	.driver = {
 		.name           = "zpa2326-i2c",
-		.of_match_table = of_match_ptr(zpa2326_i2c_matches),
+		.of_match_table = zpa2326_i2c_matches,
 		.pm             = ZPA2326_PM_OPS,
 	},
 	.probe    = zpa2326_probe_i2c,

drivers/iio/pressure/zpa2326_spi.c+2−4

 #include <linux/module.h>
 #include <linux/regmap.h>
 #include <linux/spi/spi.h>
-#include <linux/of_device.h>
+#include <linux/mod_devicetable.h>
 #include "zpa2326.h"
 /*
 };
 MODULE_DEVICE_TABLE(spi, zpa2326_spi_ids);
-#if defined(CONFIG_OF)
 static const struct of_device_id zpa2326_spi_matches[] = {
 	{ .compatible = "murata,zpa2326" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, zpa2326_spi_matches);
-#endif
 static struct spi_driver zpa2326_spi_driver = {
 	.driver = {
 		.name           = "zpa2326-spi",
-		.of_match_table = of_match_ptr(zpa2326_spi_matches),
+		.of_match_table = zpa2326_spi_matches,
 		.pm             = ZPA2326_PM_OPS,
 	},
 	.probe    = zpa2326_probe_spi,

drivers/iio/proximity/as3935.c+21−23

  */
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
 static int as3935_probe(struct spi_device *spi)
 {
+	struct device *dev = &spi->dev;
 	struct iio_dev *indio_dev;
 	struct iio_trigger *trig;
 	struct as3935_state *st;
-	struct device_node *np = spi->dev.of_node;
 	int ret;
 	/* Be sure lightning event interrupt is specified */
 	if (!spi->irq) {
-		dev_err(&spi->dev, "unable to get event interrupt\n");
+		dev_err(dev, "unable to get event interrupt\n");
 		return -EINVAL;
 	}
-	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
+	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
 	if (!indio_dev)
 		return -ENOMEM;
 	spi_set_drvdata(spi, indio_dev);
 	mutex_init(&st->lock);
-	ret = of_property_read_u32(np,
+	ret = device_property_read_u32(dev,
 			"ams,tuning-capacitor-pf", &st->tune_cap);
 	if (ret) {
 		st->tune_cap = 0;
-		dev_warn(&spi->dev,
+		dev_warn(dev, "no tuning-capacitor-pf set, defaulting to %d",
-			"no tuning-capacitor-pf set, defaulting to %d",
 			st->tune_cap);
 	}
 	if (st->tune_cap > MAX_PF_CAP) {
-		dev_err(&spi->dev,
+		dev_err(dev, "wrong tuning-capacitor-pf setting of %d\n",
-			"wrong tuning-capacitor-pf setting of %d\n",
 			st->tune_cap);
 		return -EINVAL;
 	}
-	ret = of_property_read_u32(np,
+	ret = device_property_read_u32(dev,
 			"ams,nflwdth", &st->nflwdth_reg);
 	if (!ret && st->nflwdth_reg > AS3935_NFLWDTH_MASK) {
-		dev_err(&spi->dev,
+		dev_err(dev, "invalid nflwdth setting of %d\n",
-			"invalid nflwdth setting of %d\n",
 			st->nflwdth_reg);
 		return -EINVAL;
 	}
 	indio_dev->modes = INDIO_DIRECT_MODE;
 	indio_dev->info = &as3935_info;
-	trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
+	trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
 				      indio_dev->name, indio_dev->id);
 	if (!trig)
 	iio_trigger_set_drvdata(trig, indio_dev);
 	trig->ops = &iio_interrupt_trigger_ops;
-	ret = devm_iio_trigger_register(&spi->dev, trig);
+	ret = devm_iio_trigger_register(dev, trig);
 	if (ret) {
-		dev_err(&spi->dev, "failed to register trigger\n");
+		dev_err(dev, "failed to register trigger\n");
 		return ret;
 	}
-	ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
+	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
 					      iio_pollfunc_store_time,
 					      as3935_trigger_handler, NULL);
 	if (ret) {
-		dev_err(&spi->dev, "cannot setup iio trigger\n");
+		dev_err(dev, "cannot setup iio trigger\n");
 		return ret;
 	}
 	calibrate_as3935(st);
 	INIT_DELAYED_WORK(&st->work, as3935_event_work);
-	ret = devm_add_action(&spi->dev, as3935_stop_work, indio_dev);
+	ret = devm_add_action(dev, as3935_stop_work, indio_dev);
 	if (ret)
 		return ret;
-	ret = devm_request_irq(&spi->dev, spi->irq,
+	ret = devm_request_irq(dev, spi->irq,
 				&as3935_interrupt_handler,
 				IRQF_TRIGGER_RISING,
-				dev_name(&spi->dev),
+				dev_name(dev),
 				indio_dev);
 	if (ret) {
-		dev_err(&spi->dev, "unable to request irq\n");
+		dev_err(dev, "unable to request irq\n");
 		return ret;
 	}
-	ret = devm_iio_device_register(&spi->dev, indio_dev);
+	ret = devm_iio_device_register(dev, indio_dev);
 	if (ret < 0) {
-		dev_err(&spi->dev, "unable to register device\n");
+		dev_err(dev, "unable to register device\n");
 		return ret;
 	}
 	return 0;
 static struct spi_driver as3935_driver = {
 	.driver = {
 		.name	= "as3935",
-		.of_match_table = of_match_ptr(as3935_of_match),
+		.of_match_table = as3935_of_match,
 		.pm	= AS3935_PM_OPS,
 	},
 	.probe		= as3935_probe,

drivers/iio/proximity/pulsedlight-lidar-lite-v2.c+2−1

 #include <linux/i2c.h>
 #include <linux/delay.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/pm_runtime.h>
 #include <linux/iio/iio.h>
 #include <linux/iio/sysfs.h>
 static struct i2c_driver lidar_driver = {
 	.driver = {
 		.name	= LIDAR_DRV_NAME,
-		.of_match_table	= of_match_ptr(lidar_dt_ids),
+		.of_match_table	= lidar_dt_ids,
 		.pm	= &lidar_pm_ops,
 	},
 	.probe		= lidar_probe,

drivers/iio/proximity/sx9310.c+218−209

@@ -6,19 +6,21 @@ · 5 unmodified lines
6	* Based on SX9500 driver and Semtech driver using the input framework	6	* Based on SX9500 driver and Semtech driver using the input framework
7	* <https://my.syncplicity.com/share/teouwsim8niiaud/	7	* <https://my.syncplicity.com/share/teouwsim8niiaud/
8	* linux-driver-SX9310_NoSmartHSensing>.	8	* linux-driver-SX9310_NoSmartHSensing>.
9	* Reworked April 2019 by Evan Green <evgreen@chromium.org>	9	* Reworked in April 2019 by Evan Green <evgreen@chromium.org>
10	* and January 2020 by Daniel Campello <campello@chromium.org>	10	* and in January 2020 by Daniel Campello <campello@chromium.org>.
11	*/	11	*/
12		12
13	#include <linux/acpi.h>	13	#include <linux/acpi.h>
		14	#include <linux/bitfield.h>
14	#include <linux/delay.h>	15	#include <linux/delay.h>
15	#include <linux/i2c.h>	16	#include <linux/i2c.h>
16	#include <linux/irq.h>	17	#include <linux/irq.h>
17	#include <linux/kernel.h>	18	#include <linux/kernel.h>
		19	#include <linux/mod_devicetable.h>
18	#include <linux/module.h>	20	#include <linux/module.h>
19	#include <linux/of.h>
20	#include <linux/pm.h>	21	#include <linux/pm.h>
21	#include <linux/regmap.h>	22	#include <linux/regmap.h>
		23	#include <linux/regulator/consumer.h>
22	#include <linux/slab.h>	24	#include <linux/slab.h>
23		25
24	#include <linux/iio/buffer.h>	26	#include <linux/iio/buffer.h>
@@ -33,45 +35,44 @@ · 8 unmodified lines
33	#define SX9310_REG_IRQ_SRC 0x00	35	#define SX9310_REG_IRQ_SRC 0x00
34	#define SX9310_REG_STAT0 0x01	36	#define SX9310_REG_STAT0 0x01
35	#define SX9310_REG_STAT1 0x02	37	#define SX9310_REG_STAT1 0x02
		38	#define SX9310_REG_STAT1_COMPSTAT_MASK GENMASK(3, 0)
36	#define SX9310_REG_IRQ_MSK 0x03	39	#define SX9310_REG_IRQ_MSK 0x03
37	#define SX9310_CONVDONE_IRQ BIT(3)	40	#define SX9310_CONVDONE_IRQ BIT(3)
38	#define SX9310_FAR_IRQ BIT(5)	41	#define SX9310_FAR_IRQ BIT(5)
39	#define SX9310_CLOSE_IRQ BIT(6)	42	#define SX9310_CLOSE_IRQ BIT(6)
40	#define SX9310_EVENT_IRQ (SX9310_FAR_IRQ \| \
41	SX9310_CLOSE_IRQ)
42	#define SX9310_REG_IRQ_FUNC 0x04	43	#define SX9310_REG_IRQ_FUNC 0x04
43		44
44	#define SX9310_REG_PROX_CTRL0 0x10	45	#define SX9310_REG_PROX_CTRL0 0x10
45	#define SX9310_REG_PROX_CTRL0_PROXSTAT2 0x10	46	#define SX9310_REG_PROX_CTRL0_SENSOREN_MASK GENMASK(3, 0)
46	#define SX9310_REG_PROX_CTRL0_EN_MASK 0x0F	47	#define SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK GENMASK(7, 4)
		48	#define SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS 0x01
47	#define SX9310_REG_PROX_CTRL1 0x11	49	#define SX9310_REG_PROX_CTRL1 0x11
48	#define SX9310_REG_PROX_CTRL2 0x12	50	#define SX9310_REG_PROX_CTRL2 0x12
49	#define SX9310_REG_PROX_CTRL2_COMBMODE_ALL 0x80	51	#define SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 (0x02 << 6)
50	#define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC 0x04	52	#define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC (0x01 << 2)
51	#define SX9310_REG_PROX_CTRL3 0x13	53	#define SX9310_REG_PROX_CTRL3 0x13
52	#define SX9310_REG_PROX_CTRL3_GAIN0_X8 0x0c	54	#define SX9310_REG_PROX_CTRL3_GAIN0_X8 (0x03 << 2)
53	#define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02	55	#define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02
54	#define SX9310_REG_PROX_CTRL4 0x14	56	#define SX9310_REG_PROX_CTRL4 0x14
55	#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07	57	#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07
56	#define SX9310_REG_PROX_CTRL5 0x15	58	#define SX9310_REG_PROX_CTRL5 0x15
57	#define SX9310_REG_PROX_CTRL5_RANGE_SMALL 0xc0	59	#define SX9310_REG_PROX_CTRL5_RANGE_SMALL (0x03 << 6)
58	#define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 0x04	60	#define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 (0x01 << 2)
59	#define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02	61	#define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02
60	#define SX9310_REG_PROX_CTRL6 0x16	62	#define SX9310_REG_PROX_CTRL6 0x16
61	#define SX9310_REG_PROX_CTRL6_COMP_COMMON 0x20	63	#define SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT 0x20
62	#define SX9310_REG_PROX_CTRL7 0x17	64	#define SX9310_REG_PROX_CTRL7 0x17
63	#define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 0x08	65	#define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 (0x01 << 3)
64	#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05	66	#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05
65	#define SX9310_REG_PROX_CTRL8 0x18	67	#define SX9310_REG_PROX_CTRL8 0x18
66	#define SX9310_REG_PROX_CTRL9 0x19	68	#define SX9310_REG_PROX_CTRL9 0x19
67	#define SX9310_REG_PROX_CTRL8_9_PTHRESH12_28 0x40	69	#define SX9310_REG_PROX_CTRL8_9_PTHRESH_28 (0x08 << 3)
68	#define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 0x88	70	#define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 (0x11 << 3)
69	#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03	71	#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03
70	#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05	72	#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05
71	#define SX9310_REG_PROX_CTRL10 0x1a	73	#define SX9310_REG_PROX_CTRL10 0x1a
72	#define SX9310_REG_PROX_CTRL10_HYST_6PCT 0x10	74	#define SX9310_REG_PROX_CTRL10_HYST_6PCT (0x01 << 4)
73	#define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_8 0x12	75	#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 0x01
74	#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_8 0x03
75	#define SX9310_REG_PROX_CTRL11 0x1b	76	#define SX9310_REG_PROX_CTRL11 0x1b
76	#define SX9310_REG_PROX_CTRL12 0x1c	77	#define SX9310_REG_PROX_CTRL12 0x1c
77	#define SX9310_REG_PROX_CTRL13 0x1d	78	#define SX9310_REG_PROX_CTRL13 0x1d
@@ -82,8 +83,8 @@ · 4 unmodified lines
82	#define SX9310_REG_PROX_CTRL18 0x22	83	#define SX9310_REG_PROX_CTRL18 0x22
83	#define SX9310_REG_PROX_CTRL19 0x23	84	#define SX9310_REG_PROX_CTRL19 0x23
84	#define SX9310_REG_SAR_CTRL0 0x2a	85	#define SX9310_REG_SAR_CTRL0 0x2a
85	#define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES 0x40	86	#define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES (0x02 << 5)
86	#define SX9310_REG_SAR_CTRL0_SARHYST_8 0x10	87	#define SX9310_REG_SAR_CTRL0_SARHYST_8 (0x02 << 3)
87	#define SX9310_REG_SAR_CTRL1 0x2b	88	#define SX9310_REG_SAR_CTRL1 0x2b
88	/* Each increment of the slope register is 0.0078125. */	89	/* Each increment of the slope register is 0.0078125. */
89	#define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125)	90	#define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125)
@@ -91,39 +92,28 @@ · 1 unmodified line
91	#define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c	92	#define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c
92		93
93	#define SX9310_REG_SENSOR_SEL 0x30	94	#define SX9310_REG_SENSOR_SEL 0x30
94
95	#define SX9310_REG_USE_MSB 0x31	95	#define SX9310_REG_USE_MSB 0x31
96	#define SX9310_REG_USE_LSB 0x32	96	#define SX9310_REG_USE_LSB 0x32
97
98	#define SX9310_REG_AVG_MSB 0x33	97	#define SX9310_REG_AVG_MSB 0x33
99	#define SX9310_REG_AVG_LSB 0x34	98	#define SX9310_REG_AVG_LSB 0x34
100
101	#define SX9310_REG_DIFF_MSB 0x35	99	#define SX9310_REG_DIFF_MSB 0x35
102	#define SX9310_REG_DIFF_LSB 0x36	100	#define SX9310_REG_DIFF_LSB 0x36
103
104	#define SX9310_REG_OFFSET_MSB 0x37	101	#define SX9310_REG_OFFSET_MSB 0x37
105	#define SX9310_REG_OFFSET_LSB 0x38	102	#define SX9310_REG_OFFSET_LSB 0x38
106
107	#define SX9310_REG_SAR_MSB 0x39	103	#define SX9310_REG_SAR_MSB 0x39
108	#define SX9310_REG_SAR_LSB 0x3a	104	#define SX9310_REG_SAR_LSB 0x3a
109		105	#define SX9310_REG_I2C_ADDR 0x40
110	#define SX9310_REG_I2CADDR 0x40
111	#define SX9310_REG_PAUSE 0x41	106	#define SX9310_REG_PAUSE 0x41
112	#define SX9310_REG_WHOAMI 0x42	107	#define SX9310_REG_WHOAMI 0x42
113	#define SX9310_WHOAMI_VALUE 0x01	108	#define SX9310_WHOAMI_VALUE 0x01
114	#define SX9311_WHOAMI_VALUE 0x02	109	#define SX9311_WHOAMI_VALUE 0x02
115
116	#define SX9310_REG_RESET 0x7f	110	#define SX9310_REG_RESET 0x7f
117	#define SX9310_SOFT_RESET 0xde	111	#define SX9310_SOFT_RESET 0xde
118		112
119	#define SX9310_SCAN_PERIOD_MASK GENMASK(7, 4)
120	#define SX9310_SCAN_PERIOD_SHIFT 4
121
122	#define SX9310_COMPSTAT_MASK GENMASK(3, 0)
123		113
124	/* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */	114	/* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */
125	#define SX9310_NUM_CHANNELS 4	115	#define SX9310_NUM_CHANNELS 4
126	#define SX9310_CHAN_ENABLED_MASK GENMASK(3, 0)	116	static_assert(SX9310_NUM_CHANNELS < BITS_PER_LONG);
127		117
128	struct sx9310_data {	118	struct sx9310_data {
129	/* Serialize access to registers and channel configuration */	119	/* Serialize access to registers and channel configuration */
@@ -131,20 +121,24 @@ struct sx9310_data { · 1 unmodified line
131	struct i2c_client *client;	121	struct i2c_client *client;
132	struct iio_trigger *trig;	122	struct iio_trigger *trig;
133	struct regmap *regmap;	123	struct regmap *regmap;
		124	struct regulator_bulk_data supplies[2];
134	/*	125	/*
135	* Last reading of the proximity status for each channel.	126	* Last reading of the proximity status for each channel.
136	* We only send an event to user space when this changes.	127	* We only send an event to user space when this changes.
137	*/	128	*/
138	bool prox_stat[SX9310_NUM_CHANNELS];	129	unsigned long chan_prox_stat;
139	bool trigger_enabled;	130	bool trigger_enabled;
140	__be16 buffer[SX9310_NUM_CHANNELS +	131	/* Ensure correct alignment of timestamp when present. */
141	4]; /* 64-bit data + 64-bit timestamp */	132	struct {
		133	__be16 channels[SX9310_NUM_CHANNELS];
		134	s64 ts __aligned(8);
		135	} buffer;
142	/* Remember enabled channels and sample rate during suspend. */	136	/* Remember enabled channels and sample rate during suspend. */
143	unsigned int suspend_ctrl0;	137	unsigned int suspend_ctrl0;
144	struct completion completion;	138	struct completion completion;
145	unsigned int chan_read, chan_event;	139	unsigned long chan_read;
146	int channel_users[SX9310_NUM_CHANNELS];	140	unsigned long chan_event;
147	int whoami;	141	unsigned int whoami;
148	};	142	};
149		143
150	static const struct iio_event_spec sx9310_events[] = {	144	static const struct iio_event_spec sx9310_events[] = {
@@ -251,7 +245,7 @@ static const struct regmap_range sx9310_readable_reg_ranges[] = { · 100 unmodified lines
251	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),	245	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
252	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),	246	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
253	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),	247	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),
254	regmap_reg_range(SX9310_REG_I2CADDR, SX9310_REG_WHOAMI),	248	regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI),
255	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),	249	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
256	};	250	};
257		251
@@ -285,15 +279,16 @@ static const struct regmap_config sx9310_regmap_config = { · 27 unmodified lines
285	};	279	};
286		280
287	static int sx9310_update_chan_en(struct sx9310_data *data,	281	static int sx9310_update_chan_en(struct sx9310_data *data,
288	unsigned int chan_read,	282	unsigned long chan_read,
289	unsigned int chan_event)	283	unsigned long chan_event)
290	{	284	{
291	int ret;	285	int ret;
		286	unsigned long channels = chan_read \| chan_event;
292		287
293	if ((data->chan_read \| data->chan_event) != (chan_read \| chan_event)) {	288	if ((data->chan_read \| data->chan_event) != channels) {
294	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0,	289	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0,
295	SX9310_CHAN_ENABLED_MASK,	290	SX9310_REG_PROX_CTRL0_SENSOREN_MASK,
296	chan_read \| chan_event);	291	channels);
297	if (ret)	292	if (ret)
298	return ret;	293	return ret;
299	}	294	}
@@ -328,11 +323,15 @@ static int sx9310_put_event_channel(struct sx9310_data *data, int channel) · 28 unmodified lines
328		323
329	static int sx9310_enable_irq(struct sx9310_data *data, unsigned int irq)	324	static int sx9310_enable_irq(struct sx9310_data *data, unsigned int irq)
330	{	325	{
		326	if (!data->client->irq)
		327	return 0;
331	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, irq);	328	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, irq);
332	}	329	}
333		330
334	static int sx9310_disable_irq(struct sx9310_data *data, unsigned int irq)	331	static int sx9310_disable_irq(struct sx9310_data *data, unsigned int irq)
335	{	332	{
		333	if (!data->client->irq)
		334	return 0;
336	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, 0);	335	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, 0);
337	}	336	}
338		337
@@ -342,10 +341,10 @@ static int sx9310_read_prox_data(struct sx9310_data *data, · 3 unmodified lines
342	int ret;	341	int ret;
343		342
344	ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);	343	ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);
345	if (ret < 0)	344	if (ret)
346	return ret;	345	return ret;
347		346
348	return regmap_bulk_read(data->regmap, chan->address, val, 2);	347	return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
349	}	348	}
350		349
351	/*	350	/*
@@ -358,10 +357,10 @@ static int sx9310_wait_for_sample(struct sx9310_data *data) · 6 unmodified lines
358	unsigned int val;	357	unsigned int val;
359		358
360	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);	359	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);
361	if (ret < 0)	360	if (ret)
362	return ret;	361	return ret;
363		362
364	val = (val & SX9310_SCAN_PERIOD_MASK) >> SX9310_SCAN_PERIOD_SHIFT;	363	val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val);
365		364
366	msleep(sx9310_scan_period_table[val]);	365	msleep(sx9310_scan_period_table[val]);
367		366
@@ -371,22 +370,22 @@ static int sx9310_wait_for_sample(struct sx9310_data *data) · 3 unmodified lines
371	static int sx9310_read_proximity(struct sx9310_data *data,	370	static int sx9310_read_proximity(struct sx9310_data *data,
372	const struct iio_chan_spec chan, int val)	371	const struct iio_chan_spec chan, int val)
373	{	372	{
374	int ret = 0;	373	int ret;
375	__be16 rawval;	374	__be16 rawval;
376		375
377	mutex_lock(&data->mutex);	376	mutex_lock(&data->mutex);
378		377
379	ret = sx9310_get_read_channel(data, chan->channel);	378	ret = sx9310_get_read_channel(data, chan->channel);
380	if (ret < 0)	379	if (ret)
381	goto out;	380	goto out;
382		381
383	ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);	382	ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
384	if (ret < 0)	383	if (ret)
385	goto out_put_channel;	384	goto out_put_channel;
386		385
387	mutex_unlock(&data->mutex);	386	mutex_unlock(&data->mutex);
388		387
389	if (data->client->irq > 0) {	388	if (data->client->irq) {
390	ret = wait_for_completion_interruptible(&data->completion);	389	ret = wait_for_completion_interruptible(&data->completion);
391	reinit_completion(&data->completion);	390	reinit_completion(&data->completion);
392	} else {	391	} else {
@@ -395,22 +394,22 @@ static int sx9310_read_proximity(struct sx9310_data *data, · 2 unmodified lines
395		394
396	mutex_lock(&data->mutex);	395	mutex_lock(&data->mutex);
397		396
398	if (ret < 0)	397	if (ret)
399	goto out_disable_irq;	398	goto out_disable_irq;
400		399
401	ret = sx9310_read_prox_data(data, chan, &rawval);	400	ret = sx9310_read_prox_data(data, chan, &rawval);
402	if (ret < 0)	401	if (ret)
403	goto out_disable_irq;	402	goto out_disable_irq;
404		403
405	*val = sign_extend32(be16_to_cpu(rawval),	404	*val = sign_extend32(be16_to_cpu(rawval),
406	(chan->address == SX9310_REG_DIFF_MSB ? 11 : 15));	405	chan->address == SX9310_REG_DIFF_MSB ? 11 : 15);
407		406
408	ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);	407	ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
409	if (ret < 0)	408	if (ret)
410	goto out_put_channel;	409	goto out_put_channel;
411		410
412	ret = sx9310_put_read_channel(data, chan->channel);	411	ret = sx9310_put_read_channel(data, chan->channel);
413	if (ret < 0)	412	if (ret)
414	goto out;	413	goto out;
415		414
416	mutex_unlock(&data->mutex);	415	mutex_unlock(&data->mutex);
@@ -430,12 +429,13 @@ out: · 13 unmodified lines
430	static int sx9310_read_samp_freq(struct sx9310_data data, int val, int *val2)	429	static int sx9310_read_samp_freq(struct sx9310_data data, int val, int *val2)
431	{	430	{
432	unsigned int regval;	431	unsigned int regval;
433	int ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval);	432	int ret;
434		433
435	if (ret < 0)	434	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval);
		435	if (ret)
436	return ret;	436	return ret;
437		437
438	regval = (regval & SX9310_SCAN_PERIOD_MASK) >> SX9310_SCAN_PERIOD_SHIFT;	438	regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval);
439	*val = sx9310_samp_freq_table[regval].val;	439	*val = sx9310_samp_freq_table[regval].val;
440	*val2 = sx9310_samp_freq_table[regval].val2;	440	*val2 = sx9310_samp_freq_table[regval].val2;
441		441
@@ -482,9 +482,10 @@ static int sx9310_set_samp_freq(struct sx9310_data *data, int val, int val2) · 40 unmodified lines
482		482
483	mutex_lock(&data->mutex);	483	mutex_lock(&data->mutex);
484		484
485	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0,	485	ret = regmap_update_bits(
486	SX9310_SCAN_PERIOD_MASK,	486	data->regmap, SX9310_REG_PROX_CTRL0,
487	i << SX9310_SCAN_PERIOD_SHIFT);	487	SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK,
		488	FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));
488		489
489	mutex_unlock(&data->mutex);	490	mutex_unlock(&data->mutex);
490		491
@@ -515,10 +516,9 @@ static irqreturn_t sx9310_irq_handler(int irq, void *private) · 24 unmodified lines
515	iio_trigger_poll(data->trig);	516	iio_trigger_poll(data->trig);
516		517
517	/*	518	/*
518	* Even if no event is enabled, we need to wake the thread to	519	* Even if no event is enabled, we need to wake the thread to clear the
519	* clear the interrupt state by reading SX9310_REG_IRQ_SRC. It	520	* interrupt state by reading SX9310_REG_IRQ_SRC.
520	* is not possible to do that here because regmap_read takes a	521	* It is not possible to do that here because regmap_read takes a mutex.
521	* mutex.
522	*/	522	*/
523	return IRQ_WAKE_THREAD;	523	return IRQ_WAKE_THREAD;
524	}	524	}
@@ -529,32 +529,32 @@ static void sx9310_push_events(struct iio_dev *indio_dev) · 4 unmodified lines
529	unsigned int val, chan;	529	unsigned int val, chan;
530	struct sx9310_data *data = iio_priv(indio_dev);	530	struct sx9310_data *data = iio_priv(indio_dev);
531	s64 timestamp = iio_get_time_ns(indio_dev);	531	s64 timestamp = iio_get_time_ns(indio_dev);
		532	unsigned long prox_changed;
532		533
533	/* Read proximity state on all channels */	534	/* Read proximity state on all channels */
534	ret = regmap_read(data->regmap, SX9310_REG_STAT0, &val);	535	ret = regmap_read(data->regmap, SX9310_REG_STAT0, &val);
535	if (ret < 0) {	536	if (ret) {
536	dev_err(&data->client->dev, "i2c transfer error in irq\n");	537	dev_err(&data->client->dev, "i2c transfer error in irq\n");
537	return;	538	return;
538	}	539	}
539		540
540	for (chan = 0; chan < SX9310_NUM_CHANNELS; chan++) {	541	/*
		542	* Only iterate over channels with changes on proximity status that have
		543	* events enabled.
		544	*/
		545	prox_changed = (data->chan_prox_stat ^ val) & data->chan_event;
		546
		547	for_each_set_bit(chan, &prox_changed, SX9310_NUM_CHANNELS) {
541	int dir;	548	int dir;
542	u64 ev;	549	u64 ev;
543	bool new_prox = val & BIT(chan);
544		550
545	if (!(data->chan_event & BIT(chan)))	551	dir = (val & BIT(chan)) ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
546	continue;
547	if (new_prox == data->prox_stat[chan])
548	/* No change on this channel. */
549	continue;
550
551	dir = new_prox ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
552	ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,	552	ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
553	IIO_EV_TYPE_THRESH, dir);	553	IIO_EV_TYPE_THRESH, dir);
554		554
555	iio_push_event(indio_dev, ev, timestamp);	555	iio_push_event(indio_dev, ev, timestamp);
556	data->prox_stat[chan] = new_prox;
557	}	556	}
		557	data->chan_prox_stat = val;
558	}	558	}
559		559
560	static irqreturn_t sx9310_irq_thread_handler(int irq, void *private)	560	static irqreturn_t sx9310_irq_thread_handler(int irq, void *private)
@@ -567,12 +567,12 @@ static irqreturn_t sx9310_irq_thread_handler(int irq, void *private) · 6 unmodified lines
567	mutex_lock(&data->mutex);	567	mutex_lock(&data->mutex);
568		568
569	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);	569	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
570	if (ret < 0) {	570	if (ret) {
571	dev_err(&data->client->dev, "i2c transfer error in irq\n");	571	dev_err(&data->client->dev, "i2c transfer error in irq\n");
572	goto out;	572	goto out;
573	}	573	}
574		574
575	if (val & SX9310_EVENT_IRQ)	575	if (val & (SX9310_FAR_IRQ \| SX9310_CLOSE_IRQ))
576	sx9310_push_events(indio_dev);	576	sx9310_push_events(indio_dev);
577		577
578	if (val & SX9310_CONVDONE_IRQ)	578	if (val & SX9310_CONVDONE_IRQ)
@@ -600,6 +600,7 @@ static int sx9310_write_event_config(struct iio_dev *indio_dev, · 21 unmodified lines
600	enum iio_event_direction dir, int state)	600	enum iio_event_direction dir, int state)
601	{	601	{
602	struct sx9310_data *data = iio_priv(indio_dev);	602	struct sx9310_data *data = iio_priv(indio_dev);
		603	unsigned int eventirq = SX9310_FAR_IRQ \| SX9310_CLOSE_IRQ;
603	int ret;	604	int ret;
604		605
605	/* If the state hasn't changed, there's nothing to do. */	606	/* If the state hasn't changed, there's nothing to do. */
@@ -609,20 +610,20 @@ static int sx9310_write_event_config(struct iio_dev *indio_dev, · 3 unmodified lines
609	mutex_lock(&data->mutex);	610	mutex_lock(&data->mutex);
610	if (state) {	611	if (state) {
611	ret = sx9310_get_event_channel(data, chan->channel);	612	ret = sx9310_get_event_channel(data, chan->channel);
612	if (ret < 0)	613	if (ret)
613	goto out_unlock;	614	goto out_unlock;
614	if (!(data->chan_event & ~BIT(chan->channel))) {	615	if (!(data->chan_event & ~BIT(chan->channel))) {
615	ret = sx9310_enable_irq(data, SX9310_EVENT_IRQ);	616	ret = sx9310_enable_irq(data, eventirq);
616	if (ret < 0)	617	if (ret)
617	sx9310_put_event_channel(data, chan->channel);	618	sx9310_put_event_channel(data, chan->channel);
618	}	619	}
619	} else {	620	} else {
620	ret = sx9310_put_event_channel(data, chan->channel);	621	ret = sx9310_put_event_channel(data, chan->channel);
621	if (ret < 0)	622	if (ret)
622	goto out_unlock;	623	goto out_unlock;
623	if (!data->chan_event) {	624	if (!data->chan_event) {
624	ret = sx9310_disable_irq(data, SX9310_EVENT_IRQ);	625	ret = sx9310_disable_irq(data, eventirq);
625	if (ret < 0)	626	if (ret)
626	sx9310_get_event_channel(data, chan->channel);	627	sx9310_get_event_channel(data, chan->channel);
627	}	628	}
628	}	629	}
@@ -634,7 +635,7 @@ out_unlock: · 5 unmodified lines
634		635
635	static struct attribute *sx9310_attributes[] = {	636	static struct attribute *sx9310_attributes[] = {
636	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,	637	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
637	NULL,	638	NULL
638	};	639	};
639		640
640	static const struct attribute_group sx9310_attribute_group = {	641	static const struct attribute_group sx9310_attribute_group = {
@@ -661,7 +662,7 @@ static int sx9310_set_trigger_state(struct iio_trigger *trig, bool state) · 20 unmodified lines
661	ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);	662	ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
662	else if (!data->chan_read)	663	else if (!data->chan_read)
663	ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);	664	ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
664	if (ret < 0)	665	if (ret)
665	goto out;	666	goto out;
666		667
667	data->trigger_enabled = state;	668	data->trigger_enabled = state;
@@ -690,13 +691,13 @@ static irqreturn_t sx9310_trigger_handler(int irq, void *private) · 22 unmodified lines
690	indio_dev->masklength) {	691	indio_dev->masklength) {
691	ret = sx9310_read_prox_data(data, &indio_dev->channels[bit],	692	ret = sx9310_read_prox_data(data, &indio_dev->channels[bit],
692	&val);	693	&val);
693	if (ret < 0)	694	if (ret)
694	goto out;	695	goto out;
695		696
696	data->buffer[i++] = val;	697	data->buffer.channels[i++] = val;
697	}	698	}
698		699
699	iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,	700	iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
700	pf->timestamp);	701	pf->timestamp);
701		702
702	out:	703	out:
@@ -710,13 +711,13 @@ out: · 7 unmodified lines
710	static int sx9310_buffer_preenable(struct iio_dev *indio_dev)	711	static int sx9310_buffer_preenable(struct iio_dev *indio_dev)
711	{	712	{
712	struct sx9310_data *data = iio_priv(indio_dev);	713	struct sx9310_data *data = iio_priv(indio_dev);
713	unsigned int channels = 0;	714	unsigned long channels = 0;
714	int bit, ret;	715	int bit, ret;
715		716
716	mutex_lock(&data->mutex);	717	mutex_lock(&data->mutex);
717	for_each_set_bit(bit, indio_dev->active_scan_mask,	718	for_each_set_bit(bit, indio_dev->active_scan_mask,
718	indio_dev->masklength)	719	indio_dev->masklength)
719	channels \|= BIT(indio_dev->channels[bit].channel);	720	__set_bit(indio_dev->channels[bit].channel, &channels);
720		721
721	ret = sx9310_update_chan_en(data, channels, data->chan_event);	722	ret = sx9310_update_chan_en(data, channels, data->chan_event);
722	mutex_unlock(&data->mutex);	723	mutex_unlock(&data->mutex);
@@ -744,89 +745,77 @@ struct sx9310_reg_default { · 21 unmodified lines
744	u8 def;	745	u8 def;
745	};	746	};
746		747
747	#define SX_INIT(_reg, _def) \
748	{ \
749	.reg = SX9310_REG_##_reg, \
750	.def = _def, \
751	}
752
753	static const struct sx9310_reg_default sx9310_default_regs[] = {	748	static const struct sx9310_reg_default sx9310_default_regs[] = {
754	SX_INIT(IRQ_MSK, 0x00),	749	{ SX9310_REG_IRQ_MSK, 0x00 },
755	SX_INIT(IRQ_FUNC, 0x00),	750	{ SX9310_REG_IRQ_FUNC, 0x00 },
756	/*	751	/*
757	* The lower 4 bits should not be set as it enable sensors measurements.	752	* The lower 4 bits should not be set as it enable sensors measurements.
758	* Turning the detection on before the configuration values are set to	753	* Turning the detection on before the configuration values are set to
759	* good values can cause the device to return erroneous readings.	754	* good values can cause the device to return erroneous readings.
760	*/	755	*/
761	SX_INIT(PROX_CTRL0, SX9310_REG_PROX_CTRL0_PROXSTAT2),	756	{ SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS },
762	SX_INIT(PROX_CTRL1, 0x00),	757	{ SX9310_REG_PROX_CTRL1, 0x00 },
763	SX_INIT(PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_ALL \|	758	{ SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 \|
764	SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC),	759	SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC },
765	SX_INIT(PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 \|	760	{ SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 \|
766	SX9310_REG_PROX_CTRL3_GAIN12_X4),	761	SX9310_REG_PROX_CTRL3_GAIN12_X4 },
767	SX_INIT(PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST),	762	{ SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST },
768	SX_INIT(PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL \|	763	{ SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL \|
769	SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 \|	764	SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 \|
770	SX9310_REG_PROX_CTRL5_RAWFILT_1P25),	765	SX9310_REG_PROX_CTRL5_RAWFILT_1P25 },
771	SX_INIT(PROX_CTRL6, SX9310_REG_PROX_CTRL6_COMP_COMMON),	766	{ SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT },
772	SX_INIT(PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 \|	767	{ SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 \|
773	SX9310_REG_PROX_CTRL7_AVGPOSFILT_512),	768	SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 },
774	SX_INIT(PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 \|	769	{ SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 \|
775	SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500),	770	SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 },
776	SX_INIT(PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH12_28 \|	771	{ SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 \|
777	SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900),	772	SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 },
778	SX_INIT(PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT \|	773	{ SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT \|
779	SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_8 \|	774	SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 },
780	SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_8),	775	{ SX9310_REG_PROX_CTRL11, 0x00 },
781	SX_INIT(PROX_CTRL11, 0x00),	776	{ SX9310_REG_PROX_CTRL12, 0x00 },
782	SX_INIT(PROX_CTRL12, 0x00),	777	{ SX9310_REG_PROX_CTRL13, 0x00 },
783	SX_INIT(PROX_CTRL13, 0x00),	778	{ SX9310_REG_PROX_CTRL14, 0x00 },
784	SX_INIT(PROX_CTRL14, 0x00),	779	{ SX9310_REG_PROX_CTRL15, 0x00 },
785	SX_INIT(PROX_CTRL15, 0x00),	780	{ SX9310_REG_PROX_CTRL16, 0x00 },
786	SX_INIT(PROX_CTRL16, 0x00),	781	{ SX9310_REG_PROX_CTRL17, 0x00 },
787	SX_INIT(PROX_CTRL17, 0x00),	782	{ SX9310_REG_PROX_CTRL18, 0x00 },
788	SX_INIT(PROX_CTRL18, 0x00),	783	{ SX9310_REG_PROX_CTRL19, 0x00 },
789	SX_INIT(PROX_CTRL19, 0x00),	784	{ SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES \|
790	SX_INIT(SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES \|	785	SX9310_REG_SAR_CTRL0_SARHYST_8 },
791	SX9310_REG_SAR_CTRL0_SARHYST_8),	786	{ SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) },
792	SX_INIT(SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250)),	787	{ SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT },
793	SX_INIT(SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT),
794	};	788	};
795		789
796	/* Activate all channels and perform an initial compensation. */	790	/* Activate all channels and perform an initial compensation. */
797	static int sx9310_init_compensation(struct iio_dev *indio_dev)	791	static int sx9310_init_compensation(struct iio_dev *indio_dev)
798	{	792	{
799	struct sx9310_data *data = iio_priv(indio_dev);	793	struct sx9310_data *data = iio_priv(indio_dev);
800	int i, ret;	794	int ret;
801	unsigned int val;	795	unsigned int val;
802	unsigned int ctrl0;	796	unsigned int ctrl0;
803		797
804	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);	798	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);
805	if (ret < 0)	799	if (ret)
806	return ret;	800	return ret;
807		801
808	/* run the compensation phase on all channels */	802	/* run the compensation phase on all channels */
809	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,	803	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
810	ctrl0 \| SX9310_REG_PROX_CTRL0_EN_MASK);	804	ctrl0 \| SX9310_REG_PROX_CTRL0_SENSOREN_MASK);
811	if (ret < 0)	805	if (ret)
812	return ret;	806	return ret;
813		807
814	for (i = 100; i >= 0; i--) {	808	ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val,
815	msleep(20);	809	!(val & SX9310_REG_STAT1_COMPSTAT_MASK),
816	ret = regmap_read(data->regmap, SX9310_REG_STAT1, &val);	810	20000, 2000000);
817	if (ret < 0)	811	if (ret) {
818	goto out;	812	if (ret == -ETIMEDOUT)
819	if (!(val & SX9310_COMPSTAT_MASK))	813	dev_err(&data->client->dev,
820	break;	814	"initial compensation timed out: 0x%02x\n",
821	}	815	val);
822		816	return ret;
823	if (i < 0) {
824	dev_err(&data->client->dev,
825	"initial compensation timed out: 0x%02x", val);
826	ret = -ETIMEDOUT;
827	}	817	}
828		818
829	out:
830	regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);	819	regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
831	return ret;	820	return ret;
832	}	821	}
@@ -839,21 +828,21 @@ static int sx9310_init_device(struct iio_dev *indio_dev) · 6 unmodified lines
839	unsigned int i, val;	828	unsigned int i, val;
840		829
841	ret = regmap_write(data->regmap, SX9310_REG_RESET, SX9310_SOFT_RESET);	830	ret = regmap_write(data->regmap, SX9310_REG_RESET, SX9310_SOFT_RESET);
842	if (ret < 0)	831	if (ret)
843	return ret;	832	return ret;
844		833
845	usleep_range(1000, 2000); /* power-up time is ~1ms. */	834	usleep_range(1000, 2000); /* power-up time is ~1ms. */
846		835
847	/* Clear reset interrupt state by reading SX9310_REG_IRQ_SRC. */	836	/* Clear reset interrupt state by reading SX9310_REG_IRQ_SRC. */
848	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);	837	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
849	if (ret < 0)	838	if (ret)
850	return ret;	839	return ret;
851		840
852	/* Program some sane defaults. */	841	/* Program some sane defaults. */
853	for (i = 0; i < ARRAY_SIZE(sx9310_default_regs); i++) {	842	for (i = 0; i < ARRAY_SIZE(sx9310_default_regs); i++) {
854	initval = &sx9310_default_regs[i];	843	initval = &sx9310_default_regs[i];
855	ret = regmap_write(data->regmap, initval->reg, initval->def);	844	ret = regmap_write(data->regmap, initval->reg, initval->def);
856	if (ret < 0)	845	if (ret)
857	return ret;	846	return ret;
858	}	847	}
859		848
@@ -862,24 +851,15 @@ static int sx9310_init_device(struct iio_dev *indio_dev) · 2 unmodified lines
862		851
863	static int sx9310_set_indio_dev_name(struct device *dev,	852	static int sx9310_set_indio_dev_name(struct device *dev,
864	struct iio_dev *indio_dev,	853	struct iio_dev *indio_dev,
865	const struct i2c_device_id *id, int whoami)	854	unsigned int whoami)
866	{	855	{
867	const struct acpi_device_id *acpi_id;	856	unsigned int long ddata;
868		857
869	/* id will be NULL when enumerated via ACPI */	858	ddata = (uintptr_t)device_get_match_data(dev);
870	if (id) {	859	if (ddata != whoami) {
871	if (id->driver_data != whoami)	860	dev_err(dev, "WHOAMI does not match device data: %u\n", whoami);
872	dev_err(dev, "WHOAMI does not match i2c_device_id: %s",
873	id->name);
874	} else if (ACPI_HANDLE(dev)) {
875	acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev);
876	if (!acpi_id)
877	return -ENODEV;
878	if (acpi_id->driver_data != whoami)
879	dev_err(dev, "WHOAMI does not match acpi_device_id: %s",
880	acpi_id->id);
881	} else
882	return -ENODEV;	861	return -ENODEV;
		862	}
883		863
884	switch (whoami) {	864	switch (whoami) {
885	case SX9310_WHOAMI_VALUE:	865	case SX9310_WHOAMI_VALUE:
@@ -889,26 +869,35 @@ static int sx9310_set_indio_dev_name(struct device *dev, · 3 unmodified lines
889	indio_dev->name = "sx9311";	869	indio_dev->name = "sx9311";
890	break;	870	break;
891	default:	871	default:
892	dev_err(dev, "unexpected WHOAMI response: %u", whoami);	872	dev_err(dev, "unexpected WHOAMI response: %u\n", whoami);
893	return -ENODEV;	873	return -ENODEV;
894	}	874	}
895		875
896	return 0;	876	return 0;
897	}	877	}
898		878
899	static int sx9310_probe(struct i2c_client *client,	879	static void sx9310_regulator_disable(void *_data)
900	const struct i2c_device_id *id)	880	{
		881	struct sx9310_data *data = _data;
		882
		883	regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
		884	}
		885
		886	static int sx9310_probe(struct i2c_client *client)
901	{	887	{
902	int ret;	888	int ret;
		889	struct device *dev = &client->dev;
903	struct iio_dev *indio_dev;	890	struct iio_dev *indio_dev;
904	struct sx9310_data *data;	891	struct sx9310_data *data;
905		892
906	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));	893	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
907	if (indio_dev == NULL)	894	if (!indio_dev)
908	return -ENOMEM;	895	return -ENOMEM;
909		896
910	data = iio_priv(indio_dev);	897	data = iio_priv(indio_dev);
911	data->client = client;	898	data->client = client;
		899	data->supplies[0].supply = "vdd";
		900	data->supplies[1].supply = "svdd";
912	mutex_init(&data->mutex);	901	mutex_init(&data->mutex);
913	init_completion(&data->completion);	902	init_completion(&data->completion);
914		903
@@ -916,19 +905,32 @@ static int sx9310_probe(struct i2c_client *client, · 1 unmodified line
916	if (IS_ERR(data->regmap))	905	if (IS_ERR(data->regmap))
917	return PTR_ERR(data->regmap);	906	return PTR_ERR(data->regmap);
918		907
		908	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
		909	data->supplies);
		910	if (ret)
		911	return ret;
		912
		913	ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies);
		914	if (ret)
		915	return ret;
		916	/* Must wait for Tpor time after initial power up */
		917	usleep_range(1000, 1100);
		918
		919	ret = devm_add_action_or_reset(dev, sx9310_regulator_disable, data);
		920	if (ret)
		921	return ret;
		922
919	ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &data->whoami);	923	ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &data->whoami);
920	if (ret < 0) {	924	if (ret) {
921	dev_err(&client->dev, "error in reading WHOAMI register: %d",	925	dev_err(dev, "error in reading WHOAMI register: %d", ret);
922	ret);
923	return ret;	926	return ret;
924	}	927	}
925		928
926	ret = sx9310_set_indio_dev_name(&client->dev, indio_dev, id,	929	ret = sx9310_set_indio_dev_name(dev, indio_dev, data->whoami);
927	data->whoami);	930	if (ret)
928	if (ret < 0)
929	return ret;	931	return ret;
930		932
931	ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(&client->dev));	933	ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev));
932	indio_dev->channels = sx9310_channels;	934	indio_dev->channels = sx9310_channels;
933	indio_dev->num_channels = ARRAY_SIZE(sx9310_channels);	935	indio_dev->num_channels = ARRAY_SIZE(sx9310_channels);
934	indio_dev->info = &sx9310_info;	936	indio_dev->info = &sx9310_info;
@@ -936,41 +938,41 @@ static int sx9310_probe(struct i2c_client *client, · 1 unmodified line
936	i2c_set_clientdata(client, indio_dev);	938	i2c_set_clientdata(client, indio_dev);
937		939
938	ret = sx9310_init_device(indio_dev);	940	ret = sx9310_init_device(indio_dev);
939	if (ret < 0)	941	if (ret)
940	return ret;	942	return ret;
941		943
942	if (client->irq) {	944	if (client->irq) {
943	ret = devm_request_threaded_irq(&client->dev, client->irq,	945	ret = devm_request_threaded_irq(dev, client->irq,
944	sx9310_irq_handler,	946	sx9310_irq_handler,
945	sx9310_irq_thread_handler,	947	sx9310_irq_thread_handler,
946	IRQF_TRIGGER_LOW \| IRQF_ONESHOT,	948	IRQF_ONESHOT,
947	"sx9310_event", indio_dev);	949	"sx9310_event", indio_dev);
948	if (ret < 0)	950	if (ret)
949	return ret;	951	return ret;
950		952
951	data->trig =	953	data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
952	devm_iio_trigger_alloc(&client->dev, "%s-dev%d",	954	indio_dev->name,
953	indio_dev->name, indio_dev->id);	955	indio_dev->id);
954	if (!data->trig)	956	if (!data->trig)
955	return -ENOMEM;	957	return -ENOMEM;
956		958
957	data->trig->dev.parent = &client->dev;	959	data->trig->dev.parent = dev;
958	data->trig->ops = &sx9310_trigger_ops;	960	data->trig->ops = &sx9310_trigger_ops;
959	iio_trigger_set_drvdata(data->trig, indio_dev);	961	iio_trigger_set_drvdata(data->trig, indio_dev);
960		962
961	ret = devm_iio_trigger_register(&client->dev, data->trig);	963	ret = devm_iio_trigger_register(dev, data->trig);
962	if (ret)	964	if (ret)
963	return ret;	965	return ret;
964	}	966	}
965		967
966	ret = devm_iio_triggered_buffer_setup(&client->dev, indio_dev,	968	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
967	iio_pollfunc_store_time,	969	iio_pollfunc_store_time,
968	sx9310_trigger_handler,	970	sx9310_trigger_handler,
969	&sx9310_buffer_setup_ops);	971	&sx9310_buffer_setup_ops);
970	if (ret < 0)	972	if (ret)
971	return ret;	973	return ret;
972		974
973	return devm_iio_device_register(&client->dev, indio_dev);	975	return devm_iio_device_register(dev, indio_dev);
974	}	976	}
975		977
976	static int __maybe_unused sx9310_suspend(struct device *dev)	978	static int __maybe_unused sx9310_suspend(struct device *dev)
@@ -985,11 +987,10 @@ static int __maybe_unused sx9310_suspend(struct device *dev) · 8 unmodified lines
985	mutex_lock(&data->mutex);	987	mutex_lock(&data->mutex);
986	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,	988	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,
987	&data->suspend_ctrl0);	989	&data->suspend_ctrl0);
988
989	if (ret)	990	if (ret)
990	goto out;	991	goto out;
991		992
992	ctrl0 = data->suspend_ctrl0 & ~SX9310_REG_PROX_CTRL0_EN_MASK;	993	ctrl0 = data->suspend_ctrl0 & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK;
993	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);	994	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
994	if (ret)	995	if (ret)
995	goto out;	996	goto out;
@@ -1017,10 +1018,11 @@ static int __maybe_unused sx9310_resume(struct device *dev) · 21 unmodified lines
1017		1018
1018	out:	1019	out:
1019	mutex_unlock(&data->mutex);	1020	mutex_unlock(&data->mutex);
		1021	if (ret)
		1022	return ret;
1020		1023
1021	enable_irq(data->client->irq);	1024	enable_irq(data->client->irq);
1022		1025	return 0;
1023	return ret;
1024	}	1026	}
1025		1027
1026	static const struct dev_pm_ops sx9310_pm_ops = {	1028	static const struct dev_pm_ops sx9310_pm_ops = {
@@ -1030,32 +1032,39 @@ static const struct dev_pm_ops sx9310_pm_ops = { · 3 unmodified lines
1030	static const struct acpi_device_id sx9310_acpi_match[] = {	1032	static const struct acpi_device_id sx9310_acpi_match[] = {
1031	{ "STH9310", SX9310_WHOAMI_VALUE },	1033	{ "STH9310", SX9310_WHOAMI_VALUE },
1032	{ "STH9311", SX9311_WHOAMI_VALUE },	1034	{ "STH9311", SX9311_WHOAMI_VALUE },
1033	{},	1035	{}
1034	};	1036	};
1035	MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);	1037	MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);
1036		1038
1037	static const struct of_device_id sx9310_of_match[] = {	1039	static const struct of_device_id sx9310_of_match[] = {
1038	{ .compatible = "semtech,sx9310" },	1040	{ .compatible = "semtech,sx9310", (void *)SX9310_WHOAMI_VALUE },
1039	{ .compatible = "semtech,sx9311" },	1041	{ .compatible = "semtech,sx9311", (void *)SX9311_WHOAMI_VALUE },
1040	{},	1042	{}
1041	};	1043	};
1042	MODULE_DEVICE_TABLE(of, sx9310_of_match);	1044	MODULE_DEVICE_TABLE(of, sx9310_of_match);
1043		1045
1044	static const struct i2c_device_id sx9310_id[] = {	1046	static const struct i2c_device_id sx9310_id[] = {
1045	{ "sx9310", SX9310_WHOAMI_VALUE },	1047	{ "sx9310", SX9310_WHOAMI_VALUE },
1046	{ "sx9311", SX9311_WHOAMI_VALUE },	1048	{ "sx9311", SX9311_WHOAMI_VALUE },
1047	{},	1049	{}
1048	};	1050	};
1049	MODULE_DEVICE_TABLE(i2c, sx9310_id);	1051	MODULE_DEVICE_TABLE(i2c, sx9310_id);
1050		1052
1051	static struct i2c_driver sx9310_driver = {	1053	static struct i2c_driver sx9310_driver = {
1052	.driver = {	1054	.driver = {
1053	.name = "sx9310",	1055	.name = "sx9310",
1054	.acpi_match_table = ACPI_PTR(sx9310_acpi_match),	1056	.acpi_match_table = sx9310_acpi_match,
1055	.of_match_table = of_match_ptr(sx9310_of_match),	1057	.of_match_table = sx9310_of_match,
1056	.pm = &sx9310_pm_ops,	1058	.pm = &sx9310_pm_ops,
		1059
		1060	/*
		1061	* Lots of i2c transfers in probe + over 200 ms waiting in
		1062	* sx9310_init_compensation() mean a slow probe; prefer async
		1063	* so we don't delay boot if we're builtin to the kernel.
		1064	*/
		1065	.probe_type = PROBE_PREFER_ASYNCHRONOUS,
1057	},	1066	},
1058	.probe = sx9310_probe,	1067	.probe_new = sx9310_probe,
1059	.id_table = sx9310_id,	1068	.id_table = sx9310_id,
1060	};	1069	};
1061	module_i2c_driver(sx9310_driver);	1070	module_i2c_driver(sx9310_driver);

drivers/iio/proximity/vl53l0x-i2c.c+93−11

@@ -4,18 +4,19 @@ · 3 unmodified lines
4	*	4	*
5	* Copyright (C) 2016 STMicroelectronics Imaging Division.	5	* Copyright (C) 2016 STMicroelectronics Imaging Division.
6	* Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com>	6	* Copyright (C) 2018 Song Qiang <songqiang1304521@gmail.com>
		7	* Copyright (C) 2020 Ivan Drobyshevskyi <drobyshevskyi@gmail.com>
7	*	8	*
8	* Datasheet available at	9	* Datasheet available at
9	* <https://www.st.com/resource/en/datasheet/vl53l0x.pdf>	10	* <https://www.st.com/resource/en/datasheet/vl53l0x.pdf>
10	*	11	*
11	* Default 7-bit i2c slave address 0x29.	12	* Default 7-bit i2c slave address 0x29.
12	*	13	*
13	* TODO: FIFO buffer, continuous mode, interrupts, range selection,	14	* TODO: FIFO buffer, continuous mode, range selection, sensor ID check.
14	* sensor ID check.
15	*/	15	*/
16		16
17	#include <linux/delay.h>	17	#include <linux/delay.h>
18	#include <linux/i2c.h>	18	#include <linux/i2c.h>
		19	#include <linux/interrupt.h>
19	#include <linux/module.h>	20	#include <linux/module.h>
20		21
21	#include <linux/iio/iio.h>	22	#include <linux/iio/iio.h>
@@ -29,14 +30,72 @@ · 7 unmodified lines
29	#define VL_REG_SYSRANGE_MODE_TIMED BIT(2)	30	#define VL_REG_SYSRANGE_MODE_TIMED BIT(2)
30	#define VL_REG_SYSRANGE_MODE_HISTOGRAM BIT(3)	31	#define VL_REG_SYSRANGE_MODE_HISTOGRAM BIT(3)
31		32
		33	#define VL_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x0A
		34	#define VL_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY BIT(2)
		35
		36	#define VL_REG_SYSTEM_INTERRUPT_CLEAR 0x0B
		37
32	#define VL_REG_RESULT_INT_STATUS 0x13	38	#define VL_REG_RESULT_INT_STATUS 0x13
33	#define VL_REG_RESULT_RANGE_STATUS 0x14	39	#define VL_REG_RESULT_RANGE_STATUS 0x14
34	#define VL_REG_RESULT_RANGE_STATUS_COMPLETE BIT(0)	40	#define VL_REG_RESULT_RANGE_STATUS_COMPLETE BIT(0)
35		41
36	struct vl53l0x_data {	42	struct vl53l0x_data {
37	struct i2c_client *client;	43	struct i2c_client *client;
		44	struct completion completion;
38	};	45	};
39		46
		47	static irqreturn_t vl53l0x_handle_irq(int irq, void *priv)
		48	{
		49	struct iio_dev *indio_dev = priv;
		50	struct vl53l0x_data *data = iio_priv(indio_dev);
		51
		52	complete(&data->completion);
		53
		54	return IRQ_HANDLED;
		55	}
		56
		57	static int vl53l0x_configure_irq(struct i2c_client *client,
		58	struct iio_dev *indio_dev)
		59	{
		60	struct vl53l0x_data *data = iio_priv(indio_dev);
		61	int ret;
		62
		63	ret = devm_request_irq(&client->dev, client->irq, vl53l0x_handle_irq,
		64	IRQF_TRIGGER_FALLING, indio_dev->name, indio_dev);
		65	if (ret) {
		66	dev_err(&client->dev, "devm_request_irq error: %d\n", ret);
		67	return ret;
		68	}
		69
		70	ret = i2c_smbus_write_byte_data(data->client,
		71	VL_REG_SYSTEM_INTERRUPT_CONFIG_GPIO,
		72	VL_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY);
		73	if (ret < 0)
		74	dev_err(&client->dev, "failed to configure IRQ: %d\n", ret);
		75
		76	return ret;
		77	}
		78
		79	static void vl53l0x_clear_irq(struct vl53l0x_data *data)
		80	{
		81	struct device *dev = &data->client->dev;
		82	int ret;
		83
		84	ret = i2c_smbus_write_byte_data(data->client,
		85	VL_REG_SYSTEM_INTERRUPT_CLEAR, 1);
		86	if (ret < 0)
		87	dev_err(dev, "failed to clear error irq: %d\n", ret);
		88
		89	ret = i2c_smbus_write_byte_data(data->client,
		90	VL_REG_SYSTEM_INTERRUPT_CLEAR, 0);
		91	if (ret < 0)
		92	dev_err(dev, "failed to clear range irq: %d\n", ret);
		93
		94	ret = i2c_smbus_read_byte_data(data->client, VL_REG_RESULT_INT_STATUS);
		95	if (ret < 0 \|\| ret & 0x07)
		96	dev_err(dev, "failed to clear irq: %d\n", ret);
		97	}
		98
40	static int vl53l0x_read_proximity(struct vl53l0x_data *data,	99	static int vl53l0x_read_proximity(struct vl53l0x_data *data,
41	const struct iio_chan_spec *chan,	100	const struct iio_chan_spec *chan,
42	int *val)	101	int *val)
@@ -50,19 +109,31 @@ static int vl53l0x_read_proximity(struct vl53l0x_data *data, · 7 unmodified lines
50	if (ret < 0)	109	if (ret < 0)
51	return ret;	110	return ret;
52		111
53	do {	112	if (data->client->irq) {
54	ret = i2c_smbus_read_byte_data(client,	113	reinit_completion(&data->completion);
55	VL_REG_RESULT_RANGE_STATUS);	114
		115	ret = wait_for_completion_timeout(&data->completion, HZ/10);
56	if (ret < 0)	116	if (ret < 0)
57	return ret;	117	return ret;
		118	else if (ret == 0)
		119	return -ETIMEDOUT;
58		120
59	if (ret & VL_REG_RESULT_RANGE_STATUS_COMPLETE)	121	vl53l0x_clear_irq(data);
60	break;	122	} else {
		123	do {
		124	ret = i2c_smbus_read_byte_data(client,
		125	VL_REG_RESULT_RANGE_STATUS);
		126	if (ret < 0)
		127	return ret;
61		128
62	usleep_range(1000, 5000);	129	if (ret & VL_REG_RESULT_RANGE_STATUS_COMPLETE)
63	} while (--tries);	130	break;
64	if (!tries)	131
65	return -ETIMEDOUT;	132	usleep_range(1000, 5000);
		133	} while (--tries);
		134	if (!tries)
		135	return -ETIMEDOUT;
		136	}
66		137
67	ret = i2c_smbus_read_i2c_block_data(client, VL_REG_RESULT_RANGE_STATUS,	138	ret = i2c_smbus_read_i2c_block_data(client, VL_REG_RESULT_RANGE_STATUS,
68	12, buffer);	139	12, buffer);
@@ -140,6 +211,17 @@ static int vl53l0x_probe(struct i2c_client *client) · 71 unmodified lines
140	indio_dev->num_channels = ARRAY_SIZE(vl53l0x_channels);	211	indio_dev->num_channels = ARRAY_SIZE(vl53l0x_channels);
141	indio_dev->modes = INDIO_DIRECT_MODE;	212	indio_dev->modes = INDIO_DIRECT_MODE;
142		213
		214	/* usage of interrupt is optional */
		215	if (client->irq) {
		216	int ret;
		217
		218	init_completion(&data->completion);
		219
		220	ret = vl53l0x_configure_irq(client, indio_dev);
		221	if (ret)
		222	return ret;
		223	}
		224
143	return devm_iio_device_register(&client->dev, indio_dev);	225	return devm_iio_device_register(&client->dev, indio_dev);
144	}	226	}
145		227

drivers/iio/resolver/ad2s1200.c+2−1

 #include <linux/device.h>
 #include <linux/gpio/consumer.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/mutex.h>
 #include <linux/spi/spi.h>
 #include <linux/sysfs.h>
 static struct spi_driver ad2s1200_driver = {
 	.driver = {
 		.name = DRV_NAME,
-		.of_match_table = of_match_ptr(ad2s1200_of_match),
+		.of_match_table = ad2s1200_of_match,
 	},
 	.probe = ad2s1200_probe,
 	.id_table = ad2s1200_id,

drivers/iio/temperature/ltc2983.c+13−6

 		ret = of_property_read_u32(child, "reg", &sensor.chan);
 		if (ret) {
 			dev_err(dev, "reg property must given for child nodes\n");
-			return ret;
+			goto put_child;
 		}
 		/* check if we have a valid channel */
 		if (sensor.chan < LTC2983_MIN_CHANNELS_NR ||
 		    sensor.chan > LTC2983_MAX_CHANNELS_NR) {
+			ret = -EINVAL;
 			dev_err(dev,
 				"chan:%d must be from 1 to 20\n", sensor.chan);
-			return -EINVAL;
+			goto put_child;
 		} else if (channel_avail_mask & BIT(sensor.chan)) {
+			ret = -EINVAL;
 			dev_err(dev, "chan:%d already in use\n", sensor.chan);
-			return -EINVAL;
+			goto put_child;
 		}
 		ret = of_property_read_u32(child, "adi,sensor-type",
 		if (ret) {
 			dev_err(dev,
 				"adi,sensor-type property must given for child nodes\n");
-			return ret;
+			goto put_child;
 		}
 		dev_dbg(dev, "Create new sensor, type %u, chann %u",
 			st->sensors[chan] = ltc2983_adc_new(child, st, &sensor);
 		} else {
 			dev_err(dev, "Unknown sensor type %d\n", sensor.type);
-			return -EINVAL;
+			ret = -EINVAL;
+			goto put_child;
 		}
 		if (IS_ERR(st->sensors[chan])) {
 			dev_err(dev, "Failed to create sensor %ld",
 				PTR_ERR(st->sensors[chan]));
-			return PTR_ERR(st->sensors[chan]);
+			ret = PTR_ERR(st->sensors[chan]);
+			goto put_child;
 		}
 		/* set generic sensor parameters */
 		st->sensors[chan]->chan = sensor.chan;
 	}
 	return 0;
+put_child:
+	of_node_put(child);
+	return ret;
 }
 static int ltc2983_setup(struct ltc2983_data *st, bool assign_iio)

drivers/iio/temperature/mlx90632.c+254−29

@@ -10,7 +10,9 @@ · 9 unmodified lines
10	#include <linux/err.h>	10	#include <linux/err.h>
11	#include <linux/gpio/consumer.h>	11	#include <linux/gpio/consumer.h>
12	#include <linux/i2c.h>	12	#include <linux/i2c.h>
		13	#include <linux/iopoll.h>
13	#include <linux/kernel.h>	14	#include <linux/kernel.h>
		15	#include <linux/limits.h>
14	#include <linux/module.h>	16	#include <linux/module.h>
15	#include <linux/math64.h>	17	#include <linux/math64.h>
16	#include <linux/of.h>	18	#include <linux/of.h>
@@ -58,6 +60,8 @@ · 41 unmodified lines
58	/* Control register address - volatile */	60	/* Control register address - volatile */
59	#define MLX90632_REG_CONTROL 0x3001 /* Control Register address */	61	#define MLX90632_REG_CONTROL 0x3001 /* Control Register address */
60	#define MLX90632_CFG_PWR_MASK GENMASK(2, 1) /* PowerMode Mask */	62	#define MLX90632_CFG_PWR_MASK GENMASK(2, 1) /* PowerMode Mask */
		63	#define MLX90632_CFG_MTYP_MASK GENMASK(8, 4) /* Meas select Mask */
		64
61	/* PowerModes statuses */	65	/* PowerModes statuses */
62	#define MLX90632_PWR_STATUS(ctrl_val) (ctrl_val << 1)	66	#define MLX90632_PWR_STATUS(ctrl_val) (ctrl_val << 1)
63	#define MLX90632_PWR_STATUS_HALT MLX90632_PWR_STATUS(0) /* hold */	67	#define MLX90632_PWR_STATUS_HALT MLX90632_PWR_STATUS(0) /* hold */
@@ -65,6 +69,18 @@ · 1 unmodified line
65	#define MLX90632_PWR_STATUS_STEP MLX90632_PWR_STATUS(2) /* step */	69	#define MLX90632_PWR_STATUS_STEP MLX90632_PWR_STATUS(2) /* step */
66	#define MLX90632_PWR_STATUS_CONTINUOUS MLX90632_PWR_STATUS(3) /* continuous*/	70	#define MLX90632_PWR_STATUS_CONTINUOUS MLX90632_PWR_STATUS(3) /* continuous*/
67		71
		72	/* Measurement types */
		73	#define MLX90632_MTYP_MEDICAL 0
		74	#define MLX90632_MTYP_EXTENDED 17
		75
		76	/* Measurement type select*/
		77	#define MLX90632_MTYP_STATUS(ctrl_val) (ctrl_val << 4)
		78	#define MLX90632_MTYP_STATUS_MEDICAL MLX90632_MTYP_STATUS(MLX90632_MTYP_MEDICAL)
		79	#define MLX90632_MTYP_STATUS_EXTENDED MLX90632_MTYP_STATUS(MLX90632_MTYP_EXTENDED)
		80
		81	/* I2C command register - volatile */
		82	#define MLX90632_REG_I2C_CMD 0x3005 /* I2C command Register address */
		83
68	/* Device status register - volatile */	84	/* Device status register - volatile */
69	#define MLX90632_REG_STATUS 0x3fff /* Device status register */	85	#define MLX90632_REG_STATUS 0x3fff /* Device status register */
70	#define MLX90632_STAT_BUSY BIT(10) /* Device busy indicator */	86	#define MLX90632_STAT_BUSY BIT(10) /* Device busy indicator */
@@ -78,26 +94,53 @@ · 7 unmodified lines
78	#define MLX90632_RAM_2(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 1)	94	#define MLX90632_RAM_2(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 1)
79	#define MLX90632_RAM_3(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 2)	95	#define MLX90632_RAM_3(meas_num) (MLX90632_ADDR_RAM + 3 * meas_num + 2)
80		96
		97	/* Name important RAM_MEAS channels */
		98	#define MLX90632_RAM_DSP5_EXTENDED_AMBIENT_1 MLX90632_RAM_3(17)
		99	#define MLX90632_RAM_DSP5_EXTENDED_AMBIENT_2 MLX90632_RAM_3(18)
		100	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_1 MLX90632_RAM_1(17)
		101	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_2 MLX90632_RAM_2(17)
		102	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_3 MLX90632_RAM_1(18)
		103	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_4 MLX90632_RAM_2(18)
		104	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_5 MLX90632_RAM_1(19)
		105	#define MLX90632_RAM_DSP5_EXTENDED_OBJECT_6 MLX90632_RAM_2(19)
		106
81	/* Magic constants */	107	/* Magic constants */
82	#define MLX90632_ID_MEDICAL 0x0105 /* EEPROM DSPv5 Medical device id */	108	#define MLX90632_ID_MEDICAL 0x0105 /* EEPROM DSPv5 Medical device id */
83	#define MLX90632_ID_CONSUMER 0x0205 /* EEPROM DSPv5 Consumer device id */	109	#define MLX90632_ID_CONSUMER 0x0205 /* EEPROM DSPv5 Consumer device id */
		110	#define MLX90632_ID_EXTENDED 0x0505 /* EEPROM DSPv5 Extended range device id */
		111	#define MLX90632_ID_MASK GENMASK(14, 0) /* DSP version and device ID in EE_VERSION */
84	#define MLX90632_DSP_VERSION 5 /* DSP version */	112	#define MLX90632_DSP_VERSION 5 /* DSP version */
85	#define MLX90632_DSP_MASK GENMASK(7, 0) /* DSP version in EE_VERSION */	113	#define MLX90632_DSP_MASK GENMASK(7, 0) /* DSP version in EE_VERSION */
86	#define MLX90632_RESET_CMD 0x0006 /* Reset sensor (address or global) */	114	#define MLX90632_RESET_CMD 0x0006 /* Reset sensor (address or global) */
87	#define MLX90632_REF_12 12LL /*< ResCtrlRef value of Ch 1 or Ch 2 /	115	#define MLX90632_REF_12 12LL /* ResCtrlRef value of Ch 1 or Ch 2 */
88	#define MLX90632_REF_3 12LL /*< ResCtrlRef value of Channel 3 /	116	#define MLX90632_REF_3 12LL /* ResCtrlRef value of Channel 3 */
89	#define MLX90632_MAX_MEAS_NUM 31 /*< Maximum measurements in list /	117	#define MLX90632_MAX_MEAS_NUM 31 /* Maximum measurements in list */
90	#define MLX90632_SLEEP_DELAY_MS 3000 /*< Autosleep delay /	118	#define MLX90632_SLEEP_DELAY_MS 3000 /* Autosleep delay */
		119	#define MLX90632_EXTENDED_LIMIT 27000 /* Extended mode raw value limit */
91		120
		121	/**
		122	* struct mlx90632_data - private data for the MLX90632 device
		123	* @client: I2C client of the device
		124	* @lock: Internal mutex for multiple reads for single measurement
		125	* @regmap: Regmap of the device
		126	* @emissivity: Object emissivity from 0 to 1000 where 1000 = 1.
		127	* @mtyp: Measurement type physical sensor configuration for extended range
		128	* calculations
		129	* @object_ambient_temperature: Ambient temperature at object (might differ of
		130	* the ambient temperature of sensor.
		131	*/
92	struct mlx90632_data {	132	struct mlx90632_data {
93	struct i2c_client *client;	133	struct i2c_client *client;
94	struct mutex lock; /* Multiple reads for single measurement */	134	struct mutex lock;
95	struct regmap *regmap;	135	struct regmap *regmap;
96	u16 emissivity;	136	u16 emissivity;
		137	u8 mtyp;
		138	u32 object_ambient_temperature;
97	};	139	};
98		140
99	static const struct regmap_range mlx90632_volatile_reg_range[] = {	141	static const struct regmap_range mlx90632_volatile_reg_range[] = {
100	regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),	142	regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),
		143	regmap_reg_range(MLX90632_REG_I2C_CMD, MLX90632_REG_I2C_CMD),
101	regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),	144	regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),
102	regmap_reg_range(MLX90632_RAM_1(0),	145	regmap_reg_range(MLX90632_RAM_1(0),
103	MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),	146	MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),
@@ -113,6 +156,7 @@ static const struct regmap_range mlx90632_read_reg_range[] = { · 9 unmodified lines
113	regmap_reg_range(MLX90632_EE_CTRL, MLX90632_EE_I2C_ADDR),	156	regmap_reg_range(MLX90632_EE_CTRL, MLX90632_EE_I2C_ADDR),
114	regmap_reg_range(MLX90632_EE_Ha, MLX90632_EE_Hb),	157	regmap_reg_range(MLX90632_EE_Ha, MLX90632_EE_Hb),
115	regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),	158	regmap_reg_range(MLX90632_REG_I2C_ADDR, MLX90632_REG_CONTROL),
		159	regmap_reg_range(MLX90632_REG_I2C_CMD, MLX90632_REG_I2C_CMD),
116	regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),	160	regmap_reg_range(MLX90632_REG_STATUS, MLX90632_REG_STATUS),
117	regmap_reg_range(MLX90632_RAM_1(0),	161	regmap_reg_range(MLX90632_RAM_1(0),
118	MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),	162	MLX90632_RAM_3(MLX90632_MAX_MEAS_NUM)),
@@ -173,25 +217,19 @@ static s32 mlx90632_pwr_continuous(struct regmap *regmap) · 54 unmodified lines
173	*/	217	*/
174	static int mlx90632_perform_measurement(struct mlx90632_data *data)	218	static int mlx90632_perform_measurement(struct mlx90632_data *data)
175	{	219	{
176	int ret, tries = 100;
177	unsigned int reg_status;	220	unsigned int reg_status;
		221	int ret;
178		222
179	ret = regmap_update_bits(data->regmap, MLX90632_REG_STATUS,	223	ret = regmap_update_bits(data->regmap, MLX90632_REG_STATUS,
180	MLX90632_STAT_DATA_RDY, 0);	224	MLX90632_STAT_DATA_RDY, 0);
181	if (ret < 0)	225	if (ret < 0)
182	return ret;	226	return ret;
183		227
184	while (tries-- > 0) {	228	ret = regmap_read_poll_timeout(data->regmap, MLX90632_REG_STATUS, reg_status,
185	ret = regmap_read(data->regmap, MLX90632_REG_STATUS,	229	!(reg_status & MLX90632_STAT_DATA_RDY), 10000,
186	&reg_status);	230	100 * 10000);
187	if (ret < 0)
188	return ret;
189	if (reg_status & MLX90632_STAT_DATA_RDY)
190	break;
191	usleep_range(10000, 11000);
192	}
193		231
194	if (tries < 0) {	232	if (ret < 0) {
195	dev_err(&data->client->dev, "data not ready");	233	dev_err(&data->client->dev, "data not ready");
196	return -ETIMEDOUT;	234	return -ETIMEDOUT;
197	}	235	}
@@ -199,6 +237,26 @@ static int mlx90632_perform_measurement(struct mlx90632_data *data) · 1 unmodified line
199	return (reg_status & MLX90632_STAT_CYCLE_POS) >> 2;	237	return (reg_status & MLX90632_STAT_CYCLE_POS) >> 2;
200	}	238	}
201		239
		240	static int mlx90632_set_meas_type(struct regmap *regmap, u8 type)
		241	{
		242	int ret;
		243
		244	if ((type != MLX90632_MTYP_MEDICAL) && (type != MLX90632_MTYP_EXTENDED))
		245	return -EINVAL;
		246
		247	ret = regmap_write(regmap, MLX90632_REG_I2C_CMD, MLX90632_RESET_CMD);
		248	if (ret < 0)
		249	return ret;
		250
		251	ret = regmap_write_bits(regmap, MLX90632_REG_CONTROL,
		252	(MLX90632_CFG_MTYP_MASK \| MLX90632_CFG_PWR_MASK),
		253	(MLX90632_MTYP_STATUS(type) \| MLX90632_PWR_STATUS_HALT));
		254	if (ret < 0)
		255	return ret;
		256
		257	return mlx90632_pwr_continuous(regmap);
		258	}
		259
202	static int mlx90632_channel_new_select(int perform_ret, uint8_t *channel_new,	260	static int mlx90632_channel_new_select(int perform_ret, uint8_t *channel_new,
203	uint8_t *channel_old)	261	uint8_t *channel_old)
204	{	262	{
@@ -300,6 +358,97 @@ read_unlock: · 95 unmodified lines
300	return ret;	358	return ret;
301	}	359	}
302		360
		361	static int mlx90632_read_ambient_raw_extended(struct regmap *regmap,
		362	s16 ambient_new_raw, s16 ambient_old_raw)
		363	{
		364	unsigned int read_tmp;
		365	int ret;
		366
		367	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_AMBIENT_1, &read_tmp);
		368	if (ret < 0)
		369	return ret;
		370	*ambient_new_raw = (s16)read_tmp;
		371
		372	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_AMBIENT_2, &read_tmp);
		373	if (ret < 0)
		374	return ret;
		375	*ambient_old_raw = (s16)read_tmp;
		376
		377	return 0;
		378	}
		379
		380	static int mlx90632_read_object_raw_extended(struct regmap regmap, s16 object_new_raw)
		381	{
		382	unsigned int read_tmp;
		383	s32 read;
		384	int ret;
		385
		386	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_1, &read_tmp);
		387	if (ret < 0)
		388	return ret;
		389	read = (s16)read_tmp;
		390
		391	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_2, &read_tmp);
		392	if (ret < 0)
		393	return ret;
		394	read = read - (s16)read_tmp;
		395
		396	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_3, &read_tmp);
		397	if (ret < 0)
		398	return ret;
		399	read = read - (s16)read_tmp;
		400
		401	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_4, &read_tmp);
		402	if (ret < 0)
		403	return ret;
		404	read = (read + (s16)read_tmp) / 2;
		405
		406	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_5, &read_tmp);
		407	if (ret < 0)
		408	return ret;
		409	read = read + (s16)read_tmp;
		410
		411	ret = regmap_read(regmap, MLX90632_RAM_DSP5_EXTENDED_OBJECT_6, &read_tmp);
		412	if (ret < 0)
		413	return ret;
		414	read = read + (s16)read_tmp;
		415
		416	if (read > S16_MAX \|\| read < S16_MIN)
		417	return -ERANGE;
		418
		419	*object_new_raw = read;
		420
		421	return 0;
		422	}
		423
		424	static int mlx90632_read_all_channel_extended(struct mlx90632_data data, s16 object_new_raw,
		425	s16 ambient_new_raw, s16 ambient_old_raw)
		426	{
		427	s32 ret, meas;
		428
		429	mutex_lock(&data->lock);
		430	ret = mlx90632_set_meas_type(data->regmap, MLX90632_MTYP_EXTENDED);
		431	if (ret < 0)
		432	goto read_unlock;
		433
		434	ret = read_poll_timeout(mlx90632_perform_measurement, meas, meas == 19,
		435	50000, 800000, false, data);
		436	if (ret != 0)
		437	goto read_unlock;
		438
		439	ret = mlx90632_read_object_raw_extended(data->regmap, object_new_raw);
		440	if (ret < 0)
		441	goto read_unlock;
		442
		443	ret = mlx90632_read_ambient_raw_extended(data->regmap, ambient_new_raw, ambient_old_raw);
		444
		445	read_unlock:
		446	(void) mlx90632_set_meas_type(data->regmap, MLX90632_MTYP_MEDICAL);
		447
		448	mutex_unlock(&data->lock);
		449	return ret;
		450	}
		451
303	static int mlx90632_read_ee_register(struct regmap *regmap, u16 reg_lsb,	452	static int mlx90632_read_ee_register(struct regmap *regmap, u16 reg_lsb,
304	s32 *reg_value)	453	s32 *reg_value)
305	{	454	{
@@ -354,9 +503,23 @@ static s64 mlx90632_preprocess_temp_obj(s16 object_new_raw, s16 object_old_raw, · 48 unmodified lines
354	return div64_s64((tmp << 19ULL), 1000LL);	503	return div64_s64((tmp << 19ULL), 1000LL);
355	}	504	}
356		505
		506	static s64 mlx90632_preprocess_temp_obj_extended(s16 object_new_raw, s16 ambient_new_raw,
		507	s16 ambient_old_raw, s16 Ka)
		508	{
		509	s64 VR_IR, kKa, tmp;
		510
		511	kKa = ((s64)Ka * 1000LL) >> 10ULL;
		512	VR_IR = (s64)ambient_old_raw * 1000000LL +
		513	kKa * div64_s64((s64)ambient_new_raw * 1000LL,
		514	MLX90632_REF_3);
		515	tmp = div64_s64(
		516	div64_s64((s64) object_new_raw * 1000000000000LL, MLX90632_REF_12),
		517	VR_IR);
		518	return div64_s64(tmp << 19ULL, 1000LL);
		519	}
		520
357	static s32 mlx90632_calc_temp_ambient(s16 ambient_new_raw, s16 ambient_old_raw,	521	static s32 mlx90632_calc_temp_ambient(s16 ambient_new_raw, s16 ambient_old_raw,
358	s32 P_T, s32 P_R, s32 P_G, s32 P_O,	522	s32 P_T, s32 P_R, s32 P_G, s32 P_O, s16 Gb)
359	s16 Gb)
360	{	523	{
361	s64 Asub, Bsub, Ablock, Bblock, Cblock, AMB, sum;	524	s64 Asub, Bsub, Ablock, Bblock, Cblock, AMB, sum;
362		525
@@ -374,11 +537,11 @@ static s32 mlx90632_calc_temp_ambient(s16 ambient_new_raw, s16 ambient_old_raw, · 11 unmodified lines
374	}	537	}
375		538
376	static s32 mlx90632_calc_temp_object_iteration(s32 prev_object_temp, s64 object,	539	static s32 mlx90632_calc_temp_object_iteration(s32 prev_object_temp, s64 object,
377	s64 TAdut, s32 Fa, s32 Fb,	540	s64 TAdut, s64 TAdut4, s32 Fa, s32 Fb,
378	s32 Ga, s16 Ha, s16 Hb,	541	s32 Ga, s16 Ha, s16 Hb,
379	u16 emissivity)	542	u16 emissivity)
380	{	543	{
381	s64 calcedKsTO, calcedKsTA, ir_Alpha, TAdut4, Alpha_corr;	544	s64 calcedKsTO, calcedKsTA, ir_Alpha, Alpha_corr;
382	s64 Ha_customer, Hb_customer;	545	s64 Ha_customer, Hb_customer;
383		546
384	Ha_customer = ((s64)Ha * 1000000LL) >> 14ULL;	547	Ha_customer = ((s64)Ha * 1000000LL) >> 14ULL;
@@ -393,36 +556,66 @@ static s32 mlx90632_calc_temp_object_iteration(s32 prev_object_temp, s64 object, · 8 unmodified lines
393	Alpha_corr = emissivity * div64_s64(Alpha_corr, 100000LL);	556	Alpha_corr = emissivity * div64_s64(Alpha_corr, 100000LL);
394	Alpha_corr = div64_s64(Alpha_corr, 1000LL);	557	Alpha_corr = div64_s64(Alpha_corr, 1000LL);
395	ir_Alpha = div64_s64((s64)object * 10000000LL, Alpha_corr);	558	ir_Alpha = div64_s64((s64)object * 10000000LL, Alpha_corr);
396	TAdut4 = (div64_s64(TAdut, 10000LL) + 27315) *
397	(div64_s64(TAdut, 10000LL) + 27315) *
398	(div64_s64(TAdut, 10000LL) + 27315) *
399	(div64_s64(TAdut, 10000LL) + 27315);
400		559
401	return (int_sqrt64(int_sqrt64(ir_Alpha * 1000000000000LL + TAdut4))	560	return (int_sqrt64(int_sqrt64(ir_Alpha * 1000000000000LL + TAdut4))
402	- 27315 - Hb_customer) * 10;	561	- 27315 - Hb_customer) * 10;
403	}	562	}
404		563
		564	static s64 mlx90632_calc_ta4(s64 TAdut, s64 scale)
		565	{
		566	return (div64_s64(TAdut, scale) + 27315) *
		567	(div64_s64(TAdut, scale) + 27315) *
		568	(div64_s64(TAdut, scale) + 27315) *
		569	(div64_s64(TAdut, scale) + 27315);
		570	}
		571
405	static s32 mlx90632_calc_temp_object(s64 object, s64 ambient, s32 Ea, s32 Eb,	572	static s32 mlx90632_calc_temp_object(s64 object, s64 ambient, s32 Ea, s32 Eb,
406	s32 Fa, s32 Fb, s32 Ga, s16 Ha, s16 Hb,	573	s32 Fa, s32 Fb, s32 Ga, s16 Ha, s16 Hb,
407	u16 tmp_emi)	574	u16 tmp_emi)
408	{	575	{
409	s64 kTA, kTA0, TAdut;	576	s64 kTA, kTA0, TAdut, TAdut4;
410	s64 temp = 25000;	577	s64 temp = 25000;
411	s8 i;	578	s8 i;
412		579
413	kTA = (Ea * 1000LL) >> 16LL;	580	kTA = (Ea * 1000LL) >> 16LL;
414	kTA0 = (Eb * 1000LL) >> 8LL;	581	kTA0 = (Eb * 1000LL) >> 8LL;
415	TAdut = div64_s64(((ambient - kTA0) * 1000000LL), kTA) + 25 * 1000000LL;	582	TAdut = div64_s64(((ambient - kTA0) * 1000000LL), kTA) + 25 * 1000000LL;
		583	TAdut4 = mlx90632_calc_ta4(TAdut, 10000LL);
416		584
417	/* Iterations of calculation as described in datasheet */	585	/* Iterations of calculation as described in datasheet */
418	for (i = 0; i < 5; ++i) {	586	for (i = 0; i < 5; ++i) {
419	temp = mlx90632_calc_temp_object_iteration(temp, object, TAdut,	587	temp = mlx90632_calc_temp_object_iteration(temp, object, TAdut, TAdut4,
420	Fa, Fb, Ga, Ha, Hb,	588	Fa, Fb, Ga, Ha, Hb,
421	tmp_emi);	589	tmp_emi);
422	}	590	}
423	return temp;	591	return temp;
424	}	592	}
425		593
		594	static s32 mlx90632_calc_temp_object_extended(s64 object, s64 ambient, s64 reflected,
		595	s32 Ea, s32 Eb, s32 Fa, s32 Fb, s32 Ga,
		596	s16 Ha, s16 Hb, u16 tmp_emi)
		597	{
		598	s64 kTA, kTA0, TAdut, TAdut4, Tr4, TaTr4;
		599	s64 temp = 25000;
		600	s8 i;
		601
		602	kTA = (Ea * 1000LL) >> 16LL;
		603	kTA0 = (Eb * 1000LL) >> 8LL;
		604	TAdut = div64_s64((ambient - kTA0) * 1000000LL, kTA) + 25 * 1000000LL;
		605	Tr4 = mlx90632_calc_ta4(reflected, 10);
		606	TAdut4 = mlx90632_calc_ta4(TAdut, 10000LL);
		607	TaTr4 = Tr4 - div64_s64(Tr4 - TAdut4, tmp_emi) * 1000;
		608
		609	/* Iterations of calculation as described in datasheet */
		610	for (i = 0; i < 5; ++i) {
		611	temp = mlx90632_calc_temp_object_iteration(temp, object, TAdut, TaTr4,
		612	Fa / 2, Fb, Ga, Ha, Hb,
		613	tmp_emi);
		614	}
		615
		616	return temp;
		617	}
		618
426	static int mlx90632_calc_object_dsp105(struct mlx90632_data data, int val)	619	static int mlx90632_calc_object_dsp105(struct mlx90632_data data, int val)
427	{	620	{
428	s32 ret;	621	s32 ret;
@@ -470,6 +663,26 @@ static int mlx90632_calc_object_dsp105(struct mlx90632_data data, int val) · 41 unmodified lines
470	if (ret < 0)	663	if (ret < 0)
471	return ret;	664	return ret;
472		665
		666	if (object_new_raw > MLX90632_EXTENDED_LIMIT &&
		667	data->mtyp == MLX90632_MTYP_EXTENDED) {
		668	ret = mlx90632_read_all_channel_extended(data, &object_new_raw,
		669	&ambient_new_raw, &ambient_old_raw);
		670	if (ret < 0)
		671	return ret;
		672
		673	/* Use extended mode calculations */
		674	ambient = mlx90632_preprocess_temp_amb(ambient_new_raw,
		675	ambient_old_raw, Gb);
		676	object = mlx90632_preprocess_temp_obj_extended(object_new_raw,
		677	ambient_new_raw,
		678	ambient_old_raw, Ka);
		679	*val = mlx90632_calc_temp_object_extended(object, ambient,
		680	data->object_ambient_temperature,
		681	Ea, Eb, Fa, Fb, Ga,
		682	Ha, Hb, data->emissivity);
		683	return 0;
		684	}
		685
473	ambient = mlx90632_preprocess_temp_amb(ambient_new_raw,	686	ambient = mlx90632_preprocess_temp_amb(ambient_new_raw,
474	ambient_old_raw, Gb);	687	ambient_old_raw, Gb);
475	object = mlx90632_preprocess_temp_obj(object_new_raw,	688	object = mlx90632_preprocess_temp_obj(object_new_raw,
@@ -548,7 +761,9 @@ static int mlx90632_read_raw(struct iio_dev *indio_dev, · 72 unmodified lines
548	val2 = data->emissivity 1000;	761	val2 = data->emissivity 1000;
549	}	762	}
550	return IIO_VAL_INT_PLUS_MICRO;	763	return IIO_VAL_INT_PLUS_MICRO;
551		764	case IIO_CHAN_INFO_CALIBAMBIENT:
		765	*val = data->object_ambient_temperature;
		766	return IIO_VAL_INT;
552	default:	767	default:
553	return -EINVAL;	768	return -EINVAL;
554	}	769	}
@@ -568,6 +783,9 @@ static int mlx90632_write_raw(struct iio_dev *indio_dev, · 13 unmodified lines
568	return -EINVAL;	783	return -EINVAL;
569	data->emissivity = val * 1000 + val2 / 1000;	784	data->emissivity = val * 1000 + val2 / 1000;
570	return 0;	785	return 0;
		786	case IIO_CHAN_INFO_CALIBAMBIENT:
		787	data->object_ambient_temperature = val;
		788	return 0;
571	default:	789	default:
572	return -EINVAL;	790	return -EINVAL;
573	}	791	}
@@ -585,7 +803,7 @@ static const struct iio_chan_spec mlx90632_channels[] = { · 11 unmodified lines
585	.modified = 1,	803	.modified = 1,
586	.channel2 = IIO_MOD_TEMP_OBJECT,	804	.channel2 = IIO_MOD_TEMP_OBJECT,
587	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) \|	805	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) \|
588	BIT(IIO_CHAN_INFO_CALIBEMISSIVITY),	806	BIT(IIO_CHAN_INFO_CALIBEMISSIVITY) \| BIT(IIO_CHAN_INFO_CALIBAMBIENT),
589	},	807	},
590	};	808	};
591		809
@@ -643,6 +861,7 @@ static int mlx90632_probe(struct i2c_client *client, · 51 unmodified lines
643	i2c_set_clientdata(client, indio_dev);	861	i2c_set_clientdata(client, indio_dev);
644	mlx90632->client = client;	862	mlx90632->client = client;
645	mlx90632->regmap = regmap;	863	mlx90632->regmap = regmap;
		864	mlx90632->mtyp = MLX90632_MTYP_MEDICAL;
646		865
647	mutex_init(&mlx90632->lock);	866	mutex_init(&mlx90632->lock);
648	indio_dev->name = id->name;	867	indio_dev->name = id->name;
@@ -662,15 +881,20 @@ static int mlx90632_probe(struct i2c_client *client, · 13 unmodified lines
662	dev_err(&client->dev, "read of version failed: %d\n", ret);	881	dev_err(&client->dev, "read of version failed: %d\n", ret);
663	return ret;	882	return ret;
664	}	883	}
		884	read = read & MLX90632_ID_MASK;
665	if (read == MLX90632_ID_MEDICAL) {	885	if (read == MLX90632_ID_MEDICAL) {
666	dev_dbg(&client->dev,	886	dev_dbg(&client->dev,
667	"Detected Medical EEPROM calibration %x\n", read);	887	"Detected Medical EEPROM calibration %x\n", read);
668	} else if (read == MLX90632_ID_CONSUMER) {	888	} else if (read == MLX90632_ID_CONSUMER) {
669	dev_dbg(&client->dev,	889	dev_dbg(&client->dev,
670	"Detected Consumer EEPROM calibration %x\n", read);	890	"Detected Consumer EEPROM calibration %x\n", read);
		891	} else if (read == MLX90632_ID_EXTENDED) {
		892	dev_dbg(&client->dev,
		893	"Detected Extended range EEPROM calibration %x\n", read);
		894	mlx90632->mtyp = MLX90632_MTYP_EXTENDED;
671	} else if ((read & MLX90632_DSP_MASK) == MLX90632_DSP_VERSION) {	895	} else if ((read & MLX90632_DSP_MASK) == MLX90632_DSP_VERSION) {
672	dev_dbg(&client->dev,	896	dev_dbg(&client->dev,
673	"Detected Unknown EEPROM calibration %x\n", read);	897	"Detected Unknown EEPROM calibration %x\n", read);
674	} else {	898	} else {
675	dev_err(&client->dev,	899	dev_err(&client->dev,
676	"Wrong DSP version %x (expected %x)\n",	900	"Wrong DSP version %x (expected %x)\n",
@@ -679,6 +903,7 @@ static int mlx90632_probe(struct i2c_client *client, · 2 unmodified lines
679	}	903	}
680		904
681	mlx90632->emissivity = 1000;	905	mlx90632->emissivity = 1000;
		906	mlx90632->object_ambient_temperature = 25000; /* 25 degrees milliCelsius */
682		907
683	pm_runtime_disable(&client->dev);	908	pm_runtime_disable(&client->dev);
684	ret = pm_runtime_set_active(&client->dev);	909	ret = pm_runtime_set_active(&client->dev);

drivers/iio/temperature/tmp007.c+2−2

@@ -20,7 +20,7 @@ · 19 unmodified lines
20	#include <linux/module.h>	20	#include <linux/module.h>
21	#include <linux/pm.h>	21	#include <linux/pm.h>
22	#include <linux/bitops.h>	22	#include <linux/bitops.h>
23	#include <linux/of.h>	23	#include <linux/mod_devicetable.h>
24	#include <linux/irq.h>	24	#include <linux/irq.h>
25	#include <linux/interrupt.h>	25	#include <linux/interrupt.h>
26		26
@@ -578,7 +578,7 @@ MODULE_DEVICE_TABLE(i2c, tmp007_id); · 551 unmodified lines
578	static struct i2c_driver tmp007_driver = {	578	static struct i2c_driver tmp007_driver = {
579	.driver = {	579	.driver = {
580	.name = "tmp007",	580	.name = "tmp007",
581	.of_match_table = of_match_ptr(tmp007_of_match),	581	.of_match_table = tmp007_of_match,
582	.pm = &tmp007_pm_ops,	582	.pm = &tmp007_pm_ops,
583	},	583	},
584	.probe = tmp007_probe,	584	.probe = tmp007_probe,

drivers/iio/temperature/tsys01.c+2−1

 #include <linux/device.h>
 #include <linux/mutex.h>
 #include <linux/module.h>
+#include <linux/mod_devicetable.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/stat.h>
 	.id_table = tsys01_id,
 	.driver = {
 		   .name = "tsys01",
-		   .of_match_table = of_match_ptr(tsys01_of_match),
+		   .of_match_table = tsys01_of_match,
 		   },
 };

drivers/most/Kconfig+9−0

@@ -23,4 +23,13 @@ config MOST_USB_HDM · 22 unmodified lines
23		23
24	To compile this driver as a module, choose M here: the	24	To compile this driver as a module, choose M here: the
25	module will be called most_usb.	25	module will be called most_usb.
		26
		27	config MOST_CDEV
		28	tristate "Cdev"
		29
		30	help
		31	Say Y here if you want to commumicate via character devices.
		32
		33	To compile this driver as a module, choose M here: the
		34	module will be called most_cdev.
26	endif	35	endif

drivers/most/Makefile+1−0

@@ -4,3 +4,4 @@ most_core-y := core.o \ · 3 unmodified lines
4	configfs.o	4	configfs.o
5		5
6	obj-$(CONFIG_MOST_USB_HDM) += most_usb.o	6	obj-$(CONFIG_MOST_USB_HDM) += most_usb.o
		7	obj-$(CONFIG_MOST_CDEV) += most_cdev.o

drivers/most/most_cdev.crenamed from drivers/staging/most/cdev/cdev.c+0−0

File renamed without changes.

drivers/net/wireless/microchip/wilc1000/spi.c+3−2

 	wilc->dev_irq_num = spi->irq;
 	wilc->rtc_clk = devm_clk_get(&spi->dev, "rtc_clk");
-	if (PTR_ERR_OR_ZERO(wilc->rtc_clk) == -EPROBE_DEFER)
+	if (PTR_ERR_OR_ZERO(wilc->rtc_clk) == -EPROBE_DEFER) {
+		kfree(spi_priv);
 		return -EPROBE_DEFER;
-	else if (!IS_ERR(wilc->rtc_clk))
+	} else if (!IS_ERR(wilc->rtc_clk))
 		clk_prepare_enable(wilc->rtc_clk);
 	return 0;

drivers/staging/Kconfig+2−0

@@ -116,4 +116,6 @@ source "drivers/staging/qlge/Kconfig" · 115 unmodified lines
116		116
117	source "drivers/staging/wfx/Kconfig"	117	source "drivers/staging/wfx/Kconfig"
118		118
		119	source "drivers/staging/hikey9xx/Kconfig"
		120
119	endif # STAGING	121	endif # STAGING

drivers/staging/Makefile+1−0

@@ -48,3 +48,4 @@ obj-$(CONFIG_FIELDBUS_DEV) += fieldbus/ · 47 unmodified lines
48	obj-$(CONFIG_KPC2000) += kpc2000/	48	obj-$(CONFIG_KPC2000) += kpc2000/
49	obj-$(CONFIG_QLGE) += qlge/	49	obj-$(CONFIG_QLGE) += qlge/
50	obj-$(CONFIG_WFX) += wfx/	50	obj-$(CONFIG_WFX) += wfx/
		51	obj-y += hikey9xx/

drivers/staging/android/ion/ion.c+3−3

@@ -205,8 +205,8 @@ static int ion_dma_buf_attach(struct dma_buf *dmabuf, · 204 unmodified lines
205	return 0;	205	return 0;
206	}	206	}
207		207
208	static void ion_dma_buf_detatch(struct dma_buf *dmabuf,	208	static void ion_dma_buf_detach(struct dma_buf *dmabuf,
209	struct dma_buf_attachment *attachment)	209	struct dma_buf_attachment *attachment)
210	{	210	{
211	struct ion_dma_buf_attachment *a = attachment->priv;	211	struct ion_dma_buf_attachment *a = attachment->priv;
212	struct ion_buffer *buffer = dmabuf->priv;	212	struct ion_buffer *buffer = dmabuf->priv;
@@ -331,7 +331,7 @@ static const struct dma_buf_ops dma_buf_ops = { · 118 unmodified lines
331	.mmap = ion_mmap,	331	.mmap = ion_mmap,
332	.release = ion_dma_buf_release,	332	.release = ion_dma_buf_release,
333	.attach = ion_dma_buf_attach,	333	.attach = ion_dma_buf_attach,
334	.detach = ion_dma_buf_detatch,	334	.detach = ion_dma_buf_detach,
335	.begin_cpu_access = ion_dma_buf_begin_cpu_access,	335	.begin_cpu_access = ion_dma_buf_begin_cpu_access,
336	.end_cpu_access = ion_dma_buf_end_cpu_access,	336	.end_cpu_access = ion_dma_buf_end_cpu_access,
337	};	337	};

drivers/staging/comedi/comedi.h+2−2

@@ -680,7 +680,7 @@ struct comedi_rangeinfo { · 679 unmodified lines
680	* value of 1 volt.	680	* value of 1 volt.
681	*	681	*
682	* The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the	682	* The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the
683	* the range needs to be multiplied by an external reference.	683	* range needs to be multiplied by an external reference.
684	*/	684	*/
685	struct comedi_krange {	685	struct comedi_krange {
686	int min;	686	int min;
@@ -970,7 +970,7 @@ enum i8254_mode { · 283 unmodified lines
970	* major reasons exist why this caused major confusion for users:	970	* major reasons exist why this caused major confusion for users:
971	* 1) The register values are _NOT_ in user documentation, but rather in	971	* 1) The register values are _NOT_ in user documentation, but rather in
972	* arcane locations, such as a few register programming manuals that are	972	* arcane locations, such as a few register programming manuals that are
973	* increasingly hard to find and the NI MHDDK (comments in in example code).	973	* increasingly hard to find and the NI MHDDK (comments in example code).
974	* There is no one place to find the various valid values of the registers.	974	* There is no one place to find the various valid values of the registers.
975	* 2) The register values are _NOT_ completely consistent. There is no way to	975	* 2) The register values are _NOT_ completely consistent. There is no way to
976	* gain any sense of intuition of which values, or even enums one should use	976	* gain any sense of intuition of which values, or even enums one should use

drivers/staging/comedi/comedidev.h+1−1

@@ -627,7 +627,7 @@ extern const struct comedi_lrange range_unknown; · 626 unmodified lines
627	* @range: Array of &struct comedi_krange, one for each range.	627	* @range: Array of &struct comedi_krange, one for each range.
628	*	628	*
629	* Each element of @range[] describes the minimum and maximum physical range	629	* Each element of @range[] describes the minimum and maximum physical range
630	* range and the type of units. Typically, the type of unit is %UNIT_volt	630	* and the type of units. Typically, the type of unit is %UNIT_volt
631	* (i.e. volts) and the minimum and maximum are in millionths of a volt.	631	* (i.e. volts) and the minimum and maximum are in millionths of a volt.
632	* There may also be a flag that indicates the minimum and maximum are merely	632	* There may also be a flag that indicates the minimum and maximum are merely
633	* scale factors for an unknown, external reference.	633	* scale factors for an unknown, external reference.

drivers/staging/comedi/drivers/addi_apci_1564.c+2−2

@@ -544,7 +544,7 @@ static int apci1564_timer_insn_write(struct comedi_device *dev, · 543 unmodified lines
544	{	544	{
545	struct apci1564_private *devpriv = dev->private;	545	struct apci1564_private *devpriv = dev->private;
546		546
547	/* just write the last last to the reload register */	547	/* just write the last to the reload register */
548	if (insn->n) {	548	if (insn->n) {
549	unsigned int val = data[insn->n - 1];	549	unsigned int val = data[insn->n - 1];
550		550
@@ -628,7 +628,7 @@ static int apci1564_counter_insn_write(struct comedi_device *dev, · 77 unmodified lines
628	unsigned int chan = CR_CHAN(insn->chanspec);	628	unsigned int chan = CR_CHAN(insn->chanspec);
629	unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);	629	unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan);
630		630
631	/* just write the last last to the reload register */	631	/* just write the last to the reload register */
632	if (insn->n) {	632	if (insn->n) {
633	unsigned int val = data[insn->n - 1];	633	unsigned int val = data[insn->n - 1];
634		634

drivers/staging/comedi/drivers/comedi_8255.c+1−1

@@ -248,7 +248,7 @@ EXPORT_SYMBOL_GPL(subdev_8255_mm_init); · 247 unmodified lines
248	* subdev_8255_regbase - get offset of 8255 registers or call-back context	248	* subdev_8255_regbase - get offset of 8255 registers or call-back context
249	* @s: comedi subdevice	249	* @s: comedi subdevice
250	*	250	*
251	* Returns the 'regbase' parameter that was previously passed to to	251	* Returns the 'regbase' parameter that was previously passed to
252	* subdev_8255_init() or subdev_8255_mm_init() to set up the subdevice.	252	* subdev_8255_init() or subdev_8255_mm_init() to set up the subdevice.
253	* Only valid if the subdevice was set up successfully.	253	* Only valid if the subdevice was set up successfully.
254	*/	254	*/

drivers/staging/comedi/drivers/ni_tiocmd.c+1−1

@@ -286,7 +286,7 @@ int ni_tio_cmdtest(struct comedi_device *dev, · 285 unmodified lines
286	* This should be done, but we don't yet know the actual	286	* This should be done, but we don't yet know the actual
287	* register values. These should be tested and then documented	287	* register values. These should be tested and then documented
288	* in the ni_route_values/ni_*.csv files, with indication of	288	* in the ni_route_values/ni_*.csv files, with indication of
289	* who/when/which/how these these were tested.	289	* who/when/which/how these were tested.
290	* When at least a e/m/660x series have been tested, this code	290	* When at least a e/m/660x series have been tested, this code
291	* should be uncommented:	291	* should be uncommented:
292	*	292	*

drivers/staging/comedi/drivers/pcl726.c+1−1

@@ -389,7 +389,7 @@ static int pcl726_attach(struct comedi_device *dev, · 388 unmodified lines
389	}	389	}
390		390
391	if (dev->irq) {	391	if (dev->irq) {
392	/* Digial Input subdevice - Interrupt support */	392	/* Digital Input subdevice - Interrupt support */
393	s = &dev->subdevices[subdev++];	393	s = &dev->subdevices[subdev++];
394	dev->read_subdev = s;	394	dev->read_subdev = s;
395	s->type = COMEDI_SUBD_DI;	395	s->type = COMEDI_SUBD_DI;

drivers/staging/comedi/drivers/pcmuio.c+1−1

@@ -48,7 +48,7 @@ · 47 unmodified lines
48	*	48	*
49	* In the 48-channel version:	49	* In the 48-channel version:
50	*	50	*
51	* On subdev 0, the first 24 channels channels are edge-detect channels.	51	* On subdev 0, the first 24 channels are edge-detect channels.
52	*	52	*
53	* In the 96-channel board you have the following channels that can do edge	53	* In the 96-channel board you have the following channels that can do edge
54	* detection:	54	* detection:

drivers/staging/comedi/drivers/quatech_daqp_cs.c+1−1

@@ -164,7 +164,7 @@ static int daqp_clear_events(struct comedi_device *dev, int loops) · 163 unmodified lines
164		164
165	/*	165	/*
166	* Reset any pending interrupts (my card has a tendency to require	166	* Reset any pending interrupts (my card has a tendency to require
167	* require multiple reads on the status register to achieve this).	167	* multiple reads on the status register to achieve this).
168	*/	168	*/
169	while (--loops) {	169	while (--loops) {
170	status = inb(dev->iobase + DAQP_STATUS_REG);	170	status = inb(dev->iobase + DAQP_STATUS_REG);

drivers/staging/comedi/drivers/vmk80xx.c+3−0

@@ -667,6 +667,9 @@ static int vmk80xx_find_usb_endpoints(struct comedi_device *dev) · 666 unmodified lines
667	if (!devpriv->ep_rx \|\| !devpriv->ep_tx)	667	if (!devpriv->ep_rx \|\| !devpriv->ep_tx)
668	return -ENODEV;	668	return -ENODEV;
669		669
		670	if (!usb_endpoint_maxp(devpriv->ep_rx) \|\| !usb_endpoint_maxp(devpriv->ep_tx))
		671	return -EINVAL;
		672
670	return 0;	673	return 0;
671	}	674	}
672		675

drivers/staging/emxx_udc/Kconfig+1−1

@@ -1,7 +1,7 @@
1	# SPDX-License-Identifier: GPL-2.0	1	# SPDX-License-Identifier: GPL-2.0
2	config USB_EMXX	2	config USB_EMXX
3	tristate "EMXX USB Function Device Controller"	3	tristate "EMXX USB Function Device Controller"
4	depends on USB_GADGET && (ARCH_RENESAS \|\| (ARM && COMPILE_TEST))	4	depends on USB_GADGET && (ARCH_RENESAS \|\| COMPILE_TEST)
5	help	5	help
6	The Emma Mobile series of SoCs from Renesas Electronics and	6	The Emma Mobile series of SoCs from Renesas Electronics and
7	former NEC Electronics include USB Function hardware.	7	former NEC Electronics include USB Function hardware.

drivers/staging/emxx_udc/emxx_udc.c+9−10

 	u32		dmacnt;
 	u32		burst = 1;
 	u32		data;
-	int		result = -EINVAL;
+	int		result;
 	struct fc_regs __iomem *preg = udc->p_regs;
 	if (req->dma_flag)
 			_nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
 		} else {
-			/* Clear STALL */
-			ep->stalled = false;
 			if (ep_adrs & USB_DIR_IN) {
 				_nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
 						, EPN_ISTL);
 						, data);
 			}
+			/* Clear STALL */
 			ep->stalled = false;
 			if (ep->halted) {
 				ep->halted = false;
 	_nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
-		_nbu2ss_writel(&udc->p_regs->AHBMCTR,
+	_nbu2ss_writel(&udc->p_regs->AHBMCTR,
-			       HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
+		       HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
 	while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
 		waitcnt++;
 		}
 	}
-		_nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
+	_nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
 	_nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
 	if (req->unaligned) {
 		if (!ep->virt_buf)
-			ep->virt_buf = dma_alloc_coherent(NULL, PAGE_SIZE,
+			ep->virt_buf = dma_alloc_coherent(udc->dev, PAGE_SIZE,
 							  &ep->phys_buf,
 							  GFP_ATOMIC | GFP_DMA);
 		if (ep->epnum > 0)  {
  */
 static int nbu2ss_drv_probe(struct platform_device *pdev)
 {
-	int	status = -ENODEV;
+	int status;
-	struct nbu2ss_udc	*udc;
+	struct nbu2ss_udc *udc;
 	int irq;
 	void __iomem *mmio_base;
 	for (i = 0; i < NUM_ENDPOINTS; i++) {
 		ep = &udc->ep[i];
 		if (ep->virt_buf)
-			dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
+			dma_free_coherent(udc->dev, PAGE_SIZE, (void *)ep->virt_buf,
 					  ep->phys_buf);
 	}

drivers/staging/emxx_udc/emxx_udc.h+211−250

@@ -9,11 +9,6 @@ · 8 unmodified lines
9	#define _LINUX_EMXX_H	9	#define _LINUX_EMXX_H
10		10
11	/---------------------------------------------------------------------------/	11	/---------------------------------------------------------------------------/
12	/----------------- Default undef /
13	#if 0
14	#define DEBUG
15	#define UDC_DEBUG_DUMP
16	#endif
17		12
18	/----------------- Default define /	13	/----------------- Default define /
19	#define USE_DMA 1	14	#define USE_DMA 1
@@ -52,197 +47,163 @@ int vbus_irq; · 32 unmodified lines
52	#define U2F_ENABLE 1	47	#define U2F_ENABLE 1
53	#define U2F_DISABLE 0	48	#define U2F_DISABLE 0
54		49
55	/------- BIT /	50	#define TEST_FORCE_ENABLE (BIT(18) \| BIT(16))
56	#define BIT00 0x00000001	51
57	#define BIT01 0x00000002	52	#define INT_SEL BIT(10)
58	#define BIT02 0x00000004	53	#define CONSTFS BIT(9)
59	#define BIT03 0x00000008	54	#define SOF_RCV BIT(8)
60	#define BIT04 0x00000010	55	#define RSUM_IN BIT(7)
61	#define BIT05 0x00000020	56	#define SUSPEND BIT(6)
62	#define BIT06 0x00000040	57	#define CONF BIT(5)
63	#define BIT07 0x00000080	58	#define DEFAULT BIT(4)
64	#define BIT08 0x00000100	59	#define CONNECTB BIT(3)
65	#define BIT09 0x00000200	60	#define PUE2 BIT(2)
66	#define BIT10 0x00000400
67	#define BIT11 0x00000800
68	#define BIT12 0x00001000
69	#define BIT13 0x00002000
70	#define BIT14 0x00004000
71	#define BIT15 0x00008000
72	#define BIT16 0x00010000
73	#define BIT17 0x00020000
74	#define BIT18 0x00040000
75	#define BIT19 0x00080000
76	#define BIT20 0x00100000
77	#define BIT21 0x00200000
78	#define BIT22 0x00400000
79	#define BIT23 0x00800000
80	#define BIT24 0x01000000
81	#define BIT25 0x02000000
82	#define BIT26 0x04000000
83	#define BIT27 0x08000000
84	#define BIT28 0x10000000
85	#define BIT29 0x20000000
86	#define BIT30 0x40000000
87	#define BIT31 0x80000000
88
89	#define TEST_FORCE_ENABLE (BIT18 + BIT16)
90
91	#define INT_SEL BIT10
92	#define CONSTFS BIT09
93	#define SOF_RCV BIT08
94	#define RSUM_IN BIT07
95	#define SUSPEND BIT06
96	#define CONF BIT05
97	#define DEFAULT BIT04
98	#define CONNECTB BIT03
99	#define PUE2 BIT02
100		61
101	#define MAX_TEST_MODE_NUM 0x05	62	#define MAX_TEST_MODE_NUM 0x05
102	#define TEST_MODE_SHIFT 16	63	#define TEST_MODE_SHIFT 16
103		64
104	/------- (0x0004) USB Status Register /	65	/------- (0x0004) USB Status Register /
105	#define SPEED_MODE BIT06	66	#define SPEED_MODE BIT(6)
106	#define HIGH_SPEED BIT06	67	#define HIGH_SPEED BIT(6)
107		68
108	#define CONF BIT05	69	#define CONF BIT(5)
109	#define DEFAULT BIT04	70	#define DEFAULT BIT(4)
110	#define USB_RST BIT03	71	#define USB_RST BIT(3)
111	#define SPND_OUT BIT02	72	#define SPND_OUT BIT(2)
112	#define RSUM_OUT BIT01	73	#define RSUM_OUT BIT(1)
113		74
114	/------- (0x0008) USB Address Register /	75	/------- (0x0008) USB Address Register /
115	#define USB_ADDR 0x007F0000	76	#define USB_ADDR 0x007F0000
116	#define SOF_STATUS BIT15	77	#define SOF_STATUS BIT(15)
117	#define UFRAME (BIT14 + BIT13 + BIT12)	78	#define UFRAME (BIT(14) \| BIT(13) \| BIT(12))
118	#define FRAME 0x000007FF	79	#define FRAME 0x000007FF
119		80
120	#define USB_ADRS_SHIFT 16	81	#define USB_ADRS_SHIFT 16
121		82
122	/------- (0x000C) UTMI Characteristic 1 Register /	83	/------- (0x000C) UTMI Characteristic 1 Register /
123	#define SQUSET (BIT07 + BIT06 + BIT05 + BIT04)	84	#define SQUSET (BIT(7) \| BIT(6) \| BIT(5) \| BIT(4))
124		85
125	#define USB_SQUSET (BIT06 + BIT05 + BIT04)	86	#define USB_SQUSET (BIT(6) \| BIT(5) \| BIT(4))
126		87
127	/------- (0x0010) TEST Control Register /	88	/------- (0x0010) TEST Control Register /
128	#define FORCEHS BIT02	89	#define FORCEHS BIT(2)
129	#define CS_TESTMODEEN BIT01	90	#define CS_TESTMODEEN BIT(1)
130	#define LOOPBACK BIT00	91	#define LOOPBACK BIT(0)
131		92
132	/------- (0x0018) Setup Data 0 Register /	93	/------- (0x0018) Setup Data 0 Register /
133	/------- (0x001C) Setup Data 1 Register /	94	/------- (0x001C) Setup Data 1 Register /
134		95
135	/------- (0x0020) USB Interrupt Status Register /	96	/------- (0x0020) USB Interrupt Status Register /
136	#define EPN_INT 0x00FFFF00	97	#define EPN_INT 0x00FFFF00
137	#define EP15_INT BIT23	98	#define EP15_INT BIT(23)
138	#define EP14_INT BIT22	99	#define EP14_INT BIT(22)
139	#define EP13_INT BIT21	100	#define EP13_INT BIT(21)
140	#define EP12_INT BIT20	101	#define EP12_INT BIT(20)
141	#define EP11_INT BIT19	102	#define EP11_INT BIT(19)
142	#define EP10_INT BIT18	103	#define EP10_INT BIT(18)
143	#define EP9_INT BIT17	104	#define EP9_INT BIT(17)
144	#define EP8_INT BIT16	105	#define EP8_INT BIT(16)
145	#define EP7_INT BIT15	106	#define EP7_INT BIT(15)
146	#define EP6_INT BIT14	107	#define EP6_INT BIT(14)
147	#define EP5_INT BIT13	108	#define EP5_INT BIT(13)
148	#define EP4_INT BIT12	109	#define EP4_INT BIT(12)
149	#define EP3_INT BIT11	110	#define EP3_INT BIT(11)
150	#define EP2_INT BIT10	111	#define EP2_INT BIT(10)
151	#define EP1_INT BIT09	112	#define EP1_INT BIT(9)
152	#define EP0_INT BIT08	113	#define EP0_INT BIT(8)
153	#define SPEED_MODE_INT BIT06	114	#define SPEED_MODE_INT BIT(6)
154	#define SOF_ERROR_INT BIT05	115	#define SOF_ERROR_INT BIT(5)
155	#define SOF_INT BIT04	116	#define SOF_INT BIT(4)
156	#define USB_RST_INT BIT03	117	#define USB_RST_INT BIT(3)
157	#define SPND_INT BIT02	118	#define SPND_INT BIT(2)
158	#define RSUM_INT BIT01	119	#define RSUM_INT BIT(1)
159		120
160	#define USB_INT_STA_RW 0x7E	121	#define USB_INT_STA_RW 0x7E
161		122
162	/------- (0x0024) USB Interrupt Enable Register /	123	/------- (0x0024) USB Interrupt Enable Register /
163	#define EP15_0_EN 0x00FFFF00	124	#define EP15_0_EN 0x00FFFF00
164	#define EP15_EN BIT23	125	#define EP15_EN BIT(23)
165	#define EP14_EN BIT22	126	#define EP14_EN BIT(22)
166	#define EP13_EN BIT21	127	#define EP13_EN BIT(21)
167	#define EP12_EN BIT20	128	#define EP12_EN BIT(20)
168	#define EP11_EN BIT19	129	#define EP11_EN BIT(19)
169	#define EP10_EN BIT18	130	#define EP10_EN BIT(18)
170	#define EP9_EN BIT17	131	#define EP9_EN BIT(17)
171	#define EP8_EN BIT16	132	#define EP8_EN BIT(16)
172	#define EP7_EN BIT15	133	#define EP7_EN BIT(15)
173	#define EP6_EN BIT14	134	#define EP6_EN BIT(14)
174	#define EP5_EN BIT13	135	#define EP5_EN BIT(13)
175	#define EP4_EN BIT12	136	#define EP4_EN BIT(12)
176	#define EP3_EN BIT11	137	#define EP3_EN BIT(11)
177	#define EP2_EN BIT10	138	#define EP2_EN BIT(10)
178	#define EP1_EN BIT09	139	#define EP1_EN BIT(9)
179	#define EP0_EN BIT08	140	#define EP0_EN BIT(8)
180	#define SPEED_MODE_EN BIT06	141	#define SPEED_MODE_EN BIT(6)
181	#define SOF_ERROR_EN BIT05	142	#define SOF_ERROR_EN BIT(5)
182	#define SOF_EN BIT04	143	#define SOF_EN BIT(4)
183	#define USB_RST_EN BIT03	144	#define USB_RST_EN BIT(3)
184	#define SPND_EN BIT02	145	#define SPND_EN BIT(2)
185	#define RSUM_EN BIT01	146	#define RSUM_EN BIT(1)
186		147
187	#define USB_INT_EN_BIT \	148	#define USB_INT_EN_BIT \
188	(EP0_EN \| SPEED_MODE_EN \| USB_RST_EN \| SPND_EN \| RSUM_EN)	149	(EP0_EN \| SPEED_MODE_EN \| USB_RST_EN \| SPND_EN \| RSUM_EN)
189		150
190	/------- (0x0028) EP0 Control Register /	151	/------- (0x0028) EP0 Control Register /
191	#define EP0_STGSEL BIT18	152	#define EP0_STGSEL BIT(18)
192	#define EP0_OVERSEL BIT17	153	#define EP0_OVERSEL BIT(17)
193	#define EP0_AUTO BIT16	154	#define EP0_AUTO BIT(16)
194	#define EP0_PIDCLR BIT09	155	#define EP0_PIDCLR BIT(9)
195	#define EP0_BCLR BIT08	156	#define EP0_BCLR BIT(8)
196	#define EP0_DEND BIT07	157	#define EP0_DEND BIT(7)
197	#define EP0_DW (BIT06 + BIT05)	158	#define EP0_DW (BIT(6) \| BIT(5))
198	#define EP0_DW4 0	159	#define EP0_DW4 0
199	#define EP0_DW3 (BIT06 + BIT05)	160	#define EP0_DW3 (BIT(6) \| BIT(5))
200	#define EP0_DW2 BIT06	161	#define EP0_DW2 BIT(6)
201	#define EP0_DW1 BIT05	162	#define EP0_DW1 BIT(5)
202		163
203	#define EP0_INAK_EN BIT04	164	#define EP0_INAK_EN BIT(4)
204	#define EP0_PERR_NAK_CLR BIT03	165	#define EP0_PERR_NAK_CLR BIT(3)
205	#define EP0_STL BIT02	166	#define EP0_STL BIT(2)
206	#define EP0_INAK BIT01	167	#define EP0_INAK BIT(1)
207	#define EP0_ONAK BIT00	168	#define EP0_ONAK BIT(0)
208		169
209	/------- (0x002C) EP0 Status Register /	170	/------- (0x002C) EP0 Status Register /
210	#define EP0_PID BIT18	171	#define EP0_PID BIT(18)
211	#define EP0_PERR_NAK BIT17	172	#define EP0_PERR_NAK BIT(17)
212	#define EP0_PERR_NAK_INT BIT16	173	#define EP0_PERR_NAK_INT BIT(16)
213	#define EP0_OUT_NAK_INT BIT15	174	#define EP0_OUT_NAK_INT BIT(15)
214	#define EP0_OUT_NULL BIT14	175	#define EP0_OUT_NULL BIT(14)
215	#define EP0_OUT_FULL BIT13	176	#define EP0_OUT_FULL BIT(13)
216	#define EP0_OUT_EMPTY BIT12	177	#define EP0_OUT_EMPTY BIT(12)
217	#define EP0_IN_NAK_INT BIT11	178	#define EP0_IN_NAK_INT BIT(11)
218	#define EP0_IN_DATA BIT10	179	#define EP0_IN_DATA BIT(10)
219	#define EP0_IN_FULL BIT09	180	#define EP0_IN_FULL BIT(9)
220	#define EP0_IN_EMPTY BIT08	181	#define EP0_IN_EMPTY BIT(8)
221	#define EP0_OUT_NULL_INT BIT07	182	#define EP0_OUT_NULL_INT BIT(7)
222	#define EP0_OUT_OR_INT BIT06	183	#define EP0_OUT_OR_INT BIT(6)
223	#define EP0_OUT_INT BIT05	184	#define EP0_OUT_INT BIT(5)
224	#define EP0_IN_INT BIT04	185	#define EP0_IN_INT BIT(4)
225	#define EP0_STALL_INT BIT03	186	#define EP0_STALL_INT BIT(3)
226	#define STG_END_INT BIT02	187	#define STG_END_INT BIT(2)
227	#define STG_START_INT BIT01	188	#define STG_START_INT BIT(1)
228	#define SETUP_INT BIT00	189	#define SETUP_INT BIT(0)
229		190
230	#define EP0_STATUS_RW_BIT (BIT16 \| BIT15 \| BIT11 \| 0xFF)	191	#define EP0_STATUS_RW_BIT (BIT(16) \| BIT(15) \| BIT(11) \| 0xFF)
231		192
232	/------- (0x0030) EP0 Interrupt Enable Register /	193	/------- (0x0030) EP0 Interrupt Enable Register /
233	#define EP0_PERR_NAK_EN BIT16	194	#define EP0_PERR_NAK_EN BIT(16)
234	#define EP0_OUT_NAK_EN BIT15	195	#define EP0_OUT_NAK_EN BIT(15)
235		196
236	#define EP0_IN_NAK_EN BIT11	197	#define EP0_IN_NAK_EN BIT(11)
237		198
238	#define EP0_OUT_NULL_EN BIT07	199	#define EP0_OUT_NULL_EN BIT(7)
239	#define EP0_OUT_OR_EN BIT06	200	#define EP0_OUT_OR_EN BIT(6)
240	#define EP0_OUT_EN BIT05	201	#define EP0_OUT_EN BIT(5)
241	#define EP0_IN_EN BIT04	202	#define EP0_IN_EN BIT(4)
242	#define EP0_STALL_EN BIT03	203	#define EP0_STALL_EN BIT(3)
243	#define STG_END_EN BIT02	204	#define STG_END_EN BIT(2)
244	#define STG_START_EN BIT01	205	#define STG_START_EN BIT(1)
245	#define SETUP_EN BIT00	206	#define SETUP_EN BIT(0)
246		207
247	#define EP0_INT_EN_BIT \	208	#define EP0_INT_EN_BIT \
248	(EP0_OUT_OR_EN \| EP0_OUT_EN \| EP0_IN_EN \| STG_END_EN \| SETUP_EN)	209	(EP0_OUT_OR_EN \| EP0_OUT_EN \| EP0_IN_EN \| STG_END_EN \| SETUP_EN)
@@ -254,90 +215,90 @@ int vbus_irq; · 5 unmodified lines
254	/------- (0x003C) EP0 Write Register /	215	/------- (0x003C) EP0 Write Register /
255		216
256	/------- (0x0040:) EPN Control Register /	217	/------- (0x0040:) EPN Control Register /
257	#define EPN_EN BIT31	218	#define EPN_EN BIT(31)
258	#define EPN_BUF_TYPE BIT30	219	#define EPN_BUF_TYPE BIT(30)
259	#define EPN_BUF_SINGLE BIT30	220	#define EPN_BUF_SINGLE BIT(30)
260		221
261	#define EPN_DIR0 BIT26	222	#define EPN_DIR0 BIT(26)
262	#define EPN_MODE (BIT25 + BIT24)	223	#define EPN_MODE (BIT(25) \| BIT(24))
263	#define EPN_BULK 0	224	#define EPN_BULK 0
264	#define EPN_INTERRUPT BIT24	225	#define EPN_INTERRUPT BIT(24)
265	#define EPN_ISO BIT25	226	#define EPN_ISO BIT(25)
266		227
267	#define EPN_OVERSEL BIT17	228	#define EPN_OVERSEL BIT(17)
268	#define EPN_AUTO BIT16	229	#define EPN_AUTO BIT(16)
269		230
270	#define EPN_IPIDCLR BIT11	231	#define EPN_IPIDCLR BIT(11)
271	#define EPN_OPIDCLR BIT10	232	#define EPN_OPIDCLR BIT(10)
272	#define EPN_BCLR BIT09	233	#define EPN_BCLR BIT(9)
273	#define EPN_CBCLR BIT08	234	#define EPN_CBCLR BIT(8)
274	#define EPN_DEND BIT07	235	#define EPN_DEND BIT(7)
275	#define EPN_DW (BIT06 + BIT05)	236	#define EPN_DW (BIT(6) \| BIT(5))
276	#define EPN_DW4 0	237	#define EPN_DW4 0
277	#define EPN_DW3 (BIT06 + BIT05)	238	#define EPN_DW3 (BIT(6) \| BIT(5))
278	#define EPN_DW2 BIT06	239	#define EPN_DW2 BIT(6)
279	#define EPN_DW1 BIT05	240	#define EPN_DW1 BIT(5)
280		241
281	#define EPN_OSTL_EN BIT04	242	#define EPN_OSTL_EN BIT(4)
282	#define EPN_ISTL BIT03	243	#define EPN_ISTL BIT(3)
283	#define EPN_OSTL BIT02	244	#define EPN_OSTL BIT(2)
284		245
285	#define EPN_ONAK BIT00	246	#define EPN_ONAK BIT(0)
286		247
287	/------- (0x0044:) EPN Status Register /	248	/------- (0x0044:) EPN Status Register /
288	#define EPN_ISO_PIDERR BIT29 /* R */	249	#define EPN_ISO_PIDERR BIT(29) /* R */
289	#define EPN_OPID BIT28 /* R */	250	#define EPN_OPID BIT(28) /* R */
290	#define EPN_OUT_NOTKN BIT27 /* R */	251	#define EPN_OUT_NOTKN BIT(27) /* R */
291	#define EPN_ISO_OR BIT26 /* R */	252	#define EPN_ISO_OR BIT(26) /* R */
292		253
293	#define EPN_ISO_CRC BIT24 /* R */	254	#define EPN_ISO_CRC BIT(24) /* R */
294	#define EPN_OUT_END_INT BIT23 /* RW */	255	#define EPN_OUT_END_INT BIT(23) /* RW */
295	#define EPN_OUT_OR_INT BIT22 /* RW */	256	#define EPN_OUT_OR_INT BIT(22) /* RW */
296	#define EPN_OUT_NAK_ERR_INT BIT21 /* RW */	257	#define EPN_OUT_NAK_ERR_INT BIT(21) /* RW */
297	#define EPN_OUT_STALL_INT BIT20 /* RW */	258	#define EPN_OUT_STALL_INT BIT(20) /* RW */
298	#define EPN_OUT_INT BIT19 /* RW */	259	#define EPN_OUT_INT BIT(19) /* RW */
299	#define EPN_OUT_NULL_INT BIT18 /* RW */	260	#define EPN_OUT_NULL_INT BIT(18) /* RW */
300	#define EPN_OUT_FULL BIT17 /* R */	261	#define EPN_OUT_FULL BIT(17) /* R */
301	#define EPN_OUT_EMPTY BIT16 /* R */	262	#define EPN_OUT_EMPTY BIT(16) /* R */
302		263
303	#define EPN_IPID BIT10 /* R */	264	#define EPN_IPID BIT(10) /* R */
304	#define EPN_IN_NOTKN BIT09 /* R */	265	#define EPN_IN_NOTKN BIT(9) /* R */
305	#define EPN_ISO_UR BIT08 /* R */	266	#define EPN_ISO_UR BIT(8) /* R */
306	#define EPN_IN_END_INT BIT07 /* RW */	267	#define EPN_IN_END_INT BIT(7) /* RW */
307		268
308	#define EPN_IN_NAK_ERR_INT BIT05 /* RW */	269	#define EPN_IN_NAK_ERR_INT BIT(5) /* RW */
309	#define EPN_IN_STALL_INT BIT04 /* RW */	270	#define EPN_IN_STALL_INT BIT(4) /* RW */
310	#define EPN_IN_INT BIT03 /* RW */	271	#define EPN_IN_INT BIT(3) /* RW */
311	#define EPN_IN_DATA BIT02 /* R */	272	#define EPN_IN_DATA BIT(2) /* R */
312	#define EPN_IN_FULL BIT01 /* R */	273	#define EPN_IN_FULL BIT(1) /* R */
313	#define EPN_IN_EMPTY BIT00 /* R */	274	#define EPN_IN_EMPTY BIT(0) /* R */
314		275
315	#define EPN_INT_EN \	276	#define EPN_INT_EN \
316	(EPN_OUT_END_INT \| EPN_OUT_INT \| EPN_IN_END_INT \| EPN_IN_INT)	277	(EPN_OUT_END_INT \| EPN_OUT_INT \| EPN_IN_END_INT \| EPN_IN_INT)
317		278
318	/------- (0x0048:) EPN Interrupt Enable Register /	279	/------- (0x0048:) EPN Interrupt Enable Register /
319	#define EPN_OUT_END_EN BIT23 /* RW */	280	#define EPN_OUT_END_EN BIT(23) /* RW */
320	#define EPN_OUT_OR_EN BIT22 /* RW */	281	#define EPN_OUT_OR_EN BIT(22) /* RW */
321	#define EPN_OUT_NAK_ERR_EN BIT21 /* RW */	282	#define EPN_OUT_NAK_ERR_EN BIT(21) /* RW */
322	#define EPN_OUT_STALL_EN BIT20 /* RW */	283	#define EPN_OUT_STALL_EN BIT(20) /* RW */
323	#define EPN_OUT_EN BIT19 /* RW */	284	#define EPN_OUT_EN BIT(19) /* RW */
324	#define EPN_OUT_NULL_EN BIT18 /* RW */	285	#define EPN_OUT_NULL_EN BIT(18) /* RW */
325		286
326	#define EPN_IN_END_EN BIT07 /* RW */	287	#define EPN_IN_END_EN BIT(7) /* RW */
327		288
328	#define EPN_IN_NAK_ERR_EN BIT05 /* RW */	289	#define EPN_IN_NAK_ERR_EN BIT(5) /* RW */
329	#define EPN_IN_STALL_EN BIT04 /* RW */	290	#define EPN_IN_STALL_EN BIT(4) /* RW */
330	#define EPN_IN_EN BIT03 /* RW */	291	#define EPN_IN_EN BIT(3) /* RW */
331		292
332	/------- (0x004C:) EPN Interrupt Enable Register /	293	/------- (0x004C:) EPN Interrupt Enable Register /
333	#define EPN_STOP_MODE BIT11	294	#define EPN_STOP_MODE BIT(11)
334	#define EPN_DEND_SET BIT10	295	#define EPN_DEND_SET BIT(10)
335	#define EPN_BURST_SET BIT09	296	#define EPN_BURST_SET BIT(9)
336	#define EPN_STOP_SET BIT08	297	#define EPN_STOP_SET BIT(8)
337		298
338	#define EPN_DMA_EN BIT04	299	#define EPN_DMA_EN BIT(4)
339		300
340	#define EPN_DMAMODE0 BIT00	301	#define EPN_DMAMODE0 BIT(0)
341		302
342	/------- (0x0050:) EPN MaxPacket & BaseAddress Register /	303	/------- (0x0050:) EPN MaxPacket & BaseAddress Register /
343	#define EPN_BASEAD 0x1FFF0000	304	#define EPN_BASEAD 0x1FFF0000
@@ -351,62 +312,62 @@ int vbus_irq; · 7 unmodified lines
351	/------- (0x005C:) EPN Write Register /	312	/------- (0x005C:) EPN Write Register /
352		313
353	/------- (0x1000) AHBSCTR Register /	314	/------- (0x1000) AHBSCTR Register /
354	#define WAIT_MODE BIT00	315	#define WAIT_MODE BIT(0)
355		316
356	/------- (0x1004) AHBMCTR Register /	317	/------- (0x1004) AHBMCTR Register /
357	#define ARBITER_CTR BIT31 /* RW */	318	#define ARBITER_CTR BIT(31) /* RW */
358	#define MCYCLE_RST BIT12 /* RW */	319	#define MCYCLE_RST BIT(12) /* RW */
359		320
360	#define ENDIAN_CTR (BIT09 + BIT08) /* RW */	321	#define ENDIAN_CTR (BIT(9) \| BIT(8)) /* RW */
361	#define ENDIAN_BYTE_SWAP BIT09	322	#define ENDIAN_BYTE_SWAP BIT(9)
362	#define ENDIAN_HALF_WORD_SWAP ENDIAN_CTR	323	#define ENDIAN_HALF_WORD_SWAP ENDIAN_CTR
363		324
364	#define HBUSREQ_MODE BIT05 /* RW */	325	#define HBUSREQ_MODE BIT(5) /* RW */
365	#define HTRANS_MODE BIT04 /* RW */	326	#define HTRANS_MODE BIT(4) /* RW */
366		327
367	#define WBURST_TYPE BIT02 /* RW */	328	#define WBURST_TYPE BIT(2) /* RW */
368	#define BURST_TYPE (BIT01 + BIT00) /* RW */	329	#define BURST_TYPE (BIT(1) \| BIT(0)) /* RW */
369	#define BURST_MAX_16 0	330	#define BURST_MAX_16 0
370	#define BURST_MAX_8 BIT00	331	#define BURST_MAX_8 BIT(0)
371	#define BURST_MAX_4 BIT01	332	#define BURST_MAX_4 BIT(1)
372	#define BURST_SINGLE BURST_TYPE	333	#define BURST_SINGLE BURST_TYPE
373		334
374	/------- (0x1008) AHBBINT Register /	335	/------- (0x1008) AHBBINT Register /
375	#define DMA_ENDINT 0xFFFE0000 /* RW */	336	#define DMA_ENDINT 0xFFFE0000 /* RW */
376		337
377	#define AHB_VBUS_INT BIT13 /* RW */	338	#define AHB_VBUS_INT BIT(13) /* RW */
378		339
379	#define MBUS_ERRINT BIT06 /* RW */	340	#define MBUS_ERRINT BIT(6) /* RW */
380		341
381	#define SBUS_ERRINT0 BIT04 /* RW */	342	#define SBUS_ERRINT0 BIT(4) /* RW */
382	#define ERR_MASTER 0x0000000F /* R */	343	#define ERR_MASTER 0x0000000F /* R */
383		344
384	/------- (0x100C) AHBBINTEN Register /	345	/------- (0x100C) AHBBINTEN Register /
385	#define DMA_ENDINTEN 0xFFFE0000 /* RW */	346	#define DMA_ENDINTEN 0xFFFE0000 /* RW */
386		347
387	#define VBUS_INTEN BIT13 /* RW */	348	#define VBUS_INTEN BIT(13) /* RW */
388		349
389	#define MBUS_ERRINTEN BIT06 /* RW */	350	#define MBUS_ERRINTEN BIT(6) /* RW */
390		351
391	#define SBUS_ERRINT0EN BIT04 /* RW */	352	#define SBUS_ERRINT0EN BIT(4) /* RW */
392		353
393	/------- (0x1010) EPCTR Register /	354	/------- (0x1010) EPCTR Register /
394	#define DIRPD BIT12 /* RW */	355	#define DIRPD BIT(12) /* RW */
395		356
396	#define VBUS_LEVEL BIT08 /* R */	357	#define VBUS_LEVEL BIT(8) /* R */
397		358
398	#define PLL_RESUME BIT05 /* RW */	359	#define PLL_RESUME BIT(5) /* RW */
399	#define PLL_LOCK BIT04 /* R */	360	#define PLL_LOCK BIT(4) /* R */
400		361
401	#define EPC_RST BIT00 /* RW */	362	#define EPC_RST BIT(0) /* RW */
402		363
403	/------- (0x1014) USBF_EPTEST Register /	364	/------- (0x1014) USBF_EPTEST Register /
404	#define LINESTATE (BIT09 + BIT08) /* R */	365	#define LINESTATE (BIT(9) \| BIT(8)) /* R */
405	#define DM_LEVEL BIT09 /* R */	366	#define DM_LEVEL BIT(9) /* R */
406	#define DP_LEVEL BIT08 /* R */	367	#define DP_LEVEL BIT(8) /* R */
407		368
408	#define PHY_TST BIT01 /* RW */	369	#define PHY_TST BIT(1) /* RW */
409	#define PHY_TSTCLK BIT00 /* RW */	370	#define PHY_TSTCLK BIT(0) /* RW */
410		371
411	/------- (0x1020) USBSSVER Register /	372	/------- (0x1020) USBSSVER Register /
412	#define AHBB_VER 0x00FF0000 /* R */	373	#define AHBB_VER 0x00FF0000 /* R */
@@ -420,8 +381,8 @@ int vbus_irq; · 7 unmodified lines
420	/------- (0x1110:) EPNDCR1 Register /	381	/------- (0x1110:) EPNDCR1 Register /
421	#define DCR1_EPN_DMACNT 0x00FF0000 /* RW */	382	#define DCR1_EPN_DMACNT 0x00FF0000 /* RW */
422		383
423	#define DCR1_EPN_DIR0 BIT01 /* RW */	384	#define DCR1_EPN_DIR0 BIT(1) /* RW */
424	#define DCR1_EPN_REQEN BIT00 /* RW */	385	#define DCR1_EPN_REQEN BIT(0) /* RW */
425		386
426	/------- (0x1114:) EPNDCR2 Register /	387	/------- (0x1114:) EPNDCR2 Register /
427	#define DCR2_EPN_LMPKT 0x07FF0000 /* RW */	388	#define DCR2_EPN_LMPKT 0x07FF0000 /* RW */

drivers/staging/fsl-dpaa2/ethsw/ethsw-ethtool.c+28−27

 static struct {
 	enum dpsw_counter id;
 	char name[ETH_GSTRING_LEN];
-} ethsw_ethtool_counters[] =  {
+} dpaa2_switch_ethtool_counters[] =  {
 	{DPSW_CNT_ING_FRAME,		"rx frames"},
 	{DPSW_CNT_ING_BYTE,		"rx bytes"},
 	{DPSW_CNT_ING_FLTR_FRAME,	"rx filtered frames"},
 };
-#define ETHSW_NUM_COUNTERS	ARRAY_SIZE(ethsw_ethtool_counters)
+#define DPAA2_SWITCH_NUM_COUNTERS	ARRAY_SIZE(dpaa2_switch_ethtool_counters)
-static void ethsw_get_drvinfo(struct net_device *netdev,
+static void dpaa2_switch_get_drvinfo(struct net_device *netdev,
-			      struct ethtool_drvinfo *drvinfo)
+				     struct ethtool_drvinfo *drvinfo)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	u16 version_major, version_minor;
 }
 static int
-ethsw_get_link_ksettings(struct net_device *netdev,
+dpaa2_switch_get_link_ksettings(struct net_device *netdev,
-			 struct ethtool_link_ksettings *link_ksettings)
+				struct ethtool_link_ksettings *link_ksettings)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	struct dpsw_link_state state = {0};
 }
 static int
-ethsw_set_link_ksettings(struct net_device *netdev,
+dpaa2_switch_set_link_ksettings(struct net_device *netdev,
-			 const struct ethtool_link_ksettings *link_ksettings)
+				const struct ethtool_link_ksettings *link_ksettings)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	return err;
 }
-static int ethsw_ethtool_get_sset_count(struct net_device *dev, int sset)
+static int dpaa2_switch_ethtool_get_sset_count(struct net_device *dev, int sset)
 {
 	switch (sset) {
 	case ETH_SS_STATS:
-		return ETHSW_NUM_COUNTERS;
+		return DPAA2_SWITCH_NUM_COUNTERS;
 	default:
 		return -EOPNOTSUPP;
 	}
 }
-static void ethsw_ethtool_get_strings(struct net_device *netdev,
+static void dpaa2_switch_ethtool_get_strings(struct net_device *netdev,
-				      u32 stringset, u8 *data)
+					     u32 stringset, u8 *data)
 {
 	int i;
 	switch (stringset) {
 	case ETH_SS_STATS:
-		for (i = 0; i < ETHSW_NUM_COUNTERS; i++)
+		for (i = 0; i < DPAA2_SWITCH_NUM_COUNTERS; i++)
 			memcpy(data + i * ETH_GSTRING_LEN,
-			       ethsw_ethtool_counters[i].name, ETH_GSTRING_LEN);
+			       dpaa2_switch_ethtool_counters[i].name,
+			       ETH_GSTRING_LEN);
 		break;
 	}
 }
-static void ethsw_ethtool_get_stats(struct net_device *netdev,
+static void dpaa2_switch_ethtool_get_stats(struct net_device *netdev,
-				    struct ethtool_stats *stats,
+					   struct ethtool_stats *stats,
-				    u64 *data)
+					   u64 *data)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int i, err;
-	for (i = 0; i < ETHSW_NUM_COUNTERS; i++) {
+	for (i = 0; i < DPAA2_SWITCH_NUM_COUNTERS; i++) {
 		err = dpsw_if_get_counter(port_priv->ethsw_data->mc_io, 0,
 					  port_priv->ethsw_data->dpsw_handle,
 					  port_priv->idx,
-					  ethsw_ethtool_counters[i].id,
+					  dpaa2_switch_ethtool_counters[i].id,
 					  &data[i]);
 		if (err)
 			netdev_err(netdev, "dpsw_if_get_counter[%s] err %d\n",
-				   ethsw_ethtool_counters[i].name, err);
+				   dpaa2_switch_ethtool_counters[i].name, err);
 	}
 }
-const struct ethtool_ops ethsw_port_ethtool_ops = {
+const struct ethtool_ops dpaa2_switch_port_ethtool_ops = {
-	.get_drvinfo		= ethsw_get_drvinfo,
+	.get_drvinfo		= dpaa2_switch_get_drvinfo,
 	.get_link		= ethtool_op_get_link,
-	.get_link_ksettings	= ethsw_get_link_ksettings,
+	.get_link_ksettings	= dpaa2_switch_get_link_ksettings,
-	.set_link_ksettings	= ethsw_set_link_ksettings,
+	.set_link_ksettings	= dpaa2_switch_set_link_ksettings,
-	.get_strings		= ethsw_ethtool_get_strings,
+	.get_strings		= dpaa2_switch_ethtool_get_strings,
-	.get_ethtool_stats	= ethsw_ethtool_get_stats,
+	.get_ethtool_stats	= dpaa2_switch_ethtool_get_stats,
-	.get_sset_count		= ethsw_ethtool_get_sset_count,
+	.get_sset_count		= dpaa2_switch_ethtool_get_sset_count,
 };

drivers/staging/fsl-dpaa2/ethsw/ethsw.c+220−221

 #define DEFAULT_VLAN_ID			1
-static int ethsw_add_vlan(struct ethsw_core *ethsw, u16 vid)
+static int dpaa2_switch_add_vlan(struct ethsw_core *ethsw, u16 vid)
 {
 	int err;
 	return 0;
 }
-static bool ethsw_port_is_up(struct ethsw_port_priv *port_priv)
+static bool dpaa2_switch_port_is_up(struct ethsw_port_priv *port_priv)
 {
 	struct net_device *netdev = port_priv->netdev;
 	struct dpsw_link_state state;
 	return state.up ? true : false;
 }
-static int ethsw_port_set_pvid(struct ethsw_port_priv *port_priv, u16 pvid)
+static int dpaa2_switch_port_set_pvid(struct ethsw_port_priv *port_priv, u16 pvid)
 {
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	struct net_device *netdev = port_priv->netdev;
 	tci_cfg.vlan_id = pvid;
 	/* Interface needs to be down to change PVID */
-	up = ethsw_port_is_up(port_priv);
+	up = dpaa2_switch_port_is_up(port_priv);
 	if (up) {
 		err = dpsw_if_disable(ethsw->mc_io, 0,
 				      ethsw->dpsw_handle,
 	return err;
 }
-static int ethsw_port_add_vlan(struct ethsw_port_priv *port_priv,
+static int dpaa2_switch_port_add_vlan(struct ethsw_port_priv *port_priv,
-			       u16 vid, u16 flags)
+				      u16 vid, u16 flags)
 {
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	struct net_device *netdev = port_priv->netdev;
 	}
 	if (flags & BRIDGE_VLAN_INFO_PVID) {
-		err = ethsw_port_set_pvid(port_priv, vid);
+		err = dpaa2_switch_port_set_pvid(port_priv, vid);
 		if (err)
 			return err;
 	}
 	return 0;
 }
-static int ethsw_set_learning(struct ethsw_core *ethsw, bool enable)
+static int dpaa2_switch_set_learning(struct ethsw_core *ethsw, bool enable)
 {
 	enum dpsw_fdb_learning_mode learn_mode;
 	int err;
 	return 0;
 }
-static int ethsw_port_set_flood(struct ethsw_port_priv *port_priv, bool enable)
+static int dpaa2_switch_port_set_flood(struct ethsw_port_priv *port_priv, bool enable)
 {
 	int err;
 	return 0;
 }
-static int ethsw_port_set_stp_state(struct ethsw_port_priv *port_priv, u8 state)
+static int dpaa2_switch_port_set_stp_state(struct ethsw_port_priv *port_priv, u8 state)
 {
 	struct dpsw_stp_cfg stp_cfg = {
 		.state = state,
 	return 0;
 }
-static int ethsw_dellink_switch(struct ethsw_core *ethsw, u16 vid)
+static int dpaa2_switch_dellink(struct ethsw_core *ethsw, u16 vid)
 {
 	struct ethsw_port_priv *ppriv_local = NULL;
 	int i, err;
 	return 0;
 }
-static int ethsw_port_fdb_add_uc(struct ethsw_port_priv *port_priv,
+static int dpaa2_switch_port_fdb_add_uc(struct ethsw_port_priv *port_priv,
-				 const unsigned char *addr)
+					const unsigned char *addr)
 {
 	struct dpsw_fdb_unicast_cfg entry = {0};
 	int err;
 	return err;
 }
-static int ethsw_port_fdb_del_uc(struct ethsw_port_priv *port_priv,
+static int dpaa2_switch_port_fdb_del_uc(struct ethsw_port_priv *port_priv,
-				 const unsigned char *addr)
+					const unsigned char *addr)
 {
 	struct dpsw_fdb_unicast_cfg entry = {0};
 	int err;
 	return err;
 }
-static int ethsw_port_fdb_add_mc(struct ethsw_port_priv *port_priv,
+static int dpaa2_switch_port_fdb_add_mc(struct ethsw_port_priv *port_priv,
-				 const unsigned char *addr)
+					const unsigned char *addr)
 {
 	struct dpsw_fdb_multicast_cfg entry = {0};
 	int err;
 	return err;
 }
-static int ethsw_port_fdb_del_mc(struct ethsw_port_priv *port_priv,
+static int dpaa2_switch_port_fdb_del_mc(struct ethsw_port_priv *port_priv,
-				 const unsigned char *addr)
+					const unsigned char *addr)
 {
 	struct dpsw_fdb_multicast_cfg entry = {0};
 	int err;
 	return err;
 }
-static int port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
+static int dpaa2_switch_port_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
-			struct net_device *dev, const unsigned char *addr,
+				     struct net_device *dev, const unsigned char *addr,
-			u16 vid, u16 flags,
+				     u16 vid, u16 flags,
-			struct netlink_ext_ack *extack)
+				     struct netlink_ext_ack *extack)
 {
 	if (is_unicast_ether_addr(addr))
-		return ethsw_port_fdb_add_uc(netdev_priv(dev),
+		return dpaa2_switch_port_fdb_add_uc(netdev_priv(dev),
-					     addr);
+						    addr);
 	else
-		return ethsw_port_fdb_add_mc(netdev_priv(dev),
+		return dpaa2_switch_port_fdb_add_mc(netdev_priv(dev),
-					     addr);
+						    addr);
 }
-static int port_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
+static int dpaa2_switch_port_fdb_del(struct ndmsg *ndm, struct nlattr *tb[],
-			struct net_device *dev,
+				     struct net_device *dev,
-			const unsigned char *addr, u16 vid)
+				     const unsigned char *addr, u16 vid)
 {
 	if (is_unicast_ether_addr(addr))
-		return ethsw_port_fdb_del_uc(netdev_priv(dev),
+		return dpaa2_switch_port_fdb_del_uc(netdev_priv(dev),
-					     addr);
+						    addr);
 	else
-		return ethsw_port_fdb_del_mc(netdev_priv(dev),
+		return dpaa2_switch_port_fdb_del_mc(netdev_priv(dev),
-					     addr);
+						    addr);
 }
-static void port_get_stats(struct net_device *netdev,
+static void dpaa2_switch_port_get_stats(struct net_device *netdev,
-			   struct rtnl_link_stats64 *stats)
+					struct rtnl_link_stats64 *stats)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	u64 tmp;
 	netdev_err(netdev, "dpsw_if_get_counter err %d\n", err);
 }
-static bool port_has_offload_stats(const struct net_device *netdev,
+static bool dpaa2_switch_port_has_offload_stats(const struct net_device *netdev,
-				   int attr_id)
+						int attr_id)
 {
 	return (attr_id == IFLA_OFFLOAD_XSTATS_CPU_HIT);
 }
-static int port_get_offload_stats(int attr_id,
+static int dpaa2_switch_port_get_offload_stats(int attr_id,
-				  const struct net_device *netdev,
+					       const struct net_device *netdev,
-				  void *sp)
+					       void *sp)
 {
 	switch (attr_id) {
 	case IFLA_OFFLOAD_XSTATS_CPU_HIT:
-		port_get_stats((struct net_device *)netdev, sp);
+		dpaa2_switch_port_get_stats((struct net_device *)netdev, sp);
 		return 0;
 	}
 	return -EINVAL;
 }
-static int port_change_mtu(struct net_device *netdev, int mtu)
+static int dpaa2_switch_port_change_mtu(struct net_device *netdev, int mtu)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 	return 0;
 }
-static int port_carrier_state_sync(struct net_device *netdev)
+static int dpaa2_switch_port_carrier_state_sync(struct net_device *netdev)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	struct dpsw_link_state state;
 	return 0;
 }
-static int port_open(struct net_device *netdev)
+static int dpaa2_switch_port_open(struct net_device *netdev)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 	}
 	/* sync carrier state */
-	err = port_carrier_state_sync(netdev);
+	err = dpaa2_switch_port_carrier_state_sync(netdev);
 	if (err) {
 		netdev_err(netdev,
-			   "port_carrier_state_sync err %d\n", err);
+			   "dpaa2_switch_port_carrier_state_sync err %d\n", err);
 		goto err_carrier_sync;
 	}
 	return err;
 }
-static int port_stop(struct net_device *netdev)
+static int dpaa2_switch_port_stop(struct net_device *netdev)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 	return 0;
 }
-static netdev_tx_t port_dropframe(struct sk_buff *skb,
+static netdev_tx_t dpaa2_switch_port_dropframe(struct sk_buff *skb,
-				  struct net_device *netdev)
+					       struct net_device *netdev)
 {
 	/* we don't support I/O for now, drop the frame */
 	dev_kfree_skb_any(skb);
 	return NETDEV_TX_OK;
 }
-static int swdev_get_port_parent_id(struct net_device *dev,
+static int dpaa2_switch_port_parent_id(struct net_device *dev,
-				    struct netdev_phys_item_id *ppid)
+				       struct netdev_phys_item_id *ppid)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(dev);
 	return 0;
 }
-static int port_get_phys_name(struct net_device *netdev, char *name,
+static int dpaa2_switch_port_get_phys_name(struct net_device *netdev, char *name,
-			      size_t len)
+					   size_t len)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 	int idx;
 };
-static int ethsw_fdb_do_dump(struct fdb_dump_entry *entry,
+static int dpaa2_switch_fdb_dump_nl(struct fdb_dump_entry *entry,
-			     struct ethsw_dump_ctx *dump)
+				    struct ethsw_dump_ctx *dump)
 {
 	int is_dynamic = entry->type & DPSW_FDB_ENTRY_DINAMIC;
 	u32 portid = NETLINK_CB(dump->cb->skb).portid;
 	return -EMSGSIZE;
 }
-static int port_fdb_valid_entry(struct fdb_dump_entry *entry,
+static int dpaa2_switch_port_fdb_valid_entry(struct fdb_dump_entry *entry,
-				struct ethsw_port_priv *port_priv)
+					     struct ethsw_port_priv *port_priv)
 {
 	int idx = port_priv->idx;
 	int valid;
 	return valid;
 }
-static int port_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb,
+static int dpaa2_switch_port_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb,
-			 struct net_device *net_dev,
+				      struct net_device *net_dev,
-			 struct net_device *filter_dev, int *idx)
+				      struct net_device *filter_dev, int *idx)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(net_dev);
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	for (i = 0; i < num_fdb_entries; i++) {
 		fdb_entry = fdb_entries[i];
-		if (!port_fdb_valid_entry(&fdb_entry, port_priv))
+		if (!dpaa2_switch_port_fdb_valid_entry(&fdb_entry, port_priv))
 			continue;
-		err = ethsw_fdb_do_dump(&fdb_entry, &dump);
+		err = dpaa2_switch_fdb_dump_nl(&fdb_entry, &dump);
 		if (err)
 			goto end;
 	}
 	return err;
 }
-static int ethsw_port_set_mac_addr(struct ethsw_port_priv *port_priv)
+static int dpaa2_switch_port_set_mac_addr(struct ethsw_port_priv *port_priv)
 {
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	struct net_device *net_dev = port_priv->netdev;
 	return 0;
 }
-static const struct net_device_ops ethsw_port_ops = {
+static const struct net_device_ops dpaa2_switch_port_ops = {
-	.ndo_open		= port_open,
+	.ndo_open		= dpaa2_switch_port_open,
-	.ndo_stop		= port_stop,
+	.ndo_stop		= dpaa2_switch_port_stop,
 	.ndo_set_mac_address	= eth_mac_addr,
-	.ndo_get_stats64	= port_get_stats,
+	.ndo_get_stats64	= dpaa2_switch_port_get_stats,
-	.ndo_change_mtu		= port_change_mtu,
+	.ndo_change_mtu		= dpaa2_switch_port_change_mtu,
-	.ndo_has_offload_stats	= port_has_offload_stats,
+	.ndo_has_offload_stats	= dpaa2_switch_port_has_offload_stats,
-	.ndo_get_offload_stats	= port_get_offload_stats,
+	.ndo_get_offload_stats	= dpaa2_switch_port_get_offload_stats,
-	.ndo_fdb_add		= port_fdb_add,
+	.ndo_fdb_add		= dpaa2_switch_port_fdb_add,
-	.ndo_fdb_del		= port_fdb_del,
+	.ndo_fdb_del		= dpaa2_switch_port_fdb_del,
-	.ndo_fdb_dump		= port_fdb_dump,
+	.ndo_fdb_dump		= dpaa2_switch_port_fdb_dump,
-	.ndo_start_xmit		= port_dropframe,
+	.ndo_start_xmit		= dpaa2_switch_port_dropframe,
-	.ndo_get_port_parent_id	= swdev_get_port_parent_id,
+	.ndo_get_port_parent_id	= dpaa2_switch_port_parent_id,
-	.ndo_get_phys_port_name = port_get_phys_name,
+	.ndo_get_phys_port_name = dpaa2_switch_port_get_phys_name,
 };
-static bool ethsw_port_dev_check(const struct net_device *netdev,
+static bool dpaa2_switch_port_dev_check(const struct net_device *netdev,
-				 struct notifier_block *nb)
+					struct notifier_block *nb)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
-	if (netdev->netdev_ops == &ethsw_port_ops &&
+	if (netdev->netdev_ops == &dpaa2_switch_port_ops &&
 	    (!nb || &port_priv->ethsw_data->port_nb == nb ||
 	     &port_priv->ethsw_data->port_switchdev_nb == nb ||
 	     &port_priv->ethsw_data->port_switchdevb_nb == nb))
 	return false;
 }
-static void ethsw_links_state_update(struct ethsw_core *ethsw)
+static void dpaa2_switch_links_state_update(struct ethsw_core *ethsw)
 {
 	int i;
 	for (i = 0; i < ethsw->sw_attr.num_ifs; i++) {
-		port_carrier_state_sync(ethsw->ports[i]->netdev);
+		dpaa2_switch_port_carrier_state_sync(ethsw->ports[i]->netdev);
-		ethsw_port_set_mac_addr(ethsw->ports[i]);
+		dpaa2_switch_port_set_mac_addr(ethsw->ports[i]);
 	}
 }
-static irqreturn_t ethsw_irq0_handler_thread(int irq_num, void *arg)
+static irqreturn_t dpaa2_switch_irq0_handler_thread(int irq_num, void *arg)
 {
 	struct device *dev = (struct device *)arg;
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	}
 	if (status & DPSW_IRQ_EVENT_LINK_CHANGED)
-		ethsw_links_state_update(ethsw);
+		dpaa2_switch_links_state_update(ethsw);
 out:
 	return IRQ_HANDLED;
 }
-static int ethsw_setup_irqs(struct fsl_mc_device *sw_dev)
+static int dpaa2_switch_setup_irqs(struct fsl_mc_device *sw_dev)
 {
 	struct device *dev = &sw_dev->dev;
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	err = devm_request_threaded_irq(dev, irq->msi_desc->irq,
 					NULL,
-					ethsw_irq0_handler_thread,
+					dpaa2_switch_irq0_handler_thread,
 					IRQF_NO_SUSPEND | IRQF_ONESHOT,
 					dev_name(dev), dev);
 	if (err) {
 	return err;
 }
-static void ethsw_teardown_irqs(struct fsl_mc_device *sw_dev)
+static void dpaa2_switch_teardown_irqs(struct fsl_mc_device *sw_dev)
 {
 	struct device *dev = &sw_dev->dev;
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	fsl_mc_free_irqs(sw_dev);
 }
-static int port_attr_stp_state_set(struct net_device *netdev,
+static int dpaa2_switch_port_attr_stp_state_set(struct net_device *netdev,
-				   struct switchdev_trans *trans,
+						struct switchdev_trans *trans,
-				   u8 state)
+						u8 state)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	if (switchdev_trans_ph_prepare(trans))
 		return 0;
-	return ethsw_port_set_stp_state(port_priv, state);
+	return dpaa2_switch_port_set_stp_state(port_priv, state);
 }
-static int port_attr_br_flags_pre_set(struct net_device *netdev,
+static int dpaa2_switch_port_attr_br_flags_pre_set(struct net_device *netdev,
-				      struct switchdev_trans *trans,
+						   struct switchdev_trans *trans,
-				      unsigned long flags)
+						   unsigned long flags)
 {
 	if (flags & ~(BR_LEARNING | BR_FLOOD))
 		return -EINVAL;
 	return 0;
 }
-static int port_attr_br_flags_set(struct net_device *netdev,
+static int dpaa2_switch_port_attr_br_flags_set(struct net_device *netdev,
-				  struct switchdev_trans *trans,
+					       struct switchdev_trans *trans,
-				  unsigned long flags)
+					       unsigned long flags)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err = 0;
 		return 0;
 	/* Learning is enabled per switch */
-	err = ethsw_set_learning(port_priv->ethsw_data,
+	err = dpaa2_switch_set_learning(port_priv->ethsw_data,
-				 !!(flags & BR_LEARNING));
+					!!(flags & BR_LEARNING));
 	if (err)
 		goto exit;
-	err = ethsw_port_set_flood(port_priv, !!(flags & BR_FLOOD));
+	err = dpaa2_switch_port_set_flood(port_priv, !!(flags & BR_FLOOD));
 exit:
 	return err;
 }
-static int swdev_port_attr_set(struct net_device *netdev,
+static int dpaa2_switch_port_attr_set(struct net_device *netdev,
-			       const struct switchdev_attr *attr,
+				      const struct switchdev_attr *attr,
-			       struct switchdev_trans *trans)
+				      struct switchdev_trans *trans)
 {
 	int err = 0;
 	switch (attr->id) {
 	case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
-		err = port_attr_stp_state_set(netdev, trans,
+		err = dpaa2_switch_port_attr_stp_state_set(netdev, trans,
-					      attr->u.stp_state);
+							   attr->u.stp_state);
 		break;
 	case SWITCHDEV_ATTR_ID_PORT_PRE_BRIDGE_FLAGS:
-		err = port_attr_br_flags_pre_set(netdev, trans,
+		err = dpaa2_switch_port_attr_br_flags_pre_set(netdev, trans,
-						 attr->u.brport_flags);
+							      attr->u.brport_flags);
 		break;
 	case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
-		err = port_attr_br_flags_set(netdev, trans,
+		err = dpaa2_switch_port_attr_br_flags_set(netdev, trans,
-					     attr->u.brport_flags);
+							  attr->u.brport_flags);
 		break;
 	case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
 		/* VLANs are supported by default  */
 	return err;
 }
-static int port_vlans_add(struct net_device *netdev,
+static int dpaa2_switch_port_vlans_add(struct net_device *netdev,
-			  const struct switchdev_obj_port_vlan *vlan,
+				       const struct switchdev_obj_port_vlan *vlan,
-			  struct switchdev_trans *trans)
+				       struct switchdev_trans *trans)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
 		if (!port_priv->ethsw_data->vlans[vid]) {
 			/* this is a new VLAN */
-			err = ethsw_add_vlan(port_priv->ethsw_data, vid);
+			err = dpaa2_switch_add_vlan(port_priv->ethsw_data, vid);
 			if (err)
 				return err;
 			port_priv->ethsw_data->vlans[vid] |= ETHSW_VLAN_GLOBAL;
 		}
-		err = ethsw_port_add_vlan(port_priv, vid, vlan->flags);
+		err = dpaa2_switch_port_add_vlan(port_priv, vid, vlan->flags);
 		if (err)
 			break;
 	}
 	return err;
 }
-static int port_lookup_address(struct net_device *netdev, int is_uc,
+static int dpaa2_switch_port_lookup_address(struct net_device *netdev, int is_uc,
-			       const unsigned char *addr)
+					    const unsigned char *addr)
 {
 	struct netdev_hw_addr_list *list = (is_uc) ? &netdev->uc : &netdev->mc;
 	struct netdev_hw_addr *ha;
 	return 0;
 }
-static int port_mdb_add(struct net_device *netdev,
+static int dpaa2_switch_port_mdb_add(struct net_device *netdev,
-			const struct switchdev_obj_port_mdb *mdb,
+				     const struct switchdev_obj_port_mdb *mdb,
-			struct switchdev_trans *trans)
+				     struct switchdev_trans *trans)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 		return 0;
 	/* Check if address is already set on this port */
-	if (port_lookup_address(netdev, 0, mdb->addr))
+	if (dpaa2_switch_port_lookup_address(netdev, 0, mdb->addr))
 		return -EEXIST;
-	err = ethsw_port_fdb_add_mc(port_priv, mdb->addr);
+	err = dpaa2_switch_port_fdb_add_mc(port_priv, mdb->addr);
 	if (err)
 		return err;
 	err = dev_mc_add(netdev, mdb->addr);
 	if (err) {
 		netdev_err(netdev, "dev_mc_add err %d\n", err);
-		ethsw_port_fdb_del_mc(port_priv, mdb->addr);
+		dpaa2_switch_port_fdb_del_mc(port_priv, mdb->addr);
 	}
 	return err;
 }
-static int swdev_port_obj_add(struct net_device *netdev,
+static int dpaa2_switch_port_obj_add(struct net_device *netdev,
-			      const struct switchdev_obj *obj,
+				     const struct switchdev_obj *obj,
-			      struct switchdev_trans *trans)
+				     struct switchdev_trans *trans)
 {
 	int err;
 	switch (obj->id) {
 	case SWITCHDEV_OBJ_ID_PORT_VLAN:
-		err = port_vlans_add(netdev,
+		err = dpaa2_switch_port_vlans_add(netdev,
-				     SWITCHDEV_OBJ_PORT_VLAN(obj),
+						  SWITCHDEV_OBJ_PORT_VLAN(obj),
-				     trans);
+						  trans);
 		break;
 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-		err = port_mdb_add(netdev,
+		err = dpaa2_switch_port_mdb_add(netdev,
-				   SWITCHDEV_OBJ_PORT_MDB(obj),
+						SWITCHDEV_OBJ_PORT_MDB(obj),
-				   trans);
+						trans);
 		break;
 	default:
 		err = -EOPNOTSUPP;
 	return err;
 }
-static int ethsw_port_del_vlan(struct ethsw_port_priv *port_priv, u16 vid)
+static int dpaa2_switch_port_del_vlan(struct ethsw_port_priv *port_priv, u16 vid)
 {
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 	struct net_device *netdev = port_priv->netdev;
 		return -ENOENT;
 	if (port_priv->vlans[vid] & ETHSW_VLAN_PVID) {
-		err = ethsw_port_set_pvid(port_priv, 0);
+		err = dpaa2_switch_port_set_pvid(port_priv, 0);
 		if (err)
 			return err;
 	}
 		ethsw->vlans[vid] &= ~ETHSW_VLAN_GLOBAL;
-		err = ethsw_dellink_switch(ethsw, vid);
+		err = dpaa2_switch_dellink(ethsw, vid);
 		if (err)
 			return err;
 	}
 	return 0;
 }
-static int port_vlans_del(struct net_device *netdev,
+static int dpaa2_switch_port_vlans_del(struct net_device *netdev,
-			  const struct switchdev_obj_port_vlan *vlan)
+				       const struct switchdev_obj_port_vlan *vlan)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int vid, err = 0;
 		return -EOPNOTSUPP;
 	for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
-		err = ethsw_port_del_vlan(port_priv, vid);
+		err = dpaa2_switch_port_del_vlan(port_priv, vid);
 		if (err)
 			break;
 	}
 	return err;
 }
-static int port_mdb_del(struct net_device *netdev,
+static int dpaa2_switch_port_mdb_del(struct net_device *netdev,
-			const struct switchdev_obj_port_mdb *mdb)
+				     const struct switchdev_obj_port_mdb *mdb)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
-	if (!port_lookup_address(netdev, 0, mdb->addr))
+	if (!dpaa2_switch_port_lookup_address(netdev, 0, mdb->addr))
 		return -ENOENT;
-	err = ethsw_port_fdb_del_mc(port_priv, mdb->addr);
+	err = dpaa2_switch_port_fdb_del_mc(port_priv, mdb->addr);
 	if (err)
 		return err;
 	return err;
 }
-static int swdev_port_obj_del(struct net_device *netdev,
+static int dpaa2_switch_port_obj_del(struct net_device *netdev,
-			      const struct switchdev_obj *obj)
+				     const struct switchdev_obj *obj)
 {
 	int err;
 	switch (obj->id) {
 	case SWITCHDEV_OBJ_ID_PORT_VLAN:
-		err = port_vlans_del(netdev, SWITCHDEV_OBJ_PORT_VLAN(obj));
+		err = dpaa2_switch_port_vlans_del(netdev, SWITCHDEV_OBJ_PORT_VLAN(obj));
 		break;
 	case SWITCHDEV_OBJ_ID_PORT_MDB:
-		err = port_mdb_del(netdev, SWITCHDEV_OBJ_PORT_MDB(obj));
+		err = dpaa2_switch_port_mdb_del(netdev, SWITCHDEV_OBJ_PORT_MDB(obj));
 		break;
 	default:
 		err = -EOPNOTSUPP;
 	return err;
 }
-static int
+static int dpaa2_switch_port_attr_set_event(struct net_device *netdev,
-ethsw_switchdev_port_attr_set_event(struct net_device *netdev,
+					    struct switchdev_notifier_port_attr_info
-				    struct switchdev_notifier_port_attr_info
+					    *port_attr_info)
-				    *port_attr_info)
 {
 	int err;
-	err = swdev_port_attr_set(netdev, port_attr_info->attr,
+	err = dpaa2_switch_port_attr_set(netdev, port_attr_info->attr,
-				  port_attr_info->trans);
+					 port_attr_info->trans);
 	port_attr_info->handled = true;
 	return notifier_from_errno(err);
 }
 /* For the moment, only flood setting needs to be updated */
-static int port_bridge_join(struct net_device *netdev,
+static int dpaa2_switch_port_bridge_join(struct net_device *netdev,
-			    struct net_device *upper_dev)
+					 struct net_device *upper_dev)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 		}
 	netdev_for_each_lower_dev(upper_dev, other_dev, iter) {
-		if (!ethsw_port_dev_check(other_dev, NULL))
+		if (!dpaa2_switch_port_dev_check(other_dev, NULL))
 			continue;
 		other_port_priv = netdev_priv(other_dev);
 	}
 	/* Enable flooding */
-	err = ethsw_port_set_flood(port_priv, 1);
+	err = dpaa2_switch_port_set_flood(port_priv, 1);
 	if (!err)
 		port_priv->bridge_dev = upper_dev;
 	return err;
 }
-static int port_bridge_leave(struct net_device *netdev)
+static int dpaa2_switch_port_bridge_leave(struct net_device *netdev)
 {
 	struct ethsw_port_priv *port_priv = netdev_priv(netdev);
 	int err;
 	/* Disable flooding */
-	err = ethsw_port_set_flood(port_priv, 0);
+	err = dpaa2_switch_port_set_flood(port_priv, 0);
 	if (!err)
 		port_priv->bridge_dev = NULL;
 	return err;
 }
-static int port_netdevice_event(struct notifier_block *nb,
+static int dpaa2_switch_port_netdevice_event(struct notifier_block *nb,
-				unsigned long event, void *ptr)
+					     unsigned long event, void *ptr)
 {
 	struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
 	struct netdev_notifier_changeupper_info *info = ptr;
 	struct net_device *upper_dev;
 	int err = 0;
-	if (!ethsw_port_dev_check(netdev, nb))
+	if (!dpaa2_switch_port_dev_check(netdev, nb))
 		return NOTIFY_DONE;
 	/* Handle just upper dev link/unlink for the moment */
 		upper_dev = info->upper_dev;
 		if (netif_is_bridge_master(upper_dev)) {
 			if (info->linking)
-				err = port_bridge_join(netdev, upper_dev);
+				err = dpaa2_switch_port_bridge_join(netdev, upper_dev);
 			else
-				err = port_bridge_leave(netdev);
+				err = dpaa2_switch_port_bridge_leave(netdev);
 		}
 	}
 	unsigned long event;
 };
-static void ethsw_switchdev_event_work(struct work_struct *work)
+static void dpaa2_switch_event_work(struct work_struct *work)
 {
 	struct ethsw_switchdev_event_work *switchdev_work =
 		container_of(work, struct ethsw_switchdev_event_work, work);
 		if (!fdb_info->added_by_user)
 			break;
 		if (is_unicast_ether_addr(fdb_info->addr))
-			err = ethsw_port_fdb_add_uc(netdev_priv(dev),
+			err = dpaa2_switch_port_fdb_add_uc(netdev_priv(dev),
-						    fdb_info->addr);
+							   fdb_info->addr);
 		else
-			err = ethsw_port_fdb_add_mc(netdev_priv(dev),
+			err = dpaa2_switch_port_fdb_add_mc(netdev_priv(dev),
-						    fdb_info->addr);
+							   fdb_info->addr);
 		if (err)
 			break;
 		fdb_info->offloaded = true;
 		if (!fdb_info->added_by_user)
 			break;
 		if (is_unicast_ether_addr(fdb_info->addr))
-			ethsw_port_fdb_del_uc(netdev_priv(dev), fdb_info->addr);
+			dpaa2_switch_port_fdb_del_uc(netdev_priv(dev), fdb_info->addr);
 		else
-			ethsw_port_fdb_del_mc(netdev_priv(dev), fdb_info->addr);
+			dpaa2_switch_port_fdb_del_mc(netdev_priv(dev), fdb_info->addr);
 		break;
 	}
 }
 /* Called under rcu_read_lock() */
-static int port_switchdev_event(struct notifier_block *nb,
+static int dpaa2_switch_port_event(struct notifier_block *nb,
-				unsigned long event, void *ptr)
+				   unsigned long event, void *ptr)
 {
 	struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
 	struct ethsw_port_priv *port_priv = netdev_priv(dev);
 	struct switchdev_notifier_fdb_info *fdb_info = ptr;
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
-	if (!ethsw_port_dev_check(dev, nb))
+	if (!dpaa2_switch_port_dev_check(dev, nb))
 		return NOTIFY_DONE;
 	if (event == SWITCHDEV_PORT_ATTR_SET)
-		return ethsw_switchdev_port_attr_set_event(dev, ptr);
+		return dpaa2_switch_port_attr_set_event(dev, ptr);
 	switchdev_work = kzalloc(sizeof(*switchdev_work), GFP_ATOMIC);
 	if (!switchdev_work)
 		return NOTIFY_BAD;
-	INIT_WORK(&switchdev_work->work, ethsw_switchdev_event_work);
+	INIT_WORK(&switchdev_work->work, dpaa2_switch_event_work);
 	switchdev_work->dev = dev;
 	switchdev_work->event = event;
 	return NOTIFY_BAD;
 }
-static int
+static int dpaa2_switch_port_obj_event(unsigned long event,
-ethsw_switchdev_port_obj_event(unsigned long event, struct net_device *netdev,
+				       struct net_device *netdev,
-			       struct switchdev_notifier_port_obj_info
+				       struct switchdev_notifier_port_obj_info *port_obj_info)
-			       *port_obj_info)
 {
 	int err = -EOPNOTSUPP;
 	switch (event) {
 	case SWITCHDEV_PORT_OBJ_ADD:
-		err = swdev_port_obj_add(netdev, port_obj_info->obj,
+		err = dpaa2_switch_port_obj_add(netdev, port_obj_info->obj,
-					 port_obj_info->trans);
+						port_obj_info->trans);
 		break;
 	case SWITCHDEV_PORT_OBJ_DEL:
-		err = swdev_port_obj_del(netdev, port_obj_info->obj);
+		err = dpaa2_switch_port_obj_del(netdev, port_obj_info->obj);
 		break;
 	}
 	return notifier_from_errno(err);
 }
-static int port_switchdev_blocking_event(struct notifier_block *nb,
+static int dpaa2_switch_port_blocking_event(struct notifier_block *nb,
-					 unsigned long event, void *ptr)
+					    unsigned long event, void *ptr)
 {
 	struct net_device *dev = switchdev_notifier_info_to_dev(ptr);
-	if (!ethsw_port_dev_check(dev, nb))
+	if (!dpaa2_switch_port_dev_check(dev, nb))
 		return NOTIFY_DONE;
 	switch (event) {
 	case SWITCHDEV_PORT_OBJ_ADD:
 	case SWITCHDEV_PORT_OBJ_DEL:
-		return ethsw_switchdev_port_obj_event(event, dev, ptr);
+		return dpaa2_switch_port_obj_event(event, dev, ptr);
 	case SWITCHDEV_PORT_ATTR_SET:
-		return ethsw_switchdev_port_attr_set_event(dev, ptr);
+		return dpaa2_switch_port_attr_set_event(dev, ptr);
 	}
 	return NOTIFY_DONE;
 }
-static int ethsw_register_notifier(struct device *dev)
+static int dpaa2_switch_register_notifier(struct device *dev)
 {
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	int err;
-	ethsw->port_nb.notifier_call = port_netdevice_event;
+	ethsw->port_nb.notifier_call = dpaa2_switch_port_netdevice_event;
 	err = register_netdevice_notifier(&ethsw->port_nb);
 	if (err) {
 		dev_err(dev, "Failed to register netdev notifier\n");
 		return err;
 	}
-	ethsw->port_switchdev_nb.notifier_call = port_switchdev_event;
+	ethsw->port_switchdev_nb.notifier_call = dpaa2_switch_port_event;
 	err = register_switchdev_notifier(&ethsw->port_switchdev_nb);
 	if (err) {
 		dev_err(dev, "Failed to register switchdev notifier\n");
 		goto err_switchdev_nb;
 	}
-	ethsw->port_switchdevb_nb.notifier_call = port_switchdev_blocking_event;
+	ethsw->port_switchdevb_nb.notifier_call = dpaa2_switch_port_blocking_event;
 	err = register_switchdev_blocking_notifier(&ethsw->port_switchdevb_nb);
 	if (err) {
 		dev_err(dev, "Failed to register switchdev blocking notifier\n");
 	return err;
 }
-static void ethsw_detect_features(struct ethsw_core *ethsw)
+static void dpaa2_switch_detect_features(struct ethsw_core *ethsw)
 {
 	ethsw->features = 0;
 		ethsw->features |= ETHSW_FEATURE_MAC_ADDR;
 }
-static int ethsw_init(struct fsl_mc_device *sw_dev)
+static int dpaa2_switch_init(struct fsl_mc_device *sw_dev)
 {
 	struct device *dev = &sw_dev->dev;
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 		goto err_close;
 	}
-	ethsw_detect_features(ethsw);
+	dpaa2_switch_detect_features(ethsw);
 	err = dpsw_reset(ethsw->mc_io, 0, ethsw->dpsw_handle);
 	if (err) {
 		goto err_close;
 	}
-	err = ethsw_register_notifier(dev);
+	err = dpaa2_switch_register_notifier(dev);
 	if (err)
 		goto err_destroy_ordered_workqueue;
 	return err;
 }
-static int ethsw_port_init(struct ethsw_port_priv *port_priv, u16 port)
+static int dpaa2_switch_port_init(struct ethsw_port_priv *port_priv, u16 port)
 {
 	struct net_device *netdev = port_priv->netdev;
 	struct ethsw_core *ethsw = port_priv->ethsw_data;
 		return err;
 	}
-	err = ethsw_port_set_pvid(port_priv, 0);
+	err = dpaa2_switch_port_set_pvid(port_priv, 0);
 	if (err)
 		return err;
 	return err;
 }
-static void ethsw_unregister_notifier(struct device *dev)
+static void dpaa2_switch_unregister_notifier(struct device *dev)
 {
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	struct notifier_block *nb;
 			"Failed to unregister netdev notifier (%d)\n", err);
 }
-static void ethsw_takedown(struct fsl_mc_device *sw_dev)
+static void dpaa2_switch_takedown(struct fsl_mc_device *sw_dev)
 {
 	struct device *dev = &sw_dev->dev;
 	struct ethsw_core *ethsw = dev_get_drvdata(dev);
 	int err;
-	ethsw_unregister_notifier(dev);
+	dpaa2_switch_unregister_notifier(dev);
 	err = dpsw_close(ethsw->mc_io, 0, ethsw->dpsw_handle);
 	if (err)
 		dev_warn(dev, "dpsw_close err %d\n", err);
 }
-static int ethsw_remove(struct fsl_mc_device *sw_dev)
+static int dpaa2_switch_remove(struct fsl_mc_device *sw_dev)
 {
 	struct ethsw_port_priv *port_priv;
 	struct ethsw_core *ethsw;
 	dev = &sw_dev->dev;
 	ethsw = dev_get_drvdata(dev);
-	ethsw_teardown_irqs(sw_dev);
+	dpaa2_switch_teardown_irqs(sw_dev);
 	dpsw_disable(ethsw->mc_io, 0, ethsw->dpsw_handle);
 	}
 	kfree(ethsw->ports);
-	ethsw_takedown(sw_dev);
+	dpaa2_switch_takedown(sw_dev);
 	destroy_workqueue(ethsw->workqueue);
 	return 0;
 }
-static int ethsw_probe_port(struct ethsw_core *ethsw, u16 port_idx)
+static int dpaa2_switch_probe_port(struct ethsw_core *ethsw,
+				   u16 port_idx)
 {
 	struct ethsw_port_priv *port_priv;
 	struct device *dev = ethsw->dev;
 	port_priv->flood = true;
 	SET_NETDEV_DEV(port_netdev, dev);
-	port_netdev->netdev_ops = &ethsw_port_ops;
+	port_netdev->netdev_ops = &dpaa2_switch_port_ops;
-	port_netdev->ethtool_ops = &ethsw_port_ethtool_ops;
+	port_netdev->ethtool_ops = &dpaa2_switch_port_ethtool_ops;
 	/* Set MTU limits */
 	port_netdev->min_mtu = ETH_MIN_MTU;
 	port_netdev->max_mtu = ETHSW_MAX_FRAME_LENGTH;
-	err = ethsw_port_init(port_priv, port_idx);
+	err = dpaa2_switch_port_init(port_priv, port_idx);
 	if (err)
 		goto err_port_probe;
-	err = ethsw_port_set_mac_addr(port_priv);
+	err = dpaa2_switch_port_set_mac_addr(port_priv);
 	if (err)
 		goto err_port_probe;
 	return err;
 }
-static int ethsw_probe(struct fsl_mc_device *sw_dev)
+static int dpaa2_switch_probe(struct fsl_mc_device *sw_dev)
 {
 	struct device *dev = &sw_dev->dev;
 	struct ethsw_core *ethsw;
 		goto err_free_drvdata;
 	}
-	err = ethsw_init(sw_dev);
+	err = dpaa2_switch_init(sw_dev);
 	if (err)
 		goto err_free_cmdport;
 	}
 	for (i = 0; i < ethsw->sw_attr.num_ifs; i++) {
-		err = ethsw_probe_port(ethsw, i);
+		err = dpaa2_switch_probe_port(ethsw, i);
 		if (err)
 			goto err_free_ports;
 	}
 		dpsw_if_disable(ethsw->mc_io, 0, ethsw->dpsw_handle, i);
 	/* Setup IRQs */
-	err = ethsw_setup_irqs(sw_dev);
+	err = dpaa2_switch_setup_irqs(sw_dev);
 	if (err)
 		goto err_stop;
 	kfree(ethsw->ports);
 err_takedown:
-	ethsw_takedown(sw_dev);
+	dpaa2_switch_takedown(sw_dev);
 err_free_cmdport:
 	fsl_mc_portal_free(ethsw->mc_io);
 	return err;
 }
-static const struct fsl_mc_device_id ethsw_match_id_table[] = {
+static const struct fsl_mc_device_id dpaa2_switch_match_id_table[] = {
 	{
 		.vendor = FSL_MC_VENDOR_FREESCALE,
 		.obj_type = "dpsw",
 	},
 	{ .vendor = 0x0 }
 };
-MODULE_DEVICE_TABLE(fslmc, ethsw_match_id_table);
+MODULE_DEVICE_TABLE(fslmc, dpaa2_switch_match_id_table);
-static struct fsl_mc_driver eth_sw_drv = {
+static struct fsl_mc_driver dpaa2_switch_drv = {
 	.driver = {
 		.name = KBUILD_MODNAME,
 		.owner = THIS_MODULE,
 	},
-	.probe = ethsw_probe,
+	.probe = dpaa2_switch_probe,
-	.remove = ethsw_remove,
+	.remove = dpaa2_switch_remove,
-	.match_id_table = ethsw_match_id_table
+	.match_id_table = dpaa2_switch_match_id_table
 };
-module_fsl_mc_driver(eth_sw_drv);
+module_fsl_mc_driver(dpaa2_switch_drv);
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("DPAA2 Ethernet Switch Driver");

drivers/staging/fsl-dpaa2/ethsw/ethsw.h+1−1

@@ -39,7 +39,7 @@ · 38 unmodified lines
39		39
40	#define ETHSW_FEATURE_MAC_ADDR BIT(0)	40	#define ETHSW_FEATURE_MAC_ADDR BIT(0)
41		41
42	extern const struct ethtool_ops ethsw_port_ethtool_ops;	42	extern const struct ethtool_ops dpaa2_switch_port_ethtool_ops;
43		43
44	struct ethsw_core;	44	struct ethsw_core;
45		45

drivers/staging/fwserial/fwserial.c+1−1

@@ -466,7 +466,7 @@ static void fwtty_throttle_port(struct fwtty_port *port) · 465 unmodified lines
466	* fwtty_do_hangup - wait for ldisc to deliver all pending rx; only then hangup	466	* fwtty_do_hangup - wait for ldisc to deliver all pending rx; only then hangup
467	*	467	*
468	* When the remote has finished tx, and all in-flight rx has been received and	468	* When the remote has finished tx, and all in-flight rx has been received and
469	* and pushed to the flip buffer, the remote may close its device. This will	469	* pushed to the flip buffer, the remote may close its device. This will
470	* drop DTR on the remote which will drop carrier here. Typically, the tty is	470	* drop DTR on the remote which will drop carrier here. Typically, the tty is
471	* hung up when carrier is dropped or lost.	471	* hung up when carrier is dropped or lost.
472	*	472	*

drivers/staging/greybus/audio_codec.c+2−2

@@ -688,7 +688,7 @@ static struct snd_soc_dai_driver gbaudio_dai[] = { · 687 unmodified lines
688	.playback = {	688	.playback = {
689	.stream_name = "I2S 0 Playback",	689	.stream_name = "I2S 0 Playback",
690	.rates = SNDRV_PCM_RATE_48000,	690	.rates = SNDRV_PCM_RATE_48000,
691	.formats = SNDRV_PCM_FORMAT_S16_LE,	691	.formats = SNDRV_PCM_FMTBIT_S16_LE,
692	.rate_max = 48000,	692	.rate_max = 48000,
693	.rate_min = 48000,	693	.rate_min = 48000,
694	.channels_min = 1,	694	.channels_min = 1,
@@ -698,7 +698,7 @@ static struct snd_soc_dai_driver gbaudio_dai[] = { · 3 unmodified lines
698	.capture = {	698	.capture = {
699	.stream_name = "I2S 0 Capture",	699	.stream_name = "I2S 0 Capture",
700	.rates = SNDRV_PCM_RATE_48000,	700	.rates = SNDRV_PCM_RATE_48000,
701	.formats = SNDRV_PCM_FORMAT_S16_LE,	701	.formats = SNDRV_PCM_FMTBIT_S16_LE,
702	.rate_max = 48000,	702	.rate_max = 48000,
703	.rate_min = 48000,	703	.rate_min = 48000,
704	.channels_min = 1,	704	.channels_min = 1,

drivers/staging/greybus/audio_module.c+3−3

@@ -219,7 +219,7 @@ static int gb_audio_add_data_connection(struct gbaudio_module_info *gbmodule, · 218 unmodified lines
219		219
220	greybus_set_drvdata(bundle, gbmodule);	220	greybus_set_drvdata(bundle, gbmodule);
221	dai->id = 0;	221	dai->id = 0;
222	dai->data_cport = connection->intf_cport_id;	222	dai->data_cport = cpu_to_le16(connection->intf_cport_id);
223	dai->connection = connection;	223	dai->connection = connection;
224	list_add(&dai->list, &gbmodule->data_list);	224	list_add(&dai->list, &gbmodule->data_list);
225		225
@@ -329,7 +329,7 @@ static int gb_audio_probe(struct gb_bundle *bundle, · 103 unmodified lines
329	if (ret) {	329	if (ret) {
330	dev_err(dev,	330	dev_err(dev,
331	"%d:Error while enabling %d:data connection\n",	331	"%d:Error while enabling %d:data connection\n",
332	ret, dai->data_cport);	332	ret, le16_to_cpu(dai->data_cport));
333	goto disable_data_connection;	333	goto disable_data_connection;
334	}	334	}
335	}	335	}
@@ -451,7 +451,7 @@ static int gb_audio_resume(struct device *dev) · 115 unmodified lines
451	if (ret) {	451	if (ret) {
452	dev_err(dev,	452	dev_err(dev,
453	"%d:Error while enabling %d:data connection\n",	453	"%d:Error while enabling %d:data connection\n",
454	ret, dai->data_cport);	454	ret, le16_to_cpu(dai->data_cport));
455	return ret;	455	return ret;
456	}	456	}
457	}	457	}

drivers/staging/greybus/audio_topology.c+10−10

@@ -182,7 +182,7 @@ static int gbcodec_mixer_ctl_info(struct snd_kcontrol *kcontrol, · 181 unmodified lines
182	/* update uinfo */	182	/* update uinfo */
183	uinfo->access = data->access;	183	uinfo->access = data->access;
184	uinfo->count = data->vcount;	184	uinfo->count = data->vcount;
185	uinfo->type = (snd_ctl_elem_type_t)info->type;	185	uinfo->type = (__force snd_ctl_elem_type_t)info->type;
186		186
187	switch (info->type) {	187	switch (info->type) {
188	case GB_AUDIO_CTL_ELEM_TYPE_BOOLEAN:	188	case GB_AUDIO_CTL_ELEM_TYPE_BOOLEAN:
@@ -466,7 +466,7 @@ static int gbcodec_mixer_dapm_ctl_put(struct snd_kcontrol *kcontrol, · 277 unmodified lines
466	goto exit;	466	goto exit;
467		467
468	/* update ucontrol */	468	/* update ucontrol */
469	if (gbvalue.value.integer_value[0] != val) {	469	if (le32_to_cpu(gbvalue.value.integer_value[0]) != val) {
470	for (wi = 0; wi < wlist->num_widgets; wi++) {	470	for (wi = 0; wi < wlist->num_widgets; wi++) {
471	widget = wlist->widgets[wi];	471	widget = wlist->widgets[wi];
472	snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol,	472	snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol,
@@ -689,7 +689,7 @@ static int gbaudio_tplg_create_kcontrol(struct gbaudio_module_info *gb, · 216 unmodified lines
689	return -ENOMEM;	689	return -ENOMEM;
690	ctldata->ctl_id = ctl->id;	690	ctldata->ctl_id = ctl->id;
691	ctldata->data_cport = le16_to_cpu(ctl->data_cport);	691	ctldata->data_cport = le16_to_cpu(ctl->data_cport);
692	ctldata->access = ctl->access;	692	ctldata->access = le32_to_cpu(ctl->access);
693	ctldata->vcount = ctl->count_values;	693	ctldata->vcount = ctl->count_values;
694	ctldata->info = &ctl->info;	694	ctldata->info = &ctl->info;
695	*kctl = (struct snd_kcontrol_new)	695	*kctl = (struct snd_kcontrol_new)
@@ -744,10 +744,10 @@ static int gbcodec_enum_dapm_ctl_get(struct snd_kcontrol *kcontrol, · 48 unmodified lines
744	return ret;	744	return ret;
745	}	745	}
746		746
747	ucontrol->value.enumerated.item[0] = gbvalue.value.enumerated_item[0];	747	ucontrol->value.enumerated.item[0] = le32_to_cpu(gbvalue.value.enumerated_item[0]);
748	if (e->shift_l != e->shift_r)	748	if (e->shift_l != e->shift_r)
749	ucontrol->value.enumerated.item[1] =	749	ucontrol->value.enumerated.item[1] =
750	gbvalue.value.enumerated_item[1];	750	le32_to_cpu(gbvalue.value.enumerated_item[1]);
751		751
752	return 0;	752	return 0;
753	}	753	}
@@ -800,11 +800,11 @@ static int gbcodec_enum_dapm_ctl_put(struct snd_kcontrol *kcontrol, · 46 unmodified lines
800	val = mux << e->shift_l;	800	val = mux << e->shift_l;
801	mask = e->mask << e->shift_l;	801	mask = e->mask << e->shift_l;
802		802
803	if (gbvalue.value.enumerated_item[0] !=	803	if (le32_to_cpu(gbvalue.value.enumerated_item[0]) !=
804	ucontrol->value.enumerated.item[0]) {	804	ucontrol->value.enumerated.item[0]) {
805	change = 1;	805	change = 1;
806	gbvalue.value.enumerated_item[0] =	806	gbvalue.value.enumerated_item[0] =
807	ucontrol->value.enumerated.item[0];	807	cpu_to_le32(ucontrol->value.enumerated.item[0]);
808	}	808	}
809		809
810	if (e->shift_l != e->shift_r) {	810	if (e->shift_l != e->shift_r) {
@@ -812,11 +812,11 @@ static int gbcodec_enum_dapm_ctl_put(struct snd_kcontrol *kcontrol, · 1 unmodified line
812	return -EINVAL;	812	return -EINVAL;
813	val \|= ucontrol->value.enumerated.item[1] << e->shift_r;	813	val \|= ucontrol->value.enumerated.item[1] << e->shift_r;
814	mask \|= e->mask << e->shift_r;	814	mask \|= e->mask << e->shift_r;
815	if (gbvalue.value.enumerated_item[1] !=	815	if (le32_to_cpu(gbvalue.value.enumerated_item[1]) !=
816	ucontrol->value.enumerated.item[1]) {	816	ucontrol->value.enumerated.item[1]) {
817	change = 1;	817	change = 1;
818	gbvalue.value.enumerated_item[1] =	818	gbvalue.value.enumerated_item[1] =
819	ucontrol->value.enumerated.item[1];	819	cpu_to_le32(ucontrol->value.enumerated.item[1]);
820	}	820	}
821	}	821	}
822		822
@@ -887,7 +887,7 @@ static int gbaudio_tplg_create_mixer_ctl(struct gbaudio_module_info *gb, · 64 unmodified lines
887	return -ENOMEM;	887	return -ENOMEM;
888	ctldata->ctl_id = ctl->id;	888	ctldata->ctl_id = ctl->id;
889	ctldata->data_cport = le16_to_cpu(ctl->data_cport);	889	ctldata->data_cport = le16_to_cpu(ctl->data_cport);
890	ctldata->access = ctl->access;	890	ctldata->access = le32_to_cpu(ctl->access);
891	ctldata->vcount = ctl->count_values;	891	ctldata->vcount = ctl->count_values;
892	ctldata->info = &ctl->info;	892	ctldata->info = &ctl->info;
893	*kctl = (struct snd_kcontrol_new)	893	*kctl = (struct snd_kcontrol_new)

drivers/staging/greybus/gbphy.h+2−2

@@ -36,9 +36,9 @@ struct gbphy_device_id { · 35 unmodified lines
36		36
37	struct gbphy_driver {	37	struct gbphy_driver {
38	const char *name;	38	const char *name;
39	int (probe)(struct gbphy_device ,	39	int (probe)(struct gbphy_device device,
40	const struct gbphy_device_id *id);	40	const struct gbphy_device_id *id);
41	void (remove)(struct gbphy_device );	41	void (remove)(struct gbphy_device device);
42	const struct gbphy_device_id *id_table;	42	const struct gbphy_device_id *id_table;
43		43
44	struct device_driver driver;	44	struct device_driver driver;

drivers/staging/hikey9xx/Kconfig+49−0

@@ -0,0 +1,49 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2
	3	# to be placed at drivers/phy
	4	config PHY_HI3670_USB
	5	tristate "hi3670 USB PHY support"
	6	depends on (ARCH_HISI && ARM64) \|\| COMPILE_TEST
	7	select GENERIC_PHY
	8	select MFD_SYSCON
	9	help
	10	Enable this to support the HISILICON HI3670 USB PHY.
	11
	12	To compile this driver as a module, choose M here.
	13
	14	# to be placed at drivers/spmi
	15	config SPMI_HISI3670
	16	tristate "Hisilicon 3670 SPMI Controller"
	17	select IRQ_DOMAIN_HIERARCHY
	18	depends on HAS_IOMEM
	19	depends on SPMI
	20	help
	21	If you say yes to this option, support will be included for the
	22	built-in SPMI PMIC Arbiter interface on Hisilicon 3670
	23	processors.
	24
	25	# to be placed at drivers/mfd
	26	config MFD_HI6421_SPMI
	27	tristate "HiSilicon Hi6421v600 SPMI PMU/Codec IC"
	28	depends on OF
	29	depends on SPMI
	30	select MFD_CORE
	31	help
	32	Add support for HiSilicon Hi6421v600 SPMI PMIC. Hi6421 includes
	33	multi-functions, such as regulators, RTC, codec, Coulomb counter,
	34	etc.
	35
	36	This driver includes core APIs _only_. You have to select
	37	individual components like voltage regulators under corresponding
	38	menus in order to enable them.
	39	We communicate with the Hi6421v600 via a SPMI bus.
	40
	41	# to be placed at drivers/regulator
	42	config REGULATOR_HI6421V600
	43	tristate "HiSilicon Hi6421v600 PMIC voltage regulator support"
	44	depends on MFD_HI6421_SPMI && OF
	45	depends on REGULATOR
	46	help
	47	This driver provides support for the voltage regulators on
	48	HiSilicon Hi6421v600 PMU / Codec IC.
	49	This is used on Kirin 3670 boards, like HiKey 970.

drivers/staging/hikey9xx/Makefile+7−0

@@ -0,0 +1,7 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2
	3	obj-$(CONFIG_PHY_HI3670_USB) += phy-hi3670-usb3.o
	4
	5	obj-$(CONFIG_SPMI_HISI3670) += hisi-spmi-controller.o
	6	obj-$(CONFIG_MFD_HI6421_SPMI) += hi6421-spmi-pmic.o
	7	obj-$(CONFIG_REGULATOR_HI6421V600) += hi6421v600-regulator.o

drivers/staging/hikey9xx/TODO+5−0

@@ -0,0 +1,5 @@
	1	ToDo list:
	2
	3	- Port other drivers needed by Hikey 960/970;
	4	- Test drivers on Hikey 960;
	5	- Validate device tree bindings.

drivers/staging/hikey9xx/hi6421-spmi-pmic.c+342−0

@@ -0,0 +1,342 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Device driver for regulators in HISI PMIC IC
	4	*
	5	* Copyright (c) 2013 Linaro Ltd.
	6	* Copyright (c) 2011 Hisilicon.
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	*/
	19
	20	#include <linux/delay.h>
	21	#include <linux/device.h>
	22	#include <linux/err.h>
	23	#include <linux/interrupt.h>
	24	#include <linux/io.h>
	25	#include <linux/irq.h>
	26	#include <linux/mfd/core.h>
	27	#include <linux/mfd/hi6421-spmi-pmic.h>
	28	#include <linux/module.h>
	29	#include <linux/of_address.h>
	30	#include <linux/of_device.h>
	31	#include <linux/of_gpio.h>
	32	#include <linux/of.h>
	33	#include <linux/of_irq.h>
	34	#include <linux/platform_device.h>
	35	#include <linux/slab.h>
	36	#include <linux/spmi.h>
	37
	38	/* 8-bit register offset in PMIC */
	39	#define HISI_MASK_STATE 0xff
	40
	41	#define HISI_IRQ_ARRAY 2
	42	#define HISI_IRQ_NUM (HISI_IRQ_ARRAY * 8)
	43
	44	#define SOC_PMIC_IRQ_MASK_0_ADDR 0x0202
	45	#define SOC_PMIC_IRQ0_ADDR 0x0212
	46
	47	#define HISI_IRQ_KEY_NUM 0
	48	#define HISI_IRQ_KEY_VALUE 0xc0
	49	#define HISI_IRQ_KEY_DOWN 7
	50	#define HISI_IRQ_KEY_UP 6
	51
	52	#define HISI_MASK_FIELD 0xFF
	53	#define HISI_BITS 8
	54
	55	/define the first group interrupt register number/
	56	#define HISI_PMIC_FIRST_GROUP_INT_NUM 2
	57
	58	static const struct mfd_cell hi6421v600_devs[] = {
	59	{ .name = "hi6421v600-regulator", },
	60	};
	61
	62	/*
	63	* The PMIC register is only 8-bit.
	64	* Hisilicon SoC use hardware to map PMIC register into SoC mapping.
	65	* At here, we are accessing SoC register with 32-bit.
	66	*/
	67	int hi6421_spmi_pmic_read(struct hi6421_spmi_pmic *pmic, int reg)
	68	{
	69	struct spmi_device *pdev;
	70	u8 read_value = 0;
	71	u32 ret;
	72
	73	pdev = to_spmi_device(pmic->dev);
	74	if (!pdev) {
	75	pr_err("%s: pdev get failed!\n", __func__);
	76	return -ENODEV;
	77	}
	78
	79	ret = spmi_ext_register_readl(pdev, reg, &read_value, 1);
	80	if (ret) {
	81	pr_err("%s: spmi_ext_register_readl failed!\n", __func__);
	82	return ret;
	83	}
	84	return read_value;
	85	}
	86	EXPORT_SYMBOL(hi6421_spmi_pmic_read);
	87
	88	int hi6421_spmi_pmic_write(struct hi6421_spmi_pmic *pmic, int reg, u32 val)
	89	{
	90	struct spmi_device *pdev;
	91	u32 ret;
	92
	93	pdev = to_spmi_device(pmic->dev);
	94	if (!pdev) {
	95	pr_err("%s: pdev get failed!\n", __func__);
	96	return -ENODEV;
	97	}
	98
	99	ret = spmi_ext_register_writel(pdev, reg, (unsigned char *)&val, 1);
	100	if (ret)
	101	pr_err("%s: spmi_ext_register_writel failed!\n", __func__);
	102
	103	return ret;
	104	}
	105	EXPORT_SYMBOL(hi6421_spmi_pmic_write);
	106
	107	int hi6421_spmi_pmic_rmw(struct hi6421_spmi_pmic *pmic, int reg,
	108	u32 mask, u32 bits)
	109	{
	110	unsigned long flags;
	111	u32 data;
	112	int ret;
	113
	114	spin_lock_irqsave(&pmic->lock, flags);
	115	data = hi6421_spmi_pmic_read(pmic, reg) & ~mask;
	116	data \|= mask & bits;
	117	ret = hi6421_spmi_pmic_write(pmic, reg, data);
	118	spin_unlock_irqrestore(&pmic->lock, flags);
	119
	120	return ret;
	121	}
	122	EXPORT_SYMBOL(hi6421_spmi_pmic_rmw);
	123
	124	static irqreturn_t hi6421_spmi_irq_handler(int irq, void *data)
	125	{
	126	struct hi6421_spmi_pmic pmic = (struct hi6421_spmi_pmic )data;
	127	unsigned long pending;
	128	int i, offset;
	129
	130	for (i = 0; i < HISI_IRQ_ARRAY; i++) {
	131	pending = hi6421_spmi_pmic_read(pmic, (i + SOC_PMIC_IRQ0_ADDR));
	132	pending &= HISI_MASK_FIELD;
	133	if (pending != 0)
	134	pr_debug("pending[%d]=0x%lx\n\r", i, pending);
	135
	136	hi6421_spmi_pmic_write(pmic, (i + SOC_PMIC_IRQ0_ADDR), pending);
	137
	138	/* solve powerkey order */
	139	if ((i == HISI_IRQ_KEY_NUM) &&
	140	((pending & HISI_IRQ_KEY_VALUE) == HISI_IRQ_KEY_VALUE)) {
	141	generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_DOWN]);
	142	generic_handle_irq(pmic->irqs[HISI_IRQ_KEY_UP]);
	143	pending &= (~HISI_IRQ_KEY_VALUE);
	144	}
	145
	146	if (pending) {
	147	for_each_set_bit(offset, &pending, HISI_BITS)
	148	generic_handle_irq(pmic->irqs[offset + i * HISI_BITS]);
	149	}
	150	}
	151
	152	return IRQ_HANDLED;
	153	}
	154
	155	static void hi6421_spmi_irq_mask(struct irq_data *d)
	156	{
	157	struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d);
	158	u32 data, offset;
	159	unsigned long flags;
	160
	161	offset = (irqd_to_hwirq(d) >> 3);
	162	offset += SOC_PMIC_IRQ_MASK_0_ADDR;
	163
	164	spin_lock_irqsave(&pmic->lock, flags);
	165	data = hi6421_spmi_pmic_read(pmic, offset);
	166	data \|= (1 << (irqd_to_hwirq(d) & 0x07));
	167	hi6421_spmi_pmic_write(pmic, offset, data);
	168	spin_unlock_irqrestore(&pmic->lock, flags);
	169	}
	170
	171	static void hi6421_spmi_irq_unmask(struct irq_data *d)
	172	{
	173	struct hi6421_spmi_pmic *pmic = irq_data_get_irq_chip_data(d);
	174	u32 data, offset;
	175	unsigned long flags;
	176
	177	offset = (irqd_to_hwirq(d) >> 3);
	178	offset += SOC_PMIC_IRQ_MASK_0_ADDR;
	179
	180	spin_lock_irqsave(&pmic->lock, flags);
	181	data = hi6421_spmi_pmic_read(pmic, offset);
	182	data &= ~(1 << (irqd_to_hwirq(d) & 0x07));
	183	hi6421_spmi_pmic_write(pmic, offset, data);
	184	spin_unlock_irqrestore(&pmic->lock, flags);
	185	}
	186
	187	static struct irq_chip hi6421_spmi_pmu_irqchip = {
	188	.name = "hisi-irq",
	189	.irq_mask = hi6421_spmi_irq_mask,
	190	.irq_unmask = hi6421_spmi_irq_unmask,
	191	.irq_disable = hi6421_spmi_irq_mask,
	192	.irq_enable = hi6421_spmi_irq_unmask,
	193	};
	194
	195	static int hi6421_spmi_irq_map(struct irq_domain *d, unsigned int virq,
	196	irq_hw_number_t hw)
	197	{
	198	struct hi6421_spmi_pmic *pmic = d->host_data;
	199
	200	irq_set_chip_and_handler_name(virq, &hi6421_spmi_pmu_irqchip,
	201	handle_simple_irq, "hisi");
	202	irq_set_chip_data(virq, pmic);
	203	irq_set_irq_type(virq, IRQ_TYPE_NONE);
	204
	205	return 0;
	206	}
	207
	208	static const struct irq_domain_ops hi6421_spmi_domain_ops = {
	209	.map = hi6421_spmi_irq_map,
	210	.xlate = irq_domain_xlate_twocell,
	211	};
	212
	213	static void hi6421_spmi_pmic_irq_prc(struct hi6421_spmi_pmic *pmic)
	214	{
	215	int i, pending;
	216
	217	for (i = 0 ; i < HISI_IRQ_ARRAY; i++)
	218	hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ_MASK_0_ADDR + i,
	219	HISI_MASK_STATE);
	220
	221	for (i = 0 ; i < HISI_IRQ_ARRAY; i++) {
	222	pending = hi6421_spmi_pmic_read(pmic, SOC_PMIC_IRQ0_ADDR + i);
	223
	224	pr_debug("PMU IRQ address value:irq[0x%x] = 0x%x\n",
	225	SOC_PMIC_IRQ0_ADDR + i, pending);
	226	hi6421_spmi_pmic_write(pmic, SOC_PMIC_IRQ0_ADDR + i,
	227	HISI_MASK_STATE);
	228	}
	229	}
	230
	231	static int hi6421_spmi_pmic_probe(struct spmi_device *pdev)
	232	{
	233	struct device *dev = &pdev->dev;
	234	struct device_node *np = dev->of_node;
	235	struct hi6421_spmi_pmic *pmic;
	236	unsigned int virq;
	237	int ret, i;
	238
	239	pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL);
	240	if (!pmic)
	241	return -ENOMEM;
	242
	243	spin_lock_init(&pmic->lock);
	244
	245	pmic->dev = dev;
	246
	247	pmic->gpio = of_get_gpio(np, 0);
	248	if (pmic->gpio < 0)
	249	return pmic->gpio;
	250
	251	if (!gpio_is_valid(pmic->gpio))
	252	return -EINVAL;
	253
	254	ret = devm_gpio_request_one(dev, pmic->gpio, GPIOF_IN, "pmic");
	255	if (ret < 0) {
	256	dev_err(dev, "failed to request gpio%d\n", pmic->gpio);
	257	return ret;
	258	}
	259
	260	pmic->irq = gpio_to_irq(pmic->gpio);
	261
	262	hi6421_spmi_pmic_irq_prc(pmic);
	263
	264	pmic->irqs = devm_kzalloc(dev, HISI_IRQ_NUM * sizeof(int), GFP_KERNEL);
	265	if (!pmic->irqs)
	266	goto irq_malloc;
	267
	268	pmic->domain = irq_domain_add_simple(np, HISI_IRQ_NUM, 0,
	269	&hi6421_spmi_domain_ops, pmic);
	270	if (!pmic->domain) {
	271	dev_err(dev, "failed irq domain add simple!\n");
	272	ret = -ENODEV;
	273	goto irq_malloc;
	274	}
	275
	276	for (i = 0; i < HISI_IRQ_NUM; i++) {
	277	virq = irq_create_mapping(pmic->domain, i);
	278	if (!virq) {
	279	dev_err(dev, "Failed mapping hwirq\n");
	280	ret = -ENOSPC;
	281	goto irq_malloc;
	282	}
	283	pmic->irqs[i] = virq;
	284	dev_dbg(dev, "%s: pmic->irqs[%d] = %d\n",
	285	__func__, i, pmic->irqs[i]);
	286	}
	287
	288	ret = request_threaded_irq(pmic->irq, hi6421_spmi_irq_handler, NULL,
	289	IRQF_TRIGGER_LOW \| IRQF_SHARED \| IRQF_NO_SUSPEND,
	290	"pmic", pmic);
	291	if (ret < 0) {
	292	dev_err(dev, "could not claim pmic IRQ: error %d\n", ret);
	293	goto irq_malloc;
	294	}
	295
	296	dev_set_drvdata(&pdev->dev, pmic);
	297
	298	/*
	299	* The logic below will rely that the pmic is already stored at
	300	* drvdata.
	301	*/
	302	dev_dbg(&pdev->dev, "SPMI-PMIC: adding children for %pOF\n",
	303	pdev->dev.of_node);
	304	ret = devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE,
	305	hi6421v600_devs, ARRAY_SIZE(hi6421v600_devs),
	306	NULL, 0, NULL);
	307	if (!ret)
	308	return 0;
	309
	310	dev_err(dev, "Failed to add child devices: %d\n", ret);
	311
	312	irq_malloc:
	313	free_irq(pmic->irq, pmic);
	314
	315	return ret;
	316	}
	317
	318	static void hi6421_spmi_pmic_remove(struct spmi_device *pdev)
	319	{
	320	struct hi6421_spmi_pmic *pmic = dev_get_drvdata(&pdev->dev);
	321
	322	free_irq(pmic->irq, pmic);
	323	}
	324
	325	static const struct of_device_id pmic_spmi_id_table[] = {
	326	{ .compatible = "hisilicon,hi6421-spmi" },
	327	{ }
	328	};
	329	MODULE_DEVICE_TABLE(of, pmic_spmi_id_table);
	330
	331	static struct spmi_driver hi6421_spmi_pmic_driver = {
	332	.driver = {
	333	.name = "hi6421-spmi-pmic",
	334	.of_match_table = pmic_spmi_id_table,
	335	},
	336	.probe = hi6421_spmi_pmic_probe,
	337	.remove = hi6421_spmi_pmic_remove,
	338	};
	339	module_spmi_driver(hi6421_spmi_pmic_driver);
	340
	341	MODULE_DESCRIPTION("HiSilicon Hi6421v600 SPMI PMIC driver");
	342	MODULE_LICENSE("GPL v2");

drivers/staging/hikey9xx/hi6421v600-regulator.c+478−0

@@ -0,0 +1,478 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Device driver for regulators in Hisi IC
	4	*
	5	* Copyright (c) 2013 Linaro Ltd.
	6	* Copyright (c) 2011 Hisilicon.
	7	*
	8	* Guodong Xu <guodong.xu@linaro.org>
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*/
	19
	20	#include <linux/delay.h>
	21	#include <linux/device.h>
	22	#include <linux/err.h>
	23	#include <linux/io.h>
	24	#include <linux/mfd/hi6421-spmi-pmic.h>
	25	#include <linux/module.h>
	26	#include <linux/of_address.h>
	27	#include <linux/of_device.h>
	28	#include <linux/of.h>
	29	#include <linux/platform_device.h>
	30	#include <linux/regmap.h>
	31	#include <linux/regulator/driver.h>
	32	#include <linux/regulator/machine.h>
	33	#include <linux/regulator/of_regulator.h>
	34	#include <linux/seq_file.h>
	35	#include <linux/slab.h>
	36	#include <linux/spmi.h>
	37	#include <linux/time.h>
	38	#include <linux/uaccess.h>
	39
	40	#define rdev_dbg(rdev, fmt, arg...) \
	41	pr_debug("%s: %s: " fmt, (rdev)->desc->name, __func__, ##arg)
	42
	43	struct hi6421v600_regulator {
	44	struct regulator_desc rdesc;
	45	struct hi6421_spmi_pmic *pmic;
	46	u32 eco_mode_mask, eco_uA;
	47	};
	48
	49	static DEFINE_MUTEX(enable_mutex);
	50
	51	/*
	52	* helper function to ensure when it returns it is at least 'delay_us'
	53	* microseconds after 'since'.
	54	*/
	55
	56	static int hi6421_spmi_regulator_is_enabled(struct regulator_dev *rdev)
	57	{
	58	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	59	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	60	u32 reg_val;
	61
	62	reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg);
	63
	64	rdev_dbg(rdev,
	65	"enable_reg=0x%x, val= 0x%x, enable_state=%d\n",
	66	rdev->desc->enable_reg,
	67	reg_val, (reg_val & rdev->desc->enable_mask));
	68
	69	return ((reg_val & rdev->desc->enable_mask) != 0);
	70	}
	71
	72	static int hi6421_spmi_regulator_enable(struct regulator_dev *rdev)
	73	{
	74	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	75	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	76
	77	/* cannot enable more than one regulator at one time */
	78	mutex_lock(&enable_mutex);
	79	usleep_range(HISI_REGS_ENA_PROTECT_TIME,
	80	HISI_REGS_ENA_PROTECT_TIME + 1000);
	81
	82	/* set enable register */
	83	rdev_dbg(rdev,
	84	"off_on_delay=%d us, enable_reg=0x%x, enable_mask=0x%x\n",
	85	rdev->desc->off_on_delay, rdev->desc->enable_reg,
	86	rdev->desc->enable_mask);
	87
	88	hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
	89	rdev->desc->enable_mask,
	90	rdev->desc->enable_mask);
	91
	92	mutex_unlock(&enable_mutex);
	93
	94	return 0;
	95	}
	96
	97	static int hi6421_spmi_regulator_disable(struct regulator_dev *rdev)
	98	{
	99	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	100	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	101
	102	/* set enable register to 0 */
	103	rdev_dbg(rdev, "enable_reg=0x%x, enable_mask=0x%x\n",
	104	rdev->desc->enable_reg, rdev->desc->enable_mask);
	105
	106	hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
	107	rdev->desc->enable_mask, 0);
	108
	109	return 0;
	110	}
	111
	112	static int hi6421_spmi_regulator_get_voltage_sel(struct regulator_dev *rdev)
	113	{
	114	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	115	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	116	u32 reg_val, selector;
	117
	118	/* get voltage selector */
	119	reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->vsel_reg);
	120
	121	selector = (reg_val & rdev->desc->vsel_mask) >> (ffs(rdev->desc->vsel_mask) - 1);
	122
	123	rdev_dbg(rdev,
	124	"vsel_reg=0x%x, value=0x%x, entry=0x%x, voltage=%d mV\n",
	125	rdev->desc->vsel_reg, reg_val, selector,
	126	rdev->desc->ops->list_voltage(rdev, selector) / 1000);
	127
	128	return selector;
	129	}
	130
	131	static int hi6421_spmi_regulator_set_voltage_sel(struct regulator_dev *rdev,
	132	unsigned int selector)
	133	{
	134	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	135	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	136	u32 reg_val;
	137
	138	if (unlikely(selector >= rdev->desc->n_voltages))
	139	return -EINVAL;
	140
	141	reg_val = selector << (ffs(rdev->desc->vsel_mask) - 1);
	142
	143	/* set voltage selector */
	144	rdev_dbg(rdev,
	145	"vsel_reg=0x%x, mask=0x%x, value=0x%x, voltage=%d mV\n",
	146	rdev->desc->vsel_reg, rdev->desc->vsel_mask, reg_val,
	147	rdev->desc->ops->list_voltage(rdev, selector) / 1000);
	148
	149	hi6421_spmi_pmic_rmw(pmic, rdev->desc->vsel_reg,
	150	rdev->desc->vsel_mask, reg_val);
	151
	152	return 0;
	153	}
	154
	155	static unsigned int hi6421_spmi_regulator_get_mode(struct regulator_dev *rdev)
	156	{
	157	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	158	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	159	unsigned int mode;
	160	u32 reg_val;
	161
	162	reg_val = hi6421_spmi_pmic_read(pmic, rdev->desc->enable_reg);
	163
	164	if (reg_val & sreg->eco_mode_mask)
	165	mode = REGULATOR_MODE_IDLE;
	166	else
	167	mode = REGULATOR_MODE_NORMAL;
	168
	169	rdev_dbg(rdev,
	170	"enable_reg=0x%x, eco_mode_mask=0x%x, reg_val=0x%x, %s mode\n",
	171	rdev->desc->enable_reg, sreg->eco_mode_mask, reg_val,
	172	mode == REGULATOR_MODE_IDLE ? "idle" : "normal");
	173
	174	return mode;
	175	}
	176
	177	static int hi6421_spmi_regulator_set_mode(struct regulator_dev *rdev,
	178	unsigned int mode)
	179	{
	180	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	181	struct hi6421_spmi_pmic *pmic = sreg->pmic;
	182	u32 val;
	183
	184	switch (mode) {
	185	case REGULATOR_MODE_NORMAL:
	186	val = 0;
	187	break;
	188	case REGULATOR_MODE_IDLE:
	189	val = sreg->eco_mode_mask << (ffs(sreg->eco_mode_mask) - 1);
	190	break;
	191	default:
	192	return -EINVAL;
	193	}
	194
	195	/* set mode */
	196	rdev_dbg(rdev, "enable_reg=0x%x, eco_mode_mask=0x%x, value=0x%x\n",
	197	rdev->desc->enable_reg, sreg->eco_mode_mask, val);
	198
	199	hi6421_spmi_pmic_rmw(pmic, rdev->desc->enable_reg,
	200	sreg->eco_mode_mask, val);
	201
	202	return 0;
	203	}
	204
	205	static unsigned int
	206	hi6421_spmi_regulator_get_optimum_mode(struct regulator_dev *rdev,
	207	int input_uV, int output_uV,
	208	int load_uA)
	209	{
	210	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	211
	212	if (load_uA \|\| ((unsigned int)load_uA > sreg->eco_uA))
	213	return REGULATOR_MODE_NORMAL;
	214
	215	return REGULATOR_MODE_IDLE;
	216	}
	217
	218	static int hi6421_spmi_dt_parse(struct platform_device *pdev,
	219	struct hi6421v600_regulator *sreg,
	220	struct regulator_desc *rdesc)
	221	{
	222	struct device *dev = &pdev->dev;
	223	struct device_node *np = dev->of_node;
	224	unsigned int *v_table;
	225	int ret;
	226
	227	ret = of_property_read_u32(np, "reg", &rdesc->enable_reg);
	228	if (ret) {
	229	dev_err(dev, "missing reg property\n");
	230	return ret;
	231	}
	232
	233	ret = of_property_read_u32(np, "vsel-reg", &rdesc->vsel_reg);
	234	if (ret) {
	235	dev_err(dev, "missing vsel-reg property\n");
	236	return ret;
	237	}
	238
	239	ret = of_property_read_u32(np, "enable-mask", &rdesc->enable_mask);
	240	if (ret) {
	241	dev_err(dev, "missing enable-mask property\n");
	242	return ret;
	243	}
	244
	245	/*
	246	* Not all regulators work on idle mode
	247	*/
	248	ret = of_property_read_u32(np, "idle-mode-mask", &sreg->eco_mode_mask);
	249	if (ret) {
	250	dev_dbg(dev, "LDO doesn't support economy mode.\n");
	251	sreg->eco_mode_mask = 0;
	252	sreg->eco_uA = 0;
	253	} else {
	254	ret = of_property_read_u32(np, "eco-microamp", &sreg->eco_uA);
	255	if (ret) {
	256	dev_err(dev, "missing eco-microamp property\n");
	257	return ret;
	258	}
	259	}
	260
	261	/* parse .off-on-delay */
	262	ret = of_property_read_u32(np, "off-on-delay-us",
	263	&rdesc->off_on_delay);
	264	if (ret) {
	265	dev_err(dev, "missing off-on-delay-us property\n");
	266	return ret;
	267	}
	268
	269	/* parse .enable_time */
	270	ret = of_property_read_u32(np, "startup-delay-us",
	271	&rdesc->enable_time);
	272	if (ret) {
	273	dev_err(dev, "missing startup-delay-us property\n");
	274	return ret;
	275	}
	276
	277	/* FIXME: are there a better value for this? */
	278	rdesc->ramp_delay = rdesc->enable_time;
	279
	280	/* parse volt_table */
	281
	282	rdesc->n_voltages = of_property_count_u32_elems(np, "voltage-table");
	283
	284	v_table = devm_kzalloc(dev, sizeof(unsigned int) * rdesc->n_voltages,
	285	GFP_KERNEL);
	286	if (unlikely(!v_table))
	287	return -ENOMEM;
	288	rdesc->volt_table = v_table;
	289
	290	ret = of_property_read_u32_array(np, "voltage-table",
	291	v_table, rdesc->n_voltages);
	292	if (ret) {
	293	dev_err(dev, "missing voltage-table property\n");
	294	return ret;
	295	}
	296
	297	/*
	298	* Instead of explicitly requiring a mask for the voltage selector,
	299	* as they all start from bit zero (at least on the known LDOs),
	300	* just use the number of voltages at the voltage table, getting the
	301	* minimal mask that would pick everything.
	302	*/
	303	rdesc->vsel_mask = (1 << (fls(rdesc->n_voltages) - 1)) - 1;
	304
	305	dev_dbg(dev, "voltage selector settings: reg: 0x%x, mask: 0x%x\n",
	306	rdesc->vsel_reg, rdesc->vsel_mask);
	307
	308	return 0;
	309	}
	310
	311	static const struct regulator_ops hi6421_spmi_ldo_rops = {
	312	.is_enabled = hi6421_spmi_regulator_is_enabled,
	313	.enable = hi6421_spmi_regulator_enable,
	314	.disable = hi6421_spmi_regulator_disable,
	315	.list_voltage = regulator_list_voltage_table,
	316	.map_voltage = regulator_map_voltage_iterate,
	317	.get_voltage_sel = hi6421_spmi_regulator_get_voltage_sel,
	318	.set_voltage_sel = hi6421_spmi_regulator_set_voltage_sel,
	319	.get_mode = hi6421_spmi_regulator_get_mode,
	320	.set_mode = hi6421_spmi_regulator_set_mode,
	321	.get_optimum_mode = hi6421_spmi_regulator_get_optimum_mode,
	322	};
	323
	324	static int hi6421_spmi_regulator_probe_ldo(struct platform_device *pdev,
	325	struct device_node *np,
	326	struct hi6421_spmi_pmic *pmic)
	327	{
	328	struct regulation_constraints *constraint;
	329	struct regulator_init_data *initdata;
	330	struct regulator_config config = { };
	331	struct hi6421v600_regulator *sreg;
	332	struct device *dev = &pdev->dev;
	333	struct regulator_desc *rdesc;
	334	struct regulator_dev *rdev;
	335	const char *supplyname;
	336	int ret;
	337
	338	initdata = of_get_regulator_init_data(dev, np, NULL);
	339	if (!initdata) {
	340	dev_err(dev, "failed to get regulator data\n");
	341	return -EINVAL;
	342	}
	343
	344	sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
	345	if (!sreg)
	346	return -ENOMEM;
	347
	348	sreg->pmic = pmic;
	349	rdesc = &sreg->rdesc;
	350
	351	rdesc->name = initdata->constraints.name;
	352	rdesc->ops = &hi6421_spmi_ldo_rops;
	353	rdesc->type = REGULATOR_VOLTAGE;
	354	rdesc->min_uV = initdata->constraints.min_uV;
	355
	356	supplyname = of_get_property(np, "supply_name", NULL);
	357	if (supplyname)
	358	initdata->supply_regulator = supplyname;
	359
	360	/* parse device tree data for regulator specific */
	361	ret = hi6421_spmi_dt_parse(pdev, sreg, rdesc);
	362	if (ret)
	363	return ret;
	364
	365	/* hisi regulator supports two modes */
	366	constraint = &initdata->constraints;
	367
	368	constraint->valid_modes_mask = REGULATOR_MODE_NORMAL;
	369	if (sreg->eco_mode_mask) {
	370	constraint->valid_modes_mask \|= REGULATOR_MODE_IDLE;
	371	constraint->valid_ops_mask \|= REGULATOR_CHANGE_MODE;
	372	}
	373
	374	config.dev = &pdev->dev;
	375	config.init_data = initdata;
	376	config.driver_data = sreg;
	377	config.of_node = pdev->dev.of_node;
	378
	379	/* register regulator */
	380	rdev = regulator_register(rdesc, &config);
	381	if (IS_ERR(rdev)) {
	382	dev_err(dev, "failed to register %s\n",
	383	rdesc->name);
	384	return PTR_ERR(rdev);
	385	}
	386
	387	rdev_dbg(rdev, "valid_modes_mask: 0x%x, valid_ops_mask: 0x%x\n",
	388	constraint->valid_modes_mask, constraint->valid_ops_mask);
	389
	390	dev_set_drvdata(dev, rdev);
	391
	392	return 0;
	393	}
	394
	395	static int hi6421_spmi_regulator_probe(struct platform_device *pdev)
	396	{
	397	struct device *pmic_dev = pdev->dev.parent;
	398	struct device_node *np = pmic_dev->of_node;
	399	struct device_node regulators, child;
	400	struct platform_device *new_pdev;
	401	struct hi6421_spmi_pmic *pmic;
	402	int ret;
	403
	404	/*
	405	* This driver is meant to be called by hi6421-spmi-core,
	406	* which should first set drvdata. If this doesn't happen, hit
	407	* a warn on and return.
	408	*/
	409	pmic = dev_get_drvdata(pmic_dev);
	410	if (WARN_ON(!pmic))
	411	return -ENODEV;
	412
	413	regulators = of_get_child_by_name(np, "regulators");
	414	if (!regulators) {
	415	dev_err(&pdev->dev, "regulator node not found\n");
	416	return -ENODEV;
	417	}
	418
	419	/*
	420	* Parse all LDO regulator nodes
	421	*/
	422	for_each_child_of_node(regulators, child) {
	423	dev_dbg(&pdev->dev, "adding child %pOF\n", child);
	424
	425	new_pdev = platform_device_alloc(child->name, -1);
	426	new_pdev->dev.parent = pmic_dev;
	427	new_pdev->dev.of_node = of_node_get(child);
	428
	429	ret = platform_device_add(new_pdev);
	430	if (ret < 0) {
	431	platform_device_put(new_pdev);
	432	continue;
	433	}
	434
	435	ret = hi6421_spmi_regulator_probe_ldo(new_pdev, child, pmic);
	436	if (ret < 0)
	437	platform_device_put(new_pdev);
	438	}
	439
	440	of_node_put(regulators);
	441
	442	return 0;
	443	}
	444
	445	static int hi6421_spmi_regulator_remove(struct platform_device *pdev)
	446	{
	447	struct regulator_dev *rdev = dev_get_drvdata(&pdev->dev);
	448	struct hi6421v600_regulator *sreg = rdev_get_drvdata(rdev);
	449
	450	regulator_unregister(rdev);
	451
	452	if (rdev->desc->volt_table)
	453	devm_kfree(&pdev->dev, (unsigned int *)rdev->desc->volt_table);
	454
	455	kfree(sreg);
	456
	457	return 0;
	458	}
	459
	460	static const struct platform_device_id hi6421v600_regulator_table[] = {
	461	{ .name = "hi6421v600-regulator" },
	462	{},
	463	};
	464	MODULE_DEVICE_TABLE(platform, hi6421v600_regulator_table);
	465
	466	static struct platform_driver hi6421v600_regulator_driver = {
	467	.id_table = hi6421v600_regulator_table,
	468	.driver = {
	469	.name = "hi6421v600-regulator",
	470	},
	471	.probe = hi6421_spmi_regulator_probe,
	472	.remove = hi6421_spmi_regulator_remove,
	473	};
	474	module_platform_driver(hi6421v600_regulator_driver);
	475
	476	MODULE_DESCRIPTION("Hi6421v600 regulator driver");
	477	MODULE_LICENSE("GPL v2");
	478

drivers/staging/hikey9xx/hisi-spmi-controller.c+358−0

@@ -0,0 +1,358 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2
	3	#include <linux/delay.h>
	4	#include <linux/err.h>
	5	#include <linux/interrupt.h>
	6	#include <linux/io.h>
	7	#include <linux/kernel.h>
	8	#include <linux/module.h>
	9	#include <linux/of.h>
	10	#include <linux/platform_device.h>
	11	#include <linux/seq_file.h>
	12	#include <linux/slab.h>
	13	#include <linux/spmi.h>
	14
	15	/*
	16	* SPMI register addr
	17	*/
	18	#define SPMI_CHANNEL_OFFSET 0x0300
	19	#define SPMI_SLAVE_OFFSET 0x20
	20
	21	#define SPMI_APB_SPMI_CMD_BASE_ADDR 0x0100
	22
	23	#define SPMI_APB_SPMI_WDATA0_BASE_ADDR 0x0104
	24	#define SPMI_APB_SPMI_WDATA1_BASE_ADDR 0x0108
	25	#define SPMI_APB_SPMI_WDATA2_BASE_ADDR 0x010c
	26	#define SPMI_APB_SPMI_WDATA3_BASE_ADDR 0x0110
	27
	28	#define SPMI_APB_SPMI_STATUS_BASE_ADDR 0x0200
	29
	30	#define SPMI_APB_SPMI_RDATA0_BASE_ADDR 0x0204
	31	#define SPMI_APB_SPMI_RDATA1_BASE_ADDR 0x0208
	32	#define SPMI_APB_SPMI_RDATA2_BASE_ADDR 0x020c
	33	#define SPMI_APB_SPMI_RDATA3_BASE_ADDR 0x0210
	34
	35	#define SPMI_PER_DATAREG_BYTE 4
	36	/*
	37	* SPMI cmd register
	38	*/
	39	#define SPMI_APB_SPMI_CMD_EN BIT(31)
	40	#define SPMI_APB_SPMI_CMD_TYPE_OFFSET 24
	41	#define SPMI_APB_SPMI_CMD_LENGTH_OFFSET 20
	42	#define SPMI_APB_SPMI_CMD_SLAVEID_OFFSET 16
	43	#define SPMI_APB_SPMI_CMD_ADDR_OFFSET 0
	44
	45	/* Command Opcodes */
	46
	47	enum spmi_controller_cmd_op_code {
	48	SPMI_CMD_REG_ZERO_WRITE = 0,
	49	SPMI_CMD_REG_WRITE = 1,
	50	SPMI_CMD_REG_READ = 2,
	51	SPMI_CMD_EXT_REG_WRITE = 3,
	52	SPMI_CMD_EXT_REG_READ = 4,
	53	SPMI_CMD_EXT_REG_WRITE_L = 5,
	54	SPMI_CMD_EXT_REG_READ_L = 6,
	55	SPMI_CMD_REG_RESET = 7,
	56	SPMI_CMD_REG_SLEEP = 8,
	57	SPMI_CMD_REG_SHUTDOWN = 9,
	58	SPMI_CMD_REG_WAKEUP = 10,
	59	};
	60
	61	/*
	62	* SPMI status register
	63	*/
	64	#define SPMI_APB_TRANS_DONE BIT(0)
	65	#define SPMI_APB_TRANS_FAIL BIT(2)
	66
	67	/* Command register fields */
	68	#define SPMI_CONTROLLER_CMD_MAX_BYTE_COUNT 16
	69
	70	/* Maximum number of support PMIC peripherals */
	71	#define SPMI_CONTROLLER_TIMEOUT_US 1000
	72	#define SPMI_CONTROLLER_MAX_TRANS_BYTES 16
	73
	74	struct spmi_controller_dev {
	75	struct spmi_controller *controller;
	76	struct device *dev;
	77	void __iomem *base;
	78	spinlock_t lock;
	79	u32 channel;
	80	};
	81
	82	static int spmi_controller_wait_for_done(struct device *dev,
	83	struct spmi_controller_dev *ctrl_dev,
	84	void __iomem *base, u8 sid, u16 addr)
	85	{
	86	u32 timeout = SPMI_CONTROLLER_TIMEOUT_US;
	87	u32 status, offset;
	88
	89	offset = SPMI_APB_SPMI_STATUS_BASE_ADDR;
	90	offset += SPMI_CHANNEL_OFFSET * ctrl_dev->channel + SPMI_SLAVE_OFFSET * sid;
	91
	92	do {
	93	status = readl(base + offset);
	94
	95	if (status & SPMI_APB_TRANS_DONE) {
	96	if (status & SPMI_APB_TRANS_FAIL) {
	97	dev_err(dev, "%s: transaction failed (0x%x)\n",
	98	__func__, status);
	99	return -EIO;
	100	}
	101	dev_dbg(dev, "%s: status 0x%x\n", __func__, status);
	102	return 0;
	103	}
	104	udelay(1);
	105	} while (timeout--);
	106
	107	dev_err(dev, "%s: timeout, status 0x%x\n", __func__, status);
	108	return -ETIMEDOUT;
	109	}
	110
	111	static int spmi_read_cmd(struct spmi_controller *ctrl,
	112	u8 opc, u8 slave_id, u16 slave_addr, u8 *__buf, size_t bc)
	113	{
	114	struct spmi_controller_dev *spmi_controller = dev_get_drvdata(&ctrl->dev);
	115	u32 chnl_ofst = SPMI_CHANNEL_OFFSET * spmi_controller->channel;
	116	unsigned long flags;
	117	u8 *buf = __buf;
	118	u32 cmd, data;
	119	int rc;
	120	u8 op_code, i;
	121
	122	if (bc > SPMI_CONTROLLER_MAX_TRANS_BYTES) {
	123	dev_err(&ctrl->dev,
	124	"spmi_controller supports 1..%d bytes per trans, but:%zu requested\n",
	125	SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
	126	return -EINVAL;
	127	}
	128
	129	switch (opc) {
	130	case SPMI_CMD_READ:
	131	op_code = SPMI_CMD_REG_READ;
	132	break;
	133	case SPMI_CMD_EXT_READ:
	134	op_code = SPMI_CMD_EXT_REG_READ;
	135	break;
	136	case SPMI_CMD_EXT_READL:
	137	op_code = SPMI_CMD_EXT_REG_READ_L;
	138	break;
	139	default:
	140	dev_err(&ctrl->dev, "invalid read cmd 0x%x\n", opc);
	141	return -EINVAL;
	142	}
	143
	144	cmd = SPMI_APB_SPMI_CMD_EN \|
	145	(op_code << SPMI_APB_SPMI_CMD_TYPE_OFFSET) \|
	146	((bc - 1) << SPMI_APB_SPMI_CMD_LENGTH_OFFSET) \|
	147	((slave_id & 0xf) << SPMI_APB_SPMI_CMD_SLAVEID_OFFSET) \| /* slvid */
	148	((slave_addr & 0xffff) << SPMI_APB_SPMI_CMD_ADDR_OFFSET); /* slave_addr */
	149
	150	spin_lock_irqsave(&spmi_controller->lock, flags);
	151
	152	writel(cmd, spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
	153
	154	rc = spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
	155	spmi_controller->base, slave_id, slave_addr);
	156	if (rc)
	157	goto done;
	158
	159	for (i = 0; bc > i * SPMI_PER_DATAREG_BYTE; i++) {
	160	data = readl(spmi_controller->base + chnl_ofst +
	161	SPMI_SLAVE_OFFSET * slave_id +
	162	SPMI_APB_SPMI_RDATA0_BASE_ADDR +
	163	i * SPMI_PER_DATAREG_BYTE);
	164	data = be32_to_cpu((__be32)data);
	165	if ((bc - i * SPMI_PER_DATAREG_BYTE) >> 2) {
	166	memcpy(buf, &data, sizeof(data));
	167	buf += sizeof(data);
	168	} else {
	169	memcpy(buf, &data, bc % SPMI_PER_DATAREG_BYTE);
	170	buf += (bc % SPMI_PER_DATAREG_BYTE);
	171	}
	172	}
	173
	174	done:
	175	spin_unlock_irqrestore(&spmi_controller->lock, flags);
	176	if (rc)
	177	dev_err(&ctrl->dev,
	178	"spmi read wait timeout op:0x%x slave_id:%d slave_addr:0x%x bc:%zu\n",
	179	opc, slave_id, slave_addr, bc + 1);
	180	else
	181	dev_dbg(&ctrl->dev, "%s: id:%d slave_addr:0x%x, read value: %*ph\n",
	182	__func__, slave_id, slave_addr, (int)bc, __buf);
	183
	184	return rc;
	185	}
	186
	187	static int spmi_write_cmd(struct spmi_controller *ctrl,
	188	u8 opc, u8 slave_id, u16 slave_addr, const u8 *__buf, size_t bc)
	189	{
	190	struct spmi_controller_dev *spmi_controller = dev_get_drvdata(&ctrl->dev);
	191	u32 chnl_ofst = SPMI_CHANNEL_OFFSET * spmi_controller->channel;
	192	const u8 *buf = __buf;
	193	unsigned long flags;
	194	u32 cmd, data;
	195	int rc;
	196	u8 op_code, i;
	197
	198	if (bc > SPMI_CONTROLLER_MAX_TRANS_BYTES) {
	199	dev_err(&ctrl->dev,
	200	"spmi_controller supports 1..%d bytes per trans, but:%zu requested\n",
	201	SPMI_CONTROLLER_MAX_TRANS_BYTES, bc);
	202	return -EINVAL;
	203	}
	204
	205	switch (opc) {
	206	case SPMI_CMD_WRITE:
	207	op_code = SPMI_CMD_REG_WRITE;
	208	break;
	209	case SPMI_CMD_EXT_WRITE:
	210	op_code = SPMI_CMD_EXT_REG_WRITE;
	211	break;
	212	case SPMI_CMD_EXT_WRITEL:
	213	op_code = SPMI_CMD_EXT_REG_WRITE_L;
	214	break;
	215	default:
	216	dev_err(&ctrl->dev, "invalid write cmd 0x%x\n", opc);
	217	return -EINVAL;
	218	}
	219
	220	cmd = SPMI_APB_SPMI_CMD_EN \|
	221	(op_code << SPMI_APB_SPMI_CMD_TYPE_OFFSET) \|
	222	((bc - 1) << SPMI_APB_SPMI_CMD_LENGTH_OFFSET) \|
	223	((slave_id & 0xf) << SPMI_APB_SPMI_CMD_SLAVEID_OFFSET) \|
	224	((slave_addr & 0xffff) << SPMI_APB_SPMI_CMD_ADDR_OFFSET);
	225
	226	/* Write data to FIFOs */
	227	spin_lock_irqsave(&spmi_controller->lock, flags);
	228
	229	for (i = 0; bc > i * SPMI_PER_DATAREG_BYTE; i++) {
	230	data = 0;
	231	if ((bc - i * SPMI_PER_DATAREG_BYTE) >> 2) {
	232	memcpy(&data, buf, sizeof(data));
	233	buf += sizeof(data);
	234	} else {
	235	memcpy(&data, buf, bc % SPMI_PER_DATAREG_BYTE);
	236	buf += (bc % SPMI_PER_DATAREG_BYTE);
	237	}
	238
	239	writel((u32)cpu_to_be32(data),
	240	spmi_controller->base + chnl_ofst +
	241	SPMI_APB_SPMI_WDATA0_BASE_ADDR +
	242	SPMI_PER_DATAREG_BYTE * i);
	243	}
	244
	245	/* Start the transaction */
	246	writel(cmd, spmi_controller->base + chnl_ofst + SPMI_APB_SPMI_CMD_BASE_ADDR);
	247
	248	rc = spmi_controller_wait_for_done(&ctrl->dev, spmi_controller,
	249	spmi_controller->base, slave_id,
	250	slave_addr);
	251	spin_unlock_irqrestore(&spmi_controller->lock, flags);
	252
	253	if (rc)
	254	dev_err(&ctrl->dev, "spmi write wait timeout op:0x%x slave_id:%d slave_addr:0x%x bc:%zu\n",
	255	opc, slave_id, slave_addr, bc);
	256	else
	257	dev_dbg(&ctrl->dev, "%s: id:%d slave_addr:0x%x, wrote value: %*ph\n",
	258	__func__, slave_id, slave_addr, (int)bc, __buf);
	259
	260	return rc;
	261	}
	262
	263	static int spmi_controller_probe(struct platform_device *pdev)
	264	{
	265	struct spmi_controller_dev *spmi_controller;
	266	struct spmi_controller *ctrl;
	267	struct resource *iores;
	268	int ret;
	269
	270	ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*spmi_controller));
	271	if (!ctrl) {
	272	dev_err(&pdev->dev, "can not allocate spmi_controller data\n");
	273	return -ENOMEM;
	274	}
	275	spmi_controller = spmi_controller_get_drvdata(ctrl);
	276	spmi_controller->controller = ctrl;
	277
	278	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	279	if (!iores) {
	280	dev_err(&pdev->dev, "can not get resource!\n");
	281	return -EINVAL;
	282	}
	283
	284	spmi_controller->base = devm_ioremap(&pdev->dev, iores->start,
	285	resource_size(iores));
	286	if (!spmi_controller->base) {
	287	dev_err(&pdev->dev, "can not remap base addr!\n");
	288	return -EADDRNOTAVAIL;
	289	}
	290
	291	ret = of_property_read_u32(pdev->dev.of_node, "spmi-channel",
	292	&spmi_controller->channel);
	293	if (ret) {
	294	dev_err(&pdev->dev, "can not get channel\n");
	295	return -ENODEV;
	296	}
	297
	298	platform_set_drvdata(pdev, spmi_controller);
	299	dev_set_drvdata(&ctrl->dev, spmi_controller);
	300
	301	spin_lock_init(&spmi_controller->lock);
	302
	303	ctrl->nr = spmi_controller->channel;
	304	ctrl->dev.parent = pdev->dev.parent;
	305	ctrl->dev.of_node = of_node_get(pdev->dev.of_node);
	306
	307	/* Callbacks */
	308	ctrl->read_cmd = spmi_read_cmd;
	309	ctrl->write_cmd = spmi_write_cmd;
	310
	311	ret = spmi_controller_add(ctrl);
	312	if (ret)
	313	dev_err(&pdev->dev, "spmi_add_controller failed with error %d!\n", ret);
	314
	315	return ret;
	316	}
	317
	318	static int spmi_del_controller(struct platform_device *pdev)
	319	{
	320	struct spmi_controller *ctrl = platform_get_drvdata(pdev);
	321
	322	spmi_controller_remove(ctrl);
	323	kfree(ctrl);
	324	return 0;
	325	}
	326
	327	static const struct of_device_id spmi_controller_match_table[] = {
	328	{
	329	.compatible = "hisilicon,kirin970-spmi-controller",
	330	},
	331	{}
	332	};
	333	MODULE_DEVICE_TABLE(of, spmi_controller_match_table);
	334
	335	static struct platform_driver spmi_controller_driver = {
	336	.probe = spmi_controller_probe,
	337	.remove = spmi_del_controller,
	338	.driver = {
	339	.name = "hisi_spmi_controller",
	340	.of_match_table = spmi_controller_match_table,
	341	},
	342	};
	343
	344	static int __init spmi_controller_init(void)
	345	{
	346	return platform_driver_register(&spmi_controller_driver);
	347	}
	348	postcore_initcall(spmi_controller_init);
	349
	350	static void __exit spmi_controller_exit(void)
	351	{
	352	platform_driver_unregister(&spmi_controller_driver);
	353	}
	354	module_exit(spmi_controller_exit);
	355
	356	MODULE_LICENSE("GPL v2");
	357	MODULE_VERSION("1.0");
	358	MODULE_ALIAS("platform:spmi_controller");

drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml+159−0

@@ -0,0 +1,159 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/mfd/hisilicon,hi6421-spmi-pmic.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: HiSilicon 6421v600 SPMI PMIC
	8
	9	maintainers:
	10	- Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	11
	12	description: \|
	13	HiSilicon 6421v600 should be connected inside a MIPI System Power Management
	14	(SPMI) bus. It provides interrupts and power supply.
	15
	16	The GPIO and interrupt settings are represented as part of the top-level PMIC
	17	node.
	18
	19	The SPMI controller part is provided by
	20	drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml.
	21
	22	properties:
	23	$nodename:
	24	pattern: "pmic@[0-9a-f]"
	25
	26	compatible:
	27	const: hisilicon,hi6421v600-spmi
	28
	29	reg:
	30	maxItems: 1
	31
	32	'#interrupt-cells':
	33	const: 2
	34
	35	interrupt-controller:
	36	description:
	37	Identify that the PMIC is capable of behaving as an interrupt controller.
	38
	39	gpios:
	40	maxItems: 1
	41
	42	regulators:
	43	type: object
	44
	45	properties:
	46	'#address-cells':
	47	const: 1
	48
	49	'#size-cells':
	50	const: 0
	51
	52	patternProperties:
	53	'^ldo[0-9]+@[0-9a-f]$':
	54	type: object
	55
	56	$ref: "/schemas/regulator/regulator.yaml#"
	57
	58	properties:
	59	reg:
	60	description: Enable register.
	61
	62	'#address-cells':
	63	const: 1
	64
	65	'#size-cells':
	66	const: 0
	67
	68	vsel-reg:
	69	description: Voltage selector register.
	70
	71	enable-mask:
	72	description: Bitmask used to enable the regulator.
	73
	74	voltage-table:
	75	description: Table with the selector items for the voltage regulator.
	76	minItems: 2
	77	maxItems: 16
	78
	79	off-on-delay-us:
	80	description: Time required for changing state to enabled in microseconds.
	81
	82	startup-delay-us:
	83	description: Startup time in microseconds.
	84
	85	idle-mode-mask:
	86	description: Bitmask used to put the regulator on idle mode.
	87
	88	eco-microamp:
	89	description: Maximum current while on idle mode.
	90
	91	required:
	92	- reg
	93	- vsel-reg
	94	- enable-mask
	95	- voltage-table
	96	- off-on-delay-us
	97	- startup-delay-us
	98
	99	required:
	100	- compatible
	101	- reg
	102	- regulators
	103
	104	examples:
	105	- \|
	106	/* pmic properties */
	107
	108	pmic: pmic@0 {
	109	compatible = "hisilicon,hi6421-spmi";
	110	reg = <0 0>;
	111
	112	#interrupt-cells = <2>;
	113	interrupt-controller;
	114	gpios = <&gpio28 0 0>;
	115
	116	regulators {
	117	#address-cells = <1>;
	118	#size-cells = <0>;
	119
	120	ldo3: ldo3@16 {
	121	reg = <0x16>;
	122	vsel-reg = <0x51>;
	123
	124	regulator-name = "ldo3";
	125	regulator-min-microvolt = <1500000>;
	126	regulator-max-microvolt = <2000000>;
	127	regulator-boot-on;
	128
	129	enable-mask = <0x01>;
	130
	131	voltage-table = <1500000>, <1550000>, <1600000>, <1650000>,
	132	<1700000>, <1725000>, <1750000>, <1775000>,
	133	<1800000>, <1825000>, <1850000>, <1875000>,
	134	<1900000>, <1925000>, <1950000>, <2000000>;
	135	off-on-delay-us = <20000>;
	136	startup-delay-us = <120>;
	137	};
	138
	139	ldo4: ldo4@17 { /* 40 PIN */
	140	reg = <0x17>;
	141	vsel-reg = <0x52>;
	142
	143	regulator-name = "ldo4";
	144	regulator-min-microvolt = <1725000>;
	145	regulator-max-microvolt = <1900000>;
	146	regulator-boot-on;
	147
	148	enable-mask = <0x01>;
	149	idle-mode-mask = <0x10>;
	150	eco-microamp = <10000>;
	151
	152	hi6421-vsel = <0x52 0x07>;
	153	voltage-table = <1725000>, <1750000>, <1775000>, <1800000>,
	154	<1825000>, <1850000>, <1875000>, <1900000>;
	155	off-on-delay-us = <20000>;
	156	startup-delay-us = <120>;
	157	};
	158	};
	159	};

drivers/staging/hikey9xx/hisilicon,hisi-spmi-controller.yaml+62−0

@@ -0,0 +1,62 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: HiSilicon SPMI controller
	8
	9	maintainers:
	10	- Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	11
	12	description: \|
	13	The HiSilicon SPMI BUS controller is found on some Kirin-based designs.
	14	It is a MIPI System Power Management (SPMI) controller.
	15
	16	The PMIC part is provided by
	17	drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml.
	18
	19	properties:
	20	$nodename:
	21	pattern: "spmi@[0-9a-f]"
	22
	23	compatible:
	24	const: hisilicon,kirin970-spmi-controller
	25
	26	reg:
	27	maxItems: 1
	28
	29	spmi-channel:
	30	description: \|
	31	number of the Kirin 970 SPMI channel where the SPMI devices are connected.
	32
	33	required:
	34	- compatible
	35	- reg
	36	- spmi-channel
	37
	38	patternProperties:
	39	"^pmic@[0-9a-f]$":
	40	description: \|
	41	PMIC properties, which are specific to the used SPMI PMIC device(s).
	42	When used in combination with HiSilicon 6421v600, the properties
	43	are documented at
	44	drivers/staging/hikey9xx/hisilicon,hi6421-spmi-pmic.yaml.
	45
	46	examples:
	47	- \|
	48	bus {
	49	#address-cells = <2>;
	50	#size-cells = <2>;
	51
	52	spmi: spmi@fff24000 {
	53	compatible = "hisilicon,kirin970-spmi-controller";
	54	status = "ok";
	55	reg = <0x0 0xfff24000 0x0 0x1000>;
	56	spmi-channel = <2>;
	57
	58	pmic@0 {
	59	/* pmic properties */
	60	};
	61	};
	62	};

drivers/staging/hikey9xx/phy-hi3670-usb3.c+671−0

@@ -0,0 +1,671 @@
	1	// SPDX-License-Identifier: GPL-2.0-only
	2	/*
	3	* Phy provider for USB 3.1 controller on HiSilicon Kirin970 platform
	4	*
	5	* Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
	6	* http://www.huawei.com
	7	*
	8	* Authors: Yu Chen <chenyu56@huawei.com>
	9	*/
	10
	11	#include <linux/clk.h>
	12	#include <linux/kernel.h>
	13	#include <linux/mfd/syscon.h>
	14	#include <linux/module.h>
	15	#include <linux/phy/phy.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/regmap.h>
	18
	19	#define SCTRL_SCDEEPSLEEPED (0x0)
	20	#define USB_CLK_SELECTED BIT(20)
	21
	22	#define PERI_CRG_PEREN0 (0x00)
	23	#define PERI_CRG_PERDIS0 (0x04)
	24	#define PERI_CRG_PEREN4 (0x40)
	25	#define PERI_CRG_PERDIS4 (0x44)
	26	#define PERI_CRG_PERRSTEN4 (0x90)
	27	#define PERI_CRG_PERRSTDIS4 (0x94)
	28	#define PERI_CRG_ISODIS (0x148)
	29	#define PERI_CRG_PEREN6 (0x410)
	30	#define PERI_CRG_PERDIS6 (0x414)
	31
	32	#define USB_REFCLK_ISO_EN BIT(25)
	33
	34	#define GT_CLK_USB2PHY_REF BIT(19)
	35
	36	#define PCTRL_PERI_CTRL3 (0x10)
	37	#define PCTRL_PERI_CTRL3_MSK_START (16)
	38	#define USB_TCXO_EN BIT(1)
	39
	40	#define PCTRL_PERI_CTRL24 (0x64)
	41	#define SC_CLK_USB3PHY_3MUX1_SEL BIT(25)
	42
	43	#define USB3OTG_CTRL0 (0x00)
	44	#define USB3OTG_CTRL3 (0x0C)
	45	#define USB3OTG_CTRL4 (0x10)
	46	#define USB3OTG_CTRL5 (0x14)
	47	#define USB3OTG_CTRL7 (0x1C)
	48	#define USB_MISC_CFG50 (0x50)
	49	#define USB_MISC_CFG54 (0x54)
	50	#define USB_MISC_CFG58 (0x58)
	51	#define USB_MISC_CFG5C (0x5C)
	52	#define USB_MISC_CFGA0 (0xA0)
	53	#define TCA_CLK_RST (0x200)
	54	#define TCA_INTR_EN (0x204)
	55	#define TCA_INTR_STS (0x208)
	56	#define TCA_GCFG (0x210)
	57	#define TCA_TCPC (0x214)
	58	#define TCA_SYSMODE_CFG (0x218)
	59	#define TCA_VBUS_CTRL (0x240)
	60
	61	#define CTRL0_USB3_VBUSVLD BIT(7)
	62	#define CTRL0_USB3_VBUSVLD_SEL BIT(6)
	63
	64	#define CTRL3_USB2_VBUSVLDEXT0 BIT(6)
	65	#define CTRL3_USB2_VBUSVLDEXTSEL0 BIT(5)
	66
	67	#define CTRL5_USB2_SIDDQ BIT(0)
	68
	69	#define CTRL7_USB2_REFCLKSEL_MASK (3 << 3)
	70	#define CTRL7_USB2_REFCLKSEL_ABB (3 << 3)
	71	#define CTRL7_USB2_REFCLKSEL_PAD (2 << 3)
	72
	73	#define CFG50_USB3_PHY_TEST_POWERDOWN BIT(23)
	74
	75	#define CFG54_USB31PHY_CR_ADDR_MASK (0xFFFF)
	76	#define CFG54_USB31PHY_CR_ADDR_SHIFT (16)
	77	#define CFG54_USB3PHY_REF_USE_PAD BIT(12)
	78	#define CFG54_PHY0_PMA_PWR_STABLE BIT(11)
	79	#define CFG54_PHY0_PCS_PWR_STABLE BIT(9)
	80	#define CFG54_USB31PHY_CR_ACK BIT(7)
	81	#define CFG54_USB31PHY_CR_WR_EN BIT(5)
	82	#define CFG54_USB31PHY_CR_SEL BIT(4)
	83	#define CFG54_USB31PHY_CR_RD_EN BIT(3)
	84	#define CFG54_USB31PHY_CR_CLK BIT(2)
	85	#define CFG54_USB3_PHY0_ANA_PWR_EN BIT(1)
	86
	87	#define CFG58_USB31PHY_CR_DATA_MASK (0xFFFF)
	88	#define CFG58_USB31PHY_CR_DATA_RD_START (16)
	89
	90	#define CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN BIT(1)
	91
	92	#define CFGA0_VAUX_RESET BIT(9)
	93	#define CFGA0_USB31C_RESET BIT(8)
	94	#define CFGA0_USB2PHY_REFCLK_SELECT BIT(4)
	95	#define CFGA0_USB3PHY_RESET BIT(1)
	96	#define CFGA0_USB2PHY_POR BIT(0)
	97
	98	#define INTR_EN_XA_TIMEOUT_EVT_EN BIT(1)
	99	#define INTR_EN_XA_ACK_EVT_EN BIT(0)
	100
	101	#define CLK_RST_TCA_REF_CLK_EN BIT(1)
	102	#define CLK_RST_SUSPEND_CLK_EN BIT(0)
	103
	104	#define GCFG_ROLE_HSTDEV BIT(4)
	105	#define GCFG_OP_MODE (3 << 0)
	106	#define GCFG_OP_MODE_CTRL_SYNC_MODE BIT(0)
	107
	108	#define TCPC_VALID BIT(4)
	109	#define TCPC_LOW_POWER_EN BIT(3)
	110	#define TCPC_MUX_CONTROL_MASK (3 << 0)
	111	#define TCPC_MUX_CONTROL_USB31 BIT(0)
	112
	113	#define SYSMODE_CFG_TYPEC_DISABLE BIT(3)
	114
	115	#define VBUS_CTRL_POWERPRESENT_OVERRD (3 << 2)
	116	#define VBUS_CTRL_VBUSVALID_OVERRD (3 << 0)
	117
	118	#define KIRIN970_USB_DEFAULT_PHY_PARAM (0xFDFEE4)
	119	#define KIRIN970_USB_DEFAULT_PHY_VBOOST (0x5)
	120
	121	#define TX_VBOOST_LVL_REG (0xf)
	122	#define TX_VBOOST_LVL_START (6)
	123	#define TX_VBOOST_LVL_ENABLE BIT(9)
	124
	125	struct hi3670_priv {
	126	struct device *dev;
	127	struct regmap *peri_crg;
	128	struct regmap *pctrl;
	129	struct regmap *sctrl;
	130	struct regmap *usb31misc;
	131
	132	u32 eye_diagram_param;
	133	u32 tx_vboost_lvl;
	134
	135	u32 peri_crg_offset;
	136	u32 pctrl_offset;
	137	u32 usb31misc_offset;
	138	};
	139
	140	static int hi3670_phy_cr_clk(struct regmap *usb31misc)
	141	{
	142	int ret;
	143
	144	/* Clock up */
	145	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
	146	CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
	147	if (ret)
	148	return ret;
	149
	150	/* Clock down */
	151	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
	152	CFG54_USB31PHY_CR_CLK, 0);
	153
	154	return ret;
	155	}
	156
	157	static int hi3670_phy_cr_set_sel(struct regmap *usb31misc)
	158	{
	159	return regmap_update_bits(usb31misc, USB_MISC_CFG54,
	160	CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
	161	}
	162
	163	static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
	164	{
	165	int ret;
	166
	167	if (direction)
	168	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
	169	CFG54_USB31PHY_CR_WR_EN,
	170	CFG54_USB31PHY_CR_WR_EN);
	171	else
	172	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
	173	CFG54_USB31PHY_CR_RD_EN,
	174	CFG54_USB31PHY_CR_RD_EN);
	175
	176	if (ret)
	177	return ret;
	178
	179	ret = hi3670_phy_cr_clk(usb31misc);
	180	if (ret)
	181	return ret;
	182
	183	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
	184	CFG54_USB31PHY_CR_RD_EN \| CFG54_USB31PHY_CR_WR_EN, 0);
	185
	186	return ret;
	187	}
	188
	189	static int hi3670_phy_cr_wait_ack(struct regmap *usb31misc)
	190	{
	191	u32 reg;
	192	int retry = 100000;
	193	int ret;
	194
	195	while (retry-- > 0) {
	196	ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
	197	if (ret)
	198	return ret;
	199	if ((reg & CFG54_USB31PHY_CR_ACK) == CFG54_USB31PHY_CR_ACK)
	200	return 0;
	201
	202	ret = hi3670_phy_cr_clk(usb31misc);
	203	if (ret)
	204	return ret;
	205	}
	206
	207	return -ETIMEDOUT;
	208	}
	209
	210	static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
	211	{
	212	u32 reg;
	213	int ret;
	214
	215	ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
	216	if (ret)
	217	return ret;
	218
	219	reg &= ~(CFG54_USB31PHY_CR_ADDR_MASK << CFG54_USB31PHY_CR_ADDR_SHIFT);
	220	reg \|= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) << CFG54_USB31PHY_CR_ADDR_SHIFT);
	221	ret = regmap_write(usb31misc, USB_MISC_CFG54, reg);
	222
	223	return ret;
	224	}
	225
	226	static int hi3670_phy_cr_read(struct regmap usb31misc, u32 addr, u32 val)
	227	{
	228	int reg;
	229	int i;
	230	int ret;
	231
	232	for (i = 0; i < 100; i++) {
	233	ret = hi3670_phy_cr_clk(usb31misc);
	234	if (ret)
	235	return ret;
	236	}
	237
	238	ret = hi3670_phy_cr_set_sel(usb31misc);
	239	if (ret)
	240	return ret;
	241
	242	ret = hi3670_phy_cr_set_addr(usb31misc, addr);
	243	if (ret)
	244	return ret;
	245
	246	ret = hi3670_phy_cr_start(usb31misc, 0);
	247	if (ret)
	248	return ret;
	249
	250	ret = hi3670_phy_cr_wait_ack(usb31misc);
	251	if (ret)
	252	return ret;
	253
	254	ret = regmap_read(usb31misc, USB_MISC_CFG58, &reg);
	255	if (ret)
	256	return ret;
	257
	258	*val = (reg >> CFG58_USB31PHY_CR_DATA_RD_START) &
	259	CFG58_USB31PHY_CR_DATA_MASK;
	260
	261	return 0;
	262	}
	263
	264	static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
	265	{
	266	int i;
	267	int ret;
	268
	269	for (i = 0; i < 100; i++) {
	270	ret = hi3670_phy_cr_clk(usb31misc);
	271	if (ret)
	272	return ret;
	273	}
	274
	275	ret = hi3670_phy_cr_set_sel(usb31misc);
	276	if (ret)
	277	return ret;
	278
	279	ret = hi3670_phy_cr_set_addr(usb31misc, addr);
	280	if (ret)
	281	return ret;
	282
	283	ret = regmap_write(usb31misc, USB_MISC_CFG58,
	284	val & CFG58_USB31PHY_CR_DATA_MASK);
	285	if (ret)
	286	return ret;
	287
	288	ret = hi3670_phy_cr_start(usb31misc, 1);
	289	if (ret)
	290	return ret;
	291
	292	ret = hi3670_phy_cr_wait_ack(usb31misc);
	293
	294	return ret;
	295	}
	296
	297	static int hi3670_phy_set_params(struct hi3670_priv *priv)
	298	{
	299	u32 reg;
	300	int ret;
	301	int retry = 3;
	302
	303	ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4,
	304	priv->eye_diagram_param);
	305	if (ret) {
	306	dev_err(priv->dev, "set USB3OTG_CTRL4 failed\n");
	307	return ret;
	308	}
	309
	310	while (retry-- > 0) {
	311	ret = hi3670_phy_cr_read(priv->usb31misc,
	312	TX_VBOOST_LVL_REG, &reg);
	313	if (!ret)
	314	break;
	315
	316	if (ret != -ETIMEDOUT) {
	317	dev_err(priv->dev, "read TX_VBOOST_LVL_REG failed\n");
	318	return ret;
	319	}
	320	}
	321	if (ret)
	322	return ret;
	323
	324	reg \|= (TX_VBOOST_LVL_ENABLE \| (priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
	325	ret = hi3670_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
	326	if (ret)
	327	dev_err(priv->dev, "write TX_VBOOST_LVL_REG failed\n");
	328
	329	return ret;
	330	}
	331
	332	static int hi3670_is_abbclk_seleted(struct hi3670_priv *priv)
	333	{
	334	u32 reg;
	335
	336	if (!priv->sctrl) {
	337	dev_err(priv->dev, "priv->sctrl is null!\n");
	338	return 1;
	339	}
	340
	341	if (regmap_read(priv->sctrl, SCTRL_SCDEEPSLEEPED, &reg)) {
	342	dev_err(priv->dev, "SCTRL_SCDEEPSLEEPED read failed!\n");
	343	return 1;
	344	}
	345
	346	if ((reg & USB_CLK_SELECTED) == 0)
	347	return 1;
	348
	349	return 0;
	350	}
	351
	352	static int hi3670_config_phy_clock(struct hi3670_priv *priv)
	353	{
	354	u32 val, mask;
	355	int ret;
	356
	357	if (hi3670_is_abbclk_seleted(priv)) {
	358	/* usb refclk iso disable */
	359	ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS,
	360	USB_REFCLK_ISO_EN);
	361	if (ret)
	362	goto out;
	363
	364	/* enable usb_tcxo_en */
	365	ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
	366	USB_TCXO_EN \|
	367	(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
	368
	369	/* select usbphy clk from abb */
	370	mask = SC_CLK_USB3PHY_3MUX1_SEL;
	371	ret = regmap_update_bits(priv->pctrl,
	372	PCTRL_PERI_CTRL24, mask, 0);
	373	if (ret)
	374	goto out;
	375
	376	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
	377	CFGA0_USB2PHY_REFCLK_SELECT, 0);
	378	if (ret)
	379	goto out;
	380
	381	ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
	382	if (ret)
	383	goto out;
	384	val &= ~CTRL7_USB2_REFCLKSEL_MASK;
	385	val \|= CTRL7_USB2_REFCLKSEL_ABB;
	386	ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
	387	if (ret)
	388	goto out;
	389
	390	return 0;
	391	}
	392
	393	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
	394	CFG54_USB3PHY_REF_USE_PAD,
	395	CFG54_USB3PHY_REF_USE_PAD);
	396	if (ret)
	397	goto out;
	398
	399	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
	400	CFGA0_USB2PHY_REFCLK_SELECT,
	401	CFGA0_USB2PHY_REFCLK_SELECT);
	402	if (ret)
	403	goto out;
	404
	405	ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
	406	if (ret)
	407	goto out;
	408	val &= ~CTRL7_USB2_REFCLKSEL_MASK;
	409	val \|= CTRL7_USB2_REFCLKSEL_PAD;
	410	ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
	411	if (ret)
	412	goto out;
	413
	414	ret = regmap_write(priv->peri_crg,
	415	PERI_CRG_PEREN6, GT_CLK_USB2PHY_REF);
	416	if (ret)
	417	goto out;
	418
	419	return 0;
	420	out:
	421	dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);
	422	return ret;
	423	}
	424
	425	static int hi3670_config_tca(struct hi3670_priv *priv)
	426	{
	427	u32 val, mask;
	428	int ret;
	429
	430	ret = regmap_write(priv->usb31misc, TCA_INTR_STS, 0xffff);
	431	if (ret)
	432	goto out;
	433
	434	ret = regmap_write(priv->usb31misc, TCA_INTR_EN,
	435	INTR_EN_XA_TIMEOUT_EVT_EN \| INTR_EN_XA_ACK_EVT_EN);
	436	if (ret)
	437	goto out;
	438
	439	mask = CLK_RST_TCA_REF_CLK_EN \| CLK_RST_SUSPEND_CLK_EN;
	440	ret = regmap_update_bits(priv->usb31misc, TCA_CLK_RST, mask, 0);
	441	if (ret)
	442	goto out;
	443
	444	ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
	445	GCFG_ROLE_HSTDEV \| GCFG_OP_MODE,
	446	GCFG_ROLE_HSTDEV \| GCFG_OP_MODE_CTRL_SYNC_MODE);
	447	if (ret)
	448	goto out;
	449
	450	ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
	451	SYSMODE_CFG_TYPEC_DISABLE, 0);
	452	if (ret)
	453	goto out;
	454
	455	ret = regmap_read(priv->usb31misc, TCA_TCPC, &val);
	456	if (ret)
	457	goto out;
	458	val &= ~(TCPC_VALID \| TCPC_LOW_POWER_EN \| TCPC_MUX_CONTROL_MASK);
	459	val \|= (TCPC_VALID \| TCPC_MUX_CONTROL_USB31);
	460	ret = regmap_write(priv->usb31misc, TCA_TCPC, val);
	461	if (ret)
	462	goto out;
	463
	464	ret = regmap_write(priv->usb31misc, TCA_VBUS_CTRL,
	465	VBUS_CTRL_POWERPRESENT_OVERRD \| VBUS_CTRL_VBUSVALID_OVERRD);
	466	if (ret)
	467	goto out;
	468
	469	return 0;
	470	out:
	471	dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);
	472	return ret;
	473	}
	474
	475	static int hi3670_phy_init(struct phy *phy)
	476	{
	477	struct hi3670_priv *priv = phy_get_drvdata(phy);
	478	u32 val;
	479	int ret;
	480
	481	/* assert controller */
	482	val = CFGA0_VAUX_RESET \| CFGA0_USB31C_RESET \|
	483	CFGA0_USB3PHY_RESET \| CFGA0_USB2PHY_POR;
	484	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
	485	if (ret)
	486	goto out;
	487
	488	ret = hi3670_config_phy_clock(priv);
	489	if (ret)
	490	goto out;
	491
	492	/* Exit from IDDQ mode */
	493	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL5,
	494	CTRL5_USB2_SIDDQ, 0);
	495	if (ret)
	496	goto out;
	497
	498	/* Release USB31 PHY out of TestPowerDown mode */
	499	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG50,
	500	CFG50_USB3_PHY_TEST_POWERDOWN, 0);
	501	if (ret)
	502	goto out;
	503
	504	/* Deassert phy */
	505	val = CFGA0_USB3PHY_RESET \| CFGA0_USB2PHY_POR;
	506	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
	507	if (ret)
	508	goto out;
	509
	510	usleep_range(100, 120);
	511
	512	/* Tell the PHY power is stable */
	513	val = CFG54_USB3_PHY0_ANA_PWR_EN \| CFG54_PHY0_PCS_PWR_STABLE \|
	514	CFG54_PHY0_PMA_PWR_STABLE;
	515	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
	516	val, val);
	517	if (ret)
	518	goto out;
	519
	520	ret = hi3670_config_tca(priv);
	521	if (ret)
	522	goto out;
	523
	524	/* Enable SSC */
	525	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG5C,
	526	CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
	527	CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
	528	if (ret)
	529	goto out;
	530
	531	/* Deassert controller */
	532	val = CFGA0_VAUX_RESET \| CFGA0_USB31C_RESET;
	533	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
	534	if (ret)
	535	goto out;
	536
	537	usleep_range(100, 120);
	538
	539	/* Set fake vbus valid signal */
	540	val = CTRL0_USB3_VBUSVLD \| CTRL0_USB3_VBUSVLD_SEL;
	541	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL0, val, val);
	542	if (ret)
	543	goto out;
	544
	545	val = CTRL3_USB2_VBUSVLDEXT0 \| CTRL3_USB2_VBUSVLDEXTSEL0;
	546	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL3, val, val);
	547	if (ret)
	548	goto out;
	549
	550	usleep_range(100, 120);
	551
	552	ret = hi3670_phy_set_params(priv);
	553	if (ret)
	554	goto out;
	555
	556	return 0;
	557	out:
	558	dev_err(priv->dev, "failed to init phy ret: %d\n", ret);
	559	return ret;
	560	}
	561
	562	static int hi3670_phy_exit(struct phy *phy)
	563	{
	564	struct hi3670_priv *priv = phy_get_drvdata(phy);
	565	u32 mask;
	566	int ret;
	567
	568	/* Assert phy */
	569	mask = CFGA0_USB3PHY_RESET \| CFGA0_USB2PHY_POR;
	570	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, mask, 0);
	571	if (ret)
	572	goto out;
	573
	574	if (hi3670_is_abbclk_seleted(priv)) {
	575	/* disable usb_tcxo_en */
	576	ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
	577	USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
	578	} else {
	579	ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
	580	GT_CLK_USB2PHY_REF);
	581	if (ret)
	582	goto out;
	583	}
	584
	585	return 0;
	586	out:
	587	dev_err(priv->dev, "failed to exit phy ret: %d\n", ret);
	588	return ret;
	589	}
	590
	591	static struct phy_ops hi3670_phy_ops = {
	592	.init = hi3670_phy_init,
	593	.exit = hi3670_phy_exit,
	594	.owner = THIS_MODULE,
	595	};
	596
	597	static int hi3670_phy_probe(struct platform_device *pdev)
	598	{
	599	struct phy_provider *phy_provider;
	600	struct device *dev = &pdev->dev;
	601	struct phy *phy;
	602	struct hi3670_priv *priv;
	603
	604	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	605	if (!priv)
	606	return -ENOMEM;
	607
	608	priv->dev = dev;
	609	priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node,
	610	"hisilicon,pericrg-syscon");
	611	if (IS_ERR(priv->peri_crg)) {
	612	dev_err(dev, "no hisilicon,pericrg-syscon\n");
	613	return PTR_ERR(priv->peri_crg);
	614	}
	615
	616	priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
	617	"hisilicon,pctrl-syscon");
	618	if (IS_ERR(priv->pctrl)) {
	619	dev_err(dev, "no hisilicon,pctrl-syscon\n");
	620	return PTR_ERR(priv->pctrl);
	621	}
	622
	623	priv->sctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
	624	"hisilicon,sctrl-syscon");
	625	if (IS_ERR(priv->sctrl)) {
	626	dev_err(dev, "no hisilicon,sctrl-syscon\n");
	627	return PTR_ERR(priv->sctrl);
	628	}
	629
	630	/* node of hi3670 phy is a sub-node of usb3_otg_bc */
	631	priv->usb31misc = syscon_node_to_regmap(dev->parent->of_node);
	632	if (IS_ERR(priv->usb31misc)) {
	633	dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n");
	634	return PTR_ERR(priv->usb31misc);
	635	}
	636
	637	if (of_property_read_u32(dev->of_node, "hisilicon,eye-diagram-param",
	638	&priv->eye_diagram_param))
	639	priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_PARAM;
	640
	641	if (of_property_read_u32(dev->of_node, "hisilicon,tx-vboost-lvl",
	642	&priv->tx_vboost_lvl))
	643	priv->tx_vboost_lvl = KIRIN970_USB_DEFAULT_PHY_VBOOST;
	644
	645	phy = devm_phy_create(dev, NULL, &hi3670_phy_ops);
	646	if (IS_ERR(phy))
	647	return PTR_ERR(phy);
	648
	649	phy_set_drvdata(phy, priv);
	650	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
	651	return PTR_ERR_OR_ZERO(phy_provider);
	652	}
	653
	654	static const struct of_device_id hi3670_phy_of_match[] = {
	655	{ .compatible = "hisilicon,hi3670-usb-phy" },
	656	{ },
	657	};
	658	MODULE_DEVICE_TABLE(of, hi3670_phy_of_match);
	659
	660	static struct platform_driver hi3670_phy_driver = {
	661	.probe = hi3670_phy_probe,
	662	.driver = {
	663	.name = "hi3670-usb-phy",
	664	.of_match_table = hi3670_phy_of_match,
	665	}
	666	};
	667	module_platform_driver(hi3670_phy_driver);
	668
	669	MODULE_AUTHOR("Yu Chen <chenyu56@huawei.com>");
	670	MODULE_LICENSE("GPL v2");
	671	MODULE_DESCRIPTION("Hilisicon Kirin970 USB31 PHY Driver");

drivers/staging/hikey9xx/phy-hi3670-usb3.yaml+72−0

@@ -0,0 +1,72 @@
	1	# SPDX-License-Identifier: GPL-2.0
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Hisilicon Kirin970 USB PHY
	8
	9	maintainers:
	10	- Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
	11	description: \|+
	12	Bindings for USB3 PHY on HiSilicon Kirin 970.
	13
	14	properties:
	15	compatible:
	16	const: hisilicon,hi3670-usb-phy
	17
	18	"#phy-cells":
	19	const: 0
	20
	21	hisilicon,pericrg-syscon:
	22	$ref: '/schemas/types.yaml#/definitions/phandle'
	23	description: phandle of syscon used to control iso refclk.
	24
	25	hisilicon,pctrl-syscon:
	26	$ref: '/schemas/types.yaml#/definitions/phandle'
	27	description: phandle of syscon used to control usb tcxo.
	28
	29	hisilicon,sctrl-syscon:
	30	$ref: '/schemas/types.yaml#/definitions/phandle'
	31	description: phandle of syscon used to control phy deep sleep.
	32
	33	hisilicon,eye-diagram-param:
	34	$ref: /schemas/types.yaml#/definitions/uint32
	35	description: Eye diagram for phy.
	36
	37	hisilicon,tx-vboost-lvl:
	38	$ref: /schemas/types.yaml#/definitions/uint32
	39	description: TX level vboost for phy.
	40
	41	required:
	42	- compatible
	43	- hisilicon,pericrg-syscon
	44	- hisilicon,pctrl-syscon
	45	- hisilicon,sctrl-syscon
	46	- hisilicon,eye-diagram-param
	47	- hisilicon,tx-vboost-lvl
	48	- "#phy-cells"
	49
	50	additionalProperties: false
	51
	52	examples:
	53	- \|
	54	bus {
	55	#address-cells = <2>;
	56	#size-cells = <2>;
	57
	58	usb3_otg_bc: usb3_otg_bc@ff200000 {
	59	compatible = "syscon", "simple-mfd";
	60	reg = <0x0 0xff200000 0x0 0x1000>;
	61
	62	usb_phy {
	63	compatible = "hisilicon,hi3670-usb-phy";
	64	#phy-cells = <0>;
	65	hisilicon,pericrg-syscon = <&crg_ctrl>;
	66	hisilicon,pctrl-syscon = <&pctrl>;
	67	hisilicon,sctrl-syscon = <&sctrl>;
	68	hisilicon,eye-diagram-param = <0xfdfee4>;
	69	hisilicon,tx-vboost-lvl = <0x5>;
	70	};
	71	};
	72	};

drivers/staging/iio/Documentation/dac/max517+0−41

@@ -1,41 +0,0 @@
1	Kernel driver max517
2	====================
3
4	Supported chips:
5	* Maxim MAX517, MAX518, MAX519
6	Prefix: 'max517'
7	Datasheet: Publicly available at the Maxim website
8	http://www.maxim-ic.com/
9
10	Author:
11	Roland Stigge <stigge@antcom.de>
12
13	Description
14	-----------
15
16	The Maxim MAX517/518/519 is an 8-bit DAC on the I2C bus. The following table
17	shows the different feature sets of the variants MAX517, MAX518 and MAX519:
18
19	Feature MAX517 MAX518 MAX519
20	--------------------------------------------------------------------------
21	One output channel X
22	Two output channels X X
23	Simultaneous output updates X X
24	Supply voltage as reference X
25	Separate reference input X
26	Reference input for each DAC X
27
28	Via the iio sysfs interface, there are three attributes available: out1_raw,
29	out2_raw and out12_raw. With out1_raw and out2_raw, the current output values
30	(0..255) of the DACs can be written to the device. out12_raw can be used to set
31	both output channel values simultaneously.
32
33	With MAX517, only out1_raw is available.
34
35	Via out1_scale (and where appropriate, out2_scale), the current scaling factor
36	in mV can be read.
37
38	When the operating system goes to a power down state, the Power Down function
39	of the chip is activated, reducing the supply current to 4uA.
40
41	On power-up, the device is in 0V-output state.

drivers/staging/iio/Documentation/device.txt+0−74

@@ -1,74 +0,0 @@
1	IIO Device drivers
2
3	This is not intended to provide a comprehensive guide to writing an
4	IIO device driver. For further information see the drivers within the
5	subsystem.
6
7	The crucial structure for device drivers in iio is iio_dev.
8
9	First allocate one using:
10
11	struct iio_dev *indio_dev = iio_device_alloc(parent, sizeof(struct chip_state));
12	where chip_state is a structure of local state data for this instance of
13	the chip.
14
15	That data can be accessed using iio_priv(struct iio_dev *).
16
17	Then fill in the following:
18
19	- indio_dev->name
20	Name of the device being driven - made available as the name
21	attribute in sysfs.
22
23	- indio_dev->info
24	pointer to a structure with elements that tend to be fixed for
25	large sets of different parts supported by a given driver.
26	This contains:
27	* info->event_attrs:
28	Attributes used to enable / disable hardware events.
29	* info->attrs:
30	General device attributes. Typically used for the weird
31	and the wonderful bits not covered by the channel specification.
32	* info->read_raw:
33	Raw data reading function. Used for both raw channel access
34	and for associate parameters such as offsets and scales.
35	* info->write_raw:
36	Raw value writing function. Used for writable device values such
37	as DAC values and calibbias.
38	* info->read_event_config:
39	Typically only set if there are some interrupt lines. This
40	is used to read if an on sensor event detector is enabled.
41	* info->write_event_config:
42	Enable / disable an on sensor event detector.
43	* info->read_event_value:
44	Read value associated with on sensor event detectors. Note that
45	the meaning of the returned value is dependent on the event
46	type.
47	* info->write_event_value:
48	Write the value associated with on sensor event detectors. E.g.
49	a threshold above which an interrupt occurs. Note that the
50	meaning of the value to be set is event type dependent.
51
52	- indio_dev->modes:
53	Specify whether direct access and / or ring buffer access is supported.
54	- indio_dev->buffer:
55	An optional associated buffer.
56	- indio_dev->pollfunc:
57	Poll function related elements. This controls what occurs when a trigger
58	to which this device is attached sends an event.
59	- indio_dev->channels:
60	Specification of device channels. Most attributes etc. are built
61	from this spec.
62	- indio_dev->num_channels:
63	How many channels are there?
64
65	Once these are set up, a call to iio_device_register(indio_dev)
66	will register the device with the iio core.
67
68	Worth noting here is that, if a ring buffer is to be used, it can be
69	allocated prior to registering the device with the iio-core, but must
70	be registered afterwards (otherwise the whole parentage of devices
71	gets confused)
72
73	On remove, iio_device_unregister(indio_dev) will remove the device from
74	the core, and iio_device_free(indio_dev) will clean up.

drivers/staging/iio/Documentation/overview.txt+0−57

@@ -1,57 +0,0 @@
1	Overview of IIO
2
3	The Industrial I/O subsystem is intended to provide support for devices
4	that in some sense are analog to digital converters (ADCs). As many
5	actual devices combine some ADCs with digital to analog converters
6	(DACs) that functionality is also supported.
7
8	The aim is to fill the gap between the somewhat similar hwmon and
9	input subsystems. Hwmon is very much directed at low sample rate
10	sensors used in applications such as fan speed control and temperature
11	measurement. Input is, as its name suggests focused on input
12	devices. In some cases there is considerable overlap between these and
13	IIO.
14
15	A typical device falling into this category would be connected via SPI
16	or I2C.
17
18	Functionality of IIO
19
20	* Basic device registration and handling. This is very similar to
21	hwmon with simple polled access to device channels via sysfs.
22
23	* Event chrdevs. These are similar to input in that they provide a
24	route to user space for hardware triggered events. Such events include
25	threshold detectors, free-fall detectors and more complex action
26	detection. The events themselves are currently very simple with
27	merely an event code and a timestamp. Any data associated with the
28	event must be accessed via polling.
29
30	Note: A given device may have one or more event channel. These events are
31	turned on or off (if possible) via sysfs interfaces.
32
33	* Hardware buffer support. Some recent sensors have included
34	fifo / ring buffers on the sensor chip. These greatly reduce the load
35	on the host CPU by buffering relatively large numbers of data samples
36	based on an internal sampling clock. Examples include VTI SCA3000
37	series and Analog Devices ADXL345 accelerometers. Each buffer supports
38	polling to establish when data is available.
39
40	* Trigger and software buffer support. In many data analysis
41	applications it it useful to be able to capture data based on some
42	external signal (trigger). These triggers might be a data ready
43	signal, a gpio line connected to some external system or an on
44	processor periodic interrupt. A single trigger may initialize data
45	capture or reading from a number of sensors. These triggers are
46	used in IIO to fill software buffers acting in a very similar
47	fashion to the hardware buffers described above.
48
49	Other documentation:
50
51	device.txt - elements of a typical device driver.
52
53	trigger.txt - elements of a typical trigger driver.
54
55	ring.txt - additional elements required for buffer support.
56
57	sysfs-bus-iio - abi documentation file.

drivers/staging/iio/Documentation/ring.txt+0−47

@@ -1,47 +0,0 @@
1	Buffer support within IIO
2
3	This document is intended as a general overview of the functionality
4	a buffer may supply and how it is specified within IIO. For more
5	specific information on a given buffer implementation, see the
6	comments in the source code. Note that some drivers allow buffer
7	implementation to be selected at compile time via Kconfig options.
8
9	A given buffer implementation typically embeds a struct
10	iio_ring_buffer and it is a pointer to this that is provided to the
11	IIO core. Access to the embedding structure is typically done via
12	container_of functions.
13
14	struct iio_ring_buffer contains a struct iio_ring_setup_ops *setup_ops
15	which in turn contains the 4 function pointers
16	(preenable, postenable, predisable and postdisable).
17	These are used to perform device specific steps on either side
18	of the core changing its current mode to indicate that the buffer
19	is enabled or disabled (along with enabling triggering etc. as appropriate).
20
21	Also in struct iio_ring_buffer is a struct iio_ring_access_funcs.
22	The function pointers within here are used to allow the core to handle
23	as much buffer functionality as possible. Note almost all of these
24	are optional.
25
26	store_to
27	If possible, push data to the buffer.
28
29	read_last
30	If possible, get the most recent scan from the buffer (without removal).
31	This provides polling like functionality whilst the ring buffering is in
32	use without a separate read from the device.
33
34	rip_first_n
35	The primary buffer reading function. Note that it may well not return
36	as much data as requested.
37
38	request_update
39	If parameters have changed that require reinitialization or configuration of
40	the buffer this will trigger it.
41
42	set_bytes_per_datum
43	Set the number of bytes for a complete scan. (All samples + timestamp)
44
45	set_length
46	Set the number of complete scans that may be held by the buffer.
47

drivers/staging/iio/Documentation/sysfs-bus-iio-light+0−79

@@ -1,79 +0,0 @@
1	What: /sys/bus/iio/devices/device[n]/in_illuminance0[_input\|_raw]
2	KernelVersion: 2.6.35
3	Contact: linux-iio@vger.kernel.org
4	Description:
5	This should return the calculated lux from the light sensor. If
6	it comes back in SI units, it should also include _input else it
7	should include _raw to signify it is not in SI units.
8
9	What: /sys/.../device[n]/proximity_on_chip_ambient_infrared_suppression
10	KernelVersion: 2.6.37
11	Contact: linux-iio@vger.kernel.org
12	Description:
13	Hardware dependent mode for an ALS device to calculate the value
14	in proximity mode. When this is enabled, then the device should
15	use a infrared sensor reading to remove infrared noise from the
16	proximity reading. If this is not enabled, the driver can still
17	do this calculation manually by reading the infrared sensor
18	value and doing the negation in sw.
19
20	What: /sys/bus/iio/devices/device[n]/in_proximity[_input\|_raw]
21	KernelVersion: 2.6.37
22	Contact: linux-iio@vger.kernel.org
23	Description:
24	This property is supported by proximity sensors and should be
25	used to return the value of a reading by the sensor. If this
26	value is returned in SI units, it should also include _input
27	but if it is not, then it should include _raw.
28
29	What: /sys/bus/iio/devices/device[n]/intensity_infrared[_input\|_raw]
30	KernelVersion: 2.6.37
31	Contact: linux-iio@vger.kernel.org
32	Description:
33	This property is supported by sensors that have an infrared
34	sensing mode. This value should be the output from a reading
35	and if expressed in SI units, should include _input. If this
36	value is not in SI units, then it should include _raw.
37
38	What: /sys/bus/iio/devices/device[n]/in_illuminance0_target
39	KernelVersion: 2.6.37
40	Contact: linux-iio@vger.kernel.org
41	Description:
42	This property gets/sets the last known external
43	lux measurement used in/for calibration.
44
45	What: /sys/bus/iio/devices/device[n]/in_illuminance0_integration_time
46	KernelVersion: 2.6.37
47	Contact: linux-iio@vger.kernel.org
48	Description:
49	This property gets/sets the sensors ADC analog integration time.
50
51	What: /sys/bus/iio/devices/device[n]/in_illuminance0_lux_table
52	KernelVersion: 2.6.37
53	Contact: linux-iio@vger.kernel.org
54	Description:
55	This property gets/sets the table of coefficients
56	used in calculating illuminance in lux.
57
58	What: /sys/bus/iio/devices/device[n]/in_intensity_clear[_input\|_raw]
59	What: /sys/bus/iio/devices/device[n]/in_intensity_red[_input\|_raw]
60	What: /sys/bus/iio/devices/device[n]/in_intensity_green[_input\|_raw]
61	What: /sys/bus/iio/devices/device[n]/in_intensity_blue[_input\|_raw]
62	KernelVersion: 3.6.0
63	Contact: linux-iio@vger.kernel.org
64	Description:
65	This property is supported by sensors that have a RGBC
66	sensing mode. This value should be the output from a reading
67	and if expressed in SI units, should include _input. If this
68	value is not in SI units (irradiance, uW/mm^2), then it should
69	include _raw.
70
71	What: /sys/bus/iio/devices/device[n]/in_cct0[_input\|_raw]
72	KernelVersion: 3.6.0
73	Contact: linux-iio@vger.kernel.org
74	Description:
75	This should return the correlated color temperature from the
76	light sensor. If it comes back in SI units, it should also
77	include _input else it should include _raw to signify it is not
78	in SI units.
79

drivers/staging/iio/Documentation/trigger.txt+0−31

@@ -1,31 +0,0 @@
1	IIO trigger drivers.
2
3	Many triggers are provided by hardware that will also be registered as
4	an IIO device. Whilst this can create device specific complexities
5	such triggers are registered with the core in the same way as
6	stand-alone triggers.
7
8	struct iio_trig *trig = iio_trigger_alloc("<trigger format string>", ...);
9
10	allocates a trigger structure. The key elements to then fill in within
11	a driver are:
12
13	trig->set_trigger_state:
14	Function that enables / disables the underlying source of the trigger.
15
16	There is also a
17	trig->alloc_list which is useful for drivers that allocate multiple
18	triggers to keep track of what they have created.
19
20	When these have been set call:
21
22	iio_trigger_register(trig);
23
24	to register the trigger with the core, making it available to trigger
25	consumers.
26
27	Trigger Consumers
28
29	Currently triggers are only used for the filling of software
30	buffers and as such any device supporting INDIO_BUFFER_TRIGGERED has the
31	consumer interface automatically created.

drivers/staging/iio/accel/adis16203.c+3−23

 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
 	if (ret)
 		return ret;
 	/* Get the device into a sane initial state */
 	ret = adis_initial_startup(st);
 	if (ret)
-		goto error_cleanup_buffer_trigger;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_cleanup_buffer_trigger;
-	return 0;
-error_cleanup_buffer_trigger:
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return ret;
-}
-static int adis16203_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 static const struct of_device_id adis16203_of_match[] = {
 		.of_match_table = adis16203_of_match,
 	},
 	.probe = adis16203_probe,
-	.remove = adis16203_remove,
 };
 module_spi_driver(adis16203_driver);

drivers/staging/iio/accel/adis16240.c+3−22

 	ret = adis_init(st, indio_dev, spi, &adis16240_data);
 	if (ret)
 		return ret;
-	ret = adis_setup_buffer_and_trigger(st, indio_dev, NULL);
+	ret = devm_adis_setup_buffer_and_trigger(st, indio_dev, NULL);
 	if (ret)
 		return ret;
 	/* Get the device into a sane initial state */
 	ret = adis_initial_startup(st);
 	if (ret)
-		goto error_cleanup_buffer_trigger;
+		return ret;
-	ret = iio_device_register(indio_dev);
-	if (ret)
-		goto error_cleanup_buffer_trigger;
-	return 0;
-error_cleanup_buffer_trigger:
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return ret;
-}
-static int adis16240_remove(struct spi_device *spi)
-{
-	struct iio_dev *indio_dev = spi_get_drvdata(spi);
-	struct adis *st = iio_priv(indio_dev);
-	iio_device_unregister(indio_dev);
-	adis_cleanup_buffer_and_trigger(st, indio_dev);
-	return 0;
+	return devm_iio_device_register(&spi->dev, indio_dev);
 }
 static const struct of_device_id adis16240_of_match[] = {
 	{ .compatible = "adi,adis16240" },
 	{ },
 		.of_match_table = adis16240_of_match,
 	},
 	.probe = adis16240_probe,
-	.remove = adis16240_remove,
 };
 module_spi_driver(adis16240_driver);

drivers/staging/iio/frequency/ad9834.c+0−1

@@ -397,7 +397,6 @@ static int ad9834_probe(struct spi_device *spi) · 396 unmodified lines
397	struct regulator *reg;	397	struct regulator *reg;
398	int ret;	398	int ret;
399		399
400
401	reg = devm_regulator_get(&spi->dev, "avdd");	400	reg = devm_regulator_get(&spi->dev, "avdd");
402	if (IS_ERR(reg))	401	if (IS_ERR(reg))
403	return PTR_ERR(reg);	402	return PTR_ERR(reg);

drivers/staging/kpc2000/kpc_dma/fileops.c+2−2

@@ -53,7 +53,7 @@ static int kpc_dma_transfer(struct dev_private_data *priv, · 52 unmodified lines
53		53
54	acd = kzalloc(sizeof(*acd), GFP_KERNEL);	54	acd = kzalloc(sizeof(*acd), GFP_KERNEL);
55	if (!acd) {	55	if (!acd) {
56	dev_err(&priv->ldev->pldev->dev, "Couldn't kmalloc space for for the aio data\n");	56	dev_err(&priv->ldev->pldev->dev, "Couldn't kmalloc space for the aio data\n");
57	return -ENOMEM;	57	return -ENOMEM;
58	}	58	}
59	memset(acd, 0x66, sizeof(struct aio_cb_data));	59	memset(acd, 0x66, sizeof(struct aio_cb_data));
@@ -69,7 +69,7 @@ static int kpc_dma_transfer(struct dev_private_data *priv, · 9 unmodified lines
69	acd->user_pages = kcalloc(acd->page_count, sizeof(struct page *),	69	acd->user_pages = kcalloc(acd->page_count, sizeof(struct page *),
70	GFP_KERNEL);	70	GFP_KERNEL);
71	if (!acd->user_pages) {	71	if (!acd->user_pages) {
72	dev_err(&priv->ldev->pldev->dev, "Couldn't kmalloc space for for the page pointers\n");	72	dev_err(&priv->ldev->pldev->dev, "Couldn't kmalloc space for the page pointers\n");
73	rv = -ENOMEM;	73	rv = -ENOMEM;
74	goto err_alloc_userpages;	74	goto err_alloc_userpages;
75	}	75	}

drivers/staging/ks7010/ks7010_sdio.c+3−3

@@ -405,9 +405,9 @@ int ks_wlan_hw_tx(struct ks_wlan_private priv, void p, unsigned long size, · 404 unmodified lines
405	return result;	405	return result;
406	}	406	}
407		407
408	static void rx_event_task(unsigned long dev)	408	static void rx_event_task(struct tasklet_struct *t)
409	{	409	{
410	struct ks_wlan_private priv = (struct ks_wlan_private )dev;	410	struct ks_wlan_private *priv = from_tasklet(priv, t, rx_bh_task);
411	struct rx_device_buffer *rp;	411	struct rx_device_buffer *rp;
412		412
413	if (rxq_has_space(priv) && priv->dev_state >= DEVICE_STATE_BOOT) {	413	if (rxq_has_space(priv) && priv->dev_state >= DEVICE_STATE_BOOT) {
@@ -618,7 +618,7 @@ static int trx_device_init(struct ks_wlan_private *priv) · 204 unmodified lines
618	spin_lock_init(&priv->tx_dev.tx_dev_lock);	618	spin_lock_init(&priv->tx_dev.tx_dev_lock);
619	spin_lock_init(&priv->rx_dev.rx_dev_lock);	619	spin_lock_init(&priv->rx_dev.rx_dev_lock);
620		620
621	tasklet_init(&priv->rx_bh_task, rx_event_task, (unsigned long)priv);	621	tasklet_setup(&priv->rx_bh_task, rx_event_task);
622		622
623	return 0;	623	return 0;
624	}	624	}

drivers/staging/ks7010/ks_hostif.c+3−3

@@ -2205,9 +2205,9 @@ static void hostif_sme_execute(struct ks_wlan_private *priv, int event) · 2204 unmodified lines
2205	}	2205	}
2206		2206
2207	static	2207	static
2208	void hostif_sme_task(unsigned long dev)	2208	void hostif_sme_task(struct tasklet_struct *t)
2209	{	2209	{
2210	struct ks_wlan_private priv = (struct ks_wlan_private )dev;	2210	struct ks_wlan_private *priv = from_tasklet(priv, t, sme_task);
2211		2211
2212	if (priv->dev_state < DEVICE_STATE_BOOT)	2212	if (priv->dev_state < DEVICE_STATE_BOOT)
2213	return;	2213	return;
@@ -2258,7 +2258,7 @@ static inline void hostif_sme_init(struct ks_wlan_private *priv) · 44 unmodified lines
2258	priv->sme_i.qtail = 0;	2258	priv->sme_i.qtail = 0;
2259	spin_lock_init(&priv->sme_i.sme_spin);	2259	spin_lock_init(&priv->sme_i.sme_spin);
2260	priv->sme_i.sme_flag = 0;	2260	priv->sme_i.sme_flag = 0;
2261	tasklet_init(&priv->sme_task, hostif_sme_task, (unsigned long)priv);	2261	tasklet_setup(&priv->sme_task, hostif_sme_task);
2262	}	2262	}
2263		2263
2264	static inline void hostif_wpa_init(struct ks_wlan_private *priv)	2264	static inline void hostif_wpa_init(struct ks_wlan_private *priv)

drivers/staging/media/atomisp/i2c/atomisp-lm3554.c+28−40

 #include <linux/i2c.h>
 #include <linux/mutex.h>
 #include <linux/delay.h>
-#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
 #include <linux/slab.h>
 #include "../include/media/lm3554.h"
 #include <media/v4l2-ctrls.h>
 #include <media/v4l2-device.h>
 #include <linux/acpi.h>
-#include <linux/gpio/consumer.h>
 #include "../include/linux/atomisp_gmin_platform.h"
 #include "../include/linux/atomisp.h"
 	struct lm3554 *flash = from_timer(flash, t, flash_off_delay);
 	struct lm3554_platform_data *pdata = flash->pdata;
-	gpio_set_value(pdata->gpio_strobe, 0);
+	gpiod_set_value(pdata->gpio_strobe, 0);
 }
 static int lm3554_hw_strobe(struct i2c_client *client, bool strobe)
 	 * so must strobe off here
 	 */
 	if (timer_pending)
-		gpio_set_value(pdata->gpio_strobe, 0);
+		gpiod_set_value(pdata->gpio_strobe, 0);
 	/* Restore flash current settings */
 	ret = lm3554_set_flash(flash);
 		goto err;
 	/* Strobe on Flash */
-	gpio_set_value(pdata->gpio_strobe, 1);
+	gpiod_set_value(pdata->gpio_strobe, 1);
 	return 0;
 err:
 	int ret;
 	/*initialize flash driver*/
-	gpio_set_value(pdata->gpio_reset, power);
+	gpiod_set_value(pdata->gpio_reset, power);
 	usleep_range(100, 100 + 1);
 	if (power) {
 	struct lm3554_platform_data *pdata = flash->pdata;
 	int ret;
-	if (!gpio_is_valid(pdata->gpio_reset))
+	if (!pdata->gpio_reset)
 		return -EINVAL;
-	ret = gpio_direction_output(pdata->gpio_reset, 0);
+	ret = gpiod_direction_output(pdata->gpio_reset, 0);
 	if (ret < 0)
-		goto err_gpio_reset;
+		return ret;
 	dev_info(&client->dev, "flash led reset successfully\n");
-	if (!gpio_is_valid(pdata->gpio_strobe)) {
+	if (!pdata->gpio_strobe)
-		ret = -EINVAL;
+		return -EINVAL;
-		goto err_gpio_dir_reset;
-	}
-	ret = gpio_direction_output(pdata->gpio_strobe, 0);
+	ret = gpiod_direction_output(pdata->gpio_strobe, 0);
 	if (ret < 0)
-		goto err_gpio_strobe;
+		return ret;
 	return 0;
-err_gpio_strobe:
-	gpio_free(pdata->gpio_strobe);
-err_gpio_dir_reset:
-	gpio_direction_output(pdata->gpio_reset, 0);
-err_gpio_reset:
-	gpio_free(pdata->gpio_reset);
-	return ret;
 }
 static int lm3554_gpio_uninit(struct i2c_client *client)
 	struct lm3554_platform_data *pdata = flash->pdata;
 	int ret;
-	ret = gpio_direction_output(pdata->gpio_strobe, 0);
+	ret = gpiod_direction_output(pdata->gpio_strobe, 0);
 	if (ret < 0)
 		return ret;
-	ret = gpio_direction_output(pdata->gpio_reset, 0);
+	ret = gpiod_direction_output(pdata->gpio_reset, 0);
 	if (ret < 0)
 		return ret;
-	gpio_free(pdata->gpio_strobe);
-	gpio_free(pdata->gpio_reset);
 	return 0;
 }
 {
 	static struct lm3554_platform_data platform_data;
-	platform_data.gpio_reset =
+	platform_data.gpio_reset = gpiod_get_index(&client->dev,
-	    desc_to_gpio(gpiod_get_index(&client->dev,
+						   NULL, 2, GPIOD_OUT_LOW);
-					 NULL, 2, GPIOD_OUT_LOW));
+	if (IS_ERR(platform_data.gpio_reset))
-	platform_data.gpio_strobe =
+		return ERR_CAST(platform_data.gpio_reset);
-	    desc_to_gpio(gpiod_get_index(&client->dev,
+	platform_data.gpio_strobe = gpiod_get_index(&client->dev,
-					 NULL, 0, GPIOD_OUT_LOW));
+						    NULL, 0, GPIOD_OUT_LOW);
-	platform_data.gpio_torch =
+	if (IS_ERR(platform_data.gpio_strobe))
-	    desc_to_gpio(gpiod_get_index(&client->dev,
+		return ERR_CAST(platform_data.gpio_strobe);
-					 NULL, 1, GPIOD_OUT_LOW));
+	platform_data.gpio_torch = gpiod_get_index(&client->dev,
-	dev_info(&client->dev, "camera pdata: lm3554: reset: %d strobe %d torch %d\n",
+						   NULL, 1, GPIOD_OUT_LOW);
-		 platform_data.gpio_reset, platform_data.gpio_strobe,
+	if (IS_ERR(platform_data.gpio_torch))
-		 platform_data.gpio_torch);
+		return ERR_CAST(platform_data.gpio_torch);
 	/* Set to TX2 mode, then ENVM/TX2 pin is a power amplifier sync input:
 	 * ENVM/TX pin asserted, flash forced into torch;
 		return -ENOMEM;
 	flash->pdata = lm3554_platform_data_func(client);
+	if (IS_ERR(flash->pdata))
+		return PTR_ERR(flash->pdata);
 	v4l2_i2c_subdev_init(&flash->sd, client, &lm3554_ops);
 	flash->sd.internal_ops = &lm3554_internal_ops;

drivers/staging/media/atomisp/include/media/lm3554.h+4−3

 #ifndef _LM3554_H_
 #define _LM3554_H_
+#include <linux/gpio/consumer.h>
 #include <linux/videodev2.h>
 #include <media/v4l2-subdev.h>
  * lm3554_platform_data - Flash controller platform data
  */
 struct lm3554_platform_data {
-	int gpio_torch;
+	struct gpio_desc *gpio_torch;
-	int gpio_strobe;
+	struct gpio_desc *gpio_strobe;
-	int gpio_reset;
+	struct gpio_desc *gpio_reset;
 	unsigned int current_limit;
 	unsigned int envm_tx2;

drivers/staging/media/tegra-vde/iommu.c+2−2

@@ -36,8 +36,8 @@ int tegra_vde_iommu_map(struct tegra_vde *vde, · 35 unmodified lines
36		36
37	addr = iova_dma_addr(&vde->iova, iova);	37	addr = iova_dma_addr(&vde->iova, iova);
38		38
39	size = iommu_map_sg(vde->domain, addr, sgt->sgl, sgt->nents,	39	size = iommu_map_sgtable(vde->domain, addr, sgt,
40	IOMMU_READ \| IOMMU_WRITE);	40	IOMMU_READ \| IOMMU_WRITE);
41	if (!size) {	41	if (!size) {
42	__free_iova(&vde->iova, iova);	42	__free_iova(&vde->iova, iova);
43	return -ENXIO;	43	return -ENXIO;

drivers/staging/most/Kconfig+0−2

@@ -18,8 +18,6 @@ menuconfig MOST_COMPONENTS · 17 unmodified lines
18		18
19	if MOST_COMPONENTS	19	if MOST_COMPONENTS
20		20
21	source "drivers/staging/most/cdev/Kconfig"
22
23	source "drivers/staging/most/net/Kconfig"	21	source "drivers/staging/most/net/Kconfig"
24		22
25	source "drivers/staging/most/sound/Kconfig"	23	source "drivers/staging/most/sound/Kconfig"

drivers/staging/most/Makefile+0−1

@@ -1,6 +1,5 @@
1	# SPDX-License-Identifier: GPL-2.0	1	# SPDX-License-Identifier: GPL-2.0
2		2
3	obj-$(CONFIG_MOST_CDEV) += cdev/
4	obj-$(CONFIG_MOST_NET) += net/	3	obj-$(CONFIG_MOST_NET) += net/
5	obj-$(CONFIG_MOST_SOUND) += sound/	4	obj-$(CONFIG_MOST_SOUND) += sound/
6	obj-$(CONFIG_MOST_VIDEO) += video/	5	obj-$(CONFIG_MOST_VIDEO) += video/

drivers/staging/most/cdev/Kconfig+0−13

@@ -1,13 +0,0 @@
1	# SPDX-License-Identifier: GPL-2.0
2	#
3	# MOST Cdev configuration
4	#
5
6	config MOST_CDEV
7	tristate "Cdev"
8
9	help
10	Say Y here if you want to commumicate via character devices.
11
12	To compile this driver as a module, choose M here: the
13	module will be called most_cdev.

drivers/staging/most/cdev/Makefile+0−4

@@ -1,4 +0,0 @@
1	# SPDX-License-Identifier: GPL-2.0
2	obj-$(CONFIG_MOST_CDEV) += most_cdev.o
3
4	most_cdev-objs := cdev.o

drivers/staging/most/dim2/dim2.c+3−3

@@ -100,12 +100,12 @@ struct dim2_hdm { · 99 unmodified lines
100	struct medialb_bus bus;	100	struct medialb_bus bus;
101	void (on_netinfo)(struct most_interface most_iface,	101	void (on_netinfo)(struct most_interface most_iface,
102	unsigned char link_state, unsigned char *addrs);	102	unsigned char link_state, unsigned char *addrs);
103	void (disable_platform)(struct platform_device );	103	void (disable_platform)(struct platform_device pdev);
104	};	104	};
105		105
106	struct dim2_platform_data {	106	struct dim2_platform_data {
107	int (enable)(struct platform_device );	107	int (enable)(struct platform_device pdev);
108	void (disable)(struct platform_device );	108	void (disable)(struct platform_device pdev);
109	};	109	};
110		110
111	#define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)	111	#define iface_to_hdm(iface) container_of(iface, struct dim2_hdm, most_iface)

drivers/staging/mt7621-dma/mtk-hsdma.c+3−3

@@ -533,9 +533,9 @@ static void mtk_hsdma_rx(struct mtk_hsdam_engine *hsdma) · 532 unmodified lines
533	mtk_hsdma_chan_done(hsdma, chan);	533	mtk_hsdma_chan_done(hsdma, chan);
534	}	534	}
535		535
536	static void mtk_hsdma_tasklet(unsigned long arg)	536	static void mtk_hsdma_tasklet(struct tasklet_struct *t)
537	{	537	{
538	struct mtk_hsdam_engine hsdma = (struct mtk_hsdam_engine )arg;	538	struct mtk_hsdam_engine *hsdma = from_tasklet(hsdma, t, task);
539		539
540	mtk_hsdma_rx(hsdma);	540	mtk_hsdma_rx(hsdma);
541	mtk_hsdma_tx(hsdma);	541	mtk_hsdma_tx(hsdma);
@@ -670,7 +670,7 @@ static int mtk_hsdma_probe(struct platform_device *pdev) · 128 unmodified lines
670	if (IS_ERR(base))	670	if (IS_ERR(base))
671	return PTR_ERR(base);	671	return PTR_ERR(base);
672	hsdma->base = base + HSDMA_BASE_OFFSET;	672	hsdma->base = base + HSDMA_BASE_OFFSET;
673	tasklet_init(&hsdma->task, mtk_hsdma_tasklet, (unsigned long)hsdma);	673	tasklet_setup(&hsdma->task, mtk_hsdma_tasklet);
674		674
675	irq = platform_get_irq(pdev, 0);	675	irq = platform_get_irq(pdev, 0);
676	if (irq < 0)	676	if (irq < 0)

drivers/staging/mt7621-pci/TODO+1−1

@@ -1,4 +1,4 @@
1		1
2	- general code review and cleanup	2	- general code review and cleanup
3		3
4	Cc: NeilBrown <neil@brown.name>	4	Cc: NeilBrown <neil@brown.name>

drivers/staging/nvec/nvec.c+1−1

@@ -289,7 +289,7 @@ EXPORT_SYMBOL(nvec_write_async); · 288 unmodified lines
289	* interrupt handlers.	289	* interrupt handlers.
290	*	290	*
291	* Returns: 0 on success, a negative error code on failure.	291	* Returns: 0 on success, a negative error code on failure.
292	* The response message is returned in @msg. Shall be freed with	292	* The response message is returned in @msg. Shall be freed
293	* with nvec_msg_free() once no longer used.	293	* with nvec_msg_free() once no longer used.
294	*	294	*
295	*/	295	*/

drivers/staging/octeon-usb/octeon-hcd.c+1−2

 			cvmx_write64_uint32(csr_address, *ptr++);
 			cvmx_write64_uint32(csr_address, *ptr++);
 			cvmx_write64_uint32(csr_address, *ptr++);
-			cvmx_read64_uint64(
+			cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index));
-					CVMX_USBNX_DMA0_INB_CHN0(usb->index));
 			words -= 3;
 		}
 		cvmx_write64_uint32(csr_address, *ptr++);

drivers/staging/pi433/pi433_if.h+18−8

@@ -117,9 +117,15 @@ struct pi433_rx_cfg { · 116 unmodified lines
117		117
118	/* packet format */	118	/* packet format */
119	enum option_on_off enable_sync;	119	enum option_on_off enable_sync;
120	enum option_on_off enable_length_byte; /* should be used in combination with sync, only */	120
121	enum address_filtering enable_address_filtering; /* operational with sync, only */	121	/* should be used in combination with sync, only */
122	enum option_on_off enable_crc; /* only operational, if sync on and fixed length or length byte is used */	122	enum option_on_off enable_length_byte;
		123
		124	/* operational with sync, only */
		125	enum address_filtering enable_address_filtering;
		126
		127	/* only operational, if sync on and fixed length or length byte is used */
		128	enum option_on_off enable_crc;
123		129
124	__u8 sync_length;	130	__u8 sync_length;
125	__u8 fixed_message_length;	131	__u8 fixed_message_length;
@@ -130,12 +136,16 @@ struct pi433_rx_cfg { · 4 unmodified lines
130	__u8 broadcast_address;	136	__u8 broadcast_address;
131	};	137	};
132		138
133	#define PI433_IOC_MAGIC 'r'	139	#define PI433_IOC_MAGIC 'r'
134		140
135	#define PI433_IOC_RD_TX_CFG _IOR(PI433_IOC_MAGIC, PI433_TX_CFG_IOCTL_NR, char[sizeof(struct pi433_tx_cfg)])	141	#define PI433_IOC_RD_TX_CFG \
136	#define PI433_IOC_WR_TX_CFG _IOW(PI433_IOC_MAGIC, PI433_TX_CFG_IOCTL_NR, char[sizeof(struct pi433_tx_cfg)])	142	_IOR(PI433_IOC_MAGIC, PI433_TX_CFG_IOCTL_NR, char[sizeof(struct pi433_tx_cfg)])
		143	#define PI433_IOC_WR_TX_CFG \
		144	_IOW(PI433_IOC_MAGIC, PI433_TX_CFG_IOCTL_NR, char[sizeof(struct pi433_tx_cfg)])
137		145
138	#define PI433_IOC_RD_RX_CFG _IOR(PI433_IOC_MAGIC, PI433_RX_CFG_IOCTL_NR, char[sizeof(struct pi433_rx_cfg)])	146	#define PI433_IOC_RD_RX_CFG \
139	#define PI433_IOC_WR_RX_CFG _IOW(PI433_IOC_MAGIC, PI433_RX_CFG_IOCTL_NR, char[sizeof(struct pi433_rx_cfg)])	147	_IOR(PI433_IOC_MAGIC, PI433_RX_CFG_IOCTL_NR, char[sizeof(struct pi433_rx_cfg)])
		148	#define PI433_IOC_WR_RX_CFG \
		149	_IOW(PI433_IOC_MAGIC, PI433_RX_CFG_IOCTL_NR, char[sizeof(struct pi433_rx_cfg)])
140		150
141	#endif /* PI433_H */	151	#endif /* PI433_H */

drivers/staging/qlge/qlge.h+10−10

@@ -2337,21 +2337,21 @@ void ql_dump_hw_cb(struct ql_adapter *qdev, int size, u32 bit, u16 q_id); · 2336 unmodified lines
2337	#endif	2337	#endif
2338		2338
2339	#ifdef QL_OB_DUMP	2339	#ifdef QL_OB_DUMP
2340	void ql_dump_tx_desc(struct tx_buf_desc *tbd);	2340	void ql_dump_tx_desc(struct ql_adapter qdev, struct tx_buf_desc tbd);
2341	void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb);	2341	void ql_dump_ob_mac_iocb(struct ql_adapter qdev, struct ob_mac_iocb_req ob_mac_iocb);
2342	void ql_dump_ob_mac_rsp(struct ob_mac_iocb_rsp *ob_mac_rsp);	2342	void ql_dump_ob_mac_rsp(struct ql_adapter qdev, struct ob_mac_iocb_rsp ob_mac_rsp);
2343	#define QL_DUMP_OB_MAC_IOCB(ob_mac_iocb) ql_dump_ob_mac_iocb(ob_mac_iocb)	2343	#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) ql_dump_ob_mac_iocb(qdev, ob_mac_iocb)
2344	#define QL_DUMP_OB_MAC_RSP(ob_mac_rsp) ql_dump_ob_mac_rsp(ob_mac_rsp)	2344	#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) ql_dump_ob_mac_rsp(qdev, ob_mac_rsp)
2345	#else	2345	#else
2346	#define QL_DUMP_OB_MAC_IOCB(ob_mac_iocb)	2346	#define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb)
2347	#define QL_DUMP_OB_MAC_RSP(ob_mac_rsp)	2347	#define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp)
2348	#endif	2348	#endif
2349		2349
2350	#ifdef QL_IB_DUMP	2350	#ifdef QL_IB_DUMP
2351	void ql_dump_ib_mac_rsp(struct ib_mac_iocb_rsp *ib_mac_rsp);	2351	void ql_dump_ib_mac_rsp(struct ql_adapter qdev, struct ib_mac_iocb_rsp ib_mac_rsp);
2352	#define QL_DUMP_IB_MAC_RSP(ib_mac_rsp) ql_dump_ib_mac_rsp(ib_mac_rsp)	2352	#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) ql_dump_ib_mac_rsp(qdev, ib_mac_rsp)
2353	#else	2353	#else
2354	#define QL_DUMP_IB_MAC_RSP(ib_mac_rsp)	2354	#define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp)
2355	#endif	2355	#endif
2356		2356
2357	#ifdef QL_ALL_DUMP	2357	#ifdef QL_ALL_DUMP

drivers/staging/qlge/qlge_dbg.c+18−10

@@ -1431,7 +1431,7 @@ void ql_dump_routing_entries(struct ql_adapter *qdev) · 1430 unmodified lines
1431	}	1431	}
1432	if (value)	1432	if (value)
1433	netdev_err(qdev->ndev,	1433	netdev_err(qdev->ndev,
1434	"%s: Routing Mask %d = 0x%.08x\n",	1434	"Routing Mask %d = 0x%.08x\n",
1435	i, value);	1435	i, value);
1436	}	1436	}
1437	ql_sem_unlock(qdev, SEM_RT_IDX_MASK);	1437	ql_sem_unlock(qdev, SEM_RT_IDX_MASK);
@@ -1617,6 +1617,9 @@ void ql_dump_qdev(struct ql_adapter *qdev) · 179 unmodified lines
1617	#ifdef QL_CB_DUMP	1617	#ifdef QL_CB_DUMP
1618	void ql_dump_wqicb(struct wqicb *wqicb)	1618	void ql_dump_wqicb(struct wqicb *wqicb)
1619	{	1619	{
		1620	struct tx_ring *tx_ring = container_of(wqicb, struct tx_ring, wqicb);
		1621	struct ql_adapter *qdev = tx_ring->qdev;
		1622
1620	netdev_err(qdev->ndev, "Dumping wqicb stuff...\n");	1623	netdev_err(qdev->ndev, "Dumping wqicb stuff...\n");
1621	netdev_err(qdev->ndev, "wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len));	1624	netdev_err(qdev->ndev, "wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len));
1622	netdev_err(qdev->ndev, "wqicb->flags = %x\n",	1625	netdev_err(qdev->ndev, "wqicb->flags = %x\n",
@@ -1632,8 +1635,8 @@ void ql_dump_wqicb(struct wqicb *wqicb) · 9 unmodified lines
1632		1635
1633	void ql_dump_tx_ring(struct tx_ring *tx_ring)	1636	void ql_dump_tx_ring(struct tx_ring *tx_ring)
1634	{	1637	{
1635	if (!tx_ring)	1638	struct ql_adapter *qdev = tx_ring->qdev;
1636	return;	1639
1637	netdev_err(qdev->ndev, "===================== Dumping tx_ring %d ===============\n",	1640	netdev_err(qdev->ndev, "===================== Dumping tx_ring %d ===============\n",
1638	tx_ring->wq_id);	1641	tx_ring->wq_id);
1639	netdev_err(qdev->ndev, "tx_ring->base = %p\n", tx_ring->wq_base);	1642	netdev_err(qdev->ndev, "tx_ring->base = %p\n", tx_ring->wq_base);
@@ -1657,6 +1660,8 @@ void ql_dump_tx_ring(struct tx_ring *tx_ring) · 17 unmodified lines
1657	void ql_dump_ricb(struct ricb *ricb)	1660	void ql_dump_ricb(struct ricb *ricb)
1658	{	1661	{
1659	int i;	1662	int i;
		1663	struct ql_adapter *qdev =
		1664	container_of(ricb, struct ql_adapter, ricb);
1660		1665
1661	netdev_err(qdev->ndev, "===================== Dumping ricb ===============\n");	1666	netdev_err(qdev->ndev, "===================== Dumping ricb ===============\n");
1662	netdev_err(qdev->ndev, "Dumping ricb stuff...\n");	1667	netdev_err(qdev->ndev, "Dumping ricb stuff...\n");
@@ -1686,6 +1691,9 @@ void ql_dump_ricb(struct ricb *ricb) · 23 unmodified lines
1686		1691
1687	void ql_dump_cqicb(struct cqicb *cqicb)	1692	void ql_dump_cqicb(struct cqicb *cqicb)
1688	{	1693	{
		1694	struct rx_ring *rx_ring = container_of(cqicb, struct rx_ring, cqicb);
		1695	struct ql_adapter *qdev = rx_ring->qdev;
		1696
1689	netdev_err(qdev->ndev, "Dumping cqicb stuff...\n");	1697	netdev_err(qdev->ndev, "Dumping cqicb stuff...\n");
1690		1698
1691	netdev_err(qdev->ndev, "cqicb->msix_vect = %d\n", cqicb->msix_vect);	1699	netdev_err(qdev->ndev, "cqicb->msix_vect = %d\n", cqicb->msix_vect);
@@ -1725,8 +1733,8 @@ static const char qlge_rx_ring_type_name(struct rx_ring rx_ring) · 33 unmodified lines
1725		1733
1726	void ql_dump_rx_ring(struct rx_ring *rx_ring)	1734	void ql_dump_rx_ring(struct rx_ring *rx_ring)
1727	{	1735	{
1728	if (!rx_ring)	1736	struct ql_adapter *qdev = rx_ring->qdev;
1729	return;	1737
1730	netdev_err(qdev->ndev,	1738	netdev_err(qdev->ndev,
1731	"===================== Dumping rx_ring %d ===============\n",	1739	"===================== Dumping rx_ring %d ===============\n",
1732	rx_ring->cq_id);	1740	rx_ring->cq_id);
@@ -1816,7 +1824,7 @@ fail_it: · 83 unmodified lines
1816	#endif	1824	#endif
1817		1825
1818	#ifdef QL_OB_DUMP	1826	#ifdef QL_OB_DUMP
1819	void ql_dump_tx_desc(struct tx_buf_desc *tbd)	1827	void ql_dump_tx_desc(struct ql_adapter qdev, struct tx_buf_desc tbd)
1820	{	1828	{
1821	netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n",	1829	netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n",
1822	le64_to_cpu((u64)tbd->addr));	1830	le64_to_cpu((u64)tbd->addr));
@@ -1843,7 +1851,7 @@ void ql_dump_tx_desc(struct tx_buf_desc *tbd) · 20 unmodified lines
1843	tbd->len & TX_DESC_E ? "E" : ".");	1851	tbd->len & TX_DESC_E ? "E" : ".");
1844	}	1852	}
1845		1853
1846	void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb)	1854	void ql_dump_ob_mac_iocb(struct ql_adapter qdev, struct ob_mac_iocb_req ob_mac_iocb)
1847	{	1855	{
1848	struct ob_mac_tso_iocb_req *ob_mac_tso_iocb =	1856	struct ob_mac_tso_iocb_req *ob_mac_tso_iocb =
1849	(struct ob_mac_tso_iocb_req *)ob_mac_iocb;	1857	(struct ob_mac_tso_iocb_req *)ob_mac_iocb;
@@ -1886,10 +1894,10 @@ void ql_dump_ob_mac_iocb(struct ob_mac_iocb_req *ob_mac_iocb) · 36 unmodified lines
1886	frame_len = le16_to_cpu(ob_mac_iocb->frame_len);	1894	frame_len = le16_to_cpu(ob_mac_iocb->frame_len);
1887	}	1895	}
1888	tbd = &ob_mac_iocb->tbd[0];	1896	tbd = &ob_mac_iocb->tbd[0];
1889	ql_dump_tx_desc(tbd);	1897	ql_dump_tx_desc(qdev, tbd);
1890	}	1898	}
1891		1899
1892	void ql_dump_ob_mac_rsp(struct ob_mac_iocb_rsp *ob_mac_rsp)	1900	void ql_dump_ob_mac_rsp(struct ql_adapter qdev, struct ob_mac_iocb_rsp ob_mac_rsp)
1893	{	1901	{
1894	netdev_err(qdev->ndev, "%s\n", __func__);	1902	netdev_err(qdev->ndev, "%s\n", __func__);
1895	netdev_err(qdev->ndev, "opcode = %d\n", ob_mac_rsp->opcode);	1903	netdev_err(qdev->ndev, "opcode = %d\n", ob_mac_rsp->opcode);
@@ -1906,7 +1914,7 @@ void ql_dump_ob_mac_rsp(struct ob_mac_iocb_rsp *ob_mac_rsp) · 10 unmodified lines
1906	#endif	1914	#endif
1907		1915
1908	#ifdef QL_IB_DUMP	1916	#ifdef QL_IB_DUMP
1909	void ql_dump_ib_mac_rsp(struct ib_mac_iocb_rsp *ib_mac_rsp)	1917	void ql_dump_ib_mac_rsp(struct ql_adapter qdev, struct ib_mac_iocb_rsp ib_mac_rsp)
1910	{	1918	{
1911	netdev_err(qdev->ndev, "%s\n", __func__);	1919	netdev_err(qdev->ndev, "%s\n", __func__);
1912	netdev_err(qdev->ndev, "opcode = 0x%x\n", ib_mac_rsp->opcode);	1920	netdev_err(qdev->ndev, "opcode = 0x%x\n", ib_mac_rsp->opcode);

drivers/staging/qlge/qlge_main.c+9−11

 	struct net_device *ndev = qdev->ndev;
 	struct sk_buff *skb = NULL;
-	QL_DUMP_IB_MAC_RSP(ib_mac_rsp);
+	QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp);
 	skb = ql_build_rx_skb(qdev, rx_ring, ib_mac_rsp);
 	if (unlikely(!skb)) {
 			((le16_to_cpu(ib_mac_rsp->vlan_id) &
 			IB_MAC_IOCB_RSP_VLAN_MASK)) : 0xffff;
-	QL_DUMP_IB_MAC_RSP(ib_mac_rsp);
+	QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp);
 	if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) {
 		/* The data and headers are split into
 	struct tx_ring *tx_ring;
 	struct tx_ring_desc *tx_ring_desc;
-	QL_DUMP_OB_MAC_RSP(mac_rsp);
+	QL_DUMP_OB_MAC_RSP(qdev, mac_rsp);
 	tx_ring = &qdev->tx_ring[mac_rsp->txq_idx];
 	tx_ring_desc = &tx_ring->q[mac_rsp->tid];
 	ql_unmap_send(qdev, tx_ring_desc, tx_ring_desc->map_cnt);
 		break;
 	case PCI_ERR_ANON_BUF_RD:
-		netdev_err(qdev->ndev, "PCI error occurred when reading "
+		netdev_err(qdev->ndev,
-					"anonymous buffers from rx_ring %d.\n",
+			   "PCI error occurred when reading anonymous buffers from rx_ring %d.\n",
-					ib_ae_rsp->q_id);
+			   ib_ae_rsp->q_id);
 		ql_queue_asic_error(qdev);
 		break;
 		ql_queue_asic_error(qdev);
 		netdev_err(qdev->ndev, "Got fatal error, STS = %x.\n", var);
 		var = ql_read32(qdev, ERR_STS);
-		netdev_err(qdev->ndev, "Resetting chip. "
+		netdev_err(qdev->ndev, "Resetting chip. Error Status Register = 0x%x\n", var);
-					"Error Status Register = 0x%x\n", var);
 		return IRQ_HANDLED;
 	}
 		tx_ring->tx_errors++;
 		return NETDEV_TX_BUSY;
 	}
-	QL_DUMP_OB_MAC_IOCB(mac_iocb_ptr);
+	QL_DUMP_OB_MAC_IOCB(qdev, mac_iocb_ptr);
 	tx_ring->prod_idx++;
 	if (tx_ring->prod_idx == tx_ring->wq_len)
 		tx_ring->prod_idx = 0;
 	struct ql_adapter *qdev = netdev_priv(ndev);
 	netif_info(qdev, probe, qdev->ndev,
-		   "Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, "
+		   "Function #%d, Port %d, NIC Roll %d, NIC Rev = %d, XG Roll = %d, XG Rev = %d.\n",
-		   "XG Roll = %d, XG Rev = %d.\n",
 		   qdev->func,
 		   qdev->port,
 		   qdev->chip_rev_id & 0x0000000f,

drivers/staging/qlge/qlge_mpi.c+6−9

@@ -117,7 +117,6 @@ int ql_own_firmware(struct ql_adapter *qdev) · 116 unmodified lines
117	return 1;	117	return 1;
118		118
119	return 0;	119	return 0;
120
121	}	120	}
122		121
123	static int ql_get_mb_sts(struct ql_adapter qdev, struct mbox_params mbcp)	122	static int ql_get_mb_sts(struct ql_adapter qdev, struct mbox_params mbcp)
@@ -240,12 +239,12 @@ static int ql_idc_cmplt_aen(struct ql_adapter *qdev) · 116 unmodified lines
240	netif_err(qdev, drv, qdev->ndev,	239	netif_err(qdev, drv, qdev->ndev,
241	"Could not read MPI, resetting RISC!\n");	240	"Could not read MPI, resetting RISC!\n");
242	ql_queue_fw_error(qdev);	241	ql_queue_fw_error(qdev);
243	} else	242	} else {
244	/* Wake up the sleeping mpi_idc_work thread that is	243	/* Wake up the sleeping mpi_idc_work thread that is
245	* waiting for this event.	244	* waiting for this event.
246	*/	245	*/
247	complete(&qdev->ide_completion);	246	complete(&qdev->ide_completion);
248		247	}
249	return status;	248	return status;
250	}	249	}
251		250
@@ -347,16 +346,15 @@ static int ql_aen_lost(struct ql_adapter qdev, struct mbox_params mbcp) · 95 unmodified lines
347	mbcp->out_count = 6;	346	mbcp->out_count = 6;
348		347
349	status = ql_get_mb_sts(qdev, mbcp);	348	status = ql_get_mb_sts(qdev, mbcp);
350	if (status)	349	if (status) {
351	netif_err(qdev, drv, qdev->ndev, "Lost AEN broken!\n");	350	netif_err(qdev, drv, qdev->ndev, "Lost AEN broken!\n");
352	else {	351	} else {
353	int i;	352	int i;
354		353
355	netif_err(qdev, drv, qdev->ndev, "Lost AEN detected.\n");	354	netif_err(qdev, drv, qdev->ndev, "Lost AEN detected.\n");
356	for (i = 0; i < mbcp->out_count; i++)	355	for (i = 0; i < mbcp->out_count; i++)
357	netif_err(qdev, drv, qdev->ndev, "mbox_out[%d] = 0x%.08x.\n",	356	netif_err(qdev, drv, qdev->ndev, "mbox_out[%d] = 0x%.08x.\n",
358	i, mbcp->mbox_out[i]);	357	i, mbcp->mbox_out[i]);
359
360	}	358	}
361		359
362	return status;	360	return status;
@@ -405,7 +403,6 @@ static int ql_mpi_handler(struct ql_adapter qdev, struct mbox_params mbcp) · 42 unmodified lines
405	}	403	}
406		404
407	switch (mbcp->mbox_out[0]) {	405	switch (mbcp->mbox_out[0]) {
408
409	/* This case is only active when we arrive here	406	/* This case is only active when we arrive here
410	* as a result of issuing a mailbox command to	407	* as a result of issuing a mailbox command to
411	* the firmware.	408	* the firmware.
@@ -998,9 +995,9 @@ int ql_mb_get_led_cfg(struct ql_adapter *qdev) · 586 unmodified lines
998	netif_err(qdev, drv, qdev->ndev,	995	netif_err(qdev, drv, qdev->ndev,
999	"Failed to get LED Configuration.\n");	996	"Failed to get LED Configuration.\n");
1000	status = -EIO;	997	status = -EIO;
1001	} else	998	} else {
1002	qdev->led_config = mbcp->mbox_out[1];	999	qdev->led_config = mbcp->mbox_out[1];
1003		1000	}
1004	return status;	1001	return status;
1005	}	1002	}
1006		1003

drivers/staging/ralink-gdma/ralink-gdma.c+3−3

@@ -701,9 +701,9 @@ static void gdma_dma_desc_free(struct virt_dma_desc *vdesc) · 700 unmodified lines
701	kfree(container_of(vdesc, struct gdma_dma_desc, vdesc));	701	kfree(container_of(vdesc, struct gdma_dma_desc, vdesc));
702	}	702	}
703		703
704	static void gdma_dma_tasklet(unsigned long arg)	704	static void gdma_dma_tasklet(struct tasklet_struct *t)
705	{	705	{
706	struct gdma_dma_dev dma_dev = (struct gdma_dma_dev )arg;	706	struct gdma_dma_dev *dma_dev = from_tasklet(dma_dev, t, task);
707	struct gdma_dmaengine_chan *chan;	707	struct gdma_dmaengine_chan *chan;
708	static unsigned int last_chan;	708	static unsigned int last_chan;
709	unsigned int i, chan_mask;	709	unsigned int i, chan_mask;
@@ -821,7 +821,7 @@ static int gdma_dma_probe(struct platform_device *pdev) · 111 unmodified lines
821	if (IS_ERR(base))	821	if (IS_ERR(base))
822	return PTR_ERR(base);	822	return PTR_ERR(base);
823	dma_dev->base = base;	823	dma_dev->base = base;
824	tasklet_init(&dma_dev->task, gdma_dma_tasklet, (unsigned long)dma_dev);	824	tasklet_setup(&dma_dev->task, gdma_dma_tasklet);
825		825
826	irq = platform_get_irq(pdev, 0);	826	irq = platform_get_irq(pdev, 0);
827	if (irq < 0)	827	if (irq < 0)

drivers/staging/rtl8188eu/core/rtw_ap.c+5−5

drivers/staging/rtl8188eu/core/rtw_cmd.c+53−25

 		if (padapter->bDriverStopped ||
 		    padapter->bSurpriseRemoved) {
 			DBG_88E("%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n",
-				__func__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__);
+				__func__, padapter->bDriverStopped,
+				padapter->bSurpriseRemoved, __LINE__);
 			break;
 		}
 _next:
 		if (padapter->bDriverStopped ||
 		    padapter->bSurpriseRemoved) {
 			DBG_88E("%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n",
-				__func__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__);
+				__func__, padapter->bDriverStopped,
+				padapter->bSurpriseRemoved, __LINE__);
 			break;
 		}
 		if (pcmd->cmdcode < ARRAY_SIZE(rtw_cmd_callback)) {
 			pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback;
 			if (!pcmd_callback) {
-				RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("mlme_cmd_hdl(): pcmd_callback = 0x%p, cmdcode = 0x%x\n", pcmd_callback, pcmd->cmdcode));
+				RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
+					 ("mlme_cmd_hdl(): pcmd_callback = 0x%p, cmdcode = 0x%x\n",
+					  pcmd_callback, pcmd->cmdcode));
 				rtw_free_cmd_obj(pcmd);
 			} else {
 				/* todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!= NULL) */
 				pcmd_callback(pcmd->padapter, pcmd);/* need consider that free cmd_obj in rtw_cmd_callback */
 			}
 		} else {
-			RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("%s: cmdcode = 0x%x callback not defined!\n", __func__, pcmd->cmdcode));
+			RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+				 ("%s: cmdcode = 0x%x callback not defined!\n",
+				  __func__, pcmd->cmdcode));
 			rtw_free_cmd_obj(pcmd);
 		}
 		for (i = 0; i < ssid_num && i < RTW_SSID_SCAN_AMOUNT; i++) {
 			if (ssid[i].ssid_length) {
-				memcpy(&psurveyPara->ssid[i], &ssid[i], sizeof(struct ndis_802_11_ssid));
+				memcpy(&psurveyPara->ssid[i], &ssid[i],
+				       sizeof(struct ndis_802_11_ssid));
 				psurveyPara->ssid_num++;
 			}
 		}
 		for (i = 0; i < ch_num && i < RTW_CHANNEL_SCAN_AMOUNT; i++) {
 			if (ch[i].hw_value && !(ch[i].flags & RTW_IEEE80211_CHAN_DISABLED)) {
-				memcpy(&psurveyPara->ch[i], &ch[i], sizeof(struct rtw_ieee80211_channel));
+				memcpy(&psurveyPara->ch[i], &ch[i],
+				       sizeof(struct rtw_ieee80211_channel));
 				psurveyPara->ch_num++;
 			}
 		}
 	led_control_8188eu(padapter, LED_CTL_START_TO_LINK);
 	if (pmlmepriv->assoc_ssid.ssid_length == 0)
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for Any SSid:%s\n", pmlmepriv->assoc_ssid.ssid));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
+			 (" createbss for Any SSid:%s\n", pmlmepriv->assoc_ssid.ssid));
 	else
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, (" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.ssid));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_,
+			 (" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.ssid));
 	pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC);
 	if (!pcmd) {
 	INIT_LIST_HEAD(&pcmd->list);
 	pcmd->cmdcode = _CreateBss_CMD_;
 	pcmd->parmbuf = (unsigned char *)pdev_network;
-	pcmd->cmdsz = get_wlan_bssid_ex_sz((struct wlan_bssid_ex *)pdev_network);
+	pcmd->cmdsz = get_wlan_bssid_ex_sz(pdev_network);
 	pcmd->rsp = NULL;
 	pcmd->rspsz = 0;
 	pdev_network->Length = pcmd->cmdsz;
 	if (pmlmepriv->assoc_ssid.ssid_length == 0)
 		RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n"));
 	else
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid =[%s]\n", pmlmepriv->assoc_ssid.ssid));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_,
+			 ("+Join cmd: SSid =[%s]\n", pmlmepriv->assoc_ssid.ssid));
 	pcmd = kzalloc(sizeof(*pcmd), GFP_ATOMIC);
 	if (!pcmd) {
 		}
 	}
-	psecnetwork = (struct wlan_bssid_ex *)&psecuritypriv->sec_bss;
+	psecnetwork = &psecuritypriv->sec_bss;
 	if (!psecnetwork) {
 		kfree(pcmd);
 	psecuritypriv->authenticator_ie[0] = (unsigned char)psecnetwork->ie_length;
 	if (psecnetwork->ie_length - 12 < 255)
-		memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->ies[12], psecnetwork->ie_length - 12);
+		memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->ies[12],
+		       psecnetwork->ie_length - 12);
 	else
 		memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->ies[12], 255);
 	if (!pmlmepriv->assoc_by_bssid)
 		memcpy(&pmlmepriv->assoc_bssid[0], &pnetwork->network.MacAddress[0], ETH_ALEN);
-	psecnetwork->ie_length = rtw_restruct_sec_ie(padapter, &pnetwork->network.ies[0], &psecnetwork->ies[0], pnetwork->network.ie_length);
+	psecnetwork->ie_length = rtw_restruct_sec_ie(padapter, &pnetwork->network.ies[0],
+						     &psecnetwork->ies[0],
+						     pnetwork->network.ie_length);
 	pqospriv->qos_option = 0;
 	if (pregistrypriv->wmm_enable) {
 		u32 tmp_len;
-		tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.ies[0], &psecnetwork->ies[0], pnetwork->network.ie_length, psecnetwork->ie_length);
+		tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.ies[0],
+					      &psecnetwork->ies[0],
+					      pnetwork->network.ie_length,
+					      psecnetwork->ie_length);
 		if (psecnetwork->ie_length != tmp_len) {
 			psecnetwork->ie_length = tmp_len;
 		    (padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_) &&
 		    (padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_)) {
 			/* rtw_restructure_ht_ie */
-			rtw_restructure_ht_ie(padapter, &pnetwork->network.ies[0], &psecnetwork->ies[0],
+			rtw_restructure_ht_ie(padapter, &pnetwork->network.ies[0],
+					      &psecnetwork->ies[0],
 					      pnetwork->network.ie_length, &psecnetwork->ie_length);
 		}
 	}
 	if (unicast_key)
 		memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16);
 	else
-		memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16);
+		memcpy(&psetstakey_para->key,
+		       &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16);
 	/* jeff: set this because at least sw key is ready */
 	padapter->securitypriv.busetkipkey = true;
 		    pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100) {
 			bBusyTraffic = true;
-			if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod)
+			if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod >
+			    pmlmepriv->LinkDetectInfo.NumTxOkInPeriod)
 				bRxBusyTraffic = true;
 			else
 				bTxBusyTraffic = true;
 		    pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000) {
 			bHigherBusyTraffic = true;
-			if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > pmlmepriv->LinkDetectInfo.NumTxOkInPeriod)
+			if (pmlmepriv->LinkDetectInfo.NumRxOkInPeriod >
+			    pmlmepriv->LinkDetectInfo.NumTxOkInPeriod)
 				bHigherBusyRxTraffic = true;
 			else
 				bHigherBusyTxTraffic = true;
 	} else if (pcmd->res != H2C_SUCCESS) {
 		mod_timer(&pmlmepriv->scan_to_timer,
 			  jiffies + msecs_to_jiffies(1));
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n."));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+			 ("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n."));
 	}
 	/*  free cmd */
 		set_fwstate(pmlmepriv, _FW_LINKED);
 		spin_unlock_bh(&pmlmepriv->lock);
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n ***Error: disconnect_cmd_callback Fail ***\n."));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+			 ("\n ***Error: disconnect_cmd_callback Fail ***\n."));
 		return;
 	}
 		mod_timer(&pmlmepriv->assoc_timer,
 			  jiffies + msecs_to_jiffies(1));
 	} else if (pcmd->res != H2C_SUCCESS) {
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("********Error:rtw_select_and_join_from_scanned_queue Wait Sema  Fail ************\n"));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+			 ("********Error:rtw_select_and_join_from_scanned_queue Wait Sema  Fail ************\n"));
 		mod_timer(&pmlmepriv->assoc_timer,
 			  jiffies + msecs_to_jiffies(1));
 	}
 		if (!psta) {
 			psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress);
 			if (!psta) {
-				RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\nCan't alloc sta_info when createbss_cmd_callback\n"));
+				RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+					 ("\nCan't alloc sta_info when createbss_cmd_callback\n"));
 				goto createbss_cmd_fail;
 			}
 		}
 		if (!pwlan) {
 			pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue);
 			if (!pwlan) {
-				RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\n Error:  can't get pwlan in rtw_joinbss_event_callback\n"));
+				RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+					 ("\n Error:  can't get pwlan in rtw_joinbss_event_callback\n"));
 				spin_unlock_bh(&pmlmepriv->scanned_queue.lock);
 				goto createbss_cmd_fail;
 			}
 	struct sta_info *psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr);
 	if (!psta) {
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\nERROR: %s => can't get sta_info\n\n", __func__));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+			 ("\nERROR: %s => can't get sta_info\n\n", __func__));
 		goto exit;
 	}
 exit:
 	struct sta_info *psta = rtw_get_stainfo(pstapriv, passocsta_parm->addr);
 	if (!psta) {
-		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("\nERROR: %s => can't get sta_info\n\n", __func__));
+		RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_,
+			 ("\nERROR: %s => can't get sta_info\n\n", __func__));
 		goto exit;
 	}

drivers/staging/rtl8188eu/core/rtw_debug.c+4−4

@@ -33,7 +33,7 @@ int proc_set_write_reg(struct file file, const char __user buffer, · 32 unmodified lines
33	unsigned long count, void *data)	33	unsigned long count, void *data)
34	{	34	{
35	struct net_device *dev = data;	35	struct net_device *dev = data;
36	struct adapter padapter = (struct adapter )rtw_netdev_priv(dev);	36	struct adapter *padapter = rtw_netdev_priv(dev);
37	char tmp[32];	37	char tmp[32];
38	u32 addr, val, len;	38	u32 addr, val, len;
39		39
@@ -75,7 +75,7 @@ int proc_get_read_reg(char page, char *start, · 35 unmodified lines
75	int eof, void data)	75	int eof, void data)
76	{	76	{
77	struct net_device *dev = data;	77	struct net_device *dev = data;
78	struct adapter padapter = (struct adapter )rtw_netdev_priv(dev);	78	struct adapter *padapter = rtw_netdev_priv(dev);
79		79
80	int len = 0;	80	int len = 0;
81		81
@@ -135,7 +135,7 @@ int proc_get_adapter_state(char page, char *start, · 53 unmodified lines
135	int eof, void data)	135	int eof, void data)
136	{	136	{
137	struct net_device *dev = data;	137	struct net_device *dev = data;
138	struct adapter padapter = (struct adapter )rtw_netdev_priv(dev);	138	struct adapter *padapter = rtw_netdev_priv(dev);
139	int len = 0;	139	int len = 0;
140		140
141	len += scnprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n",	141	len += scnprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n",
@@ -150,7 +150,7 @@ int proc_get_best_channel(char page, char *start, · 8 unmodified lines
150	int eof, void data)	150	int eof, void data)
151	{	151	{
152	struct net_device *dev = data;	152	struct net_device *dev = data;
153	struct adapter padapter = (struct adapter )rtw_netdev_priv(dev);	153	struct adapter *padapter = rtw_netdev_priv(dev);
154	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;	154	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
155	int len = 0;	155	int len = 0;
156	u32 i, best_channel_24G = 1, index_24G = 0;	156	u32 i, best_channel_24G = 1, index_24G = 0;

drivers/staging/rtl8188eu/core/rtw_mlme.c+7−7

@@ -1672,8 +1672,8 @@ static int SecIsInPMKIDList(struct adapter Adapter, u8 bssid) · 1671 unmodified lines
1672	int i = 0;	1672	int i = 0;
1673		1673
1674	do {	1674	do {
1675	if ((psecuritypriv->PMKIDList[i].bUsed) &&	1675	if ((psecuritypriv->PMKIDList[i].used) &&
1676	(!memcmp(psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN)))	1676	(!memcmp(psecuritypriv->PMKIDList[i].bssid, bssid, ETH_ALEN)))
1677	break;	1677	break;
1678	} while (++i < NUM_PMKID_CACHE);	1678	} while (++i < NUM_PMKID_CACHE);
1679		1679
@@ -1730,7 +1730,7 @@ int rtw_restruct_sec_ie(struct adapter adapter, u8 in_ie, u8 *out_ie, uint in_ · 50 unmodified lines
1730	(ndisauthmode == Ndis802_11AuthModeWPAPSK))	1730	(ndisauthmode == Ndis802_11AuthModeWPAPSK))
1731	authmode = _WPA_IE_ID_;	1731	authmode = _WPA_IE_ID_;
1732	else if ((ndisauthmode == Ndis802_11AuthModeWPA2) \|\|	1732	else if ((ndisauthmode == Ndis802_11AuthModeWPA2) \|\|
1733	(ndisauthmode == Ndis802_11AuthModeWPA2PSK))	1733	(ndisauthmode == Ndis802_11AuthModeWPA2PSK))
1734	authmode = _WPA2_IE_ID_;	1734	authmode = _WPA2_IE_ID_;
1735	else	1735	else
1736	authmode = 0x0;	1736	authmode = 0x0;
@@ -1815,7 +1815,7 @@ void rtw_update_registrypriv_dev_network(struct adapter *adapter) · 78 unmodified lines
1815		1815
1816	sz = rtw_generate_ie(pregistrypriv);	1816	sz = rtw_generate_ie(pregistrypriv);
1817	pdev_network->ie_length = sz;	1817	pdev_network->ie_length = sz;
1818	pdev_network->Length = get_wlan_bssid_ex_sz((struct wlan_bssid_ex *)pdev_network);	1818	pdev_network->Length = get_wlan_bssid_ex_sz(pdev_network);
1819		1819
1820	/* notes: translate ie_length & Length after assign the Length to cmdsz in createbss_cmd(); */	1820	/* notes: translate ie_length & Length after assign the Length to cmdsz in createbss_cmd(); */
1821	/* pdev_network->ie_length = cpu_to_le32(sz); */	1821	/* pdev_network->ie_length = cpu_to_le32(sz); */
@@ -1894,9 +1894,9 @@ unsigned int rtw_restructure_ht_ie(struct adapter padapter, u8 in_ie, u8 *out_ · 72 unmodified lines
1894	rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);	1894	rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
1895		1895
1896	/*	1896	/*
1897	ampdu_params_info [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k	1897	* ampdu_params_info [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k
1898	ampdu_params_info [4:2]:Min MPDU Start Spacing	1898	* ampdu_params_info [4:2]:Min MPDU Start Spacing
1899	*/	1899	*/
1900		1900
1901	rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);	1901	rtw_hal_get_def_var(padapter, HW_VAR_MAX_RX_AMPDU_FACTOR, &max_rx_ampdu_factor);
1902	ht_cap.ampdu_params_info = max_rx_ampdu_factor & 0x03;	1902	ht_cap.ampdu_params_info = max_rx_ampdu_factor & 0x03;

drivers/staging/rtl8188eu/core/rtw_mlme_ext.c+26−32

 static u8 null_addr[ETH_ALEN] = {};
-/**************************************************
+/* OUI definitions for the vendor specific IE */
-OUI definitions for the vendor specific IE
-***************************************************/
 const u8 RTW_WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01};
 const u8 WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04};
 static const u8 WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02};
 const u8 WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02};
 const u8 RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02};
-/********************************************************
+/* MCS rate definitions */
-MCS rate definitions
-*********************************************************/
 const u8 MCS_rate_1R[16] = {
 	0xff, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 };
-/********************************************************
+/* ChannelPlan definitions */
-ChannelPlan definitions
-*********************************************************/
 static struct rt_channel_plan_2g RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = {
 	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},		/*  0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 */
 	{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, 13},		/*  0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 */
 			plist = plist->next;
-			pbss_network = (struct wlan_bssid_ex *)&pnetwork->network;
+			pbss_network = &pnetwork->network;
 			p = rtw_get_ie(pbss_network->ies + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->ie_length - _FIXED_IE_LENGTH_);
 			if (!p || len == 0) { /* non-HT */
 	bssid->Configuration.BeaconPeriod =
 		get_unaligned_le16(rtw_get_beacon_interval_from_ie(bssid->ies));
-	val16 = rtw_get_capability((struct wlan_bssid_ex *)bssid);
+	val16 = rtw_get_capability(bssid);
 	if (val16 & BIT(0)) {
 		bssid->InfrastructureMode = Ndis802_11Infrastructure;
 	u8 join_type;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-	struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
+	struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
 	pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig;
 	pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork);
 	update_wireless_mode(padapter);
 	/* update capability */
-	caps = rtw_get_capability((struct wlan_bssid_ex *)pnetwork);
+	caps = rtw_get_capability(pnetwork);
 	update_capinfo(padapter, caps);
 	if (caps & cap_IBSS) {/* adhoc master */
 		val8 = 0xcf;
 	u8 val8;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-	struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
+	struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
 	int beacon_timeout;
 	pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig;
 	update_wireless_mode(padapter);
 	/* update capability */
-	caps = rtw_get_capability((struct wlan_bssid_ex *)pnetwork);
+	caps = rtw_get_capability(pnetwork);
 	update_capinfo(padapter, caps);
 	if (caps & cap_ESS) {
 		Set_MSR(padapter, WIFI_FW_STATION_STATE);
 			if (psta) {
 				ret = rtw_check_bcn_info(padapter, pframe, len);
 				if (!ret) {
-						DBG_88E_LEVEL(_drv_info_, "ap has changed, disconnect now\n ");
+					DBG_88E_LEVEL(_drv_info_, "ap has changed, disconnect now\n ");
-						receive_disconnect(padapter, pmlmeinfo->network.MacAddress, 65535);
+					receive_disconnect(padapter, pmlmeinfo->network.MacAddress, 65535);
-						return _SUCCESS;
+					return _SUCCESS;
 				}
 				/* update WMM, ERP in the beacon */
 				/* todo: the timer is used instead of the number of the beacon received */
 	pstat = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe));
 	if (!pstat) {
-		status = _RSON_CLS2_;
+		status = WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA;
 		goto asoc_class2_error;
 	}
 	/*  check if this stat has been successfully authenticated/assocated */
 	if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) {
 		if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) {
-			status = _RSON_CLS2_;
+			status = WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA;
 			goto asoc_class2_error;
 		} else {
 			pstat->state &= (~WIFI_FW_ASSOC_SUCCESS);
 			status = _STATS_FAILURE_;
 	}
-	if (_STATS_SUCCESSFUL_ != status)
+	if (status != _STATS_SUCCESSFUL_)
 		goto OnAssocReqFail;
 	/*  check if the supported rate is ok */
 		wpa_ie_len = 0;
 	}
-	if (_STATS_SUCCESSFUL_ != status)
+	if (status != _STATS_SUCCESSFUL_)
 		goto OnAssocReqFail;
 	pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS);
 	spin_unlock_bh(&pstapriv->asoc_list_lock);
 	/*  now the station is qualified to join our BSS... */
-	if ((pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_ == status)) {
+	if ((pstat->state & WIFI_FW_ASSOC_SUCCESS) && (status == _STATS_SUCCESSFUL_)) {
 		/* 1 bss_cap_update & sta_info_update */
 		bss_cap_update_on_sta_join(padapter, pstat);
 		sta_info_update(padapter, pstat);
 	action = frame_body[1];
 	switch (action) {
-	case RTW_WLAN_ACTION_SPCT_MSR_REQ:
+	case WLAN_ACTION_SPCT_MSR_REQ:
-	case RTW_WLAN_ACTION_SPCT_MSR_RPRT:
+	case WLAN_ACTION_SPCT_MSR_RPRT:
-	case RTW_WLAN_ACTION_SPCT_TPC_REQ:
+	case WLAN_ACTION_SPCT_TPC_REQ:
-	case RTW_WLAN_ACTION_SPCT_TPC_RPRT:
+	case WLAN_ACTION_SPCT_TPC_RPRT:
 		break;
-	case RTW_WLAN_ACTION_SPCT_CHL_SWITCH:
+	case WLAN_ACTION_SPCT_CHL_SWITCH:
 		break;
 	default:
 		break;
 	psurvey_evt = (struct survey_event *)(pevtcmd + sizeof(struct C2HEvent_Header));
-	if (collect_bss_info(padapter, precv_frame, (struct wlan_bssid_ex *)&psurvey_evt->bss) == _FAIL) {
+	if (collect_bss_info(padapter, precv_frame, &psurvey_evt->bss) == _FAIL) {
 		kfree(pcmd_obj);
 		kfree(pevtcmd);
 		return;
 {
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-	struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
+	struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
 	struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf;
 	if (pparm->InfrastructureMode == Ndis802_11APMode) {
 	struct registry_priv *pregpriv = &padapter->registrypriv;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-	struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
+	struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
 	struct wlan_bssid_ex *pparm = (struct wlan_bssid_ex *)pbuf;
 	u32 i;
 	struct disconnect_parm *param = (struct disconnect_parm *)pbuf;
 	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
 	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
-	struct wlan_bssid_ex *pnetwork = (struct wlan_bssid_ex *)(&pmlmeinfo->network);
+	struct wlan_bssid_ex *pnetwork = &pmlmeinfo->network;
 	u8 val8;
 	if (is_client_associated_to_ap(padapter))

drivers/staging/rtl8188eu/core/rtw_pwrctrl.c+6−6

@@ -84,7 +84,7 @@ static int rtw_hw_resume(struct adapter *padapter) · 83 unmodified lines
84	pwrpriv->bips_processing = true;	84	pwrpriv->bips_processing = true;
85	rtw_reset_drv_sw(padapter);	85	rtw_reset_drv_sw(padapter);
86		86
87	if (ips_netdrv_open((struct adapter *)rtw_netdev_priv(pnetdev)) != _SUCCESS) {	87	if (ips_netdrv_open(rtw_netdev_priv(pnetdev)) != _SUCCESS) {
88	mutex_unlock(&pwrpriv->mutex_lock);	88	mutex_unlock(&pwrpriv->mutex_lock);
89	goto error_exit;	89	goto error_exit;
90	}	90	}
@@ -530,11 +530,11 @@ void rtw_init_pwrctrl_priv(struct adapter *padapter) · 439 unmodified lines
530	}	530	}
531		531
532	/*	532	/*
533	* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend	533	* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend
534	* @adapter: pointer to struct adapter structure	534	* @adapter: pointer to struct adapter structure
535	* @ips_deffer_ms: the ms will prevent from falling into IPS after wakeup	535	* @ips_deffer_ms: the ms will prevent from falling into IPS after wakeup
536	* Return _SUCCESS or _FAIL	536	* Return _SUCCESS or _FAIL
537	*/	537	*/
538		538
539	int _rtw_pwr_wakeup(struct adapter padapter, u32 ips_deffer_ms, const char caller)	539	int _rtw_pwr_wakeup(struct adapter padapter, u32 ips_deffer_ms, const char caller)
540	{	540	{

drivers/staging/rtl8188eu/core/rtw_security.c+76−714

@@ -142,7 +142,7 @@ void rtw_wep_encrypt(struct adapter padapter, struct xmit_frame pxmitframe) · 141 unmodified lines
142	struct sk_buff *skb;	142	struct sk_buff *skb;
143	struct lib80211_crypto_ops *crypto_ops;	143	struct lib80211_crypto_ops *crypto_ops;
144		144
145	if (pxmitframe->buf_addr == NULL)	145	if (!pxmitframe->buf_addr)
146	return;	146	return;
147		147
148	if ((pattrib->encrypt != _WEP40_) && (pattrib->encrypt != _WEP104_))	148	if ((pattrib->encrypt != _WEP40_) && (pattrib->encrypt != _WEP104_))
@@ -371,8 +371,6 @@ void rtw_seccalctkipmic(u8 key, u8 header, u8 data, u32 data_len, u8 mic_cod · 222 unmodified lines
371	rtw_secgetmic(&micdata, mic_code);	371	rtw_secgetmic(&micdata, mic_code);
372	}	372	}
373		373
374
375
376	/* macros for extraction/creation of unsigned char/unsigned short values */	374	/* macros for extraction/creation of unsigned char/unsigned short values */
377	#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15))	375	#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15))
378	#define Lo8(v16) ((u8)((v16) & 0x00FF))	376	#define Lo8(v16) ((u8)((v16) & 0x00FF))
@@ -591,7 +589,7 @@ u32 rtw_tkip_encrypt(struct adapter padapter, struct xmit_frame pxmitframe) · 212 unmodified lines
591	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;	589	struct xmit_priv *pxmitpriv = &padapter->xmitpriv;
592	u32 res = _SUCCESS;	590	u32 res = _SUCCESS;
593		591
594	if (pxmitframe->buf_addr == NULL)	592	if (!pxmitframe->buf_addr)
595	return _FAIL;	593	return _FAIL;
596		594
597	hw_hdr_offset = TXDESC_SIZE +	595	hw_hdr_offset = TXDESC_SIZE +
@@ -604,7 +602,7 @@ u32 rtw_tkip_encrypt(struct adapter padapter, struct xmit_frame pxmitframe) · 6 unmodified lines
604	else	602	else
605	stainfo = rtw_get_stainfo(&padapter->stapriv, &pattrib->ra[0]);	603	stainfo = rtw_get_stainfo(&padapter->stapriv, &pattrib->ra[0]);
606		604
607	if (stainfo != NULL) {	605	if (stainfo) {
608	RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("%s: stainfo!= NULL!!!\n", __func__));	606	RT_TRACE(_module_rtl871x_security_c_, _drv_err_, ("%s: stainfo!= NULL!!!\n", __func__));
609		607
610	if (is_multicast_ether_addr(pattrib->ra))	608	if (is_multicast_ether_addr(pattrib->ra))
@@ -662,7 +660,6 @@ u32 rtw_tkip_decrypt(struct adapter padapter, struct recv_frame precvframe) · 51 unmodified lines
662	u8 crc[4];	660	u8 crc[4];
663	struct arc4context mycontext;	661	struct arc4context mycontext;
664	int length;	662	int length;
665
666	u8 pframe, payload, iv, prwskey;	663	u8 pframe, payload, iv, prwskey;
667	union pn48 dot11txpn;	664	union pn48 dot11txpn;
668	struct sta_info *stainfo;	665	struct sta_info *stainfo;
@@ -670,7 +667,6 @@ u32 rtw_tkip_decrypt(struct adapter padapter, struct recv_frame precvframe) · 1 unmodified line
670	struct security_priv *psecuritypriv = &padapter->securitypriv;	667	struct security_priv *psecuritypriv = &padapter->securitypriv;
671	u32 res = _SUCCESS;	668	u32 res = _SUCCESS;
672		669
673
674	pframe = (unsigned char *)precvframe->pkt->data;	670	pframe = (unsigned char *)precvframe->pkt->data;
675		671
676	/* 4 start to decrypt recvframe */	672	/* 4 start to decrypt recvframe */
@@ -726,553 +722,106 @@ exit: · 49 unmodified lines
726	return res;	722	return res;
727	}	723	}
728		724
729	/* 3 ===== AES related ===== */	725	u32 rtw_aes_encrypt(struct adapter padapter, struct xmit_frame pxmitframe)
730
731
732	#define MAX_MSG_SIZE 2048
733	/*****************************/
734	/****** SBOX Table *******/
735	/*****************************/
736
737	static const u8 sbox_table[256] = {
738	0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5,
739	0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
740	0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0,
741	0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0,
742	0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc,
743	0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15,
744	0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a,
745	0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75,
746	0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0,
747	0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84,
748	0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b,
749	0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf,
750	0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85,
751	0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8,
752	0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5,
753	0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2,
754	0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17,
755	0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73,
756	0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88,
757	0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb,
758	0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c,
759	0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79,
760	0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9,
761	0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08,
762	0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6,
763	0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a,
764	0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e,
765	0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e,
766	0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94,
767	0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf,
768	0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68,
769	0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16
770	};
771
772	/*****************************/
773	/** Function Prototypes **/
774	/*****************************/
775
776	static void bitwise_xor(u8 ina, u8 inb, u8 *out);
777	static void construct_mic_iv(u8 mic_header1, int qc_exists, int a4_exists, u8 mpdu, uint payload_length, u8 *pn_vector);
778	static void construct_mic_header1(u8 mic_header1, int header_length, u8 mpdu);
779	static void construct_mic_header2(u8 mic_header2, u8 mpdu, int a4_exists, int qc_exists);
780	static void construct_ctr_preload(u8 ctr_preload, int a4_exists, int qc_exists, u8 mpdu, u8 *pn_vector, int c);
781	static void xor_128(u8 a, u8 b, u8 *out);
782	static void xor_32(u8 a, u8 b, u8 *out);
783	static u8 sbox(u8 a);
784	static void next_key(u8 *key, int round);
785	static void byte_sub(u8 in, u8 out);
786	static void shift_row(u8 in, u8 out);
787	static void mix_column(u8 in, u8 out);
788	static void aes128k128d(u8 key, u8 data, u8 *ciphertext);
789
790	/****************************************/
791	/* aes128k128d() */
792	/* Performs a 128 bit AES encrypt with */
793	/* 128 bit data. */
794	/****************************************/
795	static void xor_128(u8 a, u8 b, u8 *out)
796	{
797	int i;
798
799	for (i = 0; i < 16; i++)
800	out[i] = a[i] ^ b[i];
801	}
802
803	static void xor_32(u8 a, u8 b, u8 *out)
804	{
805	int i;
806
807	for (i = 0; i < 4; i++)
808	out[i] = a[i] ^ b[i];
809	}
810
811	static u8 sbox(u8 a)
812	{	726	{
813	return sbox_table[(int)a];
814	}
815
816	static void next_key(u8 *key, int round)
817	{
818	u8 rcon;
819	u8 sbox_key[4];
820	static const u8 rcon_table[12] = {
821	0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
822	0x1b, 0x36, 0x36, 0x36
823	};
824
825	sbox_key[0] = sbox(key[13]);
826	sbox_key[1] = sbox(key[14]);
827	sbox_key[2] = sbox(key[15]);
828	sbox_key[3] = sbox(key[12]);
829
830	rcon = rcon_table[round];
831
832	xor_32(&key[0], sbox_key, &key[0]);
833	key[0] = key[0] ^ rcon;
834
835	xor_32(&key[4], &key[0], &key[4]);
836	xor_32(&key[8], &key[4], &key[8]);
837	xor_32(&key[12], &key[8], &key[12]);
838	}
839
840	static void byte_sub(u8 in, u8 out)
841	{
842	int i;
843
844	for (i = 0; i < 16; i++)
845	out[i] = sbox(in[i]);
846	}
847
848	static void shift_row(u8 in, u8 out)
849	{
850	out[0] = in[0];
851	out[1] = in[5];
852	out[2] = in[10];
853	out[3] = in[15];
854	out[4] = in[4];
855	out[5] = in[9];
856	out[6] = in[14];
857	out[7] = in[3];
858	out[8] = in[8];
859	out[9] = in[13];
860	out[10] = in[2];
861	out[11] = in[7];
862	out[12] = in[12];
863	out[13] = in[1];
864	out[14] = in[6];
865	out[15] = in[11];
866	}
867
868	static void mix_column(u8 in, u8 out)
869	{
870	int i;
871	u8 add1b[4];
872	u8 add1bf7[4];
873	u8 rotl[4];
874	u8 swap_halves[4];
875	u8 andf7[4];
876	u8 rotr[4];
877	u8 temp[4];
878	u8 tempb[4];
879
880	for (i = 0 ; i < 4; i++) {
881	if ((in[i] & 0x80) == 0x80)
882	add1b[i] = 0x1b;
883	else
884	add1b[i] = 0x00;
885	}
886
887	swap_halves[0] = in[2]; /* Swap halves */
888	swap_halves[1] = in[3];
889	swap_halves[2] = in[0];
890	swap_halves[3] = in[1];
891
892	rotl[0] = in[3]; /* Rotate left 8 bits */
893	rotl[1] = in[0];
894	rotl[2] = in[1];
895	rotl[3] = in[2];
896

653 more lines aren’t shown here.

drivers/staging/rtl8188eu/core/rtw_wlan_util.c+32−60

This diff is large: its 167 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/hal_intf.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/odm.c+32−33

This diff is large: its 203 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/phy.c+24−25

This diff is large: its 140 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/pwrseqcmd.c+13−12

This diff is large: its 67 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/rf.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/rf_cfg.c+3−4

This diff is large: its 21 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/rtl8188eu_recv.c+1−2

This diff is large: its 10 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/rtl8188eu_xmit.c+2−3

This diff is large: its 19 lines aren’t shown here.

drivers/staging/rtl8188eu/hal/usb_halinit.c+6−7

This diff is large: its 48 lines aren’t shown here.

drivers/staging/rtl8188eu/include/ieee80211.h+0−10

This diff is large: its 17 lines aren’t shown here.

drivers/staging/rtl8188eu/include/osdep_service.h+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtl8188e_recv.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtl8188e_xmit.h+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtw_mlme.h+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtw_mlme_ext.h+1−4

This diff is large: its 19 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtw_recv.h+2−0

This diff is large: its 10 lines aren’t shown here.

drivers/staging/rtl8188eu/include/rtw_security.h+2−60

This diff is large: its 76 lines aren’t shown here.

drivers/staging/rtl8188eu/include/wifi.h+2−32

This diff is large: its 52 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/ioctl_linux.c+163−166

This diff is large: its 1018 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/os_intfs.c+23−23

This diff is large: its 181 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/rtw_android.c+5−5

This diff is large: its 45 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/usb_intf.c+27−25

This diff is large: its 158 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/usb_ops_linux.c+4−4

This diff is large: its 25 lines aren’t shown here.

drivers/staging/rtl8188eu/os_dep/xmit_linux.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8192e/Kconfig+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/staging/rtl8192e/rtl8192e/rtl_core.c+13−14

This diff is large: its 62 lines aren’t shown here.

drivers/staging/rtl8192e/rtllib_softmac.c+3−3

This diff is large: its 21 lines aren’t shown here.

drivers/staging/rtl8192e/rtllib_tx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8192u/ieee80211/ieee80211_rx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8192u/ieee80211/ieee80211_softmac.c+3−3

This diff is large: its 21 lines aren’t shown here.

drivers/staging/rtl8192u/r8192U_core.c+4−5

This diff is large: its 31 lines aren’t shown here.

drivers/staging/rtl8192u/r8192U_dm.c+1−11

This diff is large: its 96 lines aren’t shown here.

drivers/staging/rtl8192u/r8192U_hw.h+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/staging/rtl8192u/r8192U_wx.c+6−35

This diff is large: its 220 lines aren’t shown here.

drivers/staging/rtl8192u/r819xU_cmdpkt.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/staging/rtl8192u/r819xU_firmware.c+0−6

This diff is large: its 44 lines aren’t shown here.

drivers/staging/rtl8192u/r819xU_firmware_img.h+0−3

This diff is large: its 15 lines aren’t shown here.

drivers/staging/rtl8192u/r819xU_phy.c+1−29

This diff is large: its 218 lines aren’t shown here.

drivers/staging/rtl8192u/r819xU_phyreg.h+0−3

This diff is large: its 24 lines aren’t shown here.

drivers/staging/rtl8712/rtl8712_recv.c+11−8

This diff is large: its 51 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_cmd.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_io.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_ioctl_linux.c+8−8

This diff is large: its 68 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_mlme.c+5−6

This diff is large: its 46 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_mp_ioctl.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_recv.c+10−10

This diff is large: its 90 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_security.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_sta_mgt.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_xmit.c+16−18

This diff is large: its 127 lines aren’t shown here.

drivers/staging/rtl8712/rtl871x_xmit.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8712/usb_intf.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8712/usb_ops_linux.c+3−2

This diff is large: its 14 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_ap.c+3−2

This diff is large: its 23 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_cmd.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_ieee80211.c+6−5

This diff is large: its 46 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_mlme.c+2−14

This diff is large: its 49 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_mlme_ext.c+4−3

This diff is large: its 35 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_recv.c+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_security.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_wlan_util.c+12−62

This diff is large: its 105 lines aren’t shown here.

drivers/staging/rtl8723bs/core/rtw_xmit.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8723bs/hal/rtl8723bs_recv.c+5−6

This diff is large: its 40 lines aren’t shown here.

drivers/staging/rtl8723bs/hal/sdio_ops.c+5−6

This diff is large: its 46 lines aren’t shown here.

drivers/staging/rtl8723bs/include/osdep_service.h+0−87

This diff is large: its 101 lines aren’t shown here.

drivers/staging/rtl8723bs/include/osdep_service_linux.h+6−8

This diff is large: its 35 lines aren’t shown here.

drivers/staging/rtl8723bs/include/rtw_mlme_ext.h+0−2

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8723bs/os_dep/ioctl_cfg80211.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/rtl8723bs/os_dep/recv_linux.c+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/staging/rtl8723bs/os_dep/sdio_intf.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/rtl8723bs/os_dep/sdio_ops_linux.c+23−19

This diff is large: its 118 lines aren’t shown here.

drivers/staging/rts5208/rtsx_transport.c+12−12

This diff is large: its 66 lines aren’t shown here.

drivers/staging/sm750fb/sm750.c+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/staging/vc04_services/bcm2835-audio/bcm2835-vchiq.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/vc04_services/include/linux/raspberrypi/vchiq.h+9−2

This diff is large: its 25 lines aren’t shown here.

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c+14−10

This diff is large: its 82 lines aren’t shown here.

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c+598−659

This diff is large: its 1553 lines aren’t shown here.

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.c+14−11

This diff is large: its 89 lines aren’t shown here.

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_core.h+7−7

This diff is large: its 43 lines aren’t shown here.

drivers/staging/vc04_services/interface/vchiq_arm/vchiq_ioctl.h+20−9

This diff is large: its 68 lines aren’t shown here.

drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/vt6655/device_main.c+3−3

This diff is large: its 24 lines aren’t shown here.

drivers/staging/vt6655/mac.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/vt6655/rxtx.c+12−12

This diff is large: its 65 lines aren’t shown here.

drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/silabs,wfx.yaml+125−0

This diff is large: its 126 lines aren’t shown here.

drivers/staging/wfx/Documentation/devicetree/bindings/net/wireless/siliabs,wfx.txt+0−98

This diff is large: its 99 lines aren’t shown here.

drivers/staging/wfx/TODO+0−19

This diff is large: its 26 lines aren’t shown here.

drivers/staging/wfx/bh.c+27−48

This diff is large: its 129 lines aren’t shown here.

drivers/staging/wfx/bh.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/bus.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/bus_sdio.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/bus_spi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/data_rx.c+7−4

This diff is large: its 41 lines aren’t shown here.

drivers/staging/wfx/data_rx.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/data_tx.c+33−41

This diff is large: its 173 lines aren’t shown here.

drivers/staging/wfx/data_tx.h+2−3

This diff is large: its 19 lines aren’t shown here.

drivers/staging/wfx/debug.c+5−22

This diff is large: its 69 lines aren’t shown here.

drivers/staging/wfx/fwio.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/wfx/hif_api_cmd.h+81−175

This diff is large: its 476 lines aren’t shown here.

drivers/staging/wfx/hif_api_general.h+17−114

This diff is large: its 190 lines aren’t shown here.

drivers/staging/wfx/hif_api_mib.h+3−47

This diff is large: its 78 lines aren’t shown here.

drivers/staging/wfx/hif_rx.c+41−50

This diff is large: its 217 lines aren’t shown here.

drivers/staging/wfx/hif_tx.c+22−94

This diff is large: its 252 lines aren’t shown here.

drivers/staging/wfx/hif_tx.h+3−9

This diff is large: its 35 lines aren’t shown here.

drivers/staging/wfx/hif_tx_mib.c+31−93

This diff is large: its 217 lines aren’t shown here.

drivers/staging/wfx/hif_tx_mib.h+3−10

This diff is large: its 29 lines aren’t shown here.

drivers/staging/wfx/hwio.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/hwio.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/key.c+6−6

This diff is large: its 38 lines aren’t shown here.

drivers/staging/wfx/key.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/main.c+16−17

This diff is large: its 116 lines aren’t shown here.

drivers/staging/wfx/main.h+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/staging/wfx/queue.c+13−3

This diff is large: its 49 lines aren’t shown here.

drivers/staging/wfx/queue.h+2−1

This diff is large: its 17 lines aren’t shown here.

drivers/staging/wfx/scan.c+1−5

This diff is large: its 20 lines aren’t shown here.

drivers/staging/wfx/scan.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/secure_link.h+0−59

This diff is large: its 60 lines aren’t shown here.

drivers/staging/wfx/sta.c+154−194

This diff is large: its 508 lines aren’t shown here.

drivers/staging/wfx/sta.h+1−3

This diff is large: its 18 lines aren’t shown here.

drivers/staging/wfx/traces.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wfx/wfx.h+1−6

This diff is large: its 35 lines aren’t shown here.

drivers/staging/wlan-ng/hfa384x_usb.c+8−10

This diff is large: its 49 lines aren’t shown here.

drivers/staging/wlan-ng/p80211netdev.c+5−6

This diff is large: its 30 lines aren’t shown here.

drivers/staging/wlan-ng/prism2mgmt.c+12−12

This diff is large: its 66 lines aren’t shown here.

drivers/staging/wlan-ng/prism2mib.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/staging/wlan-ng/prism2sta.c+2−2

This diff is large: its 18 lines aren’t shown here.

include/linux/iio/buffer-dmaengine.h+0−4

This diff is large: its 11 lines aren’t shown here.

include/linux/iio/common/cros_ec_sensors_core.h+2−2

This diff is large: its 17 lines aren’t shown here.

include/linux/iio/iio.h+2−1

This diff is large: its 11 lines aren’t shown here.

include/linux/iio/imu/adis.h+9−44

This diff is large: its 106 lines aren’t shown here.

include/linux/iio/trigger_consumer.h+1−1

This diff is large: its 9 lines aren’t shown here.

include/linux/iio/types.h+1−0

This diff is large: its 8 lines aren’t shown here.

include/linux/mfd/hi6421-spmi-pmic.h+53−0

This diff is large: its 54 lines aren’t shown here.

include/linux/platform_data/ad7291.h+0−13

This diff is large: its 14 lines aren’t shown here.

include/linux/platform_data/ad7793.h+1−1

This diff is large: its 9 lines aren’t shown here.

include/uapi/linux/iio/types.h+1−0

This diff is large: its 8 lines aren’t shown here.

tools/iio/iio_event_monitor.c+2−0

This diff is large: its 16 lines aren’t shown here.

Merge tag 'staging-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Keyboard shortcuts

General

Issues and pull requests

Issues, pull requests and Inbox

Repository code

@@ -206,12 +206,12 @@ static const struct iio_chan_spec_ext_info ad5686_ext_info[] = { · 205 unmodified lines
206	}	206	}
207		207
208	#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \	208	#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
209	static struct iio_chan_spec name[] = { \	209	static const struct iio_chan_spec name[] = { \
210	AD5868_CHANNEL(0, 0, bits, _shift), \	210	AD5868_CHANNEL(0, 0, bits, _shift), \
211	}	211	}
212		212
213	#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \	213	#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
214	static struct iio_chan_spec name[] = { \	214	static const struct iio_chan_spec name[] = { \
215	AD5868_CHANNEL(0, 1, bits, _shift), \	215	AD5868_CHANNEL(0, 1, bits, _shift), \
216	AD5868_CHANNEL(1, 2, bits, _shift), \	216	AD5868_CHANNEL(1, 2, bits, _shift), \
217	AD5868_CHANNEL(2, 4, bits, _shift), \	217	AD5868_CHANNEL(2, 4, bits, _shift), \
@@ -219,7 +219,7 @@ static struct iio_chan_spec name[] = { \ · 1 unmodified line
219	}	219	}
220		220
221	#define DECLARE_AD5676_CHANNELS(name, bits, _shift) \	221	#define DECLARE_AD5676_CHANNELS(name, bits, _shift) \
222	static struct iio_chan_spec name[] = { \	222	static const struct iio_chan_spec name[] = { \
223	AD5868_CHANNEL(0, 0, bits, _shift), \	223	AD5868_CHANNEL(0, 0, bits, _shift), \
224	AD5868_CHANNEL(1, 1, bits, _shift), \	224	AD5868_CHANNEL(1, 1, bits, _shift), \
225	AD5868_CHANNEL(2, 2, bits, _shift), \	225	AD5868_CHANNEL(2, 2, bits, _shift), \
@@ -231,7 +231,7 @@ static struct iio_chan_spec name[] = { \ · 5 unmodified lines
231	}	231	}
232		232
233	#define DECLARE_AD5679_CHANNELS(name, bits, _shift) \	233	#define DECLARE_AD5679_CHANNELS(name, bits, _shift) \
234	static struct iio_chan_spec name[] = { \	234	static const struct iio_chan_spec name[] = { \
235	AD5868_CHANNEL(0, 0, bits, _shift), \	235	AD5868_CHANNEL(0, 0, bits, _shift), \
236	AD5868_CHANNEL(1, 1, bits, _shift), \	236	AD5868_CHANNEL(1, 1, bits, _shift), \
237	AD5868_CHANNEL(2, 2, bits, _shift), \	237	AD5868_CHANNEL(2, 2, bits, _shift), \

@@ -422,7 +422,7 @@ static void update_bmc_sta(struct adapter *padapter) · 421 unmodified lines
422	int i, supportRateNum = 0;	422	int i, supportRateNum = 0;
423	unsigned int tx_ra_bitmap = 0;	423	unsigned int tx_ra_bitmap = 0;
424	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	424	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
425	struct wlan_bssid_ex pcur_network = (struct wlan_bssid_ex )&pmlmepriv->cur_network.network;	425	struct wlan_bssid_ex *pcur_network = &pmlmepriv->cur_network.network;
426	struct sta_info *psta = rtw_get_bcmc_stainfo(padapter);	426	struct sta_info *psta = rtw_get_bcmc_stainfo(padapter);
427		427
428	if (psta) {	428	if (psta) {
@@ -599,7 +599,7 @@ static void start_bss_network(struct adapter padapter, u8 pbuf) · 170 unmodified lines
599	struct registry_priv *pregpriv = &padapter->registrypriv;	599	struct registry_priv *pregpriv = &padapter->registrypriv;
600	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	600	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
601	struct security_priv *psecuritypriv = &padapter->securitypriv;	601	struct security_priv *psecuritypriv = &padapter->securitypriv;
602	struct wlan_bssid_ex pnetwork = (struct wlan_bssid_ex )&pmlmepriv->cur_network.network;	602	struct wlan_bssid_ex *pnetwork = &pmlmepriv->cur_network.network;
603	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;	603	struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv;
604	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;	604	struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info;
605	struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;	605	struct wlan_bssid_ex *pnetwork_mlmeext = &pmlmeinfo->network;
@@ -711,7 +711,7 @@ static void start_bss_network(struct adapter padapter, u8 pbuf) · 105 unmodified lines
711	update_wireless_mode(padapter);	711	update_wireless_mode(padapter);
712		712
713	/* update capability after cur_wireless_mode updated */	713	/* update capability after cur_wireless_mode updated */
714	update_capinfo(padapter, rtw_get_capability((struct wlan_bssid_ex *)pnetwork));	714	update_capinfo(padapter, rtw_get_capability(pnetwork));
715		715
716	/* let pnetwork_mlmeext == pnetwork_mlme. */	716	/* let pnetwork_mlmeext == pnetwork_mlme. */
717	memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);	717	memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length);
@@ -745,7 +745,7 @@ int rtw_check_beacon_data(struct adapter padapter, u8 pbuf, int len) · 27 unmodified lines
745	struct registry_priv *pregistrypriv = &padapter->registrypriv;	745	struct registry_priv *pregistrypriv = &padapter->registrypriv;
746	struct security_priv *psecuritypriv = &padapter->securitypriv;	746	struct security_priv *psecuritypriv = &padapter->securitypriv;
747	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;	747	struct mlme_priv *pmlmepriv = &padapter->mlmepriv;
748	struct wlan_bssid_ex pbss_network = (struct wlan_bssid_ex )&pmlmepriv->cur_network.network;	748	struct wlan_bssid_ex *pbss_network = &pmlmepriv->cur_network.network;
749	u8 *ie = pbss_network->ies;	749	u8 *ie = pbss_network->ies;
750		750
751	/* SSID */	751	/* SSID */
@@ -982,7 +982,7 @@ int rtw_check_beacon_data(struct adapter padapter, u8 pbuf, int len) · 230 unmodified lines
982	HT_info_handler(padapter, (struct ndis_802_11_var_ie *)pHT_info_ie);	982	HT_info_handler(padapter, (struct ndis_802_11_var_ie *)pHT_info_ie);
983	}	983	}
984		984
985	pbss_network->Length = get_wlan_bssid_ex_sz((struct wlan_bssid_ex *)pbss_network);	985	pbss_network->Length = get_wlan_bssid_ex_sz(pbss_network);
986		986
987	/* issue beacon to start bss network */	987	/* issue beacon to start bss network */
988	start_bss_network(padapter, (u8 *)pbss_network);	988	start_bss_network(padapter, (u8 *)pbss_network);