Use the former pad element to store the IP versions from the IP discovery table. This allows userspace to get the IP version from the kernel to better align with hardware IP versions. Proposed mesa patch: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075
Unified · Split
| @@ -461,6 +461,30 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev, · 460 unmodified lines | |||
| 461 | 461 | ||
| 462 | result->hw_ip_version_major = adev->ip_blocks[i].version->major; | 462 | result->hw_ip_version_major = adev->ip_blocks[i].version->major; |
| 463 | result->hw_ip_version_minor = adev->ip_blocks[i].version->minor; | 463 | result->hw_ip_version_minor = adev->ip_blocks[i].version->minor; |
| 464 | |||
| 465 | if (adev->asic_type >= CHIP_VEGA10) { | ||
| 466 | switch (type) { | ||
| 467 | case AMD_IP_BLOCK_TYPE_GFX: | ||
| 468 | result->ip_discovery_version = adev->ip_versions[GC_HWIP][0]; | ||
| 469 | break; | ||
| 470 | case AMD_IP_BLOCK_TYPE_SDMA: | ||
| 471 | result->ip_discovery_version = adev->ip_versions[SDMA0_HWIP][0]; | ||
| 472 | break; | ||
| 473 | case AMD_IP_BLOCK_TYPE_UVD: | ||
| 474 | case AMD_IP_BLOCK_TYPE_VCN: | ||
| 475 | case AMD_IP_BLOCK_TYPE_JPEG: | ||
| 476 | result->ip_discovery_version = adev->ip_versions[UVD_HWIP][0]; | ||
| 477 | break; | ||
| 478 | case AMD_IP_BLOCK_TYPE_VCE: | ||
| 479 | result->ip_discovery_version = adev->ip_versions[VCE_HWIP][0]; | ||
| 480 | break; | ||
| 481 | default: | ||
| 482 | result->ip_discovery_version = 0; | ||
| 483 | break; | ||
| 484 | } | ||
| 485 | } else { | ||
| 486 | result->ip_discovery_version = 0; | ||
| 487 | } | ||
| 464 | result->capabilities_flags = 0; | 488 | result->capabilities_flags = 0; |
| 465 | result->available_rings = (1 << num_rings) - 1; | 489 | result->available_rings = (1 << num_rings) - 1; |
| 466 | result->ib_start_alignment = ib_start_alignment; | 490 | result->ib_start_alignment = ib_start_alignment; |
| @@ -1097,7 +1097,8 @@ struct drm_amdgpu_info_hw_ip { · 1096 unmodified lines | |||
| 1097 | __u32 ib_size_alignment; | 1097 | __u32 ib_size_alignment; |
| 1098 | /** Bitmask of available rings. Bit 0 means ring 0, etc. */ | 1098 | /** Bitmask of available rings. Bit 0 means ring 0, etc. */ |
| 1099 | __u32 available_rings; | 1099 | __u32 available_rings; |
| 1100 | __u32 _pad; | 1100 | /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */ |
| 1101 | __u32 ip_discovery_version; | ||
| 1101 | }; | 1102 | }; |
| 1102 | 1103 | ||
| 1103 | struct drm_amdgpu_info_num_handles { | 1104 | struct drm_amdgpu_info_num_handles { |