lael-labs/linux

.mailmap+2−0

 Linas Vepstas <linas@austin.ibm.com>
 Mark Brown <broonie@sirena.org.uk>
 Matthieu CASTET <castet.matthieu@free.fr>
+Mauro Carvalho Chehab <mchehab@kernel.org> <maurochehab@gmail.com> <mchehab@infradead.org> <mchehab@redhat.com> <m.chehab@samsung.com> <mchehab@osg.samsung.com> <mchehab@s-opensource.com>
 Mayuresh Janorkar <mayur@ti.com>
 Michael Buesch <m@bues.ch>
 Michel Dänzer <michel@tungstengraphics.com>
 Sascha Hauer <s.hauer@pengutronix.de>
 S.Çağlar Onur <caglar@pardus.org.tr>
 Shiraz Hashim <shiraz.linux.kernel@gmail.com> <shiraz.hashim@st.com>
+Shuah Khan <shuah@kernel.org> <shuahkhan@gmail.com> <shuah.khan@hp.com> <shuahkh@osg.samsung.com> <shuah.kh@samsung.com>
 Simon Kelley <simon@thekelleys.org.uk>
 Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
 Stephen Hemminger <shemminger@osdl.org>

CREDITS+1−0

@@ -649,6 +649,7 @@ D: Configure, Menuconfig, xconfig · 648 unmodified lines
649		649
650	N: Mauro Carvalho Chehab	650	N: Mauro Carvalho Chehab
651	E: m.chehab@samsung.org	651	E: m.chehab@samsung.org
		652	E: mchehab@osg.samsung.com
652	E: mchehab@infradead.org	653	E: mchehab@infradead.org
653	D: Media subsystem (V4L/DVB) drivers and core	654	D: Media subsystem (V4L/DVB) drivers and core
654	D: EDAC drivers and EDAC 3.0 core rework	655	D: EDAC drivers and EDAC 3.0 core rework

Documentation/ABI/testing/configfs-usb-gadget-uvc+29−29

@@ -1,6 +1,6 @@
1	What: /config/usb-gadget/gadget/functions/uvc.name	1	What: /config/usb-gadget/gadget/functions/uvc.name
2	Date: Dec 2014	2	Date: Dec 2014
3	KernelVersion: 3.20	3	KernelVersion: 4.0
4	Description: UVC function directory	4	Description: UVC function directory
5		5
6	streaming_maxburst - 0..15 (ss only)	6	streaming_maxburst - 0..15 (ss only)
@@ -9,37 +9,37 @@ Description: UVC function directory · 2 unmodified lines
9		9
10	What: /config/usb-gadget/gadget/functions/uvc.name/control	10	What: /config/usb-gadget/gadget/functions/uvc.name/control
11	Date: Dec 2014	11	Date: Dec 2014
12	KernelVersion: 3.20	12	KernelVersion: 4.0
13	Description: Control descriptors	13	Description: Control descriptors
14		14
15	What: /config/usb-gadget/gadget/functions/uvc.name/control/class	15	What: /config/usb-gadget/gadget/functions/uvc.name/control/class
16	Date: Dec 2014	16	Date: Dec 2014
17	KernelVersion: 3.20	17	KernelVersion: 4.0
18	Description: Class descriptors	18	Description: Class descriptors
19		19
20	What: /config/usb-gadget/gadget/functions/uvc.name/control/class/ss	20	What: /config/usb-gadget/gadget/functions/uvc.name/control/class/ss
21	Date: Dec 2014	21	Date: Dec 2014
22	KernelVersion: 3.20	22	KernelVersion: 4.0
23	Description: Super speed control class descriptors	23	Description: Super speed control class descriptors
24		24
25	What: /config/usb-gadget/gadget/functions/uvc.name/control/class/fs	25	What: /config/usb-gadget/gadget/functions/uvc.name/control/class/fs
26	Date: Dec 2014	26	Date: Dec 2014
27	KernelVersion: 3.20	27	KernelVersion: 4.0
28	Description: Full speed control class descriptors	28	Description: Full speed control class descriptors
29		29
30	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal	30	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal
31	Date: Dec 2014	31	Date: Dec 2014
32	KernelVersion: 3.20	32	KernelVersion: 4.0
33	Description: Terminal descriptors	33	Description: Terminal descriptors
34		34
35	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output	35	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output
36	Date: Dec 2014	36	Date: Dec 2014
37	KernelVersion: 3.20	37	KernelVersion: 4.0
38	Description: Output terminal descriptors	38	Description: Output terminal descriptors
39		39
40	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output/default	40	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/output/default
41	Date: Dec 2014	41	Date: Dec 2014
42	KernelVersion: 3.20	42	KernelVersion: 4.0
43	Description: Default output terminal descriptors	43	Description: Default output terminal descriptors
44		44
45	All attributes read only:	45	All attributes read only:
@@ -53,12 +53,12 @@ Description: Default output terminal descriptors · 7 unmodified lines
53		53
54	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera	54	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera
55	Date: Dec 2014	55	Date: Dec 2014
56	KernelVersion: 3.20	56	KernelVersion: 4.0
57	Description: Camera terminal descriptors	57	Description: Camera terminal descriptors
58		58
59	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera/default	59	What: /config/usb-gadget/gadget/functions/uvc.name/control/terminal/camera/default
60	Date: Dec 2014	60	Date: Dec 2014
61	KernelVersion: 3.20	61	KernelVersion: 4.0
62	Description: Default camera terminal descriptors	62	Description: Default camera terminal descriptors
63		63
64	All attributes read only:	64	All attributes read only:
@@ -75,12 +75,12 @@ Description: Default camera terminal descriptors · 10 unmodified lines
75		75
76	What: /config/usb-gadget/gadget/functions/uvc.name/control/processing	76	What: /config/usb-gadget/gadget/functions/uvc.name/control/processing
77	Date: Dec 2014	77	Date: Dec 2014
78	KernelVersion: 3.20	78	KernelVersion: 4.0
79	Description: Processing unit descriptors	79	Description: Processing unit descriptors
80		80
81	What: /config/usb-gadget/gadget/functions/uvc.name/control/processing/default	81	What: /config/usb-gadget/gadget/functions/uvc.name/control/processing/default
82	Date: Dec 2014	82	Date: Dec 2014
83	KernelVersion: 3.20	83	KernelVersion: 4.0
84	Description: Default processing unit descriptors	84	Description: Default processing unit descriptors
85		85
86	All attributes read only:	86	All attributes read only:
@@ -94,49 +94,49 @@ Description: Default processing unit descriptors · 7 unmodified lines
94		94
95	What: /config/usb-gadget/gadget/functions/uvc.name/control/header	95	What: /config/usb-gadget/gadget/functions/uvc.name/control/header
96	Date: Dec 2014	96	Date: Dec 2014
97	KernelVersion: 3.20	97	KernelVersion: 4.0
98	Description: Control header descriptors	98	Description: Control header descriptors
99		99
100	What: /config/usb-gadget/gadget/functions/uvc.name/control/header/name	100	What: /config/usb-gadget/gadget/functions/uvc.name/control/header/name
101	Date: Dec 2014	101	Date: Dec 2014
102	KernelVersion: 3.20	102	KernelVersion: 4.0
103	Description: Specific control header descriptors	103	Description: Specific control header descriptors
104		104
105	dwClockFrequency	105	dwClockFrequency
106	bcdUVC	106	bcdUVC
107	What: /config/usb-gadget/gadget/functions/uvc.name/streaming	107	What: /config/usb-gadget/gadget/functions/uvc.name/streaming
108	Date: Dec 2014	108	Date: Dec 2014
109	KernelVersion: 3.20	109	KernelVersion: 4.0
110	Description: Streaming descriptors	110	Description: Streaming descriptors
111		111
112	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class	112	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class
113	Date: Dec 2014	113	Date: Dec 2014
114	KernelVersion: 3.20	114	KernelVersion: 4.0
115	Description: Streaming class descriptors	115	Description: Streaming class descriptors
116		116
117	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/ss	117	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/ss
118	Date: Dec 2014	118	Date: Dec 2014
119	KernelVersion: 3.20	119	KernelVersion: 4.0
120	Description: Super speed streaming class descriptors	120	Description: Super speed streaming class descriptors
121		121
122	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/hs	122	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/hs
123	Date: Dec 2014	123	Date: Dec 2014
124	KernelVersion: 3.20	124	KernelVersion: 4.0
125	Description: High speed streaming class descriptors	125	Description: High speed streaming class descriptors
126		126
127	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/fs	127	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/class/fs
128	Date: Dec 2014	128	Date: Dec 2014
129	KernelVersion: 3.20	129	KernelVersion: 4.0
130	Description: Full speed streaming class descriptors	130	Description: Full speed streaming class descriptors
131		131
132	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching	132	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching
133	Date: Dec 2014	133	Date: Dec 2014
134	KernelVersion: 3.20	134	KernelVersion: 4.0
135	Description: Color matching descriptors	135	Description: Color matching descriptors
136		136
137	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching/default	137	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/color_matching/default
138	Date: Dec 2014	138	Date: Dec 2014
139	KernelVersion: 3.20	139	KernelVersion: 4.0
140	Description: Default color matching descriptors	140	Description: Default color matching descriptors
141		141
142	All attributes read only:	142	All attributes read only:
@@ -150,12 +150,12 @@ Description: Default color matching descriptors · 7 unmodified lines
150		150
151	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg	151	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg
152	Date: Dec 2014	152	Date: Dec 2014
153	KernelVersion: 3.20	153	KernelVersion: 4.0
154	Description: MJPEG format descriptors	154	Description: MJPEG format descriptors
155		155
156	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name	156	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name
157	Date: Dec 2014	157	Date: Dec 2014
158	KernelVersion: 3.20	158	KernelVersion: 4.0
159	Description: Specific MJPEG format descriptors	159	Description: Specific MJPEG format descriptors
160		160
161	All attributes read only,	161	All attributes read only,
@@ -174,7 +174,7 @@ Description: Specific MJPEG format descriptors · 12 unmodified lines
174		174
175	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name/name	175	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/mjpeg/name/name
176	Date: Dec 2014	176	Date: Dec 2014
177	KernelVersion: 3.20	177	KernelVersion: 4.0
178	Description: Specific MJPEG frame descriptors	178	Description: Specific MJPEG frame descriptors
179		179
180	dwFrameInterval - indicates how frame interval can be	180	dwFrameInterval - indicates how frame interval can be
@@ -196,12 +196,12 @@ Description: Specific MJPEG frame descriptors · 15 unmodified lines
196		196
197	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed	197	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed
198	Date: Dec 2014	198	Date: Dec 2014
199	KernelVersion: 3.20	199	KernelVersion: 4.0
200	Description: Uncompressed format descriptors	200	Description: Uncompressed format descriptors
201		201
202	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name	202	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name
203	Date: Dec 2014	203	Date: Dec 2014
204	KernelVersion: 3.20	204	KernelVersion: 4.0
205	Description: Specific uncompressed format descriptors	205	Description: Specific uncompressed format descriptors
206		206
207	bmaControls - this format's data for bmaControls in	207	bmaControls - this format's data for bmaControls in
@@ -221,7 +221,7 @@ Description: Specific uncompressed format descriptors · 13 unmodified lines
221		221
222	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name/name	222	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/uncompressed/name/name
223	Date: Dec 2014	223	Date: Dec 2014
224	KernelVersion: 3.20	224	KernelVersion: 4.0
225	Description: Specific uncompressed frame descriptors	225	Description: Specific uncompressed frame descriptors
226		226
227	dwFrameInterval - indicates how frame interval can be	227	dwFrameInterval - indicates how frame interval can be
@@ -243,12 +243,12 @@ Description: Specific uncompressed frame descriptors · 15 unmodified lines
243		243
244	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header	244	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header
245	Date: Dec 2014	245	Date: Dec 2014
246	KernelVersion: 3.20	246	KernelVersion: 4.0
247	Description: Streaming header descriptors	247	Description: Streaming header descriptors
248		248
249	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header/name	249	What: /config/usb-gadget/gadget/functions/uvc.name/streaming/header/name
250	Date: Dec 2014	250	Date: Dec 2014
251	KernelVersion: 3.20	251	KernelVersion: 4.0
252	Description: Specific streaming header descriptors	252	Description: Specific streaming header descriptors
253		253
254	All attributes read only:	254	All attributes read only:

Documentation/ABI/testing/sysfs-bus-iio-proximity-as3935+1−1

@@ -1,4 +1,4 @@
1	What /sys/bus/iio/devices/iio:deviceX/in_proximity_raw	1	What /sys/bus/iio/devices/iio:deviceX/in_proximity_input
2	Date: March 2014	2	Date: March 2014
3	KernelVersion: 3.15	3	KernelVersion: 3.15
4	Contact: Matt Ranostay <mranostay@gmail.com>	4	Contact: Matt Ranostay <mranostay@gmail.com>

Documentation/devicetree/bindings/hwmon/ina2xx.txt+1−0

@@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines
7	- "ti,ina220" for ina220	7	- "ti,ina220" for ina220
8	- "ti,ina226" for ina226	8	- "ti,ina226" for ina226
9	- "ti,ina230" for ina230	9	- "ti,ina230" for ina230
		10	- "ti,ina231" for ina231
10	- reg: I2C address	11	- reg: I2C address
11		12
12	Optional properties:	13	Optional properties:

Documentation/devicetree/bindings/i2c/i2c-arb-gpio-challenge.txt+2−2

@@ -44,8 +44,8 @@ Required properties: · 43 unmodified lines
44	- our-claim-gpio: The GPIO that we use to claim the bus.	44	- our-claim-gpio: The GPIO that we use to claim the bus.
45	- their-claim-gpios: The GPIOs that the other sides use to claim the bus.	45	- their-claim-gpios: The GPIOs that the other sides use to claim the bus.
46	Note that some implementations may only support a single other master.	46	Note that some implementations may only support a single other master.
47	- Standard I2C mux properties. See mux.txt in this directory.	47	- Standard I2C mux properties. See i2c-mux.txt in this directory.
48	- Single I2C child bus node at reg 0. See mux.txt in this directory.	48	- Single I2C child bus node at reg 0. See i2c-mux.txt in this directory.
49		49
50	Optional properties:	50	Optional properties:
51	- slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.	51	- slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.

Documentation/devicetree/bindings/i2c/i2c-demux-pinctrl.txt+2−1

@@ -27,7 +27,8 @@ Required properties: · 26 unmodified lines
27	- i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C	27	- i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C
28	parents.	28	parents.
29		29
30	Furthermore, I2C mux properties and child nodes. See mux.txt in this directory.	30	Furthermore, I2C mux properties and child nodes. See i2c-mux.txt in this
		31	directory.
31		32
32	Example:	33	Example:
33		34

Documentation/devicetree/bindings/i2c/i2c-mux-gpio.txt+3−3

@@ -22,8 +22,8 @@ Required properties: · 21 unmodified lines
22	- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side	22	- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
23	port is connected to.	23	port is connected to.
24	- mux-gpios: list of gpios used to control the muxer	24	- mux-gpios: list of gpios used to control the muxer
25	* Standard I2C mux properties. See mux.txt in this directory.	25	* Standard I2C mux properties. See i2c-mux.txt in this directory.
26	* I2C child bus nodes. See mux.txt in this directory.	26	* I2C child bus nodes. See i2c-mux.txt in this directory.
27		27
28	Optional properties:	28	Optional properties:
29	- idle-state: value to set the muxer to when idle. When no value is	29	- idle-state: value to set the muxer to when idle. When no value is
@@ -33,7 +33,7 @@ For each i2c child node, an I2C child bus will be created. They will · 3 unmodified lines
33	be numbered based on their order in the device tree.	33	be numbered based on their order in the device tree.
34		34
35	Whenever an access is made to a device on a child bus, the value set	35	Whenever an access is made to a device on a child bus, the value set
36	in the revelant node's reg property will be output using the list of	36	in the relevant node's reg property will be output using the list of
37	GPIOs, the first in the list holding the least-significant value.	37	GPIOs, the first in the list holding the least-significant value.
38		38
39	If an idle state is defined, using the idle-state (optional) property,	39	If an idle state is defined, using the idle-state (optional) property,

Documentation/devicetree/bindings/i2c/i2c-mux-pinctrl.txt+2−2

@@ -28,9 +28,9 @@ Also required are: · 27 unmodified lines
28	* Standard pinctrl properties that specify the pin mux state for each child	28	* Standard pinctrl properties that specify the pin mux state for each child
29	bus. See ../pinctrl/pinctrl-bindings.txt.	29	bus. See ../pinctrl/pinctrl-bindings.txt.
30		30
31	* Standard I2C mux properties. See mux.txt in this directory.	31	* Standard I2C mux properties. See i2c-mux.txt in this directory.
32		32
33	* I2C child bus nodes. See mux.txt in this directory.	33	* I2C child bus nodes. See i2c-mux.txt in this directory.
34		34
35	For each named state defined in the pinctrl-names property, an I2C child bus	35	For each named state defined in the pinctrl-names property, an I2C child bus
36	will be created. I2C child bus numbers are assigned based on the index into	36	will be created. I2C child bus numbers are assigned based on the index into

Documentation/devicetree/bindings/i2c/i2c-mux-reg.txt+3−3

@@ -7,8 +7,8 @@ Required properties: · 6 unmodified lines
7	- compatible: i2c-mux-reg	7	- compatible: i2c-mux-reg
8	- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side	8	- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
9	port is connected to.	9	port is connected to.
10	* Standard I2C mux properties. See mux.txt in this directory.	10	* Standard I2C mux properties. See i2c-mux.txt in this directory.
11	* I2C child bus nodes. See mux.txt in this directory.	11	* I2C child bus nodes. See i2c-mux.txt in this directory.
12		12
13	Optional properties:	13	Optional properties:
14	- reg: this pair of <offset size> specifies the register to control the mux.	14	- reg: this pair of <offset size> specifies the register to control the mux.
@@ -24,7 +24,7 @@ Optional properties: · 9 unmodified lines
24	given, it defaults to the last value used.	24	given, it defaults to the last value used.
25		25
26	Whenever an access is made to a device on a child bus, the value set	26	Whenever an access is made to a device on a child bus, the value set
27	in the revelant node's reg property will be output to the register.	27	in the relevant node's reg property will be output to the register.
28		28
29	If an idle state is defined, using the idle-state (optional) property,	29	If an idle state is defined, using the idle-state (optional) property,
30	whenever an access is not being made to a device on a child bus, the	30	whenever an access is not being made to a device on a child bus, the

Documentation/devicetree/bindings/net/marvell-bt-sd8xxx.txt+4−4

Documentation/devicetree/bindings/vendor-prefixes.txt+2−0

@@ -255,6 +255,7 @@ synology Synology, Inc. · 254 unmodified lines
255	SUNW Sun Microsystems, Inc	255	SUNW Sun Microsystems, Inc
256	tbs TBS Technologies	256	tbs TBS Technologies
257	tcl Toby Churchill Ltd.	257	tcl Toby Churchill Ltd.
		258	technexion TechNexion
258	technologic Technologic Systems	259	technologic Technologic Systems
259	thine THine Electronics, Inc.	260	thine THine Electronics, Inc.
260	ti Texas Instruments	261	ti Texas Instruments
@@ -269,6 +270,7 @@ tronsmart Tronsmart · 8 unmodified lines
269	truly Truly Semiconductors Limited	270	truly Truly Semiconductors Limited
270	tyan Tyan Computer Corporation	271	tyan Tyan Computer Corporation
271	upisemi uPI Semiconductor Corp.	272	upisemi uPI Semiconductor Corp.
		273	uniwest United Western Technologies Corp (UniWest)
272	urt United Radiant Technology Corporation	274	urt United Radiant Technology Corporation
273	usi Universal Scientific Industrial Co., Ltd.	275	usi Universal Scientific Industrial Co., Ltd.
274	v3 V3 Semiconductor	276	v3 V3 Semiconductor

Documentation/leds/leds-class.txt+2−2

@@ -74,8 +74,8 @@ blink_set() function (see <linux/leds.h>). To set an LED to blinking, · 73 unmodified lines
74	however, it is better to use the API function led_blink_set(), as it	74	however, it is better to use the API function led_blink_set(), as it
75	will check and implement software fallback if necessary.	75	will check and implement software fallback if necessary.
76		76
77	To turn off blinking again, use the API function led_brightness_set()	77	To turn off blinking, use the API function led_brightness_set()
78	as that will not just set the LED brightness but also stop any software	78	with brightness value LED_OFF, which should stop any software
79	timers that may have been required for blinking.	79	timers that may have been required for blinking.
80		80
81	The blink_set() function should choose a user friendly blinking value	81	The blink_set() function should choose a user friendly blinking value

MAINTAINERS+45−23

 ARM/FREESCALE IMX / MXC ARM ARCHITECTURE
 M:	Shawn Guo <shawnguo@kernel.org>
 M:	Sascha Hauer <kernel@pengutronix.de>
+R:	Fabio Estevam <fabio.estevam@nxp.com>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
 F:	net/ax25/
 AZ6007 DVB DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 F:	fs/btrfs/
 BTTV VIDEO4LINUX DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 L:	linux-clk@vger.kernel.org
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git
 S:	Maintained
+F:	Documentation/devicetree/bindings/clock/
 F:	drivers/clk/
 X:	drivers/clk/clkdev.c
 F:	include/linux/clk-pr*
 F:	drivers/media/dvb-frontends/cx24120*
 CX88 VIDEO4LINUX DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 S:	Maintained
 F:	drivers/dma/
 F:	include/linux/dmaengine.h
+F:	Documentation/devicetree/bindings/dma/
 F:	Documentation/dmaengine/
 T:	git git://git.infradead.org/users/vkoul/slave-dma.git
 EDAC-CORE
 M:	Doug Thompson <dougthompson@xmission.com>
 M:	Borislav Petkov <bp@alien8.de>
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git for-next
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-edac.git linux_next
 F:	drivers/edac/e7xxx_edac.c
 EDAC-GHES
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 S:	Maintained
 F:	drivers/edac/ghes_edac.c
 F:	drivers/edac/i5000_edac.c
 EDAC-I5400
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 S:	Maintained
 F:	drivers/edac/i5400_edac.c
 EDAC-I7300
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 S:	Maintained
 F:	drivers/edac/i7300_edac.c
 EDAC-I7CORE
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 S:	Maintained
 F:	drivers/edac/i7core_edac.c
 F:	drivers/edac/r82600_edac.c
 EDAC-SBRIDGE
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-edac@vger.kernel.org
 S:	Maintained
 F:	drivers/edac/sb_edac.c
 F:	drivers/net/ethernet/ibm/ehea/
 EM28XX VIDEO4LINUX DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 KERNEL SELFTEST FRAMEWORK
 M:	Shuah Khan <shuahkh@osg.samsung.com>
+M:	Shuah Khan <shuah@kernel.org>
 L:	linux-kselftest@vger.kernel.org
 T:	git git://git.kernel.org/pub/scm/shuah/linux-kselftest
 S:	Maintained
 F:	drivers/media/pci/netup_unidvb/*
 MEDIA INPUT INFRASTRUCTURE (V4L/DVB)
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 P:	LinuxTV.org Project
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git
 S:	Maintained
+F:	Documentation/devicetree/bindings/net/wireless/
 F:	drivers/net/wireless/
 NETXEN (1/10) GbE SUPPORT
 OPEN FIRMWARE AND FLATTENED DEVICE TREE
 M:	Rob Herring <robh+dt@kernel.org>
 M:	Frank Rowand <frowand.list@gmail.com>
-M:	Grant Likely <grant.likely@linaro.org>
 L:	devicetree@vger.kernel.org
 W:	http://www.devicetree.org/
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux.git
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
 S:	Maintained
 F:	drivers/of/
 F:	include/linux/of*.h
 OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
 M:	Rob Herring <robh+dt@kernel.org>
-M:	Pawel Moll <pawel.moll@arm.com>
 M:	Mark Rutland <mark.rutland@arm.com>
-M:	Ian Campbell <ijc+devicetree@hellion.org.uk>
-M:	Kumar Gala <galak@codeaurora.org>
 L:	devicetree@vger.kernel.org
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
+Q:	http://patchwork.ozlabs.org/project/devicetree-bindings/list/
 S:	Maintained
 F:	Documentation/devicetree/
 F:	arch/*/boot/dts/
 F:	drivers/media/i2c/saa6588*
 SAA7134 VIDEO4LINUX DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 F:	drivers/media/radio/si4713/radio-usb-si4713.c
 SIANO DVB DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 F:	drivers/media/i2c/tda9840*
 TEA5761 TUNER DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 F:	drivers/media/tuners/tea5761.*
 TEA5767 TUNER DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 F:	mm/shmem.c
 TM6000 VIDEO4LINUX DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git
 USB OVER IP DRIVER
 M:	Valentina Manea <valentina.manea.m@gmail.com>
-M:	Shuah Khan <shuah.kh@samsung.com>
+M:	Shuah Khan <shuahkh@osg.samsung.com>
+M:	Shuah Khan <shuah@kernel.org>
 L:	linux-usb@vger.kernel.org
 S:	Maintained
 F:	Documentation/usb/usbip_protocol.txt
 W:	http://www.linux-usb.org
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git
 S:	Supported
+F:	Documentation/devicetree/bindings/usb/
 F:	Documentation/usb/
 F:	drivers/usb/
 F:	include/linux/usb.h
 M:	"Michael S. Tsirkin" <mst@redhat.com>
 L:	virtualization@lists.linux-foundation.org
 S:	Maintained
+F:	Documentation/devicetree/bindings/virtio/
 F:	drivers/virtio/
 F:	tools/virtio/
 F:	drivers/net/virtio_net.c
 F:	arch/x86/entry/vdso/
 XC2028/3028 TUNER DRIVER
-M:	Mauro Carvalho Chehab <mchehab@osg.samsung.com>
+M:	Mauro Carvalho Chehab <mchehab@s-opensource.com>
+M:	Mauro Carvalho Chehab <mchehab@kernel.org>
 L:	linux-media@vger.kernel.org
 W:	https://linuxtv.org
 T:	git git://linuxtv.org/media_tree.git

Makefile+1−1

@@ -1,7 +1,7 @@
1	VERSION = 4	1	VERSION = 4
2	PATCHLEVEL = 7	2	PATCHLEVEL = 7
3	SUBLEVEL = 0	3	SUBLEVEL = 0
4	EXTRAVERSION = -rc2	4	EXTRAVERSION = -rc4
5	NAME = Psychotic Stoned Sheep	5	NAME = Psychotic Stoned Sheep
6		6
7	# DOCUMENTATION	7	# DOCUMENTATION

arch/Kconfig+3−0

@@ -606,6 +606,9 @@ config HAVE_ARCH_HASH · 605 unmodified lines
606	file which provides platform-specific implementations of some	606	file which provides platform-specific implementations of some
607	functions in <linux/hash.h> or fs/namei.c.	607	functions in <linux/hash.h> or fs/namei.c.
608		608
		609	config ISA_BUS_API
		610	def_bool ISA
		611
609	#	612	#
610	# ABI hall of shame	613	# ABI hall of shame
611	#	614	#

arch/arc/Kconfig+4−27

 	def_bool y
 config ARCH_DISCONTIGMEM_ENABLE
-	def_bool y
+	def_bool n
 config ARCH_FLATMEM_ENABLE
 	def_bool y
 config ARC_HAS_COH_CACHES
 	def_bool n
-config ARC_HAS_REENTRANT_IRQ_LV2
-	def_bool n
 config ARC_MCIP
 	bool "ARConnect Multicore IP (MCIP) Support "
 	depends on ISA_ARCV2
 if ISA_ARCOMPACT
 config ARC_COMPACT_IRQ_LEVELS
-	bool "ARCompact IRQ Priorities: High(2)/Low(1)"
+	bool "Setup Timer IRQ as high Priority"
 	default n
-	# Timer HAS to be high priority, for any other high priority config
-	select ARC_IRQ3_LV2
 	# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
-	depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
+	depends on !SMP
-if ARC_COMPACT_IRQ_LEVELS
-config ARC_IRQ3_LV2
-	bool
-config ARC_IRQ5_LV2
-	bool
-config ARC_IRQ6_LV2
-	bool
-endif	#ARC_COMPACT_IRQ_LEVELS
 config ARC_FPU_SAVE_RESTORE
 	bool "Enable FPU state persistence across context switch"
 	default y
 	depends on !ARC_CANT_LLSC
-config ARC_STAR_9000923308
-	bool "Workaround for llock/scond livelock"
-	default n
-	depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
 config ARC_HAS_SWAPE
 	bool "Insn: SWAPE (endian-swap)"
 	default y
 config HIGHMEM
 	bool "High Memory Support"
-	select DISCONTIGMEM
+	select ARCH_DISCONTIGMEM_ENABLE
 	help
 	  With ARC 2G:2G address split, only upper 2G is directly addressable by
 	  kernel. Enable this to potentially allow access to rest of 2G and PAE

arch/arc/Makefile+1−1

@@ -127,7 +127,7 @@ libs-y += arch/arc/lib/ $(LIBGCC) · 126 unmodified lines
127		127
128	boot := arch/arc/boot	128	boot := arch/arc/boot
129		129
130	#default target for make without any arguements.	130	#default target for make without any arguments.
131	KBUILD_IMAGE := bootpImage	131	KBUILD_IMAGE := bootpImage
132		132
133	all: $(KBUILD_IMAGE)	133	all: $(KBUILD_IMAGE)

arch/arc/boot/dts/abilis_tb100.dtsi+0−2

@@ -23,8 +23,6 @@ · 22 unmodified lines
23		23
24		24
25	/ {	25	/ {
26	clock-frequency = <500000000>; /* 500 MHZ */
27
28	soc100 {	26	soc100 {
29	bus-frequency = <166666666>;	27	bus-frequency = <166666666>;
30		28

arch/arc/boot/dts/abilis_tb101.dtsi+0−2

@@ -23,8 +23,6 @@ · 22 unmodified lines
23		23
24		24
25	/ {	25	/ {
26	clock-frequency = <500000000>; /* 500 MHZ */
27
28	soc100 {	26	soc100 {
29	bus-frequency = <166666666>;	27	bus-frequency = <166666666>;
30		28

arch/arc/boot/dts/axc001.dtsi+0−1

@@ -15,7 +15,6 @@ · 14 unmodified lines
15		15
16	/ {	16	/ {
17	compatible = "snps,arc";	17	compatible = "snps,arc";
18	clock-frequency = <750000000>; /* 750 MHZ */
19	#address-cells = <1>;	18	#address-cells = <1>;
20	#size-cells = <1>;	19	#size-cells = <1>;
21		20

arch/arc/boot/dts/axc003.dtsi+0−1

@@ -14,7 +14,6 @@ · 13 unmodified lines
14		14
15	/ {	15	/ {
16	compatible = "snps,arc";	16	compatible = "snps,arc";
17	clock-frequency = <90000000>;
18	#address-cells = <1>;	17	#address-cells = <1>;
19	#size-cells = <1>;	18	#size-cells = <1>;
20		19

arch/arc/boot/dts/axc003_idu.dtsi+0−1

@@ -14,7 +14,6 @@ · 13 unmodified lines
14		14
15	/ {	15	/ {
16	compatible = "snps,arc";	16	compatible = "snps,arc";
17	clock-frequency = <90000000>;
18	#address-cells = <1>;	17	#address-cells = <1>;
19	#size-cells = <1>;	18	#size-cells = <1>;
20		19

arch/arc/boot/dts/eznps.dts+0−1

@@ -18,7 +18,6 @@ · 17 unmodified lines
18		18
19	/ {	19	/ {
20	compatible = "ezchip,arc-nps";	20	compatible = "ezchip,arc-nps";
21	clock-frequency = <83333333>; /* 83.333333 MHZ */
22	#address-cells = <1>;	21	#address-cells = <1>;
23	#size-cells = <1>;	22	#size-cells = <1>;
24	interrupt-parent = <&intc>;	23	interrupt-parent = <&intc>;

arch/arc/boot/dts/nsim_700.dts+0−1

@@ -11,7 +11,6 @@ · 10 unmodified lines
11		11
12	/ {	12	/ {
13	compatible = "snps,nsim";	13	compatible = "snps,nsim";
14	clock-frequency = <80000000>; /* 80 MHZ */
15	#address-cells = <1>;	14	#address-cells = <1>;
16	#size-cells = <1>;	15	#size-cells = <1>;
17	interrupt-parent = <&core_intc>;	16	interrupt-parent = <&core_intc>;

arch/arc/boot/dts/nsimosci.dts+0−1

@@ -11,7 +11,6 @@ · 10 unmodified lines
11		11
12	/ {	12	/ {
13	compatible = "snps,nsimosci";	13	compatible = "snps,nsimosci";
14	clock-frequency = <20000000>; /* 20 MHZ */
15	#address-cells = <1>;	14	#address-cells = <1>;
16	#size-cells = <1>;	15	#size-cells = <1>;
17	interrupt-parent = <&core_intc>;	16	interrupt-parent = <&core_intc>;

arch/arc/boot/dts/nsimosci_hs.dts+0−1

@@ -11,7 +11,6 @@ · 10 unmodified lines
11		11
12	/ {	12	/ {
13	compatible = "snps,nsimosci_hs";	13	compatible = "snps,nsimosci_hs";
14	clock-frequency = <20000000>; /* 20 MHZ */
15	#address-cells = <1>;	14	#address-cells = <1>;
16	#size-cells = <1>;	15	#size-cells = <1>;
17	interrupt-parent = <&core_intc>;	16	interrupt-parent = <&core_intc>;

arch/arc/boot/dts/nsimosci_hs_idu.dts+0−1

@@ -11,7 +11,6 @@ · 10 unmodified lines
11		11
12	/ {	12	/ {
13	compatible = "snps,nsimosci_hs";	13	compatible = "snps,nsimosci_hs";
14	clock-frequency = <5000000>; /* 5 MHZ */
15	#address-cells = <1>;	14	#address-cells = <1>;
16	#size-cells = <1>;	15	#size-cells = <1>;
17	interrupt-parent = <&core_intc>;	16	interrupt-parent = <&core_intc>;

arch/arc/boot/dts/skeleton.dtsi+0−1

@@ -13,7 +13,6 @@ · 12 unmodified lines
13		13
14	/ {	14	/ {
15	compatible = "snps,arc";	15	compatible = "snps,arc";
16	clock-frequency = <80000000>; /* 80 MHZ */
17	#address-cells = <1>;	16	#address-cells = <1>;
18	#size-cells = <1>;	17	#size-cells = <1>;
19	chosen { };	18	chosen { };

arch/arc/boot/dts/skeleton_hs.dtsi+0−1

@@ -8,7 +8,6 @@ · 7 unmodified lines
8		8
9	/ {	9	/ {
10	compatible = "snps,arc";	10	compatible = "snps,arc";
11	clock-frequency = <80000000>; /* 80 MHZ */
12	#address-cells = <1>;	11	#address-cells = <1>;
13	#size-cells = <1>;	12	#size-cells = <1>;
14	chosen { };	13	chosen { };

arch/arc/boot/dts/skeleton_hs_idu.dtsi+0−1

@@ -8,7 +8,6 @@ · 7 unmodified lines
8		8
9	/ {	9	/ {
10	compatible = "snps,arc";	10	compatible = "snps,arc";
11	clock-frequency = <80000000>; /* 80 MHZ */
12	#address-cells = <1>;	11	#address-cells = <1>;
13	#size-cells = <1>;	12	#size-cells = <1>;
14	chosen { };	13	chosen { };

arch/arc/boot/dts/vdk_axc003.dtsi+0−1

@@ -14,7 +14,6 @@ · 13 unmodified lines
14		14
15	/ {	15	/ {
16	compatible = "snps,arc";	16	compatible = "snps,arc";
17	clock-frequency = <50000000>;
18	#address-cells = <1>;	17	#address-cells = <1>;
19	#size-cells = <1>;	18	#size-cells = <1>;
20		19

arch/arc/boot/dts/vdk_axc003_idu.dtsi+0−1

@@ -15,7 +15,6 @@ · 14 unmodified lines
15		15
16	/ {	16	/ {
17	compatible = "snps,arc";	17	compatible = "snps,arc";
18	clock-frequency = <50000000>;
19	#address-cells = <1>;	18	#address-cells = <1>;
20	#size-cells = <1>;	19	#size-cells = <1>;
21		20

arch/arc/include/asm/atomic.h+4−41

@@ -25,50 +25,17 @@ · 24 unmodified lines
25		25
26	#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))	26	#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
27		27
28	#ifdef CONFIG_ARC_STAR_9000923308
29
30	#define SCOND_FAIL_RETRY_VAR_DEF \
31	unsigned int delay = 1, tmp; \
32
33	#define SCOND_FAIL_RETRY_ASM \
34	" bz 4f \n" \
35	" ; --- scond fail delay --- \n" \
36	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
37	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
38	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
39	" rol %[delay], %[delay] \n" /* delay = 2 / \
40	" b 1b \n" /* start over */ \
41	"4: ; --- success --- \n" \
42
43	#define SCOND_FAIL_RETRY_VARS \
44	,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \
45
46	#else /* !CONFIG_ARC_STAR_9000923308 */
47
48	#define SCOND_FAIL_RETRY_VAR_DEF
49
50	#define SCOND_FAIL_RETRY_ASM \
51	" bnz 1b \n" \
52
53	#define SCOND_FAIL_RETRY_VARS
54
55	#endif
56
57	#define ATOMIC_OP(op, c_op, asm_op) \	28	#define ATOMIC_OP(op, c_op, asm_op) \
58	static inline void atomic_##op(int i, atomic_t *v) \	29	static inline void atomic_##op(int i, atomic_t *v) \
59	{ \	30	{ \
60	unsigned int val; \	31	unsigned int val; \
61	SCOND_FAIL_RETRY_VAR_DEF \
62	\	32	\
63	__asm__ __volatile__( \	33	__asm__ __volatile__( \
64	"1: llock %[val], [%[ctr]] \n" \	34	"1: llock %[val], [%[ctr]] \n" \
65	" " #asm_op " %[val], %[val], %[i] \n" \	35	" " #asm_op " %[val], %[val], %[i] \n" \
66	" scond %[val], [%[ctr]] \n" \	36	" scond %[val], [%[ctr]] \n" \
67	" \n" \	37	" bnz 1b \n" \
68	SCOND_FAIL_RETRY_ASM \
69	\
70	: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \	38	: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
71	SCOND_FAIL_RETRY_VARS \
72	: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \	39	: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
73	[i] "ir" (i) \	40	[i] "ir" (i) \
74	: "cc"); \	41	: "cc"); \
@@ -77,8 +44,7 @@ static inline void atomic_##op(int i, atomic_t *v) \ · 2 unmodified lines
77	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \	44	#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
78	static inline int atomic_##op##_return(int i, atomic_t *v) \	45	static inline int atomic_##op##_return(int i, atomic_t *v) \
79	{ \	46	{ \
80	unsigned int val; \	47	unsigned int val; \
81	SCOND_FAIL_RETRY_VAR_DEF \
82	\	48	\
83	/* \	49	/* \
84	* Explicit full memory barrier needed before/after as \	50	* Explicit full memory barrier needed before/after as \
@@ -90,11 +56,8 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \ · 5 unmodified lines
90	"1: llock %[val], [%[ctr]] \n" \	56	"1: llock %[val], [%[ctr]] \n" \
91	" " #asm_op " %[val], %[val], %[i] \n" \	57	" " #asm_op " %[val], %[val], %[i] \n" \
92	" scond %[val], [%[ctr]] \n" \	58	" scond %[val], [%[ctr]] \n" \
93	" \n" \	59	" bnz 1b \n" \
94	SCOND_FAIL_RETRY_ASM \
95	\
96	: [val] "=&r" (val) \	60	: [val] "=&r" (val) \
97	SCOND_FAIL_RETRY_VARS \
98	: [ctr] "r" (&v->counter), \	61	: [ctr] "r" (&v->counter), \
99	[i] "ir" (i) \	62	[i] "ir" (i) \
100	: "cc"); \	63	: "cc"); \

arch/arc/include/asm/entry-compact.h+2−2

@@ -76,8 +76,8 @@ · 75 unmodified lines
76	* We need to be a bit more cautious here. What if a kernel bug in	76	* We need to be a bit more cautious here. What if a kernel bug in
77	* L1 ISR, caused SP to go whaco (some small value which looks like	77	* L1 ISR, caused SP to go whaco (some small value which looks like
78	* USER stk) and then we take L2 ISR.	78	* USER stk) and then we take L2 ISR.
79	* Above brlo alone would treat it as a valid L1-L2 sceanrio	79	* Above brlo alone would treat it as a valid L1-L2 scenario
80	* instead of shouting alound	80	* instead of shouting around
81	* The only feasible way is to make sure this L2 happened in	81	* The only feasible way is to make sure this L2 happened in
82	* L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in	82	* L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
83	* L1 ISR before it switches stack	83	* L1 ISR before it switches stack

arch/arc/include/asm/mmu_context.h+1−1

@@ -83,7 +83,7 @@ static inline void get_new_mmu_context(struct mm_struct *mm) · 82 unmodified lines
83	local_flush_tlb_all();	83	local_flush_tlb_all();
84		84
85	/*	85	/*
86	* Above checke for rollover of 8 bit ASID in 32 bit container.	86	* Above check for rollover of 8 bit ASID in 32 bit container.
87	* If the container itself wrapped around, set it to a non zero	87	* If the container itself wrapped around, set it to a non zero
88	* "generation" to distinguish from no context	88	* "generation" to distinguish from no context
89	*/	89	*/

arch/arc/include/asm/pgtable.h+1−1

@@ -47,7 +47,7 @@ · 46 unmodified lines
47	* Page Tables are purely for Linux VM's consumption and the bits below are	47	* Page Tables are purely for Linux VM's consumption and the bits below are
48	* suited to that (uniqueness). Hence some are not implemented in the TLB and	48	* suited to that (uniqueness). Hence some are not implemented in the TLB and
49	* some have different value in TLB.	49	* some have different value in TLB.
50	* e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible becoz they live in	50	* e.g. MMU v2: K_READ bit is 8 and so is GLOBAL (possible because they live in
51	* seperate PD0 and PD1, which combined forms a translation entry)	51	* seperate PD0 and PD1, which combined forms a translation entry)
52	* while for PTE perspective, they are 8 and 9 respectively	52	* while for PTE perspective, they are 8 and 9 respectively
53	* with MMU v3: Most bits (except SHARED) represent the exact hardware pos	53	* with MMU v3: Most bits (except SHARED) represent the exact hardware pos

arch/arc/include/asm/processor.h+1−1

@@ -78,7 +78,7 @@ struct task_struct; · 77 unmodified lines
78	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)	78	#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
79		79
80	/*	80	/*
81	* Where abouts of Task's sp, fp, blink when it was last seen in kernel mode.	81	* Where about of Task's sp, fp, blink when it was last seen in kernel mode.
82	* Look in process.c for details of kernel stack layout	82	* Look in process.c for details of kernel stack layout
83	*/	83	*/
84	#define TSK_K_ESP(tsk) (tsk->thread.ksp)	84	#define TSK_K_ESP(tsk) (tsk->thread.ksp)

arch/arc/include/asm/smp.h+1−1

@@ -86,7 +86,7 @@ static inline const char *arc_platform_smp_cpuinfo(void) · 85 unmodified lines
86	* (1) These insn were introduced only in 4.10 release. So for older released	86	* (1) These insn were introduced only in 4.10 release. So for older released
87	* support needed.	87	* support needed.
88	*	88	*
89	* (2) In a SMP setup, the LLOCK/SCOND atomiticity across CPUs needs to be	89	* (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be
90	* gaurantted by the platform (not something which core handles).	90	* gaurantted by the platform (not something which core handles).
91	* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ	91	* Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
92	* disabling for atomicity.	92	* disabling for atomicity.

arch/arc/include/asm/spinlock.h+0−292

@@ -20,11 +20,6 @@ · 19 unmodified lines
20		20
21	#ifdef CONFIG_ARC_HAS_LLSC	21	#ifdef CONFIG_ARC_HAS_LLSC
22		22
23	/*
24	* A normal LLOCK/SCOND based system, w/o need for livelock workaround
25	*/
26	#ifndef CONFIG_ARC_STAR_9000923308
27
28	static inline void arch_spin_lock(arch_spinlock_t *lock)	23	static inline void arch_spin_lock(arch_spinlock_t *lock)
29	{	24	{
30	unsigned int val;	25	unsigned int val;
@@ -238,293 +233,6 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) · 207 unmodified lines
238	smp_mb();	233	smp_mb();
239	}	234	}
240		235
241	#else /* CONFIG_ARC_STAR_9000923308 */
242
243	/*
244	* HS38x4 could get into a LLOCK/SCOND livelock in case of multiple overlapping
245	* coherency transactions in the SCU. The exclusive line state keeps rotating
246	* among contenting cores leading to a never ending cycle. So break the cycle
247	* by deferring the retry of failed exclusive access (SCOND). The actual delay
248	* needed is function of number of contending cores as well as the unrelated
249	* coherency traffic from other cores. To keep the code simple, start off with
250	* small delay of 1 which would suffice most cases and in case of contention
251	* double the delay. Eventually the delay is sufficient such that the coherency
252	* pipeline is drained, thus a subsequent exclusive access would succeed.
253	*/
254
255	#define SCOND_FAIL_RETRY_VAR_DEF \
256	unsigned int delay, tmp; \
257
258	#define SCOND_FAIL_RETRY_ASM \
259	" ; --- scond fail delay --- \n" \
260	" mov %[tmp], %[delay] \n" /* tmp = delay */ \
261	"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
262	" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
263	" rol %[delay], %[delay] \n" /* delay = 2 / \
264	" b 1b \n" /* start over */ \
265	" \n" \
266	"4: ; --- done --- \n" \
267
268	#define SCOND_FAIL_RETRY_VARS \
269	,[delay] "=&r" (delay), [tmp] "=&r" (tmp) \
270
271	static inline void arch_spin_lock(arch_spinlock_t *lock)
272	{
273	unsigned int val;
274	SCOND_FAIL_RETRY_VAR_DEF;
275
276	smp_mb();
277
278	__asm__ __volatile__(
279	"0: mov %[delay], 1 \n"
280	"1: llock %[val], [%[slock]] \n"
281	" breq %[val], %[LOCKED], 0b \n" /* spin while LOCKED */
282	" scond %[LOCKED], [%[slock]] \n" /* acquire */
283	" bz 4f \n" /* done */
284	" \n"
285	SCOND_FAIL_RETRY_ASM
286
287	: [val] "=&r" (val)
288	SCOND_FAIL_RETRY_VARS
289	: [slock] "r" (&(lock->slock)),
290	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
291	: "memory", "cc");
292
293	smp_mb();
294	}
295
296	/* 1 - lock taken successfully */
297	static inline int arch_spin_trylock(arch_spinlock_t *lock)
298	{
299	unsigned int val, got_it = 0;
300	SCOND_FAIL_RETRY_VAR_DEF;
301
302	smp_mb();
303
304	__asm__ __volatile__(
305	"0: mov %[delay], 1 \n"
306	"1: llock %[val], [%[slock]] \n"
307	" breq %[val], %[LOCKED], 4f \n" /* already LOCKED, just bail */
308	" scond %[LOCKED], [%[slock]] \n" /* acquire */
309	" bz.d 4f \n"
310	" mov.z %[got_it], 1 \n" /* got it */
311	" \n"
312	SCOND_FAIL_RETRY_ASM
313
314	: [val] "=&r" (val),
315	[got_it] "+&r" (got_it)
316	SCOND_FAIL_RETRY_VARS
317	: [slock] "r" (&(lock->slock)),
318	[LOCKED] "r" (__ARCH_SPIN_LOCK_LOCKED__)
319	: "memory", "cc");
320
321	smp_mb();
322
323	return got_it;
324	}
325
326	static inline void arch_spin_unlock(arch_spinlock_t *lock)
327	{
328	smp_mb();
329
330	lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__;
331
332	smp_mb();
333	}
334
335	/*
336	* Read-write spinlocks, allowing multiple readers but only one writer.
337	* Unfair locking as Writers could be starved indefinitely by Reader(s)
338	*/
339
340	static inline void arch_read_lock(arch_rwlock_t *rw)
341	{
342	unsigned int val;
343	SCOND_FAIL_RETRY_VAR_DEF;
344
345	smp_mb();
346
347	/*
348	* zero means writer holds the lock exclusively, deny Reader.
349	* Otherwise grant lock to first/subseq reader
350	*
351	* if (rw->counter > 0) {
352	* rw->counter--;
353	* ret = 1;
354	* }
355	*/
356
357	__asm__ __volatile__(
358	"0: mov %[delay], 1 \n"
359	"1: llock %[val], [%[rwlock]] \n"
360	" brls %[val], %[WR_LOCKED], 0b\n" /* <= 0: spin while write locked */
361	" sub %[val], %[val], 1 \n" /* reader lock */
362	" scond %[val], [%[rwlock]] \n"
363	" bz 4f \n" /* done */
364	" \n"
365	SCOND_FAIL_RETRY_ASM
366
367	: [val] "=&r" (val)
368	SCOND_FAIL_RETRY_VARS
369	: [rwlock] "r" (&(rw->counter)),
370	[WR_LOCKED] "ir" (0)
371	: "memory", "cc");
372
373	smp_mb();
374	}
375
376	/* 1 - lock taken successfully */
377	static inline int arch_read_trylock(arch_rwlock_t *rw)
378	{
379	unsigned int val, got_it = 0;
380	SCOND_FAIL_RETRY_VAR_DEF;
381
382	smp_mb();
383
384	__asm__ __volatile__(
385	"0: mov %[delay], 1 \n"
386	"1: llock %[val], [%[rwlock]] \n"
387	" brls %[val], %[WR_LOCKED], 4f\n" /* <= 0: already write locked, bail */
388	" sub %[val], %[val], 1 \n" /* counter-- */
389	" scond %[val], [%[rwlock]] \n"
390	" bz.d 4f \n"
391	" mov.z %[got_it], 1 \n" /* got it */
392	" \n"
393	SCOND_FAIL_RETRY_ASM
394
395	: [val] "=&r" (val),
396	[got_it] "+&r" (got_it)
397	SCOND_FAIL_RETRY_VARS
398	: [rwlock] "r" (&(rw->counter)),
399	[WR_LOCKED] "ir" (0)
400	: "memory", "cc");
401
402	smp_mb();
403
404	return got_it;
405	}
406
407	static inline void arch_write_lock(arch_rwlock_t *rw)
408	{
409	unsigned int val;
410	SCOND_FAIL_RETRY_VAR_DEF;
411
412	smp_mb();
413
414	/*
415	* If reader(s) hold lock (lock < __ARCH_RW_LOCK_UNLOCKED__),
416	* deny writer. Otherwise if unlocked grant to writer
417	* Hence the claim that Linux rwlocks are unfair to writers.
418	* (can be starved for an indefinite time by readers).
419	*
420	* if (rw->counter == __ARCH_RW_LOCK_UNLOCKED__) {
421	* rw->counter = 0;
422	* ret = 1;
423	* }
424	*/
425
426	__asm__ __volatile__(
427	"0: mov %[delay], 1 \n"
428	"1: llock %[val], [%[rwlock]] \n"
429	" brne %[val], %[UNLOCKED], 0b \n" /* while !UNLOCKED spin */
430	" mov %[val], %[WR_LOCKED] \n"
431	" scond %[val], [%[rwlock]] \n"
432	" bz 4f \n"
433	" \n"
434	SCOND_FAIL_RETRY_ASM
435
436	: [val] "=&r" (val)
437	SCOND_FAIL_RETRY_VARS
438	: [rwlock] "r" (&(rw->counter)),
439	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
440	[WR_LOCKED] "ir" (0)
441	: "memory", "cc");
442
443	smp_mb();
444	}
445
446	/* 1 - lock taken successfully */
447	static inline int arch_write_trylock(arch_rwlock_t *rw)
448	{
449	unsigned int val, got_it = 0;
450	SCOND_FAIL_RETRY_VAR_DEF;
451
452	smp_mb();
453
454	__asm__ __volatile__(
455	"0: mov %[delay], 1 \n"
456	"1: llock %[val], [%[rwlock]] \n"
457	" brne %[val], %[UNLOCKED], 4f \n" /* !UNLOCKED, bail */
458	" mov %[val], %[WR_LOCKED] \n"
459	" scond %[val], [%[rwlock]] \n"
460	" bz.d 4f \n"
461	" mov.z %[got_it], 1 \n" /* got it */
462	" \n"
463	SCOND_FAIL_RETRY_ASM
464
465	: [val] "=&r" (val),
466	[got_it] "+&r" (got_it)
467	SCOND_FAIL_RETRY_VARS
468	: [rwlock] "r" (&(rw->counter)),
469	[UNLOCKED] "ir" (__ARCH_RW_LOCK_UNLOCKED__),
470	[WR_LOCKED] "ir" (0)
471	: "memory", "cc");
472
473	smp_mb();
474
475	return got_it;
476	}
477
478	static inline void arch_read_unlock(arch_rwlock_t *rw)
479	{
480	unsigned int val;
481
482	smp_mb();
483
484	/*
485	* rw->counter++;
486	*/
487	__asm__ __volatile__(
488	"1: llock %[val], [%[rwlock]] \n"
489	" add %[val], %[val], 1 \n"
490	" scond %[val], [%[rwlock]] \n"
491	" bnz 1b \n"
492	" \n"
493	: [val] "=&r" (val)
494	: [rwlock] "r" (&(rw->counter))
495	: "memory", "cc");
496
497	smp_mb();
498	}
499
500	static inline void arch_write_unlock(arch_rwlock_t *rw)
501	{
502	unsigned int val;
503
504	smp_mb();
505
506	/*
507	* rw->counter = __ARCH_RW_LOCK_UNLOCKED__;
508	*/
509	__asm__ __volatile__(
510	"1: llock %[val], [%[rwlock]] \n"
511	" scond %[UNLOCKED], [%[rwlock]]\n"
512	" bnz 1b \n"
513	" \n"
514	: [val] "=&r" (val)
515	: [rwlock] "r" (&(rw->counter)),
516	[UNLOCKED] "r" (__ARCH_RW_LOCK_UNLOCKED__)
517	: "memory", "cc");
518
519	smp_mb();
520	}
521
522	#undef SCOND_FAIL_RETRY_VAR_DEF
523	#undef SCOND_FAIL_RETRY_ASM
524	#undef SCOND_FAIL_RETRY_VARS
525
526	#endif /* CONFIG_ARC_STAR_9000923308 */
527
528	#else /* !CONFIG_ARC_HAS_LLSC */	236	#else /* !CONFIG_ARC_HAS_LLSC */
529		237
530	static inline void arch_spin_lock(arch_spinlock_t *lock)	238	static inline void arch_spin_lock(arch_spinlock_t *lock)

arch/arc/include/asm/thread_info.h+1−1

@@ -103,7 +103,7 @@ static inline __attribute_const__ struct thread_info *current_thread_info(void) · 102 unmodified lines
103		103
104	/*	104	/*
105	* _TIF_ALLWORK_MASK includes SYSCALL_TRACE, but we don't need it.	105	* _TIF_ALLWORK_MASK includes SYSCALL_TRACE, but we don't need it.
106	* SYSCALL_TRACE is anways seperately/unconditionally tested right after a	106	* SYSCALL_TRACE is anyway seperately/unconditionally tested right after a
107	* syscall, so all that reamins to be tested is _TIF_WORK_MASK	107	* syscall, so all that reamins to be tested is _TIF_WORK_MASK
108	*/	108	*/
109		109

arch/arc/include/asm/uaccess.h+1−1

@@ -32,7 +32,7 @@ · 31 unmodified lines
32	#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))	32	#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS))
33		33
34	/*	34	/*
35	* Algorthmically, for __user_ok() we want do:	35	* Algorithmically, for __user_ok() we want do:
36	* (start < TASK_SIZE) && (start+len < TASK_SIZE)	36	* (start < TASK_SIZE) && (start+len < TASK_SIZE)
37	* where TASK_SIZE could either be retrieved from thread_info->addr_limit or	37	* where TASK_SIZE could either be retrieved from thread_info->addr_limit or
38	* emitted directly in code.	38	* emitted directly in code.

arch/arc/include/uapi/asm/swab.h+1−1

@@ -74,7 +74,7 @@ · 73 unmodified lines
74	__tmp ^ __in; \	74	__tmp ^ __in; \
75	})	75	})
76		76
77	#elif (ARC_BSWAP_TYPE == 2) /* Custom single cycle bwap instruction */	77	#elif (ARC_BSWAP_TYPE == 2) /* Custom single cycle bswap instruction */
78		78
79	#define __arch_swab32(x) \	79	#define __arch_swab32(x) \
80	({ \	80	({ \

arch/arc/kernel/entry-compact.S+2−16

@@ -91,27 +91,13 @@ VECTOR mem_service ; 0x8, Mem exception (0x1) · 90 unmodified lines
91	VECTOR instr_service ; 0x10, Instrn Error (0x2)	91	VECTOR instr_service ; 0x10, Instrn Error (0x2)
92		92
93	; ****************** Device ISRs ********************	93	; ****************** Device ISRs ********************
94	#ifdef CONFIG_ARC_IRQ3_LV2	94	#ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS
95	VECTOR handle_interrupt_level2
96	#else
97	VECTOR handle_interrupt_level1
98	#endif
99
100	VECTOR handle_interrupt_level1
101
102	#ifdef CONFIG_ARC_IRQ5_LV2
103	VECTOR handle_interrupt_level2
104	#else
105	VECTOR handle_interrupt_level1
106	#endif
107
108	#ifdef CONFIG_ARC_IRQ6_LV2
109	VECTOR handle_interrupt_level2	95	VECTOR handle_interrupt_level2
110	#else	96	#else
111	VECTOR handle_interrupt_level1	97	VECTOR handle_interrupt_level1
112	#endif	98	#endif
113		99
114	.rept 25	100	.rept 28
115	VECTOR handle_interrupt_level1 ; Other devices	101	VECTOR handle_interrupt_level1 ; Other devices
116	.endr	102	.endr
117		103

arch/arc/kernel/intc-compact.c+2−4

 {
 	int level_mask = 0;
-       /* setup any high priority Interrupts (Level2 in ARCompact jargon) */
+       /* Is timer high priority Interrupt (Level2 in ARCompact jargon) */
-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) << 3;
+	level_mask |= IS_ENABLED(CONFIG_ARC_COMPACT_IRQ_LEVELS) << TIMER0_IRQ;
-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5;
-	level_mask |= IS_ENABLED(CONFIG_ARC_IRQ6_LV2) << 6;
 	/*
 	 * Write to register, even if no LV2 IRQs configured to reset it

arch/arc/kernel/perf_event.c+1−1

@@ -108,7 +108,7 @@ static void arc_perf_event_update(struct perf_event *event, · 107 unmodified lines
108	int64_t delta = new_raw_count - prev_raw_count;	108	int64_t delta = new_raw_count - prev_raw_count;
109		109
110	/*	110	/*
111	* We don't afaraid of hwc->prev_count changing beneath our feet	111	* We aren't afraid of hwc->prev_count changing beneath our feet
112	* because there's no way for us to re-enter this function anytime.	112	* because there's no way for us to re-enter this function anytime.
113	*/	113	*/
114	local64_set(&hwc->prev_count, new_raw_count);	114	local64_set(&hwc->prev_count, new_raw_count);

arch/arc/kernel/setup.c+1−1

@@ -392,7 +392,7 @@ void __init setup_arch(char **cmdline_p) · 391 unmodified lines
392	/*	392	/*
393	* If we are here, it is established that @uboot_arg didn't	393	* If we are here, it is established that @uboot_arg didn't
394	* point to DT blob. Instead if u-boot says it is cmdline,	394	* point to DT blob. Instead if u-boot says it is cmdline,
395	* Appent to embedded DT cmdline.	395	* append to embedded DT cmdline.
396	* setup_machine_fdt() would have populated @boot_command_line	396	* setup_machine_fdt() would have populated @boot_command_line
397	*/	397	*/
398	if (uboot_tag == 1) {	398	if (uboot_tag == 1) {

arch/arc/kernel/signal.c+1−1

@@ -34,7 +34,7 @@ · 33 unmodified lines
34	* -ViXS were still seeing crashes when using insmod to load drivers.	34	* -ViXS were still seeing crashes when using insmod to load drivers.
35	* It turned out that the code to change Execute permssions for TLB entries	35	* It turned out that the code to change Execute permssions for TLB entries
36	* of user was not guarded for interrupts (mod_tlb_permission)	36	* of user was not guarded for interrupts (mod_tlb_permission)
37	* This was cauing TLB entries to be overwritten on unrelated indexes	37	* This was causing TLB entries to be overwritten on unrelated indexes
38	*	38	*
39	* Vineetg: July 15th 2008: Bug #94183	39	* Vineetg: July 15th 2008: Bug #94183
40	* -Exception happens in Delay slot of a JMP, and before user space resumes,	40	* -Exception happens in Delay slot of a JMP, and before user space resumes,

arch/arc/kernel/troubleshoot.c+1−1

@@ -276,7 +276,7 @@ static int tlb_stats_open(struct inode inode, struct file file) · 275 unmodified lines
276	return 0;	276	return 0;
277	}	277	}
278		278
279	/* called on user read(): display the couters */	279	/* called on user read(): display the counters */
280	static ssize_t tlb_stats_output(struct file file, / file descriptor */	280	static ssize_t tlb_stats_output(struct file file, / file descriptor */
281	char __user user_buf, / user buffer */	281	char __user user_buf, / user buffer */
282	size_t len, /* length of buffer */	282	size_t len, /* length of buffer */

arch/arc/mm/cache.c+3−3

arch/arc/mm/dma.c+1−1

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	* DMA Coherent API Notes	10	* DMA Coherent API Notes
11	*	11	*
12	* I/O is inherently non-coherent on ARC. So a coherent DMA buffer is	12	* I/O is inherently non-coherent on ARC. So a coherent DMA buffer is
13	* implemented by accessintg it using a kernel virtual address, with	13	* implemented by accessing it using a kernel virtual address, with
14	* Cache bit off in the TLB entry.	14	* Cache bit off in the TLB entry.
15	*	15	*
16	* The default DMA address == Phy address which is 0x8000_0000 based.	16	* The default DMA address == Phy address which is 0x8000_0000 based.

arch/arm/boot/dts/Makefile+1−0

@@ -741,6 +741,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \ · 740 unmodified lines
741	sun7i-a20-olimex-som-evb.dtb \	741	sun7i-a20-olimex-som-evb.dtb \
742	sun7i-a20-olinuxino-lime.dtb \	742	sun7i-a20-olinuxino-lime.dtb \
743	sun7i-a20-olinuxino-lime2.dtb \	743	sun7i-a20-olinuxino-lime2.dtb \
		744	sun7i-a20-olinuxino-lime2-emmc.dtb \
744	sun7i-a20-olinuxino-micro.dtb \	745	sun7i-a20-olinuxino-micro.dtb \
745	sun7i-a20-orangepi.dtb \	746	sun7i-a20-orangepi.dtb \
746	sun7i-a20-orangepi-mini.dtb \	747	sun7i-a20-orangepi-mini.dtb \

arch/arm/boot/dts/am437x-sk-evm.dts+1−1

@@ -418,7 +418,7 @@ · 417 unmodified lines
418	status = "okay";	418	status = "okay";
419	pinctrl-names = "default";	419	pinctrl-names = "default";
420	pinctrl-0 = <&i2c0_pins>;	420	pinctrl-0 = <&i2c0_pins>;
421	clock-frequency = <400000>;	421	clock-frequency = <100000>;
422		422
423	tps@24 {	423	tps@24 {
424	compatible = "ti,tps65218";	424	compatible = "ti,tps65218";

arch/arm/boot/dts/am57xx-idk-common.dtsi+17−15

 		tps659038_pmic {
 			compatible = "ti,tps659038-pmic";
+			smps12-in-supply = <&vmain>;
+			smps3-in-supply = <&vmain>;
+			smps45-in-supply = <&vmain>;
+			smps6-in-supply = <&vmain>;
+			smps7-in-supply = <&vmain>;
+			smps8-in-supply = <&vmain>;
+			smps9-in-supply = <&vmain>;
+			ldo1-in-supply = <&vmain>;
+			ldo2-in-supply = <&vmain>;
+			ldo3-in-supply = <&vmain>;
+			ldo4-in-supply = <&vmain>;
+			ldo9-in-supply = <&vmain>;
+			ldoln-in-supply = <&vmain>;
+			ldousb-in-supply = <&vmain>;
+			ldortc-in-supply = <&vmain>;
 			regulators {
 				smps12_reg: smps12 {
 					/* VDD_MPU */
-					vin-supply = <&vmain>;
 					regulator-name = "smps12";
 					regulator-min-microvolt = <850000>;
 					regulator-max-microvolt = <1250000>;
 				smps3_reg: smps3 {
 					/* VDD_DDR EMIF1 EMIF2 */
-					vin-supply = <&vmain>;
 					regulator-name = "smps3";
 					regulator-min-microvolt = <1350000>;
 					regulator-max-microvolt = <1350000>;
 				smps45_reg: smps45 {
 					/* VDD_DSPEVE on AM572 */
 					/* VDD_IVA + VDD_DSP on AM571 */
-					vin-supply = <&vmain>;
 					regulator-name = "smps45";
 					regulator-min-microvolt = <850000>;
 					regulator-max-microvolt = <1250000>;
 				smps6_reg: smps6 {
 					/* VDD_GPU */
-					vin-supply = <&vmain>;
 					regulator-name = "smps6";
 					regulator-min-microvolt = <850000>;
 					regulator-max-microvolt = <1250000>;
 				smps7_reg: smps7 {
 					/* VDD_CORE */
-					vin-supply = <&vmain>;
 					regulator-name = "smps7";
 					regulator-min-microvolt = <850000>;
 					regulator-max-microvolt = <1150000>;
 				smps8_reg: smps8 {
 					/* 5728 - VDD_IVAHD */
 					/* 5718 - N.C. test point */
-					vin-supply = <&vmain>;
 					regulator-name = "smps8";
 				};
 				smps9_reg: smps9 {
 					/* VDD_3_3D */
-					vin-supply = <&vmain>;
 					regulator-name = "smps9";
 					regulator-min-microvolt = <3300000>;
 					regulator-max-microvolt = <3300000>;
 				ldo1_reg: ldo1 {
 					/* VDDSHV8 - VSDMMC  */
 					/* NOTE: on rev 1.3a, data supply */
-					vin-supply = <&vmain>;
 					regulator-name = "ldo1";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <3300000>;
 				ldo2_reg: ldo2 {
 					/* VDDSH18V */
-					vin-supply = <&vmain>;
 					regulator-name = "ldo2";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <1800000>;
 				ldo3_reg: ldo3 {
 					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
-					vin-supply = <&vmain>;
 					regulator-name = "ldo3";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <1800000>;
 				ldo4_reg: ldo4 {
 					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
-					vin-supply = <&vmain>;
 					regulator-name = "ldo4";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <1800000>;
 				ldo9_reg: ldo9 {
 					/* VDD_RTC  */
-					vin-supply = <&vmain>;
 					regulator-name = "ldo9";
 					regulator-min-microvolt = <840000>;
 					regulator-max-microvolt = <1160000>;
 				ldoln_reg: ldoln {
 					/* VDDA_1V8_PLL */
-					vin-supply = <&vmain>;
 					regulator-name = "ldoln";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <1800000>;
 				ldousb_reg: ldousb {
 					/* VDDA_3V_USB: VDDA_USBHS33 */
-					vin-supply = <&vmain>;
 					regulator-name = "ldousb";
 					regulator-min-microvolt = <3300000>;
 					regulator-max-microvolt = <3300000>;
 				ldortc_reg: ldortc {
 					/* VDDA_RTC  */
-					vin-supply = <&vmain>;
 					regulator-name = "ldortc";
 					regulator-min-microvolt = <1800000>;
 					regulator-max-microvolt = <1800000>;

arch/arm/boot/dts/dm8148-evm.dts+8−0

 	};
 };
+&mmc1 {
+        status = "disabled";
+};
 &mmc2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&sd1_pins>;
 	cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
 };
+&mmc3 {
+        status = "disabled";
+};
 &pincntl {
 	sd1_pins: pinmux_sd1_pins {
 		pinctrl-single,pins = <

arch/arm/boot/dts/dm8148-t410.dts+9−0

 	phy-mode = "rgmii";
 };
+&mmc1 {
+	status = "disabled";
+};
+&mmc2 {
+	status = "disabled";
+};
 &mmc3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&sd2_pins>;
 	dmas = <&edma_xbar 8 0 1	/* use SDTXEVT1 instead of MCASP0TX */
 		&edma_xbar 9 0 2>;	/* use SDRXEVT1 instead of MCASP0RX */
 	dma-names = "tx", "rx";
+	non-removable;
 };
 &pincntl {

arch/arm/boot/dts/dra7.dtsi+2−0

 			ti,hwmods = "gpmc";
 			reg = <0x50000000 0x37c>;      /* device IO registers */
 			interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+			dmas = <&edma_xbar 4 0>;
+			dma-names = "rxtx";
 			gpmc,num-cs = <8>;
 			gpmc,num-waitpins = <2>;
 			#address-cells = <2>;

arch/arm/boot/dts/dra74x.dtsi+2−2

@@ -107,8 +107,8 @@ · 106 unmodified lines
107	reg = <0x58000000 0x80>,	107	reg = <0x58000000 0x80>,
108	<0x58004054 0x4>,	108	<0x58004054 0x4>,
109	<0x58004300 0x20>,	109	<0x58004300 0x20>,
110	<0x58005054 0x4>,	110	<0x58009054 0x4>,
111	<0x58005300 0x20>;	111	<0x58009300 0x20>;
112	reg-names = "dss", "pll1_clkctrl", "pll1",	112	reg-names = "dss", "pll1_clkctrl", "pll1",
113	"pll2_clkctrl", "pll2";	113	"pll2_clkctrl", "pll2";
114		114

arch/arm/boot/dts/exynos5250-snow-common.dtsi+10−3

 	hpd-gpios = <&gpx0 7 GPIO_ACTIVE_HIGH>;
 	ports {
-		port0 {
+		port {
 			dp_out: endpoint {
 				remote-endpoint = <&bridge_in>;
 			};
 		edid-emulation = <5>;
 		ports {
-			port0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
 				bridge_out: endpoint {
 					remote-endpoint = <&panel_in>;
 				};
 			};
-			port1 {
+			port@1 {
+				reg = <1>;
 				bridge_in: endpoint {
 					remote-endpoint = <&dp_out>;
 				};

arch/arm/boot/dts/exynos5420-peach-pit.dts+10−3

 	hpd-gpios = <&gpx2 6 GPIO_ACTIVE_HIGH>;
 	ports {
-		port0 {
+		port {
 			dp_out: endpoint {
 				remote-endpoint = <&bridge_in>;
 			};
 		use-external-pwm;
 		ports {
-			port0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			port@0 {
+				reg = <0>;
 				bridge_out: endpoint {
 					remote-endpoint = <&panel_in>;
 				};
 			};
-			port1 {
+			port@1 {
+				reg = <1>;
 				bridge_in: endpoint {
 					remote-endpoint = <&dp_out>;
 				};

arch/arm/boot/dts/omap3-evm-37xx.dts+1−1

@@ -85,7 +85,7 @@ · 84 unmodified lines
85	OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */	85	OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
86	OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */	86	OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */
87	OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */	87	OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
88	OMAP3_CORE1_IOPAD(0x215e, WAKEUP_EN \| PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */	88	OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */
89	OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */	89	OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */
90	OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */	90	OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP \| MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */
91	>;	91	>;

arch/arm/boot/dts/omap3-igep.dtsi+1−0

@@ -188,6 +188,7 @@ · 187 unmodified lines
188	vmmc-supply = <&vmmc1>;	188	vmmc-supply = <&vmmc1>;
189	vmmc_aux-supply = <&vsim>;	189	vmmc_aux-supply = <&vsim>;
190	bus-width = <4>;	190	bus-width = <4>;
		191	cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>;
191	};	192	};
192		193
193	&mmc3 {	194	&mmc3 {

arch/arm/boot/dts/omap3-igep0020-common.dtsi+11−0

@@ -194,6 +194,12 @@ · 193 unmodified lines
194	OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT \| MUX_MODE4) /* etk_d14.gpio_28 */	194	OMAP3630_CORE2_IOPAD(0x25f8, PIN_OUTPUT \| MUX_MODE4) /* etk_d14.gpio_28 */
195	>;	195	>;
196	};	196	};
		197
		198	mmc1_wp_pins: pinmux_mmc1_cd_pins {
		199	pinctrl-single,pins = <
		200	OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT \| MUX_MODE4) /* etk_d15.gpio_29 */
		201	>;
		202	};
197	};	203	};
198		204
199	&i2c3 {	205	&i2c3 {
@@ -250,3 +256,8 @@ · 50 unmodified lines
250	};	256	};
251	};	257	};
252	};	258	};
		259
		260	&mmc1 {
		261	pinctrl-0 = <&mmc1_pins &mmc1_wp_pins>;
		262	wp-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; /* gpio_29 */
		263	};

arch/arm/boot/dts/omap3-n900.dts+2−2

arch/arm/boot/dts/omap3-n950-n9.dtsi+3−3

arch/arm/boot/dts/omap3-zoom3.dts+3−3

arch/arm/boot/dts/omap5-board-common.dtsi+46−2

@@ -14,6 +14,29 @@ · 13 unmodified lines
14	display0 = &hdmi0;	14	display0 = &hdmi0;
15	};	15	};
16		16
		17	vmain: fixedregulator-vmain {
		18	compatible = "regulator-fixed";
		19	regulator-name = "vmain";
		20	regulator-min-microvolt = <5000000>;
		21	regulator-max-microvolt = <5000000>;
		22	};
		23
		24	vsys_cobra: fixedregulator-vsys_cobra {
		25	compatible = "regulator-fixed";
		26	regulator-name = "vsys_cobra";
		27	vin-supply = <&vmain>;
		28	regulator-min-microvolt = <5000000>;
		29	regulator-max-microvolt = <5000000>;
		30	};
		31
		32	vdds_1v8_main: fixedregulator-vdds_1v8_main {
		33	compatible = "regulator-fixed";
		34	regulator-name = "vdds_1v8_main";
		35	vin-supply = <&smps7_reg>;
		36	regulator-min-microvolt = <1800000>;
		37	regulator-max-microvolt = <1800000>;
		38	};
		39
17	vmmcsd_fixed: fixedregulator-mmcsd {	40	vmmcsd_fixed: fixedregulator-mmcsd {
18	compatible = "regulator-fixed";	41	compatible = "regulator-fixed";
19	regulator-name = "vmmcsd_fixed";	42	regulator-name = "vmmcsd_fixed";
@@ -309,7 +332,7 @@ · 289 unmodified lines
309		332
310	wlcore_irq_pin: pinmux_wlcore_irq_pin {	333	wlcore_irq_pin: pinmux_wlcore_irq_pin {
311	pinctrl-single,pins = <	334	pinctrl-single,pins = <
312	OMAP5_IOPAD(0x40, WAKEUP_EN \| PIN_INPUT_PULLUP \| MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */	335	OMAP5_IOPAD(0x40, PIN_INPUT_PULLUP \| MUX_MODE6) /* llia_wakereqin.gpio1_wk14 */
313	>;	336	>;
314	};	337	};
315	};	338	};
@@ -409,6 +432,26 @@ · 93 unmodified lines
409		432
410	ti,ldo6-vibrator;	433	ti,ldo6-vibrator;
411		434
		435	smps123-in-supply = <&vsys_cobra>;
		436	smps45-in-supply = <&vsys_cobra>;
		437	smps6-in-supply = <&vsys_cobra>;
		438	smps7-in-supply = <&vsys_cobra>;
		439	smps8-in-supply = <&vsys_cobra>;
		440	smps9-in-supply = <&vsys_cobra>;
		441	smps10_out2-in-supply = <&vsys_cobra>;
		442	smps10_out1-in-supply = <&vsys_cobra>;
		443	ldo1-in-supply = <&vsys_cobra>;
		444	ldo2-in-supply = <&vsys_cobra>;
		445	ldo3-in-supply = <&vdds_1v8_main>;
		446	ldo4-in-supply = <&vdds_1v8_main>;
		447	ldo5-in-supply = <&vsys_cobra>;
		448	ldo6-in-supply = <&vdds_1v8_main>;
		449	ldo7-in-supply = <&vsys_cobra>;
		450	ldo8-in-supply = <&vsys_cobra>;
		451	ldo9-in-supply = <&vmmcsd_fixed>;
		452	ldoln-in-supply = <&vsys_cobra>;
		453	ldousb-in-supply = <&vsys_cobra>;
		454
412	regulators {	455	regulators {
413	smps123_reg: smps123 {	456	smps123_reg: smps123 {
414	/* VDD_OPP_MPU */	457	/* VDD_OPP_MPU */
@@ -600,7 +643,8 @@ · 185 unmodified lines
600	pinctrl-0 = <&twl6040_pins>;	643	pinctrl-0 = <&twl6040_pins>;
601		644
602	interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */	645	interrupts = <GIC_SPI 119 IRQ_TYPE_NONE>; /* IRQ_SYS_2N cascaded to gic */
603	ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */	646
		647	/* audpwron gpio defined in the board specific dts */
604		648
605	vio-supply = <&smps7_reg>;	649	vio-supply = <&smps7_reg>;
606	v2v1-supply = <&smps9_reg>;	650	v2v1-supply = <&smps9_reg>;

arch/arm/boot/dts/omap5-igep0050.dts+26−0

@@ -35,6 +35,22 @@ · 34 unmodified lines
35	};	35	};
36	};	36	};
37		37
		38	/* LDO4 is VPP1 - ball AD9 */
		39	&ldo4_reg {
		40	regulator-min-microvolt = <2000000>;
		41	regulator-max-microvolt = <2000000>;
		42	};
		43
		44	/*
		45	* LDO7 is used for HDMI: VDDA_DSIPORTA - ball AA33, VDDA_DSIPORTC - ball AE33,
		46	* VDDA_HDMI - ball AN25
		47	*/
		48	&ldo7_reg {
		49	status = "okay";
		50	regulator-min-microvolt = <1800000>;
		51	regulator-max-microvolt = <1800000>;
		52	};
		53
38	&omap5_pmx_core {	54	&omap5_pmx_core {
39	i2c4_pins: pinmux_i2c4_pins {	55	i2c4_pins: pinmux_i2c4_pins {
40	pinctrl-single,pins = <	56	pinctrl-single,pins = <
@@ -52,3 +68,13 @@ · 11 unmodified lines
52	<&gpio7 3 0>; /* 195, SDA */	68	<&gpio7 3 0>; /* 195, SDA */
53	};	69	};
54		70
		71	&twl6040 {
		72	ti,audpwron-gpio = <&gpio5 16 GPIO_ACTIVE_HIGH>; /* gpio line 144 */
		73	};
		74
		75	&twl6040_pins {
		76	pinctrl-single,pins = <
		77	OMAP5_IOPAD(0x1c4, PIN_OUTPUT \| MUX_MODE6) /* mcspi1_somi.gpio5_144 */
		78	OMAP5_IOPAD(0x1ca, PIN_OUTPUT \| MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
		79	>;
		80	};

arch/arm/boot/dts/omap5-uevm.dts+10−0

@@ -51,3 +51,13 @@ · 50 unmodified lines
51	<&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */	51	<&gpio9 1 GPIO_ACTIVE_HIGH>, /* TCA6424A P00, LS OE */
52	<&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */	52	<&gpio7 1 GPIO_ACTIVE_HIGH>; /* GPIO 193, HPD */
53	};	53	};
		54
		55	&twl6040 {
		56	ti,audpwron-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>; /* gpio line 141 */
		57	};
		58
		59	&twl6040_pins {
		60	pinctrl-single,pins = <
		61	OMAP5_IOPAD(0x1be, PIN_OUTPUT \| MUX_MODE6) /* mcspi1_somi.gpio5_141 */
		62	>;
		63	};

arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts+1−0

@@ -136,6 +136,7 @@ · 135 unmodified lines
136	&gmac1 {	136	&gmac1 {
137	status = "okay";	137	status = "okay";
138	phy-mode = "rgmii";	138	phy-mode = "rgmii";
		139	phy-handle = <&phy1>;
139		140
140	snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;	141	snps,reset-gpio = <&porta 0 GPIO_ACTIVE_LOW>;
141	snps,reset-active-low;	142	snps,reset-active-low;

arch/arm/boot/dts/stih407-family.dtsi+3−0

 			compatible = "shared-dma-pool";
 			reg = <0x40000000 0x01000000>;
 			no-map;
+			status = "disabled";
 		};
 		gp1_reserved: rproc@41000000 {
 			compatible = "shared-dma-pool";
 			reg = <0x41000000 0x01000000>;
 			no-map;
+			status = "disabled";
 		};
 		audio_reserved: rproc@42000000 {
 			compatible = "shared-dma-pool";
 			reg = <0x42000000 0x01000000>;
 			no-map;
+			status = "disabled";
 		};
 		dmu_reserved: rproc@43000000 {

arch/arm/boot/dts/sun6i-a31s-primo81.dts+0−2

@@ -176,8 +176,6 @@ · 175 unmodified lines
176	};	176	};
177		177
178	&reg_dc1sw {	178	&reg_dc1sw {
179	regulator-min-microvolt = <3000000>;
180	regulator-max-microvolt = <3000000>;
181	regulator-name = "vcc-lcd";	179	regulator-name = "vcc-lcd";
182	};	180	};
183		181

arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts+0−2

@@ -135,8 +135,6 @@ · 134 unmodified lines
135		135
136	&reg_dc1sw {	136	&reg_dc1sw {
137	regulator-name = "vcc-lcd-usb2";	137	regulator-name = "vcc-lcd-usb2";
138	regulator-min-microvolt = <3000000>;
139	regulator-max-microvolt = <3000000>;
140	};	138	};
141		139
142	&reg_dc5ldo {	140	&reg_dc5ldo {

arch/arm/configs/exynos_defconfig+1−0

@@ -82,6 +82,7 @@ CONFIG_TOUCHSCREEN_MMS114=y · 81 unmodified lines
82	CONFIG_INPUT_MISC=y	82	CONFIG_INPUT_MISC=y
83	CONFIG_INPUT_MAX77693_HAPTIC=y	83	CONFIG_INPUT_MAX77693_HAPTIC=y
84	CONFIG_INPUT_MAX8997_HAPTIC=y	84	CONFIG_INPUT_MAX8997_HAPTIC=y
		85	CONFIG_KEYBOARD_SAMSUNG=y
85	CONFIG_SERIAL_8250=y	86	CONFIG_SERIAL_8250=y
86	CONFIG_SERIAL_SAMSUNG=y	87	CONFIG_SERIAL_SAMSUNG=y
87	CONFIG_SERIAL_SAMSUNG_CONSOLE=y	88	CONFIG_SERIAL_SAMSUNG_CONSOLE=y

arch/arm/configs/multi_v7_defconfig+1−0

@@ -264,6 +264,7 @@ CONFIG_KEYBOARD_TEGRA=y · 263 unmodified lines
264	CONFIG_KEYBOARD_SPEAR=y	264	CONFIG_KEYBOARD_SPEAR=y
265	CONFIG_KEYBOARD_ST_KEYSCAN=y	265	CONFIG_KEYBOARD_ST_KEYSCAN=y
266	CONFIG_KEYBOARD_CROS_EC=m	266	CONFIG_KEYBOARD_CROS_EC=m
		267	CONFIG_KEYBOARD_SAMSUNG=m
267	CONFIG_MOUSE_PS2_ELANTECH=y	268	CONFIG_MOUSE_PS2_ELANTECH=y
268	CONFIG_MOUSE_CYAPA=m	269	CONFIG_MOUSE_CYAPA=m
269	CONFIG_MOUSE_ELAN_I2C=y	270	CONFIG_MOUSE_ELAN_I2C=y

arch/arm/include/asm/pgtable-2level.h+1−0

@@ -193,6 +193,7 @@ static inline pmd_t pmd_offset(pud_t pud, unsigned long addr) · 192 unmodified lines
193		193
194	#define pmd_large(pmd) (pmd_val(pmd) & 2)	194	#define pmd_large(pmd) (pmd_val(pmd) & 2)
195	#define pmd_bad(pmd) (pmd_val(pmd) & 2)	195	#define pmd_bad(pmd) (pmd_val(pmd) & 2)
		196	#define pmd_present(pmd) (pmd_val(pmd))
196		197
197	#define copy_pmd(pmdpd,pmdps) \	198	#define copy_pmd(pmdpd,pmdps) \
198	do { \	199	do { \

arch/arm/include/asm/pgtable-3level.h+3−2

 						: !!(pmd_val(pmd) & (val)))
 #define pmd_isclear(pmd, val)	(!(pmd_val(pmd) & (val)))
+#define pmd_present(pmd)	(pmd_isset((pmd), L_PMD_SECT_VALID))
 #define pmd_young(pmd)		(pmd_isset((pmd), PMD_SECT_AF))
 #define pte_special(pte)	(pte_isset((pte), L_PTE_SPECIAL))
 static inline pte_t pte_mkspecial(pte_t pte)
 #define pfn_pmd(pfn,prot)	(__pmd(((phys_addr_t)(pfn) << PAGE_SHIFT) | pgprot_val(prot)))
 #define mk_pmd(page,prot)	pfn_pmd(page_to_pfn(page),prot)
-/* represent a notpresent pmd by zero, this is used by pmdp_invalidate */
+/* represent a notpresent pmd by faulting entry, this is used by pmdp_invalidate */
 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
 {
-	return __pmd(0);
+	return __pmd(pmd_val(pmd) & ~L_PMD_SECT_VALID);
 }
 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)

arch/arm/include/asm/pgtable.h+0−1

@@ -182,7 +182,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; · 181 unmodified lines
182	#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)	182	#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
183		183
184	#define pmd_none(pmd) (!pmd_val(pmd))	184	#define pmd_none(pmd) (!pmd_val(pmd))
185	#define pmd_present(pmd) (pmd_val(pmd))
186		185
187	static inline pte_t *pmd_page_vaddr(pmd_t pmd)	186	static inline pte_t *pmd_page_vaddr(pmd_t pmd)
188	{	187	{

arch/arm/kernel/smp.c+1−1

@@ -486,7 +486,7 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = { · 485 unmodified lines
486		486
487	static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)	487	static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
488	{	488	{
489	trace_ipi_raise(target, ipi_types[ipinr]);	489	trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
490	__smp_cross_call(target, ipinr);	490	__smp_cross_call(target, ipinr);
491	}	491	}
492		492

arch/arm/mach-exynos/Kconfig+0−1

@@ -61,7 +61,6 @@ config ARCH_EXYNOS4 · 60 unmodified lines
61	select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210	61	select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
62	select CPU_EXYNOS4210	62	select CPU_EXYNOS4210
63	select GIC_NON_BANKED	63	select GIC_NON_BANKED
64	select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
65	select MIGHT_HAVE_CACHE_L2X0	64	select MIGHT_HAVE_CACHE_L2X0
66	help	65	help
67	Samsung EXYNOS4 (Cortex-A9) SoC based systems	66	Samsung EXYNOS4 (Cortex-A9) SoC based systems

arch/arm/mach-imx/mach-imx6ul.c+1−1

@@ -46,7 +46,7 @@ static int ksz8081_phy_fixup(struct phy_device *dev) · 45 unmodified lines
46	static void __init imx6ul_enet_phy_init(void)	46	static void __init imx6ul_enet_phy_init(void)
47	{	47	{
48	if (IS_BUILTIN(CONFIG_PHYLIB))	48	if (IS_BUILTIN(CONFIG_PHYLIB))
49	phy_register_fixup_for_uid(PHY_ID_KSZ8081, 0xffffffff,	49	phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
50	ksz8081_phy_fixup);	50	ksz8081_phy_fixup);
51	}	51	}
52		52

arch/arm/mach-omap1/ams-delta-fiq-handler.S+3−3

@@ -43,8 +43,8 @@ · 42 unmodified lines
43	#define OTHERS_MASK (MODEM_IRQ_MASK \| HOOK_SWITCH_MASK)	43	#define OTHERS_MASK (MODEM_IRQ_MASK \| HOOK_SWITCH_MASK)
44		44
45	/* IRQ handler register bitmasks */	45	/* IRQ handler register bitmasks */
46	#define DEFERRED_FIQ_MASK (0x1 << (INT_DEFERRED_FIQ % IH2_BASE))	46	#define DEFERRED_FIQ_MASK OMAP_IRQ_BIT(INT_DEFERRED_FIQ)
47	#define GPIO_BANK1_MASK (0x1 << INT_GPIO_BANK1)	47	#define GPIO_BANK1_MASK OMAP_IRQ_BIT(INT_GPIO_BANK1)
48		48
49	/* Driver buffer byte offsets */	49	/* Driver buffer byte offsets */
50	#define BUF_MASK (FIQ_MASK * 4)	50	#define BUF_MASK (FIQ_MASK * 4)
@@ -110,7 +110,7 @@ ENTRY(qwerty_fiqin_start) · 59 unmodified lines
110	mov r8, #2 @ reset FIQ agreement	110	mov r8, #2 @ reset FIQ agreement
111	str r8, [r12, #IRQ_CONTROL_REG_OFFSET]	111	str r8, [r12, #IRQ_CONTROL_REG_OFFSET]
112		112
113	cmp r10, #INT_GPIO_BANK1 @ is it GPIO bank interrupt?	113	cmp r10, #(INT_GPIO_BANK1 - NR_IRQS_LEGACY) @ is it GPIO interrupt?
114	beq gpio @ yes - process it	114	beq gpio @ yes - process it
115		115
116	mov r8, #1	116	mov r8, #1

arch/arm/mach-omap1/ams-delta-fiq.c+3−2

 	 * Since no set_type() method is provided by OMAP irq chip,
 	 * switch to edge triggered interrupt type manually.
 	 */
-	offset = IRQ_ILR0_REG_OFFSET + INT_DEFERRED_FIQ * 0x4;
+	offset = IRQ_ILR0_REG_OFFSET +
+			((INT_DEFERRED_FIQ - NR_IRQS_LEGACY) & 0x1f) * 0x4;
 	val = omap_readl(DEFERRED_FIQ_IH_BASE + offset) & ~(1 << 1);
 	omap_writel(val, DEFERRED_FIQ_IH_BASE + offset);
 	/*
 	 * Redirect GPIO interrupts to FIQ
 	 */
-	offset = IRQ_ILR0_REG_OFFSET + INT_GPIO_BANK1 * 0x4;
+	offset = IRQ_ILR0_REG_OFFSET + (INT_GPIO_BANK1 - NR_IRQS_LEGACY) * 0x4;
 	val = omap_readl(OMAP_IH1_BASE + offset) | 1;
 	omap_writel(val, OMAP_IH1_BASE + offset);
 }

arch/arm/mach-omap1/include/mach/ams-delta-fiq.h+2−0

@@ -14,6 +14,8 @@ · 13 unmodified lines
14	#ifndef __AMS_DELTA_FIQ_H	14	#ifndef __AMS_DELTA_FIQ_H
15	#define __AMS_DELTA_FIQ_H	15	#define __AMS_DELTA_FIQ_H
16		16
		17	#include <mach/irqs.h>
		18
17	/*	19	/*
18	* Interrupt number used for passing control from FIQ to IRQ.	20	* Interrupt number used for passing control from FIQ to IRQ.
19	* IRQ12, described as reserved, has been selected.	21	* IRQ12, described as reserved, has been selected.

arch/arm/mach-omap2/Kconfig+12−0

 	select PM_OPP if PM
 	select PM if CPU_IDLE
 	select SOC_HAS_OMAP2_SDRC
+	select ARM_ERRATA_430973
 config ARCH_OMAP4
 	bool "TI OMAP4"
 	select PM if CPU_IDLE
 	select ARM_ERRATA_754322
 	select ARM_ERRATA_775420
+	select OMAP_INTERCONNECT
 config SOC_OMAP5
 	bool "TI OMAP5"
 	select HAVE_ARM_SCU
 	select GENERIC_CLOCKEVENTS_BROADCAST
 	select HAVE_ARM_TWD
+	select ARM_ERRATA_754322
+	select ARM_ERRATA_775420
 config SOC_DRA7XX
 	bool "TI DRA7XX"
 endif
+config OMAP5_ERRATA_801819
+	bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
+	depends on SOC_OMAP5 || SOC_DRA7XX
+	help
+	  A livelock can occur in the L2 cache arbitration that might prevent
+	  a snoop from completing. Under certain conditions this can cause the
+	  system to deadlock.
 endmenu

arch/arm/mach-omap2/omap-secure.h+1−0

@@ -46,6 +46,7 @@ · 45 unmodified lines
46		46
47	#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109	47	#define OMAP5_DRA7_MON_SET_CNTFRQ_INDEX 0x109
48	#define OMAP5_MON_AMBA_IF_INDEX 0x108	48	#define OMAP5_MON_AMBA_IF_INDEX 0x108
		49	#define OMAP5_DRA7_MON_SET_ACR_INDEX 0x107
49		50
50	/* Secure PPA(Primary Protected Application) APIs */	51	/* Secure PPA(Primary Protected Application) APIs */
51	#define OMAP4_PPA_L2_POR_INDEX 0x23	52	#define OMAP4_PPA_L2_POR_INDEX 0x23

arch/arm/mach-omap2/omap-smp.c+43−5

@@ -50,6 +50,39 @@ void __iomem *omap4_get_scu_base(void) · 49 unmodified lines
50	return scu_base;	50	return scu_base;
51	}	51	}
52		52
		53	#ifdef CONFIG_OMAP5_ERRATA_801819
		54	void omap5_erratum_workaround_801819(void)
		55	{
		56	u32 acr, revidr;
		57	u32 acr_mask;
		58
		59	/* REVIDR[3] indicates erratum fix available on silicon */
		60	asm volatile ("mrc p15, 0, %0, c0, c0, 6" : "=r" (revidr));
		61	if (revidr & (0x1 << 3))
		62	return;
		63
		64	asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
		65	/*
		66	* BIT(27) - Disables streaming. All write-allocate lines allocate in
		67	* the L1 or L2 cache.
		68	* BIT(25) - Disables streaming. All write-allocate lines allocate in
		69	* the L1 cache.
		70	*/
		71	acr_mask = (0x3 << 25) \| (0x3 << 27);
		72	/* do we already have it done.. if yes, skip expensive smc */
		73	if ((acr & acr_mask) == acr_mask)
		74	return;
		75
		76	acr \|= acr_mask;
		77	omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr);
		78
		79	pr_debug("%s: ARM erratum workaround 801819 applied on CPU%d\n",
		80	__func__, smp_processor_id());
		81	}
		82	#else
		83	static inline void omap5_erratum_workaround_801819(void) { }
		84	#endif
		85
53	static void omap4_secondary_init(unsigned int cpu)	86	static void omap4_secondary_init(unsigned int cpu)
54	{	87	{
55	/*	88	/*
@@ -64,12 +97,15 @@ static void omap4_secondary_init(unsigned int cpu) · 8 unmodified lines
64	omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,	97	omap_secure_dispatcher(OMAP4_PPA_CPU_ACTRL_SMP_INDEX,
65	4, 0, 0, 0, 0, 0);	98	4, 0, 0, 0, 0, 0);
66		99
67	/*	100	if (soc_is_omap54xx() \|\| soc_is_dra7xx()) {
68	* Configure the CNTFRQ register for the secondary cpu's which	101	/*
69	* indicates the frequency of the cpu local timers.	102	* Configure the CNTFRQ register for the secondary cpu's which
70	*/	103	* indicates the frequency of the cpu local timers.
71	if (soc_is_omap54xx() \|\| soc_is_dra7xx())	104	*/
72	set_cntfreq();	105	set_cntfreq();
		106	/* Configure ACR to disable streaming WA for 801819 */
		107	omap5_erratum_workaround_801819();
		108	}
73		109
74	/*	110	/*
75	* Synchronise with the boot thread.	111	* Synchronise with the boot thread.
@@ -218,6 +254,8 @@ static void __init omap4_smp_prepare_cpus(unsigned int max_cpus) · 142 unmodified lines
218		254
219	if (cpu_is_omap446x())	255	if (cpu_is_omap446x())
220	startup_addr = omap4460_secondary_startup;	256	startup_addr = omap4460_secondary_startup;
		257	if (soc_is_dra74x() \|\| soc_is_omap54xx())
		258	omap5_erratum_workaround_801819();
221		259
222	/*	260	/*
223	* Write the address of secondary startup routine into the	261	* Write the address of secondary startup routine into the

arch/arm/mach-omap2/powerdomain.c+5−4

 			trace_state = (PWRDM_TRACE_STATES_FLAG |
 				       ((next & OMAP_POWERSTATE_MASK) << 8) |
 				       ((prev & OMAP_POWERSTATE_MASK) << 0));
-			trace_power_domain_target(pwrdm->name, trace_state,
+			trace_power_domain_target_rcuidle(pwrdm->name,
-						  smp_processor_id());
+							  trace_state,
+							  smp_processor_id());
 		}
 		break;
 	default:
 	if (arch_pwrdm && arch_pwrdm->pwrdm_set_next_pwrst) {
 		/* Trace the pwrdm desired target state */
-		trace_power_domain_target(pwrdm->name, pwrst,
+		trace_power_domain_target_rcuidle(pwrdm->name, pwrst,
-					  smp_processor_id());
+						  smp_processor_id());
 		/* Program the pwrdm desired target state */
 		ret = arch_pwrdm->pwrdm_set_next_pwrst(pwrdm, pwrst);
 	}

arch/arm/mach-omap2/powerdomains7xx_data.c+2−74

 	.prcm_offs	  = DRA7XX_PRM_IVA_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
-	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 4,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* hwa_mem */
-		[1] = PWRSTS_OFF_RET,	/* sl2_mem */
-		[2] = PWRSTS_OFF_RET,	/* tcm1_mem */
-		[3] = PWRSTS_OFF_RET,	/* tcm2_mem */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* hwa_mem */
 		[1] = PWRSTS_ON,	/* sl2_mem */
 	.prcm_offs	  = DRA7XX_PRM_IPU_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
-	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 2,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* aessmem */
-		[1] = PWRSTS_OFF_RET,	/* periphmem */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* aessmem */
 		[1] = PWRSTS_ON,	/* periphmem */
 	.prcm_offs	  = DRA7XX_PRM_DSS_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
-	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* dss_mem */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* dss_mem */
 	},
 	.name		  = "l4per_pwrdm",
 	.prcm_offs	  = DRA7XX_PRM_L4PER_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
-	.pwrsts		  = PWRSTS_RET_ON,
+	.pwrsts		  = PWRSTS_ON,
-	.pwrsts_logic_ret = PWRSTS_RET,
 	.banks		  = 2,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* nonretained_bank */
-		[1] = PWRSTS_OFF_RET,	/* retained_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* nonretained_bank */
 		[1] = PWRSTS_ON,	/* retained_bank */
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* gpu_mem */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* gpu_mem */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* wkup_bank */
 	},
 	.prcm_offs	  = DRA7XX_PRM_CORE_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_ON,
-	.pwrsts_logic_ret = PWRSTS_RET,
 	.banks		  = 5,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* core_nret_bank */
-		[1] = PWRSTS_OFF_RET,	/* core_ocmram */
-		[2] = PWRSTS_OFF_RET,	/* core_other_bank */
-		[3] = PWRSTS_OFF_RET,	/* ipu_l2ram */
-		[4] = PWRSTS_OFF_RET,	/* ipu_unicache */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* core_nret_bank */
 		[1] = PWRSTS_ON,	/* core_ocmram */
 	.prcm_offs	  = DRA7XX_PRM_VPE_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
-	.pwrsts_logic_ret = PWRSTS_OFF,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* vpe_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* vpe_bank */
 	},
 	.name		  = "l3init_pwrdm",
 	.prcm_offs	  = DRA7XX_PRM_L3INIT_INST,
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
-	.pwrsts		  = PWRSTS_RET_ON,
+	.pwrsts		  = PWRSTS_ON,
-	.pwrsts_logic_ret = PWRSTS_RET,
 	.banks		  = 3,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* gmac_bank */
-		[1] = PWRSTS_OFF_RET,	/* l3init_bank1 */
-		[2] = PWRSTS_OFF_RET,	/* l3init_bank2 */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* gmac_bank */
 		[1] = PWRSTS_ON,	/* l3init_bank1 */
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* eve3_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* eve3_bank */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* emu_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* emu_bank */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 3,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* dsp2_edma */
-		[1] = PWRSTS_OFF_RET,	/* dsp2_l1 */
-		[2] = PWRSTS_OFF_RET,	/* dsp2_l2 */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* dsp2_edma */
 		[1] = PWRSTS_ON,	/* dsp2_l1 */
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 3,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* dsp1_edma */
-		[1] = PWRSTS_OFF_RET,	/* dsp1_l1 */
-		[2] = PWRSTS_OFF_RET,	/* dsp1_l2 */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* dsp1_edma */
 		[1] = PWRSTS_ON,	/* dsp1_l1 */
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* vip_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* vip_bank */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* eve4_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* eve4_bank */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* eve2_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* eve2_bank */
 	},
 	.prcm_partition	  = DRA7XX_PRM_PARTITION,
 	.pwrsts		  = PWRSTS_OFF_ON,
 	.banks		  = 1,
-	.pwrsts_mem_ret	= {
-		[0] = PWRSTS_OFF_RET,	/* eve1_bank */
-	},
 	.pwrsts_mem_on	= {
 		[0] = PWRSTS_ON,	/* eve1_bank */
 	},

arch/arm/mach-omap2/timer.c+5−2

 	__omap_sync32k_timer_init(1, "timer_32k_ck", "ti,timer-alwon",
 			2, "timer_sys_ck", NULL, false);
-	if (of_have_populated_dt())
+	clocksource_probe();
-		clocksource_probe();
 }
 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_AM43XX)
 {
 	__omap_sync32k_timer_init(12, "secure_32k_fck", "ti,timer-secure",
 			2, "timer_sys_ck", NULL, false);
+	clocksource_probe();
 }
 #endif /* CONFIG_ARCH_OMAP3 */
 {
 	__omap_sync32k_timer_init(2, "timer_sys_ck", NULL,
 			1, "timer_sys_ck", "ti,timer-alwon", true);
+	clocksource_probe();
 }
 #endif

arch/arm/mach-vexpress/spc.c+1−1

@@ -547,7 +547,7 @@ static struct clk ve_spc_clk_register(struct device cpu_dev) · 546 unmodified lines
547		547
548	init.name = dev_name(cpu_dev);	548	init.name = dev_name(cpu_dev);
549	init.ops = &clk_spc_ops;	549	init.ops = &clk_spc_ops;
550	init.flags = CLK_IS_ROOT \| CLK_GET_RATE_NOCACHE;	550	init.flags = CLK_GET_RATE_NOCACHE;
551	init.num_parents = 0;	551	init.num_parents = 0;
552		552
553	return devm_clk_register(cpu_dev, &spc->hw);	553	return devm_clk_register(cpu_dev, &spc->hw);

arch/arm/plat-samsung/devs.c+1−1

@@ -68,7 +68,7 @@ · 67 unmodified lines
68	#include <linux/platform_data/asoc-s3c.h>	68	#include <linux/platform_data/asoc-s3c.h>
69	#include <linux/platform_data/spi-s3c64xx.h>	69	#include <linux/platform_data/spi-s3c64xx.h>
70		70
71	static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);	71	#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) }))
72		72
73	/* AC97 */	73	/* AC97 */
74	#ifdef CONFIG_CPU_S3C2440	74	#ifdef CONFIG_CPU_S3C2440

arch/arm64/boot/dts/lg/lg1312.dtsi+1−1

@@ -125,7 +125,7 @@ · 124 unmodified lines
125	#size-cells = <1>;	125	#size-cells = <1>;
126	#interrupts-cells = <3>;	126	#interrupts-cells = <3>;
127		127
128	compatible = "arm,amba-bus";	128	compatible = "simple-bus";
129	interrupt-parent = <&gic>;	129	interrupt-parent = <&gic>;
130	ranges;	130	ranges;
131		131

arch/arm64/boot/dts/rockchip/rk3399.dtsi+1−1

@@ -163,7 +163,7 @@ · 162 unmodified lines
163	};	163	};
164		164
165	amba {	165	amba {
166	compatible = "arm,amba-bus";	166	compatible = "simple-bus";
167	#address-cells = <2>;	167	#address-cells = <2>;
168	#size-cells = <2>;	168	#size-cells = <2>;
169	ranges;	169	ranges;

arch/arm64/include/asm/kgdb.h+37−8

@@ -38,25 +38,54 @@ extern int kgdb_fault_expected; · 37 unmodified lines
38	#endif /* !__ASSEMBLY__ */	38	#endif /* !__ASSEMBLY__ */
39		39
40	/*	40	/*
41	* gdb is expecting the following registers layout.	41	* gdb remote procotol (well most versions of it) expects the following
		42	* register layout.
42	*	43	*
43	* General purpose regs:	44	* General purpose regs:
44	* r0-r30: 64 bit	45	* r0-r30: 64 bit
45	* sp,pc : 64 bit	46	* sp,pc : 64 bit
46	* pstate : 64 bit	47	* pstate : 32 bit
47	* Total: 34	48	* Total: 33 + 1
48	* FPU regs:	49	* FPU regs:
49	* f0-f31: 128 bit	50	* f0-f31: 128 bit
50	* Total: 32
51	* Extra regs
52	* fpsr & fpcr: 32 bit	51	* fpsr & fpcr: 32 bit
53	* Total: 2	52	* Total: 32 + 2
54	*	53	*
		54	* To expand a little on the "most versions of it"... when the gdb remote
		55	* protocol for AArch64 was developed it depended on a statement in the
		56	* Architecture Reference Manual that claimed "SPSR_ELx is a 32-bit register".
		57	* and, as a result, allocated only 32-bits for the PSTATE in the remote
		58	* protocol. In fact this statement is still present in ARM DDI 0487A.i.
		59	*
		60	* Unfortunately "is a 32-bit register" has a very special meaning for
		61	* system registers. It means that "the upper bits, bits[63:32], are
		62	* RES0.". RES0 is heavily used in the ARM architecture documents as a
		63	* way to leave space for future architecture changes. So to translate a
		64	* little for people who don't spend their spare time reading ARM architecture
		65	* manuals, what "is a 32-bit register" actually means in this context is
		66	* "is a 64-bit register but one with no meaning allocated to any of the
		67	* upper 32-bits... yet".
		68	*
		69	* Perhaps then we should not be surprised that this has led to some
		70	* confusion. Specifically a patch, influenced by the above translation,
		71	* that extended PSTATE to 64-bit was accepted into gdb-7.7 but the patch
		72	* was reverted in gdb-7.8.1 and all later releases, when this was
		73	* discovered to be an undocumented protocol change.
		74	*
		75	* So... it is not wrong for us to only allocate 32-bits to PSTATE
		76	* here even though the kernel itself allocates 64-bits for the same
		77	* state. That is because this bit of code tells the kernel how the gdb
		78	* remote protocol (well most versions of it) describes the register state.
		79	*
		80	* Note that if you are using one of the versions of gdb that supports
		81	* the gdb-7.7 version of the protocol you cannot use kgdb directly
		82	* without providing a custom register description (gdb can load new
		83	* protocol descriptions at runtime).
55	*/	84	*/
56		85
57	#define _GP_REGS 34	86	#define _GP_REGS 33
58	#define _FP_REGS 32	87	#define _FP_REGS 32
59	#define _EXTRA_REGS 2	88	#define _EXTRA_REGS 3
60	/*	89	/*
61	* general purpose registers size in bytes.	90	* general purpose registers size in bytes.
62	* pstate is only 4 bytes. subtract 4 bytes	91	* pstate is only 4 bytes. subtract 4 bytes

arch/arm64/include/asm/spinlock.h+37−5

@@ -30,22 +30,53 @@ static inline void arch_spin_unlock_wait(arch_spinlock_t *lock) · 29 unmodified lines
30	{	30	{
31	unsigned int tmp;	31	unsigned int tmp;
32	arch_spinlock_t lockval;	32	arch_spinlock_t lockval;
		33	u32 owner;
		34
		35	/*
		36	* Ensure prior spin_lock operations to other locks have completed
		37	* on this CPU before we test whether "lock" is locked.
		38	*/
		39	smp_mb();
		40	owner = READ_ONCE(lock->owner) << 16;
33		41
34	asm volatile(	42	asm volatile(
35	" sevl\n"	43	" sevl\n"
36	"1: wfe\n"	44	"1: wfe\n"
37	"2: ldaxr %w0, %2\n"	45	"2: ldaxr %w0, %2\n"
		46	/* Is the lock free? */
38	" eor %w1, %w0, %w0, ror #16\n"	47	" eor %w1, %w0, %w0, ror #16\n"
39	" cbnz %w1, 1b\n"	48	" cbz %w1, 3f\n"
		49	/* Lock taken -- has there been a subsequent unlock->lock transition? */
		50	" eor %w1, %w3, %w0, lsl #16\n"
		51	" cbz %w1, 1b\n"
		52	/*
		53	* The owner has been updated, so there was an unlock->lock
		54	* transition that we missed. That means we can rely on the
		55	* store-release of the unlock operation paired with the
		56	* load-acquire of the lock operation to publish any of our
		57	* previous stores to the new lock owner and therefore don't
		58	* need to bother with the writeback below.
		59	*/
		60	" b 4f\n"
		61	"3:\n"
		62	/*
		63	* Serialise against any concurrent lockers by writing back the
		64	* unlocked lock value
		65	*/
40	ARM64_LSE_ATOMIC_INSN(	66	ARM64_LSE_ATOMIC_INSN(
41	/* LL/SC */	67	/* LL/SC */
42	" stxr %w1, %w0, %2\n"	68	" stxr %w1, %w0, %2\n"
43	" cbnz %w1, 2b\n", /* Serialise against any concurrent lockers */
44	/* LSE atomics */
45	" nop\n"	69	" nop\n"
46	" nop\n")	70	" nop\n",
		71	/* LSE atomics */
		72	" mov %w1, %w0\n"
		73	" cas %w0, %w0, %2\n"
		74	" eor %w1, %w1, %w0\n")
		75	/* Somebody else wrote to the lock, GOTO 10 and reload the value */
		76	" cbnz %w1, 2b\n"
		77	"4:"
47	: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)	78	: "=&r" (lockval), "=&r" (tmp), "+Q" (*lock)
48	:	79	: "r" (owner)
49	: "memory");	80	: "memory");
50	}	81	}
51		82
@@ -148,6 +179,7 @@ static inline int arch_spin_value_unlocked(arch_spinlock_t lock) · 96 unmodified lines
148		179
149	static inline int arch_spin_is_locked(arch_spinlock_t *lock)	180	static inline int arch_spin_is_locked(arch_spinlock_t *lock)
150	{	181	{
		182	smp_mb(); /* See arch_spin_unlock_wait */
151	return !arch_spin_value_unlocked(READ_ONCE(*lock));	183	return !arch_spin_value_unlocked(READ_ONCE(*lock));
152	}	184	}
153		185

arch/arm64/kernel/kgdb.c+13−1

 	{ "x30", 8, offsetof(struct pt_regs, regs[30])},
 	{ "sp", 8, offsetof(struct pt_regs, sp)},
 	{ "pc", 8, offsetof(struct pt_regs, pc)},
-	{ "pstate", 8, offsetof(struct pt_regs, pstate)},
+	/*
+	 * struct pt_regs thinks PSTATE is 64-bits wide but gdb remote
+	 * protocol disagrees. Therefore we must extract only the lower
+	 * 32-bits. Look for the big comment in asm/kgdb.h for more
+	 * detail.
+	 */
+	{ "pstate", 4, offsetof(struct pt_regs, pstate)
+#ifdef CONFIG_CPU_BIG_ENDIAN
+							+ 4
+#endif
+	},
 	{ "v0", 16, -1 },
 	{ "v1", 16, -1 },
 	{ "v2", 16, -1 },
 	memset((char *)gdb_regs, 0, NUMREGBYTES);
 	thread_regs = task_pt_regs(task);
 	memcpy((void *)gdb_regs, (void *)thread_regs->regs, GP_REG_BYTES);
+	/* Special case for PSTATE (check comments in asm/kgdb.h for details) */
+	dbg_get_reg(33, gdb_regs + GP_REG_BYTES, thread_regs);
 }
 void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)

arch/arm64/kernel/traps.c+13−13

 	/*
 	 * We need to switch to kernel mode so that we can use __get_user
-	 * to safely read from kernel space.  Note that we now dump the
+	 * to safely read from kernel space.
-	 * code first, just in case the backtrace kills us.
 	 */
 	fs = get_fs();
 	set_fs(KERNEL_DS);
 	print_ip_sym(where);
 }
-static void dump_instr(const char *lvl, struct pt_regs *regs)
+static void __dump_instr(const char *lvl, struct pt_regs *regs)
 {
 	unsigned long addr = instruction_pointer(regs);
-	mm_segment_t fs;
 	char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
 	int i;
-	/*
-	 * We need to switch to kernel mode so that we can use __get_user
-	 * to safely read from kernel space.  Note that we now dump the
-	 * code first, just in case the backtrace kills us.
-	 */
-	fs = get_fs();
-	set_fs(KERNEL_DS);
 	for (i = -4; i < 1; i++) {
 		unsigned int val, bad;
 		}
 	}
 	printk("%sCode: %s\n", lvl, str);
+}
-	set_fs(fs);
+static void dump_instr(const char *lvl, struct pt_regs *regs)
+{
+	if (!user_mode(regs)) {
+		mm_segment_t fs = get_fs();
+		set_fs(KERNEL_DS);
+		__dump_instr(lvl, regs);
+		set_fs(fs);
+	} else {
+		__dump_instr(lvl, regs);
+	}
 }
 static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)

arch/arm64/mm/fault.c+2−2

@@ -109,7 +109,7 @@ int ptep_set_access_flags(struct vm_area_struct *vma, · 108 unmodified lines
109	* PTE_RDONLY is cleared by default in the asm below, so set it in	109	* PTE_RDONLY is cleared by default in the asm below, so set it in
110	* back if necessary (read-only or clean PTE).	110	* back if necessary (read-only or clean PTE).
111	*/	111	*/
112	if (!pte_write(entry) \|\| !dirty)	112	if (!pte_write(entry) \|\| !pte_sw_dirty(entry))
113	pte_val(entry) \|= PTE_RDONLY;	113	pte_val(entry) \|= PTE_RDONLY;
114		114
115	/*	115	/*
@@ -441,7 +441,7 @@ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) · 325 unmodified lines
441	return 1;	441	return 1;
442	}	442	}
443		443
444	static struct fault_info {	444	static const struct fault_info {
445	int (fn)(unsigned long addr, unsigned int esr, struct pt_regs regs);	445	int (fn)(unsigned long addr, unsigned int esr, struct pt_regs regs);
446	int sig;	446	int sig;
447	int code;	447	int code;

arch/mips/include/asm/kvm_host.h+2−1

 #define KVM_GUEST_KUSEG			0x00000000UL
 #define KVM_GUEST_KSEG0			0x40000000UL
 #define KVM_GUEST_KSEG23		0x60000000UL
-#define KVM_GUEST_KSEGX(a)		((_ACAST32_(a)) & 0x60000000)
+#define KVM_GUEST_KSEGX(a)		((_ACAST32_(a)) & 0xe0000000)
 #define KVM_GUEST_CPHYSADDR(a)		((_ACAST32_(a)) & 0x1fffffff)
 #define KVM_GUEST_CKSEG0ADDR(a)		(KVM_GUEST_CPHYSADDR(a) | KVM_GUEST_KSEG0)
 #define KVM_MIPS_GUEST_TLB_SIZE	64
 struct kvm_vcpu_arch {
 	void *host_ebase, *guest_ebase;
+	int (*vcpu_run)(struct kvm_run *run, struct kvm_vcpu *vcpu);
 	unsigned long host_stack;
 	unsigned long host_gp;

arch/mips/kvm/emulate.c+13−6

 		if (index < 0) {
 			vcpu->arch.host_cp0_entryhi = (va & VPN2_MASK);
 			vcpu->arch.host_cp0_badvaddr = va;
+			vcpu->arch.pc = curr_pc;
 			er = kvm_mips_emulate_tlbmiss_ld(cause, NULL, run,
 							 vcpu);
 			preempt_enable();
 			 * invalid exception to the guest
 			 */
 			if (!TLB_IS_VALID(*tlb, va)) {
+				vcpu->arch.host_cp0_badvaddr = va;
+				vcpu->arch.pc = curr_pc;
 				er = kvm_mips_emulate_tlbinv_ld(cause, NULL,
 								run, vcpu);
 				preempt_enable();
 			cache, op, base, arch->gprs[base], offset);
 		er = EMULATE_FAIL;
 		preempt_enable();
-		goto dont_update_pc;
+		goto done;
 	}
 		kvm_err("NO-OP CACHE (cache: %#x, op: %#x, base[%d]: %#lx, offset: %#x\n",
 			cache, op, base, arch->gprs[base], offset);
 		er = EMULATE_FAIL;
-		preempt_enable();
-		goto dont_update_pc;
 	}
 	preempt_enable();
+done:
+	/* Rollback PC only if emulation was unsuccessful */
+	if (er == EMULATE_FAIL)
+		vcpu->arch.pc = curr_pc;
 dont_update_pc:
-	/* Rollback PC */
+	/*
-	vcpu->arch.pc = curr_pc;
+	 * This is for exceptions whose emulation updates the PC, so do not
-done:
+	 * overwrite the PC under any circumstances
+	 */
 	return er;
 }

arch/mips/kvm/interrupt.h+1−0

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#define MIPS_EXC_MAX 12	28	#define MIPS_EXC_MAX 12
29	/* XXXSL More to follow */	29	/* XXXSL More to follow */
30		30
		31	extern char __kvm_mips_vcpu_run_end[];
31	extern char mips32_exception[], mips32_exceptionEnd[];	32	extern char mips32_exception[], mips32_exceptionEnd[];
32	extern char mips32_GuestException[], mips32_GuestExceptionEnd[];	33	extern char mips32_GuestException[], mips32_GuestExceptionEnd[];
33		34

arch/mips/kvm/locore.S+1−0

@@ -202,6 +202,7 @@ FEXPORT(__kvm_mips_load_k0k1) · 201 unmodified lines
202		202
203	/* Jump to guest */	203	/* Jump to guest */
204	eret	204	eret
		205	EXPORT(__kvm_mips_vcpu_run_end)
205		206
206	VECTOR(MIPSX(exception), unknown)	207	VECTOR(MIPSX(exception), unknown)
207	/* Find out what mode we came from and jump to the proper handler. */	208	/* Find out what mode we came from and jump to the proper handler. */

arch/mips/kvm/mips.c+10−1

 	memcpy(gebase + offset, mips32_GuestException,
 	       mips32_GuestExceptionEnd - mips32_GuestException);
+#ifdef MODULE
+	offset += mips32_GuestExceptionEnd - mips32_GuestException;
+	memcpy(gebase + offset, (char *)__kvm_mips_vcpu_run,
+	       __kvm_mips_vcpu_run_end - (char *)__kvm_mips_vcpu_run);
+	vcpu->arch.vcpu_run = gebase + offset;
+#else
+	vcpu->arch.vcpu_run = __kvm_mips_vcpu_run;
+#endif
 	/* Invalidate the icache for these ranges */
 	local_flush_icache_range((unsigned long)gebase,
 				(unsigned long)gebase + ALIGN(size, PAGE_SIZE));
 	/* Disable hardware page table walking while in guest */
 	htw_stop();
-	r = __kvm_mips_vcpu_run(run, vcpu);
+	r = vcpu->arch.vcpu_run(run, vcpu);
 	/* Re-enable HTW before enabling interrupts */
 	htw_start();

arch/powerpc/include/asm/nohash/64/pgalloc.h+1−1

@@ -172,7 +172,7 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm, · 171 unmodified lines
172		172
173	static inline void pte_free_kernel(struct mm_struct mm, pte_t pte)	173	static inline void pte_free_kernel(struct mm_struct mm, pte_t pte)
174	{	174	{
175	pte_fragment_fre((unsigned long *)pte, 1);	175	pte_fragment_free((unsigned long *)pte, 1);
176	}	176	}
177		177
178	static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)	178	static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)

arch/powerpc/kernel/prom_init.c+1−1

@@ -719,7 +719,7 @@ unsigned char ibm_architecture_vec[] = { · 718 unmodified lines
719	* must match by the macro below. Update the definition if	719	* must match by the macro below. Update the definition if
720	* the structure layout changes.	720	* the structure layout changes.
721	*/	721	*/
722	#define IBM_ARCH_VEC_NRCORES_OFFSET 125	722	#define IBM_ARCH_VEC_NRCORES_OFFSET 133
723	W(NR_CPUS), /* number of cores supported */	723	W(NR_CPUS), /* number of cores supported */
724	0,	724	0,
725	0,	725	0,

arch/powerpc/kernel/ptrace.c+2−2

@@ -377,7 +377,7 @@ static int fpr_get(struct task_struct target, const struct user_regset regset, · 376 unmodified lines
377		377
378	#else	378	#else
379	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=	379	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
380	offsetof(struct thread_fp_state, fpr[32][0]));	380	offsetof(struct thread_fp_state, fpr[32]));
381		381
382	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,	382	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
383	&target->thread.fp_state, 0, -1);	383	&target->thread.fp_state, 0, -1);
@@ -405,7 +405,7 @@ static int fpr_set(struct task_struct target, const struct user_regset regset, · 21 unmodified lines
405	return 0;	405	return 0;
406	#else	406	#else
407	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=	407	BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) !=
408	offsetof(struct thread_fp_state, fpr[32][0]));	408	offsetof(struct thread_fp_state, fpr[32]));
409		409
410	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,	410	return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
411	&target->thread.fp_state, 0, -1);	411	&target->thread.fp_state, 0, -1);

arch/powerpc/mm/hash_native_64.c+5−1

 		}
 	}
 	/* This works for all page sizes, and for 256M and 1T segments */
-	*ssize = hpte_v >> HPTE_V_SSIZE_SHIFT;
+	if (cpu_has_feature(CPU_FTR_ARCH_300))
+		*ssize = hpte_r >> HPTE_R_3_0_SSIZE_SHIFT;
+	else
+		*ssize = hpte_v >> HPTE_V_SSIZE_SHIFT;
 	shift = mmu_psize_defs[size].shift;
 	avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm);

arch/powerpc/mm/tlb-radix.c+4−4

@@ -117,7 +117,7 @@ static inline void _tlbie_va(unsigned long va, unsigned long pid, · 116 unmodified lines
117	*/	117	*/
118	void radix__local_flush_tlb_mm(struct mm_struct *mm)	118	void radix__local_flush_tlb_mm(struct mm_struct *mm)
119	{	119	{
120	unsigned int pid;	120	unsigned long pid;
121		121
122	preempt_disable();	122	preempt_disable();
123	pid = mm->context.id;	123	pid = mm->context.id;
@@ -130,7 +130,7 @@ EXPORT_SYMBOL(radix__local_flush_tlb_mm); · 6 unmodified lines
130	void radix___local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,	130	void radix___local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
131	unsigned long ap, int nid)	131	unsigned long ap, int nid)
132	{	132	{
133	unsigned int pid;	133	unsigned long pid;
134		134
135	preempt_disable();	135	preempt_disable();
136	pid = mm ? mm->context.id : 0;	136	pid = mm ? mm->context.id : 0;
@@ -160,7 +160,7 @@ static int mm_is_core_local(struct mm_struct *mm) · 23 unmodified lines
160		160
161	void radix__flush_tlb_mm(struct mm_struct *mm)	161	void radix__flush_tlb_mm(struct mm_struct *mm)
162	{	162	{
163	unsigned int pid;	163	unsigned long pid;
164		164
165	preempt_disable();	165	preempt_disable();
166	pid = mm->context.id;	166	pid = mm->context.id;
@@ -185,7 +185,7 @@ EXPORT_SYMBOL(radix__flush_tlb_mm); · 18 unmodified lines
185	void radix___flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,	185	void radix___flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
186	unsigned long ap, int nid)	186	unsigned long ap, int nid)
187	{	187	{
188	unsigned int pid;	188	unsigned long pid;
189		189
190	preempt_disable();	190	preempt_disable();
191	pid = mm ? mm->context.id : 0;	191	pid = mm ? mm->context.id : 0;

arch/powerpc/platforms/512x/clock-commonclk.c+1−1

@@ -221,7 +221,7 @@ static bool soc_has_mclk_mux0_canin(void) · 220 unmodified lines
221	/* convenience wrappers around the common clk API */	221	/* convenience wrappers around the common clk API */
222	static inline struct clk mpc512x_clk_fixed(const char name, int rate)	222	static inline struct clk mpc512x_clk_fixed(const char name, int rate)
223	{	223	{
224	return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);	224	return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
225	}	225	}
226		226
227	static inline struct clk *mpc512x_clk_factor(	227	static inline struct clk *mpc512x_clk_factor(

arch/powerpc/platforms/cell/spufs/coredump.c+1−1

@@ -172,7 +172,7 @@ static int spufs_arch_write_note(struct spu_context *ctx, int i, · 171 unmodified lines
172	if (rc < 0)	172	if (rc < 0)
173	goto out;	173	goto out;
174		174
175	skip = roundup(cprm->file->f_pos - total + sz, 4) - cprm->file->f_pos;	175	skip = roundup(cprm->pos - total + sz, 4) - cprm->pos;
176	if (!dump_skip(cprm, skip))	176	if (!dump_skip(cprm, skip))
177	goto Eio;	177	goto Eio;
178	out:	178	out:

arch/powerpc/platforms/pseries/iommu.c+2−2

@@ -927,7 +927,7 @@ static int query_ddw(struct pci_dev dev, const u32 ddw_avail, · 926 unmodified lines
927	dn = pci_device_to_OF_node(dev);	927	dn = pci_device_to_OF_node(dev);
928	pdn = PCI_DN(dn);	928	pdn = PCI_DN(dn);
929	buid = pdn->phb->buid;	929	buid = pdn->phb->buid;
930	cfg_addr = (pdn->busno << 8) \| pdn->devfn;	930	cfg_addr = ((pdn->busno << 16) \| (pdn->devfn << 8));
931		931
932	ret = rtas_call(ddw_avail[0], 3, 5, (u32 *)query,	932	ret = rtas_call(ddw_avail[0], 3, 5, (u32 *)query,
933	cfg_addr, BUID_HI(buid), BUID_LO(buid));	933	cfg_addr, BUID_HI(buid), BUID_LO(buid));
@@ -956,7 +956,7 @@ static int create_ddw(struct pci_dev dev, const u32 ddw_avail, · 22 unmodified lines
956	dn = pci_device_to_OF_node(dev);	956	dn = pci_device_to_OF_node(dev);
957	pdn = PCI_DN(dn);	957	pdn = PCI_DN(dn);
958	buid = pdn->phb->buid;	958	buid = pdn->phb->buid;
959	cfg_addr = (pdn->busno << 8) \| pdn->devfn;	959	cfg_addr = ((pdn->busno << 16) \| (pdn->devfn << 8));
960		960
961	do {	961	do {
962	/* extra outputs are LIOBN and dma-addr (hi, lo) */	962	/* extra outputs are LIOBN and dma-addr (hi, lo) */

arch/s390/include/asm/kvm_host.h+1−0

@@ -245,6 +245,7 @@ struct kvm_vcpu_stat { · 244 unmodified lines
245	u32 exit_stop_request;	245	u32 exit_stop_request;
246	u32 exit_validity;	246	u32 exit_validity;
247	u32 exit_instruction;	247	u32 exit_instruction;
		248	u32 exit_pei;
248	u32 halt_successful_poll;	249	u32 halt_successful_poll;
249	u32 halt_attempted_poll;	250	u32 halt_attempted_poll;
250	u32 halt_poll_invalid;	251	u32 halt_poll_invalid;

arch/s390/kvm/intercept.c+2−0

@@ -341,6 +341,8 @@ static int handle_mvpg_pei(struct kvm_vcpu *vcpu) · 340 unmodified lines
341		341
342	static int handle_partial_execution(struct kvm_vcpu *vcpu)	342	static int handle_partial_execution(struct kvm_vcpu *vcpu)
343	{	343	{
		344	vcpu->stat.exit_pei++;
		345
344	if (vcpu->arch.sie_block->ipa == 0xb254) /* MVPG */	346	if (vcpu->arch.sie_block->ipa == 0xb254) /* MVPG */
345	return handle_mvpg_pei(vcpu);	347	return handle_mvpg_pei(vcpu);
346	if (vcpu->arch.sie_block->ipa >> 8 == 0xae) /* SIGP */	348	if (vcpu->arch.sie_block->ipa >> 8 == 0xae) /* SIGP */

arch/s390/kvm/kvm-s390.c+2−1

 	{ "exit_external_request", VCPU_STAT(exit_external_request) },
 	{ "exit_external_interrupt", VCPU_STAT(exit_external_interrupt) },
 	{ "exit_instruction", VCPU_STAT(exit_instruction) },
+	{ "exit_pei", VCPU_STAT(exit_pei) },
 	{ "exit_program_interruption", VCPU_STAT(exit_program_interruption) },
 	{ "exit_instr_and_program_int", VCPU_STAT(exit_instr_and_program) },
 	{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 		kvm->arch.model.cpuid = proc->cpuid;
 		lowest_ibc = sclp.ibc >> 16 & 0xfff;
 		unblocked_ibc = sclp.ibc & 0xfff;
-		if (lowest_ibc) {
+		if (lowest_ibc && proc->ibc) {
 			if (proc->ibc > unblocked_ibc)
 				kvm->arch.model.ibc = unblocked_ibc;
 			else if (proc->ibc < lowest_ibc)

arch/x86/Kconfig+9−0

@@ -2439,6 +2439,15 @@ config PCI_CNB20LE_QUIRK · 2438 unmodified lines
2439		2439
2440	source "drivers/pci/Kconfig"	2440	source "drivers/pci/Kconfig"
2441		2441
		2442	config ISA_BUS
		2443	bool "ISA-style bus support on modern systems" if EXPERT
		2444	select ISA_BUS_API
		2445	help
		2446	Enables ISA-style drivers on modern systems. This is necessary to
		2447	support PC/104 devices on X86_64 platforms.
		2448
		2449	If unsure, say N.
		2450
2442	# x86_64 have no ISA slots, but can have ISA-style DMA.	2451	# x86_64 have no ISA slots, but can have ISA-style DMA.
2443	config ISA_DMA_API	2452	config ISA_DMA_API
2444	bool "ISA-style DMA support" if (X86_64 && EXPERT)	2453	bool "ISA-style DMA support" if (X86_64 && EXPERT)

arch/x86/boot/Makefile+3−0

 	for i in lib lib64 share end ; do \
 		if [ -f /usr/$$i/syslinux/isolinux.bin ] ; then \
 			cp /usr/$$i/syslinux/isolinux.bin $(obj)/isoimage ; \
+			if [ -f /usr/$$i/syslinux/ldlinux.c32 ]; then \
+				cp /usr/$$i/syslinux/ldlinux.c32 $(obj)/isoimage ; \
+			fi ; \
 			break ; \
 		fi ; \
 		if [ $$i = end ] ; then exit 1 ; fi ; \

arch/x86/events/intel/rapl.c+1−1

@@ -714,7 +714,7 @@ static void cleanup_rapl_pmus(void) · 713 unmodified lines
714	int i;	714	int i;
715		715
716	for (i = 0; i < rapl_pmus->maxpkg; i++)	716	for (i = 0; i < rapl_pmus->maxpkg; i++)
717	kfree(rapl_pmus->pmus + i);	717	kfree(rapl_pmus->pmus[i]);
718	kfree(rapl_pmus);	718	kfree(rapl_pmus);
719	}	719	}
720		720

arch/x86/events/intel/uncore_snbep.c+0−21

@@ -2868,27 +2868,10 @@ static struct intel_uncore_type bdx_uncore_cbox = { · 2867 unmodified lines
2868	.format_group = &hswep_uncore_cbox_format_group,	2868	.format_group = &hswep_uncore_cbox_format_group,
2869	};	2869	};
2870		2870
2871	static struct intel_uncore_type bdx_uncore_sbox = {
2872	.name = "sbox",
2873	.num_counters = 4,
2874	.num_boxes = 4,
2875	.perf_ctr_bits = 48,
2876	.event_ctl = HSWEP_S0_MSR_PMON_CTL0,
2877	.perf_ctr = HSWEP_S0_MSR_PMON_CTR0,
2878	.event_mask = HSWEP_S_MSR_PMON_RAW_EVENT_MASK,
2879	.box_ctl = HSWEP_S0_MSR_PMON_BOX_CTL,
2880	.msr_offset = HSWEP_SBOX_MSR_OFFSET,
2881	.ops = &hswep_uncore_sbox_msr_ops,
2882	.format_group = &hswep_uncore_sbox_format_group,
2883	};
2884
2885	#define BDX_MSR_UNCORE_SBOX 3
2886
2887	static struct intel_uncore_type *bdx_msr_uncores[] = {	2871	static struct intel_uncore_type *bdx_msr_uncores[] = {
2888	&bdx_uncore_ubox,	2872	&bdx_uncore_ubox,
2889	&bdx_uncore_cbox,	2873	&bdx_uncore_cbox,
2890	&hswep_uncore_pcu,	2874	&hswep_uncore_pcu,
2891	&bdx_uncore_sbox,
2892	NULL,	2875	NULL,
2893	};	2876	};
2894		2877
@@ -2897,10 +2880,6 @@ void bdx_uncore_cpu_init(void) · 2 unmodified lines
2897	if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)	2880	if (bdx_uncore_cbox.num_boxes > boot_cpu_data.x86_max_cores)
2898	bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;	2881	bdx_uncore_cbox.num_boxes = boot_cpu_data.x86_max_cores;
2899	uncore_msr_uncores = bdx_msr_uncores;	2882	uncore_msr_uncores = bdx_msr_uncores;
2900
2901	/* BDX-DE doesn't have SBOX */
2902	if (boot_cpu_data.x86_model == 86)
2903	uncore_msr_uncores[BDX_MSR_UNCORE_SBOX] = NULL;
2904	}	2883	}
2905		2884
2906	static struct intel_uncore_type bdx_uncore_ha = {	2885	static struct intel_uncore_type bdx_uncore_ha = {

arch/x86/include/asm/intel-family.h+68−0

@@ -0,0 +1,68 @@
	1	#ifndef _ASM_X86_INTEL_FAMILY_H
	2	#define _ASM_X86_INTEL_FAMILY_H
	3
	4	/*
	5	* "Big Core" Processors (Branded as Core, Xeon, etc...)
	6	*
	7	* The "_X" parts are generally the EP and EX Xeons, or the
	8	* "Extreme" ones, like Broadwell-E.
	9	*
	10	* Things ending in "2" are usually because we have no better
	11	* name for them. There's no processor called "WESTMERE2".
	12	*/
	13
	14	#define INTEL_FAM6_CORE_YONAH 0x0E
	15	#define INTEL_FAM6_CORE2_MEROM 0x0F
	16	#define INTEL_FAM6_CORE2_MEROM_L 0x16
	17	#define INTEL_FAM6_CORE2_PENRYN 0x17
	18	#define INTEL_FAM6_CORE2_DUNNINGTON 0x1D
	19
	20	#define INTEL_FAM6_NEHALEM 0x1E
	21	#define INTEL_FAM6_NEHALEM_EP 0x1A
	22	#define INTEL_FAM6_NEHALEM_EX 0x2E
	23	#define INTEL_FAM6_WESTMERE 0x25
	24	#define INTEL_FAM6_WESTMERE2 0x1F
	25	#define INTEL_FAM6_WESTMERE_EP 0x2C
	26	#define INTEL_FAM6_WESTMERE_EX 0x2F
	27
	28	#define INTEL_FAM6_SANDYBRIDGE 0x2A
	29	#define INTEL_FAM6_SANDYBRIDGE_X 0x2D
	30	#define INTEL_FAM6_IVYBRIDGE 0x3A
	31	#define INTEL_FAM6_IVYBRIDGE_X 0x3E
	32
	33	#define INTEL_FAM6_HASWELL_CORE 0x3C
	34	#define INTEL_FAM6_HASWELL_X 0x3F
	35	#define INTEL_FAM6_HASWELL_ULT 0x45
	36	#define INTEL_FAM6_HASWELL_GT3E 0x46
	37
	38	#define INTEL_FAM6_BROADWELL_CORE 0x3D
	39	#define INTEL_FAM6_BROADWELL_XEON_D 0x56
	40	#define INTEL_FAM6_BROADWELL_GT3E 0x47
	41	#define INTEL_FAM6_BROADWELL_X 0x4F
	42
	43	#define INTEL_FAM6_SKYLAKE_MOBILE 0x4E
	44	#define INTEL_FAM6_SKYLAKE_DESKTOP 0x5E
	45	#define INTEL_FAM6_SKYLAKE_X 0x55
	46	#define INTEL_FAM6_KABYLAKE_MOBILE 0x8E
	47	#define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E
	48
	49	/* "Small Core" Processors (Atom) */
	50
	51	#define INTEL_FAM6_ATOM_PINEVIEW 0x1C
	52	#define INTEL_FAM6_ATOM_LINCROFT 0x26
	53	#define INTEL_FAM6_ATOM_PENWELL 0x27
	54	#define INTEL_FAM6_ATOM_CLOVERVIEW 0x35
	55	#define INTEL_FAM6_ATOM_CEDARVIEW 0x36
	56	#define INTEL_FAM6_ATOM_SILVERMONT1 0x37 /* BayTrail/BYT / Valleyview */
	57	#define INTEL_FAM6_ATOM_SILVERMONT2 0x4D /* Avaton/Rangely */
	58	#define INTEL_FAM6_ATOM_AIRMONT 0x4C /* CherryTrail / Braswell */
	59	#define INTEL_FAM6_ATOM_MERRIFIELD1 0x4A /* Tangier */
	60	#define INTEL_FAM6_ATOM_MERRIFIELD2 0x5A /* Annidale */
	61	#define INTEL_FAM6_ATOM_GOLDMONT 0x5C
	62	#define INTEL_FAM6_ATOM_DENVERTON 0x5F /* Goldmont Microserver */
	63
	64	/* Xeon Phi */
	65
	66	#define INTEL_FAM6_XEON_PHI_KNL 0x57 /* Knights Landing */
	67
	68	#endif /* _ASM_X86_INTEL_FAMILY_H */

arch/x86/include/asm/kvm_host.h+11−0

@@ -27,6 +27,7 @@ · 26 unmodified lines
27	#include <linux/irqbypass.h>	27	#include <linux/irqbypass.h>
28	#include <linux/hyperv.h>	28	#include <linux/hyperv.h>
29		29
		30	#include <asm/apic.h>
30	#include <asm/pvclock-abi.h>	31	#include <asm/pvclock-abi.h>
31	#include <asm/desc.h>	32	#include <asm/desc.h>
32	#include <asm/mtrr.h>	33	#include <asm/mtrr.h>
@@ -1368,4 +1369,14 @@ static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) · 1335 unmodified lines
1368		1369
1369	static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}	1370	static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
1370		1371
		1372	static inline int kvm_cpu_get_apicid(int mps_cpu)
		1373	{
		1374	#ifdef CONFIG_X86_LOCAL_APIC
		1375	return __default_cpu_present_to_apicid(mps_cpu);
		1376	#else
		1377	WARN_ON_ONCE(1);
		1378	return BAD_APICID;
		1379	#endif
		1380	}
		1381
1371	#endif /* _ASM_X86_KVM_HOST_H */	1382	#endif /* _ASM_X86_KVM_HOST_H */

arch/x86/include/asm/msr.h+2−2

@@ -122,7 +122,7 @@ notrace static inline void native_write_msr(unsigned int msr, · 121 unmodified lines
122	"2:\n"	122	"2:\n"
123	_ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_wrmsr_unsafe)	123	_ASM_EXTABLE_HANDLE(1b, 2b, ex_handler_wrmsr_unsafe)
124	: : "c" (msr), "a"(low), "d" (high) : "memory");	124	: : "c" (msr), "a"(low), "d" (high) : "memory");
125	if (msr_tracepoint_active(__tracepoint_read_msr))	125	if (msr_tracepoint_active(__tracepoint_write_msr))
126	do_trace_write_msr(msr, ((u64)high << 32 \| low), 0);	126	do_trace_write_msr(msr, ((u64)high << 32 \| low), 0);
127	}	127	}
128		128
@@ -141,7 +141,7 @@ notrace static inline int native_write_msr_safe(unsigned int msr, · 12 unmodified lines
141	: "c" (msr), "0" (low), "d" (high),	141	: "c" (msr), "0" (low), "d" (high),
142	[fault] "i" (-EIO)	142	[fault] "i" (-EIO)
143	: "memory");	143	: "memory");
144	if (msr_tracepoint_active(__tracepoint_read_msr))	144	if (msr_tracepoint_active(__tracepoint_write_msr))
145	do_trace_write_msr(msr, ((u64)high << 32 \| low), err);	145	do_trace_write_msr(msr, ((u64)high << 32 \| low), err);
146	return err;	146	return err;
147	}	147	}

arch/x86/kernel/apic/io_apic.c+1−1

 		res[num].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
 		snprintf(mem, IOAPIC_RESOURCE_NAME_SIZE, "IOAPIC %u", i);
 		mem += IOAPIC_RESOURCE_NAME_SIZE;
+		ioapics[i].iomem_res = &res[num];
 		num++;
-		ioapics[i].iomem_res = res;
 	}
 	ioapic_resources = res;

arch/x86/kernel/cpu/amd.c+2−2

@@ -674,14 +674,14 @@ static void init_amd_bd(struct cpuinfo_x86 *c) · 673 unmodified lines
674	u64 value;	674	u64 value;
675		675
676	/* re-enable TopologyExtensions if switched off by BIOS */	676	/* re-enable TopologyExtensions if switched off by BIOS */
677	if ((c->x86_model >= 0x10) && (c->x86_model <= 0x1f) &&	677	if ((c->x86_model >= 0x10) && (c->x86_model <= 0x6f) &&
678	!cpu_has(c, X86_FEATURE_TOPOEXT)) {	678	!cpu_has(c, X86_FEATURE_TOPOEXT)) {
679		679
680	if (msr_set_bit(0xc0011005, 54) > 0) {	680	if (msr_set_bit(0xc0011005, 54) > 0) {
681	rdmsrl(0xc0011005, value);	681	rdmsrl(0xc0011005, value);
682	if (value & BIT_64(54)) {	682	if (value & BIT_64(54)) {
683	set_cpu_cap(c, X86_FEATURE_TOPOEXT);	683	set_cpu_cap(c, X86_FEATURE_TOPOEXT);
684	pr_info(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");	684	pr_info_once(FW_INFO "CPU: Re-enabling disabled Topology Extensions Support.\n");
685	}	685	}
686	}	686	}
687	}	687	}

arch/x86/kernel/traps.c+10−10

 		local_irq_disable();
 }
+/*
+ * In IST context, we explicitly disable preemption.  This serves two
+ * purposes: it makes it much less likely that we would accidentally
+ * schedule in IST context and it will force a warning if we somehow
+ * manage to schedule by accident.
+ */
 void ist_enter(struct pt_regs *regs)
 {
 	if (user_mode(regs)) {
 		rcu_nmi_enter();
 	}
-	/*
+	preempt_disable();
-	 * We are atomic because we're on the IST stack; or we're on
-	 * x86_32, in which case we still shouldn't schedule; or we're
-	 * on x86_64 and entered from user mode, in which case we're
-	 * still atomic unless ist_begin_non_atomic is called.
-	 */
-	preempt_count_add(HARDIRQ_OFFSET);
 	/* This code is a bit fragile.  Test it. */
 	RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
 void ist_exit(struct pt_regs *regs)
 {
-	preempt_count_sub(HARDIRQ_OFFSET);
+	preempt_enable_no_resched();
 	if (!user_mode(regs))
 		rcu_nmi_exit();
 	BUG_ON((unsigned long)(current_top_of_stack() -
 			       current_stack_pointer()) >= THREAD_SIZE);
-	preempt_count_sub(HARDIRQ_OFFSET);
+	preempt_enable_no_resched();
 }
 /**
  */
 void ist_end_non_atomic(void)
 {
-	preempt_count_add(HARDIRQ_OFFSET);
+	preempt_disable();
 }
 static nokprobe_inline int

arch/x86/kvm/svm.c+13−8

@@ -238,7 +238,9 @@ module_param(nested, int, S_IRUGO); · 237 unmodified lines
238		238
239	/* enable / disable AVIC */	239	/* enable / disable AVIC */
240	static int avic;	240	static int avic;
		241	#ifdef CONFIG_X86_LOCAL_APIC
241	module_param(avic, int, S_IRUGO);	242	module_param(avic, int, S_IRUGO);
		243	#endif
242		244
243	static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);	245	static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
244	static void svm_flush_tlb(struct kvm_vcpu *vcpu);	246	static void svm_flush_tlb(struct kvm_vcpu *vcpu);
@@ -981,11 +983,14 @@ static __init int svm_hardware_setup(void) · 736 unmodified lines
981	} else	983	} else
982	kvm_disable_tdp();	984	kvm_disable_tdp();
983		985
984	if (avic && (!npt_enabled \|\| !boot_cpu_has(X86_FEATURE_AVIC)))	986	if (avic) {
985	avic = false;	987	if (!npt_enabled \|\|
986		988	!boot_cpu_has(X86_FEATURE_AVIC) \|\|
987	if (avic)	989	!IS_ENABLED(CONFIG_X86_LOCAL_APIC))
988	pr_info("AVIC enabled\n");	990	avic = false;
		991	else
		992	pr_info("AVIC enabled\n");
		993	}
989		994
990	return 0;	995	return 0;
991		996
@@ -1324,7 +1329,7 @@ free_avic: · 332 unmodified lines
1324	static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)	1329	static void avic_set_running(struct kvm_vcpu *vcpu, bool is_run)
1325	{	1330	{
1326	u64 entry;	1331	u64 entry;
1327	int h_physical_id = __default_cpu_present_to_apicid(vcpu->cpu);	1332	int h_physical_id = kvm_cpu_get_apicid(vcpu->cpu);
1328	struct vcpu_svm *svm = to_svm(vcpu);	1333	struct vcpu_svm *svm = to_svm(vcpu);
1329		1334
1330	if (!kvm_vcpu_apicv_active(vcpu))	1335	if (!kvm_vcpu_apicv_active(vcpu))
@@ -1349,7 +1354,7 @@ static void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) · 18 unmodified lines
1349	{	1354	{
1350	u64 entry;	1355	u64 entry;
1351	/* ID = 0xff (broadcast), ID > 0xff (reserved) */	1356	/* ID = 0xff (broadcast), ID > 0xff (reserved) */
1352	int h_physical_id = __default_cpu_present_to_apicid(cpu);	1357	int h_physical_id = kvm_cpu_get_apicid(cpu);
1353	struct vcpu_svm *svm = to_svm(vcpu);	1358	struct vcpu_svm *svm = to_svm(vcpu);
1354		1359
1355	if (!kvm_vcpu_apicv_active(vcpu))	1360	if (!kvm_vcpu_apicv_active(vcpu))
@@ -4236,7 +4241,7 @@ static void svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec) · 2880 unmodified lines
4236		4241
4237	if (avic_vcpu_is_running(vcpu))	4242	if (avic_vcpu_is_running(vcpu))
4238	wrmsrl(SVM_AVIC_DOORBELL,	4243	wrmsrl(SVM_AVIC_DOORBELL,
4239	__default_cpu_present_to_apicid(vcpu->cpu));	4244	kvm_cpu_get_apicid(vcpu->cpu));
4240	else	4245	else
4241	kvm_vcpu_wake_up(vcpu);	4246	kvm_vcpu_wake_up(vcpu);
4242	}	4247	}

arch/x86/kvm/vmx.c+10−5

 	unsigned int dest;
 	if (!kvm_arch_has_assigned_device(vcpu->kvm) ||
-		!irq_remapping_cap(IRQ_POSTING_CAP))
+		!irq_remapping_cap(IRQ_POSTING_CAP)  ||
+		!kvm_vcpu_apicv_active(vcpu))
 		return;
 	do {
 	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
 	if (!kvm_arch_has_assigned_device(vcpu->kvm) ||
-		!irq_remapping_cap(IRQ_POSTING_CAP))
+		!irq_remapping_cap(IRQ_POSTING_CAP)  ||
+		!kvm_vcpu_apicv_active(vcpu))
 		return;
 	/* Set SN when the vCPU is preempted */
 	struct pi_desc *pi_desc = vcpu_to_pi_desc(vcpu);
 	if (!kvm_arch_has_assigned_device(vcpu->kvm) ||
-		!irq_remapping_cap(IRQ_POSTING_CAP))
+		!irq_remapping_cap(IRQ_POSTING_CAP)  ||
+		!kvm_vcpu_apicv_active(vcpu))
 		return 0;
 	vcpu->pre_pcpu = vcpu->cpu;
 	unsigned long flags;
 	if (!kvm_arch_has_assigned_device(vcpu->kvm) ||
-		!irq_remapping_cap(IRQ_POSTING_CAP))
+		!irq_remapping_cap(IRQ_POSTING_CAP)  ||
+		!kvm_vcpu_apicv_active(vcpu))
 		return;
 	do {
 	int idx, ret = -EINVAL;
 	if (!kvm_arch_has_assigned_device(kvm) ||
-		!irq_remapping_cap(IRQ_POSTING_CAP))
+		!irq_remapping_cap(IRQ_POSTING_CAP) ||
+		!kvm_vcpu_apicv_active(kvm->vcpus[0]))
 		return 0;
 	idx = srcu_read_lock(&kvm->irq_srcu);

block/blk-lib.c+9−3

 		ret = submit_bio_wait(type, bio);
 		if (ret == -EOPNOTSUPP)
 			ret = 0;
+		bio_put(bio);
 	}
 	blk_finish_plug(&plug);
 		}
 	}
-	if (bio)
+	if (bio) {
 		ret = submit_bio_wait(REQ_WRITE | REQ_WRITE_SAME, bio);
+		bio_put(bio);
+	}
 	return ret != -EOPNOTSUPP ? ret : 0;
 }
 EXPORT_SYMBOL(blkdev_issue_write_same);
 		}
 	}
-	if (bio)
+	if (bio) {
-		return submit_bio_wait(WRITE, bio);
+		ret = submit_bio_wait(WRITE, bio);
+		bio_put(bio);
+		return ret;
+	}
 	return 0;
 }

block/blk-mq.c+8−9

 	blk_queue_split(q, &bio, q->bio_split);
-	if (!is_flush_fua && !blk_queue_nomerges(q)) {
+	if (!is_flush_fua && !blk_queue_nomerges(q) &&
-		if (blk_attempt_plug_merge(q, bio, &request_count,
+	    blk_attempt_plug_merge(q, bio, &request_count, &same_queue_rq))
-					   &same_queue_rq))
+		return BLK_QC_T_NONE;
-			return BLK_QC_T_NONE;
-	} else
-		request_count = blk_plug_queued_count(q);
 	rq = blk_mq_map_request(q, bio, &data);
 	if (unlikely(!rq))
 	blk_queue_split(q, &bio, q->bio_split);
-	if (!is_flush_fua && !blk_queue_nomerges(q) &&
+	if (!is_flush_fua && !blk_queue_nomerges(q)) {
-	    blk_attempt_plug_merge(q, bio, &request_count, NULL))
+		if (blk_attempt_plug_merge(q, bio, &request_count, NULL))
-		return BLK_QC_T_NONE;
+			return BLK_QC_T_NONE;
+	} else
+		request_count = blk_plug_queued_count(q);
 	rq = blk_mq_map_request(q, bio, &data);
 	if (unlikely(!rq))

drivers/acpi/acpica/hwregs.c+9−137

@@ -306,12 +306,6 @@ acpi_status acpi_hw_read(u32 value, struct acpi_generic_address reg) · 305 unmodified lines
306	acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)	306	acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
307	{	307	{
308	u64 address;	308	u64 address;
309	u8 access_width;
310	u32 bit_width;
311	u8 bit_offset;
312	u64 value64;
313	u32 new_value32, old_value32;
314	u8 index;
315	acpi_status status;	309	acpi_status status;
316		310
317	ACPI_FUNCTION_NAME(hw_write);	311	ACPI_FUNCTION_NAME(hw_write);
@@ -323,145 +317,23 @@ acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg) · 5 unmodified lines
323	return (status);	317	return (status);
324	}	318	}
325		319
326	/* Convert access_width into number of bits based */
327
328	access_width = acpi_hw_get_access_bit_width(reg, 32);
329	bit_width = reg->bit_offset + reg->bit_width;
330	bit_offset = reg->bit_offset;
331
332	/*	320	/*
333	* Two address spaces supported: Memory or IO. PCI_Config is	321	* Two address spaces supported: Memory or IO. PCI_Config is
334	* not supported here because the GAS structure is insufficient	322	* not supported here because the GAS structure is insufficient
335	*/	323	*/
336	index = 0;	324	if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
337	while (bit_width) {	325	status = acpi_os_write_memory((acpi_physical_address)
338	/*	326	address, (u64)value,
339	* Use offset style bit reads because "Index * AccessWidth" is	327	reg->bit_width);
340	* ensured to be less than 32-bits by acpi_hw_validate_register().	328	} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
341	*/	329
342	new_value32 = ACPI_GET_BITS(&value, index * access_width,	330	status = acpi_hw_write_port((acpi_io_address)
343	ACPI_MASK_BITS_ABOVE_32	331	address, value, reg->bit_width);
344	(access_width));
345
346	if (bit_offset >= access_width) {
347	bit_offset -= access_width;
348	} else {
349	/*
350	* Use offset style bit masks because access_width is ensured
351	* to be less than 32-bits by acpi_hw_validate_register() and
352	* bit_offset/bit_width is less than access_width here.
353	*/
354	if (bit_offset) {
355	new_value32 &= ACPI_MASK_BITS_BELOW(bit_offset);
356	}
357	if (bit_width < access_width) {
358	new_value32 &= ACPI_MASK_BITS_ABOVE(bit_width);
359	}
360
361	if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
362	if (bit_offset \|\| bit_width < access_width) {
363	/*
364	* Read old values in order not to modify the bits that
365	* are beyond the register bit_width/bit_offset setting.
366	*/
367	status =
368	acpi_os_read_memory((acpi_physical_address)
369	address +
370	index *
371	ACPI_DIV_8
372	(access_width),
373	&value64,
374	access_width);
375	old_value32 = (u32)value64;
376
377	/*
378	* Use offset style bit masks because access_width is
379	* ensured to be less than 32-bits by
380	* acpi_hw_validate_register() and bit_offset/bit_width is
381	* less than access_width here.
382	*/
383	if (bit_offset) {
384	old_value32 &=
385	ACPI_MASK_BITS_ABOVE
386	(bit_offset);
387	bit_offset = 0;
388	}
389	if (bit_width < access_width) {
390	old_value32 &=
391	ACPI_MASK_BITS_BELOW
392	(bit_width);
393	}
394
395	new_value32 \|= old_value32;
396	}
397
398	value64 = (u64)new_value32;
399	status =
400	acpi_os_write_memory((acpi_physical_address)
401	address +
402	index *
403	ACPI_DIV_8
404	(access_width),
405	value64, access_width);
406	} else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
407
408	if (bit_offset \|\| bit_width < access_width) {
409	/*
410	* Read old values in order not to modify the bits that
411	* are beyond the register bit_width/bit_offset setting.
412	*/
413	status =
414	acpi_hw_read_port((acpi_io_address)
415	address +
416	index *
417	ACPI_DIV_8
418	(access_width),
419	&old_value32,
420	access_width);
421
422	/*
423	* Use offset style bit masks because access_width is
424	* ensured to be less than 32-bits by
425	* acpi_hw_validate_register() and bit_offset/bit_width is
426	* less than access_width here.
427	*/
428	if (bit_offset) {
429	old_value32 &=
430	ACPI_MASK_BITS_ABOVE
431	(bit_offset);
432	bit_offset = 0;
433	}
434	if (bit_width < access_width) {
435	old_value32 &=
436	ACPI_MASK_BITS_BELOW
437	(bit_width);
438	}
439
440	new_value32 \|= old_value32;
441	}
442
443	status = acpi_hw_write_port((acpi_io_address)
444	address +
445	index *
446	ACPI_DIV_8
447	(access_width),
448	new_value32,
449	access_width);
450	}
451	}
452
453	/*
454	* Index * access_width is ensured to be less than 32-bits by
455	* acpi_hw_validate_register().
456	*/
457	bit_width -=
458	bit_width > access_width ? access_width : bit_width;
459	index++;
460	}	332	}
461		333
462	ACPI_DEBUG_PRINT((ACPI_DB_IO,	334	ACPI_DEBUG_PRINT((ACPI_DB_IO,
463	"Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",	335	"Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
464	value, access_width, ACPI_FORMAT_UINT64(address),	336	value, reg->bit_width, ACPI_FORMAT_UINT64(address),
465	acpi_ut_get_region_name(reg->space_id)));	337	acpi_ut_get_region_name(reg->space_id)));
466		338
467	return (status);	339	return (status);

drivers/acpi/bus.c+1−1

@@ -1051,7 +1051,7 @@ static int __init acpi_bus_init(void) · 1050 unmodified lines
1051	* Maybe EC region is required at bus_scan/acpi_get_devices. So it	1051	* Maybe EC region is required at bus_scan/acpi_get_devices. So it
1052	* is necessary to enable it as early as possible.	1052	* is necessary to enable it as early as possible.
1053	*/	1053	*/
1054	acpi_boot_ec_enable();	1054	acpi_ec_dsdt_probe();
1055		1055
1056	printk(KERN_INFO PREFIX "Interpreter enabled\n");	1056	printk(KERN_INFO PREFIX "Interpreter enabled\n");
1057		1057

drivers/acpi/ec.c+22−7

 	return AE_OK;
 }
-int __init acpi_boot_ec_enable(void)
+static const struct acpi_device_id ec_device_ids[] = {
+	{"PNP0C09", 0},
+	{"", 0},
+};
+int __init acpi_ec_dsdt_probe(void)
 {
-	if (!boot_ec)
+	acpi_status status;
+	if (boot_ec)
 		return 0;
+	/*
+	 * Finding EC from DSDT if there is no ECDT EC available. When this
+	 * function is invoked, ACPI tables have been fully loaded, we can
+	 * walk namespace now.
+	 */
+	boot_ec = make_acpi_ec();
+	if (!boot_ec)
+		return -ENOMEM;
+	status = acpi_get_devices(ec_device_ids[0].id,
+				  ec_parse_device, boot_ec, NULL);
+	if (ACPI_FAILURE(status) || !boot_ec->handle)
+		return -ENODEV;
 	if (!ec_install_handlers(boot_ec)) {
 		first_ec = boot_ec;
 		return 0;
 	return -EFAULT;
 }
-static const struct acpi_device_id ec_device_ids[] = {
-	{"PNP0C09", 0},
-	{"", 0},
-};
 #if 0
 /*
  * Some EC firmware variations refuses to respond QR_EC when SCI_EVT is not

drivers/acpi/internal.h+1−1

@@ -181,7 +181,7 @@ typedef int (acpi_ec_query_func) (void data); · 180 unmodified lines
181		181
182	int acpi_ec_init(void);	182	int acpi_ec_init(void);
183	int acpi_ec_ecdt_probe(void);	183	int acpi_ec_ecdt_probe(void);
184	int acpi_boot_ec_enable(void);	184	int acpi_ec_dsdt_probe(void);
185	void acpi_ec_block_transactions(void);	185	void acpi_ec_block_transactions(void);
186	void acpi_ec_unblock_transactions(void);	186	void acpi_ec_unblock_transactions(void);
187	void acpi_ec_unblock_transactions_early(void);	187	void acpi_ec_unblock_transactions_early(void);

drivers/base/Makefile+1−1

@@ -10,7 +10,7 @@ obj-$(CONFIG_DMA_CMA) += dma-contiguous.o · 9 unmodified lines
10	obj-y += power/	10	obj-y += power/
11	obj-$(CONFIG_HAS_DMA) += dma-mapping.o	11	obj-$(CONFIG_HAS_DMA) += dma-mapping.o
12	obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o	12	obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o
13	obj-$(CONFIG_ISA) += isa.o	13	obj-$(CONFIG_ISA_BUS_API) += isa.o
14	obj-$(CONFIG_FW_LOADER) += firmware_class.o	14	obj-$(CONFIG_FW_LOADER) += firmware_class.o
15	obj-$(CONFIG_NUMA) += node.o	15	obj-$(CONFIG_NUMA) += node.o
16	obj-$(CONFIG_MEMORY_HOTPLUG_SPARSE) += memory.o	16	obj-$(CONFIG_MEMORY_HOTPLUG_SPARSE) += memory.o

drivers/base/isa.c+1−1

@@ -180,4 +180,4 @@ static int __init isa_bus_init(void) · 179 unmodified lines
180	return error;	180	return error;
181	}	181	}
182		182
183	device_initcall(isa_bus_init);	183	postcore_initcall(isa_bus_init);

drivers/base/module.c+5−3

 static void module_create_drivers_dir(struct module_kobject *mk)
 {
-	if (!mk || mk->drivers_dir)
+	static DEFINE_MUTEX(drivers_dir_mutex);
-		return;
-	mk->drivers_dir = kobject_create_and_add("drivers", &mk->kobj);
+	mutex_lock(&drivers_dir_mutex);
+	if (mk && !mk->drivers_dir)
+		mk->drivers_dir = kobject_create_and_add("drivers", &mk->kobj);
+	mutex_unlock(&drivers_dir_mutex);
 }
 void module_add_driver(struct module *mod, struct device_driver *drv)

drivers/base/power/opp/cpu.c+9−3

 		}
 		/* Mark opp-table as multiple CPUs are sharing it now */
-		opp_table->shared_opp = true;
+		opp_table->shared_opp = OPP_TABLE_ACCESS_SHARED;
 	}
 unlock:
 	mutex_unlock(&opp_table_lock);
  *
  * This updates the @cpumask with CPUs that are sharing OPPs with @cpu_dev.
  *
- * Returns -ENODEV if OPP table isn't already present.
+ * Returns -ENODEV if OPP table isn't already present and -EINVAL if the OPP
+ * table's status is access-unknown.
  *
  * Locking: The internal opp_table and opp structures are RCU protected.
  * Hence this function internally uses RCU updater strategy with mutex locks
 		goto unlock;
 	}
+	if (opp_table->shared_opp == OPP_TABLE_ACCESS_UNKNOWN) {
+		ret = -EINVAL;
+		goto unlock;
+	}
 	cpumask_clear(cpumask);
-	if (opp_table->shared_opp) {
+	if (opp_table->shared_opp == OPP_TABLE_ACCESS_SHARED) {
 		list_for_each_entry(opp_dev, &opp_table->dev_list, node)
 			cpumask_set_cpu(opp_dev->dev->id, cpumask);
 	} else {

drivers/base/power/opp/of.c+8−2

 			 * But the OPPs will be considered as shared only if the
 			 * OPP table contains a "opp-shared" property.
 			 */
-			return opp_table->shared_opp ? opp_table : NULL;
+			if (opp_table->shared_opp == OPP_TABLE_ACCESS_SHARED)
+				return opp_table;
+			return NULL;
 		}
 	}
 	}
 	opp_table->np = opp_np;
-	opp_table->shared_opp = of_property_read_bool(opp_np, "opp-shared");
+	if (of_property_read_bool(opp_np, "opp-shared"))
+		opp_table->shared_opp = OPP_TABLE_ACCESS_SHARED;
+	else
+		opp_table->shared_opp = OPP_TABLE_ACCESS_EXCLUSIVE;
 	mutex_unlock(&opp_table_lock);

drivers/base/power/opp/opp.h+7−1

 #endif
 };
+enum opp_table_access {
+	OPP_TABLE_ACCESS_UNKNOWN = 0,
+	OPP_TABLE_ACCESS_EXCLUSIVE = 1,
+	OPP_TABLE_ACCESS_SHARED = 2,
+};
 /**
  * struct opp_table - Device opp structure
  * @node:	table node - contains the devices with OPPs that
 	/* For backward compatibility with v1 bindings */
 	unsigned int voltage_tolerance_v1;
-	bool shared_opp;
+	enum opp_table_access shared_opp;
 	struct dev_pm_opp *suspend_opp;
 	unsigned int *supported_hw;

drivers/block/nbd.c+1−1

@@ -941,7 +941,7 @@ static int nbd_dev_dbg_init(struct nbd_device *nbd) · 940 unmodified lines
941	debugfs_create_u64("size_bytes", 0444, dir, &nbd->bytesize);	941	debugfs_create_u64("size_bytes", 0444, dir, &nbd->bytesize);
942	debugfs_create_u32("timeout", 0444, dir, &nbd->xmit_timeout);	942	debugfs_create_u32("timeout", 0444, dir, &nbd->xmit_timeout);
943	debugfs_create_u32("blocksize", 0444, dir, &nbd->blksize);	943	debugfs_create_u32("blocksize", 0444, dir, &nbd->blksize);
944	debugfs_create_file("flags", 0444, dir, &nbd, &nbd_dbg_flags_ops);	944	debugfs_create_file("flags", 0444, dir, nbd, &nbd_dbg_flags_ops);
945		945
946	return 0;	946	return 0;
947	}	947	}

drivers/block/xen-blkfront.c+22−13

 			  const struct blk_mq_queue_data *qd)
 {
 	unsigned long flags;
-	struct blkfront_ring_info *rinfo = (struct blkfront_ring_info *)hctx->driver_data;
+	int qid = hctx->queue_num;
+	struct blkfront_info *info = hctx->queue->queuedata;
+	struct blkfront_ring_info *rinfo = NULL;
+	BUG_ON(info->nr_rings <= qid);
+	rinfo = &info->rinfo[qid];
 	blk_mq_start_request(qd->rq);
 	spin_lock_irqsave(&rinfo->ring_lock, flags);
 	if (RING_FULL(&rinfo->ring))
 	return BLK_MQ_RQ_QUEUE_BUSY;
 }
-static int blk_mq_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
-			    unsigned int index)
-{
-	struct blkfront_info *info = (struct blkfront_info *)data;
-	BUG_ON(info->nr_rings <= index);
-	hctx->driver_data = &info->rinfo[index];
-	return 0;
-}
 static struct blk_mq_ops blkfront_mq_ops = {
 	.queue_rq = blkif_queue_rq,
 	.map_queue = blk_mq_map_queue,
-	.init_hctx = blk_mq_init_hctx,
 };
 static int xlvbd_init_blk_queue(struct gendisk *gd, u16 sector_size,
 		return PTR_ERR(rq);
 	}
+	rq->queuedata = info;
 	queue_flag_set_unlocked(QUEUE_FLAG_VIRT, rq);
 	if (info->feature_discard) {
 		return err;
 	err = talk_to_blkback(dev, info);
+	if (!err)
+		blk_mq_update_nr_hw_queues(&info->tag_set, info->nr_rings);
 	/*
 	 * We have to wait for the backend to switch to
 		break;
 	case XenbusStateConnected:
-		if (dev->state != XenbusStateInitialised) {
+		/*
+		 * talk_to_blkback sets state to XenbusStateInitialised
+		 * and blkfront_connect sets it to XenbusStateConnected
+		 * (if connection went OK).
+		 *
+		 * If the backend (or toolstack) decides to poke at backend
+		 * state (and re-trigger the watch by setting the state repeatedly
+		 * to XenbusStateConnected (4)) we need to deal with this.
+		 * This is allowed as this is used to communicate to the guest
+		 * that the size of disk has changed!
+		 */
+		if ((dev->state != XenbusStateInitialised) &&
+		    (dev->state != XenbusStateConnected)) {
 			if (talk_to_blkback(dev, info))
 				break;
 		}
 		blkfront_connect(info);
 		break;

drivers/char/ipmi/ipmi_msghandler.c+6−2

 	while (!list_empty(&intf->waiting_rcv_msgs)) {
 		smi_msg = list_entry(intf->waiting_rcv_msgs.next,
 				     struct ipmi_smi_msg, link);
+		list_del(&smi_msg->link);
 		if (!run_to_completion)
 			spin_unlock_irqrestore(&intf->waiting_rcv_msgs_lock,
 					       flags);
 		if (rv > 0) {
 			/*
 			 * To preserve message order, quit if we
-			 * can't handle a message.
+			 * can't handle a message.  Add the message
+			 * back at the head, this is safe because this
+			 * tasklet is the only thing that pulls the
+			 * messages.
 			 */
+			list_add(&smi_msg->link, &intf->waiting_rcv_msgs);
 			break;
 		} else {
-			list_del(&smi_msg->link);
 			if (rv == 0)
 				/* Message handled */
 				ipmi_free_smi_msg(smi_msg);

drivers/clk/Kconfig+1−0

@@ -175,6 +175,7 @@ config COMMON_CLK_KEYSTONE · 174 unmodified lines
175	config COMMON_CLK_NXP	175	config COMMON_CLK_NXP
176	def_bool COMMON_CLK && (ARCH_LPC18XX \|\| ARCH_LPC32XX)	176	def_bool COMMON_CLK && (ARCH_LPC18XX \|\| ARCH_LPC32XX)
177	select REGMAP_MMIO if ARCH_LPC32XX	177	select REGMAP_MMIO if ARCH_LPC32XX
		178	select MFD_SYSCON if ARCH_LPC18XX
178	---help---	179	---help---
179	Support for clock providers on NXP platforms.	180	Support for clock providers on NXP platforms.
180		181

drivers/clk/microchip/clk-pic32mzda.c+5−5

drivers/cpufreq/intel_pstate.c+11−23

 	return acpi_ppc;
 }
-/*
- * The max target pstate ratio is a 8 bit value in both PLATFORM_INFO MSR and
- * in TURBO_RATIO_LIMIT MSR, which pstate driver stores in max_pstate and
- * max_turbo_pstate fields. The PERF_CTL MSR contains 16 bit value for P state
- * ratio, out of it only high 8 bits are used. For example 0x1700 is setting
- * target ratio 0x17. The _PSS control value stores in a format which can be
- * directly written to PERF_CTL MSR. But in intel_pstate driver this shift
- * occurs during write to PERF_CTL (E.g. for cores core_set_pstate()).
- * This function converts the _PSS control value to intel pstate driver format
- * for comparison and assignment.
- */
-static int convert_to_native_pstate_format(struct cpudata *cpu, int index)
-{
-	return cpu->acpi_perf_data.states[index].control >> 8;
-}
 static void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *policy)
 {
 	struct cpudata *cpu;
-	int turbo_pss_ctl;
 	int ret;
 	int i;
 	 * max frequency, which will cause a reduced performance as
 	 * this driver uses real max turbo frequency as the max
 	 * frequency. So correct this frequency in _PSS table to
-	 * correct max turbo frequency based on the turbo ratio.
+	 * correct max turbo frequency based on the turbo state.
 	 * Also need to convert to MHz as _PSS freq is in MHz.
 	 */
-	turbo_pss_ctl = convert_to_native_pstate_format(cpu, 0);
+	if (!limits->turbo_disabled)
-	if (turbo_pss_ctl > cpu->pstate.max_pstate)
 		cpu->acpi_perf_data.states[0].core_frequency =
 					policy->cpuinfo.max_freq / 1000;
 	cpu->valid_pss_table = true;
 	intel_pstate_clear_update_util_hook(policy->cpu);
+	pr_debug("set_policy cpuinfo.max %u policy->max %u\n",
+		 policy->cpuinfo.max_freq, policy->max);
 	cpu = all_cpu_data[0];
 	if (cpu->pstate.max_pstate_physical > cpu->pstate.max_pstate &&
 	    policy->max < policy->cpuinfo.max_freq &&
 				   limits->max_sysfs_pct);
 	limits->max_perf_pct = max(limits->min_policy_pct,
 				   limits->max_perf_pct);
-	limits->max_perf = round_up(limits->max_perf, FRAC_BITS);
 	/* Make sure min_perf_pct <= max_perf_pct */
 	limits->min_perf_pct = min(limits->max_perf_pct, limits->min_perf_pct);
 	limits->min_perf = div_fp(limits->min_perf_pct, 100);
 	limits->max_perf = div_fp(limits->max_perf_pct, 100);
+	limits->max_perf = round_up(limits->max_perf, FRAC_BITS);
  out:
 	intel_pstate_set_update_util_hook(policy->cpu);
 	/* cpuinfo and default policy values */
 	policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling;
-	policy->cpuinfo.max_freq =
+	update_turbo_state();
-		cpu->pstate.turbo_pstate * cpu->pstate.scaling;
+	policy->cpuinfo.max_freq = limits->turbo_disabled ?
+			cpu->pstate.max_pstate : cpu->pstate.turbo_pstate;
+	policy->cpuinfo.max_freq *= cpu->pstate.scaling;
 	intel_pstate_init_acpi_perf_limits(policy);
 	policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 	cpumask_set_cpu(policy->cpu, policy->cpus);

drivers/dma/at_xdmac.c+57−25

@@ -242,7 +242,7 @@ struct at_xdmac_lld { · 241 unmodified lines
242	u32 mbr_dus; /* Destination Microblock Stride Register */	242	u32 mbr_dus; /* Destination Microblock Stride Register */
243	};	243	};
244		244
245		245	/* 64-bit alignment needed to update CNDA and CUBC registers in an atomic way. */
246	struct at_xdmac_desc {	246	struct at_xdmac_desc {
247	struct at_xdmac_lld lld;	247	struct at_xdmac_lld lld;
248	enum dma_transfer_direction direction;	248	enum dma_transfer_direction direction;
@@ -253,7 +253,7 @@ struct at_xdmac_desc { · 4 unmodified lines
253	unsigned int xfer_size;	253	unsigned int xfer_size;
254	struct list_head descs_list;	254	struct list_head descs_list;
255	struct list_head xfer_node;	255	struct list_head xfer_node;
256	};	256	} __aligned(sizeof(u64));
257		257
258	static inline void __iomem at_xdmac_chan_reg_base(struct at_xdmac atxdmac, unsigned int chan_nb)	258	static inline void __iomem at_xdmac_chan_reg_base(struct at_xdmac atxdmac, unsigned int chan_nb)
259	{	259	{
@@ -1400,6 +1400,7 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 1140 unmodified lines
1400	u32 cur_nda, check_nda, cur_ubc, mask, value;	1400	u32 cur_nda, check_nda, cur_ubc, mask, value;
1401	u8 dwidth = 0;	1401	u8 dwidth = 0;
1402	unsigned long flags;	1402	unsigned long flags;
		1403	bool initd;
1403		1404
1404	ret = dma_cookie_status(chan, cookie, txstate);	1405	ret = dma_cookie_status(chan, cookie, txstate);
1405	if (ret == DMA_COMPLETE)	1406	if (ret == DMA_COMPLETE)
@@ -1424,7 +1425,16 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 18 unmodified lines
1424	residue = desc->xfer_size;	1425	residue = desc->xfer_size;
1425	/*	1426	/*
1426	* Flush FIFO: only relevant when the transfer is source peripheral	1427	* Flush FIFO: only relevant when the transfer is source peripheral
1427	* synchronized.	1428	* synchronized. Flush is needed before reading CUBC because data in
		1429	* the FIFO are not reported by CUBC. Reporting a residue of the
		1430	* transfer length while we have data in FIFO can cause issue.
		1431	* Usecase: atmel USART has a timeout which means I have received
		1432	* characters but there is no more character received for a while. On
		1433	* timeout, it requests the residue. If the data are in the DMA FIFO,
		1434	* we will return a residue of the transfer length. It means no data
		1435	* received. If an application is waiting for these data, it will hang
		1436	* since we won't have another USART timeout without receiving new
		1437	* data.
1428	*/	1438	*/
1429	mask = AT_XDMAC_CC_TYPE \| AT_XDMAC_CC_DSYNC;	1439	mask = AT_XDMAC_CC_TYPE \| AT_XDMAC_CC_DSYNC;
1430	value = AT_XDMAC_CC_TYPE_PER_TRAN \| AT_XDMAC_CC_DSYNC_PER2MEM;	1440	value = AT_XDMAC_CC_TYPE_PER_TRAN \| AT_XDMAC_CC_DSYNC_PER2MEM;
@@ -1435,34 +1445,43 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 4 unmodified lines
1435	}	1445	}
1436		1446
1437	/*	1447	/*
1438	* When processing the residue, we need to read two registers but we	1448	* The easiest way to compute the residue should be to pause the DMA
1439	* can't do it in an atomic way. AT_XDMAC_CNDA is used to find where	1449	* but doing this can lead to miss some data as some devices don't
1440	* we stand in the descriptor list and AT_XDMAC_CUBC is used	1450	* have FIFO.
1441	* to know how many data are remaining for the current descriptor.	1451	* We need to read several registers because:
1442	* Since the dma channel is not paused to not loose data, between the	1452	* - DMA is running therefore a descriptor change is possible while
1443	* AT_XDMAC_CNDA and AT_XDMAC_CUBC read, we may have change of	1453	* reading these registers
1444	* descriptor.	1454	* - When the block transfer is done, the value of the CUBC register
1445	* For that reason, after reading AT_XDMAC_CUBC, we check if we are	1455	* is set to its initial value until the fetch of the next descriptor.
1446	* still using the same descriptor by reading a second time	1456	* This value will corrupt the residue calculation so we have to skip
1447	* AT_XDMAC_CNDA. If AT_XDMAC_CNDA has changed, it means we have to	1457	* it.
1448	* read again AT_XDMAC_CUBC.	1458	*
		1459	* INITD -------- ------------
		1460	* \|____________________\|
		1461	* _______________________ _______________
		1462	* NDA @desc2 \/ @desc3
		1463	* _______________________/\_______________
		1464	* __________ ___________ _______________
		1465	* CUBC 0 \/ MAX desc1 \/ MAX desc2
		1466	* __________/\___________/\_______________
		1467	*
		1468	* Since descriptors are aligned on 64 bits, we can assume that
		1469	* the update of NDA and CUBC is atomic.
1449	* Memory barriers are used to ensure the read order of the registers.	1470	* Memory barriers are used to ensure the read order of the registers.
1450	* A max number of retries is set because unlikely it can never ends if	1471	* A max number of retries is set because unlikely it could never ends.
1451	* we are transferring a lot of data with small buffers.
1452	*/	1472	*/
1453	cur_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;
1454	rmb();
1455	cur_ubc = at_xdmac_chan_read(atchan, AT_XDMAC_CUBC);
1456	for (retry = 0; retry < AT_XDMAC_RESIDUE_MAX_RETRIES; retry++) {	1473	for (retry = 0; retry < AT_XDMAC_RESIDUE_MAX_RETRIES; retry++) {
1457	rmb();
1458	check_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;	1474	check_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;
1459		1475	rmb();
1460	if (likely(cur_nda == check_nda))	1476	initd = !!(at_xdmac_chan_read(atchan, AT_XDMAC_CC) & AT_XDMAC_CC_INITD);
1461	break;
1462
1463	cur_nda = check_nda;
1464	rmb();	1477	rmb();
1465	cur_ubc = at_xdmac_chan_read(atchan, AT_XDMAC_CUBC);	1478	cur_ubc = at_xdmac_chan_read(atchan, AT_XDMAC_CUBC);
		1479	rmb();
		1480	cur_nda = at_xdmac_chan_read(atchan, AT_XDMAC_CNDA) & 0xfffffffc;
		1481	rmb();
		1482
		1483	if ((check_nda == cur_nda) && initd)
		1484	break;
1466	}	1485	}
1467		1486
1468	if (unlikely(retry >= AT_XDMAC_RESIDUE_MAX_RETRIES)) {	1487	if (unlikely(retry >= AT_XDMAC_RESIDUE_MAX_RETRIES)) {
@@ -1470,6 +1489,19 @@ at_xdmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie, · 1 unmodified line
1470	goto spin_unlock;	1489	goto spin_unlock;
1471	}	1490	}
1472		1491
		1492	/*
		1493	* Flush FIFO: only relevant when the transfer is source peripheral
		1494	* synchronized. Another flush is needed here because CUBC is updated
		1495	* when the controller sends the data write command. It can lead to
		1496	* report data that are not written in the memory or the device. The
		1497	* FIFO flush ensures that data are really written.
		1498	*/
		1499	if ((desc->lld.mbr_cfg & mask) == value) {
		1500	at_xdmac_write(atxdmac, AT_XDMAC_GSWF, atchan->mask);
		1501	while (!(at_xdmac_chan_read(atchan, AT_XDMAC_CIS) & AT_XDMAC_CIS_FIS))
		1502	cpu_relax();
		1503	}
		1504
1473	/*	1505	/*
1474	* Remove size of all microblocks already transferred and the current	1506	* Remove size of all microblocks already transferred and the current
1475	* one. Then add the remaining size to transfer of the current	1507	* one. Then add the remaining size to transfer of the current

drivers/dma/mv_xor.c+6−4

 		goto free_resources;
 	}
-	src_dma = dma_map_page(dma_chan->device->dev, virt_to_page(src), 0,
+	src_dma = dma_map_page(dma_chan->device->dev, virt_to_page(src),
-				 PAGE_SIZE, DMA_TO_DEVICE);
+			       (size_t)src & ~PAGE_MASK, PAGE_SIZE,
+			       DMA_TO_DEVICE);
 	unmap->addr[0] = src_dma;
 	ret = dma_mapping_error(dma_chan->device->dev, src_dma);
 	}
 	unmap->to_cnt = 1;
-	dest_dma = dma_map_page(dma_chan->device->dev, virt_to_page(dest), 0,
+	dest_dma = dma_map_page(dma_chan->device->dev, virt_to_page(dest),
-				  PAGE_SIZE, DMA_FROM_DEVICE);
+				(size_t)dest & ~PAGE_MASK, PAGE_SIZE,
+				DMA_FROM_DEVICE);
 	unmap->addr[1] = dest_dma;
 	ret = dma_mapping_error(dma_chan->device->dev, dest_dma);

drivers/edac/edac_mc.c+2−1

@@ -565,7 +565,8 @@ void edac_mc_reset_delay_period(unsigned long value) · 564 unmodified lines
565	list_for_each(item, &mc_devices) {	565	list_for_each(item, &mc_devices) {
566	mci = list_entry(item, struct mem_ctl_info, link);	566	mci = list_entry(item, struct mem_ctl_info, link);
567		567
568	edac_mod_work(&mci->work, value);	568	if (mci->op_state == OP_RUNNING_POLL)
		569	edac_mod_work(&mci->work, value);
569	}	570	}
570	mutex_unlock(&mem_ctls_mutex);	571	mutex_unlock(&mem_ctls_mutex);
571	}	572	}

drivers/edac/sb_edac.c+22−13

 	{ 0x1a0, 0x1a4, 0x1a8, 0x1ac, 0x1b0, 0x1b4, 0x1b8, 0x1bc },
 };
-#define RIR_RNK_TGT(reg)		GET_BITFIELD(reg, 16, 19)
+#define RIR_RNK_TGT(type, reg) (((type) == BROADWELL) ? \
-#define RIR_OFFSET(reg)		GET_BITFIELD(reg,  2, 14)
+	GET_BITFIELD(reg, 20, 23) : GET_BITFIELD(reg, 16, 19))
+#define RIR_OFFSET(type, reg) (((type) == HASWELL || (type) == BROADWELL) ? \
+	GET_BITFIELD(reg,  2, 15) : GET_BITFIELD(reg,  2, 14))
 /* Device 16, functions 2-7 */
 struct pci_id_table {
 	const struct pci_id_descr	*descr;
 	int				n_devs;
+	enum type			type;
 };
 struct sbridge_dev {
 	{ PCI_DESCR(PCI_DEVICE_ID_INTEL_SBRIDGE_BR, 0)		},
 };
-#define PCI_ID_TABLE_ENTRY(A) { .descr=A, .n_devs = ARRAY_SIZE(A) }
+#define PCI_ID_TABLE_ENTRY(A, T) {	\
+	.descr = A,			\
+	.n_devs = ARRAY_SIZE(A),	\
+	.type = T			\
+}
 static const struct pci_id_table pci_dev_descr_sbridge_table[] = {
-	PCI_ID_TABLE_ENTRY(pci_dev_descr_sbridge),
+	PCI_ID_TABLE_ENTRY(pci_dev_descr_sbridge, SANDY_BRIDGE),
 	{0,}			/* 0 terminated list. */
 };
 };
 static const struct pci_id_table pci_dev_descr_ibridge_table[] = {
-	PCI_ID_TABLE_ENTRY(pci_dev_descr_ibridge),
+	PCI_ID_TABLE_ENTRY(pci_dev_descr_ibridge, IVY_BRIDGE),
 	{0,}			/* 0 terminated list. */
 };
 };
 static const struct pci_id_table pci_dev_descr_haswell_table[] = {
-	PCI_ID_TABLE_ENTRY(pci_dev_descr_haswell),
+	PCI_ID_TABLE_ENTRY(pci_dev_descr_haswell, HASWELL),
 	{0,}			/* 0 terminated list. */
 };
 };
 static const struct pci_id_table pci_dev_descr_knl_table[] = {
-	PCI_ID_TABLE_ENTRY(pci_dev_descr_knl),
+	PCI_ID_TABLE_ENTRY(pci_dev_descr_knl, KNIGHTS_LANDING),
 	{0,}
 };
 };
 static const struct pci_id_table pci_dev_descr_broadwell_table[] = {
-	PCI_ID_TABLE_ENTRY(pci_dev_descr_broadwell),
+	PCI_ID_TABLE_ENTRY(pci_dev_descr_broadwell, BROADWELL),
 	{0,}			/* 0 terminated list. */
 };
 				pci_read_config_dword(pvt->pci_tad[i],
 						      rir_offset[j][k],
 						      &reg);
-				tmp_mb = RIR_OFFSET(reg) << 6;
+				tmp_mb = RIR_OFFSET(pvt->info.type, reg) << 6;
 				gb = div_u64_rem(tmp_mb, 1024, &mb);
 				edac_dbg(0, "CH#%d RIR#%d INTL#%d, offset %u.%03u GB (0x%016Lx), tgt: %d, reg=0x%08x\n",
 					 i, j, k,
 					 gb, (mb*1000)/1024,
 					 ((u64)tmp_mb) << 20L,
-					 (u32)RIR_RNK_TGT(reg),
+					 (u32)RIR_RNK_TGT(pvt->info.type, reg),
 					 reg);
 			}
 		}
 	pci_read_config_dword(pvt->pci_tad[ch_add + base_ch],
 			      rir_offset[n_rir][idx],
 			      &reg);
-	*rank = RIR_RNK_TGT(reg);
+	*rank = RIR_RNK_TGT(pvt->info.type, reg);
 	edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",
 		 n_rir,
 #define ICPU(model, table) \
 	{ X86_VENDOR_INTEL, 6, model, 0, (unsigned long)&table }
-/* Order here must match "enum type" */
 static const struct x86_cpu_id sbridge_cpuids[] = {
 	ICPU(0x2d, pci_dev_descr_sbridge_table),	/* SANDY_BRIDGE */
 	ICPU(0x3e, pci_dev_descr_ibridge_table),	/* IVY_BRIDGE */
 	ICPU(0x3f, pci_dev_descr_haswell_table),	/* HASWELL */
 	ICPU(0x4f, pci_dev_descr_broadwell_table),	/* BROADWELL */
+	ICPU(0x56, pci_dev_descr_broadwell_table),	/* BROADWELL-DE */
 	ICPU(0x57, pci_dev_descr_knl_table),		/* KNIGHTS_LANDING */
 	{ }
 };
 			 mc, mc + 1, num_mc);
 		sbridge_dev->mc = mc++;
-		rc = sbridge_register_mci(sbridge_dev, id - sbridge_cpuids);
+		rc = sbridge_register_mci(sbridge_dev, ptable->type);
 		if (unlikely(rc < 0))
 			goto fail1;
 	}

drivers/extcon/extcon-palmas.c+2−0

@@ -360,6 +360,8 @@ static int palmas_usb_probe(struct platform_device *pdev) · 359 unmodified lines
360		360
361	palmas_enable_irq(palmas_usb);	361	palmas_enable_irq(palmas_usb);
362	/* perform initial detection */	362	/* perform initial detection */
		363	if (palmas_usb->enable_gpio_vbus_detection)
		364	palmas_vbus_irq_handler(palmas_usb->gpio_vbus_irq, palmas_usb);
363	palmas_gpio_id_detect(&palmas_usb->wq_detectid.work);	365	palmas_gpio_id_detect(&palmas_usb->wq_detectid.work);
364	device_set_wakeup_capable(&pdev->dev, true);	366	device_set_wakeup_capable(&pdev->dev, true);
365	return 0;	367	return 0;

drivers/firmware/efi/arm-init.c+6−8

 {
 	efi_memory_desc_t *md;
 	u64 paddr, npages, size;
+	int resv;
 	if (efi_enabled(EFI_DBG))
 		pr_info("Processing EFI memory map:\n");
 		paddr = md->phys_addr;
 		npages = md->num_pages;
+		resv = is_reserve_region(md);
 		if (efi_enabled(EFI_DBG)) {
 			char buf[64];
-			pr_info("  0x%012llx-0x%012llx %s",
+			pr_info("  0x%012llx-0x%012llx %s%s\n",
 				paddr, paddr + (npages << EFI_PAGE_SHIFT) - 1,
-				efi_md_typeattr_format(buf, sizeof(buf), md));
+				efi_md_typeattr_format(buf, sizeof(buf), md),
+				resv ? "*" : "");
 		}
 		memrange_efi_to_native(&paddr, &npages);
 		if (is_normal_ram(md))
 			early_init_dt_add_memory_arch(paddr, size);
-		if (is_reserve_region(md)) {
+		if (resv)
 			memblock_mark_nomap(paddr, size);
-			if (efi_enabled(EFI_DBG))
-				pr_cont("*");
-		}
-		if (efi_enabled(EFI_DBG))
-			pr_cont("\n");
 	}
 	set_bit(EFI_MEMMAP, &efi.flags);

drivers/gpio/Kconfig+5−4

 menuconfig GPIOLIB
 	bool "GPIO Support"
+	select ANON_INODES
 	help
 	  This enables GPIO support through the generic GPIO library.
 	  You only need to enable this, if you also want to enable
 config GPIO_104_DIO_48E
 	tristate "ACCES 104-DIO-48E GPIO support"
-	depends on ISA
+	depends on ISA_BUS_API
 	select GPIOLIB_IRQCHIP
 	help
 	  Enables GPIO support for the ACCES 104-DIO-48E series (104-DIO-48E,
 config GPIO_104_IDIO_16
 	tristate "ACCES 104-IDIO-16 GPIO support"
-	depends on ISA
+	depends on ISA_BUS_API
 	select GPIOLIB_IRQCHIP
 	help
 	  Enables GPIO support for the ACCES 104-IDIO-16 family (104-IDIO-16,
 config GPIO_104_IDI_48
 	tristate "ACCES 104-IDI-48 GPIO support"
-	depends on ISA
+	depends on ISA_BUS_API
 	select GPIOLIB_IRQCHIP
 	help
 	  Enables GPIO support for the ACCES 104-IDI-48 family (104-IDI-48A,
 config GPIO_WS16C48
 	tristate "WinSystems WS16C48 GPIO support"
-	depends on ISA
+	depends on ISA_BUS_API
 	select GPIOLIB_IRQCHIP
 	help
 	  Enables GPIO support for the WinSystems WS16C48. The base port

drivers/gpio/gpio-104-dio-48e.c+2−2

@@ -75,7 +75,7 @@ static int dio48e_gpio_direction_input(struct gpio_chip *chip, unsigned offset) · 74 unmodified lines
75	{	75	{
76	struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);	76	struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
77	const unsigned io_port = offset / 8;	77	const unsigned io_port = offset / 8;
78	const unsigned control_port = io_port / 2;	78	const unsigned int control_port = io_port / 3;
79	const unsigned control_addr = dio48egpio->base + 3 + control_port*4;	79	const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
80	unsigned long flags;	80	unsigned long flags;
81	unsigned control;	81	unsigned control;
@@ -115,7 +115,7 @@ static int dio48e_gpio_direction_output(struct gpio_chip *chip, unsigned offset, · 33 unmodified lines
115	{	115	{
116	struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);	116	struct dio48e_gpio *const dio48egpio = gpiochip_get_data(chip);
117	const unsigned io_port = offset / 8;	117	const unsigned io_port = offset / 8;
118	const unsigned control_port = io_port / 2;	118	const unsigned int control_port = io_port / 3;
119	const unsigned mask = BIT(offset % 8);	119	const unsigned mask = BIT(offset % 8);
120	const unsigned control_addr = dio48egpio->base + 3 + control_port*4;	120	const unsigned control_addr = dio48egpio->base + 3 + control_port*4;
121	const unsigned out_port = (io_port > 2) ? io_port + 1 : io_port;	121	const unsigned out_port = (io_port > 2) ? io_port + 1 : io_port;

drivers/gpio/gpio-bcm-kona.c+2−2

@@ -547,11 +547,11 @@ static void bcm_kona_gpio_reset(struct bcm_kona_gpio *kona_gpio) · 546 unmodified lines
547	/* disable interrupts and clear status */	547	/* disable interrupts and clear status */
548	for (i = 0; i < kona_gpio->num_bank; i++) {	548	for (i = 0; i < kona_gpio->num_bank; i++) {
549	/* Unlock the entire bank first */	549	/* Unlock the entire bank first */
550	bcm_kona_gpio_write_lock_regs(kona_gpio, i, UNLOCK_CODE);	550	bcm_kona_gpio_write_lock_regs(reg_base, i, UNLOCK_CODE);
551	writel(0xffffffff, reg_base + GPIO_INT_MASK(i));	551	writel(0xffffffff, reg_base + GPIO_INT_MASK(i));
552	writel(0xffffffff, reg_base + GPIO_INT_STATUS(i));	552	writel(0xffffffff, reg_base + GPIO_INT_STATUS(i));
553	/* Now re-lock the bank */	553	/* Now re-lock the bank */
554	bcm_kona_gpio_write_lock_regs(kona_gpio, i, LOCK_CODE);	554	bcm_kona_gpio_write_lock_regs(reg_base, i, LOCK_CODE);
555	}	555	}
556	}	556	}
557		557

drivers/gpio/gpio-zynq.c+7−0

 		dev_err(&pdev->dev, "input clock not found.\n");
 		return PTR_ERR(gpio->clk);
 	}
+	ret = clk_prepare_enable(gpio->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "Unable to enable clock.\n");
+		return ret;
+	}
+	pm_runtime_set_active(&pdev->dev);
 	pm_runtime_enable(&pdev->dev);
 	ret = pm_runtime_get_sync(&pdev->dev);
 	if (ret < 0)
 	pm_runtime_put(&pdev->dev);
 err_pm_dis:
 	pm_runtime_disable(&pdev->dev);
+	clk_disable_unprepare(gpio->clk);
 	return ret;
 }

drivers/gpio/gpiolib-of.c+1−0

@@ -16,6 +16,7 @@ · 15 unmodified lines
16	#include <linux/errno.h>	16	#include <linux/errno.h>
17	#include <linux/module.h>	17	#include <linux/module.h>
18	#include <linux/io.h>	18	#include <linux/io.h>
		19	#include <linux/io-mapping.h>
19	#include <linux/gpio/consumer.h>	20	#include <linux/gpio/consumer.h>
20	#include <linux/of.h>	21	#include <linux/of.h>
21	#include <linux/of_address.h>	22	#include <linux/of_address.h>

drivers/gpio/gpiolib.c+3−3

 {
 	struct gpio_device *gdev = dev_get_drvdata(dev);
-	cdev_del(&gdev->chrdev);
 	list_del(&gdev->list);
 	ida_simple_remove(&gpio_ida, gdev->id);
 	kfree(gdev->label);
 	/* From this point, the .release() function cleans up gpio_device */
 	gdev->dev.release = gpiodevice_release;
-	get_device(&gdev->dev);
 	pr_debug("%s: registered GPIOs %d to %d on device: %s (%s)\n",
 		 __func__, gdev->base, gdev->base + gdev->ngpio - 1,
 		 dev_name(&gdev->dev), gdev->chip->label ? : "generic");
 	 * be removed, else it will be dangling until the last user is
 	 * gone.
 	 */
+	cdev_del(&gdev->chrdev);
+	device_del(&gdev->dev);
 	put_device(&gdev->dev);
 }
 EXPORT_SYMBOL_GPL(gpiochip_remove);
 	spin_lock_irqsave(&gpio_lock, flags);
 	list_for_each_entry(gdev, &gpio_devices, list)
-		if (match(gdev->chip, data))
+		if (gdev->chip && match(gdev->chip, data))
 			break;
 	/* No match? */

drivers/gpu/drm/amd/amdgpu/amdgpu.h+7−0

 	/* MM block clocks */
 	int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
 	int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
+	/* query virtual capabilities */
+	u32 (*get_virtual_caps)(struct amdgpu_device *adev);
 };
 /*
 /* GPU virtualization */
+#define AMDGPU_VIRT_CAPS_SRIOV_EN       (1 << 0)
+#define AMDGPU_VIRT_CAPS_IS_VF          (1 << 1)
 struct amdgpu_virtualization {
 	bool supports_sr_iov;
+	bool is_virtual;
+	u32 caps;
 };
 /*
 #define amdgpu_asic_get_xclk(adev) (adev)->asic_funcs->get_xclk((adev))
 #define amdgpu_asic_set_uvd_clocks(adev, v, d) (adev)->asic_funcs->set_uvd_clocks((adev), (v), (d))
 #define amdgpu_asic_set_vce_clocks(adev, ev, ec) (adev)->asic_funcs->set_vce_clocks((adev), (ev), (ec))
+#define amdgpu_asic_get_virtual_caps(adev) ((adev)->asic_funcs->get_virtual_caps((adev)))
 #define amdgpu_asic_get_gpu_clock_counter(adev) (adev)->asic_funcs->get_gpu_clock_counter((adev))
 #define amdgpu_asic_read_disabled_bios(adev) (adev)->asic_funcs->read_disabled_bios((adev))
 #define amdgpu_asic_read_bios_from_rom(adev, b, l) (adev)->asic_funcs->read_bios_from_rom((adev), (b), (l))

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c+12−0

 	return result;
 }
+static int amdgpu_cgs_rel_firmware(struct cgs_device *cgs_device, enum cgs_ucode_id type)
+{
+	CGS_FUNC_ADEV;
+	if ((CGS_UCODE_ID_SMU == type) || (CGS_UCODE_ID_SMU_SK == type)) {
+		release_firmware(adev->pm.fw);
+		return 0;
+	}
+	/* cannot release other firmware because they are not created by cgs */
+	return -EINVAL;
+}
 static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,
 					enum cgs_ucode_id type,
 					struct cgs_firmware_info *info)
 	amdgpu_cgs_pm_query_clock_limits,
 	amdgpu_cgs_set_camera_voltages,
 	amdgpu_cgs_get_firmware_info,
+	amdgpu_cgs_rel_firmware,
 	amdgpu_cgs_set_powergating_state,
 	amdgpu_cgs_set_clockgating_state,
 	amdgpu_cgs_get_active_displays_info,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+23−2

  */
 static void amdgpu_atombios_fini(struct amdgpu_device *adev)
 {
-	if (adev->mode_info.atom_context)
+	if (adev->mode_info.atom_context) {
 		kfree(adev->mode_info.atom_context->scratch);
+		kfree(adev->mode_info.atom_context->iio);
+	}
 	kfree(adev->mode_info.atom_context);
 	adev->mode_info.atom_context = NULL;
 	kfree(adev->mode_info.atom_card_info);
 		adev->ip_block_status[i].valid = false;
 	}
+	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
+		if (adev->ip_blocks[i].funcs->late_fini)
+			adev->ip_blocks[i].funcs->late_fini((void *)adev);
+	}
 	return 0;
 }
 	return 0;
 }
+static bool amdgpu_device_is_virtual(void)
+{
+#ifdef CONFIG_X86
+	return boot_cpu_has(X86_FEATURE_HYPERVISOR);
+#else
+	return false;
+#endif
+}
 /**
  * amdgpu_device_init - initialize the driver
  *
 	adev->virtualization.supports_sr_iov =
 		amdgpu_atombios_has_gpu_virtualization_table(adev);
+	/* Check if we are executing in a virtualized environment */
+	adev->virtualization.is_virtual = amdgpu_device_is_virtual();
+	adev->virtualization.caps = amdgpu_asic_get_virtual_caps(adev);
 	/* Post card if necessary */
 	if (!amdgpu_card_posted(adev) ||
-	    adev->virtualization.supports_sr_iov) {
+	    (adev->virtualization.is_virtual &&
+	     !adev->virtualization.caps & AMDGPU_VIRT_CAPS_SRIOV_EN)) {
 		if (!adev->bios) {
 			dev_err(adev->dev, "Card not posted and no BIOS - ignoring\n");
 			return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_powerplay.c+17−7

 	if (ret)
 		return ret;
-#ifdef CONFIG_DRM_AMD_POWERPLAY
-	if (adev->pp_enabled) {
-		amdgpu_pm_sysfs_fini(adev);
-		amd_powerplay_fini(adev->powerplay.pp_handle);
-	}
-#endif
 	return ret;
 }
 	return ret;
 }
+static void amdgpu_pp_late_fini(void *handle)
+{
+#ifdef CONFIG_DRM_AMD_POWERPLAY
+	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+	if (adev->pp_enabled) {
+		amdgpu_pm_sysfs_fini(adev);
+		amd_powerplay_fini(adev->powerplay.pp_handle);
+	}
+	if (adev->powerplay.ip_funcs->late_fini)
+		adev->powerplay.ip_funcs->late_fini(
+			  adev->powerplay.pp_handle);
+#endif
+}
 static int amdgpu_pp_suspend(void *handle)
 {
 	int ret = 0;
 	.sw_fini = amdgpu_pp_sw_fini,
 	.hw_init = amdgpu_pp_hw_init,
 	.hw_fini = amdgpu_pp_hw_fini,
+	.late_fini = amdgpu_pp_late_fini,
 	.suspend = amdgpu_pp_suspend,
 	.resume = amdgpu_pp_resume,
 	.is_idle = amdgpu_pp_is_idle,

drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c+1−0

@@ -343,6 +343,7 @@ void amdgpu_ring_fini(struct amdgpu_ring *ring) · 342 unmodified lines
343	ring->ring = NULL;	343	ring->ring = NULL;
344	ring->ring_obj = NULL;	344	ring->ring_obj = NULL;
345		345
		346	amdgpu_wb_free(ring->adev, ring->cond_exe_offs);
346	amdgpu_wb_free(ring->adev, ring->fence_offs);	347	amdgpu_wb_free(ring->adev, ring->fence_offs);
347	amdgpu_wb_free(ring->adev, ring->rptr_offs);	348	amdgpu_wb_free(ring->adev, ring->rptr_offs);
348	amdgpu_wb_free(ring->adev, ring->wptr_offs);	349	amdgpu_wb_free(ring->adev, ring->wptr_offs);

drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c+1−0

@@ -115,6 +115,7 @@ int amdgpu_sa_bo_manager_start(struct amdgpu_device *adev, · 114 unmodified lines
115	return r;	115	return r;
116	}	116	}
117	r = amdgpu_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);	117	r = amdgpu_bo_kmap(sa_manager->bo, &sa_manager->cpu_ptr);
		118	memset(sa_manager->cpu_ptr, 0, sa_manager->size);
118	amdgpu_bo_unreserve(sa_manager->bo);	119	amdgpu_bo_unreserve(sa_manager->bo);
119	return r;	120	return r;
120	}	121	}

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+10−9

@@ -253,19 +253,20 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev) · 252 unmodified lines
253	{	253	{
254	int r;	254	int r;
255		255
256	if (adev->uvd.vcpu_bo == NULL)	256	kfree(adev->uvd.saved_bo);
257	return 0;
258		257
259	amd_sched_entity_fini(&adev->uvd.ring.sched, &adev->uvd.entity);	258	amd_sched_entity_fini(&adev->uvd.ring.sched, &adev->uvd.entity);
260		259
261	r = amdgpu_bo_reserve(adev->uvd.vcpu_bo, false);	260	if (adev->uvd.vcpu_bo) {
262	if (!r) {	261	r = amdgpu_bo_reserve(adev->uvd.vcpu_bo, false);
263	amdgpu_bo_kunmap(adev->uvd.vcpu_bo);	262	if (!r) {
264	amdgpu_bo_unpin(adev->uvd.vcpu_bo);	263	amdgpu_bo_kunmap(adev->uvd.vcpu_bo);
265	amdgpu_bo_unreserve(adev->uvd.vcpu_bo);	264	amdgpu_bo_unpin(adev->uvd.vcpu_bo);
266	}	265	amdgpu_bo_unreserve(adev->uvd.vcpu_bo);
		266	}
267		267
268	amdgpu_bo_unref(&adev->uvd.vcpu_bo);	268	amdgpu_bo_unref(&adev->uvd.vcpu_bo);
		269	}
269		270
270	amdgpu_ring_fini(&adev->uvd.ring);	271	amdgpu_ring_fini(&adev->uvd.ring);
271		272

drivers/gpu/drm/amd/amdgpu/ci_dpm.c+3−0

@@ -6221,6 +6221,9 @@ static int ci_dpm_sw_fini(void *handle) · 6220 unmodified lines
6221	ci_dpm_fini(adev);	6221	ci_dpm_fini(adev);
6222	mutex_unlock(&adev->pm.mutex);	6222	mutex_unlock(&adev->pm.mutex);
6223		6223
		6224	release_firmware(adev->pm.fw);
		6225	adev->pm.fw = NULL;
		6226
6224	return 0;	6227	return 0;
6225	}	6228	}
6226		6229

drivers/gpu/drm/amd/amdgpu/cik.c+7−0

 	return true;
 }
+static u32 cik_get_virtual_caps(struct amdgpu_device *adev)
+{
+	/* CIK does not support SR-IOV */
+	return 0;
+}
 static const struct amdgpu_allowed_register_entry cik_allowed_read_registers[] = {
 	{mmGRBM_STATUS, false},
 	{mmGB_ADDR_CONFIG, false},
 	.get_xclk = &cik_get_xclk,
 	.set_uvd_clocks = &cik_set_uvd_clocks,
 	.set_vce_clocks = &cik_set_vce_clocks,
+	.get_virtual_caps = &cik_get_virtual_caps,
 	/* these should be moved to their own ip modules */
 	.get_gpu_clock_counter = &gfx_v7_0_get_gpu_clock_counter,
 	.wait_for_mc_idle = &gmc_v7_0_mc_wait_for_idle,

drivers/gpu/drm/amd/amdgpu/cik_sdma.c+20−2

 u32 amdgpu_cik_gpu_check_soft_reset(struct amdgpu_device *adev);
+static void cik_sdma_free_microcode(struct amdgpu_device *adev)
+{
+	int i;
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+			release_firmware(adev->sdma.instance[i].fw);
+			adev->sdma.instance[i].fw = NULL;
+	}
+}
 /*
  * sDMA - System DMA
  * Starting with CIK, the GPU has new asynchronous
 		/* Initialize the ring buffer's read and write pointers */
 		WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
 		WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 		/* set the wb address whether it's enabled or not */
 		WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
 		WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 		ring->ready = true;
+	}
+	cik_sdma_enable(adev, true);
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+		ring = &adev->sdma.instance[i].ring;
 		r = amdgpu_ring_test_ring(ring);
 		if (r) {
 			ring->ready = false;
 	if (r)
 		return r;
-	/* unhalt the MEs */
+	/* halt the engine before programing */
-	cik_sdma_enable(adev, true);
+	cik_sdma_enable(adev, false);
 	/* start the gfx rings and rlc compute queues */
 	r = cik_sdma_gfx_resume(adev);
 	for (i = 0; i < adev->sdma.num_instances; i++)
 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);
+	cik_sdma_free_microcode(adev);
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/fiji_dpm.c+5−0

@@ -72,6 +72,11 @@ static int fiji_dpm_sw_init(void *handle) · 71 unmodified lines
72		72
73	static int fiji_dpm_sw_fini(void *handle)	73	static int fiji_dpm_sw_fini(void *handle)
74	{	74	{
		75	struct amdgpu_device adev = (struct amdgpu_device )handle;
		76
		77	release_firmware(adev->pm.fw);
		78	adev->pm.fw = NULL;
		79
75	return 0;	80	return 0;
76	}	81	}
77		82

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c+18−1

 	return err;
 }
+static void gfx_v7_0_free_microcode(struct amdgpu_device *adev)
+{
+	release_firmware(adev->gfx.pfp_fw);
+	adev->gfx.pfp_fw = NULL;
+	release_firmware(adev->gfx.me_fw);
+	adev->gfx.me_fw = NULL;
+	release_firmware(adev->gfx.ce_fw);
+	adev->gfx.ce_fw = NULL;
+	release_firmware(adev->gfx.mec_fw);
+	adev->gfx.mec_fw = NULL;
+	release_firmware(adev->gfx.mec2_fw);
+	adev->gfx.mec2_fw = NULL;
+	release_firmware(adev->gfx.rlc_fw);
+	adev->gfx.rlc_fw = NULL;
+}
 /**
  * gfx_v7_0_tiling_mode_table_init - init the hw tiling table
  *
 	gfx_v7_0_cp_compute_fini(adev);
 	gfx_v7_0_rlc_fini(adev);
 	gfx_v7_0_mec_fini(adev);
+	gfx_v7_0_free_microcode(adev);
 	return 0;
 }
 	case 2:
 		for (i = 0; i < adev->gfx.num_compute_rings; i++) {
 			ring = &adev->gfx.compute_ring[i];
-			if ((ring->me == me_id) & (ring->pipe == pipe_id))
+			if ((ring->me == me_id) && (ring->pipe == pipe_id))
 				amdgpu_fence_process(ring);
 		}
 		break;

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+26−2

@@ -836,6 +836,26 @@ err1: · 835 unmodified lines
836	return r;	836	return r;
837	}	837	}
838		838
		839
		840	static void gfx_v8_0_free_microcode(struct amdgpu_device *adev) {
		841	release_firmware(adev->gfx.pfp_fw);
		842	adev->gfx.pfp_fw = NULL;
		843	release_firmware(adev->gfx.me_fw);
		844	adev->gfx.me_fw = NULL;
		845	release_firmware(adev->gfx.ce_fw);
		846	adev->gfx.ce_fw = NULL;
		847	release_firmware(adev->gfx.rlc_fw);
		848	adev->gfx.rlc_fw = NULL;
		849	release_firmware(adev->gfx.mec_fw);
		850	adev->gfx.mec_fw = NULL;
		851	if ((adev->asic_type != CHIP_STONEY) &&
		852	(adev->asic_type != CHIP_TOPAZ))
		853	release_firmware(adev->gfx.mec2_fw);
		854	adev->gfx.mec2_fw = NULL;
		855
		856	kfree(adev->gfx.rlc.register_list_format);
		857	}
		858
839	static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)	859	static int gfx_v8_0_init_microcode(struct amdgpu_device *adev)
840	{	860	{
841	const char *chip_name;	861	const char *chip_name;
@@ -1983,7 +2003,7 @@ static int gfx_v8_0_sw_fini(void *handle) · 1141 unmodified lines
1983		2003
1984	gfx_v8_0_rlc_fini(adev);	2004	gfx_v8_0_rlc_fini(adev);
1985		2005
1986	kfree(adev->gfx.rlc.register_list_format);	2006	gfx_v8_0_free_microcode(adev);
1987		2007
1988	return 0;	2008	return 0;
1989	}	2009	}
@@ -3974,11 +3994,15 @@ static int gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev) · 1984 unmodified lines
3974	amdgpu_ring_write(ring, 0x3a00161a);	3994	amdgpu_ring_write(ring, 0x3a00161a);
3975	amdgpu_ring_write(ring, 0x0000002e);	3995	amdgpu_ring_write(ring, 0x0000002e);
3976	break;	3996	break;
3977	case CHIP_TOPAZ:
3978	case CHIP_CARRIZO:	3997	case CHIP_CARRIZO:
3979	amdgpu_ring_write(ring, 0x00000002);	3998	amdgpu_ring_write(ring, 0x00000002);
3980	amdgpu_ring_write(ring, 0x00000000);	3999	amdgpu_ring_write(ring, 0x00000000);
3981	break;	4000	break;
		4001	case CHIP_TOPAZ:
		4002	amdgpu_ring_write(ring, adev->gfx.config.num_rbs == 1 ?
		4003	0x00000000 : 0x00000002);
		4004	amdgpu_ring_write(ring, 0x00000000);
		4005	break;
3982	case CHIP_STONEY:	4006	case CHIP_STONEY:
3983	amdgpu_ring_write(ring, 0x00000000);	4007	amdgpu_ring_write(ring, 0x00000000);
3984	amdgpu_ring_write(ring, 0x00000000);	4008	amdgpu_ring_write(ring, 0x00000000);

drivers/gpu/drm/amd/amdgpu/iceland_dpm.c+5−0

@@ -72,6 +72,11 @@ static int iceland_dpm_sw_init(void *handle) · 71 unmodified lines
72		72
73	static int iceland_dpm_sw_fini(void *handle)	73	static int iceland_dpm_sw_fini(void *handle)
74	{	74	{
		75	struct amdgpu_device adev = (struct amdgpu_device )handle;
		76
		77	release_firmware(adev->pm.fw);
		78	adev->pm.fw = NULL;
		79
75	return 0;	80	return 0;
76	}	81	}
77		82

drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c+18−2

 	}
 }
+static void sdma_v2_4_free_microcode(struct amdgpu_device *adev)
+{
+	int i;
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+		release_firmware(adev->sdma.instance[i].fw);
+		adev->sdma.instance[i].fw = NULL;
+	}
+}
 /**
  * sdma_v2_4_init_microcode - load ucode images from disk
  *
 		/* Initialize the ring buffer's read and write pointers */
 		WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
 		WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 		/* set the wb address whether it's enabled or not */
 		WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
 		WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 		ring->ready = true;
+	}
+	sdma_v2_4_enable(adev, true);
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+		ring = &adev->sdma.instance[i].ring;
 		r = amdgpu_ring_test_ring(ring);
 		if (r) {
 			ring->ready = false;
 			return -EINVAL;
 	}
-	/* unhalt the MEs */
+	/* halt the engine before programing */
-	sdma_v2_4_enable(adev, true);
+	sdma_v2_4_enable(adev, false);
 	/* start the gfx rings and rlc compute queues */
 	r = sdma_v2_4_gfx_resume(adev);
 	for (i = 0; i < adev->sdma.num_instances; i++)
 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);
+	sdma_v2_4_free_microcode(adev);
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c+23−4

 	}
 }
+static void sdma_v3_0_free_microcode(struct amdgpu_device *adev)
+{
+	int i;
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+		release_firmware(adev->sdma.instance[i].fw);
+		adev->sdma.instance[i].fw = NULL;
+	}
+}
 /**
  * sdma_v3_0_init_microcode - load ucode images from disk
  *
 		/* Initialize the ring buffer's read and write pointers */
 		WREG32(mmSDMA0_GFX_RB_RPTR + sdma_offsets[i], 0);
 		WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_RPTR + sdma_offsets[i], 0);
+		WREG32(mmSDMA0_GFX_IB_OFFSET + sdma_offsets[i], 0);
 		/* set the wb address whether it's enabled or not */
 		WREG32(mmSDMA0_GFX_RB_RPTR_ADDR_HI + sdma_offsets[i],
 		WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
 		ring->ready = true;
+	}
+	/* unhalt the MEs */
+	sdma_v3_0_enable(adev, true);
+	/* enable sdma ring preemption */
+	sdma_v3_0_ctx_switch_enable(adev, true);
+	for (i = 0; i < adev->sdma.num_instances; i++) {
+		ring = &adev->sdma.instance[i].ring;
 		r = amdgpu_ring_test_ring(ring);
 		if (r) {
 			ring->ready = false;
 		}
 	}
-	/* unhalt the MEs */
+	/* disble sdma engine before programing it */
-	sdma_v3_0_enable(adev, true);
+	sdma_v3_0_ctx_switch_enable(adev, false);
-	/* enable sdma ring preemption */
+	sdma_v3_0_enable(adev, false);
-	sdma_v3_0_ctx_switch_enable(adev, true);
 	/* start the gfx rings and rlc compute queues */
 	r = sdma_v3_0_gfx_resume(adev);
 	for (i = 0; i < adev->sdma.num_instances; i++)
 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);
+	sdma_v3_0_free_microcode(adev);
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/tonga_dpm.c+5−0

@@ -71,6 +71,11 @@ static int tonga_dpm_sw_init(void *handle) · 70 unmodified lines
71		71
72	static int tonga_dpm_sw_fini(void *handle)	72	static int tonga_dpm_sw_fini(void *handle)
73	{	73	{
		74	struct amdgpu_device adev = (struct amdgpu_device )handle;
		75
		76	release_firmware(adev->pm.fw);
		77	adev->pm.fw = NULL;
		78
74	return 0;	79	return 0;
75	}	80	}
76		81

drivers/gpu/drm/amd/amdgpu/vi.c+15−0

@@ -421,6 +421,20 @@ static bool vi_read_bios_from_rom(struct amdgpu_device *adev, · 420 unmodified lines
421	return true;	421	return true;
422	}	422	}
423		423
		424	static u32 vi_get_virtual_caps(struct amdgpu_device *adev)
		425	{
		426	u32 caps = 0;
		427	u32 reg = RREG32(mmBIF_IOV_FUNC_IDENTIFIER);
		428
		429	if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER, IOV_ENABLE))
		430	caps \|= AMDGPU_VIRT_CAPS_SRIOV_EN;
		431
		432	if (REG_GET_FIELD(reg, BIF_IOV_FUNC_IDENTIFIER, FUNC_IDENTIFIER))
		433	caps \|= AMDGPU_VIRT_CAPS_IS_VF;
		434
		435	return caps;
		436	}
		437
424	static const struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = {	438	static const struct amdgpu_allowed_register_entry tonga_allowed_read_registers[] = {
425	{mmGB_MACROTILE_MODE7, true},	439	{mmGB_MACROTILE_MODE7, true},
426	};	440	};
@@ -1118,6 +1132,7 @@ static const struct amdgpu_asic_funcs vi_asic_funcs = · 691 unmodified lines
1118	.get_xclk = &vi_get_xclk,	1132	.get_xclk = &vi_get_xclk,
1119	.set_uvd_clocks = &vi_set_uvd_clocks,	1133	.set_uvd_clocks = &vi_set_uvd_clocks,
1120	.set_vce_clocks = &vi_set_vce_clocks,	1134	.set_vce_clocks = &vi_set_vce_clocks,
		1135	.get_virtual_caps = &vi_get_virtual_caps,
1121	/* these should be moved to their own ip modules */	1136	/* these should be moved to their own ip modules */
1122	.get_gpu_clock_counter = &gfx_v8_0_get_gpu_clock_counter,	1137	.get_gpu_clock_counter = &gfx_v8_0_get_gpu_clock_counter,
1123	.wait_for_mc_idle = &gmc_v8_0_mc_wait_for_idle,	1138	.wait_for_mc_idle = &gmc_v8_0_mc_wait_for_idle,

drivers/gpu/drm/amd/amdkfd/kfd_process.c+43−27

@@ -242,13 +242,19 @@ static void kfd_process_notifier_release(struct mmu_notifier *mn, · 241 unmodified lines
242	pqm_uninit(&p->pqm);	242	pqm_uninit(&p->pqm);
243		243
244	/* Iterate over all process device data structure and check	244	/* Iterate over all process device data structure and check
245	* if we should reset all wavefronts */	245	* if we should delete debug managers and reset all wavefronts
246	list_for_each_entry(pdd, &p->per_device_data, per_device_list)	246	*/
		247	list_for_each_entry(pdd, &p->per_device_data, per_device_list) {
		248	if ((pdd->dev->dbgmgr) &&
		249	(pdd->dev->dbgmgr->pasid == p->pasid))
		250	kfd_dbgmgr_destroy(pdd->dev->dbgmgr);
		251
247	if (pdd->reset_wavefronts) {	252	if (pdd->reset_wavefronts) {
248	pr_warn("amdkfd: Resetting all wave fronts\n");	253	pr_warn("amdkfd: Resetting all wave fronts\n");
249	dbgdev_wave_reset_wavefronts(pdd->dev, p);	254	dbgdev_wave_reset_wavefronts(pdd->dev, p);
250	pdd->reset_wavefronts = false;	255	pdd->reset_wavefronts = false;
251	}	256	}
		257	}
252		258
253	mutex_unlock(&p->mutex);	259	mutex_unlock(&p->mutex);
254		260
@@ -404,42 +410,52 @@ void kfd_unbind_process_from_device(struct kfd_dev *dev, unsigned int pasid) · 149 unmodified lines
404		410
405	idx = srcu_read_lock(&kfd_processes_srcu);	411	idx = srcu_read_lock(&kfd_processes_srcu);
406		412
		413	/*
		414	* Look for the process that matches the pasid. If there is no such
		415	* process, we either released it in amdkfd's own notifier, or there
		416	* is a bug. Unfortunately, there is no way to tell...
		417	*/
407	hash_for_each_rcu(kfd_processes_table, i, p, kfd_processes)	418	hash_for_each_rcu(kfd_processes_table, i, p, kfd_processes)
408	if (p->pasid == pasid)	419	if (p->pasid == pasid) {
409	break;
410		420
411	srcu_read_unlock(&kfd_processes_srcu, idx);	421	srcu_read_unlock(&kfd_processes_srcu, idx);
412		422
413	BUG_ON(p->pasid != pasid);	423	pr_debug("Unbinding process %d from IOMMU\n", pasid);
414		424
415	mutex_lock(&p->mutex);	425	mutex_lock(&p->mutex);
416		426
417	if ((dev->dbgmgr) && (dev->dbgmgr->pasid == p->pasid))	427	if ((dev->dbgmgr) && (dev->dbgmgr->pasid == p->pasid))
418	kfd_dbgmgr_destroy(dev->dbgmgr);	428	kfd_dbgmgr_destroy(dev->dbgmgr);
419		429
420	pqm_uninit(&p->pqm);	430	pqm_uninit(&p->pqm);
421		431
422	pdd = kfd_get_process_device_data(dev, p);	432	pdd = kfd_get_process_device_data(dev, p);
423		433
424	if (!pdd) {	434	if (!pdd) {
425	mutex_unlock(&p->mutex);	435	mutex_unlock(&p->mutex);
426	return;	436	return;
427	}	437	}
428		438
429	if (pdd->reset_wavefronts) {	439	if (pdd->reset_wavefronts) {
430	dbgdev_wave_reset_wavefronts(pdd->dev, p);	440	dbgdev_wave_reset_wavefronts(pdd->dev, p);
431	pdd->reset_wavefronts = false;	441	pdd->reset_wavefronts = false;
432	}	442	}
433		443
434	/*	444	/*
435	* Just mark pdd as unbound, because we still need it to call	445	* Just mark pdd as unbound, because we still need it
436	* amd_iommu_unbind_pasid() in when the process exits.	446	* to call amd_iommu_unbind_pasid() in when the
437	* We don't call amd_iommu_unbind_pasid() here	447	* process exits.
438	* because the IOMMU called us.	448	* We don't call amd_iommu_unbind_pasid() here
439	*/	449	* because the IOMMU called us.
440	pdd->bound = false;	450	*/
		451	pdd->bound = false;
441		452
442	mutex_unlock(&p->mutex);	453	mutex_unlock(&p->mutex);
		454
		455	return;
		456	}
		457
		458	srcu_read_unlock(&kfd_processes_srcu, idx);
443	}	459	}
444		460
445	struct kfd_process_device kfd_get_first_process_device_data(struct kfd_process p)	461	struct kfd_process_device kfd_get_first_process_device_data(struct kfd_process p)

drivers/gpu/drm/amd/amdkfd/kfd_topology.c+1−1

@@ -666,7 +666,7 @@ static ssize_t node_show(struct kobject kobj, struct attribute attr, · 665 unmodified lines
666	dev->node_props.simd_count);	666	dev->node_props.simd_count);
667		667
668	if (dev->mem_bank_count < dev->node_props.mem_banks_count) {	668	if (dev->mem_bank_count < dev->node_props.mem_banks_count) {
669	pr_warn("kfd: mem_banks_count truncated from %d to %d\n",	669	pr_info_once("kfd: mem_banks_count truncated from %d to %d\n",
670	dev->node_props.mem_banks_count,	670	dev->node_props.mem_banks_count,
671	dev->mem_bank_count);	671	dev->mem_bank_count);
672	sysfs_show_32bit_prop(buffer, "mem_banks_count",	672	sysfs_show_32bit_prop(buffer, "mem_banks_count",

drivers/gpu/drm/amd/include/amd_shared.h+1−0

@@ -157,6 +157,7 @@ struct amd_ip_funcs { · 156 unmodified lines
157	int (hw_init)(void handle);	157	int (hw_init)(void handle);
158	/* tears down the hw state */	158	/* tears down the hw state */
159	int (hw_fini)(void handle);	159	int (hw_fini)(void handle);
		160	void (late_fini)(void handle);
160	/* handles IP specific hw/sw changes for suspend */	161	/* handles IP specific hw/sw changes for suspend */
161	int (suspend)(void handle);	162	int (suspend)(void handle);
162	/* handles IP specific hw/sw changes for resume */	163	/* handles IP specific hw/sw changes for resume */

drivers/gpu/drm/amd/include/cgs_common.h+6−0

 				     enum cgs_ucode_id type,
 				     struct cgs_firmware_info *info);
+typedef int (*cgs_rel_firmware)(struct cgs_device *cgs_device,
+					 enum cgs_ucode_id type);
 typedef int(*cgs_set_powergating_state)(struct cgs_device *cgs_device,
 				  enum amd_ip_block_type block_type,
 				  enum amd_powergating_state state);
 	cgs_set_camera_voltages_t set_camera_voltages;
 	/* Firmware Info */
 	cgs_get_firmware_info get_firmware_info;
+	cgs_rel_firmware rel_firmware;
 	/* cg pg interface*/
 	cgs_set_powergating_state set_powergating_state;
 	cgs_set_clockgating_state set_clockgating_state;
 	CGS_CALL(set_camera_voltages,dev,mask,voltages)
 #define cgs_get_firmware_info(dev, type, info)	\
 	CGS_CALL(get_firmware_info, dev, type, info)
+#define cgs_rel_firmware(dev, type)	\
+	CGS_CALL(rel_firmware, dev, type)
 #define cgs_set_powergating_state(dev, block_type, state)	\
 	CGS_CALL(set_powergating_state, dev, block_type, state)
 #define cgs_set_clockgating_state(dev, block_type, state)	\

drivers/gpu/drm/amd/powerplay/amd_powerplay.c+7−1

 	ret = hwmgr->hwmgr_func->backend_init(hwmgr);
 	if (ret)
-		goto err;
+		goto err1;
 	pr_info("amdgpu: powerplay initialized\n");
 	return 0;
+err1:
+	if (hwmgr->pptable_func->pptable_fini)
+		hwmgr->pptable_func->pptable_fini(hwmgr);
 err:
 	pr_err("amdgpu: powerplay initialization failed\n");
 	return ret;
 	if (hwmgr->hwmgr_func->backend_fini != NULL)
 		ret = hwmgr->hwmgr_func->backend_fini(hwmgr);
+	if (hwmgr->pptable_func->pptable_fini)
+		hwmgr->pptable_func->pptable_fini(hwmgr);
 	return ret;
 }

drivers/gpu/drm/amd/powerplay/eventmgr/eventmgr.c+0−3

@@ -58,9 +58,6 @@ static void pem_fini(struct pp_eventmgr *eventmgr) · 57 unmodified lines
58	pem_unregister_interrupts(eventmgr);	58	pem_unregister_interrupts(eventmgr);
59		59
60	pem_handle_event(eventmgr, AMD_PP_EVENT_UNINITIALIZE, &event_data);	60	pem_handle_event(eventmgr, AMD_PP_EVENT_UNINITIALIZE, &event_data);
61
62	if (eventmgr != NULL)
63	kfree(eventmgr);
64	}	61	}
65		62
66	int eventmgr_init(struct pp_instance *handle)	63	int eventmgr_init(struct pp_instance *handle)

drivers/gpu/drm/amd/powerplay/hwmgr/fiji_hwmgr.c+1−1

@@ -1830,7 +1830,7 @@ static uint16_t fiji_find_closest_vddci(struct pp_hwmgr *hwmgr, uint16_t vddci) · 1829 unmodified lines
1830		1830
1831	PP_ASSERT_WITH_CODE(false,	1831	PP_ASSERT_WITH_CODE(false,
1832	"VDDCI is larger than max VDDCI in VDDCI Voltage Table!",	1832	"VDDCI is larger than max VDDCI in VDDCI Voltage Table!",
1833	return vddci_table->entries[i].value);	1833	return vddci_table->entries[i-1].value);
1834	}	1834	}
1835		1835
1836	static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,	1836	static int fiji_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr,

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c+8−1

 	if (hwmgr == NULL || hwmgr->ps == NULL)
 		return -EINVAL;
+	/* do hwmgr finish*/
+	kfree(hwmgr->backend);
+	kfree(hwmgr->start_thermal_controller.function_list);
+	kfree(hwmgr->set_temperature_range.function_list);
 	kfree(hwmgr->ps);
 	kfree(hwmgr);
 	return 0;
 	PP_ASSERT_WITH_CODE(false,
 			"VDDCI is larger than max VDDCI in VDDCI Voltage Table!",
-			return vddci_table->entries[i].value);
+			return vddci_table->entries[i-1].value);
 }
 int phm_find_boot_level(void *table,

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr_ppt.h+1−0

@@ -39,6 +39,7 @@ struct phm_ppt_v1_clock_voltage_dependency_record { · 38 unmodified lines
39	uint8_t phases;	39	uint8_t phases;
40	uint8_t cks_enable;	40	uint8_t cks_enable;
41	uint8_t cks_voffset;	41	uint8_t cks_voffset;
		42	uint32_t sclk_offset;
42	};	43	};
43		44
44	typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;	45	typedef struct phm_ppt_v1_clock_voltage_dependency_record phm_ppt_v1_clock_voltage_dependency_record;

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c+17−11

@@ -999,7 +999,7 @@ static int polaris10_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, · 998 unmodified lines
999	vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),	999	vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),
1000	(dep_table->entries[i].vddc -	1000	(dep_table->entries[i].vddc -
1001	(uint16_t)data->vddc_vddci_delta));	1001	(uint16_t)data->vddc_vddci_delta));
1002	voltage \|= (vddci VOLTAGE_SCALE) << VDDCI_SHIFT;	1002	voltage \|= (vddci VOLTAGE_SCALE) << VDDCI_SHIFT;
1003	}	1003	}
1004		1004
1005	if (POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control)	1005	if (POLARIS10_VOLTAGE_CONTROL_NONE == data->mvdd_control)
@@ -3520,10 +3520,11 @@ static int polaris10_get_pp_table_entry_callback_func(struct pp_hwmgr *hwmgr, · 2514 unmodified lines
3520	ATOM_Tonga_State state_entry = (ATOM_Tonga_State )state;	3520	ATOM_Tonga_State state_entry = (ATOM_Tonga_State )state;
3521	ATOM_Tonga_POWERPLAYTABLE *powerplay_table =	3521	ATOM_Tonga_POWERPLAYTABLE *powerplay_table =
3522	(ATOM_Tonga_POWERPLAYTABLE *)pp_table;	3522	(ATOM_Tonga_POWERPLAYTABLE *)pp_table;
3523	ATOM_Tonga_SCLK_Dependency_Table *sclk_dep_table =	3523	PPTable_Generic_SubTable_Header *sclk_dep_table =
3524	(ATOM_Tonga_SCLK_Dependency_Table *)	3524	(PPTable_Generic_SubTable_Header *)
3525	(((unsigned long)powerplay_table) +	3525	(((unsigned long)powerplay_table) +
3526	le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));	3526	le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));
		3527
3527	ATOM_Tonga_MCLK_Dependency_Table *mclk_dep_table =	3528	ATOM_Tonga_MCLK_Dependency_Table *mclk_dep_table =
3528	(ATOM_Tonga_MCLK_Dependency_Table *)	3529	(ATOM_Tonga_MCLK_Dependency_Table *)
3529	(((unsigned long)powerplay_table) +	3530	(((unsigned long)powerplay_table) +
@@ -3575,7 +3576,11 @@ static int polaris10_get_pp_table_entry_callback_func(struct pp_hwmgr *hwmgr, · 45 unmodified lines
3575	/* Performance levels are arranged from low to high. */	3576	/* Performance levels are arranged from low to high. */
3576	performance_level->memory_clock = mclk_dep_table->entries	3577	performance_level->memory_clock = mclk_dep_table->entries
3577	[state_entry->ucMemoryClockIndexLow].ulMclk;	3578	[state_entry->ucMemoryClockIndexLow].ulMclk;
3578	performance_level->engine_clock = sclk_dep_table->entries	3579	if (sclk_dep_table->ucRevId == 0)
		3580	performance_level->engine_clock = ((ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table)->entries
		3581	[state_entry->ucEngineClockIndexLow].ulSclk;
		3582	else if (sclk_dep_table->ucRevId == 1)
		3583	performance_level->engine_clock = ((ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table)->entries
3579	[state_entry->ucEngineClockIndexLow].ulSclk;	3584	[state_entry->ucEngineClockIndexLow].ulSclk;
3580	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,	3585	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,
3581	state_entry->ucPCIEGenLow);	3586	state_entry->ucPCIEGenLow);
@@ -3586,8 +3591,14 @@ static int polaris10_get_pp_table_entry_callback_func(struct pp_hwmgr *hwmgr, · 4 unmodified lines
3586	[polaris10_power_state->performance_level_count++]);	3591	[polaris10_power_state->performance_level_count++]);
3587	performance_level->memory_clock = mclk_dep_table->entries	3592	performance_level->memory_clock = mclk_dep_table->entries
3588	[state_entry->ucMemoryClockIndexHigh].ulMclk;	3593	[state_entry->ucMemoryClockIndexHigh].ulMclk;
3589	performance_level->engine_clock = sclk_dep_table->entries	3594
		3595	if (sclk_dep_table->ucRevId == 0)
		3596	performance_level->engine_clock = ((ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table)->entries
3590	[state_entry->ucEngineClockIndexHigh].ulSclk;	3597	[state_entry->ucEngineClockIndexHigh].ulSclk;
		3598	else if (sclk_dep_table->ucRevId == 1)
		3599	performance_level->engine_clock = ((ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table)->entries
		3600	[state_entry->ucEngineClockIndexHigh].ulSclk;
		3601
3591	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,	3602	performance_level->pcie_gen = get_pcie_gen_support(data->pcie_gen_cap,
3592	state_entry->ucPCIEGenHigh);	3603	state_entry->ucPCIEGenHigh);
3593	performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap,	3604	performance_level->pcie_lane = get_pcie_lane_support(data->pcie_lane_cap,
@@ -3645,7 +3656,6 @@ static int polaris10_get_pp_table_entry(struct pp_hwmgr *hwmgr, · 51 unmodified lines
3645	switch (state->classification.ui_label) {	3656	switch (state->classification.ui_label) {
3646	case PP_StateUILabel_Performance:	3657	case PP_StateUILabel_Performance:
3647	data->use_pcie_performance_levels = true;	3658	data->use_pcie_performance_levels = true;
3648
3649	for (i = 0; i < ps->performance_level_count; i++) {	3659	for (i = 0; i < ps->performance_level_count; i++) {
3650	if (data->pcie_gen_performance.max <	3660	if (data->pcie_gen_performance.max <
3651	ps->performance_levels[i].pcie_gen)	3661	ps->performance_levels[i].pcie_gen)
@@ -3661,7 +3671,6 @@ static int polaris10_get_pp_table_entry(struct pp_hwmgr *hwmgr, · 9 unmodified lines
3661	ps->performance_levels[i].pcie_lane)	3671	ps->performance_levels[i].pcie_lane)
3662	data->pcie_lane_performance.max =	3672	data->pcie_lane_performance.max =
3663	ps->performance_levels[i].pcie_lane;	3673	ps->performance_levels[i].pcie_lane;
3664
3665	if (data->pcie_lane_performance.min >	3674	if (data->pcie_lane_performance.min >
3666	ps->performance_levels[i].pcie_lane)	3675	ps->performance_levels[i].pcie_lane)
3667	data->pcie_lane_performance.min =	3676	data->pcie_lane_performance.min =
@@ -4187,12 +4196,9 @@ int polaris10_update_samu_dpm(struct pp_hwmgr *hwmgr, bool bgate) · 519 unmodified lines
4187	{	4196	{
4188	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);	4197	struct polaris10_hwmgr data = (struct polaris10_hwmgr )(hwmgr->backend);
4189	uint32_t mm_boot_level_offset, mm_boot_level_value;	4198	uint32_t mm_boot_level_offset, mm_boot_level_value;
4190	struct phm_ppt_v1_information *table_info =
4191	(struct phm_ppt_v1_information *)(hwmgr->pptable);
4192		4199
4193	if (!bgate) {	4200	if (!bgate) {
4194	data->smc_state_table.SamuBootLevel =	4201	data->smc_state_table.SamuBootLevel = 0;
4195	(uint8_t) (table_info->mm_dep_table->count - 1);
4196	mm_boot_level_offset = data->dpm_table_start +	4202	mm_boot_level_offset = data->dpm_table_start +
4197	offsetof(SMU74_Discrete_DpmTable, SamuBootLevel);	4203	offsetof(SMU74_Discrete_DpmTable, SamuBootLevel);
4198	mm_boot_level_offset /= 4;	4204	mm_boot_level_offset /= 4;

drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_powertune.c+1−1

@@ -286,7 +286,7 @@ int polaris10_populate_pm_fuses(struct pp_hwmgr *hwmgr) · 285 unmodified lines
286		286
287	if (polaris10_copy_bytes_to_smc(hwmgr->smumgr, pm_fuse_table_offset,	287	if (polaris10_copy_bytes_to_smc(hwmgr->smumgr, pm_fuse_table_offset,
288	(uint8_t *)&data->power_tune_table,	288	(uint8_t *)&data->power_tune_table,
289	sizeof(struct SMU74_Discrete_PmFuses), data->sram_end))	289	(sizeof(struct SMU74_Discrete_PmFuses) - 92), data->sram_end))
290	PP_ASSERT_WITH_CODE(false,	290	PP_ASSERT_WITH_CODE(false,
291	"Attempt to download PmFuseTable Failed!",	291	"Attempt to download PmFuseTable Failed!",
292	return -EINVAL);	292	return -EINVAL);

drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c+0−21

@@ -2847,27 +2847,6 @@ static int tonga_setup_default_dpm_tables(struct pp_hwmgr *hwmgr) · 2846 unmodified lines
2847	}	2847	}
2848	}	2848	}
2849		2849
2850	/* Initialize Vddc DPM table based on allow Vddc values. And populate corresponding std values. */
2851	for (i = 0; i < allowed_vdd_sclk_table->count; i++) {
2852	data->dpm_table.vddc_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].vddc;
2853	/* tonga_hwmgr->dpm_table.VddcTable.dpm_levels[i].param1 = stdVoltageTable->entries[i].Leakage; */
2854	/* param1 is for corresponding std voltage */
2855	data->dpm_table.vddc_table.dpm_levels[i].enabled = 1;
2856	}
2857	data->dpm_table.vddc_table.count = allowed_vdd_sclk_table->count;
2858
2859	if (NULL != allowed_vdd_mclk_table) {
2860	/* Initialize Vddci DPM table based on allow Mclk values */
2861	for (i = 0; i < allowed_vdd_mclk_table->count; i++) {
2862	data->dpm_table.vdd_ci_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].vddci;
2863	data->dpm_table.vdd_ci_table.dpm_levels[i].enabled = 1;
2864	data->dpm_table.mvdd_table.dpm_levels[i].value = allowed_vdd_mclk_table->entries[i].mvdd;
2865	data->dpm_table.mvdd_table.dpm_levels[i].enabled = 1;
2866	}
2867	data->dpm_table.vdd_ci_table.count = allowed_vdd_mclk_table->count;
2868	data->dpm_table.mvdd_table.count = allowed_vdd_mclk_table->count;
2869	}
2870
2871	/* setup PCIE gen speed levels*/	2850	/* setup PCIE gen speed levels*/
2872	tonga_setup_default_pcie_tables(hwmgr);	2851	tonga_setup_default_pcie_tables(hwmgr);
2873		2852

drivers/gpu/drm/amd/powerplay/hwmgr/tonga_pptable.h+16−0

@@ -197,6 +197,22 @@ typedef struct _ATOM_Tonga_SCLK_Dependency_Table { · 196 unmodified lines
197	ATOM_Tonga_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */	197	ATOM_Tonga_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
198	} ATOM_Tonga_SCLK_Dependency_Table;	198	} ATOM_Tonga_SCLK_Dependency_Table;
199		199
		200	typedef struct _ATOM_Polaris_SCLK_Dependency_Record {
		201	UCHAR ucVddInd; /* Base voltage */
		202	USHORT usVddcOffset; /* Offset relative to base voltage */
		203	ULONG ulSclk;
		204	USHORT usEdcCurrent;
		205	UCHAR ucReliabilityTemperature;
		206	UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
		207	ULONG ulSclkOffset;
		208	} ATOM_Polaris_SCLK_Dependency_Record;
		209
		210	typedef struct _ATOM_Polaris_SCLK_Dependency_Table {
		211	UCHAR ucRevId;
		212	UCHAR ucNumEntries; /* Number of entries. */
		213	ATOM_Polaris_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
		214	} ATOM_Polaris_SCLK_Dependency_Table;
		215
200	typedef struct _ATOM_Tonga_PCIE_Record {	216	typedef struct _ATOM_Tonga_PCIE_Record {
201	UCHAR ucPCIEGenSpeed;	217	UCHAR ucPCIEGenSpeed;
202	UCHAR usPCIELaneWidth;	218	UCHAR usPCIELaneWidth;

drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c+89−56

@@ -408,41 +408,78 @@ static int get_mclk_voltage_dependency_table( · 407 unmodified lines
408	static int get_sclk_voltage_dependency_table(	408	static int get_sclk_voltage_dependency_table(
409	struct pp_hwmgr *hwmgr,	409	struct pp_hwmgr *hwmgr,
410	phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_sclk_dep_table,	410	phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_sclk_dep_table,
411	const ATOM_Tonga_SCLK_Dependency_Table * sclk_dep_table	411	const PPTable_Generic_SubTable_Header *sclk_dep_table
412	)	412	)
413	{	413	{
414	uint32_t table_size, i;	414	uint32_t table_size, i;
415	phm_ppt_v1_clock_voltage_dependency_table *sclk_table;	415	phm_ppt_v1_clock_voltage_dependency_table *sclk_table;
416		416
417	PP_ASSERT_WITH_CODE((0 != sclk_dep_table->ucNumEntries),	417	if (sclk_dep_table->ucRevId < 1) {
418	"Invalid PowerPlay Table!", return -1);	418	const ATOM_Tonga_SCLK_Dependency_Table *tonga_table =
		419	(ATOM_Tonga_SCLK_Dependency_Table *)sclk_dep_table;
419		420
420	table_size = sizeof(uint32_t) + sizeof(phm_ppt_v1_clock_voltage_dependency_record)	421	PP_ASSERT_WITH_CODE((0 != tonga_table->ucNumEntries),
421	* sclk_dep_table->ucNumEntries;	422	"Invalid PowerPlay Table!", return -1);
422		423
423	sclk_table = (phm_ppt_v1_clock_voltage_dependency_table *)	424	table_size = sizeof(uint32_t) + sizeof(phm_ppt_v1_clock_voltage_dependency_record)
424	kzalloc(table_size, GFP_KERNEL);	425	* tonga_table->ucNumEntries;
425		426
426	if (NULL == sclk_table)	427	sclk_table = (phm_ppt_v1_clock_voltage_dependency_table *)
427	return -ENOMEM;	428	kzalloc(table_size, GFP_KERNEL);
428		429
429	memset(sclk_table, 0x00, table_size);	430	if (NULL == sclk_table)
430		431	return -ENOMEM;
431	sclk_table->count = (uint32_t)sclk_dep_table->ucNumEntries;	432
432		433	memset(sclk_table, 0x00, table_size);
433	for (i = 0; i < sclk_dep_table->ucNumEntries; i++) {	434
434	sclk_table->entries[i].vddInd =	435	sclk_table->count = (uint32_t)tonga_table->ucNumEntries;
435	sclk_dep_table->entries[i].ucVddInd;	436
436	sclk_table->entries[i].vdd_offset =	437	for (i = 0; i < tonga_table->ucNumEntries; i++) {
437	sclk_dep_table->entries[i].usVddcOffset;	438	sclk_table->entries[i].vddInd =
438	sclk_table->entries[i].clk =	439	tonga_table->entries[i].ucVddInd;
439	sclk_dep_table->entries[i].ulSclk;	440	sclk_table->entries[i].vdd_offset =
440	sclk_table->entries[i].cks_enable =	441	tonga_table->entries[i].usVddcOffset;
441	(((sclk_dep_table->entries[i].ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0;	442	sclk_table->entries[i].clk =
442	sclk_table->entries[i].cks_voffset =	443	tonga_table->entries[i].ulSclk;
443	(sclk_dep_table->entries[i].ucCKSVOffsetandDisable & 0x7F);	444	sclk_table->entries[i].cks_enable =
444	}	445	(((tonga_table->entries[i].ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0;
		446	sclk_table->entries[i].cks_voffset =
		447	(tonga_table->entries[i].ucCKSVOffsetandDisable & 0x7F);
		448	}
		449	} else {
		450	const ATOM_Polaris_SCLK_Dependency_Table *polaris_table =
		451	(ATOM_Polaris_SCLK_Dependency_Table *)sclk_dep_table;
		452
		453	PP_ASSERT_WITH_CODE((0 != polaris_table->ucNumEntries),
		454	"Invalid PowerPlay Table!", return -1);
		455
		456	table_size = sizeof(uint32_t) + sizeof(phm_ppt_v1_clock_voltage_dependency_record)
		457	* polaris_table->ucNumEntries;
		458
		459	sclk_table = (phm_ppt_v1_clock_voltage_dependency_table *)
		460	kzalloc(table_size, GFP_KERNEL);
445		461
		462	if (NULL == sclk_table)
		463	return -ENOMEM;
		464
		465	memset(sclk_table, 0x00, table_size);
		466
		467	sclk_table->count = (uint32_t)polaris_table->ucNumEntries;
		468
		469	for (i = 0; i < polaris_table->ucNumEntries; i++) {
		470	sclk_table->entries[i].vddInd =
		471	polaris_table->entries[i].ucVddInd;
		472	sclk_table->entries[i].vdd_offset =
		473	polaris_table->entries[i].usVddcOffset;
		474	sclk_table->entries[i].clk =
		475	polaris_table->entries[i].ulSclk;
		476	sclk_table->entries[i].cks_enable =
		477	(((polaris_table->entries[i].ucCKSVOffsetandDisable & 0x80) >> 7) == 0) ? 1 : 0;
		478	sclk_table->entries[i].cks_voffset =
		479	(polaris_table->entries[i].ucCKSVOffsetandDisable & 0x7F);
		480	sclk_table->entries[i].sclk_offset = polaris_table->entries[i].ulSclkOffset;
		481	}
		482	}
446	*pp_tonga_sclk_dep_table = sclk_table;	483	*pp_tonga_sclk_dep_table = sclk_table;
447		484
448	return 0;	485	return 0;
@@ -708,8 +745,8 @@ static int init_clock_voltage_dependency( · 259 unmodified lines
708	const ATOM_Tonga_MCLK_Dependency_Table *mclk_dep_table =	745	const ATOM_Tonga_MCLK_Dependency_Table *mclk_dep_table =
709	(const ATOM_Tonga_MCLK_Dependency_Table *)(((unsigned long) powerplay_table) +	746	(const ATOM_Tonga_MCLK_Dependency_Table *)(((unsigned long) powerplay_table) +
710	le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));	747	le16_to_cpu(powerplay_table->usMclkDependencyTableOffset));
711	const ATOM_Tonga_SCLK_Dependency_Table *sclk_dep_table =	748	const PPTable_Generic_SubTable_Header *sclk_dep_table =
712	(const ATOM_Tonga_SCLK_Dependency_Table *)(((unsigned long) powerplay_table) +	749	(const PPTable_Generic_SubTable_Header *)(((unsigned long) powerplay_table) +
713	le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));	750	le16_to_cpu(powerplay_table->usSclkDependencyTableOffset));
714	const ATOM_Tonga_Hard_Limit_Table *pHardLimits =	751	const ATOM_Tonga_Hard_Limit_Table *pHardLimits =
715	(const ATOM_Tonga_Hard_Limit_Table *)(((unsigned long) powerplay_table) +	752	(const ATOM_Tonga_Hard_Limit_Table *)(((unsigned long) powerplay_table) +
@@ -1040,48 +1077,44 @@ int tonga_pp_tables_uninitialize(struct pp_hwmgr *hwmgr) · 324 unmodified lines
1040	struct phm_ppt_v1_information *pp_table_information =	1077	struct phm_ppt_v1_information *pp_table_information =
1041	(struct phm_ppt_v1_information *)(hwmgr->pptable);	1078	(struct phm_ppt_v1_information *)(hwmgr->pptable);
1042		1079
1043	if (NULL != hwmgr->soft_pp_table) {	1080	if (NULL != hwmgr->soft_pp_table)
1044	kfree(hwmgr->soft_pp_table);
1045	hwmgr->soft_pp_table = NULL;	1081	hwmgr->soft_pp_table = NULL;
1046	}
1047		1082
1048	if (NULL != pp_table_information->vdd_dep_on_sclk)	1083	kfree(pp_table_information->vdd_dep_on_sclk);
1049	pp_table_information->vdd_dep_on_sclk = NULL;	1084	pp_table_information->vdd_dep_on_sclk = NULL;
1050		1085
1051	if (NULL != pp_table_information->vdd_dep_on_mclk)	1086	kfree(pp_table_information->vdd_dep_on_mclk);
1052	pp_table_information->vdd_dep_on_mclk = NULL;	1087	pp_table_information->vdd_dep_on_mclk = NULL;
1053		1088
1054	if (NULL != pp_table_information->valid_mclk_values)	1089	kfree(pp_table_information->valid_mclk_values);
1055	pp_table_information->valid_mclk_values = NULL;	1090	pp_table_information->valid_mclk_values = NULL;
1056		1091
1057	if (NULL != pp_table_information->valid_sclk_values)	1092	kfree(pp_table_information->valid_sclk_values);
1058	pp_table_information->valid_sclk_values = NULL;	1093	pp_table_information->valid_sclk_values = NULL;
1059		1094
1060	if (NULL != pp_table_information->vddc_lookup_table)	1095	kfree(pp_table_information->vddc_lookup_table);
1061	pp_table_information->vddc_lookup_table = NULL;	1096	pp_table_information->vddc_lookup_table = NULL;
1062		1097
1063	if (NULL != pp_table_information->vddgfx_lookup_table)	1098	kfree(pp_table_information->vddgfx_lookup_table);
1064	pp_table_information->vddgfx_lookup_table = NULL;	1099	pp_table_information->vddgfx_lookup_table = NULL;
1065		1100
1066	if (NULL != pp_table_information->mm_dep_table)	1101	kfree(pp_table_information->mm_dep_table);
1067	pp_table_information->mm_dep_table = NULL;	1102	pp_table_information->mm_dep_table = NULL;
1068		1103
1069	if (NULL != pp_table_information->cac_dtp_table)	1104	kfree(pp_table_information->cac_dtp_table);
1070	pp_table_information->cac_dtp_table = NULL;	1105	pp_table_information->cac_dtp_table = NULL;
1071		1106
1072	if (NULL != hwmgr->dyn_state.cac_dtp_table)	1107	kfree(hwmgr->dyn_state.cac_dtp_table);
1073	hwmgr->dyn_state.cac_dtp_table = NULL;	1108	hwmgr->dyn_state.cac_dtp_table = NULL;
1074		1109
1075	if (NULL != pp_table_information->ppm_parameter_table)	1110	kfree(pp_table_information->ppm_parameter_table);
1076	pp_table_information->ppm_parameter_table = NULL;	1111	pp_table_information->ppm_parameter_table = NULL;
1077		1112
1078	if (NULL != pp_table_information->pcie_table)	1113	kfree(pp_table_information->pcie_table);
1079	pp_table_information->pcie_table = NULL;	1114	pp_table_information->pcie_table = NULL;
1080		1115
1081	if (NULL != hwmgr->pptable) {	1116	kfree(hwmgr->pptable);
1082	kfree(hwmgr->pptable);	1117	hwmgr->pptable = NULL;
1083	hwmgr->pptable = NULL;
1084	}
1085		1118
1086	return result;	1119	return result;
1087	}	1120	}

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c+6−0

 static int fiji_smu_fini(struct pp_smumgr *smumgr)
 {
+	struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend);
+	smu_free_memory(smumgr->device, (void *)priv->header_buffer.handle);
 	if (smumgr->backend) {
 		kfree(smumgr->backend);
 		smumgr->backend = NULL;
 	}
+	cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
 	return 0;
 }

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c+1−0

@@ -469,6 +469,7 @@ int polaris10_smu_fini(struct pp_smumgr *smumgr) · 468 unmodified lines
469	kfree(smumgr->backend);	469	kfree(smumgr->backend);
470	smumgr->backend = NULL;	470	smumgr->backend = NULL;
471	}	471	}
		472	cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
472	return 0;	473	return 0;
473	}	474	}
474		475

drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c+1−0

@@ -81,6 +81,7 @@ int smum_init(struct amd_pp_init pp_init, struct pp_instance handle) · 80 unmodified lines
81		81
82	int smum_fini(struct pp_smumgr *smumgr)	82	int smum_fini(struct pp_smumgr *smumgr)
83	{	83	{
		84	kfree(smumgr->device);
84	kfree(smumgr);	85	kfree(smumgr);
85	return 0;	86	return 0;
86	}	87	}

drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c+7−0

 static int tonga_smu_fini(struct pp_smumgr *smumgr)
 {
+	struct tonga_smumgr *priv = (struct tonga_smumgr *)(smumgr->backend);
+	smu_free_memory(smumgr->device, (void *)priv->smu_buffer.handle);
+	smu_free_memory(smumgr->device, (void *)priv->header_buffer.handle);
 	if (smumgr->backend != NULL) {
 		kfree(smumgr->backend);
 		smumgr->backend = NULL;
 	}
+	cgs_rel_firmware(smumgr->device, CGS_UCODE_ID_SMU);
 	return 0;
 }

drivers/gpu/drm/drm_crtc_helper.c+28−26

 int drm_crtc_helper_set_config(struct drm_mode_set *set)
 {
 	struct drm_device *dev;
-	struct drm_crtc *new_crtc;
+	struct drm_crtc **save_encoder_crtcs, *new_crtc;
-	struct drm_encoder *save_encoders, *new_encoder, *encoder;
+	struct drm_encoder **save_connector_encoders, *new_encoder, *encoder;
 	bool mode_changed = false; /* if true do a full mode set */
 	bool fb_changed = false; /* if true and !mode_changed just do a flip */
-	struct drm_connector *save_connectors, *connector;
+	struct drm_connector *connector;
 	int count = 0, ro, fail = 0;
 	const struct drm_crtc_helper_funcs *crtc_funcs;
 	struct drm_mode_set save_set;
 	 * Allocate space for the backup of all (non-pointer) encoder and
 	 * connector data.
 	 */
-	save_encoders = kzalloc(dev->mode_config.num_encoder *
+	save_encoder_crtcs = kzalloc(dev->mode_config.num_encoder *
-				sizeof(struct drm_encoder), GFP_KERNEL);
+				sizeof(struct drm_crtc *), GFP_KERNEL);
-	if (!save_encoders)
+	if (!save_encoder_crtcs)
 		return -ENOMEM;
-	save_connectors = kzalloc(dev->mode_config.num_connector *
+	save_connector_encoders = kzalloc(dev->mode_config.num_connector *
-				sizeof(struct drm_connector), GFP_KERNEL);
+				sizeof(struct drm_encoder *), GFP_KERNEL);
-	if (!save_connectors) {
+	if (!save_connector_encoders) {
-		kfree(save_encoders);
+		kfree(save_encoder_crtcs);
 		return -ENOMEM;
 	}
 	 */
 	count = 0;
 	drm_for_each_encoder(encoder, dev) {
-		save_encoders[count++] = *encoder;
+		save_encoder_crtcs[count++] = encoder->crtc;
 	}
 	count = 0;
 	drm_for_each_connector(connector, dev) {
-		save_connectors[count++] = *connector;
+		save_connector_encoders[count++] = connector->encoder;
 	}
 	save_set.crtc = set->crtc;
 		mode_changed = true;
 	}
-	/* take a reference on all connectors in set */
+	/* take a reference on all unbound connectors in set, reuse the
+	 * already taken reference for bound connectors
+	 */
 	for (ro = 0; ro < set->num_connectors; ro++) {
+		if (set->connectors[ro]->encoder)
+			continue;
 		drm_connector_reference(set->connectors[ro]);
 	}
 		}
 	}
-	/* after fail drop reference on all connectors in save set */
+	kfree(save_connector_encoders);
-	count = 0;
+	kfree(save_encoder_crtcs);
-	drm_for_each_connector(connector, dev) {
-		drm_connector_unreference(&save_connectors[count++]);
-	}
-	kfree(save_connectors);
-	kfree(save_encoders);
 	return 0;
 fail:
 	/* Restore all previous data. */
 	count = 0;
 	drm_for_each_encoder(encoder, dev) {
-		*encoder = save_encoders[count++];
+		encoder->crtc = save_encoder_crtcs[count++];
 	}
 	count = 0;
 	drm_for_each_connector(connector, dev) {
-		*connector = save_connectors[count++];
+		connector->encoder = save_connector_encoders[count++];
 	}
-	/* after fail drop reference on all connectors in set */
+	/* after fail drop reference on all unbound connectors in set, let
+	 * bound connectors keep their reference
+	 */
 	for (ro = 0; ro < set->num_connectors; ro++) {
+		if (set->connectors[ro]->encoder)
+			continue;
 		drm_connector_unreference(set->connectors[ro]);
 	}
 				      save_set.y, save_set.fb))
 		DRM_ERROR("failed to restore config after modeset failure\n");
-	kfree(save_connectors);
+	kfree(save_connector_encoders);
-	kfree(save_encoders);
+	kfree(save_encoder_crtcs);
 	return ret;
 }
 EXPORT_SYMBOL(drm_crtc_helper_set_config);

drivers/gpu/drm/drm_dp_mst_topology.c+3−5

 		drm_dp_port_teardown_pdt(port, port->pdt);
 		if (!port->input && port->vcpi.vcpi > 0) {
-			if (mgr->mst_state) {
+			drm_dp_mst_reset_vcpi_slots(mgr, port);
-				drm_dp_mst_reset_vcpi_slots(mgr, port);
+			drm_dp_update_payload_part1(mgr);
-				drm_dp_update_payload_part1(mgr);
+			drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
-				drm_dp_mst_put_payload_id(mgr, port->vcpi.vcpi);
-			}
 		}
 		kref_put(&port->kref, drm_dp_free_mst_port);

drivers/gpu/drm/etnaviv/etnaviv_iommu.c+1−0

@@ -225,6 +225,7 @@ struct iommu_domain etnaviv_iommu_domain_alloc(struct etnaviv_gpu gpu) · 224 unmodified lines
225		225
226	etnaviv_domain->domain.type = __IOMMU_DOMAIN_PAGING;	226	etnaviv_domain->domain.type = __IOMMU_DOMAIN_PAGING;
227	etnaviv_domain->domain.ops = &etnaviv_iommu_ops.ops;	227	etnaviv_domain->domain.ops = &etnaviv_iommu_ops.ops;
		228	etnaviv_domain->domain.pgsize_bitmap = SZ_4K;
228	etnaviv_domain->domain.geometry.aperture_start = GPU_MEM_START;	229	etnaviv_domain->domain.geometry.aperture_start = GPU_MEM_START;
229	etnaviv_domain->domain.geometry.aperture_end = GPU_MEM_START + PT_ENTRIES * SZ_4K - 1;	230	etnaviv_domain->domain.geometry.aperture_end = GPU_MEM_START + PT_ENTRIES * SZ_4K - 1;
230		231

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c+2−1

 	.reg_bits = 32,
 	.reg_stride = 4,
 	.val_bits = 32,
-	.cache_type = REGCACHE_RBTREE,
+	.cache_type = REGCACHE_FLAT,
 	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
+	.max_register = 0x11fc,
 };
 static int fsl_dcu_drm_irq_init(struct drm_device *dev)

drivers/gpu/drm/i915/i915_drv.h+1−0

@@ -3481,6 +3481,7 @@ int intel_bios_init(struct drm_i915_private *dev_priv); · 3480 unmodified lines
3481	bool intel_bios_is_valid_vbt(const void *buf, size_t size);	3481	bool intel_bios_is_valid_vbt(const void *buf, size_t size);
3482	bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);	3482	bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
3483	bool intel_bios_is_lvds_present(struct drm_i915_private dev_priv, u8 i2c_pin);	3483	bool intel_bios_is_lvds_present(struct drm_i915_private dev_priv, u8 i2c_pin);
		3484	bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port);
3484	bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);	3485	bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
3485	bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);	3486	bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv, enum port port);
3486	bool intel_bios_is_dsi_present(struct drm_i915_private dev_priv, enum port port);	3487	bool intel_bios_is_dsi_present(struct drm_i915_private dev_priv, enum port port);

drivers/gpu/drm/i915/intel_bios.c+45−1

@@ -139,6 +139,11 @@ fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, · 138 unmodified lines
139	else	139	else
140	panel_fixed_mode->flags \|= DRM_MODE_FLAG_NVSYNC;	140	panel_fixed_mode->flags \|= DRM_MODE_FLAG_NVSYNC;
141		141
		142	panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) \|
		143	dvo_timing->himage_lo;
		144	panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) \|
		145	dvo_timing->vimage_lo;
		146
142	/* Some VBTs have bogus h/vtotal values */	147	/* Some VBTs have bogus h/vtotal values */
143	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)	148	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
144	panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;	149	panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
@@ -1187,7 +1192,7 @@ parse_device_mapping(struct drm_i915_private *dev_priv, · 1042 unmodified lines
1187	}	1192	}
1188	if (bdb->version < 106) {	1193	if (bdb->version < 106) {
1189	expected_size = 22;	1194	expected_size = 22;
1190	} else if (bdb->version < 109) {	1195	} else if (bdb->version < 111) {
1191	expected_size = 27;	1196	expected_size = 27;
1192	} else if (bdb->version < 195) {	1197	} else if (bdb->version < 195) {
1193	BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);	1198	BUILD_BUG_ON(sizeof(struct old_child_dev_config) != 33);
@@ -1545,6 +1550,45 @@ bool intel_bios_is_lvds_present(struct drm_i915_private dev_priv, u8 i2c_pin) · 351 unmodified lines
1545	return false;	1550	return false;
1546	}	1551	}
1547		1552
		1553	/**
		1554	* intel_bios_is_port_present - is the specified digital port present
		1555	* @dev_priv: i915 device instance
		1556	* @port: port to check
		1557	*
		1558	* Return true if the device in %port is present.
		1559	*/
		1560	bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
		1561	{
		1562	static const struct {
		1563	u16 dp, hdmi;
		1564	} port_mapping[] = {
		1565	[PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
		1566	[PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
		1567	[PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
		1568	[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
		1569	};
		1570	int i;
		1571
		1572	/* FIXME maybe deal with port A as well? */
		1573	if (WARN_ON(port == PORT_A) \|\| port >= ARRAY_SIZE(port_mapping))
		1574	return false;
		1575
		1576	if (!dev_priv->vbt.child_dev_num)
		1577	return false;
		1578
		1579	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
		1580	const union child_device_config *p_child =
		1581	&dev_priv->vbt.child_dev[i];
		1582	if ((p_child->common.dvo_port == port_mapping[port].dp \|\|
		1583	p_child->common.dvo_port == port_mapping[port].hdmi) &&
		1584	(p_child->common.device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING \|
		1585	DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
		1586	return true;
		1587	}
		1588
		1589	return false;
		1590	}
		1591
1548	/**	1592	/**
1549	* intel_bios_is_port_edp - is the device in given port eDP	1593	* intel_bios_is_port_edp - is the device in given port eDP
1550	* @dev_priv: i915 device instance	1594	* @dev_priv: i915 device instance

drivers/gpu/drm/i915/intel_display.c+60−28

@@ -8275,12 +8275,14 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) · 8274 unmodified lines
8275	{	8275	{
8276	struct drm_i915_private *dev_priv = dev->dev_private;	8276	struct drm_i915_private *dev_priv = dev->dev_private;
8277	struct intel_encoder *encoder;	8277	struct intel_encoder *encoder;
		8278	int i;
8278	u32 val, final;	8279	u32 val, final;
8279	bool has_lvds = false;	8280	bool has_lvds = false;
8280	bool has_cpu_edp = false;	8281	bool has_cpu_edp = false;
8281	bool has_panel = false;	8282	bool has_panel = false;
8282	bool has_ck505 = false;	8283	bool has_ck505 = false;
8283	bool can_ssc = false;	8284	bool can_ssc = false;
		8285	bool using_ssc_source = false;
8284		8286
8285	/* We need to take the global config into account */	8287	/* We need to take the global config into account */
8286	for_each_intel_encoder(dev, encoder) {	8288	for_each_intel_encoder(dev, encoder) {
@@ -8307,8 +8309,22 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) · 20 unmodified lines
8307	can_ssc = true;	8309	can_ssc = true;
8308	}	8310	}
8309		8311
8310	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_ck505 %d\n",	8312	/* Check if any DPLLs are using the SSC source */
8311	has_panel, has_lvds, has_ck505);	8313	for (i = 0; i < dev_priv->num_shared_dpll; i++) {
		8314	u32 temp = I915_READ(PCH_DPLL(i));
		8315
		8316	if (!(temp & DPLL_VCO_ENABLE))
		8317	continue;
		8318
		8319	if ((temp & PLL_REF_INPUT_MASK) ==
		8320	PLLB_REF_INPUT_SPREADSPECTRUMIN) {
		8321	using_ssc_source = true;
		8322	break;
		8323	}
		8324	}
		8325
		8326	DRM_DEBUG_KMS("has_panel %d has_lvds %d has_ck505 %d using_ssc_source %d\n",
		8327	has_panel, has_lvds, has_ck505, using_ssc_source);
8312		8328
8313	/* Ironlake: try to setup display ref clock before DPLL	8329	/* Ironlake: try to setup display ref clock before DPLL
8314	* enabling. This is only under driver's control after	8330	* enabling. This is only under driver's control after
@@ -8345,9 +8361,9 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) · 30 unmodified lines
8345	final \|= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;	8361	final \|= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
8346	} else	8362	} else
8347	final \|= DREF_CPU_SOURCE_OUTPUT_DISABLE;	8363	final \|= DREF_CPU_SOURCE_OUTPUT_DISABLE;
8348	} else {	8364	} else if (using_ssc_source) {
8349	final \|= DREF_SSC_SOURCE_DISABLE;	8365	final \|= DREF_SSC_SOURCE_ENABLE;
8350	final \|= DREF_CPU_SOURCE_OUTPUT_DISABLE;	8366	final \|= DREF_SSC1_ENABLE;
8351	}	8367	}
8352		8368
8353	if (final == val)	8369	if (final == val)
@@ -8393,7 +8409,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) · 39 unmodified lines
8393	POSTING_READ(PCH_DREF_CONTROL);	8409	POSTING_READ(PCH_DREF_CONTROL);
8394	udelay(200);	8410	udelay(200);
8395	} else {	8411	} else {
8396	DRM_DEBUG_KMS("Disabling SSC entirely\n");	8412	DRM_DEBUG_KMS("Disabling CPU source output\n");
8397		8413
8398	val &= ~DREF_CPU_SOURCE_OUTPUT_MASK;	8414	val &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
8399		8415
@@ -8404,16 +8420,20 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) · 4 unmodified lines
8404	POSTING_READ(PCH_DREF_CONTROL);	8420	POSTING_READ(PCH_DREF_CONTROL);
8405	udelay(200);	8421	udelay(200);
8406		8422
8407	/* Turn off the SSC source */	8423	if (!using_ssc_source) {
8408	val &= ~DREF_SSC_SOURCE_MASK;	8424	DRM_DEBUG_KMS("Disabling SSC source\n");
8409	val \|= DREF_SSC_SOURCE_DISABLE;
8410		8425
8411	/* Turn off SSC1 */	8426	/* Turn off the SSC source */
8412	val &= ~DREF_SSC1_ENABLE;	8427	val &= ~DREF_SSC_SOURCE_MASK;
		8428	val \|= DREF_SSC_SOURCE_DISABLE;
8413		8429
8414	I915_WRITE(PCH_DREF_CONTROL, val);	8430	/* Turn off SSC1 */
8415	POSTING_READ(PCH_DREF_CONTROL);	8431	val &= ~DREF_SSC1_ENABLE;
8416	udelay(200);	8432
		8433	I915_WRITE(PCH_DREF_CONTROL, val);
		8434	POSTING_READ(PCH_DREF_CONTROL);
		8435	udelay(200);
		8436	}
8417	}	8437	}
8418		8438
8419	BUG_ON(val != final);	8439	BUG_ON(val != final);
@@ -14554,6 +14574,8 @@ static void intel_setup_outputs(struct drm_device *dev) · 6134 unmodified lines
14554	if (I915_READ(PCH_DP_D) & DP_DETECTED)	14574	if (I915_READ(PCH_DP_D) & DP_DETECTED)
14555	intel_dp_init(dev, PCH_DP_D, PORT_D);	14575	intel_dp_init(dev, PCH_DP_D, PORT_D);
14556	} else if (IS_VALLEYVIEW(dev) \|\| IS_CHERRYVIEW(dev)) {	14576	} else if (IS_VALLEYVIEW(dev) \|\| IS_CHERRYVIEW(dev)) {
		14577	bool has_edp, has_port;
		14578
14557	/*	14579	/*
14558	* The DP_DETECTED bit is the latched state of the DDC	14580	* The DP_DETECTED bit is the latched state of the DDC
14559	* SDA pin at boot. However since eDP doesn't require DDC	14581	* SDA pin at boot. However since eDP doesn't require DDC
@@ -14562,27 +14584,37 @@ static void intel_setup_outputs(struct drm_device *dev) · 2 unmodified lines
14562	* Thus we can't rely on the DP_DETECTED bit alone to detect	14584	* Thus we can't rely on the DP_DETECTED bit alone to detect
14563	* eDP ports. Consult the VBT as well as DP_DETECTED to	14585	* eDP ports. Consult the VBT as well as DP_DETECTED to
14564	* detect eDP ports.	14586	* detect eDP ports.
		14587	*
		14588	* Sadly the straps seem to be missing sometimes even for HDMI
		14589	* ports (eg. on Voyo V3 - CHT x7-Z8700), so check both strap
		14590	* and VBT for the presence of the port. Additionally we can't
		14591	* trust the port type the VBT declares as we've seen at least
		14592	* HDMI ports that the VBT claim are DP or eDP.
14565	*/	14593	*/
14566	if (I915_READ(VLV_HDMIB) & SDVO_DETECTED &&	14594	has_edp = intel_dp_is_edp(dev, PORT_B);
14567	!intel_dp_is_edp(dev, PORT_B))	14595	has_port = intel_bios_is_port_present(dev_priv, PORT_B);
		14596	if (I915_READ(VLV_DP_B) & DP_DETECTED \|\| has_port)
		14597	has_edp &= intel_dp_init(dev, VLV_DP_B, PORT_B);
		14598	if ((I915_READ(VLV_HDMIB) & SDVO_DETECTED \|\| has_port) && !has_edp)
14568	intel_hdmi_init(dev, VLV_HDMIB, PORT_B);	14599	intel_hdmi_init(dev, VLV_HDMIB, PORT_B);
14569	if (I915_READ(VLV_DP_B) & DP_DETECTED \|\|
14570	intel_dp_is_edp(dev, PORT_B))
14571	intel_dp_init(dev, VLV_DP_B, PORT_B);
14572		14600
14573	if (I915_READ(VLV_HDMIC) & SDVO_DETECTED &&	14601	has_edp = intel_dp_is_edp(dev, PORT_C);
14574	!intel_dp_is_edp(dev, PORT_C))	14602	has_port = intel_bios_is_port_present(dev_priv, PORT_C);
		14603	if (I915_READ(VLV_DP_C) & DP_DETECTED \|\| has_port)
		14604	has_edp &= intel_dp_init(dev, VLV_DP_C, PORT_C);
		14605	if ((I915_READ(VLV_HDMIC) & SDVO_DETECTED \|\| has_port) && !has_edp)
14575	intel_hdmi_init(dev, VLV_HDMIC, PORT_C);	14606	intel_hdmi_init(dev, VLV_HDMIC, PORT_C);
14576	if (I915_READ(VLV_DP_C) & DP_DETECTED \|\|
14577	intel_dp_is_edp(dev, PORT_C))
14578	intel_dp_init(dev, VLV_DP_C, PORT_C);
14579		14607
14580	if (IS_CHERRYVIEW(dev)) {	14608	if (IS_CHERRYVIEW(dev)) {
14581	/* eDP not supported on port D, so don't check VBT */	14609	/*
14582	if (I915_READ(CHV_HDMID) & SDVO_DETECTED)	14610	* eDP not supported on port D,
14583	intel_hdmi_init(dev, CHV_HDMID, PORT_D);	14611	* so no need to worry about it
14584	if (I915_READ(CHV_DP_D) & DP_DETECTED)	14612	*/
		14613	has_port = intel_bios_is_port_present(dev_priv, PORT_D);
		14614	if (I915_READ(CHV_DP_D) & DP_DETECTED \|\| has_port)
14585	intel_dp_init(dev, CHV_DP_D, PORT_D);	14615	intel_dp_init(dev, CHV_DP_D, PORT_D);
		14616	if (I915_READ(CHV_HDMID) & SDVO_DETECTED \|\| has_port)
		14617	intel_hdmi_init(dev, CHV_HDMID, PORT_D);
14586	}	14618	}
14587		14619
14588	intel_dsi_init(dev);	14620	intel_dsi_init(dev);

drivers/gpu/drm/i915/intel_dp.c+10−8

@@ -5725,8 +5725,11 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, · 5724 unmodified lines
5725	if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {	5725	if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {
5726	fixed_mode = drm_mode_duplicate(dev,	5726	fixed_mode = drm_mode_duplicate(dev,
5727	dev_priv->vbt.lfp_lvds_vbt_mode);	5727	dev_priv->vbt.lfp_lvds_vbt_mode);
5728	if (fixed_mode)	5728	if (fixed_mode) {
5729	fixed_mode->type \|= DRM_MODE_TYPE_PREFERRED;	5729	fixed_mode->type \|= DRM_MODE_TYPE_PREFERRED;
		5730	connector->display_info.width_mm = fixed_mode->width_mm;
		5731	connector->display_info.height_mm = fixed_mode->height_mm;
		5732	}
5730	}	5733	}
5731	mutex_unlock(&dev->mode_config.mutex);	5734	mutex_unlock(&dev->mode_config.mutex);
5732		5735
@@ -5923,9 +5926,9 @@ fail: · 190 unmodified lines
5923	return false;	5926	return false;
5924	}	5927	}
5925		5928
5926	void	5929	bool intel_dp_init(struct drm_device *dev,
5927	intel_dp_init(struct drm_device *dev,	5930	i915_reg_t output_reg,
5928	i915_reg_t output_reg, enum port port)	5931	enum port port)
5929	{	5932	{
5930	struct drm_i915_private *dev_priv = dev->dev_private;	5933	struct drm_i915_private *dev_priv = dev->dev_private;
5931	struct intel_digital_port *intel_dig_port;	5934	struct intel_digital_port *intel_dig_port;
@@ -5935,7 +5938,7 @@ intel_dp_init(struct drm_device *dev, · 3 unmodified lines
5935		5938
5936	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);	5939	intel_dig_port = kzalloc(sizeof(*intel_dig_port), GFP_KERNEL);
5937	if (!intel_dig_port)	5940	if (!intel_dig_port)
5938	return;	5941	return false;
5939		5942
5940	intel_connector = intel_connector_alloc();	5943	intel_connector = intel_connector_alloc();
5941	if (!intel_connector)	5944	if (!intel_connector)
@@ -5992,7 +5995,7 @@ intel_dp_init(struct drm_device *dev, · 50 unmodified lines
5992	if (!intel_dp_init_connector(intel_dig_port, intel_connector))	5995	if (!intel_dp_init_connector(intel_dig_port, intel_connector))
5993	goto err_init_connector;	5996	goto err_init_connector;
5994		5997
5995	return;	5998	return true;
5996		5999
5997	err_init_connector:	6000	err_init_connector:
5998	drm_encoder_cleanup(encoder);	6001	drm_encoder_cleanup(encoder);
@@ -6000,8 +6003,7 @@ err_encoder_init: · 1 unmodified line
6000	kfree(intel_connector);	6003	kfree(intel_connector);
6001	err_connector_alloc:	6004	err_connector_alloc:
6002	kfree(intel_dig_port);	6005	kfree(intel_dig_port);
6003		6006	return false;
6004	return;
6005	}	6007	}
6006		6008
6007	void intel_dp_mst_suspend(struct drm_device *dev)	6009	void intel_dp_mst_suspend(struct drm_device *dev)

drivers/gpu/drm/i915/intel_dpll_mgr.c+3−0

@@ -366,6 +366,9 @@ ibx_get_dpll(struct intel_crtc crtc, struct intel_crtc_state crtc_state, · 365 unmodified lines
366	DPLL_ID_PCH_PLL_B);	366	DPLL_ID_PCH_PLL_B);
367	}	367	}
368		368
		369	if (!pll)
		370	return NULL;
		371
369	/* reference the pll */	372	/* reference the pll */
370	intel_reference_shared_dpll(pll, crtc_state);	373	intel_reference_shared_dpll(pll, crtc_state);
371		374

drivers/gpu/drm/i915/intel_drv.h+1−1

@@ -1284,7 +1284,7 @@ void intel_csr_ucode_suspend(struct drm_i915_private *); · 1283 unmodified lines
1284	void intel_csr_ucode_resume(struct drm_i915_private *);	1284	void intel_csr_ucode_resume(struct drm_i915_private *);
1285		1285
1286	/* intel_dp.c */	1286	/* intel_dp.c */
1287	void intel_dp_init(struct drm_device *dev, i915_reg_t output_reg, enum port port);	1287	bool intel_dp_init(struct drm_device *dev, i915_reg_t output_reg, enum port port);
1288	bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,	1288	bool intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
1289	struct intel_connector *intel_connector);	1289	struct intel_connector *intel_connector);
1290	void intel_dp_set_link_params(struct intel_dp *intel_dp,	1290	void intel_dp_set_link_params(struct intel_dp *intel_dp,

drivers/gpu/drm/i915/intel_dsi.c+3−0

@@ -1545,6 +1545,9 @@ void intel_dsi_init(struct drm_device *dev) · 1544 unmodified lines
1545	goto err;	1545	goto err;
1546	}	1546	}
1547		1547
		1548	connector->display_info.width_mm = fixed_mode->width_mm;
		1549	connector->display_info.height_mm = fixed_mode->height_mm;
		1550
1548	intel_panel_init(&intel_connector->panel, fixed_mode, NULL);	1551	intel_panel_init(&intel_connector->panel, fixed_mode, NULL);
1549		1552
1550	intel_dsi_add_properties(intel_connector);	1553	intel_dsi_add_properties(intel_connector);

drivers/gpu/drm/i915/intel_hdmi.c+3−0

@@ -2142,6 +2142,9 @@ void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, · 2141 unmodified lines
2142	enum port port = intel_dig_port->port;	2142	enum port port = intel_dig_port->port;
2143	uint8_t alternate_ddc_pin;	2143	uint8_t alternate_ddc_pin;
2144		2144
		2145	DRM_DEBUG_KMS("Adding HDMI connector on port %c\n",
		2146	port_name(port));
		2147
2145	if (WARN(intel_dig_port->max_lanes < 4,	2148	if (WARN(intel_dig_port->max_lanes < 4,
2146	"Not enough lanes (%d) for HDMI on port %c\n",	2149	"Not enough lanes (%d) for HDMI on port %c\n",
2147	intel_dig_port->max_lanes, port_name(port)))	2150	intel_dig_port->max_lanes, port_name(port)))

drivers/gpu/drm/i915/intel_lvds.c+2−0

 		fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
 		if (fixed_mode) {
 			fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
+			connector->display_info.width_mm = fixed_mode->width_mm;
+			connector->display_info.height_mm = fixed_mode->height_mm;
 			goto out;
 		}
 	}

drivers/gpu/drm/i915/intel_vbt_defs.h+4−3

 	u8 vsync_off:4;
 	u8 rsvd0:6;
 	u8 hsync_off_hi:2;
-	u8 h_image;
+	u8 himage_lo;
-	u8 v_image;
+	u8 vimage_lo;
-	u8 max_hv;
+	u8 vimage_hi:4;
+	u8 himage_hi:4;
 	u8 h_border;
 	u8 v_border;
 	u8 rsvd1:3;

drivers/gpu/drm/msm/adreno/adreno_gpu.c+1−1

@@ -408,7 +408,7 @@ int adreno_gpu_init(struct drm_device drm, struct platform_device pdev, · 407 unmodified lines
408	}	408	}
409		409
410	adreno_gpu->memptrs = msm_gem_vaddr(adreno_gpu->memptrs_bo);	410	adreno_gpu->memptrs = msm_gem_vaddr(adreno_gpu->memptrs_bo);
411	if (!adreno_gpu->memptrs) {	411	if (IS_ERR(adreno_gpu->memptrs)) {
412	dev_err(drm->dev, "could not vmap memptrs\n");	412	dev_err(drm->dev, "could not vmap memptrs\n");
413	return -ENOMEM;	413	return -ENOMEM;
414	}	414	}

drivers/gpu/drm/msm/msm_fbdev.c+4−0

 	dev->mode_config.fb_base = paddr;
 	fbi->screen_base = msm_gem_vaddr_locked(fbdev->bo);
+	if (IS_ERR(fbi->screen_base)) {
+		ret = PTR_ERR(fbi->screen_base);
+		goto fail_unlock;
+	}
 	fbi->screen_size = fbdev->bo->size;
 	fbi->fix.smem_start = paddr;
 	fbi->fix.smem_len = fbdev->bo->size;

drivers/gpu/drm/msm/msm_gem.c+2−0

 			return ERR_CAST(pages);
 		msm_obj->vaddr = vmap(pages, obj->size >> PAGE_SHIFT,
 				VM_MAP, pgprot_writecombine(PAGE_KERNEL));
+		if (msm_obj->vaddr == NULL)
+			return ERR_PTR(-ENOMEM);
 	}
 	return msm_obj->vaddr;
 }

drivers/gpu/drm/msm/msm_gem_submit.c+7−0

 	submit->dev = dev;
 	submit->gpu = gpu;
+	submit->fence = NULL;
 	submit->pid = get_pid(task_pid(current));
 	/* initially, until copy_from_user() and bo lookup succeeds: */
 	submit->nr_bos = 0;
 	submit->nr_cmds = 0;
+	INIT_LIST_HEAD(&submit->node);
 	INIT_LIST_HEAD(&submit->bo_list);
 	ww_acquire_init(&submit->ticket, &reservation_ww_class);
 		void __user *userptr =
 			u64_to_user_ptr(args->bos + (i * sizeof(submit_bo)));
+		/* make sure we don't have garbage flags, in case we hit
+		 * error path before flags is initialized:
+		 */
+		submit->bos[i].flags = 0;
 		ret = copy_from_user(&submit_bo, userptr, sizeof(submit_bo));
 		if (ret) {
 			ret = -EFAULT;

drivers/gpu/drm/msm/msm_rd.c+3−0

@@ -312,6 +312,9 @@ void msm_rd_dump_submit(struct msm_gem_submit *submit) · 311 unmodified lines
312	struct msm_gem_object *obj = submit->bos[idx].obj;	312	struct msm_gem_object *obj = submit->bos[idx].obj;
313	const char *buf = msm_gem_vaddr_locked(&obj->base);	313	const char *buf = msm_gem_vaddr_locked(&obj->base);
314		314
		315	if (IS_ERR(buf))
		316	continue;
		317
315	buf += iova - submit->bos[idx].iova;	318	buf += iova - submit->bos[idx].iova;
316		319
317	rd_write_section(rd, RD_GPUADDR,	320	rd_write_section(rd, RD_GPUADDR,

drivers/gpu/drm/msm/msm_ringbuffer.c+4−0

 	}
 	ring->start = msm_gem_vaddr_locked(ring->bo);
+	if (IS_ERR(ring->start)) {
+		ret = PTR_ERR(ring->start);
+		goto fail;
+	}
 	ring->end   = ring->start + (size / 4);
 	ring->cur   = ring->start;

drivers/gpu/drm/nouveau/include/nvkm/core/device.h+1−1

 	NVKM_SUBDEV_MC,
 	NVKM_SUBDEV_BUS,
 	NVKM_SUBDEV_TIMER,
+	NVKM_SUBDEV_INSTMEM,
 	NVKM_SUBDEV_FB,
 	NVKM_SUBDEV_LTC,
-	NVKM_SUBDEV_INSTMEM,
 	NVKM_SUBDEV_MMU,
 	NVKM_SUBDEV_BAR,
 	NVKM_SUBDEV_PMU,

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/disp.h+3−2

 		      u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
 struct nvbios_ocfg {
-	u16 match;
+	u8  proto;
+	u8  flags;
 	u16 clkcmp[2];
 };
 		      u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
 u16 nvbios_ocfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
 		      u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
-u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u16 type,
+u16 nvbios_ocfg_match(struct nvkm_bios *, u16 outp, u8 proto, u8 flags,
 		      u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
 u16 nvbios_oclk_match(struct nvkm_bios *, u16 cmp, u32 khz);
 #endif

drivers/gpu/drm/nouveau/nouveau_fbcon.c+1−0

@@ -552,6 +552,7 @@ nouveau_fbcon_init(struct drm_device *dev) · 551 unmodified lines
552	if (ret)	552	if (ret)
553	goto fini;	553	goto fini;
554		554
		555	fbcon->helper.fbdev->pixmap.buf_align = 4;
555	return 0;	556	return 0;
556		557
557	fini:	558	fini:

drivers/gpu/drm/nouveau/nv04_fbcon.c+2−5

 	uint32_t fg;
 	uint32_t bg;
 	uint32_t dsize;
-	uint32_t width;
 	uint32_t *data = (uint32_t *)image->data;
 	int ret;
 	if (ret)
 		return ret;
-	width = ALIGN(image->width, 8);
-	dsize = ALIGN(width * image->height, 32) >> 5;
 	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
 	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
 		fg = ((uint32_t *) info->pseudo_palette)[image->fg_color];
 			 ((image->dx + image->width) & 0xffff));
 	OUT_RING(chan, bg);
 	OUT_RING(chan, fg);
-	OUT_RING(chan, (image->height << 16) | width);
+	OUT_RING(chan, (image->height << 16) | image->width);
 	OUT_RING(chan, (image->height << 16) | image->width);
 	OUT_RING(chan, (image->dy << 16) | (image->dx & 0xffff));
+	dsize = ALIGN(image->width * image->height, 32) >> 5;
 	while (dsize) {
 		int iter_len = dsize > 128 ? 128 : dsize;

drivers/gpu/drm/nouveau/nv50_fbcon.c+2−4

 	struct nouveau_fbdev *nfbdev = info->par;
 	struct nouveau_drm *drm = nouveau_drm(nfbdev->dev);
 	struct nouveau_channel *chan = drm->channel;
-	uint32_t width, dwords, *data = (uint32_t *)image->data;
+	uint32_t dwords, *data = (uint32_t *)image->data;
 	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
 	uint32_t *palette = info->pseudo_palette;
 	int ret;
 	if (ret)
 		return ret;
-	width = ALIGN(image->width, 32);
-	dwords = (width * image->height) >> 5;
 	BEGIN_NV04(chan, NvSub2D, 0x0814, 2);
 	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
 	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
 	OUT_RING(chan, 0);
 	OUT_RING(chan, image->dy);
+	dwords = ALIGN(image->width * image->height, 32) >> 5;
 	while (dwords) {
 		int push = dwords > 2047 ? 2047 : dwords;

drivers/gpu/drm/nouveau/nvc0_fbcon.c+2−4

 	struct nouveau_fbdev *nfbdev = info->par;
 	struct nouveau_drm *drm = nouveau_drm(nfbdev->dev);
 	struct nouveau_channel *chan = drm->channel;
-	uint32_t width, dwords, *data = (uint32_t *)image->data;
+	uint32_t dwords, *data = (uint32_t *)image->data;
 	uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
 	uint32_t *palette = info->pseudo_palette;
 	int ret;
 	if (ret)
 		return ret;
-	width = ALIGN(image->width, 32);
-	dwords = (width * image->height) >> 5;
 	BEGIN_NVC0(chan, NvSub2D, 0x0814, 2);
 	if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
 	    info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
 	OUT_RING  (chan, 0);
 	OUT_RING  (chan, image->dy);
+	dwords = ALIGN(image->width * image->height, 32) >> 5;
 	while (dwords) {
 		int push = dwords > 2047 ? 2047 : dwords;

drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c+1−1

@@ -1614,7 +1614,7 @@ nvkm_device_pci_func = { · 1613 unmodified lines
1614	.fini = nvkm_device_pci_fini,	1614	.fini = nvkm_device_pci_fini,
1615	.resource_addr = nvkm_device_pci_resource_addr,	1615	.resource_addr = nvkm_device_pci_resource_addr,
1616	.resource_size = nvkm_device_pci_resource_size,	1616	.resource_size = nvkm_device_pci_resource_size,
1617	.cpu_coherent = !IS_ENABLED(CONFIG_ARM) && !IS_ENABLED(CONFIG_ARM64),	1617	.cpu_coherent = !IS_ENABLED(CONFIG_ARM),
1618	};	1618	};
1619		1619
1620	int	1620	int

drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild+1−0

@@ -18,6 +18,7 @@ nvkm-y += nvkm/engine/disp/piornv50.o · 17 unmodified lines
18	nvkm-y += nvkm/engine/disp/sornv50.o	18	nvkm-y += nvkm/engine/disp/sornv50.o
19	nvkm-y += nvkm/engine/disp/sorg94.o	19	nvkm-y += nvkm/engine/disp/sorg94.o
20	nvkm-y += nvkm/engine/disp/sorgf119.o	20	nvkm-y += nvkm/engine/disp/sorgf119.o
		21	nvkm-y += nvkm/engine/disp/sorgm107.o
21	nvkm-y += nvkm/engine/disp/sorgm200.o	22	nvkm-y += nvkm/engine/disp/sorgm200.o
22	nvkm-y += nvkm/engine/disp/dport.o	23	nvkm-y += nvkm/engine/disp/dport.o
23		24

drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c+5−8

 	mask |= 0x0001 << or;
 	mask |= 0x0100 << head;
 	list_for_each_entry(outp, &disp->base.outp, head) {
 		if ((outp->info.hasht & 0xff) == type &&
 		    (outp->info.hashm & mask) == mask) {
 	if (!outp)
 		return NULL;
+	*conf = (ctrl & 0x00000f00) >> 8;
 	switch (outp->info.type) {
 	case DCB_OUTPUT_TMDS:
-		*conf = (ctrl & 0x00000f00) >> 8;
 		if (*conf == 5)
 			*conf |= 0x0100;
 		break;
 	case DCB_OUTPUT_LVDS:
-		*conf = disp->sor.lvdsconf;
+		*conf |= disp->sor.lvdsconf;
-		break;
-	case DCB_OUTPUT_DP:
-		*conf = (ctrl & 0x00000f00) >> 8;
 		break;
-	case DCB_OUTPUT_ANALOG:
 	default:
-		*conf = 0x00ff;
 		break;
 	}
-	data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2);
+	data = nvbios_ocfg_match(bios, data, *conf & 0xff, *conf >> 8,
+				 &ver, &hdr, &cnt, &len, &info2);
 	if (data && id < 0xff) {
 		data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk);
 		if (data) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c+1−1

@@ -36,7 +36,7 @@ gm107_disp = { · 35 unmodified lines
36	.outp.internal.crt = nv50_dac_output_new,	36	.outp.internal.crt = nv50_dac_output_new,
37	.outp.internal.tmds = nv50_sor_output_new,	37	.outp.internal.tmds = nv50_sor_output_new,
38	.outp.internal.lvds = nv50_sor_output_new,	38	.outp.internal.lvds = nv50_sor_output_new,
39	.outp.internal.dp = gf119_sor_dp_new,	39	.outp.internal.dp = gm107_sor_dp_new,
40	.dac.nr = 3,	40	.dac.nr = 3,
41	.dac.power = nv50_dac_power,	41	.dac.power = nv50_dac_power,
42	.dac.sense = nv50_dac_sense,	42	.dac.sense = nv50_dac_sense,

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c+4−8

 	if (!outp)
 		return NULL;
+	*conf = (ctrl & 0x00000f00) >> 8;
 	if (outp->info.location == 0) {
 		switch (outp->info.type) {
 		case DCB_OUTPUT_TMDS:
-			*conf = (ctrl & 0x00000f00) >> 8;
 			if (*conf == 5)
 				*conf |= 0x0100;
 			break;
 		case DCB_OUTPUT_LVDS:
-			*conf = disp->sor.lvdsconf;
+			*conf |= disp->sor.lvdsconf;
 			break;
-		case DCB_OUTPUT_DP:
-			*conf = (ctrl & 0x00000f00) >> 8;
-			break;
-		case DCB_OUTPUT_ANALOG:
 		default:
-			*conf = 0x00ff;
 			break;
 		}
 	} else {
 		pclk = pclk / 2;
 	}
-	data = nvbios_ocfg_match(bios, data, *conf, &ver, &hdr, &cnt, &len, &info2);
+	data = nvbios_ocfg_match(bios, data, *conf & 0xff, *conf >> 8,
+				 &ver, &hdr, &cnt, &len, &info2);
 	if (data && id < 0xff) {
 		data = nvbios_oclk_match(bios, info2.clkcmp[id], pclk);
 		if (data) {

drivers/gpu/drm/nouveau/nvkm/engine/disp/outpdp.h+7−2

 int gf119_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
 		     struct nvkm_output **);
 int gf119_sor_dp_lnk_ctl(struct nvkm_output_dp *, int, int, bool);
+int gf119_sor_dp_drv_ctl(struct nvkm_output_dp *, int, int, int, int);
-int  gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
+int gm107_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
-		      struct nvkm_output **);
+		     struct nvkm_output **);
+int gm107_sor_dp_pattern(struct nvkm_output_dp *, int);
+int gm200_sor_dp_new(struct nvkm_disp *, int, struct dcb_output *,
+		     struct nvkm_output **);
 #endif

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c+2−3

 gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
 {
 	struct nvkm_device *device = outp->base.disp->engine.subdev.device;
-	const u32 loff = gf119_sor_loff(outp);
+	nvkm_mask(device, 0x61c110, 0x0f0f0f0f, 0x01010101 * pattern);
-	nvkm_mask(device, 0x61c110 + loff, 0x0f0f0f0f, 0x01010101 * pattern);
 	return 0;
 }
 	return 0;
 }
-static int
+int
 gf119_sor_dp_drv_ctl(struct nvkm_output_dp *outp,
 		     int ln, int vs, int pe, int pc)
 {

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm107.c+53−0

@@ -0,0 +1,53 @@
	1	/*
	2	* Copyright 2016 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Ben Skeggs <bskeggs@redhat.com>
	23	*/
	24	#include "nv50.h"
	25	#include "outpdp.h"
	26
	27	int
	28	gm107_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
	29	{
	30	struct nvkm_device *device = outp->base.disp->engine.subdev.device;
	31	const u32 soff = outp->base.or * 0x800;
	32	const u32 data = 0x01010101 * pattern;
	33	if (outp->base.info.sorconf.link & 1)
	34	nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
	35	else
	36	nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
	37	return 0;
	38	}
	39
	40	static const struct nvkm_output_dp_func
	41	gm107_sor_dp_func = {
	42	.pattern = gm107_sor_dp_pattern,
	43	.lnk_pwr = g94_sor_dp_lnk_pwr,
	44	.lnk_ctl = gf119_sor_dp_lnk_ctl,
	45	.drv_ctl = gf119_sor_dp_drv_ctl,
	46	};
	47
	48	int
	49	gm107_sor_dp_new(struct nvkm_disp *disp, int index,
	50	struct dcb_output dcbE, struct nvkm_output *poutp)
	51	{
	52	return nvkm_output_dp_new_(&gm107_sor_dp_func, disp, index, dcbE, poutp);
	53	}

drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgm200.c+1−14

 	return lane * 0x08;
 }
-static int
-gm200_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
-{
-	struct nvkm_device *device = outp->base.disp->engine.subdev.device;
-	const u32 soff = gm200_sor_soff(outp);
-	const u32 data = 0x01010101 * pattern;
-	if (outp->base.info.sorconf.link & 1)
-		nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data);
-	else
-		nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data);
-	return 0;
-}
 static int
 gm200_sor_dp_lnk_pwr(struct nvkm_output_dp *outp, int nr)
 {
 static const struct nvkm_output_dp_func
 gm200_sor_dp_func = {
-	.pattern = gm200_sor_dp_pattern,
+	.pattern = gm107_sor_dp_pattern,
 	.lnk_pwr = gm200_sor_dp_lnk_pwr,
 	.lnk_ctl = gf119_sor_dp_lnk_ctl,
 	.drv_ctl = gm200_sor_dp_drv_ctl,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c+28−9

 }
 static const struct nvkm_enum gf100_mp_warp_error[] = {
-	{ 0x00, "NO_ERROR" },
+	{ 0x01, "STACK_ERROR" },
-	{ 0x01, "STACK_MISMATCH" },
+	{ 0x02, "API_STACK_ERROR" },
+	{ 0x03, "RET_EMPTY_STACK_ERROR" },
+	{ 0x04, "PC_WRAP" },
 	{ 0x05, "MISALIGNED_PC" },
-	{ 0x08, "MISALIGNED_GPR" },
+	{ 0x06, "PC_OVERFLOW" },
-	{ 0x09, "INVALID_OPCODE" },
+	{ 0x07, "MISALIGNED_IMMC_ADDR" },
-	{ 0x0d, "GPR_OUT_OF_BOUNDS" },
+	{ 0x08, "MISALIGNED_REG" },
-	{ 0x0e, "MEM_OUT_OF_BOUNDS" },
+	{ 0x09, "ILLEGAL_INSTR_ENCODING" },
-	{ 0x0f, "UNALIGNED_MEM_ACCESS" },
+	{ 0x0a, "ILLEGAL_SPH_INSTR_COMBO" },
+	{ 0x0b, "ILLEGAL_INSTR_PARAM" },
+	{ 0x0c, "INVALID_CONST_ADDR" },
+	{ 0x0d, "OOR_REG" },
+	{ 0x0e, "OOR_ADDR" },
+	{ 0x0f, "MISALIGNED_ADDR" },
 	{ 0x10, "INVALID_ADDR_SPACE" },
-	{ 0x11, "INVALID_PARAM" },
+	{ 0x11, "ILLEGAL_INSTR_PARAM2" },
+	{ 0x12, "INVALID_CONST_ADDR_LDC" },
+	{ 0x13, "GEOMETRY_SM_ERROR" },
+	{ 0x14, "DIVERGENT" },
+	{ 0x15, "WARP_EXIT" },
 	{}
 };
 static const struct nvkm_bitfield gf100_mp_global_error[] = {
+	{ 0x00000001, "SM_TO_SM_FAULT" },
+	{ 0x00000002, "L1_ERROR" },
 	{ 0x00000004, "MULTIPLE_WARP_ERRORS" },
-	{ 0x00000008, "OUT_OF_STACK_SPACE" },
+	{ 0x00000008, "PHYSICAL_STACK_OVERFLOW" },
+	{ 0x00000010, "BPT_INT" },
+	{ 0x00000020, "BPT_PAUSE" },
+	{ 0x00000040, "SINGLE_STEP_COMPLETE" },
+	{ 0x20000000, "ECC_SEC_ERROR" },
+	{ 0x40000000, "ECC_DED_ERROR" },
+	{ 0x80000000, "TIMEOUT" },
 	{}
 };

drivers/gpu/drm/nouveau/nvkm/subdev/bios/disp.c+5−3

 {
 	u16 data = nvbios_ocfg_entry(bios, outp, idx, ver, hdr, cnt, len);
 	if (data) {
-		info->match     = nvbios_rd16(bios, data + 0x00);
+		info->proto     = nvbios_rd08(bios, data + 0x00);
+		info->flags     = nvbios_rd16(bios, data + 0x01);
 		info->clkcmp[0] = nvbios_rd16(bios, data + 0x02);
 		info->clkcmp[1] = nvbios_rd16(bios, data + 0x04);
 	}
 }
 u16
-nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u16 type,
+nvbios_ocfg_match(struct nvkm_bios *bios, u16 outp, u8 proto, u8 flags,
 		  u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info)
 {
 	u16 data, idx = 0;
 	while ((data = nvbios_ocfg_parse(bios, outp, idx++, ver, hdr, cnt, len, info))) {
-		if (info->match == type)
+		if ((info->proto == proto || info->proto == 0xff) &&
+		    (info->flags == flags))
 			break;
 	}
 	return data;

drivers/gpu/drm/nouveau/nvkm/subdev/iccsense/base.c+9−7

 		struct pwr_rail_t *r = &stbl.rail[i];
 		struct nvkm_iccsense_rail *rail;
 		struct nvkm_iccsense_sensor *sensor;
+		int (*read)(struct nvkm_iccsense *,
+			    struct nvkm_iccsense_rail *);
 		if (!r->mode || r->resistor_mohm == 0)
 			continue;
 		if (!sensor)
 			continue;
-		rail = kmalloc(sizeof(*rail), GFP_KERNEL);
-		if (!rail)
-			return -ENOMEM;
 		switch (sensor->type) {
 		case NVBIOS_EXTDEV_INA209:
 			if (r->rail != 0)
 				continue;
-			rail->read = nvkm_iccsense_ina209_read;
+			read = nvkm_iccsense_ina209_read;
 			break;
 		case NVBIOS_EXTDEV_INA219:
 			if (r->rail != 0)
 				continue;
-			rail->read = nvkm_iccsense_ina219_read;
+			read = nvkm_iccsense_ina219_read;
 			break;
 		case NVBIOS_EXTDEV_INA3221:
 			if (r->rail >= 3)
 				continue;
-			rail->read = nvkm_iccsense_ina3221_read;
+			read = nvkm_iccsense_ina3221_read;
 			break;
 		default:
 			continue;
 		}
+		rail = kmalloc(sizeof(*rail), GFP_KERNEL);
+		if (!rail)
+			return -ENOMEM;
 		sensor->rail_mask |= 1 << r->rail;
+		rail->read = read;
 		rail->sensor = sensor;
 		rail->idx = r->rail;
 		rail->mohm = r->resistor_mohm;

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm107.c+3−3

@@ -69,11 +69,11 @@ gm107_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth) · 68 unmodified lines
69	}	69	}
70		70
71	static void	71	static void
72	gm107_ltc_lts_isr(struct nvkm_ltc *ltc, int c, int s)	72	gm107_ltc_intr_lts(struct nvkm_ltc *ltc, int c, int s)
73	{	73	{
74	struct nvkm_subdev *subdev = &ltc->subdev;	74	struct nvkm_subdev *subdev = &ltc->subdev;
75	struct nvkm_device *device = subdev->device;	75	struct nvkm_device *device = subdev->device;
76	u32 base = 0x140000 + (c * 0x2000) + (s * 0x200);	76	u32 base = 0x140400 + (c * 0x2000) + (s * 0x200);
77	u32 stat = nvkm_rd32(device, base + 0x00c);	77	u32 stat = nvkm_rd32(device, base + 0x00c);
78		78
79	if (stat) {	79	if (stat) {
@@ -92,7 +92,7 @@ gm107_ltc_intr(struct nvkm_ltc *ltc) · 12 unmodified lines
92	while (mask) {	92	while (mask) {
93	u32 s, c = __ffs(mask);	93	u32 s, c = __ffs(mask);
94	for (s = 0; s < ltc->lts_nr; s++)	94	for (s = 0; s < ltc->lts_nr; s++)
95	gm107_ltc_lts_isr(ltc, c, s);	95	gm107_ltc_intr_lts(ltc, c, s);
96	mask &= ~(1 << c);	96	mask &= ~(1 << c);
97	}	97	}
98	}	98	}

drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gm200.c+1−1

@@ -46,7 +46,7 @@ static const struct nvkm_ltc_func · 45 unmodified lines
46	gm200_ltc = {	46	gm200_ltc = {
47	.oneinit = gm200_ltc_oneinit,	47	.oneinit = gm200_ltc_oneinit,
48	.init = gm200_ltc_init,	48	.init = gm200_ltc_init,
49	.intr = gm107_ltc_intr, /XXX: not validated /	49	.intr = gm107_ltc_intr,
50	.cbc_clear = gm107_ltc_cbc_clear,	50	.cbc_clear = gm107_ltc_cbc_clear,
51	.cbc_wait = gm107_ltc_cbc_wait,	51	.cbc_wait = gm107_ltc_cbc_wait,
52	.zbc = 16,	52	.zbc = 16,

drivers/gpu/drm/omapdrm/dss/dsi.c+0−1

@@ -1167,7 +1167,6 @@ static int dsi_regulator_init(struct platform_device *dsidev) · 1166 unmodified lines
1167	{	1167	{
1168	struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);	1168	struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev);
1169	struct regulator *vdds_dsi;	1169	struct regulator *vdds_dsi;
1170	int r;
1171		1170
1172	if (dsi->vdds_dsi_reg != NULL)	1171	if (dsi->vdds_dsi_reg != NULL)
1173	return 0;	1172	return 0;

drivers/gpu/drm/omapdrm/dss/hdmi5.c+0−1

@@ -120,7 +120,6 @@ static irqreturn_t hdmi_irq_handler(int irq, void *data) · 119 unmodified lines
120		120
121	static int hdmi_init_regulator(void)	121	static int hdmi_init_regulator(void)
122	{	122	{
123	int r;
124	struct regulator *reg;	123	struct regulator *reg;
125		124
126	if (hdmi.vdda_reg != NULL)	125	if (hdmi.vdda_reg != NULL)

drivers/gpu/drm/radeon/atombios_crtc.c+3−2

 		if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev))
 			radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
 		/* use frac fb div on RS780/RS880 */
-		if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880))
+		if (((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880))
+		    && !radeon_crtc->ss_enabled)
 			radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
 		if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)
 			radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
 			if (radeon_crtc->ss.refdiv) {
 				radeon_crtc->pll_flags |= RADEON_PLL_USE_REF_DIV;
 				radeon_crtc->pll_reference_div = radeon_crtc->ss.refdiv;
-				if (ASIC_IS_AVIVO(rdev))
+				if (rdev->family >= CHIP_RV770)
 					radeon_crtc->pll_flags |= RADEON_PLL_USE_FRAC_FB_DIV;
 			}
 		}

drivers/gpu/drm/radeon/radeon_device.c+22−1

@@ -630,6 +630,23 @@ void radeon_gtt_location(struct radeon_device rdev, struct radeon_mc mc) · 629 unmodified lines
630	/*	630	/*
631	* GPU helpers function.	631	* GPU helpers function.
632	*/	632	*/
		633
		634	/**
		635	* radeon_device_is_virtual - check if we are running is a virtual environment
		636	*
		637	* Check if the asic has been passed through to a VM (all asics).
		638	* Used at driver startup.
		639	* Returns true if virtual or false if not.
		640	*/
		641	static bool radeon_device_is_virtual(void)
		642	{
		643	#ifdef CONFIG_X86
		644	return boot_cpu_has(X86_FEATURE_HYPERVISOR);
		645	#else
		646	return false;
		647	#endif
		648	}
		649
633	/**	650	/**
634	* radeon_card_posted - check if the hw has already been initialized	651	* radeon_card_posted - check if the hw has already been initialized
635	*	652	*
@@ -643,6 +660,10 @@ bool radeon_card_posted(struct radeon_device *rdev) · 7 unmodified lines
643	{	660	{
644	uint32_t reg;	661	uint32_t reg;
645		662
		663	/* for pass through, always force asic_init */
		664	if (radeon_device_is_virtual())
		665	return false;
		666
646	/* required for EFI mode on macbook2,1 which uses an r5xx asic */	667	/* required for EFI mode on macbook2,1 which uses an r5xx asic */
647	if (efi_enabled(EFI_BOOT) &&	668	if (efi_enabled(EFI_BOOT) &&
648	(rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) &&	669	(rdev->pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE) &&
@@ -1631,7 +1652,7 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, · 982 unmodified lines
1631	radeon_agp_suspend(rdev);	1652	radeon_agp_suspend(rdev);
1632		1653
1633	pci_save_state(dev->pdev);	1654	pci_save_state(dev->pdev);
1634	if (freeze && rdev->family >= CHIP_R600) {	1655	if (freeze && rdev->family >= CHIP_CEDAR) {
1635	rdev->asic->asic_reset(rdev, true);	1656	rdev->asic->asic_reset(rdev, true);
1636	pci_restore_state(dev->pdev);	1657	pci_restore_state(dev->pdev);
1637	} else if (suspend) {	1658	} else if (suspend) {

drivers/gpu/drm/vc4/vc4_crtc.c+22−10

 	WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size);
-	HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
-		  vc4_state->mm.start);
-	if (debug_dump_regs) {
-		DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
-		vc4_hvs_dump_state(dev);
-	}
 	if (crtc->state->event) {
 		unsigned long flags;
 		spin_lock_irqsave(&dev->event_lock, flags);
 		vc4_crtc->event = crtc->state->event;
-		spin_unlock_irqrestore(&dev->event_lock, flags);
 		crtc->state->event = NULL;
+		HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+			  vc4_state->mm.start);
+		spin_unlock_irqrestore(&dev->event_lock, flags);
+	} else {
+		HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel),
+			  vc4_state->mm.start);
+	}
+	if (debug_dump_regs) {
+		DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc));
+		vc4_hvs_dump_state(dev);
 	}
 }
 {
 	struct drm_crtc *crtc = &vc4_crtc->base;
 	struct drm_device *dev = crtc->dev;
+	struct vc4_dev *vc4 = to_vc4_dev(dev);
+	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
+	u32 chan = vc4_crtc->channel;
 	unsigned long flags;
 	spin_lock_irqsave(&dev->event_lock, flags);
-	if (vc4_crtc->event) {
+	if (vc4_crtc->event &&
+	    (vc4_state->mm.start == HVS_READ(SCALER_DISPLACTX(chan)))) {
 		drm_crtc_send_vblank_event(crtc, vc4_crtc->event);
 		vc4_crtc->event = NULL;
+		drm_crtc_vblank_put(crtc);
 	}
 	spin_unlock_irqrestore(&dev->event_lock, flags);
 }
 		spin_unlock_irqrestore(&dev->event_lock, flags);
 	}
+	drm_crtc_vblank_put(crtc);
 	drm_framebuffer_unreference(flip_state->fb);
 	kfree(flip_state);
 		return ret;
 	}
+	WARN_ON(drm_crtc_vblank_get(crtc) != 0);
 	/* Immediately update the plane's legacy fb pointer, so that later
 	 * modeset prep sees the state that will be present when the semaphore
 	 * is released.

drivers/gpu/drm/vc4/vc4_drv.c+7−7

drivers/gpu/drm/vc4/vc4_kms.c+12−4

 		return -ENOMEM;
 	/* Make sure that any outstanding modesets have finished. */
-	ret = down_interruptible(&vc4->async_modeset);
+	if (nonblock) {
-	if (ret) {
+		ret = down_trylock(&vc4->async_modeset);
-		kfree(c);
+		if (ret) {
-		return ret;
+			kfree(c);
+			return -EBUSY;
+		}
+	} else {
+		ret = down_interruptible(&vc4->async_modeset);
+		if (ret) {
+			kfree(c);
+			return ret;
+		}
 	}
 	ret = drm_atomic_helper_prepare_planes(dev, state);

drivers/gpu/drm/vc4/vc4_regs.h+4−0

 #define SCALER_DISPLACT0                        0x00000030
 #define SCALER_DISPLACT1                        0x00000034
 #define SCALER_DISPLACT2                        0x00000038
+#define SCALER_DISPLACTX(x)			(SCALER_DISPLACT0 +	\
+						 (x) * (SCALER_DISPLACT1 - \
+							SCALER_DISPLACT0))
 #define SCALER_DISPCTRL0                        0x00000040
 # define SCALER_DISPCTRLX_ENABLE		BIT(31)
 # define SCALER_DISPCTRLX_RESET			BIT(30)

drivers/gpu/drm/vmwgfx/vmwgfx_msg.c+3−1

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#include <linux/slab.h>	28	#include <linux/slab.h>
29	#include <linux/module.h>	29	#include <linux/module.h>
30	#include <linux/kernel.h>	30	#include <linux/kernel.h>
		31	#include <linux/frame.h>
31	#include <asm/hypervisor.h>	32	#include <asm/hypervisor.h>
32	#include "drmP.h"	33	#include "drmP.h"
33	#include "vmwgfx_msg.h"	34	#include "vmwgfx_msg.h"
@@ -194,7 +195,7 @@ static int vmw_send_msg(struct rpc_channel channel, const char msg) · 160 unmodified lines
194		195
195	return -EINVAL;	196	return -EINVAL;
196	}	197	}
197		198	STACK_FRAME_NON_STANDARD(vmw_send_msg);
198		199
199		200
200	/**	201	/**
@@ -304,6 +305,7 @@ static int vmw_recv_msg(struct rpc_channel channel, void *msg, · 103 unmodified lines
304		305
305	return 0;	306	return 0;
306	}	307	}
		308	STACK_FRAME_NON_STANDARD(vmw_recv_msg);
307		309
308		310
309	/**	311	/**

drivers/hid/hid-elo.c+1−1

@@ -261,7 +261,7 @@ static void elo_remove(struct hid_device *hdev) · 260 unmodified lines
261	struct elo_priv *priv = hid_get_drvdata(hdev);	261	struct elo_priv *priv = hid_get_drvdata(hdev);
262		262
263	hid_hw_stop(hdev);	263	hid_hw_stop(hdev);
264	flush_workqueue(wq);	264	cancel_delayed_work_sync(&priv->work);
265	kfree(priv);	265	kfree(priv);
266	}	266	}
267		267

drivers/hid/hid-multitouch.c+5−0

 		MT_USB_DEVICE(USB_VENDOR_ID_NOVATEK,
 			USB_DEVICE_ID_NOVATEK_PCT) },
+	/* Ntrig Panel */
+	{ .driver_data = MT_CLS_NSMU,
+		HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
+			USB_VENDOR_ID_NTRIG, 0x1b05) },
 	/* PixArt optical touch screen */
 	{ .driver_data = MT_CLS_INRANGE_CONTACTNUMBER,
 		MT_USB_DEVICE(USB_VENDOR_ID_PIXART,

drivers/hwmon/fam15h_power.c+2−6

  */
 static int read_registers(struct fam15h_power_data *data)
 {
-	int this_cpu, ret, cpu;
 	int core, this_core;
 	cpumask_var_t mask;
+	int ret, cpu;
 	ret = zalloc_cpumask_var(&mask, GFP_KERNEL);
 	if (!ret)
 	memset(data->cu_on, 0, sizeof(int) * MAX_CUS);
 	get_online_cpus();
-	this_cpu = smp_processor_id();
 	/*
 	 * Choose the first online core of each compute unit, and then
 		cpumask_set_cpu(cpumask_any(topology_sibling_cpumask(cpu)), mask);
 	}
-	if (cpumask_test_cpu(this_cpu, mask))
+	on_each_cpu_mask(mask, do_read_registers_on_cu, data, true);
-		do_read_registers_on_cu(data);
-	smp_call_function_many(mask, do_read_registers_on_cu, data, true);
 	put_online_cpus();
 	free_cpumask_var(mask);
 	return 0;

drivers/hwmon/lm90.c+1−1

@@ -375,7 +375,7 @@ struct lm90_data { · 374 unmodified lines
375	int kind;	375	int kind;
376	u32 flags;	376	u32 flags;
377		377
378	int update_interval; /* in milliseconds */	378	unsigned int update_interval; /* in milliseconds */
379		379
380	u8 config_orig; /* Original configuration register value */	380	u8 config_orig; /* Original configuration register value */
381	u8 convrate_orig; /* Original conversion rate register value */	381	u8 convrate_orig; /* Original conversion rate register value */

drivers/hwtracing/coresight/coresight-tmc-etr.c+4−7

 	if (local_read(&drvdata->mode) == CS_MODE_SYSFS) {
 		/*
 		 * The trace run will continue with the same allocated trace
-		 * buffer. As such zero-out the buffer so that we don't end
+		 * buffer. The trace buffer is cleared in tmc_etr_enable_hw(),
-		 * up with stale data.
+		 * so we don't have to explicitly clear it. Also, since the
-		 *
+		 * tracer is still enabled drvdata::buf can't be NULL.
-		 * Since the tracer is still enabled drvdata::buf
-		 * can't be NULL.
 		 */
-		memset(drvdata->buf, 0, drvdata->size);
 		tmc_etr_enable_hw(drvdata);
 	} else {
 		/*
 		 */
 		vaddr = drvdata->vaddr;
 		paddr = drvdata->paddr;
-		drvdata->buf = NULL;
+		drvdata->buf = drvdata->vaddr = NULL;
 	}
 	drvdata->reading = false;

drivers/hwtracing/coresight/coresight.c+9−6

@@ -385,7 +385,6 @@ static int _coresight_build_path(struct coresight_device *csdev, · 384 unmodified lines
385	int i;	385	int i;
386	bool found = false;	386	bool found = false;
387	struct coresight_node *node;	387	struct coresight_node *node;
388	struct coresight_connection *conn;
389		388
390	/* An activated sink has been found. Enqueue the element */	389	/* An activated sink has been found. Enqueue the element */
391	if ((csdev->type == CORESIGHT_DEV_TYPE_SINK \|\|	390	if ((csdev->type == CORESIGHT_DEV_TYPE_SINK \|\|
@@ -394,8 +393,9 @@ static int _coresight_build_path(struct coresight_device *csdev, · 2 unmodified lines
394		393
395	/* Not a sink - recursively explore each port found on this element */	394	/* Not a sink - recursively explore each port found on this element */
396	for (i = 0; i < csdev->nr_outport; i++) {	395	for (i = 0; i < csdev->nr_outport; i++) {
397	conn = &csdev->conns[i];	396	struct coresight_device *child_dev = csdev->conns[i].child_dev;
398	if (_coresight_build_path(conn->child_dev, path) == 0) {	397
		398	if (child_dev && _coresight_build_path(child_dev, path) == 0) {
399	found = true;	399	found = true;
400	break;	400	break;
401	}	401	}
@@ -425,6 +425,7 @@ out: · 23 unmodified lines
425	struct list_head coresight_build_path(struct coresight_device csdev)	425	struct list_head coresight_build_path(struct coresight_device csdev)
426	{	426	{
427	struct list_head *path;	427	struct list_head *path;
		428	int rc;
428		429
429	path = kzalloc(sizeof(struct list_head), GFP_KERNEL);	430	path = kzalloc(sizeof(struct list_head), GFP_KERNEL);
430	if (!path)	431	if (!path)
@@ -432,9 +433,10 @@ struct list_head coresight_build_path(struct coresight_device csdev) · 1 unmodified line
432		433
433	INIT_LIST_HEAD(path);	434	INIT_LIST_HEAD(path);
434		435
435	if (_coresight_build_path(csdev, path)) {	436	rc = _coresight_build_path(csdev, path);
		437	if (rc) {
436	kfree(path);	438	kfree(path);
437	path = NULL;	439	return ERR_PTR(rc);
438	}	440	}
439		441
440	return path;	442	return path;
@@ -507,8 +509,9 @@ int coresight_enable(struct coresight_device *csdev) · 66 unmodified lines
507	goto out;	509	goto out;
508		510
509	path = coresight_build_path(csdev);	511	path = coresight_build_path(csdev);
510	if (!path) {	512	if (IS_ERR(path)) {
511	pr_err("building path(s) failed\n");	513	pr_err("building path(s) failed\n");
		514	ret = PTR_ERR(path);
512	goto out;	515	goto out;
513	}	516	}
514		517

drivers/i2c/busses/i2c-i801.c+96−3

@@ -245,6 +245,13 @@ struct i801_priv { · 244 unmodified lines
245	struct platform_device *mux_pdev;	245	struct platform_device *mux_pdev;
246	#endif	246	#endif
247	struct platform_device *tco_pdev;	247	struct platform_device *tco_pdev;
		248
		249	/*
		250	* If set to true the host controller registers are reserved for
		251	* ACPI AML use. Protected by acpi_lock.
		252	*/
		253	bool acpi_reserved;
		254	struct mutex acpi_lock;
248	};	255	};
249		256
250	#define FEATURE_SMBUS_PEC (1 << 0)	257	#define FEATURE_SMBUS_PEC (1 << 0)
@@ -718,6 +725,12 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, · 467 unmodified lines
718	int ret = 0, xact = 0;	725	int ret = 0, xact = 0;
719	struct i801_priv *priv = i2c_get_adapdata(adap);	726	struct i801_priv *priv = i2c_get_adapdata(adap);
720		727
		728	mutex_lock(&priv->acpi_lock);
		729	if (priv->acpi_reserved) {
		730	mutex_unlock(&priv->acpi_lock);
		731	return -EBUSY;
		732	}
		733
721	pm_runtime_get_sync(&priv->pci_dev->dev);	734	pm_runtime_get_sync(&priv->pci_dev->dev);
722		735
723	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)	736	hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
@@ -820,6 +833,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr, · 96 unmodified lines
820	out:	833	out:
821	pm_runtime_mark_last_busy(&priv->pci_dev->dev);	834	pm_runtime_mark_last_busy(&priv->pci_dev->dev);
822	pm_runtime_put_autosuspend(&priv->pci_dev->dev);	835	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
		836	mutex_unlock(&priv->acpi_lock);
823	return ret;	837	return ret;
824	}	838	}
825		839
@@ -1257,6 +1271,83 @@ static void i801_add_tco(struct i801_priv *priv) · 431 unmodified lines
1257	priv->tco_pdev = pdev;	1271	priv->tco_pdev = pdev;
1258	}	1272	}
1259		1273
		1274	#ifdef CONFIG_ACPI
		1275	static acpi_status
		1276	i801_acpi_io_handler(u32 function, acpi_physical_address address, u32 bits,
		1277	u64 value, void handler_context, void *region_context)
		1278	{
		1279	struct i801_priv *priv = handler_context;
		1280	struct pci_dev *pdev = priv->pci_dev;
		1281	acpi_status status;
		1282
		1283	/*
		1284	* Once BIOS AML code touches the OpRegion we warn and inhibit any
		1285	* further access from the driver itself. This device is now owned
		1286	* by the system firmware.
		1287	*/
		1288	mutex_lock(&priv->acpi_lock);
		1289
		1290	if (!priv->acpi_reserved) {
		1291	priv->acpi_reserved = true;
		1292
		1293	dev_warn(&pdev->dev, "BIOS is accessing SMBus registers\n");
		1294	dev_warn(&pdev->dev, "Driver SMBus register access inhibited\n");
		1295
		1296	/*
		1297	* BIOS is accessing the host controller so prevent it from
		1298	* suspending automatically from now on.
		1299	*/
		1300	pm_runtime_get_sync(&pdev->dev);
		1301	}
		1302
		1303	if ((function & ACPI_IO_MASK) == ACPI_READ)
		1304	status = acpi_os_read_port(address, (u32 *)value, bits);
		1305	else
		1306	status = acpi_os_write_port(address, (u32)*value, bits);
		1307
		1308	mutex_unlock(&priv->acpi_lock);
		1309
		1310	return status;
		1311	}
		1312
		1313	static int i801_acpi_probe(struct i801_priv *priv)
		1314	{
		1315	struct acpi_device *adev;
		1316	acpi_status status;
		1317
		1318	adev = ACPI_COMPANION(&priv->pci_dev->dev);
		1319	if (adev) {
		1320	status = acpi_install_address_space_handler(adev->handle,
		1321	ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler,
		1322	NULL, priv);
		1323	if (ACPI_SUCCESS(status))
		1324	return 0;
		1325	}
		1326
		1327	return acpi_check_resource_conflict(&priv->pci_dev->resource[SMBBAR]);
		1328	}
		1329
		1330	static void i801_acpi_remove(struct i801_priv *priv)
		1331	{
		1332	struct acpi_device *adev;
		1333
		1334	adev = ACPI_COMPANION(&priv->pci_dev->dev);
		1335	if (!adev)
		1336	return;
		1337
		1338	acpi_remove_address_space_handler(adev->handle,
		1339	ACPI_ADR_SPACE_SYSTEM_IO, i801_acpi_io_handler);
		1340
		1341	mutex_lock(&priv->acpi_lock);
		1342	if (priv->acpi_reserved)
		1343	pm_runtime_put(&priv->pci_dev->dev);
		1344	mutex_unlock(&priv->acpi_lock);
		1345	}
		1346	#else
		1347	static inline int i801_acpi_probe(struct i801_priv *priv) { return 0; }
		1348	static inline void i801_acpi_remove(struct i801_priv *priv) { }
		1349	#endif
		1350
1260	static int i801_probe(struct pci_dev dev, const struct pci_device_id id)	1351	static int i801_probe(struct pci_dev dev, const struct pci_device_id id)
1261	{	1352	{
1262	unsigned char temp;	1353	unsigned char temp;
@@ -1274,6 +1365,7 @@ static int i801_probe(struct pci_dev dev, const struct pci_device_id id) · 11 unmodified lines
1274	priv->adapter.dev.parent = &dev->dev;	1365	priv->adapter.dev.parent = &dev->dev;
1275	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));	1366	ACPI_COMPANION_SET(&priv->adapter.dev, ACPI_COMPANION(&dev->dev));
1276	priv->adapter.retries = 3;	1367	priv->adapter.retries = 3;
		1368	mutex_init(&priv->acpi_lock);
1277		1369
1278	priv->pci_dev = dev;	1370	priv->pci_dev = dev;
1279	switch (dev->device) {	1371	switch (dev->device) {
@@ -1336,10 +1428,8 @@ static int i801_probe(struct pci_dev dev, const struct pci_device_id id) · 56 unmodified lines
1336	return -ENODEV;	1428	return -ENODEV;
1337	}	1429	}
1338		1430
1339	err = acpi_check_resource_conflict(&dev->resource[SMBBAR]);	1431	if (i801_acpi_probe(priv))
1340	if (err) {
1341	return -ENODEV;	1432	return -ENODEV;
1342	}
1343		1433
1344	err = pcim_iomap_regions(dev, 1 << SMBBAR,	1434	err = pcim_iomap_regions(dev, 1 << SMBBAR,
1345	dev_driver_string(&dev->dev));	1435	dev_driver_string(&dev->dev));
@@ -1348,6 +1438,7 @@ static int i801_probe(struct pci_dev dev, const struct pci_device_id id) · 2 unmodified lines
1348	"Failed to request SMBus region 0x%lx-0x%Lx\n",	1438	"Failed to request SMBus region 0x%lx-0x%Lx\n",
1349	priv->smba,	1439	priv->smba,
1350	(unsigned long long)pci_resource_end(dev, SMBBAR));	1440	(unsigned long long)pci_resource_end(dev, SMBBAR));
		1441	i801_acpi_remove(priv);
1351	return err;	1442	return err;
1352	}	1443	}
1353		1444
@@ -1412,6 +1503,7 @@ static int i801_probe(struct pci_dev dev, const struct pci_device_id id) · 58 unmodified lines
1412	err = i2c_add_adapter(&priv->adapter);	1503	err = i2c_add_adapter(&priv->adapter);
1413	if (err) {	1504	if (err) {
1414	dev_err(&dev->dev, "Failed to add SMBus adapter\n");	1505	dev_err(&dev->dev, "Failed to add SMBus adapter\n");
		1506	i801_acpi_remove(priv);
1415	return err;	1507	return err;
1416	}	1508	}
1417		1509
@@ -1438,6 +1530,7 @@ static void i801_remove(struct pci_dev *dev) · 20 unmodified lines
1438		1530
1439	i801_del_mux(priv);	1531	i801_del_mux(priv);
1440	i2c_del_adapter(&priv->adapter);	1532	i2c_del_adapter(&priv->adapter);
		1533	i801_acpi_remove(priv);
1441	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);	1534	pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
1442		1535
1443	platform_device_unregister(priv->tco_pdev);	1536	platform_device_unregister(priv->tco_pdev);

drivers/i2c/busses/i2c-octeon.c+10−7

 		return result;
 	for (i = 0; i < length; i++) {
-		/* for the last byte TWSI_CTL_AAK must not be set */
+		/*
-		if (i + 1 == length)
+		 * For the last byte to receive TWSI_CTL_AAK must not be set.
+		 *
+		 * A special case is I2C_M_RECV_LEN where we don't know the
+		 * additional length yet. If recv_len is set we assume we're
+		 * not reading the final byte and therefore need to set
+		 * TWSI_CTL_AAK.
+		 */
+		if ((i + 1 == length) && !(recv_len && i == 0))
 			final_read = true;
 		/* clear iflg to allow next event */
 		data[i] = octeon_i2c_data_read(i2c);
 		if (recv_len && i == 0) {
-			if (data[i] > I2C_SMBUS_BLOCK_MAX + 1) {
+			if (data[i] > I2C_SMBUS_BLOCK_MAX + 1)
-				dev_err(i2c->dev,
-					"%s: read len > I2C_SMBUS_BLOCK_MAX %d\n",
-					__func__, data[i]);
 				return -EPROTO;
-			}
 			length += data[i];
 		}

drivers/i2c/muxes/i2c-mux-reg.c+1−0

@@ -260,6 +260,7 @@ static struct platform_driver i2c_mux_reg_driver = { · 259 unmodified lines
260	.remove = i2c_mux_reg_remove,	260	.remove = i2c_mux_reg_remove,
261	.driver = {	261	.driver = {
262	.name = "i2c-mux-reg",	262	.name = "i2c-mux-reg",
		263	.of_match_table = of_match_ptr(i2c_mux_reg_of_match),
263	},	264	},
264	};	265	};
265		266

drivers/iio/accel/st_accel_buffer.c+1−1

@@ -91,7 +91,7 @@ static const struct iio_buffer_setup_ops st_accel_buffer_setup_ops = { · 90 unmodified lines
91		91
92	int st_accel_allocate_ring(struct iio_dev *indio_dev)	92	int st_accel_allocate_ring(struct iio_dev *indio_dev)
93	{	93	{
94	return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,	94	return iio_triggered_buffer_setup(indio_dev, NULL,
95	&st_sensors_trigger_handler, &st_accel_buffer_setup_ops);	95	&st_sensors_trigger_handler, &st_accel_buffer_setup_ops);
96	}	96	}
97		97

drivers/iio/accel/st_accel_core.c+1−0

@@ -741,6 +741,7 @@ static const struct iio_info accel_info = { · 740 unmodified lines
741	static const struct iio_trigger_ops st_accel_trigger_ops = {	741	static const struct iio_trigger_ops st_accel_trigger_ops = {
742	.owner = THIS_MODULE,	742	.owner = THIS_MODULE,
743	.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,	743	.set_trigger_state = ST_ACCEL_TRIGGER_SET_STATE,
		744	.validate_device = st_sensors_validate_device,
744	};	745	};
745	#define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)	746	#define ST_ACCEL_TRIGGER_OPS (&st_accel_trigger_ops)
746	#else	747	#else

drivers/iio/common/st_sensors/st_sensors_buffer.c+7−18

@@ -56,31 +56,20 @@ irqreturn_t st_sensors_trigger_handler(int irq, void *p) · 55 unmodified lines
56	struct iio_poll_func *pf = p;	56	struct iio_poll_func *pf = p;
57	struct iio_dev *indio_dev = pf->indio_dev;	57	struct iio_dev *indio_dev = pf->indio_dev;
58	struct st_sensor_data *sdata = iio_priv(indio_dev);	58	struct st_sensor_data *sdata = iio_priv(indio_dev);
		59	s64 timestamp;
59		60
60	/* If we have a status register, check if this IRQ came from us */	61	/* If we do timetamping here, do it before reading the values */
61	if (sdata->sensor_settings->drdy_irq.addr_stat_drdy) {	62	if (sdata->hw_irq_trigger)
62	u8 status;	63	timestamp = sdata->hw_timestamp;
63		64	else
64	len = sdata->tf->read_byte(&sdata->tb, sdata->dev,	65	timestamp = iio_get_time_ns();
65	sdata->sensor_settings->drdy_irq.addr_stat_drdy,
66	&status);
67	if (len < 0)
68	dev_err(sdata->dev, "could not read channel status\n");
69
70	/*
71	* If this was not caused by any channels on this sensor,
72	* return IRQ_NONE
73	*/
74	if (!(status & (u8)indio_dev->active_scan_mask[0]))
75	return IRQ_NONE;
76	}
77		66
78	len = st_sensors_get_buffer_element(indio_dev, sdata->buffer_data);	67	len = st_sensors_get_buffer_element(indio_dev, sdata->buffer_data);
79	if (len < 0)	68	if (len < 0)
80	goto st_sensors_get_buffer_element_error;	69	goto st_sensors_get_buffer_element_error;
81		70
82	iio_push_to_buffers_with_timestamp(indio_dev, sdata->buffer_data,	71	iio_push_to_buffers_with_timestamp(indio_dev, sdata->buffer_data,
83	pf->timestamp);	72	timestamp);
84		73
85	st_sensors_get_buffer_element_error:	74	st_sensors_get_buffer_element_error:
86	iio_trigger_notify_done(indio_dev->trig);	75	iio_trigger_notify_done(indio_dev->trig);

drivers/iio/common/st_sensors/st_sensors_core.c+8−0

 	if (err < 0)
 		return err;
+	/* Disable DRDY, this might be still be enabled after reboot. */
+	err = st_sensors_set_dataready_irq(indio_dev, false);
+	if (err < 0)
+		return err;
 	if (sdata->current_fullscale) {
 		err = st_sensors_set_fullscale(indio_dev,
 						sdata->current_fullscale->num);
 	else
 		drdy_mask = sdata->sensor_settings->drdy_irq.mask_int2;
+	/* Flag to the poll function that the hardware trigger is in use */
+	sdata->hw_irq_trigger = enable;
 	/* Enable/Disable the interrupt generator for data ready. */
 	err = st_sensors_write_data_with_mask(indio_dev,
 					sdata->sensor_settings->drdy_irq.addr,

drivers/iio/common/st_sensors/st_sensors_trigger.c+89−7

@@ -17,6 +17,73 @@ · 16 unmodified lines
17	#include <linux/iio/common/st_sensors.h>	17	#include <linux/iio/common/st_sensors.h>
18	#include "st_sensors_core.h"	18	#include "st_sensors_core.h"
19		19
		20	/**
		21	* st_sensors_irq_handler() - top half of the IRQ-based triggers
		22	* @irq: irq number
		23	* @p: private handler data
		24	*/
		25	irqreturn_t st_sensors_irq_handler(int irq, void *p)
		26	{
		27	struct iio_trigger *trig = p;
		28	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
		29	struct st_sensor_data *sdata = iio_priv(indio_dev);
		30
		31	/* Get the time stamp as close in time as possible */
		32	sdata->hw_timestamp = iio_get_time_ns();
		33	return IRQ_WAKE_THREAD;
		34	}
		35
		36	/**
		37	* st_sensors_irq_thread() - bottom half of the IRQ-based triggers
		38	* @irq: irq number
		39	* @p: private handler data
		40	*/
		41	irqreturn_t st_sensors_irq_thread(int irq, void *p)
		42	{
		43	struct iio_trigger *trig = p;
		44	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
		45	struct st_sensor_data *sdata = iio_priv(indio_dev);
		46	int ret;
		47
		48	/*
		49	* If this trigger is backed by a hardware interrupt and we have a
		50	* status register, check if this IRQ came from us
		51	*/
		52	if (sdata->sensor_settings->drdy_irq.addr_stat_drdy) {
		53	u8 status;
		54
		55	ret = sdata->tf->read_byte(&sdata->tb, sdata->dev,
		56	sdata->sensor_settings->drdy_irq.addr_stat_drdy,
		57	&status);
		58	if (ret < 0) {
		59	dev_err(sdata->dev, "could not read channel status\n");
		60	goto out_poll;
		61	}
		62	/*
		63	* the lower bits of .active_scan_mask[0] is directly mapped
		64	* to the channels on the sensor: either bit 0 for
		65	* one-dimensional sensors, or e.g. x,y,z for accelerometers,
		66	* gyroscopes or magnetometers. No sensor use more than 3
		67	* channels, so cut the other status bits here.
		68	*/
		69	status &= 0x07;
		70
		71	/*
		72	* If this was not caused by any channels on this sensor,
		73	* return IRQ_NONE
		74	*/
		75	if (!indio_dev->active_scan_mask)
		76	return IRQ_NONE;
		77	if (!(status & (u8)indio_dev->active_scan_mask[0]))
		78	return IRQ_NONE;
		79	}
		80
		81	out_poll:
		82	/* It's our IRQ: proceed to handle the register polling */
		83	iio_trigger_poll_chained(p);
		84	return IRQ_HANDLED;
		85	}
		86
20	int st_sensors_allocate_trigger(struct iio_dev *indio_dev,	87	int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
21	const struct iio_trigger_ops *trigger_ops)	88	const struct iio_trigger_ops *trigger_ops)
22	{	89	{
@@ -30,6 +97,10 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev, · 7 unmodified lines
30	return -ENOMEM;	97	return -ENOMEM;
31	}	98	}
32		99
		100	iio_trigger_set_drvdata(sdata->trig, indio_dev);
		101	sdata->trig->ops = trigger_ops;
		102	sdata->trig->dev.parent = sdata->dev;
		103
33	irq = sdata->get_irq_data_ready(indio_dev);	104	irq = sdata->get_irq_data_ready(indio_dev);
34	irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq));	105	irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq));
35	/*	106	/*
@@ -77,9 +148,12 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev, · 41 unmodified lines
77	sdata->sensor_settings->drdy_irq.addr_stat_drdy)	148	sdata->sensor_settings->drdy_irq.addr_stat_drdy)
78	irq_trig \|= IRQF_SHARED;	149	irq_trig \|= IRQF_SHARED;
79		150
80	err = request_threaded_irq(irq,	151	/* Let's create an interrupt thread masking the hard IRQ here */
81	iio_trigger_generic_data_rdy_poll,	152	irq_trig \|= IRQF_ONESHOT;
82	NULL,	153
		154	err = request_threaded_irq(sdata->get_irq_data_ready(indio_dev),
		155	st_sensors_irq_handler,
		156	st_sensors_irq_thread,
83	irq_trig,	157	irq_trig,
84	sdata->trig->name,	158	sdata->trig->name,
85	sdata->trig);	159	sdata->trig);
@@ -88,10 +162,6 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev, · 2 unmodified lines
88	goto iio_trigger_free;	162	goto iio_trigger_free;
89	}	163	}
90		164
91	iio_trigger_set_drvdata(sdata->trig, indio_dev);
92	sdata->trig->ops = trigger_ops;
93	sdata->trig->dev.parent = sdata->dev;
94
95	err = iio_trigger_register(sdata->trig);	165	err = iio_trigger_register(sdata->trig);
96	if (err < 0) {	166	if (err < 0) {
97	dev_err(&indio_dev->dev, "failed to register iio trigger.\n");	167	dev_err(&indio_dev->dev, "failed to register iio trigger.\n");
@@ -119,6 +189,18 @@ void st_sensors_deallocate_trigger(struct iio_dev *indio_dev) · 21 unmodified lines
119	}	189	}
120	EXPORT_SYMBOL(st_sensors_deallocate_trigger);	190	EXPORT_SYMBOL(st_sensors_deallocate_trigger);
121		191
		192	int st_sensors_validate_device(struct iio_trigger *trig,
		193	struct iio_dev *indio_dev)
		194	{
		195	struct iio_dev *indio = iio_trigger_get_drvdata(trig);
		196
		197	if (indio != indio_dev)
		198	return -EINVAL;
		199
		200	return 0;
		201	}
		202	EXPORT_SYMBOL(st_sensors_validate_device);
		203
122	MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");	204	MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
123	MODULE_DESCRIPTION("STMicroelectronics ST-sensors trigger");	205	MODULE_DESCRIPTION("STMicroelectronics ST-sensors trigger");
124	MODULE_LICENSE("GPL v2");	206	MODULE_LICENSE("GPL v2");

drivers/iio/dac/Kconfig+1−1

@@ -247,7 +247,7 @@ config MCP4922 · 246 unmodified lines
247		247
248	config STX104	248	config STX104
249	tristate "Apex Embedded Systems STX104 DAC driver"	249	tristate "Apex Embedded Systems STX104 DAC driver"
250	depends on X86 && ISA	250	depends on X86 && ISA_BUS_API
251	help	251	help
252	Say yes here to build support for the 2-channel DAC on the Apex	252	Say yes here to build support for the 2-channel DAC on the Apex
253	Embedded Systems STX104 integrated analog PC/104 card. The base port	253	Embedded Systems STX104 integrated analog PC/104 card. The base port

drivers/iio/dac/ad5592r-base.c+1−1

@@ -525,7 +525,7 @@ static int ad5592r_alloc_channels(struct ad5592r_state *st) · 524 unmodified lines
525		525
526	device_for_each_child_node(st->dev, child) {	526	device_for_each_child_node(st->dev, child) {
527	ret = fwnode_property_read_u32(child, "reg", &reg);	527	ret = fwnode_property_read_u32(child, "reg", &reg);
528	if (ret \|\| reg > ARRAY_SIZE(st->channel_modes))	528	if (ret \|\| reg >= ARRAY_SIZE(st->channel_modes))
529	continue;	529	continue;
530		530
531	ret = fwnode_property_read_u32(child, "adi,mode", &tmp);	531	ret = fwnode_property_read_u32(child, "adi,mode", &tmp);

drivers/iio/gyro/st_gyro_buffer.c+1−1

@@ -91,7 +91,7 @@ static const struct iio_buffer_setup_ops st_gyro_buffer_setup_ops = { · 90 unmodified lines
91		91
92	int st_gyro_allocate_ring(struct iio_dev *indio_dev)	92	int st_gyro_allocate_ring(struct iio_dev *indio_dev)
93	{	93	{
94	return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,	94	return iio_triggered_buffer_setup(indio_dev, NULL,
95	&st_sensors_trigger_handler, &st_gyro_buffer_setup_ops);	95	&st_sensors_trigger_handler, &st_gyro_buffer_setup_ops);
96	}	96	}
97		97

drivers/iio/gyro/st_gyro_core.c+1−0

@@ -409,6 +409,7 @@ static const struct iio_info gyro_info = { · 408 unmodified lines
409	static const struct iio_trigger_ops st_gyro_trigger_ops = {	409	static const struct iio_trigger_ops st_gyro_trigger_ops = {
410	.owner = THIS_MODULE,	410	.owner = THIS_MODULE,
411	.set_trigger_state = ST_GYRO_TRIGGER_SET_STATE,	411	.set_trigger_state = ST_GYRO_TRIGGER_SET_STATE,
		412	.validate_device = st_sensors_validate_device,
412	};	413	};
413	#define ST_GYRO_TRIGGER_OPS (&st_gyro_trigger_ops)	414	#define ST_GYRO_TRIGGER_OPS (&st_gyro_trigger_ops)
414	#else	415	#else

drivers/iio/humidity/am2315.c+1−3

 	struct am2315_sensor_data sensor_data;
 	ret = am2315_read_data(data, &sensor_data);
-	if (ret < 0) {
+	if (ret < 0)
-		mutex_unlock(&data->lock);
 		goto err;
-	}
 	mutex_lock(&data->lock);
 	if (*(indio_dev->active_scan_mask) == AM2315_ALL_CHANNEL_MASK) {

drivers/iio/humidity/hdc100x.c+10−10

@@ -55,7 +55,7 @@ static const struct { · 54 unmodified lines
55	},	55	},
56	{ /* IIO_HUMIDITYRELATIVE channel */	56	{ /* IIO_HUMIDITYRELATIVE channel */
57	.shift = 8,	57	.shift = 8,
58	.mask = 2,	58	.mask = 3,
59	},	59	},
60	};	60	};
61		61
@@ -164,14 +164,14 @@ static int hdc100x_get_measurement(struct hdc100x_data *data, · 102 unmodified lines
164	dev_err(&client->dev, "cannot read high byte measurement");	164	dev_err(&client->dev, "cannot read high byte measurement");
165	return ret;	165	return ret;
166	}	166	}
167	val = ret << 6;	167	val = ret << 8;
168		168
169	ret = i2c_smbus_read_byte(client);	169	ret = i2c_smbus_read_byte(client);
170	if (ret < 0) {	170	if (ret < 0) {
171	dev_err(&client->dev, "cannot read low byte measurement");	171	dev_err(&client->dev, "cannot read low byte measurement");
172	return ret;	172	return ret;
173	}	173	}
174	val \|= ret >> 2;	174	val \|= ret;
175		175
176	return val;	176	return val;
177	}	177	}
@@ -211,18 +211,18 @@ static int hdc100x_read_raw(struct iio_dev *indio_dev, · 33 unmodified lines
211	return IIO_VAL_INT_PLUS_MICRO;	211	return IIO_VAL_INT_PLUS_MICRO;
212	case IIO_CHAN_INFO_SCALE:	212	case IIO_CHAN_INFO_SCALE:
213	if (chan->type == IIO_TEMP) {	213	if (chan->type == IIO_TEMP) {
214	*val = 165;	214	*val = 165000;
215	*val2 = 65536 >> 2;	215	*val2 = 65536;
216	return IIO_VAL_FRACTIONAL;	216	return IIO_VAL_FRACTIONAL;
217	} else {	217	} else {
218	*val = 0;	218	*val = 100;
219	*val2 = 10000;	219	*val2 = 65536;
220	return IIO_VAL_INT_PLUS_MICRO;	220	return IIO_VAL_FRACTIONAL;
221	}	221	}
222	break;	222	break;
223	case IIO_CHAN_INFO_OFFSET:	223	case IIO_CHAN_INFO_OFFSET:
224	*val = -3971;	224	*val = -15887;
225	*val2 = 879096;	225	*val2 = 515151;
226	return IIO_VAL_INT_PLUS_MICRO;	226	return IIO_VAL_INT_PLUS_MICRO;
227	default:	227	default:
228	return -EINVAL;	228	return -EINVAL;

drivers/iio/imu/bmi160/bmi160_core.c+8−8

@@ -210,11 +210,11 @@ static const struct bmi160_scale_item bmi160_scale_table[] = { · 209 unmodified lines
210	};	210	};
211		211
212	static const struct bmi160_odr bmi160_accel_odr[] = {	212	static const struct bmi160_odr bmi160_accel_odr[] = {
213	{0x01, 0, 78125},	213	{0x01, 0, 781250},
214	{0x02, 1, 5625},	214	{0x02, 1, 562500},
215	{0x03, 3, 125},	215	{0x03, 3, 125000},
216	{0x04, 6, 25},	216	{0x04, 6, 250000},
217	{0x05, 12, 5},	217	{0x05, 12, 500000},
218	{0x06, 25, 0},	218	{0x06, 25, 0},
219	{0x07, 50, 0},	219	{0x07, 50, 0},
220	{0x08, 100, 0},	220	{0x08, 100, 0},
@@ -230,7 +230,7 @@ static const struct bmi160_odr bmi160_gyro_odr[] = { · 9 unmodified lines
230	{0x08, 100, 0},	230	{0x08, 100, 0},
231	{0x09, 200, 0},	231	{0x09, 200, 0},
232	{0x0A, 400, 0},	232	{0x0A, 400, 0},
233	{0x0B, 8000, 0},	233	{0x0B, 800, 0},
234	{0x0C, 1600, 0},	234	{0x0C, 1600, 0},
235	{0x0D, 3200, 0},	235	{0x0D, 3200, 0},
236	};	236	};
@@ -365,8 +365,8 @@ int bmi160_set_odr(struct bmi160_data *data, enum bmi160_sensor_type t, · 128 unmodified lines
365		365
366	return regmap_update_bits(data->regmap,	366	return regmap_update_bits(data->regmap,
367	bmi160_regs[t].config,	367	bmi160_regs[t].config,
368	bmi160_odr_table[t].tbl[i].bits,	368	bmi160_regs[t].config_odr_mask,
369	bmi160_regs[t].config_odr_mask);	369	bmi160_odr_table[t].tbl[i].bits);
370	}	370	}
371		371
372	static int bmi160_get_odr(struct bmi160_data *data, enum bmi160_sensor_type t,	372	static int bmi160_get_odr(struct bmi160_data *data, enum bmi160_sensor_type t,

drivers/iio/industrialio-trigger.c+18−5

 	/* Prevent the module from being removed whilst attached to a trigger */
 	__module_get(pf->indio_dev->info->driver_module);
+	/* Get irq number */
 	pf->irq = iio_trigger_get_irq(trig);
+	if (pf->irq < 0)
+		goto out_put_module;
+	/* Request irq */
 	ret = request_threaded_irq(pf->irq, pf->h, pf->thread,
 				   pf->type, pf->name,
 				   pf);
-	if (ret < 0) {
+	if (ret < 0)
-		module_put(pf->indio_dev->info->driver_module);
+		goto out_put_irq;
-		return ret;
-	}
+	/* Enable trigger in driver */
 	if (trig->ops->set_trigger_state && notinuse) {
 		ret = trig->ops->set_trigger_state(trig, true);
 		if (ret < 0)
-			module_put(pf->indio_dev->info->driver_module);
+			goto out_free_irq;
 	}
 	return ret;
+out_free_irq:
+	free_irq(pf->irq, pf);
+out_put_irq:
+	iio_trigger_put_irq(trig, pf->irq);
+out_put_module:
+	module_put(pf->indio_dev->info->driver_module);
+	return ret;
 }
 static int iio_trigger_detach_poll_func(struct iio_trigger *trig,

drivers/iio/light/apds9960.c+1−0

@@ -1011,6 +1011,7 @@ static int apds9960_probe(struct i2c_client *client, · 1010 unmodified lines
1011		1011
1012	iio_device_attach_buffer(indio_dev, buffer);	1012	iio_device_attach_buffer(indio_dev, buffer);
1013		1013
		1014	indio_dev->dev.parent = &client->dev;
1014	indio_dev->info = &apds9960_info;	1015	indio_dev->info = &apds9960_info;
1015	indio_dev->name = APDS9960_DRV_NAME;	1016	indio_dev->name = APDS9960_DRV_NAME;
1016	indio_dev->channels = apds9960_channels;	1017	indio_dev->channels = apds9960_channels;

drivers/iio/light/bh1780.c+6−4

 	int ret;
 	if (!readval)
-		bh1780_write(bh1780, (u8)reg, (u8)writeval);
+		return bh1780_write(bh1780, (u8)reg, (u8)writeval);
 	ret = bh1780_read(bh1780, (u8)reg);
 	if (ret < 0)
 	indio_dev->dev.parent = &client->dev;
 	indio_dev->info = &bh1780_info;
-	indio_dev->name = id->name;
+	indio_dev->name = "bh1780";
 	indio_dev->channels = bh1780_channels;
 	indio_dev->num_channels = ARRAY_SIZE(bh1780_channels);
 	indio_dev->modes = INDIO_DIRECT_MODE;
 static int bh1780_runtime_suspend(struct device *dev)
 {
 	struct i2c_client *client = to_i2c_client(dev);
-	struct bh1780_data *bh1780 = i2c_get_clientdata(client);
+	struct iio_dev *indio_dev = i2c_get_clientdata(client);
+	struct bh1780_data *bh1780 = iio_priv(indio_dev);
 	int ret;
 	ret = bh1780_write(bh1780, BH1780_REG_CONTROL, BH1780_POFF);
 static int bh1780_runtime_resume(struct device *dev)
 {
 	struct i2c_client *client = to_i2c_client(dev);
-	struct bh1780_data *bh1780 = i2c_get_clientdata(client);
+	struct iio_dev *indio_dev = i2c_get_clientdata(client);
+	struct bh1780_data *bh1780 = iio_priv(indio_dev);
 	int ret;
 	ret = bh1780_write(bh1780, BH1780_REG_CONTROL, BH1780_PON);

drivers/iio/light/max44000.c+0−1

@@ -147,7 +147,6 @@ static const struct iio_chan_spec max44000_channels[] = { · 146 unmodified lines
147	{	147	{
148	.type = IIO_PROXIMITY,	148	.type = IIO_PROXIMITY,
149	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	149	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
150	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
151	.scan_index = MAX44000_SCAN_INDEX_PRX,	150	.scan_index = MAX44000_SCAN_INDEX_PRX,
152	.scan_type = {	151	.scan_type = {
153	.sign = 'u',	152	.sign = 'u',

drivers/iio/magnetometer/st_magn_buffer.c+1−1

@@ -82,7 +82,7 @@ static const struct iio_buffer_setup_ops st_magn_buffer_setup_ops = { · 81 unmodified lines
82		82
83	int st_magn_allocate_ring(struct iio_dev *indio_dev)	83	int st_magn_allocate_ring(struct iio_dev *indio_dev)
84	{	84	{
85	return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,	85	return iio_triggered_buffer_setup(indio_dev, NULL,
86	&st_sensors_trigger_handler, &st_magn_buffer_setup_ops);	86	&st_sensors_trigger_handler, &st_magn_buffer_setup_ops);
87	}	87	}
88		88

drivers/iio/magnetometer/st_magn_core.c+1−0

@@ -572,6 +572,7 @@ static const struct iio_info magn_info = { · 571 unmodified lines
572	static const struct iio_trigger_ops st_magn_trigger_ops = {	572	static const struct iio_trigger_ops st_magn_trigger_ops = {
573	.owner = THIS_MODULE,	573	.owner = THIS_MODULE,
574	.set_trigger_state = ST_MAGN_TRIGGER_SET_STATE,	574	.set_trigger_state = ST_MAGN_TRIGGER_SET_STATE,
		575	.validate_device = st_sensors_validate_device,
575	};	576	};
576	#define ST_MAGN_TRIGGER_OPS (&st_magn_trigger_ops)	577	#define ST_MAGN_TRIGGER_OPS (&st_magn_trigger_ops)
577	#else	578	#else

drivers/iio/pressure/bmp280.c+2−2

@@ -1073,8 +1073,8 @@ static int bmp280_probe(struct i2c_client *client, · 1072 unmodified lines
1073	if (ret < 0)	1073	if (ret < 0)
1074	return ret;	1074	return ret;
1075	if (chip_id != id->driver_data) {	1075	if (chip_id != id->driver_data) {
1076	dev_err(&client->dev, "bad chip id. expected %x got %x\n",	1076	dev_err(&client->dev, "bad chip id. expected %lx got %x\n",
1077	BMP280_CHIP_ID, chip_id);	1077	id->driver_data, chip_id);
1078	return -EINVAL;	1078	return -EINVAL;
1079	}	1079	}
1080		1080

drivers/iio/pressure/st_pressure_buffer.c+1−1

@@ -82,7 +82,7 @@ static const struct iio_buffer_setup_ops st_press_buffer_setup_ops = { · 81 unmodified lines
82		82
83	int st_press_allocate_ring(struct iio_dev *indio_dev)	83	int st_press_allocate_ring(struct iio_dev *indio_dev)
84	{	84	{
85	return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,	85	return iio_triggered_buffer_setup(indio_dev, NULL,
86	&st_sensors_trigger_handler, &st_press_buffer_setup_ops);	86	&st_sensors_trigger_handler, &st_press_buffer_setup_ops);
87	}	87	}
88		88

drivers/iio/pressure/st_pressure_core.c+51−30

@@ -28,15 +28,21 @@ · 27 unmodified lines
28	#include <linux/iio/common/st_sensors.h>	28	#include <linux/iio/common/st_sensors.h>
29	#include "st_pressure.h"	29	#include "st_pressure.h"
30		30
		31	#define MCELSIUS_PER_CELSIUS 1000
		32
		33	/* Default pressure sensitivity */
31	#define ST_PRESS_LSB_PER_MBAR 4096UL	34	#define ST_PRESS_LSB_PER_MBAR 4096UL
32	#define ST_PRESS_KPASCAL_NANO_SCALE (100000000UL / \	35	#define ST_PRESS_KPASCAL_NANO_SCALE (100000000UL / \
33	ST_PRESS_LSB_PER_MBAR)	36	ST_PRESS_LSB_PER_MBAR)
		37
		38	/* Default temperature sensitivity */
34	#define ST_PRESS_LSB_PER_CELSIUS 480UL	39	#define ST_PRESS_LSB_PER_CELSIUS 480UL
35	#define ST_PRESS_CELSIUS_NANO_SCALE (1000000000UL / \	40	#define ST_PRESS_MILLI_CELSIUS_OFFSET 42500UL
36	ST_PRESS_LSB_PER_CELSIUS)	41
37	#define ST_PRESS_NUMBER_DATA_CHANNELS 1	42	#define ST_PRESS_NUMBER_DATA_CHANNELS 1
38		43
39	/* FULLSCALE */	44	/* FULLSCALE */
		45	#define ST_PRESS_FS_AVL_1100MB 1100
40	#define ST_PRESS_FS_AVL_1260MB 1260	46	#define ST_PRESS_FS_AVL_1260MB 1260
41		47
42	#define ST_PRESS_1_OUT_XL_ADDR 0x28	48	#define ST_PRESS_1_OUT_XL_ADDR 0x28
@@ -54,9 +60,6 @@ · 11 unmodified lines
54	#define ST_PRESS_LPS331AP_PW_MASK 0x80	60	#define ST_PRESS_LPS331AP_PW_MASK 0x80
55	#define ST_PRESS_LPS331AP_FS_ADDR 0x23	61	#define ST_PRESS_LPS331AP_FS_ADDR 0x23
56	#define ST_PRESS_LPS331AP_FS_MASK 0x30	62	#define ST_PRESS_LPS331AP_FS_MASK 0x30
57	#define ST_PRESS_LPS331AP_FS_AVL_1260_VAL 0x00
58	#define ST_PRESS_LPS331AP_FS_AVL_1260_GAIN ST_PRESS_KPASCAL_NANO_SCALE
59	#define ST_PRESS_LPS331AP_FS_AVL_TEMP_GAIN ST_PRESS_CELSIUS_NANO_SCALE
60	#define ST_PRESS_LPS331AP_BDU_ADDR 0x20	63	#define ST_PRESS_LPS331AP_BDU_ADDR 0x20
61	#define ST_PRESS_LPS331AP_BDU_MASK 0x04	64	#define ST_PRESS_LPS331AP_BDU_MASK 0x04
62	#define ST_PRESS_LPS331AP_DRDY_IRQ_ADDR 0x22	65	#define ST_PRESS_LPS331AP_DRDY_IRQ_ADDR 0x22
@@ -67,9 +70,14 @@ · 4 unmodified lines
67	#define ST_PRESS_LPS331AP_OD_IRQ_ADDR 0x22	70	#define ST_PRESS_LPS331AP_OD_IRQ_ADDR 0x22
68	#define ST_PRESS_LPS331AP_OD_IRQ_MASK 0x40	71	#define ST_PRESS_LPS331AP_OD_IRQ_MASK 0x40
69	#define ST_PRESS_LPS331AP_MULTIREAD_BIT true	72	#define ST_PRESS_LPS331AP_MULTIREAD_BIT true
70	#define ST_PRESS_LPS331AP_TEMP_OFFSET 42500
71		73
72	/* CUSTOM VALUES FOR LPS001WP SENSOR */	74	/* CUSTOM VALUES FOR LPS001WP SENSOR */
		75
		76	/* LPS001WP pressure resolution */
		77	#define ST_PRESS_LPS001WP_LSB_PER_MBAR 16UL
		78	/* LPS001WP temperature resolution */
		79	#define ST_PRESS_LPS001WP_LSB_PER_CELSIUS 64UL
		80
73	#define ST_PRESS_LPS001WP_WAI_EXP 0xba	81	#define ST_PRESS_LPS001WP_WAI_EXP 0xba
74	#define ST_PRESS_LPS001WP_ODR_ADDR 0x20	82	#define ST_PRESS_LPS001WP_ODR_ADDR 0x20
75	#define ST_PRESS_LPS001WP_ODR_MASK 0x30	83	#define ST_PRESS_LPS001WP_ODR_MASK 0x30
@@ -78,6 +86,8 @@ · 2 unmodified lines
78	#define ST_PRESS_LPS001WP_ODR_AVL_13HZ_VAL 0x03	86	#define ST_PRESS_LPS001WP_ODR_AVL_13HZ_VAL 0x03
79	#define ST_PRESS_LPS001WP_PW_ADDR 0x20	87	#define ST_PRESS_LPS001WP_PW_ADDR 0x20
80	#define ST_PRESS_LPS001WP_PW_MASK 0x40	88	#define ST_PRESS_LPS001WP_PW_MASK 0x40
		89	#define ST_PRESS_LPS001WP_FS_AVL_PRESS_GAIN \
		90	(100000000UL / ST_PRESS_LPS001WP_LSB_PER_MBAR)
81	#define ST_PRESS_LPS001WP_BDU_ADDR 0x20	91	#define ST_PRESS_LPS001WP_BDU_ADDR 0x20
82	#define ST_PRESS_LPS001WP_BDU_MASK 0x04	92	#define ST_PRESS_LPS001WP_BDU_MASK 0x04
83	#define ST_PRESS_LPS001WP_MULTIREAD_BIT true	93	#define ST_PRESS_LPS001WP_MULTIREAD_BIT true
@@ -94,11 +104,6 @@ · 10 unmodified lines
94	#define ST_PRESS_LPS25H_ODR_AVL_25HZ_VAL 0x04	104	#define ST_PRESS_LPS25H_ODR_AVL_25HZ_VAL 0x04
95	#define ST_PRESS_LPS25H_PW_ADDR 0x20	105	#define ST_PRESS_LPS25H_PW_ADDR 0x20
96	#define ST_PRESS_LPS25H_PW_MASK 0x80	106	#define ST_PRESS_LPS25H_PW_MASK 0x80
97	#define ST_PRESS_LPS25H_FS_ADDR 0x00
98	#define ST_PRESS_LPS25H_FS_MASK 0x00
99	#define ST_PRESS_LPS25H_FS_AVL_1260_VAL 0x00
100	#define ST_PRESS_LPS25H_FS_AVL_1260_GAIN ST_PRESS_KPASCAL_NANO_SCALE
101	#define ST_PRESS_LPS25H_FS_AVL_TEMP_GAIN ST_PRESS_CELSIUS_NANO_SCALE
102	#define ST_PRESS_LPS25H_BDU_ADDR 0x20	107	#define ST_PRESS_LPS25H_BDU_ADDR 0x20
103	#define ST_PRESS_LPS25H_BDU_MASK 0x04	108	#define ST_PRESS_LPS25H_BDU_MASK 0x04
104	#define ST_PRESS_LPS25H_DRDY_IRQ_ADDR 0x23	109	#define ST_PRESS_LPS25H_DRDY_IRQ_ADDR 0x23
@@ -109,7 +114,6 @@ · 4 unmodified lines
109	#define ST_PRESS_LPS25H_OD_IRQ_ADDR 0x22	114	#define ST_PRESS_LPS25H_OD_IRQ_ADDR 0x22
110	#define ST_PRESS_LPS25H_OD_IRQ_MASK 0x40	115	#define ST_PRESS_LPS25H_OD_IRQ_MASK 0x40
111	#define ST_PRESS_LPS25H_MULTIREAD_BIT true	116	#define ST_PRESS_LPS25H_MULTIREAD_BIT true
112	#define ST_PRESS_LPS25H_TEMP_OFFSET 42500
113	#define ST_PRESS_LPS25H_OUT_XL_ADDR 0x28	117	#define ST_PRESS_LPS25H_OUT_XL_ADDR 0x28
114	#define ST_TEMP_LPS25H_OUT_L_ADDR 0x2b	118	#define ST_TEMP_LPS25H_OUT_L_ADDR 0x2b
115		119
@@ -181,7 +185,9 @@ static const struct iio_chan_spec st_press_lps001wp_channels[] = { · 65 unmodified lines
181	.storagebits = 16,	185	.storagebits = 16,
182	.endianness = IIO_LE,	186	.endianness = IIO_LE,
183	},	187	},
184	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	188	.info_mask_separate =
		189	BIT(IIO_CHAN_INFO_RAW) \|
		190	BIT(IIO_CHAN_INFO_SCALE),
185	.modified = 0,	191	.modified = 0,
186	},	192	},
187	{	193	{
@@ -197,7 +203,7 @@ static const struct iio_chan_spec st_press_lps001wp_channels[] = { · 9 unmodified lines
197	},	203	},
198	.info_mask_separate =	204	.info_mask_separate =
199	BIT(IIO_CHAN_INFO_RAW) \|	205	BIT(IIO_CHAN_INFO_RAW) \|
200	BIT(IIO_CHAN_INFO_OFFSET),	206	BIT(IIO_CHAN_INFO_SCALE),
201	.modified = 0,	207	.modified = 0,
202	},	208	},
203	IIO_CHAN_SOFT_TIMESTAMP(1)	209	IIO_CHAN_SOFT_TIMESTAMP(1)
@@ -253,11 +259,14 @@ static const struct st_sensor_settings st_press_sensors_settings[] = { · 49 unmodified lines
253	.addr = ST_PRESS_LPS331AP_FS_ADDR,	259	.addr = ST_PRESS_LPS331AP_FS_ADDR,
254	.mask = ST_PRESS_LPS331AP_FS_MASK,	260	.mask = ST_PRESS_LPS331AP_FS_MASK,
255	.fs_avl = {	261	.fs_avl = {
		262	/*
		263	* Pressure and temperature sensitivity values
		264	* as defined in table 3 of LPS331AP datasheet.
		265	*/
256	[0] = {	266	[0] = {
257	.num = ST_PRESS_FS_AVL_1260MB,	267	.num = ST_PRESS_FS_AVL_1260MB,
258	.value = ST_PRESS_LPS331AP_FS_AVL_1260_VAL,	268	.gain = ST_PRESS_KPASCAL_NANO_SCALE,
259	.gain = ST_PRESS_LPS331AP_FS_AVL_1260_GAIN,	269	.gain2 = ST_PRESS_LSB_PER_CELSIUS,
260	.gain2 = ST_PRESS_LPS331AP_FS_AVL_TEMP_GAIN,
261	},	270	},
262	},	271	},
263	},	272	},
@@ -302,7 +311,17 @@ static const struct st_sensor_settings st_press_sensors_settings[] = { · 38 unmodified lines
302	.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,	311	.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
303	},	312	},
304	.fs = {	313	.fs = {
305	.addr = 0,	314	.fs_avl = {
		315	/*
		316	* Pressure and temperature resolution values
		317	* as defined in table 3 of LPS001WP datasheet.
		318	*/
		319	[0] = {
		320	.num = ST_PRESS_FS_AVL_1100MB,
		321	.gain = ST_PRESS_LPS001WP_FS_AVL_PRESS_GAIN,
		322	.gain2 = ST_PRESS_LPS001WP_LSB_PER_CELSIUS,
		323	},
		324	},
306	},	325	},
307	.bdu = {	326	.bdu = {
308	.addr = ST_PRESS_LPS001WP_BDU_ADDR,	327	.addr = ST_PRESS_LPS001WP_BDU_ADDR,
@@ -339,14 +358,15 @@ static const struct st_sensor_settings st_press_sensors_settings[] = { · 30 unmodified lines
339	.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,	358	.value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE,
340	},	359	},
341	.fs = {	360	.fs = {
342	.addr = ST_PRESS_LPS25H_FS_ADDR,
343	.mask = ST_PRESS_LPS25H_FS_MASK,
344	.fs_avl = {	361	.fs_avl = {
		362	/*
		363	* Pressure and temperature sensitivity values
		364	* as defined in table 3 of LPS25H datasheet.
		365	*/
345	[0] = {	366	[0] = {
346	.num = ST_PRESS_FS_AVL_1260MB,	367	.num = ST_PRESS_FS_AVL_1260MB,
347	.value = ST_PRESS_LPS25H_FS_AVL_1260_VAL,	368	.gain = ST_PRESS_KPASCAL_NANO_SCALE,
348	.gain = ST_PRESS_LPS25H_FS_AVL_1260_GAIN,	369	.gain2 = ST_PRESS_LSB_PER_CELSIUS,
349	.gain2 = ST_PRESS_LPS25H_FS_AVL_TEMP_GAIN,
350	},	370	},
351	},	371	},
352	},	372	},
@@ -450,26 +470,26 @@ static int st_press_read_raw(struct iio_dev *indio_dev, · 97 unmodified lines
450		470
451	return IIO_VAL_INT;	471	return IIO_VAL_INT;
452	case IIO_CHAN_INFO_SCALE:	472	case IIO_CHAN_INFO_SCALE:
453	*val = 0;
454
455	switch (ch->type) {	473	switch (ch->type) {
456	case IIO_PRESSURE:	474	case IIO_PRESSURE:
		475	*val = 0;
457	*val2 = press_data->current_fullscale->gain;	476	*val2 = press_data->current_fullscale->gain;
458	break;	477	return IIO_VAL_INT_PLUS_NANO;
459	case IIO_TEMP:	478	case IIO_TEMP:
		479	*val = MCELSIUS_PER_CELSIUS;
460	*val2 = press_data->current_fullscale->gain2;	480	*val2 = press_data->current_fullscale->gain2;
461	break;	481	return IIO_VAL_FRACTIONAL;
462	default:	482	default:
463	err = -EINVAL;	483	err = -EINVAL;
464	goto read_error;	484	goto read_error;
465	}	485	}
466		486
467	return IIO_VAL_INT_PLUS_NANO;
468	case IIO_CHAN_INFO_OFFSET:	487	case IIO_CHAN_INFO_OFFSET:
469	switch (ch->type) {	488	switch (ch->type) {
470	case IIO_TEMP:	489	case IIO_TEMP:
471	*val = 425;	490	val = ST_PRESS_MILLI_CELSIUS_OFFSET
472	*val2 = 10;	491	press_data->current_fullscale->gain2;
		492	*val2 = MCELSIUS_PER_CELSIUS;
473	break;	493	break;
474	default:	494	default:
475	err = -EINVAL;	495	err = -EINVAL;
@@ -511,6 +531,7 @@ static const struct iio_info press_info = { · 35 unmodified lines
511	static const struct iio_trigger_ops st_press_trigger_ops = {	531	static const struct iio_trigger_ops st_press_trigger_ops = {
512	.owner = THIS_MODULE,	532	.owner = THIS_MODULE,
513	.set_trigger_state = ST_PRESS_TRIGGER_SET_STATE,	533	.set_trigger_state = ST_PRESS_TRIGGER_SET_STATE,
		534	.validate_device = st_sensors_validate_device,
514	};	535	};
515	#define ST_PRESS_TRIGGER_OPS (&st_press_trigger_ops)	536	#define ST_PRESS_TRIGGER_OPS (&st_press_trigger_ops)
516	#else	537	#else

drivers/iio/proximity/as3935.c+12−5

@@ -64,6 +64,7 @@ struct as3935_state { · 63 unmodified lines
64	struct delayed_work work;	64	struct delayed_work work;
65		65
66	u32 tune_cap;	66	u32 tune_cap;
		67	u8 buffer[16]; /* 8-bit data + 56-bit padding + 64-bit timestamp */
67	u8 buf[2] ____cacheline_aligned;	68	u8 buf[2] ____cacheline_aligned;
68	};	69	};
69		70
@@ -72,7 +73,8 @@ static const struct iio_chan_spec as3935_channels[] = { · 2 unmodified lines
72	.type = IIO_PROXIMITY,	73	.type = IIO_PROXIMITY,
73	.info_mask_separate =	74	.info_mask_separate =
74	BIT(IIO_CHAN_INFO_RAW) \|	75	BIT(IIO_CHAN_INFO_RAW) \|
75	BIT(IIO_CHAN_INFO_PROCESSED),	76	BIT(IIO_CHAN_INFO_PROCESSED) \|
		77	BIT(IIO_CHAN_INFO_SCALE),
76	.scan_index = 0,	78	.scan_index = 0,
77	.scan_type = {	79	.scan_type = {
78	.sign = 'u',	80	.sign = 'u',
@@ -181,7 +183,12 @@ static int as3935_read_raw(struct iio_dev *indio_dev, · 102 unmodified lines
181	/* storm out of range */	183	/* storm out of range */
182	if (*val == AS3935_DATA_MASK)	184	if (*val == AS3935_DATA_MASK)
183	return -EINVAL;	185	return -EINVAL;
184	val = 1000;	186
		187	if (m == IIO_CHAN_INFO_PROCESSED)
		188	val = 1000;
		189	break;
		190	case IIO_CHAN_INFO_SCALE:
		191	*val = 1000;
185	break;	192	break;
186	default:	193	default:
187	return -EINVAL;	194	return -EINVAL;
@@ -206,10 +213,10 @@ static irqreturn_t as3935_trigger_handler(int irq, void *private) · 18 unmodified lines
206	ret = as3935_read(st, AS3935_DATA, &val);	213	ret = as3935_read(st, AS3935_DATA, &val);
207	if (ret)	214	if (ret)
208	goto err_read;	215	goto err_read;
209	val &= AS3935_DATA_MASK;
210	val *= 1000;
211		216
212	iio_push_to_buffers_with_timestamp(indio_dev, &val, pf->timestamp);	217	st->buffer[0] = val & AS3935_DATA_MASK;
		218	iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer,
		219	pf->timestamp);
213	err_read:	220	err_read:
214	iio_trigger_notify_done(indio_dev->trig);	221	iio_trigger_notify_done(indio_dev->trig);
215		222

drivers/infiniband/core/cache.c+8−2

@@ -178,6 +178,7 @@ static int write_gid(struct ib_device *ib_dev, u8 port, · 177 unmodified lines
178	{	178	{
179	int ret = 0;	179	int ret = 0;
180	struct net_device *old_net_dev;	180	struct net_device *old_net_dev;
		181	enum ib_gid_type old_gid_type;
181		182
182	/* in rdma_cap_roce_gid_table, this funciton should be protected by a	183	/* in rdma_cap_roce_gid_table, this funciton should be protected by a
183	* sleep-able lock.	184	* sleep-able lock.
@@ -199,6 +200,7 @@ static int write_gid(struct ib_device *ib_dev, u8 port, · 15 unmodified lines
199	}	200	}
200		201
201	old_net_dev = table->data_vec[ix].attr.ndev;	202	old_net_dev = table->data_vec[ix].attr.ndev;
		203	old_gid_type = table->data_vec[ix].attr.gid_type;
202	if (old_net_dev && old_net_dev != attr->ndev)	204	if (old_net_dev && old_net_dev != attr->ndev)
203	dev_put(old_net_dev);	205	dev_put(old_net_dev);
204	/* if modify_gid failed, just delete the old gid */	206	/* if modify_gid failed, just delete the old gid */
@@ -207,10 +209,14 @@ static int write_gid(struct ib_device *ib_dev, u8 port, · 2 unmodified lines
207	attr = &zattr;	209	attr = &zattr;
208	table->data_vec[ix].context = NULL;	210	table->data_vec[ix].context = NULL;
209	}	211	}
210	if (default_gid)	212
211	table->data_vec[ix].props \|= GID_TABLE_ENTRY_DEFAULT;
212	memcpy(&table->data_vec[ix].gid, gid, sizeof(*gid));	213	memcpy(&table->data_vec[ix].gid, gid, sizeof(*gid));
213	memcpy(&table->data_vec[ix].attr, attr, sizeof(*attr));	214	memcpy(&table->data_vec[ix].attr, attr, sizeof(*attr));
		215	if (default_gid) {
		216	table->data_vec[ix].props \|= GID_TABLE_ENTRY_DEFAULT;
		217	if (action == GID_TABLE_WRITE_ACTION_DEL)
		218	table->data_vec[ix].attr.gid_type = old_gid_type;
		219	}
214	if (table->data_vec[ix].attr.ndev &&	220	if (table->data_vec[ix].attr.ndev &&
215	table->data_vec[ix].attr.ndev != old_net_dev)	221	table->data_vec[ix].attr.ndev != old_net_dev)
216	dev_hold(table->data_vec[ix].attr.ndev);	222	dev_hold(table->data_vec[ix].attr.ndev);

drivers/infiniband/core/cm.c+2−2

@@ -3452,14 +3452,14 @@ static int cm_establish(struct ib_cm_id *cm_id) · 3451 unmodified lines
3452	work->cm_event.event = IB_CM_USER_ESTABLISHED;	3452	work->cm_event.event = IB_CM_USER_ESTABLISHED;
3453		3453
3454	/* Check if the device started its remove_one */	3454	/* Check if the device started its remove_one */
3455	spin_lock_irq(&cm.lock);	3455	spin_lock_irqsave(&cm.lock, flags);
3456	if (!cm_dev->going_down) {	3456	if (!cm_dev->going_down) {
3457	queue_delayed_work(cm.wq, &work->work, 0);	3457	queue_delayed_work(cm.wq, &work->work, 0);
3458	} else {	3458	} else {
3459	kfree(work);	3459	kfree(work);
3460	ret = -ENODEV;	3460	ret = -ENODEV;
3461	}	3461	}
3462	spin_unlock_irq(&cm.lock);	3462	spin_unlock_irqrestore(&cm.lock, flags);
3463		3463
3464	out:	3464	out:
3465	return ret;	3465	return ret;

drivers/infiniband/core/device.c+5−1

 	if (err || port_attr->subnet_prefix)
 		return err;
+	if (rdma_port_get_link_layer(device, port_num) != IB_LINK_LAYER_INFINIBAND)
+		return 0;
 	err = ib_query_gid(device, port_num, 0, &gid, NULL);
 	if (err)
 		return err;
 		goto err_mad;
 	}
-	if (ib_add_ibnl_clients()) {
+	ret = ib_add_ibnl_clients();
+	if (ret) {
 		pr_warn("Couldn't register ibnl clients\n");
 		goto err_sa;
 	}

drivers/infiniband/core/iwpm_msg.c+1−1

@@ -506,7 +506,7 @@ int iwpm_add_and_query_mapping_cb(struct sk_buff *skb, · 505 unmodified lines
506	if (!nlmsg_request) {	506	if (!nlmsg_request) {
507	pr_info("%s: Could not find a matching request (seq = %u)\n",	507	pr_info("%s: Could not find a matching request (seq = %u)\n",
508	__func__, msg_seq);	508	__func__, msg_seq);
509	return -EINVAL;	509	return -EINVAL;
510	}	510	}
511	pm_msg = nlmsg_request->req_buffer;	511	pm_msg = nlmsg_request->req_buffer;
512	local_sockaddr = (struct sockaddr_storage *)	512	local_sockaddr = (struct sockaddr_storage *)

drivers/infiniband/core/mad.c+3−3

@@ -1638,9 +1638,9 @@ static void remove_mad_reg_req(struct ib_mad_agent_private *agent_priv) · 1637 unmodified lines
1638	/* Now, check to see if there are any methods still in use */	1638	/* Now, check to see if there are any methods still in use */
1639	if (!check_method_table(method)) {	1639	if (!check_method_table(method)) {
1640	/* If not, release management method table */	1640	/* If not, release management method table */
1641	kfree(method);	1641	kfree(method);
1642	class->method_table[mgmt_class] = NULL;	1642	class->method_table[mgmt_class] = NULL;
1643	/* Any management classes left ? */	1643	/* Any management classes left ? */
1644	if (!check_class_table(class)) {	1644	if (!check_class_table(class)) {
1645	/* If not, release management class table */	1645	/* If not, release management class table */
1646	kfree(class);	1646	kfree(class);

drivers/infiniband/core/sysfs.c+16−8

 static void setup_hw_stats(struct ib_device *device, struct ib_port *port,
 			   u8 port_num)
 {
-	struct attribute_group *hsag = NULL;
+	struct attribute_group *hsag;
 	struct rdma_hw_stats *stats;
-	int i = 0, ret;
+	int i, ret;
 	stats = device->alloc_hw_stats(device, port_num);
 		return;
 	if (!stats->names || stats->num_counters <= 0)
-		goto err;
+		goto err_free_stats;
+	/*
+	 * Two extra attribue elements here, one for the lifespan entry and
+	 * one to NULL terminate the list for the sysfs core code
+	 */
 	hsag = kzalloc(sizeof(*hsag) +
-		       // 1 extra for the lifespan config entry
+		       sizeof(void *) * (stats->num_counters + 2),
-		       sizeof(void *) * (stats->num_counters + 1),
 		       GFP_KERNEL);
 	if (!hsag)
-		return;
+		goto err_free_stats;
 	ret = device->get_hw_stats(device, stats, port_num,
 				   stats->num_counters);
 	if (ret != stats->num_counters)
-		goto err;
+		goto err_free_hsag;
 	stats->timestamp = jiffies;
 		hsag->attrs[i] = alloc_hsa(i, port_num, stats->names[i]);
 		if (!hsag->attrs[i])
 			goto err;
+		sysfs_attr_init(hsag->attrs[i]);
 	}
 	/* treat an error here as non-fatal */
 	hsag->attrs[i] = alloc_hsa_lifespan("lifespan", port_num);
+	if (hsag->attrs[i])
+		sysfs_attr_init(hsag->attrs[i]);
 	if (port) {
 		struct kobject *kobj = &port->kobj;
 	return;
 err:
-	kfree(stats);
 	for (; i >= 0; i--)
 		kfree(hsag->attrs[i]);
+err_free_hsag:
 	kfree(hsag);
+err_free_stats:
+	kfree(stats);
 	return;
 }

drivers/infiniband/hw/hfi1/affinity.c+14−17

 	const struct cpumask *node_mask,
 		*proc_mask = tsk_cpus_allowed(current);
 	struct cpu_mask_set *set = &dd->affinity->proc;
-	char buf[1024];
 	/*
 	 * check whether process/context affinity has already
 	 * been set
 	 */
 	if (cpumask_weight(proc_mask) == 1) {
-		scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(proc_mask));
+		hfi1_cdbg(PROC, "PID %u %s affinity set to CPU %*pbl",
-		hfi1_cdbg(PROC, "PID %u %s affinity set to CPU %s",
+			  current->pid, current->comm,
-			  current->pid, current->comm, buf);
+			  cpumask_pr_args(proc_mask));
 		/*
 		 * Mark the pre-set CPU as used. This is atomic so we don't
 		 * need the lock
 		cpumask_set_cpu(cpu, &set->used);
 		goto done;
 	} else if (cpumask_weight(proc_mask) < cpumask_weight(&set->mask)) {
-		scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(proc_mask));
+		hfi1_cdbg(PROC, "PID %u %s affinity set to CPU set(s) %*pbl",
-		hfi1_cdbg(PROC, "PID %u %s affinity set to CPU set(s) %s",
+			  current->pid, current->comm,
-			  current->pid, current->comm, buf);
+			  cpumask_pr_args(proc_mask));
 		goto done;
 	}
 	cpumask_or(intrs, intrs, (dd->affinity->rcv_intr.gen ?
 				  &dd->affinity->rcv_intr.mask :
 				  &dd->affinity->rcv_intr.used));
-	scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(intrs));
+	hfi1_cdbg(PROC, "CPUs used by interrupts: %*pbl",
-	hfi1_cdbg(PROC, "CPUs used by interrupts: %s", buf);
+		  cpumask_pr_args(intrs));
 	/*
 	 * If we don't have a NUMA node requested, preference is towards
 	if (node == -1)
 		node = dd->node;
 	node_mask = cpumask_of_node(node);
-	scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(node_mask));
+	hfi1_cdbg(PROC, "device on NUMA %u, CPUs %*pbl", node,
-	hfi1_cdbg(PROC, "device on NUMA %u, CPUs %s", node, buf);
+		  cpumask_pr_args(node_mask));
 	/* diff will hold all unused cpus */
 	cpumask_andnot(diff, &set->mask, &set->used);
-	scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(diff));
+	hfi1_cdbg(PROC, "unused CPUs (all) %*pbl", cpumask_pr_args(diff));
-	hfi1_cdbg(PROC, "unused CPUs (all) %s", buf);
 	/* get cpumask of available CPUs on preferred NUMA */
 	cpumask_and(mask, diff, node_mask);
-	scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(mask));
+	hfi1_cdbg(PROC, "available cpus on NUMA %*pbl", cpumask_pr_args(mask));
-	hfi1_cdbg(PROC, "available cpus on NUMA %s", buf);
 	/*
 	 * At first, we don't want to place processes on the same
 		cpumask_andnot(diff, &set->mask, &set->used);
 		cpumask_andnot(mask, diff, node_mask);
 	}
-	scnprintf(buf, 1024, "%*pbl", cpumask_pr_args(mask));
+	hfi1_cdbg(PROC, "possible CPUs for process %*pbl",
-	hfi1_cdbg(PROC, "possible CPUs for process %s", buf);
+		  cpumask_pr_args(mask));
 	cpu = cpumask_first(mask);
 	if (cpu >= nr_cpu_ids) /* empty */

drivers/infiniband/hw/hfi1/chip.c+3−3

@@ -7832,8 +7832,8 @@ static void handle_dcc_err(struct hfi1_devdata *dd, u32 unused, u64 reg) · 7831 unmodified lines
7832	* save first 2 flits in the packet that caused	7832	* save first 2 flits in the packet that caused
7833	* the error	7833	* the error
7834	*/	7834	*/
7835	dd->err_info_rcvport.packet_flit1 = hdr0;	7835	dd->err_info_rcvport.packet_flit1 = hdr0;
7836	dd->err_info_rcvport.packet_flit2 = hdr1;	7836	dd->err_info_rcvport.packet_flit2 = hdr1;
7837	}	7837	}
7838	switch (info) {	7838	switch (info) {
7839	case 1:	7839	case 1:
@@ -11906,7 +11906,7 @@ static void update_synth_timer(unsigned long opaque) · 4066 unmodified lines
11906	hfi1_cdbg(CNTR, "[%d] No update necessary", dd->unit);	11906	hfi1_cdbg(CNTR, "[%d] No update necessary", dd->unit);
11907	}	11907	}
11908		11908
11909	mod_timer(&dd->synth_stats_timer, jiffies + HZ * SYNTH_CNT_TIME);	11909	mod_timer(&dd->synth_stats_timer, jiffies + HZ * SYNTH_CNT_TIME);
11910	}	11910	}
11911		11911
11912	#define C_MAX_NAME 13 /* 12 chars + one for /0 */	11912	#define C_MAX_NAME 13 /* 12 chars + one for /0 */

drivers/infiniband/hw/hfi1/init.c+1−1

@@ -1337,7 +1337,7 @@ static void cleanup_device_data(struct hfi1_devdata *dd) · 1336 unmodified lines
1337	dma_free_coherent(&dd->pcidev->dev, sizeof(u64),	1337	dma_free_coherent(&dd->pcidev->dev, sizeof(u64),
1338	(void *)dd->rcvhdrtail_dummy_kvaddr,	1338	(void *)dd->rcvhdrtail_dummy_kvaddr,
1339	dd->rcvhdrtail_dummy_physaddr);	1339	dd->rcvhdrtail_dummy_physaddr);
1340	dd->rcvhdrtail_dummy_kvaddr = NULL;	1340	dd->rcvhdrtail_dummy_kvaddr = NULL;
1341	}	1341	}
1342		1342
1343	for (ctxt = 0; tmp && ctxt < dd->num_rcv_contexts; ctxt++) {	1343	for (ctxt = 0; tmp && ctxt < dd->num_rcv_contexts; ctxt++) {

drivers/infiniband/hw/hfi1/trace.c+0−13

@@ -214,19 +214,6 @@ const char *print_u32_array( · 213 unmodified lines
214	return ret;	214	return ret;
215	}	215	}
216		216
217	const char *print_u64_array(
218	struct trace_seq *p,
219	u64 *arr, int len)
220	{
221	int i;
222	const char *ret = trace_seq_buffer_ptr(p);
223
224	for (i = 0; i < len; i++)
225	trace_seq_printf(p, "%s0x%016llx", i == 0 ? "" : " ", arr[i]);
226	trace_seq_putc(p, 0);
227	return ret;
228	}
229
230	__hfi1_trace_fn(PKT);	217	__hfi1_trace_fn(PKT);
231	__hfi1_trace_fn(PROC);	218	__hfi1_trace_fn(PROC);
232	__hfi1_trace_fn(SDMA);	219	__hfi1_trace_fn(SDMA);

drivers/infiniband/hw/hfi1/user_sdma.c+3−3

@@ -183,7 +183,7 @@ struct user_sdma_iovec { · 182 unmodified lines
183	struct sdma_mmu_node *node;	183	struct sdma_mmu_node *node;
184	};	184	};
185		185
186	#define SDMA_CACHE_NODE_EVICT BIT(0)	186	#define SDMA_CACHE_NODE_EVICT 0
187		187
188	struct sdma_mmu_node {	188	struct sdma_mmu_node {
189	struct mmu_rb_node rb;	189	struct mmu_rb_node rb;
@@ -1355,11 +1355,11 @@ static int set_txreq_header(struct user_sdma_request *req, · 1165 unmodified lines
1355	*/	1355	*/
1356	SDMA_DBG(req, "TID offset %ubytes %uunits om%u",	1356	SDMA_DBG(req, "TID offset %ubytes %uunits om%u",
1357	req->tidoffset, req->tidoffset / req->omfactor,	1357	req->tidoffset, req->tidoffset / req->omfactor,
1358	!!(req->omfactor - KDETH_OM_SMALL));	1358	req->omfactor != KDETH_OM_SMALL);
1359	KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,	1359	KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1360	req->tidoffset / req->omfactor);	1360	req->tidoffset / req->omfactor);
1361	KDETH_SET(hdr->kdeth.ver_tid_offset, OM,	1361	KDETH_SET(hdr->kdeth.ver_tid_offset, OM,
1362	!!(req->omfactor - KDETH_OM_SMALL));	1362	req->omfactor != KDETH_OM_SMALL);
1363	}	1363	}
1364	done:	1364	done:
1365	trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,	1365	trace_hfi1_sdma_user_header(pq->dd, pq->ctxt, pq->subctxt,

drivers/infiniband/hw/mlx4/main.c+2−2

 			props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
 		else
 			props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
-	if (dev->steering_support ==  MLX4_STEERING_MODE_DEVICE_MANAGED)
-		props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
 	}
+	if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
+		props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
 	props->device_cap_flags |= IB_DEVICE_RAW_IP_CSUM;

drivers/infiniband/hw/mlx5/cq.c+9−3

 	int eqn;
 	int err;
-	if (entries < 0)
+	if (entries < 0 ||
+	    (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))))
 		return ERR_PTR(-EINVAL);
 	if (check_cq_create_flags(attr->flags))
 		return -ENOSYS;
 	}
-	if (entries < 1)
+	if (entries < 1 ||
+	    entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz))) {
+		mlx5_ib_warn(dev, "wrong entries number %d, max %d\n",
+			     entries,
+			     1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz));
 		return -EINVAL;
+	}
 	entries = roundup_pow_of_two(entries + 1);
-	if (entries >  (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1)
+	if (entries > (1 << MLX5_CAP_GEN(dev->mdev, log_max_cq_sz)) + 1)
 		return -EINVAL;
 	if (entries == ibcq->cqe + 1)

drivers/infiniband/hw/mlx5/main.c+15−7

 	    MLX5_CAP_ETH(dev->mdev, scatter_fcs))
 		props->device_cap_flags |= IB_DEVICE_RAW_SCATTER_FCS;
+	if (mlx5_get_flow_namespace(dev->mdev, MLX5_FLOW_NAMESPACE_BYPASS))
+		props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
 	props->vendor_part_id	   = mdev->pdev->device;
 	props->hw_ver		   = mdev->pdev->revision;
 	num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
 	gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
 	resp.qp_tab_size = 1 << MLX5_CAP_GEN(dev->mdev, log_max_qp);
-	resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size);
+	if (mlx5_core_is_pf(dev->mdev) && MLX5_CAP_GEN(dev->mdev, bf))
+		resp.bf_reg_size = 1 << MLX5_CAP_GEN(dev->mdev, log_bf_reg_size);
 	resp.cache_line_size = L1_CACHE_BYTES;
 	resp.max_sq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_sq);
 	resp.max_rq_desc_sz = MLX5_CAP_GEN(dev->mdev, max_wqe_sz_rq);
 	if (field_avail(typeof(resp), cqe_version, udata->outlen))
 		resp.response_length += sizeof(resp.cqe_version);
-	if (field_avail(typeof(resp), hca_core_clock_offset, udata->outlen)) {
+	/*
+	 * We don't want to expose information from the PCI bar that is located
+	 * after 4096 bytes, so if the arch only supports larger pages, let's
+	 * pretend we don't support reading the HCA's core clock. This is also
+	 * forced by mmap function.
+	 */
+	if (PAGE_SIZE <= 4096 &&
+	    field_avail(typeof(resp), hca_core_clock_offset, udata->outlen)) {
 		resp.comp_mask |=
 			MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET;
 		resp.hca_core_clock_offset =
 {
 	struct mlx5_ib_dev *dev =
 		container_of(device, struct mlx5_ib_dev, ib_dev.dev);
-	return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
+	return sprintf(buf, "%d.%d.%04d\n", fw_rev_maj(dev->mdev),
 		       fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
 }
 		break;
 	case MLX5_DEV_EVENT_PORT_DOWN:
+	case MLX5_DEV_EVENT_PORT_INITIALIZED:
 		ibev.event = IB_EVENT_PORT_ERR;
 		port = (u8)param;
 		break;
-	case MLX5_DEV_EVENT_PORT_INITIALIZED:
-		/* not used by ULPs */
-		return;
 	case MLX5_DEV_EVENT_LID_CHANGE:
 		ibev.event = IB_EVENT_LID_CHANGE;
 		port = (u8)param;

drivers/infiniband/hw/mlx5/qp.c+25−16

 		qp->rq.max_gs = 0;
 		qp->rq.wqe_cnt = 0;
 		qp->rq.wqe_shift = 0;
+		cap->max_recv_wr = 0;
+		cap->max_recv_sge = 0;
 	} else {
 		if (ucmd) {
 			qp->rq.wqe_cnt = ucmd->rq_wqe_count;
 static int mlx5_set_path(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
 			 const struct ib_ah_attr *ah,
 			 struct mlx5_qp_path *path, u8 port, int attr_mask,
-			 u32 path_flags, const struct ib_qp_attr *attr)
+			 u32 path_flags, const struct ib_qp_attr *attr,
+			 bool alt)
 {
 	enum rdma_link_layer ll = rdma_port_get_link_layer(&dev->ib_dev, port);
 	int err;
 	if (attr_mask & IB_QP_PKEY_INDEX)
-		path->pkey_index = attr->pkey_index;
+		path->pkey_index = cpu_to_be16(alt ? attr->alt_pkey_index :
+						     attr->pkey_index);
 	if (ah->ah_flags & IB_AH_GRH) {
 		if (ah->grh.sgid_index >=
 							  ah->grh.sgid_index);
 		path->dci_cfi_prio_sl = (ah->sl & 0x7) << 4;
 	} else {
-		path->fl = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
+		path->fl_free_ar = (path_flags & MLX5_PATH_FLAG_FL) ? 0x80 : 0;
-		path->free_ar = (path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x80 :
+		path->fl_free_ar |=
-									0;
+			(path_flags & MLX5_PATH_FLAG_FREE_AR) ? 0x40 : 0;
 		path->rlid = cpu_to_be16(ah->dlid);
 		path->grh_mlid = ah->src_path_bits & 0x7f;
 		if (ah->ah_flags & IB_AH_GRH)
 	path->port = port;
 	if (attr_mask & IB_QP_TIMEOUT)
-		path->ackto_lt = attr->timeout << 3;
+		path->ackto_lt = (alt ? attr->alt_timeout : attr->timeout) << 3;
 	if ((qp->ibqp.qp_type == IB_QPT_RAW_PACKET) && qp->sq.wqe_cnt)
 		return modify_raw_packet_eth_prio(dev->mdev,
 		context->log_pg_sz_remote_qpn = cpu_to_be32(attr->dest_qp_num);
 	if (attr_mask & IB_QP_PKEY_INDEX)
-		context->pri_path.pkey_index = attr->pkey_index;
+		context->pri_path.pkey_index = cpu_to_be16(attr->pkey_index);
 	/* todo implement counter_index functionality */
 	if (attr_mask & IB_QP_AV) {
 		err = mlx5_set_path(dev, qp, &attr->ah_attr, &context->pri_path,
 				    attr_mask & IB_QP_PORT ? attr->port_num : qp->port,
-				    attr_mask, 0, attr);
+				    attr_mask, 0, attr, false);
 		if (err)
 			goto out;
 	}
 	if (attr_mask & IB_QP_ALT_PATH) {
 		err = mlx5_set_path(dev, qp, &attr->alt_ah_attr,
 				    &context->alt_path,
-				    attr->alt_port_num, attr_mask, 0, attr);
+				    attr->alt_port_num,
+				    attr_mask | IB_QP_PKEY_INDEX | IB_QP_TIMEOUT,
+				    0, attr, true);
 		if (err)
 			goto out;
 	}
 	if (qp->ibqp.qp_type == IB_QPT_RC || qp->ibqp.qp_type == IB_QPT_UC) {
 		to_ib_ah_attr(dev, &qp_attr->ah_attr, &context->pri_path);
 		to_ib_ah_attr(dev, &qp_attr->alt_ah_attr, &context->alt_path);
-		qp_attr->alt_pkey_index = context->alt_path.pkey_index & 0x7f;
+		qp_attr->alt_pkey_index =
+			be16_to_cpu(context->alt_path.pkey_index);
 		qp_attr->alt_port_num	= qp_attr->alt_ah_attr.port_num;
 	}
-	qp_attr->pkey_index = context->pri_path.pkey_index & 0x7f;
+	qp_attr->pkey_index = be16_to_cpu(context->pri_path.pkey_index);
 	qp_attr->port_num = context->pri_path.port;
 	/* qp_attr->en_sqd_async_notify is only applicable in modify qp */
 	qp_attr->cap.max_recv_sge    = qp->rq.max_gs;
 	if (!ibqp->uobject) {
-		qp_attr->cap.max_send_wr  = qp->sq.wqe_cnt;
+		qp_attr->cap.max_send_wr  = qp->sq.max_post;
 		qp_attr->cap.max_send_sge = qp->sq.max_gs;
+		qp_init_attr->qp_context = ibqp->qp_context;
 	} else {
 		qp_attr->cap.max_send_wr  = 0;
 		qp_attr->cap.max_send_sge = 0;
 	}
-	/* We don't support inline sends for kernel QPs (yet), and we
+	qp_init_attr->qp_type = ibqp->qp_type;
-	 * don't know what userspace's value should be.
+	qp_init_attr->recv_cq = ibqp->recv_cq;
-	 */
+	qp_init_attr->send_cq = ibqp->send_cq;
-	qp_attr->cap.max_inline_data = 0;
+	qp_init_attr->srq = ibqp->srq;
+	qp_attr->cap.max_inline_data = qp->max_inline_data;
 	qp_init_attr->cap	     = qp_attr->cap;

drivers/infiniband/hw/usnic/usnic_uiom.c+0−5

 #include <linux/dma-mapping.h>
 #include <linux/sched.h>
 #include <linux/hugetlb.h>
-#include <linux/dma-attrs.h>
 #include <linux/iommu.h>
 #include <linux/workqueue.h>
 #include <linux/list.h>
 	int i;
 	int flags;
 	dma_addr_t pa;
-	DEFINE_DMA_ATTRS(attrs);
-	if (dmasync)
-		dma_set_attr(DMA_ATTR_WRITE_BARRIER, &attrs);
 	if (!can_do_mlock())
 		return -EPERM;

drivers/infiniband/sw/rdmavt/qp.c+6−0

  */
 static void rvt_reset_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp,
 		  enum ib_qp_type type)
+	__releases(&qp->s_lock)
+	__releases(&qp->s_hlock)
+	__releases(&qp->r_lock)
+	__acquires(&qp->r_lock)
+	__acquires(&qp->s_hlock)
+	__acquires(&qp->s_lock)
 {
 	if (qp->state != IB_QPS_RESET) {
 		qp->state = IB_QPS_RESET;

drivers/infiniband/ulp/ipoib/ipoib.h+1−0

@@ -94,6 +94,7 @@ enum { · 93 unmodified lines
94	IPOIB_NEIGH_TBL_FLUSH = 12,	94	IPOIB_NEIGH_TBL_FLUSH = 12,
95	IPOIB_FLAG_DEV_ADDR_SET = 13,	95	IPOIB_FLAG_DEV_ADDR_SET = 13,
96	IPOIB_FLAG_DEV_ADDR_CTRL = 14,	96	IPOIB_FLAG_DEV_ADDR_CTRL = 14,
		97	IPOIB_FLAG_GOING_DOWN = 15,
97		98
98	IPOIB_MAX_BACKOFF_SECONDS = 16,	99	IPOIB_MAX_BACKOFF_SECONDS = 16,
99		100

drivers/infiniband/ulp/ipoib/ipoib_cm.c+4−0

 {
 	struct net_device *dev = to_net_dev(d);
 	int ret;
+	struct ipoib_dev_priv *priv = netdev_priv(dev);
+	if (test_bit(IPOIB_FLAG_GOING_DOWN, &priv->flags))
+		return -EPERM;
 	if (!rtnl_trylock())
 		return restart_syscall();

drivers/infiniband/ulp/ipoib/ipoib_ib.c+4−4

@@ -1015,7 +1015,7 @@ static bool ipoib_dev_addr_changed_valid(struct ipoib_dev_priv *priv) · 1014 unmodified lines
1015	if (ib_query_gid(priv->ca, priv->port, 0, &gid0, NULL))	1015	if (ib_query_gid(priv->ca, priv->port, 0, &gid0, NULL))
1016	return false;	1016	return false;
1017		1017
1018	netif_addr_lock(priv->dev);	1018	netif_addr_lock_bh(priv->dev);
1019		1019
1020	/* The subnet prefix may have changed, update it now so we won't have	1020	/* The subnet prefix may have changed, update it now so we won't have
1021	* to do it later	1021	* to do it later
@@ -1026,12 +1026,12 @@ static bool ipoib_dev_addr_changed_valid(struct ipoib_dev_priv *priv) · 4 unmodified lines
1026		1026
1027	search_gid.global.interface_id = priv->local_gid.global.interface_id;	1027	search_gid.global.interface_id = priv->local_gid.global.interface_id;
1028		1028
1029	netif_addr_unlock(priv->dev);	1029	netif_addr_unlock_bh(priv->dev);
1030		1030
1031	err = ib_find_gid(priv->ca, &search_gid, IB_GID_TYPE_IB,	1031	err = ib_find_gid(priv->ca, &search_gid, IB_GID_TYPE_IB,
1032	priv->dev, &port, &index);	1032	priv->dev, &port, &index);
1033		1033
1034	netif_addr_lock(priv->dev);	1034	netif_addr_lock_bh(priv->dev);
1035		1035
1036	if (search_gid.global.interface_id !=	1036	if (search_gid.global.interface_id !=
1037	priv->local_gid.global.interface_id)	1037	priv->local_gid.global.interface_id)
@@ -1092,7 +1092,7 @@ static bool ipoib_dev_addr_changed_valid(struct ipoib_dev_priv *priv) · 54 unmodified lines
1092	}	1092	}
1093		1093
1094	out:	1094	out:
1095	netif_addr_unlock(priv->dev);	1095	netif_addr_unlock_bh(priv->dev);
1096		1096
1097	return ret;	1097	return ret;
1098	}	1098	}

drivers/infiniband/ulp/ipoib/ipoib_main.c+10−5

@@ -1206,7 +1206,9 @@ struct ipoib_neigh ipoib_neigh_get(struct net_device dev, u8 *daddr) · 1205 unmodified lines
1206	neigh = NULL;	1206	neigh = NULL;
1207	goto out_unlock;	1207	goto out_unlock;
1208	}	1208	}
1209	neigh->alive = jiffies;	1209
		1210	if (likely(skb_queue_len(&neigh->queue) < IPOIB_MAX_PATH_REC_QUEUE))
		1211	neigh->alive = jiffies;
1210	goto out_unlock;	1212	goto out_unlock;
1211	}	1213	}
1212	}	1214	}
@@ -1851,7 +1853,7 @@ static void set_base_guid(struct ipoib_dev_priv priv, union ib_gid gid) · 638 unmodified lines
1851	struct ipoib_dev_priv *child_priv;	1853	struct ipoib_dev_priv *child_priv;
1852	struct net_device *netdev = priv->dev;	1854	struct net_device *netdev = priv->dev;
1853		1855
1854	netif_addr_lock(netdev);	1856	netif_addr_lock_bh(netdev);
1855		1857
1856	memcpy(&priv->local_gid.global.interface_id,	1858	memcpy(&priv->local_gid.global.interface_id,
1857	&gid->global.interface_id,	1859	&gid->global.interface_id,
@@ -1859,7 +1861,7 @@ static void set_base_guid(struct ipoib_dev_priv priv, union ib_gid gid) · 1 unmodified line
1859	memcpy(netdev->dev_addr + 4, &priv->local_gid, sizeof(priv->local_gid));	1861	memcpy(netdev->dev_addr + 4, &priv->local_gid, sizeof(priv->local_gid));
1860	clear_bit(IPOIB_FLAG_DEV_ADDR_SET, &priv->flags);	1862	clear_bit(IPOIB_FLAG_DEV_ADDR_SET, &priv->flags);
1861		1863
1862	netif_addr_unlock(netdev);	1864	netif_addr_unlock_bh(netdev);
1863		1865
1864	if (!test_bit(IPOIB_FLAG_SUBINTERFACE, &priv->flags)) {	1866	if (!test_bit(IPOIB_FLAG_SUBINTERFACE, &priv->flags)) {
1865	down_read(&priv->vlan_rwsem);	1867	down_read(&priv->vlan_rwsem);
@@ -1875,7 +1877,7 @@ static int ipoib_check_lladdr(struct net_device *dev, · 9 unmodified lines
1875	union ib_gid gid = (union ib_gid )(ss->__data + 4);	1877	union ib_gid gid = (union ib_gid )(ss->__data + 4);
1876	int ret = 0;	1878	int ret = 0;
1877		1879
1878	netif_addr_lock(dev);	1880	netif_addr_lock_bh(dev);
1879		1881
1880	/* Make sure the QPN, reserved and subnet prefix match the current	1882	/* Make sure the QPN, reserved and subnet prefix match the current
1881	* lladdr, it also makes sure the lladdr is unicast.	1883	* lladdr, it also makes sure the lladdr is unicast.
@@ -1885,7 +1887,7 @@ static int ipoib_check_lladdr(struct net_device *dev, · 3 unmodified lines
1885	gid->global.interface_id == 0)	1887	gid->global.interface_id == 0)
1886	ret = -EINVAL;	1888	ret = -EINVAL;
1887		1889
1888	netif_addr_unlock(dev);	1890	netif_addr_unlock_bh(dev);
1889		1891
1890	return ret;	1892	return ret;
1891	}	1893	}
@@ -2141,6 +2143,9 @@ static void ipoib_remove_one(struct ib_device device, void client_data) · 249 unmodified lines
2141	ib_unregister_event_handler(&priv->event_handler);	2143	ib_unregister_event_handler(&priv->event_handler);
2142	flush_workqueue(ipoib_workqueue);	2144	flush_workqueue(ipoib_workqueue);
2143		2145
		2146	/* mark interface in the middle of destruction */
		2147	set_bit(IPOIB_FLAG_GOING_DOWN, &priv->flags);
		2148
2144	rtnl_lock();	2149	rtnl_lock();
2145	dev_change_flags(priv->dev, priv->dev->flags & ~IFF_UP);	2150	dev_change_flags(priv->dev, priv->dev->flags & ~IFF_UP);
2146	rtnl_unlock();	2151	rtnl_unlock();

drivers/infiniband/ulp/ipoib/ipoib_multicast.c+3−3

@@ -582,13 +582,13 @@ void ipoib_mcast_join_task(struct work_struct *work) · 581 unmodified lines
582	return;	582	return;
583	}	583	}
584	priv->local_lid = port_attr.lid;	584	priv->local_lid = port_attr.lid;
585	netif_addr_lock(dev);	585	netif_addr_lock_bh(dev);
586		586
587	if (!test_bit(IPOIB_FLAG_DEV_ADDR_SET, &priv->flags)) {	587	if (!test_bit(IPOIB_FLAG_DEV_ADDR_SET, &priv->flags)) {
588	netif_addr_unlock(dev);	588	netif_addr_unlock_bh(dev);
589	return;	589	return;
590	}	590	}
591	netif_addr_unlock(dev);	591	netif_addr_unlock_bh(dev);
592		592
593	spin_lock_irq(&priv->lock);	593	spin_lock_irq(&priv->lock);
594	if (!test_bit(IPOIB_FLAG_OPER_UP, &priv->flags))	594	if (!test_bit(IPOIB_FLAG_OPER_UP, &priv->flags))

drivers/infiniband/ulp/ipoib/ipoib_vlan.c+6−0

 	ppriv = netdev_priv(pdev);
+	if (test_bit(IPOIB_FLAG_GOING_DOWN, &ppriv->flags))
+		return -EPERM;
 	snprintf(intf_name, sizeof intf_name, "%s.%04x",
 		 ppriv->dev->name, pkey);
 	priv = ipoib_intf_alloc(intf_name);
 	ppriv = netdev_priv(pdev);
+	if (test_bit(IPOIB_FLAG_GOING_DOWN, &ppriv->flags))
+		return -EPERM;
 	if (!rtnl_trylock())
 		return restart_syscall();

drivers/infiniband/ulp/srp/ib_srp.c+2−5

 {
 	unsigned int sg_offset = 0;
-	state->desc = req->indirect_desc;
 	state->fr.next = req->fr_list;
 	state->fr.end = req->fr_list + ch->target->mr_per_cmd;
 	state->sg = scat;
 	struct scatterlist *sg;
 	int i;
-	state->desc = req->indirect_desc;
 	for_each_sg(scat, sg, count, i) {
 		srp_map_desc(state, ib_sg_dma_address(dev->dev, sg),
 			     ib_sg_dma_len(dev->dev, sg),
 				   target->indirect_size, DMA_TO_DEVICE);
 	memset(&state, 0, sizeof(state));
+	state.desc = req->indirect_desc;
 	if (dev->use_fast_reg)
 		ret = srp_map_sg_fr(&state, ch, req, scat, count);
 	else if (dev->use_fmr)
 	int mr_page_shift, p;
 	u64 max_pages_per_mr;
-	srp_dev = kmalloc(sizeof *srp_dev, GFP_KERNEL);
+	srp_dev = kzalloc(sizeof(*srp_dev), GFP_KERNEL);
 	if (!srp_dev)
 		return;
 						   IB_ACCESS_REMOTE_WRITE);
 		if (IS_ERR(srp_dev->global_mr))
 			goto err_pd;
-	} else {
-		srp_dev->global_mr = NULL;
 	}
 	for (p = rdma_start_port(device); p <= rdma_end_port(device); ++p) {

drivers/iommu/arm-smmu-v3.c+1−0

@@ -1941,6 +1941,7 @@ static struct iommu_ops arm_smmu_ops = { · 1940 unmodified lines
1941	.attach_dev = arm_smmu_attach_dev,	1941	.attach_dev = arm_smmu_attach_dev,
1942	.map = arm_smmu_map,	1942	.map = arm_smmu_map,
1943	.unmap = arm_smmu_unmap,	1943	.unmap = arm_smmu_unmap,
		1944	.map_sg = default_iommu_map_sg,
1944	.iova_to_phys = arm_smmu_iova_to_phys,	1945	.iova_to_phys = arm_smmu_iova_to_phys,
1945	.add_device = arm_smmu_add_device,	1946	.add_device = arm_smmu_add_device,
1946	.remove_device = arm_smmu_remove_device,	1947	.remove_device = arm_smmu_remove_device,

drivers/iommu/intel-iommu.c+12−5

 			}
 		}
-		iommu_flush_write_buffer(iommu);
-		iommu_set_root_entry(iommu);
-		iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
-		iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
 		if (!ecap_pass_through(iommu->ecap))
 			hw_pass_through = 0;
 #ifdef CONFIG_INTEL_IOMMU_SVM
 #endif
 	}
+	/*
+	 * Now that qi is enabled on all iommus, set the root entry and flush
+	 * caches. This is required on some Intel X58 chipsets, otherwise the
+	 * flush_context function will loop forever and the boot hangs.
+	 */
+	for_each_active_iommu(iommu, drhd) {
+		iommu_flush_write_buffer(iommu);
+		iommu_set_root_entry(iommu);
+		iommu->flush.flush_context(iommu, 0, 0, 0, DMA_CCMD_GLOBAL_INVL);
+		iommu->flush.flush_iotlb(iommu, 0, 0, 0, DMA_TLB_GLOBAL_FLUSH);
+	}
 	if (iommu_pass_through)
 		iommu_identity_mapping |= IDENTMAP_ALL;

drivers/iommu/rockchip-iommu.c+1−1

@@ -815,7 +815,7 @@ static int rk_iommu_attach_device(struct iommu_domain *domain, · 814 unmodified lines
815	dte_addr = virt_to_phys(rk_domain->dt);	815	dte_addr = virt_to_phys(rk_domain->dt);
816	for (i = 0; i < iommu->num_mmu; i++) {	816	for (i = 0; i < iommu->num_mmu; i++) {
817	rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, dte_addr);	817	rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR, dte_addr);
818	rk_iommu_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);	818	rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
819	rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);	819	rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);
820	}	820	}
821		821

drivers/leds/led-core.c+6−3

 	if (!led_cdev->blink_delay_on || !led_cdev->blink_delay_off) {
 		led_set_brightness_nosleep(led_cdev, LED_OFF);
+		led_cdev->flags &= ~LED_BLINK_SW;
 		return;
 	}
 	if (led_cdev->flags & LED_BLINK_ONESHOT_STOP) {
-		led_cdev->flags &= ~LED_BLINK_ONESHOT_STOP;
+		led_cdev->flags &=  ~(LED_BLINK_ONESHOT_STOP | LED_BLINK_SW);
 		return;
 	}
 		return;
 	}
+	led_cdev->flags |= LED_BLINK_SW;
 	mod_timer(&led_cdev->blink_timer, jiffies + 1);
 }
 	del_timer_sync(&led_cdev->blink_timer);
 	led_cdev->blink_delay_on = 0;
 	led_cdev->blink_delay_off = 0;
+	led_cdev->flags &= ~LED_BLINK_SW;
 }
 EXPORT_SYMBOL_GPL(led_stop_software_blink);
 			enum led_brightness brightness)
 {
 	/*
-	 * In case blinking is on delay brightness setting
+	 * If software blink is active, delay brightness setting
 	 * until the next timer tick.
 	 */
-	if (led_cdev->blink_delay_on || led_cdev->blink_delay_off) {
+	if (led_cdev->flags & LED_BLINK_SW) {
 		/*
 		 * If we need to disable soft blinking delegate this to the
 		 * work queue task to avoid problems in case we are called

drivers/leds/trigger/ledtrig-heartbeat.c+31−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/sched.h>	19	#include <linux/sched.h>
20	#include <linux/leds.h>	20	#include <linux/leds.h>
21	#include <linux/reboot.h>	21	#include <linux/reboot.h>
		22	#include <linux/suspend.h>
22	#include "../leds.h"	23	#include "../leds.h"
23		24
24	static int panic_heartbeats;	25	static int panic_heartbeats;
@@ -154,6 +155,30 @@ static struct led_trigger heartbeat_led_trigger = { · 129 unmodified lines
154	.deactivate = heartbeat_trig_deactivate,	155	.deactivate = heartbeat_trig_deactivate,
155	};	156	};
156		157
		158	static int heartbeat_pm_notifier(struct notifier_block *nb,
		159	unsigned long pm_event, void *unused)
		160	{
		161	int rc;
		162
		163	switch (pm_event) {
		164	case PM_SUSPEND_PREPARE:
		165	case PM_HIBERNATION_PREPARE:
		166	case PM_RESTORE_PREPARE:
		167	led_trigger_unregister(&heartbeat_led_trigger);
		168	break;
		169	case PM_POST_SUSPEND:
		170	case PM_POST_HIBERNATION:
		171	case PM_POST_RESTORE:
		172	rc = led_trigger_register(&heartbeat_led_trigger);
		173	if (rc)
		174	pr_err("could not re-register heartbeat trigger\n");
		175	break;
		176	default:
		177	break;
		178	}
		179	return NOTIFY_DONE;
		180	}
		181
157	static int heartbeat_reboot_notifier(struct notifier_block *nb,	182	static int heartbeat_reboot_notifier(struct notifier_block *nb,
158	unsigned long code, void *unused)	183	unsigned long code, void *unused)
159	{	184	{
@@ -168,6 +193,10 @@ static int heartbeat_panic_notifier(struct notifier_block *nb, · 8 unmodified lines
168	return NOTIFY_DONE;	193	return NOTIFY_DONE;
169	}	194	}
170		195
		196	static struct notifier_block heartbeat_pm_nb = {
		197	.notifier_call = heartbeat_pm_notifier,
		198	};
		199
171	static struct notifier_block heartbeat_reboot_nb = {	200	static struct notifier_block heartbeat_reboot_nb = {
172	.notifier_call = heartbeat_reboot_notifier,	201	.notifier_call = heartbeat_reboot_notifier,
173	};	202	};
@@ -184,12 +213,14 @@ static int __init heartbeat_trig_init(void) · 10 unmodified lines
184	atomic_notifier_chain_register(&panic_notifier_list,	213	atomic_notifier_chain_register(&panic_notifier_list,
185	&heartbeat_panic_nb);	214	&heartbeat_panic_nb);
186	register_reboot_notifier(&heartbeat_reboot_nb);	215	register_reboot_notifier(&heartbeat_reboot_nb);
		216	register_pm_notifier(&heartbeat_pm_nb);
187	}	217	}
188	return rc;	218	return rc;
189	}	219	}
190		220
191	static void __exit heartbeat_trig_exit(void)	221	static void __exit heartbeat_trig_exit(void)
192	{	222	{
		223	unregister_pm_notifier(&heartbeat_pm_nb);
193	unregister_reboot_notifier(&heartbeat_reboot_nb);	224	unregister_reboot_notifier(&heartbeat_reboot_nb);
194	atomic_notifier_chain_unregister(&panic_notifier_list,	225	atomic_notifier_chain_unregister(&panic_notifier_list,
195	&heartbeat_panic_nb);	226	&heartbeat_panic_nb);

drivers/mcb/mcb-core.c+16−1

 	struct mcb_driver *mdrv = to_mcb_driver(dev->driver);
 	struct mcb_device *mdev = to_mcb_device(dev);
 	const struct mcb_device_id *found_id;
+	struct module *carrier_mod;
+	int ret;
 	found_id = mcb_match_id(mdrv->id_table, mdev);
 	if (!found_id)
 		return -ENODEV;
-	return mdrv->probe(mdev, found_id);
+	carrier_mod = mdev->dev.parent->driver->owner;
+	if (!try_module_get(carrier_mod))
+		return -EINVAL;
+	get_device(dev);
+	ret = mdrv->probe(mdev, found_id);
+	if (ret)
+		module_put(carrier_mod);
+	return ret;
 }
 static int mcb_remove(struct device *dev)
 {
 	struct mcb_driver *mdrv = to_mcb_driver(dev->driver);
 	struct mcb_device *mdev = to_mcb_device(dev);
+	struct module *carrier_mod;
 	mdrv->remove(mdev);
+	carrier_mod = mdev->dev.parent->driver->owner;
+	module_put(carrier_mod);
 	put_device(&mdev->dev);
 	return 0;

drivers/media/usb/uvc/uvc_v4l2.c+20−77

 static int uvc_v4l2_get_xu_mapping(struct uvc_xu_control_mapping *kp,
 			const struct uvc_xu_control_mapping32 __user *up)
 {
-	struct uvc_menu_info __user *umenus;
-	struct uvc_menu_info __user *kmenus;
 	compat_caddr_t p;
 	if (!access_ok(VERIFY_READ, up, sizeof(*up)) ||
 	if (__get_user(p, &up->menu_info))
 		return -EFAULT;
-	umenus = compat_ptr(p);
+	kp->menu_info = compat_ptr(p);
-	if (!access_ok(VERIFY_READ, umenus, kp->menu_count * sizeof(*umenus)))
-		return -EFAULT;
-	kmenus = compat_alloc_user_space(kp->menu_count * sizeof(*kmenus));
-	if (kmenus == NULL)
-		return -EFAULT;
-	kp->menu_info = kmenus;
-	if (copy_in_user(kmenus, umenus, kp->menu_count * sizeof(*umenus)))
-		return -EFAULT;
 	return 0;
 }
 static int uvc_v4l2_put_xu_mapping(const struct uvc_xu_control_mapping *kp,
 			struct uvc_xu_control_mapping32 __user *up)
 {
-	struct uvc_menu_info __user *umenus;
-	struct uvc_menu_info __user *kmenus = kp->menu_info;
-	compat_caddr_t p;
 	if (!access_ok(VERIFY_WRITE, up, sizeof(*up)) ||
 	    __copy_to_user(up, kp, offsetof(typeof(*up), menu_info)) ||
 	    __put_user(kp->menu_count, &up->menu_count))
 	if (__clear_user(up->reserved, sizeof(up->reserved)))
 		return -EFAULT;
-	if (kp->menu_count == 0)
-		return 0;
-	if (get_user(p, &up->menu_info))
-		return -EFAULT;
-	umenus = compat_ptr(p);
-	if (copy_in_user(umenus, kmenus, kp->menu_count * sizeof(*umenus)))
-		return -EFAULT;
 	return 0;
 }
 static int uvc_v4l2_get_xu_query(struct uvc_xu_control_query *kp,
 			const struct uvc_xu_control_query32 __user *up)
 {
-	u8 __user *udata;
-	u8 __user *kdata;
 	compat_caddr_t p;
 	if (!access_ok(VERIFY_READ, up, sizeof(*up)) ||
 	if (__get_user(p, &up->data))
 		return -EFAULT;
-	udata = compat_ptr(p);
+	kp->data = compat_ptr(p);
-	if (!access_ok(VERIFY_READ, udata, kp->size))
-		return -EFAULT;
-	kdata = compat_alloc_user_space(kp->size);
-	if (kdata == NULL)
-		return -EFAULT;
-	kp->data = kdata;
-	if (copy_in_user(kdata, udata, kp->size))
-		return -EFAULT;
 	return 0;
 }
 static int uvc_v4l2_put_xu_query(const struct uvc_xu_control_query *kp,
 			struct uvc_xu_control_query32 __user *up)
 {
-	u8 __user *udata;
-	u8 __user *kdata = kp->data;
-	compat_caddr_t p;
 	if (!access_ok(VERIFY_WRITE, up, sizeof(*up)) ||
 	    __copy_to_user(up, kp, offsetof(typeof(*up), data)))
 		return -EFAULT;
-	if (kp->size == 0)
-		return 0;
-	if (get_user(p, &up->data))
-		return -EFAULT;
-	udata = compat_ptr(p);
-	if (!access_ok(VERIFY_READ, udata, kp->size))
-		return -EFAULT;
-	if (copy_in_user(udata, kdata, kp->size))
-		return -EFAULT;
 	return 0;
 }
 static long uvc_v4l2_compat_ioctl32(struct file *file,
 		     unsigned int cmd, unsigned long arg)
 {
+	struct uvc_fh *handle = file->private_data;
 	union {
 		struct uvc_xu_control_mapping xmap;
 		struct uvc_xu_control_query xqry;
 	} karg;
 	void __user *up = compat_ptr(arg);
-	mm_segment_t old_fs;
 	long ret;
 	switch (cmd) {
 	case UVCIOC_CTRL_MAP32:
-		cmd = UVCIOC_CTRL_MAP;
 		ret = uvc_v4l2_get_xu_mapping(&karg.xmap, up);
+		if (ret)
+			return ret;
+		ret = uvc_ioctl_ctrl_map(handle->chain, &karg.xmap);
+		if (ret)
+			return ret;
+		ret = uvc_v4l2_put_xu_mapping(&karg.xmap, up);
+		if (ret)
+			return ret;
 		break;
 	case UVCIOC_CTRL_QUERY32:
-		cmd = UVCIOC_CTRL_QUERY;
 		ret = uvc_v4l2_get_xu_query(&karg.xqry, up);
+		if (ret)
+			return ret;
+		ret = uvc_xu_ctrl_query(handle->chain, &karg.xqry);
+		if (ret)
+			return ret;
+		ret = uvc_v4l2_put_xu_query(&karg.xqry, up);
+		if (ret)
+			return ret;
 		break;
 	default:
 		return -ENOIOCTLCMD;
 	}
-	old_fs = get_fs();
-	set_fs(KERNEL_DS);
-	ret = video_ioctl2(file, cmd, (unsigned long)&karg);
-	set_fs(old_fs);
-	if (ret < 0)
-		return ret;
-	switch (cmd) {
-	case UVCIOC_CTRL_MAP:
-		ret = uvc_v4l2_put_xu_mapping(&karg.xmap, up);
-		break;
-	case UVCIOC_CTRL_QUERY:
-		ret = uvc_v4l2_put_xu_query(&karg.xqry, up);
-		break;
-	}
 	return ret;
 }
 #endif

drivers/media/v4l2-core/v4l2-mc.c+1−1

@@ -1,7 +1,7 @@
1	/*	1	/*
2	* Media Controller ancillary functions	2	* Media Controller ancillary functions
3	*	3	*
4	* Copyright (c) 2016 Mauro Carvalho Chehab <mchehab@osg.samsung.com>	4	* Copyright (c) 2016 Mauro Carvalho Chehab <mchehab@kernel.org>
5	* Copyright (C) 2016 Shuah Khan <shuahkh@osg.samsung.com>	5	* Copyright (C) 2016 Shuah Khan <shuahkh@osg.samsung.com>
6	* Copyright (C) 2006-2010 Nokia Corporation	6	* Copyright (C) 2006-2010 Nokia Corporation
7	* Copyright (c) 2016 Intel Corporation.	7	* Copyright (c) 2016 Intel Corporation.

drivers/memory/omap-gpmc.c+1−1

@@ -398,7 +398,7 @@ static void gpmc_cs_bool_timings(int cs, const struct gpmc_bool_timings *p) · 397 unmodified lines
398	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4,	398	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4,
399	GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay);	399	GPMC_CONFIG4_OEEXTRADELAY, p->oe_extra_delay);
400	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4,	400	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG4,
401	GPMC_CONFIG4_OEEXTRADELAY, p->we_extra_delay);	401	GPMC_CONFIG4_WEEXTRADELAY, p->we_extra_delay);
402	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6,	402	gpmc_cs_modify_reg(cs, GPMC_CS_CONFIG6,
403	GPMC_CONFIG6_CYCLE2CYCLESAMECSEN,	403	GPMC_CONFIG6_CYCLE2CYCLESAMECSEN,
404	p->cycle2cyclesamecsen);	404	p->cycle2cyclesamecsen);

drivers/misc/mei/client.c+1−1

@@ -730,7 +730,7 @@ static void mei_cl_wake_all(struct mei_cl *cl) · 729 unmodified lines
730	/* synchronized under device mutex */	730	/* synchronized under device mutex */
731	if (waitqueue_active(&cl->wait)) {	731	if (waitqueue_active(&cl->wait)) {
732	cl_dbg(dev, cl, "Waking up ctrl write clients!\n");	732	cl_dbg(dev, cl, "Waking up ctrl write clients!\n");
733	wake_up_interruptible(&cl->wait);	733	wake_up(&cl->wait);
734	}	734	}
735	}	735	}
736		736

drivers/mtd/ubi/build.c+9−2

  */
 static struct mtd_info * __init open_mtd_by_chdev(const char *mtd_dev)
 {
-	struct kstat stat;
 	int err, minor;
+	struct path path;
+	struct kstat stat;
 	/* Probably this is an MTD character device node path */
-	err = vfs_stat(mtd_dev, &stat);
+	err = kern_path(mtd_dev, LOOKUP_FOLLOW, &path);
+	if (err)
+		return ERR_PTR(err);
+	err = vfs_getattr(&path, &stat);
+	path_put(&path);
 	if (err)
 		return ERR_PTR(err);
 		return ERR_PTR(-EINVAL);
 	minor = MINOR(stat.rdev);
 	if (minor & 1)
 		/*
 		 * Just do not think the "/dev/mtdrX" devices support is need,

drivers/mtd/ubi/kapi.c+7−1

 struct ubi_volume_desc *ubi_open_volume_path(const char *pathname, int mode)
 {
 	int error, ubi_num, vol_id;
+	struct path path;
 	struct kstat stat;
 	dbg_gen("open volume %s, mode %d", pathname, mode);
 	if (!pathname || !*pathname)
 		return ERR_PTR(-EINVAL);
-	error = vfs_stat(pathname, &stat);
+	error = kern_path(pathname, LOOKUP_FOLLOW, &path);
+	if (error)
+		return ERR_PTR(error);
+	error = vfs_getattr(&path, &stat);
+	path_put(&path);
 	if (error)
 		return ERR_PTR(error);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+62−89

@@ -12895,52 +12895,71 @@ static int __bnx2x_vlan_configure_vid(struct bnx2x *bp, u16 vid, bool add) · 12894 unmodified lines
12895	return rc;	12895	return rc;
12896	}	12896	}
12897		12897
12898	int bnx2x_vlan_reconfigure_vid(struct bnx2x *bp)	12898	static int bnx2x_vlan_configure_vid_list(struct bnx2x *bp)
12899	{	12899	{
12900	struct bnx2x_vlan_entry *vlan;	12900	struct bnx2x_vlan_entry *vlan;
12901	int rc = 0;	12901	int rc = 0;
12902		12902
12903	if (!bp->vlan_cnt) {	12903	/* Configure all non-configured entries */
12904	DP(NETIF_MSG_IFUP, "No need to re-configure vlan filters\n");
12905	return 0;
12906	}
12907
12908	list_for_each_entry(vlan, &bp->vlan_reg, link) {	12904	list_for_each_entry(vlan, &bp->vlan_reg, link) {
12909	/* Prepare for cleanup in case of errors */	12905	if (vlan->hw)
12910	if (rc) {
12911	vlan->hw = false;
12912	continue;
12913	}
12914
12915	if (!vlan->hw)
12916	continue;	12906	continue;
12917		12907
12918	DP(NETIF_MSG_IFUP, "Re-configuring vlan 0x%04x\n", vlan->vid);	12908	if (bp->vlan_cnt >= bp->vlan_credit)
		12909	return -ENOBUFS;
12919		12910
12920	rc = __bnx2x_vlan_configure_vid(bp, vlan->vid, true);	12911	rc = __bnx2x_vlan_configure_vid(bp, vlan->vid, true);
12921	if (rc) {	12912	if (rc) {
12922	BNX2X_ERR("Unable to configure VLAN %d\n", vlan->vid);	12913	BNX2X_ERR("Unable to config VLAN %d\n", vlan->vid);
12923	vlan->hw = false;	12914	return rc;
12924	rc = -EINVAL;
12925	continue;
12926	}	12915	}
		12916
		12917	DP(NETIF_MSG_IFUP, "HW configured for VLAN %d\n", vlan->vid);
		12918	vlan->hw = true;
		12919	bp->vlan_cnt++;
12927	}	12920	}
12928		12921
12929	return rc;	12922	return 0;
		12923	}
		12924
		12925	static void bnx2x_vlan_configure(struct bnx2x *bp, bool set_rx_mode)
		12926	{
		12927	bool need_accept_any_vlan;
		12928
		12929	need_accept_any_vlan = !!bnx2x_vlan_configure_vid_list(bp);
		12930
		12931	if (bp->accept_any_vlan != need_accept_any_vlan) {
		12932	bp->accept_any_vlan = need_accept_any_vlan;
		12933	DP(NETIF_MSG_IFUP, "Accept all VLAN %s\n",
		12934	bp->accept_any_vlan ? "raised" : "cleared");
		12935	if (set_rx_mode) {
		12936	if (IS_PF(bp))
		12937	bnx2x_set_rx_mode_inner(bp);
		12938	else
		12939	bnx2x_vfpf_storm_rx_mode(bp);
		12940	}
		12941	}
		12942	}
		12943
		12944	int bnx2x_vlan_reconfigure_vid(struct bnx2x *bp)
		12945	{
		12946	struct bnx2x_vlan_entry *vlan;
		12947
		12948	/* The hw forgot all entries after reload */
		12949	list_for_each_entry(vlan, &bp->vlan_reg, link)
		12950	vlan->hw = false;
		12951	bp->vlan_cnt = 0;
		12952
		12953	/* Don't set rx mode here. Our caller will do it. */
		12954	bnx2x_vlan_configure(bp, false);
		12955
		12956	return 0;
12930	}	12957	}
12931		12958
12932	static int bnx2x_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)	12959	static int bnx2x_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
12933	{	12960	{
12934	struct bnx2x *bp = netdev_priv(dev);	12961	struct bnx2x *bp = netdev_priv(dev);
12935	struct bnx2x_vlan_entry *vlan;	12962	struct bnx2x_vlan_entry *vlan;
12936	bool hw = false;
12937	int rc = 0;
12938
12939	if (!netif_running(bp->dev)) {
12940	DP(NETIF_MSG_IFUP,
12941	"Ignoring VLAN configuration the interface is down\n");
12942	return -EFAULT;
12943	}
12944		12963
12945	DP(NETIF_MSG_IFUP, "Adding VLAN %d\n", vid);	12964	DP(NETIF_MSG_IFUP, "Adding VLAN %d\n", vid);
12946		12965
@@ -12948,93 +12967,47 @@ static int bnx2x_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid) · 1 unmodified line
12948	if (!vlan)	12967	if (!vlan)
12949	return -ENOMEM;	12968	return -ENOMEM;
12950		12969
12951	bp->vlan_cnt++;
12952	if (bp->vlan_cnt > bp->vlan_credit && !bp->accept_any_vlan) {
12953	DP(NETIF_MSG_IFUP, "Accept all VLAN raised\n");
12954	bp->accept_any_vlan = true;
12955	if (IS_PF(bp))
12956	bnx2x_set_rx_mode_inner(bp);
12957	else
12958	bnx2x_vfpf_storm_rx_mode(bp);
12959	} else if (bp->vlan_cnt <= bp->vlan_credit) {
12960	rc = __bnx2x_vlan_configure_vid(bp, vid, true);
12961	hw = true;
12962	}
12963
12964	vlan->vid = vid;	12970	vlan->vid = vid;
12965	vlan->hw = hw;	12971	vlan->hw = false;
		12972	list_add_tail(&vlan->link, &bp->vlan_reg);
12966		12973
12967	if (!rc) {	12974	if (netif_running(dev))
12968	list_add(&vlan->link, &bp->vlan_reg);	12975	bnx2x_vlan_configure(bp, true);
12969	} else {
12970	bp->vlan_cnt--;
12971	kfree(vlan);
12972	}
12973
12974	DP(NETIF_MSG_IFUP, "Adding VLAN result %d\n", rc);
12975		12976
12976	return rc;	12977	return 0;
12977	}	12978	}
12978		12979
12979	static int bnx2x_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)	12980	static int bnx2x_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
12980	{	12981	{
12981	struct bnx2x *bp = netdev_priv(dev);	12982	struct bnx2x *bp = netdev_priv(dev);
12982	struct bnx2x_vlan_entry *vlan;	12983	struct bnx2x_vlan_entry *vlan;
		12984	bool found = false;
12983	int rc = 0;	12985	int rc = 0;
12984		12986
12985	if (!netif_running(bp->dev)) {
12986	DP(NETIF_MSG_IFUP,
12987	"Ignoring VLAN configuration the interface is down\n");
12988	return -EFAULT;
12989	}
12990
12991	DP(NETIF_MSG_IFUP, "Removing VLAN %d\n", vid);	12987	DP(NETIF_MSG_IFUP, "Removing VLAN %d\n", vid);
12992		12988
12993	if (!bp->vlan_cnt) {
12994	BNX2X_ERR("Unable to kill VLAN %d\n", vid);
12995	return -EINVAL;
12996	}
12997
12998	list_for_each_entry(vlan, &bp->vlan_reg, link)	12989	list_for_each_entry(vlan, &bp->vlan_reg, link)
12999	if (vlan->vid == vid)	12990	if (vlan->vid == vid) {
		12991	found = true;
13000	break;	12992	break;
		12993	}
13001		12994
13002	if (vlan->vid != vid) {	12995	if (!found) {
13003	BNX2X_ERR("Unable to kill VLAN %d - not found\n", vid);	12996	BNX2X_ERR("Unable to kill VLAN %d - not found\n", vid);
13004	return -EINVAL;	12997	return -EINVAL;
13005	}	12998	}
13006		12999
13007	if (vlan->hw)	13000	if (netif_running(dev) && vlan->hw) {
13008	rc = __bnx2x_vlan_configure_vid(bp, vid, false);	13001	rc = __bnx2x_vlan_configure_vid(bp, vid, false);
		13002	DP(NETIF_MSG_IFUP, "HW deconfigured for VLAN %d\n", vid);
		13003	bp->vlan_cnt--;
		13004	}
13009		13005
13010	list_del(&vlan->link);	13006	list_del(&vlan->link);
13011	kfree(vlan);	13007	kfree(vlan);
13012		13008
13013	bp->vlan_cnt--;	13009	if (netif_running(dev))
13014		13010	bnx2x_vlan_configure(bp, true);
13015	if (bp->vlan_cnt <= bp->vlan_credit && bp->accept_any_vlan) {
13016	/* Configure all non-configured entries */
13017	list_for_each_entry(vlan, &bp->vlan_reg, link) {
13018	if (vlan->hw)
13019	continue;
13020
13021	rc = __bnx2x_vlan_configure_vid(bp, vlan->vid, true);
13022	if (rc) {
13023	BNX2X_ERR("Unable to config VLAN %d\n",
13024	vlan->vid);
13025	continue;
13026	}
13027	DP(NETIF_MSG_IFUP, "HW configured for VLAN %d\n",
13028	vlan->vid);
13029	vlan->hw = true;
13030	}
13031	DP(NETIF_MSG_IFUP, "Accept all VLAN Removed\n");
13032	bp->accept_any_vlan = false;
13033	if (IS_PF(bp))
13034	bnx2x_set_rx_mode_inner(bp);
13035	else
13036	bnx2x_vfpf_storm_rx_mode(bp);
13037	}
13038		13011
13039	DP(NETIF_MSG_IFUP, "Removing VLAN result %d\n", rc);	13012	DP(NETIF_MSG_IFUP, "Removing VLAN result %d\n", rc);
13040		13013

drivers/net/ethernet/broadcom/bnxt/bnxt.c+25−21

 			cpu_to_le32(DB_KEY_TX_PUSH | DB_LONG_TX_PUSH | prod);
 		txr->tx_prod = prod;
+		tx_buf->is_push = 1;
 		netdev_tx_sent_queue(txq, skb->len);
+		wmb();	/* Sync is_push and byte queue before pushing data */
 		push_len = (length + sizeof(*tx_push) + 7) / 8;
 		if (push_len > 16) {
 					 push_len);
 		}
-		tx_buf->is_push = 1;
 		goto tx_done;
 	}
 	if (tpa_info->hash_type != PKT_HASH_TYPE_NONE)
 		skb_set_hash(skb, tpa_info->rss_hash, tpa_info->hash_type);
-	if (tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) {
+	if ((tpa_info->flags2 & RX_CMP_FLAGS2_META_FORMAT_VLAN) &&
-		netdev_features_t features = skb->dev->features;
+	    (skb->dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
 		u16 vlan_proto = tpa_info->metadata >>
 			RX_CMP_FLAGS2_METADATA_TPID_SFT;
+		u16 vtag = tpa_info->metadata & RX_CMP_FLAGS2_METADATA_VID_MASK;
-		if (((features & NETIF_F_HW_VLAN_CTAG_RX) &&
+		__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
-		     vlan_proto == ETH_P_8021Q) ||
-		    ((features & NETIF_F_HW_VLAN_STAG_RX) &&
-		     vlan_proto == ETH_P_8021AD)) {
-			__vlan_hwaccel_put_tag(skb, htons(vlan_proto),
-					       tpa_info->metadata &
-					       RX_CMP_FLAGS2_METADATA_VID_MASK);
-		}
 	}
 	skb_checksum_none_assert(skb);
 	skb->protocol = eth_type_trans(skb, dev);
-	if (rxcmp1->rx_cmp_flags2 &
+	if ((rxcmp1->rx_cmp_flags2 &
-	    cpu_to_le32(RX_CMP_FLAGS2_META_FORMAT_VLAN)) {
+	     cpu_to_le32(RX_CMP_FLAGS2_META_FORMAT_VLAN)) &&
-		netdev_features_t features = skb->dev->features;
+	    (skb->dev->features & NETIF_F_HW_VLAN_CTAG_RX)) {
 		u32 meta_data = le32_to_cpu(rxcmp1->rx_cmp_meta_data);
+		u16 vtag = meta_data & RX_CMP_FLAGS2_METADATA_VID_MASK;
 		u16 vlan_proto = meta_data >> RX_CMP_FLAGS2_METADATA_TPID_SFT;
-		if (((features & NETIF_F_HW_VLAN_CTAG_RX) &&
+		__vlan_hwaccel_put_tag(skb, htons(vlan_proto), vtag);
-		     vlan_proto == ETH_P_8021Q) ||
-		    ((features & NETIF_F_HW_VLAN_STAG_RX) &&
-		     vlan_proto == ETH_P_8021AD))
-			__vlan_hwaccel_put_tag(skb, htons(vlan_proto),
-					       meta_data &
-					       RX_CMP_FLAGS2_METADATA_VID_MASK);
 	}
 	skb_checksum_none_assert(skb);
 	if (!bnxt_rfs_capable(bp))
 		features &= ~NETIF_F_NTUPLE;
+	/* Both CTAG and STAG VLAN accelaration on the RX side have to be
+	 * turned on or off together.
+	 */
+	if ((features & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) !=
+	    (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_STAG_RX)) {
+		if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
+			features &= ~(NETIF_F_HW_VLAN_CTAG_RX |
+				      NETIF_F_HW_VLAN_STAG_RX);
+		else
+			features |= NETIF_F_HW_VLAN_CTAG_RX |
+				    NETIF_F_HW_VLAN_STAG_RX;
+	}
 	return features;
 }

drivers/net/ethernet/chelsio/cxgb4/t4_pci_id_tbl.h+1−0

@@ -144,6 +144,7 @@ CH_PCI_DEVICE_ID_TABLE_DEFINE_BEGIN · 143 unmodified lines
144	CH_PCI_ID_TABLE_FENTRY(0x5015), /* T502-bt */	144	CH_PCI_ID_TABLE_FENTRY(0x5015), /* T502-bt */
145	CH_PCI_ID_TABLE_FENTRY(0x5016), /* T580-OCP-SO */	145	CH_PCI_ID_TABLE_FENTRY(0x5016), /* T580-OCP-SO */
146	CH_PCI_ID_TABLE_FENTRY(0x5017), /* T520-OCP-SO */	146	CH_PCI_ID_TABLE_FENTRY(0x5017), /* T520-OCP-SO */
		147	CH_PCI_ID_TABLE_FENTRY(0x5018), /* T540-BT */
147	CH_PCI_ID_TABLE_FENTRY(0x5080), /* Custom T540-cr */	148	CH_PCI_ID_TABLE_FENTRY(0x5080), /* Custom T540-cr */
148	CH_PCI_ID_TABLE_FENTRY(0x5081), /* Custom T540-LL-cr */	149	CH_PCI_ID_TABLE_FENTRY(0x5081), /* Custom T540-LL-cr */
149	CH_PCI_ID_TABLE_FENTRY(0x5082), /* Custom T504-cr */	150	CH_PCI_ID_TABLE_FENTRY(0x5082), /* Custom T504-cr */

drivers/net/ethernet/ethoc.c+4−3

 	priv->mdio = mdiobus_alloc();
 	if (!priv->mdio) {
 		ret = -ENOMEM;
-		goto free;
+		goto free2;
 	}
 	priv->mdio->name = "ethoc-mdio";
 	ret = mdiobus_register(priv->mdio);
 	if (ret) {
 		dev_err(&netdev->dev, "failed to register MDIO bus\n");
-		goto free;
+		goto free2;
 	}
 	ret = ethoc_mdio_probe(netdev);
 error:
 	mdiobus_unregister(priv->mdio);
 	mdiobus_free(priv->mdio);
-free:
+free2:
 	if (priv->clk)
 		clk_disable_unprepare(priv->clk);
+free:
 	free_netdev(netdev);
 out:
 	return ret;

drivers/net/ethernet/freescale/fec_main.c+4−4

@@ -2416,24 +2416,24 @@ fec_enet_set_coalesce(struct net_device ndev, struct ethtool_coalesce ec) · 2415 unmodified lines
2416	return -EOPNOTSUPP;	2416	return -EOPNOTSUPP;
2417		2417
2418	if (ec->rx_max_coalesced_frames > 255) {	2418	if (ec->rx_max_coalesced_frames > 255) {
2419	pr_err("Rx coalesced frames exceed hardware limiation");	2419	pr_err("Rx coalesced frames exceed hardware limitation\n");
2420	return -EINVAL;	2420	return -EINVAL;
2421	}	2421	}
2422		2422
2423	if (ec->tx_max_coalesced_frames > 255) {	2423	if (ec->tx_max_coalesced_frames > 255) {
2424	pr_err("Tx coalesced frame exceed hardware limiation");	2424	pr_err("Tx coalesced frame exceed hardware limitation\n");
2425	return -EINVAL;	2425	return -EINVAL;
2426	}	2426	}
2427		2427
2428	cycle = fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr);	2428	cycle = fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr);
2429	if (cycle > 0xFFFF) {	2429	if (cycle > 0xFFFF) {
2430	pr_err("Rx coalesed usec exceeed hardware limiation");	2430	pr_err("Rx coalesced usec exceed hardware limitation\n");
2431	return -EINVAL;	2431	return -EINVAL;
2432	}	2432	}
2433		2433
2434	cycle = fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr);	2434	cycle = fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr);
2435	if (cycle > 0xFFFF) {	2435	if (cycle > 0xFFFF) {
2436	pr_err("Rx coalesed usec exceeed hardware limiation");	2436	pr_err("Rx coalesced usec exceed hardware limitation\n");
2437	return -EINVAL;	2437	return -EINVAL;
2438	}	2438	}
2439		2439

drivers/net/ethernet/freescale/gianfar.c+2−1

@@ -2440,7 +2440,8 @@ static int gfar_start_xmit(struct sk_buff skb, struct net_device dev) · 2439 unmodified lines
2440	tx_queue->tx_ring_size);	2440	tx_queue->tx_ring_size);
2441		2441
2442	if (likely(!nr_frags)) {	2442	if (likely(!nr_frags)) {
2443	lstatus \|= BD_LFLAG(TXBD_LAST \| TXBD_INTERRUPT);	2443	if (likely(!do_tstamp))
		2444	lstatus \|= BD_LFLAG(TXBD_LAST \| TXBD_INTERRUPT);
2444	} else {	2445	} else {
2445	u32 lstatus_start = lstatus;	2446	u32 lstatus_start = lstatus;
2446		2447

drivers/net/ethernet/mediatek/mtk_eth_soc.c+34−6

 static void mtk_phy_link_adjust(struct net_device *dev)
 {
 	struct mtk_mac *mac = netdev_priv(dev);
+	u16 lcl_adv = 0, rmt_adv = 0;
+	u8 flowctrl;
 	u32 mcr = MAC_MCR_MAX_RX_1536 | MAC_MCR_IPG_CFG |
 		  MAC_MCR_FORCE_MODE | MAC_MCR_TX_EN |
 		  MAC_MCR_RX_EN | MAC_MCR_BACKOFF_EN |
 	if (mac->phy_dev->link)
 		mcr |= MAC_MCR_FORCE_LINK;
-	if (mac->phy_dev->duplex)
+	if (mac->phy_dev->duplex) {
 		mcr |= MAC_MCR_FORCE_DPX;
-	if (mac->phy_dev->pause)
+		if (mac->phy_dev->pause)
-		mcr |= MAC_MCR_FORCE_RX_FC | MAC_MCR_FORCE_TX_FC;
+			rmt_adv = LPA_PAUSE_CAP;
+		if (mac->phy_dev->asym_pause)
+			rmt_adv |= LPA_PAUSE_ASYM;
+		if (mac->phy_dev->advertising & ADVERTISED_Pause)
+			lcl_adv |= ADVERTISE_PAUSE_CAP;
+		if (mac->phy_dev->advertising & ADVERTISED_Asym_Pause)
+			lcl_adv |= ADVERTISE_PAUSE_ASYM;
+		flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv);
+		if (flowctrl & FLOW_CTRL_TX)
+			mcr |= MAC_MCR_FORCE_TX_FC;
+		if (flowctrl & FLOW_CTRL_RX)
+			mcr |= MAC_MCR_FORCE_RX_FC;
+		netif_dbg(mac->hw, link, dev, "rx pause %s, tx pause %s\n",
+			  flowctrl & FLOW_CTRL_RX ? "enabled" : "disabled",
+			  flowctrl & FLOW_CTRL_TX ? "enabled" : "disabled");
+	}
 	mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
 	u32 val, ge_mode;
 	np = of_parse_phandle(mac->of_node, "phy-handle", 0);
+	if (!np && of_phy_is_fixed_link(mac->of_node))
+		if (!of_phy_register_fixed_link(mac->of_node))
+			np = of_node_get(mac->of_node);
 	if (!np)
 		return -ENODEV;
 	switch (of_get_phy_mode(np)) {
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII:
 		ge_mode = 0;
 		break;
 	mac->phy_dev->autoneg = AUTONEG_ENABLE;
 	mac->phy_dev->speed = 0;
 	mac->phy_dev->duplex = 0;
-	mac->phy_dev->supported &= PHY_BASIC_FEATURES;
+	mac->phy_dev->supported &= PHY_GBIT_FEATURES | SUPPORTED_Pause |
+				   SUPPORTED_Asym_Pause;
 	mac->phy_dev->advertising = mac->phy_dev->supported |
 				    ADVERTISED_Autoneg;
 	phy_start_aneg(mac->phy_dev);
 	return 0;
 err_free_bus:
-	kfree(eth->mii_bus);
+	mdiobus_free(eth->mii_bus);
 err_put_node:
 	of_node_put(mii_np);
 	mdiobus_unregister(eth->mii_bus);
 	of_node_put(eth->mii_bus->dev.of_node);
-	kfree(eth->mii_bus);
+	mdiobus_free(eth->mii_bus);
 }
 static inline void mtk_irq_disable(struct mtk_eth *eth, u32 mask)

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+1−4

 	flush_workqueue(priv->wq);
 	if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
 		netif_device_detach(netdev);
-		mutex_lock(&priv->state_lock);
+		mlx5e_close(netdev);
-		if (test_bit(MLX5E_STATE_OPENED, &priv->state))
-			mlx5e_close_locked(netdev);
-		mutex_unlock(&priv->state_lock);
 	} else {
 		unregister_netdev(netdev);
 	}

drivers/net/ethernet/mellanox/mlx5/core/en_tx.c+2−1

@@ -317,7 +317,8 @@ static netdev_tx_t mlx5e_sq_xmit(struct mlx5e_sq sq, struct sk_buff skb) · 316 unmodified lines
317	while ((sq->pc & wq->sz_m1) > sq->edge)	317	while ((sq->pc & wq->sz_m1) > sq->edge)
318	mlx5e_send_nop(sq, false);	318	mlx5e_send_nop(sq, false);
319		319
320	sq->bf_budget = bf ? sq->bf_budget - 1 : 0;	320	if (bf)
		321	sq->bf_budget--;
321		322
322	sq->stats.packets++;	323	sq->stats.packets++;
323	sq->stats.bytes += num_bytes;	324	sq->stats.bytes += num_bytes;

drivers/net/ethernet/mellanox/mlx5/core/eswitch.c+43−26

@@ -383,7 +383,7 @@ __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u32 vport, bool rx_rule, · 382 unmodified lines
383	match_v,	383	match_v,
384	MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,	384	MLX5_FLOW_CONTEXT_ACTION_FWD_DEST,
385	0, &dest);	385	0, &dest);
386	if (IS_ERR_OR_NULL(flow_rule)) {	386	if (IS_ERR(flow_rule)) {
387	pr_warn(	387	pr_warn(
388	"FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",	388	"FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%ld)\n",
389	dmac_v, dmac_c, vport, PTR_ERR(flow_rule));	389	dmac_v, dmac_c, vport, PTR_ERR(flow_rule));
@@ -457,7 +457,7 @@ static int esw_create_fdb_table(struct mlx5_eswitch *esw, int nvports) · 67 unmodified lines
457		457
458	table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));	458	table_size = BIT(MLX5_CAP_ESW_FLOWTABLE_FDB(dev, log_max_ft_size));
459	fdb = mlx5_create_flow_table(root_ns, 0, table_size, 0);	459	fdb = mlx5_create_flow_table(root_ns, 0, table_size, 0);
460	if (IS_ERR_OR_NULL(fdb)) {	460	if (IS_ERR(fdb)) {
461	err = PTR_ERR(fdb);	461	err = PTR_ERR(fdb);
462	esw_warn(dev, "Failed to create FDB Table err %d\n", err);	462	esw_warn(dev, "Failed to create FDB Table err %d\n", err);
463	goto out;	463	goto out;
@@ -474,7 +474,7 @@ static int esw_create_fdb_table(struct mlx5_eswitch *esw, int nvports) · 10 unmodified lines
474	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);	474	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 3);
475	eth_broadcast_addr(dmac);	475	eth_broadcast_addr(dmac);
476	g = mlx5_create_flow_group(fdb, flow_group_in);	476	g = mlx5_create_flow_group(fdb, flow_group_in);
477	if (IS_ERR_OR_NULL(g)) {	477	if (IS_ERR(g)) {
478	err = PTR_ERR(g);	478	err = PTR_ERR(g);
479	esw_warn(dev, "Failed to create flow group err(%d)\n", err);	479	esw_warn(dev, "Failed to create flow group err(%d)\n", err);
480	goto out;	480	goto out;
@@ -489,7 +489,7 @@ static int esw_create_fdb_table(struct mlx5_eswitch *esw, int nvports) · 8 unmodified lines
489	eth_zero_addr(dmac);	489	eth_zero_addr(dmac);
490	dmac[0] = 0x01;	490	dmac[0] = 0x01;
491	g = mlx5_create_flow_group(fdb, flow_group_in);	491	g = mlx5_create_flow_group(fdb, flow_group_in);
492	if (IS_ERR_OR_NULL(g)) {	492	if (IS_ERR(g)) {
493	err = PTR_ERR(g);	493	err = PTR_ERR(g);
494	esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);	494	esw_warn(dev, "Failed to create allmulti flow group err(%d)\n", err);
495	goto out;	495	goto out;
@@ -506,7 +506,7 @@ static int esw_create_fdb_table(struct mlx5_eswitch *esw, int nvports) · 10 unmodified lines
506	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);	506	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, table_size - 1);
507	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);	507	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, table_size - 1);
508	g = mlx5_create_flow_group(fdb, flow_group_in);	508	g = mlx5_create_flow_group(fdb, flow_group_in);
509	if (IS_ERR_OR_NULL(g)) {	509	if (IS_ERR(g)) {
510	err = PTR_ERR(g);	510	err = PTR_ERR(g);
511	esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);	511	esw_warn(dev, "Failed to create promisc flow group err(%d)\n", err);
512	goto out;	512	goto out;
@@ -529,7 +529,7 @@ out: · 16 unmodified lines
529	}	529	}
530	}	530	}
531		531
532	kfree(flow_group_in);	532	kvfree(flow_group_in);
533	return err;	533	return err;
534	}	534	}
535		535
@@ -651,6 +651,7 @@ static void update_allmulti_vports(struct mlx5_eswitch *esw, · 115 unmodified lines
651	esw_fdb_set_vport_rule(esw,	651	esw_fdb_set_vport_rule(esw,
652	mac,	652	mac,
653	vport_idx);	653	vport_idx);
		654	iter_vaddr->mc_promisc = true;
654	break;	655	break;
655	case MLX5_ACTION_DEL:	656	case MLX5_ACTION_DEL:
656	if (!iter_vaddr)	657	if (!iter_vaddr)
@@ -1060,7 +1061,7 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch *esw, · 403 unmodified lines
1060	return;	1061	return;
1061		1062
1062	acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);	1063	acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1063	if (IS_ERR_OR_NULL(acl)) {	1064	if (IS_ERR(acl)) {
1064	err = PTR_ERR(acl);	1065	err = PTR_ERR(acl);
1065	esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",	1066	esw_warn(dev, "Failed to create E-Switch vport[%d] egress flow Table, err(%d)\n",
1066	vport->vport, err);	1067	vport->vport, err);
@@ -1075,7 +1076,7 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch *esw, · 8 unmodified lines
1075	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);	1076	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1076		1077
1077	vlan_grp = mlx5_create_flow_group(acl, flow_group_in);	1078	vlan_grp = mlx5_create_flow_group(acl, flow_group_in);
1078	if (IS_ERR_OR_NULL(vlan_grp)) {	1079	if (IS_ERR(vlan_grp)) {
1079	err = PTR_ERR(vlan_grp);	1080	err = PTR_ERR(vlan_grp);
1080	esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",	1081	esw_warn(dev, "Failed to create E-Switch vport[%d] egress allowed vlans flow group, err(%d)\n",
1081	vport->vport, err);	1082	vport->vport, err);
@@ -1086,7 +1087,7 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch *esw, · 4 unmodified lines
1086	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);	1087	MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, 1);
1087	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);	1088	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1088	drop_grp = mlx5_create_flow_group(acl, flow_group_in);	1089	drop_grp = mlx5_create_flow_group(acl, flow_group_in);
1089	if (IS_ERR_OR_NULL(drop_grp)) {	1090	if (IS_ERR(drop_grp)) {
1090	err = PTR_ERR(drop_grp);	1091	err = PTR_ERR(drop_grp);
1091	esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",	1092	esw_warn(dev, "Failed to create E-Switch vport[%d] egress drop flow group, err(%d)\n",
1092	vport->vport, err);	1093	vport->vport, err);
@@ -1097,7 +1098,7 @@ static void esw_vport_enable_egress_acl(struct mlx5_eswitch *esw, · 4 unmodified lines
1097	vport->egress.drop_grp = drop_grp;	1098	vport->egress.drop_grp = drop_grp;
1098	vport->egress.allowed_vlans_grp = vlan_grp;	1099	vport->egress.allowed_vlans_grp = vlan_grp;
1099	out:	1100	out:
1100	kfree(flow_group_in);	1101	kvfree(flow_group_in);
1101	if (err && !IS_ERR_OR_NULL(vlan_grp))	1102	if (err && !IS_ERR_OR_NULL(vlan_grp))
1102	mlx5_destroy_flow_group(vlan_grp);	1103	mlx5_destroy_flow_group(vlan_grp);
1103	if (err && !IS_ERR_OR_NULL(acl))	1104	if (err && !IS_ERR_OR_NULL(acl))
@@ -1174,7 +1175,7 @@ static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw, · 70 unmodified lines
1174	return;	1175	return;
1175		1176
1176	acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);	1177	acl = mlx5_create_vport_flow_table(root_ns, 0, table_size, 0, vport->vport);
1177	if (IS_ERR_OR_NULL(acl)) {	1178	if (IS_ERR(acl)) {
1178	err = PTR_ERR(acl);	1179	err = PTR_ERR(acl);
1179	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",	1180	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress flow Table, err(%d)\n",
1180	vport->vport, err);	1181	vport->vport, err);
@@ -1192,7 +1193,7 @@ static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw, · 11 unmodified lines
1192	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);	1193	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 0);
1193		1194
1194	g = mlx5_create_flow_group(acl, flow_group_in);	1195	g = mlx5_create_flow_group(acl, flow_group_in);
1195	if (IS_ERR_OR_NULL(g)) {	1196	if (IS_ERR(g)) {
1196	err = PTR_ERR(g);	1197	err = PTR_ERR(g);
1197	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",	1198	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged spoofchk flow group, err(%d)\n",
1198	vport->vport, err);	1199	vport->vport, err);
@@ -1207,7 +1208,7 @@ static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw, · 8 unmodified lines
1207	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);	1208	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 1);
1208		1209
1209	g = mlx5_create_flow_group(acl, flow_group_in);	1210	g = mlx5_create_flow_group(acl, flow_group_in);
1210	if (IS_ERR_OR_NULL(g)) {	1211	if (IS_ERR(g)) {
1211	err = PTR_ERR(g);	1212	err = PTR_ERR(g);
1212	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",	1213	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress untagged flow group, err(%d)\n",
1213	vport->vport, err);	1214	vport->vport, err);
@@ -1223,7 +1224,7 @@ static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw, · 9 unmodified lines
1223	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);	1224	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 2);
1224		1225
1225	g = mlx5_create_flow_group(acl, flow_group_in);	1226	g = mlx5_create_flow_group(acl, flow_group_in);
1226	if (IS_ERR_OR_NULL(g)) {	1227	if (IS_ERR(g)) {
1227	err = PTR_ERR(g);	1228	err = PTR_ERR(g);
1228	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",	1229	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress spoofchk flow group, err(%d)\n",
1229	vport->vport, err);	1230	vport->vport, err);
@@ -1236,7 +1237,7 @@ static void esw_vport_enable_ingress_acl(struct mlx5_eswitch *esw, · 6 unmodified lines
1236	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);	1237	MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index, 3);
1237		1238
1238	g = mlx5_create_flow_group(acl, flow_group_in);	1239	g = mlx5_create_flow_group(acl, flow_group_in);
1239	if (IS_ERR_OR_NULL(g)) {	1240	if (IS_ERR(g)) {
1240	err = PTR_ERR(g);	1241	err = PTR_ERR(g);
1241	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",	1242	esw_warn(dev, "Failed to create E-Switch vport[%d] ingress drop flow group, err(%d)\n",
1242	vport->vport, err);	1243	vport->vport, err);
@@ -1259,7 +1260,7 @@ out: · 16 unmodified lines
1259	mlx5_destroy_flow_table(vport->ingress.acl);	1260	mlx5_destroy_flow_table(vport->ingress.acl);
1260	}	1261	}
1261		1262
1262	kfree(flow_group_in);	1263	kvfree(flow_group_in);
1263	}	1264	}
1264		1265
1265	static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,	1266	static void esw_vport_cleanup_ingress_rules(struct mlx5_eswitch *esw,
@@ -1363,7 +1364,7 @@ static int esw_vport_ingress_config(struct mlx5_eswitch *esw, · 97 unmodified lines
1363	match_v,	1364	match_v,
1364	MLX5_FLOW_CONTEXT_ACTION_ALLOW,	1365	MLX5_FLOW_CONTEXT_ACTION_ALLOW,
1365	0, NULL);	1366	0, NULL);
1366	if (IS_ERR_OR_NULL(vport->ingress.allow_rule)) {	1367	if (IS_ERR(vport->ingress.allow_rule)) {
1367	err = PTR_ERR(vport->ingress.allow_rule);	1368	err = PTR_ERR(vport->ingress.allow_rule);
1368	pr_warn("vport[%d] configure ingress allow rule, err(%d)\n",	1369	pr_warn("vport[%d] configure ingress allow rule, err(%d)\n",
1369	vport->vport, err);	1370	vport->vport, err);
@@ -1380,7 +1381,7 @@ static int esw_vport_ingress_config(struct mlx5_eswitch *esw, · 10 unmodified lines
1380	match_v,	1381	match_v,
1381	MLX5_FLOW_CONTEXT_ACTION_DROP,	1382	MLX5_FLOW_CONTEXT_ACTION_DROP,
1382	0, NULL);	1383	0, NULL);
1383	if (IS_ERR_OR_NULL(vport->ingress.drop_rule)) {	1384	if (IS_ERR(vport->ingress.drop_rule)) {
1384	err = PTR_ERR(vport->ingress.drop_rule);	1385	err = PTR_ERR(vport->ingress.drop_rule);
1385	pr_warn("vport[%d] configure ingress drop rule, err(%d)\n",	1386	pr_warn("vport[%d] configure ingress drop rule, err(%d)\n",
1386	vport->vport, err);	1387	vport->vport, err);
@@ -1439,7 +1440,7 @@ static int esw_vport_egress_config(struct mlx5_eswitch *esw, · 52 unmodified lines
1439	match_v,	1440	match_v,
1440	MLX5_FLOW_CONTEXT_ACTION_ALLOW,	1441	MLX5_FLOW_CONTEXT_ACTION_ALLOW,
1441	0, NULL);	1442	0, NULL);
1442	if (IS_ERR_OR_NULL(vport->egress.allowed_vlan)) {	1443	if (IS_ERR(vport->egress.allowed_vlan)) {
1443	err = PTR_ERR(vport->egress.allowed_vlan);	1444	err = PTR_ERR(vport->egress.allowed_vlan);
1444	pr_warn("vport[%d] configure egress allowed vlan rule failed, err(%d)\n",	1445	pr_warn("vport[%d] configure egress allowed vlan rule failed, err(%d)\n",
1445	vport->vport, err);	1446	vport->vport, err);
@@ -1457,7 +1458,7 @@ static int esw_vport_egress_config(struct mlx5_eswitch *esw, · 11 unmodified lines
1457	match_v,	1458	match_v,
1458	MLX5_FLOW_CONTEXT_ACTION_DROP,	1459	MLX5_FLOW_CONTEXT_ACTION_DROP,
1459	0, NULL);	1460	0, NULL);
1460	if (IS_ERR_OR_NULL(vport->egress.drop_rule)) {	1461	if (IS_ERR(vport->egress.drop_rule)) {
1461	err = PTR_ERR(vport->egress.drop_rule);	1462	err = PTR_ERR(vport->egress.drop_rule);
1462	pr_warn("vport[%d] configure egress drop rule failed, err(%d)\n",	1463	pr_warn("vport[%d] configure egress drop rule failed, err(%d)\n",
1463	vport->vport, err);	1464	vport->vport, err);
@@ -1491,14 +1492,11 @@ static void esw_enable_vport(struct mlx5_eswitch *esw, int vport_num, · 27 unmodified lines
1491		1492
1492	/* Sync with current vport context */	1493	/* Sync with current vport context */
1493	vport->enabled_events = enable_events;	1494	vport->enabled_events = enable_events;
1494	esw_vport_change_handle_locked(vport);
1495
1496	vport->enabled = true;	1495	vport->enabled = true;
1497		1496
1498	/* only PF is trusted by default */	1497	/* only PF is trusted by default */
1499	vport->trusted = (vport_num) ? false : true;	1498	vport->trusted = (vport_num) ? false : true;
1500		1499	esw_vport_change_handle_locked(vport);
1501	arm_vport_context_events_cmd(esw->dev, vport_num, enable_events);
1502		1500
1503	esw->enabled_vports++;	1501	esw->enabled_vports++;
1504	esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);	1502	esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
@@ -1728,11 +1726,24 @@ void mlx5_eswitch_vport_event(struct mlx5_eswitch esw, struct mlx5_eqe eqe) · 223 unmodified lines
1728	(esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))	1726	(esw && MLX5_CAP_GEN(esw->dev, vport_group_manager) && mlx5_core_is_pf(esw->dev))
1729	#define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)	1727	#define LEGAL_VPORT(esw, vport) (vport >= 0 && vport < esw->total_vports)
1730		1728
		1729	static void node_guid_gen_from_mac(u64 *node_guid, u8 mac[ETH_ALEN])
		1730	{
		1731	((u8 *)node_guid)[7] = mac[0];
		1732	((u8 *)node_guid)[6] = mac[1];
		1733	((u8 *)node_guid)[5] = mac[2];
		1734	((u8 *)node_guid)[4] = 0xff;
		1735	((u8 *)node_guid)[3] = 0xfe;
		1736	((u8 *)node_guid)[2] = mac[3];
		1737	((u8 *)node_guid)[1] = mac[4];
		1738	((u8 *)node_guid)[0] = mac[5];
		1739	}
		1740
1731	int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,	1741	int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
1732	int vport, u8 mac[ETH_ALEN])	1742	int vport, u8 mac[ETH_ALEN])
1733	{	1743	{
1734	int err = 0;
1735	struct mlx5_vport *evport;	1744	struct mlx5_vport *evport;
		1745	u64 node_guid;
		1746	int err = 0;
1736		1747
1737	if (!ESW_ALLOWED(esw))	1748	if (!ESW_ALLOWED(esw))
1738	return -EPERM;	1749	return -EPERM;
@@ -1756,11 +1767,17 @@ int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw, · 17 unmodified lines
1756	return err;	1767	return err;
1757	}	1768	}
1758		1769
		1770	node_guid_gen_from_mac(&node_guid, mac);
		1771	err = mlx5_modify_nic_vport_node_guid(esw->dev, vport, node_guid);
		1772	if (err)
		1773	mlx5_core_warn(esw->dev,
		1774	"Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
		1775	vport, err);
		1776
1759	mutex_lock(&esw->state_lock);	1777	mutex_lock(&esw->state_lock);
1760	if (evport->enabled)	1778	if (evport->enabled)
1761	err = esw_vport_ingress_config(esw, evport);	1779	err = esw_vport_ingress_config(esw, evport);
1762	mutex_unlock(&esw->state_lock);	1780	mutex_unlock(&esw->state_lock);
1763
1764	return err;	1781	return err;
1765	}	1782	}
1766		1783

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+25−15

 				       ft->id);
 			return err;
 		}
-		root->root_ft = new_root_ft;
 	}
+	root->root_ft = new_root_ft;
 	return 0;
 }
 void mlx5_cleanup_fs(struct mlx5_core_dev *dev)
 {
+	if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
+		return;
 	cleanup_root_ns(dev);
 	cleanup_single_prio_root_ns(dev, dev->priv.fdb_root_ns);
 	cleanup_single_prio_root_ns(dev, dev->priv.esw_egress_root_ns);
 {
 	int err = 0;
+	if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
+		return 0;
 	err = mlx5_init_fc_stats(dev);
 	if (err)
 		return err;
-	if (MLX5_CAP_GEN(dev, nic_flow_table)) {
+	if (MLX5_CAP_GEN(dev, nic_flow_table) &&
+	    MLX5_CAP_FLOWTABLE_NIC_RX(dev, ft_support)) {
 		err = init_root_ns(dev);
 		if (err)
 			goto err;
 	}
 	if (MLX5_CAP_GEN(dev, eswitch_flow_table)) {
-		err = init_fdb_root_ns(dev);
+		if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, ft_support)) {
-		if (err)
+			err = init_fdb_root_ns(dev);
-			goto err;
+			if (err)
-	}
+				goto err;
-	if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {
+		}
-		err = init_egress_acl_root_ns(dev);
+		if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {
-		if (err)
+			err = init_egress_acl_root_ns(dev);
-			goto err;
+			if (err)
-	}
+				goto err;
-	if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {
+		}
-		err = init_ingress_acl_root_ns(dev);
+		if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {
-		if (err)
+			err = init_ingress_acl_root_ns(dev);
-			goto err;
+			if (err)
+				goto err;
+		}
 	}
 	return 0;

drivers/net/ethernet/mellanox/mlx5/core/qp.c+1−1

@@ -418,7 +418,7 @@ int mlx5_core_xrcd_alloc(struct mlx5_core_dev dev, u32 xrcdn) · 417 unmodified lines
418	if (out.hdr.status)	418	if (out.hdr.status)
419	err = mlx5_cmd_status_to_err(&out.hdr);	419	err = mlx5_cmd_status_to_err(&out.hdr);
420	else	420	else
421	*xrcdn = be32_to_cpu(out.xrcdn);	421	*xrcdn = be32_to_cpu(out.xrcdn) & 0xffffff;
422		422
423	return err;	423	return err;
424	}	424	}

drivers/net/ethernet/mellanox/mlx5/core/vport.c+38−0

@@ -508,6 +508,44 @@ int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev mdev, u64 node_guid) · 507 unmodified lines
508	}	508	}
509	EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);	509	EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_node_guid);
510		510
		511	int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
		512	u32 vport, u64 node_guid)
		513	{
		514	int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
		515	void *nic_vport_context;
		516	u8 *guid;
		517	void *in;
		518	int err;
		519
		520	if (!vport)
		521	return -EINVAL;
		522	if (!MLX5_CAP_GEN(mdev, vport_group_manager))
		523	return -EACCES;
		524	if (!MLX5_CAP_ESW(mdev, nic_vport_node_guid_modify))
		525	return -ENOTSUPP;
		526
		527	in = mlx5_vzalloc(inlen);
		528	if (!in)
		529	return -ENOMEM;
		530
		531	MLX5_SET(modify_nic_vport_context_in, in,
		532	field_select.node_guid, 1);
		533	MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
		534	MLX5_SET(modify_nic_vport_context_in, in, other_vport, !!vport);
		535
		536	nic_vport_context = MLX5_ADDR_OF(modify_nic_vport_context_in,
		537	in, nic_vport_context);
		538	guid = MLX5_ADDR_OF(nic_vport_context, nic_vport_context,
		539	node_guid);
		540	MLX5_SET64(nic_vport_context, nic_vport_context, node_guid, node_guid);
		541
		542	err = mlx5_modify_nic_vport_context(mdev, in, inlen);
		543
		544	kvfree(in);
		545
		546	return err;
		547	}
		548
511	int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,	549	int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
512	u16 *qkey_viol_cntr)	550	u16 *qkey_viol_cntr)
513	{	551	{

drivers/net/ethernet/mellanox/mlxsw/spectrum.c+112−91

 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
 }
-static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
+static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
+				    u8 swid)
 {
-	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 	char pspa_pl[MLXSW_REG_PSPA_LEN];
-	mlxsw_reg_pspa_pack(pspa_pl, swid, mlxsw_sp_port->local_port);
+	mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
 }
+static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
+{
+	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
+	return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
+					swid);
+}
 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
 				     bool enable)
 {
 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
 }
-static int __mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
+static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
-					   u8 local_port, u8 *p_module,
+					 u8 local_port, u8 *p_module,
-					   u8 *p_width, u8 *p_lane)
+					 u8 *p_width, u8 *p_lane)
 {
 	char pmlp_pl[MLXSW_REG_PMLP_LEN];
 	int err;
 	return 0;
 }
-static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
-					 u8 local_port, u8 *p_module,
-					 u8 *p_width)
-{
-	u8 lane;
-	return __mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, p_module,
-					       p_width, &lane);
-}
 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
 				    u8 module, u8 width, u8 lane)
 {
 					    size_t len)
 {
 	struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
-	u8 module, width, lane;
+	u8 module = mlxsw_sp_port->mapping.module;
+	u8 width = mlxsw_sp_port->mapping.width;
+	u8 lane = mlxsw_sp_port->mapping.lane;
 	int err;
-	err = __mlxsw_sp_port_module_info_get(mlxsw_sp_port->mlxsw_sp,
-					      mlxsw_sp_port->local_port,
-					      &module, &width, &lane);
-	if (err) {
-		netdev_err(dev, "Failed to retrieve module information\n");
-		return err;
-	}
 	if (!mlxsw_sp_port->split)
 		err = snprintf(name, len, "p%d", module + 1);
 	else
 	return 0;
 }
-static int __mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
+static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
-				  bool split, u8 module, u8 width)
+				bool split, u8 module, u8 width, u8 lane)
 {
 	struct mlxsw_sp_port *mlxsw_sp_port;
 	struct net_device *dev;
 	mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
 	mlxsw_sp_port->local_port = local_port;
 	mlxsw_sp_port->split = split;
+	mlxsw_sp_port->mapping.module = module;
+	mlxsw_sp_port->mapping.width = width;
+	mlxsw_sp_port->mapping.lane = lane;
 	bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
 	mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
 	if (!mlxsw_sp_port->active_vlans) {
 	return err;
 }
-static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
-				bool split, u8 module, u8 width, u8 lane)
-{
-	int err;
-	err = mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
-				       lane);
-	if (err)
-		return err;
-	err = __mlxsw_sp_port_create(mlxsw_sp, local_port, split, module,
-				     width);
-	if (err)
-		goto err_port_create;
-	return 0;
-err_port_create:
-	mlxsw_sp_port_module_unmap(mlxsw_sp, local_port);
-	return err;
-}
 static void mlxsw_sp_port_vports_fini(struct mlxsw_sp_port *mlxsw_sp_port)
 {
 	struct net_device *dev = mlxsw_sp_port->dev;
 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
 {
+	u8 module, width, lane;
 	size_t alloc_size;
-	u8 module, width;
 	int i;
 	int err;
 	for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
 		err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
-						    &width);
+						    &width, &lane);
 		if (err)
 			goto err_port_module_info_get;
 		if (!width)
 			continue;
 		mlxsw_sp->port_to_module[i] = module;
-		err = __mlxsw_sp_port_create(mlxsw_sp, i, false, module, width);
+		err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
+					   lane);
 		if (err)
 			goto err_port_create;
 	}
 	return local_port - offset;
 }
+static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
+				      u8 module, unsigned int count)
+{
+	u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
+	int err, i;
+	for (i = 0; i < count; i++) {
+		err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
+					       width, i * width);
+		if (err)
+			goto err_port_module_map;
+	}
+	for (i = 0; i < count; i++) {
+		err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
+		if (err)
+			goto err_port_swid_set;
+	}
+	for (i = 0; i < count; i++) {
+		err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
+					   module, width, i * width);
+		if (err)
+			goto err_port_create;
+	}
+	return 0;
+err_port_create:
+	for (i--; i >= 0; i--)
+		mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
+	i = count;
+err_port_swid_set:
+	for (i--; i >= 0; i--)
+		__mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
+					 MLXSW_PORT_SWID_DISABLED_PORT);
+	i = count;
+err_port_module_map:
+	for (i--; i >= 0; i--)
+		mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
+	return err;
+}
+static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
+					 u8 base_port, unsigned int count)
+{
+	u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
+	int i;
+	/* Split by four means we need to re-create two ports, otherwise
+	 * only one.
+	 */
+	count = count / 2;
+	for (i = 0; i < count; i++) {
+		local_port = base_port + i * 2;
+		module = mlxsw_sp->port_to_module[local_port];
+		mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
+					 0);
+	}
+	for (i = 0; i < count; i++)
+		__mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
+	for (i = 0; i < count; i++) {
+		local_port = base_port + i * 2;
+		module = mlxsw_sp->port_to_module[local_port];
+		mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
+				     width, 0);
+	}
+}
 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
 			       unsigned int count)
 {
 	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
 	struct mlxsw_sp_port *mlxsw_sp_port;
-	u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
 	u8 module, cur_width, base_port;
 	int i;
 	int err;
 		return -EINVAL;
 	}
+	module = mlxsw_sp_port->mapping.module;
+	cur_width = mlxsw_sp_port->mapping.width;
 	if (count != 2 && count != 4) {
 		netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
 		return -EINVAL;
 	}
-	err = mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, &module,
-					    &cur_width);
-	if (err) {
-		netdev_err(mlxsw_sp_port->dev, "Failed to get port's width\n");
-		return err;
-	}
 	if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
 		netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
 		return -EINVAL;
 	for (i = 0; i < count; i++)
 		mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
-	for (i = 0; i < count; i++) {
+	err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
-		err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
+	if (err) {
-					   module, width, i * width);
+		dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
-		if (err) {
+		goto err_port_split_create;
-			dev_err(mlxsw_sp->bus_info->dev, "Failed to create split port\n");
-			goto err_port_create;
-		}
 	}
 	return 0;
-err_port_create:
+err_port_split_create:
-	for (i--; i >= 0; i--)
+	mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
-		mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
-	for (i = 0; i < count / 2; i++) {
-		module = mlxsw_sp->port_to_module[base_port + i * 2];
-		mlxsw_sp_port_create(mlxsw_sp, base_port + i * 2, false,
-				     module, MLXSW_PORT_MODULE_MAX_WIDTH, 0);
-	}
 	return err;
 }
 {
 	struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
 	struct mlxsw_sp_port *mlxsw_sp_port;
-	u8 module, cur_width, base_port;
+	u8 cur_width, base_port;
 	unsigned int count;
 	int i;
-	int err;
 	mlxsw_sp_port = mlxsw_sp->ports[local_port];
 	if (!mlxsw_sp_port) {
 		return -EINVAL;
 	}
-	err = mlxsw_sp_port_module_info_get(mlxsw_sp, local_port, &module,
+	cur_width = mlxsw_sp_port->mapping.width;
-					    &cur_width);
-	if (err) {
-		netdev_err(mlxsw_sp_port->dev, "Failed to get port's width\n");
-		return err;
-	}
 	count = cur_width == 1 ? 4 : 2;
 	base_port = mlxsw_sp_cluster_base_port_get(local_port);
 	for (i = 0; i < count; i++)
 		mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
-	for (i = 0; i < count / 2; i++) {
+	mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
-		module = mlxsw_sp->port_to_module[base_port + i * 2];
-		err = mlxsw_sp_port_create(mlxsw_sp, base_port + i * 2, false,
-					   module, MLXSW_PORT_MODULE_MAX_WIDTH,
-					   0);
-		if (err)
-			dev_err(mlxsw_sp->bus_info->dev, "Failed to reinstantiate port\n");
-	}
 	return 0;
 }

drivers/net/ethernet/mellanox/mlxsw/spectrum.h+5−0

 		struct ieee_maxrate *maxrate;
 		struct ieee_pfc *pfc;
 	} dcb;
+	struct {
+		u8 module;
+		u8 width;
+		u8 lane;
+	} mapping;
 	/* 802.1Q bridge VLANs */
 	unsigned long *active_vlans;
 	unsigned long *untagged_vlans;

drivers/net/ethernet/qlogic/qed/qed_main.c+36−9

@@ -1105,6 +1105,39 @@ static int qed_get_port_type(u32 media_type) · 1104 unmodified lines
1105	return port_type;	1105	return port_type;
1106	}	1106	}
1107		1107
		1108	static int qed_get_link_data(struct qed_hwfn *hwfn,
		1109	struct qed_mcp_link_params *params,
		1110	struct qed_mcp_link_state *link,
		1111	struct qed_mcp_link_capabilities *link_caps)
		1112	{
		1113	void *p;
		1114
		1115	if (!IS_PF(hwfn->cdev)) {
		1116	qed_vf_get_link_params(hwfn, params);
		1117	qed_vf_get_link_state(hwfn, link);
		1118	qed_vf_get_link_caps(hwfn, link_caps);
		1119
		1120	return 0;
		1121	}
		1122
		1123	p = qed_mcp_get_link_params(hwfn);
		1124	if (!p)
		1125	return -ENXIO;
		1126	memcpy(params, p, sizeof(*params));
		1127
		1128	p = qed_mcp_get_link_state(hwfn);
		1129	if (!p)
		1130	return -ENXIO;
		1131	memcpy(link, p, sizeof(*link));
		1132
		1133	p = qed_mcp_get_link_capabilities(hwfn);
		1134	if (!p)
		1135	return -ENXIO;
		1136	memcpy(link_caps, p, sizeof(*link_caps));
		1137
		1138	return 0;
		1139	}
		1140
1108	static void qed_fill_link(struct qed_hwfn *hwfn,	1141	static void qed_fill_link(struct qed_hwfn *hwfn,
1109	struct qed_link_output *if_link)	1142	struct qed_link_output *if_link)
1110	{	1143	{
@@ -1116,15 +1149,9 @@ static void qed_fill_link(struct qed_hwfn *hwfn, · 5 unmodified lines
1116	memset(if_link, 0, sizeof(*if_link));	1149	memset(if_link, 0, sizeof(*if_link));
1117		1150
1118	/* Prepare source inputs */	1151	/* Prepare source inputs */
1119	if (IS_PF(hwfn->cdev)) {	1152	if (qed_get_link_data(hwfn, &params, &link, &link_caps)) {
1120	memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));	1153	dev_warn(&hwfn->cdev->pdev->dev, "no link data available\n");
1121	memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));	1154	return;
1122	memcpy(&link_caps, qed_mcp_get_link_capabilities(hwfn),
1123	sizeof(link_caps));
1124	} else {
1125	qed_vf_get_link_params(hwfn, &params);
1126	qed_vf_get_link_state(hwfn, &link);
1127	qed_vf_get_link_caps(hwfn, &link_caps);
1128	}	1155	}
1129		1156
1130	/* Set the link parameters to pass to protocol driver */	1157	/* Set the link parameters to pass to protocol driver */

drivers/net/ethernet/qlogic/qed/qed_sriov.h+3−1

 #include "qed_vf.h"
 #define QED_VF_ARRAY_LENGTH (3)
+#ifdef CONFIG_QED_SRIOV
 #define IS_VF(cdev)             ((cdev)->b_is_vf)
 #define IS_PF(cdev)             (!((cdev)->b_is_vf))
-#ifdef CONFIG_QED_SRIOV
 #define IS_PF_SRIOV(p_hwfn)     (!!((p_hwfn)->cdev->p_iov_info))
 #else
+#define IS_VF(cdev)             (0)
+#define IS_PF(cdev)             (1)
 #define IS_PF_SRIOV(p_hwfn)     (0)
 #endif
 #define IS_PF_SRIOV_ALLOC(p_hwfn)       (!!((p_hwfn)->pf_iov_info))

drivers/net/ethernet/qlogic/qede/qede_main.c+2−0

 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
+#ifdef CONFIG_QED_SRIOV
 	{PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
+#endif
 	{ 0 }
 };

drivers/net/ethernet/sfc/mcdi_port.c+4−3

 	case MC_CMD_MEDIA_XFP:
 	case MC_CMD_MEDIA_SFP_PLUS:
-		result |= SUPPORTED_FIBRE;
-		break;
 	case MC_CMD_MEDIA_QSFP_PLUS:
 		result |= SUPPORTED_FIBRE;
+		if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
+			result |= SUPPORTED_1000baseT_Full;
+		if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
+			result |= SUPPORTED_10000baseT_Full;
 		if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
 			result |= SUPPORTED_40000baseCR4_Full;
 		break;

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c+1−1

@@ -156,7 +156,7 @@ static void dwmac4_set_filter(struct mac_device_info *hw, · 155 unmodified lines
156	struct netdev_hw_addr *ha;	156	struct netdev_hw_addr *ha;
157		157
158	netdev_for_each_uc_addr(ha, dev) {	158	netdev_for_each_uc_addr(ha, dev) {
159	dwmac4_set_umac_addr(ioaddr, ha->addr, reg);	159	dwmac4_set_umac_addr(hw, ha->addr, reg);
160	reg++;	160	reg++;
161	}	161	}
162	}	162	}

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+4−2

 	if (!netif_running(ndev))
 		return 0;
-	spin_lock_irqsave(&priv->lock, flags);
 	/* Power Down bit, into the PM register, is cleared
 	 * automatically as soon as a magic packet or a Wake-up frame
 	 * is received. Anyway, it's better to manually clear
 	 * from another devices (e.g. serial console).
 	 */
 	if (device_may_wakeup(priv->device)) {
+		spin_lock_irqsave(&priv->lock, flags);
 		priv->hw->mac->pmt(priv->hw, 0);
+		spin_unlock_irqrestore(&priv->lock, flags);
 		priv->irq_wake = 0;
 	} else {
 		pinctrl_pm_select_default_state(priv->device);
 	netif_device_attach(ndev);
+	spin_lock_irqsave(&priv->lock, flags);
 	priv->cur_rx = 0;
 	priv->dirty_rx = 0;
 	priv->dirty_tx = 0;

drivers/net/ethernet/ti/cpsw.c+1−1

@@ -1339,7 +1339,7 @@ static int cpsw_ndo_open(struct net_device *ndev) · 1338 unmodified lines
1339	if (priv->coal_intvl != 0) {	1339	if (priv->coal_intvl != 0) {
1340	struct ethtool_coalesce coal;	1340	struct ethtool_coalesce coal;
1341		1341
1342	coal.rx_coalesce_usecs = (priv->coal_intvl << 4);	1342	coal.rx_coalesce_usecs = priv->coal_intvl;
1343	cpsw_set_coalesce(ndev, &coal);	1343	cpsw_set_coalesce(ndev, &coal);
1344	}	1344	}
1345		1345

drivers/net/vmxnet3/vmxnet3_drv.c+1−1

@@ -1369,7 +1369,7 @@ vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, · 1368 unmodified lines
1369	rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;	1369	rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;
1370		1370
1371	segCnt = rcdlro->segCnt;	1371	segCnt = rcdlro->segCnt;
1372	BUG_ON(segCnt <= 1);	1372	WARN_ON_ONCE(segCnt == 0);
1373	mss = rcdlro->mss;	1373	mss = rcdlro->mss;
1374	if (unlikely(segCnt <= 1))	1374	if (unlikely(segCnt <= 1))
1375	segCnt = 0;	1375	segCnt = 0;

drivers/net/vmxnet3/vmxnet3_int.h+2−2

@@ -69,10 +69,10 @@ · 68 unmodified lines
69	/*	69	/*
70	* Version numbers	70	* Version numbers
71	*/	71	*/
72	#define VMXNET3_DRIVER_VERSION_STRING "1.4.7.0-k"	72	#define VMXNET3_DRIVER_VERSION_STRING "1.4.8.0-k"
73		73
74	/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */	74	/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
75	#define VMXNET3_DRIVER_VERSION_NUM 0x01040700	75	#define VMXNET3_DRIVER_VERSION_NUM 0x01040800
76		76
77	#if defined(CONFIG_PCI_MSI)	77	#if defined(CONFIG_PCI_MSI)
78	/* RSS only makes sense if MSI-X is supported. */	78	/* RSS only makes sense if MSI-X is supported. */

drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c+16−0

 			   const u8 *mac, struct station_info *sinfo)
 {
 	struct brcmf_if *ifp = netdev_priv(ndev);
+	struct brcmf_scb_val_le scb_val;
 	s32 err = 0;
 	struct brcmf_sta_info_le sta_info_le;
 	u32 sta_flags;
 	u32 is_tdls_peer;
 	s32 total_rssi;
 	s32 count_rssi;
+	int rssi;
 	u32 i;
 	brcmf_dbg(TRACE, "Enter, MAC %pM\n", mac);
 			sinfo->filled |= BIT(NL80211_STA_INFO_SIGNAL);
 			total_rssi /= count_rssi;
 			sinfo->signal = total_rssi;
+		} else if (test_bit(BRCMF_VIF_STATUS_CONNECTED,
+			&ifp->vif->sme_state)) {
+			memset(&scb_val, 0, sizeof(scb_val));
+			err = brcmf_fil_cmd_data_get(ifp, BRCMF_C_GET_RSSI,
+						     &scb_val, sizeof(scb_val));
+			if (err) {
+				brcmf_err("Could not get rssi (%d)\n", err);
+				goto done;
+			} else {
+				rssi = le32_to_cpu(scb_val.val);
+				sinfo->filled |= BIT(NL80211_STA_INFO_SIGNAL);
+				sinfo->signal = rssi;
+				brcmf_dbg(CONN, "RSSI %d dBm\n", rssi);
+			}
 		}
 	}
 done:

drivers/net/wireless/broadcom/brcm80211/brcmfmac/msgbuf.c+2−0

@@ -1157,6 +1157,8 @@ brcmf_msgbuf_process_rx_complete(struct brcmf_msgbuf msgbuf, void buf) · 1156 unmodified lines
1157	brcmu_pkt_buf_free_skb(skb);	1157	brcmu_pkt_buf_free_skb(skb);
1158	return;	1158	return;
1159	}	1159	}
		1160
		1161	skb->protocol = eth_type_trans(skb, ifp->ndev);
1160	brcmf_netif_rx(ifp, skb);	1162	brcmf_netif_rx(ifp, skb);
1161	}	1163	}
1162		1164

drivers/net/wireless/mac80211_hwsim.c+1−0

@@ -2776,6 +2776,7 @@ static int hwsim_tx_info_frame_received_nl(struct sk_buff *skb_2, · 2775 unmodified lines
2776	if (!info->attrs[HWSIM_ATTR_ADDR_TRANSMITTER] \|\|	2776	if (!info->attrs[HWSIM_ATTR_ADDR_TRANSMITTER] \|\|
2777	!info->attrs[HWSIM_ATTR_FLAGS] \|\|	2777	!info->attrs[HWSIM_ATTR_FLAGS] \|\|
2778	!info->attrs[HWSIM_ATTR_COOKIE] \|\|	2778	!info->attrs[HWSIM_ATTR_COOKIE] \|\|
		2779	!info->attrs[HWSIM_ATTR_SIGNAL] \|\|
2779	!info->attrs[HWSIM_ATTR_TX_INFO])	2780	!info->attrs[HWSIM_ATTR_TX_INFO])
2780	goto out;	2781	goto out;
2781		2782

drivers/net/wireless/realtek/rtlwifi/core.c+3−3

@@ -54,7 +54,7 @@ EXPORT_SYMBOL(channel5g_80m); · 53 unmodified lines
54	void rtl_addr_delay(u32 addr)	54	void rtl_addr_delay(u32 addr)
55	{	55	{
56	if (addr == 0xfe)	56	if (addr == 0xfe)
57	msleep(50);	57	mdelay(50);
58	else if (addr == 0xfd)	58	else if (addr == 0xfd)
59	msleep(5);	59	msleep(5);
60	else if (addr == 0xfc)	60	else if (addr == 0xfc)
@@ -75,7 +75,7 @@ void rtl_rfreg_delay(struct ieee80211_hw *hw, enum radio_path rfpath, u32 addr, · 14 unmodified lines
75	rtl_addr_delay(addr);	75	rtl_addr_delay(addr);
76	} else {	76	} else {
77	rtl_set_rfreg(hw, rfpath, addr, mask, data);	77	rtl_set_rfreg(hw, rfpath, addr, mask, data);
78	usleep_range(1, 2);	78	udelay(1);
79	}	79	}
80	}	80	}
81	EXPORT_SYMBOL(rtl_rfreg_delay);	81	EXPORT_SYMBOL(rtl_rfreg_delay);
@@ -86,7 +86,7 @@ void rtl_bb_delay(struct ieee80211_hw *hw, u32 addr, u32 data) · 4 unmodified lines
86	rtl_addr_delay(addr);	86	rtl_addr_delay(addr);
87	} else {	87	} else {
88	rtl_set_bbreg(hw, addr, MASKDWORD, data);	88	rtl_set_bbreg(hw, addr, MASKDWORD, data);
89	usleep_range(1, 2);	89	udelay(1);
90	}	90	}
91	}	91	}
92	EXPORT_SYMBOL(rtl_bb_delay);	92	EXPORT_SYMBOL(rtl_bb_delay);

drivers/nvme/host/pci.c+7−2

@@ -1679,9 +1679,14 @@ static int nvme_pci_enable(struct nvme_dev *dev) · 1678 unmodified lines
1679		1679
1680	static void nvme_dev_unmap(struct nvme_dev *dev)	1680	static void nvme_dev_unmap(struct nvme_dev *dev)
1681	{	1681	{
		1682	struct pci_dev *pdev = to_pci_dev(dev->dev);
		1683	int bars;
		1684
1682	if (dev->bar)	1685	if (dev->bar)
1683	iounmap(dev->bar);	1686	iounmap(dev->bar);
1684	pci_release_regions(to_pci_dev(dev->dev));	1687
		1688	bars = pci_select_bars(pdev, IORESOURCE_MEM);
		1689	pci_release_selected_regions(pdev, bars);
1685	}	1690	}
1686		1691
1687	static void nvme_pci_disable(struct nvme_dev *dev)	1692	static void nvme_pci_disable(struct nvme_dev *dev)
@@ -1924,7 +1929,7 @@ static int nvme_dev_map(struct nvme_dev *dev) · 236 unmodified lines
1924		1929
1925	return 0;	1930	return 0;
1926	release:	1931	release:
1927	pci_release_regions(pdev);	1932	pci_release_selected_regions(pdev, bars);
1928	return -ENODEV;	1933	return -ENODEV;
1929	}	1934	}
1930		1935

drivers/of/fdt.c+13−2

 			      struct device_node **nodepp)
 {
 	struct device_node *root;
-	int offset = 0, depth = 0;
+	int offset = 0, depth = 0, initial_depth = 0;
 #define FDT_MAX_DEPTH	64
 	unsigned int fpsizes[FDT_MAX_DEPTH];
 	struct device_node *nps[FDT_MAX_DEPTH];
 	if (nodepp)
 		*nodepp = NULL;
+	/*
+	 * We're unflattening device sub-tree if @dad is valid. There are
+	 * possibly multiple nodes in the first level of depth. We need
+	 * set @depth to 1 to make fdt_next_node() happy as it bails
+	 * immediately when negative @depth is found. Otherwise, the device
+	 * nodes except the first one won't be unflattened successfully.
+	 */
+	if (dad)
+		depth = initial_depth = 1;
 	root = dad;
 	fpsizes[depth] = dad ? strlen(of_node_full_name(dad)) : 0;
 	nps[depth] = dad;
 	for (offset = 0;
-	     offset >= 0 && depth >= 0;
+	     offset >= 0 && depth >= initial_depth;
 	     offset = fdt_next_node(blob, offset, &depth)) {
 		if (WARN_ON_ONCE(depth >= FDT_MAX_DEPTH))
 			continue;

drivers/of/irq.c+10−9

 EXPORT_SYMBOL_GPL(of_irq_to_resource);
 /**
- * of_irq_get - Decode a node's IRQ and return it as a Linux irq number
+ * of_irq_get - Decode a node's IRQ and return it as a Linux IRQ number
  * @dev: pointer to device tree node
- * @index: zero-based index of the irq
+ * @index: zero-based index of the IRQ
- *
- * Returns Linux irq number on success, or -EPROBE_DEFER if the irq domain
- * is not yet created.
  *
+ * Returns Linux IRQ number on success, or 0 on the IRQ mapping failure, or
+ * -EPROBE_DEFER if the IRQ domain is not yet created, or error code in case
+ * of any other failure.
  */
 int of_irq_get(struct device_node *dev, int index)
 {
 EXPORT_SYMBOL_GPL(of_irq_get);
 /**
- * of_irq_get_byname - Decode a node's IRQ and return it as a Linux irq number
+ * of_irq_get_byname - Decode a node's IRQ and return it as a Linux IRQ number
  * @dev: pointer to device tree node
- * @name: irq name
+ * @name: IRQ name
  *
- * Returns Linux irq number on success, or -EPROBE_DEFER if the irq domain
+ * Returns Linux IRQ number on success, or 0 on the IRQ mapping failure, or
- * is not yet created, or error code in case of any other failure.
+ * -EPROBE_DEFER if the IRQ domain is not yet created, or error code in case
+ * of any other failure.
  */
 int of_irq_get_byname(struct device_node *dev, const char *name)
 {

drivers/of/of_reserved_mem.c+9−2

 	}
 	/* Need adjust the alignment to satisfy the CMA requirement */
-	if (IS_ENABLED(CONFIG_CMA) && of_flat_dt_is_compatible(node, "shared-dma-pool"))
+	if (IS_ENABLED(CONFIG_CMA)
-		align = max(align, (phys_addr_t)PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order));
+	    && of_flat_dt_is_compatible(node, "shared-dma-pool")
+	    && of_get_flat_dt_prop(node, "reusable", NULL)
+	    && !of_get_flat_dt_prop(node, "no-map", NULL)) {
+		unsigned long order =
+			max_t(unsigned long, MAX_ORDER - 1, pageblock_order);
+		align = max(align, (phys_addr_t)PAGE_SIZE << order);
+	}
 	prop = of_get_flat_dt_prop(node, "alloc-ranges", &len);
 	if (prop) {

drivers/perf/arm_pmu.c+1−1

 		if (!ret)
 			ret = init_fn(pmu);
 	} else {
-		ret = probe_current_pmu(pmu, probe_table);
 		cpumask_setall(&pmu->supported_cpus);
+		ret = probe_current_pmu(pmu, probe_table);
 	}
 	if (ret) {

drivers/phy/phy-exynos-mipi-video.c+5−1

 			struct exynos_mipi_video_phy *state)
 {
 	u32 val;
+	int ret;
+	ret = regmap_read(state->regmaps[data->resetn_map], data->resetn_reg, &val);
+	if (ret)
+		return 0;
-	regmap_read(state->regmaps[data->resetn_map], data->resetn_reg, &val);
 	return val & data->resetn_val;
 }

drivers/phy/phy-ti-pipe3.c+11−4

 		ret = ti_pipe3_dpll_wait_lock(phy);
 	}
-	/* Program the DPLL only if not locked */
+	/* SATA has issues if re-programmed when locked */
 	val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
-	if (!(val & PLL_LOCK))
+	if ((val & PLL_LOCK) && of_device_is_compatible(phy->dev->of_node,
-		if (ti_pipe3_dpll_program(phy))
+							"ti,phy-pipe3-sata"))
-			return -EINVAL;
+		return ret;
+	/* Program the DPLL */
+	ret = ti_pipe3_dpll_program(phy);
+	if (ret) {
+		ti_pipe3_disable_clocks(phy);
+		return -EINVAL;
+	}
 	return ret;
 }

drivers/phy/phy-twl4030-usb.c+10−4

 	twl4030_usb_set_mode(twl, twl->usb_mode);
 	if (twl->usb_mode == T2_USB_MODE_ULPI)
 		twl4030_i2c_access(twl, 0);
-	schedule_delayed_work(&twl->id_workaround_work, 0);
+	twl->linkstat = MUSB_UNKNOWN;
+	schedule_delayed_work(&twl->id_workaround_work, HZ);
 	return 0;
 }
 	struct twl4030_usb *twl = _twl;
 	enum musb_vbus_id_status status;
 	bool status_changed = false;
+	int err;
 	status = twl4030_usb_linkstat(twl);
 			pm_runtime_mark_last_busy(twl->dev);
 			pm_runtime_put_autosuspend(twl->dev);
 		}
-		musb_mailbox(status);
+		err = musb_mailbox(status);
+		if (err)
+			twl->linkstat = MUSB_UNKNOWN;
 	}
 	/* don't schedule during sleep - irq works right then */
 	struct twl4030_usb *twl = phy_get_drvdata(phy);
 	pm_runtime_get_sync(twl->dev);
-	schedule_delayed_work(&twl->id_workaround_work, 0);
+	twl->linkstat = MUSB_UNKNOWN;
+	schedule_delayed_work(&twl->id_workaround_work, HZ);
 	pm_runtime_mark_last_busy(twl->dev);
 	pm_runtime_put_autosuspend(twl->dev);
 	if (cable_present(twl->linkstat))
 		pm_runtime_put_noidle(twl->dev);
 	pm_runtime_mark_last_busy(twl->dev);
-	pm_runtime_put_sync_suspend(twl->dev);
+	pm_runtime_dont_use_autosuspend(&pdev->dev);
+	pm_runtime_put_sync(twl->dev);
 	pm_runtime_disable(twl->dev);
 	/* autogate 60MHz ULPI clock,

drivers/platform/x86/Kconfig+4−6

 config DELL_LAPTOP
 	tristate "Dell Laptop Extras"
-	depends on X86
 	depends on DELL_SMBIOS
 	depends on DMI
 	depends on BACKLIGHT_CLASS_DEVICE
 config SENSORS_HDAPS
 	tristate "Thinkpad Hard Drive Active Protection System (hdaps)"
-	depends on INPUT && X86
+	depends on INPUT
 	select INPUT_POLLDEV
 	default n
 	help
 config ACPI_CMPC
 	tristate "CMPC Laptop Extras"
-	depends on X86 && ACPI
+	depends on ACPI
 	depends on RFKILL || RFKILL=n
 	select INPUT
 	select BACKLIGHT_CLASS_DEVICE
 config INTEL_PMC_CORE
 	bool "Intel PMC Core driver"
-	depends on X86 && PCI
+	depends on PCI
 	---help---
 	  The Intel Platform Controller Hub for Intel Core SoCs provides access
 	  to Power Management Controller registers via a PCI interface. This
 config IBM_RTL
 	tristate "Device driver to enable PRTL support"
-	depends on X86 && PCI
+	depends on PCI
 	---help---
 	 Enable support for IBM Premium Real Time Mode (PRTM).
 	 This module will allow you the enter and exit PRTM in the BIOS via
 config SAMSUNG_LAPTOP
 	tristate "Samsung Laptop driver"
-	depends on X86
 	depends on RFKILL || RFKILL = n
 	depends on ACPI_VIDEO || ACPI_VIDEO = n
 	depends on BACKLIGHT_CLASS_DEVICE

drivers/platform/x86/ideapad-laptop.c+2−0

 static const struct key_entry ideapad_keymap[] = {
 	{ KE_KEY, 6,  { KEY_SWITCHVIDEOMODE } },
 	{ KE_KEY, 7,  { KEY_CAMERA } },
+	{ KE_KEY, 8,  { KEY_MICMUTE } },
 	{ KE_KEY, 11, { KEY_F16 } },
 	{ KE_KEY, 13, { KEY_WLAN } },
 	{ KE_KEY, 16, { KEY_PROG1 } },
 				break;
 			case 13:
 			case 11:
+			case 8:
 			case 7:
 			case 6:
 				ideapad_input_report(priv, vpc_bit);

drivers/platform/x86/thinkpad_acpi.c+63−24

@@ -2043,6 +2043,7 @@ static int hotkey_autosleep_ack; · 2042 unmodified lines
2043		2043
2044	static u32 hotkey_orig_mask; /* events the BIOS had enabled */	2044	static u32 hotkey_orig_mask; /* events the BIOS had enabled */
2045	static u32 hotkey_all_mask; /* all events supported in fw */	2045	static u32 hotkey_all_mask; /* all events supported in fw */
		2046	static u32 hotkey_adaptive_all_mask; /* all adaptive events supported in fw */
2046	static u32 hotkey_reserved_mask; /* events better left disabled */	2047	static u32 hotkey_reserved_mask; /* events better left disabled */
2047	static u32 hotkey_driver_mask; /* events needed by the driver */	2048	static u32 hotkey_driver_mask; /* events needed by the driver */
2048	static u32 hotkey_user_mask; /* events visible to userspace */	2049	static u32 hotkey_user_mask; /* events visible to userspace */
@@ -2742,6 +2743,17 @@ static ssize_t hotkey_all_mask_show(struct device *dev, · 693 unmodified lines
2742		2743
2743	static DEVICE_ATTR_RO(hotkey_all_mask);	2744	static DEVICE_ATTR_RO(hotkey_all_mask);
2744		2745
		2746	/* sysfs hotkey all_mask ----------------------------------------------- */
		2747	static ssize_t hotkey_adaptive_all_mask_show(struct device *dev,
		2748	struct device_attribute *attr,
		2749	char *buf)
		2750	{
		2751	return snprintf(buf, PAGE_SIZE, "0x%08x\n",
		2752	hotkey_adaptive_all_mask \| hotkey_source_mask);
		2753	}
		2754
		2755	static DEVICE_ATTR_RO(hotkey_adaptive_all_mask);
		2756
2745	/* sysfs hotkey recommended_mask --------------------------------------- */	2757	/* sysfs hotkey recommended_mask --------------------------------------- */
2746	static ssize_t hotkey_recommended_mask_show(struct device *dev,	2758	static ssize_t hotkey_recommended_mask_show(struct device *dev,
2747	struct device_attribute *attr,	2759	struct device_attribute *attr,
@@ -2985,6 +2997,7 @@ static struct attribute *hotkey_attributes[] __initdata = { · 237 unmodified lines
2985	&dev_attr_wakeup_hotunplug_complete.attr,	2997	&dev_attr_wakeup_hotunplug_complete.attr,
2986	&dev_attr_hotkey_mask.attr,	2998	&dev_attr_hotkey_mask.attr,
2987	&dev_attr_hotkey_all_mask.attr,	2999	&dev_attr_hotkey_all_mask.attr,
		3000	&dev_attr_hotkey_adaptive_all_mask.attr,
2988	&dev_attr_hotkey_recommended_mask.attr,	3001	&dev_attr_hotkey_recommended_mask.attr,
2989	#ifdef CONFIG_THINKPAD_ACPI_HOTKEY_POLL	3002	#ifdef CONFIG_THINKPAD_ACPI_HOTKEY_POLL
2990	&dev_attr_hotkey_source_mask.attr,	3003	&dev_attr_hotkey_source_mask.attr,
@@ -3321,20 +3334,6 @@ static int __init hotkey_init(struct ibm_init_struct *iibm) · 330 unmodified lines
3321	if (!tp_features.hotkey)	3334	if (!tp_features.hotkey)
3322	return 1;	3335	return 1;
3323		3336
3324	/*
3325	* Check if we have an adaptive keyboard, like on the
3326	* Lenovo Carbon X1 2014 (2nd Gen).
3327	*/
3328	if (acpi_evalf(hkey_handle, &hkeyv, "MHKV", "qd")) {
3329	if ((hkeyv >> 8) == 2) {
3330	tp_features.has_adaptive_kbd = true;
3331	res = sysfs_create_group(&tpacpi_pdev->dev.kobj,
3332	&adaptive_kbd_attr_group);
3333	if (res)
3334	goto err_exit;
3335	}
3336	}
3337
3338	quirks = tpacpi_check_quirks(tpacpi_hotkey_qtable,	3337	quirks = tpacpi_check_quirks(tpacpi_hotkey_qtable,
3339	ARRAY_SIZE(tpacpi_hotkey_qtable));	3338	ARRAY_SIZE(tpacpi_hotkey_qtable));
3340		3339
@@ -3357,30 +3356,70 @@ static int __init hotkey_init(struct ibm_init_struct *iibm) · 16 unmodified lines
3357	A30, R30, R31, T20-22, X20-21, X22-24. Detected by checking	3356	A30, R30, R31, T20-22, X20-21, X22-24. Detected by checking
3358	for HKEY interface version 0x100 */	3357	for HKEY interface version 0x100 */
3359	if (acpi_evalf(hkey_handle, &hkeyv, "MHKV", "qd")) {	3358	if (acpi_evalf(hkey_handle, &hkeyv, "MHKV", "qd")) {
3360	if ((hkeyv >> 8) != 1) {	3359	vdbg_printk(TPACPI_DBG_INIT \| TPACPI_DBG_HKEY,
3361	pr_err("unknown version of the HKEY interface: 0x%x\n",	3360	"firmware HKEY interface version: 0x%x\n",
3362	hkeyv);	3361	hkeyv);
3363	pr_err("please report this to %s\n", TPACPI_MAIL);	3362
3364	} else {	3363	switch (hkeyv >> 8) {
		3364	case 1:
3365	/*	3365	/*
3366	* MHKV 0x100 in A31, R40, R40e,	3366	* MHKV 0x100 in A31, R40, R40e,
3367	* T4x, X31, and later	3367	* T4x, X31, and later
3368	*/	3368	*/
3369	vdbg_printk(TPACPI_DBG_INIT \| TPACPI_DBG_HKEY,
3370	"firmware HKEY interface version: 0x%x\n",
3371	hkeyv);
3372		3369
3373	/* Paranoia check AND init hotkey_all_mask */	3370	/* Paranoia check AND init hotkey_all_mask */
3374	if (!acpi_evalf(hkey_handle, &hotkey_all_mask,	3371	if (!acpi_evalf(hkey_handle, &hotkey_all_mask,
3375	"MHKA", "qd")) {	3372	"MHKA", "qd")) {
3376	pr_err("missing MHKA handler, "	3373	pr_err("missing MHKA handler, please report this to %s\n",
3377	"please report this to %s\n",
3378	TPACPI_MAIL);	3374	TPACPI_MAIL);
3379	/* Fallback: pre-init for FN+F3,F4,F12 */	3375	/* Fallback: pre-init for FN+F3,F4,F12 */
3380	hotkey_all_mask = 0x080cU;	3376	hotkey_all_mask = 0x080cU;
3381	} else {	3377	} else {
3382	tp_features.hotkey_mask = 1;	3378	tp_features.hotkey_mask = 1;
3383	}	3379	}
		3380	break;
		3381
		3382	case 2:
		3383	/*
		3384	* MHKV 0x200 in X1, T460s, X260, T560, X1 Tablet (2016)
		3385	*/
		3386
		3387	/* Paranoia check AND init hotkey_all_mask */
		3388	if (!acpi_evalf(hkey_handle, &hotkey_all_mask,
		3389	"MHKA", "dd", 1)) {
		3390	pr_err("missing MHKA handler, please report this to %s\n",
		3391	TPACPI_MAIL);
		3392	/* Fallback: pre-init for FN+F3,F4,F12 */
		3393	hotkey_all_mask = 0x080cU;
		3394	} else {
		3395	tp_features.hotkey_mask = 1;
		3396	}
		3397
		3398	/*
		3399	* Check if we have an adaptive keyboard, like on the
		3400	* Lenovo Carbon X1 2014 (2nd Gen).
		3401	*/
		3402	if (acpi_evalf(hkey_handle, &hotkey_adaptive_all_mask,
		3403	"MHKA", "dd", 2)) {
		3404	if (hotkey_adaptive_all_mask != 0) {
		3405	tp_features.has_adaptive_kbd = true;
		3406	res = sysfs_create_group(
		3407	&tpacpi_pdev->dev.kobj,
		3408	&adaptive_kbd_attr_group);
		3409	if (res)
		3410	goto err_exit;
		3411	}
		3412	} else {
		3413	tp_features.has_adaptive_kbd = false;
		3414	hotkey_adaptive_all_mask = 0x0U;
		3415	}
		3416	break;
		3417
		3418	default:
		3419	pr_err("unknown version of the HKEY interface: 0x%x\n",
		3420	hkeyv);
		3421	pr_err("please report this to %s\n", TPACPI_MAIL);
		3422	break;
3384	}	3423	}
3385	}	3424	}
3386		3425

drivers/pwm/core.c+2−1

@@ -457,7 +457,8 @@ int pwm_apply_state(struct pwm_device pwm, struct pwm_state state) · 456 unmodified lines
457	{	457	{
458	int err;	458	int err;
459		459
460	if (!pwm)	460	if (!pwm \|\| !state \|\| !state->period \|\|
		461	state->duty_cycle > state->period)
461	return -EINVAL;	462	return -EINVAL;
462		463
463	if (!memcmp(state, &pwm->state, sizeof(*state)))	464	if (!memcmp(state, &pwm->state, sizeof(*state)))

drivers/pwm/pwm-atmel-hlcdc.c+1−1

@@ -272,7 +272,7 @@ static int atmel_hlcdc_pwm_probe(struct platform_device *pdev) · 271 unmodified lines
272	chip->chip.of_pwm_n_cells = 3;	272	chip->chip.of_pwm_n_cells = 3;
273	chip->chip.can_sleep = 1;	273	chip->chip.can_sleep = 1;
274		274
275	ret = pwmchip_add(&chip->chip);	275	ret = pwmchip_add_with_polarity(&chip->chip, PWM_POLARITY_INVERSED);
276	if (ret) {	276	if (ret) {
277	clk_disable_unprepare(hlcdc->periph_clk);	277	clk_disable_unprepare(hlcdc->periph_clk);
278	return ret;	278	return ret;

drivers/pwm/sysfs.c+1−1

@@ -152,7 +152,7 @@ static ssize_t enable_store(struct device *child, · 151 unmodified lines
152	goto unlock;	152	goto unlock;
153	}	153	}
154		154
155	pwm_apply_state(pwm, &state);	155	ret = pwm_apply_state(pwm, &state);
156		156
157	unlock:	157	unlock:
158	mutex_unlock(&export->lock);	158	mutex_unlock(&export->lock);

drivers/regulator/qcom_smd-regulator.c+14−1

 	.enable = rpm_reg_enable,
 	.disable = rpm_reg_disable,
 	.is_enabled = rpm_reg_is_enabled,
+	.list_voltage = regulator_list_voltage_linear_range,
+	.get_voltage = rpm_reg_get_voltage,
+	.set_voltage = rpm_reg_set_voltage,
+	.set_load = rpm_reg_set_load,
+};
+static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
+	.enable = rpm_reg_enable,
+	.disable = rpm_reg_disable,
+	.is_enabled = rpm_reg_is_enabled,
+	.list_voltage = regulator_list_voltage_linear_range,
 	.get_voltage = rpm_reg_get_voltage,
 	.set_voltage = rpm_reg_set_voltage,
 static const struct regulator_desc pm8941_lnldo = {
 	.fixed_uV = 1740000,
 	.n_voltages = 1,
-	.ops = &rpm_smps_ldo_ops,
+	.ops = &rpm_smps_ldo_ops_fixed,
 };
 static const struct regulator_desc pm8941_switch = {

drivers/regulator/tps51632-regulator.c+6−3

 		int ramp_delay)
 {
 	struct tps51632_chip *tps = rdev_get_drvdata(rdev);
-	int bit = ramp_delay/6000;
+	int bit;
 	int ret;
-	if (bit)
+	if (ramp_delay == 0)
-		bit--;
+		bit = 0;
+	else
+		bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;
 	ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
 	if (ret < 0)
 		dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);

drivers/scsi/scsi_devinfo.c+1−0

@@ -230,6 +230,7 @@ static struct { · 229 unmodified lines
230	{"PIONEER", "CD-ROM DRM-624X", NULL, BLIST_FORCELUN \| BLIST_SINGLELUN},	230	{"PIONEER", "CD-ROM DRM-624X", NULL, BLIST_FORCELUN \| BLIST_SINGLELUN},
231	{"Promise", "VTrak E610f", NULL, BLIST_SPARSELUN \| BLIST_NO_RSOC},	231	{"Promise", "VTrak E610f", NULL, BLIST_SPARSELUN \| BLIST_NO_RSOC},
232	{"Promise", "", NULL, BLIST_SPARSELUN},	232	{"Promise", "", NULL, BLIST_SPARSELUN},
		233	{"QEMU", "QEMU CD-ROM", NULL, BLIST_SKIP_VPD_PAGES},
233	{"QNAP", "iSCSI Storage", NULL, BLIST_MAX_1024},	234	{"QNAP", "iSCSI Storage", NULL, BLIST_MAX_1024},
234	{"SYNOLOGY", "iSCSI Storage", NULL, BLIST_MAX_1024},	235	{"SYNOLOGY", "iSCSI Storage", NULL, BLIST_MAX_1024},
235	{"QUANTUM", "XP34301", "1071", BLIST_NOTQ},	236	{"QUANTUM", "XP34301", "1071", BLIST_NOTQ},

drivers/scsi/sd.c+4−4

@@ -2867,10 +2867,10 @@ static int sd_revalidate_disk(struct gendisk *disk) · 2866 unmodified lines
2867	if (sdkp->opt_xfer_blocks &&	2867	if (sdkp->opt_xfer_blocks &&
2868	sdkp->opt_xfer_blocks <= dev_max &&	2868	sdkp->opt_xfer_blocks <= dev_max &&
2869	sdkp->opt_xfer_blocks <= SD_DEF_XFER_BLOCKS &&	2869	sdkp->opt_xfer_blocks <= SD_DEF_XFER_BLOCKS &&
2870	sdkp->opt_xfer_blocks * sdp->sector_size >= PAGE_SIZE)	2870	logical_to_bytes(sdp, sdkp->opt_xfer_blocks) >= PAGE_SIZE) {
2871	rw_max = q->limits.io_opt =	2871	q->limits.io_opt = logical_to_bytes(sdp, sdkp->opt_xfer_blocks);
2872	sdkp->opt_xfer_blocks * sdp->sector_size;	2872	rw_max = logical_to_sectors(sdp, sdkp->opt_xfer_blocks);
2873	else	2873	} else
2874	rw_max = BLK_DEF_MAX_SECTORS;	2874	rw_max = BLK_DEF_MAX_SECTORS;
2875		2875
2876	/* Combine with controller limits */	2876	/* Combine with controller limits */

drivers/scsi/sd.h+5−0

 	return blocks << (ilog2(sdev->sector_size) - 9);
 }
+static inline unsigned int logical_to_bytes(struct scsi_device *sdev, sector_t blocks)
+{
+	return blocks * sdev->sector_size;
+}
 /*
  * A DIF-capable target device can be formatted with different
  * protection schemes.  Currently 0 through 3 are defined:

drivers/staging/lustre/lnet/klnds/o2iblnd/o2iblnd_cb.c+4−3

 	return 0;
  failed:
-	if (ni)
+	if (ni) {
 		lnet_ni_decref(ni);
+		rej.ibr_cp.ibcp_queue_depth = kiblnd_msg_queue_size(version, ni);
+		rej.ibr_cp.ibcp_max_frags = kiblnd_rdma_frags(version, ni);
+	}
 	rej.ibr_version             = version;
-	rej.ibr_cp.ibcp_queue_depth = kiblnd_msg_queue_size(version, ni);
-	rej.ibr_cp.ibcp_max_frags = kiblnd_rdma_frags(version, ni);
 	kiblnd_reject(cmid, &rej);
 	return -ECONNREFUSED;

drivers/staging/rtl8188eu/core/rtw_efuse.c+1−1

@@ -102,7 +102,7 @@ efuse_phymap_to_logical(u8 phymap, u16 _offset, u16 _size_byte, u8 pbuf) · 101 unmodified lines
102	if (!efuseTbl)	102	if (!efuseTbl)
103	return;	103	return;
104		104
105	eFuseWord = (u16 *)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(eFuseWord));	105	eFuseWord = (u16 **)rtw_malloc2d(EFUSE_MAX_SECTION_88E, EFUSE_MAX_WORD_UNIT, sizeof(u16));
106	if (!eFuseWord) {	106	if (!eFuseWord) {
107	DBG_88E("%s: alloc eFuseWord fail!\n", __func__);	107	DBG_88E("%s: alloc eFuseWord fail!\n", __func__);
108	goto eFuseWord_failed;	108	goto eFuseWord_failed;

drivers/staging/rtl8188eu/hal/usb_halinit.c+2−1

@@ -2072,7 +2072,8 @@ void rtl8188eu_set_hal_ops(struct adapter *adapt) · 2071 unmodified lines
2072	{	2072	{
2073	struct hal_ops *halfunc = &adapt->HalFunc;	2073	struct hal_ops *halfunc = &adapt->HalFunc;
2074		2074
2075	adapt->HalData = kzalloc(sizeof(*adapt->HalData), GFP_KERNEL);	2075
		2076	adapt->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL);
2076	if (!adapt->HalData)	2077	if (!adapt->HalData)
2077	DBG_88E("cant not alloc memory for HAL DATA\n");	2078	DBG_88E("cant not alloc memory for HAL DATA\n");
2078		2079

drivers/thermal/cpu_cooling.c+8−8

 		goto free_power_table;
 	}
-	snprintf(dev_name, sizeof(dev_name), "thermal-cpufreq-%d",
-		 cpufreq_dev->id);
-	cool_dev = thermal_of_cooling_device_register(np, dev_name, cpufreq_dev,
-						      &cpufreq_cooling_ops);
-	if (IS_ERR(cool_dev))
-		goto remove_idr;
 	/* Fill freq-table in descending order of frequencies */
 	for (i = 0, freq = -1; i <= cpufreq_dev->max_level; i++) {
 		freq = find_next_max(table, freq);
 			pr_debug("%s: freq:%u KHz\n", __func__, freq);
 	}
+	snprintf(dev_name, sizeof(dev_name), "thermal-cpufreq-%d",
+		 cpufreq_dev->id);
+	cool_dev = thermal_of_cooling_device_register(np, dev_name, cpufreq_dev,
+						      &cpufreq_cooling_ops);
+	if (IS_ERR(cool_dev))
+		goto remove_idr;
 	cpufreq_dev->clipped_freq = cpufreq_dev->freq_table[0];
 	cpufreq_dev->cool_dev = cool_dev;

drivers/usb/core/quirks.c+13−10

 	/* Creative SB Audigy 2 NX */
 	{ USB_DEVICE(0x041e, 0x3020), .driver_info = USB_QUIRK_RESET_RESUME },
+	/* USB3503 */
+	{ USB_DEVICE(0x0424, 0x3503), .driver_info = USB_QUIRK_RESET_RESUME },
 	/* Microsoft Wireless Laser Mouse 6000 Receiver */
 	{ USB_DEVICE(0x045e, 0x00e1), .driver_info = USB_QUIRK_RESET_RESUME },
 	/* MAYA44USB sound device */
 	{ USB_DEVICE(0x0a92, 0x0091), .driver_info = USB_QUIRK_RESET_RESUME },
+	/* ASUS Base Station(T100) */
+	{ USB_DEVICE(0x0b05, 0x17e0), .driver_info =
+			USB_QUIRK_IGNORE_REMOTE_WAKEUP },
 	/* Action Semiconductor flash disk */
 	{ USB_DEVICE(0x10d6, 0x2200), .driver_info =
 			USB_QUIRK_STRING_FETCH_255 },
 	{ USB_DEVICE(0x1908, 0x1315), .driver_info =
 			USB_QUIRK_HONOR_BNUMINTERFACES },
-	/* INTEL VALUE SSD */
-	{ USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME },
-	/* USB3503 */
-	{ USB_DEVICE(0x0424, 0x3503), .driver_info = USB_QUIRK_RESET_RESUME },
-	/* ASUS Base Station(T100) */
-	{ USB_DEVICE(0x0b05, 0x17e0), .driver_info =
-			USB_QUIRK_IGNORE_REMOTE_WAKEUP },
 	/* Protocol and OTG Electrical Test Device */
 	{ USB_DEVICE(0x1a0a, 0x0200), .driver_info =
 			USB_QUIRK_LINEAR_UFRAME_INTR_BINTERVAL },
+	/* Acer C120 LED Projector */
+	{ USB_DEVICE(0x1de1, 0xc102), .driver_info = USB_QUIRK_NO_LPM },
 	/* Blackmagic Design Intensity Shuttle */
 	{ USB_DEVICE(0x1edb, 0xbd3b), .driver_info = USB_QUIRK_NO_LPM },
 	/* Blackmagic Design UltraStudio SDI */
 	{ USB_DEVICE(0x1edb, 0xbd4f), .driver_info = USB_QUIRK_NO_LPM },
+	/* INTEL VALUE SSD */
+	{ USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME },
 	{ }  /* terminating entry must be last */
 };

drivers/usb/dwc2/core.h+27−0

@@ -64,6 +64,17 @@ · 63 unmodified lines
64	DWC2_TRACE_SCHEDULER_VB(pr_fmt("%s: SCH: " fmt), \	64	DWC2_TRACE_SCHEDULER_VB(pr_fmt("%s: SCH: " fmt), \
65	dev_name(hsotg->dev), ##__VA_ARGS__)	65	dev_name(hsotg->dev), ##__VA_ARGS__)
66		66
		67	#ifdef CONFIG_MIPS
		68	/*
		69	* There are some MIPS machines that can run in either big-endian
		70	* or little-endian mode and that use the dwc2 register without
		71	* a byteswap in both ways.
		72	* Unlike other architectures, MIPS apparently does not require a
		73	* barrier before the __raw_writel() to synchronize with DMA but does
		74	* require the barrier after the __raw_writel() to serialize a set of
		75	* writes. This set of operations was added specifically for MIPS and
		76	* should only be used there.
		77	*/
67	static inline u32 dwc2_readl(const void __iomem *addr)	78	static inline u32 dwc2_readl(const void __iomem *addr)
68	{	79	{
69	u32 value = __raw_readl(addr);	80	u32 value = __raw_readl(addr);
@@ -90,6 +101,22 @@ static inline void dwc2_writel(u32 value, void __iomem *addr) · 20 unmodified lines
90	pr_info("INFO:: wrote %08x to %p\n", value, addr);	101	pr_info("INFO:: wrote %08x to %p\n", value, addr);
91	#endif	102	#endif
92	}	103	}
		104	#else
		105	/* Normal architectures just use readl/write */
		106	static inline u32 dwc2_readl(const void __iomem *addr)
		107	{
		108	return readl(addr);
		109	}
		110
		111	static inline void dwc2_writel(u32 value, void __iomem *addr)
		112	{
		113	writel(value, addr);
		114
		115	#ifdef DWC2_LOG_WRITES
		116	pr_info("info:: wrote %08x to %p\n", value, addr);
		117	#endif
		118	}
		119	#endif
93		120
94	/* Maximum number of Endpoints/HostChannels */	121	/* Maximum number of Endpoints/HostChannels */
95	#define MAX_EPS_CHANNELS 16	122	#define MAX_EPS_CHANNELS 16

drivers/usb/dwc2/gadget.c+20−4

 	return 1;
 }
-static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value);
+static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now);
 /**
  * get_ep_head - return the first request on the endpoint
 		case USB_ENDPOINT_HALT:
 			halted = ep->halted;
-			dwc2_hsotg_ep_sethalt(&ep->ep, set);
+			dwc2_hsotg_ep_sethalt(&ep->ep, set, true);
 			ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0);
 			if (ret) {
  * dwc2_hsotg_ep_sethalt - set halt on a given endpoint
  * @ep: The endpoint to set halt.
  * @value: Set or unset the halt.
+ * @now: If true, stall the endpoint now. Otherwise return -EAGAIN if
+ *       the endpoint is busy processing requests.
+ *
+ * We need to stall the endpoint immediately if request comes from set_feature
+ * protocol command handler.
  */
-static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value)
+static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now)
 {
 	struct dwc2_hsotg_ep *hs_ep = our_ep(ep);
 	struct dwc2_hsotg *hs = hs_ep->parent;
 		return 0;
 	}
+	if (hs_ep->isochronous) {
+		dev_err(hs->dev, "%s is Isochronous Endpoint\n", ep->name);
+		return -EINVAL;
+	}
+	if (!now && value && !list_empty(&hs_ep->queue)) {
+		dev_dbg(hs->dev, "%s request is pending, cannot halt\n",
+			ep->name);
+		return -EAGAIN;
+	}
 	if (hs_ep->dir_in) {
 		epreg = DIEPCTL(index);
 		epctl = dwc2_readl(hs->regs + epreg);
 	int ret = 0;
 	spin_lock_irqsave(&hs->lock, flags);
-	ret = dwc2_hsotg_ep_sethalt(ep, value);
+	ret = dwc2_hsotg_ep_sethalt(ep, value, false);
 	spin_unlock_irqrestore(&hs->lock, flags);
 	return ret;

drivers/usb/dwc3/core.h+1−0

@@ -402,6 +402,7 @@ · 401 unmodified lines
402	#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)	402	#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
403	#define DWC3_DEPCMD_STATUS(x) (((x) >> 12) & 0x0F)	403	#define DWC3_DEPCMD_STATUS(x) (((x) >> 12) & 0x0F)
404	#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)	404	#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
		405	#define DWC3_DEPCMD_CLEARPENDIN (1 << 11)
405	#define DWC3_DEPCMD_CMDACT (1 << 10)	406	#define DWC3_DEPCMD_CMDACT (1 << 10)
406	#define DWC3_DEPCMD_CMDIOC (1 << 8)	407	#define DWC3_DEPCMD_CMDIOC (1 << 8)
407		408

drivers/usb/dwc3/dwc3-exynos.c+11−8

 	platform_set_drvdata(pdev, exynos);
-	ret = dwc3_exynos_register_phys(exynos);
-	if (ret) {
-		dev_err(dev, "couldn't register PHYs\n");
-		return ret;
-	}
 	exynos->dev	= dev;
 	exynos->clk = devm_clk_get(dev, "usbdrd30");
 		goto err3;
 	}
+	ret = dwc3_exynos_register_phys(exynos);
+	if (ret) {
+		dev_err(dev, "couldn't register PHYs\n");
+		goto err4;
+	}
 	if (node) {
 		ret = of_platform_populate(node, NULL, NULL, dev);
 		if (ret) {
 			dev_err(dev, "failed to add dwc3 core\n");
-			goto err4;
+			goto err5;
 		}
 	} else {
 		dev_err(dev, "no device node, failed to add dwc3 core\n");
 		ret = -ENODEV;
-		goto err4;
+		goto err5;
 	}
 	return 0;
+err5:
+	platform_device_unregister(exynos->usb2_phy);
+	platform_device_unregister(exynos->usb3_phy);
 err4:
 	regulator_disable(exynos->vdd10);
 err3:

drivers/usb/dwc3/dwc3-st.c+8−2

 	switch (dwc3_data->dr_mode) {
 	case USB_DR_MODE_PERIPHERAL:
-		val &= ~(USB3_FORCE_VBUSVALID | USB3_DELAY_VBUSVALID
+		val &= ~(USB3_DELAY_VBUSVALID
 			| USB3_SEL_FORCE_OPMODE | USB3_FORCE_OPMODE(0x3)
 			| USB3_SEL_FORCE_DPPULLDOWN2 | USB3_FORCE_DPPULLDOWN2
 			| USB3_SEL_FORCE_DMPULLDOWN2 | USB3_FORCE_DMPULLDOWN2);
-		val |= USB3_DEVICE_NOT_HOST;
+		/*
+		 * USB3_PORT2_FORCE_VBUSVALID When '1' and when
+		 * USB3_PORT2_DEVICE_NOT_HOST = 1, forces VBUSVLDEXT2 input
+		 * of the pico PHY to 1.
+		 */
+		val |= USB3_DEVICE_NOT_HOST | USB3_FORCE_VBUSVALID;
 		break;
 	case USB_DR_MODE_HOST:

drivers/usb/dwc3/gadget.c+24−6

 	return ret;
 }
+static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
+{
+	struct dwc3 *dwc = dep->dwc;
+	struct dwc3_gadget_ep_cmd_params params;
+	u32 cmd = DWC3_DEPCMD_CLEARSTALL;
+	/*
+	 * As of core revision 2.60a the recommended programming model
+	 * is to set the ClearPendIN bit when issuing a Clear Stall EP
+	 * command for IN endpoints. This is to prevent an issue where
+	 * some (non-compliant) hosts may not send ACK TPs for pending
+	 * IN transfers due to a mishandled error condition. Synopsys
+	 * STAR 9000614252.
+	 */
+	if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
+		cmd |= DWC3_DEPCMD_CLEARPENDIN;
+	memset(&params, 0, sizeof(params));
+	return dwc3_send_gadget_ep_cmd(dwc, dep->number, cmd, &params);
+}
 static dma_addr_t dwc3_trb_dma_offset(struct dwc3_ep *dep,
 		struct dwc3_trb *trb)
 {
 		else
 			dep->flags |= DWC3_EP_STALL;
 	} else {
-		ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
+		ret = dwc3_send_clear_stall_ep_cmd(dep);
-			DWC3_DEPCMD_CLEARSTALL, &params);
 		if (ret)
 			dev_err(dwc->dev, "failed to clear STALL on %s\n",
 					dep->name);
 	for (epnum = 1; epnum < DWC3_ENDPOINTS_NUM; epnum++) {
 		struct dwc3_ep *dep;
-		struct dwc3_gadget_ep_cmd_params params;
 		int ret;
 		dep = dwc->eps[epnum];
 		dep->flags &= ~DWC3_EP_STALL;
-		memset(&params, 0, sizeof(params));
+		ret = dwc3_send_clear_stall_ep_cmd(dep);
-		ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
-				DWC3_DEPCMD_CLEARSTALL, &params);
 		WARN_ON_ONCE(ret);
 	}
 }

drivers/usb/gadget/composite.c+13−8

@@ -1868,14 +1868,19 @@ unknown: · 1867 unmodified lines
1868	}	1868	}
1869	break;	1869	break;
1870	}	1870	}
1871	req->length = value;	1871
1872	req->context = cdev;	1872	if (value >= 0) {
1873	req->zero = value < w_length;	1873	req->length = value;
1874	value = composite_ep0_queue(cdev, req, GFP_ATOMIC);	1874	req->context = cdev;
1875	if (value < 0) {	1875	req->zero = value < w_length;
1876	DBG(cdev, "ep_queue --> %d\n", value);	1876	value = composite_ep0_queue(cdev, req,
1877	req->status = 0;	1877	GFP_ATOMIC);
1878	composite_setup_complete(gadget->ep0, req);	1878	if (value < 0) {
		1879	DBG(cdev, "ep_queue --> %d\n", value);
		1880	req->status = 0;
		1881	composite_setup_complete(gadget->ep0,
		1882	req);
		1883	}
1879	}	1884	}
1880	return value;	1885	return value;
1881	}	1886	}

drivers/usb/gadget/configfs.c+1−0

@@ -1401,6 +1401,7 @@ static const struct usb_gadget_driver configfs_driver_template = { · 1400 unmodified lines
1401	.owner = THIS_MODULE,	1401	.owner = THIS_MODULE,
1402	.name = "configfs-gadget",	1402	.name = "configfs-gadget",
1403	},	1403	},
		1404	.match_existing_only = 1,
1404	};	1405	};
1405		1406
1406	static struct config_group *gadgets_make(	1407	static struct config_group *gadgets_make(

drivers/usb/gadget/function/f_fs.c+15−15

@@ -2051,7 +2051,7 @@ static int __ffs_data_do_os_desc(enum ffs_os_desc_type type, · 2050 unmodified lines
2051		2051
2052	if (len < sizeof(*d) \|\|	2052	if (len < sizeof(*d) \|\|
2053	d->bFirstInterfaceNumber >= ffs->interfaces_count \|\|	2053	d->bFirstInterfaceNumber >= ffs->interfaces_count \|\|
2054	d->Reserved1)	2054	!d->Reserved1)
2055	return -EINVAL;	2055	return -EINVAL;
2056	for (i = 0; i < ARRAY_SIZE(d->Reserved2); ++i)	2056	for (i = 0; i < ARRAY_SIZE(d->Reserved2); ++i)
2057	if (d->Reserved2[i])	2057	if (d->Reserved2[i])
@@ -2729,6 +2729,7 @@ static int _ffs_func_bind(struct usb_configuration *c, · 671 unmodified lines
2729	func->ffs->ss_descs_count;	2729	func->ffs->ss_descs_count;
2730		2730
2731	int fs_len, hs_len, ss_len, ret, i;	2731	int fs_len, hs_len, ss_len, ret, i;
		2732	struct ffs_ep *eps_ptr;
2732		2733
2733	/* Make it a single chunk, less management later on */	2734	/* Make it a single chunk, less management later on */
2734	vla_group(d);	2735	vla_group(d);
@@ -2777,12 +2778,9 @@ static int _ffs_func_bind(struct usb_configuration *c, · 42 unmodified lines
2777	ffs->raw_descs_length);	2778	ffs->raw_descs_length);
2778		2779
2779	memset(vla_ptr(vlabuf, d, inums), 0xff, d_inums__sz);	2780	memset(vla_ptr(vlabuf, d, inums), 0xff, d_inums__sz);
2780	for (ret = ffs->eps_count; ret; --ret) {	2781	eps_ptr = vla_ptr(vlabuf, d, eps);
2781	struct ffs_ep *ptr;	2782	for (i = 0; i < ffs->eps_count; i++)
2782		2783	eps_ptr[i].num = -1;
2783	ptr = vla_ptr(vlabuf, d, eps);
2784	ptr[ret].num = -1;
2785	}
2786		2784
2787	/* Save pointers	2785	/* Save pointers
2788	* d_eps == vlabuf, func->eps used to kfree vlabuf later	2786	* d_eps == vlabuf, func->eps used to kfree vlabuf later
@@ -2851,7 +2849,7 @@ static int _ffs_func_bind(struct usb_configuration *c, · 62 unmodified lines
2851	goto error;	2849	goto error;
2852		2850
2853	func->function.os_desc_table = vla_ptr(vlabuf, d, os_desc_table);	2851	func->function.os_desc_table = vla_ptr(vlabuf, d, os_desc_table);
2854	if (c->cdev->use_os_string)	2852	if (c->cdev->use_os_string) {
2855	for (i = 0; i < ffs->interfaces_count; ++i) {	2853	for (i = 0; i < ffs->interfaces_count; ++i) {
2856	struct usb_os_desc *desc;	2854	struct usb_os_desc *desc;
2857		2855
@@ -2862,13 +2860,15 @@ static int _ffs_func_bind(struct usb_configuration *c, · 4 unmodified lines
2862	vla_ptr(vlabuf, d, ext_compat) + i * 16;	2860	vla_ptr(vlabuf, d, ext_compat) + i * 16;
2863	INIT_LIST_HEAD(&desc->ext_prop);	2861	INIT_LIST_HEAD(&desc->ext_prop);
2864	}	2862	}
2865	ret = ffs_do_os_descs(ffs->ms_os_descs_count,	2863	ret = ffs_do_os_descs(ffs->ms_os_descs_count,
2866	vla_ptr(vlabuf, d, raw_descs) +	2864	vla_ptr(vlabuf, d, raw_descs) +
2867	fs_len + hs_len + ss_len,	2865	fs_len + hs_len + ss_len,
2868	d_raw_descs__sz - fs_len - hs_len - ss_len,	2866	d_raw_descs__sz - fs_len - hs_len -
2869	__ffs_func_bind_do_os_desc, func);	2867	ss_len,
2870	if (unlikely(ret < 0))	2868	__ffs_func_bind_do_os_desc, func);
2871	goto error;	2869	if (unlikely(ret < 0))
		2870	goto error;
		2871	}
2872	func->function.os_desc_n =	2872	func->function.os_desc_n =
2873	c->cdev->use_os_string ? ffs->interfaces_count : 0;	2873	c->cdev->use_os_string ? ffs->interfaces_count : 0;
2874		2874

drivers/usb/gadget/function/f_printer.c+0−8

@@ -161,14 +161,6 @@ static struct usb_endpoint_descriptor hs_ep_out_desc = { · 160 unmodified lines
161	.wMaxPacketSize = cpu_to_le16(512)	161	.wMaxPacketSize = cpu_to_le16(512)
162	};	162	};
163		163
164	static struct usb_qualifier_descriptor dev_qualifier = {
165	.bLength = sizeof(dev_qualifier),
166	.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
167	.bcdUSB = cpu_to_le16(0x0200),
168	.bDeviceClass = USB_CLASS_PRINTER,
169	.bNumConfigurations = 1
170	};
171
172	static struct usb_descriptor_header *hs_printer_function[] = {	164	static struct usb_descriptor_header *hs_printer_function[] = {
173	(struct usb_descriptor_header *) &intf_desc,	165	(struct usb_descriptor_header *) &intf_desc,
174	(struct usb_descriptor_header *) &hs_ep_in_desc,	166	(struct usb_descriptor_header *) &hs_ep_in_desc,

drivers/usb/gadget/function/f_tcm.c+11−9

@@ -1445,16 +1445,18 @@ static void usbg_drop_tpg(struct se_portal_group *se_tpg) · 1444 unmodified lines
1445	for (i = 0; i < TPG_INSTANCES; ++i)	1445	for (i = 0; i < TPG_INSTANCES; ++i)
1446	if (tpg_instances[i].tpg == tpg)	1446	if (tpg_instances[i].tpg == tpg)
1447	break;	1447	break;
1448	if (i < TPG_INSTANCES)	1448	if (i < TPG_INSTANCES) {
1449	tpg_instances[i].tpg = NULL;	1449	tpg_instances[i].tpg = NULL;
1450	opts = container_of(tpg_instances[i].func_inst,	1450	opts = container_of(tpg_instances[i].func_inst,
1451	struct f_tcm_opts, func_inst);	1451	struct f_tcm_opts, func_inst);
1452	mutex_lock(&opts->dep_lock);	1452	mutex_lock(&opts->dep_lock);
1453	if (opts->has_dep)	1453	if (opts->has_dep)
1454	module_put(opts->dependent);	1454	module_put(opts->dependent);
1455	else	1455	else
1456	configfs_undepend_item_unlocked(&opts->func_inst.group.cg_item);	1456	configfs_undepend_item_unlocked(
1457	mutex_unlock(&opts->dep_lock);	1457	&opts->func_inst.group.cg_item);
		1458	mutex_unlock(&opts->dep_lock);
		1459	}
1458	mutex_unlock(&tpg_instances_lock);	1460	mutex_unlock(&tpg_instances_lock);
1459		1461
1460	kfree(tpg);	1462	kfree(tpg);

drivers/usb/gadget/function/f_uac2.c+1−12

 	NULL,
 };
-static struct usb_qualifier_descriptor devqual_desc = {
-	.bLength = sizeof devqual_desc,
-	.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
-	.bcdUSB = cpu_to_le16(0x200),
-	.bDeviceClass = USB_CLASS_MISC,
-	.bDeviceSubClass = 0x02,
-	.bDeviceProtocol = 0x01,
-	.bNumConfigurations = 1,
-	.bRESERVED = 0,
-};
 static struct usb_interface_assoc_descriptor iad_desc = {
 	.bLength = sizeof iad_desc,
 	.bDescriptorType = USB_DT_INTERFACE_ASSOCIATION,
 	if (control_selector == UAC2_CS_CONTROL_SAM_FREQ) {
 		struct cntrl_cur_lay3 c;
+		memset(&c, 0, sizeof(struct cntrl_cur_lay3));
 		if (entity_id == USB_IN_CLK_ID)
 			c.dCUR = p_srate;

drivers/usb/gadget/function/storage_common.c+1−3

  * USB 2.0 devices need to expose both high speed and full speed
  * descriptors, unless they only run at full speed.
  *
- * That means alternate endpoint descriptors (bigger packets)
+ * That means alternate endpoint descriptors (bigger packets).
- * and a "device qualifier" ... plus more construction options
- * for the configuration descriptor.
  */
 struct usb_endpoint_descriptor fsg_hs_bulk_in_desc = {
 	.bLength =		USB_DT_ENDPOINT_SIZE,

drivers/usb/gadget/legacy/inode.c+13−4

@@ -938,8 +938,11 @@ ep0_read (struct file fd, char __user buf, size_t len, loff_t *ptr) · 937 unmodified lines
938	struct usb_ep *ep = dev->gadget->ep0;	938	struct usb_ep *ep = dev->gadget->ep0;
939	struct usb_request *req = dev->req;	939	struct usb_request *req = dev->req;
940		940
941	if ((retval = setup_req (ep, req, 0)) == 0)	941	if ((retval = setup_req (ep, req, 0)) == 0) {
942	retval = usb_ep_queue (ep, req, GFP_ATOMIC);	942	spin_unlock_irq (&dev->lock);
		943	retval = usb_ep_queue (ep, req, GFP_KERNEL);
		944	spin_lock_irq (&dev->lock);
		945	}
943	dev->state = STATE_DEV_CONNECTED;	946	dev->state = STATE_DEV_CONNECTED;
944		947
945	/* assume that was SET_CONFIGURATION */	948	/* assume that was SET_CONFIGURATION */
@@ -1457,8 +1460,11 @@ delegate: · 511 unmodified lines
1457	w_length);	1460	w_length);
1458	if (value < 0)	1461	if (value < 0)
1459	break;	1462	break;
		1463
		1464	spin_unlock (&dev->lock);
1460	value = usb_ep_queue (gadget->ep0, dev->req,	1465	value = usb_ep_queue (gadget->ep0, dev->req,
1461	GFP_ATOMIC);	1466	GFP_KERNEL);
		1467	spin_lock (&dev->lock);
1462	if (value < 0) {	1468	if (value < 0) {
1463	clean_req (gadget->ep0, dev->req);	1469	clean_req (gadget->ep0, dev->req);
1464	break;	1470	break;
@@ -1481,11 +1487,14 @@ delegate: · 16 unmodified lines
1481	if (value >= 0 && dev->state != STATE_DEV_SETUP) {	1487	if (value >= 0 && dev->state != STATE_DEV_SETUP) {
1482	req->length = value;	1488	req->length = value;
1483	req->zero = value < w_length;	1489	req->zero = value < w_length;
1484	value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC);	1490
		1491	spin_unlock (&dev->lock);
		1492	value = usb_ep_queue (gadget->ep0, req, GFP_KERNEL);
1485	if (value < 0) {	1493	if (value < 0) {
1486	DBG (dev, "ep_queue --> %d\n", value);	1494	DBG (dev, "ep_queue --> %d\n", value);
1487	req->status = 0;	1495	req->status = 0;
1488	}	1496	}
		1497	return value;
1489	}	1498	}
1490		1499
1491	/* device stalls when value < 0 */	1500	/* device stalls when value < 0 */

drivers/usb/gadget/udc/udc-core.c+8−4

 		}
 	}
-	list_add_tail(&driver->pending, &gadget_driver_pending_list);
+	if (!driver->match_existing_only) {
-	pr_info("udc-core: couldn't find an available UDC - added [%s] to list of pending drivers\n",
+		list_add_tail(&driver->pending, &gadget_driver_pending_list);
-		driver->function);
+		pr_info("udc-core: couldn't find an available UDC - added [%s] to list of pending drivers\n",
+			driver->function);
+		ret = 0;
+	}
 	mutex_unlock(&udc_lock);
-	return 0;
+	return ret;
 found:
 	ret = udc_bind_to_driver(udc, driver);
 	mutex_unlock(&udc_lock);

drivers/usb/host/ehci-hcd.c+9−0

@@ -368,6 +368,15 @@ static void ehci_shutdown(struct usb_hcd *hcd) · 367 unmodified lines
368	{	368	{
369	struct ehci_hcd *ehci = hcd_to_ehci(hcd);	369	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
370		370
		371	/**
		372	* Protect the system from crashing at system shutdown in cases where
		373	* usb host is not added yet from OTG controller driver.
		374	* As ehci_setup() not done yet, so stop accessing registers or
		375	* variables initialized in ehci_setup()
		376	*/
		377	if (!ehci->sbrn)
		378	return;
		379
371	spin_lock_irq(&ehci->lock);	380	spin_lock_irq(&ehci->lock);
372	ehci->shutdown = true;	381	ehci->shutdown = true;
373	ehci->rh_state = EHCI_RH_STOPPING;	382	ehci->rh_state = EHCI_RH_STOPPING;

drivers/usb/host/ehci-hub.c+11−3

 ) {
 	struct ehci_hcd	*ehci = hcd_to_ehci (hcd);
 	int		ports = HCS_N_PORTS (ehci->hcs_params);
-	u32 __iomem	*status_reg = &ehci->regs->port_status[
+	u32 __iomem	*status_reg, *hostpc_reg;
-				(wIndex & 0xff) - 1];
-	u32 __iomem	*hostpc_reg = &ehci->regs->hostpc[(wIndex & 0xff) - 1];
 	u32		temp, temp1, status;
 	unsigned long	flags;
 	int		retval = 0;
 	unsigned	selector;
+	/*
+	 * Avoid underflow while calculating (wIndex & 0xff) - 1.
+	 * The compiler might deduce that wIndex can never be 0 and then
+	 * optimize away the tests for !wIndex below.
+	 */
+	temp = wIndex & 0xff;
+	temp -= (temp > 0);
+	status_reg = &ehci->regs->port_status[temp];
+	hostpc_reg = &ehci->regs->hostpc[temp];
 	/*
 	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
 	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.

drivers/usb/host/ehci-msm.c+12−2

@@ -179,22 +179,32 @@ static int ehci_msm_remove(struct platform_device *pdev) · 178 unmodified lines
179	static int ehci_msm_pm_suspend(struct device *dev)	179	static int ehci_msm_pm_suspend(struct device *dev)
180	{	180	{
181	struct usb_hcd *hcd = dev_get_drvdata(dev);	181	struct usb_hcd *hcd = dev_get_drvdata(dev);
		182	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
182	bool do_wakeup = device_may_wakeup(dev);	183	bool do_wakeup = device_may_wakeup(dev);
183		184
184	dev_dbg(dev, "ehci-msm PM suspend\n");	185	dev_dbg(dev, "ehci-msm PM suspend\n");
185		186
186	return ehci_suspend(hcd, do_wakeup);	187	/* Only call ehci_suspend if ehci_setup has been done */
		188	if (ehci->sbrn)
		189	return ehci_suspend(hcd, do_wakeup);
		190
		191	return 0;
187	}	192	}
188		193
189	static int ehci_msm_pm_resume(struct device *dev)	194	static int ehci_msm_pm_resume(struct device *dev)
190	{	195	{
191	struct usb_hcd *hcd = dev_get_drvdata(dev);	196	struct usb_hcd *hcd = dev_get_drvdata(dev);
		197	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
192		198
193	dev_dbg(dev, "ehci-msm PM resume\n");	199	dev_dbg(dev, "ehci-msm PM resume\n");
194	ehci_resume(hcd, false);	200
		201	/* Only call ehci_resume if ehci_setup has been done */
		202	if (ehci->sbrn)
		203	ehci_resume(hcd, false);
195		204
196	return 0;	205	return 0;
197	}	206	}
		207
198	#else	208	#else
199	#define ehci_msm_pm_suspend NULL	209	#define ehci_msm_pm_suspend NULL
200	#define ehci_msm_pm_resume NULL	210	#define ehci_msm_pm_resume NULL

drivers/usb/host/ehci-tegra.c+13−3

 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
 	struct tegra_ehci_hcd *tegra =
 		(struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
+	bool has_utmi_pad_registers = false;
 	phy_np = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
 	if (!phy_np)
 		return -ENOENT;
+	if (of_property_read_bool(phy_np, "nvidia,has-utmi-pad-registers"))
+		has_utmi_pad_registers = true;
 	if (!usb1_reset_attempted) {
 		struct reset_control *usb1_reset;
-		usb1_reset = of_reset_control_get(phy_np, "usb");
+		if (!has_utmi_pad_registers)
+			usb1_reset = of_reset_control_get(phy_np, "utmi-pads");
+		else
+			usb1_reset = tegra->rst;
 		if (IS_ERR(usb1_reset)) {
 			dev_warn(&pdev->dev,
 				 "can't get utmi-pads reset from the PHY\n");
 			reset_control_assert(usb1_reset);
 			udelay(1);
 			reset_control_deassert(usb1_reset);
+			if (!has_utmi_pad_registers)
+				reset_control_put(usb1_reset);
 		}
-		reset_control_put(usb1_reset);
 		usb1_reset_attempted = true;
 	}
-	if (!of_property_read_bool(phy_np, "nvidia,has-utmi-pad-registers")) {
+	if (!has_utmi_pad_registers) {
 		reset_control_assert(tegra->rst);
 		udelay(1);
 		reset_control_deassert(tegra->rst);

drivers/usb/host/ohci-q.c+2−1

 {
 	int	branch;
-	ed->state = ED_OPER;
 	ed->ed_prev = NULL;
 	ed->ed_next = NULL;
 	ed->hwNextED = 0;
 	/* the HC may not see the schedule updates yet, but if it does
 	 * then they'll be properly ordered.
 	 */
+	ed->state = ED_OPER;
 	return 0;
 }

drivers/usb/host/xhci-pci.c+5−0

 /* Device for a quirk */
 #define PCI_VENDOR_ID_FRESCO_LOGIC	0x1b73
 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK	0x1000
+#define PCI_DEVICE_ID_FRESCO_LOGIC_FL1009	0x1009
 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400	0x1400
 #define PCI_VENDOR_ID_ETRON		0x1b6f
 		xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 	}
+	if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
+			pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1009)
+		xhci->quirks |= XHCI_BROKEN_STREAMS;
 	if (pdev->vendor == PCI_VENDOR_ID_NEC)
 		xhci->quirks |= XHCI_NEC_HOST;

drivers/usb/host/xhci-plat.c+3−0

 		ret = clk_prepare_enable(clk);
 		if (ret)
 			goto put_hcd;
+	} else if (PTR_ERR(clk) == -EPROBE_DEFER) {
+		ret = -EPROBE_DEFER;
+		goto put_hcd;
 	}
 	xhci = hcd_to_xhci(hcd);

drivers/usb/host/xhci-ring.c+24−6

 	temp_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
 	xhci->cmd_ring_state = CMD_RING_STATE_ABORTED;
+	/*
+	 * Writing the CMD_RING_ABORT bit should cause a cmd completion event,
+	 * however on some host hw the CMD_RING_RUNNING bit is correctly cleared
+	 * but the completion event in never sent. Use the cmd timeout timer to
+	 * handle those cases. Use twice the time to cover the bit polling retry
+	 */
+	mod_timer(&xhci->cmd_timer, jiffies + (2 * XHCI_CMD_DEFAULT_TIMEOUT));
 	xhci_write_64(xhci, temp_64 | CMD_RING_ABORT,
 			&xhci->op_regs->cmd_ring);
 		xhci_err(xhci, "Stopped the command ring failed, "
 				"maybe the host is dead\n");
+		del_timer(&xhci->cmd_timer);
 		xhci->xhc_state |= XHCI_STATE_DYING;
 		xhci_quiesce(xhci);
 		xhci_halt(xhci);
 	int ret;
 	unsigned long flags;
 	u64 hw_ring_state;
-	struct xhci_command *cur_cmd = NULL;
+	bool second_timeout = false;
 	xhci = (struct xhci_hcd *) data;
 	/* mark this command to be cancelled */
 	spin_lock_irqsave(&xhci->lock, flags);
 	if (xhci->current_cmd) {
-		cur_cmd = xhci->current_cmd;
+		if (xhci->current_cmd->status == COMP_CMD_ABORT)
-		cur_cmd->status = COMP_CMD_ABORT;
+			second_timeout = true;
+		xhci->current_cmd->status = COMP_CMD_ABORT;
 	}
 	/* Make sure command ring is running before aborting it */
 	hw_ring_state = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
 	if ((xhci->cmd_ring_state & CMD_RING_STATE_RUNNING) &&
 	    (hw_ring_state & CMD_RING_RUNNING))  {
 		spin_unlock_irqrestore(&xhci->lock, flags);
 		xhci_dbg(xhci, "Command timeout\n");
 		ret = xhci_abort_cmd_ring(xhci);
 		}
 		return;
 	}
+	/* command ring failed to restart, or host removed. Bail out */
+	if (second_timeout || xhci->xhc_state & XHCI_STATE_REMOVING) {
+		spin_unlock_irqrestore(&xhci->lock, flags);
+		xhci_dbg(xhci, "command timed out twice, ring start fail?\n");
+		xhci_cleanup_command_queue(xhci);
+		return;
+	}
 	/* command timeout on stopped ring, ring can't be aborted */
 	xhci_dbg(xhci, "Command timeout on stopped ring\n");
 	xhci_handle_stopped_cmd_ring(xhci, xhci->current_cmd);
 		writel(irq_pending, &xhci->ir_set->irq_pending);
 	}
-	if (xhci->xhc_state & XHCI_STATE_DYING) {
+	if (xhci->xhc_state & XHCI_STATE_DYING ||
+	    xhci->xhc_state & XHCI_STATE_HALTED) {
 		xhci_dbg(xhci, "xHCI dying, ignoring interrupt. "
 				"Shouldn't IRQs be disabled?\n");
 		/* Clear the event handler busy flag (RW1C);

drivers/usb/host/xhci.c+16−13

@@ -685,20 +685,23 @@ void xhci_stop(struct usb_hcd *hcd) · 684 unmodified lines
685	u32 temp;	685	u32 temp;
686	struct xhci_hcd *xhci = hcd_to_xhci(hcd);	686	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
687		687
688	if (xhci->xhc_state & XHCI_STATE_HALTED)
689	return;
690
691	mutex_lock(&xhci->mutex);	688	mutex_lock(&xhci->mutex);
692	spin_lock_irq(&xhci->lock);
693	xhci->xhc_state \|= XHCI_STATE_HALTED;
694	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
695		689
696	/* Make sure the xHC is halted for a USB3 roothub	690	if (!(xhci->xhc_state & XHCI_STATE_HALTED)) {
697	* (xhci_stop() could be called as part of failed init).	691	spin_lock_irq(&xhci->lock);
698	*/	692
699	xhci_halt(xhci);	693	xhci->xhc_state \|= XHCI_STATE_HALTED;
700	xhci_reset(xhci);	694	xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
701	spin_unlock_irq(&xhci->lock);	695	xhci_halt(xhci);
		696	xhci_reset(xhci);
		697
		698	spin_unlock_irq(&xhci->lock);
		699	}
		700
		701	if (!usb_hcd_is_primary_hcd(hcd)) {
		702	mutex_unlock(&xhci->mutex);
		703	return;
		704	}
702		705
703	xhci_cleanup_msix(xhci);	706	xhci_cleanup_msix(xhci);
704		707
@@ -4886,7 +4889,7 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) · 4181 unmodified lines
4886	xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);	4889	xhci->hcc_params2 = readl(&xhci->cap_regs->hcc_params2);
4887	xhci_print_registers(xhci);	4890	xhci_print_registers(xhci);
4888		4891
4889	xhci->quirks = quirks;	4892	xhci->quirks \|= quirks;
4890		4893
4891	get_quirks(dev, xhci);	4894	get_quirks(dev, xhci);
4892		4895

drivers/usb/musb/musb_core.c+37−48

@@ -1090,29 +1090,6 @@ void musb_stop(struct musb *musb) · 1089 unmodified lines
1090	musb_platform_try_idle(musb, 0);	1090	musb_platform_try_idle(musb, 0);
1091	}	1091	}
1092		1092
1093	static void musb_shutdown(struct platform_device *pdev)
1094	{
1095	struct musb *musb = dev_to_musb(&pdev->dev);
1096	unsigned long flags;
1097
1098	pm_runtime_get_sync(musb->controller);
1099
1100	musb_host_cleanup(musb);
1101	musb_gadget_cleanup(musb);
1102
1103	spin_lock_irqsave(&musb->lock, flags);
1104	musb_platform_disable(musb);
1105	musb_generic_disable(musb);
1106	spin_unlock_irqrestore(&musb->lock, flags);
1107
1108	musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
1109	musb_platform_exit(musb);
1110
1111	pm_runtime_put(musb->controller);
1112	/* FIXME power down */
1113	}
1114
1115
1116	/-------------------------------------------------------------------------/	1093	/-------------------------------------------------------------------------/
1117		1094
1118	/*	1095	/*
@@ -1702,7 +1679,7 @@ EXPORT_SYMBOL_GPL(musb_dma_completion); · 583 unmodified lines
1702	#define use_dma 0	1679	#define use_dma 0
1703	#endif	1680	#endif
1704		1681
1705	static void (*musb_phy_callback)(enum musb_vbus_id_status status);	1682	static int (*musb_phy_callback)(enum musb_vbus_id_status status);
1706		1683
1707	/*	1684	/*
1708	* musb_mailbox - optional phy notifier function	1685	* musb_mailbox - optional phy notifier function
@@ -1711,11 +1688,12 @@ static void (*musb_phy_callback)(enum musb_vbus_id_status status); · 2 unmodified lines
1711	* Optionally gets called from the USB PHY. Note that the USB PHY must be	1688	* Optionally gets called from the USB PHY. Note that the USB PHY must be
1712	* disabled at the point the phy_callback is registered or unregistered.	1689	* disabled at the point the phy_callback is registered or unregistered.
1713	*/	1690	*/
1714	void musb_mailbox(enum musb_vbus_id_status status)	1691	int musb_mailbox(enum musb_vbus_id_status status)
1715	{	1692	{
1716	if (musb_phy_callback)	1693	if (musb_phy_callback)
1717	musb_phy_callback(status);	1694	return musb_phy_callback(status);
1718		1695
		1696	return -ENODEV;
1719	};	1697	};
1720	EXPORT_SYMBOL_GPL(musb_mailbox);	1698	EXPORT_SYMBOL_GPL(musb_mailbox);
1721		1699
@@ -2028,11 +2006,6 @@ musb_init_controller(struct device dev, int nIrq, void __iomem ctrl) · 306 unmodified lines
2028	musb_readl = musb_default_readl;	2006	musb_readl = musb_default_readl;
2029	musb_writel = musb_default_writel;	2007	musb_writel = musb_default_writel;
2030		2008
2031	/* We need musb_read/write functions initialized for PM */
2032	pm_runtime_use_autosuspend(musb->controller);
2033	pm_runtime_set_autosuspend_delay(musb->controller, 200);
2034	pm_runtime_enable(musb->controller);
2035
2036	/* The musb_platform_init() call:	2009	/* The musb_platform_init() call:
2037	* - adjusts musb->mregs	2010	* - adjusts musb->mregs
2038	* - sets the musb->isr	2011	* - sets the musb->isr
@@ -2134,6 +2107,16 @@ musb_init_controller(struct device dev, int nIrq, void __iomem ctrl) · 95 unmodified lines
2134	if (musb->ops->phy_callback)	2107	if (musb->ops->phy_callback)
2135	musb_phy_callback = musb->ops->phy_callback;	2108	musb_phy_callback = musb->ops->phy_callback;
2136		2109
		2110	/*
		2111	* We need musb_read/write functions initialized for PM.
		2112	* Note that at least 2430 glue needs autosuspend delay
		2113	* somewhere above 300 ms for the hardware to idle properly
		2114	* after disconnecting the cable in host mode. Let's use
		2115	* 500 ms for some margin.
		2116	*/
		2117	pm_runtime_use_autosuspend(musb->controller);
		2118	pm_runtime_set_autosuspend_delay(musb->controller, 500);
		2119	pm_runtime_enable(musb->controller);
2137	pm_runtime_get_sync(musb->controller);	2120	pm_runtime_get_sync(musb->controller);
2138		2121
2139	status = usb_phy_init(musb->xceiv);	2122	status = usb_phy_init(musb->xceiv);
@@ -2237,13 +2220,8 @@ musb_init_controller(struct device dev, int nIrq, void __iomem ctrl) · 97 unmodified lines
2237	if (status)	2220	if (status)
2238	goto fail5;	2221	goto fail5;
2239		2222
2240	pm_runtime_put(musb->controller);	2223	pm_runtime_mark_last_busy(musb->controller);
2241		2224	pm_runtime_put_autosuspend(musb->controller);
2242	/*
2243	* For why this is currently needed, see commit 3e43a0725637
2244	* ("usb: musb: core: add pm_runtime_irq_safe()")
2245	*/
2246	pm_runtime_irq_safe(musb->controller);
2247		2225
2248	return 0;	2226	return 0;
2249		2227
@@ -2265,7 +2243,9 @@ fail2_5: · 15 unmodified lines
2265	usb_phy_shutdown(musb->xceiv);	2243	usb_phy_shutdown(musb->xceiv);
2266		2244
2267	err_usb_phy_init:	2245	err_usb_phy_init:
		2246	pm_runtime_dont_use_autosuspend(musb->controller);
2268	pm_runtime_put_sync(musb->controller);	2247	pm_runtime_put_sync(musb->controller);
		2248	pm_runtime_disable(musb->controller);
2269		2249
2270	fail2:	2250	fail2:
2271	if (musb->irq_wake)	2251	if (musb->irq_wake)
@@ -2273,7 +2253,6 @@ fail2: · 1 unmodified line
2273	musb_platform_exit(musb);	2253	musb_platform_exit(musb);
2274		2254
2275	fail1:	2255	fail1:
2276	pm_runtime_disable(musb->controller);
2277	dev_err(musb->controller,	2256	dev_err(musb->controller,
2278	"musb_init_controller failed with status %d\n", status);	2257	"musb_init_controller failed with status %d\n", status);
2279		2258
@@ -2312,6 +2291,7 @@ static int musb_remove(struct platform_device *pdev) · 32 unmodified lines
2312	{	2291	{
2313	struct device *dev = &pdev->dev;	2292	struct device *dev = &pdev->dev;
2314	struct musb *musb = dev_to_musb(dev);	2293	struct musb *musb = dev_to_musb(dev);
		2294	unsigned long flags;
2315		2295
2316	/* this gets called on rmmod.	2296	/* this gets called on rmmod.
2317	* - Host mode: host may still be active	2297	* - Host mode: host may still be active
@@ -2319,17 +2299,26 @@ static int musb_remove(struct platform_device *pdev) · 1 unmodified line
2319	* - OTG mode: both roles are deactivated (or never-activated)	2299	* - OTG mode: both roles are deactivated (or never-activated)
2320	*/	2300	*/
2321	musb_exit_debugfs(musb);	2301	musb_exit_debugfs(musb);
2322	musb_shutdown(pdev);
2323	musb_phy_callback = NULL;
2324
2325	if (musb->dma_controller)
2326	musb_dma_controller_destroy(musb->dma_controller);
2327
2328	usb_phy_shutdown(musb->xceiv);
2329		2302
2330	cancel_work_sync(&musb->irq_work);	2303	cancel_work_sync(&musb->irq_work);
2331	cancel_delayed_work_sync(&musb->finish_resume_work);	2304	cancel_delayed_work_sync(&musb->finish_resume_work);
2332	cancel_delayed_work_sync(&musb->deassert_reset_work);	2305	cancel_delayed_work_sync(&musb->deassert_reset_work);
		2306	pm_runtime_get_sync(musb->controller);
		2307	musb_host_cleanup(musb);
		2308	musb_gadget_cleanup(musb);
		2309	spin_lock_irqsave(&musb->lock, flags);
		2310	musb_platform_disable(musb);
		2311	musb_generic_disable(musb);
		2312	spin_unlock_irqrestore(&musb->lock, flags);
		2313	musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
		2314	pm_runtime_dont_use_autosuspend(musb->controller);
		2315	pm_runtime_put_sync(musb->controller);
		2316	pm_runtime_disable(musb->controller);
		2317	musb_platform_exit(musb);
		2318	musb_phy_callback = NULL;
		2319	if (musb->dma_controller)
		2320	musb_dma_controller_destroy(musb->dma_controller);
		2321	usb_phy_shutdown(musb->xceiv);
2333	musb_free(musb);	2322	musb_free(musb);
2334	device_init_wakeup(dev, 0);	2323	device_init_wakeup(dev, 0);
2335	return 0;	2324	return 0;
@@ -2429,7 +2418,8 @@ static void musb_restore_context(struct musb *musb) · 93 unmodified lines
2429	musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe);	2418	musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe);
2430	musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe);	2419	musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe);
2431	musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe);	2420	musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe);
2432	musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl);	2421	if (musb->context.devctl & MUSB_DEVCTL_SESSION)
		2422	musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl);
2433		2423
2434	for (i = 0; i < musb->config->num_eps; ++i) {	2424	for (i = 0; i < musb->config->num_eps; ++i) {
2435	struct musb_hw_ep *hw_ep;	2425	struct musb_hw_ep *hw_ep;
@@ -2612,7 +2602,6 @@ static struct platform_driver musb_driver = { · 176 unmodified lines
2612	},	2602	},
2613	.probe = musb_probe,	2603	.probe = musb_probe,
2614	.remove = musb_remove,	2604	.remove = musb_remove,
2615	.shutdown = musb_shutdown,
2616	};	2605	};
2617		2606
2618	module_platform_driver(musb_driver);	2607	module_platform_driver(musb_driver);

drivers/usb/musb/musb_core.h+2−1

 				dma_addr_t *dma_addr, u32 *len);
 	void	(*pre_root_reset_end)(struct musb *musb);
 	void	(*post_root_reset_end)(struct musb *musb);
-	void	(*phy_callback)(enum musb_vbus_id_status status);
+	int	(*phy_callback)(enum musb_vbus_id_status status);
 };
 /*
 	struct work_struct	irq_work;
 	struct delayed_work	deassert_reset_work;
 	struct delayed_work	finish_resume_work;
+	struct delayed_work	gadget_work;
 	u16			hwvers;
 	u16			intrrxe;

drivers/usb/musb/musb_gadget.c+23−11

@@ -1656,6 +1656,20 @@ static int musb_gadget_vbus_draw(struct usb_gadget *gadget, unsigned mA) · 1655 unmodified lines
1656	return usb_phy_set_power(musb->xceiv, mA);	1656	return usb_phy_set_power(musb->xceiv, mA);
1657	}	1657	}
1658		1658
		1659	static void musb_gadget_work(struct work_struct *work)
		1660	{
		1661	struct musb *musb;
		1662	unsigned long flags;
		1663
		1664	musb = container_of(work, struct musb, gadget_work.work);
		1665	pm_runtime_get_sync(musb->controller);
		1666	spin_lock_irqsave(&musb->lock, flags);
		1667	musb_pullup(musb, musb->softconnect);
		1668	spin_unlock_irqrestore(&musb->lock, flags);
		1669	pm_runtime_mark_last_busy(musb->controller);
		1670	pm_runtime_put_autosuspend(musb->controller);
		1671	}
		1672
1659	static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)	1673	static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on)
1660	{	1674	{
1661	struct musb *musb = gadget_to_musb(gadget);	1675	struct musb *musb = gadget_to_musb(gadget);
@@ -1663,20 +1677,16 @@ static int musb_gadget_pullup(struct usb_gadget *gadget, int is_on) · 1 unmodified line
1663		1677
1664	is_on = !!is_on;	1678	is_on = !!is_on;
1665		1679
1666	pm_runtime_get_sync(musb->controller);
1667
1668	/* NOTE: this assumes we are sensing vbus; we'd rather	1680	/* NOTE: this assumes we are sensing vbus; we'd rather
1669	* not pullup unless the B-session is active.	1681	* not pullup unless the B-session is active.
1670	*/	1682	*/
1671	spin_lock_irqsave(&musb->lock, flags);	1683	spin_lock_irqsave(&musb->lock, flags);
1672	if (is_on != musb->softconnect) {	1684	if (is_on != musb->softconnect) {
1673	musb->softconnect = is_on;	1685	musb->softconnect = is_on;
1674	musb_pullup(musb, is_on);	1686	schedule_delayed_work(&musb->gadget_work, 0);
1675	}	1687	}
1676	spin_unlock_irqrestore(&musb->lock, flags);	1688	spin_unlock_irqrestore(&musb->lock, flags);
1677		1689
1678	pm_runtime_put(musb->controller);
1679
1680	return 0;	1690	return 0;
1681	}	1691	}
1682		1692
@@ -1845,7 +1855,7 @@ int musb_gadget_setup(struct musb *musb) · 162 unmodified lines
1845	#elif IS_ENABLED(CONFIG_USB_MUSB_GADGET)	1855	#elif IS_ENABLED(CONFIG_USB_MUSB_GADGET)
1846	musb->g.is_otg = 0;	1856	musb->g.is_otg = 0;
1847	#endif	1857	#endif
1848		1858	INIT_DELAYED_WORK(&musb->gadget_work, musb_gadget_work);
1849	musb_g_init_endpoints(musb);	1859	musb_g_init_endpoints(musb);
1850		1860
1851	musb->is_active = 0;	1861	musb->is_active = 0;
@@ -1866,6 +1876,8 @@ void musb_gadget_cleanup(struct musb *musb) · 14 unmodified lines
1866	{	1876	{
1867	if (musb->port_mode == MUSB_PORT_MODE_HOST)	1877	if (musb->port_mode == MUSB_PORT_MODE_HOST)
1868	return;	1878	return;
		1879
		1880	cancel_delayed_work_sync(&musb->gadget_work);
1869	usb_del_gadget_udc(&musb->g);	1881	usb_del_gadget_udc(&musb->g);
1870	}	1882	}
1871		1883
@@ -1914,8 +1926,8 @@ static int musb_gadget_start(struct usb_gadget *g, · 42 unmodified lines
1914	if (musb->xceiv->last_event == USB_EVENT_ID)	1926	if (musb->xceiv->last_event == USB_EVENT_ID)
1915	musb_platform_set_vbus(musb, 1);	1927	musb_platform_set_vbus(musb, 1);
1916		1928
1917	if (musb->xceiv->last_event == USB_EVENT_NONE)	1929	pm_runtime_mark_last_busy(musb->controller);
1918	pm_runtime_put(musb->controller);	1930	pm_runtime_put_autosuspend(musb->controller);
1919		1931
1920	return 0;	1932	return 0;
1921		1933
@@ -1934,8 +1946,7 @@ static int musb_gadget_stop(struct usb_gadget *g) · 12 unmodified lines
1934	struct musb *musb = gadget_to_musb(g);	1946	struct musb *musb = gadget_to_musb(g);
1935	unsigned long flags;	1947	unsigned long flags;
1936		1948
1937	if (musb->xceiv->last_event == USB_EVENT_NONE)	1949	pm_runtime_get_sync(musb->controller);
1938	pm_runtime_get_sync(musb->controller);
1939		1950
1940	/*	1951	/*
1941	* REVISIT always use otg_set_peripheral() here too;	1952	* REVISIT always use otg_set_peripheral() here too;
@@ -1963,7 +1974,8 @@ static int musb_gadget_stop(struct usb_gadget *g) · 21 unmodified lines
1963	* that currently misbehaves.	1974	* that currently misbehaves.
1964	*/	1975	*/
1965		1976
1966	pm_runtime_put(musb->controller);	1977	pm_runtime_mark_last_busy(musb->controller);
		1978	pm_runtime_put_autosuspend(musb->controller);
1967		1979
1968	return 0;	1980	return 0;
1969	}	1981	}

drivers/usb/musb/musb_host.c+37−31

 		}
 	}
-	if (qh != NULL && qh->is_ready) {
+	/*
+	 * The pipe must be broken if current urb->status is set, so don't
+	 * start next urb.
+	 * TODO: to minimize the risk of regression, only check urb->status
+	 * for RX, until we have a test case to understand the behavior of TX.
+	 */
+	if ((!status || !is_in) && qh && qh->is_ready) {
 		dev_dbg(musb->controller, "... next ep%d %cX urb %p\n",
 		    hw_ep->epnum, is_in ? 'R' : 'T', next_urb(qh));
 		musb_start_urb(musb, is_in, qh);
 		musb_writew(ep->regs, MUSB_TXCSR, 0);
 	/* scrub all previous state, clearing toggle */
-	} else {
-		csr = musb_readw(ep->regs, MUSB_RXCSR);
-		if (csr & MUSB_RXCSR_RXPKTRDY)
-			WARNING("rx%d, packet/%d ready?\n", ep->epnum,
-				musb_readw(ep->regs, MUSB_RXCOUNT));
-		musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG);
 	}
+	csr = musb_readw(ep->regs, MUSB_RXCSR);
+	if (csr & MUSB_RXCSR_RXPKTRDY)
+		WARNING("rx%d, packet/%d ready?\n", ep->epnum,
+			musb_readw(ep->regs, MUSB_RXCOUNT));
+	musb_h_flush_rxfifo(ep, MUSB_RXCSR_CLRDATATOG);
 	/* target addr and (for multipoint) hub addr/port */
 	if (musb->is_multipoint) {
 	ep->rx_reinit = 0;
 }
-static int musb_tx_dma_set_mode_mentor(struct dma_controller *dma,
+static void musb_tx_dma_set_mode_mentor(struct dma_controller *dma,
 		struct musb_hw_ep *hw_ep, struct musb_qh *qh,
 		struct urb *urb, u32 offset,
 		u32 *length, u8 *mode)
 	}
 	channel->desired_mode = *mode;
 	musb_writew(epio, MUSB_TXCSR, csr);
-	return 0;
 }
-static int musb_tx_dma_set_mode_cppi_tusb(struct dma_controller *dma,
+static void musb_tx_dma_set_mode_cppi_tusb(struct dma_controller *dma,
-					  struct musb_hw_ep *hw_ep,
+					   struct musb_hw_ep *hw_ep,
-					  struct musb_qh *qh,
+					   struct musb_qh *qh,
-					  struct urb *urb,
+					   struct urb *urb,
-					  u32 offset,
+					   u32 offset,
-					  u32 *length,
+					   u32 *length,
-					  u8 *mode)
+					   u8 *mode)
 {
 	struct dma_channel *channel = hw_ep->tx_channel;
-	if (!is_cppi_enabled(hw_ep->musb) && !tusb_dma_omap(hw_ep->musb))
-		return -ENODEV;
 	channel->actual_len = 0;
 	/*
 	 * to identify the zero-length-final-packet case.
 	 */
 	*mode = (urb->transfer_flags & URB_ZERO_PACKET) ? 1 : 0;
-	return 0;
 }
 static bool musb_tx_dma_program(struct dma_controller *dma,
 	struct dma_channel	*channel = hw_ep->tx_channel;
 	u16			pkt_size = qh->maxpacket;
 	u8			mode;
-	int			res;
 	if (musb_dma_inventra(hw_ep->musb) || musb_dma_ux500(hw_ep->musb))
-		res = musb_tx_dma_set_mode_mentor(dma, hw_ep, qh, urb,
+		musb_tx_dma_set_mode_mentor(dma, hw_ep, qh, urb, offset,
-						 offset, &length, &mode);
+					    &length, &mode);
+	else if (is_cppi_enabled(hw_ep->musb) || tusb_dma_omap(hw_ep->musb))
+		musb_tx_dma_set_mode_cppi_tusb(dma, hw_ep, qh, urb, offset,
+					       &length, &mode);
 	else
-		res = musb_tx_dma_set_mode_cppi_tusb(dma, hw_ep, qh, urb,
-						     offset, &length, &mode);
-	if (res)
 		return false;
 	qh->segsize = length;
 	if (is_in) {
 		dma = is_dma_capable() ? ep->rx_channel : NULL;
-		/* clear nak timeout bit */
+		/*
+		 * Need to stop the transaction by clearing REQPKT first
+		 * then the NAK Timeout bit ref MUSBMHDRC USB 2.0 HIGH-SPEED
+		 * DUAL-ROLE CONTROLLER Programmer's Guide, section 9.2.2
+		 */
 		rx_csr = musb_readw(epio, MUSB_RXCSR);
 		rx_csr |= MUSB_RXCSR_H_WZC_BITS;
+		rx_csr &= ~MUSB_RXCSR_H_REQPKT;
+		musb_writew(epio, MUSB_RXCSR, rx_csr);
 		rx_csr &= ~MUSB_RXCSR_DATAERROR;
 		musb_writew(epio, MUSB_RXCSR, rx_csr);
 				  struct urb *urb,
 				  size_t len)
 {
-	struct dma_channel *channel = hw_ep->tx_channel;
+	struct dma_channel *channel = hw_ep->rx_channel;
 	void __iomem *epio = hw_ep->regs;
 	dma_addr_t *buf;
 	u32 length, res;
 		status = -EPROTO;
 		musb_writeb(epio, MUSB_RXINTERVAL, 0);
+		rx_csr &= ~MUSB_RXCSR_H_ERROR;
+		musb_writew(epio, MUSB_RXCSR, rx_csr);
 	} else if (rx_csr & MUSB_RXCSR_DATAERROR) {
 		if (USB_ENDPOINT_XFER_ISOC != qh->type) {

drivers/usb/musb/omap2430.c+89−168

@@ -49,97 +49,14 @@ struct omap2430_glue { · 48 unmodified lines
49	enum musb_vbus_id_status status;	49	enum musb_vbus_id_status status;
50	struct work_struct omap_musb_mailbox_work;	50	struct work_struct omap_musb_mailbox_work;
51	struct device *control_otghs;	51	struct device *control_otghs;
		52	bool cable_connected;
		53	bool enabled;
		54	bool powered;
52	};	55	};
53	#define glue_to_musb(g) platform_get_drvdata(g->musb)	56	#define glue_to_musb(g) platform_get_drvdata(g->musb)
54		57
55	static struct omap2430_glue *_glue;	58	static struct omap2430_glue *_glue;
56		59
57	static struct timer_list musb_idle_timer;
58
59	static void musb_do_idle(unsigned long _musb)
60	{
61	struct musb musb = (void )_musb;
62	unsigned long flags;
63	u8 power;
64	u8 devctl;
65
66	spin_lock_irqsave(&musb->lock, flags);
67
68	switch (musb->xceiv->otg->state) {
69	case OTG_STATE_A_WAIT_BCON:
70
71	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
72	if (devctl & MUSB_DEVCTL_BDEVICE) {
73	musb->xceiv->otg->state = OTG_STATE_B_IDLE;
74	MUSB_DEV_MODE(musb);
75	} else {
76	musb->xceiv->otg->state = OTG_STATE_A_IDLE;
77	MUSB_HST_MODE(musb);
78	}
79	break;
80	case OTG_STATE_A_SUSPEND:
81	/* finish RESUME signaling? */
82	if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
83	power = musb_readb(musb->mregs, MUSB_POWER);
84	power &= ~MUSB_POWER_RESUME;
85	dev_dbg(musb->controller, "root port resume stopped, power %02x\n", power);
86	musb_writeb(musb->mregs, MUSB_POWER, power);
87	musb->is_active = 1;
88	musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
89	\| MUSB_PORT_STAT_RESUME);
90	musb->port1_status \|= USB_PORT_STAT_C_SUSPEND << 16;
91	usb_hcd_poll_rh_status(musb->hcd);
92	/* NOTE: it might really be A_WAIT_BCON ... */
93	musb->xceiv->otg->state = OTG_STATE_A_HOST;
94	}
95	break;
96	case OTG_STATE_A_HOST:
97	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
98	if (devctl & MUSB_DEVCTL_BDEVICE)
99	musb->xceiv->otg->state = OTG_STATE_B_IDLE;
100	else
101	musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
102	default:
103	break;
104	}
105	spin_unlock_irqrestore(&musb->lock, flags);
106	}
107
108
109	static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
110	{
111	unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
112	static unsigned long last_timer;
113
114	if (timeout == 0)
115	timeout = default_timeout;
116
117	/* Never idle if active, or when VBUS timeout is not set as host */
118	if (musb->is_active \|\| ((musb->a_wait_bcon == 0)
119	&& (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON))) {
120	dev_dbg(musb->controller, "%s active, deleting timer\n",
121	usb_otg_state_string(musb->xceiv->otg->state));
122	del_timer(&musb_idle_timer);
123	last_timer = jiffies;
124	return;
125	}
126
127	if (time_after(last_timer, timeout)) {
128	if (!timer_pending(&musb_idle_timer))
129	last_timer = timeout;
130	else {
131	dev_dbg(musb->controller, "Longer idle timer already pending, ignoring\n");
132	return;
133	}
134	}
135	last_timer = timeout;
136
137	dev_dbg(musb->controller, "%s inactive, for idle timer for %lu ms\n",
138	usb_otg_state_string(musb->xceiv->otg->state),
139	(unsigned long)jiffies_to_msecs(timeout - jiffies));
140	mod_timer(&musb_idle_timer, timeout);
141	}
142
143	static void omap2430_musb_set_vbus(struct musb *musb, int is_on)	60	static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
144	{	61	{
145	struct usb_otg *otg = musb->xceiv->otg;	62	struct usb_otg *otg = musb->xceiv->otg;
@@ -205,16 +122,6 @@ static void omap2430_musb_set_vbus(struct musb *musb, int is_on) · 59 unmodified lines
205	musb_readb(musb->mregs, MUSB_DEVCTL));	122	musb_readb(musb->mregs, MUSB_DEVCTL));
206	}	123	}
207		124
208	static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
209	{
210	u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
211
212	devctl \|= MUSB_DEVCTL_SESSION;
213	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
214
215	return 0;
216	}
217
218	static inline void omap2430_low_level_exit(struct musb *musb)	125	static inline void omap2430_low_level_exit(struct musb *musb)
219	{	126	{
220	u32 l;	127	u32 l;
@@ -234,22 +141,63 @@ static inline void omap2430_low_level_init(struct musb *musb) · 13 unmodified lines
234	musb_writel(musb->mregs, OTG_FORCESTDBY, l);	141	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
235	}	142	}
236		143
237	static void omap2430_musb_mailbox(enum musb_vbus_id_status status)	144	/*
		145	* We can get multiple cable events so we need to keep track
		146	* of the power state. Only keep power enabled if USB cable is
		147	* connected and a gadget is started.
		148	*/
		149	static void omap2430_set_power(struct musb *musb, bool enabled, bool cable)
		150	{
		151	struct device *dev = musb->controller;
		152	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
		153	bool power_up;
		154	int res;
		155
		156	if (glue->enabled != enabled)
		157	glue->enabled = enabled;
		158
		159	if (glue->cable_connected != cable)
		160	glue->cable_connected = cable;
		161
		162	power_up = glue->enabled && glue->cable_connected;
		163	if (power_up == glue->powered) {
		164	dev_warn(musb->controller, "power state already %i\n",
		165	power_up);
		166	return;
		167	}
		168
		169	glue->powered = power_up;
		170
		171	if (power_up) {
		172	res = pm_runtime_get_sync(musb->controller);
		173	if (res < 0) {
		174	dev_err(musb->controller, "could not enable: %i", res);
		175	glue->powered = false;
		176	}
		177	} else {
		178	pm_runtime_mark_last_busy(musb->controller);
		179	pm_runtime_put_autosuspend(musb->controller);
		180	}
		181	}
		182
		183	static int omap2430_musb_mailbox(enum musb_vbus_id_status status)
238	{	184	{
239	struct omap2430_glue *glue = _glue;	185	struct omap2430_glue *glue = _glue;
240		186
241	if (!glue) {	187	if (!glue) {
242	pr_err("%s: musb core is not yet initialized\n", __func__);	188	pr_err("%s: musb core is not yet initialized\n", __func__);
243	return;	189	return -EPROBE_DEFER;
244	}	190	}
245	glue->status = status;	191	glue->status = status;
246		192
247	if (!glue_to_musb(glue)) {	193	if (!glue_to_musb(glue)) {
248	pr_err("%s: musb core is not yet ready\n", __func__);	194	pr_err("%s: musb core is not yet ready\n", __func__);
249	return;	195	return -EPROBE_DEFER;
250	}	196	}
251		197
252	schedule_work(&glue->omap_musb_mailbox_work);	198	schedule_work(&glue->omap_musb_mailbox_work);
		199
		200	return 0;
253	}	201	}
254		202
255	static void omap_musb_set_mailbox(struct omap2430_glue *glue)	203	static void omap_musb_set_mailbox(struct omap2430_glue *glue)
@@ -259,6 +207,13 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue) · 3 unmodified lines
259	struct musb_hdrc_platform_data *pdata = dev_get_platdata(dev);	207	struct musb_hdrc_platform_data *pdata = dev_get_platdata(dev);
260	struct omap_musb_board_data *data = pdata->board_data;	208	struct omap_musb_board_data *data = pdata->board_data;
261	struct usb_otg *otg = musb->xceiv->otg;	209	struct usb_otg *otg = musb->xceiv->otg;
		210	bool cable_connected;
		211
		212	cable_connected = ((glue->status == MUSB_ID_GROUND) \|\|
		213	(glue->status == MUSB_VBUS_VALID));
		214
		215	if (cable_connected)
		216	omap2430_set_power(musb, glue->enabled, cable_connected);
262		217
263	switch (glue->status) {	218	switch (glue->status) {
264	case MUSB_ID_GROUND:	219	case MUSB_ID_GROUND:
@@ -268,7 +223,6 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue) · 3 unmodified lines
268	musb->xceiv->otg->state = OTG_STATE_A_IDLE;	223	musb->xceiv->otg->state = OTG_STATE_A_IDLE;
269	musb->xceiv->last_event = USB_EVENT_ID;	224	musb->xceiv->last_event = USB_EVENT_ID;
270	if (musb->gadget_driver) {	225	if (musb->gadget_driver) {
271	pm_runtime_get_sync(dev);
272	omap_control_usb_set_mode(glue->control_otghs,	226	omap_control_usb_set_mode(glue->control_otghs,
273	USB_MODE_HOST);	227	USB_MODE_HOST);
274	omap2430_musb_set_vbus(musb, 1);	228	omap2430_musb_set_vbus(musb, 1);
@@ -281,8 +235,6 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue) · 6 unmodified lines
281	otg->default_a = false;	235	otg->default_a = false;
282	musb->xceiv->otg->state = OTG_STATE_B_IDLE;	236	musb->xceiv->otg->state = OTG_STATE_B_IDLE;
283	musb->xceiv->last_event = USB_EVENT_VBUS;	237	musb->xceiv->last_event = USB_EVENT_VBUS;
284	if (musb->gadget_driver)
285	pm_runtime_get_sync(dev);
286	omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);	238	omap_control_usb_set_mode(glue->control_otghs, USB_MODE_DEVICE);
287	break;	239	break;
288		240
@@ -291,11 +243,8 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue) · 2 unmodified lines
291	dev_dbg(dev, "VBUS Disconnect\n");	243	dev_dbg(dev, "VBUS Disconnect\n");
292		244
293	musb->xceiv->last_event = USB_EVENT_NONE;	245	musb->xceiv->last_event = USB_EVENT_NONE;
294	if (musb->gadget_driver) {	246	if (musb->gadget_driver)
295	omap2430_musb_set_vbus(musb, 0);	247	omap2430_musb_set_vbus(musb, 0);
296	pm_runtime_mark_last_busy(dev);
297	pm_runtime_put_autosuspend(dev);
298	}
299		248
300	if (data->interface_type == MUSB_INTERFACE_UTMI)	249	if (data->interface_type == MUSB_INTERFACE_UTMI)
301	otg_set_vbus(musb->xceiv->otg, 0);	250	otg_set_vbus(musb->xceiv->otg, 0);
@@ -307,6 +256,9 @@ static void omap_musb_set_mailbox(struct omap2430_glue *glue) · 5 unmodified lines
307	dev_dbg(dev, "ID float\n");	256	dev_dbg(dev, "ID float\n");
308	}	257	}
309		258
		259	if (!cable_connected)
		260	omap2430_set_power(musb, glue->enabled, cable_connected);
		261
310	atomic_notifier_call_chain(&musb->xceiv->notifier,	262	atomic_notifier_call_chain(&musb->xceiv->notifier,
311	musb->xceiv->last_event, NULL);	263	musb->xceiv->last_event, NULL);
312	}	264	}
@@ -316,13 +268,8 @@ static void omap_musb_mailbox_work(struct work_struct *mailbox_work) · 3 unmodified lines
316	{	268	{
317	struct omap2430_glue *glue = container_of(mailbox_work,	269	struct omap2430_glue *glue = container_of(mailbox_work,
318	struct omap2430_glue, omap_musb_mailbox_work);	270	struct omap2430_glue, omap_musb_mailbox_work);
319	struct musb *musb = glue_to_musb(glue);
320	struct device *dev = musb->controller;
321		271
322	pm_runtime_get_sync(dev);
323	omap_musb_set_mailbox(glue);	272	omap_musb_set_mailbox(glue);
324	pm_runtime_mark_last_busy(dev);
325	pm_runtime_put_autosuspend(dev);
326	}	273	}
327		274
328	static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)	275	static irqreturn_t omap2430_musb_interrupt(int irq, void *__hci)
@@ -389,23 +336,7 @@ static int omap2430_musb_init(struct musb *musb) · 60 unmodified lines
389	return PTR_ERR(musb->phy);	336	return PTR_ERR(musb->phy);
390	}	337	}
391	musb->isr = omap2430_musb_interrupt;	338	musb->isr = omap2430_musb_interrupt;
392		339	phy_init(musb->phy);
393	/*
394	* Enable runtime PM for musb parent (this driver). We can't
395	* do it earlier as struct musb is not yet allocated and we
396	* need to touch the musb registers for runtime PM.
397	*/
398	pm_runtime_enable(glue->dev);
399	status = pm_runtime_get_sync(glue->dev);
400	if (status < 0)
401	goto err1;
402
403	status = pm_runtime_get_sync(dev);
404	if (status < 0) {
405	dev_err(dev, "pm_runtime_get_sync FAILED %d\n", status);
406	pm_runtime_put_sync(glue->dev);
407	goto err1;
408	}
409		340
410	l = musb_readl(musb->mregs, OTG_INTERFSEL);	341	l = musb_readl(musb->mregs, OTG_INTERFSEL);
411		342
@@ -427,20 +358,10 @@ static int omap2430_musb_init(struct musb *musb) · 15 unmodified lines
427	musb_readl(musb->mregs, OTG_INTERFSEL),	358	musb_readl(musb->mregs, OTG_INTERFSEL),
428	musb_readl(musb->mregs, OTG_SIMENABLE));	359	musb_readl(musb->mregs, OTG_SIMENABLE));
429		360
430	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
431
432	if (glue->status != MUSB_UNKNOWN)	361	if (glue->status != MUSB_UNKNOWN)
433	omap_musb_set_mailbox(glue);	362	omap_musb_set_mailbox(glue);
434		363
435	phy_init(musb->phy);
436	phy_power_on(musb->phy);
437
438	pm_runtime_put_noidle(musb->controller);
439	pm_runtime_put_noidle(glue->dev);
440	return 0;	364	return 0;
441
442	err1:
443	return status;
444	}	365	}
445		366
446	static void omap2430_musb_enable(struct musb *musb)	367	static void omap2430_musb_enable(struct musb *musb)
@@ -452,6 +373,11 @@ static void omap2430_musb_enable(struct musb *musb) · 5 unmodified lines
452	struct musb_hdrc_platform_data *pdata = dev_get_platdata(dev);	373	struct musb_hdrc_platform_data *pdata = dev_get_platdata(dev);
453	struct omap_musb_board_data *data = pdata->board_data;	374	struct omap_musb_board_data *data = pdata->board_data;
454		375
		376	if (!WARN_ON(!musb->phy))
		377	phy_power_on(musb->phy);
		378
		379	omap2430_set_power(musb, true, glue->cable_connected);
		380
455	switch (glue->status) {	381	switch (glue->status) {
456		382
457	case MUSB_ID_GROUND:	383	case MUSB_ID_GROUND:
@@ -487,18 +413,25 @@ static void omap2430_musb_disable(struct musb *musb) · 29 unmodified lines
487	struct device *dev = musb->controller;	413	struct device *dev = musb->controller;
488	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);	414	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
489		415
		416	if (!WARN_ON(!musb->phy))
		417	phy_power_off(musb->phy);
		418
490	if (glue->status != MUSB_UNKNOWN)	419	if (glue->status != MUSB_UNKNOWN)
491	omap_control_usb_set_mode(glue->control_otghs,	420	omap_control_usb_set_mode(glue->control_otghs,
492	USB_MODE_DISCONNECT);	421	USB_MODE_DISCONNECT);
		422
		423	omap2430_set_power(musb, false, glue->cable_connected);
493	}	424	}
494		425
495	static int omap2430_musb_exit(struct musb *musb)	426	static int omap2430_musb_exit(struct musb *musb)
496	{	427	{
497	del_timer_sync(&musb_idle_timer);	428	struct device *dev = musb->controller;
		429	struct omap2430_glue *glue = dev_get_drvdata(dev->parent);
498		430
499	omap2430_low_level_exit(musb);	431	omap2430_low_level_exit(musb);
500	phy_power_off(musb->phy);
501	phy_exit(musb->phy);	432	phy_exit(musb->phy);
		433	musb->phy = NULL;
		434	cancel_work_sync(&glue->omap_musb_mailbox_work);
502		435
503	return 0;	436	return 0;
504	}	437	}
@@ -512,9 +445,6 @@ static const struct musb_platform_ops omap2430_ops = { · 7 unmodified lines
512	.init = omap2430_musb_init,	445	.init = omap2430_musb_init,
513	.exit = omap2430_musb_exit,	446	.exit = omap2430_musb_exit,
514		447
515	.set_mode = omap2430_musb_set_mode,
516	.try_idle = omap2430_musb_try_idle,
517
518	.set_vbus = omap2430_musb_set_vbus,	448	.set_vbus = omap2430_musb_set_vbus,
519		449
520	.enable = omap2430_musb_enable,	450	.enable = omap2430_musb_enable,
@@ -639,11 +569,9 @@ static int omap2430_probe(struct platform_device *pdev) · 118 unmodified lines
639	goto err2;	569	goto err2;
640	}	570	}
641		571
642	/*	572	pm_runtime_enable(glue->dev);
643	* Note that we cannot enable PM runtime yet for this	573	pm_runtime_use_autosuspend(glue->dev);
644	* driver as we need struct musb initialized first.	574	pm_runtime_set_autosuspend_delay(glue->dev, 500);
645	* See omap2430_musb_init above.
646	*/
647		575
648	ret = platform_device_add(musb);	576	ret = platform_device_add(musb);
649	if (ret) {	577	if (ret) {
@@ -662,12 +590,14 @@ err0: · 12 unmodified lines
662		590
663	static int omap2430_remove(struct platform_device *pdev)	591	static int omap2430_remove(struct platform_device *pdev)
664	{	592	{
665	struct omap2430_glue *glue = platform_get_drvdata(pdev);	593	struct omap2430_glue *glue = platform_get_drvdata(pdev);
		594	struct musb *musb = glue_to_musb(glue);
666		595
667	pm_runtime_get_sync(glue->dev);	596	pm_runtime_get_sync(glue->dev);
668	cancel_work_sync(&glue->omap_musb_mailbox_work);
669	platform_device_unregister(glue->musb);	597	platform_device_unregister(glue->musb);
		598	omap2430_set_power(musb, false, false);
670	pm_runtime_put_sync(glue->dev);	599	pm_runtime_put_sync(glue->dev);
		600	pm_runtime_dont_use_autosuspend(glue->dev);
671	pm_runtime_disable(glue->dev);	601	pm_runtime_disable(glue->dev);
672		602
673	return 0;	603	return 0;
@@ -680,12 +610,13 @@ static int omap2430_runtime_suspend(struct device *dev) · 6 unmodified lines
680	struct omap2430_glue *glue = dev_get_drvdata(dev);	610	struct omap2430_glue *glue = dev_get_drvdata(dev);
681	struct musb *musb = glue_to_musb(glue);	611	struct musb *musb = glue_to_musb(glue);
682		612
683	if (musb) {	613	if (!musb)
684	musb->context.otg_interfsel = musb_readl(musb->mregs,	614	return 0;
685	OTG_INTERFSEL);
686		615
687	omap2430_low_level_exit(musb);	616	musb->context.otg_interfsel = musb_readl(musb->mregs,
688	}	617	OTG_INTERFSEL);
		618
		619	omap2430_low_level_exit(musb);
689		620
690	return 0;	621	return 0;
691	}	622	}
@@ -696,7 +627,7 @@ static int omap2430_runtime_resume(struct device *dev) · 4 unmodified lines
696	struct musb *musb = glue_to_musb(glue);	627	struct musb *musb = glue_to_musb(glue);
697		628
698	if (!musb)	629	if (!musb)
699	return -EPROBE_DEFER;	630	return 0;
700		631
701	omap2430_low_level_init(musb);	632	omap2430_low_level_init(musb);
702	musb_writel(musb->mregs, OTG_INTERFSEL,	633	musb_writel(musb->mregs, OTG_INTERFSEL,
@@ -738,18 +669,8 @@ static struct platform_driver omap2430_driver = { · 35 unmodified lines
738	},	669	},
739	};	670	};
740		671
		672	module_platform_driver(omap2430_driver);
		673
741	MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");	674	MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
742	MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");	675	MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
743	MODULE_LICENSE("GPL v2");	676	MODULE_LICENSE("GPL v2");
744
745	static int __init omap2430_init(void)
746	{
747	return platform_driver_register(&omap2430_driver);
748	}
749	subsys_initcall(omap2430_init);
750
751	static void __exit omap2430_exit(void)
752	{
753	platform_driver_unregister(&omap2430_driver);
754	}
755	module_exit(omap2430_exit);

drivers/usb/musb/sunxi.c+34−20

 struct sunxi_glue {
 	struct device		*dev;
-	struct platform_device	*musb;
+	struct musb		*musb;
+	struct platform_device	*musb_pdev;
 	struct clk		*clk;
 	struct reset_control	*rst;
 	struct phy		*phy;
 		return;
 	if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) {
-		struct musb *musb = platform_get_drvdata(glue->musb);
+		struct musb *musb = glue->musb;
 		unsigned long flags;
 		u8 devctl;
 		if (test_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags)) {
 			set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags);
 			musb->xceiv->otg->default_a = 1;
-			musb->xceiv->otg->state = OTG_STATE_A_IDLE;
+			musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
 			MUSB_HST_MODE(musb);
 			devctl |= MUSB_DEVCTL_SESSION;
 		} else {
 {
 	struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent);
-	if (is_on)
+	if (is_on) {
 		set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags);
-	else
+		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
+	} else {
 		clear_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags);
+	}
 	schedule_work(&glue->work);
 }
 	if (ret)
 		goto error_unregister_notifier;
-	if (musb->port_mode == MUSB_PORT_MODE_HOST) {
-		ret = phy_power_on(glue->phy);
-		if (ret)
-			goto error_phy_exit;
-		set_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags);
-		/* Stop musb work from turning vbus off again */
-		set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags);
-	}
 	musb->isr = sunxi_musb_interrupt;
 	/* Stop the musb-core from doing runtime pm (not supported on sunxi) */
 	return 0;
-error_phy_exit:
-	phy_exit(glue->phy);
 error_unregister_notifier:
 	if (musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
 		extcon_unregister_notifier(glue->extcon, EXTCON_USB_HOST,
 	return 0;
 }
+static int sunxi_set_mode(struct musb *musb, u8 mode)
+{
+	struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent);
+	int ret;
+	if (mode == MUSB_HOST) {
+		ret = phy_power_on(glue->phy);
+		if (ret)
+			return ret;
+		set_bit(SUNXI_MUSB_FL_PHY_ON, &glue->flags);
+		/* Stop musb work from turning vbus off again */
+		set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags);
+		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
+	}
+	return 0;
+}
 static void sunxi_musb_enable(struct musb *musb)
 {
 	struct sunxi_glue *glue = dev_get_drvdata(musb->controller->parent);
+	glue->musb = musb;
 	/* musb_core does not call us in a balanced manner */
 	if (test_and_set_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags))
 		return;
 	.exit		= sunxi_musb_exit,
 	.enable		= sunxi_musb_enable,
 	.disable	= sunxi_musb_disable,
+	.set_mode	= sunxi_set_mode,
 	.fifo_offset	= sunxi_musb_fifo_offset,
 	.ep_offset	= sunxi_musb_ep_offset,
 	.busctl_offset	= sunxi_musb_busctl_offset,
 	pinfo.data	= &pdata;
 	pinfo.size_data = sizeof(pdata);
-	glue->musb = platform_device_register_full(&pinfo);
+	glue->musb_pdev = platform_device_register_full(&pinfo);
-	if (IS_ERR(glue->musb)) {
+	if (IS_ERR(glue->musb_pdev)) {
-		ret = PTR_ERR(glue->musb);
+		ret = PTR_ERR(glue->musb_pdev);
 		dev_err(&pdev->dev, "Error registering musb dev: %d\n", ret);
 		goto err_unregister_usb_phy;
 	}
 	struct sunxi_glue *glue = platform_get_drvdata(pdev);
 	struct platform_device *usb_phy = glue->usb_phy;
-	platform_device_unregister(glue->musb); /* Frees glue ! */
+	platform_device_unregister(glue->musb_pdev);
 	usb_phy_generic_unregister(usb_phy);
 	return 0;

drivers/usb/phy/phy-twl6030-usb.c+24−5

 	struct regulator		*usb3v3;
+	/* used to check initial cable status after probe */
+	struct delayed_work	get_status_work;
 	/* used to set vbus, in atomic path */
 	struct work_struct	set_vbus_work;
 			twl->asleep = 1;
 			status = MUSB_VBUS_VALID;
 			twl->linkstat = status;
-			musb_mailbox(status);
+			ret = musb_mailbox(status);
+			if (ret)
+				twl->linkstat = MUSB_UNKNOWN;
 		} else {
 			if (twl->linkstat != MUSB_UNKNOWN) {
 				status = MUSB_VBUS_OFF;
 				twl->linkstat = status;
-				musb_mailbox(status);
+				ret = musb_mailbox(status);
+				if (ret)
+					twl->linkstat = MUSB_UNKNOWN;
 				if (twl->asleep) {
 					regulator_disable(twl->usb3v3);
 					twl->asleep = 0;
 		twl6030_writeb(twl, TWL_MODULE_USB, 0x10, USB_ID_INT_EN_HI_SET);
 		status = MUSB_ID_GROUND;
 		twl->linkstat = status;
-		musb_mailbox(status);
+		ret = musb_mailbox(status);
+		if (ret)
+			twl->linkstat = MUSB_UNKNOWN;
 	} else  {
 		twl6030_writeb(twl, TWL_MODULE_USB, 0x10, USB_ID_INT_EN_HI_CLR);
 		twl6030_writeb(twl, TWL_MODULE_USB, 0x1, USB_ID_INT_EN_HI_SET);
 	return IRQ_HANDLED;
 }
+static void twl6030_status_work(struct work_struct *work)
+{
+	struct twl6030_usb *twl = container_of(work, struct twl6030_usb,
+					       get_status_work.work);
+	twl6030_usb_irq(twl->irq2, twl);
+	twl6030_usbotg_irq(twl->irq1, twl);
+}
 static int twl6030_enable_irq(struct twl6030_usb *twl)
 {
 	twl6030_writeb(twl, TWL_MODULE_USB, 0x1, USB_ID_INT_EN_HI_SET);
 				REG_INT_MSK_LINE_C);
 	twl6030_interrupt_unmask(TWL6030_CHARGER_CTRL_INT_MASK,
 				REG_INT_MSK_STS_C);
-	twl6030_usb_irq(twl->irq2, twl);
-	twl6030_usbotg_irq(twl->irq1, twl);
 	return 0;
 }
 		dev_warn(&pdev->dev, "could not create sysfs file\n");
 	INIT_WORK(&twl->set_vbus_work, otg_set_vbus_work);
+	INIT_DELAYED_WORK(&twl->get_status_work, twl6030_status_work);
 	status = request_threaded_irq(twl->irq1, NULL, twl6030_usbotg_irq,
 			IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING | IRQF_ONESHOT,
 	twl->asleep = 0;
 	twl6030_enable_irq(twl);
+	schedule_delayed_work(&twl->get_status_work, HZ);
 	dev_info(&pdev->dev, "Initialized TWL6030 USB module\n");
 	return 0;
 {
 	struct twl6030_usb *twl = platform_get_drvdata(pdev);
+	cancel_delayed_work(&twl->get_status_work);
 	twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,
 		REG_INT_MSK_LINE_C);
 	twl6030_interrupt_mask(TWL6030_USBOTG_INT_MASK,

drivers/usb/serial/mos7720.c+1−0

@@ -2007,6 +2007,7 @@ static void mos7720_release(struct usb_serial *serial) · 2006 unmodified lines
2007	urblist_entry)	2007	urblist_entry)
2008	usb_unlink_urb(urbtrack->urb);	2008	usb_unlink_urb(urbtrack->urb);
2009	spin_unlock_irqrestore(&mos_parport->listlock, flags);	2009	spin_unlock_irqrestore(&mos_parport->listlock, flags);
		2010	parport_del_port(mos_parport->pp);
2010		2011
2011	kref_put(&mos_parport->ref_count, destroy_mos_parport);	2012	kref_put(&mos_parport->ref_count, destroy_mos_parport);
2012	}	2013	}

drivers/usb/storage/uas.c+1−1

 	if (devinfo->flags & US_FL_BROKEN_FUA)
 		sdev->broken_fua = 1;
+	scsi_change_queue_depth(sdev, devinfo->qdepth - 2);
 	return 0;
 }
 	.slave_configure = uas_slave_configure,
 	.eh_abort_handler = uas_eh_abort_handler,
 	.eh_bus_reset_handler = uas_eh_bus_reset_handler,
-	.can_queue = MAX_CMNDS,
 	.this_id = -1,
 	.sg_tablesize = SG_NONE,
 	.skip_settle_delay = 1,

drivers/usb/usbip/vhci_hcd.c+1−1

@@ -941,7 +941,7 @@ static void vhci_stop(struct usb_hcd *hcd) · 940 unmodified lines
941		941
942	static int vhci_get_frame_number(struct usb_hcd *hcd)	942	static int vhci_get_frame_number(struct usb_hcd *hcd)
943	{	943	{
944	pr_err("Not yet implemented\n");	944	dev_err_ratelimited(&hcd->self.root_hub->dev, "Not yet implemented\n");
945	return 0;	945	return 0;
946	}	946	}
947		947

drivers/watchdog/Kconfig+1−1

@@ -746,7 +746,7 @@ config ALIM7101_WDT · 745 unmodified lines
746		746
747	config EBC_C384_WDT	747	config EBC_C384_WDT
748	tristate "WinSystems EBC-C384 Watchdog Timer"	748	tristate "WinSystems EBC-C384 Watchdog Timer"
749	depends on X86 && ISA	749	depends on X86 && ISA_BUS_API
750	select WATCHDOG_CORE	750	select WATCHDOG_CORE
751	help	751	help
752	Enables watchdog timer support for the watchdog timer on the	752	Enables watchdog timer support for the watchdog timer on the

fs/binfmt_elf.c+1−1

@@ -2275,7 +2275,7 @@ static int elf_core_dump(struct coredump_params *cprm) · 2274 unmodified lines
2275	goto end_coredump;	2275	goto end_coredump;
2276		2276
2277	/* Align to page */	2277	/* Align to page */
2278	if (!dump_skip(cprm, dataoff - cprm->file->f_pos))	2278	if (!dump_skip(cprm, dataoff - cprm->pos))
2279	goto end_coredump;	2279	goto end_coredump;
2280		2280
2281	for (i = 0, vma = first_vma(current, gate_vma); vma != NULL;	2281	for (i = 0, vma = first_vma(current, gate_vma); vma != NULL;

fs/binfmt_elf_fdpic.c+1−1

@@ -1787,7 +1787,7 @@ static int elf_fdpic_core_dump(struct coredump_params *cprm) · 1786 unmodified lines
1787	goto end_coredump;	1787	goto end_coredump;
1788	}	1788	}
1789		1789
1790	if (!dump_skip(cprm, dataoff - cprm->file->f_pos))	1790	if (!dump_skip(cprm, dataoff - cprm->pos))
1791	goto end_coredump;	1791	goto end_coredump;
1792		1792
1793	if (!elf_fdpic_dump_segments(cprm))	1793	if (!elf_fdpic_dump_segments(cprm))

fs/btrfs/check-integrity.c+1−1

@@ -2645,7 +2645,7 @@ static void btrfsic_dump_tree_sub(const struct btrfsic_state *state, · 2644 unmodified lines
2645	* This algorithm is recursive because the amount of used stack space	2645	* This algorithm is recursive because the amount of used stack space
2646	* is very small and the max recursion depth is limited.	2646	* is very small and the max recursion depth is limited.
2647	*/	2647	*/
2648	indent_add = sprintf(buf, "%c-%llu(%s/%llu/%d)",	2648	indent_add = sprintf(buf, "%c-%llu(%s/%llu/%u)",
2649	btrfsic_get_block_type(state, block),	2649	btrfsic_get_block_type(state, block),
2650	block->logical_bytenr, block->dev_state->name,	2650	block->logical_bytenr, block->dev_state->name,
2651	block->dev_bytenr, block->mirror_num);	2651	block->dev_bytenr, block->mirror_num);

fs/btrfs/ctree.c+10−3

 	if (tm->op == MOD_LOG_KEY_REMOVE_WHILE_FREEING) {
 		BUG_ON(tm->slot != 0);
-		eb_rewin = alloc_dummy_extent_buffer(fs_info, eb->start);
+		eb_rewin = alloc_dummy_extent_buffer(fs_info, eb->start,
+						eb->len);
 		if (!eb_rewin) {
 			btrfs_tree_read_unlock_blocking(eb);
 			free_extent_buffer(eb);
 	} else if (old_root) {
 		btrfs_tree_read_unlock(eb_root);
 		free_extent_buffer(eb_root);
-		eb = alloc_dummy_extent_buffer(root->fs_info, logical);
+		eb = alloc_dummy_extent_buffer(root->fs_info, logical,
+					root->nodesize);
 	} else {
 		btrfs_set_lock_blocking_rw(eb_root, BTRFS_READ_LOCK);
 		eb = btrfs_clone_extent_buffer(eb_root);
 		       trans->transid, root->fs_info->generation);
 	if (!should_cow_block(trans, root, buf)) {
+		trans->dirty = true;
 		*cow_ret = buf;
 		return 0;
 	}
 		if (!btrfs_buffer_uptodate(tmp, 0, 0))
 			ret = -EIO;
 		free_extent_buffer(tmp);
+	} else {
+		ret = PTR_ERR(tmp);
 	}
 	return ret;
 }
 			 * then we don't want to set the path blocking,
 			 * so we test it here
 			 */
-			if (!should_cow_block(trans, root, b))
+			if (!should_cow_block(trans, root, b)) {
+				trans->dirty = true;
 				goto cow_done;
+			}
 			/*
 			 * must have write locks on this node and the

fs/btrfs/disk-io.c+32−22

@@ -1098,7 +1098,7 @@ void readahead_tree_block(struct btrfs_root *root, u64 bytenr) · 1097 unmodified lines
1098	struct inode *btree_inode = root->fs_info->btree_inode;	1098	struct inode *btree_inode = root->fs_info->btree_inode;
1099		1099
1100	buf = btrfs_find_create_tree_block(root, bytenr);	1100	buf = btrfs_find_create_tree_block(root, bytenr);
1101	if (!buf)	1101	if (IS_ERR(buf))
1102	return;	1102	return;
1103	read_extent_buffer_pages(&BTRFS_I(btree_inode)->io_tree,	1103	read_extent_buffer_pages(&BTRFS_I(btree_inode)->io_tree,
1104	buf, 0, WAIT_NONE, btree_get_extent, 0);	1104	buf, 0, WAIT_NONE, btree_get_extent, 0);
@@ -1114,7 +1114,7 @@ int reada_tree_block_flagged(struct btrfs_root *root, u64 bytenr, · 9 unmodified lines
1114	int ret;	1114	int ret;
1115		1115
1116	buf = btrfs_find_create_tree_block(root, bytenr);	1116	buf = btrfs_find_create_tree_block(root, bytenr);
1117	if (!buf)	1117	if (IS_ERR(buf))
1118	return 0;	1118	return 0;
1119		1119
1120	set_bit(EXTENT_BUFFER_READAHEAD, &buf->bflags);	1120	set_bit(EXTENT_BUFFER_READAHEAD, &buf->bflags);
@@ -1147,7 +1147,8 @@ struct extent_buffer btrfs_find_create_tree_block(struct btrfs_root root, · 26 unmodified lines
1147	u64 bytenr)	1147	u64 bytenr)
1148	{	1148	{
1149	if (btrfs_test_is_dummy_root(root))	1149	if (btrfs_test_is_dummy_root(root))
1150	return alloc_test_extent_buffer(root->fs_info, bytenr);	1150	return alloc_test_extent_buffer(root->fs_info, bytenr,
		1151	root->nodesize);
1151	return alloc_extent_buffer(root->fs_info, bytenr);	1152	return alloc_extent_buffer(root->fs_info, bytenr);
1152	}	1153	}
1153		1154
@@ -1171,8 +1172,8 @@ struct extent_buffer read_tree_block(struct btrfs_root root, u64 bytenr, · 17 unmodified lines
1171	int ret;	1172	int ret;
1172		1173
1173	buf = btrfs_find_create_tree_block(root, bytenr);	1174	buf = btrfs_find_create_tree_block(root, bytenr);
1174	if (!buf)	1175	if (IS_ERR(buf))
1175	return ERR_PTR(-ENOMEM);	1176	return buf;
1176		1177
1177	ret = btree_read_extent_buffer_pages(root, buf, 0, parent_transid);	1178	ret = btree_read_extent_buffer_pages(root, buf, 0, parent_transid);
1178	if (ret) {	1179	if (ret) {
@@ -1314,14 +1315,16 @@ static struct btrfs_root btrfs_alloc_root(struct btrfs_fs_info fs_info, · 135 unmodified lines
1314		1315
1315	#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS	1316	#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
1316	/* Should only be used by the testing infrastructure */	1317	/* Should only be used by the testing infrastructure */
1317	struct btrfs_root *btrfs_alloc_dummy_root(void)	1318	struct btrfs_root *btrfs_alloc_dummy_root(u32 sectorsize, u32 nodesize)
1318	{	1319	{
1319	struct btrfs_root *root;	1320	struct btrfs_root *root;
1320		1321
1321	root = btrfs_alloc_root(NULL, GFP_KERNEL);	1322	root = btrfs_alloc_root(NULL, GFP_KERNEL);
1322	if (!root)	1323	if (!root)
1323	return ERR_PTR(-ENOMEM);	1324	return ERR_PTR(-ENOMEM);
1324	__setup_root(4096, 4096, 4096, root, NULL, 1);	1325	/* We don't use the stripesize in selftest, set it as sectorsize */
		1326	__setup_root(nodesize, sectorsize, sectorsize, root, NULL,
		1327	BTRFS_ROOT_TREE_OBJECTID);
1325	set_bit(BTRFS_ROOT_DUMMY_ROOT, &root->state);	1328	set_bit(BTRFS_ROOT_DUMMY_ROOT, &root->state);
1326	root->alloc_bytenr = 0;	1329	root->alloc_bytenr = 0;
1327		1330
@@ -1803,6 +1806,13 @@ static int cleaner_kthread(void *arg) · 475 unmodified lines
1803	if (btrfs_need_cleaner_sleep(root))	1806	if (btrfs_need_cleaner_sleep(root))
1804	goto sleep;	1807	goto sleep;
1805		1808
		1809	/*
		1810	* Do not do anything if we might cause open_ctree() to block
		1811	* before we have finished mounting the filesystem.
		1812	*/
		1813	if (!root->fs_info->open)
		1814	goto sleep;
		1815
1806	if (!mutex_trylock(&root->fs_info->cleaner_mutex))	1816	if (!mutex_trylock(&root->fs_info->cleaner_mutex))
1807	goto sleep;	1817	goto sleep;
1808		1818
@@ -2517,7 +2527,6 @@ int open_ctree(struct super_block *sb, · 708 unmodified lines
2517	int num_backups_tried = 0;	2527	int num_backups_tried = 0;
2518	int backup_index = 0;	2528	int backup_index = 0;
2519	int max_active;	2529	int max_active;
2520	bool cleaner_mutex_locked = false;
2521		2530
2522	tree_root = fs_info->tree_root = btrfs_alloc_root(fs_info, GFP_KERNEL);	2531	tree_root = fs_info->tree_root = btrfs_alloc_root(fs_info, GFP_KERNEL);
2523	chunk_root = fs_info->chunk_root = btrfs_alloc_root(fs_info, GFP_KERNEL);	2532	chunk_root = fs_info->chunk_root = btrfs_alloc_root(fs_info, GFP_KERNEL);
@@ -2996,13 +3005,6 @@ retry_root_backup: · 472 unmodified lines
2996	goto fail_sysfs;	3005	goto fail_sysfs;
2997	}	3006	}
2998		3007
2999	/*
3000	* Hold the cleaner_mutex thread here so that we don't block
3001	* for a long time on btrfs_recover_relocation. cleaner_kthread
3002	* will wait for us to finish mounting the filesystem.
3003	*/
3004	mutex_lock(&fs_info->cleaner_mutex);
3005	cleaner_mutex_locked = true;
3006	fs_info->cleaner_kthread = kthread_run(cleaner_kthread, tree_root,	3008	fs_info->cleaner_kthread = kthread_run(cleaner_kthread, tree_root,
3007	"btrfs-cleaner");	3009	"btrfs-cleaner");
3008	if (IS_ERR(fs_info->cleaner_kthread))	3010	if (IS_ERR(fs_info->cleaner_kthread))
@@ -3062,8 +3064,10 @@ retry_root_backup: · 53 unmodified lines
3062	ret = btrfs_cleanup_fs_roots(fs_info);	3064	ret = btrfs_cleanup_fs_roots(fs_info);
3063	if (ret)	3065	if (ret)
3064	goto fail_qgroup;	3066	goto fail_qgroup;
3065	/* We locked cleaner_mutex before creating cleaner_kthread. */	3067
		3068	mutex_lock(&fs_info->cleaner_mutex);
3066	ret = btrfs_recover_relocation(tree_root);	3069	ret = btrfs_recover_relocation(tree_root);
		3070	mutex_unlock(&fs_info->cleaner_mutex);
3067	if (ret < 0) {	3071	if (ret < 0) {
3068	btrfs_warn(fs_info, "failed to recover relocation: %d",	3072	btrfs_warn(fs_info, "failed to recover relocation: %d",
3069	ret);	3073	ret);
@@ -3071,8 +3075,6 @@ retry_root_backup: · 1 unmodified line
3071	goto fail_qgroup;	3075	goto fail_qgroup;
3072	}	3076	}
3073	}	3077	}
3074	mutex_unlock(&fs_info->cleaner_mutex);
3075	cleaner_mutex_locked = false;
3076		3078
3077	location.objectid = BTRFS_FS_TREE_OBJECTID;	3079	location.objectid = BTRFS_FS_TREE_OBJECTID;
3078	location.type = BTRFS_ROOT_ITEM_KEY;	3080	location.type = BTRFS_ROOT_ITEM_KEY;
@@ -3186,10 +3188,6 @@ fail_cleaner: · 107 unmodified lines
3186	filemap_write_and_wait(fs_info->btree_inode->i_mapping);	3188	filemap_write_and_wait(fs_info->btree_inode->i_mapping);
3187		3189
3188	fail_sysfs:	3190	fail_sysfs:
3189	if (cleaner_mutex_locked) {
3190	mutex_unlock(&fs_info->cleaner_mutex);
3191	cleaner_mutex_locked = false;
3192	}
3193	btrfs_sysfs_remove_mounted(fs_info);	3191	btrfs_sysfs_remove_mounted(fs_info);
3194		3192
3195	fail_fsdev_sysfs:	3193	fail_fsdev_sysfs:
@@ -4130,6 +4128,18 @@ static int btrfs_check_super_valid(struct btrfs_fs_info *fs_info, · 934 unmodified lines
4130	* Hint to catch really bogus numbers, bitflips or so, more exact checks are	4128	* Hint to catch really bogus numbers, bitflips or so, more exact checks are
4131	* done later	4129	* done later
4132	*/	4130	*/
		4131	if (btrfs_super_bytes_used(sb) < 6 * btrfs_super_nodesize(sb)) {
		4132	btrfs_err(fs_info, "bytes_used is too small %llu",
		4133	btrfs_super_bytes_used(sb));
		4134	ret = -EINVAL;
		4135	}
		4136	if (!is_power_of_2(btrfs_super_stripesize(sb)) \|\|
		4137	((btrfs_super_stripesize(sb) != sectorsize) &&
		4138	(btrfs_super_stripesize(sb) != 4096))) {
		4139	btrfs_err(fs_info, "invalid stripesize %u",
		4140	btrfs_super_stripesize(sb));
		4141	ret = -EINVAL;
		4142	}
4133	if (btrfs_super_num_devices(sb) > (1UL << 31))	4143	if (btrfs_super_num_devices(sb) > (1UL << 31))
4134	printk(KERN_WARNING "BTRFS: suspicious number of devices: %llu\n",	4144	printk(KERN_WARNING "BTRFS: suspicious number of devices: %llu\n",
4135	btrfs_super_num_devices(sb));	4145	btrfs_super_num_devices(sb));

fs/btrfs/disk-io.h+1−1

@@ -90,7 +90,7 @@ void btrfs_drop_and_free_fs_root(struct btrfs_fs_info *fs_info, · 89 unmodified lines
90	void btrfs_free_fs_root(struct btrfs_root *root);	90	void btrfs_free_fs_root(struct btrfs_root *root);
91		91
92	#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS	92	#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
93	struct btrfs_root *btrfs_alloc_dummy_root(void);	93	struct btrfs_root *btrfs_alloc_dummy_root(u32 sectorsize, u32 nodesize);
94	#endif	94	#endif
95		95
96	/*	96	/*

fs/btrfs/extent-tree.c+7−5

@@ -8016,8 +8016,9 @@ btrfs_init_new_buffer(struct btrfs_trans_handle trans, struct btrfs_root root, · 8015 unmodified lines
8016	struct extent_buffer *buf;	8016	struct extent_buffer *buf;
8017		8017
8018	buf = btrfs_find_create_tree_block(root, bytenr);	8018	buf = btrfs_find_create_tree_block(root, bytenr);
8019	if (!buf)	8019	if (IS_ERR(buf))
8020	return ERR_PTR(-ENOMEM);	8020	return buf;
		8021
8021	btrfs_set_header_generation(buf, trans->transid);	8022	btrfs_set_header_generation(buf, trans->transid);
8022	btrfs_set_buffer_lockdep_class(root->root_key.objectid, buf, level);	8023	btrfs_set_buffer_lockdep_class(root->root_key.objectid, buf, level);
8023	btrfs_tree_lock(buf);	8024	btrfs_tree_lock(buf);
@@ -8044,7 +8045,7 @@ btrfs_init_new_buffer(struct btrfs_trans_handle trans, struct btrfs_root root, · 20 unmodified lines
8044	set_extent_dirty(&trans->transaction->dirty_pages, buf->start,	8045	set_extent_dirty(&trans->transaction->dirty_pages, buf->start,
8045	buf->start + buf->len - 1, GFP_NOFS);	8046	buf->start + buf->len - 1, GFP_NOFS);
8046	}	8047	}
8047	trans->blocks_used++;	8048	trans->dirty = true;
8048	/* this returns a buffer locked for blocking */	8049	/* this returns a buffer locked for blocking */
8049	return buf;	8050	return buf;
8050	}	8051	}
@@ -8659,8 +8660,9 @@ static noinline int do_walk_down(struct btrfs_trans_handle *trans, · 608 unmodified lines
8659	next = btrfs_find_tree_block(root->fs_info, bytenr);	8660	next = btrfs_find_tree_block(root->fs_info, bytenr);
8660	if (!next) {	8661	if (!next) {
8661	next = btrfs_find_create_tree_block(root, bytenr);	8662	next = btrfs_find_create_tree_block(root, bytenr);
8662	if (!next)	8663	if (IS_ERR(next))
8663	return -ENOMEM;	8664	return PTR_ERR(next);
		8665
8664	btrfs_set_buffer_lockdep_class(root->root_key.objectid, next,	8666	btrfs_set_buffer_lockdep_class(root->root_key.objectid, next,
8665	level - 1);	8667	level - 1);
8666	reada = 1;	8668	reada = 1;

fs/btrfs/extent_io.c+17−8

 }
 struct extent_buffer *alloc_dummy_extent_buffer(struct btrfs_fs_info *fs_info,
-						u64 start)
+						u64 start, u32 nodesize)
 {
 	unsigned long len;
 	if (!fs_info) {
 		/*
 		 * Called only from tests that don't always have a fs_info
-		 * available, but we know that nodesize is 4096
+		 * available
 		 */
-		len = 4096;
+		len = nodesize;
 	} else {
 		len = fs_info->tree_root->nodesize;
 	}
 #ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
 struct extent_buffer *alloc_test_extent_buffer(struct btrfs_fs_info *fs_info,
-					       u64 start)
+					u64 start, u32 nodesize)
 {
 	struct extent_buffer *eb, *exists = NULL;
 	int ret;
 	eb = find_extent_buffer(fs_info, start);
 	if (eb)
 		return eb;
-	eb = alloc_dummy_extent_buffer(fs_info, start);
+	eb = alloc_dummy_extent_buffer(fs_info, start, nodesize);
 	if (!eb)
 		return NULL;
 	eb->fs_info = fs_info;
 	int uptodate = 1;
 	int ret;
+	if (!IS_ALIGNED(start, fs_info->tree_root->sectorsize)) {
+		btrfs_err(fs_info, "bad tree block start %llu", start);
+		return ERR_PTR(-EINVAL);
+	}
 	eb = find_extent_buffer(fs_info, start);
 	if (eb)
 		return eb;
 	eb = __alloc_extent_buffer(fs_info, start, len);
 	if (!eb)
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 	for (i = 0; i < num_pages; i++, index++) {
 		p = find_or_create_page(mapping, index, GFP_NOFS|__GFP_NOFAIL);
-		if (!p)
+		if (!p) {
+			exists = ERR_PTR(-ENOMEM);
 			goto free_eb;
+		}
 		spin_lock(&mapping->private_lock);
 		if (PagePrivate(p)) {
 		set_bit(EXTENT_BUFFER_UPTODATE, &eb->bflags);
 again:
 	ret = radix_tree_preload(GFP_NOFS);
-	if (ret)
+	if (ret) {
+		exists = ERR_PTR(ret);
 		goto free_eb;
+	}
 	spin_lock(&fs_info->buffer_lock);
 	ret = radix_tree_insert(&fs_info->buffer_radix,

fs/btrfs/extent_io.h+2−2

@@ -348,7 +348,7 @@ struct extent_buffer alloc_extent_buffer(struct btrfs_fs_info fs_info, · 347 unmodified lines
348	struct extent_buffer __alloc_dummy_extent_buffer(struct btrfs_fs_info fs_info,	348	struct extent_buffer __alloc_dummy_extent_buffer(struct btrfs_fs_info fs_info,
349	u64 start, unsigned long len);	349	u64 start, unsigned long len);
350	struct extent_buffer alloc_dummy_extent_buffer(struct btrfs_fs_info fs_info,	350	struct extent_buffer alloc_dummy_extent_buffer(struct btrfs_fs_info fs_info,
351	u64 start);	351	u64 start, u32 nodesize);
352	struct extent_buffer btrfs_clone_extent_buffer(struct extent_buffer src);	352	struct extent_buffer btrfs_clone_extent_buffer(struct extent_buffer src);
353	struct extent_buffer find_extent_buffer(struct btrfs_fs_info fs_info,	353	struct extent_buffer find_extent_buffer(struct btrfs_fs_info fs_info,
354	u64 start);	354	u64 start);
@@ -468,5 +468,5 @@ noinline u64 find_lock_delalloc_range(struct inode *inode, · 113 unmodified lines
468	u64 *end, u64 max_bytes);	468	u64 *end, u64 max_bytes);
469	#endif	469	#endif
470	struct extent_buffer alloc_test_extent_buffer(struct btrfs_fs_info fs_info,	470	struct extent_buffer alloc_test_extent_buffer(struct btrfs_fs_info fs_info,
471	u64 start);	471	u64 start, u32 nodesize);
472	#endif	472	#endif

fs/btrfs/free-space-cache.c+9−9

@@ -29,7 +29,7 @@ · 28 unmodified lines
29	#include "inode-map.h"	29	#include "inode-map.h"
30	#include "volumes.h"	30	#include "volumes.h"
31		31
32	#define BITS_PER_BITMAP (PAGE_SIZE * 8)	32	#define BITS_PER_BITMAP (PAGE_SIZE * 8UL)
33	#define MAX_CACHE_BYTES_PER_GIG SZ_32K	33	#define MAX_CACHE_BYTES_PER_GIG SZ_32K
34		34
35	struct btrfs_trim_range {	35	struct btrfs_trim_range {
@@ -1415,11 +1415,11 @@ static inline u64 offset_to_bitmap(struct btrfs_free_space_ctl *ctl, · 1379 unmodified lines
1415	u64 offset)	1415	u64 offset)
1416	{	1416	{
1417	u64 bitmap_start;	1417	u64 bitmap_start;
1418	u32 bytes_per_bitmap;	1418	u64 bytes_per_bitmap;
1419		1419
1420	bytes_per_bitmap = BITS_PER_BITMAP * ctl->unit;	1420	bytes_per_bitmap = BITS_PER_BITMAP * ctl->unit;
1421	bitmap_start = offset - ctl->start;	1421	bitmap_start = offset - ctl->start;
1422	bitmap_start = div_u64(bitmap_start, bytes_per_bitmap);	1422	bitmap_start = div64_u64(bitmap_start, bytes_per_bitmap);
1423	bitmap_start *= bytes_per_bitmap;	1423	bitmap_start *= bytes_per_bitmap;
1424	bitmap_start += ctl->start;	1424	bitmap_start += ctl->start;
1425		1425
@@ -1638,10 +1638,10 @@ static void recalculate_thresholds(struct btrfs_free_space_ctl *ctl) · 212 unmodified lines
1638	u64 bitmap_bytes;	1638	u64 bitmap_bytes;
1639	u64 extent_bytes;	1639	u64 extent_bytes;
1640	u64 size = block_group->key.offset;	1640	u64 size = block_group->key.offset;
1641	u32 bytes_per_bg = BITS_PER_BITMAP * ctl->unit;	1641	u64 bytes_per_bg = BITS_PER_BITMAP * ctl->unit;
1642	u32 max_bitmaps = div_u64(size + bytes_per_bg - 1, bytes_per_bg);	1642	u64 max_bitmaps = div64_u64(size + bytes_per_bg - 1, bytes_per_bg);
1643		1643
1644	max_bitmaps = max_t(u32, max_bitmaps, 1);	1644	max_bitmaps = max_t(u64, max_bitmaps, 1);
1645		1645
1646	ASSERT(ctl->total_bitmaps <= max_bitmaps);	1646	ASSERT(ctl->total_bitmaps <= max_bitmaps);
1647		1647
@@ -1660,7 +1660,7 @@ static void recalculate_thresholds(struct btrfs_free_space_ctl *ctl) · 12 unmodified lines
1660	* sure we don't go over our overall goal of MAX_CACHE_BYTES_PER_GIG as	1660	* sure we don't go over our overall goal of MAX_CACHE_BYTES_PER_GIG as
1661	* we add more bitmaps.	1661	* we add more bitmaps.
1662	*/	1662	*/
1663	bitmap_bytes = (ctl->total_bitmaps + 1) * PAGE_SIZE;	1663	bitmap_bytes = (ctl->total_bitmaps + 1) * ctl->unit;
1664		1664
1665	if (bitmap_bytes >= max_bytes) {	1665	if (bitmap_bytes >= max_bytes) {
1666	ctl->extents_thresh = 0;	1666	ctl->extents_thresh = 0;
@@ -3662,7 +3662,7 @@ have_info: · 1995 unmodified lines
3662	if (tmp->offset + tmp->bytes < offset)	3662	if (tmp->offset + tmp->bytes < offset)
3663	break;	3663	break;
3664	if (offset + bytes < tmp->offset) {	3664	if (offset + bytes < tmp->offset) {
3665	n = rb_prev(&info->offset_index);	3665	n = rb_prev(&tmp->offset_index);
3666	continue;	3666	continue;
3667	}	3667	}
3668	info = tmp;	3668	info = tmp;
@@ -3676,7 +3676,7 @@ have_info: · 7 unmodified lines
3676	if (offset + bytes < tmp->offset)	3676	if (offset + bytes < tmp->offset)
3677	break;	3677	break;
3678	if (tmp->offset + tmp->bytes < offset) {	3678	if (tmp->offset + tmp->bytes < offset) {
3679	n = rb_next(&info->offset_index);	3679	n = rb_next(&tmp->offset_index);
3680	continue;	3680	continue;
3681	}	3681	}
3682	info = tmp;	3682	info = tmp;

fs/btrfs/hash.c+5−0

 	return PTR_ERR_OR_ZERO(tfm);
 }
+const char* btrfs_crc32c_impl(void)
+{
+	return crypto_tfm_alg_driver_name(crypto_shash_tfm(tfm));
+}
 void btrfs_hash_exit(void)
 {
 	crypto_free_shash(tfm);

fs/btrfs/hash.h+1−0

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	int __init btrfs_hash_init(void);	22	int __init btrfs_hash_init(void);
23		23
24	void btrfs_hash_exit(void);	24	void btrfs_hash_exit(void);
		25	const char* btrfs_crc32c_impl(void);
25		26
26	u32 btrfs_crc32c(u32 crc, const void *address, unsigned int length);	27	u32 btrfs_crc32c(u32 crc, const void *address, unsigned int length);
27		28

fs/btrfs/inode.c+10−1

@@ -3271,7 +3271,16 @@ int btrfs_orphan_add(struct btrfs_trans_handle trans, struct inode inode) · 3270 unmodified lines
3271	/* grab metadata reservation from transaction handle */	3271	/* grab metadata reservation from transaction handle */
3272	if (reserve) {	3272	if (reserve) {
3273	ret = btrfs_orphan_reserve_metadata(trans, inode);	3273	ret = btrfs_orphan_reserve_metadata(trans, inode);
3274	BUG_ON(ret); /* -ENOSPC in reservation; Logic error? JDM */	3274	ASSERT(!ret);
		3275	if (ret) {
		3276	atomic_dec(&root->orphan_inodes);
		3277	clear_bit(BTRFS_INODE_ORPHAN_META_RESERVED,
		3278	&BTRFS_I(inode)->runtime_flags);
		3279	if (insert)
		3280	clear_bit(BTRFS_INODE_HAS_ORPHAN_ITEM,
		3281	&BTRFS_I(inode)->runtime_flags);
		3282	return ret;
		3283	}
3275	}	3284	}
3276		3285
3277	/* insert an orphan item to track this unlinked/truncated file */	3286	/* insert an orphan item to track this unlinked/truncated file */

fs/btrfs/super.c+39−22

@@ -235,7 +235,7 @@ void __btrfs_abort_transaction(struct btrfs_trans_handle *trans, · 234 unmodified lines
235	trans->aborted = errno;	235	trans->aborted = errno;
236	/* Nothing used. The other threads that have joined this	236	/* Nothing used. The other threads that have joined this
237	* transaction may be able to continue. */	237	* transaction may be able to continue. */
238	if (!trans->blocks_used && list_empty(&trans->new_bgs)) {	238	if (!trans->dirty && list_empty(&trans->new_bgs)) {
239	const char *errstr;	239	const char *errstr;
240		240
241	errstr = btrfs_decode_error(errno);	241	errstr = btrfs_decode_error(errno);
@@ -1807,6 +1807,8 @@ static int btrfs_remount(struct super_block sb, int flags, char *data) · 1565 unmodified lines
1807	}	1807	}
1808	}	1808	}
1809	sb->s_flags &= ~MS_RDONLY;	1809	sb->s_flags &= ~MS_RDONLY;
		1810
		1811	fs_info->open = 1;
1810	}	1812	}
1811	out:	1813	out:
1812	wake_up_process(fs_info->transaction_kthread);	1814	wake_up_process(fs_info->transaction_kthread);
@@ -2303,7 +2305,7 @@ static void btrfs_interface_exit(void) · 490 unmodified lines
2303		2305
2304	static void btrfs_print_mod_info(void)	2306	static void btrfs_print_mod_info(void)
2305	{	2307	{
2306	printk(KERN_INFO "Btrfs loaded"	2308	printk(KERN_INFO "Btrfs loaded, crc32c=%s"
2307	#ifdef CONFIG_BTRFS_DEBUG	2309	#ifdef CONFIG_BTRFS_DEBUG
2308	", debug=on"	2310	", debug=on"
2309	#endif	2311	#endif
@@ -2313,33 +2315,48 @@ static void btrfs_print_mod_info(void) · 3 unmodified lines
2313	#ifdef CONFIG_BTRFS_FS_CHECK_INTEGRITY	2315	#ifdef CONFIG_BTRFS_FS_CHECK_INTEGRITY
2314	", integrity-checker=on"	2316	", integrity-checker=on"
2315	#endif	2317	#endif
2316	"\n");	2318	"\n",
		2319	btrfs_crc32c_impl());
2317	}	2320	}
2318		2321
2319	static int btrfs_run_sanity_tests(void)	2322	static int btrfs_run_sanity_tests(void)
2320	{	2323	{
2321	int ret;	2324	int ret, i;
2322		2325	u32 sectorsize, nodesize;
		2326	u32 test_sectorsize[] = {
		2327	PAGE_SIZE,
		2328	};
2323	ret = btrfs_init_test_fs();	2329	ret = btrfs_init_test_fs();
2324	if (ret)	2330	if (ret)
2325	return ret;	2331	return ret;
2326		2332	for (i = 0; i < ARRAY_SIZE(test_sectorsize); i++) {
2327	ret = btrfs_test_free_space_cache();	2333	sectorsize = test_sectorsize[i];
2328	if (ret)	2334	for (nodesize = sectorsize;
2329	goto out;	2335	nodesize <= BTRFS_MAX_METADATA_BLOCKSIZE;
2330	ret = btrfs_test_extent_buffer_operations();	2336	nodesize <<= 1) {
2331	if (ret)	2337	pr_info("BTRFS: selftest: sectorsize: %u nodesize: %u\n",
2332	goto out;	2338	sectorsize, nodesize);
2333	ret = btrfs_test_extent_io();	2339	ret = btrfs_test_free_space_cache(sectorsize, nodesize);
2334	if (ret)	2340	if (ret)
2335	goto out;	2341	goto out;
2336	ret = btrfs_test_inodes();	2342	ret = btrfs_test_extent_buffer_operations(sectorsize,
2337	if (ret)	2343	nodesize);
2338	goto out;	2344	if (ret)
2339	ret = btrfs_test_qgroups();	2345	goto out;
2340	if (ret)	2346	ret = btrfs_test_extent_io(sectorsize, nodesize);
2341	goto out;	2347	if (ret)
2342	ret = btrfs_test_free_space_tree();	2348	goto out;
		2349	ret = btrfs_test_inodes(sectorsize, nodesize);
		2350	if (ret)
		2351	goto out;
		2352	ret = btrfs_test_qgroups(sectorsize, nodesize);
		2353	if (ret)
		2354	goto out;
		2355	ret = btrfs_test_free_space_tree(sectorsize, nodesize);
		2356	if (ret)
		2357	goto out;
		2358	}
		2359	}
2343	out:	2360	out:
2344	btrfs_destroy_test_fs();	2361	btrfs_destroy_test_fs();
2345	return ret;	2362	return ret;

fs/btrfs/tests/btrfs-tests.c+3−3

@@ -175,7 +175,7 @@ void btrfs_free_dummy_root(struct btrfs_root *root) · 174 unmodified lines
175	}	175	}
176		176
177	struct btrfs_block_group_cache *	177	struct btrfs_block_group_cache *
178	btrfs_alloc_dummy_block_group(unsigned long length)	178	btrfs_alloc_dummy_block_group(unsigned long length, u32 sectorsize)
179	{	179	{
180	struct btrfs_block_group_cache *cache;	180	struct btrfs_block_group_cache *cache;
181		181
@@ -192,8 +192,8 @@ btrfs_alloc_dummy_block_group(unsigned long length) · 10 unmodified lines
192	cache->key.objectid = 0;	192	cache->key.objectid = 0;
193	cache->key.offset = length;	193	cache->key.offset = length;
194	cache->key.type = BTRFS_BLOCK_GROUP_ITEM_KEY;	194	cache->key.type = BTRFS_BLOCK_GROUP_ITEM_KEY;
195	cache->sectorsize = 4096;	195	cache->sectorsize = sectorsize;
196	cache->full_stripe_len = 4096;	196	cache->full_stripe_len = sectorsize;
197		197
198	INIT_LIST_HEAD(&cache->list);	198	INIT_LIST_HEAD(&cache->list);
199	INIT_LIST_HEAD(&cache->cluster_list);	199	INIT_LIST_HEAD(&cache->cluster_list);

fs/btrfs/tests/btrfs-tests.h+14−13

 struct btrfs_root;
 struct btrfs_trans_handle;
-int btrfs_test_free_space_cache(void);
+int btrfs_test_free_space_cache(u32 sectorsize, u32 nodesize);
-int btrfs_test_extent_buffer_operations(void);
+int btrfs_test_extent_buffer_operations(u32 sectorsize, u32 nodesize);
-int btrfs_test_extent_io(void);
+int btrfs_test_extent_io(u32 sectorsize, u32 nodesize);
-int btrfs_test_inodes(void);
+int btrfs_test_inodes(u32 sectorsize, u32 nodesize);
-int btrfs_test_qgroups(void);
+int btrfs_test_qgroups(u32 sectorsize, u32 nodesize);
-int btrfs_test_free_space_tree(void);
+int btrfs_test_free_space_tree(u32 sectorsize, u32 nodesize);
 int btrfs_init_test_fs(void);
 void btrfs_destroy_test_fs(void);
 struct inode *btrfs_new_test_inode(void);
 struct btrfs_fs_info *btrfs_alloc_dummy_fs_info(void);
 void btrfs_free_dummy_root(struct btrfs_root *root);
 struct btrfs_block_group_cache *
-btrfs_alloc_dummy_block_group(unsigned long length);
+btrfs_alloc_dummy_block_group(unsigned long length, u32 sectorsize);
 void btrfs_free_dummy_block_group(struct btrfs_block_group_cache *cache);
 void btrfs_init_dummy_trans(struct btrfs_trans_handle *trans);
 #else
-static inline int btrfs_test_free_space_cache(void)
+static inline int btrfs_test_free_space_cache(u32 sectorsize, u32 nodesize)
 {
 	return 0;
 }
-static inline int btrfs_test_extent_buffer_operations(void)
+static inline int btrfs_test_extent_buffer_operations(u32 sectorsize,
+	u32 nodesize)
 {
 	return 0;
 }
 static inline void btrfs_destroy_test_fs(void)
 {
 }
-static inline int btrfs_test_extent_io(void)
+static inline int btrfs_test_extent_io(u32 sectorsize, u32 nodesize)
 {
 	return 0;
 }
-static inline int btrfs_test_inodes(void)
+static inline int btrfs_test_inodes(u32 sectorsize, u32 nodesize)
 {
 	return 0;
 }
-static inline int btrfs_test_qgroups(void)
+static inline int btrfs_test_qgroups(u32 sectorsize, u32 nodesize)
 {
 	return 0;
 }
-static inline int btrfs_test_free_space_tree(void)
+static inline int btrfs_test_free_space_tree(u32 sectorsize, u32 nodesize)
 {
 	return 0;
 }

fs/btrfs/tests/extent-buffer-tests.c+7−6

 #include "../extent_io.h"
 #include "../disk-io.h"
-static int test_btrfs_split_item(void)
+static int test_btrfs_split_item(u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_path *path;
 	struct btrfs_root *root;
 	test_msg("Running btrfs_split_item tests\n");
-	root = btrfs_alloc_dummy_root();
+	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(root)) {
 		test_msg("Could not allocate root\n");
 		return PTR_ERR(root);
 		return -ENOMEM;
 	}
-	path->nodes[0] = eb = alloc_dummy_extent_buffer(NULL, 4096);
+	path->nodes[0] = eb = alloc_dummy_extent_buffer(NULL, nodesize,
+							nodesize);
 	if (!eb) {
 		test_msg("Could not allocate dummy buffer\n");
 		ret = -ENOMEM;
 	return ret;
 }
-int btrfs_test_extent_buffer_operations(void)
+int btrfs_test_extent_buffer_operations(u32 sectorsize, u32 nodesize)
 {
-	test_msg("Running extent buffer operation tests");
+	test_msg("Running extent buffer operation tests\n");
-	return test_btrfs_split_item();
+	return test_btrfs_split_item(sectorsize, nodesize);
 }

fs/btrfs/tests/extent-io-tests.c+54−32

 #include <linux/slab.h>
 #include <linux/sizes.h>
 #include "btrfs-tests.h"
+#include "../ctree.h"
 #include "../extent_io.h"
 #define PROCESS_UNLOCK		(1 << 0)
 	return count;
 }
-static int test_find_delalloc(void)
+static int test_find_delalloc(u32 sectorsize)
 {
 	struct inode *inode;
 	struct extent_io_tree tmp;
 	 * |--- delalloc ---|
 	 * |---  search  ---|
 	 */
-	set_extent_delalloc(&tmp, 0, 4095, NULL);
+	set_extent_delalloc(&tmp, 0, sectorsize - 1, NULL);
 	start = 0;
 	end = 0;
 	found = find_lock_delalloc_range(inode, &tmp, locked_page, &start,
 		test_msg("Should have found at least one delalloc\n");
 		goto out_bits;
 	}
-	if (start != 0 || end != 4095) {
+	if (start != 0 || end != (sectorsize - 1)) {
-		test_msg("Expected start 0 end 4095, got start %Lu end %Lu\n",
+		test_msg("Expected start 0 end %u, got start %llu end %llu\n",
-			 start, end);
+			sectorsize - 1, start, end);
 		goto out_bits;
 	}
 	unlock_extent(&tmp, start, end);
 		test_msg("Couldn't find the locked page\n");
 		goto out_bits;
 	}
-	set_extent_delalloc(&tmp, 4096, max_bytes - 1, NULL);
+	set_extent_delalloc(&tmp, sectorsize, max_bytes - 1, NULL);
 	start = test_start;
 	end = 0;
 	found = find_lock_delalloc_range(inode, &tmp, locked_page, &start,
 	 * |--- delalloc ---|
 	 *                    |--- search ---|
 	 */
-	test_start = max_bytes + 4096;
+	test_start = max_bytes + sectorsize;
 	locked_page = find_lock_page(inode->i_mapping, test_start >>
 				     PAGE_SHIFT);
 	if (!locked_page) {
 	return ret;
 }
+/**
+ * test_bit_in_byte - Determine whether a bit is set in a byte
+ * @nr: bit number to test
+ * @addr: Address to start counting from
+ */
+static inline int test_bit_in_byte(int nr, const u8 *addr)
+{
+	return 1UL & (addr[nr / BITS_PER_BYTE] >> (nr & (BITS_PER_BYTE - 1)));
+}
 static int __test_eb_bitmaps(unsigned long *bitmap, struct extent_buffer *eb,
 			     unsigned long len)
 {
 		return -EINVAL;
 	}
-	bitmap_set(bitmap, (PAGE_SIZE - sizeof(long) / 2) * BITS_PER_BYTE,
+	/* Straddling pages test */
-		   sizeof(long) * BITS_PER_BYTE);
+	if (len > PAGE_SIZE) {
-	extent_buffer_bitmap_set(eb, PAGE_SIZE - sizeof(long) / 2, 0,
+		bitmap_set(bitmap,
-				 sizeof(long) * BITS_PER_BYTE);
+			(PAGE_SIZE - sizeof(long) / 2) * BITS_PER_BYTE,
-	if (memcmp_extent_buffer(eb, bitmap, 0, len) != 0) {
+			sizeof(long) * BITS_PER_BYTE);
-		test_msg("Setting straddling pages failed\n");
+		extent_buffer_bitmap_set(eb, PAGE_SIZE - sizeof(long) / 2, 0,
-		return -EINVAL;
+					sizeof(long) * BITS_PER_BYTE);
-	}
+		if (memcmp_extent_buffer(eb, bitmap, 0, len) != 0) {
+			test_msg("Setting straddling pages failed\n");
+			return -EINVAL;
+		}
-	bitmap_set(bitmap, 0, len * BITS_PER_BYTE);
+		bitmap_set(bitmap, 0, len * BITS_PER_BYTE);
-	bitmap_clear(bitmap,
+		bitmap_clear(bitmap,
-		     (PAGE_SIZE - sizeof(long) / 2) * BITS_PER_BYTE,
+			(PAGE_SIZE - sizeof(long) / 2) * BITS_PER_BYTE,
-		     sizeof(long) * BITS_PER_BYTE);
+			sizeof(long) * BITS_PER_BYTE);
-	extent_buffer_bitmap_set(eb, 0, 0, len * BITS_PER_BYTE);
+		extent_buffer_bitmap_set(eb, 0, 0, len * BITS_PER_BYTE);
-	extent_buffer_bitmap_clear(eb, PAGE_SIZE - sizeof(long) / 2, 0,
+		extent_buffer_bitmap_clear(eb, PAGE_SIZE - sizeof(long) / 2, 0,
-				   sizeof(long) * BITS_PER_BYTE);
+					sizeof(long) * BITS_PER_BYTE);
-	if (memcmp_extent_buffer(eb, bitmap, 0, len) != 0) {
+		if (memcmp_extent_buffer(eb, bitmap, 0, len) != 0) {
-		test_msg("Clearing straddling pages failed\n");
+			test_msg("Clearing straddling pages failed\n");
-		return -EINVAL;
+			return -EINVAL;
+		}
 	}
 	/*
 	for (i = 0; i < len * BITS_PER_BYTE; i++) {
 		int bit, bit1;
-		bit = !!test_bit(i, bitmap);
+		bit = !!test_bit_in_byte(i, (u8 *)bitmap);
 		bit1 = !!extent_buffer_test_bit(eb, 0, i);
 		if (bit1 != bit) {
 			test_msg("Testing bit pattern failed\n");
 	return 0;
 }
-static int test_eb_bitmaps(void)
+static int test_eb_bitmaps(u32 sectorsize, u32 nodesize)
 {
-	unsigned long len = PAGE_SIZE * 4;
+	unsigned long len;
 	unsigned long *bitmap;
 	struct extent_buffer *eb;
 	int ret;
 	test_msg("Running extent buffer bitmap tests\n");
+	/*
+	 * In ppc64, sectorsize can be 64K, thus 4 * 64K will be larger than
+	 * BTRFS_MAX_METADATA_BLOCKSIZE.
+	 */
+	len = (sectorsize < BTRFS_MAX_METADATA_BLOCKSIZE)
+		? sectorsize * 4 : sectorsize;
 	bitmap = kmalloc(len, GFP_KERNEL);
 	if (!bitmap) {
 		test_msg("Couldn't allocate test bitmap\n");
 	/* Do it over again with an extent buffer which isn't page-aligned. */
 	free_extent_buffer(eb);
-	eb = __alloc_dummy_extent_buffer(NULL, PAGE_SIZE / 2, len);
+	eb = __alloc_dummy_extent_buffer(NULL, nodesize / 2, len);
 	if (!eb) {
 		test_msg("Couldn't allocate test extent buffer\n");
 		kfree(bitmap);
 	return ret;
 }
-int btrfs_test_extent_io(void)
+int btrfs_test_extent_io(u32 sectorsize, u32 nodesize)
 {
 	int ret;
 	test_msg("Running extent I/O tests\n");
-	ret = test_find_delalloc();
+	ret = test_find_delalloc(sectorsize);
 	if (ret)
 		goto out;
-	ret = test_eb_bitmaps();
+	ret = test_eb_bitmaps(sectorsize, nodesize);
 out:
 	test_msg("Extent I/O tests finished\n");
 	return ret;

fs/btrfs/tests/free-space-tests.c+46−30

 #include "../disk-io.h"
 #include "../free-space-cache.h"
-#define BITS_PER_BITMAP		(PAGE_SIZE * 8)
+#define BITS_PER_BITMAP		(PAGE_SIZE * 8UL)
 /*
  * This test just does basic sanity checking, making sure we can add an extent
 	return 0;
 }
-static int test_bitmaps(struct btrfs_block_group_cache *cache)
+static int test_bitmaps(struct btrfs_block_group_cache *cache,
+			u32 sectorsize)
 {
 	u64 next_bitmap_offset;
 	int ret;
 	 * The first bitmap we have starts at offset 0 so the next one is just
 	 * at the end of the first bitmap.
 	 */
-	next_bitmap_offset = (u64)(BITS_PER_BITMAP * 4096);
+	next_bitmap_offset = (u64)(BITS_PER_BITMAP * sectorsize);
 	/* Test a bit straddling two bitmaps */
 	ret = test_add_free_space_entry(cache, next_bitmap_offset - SZ_2M,
 }
 /* This is the high grade jackassery */
-static int test_bitmaps_and_extents(struct btrfs_block_group_cache *cache)
+static int test_bitmaps_and_extents(struct btrfs_block_group_cache *cache,
+				    u32 sectorsize)
 {
-	u64 bitmap_offset = (u64)(BITS_PER_BITMAP * 4096);
+	u64 bitmap_offset = (u64)(BITS_PER_BITMAP * sectorsize);
 	int ret;
 	test_msg("Running bitmap and extent tests\n");
  * requests.
  */
 static int
-test_steal_space_from_bitmap_to_extent(struct btrfs_block_group_cache *cache)
+test_steal_space_from_bitmap_to_extent(struct btrfs_block_group_cache *cache,
+				       u32 sectorsize)
 {
 	int ret;
 	u64 offset;
 	 * The goal is to test that the bitmap entry space stealing doesn't
 	 * steal this space region.
 	 */
-	ret = btrfs_add_free_space(cache, SZ_128M + SZ_16M, 4096);
+	ret = btrfs_add_free_space(cache, SZ_128M + SZ_16M, sectorsize);
 	if (ret) {
 		test_msg("Error adding free space: %d\n", ret);
 		return ret;
 		return -ENOENT;
 	}
-	if (cache->free_space_ctl->free_space != (SZ_1M + 4096)) {
+	if (cache->free_space_ctl->free_space != (SZ_1M + sectorsize)) {
-		test_msg("Cache free space is not 1Mb + 4Kb\n");
+		test_msg("Cache free space is not 1Mb + %u\n", sectorsize);
 		return -EINVAL;
 	}
 		return -EINVAL;
 	}
-	/* All that remains is a 4Kb free space region in a bitmap. Confirm. */
+	/*
+	 * All that remains is a sectorsize free space region in a bitmap.
+	 * Confirm.
+	 */
 	ret = check_num_extents_and_bitmaps(cache, 1, 1);
 	if (ret)
 		return ret;
-	if (cache->free_space_ctl->free_space != 4096) {
+	if (cache->free_space_ctl->free_space != sectorsize) {
-		test_msg("Cache free space is not 4Kb\n");
+		test_msg("Cache free space is not %u\n", sectorsize);
 		return -EINVAL;
 	}
 	offset = btrfs_find_space_for_alloc(cache,
-					    0, 4096, 0,
+					    0, sectorsize, 0,
 					    &max_extent_size);
 	if (offset != (SZ_128M + SZ_16M)) {
-		test_msg("Failed to allocate 4Kb from space cache, returned offset is: %llu\n",
+		test_msg("Failed to allocate %u, returned offset : %llu\n",
-			 offset);
+			 sectorsize, offset);
 		return -EINVAL;
 	}
 	 * The goal is to test that the bitmap entry space stealing doesn't
 	 * steal this space region.
 	 */
-	ret = btrfs_add_free_space(cache, SZ_32M, 8192);
+	ret = btrfs_add_free_space(cache, SZ_32M, 2 * sectorsize);
 	if (ret) {
 		test_msg("Error adding free space: %d\n", ret);
 		return ret;
 	/*
 	 * Confirm that our extent entry didn't stole all free space from the
-	 * bitmap, because of the small 8Kb free space region.
+	 * bitmap, because of the small 2 * sectorsize free space region.
 	 */
 	ret = check_num_extents_and_bitmaps(cache, 2, 1);
 	if (ret)
 		return -ENOENT;
 	}
-	if (cache->free_space_ctl->free_space != (SZ_1M + 8192)) {
+	if (cache->free_space_ctl->free_space != (SZ_1M + 2 * sectorsize)) {
-		test_msg("Cache free space is not 1Mb + 8Kb\n");
+		test_msg("Cache free space is not 1Mb + %u\n", 2 * sectorsize);
 		return -EINVAL;
 	}
 		return -EINVAL;
 	}
-	/* All that remains is a 8Kb free space region in a bitmap. Confirm. */
+	/*
+	 * All that remains is 2 * sectorsize free space region
+	 * in a bitmap. Confirm.
+	 */
 	ret = check_num_extents_and_bitmaps(cache, 1, 1);
 	if (ret)
 		return ret;
-	if (cache->free_space_ctl->free_space != 8192) {
+	if (cache->free_space_ctl->free_space != 2 * sectorsize) {
-		test_msg("Cache free space is not 8Kb\n");
+		test_msg("Cache free space is not %u\n", 2 * sectorsize);
 		return -EINVAL;
 	}
 	offset = btrfs_find_space_for_alloc(cache,
-					    0, 8192, 0,
+					    0, 2 * sectorsize, 0,
 					    &max_extent_size);
 	if (offset != SZ_32M) {
-		test_msg("Failed to allocate 8Kb from space cache, returned offset is: %llu\n",
+		test_msg("Failed to allocate %u, offset: %llu\n",
+			 2 * sectorsize,
 			 offset);
 		return -EINVAL;
 	}
 	return 0;
 }
-int btrfs_test_free_space_cache(void)
+int btrfs_test_free_space_cache(u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_block_group_cache *cache;
 	struct btrfs_root *root = NULL;
 	test_msg("Running btrfs free space cache tests\n");
-	cache = btrfs_alloc_dummy_block_group(1024 * 1024 * 1024);
+	/*
+	 * For ppc64 (with 64k page size), bytes per bitmap might be
+	 * larger than 1G.  To make bitmap test available in ppc64,
+	 * alloc dummy block group whose size cross bitmaps.
+	 */
+	cache = btrfs_alloc_dummy_block_group(BITS_PER_BITMAP * sectorsize
+					+ PAGE_SIZE, sectorsize);
 	if (!cache) {
 		test_msg("Couldn't run the tests\n");
 		return 0;
 	}
-	root = btrfs_alloc_dummy_root();
+	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(root)) {
 		ret = PTR_ERR(root);
 		goto out;
 	ret = test_extents(cache);
 	if (ret)
 		goto out;
-	ret = test_bitmaps(cache);
+	ret = test_bitmaps(cache, sectorsize);
 	if (ret)
 		goto out;
-	ret = test_bitmaps_and_extents(cache);
+	ret = test_bitmaps_and_extents(cache, sectorsize);
 	if (ret)
 		goto out;
-	ret = test_steal_space_from_bitmap_to_extent(cache);
+	ret = test_steal_space_from_bitmap_to_extent(cache, sectorsize);
 out:
 	btrfs_free_dummy_block_group(cache);
 	btrfs_free_dummy_root(root);

fs/btrfs/tests/free-space-tree-tests.c+18−12

  * Boston, MA 021110-1307, USA.
  */
+#include <linux/types.h>
 #include "btrfs-tests.h"
 #include "../ctree.h"
 #include "../disk-io.h"
  * The test cases align their operations to this in order to hit some of the
  * edge cases in the bitmap code.
  */
-#define BITMAP_RANGE (BTRFS_FREE_SPACE_BITMAP_BITS * 4096)
+#define BITMAP_RANGE (BTRFS_FREE_SPACE_BITMAP_BITS * PAGE_SIZE)
 static int __check_free_space_extents(struct btrfs_trans_handle *trans,
 				      struct btrfs_fs_info *fs_info,
 			   struct btrfs_block_group_cache *,
 			   struct btrfs_path *);
-static int run_test(test_func_t test_func, int bitmaps)
+static int run_test(test_func_t test_func, int bitmaps,
+		u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_root *root = NULL;
 	struct btrfs_block_group_cache *cache = NULL;
 	struct btrfs_path *path = NULL;
 	int ret;
-	root = btrfs_alloc_dummy_root();
+	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(root)) {
 		test_msg("Couldn't allocate dummy root\n");
 		ret = PTR_ERR(root);
 	root->fs_info->free_space_root = root;
 	root->fs_info->tree_root = root;
-	root->node = alloc_test_extent_buffer(root->fs_info, 4096);
+	root->node = alloc_test_extent_buffer(root->fs_info,
+		nodesize, nodesize);
 	if (!root->node) {
 		test_msg("Couldn't allocate dummy buffer\n");
 		ret = -ENOMEM;
 	}
 	btrfs_set_header_level(root->node, 0);
 	btrfs_set_header_nritems(root->node, 0);
-	root->alloc_bytenr += 8192;
+	root->alloc_bytenr += 2 * nodesize;
-	cache = btrfs_alloc_dummy_block_group(8 * BITMAP_RANGE);
+	cache = btrfs_alloc_dummy_block_group(8 * BITMAP_RANGE, sectorsize);
 	if (!cache) {
 		test_msg("Couldn't allocate dummy block group cache\n");
 		ret = -ENOMEM;
 	return ret;
 }
-static int run_test_both_formats(test_func_t test_func)
+static int run_test_both_formats(test_func_t test_func,
+	u32 sectorsize, u32 nodesize)
 {
 	int ret;
-	ret = run_test(test_func, 0);
+	ret = run_test(test_func, 0, sectorsize, nodesize);
 	if (ret)
 		return ret;
-	return run_test(test_func, 1);
+	return run_test(test_func, 1, sectorsize, nodesize);
 }
-int btrfs_test_free_space_tree(void)
+int btrfs_test_free_space_tree(u32 sectorsize, u32 nodesize)
 {
 	test_func_t tests[] = {
 		test_empty_block_group,
 	test_msg("Running free space tree tests\n");
 	for (i = 0; i < ARRAY_SIZE(tests); i++) {
-		int ret = run_test_both_formats(tests[i]);
+		int ret = run_test_both_formats(tests[i], sectorsize,
+			nodesize);
 		if (ret) {
-			test_msg("%pf failed\n", tests[i]);
+			test_msg("%pf : sectorsize %u failed\n",
+				tests[i], sectorsize);
 			return ret;
 		}
 	}

fs/btrfs/tests/inode-tests.c+188−156

@@ -16,6 +16,7 @@ · 15 unmodified lines
16	* Boston, MA 021110-1307, USA.	16	* Boston, MA 021110-1307, USA.
17	*/	17	*/
18		18
		19	#include <linux/types.h>
19	#include "btrfs-tests.h"	20	#include "btrfs-tests.h"
20	#include "../ctree.h"	21	#include "../ctree.h"
21	#include "../btrfs_inode.h"	22	#include "../btrfs_inode.h"
@@ -86,19 +87,19 @@ static void insert_inode_item_key(struct btrfs_root *root) · 64 unmodified lines
86	* diagram of how the extents will look though this may not be possible we still	87	* diagram of how the extents will look though this may not be possible we still
87	* want to make sure everything acts normally (the last number is not inclusive)	88	* want to make sure everything acts normally (the last number is not inclusive)
88	*	89	*
89	* [0 - 5][5 - 6][6 - 10][10 - 4096][ 4096 - 8192 ][8192 - 12288]	90	* [0 - 5][5 - 6][ 6 - 4096 ][ 4096 - 4100][4100 - 8195][8195 - 12291]
90	* [hole ][inline][ hole ][ regular ][regular1 split][ hole ]	91	* [hole ][inline][hole but no extent][ hole ][ regular ][regular1 split]
91	*	92	*
92	* [ 12288 - 20480][20480 - 24576][ 24576 - 28672 ][28672 - 36864][36864 - 45056]	93	* [12291 - 16387][16387 - 24579][24579 - 28675][ 28675 - 32771][32771 - 36867 ]
93	* [regular1 split][ prealloc1 ][prealloc1 written][ prealloc1 ][ compressed ]	94	* [ hole ][regular1 split][ prealloc ][ prealloc1 ][prealloc1 written]
94	*	95	*
95	* [45056 - 49152][49152-53248][53248-61440][61440-65536][ 65536+81920 ]	96	* [36867 - 45059][45059 - 53251][53251 - 57347][57347 - 61443][61443- 69635]
96	* [ compressed1 ][ regular ][compressed1][ regular ][ hole but no extent]	97	* [ prealloc1 ][ compressed ][ compressed1 ][ regular ][ compressed1]
97	*	98	*
98	* [81920-86016]	99	* [69635-73731][ 73731 - 86019 ][86019-90115]
99	* [ regular ]	100	* [ regular ][ hole but no extent][ regular ]
100	*/	101	*/
101	static void setup_file_extents(struct btrfs_root *root)	102	static void setup_file_extents(struct btrfs_root *root, u32 sectorsize)
102	{	103	{
103	int slot = 0;	104	int slot = 0;
104	u64 disk_bytenr = SZ_1M;	105	u64 disk_bytenr = SZ_1M;
@@ -119,7 +120,7 @@ static void setup_file_extents(struct btrfs_root *root) · 14 unmodified lines
119	insert_extent(root, offset, 1, 1, 0, 0, 0, BTRFS_FILE_EXTENT_INLINE, 0,	120	insert_extent(root, offset, 1, 1, 0, 0, 0, BTRFS_FILE_EXTENT_INLINE, 0,
120	slot);	121	slot);
121	slot++;	122	slot++;
122	offset = 4096;	123	offset = sectorsize;
123		124
124	/* Now another hole */	125	/* Now another hole */
125	insert_extent(root, offset, 4, 4, 0, 0, 0, BTRFS_FILE_EXTENT_REG, 0,	126	insert_extent(root, offset, 4, 4, 0, 0, 0, BTRFS_FILE_EXTENT_REG, 0,
@@ -128,99 +129,106 @@ static void setup_file_extents(struct btrfs_root *root) · 2 unmodified lines
128	offset += 4;	129	offset += 4;
129		130
130	/* Now for a regular extent */	131	/* Now for a regular extent */
131	insert_extent(root, offset, 4095, 4095, 0, disk_bytenr, 4096,	132	insert_extent(root, offset, sectorsize - 1, sectorsize - 1, 0,
132	BTRFS_FILE_EXTENT_REG, 0, slot);	133	disk_bytenr, sectorsize, BTRFS_FILE_EXTENT_REG, 0, slot);
133	slot++;	134	slot++;
134	disk_bytenr += 4096;	135	disk_bytenr += sectorsize;
135	offset += 4095;	136	offset += sectorsize - 1;
136		137
137	/*	138	/*
138	* Now for 3 extents that were split from a hole punch so we test	139	* Now for 3 extents that were split from a hole punch so we test
139	* offsets properly.	140	* offsets properly.
140	*/	141	*/
141	insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 16384,	142	insert_extent(root, offset, sectorsize, 4 * sectorsize, 0, disk_bytenr,
142	BTRFS_FILE_EXTENT_REG, 0, slot);	143	4 * sectorsize, BTRFS_FILE_EXTENT_REG, 0, slot);
143	slot++;	144	slot++;
144	offset += 4096;	145	offset += sectorsize;
145	insert_extent(root, offset, 4096, 4096, 0, 0, 0, BTRFS_FILE_EXTENT_REG,	146	insert_extent(root, offset, sectorsize, sectorsize, 0, 0, 0,
146	0, slot);	147	BTRFS_FILE_EXTENT_REG, 0, slot);
147	slot++;	148	slot++;
148	offset += 4096;	149	offset += sectorsize;
149	insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 16384,	150	insert_extent(root, offset, 2 * sectorsize, 4 * sectorsize,
		151	2 * sectorsize, disk_bytenr, 4 * sectorsize,
150	BTRFS_FILE_EXTENT_REG, 0, slot);	152	BTRFS_FILE_EXTENT_REG, 0, slot);
151	slot++;	153	slot++;
152	offset += 8192;	154	offset += 2 * sectorsize;
153	disk_bytenr += 16384;	155	disk_bytenr += 4 * sectorsize;
154		156
155	/* Now for a unwritten prealloc extent */	157	/* Now for a unwritten prealloc extent */
156	insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096,	158	insert_extent(root, offset, sectorsize, sectorsize, 0, disk_bytenr,
157	BTRFS_FILE_EXTENT_PREALLOC, 0, slot);	159	sectorsize, BTRFS_FILE_EXTENT_PREALLOC, 0, slot);
158	slot++;	160	slot++;
159	offset += 4096;	161	offset += sectorsize;
160		162
161	/*	163	/*
162	* We want to jack up disk_bytenr a little more so the em stuff doesn't	164	* We want to jack up disk_bytenr a little more so the em stuff doesn't
163	* merge our records.	165	* merge our records.
164	*/	166	*/
165	disk_bytenr += 8192;	167	disk_bytenr += 2 * sectorsize;
166		168
167	/*	169	/*
168	* Now for a partially written prealloc extent, basically the same as	170	* Now for a partially written prealloc extent, basically the same as
169	* the hole punch example above. Ram_bytes never changes when you mark	171	* the hole punch example above. Ram_bytes never changes when you mark
170	* extents written btw.	172	* extents written btw.
171	*/	173	*/
172	insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 16384,	174	insert_extent(root, offset, sectorsize, 4 * sectorsize, 0, disk_bytenr,
173	BTRFS_FILE_EXTENT_PREALLOC, 0, slot);	175	4 * sectorsize, BTRFS_FILE_EXTENT_PREALLOC, 0, slot);
174	slot++;	176	slot++;
175	offset += 4096;	177	offset += sectorsize;
176	insert_extent(root, offset, 4096, 16384, 4096, disk_bytenr, 16384,	178	insert_extent(root, offset, sectorsize, 4 * sectorsize, sectorsize,
177	BTRFS_FILE_EXTENT_REG, 0, slot);	179	disk_bytenr, 4 * sectorsize, BTRFS_FILE_EXTENT_REG, 0,
		180	slot);
178	slot++;	181	slot++;
179	offset += 4096;	182	offset += sectorsize;
180	insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 16384,	183	insert_extent(root, offset, 2 * sectorsize, 4 * sectorsize,
		184	2 * sectorsize, disk_bytenr, 4 * sectorsize,
181	BTRFS_FILE_EXTENT_PREALLOC, 0, slot);	185	BTRFS_FILE_EXTENT_PREALLOC, 0, slot);
182	slot++;	186	slot++;
183	offset += 8192;	187	offset += 2 * sectorsize;
184	disk_bytenr += 16384;	188	disk_bytenr += 4 * sectorsize;
185		189
186	/* Now a normal compressed extent */	190	/* Now a normal compressed extent */
187	insert_extent(root, offset, 8192, 8192, 0, disk_bytenr, 4096,	191	insert_extent(root, offset, 2 * sectorsize, 2 * sectorsize, 0,
188	BTRFS_FILE_EXTENT_REG, BTRFS_COMPRESS_ZLIB, slot);	192	disk_bytenr, sectorsize, BTRFS_FILE_EXTENT_REG,
		193	BTRFS_COMPRESS_ZLIB, slot);
189	slot++;	194	slot++;
190	offset += 8192;	195	offset += 2 * sectorsize;
191	/* No merges */	196	/* No merges */
192	disk_bytenr += 8192;	197	disk_bytenr += 2 * sectorsize;
193		198
194	/* Now a split compressed extent */	199	/* Now a split compressed extent */
195	insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 4096,	200	insert_extent(root, offset, sectorsize, 4 * sectorsize, 0, disk_bytenr,
196	BTRFS_FILE_EXTENT_REG, BTRFS_COMPRESS_ZLIB, slot);	201	sectorsize, BTRFS_FILE_EXTENT_REG,
		202	BTRFS_COMPRESS_ZLIB, slot);
197	slot++;	203	slot++;
198	offset += 4096;	204	offset += sectorsize;
199	insert_extent(root, offset, 4096, 4096, 0, disk_bytenr + 4096, 4096,	205	insert_extent(root, offset, sectorsize, sectorsize, 0,
		206	disk_bytenr + sectorsize, sectorsize,
200	BTRFS_FILE_EXTENT_REG, 0, slot);	207	BTRFS_FILE_EXTENT_REG, 0, slot);
201	slot++;	208	slot++;
202	offset += 4096;	209	offset += sectorsize;
203	insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 4096,	210	insert_extent(root, offset, 2 * sectorsize, 4 * sectorsize,
		211	2 * sectorsize, disk_bytenr, sectorsize,
204	BTRFS_FILE_EXTENT_REG, BTRFS_COMPRESS_ZLIB, slot);	212	BTRFS_FILE_EXTENT_REG, BTRFS_COMPRESS_ZLIB, slot);
205	slot++;	213	slot++;
206	offset += 8192;	214	offset += 2 * sectorsize;
207	disk_bytenr += 8192;	215	disk_bytenr += 2 * sectorsize;
208		216
209	/* Now extents that have a hole but no hole extent */	217	/* Now extents that have a hole but no hole extent */
210	insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096,	218	insert_extent(root, offset, sectorsize, sectorsize, 0, disk_bytenr,
211	BTRFS_FILE_EXTENT_REG, 0, slot);	219	sectorsize, BTRFS_FILE_EXTENT_REG, 0, slot);
212	slot++;	220	slot++;
213	offset += 16384;	221	offset += 4 * sectorsize;
214	disk_bytenr += 4096;	222	disk_bytenr += sectorsize;
215	insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096,	223	insert_extent(root, offset, sectorsize, sectorsize, 0, disk_bytenr,
216	BTRFS_FILE_EXTENT_REG, 0, slot);	224	sectorsize, BTRFS_FILE_EXTENT_REG, 0, slot);
217	}	225	}
218		226
219	static unsigned long prealloc_only = 0;	227	static unsigned long prealloc_only = 0;
220	static unsigned long compressed_only = 0;	228	static unsigned long compressed_only = 0;
221	static unsigned long vacancy_only = 0;	229	static unsigned long vacancy_only = 0;
222		230
223	static noinline int test_btrfs_get_extent(void)	231	static noinline int test_btrfs_get_extent(u32 sectorsize, u32 nodesize)
224	{	232	{
225	struct inode *inode = NULL;	233	struct inode *inode = NULL;
226	struct btrfs_root *root = NULL;	234	struct btrfs_root *root = NULL;
@@ -240,7 +248,7 @@ static noinline int test_btrfs_get_extent(void) · 13 unmodified lines
240	BTRFS_I(inode)->location.objectid = BTRFS_FIRST_FREE_OBJECTID;	248	BTRFS_I(inode)->location.objectid = BTRFS_FIRST_FREE_OBJECTID;
241	BTRFS_I(inode)->location.offset = 0;	249	BTRFS_I(inode)->location.offset = 0;
242		250
243	root = btrfs_alloc_dummy_root();	251	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
244	if (IS_ERR(root)) {	252	if (IS_ERR(root)) {
245	test_msg("Couldn't allocate root\n");	253	test_msg("Couldn't allocate root\n");
246	goto out;	254	goto out;
@@ -256,7 +264,7 @@ static noinline int test_btrfs_get_extent(void) · 9 unmodified lines
256	goto out;	264	goto out;
257	}	265	}
258		266
259	root->node = alloc_dummy_extent_buffer(NULL, 4096);	267	root->node = alloc_dummy_extent_buffer(NULL, nodesize, nodesize);
260	if (!root->node) {	268	if (!root->node) {
261	test_msg("Couldn't allocate dummy buffer\n");	269	test_msg("Couldn't allocate dummy buffer\n");
262	goto out;	270	goto out;
@@ -273,7 +281,7 @@ static noinline int test_btrfs_get_extent(void) · 10 unmodified lines
273		281
274	/* First with no extents */	282	/* First with no extents */
275	BTRFS_I(inode)->root = root;	283	BTRFS_I(inode)->root = root;
276	em = btrfs_get_extent(inode, NULL, 0, 0, 4096, 0);	284	em = btrfs_get_extent(inode, NULL, 0, 0, sectorsize, 0);
277	if (IS_ERR(em)) {	285	if (IS_ERR(em)) {
278	em = NULL;	286	em = NULL;
279	test_msg("Got an error when we shouldn't have\n");	287	test_msg("Got an error when we shouldn't have\n");
@@ -295,7 +303,7 @@ static noinline int test_btrfs_get_extent(void) · 15 unmodified lines
295	* setup_file_extents, so if you change anything there you need to	303	* setup_file_extents, so if you change anything there you need to
296	* update the comment and update the expected values below.	304	* update the comment and update the expected values below.
297	*/	305	*/
298	setup_file_extents(root);	306	setup_file_extents(root, sectorsize);
299		307
300	em = btrfs_get_extent(inode, NULL, 0, 0, (u64)-1, 0);	308	em = btrfs_get_extent(inode, NULL, 0, 0, (u64)-1, 0);
301	if (IS_ERR(em)) {	309	if (IS_ERR(em)) {
@@ -318,7 +326,7 @@ static noinline int test_btrfs_get_extent(void) · 16 unmodified lines
318	offset = em->start + em->len;	326	offset = em->start + em->len;
319	free_extent_map(em);	327	free_extent_map(em);
320		328
321	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	329	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
322	if (IS_ERR(em)) {	330	if (IS_ERR(em)) {
323	test_msg("Got an error when we shouldn't have\n");	331	test_msg("Got an error when we shouldn't have\n");
324	goto out;	332	goto out;
@@ -327,7 +335,8 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
327	test_msg("Expected an inline, got %llu\n", em->block_start);	335	test_msg("Expected an inline, got %llu\n", em->block_start);
328	goto out;	336	goto out;
329	}	337	}
330	if (em->start != offset \|\| em->len != 4091) {	338
		339	if (em->start != offset \|\| em->len != (sectorsize - 5)) {
331	test_msg("Unexpected extent wanted start %llu len 1, got start "	340	test_msg("Unexpected extent wanted start %llu len 1, got start "
332	"%llu len %llu\n", offset, em->start, em->len);	341	"%llu len %llu\n", offset, em->start, em->len);
333	goto out;	342	goto out;
@@ -344,7 +353,7 @@ static noinline int test_btrfs_get_extent(void) · 10 unmodified lines
344	offset = em->start + em->len;	353	offset = em->start + em->len;
345	free_extent_map(em);	354	free_extent_map(em);
346		355
347	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	356	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
348	if (IS_ERR(em)) {	357	if (IS_ERR(em)) {
349	test_msg("Got an error when we shouldn't have\n");	358	test_msg("Got an error when we shouldn't have\n");
350	goto out;	359	goto out;
@@ -366,7 +375,7 @@ static noinline int test_btrfs_get_extent(void) · 15 unmodified lines
366	free_extent_map(em);	375	free_extent_map(em);
367		376
368	/* Regular extent */	377	/* Regular extent */
369	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	378	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
370	if (IS_ERR(em)) {	379	if (IS_ERR(em)) {
371	test_msg("Got an error when we shouldn't have\n");	380	test_msg("Got an error when we shouldn't have\n");
372	goto out;	381	goto out;
@@ -375,7 +384,7 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
375	test_msg("Expected a real extent, got %llu\n", em->block_start);	384	test_msg("Expected a real extent, got %llu\n", em->block_start);
376	goto out;	385	goto out;
377	}	386	}
378	if (em->start != offset \|\| em->len != 4095) {	387	if (em->start != offset \|\| em->len != sectorsize - 1) {
379	test_msg("Unexpected extent wanted start %llu len 4095, got "	388	test_msg("Unexpected extent wanted start %llu len 4095, got "
380	"start %llu len %llu\n", offset, em->start, em->len);	389	"start %llu len %llu\n", offset, em->start, em->len);
381	goto out;	390	goto out;
@@ -393,7 +402,7 @@ static noinline int test_btrfs_get_extent(void) · 11 unmodified lines
393	free_extent_map(em);	402	free_extent_map(em);
394		403
395	/* The next 3 are split extents */	404	/* The next 3 are split extents */
396	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	405	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
397	if (IS_ERR(em)) {	406	if (IS_ERR(em)) {
398	test_msg("Got an error when we shouldn't have\n");	407	test_msg("Got an error when we shouldn't have\n");
399	goto out;	408	goto out;
@@ -402,9 +411,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
402	test_msg("Expected a real extent, got %llu\n", em->block_start);	411	test_msg("Expected a real extent, got %llu\n", em->block_start);
403	goto out;	412	goto out;
404	}	413	}
405	if (em->start != offset \|\| em->len != 4096) {	414	if (em->start != offset \|\| em->len != sectorsize) {
406	test_msg("Unexpected extent wanted start %llu len 4096, got "	415	test_msg("Unexpected extent start %llu len %u, "
407	"start %llu len %llu\n", offset, em->start, em->len);	416	"got start %llu len %llu\n",
		417	offset, sectorsize, em->start, em->len);
408	goto out;	418	goto out;
409	}	419	}
410	if (em->flags != 0) {	420	if (em->flags != 0) {
@@ -421,7 +431,7 @@ static noinline int test_btrfs_get_extent(void) · 10 unmodified lines
421	offset = em->start + em->len;	431	offset = em->start + em->len;
422	free_extent_map(em);	432	free_extent_map(em);
423		433
424	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	434	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
425	if (IS_ERR(em)) {	435	if (IS_ERR(em)) {
426	test_msg("Got an error when we shouldn't have\n");	436	test_msg("Got an error when we shouldn't have\n");
427	goto out;	437	goto out;
@@ -430,9 +440,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
430	test_msg("Expected a hole, got %llu\n", em->block_start);	440	test_msg("Expected a hole, got %llu\n", em->block_start);
431	goto out;	441	goto out;
432	}	442	}
433	if (em->start != offset \|\| em->len != 4096) {	443	if (em->start != offset \|\| em->len != sectorsize) {
434	test_msg("Unexpected extent wanted start %llu len 4096, got "	444	test_msg("Unexpected extent wanted start %llu len %u, "
435	"start %llu len %llu\n", offset, em->start, em->len);	445	"got start %llu len %llu\n",
		446	offset, sectorsize, em->start, em->len);
436	goto out;	447	goto out;
437	}	448	}
438	if (em->flags != 0) {	449	if (em->flags != 0) {
@@ -442,7 +453,7 @@ static noinline int test_btrfs_get_extent(void) · 3 unmodified lines
442	offset = em->start + em->len;	453	offset = em->start + em->len;
443	free_extent_map(em);	454	free_extent_map(em);
444		455
445	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	456	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
446	if (IS_ERR(em)) {	457	if (IS_ERR(em)) {
447	test_msg("Got an error when we shouldn't have\n");	458	test_msg("Got an error when we shouldn't have\n");
448	goto out;	459	goto out;
@@ -451,9 +462,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
451	test_msg("Expected a real extent, got %llu\n", em->block_start);	462	test_msg("Expected a real extent, got %llu\n", em->block_start);
452	goto out;	463	goto out;
453	}	464	}
454	if (em->start != offset \|\| em->len != 8192) {	465	if (em->start != offset \|\| em->len != 2 * sectorsize) {
455	test_msg("Unexpected extent wanted start %llu len 8192, got "	466	test_msg("Unexpected extent wanted start %llu len %u, "
456	"start %llu len %llu\n", offset, em->start, em->len);	467	"got start %llu len %llu\n",
		468	offset, 2 * sectorsize, em->start, em->len);
457	goto out;	469	goto out;
458	}	470	}
459	if (em->flags != 0) {	471	if (em->flags != 0) {
@@ -475,7 +487,7 @@ static noinline int test_btrfs_get_extent(void) · 15 unmodified lines
475	free_extent_map(em);	487	free_extent_map(em);
476		488
477	/* Prealloc extent */	489	/* Prealloc extent */
478	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	490	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
479	if (IS_ERR(em)) {	491	if (IS_ERR(em)) {
480	test_msg("Got an error when we shouldn't have\n");	492	test_msg("Got an error when we shouldn't have\n");
481	goto out;	493	goto out;
@@ -484,9 +496,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
484	test_msg("Expected a real extent, got %llu\n", em->block_start);	496	test_msg("Expected a real extent, got %llu\n", em->block_start);
485	goto out;	497	goto out;
486	}	498	}
487	if (em->start != offset \|\| em->len != 4096) {	499	if (em->start != offset \|\| em->len != sectorsize) {
488	test_msg("Unexpected extent wanted start %llu len 4096, got "	500	test_msg("Unexpected extent wanted start %llu len %u, "
489	"start %llu len %llu\n", offset, em->start, em->len);	501	"got start %llu len %llu\n",
		502	offset, sectorsize, em->start, em->len);
490	goto out;	503	goto out;
491	}	504	}
492	if (em->flags != prealloc_only) {	505	if (em->flags != prealloc_only) {
@@ -503,7 +516,7 @@ static noinline int test_btrfs_get_extent(void) · 10 unmodified lines
503	free_extent_map(em);	516	free_extent_map(em);
504		517
505	/* The next 3 are a half written prealloc extent */	518	/* The next 3 are a half written prealloc extent */
506	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	519	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
507	if (IS_ERR(em)) {	520	if (IS_ERR(em)) {
508	test_msg("Got an error when we shouldn't have\n");	521	test_msg("Got an error when we shouldn't have\n");
509	goto out;	522	goto out;
@@ -512,9 +525,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
512	test_msg("Expected a real extent, got %llu\n", em->block_start);	525	test_msg("Expected a real extent, got %llu\n", em->block_start);
513	goto out;	526	goto out;
514	}	527	}
515	if (em->start != offset \|\| em->len != 4096) {	528	if (em->start != offset \|\| em->len != sectorsize) {
516	test_msg("Unexpected extent wanted start %llu len 4096, got "	529	test_msg("Unexpected extent wanted start %llu len %u, "
517	"start %llu len %llu\n", offset, em->start, em->len);	530	"got start %llu len %llu\n",
		531	offset, sectorsize, em->start, em->len);
518	goto out;	532	goto out;
519	}	533	}
520	if (em->flags != prealloc_only) {	534	if (em->flags != prealloc_only) {
@@ -532,7 +546,7 @@ static noinline int test_btrfs_get_extent(void) · 11 unmodified lines
532	offset = em->start + em->len;	546	offset = em->start + em->len;
533	free_extent_map(em);	547	free_extent_map(em);
534		548
535	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	549	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
536	if (IS_ERR(em)) {	550	if (IS_ERR(em)) {
537	test_msg("Got an error when we shouldn't have\n");	551	test_msg("Got an error when we shouldn't have\n");
538	goto out;	552	goto out;
@@ -541,9 +555,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
541	test_msg("Expected a real extent, got %llu\n", em->block_start);	555	test_msg("Expected a real extent, got %llu\n", em->block_start);
542	goto out;	556	goto out;
543	}	557	}
544	if (em->start != offset \|\| em->len != 4096) {	558	if (em->start != offset \|\| em->len != sectorsize) {
545	test_msg("Unexpected extent wanted start %llu len 4096, got "	559	test_msg("Unexpected extent wanted start %llu len %u, "
546	"start %llu len %llu\n", offset, em->start, em->len);	560	"got start %llu len %llu\n",
		561	offset, sectorsize, em->start, em->len);
547	goto out;	562	goto out;
548	}	563	}
549	if (em->flags != 0) {	564	if (em->flags != 0) {
@@ -564,7 +579,7 @@ static noinline int test_btrfs_get_extent(void) · 14 unmodified lines
564	offset = em->start + em->len;	579	offset = em->start + em->len;
565	free_extent_map(em);	580	free_extent_map(em);
566		581
567	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	582	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
568	if (IS_ERR(em)) {	583	if (IS_ERR(em)) {
569	test_msg("Got an error when we shouldn't have\n");	584	test_msg("Got an error when we shouldn't have\n");
570	goto out;	585	goto out;
@@ -573,9 +588,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
573	test_msg("Expected a real extent, got %llu\n", em->block_start);	588	test_msg("Expected a real extent, got %llu\n", em->block_start);
574	goto out;	589	goto out;
575	}	590	}
576	if (em->start != offset \|\| em->len != 8192) {	591	if (em->start != offset \|\| em->len != 2 * sectorsize) {
577	test_msg("Unexpected extent wanted start %llu len 8192, got "	592	test_msg("Unexpected extent wanted start %llu len %u, "
578	"start %llu len %llu\n", offset, em->start, em->len);	593	"got start %llu len %llu\n",
		594	offset, 2 * sectorsize, em->start, em->len);
579	goto out;	595	goto out;
580	}	596	}
581	if (em->flags != prealloc_only) {	597	if (em->flags != prealloc_only) {
@@ -598,7 +614,7 @@ static noinline int test_btrfs_get_extent(void) · 16 unmodified lines
598	free_extent_map(em);	614	free_extent_map(em);
599		615
600	/* Now for the compressed extent */	616	/* Now for the compressed extent */
601	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	617	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
602	if (IS_ERR(em)) {	618	if (IS_ERR(em)) {
603	test_msg("Got an error when we shouldn't have\n");	619	test_msg("Got an error when we shouldn't have\n");
604	goto out;	620	goto out;
@@ -607,9 +623,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
607	test_msg("Expected a real extent, got %llu\n", em->block_start);	623	test_msg("Expected a real extent, got %llu\n", em->block_start);
608	goto out;	624	goto out;
609	}	625	}
610	if (em->start != offset \|\| em->len != 8192) {	626	if (em->start != offset \|\| em->len != 2 * sectorsize) {
611	test_msg("Unexpected extent wanted start %llu len 8192, got "	627	test_msg("Unexpected extent wanted start %llu len %u,"
612	"start %llu len %llu\n", offset, em->start, em->len);	628	"got start %llu len %llu\n",
		629	offset, 2 * sectorsize, em->start, em->len);
613	goto out;	630	goto out;
614	}	631	}
615	if (em->flags != compressed_only) {	632	if (em->flags != compressed_only) {
@@ -631,7 +648,7 @@ static noinline int test_btrfs_get_extent(void) · 15 unmodified lines
631	free_extent_map(em);	648	free_extent_map(em);
632		649
633	/* Split compressed extent */	650	/* Split compressed extent */
634	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	651	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
635	if (IS_ERR(em)) {	652	if (IS_ERR(em)) {
636	test_msg("Got an error when we shouldn't have\n");	653	test_msg("Got an error when we shouldn't have\n");
637	goto out;	654	goto out;
@@ -640,9 +657,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
640	test_msg("Expected a real extent, got %llu\n", em->block_start);	657	test_msg("Expected a real extent, got %llu\n", em->block_start);
641	goto out;	658	goto out;
642	}	659	}
643	if (em->start != offset \|\| em->len != 4096) {	660	if (em->start != offset \|\| em->len != sectorsize) {
644	test_msg("Unexpected extent wanted start %llu len 4096, got "	661	test_msg("Unexpected extent wanted start %llu len %u,"
645	"start %llu len %llu\n", offset, em->start, em->len);	662	"got start %llu len %llu\n",
		663	offset, sectorsize, em->start, em->len);
646	goto out;	664	goto out;
647	}	665	}
648	if (em->flags != compressed_only) {	666	if (em->flags != compressed_only) {
@@ -665,7 +683,7 @@ static noinline int test_btrfs_get_extent(void) · 16 unmodified lines
665	offset = em->start + em->len;	683	offset = em->start + em->len;
666	free_extent_map(em);	684	free_extent_map(em);
667		685
668	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	686	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
669	if (IS_ERR(em)) {	687	if (IS_ERR(em)) {
670	test_msg("Got an error when we shouldn't have\n");	688	test_msg("Got an error when we shouldn't have\n");
671	goto out;	689	goto out;
@@ -674,9 +692,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
674	test_msg("Expected a real extent, got %llu\n", em->block_start);	692	test_msg("Expected a real extent, got %llu\n", em->block_start);
675	goto out;	693	goto out;
676	}	694	}
677	if (em->start != offset \|\| em->len != 4096) {	695	if (em->start != offset \|\| em->len != sectorsize) {
678	test_msg("Unexpected extent wanted start %llu len 4096, got "	696	test_msg("Unexpected extent wanted start %llu len %u, "
679	"start %llu len %llu\n", offset, em->start, em->len);	697	"got start %llu len %llu\n",
		698	offset, sectorsize, em->start, em->len);
680	goto out;	699	goto out;
681	}	700	}
682	if (em->flags != 0) {	701	if (em->flags != 0) {
@@ -691,7 +710,7 @@ static noinline int test_btrfs_get_extent(void) · 8 unmodified lines
691	offset = em->start + em->len;	710	offset = em->start + em->len;
692	free_extent_map(em);	711	free_extent_map(em);
693		712
694	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	713	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
695	if (IS_ERR(em)) {	714	if (IS_ERR(em)) {
696	test_msg("Got an error when we shouldn't have\n");	715	test_msg("Got an error when we shouldn't have\n");
697	goto out;	716	goto out;
@@ -701,9 +720,10 @@ static noinline int test_btrfs_get_extent(void) · 3 unmodified lines
701	disk_bytenr, em->block_start);	720	disk_bytenr, em->block_start);
702	goto out;	721	goto out;
703	}	722	}
704	if (em->start != offset \|\| em->len != 8192) {	723	if (em->start != offset \|\| em->len != 2 * sectorsize) {
705	test_msg("Unexpected extent wanted start %llu len 8192, got "	724	test_msg("Unexpected extent wanted start %llu len %u, "
706	"start %llu len %llu\n", offset, em->start, em->len);	725	"got start %llu len %llu\n",
		726	offset, 2 * sectorsize, em->start, em->len);
707	goto out;	727	goto out;
708	}	728	}
709	if (em->flags != compressed_only) {	729	if (em->flags != compressed_only) {
@@ -725,7 +745,7 @@ static noinline int test_btrfs_get_extent(void) · 15 unmodified lines
725	free_extent_map(em);	745	free_extent_map(em);
726		746
727	/* A hole between regular extents but no hole extent */	747	/* A hole between regular extents but no hole extent */
728	em = btrfs_get_extent(inode, NULL, 0, offset + 6, 4096, 0);	748	em = btrfs_get_extent(inode, NULL, 0, offset + 6, sectorsize, 0);
729	if (IS_ERR(em)) {	749	if (IS_ERR(em)) {
730	test_msg("Got an error when we shouldn't have\n");	750	test_msg("Got an error when we shouldn't have\n");
731	goto out;	751	goto out;
@@ -734,9 +754,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
734	test_msg("Expected a real extent, got %llu\n", em->block_start);	754	test_msg("Expected a real extent, got %llu\n", em->block_start);
735	goto out;	755	goto out;
736	}	756	}
737	if (em->start != offset \|\| em->len != 4096) {	757	if (em->start != offset \|\| em->len != sectorsize) {
738	test_msg("Unexpected extent wanted start %llu len 4096, got "	758	test_msg("Unexpected extent wanted start %llu len %u, "
739	"start %llu len %llu\n", offset, em->start, em->len);	759	"got start %llu len %llu\n",
		760	offset, sectorsize, em->start, em->len);
740	goto out;	761	goto out;
741	}	762	}
742	if (em->flags != 0) {	763	if (em->flags != 0) {
@@ -765,9 +786,10 @@ static noinline int test_btrfs_get_extent(void) · 22 unmodified lines
765	* length of the actual hole, if this changes we'll have to change this	786	* length of the actual hole, if this changes we'll have to change this
766	* test.	787	* test.
767	*/	788	*/
768	if (em->start != offset \|\| em->len != 12288) {	789	if (em->start != offset \|\| em->len != 3 * sectorsize) {
769	test_msg("Unexpected extent wanted start %llu len 12288, got "	790	test_msg("Unexpected extent wanted start %llu len %u, "
770	"start %llu len %llu\n", offset, em->start, em->len);	791	"got start %llu len %llu\n",
		792	offset, 3 * sectorsize, em->start, em->len);
771	goto out;	793	goto out;
772	}	794	}
773	if (em->flags != vacancy_only) {	795	if (em->flags != vacancy_only) {
@@ -783,7 +805,7 @@ static noinline int test_btrfs_get_extent(void) · 9 unmodified lines
783	offset = em->start + em->len;	805	offset = em->start + em->len;
784	free_extent_map(em);	806	free_extent_map(em);
785		807
786	em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0);	808	em = btrfs_get_extent(inode, NULL, 0, offset, sectorsize, 0);
787	if (IS_ERR(em)) {	809	if (IS_ERR(em)) {
788	test_msg("Got an error when we shouldn't have\n");	810	test_msg("Got an error when we shouldn't have\n");
789	goto out;	811	goto out;
@@ -792,9 +814,10 @@ static noinline int test_btrfs_get_extent(void) · 2 unmodified lines
792	test_msg("Expected a real extent, got %llu\n", em->block_start);	814	test_msg("Expected a real extent, got %llu\n", em->block_start);
793	goto out;	815	goto out;
794	}	816	}
795	if (em->start != offset \|\| em->len != 4096) {	817	if (em->start != offset \|\| em->len != sectorsize) {
796	test_msg("Unexpected extent wanted start %llu len 4096, got "	818	test_msg("Unexpected extent wanted start %llu len %u,"
797	"start %llu len %llu\n", offset, em->start, em->len);	819	"got start %llu len %llu\n",
		820	offset, sectorsize, em->start, em->len);
798	goto out;	821	goto out;
799	}	822	}
800	if (em->flags != 0) {	823	if (em->flags != 0) {
@@ -815,7 +838,7 @@ out: · 14 unmodified lines
815	return ret;	838	return ret;
816	}	839	}
817		840
818	static int test_hole_first(void)	841	static int test_hole_first(u32 sectorsize, u32 nodesize)
819	{	842	{
820	struct inode *inode = NULL;	843	struct inode *inode = NULL;
821	struct btrfs_root *root = NULL;	844	struct btrfs_root *root = NULL;
@@ -832,7 +855,7 @@ static int test_hole_first(void) · 10 unmodified lines
832	BTRFS_I(inode)->location.objectid = BTRFS_FIRST_FREE_OBJECTID;	855	BTRFS_I(inode)->location.objectid = BTRFS_FIRST_FREE_OBJECTID;
833	BTRFS_I(inode)->location.offset = 0;	856	BTRFS_I(inode)->location.offset = 0;
834		857
835	root = btrfs_alloc_dummy_root();	858	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
836	if (IS_ERR(root)) {	859	if (IS_ERR(root)) {
837	test_msg("Couldn't allocate root\n");	860	test_msg("Couldn't allocate root\n");
838	goto out;	861	goto out;
@@ -844,7 +867,7 @@ static int test_hole_first(void) · 5 unmodified lines
844	goto out;	867	goto out;
845	}	868	}
846		869
847	root->node = alloc_dummy_extent_buffer(NULL, 4096);	870	root->node = alloc_dummy_extent_buffer(NULL, nodesize, nodesize);
848	if (!root->node) {	871	if (!root->node) {
849	test_msg("Couldn't allocate dummy buffer\n");	872	test_msg("Couldn't allocate dummy buffer\n");
850	goto out;	873	goto out;
@@ -861,9 +884,9 @@ static int test_hole_first(void) · 10 unmodified lines
861	* btrfs_get_extent.	884	* btrfs_get_extent.
862	*/	885	*/
863	insert_inode_item_key(root);	886	insert_inode_item_key(root);
864	insert_extent(root, 4096, 4096, 4096, 0, 4096, 4096,	887	insert_extent(root, sectorsize, sectorsize, sectorsize, 0, sectorsize,
865	BTRFS_FILE_EXTENT_REG, 0, 1);	888	sectorsize, BTRFS_FILE_EXTENT_REG, 0, 1);
866	em = btrfs_get_extent(inode, NULL, 0, 0, 8192, 0);	889	em = btrfs_get_extent(inode, NULL, 0, 0, 2 * sectorsize, 0);
867	if (IS_ERR(em)) {	890	if (IS_ERR(em)) {
868	test_msg("Got an error when we shouldn't have\n");	891	test_msg("Got an error when we shouldn't have\n");
869	goto out;	892	goto out;
@@ -872,9 +895,10 @@ static int test_hole_first(void) · 2 unmodified lines
872	test_msg("Expected a hole, got %llu\n", em->block_start);	895	test_msg("Expected a hole, got %llu\n", em->block_start);
873	goto out;	896	goto out;
874	}	897	}
875	if (em->start != 0 \|\| em->len != 4096) {	898	if (em->start != 0 \|\| em->len != sectorsize) {
876	test_msg("Unexpected extent wanted start 0 len 4096, got start "	899	test_msg("Unexpected extent wanted start 0 len %u, "
877	"%llu len %llu\n", em->start, em->len);	900	"got start %llu len %llu\n",
		901	sectorsize, em->start, em->len);
878	goto out;	902	goto out;
879	}	903	}
880	if (em->flags != vacancy_only) {	904	if (em->flags != vacancy_only) {
@@ -884,18 +908,19 @@ static int test_hole_first(void) · 3 unmodified lines
884	}	908	}
885	free_extent_map(em);	909	free_extent_map(em);
886		910
887	em = btrfs_get_extent(inode, NULL, 0, 4096, 8192, 0);	911	em = btrfs_get_extent(inode, NULL, 0, sectorsize, 2 * sectorsize, 0);
888	if (IS_ERR(em)) {	912	if (IS_ERR(em)) {
889	test_msg("Got an error when we shouldn't have\n");	913	test_msg("Got an error when we shouldn't have\n");
890	goto out;	914	goto out;
891	}	915	}
892	if (em->block_start != 4096) {	916	if (em->block_start != sectorsize) {
893	test_msg("Expected a real extent, got %llu\n", em->block_start);	917	test_msg("Expected a real extent, got %llu\n", em->block_start);
894	goto out;	918	goto out;
895	}	919	}
896	if (em->start != 4096 \|\| em->len != 4096) {	920	if (em->start != sectorsize \|\| em->len != sectorsize) {
897	test_msg("Unexpected extent wanted start 4096 len 4096, got "	921	test_msg("Unexpected extent wanted start %u len %u, "
898	"start %llu len %llu\n", em->start, em->len);	922	"got start %llu len %llu\n",
		923	sectorsize, sectorsize, em->start, em->len);
899	goto out;	924	goto out;
900	}	925	}
901	if (em->flags != 0) {	926	if (em->flags != 0) {
@@ -912,7 +937,7 @@ out: · 10 unmodified lines
912	return ret;	937	return ret;
913	}	938	}
914		939
915	static int test_extent_accounting(void)	940	static int test_extent_accounting(u32 sectorsize, u32 nodesize)
916	{	941	{
917	struct inode *inode = NULL;	942	struct inode *inode = NULL;
918	struct btrfs_root *root = NULL;	943	struct btrfs_root *root = NULL;
@@ -924,7 +949,7 @@ static int test_extent_accounting(void) · 5 unmodified lines
924	return ret;	949	return ret;
925	}	950	}
926		951
927	root = btrfs_alloc_dummy_root();	952	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
928	if (IS_ERR(root)) {	953	if (IS_ERR(root)) {
929	test_msg("Couldn't allocate root\n");	954	test_msg("Couldn't allocate root\n");
930	goto out;	955	goto out;
@@ -954,10 +979,11 @@ static int test_extent_accounting(void) · 23 unmodified lines
954	goto out;	979	goto out;
955	}	980	}
956		981
957	/* [BTRFS_MAX_EXTENT_SIZE][4k] */	982	/* [BTRFS_MAX_EXTENT_SIZE][sectorsize] */
958	BTRFS_I(inode)->outstanding_extents++;	983	BTRFS_I(inode)->outstanding_extents++;
959	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE,	984	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE,
960	BTRFS_MAX_EXTENT_SIZE + 4095, NULL);	985	BTRFS_MAX_EXTENT_SIZE + sectorsize - 1,
		986	NULL);
961	if (ret) {	987	if (ret) {
962	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);	988	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
963	goto out;	989	goto out;
@@ -969,10 +995,10 @@ static int test_extent_accounting(void) · 5 unmodified lines
969	goto out;	995	goto out;
970	}	996	}
971		997
972	/* [BTRFS_MAX_EXTENT_SIZE/2][4K HOLE][the rest] */	998	/* [BTRFS_MAX_EXTENT_SIZE/2][sectorsize HOLE][the rest] */
973	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,	999	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
974	BTRFS_MAX_EXTENT_SIZE >> 1,	1000	BTRFS_MAX_EXTENT_SIZE >> 1,
975	(BTRFS_MAX_EXTENT_SIZE >> 1) + 4095,	1001	(BTRFS_MAX_EXTENT_SIZE >> 1) + sectorsize - 1,
976	EXTENT_DELALLOC \| EXTENT_DIRTY \|	1002	EXTENT_DELALLOC \| EXTENT_DIRTY \|
977	EXTENT_UPTODATE \| EXTENT_DO_ACCOUNTING, 0, 0,	1003	EXTENT_UPTODATE \| EXTENT_DO_ACCOUNTING, 0, 0,
978	NULL, GFP_KERNEL);	1004	NULL, GFP_KERNEL);
@@ -987,10 +1013,11 @@ static int test_extent_accounting(void) · 8 unmodified lines
987	goto out;	1013	goto out;
988	}	1014	}
989		1015
990	/* [BTRFS_MAX_EXTENT_SIZE][4K] */	1016	/* [BTRFS_MAX_EXTENT_SIZE][sectorsize] */
991	BTRFS_I(inode)->outstanding_extents++;	1017	BTRFS_I(inode)->outstanding_extents++;
992	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE >> 1,	1018	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE >> 1,
993	(BTRFS_MAX_EXTENT_SIZE >> 1) + 4095,	1019	(BTRFS_MAX_EXTENT_SIZE >> 1)
		1020	+ sectorsize - 1,
994	NULL);	1021	NULL);
995	if (ret) {	1022	if (ret) {
996	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);	1023	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
@@ -1004,16 +1031,17 @@ static int test_extent_accounting(void) · 7 unmodified lines
1004	}	1031	}
1005		1032
1006	/*	1033	/*
1007	* [BTRFS_MAX_EXTENT_SIZE+4K][4K HOLE][BTRFS_MAX_EXTENT_SIZE+4K]	1034	* [BTRFS_MAX_EXTENT_SIZE+sectorsize][sectorsize HOLE][BTRFS_MAX_EXTENT_SIZE+sectorsize]
1008	*	1035	*
1009	* I'm artificially adding 2 to outstanding_extents because in the	1036	* I'm artificially adding 2 to outstanding_extents because in the
1010	* buffered IO case we'd add things up as we go, but I don't feel like	1037	* buffered IO case we'd add things up as we go, but I don't feel like
1011	* doing that here, this isn't the interesting case we want to test.	1038	* doing that here, this isn't the interesting case we want to test.
1012	*/	1039	*/
1013	BTRFS_I(inode)->outstanding_extents += 2;	1040	BTRFS_I(inode)->outstanding_extents += 2;
1014	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE + 8192,	1041	ret = btrfs_set_extent_delalloc(inode,
1015	(BTRFS_MAX_EXTENT_SIZE << 1) + 12287,	1042	BTRFS_MAX_EXTENT_SIZE + 2 * sectorsize,
1016	NULL);	1043	(BTRFS_MAX_EXTENT_SIZE << 1) + 3 * sectorsize - 1,
		1044	NULL);
1017	if (ret) {	1045	if (ret) {
1018	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);	1046	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1019	goto out;	1047	goto out;
@@ -1025,10 +1053,13 @@ static int test_extent_accounting(void) · 5 unmodified lines
1025	goto out;	1053	goto out;
1026	}	1054	}
1027		1055
1028	/* [BTRFS_MAX_EXTENT_SIZE+4k][4k][BTRFS_MAX_EXTENT_SIZE+4k] */	1056	/*
		1057	* [BTRFS_MAX_EXTENT_SIZE+sectorsize][sectorsize][BTRFS_MAX_EXTENT_SIZE+sectorsize]
		1058	*/
1029	BTRFS_I(inode)->outstanding_extents++;	1059	BTRFS_I(inode)->outstanding_extents++;
1030	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE+4096,	1060	ret = btrfs_set_extent_delalloc(inode,
1031	BTRFS_MAX_EXTENT_SIZE+8191, NULL);	1061	BTRFS_MAX_EXTENT_SIZE + sectorsize,
		1062	BTRFS_MAX_EXTENT_SIZE + 2 * sectorsize - 1, NULL);
1032	if (ret) {	1063	if (ret) {
1033	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);	1064	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1034	goto out;	1065	goto out;
@@ -1042,8 +1073,8 @@ static int test_extent_accounting(void) · 7 unmodified lines
1042		1073
1043	/* [BTRFS_MAX_EXTENT_SIZE+4k][4K HOLE][BTRFS_MAX_EXTENT_SIZE+4k] */	1074	/* [BTRFS_MAX_EXTENT_SIZE+4k][4K HOLE][BTRFS_MAX_EXTENT_SIZE+4k] */
1044	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,	1075	ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
1045	BTRFS_MAX_EXTENT_SIZE+4096,	1076	BTRFS_MAX_EXTENT_SIZE + sectorsize,
1046	BTRFS_MAX_EXTENT_SIZE+8191,	1077	BTRFS_MAX_EXTENT_SIZE + 2 * sectorsize - 1,
1047	EXTENT_DIRTY \| EXTENT_DELALLOC \|	1078	EXTENT_DIRTY \| EXTENT_DELALLOC \|
1048	EXTENT_DO_ACCOUNTING \| EXTENT_UPTODATE, 0, 0,	1079	EXTENT_DO_ACCOUNTING \| EXTENT_UPTODATE, 0, 0,
1049	NULL, GFP_KERNEL);	1080	NULL, GFP_KERNEL);
@@ -1063,8 +1094,9 @@ static int test_extent_accounting(void) · 13 unmodified lines
1063	* might fail and I'd rather satisfy my paranoia at this point.	1094	* might fail and I'd rather satisfy my paranoia at this point.
1064	*/	1095	*/
1065	BTRFS_I(inode)->outstanding_extents++;	1096	BTRFS_I(inode)->outstanding_extents++;
1066	ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE+4096,	1097	ret = btrfs_set_extent_delalloc(inode,
1067	BTRFS_MAX_EXTENT_SIZE+8191, NULL);	1098	BTRFS_MAX_EXTENT_SIZE + sectorsize,
		1099	BTRFS_MAX_EXTENT_SIZE + 2 * sectorsize - 1, NULL);
1068	if (ret) {	1100	if (ret) {
1069	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);	1101	test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1070	goto out;	1102	goto out;
@@ -1103,7 +1135,7 @@ out: · 32 unmodified lines
1103	return ret;	1135	return ret;
1104	}	1136	}
1105		1137
1106	int btrfs_test_inodes(void)	1138	int btrfs_test_inodes(u32 sectorsize, u32 nodesize)
1107	{	1139	{
1108	int ret;	1140	int ret;
1109		1141
@@ -1112,13 +1144,13 @@ int btrfs_test_inodes(void) · 2 unmodified lines
1112	set_bit(EXTENT_FLAG_PREALLOC, &prealloc_only);	1144	set_bit(EXTENT_FLAG_PREALLOC, &prealloc_only);
1113		1145
1114	test_msg("Running btrfs_get_extent tests\n");	1146	test_msg("Running btrfs_get_extent tests\n");
1115	ret = test_btrfs_get_extent();	1147	ret = test_btrfs_get_extent(sectorsize, nodesize);
1116	if (ret)	1148	if (ret)
1117	return ret;	1149	return ret;
1118	test_msg("Running hole first btrfs_get_extent test\n");	1150	test_msg("Running hole first btrfs_get_extent test\n");
1119	ret = test_hole_first();	1151	ret = test_hole_first(sectorsize, nodesize);
1120	if (ret)	1152	if (ret)
1121	return ret;	1153	return ret;
1122	test_msg("Running outstanding_extents tests\n");	1154	test_msg("Running outstanding_extents tests\n");
1123	return test_extent_accounting();	1155	return test_extent_accounting(sectorsize, nodesize);
1124	}	1156	}

fs/btrfs/tests/qgroup-tests.c+64−47

  * Boston, MA 021110-1307, USA.
  */
+#include <linux/types.h>
 #include "btrfs-tests.h"
 #include "../ctree.h"
 #include "../transaction.h"
 	return ret;
 }
-static int test_no_shared_qgroup(struct btrfs_root *root)
+static int test_no_shared_qgroup(struct btrfs_root *root,
+		u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_trans_handle trans;
 	struct btrfs_fs_info *fs_info = root->fs_info;
 	btrfs_init_dummy_trans(&trans);
 	test_msg("Qgroup basic add\n");
-	ret = btrfs_create_qgroup(NULL, fs_info, 5);
+	ret = btrfs_create_qgroup(NULL, fs_info, BTRFS_FS_TREE_OBJECTID);
 	if (ret) {
 		test_msg("Couldn't create a qgroup %d\n", ret);
 		return ret;
 	 * we can only call btrfs_qgroup_account_extent() directly to test
 	 * quota.
 	 */
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &old_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &old_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		test_msg("Couldn't find old roots: %d\n", ret);
 		return ret;
 	}
-	ret = insert_normal_tree_ref(root, 4096, 4096, 0, 5);
+	ret = insert_normal_tree_ref(root, nodesize, nodesize, 0,
+				BTRFS_FS_TREE_OBJECTID);
 	if (ret)
 		return ret;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &new_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &new_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		ulist_free(new_roots);
 		return ret;
 	}
-	ret = btrfs_qgroup_account_extent(&trans, fs_info, 4096, 4096,
+	ret = btrfs_qgroup_account_extent(&trans, fs_info, nodesize,
-					  old_roots, new_roots);
+					  nodesize, old_roots, new_roots);
 	if (ret) {
 		test_msg("Couldn't account space for a qgroup %d\n", ret);
 		return ret;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 5, 4096, 4096)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FS_TREE_OBJECTID,
+				nodesize, nodesize)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
 	old_roots = NULL;
 	new_roots = NULL;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &old_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &old_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		test_msg("Couldn't find old roots: %d\n", ret);
 		return ret;
 	}
-	ret = remove_extent_item(root, 4096, 4096);
+	ret = remove_extent_item(root, nodesize, nodesize);
 	if (ret)
 		return -EINVAL;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &new_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &new_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		ulist_free(new_roots);
 		return ret;
 	}
-	ret = btrfs_qgroup_account_extent(&trans, fs_info, 4096, 4096,
+	ret = btrfs_qgroup_account_extent(&trans, fs_info, nodesize,
-					  old_roots, new_roots);
+					  nodesize, old_roots, new_roots);
 	if (ret) {
 		test_msg("Couldn't account space for a qgroup %d\n", ret);
 		return -EINVAL;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 5, 0, 0)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FS_TREE_OBJECTID, 0, 0)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
  * right, also remove one of the roots and make sure the exclusive count is
  * adjusted properly.
  */
-static int test_multiple_refs(struct btrfs_root *root)
+static int test_multiple_refs(struct btrfs_root *root,
+		u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_trans_handle trans;
 	struct btrfs_fs_info *fs_info = root->fs_info;
 	test_msg("Qgroup multiple refs test\n");
-	/* We have 5 created already from the previous test */
+	/*
-	ret = btrfs_create_qgroup(NULL, fs_info, 256);
+	 * We have BTRFS_FS_TREE_OBJECTID created already from the
+	 * previous test.
+	 */
+	ret = btrfs_create_qgroup(NULL, fs_info, BTRFS_FIRST_FREE_OBJECTID);
 	if (ret) {
 		test_msg("Couldn't create a qgroup %d\n", ret);
 		return ret;
 	}
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &old_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &old_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		test_msg("Couldn't find old roots: %d\n", ret);
 		return ret;
 	}
-	ret = insert_normal_tree_ref(root, 4096, 4096, 0, 5);
+	ret = insert_normal_tree_ref(root, nodesize, nodesize, 0,
+				BTRFS_FS_TREE_OBJECTID);
 	if (ret)
 		return ret;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &new_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &new_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		ulist_free(new_roots);
 		return ret;
 	}
-	ret = btrfs_qgroup_account_extent(&trans, fs_info, 4096, 4096,
+	ret = btrfs_qgroup_account_extent(&trans, fs_info, nodesize,
-					  old_roots, new_roots);
+					  nodesize, old_roots, new_roots);
 	if (ret) {
 		test_msg("Couldn't account space for a qgroup %d\n", ret);
 		return ret;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 5, 4096, 4096)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FS_TREE_OBJECTID,
+				       nodesize, nodesize)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &old_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &old_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		test_msg("Couldn't find old roots: %d\n", ret);
 		return ret;
 	}
-	ret = add_tree_ref(root, 4096, 4096, 0, 256);
+	ret = add_tree_ref(root, nodesize, nodesize, 0,
+			BTRFS_FIRST_FREE_OBJECTID);
 	if (ret)
 		return ret;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &new_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &new_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		ulist_free(new_roots);
 		return ret;
 	}
-	ret = btrfs_qgroup_account_extent(&trans, fs_info, 4096, 4096,
+	ret = btrfs_qgroup_account_extent(&trans, fs_info, nodesize,
-					  old_roots, new_roots);
+					  nodesize, old_roots, new_roots);
 	if (ret) {
 		test_msg("Couldn't account space for a qgroup %d\n", ret);
 		return ret;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 5, 4096, 0)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FS_TREE_OBJECTID,
+					nodesize, 0)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 256, 4096, 0)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FIRST_FREE_OBJECTID,
+					nodesize, 0)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &old_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &old_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		test_msg("Couldn't find old roots: %d\n", ret);
 		return ret;
 	}
-	ret = remove_extent_ref(root, 4096, 4096, 0, 256);
+	ret = remove_extent_ref(root, nodesize, nodesize, 0,
+				BTRFS_FIRST_FREE_OBJECTID);
 	if (ret)
 		return ret;
-	ret = btrfs_find_all_roots(&trans, fs_info, 4096, 0, &new_roots);
+	ret = btrfs_find_all_roots(&trans, fs_info, nodesize, 0, &new_roots);
 	if (ret) {
 		ulist_free(old_roots);
 		ulist_free(new_roots);
 		return ret;
 	}
-	ret = btrfs_qgroup_account_extent(&trans, fs_info, 4096, 4096,
+	ret = btrfs_qgroup_account_extent(&trans, fs_info, nodesize,
-					  old_roots, new_roots);
+					  nodesize, old_roots, new_roots);
 	if (ret) {
 		test_msg("Couldn't account space for a qgroup %d\n", ret);
 		return ret;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 256, 0, 0)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FIRST_FREE_OBJECTID,
+					0, 0)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
-	if (btrfs_verify_qgroup_counts(fs_info, 5, 4096, 4096)) {
+	if (btrfs_verify_qgroup_counts(fs_info, BTRFS_FS_TREE_OBJECTID,
+					nodesize, nodesize)) {
 		test_msg("Qgroup counts didn't match expected values\n");
 		return -EINVAL;
 	}
 	return 0;
 }
-int btrfs_test_qgroups(void)
+int btrfs_test_qgroups(u32 sectorsize, u32 nodesize)
 {
 	struct btrfs_root *root;
 	struct btrfs_root *tmp_root;
 	int ret = 0;
-	root = btrfs_alloc_dummy_root();
+	root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(root)) {
 		test_msg("Couldn't allocate root\n");
 		return PTR_ERR(root);
 	 * Can't use bytenr 0, some things freak out
 	 * *cough*backref walking code*cough*
 	 */
-	root->node = alloc_test_extent_buffer(root->fs_info, 4096);
+	root->node = alloc_test_extent_buffer(root->fs_info, nodesize,
+					nodesize);
 	if (!root->node) {
 		test_msg("Couldn't allocate dummy buffer\n");
 		ret = -ENOMEM;
 	}
 	btrfs_set_header_level(root->node, 0);
 	btrfs_set_header_nritems(root->node, 0);
-	root->alloc_bytenr += 8192;
+	root->alloc_bytenr += 2 * nodesize;
-	tmp_root = btrfs_alloc_dummy_root();
+	tmp_root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(tmp_root)) {
 		test_msg("Couldn't allocate a fs root\n");
 		ret = PTR_ERR(tmp_root);
 		goto out;
 	}
-	tmp_root->root_key.objectid = 5;
+	tmp_root->root_key.objectid = BTRFS_FS_TREE_OBJECTID;
 	root->fs_info->fs_root = tmp_root;
 	ret = btrfs_insert_fs_root(root->fs_info, tmp_root);
 	if (ret) {
 		goto out;
 	}
-	tmp_root = btrfs_alloc_dummy_root();
+	tmp_root = btrfs_alloc_dummy_root(sectorsize, nodesize);
 	if (IS_ERR(tmp_root)) {
 		test_msg("Couldn't allocate a fs root\n");
 		ret = PTR_ERR(tmp_root);
 		goto out;
 	}
-	tmp_root->root_key.objectid = 256;
+	tmp_root->root_key.objectid = BTRFS_FIRST_FREE_OBJECTID;
 	ret = btrfs_insert_fs_root(root->fs_info, tmp_root);
 	if (ret) {
 		test_msg("Couldn't insert fs root %d\n", ret);
 	}
 	test_msg("Running qgroup tests\n");
-	ret = test_no_shared_qgroup(root);
+	ret = test_no_shared_qgroup(root, sectorsize, nodesize);
 	if (ret)
 		goto out;
-	ret = test_multiple_refs(root);
+	ret = test_multiple_refs(root, sectorsize, nodesize);
 out:
 	btrfs_free_dummy_root(root);
 	return ret;

fs/btrfs/transaction.c+1−6

 	return ret;
 }
-/* Bisesctability fixup, remove in 4.8 */
-#ifndef btrfs_std_error
-#define btrfs_std_error btrfs_handle_fs_error
-#endif
 /*
  * Do all special snapshot related qgroup dirty hack.
  *
 	switch_commit_roots(trans->transaction, fs_info);
 	ret = btrfs_write_and_wait_transaction(trans, src);
 	if (ret)
-		btrfs_std_error(fs_info, ret,
+		btrfs_handle_fs_error(fs_info, ret,
 			"Error while writing out transaction for qgroup");
 out:

fs/btrfs/transaction.h+1−1

 	u64 chunk_bytes_reserved;
 	unsigned long use_count;
 	unsigned long blocks_reserved;
-	unsigned long blocks_used;
 	unsigned long delayed_ref_updates;
 	struct btrfs_transaction *transaction;
 	struct btrfs_block_rsv *block_rsv;
 	bool can_flush_pending_bgs;
 	bool reloc_reserved;
 	bool sync;
+	bool dirty;
 	unsigned int type;
 	/*
 	 * this root is only needed to validate that the root passed to

fs/btrfs/tree-log.c+2−2

@@ -2422,8 +2422,8 @@ static noinline int walk_down_log_tree(struct btrfs_trans_handle *trans, · 2421 unmodified lines
2422	root_owner = btrfs_header_owner(parent);	2422	root_owner = btrfs_header_owner(parent);
2423		2423
2424	next = btrfs_find_create_tree_block(root, bytenr);	2424	next = btrfs_find_create_tree_block(root, bytenr);
2425	if (!next)	2425	if (IS_ERR(next))
2426	return -ENOMEM;	2426	return PTR_ERR(next);
2427		2427
2428	if (*level == 1) {	2428	if (*level == 1) {
2429	ret = wc->process_func(root, next, wc, ptr_gen);	2429	ret = wc->process_func(root, next, wc, ptr_gen);

fs/btrfs/volumes.c+96−17

 	if (IS_ERR(uuid_root)) {
 		ret = PTR_ERR(uuid_root);
 		btrfs_abort_transaction(trans, tree_root, ret);
+		btrfs_end_transaction(trans, tree_root);
 		return ret;
 	}
 	return dev;
 }
-static int read_one_chunk(struct btrfs_root *root, struct btrfs_key *key,
+/* Return -EIO if any error, otherwise return 0. */
-			  struct extent_buffer *leaf,
+static int btrfs_check_chunk_valid(struct btrfs_root *root,
-			  struct btrfs_chunk *chunk)
+				   struct extent_buffer *leaf,
+				   struct btrfs_chunk *chunk, u64 logical)
 {
-	struct btrfs_mapping_tree *map_tree = &root->fs_info->mapping_tree;
-	struct map_lookup *map;
-	struct extent_map *em;
-	u64 logical;
 	u64 length;
 	u64 stripe_len;
-	u64 devid;
+	u16 num_stripes;
-	u8 uuid[BTRFS_UUID_SIZE];
+	u16 sub_stripes;
-	int num_stripes;
+	u64 type;
-	int ret;
-	int i;
-	logical = key->offset;
 	length = btrfs_chunk_length(leaf, chunk);
 	stripe_len = btrfs_chunk_stripe_len(leaf, chunk);
 	num_stripes = btrfs_chunk_num_stripes(leaf, chunk);
-	/* Validation check */
+	sub_stripes = btrfs_chunk_sub_stripes(leaf, chunk);
+	type = btrfs_chunk_type(leaf, chunk);
 	if (!num_stripes) {
 		btrfs_err(root->fs_info, "invalid chunk num_stripes: %u",
 			  num_stripes);
 			  "invalid chunk logical %llu", logical);
 		return -EIO;
 	}
+	if (btrfs_chunk_sector_size(leaf, chunk) != root->sectorsize) {
+		btrfs_err(root->fs_info, "invalid chunk sectorsize %u",
+			  btrfs_chunk_sector_size(leaf, chunk));
+		return -EIO;
+	}
 	if (!length || !IS_ALIGNED(length, root->sectorsize)) {
 		btrfs_err(root->fs_info,
 			"invalid chunk length %llu", length);
 		return -EIO;
 	}
 	if (~(BTRFS_BLOCK_GROUP_TYPE_MASK | BTRFS_BLOCK_GROUP_PROFILE_MASK) &
-	    btrfs_chunk_type(leaf, chunk)) {
+	    type) {
 		btrfs_err(root->fs_info, "unrecognized chunk type: %llu",
 			  ~(BTRFS_BLOCK_GROUP_TYPE_MASK |
 			    BTRFS_BLOCK_GROUP_PROFILE_MASK) &
 			  btrfs_chunk_type(leaf, chunk));
 		return -EIO;
 	}
+	if ((type & BTRFS_BLOCK_GROUP_RAID10 && sub_stripes != 2) ||
+	    (type & BTRFS_BLOCK_GROUP_RAID1 && num_stripes < 1) ||
+	    (type & BTRFS_BLOCK_GROUP_RAID5 && num_stripes < 2) ||
+	    (type & BTRFS_BLOCK_GROUP_RAID6 && num_stripes < 3) ||
+	    (type & BTRFS_BLOCK_GROUP_DUP && num_stripes > 2) ||
+	    ((type & BTRFS_BLOCK_GROUP_PROFILE_MASK) == 0 &&
+	     num_stripes != 1)) {
+		btrfs_err(root->fs_info,
+			"invalid num_stripes:sub_stripes %u:%u for profile %llu",
+			num_stripes, sub_stripes,
+			type & BTRFS_BLOCK_GROUP_PROFILE_MASK);
+		return -EIO;
+	}
+	return 0;
+}
+static int read_one_chunk(struct btrfs_root *root, struct btrfs_key *key,
+			  struct extent_buffer *leaf,
+			  struct btrfs_chunk *chunk)
+{
+	struct btrfs_mapping_tree *map_tree = &root->fs_info->mapping_tree;
+	struct map_lookup *map;
+	struct extent_map *em;
+	u64 logical;
+	u64 length;
+	u64 stripe_len;
+	u64 devid;
+	u8 uuid[BTRFS_UUID_SIZE];
+	int num_stripes;
+	int ret;
+	int i;
+	logical = key->offset;
+	length = btrfs_chunk_length(leaf, chunk);
+	stripe_len = btrfs_chunk_stripe_len(leaf, chunk);
+	num_stripes = btrfs_chunk_num_stripes(leaf, chunk);
+	ret = btrfs_check_chunk_valid(root, leaf, chunk, logical);
+	if (ret)
+		return ret;
 	read_lock(&map_tree->map_tree.lock);
 	em = lookup_extent_mapping(&map_tree->map_tree, logical, 1);
 	u32 array_size;
 	u32 len = 0;
 	u32 cur_offset;
+	u64 type;
 	struct btrfs_key key;
 	ASSERT(BTRFS_SUPER_INFO_SIZE <= root->nodesize);
 	 * overallocate but we can keep it as-is, only the first page is used.
 	 */
 	sb = btrfs_find_create_tree_block(root, BTRFS_SUPER_INFO_OFFSET);
-	if (!sb)
+	if (IS_ERR(sb))
-		return -ENOMEM;
+		return PTR_ERR(sb);
 	set_extent_buffer_uptodate(sb);
 	btrfs_set_buffer_lockdep_class(root->root_key.objectid, sb, 0);
 	/*
 				break;
 			}
+			type = btrfs_chunk_type(sb, chunk);
+			if ((type & BTRFS_BLOCK_GROUP_SYSTEM) == 0) {
+				btrfs_err(root->fs_info,
+			    "invalid chunk type %llu in sys_array at offset %u",
+					type, cur_offset);
+				ret = -EIO;
+				break;
+			}
 			len = btrfs_chunk_item_size(num_stripes);
 			if (cur_offset + len > array_size)
 				goto out_short_read;
 		sb_array_offset += len;
 		cur_offset += len;
 	}
+	clear_extent_buffer_uptodate(sb);
 	free_extent_buffer_stale(sb);
 	return ret;
 out_short_read:
 	printk(KERN_ERR "BTRFS: sys_array too short to read %u bytes at offset %u\n",
 			len, cur_offset);
+	clear_extent_buffer_uptodate(sb);
 	free_extent_buffer_stale(sb);
 	return -EIO;
 }
 	struct btrfs_key found_key;
 	int ret;
 	int slot;
+	u64 total_dev = 0;
 	root = root->fs_info->chunk_root;
 			ret = read_one_dev(root, leaf, dev_item);
 			if (ret)
 				goto error;
+			total_dev++;
 		} else if (found_key.type == BTRFS_CHUNK_ITEM_KEY) {
 			struct btrfs_chunk *chunk;
 			chunk = btrfs_item_ptr(leaf, slot, struct btrfs_chunk);
 		}
 		path->slots[0]++;
 	}
+	/*
+	 * After loading chunk tree, we've got all device information,
+	 * do another round of validation checks.
+	 */
+	if (total_dev != root->fs_info->fs_devices->total_devices) {
+		btrfs_err(root->fs_info,
+	   "super_num_devices %llu mismatch with num_devices %llu found here",
+			  btrfs_super_num_devices(root->fs_info->super_copy),
+			  total_dev);
+		ret = -EINVAL;
+		goto error;
+	}
+	if (btrfs_super_total_bytes(root->fs_info->super_copy) <
+	    root->fs_info->fs_devices->total_rw_bytes) {
+		btrfs_err(root->fs_info,
+	"super_total_bytes %llu mismatch with fs_devices total_rw_bytes %llu",
+			  btrfs_super_total_bytes(root->fs_info->super_copy),
+			  root->fs_info->fs_devices->total_rw_bytes);
+		ret = -EINVAL;
+		goto error;
+	}
 	ret = 0;
 error:
 	unlock_chunks(root);

fs/coredump.c+3−1

 			return 0;
 		file->f_pos = pos;
 		cprm->written += n;
+		cprm->pos += n;
 		nr -= n;
 	}
 	return 1;
 		if (dump_interrupted() ||
 		    file->f_op->llseek(file, nr, SEEK_CUR) < 0)
 			return 0;
+		cprm->pos += nr;
 		return 1;
 	} else {
 		while (nr > PAGE_SIZE) {
 int dump_align(struct coredump_params *cprm, int align)
 {
-	unsigned mod = cprm->file->f_pos & (align - 1);
+	unsigned mod = cprm->pos & (align - 1);
 	if (align & (align - 1))
 		return 0;
 	return mod ? dump_skip(cprm, align - mod) : 1;

fs/dcache.c+2−2

@@ -1636,7 +1636,7 @@ struct dentry d_alloc(struct dentry parent, const struct qstr *name) · 1635 unmodified lines
1636	struct dentry *dentry = __d_alloc(parent->d_sb, name);	1636	struct dentry *dentry = __d_alloc(parent->d_sb, name);
1637	if (!dentry)	1637	if (!dentry)
1638	return NULL;	1638	return NULL;
1639		1639	dentry->d_flags \|= DCACHE_RCUACCESS;
1640	spin_lock(&parent->d_lock);	1640	spin_lock(&parent->d_lock);
1641	/*	1641	/*
1642	* don't need child lock because it is not subject	1642	* don't need child lock because it is not subject
@@ -2358,7 +2358,6 @@ static void __d_rehash(struct dentry * entry, struct hlist_bl_head *b) · 715 unmodified lines
2358	{	2358	{
2359	BUG_ON(!d_unhashed(entry));	2359	BUG_ON(!d_unhashed(entry));
2360	hlist_bl_lock(b);	2360	hlist_bl_lock(b);
2361	entry->d_flags \|= DCACHE_RCUACCESS;
2362	hlist_bl_add_head_rcu(&entry->d_hash, b);	2361	hlist_bl_add_head_rcu(&entry->d_hash, b);
2363	hlist_bl_unlock(b);	2362	hlist_bl_unlock(b);
2364	}	2363	}
@@ -2843,6 +2842,7 @@ static void __d_move(struct dentry dentry, struct dentry target, · 478 unmodified lines
2843	/* ... and switch them in the tree */	2842	/* ... and switch them in the tree */
2844	if (IS_ROOT(dentry)) {	2843	if (IS_ROOT(dentry)) {
2845	/* splicing a tree */	2844	/* splicing a tree */
		2845	dentry->d_flags \|= DCACHE_RCUACCESS;
2846	dentry->d_parent = target->d_parent;	2846	dentry->d_parent = target->d_parent;
2847	target->d_parent = target;	2847	target->d_parent = target;
2848	list_del_init(&target->d_child);	2848	list_del_init(&target->d_child);

fs/debugfs/file.c+4−3

@@ -127,7 +127,6 @@ static int open_proxy_open(struct inode inode, struct file filp) · 126 unmodified lines
127	r = real_fops->open(inode, filp);	127	r = real_fops->open(inode, filp);
128		128
129	out:	129	out:
130	fops_put(real_fops);
131	debugfs_use_file_finish(srcu_idx);	130	debugfs_use_file_finish(srcu_idx);
132	return r;	131	return r;
133	}	132	}
@@ -262,8 +261,10 @@ static int full_proxy_open(struct inode inode, struct file filp) · 128 unmodified lines
262		261
263	if (real_fops->open) {	262	if (real_fops->open) {
264	r = real_fops->open(inode, filp);	263	r = real_fops->open(inode, filp);
265		264	if (r) {
266	if (filp->f_op != proxy_fops) {	265	replace_fops(filp, d_inode(dentry)->i_fop);
		266	goto free_proxy;
		267	} else if (filp->f_op != proxy_fops) {
267	/* No protection against file removal anymore. */	268	/* No protection against file removal anymore. */
268	WARN(1, "debugfs file owner replaced proxy fops: %pd",	269	WARN(1, "debugfs file owner replaced proxy fops: %pd",
269	dentry);	270	dentry);

fs/ecryptfs/kthread.c+11−2

 #include <linux/slab.h>
 #include <linux/wait.h>
 #include <linux/mount.h>
+#include <linux/file.h>
 #include "ecryptfs_kernel.h"
 struct ecryptfs_open_req {
 	flags |= IS_RDONLY(d_inode(lower_dentry)) ? O_RDONLY : O_RDWR;
 	(*lower_file) = dentry_open(&req.path, flags, cred);
 	if (!IS_ERR(*lower_file))
-		goto out;
+		goto have_file;
 	if ((flags & O_ACCMODE) == O_RDONLY) {
 		rc = PTR_ERR((*lower_file));
 		goto out;
 	mutex_unlock(&ecryptfs_kthread_ctl.mux);
 	wake_up(&ecryptfs_kthread_ctl.wait);
 	wait_for_completion(&req.done);
-	if (IS_ERR(*lower_file))
+	if (IS_ERR(*lower_file)) {
 		rc = PTR_ERR(*lower_file);
+		goto out;
+	}
+have_file:
+	if ((*lower_file)->f_op->mmap == NULL) {
+		fput(*lower_file);
+		*lower_file = NULL;
+		rc = -EMEDIUMTYPE;
+	}
 out:
 	return rc;
 }

fs/namei.c+15−46

 			}
 			if (*opened & FILE_CREATED)
 				fsnotify_create(dir, dentry);
-			path->dentry = dentry;
+			if (unlikely(d_is_negative(dentry))) {
-			path->mnt = nd->path.mnt;
+				error = -ENOENT;
-			return 1;
+			} else {
+				path->dentry = dentry;
+				path->mnt = nd->path.mnt;
+				return 1;
+			}
 		}
 	}
 	dput(dentry);
 	int acc_mode = op->acc_mode;
 	unsigned seq;
 	struct inode *inode;
-	struct path save_parent = { .dentry = NULL, .mnt = NULL };
 	struct path path;
-	bool retried = false;
 	int error;
 	nd->flags &= ~LOOKUP_PARENT;
 			return -EISDIR;
 	}
-retry_lookup:
 	if (open_flag & (O_CREAT | O_TRUNC | O_WRONLY | O_RDWR)) {
 		error = mnt_want_write(nd->path.mnt);
 		if (!error)
 		got_write = false;
 	}
+	error = follow_managed(&path, nd);
+	if (unlikely(error < 0))
+		return error;
 	if (unlikely(d_is_negative(path.dentry))) {
 		path_to_nameidata(&path, nd);
 		return -ENOENT;
 		return -EEXIST;
 	}
-	error = follow_managed(&path, nd);
-	if (unlikely(error < 0))
-		return error;
 	seq = 0;	/* out of RCU mode, so the value doesn't matter */
 	inode = d_backing_inode(path.dentry);
 finish_lookup:
 	if (unlikely(error))
 		return error;
-	if ((nd->flags & LOOKUP_RCU) || nd->path.mnt != path.mnt) {
+	path_to_nameidata(&path, nd);
-		path_to_nameidata(&path, nd);
-	} else {
-		save_parent.dentry = nd->path.dentry;
-		save_parent.mnt = mntget(path.mnt);
-		nd->path.dentry = path.dentry;
-	}
 	nd->inode = inode;
 	nd->seq = seq;
 	/* Why this, you ask?  _Now_ we might have grown LOOKUP_JUMPED... */
 finish_open:
 	error = complete_walk(nd);
-	if (error) {
+	if (error)
-		path_put(&save_parent);
 		return error;
-	}
 	audit_inode(nd->name, nd->path.dentry, 0);
 	error = -EISDIR;
 	if ((open_flag & O_CREAT) && d_is_dir(nd->path.dentry))
 		goto out;
 	BUG_ON(*opened & FILE_OPENED); /* once it's opened, it's opened */
 	error = vfs_open(&nd->path, file, current_cred());
-	if (!error) {
+	if (error)
-		*opened |= FILE_OPENED;
-	} else {
-		if (error == -EOPENSTALE)
-			goto stale_open;
 		goto out;
-	}
+	*opened |= FILE_OPENED;
 opened:
 	error = open_check_o_direct(file);
 	if (!error)
 	}
 	if (got_write)
 		mnt_drop_write(nd->path.mnt);
-	path_put(&save_parent);
 	return error;
-stale_open:
-	/* If no saved parent or already retried then can't retry */
-	if (!save_parent.dentry || retried)
-		goto out;
-	BUG_ON(save_parent.dentry != dir);
-	path_put(&nd->path);
-	nd->path = save_parent;
-	nd->inode = dir->d_inode;
-	save_parent.mnt = NULL;
-	save_parent.dentry = NULL;
-	if (got_write) {
-		mnt_drop_write(nd->path.mnt);
-		got_write = false;
-	}
-	retried = true;
-	goto retry_lookup;
 }
 static int do_tmpfile(struct nameidata *nd, unsigned flags,

fs/namespace.c+4−2

 			mnt_flags |= MNT_NODEV | MNT_LOCK_NODEV;
 		}
 		if (type->fs_flags & FS_USERNS_VISIBLE) {
-			if (!fs_fully_visible(type, &mnt_flags))
+			if (!fs_fully_visible(type, &mnt_flags)) {
+				put_filesystem(type);
 				return -EPERM;
+			}
 		}
 	}
 		list_for_each_entry(child, &mnt->mnt_mounts, mnt_child) {
 			struct inode *inode = child->mnt_mountpoint->d_inode;
 			/* Only worry about locked mounts */
-			if (!(mnt_flags & MNT_LOCKED))
+			if (!(child->mnt.mnt_flags & MNT_LOCKED))
 				continue;
 			/* Is the directory permanetly empty? */
 			if (!is_empty_dir_inode(inode))

fs/nfsd/blocklayout.c+1−1

@@ -290,7 +290,7 @@ out_free_buf: · 289 unmodified lines
290	return error;	290	return error;
291	}	291	}
292		292
293	#define NFSD_MDS_PR_KEY 0x0100000000000000	293	#define NFSD_MDS_PR_KEY 0x0100000000000000ULL
294		294
295	/*	295	/*
296	* We use the client ID as a unique key for the reservations.	296	* We use the client ID as a unique key for the reservations.

fs/nfsd/nfs4callback.c+1−17

@@ -710,22 +710,6 @@ static struct rpc_cred get_backchannel_cred(struct nfs4_client clp, struct rpc · 709 unmodified lines
710	}	710	}
711	}	711	}
712		712
713	static struct rpc_clnt create_backchannel_client(struct rpc_create_args args)
714	{
715	struct rpc_xprt *xprt;
716
717	if (args->protocol != XPRT_TRANSPORT_BC_TCP)
718	return rpc_create(args);
719
720	xprt = args->bc_xprt->xpt_bc_xprt;
721	if (xprt) {
722	xprt_get(xprt);
723	return rpc_create_xprt(args, xprt);
724	}
725
726	return rpc_create(args);
727	}
728
729	static int setup_callback_client(struct nfs4_client clp, struct nfs4_cb_conn conn, struct nfsd4_session *ses)	713	static int setup_callback_client(struct nfs4_client clp, struct nfs4_cb_conn conn, struct nfsd4_session *ses)
730	{	714	{
731	int maxtime = max_cb_time(clp->net);	715	int maxtime = max_cb_time(clp->net);
@@ -768,7 +752,7 @@ static int setup_callback_client(struct nfs4_client clp, struct nfs4_cb_conn c · 36 unmodified lines
768	args.authflavor = ses->se_cb_sec.flavor;	752	args.authflavor = ses->se_cb_sec.flavor;
769	}	753	}
770	/* Create RPC client */	754	/* Create RPC client */
771	client = create_backchannel_client(&args);	755	client = rpc_create(&args);
772	if (IS_ERR(client)) {	756	if (IS_ERR(client)) {
773	dprintk("NFSD: couldn't create callback client: %ld\n",	757	dprintk("NFSD: couldn't create callback client: %ld\n",
774	PTR_ERR(client));	758	PTR_ERR(client));

fs/nfsd/nfs4state.c+37−30

 }
 static struct nfs4_ol_stateid *
-init_open_stateid(struct nfs4_ol_stateid *stp, struct nfs4_file *fp,
+init_open_stateid(struct nfs4_file *fp, struct nfsd4_open *open)
-		struct nfsd4_open *open)
 {
 	struct nfs4_openowner *oo = open->op_openowner;
 	struct nfs4_ol_stateid *retstp = NULL;
+	struct nfs4_ol_stateid *stp;
+	stp = open->op_stp;
+	/* We are moving these outside of the spinlocks to avoid the warnings */
+	mutex_init(&stp->st_mutex);
+	mutex_lock(&stp->st_mutex);
 	spin_lock(&oo->oo_owner.so_client->cl_lock);
 	spin_lock(&fp->fi_lock);
 	retstp = nfsd4_find_existing_open(fp, open);
 	if (retstp)
 		goto out_unlock;
+	open->op_stp = NULL;
 	atomic_inc(&stp->st_stid.sc_count);
 	stp->st_stid.sc_type = NFS4_OPEN_STID;
 	INIT_LIST_HEAD(&stp->st_locks);
 	stp->st_access_bmap = 0;
 	stp->st_deny_bmap = 0;
 	stp->st_openstp = NULL;
-	init_rwsem(&stp->st_rwsem);
 	list_add(&stp->st_perstateowner, &oo->oo_owner.so_stateids);
 	list_add(&stp->st_perfile, &fp->fi_stateids);
 out_unlock:
 	spin_unlock(&fp->fi_lock);
 	spin_unlock(&oo->oo_owner.so_client->cl_lock);
-	return retstp;
+	if (retstp) {
+		mutex_lock(&retstp->st_mutex);
+		/* To keep mutex tracking happy */
+		mutex_unlock(&stp->st_mutex);
+		stp = retstp;
+	}
+	return stp;
 }
 /*
 	struct nfs4_client *cl = open->op_openowner->oo_owner.so_client;
 	struct nfs4_file *fp = NULL;
 	struct nfs4_ol_stateid *stp = NULL;
-	struct nfs4_ol_stateid *swapstp = NULL;
 	struct nfs4_delegation *dp = NULL;
 	__be32 status;
 	 */
 	if (stp) {
 		/* Stateid was found, this is an OPEN upgrade */
-		down_read(&stp->st_rwsem);
+		mutex_lock(&stp->st_mutex);
 		status = nfs4_upgrade_open(rqstp, fp, current_fh, stp, open);
 		if (status) {
-			up_read(&stp->st_rwsem);
+			mutex_unlock(&stp->st_mutex);
 			goto out;
 		}
 	} else {
-		stp = open->op_stp;
+		/* stp is returned locked. */
-		open->op_stp = NULL;
+		stp = init_open_stateid(fp, open);
-		swapstp = init_open_stateid(stp, fp, open);
+		/* See if we lost the race to some other thread */
-		if (swapstp) {
+		if (stp->st_access_bmap != 0) {
-			nfs4_put_stid(&stp->st_stid);
-			stp = swapstp;
-			down_read(&stp->st_rwsem);
 			status = nfs4_upgrade_open(rqstp, fp, current_fh,
 						stp, open);
 			if (status) {
-				up_read(&stp->st_rwsem);
+				mutex_unlock(&stp->st_mutex);
 				goto out;
 			}
 			goto upgrade_out;
 		}
-		down_read(&stp->st_rwsem);
 		status = nfs4_get_vfs_file(rqstp, fp, current_fh, stp, open);
 		if (status) {
-			up_read(&stp->st_rwsem);
+			mutex_unlock(&stp->st_mutex);
 			release_open_stateid(stp);
 			goto out;
 		}
 	}
 upgrade_out:
 	nfs4_inc_and_copy_stateid(&open->op_stateid, &stp->st_stid);
-	up_read(&stp->st_rwsem);
+	mutex_unlock(&stp->st_mutex);
 	if (nfsd4_has_session(&resp->cstate)) {
 		if (open->op_deleg_want & NFS4_SHARE_WANT_NO_DELEG) {
 		 * revoked delegations are kept only for free_stateid.
 		 */
 		return nfserr_bad_stateid;
-	down_write(&stp->st_rwsem);
+	mutex_lock(&stp->st_mutex);
 	status = check_stateid_generation(stateid, &stp->st_stid.sc_stateid, nfsd4_has_session(cstate));
 	if (status == nfs_ok)
 		status = nfs4_check_fh(current_fh, &stp->st_stid);
 	if (status != nfs_ok)
-		up_write(&stp->st_rwsem);
+		mutex_unlock(&stp->st_mutex);
 	return status;
 }
 		return status;
 	oo = openowner(stp->st_stateowner);
 	if (!(oo->oo_flags & NFS4_OO_CONFIRMED)) {
-		up_write(&stp->st_rwsem);
+		mutex_unlock(&stp->st_mutex);
 		nfs4_put_stid(&stp->st_stid);
 		return nfserr_bad_stateid;
 	}
 	oo = openowner(stp->st_stateowner);
 	status = nfserr_bad_stateid;
 	if (oo->oo_flags & NFS4_OO_CONFIRMED) {
-		up_write(&stp->st_rwsem);
+		mutex_unlock(&stp->st_mutex);
 		goto put_stateid;
 	}
 	oo->oo_flags |= NFS4_OO_CONFIRMED;
 	nfs4_inc_and_copy_stateid(&oc->oc_resp_stateid, &stp->st_stid);
-	up_write(&stp->st_rwsem);
+	mutex_unlock(&stp->st_mutex);
 	dprintk("NFSD: %s: success, seqid=%d stateid=" STATEID_FMT "\n",
 		__func__, oc->oc_seqid, STATEID_VAL(&stp->st_stid.sc_stateid));
 	nfs4_inc_and_copy_stateid(&od->od_stateid, &stp->st_stid);
 	status = nfs_ok;
 put_stateid:
-	up_write(&stp->st_rwsem);
+	mutex_unlock(&stp->st_mutex);
 	nfs4_put_stid(&stp->st_stid);
 out:
 	nfsd4_bump_seqid(cstate, status);
 	if (status)
 		goto out;
 	nfs4_inc_and_copy_stateid(&close->cl_stateid, &stp->st_stid);
-	up_write(&stp->st_rwsem);
+	mutex_unlock(&stp->st_mutex);
 	nfsd4_close_open_stateid(stp);
 	stp->st_access_bmap = 0;
 	stp->st_deny_bmap = open_stp->st_deny_bmap;
 	stp->st_openstp = open_stp;
-	init_rwsem(&stp->st_rwsem);
+	mutex_init(&stp->st_mutex);
 	list_add(&stp->st_locks, &open_stp->st_locks);
 	list_add(&stp->st_perstateowner, &lo->lo_owner.so_stateids);
 	spin_lock(&fp->fi_lock);
 					&open_stp, nn);
 		if (status)
 			goto out;
-		up_write(&open_stp->st_rwsem);
+		mutex_unlock(&open_stp->st_mutex);
 		open_sop = openowner(open_stp->st_stateowner);
 		status = nfserr_bad_stateid;
 		if (!same_clid(&open_sop->oo_owner.so_client->cl_clientid,
 		status = lookup_or_create_lock_state(cstate, open_stp, lock,
 							&lock_stp, &new);
 		if (status == nfs_ok)
-			down_write(&lock_stp->st_rwsem);
+			mutex_lock(&lock_stp->st_mutex);
 	} else {
 		status = nfs4_preprocess_seqid_op(cstate,
 				       lock->lk_old_lock_seqid,
 		    seqid_mutating_err(ntohl(status)))
 			lock_sop->lo_owner.so_seqid++;
-		up_write(&lock_stp->st_rwsem);
+		mutex_unlock(&lock_stp->st_mutex);
 		/*
 		 * If this is a new, never-before-used stateid, and we are
 fput:
 	fput(filp);
 put_stateid:
-	up_write(&stp->st_rwsem);
+	mutex_unlock(&stp->st_mutex);
 	nfs4_put_stid(&stp->st_stid);
 out:
 	nfsd4_bump_seqid(cstate, status);

fs/nfsd/state.h+1−1

@@ -535,7 +535,7 @@ struct nfs4_ol_stateid { · 534 unmodified lines
535	unsigned char st_access_bmap;	535	unsigned char st_access_bmap;
536	unsigned char st_deny_bmap;	536	unsigned char st_deny_bmap;
537	struct nfs4_ol_stateid *st_openstp;	537	struct nfs4_ol_stateid *st_openstp;
538	struct rw_semaphore st_rwsem;	538	struct mutex st_mutex;
539	};	539	};
540		540
541	static inline struct nfs4_ol_stateid openlockstateid(struct nfs4_stid s)	541	static inline struct nfs4_ol_stateid openlockstateid(struct nfs4_stid s)

fs/overlayfs/dir.c+11−2

 		err = ovl_create_upper(dentry, inode, &stat, link, hardlink);
 	} else {
 		const struct cred *old_cred;
+		struct cred *override_cred;
 		old_cred = ovl_override_creds(dentry->d_sb);
-		err = ovl_create_over_whiteout(dentry, inode, &stat, link,
+		err = -ENOMEM;
-					       hardlink);
+		override_cred = prepare_creds();
+		if (override_cred) {
+			override_cred->fsuid = old_cred->fsuid;
+			override_cred->fsgid = old_cred->fsgid;
+			put_cred(override_creds(override_cred));
+			put_cred(override_cred);
+			err = ovl_create_over_whiteout(dentry, inode, &stat,
+						       link, hardlink);
+		}
 		revert_creds(old_cred);
 	}

fs/overlayfs/inode.c+6−20

 	return err;
 }
-static bool ovl_need_xattr_filter(struct dentry *dentry,
-				  enum ovl_path_type type)
-{
-	if ((type & (__OVL_PATH_PURE | __OVL_PATH_UPPER)) == __OVL_PATH_UPPER)
-		return S_ISDIR(dentry->d_inode->i_mode);
-	else
-		return false;
-}
 ssize_t ovl_getxattr(struct dentry *dentry, struct inode *inode,
 		     const char *name, void *value, size_t size)
 {
-	struct path realpath;
+	struct dentry *realdentry = ovl_dentry_real(dentry);
-	enum ovl_path_type type = ovl_path_real(dentry, &realpath);
-	if (ovl_need_xattr_filter(dentry, type) && ovl_is_private_xattr(name))
+	if (ovl_is_private_xattr(name))
 		return -ENODATA;
-	return vfs_getxattr(realpath.dentry, name, value, size);
+	return vfs_getxattr(realdentry, name, value, size);
 }
 ssize_t ovl_listxattr(struct dentry *dentry, char *list, size_t size)
 {
-	struct path realpath;
+	struct dentry *realdentry = ovl_dentry_real(dentry);
-	enum ovl_path_type type = ovl_path_real(dentry, &realpath);
 	ssize_t res;
 	int off;
-	res = vfs_listxattr(realpath.dentry, list, size);
+	res = vfs_listxattr(realdentry, list, size);
 	if (res <= 0 || size == 0)
 		return res;
-	if (!ovl_need_xattr_filter(dentry, type))
-		return res;
 	/* filter out private xattrs */
 	for (off = 0; off < res;) {
 		char *s = list + off;
 		goto out;
 	err = -ENODATA;
-	if (ovl_need_xattr_filter(dentry, type) && ovl_is_private_xattr(name))
+	if (ovl_is_private_xattr(name))
 		goto out_drop_write;
 	if (!OVL_TYPE_UPPER(type)) {

fs/proc/root.c+7−0

@@ -121,6 +121,13 @@ static struct dentry proc_mount(struct file_system_type fs_type, · 120 unmodified lines
121	if (IS_ERR(sb))	121	if (IS_ERR(sb))
122	return ERR_CAST(sb);	122	return ERR_CAST(sb);
123		123
		124	/*
		125	* procfs isn't actually a stacking filesystem; however, there is
		126	* too much magic going on inside it to permit stacking things on
		127	* top of it
		128	*/
		129	sb->s_stack_depth = FILESYSTEM_MAX_STACK_DEPTH;
		130
124	if (!proc_parse_options(options, ns)) {	131	if (!proc_parse_options(options, ns)) {
125	deactivate_locked_super(sb);	132	deactivate_locked_super(sb);
126	return ERR_PTR(-EINVAL);	133	return ERR_PTR(-EINVAL);

fs/reiserfs/super.c+7−2

 	unsigned long safe_mask = 0;
 	unsigned int commit_max_age = (unsigned int)-1;
 	struct reiserfs_journal *journal = SB_JOURNAL(s);
-	char *new_opts = kstrdup(arg, GFP_KERNEL);
+	char *new_opts;
 	int err;
 	char *qf_names[REISERFS_MAXQUOTAS];
 	unsigned int qfmt = 0;
 	int i;
 #endif
+	new_opts = kstrdup(arg, GFP_KERNEL);
+	if (arg && !new_opts)
+		return -ENOMEM;
 	sync_filesystem(s);
 	reiserfs_write_lock(s);
 	}
 out_ok_unlocked:
-	replace_mount_options(s, new_opts);
+	if (new_opts)
+		replace_mount_options(s, new_opts);
 	return 0;
 out_err_unlock:

fs/udf/partition.c+9−4

 		map = &UDF_SB(sb)->s_partmaps[partition];
 		/* map to sparable/physical partition desc */
 		phyblock = udf_get_pblock(sb, eloc.logicalBlockNum,
-			map->s_partition_num, ext_offset + offset);
+			map->s_type_specific.s_metadata.s_phys_partition_ref,
+			ext_offset + offset);
 	}
 	brelse(epos.bh);
 	mdata = &map->s_type_specific.s_metadata;
 	inode = mdata->s_metadata_fe ? : mdata->s_mirror_fe;
-	/* We shouldn't mount such media... */
+	if (!inode)
-	BUG_ON(!inode);
+		return 0xFFFFFFFF;
 	retblk = udf_try_read_meta(inode, block, partition, offset);
 	if (retblk == 0xFFFFFFFF && mdata->s_metadata_fe) {
 		udf_warn(sb, "error reading from METADATA, trying to read from MIRROR\n");
 		if (!(mdata->s_flags & MF_MIRROR_FE_LOADED)) {
 			mdata->s_mirror_fe = udf_find_metadata_inode_efe(sb,
-				mdata->s_mirror_file_loc, map->s_partition_num);
+				mdata->s_mirror_file_loc,
+				mdata->s_phys_partition_ref);
+			if (IS_ERR(mdata->s_mirror_fe))
+				mdata->s_mirror_fe = NULL;
 			mdata->s_flags |= MF_MIRROR_FE_LOADED;
 		}

fs/udf/super.c+12−10

 }
 struct inode *udf_find_metadata_inode_efe(struct super_block *sb,
-					u32 meta_file_loc, u32 partition_num)
+					u32 meta_file_loc, u32 partition_ref)
 {
 	struct kernel_lb_addr addr;
 	struct inode *metadata_fe;
 	addr.logicalBlockNum = meta_file_loc;
-	addr.partitionReferenceNum = partition_num;
+	addr.partitionReferenceNum = partition_ref;
 	metadata_fe = udf_iget_special(sb, &addr);
 	return metadata_fe;
 }
-static int udf_load_metadata_files(struct super_block *sb, int partition)
+static int udf_load_metadata_files(struct super_block *sb, int partition,
+				   int type1_index)
 {
 	struct udf_sb_info *sbi = UDF_SB(sb);
 	struct udf_part_map *map;
 	map = &sbi->s_partmaps[partition];
 	mdata = &map->s_type_specific.s_metadata;
+	mdata->s_phys_partition_ref = type1_index;
 	/* metadata address */
 	udf_debug("Metadata file location: block = %d part = %d\n",
-		  mdata->s_meta_file_loc, map->s_partition_num);
+		  mdata->s_meta_file_loc, mdata->s_phys_partition_ref);
 	fe = udf_find_metadata_inode_efe(sb, mdata->s_meta_file_loc,
-					 map->s_partition_num);
+					 mdata->s_phys_partition_ref);
 	if (IS_ERR(fe)) {
 		/* mirror file entry */
 		udf_debug("Mirror metadata file location: block = %d part = %d\n",
-			  mdata->s_mirror_file_loc, map->s_partition_num);
+			  mdata->s_mirror_file_loc, mdata->s_phys_partition_ref);
 		fe = udf_find_metadata_inode_efe(sb, mdata->s_mirror_file_loc,
-						 map->s_partition_num);
+						 mdata->s_phys_partition_ref);
 		if (IS_ERR(fe)) {
 			udf_err(sb, "Both metadata and mirror metadata inode efe can not found\n");
 	*/
 	if (mdata->s_bitmap_file_loc != 0xFFFFFFFF) {
 		addr.logicalBlockNum = mdata->s_bitmap_file_loc;
-		addr.partitionReferenceNum = map->s_partition_num;
+		addr.partitionReferenceNum = mdata->s_phys_partition_ref;
 		udf_debug("Bitmap file location: block = %d part = %d\n",
 			  addr.logicalBlockNum, addr.partitionReferenceNum);
 	p = (struct partitionDesc *)bh->b_data;
 	partitionNumber = le16_to_cpu(p->partitionNumber);
-	/* First scan for TYPE1, SPARABLE and METADATA partitions */
+	/* First scan for TYPE1 and SPARABLE partitions */
 	for (i = 0; i < sbi->s_partitions; i++) {
 		map = &sbi->s_partmaps[i];
 		udf_debug("Searching map: (%d == %d)\n",
 		goto out_bh;
 	if (map->s_partition_type == UDF_METADATA_MAP25) {
-		ret = udf_load_metadata_files(sb, i);
+		ret = udf_load_metadata_files(sb, i, type1_idx);
 		if (ret < 0) {
 			udf_err(sb, "error loading MetaData partition map %d\n",
 				i);

fs/udf/udf_sb.h+5−0

 	__u32	s_bitmap_file_loc;
 	__u32	s_alloc_unit_size;
 	__u16	s_align_unit_size;
+	/*
+	 * Partition Reference Number of the associated physical / sparable
+	 * partition
+	 */
+	__u16   s_phys_partition_ref;
 	int	s_flags;
 	struct inode *s_metadata_fe;
 	struct inode *s_mirror_fe;

include/asm-generic/qspinlock.h+17−36

 #include <asm-generic/qspinlock_types.h>
+/**
+ * queued_spin_unlock_wait - wait until the _current_ lock holder releases the lock
+ * @lock : Pointer to queued spinlock structure
+ *
+ * There is a very slight possibility of live-lock if the lockers keep coming
+ * and the waiter is just unfortunate enough to not see any unlock state.
+ */
+#ifndef queued_spin_unlock_wait
+extern void queued_spin_unlock_wait(struct qspinlock *lock);
+#endif
 /**
  * queued_spin_is_locked - is the spinlock locked?
  * @lock: Pointer to queued spinlock structure
  * Return: 1 if it is locked, 0 otherwise
  */
+#ifndef queued_spin_is_locked
 static __always_inline int queued_spin_is_locked(struct qspinlock *lock)
 {
 	/*
-	 * queued_spin_lock_slowpath() can ACQUIRE the lock before
+	 * See queued_spin_unlock_wait().
-	 * issuing the unordered store that sets _Q_LOCKED_VAL.
-	 *
-	 * See both smp_cond_acquire() sites for more detail.
-	 *
-	 * This however means that in code like:
-	 *
-	 *   spin_lock(A)		spin_lock(B)
-	 *   spin_unlock_wait(B)	spin_is_locked(A)
-	 *   do_something()		do_something()
-	 *
-	 * Both CPUs can end up running do_something() because the store
-	 * setting _Q_LOCKED_VAL will pass through the loads in
-	 * spin_unlock_wait() and/or spin_is_locked().
 	 *
-	 * Avoid this by issuing a full memory barrier between the spin_lock()
+	 * Any !0 state indicates it is locked, even if _Q_LOCKED_VAL
-	 * and the loads in spin_unlock_wait() and spin_is_locked().
+	 * isn't immediately observable.
-	 *
-	 * Note that regular mutual exclusion doesn't care about this
-	 * delayed store.
 	 */
-	smp_mb();
+	return atomic_read(&lock->val);
-	return atomic_read(&lock->val) & _Q_LOCKED_MASK;
 }
+#endif
 /**
  * queued_spin_value_unlocked - is the spinlock structure unlocked?
 }
 #endif
-/**
- * queued_spin_unlock_wait - wait until current lock holder releases the lock
- * @lock : Pointer to queued spinlock structure
- *
- * There is a very slight possibility of live-lock if the lockers keep coming
- * and the waiter is just unfortunate enough to not see any unlock state.
- */
-static inline void queued_spin_unlock_wait(struct qspinlock *lock)
-{
-	/* See queued_spin_is_locked() */
-	smp_mb();
-	while (atomic_read(&lock->val) & _Q_LOCKED_MASK)
-		cpu_relax();
-}
 #ifndef virt_spin_lock
 static __always_inline bool virt_spin_lock(struct qspinlock *lock)
 {

include/linux/binfmts.h+1−0

@@ -65,6 +65,7 @@ struct coredump_params { · 64 unmodified lines
65	unsigned long limit;	65	unsigned long limit;
66	unsigned long mm_flags;	66	unsigned long mm_flags;
67	loff_t written;	67	loff_t written;
		68	loff_t pos;
68	};	69	};
69		70
70	/*	71	/*

include/linux/clk-provider.h+1−1

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */	25	#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
26	#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */	26	#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
27	#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */	27	#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
28	#define CLK_IS_ROOT BIT(4) /* Deprecated: Don't use */	28	/* unused */
29	#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */	29	#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */
30	#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */	30	#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */
31	#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */	31	#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */

include/linux/cpuidle.h+3−0

 extern int cpuidle_play_dead(void);
 extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev);
+static inline struct cpuidle_device *cpuidle_get_device(void)
+{return __this_cpu_read(cpuidle_devices); }
 #else
 static inline void disable_cpuidle(void) { }
 static inline bool cpuidle_not_available(struct cpuidle_driver *drv,
 static inline int cpuidle_play_dead(void) {return -ENODEV; }
 static inline struct cpuidle_driver *cpuidle_get_cpu_driver(
 	struct cpuidle_device *dev) {return NULL; }
+static inline struct cpuidle_device *cpuidle_get_device(void) {return NULL; }
 #endif
 #if defined(CONFIG_CPU_IDLE) && defined(CONFIG_SUSPEND)

include/linux/dcache.h+12−0

@@ -575,5 +575,17 @@ static inline struct inode vfs_select_inode(struct dentry dentry, · 574 unmodified lines
575	return inode;	575	return inode;
576	}	576	}
577		577
		578	/**
		579	* d_real_inode - Return the real inode
		580	* @dentry: The dentry to query
		581	*
		582	* If dentry is on an union/overlay, then return the underlying, real inode.
		583	* Otherwise return d_inode().
		584	*/
		585	static inline struct inode d_real_inode(struct dentry dentry)
		586	{
		587	return d_backing_inode(d_real(dentry));
		588	}
		589
578		590
579	#endif /* __LINUX_DCACHE_H */	591	#endif /* __LINUX_DCACHE_H */

include/linux/efi.h+1−1

@@ -1005,7 +1005,7 @@ extern int efi_memattr_apply_permissions(struct mm_struct *mm, · 1004 unmodified lines
1005	/* Iterate through an efi_memory_map */	1005	/* Iterate through an efi_memory_map */
1006	#define for_each_efi_memory_desc_in_map(m, md) \	1006	#define for_each_efi_memory_desc_in_map(m, md) \
1007	for ((md) = (m)->map; \	1007	for ((md) = (m)->map; \
1008	(md) <= (efi_memory_desc_t *)((m)->map_end - (m)->desc_size); \	1008	((void *)(md) + (m)->desc_size) <= (m)->map_end; \
1009	(md) = (void *)(md) + (m)->desc_size)	1009	(md) = (void *)(md) + (m)->desc_size)
1010		1010
1011	/**	1011	/**

include/linux/iio/common/st_sensors.h+8−1

@@ -223,6 +223,8 @@ struct st_sensor_settings { · 222 unmodified lines
223	* @get_irq_data_ready: Function to get the IRQ used for data ready signal.	223	* @get_irq_data_ready: Function to get the IRQ used for data ready signal.
224	* @tf: Transfer function structure used by I/O operations.	224	* @tf: Transfer function structure used by I/O operations.
225	* @tb: Transfer buffers and mutex used by I/O operations.	225	* @tb: Transfer buffers and mutex used by I/O operations.
		226	* @hw_irq_trigger: if we're using the hardware interrupt on the sensor.
		227	* @hw_timestamp: Latest timestamp from the interrupt handler, when in use.
226	*/	228	*/
227	struct st_sensor_data {	229	struct st_sensor_data {
228	struct device *dev;	230	struct device *dev;
@@ -247,6 +249,9 @@ struct st_sensor_data { · 18 unmodified lines
247		249
248	const struct st_sensor_transfer_function *tf;	250	const struct st_sensor_transfer_function *tf;
249	struct st_sensor_transfer_buffer tb;	251	struct st_sensor_transfer_buffer tb;
		252
		253	bool hw_irq_trigger;
		254	s64 hw_timestamp;
250	};	255	};
251		256
252	#ifdef CONFIG_IIO_BUFFER	257	#ifdef CONFIG_IIO_BUFFER
@@ -258,7 +263,8 @@ int st_sensors_allocate_trigger(struct iio_dev *indio_dev, · 5 unmodified lines
258	const struct iio_trigger_ops *trigger_ops);	263	const struct iio_trigger_ops *trigger_ops);
259		264
260	void st_sensors_deallocate_trigger(struct iio_dev *indio_dev);	265	void st_sensors_deallocate_trigger(struct iio_dev *indio_dev);
261		266	int st_sensors_validate_device(struct iio_trigger *trig,
		267	struct iio_dev *indio_dev);
262	#else	268	#else
263	static inline int st_sensors_allocate_trigger(struct iio_dev *indio_dev,	269	static inline int st_sensors_allocate_trigger(struct iio_dev *indio_dev,
264	const struct iio_trigger_ops *trigger_ops)	270	const struct iio_trigger_ops *trigger_ops)
@@ -269,6 +275,7 @@ static inline void st_sensors_deallocate_trigger(struct iio_dev *indio_dev) · 4 unmodified lines
269	{	275	{
270	return;	276	return;
271	}	277	}
		278	#define st_sensors_validate_device NULL
272	#endif	279	#endif
273		280
274	int st_sensors_init_sensor(struct iio_dev *indio_dev,	281	int st_sensors_init_sensor(struct iio_dev *indio_dev,

include/linux/isa.h+3−2

 #define __LINUX_ISA_H
 #include <linux/device.h>
+#include <linux/errno.h>
 #include <linux/kernel.h>
 struct isa_driver {
 #define to_isa_driver(x) container_of((x), struct isa_driver, driver)
-#ifdef CONFIG_ISA
+#ifdef CONFIG_ISA_BUS_API
 int isa_register_driver(struct isa_driver *, unsigned int);
 void isa_unregister_driver(struct isa_driver *);
 #else
 static inline int isa_register_driver(struct isa_driver *d, unsigned int i)
 {
-	return 0;
+	return -ENODEV;
 }
 static inline void isa_unregister_driver(struct isa_driver *d)

include/linux/leds.h+12−11

@@ -42,15 +42,16 @@ struct led_classdev { · 41 unmodified lines
42	#define LED_UNREGISTERING (1 << 1)	42	#define LED_UNREGISTERING (1 << 1)
43	/* Upper 16 bits reflect control information */	43	/* Upper 16 bits reflect control information */
44	#define LED_CORE_SUSPENDRESUME (1 << 16)	44	#define LED_CORE_SUSPENDRESUME (1 << 16)
45	#define LED_BLINK_ONESHOT (1 << 17)	45	#define LED_BLINK_SW (1 << 17)
46	#define LED_BLINK_ONESHOT_STOP (1 << 18)	46	#define LED_BLINK_ONESHOT (1 << 18)
47	#define LED_BLINK_INVERT (1 << 19)	47	#define LED_BLINK_ONESHOT_STOP (1 << 19)
48	#define LED_BLINK_BRIGHTNESS_CHANGE (1 << 20)	48	#define LED_BLINK_INVERT (1 << 20)
49	#define LED_BLINK_DISABLE (1 << 21)	49	#define LED_BLINK_BRIGHTNESS_CHANGE (1 << 21)
50	#define LED_SYSFS_DISABLE (1 << 22)	50	#define LED_BLINK_DISABLE (1 << 22)
51	#define LED_DEV_CAP_FLASH (1 << 23)	51	#define LED_SYSFS_DISABLE (1 << 23)
52	#define LED_HW_PLUGGABLE (1 << 24)	52	#define LED_DEV_CAP_FLASH (1 << 24)
53	#define LED_PANIC_INDICATOR (1 << 25)	53	#define LED_HW_PLUGGABLE (1 << 25)
		54	#define LED_PANIC_INDICATOR (1 << 26)
54		55
55	/* Set LED brightness level	56	/* Set LED brightness level
56	* Must not sleep. Use brightness_set_blocking for drivers	57	* Must not sleep. Use brightness_set_blocking for drivers
@@ -72,8 +73,8 @@ struct led_classdev { · 15 unmodified lines
72	* and if both are zero then a sensible default should be chosen.	73	* and if both are zero then a sensible default should be chosen.
73	* The call should adjust the timings in that case and if it can't	74	* The call should adjust the timings in that case and if it can't
74	* match the values specified exactly.	75	* match the values specified exactly.
75	* Deactivate blinking again when the brightness is set to a fixed	76	* Deactivate blinking again when the brightness is set to LED_OFF
76	* value via the brightness_set() callback.	77	* via the brightness_set() callback.
77	*/	78	*/
78	int (blink_set)(struct led_classdev led_cdev,	79	int (blink_set)(struct led_classdev led_cdev,
79	unsigned long *delay_on,	80	unsigned long *delay_on,

include/linux/mlx5/device.h+6−2

 	u8                      rsvd[8];
 };
-#define MLX5_CMD_OP_MAX 0x920
 enum {
 	VPORT_STATE_DOWN		= 0x0,
 	VPORT_STATE_UP			= 0x1,
 #define MLX5_CAP_FLOWTABLE_MAX(mdev, cap) \
 	MLX5_GET(flow_table_nic_cap, mdev->hca_caps_max[MLX5_CAP_FLOW_TABLE], cap)
+#define MLX5_CAP_FLOWTABLE_NIC_RX(mdev, cap) \
+	MLX5_CAP_FLOWTABLE(mdev, flow_table_properties_nic_receive.cap)
+#define MLX5_CAP_FLOWTABLE_NIC_RX_MAX(mdev, cap) \
+	MLX5_CAP_FLOWTABLE_MAX(mdev, flow_table_properties_nic_receive.cap)
 #define MLX5_CAP_ESW_FLOWTABLE(mdev, cap) \
 	MLX5_GET(flow_table_eswitch_cap, \
 		 mdev->hca_caps_cur[MLX5_CAP_ESWITCH_FLOW_TABLE], cap)

include/linux/mlx5/mlx5_ifc.h+9−3

 	MLX5_CMD_OP_ALLOC_FLOW_COUNTER            = 0x939,
 	MLX5_CMD_OP_DEALLOC_FLOW_COUNTER          = 0x93a,
 	MLX5_CMD_OP_QUERY_FLOW_COUNTER            = 0x93b,
-	MLX5_CMD_OP_MODIFY_FLOW_TABLE             = 0x93c
+	MLX5_CMD_OP_MODIFY_FLOW_TABLE             = 0x93c,
+	MLX5_CMD_OP_MAX
 };
 struct mlx5_ifc_flow_table_fields_supported_bits {
 	u8         vport_svlan_insert[0x1];
 	u8         vport_cvlan_insert_if_not_exist[0x1];
 	u8         vport_cvlan_insert_overwrite[0x1];
-	u8         reserved_at_5[0x1b];
+	u8         reserved_at_5[0x19];
+	u8         nic_vport_node_guid_modify[0x1];
+	u8         nic_vport_port_guid_modify[0x1];
 	u8         reserved_at_20[0x7e0];
 };
 };
 struct mlx5_ifc_modify_nic_vport_field_select_bits {
-	u8         reserved_at_0[0x19];
+	u8         reserved_at_0[0x16];
+	u8         node_guid[0x1];
+	u8         port_guid[0x1];
+	u8         reserved_at_18[0x1];
 	u8         mtu[0x1];
 	u8         change_event[0x1];
 	u8         promisc[0x1];

include/linux/mlx5/qp.h+3−3

 };
 struct mlx5_qp_path {
-	u8			fl;
+	u8			fl_free_ar;
 	u8			rsvd3;
-	u8			free_ar;
+	__be16			pkey_index;
-	u8			pkey_index;
 	u8			rsvd0;
 	u8			grh_mlid;
 	__be16			rlid;
 	__be32			optparam;
 	u8			rsvd0[4];
 	struct mlx5_qp_context	ctx;
+	u8			rsvd2[16];
 };
 struct mlx5_modify_qp_mbox_out {

include/linux/mlx5/vport.h+2−0

 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
 					   u64 *system_image_guid);
 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid);
+int mlx5_modify_nic_vport_node_guid(struct mlx5_core_dev *mdev,
+				    u32 vport, u64 node_guid);
 int mlx5_query_nic_vport_qkey_viol_cntr(struct mlx5_core_dev *mdev,
 					u16 *qkey_viol_cntr);
 int mlx5_query_hca_vport_gid(struct mlx5_core_dev *dev, u8 other_vport,

include/linux/of.h+1−1

@@ -614,7 +614,7 @@ static inline struct device_node of_parse_phandle(const struct device_node np, · 613 unmodified lines
614	return NULL;	614	return NULL;
615	}	615	}
616		616
617	static inline int of_parse_phandle_with_args(struct device_node *np,	617	static inline int of_parse_phandle_with_args(const struct device_node *np,
618	const char *list_name,	618	const char *list_name,
619	const char *cells_name,	619	const char *cells_name,
620	int index,	620	int index,

include/linux/of_pci.h+1−1

@@ -8,7 +8,7 @@ struct pci_dev; · 7 unmodified lines
8	struct of_phandle_args;	8	struct of_phandle_args;
9	struct device_node;	9	struct device_node;
10		10
11	#ifdef CONFIG_OF	11	#ifdef CONFIG_OF_PCI
12	int of_irq_parse_pci(const struct pci_dev pdev, struct of_phandle_args out_irq);	12	int of_irq_parse_pci(const struct pci_dev pdev, struct of_phandle_args out_irq);
13	struct device_node of_pci_find_child_device(struct device_node parent,	13	struct device_node of_pci_find_child_device(struct device_node parent,
14	unsigned int devfn);	14	unsigned int devfn);

include/linux/of_reserved_mem.h+7−0

@@ -31,6 +31,13 @@ typedef int (reservedmem_of_init_fn)(struct reserved_mem rmem); · 30 unmodified lines
31	int of_reserved_mem_device_init(struct device *dev);	31	int of_reserved_mem_device_init(struct device *dev);
32	void of_reserved_mem_device_release(struct device *dev);	32	void of_reserved_mem_device_release(struct device *dev);
33		33
		34	int early_init_dt_alloc_reserved_memory_arch(phys_addr_t size,
		35	phys_addr_t align,
		36	phys_addr_t start,
		37	phys_addr_t end,
		38	bool nomap,
		39	phys_addr_t *res_base);
		40
34	void fdt_init_reserved_mem(void);	41	void fdt_init_reserved_mem(void);
35	void fdt_reserved_mem_save_node(unsigned long node, const char *uname,	42	void fdt_reserved_mem_save_node(unsigned long node, const char *uname,
36	phys_addr_t base, phys_addr_t size);	43	phys_addr_t base, phys_addr_t size);

include/linux/pwm.h+3−0

@@ -235,6 +235,9 @@ static inline int pwm_config(struct pwm_device *pwm, int duty_ns, · 234 unmodified lines
235	if (!pwm)	235	if (!pwm)
236	return -EINVAL;	236	return -EINVAL;
237		237
		238	if (duty_ns < 0 \|\| period_ns < 0)
		239	return -EINVAL;
		240
238	pwm_get_state(pwm, &state);	241	pwm_get_state(pwm, &state);
239	if (state.duty_cycle == duty_ns && state.period == period_ns)	242	if (state.duty_cycle == duty_ns && state.period == period_ns)
240	return 0;	243	return 0;

include/linux/seqlock.h+5−2

 static inline int raw_read_seqcount_latch(seqcount_t *s)
 {
-	return lockless_dereference(s)->sequence;
+	int seq = READ_ONCE(s->sequence);
+	/* Pairs with the first smp_wmb() in raw_write_seqcount_latch() */
+	smp_read_barrier_depends();
+	return seq;
 }
 /**
  *	unsigned seq, idx;
  *
  *	do {
- *		seq = lockless_dereference(latch)->seq;
+ *		seq = raw_read_seqcount_latch(&latch->seq);
  *
  *		idx = seq & 0x01;
  *		entry = data_query(latch->data[idx], ...);

include/linux/sunrpc/clnt.h+0−2

@@ -137,8 +137,6 @@ struct rpc_create_args { · 136 unmodified lines
137	#define RPC_CLNT_CREATE_NO_RETRANS_TIMEOUT (1UL << 9)	137	#define RPC_CLNT_CREATE_NO_RETRANS_TIMEOUT (1UL << 9)
138		138
139	struct rpc_clnt rpc_create(struct rpc_create_args args);	139	struct rpc_clnt rpc_create(struct rpc_create_args args);
140	struct rpc_clnt rpc_create_xprt(struct rpc_create_args args,
141	struct rpc_xprt *xprt);
142	struct rpc_clnt rpc_bind_new_program(struct rpc_clnt ,	140	struct rpc_clnt rpc_bind_new_program(struct rpc_clnt ,
143	const struct rpc_program *, u32);	141	const struct rpc_program *, u32);
144	struct rpc_clnt rpc_clone_client(struct rpc_clnt );	142	struct rpc_clnt rpc_clone_client(struct rpc_clnt );

include/linux/sunrpc/svc_xprt.h+1−0

@@ -84,6 +84,7 @@ struct svc_xprt { · 83 unmodified lines
84		84
85	struct net *xpt_net;	85	struct net *xpt_net;
86	struct rpc_xprt xpt_bc_xprt; / NFSv4.1 backchannel */	86	struct rpc_xprt xpt_bc_xprt; / NFSv4.1 backchannel */
		87	struct rpc_xprt_switch xpt_bc_xps; / NFSv4.1 backchannel */
87	};	88	};
88		89
89	static inline void unregister_xpt_user(struct svc_xprt xpt, struct svc_xpt_user u)	90	static inline void unregister_xpt_user(struct svc_xprt xpt, struct svc_xpt_user u)

include/linux/sunrpc/xprt.h+1−0

@@ -297,6 +297,7 @@ struct xprt_create { · 296 unmodified lines
297	size_t addrlen;	297	size_t addrlen;
298	const char *servername;	298	const char *servername;
299	struct svc_xprt bc_xprt; / NFSv4.1 backchannel */	299	struct svc_xprt bc_xprt; / NFSv4.1 backchannel */
		300	struct rpc_xprt_switch *bc_xps;
300	unsigned int flags;	301	unsigned int flags;
301	};	302	};
302		303

include/linux/thermal.h+2−0

  * @get_trend: a pointer to a function that reads the sensor temperature trend.
  * @set_emul_temp: a pointer to a function that sets sensor emulated
  *		   temperature.
+ * @set_trip_temp: a pointer to a function that sets the trip temperature on
+ *		   hardware.
  */
 struct thermal_zone_of_device_ops {
 	int (*get_temp)(void *, int *);

include/linux/usb/gadget.h+3−0

  * @udc_name: A name of UDC this driver should be bound to. If udc_name is NULL,
  *	this driver will be bound to any available UDC.
  * @pending: UDC core private data used for deferred probe of this driver.
+ * @match_existing_only: If udc is not found, return an error and don't add this
+ *      gadget driver to list of pending driver
  *
  * Devices are disabled till a gadget driver successfully bind()s, which
  * means the driver will handle setup() requests needed to enumerate (and
 	char			*udc_name;
 	struct list_head	pending;
+	unsigned                match_existing_only:1;
 };

include/linux/usb/musb.h+3−2

 };
 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
-void musb_mailbox(enum musb_vbus_id_status status);
+int musb_mailbox(enum musb_vbus_id_status status);
 #else
-static inline void musb_mailbox(enum musb_vbus_id_status status)
+static inline int musb_mailbox(enum musb_vbus_id_status status)
 {
+	return 0;
 }
 #endif

include/media/v4l2-mc.h+1−1

@@ -1,7 +1,7 @@
1	/*	1	/*
2	* v4l2-mc.h - Media Controller V4L2 types and prototypes	2	* v4l2-mc.h - Media Controller V4L2 types and prototypes
3	*	3	*
4	* Copyright (C) 2016 Mauro Carvalho Chehab <mchehab@osg.samsung.com>	4	* Copyright (C) 2016 Mauro Carvalho Chehab <mchehab@kernel.org>
5	* Copyright (C) 2006-2010 Nokia Corporation	5	* Copyright (C) 2006-2010 Nokia Corporation
6	* Copyright (c) 2016 Intel Corporation.	6	* Copyright (c) 2016 Intel Corporation.
7	*	7	*

include/net/compat.h+1−0

@@ -42,6 +42,7 @@ int compat_sock_get_timestampns(struct sock , struct timespec __user ); · 41 unmodified lines
42		42
43	int get_compat_msghdr(struct msghdr , struct compat_msghdr __user ,	43	int get_compat_msghdr(struct msghdr , struct compat_msghdr __user ,
44	struct sockaddr __user , struct iovec );	44	struct sockaddr __user , struct iovec );
		45	struct sock_fprog __user get_compat_bpf_fprog(char __user optval);
45	asmlinkage long compat_sys_sendmsg(int, struct compat_msghdr __user *,	46	asmlinkage long compat_sys_sendmsg(int, struct compat_msghdr __user *,
46	unsigned int);	47	unsigned int);
47	asmlinkage long compat_sys_sendmmsg(int, struct compat_mmsghdr __user *,	48	asmlinkage long compat_sys_sendmmsg(int, struct compat_mmsghdr __user *,

include/net/ip_vs.h+1−1

@@ -1232,7 +1232,7 @@ void ip_vs_conn_expire_now(struct ip_vs_conn *cp); · 1231 unmodified lines
1232	const char *ip_vs_state_name(__u16 proto, int state);	1232	const char *ip_vs_state_name(__u16 proto, int state);
1233		1233
1234	void ip_vs_tcp_conn_listen(struct ip_vs_conn *cp);	1234	void ip_vs_tcp_conn_listen(struct ip_vs_conn *cp);
1235	int ip_vs_check_template(struct ip_vs_conn *ct);	1235	int ip_vs_check_template(struct ip_vs_conn ct, struct ip_vs_dest cdest);
1236	void ip_vs_random_dropentry(struct netns_ipvs *ipvs);	1236	void ip_vs_random_dropentry(struct netns_ipvs *ipvs);
1237	int ip_vs_conn_init(void);	1237	int ip_vs_conn_init(void);
1238	void ip_vs_conn_cleanup(void);	1238	void ip_vs_conn_cleanup(void);

include/net/netfilter/nf_queue.h+2−2

@@ -28,8 +28,8 @@ struct nf_queue_handler { · 27 unmodified lines
28	struct nf_hook_ops *ops);	28	struct nf_hook_ops *ops);
29	};	29	};
30		30
31	void nf_register_queue_handler(const struct nf_queue_handler *qh);	31	void nf_register_queue_handler(struct net net, const struct nf_queue_handler qh);
32	void nf_unregister_queue_handler(void);	32	void nf_unregister_queue_handler(struct net *net);
33	void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict);	33	void nf_reinject(struct nf_queue_entry *entry, unsigned int verdict);
34		34
35	void nf_queue_entry_get_refs(struct nf_queue_entry *entry);	35	void nf_queue_entry_get_refs(struct nf_queue_entry *entry);

include/net/netns/netfilter.h+2−0

 struct proc_dir_entry;
 struct nf_logger;
+struct nf_queue_handler;
 struct netns_nf {
 #if defined CONFIG_PROC_FS
 	struct proc_dir_entry *proc_netfilter;
 #endif
+	const struct nf_queue_handler __rcu *queue_handler;
 	const struct nf_logger __rcu *nf_loggers[NFPROTO_NUMPROTO];
 #ifdef CONFIG_SYSCTL
 	struct ctl_table_header *nf_log_dir_header;

include/net/pkt_cls.h+7−3

 	};
 };
-static inline bool tc_should_offload(struct net_device *dev, u32 flags)
+static inline bool tc_should_offload(const struct net_device *dev,
+				     const struct tcf_proto *tp, u32 flags)
 {
+	const struct Qdisc *sch = tp->q;
+	const struct Qdisc_class_ops *cops = sch->ops->cl_ops;
 	if (!(dev->features & NETIF_F_HW_TC))
 		return false;
 	if (flags & TCA_CLS_FLAGS_SKIP_HW)
 		return false;
 	if (!dev->netdev_ops->ndo_setup_tc)
 		return false;
+	if (cops && cops->tcf_cl_offload)
+		return cops->tcf_cl_offload(tp->classid);
 	return true;
 }

include/net/sch_generic.h+5−1

 	/* Filter manipulation */
 	struct tcf_proto __rcu ** (*tcf_chain)(struct Qdisc *, unsigned long);
+	bool			(*tcf_cl_offload)(u32 classid);
 	unsigned long		(*bind_tcf)(struct Qdisc *, unsigned long,
 					u32 classid);
 	void			(*unbind_tcf)(struct Qdisc *, unsigned long);
 	/* we can reuse ->gso_skb because peek isn't called for root qdiscs */
 	if (!sch->gso_skb) {
 		sch->gso_skb = sch->dequeue(sch);
-		if (sch->gso_skb)
+		if (sch->gso_skb) {
 			/* it's still part of the queue */
+			qdisc_qstats_backlog_inc(sch, sch->gso_skb);
 			sch->q.qlen++;
+		}
 	}
 	return sch->gso_skb;
 	if (skb) {
 		sch->gso_skb = NULL;
+		qdisc_qstats_backlog_dec(sch, skb);
 		sch->q.qlen--;
 	} else {
 		skb = sch->dequeue(sch);

include/rdma/ib_verbs.h+3−3

@@ -217,10 +217,10 @@ enum ib_device_cap_flags { · 216 unmodified lines
217	IB_DEVICE_CROSS_CHANNEL = (1 << 27),	217	IB_DEVICE_CROSS_CHANNEL = (1 << 27),
218	IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),	218	IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),
219	IB_DEVICE_SIGNATURE_HANDOVER = (1 << 30),	219	IB_DEVICE_SIGNATURE_HANDOVER = (1 << 30),
220	IB_DEVICE_ON_DEMAND_PAGING = (1 << 31),	220	IB_DEVICE_ON_DEMAND_PAGING = (1ULL << 31),
221	IB_DEVICE_SG_GAPS_REG = (1ULL << 32),	221	IB_DEVICE_SG_GAPS_REG = (1ULL << 32),
222	IB_DEVICE_VIRTUAL_FUNCTION = ((u64)1 << 33),	222	IB_DEVICE_VIRTUAL_FUNCTION = (1ULL << 33),
223	IB_DEVICE_RAW_SCATTER_FCS = ((u64)1 << 34),	223	IB_DEVICE_RAW_SCATTER_FCS = (1ULL << 34),
224	};	224	};
225		225
226	enum ib_signature_prot_cap {	226	enum ib_signature_prot_cap {

include/uapi/linux/btrfs.h+1−1

@@ -118,7 +118,7 @@ struct btrfs_ioctl_vol_args_v2 { · 117 unmodified lines
118	};	118	};
119	union {	119	union {
120	char name[BTRFS_SUBVOL_NAME_MAX + 1];	120	char name[BTRFS_SUBVOL_NAME_MAX + 1];
121	u64 devid;	121	__u64 devid;
122	};	122	};
123	};	123	};
124		124

include/uapi/linux/gtp.h+1−1

@@ -1,5 +1,5 @@
1	#ifndef _UAPI_LINUX_GTP_H_	1	#ifndef _UAPI_LINUX_GTP_H_
2	#define _UAPI_LINUX_GTP_H__	2	#define _UAPI_LINUX_GTP_H_
3		3
4	enum gtp_genl_cmds {	4	enum gtp_genl_cmds {
5	GTP_CMD_NEWPDP,	5	GTP_CMD_NEWPDP,

include/uapi/sound/Kbuild+3−0

 # UAPI Header export list
 header-y += asequencer.h
+header-y += asoc.h
 header-y += asound.h
 header-y += asound_fm.h
 header-y += compress_offload.h
 header-y += hdspm.h
 header-y += sb16_csp.h
 header-y += sfnt_info.h
+header-y += tlv.h
+header-y += usb_stream.h

kernel/events/core.c+2−4

 	if (event->ctx)
 		put_ctx(event->ctx);
-	if (event->pmu) {
+	exclusive_event_destroy(event);
-		exclusive_event_destroy(event);
+	module_put(event->pmu->module);
-		module_put(event->pmu->module);
-	}
 	call_rcu(&event->rcu_head, free_event_rcu);
 }

kernel/futex.c+11−3

 {
 	unsigned long address = (unsigned long)uaddr;
 	struct mm_struct *mm = current->mm;
-	struct page *page;
+	struct page *page, *tail;
 	struct address_space *mapping;
 	int err, ro = 0;
 	 * considered here and page lock forces unnecessarily serialization
 	 * From this point on, mapping will be re-verified if necessary and
 	 * page lock will be acquired only if it is unavoidable
-	 */
+	 *
+	 * Mapping checks require the head page for any compound page so the
+	 * head page and mapping is looked up now. For anonymous pages, it
+	 * does not matter if the page splits in the future as the key is
+	 * based on the address. For filesystem-backed pages, the tail is
+	 * required as the index of the page determines the key. For
+	 * base pages, there is no tail page and tail == page.
+	 */
+	tail = page;
 	page = compound_head(page);
 	mapping = READ_ONCE(page->mapping);
 		key->both.offset |= FUT_OFF_INODE; /* inode-based key */
 		key->shared.inode = inode;
-		key->shared.pgoff = basepage_index(page);
+		key->shared.pgoff = basepage_index(tail);
 		rcu_read_unlock();
 	}

kernel/kcov.c+6−1

 static int __init kcov_init(void)
 {
-	if (!debugfs_create_file("kcov", 0600, NULL, NULL, &kcov_fops)) {
+	/*
+	 * The kcov debugfs file won't ever get removed and thus,
+	 * there is no need to protect it against removal races. The
+	 * use of debugfs_create_file_unsafe() is actually safe here.
+	 */
+	if (!debugfs_create_file_unsafe("kcov", 0600, NULL, NULL, &kcov_fops)) {
 		pr_err("failed to create kcov in debugfs\n");
 		return -ENOMEM;
 	}

kernel/locking/mutex.c+6−3

 	if (!hold_ctx)
 		return 0;
-	if (unlikely(ctx == hold_ctx))
-		return -EALREADY;
 	if (ctx->stamp - hold_ctx->stamp <= LONG_MAX &&
 	    (ctx->stamp != hold_ctx->stamp || ctx > hold_ctx)) {
 #ifdef CONFIG_DEBUG_MUTEXES
 	unsigned long flags;
 	int ret;
+	if (use_ww_ctx) {
+		struct ww_mutex *ww = container_of(lock, struct ww_mutex, base);
+		if (unlikely(ww_ctx == READ_ONCE(ww->ctx)))
+			return -EALREADY;
+	}
 	preempt_disable();
 	mutex_acquire_nest(&lock->dep_map, subclass, 0, nest_lock, ip);

kernel/locking/qspinlock.c+60−0

@@ -267,6 +267,66 @@ static __always_inline u32 __pv_wait_head_or_lock(struct qspinlock *lock, · 266 unmodified lines
267	#define queued_spin_lock_slowpath native_queued_spin_lock_slowpath	267	#define queued_spin_lock_slowpath native_queued_spin_lock_slowpath
268	#endif	268	#endif
269		269
		270	/*
		271	* queued_spin_lock_slowpath() can (load-)ACQUIRE the lock before
		272	* issuing an _unordered_ store to set _Q_LOCKED_VAL.
		273	*
		274	* This means that the store can be delayed, but no later than the
		275	* store-release from the unlock. This means that simply observing
		276	* _Q_LOCKED_VAL is not sufficient to determine if the lock is acquired.
		277	*
		278	* There are two paths that can issue the unordered store:
		279	*
		280	* (1) clear_pending_set_locked(): ,1,0 -> ,0,1
		281	*
		282	* (2) set_locked(): t,0,0 -> t,0,1 ; t != 0
		283	* atomic_cmpxchg_relaxed(): t,0,0 -> 0,0,1
		284	*
		285	* However, in both cases we have other !0 state we've set before to queue
		286	* ourseves:
		287	*
		288	* For (1) we have the atomic_cmpxchg_acquire() that set _Q_PENDING_VAL, our
		289	* load is constrained by that ACQUIRE to not pass before that, and thus must
		290	* observe the store.
		291	*
		292	* For (2) we have a more intersting scenario. We enqueue ourselves using
		293	* xchg_tail(), which ends up being a RELEASE. This in itself is not
		294	* sufficient, however that is followed by an smp_cond_acquire() on the same
		295	* word, giving a RELEASE->ACQUIRE ordering. This again constrains our load and
		296	* guarantees we must observe that store.
		297	*
		298	* Therefore both cases have other !0 state that is observable before the
		299	* unordered locked byte store comes through. This means we can use that to
		300	* wait for the lock store, and then wait for an unlock.
		301	*/
		302	#ifndef queued_spin_unlock_wait
		303	void queued_spin_unlock_wait(struct qspinlock *lock)
		304	{
		305	u32 val;
		306
		307	for (;;) {
		308	val = atomic_read(&lock->val);
		309
		310	if (!val) /* not locked, we're done */
		311	goto done;
		312
		313	if (val & _Q_LOCKED_MASK) /* locked, go wait for unlock */
		314	break;
		315
		316	/* not locked, but pending, wait until we observe the lock */
		317	cpu_relax();
		318	}
		319
		320	/* any unlock is good */
		321	while (atomic_read(&lock->val) & _Q_LOCKED_MASK)
		322	cpu_relax();
		323
		324	done:
		325	smp_rmb(); /* CTRL + RMB -> ACQUIRE */
		326	}
		327	EXPORT_SYMBOL(queued_spin_unlock_wait);
		328	#endif
		329
270	#endif /* _GEN_PV_LOCK_SLOWPATH */	330	#endif /* _GEN_PV_LOCK_SLOWPATH */
271		331
272	/**	332	/**

kernel/relay.c+1−0

@@ -614,6 +614,7 @@ free_bufs: · 613 unmodified lines
614		614
615	kref_put(&chan->kref, relay_destroy_channel);	615	kref_put(&chan->kref, relay_destroy_channel);
616	mutex_unlock(&relay_channels_mutex);	616	mutex_unlock(&relay_channels_mutex);
		617	kfree(chan);
617	return NULL;	618	return NULL;
618	}	619	}
619	EXPORT_SYMBOL_GPL(relay_open);	620	EXPORT_SYMBOL_GPL(relay_open);

kernel/sched/core.c+23−6

 #endif
 #endif
+#ifdef CONFIG_SCHEDSTATS
 DEFINE_STATIC_KEY_FALSE(sched_schedstats);
+static bool __initdata __sched_schedstats = false;
-#ifdef CONFIG_SCHEDSTATS
 static void set_schedstats(bool enabled)
 {
 	if (enabled)
 	if (!str)
 		goto out;
+	/*
+	 * This code is called before jump labels have been set up, so we can't
+	 * change the static branch directly just yet.  Instead set a temporary
+	 * variable so init_schedstats() can do it later.
+	 */
 	if (!strcmp(str, "enable")) {
-		set_schedstats(true);
+		__sched_schedstats = true;
 		ret = 1;
 	} else if (!strcmp(str, "disable")) {
-		set_schedstats(false);
+		__sched_schedstats = false;
 		ret = 1;
 	}
 out:
 }
 __setup("schedstats=", setup_schedstats);
+static void __init init_schedstats(void)
+{
+	set_schedstats(__sched_schedstats);
+}
 #ifdef CONFIG_PROC_SYSCTL
 int sysctl_schedstats(struct ctl_table *table, int write,
 			 void __user *buffer, size_t *lenp, loff_t *ppos)
 		set_schedstats(state);
 	return err;
 }
-#endif
+#endif /* CONFIG_PROC_SYSCTL */
-#endif
+#else  /* !CONFIG_SCHEDSTATS */
+static inline void init_schedstats(void) {}
+#endif /* CONFIG_SCHEDSTATS */
 /*
  * fork()/clone()-time setup:
 static inline void schedule_debug(struct task_struct *prev)
 {
 #ifdef CONFIG_SCHED_STACK_END_CHECK
-	BUG_ON(task_stack_end_corrupted(prev));
+	if (task_stack_end_corrupted(prev))
+		panic("corrupted stack end detected inside scheduler\n");
 #endif
 	if (unlikely(in_atomic_preempt_off())) {
 #endif
 	init_sched_fair_class();
+	init_schedstats();
 	scheduler_running = 1;
 }

kernel/sched/debug.c+4−11

@@ -427,19 +427,12 @@ print_task(struct seq_file m, struct rq rq, struct task_struct *p) · 426 unmodified lines
427	SPLIT_NS(p->se.vruntime),	427	SPLIT_NS(p->se.vruntime),
428	(long long)(p->nvcsw + p->nivcsw),	428	(long long)(p->nvcsw + p->nivcsw),
429	p->prio);	429	p->prio);
430	#ifdef CONFIG_SCHEDSTATS	430
431	if (schedstat_enabled()) {
432	SEQ_printf(m, "%9Ld.%06ld %9Ld.%06ld %9Ld.%06ld",
433	SPLIT_NS(p->se.statistics.wait_sum),
434	SPLIT_NS(p->se.sum_exec_runtime),
435	SPLIT_NS(p->se.statistics.sum_sleep_runtime));
436	}
437	#else
438	SEQ_printf(m, "%9Ld.%06ld %9Ld.%06ld %9Ld.%06ld",	431	SEQ_printf(m, "%9Ld.%06ld %9Ld.%06ld %9Ld.%06ld",
439	0LL, 0L,	432	SPLIT_NS(schedstat_val(p, se.statistics.wait_sum)),
440	SPLIT_NS(p->se.sum_exec_runtime),	433	SPLIT_NS(p->se.sum_exec_runtime),
441	0LL, 0L);	434	SPLIT_NS(schedstat_val(p, se.statistics.sum_sleep_runtime)));
442	#endif	435
443	#ifdef CONFIG_NUMA_BALANCING	436	#ifdef CONFIG_NUMA_BALANCING
444	SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p));	437	SEQ_printf(m, " %d %d", task_node(p), task_numa_group_id(p));
445	#endif	438	#endif

kernel/sched/idle.c+1−1

@@ -127,7 +127,7 @@ static int call_cpuidle(struct cpuidle_driver drv, struct cpuidle_device dev, · 126 unmodified lines
127	*/	127	*/
128	static void cpuidle_idle_call(void)	128	static void cpuidle_idle_call(void)
129	{	129	{
130	struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices);	130	struct cpuidle_device *dev = cpuidle_get_device();
131	struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);	131	struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);
132	int next_state, entered_state;	132	int next_state, entered_state;
133		133

kernel/sched/stats.h+3−0

 # define schedstat_inc(rq, field)	do { if (schedstat_enabled()) { (rq)->field++; } } while (0)
 # define schedstat_add(rq, field, amt)	do { if (schedstat_enabled()) { (rq)->field += (amt); } } while (0)
 # define schedstat_set(var, val)	do { if (schedstat_enabled()) { var = (val); } } while (0)
+# define schedstat_val(rq, field)	((schedstat_enabled()) ? (rq)->field : 0)
 #else /* !CONFIG_SCHEDSTATS */
 static inline void
 rq_sched_info_arrive(struct rq *rq, unsigned long long delta)
 # define schedstat_inc(rq, field)	do { } while (0)
 # define schedstat_add(rq, field, amt)	do { } while (0)
 # define schedstat_set(var, val)	do { } while (0)
+# define schedstat_val(rq, field)	0
 #endif
 #ifdef CONFIG_SCHED_INFO

kernel/trace/bpf_trace.c+2−2

@@ -198,7 +198,7 @@ static u64 bpf_perf_event_read(u64 r1, u64 index, u64 r3, u64 r4, u64 r5) · 197 unmodified lines
198	if (unlikely(index >= array->map.max_entries))	198	if (unlikely(index >= array->map.max_entries))
199	return -E2BIG;	199	return -E2BIG;
200		200
201	file = (struct file *)array->ptrs[index];	201	file = READ_ONCE(array->ptrs[index]);
202	if (unlikely(!file))	202	if (unlikely(!file))
203	return -ENOENT;	203	return -ENOENT;
204		204
@@ -247,7 +247,7 @@ static u64 bpf_perf_event_output(u64 r1, u64 r2, u64 flags, u64 r4, u64 size) · 42 unmodified lines
247	if (unlikely(index >= array->map.max_entries))	247	if (unlikely(index >= array->map.max_entries))
248	return -E2BIG;	248	return -E2BIG;
249		249
250	file = (struct file *)array->ptrs[index];	250	file = READ_ONCE(array->ptrs[index]);
251	if (unlikely(!file))	251	if (unlikely(!file))
252	return -ENOENT;	252	return -ENOENT;
253		253

mm/fadvise.c+11−0

@@ -126,6 +126,17 @@ SYSCALL_DEFINE4(fadvise64_64, int, fd, loff_t, offset, loff_t, len, int, advice) · 125 unmodified lines
126	*/	126	*/
127	start_index = (offset+(PAGE_SIZE-1)) >> PAGE_SHIFT;	127	start_index = (offset+(PAGE_SIZE-1)) >> PAGE_SHIFT;
128	end_index = (endbyte >> PAGE_SHIFT);	128	end_index = (endbyte >> PAGE_SHIFT);
		129	if ((endbyte & ~PAGE_MASK) != ~PAGE_MASK) {
		130	/* First page is tricky as 0 - 1 = -1, but pgoff_t
		131	* is unsigned, so the end_index >= start_index
		132	* check below would be true and we'll discard the whole
		133	* file cache which is not what was asked.
		134	*/
		135	if (end_index == 0)
		136	break;
		137
		138	end_index--;
		139	}
129		140
130	if (end_index >= start_index) {	141	if (end_index >= start_index) {
131	unsigned long count = invalidate_mapping_pages(mapping,	142	unsigned long count = invalidate_mapping_pages(mapping,

mm/hugetlb.c+40−2

@@ -832,8 +832,27 @@ static bool vma_has_reserves(struct vm_area_struct *vma, long chg) · 831 unmodified lines
832	* Only the process that called mmap() has reserves for	832	* Only the process that called mmap() has reserves for
833	* private mappings.	833	* private mappings.
834	*/	834	*/
835	if (is_vma_resv_set(vma, HPAGE_RESV_OWNER))	835	if (is_vma_resv_set(vma, HPAGE_RESV_OWNER)) {
836	return true;	836	/*
		837	* Like the shared case above, a hole punch or truncate
		838	* could have been performed on the private mapping.
		839	* Examine the value of chg to determine if reserves
		840	* actually exist or were previously consumed.
		841	* Very Subtle - The value of chg comes from a previous
		842	* call to vma_needs_reserves(). The reserve map for
		843	* private mappings has different (opposite) semantics
		844	* than that of shared mappings. vma_needs_reserves()
		845	* has already taken this difference in semantics into
		846	* account. Therefore, the meaning of chg is the same
		847	* as in the shared case above. Code could easily be
		848	* combined, but keeping it separate draws attention to
		849	* subtle differences.
		850	*/
		851	if (chg)
		852	return false;
		853	else
		854	return true;
		855	}
837		856
838	return false;	857	return false;
839	}	858	}
@@ -1816,6 +1835,25 @@ static long __vma_reservation_common(struct hstate *h, · 976 unmodified lines
1816		1835
1817	if (vma->vm_flags & VM_MAYSHARE)	1836	if (vma->vm_flags & VM_MAYSHARE)
1818	return ret;	1837	return ret;
		1838	else if (is_vma_resv_set(vma, HPAGE_RESV_OWNER) && ret >= 0) {
		1839	/*
		1840	* In most cases, reserves always exist for private mappings.
		1841	* However, a file associated with mapping could have been
		1842	* hole punched or truncated after reserves were consumed.
		1843	* As subsequent fault on such a range will not use reserves.
		1844	* Subtle - The reserve map for private mappings has the
		1845	* opposite meaning than that of shared mappings. If NO
		1846	* entry is in the reserve map, it means a reservation exists.
		1847	* If an entry exists in the reserve map, it means the
		1848	* reservation has already been consumed. As a result, the
		1849	* return value of this routine is the opposite of the
		1850	* value returned from reserve map manipulation routines above.
		1851	*/
		1852	if (ret)
		1853	return 0;
		1854	else
		1855	return 1;
		1856	}
1819	else	1857	else
1820	return ret < 0 ? ret : 0;	1858	return ret < 0 ? ret : 0;
1821	}	1859	}

mm/kasan/kasan.c+2−2

@@ -763,8 +763,8 @@ static int kasan_mem_notifier(struct notifier_block *nb, · 762 unmodified lines
763		763
764	static int __init kasan_memhotplug_init(void)	764	static int __init kasan_memhotplug_init(void)
765	{	765	{
766	pr_err("WARNING: KASAN doesn't support memory hot-add\n");	766	pr_info("WARNING: KASAN doesn't support memory hot-add\n");
767	pr_err("Memory hot-add will be disabled\n");	767	pr_info("Memory hot-add will be disabled\n");
768		768
769	hotplug_memory_notifier(kasan_mem_notifier, 0);	769	hotplug_memory_notifier(kasan_mem_notifier, 0);
770		770

mm/memcontrol.c+1−1

@@ -1608,7 +1608,7 @@ static void memcg_oom_recover(struct mem_cgroup *memcg) · 1607 unmodified lines
1608		1608
1609	static void mem_cgroup_oom(struct mem_cgroup *memcg, gfp_t mask, int order)	1609	static void mem_cgroup_oom(struct mem_cgroup *memcg, gfp_t mask, int order)
1610	{	1610	{
1611	if (!current->memcg_may_oom \|\| current->memcg_in_oom)	1611	if (!current->memcg_may_oom)
1612	return;	1612	return;
1613	/*	1613	/*
1614	* We are in the middle of the charge context here, so we	1614	* We are in the middle of the charge context here, so we

mm/page-writeback.c+12−9

 	struct dirty_throttle_control *gdtc = mdtc_gdtc(dtc);
 	unsigned long bytes = vm_dirty_bytes;
 	unsigned long bg_bytes = dirty_background_bytes;
-	unsigned long ratio = vm_dirty_ratio;
+	/* convert ratios to per-PAGE_SIZE for higher precision */
-	unsigned long bg_ratio = dirty_background_ratio;
+	unsigned long ratio = (vm_dirty_ratio * PAGE_SIZE) / 100;
+	unsigned long bg_ratio = (dirty_background_ratio * PAGE_SIZE) / 100;
 	unsigned long thresh;
 	unsigned long bg_thresh;
 	struct task_struct *tsk;
 		/*
 		 * The byte settings can't be applied directly to memcg
 		 * domains.  Convert them to ratios by scaling against
-		 * globally available memory.
+		 * globally available memory.  As the ratios are in
+		 * per-PAGE_SIZE, they can be obtained by dividing bytes by
+		 * number of pages.
 		 */
 		if (bytes)
-			ratio = min(DIV_ROUND_UP(bytes, PAGE_SIZE) * 100 /
+			ratio = min(DIV_ROUND_UP(bytes, global_avail),
-				    global_avail, 100UL);
+				    PAGE_SIZE);
 		if (bg_bytes)
-			bg_ratio = min(DIV_ROUND_UP(bg_bytes, PAGE_SIZE) * 100 /
+			bg_ratio = min(DIV_ROUND_UP(bg_bytes, global_avail),
-				       global_avail, 100UL);
+				       PAGE_SIZE);
 		bytes = bg_bytes = 0;
 	}
 	if (bytes)
 		thresh = DIV_ROUND_UP(bytes, PAGE_SIZE);
 	else
-		thresh = (ratio * available_memory) / 100;
+		thresh = (ratio * available_memory) / PAGE_SIZE;
 	if (bg_bytes)
 		bg_thresh = DIV_ROUND_UP(bg_bytes, PAGE_SIZE);
 	else
-		bg_thresh = (bg_ratio * available_memory) / 100;
+		bg_thresh = (bg_ratio * available_memory) / PAGE_SIZE;
 	if (bg_thresh >= thresh)
 		bg_thresh = thresh / 2;

mm/percpu.c+44−29

 	int			map_used;	/* # of map entries used before the sentry */
 	int			map_alloc;	/* # of map entries allocated */
 	int			*map;		/* allocation map */
-	struct work_struct	map_extend_work;/* async ->map[] extension */
+	struct list_head	map_extend_list;/* on pcpu_map_extend_chunks */
 	void			*data;		/* chunk data */
 	int			first_free;	/* no free below this */
 static int pcpu_reserved_chunk_limit;
 static DEFINE_SPINLOCK(pcpu_lock);	/* all internal data structures */
-static DEFINE_MUTEX(pcpu_alloc_mutex);	/* chunk create/destroy, [de]pop */
+static DEFINE_MUTEX(pcpu_alloc_mutex);	/* chunk create/destroy, [de]pop, map ext */
 static struct list_head *pcpu_slot __read_mostly; /* chunk list slots */
+/* chunks which need their map areas extended, protected by pcpu_lock */
+static LIST_HEAD(pcpu_map_extend_chunks);
 /*
  * The number of empty populated pages, protected by pcpu_lock.  The
  * reserved chunk doesn't contribute to the count.
 {
 	int margin, new_alloc;
+	lockdep_assert_held(&pcpu_lock);
 	if (is_atomic) {
 		margin = 3;
 		if (chunk->map_alloc <
-		    chunk->map_used + PCPU_ATOMIC_MAP_MARGIN_LOW &&
+		    chunk->map_used + PCPU_ATOMIC_MAP_MARGIN_LOW) {
-		    pcpu_async_enabled)
+			if (list_empty(&chunk->map_extend_list)) {
-			schedule_work(&chunk->map_extend_work);
+				list_add_tail(&chunk->map_extend_list,
+					      &pcpu_map_extend_chunks);
+				pcpu_schedule_balance_work();
+			}
+		}
 	} else {
 		margin = PCPU_ATOMIC_MAP_MARGIN_HIGH;
 	}
 	size_t old_size = 0, new_size = new_alloc * sizeof(new[0]);
 	unsigned long flags;
+	lockdep_assert_held(&pcpu_alloc_mutex);
 	new = pcpu_mem_zalloc(new_size);
 	if (!new)
 		return -ENOMEM;
 	return 0;
 }
-static void pcpu_map_extend_workfn(struct work_struct *work)
-{
-	struct pcpu_chunk *chunk = container_of(work, struct pcpu_chunk,
-						map_extend_work);
-	int new_alloc;
-	spin_lock_irq(&pcpu_lock);
-	new_alloc = pcpu_need_to_extend(chunk, false);
-	spin_unlock_irq(&pcpu_lock);
-	if (new_alloc)
-		pcpu_extend_area_map(chunk, new_alloc);
-}
 /**
  * pcpu_fit_in_area - try to fit the requested allocation in a candidate area
  * @chunk: chunk the candidate area belongs to
 	chunk->map_used = 1;
 	INIT_LIST_HEAD(&chunk->list);
-	INIT_WORK(&chunk->map_extend_work, pcpu_map_extend_workfn);
+	INIT_LIST_HEAD(&chunk->map_extend_list);
 	chunk->free_size = pcpu_unit_size;
 	chunk->contig_hint = pcpu_unit_size;
 		return NULL;
 	}
+	if (!is_atomic)
+		mutex_lock(&pcpu_alloc_mutex);
 	spin_lock_irqsave(&pcpu_lock, flags);
 	/* serve reserved allocations from the reserved chunk if available */
 	if (is_atomic)
 		goto fail;
-	mutex_lock(&pcpu_alloc_mutex);
 	if (list_empty(&pcpu_slot[pcpu_nr_slots - 1])) {
 		chunk = pcpu_create_chunk();
 		if (!chunk) {
-			mutex_unlock(&pcpu_alloc_mutex);
 			err = "failed to allocate new chunk";
 			goto fail;
 		}
 		spin_lock_irqsave(&pcpu_lock, flags);
 	}
-	mutex_unlock(&pcpu_alloc_mutex);
 	goto restart;
 area_found:
 	if (!is_atomic) {
 		int page_start, page_end, rs, re;
-		mutex_lock(&pcpu_alloc_mutex);
 		page_start = PFN_DOWN(off);
 		page_end = PFN_UP(off + size);
 			spin_lock_irqsave(&pcpu_lock, flags);
 			if (ret) {
-				mutex_unlock(&pcpu_alloc_mutex);
 				pcpu_free_area(chunk, off, &occ_pages);
 				err = "failed to populate";
 				goto fail_unlock;
 		/* see the flag handling in pcpu_blance_workfn() */
 		pcpu_atomic_alloc_failed = true;
 		pcpu_schedule_balance_work();
+	} else {
+		mutex_unlock(&pcpu_alloc_mutex);
 	}
 	return NULL;
 }
 		if (chunk == list_first_entry(free_head, struct pcpu_chunk, list))
 			continue;
+		list_del_init(&chunk->map_extend_list);
 		list_move(&chunk->list, &to_free);
 	}
 		pcpu_destroy_chunk(chunk);
 	}
+	/* service chunks which requested async area map extension */
+	do {
+		int new_alloc = 0;
+		spin_lock_irq(&pcpu_lock);
+		chunk = list_first_entry_or_null(&pcpu_map_extend_chunks,
+					struct pcpu_chunk, map_extend_list);
+		if (chunk) {
+			list_del_init(&chunk->map_extend_list);
+			new_alloc = pcpu_need_to_extend(chunk, false);
+		}
+		spin_unlock_irq(&pcpu_lock);
+		if (new_alloc)
+			pcpu_extend_area_map(chunk, new_alloc);
+	} while (chunk);
 	/*
 	 * Ensure there are certain number of free populated pages for
 	 * atomic allocs.  Fill up from the most packed so that atomic
 	 */
 	schunk = memblock_virt_alloc(pcpu_chunk_struct_size, 0);
 	INIT_LIST_HEAD(&schunk->list);
-	INIT_WORK(&schunk->map_extend_work, pcpu_map_extend_workfn);
+	INIT_LIST_HEAD(&schunk->map_extend_list);
 	schunk->base_addr = base_addr;
 	schunk->map = smap;
 	schunk->map_alloc = ARRAY_SIZE(smap);
 	if (dyn_size) {
 		dchunk = memblock_virt_alloc(pcpu_chunk_struct_size, 0);
 		INIT_LIST_HEAD(&dchunk->list);
-		INIT_WORK(&dchunk->map_extend_work, pcpu_map_extend_workfn);
+		INIT_LIST_HEAD(&dchunk->map_extend_list);
 		dchunk->base_addr = base_addr;
 		dchunk->map = dmap;
 		dchunk->map_alloc = ARRAY_SIZE(dmap);

mm/swap.c+19−1

@@ -667,6 +667,24 @@ static void lru_add_drain_per_cpu(struct work_struct *dummy) · 666 unmodified lines
667		667
668	static DEFINE_PER_CPU(struct work_struct, lru_add_drain_work);	668	static DEFINE_PER_CPU(struct work_struct, lru_add_drain_work);
669		669
		670	/*
		671	* lru_add_drain_wq is used to do lru_add_drain_all() from a WQ_MEM_RECLAIM
		672	* workqueue, aiding in getting memory freed.
		673	*/
		674	static struct workqueue_struct *lru_add_drain_wq;
		675
		676	static int __init lru_init(void)
		677	{
		678	lru_add_drain_wq = alloc_workqueue("lru-add-drain", WQ_MEM_RECLAIM, 0);
		679
		680	if (WARN(!lru_add_drain_wq,
		681	"Failed to create workqueue lru_add_drain_wq"))
		682	return -ENOMEM;
		683
		684	return 0;
		685	}
		686	early_initcall(lru_init);
		687
670	void lru_add_drain_all(void)	688	void lru_add_drain_all(void)
671	{	689	{
672	static DEFINE_MUTEX(lock);	690	static DEFINE_MUTEX(lock);
@@ -686,7 +704,7 @@ void lru_add_drain_all(void) · 13 unmodified lines
686	pagevec_count(&per_cpu(lru_deactivate_pvecs, cpu)) \|\|	704	pagevec_count(&per_cpu(lru_deactivate_pvecs, cpu)) \|\|
687	need_activate_page_drain(cpu)) {	705	need_activate_page_drain(cpu)) {
688	INIT_WORK(work, lru_add_drain_per_cpu);	706	INIT_WORK(work, lru_add_drain_per_cpu);
689	schedule_work_on(cpu, work);	707	queue_work_on(cpu, lru_add_drain_wq, work);
690	cpumask_set_cpu(cpu, &has_work);	708	cpumask_set_cpu(cpu, &has_work);
691	}	709	}
692	}	710	}

mm/swap_state.c+4−1

 void free_page_and_swap_cache(struct page *page)
 {
 	free_swap_cache(page);
-	put_page(page);
+	if (is_huge_zero_page(page))
+		put_huge_zero_page();
+	else
+		put_page(page);
 }
 /*

net/bridge/br_fdb.c+2−0

 	 * change from under us.
 	 */
 	list_for_each_entry(v, &vg->vlan_list, vlist) {
+		if (!br_vlan_should_use(v))
+			continue;
 		f = __br_fdb_get(br, br->dev->dev_addr, v->vid);
 		if (f && f->is_local && !f->dst)
 			fdb_delete_local(br, NULL, f);

net/compat.c+17−3

 	__scm_destroy(scm);
 }
-static int do_set_attach_filter(struct socket *sock, int level, int optname,
+/* allocate a 64-bit sock_fprog on the user stack for duration of syscall. */
-				char __user *optval, unsigned int optlen)
+struct sock_fprog __user *get_compat_bpf_fprog(char __user *optval)
 {
 	struct compat_sock_fprog __user *fprog32 = (struct compat_sock_fprog __user *)optval;
 	struct sock_fprog __user *kfprog = compat_alloc_user_space(sizeof(struct sock_fprog));
 	    __get_user(ptr, &fprog32->filter) ||
 	    __put_user(len, &kfprog->len) ||
 	    __put_user(compat_ptr(ptr), &kfprog->filter))
+		return NULL;
+	return kfprog;
+}
+EXPORT_SYMBOL_GPL(get_compat_bpf_fprog);
+static int do_set_attach_filter(struct socket *sock, int level, int optname,
+				char __user *optval, unsigned int optlen)
+{
+	struct sock_fprog __user *kfprog;
+	kfprog = get_compat_bpf_fprog(optval);
+	if (!kfprog)
 		return -EFAULT;
 	return sock_setsockopt(sock, level, optname, (char __user *)kfprog,
 static int compat_sock_setsockopt(struct socket *sock, int level, int optname,
 				char __user *optval, unsigned int optlen)
 {
-	if (optname == SO_ATTACH_FILTER)
+	if (optname == SO_ATTACH_FILTER ||
+	    optname == SO_ATTACH_REUSEPORT_CBPF)
 		return do_set_attach_filter(sock, level, optname,
 					    optval, optlen);
 	if (optname == SO_RCVTIMEO || optname == SO_SNDTIMEO)

net/core/gen_stats.c+2−0

  * @xstats_type: TLV type for backward compatibility xstats TLV
  * @lock: statistics lock
  * @d: dumping handle
+ * @padattr: padding attribute
  *
  * Initializes the dumping handle, grabs the statistic lock and appends
  * an empty TLV header to the socket buffer for use a container for all
  * @type: TLV type for top level statistic TLV
  * @lock: statistics lock
  * @d: dumping handle
+ * @padattr: padding attribute
  *
  * Initializes the dumping handle, grabs the statistic lock and appends
  * an empty TLV header to the socket buffer for use a container for all

net/core/net-sysfs.c+1−0

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	#include <linux/jiffies.h>	24	#include <linux/jiffies.h>
25	#include <linux/pm_runtime.h>	25	#include <linux/pm_runtime.h>
26	#include <linux/of.h>	26	#include <linux/of.h>
		27	#include <linux/of_net.h>
27		28
28	#include "net-sysfs.h"	29	#include "net-sysfs.h"
29		30

net/ipv4/udp.c+5−5

@@ -1618,12 +1618,12 @@ int udp_queue_rcv_skb(struct sock sk, struct sk_buff skb) · 1617 unmodified lines
1618	}	1618	}
1619	}	1619	}
1620		1620
1621	if (rcu_access_pointer(sk->sk_filter)) {	1621	if (rcu_access_pointer(sk->sk_filter) &&
1622	if (udp_lib_checksum_complete(skb))	1622	udp_lib_checksum_complete(skb))
1623	goto csum_error;	1623	goto csum_error;
1624	if (sk_filter(sk, skb))	1624
1625	goto drop;	1625	if (sk_filter(sk, skb))
1626	}	1626	goto drop;
1627		1627
1628	udp_csum_pull_header(skb);	1628	udp_csum_pull_header(skb);
1629	if (sk_rcvqueues_full(sk, sk->sk_rcvbuf)) {	1629	if (sk_rcvqueues_full(sk, sk->sk_rcvbuf)) {

net/ipv6/ip6_gre.c+3−0

 	if (ret)
 		return ret;
+	dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
 	tunnel = netdev_priv(dev);
 	ip6gre_tnl_link_config(tunnel, 1);
 	dev->features |= NETIF_F_NETNS_LOCAL;
 	dev->priv_flags &= ~IFF_TX_SKB_SHARING;
+	dev->priv_flags |= IFF_LIVE_ADDR_CHANGE;
 }
 static bool ip6gre_netlink_encap_parms(struct nlattr *data[],

net/ipv6/ip6_output.c+3−8

 					 const struct in6_addr *final_dst)
 {
 	struct dst_entry *dst = sk_dst_check(sk, inet6_sk(sk)->dst_cookie);
-	int err;
 	dst = ip6_sk_dst_check(sk, dst, fl6);
+	if (!dst)
+		dst = ip6_dst_lookup_flow(sk, fl6, final_dst);
-	err = ip6_dst_lookup_tail(sock_net(sk), sk, &dst, fl6);
+	return dst;
-	if (err)
-		return ERR_PTR(err);
-	if (final_dst)
-		fl6->daddr = *final_dst;
-	return xfrm_lookup_route(sock_net(sk), dst, flowi6_to_flowi(fl6), sk, 0);
 }
 EXPORT_SYMBOL_GPL(ip6_sk_dst_lookup_flow);

net/ipv6/netfilter/nf_dup_ipv6.c+1−0

@@ -33,6 +33,7 @@ static bool nf_dup_ipv6_route(struct net net, struct sk_buff skb, · 32 unmodified lines
33	fl6.daddr = *gw;	33	fl6.daddr = *gw;
34	fl6.flowlabel = (__force __be32)(((iph->flow_lbl[0] & 0xF) << 16) \|	34	fl6.flowlabel = (__force __be32)(((iph->flow_lbl[0] & 0xF) << 16) \|
35	(iph->flow_lbl[1] << 8) \| iph->flow_lbl[2]);	35	(iph->flow_lbl[1] << 8) \| iph->flow_lbl[2]);
		36	fl6.flowi6_flags = FLOWI_FLAG_KNOWN_NH;
36	dst = ip6_route_output(net, NULL, &fl6);	37	dst = ip6_route_output(net, NULL, &fl6);
37	if (dst->error) {	38	if (dst->error) {
38	dst_release(dst);	39	dst_release(dst);

net/ipv6/tcp_ipv6.c+3−1

 	destp = ntohs(inet->inet_dport);
 	srcp  = ntohs(inet->inet_sport);
-	if (icsk->icsk_pending == ICSK_TIME_RETRANS) {
+	if (icsk->icsk_pending == ICSK_TIME_RETRANS ||
+	    icsk->icsk_pending == ICSK_TIME_EARLY_RETRANS ||
+	    icsk->icsk_pending == ICSK_TIME_LOSS_PROBE) {
 		timer_active	= 1;
 		timer_expires	= icsk->icsk_timeout;
 	} else if (icsk->icsk_pending == ICSK_TIME_PROBE0) {

net/ipv6/udp.c+6−6

@@ -653,12 +653,12 @@ int udpv6_queue_rcv_skb(struct sock sk, struct sk_buff skb) · 652 unmodified lines
653	}	653	}
654	}	654	}
655		655
656	if (rcu_access_pointer(sk->sk_filter)) {	656	if (rcu_access_pointer(sk->sk_filter) &&
657	if (udp_lib_checksum_complete(skb))	657	udp_lib_checksum_complete(skb))
658	goto csum_error;	658	goto csum_error;
659	if (sk_filter(sk, skb))	659
660	goto drop;	660	if (sk_filter(sk, skb))
661	}	661	goto drop;
662		662
663	udp_csum_pull_header(skb);	663	udp_csum_pull_header(skb);
664	if (sk_rcvqueues_full(sk, sk->sk_rcvbuf)) {	664	if (sk_rcvqueues_full(sk, sk->sk_rcvbuf)) {

net/l2tp/l2tp_core.c+1−1

@@ -1581,7 +1581,7 @@ int l2tp_tunnel_create(struct net *net, int fd, int version, u32 tunnel_id, u32 · 1580 unmodified lines
1581	/* Mark socket as an encapsulation socket. See net/ipv4/udp.c */	1581	/* Mark socket as an encapsulation socket. See net/ipv4/udp.c */
1582	tunnel->encap = encap;	1582	tunnel->encap = encap;
1583	if (encap == L2TP_ENCAPTYPE_UDP) {	1583	if (encap == L2TP_ENCAPTYPE_UDP) {
1584	struct udp_tunnel_sock_cfg udp_cfg;	1584	struct udp_tunnel_sock_cfg udp_cfg = { };
1585		1585
1586	udp_cfg.sk_user_data = tunnel;	1586	udp_cfg.sk_user_data = tunnel;
1587	udp_cfg.encap_type = UDP_ENCAP_L2TPINUDP;	1587	udp_cfg.encap_type = UDP_ENCAP_L2TPINUDP;

net/mac80211/mesh.c+4−0

 		del_timer_sync(&sta->mesh->plink_timer);
 	}
+	/* make sure no readers can access nexthop sta from here on */
+	mesh_path_flush_by_nexthop(sta);
+	synchronize_net();
 	if (changed)
 		ieee80211_mbss_info_change_notify(sdata, changed);
 }

net/mac80211/sta_info.h+1−1

@@ -280,7 +280,7 @@ struct ieee80211_fast_tx { · 279 unmodified lines
280	u8 sa_offs, da_offs, pn_offs;	280	u8 sa_offs, da_offs, pn_offs;
281	u8 band;	281	u8 band;
282	u8 hdr[30 + 2 + IEEE80211_FAST_XMIT_MAX_IV +	282	u8 hdr[30 + 2 + IEEE80211_FAST_XMIT_MAX_IV +
283	sizeof(rfc1042_header)];	283	sizeof(rfc1042_header)] __aligned(2);
284		284
285	struct rcu_head rcu_head;	285	struct rcu_head rcu_head;
286	};	286	};

net/netfilter/ipvs/ip_vs_conn.c+3−2

  *	If available, return 1, otherwise invalidate this connection
  *	template and return 0.
  */
-int ip_vs_check_template(struct ip_vs_conn *ct)
+int ip_vs_check_template(struct ip_vs_conn *ct, struct ip_vs_dest *cdest)
 {
 	struct ip_vs_dest *dest = ct->dest;
 	struct netns_ipvs *ipvs = ct->ipvs;
 	 */
 	if ((dest == NULL) ||
 	    !(dest->flags & IP_VS_DEST_F_AVAILABLE) ||
-	    expire_quiescent_template(ipvs, dest)) {
+	    expire_quiescent_template(ipvs, dest) ||
+	    (cdest && (dest != cdest))) {
 		IP_VS_DBG_BUF(9, "check_template: dest not available for "
 			      "protocol %s s:%s:%d v:%s:%d "
 			      "-> d:%s:%d\n",

net/netfilter/ipvs/ip_vs_core.c+3−2

 	/* Check if a template already exists */
 	ct = ip_vs_ct_in_get(&param);
-	if (!ct || !ip_vs_check_template(ct)) {
+	if (!ct || !ip_vs_check_template(ct, NULL)) {
 		struct ip_vs_scheduler *sched;
 		/*
 						  vport, &param) < 0)
 			return NULL;
 		ct = ip_vs_ct_in_get(&param);
-		if (!ct) {
+		/* check if template exists and points to the same dest */
+		if (!ct || !ip_vs_check_template(ct, dest)) {
 			ct = ip_vs_conn_new(&param, dest->af, daddr, dport,
 					    IP_VS_CONN_F_TEMPLATE, dest, 0);
 			if (!ct) {

net/netfilter/nf_conntrack_ftp.c+1−0

@@ -632,6 +632,7 @@ static int __init nf_conntrack_ftp_init(void) · 631 unmodified lines
632	if (ret) {	632	if (ret) {
633	pr_err("failed to register helper for pf: %d port: %d\n",	633	pr_err("failed to register helper for pf: %d port: %d\n",
634	ftp[i][j].tuple.src.l3num, ports[i]);	634	ftp[i][j].tuple.src.l3num, ports[i]);
		635	ports_c = i;
635	nf_conntrack_ftp_fini();	636	nf_conntrack_ftp_fini();
636	return ret;	637	return ret;
637	}	638	}

net/netfilter/nf_conntrack_helper.c+4−5

 int nf_conntrack_helper_register(struct nf_conntrack_helper *me)
 {
-	int ret = 0;
+	struct nf_conntrack_tuple_mask mask = { .src.u.all = htons(0xFFFF) };
-	struct nf_conntrack_helper *cur;
 	unsigned int h = helper_hash(&me->tuple);
+	struct nf_conntrack_helper *cur;
+	int ret = 0;
 	BUG_ON(me->expect_policy == NULL);
 	BUG_ON(me->expect_class_max >= NF_CT_MAX_EXPECT_CLASSES);
 	mutex_lock(&nf_ct_helper_mutex);
 	hlist_for_each_entry(cur, &nf_ct_helper_hash[h], hnode) {
-		if (strncmp(cur->name, me->name, NF_CT_HELPER_NAME_LEN) == 0 &&
+		if (nf_ct_tuple_src_mask_cmp(&cur->tuple, &me->tuple, &mask)) {
-		    cur->tuple.src.l3num == me->tuple.src.l3num &&
-		    cur->tuple.dst.protonum == me->tuple.dst.protonum) {
 			ret = -EEXIST;
 			goto out;
 		}

net/netfilter/nf_conntrack_irc.c+1−0

@@ -271,6 +271,7 @@ static int __init nf_conntrack_irc_init(void) · 270 unmodified lines
271	if (ret) {	271	if (ret) {
272	pr_err("failed to register helper for pf: %u port: %u\n",	272	pr_err("failed to register helper for pf: %u port: %u\n",
273	irc[i].tuple.src.l3num, ports[i]);	273	irc[i].tuple.src.l3num, ports[i]);
		274	ports_c = i;
274	nf_conntrack_irc_fini();	275	nf_conntrack_irc_fini();
275	return ret;	276	return ret;
276	}	277	}

net/netfilter/nf_conntrack_sane.c+1−0

@@ -223,6 +223,7 @@ static int __init nf_conntrack_sane_init(void) · 222 unmodified lines
223	if (ret) {	223	if (ret) {
224	pr_err("failed to register helper for pf: %d port: %d\n",	224	pr_err("failed to register helper for pf: %d port: %d\n",
225	sane[i][j].tuple.src.l3num, ports[i]);	225	sane[i][j].tuple.src.l3num, ports[i]);
		226	ports_c = i;
226	nf_conntrack_sane_fini();	227	nf_conntrack_sane_fini();
227	return ret;	228	return ret;
228	}	229	}

net/netfilter/nf_conntrack_sip.c+1−0

@@ -1669,6 +1669,7 @@ static int __init nf_conntrack_sip_init(void) · 1668 unmodified lines
1669	if (ret) {	1669	if (ret) {
1670	pr_err("failed to register helper for pf: %u port: %u\n",	1670	pr_err("failed to register helper for pf: %u port: %u\n",
1671	sip[i][j].tuple.src.l3num, ports[i]);	1671	sip[i][j].tuple.src.l3num, ports[i]);
		1672	ports_c = i;
1672	nf_conntrack_sip_fini();	1673	nf_conntrack_sip_fini();
1673	return ret;	1674	return ret;
1674	}	1675	}

net/netfilter/nf_conntrack_standalone.c+0−2

@@ -487,8 +487,6 @@ static struct ctl_table nf_ct_sysctl_table[] = { · 486 unmodified lines
487	{ }	487	{ }
488	};	488	};
489		489
490	#define NET_NF_CONNTRACK_MAX 2089
491
492	static struct ctl_table nf_ct_netfilter_table[] = {	490	static struct ctl_table nf_ct_netfilter_table[] = {
493	{	491	{
494	.procname = "nf_conntrack_max",	492	.procname = "nf_conntrack_max",

net/netfilter/nf_conntrack_tftp.c+1−0

@@ -142,6 +142,7 @@ static int __init nf_conntrack_tftp_init(void) · 141 unmodified lines
142	if (ret) {	142	if (ret) {
143	pr_err("failed to register helper for pf: %u port: %u\n",	143	pr_err("failed to register helper for pf: %u port: %u\n",
144	tftp[i][j].tuple.src.l3num, ports[i]);	144	tftp[i][j].tuple.src.l3num, ports[i]);
		145	ports_c = i;
145	nf_conntrack_tftp_fini();	146	nf_conntrack_tftp_fini();
146	return ret;	147	return ret;
147	}	148	}

net/netfilter/nf_queue.c+8−9

  * Once the queue is registered it must reinject all packets it
  * receives, no matter what.
  */
-static const struct nf_queue_handler __rcu *queue_handler __read_mostly;
 /* return EBUSY when somebody else is registered, return EEXIST if the
  * same handler is registered, return 0 in case of success. */
-void nf_register_queue_handler(const struct nf_queue_handler *qh)
+void nf_register_queue_handler(struct net *net, const struct nf_queue_handler *qh)
 {
 	/* should never happen, we only have one queueing backend in kernel */
-	WARN_ON(rcu_access_pointer(queue_handler));
+	WARN_ON(rcu_access_pointer(net->nf.queue_handler));
-	rcu_assign_pointer(queue_handler, qh);
+	rcu_assign_pointer(net->nf.queue_handler, qh);
 }
 EXPORT_SYMBOL(nf_register_queue_handler);
 /* The caller must flush their queue before this */
-void nf_unregister_queue_handler(void)
+void nf_unregister_queue_handler(struct net *net)
 {
-	RCU_INIT_POINTER(queue_handler, NULL);
+	RCU_INIT_POINTER(net->nf.queue_handler, NULL);
-	synchronize_rcu();
 }
 EXPORT_SYMBOL(nf_unregister_queue_handler);
 	const struct nf_queue_handler *qh;
 	rcu_read_lock();
-	qh = rcu_dereference(queue_handler);
+	qh = rcu_dereference(net->nf.queue_handler);
 	if (qh)
 		qh->nf_hook_drop(net, ops);
 	rcu_read_unlock();
 	struct nf_queue_entry *entry = NULL;
 	const struct nf_afinfo *afinfo;
 	const struct nf_queue_handler *qh;
+	struct net *net = state->net;
 	/* QUEUE == DROP if no one is waiting, to be safe. */
-	qh = rcu_dereference(queue_handler);
+	qh = rcu_dereference(net->nf.queue_handler);
 	if (!qh) {
 		status = -ESRCH;
 		goto err;

net/netfilter/nf_tables_api.c+2−0

@@ -2647,6 +2647,8 @@ static int nf_tables_getset(struct net net, struct sock nlsk, · 2646 unmodified lines
2647	/* Only accept unspec with dump */	2647	/* Only accept unspec with dump */
2648	if (nfmsg->nfgen_family == NFPROTO_UNSPEC)	2648	if (nfmsg->nfgen_family == NFPROTO_UNSPEC)
2649	return -EAFNOSUPPORT;	2649	return -EAFNOSUPPORT;
		2650	if (!nla[NFTA_SET_TABLE])
		2651	return -EINVAL;
2650		2652
2651	set = nf_tables_set_lookup(ctx.table, nla[NFTA_SET_NAME]);	2653	set = nf_tables_set_lookup(ctx.table, nla[NFTA_SET_NAME]);
2652	if (IS_ERR(set))	2654	if (IS_ERR(set))

net/netfilter/nfnetlink_queue.c+13−7

 	if (entskb->tstamp.tv64) {
 		struct nfqnl_msg_packet_timestamp ts;
-		struct timespec64 kts = ktime_to_timespec64(skb->tstamp);
+		struct timespec64 kts = ktime_to_timespec64(entskb->tstamp);
 		ts.sec = cpu_to_be64(kts.tv_sec);
 		ts.usec = cpu_to_be64(kts.tv_nsec / NSEC_PER_USEC);
 			 net->nf.proc_netfilter, &nfqnl_file_ops))
 		return -ENOMEM;
 #endif
+	nf_register_queue_handler(net, &nfqh);
 	return 0;
 }
 static void __net_exit nfnl_queue_net_exit(struct net *net)
 {
+	nf_unregister_queue_handler(net);
 #ifdef CONFIG_PROC_FS
 	remove_proc_entry("nfnetlink_queue", net->nf.proc_netfilter);
 #endif
 }
+static void nfnl_queue_net_exit_batch(struct list_head *net_exit_list)
+{
+	synchronize_rcu();
+}
 static struct pernet_operations nfnl_queue_net_ops = {
-	.init	= nfnl_queue_net_init,
+	.init		= nfnl_queue_net_init,
-	.exit	= nfnl_queue_net_exit,
+	.exit		= nfnl_queue_net_exit,
-	.id	= &nfnl_queue_net_id,
+	.exit_batch	= nfnl_queue_net_exit_batch,
-	.size	= sizeof(struct nfnl_queue_net),
+	.id		= &nfnl_queue_net_id,
+	.size		= sizeof(struct nfnl_queue_net),
 };
 static int __init nfnetlink_queue_init(void)
 	}
 	register_netdevice_notifier(&nfqnl_dev_notifier);
-	nf_register_queue_handler(&nfqh);
 	return status;
 cleanup_netlink_notifier:
 static void __exit nfnetlink_queue_fini(void)
 {
-	nf_unregister_queue_handler();
 	unregister_netdevice_notifier(&nfqnl_dev_notifier);
 	nfnetlink_subsys_unregister(&nfqnl_subsys);
 	netlink_unregister_notifier(&nfqnl_rtnl_notifier);

net/netfilter/x_tables.c+2−2

@@ -612,7 +612,7 @@ int xt_compat_check_entry_offsets(const void base, const char elems, · 611 unmodified lines
612	return -EINVAL;	612	return -EINVAL;
613		613
614	if (strcmp(t->u.user.name, XT_STANDARD_TARGET) == 0 &&	614	if (strcmp(t->u.user.name, XT_STANDARD_TARGET) == 0 &&
615	target_offset + sizeof(struct compat_xt_standard_target) != next_offset)	615	COMPAT_XT_ALIGN(target_offset + sizeof(struct compat_xt_standard_target)) != next_offset)
616	return -EINVAL;	616	return -EINVAL;
617		617
618	/* compat_xt_entry match has less strict aligment requirements,	618	/* compat_xt_entry match has less strict aligment requirements,
@@ -694,7 +694,7 @@ int xt_check_entry_offsets(const void *base, · 75 unmodified lines
694	return -EINVAL;	694	return -EINVAL;
695		695
696	if (strcmp(t->u.user.name, XT_STANDARD_TARGET) == 0 &&	696	if (strcmp(t->u.user.name, XT_STANDARD_TARGET) == 0 &&
697	target_offset + sizeof(struct xt_standard_target) != next_offset)	697	XT_ALIGN(target_offset + sizeof(struct xt_standard_target)) != next_offset)
698	return -EINVAL;	698	return -EINVAL;
699		699
700	return xt_check_entry_match(elems, base + target_offset,	700	return xt_check_entry_match(elems, base + target_offset,

net/packet/af_packet.c+25−0

@@ -93,6 +93,7 @@ · 92 unmodified lines
93	#include <net/inet_common.h>	93	#include <net/inet_common.h>
94	#endif	94	#endif
95	#include <linux/bpf.h>	95	#include <linux/bpf.h>
		96	#include <net/compat.h>
96		97
97	#include "internal.h"	98	#include "internal.h"
98		99
@@ -3940,6 +3941,27 @@ static int packet_getsockopt(struct socket *sock, int level, int optname, · 3841 unmodified lines
3940	}	3941	}
3941		3942
3942		3943
		3944	#ifdef CONFIG_COMPAT
		3945	static int compat_packet_setsockopt(struct socket *sock, int level, int optname,
		3946	char __user *optval, unsigned int optlen)
		3947	{
		3948	struct packet_sock *po = pkt_sk(sock->sk);
		3949
		3950	if (level != SOL_PACKET)
		3951	return -ENOPROTOOPT;
		3952
		3953	if (optname == PACKET_FANOUT_DATA &&
		3954	po->fanout && po->fanout->type == PACKET_FANOUT_CBPF) {
		3955	optval = (char __user *)get_compat_bpf_fprog(optval);
		3956	if (!optval)
		3957	return -EFAULT;
		3958	optlen = sizeof(struct sock_fprog);
		3959	}
		3960
		3961	return packet_setsockopt(sock, level, optname, optval, optlen);
		3962	}
		3963	#endif
		3964
3943	static int packet_notifier(struct notifier_block *this,	3965	static int packet_notifier(struct notifier_block *this,
3944	unsigned long msg, void *ptr)	3966	unsigned long msg, void *ptr)
3945	{	3967	{
@@ -4416,6 +4438,9 @@ static const struct proto_ops packet_ops = { · 470 unmodified lines
4416	.shutdown = sock_no_shutdown,	4438	.shutdown = sock_no_shutdown,
4417	.setsockopt = packet_setsockopt,	4439	.setsockopt = packet_setsockopt,
4418	.getsockopt = packet_getsockopt,	4440	.getsockopt = packet_getsockopt,
		4441	#ifdef CONFIG_COMPAT
		4442	.compat_setsockopt = compat_packet_setsockopt,
		4443	#endif
4419	.sendmsg = packet_sendmsg,	4444	.sendmsg = packet_sendmsg,
4420	.recvmsg = packet_recvmsg,	4445	.recvmsg = packet_recvmsg,
4421	.mmap = packet_mmap,	4446	.mmap = packet_mmap,

net/rds/rds.h+2−0

 	RDS_CONN_CONNECTING,
 	RDS_CONN_DISCONNECTING,
 	RDS_CONN_UP,
+	RDS_CONN_RESETTING,
 	RDS_CONN_ERROR,
 };
 void rds_shutdown_worker(struct work_struct *);
 void rds_send_worker(struct work_struct *);
 void rds_recv_worker(struct work_struct *);
+void rds_connect_path_complete(struct rds_connection *conn, int curr);
 void rds_connect_complete(struct rds_connection *conn);
 /* transport.c */

net/rds/recv.c+2−0

@@ -561,5 +561,7 @@ void rds_inc_info_copy(struct rds_incoming *inc, · 560 unmodified lines
561	minfo.fport = inc->i_hdr.h_dport;	561	minfo.fport = inc->i_hdr.h_dport;
562	}	562	}
563		563
		564	minfo.flags = 0;
		565
564	rds_info_copy(iter, &minfo, sizeof(minfo));	566	rds_info_copy(iter, &minfo, sizeof(minfo));
565	}	567	}

net/rds/send.c+1−0

@@ -99,6 +99,7 @@ void rds_send_reset(struct rds_connection *conn) · 98 unmodified lines
99	list_splice_init(&conn->c_retrans, &conn->c_send_queue);	99	list_splice_init(&conn->c_retrans, &conn->c_send_queue);
100	spin_unlock_irqrestore(&conn->c_lock, flags);	100	spin_unlock_irqrestore(&conn->c_lock, flags);
101	}	101	}
		102	EXPORT_SYMBOL_GPL(rds_send_reset);
102		103
103	static int acquire_in_xmit(struct rds_connection *conn)	104	static int acquire_in_xmit(struct rds_connection *conn)
104	{	105	{

net/rds/tcp.c+75−3

@@ -126,9 +126,81 @@ void rds_tcp_restore_callbacks(struct socket *sock, · 125 unmodified lines
126	}	126	}
127		127
128	/*	128	/*
129	* This is the only path that sets tc->t_sock. Send and receive trust that	129	* rds_tcp_reset_callbacks() switches the to the new sock and
130	* it is set. The RDS_CONN_UP bit protects those paths from being	130	* returns the existing tc->t_sock.
131	* called while it isn't set.	131	*
		132	* The only functions that set tc->t_sock are rds_tcp_set_callbacks
		133	* and rds_tcp_reset_callbacks. Send and receive trust that
		134	* it is set. The absence of RDS_CONN_UP bit protects those paths
		135	* from being called while it isn't set.
		136	*/
		137	void rds_tcp_reset_callbacks(struct socket *sock,
		138	struct rds_connection *conn)
		139	{
		140	struct rds_tcp_connection *tc = conn->c_transport_data;
		141	struct socket *osock = tc->t_sock;
		142
		143	if (!osock)
		144	goto newsock;
		145
		146	/* Need to resolve a duelling SYN between peers.
		147	* We have an outstanding SYN to this peer, which may
		148	* potentially have transitioned to the RDS_CONN_UP state,
		149	* so we must quiesce any send threads before resetting
		150	* c_transport_data. We quiesce these threads by setting
		151	* c_state to something other than RDS_CONN_UP, and then
		152	* waiting for any existing threads in rds_send_xmit to
		153	* complete release_in_xmit(). (Subsequent threads entering
		154	* rds_send_xmit() will bail on !rds_conn_up().
		155	*
		156	* However an incoming syn-ack at this point would end up
		157	* marking the conn as RDS_CONN_UP, and would again permit
		158	* rds_send_xmi() threads through, so ideally we would
		159	* synchronize on RDS_CONN_UP after lock_sock(), but cannot
		160	* do that: waiting on !RDS_IN_XMIT after lock_sock() may
		161	* end up deadlocking with tcp_sendmsg(), and the RDS_IN_XMIT
		162	* would not get set. As a result, we set c_state to
		163	* RDS_CONN_RESETTTING, to ensure that rds_tcp_state_change
		164	* cannot mark rds_conn_path_up() in the window before lock_sock()
		165	*/
		166	atomic_set(&conn->c_state, RDS_CONN_RESETTING);
		167	wait_event(conn->c_waitq, !test_bit(RDS_IN_XMIT, &conn->c_flags));
		168	lock_sock(osock->sk);
		169	/* reset receive side state for rds_tcp_data_recv() for osock */
		170	if (tc->t_tinc) {
		171	rds_inc_put(&tc->t_tinc->ti_inc);
		172	tc->t_tinc = NULL;
		173	}
		174	tc->t_tinc_hdr_rem = sizeof(struct rds_header);
		175	tc->t_tinc_data_rem = 0;
		176	tc->t_sock = NULL;
		177
		178	write_lock_bh(&osock->sk->sk_callback_lock);
		179
		180	osock->sk->sk_user_data = NULL;
		181	osock->sk->sk_data_ready = tc->t_orig_data_ready;
		182	osock->sk->sk_write_space = tc->t_orig_write_space;
		183	osock->sk->sk_state_change = tc->t_orig_state_change;
		184	write_unlock_bh(&osock->sk->sk_callback_lock);
		185	release_sock(osock->sk);
		186	sock_release(osock);
		187	newsock:
		188	rds_send_reset(conn);
		189	lock_sock(sock->sk);
		190	write_lock_bh(&sock->sk->sk_callback_lock);
		191	tc->t_sock = sock;
		192	sock->sk->sk_user_data = conn;
		193	sock->sk->sk_data_ready = rds_tcp_data_ready;
		194	sock->sk->sk_write_space = rds_tcp_write_space;
		195	sock->sk->sk_state_change = rds_tcp_state_change;
		196
		197	write_unlock_bh(&sock->sk->sk_callback_lock);
		198	release_sock(sock->sk);
		199	}
		200
		201	/* Add tc to rds_tcp_tc_list and set tc->t_sock. See comments
		202	* above rds_tcp_reset_callbacks for notes about synchronization
		203	* with data path
132	*/	204	*/
133	void rds_tcp_set_callbacks(struct socket sock, struct rds_connection conn)	205	void rds_tcp_set_callbacks(struct socket sock, struct rds_connection conn)
134	{	206	{

net/rds/tcp.h+1−0

@@ -50,6 +50,7 @@ struct rds_tcp_statistics { · 49 unmodified lines
50	void rds_tcp_tune(struct socket *sock);	50	void rds_tcp_tune(struct socket *sock);
51	void rds_tcp_nonagle(struct socket *sock);	51	void rds_tcp_nonagle(struct socket *sock);
52	void rds_tcp_set_callbacks(struct socket sock, struct rds_connection conn);	52	void rds_tcp_set_callbacks(struct socket sock, struct rds_connection conn);
		53	void rds_tcp_reset_callbacks(struct socket sock, struct rds_connection conn);
53	void rds_tcp_restore_callbacks(struct socket *sock,	54	void rds_tcp_restore_callbacks(struct socket *sock,
54	struct rds_tcp_connection *tc);	55	struct rds_tcp_connection *tc);
55	u32 rds_tcp_snd_nxt(struct rds_tcp_connection *tc);	56	u32 rds_tcp_snd_nxt(struct rds_tcp_connection *tc);

net/rds/tcp_connect.c+1−1

@@ -60,7 +60,7 @@ void rds_tcp_state_change(struct sock *sk) · 59 unmodified lines
60	case TCP_SYN_RECV:	60	case TCP_SYN_RECV:
61	break;	61	break;
62	case TCP_ESTABLISHED:	62	case TCP_ESTABLISHED:
63	rds_connect_complete(conn);	63	rds_connect_path_complete(conn, RDS_CONN_CONNECTING);
64	break;	64	break;
65	case TCP_CLOSE_WAIT:	65	case TCP_CLOSE_WAIT:
66	case TCP_CLOSE:	66	case TCP_CLOSE:

net/rds/tcp_listen.c+7−13

 	struct inet_sock *inet;
 	struct rds_tcp_connection *rs_tcp = NULL;
 	int conn_state;
-	struct sock *nsk;
 	if (!sock) /* module unload or netns delete in progress */
 		return -ENETUNREACH;
 		    !conn->c_outgoing) {
 			goto rst_nsk;
 		} else {
-			atomic_set(&conn->c_state, RDS_CONN_CONNECTING);
+			rds_tcp_reset_callbacks(new_sock, conn);
-			wait_event(conn->c_waitq,
-				   !test_bit(RDS_IN_XMIT, &conn->c_flags));
-			rds_tcp_restore_callbacks(rs_tcp->t_sock, rs_tcp);
 			conn->c_outgoing = 0;
+			/* rds_connect_path_complete() marks RDS_CONN_UP */
+			rds_connect_path_complete(conn, RDS_CONN_DISCONNECTING);
 		}
+	} else {
+		rds_tcp_set_callbacks(new_sock, conn);
+		rds_connect_path_complete(conn, RDS_CONN_CONNECTING);
 	}
-	rds_tcp_set_callbacks(new_sock, conn);
-	rds_connect_complete(conn); /* marks RDS_CONN_UP */
 	new_sock = NULL;
 	ret = 0;
 	goto out;
 rst_nsk:
 	/* reset the newly returned accept sock and bail */
-	nsk = new_sock->sk;
+	kernel_sock_shutdown(new_sock, SHUT_RDWR);
-	rds_tcp_stats_inc(s_tcp_listen_closed_stale);
-	nsk->sk_user_data = NULL;
-	nsk->sk_prot->disconnect(nsk, 0);
-	tcp_done(nsk);
-	new_sock = NULL;
 	ret = 0;
 out:
 	if (rs_tcp)

net/rds/threads.c+8−2

 struct workqueue_struct *rds_wq;
 EXPORT_SYMBOL_GPL(rds_wq);
-void rds_connect_complete(struct rds_connection *conn)
+void rds_connect_path_complete(struct rds_connection *conn, int curr)
 {
-	if (!rds_conn_transition(conn, RDS_CONN_CONNECTING, RDS_CONN_UP)) {
+	if (!rds_conn_transition(conn, curr, RDS_CONN_UP)) {
 		printk(KERN_WARNING "%s: Cannot transition to state UP, "
 				"current state is %d\n",
 				__func__,
 	queue_delayed_work(rds_wq, &conn->c_send_w, 0);
 	queue_delayed_work(rds_wq, &conn->c_recv_w, 0);
 }
+EXPORT_SYMBOL_GPL(rds_connect_path_complete);
+void rds_connect_complete(struct rds_connection *conn)
+{
+	rds_connect_path_complete(conn, RDS_CONN_CONNECTING);
+}
 EXPORT_SYMBOL_GPL(rds_connect_complete);
 /*

net/rxrpc/rxkad.c+1−3

 	/* pin the cipher we need so that the crypto layer doesn't invoke
 	 * keventd to go get it */
 	rxkad_ci = crypto_alloc_skcipher("pcbc(fcrypt)", 0, CRYPTO_ALG_ASYNC);
-	if (IS_ERR(rxkad_ci))
+	return PTR_ERR_OR_ZERO(rxkad_ci);
-		return PTR_ERR(rxkad_ci);
-	return 0;
 }
 /*

net/sched/act_police.c+11−22

 	bool			peak_present;
 };
 #define to_police(pc)	\
-	container_of(pc, struct tcf_police, common)
+	container_of(pc->priv, struct tcf_police, common)
 #define POL_TAB_MASK     15
 				 struct nlattr *est, struct tc_action *a,
 				 int ovr, int bind)
 {
-	unsigned int h;
 	int ret = 0, err;
 	struct nlattr *tb[TCA_POLICE_MAX + 1];
 	struct tc_police *parm;
 	struct tcf_police *police;
 	struct qdisc_rate_table *R_tab = NULL, *P_tab = NULL;
 	struct tc_action_net *tn = net_generic(net, police_net_id);
-	struct tcf_hashinfo *hinfo = tn->hinfo;
 	int size;
 	if (nla == NULL)
 	if (parm->index) {
 		if (tcf_hash_search(tn, a, parm->index)) {
-			police = to_police(a->priv);
+			police = to_police(a);
 			if (bind) {
 				police->tcf_bindcnt += 1;
 				police->tcf_refcnt += 1;
 			/* not replacing */
 			return -EEXIST;
 		}
+	} else {
+		ret = tcf_hash_create(tn, parm->index, NULL, a,
+				      sizeof(*police), bind, false);
+		if (ret)
+			return ret;
+		ret = ACT_P_CREATED;
 	}
-	police = kzalloc(sizeof(*police), GFP_KERNEL);
+	police = to_police(a);
-	if (police == NULL)
-		return -ENOMEM;
-	ret = ACT_P_CREATED;
-	police->tcf_refcnt = 1;
-	spin_lock_init(&police->tcf_lock);
-	if (bind)
-		police->tcf_bindcnt = 1;
 override:
 	if (parm->rate.rate) {
 		err = -ENOMEM;
 		return ret;
 	police->tcfp_t_c = ktime_get_ns();
-	police->tcf_index = parm->index ? parm->index :
+	tcf_hash_insert(tn, a);
-		tcf_hash_new_index(tn);
-	police->tcf_tm.install = jiffies;
-	police->tcf_tm.lastuse = jiffies;
-	h = tcf_hash(police->tcf_index, POL_TAB_MASK);
-	spin_lock_bh(&hinfo->lock);
-	hlist_add_head(&police->tcf_head, &hinfo->htab[h]);
-	spin_unlock_bh(&hinfo->lock);
-	a->priv = police;
 	return ret;
 failure_unlock:
 	qdisc_put_rtab(P_tab);
 	qdisc_put_rtab(R_tab);
 	if (ret == ACT_P_CREATED)
-		kfree(police);
+		tcf_hash_cleanup(a, est);
 	return err;
 }

net/sched/cls_flower.c+3−3

@@ -171,7 +171,7 @@ static void fl_hw_destroy_filter(struct tcf_proto *tp, unsigned long cookie) · 170 unmodified lines
171	struct tc_cls_flower_offload offload = {0};	171	struct tc_cls_flower_offload offload = {0};
172	struct tc_to_netdev tc;	172	struct tc_to_netdev tc;
173		173
174	if (!tc_should_offload(dev, 0))	174	if (!tc_should_offload(dev, tp, 0))
175	return;	175	return;
176		176
177	offload.command = TC_CLSFLOWER_DESTROY;	177	offload.command = TC_CLSFLOWER_DESTROY;
@@ -194,7 +194,7 @@ static void fl_hw_replace_filter(struct tcf_proto *tp, · 16 unmodified lines
194	struct tc_cls_flower_offload offload = {0};	194	struct tc_cls_flower_offload offload = {0};
195	struct tc_to_netdev tc;	195	struct tc_to_netdev tc;
196		196
197	if (!tc_should_offload(dev, flags))	197	if (!tc_should_offload(dev, tp, flags))
198	return;	198	return;
199		199
200	offload.command = TC_CLSFLOWER_REPLACE;	200	offload.command = TC_CLSFLOWER_REPLACE;
@@ -216,7 +216,7 @@ static void fl_hw_update_stats(struct tcf_proto tp, struct cls_fl_filter f) · 15 unmodified lines
216	struct tc_cls_flower_offload offload = {0};	216	struct tc_cls_flower_offload offload = {0};
217	struct tc_to_netdev tc;	217	struct tc_to_netdev tc;
218		218
219	if (!tc_should_offload(dev, 0))	219	if (!tc_should_offload(dev, tp, 0))
220	return;	220	return;
221		221
222	offload.command = TC_CLSFLOWER_STATS;	222	offload.command = TC_CLSFLOWER_STATS;

net/sched/cls_u32.c+40−32

@@ -440,7 +440,7 @@ static void u32_remove_hw_knode(struct tcf_proto *tp, u32 handle) · 439 unmodified lines
440	offload.type = TC_SETUP_CLSU32;	440	offload.type = TC_SETUP_CLSU32;
441	offload.cls_u32 = &u32_offload;	441	offload.cls_u32 = &u32_offload;
442		442
443	if (tc_should_offload(dev, 0)) {	443	if (tc_should_offload(dev, tp, 0)) {
444	offload.cls_u32->command = TC_CLSU32_DELETE_KNODE;	444	offload.cls_u32->command = TC_CLSU32_DELETE_KNODE;
445	offload.cls_u32->knode.handle = handle;	445	offload.cls_u32->knode.handle = handle;
446	dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,	446	dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,
@@ -457,20 +457,21 @@ static int u32_replace_hw_hnode(struct tcf_proto *tp, · 10 unmodified lines
457	struct tc_to_netdev offload;	457	struct tc_to_netdev offload;
458	int err;	458	int err;
459		459
		460	if (!tc_should_offload(dev, tp, flags))
		461	return tc_skip_sw(flags) ? -EINVAL : 0;
		462
460	offload.type = TC_SETUP_CLSU32;	463	offload.type = TC_SETUP_CLSU32;
461	offload.cls_u32 = &u32_offload;	464	offload.cls_u32 = &u32_offload;
462		465
463	if (tc_should_offload(dev, flags)) {	466	offload.cls_u32->command = TC_CLSU32_NEW_HNODE;
464	offload.cls_u32->command = TC_CLSU32_NEW_HNODE;	467	offload.cls_u32->hnode.divisor = h->divisor;
465	offload.cls_u32->hnode.divisor = h->divisor;	468	offload.cls_u32->hnode.handle = h->handle;
466	offload.cls_u32->hnode.handle = h->handle;	469	offload.cls_u32->hnode.prio = h->prio;
467	offload.cls_u32->hnode.prio = h->prio;
468		470
469	err = dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,	471	err = dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,
470	tp->protocol, &offload);	472	tp->protocol, &offload);
471	if (tc_skip_sw(flags))	473	if (tc_skip_sw(flags))
472	return err;	474	return err;
473	}
474		475
475	return 0;	476	return 0;
476	}	477	}
@@ -484,7 +485,7 @@ static void u32_clear_hw_hnode(struct tcf_proto tp, struct tc_u_hnode h) · 7 unmodified lines
484	offload.type = TC_SETUP_CLSU32;	485	offload.type = TC_SETUP_CLSU32;
485	offload.cls_u32 = &u32_offload;	486	offload.cls_u32 = &u32_offload;
486		487
487	if (tc_should_offload(dev, 0)) {	488	if (tc_should_offload(dev, tp, 0)) {
488	offload.cls_u32->command = TC_CLSU32_DELETE_HNODE;	489	offload.cls_u32->command = TC_CLSU32_DELETE_HNODE;
489	offload.cls_u32->hnode.divisor = h->divisor;	490	offload.cls_u32->hnode.divisor = h->divisor;
490	offload.cls_u32->hnode.handle = h->handle;	491	offload.cls_u32->hnode.handle = h->handle;
@@ -507,27 +508,28 @@ static int u32_replace_hw_knode(struct tcf_proto *tp, · 16 unmodified lines
507	offload.type = TC_SETUP_CLSU32;	508	offload.type = TC_SETUP_CLSU32;
508	offload.cls_u32 = &u32_offload;	509	offload.cls_u32 = &u32_offload;
509		510
510	if (tc_should_offload(dev, flags)) {	511	if (!tc_should_offload(dev, tp, flags))
511	offload.cls_u32->command = TC_CLSU32_REPLACE_KNODE;	512	return tc_skip_sw(flags) ? -EINVAL : 0;
512	offload.cls_u32->knode.handle = n->handle;	513
513	offload.cls_u32->knode.fshift = n->fshift;	514	offload.cls_u32->command = TC_CLSU32_REPLACE_KNODE;
		515	offload.cls_u32->knode.handle = n->handle;
		516	offload.cls_u32->knode.fshift = n->fshift;
514	#ifdef CONFIG_CLS_U32_MARK	517	#ifdef CONFIG_CLS_U32_MARK
515	offload.cls_u32->knode.val = n->val;	518	offload.cls_u32->knode.val = n->val;
516	offload.cls_u32->knode.mask = n->mask;	519	offload.cls_u32->knode.mask = n->mask;
517	#else	520	#else
518	offload.cls_u32->knode.val = 0;	521	offload.cls_u32->knode.val = 0;
519	offload.cls_u32->knode.mask = 0;	522	offload.cls_u32->knode.mask = 0;
520	#endif	523	#endif
521	offload.cls_u32->knode.sel = &n->sel;	524	offload.cls_u32->knode.sel = &n->sel;
522	offload.cls_u32->knode.exts = &n->exts;	525	offload.cls_u32->knode.exts = &n->exts;
523	if (n->ht_down)	526	if (n->ht_down)
524	offload.cls_u32->knode.link_handle = n->ht_down->handle;	527	offload.cls_u32->knode.link_handle = n->ht_down->handle;
525		528
526	err = dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,	529	err = dev->netdev_ops->ndo_setup_tc(dev, tp->q->handle,
527	tp->protocol, &offload);	530	tp->protocol, &offload);
528	if (tc_skip_sw(flags))	531	if (tc_skip_sw(flags))
529	return err;	532	return err;
530	}
531		533
532	return 0;	534	return 0;
533	}	535	}
@@ -863,7 +865,7 @@ static int u32_change(struct net net, struct sk_buff in_skb, · 329 unmodified lines
863	if (tb[TCA_U32_FLAGS]) {	865	if (tb[TCA_U32_FLAGS]) {
864	flags = nla_get_u32(tb[TCA_U32_FLAGS]);	866	flags = nla_get_u32(tb[TCA_U32_FLAGS]);
865	if (!tc_flags_valid(flags))	867	if (!tc_flags_valid(flags))
866	return err;	868	return -EINVAL;
867	}	869	}
868		870
869	n = (struct tc_u_knode )arg;	871	n = (struct tc_u_knode )arg;
@@ -921,11 +923,17 @@ static int u32_change(struct net net, struct sk_buff in_skb, · 51 unmodified lines
921	ht->divisor = divisor;	923	ht->divisor = divisor;
922	ht->handle = handle;	924	ht->handle = handle;
923	ht->prio = tp->prio;	925	ht->prio = tp->prio;
		926
		927	err = u32_replace_hw_hnode(tp, ht, flags);
		928	if (err) {
		929	kfree(ht);
		930	return err;
		931	}
		932
924	RCU_INIT_POINTER(ht->next, tp_c->hlist);	933	RCU_INIT_POINTER(ht->next, tp_c->hlist);
925	rcu_assign_pointer(tp_c->hlist, ht);	934	rcu_assign_pointer(tp_c->hlist, ht);
926	*arg = (unsigned long)ht;	935	*arg = (unsigned long)ht;
927		936
928	u32_replace_hw_hnode(tp, ht, flags);
929	return 0;	937	return 0;
930	}	938	}
931		939

net/sched/sch_drr.c+4−0

 		cl->deficit = cl->quantum;
 	}
+	qdisc_qstats_backlog_inc(sch, skb);
 	sch->q.qlen++;
 	return err;
 }
 			bstats_update(&cl->bstats, skb);
 			qdisc_bstats_update(sch, skb);
+			qdisc_qstats_backlog_dec(sch, skb);
 			sch->q.qlen--;
 			return skb;
 		}
 		if (cl->qdisc->ops->drop) {
 			len = cl->qdisc->ops->drop(cl->qdisc);
 			if (len > 0) {
+				sch->qstats.backlog -= len;
 				sch->q.qlen--;
 				if (cl->qdisc->q.qlen == 0)
 					list_del(&cl->alist);
 			qdisc_reset(cl->qdisc);
 		}
 	}
+	sch->qstats.backlog = 0;
 	sch->q.qlen = 0;
 }

net/sched/sch_fq_codel.c+19−7

 	unsigned int idx, prev_backlog, prev_qlen;
 	struct fq_codel_flow *flow;
 	int uninitialized_var(ret);
+	unsigned int pkt_len;
 	bool memory_limited;
 	idx = fq_codel_classify(skb, sch, &ret);
 	prev_backlog = sch->qstats.backlog;
 	prev_qlen = sch->q.qlen;
+	/* save this packet length as it might be dropped by fq_codel_drop() */
+	pkt_len = qdisc_pkt_len(skb);
 	/* fq_codel_drop() is quite expensive, as it performs a linear search
 	 * in q->backlogs[] to find a fat flow.
 	 * So instead of dropping a single packet, drop half of its backlog
 	 */
 	ret = fq_codel_drop(sch, q->drop_batch_size);
-	q->drop_overlimit += prev_qlen - sch->q.qlen;
+	prev_qlen -= sch->q.qlen;
+	prev_backlog -= sch->qstats.backlog;
+	q->drop_overlimit += prev_qlen;
 	if (memory_limited)
-		q->drop_overmemory += prev_qlen - sch->q.qlen;
+		q->drop_overmemory += prev_qlen;
-	/* As we dropped packet(s), better let upper stack know this */
-	qdisc_tree_reduce_backlog(sch, prev_qlen - sch->q.qlen,
-				  prev_backlog - sch->qstats.backlog);
-	return ret == idx ? NET_XMIT_CN : NET_XMIT_SUCCESS;
+	/* As we dropped packet(s), better let upper stack know this.
+	 * If we dropped a packet for this flow, return NET_XMIT_CN,
+	 * but in this case, our parents wont increase their backlogs.
+	 */
+	if (ret == idx) {
+		qdisc_tree_reduce_backlog(sch, prev_qlen - 1,
+					  prev_backlog - pkt_len);
+		return NET_XMIT_CN;
+	}
+	qdisc_tree_reduce_backlog(sch, prev_qlen, prev_backlog);
+	return NET_XMIT_SUCCESS;
 }
 /* This is the specific function called from codel_dequeue()
 		qs.backlog = q->backlogs[idx];
 		qs.drops = flow->dropped;
 	}
-	if (gnet_stats_copy_queue(d, NULL, &qs, 0) < 0)
+	if (gnet_stats_copy_queue(d, NULL, &qs, qs.qlen) < 0)
 		return -1;
 	if (idx < q->flows_cnt)
 		return gnet_stats_copy_app(d, &xstats, sizeof(xstats));

net/sched/sch_generic.c+2−0

 {
 	q->gso_skb = skb;
 	q->qstats.requeues++;
+	qdisc_qstats_backlog_inc(q, skb);
 	q->q.qlen++;	/* it's still part of the queue */
 	__netif_schedule(q);
 		txq = skb_get_tx_queue(txq->dev, skb);
 		if (!netif_xmit_frozen_or_stopped(txq)) {
 			q->gso_skb = NULL;
+			qdisc_qstats_backlog_dec(q, skb);
 			q->q.qlen--;
 		} else
 			skb = NULL;

net/sched/sch_hfsc.c+4−8

 	q->eligible = RB_ROOT;
 	INIT_LIST_HEAD(&q->droplist);
 	qdisc_watchdog_cancel(&q->watchdog);
+	sch->qstats.backlog = 0;
 	sch->q.qlen = 0;
 }
 	struct hfsc_sched *q = qdisc_priv(sch);
 	unsigned char *b = skb_tail_pointer(skb);
 	struct tc_hfsc_qopt qopt;
-	struct hfsc_class *cl;
-	unsigned int i;
-	sch->qstats.backlog = 0;
-	for (i = 0; i < q->clhash.hashsize; i++) {
-		hlist_for_each_entry(cl, &q->clhash.hash[i], cl_common.hnode)
-			sch->qstats.backlog += cl->qdisc->qstats.backlog;
-	}
 	qopt.defcls = q->defcls;
 	if (nla_put(skb, TCA_OPTIONS, sizeof(qopt), &qopt))
 	if (cl->qdisc->q.qlen == 1)
 		set_active(cl, qdisc_pkt_len(skb));
+	qdisc_qstats_backlog_inc(sch, skb);
 	sch->q.qlen++;
 	return NET_XMIT_SUCCESS;
 	qdisc_unthrottled(sch);
 	qdisc_bstats_update(sch, skb);
+	qdisc_qstats_backlog_dec(sch, skb);
 	sch->q.qlen--;
 	return skb;
 			}
 			cl->qstats.drops++;
 			qdisc_qstats_drop(sch);
+			sch->qstats.backlog -= len;
 			sch->q.qlen--;
 			return len;
 		}

net/sched/sch_ingress.c+12−0

 	return TC_H_MIN(classid) + 1;
 }
+static bool ingress_cl_offload(u32 classid)
+{
+	return true;
+}
 static unsigned long ingress_bind_filter(struct Qdisc *sch,
 					 unsigned long parent, u32 classid)
 {
 	.put		=	ingress_put,
 	.walk		=	ingress_walk,
 	.tcf_chain	=	ingress_find_tcf,
+	.tcf_cl_offload	=	ingress_cl_offload,
 	.bind_tcf	=	ingress_bind_filter,
 	.unbind_tcf	=	ingress_put,
 };
 	}
 }
+static bool clsact_cl_offload(u32 classid)
+{
+	return TC_H_MIN(classid) == TC_H_MIN(TC_H_MIN_INGRESS);
+}
 static unsigned long clsact_bind_filter(struct Qdisc *sch,
 					unsigned long parent, u32 classid)
 {
 	.put		=	ingress_put,
 	.walk		=	ingress_walk,
 	.tcf_chain	=	clsact_find_tcf,
+	.tcf_cl_offload	=	clsact_cl_offload,
 	.bind_tcf	=	clsact_bind_filter,
 	.unbind_tcf	=	ingress_put,
 };

net/sched/sch_prio.c+4−0

 	ret = qdisc_enqueue(skb, qdisc);
 	if (ret == NET_XMIT_SUCCESS) {
+		qdisc_qstats_backlog_inc(sch, skb);
 		sch->q.qlen++;
 		return NET_XMIT_SUCCESS;
 	}
 		struct sk_buff *skb = qdisc_dequeue_peeked(qdisc);
 		if (skb) {
 			qdisc_bstats_update(sch, skb);
+			qdisc_qstats_backlog_dec(sch, skb);
 			sch->q.qlen--;
 			return skb;
 		}
 	for (prio = q->bands-1; prio >= 0; prio--) {
 		qdisc = q->queues[prio];
 		if (qdisc->ops->drop && (len = qdisc->ops->drop(qdisc)) != 0) {
+			sch->qstats.backlog -= len;
 			sch->q.qlen--;
 			return len;
 		}
 	for (prio = 0; prio < q->bands; prio++)
 		qdisc_reset(q->queues[prio]);
+	sch->qstats.backlog = 0;
 	sch->q.qlen = 0;
 }

net/sched/sch_qfq.c+4−2

 			 cl->agg->lmax, qdisc_pkt_len(skb), cl->common.classid);
 		err = qfq_change_agg(sch, cl, cl->agg->class_weight,
 				     qdisc_pkt_len(skb));
-		if (err)
+		if (err) {
-			return err;
+			cl->qstats.drops++;
+			return qdisc_drop(skb, sch);
+		}
 	}
 	err = qdisc_enqueue(skb, cl->qdisc);

net/sched/sch_red.c+4−0

 	ret = qdisc_enqueue(skb, child);
 	if (likely(ret == NET_XMIT_SUCCESS)) {
+		qdisc_qstats_backlog_inc(sch, skb);
 		sch->q.qlen++;
 	} else if (net_xmit_drop_count(ret)) {
 		q->stats.pdrop++;
 	skb = child->dequeue(child);
 	if (skb) {
 		qdisc_bstats_update(sch, skb);
+		qdisc_qstats_backlog_dec(sch, skb);
 		sch->q.qlen--;
 	} else {
 		if (!red_is_idling(&q->vars))
 	if (child->ops->drop && (len = child->ops->drop(child)) > 0) {
 		q->stats.other++;
 		qdisc_qstats_drop(sch);
+		sch->qstats.backlog -= len;
 		sch->q.qlen--;
 		return len;
 	}
 	struct red_sched_data *q = qdisc_priv(sch);
 	qdisc_reset(q->qdisc);
+	sch->qstats.backlog = 0;
 	sch->q.qlen = 0;
 	red_restart(&q->vars);
 }

net/sched/sch_tbf.c+4−0

 		return ret;
 	}
+	qdisc_qstats_backlog_inc(sch, skb);
 	sch->q.qlen++;
 	return NET_XMIT_SUCCESS;
 }
 	unsigned int len = 0;
 	if (q->qdisc->ops->drop && (len = q->qdisc->ops->drop(q->qdisc)) != 0) {
+		sch->qstats.backlog -= len;
 		sch->q.qlen--;
 		qdisc_qstats_drop(sch);
 	}
 			q->t_c = now;
 			q->tokens = toks;
 			q->ptokens = ptoks;
+			qdisc_qstats_backlog_dec(sch, skb);
 			sch->q.qlen--;
 			qdisc_unthrottled(sch);
 			qdisc_bstats_update(sch, skb);
 	struct tbf_sched_data *q = qdisc_priv(sch);
 	qdisc_reset(q->qdisc);
+	sch->qstats.backlog = 0;
 	sch->q.qlen = 0;
 	q->t_c = ktime_get_ns();
 	q->tokens = q->buffer;

net/sunrpc/clnt.c+25−6

@@ -446,16 +446,27 @@ out_no_rpciod: · 445 unmodified lines
446	return ERR_PTR(err);	446	return ERR_PTR(err);
447	}	447	}
448		448
449	struct rpc_clnt rpc_create_xprt(struct rpc_create_args args,	449	static struct rpc_clnt rpc_create_xprt(struct rpc_create_args args,
450	struct rpc_xprt *xprt)	450	struct rpc_xprt *xprt)
451	{	451	{
452	struct rpc_clnt *clnt = NULL;	452	struct rpc_clnt *clnt = NULL;
453	struct rpc_xprt_switch *xps;	453	struct rpc_xprt_switch *xps;
454		454
455	xps = xprt_switch_alloc(xprt, GFP_KERNEL);	455	if (args->bc_xprt && args->bc_xprt->xpt_bc_xps) {
456	if (xps == NULL)	456	WARN_ON(args->protocol != XPRT_TRANSPORT_BC_TCP);
457	return ERR_PTR(-ENOMEM);	457	xps = args->bc_xprt->xpt_bc_xps;
458		458	xprt_switch_get(xps);
		459	} else {
		460	xps = xprt_switch_alloc(xprt, GFP_KERNEL);
		461	if (xps == NULL) {
		462	xprt_put(xprt);
		463	return ERR_PTR(-ENOMEM);
		464	}
		465	if (xprt->bc_xprt) {
		466	xprt_switch_get(xps);
		467	xprt->bc_xprt->xpt_bc_xps = xps;
		468	}
		469	}
459	clnt = rpc_new_client(args, xps, xprt, NULL);	470	clnt = rpc_new_client(args, xps, xprt, NULL);
460	if (IS_ERR(clnt))	471	if (IS_ERR(clnt))
461	return clnt;	472	return clnt;
@@ -483,7 +494,6 @@ struct rpc_clnt rpc_create_xprt(struct rpc_create_args args, · 21 unmodified lines
483		494
484	return clnt;	495	return clnt;
485	}	496	}
486	EXPORT_SYMBOL_GPL(rpc_create_xprt);
487		497
488	/**	498	/**
489	* rpc_create - create an RPC client and transport with one call	499	* rpc_create - create an RPC client and transport with one call
@@ -509,6 +519,15 @@ struct rpc_clnt rpc_create(struct rpc_create_args args) · 19 unmodified lines
509	};	519	};
510	char servername[48];	520	char servername[48];
511		521
		522	if (args->bc_xprt) {
		523	WARN_ON(args->protocol != XPRT_TRANSPORT_BC_TCP);
		524	xprt = args->bc_xprt->xpt_bc_xprt;
		525	if (xprt) {
		526	xprt_get(xprt);
		527	return rpc_create_xprt(args, xprt);
		528	}
		529	}
		530
512	if (args->flags & RPC_CLNT_CREATE_INFINITE_SLOTS)	531	if (args->flags & RPC_CLNT_CREATE_INFINITE_SLOTS)
513	xprtargs.flags \|= XPRT_CREATE_INFINITE_SLOTS;	532	xprtargs.flags \|= XPRT_CREATE_INFINITE_SLOTS;
514	if (args->flags & RPC_CLNT_CREATE_NO_IDLE_TIMEOUT)	533	if (args->flags & RPC_CLNT_CREATE_NO_IDLE_TIMEOUT)

net/sunrpc/svc_xprt.c+2−0

 	/* See comment on corresponding get in xs_setup_bc_tcp(): */
 	if (xprt->xpt_bc_xprt)
 		xprt_put(xprt->xpt_bc_xprt);
+	if (xprt->xpt_bc_xps)
+		xprt_switch_put(xprt->xpt_bc_xps);
 	xprt->xpt_ops->xpo_free(xprt);
 	module_put(owner);
 }

net/sunrpc/xprtsock.c+1−0

@@ -3057,6 +3057,7 @@ static struct rpc_xprt xs_setup_bc_tcp(struct xprt_create args) · 3056 unmodified lines
3057	return xprt;	3057	return xprt;
3058		3058
3059	args->bc_xprt->xpt_bc_xprt = NULL;	3059	args->bc_xprt->xpt_bc_xprt = NULL;
		3060	args->bc_xprt->xpt_bc_xps = NULL;
3060	xprt_put(xprt);	3061	xprt_put(xprt);
3061	ret = ERR_PTR(-EINVAL);	3062	ret = ERR_PTR(-EINVAL);
3062	out_err:	3063	out_err:

net/tipc/netlink_compat.c+2−1

@@ -604,7 +604,8 @@ static int tipc_nl_compat_link_dump(struct tipc_nl_compat_msg *msg, · 603 unmodified lines
604		604
605	link_info.dest = nla_get_flag(link[TIPC_NLA_LINK_DEST]);	605	link_info.dest = nla_get_flag(link[TIPC_NLA_LINK_DEST]);
606	link_info.up = htonl(nla_get_flag(link[TIPC_NLA_LINK_UP]));	606	link_info.up = htonl(nla_get_flag(link[TIPC_NLA_LINK_UP]));
607	strcpy(link_info.str, nla_data(link[TIPC_NLA_LINK_NAME]));	607	nla_strlcpy(link_info.str, nla_data(link[TIPC_NLA_LINK_NAME]),
		608	TIPC_MAX_LINK_NAME);
608		609
609	return tipc_add_tlv(msg->rep, TIPC_TLV_LINK_INFO,	610	return tipc_add_tlv(msg->rep, TIPC_TLV_LINK_INFO,
610	&link_info, sizeof(link_info));	611	&link_info, sizeof(link_info));

net/unix/af_unix.c+3−3

@@ -315,7 +315,7 @@ static struct sock unix_find_socket_byinode(struct inode i) · 314 unmodified lines
315	&unix_socket_table[i->i_ino & (UNIX_HASH_SIZE - 1)]) {	315	&unix_socket_table[i->i_ino & (UNIX_HASH_SIZE - 1)]) {
316	struct dentry *dentry = unix_sk(s)->path.dentry;	316	struct dentry *dentry = unix_sk(s)->path.dentry;
317		317
318	if (dentry && d_backing_inode(dentry) == i) {	318	if (dentry && d_real_inode(dentry) == i) {
319	sock_hold(s);	319	sock_hold(s);
320	goto found;	320	goto found;
321	}	321	}
@@ -911,7 +911,7 @@ static struct sock unix_find_other(struct net net, · 589 unmodified lines
911	err = kern_path(sunname->sun_path, LOOKUP_FOLLOW, &path);	911	err = kern_path(sunname->sun_path, LOOKUP_FOLLOW, &path);
912	if (err)	912	if (err)
913	goto fail;	913	goto fail;
914	inode = d_backing_inode(path.dentry);	914	inode = d_real_inode(path.dentry);
915	err = inode_permission(inode, MAY_WRITE);	915	err = inode_permission(inode, MAY_WRITE);
916	if (err)	916	if (err)
917	goto put_fail;	917	goto put_fail;
@@ -1048,7 +1048,7 @@ static int unix_bind(struct socket sock, struct sockaddr uaddr, int addr_len) · 130 unmodified lines
1048	goto out_up;	1048	goto out_up;
1049	}	1049	}
1050	addr->hash = UNIX_HASH_SIZE;	1050	addr->hash = UNIX_HASH_SIZE;
1051	hash = d_backing_inode(dentry)->i_ino & (UNIX_HASH_SIZE - 1);	1051	hash = d_real_inode(dentry)->i_ino & (UNIX_HASH_SIZE - 1);
1052	spin_lock(&unix_table_lock);	1052	spin_lock(&unix_table_lock);
1053	u->path = u_path;	1053	u->path = u_path;
1054	list = &unix_socket_table[hash];	1054	list = &unix_socket_table[hash];

net/wireless/core.c+0−2

@@ -363,8 +363,6 @@ struct wiphy wiphy_new_nm(const struct cfg80211_ops ops, int sizeof_priv, · 362 unmodified lines
363	WARN_ON(ops->remain_on_channel && !ops->cancel_remain_on_channel);	363	WARN_ON(ops->remain_on_channel && !ops->cancel_remain_on_channel);
364	WARN_ON(ops->tdls_channel_switch && !ops->tdls_cancel_channel_switch);	364	WARN_ON(ops->tdls_channel_switch && !ops->tdls_cancel_channel_switch);
365	WARN_ON(ops->add_tx_ts && !ops->del_tx_ts);	365	WARN_ON(ops->add_tx_ts && !ops->del_tx_ts);
366	WARN_ON(ops->set_tx_power && !ops->get_tx_power);
367	WARN_ON(ops->set_antenna && !ops->get_antenna);
368		366
369	alloc_size = sizeof(*rdev) + sizeof_priv;	367	alloc_size = sizeof(*rdev) + sizeof_priv;
370		368

net/wireless/wext-core.c+23−2

@@ -958,8 +958,29 @@ static int wireless_process_ioctl(struct net net, struct ifreq ifr, · 957 unmodified lines
958	return private(dev, iwr, cmd, info, handler);	958	return private(dev, iwr, cmd, info, handler);
959	}	959	}
960	/* Old driver API : call driver ioctl handler */	960	/* Old driver API : call driver ioctl handler */
961	if (dev->netdev_ops->ndo_do_ioctl)	961	if (dev->netdev_ops->ndo_do_ioctl) {
962	return dev->netdev_ops->ndo_do_ioctl(dev, ifr, cmd);	962	#ifdef CONFIG_COMPAT
		963	if (info->flags & IW_REQUEST_FLAG_COMPAT) {
		964	int ret = 0;
		965	struct iwreq iwr_lcl;
		966	struct compat_iw_point iwp_compat = (void ) &iwr->u.data;
		967
		968	memcpy(&iwr_lcl, iwr, sizeof(struct iwreq));
		969	iwr_lcl.u.data.pointer = compat_ptr(iwp_compat->pointer);
		970	iwr_lcl.u.data.length = iwp_compat->length;
		971	iwr_lcl.u.data.flags = iwp_compat->flags;
		972
		973	ret = dev->netdev_ops->ndo_do_ioctl(dev, (void *) &iwr_lcl, cmd);
		974
		975	iwp_compat->pointer = ptr_to_compat(iwr_lcl.u.data.pointer);
		976	iwp_compat->length = iwr_lcl.u.data.length;
		977	iwp_compat->flags = iwr_lcl.u.data.flags;
		978
		979	return ret;
		980	} else
		981	#endif
		982	return dev->netdev_ops->ndo_do_ioctl(dev, ifr, cmd);
		983	}
963	return -EOPNOTSUPP;	984	return -EOPNOTSUPP;
964	}	985	}
965		986

scripts/mod/file2alias.c+1−1

@@ -384,7 +384,7 @@ static void do_of_entry_multi(void symval, struct module mod) · 383 unmodified lines
384	len = sprintf(alias, "of:N%sT%s", (name)[0] ? name : "*",	384	len = sprintf(alias, "of:N%sT%s", (name)[0] ? name : "*",
385	(type)[0] ? type : "*");	385	(type)[0] ? type : "*");
386		386
387	if (compatible[0])	387	if ((*compatible)[0])
388	sprintf(&alias[len], "%sC%s", (type)[0] ? "" : "",	388	sprintf(&alias[len], "%sC%s", (type)[0] ? "" : "",
389	*compatible);	389	*compatible);
390		390

security/keys/key.c+1−1

@@ -597,7 +597,7 @@ int key_reject_and_link(struct key *key, · 596 unmodified lines
597		597
598	mutex_unlock(&key_construction_mutex);	598	mutex_unlock(&key_construction_mutex);
599		599
600	if (keyring)	600	if (keyring && link_ret == 0)
601	__key_link_end(keyring, &key->index_key, edit);	601	__key_link_end(keyring, &key->index_key, edit);
602		602
603	/* wake up anyone waiting for a key to be constructed */	603	/* wake up anyone waiting for a key to be constructed */

sound/pci/hda/hda_intel.c+10−1

 #define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170)
 #define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
+#define IS_KBL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa171)
+#define IS_KBL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d71)
 #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
-#define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci))
+#define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci)) || \
+			IS_KBL(pci) || IS_KBL_LP(pci)
 static char *driver_short_names[] = {
 	[AZX_DRIVER_ICH] = "HDA Intel",
 	/* Sunrise Point-LP */
 	{ PCI_DEVICE(0x8086, 0x9d70),
 	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
+	/* Kabylake */
+	{ PCI_DEVICE(0x8086, 0xa171),
+	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
+	/* Kabylake-LP */
+	{ PCI_DEVICE(0x8086, 0x9d71),
+	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
 	/* Broxton-P(Apollolake) */
 	{ PCI_DEVICE(0x8086, 0x5a98),
 	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },

sound/pci/hda/patch_realtek.c+68−5

 	case 0x10ec0234:
 	case 0x10ec0274:
 	case 0x10ec0294:
+	case 0x10ec0700:
+	case 0x10ec0701:
+	case 0x10ec0703:
 		alc_update_coef_idx(codec, 0x10, 1<<15, 0);
 		break;
 	case 0x10ec0662:
 	ALC269_TYPE_ALC256,
 	ALC269_TYPE_ALC225,
 	ALC269_TYPE_ALC294,
+	ALC269_TYPE_ALC700,
 };
 /*
 	case ALC269_TYPE_ALC256:
 	case ALC269_TYPE_ALC225:
 	case ALC269_TYPE_ALC294:
+	case ALC269_TYPE_ALC700:
 		ssids = alc269_ssids;
 		break;
 	default:
 static void alc_headset_mode_unplugged(struct hda_codec *codec)
 {
 	static struct coef_fw coef0255[] = {
-		WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
 		WRITE_COEF(0x45, 0xd089), /* UAJ function set to menual mode */
 		UPDATE_COEFEX(0x57, 0x05, 1<<14, 0), /* Direct Drive HP Amp control(Set to verb control)*/
 		WRITE_COEF(0x06, 0x6104), /* Set MIC2 Vref gate with HP */
 		WRITE_COEFEX(0x57, 0x03, 0x8aa6), /* Direct Drive HP Amp control */
 		{}
 	};
+	static struct coef_fw coef0255_1[] = {
+		WRITE_COEF(0x1b, 0x0c0b), /* LDO and MISC control */
+		{}
+	};
+	static struct coef_fw coef0256[] = {
+		WRITE_COEF(0x1b, 0x0c4b), /* LDO and MISC control */
+		{}
+	};
 	static struct coef_fw coef0233[] = {
 		WRITE_COEF(0x1b, 0x0c0b),
 		WRITE_COEF(0x45, 0xc429),
 	switch (codec->core.vendor_id) {
 	case 0x10ec0255:
+		alc_process_coef_fw(codec, coef0255_1);
+		alc_process_coef_fw(codec, coef0255);
+		break;
 	case 0x10ec0256:
+		alc_process_coef_fw(codec, coef0256);
 		alc_process_coef_fw(codec, coef0255);
 		break;
 	case 0x10ec0233:
 		WRITE_COEFEX(0x57, 0x03, 0x8ea6),
 		{}
 	};
+	static struct coef_fw coef0256[] = {
+		WRITE_COEF(0x45, 0xd489), /* Set to CTIA type */
+		WRITE_COEF(0x1b, 0x0c6b),
+		WRITE_COEFEX(0x57, 0x03, 0x8ea6),
+		{}
+	};
 	static struct coef_fw coef0233[] = {
 		WRITE_COEF(0x45, 0xd429),
 		WRITE_COEF(0x1b, 0x0c2b),
 	switch (codec->core.vendor_id) {
 	case 0x10ec0255:
-	case 0x10ec0256:
 		alc_process_coef_fw(codec, coef0255);
 		break;
+	case 0x10ec0256:
+		alc_process_coef_fw(codec, coef0256);
+		break;
 	case 0x10ec0233:
 	case 0x10ec0283:
 		alc_process_coef_fw(codec, coef0233);
 		WRITE_COEFEX(0x57, 0x03, 0x8ea6),
 		{}
 	};
+	static struct coef_fw coef0256[] = {
+		WRITE_COEF(0x45, 0xe489), /* Set to OMTP Type */
+		WRITE_COEF(0x1b, 0x0c6b),
+		WRITE_COEFEX(0x57, 0x03, 0x8ea6),
+		{}
+	};
 	static struct coef_fw coef0233[] = {
 		WRITE_COEF(0x45, 0xe429),
 		WRITE_COEF(0x1b, 0x0c2b),
 	switch (codec->core.vendor_id) {
 	case 0x10ec0255:
-	case 0x10ec0256:
 		alc_process_coef_fw(codec, coef0255);
 		break;
+	case 0x10ec0256:
+		alc_process_coef_fw(codec, coef0256);
+		break;
 	case 0x10ec0233:
 	case 0x10ec0283:
 		alc_process_coef_fw(codec, coef0233);
 static void alc255_set_default_jack_type(struct hda_codec *codec)
 {
 	/* Set to iphone type */
-	static struct coef_fw fw[] = {
+	static struct coef_fw alc255fw[] = {
 		WRITE_COEF(0x1b, 0x880b),
 		WRITE_COEF(0x45, 0xd089),
 		WRITE_COEF(0x1b, 0x080b),
 		WRITE_COEF(0x1b, 0x0c0b),
 		{}
 	};
-	alc_process_coef_fw(codec, fw);
+	static struct coef_fw alc256fw[] = {
+		WRITE_COEF(0x1b, 0x884b),
+		WRITE_COEF(0x45, 0xd089),
+		WRITE_COEF(0x1b, 0x084b),
+		WRITE_COEF(0x46, 0x0004),
+		WRITE_COEF(0x1b, 0x0c4b),
+		{}
+	};
+	switch (codec->core.vendor_id) {
+	case 0x10ec0255:
+		alc_process_coef_fw(codec, alc255fw);
+		break;
+	case 0x10ec0256:
+		alc_process_coef_fw(codec, alc256fw);
+		break;
+	}
 	msleep(30);
 }
 	SND_PCI_QUIRK(0x17aa, 0x2218, "Thinkpad X1 Carbon 2nd", ALC292_FIXUP_TPT440_DOCK),
 	SND_PCI_QUIRK(0x17aa, 0x2223, "ThinkPad T550", ALC292_FIXUP_TPT440_DOCK),
 	SND_PCI_QUIRK(0x17aa, 0x2226, "ThinkPad X250", ALC292_FIXUP_TPT440_DOCK),
+	SND_PCI_QUIRK(0x17aa, 0x2231, "Thinkpad T560", ALC292_FIXUP_TPT460),
 	SND_PCI_QUIRK(0x17aa, 0x2233, "Thinkpad", ALC292_FIXUP_TPT460),
 	SND_PCI_QUIRK(0x17aa, 0x30bb, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
 	SND_PCI_QUIRK(0x17aa, 0x30e2, "ThinkCentre AIO", ALC233_FIXUP_LENOVO_LINE2_MIC_HOTKEY),
 		{0x12, 0x90a60180},
 		{0x14, 0x90170130},
 		{0x21, 0x02211040}),
+	SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell Inspiron 5565", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
+		{0x12, 0x90a60180},
+		{0x14, 0x90170120},
+		{0x21, 0x02211030}),
 	SND_HDA_PIN_QUIRK(0x10ec0256, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
 		{0x12, 0x90a60160},
 		{0x14, 0x90170120},
 	case 0x10ec0294:
 		spec->codec_variant = ALC269_TYPE_ALC294;
 		break;
+	case 0x10ec0700:
+	case 0x10ec0701:
+	case 0x10ec0703:
+		spec->codec_variant = ALC269_TYPE_ALC700;
+		spec->gen.mixer_nid = 0; /* ALC700 does not have any loopback mixer path */
+		alc_update_coef_idx(codec, 0x4a, 0, 1 << 15); /* Combo jack auto trigger control */
+		break;
 	}
 	if (snd_hda_codec_read(codec, 0x51, 0, AC_VERB_PARAMETERS, 0) == 0x10ec5505) {
 	HDA_CODEC_ENTRY(0x10ec0670, "ALC670", patch_alc662),
 	HDA_CODEC_ENTRY(0x10ec0671, "ALC671", patch_alc662),
 	HDA_CODEC_ENTRY(0x10ec0680, "ALC680", patch_alc680),
+	HDA_CODEC_ENTRY(0x10ec0700, "ALC700", patch_alc269),
+	HDA_CODEC_ENTRY(0x10ec0701, "ALC701", patch_alc269),
+	HDA_CODEC_ENTRY(0x10ec0703, "ALC703", patch_alc269),
 	HDA_CODEC_ENTRY(0x10ec0867, "ALC891", patch_alc882),
 	HDA_CODEC_ENTRY(0x10ec0880, "ALC880", patch_alc880),
 	HDA_CODEC_ENTRY(0x10ec0882, "ALC882", patch_alc882),

tools/perf/util/data-convert-bt.c+39−2

@@ -204,6 +204,44 @@ static unsigned long long adjust_signedness(unsigned long long value_int, int si · 203 unmodified lines
204	return (value_int & value_mask) \| ~value_mask;	204	return (value_int & value_mask) \| ~value_mask;
205	}	205	}
206		206
		207	static int string_set_value(struct bt_ctf_field field, const char string)
		208	{
		209	char *buffer = NULL;
		210	size_t len = strlen(string), i, p;
		211	int err;
		212
		213	for (i = p = 0; i < len; i++, p++) {
		214	if (isprint(string[i])) {
		215	if (!buffer)
		216	continue;
		217	buffer[p] = string[i];
		218	} else {
		219	char numstr[5];
		220
		221	snprintf(numstr, sizeof(numstr), "\\x%02x",
		222	(unsigned int)(string[i]) & 0xff);
		223
		224	if (!buffer) {
		225	buffer = zalloc(i + (len - i) * 4 + 2);
		226	if (!buffer) {
		227	pr_err("failed to set unprintable string '%s'\n", string);
		228	return bt_ctf_field_string_set_value(field, "UNPRINTABLE-STRING");
		229	}
		230	if (i > 0)
		231	strncpy(buffer, string, i);
		232	}
		233	strncat(buffer + p, numstr, 4);
		234	p += 3;
		235	}
		236	}
		237
		238	if (!buffer)
		239	return bt_ctf_field_string_set_value(field, string);
		240	err = bt_ctf_field_string_set_value(field, buffer);
		241	free(buffer);
		242	return err;
		243	}
		244
207	static int add_tracepoint_field_value(struct ctf_writer *cw,	245	static int add_tracepoint_field_value(struct ctf_writer *cw,
208	struct bt_ctf_event_class *event_class,	246	struct bt_ctf_event_class *event_class,
209	struct bt_ctf_event *event,	247	struct bt_ctf_event *event,
@@ -270,8 +308,7 @@ static int add_tracepoint_field_value(struct ctf_writer *cw, · 60 unmodified lines
270	}	308	}
271		309
272	if (flags & FIELD_IS_STRING)	310	if (flags & FIELD_IS_STRING)
273	ret = bt_ctf_field_string_set_value(field,	311	ret = string_set_value(field, data + offset + i * len);
274	data + offset + i * len);
275	else {	312	else {
276	unsigned long long value_int;	313	unsigned long long value_int;
277		314

tools/perf/util/event.c+2−0

@@ -673,6 +673,8 @@ int perf_event__synthesize_kernel_mmap(struct perf_tool *tool, · 672 unmodified lines
673	int err;	673	int err;
674	union perf_event *event;	674	union perf_event *event;
675		675
		676	if (symbol_conf.kptr_restrict)
		677	return -1;
676	if (map == NULL)	678	if (map == NULL)
677	return -1;	679	return -1;
678		680

tools/perf/util/symbol.c+8−8

 static bool symbol__read_kptr_restrict(void)
 {
 	bool value = false;
+	FILE *fp = fopen("/proc/sys/kernel/kptr_restrict", "r");
-	if (geteuid() != 0) {
+	if (fp != NULL) {
-		FILE *fp = fopen("/proc/sys/kernel/kptr_restrict", "r");
+		char line[8];
-		if (fp != NULL) {
-			char line[8];
-			if (fgets(line, sizeof(line), fp) != NULL)
+		if (fgets(line, sizeof(line), fp) != NULL)
-				value = atoi(line) != 0;
+			value = (geteuid() != 0) ?
+					(atoi(line) != 0) :
+					(atoi(line) == 2);
-			fclose(fp);
+		fclose(fp);
-		}
 	}
 	return value;

tools/testing/selftests/net/reuseport_bpf.c+5−5

@@ -111,9 +111,9 @@ static void attach_ebpf(int fd, uint16_t mod) · 110 unmodified lines
111	memset(&attr, 0, sizeof(attr));	111	memset(&attr, 0, sizeof(attr));
112	attr.prog_type = BPF_PROG_TYPE_SOCKET_FILTER;	112	attr.prog_type = BPF_PROG_TYPE_SOCKET_FILTER;
113	attr.insn_cnt = ARRAY_SIZE(prog);	113	attr.insn_cnt = ARRAY_SIZE(prog);
114	attr.insns = (uint64_t)prog;	114	attr.insns = (unsigned long) &prog;
115	attr.license = (uint64_t)bpf_license;	115	attr.license = (unsigned long) &bpf_license;
116	attr.log_buf = (uint64_t)bpf_log_buf;	116	attr.log_buf = (unsigned long) &bpf_log_buf;
117	attr.log_size = sizeof(bpf_log_buf);	117	attr.log_size = sizeof(bpf_log_buf);
118	attr.log_level = 1;	118	attr.log_level = 1;
119	attr.kern_version = 0;	119	attr.kern_version = 0;
@@ -351,8 +351,8 @@ static void test_filter_no_reuseport(const struct test_params p) · 231 unmodified lines
351	memset(&eprog, 0, sizeof(eprog));	351	memset(&eprog, 0, sizeof(eprog));
352	eprog.prog_type = BPF_PROG_TYPE_SOCKET_FILTER;	352	eprog.prog_type = BPF_PROG_TYPE_SOCKET_FILTER;
353	eprog.insn_cnt = ARRAY_SIZE(ecode);	353	eprog.insn_cnt = ARRAY_SIZE(ecode);
354	eprog.insns = (uint64_t)ecode;	354	eprog.insns = (unsigned long) &ecode;
355	eprog.license = (uint64_t)bpf_license;	355	eprog.license = (unsigned long) &bpf_license;
356	eprog.kern_version = 0;	356	eprog.kern_version = 0;
357		357
358	memset(&cprog, 0, sizeof(cprog));	358	memset(&cprog, 0, sizeof(cprog));

tools/virtio/ringtest/Makefile+3−1

 all:
-all: ring virtio_ring_0_9 virtio_ring_poll virtio_ring_inorder
+all: ring virtio_ring_0_9 virtio_ring_poll virtio_ring_inorder noring
 CFLAGS += -Wall
 CFLAGS += -pthread -O2 -ggdb
 virtio_ring_0_9: virtio_ring_0_9.o main.o
 virtio_ring_poll: virtio_ring_poll.o main.o
 virtio_ring_inorder: virtio_ring_inorder.o main.o
+noring: noring.o main.o
 clean:
 	-rm main.o
 	-rm ring.o ring
 	-rm virtio_ring_0_9.o virtio_ring_0_9
 	-rm virtio_ring_poll.o virtio_ring_poll
 	-rm virtio_ring_inorder.o virtio_ring_inorder
+	-rm noring.o noring
 .PHONY: all clean

tools/virtio/ringtest/README+4−0

@@ -1,2 +1,6 @@
1	Partial implementation of various ring layouts, useful to tune virtio design.	1	Partial implementation of various ring layouts, useful to tune virtio design.
2	Uses shared memory heavily.	2	Uses shared memory heavily.
		3
		4	Typical use:
		5
		6	# sh run-on-all.sh perf stat -r 10 --log-fd 1 -- ./ring

tools/virtio/ringtest/noring.c+69−0

@@ -0,0 +1,69 @@
	1	#define _GNU_SOURCE
	2	#include "main.h"
	3	#include <assert.h>
	4
	5	/* stub implementation: useful for measuring overhead */
	6	void alloc_ring(void)
	7	{
	8	}
	9
	10	/* guest side */
	11	int add_inbuf(unsigned len, void buf, void datap)
	12	{
	13	return 0;
	14	}
	15
	16	/*
	17	* skb_array API provides no way for producer to find out whether a given
	18	* buffer was consumed. Our tests merely require that a successful get_buf
	19	* implies that add_inbuf succeed in the past, and that add_inbuf will succeed,
	20	* fake it accordingly.
	21	*/
	22	void get_buf(unsigned lenp, void **bufp)
	23	{
	24	return "Buffer";
	25	}
	26
	27	void poll_used(void)
	28	{
	29	}
	30
	31	void disable_call()
	32	{
	33	assert(0);
	34	}
	35
	36	bool enable_call()
	37	{
	38	assert(0);
	39	}
	40
	41	void kick_available(void)
	42	{
	43	assert(0);
	44	}
	45
	46	/* host side */
	47	void disable_kick()
	48	{
	49	assert(0);
	50	}
	51
	52	bool enable_kick()
	53	{
	54	assert(0);
	55	}
	56
	57	void poll_avail(void)
	58	{
	59	}
	60
	61	bool use_buf(unsigned lenp, void *bufp)
	62	{
	63	return true;
	64	}
	65
	66	void call_used(void)
	67	{
	68	assert(0);
	69	}

tools/virtio/ringtest/run-on-all.sh+2−2

@@ -3,10 +3,10 @@ · 2 unmodified lines
3	#use last CPU for host. Why not the first?	3	#use last CPU for host. Why not the first?
4	#many devices tend to use cpu0 by default so	4	#many devices tend to use cpu0 by default so
5	#it tends to be busier	5	#it tends to be busier
6	HOST_AFFINITY=$(cd /dev/cpu; ls\|grep -v '[a-z]'\|sort -n\|tail -1)	6	HOST_AFFINITY=$(lscpu -p=cpu \| tail -1)
7		7
8	#run command on all cpus	8	#run command on all cpus
9	for cpu in $(cd /dev/cpu; ls\|grep -v '[a-z]'\|sort -n);	9	for cpu in $(seq 0 $HOST_AFFINITY)
10	do	10	do
11	#Don't run guest and host on same CPU	11	#Don't run guest and host on same CPU
12	#It actually works ok if using signalling	12	#It actually works ok if using signalling

virt/kvm/kvm_main.c+1−1

@@ -2941,7 +2941,7 @@ static long kvm_vm_ioctl(struct file *filp, · 2940 unmodified lines
2941	if (copy_from_user(&routing, argp, sizeof(routing)))	2941	if (copy_from_user(&routing, argp, sizeof(routing)))
2942	goto out;	2942	goto out;
2943	r = -EINVAL;	2943	r = -EINVAL;
2944	if (routing.nr >= KVM_MAX_IRQ_ROUTES)	2944	if (routing.nr > KVM_MAX_IRQ_ROUTES)
2945	goto out;	2945	goto out;
2946	if (routing.flags)	2946	if (routing.flags)
2947	goto out;	2947	goto out;

Merge 4.7-rc4 into staging-next

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@@ -13,10 +13,10 @@ Optional properties: · 12 unmodified lines
13	initialization. This is an array of 28 values(u8).	13	initialization. This is an array of 28 values(u8).
14		14
15	- marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.	15	- marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
16	firmware will use the pin to wakeup host system.	16	firmware will use the pin to wakeup host system (u16).
17	- marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host	17	- marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
18	platform. The value will be configured to firmware. This	18	platform. The value will be configured to firmware. This
19	is needed to work chip's sleep feature as expected.	19	is needed to work chip's sleep feature as expected (u16).
20	- interrupt-parent: phandle of the parent interrupt controller	20	- interrupt-parent: phandle of the parent interrupt controller
21	- interrupts : interrupt pin number to the cpu. Driver will request an irq based	21	- interrupts : interrupt pin number to the cpu. Driver will request an irq based
22	on this interrupt number. During system suspend, the irq will be	22	on this interrupt number. During system suspend, the irq will be
@@ -50,7 +50,7 @@ calibration data is also available in below example. · 27 unmodified lines
50	0x37 0x01 0x1c 0x00 0xff 0xff 0xff 0xff 0x01 0x7f 0x04 0x02	50	0x37 0x01 0x1c 0x00 0xff 0xff 0xff 0xff 0x01 0x7f 0x04 0x02
51	0x00 0x00 0xba 0xce 0xc0 0xc6 0x2d 0x00 0x00 0x00 0x00 0x00	51	0x00 0x00 0xba 0xce 0xc0 0xc6 0x2d 0x00 0x00 0x00 0x00 0x00
52	0x00 0x00 0xf0 0x00>;	52	0x00 0x00 0xf0 0x00>;
53	marvell,wakeup-pin = <0x0d>;	53	marvell,wakeup-pin = /bits/ 16 <0x0d>;
54	marvell,wakeup-gap-ms = <0x64>;	54	marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
55	};	55	};
56	};	56	};

@@ -215,7 +215,7 @@ slc_chk: · 214 unmodified lines
215	* ------------------	215	* ------------------
216	* This ver of MMU supports variable page sizes (1k-16k): although Linux will	216	* This ver of MMU supports variable page sizes (1k-16k): although Linux will
217	* only support 8k (default), 16k and 4k.	217	* only support 8k (default), 16k and 4k.
218	* However from hardware perspective, smaller page sizes aggrevate aliasing	218	* However from hardware perspective, smaller page sizes aggravate aliasing
219	* meaning more vaddr bits needed to disambiguate the cache-line-op ;	219	* meaning more vaddr bits needed to disambiguate the cache-line-op ;
220	* the existing scheme of piggybacking won't work for certain configurations.	220	* the existing scheme of piggybacking won't work for certain configurations.
221	* Two new registers IC_PTAG and DC_PTAG inttoduced.	221	* Two new registers IC_PTAG and DC_PTAG inttoduced.
@@ -302,7 +302,7 @@ void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr, · 80 unmodified lines
302		302
303	/*	303	/*
304	* This is technically for MMU v4, using the MMU v3 programming model	304	* This is technically for MMU v4, using the MMU v3 programming model
305	* Special work for HS38 aliasing I-cache configuratino with PAE40	305	* Special work for HS38 aliasing I-cache configuration with PAE40
306	* - upper 8 bits of paddr need to be written into PTAG_HI	306	* - upper 8 bits of paddr need to be written into PTAG_HI
307	* - (and needs to be written before the lower 32 bits)	307	* - (and needs to be written before the lower 32 bits)
308	* Note that PTAG_HI is hoisted outside the line loop	308	* Note that PTAG_HI is hoisted outside the line loop
@@ -936,7 +936,7 @@ void arc_cache_init(void) · 627 unmodified lines
936	ic->ver, CONFIG_ARC_MMU_VER);	936	ic->ver, CONFIG_ARC_MMU_VER);
937		937
938	/*	938	/*
939	* In MMU v4 (HS38x) the alising icache config uses IVIL/PTAG	939	* In MMU v4 (HS38x) the aliasing icache config uses IVIL/PTAG
940	* pair to provide vaddr/paddr respectively, just as in MMU v3	940	* pair to provide vaddr/paddr respectively, just as in MMU v3
941	*/	941	*/
942	if (is_isa_arcv2() && ic->alias)	942	if (is_isa_arcv2() && ic->alias)

@@ -288,7 +288,7 @@ · 287 unmodified lines
288	pinctrl-single,pins = <	288	pinctrl-single,pins = <
289	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP \| MUX_MODE1) /* ssi1_rdy_tx */	289	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP \| MUX_MODE1) /* ssi1_rdy_tx */
290	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE1) /* ssi1_flag_tx */	290	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE1) /* ssi1_flag_tx */
291	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| WAKEUP_EN \| MUX_MODE4) /* ssi1_wake_tx (cawake) */	291	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| MUX_MODE4) /* ssi1_wake_tx (cawake) */
292	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE1) /* ssi1_dat_tx */	292	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE1) /* ssi1_dat_tx */
293	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE1) /* ssi1_dat_rx */	293	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE1) /* ssi1_dat_rx */
294	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE1) /* ssi1_flag_rx */	294	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE1) /* ssi1_flag_rx */
@@ -300,7 +300,7 @@ · 5 unmodified lines
300	modem_pins: pinmux_modem {	300	modem_pins: pinmux_modem {
301	pinctrl-single,pins = <	301	pinctrl-single,pins = <
302	OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT \| MUX_MODE4) /* gpio 70 => cmt_apeslpx */	302	OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT \| MUX_MODE4) /* gpio 70 => cmt_apeslpx */
303	OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT \| WAKEUP_EN \| MUX_MODE4) /* gpio 72 => ape_rst_rq */	303	OMAP3_CORE1_IOPAD(0x20e0, PIN_INPUT \| MUX_MODE4) /* gpio 72 => ape_rst_rq */
304	OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT \| MUX_MODE4) /* gpio 73 => cmt_rst_rq */	304	OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT \| MUX_MODE4) /* gpio 73 => cmt_rst_rq */
305	OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT \| MUX_MODE4) /* gpio 74 => cmt_en */	305	OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT \| MUX_MODE4) /* gpio 74 => cmt_en */
306	OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT \| MUX_MODE4) /* gpio 75 => cmt_rst */	306	OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT \| MUX_MODE4) /* gpio 75 => cmt_rst */

@@ -97,7 +97,7 @@ · 96 unmodified lines
97	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE1) /* ssi1_dat_tx */	97	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE1) /* ssi1_dat_tx */
98	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE1) /* ssi1_flag_tx */	98	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE1) /* ssi1_flag_tx */
99	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP \| MUX_MODE1) /* ssi1_rdy_tx */	99	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLUP \| MUX_MODE1) /* ssi1_rdy_tx */
100	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| WAKEUP_EN \| MUX_MODE4) /* ssi1_wake_tx (cawake) */	100	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| MUX_MODE4) /* ssi1_wake_tx (cawake) */
101	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE1) /* ssi1_dat_rx */	101	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE1) /* ssi1_dat_rx */
102	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE1) /* ssi1_flag_rx */	102	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE1) /* ssi1_flag_rx */
103	OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT \| MUX_MODE1) /* ssi1_rdy_rx */	103	OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT \| MUX_MODE1) /* ssi1_rdy_rx */
@@ -110,7 +110,7 @@ · 6 unmodified lines
110	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE7) /* ssi1_dat_tx */	110	OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT \| MUX_MODE7) /* ssi1_dat_tx */
111	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE7) /* ssi1_flag_tx */	111	OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT \| MUX_MODE7) /* ssi1_flag_tx */
112	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN \| MUX_MODE7) /* ssi1_rdy_tx */	112	OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT_PULLDOWN \| MUX_MODE7) /* ssi1_rdy_tx */
113	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| WAKEUP_EN \| MUX_MODE4) /* ssi1_wake_tx (cawake) */	113	OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT \| MUX_MODE4) /* ssi1_wake_tx (cawake) */
114	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE7) /* ssi1_dat_rx */	114	OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT \| MUX_MODE7) /* ssi1_dat_rx */
115	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE7) /* ssi1_flag_rx */	115	OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT \| MUX_MODE7) /* ssi1_flag_rx */
116	OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT \| MUX_MODE4) /* ssi1_rdy_rx */	116	OMAP3_CORE1_IOPAD(0x2188, PIN_OUTPUT \| MUX_MODE4) /* ssi1_rdy_rx */
@@ -120,7 +120,7 @@ · 3 unmodified lines
120		120
121	modem_pins1: pinmux_modem_core1_pins {	121	modem_pins1: pinmux_modem_core1_pins {
122	pinctrl-single,pins = <	122	pinctrl-single,pins = <
123	OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT \| WAKEUP_EN \| MUX_MODE4) /* gpio_34 (ape_rst_rq) */	123	OMAP3_CORE1_IOPAD(0x207a, PIN_INPUT \| MUX_MODE4) /* gpio_34 (ape_rst_rq) */
124	OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT \| MUX_MODE4) /* gpio_88 (cmt_rst_rq) */	124	OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT \| MUX_MODE4) /* gpio_88 (cmt_rst_rq) */
125	OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT \| MUX_MODE4) /* gpio_93 (cmt_apeslpx) */	125	OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT \| MUX_MODE4) /* gpio_93 (cmt_apeslpx) */
126	>;	126	>;

@@ -98,7 +98,7 @@ · 97 unmodified lines
98	pinctrl-single,pins = <	98	pinctrl-single,pins = <
99	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP \| MUX_MODE0) /* uart2_cts.uart2_cts */	99	OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP \| MUX_MODE0) /* uart2_cts.uart2_cts */
100	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts.uart2_rts */	100	OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT \| MUX_MODE0) /* uart2_rts.uart2_rts */
101	OMAP3_CORE1_IOPAD(0x217a, WAKEUP_EN \| PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */	101	OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT \| MUX_MODE0) /* uart2_rx.uart2_rx */
102	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */	102	OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT \| MUX_MODE0) /* uart2_tx.uart2_tx */
103	>;	103	>;
104	};	104	};
@@ -107,7 +107,7 @@ · 2 unmodified lines
107	pinctrl-single,pins = <	107	pinctrl-single,pins = <
108	OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN \| MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */	108	OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN \| MUX_MODE0) /* uart3_cts_rctx.uart3_cts_rctx */
109	OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT \| MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */	109	OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT \| MUX_MODE0) /* uart3_rts_sd.uart3_rts_sd */
110	OMAP3_CORE1_IOPAD(0x219e, WAKEUP_EN \| PIN_INPUT \| MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */	110	OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT \| MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
111	OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT \| MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */	111	OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT \| MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
112	>;	112	>;
113	};	113	};
@@ -125,7 +125,7 @@ · 11 unmodified lines
125	pinctrl-single,pins = <	125	pinctrl-single,pins = <
126	OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk */	126	OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_clk.sdmmc3_clk */
127	OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d4.sdmmc3_dat0 */	127	OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d4.sdmmc3_dat0 */
128	OMAP3630_CORE2_IOPAD(0x25e6, WAKEUP_EN \| PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d5.sdmmc3_dat1 */	128	OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d5.sdmmc3_dat1 */
129	OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d6.sdmmc3_dat2 */	129	OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d6.sdmmc3_dat2 */
130	OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d3.sdmmc3_dat3 */	130	OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP \| MUX_MODE2) /* etk_d3.sdmmc3_dat3 */
131	>;	131	>;

@@ -180,15 +180,15 @@ static int pic32mzda_clk_probe(struct platform_device *pdev) · 179 unmodified lines
180		180
181	/* register fixed rate clocks */	181	/* register fixed rate clocks */
182	clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL,	182	clks[POSCCLK] = clk_register_fixed_rate(&pdev->dev, "posc_clk", NULL,
183	CLK_IS_ROOT, 24000000);	183	0, 24000000);
184	clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL,	184	clks[FRCCLK] = clk_register_fixed_rate(&pdev->dev, "frc_clk", NULL,
185	CLK_IS_ROOT, 8000000);	185	0, 8000000);
186	clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL,	186	clks[BFRCCLK] = clk_register_fixed_rate(&pdev->dev, "bfrc_clk", NULL,
187	CLK_IS_ROOT, 8000000);	187	0, 8000000);
188	clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL,	188	clks[LPRCCLK] = clk_register_fixed_rate(&pdev->dev, "lprc_clk", NULL,
189	CLK_IS_ROOT, 32000);	189	0, 32000);
190	clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,	190	clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,
191	CLK_IS_ROOT, 24000000);	191	0, 24000000);
192	/* fixed rate (optional) clock */	192	/* fixed rate (optional) clock */
193	if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {	193	if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {
194	pr_info("pic32-clk: dt requests SOSC.\n");	194	pr_info("pic32-clk: dt requests SOSC.\n");

@@ -66,12 +66,12 @@ static const struct file_operations vc4_drm_fops = { · 65 unmodified lines
66	};	66	};
67		67
68	static const struct drm_ioctl_desc vc4_drm_ioctls[] = {	68	static const struct drm_ioctl_desc vc4_drm_ioctls[] = {
69	DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, 0),	69	DRM_IOCTL_DEF_DRV(VC4_SUBMIT_CL, vc4_submit_cl_ioctl, DRM_RENDER_ALLOW),
70	DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, 0),	70	DRM_IOCTL_DEF_DRV(VC4_WAIT_SEQNO, vc4_wait_seqno_ioctl, DRM_RENDER_ALLOW),
71	DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, 0),	71	DRM_IOCTL_DEF_DRV(VC4_WAIT_BO, vc4_wait_bo_ioctl, DRM_RENDER_ALLOW),
72	DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, 0),	72	DRM_IOCTL_DEF_DRV(VC4_CREATE_BO, vc4_create_bo_ioctl, DRM_RENDER_ALLOW),
73	DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, 0),	73	DRM_IOCTL_DEF_DRV(VC4_MMAP_BO, vc4_mmap_bo_ioctl, DRM_RENDER_ALLOW),
74	DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, 0),	74	DRM_IOCTL_DEF_DRV(VC4_CREATE_SHADER_BO, vc4_create_shader_bo_ioctl, DRM_RENDER_ALLOW),
75	DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,	75	DRM_IOCTL_DEF_DRV(VC4_GET_HANG_STATE, vc4_get_hang_state_ioctl,
76	DRM_ROOT_ONLY),	76	DRM_ROOT_ONLY),
77	};	77	};
@@ -91,7 +91,7 @@ static struct drm_driver vc4_drm_driver = { · 13 unmodified lines
91		91
92	.enable_vblank = vc4_enable_vblank,	92	.enable_vblank = vc4_enable_vblank,
93	.disable_vblank = vc4_disable_vblank,	93	.disable_vblank = vc4_disable_vblank,
94	.get_vblank_counter = drm_vblank_count,	94	.get_vblank_counter = drm_vblank_no_hw_counter,
95		95
96	#if defined(CONFIG_DEBUG_FS)	96	#if defined(CONFIG_DEBUG_FS)
97	.debugfs_init = vc4_debugfs_init,	97	.debugfs_init = vc4_debugfs_init,