Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull more SCSI updates from James Bottomley: "The set of core changes here is Christoph's submission path cleanups. These introduced a couple of regressions when first proposed so they got held over from the initial merge window pull request to give more testing time, which they've now had and Syzbot has confirmed the regression it detected is fixed. The other main changes are two driver updates (arcmsr, pm80xx) and assorted minor clean ups" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (38 commits) scsi: qla2xxx: Fix return of uninitialized value in rval scsi: core: Set sc_data_direction to DMA_NONE for no-transfer commands scsi: sr: Initialize ->cmd_len scsi: arcmsr: Update driver version to v1.50.00.02-20200819 scsi: arcmsr: Add support for ARC-1886 series RAID controllers scsi: arcmsr: Fix device hot-plug monitoring timer stop scsi: arcmsr: Remove unnecessary syntax scsi: pm80xx: Driver version update scsi: pm80xx: Increase the number of outstanding I/O supported to 1024 scsi: pm80xx: Remove DMA memory allocation for ccb and device structures scsi: pm80xx: Increase number of supported queues scsi: sym53c8xx_2: Fix sizeof() mismatch scsi: isci: Fix a typo in a comment scsi: qla4xxx: Fix inconsistent format argument type scsi: myrb: Fix inconsistent format argument types scsi: myrb: Remove redundant assignment to variable timeout scsi: bfa: Fix error return in bfad_pci_init() scsi: fcoe: Simplify the return expression of fcoe_sysfs_setup() scsi: snic: Simplify the return expression of svnic_cq_alloc() scsi: fnic: Simplify the return expression of vnic_wq_copy_alloc() ...

Linus Torvalds committed 6 years ago

Commit af995382 parents bd7e8c9 1ef16a429 files · +818 −584Browse files

Unified · Split

29 files

drivers/scsi/53c700.c +0 −4
drivers/scsi/arcmsr/arcmsr.h +99 −3
drivers/scsi/arcmsr/arcmsr_hba.c +290 −87
drivers/scsi/bfa/bfad.c +1 −0
drivers/scsi/dc395x.c +1 −24
drivers/scsi/fcoe/fcoe_sysfs.c +1 −7
drivers/scsi/fnic/vnic_wq_copy.c +1 −7
drivers/scsi/gdth.c +76 −75
drivers/scsi/initio.c +1 −13
drivers/scsi/isci/remote_node_table.h +1 −1
drivers/scsi/myrb.c +2 −3
drivers/scsi/pm8001/pm8001_ctl.c +4 −2
drivers/scsi/pm8001/pm8001_defs.h +13 −14
drivers/scsi/pm8001/pm8001_hwi.c +20 −18
drivers/scsi/pm8001/pm8001_init.c +150 −71
drivers/scsi/pm8001/pm8001_sas.h +11 −4
drivers/scsi/pm8001/pm80xx_hwi.c +56 −53
drivers/scsi/qla2xxx/qla_dfs.c +8 −60
drivers/scsi/qla2xxx/qla_isr.c +15 −27
drivers/scsi/qla2xxx/qla_nvme.c +4 −4
drivers/scsi/qla2xxx/qla_nx2.c +1 −1
drivers/scsi/qla4xxx/ql4_nx.c +1 −1
drivers/scsi/scsi_lib.c +35 −73
drivers/scsi/sd.c +15 −12
drivers/scsi/snic/vnic_cq.c +1 −7
drivers/scsi/sr.c +7 −10
drivers/scsi/sym53c8xx_2/sym_hipd.c +1 −1
drivers/target/target_core_rd.c +1 −1
include/scsi/scsi_cmnd.h +2 −1

drivers/scsi/53c700.c+0−4

 		__u8 sstat0 = 0, dstat = 0;
 		__u32 dsp;
 		struct scsi_cmnd *SCp = hostdata->cmd;
-		enum NCR_700_Host_State state;
 		handled = 1;
-		state = hostdata->state;
 		SCp = hostdata->cmd;
 		if(istat & SCSI_INT_PENDING) {
 	struct NCR_700_Host_Parameters *hostdata =
 		(struct NCR_700_Host_Parameters *)SCp->device->host->hostdata[0];
 	__u32 move_ins;
-	enum dma_data_direction direction;
 	struct NCR_700_command_slot *slot;
 	if(hostdata->command_slot_count >= NCR_700_COMMAND_SLOTS_PER_HOST) {
 	}
 	/* now build the scatter gather list */
-	direction = SCp->sc_data_direction;
 	if(move_ins != 0) {
 		int i;
 		int sg_count;

drivers/scsi/arcmsr/arcmsr.h+99−3

@@ -49,7 +49,7 @@ struct device_attribute; · 48 unmodified lines
49	#define ARCMSR_MAX_OUTSTANDING_CMD 1024	49	#define ARCMSR_MAX_OUTSTANDING_CMD 1024
50	#define ARCMSR_DEFAULT_OUTSTANDING_CMD 128	50	#define ARCMSR_DEFAULT_OUTSTANDING_CMD 128
51	#define ARCMSR_MIN_OUTSTANDING_CMD 32	51	#define ARCMSR_MIN_OUTSTANDING_CMD 32
52	#define ARCMSR_DRIVER_VERSION "v1.40.00.10-20190116"	52	#define ARCMSR_DRIVER_VERSION "v1.50.00.02-20200819"
53	#define ARCMSR_SCSI_INITIATOR_ID 255	53	#define ARCMSR_SCSI_INITIATOR_ID 255
54	#define ARCMSR_MAX_XFER_SECTORS 512	54	#define ARCMSR_MAX_XFER_SECTORS 512
55	#define ARCMSR_MAX_XFER_SECTORS_B 4096	55	#define ARCMSR_MAX_XFER_SECTORS_B 4096
@@ -80,6 +80,7 @@ struct device_attribute; · 24 unmodified lines
80	#ifndef PCI_DEVICE_ID_ARECA_1884	80	#ifndef PCI_DEVICE_ID_ARECA_1884
81	#define PCI_DEVICE_ID_ARECA_1884 0x1884	81	#define PCI_DEVICE_ID_ARECA_1884 0x1884
82	#endif	82	#endif
		83	#define PCI_DEVICE_ID_ARECA_1886 0x188A
83	#define ARCMSR_HOURS (1000 * 60 * 60 * 4)	84	#define ARCMSR_HOURS (1000 * 60 * 60 * 4)
84	#define ARCMSR_MINUTES (1000 * 60 * 60)	85	#define ARCMSR_MINUTES (1000 * 60 * 60)
85	/*	86	/*
@@ -436,6 +437,21 @@ struct FIRMWARE_INFO · 350 unmodified lines
436	#define ARCMSR_HBEMU_DOORBELL_SYNC 0x100	437	#define ARCMSR_HBEMU_DOORBELL_SYNC 0x100
437	#define ARCMSR_ARC188X_RESET_ADAPTER 0x00000004	438	#define ARCMSR_ARC188X_RESET_ADAPTER 0x00000004
438	#define ARCMSR_ARC1884_DiagWrite_ENABLE 0x00000080	439	#define ARCMSR_ARC1884_DiagWrite_ENABLE 0x00000080
		440
		441	/*
		442	*******************************************************************************
		443	** SPEC. for Areca Type F adapter
		444	*******************************************************************************
		445	*/
		446	#define ARCMSR_SIGNATURE_1886 0x188617D3
		447	// Doorbell and interrupt definition are same as Type E adapter
		448	/* ARC-1886 doorbell sync */
		449	#define ARCMSR_HBFMU_DOORBELL_SYNC 0x100
		450	//set host rw buffer physical address at inbound message 0, 1 (low,high)
		451	#define ARCMSR_HBFMU_DOORBELL_SYNC1 0x300
		452	#define ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK 0x80000000
		453	#define ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE 0x20000000
		454
439	/*	455	/*
440	*******************************************************************************	456	*******************************************************************************
441	** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)	457	** ARECA SCSI COMMAND DESCRIPTOR BLOCK size 0x1F8 (504)
@@ -720,6 +736,80 @@ struct MessageUnit_E{ · 278 unmodified lines
720	uint32_t msgcode_rwbuffer[256]; /2200 23FF/	736	uint32_t msgcode_rwbuffer[256]; /2200 23FF/
721	};	737	};
722		738
		739	/*
		740	*********************************************************************
		741	** Messaging Unit (MU) of Type F processor(LSI)
		742	*********************************************************************
		743	*/
		744	struct MessageUnit_F {
		745	uint32_t iobound_doorbell; /0000 0003/
		746	uint32_t write_sequence_3xxx; /0004 0007/
		747	uint32_t host_diagnostic_3xxx; /0008 000B/
		748	uint32_t posted_outbound_doorbell; /000C 000F/
		749	uint32_t master_error_attribute; /0010 0013/
		750	uint32_t master_error_address_low; /0014 0017/
		751	uint32_t master_error_address_high; /0018 001B/
		752	uint32_t hcb_size; /001C 001F/
		753	uint32_t inbound_doorbell; /0020 0023/
		754	uint32_t diagnostic_rw_data; /0024 0027/
		755	uint32_t diagnostic_rw_address_low; /0028 002B/
		756	uint32_t diagnostic_rw_address_high; /002C 002F/
		757	uint32_t host_int_status; /0030 0033/
		758	uint32_t host_int_mask; /0034 0037/
		759	uint32_t dcr_data; /0038 003B/
		760	uint32_t dcr_address; /003C 003F/
		761	uint32_t inbound_queueport; /0040 0043/
		762	uint32_t outbound_queueport; /0044 0047/
		763	uint32_t hcb_pci_address_low; /0048 004B/
		764	uint32_t hcb_pci_address_high; /004C 004F/
		765	uint32_t iop_int_status; /0050 0053/
		766	uint32_t iop_int_mask; /0054 0057/
		767	uint32_t iop_inbound_queue_port; /0058 005B/
		768	uint32_t iop_outbound_queue_port; /005C 005F/
		769	uint32_t inbound_free_list_index; /0060 0063/
		770	uint32_t inbound_post_list_index; /0064 0067/
		771	uint32_t reply_post_producer_index; /0068 006B/
		772	uint32_t reply_post_consumer_index; /006C 006F/
		773	uint32_t inbound_doorbell_clear; /0070 0073/
		774	uint32_t i2o_message_unit_control; /0074 0077/
		775	uint32_t last_used_message_source_address_low; /0078 007B/
		776	uint32_t last_used_message_source_address_high; /007C 007F/
		777	uint32_t pull_mode_data_byte_count[4]; /0080 008F/
		778	uint32_t message_dest_address_index; /0090 0093/
		779	uint32_t done_queue_not_empty_int_counter_timer; /0094 0097/
		780	uint32_t utility_A_int_counter_timer; /0098 009B/
		781	uint32_t outbound_doorbell; /009C 009F/
		782	uint32_t outbound_doorbell_clear; /00A0 00A3/
		783	uint32_t message_source_address_index; /00A4 00A7/
		784	uint32_t message_done_queue_index; /00A8 00AB/
		785	uint32_t reserved0; /00AC 00AF/
		786	uint32_t inbound_msgaddr0; /00B0 00B3/
		787	uint32_t inbound_msgaddr1; /00B4 00B7/
		788	uint32_t outbound_msgaddr0; /00B8 00BB/
		789	uint32_t outbound_msgaddr1; /00BC 00BF/
		790	uint32_t inbound_queueport_low; /00C0 00C3/
		791	uint32_t inbound_queueport_high; /00C4 00C7/
		792	uint32_t outbound_queueport_low; /00C8 00CB/
		793	uint32_t outbound_queueport_high; /00CC 00CF/
		794	uint32_t iop_inbound_queue_port_low; /00D0 00D3/
		795	uint32_t iop_inbound_queue_port_high; /00D4 00D7/
		796	uint32_t iop_outbound_queue_port_low; /00D8 00DB/
		797	uint32_t iop_outbound_queue_port_high; /00DC 00DF/
		798	uint32_t message_dest_queue_port_low; /00E0 00E3/
		799	uint32_t message_dest_queue_port_high; /00E4 00E7/
		800	uint32_t last_used_message_dest_address_low; /00E8 00EB/
		801	uint32_t last_used_message_dest_address_high; /00EC 00EF/
		802	uint32_t message_done_queue_base_address_low; /00F0 00F3/
		803	uint32_t message_done_queue_base_address_high; /00F4 00F7/
		804	uint32_t host_diagnostic; /00F8 00FB/
		805	uint32_t write_sequence; /00FC 00FF/
		806	uint32_t reserved1[46]; /0100 01B7/
		807	uint32_t reply_post_producer_index1; /01B8 01BB/
		808	uint32_t reply_post_consumer_index1; /01BC 01BF/
		809	};
		810
		811	#define MESG_RW_BUFFER_SIZE (256 * 3)
		812
723	typedef struct deliver_completeQ {	813	typedef struct deliver_completeQ {
724	uint16_t cmdFlag;	814	uint16_t cmdFlag;
725	uint16_t cmdSMID;	815	uint16_t cmdSMID;
@@ -739,6 +829,7 @@ struct AdapterControlBlock · 13 unmodified lines
739	#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */	829	#define ACB_ADAPTER_TYPE_C 0x00000002 /* hbc L IOP */
740	#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */	830	#define ACB_ADAPTER_TYPE_D 0x00000003 /* hbd M IOP */
741	#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */	831	#define ACB_ADAPTER_TYPE_E 0x00000004 /* hba L IOP */
		832	#define ACB_ADAPTER_TYPE_F 0x00000005 /* hba L IOP */
742	u32 ioqueue_size;	833	u32 ioqueue_size;
743	struct pci_dev * pdev;	834	struct pci_dev * pdev;
744	struct Scsi_Host * host;	835	struct Scsi_Host * host;
@@ -760,10 +851,16 @@ struct AdapterControlBlock · 15 unmodified lines
760	struct MessageUnit_C __iomem *pmuC;	851	struct MessageUnit_C __iomem *pmuC;
761	struct MessageUnit_D *pmuD;	852	struct MessageUnit_D *pmuD;
762	struct MessageUnit_E __iomem *pmuE;	853	struct MessageUnit_E __iomem *pmuE;
		854	struct MessageUnit_F __iomem *pmuF;
763	};	855	};
764	/* message unit ATU inbound base address0 */	856	/* message unit ATU inbound base address0 */
765	void __iomem *mem_base0;	857	void __iomem *mem_base0;
766	void __iomem *mem_base1;	858	void __iomem *mem_base1;
		859	//0x000 - COMPORT_IN (Host sent to ROC)
		860	uint32_t *message_wbuffer;
		861	//0x100 - COMPORT_OUT (ROC sent to Host)
		862	uint32_t *message_rbuffer;
		863	uint32_t *msgcode_rwbuffer; //0x200 - BIOS_AREA
767	uint32_t acb_flags;	864	uint32_t acb_flags;
768	u16 dev_id;	865	u16 dev_id;
769	uint8_t adapter_index;	866	uint8_t adapter_index;
@@ -836,8 +933,6 @@ struct AdapterControlBlock · 66 unmodified lines
836	#define FW_NORMAL 0x0000	933	#define FW_NORMAL 0x0000
837	#define FW_BOG 0x0001	934	#define FW_BOG 0x0001
838	#define FW_DEADLOCK 0x0010	935	#define FW_DEADLOCK 0x0010
839	atomic_t rq_map_token;
840	atomic_t ante_token_value;
841	uint32_t maxOutstanding;	936	uint32_t maxOutstanding;
842	int vector_count;	937	int vector_count;
843	uint32_t maxFreeCCB;	938	uint32_t maxFreeCCB;
@@ -848,6 +943,7 @@ struct AdapterControlBlock · 4 unmodified lines
848	uint32_t out_doorbell;	943	uint32_t out_doorbell;
849	uint32_t completionQ_entry;	944	uint32_t completionQ_entry;
850	pCompletion_Q pCompletionQ;	945	pCompletion_Q pCompletionQ;
		946	uint32_t completeQ_size;
851	};/* HW_DEVICE_EXTENSION */	947	};/* HW_DEVICE_EXTENSION */
852	/*	948	/*
853	*******************************************************************************	949	*******************************************************************************

drivers/scsi/arcmsr/arcmsr_hba.c+290−87

@@ -133,6 +133,7 @@ static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB); · 132 unmodified lines
133	static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);	133	static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
134	static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);	134	static void arcmsr_hbaE_message_isr(struct AdapterControlBlock *acb);
135	static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);	135	static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb);
		136	static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb);
136	static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);	137	static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
137	static const char arcmsr_info(struct Scsi_Host );	138	static const char arcmsr_info(struct Scsi_Host );
138	static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);	139	static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
@@ -209,6 +210,8 @@ static struct pci_device_id arcmsr_device_id_table[] = { · 70 unmodified lines
209	.driver_data = ACB_ADAPTER_TYPE_C},	210	.driver_data = ACB_ADAPTER_TYPE_C},
210	{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),	211	{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1884),
211	.driver_data = ACB_ADAPTER_TYPE_E},	212	.driver_data = ACB_ADAPTER_TYPE_E},
		213	{PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1886),
		214	.driver_data = ACB_ADAPTER_TYPE_F},
212	{0, 0}, /* Terminating entry */	215	{0, 0}, /* Terminating entry */
213	};	216	};
214	MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);	217	MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
@@ -232,12 +235,12 @@ static void arcmsr_free_io_queue(struct AdapterControlBlock *acb) · 17 unmodified lines
232	switch (acb->adapter_type) {	235	switch (acb->adapter_type) {
233	case ACB_ADAPTER_TYPE_B:	236	case ACB_ADAPTER_TYPE_B:
234	case ACB_ADAPTER_TYPE_D:	237	case ACB_ADAPTER_TYPE_D:
235	case ACB_ADAPTER_TYPE_E: {	238	case ACB_ADAPTER_TYPE_E:
		239	case ACB_ADAPTER_TYPE_F:
236	dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,	240	dma_free_coherent(&acb->pdev->dev, acb->ioqueue_size,
237	acb->dma_coherent2, acb->dma_coherent_handle2);	241	acb->dma_coherent2, acb->dma_coherent_handle2);
238	break;	242	break;
239	}	243	}
240	}
241	}	244	}
242		245
243	static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)	246	static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
@@ -310,6 +313,19 @@ static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) · 66 unmodified lines
310	acb->out_doorbell = 0;	313	acb->out_doorbell = 0;
311	break;	314	break;
312	}	315	}
		316	case ACB_ADAPTER_TYPE_F: {
		317	acb->pmuF = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
		318	if (!acb->pmuF) {
		319	pr_notice("arcmsr%d: memory mapping region fail\n",
		320	acb->host->host_no);
		321	return false;
		322	}
		323	writel(0, &acb->pmuF->host_int_status); /* clear interrupt */
		324	writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
		325	acb->in_doorbell = 0;
		326	acb->out_doorbell = 0;
		327	break;
		328	}
313	}	329	}
314	return true;	330	return true;
315	}	331	}
@@ -317,26 +333,25 @@ static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) · 1 unmodified line
317	static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)	333	static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
318	{	334	{
319	switch (acb->adapter_type) {	335	switch (acb->adapter_type) {
320	case ACB_ADAPTER_TYPE_A:{	336	case ACB_ADAPTER_TYPE_A:
321	iounmap(acb->pmuA);	337	iounmap(acb->pmuA);
322	}	338	break;
323	break;	339	case ACB_ADAPTER_TYPE_B:
324	case ACB_ADAPTER_TYPE_B:{
325	iounmap(acb->mem_base0);	340	iounmap(acb->mem_base0);
326	iounmap(acb->mem_base1);	341	iounmap(acb->mem_base1);
327	}	342	break;
328		343	case ACB_ADAPTER_TYPE_C:
329	break;
330	case ACB_ADAPTER_TYPE_C:{
331	iounmap(acb->pmuC);	344	iounmap(acb->pmuC);
332	}	345	break;
333	break;
334	case ACB_ADAPTER_TYPE_D:	346	case ACB_ADAPTER_TYPE_D:
335	iounmap(acb->mem_base0);	347	iounmap(acb->mem_base0);
336	break;	348	break;
337	case ACB_ADAPTER_TYPE_E:	349	case ACB_ADAPTER_TYPE_E:
338	iounmap(acb->pmuE);	350	iounmap(acb->pmuE);
339	break;	351	break;
		352	case ACB_ADAPTER_TYPE_F:
		353	iounmap(acb->pmuF);
		354	break;
340	}	355	}
341	}	356	}
342		357
@@ -552,23 +567,20 @@ static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) · 209 unmodified lines
552	{	567	{
553	switch (acb->adapter_type) {	568	switch (acb->adapter_type) {
554		569
555	case ACB_ADAPTER_TYPE_A: {	570	case ACB_ADAPTER_TYPE_A:
556	arcmsr_hbaA_flush_cache(acb);	571	arcmsr_hbaA_flush_cache(acb);
557	}
558	break;	572	break;
559		573	case ACB_ADAPTER_TYPE_B:
560	case ACB_ADAPTER_TYPE_B: {
561	arcmsr_hbaB_flush_cache(acb);	574	arcmsr_hbaB_flush_cache(acb);
562	}
563	break;	575	break;
564	case ACB_ADAPTER_TYPE_C: {	576	case ACB_ADAPTER_TYPE_C:
565	arcmsr_hbaC_flush_cache(acb);	577	arcmsr_hbaC_flush_cache(acb);
566	}
567	break;	578	break;
568	case ACB_ADAPTER_TYPE_D:	579	case ACB_ADAPTER_TYPE_D:
569	arcmsr_hbaD_flush_cache(acb);	580	arcmsr_hbaD_flush_cache(acb);
570	break;	581	break;
571	case ACB_ADAPTER_TYPE_E:	582	case ACB_ADAPTER_TYPE_E:
		583	case ACB_ADAPTER_TYPE_F:
572	arcmsr_hbaE_flush_cache(acb);	584	arcmsr_hbaE_flush_cache(acb);
573	break;	585	break;
574	}	586	}
@@ -626,6 +638,27 @@ static void arcmsr_hbaD_assign_regAddr(struct AdapterControlBlock *acb) · 51 unmodified lines
626	reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);	638	reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER);
627	}	639	}
628		640
		641	static void arcmsr_hbaF_assign_regAddr(struct AdapterControlBlock *acb)
		642	{
		643	dma_addr_t host_buffer_dma;
		644	struct MessageUnit_F __iomem *pmuF;
		645
		646	memset(acb->dma_coherent2, 0xff, acb->completeQ_size);
		647	acb->message_wbuffer = (uint32_t *)round_up((unsigned long)acb->dma_coherent2 +
		648	acb->completeQ_size, 4);
		649	acb->message_rbuffer = ((void *)acb->message_wbuffer) + 0x100;
		650	acb->msgcode_rwbuffer = ((void *)acb->message_wbuffer) + 0x200;
		651	memset((void *)acb->message_wbuffer, 0, MESG_RW_BUFFER_SIZE);
		652	host_buffer_dma = round_up(acb->dma_coherent_handle2 + acb->completeQ_size, 4);
		653	pmuF = acb->pmuF;
		654	/* host buffer low address, bit0:1 all buffer active */
		655	writel(lower_32_bits(host_buffer_dma \| 1), &pmuF->inbound_msgaddr0);
		656	/* host buffer high address */
		657	writel(upper_32_bits(host_buffer_dma), &pmuF->inbound_msgaddr1);
		658	/* set host buffer physical address */
		659	writel(ARCMSR_HBFMU_DOORBELL_SYNC1, &pmuF->iobound_doorbell);
		660	}
		661
629	static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)	662	static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb)
630	{	663	{
631	bool rtn = true;	664	bool rtn = true;
@@ -679,6 +712,28 @@ static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb) · 47 unmodified lines
679	acb->doneq_index = 0;	712	acb->doneq_index = 0;
680	}	713	}
681	break;	714	break;
		715	case ACB_ADAPTER_TYPE_F: {
		716	uint32_t QueueDepth;
		717	uint32_t depthTbl[] = {256, 512, 1024, 128, 64, 32};
		718
		719	arcmsr_wait_firmware_ready(acb);
		720	QueueDepth = depthTbl[readl(&acb->pmuF->outbound_msgaddr1) & 7];
		721	acb->completeQ_size = sizeof(struct deliver_completeQ) * QueueDepth + 128;
		722	acb->ioqueue_size = roundup(acb->completeQ_size + MESG_RW_BUFFER_SIZE, 32);
		723	dma_coherent = dma_alloc_coherent(&pdev->dev, acb->ioqueue_size,
		724	&dma_coherent_handle, GFP_KERNEL);
		725	if (!dma_coherent) {
		726	pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no);
		727	return false;
		728	}
		729	acb->dma_coherent_handle2 = dma_coherent_handle;
		730	acb->dma_coherent2 = dma_coherent;
		731	acb->pCompletionQ = dma_coherent;
		732	acb->completionQ_entry = acb->completeQ_size / sizeof(struct deliver_completeQ);
		733	acb->doneq_index = 0;
		734	arcmsr_hbaF_assign_regAddr(acb);
		735	}
		736	break;
682	default:	737	default:
683	break;	738	break;
684	}	739	}
@@ -713,7 +768,8 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) · 28 unmodified lines
713	acb->host->sg_tablesize = max_sg_entrys;	768	acb->host->sg_tablesize = max_sg_entrys;
714	roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);	769	roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
715	acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;	770	acb->uncache_size = roundup_ccbsize * acb->maxFreeCCB;
716	acb->uncache_size += acb->ioqueue_size;	771	if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
		772	acb->uncache_size += acb->ioqueue_size;
717	dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);	773	dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
718	if(!dma_coherent){	774	if(!dma_coherent){
719	printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);	775	printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
@@ -736,6 +792,7 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) · 16 unmodified lines
736	case ACB_ADAPTER_TYPE_C:	792	case ACB_ADAPTER_TYPE_C:
737	case ACB_ADAPTER_TYPE_D:	793	case ACB_ADAPTER_TYPE_D:
738	case ACB_ADAPTER_TYPE_E:	794	case ACB_ADAPTER_TYPE_E:
		795	case ACB_ADAPTER_TYPE_F:
739	ccb_tmp->cdb_phyaddr = cdb_phyaddr;	796	ccb_tmp->cdb_phyaddr = cdb_phyaddr;
740	break;	797	break;
741	}	798	}
@@ -754,8 +811,10 @@ static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) · 12 unmodified lines
754	ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);	811	ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
755	dma_coherent_handle = next_ccb_phy;	812	dma_coherent_handle = next_ccb_phy;
756	}	813	}
757	acb->dma_coherent_handle2 = dma_coherent_handle;	814	if (acb->adapter_type != ACB_ADAPTER_TYPE_F) {
758	acb->dma_coherent2 = ccb_tmp;	815	acb->dma_coherent_handle2 = dma_coherent_handle;
		816	acb->dma_coherent2 = ccb_tmp;
		817	}
759	switch (acb->adapter_type) {	818	switch (acb->adapter_type) {
760	case ACB_ADAPTER_TYPE_B:	819	case ACB_ADAPTER_TYPE_B:
761	acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;	820	acb->pmuB = (struct MessageUnit_B *)acb->dma_coherent2;
@@ -785,7 +844,6 @@ static void arcmsr_message_isr_bh_fn(struct work_struct *work) · 23 unmodified lines
785	struct scsi_device *psdev;	844	struct scsi_device *psdev;
786	char diff, temp;	845	char diff, temp;
787		846
788	acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
789	switch (acb->adapter_type) {	847	switch (acb->adapter_type) {
790	case ACB_ADAPTER_TYPE_A: {	848	case ACB_ADAPTER_TYPE_A: {
791	struct MessageUnit_A __iomem *reg = acb->pmuA;	849	struct MessageUnit_A __iomem *reg = acb->pmuA;
@@ -822,8 +880,12 @@ static void arcmsr_message_isr_bh_fn(struct work_struct *work) · 30 unmodified lines
822	devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);	880	devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
823	break;	881	break;
824	}	882	}
		883	case ACB_ADAPTER_TYPE_F: {
		884	signature = (uint32_t __iomem *)(&acb->msgcode_rwbuffer[0]);
		885	devicemap = (char __iomem *)(&acb->msgcode_rwbuffer[21]);
		886	break;
		887	}
825	}	888	}
826	atomic_inc(&acb->rq_map_token);
827	if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)	889	if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
828	return;	890	return;
829	for (target = 0; target < ARCMSR_MAX_TARGETID - 1;	891	for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
@@ -854,6 +916,7 @@ static void arcmsr_message_isr_bh_fn(struct work_struct *work) · 24 unmodified lines
854	devicemap++;	916	devicemap++;
855	acb_dev_map++;	917	acb_dev_map++;
856	}	918	}
		919	acb->acb_flags &= ~ACB_F_MSG_GET_CONFIG;
857	}	920	}
858		921
859	static int	922	static int
@@ -906,8 +969,6 @@ out_free_irq: · 46 unmodified lines
906	static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)	969	static void arcmsr_init_get_devmap_timer(struct AdapterControlBlock *pacb)
907	{	970	{
908	INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);	971	INIT_WORK(&pacb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
909	atomic_set(&pacb->rq_map_token, 16);
910	atomic_set(&pacb->ante_token_value, 16);
911	pacb->fw_flag = FW_NORMAL;	972	pacb->fw_flag = FW_NORMAL;
912	timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);	973	timer_setup(&pacb->eternal_timer, arcmsr_request_device_map, 0);
913	pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);	974	pacb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
@@ -1009,7 +1070,8 @@ static int arcmsr_probe(struct pci_dev pdev, const struct pci_device_id id) · 95 unmodified lines
1009	if(!error){	1070	if(!error){
1010	goto free_hbb_mu;	1071	goto free_hbb_mu;
1011	}	1072	}
1012	arcmsr_free_io_queue(acb);	1073	if (acb->adapter_type != ACB_ADAPTER_TYPE_F)
		1074	arcmsr_free_io_queue(acb);
1013	error = arcmsr_alloc_ccb_pool(acb);	1075	error = arcmsr_alloc_ccb_pool(acb);
1014	if(error){	1076	if(error){
1015	goto unmap_pci_region;	1077	goto unmap_pci_region;
@@ -1122,6 +1184,14 @@ static int arcmsr_resume(struct pci_dev *pdev) · 106 unmodified lines
1122	acb->out_doorbell = 0;	1184	acb->out_doorbell = 0;
1123	acb->doneq_index = 0;	1185	acb->doneq_index = 0;
1124	break;	1186	break;
		1187	case ACB_ADAPTER_TYPE_F:
		1188	writel(0, &acb->pmuF->host_int_status);
		1189	writel(ARCMSR_HBFMU_DOORBELL_SYNC, &acb->pmuF->iobound_doorbell);
		1190	acb->in_doorbell = 0;
		1191	acb->out_doorbell = 0;
		1192	acb->doneq_index = 0;
		1193	arcmsr_hbaF_assign_regAddr(acb);
		1194	break;
1125	}	1195	}
1126	arcmsr_iop_init(acb);	1196	arcmsr_iop_init(acb);
1127	arcmsr_init_get_devmap_timer(acb);	1197	arcmsr_init_get_devmap_timer(acb);
@@ -1134,6 +1204,8 @@ controller_stop: · 6 unmodified lines
1134	controller_unregister:	1204	controller_unregister:
1135	scsi_remove_host(host);	1205	scsi_remove_host(host);
1136	arcmsr_free_ccb_pool(acb);	1206	arcmsr_free_ccb_pool(acb);
		1207	if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
		1208	arcmsr_free_io_queue(acb);
1137	arcmsr_unmap_pciregion(acb);	1209	arcmsr_unmap_pciregion(acb);
1138	pci_release_regions(pdev);	1210	pci_release_regions(pdev);
1139	scsi_host_put(host);	1211	scsi_host_put(host);
@@ -1213,25 +1285,20 @@ static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) · 73 unmodified lines
1213	{	1285	{
1214	uint8_t rtnval = 0;	1286	uint8_t rtnval = 0;
1215	switch (acb->adapter_type) {	1287	switch (acb->adapter_type) {
1216	case ACB_ADAPTER_TYPE_A: {	1288	case ACB_ADAPTER_TYPE_A:
1217	rtnval = arcmsr_hbaA_abort_allcmd(acb);	1289	rtnval = arcmsr_hbaA_abort_allcmd(acb);
1218	}
1219	break;	1290	break;
1220		1291	case ACB_ADAPTER_TYPE_B:
1221	case ACB_ADAPTER_TYPE_B: {
1222	rtnval = arcmsr_hbaB_abort_allcmd(acb);	1292	rtnval = arcmsr_hbaB_abort_allcmd(acb);
1223	}
1224	break;	1293	break;
1225		1294	case ACB_ADAPTER_TYPE_C:
1226	case ACB_ADAPTER_TYPE_C: {
1227	rtnval = arcmsr_hbaC_abort_allcmd(acb);	1295	rtnval = arcmsr_hbaC_abort_allcmd(acb);
1228	}
1229	break;	1296	break;
1230
1231	case ACB_ADAPTER_TYPE_D:	1297	case ACB_ADAPTER_TYPE_D:
1232	rtnval = arcmsr_hbaD_abort_allcmd(acb);	1298	rtnval = arcmsr_hbaD_abort_allcmd(acb);
1233	break;	1299	break;
1234	case ACB_ADAPTER_TYPE_E:	1300	case ACB_ADAPTER_TYPE_E:
		1301	case ACB_ADAPTER_TYPE_F:
1235	rtnval = arcmsr_hbaE_abort_allcmd(acb);	1302	rtnval = arcmsr_hbaE_abort_allcmd(acb);
1236	break;	1303	break;
1237	}	1304	}
@@ -1307,7 +1374,8 @@ static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) · 69 unmodified lines
1307	writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);	1374	writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1308	}	1375	}
1309	break;	1376	break;
1310	case ACB_ADAPTER_TYPE_E: {	1377	case ACB_ADAPTER_TYPE_E:
		1378	case ACB_ADAPTER_TYPE_F: {
1311	struct MessageUnit_E __iomem *reg = acb->pmuE;	1379	struct MessageUnit_E __iomem *reg = acb->pmuE;
1312	orig_mask = readl(&reg->host_int_mask);	1380	orig_mask = readl(&reg->host_int_mask);
1313	writel(orig_mask \| ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR \| ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);	1381	writel(orig_mask \| ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR \| ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR, &reg->host_int_mask);
@@ -1514,6 +1582,9 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) · 200 unmodified lines
1514	case ACB_ADAPTER_TYPE_E:	1582	case ACB_ADAPTER_TYPE_E:
1515	arcmsr_hbaE_postqueue_isr(acb);	1583	arcmsr_hbaE_postqueue_isr(acb);
1516	break;	1584	break;
		1585	case ACB_ADAPTER_TYPE_F:
		1586	arcmsr_hbaF_postqueue_isr(acb);
		1587	break;
1517	}	1588	}
1518	}	1589	}
1519		1590
@@ -1568,6 +1639,8 @@ static void arcmsr_free_pcidev(struct AdapterControlBlock *acb) · 48 unmodified lines
1568	pdev = acb->pdev;	1639	pdev = acb->pdev;
1569	arcmsr_free_irq(pdev, acb);	1640	arcmsr_free_irq(pdev, acb);
1570	arcmsr_free_ccb_pool(acb);	1641	arcmsr_free_ccb_pool(acb);
		1642	if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
		1643	arcmsr_free_io_queue(acb);
1571	arcmsr_unmap_pciregion(acb);	1644	arcmsr_unmap_pciregion(acb);
1572	pci_release_regions(pdev);	1645	pci_release_regions(pdev);
1573	scsi_host_put(host);	1646	scsi_host_put(host);
@@ -1625,6 +1698,8 @@ static void arcmsr_remove(struct pci_dev *pdev) · 51 unmodified lines
1625	}	1698	}
1626	arcmsr_free_irq(pdev, acb);	1699	arcmsr_free_irq(pdev, acb);
1627	arcmsr_free_ccb_pool(acb);	1700	arcmsr_free_ccb_pool(acb);
		1701	if (acb->adapter_type == ACB_ADAPTER_TYPE_F)
		1702	arcmsr_free_io_queue(acb);
1628	arcmsr_unmap_pciregion(acb);	1703	arcmsr_unmap_pciregion(acb);
1629	pci_release_regions(pdev);	1704	pci_release_regions(pdev);
1630	scsi_host_put(host);	1705	scsi_host_put(host);
@@ -1702,7 +1777,8 @@ static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, · 71 unmodified lines
1702	writel(intmask_org \| mask, reg->pcief0_int_enable);	1777	writel(intmask_org \| mask, reg->pcief0_int_enable);
1703	break;	1778	break;
1704	}	1779	}
1705	case ACB_ADAPTER_TYPE_E: {	1780	case ACB_ADAPTER_TYPE_E:
		1781	case ACB_ADAPTER_TYPE_F: {
1706	struct MessageUnit_E __iomem *reg = acb->pmuE;	1782	struct MessageUnit_E __iomem *reg = acb->pmuE;
1707		1783
1708	mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR \| ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);	1784	mask = ~(ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR \| ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR);
@@ -1846,6 +1922,19 @@ static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandContr · 137 unmodified lines
1846	writel(ccb_post_stamp, &pmu->inbound_queueport_low);	1922	writel(ccb_post_stamp, &pmu->inbound_queueport_low);
1847	break;	1923	break;
1848	}	1924	}
		1925	case ACB_ADAPTER_TYPE_F: {
		1926	struct MessageUnit_F __iomem *pmu = acb->pmuF;
		1927	u32 ccb_post_stamp, arc_cdb_size;
		1928
		1929	if (ccb->arc_cdb_size <= 0x300)
		1930	arc_cdb_size = (ccb->arc_cdb_size - 1) >> 6 \| 1;
		1931	else
		1932	arc_cdb_size = (((ccb->arc_cdb_size + 0xff) >> 8) + 2) << 1 \| 1;
		1933	ccb_post_stamp = (ccb->smid \| arc_cdb_size);
		1934	writel(0, &pmu->inbound_queueport_high);
		1935	writel(ccb_post_stamp, &pmu->inbound_queueport_low);
		1936	break;
		1937	}
1849	}	1938	}
1850	}	1939	}
1851		1940
@@ -1916,23 +2005,20 @@ static void arcmsr_hbaE_stop_bgrb(struct AdapterControlBlock *pACB) · 64 unmodified lines
1916	static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)	2005	static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1917	{	2006	{
1918	switch (acb->adapter_type) {	2007	switch (acb->adapter_type) {
1919	case ACB_ADAPTER_TYPE_A: {	2008	case ACB_ADAPTER_TYPE_A:
1920	arcmsr_hbaA_stop_bgrb(acb);	2009	arcmsr_hbaA_stop_bgrb(acb);
1921	}
1922	break;	2010	break;
1923		2011	case ACB_ADAPTER_TYPE_B:
1924	case ACB_ADAPTER_TYPE_B: {
1925	arcmsr_hbaB_stop_bgrb(acb);	2012	arcmsr_hbaB_stop_bgrb(acb);
1926	}
1927	break;	2013	break;
1928	case ACB_ADAPTER_TYPE_C: {	2014	case ACB_ADAPTER_TYPE_C:
1929	arcmsr_hbaC_stop_bgrb(acb);	2015	arcmsr_hbaC_stop_bgrb(acb);
1930	}
1931	break;	2016	break;
1932	case ACB_ADAPTER_TYPE_D:	2017	case ACB_ADAPTER_TYPE_D:
1933	arcmsr_hbaD_stop_bgrb(acb);	2018	arcmsr_hbaD_stop_bgrb(acb);
1934	break;	2019	break;
1935	case ACB_ADAPTER_TYPE_E:	2020	case ACB_ADAPTER_TYPE_E:
		2021	case ACB_ADAPTER_TYPE_F:
1936	arcmsr_hbaE_stop_bgrb(acb);	2022	arcmsr_hbaE_stop_bgrb(acb);
1937	break;	2023	break;
1938	}	2024	}
@@ -1951,7 +2037,6 @@ static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) · 12 unmodified lines
1951	writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);	2037	writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1952	}	2038	}
1953	break;	2039	break;
1954
1955	case ACB_ADAPTER_TYPE_B: {	2040	case ACB_ADAPTER_TYPE_B: {
1956	struct MessageUnit_B *reg = acb->pmuB;	2041	struct MessageUnit_B *reg = acb->pmuB;
1957	writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);	2042	writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
@@ -1969,7 +2054,8 @@ static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) · 11 unmodified lines
1969	reg->inbound_doorbell);	2054	reg->inbound_doorbell);
1970	}	2055	}
1971	break;	2056	break;
1972	case ACB_ADAPTER_TYPE_E: {	2057	case ACB_ADAPTER_TYPE_E:
		2058	case ACB_ADAPTER_TYPE_F: {
1973	struct MessageUnit_E __iomem *reg = acb->pmuE;	2059	struct MessageUnit_E __iomem *reg = acb->pmuE;
1974	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;	2060	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_READ_OK;
1975	writel(acb->out_doorbell, &reg->iobound_doorbell);	2061	writel(acb->out_doorbell, &reg->iobound_doorbell);
@@ -2015,7 +2101,8 @@ static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) · 39 unmodified lines
2015	reg->inbound_doorbell);	2101	reg->inbound_doorbell);
2016	}	2102	}
2017	break;	2103	break;
2018	case ACB_ADAPTER_TYPE_E: {	2104	case ACB_ADAPTER_TYPE_E:
		2105	case ACB_ADAPTER_TYPE_F: {
2019	struct MessageUnit_E __iomem *reg = acb->pmuE;	2106	struct MessageUnit_E __iomem *reg = acb->pmuE;
2020	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;	2107	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_DATA_WRITE_OK;
2021	writel(acb->out_doorbell, &reg->iobound_doorbell);	2108	writel(acb->out_doorbell, &reg->iobound_doorbell);
@@ -2034,7 +2121,6 @@ struct QBUFFER __iomem arcmsr_get_iop_rqbuffer(struct AdapterControlBlock acb) · 12 unmodified lines
2034	qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;	2121	qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2035	}	2122	}
2036	break;	2123	break;
2037
2038	case ACB_ADAPTER_TYPE_B: {	2124	case ACB_ADAPTER_TYPE_B: {
2039	struct MessageUnit_B *reg = acb->pmuB;	2125	struct MessageUnit_B *reg = acb->pmuB;
2040	qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;	2126	qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
@@ -2055,6 +2141,10 @@ struct QBUFFER __iomem arcmsr_get_iop_rqbuffer(struct AdapterControlBlock acb) · 14 unmodified lines
2055	qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;	2141	qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
2056	}	2142	}
2057	break;	2143	break;
		2144	case ACB_ADAPTER_TYPE_F: {
		2145	qbuffer = (struct QBUFFER __iomem *)acb->message_rbuffer;
		2146	}
		2147	break;
2058	}	2148	}
2059	return qbuffer;	2149	return qbuffer;
2060	}	2150	}
@@ -2069,7 +2159,6 @@ static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBloc · 8 unmodified lines
2069	pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;	2159	pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
2070	}	2160	}
2071	break;	2161	break;
2072
2073	case ACB_ADAPTER_TYPE_B: {	2162	case ACB_ADAPTER_TYPE_B: {
2074	struct MessageUnit_B *reg = acb->pmuB;	2163	struct MessageUnit_B *reg = acb->pmuB;
2075	pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;	2164	pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
@@ -2090,6 +2179,9 @@ static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBloc · 14 unmodified lines
2090	pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;	2179	pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
2091	}	2180	}
2092	break;	2181	break;
		2182	case ACB_ADAPTER_TYPE_F:
		2183	pqbuffer = (struct QBUFFER __iomem *)acb->message_wbuffer;
		2184	break;
2093	}	2185	}
2094	return pqbuffer;	2186	return pqbuffer;
2095	}	2187	}
@@ -2504,6 +2596,36 @@ static void arcmsr_hbaE_postqueue_isr(struct AdapterControlBlock *acb) · 408 unmodified lines
2504	spin_unlock_irqrestore(&acb->doneq_lock, flags);	2596	spin_unlock_irqrestore(&acb->doneq_lock, flags);
2505	}	2597	}
2506		2598
		2599	static void arcmsr_hbaF_postqueue_isr(struct AdapterControlBlock *acb)
		2600	{
		2601	uint32_t doneq_index;
		2602	uint16_t cmdSMID;
		2603	int error;
		2604	struct MessageUnit_F __iomem *phbcmu;
		2605	struct CommandControlBlock *ccb;
		2606	unsigned long flags;
		2607
		2608	spin_lock_irqsave(&acb->doneq_lock, flags);
		2609	doneq_index = acb->doneq_index;
		2610	phbcmu = acb->pmuF;
		2611	while (1) {
		2612	cmdSMID = acb->pCompletionQ[doneq_index].cmdSMID;
		2613	if (cmdSMID == 0xffff)
		2614	break;
		2615	ccb = acb->pccb_pool[cmdSMID];
		2616	error = (acb->pCompletionQ[doneq_index].cmdFlag &
		2617	ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
		2618	arcmsr_drain_donequeue(acb, ccb, error);
		2619	acb->pCompletionQ[doneq_index].cmdSMID = 0xffff;
		2620	doneq_index++;
		2621	if (doneq_index >= acb->completionQ_entry)
		2622	doneq_index = 0;
		2623	}
		2624	acb->doneq_index = doneq_index;
		2625	writel(doneq_index, &phbcmu->reply_post_consumer_index);
		2626	spin_unlock_irqrestore(&acb->doneq_lock, flags);
		2627	}
		2628
2507	/*	2629	/*
2508	**********************************************************************************	2630	**********************************************************************************
2509	** Handle a message interrupt	2631	** Handle a message interrupt
@@ -2694,21 +2816,46 @@ static irqreturn_t arcmsr_hbaE_handle_isr(struct AdapterControlBlock *pACB) · 184 unmodified lines
2694	return IRQ_HANDLED;	2816	return IRQ_HANDLED;
2695	}	2817	}
2696		2818
		2819	static irqreturn_t arcmsr_hbaF_handle_isr(struct AdapterControlBlock *pACB)
		2820	{
		2821	uint32_t host_interrupt_status;
		2822	struct MessageUnit_F __iomem *phbcmu = pACB->pmuF;
		2823
		2824	host_interrupt_status = readl(&phbcmu->host_int_status) &
		2825	(ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR \|
		2826	ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR);
		2827	if (!host_interrupt_status)
		2828	return IRQ_NONE;
		2829	do {
		2830	/* MU post queue interrupts*/
		2831	if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR)
		2832	arcmsr_hbaF_postqueue_isr(pACB);
		2833
		2834	/* MU ioctl transfer doorbell interrupts*/
		2835	if (host_interrupt_status & ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR)
		2836	arcmsr_hbaE_doorbell_isr(pACB);
		2837
		2838	host_interrupt_status = readl(&phbcmu->host_int_status);
		2839	} while (host_interrupt_status & (ARCMSR_HBEMU_OUTBOUND_POSTQUEUE_ISR \|
		2840	ARCMSR_HBEMU_OUTBOUND_DOORBELL_ISR));
		2841	return IRQ_HANDLED;
		2842	}
		2843
2697	static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)	2844	static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2698	{	2845	{
2699	switch (acb->adapter_type) {	2846	switch (acb->adapter_type) {
2700	case ACB_ADAPTER_TYPE_A:	2847	case ACB_ADAPTER_TYPE_A:
2701	return arcmsr_hbaA_handle_isr(acb);	2848	return arcmsr_hbaA_handle_isr(acb);
2702	break;
2703	case ACB_ADAPTER_TYPE_B:	2849	case ACB_ADAPTER_TYPE_B:
2704	return arcmsr_hbaB_handle_isr(acb);	2850	return arcmsr_hbaB_handle_isr(acb);
2705	break;
2706	case ACB_ADAPTER_TYPE_C:	2851	case ACB_ADAPTER_TYPE_C:
2707	return arcmsr_hbaC_handle_isr(acb);	2852	return arcmsr_hbaC_handle_isr(acb);
2708	case ACB_ADAPTER_TYPE_D:	2853	case ACB_ADAPTER_TYPE_D:
2709	return arcmsr_hbaD_handle_isr(acb);	2854	return arcmsr_hbaD_handle_isr(acb);
2710	case ACB_ADAPTER_TYPE_E:	2855	case ACB_ADAPTER_TYPE_E:
2711	return arcmsr_hbaE_handle_isr(acb);	2856	return arcmsr_hbaE_handle_isr(acb);
		2857	case ACB_ADAPTER_TYPE_F:
		2858	return arcmsr_hbaF_handle_isr(acb);
2712	default:	2859	default:
2713	return IRQ_NONE;	2860	return IRQ_NONE;
2714	}	2861	}
@@ -3257,6 +3404,31 @@ static bool arcmsr_hbaE_get_config(struct AdapterControlBlock *pACB) · 542 unmodified lines
3257	return true;	3404	return true;
3258	}	3405	}
3259		3406
		3407	static bool arcmsr_hbaF_get_config(struct AdapterControlBlock *pACB)
		3408	{
		3409	struct MessageUnit_F __iomem *reg = pACB->pmuF;
		3410	uint32_t intmask_org;
		3411
		3412	/* disable all outbound interrupt */
		3413	intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
		3414	writel(intmask_org \| ARCMSR_HBEMU_ALL_INTMASKENABLE, &reg->host_int_mask);
		3415	/* wait firmware ready */
		3416	arcmsr_wait_firmware_ready(pACB);
		3417	/* post "get config" instruction */
		3418	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
		3419
		3420	pACB->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
		3421	writel(pACB->out_doorbell, &reg->iobound_doorbell);
		3422	/* wait message ready */
		3423	if (!arcmsr_hbaE_wait_msgint_ready(pACB)) {
		3424	pr_notice("arcmsr%d: wait get adapter firmware miscellaneous data timeout\n",
		3425	pACB->host->host_no);
		3426	return false;
		3427	}
		3428	arcmsr_get_adapter_config(pACB, pACB->msgcode_rwbuffer);
		3429	return true;
		3430	}
		3431
3260	static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)	3432	static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
3261	{	3433	{
3262	bool rtn = false;	3434	bool rtn = false;
@@ -3277,6 +3449,9 @@ static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) · 14 unmodified lines
3277	case ACB_ADAPTER_TYPE_E:	3449	case ACB_ADAPTER_TYPE_E:
3278	rtn = arcmsr_hbaE_get_config(acb);	3450	rtn = arcmsr_hbaE_get_config(acb);
3279	break;	3451	break;
		3452	case ACB_ADAPTER_TYPE_F:
		3453	rtn = arcmsr_hbaF_get_config(acb);
		3454	break;
3280	default:	3455	default:
3281	break;	3456	break;
3282	}	3457	}
@@ -3634,23 +3809,20 @@ static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, · 351 unmodified lines
3634	int rtn = 0;	3809	int rtn = 0;
3635	switch (acb->adapter_type) {	3810	switch (acb->adapter_type) {
3636		3811
3637	case ACB_ADAPTER_TYPE_A: {	3812	case ACB_ADAPTER_TYPE_A:
3638	rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);	3813	rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3639	}
3640	break;	3814	break;
3641		3815	case ACB_ADAPTER_TYPE_B:
3642	case ACB_ADAPTER_TYPE_B: {
3643	rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);	3816	rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3644	}
3645	break;	3817	break;
3646	case ACB_ADAPTER_TYPE_C: {	3818	case ACB_ADAPTER_TYPE_C:
3647	rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);	3819	rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3648	}
3649	break;	3820	break;
3650	case ACB_ADAPTER_TYPE_D:	3821	case ACB_ADAPTER_TYPE_D:
3651	rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);	3822	rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3652	break;	3823	break;
3653	case ACB_ADAPTER_TYPE_E:	3824	case ACB_ADAPTER_TYPE_E:
		3825	case ACB_ADAPTER_TYPE_F:
3654	rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);	3826	rtn = arcmsr_hbaE_polling_ccbdone(acb, poll_ccb);
3655	break;	3827	break;
3656	}	3828	}
@@ -3731,6 +3903,16 @@ static void arcmsr_set_iop_datetime(struct timer_list *t) · 74 unmodified lines
3731	writel(pacb->out_doorbell, &reg->iobound_doorbell);	3903	writel(pacb->out_doorbell, &reg->iobound_doorbell);
3732	break;	3904	break;
3733	}	3905	}
		3906	case ACB_ADAPTER_TYPE_F: {
		3907	struct MessageUnit_F __iomem *reg = pacb->pmuF;
		3908
		3909	pacb->msgcode_rwbuffer[0] = datetime.b.msg_time[0];
		3910	pacb->msgcode_rwbuffer[1] = datetime.b.msg_time[1];
		3911	writel(ARCMSR_INBOUND_MESG0_SYNC_TIMER, &reg->inbound_msgaddr0);
		3912	pacb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
		3913	writel(pacb->out_doorbell, &reg->iobound_doorbell);
		3914	break;
		3915	}
3734	}	3916	}
3735	if (sys_tz.tz_minuteswest)	3917	if (sys_tz.tz_minuteswest)
3736	next_time = ARCMSR_HOURS;	3918	next_time = ARCMSR_HOURS;
@@ -3756,6 +3938,7 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) · 19 unmodified lines
3756	dma_coherent_handle = acb->dma_coherent_handle2;	3938	dma_coherent_handle = acb->dma_coherent_handle2;
3757	break;	3939	break;
3758	case ACB_ADAPTER_TYPE_E:	3940	case ACB_ADAPTER_TYPE_E:
		3941	case ACB_ADAPTER_TYPE_F:
3759	dma_coherent_handle = acb->dma_coherent_handle +	3942	dma_coherent_handle = acb->dma_coherent_handle +
3760	offsetof(struct CommandControlBlock, arcmsr_cdb);	3943	offsetof(struct CommandControlBlock, arcmsr_cdb);
3761	break;	3944	break;
@@ -3873,11 +4056,8 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) · 111 unmodified lines
3873	writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);	4056	writel(cdb_phyaddr, &reg->msgcode_rwbuffer[2]);
3874	writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);	4057	writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[3]);
3875	writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);	4058	writel(acb->ccbsize, &reg->msgcode_rwbuffer[4]);
3876	dma_coherent_handle = acb->dma_coherent_handle2;	4059	writel(lower_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[5]);
3877	cdb_phyaddr = (uint32_t)(dma_coherent_handle & 0xffffffff);	4060	writel(upper_32_bits(acb->dma_coherent_handle2), &reg->msgcode_rwbuffer[6]);
3878	cdb_phyaddr_hi32 = (uint32_t)((dma_coherent_handle >> 16) >> 16);
3879	writel(cdb_phyaddr, &reg->msgcode_rwbuffer[5]);
3880	writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[6]);
3881	writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);	4061	writel(acb->ioqueue_size, &reg->msgcode_rwbuffer[7]);
3882	writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);	4062	writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3883	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;	4063	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
@@ -3889,6 +4069,27 @@ static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) · 5 unmodified lines
3889	}	4069	}
3890	}	4070	}
3891	break;	4071	break;
		4072	case ACB_ADAPTER_TYPE_F: {
		4073	struct MessageUnit_F __iomem *reg = acb->pmuF;
		4074
		4075	acb->msgcode_rwbuffer[0] = ARCMSR_SIGNATURE_SET_CONFIG;
		4076	acb->msgcode_rwbuffer[1] = ARCMSR_SIGNATURE_1886;
		4077	acb->msgcode_rwbuffer[2] = cdb_phyaddr;
		4078	acb->msgcode_rwbuffer[3] = cdb_phyaddr_hi32;
		4079	acb->msgcode_rwbuffer[4] = acb->ccbsize;
		4080	acb->msgcode_rwbuffer[5] = lower_32_bits(acb->dma_coherent_handle2);
		4081	acb->msgcode_rwbuffer[6] = upper_32_bits(acb->dma_coherent_handle2);
		4082	acb->msgcode_rwbuffer[7] = acb->completeQ_size;
		4083	writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
		4084	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
		4085	writel(acb->out_doorbell, &reg->iobound_doorbell);
		4086	if (!arcmsr_hbaE_wait_msgint_ready(acb)) {
		4087	pr_notice("arcmsr%d: 'set command Q window' timeout\n",
		4088	acb->host->host_no);
		4089	return 1;
		4090	}
		4091	}
		4092	break;
3892	}	4093	}
3893	return 0;	4094	return 0;
3894	}	4095	}
@@ -3937,7 +4138,8 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) · 42 unmodified lines
3937	ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);	4138	ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3938	}	4139	}
3939	break;	4140	break;
3940	case ACB_ADAPTER_TYPE_E: {	4141	case ACB_ADAPTER_TYPE_E:
		4142	case ACB_ADAPTER_TYPE_F: {
3941	struct MessageUnit_E __iomem *reg = acb->pmuE;	4143	struct MessageUnit_E __iomem *reg = acb->pmuE;
3942	do {	4144	do {
3943	if (!(acb->acb_flags & ACB_F_IOP_INITED))	4145	if (!(acb->acb_flags & ACB_F_IOP_INITED))
@@ -3952,24 +4154,10 @@ static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) · 8 unmodified lines
3952	static void arcmsr_request_device_map(struct timer_list *t)	4154	static void arcmsr_request_device_map(struct timer_list *t)
3953	{	4155	{
3954	struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);	4156	struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer);
3955	if (unlikely(atomic_read(&acb->rq_map_token) == 0) \|\|	4157	if (acb->acb_flags & (ACB_F_MSG_GET_CONFIG \| ACB_F_BUS_RESET \| ACB_F_ABORT)) {
3956	(acb->acb_flags & ACB_F_BUS_RESET) \|\|	4158	mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3957	(acb->acb_flags & ACB_F_ABORT)) {
3958	mod_timer(&acb->eternal_timer,
3959	jiffies + msecs_to_jiffies(6 * HZ));
3960	} else {	4159	} else {
3961	acb->fw_flag = FW_NORMAL;	4160	acb->fw_flag = FW_NORMAL;
3962	if (atomic_read(&acb->ante_token_value) ==
3963	atomic_read(&acb->rq_map_token)) {
3964	atomic_set(&acb->rq_map_token, 16);
3965	}
3966	atomic_set(&acb->ante_token_value,
3967	atomic_read(&acb->rq_map_token));
3968	if (atomic_dec_and_test(&acb->rq_map_token)) {
3969	mod_timer(&acb->eternal_timer, jiffies +
3970	msecs_to_jiffies(6 * HZ));
3971	return;
3972	}
3973	switch (acb->adapter_type) {	4161	switch (acb->adapter_type) {
3974	case ACB_ADAPTER_TYPE_A: {	4162	case ACB_ADAPTER_TYPE_A: {
3975	struct MessageUnit_A __iomem *reg = acb->pmuA;	4163	struct MessageUnit_A __iomem *reg = acb->pmuA;
@@ -3999,10 +4187,23 @@ static void arcmsr_request_device_map(struct timer_list *t) · 23 unmodified lines
3999	writel(acb->out_doorbell, &reg->iobound_doorbell);	4187	writel(acb->out_doorbell, &reg->iobound_doorbell);
4000	break;	4188	break;
4001	}	4189	}
		4190	case ACB_ADAPTER_TYPE_F: {
		4191	struct MessageUnit_F __iomem *reg = acb->pmuF;
		4192	uint32_t outMsg1 = readl(&reg->outbound_msgaddr1);
		4193
		4194	if (!(outMsg1 & ARCMSR_HBFMU_MESSAGE_FIRMWARE_OK) \|\|
		4195	(outMsg1 & ARCMSR_HBFMU_MESSAGE_NO_VOLUME_CHANGE))
		4196	goto nxt6s;
		4197	writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
		4198	acb->out_doorbell ^= ARCMSR_HBEMU_DRV2IOP_MESSAGE_CMD_DONE;
		4199	writel(acb->out_doorbell, &reg->iobound_doorbell);
		4200	break;
		4201	}
4002	default:	4202	default:
4003	return;	4203	return;
4004	}	4204	}
4005	acb->acb_flags \|= ACB_F_MSG_GET_CONFIG;	4205	acb->acb_flags \|= ACB_F_MSG_GET_CONFIG;
		4206	nxt6s:
4006	mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));	4207	mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
4007	}	4208	}
4008	}	4209	}
@@ -4084,6 +4285,7 @@ static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) · 75 unmodified lines
4084	arcmsr_hbaD_start_bgrb(acb);	4285	arcmsr_hbaD_start_bgrb(acb);
4085	break;	4286	break;
4086	case ACB_ADAPTER_TYPE_E:	4287	case ACB_ADAPTER_TYPE_E:
		4288	case ACB_ADAPTER_TYPE_F:
4087	arcmsr_hbaE_start_bgrb(acb);	4289	arcmsr_hbaE_start_bgrb(acb);
4088	break;	4290	break;
4089	}	4291	}
@@ -4163,7 +4365,8 @@ static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) · 73 unmodified lines
4163	}	4365	}
4164	}	4366	}
4165	break;	4367	break;
4166	case ACB_ADAPTER_TYPE_E: {	4368	case ACB_ADAPTER_TYPE_E:
		4369	case ACB_ADAPTER_TYPE_F: {
4167	struct MessageUnit_E __iomem *reg = acb->pmuE;	4370	struct MessageUnit_E __iomem *reg = acb->pmuE;
4168	uint32_t i, tmp;	4371	uint32_t i, tmp;
4169		4372
@@ -4290,7 +4493,8 @@ static bool arcmsr_reset_in_progress(struct AdapterControlBlock *acb) · 120 unmodified lines
4290	true : false;	4493	true : false;
4291	}	4494	}
4292	break;	4495	break;
4293	case ACB_ADAPTER_TYPE_E:{	4496	case ACB_ADAPTER_TYPE_E:
		4497	case ACB_ADAPTER_TYPE_F:{
4294	struct MessageUnit_E __iomem *reg = acb->pmuE;	4498	struct MessageUnit_E __iomem *reg = acb->pmuE;
4295	rtn = (readl(&reg->host_diagnostic_3xxx) &	4499	rtn = (readl(&reg->host_diagnostic_3xxx) &
4296	ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;	4500	ARCMSR_ARC188X_RESET_ADAPTER) ? true : false;
@@ -4389,8 +4593,6 @@ wait_reset_done: · 92 unmodified lines
4389	goto wait_reset_done;	4593	goto wait_reset_done;
4390	}	4594	}
4391	arcmsr_iop_init(acb);	4595	arcmsr_iop_init(acb);
4392	atomic_set(&acb->rq_map_token, 16);
4393	atomic_set(&acb->ante_token_value, 16);
4394	acb->fw_flag = FW_NORMAL;	4596	acb->fw_flag = FW_NORMAL;
4395	mod_timer(&acb->eternal_timer, jiffies +	4597	mod_timer(&acb->eternal_timer, jiffies +
4396	msecs_to_jiffies(6 * HZ));	4598	msecs_to_jiffies(6 * HZ));
@@ -4399,8 +4601,6 @@ wait_reset_done: · 2 unmodified lines
4399	pr_notice("arcmsr: scsi bus reset eh returns with success\n");	4601	pr_notice("arcmsr: scsi bus reset eh returns with success\n");
4400	} else {	4602	} else {
4401	acb->acb_flags &= ~ACB_F_BUS_RESET;	4603	acb->acb_flags &= ~ACB_F_BUS_RESET;
4402	atomic_set(&acb->rq_map_token, 16);
4403	atomic_set(&acb->ante_token_value, 16);
4404	acb->fw_flag = FW_NORMAL;	4604	acb->fw_flag = FW_NORMAL;
4405	mod_timer(&acb->eternal_timer, jiffies +	4605	mod_timer(&acb->eternal_timer, jiffies +
4406	msecs_to_jiffies(6 * HZ));	4606	msecs_to_jiffies(6 * HZ));
@@ -4493,6 +4693,9 @@ static const char arcmsr_info(struct Scsi_Host host) · 86 unmodified lines
4493	case PCI_DEVICE_ID_ARECA_1884:	4693	case PCI_DEVICE_ID_ARECA_1884:
4494	type = "SAS/SATA";	4694	type = "SAS/SATA";
4495	break;	4695	break;
		4696	case PCI_DEVICE_ID_ARECA_1886:
		4697	type = "NVMe/SAS/SATA";
		4698	break;
4496	default:	4699	default:
4497	type = "unknown";	4700	type = "unknown";
4498	raid6 = 0;	4701	raid6 = 0;

drivers/scsi/bfa/bfad.c+1−0

@@ -749,6 +749,7 @@ bfad_pci_init(struct pci_dev pdev, struct bfad_s bfad) · 748 unmodified lines
749		749
750	if (bfad->pci_bar0_kva == NULL) {	750	if (bfad->pci_bar0_kva == NULL) {
751	printk(KERN_ERR "Fail to map bar0\n");	751	printk(KERN_ERR "Fail to map bar0\n");
		752	rc = -ENODEV;
752	goto out_release_region;	753	goto out_release_region;
753	}	754	}
754		755

drivers/scsi/dc395x.c+1−24

@@ -4721,30 +4721,7 @@ static struct pci_driver dc395x_driver = { · 4720 unmodified lines
4721	.probe = dc395x_init_one,	4721	.probe = dc395x_init_one,
4722	.remove = dc395x_remove_one,	4722	.remove = dc395x_remove_one,
4723	};	4723	};
4724		4724	module_pci_driver(dc395x_driver);
4725
4726	/**
4727	* dc395x_module_init - Module initialization function
4728	*
4729	* Used by both module and built-in driver to initialise this driver.
4730	**/
4731	static int __init dc395x_module_init(void)
4732	{
4733	return pci_register_driver(&dc395x_driver);
4734	}
4735
4736
4737	/**
4738	* dc395x_module_exit - Module cleanup function.
4739	**/
4740	static void __exit dc395x_module_exit(void)
4741	{
4742	pci_unregister_driver(&dc395x_driver);
4743	}
4744
4745
4746	module_init(dc395x_module_init);
4747	module_exit(dc395x_module_exit);
4748		4725
4749	MODULE_AUTHOR("C.L. Huang / Erich Chen / Kurt Garloff");	4726	MODULE_AUTHOR("C.L. Huang / Erich Chen / Kurt Garloff");
4750	MODULE_DESCRIPTION("SCSI host adapter driver for Tekram TRM-S1040 based adapters: Tekram DC395 and DC315 series");	4727	MODULE_DESCRIPTION("SCSI host adapter driver for Tekram TRM-S1040 based adapters: Tekram DC395 and DC315 series");

drivers/scsi/fcoe/fcoe_sysfs.c+1−7

 int __init fcoe_sysfs_setup(void)
 {
-	int error;
 	atomic_set(&ctlr_num, 0);
 	atomic_set(&fcf_num, 0);
-	error = bus_register(&fcoe_bus_type);
+	return bus_register(&fcoe_bus_type);
-	if (error)
-		return error;
-	return 0;
 }
 void __exit fcoe_sysfs_teardown(void)

drivers/scsi/fnic/vnic_wq_copy.c+1−7

 		       unsigned int index, unsigned int desc_count,
 		       unsigned int desc_size)
 {
-	int err;
 	wq->index = index;
 	wq->vdev = vdev;
 	wq->to_use_index = wq->to_clean_index = 0;
 	vnic_wq_copy_disable(wq);
-	err = vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
+	return vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size);
-	if (err)
-		return err;
-	return 0;
 }
 void vnic_wq_copy_init(struct vnic_wq_copy *wq, unsigned int cq_index,

drivers/scsi/gdth.c+76−75

 }
 #endif
-static void __init internal_setup(char *str,int *ints)
-{
-    int i;
-    char *cur_str, *argv;
-    TRACE2(("internal_setup() str %s ints[0] %d\n",
-            str ? str:"NULL", ints ? ints[0]:0));
-    /* analyse string */
-    argv = str;
-    while (argv && (cur_str = strchr(argv, ':'))) {
-        int val = 0, c = *++cur_str;
-        if (c == 'n' || c == 'N')
-            val = 0;
-        else if (c == 'y' || c == 'Y')
-            val = 1;
-        else
-            val = (int)simple_strtoul(cur_str, NULL, 0);
-        if (!strncmp(argv, "disable:", 8))
-            disable = val;
-        else if (!strncmp(argv, "reserve_mode:", 13))
-            reserve_mode = val;
-        else if (!strncmp(argv, "reverse_scan:", 13))
-            reverse_scan = val;
-        else if (!strncmp(argv, "hdr_channel:", 12))
-            hdr_channel = val;
-        else if (!strncmp(argv, "max_ids:", 8))
-            max_ids = val;
-        else if (!strncmp(argv, "rescan:", 7))
-            rescan = val;
-        else if (!strncmp(argv, "shared_access:", 14))
-            shared_access = val;
-        else if (!strncmp(argv, "reserve_list:", 13)) {
-            reserve_list[0] = val;
-            for (i = 1; i < MAX_RES_ARGS; i++) {
-                cur_str = strchr(cur_str, ',');
-                if (!cur_str)
-                    break;
-                if (!isdigit((int)*++cur_str)) {
-                    --cur_str;
-                    break;
-                }
-                reserve_list[i] =
-                    (int)simple_strtoul(cur_str, NULL, 0);
-            }
-            if (!cur_str)
-                break;
-            argv = ++cur_str;
-            continue;
-        }
-        if ((argv = strchr(argv, ',')))
-            ++argv;
-    }
-}
-int __init option_setup(char *str)
-{
-    int ints[MAXHA];
-    char *cur = str;
-    int i = 1;
-    TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
-    while (cur && isdigit(*cur) && i < MAXHA) {
-        ints[i++] = simple_strtoul(cur, NULL, 0);
-        if ((cur = strchr(cur, ',')) != NULL) cur++;
-    }
-    ints[0] = i - 1;
-    internal_setup(cur, ints);
-    return 1;
-}
 static const char *gdth_ctr_name(gdth_ha_str *ha)
 {
 module_exit(gdth_exit);
 #ifndef MODULE
+static void __init internal_setup(char *str,int *ints)
+{
+    int i;
+    char *cur_str, *argv;
+    TRACE2(("internal_setup() str %s ints[0] %d\n",
+            str ? str:"NULL", ints ? ints[0]:0));
+    /* analyse string */
+    argv = str;
+    while (argv && (cur_str = strchr(argv, ':'))) {
+        int val = 0, c = *++cur_str;
+        if (c == 'n' || c == 'N')
+            val = 0;
+        else if (c == 'y' || c == 'Y')
+            val = 1;
+        else
+            val = (int)simple_strtoul(cur_str, NULL, 0);
+        if (!strncmp(argv, "disable:", 8))
+            disable = val;
+        else if (!strncmp(argv, "reserve_mode:", 13))
+            reserve_mode = val;
+        else if (!strncmp(argv, "reverse_scan:", 13))
+            reverse_scan = val;
+        else if (!strncmp(argv, "hdr_channel:", 12))
+            hdr_channel = val;
+        else if (!strncmp(argv, "max_ids:", 8))
+            max_ids = val;
+        else if (!strncmp(argv, "rescan:", 7))
+            rescan = val;
+        else if (!strncmp(argv, "shared_access:", 14))
+            shared_access = val;
+        else if (!strncmp(argv, "reserve_list:", 13)) {
+            reserve_list[0] = val;
+            for (i = 1; i < MAX_RES_ARGS; i++) {
+                cur_str = strchr(cur_str, ',');
+                if (!cur_str)
+                    break;
+                if (!isdigit((int)*++cur_str)) {
+                    --cur_str;
+                    break;
+                }
+                reserve_list[i] =
+                    (int)simple_strtoul(cur_str, NULL, 0);
+            }
+            if (!cur_str)
+                break;
+            argv = ++cur_str;
+            continue;
+        }
+        if ((argv = strchr(argv, ',')))
+            ++argv;
+    }
+}
+static int __init option_setup(char *str)
+{
+    int ints[MAXHA];
+    char *cur = str;
+    int i = 1;
+    TRACE2(("option_setup() str %s\n", str ? str:"NULL"));
+    while (cur && isdigit(*cur) && i < MAXHA) {
+        ints[i++] = simple_strtoul(cur, NULL, 0);
+        if ((cur = strchr(cur, ',')) != NULL) cur++;
+    }
+    ints[0] = i - 1;
+    internal_setup(cur, ints);
+    return 1;
+}
 __setup("gdth=", option_setup);
 #endif

drivers/scsi/initio.c+1−13

@@ -2962,20 +2962,8 @@ static struct pci_driver initio_pci_driver = { · 2961 unmodified lines
2962	.probe = initio_probe_one,	2962	.probe = initio_probe_one,
2963	.remove = initio_remove_one,	2963	.remove = initio_remove_one,
2964	};	2964	};
2965		2965	module_pci_driver(initio_pci_driver);
2966	static int __init initio_init_driver(void)
2967	{
2968	return pci_register_driver(&initio_pci_driver);
2969	}
2970
2971	static void __exit initio_exit_driver(void)
2972	{
2973	pci_unregister_driver(&initio_pci_driver);
2974	}
2975		2966
2976	MODULE_DESCRIPTION("Initio INI-9X00U/UW SCSI device driver");	2967	MODULE_DESCRIPTION("Initio INI-9X00U/UW SCSI device driver");
2977	MODULE_AUTHOR("Initio Corporation");	2968	MODULE_AUTHOR("Initio Corporation");
2978	MODULE_LICENSE("GPL");	2969	MODULE_LICENSE("GPL");
2979
2980	module_init(initio_init_driver);
2981	module_exit(initio_exit_driver);

drivers/scsi/isci/remote_node_table.h+1−1

@@ -61,7 +61,7 @@ · 60 unmodified lines
61	/**	61	/**
62	*	62	*
63	*	63	*
64	* Remote node sets are sets of remote node index in the remtoe node table The	64	* Remote node sets are sets of remote node index in the remote node table. The
65	* SCU hardware requires that STP remote node entries take three consecutive	65	* SCU hardware requires that STP remote node entries take three consecutive
66	* remote node index so the table is arranged in sets of three. The bits are	66	* remote node index so the table is arranged in sets of three. The bits are
67	* used as 0111 0111 to make a byte and the bits define the set of three remote	67	* used as 0111 0111 to make a byte and the bits define the set of three remote

drivers/scsi/myrb.c+2−3

 		enquiry2->fw.turn_id = 0;
 	}
 	snprintf(cb->fw_version, sizeof(cb->fw_version),
-		"%d.%02d-%c-%02d",
+		"%u.%02u-%c-%02u",
 		enquiry2->fw.major_version,
 		enquiry2->fw.minor_version,
 		enquiry2->fw.firmware_type,
 	struct Scsi_Host *shost = class_to_shost(dev);
 	struct myrb_hba *cb = shost_priv(shost);
-	return snprintf(buf, 20, "%d\n", cb->ctlr_num);
+	return snprintf(buf, 20, "%u\n", cb->ctlr_num);
 }
 static DEVICE_ATTR_RO(ctlr_num);
 	DAC960_LA_disable_intr(base);
 	DAC960_LA_ack_hw_mbox_status(base);
 	udelay(1000);
-	timeout = 0;
 	while (DAC960_LA_init_in_progress(base) &&
 	       timeout < MYRB_MAILBOX_TIMEOUT) {
 		if (DAC960_LA_read_error_status(base, &error,

drivers/scsi/pm8001/pm8001_ctl.c+4−2

 	int offset;
 	char *str = buf;
 	int start = 0;
+	u32 ib_offset = pm8001_ha->ib_offset;
 #define IB_MEMMAP(c)	\
 		(*(u32 *)((u8 *)pm8001_ha->	\
-		memoryMap.region[IB].virt_ptr +	\
+		memoryMap.region[ib_offset].virt_ptr +	\
 		pm8001_ha->evtlog_ib_offset + (c)))
 	for (offset = 0; offset < IB_OB_READ_TIMES; offset++) {
 	int offset;
 	char *str = buf;
 	int start = 0;
+	u32 ob_offset = pm8001_ha->ob_offset;
 #define OB_MEMMAP(c)	\
 		(*(u32 *)((u8 *)pm8001_ha->	\
-		memoryMap.region[OB].virt_ptr +	\
+		memoryMap.region[ob_offset].virt_ptr +	\
 		pm8001_ha->evtlog_ob_offset + (c)))
 	for (offset = 0; offset < IB_OB_READ_TIMES; offset++) {

drivers/scsi/pm8001/pm8001_defs.h+13−14

 };
 /* driver compile-time configuration */
-#define	PM8001_MAX_CCB		 256	/* max ccbs supported */
+#define	PM8001_MAX_CCB		 1024	/* max ccbs supported */
 #define PM8001_MPI_QUEUE         1024   /* maximum mpi queue entries */
-#define	PM8001_MAX_INB_NUM	 1
+#define	PM8001_MAX_INB_NUM	 64
-#define	PM8001_MAX_OUTB_NUM	 1
+#define	PM8001_MAX_OUTB_NUM	 64
-#define	PM8001_MAX_SPCV_INB_NUM		1
-#define	PM8001_MAX_SPCV_OUTB_NUM	4
 #define	PM8001_CAN_QUEUE	 508	/* SCSI Queue depth */
 /* Inbound/Outbound queue size */
 #define	PM8001_MAX_PORTS	 16	/* max. possible ports */
 #define	PM8001_MAX_DEVICES	 2048	/* max supported device */
 #define	PM8001_MAX_MSIX_VEC	 64	/* max msi-x int for spcv/ve */
+#define	PM8001_RESERVE_SLOT	 8
-#define USI_MAX_MEMCNT_BASE	5
-#define IB			(USI_MAX_MEMCNT_BASE + 1)
-#define CI			(IB + PM8001_MAX_SPCV_INB_NUM)
-#define OB			(CI + PM8001_MAX_SPCV_INB_NUM)
-#define PI			(OB + PM8001_MAX_SPCV_OUTB_NUM)
-#define USI_MAX_MEMCNT		(PI + PM8001_MAX_SPCV_OUTB_NUM)
 #define	CONFIG_SCSI_PM8001_MAX_DMA_SG	528
 #define PM8001_MAX_DMA_SG	CONFIG_SCSI_PM8001_MAX_DMA_SG
 enum memory_region_num {
 	AAP1 = 0x0, /* application acceleration processor */
 	IOP,	    /* IO processor */
 	NVMD,	    /* NVM device */
-	DEV_MEM,    /* memory for devices */
-	CCB_MEM,    /* memory for command control block */
 	FW_FLASH,    /* memory for fw flash update */
-	FORENSIC_MEM  /* memory for fw forensic data */
+	FORENSIC_MEM,  /* memory for fw forensic data */
+	USI_MAX_MEMCNT_BASE
 };
 #define	PM8001_EVENT_LOG_SIZE	 (128 * 1024)
+/**
+ * maximum DMA memory regions(number of IBQ + number of IBQ CI
+ * + number of  OBQ + number of OBQ PI)
+ */
+#define USI_MAX_MEMCNT	(USI_MAX_MEMCNT_BASE + ((2 * PM8001_MAX_INB_NUM) \
+			+ (2 * PM8001_MAX_OUTB_NUM)))
 /*error code*/
 enum mpi_err {
 	MPI_IO_STATUS_SUCCESS = 0x0,

drivers/scsi/pm8001/pm8001_hwi.c+20−18

 	u32 offsetib, offsetob;
 	void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;
 	void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;
+	u32 ib_offset = pm8001_ha->ib_offset;
+	u32 ob_offset = pm8001_ha->ob_offset;
+	u32 ci_offset = pm8001_ha->ci_offset;
+	u32 pi_offset = pm8001_ha->pi_offset;
 	pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_q_nppd_hppd		= 0;
 	pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_hw_event_pid0_3	= 0;
 		pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt	=
 			PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x00<<30);
 		pm8001_ha->inbnd_q_tbl[i].upper_base_addr	=
-			pm8001_ha->memoryMap.region[IB + i].phys_addr_hi;
+			pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi;
 		pm8001_ha->inbnd_q_tbl[i].lower_base_addr	=
-		pm8001_ha->memoryMap.region[IB + i].phys_addr_lo;
+		pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo;
 		pm8001_ha->inbnd_q_tbl[i].base_virt		=
-			(u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr;
+		  (u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr;
 		pm8001_ha->inbnd_q_tbl[i].total_length		=
-			pm8001_ha->memoryMap.region[IB + i].total_len;
+			pm8001_ha->memoryMap.region[ib_offset + i].total_len;
 		pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr	=
-			pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;
+			pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi;
 		pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr	=
-			pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;
+			pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo;
 		pm8001_ha->inbnd_q_tbl[i].ci_virt		=
-			pm8001_ha->memoryMap.region[CI + i].virt_ptr;
+			pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr;
 		offsetib = i * 0x20;
 		pm8001_ha->inbnd_q_tbl[i].pi_pci_bar		=
 			get_pci_bar_index(pm8001_mr32(addressib,
 		pm8001_ha->outbnd_q_tbl[i].element_size_cnt	=
 			PM8001_MPI_QUEUE | (pm8001_ha->iomb_size << 16) | (0x01<<30);
 		pm8001_ha->outbnd_q_tbl[i].upper_base_addr	=
-			pm8001_ha->memoryMap.region[OB + i].phys_addr_hi;
+			pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi;
 		pm8001_ha->outbnd_q_tbl[i].lower_base_addr	=
-			pm8001_ha->memoryMap.region[OB + i].phys_addr_lo;
+			pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo;
 		pm8001_ha->outbnd_q_tbl[i].base_virt		=
-			(u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr;
+		  (u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr;
 		pm8001_ha->outbnd_q_tbl[i].total_length		=
-			pm8001_ha->memoryMap.region[OB + i].total_len;
+			pm8001_ha->memoryMap.region[ob_offset + i].total_len;
 		pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr	=
-			pm8001_ha->memoryMap.region[PI + i].phys_addr_hi;
+			pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi;
 		pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr	=
-			pm8001_ha->memoryMap.region[PI + i].phys_addr_lo;
+			pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo;
 		pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay	=
 			0 | (10 << 16) | (i << 24);
 		pm8001_ha->outbnd_q_tbl[i].pi_virt		=
-			pm8001_ha->memoryMap.region[PI + i].virt_ptr;
+			pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr;
 		offsetob = i * 0x24;
 		pm8001_ha->outbnd_q_tbl[i].ci_pci_bar		=
 			get_pci_bar_index(pm8001_mr32(addressob,
 	/* fill in PRD (scatter/gather) table, if any */
 	if (task->num_scatter > 1) {
 		pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd);
-		phys_addr = ccb->ccb_dma_handle +
+		phys_addr = ccb->ccb_dma_handle;
-				offsetof(struct pm8001_ccb_info, buf_prd[0]);
 		ssp_cmd.addr_low = cpu_to_le32(lower_32_bits(phys_addr));
 		ssp_cmd.addr_high = cpu_to_le32(upper_32_bits(phys_addr));
 		ssp_cmd.esgl = cpu_to_le32(1<<31);
 	/* fill in PRD (scatter/gather) table, if any */
 	if (task->num_scatter > 1) {
 		pm8001_chip_make_sg(task->scatter, ccb->n_elem, ccb->buf_prd);
-		phys_addr = ccb->ccb_dma_handle +
+		phys_addr = ccb->ccb_dma_handle;
-				offsetof(struct pm8001_ccb_info, buf_prd[0]);
 		sata_cmd.addr_low = lower_32_bits(phys_addr);
 		sata_cmd.addr_high = upper_32_bits(phys_addr);
 		sata_cmd.esgl = cpu_to_le32(1 << 31);

drivers/scsi/pm8001/pm8001_init.c+150−71

 		" 8: Link rate 12.0G\n");
 static struct scsi_transport_template *pm8001_stt;
+static int pm8001_init_ccb_tag(struct pm8001_hba_info *, struct Scsi_Host *, struct pci_dev *);
 /*
  * chip info structure to identify chip key functionality as
 static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha,
 			const struct pci_device_id *ent)
 {
-	int i;
+	int i, count = 0, rc = 0;
+	u32 ci_offset, ib_offset, ob_offset, pi_offset;
+	struct inbound_queue_table *circularQ;
 	spin_lock_init(&pm8001_ha->lock);
 	spin_lock_init(&pm8001_ha->bitmap_lock);
 	PM8001_INIT_DBG(pm8001_ha,
 		pm8001_printk("pm8001_alloc: PHY:%x\n",
 				pm8001_ha->chip->n_phy));
+	/* Setup Interrupt */
+	rc = pm8001_setup_irq(pm8001_ha);
+	if (rc) {
+		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
+				"pm8001_setup_irq failed [ret: %d]\n", rc));
+		goto err_out_shost;
+	}
+	/* Request Interrupt */
+	rc = pm8001_request_irq(pm8001_ha);
+	if (rc)
+		goto err_out_shost;
+	count = pm8001_ha->max_q_num;
+	/* Queues are chosen based on the number of cores/msix availability */
+	ib_offset = pm8001_ha->ib_offset  = USI_MAX_MEMCNT_BASE;
+	ci_offset = pm8001_ha->ci_offset  = ib_offset + count;
+	ob_offset = pm8001_ha->ob_offset  = ci_offset + count;
+	pi_offset = pm8001_ha->pi_offset  = ob_offset + count;
+	pm8001_ha->max_memcnt = pi_offset + count;
 	for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
 		pm8001_phy_init(pm8001_ha, i);
 		pm8001_ha->port[i].wide_port_phymap = 0;
 		INIT_LIST_HEAD(&pm8001_ha->port[i].list);
 	}
-	pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL);
-	if (!pm8001_ha->tags)
-		goto err_out;
 	/* MPI Memory region 1 for AAP Event Log for fw */
 	pm8001_ha->memoryMap.region[AAP1].num_elements = 1;
 	pm8001_ha->memoryMap.region[AAP1].element_size = PM8001_EVENT_LOG_SIZE;
 	pm8001_ha->memoryMap.region[IOP].total_len = PM8001_EVENT_LOG_SIZE;
 	pm8001_ha->memoryMap.region[IOP].alignment = 32;
-	for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {
+	for (i = 0; i < count; i++) {
+		circularQ = &pm8001_ha->inbnd_q_tbl[i];
+		spin_lock_init(&circularQ->iq_lock);
 		/* MPI Memory region 3 for consumer Index of inbound queues */
-		pm8001_ha->memoryMap.region[CI+i].num_elements = 1;
+		pm8001_ha->memoryMap.region[ci_offset+i].num_elements = 1;
-		pm8001_ha->memoryMap.region[CI+i].element_size = 4;
+		pm8001_ha->memoryMap.region[ci_offset+i].element_size = 4;
-		pm8001_ha->memoryMap.region[CI+i].total_len = 4;
+		pm8001_ha->memoryMap.region[ci_offset+i].total_len = 4;
-		pm8001_ha->memoryMap.region[CI+i].alignment = 4;
+		pm8001_ha->memoryMap.region[ci_offset+i].alignment = 4;
 		if ((ent->driver_data) != chip_8001) {
 			/* MPI Memory region 5 inbound queues */
-			pm8001_ha->memoryMap.region[IB+i].num_elements =
+			pm8001_ha->memoryMap.region[ib_offset+i].num_elements =
 						PM8001_MPI_QUEUE;
-			pm8001_ha->memoryMap.region[IB+i].element_size = 128;
+			pm8001_ha->memoryMap.region[ib_offset+i].element_size
-			pm8001_ha->memoryMap.region[IB+i].total_len =
+								= 128;
+			pm8001_ha->memoryMap.region[ib_offset+i].total_len =
 						PM8001_MPI_QUEUE * 128;
-			pm8001_ha->memoryMap.region[IB+i].alignment = 128;
+			pm8001_ha->memoryMap.region[ib_offset+i].alignment
+								= 128;
 		} else {
-			pm8001_ha->memoryMap.region[IB+i].num_elements =
+			pm8001_ha->memoryMap.region[ib_offset+i].num_elements =
 						PM8001_MPI_QUEUE;
-			pm8001_ha->memoryMap.region[IB+i].element_size = 64;
+			pm8001_ha->memoryMap.region[ib_offset+i].element_size
-			pm8001_ha->memoryMap.region[IB+i].total_len =
+								= 64;
+			pm8001_ha->memoryMap.region[ib_offset+i].total_len =
 						PM8001_MPI_QUEUE * 64;
-			pm8001_ha->memoryMap.region[IB+i].alignment = 64;
+			pm8001_ha->memoryMap.region[ib_offset+i].alignment = 64;
 		}
 	}
-	for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {
+	for (i = 0; i < count; i++) {
 		/* MPI Memory region 4 for producer Index of outbound queues */
-		pm8001_ha->memoryMap.region[PI+i].num_elements = 1;
+		pm8001_ha->memoryMap.region[pi_offset+i].num_elements = 1;
-		pm8001_ha->memoryMap.region[PI+i].element_size = 4;
+		pm8001_ha->memoryMap.region[pi_offset+i].element_size = 4;
-		pm8001_ha->memoryMap.region[PI+i].total_len = 4;
+		pm8001_ha->memoryMap.region[pi_offset+i].total_len = 4;
-		pm8001_ha->memoryMap.region[PI+i].alignment = 4;
+		pm8001_ha->memoryMap.region[pi_offset+i].alignment = 4;
 		if (ent->driver_data != chip_8001) {
 			/* MPI Memory region 6 Outbound queues */
-			pm8001_ha->memoryMap.region[OB+i].num_elements =
+			pm8001_ha->memoryMap.region[ob_offset+i].num_elements =
 						PM8001_MPI_QUEUE;
-			pm8001_ha->memoryMap.region[OB+i].element_size = 128;
+			pm8001_ha->memoryMap.region[ob_offset+i].element_size
-			pm8001_ha->memoryMap.region[OB+i].total_len =
+								= 128;
+			pm8001_ha->memoryMap.region[ob_offset+i].total_len =
 						PM8001_MPI_QUEUE * 128;
-			pm8001_ha->memoryMap.region[OB+i].alignment = 128;
+			pm8001_ha->memoryMap.region[ob_offset+i].alignment
+								= 128;
 		} else {
 			/* MPI Memory region 6 Outbound queues */
-			pm8001_ha->memoryMap.region[OB+i].num_elements =
+			pm8001_ha->memoryMap.region[ob_offset+i].num_elements =
 						PM8001_MPI_QUEUE;
-			pm8001_ha->memoryMap.region[OB+i].element_size = 64;
+			pm8001_ha->memoryMap.region[ob_offset+i].element_size
-			pm8001_ha->memoryMap.region[OB+i].total_len =
+								= 64;
+			pm8001_ha->memoryMap.region[ob_offset+i].total_len =
 						PM8001_MPI_QUEUE * 64;
-			pm8001_ha->memoryMap.region[OB+i].alignment = 64;
+			pm8001_ha->memoryMap.region[ob_offset+i].alignment = 64;
 		}
 	}
 	pm8001_ha->memoryMap.region[NVMD].num_elements = 1;
 	pm8001_ha->memoryMap.region[NVMD].element_size = 4096;
 	pm8001_ha->memoryMap.region[NVMD].total_len = 4096;
-	/* Memory region for devices*/
-	pm8001_ha->memoryMap.region[DEV_MEM].num_elements = 1;
-	pm8001_ha->memoryMap.region[DEV_MEM].element_size = PM8001_MAX_DEVICES *
-		sizeof(struct pm8001_device);
-	pm8001_ha->memoryMap.region[DEV_MEM].total_len = PM8001_MAX_DEVICES *
-		sizeof(struct pm8001_device);
-	/* Memory region for ccb_info*/
-	pm8001_ha->memoryMap.region[CCB_MEM].num_elements = 1;
-	pm8001_ha->memoryMap.region[CCB_MEM].element_size = PM8001_MAX_CCB *
-		sizeof(struct pm8001_ccb_info);
-	pm8001_ha->memoryMap.region[CCB_MEM].total_len = PM8001_MAX_CCB *
-		sizeof(struct pm8001_ccb_info);
 	/* Memory region for fw flash */
 	pm8001_ha->memoryMap.region[FW_FLASH].total_len = 4096;
 	pm8001_ha->memoryMap.region[FORENSIC_MEM].total_len = 0x10000;
 	pm8001_ha->memoryMap.region[FORENSIC_MEM].element_size = 0x10000;
 	pm8001_ha->memoryMap.region[FORENSIC_MEM].alignment = 0x10000;
-	for (i = 0; i < USI_MAX_MEMCNT; i++) {
+	for (i = 0; i < pm8001_ha->max_memcnt; i++) {
 		if (pm8001_mem_alloc(pm8001_ha->pdev,
 			&pm8001_ha->memoryMap.region[i].virt_ptr,
 			&pm8001_ha->memoryMap.region[i].phys_addr,
 		}
 	}
-	pm8001_ha->devices = pm8001_ha->memoryMap.region[DEV_MEM].virt_ptr;
+	/* Memory region for devices*/
+	pm8001_ha->devices = kzalloc(PM8001_MAX_DEVICES
+				* sizeof(struct pm8001_device), GFP_KERNEL);
+	if (!pm8001_ha->devices) {
+		rc = -ENOMEM;
+		goto err_out_nodev;
+	}
 	for (i = 0; i < PM8001_MAX_DEVICES; i++) {
 		pm8001_ha->devices[i].dev_type = SAS_PHY_UNUSED;
 		pm8001_ha->devices[i].id = i;
 		pm8001_ha->devices[i].device_id = PM8001_MAX_DEVICES;
 		pm8001_ha->devices[i].running_req = 0;
 	}
-	pm8001_ha->ccb_info = pm8001_ha->memoryMap.region[CCB_MEM].virt_ptr;
-	for (i = 0; i < PM8001_MAX_CCB; i++) {
-		pm8001_ha->ccb_info[i].ccb_dma_handle =
-			pm8001_ha->memoryMap.region[CCB_MEM].phys_addr +
-			i * sizeof(struct pm8001_ccb_info);
-		pm8001_ha->ccb_info[i].task = NULL;
-		pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
-		pm8001_ha->ccb_info[i].device = NULL;
-		++pm8001_ha->tags_num;
-	}
 	pm8001_ha->flags = PM8001F_INIT_TIME;
 	/* Initialize tags */
 	pm8001_tag_init(pm8001_ha);
 	return 0;
+err_out_shost:
+	scsi_remove_host(pm8001_ha->shost);
+err_out_nodev:
+	for (i = 0; i < pm8001_ha->max_memcnt; i++) {
+		if (pm8001_ha->memoryMap.region[i].virt_ptr != NULL) {
+			pci_free_consistent(pm8001_ha->pdev,
+				(pm8001_ha->memoryMap.region[i].total_len +
+				pm8001_ha->memoryMap.region[i].alignment),
+				pm8001_ha->memoryMap.region[i].virt_ptr,
+				pm8001_ha->memoryMap.region[i].phys_addr);
+		}
+	}
 err_out:
 	return 1;
 }
 static u32 pm8001_setup_msix(struct pm8001_hba_info *pm8001_ha)
 {
 	u32 number_of_intr;
-	int rc;
+	int rc, cpu_online_count;
+	unsigned int allocated_irq_vectors;
 	/* SPCv controllers supports 64 msi-x */
 	if (pm8001_ha->chip_id == chip_8001) {
 		number_of_intr = PM8001_MAX_MSIX_VEC;
 	}
+	cpu_online_count = num_online_cpus();
+	number_of_intr = min_t(int, cpu_online_count, number_of_intr);
 	rc = pci_alloc_irq_vectors(pm8001_ha->pdev, number_of_intr,
 			number_of_intr, PCI_IRQ_MSIX);
-	number_of_intr = rc;
+	allocated_irq_vectors = rc;
 	if (rc < 0)
 		return rc;
+	/* Assigns the number of interrupts */
+	number_of_intr = min_t(int, allocated_irq_vectors, number_of_intr);
 	pm8001_ha->number_of_intr = number_of_intr;
+	/* Maximum queue number updating in HBA structure */
+	pm8001_ha->max_q_num = number_of_intr;
 	PM8001_INIT_DBG(pm8001_ha, pm8001_printk(
 		"pci_alloc_irq_vectors request ret:%d no of intr %d\n",
 				rc, pm8001_ha->number_of_intr));
 		rc = -ENOMEM;
 		goto err_out_free;
 	}
-	/* Setup Interrupt */
-	rc = pm8001_setup_irq(pm8001_ha);
-	if (rc)	{
-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
-			"pm8001_setup_irq failed [ret: %d]\n", rc));
-		goto err_out_shost;
-	}
 	PM8001_CHIP_DISP->chip_soft_rst(pm8001_ha);
 	rc = PM8001_CHIP_DISP->chip_init(pm8001_ha);
 		goto err_out_ha_free;
 	}
+	rc = pm8001_init_ccb_tag(pm8001_ha, shost, pdev);
+	if (rc)
+		goto err_out_enable;
 	rc = scsi_add_host(shost, &pdev->dev);
 	if (rc)
 		goto err_out_ha_free;
-	/* Request Interrupt */
-	rc = pm8001_request_irq(pm8001_ha);
-	if (rc)	{
-		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
-			"pm8001_request_irq failed [ret: %d]\n", rc));
-		goto err_out_shost;
-	}
 	PM8001_CHIP_DISP->interrupt_enable(pm8001_ha, 0);
 	if (pm8001_ha->chip_id != chip_8001) {
 	return rc;
 }
+/*
+ * pm8001_init_ccb_tag - allocate memory to CCB and tag.
+ * @pm8001_ha: our hba card information.
+ * @shost: scsi host which has been allocated outside.
+ */
+static int
+pm8001_init_ccb_tag(struct pm8001_hba_info *pm8001_ha, struct Scsi_Host *shost,
+			struct pci_dev *pdev)
+{
+	int i = 0;
+	u32 max_out_io, ccb_count;
+	u32 can_queue;
+	max_out_io = pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io;
+	ccb_count = min_t(int, PM8001_MAX_CCB, max_out_io);
+	/* Update to the scsi host*/
+	can_queue = ccb_count - PM8001_RESERVE_SLOT;
+	shost->can_queue = can_queue;
+	pm8001_ha->tags = kzalloc(ccb_count, GFP_KERNEL);
+	if (!pm8001_ha->tags)
+		goto err_out;
+	/* Memory region for ccb_info*/
+	pm8001_ha->ccb_info = (struct pm8001_ccb_info *)
+		kcalloc(ccb_count, sizeof(struct pm8001_ccb_info), GFP_KERNEL);
+	if (!pm8001_ha->ccb_info) {
+		PM8001_FAIL_DBG(pm8001_ha, pm8001_printk
+			("Unable to allocate memory for ccb\n"));
+		goto err_out_noccb;
+	}
+	for (i = 0; i < ccb_count; i++) {
+		pm8001_ha->ccb_info[i].buf_prd = pci_alloc_consistent(pdev,
+				sizeof(struct pm8001_prd) * PM8001_MAX_DMA_SG,
+				&pm8001_ha->ccb_info[i].ccb_dma_handle);
+		if (!pm8001_ha->ccb_info[i].buf_prd) {
+			PM8001_FAIL_DBG(pm8001_ha, pm8001_printk
+					("pm80xx: ccb prd memory allocation error\n"));
+			goto err_out;
+		}
+		pm8001_ha->ccb_info[i].task = NULL;
+		pm8001_ha->ccb_info[i].ccb_tag = 0xffffffff;
+		pm8001_ha->ccb_info[i].device = NULL;
+		++pm8001_ha->tags_num;
+	}
+	return 0;
+err_out_noccb:
+	kfree(pm8001_ha->devices);
+err_out:
+	return -ENOMEM;
+}
 static void pm8001_pci_remove(struct pci_dev *pdev)
 {
 	struct sas_ha_struct *sha = pci_get_drvdata(pdev);

drivers/scsi/pm8001/pm8001_sas.h+11−4

 #include "pm8001_defs.h"
 #define DRV_NAME		"pm80xx"
-#define DRV_VERSION		"0.1.39"
+#define DRV_VERSION		"0.1.40"
 #define PM8001_FAIL_LOGGING	0x01 /* Error message logging */
 #define PM8001_INIT_LOGGING	0x02 /* driver init logging */
 #define PM8001_DISC_LOGGING	0x04 /* discovery layer logging */
 	u32			ccb_tag;
 	dma_addr_t		ccb_dma_handle;
 	struct pm8001_device	*device;
-	struct pm8001_prd	buf_prd[PM8001_MAX_DMA_SG];
+	struct pm8001_prd	*buf_prd;
 	struct fw_control_ex	*fw_control_context;
 	u8			open_retry;
 };
 	u32			reserved;
 	__le32			consumer_index;
 	u32			producer_idx;
+	spinlock_t		iq_lock;
 };
 struct outbound_queue_table {
 	u32			element_size_cnt;
 	void __iomem	*fatal_tbl_addr; /*MPI IVT Table Addr */
 	union main_cfg_table	main_cfg_tbl;
 	union general_status_table	gs_tbl;
-	struct inbound_queue_table	inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
+	struct inbound_queue_table	inbnd_q_tbl[PM8001_MAX_INB_NUM];
-	struct outbound_queue_table	outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
+	struct outbound_queue_table	outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
 	struct sas_phy_attribute_table	phy_attr_table;
 					/* MPI SAS PHY attributes */
 	u8			sas_addr[SAS_ADDR_SIZE];
 	u32			reset_in_progress;
 	u32			non_fatal_count;
 	u32			non_fatal_read_length;
+	u32 max_q_num;
+	u32 ib_offset;
+	u32 ob_offset;
+	u32 ci_offset;
+	u32 pi_offset;
+	u32 max_memcnt;
 };
 struct pm8001_work {

drivers/scsi/pm8001/pm80xx_hwi.c+56−53

@@ -720,7 +720,7 @@ static void read_inbnd_queue_table(struct pm8001_hba_info *pm8001_ha) · 719 unmodified lines
720	{	720	{
721	int i;	721	int i;
722	void __iomem *address = pm8001_ha->inbnd_q_tbl_addr;	722	void __iomem *address = pm8001_ha->inbnd_q_tbl_addr;
723	for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {	723	for (i = 0; i < PM8001_MAX_INB_NUM; i++) {
724	u32 offset = i * 0x20;	724	u32 offset = i * 0x20;
725	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =	725	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
726	get_pci_bar_index(pm8001_mr32(address,	726	get_pci_bar_index(pm8001_mr32(address,
@@ -738,7 +738,7 @@ static void read_outbnd_queue_table(struct pm8001_hba_info *pm8001_ha) · 11 unmodified lines
738	{	738	{
739	int i;	739	int i;
740	void __iomem *address = pm8001_ha->outbnd_q_tbl_addr;	740	void __iomem *address = pm8001_ha->outbnd_q_tbl_addr;
741	for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {	741	for (i = 0; i < PM8001_MAX_OUTB_NUM; i++) {
742	u32 offset = i * 0x24;	742	u32 offset = i * 0x24;
743	pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =	743	pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
744	get_pci_bar_index(pm8001_mr32(address,	744	get_pci_bar_index(pm8001_mr32(address,
@@ -758,6 +758,10 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) · 13 unmodified lines
758	u32 offsetib, offsetob;	758	u32 offsetib, offsetob;
759	void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;	759	void __iomem *addressib = pm8001_ha->inbnd_q_tbl_addr;
760	void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;	760	void __iomem *addressob = pm8001_ha->outbnd_q_tbl_addr;
		761	u32 ib_offset = pm8001_ha->ib_offset;
		762	u32 ob_offset = pm8001_ha->ob_offset;
		763	u32 ci_offset = pm8001_ha->ci_offset;
		764	u32 pi_offset = pm8001_ha->pi_offset;
761		765
762	pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr =	766	pm8001_ha->main_cfg_tbl.pm80xx_tbl.upper_event_log_addr =
763	pm8001_ha->memoryMap.region[AAP1].phys_addr_hi;	767	pm8001_ha->memoryMap.region[AAP1].phys_addr_hi;
@@ -778,23 +782,23 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) · 14 unmodified lines
778	/* Disable end to end CRC checking */	782	/* Disable end to end CRC checking */
779	pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16);	783	pm8001_ha->main_cfg_tbl.pm80xx_tbl.crc_core_dump = (0x1 << 16);
780		784
781	for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++) {	785	for (i = 0; i < pm8001_ha->max_q_num; i++) {
782	pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt =	786	pm8001_ha->inbnd_q_tbl[i].element_pri_size_cnt =
783	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x00<<30);	787	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x00<<30);
784	pm8001_ha->inbnd_q_tbl[i].upper_base_addr =	788	pm8001_ha->inbnd_q_tbl[i].upper_base_addr =
785	pm8001_ha->memoryMap.region[IB + i].phys_addr_hi;	789	pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_hi;
786	pm8001_ha->inbnd_q_tbl[i].lower_base_addr =	790	pm8001_ha->inbnd_q_tbl[i].lower_base_addr =
787	pm8001_ha->memoryMap.region[IB + i].phys_addr_lo;	791	pm8001_ha->memoryMap.region[ib_offset + i].phys_addr_lo;
788	pm8001_ha->inbnd_q_tbl[i].base_virt =	792	pm8001_ha->inbnd_q_tbl[i].base_virt =
789	(u8 *)pm8001_ha->memoryMap.region[IB + i].virt_ptr;	793	(u8 *)pm8001_ha->memoryMap.region[ib_offset + i].virt_ptr;
790	pm8001_ha->inbnd_q_tbl[i].total_length =	794	pm8001_ha->inbnd_q_tbl[i].total_length =
791	pm8001_ha->memoryMap.region[IB + i].total_len;	795	pm8001_ha->memoryMap.region[ib_offset + i].total_len;
792	pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr =	796	pm8001_ha->inbnd_q_tbl[i].ci_upper_base_addr =
793	pm8001_ha->memoryMap.region[CI + i].phys_addr_hi;	797	pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_hi;
794	pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr =	798	pm8001_ha->inbnd_q_tbl[i].ci_lower_base_addr =
795	pm8001_ha->memoryMap.region[CI + i].phys_addr_lo;	799	pm8001_ha->memoryMap.region[ci_offset + i].phys_addr_lo;
796	pm8001_ha->inbnd_q_tbl[i].ci_virt =	800	pm8001_ha->inbnd_q_tbl[i].ci_virt =
797	pm8001_ha->memoryMap.region[CI + i].virt_ptr;	801	pm8001_ha->memoryMap.region[ci_offset + i].virt_ptr;
798	offsetib = i * 0x20;	802	offsetib = i * 0x20;
799	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =	803	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar =
800	get_pci_bar_index(pm8001_mr32(addressib,	804	get_pci_bar_index(pm8001_mr32(addressib,
@@ -809,25 +813,25 @@ static void init_default_table_values(struct pm8001_hba_info *pm8001_ha) · 8 unmodified lines
809	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar,	813	pm8001_ha->inbnd_q_tbl[i].pi_pci_bar,
810	pm8001_ha->inbnd_q_tbl[i].pi_offset));	814	pm8001_ha->inbnd_q_tbl[i].pi_offset));
811	}	815	}
812	for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++) {	816	for (i = 0; i < pm8001_ha->max_q_num; i++) {
813	pm8001_ha->outbnd_q_tbl[i].element_size_cnt =	817	pm8001_ha->outbnd_q_tbl[i].element_size_cnt =
814	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x01<<30);	818	PM8001_MPI_QUEUE \| (pm8001_ha->iomb_size << 16) \| (0x01<<30);
815	pm8001_ha->outbnd_q_tbl[i].upper_base_addr =	819	pm8001_ha->outbnd_q_tbl[i].upper_base_addr =
816	pm8001_ha->memoryMap.region[OB + i].phys_addr_hi;	820	pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_hi;
817	pm8001_ha->outbnd_q_tbl[i].lower_base_addr =	821	pm8001_ha->outbnd_q_tbl[i].lower_base_addr =
818	pm8001_ha->memoryMap.region[OB + i].phys_addr_lo;	822	pm8001_ha->memoryMap.region[ob_offset + i].phys_addr_lo;
819	pm8001_ha->outbnd_q_tbl[i].base_virt =	823	pm8001_ha->outbnd_q_tbl[i].base_virt =
820	(u8 *)pm8001_ha->memoryMap.region[OB + i].virt_ptr;	824	(u8 *)pm8001_ha->memoryMap.region[ob_offset + i].virt_ptr;
821	pm8001_ha->outbnd_q_tbl[i].total_length =	825	pm8001_ha->outbnd_q_tbl[i].total_length =
822	pm8001_ha->memoryMap.region[OB + i].total_len;	826	pm8001_ha->memoryMap.region[ob_offset + i].total_len;
823	pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr =	827	pm8001_ha->outbnd_q_tbl[i].pi_upper_base_addr =
824	pm8001_ha->memoryMap.region[PI + i].phys_addr_hi;	828	pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_hi;
825	pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr =	829	pm8001_ha->outbnd_q_tbl[i].pi_lower_base_addr =
826	pm8001_ha->memoryMap.region[PI + i].phys_addr_lo;	830	pm8001_ha->memoryMap.region[pi_offset + i].phys_addr_lo;
827	/* interrupt vector based on oq */	831	/* interrupt vector based on oq */
828	pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24);	832	pm8001_ha->outbnd_q_tbl[i].interrup_vec_cnt_delay = (i << 24);
829	pm8001_ha->outbnd_q_tbl[i].pi_virt =	833	pm8001_ha->outbnd_q_tbl[i].pi_virt =
830	pm8001_ha->memoryMap.region[PI + i].virt_ptr;	834	pm8001_ha->memoryMap.region[pi_offset + i].virt_ptr;
831	offsetob = i * 0x24;	835	offsetob = i * 0x24;
832	pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =	836	pm8001_ha->outbnd_q_tbl[i].ci_pci_bar =
833	get_pci_bar_index(pm8001_mr32(addressob,	837	get_pci_bar_index(pm8001_mr32(addressob,
@@ -871,7 +875,7 @@ static void update_main_config_table(struct pm8001_hba_info *pm8001_ha) · 37 unmodified lines
871	pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity);	875	pm8001_ha->main_cfg_tbl.pm80xx_tbl.pcs_event_log_severity);
872	/* Update Fatal error interrupt vector */	876	/* Update Fatal error interrupt vector */
873	pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt \|=	877	pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt \|=
874	((pm8001_ha->number_of_intr - 1) << 8);	878	((pm8001_ha->max_q_num - 1) << 8);
875	pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT,	879	pm8001_mw32(address, MAIN_FATAL_ERROR_INTERRUPT,
876	pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt);	880	pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_interrupt);
877	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(	881	PM8001_DEV_DBG(pm8001_ha, pm8001_printk(
@@ -1010,8 +1014,12 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) · 132 unmodified lines
1010	value &= SPCv_MSGU_CFG_TABLE_UPDATE;	1014	value &= SPCv_MSGU_CFG_TABLE_UPDATE;
1011	} while ((value != 0) && (--max_wait_count));	1015	} while ((value != 0) && (--max_wait_count));
1012		1016
1013	if (!max_wait_count)	1017	if (!max_wait_count) {
1014	return -1;	1018	/* additional check */
		1019	PM8001_FAIL_DBG(pm8001_ha, pm8001_printk(
		1020	"Inb doorbell clear not toggled[value:%x]\n", value));
		1021	return -EBUSY;
		1022	}
1015	/* check the MPI-State for initialization upto 100ms*/	1023	/* check the MPI-State for initialization upto 100ms*/
1016	max_wait_count = 100 * 1000;/* 100 msec */	1024	max_wait_count = 100 * 1000;/* 100 msec */
1017	do {	1025	do {
@@ -1022,12 +1030,12 @@ static int mpi_init_check(struct pm8001_hba_info *pm8001_ha) · 4 unmodified lines
1022	} while ((GST_MPI_STATE_INIT !=	1030	} while ((GST_MPI_STATE_INIT !=
1023	(gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count));	1031	(gst_len_mpistate & GST_MPI_STATE_MASK)) && (--max_wait_count));
1024	if (!max_wait_count)	1032	if (!max_wait_count)
1025	return -1;	1033	return -EBUSY;
1026		1034
1027	/* check MPI Initialization error */	1035	/* check MPI Initialization error */
1028	gst_len_mpistate = gst_len_mpistate >> 16;	1036	gst_len_mpistate = gst_len_mpistate >> 16;
1029	if (0x0000 != gst_len_mpistate)	1037	if (0x0000 != gst_len_mpistate)
1030	return -1;	1038	return -EBUSY;
1031		1039
1032	return 0;	1040	return 0;
1033	}	1041	}
@@ -1469,11 +1477,10 @@ static int pm80xx_chip_init(struct pm8001_hba_info *pm8001_ha) · 435 unmodified lines
1469		1477
1470	/* update main config table ,inbound table and outbound table */	1478	/* update main config table ,inbound table and outbound table */
1471	update_main_config_table(pm8001_ha);	1479	update_main_config_table(pm8001_ha);
1472	for (i = 0; i < PM8001_MAX_SPCV_INB_NUM; i++)	1480	for (i = 0; i < pm8001_ha->max_q_num; i++) {
1473	update_inbnd_queue_table(pm8001_ha, i);	1481	update_inbnd_queue_table(pm8001_ha, i);
1474	for (i = 0; i < PM8001_MAX_SPCV_OUTB_NUM; i++)
1475	update_outbnd_queue_table(pm8001_ha, i);	1482	update_outbnd_queue_table(pm8001_ha, i);
1476		1483	}
1477	/* notify firmware update finished and check initialization status */	1484	/* notify firmware update finished and check initialization status */
1478	if (0 == mpi_init_check(pm8001_ha)) {	1485	if (0 == mpi_init_check(pm8001_ha)) {
1479	PM8001_INIT_DBG(pm8001_ha,	1486	PM8001_INIT_DBG(pm8001_ha,
@@ -4191,7 +4198,7 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) · 2711 unmodified lines
4191	unsigned long flags;	4198	unsigned long flags;
4192	u32 regval;	4199	u32 regval;
4193		4200
4194	if (vec == (pm8001_ha->number_of_intr - 1)) {	4201	if (vec == (pm8001_ha->max_q_num - 1)) {
4195	regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);	4202	regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
4196	if ((regval & SCRATCH_PAD_MIPSALL_READY) !=	4203	if ((regval & SCRATCH_PAD_MIPSALL_READY) !=
4197	SCRATCH_PAD_MIPSALL_READY) {	4204	SCRATCH_PAD_MIPSALL_READY) {
@@ -4274,6 +4281,7 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, · 76 unmodified lines
4274	char *preq_dma_addr = NULL;	4281	char *preq_dma_addr = NULL;
4275	__le64 tmp_addr;	4282	__le64 tmp_addr;
4276	u32 i, length;	4283	u32 i, length;
		4284	unsigned long flags;
4277		4285
4278	memset(&smp_cmd, 0, sizeof(smp_cmd));	4286	memset(&smp_cmd, 0, sizeof(smp_cmd));
4279	/*	4287	/*
@@ -4369,8 +4377,10 @@ static int pm80xx_chip_smp_req(struct pm8001_hba_info *pm8001_ha, · 89 unmodified lines
4369		4377
4370	build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag,	4378	build_smp_cmd(pm8001_dev->device_id, smp_cmd.tag,
4371	&smp_cmd, pm8001_ha->smp_exp_mode, length);	4379	&smp_cmd, pm8001_ha->smp_exp_mode, length);
		4380	spin_lock_irqsave(&circularQ->iq_lock, flags);
4372	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd,	4381	rc = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc, &smp_cmd,
4373	sizeof(smp_cmd), 0);	4382	sizeof(smp_cmd), 0);
		4383	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
4374	if (rc)	4384	if (rc)
4375	goto err_out_2;	4385	goto err_out_2;
4376	return 0;	4386	return 0;
@@ -4434,7 +4444,8 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 57 unmodified lines
4434	u64 phys_addr, start_addr, end_addr;	4444	u64 phys_addr, start_addr, end_addr;
4435	u32 end_addr_high, end_addr_low;	4445	u32 end_addr_high, end_addr_low;
4436	struct inbound_queue_table *circularQ;	4446	struct inbound_queue_table *circularQ;
4437	u32 q_index;	4447	unsigned long flags;
		4448	u32 q_index, cpu_id;
4438	u32 opc = OPC_INB_SSPINIIOSTART;	4449	u32 opc = OPC_INB_SSPINIIOSTART;
4439	memset(&ssp_cmd, 0, sizeof(ssp_cmd));	4450	memset(&ssp_cmd, 0, sizeof(ssp_cmd));
4440	memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8);	4451	memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8);
@@ -4453,7 +4464,8 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 12 unmodified lines
4453	ssp_cmd.ssp_iu.efb_prio_attr \|= (task->ssp_task.task_attr & 7);	4464	ssp_cmd.ssp_iu.efb_prio_attr \|= (task->ssp_task.task_attr & 7);
4454	memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd,	4465	memcpy(ssp_cmd.ssp_iu.cdb, task->ssp_task.cmd->cmnd,
4455	task->ssp_task.cmd->cmd_len);	4466	task->ssp_task.cmd->cmd_len);
4456	q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM;	4467	cpu_id = smp_processor_id();
		4468	q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num);
4457	circularQ = &pm8001_ha->inbnd_q_tbl[q_index];	4469	circularQ = &pm8001_ha->inbnd_q_tbl[q_index];
4458		4470
4459	/* Check if encryption is set */	4471	/* Check if encryption is set */
@@ -4471,8 +4483,7 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 11 unmodified lines
4471	if (task->num_scatter > 1) {	4483	if (task->num_scatter > 1) {
4472	pm8001_chip_make_sg(task->scatter,	4484	pm8001_chip_make_sg(task->scatter,
4473	ccb->n_elem, ccb->buf_prd);	4485	ccb->n_elem, ccb->buf_prd);
4474	phys_addr = ccb->ccb_dma_handle +	4486	phys_addr = ccb->ccb_dma_handle;
4475	offsetof(struct pm8001_ccb_info, buf_prd[0]);
4476	ssp_cmd.enc_addr_low =	4487	ssp_cmd.enc_addr_low =
4477	cpu_to_le32(lower_32_bits(phys_addr));	4488	cpu_to_le32(lower_32_bits(phys_addr));
4478	ssp_cmd.enc_addr_high =	4489	ssp_cmd.enc_addr_high =
@@ -4501,9 +4512,7 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 22 unmodified lines
4501	end_addr_high, end_addr_low));	4512	end_addr_high, end_addr_low));
4502	pm8001_chip_make_sg(task->scatter, 1,	4513	pm8001_chip_make_sg(task->scatter, 1,
4503	ccb->buf_prd);	4514	ccb->buf_prd);
4504	phys_addr = ccb->ccb_dma_handle +	4515	phys_addr = ccb->ccb_dma_handle;
4505	offsetof(struct pm8001_ccb_info,
4506	buf_prd[0]);
4507	ssp_cmd.enc_addr_low =	4516	ssp_cmd.enc_addr_low =
4508	cpu_to_le32(lower_32_bits(phys_addr));	4517	cpu_to_le32(lower_32_bits(phys_addr));
4509	ssp_cmd.enc_addr_high =	4518	ssp_cmd.enc_addr_high =
@@ -4531,8 +4540,7 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 21 unmodified lines
4531	if (task->num_scatter > 1) {	4540	if (task->num_scatter > 1) {
4532	pm8001_chip_make_sg(task->scatter, ccb->n_elem,	4541	pm8001_chip_make_sg(task->scatter, ccb->n_elem,
4533	ccb->buf_prd);	4542	ccb->buf_prd);
4534	phys_addr = ccb->ccb_dma_handle +	4543	phys_addr = ccb->ccb_dma_handle;
4535	offsetof(struct pm8001_ccb_info, buf_prd[0]);
4536	ssp_cmd.addr_low =	4544	ssp_cmd.addr_low =
4537	cpu_to_le32(lower_32_bits(phys_addr));	4545	cpu_to_le32(lower_32_bits(phys_addr));
4538	ssp_cmd.addr_high =	4546	ssp_cmd.addr_high =
@@ -4560,9 +4568,7 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 21 unmodified lines
4560	end_addr_high, end_addr_low));	4568	end_addr_high, end_addr_low));
4561	pm8001_chip_make_sg(task->scatter, 1,	4569	pm8001_chip_make_sg(task->scatter, 1,
4562	ccb->buf_prd);	4570	ccb->buf_prd);
4563	phys_addr = ccb->ccb_dma_handle +	4571	phys_addr = ccb->ccb_dma_handle;
4564	offsetof(struct pm8001_ccb_info,
4565	buf_prd[0]);
4566	ssp_cmd.addr_low =	4572	ssp_cmd.addr_low =
4567	cpu_to_le32(lower_32_bits(phys_addr));	4573	cpu_to_le32(lower_32_bits(phys_addr));
4568	ssp_cmd.addr_high =	4574	ssp_cmd.addr_high =
@@ -4576,9 +4582,10 @@ static int pm80xx_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, · 7 unmodified lines
4576	ssp_cmd.esgl = 0;	4582	ssp_cmd.esgl = 0;
4577	}	4583	}
4578	}	4584	}
4579	q_index = (u32) (pm8001_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM;	4585	spin_lock_irqsave(&circularQ->iq_lock, flags);
4580	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,	4586	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
4581	&ssp_cmd, sizeof(ssp_cmd), q_index);	4587	&ssp_cmd, sizeof(ssp_cmd), q_index);
		4588	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
4582	return ret;	4589	return ret;
4583	}	4590	}
4584		4591
@@ -4590,7 +4597,7 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 5 unmodified lines
4590	struct pm8001_device *pm8001_ha_dev = dev->lldd_dev;	4597	struct pm8001_device *pm8001_ha_dev = dev->lldd_dev;
4591	u32 tag = ccb->ccb_tag;	4598	u32 tag = ccb->ccb_tag;
4592	int ret;	4599	int ret;
4593	u32 q_index;	4600	u32 q_index, cpu_id;
4594	struct sata_start_req sata_cmd;	4601	struct sata_start_req sata_cmd;
4595	u32 hdr_tag, ncg_tag = 0;	4602	u32 hdr_tag, ncg_tag = 0;
4596	u64 phys_addr, start_addr, end_addr;	4603	u64 phys_addr, start_addr, end_addr;
@@ -4601,7 +4608,8 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 4 unmodified lines
4601	unsigned long flags;	4608	unsigned long flags;
4602	u32 opc = OPC_INB_SATA_HOST_OPSTART;	4609	u32 opc = OPC_INB_SATA_HOST_OPSTART;
4603	memset(&sata_cmd, 0, sizeof(sata_cmd));	4610	memset(&sata_cmd, 0, sizeof(sata_cmd));
4604	q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_INB_NUM;	4611	cpu_id = smp_processor_id();
		4612	q_index = (u32) (cpu_id) % (pm8001_ha->max_q_num);
4605	circularQ = &pm8001_ha->inbnd_q_tbl[q_index];	4613	circularQ = &pm8001_ha->inbnd_q_tbl[q_index];
4606		4614
4607	if (task->data_dir == DMA_NONE) {	4615	if (task->data_dir == DMA_NONE) {
@@ -4652,8 +4660,7 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 44 unmodified lines
4652	if (task->num_scatter > 1) {	4660	if (task->num_scatter > 1) {
4653	pm8001_chip_make_sg(task->scatter,	4661	pm8001_chip_make_sg(task->scatter,
4654	ccb->n_elem, ccb->buf_prd);	4662	ccb->n_elem, ccb->buf_prd);
4655	phys_addr = ccb->ccb_dma_handle +	4663	phys_addr = ccb->ccb_dma_handle;
4656	offsetof(struct pm8001_ccb_info, buf_prd[0]);
4657	sata_cmd.enc_addr_low = lower_32_bits(phys_addr);	4664	sata_cmd.enc_addr_low = lower_32_bits(phys_addr);
4658	sata_cmd.enc_addr_high = upper_32_bits(phys_addr);	4665	sata_cmd.enc_addr_high = upper_32_bits(phys_addr);
4659	sata_cmd.enc_esgl = cpu_to_le32(1 << 31);	4666	sata_cmd.enc_esgl = cpu_to_le32(1 << 31);
@@ -4678,9 +4685,7 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 18 unmodified lines
4678	end_addr_high, end_addr_low));	4685	end_addr_high, end_addr_low));
4679	pm8001_chip_make_sg(task->scatter, 1,	4686	pm8001_chip_make_sg(task->scatter, 1,
4680	ccb->buf_prd);	4687	ccb->buf_prd);
4681	phys_addr = ccb->ccb_dma_handle +	4688	phys_addr = ccb->ccb_dma_handle;
4682	offsetof(struct pm8001_ccb_info,
4683	buf_prd[0]);
4684	sata_cmd.enc_addr_low =	4689	sata_cmd.enc_addr_low =
4685	lower_32_bits(phys_addr);	4690	lower_32_bits(phys_addr);
4686	sata_cmd.enc_addr_high =	4691	sata_cmd.enc_addr_high =
@@ -4718,8 +4723,7 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 31 unmodified lines
4718	if (task->num_scatter > 1) {	4723	if (task->num_scatter > 1) {
4719	pm8001_chip_make_sg(task->scatter,	4724	pm8001_chip_make_sg(task->scatter,
4720	ccb->n_elem, ccb->buf_prd);	4725	ccb->n_elem, ccb->buf_prd);
4721	phys_addr = ccb->ccb_dma_handle +	4726	phys_addr = ccb->ccb_dma_handle;
4722	offsetof(struct pm8001_ccb_info, buf_prd[0]);
4723	sata_cmd.addr_low = lower_32_bits(phys_addr);	4727	sata_cmd.addr_low = lower_32_bits(phys_addr);
4724	sata_cmd.addr_high = upper_32_bits(phys_addr);	4728	sata_cmd.addr_high = upper_32_bits(phys_addr);
4725	sata_cmd.esgl = cpu_to_le32(1 << 31);	4729	sata_cmd.esgl = cpu_to_le32(1 << 31);
@@ -4744,9 +4748,7 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 18 unmodified lines
4744	end_addr_high, end_addr_low));	4748	end_addr_high, end_addr_low));
4745	pm8001_chip_make_sg(task->scatter, 1,	4749	pm8001_chip_make_sg(task->scatter, 1,
4746	ccb->buf_prd);	4750	ccb->buf_prd);
4747	phys_addr = ccb->ccb_dma_handle +	4751	phys_addr = ccb->ccb_dma_handle;
4748	offsetof(struct pm8001_ccb_info,
4749	buf_prd[0]);
4750	sata_cmd.addr_low =	4752	sata_cmd.addr_low =
4751	lower_32_bits(phys_addr);	4753	lower_32_bits(phys_addr);
4752	sata_cmd.addr_high =	4754	sata_cmd.addr_high =
@@ -4817,9 +4819,10 @@ static int pm80xx_chip_sata_req(struct pm8001_hba_info *pm8001_ha, · 64 unmodified lines
4817	}	4819	}
4818	}	4820	}
4819	}	4821	}
4820	q_index = (u32) (pm8001_ha_dev->id & 0x00ffffff) % PM8001_MAX_OUTB_NUM;	4822	spin_lock_irqsave(&circularQ->iq_lock, flags);
4821	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,	4823	ret = pm8001_mpi_build_cmd(pm8001_ha, circularQ, opc,
4822	&sata_cmd, sizeof(sata_cmd), q_index);	4824	&sata_cmd, sizeof(sata_cmd), q_index);
		4825	spin_unlock_irqrestore(&circularQ->iq_lock, flags);
4823	return ret;	4826	return ret;
4824	}	4827	}
4825		4828

drivers/scsi/qla2xxx/qla_dfs.c+8−60

@@ -170,20 +170,7 @@ qla2x00_dfs_tgt_sess_show(struct seq_file s, void unused) · 169 unmodified lines
170	return 0;	170	return 0;
171	}	171	}
172		172
173	static int	173	DEFINE_SHOW_ATTRIBUTE(qla2x00_dfs_tgt_sess);
174	qla2x00_dfs_tgt_sess_open(struct inode inode, struct file file)
175	{
176	scsi_qla_host_t *vha = inode->i_private;
177
178	return single_open(file, qla2x00_dfs_tgt_sess_show, vha);
179	}
180
181	static const struct file_operations dfs_tgt_sess_ops = {
182	.open = qla2x00_dfs_tgt_sess_open,
183	.read = seq_read,
184	.llseek = seq_lseek,
185	.release = single_release,
186	};
187		174
188	static int	175	static int
189	qla2x00_dfs_tgt_port_database_show(struct seq_file s, void unused)	176	qla2x00_dfs_tgt_port_database_show(struct seq_file s, void unused)
@@ -239,20 +226,7 @@ out_free_id_list: · 49 unmodified lines
239	return 0;	226	return 0;
240	}	227	}
241		228
242	static int	229	DEFINE_SHOW_ATTRIBUTE(qla2x00_dfs_tgt_port_database);
243	qla2x00_dfs_tgt_port_database_open(struct inode inode, struct file file)
244	{
245	scsi_qla_host_t *vha = inode->i_private;
246
247	return single_open(file, qla2x00_dfs_tgt_port_database_show, vha);
248	}
249
250	static const struct file_operations dfs_tgt_port_database_ops = {
251	.open = qla2x00_dfs_tgt_port_database_open,
252	.read = seq_read,
253	.llseek = seq_lseek,
254	.release = single_release,
255	};
256		230
257	static int	231	static int
258	qla_dfs_fw_resource_cnt_show(struct seq_file s, void unused)	232	qla_dfs_fw_resource_cnt_show(struct seq_file s, void unused)
@@ -301,20 +275,7 @@ qla_dfs_fw_resource_cnt_show(struct seq_file s, void unused) · 42 unmodified lines
301	return 0;	275	return 0;
302	}	276	}
303		277
304	static int	278	DEFINE_SHOW_ATTRIBUTE(qla_dfs_fw_resource_cnt);
305	qla_dfs_fw_resource_cnt_open(struct inode inode, struct file file)
306	{
307	struct scsi_qla_host *vha = inode->i_private;
308
309	return single_open(file, qla_dfs_fw_resource_cnt_show, vha);
310	}
311
312	static const struct file_operations dfs_fw_resource_cnt_ops = {
313	.open = qla_dfs_fw_resource_cnt_open,
314	.read = seq_read,
315	.llseek = seq_lseek,
316	.release = single_release,
317	};
318		279
319	static int	280	static int
320	qla_dfs_tgt_counters_show(struct seq_file s, void unused)	281	qla_dfs_tgt_counters_show(struct seq_file s, void unused)
@@ -391,20 +352,7 @@ qla_dfs_tgt_counters_show(struct seq_file s, void unused) · 70 unmodified lines
391	return 0;	352	return 0;
392	}	353	}
393		354
394	static int	355	DEFINE_SHOW_ATTRIBUTE(qla_dfs_tgt_counters);
395	qla_dfs_tgt_counters_open(struct inode inode, struct file file)
396	{
397	struct scsi_qla_host *vha = inode->i_private;
398
399	return single_open(file, qla_dfs_tgt_counters_show, vha);
400	}
401
402	static const struct file_operations dfs_tgt_counters_ops = {
403	.open = qla_dfs_tgt_counters_open,
404	.read = seq_read,
405	.llseek = seq_lseek,
406	.release = single_release,
407	};
408		356
409	static int	357	static int
410	qla2x00_dfs_fce_show(struct seq_file s, void unused)	358	qla2x00_dfs_fce_show(struct seq_file s, void unused)
@@ -606,19 +554,19 @@ create_dir: · 195 unmodified lines
606		554
607	create_nodes:	555	create_nodes:
608	ha->dfs_fw_resource_cnt = debugfs_create_file("fw_resource_count",	556	ha->dfs_fw_resource_cnt = debugfs_create_file("fw_resource_count",
609	S_IRUSR, ha->dfs_dir, vha, &dfs_fw_resource_cnt_ops);	557	S_IRUSR, ha->dfs_dir, vha, &qla_dfs_fw_resource_cnt_fops);
610		558
611	ha->dfs_tgt_counters = debugfs_create_file("tgt_counters", S_IRUSR,	559	ha->dfs_tgt_counters = debugfs_create_file("tgt_counters", S_IRUSR,
612	ha->dfs_dir, vha, &dfs_tgt_counters_ops);	560	ha->dfs_dir, vha, &qla_dfs_tgt_counters_fops);
613		561
614	ha->tgt.dfs_tgt_port_database = debugfs_create_file("tgt_port_database",	562	ha->tgt.dfs_tgt_port_database = debugfs_create_file("tgt_port_database",
615	S_IRUSR, ha->dfs_dir, vha, &dfs_tgt_port_database_ops);	563	S_IRUSR, ha->dfs_dir, vha, &qla2x00_dfs_tgt_port_database_fops);
616		564
617	ha->dfs_fce = debugfs_create_file("fce", S_IRUSR, ha->dfs_dir, vha,	565	ha->dfs_fce = debugfs_create_file("fce", S_IRUSR, ha->dfs_dir, vha,
618	&dfs_fce_ops);	566	&dfs_fce_ops);
619		567
620	ha->tgt.dfs_tgt_sess = debugfs_create_file("tgt_sess",	568	ha->tgt.dfs_tgt_sess = debugfs_create_file("tgt_sess",
621	S_IRUSR, ha->dfs_dir, vha, &dfs_tgt_sess_ops);	569	S_IRUSR, ha->dfs_dir, vha, &qla2x00_dfs_tgt_sess_fops);
622		570
623	if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA28XX(ha)) {	571	if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA28XX(ha)) {
624	ha->tgt.dfs_naqp = debugfs_create_file("naqp",	572	ha->tgt.dfs_naqp = debugfs_create_file("naqp",

drivers/scsi/qla2xxx/qla_isr.c+15−27

     struct mbx_24xx_entry *pkt)
 {
 	const char func[] = "MBX-IOCB2";
+	struct qla_hw_data *ha = vha->hw;
 	srb_t *sp;
 	struct srb_iocb *si;
 	u16 sz, i;
 	if (!sp)
 		return;
+	if (sp->type == SRB_SCSI_CMD ||
+	    sp->type == SRB_NVME_CMD ||
+	    sp->type == SRB_TM_CMD) {
+		ql_log(ql_log_warn, vha, 0x509d,
+			"Inconsistent event entry type %d\n", sp->type);
+		if (IS_P3P_TYPE(ha))
+			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
+		else
+			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
+		return;
+	}
 	si = &sp->u.iocb_cmd;
 	sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
 	sp->done(sp, comp_status);
 }
-static void qla24xx_process_mbx_iocb_response(struct scsi_qla_host *vha,
-	struct rsp_que *rsp, struct sts_entry_24xx *pkt)
-{
-	struct qla_hw_data *ha = vha->hw;
-	srb_t *sp;
-	static const char func[] = "MBX-IOCB2";
-	sp = qla2x00_get_sp_from_handle(vha, func, rsp->req, pkt);
-	if (!sp)
-		return;
-	if (sp->type == SRB_SCSI_CMD ||
-	    sp->type == SRB_NVME_CMD ||
-	    sp->type == SRB_TM_CMD) {
-		ql_log(ql_log_warn, vha, 0x509d,
-			"Inconsistent event entry type %d\n", sp->type);
-		if (IS_P3P_TYPE(ha))
-			set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
-		else
-			set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
-		return;
-	}
-	qla24xx_mbx_iocb_entry(vha, rsp->req, (struct mbx_24xx_entry *)pkt);
-}
 /**
  * qla24xx_process_response_queue() - Process response queue entries.
  * @vha: SCSI driver HA context
 			    (struct abort_entry_24xx *)pkt);
 			break;
 		case MBX_IOCB_TYPE:
-			qla24xx_process_mbx_iocb_response(vha, rsp, pkt);
+			qla24xx_mbx_iocb_entry(vha, rsp->req,
+			    (struct mbx_24xx_entry *)pkt);
 			break;
 		case VP_CTRL_IOCB_TYPE:
 			qla_ctrlvp_completed(vha, rsp->req,

drivers/scsi/qla2xxx/qla_nvme.c+4−4

@@ -541,7 +541,7 @@ static int qla_nvme_post_cmd(struct nvme_fc_local_port *lport, · 540 unmodified lines
541	fc_port_t *fcport;	541	fc_port_t *fcport;
542	struct srb_iocb *nvme;	542	struct srb_iocb *nvme;
543	struct scsi_qla_host *vha;	543	struct scsi_qla_host *vha;
544	int rval = -ENODEV;	544	int rval;
545	srb_t *sp;	545	srb_t *sp;
546	struct qla_qpair *qpair = hw_queue_handle;	546	struct qla_qpair *qpair = hw_queue_handle;
547	struct nvme_private *priv = fd->private;	547	struct nvme_private *priv = fd->private;
@@ -549,19 +549,19 @@ static int qla_nvme_post_cmd(struct nvme_fc_local_port *lport, · 1 unmodified line
549		549
550	if (!priv) {	550	if (!priv) {
551	/* nvme association has been torn down */	551	/* nvme association has been torn down */
552	return rval;	552	return -ENODEV;
553	}	553	}
554		554
555	fcport = qla_rport->fcport;	555	fcport = qla_rport->fcport;
556		556
557	if (!qpair \|\| !fcport \|\| (qpair && !qpair->fw_started) \|\|	557	if (!qpair \|\| !fcport \|\| (qpair && !qpair->fw_started) \|\|
558	(fcport && fcport->deleted))	558	(fcport && fcport->deleted))
559	return rval;	559	return -ENODEV;
560		560
561	vha = fcport->vha;	561	vha = fcport->vha;
562		562
563	if (!(fcport->nvme_flag & NVME_FLAG_REGISTERED))	563	if (!(fcport->nvme_flag & NVME_FLAG_REGISTERED))
564	return rval;	564	return -ENODEV;
565		565
566	if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) \|\|	566	if (test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) \|\|
567	(qpair && !qpair->fw_started) \|\| fcport->deleted)	567	(qpair && !qpair->fw_started) \|\| fcport->deleted)

drivers/scsi/qla2xxx/qla_nx2.c+1−1

@@ -659,7 +659,7 @@ static int · 658 unmodified lines
659	qla8044_poll_reg(struct scsi_qla_host *vha, uint32_t addr,	659	qla8044_poll_reg(struct scsi_qla_host *vha, uint32_t addr,
660	int duration, uint32_t test_mask, uint32_t test_result)	660	int duration, uint32_t test_mask, uint32_t test_result)
661	{	661	{
662	uint32_t value;	662	uint32_t value = 0;
663	int timeout_error;	663	int timeout_error;
664	uint8_t retries;	664	uint8_t retries;
665	int ret_val = QLA_SUCCESS;	665	int ret_val = QLA_SUCCESS;

drivers/scsi/qla4xxx/ql4_nx.c+1−1

@@ -3225,7 +3225,7 @@ static void qla4_8xxx_uevent_emit(struct scsi_qla_host *ha, u32 code) · 3224 unmodified lines
3225		3225
3226	switch (code) {	3226	switch (code) {
3227	case QL4_UEVENT_CODE_FW_DUMP:	3227	case QL4_UEVENT_CODE_FW_DUMP:
3228	snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",	3228	snprintf(event_string, sizeof(event_string), "FW_DUMP=%lu",
3229	ha->host_no);	3229	ha->host_no);
3230	break;	3230	break;
3231	default:	3231	default:

drivers/scsi/scsi_lib.c+35−73

 }
 EXPORT_SYMBOL(__scsi_execute);
-/**
- * scsi_init_cmd_errh - Initialize cmd fields related to error handling.
- * @cmd:  command that is ready to be queued.
- *
- * This function has the job of initializing a number of fields related to error
- * handling. Typically this will be called once for each command, as required.
- */
-static void scsi_init_cmd_errh(struct scsi_cmnd *cmd)
-{
-	scsi_set_resid(cmd, 0);
-	memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
-	if (cmd->cmd_len == 0)
-		cmd->cmd_len = scsi_command_size(cmd->cmnd);
-}
 /*
  * Wake up the error handler if necessary. Avoid as follows that the error
  * handler is not woken up if host in-flight requests number ==
 	}
 }
-static void scsi_free_sgtables(struct scsi_cmnd *cmd)
+void scsi_free_sgtables(struct scsi_cmnd *cmd)
 {
 	if (cmd->sdb.table.nents)
 		sg_free_table_chained(&cmd->sdb.table,
 		sg_free_table_chained(&cmd->prot_sdb->table,
 				SCSI_INLINE_PROT_SG_CNT);
 }
+EXPORT_SYMBOL_GPL(scsi_free_sgtables);
 static void scsi_mq_uninit_cmd(struct scsi_cmnd *cmd)
 {
 }
 /**
- * scsi_init_io - SCSI I/O initialization function.
+ * scsi_alloc_sgtables - allocate S/G tables for a command
  * @cmd:  command descriptor we wish to initialize
  *
  * Returns:
  * * BLK_STS_RESOURCE - if the failure is retryable
  * * BLK_STS_IOERR    - if the failure is fatal
  */
-blk_status_t scsi_init_io(struct scsi_cmnd *cmd)
+blk_status_t scsi_alloc_sgtables(struct scsi_cmnd *cmd)
 {
 	struct scsi_device *sdev = cmd->device;
 	struct request *rq = cmd->request;
 	scsi_free_sgtables(cmd);
 	return ret;
 }
-EXPORT_SYMBOL(scsi_init_io);
+EXPORT_SYMBOL(scsi_alloc_sgtables);
 /**
  * scsi_initialize_rq - initialize struct scsi_cmnd partially
 	 * submit a request without an attached bio.
 	 */
 	if (req->bio) {
-		blk_status_t ret = scsi_init_io(cmd);
+		blk_status_t ret = scsi_alloc_sgtables(cmd);
 		if (unlikely(ret != BLK_STS_OK))
 			return ret;
 	} else {
 	}
 	cmd->cmd_len = scsi_req(req)->cmd_len;
+	if (cmd->cmd_len == 0)
+		cmd->cmd_len = scsi_command_size(cmd->cmnd);
 	cmd->cmnd = scsi_req(req)->cmd;
 	cmd->transfersize = blk_rq_bytes(req);
 	cmd->allowed = scsi_req(req)->retries;
 	return BLK_STS_OK;
 }
-/*
- * Setup a normal block command.  These are simple request from filesystems
- * that still need to be translated to SCSI CDBs from the ULD.
- */
-static blk_status_t scsi_setup_fs_cmnd(struct scsi_device *sdev,
-		struct request *req)
-{
-	struct scsi_cmnd *cmd = blk_mq_rq_to_pdu(req);
-	if (unlikely(sdev->handler && sdev->handler->prep_fn)) {
-		blk_status_t ret = sdev->handler->prep_fn(sdev, req);
-		if (ret != BLK_STS_OK)
-			return ret;
-	}
-	cmd->cmnd = scsi_req(req)->cmd = scsi_req(req)->__cmd;
-	memset(cmd->cmnd, 0, BLK_MAX_CDB);
-	return scsi_cmd_to_driver(cmd)->init_command(cmd);
-}
-static blk_status_t scsi_setup_cmnd(struct scsi_device *sdev,
-		struct request *req)
-{
-	struct scsi_cmnd *cmd = blk_mq_rq_to_pdu(req);
-	blk_status_t ret;
-	if (!blk_rq_bytes(req))
-		cmd->sc_data_direction = DMA_NONE;
-	else if (rq_data_dir(req) == WRITE)
-		cmd->sc_data_direction = DMA_TO_DEVICE;
-	else
-		cmd->sc_data_direction = DMA_FROM_DEVICE;
-	if (blk_rq_is_scsi(req))
-		ret = scsi_setup_scsi_cmnd(sdev, req);
-	else
-		ret = scsi_setup_fs_cmnd(sdev, req);
-	if (ret != BLK_STS_OK)
-		scsi_free_sgtables(cmd);
-	return ret;
-}
 static blk_status_t
-scsi_prep_state_check(struct scsi_device *sdev, struct request *req)
+scsi_device_state_check(struct scsi_device *sdev, struct request *req)
 {
 	switch (sdev->sdev_state) {
 	case SDEV_OFFLINE:
 		sizeof(struct scatterlist);
 }
-static blk_status_t scsi_mq_prep_fn(struct request *req)
+static blk_status_t scsi_prepare_cmd(struct request *req)
 {
 	struct scsi_cmnd *cmd = blk_mq_rq_to_pdu(req);
 	struct scsi_device *sdev = req->q->queuedata;
 	cmd->request = req;
 	cmd->tag = req->tag;
 	cmd->prot_op = SCSI_PROT_NORMAL;
+	if (blk_rq_bytes(req))
+		cmd->sc_data_direction = rq_dma_dir(req);
+	else
+		cmd->sc_data_direction = DMA_NONE;
 	sg = (void *)cmd + sizeof(struct scsi_cmnd) + shost->hostt->cmd_size;
 	cmd->sdb.table.sgl = sg;
 			(struct scatterlist *)(cmd->prot_sdb + 1);
 	}
-	blk_mq_start_request(req);
+	/*
+	 * Special handling for passthrough commands, which don't go to the ULP
+	 * at all:
+	 */
+	if (blk_rq_is_scsi(req))
+		return scsi_setup_scsi_cmnd(sdev, req);
+	if (sdev->handler && sdev->handler->prep_fn) {
+		blk_status_t ret = sdev->handler->prep_fn(sdev, req);
-	return scsi_setup_cmnd(sdev, req);
+		if (ret != BLK_STS_OK)
+			return ret;
+	}
+	cmd->cmnd = scsi_req(req)->cmd = scsi_req(req)->__cmd;
+	memset(cmd->cmnd, 0, BLK_MAX_CDB);
+	return scsi_cmd_to_driver(cmd)->init_command(cmd);
 }
 static void scsi_mq_done(struct scsi_cmnd *cmd)
 	 * commands.
 	 */
 	if (unlikely(sdev->sdev_state != SDEV_RUNNING)) {
-		ret = scsi_prep_state_check(sdev, req);
+		ret = scsi_device_state_check(sdev, req);
 		if (ret != BLK_STS_OK)
 			goto out_put_budget;
 	}
 		goto out_dec_target_busy;
 	if (!(req->rq_flags & RQF_DONTPREP)) {
-		ret = scsi_mq_prep_fn(req);
+		ret = scsi_prepare_cmd(req);
 		if (ret != BLK_STS_OK)
 			goto out_dec_host_busy;
 		req->rq_flags |= RQF_DONTPREP;
 	} else {
 		clear_bit(SCMD_STATE_COMPLETE, &cmd->state);
-		blk_mq_start_request(req);
 	}
 	cmd->flags &= SCMD_PRESERVED_FLAGS;
 	if (bd->last)
 		cmd->flags |= SCMD_LAST;
-	scsi_init_cmd_errh(cmd);
+	scsi_set_resid(cmd, 0);
+	memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
 	cmd->scsi_done = scsi_mq_done;
+	blk_mq_start_request(req);
 	reason = scsi_dispatch_cmd(cmd);
 	if (reason) {
 		scsi_set_blocked(cmd, reason);
 	return sdev;
 }
-EXPORT_SYMBOL_GPL(scsi_device_from_queue);
 /**
  * scsi_block_requests - Utility function used by low-level drivers to prevent

drivers/scsi/sd.c+15−12

 	cmd->transfersize = data_len;
 	rq->timeout = SD_TIMEOUT;
-	return scsi_init_io(cmd);
+	return scsi_alloc_sgtables(cmd);
 }
 static blk_status_t sd_setup_write_same16_cmnd(struct scsi_cmnd *cmd,
 	cmd->transfersize = data_len;
 	rq->timeout = unmap ? SD_TIMEOUT : SD_WRITE_SAME_TIMEOUT;
-	return scsi_init_io(cmd);
+	return scsi_alloc_sgtables(cmd);
 }
 static blk_status_t sd_setup_write_same10_cmnd(struct scsi_cmnd *cmd,
 	cmd->transfersize = data_len;
 	rq->timeout = unmap ? SD_TIMEOUT : SD_WRITE_SAME_TIMEOUT;
-	return scsi_init_io(cmd);
+	return scsi_alloc_sgtables(cmd);
 }
 static blk_status_t sd_setup_write_zeroes_cmnd(struct scsi_cmnd *cmd)
 	 * knows how much to actually write.
 	 */
 	rq->__data_len = sdp->sector_size;
-	ret = scsi_init_io(cmd);
+	ret = scsi_alloc_sgtables(cmd);
 	rq->__data_len = blk_rq_bytes(rq);
 	return ret;
 	unsigned int dif;
 	bool dix;
-	ret = scsi_init_io(cmd);
+	ret = scsi_alloc_sgtables(cmd);
 	if (ret != BLK_STS_OK)
 		return ret;
+	ret = BLK_STS_IOERR;
 	if (!scsi_device_online(sdp) || sdp->changed) {
 		scmd_printk(KERN_ERR, cmd, "device offline or changed\n");
-		return BLK_STS_IOERR;
+		goto fail;
 	}
 	if (blk_rq_pos(rq) + blk_rq_sectors(rq) > get_capacity(rq->rq_disk)) {
 		scmd_printk(KERN_ERR, cmd, "access beyond end of device\n");
-		return BLK_STS_IOERR;
+		goto fail;
 	}
 	if ((blk_rq_pos(rq) & mask) || (blk_rq_sectors(rq) & mask)) {
 		scmd_printk(KERN_ERR, cmd, "request not aligned to the logical block size\n");
-		return BLK_STS_IOERR;
+		goto fail;
 	}
 	/*
 	if (req_op(rq) == REQ_OP_ZONE_APPEND) {
 		ret = sd_zbc_prepare_zone_append(cmd, &lba, nr_blocks);
 		if (ret)
-			return ret;
+			goto fail;
 	}
 	fua = rq->cmd_flags & REQ_FUA ? 0x8 : 0;
 	}
 	if (unlikely(ret != BLK_STS_OK))
-		return ret;
+		goto fail;
 	/*
 	 * We shouldn't disconnect in the middle of a sector, so with a dumb
 				     blk_rq_sectors(rq)));
 	/*
-	 * This indicates that the command is ready from our end to be
+	 * This indicates that the command is ready from our end to be queued.
-	 * queued.
 	 */
 	return BLK_STS_OK;
+fail:
+	scsi_free_sgtables(cmd);
+	return ret;
 }
 static blk_status_t sd_init_command(struct scsi_cmnd *cmd)

drivers/scsi/snic/vnic_cq.c+1−7

 int svnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq,
 	unsigned int index, unsigned int desc_count, unsigned int desc_size)
 {
-	int err;
 	cq->index = index;
 	cq->vdev = vdev;
 		return -EINVAL;
 	}
-	err = svnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
+	return svnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size);
-	if (err)
-		return err;
-	return 0;
 }
 void svnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,

drivers/scsi/sr.c+7−10

 	struct request *rq = SCpnt->request;
 	blk_status_t ret;
-	ret = scsi_init_io(SCpnt);
+	ret = scsi_alloc_sgtables(SCpnt);
 	if (ret != BLK_STS_OK)
-		goto out;
+		return ret;
 	cd = scsi_cd(rq->rq_disk);
-	/* from here on until we're complete, any goto out
-	 * is used for a killable error condition */
-	ret = BLK_STS_IOERR;
 	SCSI_LOG_HLQUEUE(1, scmd_printk(KERN_INFO, SCpnt,
 		"Doing sr request, block = %d\n", block));
 	SCpnt->transfersize = cd->device->sector_size;
 	SCpnt->underflow = this_count << 9;
 	SCpnt->allowed = MAX_RETRIES;
+	SCpnt->cmd_len = 10;
 	/*
-	 * This indicates that the command is ready from our end to be
+	 * This indicates that the command is ready from our end to be queued.
-	 * queued.
 	 */
-	ret = BLK_STS_OK;
+	return BLK_STS_OK;
  out:
-	return ret;
+	scsi_free_sgtables(SCpnt);
+	return BLK_STS_IOERR;
 }
 static void sr_revalidate_disk(struct scsi_cd *cd)

drivers/scsi/sym53c8xx_2/sym_hipd.c+1−1

@@ -5656,7 +5656,7 @@ int sym_hcb_attach(struct Scsi_Host shost, struct sym_fw fw, struct sym_nvram · 5655 unmodified lines
5656	/*	5656	/*
5657	* Allocate the array of lists of CCBs hashed by DSA.	5657	* Allocate the array of lists of CCBs hashed by DSA.
5658	*/	5658	*/
5659	np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(struct sym_ccb **), GFP_KERNEL);	5659	np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(*np->ccbh), GFP_KERNEL);
5660	if (!np->ccbh)	5660	if (!np->ccbh)
5661	goto attach_failed;	5661	goto attach_failed;
5662		5662

drivers/target/target_core_rd.c+1−1

@@ -131,7 +131,7 @@ static int rd_allocate_sgl_table(struct rd_dev rd_dev, struct rd_dev_sg_table · 130 unmodified lines
131	if (sg_per_table < total_sg_needed)	131	if (sg_per_table < total_sg_needed)
132	chain_entry = 1;	132	chain_entry = 1;
133		133
134	sg = kcalloc(sg_per_table + chain_entry, sizeof(*sg),	134	sg = kmalloc_array(sg_per_table + chain_entry, sizeof(*sg),
135	GFP_KERNEL);	135	GFP_KERNEL);
136	if (!sg)	136	if (!sg)
137	return -ENOMEM;	137	return -ENOMEM;

include/scsi/scsi_cmnd.h+2−1

@@ -165,7 +165,8 @@ extern void scsi_kmap_atomic_sg(struct scatterlist sg, int sg_count, · 164 unmodified lines
165	size_t offset, size_t len);	165	size_t offset, size_t len);
166	extern void scsi_kunmap_atomic_sg(void *virt);	166	extern void scsi_kunmap_atomic_sg(void *virt);
167		167
168	extern blk_status_t scsi_init_io(struct scsi_cmnd *cmd);	168	blk_status_t scsi_alloc_sgtables(struct scsi_cmnd *cmd);
		169	void scsi_free_sgtables(struct scsi_cmnd *cmd);
169		170
170	#ifdef CONFIG_SCSI_DMA	171	#ifdef CONFIG_SCSI_DMA
171	extern int scsi_dma_map(struct scsi_cmnd *cmd);	172	extern int scsi_dma_map(struct scsi_cmnd *cmd);

Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

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