Unified · Split
| @@ -142,3 +142,6 @@ x509.genkey · 141 unmodified lines | ||
| 142 | 142 | |
| 143 | 143 | # Kdevelop4 |
| 144 | 144 | *.kdev4 |
| 145 | + | |
| 146 | +# Clang's compilation database file | |
| 147 | +/compile_commands.json | |
| @@ -64,6 +64,9 @@ Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com> · 63 unmodified lines | ||
| 64 | 64 | Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com> |
| 65 | 65 | Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com> |
| 66 | 66 | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> |
| 67 | +Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com> | |
| 68 | +Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com> | |
| 69 | +Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com> | |
| 67 | 70 | Domen Puncer <domen@coderock.org> |
| 68 | 71 | Douglas Gilbert <dougg@torque.net> |
| 69 | 72 | Ed L. Cashin <ecashin@coraid.com> |
| @@ -98,6 +101,7 @@ Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com> · 28 unmodified lines | ||
| 98 | 101 | Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com> |
| 99 | 102 | <javier@osg.samsung.com> <javier.martinez@collabora.co.uk> |
| 100 | 103 | Jean Tourrilhes <jt@hpl.hp.com> |
| 104 | +<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com> | |
| 101 | 105 | Jeff Garzik <jgarzik@pretzel.yyz.us> |
| 102 | 106 | Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com> |
| 103 | 107 | Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net> |
| @@ -116,6 +120,7 @@ John Stultz <johnstul@us.ibm.com> · 12 unmodified lines | ||
| 116 | 120 | Juha Yrjola <at solidboot.com> |
| 117 | 121 | Juha Yrjola <juha.yrjola@nokia.com> |
| 118 | 122 | Juha Yrjola <juha.yrjola@solidboot.com> |
| 123 | +Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com> | |
| 119 | 124 | Kay Sievers <kay.sievers@vrfy.org> |
| 120 | 125 | Kenneth W Chen <kenneth.w.chen@intel.com> |
| 121 | 126 | Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com> |
| @@ -132,6 +137,7 @@ Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch> · 10 unmodified lines | ||
| 132 | 137 | Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org> |
| 133 | 138 | Li Yang <leoyang.li@nxp.com> <leoli@freescale.com> |
| 134 | 139 | Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com> |
| 140 | +Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com> | |
| 135 | 141 | Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com> |
| 136 | 142 | Mark Brown <broonie@sirena.org.uk> |
| 137 | 143 | Mark Yao <markyao0591@gmail.com> <mark.yao@rock-chips.com> |
| @@ -157,6 +163,8 @@ Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.co · 19 unmodified lines | ||
| 157 | 163 | Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com> |
| 158 | 164 | Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting> |
| 159 | 165 | Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com> |
| 166 | +Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com> | |
| 167 | +Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> | |
| 160 | 168 | Mayuresh Janorkar <mayur@ti.com> |
| 161 | 169 | Michael Buesch <m@bues.ch> |
| 162 | 170 | Michel Dänzer <michel@tungstengraphics.com> |
| @@ -12,7 +12,8 @@ Description: (RW) Configure MSC operating mode: · 11 unmodified lines | ||
| 12 | 12 | - "single", for contiguous buffer mode (high-order alloc); |
| 13 | 13 | - "multi", for multiblock mode; |
| 14 | 14 | - "ExI", for DCI handler mode; |
| 15 | − - "debug", for debug mode. | |
| 15 | + - "debug", for debug mode; | |
| 16 | + - any of the currently loaded buffer sinks. | |
| 16 | 17 | If operating mode changes, existing buffer is deallocated, |
| 17 | 18 | provided there are no active users and tracing is not enabled, |
| 18 | 19 | otherwise the write will fail. |
File renamed without changes.
| @@ -21,3 +21,26 @@ Contact: Wu Hao <hao.wu@intel.com> · 20 unmodified lines | ||
| 21 | 21 | Description: Read-only. It returns Bitstream (static FPGA region) meta |
| 22 | 22 | data, which includes the synthesis date, seed and other |
| 23 | 23 | information of this static FPGA region. |
| 24 | + | |
| 25 | +What: /sys/bus/platform/devices/dfl-fme.0/cache_size | |
| 26 | +Date: August 2019 | |
| 27 | +KernelVersion: 5.4 | |
| 28 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 29 | +Description: Read-only. It returns cache size of this FPGA device. | |
| 30 | + | |
| 31 | +What: /sys/bus/platform/devices/dfl-fme.0/fabric_version | |
| 32 | +Date: August 2019 | |
| 33 | +KernelVersion: 5.4 | |
| 34 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 35 | +Description: Read-only. It returns fabric version of this FPGA device. | |
| 36 | + Userspace applications need this information to select | |
| 37 | + best data channels per different fabric design. | |
| 38 | + | |
| 39 | +What: /sys/bus/platform/devices/dfl-fme.0/socket_id | |
| 40 | +Date: August 2019 | |
| 41 | +KernelVersion: 5.4 | |
| 42 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 43 | +Description: Read-only. It returns socket_id to indicate which socket | |
| 44 | + this FPGA belongs to, only valid for integrated solution. | |
| 45 | + User only needs this information, in case standard numa node | |
| 46 | + can't provide correct information. | |
| @@ -14,3 +14,35 @@ Description: Read-only. User can program different PR bitstreams to FPGA · 13 unmodified lines | ||
| 14 | 14 | Accelerator Function Unit (AFU) for different functions. It |
| 15 | 15 | returns uuid which could be used to identify which PR bitstream |
| 16 | 16 | is programmed in this AFU. |
| 17 | + | |
| 18 | +What: /sys/bus/platform/devices/dfl-port.0/power_state | |
| 19 | +Date: August 2019 | |
| 20 | +KernelVersion: 5.4 | |
| 21 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 22 | +Description: Read-only. It reports the APx (AFU Power) state, different APx | |
| 23 | + means different throttling level. When reading this file, it | |
| 24 | + returns "0" - Normal / "1" - AP1 / "2" - AP2 / "6" - AP6. | |
| 25 | + | |
| 26 | +What: /sys/bus/platform/devices/dfl-port.0/ap1_event | |
| 27 | +Date: August 2019 | |
| 28 | +KernelVersion: 5.4 | |
| 29 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 30 | +Description: Read-write. Read this file for AP1 (AFU Power State 1) event. | |
| 31 | + It's used to indicate transient AP1 state. Write 1 to this | |
| 32 | + file to clear AP1 event. | |
| 33 | + | |
| 34 | +What: /sys/bus/platform/devices/dfl-port.0/ap2_event | |
| 35 | +Date: August 2019 | |
| 36 | +KernelVersion: 5.4 | |
| 37 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 38 | +Description: Read-write. Read this file for AP2 (AFU Power State 2) event. | |
| 39 | + It's used to indicate transient AP2 state. Write 1 to this | |
| 40 | + file to clear AP2 event. | |
| 41 | + | |
| 42 | +What: /sys/bus/platform/devices/dfl-port.0/ltr | |
| 43 | +Date: August 2019 | |
| 44 | +KernelVersion: 5.4 | |
| 45 | +Contact: Wu Hao <hao.wu@intel.com> | |
| 46 | +Description: Read-write. Read or set AFU latency tolerance reporting value. | |
| 47 | + Set ltr to 1 if the AFU can tolerate latency >= 40us or set it | |
| 48 | + to 0 if it is latency sensitive. | |
| @@ -9,7 +9,7 @@ Linux PCI Bus Subsystem · 8 unmodified lines | ||
| 9 | 9 | :numbered: |
| 10 | 10 | |
| 11 | 11 | pci |
| 12 | − picebus-howto | |
| 12 | + pciebus-howto | |
| 13 | 13 | pci-iov-howto |
| 14 | 14 | msi-howto |
| 15 | 15 | acpi-info |
| @@ -403,7 +403,7 @@ That is, the recovery API only requires that: · 402 unmodified lines | ||
| 403 | 403 | .. note:: |
| 404 | 404 | |
| 405 | 405 | Implementation details for the powerpc platform are discussed in |
| 406 | − the file Documentation/powerpc/eeh-pci-error-recovery.txt | |
| 406 | + the file Documentation/powerpc/eeh-pci-error-recovery.rst | |
| 407 | 407 | |
| 408 | 408 | As of this writing, there is a growing list of device drivers with |
| 409 | 409 | patches implementing error recovery. Not all of these patches are in |
| @@ -422,3 +422,6 @@ That is, the recovery API only requires that: · 12 unmodified lines | ||
| 422 | 422 | - drivers/net/cxgb3 |
| 423 | 423 | - drivers/net/s2io.c |
| 424 | 424 | - drivers/net/qlge |
| 425 | + | |
| 426 | +The End | |
| 427 | +------- | |
File renamed without changes.
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | Using hlist_nulls to protect read-mostly linked lists and |
| 2 | 2 | objects using SLAB_TYPESAFE_BY_RCU allocations. |
| 3 | 3 | |
| 4 | −Please read the basics in Documentation/RCU/listRCU.txt | |
| 4 | +Please read the basics in Documentation/RCU/listRCU.rst | |
| 5 | 5 | |
| 6 | 6 | Using special makers (called 'nulls') is a convenient way |
| 7 | 7 | to solve following problem : |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = 'Linux Kernel User Documentation' | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'linux-user.tex', 'Linux Kernel User Documentation', | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -41,10 +41,11 @@ Related CVEs · 40 unmodified lines | ||
| 41 | 41 | |
| 42 | 42 | The following CVE entries describe Spectre variants: |
| 43 | 43 | |
| 44 | − ============= ======================= ================= | |
| 44 | + ============= ======================= ========================== | |
| 45 | 45 | CVE-2017-5753 Bounds check bypass Spectre variant 1 |
| 46 | 46 | CVE-2017-5715 Branch target injection Spectre variant 2 |
| 47 | − ============= ======================= ================= | |
| 47 | + CVE-2019-1125 Spectre v1 swapgs Spectre variant 1 (swapgs) | |
| 48 | + ============= ======================= ========================== | |
| 48 | 49 | |
| 49 | 50 | Problem |
| 50 | 51 | ------- |
| @@ -78,6 +79,13 @@ There are some extensions of Spectre variant 1 attacks for reading data · 27 unmodified lines | ||
| 78 | 79 | over the network, see :ref:`[12] <spec_ref12>`. However such attacks |
| 79 | 80 | are difficult, low bandwidth, fragile, and are considered low risk. |
| 80 | 81 | |
| 82 | +Note that, despite "Bounds Check Bypass" name, Spectre variant 1 is not | |
| 83 | +only about user-controlled array bounds checks. It can affect any | |
| 84 | +conditional checks. The kernel entry code interrupt, exception, and NMI | |
| 85 | +handlers all have conditional swapgs checks. Those may be problematic | |
| 86 | +in the context of Spectre v1, as kernel code can speculatively run with | |
| 87 | +a user GS. | |
| 88 | + | |
| 81 | 89 | Spectre variant 2 (Branch Target Injection) |
| 82 | 90 | ------------------------------------------- |
| 83 | 91 | |
| @@ -132,6 +140,9 @@ not cover all possible attack vectors. · 48 unmodified lines | ||
| 132 | 140 | 1. A user process attacking the kernel |
| 133 | 141 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 134 | 142 | |
| 143 | +Spectre variant 1 | |
| 144 | +~~~~~~~~~~~~~~~~~ | |
| 145 | + | |
| 135 | 146 | The attacker passes a parameter to the kernel via a register or |
| 136 | 147 | via a known address in memory during a syscall. Such parameter may |
| 137 | 148 | be used later by the kernel as an index to an array or to derive |
| @@ -144,7 +155,40 @@ not cover all possible attack vectors. · 6 unmodified lines | ||
| 144 | 155 | potentially be influenced for Spectre attacks, new "nospec" accessor |
| 145 | 156 | macros are used to prevent speculative loading of data. |
| 146 | 157 | |
| 147 | − Spectre variant 2 attacker can :ref:`poison <poison_btb>` the branch | |
| 158 | +Spectre variant 1 (swapgs) | |
| 159 | +~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 160 | + | |
| 161 | + An attacker can train the branch predictor to speculatively skip the | |
| 162 | + swapgs path for an interrupt or exception. If they initialize | |
| 163 | + the GS register to a user-space value, if the swapgs is speculatively | |
| 164 | + skipped, subsequent GS-related percpu accesses in the speculation | |
| 165 | + window will be done with the attacker-controlled GS value. This | |
| 166 | + could cause privileged memory to be accessed and leaked. | |
| 167 | + | |
| 168 | + For example: | |
| 169 | + | |
| 170 | + :: | |
| 171 | + | |
| 172 | + if (coming from user space) | |
| 173 | + swapgs | |
| 174 | + mov %gs:<percpu_offset>, %reg | |
| 175 | + mov (%reg), %reg1 | |
| 176 | + | |
| 177 | + When coming from user space, the CPU can speculatively skip the | |
| 178 | + swapgs, and then do a speculative percpu load using the user GS | |
| 179 | + value. So the user can speculatively force a read of any kernel | |
| 180 | + value. If a gadget exists which uses the percpu value as an address | |
| 181 | + in another load/store, then the contents of the kernel value may | |
| 182 | + become visible via an L1 side channel attack. | |
| 183 | + | |
| 184 | + A similar attack exists when coming from kernel space. The CPU can | |
| 185 | + speculatively do the swapgs, causing the user GS to get used for the | |
| 186 | + rest of the speculative window. | |
| 187 | + | |
| 188 | +Spectre variant 2 | |
| 189 | +~~~~~~~~~~~~~~~~~ | |
| 190 | + | |
| 191 | + A spectre variant 2 attacker can :ref:`poison <poison_btb>` the branch | |
| 148 | 192 | target buffer (BTB) before issuing syscall to launch an attack. |
| 149 | 193 | After entering the kernel, the kernel could use the poisoned branch |
| 150 | 194 | target buffer on indirect jump and jump to gadget code in speculative |
| @@ -280,11 +324,18 @@ The sysfs file showing Spectre variant 1 mitigation status is: · 129 unmodified lines | ||
| 280 | 324 | |
| 281 | 325 | The possible values in this file are: |
| 282 | 326 | |
| 283 | − ======================================= ================================= | |
| 284 | − 'Mitigation: __user pointer sanitation' Protection in kernel on a case by | |
| 285 | − case base with explicit pointer | |
| 286 | − sanitation. | |
| 287 | − ======================================= ================================= | |
| 327 | + .. list-table:: | |
| 328 | + | |
| 329 | + * - 'Not affected' | |
| 330 | + - The processor is not vulnerable. | |
| 331 | + * - 'Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers' | |
| 332 | + - The swapgs protections are disabled; otherwise it has | |
| 333 | + protection in the kernel on a case by case base with explicit | |
| 334 | + pointer sanitation and usercopy LFENCE barriers. | |
| 335 | + * - 'Mitigation: usercopy/swapgs barriers and __user pointer sanitization' | |
| 336 | + - Protection in the kernel on a case by case base with explicit | |
| 337 | + pointer sanitation, usercopy LFENCE barriers, and swapgs LFENCE | |
| 338 | + barriers. | |
| 288 | 339 | |
| 289 | 340 | However, the protections are put in place on a case by case basis, |
| 290 | 341 | and there is no guarantee that all possible attack vectors for Spectre |
| @@ -366,12 +417,27 @@ Turning on mitigation for Spectre variant 1 and Spectre variant 2 · 75 unmodified lines | ||
| 366 | 417 | 1. Kernel mitigation |
| 367 | 418 | ^^^^^^^^^^^^^^^^^^^^ |
| 368 | 419 | |
| 420 | +Spectre variant 1 | |
| 421 | +~~~~~~~~~~~~~~~~~ | |
| 422 | + | |
| 369 | 423 | For the Spectre variant 1, vulnerable kernel code (as determined |
| 370 | 424 | by code audit or scanning tools) is annotated on a case by case |
| 371 | 425 | basis to use nospec accessor macros for bounds clipping :ref:`[2] |
| 372 | 426 | <spec_ref2>` to avoid any usable disclosure gadgets. However, it may |
| 373 | 427 | not cover all attack vectors for Spectre variant 1. |
| 374 | 428 | |
| 429 | + Copy-from-user code has an LFENCE barrier to prevent the access_ok() | |
| 430 | + check from being mis-speculated. The barrier is done by the | |
| 431 | + barrier_nospec() macro. | |
| 432 | + | |
| 433 | + For the swapgs variant of Spectre variant 1, LFENCE barriers are | |
| 434 | + added to interrupt, exception and NMI entry where needed. These | |
| 435 | + barriers are done by the FENCE_SWAPGS_KERNEL_ENTRY and | |
| 436 | + FENCE_SWAPGS_USER_ENTRY macros. | |
| 437 | + | |
| 438 | +Spectre variant 2 | |
| 439 | +~~~~~~~~~~~~~~~~~ | |
| 440 | + | |
| 375 | 441 | For Spectre variant 2 mitigation, the compiler turns indirect calls or |
| 376 | 442 | jumps in the kernel into equivalent return trampolines (retpolines) |
| 377 | 443 | :ref:`[3] <spec_ref3>` :ref:`[9] <spec_ref9>` to go to the target |
| @@ -473,6 +539,12 @@ Mitigation control on the kernel command line · 95 unmodified lines | ||
| 473 | 539 | Spectre variant 2 mitigation can be disabled or force enabled at the |
| 474 | 540 | kernel command line. |
| 475 | 541 | |
| 542 | + nospectre_v1 | |
| 543 | + | |
| 544 | + [X86,PPC] Disable mitigations for Spectre Variant 1 | |
| 545 | + (bounds check bypass). With this option data leaks are | |
| 546 | + possible in the system. | |
| 547 | + | |
| 476 | 548 | nospectre_v2 |
| 477 | 549 | |
| 478 | 550 | [X86] Disable all mitigations for the Spectre variant 2 |
| @@ -2545,7 +2545,7 @@ · 2544 unmodified lines | ||
| 2545 | 2545 | mem_encrypt=on: Activate SME |
| 2546 | 2546 | mem_encrypt=off: Do not activate SME |
| 2547 | 2547 | |
| 2548 | − Refer to Documentation/virtual/kvm/amd-memory-encryption.rst | |
| 2548 | + Refer to Documentation/virt/kvm/amd-memory-encryption.rst | |
| 2549 | 2549 | for details on when memory encryption can be activated. |
| 2550 | 2550 | |
| 2551 | 2551 | mem_sleep_default= [SUSPEND] Default system suspend mode: |
| @@ -2604,7 +2604,7 @@ · 52 unmodified lines | ||
| 2604 | 2604 | expose users to several CPU vulnerabilities. |
| 2605 | 2605 | Equivalent to: nopti [X86,PPC] |
| 2606 | 2606 | kpti=0 [ARM64] |
| 2607 | − nospectre_v1 [PPC] | |
| 2607 | + nospectre_v1 [X86,PPC] | |
| 2608 | 2608 | nobp=0 [S390] |
| 2609 | 2609 | nospectre_v2 [X86,PPC,S390,ARM64] |
| 2610 | 2610 | spectre_v2_user=off [X86] |
| @@ -2965,9 +2965,9 @@ · 354 unmodified lines | ||
| 2965 | 2965 | nosmt=force: Force disable SMT, cannot be undone |
| 2966 | 2966 | via the sysfs control file. |
| 2967 | 2967 | |
| 2968 | − nospectre_v1 [PPC] Disable mitigations for Spectre Variant 1 (bounds | |
| 2969 | − check bypass). With this option data leaks are possible | |
| 2970 | − in the system. | |
| 2968 | + nospectre_v1 [X86,PPC] Disable mitigations for Spectre Variant 1 | |
| 2969 | + (bounds check bypass). With this option data leaks are | |
| 2970 | + possible in the system. | |
| 2971 | 2971 | |
| 2972 | 2972 | nospectre_v2 [X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for |
| 2973 | 2973 | the Spectre variant 2 (indirect branch prediction) |
| @@ -4090,6 +4090,13 @@ · 1116 unmodified lines | ||
| 4090 | 4090 | Run specified binary instead of /init from the ramdisk, |
| 4091 | 4091 | used for early userspace startup. See initrd. |
| 4092 | 4092 | |
| 4093 | + rdrand= [X86] | |
| 4094 | + force - Override the decision by the kernel to hide the | |
| 4095 | + advertisement of RDRAND support (this affects | |
| 4096 | + certain AMD processors because of buggy BIOS | |
| 4097 | + support, specifically around the suspend/resume | |
| 4098 | + path). | |
| 4099 | + | |
| 4093 | 4100 | rdt= [HW,X86,RDT] |
| 4094 | 4101 | Turn on/off individual RDT features. List is: |
| 4095 | 4102 | cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp, |
| @@ -53,7 +53,7 @@ disabled, there is ``khugepaged`` daemon that scans memory and · 52 unmodified lines | ||
| 53 | 53 | collapses sequences of basic pages into huge pages. |
| 54 | 54 | |
| 55 | 55 | The THP behaviour is controlled via :ref:`sysfs <thp_sysfs>` |
| 56 | −interface and using madivse(2) and prctl(2) system calls. | |
| 56 | +interface and using madvise(2) and prctl(2) system calls. | |
| 57 | 57 | |
| 58 | 58 | Transparent Hugepage Support maximizes the usefulness of free memory |
| 59 | 59 | if compared to the reservation approach of hugetlbfs by allowing all |
| @@ -39,7 +39,6 @@ Table : Subdirectories in /proc/sys/net · 38 unmodified lines | ||
| 39 | 39 | 802 E802 protocol ax25 AX25 |
| 40 | 40 | ethernet Ethernet protocol rose X.25 PLP layer |
| 41 | 41 | ipv4 IP version 4 x25 X.25 protocol |
| 42 | − ipx IPX token-ring IBM token ring | |
| 43 | 42 | bridge Bridging decnet DEC net |
| 44 | 43 | ipv6 IP version 6 tipc TIPC |
| 45 | 44 | ========= =================== = ========== ================== |
| @@ -401,33 +400,7 @@ interface. · 355 unmodified lines | ||
| 401 | 400 | (network) that the route leads to, the router (may be directly connected), the |
| 402 | 401 | route flags, and the device the route is using. |
| 403 | 402 | |
| 404 | − | |
| 405 | −5. IPX | |
| 406 | −------ | |
| 407 | − | |
| 408 | −The IPX protocol has no tunable values in proc/sys/net. | |
| 409 | − | |
| 410 | −The IPX protocol does, however, provide proc/net/ipx. This lists each IPX | |
| 411 | −socket giving the local and remote addresses in Novell format (that is | |
| 412 | −network:node:port). In accordance with the strange Novell tradition, | |
| 413 | −everything but the port is in hex. Not_Connected is displayed for sockets that | |
| 414 | −are not tied to a specific remote address. The Tx and Rx queue sizes indicate | |
| 415 | −the number of bytes pending for transmission and reception. The state | |
| 416 | −indicates the state the socket is in and the uid is the owning uid of the | |
| 417 | −socket. | |
| 418 | − | |
| 419 | −The /proc/net/ipx_interface file lists all IPX interfaces. For each interface | |
| 420 | −it gives the network number, the node number, and indicates if the network is | |
| 421 | −the primary network. It also indicates which device it is bound to (or | |
| 422 | −Internal for internal networks) and the Frame Type if appropriate. Linux | |
| 423 | −supports 802.3, 802.2, 802.2 SNAP and DIX (Blue Book) ethernet framing for | |
| 424 | −IPX. | |
| 425 | − | |
| 426 | −The /proc/net/ipx_route table holds a list of IPX routes. For each route it | |
| 427 | −gives the destination network, the router node (or Directly) and the network | |
| 428 | −address of the router (or Connected) for internal networks. | |
| 429 | − | |
| 430 | −6. TIPC | |
| 403 | +5. TIPC | |
| 431 | 404 | ------- |
| 432 | 405 | |
| 433 | 406 | tipc_rmem |
| @@ -16,6 +16,8 @@ import sys · 15 unmodified lines | ||
| 16 | 16 | import os |
| 17 | 17 | import sphinx |
| 18 | 18 | |
| 19 | +from subprocess import check_output | |
| 20 | + | |
| 19 | 21 | # Get Sphinx version |
| 20 | 22 | major, minor, patch = sphinx.version_info[:3] |
| 21 | 23 | |
| @@ -276,10 +278,21 @@ latex_elements = { · 254 unmodified lines | ||
| 276 | 278 | \\setsansfont{DejaVu Sans} |
| 277 | 279 | \\setromanfont{DejaVu Serif} |
| 278 | 280 | \\setmonofont{DejaVu Sans Mono} |
| 279 | − | |
| 280 | 281 | ''' |
| 281 | 282 | } |
| 282 | 283 | |
| 284 | +# At least one book (translations) may have Asian characters | |
| 285 | +# with are only displayed if xeCJK is used | |
| 286 | + | |
| 287 | +cjk_cmd = check_output(['fc-list', '--format="%{family[0]}\n"']).decode('utf-8', 'ignore') | |
| 288 | +if cjk_cmd.find("Noto Sans CJK SC") >= 0: | |
| 289 | + print ("enabling CJK for LaTeX builder") | |
| 290 | + latex_elements['preamble'] += ''' | |
| 291 | + % This is needed for translations | |
| 292 | + \\usepackage{xeCJK} | |
| 293 | + \\setCJKmainfont{Noto Sans CJK SC} | |
| 294 | + ''' | |
| 295 | + | |
| 283 | 296 | # Fix reference escape troubles with Sphinx 1.4.x |
| 284 | 297 | if major == 1 and minor > 3: |
| 285 | 298 | latex_elements['preamble'] += '\\renewcommand*{\\DUrole}[2]{ #2 }\n' |
| @@ -410,6 +423,21 @@ latex_documents = [ · 124 unmodified lines | ||
| 410 | 423 | 'The kernel development community', 'manual'), |
| 411 | 424 | ] |
| 412 | 425 | |
| 426 | +# Add all other index files from Documentation/ subdirectories | |
| 427 | +for fn in os.listdir('.'): | |
| 428 | + doc = os.path.join(fn, "index") | |
| 429 | + if os.path.exists(doc + ".rst"): | |
| 430 | + has = False | |
| 431 | + for l in latex_documents: | |
| 432 | + if l[0] == doc: | |
| 433 | + has = True | |
| 434 | + break | |
| 435 | + if not has: | |
| 436 | + latex_documents.append((doc, fn + '.tex', | |
| 437 | + 'Linux %s Documentation' % fn.capitalize(), | |
| 438 | + 'The kernel development community', | |
| 439 | + 'manual')) | |
| 440 | + | |
| 413 | 441 | # The name of an image file (relative to this directory) to place at the top of |
| 414 | 442 | # the title page. |
| 415 | 443 | #latex_logo = None |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Core-API Documentation" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'core-api.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = 'Linux Kernel Crypto API' | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'crypto-api.tex', 'Linux Kernel Crypto API manual', | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Development tools for the kernel" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'dev-tools.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -19,7 +19,9 @@ quiet_cmd_mk_schema = SCHEMA $@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | DT_DOCS = $(shell \ |
| 21 | 21 | cd $(srctree)/$(src) && \ |
| 22 | − find * \( -name '*.yaml' ! -name $(DT_TMP_SCHEMA) \) \ | |
| 22 | + find * \( -name '*.yaml' ! \ | |
| 23 | + -name $(DT_TMP_SCHEMA) ! \ | |
| 24 | + -name '*.example.dt.yaml' \) \ | |
| 23 | 25 | ) |
| 24 | 26 | |
| 25 | 27 | DT_SCHEMA_FILES ?= $(addprefix $(src)/,$(DT_DOCS)) |
| @@ -136,7 +136,9 @@ Required properties: · 135 unmodified lines | ||
| 136 | 136 | OCOTP bindings based on SCU Message Protocol |
| 137 | 137 | ------------------------------------------------------------ |
| 138 | 138 | Required properties: |
| 139 | −- compatible: Should be "fsl,imx8qxp-scu-ocotp" | |
| 139 | +- compatible: Should be one of: | |
| 140 | + "fsl,imx8qm-scu-ocotp", | |
| 141 | + "fsl,imx8qxp-scu-ocotp". | |
| 140 | 142 | - #address-cells: Must be 1. Contains byte index |
| 141 | 143 | - #size-cells: Must be 1. Contains byte length |
| 142 | 144 | |
| @@ -703,4 +703,4 @@ cpus { · 702 unmodified lines | ||
| 703 | 703 | https://www.devicetree.org/specifications/ |
| 704 | 704 | |
| 705 | 705 | [6] ARM Linux Kernel documentation - Booting AArch64 Linux |
| 706 | − Documentation/arm64/booting.txt | |
| 706 | + Documentation/arm64/booting.rst | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/arm/shmobile.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/arm/renesas.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Renesas SH-Mobile, R-Mobile, and R-Car Platform Device Tree Bindings |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/arm/milbeaut.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/arm/socionext/milbeaut.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Milbeaut platforms device tree bindings |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/arm/ti/davinci.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/arm/ti/ti,davinci.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Texas Instruments DaVinci Platforms Device Tree Bindings |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/phy/allwinner,sun4i-a10-ccu.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Allwinner Clock Control Unit Device Tree Bindings |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | # Copyright 2019 Linaro Ltd. |
| 3 | 3 | %YAML 1.2 |
| 4 | 4 | --- |
| 5 | −$id: "http://devicetree.org/schemas/firmware/intel-ixp4xx-network-processing-engine.yaml#" | |
| 5 | +$id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#" | |
| 6 | 6 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 7 | 7 | |
| 8 | 8 | title: Intel IXP4xx Network Processing Engine |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/iio/accelerometers/adi,adxl345.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/iio/accel/adi,adxl345.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Analog Devices ADXL345/ADXL375 3-Axis Digital Accelerometers |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/iio/accelerometers/adi,adxl372.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/iio/accel/adi,adxl372.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Analog Devices ADXL372 3-Axis, +/-(200g) Digital Accelerometer |
| @@ -5,21 +5,19 @@ Required properties: · 4 unmodified lines | ||
| 5 | 5 | - compatible: should be "amazon,al-fic" |
| 6 | 6 | - reg: physical base address and size of the registers |
| 7 | 7 | - interrupt-controller: identifies the node as an interrupt controller |
| 8 | −- #interrupt-cells: must be 2. | |
| 9 | − First cell defines the index of the interrupt within the controller. | |
| 10 | − Second cell is used to specify the trigger type and must be one of the | |
| 11 | − following: | |
| 12 | − - bits[3:0] trigger type and level flags | |
| 13 | − 1 = low-to-high edge triggered | |
| 14 | − 4 = active high level-sensitive | |
| 15 | −- interrupt-parent: specifies the parent interrupt controller. | |
| 8 | +- #interrupt-cells : must be 2. Specifies the number of cells needed to encode | |
| 9 | + an interrupt source. Supported trigger types are low-to-high edge | |
| 10 | + triggered and active high level-sensitive. | |
| 16 | 11 | - interrupts: describes which input line in the interrupt parent, this |
| 17 | 12 | fic's output is connected to. This field property depends on the parent's |
| 18 | 13 | binding |
| 19 | 14 | |
| 15 | +Please refer to interrupts.txt in this directory for details of the common | |
| 16 | +Interrupt Controllers bindings used by client devices. | |
| 17 | + | |
| 20 | 18 | Example: |
| 21 | 19 | |
| 22 | −amazon_fic: interrupt-controller@0xfd8a8500 { | |
| 20 | +amazon_fic: interrupt-controller@fd8a8500 { | |
| 23 | 21 | compatible = "amazon,al-fic"; |
| 24 | 22 | interrupt-controller; |
| 25 | 23 | #interrupt-cells = <2>; |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | # Copyright 2018 Linaro Ltd. |
| 3 | 3 | %YAML 1.2 |
| 4 | 4 | --- |
| 5 | −$id: "http://devicetree.org/schemas/interrupt/intel-ixp4xx-interrupt.yaml#" | |
| 5 | +$id: "http://devicetree.org/schemas/interrupt-controller/intel,ixp4xx-interrupt.yaml#" | |
| 6 | 6 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 7 | 7 | |
| 8 | 8 | title: Intel IXP4xx XScale Networking Processors Interrupt Controller |
| @@ -1,20 +1,30 @@ | ||
| 1 | 1 | * ARC-HS Interrupt Distribution Unit |
| 2 | 2 | |
| 3 | − This optional 2nd level interrupt controller can be used in SMP configurations for | |
| 4 | − dynamic IRQ routing, load balancing of common/external IRQs towards core intc. | |
| 3 | + This optional 2nd level interrupt controller can be used in SMP configurations | |
| 4 | + for dynamic IRQ routing, load balancing of common/external IRQs towards core | |
| 5 | + intc. | |
| 5 | 6 | |
| 6 | 7 | Properties: |
| 7 | 8 | |
| 8 | 9 | - compatible: "snps,archs-idu-intc" |
| 9 | 10 | - interrupt-controller: This is an interrupt controller. |
| 10 | −- #interrupt-cells: Must be <1>. | |
| 11 | − | |
| 12 | − Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N | |
| 13 | − of the particular interrupt line of IDU corresponds to the line N+24 of the | |
| 14 | − core interrupt controller. | |
| 15 | − | |
| 16 | − intc accessed via the special ARC AUX register interface, hence "reg" property | |
| 17 | − is not specified. | |
| 11 | +- #interrupt-cells: Must be <1> or <2>. | |
| 12 | + | |
| 13 | + Value of the first cell specifies the "common" IRQ from peripheral to IDU. | |
| 14 | + Number N of the particular interrupt line of IDU corresponds to the line N+24 | |
| 15 | + of the core interrupt controller. | |
| 16 | + | |
| 17 | + The (optional) second cell specifies any of the following flags: | |
| 18 | + - bits[3:0] trigger type and level flags | |
| 19 | + 1 = low-to-high edge triggered | |
| 20 | + 2 = NOT SUPPORTED (high-to-low edge triggered) | |
| 21 | + 4 = active high level-sensitive <<< DEFAULT | |
| 22 | + 8 = NOT SUPPORTED (active low level-sensitive) | |
| 23 | + When no second cell is specified, the interrupt is assumed to be level | |
| 24 | + sensitive. | |
| 25 | + | |
| 26 | + The interrupt controller is accessed via the special ARC AUX register | |
| 27 | + interface, hence "reg" property is not specified. | |
| 18 | 28 | |
| 19 | 29 | Example: |
| 20 | 30 | core_intc: core-interrupt-controller { |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | # Copyright 2019 Linaro Ltd. |
| 3 | 3 | %YAML 1.2 |
| 4 | 4 | --- |
| 5 | −$id: "http://devicetree.org/schemas/misc/intel-ixp4xx-ahb-queue-manager.yaml#" | |
| 5 | +$id: "http://devicetree.org/schemas/misc/intel,ixp4xx-ahb-queue-manager.yaml#" | |
| 6 | 6 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 7 | 7 | |
| 8 | 8 | title: Intel IXP4xx AHB Queue Manager |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-gmac.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Allwinner A83t EMAC Device Tree Bindings |
| @@ -12,6 +12,7 @@ Required properties: · 11 unmodified lines | ||
| 12 | 12 | - "microchip,ksz8565" |
| 13 | 13 | - "microchip,ksz9893" |
| 14 | 14 | - "microchip,ksz9563" |
| 15 | + - "microchip,ksz8563" | |
| 15 | 16 | |
| 16 | 17 | Optional properties: |
| 17 | 18 | |
| @@ -7,18 +7,6 @@ Required properties: · 6 unmodified lines | ||
| 7 | 7 | - phy-mode : See ethernet.txt file in the same directory |
| 8 | 8 | |
| 9 | 9 | Optional properties: |
| 10 | −- phy-reset-gpios : Should specify the gpio for phy reset | |
| 11 | −- phy-reset-duration : Reset duration in milliseconds. Should present | |
| 12 | − only if property "phy-reset-gpios" is available. Missing the property | |
| 13 | − will have the duration be 1 millisecond. Numbers greater than 1000 are | |
| 14 | − invalid and 1 millisecond will be used instead. | |
| 15 | −- phy-reset-active-high : If present then the reset sequence using the GPIO | |
| 16 | − specified in the "phy-reset-gpios" property is reversed (H=reset state, | |
| 17 | − L=operation state). | |
| 18 | −- phy-reset-post-delay : Post reset delay in milliseconds. If present then | |
| 19 | − a delay of phy-reset-post-delay milliseconds will be observed after the | |
| 20 | − phy-reset-gpios has been toggled. Can be omitted thus no delay is | |
| 21 | − observed. Delay is in range of 1ms to 1000ms. Other delays are invalid. | |
| 22 | 10 | - phy-supply : regulator that powers the Ethernet PHY. |
| 23 | 11 | - phy-handle : phandle to the PHY device connected to this device. |
| 24 | 12 | - fixed-link : Assume a fixed link. See fixed-link.txt in the same directory. |
| @@ -47,11 +35,27 @@ Optional properties: · 22 unmodified lines | ||
| 47 | 35 | For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse |
| 48 | 36 | per second interrupt associated with 1588 precision time protocol(PTP). |
| 49 | 37 | |
| 50 | − | |
| 51 | 38 | Optional subnodes: |
| 52 | 39 | - mdio : specifies the mdio bus in the FEC, used as a container for phy nodes |
| 53 | 40 | according to phy.txt in the same directory |
| 54 | 41 | |
| 42 | +Deprecated optional properties: | |
| 43 | + To avoid these, create a phy node according to phy.txt in the same | |
| 44 | + directory, and point the fec's "phy-handle" property to it. Then use | |
| 45 | + the phy's reset binding, again described by phy.txt. | |
| 46 | +- phy-reset-gpios : Should specify the gpio for phy reset | |
| 47 | +- phy-reset-duration : Reset duration in milliseconds. Should present | |
| 48 | + only if property "phy-reset-gpios" is available. Missing the property | |
| 49 | + will have the duration be 1 millisecond. Numbers greater than 1000 are | |
| 50 | + invalid and 1 millisecond will be used instead. | |
| 51 | +- phy-reset-active-high : If present then the reset sequence using the GPIO | |
| 52 | + specified in the "phy-reset-gpios" property is reversed (H=reset state, | |
| 53 | + L=operation state). | |
| 54 | +- phy-reset-post-delay : Post reset delay in milliseconds. If present then | |
| 55 | + a delay of phy-reset-post-delay milliseconds will be observed after the | |
| 56 | + phy-reset-gpios has been toggled. Can be omitted thus no delay is | |
| 57 | + observed. Delay is in range of 1ms to 1000ms. Other delays are invalid. | |
| 58 | + | |
| 55 | 59 | Example: |
| 56 | 60 | |
| 57 | 61 | ethernet@83fec000 { |
| @@ -15,10 +15,10 @@ Required properties: · 14 unmodified lines | ||
| 15 | 15 | Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs. |
| 16 | 16 | Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC. |
| 17 | 17 | Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. |
| 18 | − Use "sifive,fu540-macb" for SiFive FU540-C000 SoC. | |
| 18 | + Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. | |
| 19 | 19 | Or the generic form: "cdns,emac". |
| 20 | 20 | - reg: Address and length of the register set for the device |
| 21 | − For "sifive,fu540-macb", second range is required to specify the | |
| 21 | + For "sifive,fu540-c000-gem", second range is required to specify the | |
| 22 | 22 | address and length of the registers for GEMGXL Management block. |
| 23 | 23 | - interrupts: Should contain macb interrupt |
| 24 | 24 | - phy-mode: See ethernet.txt file in the same directory. |
| @@ -37,13 +37,13 @@ required: · 36 unmodified lines | ||
| 37 | 37 | |
| 38 | 38 | examples: |
| 39 | 39 | - | |
| 40 | − sid@1c23800 { | |
| 40 | + efuse@1c23800 { | |
| 41 | 41 | compatible = "allwinner,sun4i-a10-sid"; |
| 42 | 42 | reg = <0x01c23800 0x10>; |
| 43 | 43 | }; |
| 44 | 44 | |
| 45 | 45 | - | |
| 46 | − sid@1c23800 { | |
| 46 | + efuse@1c23800 { | |
| 47 | 47 | compatible = "allwinner,sun7i-a20-sid"; |
| 48 | 48 | reg = <0x01c23800 0x200>; |
| 49 | 49 | }; |
| @@ -2,7 +2,7 @@ Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings · 1 unmodified line | ||
| 2 | 2 | |
| 3 | 3 | This binding represents the on-chip eFuse OTP controller found on |
| 4 | 4 | i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL, i.MX6ULL/ULZ, i.MX6SLL, |
| 5 | −i.MX7D/S, i.MX7ULP and i.MX8MQ SoCs. | |
| 5 | +i.MX7D/S, i.MX7ULP, i.MX8MQ, i.MX8MM and i.MX8MN SoCs. | |
| 6 | 6 | |
| 7 | 7 | Required properties: |
| 8 | 8 | - compatible: should be one of |
| @@ -16,6 +16,7 @@ Required properties: · 7 unmodified lines | ||
| 16 | 16 | "fsl,imx7ulp-ocotp" (i.MX7ULP), |
| 17 | 17 | "fsl,imx8mq-ocotp" (i.MX8MQ), |
| 18 | 18 | "fsl,imx8mm-ocotp" (i.MX8MM), |
| 19 | + "fsl,imx8mn-ocotp" (i.MX8MN), | |
| 19 | 20 | followed by "syscon". |
| 20 | 21 | - #address-cells : Should be 1 |
| 21 | 22 | - #size-cells : Should be 1 |
| @@ -0,0 +1,45 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/nvmem-consumer.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NVMEM (Non Volatile Memory) Consumer Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | |
| 11 | + | |
| 12 | +select: true | |
| 13 | + | |
| 14 | +properties: | |
| 15 | + nvmem: | |
| 16 | + $ref: /schemas/types.yaml#/definitions/phandle-array | |
| 17 | + description: | |
| 18 | + List of phandle to the nvmem providers. | |
| 19 | + | |
| 20 | + nvmem-cells: | |
| 21 | + $ref: /schemas/types.yaml#/definitions/phandle-array | |
| 22 | + description: | |
| 23 | + List of phandle to the nvmem data cells. | |
| 24 | + | |
| 25 | + nvmem-names: | |
| 26 | + $ref: /schemas/types.yaml#/definitions/string-array | |
| 27 | + description: | |
| 28 | + Names for the each nvmem provider. | |
| 29 | + | |
| 30 | + nvmem-cell-names: | |
| 31 | + $ref: /schemas/types.yaml#/definitions/string-array | |
| 32 | + description: | |
| 33 | + Names for each nvmem-cells specified. | |
| 34 | + | |
| 35 | +dependencies: | |
| 36 | + nvmem-names: [ nvmem ] | |
| 37 | + nvmem-cell-names: [ nvmem-cells ] | |
| 38 | + | |
| 39 | +examples: | |
| 40 | + - | | |
| 41 | + tsens { | |
| 42 | + /* ... */ | |
| 43 | + nvmem-cells = <&tsens_calibration>; | |
| 44 | + nvmem-cell-names = "calibration"; | |
| 45 | + }; | |
| @@ -1,80 +1 @@ | ||
| 1 | −= NVMEM(Non Volatile Memory) Data Device Tree Bindings = | |
| 2 | − | |
| 3 | −This binding is intended to represent the location of hardware | |
| 4 | −configuration data stored in NVMEMs like eeprom, efuses and so on. | |
| 5 | − | |
| 6 | −On a significant proportion of boards, the manufacturer has stored | |
| 7 | −some data on NVMEM, for the OS to be able to retrieve these information | |
| 8 | −and act upon it. Obviously, the OS has to know about where to retrieve | |
| 9 | −these data from, and where they are stored on the storage device. | |
| 10 | − | |
| 11 | −This document is here to document this. | |
| 12 | − | |
| 13 | −= Data providers = | |
| 14 | −Contains bindings specific to provider drivers and data cells as children | |
| 15 | −of this node. | |
| 16 | − | |
| 17 | −Optional properties: | |
| 18 | − read-only: Mark the provider as read only. | |
| 19 | − | |
| 20 | −= Data cells = | |
| 21 | −These are the child nodes of the provider which contain data cell | |
| 22 | −information like offset and size in nvmem provider. | |
| 23 | − | |
| 24 | −Required properties: | |
| 25 | −reg: specifies the offset in byte within the storage device. | |
| 26 | − | |
| 27 | −Optional properties: | |
| 28 | − | |
| 29 | −bits: Is pair of bit location and number of bits, which specifies offset | |
| 30 | − in bit and number of bits within the address range specified by reg property. | |
| 31 | − Offset takes values from 0-7. | |
| 32 | − | |
| 33 | −For example: | |
| 34 | − | |
| 35 | − /* Provider */ | |
| 36 | − qfprom: qfprom@700000 { | |
| 37 | − ... | |
| 38 | − | |
| 39 | − /* Data cells */ | |
| 40 | − tsens_calibration: calib@404 { | |
| 41 | − reg = <0x404 0x10>; | |
| 42 | − }; | |
| 43 | − | |
| 44 | − tsens_calibration_bckp: calib_bckp@504 { | |
| 45 | − reg = <0x504 0x11>; | |
| 46 | − bits = <6 128> | |
| 47 | − }; | |
| 48 | − | |
| 49 | − pvs_version: pvs-version@6 { | |
| 50 | − reg = <0x6 0x2> | |
| 51 | − bits = <7 2> | |
| 52 | − }; | |
| 53 | − | |
| 54 | − speed_bin: speed-bin@c{ | |
| 55 | − reg = <0xc 0x1>; | |
| 56 | − bits = <2 3>; | |
| 57 | − | |
| 58 | − }; | |
| 59 | − ... | |
| 60 | − }; | |
| 61 | − | |
| 62 | −= Data consumers = | |
| 63 | −Are device nodes which consume nvmem data cells/providers. | |
| 64 | − | |
| 65 | −Required-properties: | |
| 66 | −nvmem-cells: list of phandle to the nvmem data cells. | |
| 67 | −nvmem-cell-names: names for the each nvmem-cells specified. Required if | |
| 68 | − nvmem-cells is used. | |
| 69 | − | |
| 70 | −Optional-properties: | |
| 71 | −nvmem : list of phandles to nvmem providers. | |
| 72 | −nvmem-names: names for the each nvmem provider. required if nvmem is used. | |
| 73 | − | |
| 74 | −For example: | |
| 75 | − | |
| 76 | − tsens { | |
| 77 | − ... | |
| 78 | − nvmem-cells = <&tsens_calibration>; | |
| 79 | − nvmem-cell-names = "calibration"; | |
| 80 | − }; | |
| 1 | +This file has been moved to nvmem.yaml and nvmem-consumer.yaml. | |
| @@ -0,0 +1,93 @@ | ||
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) | |
| 2 | +%YAML 1.2 | |
| 3 | +--- | |
| 4 | +$id: http://devicetree.org/schemas/nvmem/nvmem.yaml# | |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | + | |
| 7 | +title: NVMEM (Non Volatile Memory) Device Tree Bindings | |
| 8 | + | |
| 9 | +maintainers: | |
| 10 | + - Srinivas Kandagatla <srinivas.kandagatla@linaro.org> | |
| 11 | + | |
| 12 | +description: | | |
| 13 | + This binding is intended to represent the location of hardware | |
| 14 | + configuration data stored in NVMEMs like eeprom, efuses and so on. | |
| 15 | + | |
| 16 | + On a significant proportion of boards, the manufacturer has stored | |
| 17 | + some data on NVMEM, for the OS to be able to retrieve these | |
| 18 | + information and act upon it. Obviously, the OS has to know about | |
| 19 | + where to retrieve these data from, and where they are stored on the | |
| 20 | + storage device. | |
| 21 | + | |
| 22 | +properties: | |
| 23 | + $nodename: | |
| 24 | + pattern: "^(eeprom|efuse|nvram)(@.*|-[0-9a-f])*$" | |
| 25 | + | |
| 26 | + "#address-cells": | |
| 27 | + const: 1 | |
| 28 | + | |
| 29 | + "#size-cells": | |
| 30 | + const: 1 | |
| 31 | + | |
| 32 | + read-only: | |
| 33 | + $ref: /schemas/types.yaml#/definitions/flag | |
| 34 | + description: | |
| 35 | + Mark the provider as read only. | |
| 36 | + | |
| 37 | +patternProperties: | |
| 38 | + "^.*@[0-9a-f]+$": | |
| 39 | + type: object | |
| 40 | + | |
| 41 | + properties: | |
| 42 | + reg: | |
| 43 | + maxItems: 1 | |
| 44 | + description: | |
| 45 | + Offset and size in bytes within the storage device. | |
| 46 | + | |
| 47 | + bits: | |
| 48 | + maxItems: 1 | |
| 49 | + items: | |
| 50 | + items: | |
| 51 | + - minimum: 0 | |
| 52 | + maximum: 7 | |
| 53 | + description: | |
| 54 | + Offset in bit within the address range specified by reg. | |
| 55 | + - minimum: 1 | |
| 56 | + description: | |
| 57 | + Size in bit within the address range specified by reg. | |
| 58 | + | |
| 59 | + required: | |
| 60 | + - reg | |
| 61 | + | |
| 62 | + additionalProperties: false | |
| 63 | + | |
| 64 | +examples: | |
| 65 | + - | | |
| 66 | + qfprom: eeprom@700000 { | |
| 67 | + #address-cells = <1>; | |
| 68 | + #size-cells = <1>; | |
| 69 | + | |
| 70 | + /* ... */ | |
| 71 | + | |
| 72 | + /* Data cells */ | |
| 73 | + tsens_calibration: calib@404 { | |
| 74 | + reg = <0x404 0x10>; | |
| 75 | + }; | |
| 76 | + | |
| 77 | + tsens_calibration_bckp: calib_bckp@504 { | |
| 78 | + reg = <0x504 0x11>; | |
| 79 | + bits = <6 128>; | |
| 80 | + }; | |
| 81 | + | |
| 82 | + pvs_version: pvs-version@6 { | |
| 83 | + reg = <0x6 0x2>; | |
| 84 | + bits = <7 2>; | |
| 85 | + }; | |
| 86 | + | |
| 87 | + speed_bin: speed-bin@c{ | |
| 88 | + reg = <0xc 0x1>; | |
| 89 | + bits = <2 3>; | |
| 90 | + }; | |
| 91 | + }; | |
| 92 | + | |
| 93 | +... | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | −$id: http://devicetree.org/schemas/display/allwinner,sun6i-a31-mipi-dphy.yaml# | |
| 4 | +$id: http://devicetree.org/schemas/phy/allwinner,sun6i-a31-mipi-dphy.yaml# | |
| 5 | 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | 6 | |
| 7 | 7 | title: Allwinner A31 MIPI D-PHY Controller Device Tree Bindings |
| @@ -37,7 +37,8 @@ properties: · 36 unmodified lines | ||
| 37 | 37 | hwlocks: true |
| 38 | 38 | |
| 39 | 39 | st,syscfg: |
| 40 | − $ref: "/schemas/types.yaml#/definitions/phandle-array" | |
| 40 | + allOf: | |
| 41 | + - $ref: "/schemas/types.yaml#/definitions/phandle-array" | |
| 41 | 42 | description: Should be phandle/offset/mask |
| 42 | 43 | items: |
| 43 | 44 | - description: Phandle to the syscon node which includes IRQ mux selection. |
| @@ -1,162 +0,0 @@ | ||
| 1 | −=================== | |
| 2 | −RISC-V CPU Bindings | |
| 3 | −=================== | |
| 4 | − | |
| 5 | −The device tree allows to describe the layout of CPUs in a system through | |
| 6 | −the "cpus" node, which in turn contains a number of subnodes (ie "cpu") | |
| 7 | −defining properties for every cpu. | |
| 8 | − | |
| 9 | −Bindings for CPU nodes follow the Devicetree Specification, available from: | |
| 10 | − | |
| 11 | −https://www.devicetree.org/specifications/ | |
| 12 | − | |
| 13 | −with updates for 32-bit and 64-bit RISC-V systems provided in this document. | |
| 14 | − | |
| 15 | −=========== | |
| 16 | −Terminology | |
| 17 | −=========== | |
| 18 | − | |
| 19 | −This document uses some terminology common to the RISC-V community that is not | |
| 20 | −widely used, the definitions of which are listed here: | |
| 21 | − | |
| 22 | −* hart: A hardware execution context, which contains all the state mandated by | |
| 23 | − the RISC-V ISA: a PC and some registers. This terminology is designed to | |
| 24 | − disambiguate software's view of execution contexts from any particular | |
| 25 | − microarchitectural implementation strategy. For example, my Intel laptop is | |
| 26 | − described as having one socket with two cores, each of which has two hyper | |
| 27 | − threads. Therefore this system has four harts. | |
| 28 | − | |
| 29 | −===================================== | |
| 30 | −cpus and cpu node bindings definition | |
| 31 | −===================================== | |
| 32 | − | |
| 33 | −The RISC-V architecture, in accordance with the Devicetree Specification, | |
| 34 | −requires the cpus and cpu nodes to be present and contain the properties | |
| 35 | −described below. | |
| 36 | − | |
| 37 | −- cpus node | |
| 38 | − | |
| 39 | − Description: Container of cpu nodes | |
| 40 | − | |
| 41 | − The node name must be "cpus". | |
| 42 | − | |
| 43 | − A cpus node must define the following properties: | |
| 44 | − | |
| 45 | − - #address-cells | |
| 46 | − Usage: required | |
| 47 | − Value type: <u32> | |
| 48 | − Definition: must be set to 1 | |
| 49 | − - #size-cells | |
| 50 | − Usage: required | |
| 51 | − Value type: <u32> | |
| 52 | − Definition: must be set to 0 | |
| 53 | − | |
| 54 | −- cpu node | |
| 55 | − | |
| 56 | − Description: Describes a hart context | |
| 57 | − | |
| 58 | − PROPERTIES | |
| 59 | − | |
| 60 | − - device_type | |
| 61 | − Usage: required | |
| 62 | − Value type: <string> | |
| 63 | − Definition: must be "cpu" | |
| 64 | − - reg | |
| 65 | − Usage: required | |
| 66 | − Value type: <u32> | |
| 67 | − Definition: The hart ID of this CPU node | |
| 68 | − - compatible: | |
| 69 | − Usage: required | |
| 70 | − Value type: <stringlist> | |
| 71 | − Definition: must contain "riscv", may contain one of | |
| 72 | − "sifive,rocket0" | |
| 73 | − - mmu-type: | |
| 74 | − Usage: optional | |
| 75 | − Value type: <string> | |
| 76 | − Definition: Specifies the CPU's MMU type. Possible values are | |
| 77 | − "riscv,sv32" | |
| 78 | − "riscv,sv39" | |
| 79 | − "riscv,sv48" | |
| 80 | − - riscv,isa: | |
| 81 | − Usage: required | |
| 82 | − Value type: <string> | |
| 83 | − Definition: Contains the RISC-V ISA string of this hart. These | |
| 84 | − ISA strings are defined by the RISC-V ISA manual. | |
| 85 | − | |
| 86 | −Example: SiFive Freedom U540G Development Kit | |
| 87 | −--------------------------------------------- | |
| 88 | − | |
| 89 | −This system contains two harts: a hart marked as disabled that's used for | |
| 90 | −low-level system tasks and should be ignored by Linux, and a second hart that | |
| 91 | −Linux is allowed to run on. | |
| 92 | − | |
| 93 | − cpus { | |
| 94 | − #address-cells = <1>; | |
| 95 | − #size-cells = <0>; | |
| 96 | − timebase-frequency = <1000000>; | |
| 97 | − cpu@0 { | |
| 98 | − clock-frequency = <1600000000>; | |
| 99 | − compatible = "sifive,rocket0", "riscv"; | |
| 100 | − device_type = "cpu"; | |
| 101 | − i-cache-block-size = <64>; | |
| 102 | − i-cache-sets = <128>; | |
| 103 | − i-cache-size = <16384>; | |
| 104 | − next-level-cache = <&L15 &L0>; | |
| 105 | − reg = <0>; | |
| 106 | − riscv,isa = "rv64imac"; | |
| 107 | − status = "disabled"; | |
| 108 | − L10: interrupt-controller { | |
| 109 | − #interrupt-cells = <1>; | |
| 110 | − compatible = "riscv,cpu-intc"; | |
| 111 | − interrupt-controller; | |
| 112 | − }; | |
| 113 | − }; | |
| 114 | − cpu@1 { | |
| 115 | − clock-frequency = <1600000000>; | |
| 116 | − compatible = "sifive,rocket0", "riscv"; | |
| 117 | − d-cache-block-size = <64>; | |
| 118 | − d-cache-sets = <64>; | |
| 119 | − d-cache-size = <32768>; | |
| 120 | − d-tlb-sets = <1>; | |
| 121 | − d-tlb-size = <32>; | |
| 122 | − device_type = "cpu"; | |
| 123 | − i-cache-block-size = <64>; | |
| 124 | − i-cache-sets = <64>; | |
| 125 | − i-cache-size = <32768>; | |
| 126 | − i-tlb-sets = <1>; | |
| 127 | − i-tlb-size = <32>; | |
| 128 | − mmu-type = "riscv,sv39"; | |
| 129 | − next-level-cache = <&L15 &L0>; | |
| 130 | − reg = <1>; | |
| 131 | − riscv,isa = "rv64imafdc"; | |
| 132 | − status = "okay"; | |
| 133 | − tlb-split; | |
| 134 | − L13: interrupt-controller { | |
| 135 | − #interrupt-cells = <1>; | |
| 136 | − compatible = "riscv,cpu-intc"; | |
| 137 | − interrupt-controller; | |
| 138 | − }; | |
| 139 | − }; | |
| 140 | − }; | |
| 141 | − | |
| 142 | −Example: Spike ISA Simulator with 1 Hart | |
| 143 | −---------------------------------------- | |
| 144 | − | |
| 145 | −This device tree matches the Spike ISA golden model as run with `spike -p1`. | |
| 146 | − | |
| 147 | − cpus { | |
| 148 | − cpu@0 { | |
| 149 | − device_type = "cpu"; | |
| 150 | − reg = <0x00000000>; | |
| 151 | − status = "okay"; | |
| 152 | − compatible = "riscv"; | |
| 153 | − riscv,isa = "rv64imafdc"; | |
| 154 | − mmu-type = "riscv,sv48"; | |
| 155 | − clock-frequency = <0x3b9aca00>; | |
| 156 | − interrupt-controller { | |
| 157 | − #interrupt-cells = <0x00000001>; | |
| 158 | − interrupt-controller; | |
| 159 | − compatible = "riscv,cpu-intc"; | |
| 160 | − } | |
| 161 | − } | |
| 162 | − } | |
| @@ -10,6 +10,18 @@ maintainers: · 9 unmodified lines | ||
| 10 | 10 | - Paul Walmsley <paul.walmsley@sifive.com> |
| 11 | 11 | - Palmer Dabbelt <palmer@sifive.com> |
| 12 | 12 | |
| 13 | +description: | | |
| 14 | + This document uses some terminology common to the RISC-V community | |
| 15 | + that is not widely used, the definitions of which are listed here: | |
| 16 | + | |
| 17 | + hart: A hardware execution context, which contains all the state | |
| 18 | + mandated by the RISC-V ISA: a PC and some registers. This | |
| 19 | + terminology is designed to disambiguate software's view of execution | |
| 20 | + contexts from any particular microarchitectural implementation | |
| 21 | + strategy. For example, an Intel laptop containing one socket with | |
| 22 | + two cores, each of which has two hyperthreads, could be described as | |
| 23 | + having four harts. | |
| 24 | + | |
| 13 | 25 | properties: |
| 14 | 26 | compatible: |
| 15 | 27 | items: |
| @@ -50,6 +62,10 @@ properties: · 34 unmodified lines | ||
| 50 | 62 | User-Level ISA document, available from |
| 51 | 63 | https://riscv.org/specifications/ |
| 52 | 64 | |
| 65 | + While the isa strings in ISA specification are case | |
| 66 | + insensitive, letters in the riscv,isa string must be all | |
| 67 | + lowercase to simplify parsing. | |
| 68 | + | |
| 53 | 69 | timebase-frequency: |
| 54 | 70 | type: integer |
| 55 | 71 | minimum: 1 |
| @@ -19,7 +19,7 @@ properties: · 18 unmodified lines | ||
| 19 | 19 | compatible: |
| 20 | 20 | items: |
| 21 | 21 | - enum: |
| 22 | − - sifive,freedom-unleashed-a00 | |
| 22 | + - sifive,hifive-unleashed-a00 | |
| 23 | 23 | - const: sifive,fu540-c000 |
| 24 | 24 | - const: sifive,fu540 |
| 25 | 25 | ... |
| @@ -73,7 +73,6 @@ patternProperties: · 72 unmodified lines | ||
| 73 | 73 | Compatible of the SPI device. |
| 74 | 74 | |
| 75 | 75 | reg: |
| 76 | − maxItems: 1 | |
| 77 | 76 | minimum: 0 |
| 78 | 77 | maximum: 256 |
| 79 | 78 | description: |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | # Copyright 2018 Linaro Ltd. |
| 3 | 3 | %YAML 1.2 |
| 4 | 4 | --- |
| 5 | −$id: "http://devicetree.org/schemas/timer/intel-ixp4xx-timer.yaml#" | |
| 5 | +$id: "http://devicetree.org/schemas/timer/intel,ixp4xx-timer.yaml#" | |
| 6 | 6 | $schema: "http://devicetree.org/meta-schemas/core.yaml#" |
| 7 | 7 | |
| 8 | 8 | title: Intel IXP4xx XScale Networking Processors Timers |
| @@ -64,10 +64,8 @@ Optional properties : · 63 unmodified lines | ||
| 64 | 64 | - power-on-time-ms : Specifies the time it takes from the time the host |
| 65 | 65 | initiates the power-on sequence to a port until the port has adequate |
| 66 | 66 | power. The value is given in ms in a 0 - 510 range (default is 100ms). |
| 67 | − - swap-dx-lanes : Specifies the downstream ports which will swap the | |
| 68 | − differential-pair (D+/D-), default is not-swapped. | |
| 69 | − - swap-us-lanes : Selects the upstream port differential-pair (D+/D-) | |
| 70 | − swapping (boolean, default is not-swapped) | |
| 67 | + - swap-dx-lanes : Specifies the ports which will swap the differential-pair | |
| 68 | + (D+/D-), default is not-swapped. | |
| 71 | 69 | |
| 72 | 70 | Examples: |
| 73 | 71 | usb2512b@2c { |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = 'Linux Kernel Documentation Guide' | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'kernel-doc-guide.tex', 'Linux Kernel Documentation Guide', | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux 802.11 Driver Developer's Guide" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', '80211.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "The Linux driver implementer's API guide" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'driver-api.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -233,7 +233,7 @@ Userspace Interface · 232 unmodified lines | ||
| 233 | 233 | Several sysfs attributes are generated by the Generic Counter interface, |
| 234 | 234 | and reside under the /sys/bus/counter/devices/counterX directory, where |
| 235 | 235 | counterX refers to the respective counter device. Please see |
| 236 | −Documentation/ABI/testing/sys-bus-counter-generic-sysfs for detailed | |
| 236 | +Documentation/ABI/testing/sysfs-bus-counter for detailed | |
| 237 | 237 | information on each Generic Counter interface sysfs attribute. |
| 238 | 238 | |
| 239 | 239 | Through these sysfs attributes, programs and scripts may interact with |
| @@ -325,7 +325,7 @@ sysfs attributes, where Y is the unique ID of the respective Count: · 85 unmodified lines | ||
| 325 | 325 | |
| 326 | 326 | For a more detailed breakdown of the available Generic Counter interface |
| 327 | 327 | sysfs attributes, please refer to the |
| 328 | −Documentation/ABI/testing/sys-bus-counter file. | |
| 328 | +Documentation/ABI/testing/sysfs-bus-counter file. | |
| 329 | 329 | |
| 330 | 330 | The Signals and Counts associated with the Counter device are registered |
| 331 | 331 | to the system as well by the counter_register function. The |
| @@ -179,8 +179,8 @@ PHY Mappings · 178 unmodified lines | ||
| 179 | 179 | |
| 180 | 180 | In order to get reference to a PHY without help from DeviceTree, the framework |
| 181 | 181 | offers lookups which can be compared to clkdev that allow clk structures to be |
| 182 | −bound to devices. A lookup can be made be made during runtime when a handle to | |
| 183 | −the struct phy already exists. | |
| 182 | +bound to devices. A lookup can be made during runtime when a handle to the | |
| 183 | +struct phy already exists. | |
| 184 | 184 | |
| 185 | 185 | The framework offers the following API for registering and unregistering the |
| 186 | 186 | lookups:: |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Device Power Management" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'pm.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -13,7 +13,8 @@ a) SMB3 (and SMB3.1.1) missing optional features: · 12 unmodified lines | ||
| 13 | 13 | - T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl |
| 14 | 14 | currently the only two server side copy mechanisms supported) |
| 15 | 15 | |
| 16 | −b) improved sparse file support | |
| 16 | +b) improved sparse file support (fiemap and SEEK_HOLE are implemented | |
| 17 | +but additional features would be supportable by the protocol). | |
| 17 | 18 | |
| 18 | 19 | c) Directory entry caching relies on a 1 second timer, rather than |
| 19 | 20 | using Directory Leases, currently only the root file handle is cached longer |
| @@ -21,9 +22,13 @@ using Directory Leases, currently only the root file handle is cached longer · 1 unmodified line | ||
| 21 | 22 | d) quota support (needs minor kernel change since quota calls |
| 22 | 23 | to make it to network filesystems or deviceless filesystems) |
| 23 | 24 | |
| 24 | −e) Additional use cases where we use "compoounding" (e.g. open/query/close | |
| 25 | −and open/setinfo/close) to reduce the number of roundtrips, and also | |
| 26 | −open to reduce redundant opens (using deferred close and reference counts more). | |
| 25 | +e) Additional use cases can be optimized to use "compounding" | |
| 26 | +(e.g. open/query/close and open/setinfo/close) to reduce the number | |
| 27 | +of roundtrips to the server and improve performance. Various cases | |
| 28 | +(stat, statfs, create, unlink, mkdir) already have been improved by | |
| 29 | +using compounding but more can be done. In addition we could significantly | |
| 30 | +reduce redundant opens by using deferred close (with handle caching leases) | |
| 31 | +and better using reference counters on file handles. | |
| 27 | 32 | |
| 28 | 33 | f) Finish inotify support so kde and gnome file list windows |
| 29 | 34 | will autorefresh (partially complete by Asser). Needs minor kernel |
| @@ -43,18 +48,17 @@ mount or a per server basis to client UIDs or nobody if no mapping · 13 unmodified lines | ||
| 43 | 48 | exists. Also better integration with winbind for resolving SID owners |
| 44 | 49 | |
| 45 | 50 | k) Add tools to take advantage of more smb3 specific ioctls and features |
| 46 | −(passthrough ioctl/fsctl for sending various SMB3 fsctls to the server | |
| 47 | −is in progress, and a passthrough query_info call is already implemented | |
| 48 | −in cifs.ko to allow smb3 info levels queries to be sent from userspace) | |
| 51 | +(passthrough ioctl/fsctl is now implemented in cifs.ko to allow sending | |
| 52 | +various SMB3 fsctls and query info and set info calls directly from user space) | |
| 53 | +Add tools to make setting various non-POSIX metadata attributes easier | |
| 54 | +from tools (e.g. extending what was done in smb-info tool). | |
| 49 | 55 | |
| 50 | 56 | l) encrypted file support |
| 51 | 57 | |
| 52 | 58 | m) improved stats gathering tools (perhaps integration with nfsometer?) |
| 53 | 59 | to extend and make easier to use what is currently in /proc/fs/cifs/Stats |
| 54 | 60 | |
| 55 | −n) allow setting more NTFS/SMB3 file attributes remotely (currently limited to compressed | |
| 56 | −file attribute via chflags) and improve user space tools for managing and | |
| 57 | −viewing them. | |
| 61 | +n) Add support for claims based ACLs ("DAC") | |
| 58 | 62 | |
| 59 | 63 | o) mount helper GUI (to simplify the various configuration options on mount) |
| 60 | 64 | |
| @@ -82,6 +86,8 @@ so far). · 21 unmodified lines | ||
| 82 | 86 | w) Add support for additional strong encryption types, and additional spnego |
| 83 | 87 | authentication mechanisms (see MS-SMB2) |
| 84 | 88 | |
| 89 | +x) Finish support for SMB3.1.1 compression | |
| 90 | + | |
| 85 | 91 | KNOWN BUGS |
| 86 | 92 | ==================================== |
| 87 | 93 | See http://bugzilla.samba.org - search on product "CifsVFS" for |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux Filesystems API" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'filesystems.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux GPU Driver Developer's Guide" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'gpu.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -9,7 +9,7 @@ Supported chips: · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | Addresses scanned: PCI space |
| 11 | 11 | |
| 12 | − Datasheet: http://support.amd.com/us/Processor_TechDocs/32559.pdf | |
| 12 | + Datasheet: http://www.amd.com/system/files/TechDocs/32559.pdf | |
| 13 | 13 | |
| 14 | 14 | Author: Rudolf Marek |
| 15 | 15 | |
| @@ -111,9 +111,11 @@ needed). · 110 unmodified lines | ||
| 111 | 111 | netlabel/index |
| 112 | 112 | networking/index |
| 113 | 113 | pcmcia/index |
| 114 | + power/index | |
| 114 | 115 | target/index |
| 115 | 116 | timers/index |
| 116 | 117 | watchdog/index |
| 118 | + virtual/index | |
| 117 | 119 | input/index |
| 118 | 120 | hwmon/index |
| 119 | 121 | gpu/index |
| @@ -143,6 +145,7 @@ implementation. · 23 unmodified lines | ||
| 143 | 145 | arm64/index |
| 144 | 146 | ia64/index |
| 145 | 147 | m68k/index |
| 148 | + powerpc/index | |
| 146 | 149 | riscv/index |
| 147 | 150 | s390/index |
| 148 | 151 | sh/index |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "The Linux input driver subsystem" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'linux-input.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Kernel Hacking Guides" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'kernel-hacking.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -82,7 +82,7 @@ itself. The read lock allows many concurrent readers. Anything that · 81 unmodified lines | ||
| 82 | 82 | **changes** the list will have to get the write lock. |
| 83 | 83 | |
| 84 | 84 | NOTE! RCU is better for list traversal, but requires careful |
| 85 | − attention to design detail (see Documentation/RCU/listRCU.txt). | |
| 85 | + attention to design detail (see Documentation/RCU/listRCU.rst). | |
| 86 | 86 | |
| 87 | 87 | Also, you cannot "upgrade" a read-lock to a write-lock, so if you at _any_ |
| 88 | 88 | time need to do any changes (even if you don't do it every time), you have |
| @@ -90,7 +90,7 @@ to get the write-lock at the very beginning. · 1 unmodified line | ||
| 90 | 90 | |
| 91 | 91 | NOTE! We are working hard to remove reader-writer spinlocks in most |
| 92 | 92 | cases, so please don't add a new one without consensus. (Instead, see |
| 93 | − Documentation/RCU/rcu.txt for complete information.) | |
| 93 | + Documentation/RCU/rcu.rst for complete information.) | |
| 94 | 94 | |
| 95 | 95 | ---- |
| 96 | 96 | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = 'Linux Kernel Development Documentation' | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'maintainer.tex', 'Linux Kernel Development Documentation', | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,12 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −# SPDX-License-Identifier: GPL-2.0 | |
| 4 | − | |
| 5 | −project = 'Linux Media Subsystem Documentation' | |
| 6 | − | |
| 7 | −tags.add("subproject") | |
| 8 | − | |
| 9 | −latex_documents = [ | |
| 10 | − ('index', 'media.tex', 'Linux Media Subsystem Documentation', | |
| 11 | − 'The kernel development community', 'manual'), | |
| 12 | −] | |
| @@ -548,7 +548,7 @@ There are certain things that the Linux kernel memory barriers do not guarantee: · 547 unmodified lines | ||
| 548 | 548 | |
| 549 | 549 | [*] For information on bus mastering DMA and coherency please read: |
| 550 | 550 | |
| 551 | − Documentation/PCI/pci.rst | |
| 551 | + Documentation/driver-api/pci/pci.rst | |
| 552 | 552 | Documentation/DMA-API-HOWTO.txt |
| 553 | 553 | Documentation/DMA-API.txt |
| 554 | 554 | |
| @@ -20,3 +20,4 @@ fit into other categories. · 19 unmodified lines | ||
| 20 | 20 | isl29003 |
| 21 | 21 | lis3lv02d |
| 22 | 22 | max6875 |
| 23 | + xilinx_sdfec | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux Networking Documentation" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'networking.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -424,13 +424,24 @@ Statistics · 423 unmodified lines | ||
| 424 | 424 | Following minimum set of TLS-related statistics should be reported |
| 425 | 425 | by the driver: |
| 426 | 426 | |
| 427 | − * ``rx_tls_decrypted`` - number of successfully decrypted TLS segments | |
| 428 | − * ``tx_tls_encrypted`` - number of in-order TLS segments passed to device | |
| 429 | − for encryption | |
| 427 | + * ``rx_tls_decrypted_packets`` - number of successfully decrypted RX packets | |
| 428 | + which were part of a TLS stream. | |
| 429 | + * ``rx_tls_decrypted_bytes`` - number of TLS payload bytes in RX packets | |
| 430 | + which were successfully decrypted. | |
| 431 | + * ``tx_tls_encrypted_packets`` - number of TX packets passed to the device | |
| 432 | + for encryption of their TLS payload. | |
| 433 | + * ``tx_tls_encrypted_bytes`` - number of TLS payload bytes in TX packets | |
| 434 | + passed to the device for encryption. | |
| 435 | + * ``tx_tls_ctx`` - number of TLS TX HW offload contexts added to device for | |
| 436 | + encryption. | |
| 430 | 437 | * ``tx_tls_ooo`` - number of TX packets which were part of a TLS stream |
| 431 | − but did not arrive in the expected order | |
| 432 | − * ``tx_tls_drop_no_sync_data`` - number of TX packets dropped because | |
| 433 | − they arrived out of order and associated record could not be found | |
| 438 | + but did not arrive in the expected order. | |
| 439 | + * ``tx_tls_drop_no_sync_data`` - number of TX packets which were part of | |
| 440 | + a TLS stream dropped, because they arrived out of order and associated | |
| 441 | + record could not be found. | |
| 442 | + * ``tx_tls_drop_bypass_req`` - number of TX packets which were part of a TLS | |
| 443 | + stream dropped, because they contain both data that has been encrypted by | |
| 444 | + software and data that expects hardware crypto offload. | |
| 434 | 445 | |
| 435 | 446 | Notable corner cases, exceptions and additional requirements |
| 436 | 447 | ============================================================ |
| @@ -495,21 +506,3 @@ Drivers should ignore the changes to TLS the device feature flags. · 58 unmodified lines | ||
| 495 | 506 | These flags will be acted upon accordingly by the core ``ktls`` code. |
| 496 | 507 | TLS device feature flags only control adding of new TLS connection |
| 497 | 508 | offloads, old connections will remain active after flags are cleared. |
| 498 | − | |
| 499 | −Known bugs | |
| 500 | −========== | |
| 501 | − | |
| 502 | −skb_orphan() leaks clear text | |
| 503 | −----------------------------- | |
| 504 | − | |
| 505 | −Currently drivers depend on the :c:member:`sk` member of | |
| 506 | −:c:type:`struct sk_buff <sk_buff>` to identify segments requiring | |
| 507 | −encryption. Any operation which removes or does not preserve the socket | |
| 508 | −association such as :c:func:`skb_orphan` or :c:func:`skb_clone` | |
| 509 | −will cause the driver to miss the packets and lead to clear text leaks. | |
| 510 | − | |
| 511 | −Redirects leak clear text | |
| 512 | −------------------------- | |
| 513 | − | |
| 514 | −In the RX direction, if segment has already been decrypted by the device | |
| 515 | −and it gets redirected or mirrored - clear text will be transmitted out. | |
| @@ -204,8 +204,8 @@ Ethernet device, which instead of receiving packets from a physical · 203 unmodified lines | ||
| 204 | 204 | media, receives them from user space program and instead of sending |
| 205 | 205 | packets via physical media sends them to the user space program. |
| 206 | 206 | |
| 207 | −Let's say that you configured IPX on the tap0, then whenever | |
| 208 | −the kernel sends an IPX packet to tap0, it is passed to the application | |
| 207 | +Let's say that you configured IPv6 on the tap0, then whenever | |
| 208 | +the kernel sends an IPv6 packet to tap0, it is passed to the application | |
| 209 | 209 | (VTun for example). The application encrypts, compresses and sends it to |
| 210 | 210 | the other side over TCP or UDP. The application on the other side decompresses |
| 211 | 211 | and decrypts the data received and writes the packet to the TAP device, |
| @@ -1,4 +1,4 @@ | ||
| 1 | −:orphan: | |
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | 2 | |
| 3 | 3 | ================ |
| 4 | 4 | Power Management |
| @@ -1,5 +1,7 @@ | ||
| 1 | +======================== | |
| 1 | 2 | The PowerPC boot wrapper |
| 2 | −------------------------ | |
| 3 | +======================== | |
| 4 | + | |
| 3 | 5 | Copyright (C) Secret Lab Technologies Ltd. |
| 4 | 6 | |
| 5 | 7 | PowerPC image targets compresses and wraps the kernel image (vmlinux) with |
| @@ -21,6 +23,7 @@ it uses the wrapper script (arch/powerpc/boot/wrapper) to generate target · 15 unmodified lines | ||
| 21 | 23 | image. The details of the build system is discussed in the next section. |
| 22 | 24 | Currently, the following image format targets exist: |
| 23 | 25 | |
| 26 | + ==================== ======================================================== | |
| 24 | 27 | cuImage.%: Backwards compatible uImage for older version of |
| 25 | 28 | U-Boot (for versions that don't understand the device |
| 26 | 29 | tree). This image embeds a device tree blob inside |
| @@ -29,31 +32,36 @@ Currently, the following image format targets exist: · 2 unmodified lines | ||
| 29 | 32 | with boot wrapper code that extracts data from the old |
| 30 | 33 | bd_info structure and loads the data into the device |
| 31 | 34 | tree before jumping into the kernel. |
| 32 | − Because of the series of #ifdefs found in the | |
| 35 | + | |
| 36 | + Because of the series of #ifdefs found in the | |
| 33 | 37 | bd_info structure used in the old U-Boot interfaces, |
| 34 | 38 | cuImages are platform specific. Each specific |
| 35 | 39 | U-Boot platform has a different platform init file |
| 36 | 40 | which populates the embedded device tree with data |
| 37 | 41 | from the platform specific bd_info file. The platform |
| 38 | 42 | specific cuImage platform init code can be found in |
| 39 | − arch/powerpc/boot/cuboot.*.c. Selection of the correct | |
| 43 | + `arch/powerpc/boot/cuboot.*.c`. Selection of the correct | |
| 40 | 44 | cuImage init code for a specific board can be found in |
| 41 | 45 | the wrapper structure. |
| 46 | + | |
| 42 | 47 | dtbImage.%: Similar to zImage, except device tree blob is embedded |
| 43 | 48 | inside the image instead of provided by firmware. The |
| 44 | 49 | output image file can be either an elf file or a flat |
| 45 | 50 | binary depending on the platform. |
| 46 | − dtbImages are used on systems which do not have an | |
| 51 | + | |
| 52 | + dtbImages are used on systems which do not have an | |
| 47 | 53 | interface for passing a device tree directly. |
| 48 | 54 | dtbImages are similar to simpleImages except that |
| 49 | 55 | dtbImages have platform specific code for extracting |
| 50 | 56 | data from the board firmware, but simpleImages do not |
| 51 | 57 | talk to the firmware at all. |
| 52 | − PlayStation 3 support uses dtbImage. So do Embedded | |
| 58 | + | |
| 59 | + PlayStation 3 support uses dtbImage. So do Embedded | |
| 53 | 60 | Planet boards using the PlanetCore firmware. Board |
| 54 | 61 | specific initialization code is typically found in a |
| 55 | 62 | file named arch/powerpc/boot/<platform>.c; but this |
| 56 | 63 | can be overridden by the wrapper script. |
| 64 | + | |
| 57 | 65 | simpleImage.%: Firmware independent compressed image that does not |
| 58 | 66 | depend on any particular firmware interface and embeds |
| 59 | 67 | a device tree blob. This image is a flat binary that |
| @@ -61,14 +69,16 @@ Currently, the following image format targets exist: · 1 unmodified line | ||
| 61 | 69 | Firmware cannot pass any configuration data to the |
| 62 | 70 | kernel with this image type and it depends entirely on |
| 63 | 71 | the embedded device tree for all information. |
| 64 | − The simpleImage is useful for booting systems with | |
| 72 | + | |
| 73 | + The simpleImage is useful for booting systems with | |
| 65 | 74 | an unknown firmware interface or for booting from |
| 66 | 75 | a debugger when no firmware is present (such as on |
| 67 | 76 | the Xilinx Virtex platform). The only assumption that |
| 68 | 77 | simpleImage makes is that RAM is correctly initialized |
| 69 | 78 | and that the MMU is either off or has RAM mapped to |
| 70 | 79 | base address 0. |
| 71 | − simpleImage also supports inserting special platform | |
| 80 | + | |
| 81 | + simpleImage also supports inserting special platform | |
| 72 | 82 | specific initialization code to the start of the bootup |
| 73 | 83 | sequence. The virtex405 platform uses this feature to |
| 74 | 84 | ensure that the cache is invalidated before caching |
| @@ -81,9 +91,11 @@ Currently, the following image format targets exist: · 6 unmodified lines | ||
| 81 | 91 | named (virtex405-<board>.dts). Search the wrapper |
| 82 | 92 | script for 'virtex405' and see the file |
| 83 | 93 | arch/powerpc/boot/virtex405-head.S for details. |
| 94 | + | |
| 84 | 95 | treeImage.%; Image format for used with OpenBIOS firmware found |
| 85 | 96 | on some ppc4xx hardware. This image embeds a device |
| 86 | 97 | tree blob inside the image. |
| 98 | + | |
| 87 | 99 | uImage: Native image format used by U-Boot. The uImage target |
| 88 | 100 | does not add any boot code. It just wraps a compressed |
| 89 | 101 | vmlinux in the uImage data structure. This image |
| @@ -91,12 +103,14 @@ Currently, the following image format targets exist: · 1 unmodified line | ||
| 91 | 103 | a device tree to the kernel at boot. If using an older |
| 92 | 104 | version of U-Boot, then you need to use a cuImage |
| 93 | 105 | instead. |
| 106 | + | |
| 94 | 107 | zImage.%: Image format which does not embed a device tree. |
| 95 | 108 | Used by OpenFirmware and other firmware interfaces |
| 96 | 109 | which are able to supply a device tree. This image |
| 97 | 110 | expects firmware to provide the device tree at boot. |
| 98 | 111 | Typically, if you have general purpose PowerPC |
| 99 | 112 | hardware then you want this image format. |
| 113 | + ==================== ======================================================== | |
| 100 | 114 | |
| 101 | 115 | Image types which embed a device tree blob (simpleImage, dtbImage, treeImage, |
| 102 | 116 | and cuImage) all generate the device tree blob from a file in the |
| @@ -1,3 +1,4 @@ | ||
| 1 | +============ | |
| 1 | 2 | CPU Families |
| 2 | 3 | ============ |
| 3 | 4 | |
| @@ -8,8 +9,8 @@ and are supported by arch/powerpc. · 4 unmodified lines | ||
| 8 | 9 | Book3S (aka sPAPR) |
| 9 | 10 | ------------------ |
| 10 | 11 | |
| 11 | − - Hash MMU | |
| 12 | − - Mix of 32 & 64 bit | |
| 12 | +- Hash MMU | |
| 13 | +- Mix of 32 & 64 bit:: | |
| 13 | 14 | |
| 14 | 15 | +--------------+ +----------------+ |
| 15 | 16 | | Old POWER | --------------> | RS64 (threads) | |
| @@ -108,8 +109,8 @@ Book3S (aka sPAPR) · 92 unmodified lines | ||
| 108 | 109 | IBM BookE |
| 109 | 110 | --------- |
| 110 | 111 | |
| 111 | − - Software loaded TLB. | |
| 112 | − - All 32 bit | |
| 112 | +- Software loaded TLB. | |
| 113 | +- All 32 bit:: | |
| 113 | 114 | |
| 114 | 115 | +--------------+ |
| 115 | 116 | | 401 | |
| @@ -155,8 +156,8 @@ IBM BookE · 39 unmodified lines | ||
| 155 | 156 | Motorola/Freescale 8xx |
| 156 | 157 | ---------------------- |
| 157 | 158 | |
| 158 | − - Software loaded with hardware assist. | |
| 159 | − - All 32 bit | |
| 159 | +- Software loaded with hardware assist. | |
| 160 | +- All 32 bit:: | |
| 160 | 161 | |
| 161 | 162 | +-------------+ |
| 162 | 163 | | MPC8xx Core | |
| @@ -166,9 +167,9 @@ Motorola/Freescale 8xx · 3 unmodified lines | ||
| 166 | 167 | Freescale BookE |
| 167 | 168 | --------------- |
| 168 | 169 | |
| 169 | − - Software loaded TLB. | |
| 170 | − - e6500 adds HW loaded indirect TLB entries. | |
| 171 | − - Mix of 32 & 64 bit | |
| 170 | +- Software loaded TLB. | |
| 171 | +- e6500 adds HW loaded indirect TLB entries. | |
| 172 | +- Mix of 32 & 64 bit:: | |
| 172 | 173 | |
| 173 | 174 | +--------------+ |
| 174 | 175 | | e200 | |
| @@ -207,8 +208,8 @@ Freescale BookE · 32 unmodified lines | ||
| 207 | 208 | IBM A2 core |
| 208 | 209 | ----------- |
| 209 | 210 | |
| 210 | − - Book3E, software loaded TLB + HW loaded indirect TLB entries. | |
| 211 | − - 64 bit | |
| 211 | +- Book3E, software loaded TLB + HW loaded indirect TLB entries. | |
| 212 | +- 64 bit:: | |
| 212 | 213 | |
| 213 | 214 | +--------------+ +----------------+ |
| 214 | 215 | | A2 core | --> | WSP | |
| @@ -1,3 +1,7 @@ | ||
| 1 | +============ | |
| 2 | +CPU Features | |
| 3 | +============ | |
| 4 | + | |
| 1 | 5 | Hollis Blanchard <hollis@austin.ibm.com> |
| 2 | 6 | 5 Jun 2002 |
| 3 | 7 | |
| @@ -32,7 +36,7 @@ anyways). · 28 unmodified lines | ||
| 32 | 36 | After detecting the processor type, the kernel patches out sections of code |
| 33 | 37 | that shouldn't be used by writing nop's over it. Using cpufeatures requires |
| 34 | 38 | just 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S |
| 35 | −transfer_to_handler: | |
| 39 | +transfer_to_handler:: | |
| 36 | 40 | |
| 37 | 41 | #ifdef CONFIG_ALTIVEC |
| 38 | 42 | BEGIN_FTR_SECTION |
| @@ -1,3 +1,4 @@ | ||
| 1 | +==================================== | |
| 1 | 2 | Coherent Accelerator Interface (CXL) |
| 2 | 3 | ==================================== |
| 3 | 4 | |
| @@ -21,6 +22,8 @@ Introduction · 17 unmodified lines | ||
| 21 | 22 | Hardware overview |
| 22 | 23 | ================= |
| 23 | 24 | |
| 25 | + :: | |
| 26 | + | |
| 24 | 27 | POWER8/9 FPGA |
| 25 | 28 | +----------+ +---------+ |
| 26 | 29 | | | | | |
| @@ -59,14 +62,16 @@ Hardware overview · 32 unmodified lines | ||
| 59 | 62 | the fault. The context to which this fault is serviced is based on |
| 60 | 63 | who owns that acceleration function. |
| 61 | 64 | |
| 62 | − POWER8 <-----> PSL Version 8 is compliant to the CAIA Version 1.0. | |
| 63 | − POWER9 <-----> PSL Version 9 is compliant to the CAIA Version 2.0. | |
| 65 | + - POWER8 and PSL Version 8 are compliant to the CAIA Version 1.0. | |
| 66 | + - POWER9 and PSL Version 9 are compliant to the CAIA Version 2.0. | |
| 67 | + | |
| 64 | 68 | This PSL Version 9 provides new features such as: |
| 69 | + | |
| 65 | 70 | * Interaction with the nest MMU on the P9 chip. |
| 66 | 71 | * Native DMA support. |
| 67 | 72 | * Supports sending ASB_Notify messages for host thread wakeup. |
| 68 | 73 | * Supports Atomic operations. |
| 69 | − * .... | |
| 74 | + * etc. | |
| 70 | 75 | |
| 71 | 76 | Cards with a PSL9 won't work on a POWER8 system and cards with a |
| 72 | 77 | PSL8 won't work on a POWER9 system. |
| @@ -147,7 +152,9 @@ User API · 74 unmodified lines | ||
| 147 | 152 | master devices. |
| 148 | 153 | |
| 149 | 154 | A userspace library libcxl is available here: |
| 155 | + | |
| 150 | 156 | https://github.com/ibm-capi/libcxl |
| 157 | + | |
| 151 | 158 | This provides a C interface to this kernel API. |
| 152 | 159 | |
| 153 | 160 | open |
| @@ -165,7 +172,8 @@ open · 11 unmodified lines | ||
| 165 | 172 | When all available contexts are allocated the open call will fail |
| 166 | 173 | and return -ENOSPC. |
| 167 | 174 | |
| 168 | − Note: IRQs need to be allocated for each context, which may limit | |
| 175 | + Note: | |
| 176 | + IRQs need to be allocated for each context, which may limit | |
| 169 | 177 | the number of contexts that can be created, and therefore |
| 170 | 178 | how many times the device can be opened. The POWER8 CAPP |
| 171 | 179 | supports 2040 IRQs and 3 are used by the kernel, so 2037 are |
| @@ -186,7 +194,9 @@ ioctl · 14 unmodified lines | ||
| 186 | 194 | updated as userspace allocates and frees memory. This ioctl |
| 187 | 195 | returns once the AFU context is started. |
| 188 | 196 | |
| 189 | − Takes a pointer to a struct cxl_ioctl_start_work: | |
| 197 | + Takes a pointer to a struct cxl_ioctl_start_work | |
| 198 | + | |
| 199 | + :: | |
| 190 | 200 | |
| 191 | 201 | struct cxl_ioctl_start_work { |
| 192 | 202 | __u64 flags; |
| @@ -269,7 +279,7 @@ read · 76 unmodified lines | ||
| 269 | 279 | The buffer passed to read() must be at least 4K bytes. |
| 270 | 280 | |
| 271 | 281 | The result of the read will be a buffer of one or more events, |
| 272 | − each event is of type struct cxl_event, of varying size. | |
| 282 | + each event is of type struct cxl_event, of varying size:: | |
| 273 | 283 | |
| 274 | 284 | struct cxl_event { |
| 275 | 285 | struct cxl_event_header header; |
| @@ -280,7 +290,9 @@ read · 4 unmodified lines | ||
| 280 | 290 | }; |
| 281 | 291 | }; |
| 282 | 292 | |
| 283 | − The struct cxl_event_header is defined as: | |
| 293 | + The struct cxl_event_header is defined as | |
| 294 | + | |
| 295 | + :: | |
| 284 | 296 | |
| 285 | 297 | struct cxl_event_header { |
| 286 | 298 | __u16 type; |
| @@ -307,7 +319,9 @@ read · 20 unmodified lines | ||
| 307 | 319 | For future extensions and padding. |
| 308 | 320 | |
| 309 | 321 | If the event type is CXL_EVENT_AFU_INTERRUPT then the event |
| 310 | − structure is defined as: | |
| 322 | + structure is defined as | |
| 323 | + | |
| 324 | + :: | |
| 311 | 325 | |
| 312 | 326 | struct cxl_event_afu_interrupt { |
| 313 | 327 | __u16 flags; |
| @@ -326,7 +340,9 @@ read · 12 unmodified lines | ||
| 326 | 340 | For future extensions and padding. |
| 327 | 341 | |
| 328 | 342 | If the event type is CXL_EVENT_DATA_STORAGE then the event |
| 329 | − structure is defined as: | |
| 343 | + structure is defined as | |
| 344 | + | |
| 345 | + :: | |
| 330 | 346 | |
| 331 | 347 | struct cxl_event_data_storage { |
| 332 | 348 | __u16 flags; |
| @@ -356,7 +372,9 @@ read · 23 unmodified lines | ||
| 356 | 372 | For future extensions |
| 357 | 373 | |
| 358 | 374 | If the event type is CXL_EVENT_AFU_ERROR then the event structure |
| 359 | − is defined as: | |
| 375 | + is defined as | |
| 376 | + | |
| 377 | + :: | |
| 360 | 378 | |
| 361 | 379 | struct cxl_event_afu_error { |
| 362 | 380 | __u16 flags; |
| @@ -393,15 +411,15 @@ open · 30 unmodified lines | ||
| 393 | 411 | ioctl |
| 394 | 412 | ----- |
| 395 | 413 | |
| 396 | −CXL_IOCTL_DOWNLOAD_IMAGE: | |
| 397 | −CXL_IOCTL_VALIDATE_IMAGE: | |
| 414 | +CXL_IOCTL_DOWNLOAD_IMAGE / CXL_IOCTL_VALIDATE_IMAGE: | |
| 398 | 415 | Starts and controls flashing a new FPGA image. Partial |
| 399 | 416 | reconfiguration is not supported (yet), so the image must contain |
| 400 | 417 | a copy of the PSL and AFU(s). Since an image can be quite large, |
| 401 | 418 | the caller may have to iterate, splitting the image in smaller |
| 402 | 419 | chunks. |
| 403 | 420 | |
| 404 | − Takes a pointer to a struct cxl_adapter_image: | |
| 421 | + Takes a pointer to a struct cxl_adapter_image:: | |
| 422 | + | |
| 405 | 423 | struct cxl_adapter_image { |
| 406 | 424 | __u64 flags; |
| 407 | 425 | __u64 data; |
| @@ -442,7 +460,7 @@ Udev rules · 34 unmodified lines | ||
| 442 | 460 | The following udev rules could be used to create a symlink to the |
| 443 | 461 | most logical chardev to use in any programming mode (afuX.Yd for |
| 444 | 462 | dedicated, afuX.Ys for afu directed), since the API is virtually |
| 445 | − identical for each: | |
| 463 | + identical for each:: | |
| 446 | 464 | |
| 447 | 465 | SUBSYSTEM=="cxl", ATTRS{mode}=="dedicated_process", SYMLINK="cxl/%b" |
| 448 | 466 | SUBSYSTEM=="cxl", ATTRS{mode}=="afu_directed", \ |
| @@ -1,3 +1,7 @@ | ||
| 1 | +================================ | |
| 2 | +Coherent Accelerator (CXL) Flash | |
| 3 | +================================ | |
| 4 | + | |
| 1 | 5 | Introduction |
| 2 | 6 | ============ |
| 3 | 7 | |
| @@ -28,7 +32,7 @@ Introduction · 24 unmodified lines | ||
| 28 | 32 | responsible for the initialization of the adapter, setting up the |
| 29 | 33 | special path for user space access, and performing error recovery. It |
| 30 | 34 | communicates directly the Flash Accelerator Functional Unit (AFU) |
| 31 | − as described in Documentation/powerpc/cxl.txt. | |
| 35 | + as described in Documentation/powerpc/cxl.rst. | |
| 32 | 36 | |
| 33 | 37 | The cxlflash driver supports two, mutually exclusive, modes of |
| 34 | 38 | operation at the device (LUN) level: |
| @@ -58,7 +62,7 @@ Overview · 23 unmodified lines | ||
| 58 | 62 | |
| 59 | 63 | The CXL Flash Adapter Driver establishes a master context with the |
| 60 | 64 | AFU. It uses memory mapped I/O (MMIO) for this control and setup. The |
| 61 | − Adapter Problem Space Memory Map looks like this: | |
| 65 | + Adapter Problem Space Memory Map looks like this:: | |
| 62 | 66 | |
| 63 | 67 | +-------------------------------+ |
| 64 | 68 | | 512 * 64 KB User MMIO | |
| @@ -375,7 +379,7 @@ CXL Flash Driver Host IOCTLs · 310 unmodified lines | ||
| 375 | 379 | Each host adapter instance that is supported by the cxlflash driver |
| 376 | 380 | has a special character device associated with it to enable a set of |
| 377 | 381 | host management function. These character devices are hosted in a |
| 378 | − class dedicated for cxlflash and can be accessed via /dev/cxlflash/*. | |
| 382 | + class dedicated for cxlflash and can be accessed via `/dev/cxlflash/*`. | |
| 379 | 383 | |
| 380 | 384 | Applications can be written to perform various functions using the |
| 381 | 385 | host ioctl APIs below. |
| @@ -1,10 +1,11 @@ | ||
| 1 | +===================== | |
| 1 | 2 | DAWR issues on POWER9 |
| 2 | −============================ | |
| 3 | +===================== | |
| 3 | 4 | |
| 4 | 5 | On POWER9 the Data Address Watchpoint Register (DAWR) can cause a checkstop |
| 5 | 6 | if it points to cache inhibited (CI) memory. Currently Linux has no way to |
| 6 | 7 | disinguish CI memory when configuring the DAWR, so (for now) the DAWR is |
| 7 | −disabled by this commit: | |
| 8 | +disabled by this commit:: | |
| 8 | 9 | |
| 9 | 10 | commit 9654153158d3e0684a1bdb76dbababdb7111d5a0 |
| 10 | 11 | Author: Michael Neuling <mikey@neuling.org> |
| @@ -12,7 +13,7 @@ disabled by this commit: · 1 unmodified line | ||
| 12 | 13 | powerpc: Disable DAWR in the base POWER9 CPU features |
| 13 | 14 | |
| 14 | 15 | Technical Details: |
| 15 | −============================ | |
| 16 | +================== | |
| 16 | 17 | |
| 17 | 18 | DAWR has 6 different ways of being set. |
| 18 | 19 | 1) ptrace |
| @@ -37,7 +38,7 @@ DAWR on the migration. · 18 unmodified lines | ||
| 37 | 38 | For xmon, the 'bd' command will return an error on P9. |
| 38 | 39 | |
| 39 | 40 | Consequences for users |
| 40 | −============================ | |
| 41 | +====================== | |
| 41 | 42 | |
| 42 | 43 | For GDB watchpoints (ie 'watch' command) on POWER9 bare metal , GDB |
| 43 | 44 | will accept the command. Unfortunately since there is no hardware |
| @@ -57,8 +58,8 @@ trapped in GDB. The watchpoint is remembered, so if the guest is · 13 unmodified lines | ||
| 57 | 58 | migrated back to the POWER8 host, it will start working again. |
| 58 | 59 | |
| 59 | 60 | Force enabling the DAWR |
| 60 | −============================= | |
| 61 | −Kernels (since ~v5.2) have an option to force enable the DAWR via: | |
| 61 | +======================= | |
| 62 | +Kernels (since ~v5.2) have an option to force enable the DAWR via:: | |
| 62 | 63 | |
| 63 | 64 | echo Y > /sys/kernel/debug/powerpc/dawr_enable_dangerous |
| 64 | 65 | |
| @@ -86,5 +87,7 @@ dawr_enable_dangerous file will fail if the hypervisor doesn't support · 21 unmodified lines | ||
| 86 | 87 | writing the DAWR. |
| 87 | 88 | |
| 88 | 89 | To double check the DAWR is working, run this kernel selftest: |
| 90 | + | |
| 89 | 91 | tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c |
| 92 | + | |
| 90 | 93 | Any errors/failures/skips mean something is wrong. |
| @@ -1,5 +1,6 @@ | ||
| 1 | − DSCR (Data Stream Control Register) | |
| 2 | − ================================================ | |
| 1 | +=================================== | |
| 2 | +DSCR (Data Stream Control Register) | |
| 3 | +=================================== | |
| 3 | 4 | |
| 4 | 5 | DSCR register in powerpc allows user to have some control of prefetch of data |
| 5 | 6 | stream in the processor. Please refer to the ISA documents or related manual |
| @@ -10,14 +11,17 @@ user interface. · 4 unmodified lines | ||
| 10 | 11 | |
| 11 | 12 | (A) Data Structures: |
| 12 | 13 | |
| 13 | − (1) thread_struct: | |
| 14 | + (1) thread_struct:: | |
| 15 | + | |
| 14 | 16 | dscr /* Thread DSCR value */ |
| 15 | 17 | dscr_inherit /* Thread has changed default DSCR */ |
| 16 | 18 | |
| 17 | − (2) PACA: | |
| 19 | + (2) PACA:: | |
| 20 | + | |
| 18 | 21 | dscr_default /* per-CPU DSCR default value */ |
| 19 | 22 | |
| 20 | − (3) sysfs.c: | |
| 23 | + (3) sysfs.c:: | |
| 24 | + | |
| 21 | 25 | dscr_default /* System DSCR default value */ |
| 22 | 26 | |
| 23 | 27 | (B) Scheduler Changes: |
| @@ -35,8 +39,8 @@ user interface. · 11 unmodified lines | ||
| 35 | 39 | |
| 36 | 40 | (C) SYSFS Interface: |
| 37 | 41 | |
| 38 | − Global DSCR default: /sys/devices/system/cpu/dscr_default | |
| 39 | − CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr | |
| 42 | + - Global DSCR default: /sys/devices/system/cpu/dscr_default | |
| 43 | + - CPU specific DSCR default: /sys/devices/system/cpu/cpuN/dscr | |
| 40 | 44 | |
| 41 | 45 | Changing the global DSCR default in the sysfs will change all the CPU |
| 42 | 46 | specific DSCR defaults immediately in their PACA structures. Again if |
| @@ -1,10 +1,10 @@ | ||
| 1 | +========================== | |
| 2 | +PCI Bus EEH Error Recovery | |
| 3 | +========================== | |
| 1 | 4 | |
| 5 | +Linas Vepstas <linas@austin.ibm.com> | |
| 2 | 6 | |
| 3 | − PCI Bus EEH Error Recovery | |
| 4 | − -------------------------- | |
| 5 | − Linas Vepstas | |
| 6 | − <linas@austin.ibm.com> | |
| 7 | − 12 January 2005 | |
| 7 | +12 January 2005 | |
| 8 | 8 | |
| 9 | 9 | |
| 10 | 10 | Overview: |
| @@ -143,17 +143,17 @@ seen in /proc/ppc64/eeh (subject to change). Normally, almost · 132 unmodified lines | ||
| 143 | 143 | all of these occur during boot, when the PCI bus is scanned, where |
| 144 | 144 | a large number of 0xff reads are part of the bus scan procedure. |
| 145 | 145 | |
| 146 | −If a frozen slot is detected, code in | |
| 147 | −arch/powerpc/platforms/pseries/eeh.c will print a stack trace to | |
| 148 | −syslog (/var/log/messages). This stack trace has proven to be very | |
| 149 | −useful to device-driver authors for finding out at what point the EEH | |
| 150 | −error was detected, as the error itself usually occurs slightly | |
| 146 | +If a frozen slot is detected, code in | |
| 147 | +arch/powerpc/platforms/pseries/eeh.c will print a stack trace to | |
| 148 | +syslog (/var/log/messages). This stack trace has proven to be very | |
| 149 | +useful to device-driver authors for finding out at what point the EEH | |
| 150 | +error was detected, as the error itself usually occurs slightly | |
| 151 | 151 | beforehand. |
| 152 | 152 | |
| 153 | 153 | Next, it uses the Linux kernel notifier chain/work queue mechanism to |
| 154 | 154 | allow any interested parties to find out about the failure. Device |
| 155 | 155 | drivers, or other parts of the kernel, can use |
| 156 | −eeh_register_notifier(struct notifier_block *) to find out about EEH | |
| 156 | +`eeh_register_notifier(struct notifier_block *)` to find out about EEH | |
| 157 | 157 | events. The event will include a pointer to the pci device, the |
| 158 | 158 | device node and some state info. Receivers of the event can "do as |
| 159 | 159 | they wish"; the default handler will be described further in this |
| @@ -162,10 +162,13 @@ section. · 2 unmodified lines | ||
| 162 | 162 | To assist in the recovery of the device, eeh.c exports the |
| 163 | 163 | following functions: |
| 164 | 164 | |
| 165 | −rtas_set_slot_reset() -- assert the PCI #RST line for 1/8th of a second | |
| 166 | −rtas_configure_bridge() -- ask firmware to configure any PCI bridges | |
| 165 | +rtas_set_slot_reset() | |
| 166 | + assert the PCI #RST line for 1/8th of a second | |
| 167 | +rtas_configure_bridge() | |
| 168 | + ask firmware to configure any PCI bridges | |
| 167 | 169 | located topologically under the pci slot. |
| 168 | −eeh_save_bars() and eeh_restore_bars(): save and restore the PCI | |
| 170 | +eeh_save_bars() and eeh_restore_bars(): | |
| 171 | + save and restore the PCI | |
| 169 | 172 | config-space info for a device and any devices under it. |
| 170 | 173 | |
| 171 | 174 | |
| @@ -191,7 +194,7 @@ events get delivered to user-space scripts. · 19 unmodified lines | ||
| 191 | 194 | |
| 192 | 195 | Following is an example sequence of events that cause a device driver |
| 193 | 196 | close function to be called during the first phase of an EEH reset. |
| 194 | −The following sequence is an example of the pcnet32 device driver. | |
| 197 | +The following sequence is an example of the pcnet32 device driver:: | |
| 195 | 198 | |
| 196 | 199 | rpa_php_unconfig_pci_adapter (struct slot *) // in rpaphp_pci.c |
| 197 | 200 | { |
| @@ -241,53 +244,54 @@ The following sequence is an example of the pcnet32 device driver. · 43 unmodified lines | ||
| 241 | 244 | }}}}}} |
| 242 | 245 | |
| 243 | 246 | |
| 244 | − in drivers/pci/pci_driver.c, | |
| 245 | − struct device_driver->remove() is just pci_device_remove() | |
| 246 | − which calls struct pci_driver->remove() which is pcnet32_remove_one() | |
| 247 | − which calls unregister_netdev() (in net/core/dev.c) | |
| 248 | − which calls dev_close() (in net/core/dev.c) | |
| 249 | − which calls dev->stop() which is pcnet32_close() | |
| 250 | − which then does the appropriate shutdown. | |
| 247 | +in drivers/pci/pci_driver.c, | |
| 248 | +struct device_driver->remove() is just pci_device_remove() | |
| 249 | +which calls struct pci_driver->remove() which is pcnet32_remove_one() | |
| 250 | +which calls unregister_netdev() (in net/core/dev.c) | |
| 251 | +which calls dev_close() (in net/core/dev.c) | |
| 252 | +which calls dev->stop() which is pcnet32_close() | |
| 253 | +which then does the appropriate shutdown. | |
| 251 | 254 | |
| 252 | 255 | --- |
| 256 | + | |
| 253 | 257 | Following is the analogous stack trace for events sent to user-space |
| 254 | −when the pci device is unconfigured. | |
| 258 | +when the pci device is unconfigured:: | |
| 255 | 259 | |
| 256 | −rpa_php_unconfig_pci_adapter() { // in rpaphp_pci.c | |
| 257 | − calls | |
| 258 | − pci_remove_bus_device (struct pci_dev *) { // in /drivers/pci/remove.c | |
| 260 | + rpa_php_unconfig_pci_adapter() { // in rpaphp_pci.c | |
| 259 | 261 | calls |
| 260 | − pci_destroy_dev (struct pci_dev *) { | |
| 262 | + pci_remove_bus_device (struct pci_dev *) { // in /drivers/pci/remove.c | |
| 261 | 263 | calls |
| 262 | − device_unregister (&dev->dev) { // in /drivers/base/core.c | |
| 264 | + pci_destroy_dev (struct pci_dev *) { | |
| 263 | 265 | calls |
| 264 | − device_del(struct device * dev) { // in /drivers/base/core.c | |
| 266 | + device_unregister (&dev->dev) { // in /drivers/base/core.c | |
| 265 | 267 | calls |
| 266 | − kobject_del() { //in /libs/kobject.c | |
| 268 | + device_del(struct device * dev) { // in /drivers/base/core.c | |
| 267 | 269 | calls |
| 268 | − kobject_uevent() { // in /libs/kobject.c | |
| 270 | + kobject_del() { //in /libs/kobject.c | |
| 269 | 271 | calls |
| 270 | − kset_uevent() { // in /lib/kobject.c | |
| 272 | + kobject_uevent() { // in /libs/kobject.c | |
| 271 | 273 | calls |
| 272 | − kset->uevent_ops->uevent() // which is really just | |
| 273 | − a call to | |
| 274 | − dev_uevent() { // in /drivers/base/core.c | |
| 274 | + kset_uevent() { // in /lib/kobject.c | |
| 275 | 275 | calls |
| 276 | − dev->bus->uevent() which is really just a call to | |
| 277 | − pci_uevent () { // in drivers/pci/hotplug.c | |
| 278 | − which prints device name, etc.... | |
| 276 | + kset->uevent_ops->uevent() // which is really just | |
| 277 | + a call to | |
| 278 | + dev_uevent() { // in /drivers/base/core.c | |
| 279 | + calls | |
| 280 | + dev->bus->uevent() which is really just a call to | |
| 281 | + pci_uevent () { // in drivers/pci/hotplug.c | |
| 282 | + which prints device name, etc.... | |
| 283 | + } | |
| 279 | 284 | } |
| 280 | − } | |
| 281 | − then kobject_uevent() sends a netlink uevent to userspace | |
| 282 | − --> userspace uevent | |
| 283 | − (during early boot, nobody listens to netlink events and | |
| 284 | − kobject_uevent() executes uevent_helper[], which runs the | |
| 285 | − event process /sbin/hotplug) | |
| 285 | + then kobject_uevent() sends a netlink uevent to userspace | |
| 286 | + --> userspace uevent | |
| 287 | + (during early boot, nobody listens to netlink events and | |
| 288 | + kobject_uevent() executes uevent_helper[], which runs the | |
| 289 | + event process /sbin/hotplug) | |
| 290 | + } | |
| 286 | 291 | } |
| 287 | − } | |
| 288 | − kobject_del() then calls sysfs_remove_dir(), which would | |
| 289 | − trigger any user-space daemon that was watching /sysfs, | |
| 290 | − and notice the delete event. | |
| 292 | + kobject_del() then calls sysfs_remove_dir(), which would | |
| 293 | + trigger any user-space daemon that was watching /sysfs, | |
| 294 | + and notice the delete event. | |
| 291 | 295 | |
| 292 | 296 | |
| 293 | 297 | Pro's and Con's of the Current Design |
| @@ -299,12 +303,12 @@ individual device drivers, so that the current design throws a wide net. · 5 unmodified lines | ||
| 299 | 303 | The biggest negative of the design is that it potentially disturbs |
| 300 | 304 | network daemons and file systems that didn't need to be disturbed. |
| 301 | 305 | |
| 302 | −-- A minor complaint is that resetting the network card causes | |
| 306 | +- A minor complaint is that resetting the network card causes | |
| 303 | 307 | user-space back-to-back ifdown/ifup burps that potentially disturb |
| 304 | 308 | network daemons, that didn't need to even know that the pci |
| 305 | 309 | card was being rebooted. |
| 306 | 310 | |
| 307 | −-- A more serious concern is that the same reset, for SCSI devices, | |
| 311 | +- A more serious concern is that the same reset, for SCSI devices, | |
| 308 | 312 | causes havoc to mounted file systems. Scripts cannot post-facto |
| 309 | 313 | unmount a file system without flushing pending buffers, but this |
| 310 | 314 | is impossible, because I/O has already been stopped. Thus, |
| @@ -322,7 +326,7 @@ network daemons and file systems that didn't need to be disturbed. · 11 unmodified lines | ||
| 322 | 326 | from the block layer. It would be very natural to add an EEH |
| 323 | 327 | reset into this chain of events. |
| 324 | 328 | |
| 325 | −-- If a SCSI error occurs for the root device, all is lost unless | |
| 329 | +- If a SCSI error occurs for the root device, all is lost unless | |
| 326 | 330 | the sysadmin had the foresight to run /bin, /sbin, /etc, /var |
| 327 | 331 | and so on, out of ramdisk/tmpfs. |
| 328 | 332 | |
| @@ -330,5 +334,3 @@ network daemons and file systems that didn't need to be disturbed. · 1 unmodified line | ||
| 330 | 334 | Conclusions |
| 331 | 335 | ----------- |
| 332 | 336 | There's forward progress ... |
| 333 | − | |
| 334 | − | |
| @@ -1,7 +1,8 @@ | ||
| 1 | +====================== | |
| 2 | +Firmware-Assisted Dump | |
| 3 | +====================== | |
| 1 | 4 | |
| 2 | − Firmware-Assisted Dump | |
| 3 | − ------------------------ | |
| 4 | − July 2011 | |
| 5 | +July 2011 | |
| 5 | 6 | |
| 6 | 7 | The goal of firmware-assisted dump is to enable the dump of |
| 7 | 8 | a crashed system, and to do so from a fully-reset system, and |
| @@ -27,11 +28,11 @@ in production use. · 19 unmodified lines | ||
| 27 | 28 | Comparing with kdump or other strategies, firmware-assisted |
| 28 | 29 | dump offers several strong, practical advantages: |
| 29 | 30 | |
| 30 | −-- Unlike kdump, the system has been reset, and loaded | |
| 31 | +- Unlike kdump, the system has been reset, and loaded | |
| 31 | 32 | with a fresh copy of the kernel. In particular, |
| 32 | 33 | PCI and I/O devices have been reinitialized and are |
| 33 | 34 | in a clean, consistent state. |
| 34 | −-- Once the dump is copied out, the memory that held the dump | |
| 35 | +- Once the dump is copied out, the memory that held the dump | |
| 35 | 36 | is immediately available to the running kernel. And therefore, |
| 36 | 37 | unlike kdump, fadump doesn't need a 2nd reboot to get back |
| 37 | 38 | the system to the production configuration. |
| @@ -40,17 +41,18 @@ The above can only be accomplished by coordination with, · 2 unmodified lines | ||
| 40 | 41 | and assistance from the Power firmware. The procedure is |
| 41 | 42 | as follows: |
| 42 | 43 | |
| 43 | −-- The first kernel registers the sections of memory with the | |
| 44 | +- The first kernel registers the sections of memory with the | |
| 44 | 45 | Power firmware for dump preservation during OS initialization. |
| 45 | 46 | These registered sections of memory are reserved by the first |
| 46 | 47 | kernel during early boot. |
| 47 | 48 | |
| 48 | −-- When a system crashes, the Power firmware will save | |
| 49 | +- When a system crashes, the Power firmware will save | |
| 49 | 50 | the low memory (boot memory of size larger of 5% of system RAM |
| 50 | 51 | or 256MB) of RAM to the previous registered region. It will |
| 51 | 52 | also save system registers, and hardware PTE's. |
| 52 | 53 | |
| 53 | − NOTE: The term 'boot memory' means size of the low memory chunk | |
| 54 | + NOTE: | |
| 55 | + The term 'boot memory' means size of the low memory chunk | |
| 54 | 56 | that is required for a kernel to boot successfully when |
| 55 | 57 | booted with restricted memory. By default, the boot memory |
| 56 | 58 | size will be the larger of 5% of system RAM or 256MB. |
| @@ -64,12 +66,12 @@ as follows: · 7 unmodified lines | ||
| 64 | 66 | as fadump uses a predefined offset to reserve memory |
| 65 | 67 | for boot memory dump preservation in case of a crash. |
| 66 | 68 | |
| 67 | −-- After the low memory (boot memory) area has been saved, the | |
| 69 | +- After the low memory (boot memory) area has been saved, the | |
| 68 | 70 | firmware will reset PCI and other hardware state. It will |
| 69 | 71 | *not* clear the RAM. It will then launch the bootloader, as |
| 70 | 72 | normal. |
| 71 | 73 | |
| 72 | −-- The freshly booted kernel will notice that there is a new | |
| 74 | +- The freshly booted kernel will notice that there is a new | |
| 73 | 75 | node (ibm,dump-kernel) in the device tree, indicating that |
| 74 | 76 | there is crash data available from a previous boot. During |
| 75 | 77 | the early boot OS will reserve rest of the memory above |
| @@ -77,17 +79,18 @@ as follows: · 1 unmodified line | ||
| 77 | 79 | size. This will make sure that the second kernel will not |
| 78 | 80 | touch any of the dump memory area. |
| 79 | 81 | |
| 80 | −-- User-space tools will read /proc/vmcore to obtain the contents | |
| 82 | +- User-space tools will read /proc/vmcore to obtain the contents | |
| 81 | 83 | of memory, which holds the previous crashed kernel dump in ELF |
| 82 | 84 | format. The userspace tools may copy this info to disk, or |
| 83 | 85 | network, nas, san, iscsi, etc. as desired. |
| 84 | 86 | |
| 85 | −-- Once the userspace tool is done saving dump, it will echo | |
| 87 | +- Once the userspace tool is done saving dump, it will echo | |
| 86 | 88 | '1' to /sys/kernel/fadump_release_mem to release the reserved |
| 87 | 89 | memory back to general use, except the memory required for |
| 88 | 90 | next firmware-assisted dump registration. |
| 89 | 91 | |
| 90 | − e.g. | |
| 92 | + e.g.:: | |
| 93 | + | |
| 91 | 94 | # echo 1 > /sys/kernel/fadump_release_mem |
| 92 | 95 | |
| 93 | 96 | Please note that the firmware-assisted dump feature |
| @@ -95,7 +98,7 @@ is only available on Power6 and above systems with recent · 1 unmodified line | ||
| 95 | 98 | firmware versions. |
| 96 | 99 | |
| 97 | 100 | Implementation details: |
| 98 | −---------------------- | |
| 101 | +----------------------- | |
| 99 | 102 | |
| 100 | 103 | During boot, a check is made to see if firmware supports |
| 101 | 104 | this feature on that particular machine. If it does, then |
| @@ -121,7 +124,7 @@ Allocator (CMA) for memory reservation if CMA is configured for kernel. · 19 unmodified lines | ||
| 121 | 124 | With CMA reservation this memory will be available for applications to |
| 122 | 125 | use it, while kernel is prevented from using it. With this fadump will |
| 123 | 126 | still be able to capture all of the kernel memory and most of the user |
| 124 | −space memory except the user pages that were present in CMA region. | |
| 127 | +space memory except the user pages that were present in CMA region:: | |
| 125 | 128 | |
| 126 | 129 | o Memory Reservation during first kernel |
| 127 | 130 | |
| @@ -166,7 +169,7 @@ The tools to examine the dump will be same as the ones · 38 unmodified lines | ||
| 166 | 169 | used for kdump. |
| 167 | 170 | |
| 168 | 171 | How to enable firmware-assisted dump (fadump): |
| 169 | −------------------------------------- | |
| 172 | +---------------------------------------------- | |
| 170 | 173 | |
| 171 | 174 | 1. Set config option CONFIG_FA_DUMP=y and build kernel. |
| 172 | 175 | 2. Boot into linux kernel with 'fadump=on' kernel cmdline option. |
| @@ -177,19 +180,20 @@ How to enable firmware-assisted dump (fadump): · 4 unmodified lines | ||
| 177 | 180 | to specify size of the memory to reserve for boot memory dump |
| 178 | 181 | preservation. |
| 179 | 182 | |
| 180 | −NOTE: 1. 'fadump_reserve_mem=' parameter has been deprecated. Instead | |
| 181 | − use 'crashkernel=' to specify size of the memory to reserve | |
| 182 | − for boot memory dump preservation. | |
| 183 | − 2. If firmware-assisted dump fails to reserve memory then it | |
| 184 | − will fallback to existing kdump mechanism if 'crashkernel=' | |
| 185 | − option is set at kernel cmdline. | |
| 186 | − 3. if user wants to capture all of user space memory and ok with | |
| 187 | − reserved memory not available to production system, then | |
| 188 | − 'fadump=nocma' kernel parameter can be used to fallback to | |
| 189 | − old behaviour. | |
| 183 | +NOTE: | |
| 184 | + 1. 'fadump_reserve_mem=' parameter has been deprecated. Instead | |
| 185 | + use 'crashkernel=' to specify size of the memory to reserve | |
| 186 | + for boot memory dump preservation. | |
| 187 | + 2. If firmware-assisted dump fails to reserve memory then it | |
| 188 | + will fallback to existing kdump mechanism if 'crashkernel=' | |
| 189 | + option is set at kernel cmdline. | |
| 190 | + 3. if user wants to capture all of user space memory and ok with | |
| 191 | + reserved memory not available to production system, then | |
| 192 | + 'fadump=nocma' kernel parameter can be used to fallback to | |
| 193 | + old behaviour. | |
| 190 | 194 | |
| 191 | 195 | Sysfs/debugfs files: |
| 192 | −------------ | |
| 196 | +-------------------- | |
| 193 | 197 | |
| 194 | 198 | Firmware-assisted dump feature uses sysfs file system to hold |
| 195 | 199 | the control files and debugfs file to display memory reserved region. |
| @@ -197,20 +201,20 @@ the control files and debugfs file to display memory reserved region. · 1 unmodified line | ||
| 197 | 201 | Here is the list of files under kernel sysfs: |
| 198 | 202 | |
| 199 | 203 | /sys/kernel/fadump_enabled |
| 200 | − | |
| 201 | 204 | This is used to display the fadump status. |
| 202 | − 0 = fadump is disabled | |
| 203 | − 1 = fadump is enabled | |
| 205 | + | |
| 206 | + - 0 = fadump is disabled | |
| 207 | + - 1 = fadump is enabled | |
| 204 | 208 | |
| 205 | 209 | This interface can be used by kdump init scripts to identify if |
| 206 | 210 | fadump is enabled in the kernel and act accordingly. |
| 207 | 211 | |
| 208 | 212 | /sys/kernel/fadump_registered |
| 209 | − | |
| 210 | 213 | This is used to display the fadump registration status as well |
| 211 | 214 | as to control (start/stop) the fadump registration. |
| 212 | − 0 = fadump is not registered. | |
| 213 | − 1 = fadump is registered and ready to handle system crash. | |
| 215 | + | |
| 216 | + - 0 = fadump is not registered. | |
| 217 | + - 1 = fadump is registered and ready to handle system crash. | |
| 214 | 218 | |
| 215 | 219 | To register fadump echo 1 > /sys/kernel/fadump_registered and |
| 216 | 220 | echo 0 > /sys/kernel/fadump_registered for un-register and stop the |
| @@ -219,13 +223,12 @@ Here is the list of files under kernel sysfs: · 2 unmodified lines | ||
| 219 | 223 | easily integrated with kdump service start/stop. |
| 220 | 224 | |
| 221 | 225 | /sys/kernel/fadump_release_mem |
| 222 | − | |
| 223 | 226 | This file is available only when fadump is active during |
| 224 | 227 | second kernel. This is used to release the reserved memory |
| 225 | 228 | region that are held for saving crash dump. To release the |
| 226 | − reserved memory echo 1 to it: | |
| 229 | + reserved memory echo 1 to it:: | |
| 227 | 230 | |
| 228 | − echo 1 > /sys/kernel/fadump_release_mem | |
| 231 | + echo 1 > /sys/kernel/fadump_release_mem | |
| 229 | 232 | |
| 230 | 233 | After echo 1, the content of the /sys/kernel/debug/powerpc/fadump_region |
| 231 | 234 | file will change to reflect the new memory reservations. |
| @@ -238,38 +241,39 @@ Here is the list of files under powerpc debugfs: · 6 unmodified lines | ||
| 238 | 241 | (Assuming debugfs is mounted on /sys/kernel/debug directory.) |
| 239 | 242 | |
| 240 | 243 | /sys/kernel/debug/powerpc/fadump_region |
| 241 | − | |
| 242 | 244 | This file shows the reserved memory regions if fadump is |
| 243 | 245 | enabled otherwise this file is empty. The output format |
| 244 | − is: | |
| 245 | − <region>: [<start>-<end>] <reserved-size> bytes, Dumped: <dump-size> | |
| 246 | + is:: | |
| 247 | + | |
| 248 | + <region>: [<start>-<end>] <reserved-size> bytes, Dumped: <dump-size> | |
| 246 | 249 | |
| 247 | 250 | e.g. |
| 248 | − Contents when fadump is registered during first kernel | |
| 251 | + Contents when fadump is registered during first kernel:: | |
| 249 | 252 | |
| 250 | − # cat /sys/kernel/debug/powerpc/fadump_region | |
| 251 | − CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x0 | |
| 252 | − HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x0 | |
| 253 | − DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x0 | |
| 253 | + # cat /sys/kernel/debug/powerpc/fadump_region | |
| 254 | + CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x0 | |
| 255 | + HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x0 | |
| 256 | + DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x0 | |
| 254 | 257 | |
| 255 | − Contents when fadump is active during second kernel | |
| 258 | + Contents when fadump is active during second kernel:: | |
| 256 | 259 | |
| 257 | − # cat /sys/kernel/debug/powerpc/fadump_region | |
| 258 | − CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x40020 | |
| 259 | − HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x1000 | |
| 260 | − DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x10000000 | |
| 261 | − : [0x00000010000000-0x0000006ffaffff] 0x5ffb0000 bytes, Dumped: 0x5ffb0000 | |
| 260 | + # cat /sys/kernel/debug/powerpc/fadump_region | |
| 261 | + CPU : [0x0000006ffb0000-0x0000006fff001f] 0x40020 bytes, Dumped: 0x40020 | |
| 262 | + HPTE: [0x0000006fff0020-0x0000006fff101f] 0x1000 bytes, Dumped: 0x1000 | |
| 263 | + DUMP: [0x0000006fff1020-0x0000007fff101f] 0x10000000 bytes, Dumped: 0x10000000 | |
| 264 | + : [0x00000010000000-0x0000006ffaffff] 0x5ffb0000 bytes, Dumped: 0x5ffb0000 | |
| 262 | 265 | |
| 263 | −NOTE: Please refer to Documentation/filesystems/debugfs.txt on | |
| 266 | +NOTE: | |
| 267 | + Please refer to Documentation/filesystems/debugfs.txt on | |
| 264 | 268 | how to mount the debugfs filesystem. |
| 265 | 269 | |
| 266 | 270 | |
| 267 | 271 | TODO: |
| 268 | 272 | ----- |
| 269 | − o Need to come up with the better approach to find out more | |
| 273 | + - Need to come up with the better approach to find out more | |
| 270 | 274 | accurate boot memory size that is required for a kernel to |
| 271 | 275 | boot successfully when booted with restricted memory. |
| 272 | − o The fadump implementation introduces a fadump crash info structure | |
| 276 | + - The fadump implementation introduces a fadump crash info structure | |
| 273 | 277 | in the scratch area before the ELF core header. The idea of introducing |
| 274 | 278 | this structure is to pass some important crash info data to the second |
| 275 | 279 | kernel which will help second kernel to populate ELF core header with |
| @@ -277,7 +281,9 @@ TODO: · 1 unmodified line | ||
| 277 | 281 | design implementation does not address a possibility of introducing |
| 278 | 282 | additional fields (in future) to this structure without affecting |
| 279 | 283 | compatibility. Need to come up with the better approach to address this. |
| 284 | + | |
| 280 | 285 | The possible approaches are: |
| 286 | + | |
| 281 | 287 | 1. Introduce version field for version tracking, bump up the version |
| 282 | 288 | whenever a new field is added to the structure in future. The version |
| 283 | 289 | field can be used to find out what fields are valid for the current |
| @@ -285,8 +291,11 @@ TODO: · 1 unmodified line | ||
| 285 | 291 | 2. Reserve the area of predefined size (say PAGE_SIZE) for this |
| 286 | 292 | structure and have unused area as reserved (initialized to zero) |
| 287 | 293 | for future field additions. |
| 294 | + | |
| 288 | 295 | The advantage of approach 1 over 2 is we don't need to reserve extra space. |
| 289 | −--- | |
| 296 | + | |
| 290 | 297 | Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
| 298 | + | |
| 291 | 299 | This document is based on the original documentation written for phyp |
| 300 | + | |
| 292 | 301 | assisted dump by Linas Vepstas and Manish Ahuja. |
| @@ -1,19 +1,22 @@ | ||
| 1 | −=========================================================================== | |
| 2 | − HVCS | |
| 3 | − IBM "Hypervisor Virtual Console Server" Installation Guide | |
| 4 | − for Linux Kernel 2.6.4+ | |
| 5 | − Copyright (C) 2004 IBM Corporation | |
| 1 | +=============================================================== | |
| 2 | +HVCS IBM "Hypervisor Virtual Console Server" Installation Guide | |
| 3 | +=============================================================== | |
| 6 | 4 | |
| 7 | −=========================================================================== | |
| 8 | −NOTE:Eight space tabs are the optimum editor setting for reading this file. | |
| 9 | −=========================================================================== | |
| 5 | +for Linux Kernel 2.6.4+ | |
| 10 | 6 | |
| 11 | − Author(s) : Ryan S. Arnold <rsa@us.ibm.com> | |
| 12 | − Date Created: March, 02, 2004 | |
| 13 | − Last Changed: August, 24, 2004 | |
| 7 | +Copyright (C) 2004 IBM Corporation | |
| 14 | 8 | |
| 15 | −--------------------------------------------------------------------------- | |
| 16 | −Table of contents: | |
| 9 | +.. =========================================================================== | |
| 10 | +.. NOTE:Eight space tabs are the optimum editor setting for reading this file. | |
| 11 | +.. =========================================================================== | |
| 12 | + | |
| 13 | + | |
| 14 | +Author(s): Ryan S. Arnold <rsa@us.ibm.com> | |
| 15 | + | |
| 16 | +Date Created: March, 02, 2004 | |
| 17 | +Last Changed: August, 24, 2004 | |
| 18 | + | |
| 19 | +.. Table of contents: | |
| 17 | 20 | |
| 18 | 21 | 1. Driver Introduction: |
| 19 | 22 | 2. System Requirements |
| @@ -27,8 +30,8 @@ Table of contents: · 7 unmodified lines | ||
| 27 | 30 | 8. Questions & Answers: |
| 28 | 31 | 9. Reporting Bugs: |
| 29 | 32 | |
| 30 | −--------------------------------------------------------------------------- | |
| 31 | 33 | 1. Driver Introduction: |
| 34 | +======================= | |
| 32 | 35 | |
| 33 | 36 | This is the device driver for the IBM Hypervisor Virtual Console Server, |
| 34 | 37 | "hvcs". The IBM hvcs provides a tty driver interface to allow Linux user |
| @@ -38,8 +41,8 @@ ppc64 system. Physical hardware consoles per partition are not practical · 3 unmodified lines | ||
| 38 | 41 | on this hardware so system consoles are accessed by this driver using |
| 39 | 42 | firmware interfaces to virtual terminal devices. |
| 40 | 43 | |
| 41 | −--------------------------------------------------------------------------- | |
| 42 | 44 | 2. System Requirements: |
| 45 | +======================= | |
| 43 | 46 | |
| 44 | 47 | This device driver was written using 2.6.4 Linux kernel APIs and will only |
| 45 | 48 | build and run on kernels of this version or later. |
| @@ -52,8 +55,8 @@ Sysfs must be mounted on the system so that the user can determine which · 6 unmodified lines | ||
| 52 | 55 | major and minor numbers are associated with each vty-server. Directions |
| 53 | 56 | for sysfs mounting are outside the scope of this document. |
| 54 | 57 | |
| 55 | −--------------------------------------------------------------------------- | |
| 56 | 58 | 3. Build Options: |
| 59 | +================= | |
| 57 | 60 | |
| 58 | 61 | The hvcs driver registers itself as a tty driver. The tty layer |
| 59 | 62 | dynamically allocates a block of major and minor numbers in a quantity |
| @@ -65,11 +68,11 @@ If the default number of device entries is adequate then this driver can be · 5 unmodified lines | ||
| 65 | 68 | built into the kernel. If not, the default can be over-ridden by inserting |
| 66 | 69 | the driver as a module with insmod parameters. |
| 67 | 70 | |
| 68 | −--------------------------------------------------------------------------- | |
| 69 | 71 | 3.1 Built-in: |
| 72 | +------------- | |
| 70 | 73 | |
| 71 | 74 | The following menuconfig example demonstrates selecting to build this |
| 72 | −driver into the kernel. | |
| 75 | +driver into the kernel:: | |
| 73 | 76 | |
| 74 | 77 | Device Drivers ---> |
| 75 | 78 | Character devices ---> |
| @@ -77,11 +80,11 @@ driver into the kernel. · 1 unmodified line | ||
| 77 | 80 | |
| 78 | 81 | Begin the kernel make process. |
| 79 | 82 | |
| 80 | −--------------------------------------------------------------------------- | |
| 81 | 83 | 3.2 Module: |
| 84 | +----------- | |
| 82 | 85 | |
| 83 | 86 | The following menuconfig example demonstrates selecting to build this |
| 84 | −driver as a kernel module. | |
| 87 | +driver as a kernel module:: | |
| 85 | 88 | |
| 86 | 89 | Device Drivers ---> |
| 87 | 90 | Character devices ---> |
| @@ -89,11 +92,11 @@ driver as a kernel module. · 1 unmodified line | ||
| 89 | 92 | |
| 90 | 93 | The make process will build the following kernel modules: |
| 91 | 94 | |
| 92 | − hvcs.ko | |
| 93 | − hvcserver.ko | |
| 95 | + - hvcs.ko | |
| 96 | + - hvcserver.ko | |
| 94 | 97 | |
| 95 | 98 | To insert the module with the default allocation execute the following |
| 96 | −commands in the order they appear: | |
| 99 | +commands in the order they appear:: | |
| 97 | 100 | |
| 98 | 101 | insmod hvcserver.ko |
| 99 | 102 | insmod hvcs.ko |
| @@ -103,7 +106,7 @@ be inserted first, otherwise the hvcs module will not find some of the · 3 unmodified lines | ||
| 103 | 106 | symbols it expects. |
| 104 | 107 | |
| 105 | 108 | To override the default use an insmod parameter as follows (requesting 4 |
| 106 | −tty devices as an example): | |
| 109 | +tty devices as an example):: | |
| 107 | 110 | |
| 108 | 111 | insmod hvcs.ko hvcs_parm_num_devs=4 |
| 109 | 112 | |
| @@ -115,31 +118,31 @@ source file before building. · 5 unmodified lines | ||
| 115 | 118 | NOTE: The length of time it takes to insmod the driver seems to be related |
| 116 | 119 | to the number of tty interfaces the registering driver requests. |
| 117 | 120 | |
| 118 | −In order to remove the driver module execute the following command: | |
| 121 | +In order to remove the driver module execute the following command:: | |
| 119 | 122 | |
| 120 | 123 | rmmod hvcs.ko |
| 121 | 124 | |
| 122 | 125 | The recommended method for installing hvcs as a module is to use depmod to |
| 123 | 126 | build a current modules.dep file in /lib/modules/`uname -r` and then |
| 124 | −execute: | |
| 127 | +execute:: | |
| 125 | 128 | |
| 126 | −modprobe hvcs hvcs_parm_num_devs=4 | |
| 129 | + modprobe hvcs hvcs_parm_num_devs=4 | |
| 127 | 130 | |
| 128 | 131 | The modules.dep file indicates that hvcserver.ko needs to be inserted |
| 129 | 132 | before hvcs.ko and modprobe uses this file to smartly insert the modules in |
| 130 | 133 | the proper order. |
| 131 | 134 | |
| 132 | 135 | The following modprobe command is used to remove hvcs and hvcserver in the |
| 133 | −proper order: | |
| 136 | +proper order:: | |
| 134 | 137 | |
| 135 | −modprobe -r hvcs | |
| 138 | + modprobe -r hvcs | |
| 136 | 139 | |
| 137 | −--------------------------------------------------------------------------- | |
| 138 | 140 | 4. Installation: |
| 141 | +================ | |
| 139 | 142 | |
| 140 | 143 | The tty layer creates sysfs entries which contain the major and minor |
| 141 | 144 | numbers allocated for the hvcs driver. The following snippet of "tree" |
| 142 | −output of the sysfs directory shows where these numbers are presented: | |
| 145 | +output of the sysfs directory shows where these numbers are presented:: | |
| 143 | 146 | |
| 144 | 147 | sys/ |
| 145 | 148 | |-- *other sysfs base dirs* |
| @@ -164,7 +167,7 @@ output of the sysfs directory shows where these numbers are presented: · 18 unmodified lines | ||
| 164 | 167 | |-- *other sysfs base dirs* |
| 165 | 168 | |
| 166 | 169 | For the above examples the following output is a result of cat'ing the |
| 167 | −"dev" entry in the hvcs directory: | |
| 170 | +"dev" entry in the hvcs directory:: | |
| 168 | 171 | |
| 169 | 172 | Pow5:/sys/class/tty/hvcs0/ # cat dev |
| 170 | 173 | 254:0 |
| @@ -184,7 +187,7 @@ systems running hvcs will already have the device entries created or udev · 13 unmodified lines | ||
| 184 | 187 | will do it automatically. |
| 185 | 188 | |
| 186 | 189 | Given the example output above, to manually create a /dev/hvcs* node entry |
| 187 | −mknod can be used as follows: | |
| 190 | +mknod can be used as follows:: | |
| 188 | 191 | |
| 189 | 192 | mknod /dev/hvcs0 c 254 0 |
| 190 | 193 | mknod /dev/hvcs1 c 254 1 |
| @@ -195,15 +198,15 @@ Using mknod to manually create the device entries makes these device nodes · 4 unmodified lines | ||
| 195 | 198 | persistent. Once created they will exist prior to the driver insmod. |
| 196 | 199 | |
| 197 | 200 | Attempting to connect an application to /dev/hvcs* prior to insertion of |
| 198 | −the hvcs module will result in an error message similar to the following: | |
| 201 | +the hvcs module will result in an error message similar to the following:: | |
| 199 | 202 | |
| 200 | 203 | "/dev/hvcs*: No such device". |
| 201 | 204 | |
| 202 | 205 | NOTE: Just because there is a device node present doesn't mean that there |
| 203 | 206 | is a vty-server device configured for that node. |
| 204 | 207 | |
| 205 | −--------------------------------------------------------------------------- | |
| 206 | 208 | 5. Connection |
| 209 | +============= | |
| 207 | 210 | |
| 208 | 211 | Since this driver controls devices that provide a tty interface a user can |
| 209 | 212 | interact with the device node entries using any standard tty-interactive |
| @@ -249,7 +252,7 @@ vty-server adapter is associated with which /dev/hvcs* node a special sysfs · 39 unmodified lines | ||
| 249 | 252 | attribute has been added to each vty-server sysfs entry. This entry is |
| 250 | 253 | called "index" and showing it reveals an integer that refers to the |
| 251 | 254 | /dev/hvcs* entry to use to connect to that device. For instance cating the |
| 252 | −index attribute of vty-server adapter 30000004 shows the following. | |
| 255 | +index attribute of vty-server adapter 30000004 shows the following:: | |
| 253 | 256 | |
| 254 | 257 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # cat index |
| 255 | 258 | 2 |
| @@ -262,8 +265,8 @@ system the /dev/hvcs* entry that interacts with a particular vty-server · 6 unmodified lines | ||
| 262 | 265 | adapter is not guaranteed to remain the same across system reboots. Look |
| 263 | 266 | in the Q & A section for more on this issue. |
| 264 | 267 | |
| 265 | −--------------------------------------------------------------------------- | |
| 266 | 268 | 6. Disconnection |
| 269 | +================ | |
| 267 | 270 | |
| 268 | 271 | As a security feature to prevent the delivery of stale data to an |
| 269 | 272 | unintended target the Power5 system firmware disables the fetching of data |
| @@ -305,7 +308,7 @@ connection between the vty-server and target vty ONLY if the vterm_state · 35 unmodified lines | ||
| 305 | 308 | previously read '1'. The write directive is ignored if the vterm_state |
| 306 | 309 | read '0' or if any value other than '0' was written to the vterm_state |
| 307 | 310 | attribute. The following example will show the method used for verifying |
| 308 | −the vty-server connection status and disconnecting a vty-server connection. | |
| 311 | +the vty-server connection status and disconnecting a vty-server connection:: | |
| 309 | 312 | |
| 310 | 313 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # cat vterm_state |
| 311 | 314 | 1 |
| @@ -318,12 +321,12 @@ the vty-server connection status and disconnecting a vty-server connection. · 6 unmodified lines | ||
| 318 | 321 | All vty-server connections are automatically terminated when the device is |
| 319 | 322 | hotplug removed and when the module is removed. |
| 320 | 323 | |
| 321 | −--------------------------------------------------------------------------- | |
| 322 | 324 | 7. Configuration |
| 325 | +================ | |
| 323 | 326 | |
| 324 | 327 | Each vty-server has a sysfs entry in the /sys/devices/vio directory, which |
| 325 | 328 | is symlinked in several other sysfs tree directories, notably under the |
| 326 | −hvcs driver entry, which looks like the following example: | |
| 329 | +hvcs driver entry, which looks like the following example:: | |
| 327 | 330 | |
| 328 | 331 | Pow5:/sys/bus/vio/drivers/hvcs # ls |
| 329 | 332 | . .. 30000003 30000004 rescan |
| @@ -344,7 +347,7 @@ completed or was never executed. · 14 unmodified lines | ||
| 344 | 347 | |
| 345 | 348 | Vty-server entries in this directory are a 32 bit partition unique unit |
| 346 | 349 | address that is created by firmware. An example vty-server sysfs entry |
| 347 | −looks like the following: | |
| 350 | +looks like the following:: | |
| 348 | 351 | |
| 349 | 352 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # ls |
| 350 | 353 | . current_vty devspec name partner_vtys |
| @@ -352,21 +355,21 @@ looks like the following: · 1 unmodified line | ||
| 352 | 355 | |
| 353 | 356 | Each entry is provided, by default with a "name" attribute. Reading the |
| 354 | 357 | "name" attribute will reveal the device type as shown in the following |
| 355 | −example: | |
| 358 | +example:: | |
| 356 | 359 | |
| 357 | 360 | Pow5:/sys/bus/vio/drivers/hvcs/30000003 # cat name |
| 358 | 361 | vty-server |
| 359 | 362 | |
| 360 | 363 | Each entry is also provided, by default, with a "devspec" attribute which |
| 361 | 364 | reveals the full device specification when read, as shown in the following |
| 362 | −example: | |
| 365 | +example:: | |
| 363 | 366 | |
| 364 | 367 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # cat devspec |
| 365 | 368 | /vdevice/vty-server@30000004 |
| 366 | 369 | |
| 367 | 370 | Each vty-server sysfs dir is provided with two read-only attributes that |
| 368 | 371 | provide lists of easily parsed partner vty data: "partner_vtys" and |
| 369 | −"partner_clcs". | |
| 372 | +"partner_clcs":: | |
| 370 | 373 | |
| 371 | 374 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # cat partner_vtys |
| 372 | 375 | 30000000 |
| @@ -396,7 +399,7 @@ A vty-server can only be connected to a single vty at a time. The entry, · 23 unmodified lines | ||
| 396 | 399 | read. |
| 397 | 400 | |
| 398 | 401 | The current_vty can be changed by writing a valid partner clc to the entry |
| 399 | −as in the following example: | |
| 402 | +as in the following example:: | |
| 400 | 403 | |
| 401 | 404 | Pow5:/sys/bus/vio/drivers/hvcs/30000004 # echo U5112.428.10304 |
| 402 | 405 | 8A-V4-C0 > current_vty |
| @@ -408,9 +411,9 @@ currently open connection is freed. · 5 unmodified lines | ||
| 408 | 411 | Information on the "vterm_state" attribute was covered earlier on the |
| 409 | 412 | chapter entitled "disconnection". |
| 410 | 413 | |
| 411 | −--------------------------------------------------------------------------- | |
| 412 | 414 | 8. Questions & Answers: |
| 413 | −=========================================================================== | |
| 415 | +======================= | |
| 416 | + | |
| 414 | 417 | Q: What are the security concerns involving hvcs? |
| 415 | 418 | |
| 416 | 419 | A: There are three main security concerns: |
| @@ -429,6 +432,7 @@ A: There are three main security concerns: · 12 unmodified lines | ||
| 429 | 432 | partition) will experience the previously logged in session. |
| 430 | 433 | |
| 431 | 434 | --------------------------------------------------------------------------- |
| 435 | + | |
| 432 | 436 | Q: How do I multiplex a console that I grab through hvcs so that other |
| 433 | 437 | people can see it: |
| 434 | 438 | |
| @@ -440,6 +444,7 @@ term type "screen" to others. This means that curses based programs may · 5 unmodified lines | ||
| 440 | 444 | not display properly in screen sessions. |
| 441 | 445 | |
| 442 | 446 | --------------------------------------------------------------------------- |
| 447 | + | |
| 443 | 448 | Q: Why are the colors all messed up? |
| 444 | 449 | Q: Why are the control characters acting strange or not working? |
| 445 | 450 | Q: Why is the console output all strange and unintelligible? |
| @@ -455,6 +460,7 @@ disconnect from the console. This will ensure that the next user gets · 9 unmodified lines | ||
| 455 | 460 | their own TERM type set when they login. |
| 456 | 461 | |
| 457 | 462 | --------------------------------------------------------------------------- |
| 463 | + | |
| 458 | 464 | Q: When I try to CONNECT kermit to an hvcs device I get: |
| 459 | 465 | "Sorry, can't open connection: /dev/hvcs*"What is happening? |
| 460 | 466 | |
| @@ -490,6 +496,7 @@ A: There is not a corresponding vty-server device that maps to an existing · 29 unmodified lines | ||
| 490 | 496 | /dev/hvcs* entry. |
| 491 | 497 | |
| 492 | 498 | --------------------------------------------------------------------------- |
| 499 | + | |
| 493 | 500 | Q: When I try to CONNECT kermit to an hvcs device I get: |
| 494 | 501 | "Sorry, write access to UUCP lockfile directory denied." |
| 495 | 502 | |
| @@ -497,6 +504,7 @@ A: The /dev/hvcs* entry you have specified doesn't exist where you said it · 1 unmodified line | ||
| 497 | 504 | does? Maybe you haven't inserted the module (on systems with udev). |
| 498 | 505 | |
| 499 | 506 | --------------------------------------------------------------------------- |
| 507 | + | |
| 500 | 508 | Q: If I already have one Linux partition installed can I use hvcs on said |
| 501 | 509 | partition to provide the console for the install of a second Linux |
| 502 | 510 | partition? |
| @@ -505,6 +513,7 @@ A: Yes granted that your are connected to the /dev/hvcs* device using · 2 unmodified lines | ||
| 505 | 513 | kermit or cu or some other program that doesn't provide terminal emulation. |
| 506 | 514 | |
| 507 | 515 | --------------------------------------------------------------------------- |
| 516 | + | |
| 508 | 517 | Q: Can I connect to more than one partition's console at a time using this |
| 509 | 518 | driver? |
| 510 | 519 | |
| @@ -512,6 +521,7 @@ A: Yes. Of course this means that there must be more than one vty-server · 1 unmodified line | ||
| 512 | 521 | configured for this partition and each must point to a disconnected vty. |
| 513 | 522 | |
| 514 | 523 | --------------------------------------------------------------------------- |
| 524 | + | |
| 515 | 525 | Q: Does the hvcs driver support dynamic (hotplug) addition of devices? |
| 516 | 526 | |
| 517 | 527 | A: Yes, if you have dlpar and hotplug enabled for your system and it has |
| @@ -519,6 +529,7 @@ been built into the kernel the hvcs drivers is configured to dynamically · 1 unmodified line | ||
| 519 | 529 | handle additions of new devices and removals of unused devices. |
| 520 | 530 | |
| 521 | 531 | --------------------------------------------------------------------------- |
| 532 | + | |
| 522 | 533 | Q: For some reason /dev/hvcs* doesn't map to the same vty-server adapter |
| 523 | 534 | after a reboot. What happened? |
| 524 | 535 | |
| @@ -533,6 +544,7 @@ on how to determine which vty-server goes with which /dev/hvcs* node. · 8 unmodified lines | ||
| 533 | 544 | Hint; look at the sysfs "index" attribute for the vty-server. |
| 534 | 545 | |
| 535 | 546 | --------------------------------------------------------------------------- |
| 547 | + | |
| 536 | 548 | Q: Can I use /dev/hvcs* as a conduit to another partition and use a tty |
| 537 | 549 | device on that partition as the other end of the pipe? |
| 538 | 550 | |
| @@ -554,7 +566,9 @@ read or write to /dev/hvcs*. Now you have a tty conduit between two · 15 unmodified lines | ||
| 554 | 566 | partitions. |
| 555 | 567 | |
| 556 | 568 | --------------------------------------------------------------------------- |
| 569 | + | |
| 557 | 570 | 9. Reporting Bugs: |
| 571 | +================== | |
| 558 | 572 | |
| 559 | 573 | The proper channel for reporting bugs is either through the Linux OS |
| 560 | 574 | distribution company that provided your OS or by posting issues to the |
| @@ -0,0 +1,34 @@ | ||
| 1 | +.. SPDX-License-Identifier: GPL-2.0 | |
| 2 | + | |
| 3 | +======= | |
| 4 | +powerpc | |
| 5 | +======= | |
| 6 | + | |
| 7 | +.. toctree:: | |
| 8 | + :maxdepth: 1 | |
| 9 | + | |
| 10 | + bootwrapper | |
| 11 | + cpu_families | |
| 12 | + cpu_features | |
| 13 | + cxl | |
| 14 | + cxlflash | |
| 15 | + dawr-power9 | |
| 16 | + dscr | |
| 17 | + eeh-pci-error-recovery | |
| 18 | + firmware-assisted-dump | |
| 19 | + hvcs | |
| 20 | + isa-versions | |
| 21 | + mpc52xx | |
| 22 | + pci_iov_resource_on_powernv | |
| 23 | + pmu-ebb | |
| 24 | + ptrace | |
| 25 | + qe_firmware | |
| 26 | + syscall64-abi | |
| 27 | + transactional_memory | |
| 28 | + | |
| 29 | +.. only:: subproject and html | |
| 30 | + | |
| 31 | + Indices | |
| 32 | + ======= | |
| 33 | + | |
| 34 | + * :ref:`genindex` | |
| @@ -1,13 +1,12 @@ | ||
| 1 | −:orphan: | |
| 2 | − | |
| 1 | +========================== | |
| 3 | 2 | CPU to ISA Version Mapping |
| 4 | 3 | ========================== |
| 5 | 4 | |
| 6 | 5 | Mapping of some CPU versions to relevant ISA versions. |
| 7 | 6 | |
| 8 | −========= ==================== | |
| 7 | +========= ==================================================================== | |
| 9 | 8 | CPU Architecture version |
| 10 | −========= ==================== | |
| 9 | +========= ==================================================================== | |
| 11 | 10 | Power9 Power ISA v3.0B |
| 12 | 11 | Power8 Power ISA v2.07 |
| 13 | 12 | Power7 Power ISA v2.06 |
| @@ -24,7 +23,7 @@ PPC970 - PowerPC User Instruction Set Architecture Book I v2.01 · 10 unmodified lines | ||
| 24 | 23 | - PowerPC Virtual Environment Architecture Book II v2.01 |
| 25 | 24 | - PowerPC Operating Environment Architecture Book III v2.01 |
| 26 | 25 | - Plus Altivec/VMX ~= 2.03 |
| 27 | −========= ==================== | |
| 26 | +========= ==================================================================== | |
| 28 | 27 | |
| 29 | 28 | |
| 30 | 29 | Key Features |
| @@ -60,9 +59,9 @@ Power5 No · 29 unmodified lines | ||
| 60 | 59 | PPC970 No |
| 61 | 60 | ========== ==== |
| 62 | 61 | |
| 63 | −========== ==================== | |
| 62 | +========== ==================================== | |
| 64 | 63 | CPU Transactional Memory |
| 65 | −========== ==================== | |
| 64 | +========== ==================================== | |
| 66 | 65 | Power9 Yes (* see transactional_memory.txt) |
| 67 | 66 | Power8 Yes |
| 68 | 67 | Power7 No |
| @@ -73,4 +72,4 @@ Power5++ No · 4 unmodified lines | ||
| 73 | 72 | Power5+ No |
| 74 | 73 | Power5 No |
| 75 | 74 | PPC970 No |
| 76 | −========== ==================== | |
| 75 | +========== ==================================== | |
| @@ -1,11 +1,13 @@ | ||
| 1 | +============================= | |
| 1 | 2 | Linux 2.6.x on MPC52xx family |
| 2 | −----------------------------- | |
| 3 | +============================= | |
| 3 | 4 | |
| 4 | 5 | For the latest info, go to http://www.246tNt.com/mpc52xx/ |
| 5 | 6 | |
| 6 | 7 | To compile/use : |
| 7 | 8 | |
| 8 | − - U-Boot: | |
| 9 | + - U-Boot:: | |
| 10 | + | |
| 9 | 11 | # <edit Makefile to set ARCH=ppc & CROSS_COMPILE=... ( also EXTRAVERSION |
| 10 | 12 | if you wish to ). |
| 11 | 13 | # make lite5200_defconfig |
| @@ -16,7 +18,8 @@ To compile/use : · 4 unmodified lines | ||
| 16 | 18 | => tftpboot 400000 pRamdisk |
| 17 | 19 | => bootm 200000 400000 |
| 18 | 20 | |
| 19 | − - DBug: | |
| 21 | + - DBug:: | |
| 22 | + | |
| 20 | 23 | # <edit Makefile to set ARCH=ppc & CROSS_COMPILE=... ( also EXTRAVERSION |
| 21 | 24 | if you wish to ). |
| 22 | 25 | # make lite5200_defconfig |
| @@ -28,7 +31,8 @@ To compile/use : · 5 unmodified lines | ||
| 28 | 31 | DBug> dn -i zImage.initrd.lite5200 |
| 29 | 32 | |
| 30 | 33 | |
| 31 | −Some remarks : | |
| 34 | +Some remarks: | |
| 35 | + | |
| 32 | 36 | - The port is named mpc52xxx, and config options are PPC_MPC52xx. The MGT5100 |
| 33 | 37 | is not supported, and I'm not sure anyone is interesting in working on it |
| 34 | 38 | so. I didn't took 5xxx because there's apparently a lot of 5xxx that have |
| @@ -1,6 +1,13 @@ | ||
| 1 | +=================================================== | |
| 2 | +PCI Express I/O Virtualization Resource on Powerenv | |
| 3 | +=================================================== | |
| 4 | + | |
| 1 | 5 | Wei Yang <weiyang@linux.vnet.ibm.com> |
| 6 | + | |
| 2 | 7 | Benjamin Herrenschmidt <benh@au1.ibm.com> |
| 8 | + | |
| 3 | 9 | Bjorn Helgaas <bhelgaas@google.com> |
| 10 | + | |
| 4 | 11 | 26 Aug 2014 |
| 5 | 12 | |
| 6 | 13 | This document describes the requirement from hardware for PCI MMIO resource |
| @@ -10,6 +17,7 @@ Endpoints and the implementation on P8 (IODA2). The next two sections talks · 3 unmodified lines | ||
| 10 | 17 | about considerations on enabling SRIOV on IODA2. |
| 11 | 18 | |
| 12 | 19 | 1. Introduction to Partitionable Endpoints |
| 20 | +========================================== | |
| 13 | 21 | |
| 14 | 22 | A Partitionable Endpoint (PE) is a way to group the various resources |
| 15 | 23 | associated with a device or a set of devices to provide isolation between |
| @@ -35,6 +43,7 @@ is a completely separate HW entity that replicates the entire logic, so has · 19 unmodified lines | ||
| 35 | 43 | its own set of PEs, etc. |
| 36 | 44 | |
| 37 | 45 | 2. Implementation of Partitionable Endpoints on P8 (IODA2) |
| 46 | +========================================================== | |
| 38 | 47 | |
| 39 | 48 | P8 supports up to 256 Partitionable Endpoints per PHB. |
| 40 | 49 | |
| @@ -149,6 +158,7 @@ P8 supports up to 256 Partitionable Endpoints per PHB. · 108 unmodified lines | ||
| 149 | 158 | sense, but we haven't done it yet. |
| 150 | 159 | |
| 151 | 160 | 3. Considerations for SR-IOV on PowerKVM |
| 161 | +======================================== | |
| 152 | 162 | |
| 153 | 163 | * SR-IOV Background |
| 154 | 164 | |
| @@ -224,7 +234,7 @@ P8 supports up to 256 Partitionable Endpoints per PHB. · 69 unmodified lines | ||
| 224 | 234 | IODA supports 256 PEs, so segmented windows contain 256 segments, so if |
| 225 | 235 | total_VFs is less than 256, we have the situation in Figure 1.0, where |
| 226 | 236 | segments [total_VFs, 255] of the M64 window may map to some MMIO range on |
| 227 | − other devices: | |
| 237 | + other devices:: | |
| 228 | 238 | |
| 229 | 239 | 0 1 total_VFs - 1 |
| 230 | 240 | +------+------+- -+------+------+ |
| @@ -243,7 +253,7 @@ P8 supports up to 256 Partitionable Endpoints per PHB. · 12 unmodified lines | ||
| 243 | 253 | Figure 1.0 Direct map VF(n) BAR space |
| 244 | 254 | |
| 245 | 255 | Our current solution is to allocate 256 segments even if the VF(n) BAR |
| 246 | − space doesn't need that much, as shown in Figure 1.1: | |
| 256 | + space doesn't need that much, as shown in Figure 1.1:: | |
| 247 | 257 | |
| 248 | 258 | 0 1 total_VFs - 1 255 |
| 249 | 259 | +------+------+- -+------+------+- -+------+------+ |
| @@ -269,6 +279,7 @@ P8 supports up to 256 Partitionable Endpoints per PHB. · 19 unmodified lines | ||
| 269 | 279 | responds to segments [total_VFs, 255]. |
| 270 | 280 | |
| 271 | 281 | 4. Implications for the Generic PCI Code |
| 282 | +======================================== | |
| 272 | 283 | |
| 273 | 284 | The PCIe SR-IOV spec requires that the base of the VF(n) BAR space be |
| 274 | 285 | aligned to the size of an individual VF BAR. |
| @@ -1,3 +1,4 @@ | ||
| 1 | +======================== | |
| 1 | 2 | PMU Event Based Branches |
| 2 | 3 | ======================== |
| 3 | 4 | |
| @@ -0,0 +1,156 @@ | ||
| 1 | +====== | |
| 2 | +Ptrace | |
| 3 | +====== | |
| 4 | + | |
| 5 | +GDB intends to support the following hardware debug features of BookE | |
| 6 | +processors: | |
| 7 | + | |
| 8 | +4 hardware breakpoints (IAC) | |
| 9 | +2 hardware watchpoints (read, write and read-write) (DAC) | |
| 10 | +2 value conditions for the hardware watchpoints (DVC) | |
| 11 | + | |
| 12 | +For that, we need to extend ptrace so that GDB can query and set these | |
| 13 | +resources. Since we're extending, we're trying to create an interface | |
| 14 | +that's extendable and that covers both BookE and server processors, so | |
| 15 | +that GDB doesn't need to special-case each of them. We added the | |
| 16 | +following 3 new ptrace requests. | |
| 17 | + | |
| 18 | +1. PTRACE_PPC_GETHWDEBUGINFO | |
| 19 | +============================ | |
| 20 | + | |
| 21 | +Query for GDB to discover the hardware debug features. The main info to | |
| 22 | +be returned here is the minimum alignment for the hardware watchpoints. | |
| 23 | +BookE processors don't have restrictions here, but server processors have | |
| 24 | +an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid | |
| 25 | +adding special cases to GDB based on what it sees in AUXV. | |
| 26 | + | |
| 27 | +Since we're at it, we added other useful info that the kernel can return to | |
| 28 | +GDB: this query will return the number of hardware breakpoints, hardware | |
| 29 | +watchpoints and whether it supports a range of addresses and a condition. | |
| 30 | +The query will fill the following structure provided by the requesting process:: | |
| 31 | + | |
| 32 | + struct ppc_debug_info { | |
| 33 | + unit32_t version; | |
| 34 | + unit32_t num_instruction_bps; | |
| 35 | + unit32_t num_data_bps; | |
| 36 | + unit32_t num_condition_regs; | |
| 37 | + unit32_t data_bp_alignment; | |
| 38 | + unit32_t sizeof_condition; /* size of the DVC register */ | |
| 39 | + uint64_t features; /* bitmask of the individual flags */ | |
| 40 | + }; | |
| 41 | + | |
| 42 | +features will have bits indicating whether there is support for:: | |
| 43 | + | |
| 44 | + #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1 | |
| 45 | + #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2 | |
| 46 | + #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4 | |
| 47 | + #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8 | |
| 48 | + #define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10 | |
| 49 | + | |
| 50 | +2. PTRACE_SETHWDEBUG | |
| 51 | + | |
| 52 | +Sets a hardware breakpoint or watchpoint, according to the provided structure:: | |
| 53 | + | |
| 54 | + struct ppc_hw_breakpoint { | |
| 55 | + uint32_t version; | |
| 56 | + #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1 | |
| 57 | + #define PPC_BREAKPOINT_TRIGGER_READ 0x2 | |
| 58 | + #define PPC_BREAKPOINT_TRIGGER_WRITE 0x4 | |
| 59 | + uint32_t trigger_type; /* only some combinations allowed */ | |
| 60 | + #define PPC_BREAKPOINT_MODE_EXACT 0x0 | |
| 61 | + #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1 | |
| 62 | + #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2 | |
| 63 | + #define PPC_BREAKPOINT_MODE_MASK 0x3 | |
| 64 | + uint32_t addr_mode; /* address match mode */ | |
| 65 | + | |
| 66 | + #define PPC_BREAKPOINT_CONDITION_MODE 0x3 | |
| 67 | + #define PPC_BREAKPOINT_CONDITION_NONE 0x0 | |
| 68 | + #define PPC_BREAKPOINT_CONDITION_AND 0x1 | |
| 69 | + #define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */ | |
| 70 | + #define PPC_BREAKPOINT_CONDITION_OR 0x2 | |
| 71 | + #define PPC_BREAKPOINT_CONDITION_AND_OR 0x3 | |
| 72 | + #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */ | |
| 73 | + #define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16)) | |
| 74 | + uint32_t condition_mode; /* break/watchpoint condition flags */ | |
| 75 | + | |
| 76 | + uint64_t addr; | |
| 77 | + uint64_t addr2; | |
| 78 | + uint64_t condition_value; | |
| 79 | + }; | |
| 80 | + | |
| 81 | +A request specifies one event, not necessarily just one register to be set. | |
| 82 | +For instance, if the request is for a watchpoint with a condition, both the | |
| 83 | +DAC and DVC registers will be set in the same request. | |
| 84 | + | |
| 85 | +With this GDB can ask for all kinds of hardware breakpoints and watchpoints | |
| 86 | +that the BookE supports. COMEFROM breakpoints available in server processors | |
| 87 | +are not contemplated, but that is out of the scope of this work. | |
| 88 | + | |
| 89 | +ptrace will return an integer (handle) uniquely identifying the breakpoint or | |
| 90 | +watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG | |
| 91 | +request to ask for its removal. Return -ENOSPC if the requested breakpoint | |
| 92 | +can't be allocated on the registers. | |
| 93 | + | |
| 94 | +Some examples of using the structure to: | |
| 95 | + | |
| 96 | +- set a breakpoint in the first breakpoint register:: | |
| 97 | + | |
| 98 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 99 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 100 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 101 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 102 | + p.addr = (uint64_t) address; | |
| 103 | + p.addr2 = 0; | |
| 104 | + p.condition_value = 0; | |
| 105 | + | |
| 106 | +- set a watchpoint which triggers on reads in the second watchpoint register:: | |
| 107 | + | |
| 108 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 109 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 110 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 111 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 112 | + p.addr = (uint64_t) address; | |
| 113 | + p.addr2 = 0; | |
| 114 | + p.condition_value = 0; | |
| 115 | + | |
| 116 | +- set a watchpoint which triggers only with a specific value:: | |
| 117 | + | |
| 118 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 119 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 120 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 121 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL; | |
| 122 | + p.addr = (uint64_t) address; | |
| 123 | + p.addr2 = 0; | |
| 124 | + p.condition_value = (uint64_t) condition; | |
| 125 | + | |
| 126 | +- set a ranged hardware breakpoint:: | |
| 127 | + | |
| 128 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 129 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 130 | + p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; | |
| 131 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 132 | + p.addr = (uint64_t) begin_range; | |
| 133 | + p.addr2 = (uint64_t) end_range; | |
| 134 | + p.condition_value = 0; | |
| 135 | + | |
| 136 | +- set a watchpoint in server processors (BookS):: | |
| 137 | + | |
| 138 | + p.version = 1; | |
| 139 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_RW; | |
| 140 | + p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; | |
| 141 | + or | |
| 142 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 143 | + | |
| 144 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 145 | + p.addr = (uint64_t) begin_range; | |
| 146 | + /* For PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE addr2 needs to be specified, where | |
| 147 | + * addr2 - addr <= 8 Bytes. | |
| 148 | + */ | |
| 149 | + p.addr2 = (uint64_t) end_range; | |
| 150 | + p.condition_value = 0; | |
| 151 | + | |
| 152 | +3. PTRACE_DELHWDEBUG | |
| 153 | + | |
| 154 | +Takes an integer which identifies an existing breakpoint or watchpoint | |
| 155 | +(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the | |
| 156 | +corresponding breakpoint or watchpoint.. | |
| @@ -1,151 +0,0 @@ | ||
| 1 | −GDB intends to support the following hardware debug features of BookE | |
| 2 | −processors: | |
| 3 | − | |
| 4 | −4 hardware breakpoints (IAC) | |
| 5 | −2 hardware watchpoints (read, write and read-write) (DAC) | |
| 6 | −2 value conditions for the hardware watchpoints (DVC) | |
| 7 | − | |
| 8 | −For that, we need to extend ptrace so that GDB can query and set these | |
| 9 | −resources. Since we're extending, we're trying to create an interface | |
| 10 | −that's extendable and that covers both BookE and server processors, so | |
| 11 | −that GDB doesn't need to special-case each of them. We added the | |
| 12 | −following 3 new ptrace requests. | |
| 13 | − | |
| 14 | −1. PTRACE_PPC_GETHWDEBUGINFO | |
| 15 | − | |
| 16 | −Query for GDB to discover the hardware debug features. The main info to | |
| 17 | −be returned here is the minimum alignment for the hardware watchpoints. | |
| 18 | −BookE processors don't have restrictions here, but server processors have | |
| 19 | −an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid | |
| 20 | −adding special cases to GDB based on what it sees in AUXV. | |
| 21 | − | |
| 22 | −Since we're at it, we added other useful info that the kernel can return to | |
| 23 | −GDB: this query will return the number of hardware breakpoints, hardware | |
| 24 | −watchpoints and whether it supports a range of addresses and a condition. | |
| 25 | −The query will fill the following structure provided by the requesting process: | |
| 26 | − | |
| 27 | −struct ppc_debug_info { | |
| 28 | − unit32_t version; | |
| 29 | − unit32_t num_instruction_bps; | |
| 30 | − unit32_t num_data_bps; | |
| 31 | − unit32_t num_condition_regs; | |
| 32 | − unit32_t data_bp_alignment; | |
| 33 | − unit32_t sizeof_condition; /* size of the DVC register */ | |
| 34 | − uint64_t features; /* bitmask of the individual flags */ | |
| 35 | −}; | |
| 36 | − | |
| 37 | −features will have bits indicating whether there is support for: | |
| 38 | − | |
| 39 | −#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1 | |
| 40 | −#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2 | |
| 41 | −#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4 | |
| 42 | −#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8 | |
| 43 | −#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10 | |
| 44 | − | |
| 45 | −2. PTRACE_SETHWDEBUG | |
| 46 | − | |
| 47 | −Sets a hardware breakpoint or watchpoint, according to the provided structure: | |
| 48 | − | |
| 49 | −struct ppc_hw_breakpoint { | |
| 50 | − uint32_t version; | |
| 51 | −#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1 | |
| 52 | −#define PPC_BREAKPOINT_TRIGGER_READ 0x2 | |
| 53 | −#define PPC_BREAKPOINT_TRIGGER_WRITE 0x4 | |
| 54 | − uint32_t trigger_type; /* only some combinations allowed */ | |
| 55 | −#define PPC_BREAKPOINT_MODE_EXACT 0x0 | |
| 56 | −#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1 | |
| 57 | −#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2 | |
| 58 | −#define PPC_BREAKPOINT_MODE_MASK 0x3 | |
| 59 | − uint32_t addr_mode; /* address match mode */ | |
| 60 | − | |
| 61 | −#define PPC_BREAKPOINT_CONDITION_MODE 0x3 | |
| 62 | −#define PPC_BREAKPOINT_CONDITION_NONE 0x0 | |
| 63 | −#define PPC_BREAKPOINT_CONDITION_AND 0x1 | |
| 64 | −#define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */ | |
| 65 | −#define PPC_BREAKPOINT_CONDITION_OR 0x2 | |
| 66 | −#define PPC_BREAKPOINT_CONDITION_AND_OR 0x3 | |
| 67 | −#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */ | |
| 68 | −#define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16)) | |
| 69 | − uint32_t condition_mode; /* break/watchpoint condition flags */ | |
| 70 | − | |
| 71 | − uint64_t addr; | |
| 72 | − uint64_t addr2; | |
| 73 | − uint64_t condition_value; | |
| 74 | −}; | |
| 75 | − | |
| 76 | −A request specifies one event, not necessarily just one register to be set. | |
| 77 | −For instance, if the request is for a watchpoint with a condition, both the | |
| 78 | −DAC and DVC registers will be set in the same request. | |
| 79 | − | |
| 80 | −With this GDB can ask for all kinds of hardware breakpoints and watchpoints | |
| 81 | −that the BookE supports. COMEFROM breakpoints available in server processors | |
| 82 | −are not contemplated, but that is out of the scope of this work. | |
| 83 | − | |
| 84 | −ptrace will return an integer (handle) uniquely identifying the breakpoint or | |
| 85 | −watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG | |
| 86 | −request to ask for its removal. Return -ENOSPC if the requested breakpoint | |
| 87 | −can't be allocated on the registers. | |
| 88 | − | |
| 89 | −Some examples of using the structure to: | |
| 90 | − | |
| 91 | −- set a breakpoint in the first breakpoint register | |
| 92 | − | |
| 93 | − p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 94 | − p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 95 | − p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 96 | − p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 97 | − p.addr = (uint64_t) address; | |
| 98 | − p.addr2 = 0; | |
| 99 | − p.condition_value = 0; | |
| 100 | − | |
| 101 | −- set a watchpoint which triggers on reads in the second watchpoint register | |
| 102 | − | |
| 103 | − p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 104 | − p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 105 | − p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 106 | − p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 107 | − p.addr = (uint64_t) address; | |
| 108 | − p.addr2 = 0; | |
| 109 | − p.condition_value = 0; | |
| 110 | − | |
| 111 | −- set a watchpoint which triggers only with a specific value | |
| 112 | − | |
| 113 | − p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 114 | − p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 115 | − p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 116 | − p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL; | |
| 117 | − p.addr = (uint64_t) address; | |
| 118 | − p.addr2 = 0; | |
| 119 | − p.condition_value = (uint64_t) condition; | |
| 120 | − | |
| 121 | −- set a ranged hardware breakpoint | |
| 122 | − | |
| 123 | − p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 124 | − p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 125 | − p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; | |
| 126 | − p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 127 | − p.addr = (uint64_t) begin_range; | |
| 128 | − p.addr2 = (uint64_t) end_range; | |
| 129 | − p.condition_value = 0; | |
| 130 | − | |
| 131 | −- set a watchpoint in server processors (BookS) | |
| 132 | − | |
| 133 | − p.version = 1; | |
| 134 | − p.trigger_type = PPC_BREAKPOINT_TRIGGER_RW; | |
| 135 | − p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; | |
| 136 | − or | |
| 137 | − p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 138 | − | |
| 139 | − p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 140 | − p.addr = (uint64_t) begin_range; | |
| 141 | − /* For PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE addr2 needs to be specified, where | |
| 142 | − * addr2 - addr <= 8 Bytes. | |
| 143 | − */ | |
| 144 | − p.addr2 = (uint64_t) end_range; | |
| 145 | − p.condition_value = 0; | |
| 146 | − | |
| 147 | −3. PTRACE_DELHWDEBUG | |
| 148 | − | |
| 149 | −Takes an integer which identifies an existing breakpoint or watchpoint | |
| 150 | −(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the | |
| 151 | −corresponding breakpoint or watchpoint.. | |
| @@ -1,23 +1,23 @@ | ||
| 1 | − Freescale QUICC Engine Firmware Uploading | |
| 2 | − ----------------------------------------- | |
| 1 | +========================================= | |
| 2 | +Freescale QUICC Engine Firmware Uploading | |
| 3 | +========================================= | |
| 3 | 4 | |
| 4 | 5 | (c) 2007 Timur Tabi <timur at freescale.com>, |
| 5 | 6 | Freescale Semiconductor |
| 6 | 7 | |
| 7 | −Table of Contents | |
| 8 | −================= | |
| 8 | +.. Table of Contents | |
| 9 | 9 | |
| 10 | − I - Software License for Firmware | |
| 10 | + I - Software License for Firmware | |
| 11 | 11 | |
| 12 | − II - Microcode Availability | |
| 12 | + II - Microcode Availability | |
| 13 | 13 | |
| 14 | − III - Description and Terminology | |
| 14 | + III - Description and Terminology | |
| 15 | 15 | |
| 16 | − IV - Microcode Programming Details | |
| 16 | + IV - Microcode Programming Details | |
| 17 | 17 | |
| 18 | − V - Firmware Structure Layout | |
| 18 | + V - Firmware Structure Layout | |
| 19 | 19 | |
| 20 | − VI - Sample Code for Creating Firmware Files | |
| 20 | + VI - Sample Code for Creating Firmware Files | |
| 21 | 21 | |
| 22 | 22 | Revision Information |
| 23 | 23 | ==================== |
| @@ -39,7 +39,7 @@ http://opensource.freescale.com. For other firmware files, please contact · 15 unmodified lines | ||
| 39 | 39 | your Freescale representative or your operating system vendor. |
| 40 | 40 | |
| 41 | 41 | III - Description and Terminology |
| 42 | −================================ | |
| 42 | +================================= | |
| 43 | 43 | |
| 44 | 44 | In this document, the term 'microcode' refers to the sequence of 32-bit |
| 45 | 45 | integers that compose the actual QE microcode. |
| @@ -89,7 +89,7 @@ being fixed in the RAM package utilizing they should be activated. This data · 43 unmodified lines | ||
| 89 | 89 | structure signals the microcode which of these virtual traps is active. |
| 90 | 90 | |
| 91 | 91 | This structure contains 6 words that the application should copy to some |
| 92 | −specific been defined. This table describes the structure. | |
| 92 | +specific been defined. This table describes the structure:: | |
| 93 | 93 | |
| 94 | 94 | --------------------------------------------------------------- |
| 95 | 95 | | Offset in | | Destination Offset | Size of | |
| @@ -119,7 +119,7 @@ Extended Modes · 23 unmodified lines | ||
| 119 | 119 | This is a double word bit array (64 bits) that defines special functionality |
| 120 | 120 | which has an impact on the software drivers. Each bit has its own impact |
| 121 | 121 | and has special instructions for the s/w associated with it. This structure is |
| 122 | −described in this table: | |
| 122 | +described in this table:: | |
| 123 | 123 | |
| 124 | 124 | ----------------------------------------------------------------------- |
| 125 | 125 | | Bit # | Name | Description | |
| @@ -220,7 +220,8 @@ The 'model' field is a 16-bit number that matches the actual SOC. The · 94 unmodified lines | ||
| 220 | 220 | 'major' and 'minor' fields are the major and minor revision numbers, |
| 221 | 221 | respectively, of the SOC. |
| 222 | 222 | |
| 223 | −For example, to match the 8323, revision 1.0: | |
| 223 | +For example, to match the 8323, revision 1.0:: | |
| 224 | + | |
| 224 | 225 | soc.model = 8323 |
| 225 | 226 | soc.major = 1 |
| 226 | 227 | soc.minor = 0 |
| @@ -273,10 +274,10 @@ library and available to any driver that calles qe_get_firmware_info(). · 46 unmodified lines | ||
| 273 | 274 | 'reserved'. |
| 274 | 275 | |
| 275 | 276 | After the last microcode is a 32-bit CRC. It can be calculated using |
| 276 | −this algorithm: | |
| 277 | +this algorithm:: | |
| 277 | 278 | |
| 278 | −u32 crc32(const u8 *p, unsigned int len) | |
| 279 | −{ | |
| 279 | + u32 crc32(const u8 *p, unsigned int len) | |
| 280 | + { | |
| 280 | 281 | unsigned int i; |
| 281 | 282 | u32 crc = 0; |
| 282 | 283 | |
| @@ -286,7 +287,7 @@ u32 crc32(const u8 *p, unsigned int len) · 3 unmodified lines | ||
| 286 | 287 | crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0); |
| 287 | 288 | } |
| 288 | 289 | return crc; |
| 289 | −} | |
| 290 | + } | |
| 290 | 291 | |
| 291 | 292 | VI - Sample Code for Creating Firmware Files |
| 292 | 293 | ============================================ |
| @@ -5,12 +5,12 @@ Power Architecture 64-bit Linux system call ABI · 4 unmodified lines | ||
| 5 | 5 | syscall |
| 6 | 6 | ======= |
| 7 | 7 | |
| 8 | −syscall calling sequence[*] matches the Power Architecture 64-bit ELF ABI | |
| 8 | +syscall calling sequence\ [1]_ matches the Power Architecture 64-bit ELF ABI | |
| 9 | 9 | specification C function calling sequence, including register preservation |
| 10 | 10 | rules, with the following differences. |
| 11 | 11 | |
| 12 | −[*] Some syscalls (typically low-level management functions) may have | |
| 13 | − different calling sequences (e.g., rt_sigreturn). | |
| 12 | +.. [1] Some syscalls (typically low-level management functions) may have | |
| 13 | + different calling sequences (e.g., rt_sigreturn). | |
| 14 | 14 | |
| 15 | 15 | Parameters and return value |
| 16 | 16 | --------------------------- |
| @@ -33,12 +33,14 @@ Register preservation rules · 16 unmodified lines | ||
| 33 | 33 | Register preservation rules match the ELF ABI calling sequence with the |
| 34 | 34 | following differences: |
| 35 | 35 | |
| 36 | −r0: Volatile. (System call number.) | |
| 37 | −r3: Volatile. (Parameter 1, and return value.) | |
| 38 | −r4-r8: Volatile. (Parameters 2-6.) | |
| 39 | −cr0: Volatile (cr0.SO is the return error condition) | |
| 40 | −cr1, cr5-7: Nonvolatile. | |
| 41 | −lr: Nonvolatile. | |
| 36 | +=========== ============= ======================================== | |
| 37 | +r0 Volatile (System call number.) | |
| 38 | +r3 Volatile (Parameter 1, and return value.) | |
| 39 | +r4-r8 Volatile (Parameters 2-6.) | |
| 40 | +cr0 Volatile (cr0.SO is the return error condition) | |
| 41 | +cr1, cr5-7 Nonvolatile | |
| 42 | +lr Nonvolatile | |
| 43 | +=========== ============= ======================================== | |
| 42 | 44 | |
| 43 | 45 | All floating point and vector data registers as well as control and status |
| 44 | 46 | registers are nonvolatile. |
| @@ -90,9 +92,12 @@ The vsyscall may or may not use the caller's stack frame save areas. · 45 unmodified lines | ||
| 90 | 92 | |
| 91 | 93 | Register preservation rules |
| 92 | 94 | --------------------------- |
| 93 | −r0: Volatile. | |
| 94 | −cr1, cr5-7: Volatile. | |
| 95 | −lr: Volatile. | |
| 95 | + | |
| 96 | +=========== ======== | |
| 97 | +r0 Volatile | |
| 98 | +cr1, cr5-7 Volatile | |
| 99 | +lr Volatile | |
| 100 | +=========== ======== | |
| 96 | 101 | |
| 97 | 102 | Invocation |
| 98 | 103 | ---------- |
| @@ -1,3 +1,4 @@ | ||
| 1 | +============================ | |
| 1 | 2 | Transactional Memory support |
| 2 | 3 | ============================ |
| 3 | 4 | |
| @@ -17,29 +18,29 @@ instructions are presented to delimit transactions; transactions are · 13 unmodified lines | ||
| 17 | 18 | guaranteed to either complete atomically or roll back and undo any partial |
| 18 | 19 | changes. |
| 19 | 20 | |
| 20 | −A simple transaction looks like this: | |
| 21 | +A simple transaction looks like this:: | |
| 21 | 22 | |
| 22 | −begin_move_money: | |
| 23 | − tbegin | |
| 24 | − beq abort_handler | |
| 23 | + begin_move_money: | |
| 24 | + tbegin | |
| 25 | + beq abort_handler | |
| 25 | 26 | |
| 26 | − ld r4, SAVINGS_ACCT(r3) | |
| 27 | − ld r5, CURRENT_ACCT(r3) | |
| 28 | − subi r5, r5, 1 | |
| 29 | − addi r4, r4, 1 | |
| 30 | − std r4, SAVINGS_ACCT(r3) | |
| 31 | − std r5, CURRENT_ACCT(r3) | |
| 27 | + ld r4, SAVINGS_ACCT(r3) | |
| 28 | + ld r5, CURRENT_ACCT(r3) | |
| 29 | + subi r5, r5, 1 | |
| 30 | + addi r4, r4, 1 | |
| 31 | + std r4, SAVINGS_ACCT(r3) | |
| 32 | + std r5, CURRENT_ACCT(r3) | |
| 32 | 33 | |
| 33 | − tend | |
| 34 | + tend | |
| 34 | 35 | |
| 35 | − b continue | |
| 36 | + b continue | |
| 36 | 37 | |
| 37 | −abort_handler: | |
| 38 | − ... test for odd failures ... | |
| 38 | + abort_handler: | |
| 39 | + ... test for odd failures ... | |
| 39 | 40 | |
| 40 | − /* Retry the transaction if it failed because it conflicted with | |
| 41 | − * someone else: */ | |
| 42 | − b begin_move_money | |
| 41 | + /* Retry the transaction if it failed because it conflicted with | |
| 42 | + * someone else: */ | |
| 43 | + b begin_move_money | |
| 43 | 44 | |
| 44 | 45 | |
| 45 | 46 | The 'tbegin' instruction denotes the start point, and 'tend' the end point. |
| @@ -123,7 +124,7 @@ Transaction-aware signal handlers can read the transactional register state · 77 unmodified lines | ||
| 123 | 124 | from the second ucontext. This will be necessary for crash handlers to |
| 124 | 125 | determine, for example, the address of the instruction causing the SIGSEGV. |
| 125 | 126 | |
| 126 | −Example signal handler: | |
| 127 | +Example signal handler:: | |
| 127 | 128 | |
| 128 | 129 | void crash_handler(int sig, siginfo_t *si, void *uc) |
| 129 | 130 | { |
| @@ -133,9 +134,9 @@ Example signal handler: · 3 unmodified lines | ||
| 133 | 134 | if (ucp_link) { |
| 134 | 135 | u64 msr = ucp->uc_mcontext.regs->msr; |
| 135 | 136 | /* May have transactional ucontext! */ |
| 136 | −#ifndef __powerpc64__ | |
| 137 | + #ifndef __powerpc64__ | |
| 137 | 138 | msr |= ((u64)transactional_ucp->uc_mcontext.regs->msr) << 32; |
| 138 | −#endif | |
| 139 | + #endif | |
| 139 | 140 | if (MSR_TM_ACTIVE(msr)) { |
| 140 | 141 | /* Yes, we crashed during a transaction. Oops. */ |
| 141 | 142 | fprintf(stderr, "Transaction to be restarted at 0x%llx, but " |
| @@ -176,6 +177,7 @@ Failure cause codes used by kernel · 34 unmodified lines | ||
| 176 | 177 | These are defined in <asm/reg.h>, and distinguish different reasons why the |
| 177 | 178 | kernel aborted a transaction: |
| 178 | 179 | |
| 180 | + ====================== ================================ | |
| 179 | 181 | TM_CAUSE_RESCHED Thread was rescheduled. |
| 180 | 182 | TM_CAUSE_TLBI Software TLB invalid. |
| 181 | 183 | TM_CAUSE_FAC_UNAV FP/VEC/VSX unavailable trap. |
| @@ -184,6 +186,7 @@ kernel aborted a transaction: · 2 unmodified lines | ||
| 184 | 186 | TM_CAUSE_MISC Currently unused. |
| 185 | 187 | TM_CAUSE_ALIGNMENT Alignment fault. |
| 186 | 188 | TM_CAUSE_EMULATE Emulation that touched memory. |
| 189 | + ====================== ================================ | |
| 187 | 190 | |
| 188 | 191 | These can be checked by the user program's abort handler as TEXASR[0:7]. If |
| 189 | 192 | bit 7 is set, it indicates that the error is consider persistent. For example |
| @@ -203,7 +206,7 @@ POWER9 · 13 unmodified lines | ||
| 203 | 206 | ====== |
| 204 | 207 | |
| 205 | 208 | TM on POWER9 has issues with storing the complete register state. This |
| 206 | −is described in this commit: | |
| 209 | +is described in this commit:: | |
| 207 | 210 | |
| 208 | 211 | commit 4bb3c7a0208fc13ca70598efd109901a7cd45ae7 |
| 209 | 212 | Author: Paul Mackerras <paulus@ozlabs.org> |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = 'Linux Kernel Development Documentation' | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'process.tex', 'Linux Kernel Development Documentation', | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -119,3 +119,17 @@ array may exceed the remaining memory in the stack segment. This could · 118 unmodified lines | ||
| 119 | 119 | lead to a crash, possible overwriting sensitive contents at the end of the |
| 120 | 120 | stack (when built without `CONFIG_THREAD_INFO_IN_TASK=y`), or overwriting |
| 121 | 121 | memory adjacent to the stack (when built without `CONFIG_VMAP_STACK=y`) |
| 122 | + | |
| 123 | +Implicit switch case fall-through | |
| 124 | +--------------------------------- | |
| 125 | +The C language allows switch cases to "fall through" when | |
| 126 | +a "break" statement is missing at the end of a case. This, | |
| 127 | +however, introduces ambiguity in the code, as it's not always | |
| 128 | +clear if the missing break is intentional or a bug. As there | |
| 129 | +have been a long list of flaws `due to missing "break" statements | |
| 130 | +<https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow | |
| 131 | +"implicit fall-through". In order to identify an intentional fall-through | |
| 132 | +case, we have adopted the marking used by static analyzers: a comment | |
| 133 | +saying `/* Fall through */`. Once the C++17 `__attribute__((fallthrough))` | |
| 134 | +is more widely handled by C compilers, static analyzers, and IDEs, we can | |
| 135 | +switch to using that instead. | |
| @@ -0,0 +1,279 @@ | ||
| 1 | +Embargoed hardware issues | |
| 2 | +========================= | |
| 3 | + | |
| 4 | +Scope | |
| 5 | +----- | |
| 6 | + | |
| 7 | +Hardware issues which result in security problems are a different category | |
| 8 | +of security bugs than pure software bugs which only affect the Linux | |
| 9 | +kernel. | |
| 10 | + | |
| 11 | +Hardware issues like Meltdown, Spectre, L1TF etc. must be treated | |
| 12 | +differently because they usually affect all Operating Systems ("OS") and | |
| 13 | +therefore need coordination across different OS vendors, distributions, | |
| 14 | +hardware vendors and other parties. For some of the issues, software | |
| 15 | +mitigations can depend on microcode or firmware updates, which need further | |
| 16 | +coordination. | |
| 17 | + | |
| 18 | +.. _Contact: | |
| 19 | + | |
| 20 | +Contact | |
| 21 | +------- | |
| 22 | + | |
| 23 | +The Linux kernel hardware security team is separate from the regular Linux | |
| 24 | +kernel security team. | |
| 25 | + | |
| 26 | +The team only handles the coordination of embargoed hardware security | |
| 27 | +issues. Reports of pure software security bugs in the Linux kernel are not | |
| 28 | +handled by this team and the reporter will be guided to contact the regular | |
| 29 | +Linux kernel security team (:ref:`Documentation/admin-guide/ | |
| 30 | +<securitybugs>`) instead. | |
| 31 | + | |
| 32 | +The team can be contacted by email at <hardware-security@kernel.org>. This | |
| 33 | +is a private list of security officers who will help you to coordinate an | |
| 34 | +issue according to our documented process. | |
| 35 | + | |
| 36 | +The list is encrypted and email to the list can be sent by either PGP or | |
| 37 | +S/MIME encrypted and must be signed with the reporter's PGP key or S/MIME | |
| 38 | +certificate. The list's PGP key and S/MIME certificate are available from | |
| 39 | +https://www.kernel.org/.... | |
| 40 | + | |
| 41 | +While hardware security issues are often handled by the affected hardware | |
| 42 | +vendor, we welcome contact from researchers or individuals who have | |
| 43 | +identified a potential hardware flaw. | |
| 44 | + | |
| 45 | +Hardware security officers | |
| 46 | +^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| 47 | + | |
| 48 | +The current team of hardware security officers: | |
| 49 | + | |
| 50 | + - Linus Torvalds (Linux Foundation Fellow) | |
| 51 | + - Greg Kroah-Hartman (Linux Foundation Fellow) | |
| 52 | + - Thomas Gleixner (Linux Foundation Fellow) | |
| 53 | + | |
| 54 | +Operation of mailing-lists | |
| 55 | +^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| 56 | + | |
| 57 | +The encrypted mailing-lists which are used in our process are hosted on | |
| 58 | +Linux Foundation's IT infrastructure. By providing this service Linux | |
| 59 | +Foundation's director of IT Infrastructure security technically has the | |
| 60 | +ability to access the embargoed information, but is obliged to | |
| 61 | +confidentiality by his employment contract. Linux Foundation's director of | |
| 62 | +IT Infrastructure security is also responsible for the kernel.org | |
| 63 | +infrastructure. | |
| 64 | + | |
| 65 | +The Linux Foundation's current director of IT Infrastructure security is | |
| 66 | +Konstantin Ryabitsev. | |
| 67 | + | |
| 68 | + | |
| 69 | +Non-disclosure agreements | |
| 70 | +------------------------- | |
| 71 | + | |
| 72 | +The Linux kernel hardware security team is not a formal body and therefore | |
| 73 | +unable to enter into any non-disclosure agreements. The kernel community | |
| 74 | +is aware of the sensitive nature of such issues and offers a Memorandum of | |
| 75 | +Understanding instead. | |
| 76 | + | |
| 77 | + | |
| 78 | +Memorandum of Understanding | |
| 79 | +--------------------------- | |
| 80 | + | |
| 81 | +The Linux kernel community has a deep understanding of the requirement to | |
| 82 | +keep hardware security issues under embargo for coordination between | |
| 83 | +different OS vendors, distributors, hardware vendors and other parties. | |
| 84 | + | |
| 85 | +The Linux kernel community has successfully handled hardware security | |
| 86 | +issues in the past and has the necessary mechanisms in place to allow | |
| 87 | +community compliant development under embargo restrictions. | |
| 88 | + | |
| 89 | +The Linux kernel community has a dedicated hardware security team for | |
| 90 | +initial contact, which oversees the process of handling such issues under | |
| 91 | +embargo rules. | |
| 92 | + | |
| 93 | +The hardware security team identifies the developers (domain experts) who | |
| 94 | +will form the initial response team for a particular issue. The initial | |
| 95 | +response team can bring in further developers (domain experts) to address | |
| 96 | +the issue in the best technical way. | |
| 97 | + | |
| 98 | +All involved developers pledge to adhere to the embargo rules and to keep | |
| 99 | +the received information confidential. Violation of the pledge will lead to | |
| 100 | +immediate exclusion from the current issue and removal from all related | |
| 101 | +mailing-lists. In addition, the hardware security team will also exclude | |
| 102 | +the offender from future issues. The impact of this consequence is a highly | |
| 103 | +effective deterrent in our community. In case a violation happens the | |
| 104 | +hardware security team will inform the involved parties immediately. If you | |
| 105 | +or anyone becomes aware of a potential violation, please report it | |
| 106 | +immediately to the Hardware security officers. | |
| 107 | + | |
| 108 | + | |
| 109 | +Process | |
| 110 | +^^^^^^^ | |
| 111 | + | |
| 112 | +Due to the globally distributed nature of Linux kernel development, | |
| 113 | +face-to-face meetings are almost impossible to address hardware security | |
| 114 | +issues. Phone conferences are hard to coordinate due to time zones and | |
| 115 | +other factors and should be only used when absolutely necessary. Encrypted | |
| 116 | +email has been proven to be the most effective and secure communication | |
| 117 | +method for these types of issues. | |
| 118 | + | |
| 119 | +Start of Disclosure | |
| 120 | +""""""""""""""""""" | |
| 121 | + | |
| 122 | +Disclosure starts by contacting the Linux kernel hardware security team by | |
| 123 | +email. This initial contact should contain a description of the problem and | |
| 124 | +a list of any known affected hardware. If your organization builds or | |
| 125 | +distributes the affected hardware, we encourage you to also consider what | |
| 126 | +other hardware could be affected. | |
| 127 | + | |
| 128 | +The hardware security team will provide an incident-specific encrypted | |
| 129 | +mailing-list which will be used for initial discussion with the reporter, | |
| 130 | +further disclosure and coordination. | |
| 131 | + | |
| 132 | +The hardware security team will provide the disclosing party a list of | |
| 133 | +developers (domain experts) who should be informed initially about the | |
| 134 | +issue after confirming with the developers that they will adhere to this | |
| 135 | +Memorandum of Understanding and the documented process. These developers | |
| 136 | +form the initial response team and will be responsible for handling the | |
| 137 | +issue after initial contact. The hardware security team is supporting the | |
| 138 | +response team, but is not necessarily involved in the mitigation | |
| 139 | +development process. | |
| 140 | + | |
| 141 | +While individual developers might be covered by a non-disclosure agreement | |
| 142 | +via their employer, they cannot enter individual non-disclosure agreements | |
| 143 | +in their role as Linux kernel developers. They will, however, agree to | |
| 144 | +adhere to this documented process and the Memorandum of Understanding. | |
| 145 | + | |
| 146 | + | |
| 147 | +Disclosure | |
| 148 | +"""""""""" | |
| 149 | + | |
| 150 | +The disclosing party provides detailed information to the initial response | |
| 151 | +team via the specific encrypted mailing-list. | |
| 152 | + | |
| 153 | +From our experience the technical documentation of these issues is usually | |
| 154 | +a sufficient starting point and further technical clarification is best | |
| 155 | +done via email. | |
| 156 | + | |
| 157 | +Mitigation development | |
| 158 | +"""""""""""""""""""""" | |
| 159 | + | |
| 160 | +The initial response team sets up an encrypted mailing-list or repurposes | |
| 161 | +an existing one if appropriate. The disclosing party should provide a list | |
| 162 | +of contacts for all other parties who have already been, or should be | |
| 163 | +informed about the issue. The response team contacts these parties so they | |
| 164 | +can name experts who should be subscribed to the mailing-list. | |
| 165 | + | |
| 166 | +Using a mailing-list is close to the normal Linux development process and | |
| 167 | +has been successfully used in developing mitigations for various hardware | |
| 168 | +security issues in the past. | |
| 169 | + | |
| 170 | +The mailing-list operates in the same way as normal Linux development. | |
| 171 | +Patches are posted, discussed and reviewed and if agreed on applied to a | |
| 172 | +non-public git repository which is only accessible to the participating | |
| 173 | +developers via a secure connection. The repository contains the main | |
| 174 | +development branch against the mainline kernel and backport branches for | |
| 175 | +stable kernel versions as necessary. | |
| 176 | + | |
| 177 | +The initial response team will identify further experts from the Linux | |
| 178 | +kernel developer community as needed and inform the disclosing party about | |
| 179 | +their participation. Bringing in experts can happen at any time of the | |
| 180 | +development process and often needs to be handled in a timely manner. | |
| 181 | + | |
| 182 | +Coordinated release | |
| 183 | +""""""""""""""""""" | |
| 184 | + | |
| 185 | +The involved parties will negotiate the date and time where the embargo | |
| 186 | +ends. At that point the prepared mitigations are integrated into the | |
| 187 | +relevant kernel trees and published. | |
| 188 | + | |
| 189 | +While we understand that hardware security issues need coordinated embargo | |
| 190 | +time, the embargo time should be constrained to the minimum time which is | |
| 191 | +required for all involved parties to develop, test and prepare the | |
| 192 | +mitigations. Extending embargo time artificially to meet conference talk | |
| 193 | +dates or other non-technical reasons is creating more work and burden for | |
| 194 | +the involved developers and response teams as the patches need to be kept | |
| 195 | +up to date in order to follow the ongoing upstream kernel development, | |
| 196 | +which might create conflicting changes. | |
| 197 | + | |
| 198 | +CVE assignment | |
| 199 | +"""""""""""""" | |
| 200 | + | |
| 201 | +Neither the hardware security team nor the initial response team assign | |
| 202 | +CVEs, nor are CVEs required for the development process. If CVEs are | |
| 203 | +provided by the disclosing party they can be used for documentation | |
| 204 | +purposes. | |
| 205 | + | |
| 206 | +Process ambassadors | |
| 207 | +------------------- | |
| 208 | + | |
| 209 | +For assistance with this process we have established ambassadors in various | |
| 210 | +organizations, who can answer questions about or provide guidance on the | |
| 211 | +reporting process and further handling. Ambassadors are not involved in the | |
| 212 | +disclosure of a particular issue, unless requested by a response team or by | |
| 213 | +an involved disclosed party. The current ambassadors list: | |
| 214 | + | |
| 215 | + ============= ======================================================== | |
| 216 | + ARM | |
| 217 | + AMD | |
| 218 | + IBM | |
| 219 | + Intel | |
| 220 | + Qualcomm | |
| 221 | + | |
| 222 | + Microsoft | |
| 223 | + VMware | |
| 224 | + XEN | |
| 225 | + | |
| 226 | + Canonical Tyler Hicks <tyhicks@canonical.com> | |
| 227 | + Debian Ben Hutchings <ben@decadent.org.uk> | |
| 228 | + Oracle Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | |
| 229 | + Red Hat Josh Poimboeuf <jpoimboe@redhat.com> | |
| 230 | + SUSE Jiri Kosina <jkosina@suse.cz> | |
| 231 | + | |
| 232 | + Amazon | |
| 233 | ||
| 234 | + ============== ======================================================== | |
| 235 | + | |
| 236 | +If you want your organization to be added to the ambassadors list, please | |
| 237 | +contact the hardware security team. The nominated ambassador has to | |
| 238 | +understand and support our process fully and is ideally well connected in | |
| 239 | +the Linux kernel community. | |
| 240 | + | |
| 241 | +Encrypted mailing-lists | |
| 242 | +----------------------- | |
| 243 | + | |
| 244 | +We use encrypted mailing-lists for communication. The operating principle | |
| 245 | +of these lists is that email sent to the list is encrypted either with the | |
| 246 | +list's PGP key or with the list's S/MIME certificate. The mailing-list | |
| 247 | +software decrypts the email and re-encrypts it individually for each | |
| 248 | +subscriber with the subscriber's PGP key or S/MIME certificate. Details | |
| 249 | +about the mailing-list software and the setup which is used to ensure the | |
| 250 | +security of the lists and protection of the data can be found here: | |
| 251 | +https://www.kernel.org/.... | |
| 252 | + | |
| 253 | +List keys | |
| 254 | +^^^^^^^^^ | |
| 255 | + | |
| 256 | +For initial contact see :ref:`Contact`. For incident specific mailing-lists | |
| 257 | +the key and S/MIME certificate are conveyed to the subscribers by email | |
| 258 | +sent from the specific list. | |
| 259 | + | |
| 260 | +Subscription to incident specific lists | |
| 261 | +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
| 262 | + | |
| 263 | +Subscription is handled by the response teams. Disclosed parties who want | |
| 264 | +to participate in the communication send a list of potential subscribers to | |
| 265 | +the response team so the response team can validate subscription requests. | |
| 266 | + | |
| 267 | +Each subscriber needs to send a subscription request to the response team | |
| 268 | +by email. The email must be signed with the subscriber's PGP key or S/MIME | |
| 269 | +certificate. If a PGP key is used, it must be available from a public key | |
| 270 | +server and is ideally connected to the Linux kernel's PGP web of trust. See | |
| 271 | +also: https://www.kernel.org/signature.html. | |
| 272 | + | |
| 273 | +The response team verifies that the subscriber request is valid and adds | |
| 274 | +the subscriber to the list. After subscription the subscriber will receive | |
| 275 | +email from the mailing-list which is signed either with the list's PGP key | |
| 276 | +or the list's S/MIME certificate. The subscriber's email client can extract | |
| 277 | +the PGP key or the S/MIME certificate from the signature so the subscriber | |
| 278 | +can send encrypted email to the list. | |
| 279 | + | |
| @@ -45,6 +45,7 @@ Other guides to the community that are of interest to most developers are: · 44 unmodified lines | ||
| 45 | 45 | submit-checklist |
| 46 | 46 | kernel-docs |
| 47 | 47 | deprecated |
| 48 | + embargoed-hardware-issues | |
| 48 | 49 | |
| 49 | 50 | These are some overall technical guides that have been put here for now for |
| 50 | 51 | lack of a better place. |
| @@ -180,6 +180,13 @@ The process of how these work together. · 179 unmodified lines | ||
| 180 | 180 | add it to an iommu_group and a vfio_group. Then we could pass through |
| 181 | 181 | the mdev to a guest. |
| 182 | 182 | |
| 183 | + | |
| 184 | +VFIO-CCW Regions | |
| 185 | +---------------- | |
| 186 | + | |
| 187 | +The vfio-ccw driver exposes MMIO regions to accept requests from and return | |
| 188 | +results to userspace. | |
| 189 | + | |
| 183 | 190 | vfio-ccw I/O region |
| 184 | 191 | ------------------- |
| 185 | 192 | |
| @@ -205,6 +212,25 @@ irb_area stores the I/O result. · 19 unmodified lines | ||
| 205 | 212 | |
| 206 | 213 | ret_code stores a return code for each access of the region. |
| 207 | 214 | |
| 215 | +This region is always available. | |
| 216 | + | |
| 217 | +vfio-ccw cmd region | |
| 218 | +------------------- | |
| 219 | + | |
| 220 | +The vfio-ccw cmd region is used to accept asynchronous instructions | |
| 221 | +from userspace:: | |
| 222 | + | |
| 223 | + #define VFIO_CCW_ASYNC_CMD_HSCH (1 << 0) | |
| 224 | + #define VFIO_CCW_ASYNC_CMD_CSCH (1 << 1) | |
| 225 | + struct ccw_cmd_region { | |
| 226 | + __u32 command; | |
| 227 | + __u32 ret_code; | |
| 228 | + } __packed; | |
| 229 | + | |
| 230 | +This region is exposed via region type VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD. | |
| 231 | + | |
| 232 | +Currently, CLEAR SUBCHANNEL and HALT SUBCHANNEL use this region. | |
| 233 | + | |
| 208 | 234 | vfio-ccw operation details |
| 209 | 235 | -------------------------- |
| 210 | 236 | |
| @@ -306,9 +332,8 @@ Together with the corresponding work in QEMU, we can bring the passed · 95 unmodified lines | ||
| 306 | 332 | through DASD/ECKD device online in a guest now and use it as a block |
| 307 | 333 | device. |
| 308 | 334 | |
| 309 | −While the current code allows the guest to start channel programs via | |
| 310 | −START SUBCHANNEL, support for HALT SUBCHANNEL or CLEAR SUBCHANNEL is | |
| 311 | −not yet implemented. | |
| 335 | +The current code allows the guest to start channel programs via | |
| 336 | +START SUBCHANNEL, and to issue HALT SUBCHANNEL and CLEAR SUBCHANNEL. | |
| 312 | 337 | |
| 313 | 338 | vfio-ccw supports classic (command mode) channel I/O only. Transport |
| 314 | 339 | mode (HPF) is not supported. |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "SuperH architecture implementation manual" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'sh.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux Sound Subsystem Documentation" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'sound.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -21,6 +21,29 @@ def loadConfig(namespace): · 20 unmodified lines | ||
| 21 | 21 | and os.path.normpath(namespace["__file__"]) != os.path.normpath(config_file) ): |
| 22 | 22 | config_file = os.path.abspath(config_file) |
| 23 | 23 | |
| 24 | + # Let's avoid one conf.py file just due to latex_documents | |
| 25 | + start = config_file.find('Documentation/') | |
| 26 | + if start >= 0: | |
| 27 | + start = config_file.find('/', start + 1) | |
| 28 | + | |
| 29 | + end = config_file.rfind('/') | |
| 30 | + if start >= 0 and end > 0: | |
| 31 | + dir = config_file[start + 1:end] | |
| 32 | + | |
| 33 | + print("source directory: %s" % dir) | |
| 34 | + new_latex_docs = [] | |
| 35 | + latex_documents = namespace['latex_documents'] | |
| 36 | + | |
| 37 | + for l in latex_documents: | |
| 38 | + if l[0].find(dir + '/') == 0: | |
| 39 | + has = True | |
| 40 | + fn = l[0][len(dir) + 1:] | |
| 41 | + new_latex_docs.append((fn, l[1], l[2], l[3], l[4])) | |
| 42 | + break | |
| 43 | + | |
| 44 | + namespace['latex_documents'] = new_latex_docs | |
| 45 | + | |
| 46 | + # If there is an extra conf.py file, load it | |
| 24 | 47 | if os.path.isfile(config_file): |
| 25 | 48 | sys.stdout.write("load additional sphinx-config: %s\n" % config_file) |
| 26 | 49 | config = namespace.copy() |
| @@ -29,4 +52,6 @@ def loadConfig(namespace): · 2 unmodified lines | ||
| 29 | 52 | del config['__file__'] |
| 30 | 53 | namespace.update(config) |
| 31 | 54 | else: |
| 32 | − sys.stderr.write("WARNING: additional sphinx-config not found: %s\n" % config_file) | |
| 55 | + config = namespace.copy() | |
| 56 | + config['tags'].add("subproject") | |
| 57 | + namespace.update(config) | |
| @@ -242,8 +242,9 @@ del kernel: · 241 unmodified lines | ||
| 242 | 242 | * Per inserire blocchi di testo con caratteri a dimensione fissa (codici di |
| 243 | 243 | esempio, casi d'uso, eccetera): utilizzate ``::`` quando non è necessario |
| 244 | 244 | evidenziare la sintassi, specialmente per piccoli frammenti; invece, |
| 245 | − utilizzate ``.. code-block:: <language>`` per blocchi di più lunghi che | |
| 246 | − potranno beneficiare dell'avere la sintassi evidenziata. | |
| 245 | + utilizzate ``.. code-block:: <language>`` per blocchi più lunghi che | |
| 246 | + beneficeranno della sintassi evidenziata. Per un breve pezzo di codice da | |
| 247 | + inserire nel testo, usate \`\`. | |
| 247 | 248 | |
| 248 | 249 | |
| 249 | 250 | Il dominio C |
| @@ -267,12 +268,14 @@ molto comune come ``open`` o ``ioctl``: · 17 unmodified lines | ||
| 267 | 268 | |
| 268 | 269 | Il nome della funzione (per esempio ioctl) rimane nel testo ma il nome del suo |
| 269 | 270 | riferimento cambia da ``ioctl`` a ``VIDIOC_LOG_STATUS``. Anche la voce |
| 270 | −nell'indice cambia in ``VIDIOC_LOG_STATUS`` e si potrà quindi fare riferimento | |
| 271 | −a questa funzione scrivendo: | |
| 272 | − | |
| 273 | −.. code-block:: rst | |
| 274 | − | |
| 275 | − :c:func:`VIDIOC_LOG_STATUS` | |
| 271 | +nell'indice cambia in ``VIDIOC_LOG_STATUS``. | |
| 272 | + | |
| 273 | +Notate che per una funzione non c'è bisogno di usare ``c:func:`` per generarne | |
| 274 | +i riferimenti nella documentazione. Grazie a qualche magica estensione a | |
| 275 | +Sphinx, il sistema di generazione della documentazione trasformerà | |
| 276 | +automaticamente un riferimento ad una ``funzione()`` in un riferimento | |
| 277 | +incrociato quando questa ha una voce nell'indice. Se trovate degli usi di | |
| 278 | +``c:func:`` nella documentazione del kernel, sentitevi liberi di rimuoverli. | |
| 276 | 279 | |
| 277 | 280 | |
| 278 | 281 | Tabelle a liste |
| @@ -27,6 +27,7 @@ Di seguito le guide che ogni sviluppatore dovrebbe leggere. · 26 unmodified lines | ||
| 27 | 27 | code-of-conduct |
| 28 | 28 | development-process |
| 29 | 29 | submitting-patches |
| 30 | + programming-language | |
| 30 | 31 | coding-style |
| 31 | 32 | maintainer-pgp-guide |
| 32 | 33 | email-clients |
| @@ -1,6 +1,7 @@ | ||
| 1 | 1 | .. include:: ../disclaimer-ita.rst |
| 2 | 2 | |
| 3 | 3 | :Original: :ref:`Documentation/process/kernel-docs.rst <kernel_docs>` |
| 4 | +:Translator: Federico Vaga <federico.vaga@vaga.pv.it> | |
| 4 | 5 | |
| 5 | 6 | |
| 6 | 7 | .. _it_kernel_docs: |
| @@ -8,6 +9,10 @@ · 1 unmodified line | ||
| 8 | 9 | Indice di documenti per le persone interessate a capire e/o scrivere per il kernel Linux |
| 9 | 10 | ======================================================================================== |
| 10 | 11 | |
| 11 | −.. warning:: | |
| 12 | − | |
| 13 | − TODO ancora da tradurre | |
| 12 | +.. note:: | |
| 13 | + Questo documento contiene riferimenti a documenti in lingua inglese; inoltre | |
| 14 | + utilizza dai campi *ReStructuredText* di supporto alla ricerca e che per | |
| 15 | + questo motivo è meglio non tradurre al fine di garantirne un corretto | |
| 16 | + utilizzo. | |
| 17 | + Per questi motivi il documento non verrà tradotto. Per favore fate | |
| 18 | + riferimento al documento originale in lingua inglese. | |
| @@ -248,7 +248,10 @@ possano ricevere la vostra nuova sottochiave:: · 247 unmodified lines | ||
| 248 | 248 | kernel. |
| 249 | 249 | |
| 250 | 250 | Se per qualche ragione preferite rimanere con sottochiavi RSA, nel comando |
| 251 | − precedente, sostituite "ed25519" con "rsa2048". | |
| 251 | + precedente, sostituite "ed25519" con "rsa2048". In aggiunta, se avete | |
| 252 | + intenzione di usare un dispositivo hardware che non supporta le chiavi | |
| 253 | + ED25519 ECC, come la Nitrokey Pro o la Yubikey, allora dovreste usare | |
| 254 | + "nistp256" al posto di "ed25519". | |
| 252 | 255 | |
| 253 | 256 | Copia di riserva della chiave primaria per gestire il recupero da disastro |
| 254 | 257 | -------------------------------------------------------------------------- |
| @@ -449,23 +452,27 @@ implementi le funzionalità delle smartcard. Sul mercato ci sono diverse · 194 unmodified lines | ||
| 449 | 452 | soluzioni disponibili: |
| 450 | 453 | |
| 451 | 454 | - `Nitrokey Start`_: è Open hardware e Free Software, è basata sul progetto |
| 452 | − `GnuK`_ della FSIJ. Ha il supporto per chiavi ECC, ma meno funzionalità di | |
| 453 | − sicurezza (come la resistenza alla manomissione o alcuni attacchi ad un | |
| 454 | − canale laterale). | |
| 455 | + `GnuK`_ della FSIJ. Questo è uno dei pochi dispositivi a supportare le chiavi | |
| 456 | + ECC ED25519, ma offre meno funzionalità di sicurezza (come la resistenza | |
| 457 | + alla manomissione o alcuni attacchi ad un canale laterale). | |
| 455 | 458 | - `Nitrokey Pro`_: è simile alla Nitrokey Start, ma è più resistente alla |
| 456 | − manomissione e offre più funzionalità di sicurezza, ma l'ECC. | |
| 457 | −- `Yubikey 4`_: l'hardware e il software sono proprietari, ma è più economica | |
| 459 | + manomissione e offre più funzionalità di sicurezza. La Pro 2 supporta la | |
| 460 | + crittografia ECC (NISTP). | |
| 461 | +- `Yubikey 5`_: l'hardware e il software sono proprietari, ma è più economica | |
| 458 | 462 | della Nitrokey Pro ed è venduta anche con porta USB-C il che è utile con i |
| 459 | 463 | computer portatili più recenti. In aggiunta, offre altre funzionalità di |
| 460 | − sicurezza come FIDO, U2F, ma non l'ECC | |
| 464 | + sicurezza come FIDO, U2F, e ora supporta anche le chiavi ECC (NISTP) | |
| 461 | 465 | |
| 462 | 466 | `Su LWN c'è una buona recensione`_ dei modelli elencati qui sopra e altri. |
| 467 | +La scelta dipenderà dal costo, dalla disponibilità nella vostra area | |
| 468 | +geografica e vostre considerazioni sull'hardware aperto/proprietario. | |
| 469 | + | |
| 463 | 470 | Se volete usare chiavi ECC, la vostra migliore scelta sul mercato è la |
| 464 | 471 | Nitrokey Start. |
| 465 | 472 | |
| 466 | 473 | .. _`Nitrokey Start`: https://shop.nitrokey.com/shop/product/nitrokey-start-6 |
| 467 | −.. _`Nitrokey Pro`: https://shop.nitrokey.com/shop/product/nitrokey-pro-3 | |
| 468 | −.. _`Yubikey 4`: https://www.yubico.com/product/yubikey-4-series/ | |
| 474 | +.. _`Nitrokey Pro 2`: https://shop.nitrokey.com/shop/product/nitrokey-pro-2-3 | |
| 475 | +.. _`Yubikey 5`: https://www.yubico.com/product/yubikey-5-overview/ | |
| 469 | 476 | .. _Gnuk: http://www.fsij.org/doc-gnuk/ |
| 470 | 477 | .. _`Su LWN c'è una buona recensione`: https://lwn.net/Articles/736231/ |
| 471 | 478 | |
| @@ -0,0 +1,51 @@ | ||
| 1 | +.. include:: ../disclaimer-ita.rst | |
| 2 | + | |
| 3 | +:Original: :ref:`Documentation/process/programming-language.rst <programming_language>` | |
| 4 | +:Translator: Federico Vaga <federico.vaga@vaga.pv.it> | |
| 5 | + | |
| 6 | +.. _it_programming_language: | |
| 7 | + | |
| 8 | +Linguaggio di programmazione | |
| 9 | +============================ | |
| 10 | + | |
| 11 | +Il kernel è scritto nel linguaggio di programmazione C [c-language]_. | |
| 12 | +Più precisamente, il kernel viene compilato con ``gcc`` [gcc]_ usando | |
| 13 | +l'opzione ``-std=gnu89`` [gcc-c-dialect-options]_: il dialetto GNU | |
| 14 | +dello standard ISO C90 (con l'aggiunta di alcune funzionalità da C99) | |
| 15 | + | |
| 16 | +Questo dialetto contiene diverse estensioni al linguaggio [gnu-extensions]_, | |
| 17 | +e molte di queste vengono usate sistematicamente dal kernel. | |
| 18 | + | |
| 19 | +Il kernel offre un certo livello di supporto per la compilazione con ``clang`` | |
| 20 | +[clang]_ e ``icc`` [icc]_ su diverse architetture, tuttavia in questo momento | |
| 21 | +il supporto non è completo e richiede delle patch aggiuntive. | |
| 22 | + | |
| 23 | +Attributi | |
| 24 | +--------- | |
| 25 | + | |
| 26 | +Una delle estensioni più comuni e usate nel kernel sono gli attributi | |
| 27 | +[gcc-attribute-syntax]_. Gli attributi permettono di aggiungere una semantica, | |
| 28 | +definita dell'implementazione, alle entità del linguaggio (come le variabili, | |
| 29 | +le funzioni o i tipi) senza dover fare importanti modifiche sintattiche al | |
| 30 | +linguaggio stesso (come l'aggiunta di nuove parole chiave) [n2049]_. | |
| 31 | + | |
| 32 | +In alcuni casi, gli attributi sono opzionali (ovvero un compilatore che non | |
| 33 | +dovesse supportarli dovrebbe produrre comunque codice corretto, anche se | |
| 34 | +più lento o che non esegue controlli aggiuntivi durante la compilazione). | |
| 35 | + | |
| 36 | +Il kernel definisce alcune pseudo parole chiave (per esempio ``__pure``) | |
| 37 | +in alternativa alla sintassi GNU per gli attributi (per esempio | |
| 38 | +``__attribute__((__pure__))``) allo scopo di mostrare quali funzionalità si | |
| 39 | +possono usare e/o per accorciare il codice. | |
| 40 | + | |
| 41 | +Per maggiori informazioni consultate il file d'intestazione | |
| 42 | +``include/linux/compiler_attributes.h``. | |
| 43 | + | |
| 44 | +.. [c-language] http://www.open-std.org/jtc1/sc22/wg14/www/standards | |
| 45 | +.. [gcc] https://gcc.gnu.org | |
| 46 | +.. [clang] https://clang.llvm.org | |
| 47 | +.. [icc] https://software.intel.com/en-us/c-compilers | |
| 48 | +.. [gcc-c-dialect-options] https://gcc.gnu.org/onlinedocs/gcc/C-Dialect-Options.html | |
| 49 | +.. [gnu-extensions] https://gcc.gnu.org/onlinedocs/gcc/C-Extensions.html | |
| 50 | +.. [gcc-attribute-syntax] https://gcc.gnu.org/onlinedocs/gcc/Attribute-Syntax.html | |
| 51 | +.. [n2049] http://www.open-std.org/jtc1/sc22/wg14/www/docs/n2049.pdf | |
| @@ -569,7 +569,7 @@ ACQUIRE 는 해당 오퍼레이션의 로드 부분에만 적용되고 RELEASE · 568 unmodified lines | ||
| 569 | 569 | |
| 570 | 570 | [*] 버스 마스터링 DMA 와 일관성에 대해서는 다음을 참고하시기 바랍니다: |
| 571 | 571 | |
| 572 | − Documentation/PCI/pci.rst | |
| 572 | + Documentation/driver-api/pci/pci.rst | |
| 573 | 573 | Documentation/DMA-API-HOWTO.txt |
| 574 | 574 | Documentation/DMA-API.txt |
| 575 | 575 | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "The Linux kernel user-space API guide" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'userspace-api.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
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| @@ -3781,7 +3781,7 @@ encrypted VMs. · 3780 unmodified lines | ||
| 3781 | 3781 | |
| 3782 | 3782 | Currently, this ioctl is used for issuing Secure Encrypted Virtualization |
| 3783 | 3783 | (SEV) commands on AMD Processors. The SEV commands are defined in |
| 3784 | −Documentation/virtual/kvm/amd-memory-encryption.rst. | |
| 3784 | +Documentation/virt/kvm/amd-memory-encryption.rst. | |
| 3785 | 3785 | |
| 3786 | 3786 | 4.111 KVM_MEMORY_ENCRYPT_REG_REGION |
| 3787 | 3787 | |
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| @@ -18,7 +18,7 @@ S390: · 17 unmodified lines | ||
| 18 | 18 | number in R1. |
| 19 | 19 | |
| 20 | 20 | For further information on the S390 diagnose call as supported by KVM, |
| 21 | − refer to Documentation/virtual/kvm/s390-diag.txt. | |
| 21 | + refer to Documentation/virt/kvm/s390-diag.txt. | |
| 22 | 22 | |
| 23 | 23 | PowerPC: |
| 24 | 24 | It uses R3-R10 and hypercall number in R11. R4-R11 are used as output registers. |
| @@ -26,7 +26,7 @@ S390: · 1 unmodified line | ||
| 26 | 26 | |
| 27 | 27 | KVM hypercalls uses 4 byte opcode, that are patched with 'hypercall-instructions' |
| 28 | 28 | property inside the device tree's /hypervisor node. |
| 29 | − For more information refer to Documentation/virtual/kvm/ppc-pv.txt | |
| 29 | + For more information refer to Documentation/virt/kvm/ppc-pv.txt | |
| 30 | 30 | |
| 31 | 31 | MIPS: |
| 32 | 32 | KVM hypercalls use the HYPCALL instruction with code 0 and the hypercall |
| @@ -9,3 +9,4 @@ KVM · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | amd-memory-encryption |
| 11 | 11 | cpuid |
| 12 | + vcpu-requests | |
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| @@ -298,7 +298,7 @@ Handling a page fault is performed as follows: · 297 unmodified lines | ||
| 298 | 298 | vcpu->arch.mmio_gfn, and call the emulator |
| 299 | 299 | - If both P bit and R/W bit of error code are set, this could possibly |
| 300 | 300 | be handled as a "fast page fault" (fixed without taking the MMU lock). See |
| 301 | − the description in Documentation/virtual/kvm/locking.txt. | |
| 301 | + the description in Documentation/virt/kvm/locking.txt. | |
| 302 | 302 | - if needed, walk the guest page tables to determine the guest translation |
| 303 | 303 | (gva->gpa or ngpa->gpa) |
| 304 | 304 | - if permissions are insufficient, reflect the fault back to the guest |
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| @@ -7,7 +7,7 @@ Review checklist for kvm patches · 6 unmodified lines | ||
| 7 | 7 | 2. Patches should be against kvm.git master branch. |
| 8 | 8 | |
| 9 | 9 | 3. If the patch introduces or modifies a new userspace API: |
| 10 | − - the API must be documented in Documentation/virtual/kvm/api.txt | |
| 10 | + - the API must be documented in Documentation/virt/kvm/api.txt | |
| 11 | 11 | - the API must be discoverable using KVM_CHECK_EXTENSION |
| 12 | 12 | |
| 13 | 13 | 4. New state must include support for save/restore. |
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| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "Linux Memory Management Documentation" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'memory-management.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -237,7 +237,7 @@ The usage pattern is:: · 236 unmodified lines | ||
| 237 | 237 | ret = hmm_range_snapshot(&range); |
| 238 | 238 | if (ret) { |
| 239 | 239 | up_read(&mm->mmap_sem); |
| 240 | − if (ret == -EAGAIN) { | |
| 240 | + if (ret == -EBUSY) { | |
| 241 | 241 | /* |
| 242 | 242 | * No need to check hmm_range_wait_until_valid() return value |
| 243 | 243 | * on retry we will get proper error with hmm_range_snapshot() |
| @@ -63,7 +63,7 @@ Last reviewed: 08/20/2018 · 62 unmodified lines | ||
| 63 | 63 | and loop forever. This is generally not what a watchdog user wants. |
| 64 | 64 | |
| 65 | 65 | For those wishing to learn more please see: |
| 66 | − Documentation/kdump/kdump.rst | |
| 66 | + Documentation/admin-guide/kdump/kdump.rst | |
| 67 | 67 | Documentation/admin-guide/kernel-parameters.txt (panic=) |
| 68 | 68 | Your Linux Distribution specific documentation. |
| 69 | 69 | |
| @@ -1,10 +0,0 @@ | ||
| 1 | −# -*- coding: utf-8; mode: python -*- | |
| 2 | − | |
| 3 | −project = "X86 architecture specific documentation" | |
| 4 | − | |
| 5 | −tags.add("subproject") | |
| 6 | − | |
| 7 | −latex_documents = [ | |
| 8 | − ('index', 'x86.tex', project, | |
| 9 | − 'The kernel development community', 'manual'), | |
| 10 | −] | |
| @@ -183,7 +183,7 @@ M: Realtek linux nic maintainers <nic_swsd@realtek.com> · 182 unmodified lines | ||
| 183 | 183 | M: Heiner Kallweit <hkallweit1@gmail.com> |
| 184 | 184 | L: netdev@vger.kernel.org |
| 185 | 185 | S: Maintained |
| 186 | −F: drivers/net/ethernet/realtek/r8169.c | |
| 186 | +F: drivers/net/ethernet/realtek/r8169* | |
| 187 | 187 | |
| 188 | 188 | 8250/16?50 (AND CLONE UARTS) SERIAL DRIVER |
| 189 | 189 | M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
| @@ -683,7 +683,7 @@ S: Maintained · 493 unmodified lines | ||
| 683 | 683 | F: drivers/crypto/sunxi-ss/ |
| 684 | 684 | |
| 685 | 685 | ALLWINNER VPU DRIVER |
| 686 | −M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 686 | +M: Maxime Ripard <mripard@kernel.org> | |
| 687 | 687 | M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> |
| 688 | 688 | L: linux-media@vger.kernel.org |
| 689 | 689 | S: Maintained |
| @@ -899,7 +899,7 @@ L: linux-iio@vger.kernel.org · 209 unmodified lines | ||
| 899 | 899 | W: http://ez.analog.com/community/linux-device-drivers |
| 900 | 900 | S: Supported |
| 901 | 901 | F: drivers/iio/adc/ad7124.c |
| 902 | −F: Documentation/devicetree/bindings/iio/adc/adi,ad7124.txt | |
| 902 | +F: Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml | |
| 903 | 903 | |
| 904 | 904 | ANALOG DEVICES INC AD7606 DRIVER |
| 905 | 905 | M: Stefan Popa <stefan.popa@analog.com> |
| @@ -1194,7 +1194,7 @@ F: include/uapi/linux/if_arcnet.h · 288 unmodified lines | ||
| 1194 | 1194 | |
| 1195 | 1195 | ARM ARCHITECTED TIMER DRIVER |
| 1196 | 1196 | M: Mark Rutland <mark.rutland@arm.com> |
| 1197 | −M: Marc Zyngier <marc.zyngier@arm.com> | |
| 1197 | +M: Marc Zyngier <maz@kernel.org> | |
| 1198 | 1198 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1199 | 1199 | S: Maintained |
| 1200 | 1200 | F: arch/arm/include/asm/arch_timer.h |
| @@ -1408,7 +1408,7 @@ S: Maintained · 207 unmodified lines | ||
| 1408 | 1408 | F: drivers/clk/sunxi/ |
| 1409 | 1409 | |
| 1410 | 1410 | ARM/Allwinner sunXi SoC support |
| 1411 | −M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 1411 | +M: Maxime Ripard <mripard@kernel.org> | |
| 1412 | 1412 | M: Chen-Yu Tsai <wens@csie.org> |
| 1413 | 1413 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 1414 | 1414 | S: Maintained |
| @@ -2155,10 +2155,12 @@ F: Documentation/devicetree/bindings/arm/realtek.txt · 740 unmodified lines | ||
| 2155 | 2155 | |
| 2156 | 2156 | ARM/RENESAS ARM64 ARCHITECTURE |
| 2157 | 2157 | M: Simon Horman <horms@verge.net.au> |
| 2158 | +M: Geert Uytterhoeven <geert+renesas@glider.be> | |
| 2158 | 2159 | M: Magnus Damm <magnus.damm@gmail.com> |
| 2159 | 2160 | L: linux-renesas-soc@vger.kernel.org |
| 2160 | 2161 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ |
| 2161 | 2162 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next |
| 2163 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next | |
| 2162 | 2164 | S: Supported |
| 2163 | 2165 | F: arch/arm64/boot/dts/renesas/ |
| 2164 | 2166 | F: Documentation/devicetree/bindings/arm/renesas.yaml |
| @@ -2269,10 +2271,12 @@ F: drivers/media/platform/s5p-mfc/ · 104 unmodified lines | ||
| 2269 | 2271 | |
| 2270 | 2272 | ARM/SHMOBILE ARM ARCHITECTURE |
| 2271 | 2273 | M: Simon Horman <horms@verge.net.au> |
| 2274 | +M: Geert Uytterhoeven <geert+renesas@glider.be> | |
| 2272 | 2275 | M: Magnus Damm <magnus.damm@gmail.com> |
| 2273 | 2276 | L: linux-renesas-soc@vger.kernel.org |
| 2274 | 2277 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ |
| 2275 | 2278 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next |
| 2279 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next | |
| 2276 | 2280 | S: Supported |
| 2277 | 2281 | F: arch/arm/boot/dts/emev2* |
| 2278 | 2282 | F: arch/arm/boot/dts/gr-peach* |
| @@ -3573,7 +3577,7 @@ F: Documentation/filesystems/caching/cachefiles.txt · 1294 unmodified lines | ||
| 3573 | 3577 | F: fs/cachefiles/ |
| 3574 | 3578 | |
| 3575 | 3579 | CADENCE MIPI-CSI2 BRIDGES |
| 3576 | −M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 3580 | +M: Maxime Ripard <mripard@kernel.org> | |
| 3577 | 3581 | L: linux-media@vger.kernel.org |
| 3578 | 3582 | S: Maintained |
| 3579 | 3583 | F: Documentation/devicetree/bindings/media/cdns,*.txt |
| @@ -4190,7 +4194,7 @@ M: Jens Axboe <axboe@kernel.dk> · 610 unmodified lines | ||
| 4190 | 4194 | L: cgroups@vger.kernel.org |
| 4191 | 4195 | L: linux-block@vger.kernel.org |
| 4192 | 4196 | T: git git://git.kernel.dk/linux-block |
| 4193 | −F: Documentation/cgroup-v1/blkio-controller.rst | |
| 4197 | +F: Documentation/admin-guide/cgroup-v1/blkio-controller.rst | |
| 4194 | 4198 | F: block/blk-cgroup.c |
| 4195 | 4199 | F: include/linux/blk-cgroup.h |
| 4196 | 4200 | F: block/blk-throttle.c |
| @@ -4469,7 +4473,7 @@ F: arch/powerpc/platforms/powernv/pci-cxl.c · 272 unmodified lines | ||
| 4469 | 4473 | F: drivers/misc/cxl/ |
| 4470 | 4474 | F: include/misc/cxl* |
| 4471 | 4475 | F: include/uapi/misc/cxl.h |
| 4472 | −F: Documentation/powerpc/cxl.txt | |
| 4476 | +F: Documentation/powerpc/cxl.rst | |
| 4473 | 4477 | F: Documentation/ABI/testing/sysfs-class-cxl |
| 4474 | 4478 | |
| 4475 | 4479 | CXLFLASH (IBM Coherent Accelerator Processor Interface CAPI Flash) SCSI DRIVER |
| @@ -4480,7 +4484,7 @@ L: linux-scsi@vger.kernel.org · 4 unmodified lines | ||
| 4480 | 4484 | S: Supported |
| 4481 | 4485 | F: drivers/scsi/cxlflash/ |
| 4482 | 4486 | F: include/uapi/scsi/cxlflash_ioctl.h |
| 4483 | −F: Documentation/powerpc/cxlflash.txt | |
| 4487 | +F: Documentation/powerpc/cxlflash.rst | |
| 4484 | 4488 | |
| 4485 | 4489 | CYBERPRO FB DRIVER |
| 4486 | 4490 | M: Russell King <linux@armlinux.org.uk> |
| @@ -5291,7 +5295,7 @@ F: include/linux/vga* · 804 unmodified lines | ||
| 5291 | 5295 | |
| 5292 | 5296 | DRM DRIVERS AND MISC GPU PATCHES |
| 5293 | 5297 | M: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> |
| 5294 | −M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 5298 | +M: Maxime Ripard <mripard@kernel.org> | |
| 5295 | 5299 | M: Sean Paul <sean@poorly.run> |
| 5296 | 5300 | W: https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html |
| 5297 | 5301 | S: Maintained |
| @@ -5304,7 +5308,7 @@ F: include/uapi/drm/drm* · 6 unmodified lines | ||
| 5304 | 5308 | F: include/linux/vga* |
| 5305 | 5309 | |
| 5306 | 5310 | DRM DRIVERS FOR ALLWINNER A10 |
| 5307 | −M: Maxime Ripard <maxime.ripard@bootlin.com> | |
| 5311 | +M: Maxime Ripard <mripard@kernel.org> | |
| 5308 | 5312 | L: dri-devel@lists.freedesktop.org |
| 5309 | 5313 | S: Supported |
| 5310 | 5314 | F: drivers/gpu/drm/sun4i/ |
| @@ -6061,7 +6065,7 @@ M: Florian Fainelli <f.fainelli@gmail.com> · 750 unmodified lines | ||
| 6061 | 6065 | M: Heiner Kallweit <hkallweit1@gmail.com> |
| 6062 | 6066 | L: netdev@vger.kernel.org |
| 6063 | 6067 | S: Maintained |
| 6064 | −F: Documentation/ABI/testing/sysfs-bus-mdio | |
| 6068 | +F: Documentation/ABI/testing/sysfs-class-net-phydev | |
| 6065 | 6069 | F: Documentation/devicetree/bindings/net/ethernet-phy.yaml |
| 6066 | 6070 | F: Documentation/devicetree/bindings/net/mdio* |
| 6067 | 6071 | F: Documentation/networking/phy.rst |
| @@ -6322,7 +6326,8 @@ F: Documentation/devicetree/bindings/counter/ftm-quaddec.txt · 254 unmodified lines | ||
| 6322 | 6326 | F: drivers/counter/ftm-quaddec.c |
| 6323 | 6327 | |
| 6324 | 6328 | FLOPPY DRIVER |
| 6325 | −S: Orphan | |
| 6329 | +M: Denis Efremov <efremov@linux.com> | |
| 6330 | +S: Odd Fixes | |
| 6326 | 6331 | L: linux-block@vger.kernel.org |
| 6327 | 6332 | F: drivers/block/floppy.c |
| 6328 | 6333 | |
| @@ -6339,7 +6344,7 @@ FPGA MANAGER FRAMEWORK · 10 unmodified lines | ||
| 6339 | 6344 | M: Moritz Fischer <mdf@kernel.org> |
| 6340 | 6345 | L: linux-fpga@vger.kernel.org |
| 6341 | 6346 | S: Maintained |
| 6342 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git | |
| 6347 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git | |
| 6343 | 6348 | Q: http://patchwork.kernel.org/project/linux-fpga/list/ |
| 6344 | 6349 | F: Documentation/fpga/ |
| 6345 | 6350 | F: Documentation/driver-api/fpga/ |
| @@ -6372,7 +6377,7 @@ FRAMEBUFFER LAYER · 26 unmodified lines | ||
| 6372 | 6377 | M: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> |
| 6373 | 6378 | L: dri-devel@lists.freedesktop.org |
| 6374 | 6379 | L: linux-fbdev@vger.kernel.org |
| 6375 | −T: git git://github.com/bzolnier/linux.git | |
| 6380 | +T: git git://anongit.freedesktop.org/drm/drm-misc | |
| 6376 | 6381 | Q: http://patchwork.kernel.org/project/linux-fbdev/list/ |
| 6377 | 6382 | S: Maintained |
| 6378 | 6383 | F: Documentation/fb/ |
| @@ -6436,6 +6441,14 @@ S: Maintained · 57 unmodified lines | ||
| 6436 | 6441 | F: drivers/perf/fsl_imx8_ddr_perf.c |
| 6437 | 6442 | F: Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt |
| 6438 | 6443 | |
| 6444 | +FREESCALE IMX I2C DRIVER | |
| 6445 | +M: Oleksij Rempel <o.rempel@pengutronix.de> | |
| 6446 | +R: Pengutronix Kernel Team <kernel@pengutronix.de> | |
| 6447 | +L: linux-i2c@vger.kernel.org | |
| 6448 | +S: Maintained | |
| 6449 | +F: drivers/i2c/busses/i2c-imx.c | |
| 6450 | +F: Documentation/devicetree/bindings/i2c/i2c-imx.txt | |
| 6451 | + | |
| 6439 | 6452 | FREESCALE IMX LPI2C DRIVER |
| 6440 | 6453 | M: Dong Aisheng <aisheng.dong@nxp.com> |
| 6441 | 6454 | L: linux-i2c@vger.kernel.org |
| @@ -6822,13 +6835,6 @@ F: Documentation/filesystems/gfs2*.txt · 380 unmodified lines | ||
| 6822 | 6835 | F: fs/gfs2/ |
| 6823 | 6836 | F: include/uapi/linux/gfs2_ondisk.h |
| 6824 | 6837 | |
| 6825 | −GIGASET ISDN DRIVERS | |
| 6826 | −M: Paul Bolle <pebolle@tiscali.nl> | |
| 6827 | −L: gigaset307x-common@lists.sourceforge.net | |
| 6828 | −W: http://gigaset307x.sourceforge.net/ | |
| 6829 | −S: Odd Fixes | |
| 6830 | −F: drivers/staging/isdn/gigaset/ | |
| 6831 | − | |
| 6832 | 6838 | GNSS SUBSYSTEM |
| 6833 | 6839 | M: Johan Hovold <johan@kernel.org> |
| 6834 | 6840 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/johan/gnss.git |
| @@ -6856,7 +6862,7 @@ R: Sagi Shahar <sagis@google.com> · 21 unmodified lines | ||
| 6856 | 6862 | R: Jon Olson <jonolson@google.com> |
| 6857 | 6863 | L: netdev@vger.kernel.org |
| 6858 | 6864 | S: Supported |
| 6859 | −F: Documentation/networking/device_drivers/google/gve.txt | |
| 6865 | +F: Documentation/networking/device_drivers/google/gve.rst | |
| 6860 | 6866 | F: drivers/net/ethernet/google |
| 6861 | 6867 | |
| 6862 | 6868 | GPD POCKET FAN DRIVER |
| @@ -7454,7 +7460,7 @@ F: drivers/net/hyperv/ · 591 unmodified lines | ||
| 7454 | 7460 | F: drivers/scsi/storvsc_drv.c |
| 7455 | 7461 | F: drivers/uio/uio_hv_generic.c |
| 7456 | 7462 | F: drivers/video/fbdev/hyperv_fb.c |
| 7457 | −F: drivers/iommu/hyperv_iommu.c | |
| 7463 | +F: drivers/iommu/hyperv-iommu.c | |
| 7458 | 7464 | F: net/vmw_vsock/hyperv_transport.c |
| 7459 | 7465 | F: include/clocksource/hyperv_timer.h |
| 7460 | 7466 | F: include/linux/hyperv.h |
| @@ -7507,7 +7513,7 @@ I2C MV64XXX MARVELL AND ALLWINNER DRIVER · 46 unmodified lines | ||
| 7507 | 7513 | M: Gregory CLEMENT <gregory.clement@bootlin.com> |
| 7508 | 7514 | L: linux-i2c@vger.kernel.org |
| 7509 | 7515 | S: Maintained |
| 7510 | −F: Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt | |
| 7516 | +F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | |
| 7511 | 7517 | F: drivers/i2c/busses/i2c-mv64xxx.c |
| 7512 | 7518 | |
| 7513 | 7519 | I2C OVER PARALLEL PORT |
| @@ -8044,6 +8050,7 @@ S: Maintained · 530 unmodified lines | ||
| 8044 | 8050 | F: drivers/video/fbdev/i810/ |
| 8045 | 8051 | |
| 8046 | 8052 | INTEL ASoC DRIVERS |
| 8053 | +M: Cezary Rojewski <cezary.rojewski@intel.com> | |
| 8047 | 8054 | M: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> |
| 8048 | 8055 | M: Liam Girdwood <liam.r.girdwood@linux.intel.com> |
| 8049 | 8056 | M: Jie Yang <yang.jie@linux.intel.com> |
| @@ -8065,6 +8072,13 @@ T: git git://git.code.sf.net/p/intel-sas/isci · 15 unmodified lines | ||
| 8065 | 8072 | S: Supported |
| 8066 | 8073 | F: drivers/scsi/isci/ |
| 8067 | 8074 | |
| 8075 | +INTEL CPU family model numbers | |
| 8076 | +M: Tony Luck <tony.luck@intel.com> | |
| 8077 | +M: x86@kernel.org | |
| 8078 | +L: linux-kernel@vger.kernel.org | |
| 8079 | +S: Supported | |
| 8080 | +F: arch/x86/include/asm/intel-family.h | |
| 8081 | + | |
| 8068 | 8082 | INTEL DRM DRIVERS (excluding Poulsbo, Moorestown and derivative chipsets) |
| 8069 | 8083 | M: Jani Nikula <jani.nikula@linux.intel.com> |
| 8070 | 8084 | M: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> |
| @@ -8360,6 +8374,7 @@ M: Alexander Shishkin <alexander.shishkin@linux.intel.com> · 289 unmodified lines | ||
| 8360 | 8374 | S: Supported |
| 8361 | 8375 | F: Documentation/trace/intel_th.rst |
| 8362 | 8376 | F: drivers/hwtracing/intel_th/ |
| 8377 | +F: include/linux/intel_th.h | |
| 8363 | 8378 | |
| 8364 | 8379 | INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT) |
| 8365 | 8380 | M: Ning Sun <ning.sun@intel.com> |
| @@ -8416,7 +8431,6 @@ L: linux-xfs@vger.kernel.org · 50 unmodified lines | ||
| 8416 | 8431 | L: linux-fsdevel@vger.kernel.org |
| 8417 | 8432 | T: git git://git.kernel.org/pub/scm/fs/xfs/xfs-linux.git |
| 8418 | 8433 | S: Supported |
| 8419 | −F: fs/iomap.c | |
| 8420 | 8434 | F: fs/iomap/ |
| 8421 | 8435 | F: include/linux/iomap.h |
| 8422 | 8436 | |
| @@ -8441,11 +8455,6 @@ S: Maintained · 18 unmodified lines | ||
| 8441 | 8455 | F: fs/io_uring.c |
| 8442 | 8456 | F: include/uapi/linux/io_uring.h |
| 8443 | 8457 | |
| 8444 | −IP MASQUERADING | |
| 8445 | −M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> | |
| 8446 | −S: Maintained | |
| 8447 | −F: net/ipv4/netfilter/ipt_MASQUERADE.c | |
| 8448 | − | |
| 8449 | 8458 | IPMI SUBSYSTEM |
| 8450 | 8459 | M: Corey Minyard <minyard@acm.org> |
| 8451 | 8460 | L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers) |
| @@ -8490,7 +8499,7 @@ S: Obsolete · 38 unmodified lines | ||
| 8490 | 8499 | F: include/uapi/linux/ipx.h |
| 8491 | 8500 | |
| 8492 | 8501 | IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) |
| 8493 | −M: Marc Zyngier <marc.zyngier@arm.com> | |
| 8502 | +M: Marc Zyngier <maz@kernel.org> | |
| 8494 | 8503 | S: Maintained |
| 8495 | 8504 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core |
| 8496 | 8505 | F: Documentation/IRQ-domain.txt |
| @@ -8508,7 +8517,7 @@ F: kernel/irq/ · 11 unmodified lines | ||
| 8508 | 8517 | IRQCHIP DRIVERS |
| 8509 | 8518 | M: Thomas Gleixner <tglx@linutronix.de> |
| 8510 | 8519 | M: Jason Cooper <jason@lakedaemon.net> |
| 8511 | −M: Marc Zyngier <marc.zyngier@arm.com> | |
| 8520 | +M: Marc Zyngier <maz@kernel.org> | |
| 8512 | 8521 | L: linux-kernel@vger.kernel.org |
| 8513 | 8522 | S: Maintained |
| 8514 | 8523 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core |
| @@ -8808,7 +8817,7 @@ L: kvm@vger.kernel.org · 293 unmodified lines | ||
| 8808 | 8817 | W: http://www.linux-kvm.org |
| 8809 | 8818 | T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git |
| 8810 | 8819 | S: Supported |
| 8811 | −F: Documentation/virtual/kvm/ | |
| 8820 | +F: Documentation/virt/kvm/ | |
| 8812 | 8821 | F: include/trace/events/kvm.h |
| 8813 | 8822 | F: include/uapi/asm-generic/kvm* |
| 8814 | 8823 | F: include/uapi/linux/kvm* |
| @@ -8819,19 +8828,11 @@ F: virt/kvm/* · 4 unmodified lines | ||
| 8819 | 8828 | F: tools/kvm/ |
| 8820 | 8829 | F: tools/testing/selftests/kvm/ |
| 8821 | 8830 | |
| 8822 | −KERNEL VIRTUAL MACHINE FOR AMD-V (KVM/amd) | |
| 8823 | −M: Joerg Roedel <joro@8bytes.org> | |
| 8824 | −L: kvm@vger.kernel.org | |
| 8825 | −W: http://www.linux-kvm.org/ | |
| 8826 | −S: Maintained | |
| 8827 | −F: arch/x86/include/asm/svm.h | |
| 8828 | −F: arch/x86/kvm/svm.c | |
| 8829 | − | |
| 8830 | 8831 | KERNEL VIRTUAL MACHINE FOR ARM/ARM64 (KVM/arm, KVM/arm64) |
| 8831 | −M: Marc Zyngier <marc.zyngier@arm.com> | |
| 8832 | +M: Marc Zyngier <maz@kernel.org> | |
| 8832 | 8833 | R: James Morse <james.morse@arm.com> |
| 8833 | −R: Julien Thierry <julien.thierry@arm.com> | |
| 8834 | −R: Suzuki K Pouloze <suzuki.poulose@arm.com> | |
| 8834 | +R: Julien Thierry <julien.thierry.kdev@gmail.com> | |
| 8835 | +R: Suzuki K Poulose <suzuki.poulose@arm.com> | |
| 8835 | 8836 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| 8836 | 8837 | L: kvmarm@lists.cs.columbia.edu |
| 8837 | 8838 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git |
| @@ -8869,7 +8870,7 @@ M: Christian Borntraeger <borntraeger@de.ibm.com> · 31 unmodified lines | ||
| 8869 | 8870 | M: Janosch Frank <frankja@linux.ibm.com> |
| 8870 | 8871 | R: David Hildenbrand <david@redhat.com> |
| 8871 | 8872 | R: Cornelia Huck <cohuck@redhat.com> |
| 8872 | −L: linux-s390@vger.kernel.org | |
| 8873 | +L: kvm@vger.kernel.org | |
| 8873 | 8874 | W: http://www.ibm.com/developerworks/linux/linux390/ |
| 8874 | 8875 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git |
| 8875 | 8876 | S: Supported |
| @@ -8884,6 +8885,11 @@ F: tools/testing/selftests/kvm/*/s390x/ · 8 unmodified lines | ||
| 8884 | 8885 | KERNEL VIRTUAL MACHINE FOR X86 (KVM/x86) |
| 8885 | 8886 | M: Paolo Bonzini <pbonzini@redhat.com> |
| 8886 | 8887 | M: Radim Krčmář <rkrcmar@redhat.com> |
| 8888 | +R: Sean Christopherson <sean.j.christopherson@intel.com> | |
| 8889 | +R: Vitaly Kuznetsov <vkuznets@redhat.com> | |
| 8890 | +R: Wanpeng Li <wanpengli@tencent.com> | |
| 8891 | +R: Jim Mattson <jmattson@google.com> | |
| 8892 | +R: Joerg Roedel <joro@8bytes.org> | |
| 8887 | 8893 | L: kvm@vger.kernel.org |
| 8888 | 8894 | W: http://www.linux-kvm.org |
| 8889 | 8895 | T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git |
| @@ -8891,8 +8897,12 @@ S: Supported · 1 unmodified line | ||
| 8891 | 8897 | F: arch/x86/kvm/ |
| 8892 | 8898 | F: arch/x86/kvm/*/ |
| 8893 | 8899 | F: arch/x86/include/uapi/asm/kvm* |
| 8900 | +F: arch/x86/include/uapi/asm/vmx.h | |
| 8901 | +F: arch/x86/include/uapi/asm/svm.h | |
| 8894 | 8902 | F: arch/x86/include/asm/kvm* |
| 8895 | 8903 | F: arch/x86/include/asm/pvclock-abi.h |
| 8904 | +F: arch/x86/include/asm/svm.h | |
| 8905 | +F: arch/x86/include/asm/vmx.h | |
| 8896 | 8906 | F: arch/x86/kernel/kvm.c |
| 8897 | 8907 | F: arch/x86/kernel/kvmclock.c |
| 8898 | 8908 | |
| @@ -9220,6 +9230,18 @@ F: include/linux/nd.h · 321 unmodified lines | ||
| 9220 | 9230 | F: include/linux/libnvdimm.h |
| 9221 | 9231 | F: include/uapi/linux/ndctl.h |
| 9222 | 9232 | |
| 9233 | +LICENSES and SPDX stuff | |
| 9234 | +M: Thomas Gleixner <tglx@linutronix.de> | |
| 9235 | +M: Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| 9236 | +L: linux-spdx@vger.kernel.org | |
| 9237 | +S: Maintained | |
| 9238 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/spdx.git | |
| 9239 | +F: COPYING | |
| 9240 | +F: Documentation/process/license-rules.rst | |
| 9241 | +F: LICENSES/ | |
| 9242 | +F: scripts/spdxcheck-test.sh | |
| 9243 | +F: scripts/spdxcheck.py | |
| 9244 | + | |
| 9223 | 9245 | LIGHTNVM PLATFORM SUPPORT |
| 9224 | 9246 | M: Matias Bjorling <mb@lightnvm.io> |
| 9225 | 9247 | W: http://github/OpenChannelSSD |
| @@ -11072,7 +11094,7 @@ NET_FAILOVER MODULE · 1846 unmodified lines | ||
| 11072 | 11094 | M: Sridhar Samudrala <sridhar.samudrala@intel.com> |
| 11073 | 11095 | L: netdev@vger.kernel.org |
| 11074 | 11096 | S: Supported |
| 11075 | −F: driver/net/net_failover.c | |
| 11097 | +F: drivers/net/net_failover.c | |
| 11076 | 11098 | F: include/net/net_failover.h |
| 11077 | 11099 | F: Documentation/networking/net_failover.rst |
| 11078 | 11100 | |
| @@ -11144,6 +11166,7 @@ L: netdev@vger.kernel.org · 65 unmodified lines | ||
| 11144 | 11166 | S: Maintained |
| 11145 | 11167 | W: https://fedorahosted.org/dropwatch/ |
| 11146 | 11168 | F: net/core/drop_monitor.c |
| 11169 | +F: include/uapi/linux/net_dropmon.h | |
| 11147 | 11170 | |
| 11148 | 11171 | NETWORKING DRIVERS |
| 11149 | 11172 | M: "David S. Miller" <davem@davemloft.net> |
| @@ -11282,6 +11305,7 @@ M: Aviad Yehezkel <aviadye@mellanox.com> · 132 unmodified lines | ||
| 11282 | 11305 | M: Dave Watson <davejwatson@fb.com> |
| 11283 | 11306 | M: John Fastabend <john.fastabend@gmail.com> |
| 11284 | 11307 | M: Daniel Borkmann <daniel@iogearbox.net> |
| 11308 | +M: Jakub Kicinski <jakub.kicinski@netronome.com> | |
| 11285 | 11309 | L: netdev@vger.kernel.org |
| 11286 | 11310 | S: Maintained |
| 11287 | 11311 | F: net/tls/* |
| @@ -12137,7 +12161,7 @@ M: Thomas Hellstrom <thellstrom@vmware.com> · 849 unmodified lines | ||
| 12137 | 12161 | M: "VMware, Inc." <pv-drivers@vmware.com> |
| 12138 | 12162 | L: virtualization@lists.linux-foundation.org |
| 12139 | 12163 | S: Supported |
| 12140 | −F: Documentation/virtual/paravirt_ops.txt | |
| 12164 | +F: Documentation/virt/paravirt_ops.rst | |
| 12141 | 12165 | F: arch/*/kernel/paravirt* |
| 12142 | 12166 | F: arch/*/include/asm/paravirt*.h |
| 12143 | 12167 | F: include/linux/hypervisor.h |
| @@ -12394,7 +12418,7 @@ F: Documentation/PCI/pci-error-recovery.rst · 250 unmodified lines | ||
| 12394 | 12418 | F: drivers/pci/pcie/aer.c |
| 12395 | 12419 | F: drivers/pci/pcie/dpc.c |
| 12396 | 12420 | F: drivers/pci/pcie/err.c |
| 12397 | −F: Documentation/powerpc/eeh-pci-error-recovery.txt | |
| 12421 | +F: Documentation/powerpc/eeh-pci-error-recovery.rst | |
| 12398 | 12422 | F: arch/powerpc/kernel/eeh*.c |
| 12399 | 12423 | F: arch/powerpc/platforms/*/eeh*.c |
| 12400 | 12424 | F: arch/powerpc/include/*/eeh*.h |
| @@ -13725,6 +13749,7 @@ F: drivers/mtd/nand/raw/r852.c · 1324 unmodified lines | ||
| 13725 | 13749 | F: drivers/mtd/nand/raw/r852.h |
| 13726 | 13750 | |
| 13727 | 13751 | RISC-V ARCHITECTURE |
| 13752 | +M: Paul Walmsley <paul.walmsley@sifive.com> | |
| 13728 | 13753 | M: Palmer Dabbelt <palmer@sifive.com> |
| 13729 | 13754 | M: Albert Ou <aou@eecs.berkeley.edu> |
| 13730 | 13755 | L: linux-riscv@lists.infradead.org |
| @@ -13947,7 +13972,6 @@ F: drivers/pci/hotplug/s390_pci_hpc.c · 216 unmodified lines | ||
| 13947 | 13972 | |
| 13948 | 13973 | S390 VFIO-CCW DRIVER |
| 13949 | 13974 | M: Cornelia Huck <cohuck@redhat.com> |
| 13950 | −M: Farhan Ali <alifm@linux.ibm.com> | |
| 13951 | 13975 | M: Eric Farman <farman@linux.ibm.com> |
| 13952 | 13976 | R: Halil Pasic <pasic@linux.ibm.com> |
| 13953 | 13977 | L: linux-s390@vger.kernel.org |
| @@ -14016,6 +14040,12 @@ F: drivers/media/common/saa7146/ · 62 unmodified lines | ||
| 14016 | 14040 | F: drivers/media/pci/saa7146/ |
| 14017 | 14041 | F: include/media/drv-intf/saa7146* |
| 14018 | 14042 | |
| 14043 | +SAFESETID SECURITY MODULE | |
| 14044 | +M: Micah Morton <mortonm@chromium.org> | |
| 14045 | +S: Supported | |
| 14046 | +F: security/safesetid/ | |
| 14047 | +F: Documentation/admin-guide/LSM/SafeSetID.rst | |
| 14048 | + | |
| 14019 | 14049 | SAMSUNG AUDIO (ASoC) DRIVERS |
| 14020 | 14050 | M: Krzysztof Kozlowski <krzk@kernel.org> |
| 14021 | 14051 | M: Sangbeom Kim <sbkim73@samsung.com> |
| @@ -14456,6 +14486,7 @@ F: drivers/net/phy/phylink.c · 434 unmodified lines | ||
| 14456 | 14486 | F: drivers/net/phy/sfp* |
| 14457 | 14487 | F: include/linux/phylink.h |
| 14458 | 14488 | F: include/linux/sfp.h |
| 14489 | +K: phylink | |
| 14459 | 14490 | |
| 14460 | 14491 | SGI GRU DRIVER |
| 14461 | 14492 | M: Dimitri Sivanich <sivanich@sgi.com> |
| @@ -14861,9 +14892,9 @@ F: include/linux/arm_sdei.h · 399 unmodified lines | ||
| 14861 | 14892 | F: include/uapi/linux/arm_sdei.h |
| 14862 | 14893 | |
| 14863 | 14894 | SOFTWARE RAID (Multiple Disks) SUPPORT |
| 14864 | −M: Shaohua Li <shli@kernel.org> | |
| 14895 | +M: Song Liu <song@kernel.org> | |
| 14865 | 14896 | L: linux-raid@vger.kernel.org |
| 14866 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/shli/md.git | |
| 14897 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/song/md.git | |
| 14867 | 14898 | S: Supported |
| 14868 | 14899 | F: drivers/md/Makefile |
| 14869 | 14900 | F: drivers/md/Kconfig |
| @@ -16078,7 +16109,7 @@ S: Maintained · 1208 unmodified lines | ||
| 16078 | 16109 | F: drivers/net/ethernet/ti/netcp* |
| 16079 | 16110 | |
| 16080 | 16111 | TI PCM3060 ASoC CODEC DRIVER |
| 16081 | −M: Kirill Marinushkin <kmarinushkin@birdec.tech> | |
| 16112 | +M: Kirill Marinushkin <kmarinushkin@birdec.com> | |
| 16082 | 16113 | L: alsa-devel@alsa-project.org (moderated for non-subscribers) |
| 16083 | 16114 | S: Maintained |
| 16084 | 16115 | F: Documentation/devicetree/bindings/sound/pcm3060.txt |
| @@ -16854,7 +16885,7 @@ W: http://user-mode-linux.sourceforge.net · 769 unmodified lines | ||
| 16854 | 16885 | Q: https://patchwork.ozlabs.org/project/linux-um/list/ |
| 16855 | 16886 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml.git |
| 16856 | 16887 | S: Maintained |
| 16857 | −F: Documentation/virtual/uml/ | |
| 16888 | +F: Documentation/virt/uml/ | |
| 16858 | 16889 | F: arch/um/ |
| 16859 | 16890 | F: arch/x86/um/ |
| 16860 | 16891 | F: fs/hostfs/ |
| @@ -17123,7 +17154,7 @@ F: drivers/virtio/virtio_input.c · 262 unmodified lines | ||
| 17123 | 17154 | F: include/uapi/linux/virtio_input.h |
| 17124 | 17155 | |
| 17125 | 17156 | VIRTIO IOMMU DRIVER |
| 17126 | −M: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> | |
| 17157 | +M: Jean-Philippe Brucker <jean-philippe@linaro.org> | |
| 17127 | 17158 | L: virtualization@lists.linux-foundation.org |
| 17128 | 17159 | S: Maintained |
| 17129 | 17160 | F: drivers/iommu/virtio-iommu.c |
| @@ -17172,7 +17203,6 @@ F: drivers/vme/ · 42 unmodified lines | ||
| 17172 | 17203 | F: include/linux/vme* |
| 17173 | 17204 | |
| 17174 | 17205 | VMWARE BALLOON DRIVER |
| 17175 | −M: Julien Freche <jfreche@vmware.com> | |
| 17176 | 17206 | M: Nadav Amit <namit@vmware.com> |
| 17177 | 17207 | M: "VMware, Inc." <pv-drivers@vmware.com> |
| 17178 | 17208 | L: linux-kernel@vger.kernel.org |
| @@ -17555,7 +17585,6 @@ M: Jakub Kicinski <jakub.kicinski@netronome.com> · 376 unmodified lines | ||
| 17555 | 17585 | M: Jesper Dangaard Brouer <hawk@kernel.org> |
| 17556 | 17586 | M: John Fastabend <john.fastabend@gmail.com> |
| 17557 | 17587 | L: netdev@vger.kernel.org |
| 17558 | −L: xdp-newbies@vger.kernel.org | |
| 17559 | 17588 | L: bpf@vger.kernel.org |
| 17560 | 17589 | S: Supported |
| 17561 | 17590 | F: net/core/xdp.c |
| @@ -17692,6 +17721,17 @@ F: Documentation/devicetree/bindings/media/xilinx/ · 130 unmodified lines | ||
| 17692 | 17721 | F: drivers/media/platform/xilinx/ |
| 17693 | 17722 | F: include/uapi/linux/xilinx-v4l2-controls.h |
| 17694 | 17723 | |
| 17724 | +XILINX SD-FEC IP CORES | |
| 17725 | +M: Derek Kiernan <derek.kiernan@xilinx.com> | |
| 17726 | +M: Dragan Cvetic <dragan.cvetic@xilinx.com> | |
| 17727 | +S: Maintained | |
| 17728 | +F: Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt | |
| 17729 | +F: Documentation/misc-devices/xilinx_sdfec.rst | |
| 17730 | +F: drivers/misc/xilinx_sdfec.c | |
| 17731 | +F: drivers/misc/Kconfig | |
| 17732 | +F: drivers/misc/Makefile | |
| 17733 | +F: include/uapi/misc/xilinx_sdfec.h | |
| 17734 | + | |
| 17695 | 17735 | XILLYBUS DRIVER |
| 17696 | 17736 | M: Eli Billauer <eli.billauer@gmail.com> |
| 17697 | 17737 | L: linux-kernel@vger.kernel.org |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | VERSION = 5 |
| 3 | 3 | PATCHLEVEL = 3 |
| 4 | 4 | SUBLEVEL = 0 |
| 5 | −EXTRAVERSION = -rc1 | |
| 5 | +EXTRAVERSION = -rc7 | |
| 6 | 6 | NAME = Bobtail Squid |
| 7 | 7 | |
| 8 | 8 | # *DOCUMENTATION* |
| @@ -419,6 +419,7 @@ NM = $(CROSS_COMPILE)nm · 410 unmodified lines | ||
| 419 | 419 | STRIP = $(CROSS_COMPILE)strip |
| 420 | 420 | OBJCOPY = $(CROSS_COMPILE)objcopy |
| 421 | 421 | OBJDUMP = $(CROSS_COMPILE)objdump |
| 422 | +OBJSIZE = $(CROSS_COMPILE)size | |
| 422 | 423 | PAHOLE = pahole |
| 423 | 424 | LEX = flex |
| 424 | 425 | YACC = bison |
| @@ -472,11 +473,12 @@ KBUILD_CFLAGS_MODULE := -DMODULE · 47 unmodified lines | ||
| 472 | 473 | KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds |
| 473 | 474 | KBUILD_LDFLAGS := |
| 474 | 475 | GCC_PLUGINS_CFLAGS := |
| 476 | +CLANG_FLAGS := | |
| 475 | 477 | |
| 476 | 478 | export ARCH SRCARCH CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC |
| 477 | −export CPP AR NM STRIP OBJCOPY OBJDUMP PAHOLE KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS | |
| 478 | −export MAKE LEX YACC AWK INSTALLKERNEL PERL PYTHON PYTHON2 PYTHON3 UTS_MACHINE | |
| 479 | −export HOSTCXX KBUILD_HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS | |
| 479 | +export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE PAHOLE LEX YACC AWK INSTALLKERNEL | |
| 480 | +export PERL PYTHON PYTHON2 PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX | |
| 481 | +export KBUILD_HOSTCXXFLAGS KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS LDFLAGS_MODULE | |
| 480 | 482 | |
| 481 | 483 | export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS |
| 482 | 484 | export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE |
| @@ -519,7 +521,7 @@ endif · 36 unmodified lines | ||
| 519 | 521 | |
| 520 | 522 | ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),) |
| 521 | 523 | ifneq ($(CROSS_COMPILE),) |
| 522 | −CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE:%-=%)) | |
| 524 | +CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%)) | |
| 523 | 525 | GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit)) |
| 524 | 526 | CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR) |
| 525 | 527 | GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..) |
| @@ -843,6 +845,9 @@ NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include) · 317 unmodified lines | ||
| 843 | 845 | # warn about C99 declaration after statement |
| 844 | 846 | KBUILD_CFLAGS += -Wdeclaration-after-statement |
| 845 | 847 | |
| 848 | +# Warn about unmarked fall-throughs in switch statement. | |
| 849 | +KBUILD_CFLAGS += $(call cc-option,-Wimplicit-fallthrough,) | |
| 850 | + | |
| 846 | 851 | # Variable Length Arrays (VLAs) should not be used anywhere in the kernel |
| 847 | 852 | KBUILD_CFLAGS += -Wvla |
| 848 | 853 | |
| @@ -998,6 +1003,8 @@ endif · 149 unmodified lines | ||
| 998 | 1003 | |
| 999 | 1004 | PHONY += prepare0 |
| 1000 | 1005 | |
| 1006 | +export MODORDER := $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/)modules.order | |
| 1007 | + | |
| 1001 | 1008 | ifeq ($(KBUILD_EXTMOD),) |
| 1002 | 1009 | core-y += kernel/ certs/ mm/ fs/ ipc/ security/ crypto/ block/ |
| 1003 | 1010 | |
| @@ -1767,13 +1774,22 @@ build-dir = $(patsubst %/,%,$(dir $(build-target))) · 763 unmodified lines | ||
| 1767 | 1774 | $(Q)$(MAKE) $(build)=$(build-dir) $(build-target) |
| 1768 | 1775 | %.symtypes: prepare FORCE |
| 1769 | 1776 | $(Q)$(MAKE) $(build)=$(build-dir) $(build-target) |
| 1777 | +ifeq ($(KBUILD_EXTMOD),) | |
| 1778 | +# For the single build of an in-tree module, use a temporary file to avoid | |
| 1779 | +# the situation of modules_install installing an invalid modules.order. | |
| 1780 | +%.ko: MODORDER := .modules.tmp | |
| 1781 | +endif | |
| 1782 | +%.ko: prepare FORCE | |
| 1783 | + $(Q)$(MAKE) $(build)=$(build-dir) $(build-target:.ko=.mod) | |
| 1784 | + $(Q)echo $(build-target) > $(MODORDER) | |
| 1785 | + $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost | |
| 1770 | 1786 | |
| 1771 | 1787 | # Modules |
| 1772 | 1788 | PHONY += / |
| 1773 | 1789 | /: ./ |
| 1774 | 1790 | |
| 1775 | 1791 | %/: prepare FORCE |
| 1776 | − $(Q)$(MAKE) KBUILD_MODULES=1 $(build)=$(build-dir) | |
| 1792 | + $(Q)$(MAKE) KBUILD_MODULES=1 $(build)=$(build-dir) need-modorder=1 | |
| 1777 | 1793 | |
| 1778 | 1794 | # FIXME Should go into a make.lib or something |
| 1779 | 1795 | # =========================================================================== |
| @@ -12,3 +12,6 @@ dtb-y := $(builtindtb-y).dtb · 11 unmodified lines | ||
| 12 | 12 | # for CONFIG_OF_ALL_DTBS test |
| 13 | 13 | dtstree := $(srctree)/$(src) |
| 14 | 14 | dtb- := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) |
| 15 | + | |
| 16 | +# board-specific dtc flags | |
| 17 | +DTC_FLAGS_hsdk += --pad 20 | |
| @@ -256,7 +256,7 @@ · 255 unmodified lines | ||
| 256 | 256 | |
| 257 | 257 | .macro FAKE_RET_FROM_EXCPN |
| 258 | 258 | lr r9, [status32] |
| 259 | − bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK) | |
| 259 | + bic r9, r9, STATUS_AE_MASK | |
| 260 | 260 | or r9, r9, STATUS_IE_MASK |
| 261 | 261 | kflag r9 |
| 262 | 262 | .endm |
| @@ -62,15 +62,15 @@ · 61 unmodified lines | ||
| 62 | 62 | #else /* !__ASSEMBLY__ */ |
| 63 | 63 | |
| 64 | 64 | #ifdef CONFIG_ARC_HAS_ICCM |
| 65 | −#define __arcfp_code __attribute__((__section__(".text.arcfp"))) | |
| 65 | +#define __arcfp_code __section(.text.arcfp) | |
| 66 | 66 | #else |
| 67 | −#define __arcfp_code __attribute__((__section__(".text"))) | |
| 67 | +#define __arcfp_code __section(.text) | |
| 68 | 68 | #endif |
| 69 | 69 | |
| 70 | 70 | #ifdef CONFIG_ARC_HAS_DCCM |
| 71 | −#define __arcfp_data __attribute__((__section__(".data.arcfp"))) | |
| 71 | +#define __arcfp_data __section(.data.arcfp) | |
| 72 | 72 | #else |
| 73 | −#define __arcfp_data __attribute__((__section__(".data"))) | |
| 73 | +#define __arcfp_data __section(.data) | |
| 74 | 74 | #endif |
| 75 | 75 | |
| 76 | 76 | #endif /* __ASSEMBLY__ */ |
| @@ -53,8 +53,7 @@ extern const struct machine_desc __arch_info_begin[], __arch_info_end[]; · 52 unmodified lines | ||
| 53 | 53 | */ |
| 54 | 54 | #define MACHINE_START(_type, _name) \ |
| 55 | 55 | static const struct machine_desc __mach_desc_##_type \ |
| 56 | −__used \ | |
| 57 | −__attribute__((__section__(".arch.info.init"))) = { \ | |
| 56 | +__used __section(.arch.info.init) = { \ | |
| 58 | 57 | .name = _name, |
| 59 | 58 | |
| 60 | 59 | #define MACHINE_END \ |
| @@ -202,8 +202,8 @@ static void idu_set_dest(unsigned int cmn_irq, unsigned int cpu_mask) · 201 unmodified lines | ||
| 202 | 202 | __mcip_cmd_data(CMD_IDU_SET_DEST, cmn_irq, cpu_mask); |
| 203 | 203 | } |
| 204 | 204 | |
| 205 | −static void idu_set_mode(unsigned int cmn_irq, unsigned int lvl, | |
| 206 | − unsigned int distr) | |
| 205 | +static void idu_set_mode(unsigned int cmn_irq, bool set_lvl, unsigned int lvl, | |
| 206 | + bool set_distr, unsigned int distr) | |
| 207 | 207 | { |
| 208 | 208 | union { |
| 209 | 209 | unsigned int word; |
| @@ -212,8 +212,11 @@ static void idu_set_mode(unsigned int cmn_irq, unsigned int lvl, · 2 unmodified lines | ||
| 212 | 212 | }; |
| 213 | 213 | } data; |
| 214 | 214 | |
| 215 | − data.distr = distr; | |
| 216 | − data.lvl = lvl; | |
| 215 | + data.word = __mcip_cmd_read(CMD_IDU_READ_MODE, cmn_irq); | |
| 216 | + if (set_distr) | |
| 217 | + data.distr = distr; | |
| 218 | + if (set_lvl) | |
| 219 | + data.lvl = lvl; | |
| 217 | 220 | __mcip_cmd_data(CMD_IDU_SET_MODE, cmn_irq, data.word); |
| 218 | 221 | } |
| 219 | 222 | |
| @@ -240,6 +243,25 @@ static void idu_irq_unmask(struct irq_data *data) · 20 unmodified lines | ||
| 240 | 243 | raw_spin_unlock_irqrestore(&mcip_lock, flags); |
| 241 | 244 | } |
| 242 | 245 | |
| 246 | +static void idu_irq_ack(struct irq_data *data) | |
| 247 | +{ | |
| 248 | + unsigned long flags; | |
| 249 | + | |
| 250 | + raw_spin_lock_irqsave(&mcip_lock, flags); | |
| 251 | + __mcip_cmd(CMD_IDU_ACK_CIRQ, data->hwirq); | |
| 252 | + raw_spin_unlock_irqrestore(&mcip_lock, flags); | |
| 253 | +} | |
| 254 | + | |
| 255 | +static void idu_irq_mask_ack(struct irq_data *data) | |
| 256 | +{ | |
| 257 | + unsigned long flags; | |
| 258 | + | |
| 259 | + raw_spin_lock_irqsave(&mcip_lock, flags); | |
| 260 | + __mcip_cmd_data(CMD_IDU_SET_MASK, data->hwirq, 1); | |
| 261 | + __mcip_cmd(CMD_IDU_ACK_CIRQ, data->hwirq); | |
| 262 | + raw_spin_unlock_irqrestore(&mcip_lock, flags); | |
| 263 | +} | |
| 264 | + | |
| 243 | 265 | static int |
| 244 | 266 | idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask, |
| 245 | 267 | bool force) |
| @@ -263,13 +285,36 @@ idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask, · 17 unmodified lines | ||
| 263 | 285 | else |
| 264 | 286 | distribution_mode = IDU_M_DISTRI_RR; |
| 265 | 287 | |
| 266 | − idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, distribution_mode); | |
| 288 | + idu_set_mode(data->hwirq, false, 0, true, distribution_mode); | |
| 267 | 289 | |
| 268 | 290 | raw_spin_unlock_irqrestore(&mcip_lock, flags); |
| 269 | 291 | |
| 270 | 292 | return IRQ_SET_MASK_OK; |
| 271 | 293 | } |
| 272 | 294 | |
| 295 | +static int idu_irq_set_type(struct irq_data *data, u32 type) | |
| 296 | +{ | |
| 297 | + unsigned long flags; | |
| 298 | + | |
| 299 | + /* | |
| 300 | + * ARCv2 IDU HW does not support inverse polarity, so these are the | |
| 301 | + * only interrupt types supported. | |
| 302 | + */ | |
| 303 | + if (type & ~(IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)) | |
| 304 | + return -EINVAL; | |
| 305 | + | |
| 306 | + raw_spin_lock_irqsave(&mcip_lock, flags); | |
| 307 | + | |
| 308 | + idu_set_mode(data->hwirq, true, | |
| 309 | + type & IRQ_TYPE_EDGE_RISING ? IDU_M_TRIG_EDGE : | |
| 310 | + IDU_M_TRIG_LEVEL, | |
| 311 | + false, 0); | |
| 312 | + | |
| 313 | + raw_spin_unlock_irqrestore(&mcip_lock, flags); | |
| 314 | + | |
| 315 | + return 0; | |
| 316 | +} | |
| 317 | + | |
| 273 | 318 | static void idu_irq_enable(struct irq_data *data) |
| 274 | 319 | { |
| 275 | 320 | /* |
| @@ -289,7 +334,10 @@ static struct irq_chip idu_irq_chip = { · 13 unmodified lines | ||
| 289 | 334 | .name = "MCIP IDU Intc", |
| 290 | 335 | .irq_mask = idu_irq_mask, |
| 291 | 336 | .irq_unmask = idu_irq_unmask, |
| 337 | + .irq_ack = idu_irq_ack, | |
| 338 | + .irq_mask_ack = idu_irq_mask_ack, | |
| 292 | 339 | .irq_enable = idu_irq_enable, |
| 340 | + .irq_set_type = idu_irq_set_type, | |
| 293 | 341 | #ifdef CONFIG_SMP |
| 294 | 342 | .irq_set_affinity = idu_irq_set_affinity, |
| 295 | 343 | #endif |
| @@ -317,7 +365,7 @@ static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t · 21 unmodified lines | ||
| 317 | 365 | } |
| 318 | 366 | |
| 319 | 367 | static const struct irq_domain_ops idu_irq_ops = { |
| 320 | − .xlate = irq_domain_xlate_onecell, | |
| 368 | + .xlate = irq_domain_xlate_onetwocell, | |
| 321 | 369 | .map = idu_irq_map, |
| 322 | 370 | }; |
| 323 | 371 | |
| @@ -572,6 +572,7 @@ static unsigned long read_pointer(const u8 **pLoc, const void *end, · 571 unmodified lines | ||
| 572 | 572 | #else |
| 573 | 573 | BUILD_BUG_ON(sizeof(u32) != sizeof(value)); |
| 574 | 574 | #endif |
| 575 | + /* Fall through */ | |
| 575 | 576 | case DW_EH_PE_native: |
| 576 | 577 | if (end < (const void *)(ptr.pul + 1)) |
| 577 | 578 | return 0; |
| @@ -826,7 +827,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc, · 248 unmodified lines | ||
| 826 | 827 | case DW_CFA_def_cfa: |
| 827 | 828 | state->cfa.reg = get_uleb128(&ptr.p8, end); |
| 828 | 829 | unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg); |
| 829 | − /*nobreak*/ | |
| 830 | + /* fall through */ | |
| 830 | 831 | case DW_CFA_def_cfa_offset: |
| 831 | 832 | state->cfa.offs = get_uleb128(&ptr.p8, end); |
| 832 | 833 | unw_debug("cfa_def_cfa_offset: 0x%lx ", |
| @@ -834,7 +835,7 @@ static int processCFI(const u8 *start, const u8 *end, unsigned long targetLoc, · 1 unmodified line | ||
| 834 | 835 | break; |
| 835 | 836 | case DW_CFA_def_cfa_sf: |
| 836 | 837 | state->cfa.reg = get_uleb128(&ptr.p8, end); |
| 837 | − /*nobreak */ | |
| 838 | + /* fall through */ | |
| 838 | 839 | case DW_CFA_def_cfa_offset_sf: |
| 839 | 840 | state->cfa.offs = get_sleb128(&ptr.p8, end) |
| 840 | 841 | * state->dataAlign; |
| @@ -101,7 +101,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, · 100 unmodified lines | ||
| 101 | 101 | if (is_isa_arcv2() && ioc_enable && coherent) |
| 102 | 102 | dev->dma_coherent = true; |
| 103 | 103 | |
| 104 | − dev_info(dev, "use %sncoherent DMA ops\n", | |
| 104 | + dev_info(dev, "use %scoherent DMA ops\n", | |
| 105 | 105 | dev->dma_coherent ? "" : "non"); |
| 106 | 106 | } |
| 107 | 107 | |
| @@ -6,11 +6,15 @@ · 5 unmodified lines | ||
| 6 | 6 | */ |
| 7 | 7 | |
| 8 | 8 | #include <linux/init.h> |
| 9 | +#include <linux/of_fdt.h> | |
| 10 | +#include <linux/libfdt.h> | |
| 9 | 11 | #include <linux/smp.h> |
| 10 | 12 | #include <asm/arcregs.h> |
| 11 | 13 | #include <asm/io.h> |
| 12 | 14 | #include <asm/mach_desc.h> |
| 13 | 15 | |
| 16 | +int arc_hsdk_axi_dmac_coherent __section(.data) = 0; | |
| 17 | + | |
| 14 | 18 | #define ARC_CCM_UNUSED_ADDR 0x60000000 |
| 15 | 19 | |
| 16 | 20 | static void __init hsdk_init_per_cpu(unsigned int cpu) |
| @@ -97,6 +101,42 @@ static void __init hsdk_enable_gpio_intc_wire(void) · 80 unmodified lines | ||
| 97 | 101 | iowrite32(GPIO_INT_CONNECTED_MASK, (void __iomem *) GPIO_INTEN); |
| 98 | 102 | } |
| 99 | 103 | |
| 104 | +static int __init hsdk_tweak_node_coherency(const char *path, bool coherent) | |
| 105 | +{ | |
| 106 | + void *fdt = initial_boot_params; | |
| 107 | + const void *prop; | |
| 108 | + int node, ret; | |
| 109 | + bool dt_coh_set; | |
| 110 | + | |
| 111 | + node = fdt_path_offset(fdt, path); | |
| 112 | + if (node < 0) | |
| 113 | + goto tweak_fail; | |
| 114 | + | |
| 115 | + prop = fdt_getprop(fdt, node, "dma-coherent", &ret); | |
| 116 | + if (!prop && ret != -FDT_ERR_NOTFOUND) | |
| 117 | + goto tweak_fail; | |
| 118 | + | |
| 119 | + dt_coh_set = ret != -FDT_ERR_NOTFOUND; | |
| 120 | + ret = 0; | |
| 121 | + | |
| 122 | + /* need to remove "dma-coherent" property */ | |
| 123 | + if (dt_coh_set && !coherent) | |
| 124 | + ret = fdt_delprop(fdt, node, "dma-coherent"); | |
| 125 | + | |
| 126 | + /* need to set "dma-coherent" property */ | |
| 127 | + if (!dt_coh_set && coherent) | |
| 128 | + ret = fdt_setprop(fdt, node, "dma-coherent", NULL, 0); | |
| 129 | + | |
| 130 | + if (ret < 0) | |
| 131 | + goto tweak_fail; | |
| 132 | + | |
| 133 | + return 0; | |
| 134 | + | |
| 135 | +tweak_fail: | |
| 136 | + pr_err("failed to tweak %s to %scoherent\n", path, coherent ? "" : "non"); | |
| 137 | + return -EFAULT; | |
| 138 | +} | |
| 139 | + | |
| 100 | 140 | enum hsdk_axi_masters { |
| 101 | 141 | M_HS_CORE = 0, |
| 102 | 142 | M_HS_RTT, |
| @@ -162,6 +202,39 @@ enum hsdk_axi_masters { · 59 unmodified lines | ||
| 162 | 202 | #define CREG_PAE ((void __iomem *)(CREG_BASE + 0x180)) |
| 163 | 203 | #define CREG_PAE_UPDT ((void __iomem *)(CREG_BASE + 0x194)) |
| 164 | 204 | |
| 205 | +static void __init hsdk_init_memory_bridge_axi_dmac(void) | |
| 206 | +{ | |
| 207 | + bool coherent = !!arc_hsdk_axi_dmac_coherent; | |
| 208 | + u32 axi_m_slv1, axi_m_oft1; | |
| 209 | + | |
| 210 | + /* | |
| 211 | + * Don't tweak memory bridge configuration if we failed to tweak DTB | |
| 212 | + * as we will end up in a inconsistent state. | |
| 213 | + */ | |
| 214 | + if (hsdk_tweak_node_coherency("/soc/dmac@80000", coherent)) | |
| 215 | + return; | |
| 216 | + | |
| 217 | + if (coherent) { | |
| 218 | + axi_m_slv1 = 0x77999999; | |
| 219 | + axi_m_oft1 = 0x76DCBA98; | |
| 220 | + } else { | |
| 221 | + axi_m_slv1 = 0x77777777; | |
| 222 | + axi_m_oft1 = 0x76543210; | |
| 223 | + } | |
| 224 | + | |
| 225 | + writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_0)); | |
| 226 | + writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_0)); | |
| 227 | + writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_0)); | |
| 228 | + writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_0)); | |
| 229 | + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_0)); | |
| 230 | + | |
| 231 | + writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_1)); | |
| 232 | + writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_1)); | |
| 233 | + writel(axi_m_slv1, CREG_AXI_M_SLV1(M_DMAC_1)); | |
| 234 | + writel(axi_m_oft1, CREG_AXI_M_OFT1(M_DMAC_1)); | |
| 235 | + writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_1)); | |
| 236 | +} | |
| 237 | + | |
| 165 | 238 | static void __init hsdk_init_memory_bridge(void) |
| 166 | 239 | { |
| 167 | 240 | u32 reg; |
| @@ -227,24 +300,14 @@ static void __init hsdk_init_memory_bridge(void) · 59 unmodified lines | ||
| 227 | 300 | writel(0x76543210, CREG_AXI_M_OFT1(M_GPU)); |
| 228 | 301 | writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_GPU)); |
| 229 | 302 | |
| 230 | − writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_0)); | |
| 231 | − writel(0x77777777, CREG_AXI_M_SLV1(M_DMAC_0)); | |
| 232 | − writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_0)); | |
| 233 | − writel(0x76543210, CREG_AXI_M_OFT1(M_DMAC_0)); | |
| 234 | − writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_0)); | |
| 235 | − | |
| 236 | − writel(0x77777777, CREG_AXI_M_SLV0(M_DMAC_1)); | |
| 237 | − writel(0x77777777, CREG_AXI_M_SLV1(M_DMAC_1)); | |
| 238 | − writel(0xFEDCBA98, CREG_AXI_M_OFT0(M_DMAC_1)); | |
| 239 | − writel(0x76543210, CREG_AXI_M_OFT1(M_DMAC_1)); | |
| 240 | − writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_1)); | |
| 241 | − | |
| 242 | 303 | writel(0x00000000, CREG_AXI_M_SLV0(M_DVFS)); |
| 243 | 304 | writel(0x60000000, CREG_AXI_M_SLV1(M_DVFS)); |
| 244 | 305 | writel(0x00000000, CREG_AXI_M_OFT0(M_DVFS)); |
| 245 | 306 | writel(0x00000000, CREG_AXI_M_OFT1(M_DVFS)); |
| 246 | 307 | writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DVFS)); |
| 247 | 308 | |
| 309 | + hsdk_init_memory_bridge_axi_dmac(); | |
| 310 | + | |
| 248 | 311 | /* |
| 249 | 312 | * PAE remapping for DMA clients does not work due to an RTL bug, so |
| 250 | 313 | * CREG_PAE register must be programmed to all zeroes, otherwise it |
| @@ -7,6 +7,8 @@ config ARM · 6 unmodified lines | ||
| 7 | 7 | select ARCH_HAS_BINFMT_FLAT |
| 8 | 8 | select ARCH_HAS_DEBUG_VIRTUAL if MMU |
| 9 | 9 | select ARCH_HAS_DEVMEM_IS_ALLOWED |
| 10 | + select ARCH_HAS_DMA_COHERENT_TO_PFN if SWIOTLB | |
| 11 | + select ARCH_HAS_DMA_MMAP_PGPROT if SWIOTLB | |
| 10 | 12 | select ARCH_HAS_ELF_RANDOMIZE |
| 11 | 13 | select ARCH_HAS_FORTIFY_SOURCE |
| 12 | 14 | select ARCH_HAS_KEEPINITRD |
| @@ -18,6 +20,8 @@ config ARM · 5 unmodified lines | ||
| 18 | 20 | select ARCH_HAS_SET_MEMORY |
| 19 | 21 | select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL |
| 20 | 22 | select ARCH_HAS_STRICT_MODULE_RWX if MMU |
| 23 | + select ARCH_HAS_SYNC_DMA_FOR_DEVICE if SWIOTLB | |
| 24 | + select ARCH_HAS_SYNC_DMA_FOR_CPU if SWIOTLB | |
| 21 | 25 | select ARCH_HAS_TEARDOWN_DMA_OPS if MMU |
| 22 | 26 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
| 23 | 27 | select ARCH_HAVE_CUSTOM_GPIO_H |
| @@ -1535,7 +1535,6 @@ config DEBUG_LL_INCLUDE · 1534 unmodified lines | ||
| 1535 | 1535 | DEBUG_IMX7D_UART |
| 1536 | 1536 | default "debug/ks8695.S" if DEBUG_KS8695_UART |
| 1537 | 1537 | default "debug/msm.S" if DEBUG_QCOM_UARTDM |
| 1538 | − default "debug/netx.S" if DEBUG_NETX_UART | |
| 1539 | 1538 | default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART |
| 1540 | 1539 | default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2 |
| 1541 | 1540 | default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF0 |
| @@ -1575,7 +1574,6 @@ config DEBUG_UART_8250 · 33 unmodified lines | ||
| 1575 | 1574 | |
| 1576 | 1575 | config DEBUG_UART_PHYS |
| 1577 | 1576 | hex "Physical base address of debug UART" |
| 1578 | − default 0x00100a00 if DEBUG_NETX_UART | |
| 1579 | 1577 | default 0x01c20000 if DEBUG_DAVINCI_DMx_UART0 |
| 1580 | 1578 | default 0x01c28000 if DEBUG_SUNXI_UART0 |
| 1581 | 1579 | default 0x01c28400 if DEBUG_SUNXI_UART1 |
| @@ -1700,7 +1698,6 @@ config DEBUG_UART_PHYS · 118 unmodified lines | ||
| 1700 | 1698 | DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ |
| 1701 | 1699 | DEBUG_LL_UART_EFM32 || \ |
| 1702 | 1700 | DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ |
| 1703 | − DEBUG_NETX_UART || \ | |
| 1704 | 1701 | DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \ |
| 1705 | 1702 | DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \ |
| 1706 | 1703 | DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF1 || \ |
| @@ -1717,7 +1714,6 @@ config DEBUG_UART_VIRT · 10 unmodified lines | ||
| 1717 | 1714 | default 0xc881f000 if DEBUG_RV1108_UART2 |
| 1718 | 1715 | default 0xc8821000 if DEBUG_RV1108_UART1 |
| 1719 | 1716 | default 0xc8912000 if DEBUG_RV1108_UART0 |
| 1720 | − default 0xe0000a00 if DEBUG_NETX_UART | |
| 1721 | 1717 | default 0xe0010fe0 if ARCH_RPC |
| 1722 | 1718 | default 0xf0000be0 if ARCH_EBSA110 |
| 1723 | 1719 | default 0xf0010000 if DEBUG_ASM9260_UART |
| @@ -1822,7 +1818,6 @@ config DEBUG_UART_VIRT · 98 unmodified lines | ||
| 1822 | 1818 | default DEBUG_UART_PHYS if !MMU |
| 1823 | 1819 | depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ |
| 1824 | 1820 | DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ |
| 1825 | − DEBUG_NETX_UART || \ | |
| 1826 | 1821 | DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \ |
| 1827 | 1822 | DEBUG_S3C64XX_UART || \ |
| 1828 | 1823 | DEBUG_BCM63XX_UART || DEBUG_ASM9260_UART || \ |
| @@ -185,7 +185,7 @@ · 184 unmodified lines | ||
| 185 | 185 | uart0: serial@0 { |
| 186 | 186 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 187 | 187 | clock-frequency = <48000000>; |
| 188 | − reg = <0x0 0x2000>; | |
| 188 | + reg = <0x0 0x1000>; | |
| 189 | 189 | interrupts = <72>; |
| 190 | 190 | status = "disabled"; |
| 191 | 191 | dmas = <&edma 26 0>, <&edma 27 0>; |
| @@ -934,7 +934,7 @@ · 742 unmodified lines | ||
| 934 | 934 | uart1: serial@0 { |
| 935 | 935 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 936 | 936 | clock-frequency = <48000000>; |
| 937 | − reg = <0x0 0x2000>; | |
| 937 | + reg = <0x0 0x1000>; | |
| 938 | 938 | interrupts = <73>; |
| 939 | 939 | status = "disabled"; |
| 940 | 940 | dmas = <&edma 28 0>, <&edma 29 0>; |
| @@ -966,7 +966,7 @@ · 25 unmodified lines | ||
| 966 | 966 | uart2: serial@0 { |
| 967 | 967 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 968 | 968 | clock-frequency = <48000000>; |
| 969 | − reg = <0x0 0x2000>; | |
| 969 | + reg = <0x0 0x1000>; | |
| 970 | 970 | interrupts = <74>; |
| 971 | 971 | status = "disabled"; |
| 972 | 972 | dmas = <&edma 30 0>, <&edma 31 0>; |
| @@ -1614,7 +1614,7 @@ · 641 unmodified lines | ||
| 1614 | 1614 | uart3: serial@0 { |
| 1615 | 1615 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 1616 | 1616 | clock-frequency = <48000000>; |
| 1617 | − reg = <0x0 0x2000>; | |
| 1617 | + reg = <0x0 0x1000>; | |
| 1618 | 1618 | interrupts = <44>; |
| 1619 | 1619 | status = "disabled"; |
| 1620 | 1620 | }; |
| @@ -1644,7 +1644,7 @@ · 23 unmodified lines | ||
| 1644 | 1644 | uart4: serial@0 { |
| 1645 | 1645 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 1646 | 1646 | clock-frequency = <48000000>; |
| 1647 | − reg = <0x0 0x2000>; | |
| 1647 | + reg = <0x0 0x1000>; | |
| 1648 | 1648 | interrupts = <45>; |
| 1649 | 1649 | status = "disabled"; |
| 1650 | 1650 | }; |
| @@ -1674,7 +1674,7 @@ · 23 unmodified lines | ||
| 1674 | 1674 | uart5: serial@0 { |
| 1675 | 1675 | compatible = "ti,am3352-uart", "ti,omap3-uart"; |
| 1676 | 1676 | clock-frequency = <48000000>; |
| 1677 | − reg = <0x0 0x2000>; | |
| 1677 | + reg = <0x0 0x1000>; | |
| 1678 | 1678 | interrupts = <46>; |
| 1679 | 1679 | status = "disabled"; |
| 1680 | 1680 | }; |
| @@ -1758,6 +1758,8 @@ · 77 unmodified lines | ||
| 1758 | 1758 | |
| 1759 | 1759 | target-module@cc000 { /* 0x481cc000, ap 60 46.0 */ |
| 1760 | 1760 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 1761 | + reg = <0xcc020 0x4>; | |
| 1762 | + reg-names = "rev"; | |
| 1761 | 1763 | ti,hwmods = "d_can0"; |
| 1762 | 1764 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1763 | 1765 | clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>, |
| @@ -1780,6 +1782,8 @@ · 16 unmodified lines | ||
| 1780 | 1782 | |
| 1781 | 1783 | target-module@d0000 { /* 0x481d0000, ap 62 42.0 */ |
| 1782 | 1784 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 1785 | + reg = <0xd0020 0x4>; | |
| 1786 | + reg-names = "rev"; | |
| 1783 | 1787 | ti,hwmods = "d_can1"; |
| 1784 | 1788 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1785 | 1789 | clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>, |
| @@ -234,13 +234,33 @@ · 233 unmodified lines | ||
| 234 | 234 | interrupt-names = "edma3_tcerrint"; |
| 235 | 235 | }; |
| 236 | 236 | |
| 237 | − mmc3: mmc@47810000 { | |
| 238 | − compatible = "ti,omap4-hsmmc"; | |
| 237 | + target-module@47810000 { | |
| 238 | + compatible = "ti,sysc-omap2", "ti,sysc"; | |
| 239 | 239 | ti,hwmods = "mmc3"; |
| 240 | − ti,needs-special-reset; | |
| 241 | − interrupts = <29>; | |
| 242 | − reg = <0x47810000 0x1000>; | |
| 243 | − status = "disabled"; | |
| 240 | + reg = <0x478102fc 0x4>, | |
| 241 | + <0x47810110 0x4>, | |
| 242 | + <0x47810114 0x4>; | |
| 243 | + reg-names = "rev", "sysc", "syss"; | |
| 244 | + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | | |
| 245 | + SYSC_OMAP2_ENAWAKEUP | | |
| 246 | + SYSC_OMAP2_SOFTRESET | | |
| 247 | + SYSC_OMAP2_AUTOIDLE)>; | |
| 248 | + ti,sysc-sidle = <SYSC_IDLE_FORCE>, | |
| 249 | + <SYSC_IDLE_NO>, | |
| 250 | + <SYSC_IDLE_SMART>; | |
| 251 | + ti,syss-mask = <1>; | |
| 252 | + clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>; | |
| 253 | + clock-names = "fck"; | |
| 254 | + #address-cells = <1>; | |
| 255 | + #size-cells = <1>; | |
| 256 | + ranges = <0x0 0x47810000 0x1000>; | |
| 257 | + | |
| 258 | + mmc3: mmc@0 { | |
| 259 | + compatible = "ti,omap4-hsmmc"; | |
| 260 | + ti,needs-special-reset; | |
| 261 | + interrupts = <29>; | |
| 262 | + reg = <0x0 0x1000>; | |
| 263 | + }; | |
| 244 | 264 | }; |
| 245 | 265 | |
| 246 | 266 | usb: usb@47400000 { |
| @@ -228,13 +228,33 @@ · 227 unmodified lines | ||
| 228 | 228 | interrupt-names = "edma3_tcerrint"; |
| 229 | 229 | }; |
| 230 | 230 | |
| 231 | − mmc3: mmc@47810000 { | |
| 232 | − compatible = "ti,omap4-hsmmc"; | |
| 233 | − reg = <0x47810000 0x1000>; | |
| 231 | + target-module@47810000 { | |
| 232 | + compatible = "ti,sysc-omap2", "ti,sysc"; | |
| 234 | 233 | ti,hwmods = "mmc3"; |
| 235 | − ti,needs-special-reset; | |
| 236 | − interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
| 237 | − status = "disabled"; | |
| 234 | + reg = <0x478102fc 0x4>, | |
| 235 | + <0x47810110 0x4>, | |
| 236 | + <0x47810114 0x4>; | |
| 237 | + reg-names = "rev", "sysc", "syss"; | |
| 238 | + ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY | | |
| 239 | + SYSC_OMAP2_ENAWAKEUP | | |
| 240 | + SYSC_OMAP2_SOFTRESET | | |
| 241 | + SYSC_OMAP2_AUTOIDLE)>; | |
| 242 | + ti,sysc-sidle = <SYSC_IDLE_FORCE>, | |
| 243 | + <SYSC_IDLE_NO>, | |
| 244 | + <SYSC_IDLE_SMART>; | |
| 245 | + ti,syss-mask = <1>; | |
| 246 | + clocks = <&l3s_clkctrl AM4_L3S_MMC3_CLKCTRL 0>; | |
| 247 | + clock-names = "fck"; | |
| 248 | + #address-cells = <1>; | |
| 249 | + #size-cells = <1>; | |
| 250 | + ranges = <0x0 0x47810000 0x1000>; | |
| 251 | + | |
| 252 | + mmc3: mmc@0 { | |
| 253 | + compatible = "ti,omap4-hsmmc"; | |
| 254 | + ti,needs-special-reset; | |
| 255 | + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | |
| 256 | + reg = <0x0 0x1000>; | |
| 257 | + }; | |
| 238 | 258 | }; |
| 239 | 259 | |
| 240 | 260 | sham: sham@53100000 { |
| @@ -1574,6 +1574,8 @@ · 1573 unmodified lines | ||
| 1574 | 1574 | |
| 1575 | 1575 | target-module@cc000 { /* 0x481cc000, ap 50 46.0 */ |
| 1576 | 1576 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 1577 | + reg = <0xcc020 0x4>; | |
| 1578 | + reg-names = "rev"; | |
| 1577 | 1579 | ti,hwmods = "d_can0"; |
| 1578 | 1580 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1579 | 1581 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; |
| @@ -1593,6 +1595,8 @@ · 13 unmodified lines | ||
| 1593 | 1595 | |
| 1594 | 1596 | target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */ |
| 1595 | 1597 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 1598 | + reg = <0xd0020 0x4>; | |
| 1599 | + reg-names = "rev"; | |
| 1596 | 1600 | ti,hwmods = "d_can1"; |
| 1597 | 1601 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1598 | 1602 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; |
| @@ -175,14 +175,9 @@ · 174 unmodified lines | ||
| 175 | 175 | }; |
| 176 | 176 | |
| 177 | 177 | &mmc1 { |
| 178 | − pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; | |
| 178 | + pinctrl-names = "default", "hs"; | |
| 179 | 179 | pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; |
| 180 | 180 | pinctrl-1 = <&mmc1_pins_hs>; |
| 181 | − pinctrl-2 = <&mmc1_pins_sdr12>; | |
| 182 | − pinctrl-3 = <&mmc1_pins_sdr25>; | |
| 183 | − pinctrl-4 = <&mmc1_pins_sdr50>; | |
| 184 | − pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>; | |
| 185 | − pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; | |
| 186 | 181 | }; |
| 187 | 182 | |
| 188 | 183 | &mmc2 { |
| @@ -16,14 +16,9 @@ · 15 unmodified lines | ||
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | 18 | &mmc1 { |
| 19 | − pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; | |
| 19 | + pinctrl-names = "default", "hs"; | |
| 20 | 20 | pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; |
| 21 | 21 | pinctrl-1 = <&mmc1_pins_hs>; |
| 22 | − pinctrl-2 = <&mmc1_pins_sdr12>; | |
| 23 | − pinctrl-3 = <&mmc1_pins_sdr25>; | |
| 24 | − pinctrl-4 = <&mmc1_pins_sdr50>; | |
| 25 | − pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>; | |
| 26 | − pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; | |
| 27 | 22 | }; |
| 28 | 23 | |
| 29 | 24 | &mmc2 { |
| @@ -24,14 +24,9 @@ · 23 unmodified lines | ||
| 24 | 24 | }; |
| 25 | 25 | |
| 26 | 26 | &mmc1 { |
| 27 | − pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; | |
| 27 | + pinctrl-names = "default", "hs"; | |
| 28 | 28 | pinctrl-0 = <&mmc1_pins_default_no_clk_pu>; |
| 29 | 29 | pinctrl-1 = <&mmc1_pins_hs>; |
| 30 | − pinctrl-2 = <&mmc1_pins_default>; | |
| 31 | − pinctrl-3 = <&mmc1_pins_hs>; | |
| 32 | − pinctrl-4 = <&mmc1_pins_sdr50>; | |
| 33 | − pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>; | |
| 34 | − pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>; | |
| 35 | 30 | }; |
| 36 | 31 | |
| 37 | 32 | &mmc2 { |
| @@ -379,7 +379,7 @@ · 378 unmodified lines | ||
| 379 | 379 | }; |
| 380 | 380 | }; |
| 381 | 381 | |
| 382 | −&gpio7 { | |
| 382 | +&gpio7_target { | |
| 383 | 383 | ti,no-reset-on-init; |
| 384 | 384 | ti,no-idle-on-init; |
| 385 | 385 | }; |
| @@ -430,6 +430,7 @@ · 44 unmodified lines | ||
| 430 | 430 | |
| 431 | 431 | bus-width = <4>; |
| 432 | 432 | cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */ |
| 433 | + no-1-8-v; | |
| 433 | 434 | }; |
| 434 | 435 | |
| 435 | 436 | &mmc2 { |
| @@ -16,14 +16,9 @@ · 15 unmodified lines | ||
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | 18 | &mmc1 { |
| 19 | − pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; | |
| 19 | + pinctrl-names = "default", "hs"; | |
| 20 | 20 | pinctrl-0 = <&mmc1_pins_default>; |
| 21 | 21 | pinctrl-1 = <&mmc1_pins_hs>; |
| 22 | − pinctrl-2 = <&mmc1_pins_sdr12>; | |
| 23 | − pinctrl-3 = <&mmc1_pins_sdr25>; | |
| 24 | − pinctrl-4 = <&mmc1_pins_sdr50>; | |
| 25 | − pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>; | |
| 26 | − pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>; | |
| 27 | 22 | vmmc-supply = <&vdd_3v3>; |
| 28 | 23 | vqmmc-supply = <&ldo1_reg>; |
| 29 | 24 | }; |
| @@ -16,14 +16,9 @@ · 15 unmodified lines | ||
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | 18 | &mmc1 { |
| 19 | − pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104"; | |
| 19 | + pinctrl-names = "default", "hs"; | |
| 20 | 20 | pinctrl-0 = <&mmc1_pins_default>; |
| 21 | 21 | pinctrl-1 = <&mmc1_pins_hs>; |
| 22 | − pinctrl-2 = <&mmc1_pins_sdr12>; | |
| 23 | − pinctrl-3 = <&mmc1_pins_sdr25>; | |
| 24 | − pinctrl-4 = <&mmc1_pins_sdr50>; | |
| 25 | − pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>; | |
| 26 | − pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>; | |
| 27 | 22 | vmmc-supply = <&vdd_3v3>; |
| 28 | 23 | vqmmc-supply = <&ldo1_reg>; |
| 29 | 24 | }; |
| @@ -124,6 +124,9 @@ · 123 unmodified lines | ||
| 124 | 124 | }; |
| 125 | 125 | |
| 126 | 126 | mdio-bus-mux { |
| 127 | + #address-cells = <1>; | |
| 128 | + #size-cells = <0>; | |
| 129 | + | |
| 127 | 130 | /* BIT(9) = 1 => external mdio */ |
| 128 | 131 | mdio_ext: mdio@200 { |
| 129 | 132 | reg = <0x200>; |
| @@ -498,7 +498,7 @@ · 497 unmodified lines | ||
| 498 | 498 | phy-supply = <&ldousb_reg>; |
| 499 | 499 | }; |
| 500 | 500 | |
| 501 | −&gpio7 { | |
| 501 | +&gpio7_target { | |
| 502 | 502 | ti,no-reset-on-init; |
| 503 | 503 | ti,no-idle-on-init; |
| 504 | 504 | }; |
| @@ -1261,7 +1261,7 @@ · 1260 unmodified lines | ||
| 1261 | 1261 | }; |
| 1262 | 1262 | }; |
| 1263 | 1263 | |
| 1264 | − target-module@51000 { /* 0x48051000, ap 45 2e.0 */ | |
| 1264 | + gpio7_target: target-module@51000 { /* 0x48051000, ap 45 2e.0 */ | |
| 1265 | 1265 | compatible = "ti,sysc-omap2", "ti,sysc"; |
| 1266 | 1266 | ti,hwmods = "gpio7"; |
| 1267 | 1267 | reg = <0x51000 0x4>, |
| @@ -3025,7 +3025,7 @@ · 1757 unmodified lines | ||
| 3025 | 3025 | |
| 3026 | 3026 | target-module@80000 { /* 0x48480000, ap 31 16.0 */ |
| 3027 | 3027 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 3028 | − reg = <0x80000 0x4>; | |
| 3028 | + reg = <0x80020 0x4>; | |
| 3029 | 3029 | reg-names = "rev"; |
| 3030 | 3030 | clocks = <&l4per2_clkctrl DRA7_L4PER2_DCAN2_CLKCTRL 0>; |
| 3031 | 3031 | clock-names = "fck"; |
| @@ -4577,7 +4577,7 @@ · 1545 unmodified lines | ||
| 4577 | 4577 | |
| 4578 | 4578 | target-module@c000 { /* 0x4ae3c000, ap 30 04.0 */ |
| 4579 | 4579 | compatible = "ti,sysc-omap4", "ti,sysc"; |
| 4580 | − reg = <0xc000 0x4>; | |
| 4580 | + reg = <0xc020 0x4>; | |
| 4581 | 4581 | reg-names = "rev"; |
| 4582 | 4582 | clocks = <&wkupaon_clkctrl DRA7_WKUPAON_DCAN1_CLKCTRL 0>; |
| 4583 | 4583 | clock-names = "fck"; |
| @@ -32,7 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | * |
| 33 | 33 | * Datamanual Revisions: |
| 34 | 34 | * |
| 35 | − * AM572x Silicon Revision 2.0: SPRS953B, Revised November 2016 | |
| 35 | + * AM572x Silicon Revision 2.0: SPRS953F, Revised May 2019 | |
| 36 | 36 | * AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016 |
| 37 | 37 | * |
| 38 | 38 | */ |
| @@ -229,45 +229,45 @@ · 190 unmodified lines | ||
| 229 | 229 | |
| 230 | 230 | mmc3_pins_default: mmc3_pins_default { |
| 231 | 231 | pinctrl-single,pins = < |
| 232 | − DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 233 | − DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 234 | − DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 235 | − DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 236 | − DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 237 | − DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 232 | + DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 233 | + DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 234 | + DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 235 | + DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 236 | + DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 237 | + DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 238 | 238 | >; |
| 239 | 239 | }; |
| 240 | 240 | |
| 241 | 241 | mmc3_pins_hs: mmc3_pins_hs { |
| 242 | 242 | pinctrl-single,pins = < |
| 243 | − DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 244 | − DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 245 | − DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 246 | − DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 247 | − DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 248 | − DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 243 | + DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 244 | + DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 245 | + DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 246 | + DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 247 | + DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 248 | + DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 249 | 249 | >; |
| 250 | 250 | }; |
| 251 | 251 | |
| 252 | 252 | mmc3_pins_sdr12: mmc3_pins_sdr12 { |
| 253 | 253 | pinctrl-single,pins = < |
| 254 | − DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 255 | − DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 256 | − DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 257 | − DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 258 | − DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 259 | − DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 254 | + DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 255 | + DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 256 | + DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 257 | + DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 258 | + DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 259 | + DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 260 | 260 | >; |
| 261 | 261 | }; |
| 262 | 262 | |
| 263 | 263 | mmc3_pins_sdr25: mmc3_pins_sdr25 { |
| 264 | 264 | pinctrl-single,pins = < |
| 265 | − DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 266 | − DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 267 | − DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 268 | − DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 269 | − DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 270 | − DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 265 | + DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */ | |
| 266 | + DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */ | |
| 267 | + DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */ | |
| 268 | + DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */ | |
| 269 | + DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */ | |
| 270 | + DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */ | |
| 271 | 271 | >; |
| 272 | 272 | }; |
| 273 | 273 | |
| @@ -112,7 +112,7 @@ · 111 unmodified lines | ||
| 112 | 112 | }; |
| 113 | 113 | |
| 114 | 114 | &i2c2 { |
| 115 | − clock_frequency = <100000>; | |
| 115 | + clock-frequency = <100000>; | |
| 116 | 116 | pinctrl-names = "default"; |
| 117 | 117 | pinctrl-0 = <&pinctrl_i2c2>; |
| 118 | 118 | status = "okay"; |
| @@ -156,7 +156,7 @@ · 155 unmodified lines | ||
| 156 | 156 | }; |
| 157 | 157 | |
| 158 | 158 | &i2c2 { |
| 159 | − clock_frequency = <100000>; | |
| 159 | + clock-frequency = <100000>; | |
| 160 | 160 | pinctrl-names = "default"; |
| 161 | 161 | pinctrl-0 = <&pinctrl_i2c2>; |
| 162 | 162 | status = "okay"; |
| @@ -148,7 +148,7 @@ · 147 unmodified lines | ||
| 148 | 148 | }; |
| 149 | 149 | |
| 150 | 150 | &i2c2 { |
| 151 | − clock_frequency = <100000>; | |
| 151 | + clock-frequency = <100000>; | |
| 152 | 152 | pinctrl-names = "default"; |
| 153 | 153 | pinctrl-0 = <&pinctrl_i2c2>; |
| 154 | 154 | status = "okay"; |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | }; |
| 44 | 44 | |
| 45 | 45 | &i2c2 { |
| 46 | − clock_frequency = <100000>; | |
| 46 | + clock-frequency = <100000>; | |
| 47 | 47 | pinctrl-names = "default"; |
| 48 | 48 | pinctrl-0 = <&pinctrl_i2c2>; |
| 49 | 49 | status = "okay"; |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | ||
| 43 | 43 | }; |
| 44 | 44 | |
| 45 | 45 | &i2c2 { |
| 46 | − clock_frequency = <100000>; | |
| 46 | + clock-frequency = <100000>; | |
| 47 | 47 | pinctrl-names = "default"; |
| 48 | 48 | pinctrl-0 = <&pinctrl_i2c2>; |
| 49 | 49 | status = "okay"; |
| @@ -58,7 +58,7 @@ · 8 unmodified lines | ||
| 58 | 58 | }; |
| 59 | 59 | |
| 60 | 60 | &i2c3 { |
| 61 | − clock_frequency = <100000>; | |
| 61 | + clock-frequency = <100000>; | |
| 62 | 62 | pinctrl-names = "default"; |
| 63 | 63 | pinctrl-0 = <&pinctrl_i2c3>; |
| 64 | 64 | status = "okay"; |
| @@ -186,7 +186,7 @@ · 185 unmodified lines | ||
| 186 | 186 | reg = <0x40330200 0x200>; |
| 187 | 187 | }; |
| 188 | 188 | |
| 189 | − usbphy1: usb-phy@0x40350000 { | |
| 189 | + usbphy1: usb-phy@40350000 { | |
| 190 | 190 | compatible = "fsl,imx7ulp-usbphy", "fsl,imx6ul-usbphy"; |
| 191 | 191 | reg = <0x40350000 0x1000>; |
| 192 | 192 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
| @@ -246,13 +246,13 @@ · 245 unmodified lines | ||
| 246 | 246 | reg = <0>; |
| 247 | 247 | }; |
| 248 | 248 | |
| 249 | − n25q128a13_2: flash@1 { | |
| 249 | + n25q128a13_2: flash@2 { | |
| 250 | 250 | compatible = "n25q128a13", "jedec,spi-nor"; |
| 251 | 251 | #address-cells = <1>; |
| 252 | 252 | #size-cells = <1>; |
| 253 | 253 | spi-max-frequency = <66000000>; |
| 254 | 254 | spi-rx-bus-width = <2>; |
| 255 | − reg = <1>; | |
| 255 | + reg = <2>; | |
| 256 | 256 | }; |
| 257 | 257 | }; |
| 258 | 258 | |
| @@ -4,17 +4,9 @@ CONFIG_NO_HZ_IDLE=y · 3 unmodified lines | ||
| 4 | 4 | CONFIG_HIGH_RES_TIMERS=y |
| 5 | 5 | CONFIG_BLK_DEV_INITRD=y |
| 6 | 6 | CONFIG_KALLSYMS_ALL=y |
| 7 | −CONFIG_MODULES=y | |
| 8 | −CONFIG_MODULE_UNLOAD=y | |
| 9 | −# CONFIG_BLK_DEV_BSG is not set | |
| 10 | −CONFIG_PARTITION_ADVANCED=y | |
| 11 | 7 | CONFIG_ARCH_U8500=y |
| 12 | −CONFIG_MACH_HREFV60=y | |
| 13 | −CONFIG_MACH_SNOWBALL=y | |
| 14 | 8 | CONFIG_SMP=y |
| 15 | 9 | CONFIG_NR_CPUS=2 |
| 16 | −CONFIG_PREEMPT=y | |
| 17 | −CONFIG_AEABI=y | |
| 18 | 10 | CONFIG_HIGHMEM=y |
| 19 | 11 | CONFIG_ARM_APPENDED_DTB=y |
| 20 | 12 | CONFIG_ARM_ATAG_DTB_COMPAT=y |
| @@ -25,6 +17,11 @@ CONFIG_CPU_IDLE=y · 4 unmodified lines | ||
| 25 | 17 | CONFIG_ARM_U8500_CPUIDLE=y |
| 26 | 18 | CONFIG_VFP=y |
| 27 | 19 | CONFIG_NEON=y |
| 20 | +CONFIG_MODULES=y | |
| 21 | +CONFIG_MODULE_UNLOAD=y | |
| 22 | +# CONFIG_BLK_DEV_BSG is not set | |
| 23 | +CONFIG_PARTITION_ADVANCED=y | |
| 24 | +CONFIG_CMA=y | |
| 28 | 25 | CONFIG_NET=y |
| 29 | 26 | CONFIG_PACKET=y |
| 30 | 27 | CONFIG_UNIX=y |
| @@ -47,7 +44,6 @@ CONFIG_SMSC911X=y · 16 unmodified lines | ||
| 47 | 44 | CONFIG_SMSC_PHY=y |
| 48 | 45 | CONFIG_CW1200=y |
| 49 | 46 | CONFIG_CW1200_WLAN_SDIO=y |
| 50 | −# CONFIG_INPUT_MOUSEDEV_PSAUX is not set | |
| 51 | 47 | CONFIG_INPUT_EVDEV=y |
| 52 | 48 | # CONFIG_KEYBOARD_ATKBD is not set |
| 53 | 49 | CONFIG_KEYBOARD_GPIO=y |
| @@ -63,7 +59,6 @@ CONFIG_RMI4_CORE=y · 9 unmodified lines | ||
| 63 | 59 | CONFIG_RMI4_I2C=y |
| 64 | 60 | CONFIG_RMI4_F11=y |
| 65 | 61 | # CONFIG_SERIO is not set |
| 66 | −CONFIG_VT_HW_CONSOLE_BINDING=y | |
| 67 | 62 | # CONFIG_LEGACY_PTYS is not set |
| 68 | 63 | CONFIG_SERIAL_AMBA_PL011=y |
| 69 | 64 | CONFIG_SERIAL_AMBA_PL011_CONSOLE=y |
| @@ -72,6 +67,7 @@ CONFIG_SPI=y · 2 unmodified lines | ||
| 72 | 67 | CONFIG_SPI_PL022=y |
| 73 | 68 | CONFIG_GPIO_STMPE=y |
| 74 | 69 | CONFIG_GPIO_TC3589X=y |
| 70 | +CONFIG_SENSORS_IIO_HWMON=y | |
| 75 | 71 | CONFIG_THERMAL=y |
| 76 | 72 | CONFIG_CPU_THERMAL=y |
| 77 | 73 | CONFIG_WATCHDOG=y |
| @@ -79,6 +75,13 @@ CONFIG_MFD_STMPE=y · 1 unmodified line | ||
| 79 | 75 | CONFIG_MFD_TC3589X=y |
| 80 | 76 | CONFIG_REGULATOR_AB8500=y |
| 81 | 77 | CONFIG_REGULATOR_GPIO=y |
| 78 | +CONFIG_DRM=y | |
| 79 | +CONFIG_DRM_PANEL_SAMSUNG_S6D16D0=y | |
| 80 | +CONFIG_DRM_LIMA=y | |
| 81 | +CONFIG_DRM_MCDE=y | |
| 82 | +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| 83 | +CONFIG_BACKLIGHT_GENERIC=m | |
| 84 | +CONFIG_LOGO=y | |
| 82 | 85 | CONFIG_SOUND=y |
| 83 | 86 | CONFIG_SND=y |
| 84 | 87 | CONFIG_SND_SOC=y |
| @@ -87,6 +90,7 @@ CONFIG_SND_SOC_UX500_MACH_MOP500=y · 2 unmodified lines | ||
| 87 | 90 | CONFIG_USB=y |
| 88 | 91 | CONFIG_USB_MUSB_HDRC=y |
| 89 | 92 | CONFIG_USB_MUSB_UX500=y |
| 93 | +CONFIG_MUSB_PIO_ONLY=y | |
| 90 | 94 | CONFIG_AB8500_USB=y |
| 91 | 95 | CONFIG_USB_GADGET=y |
| 92 | 96 | CONFIG_USB_ETH=m |
| @@ -103,6 +107,7 @@ CONFIG_RTC_DRV_AB8500=y · 10 unmodified lines | ||
| 103 | 107 | CONFIG_RTC_DRV_PL031=y |
| 104 | 108 | CONFIG_DMADEVICES=y |
| 105 | 109 | CONFIG_STE_DMA40=y |
| 110 | +CONFIG_HWSPINLOCK=y | |
| 106 | 111 | CONFIG_HSEM_U8500=y |
| 107 | 112 | CONFIG_IIO=y |
| 108 | 113 | CONFIG_IIO_SW_TRIGGER=y |
| @@ -126,20 +131,19 @@ CONFIG_NFS_FS=y · 17 unmodified lines | ||
| 126 | 131 | CONFIG_ROOT_NFS=y |
| 127 | 132 | CONFIG_NLS_CODEPAGE_437=y |
| 128 | 133 | CONFIG_NLS_ISO8859_1=y |
| 134 | +CONFIG_CRYPTO_DEV_UX500=y | |
| 135 | +CONFIG_CRYPTO_DEV_UX500_CRYP=y | |
| 136 | +CONFIG_CRYPTO_DEV_UX500_HASH=y | |
| 137 | +CONFIG_CRYPTO_DEV_UX500_DEBUG=y | |
| 129 | 138 | CONFIG_PRINTK_TIME=y |
| 130 | 139 | CONFIG_DEBUG_INFO=y |
| 131 | 140 | CONFIG_DEBUG_FS=y |
| 132 | 141 | CONFIG_MAGIC_SYSRQ=y |
| 133 | 142 | CONFIG_DEBUG_KERNEL=y |
| 134 | 143 | # CONFIG_SCHED_DEBUG is not set |
| 135 | −# CONFIG_DEBUG_PREEMPT is not set | |
| 136 | 144 | # CONFIG_FTRACE is not set |
| 137 | 145 | CONFIG_DEBUG_USER=y |
| 138 | 146 | CONFIG_CORESIGHT=y |
| 139 | 147 | CONFIG_CORESIGHT_SINK_TPIU=y |
| 140 | 148 | CONFIG_CORESIGHT_SINK_ETBV10=y |
| 141 | 149 | CONFIG_CORESIGHT_SOURCE_ETM3X=y |
| 142 | −CONFIG_CRYPTO_DEV_UX500=y | |
| 143 | −CONFIG_CRYPTO_DEV_UX500_CRYP=y | |
| 144 | −CONFIG_CRYPTO_DEV_UX500_HASH=y | |
| 145 | −CONFIG_CRYPTO_DEV_UX500_DEBUG=y | |
| @@ -18,7 +18,9 @@ extern const struct dma_map_ops arm_coherent_dma_ops; · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) |
| 20 | 20 | { |
| 21 | − return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : NULL; | |
| 21 | + if (IS_ENABLED(CONFIG_MMU) && !IS_ENABLED(CONFIG_ARM_LPAE)) | |
| 22 | + return &arm_dma_ops; | |
| 23 | + return NULL; | |
| 22 | 24 | } |
| 23 | 25 | |
| 24 | 26 | #ifdef __arch_page_to_dma |
| @@ -544,6 +544,7 @@ static int arch_build_bp_info(struct perf_event *bp, · 543 unmodified lines | ||
| 544 | 544 | if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE) |
| 545 | 545 | && max_watchpoint_len >= 8) |
| 546 | 546 | break; |
| 547 | + /* Else, fall through */ | |
| 547 | 548 | default: |
| 548 | 549 | return -EINVAL; |
| 549 | 550 | } |
| @@ -608,10 +609,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 58 unmodified lines | ||
| 608 | 609 | /* Allow halfword watchpoints and breakpoints. */ |
| 609 | 610 | if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) |
| 610 | 611 | break; |
| 612 | + /* Else, fall through */ | |
| 611 | 613 | case 3: |
| 612 | 614 | /* Allow single byte watchpoint. */ |
| 613 | 615 | if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) |
| 614 | 616 | break; |
| 617 | + /* Else, fall through */ | |
| 615 | 618 | default: |
| 616 | 619 | ret = -EINVAL; |
| 617 | 620 | goto out; |
| @@ -861,6 +864,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, · 243 unmodified lines | ||
| 861 | 864 | break; |
| 862 | 865 | case ARM_ENTRY_ASYNC_WATCHPOINT: |
| 863 | 866 | WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); |
| 867 | + /* Fall through */ | |
| 864 | 868 | case ARM_ENTRY_SYNC_WATCHPOINT: |
| 865 | 869 | watchpoint_handler(addr, fsr, regs); |
| 866 | 870 | break; |
| @@ -909,6 +913,7 @@ static bool core_has_os_save_restore(void) · 42 unmodified lines | ||
| 909 | 913 | ARM_DBG_READ(c1, c1, 4, oslsr); |
| 910 | 914 | if (oslsr & ARM_OSLSR_OSLM0) |
| 911 | 915 | return true; |
| 916 | + /* Else, fall through */ | |
| 912 | 917 | default: |
| 913 | 918 | return false; |
| 914 | 919 | } |
| @@ -596,6 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall) · 595 unmodified lines | ||
| 596 | 596 | switch (retval) { |
| 597 | 597 | case -ERESTART_RESTARTBLOCK: |
| 598 | 598 | restart -= 2; |
| 599 | + /* Fall through */ | |
| 599 | 600 | case -ERESTARTNOHAND: |
| 600 | 601 | case -ERESTARTSYS: |
| 601 | 602 | case -ERESTARTNOINTR: |
| @@ -651,13 +651,22 @@ int kvm_handle_cp14_64(struct kvm_vcpu *vcpu, struct kvm_run *run) · 650 unmodified lines | ||
| 651 | 651 | } |
| 652 | 652 | |
| 653 | 653 | static void reset_coproc_regs(struct kvm_vcpu *vcpu, |
| 654 | − const struct coproc_reg *table, size_t num) | |
| 654 | + const struct coproc_reg *table, size_t num, | |
| 655 | + unsigned long *bmap) | |
| 655 | 656 | { |
| 656 | 657 | unsigned long i; |
| 657 | 658 | |
| 658 | 659 | for (i = 0; i < num; i++) |
| 659 | − if (table[i].reset) | |
| 660 | + if (table[i].reset) { | |
| 661 | + int reg = table[i].reg; | |
| 662 | + | |
| 660 | 663 | table[i].reset(vcpu, &table[i]); |
| 664 | + if (reg > 0 && reg < NR_CP15_REGS) { | |
| 665 | + set_bit(reg, bmap); | |
| 666 | + if (table[i].is_64bit) | |
| 667 | + set_bit(reg + 1, bmap); | |
| 668 | + } | |
| 669 | + } | |
| 661 | 670 | } |
| 662 | 671 | |
| 663 | 672 | static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu) |
| @@ -1432,17 +1441,15 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu) · 768 unmodified lines | ||
| 1432 | 1441 | { |
| 1433 | 1442 | size_t num; |
| 1434 | 1443 | const struct coproc_reg *table; |
| 1435 | − | |
| 1436 | − /* Catch someone adding a register without putting in reset entry. */ | |
| 1437 | − memset(vcpu->arch.ctxt.cp15, 0x42, sizeof(vcpu->arch.ctxt.cp15)); | |
| 1444 | + DECLARE_BITMAP(bmap, NR_CP15_REGS) = { 0, }; | |
| 1438 | 1445 | |
| 1439 | 1446 | /* Generic chip reset first (so target could override). */ |
| 1440 | − reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs)); | |
| 1447 | + reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs), bmap); | |
| 1441 | 1448 | |
| 1442 | 1449 | table = get_target_table(vcpu->arch.target, &num); |
| 1443 | − reset_coproc_regs(vcpu, table, num); | |
| 1450 | + reset_coproc_regs(vcpu, table, num, bmap); | |
| 1444 | 1451 | |
| 1445 | 1452 | for (num = 1; num < NR_CP15_REGS; num++) |
| 1446 | − WARN(vcpu_cp15(vcpu, num) == 0x42424242, | |
| 1453 | + WARN(!test_bit(num, bmap), | |
| 1447 | 1454 | "Didn't reset vcpu_cp15(vcpu, %zi)", num); |
| 1448 | 1455 | } |
| @@ -66,7 +66,7 @@ for_each_frame: tst frame, mask @ Check for address exceptions · 65 unmodified lines | ||
| 66 | 66 | |
| 67 | 67 | 1003: ldr r2, [sv_pc, #-4] @ if stmfd sp!, {args} exists, |
| 68 | 68 | ldr r3, .Ldsi+4 @ adjust saved 'pc' back one |
| 69 | − teq r3, r2, lsr #10 @ instruction | |
| 69 | + teq r3, r2, lsr #11 @ instruction | |
| 70 | 70 | subne r0, sv_pc, #4 @ allow for mov |
| 71 | 71 | subeq r0, sv_pc, #8 @ allow for mov + stmia |
| 72 | 72 | |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #define DEEPSLEEP_SLEEPENABLE_BIT BIT(31) |
| 25 | 25 | |
| 26 | 26 | .text |
| 27 | + .arch armv5te | |
| 27 | 28 | /* |
| 28 | 29 | * Move DaVinci into deep sleep state |
| 29 | 30 | * |
| @@ -49,6 +49,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) · 48 unmodified lines | ||
| 49 | 49 | * FALLTHROUGH: Ensure we don't try to overwrite our newly |
| 50 | 50 | * initialised state information on the first fault. |
| 51 | 51 | */ |
| 52 | + /* Fall through */ | |
| 52 | 53 | |
| 53 | 54 | case THREAD_NOTIFY_EXIT: |
| 54 | 55 | crunch_task_release(thread); |
| @@ -1,22 +0,0 @@ | ||
| 1 | −# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −menu "NetX Implementations" | |
| 3 | − depends on ARCH_NETX | |
| 4 | − | |
| 5 | −config MACH_NXDKN | |
| 6 | − bool "Enable Hilscher nxdkn Eval Board support" | |
| 7 | − help | |
| 8 | − Board support for the Hilscher NetX Eval Board | |
| 9 | − | |
| 10 | −config MACH_NXDB500 | |
| 11 | − bool "Enable Hilscher nxdb500 Eval Board support" | |
| 12 | − select ARM_AMBA | |
| 13 | − help | |
| 14 | − Board support for the Hilscher nxdb500 Eval Board | |
| 15 | − | |
| 16 | −config MACH_NXEB500HMI | |
| 17 | − bool "Enable Hilscher nxeb500hmi Eval Board support" | |
| 18 | − select ARM_AMBA | |
| 19 | − help | |
| 20 | − Board support for the Hilscher nxeb500hmi Eval Board | |
| 21 | − | |
| 22 | −endmenu | |
| @@ -1,13 +0,0 @@ | ||
| 1 | −# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −# | |
| 3 | −# Makefile for the linux kernel. | |
| 4 | −# | |
| 5 | − | |
| 6 | −# Object file lists. | |
| 7 | − | |
| 8 | −obj-y += time.o generic.o pfifo.o xc.o | |
| 9 | − | |
| 10 | −# Specific board support | |
| 11 | −obj-$(CONFIG_MACH_NXDKN) += nxdkn.o | |
| 12 | −obj-$(CONFIG_MACH_NXDB500) += nxdb500.o fb.o | |
| 13 | −obj-$(CONFIG_MACH_NXEB500HMI) += nxeb500hmi.o fb.o | |
| @@ -1,3 +0,0 @@ | ||
| 1 | −# SPDX-License-Identifier: GPL-2.0-only | |
| 2 | − zreladdr-y += 0x80008000 | |
| 3 | − | |
| @@ -1,65 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/fb.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/device.h> | |
| 9 | −#include <linux/init.h> | |
| 10 | −#include <linux/dma-mapping.h> | |
| 11 | −#include <linux/amba/bus.h> | |
| 12 | −#include <linux/amba/clcd.h> | |
| 13 | −#include <linux/err.h> | |
| 14 | −#include <linux/gfp.h> | |
| 15 | − | |
| 16 | −#include <asm/irq.h> | |
| 17 | − | |
| 18 | −#include <mach/netx-regs.h> | |
| 19 | −#include <mach/hardware.h> | |
| 20 | − | |
| 21 | −static struct clcd_panel *netx_panel; | |
| 22 | − | |
| 23 | −void netx_clcd_enable(struct clcd_fb *fb) | |
| 24 | −{ | |
| 25 | −} | |
| 26 | − | |
| 27 | −int netx_clcd_setup(struct clcd_fb *fb) | |
| 28 | −{ | |
| 29 | − dma_addr_t dma; | |
| 30 | − | |
| 31 | − fb->panel = netx_panel; | |
| 32 | − | |
| 33 | − fb->fb.screen_base = dma_alloc_wc(&fb->dev->dev, 1024 * 1024, &dma, | |
| 34 | − GFP_KERNEL); | |
| 35 | − if (!fb->fb.screen_base) { | |
| 36 | − printk(KERN_ERR "CLCD: unable to map framebuffer\n"); | |
| 37 | − return -ENOMEM; | |
| 38 | − } | |
| 39 | − | |
| 40 | − fb->fb.fix.smem_start = dma; | |
| 41 | − fb->fb.fix.smem_len = 1024*1024; | |
| 42 | − | |
| 43 | − return 0; | |
| 44 | −} | |
| 45 | − | |
| 46 | −int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma) | |
| 47 | −{ | |
| 48 | − return dma_mmap_wc(&fb->dev->dev, vma, fb->fb.screen_base, | |
| 49 | − fb->fb.fix.smem_start, fb->fb.fix.smem_len); | |
| 50 | −} | |
| 51 | − | |
| 52 | −void netx_clcd_remove(struct clcd_fb *fb) | |
| 53 | −{ | |
| 54 | − dma_free_wc(&fb->dev->dev, fb->fb.fix.smem_len, fb->fb.screen_base, | |
| 55 | − fb->fb.fix.smem_start); | |
| 56 | −} | |
| 57 | − | |
| 58 | −static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); | |
| 59 | − | |
| 60 | −int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | |
| 61 | −{ | |
| 62 | − netx_panel = panel; | |
| 63 | − fb_device.dev.platform_data = board; | |
| 64 | − return amba_device_register(&fb_device, &iomem_resource); | |
| 65 | −} | |
| @@ -1,12 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/fb.h | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −void netx_clcd_enable(struct clcd_fb *fb); | |
| 9 | −int netx_clcd_setup(struct clcd_fb *fb); | |
| 10 | −int netx_clcd_mmap(struct clcd_fb *fb, struct vm_area_struct *vma); | |
| 11 | −void netx_clcd_remove(struct clcd_fb *fb); | |
| 12 | −int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel); | |
| @@ -1,182 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/generic.c | |
| 4 | − * | |
| 5 | − * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/device.h> | |
| 9 | −#include <linux/init.h> | |
| 10 | −#include <linux/kernel.h> | |
| 11 | −#include <linux/module.h> | |
| 12 | −#include <linux/platform_device.h> | |
| 13 | −#include <linux/io.h> | |
| 14 | −#include <linux/irqchip/arm-vic.h> | |
| 15 | −#include <linux/reboot.h> | |
| 16 | −#include <mach/hardware.h> | |
| 17 | −#include <asm/mach/map.h> | |
| 18 | −#include <mach/netx-regs.h> | |
| 19 | −#include <asm/mach/irq.h> | |
| 20 | − | |
| 21 | −static struct map_desc netx_io_desc[] __initdata = { | |
| 22 | − { | |
| 23 | − .virtual = NETX_IO_VIRT, | |
| 24 | − .pfn = __phys_to_pfn(NETX_IO_PHYS), | |
| 25 | − .length = NETX_IO_SIZE, | |
| 26 | − .type = MT_DEVICE | |
| 27 | − } | |
| 28 | −}; | |
| 29 | − | |
| 30 | −void __init netx_map_io(void) | |
| 31 | −{ | |
| 32 | − iotable_init(netx_io_desc, ARRAY_SIZE(netx_io_desc)); | |
| 33 | −} | |
| 34 | − | |
| 35 | −static struct resource netx_rtc_resources[] = { | |
| 36 | − [0] = { | |
| 37 | − .start = 0x00101200, | |
| 38 | − .end = 0x00101220, | |
| 39 | − .flags = IORESOURCE_MEM, | |
| 40 | − }, | |
| 41 | −}; | |
| 42 | − | |
| 43 | −static struct platform_device netx_rtc_device = { | |
| 44 | − .name = "netx-rtc", | |
| 45 | − .id = 0, | |
| 46 | − .num_resources = ARRAY_SIZE(netx_rtc_resources), | |
| 47 | − .resource = netx_rtc_resources, | |
| 48 | −}; | |
| 49 | − | |
| 50 | −static struct platform_device *devices[] __initdata = { | |
| 51 | − &netx_rtc_device, | |
| 52 | −}; | |
| 53 | − | |
| 54 | −#if 0 | |
| 55 | −#define DEBUG_IRQ(fmt...) printk(fmt) | |
| 56 | −#else | |
| 57 | −#define DEBUG_IRQ(fmt...) while (0) {} | |
| 58 | −#endif | |
| 59 | − | |
| 60 | −static void netx_hif_demux_handler(struct irq_desc *desc) | |
| 61 | −{ | |
| 62 | − unsigned int irq = NETX_IRQ_HIF_CHAINED(0); | |
| 63 | − unsigned int stat; | |
| 64 | − | |
| 65 | − stat = ((readl(NETX_DPMAS_INT_EN) & | |
| 66 | − readl(NETX_DPMAS_INT_STAT)) >> 24) & 0x1f; | |
| 67 | − | |
| 68 | − while (stat) { | |
| 69 | − if (stat & 1) { | |
| 70 | − DEBUG_IRQ("handling irq %d\n", irq); | |
| 71 | − generic_handle_irq(irq); | |
| 72 | − } | |
| 73 | − irq++; | |
| 74 | − stat >>= 1; | |
| 75 | − } | |
| 76 | −} | |
| 77 | − | |
| 78 | −static int | |
| 79 | −netx_hif_irq_type(struct irq_data *d, unsigned int type) | |
| 80 | −{ | |
| 81 | − unsigned int val, irq; | |
| 82 | − | |
| 83 | − val = readl(NETX_DPMAS_IF_CONF1); | |
| 84 | − | |
| 85 | − irq = d->irq - NETX_IRQ_HIF_CHAINED(0); | |
| 86 | − | |
| 87 | − if (type & IRQ_TYPE_EDGE_RISING) { | |
| 88 | − DEBUG_IRQ("rising edges\n"); | |
| 89 | − val |= (1 << 26) << irq; | |
| 90 | − } | |
| 91 | − if (type & IRQ_TYPE_EDGE_FALLING) { | |
| 92 | − DEBUG_IRQ("falling edges\n"); | |
| 93 | − val &= ~((1 << 26) << irq); | |
| 94 | − } | |
| 95 | − if (type & IRQ_TYPE_LEVEL_LOW) { | |
| 96 | − DEBUG_IRQ("low level\n"); | |
| 97 | − val &= ~((1 << 26) << irq); | |
| 98 | − } | |
| 99 | − if (type & IRQ_TYPE_LEVEL_HIGH) { | |
| 100 | − DEBUG_IRQ("high level\n"); | |
| 101 | − val |= (1 << 26) << irq; | |
| 102 | − } | |
| 103 | − | |
| 104 | − writel(val, NETX_DPMAS_IF_CONF1); | |
| 105 | − | |
| 106 | − return 0; | |
| 107 | −} | |
| 108 | − | |
| 109 | −static void | |
| 110 | −netx_hif_ack_irq(struct irq_data *d) | |
| 111 | −{ | |
| 112 | − unsigned int val, irq; | |
| 113 | − | |
| 114 | − irq = d->irq - NETX_IRQ_HIF_CHAINED(0); | |
| 115 | − writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); | |
| 116 | − | |
| 117 | − val = readl(NETX_DPMAS_INT_EN); | |
| 118 | − val &= ~((1 << 24) << irq); | |
| 119 | − writel(val, NETX_DPMAS_INT_EN); | |
| 120 | − | |
| 121 | − DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); | |
| 122 | −} | |
| 123 | − | |
| 124 | −static void | |
| 125 | −netx_hif_mask_irq(struct irq_data *d) | |
| 126 | −{ | |
| 127 | − unsigned int val, irq; | |
| 128 | − | |
| 129 | − irq = d->irq - NETX_IRQ_HIF_CHAINED(0); | |
| 130 | − val = readl(NETX_DPMAS_INT_EN); | |
| 131 | − val &= ~((1 << 24) << irq); | |
| 132 | − writel(val, NETX_DPMAS_INT_EN); | |
| 133 | − DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); | |
| 134 | −} | |
| 135 | − | |
| 136 | −static void | |
| 137 | −netx_hif_unmask_irq(struct irq_data *d) | |
| 138 | −{ | |
| 139 | − unsigned int val, irq; | |
| 140 | − | |
| 141 | − irq = d->irq - NETX_IRQ_HIF_CHAINED(0); | |
| 142 | − val = readl(NETX_DPMAS_INT_EN); | |
| 143 | − val |= (1 << 24) << irq; | |
| 144 | − writel(val, NETX_DPMAS_INT_EN); | |
| 145 | − DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); | |
| 146 | −} | |
| 147 | − | |
| 148 | −static struct irq_chip netx_hif_chip = { | |
| 149 | − .irq_ack = netx_hif_ack_irq, | |
| 150 | − .irq_mask = netx_hif_mask_irq, | |
| 151 | − .irq_unmask = netx_hif_unmask_irq, | |
| 152 | − .irq_set_type = netx_hif_irq_type, | |
| 153 | −}; | |
| 154 | − | |
| 155 | −void __init netx_init_irq(void) | |
| 156 | −{ | |
| 157 | − int irq; | |
| 158 | − | |
| 159 | − vic_init(io_p2v(NETX_PA_VIC), NETX_IRQ_VIC_START, ~0, 0); | |
| 160 | − | |
| 161 | − for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { | |
| 162 | − irq_set_chip_and_handler(irq, &netx_hif_chip, | |
| 163 | − handle_level_irq); | |
| 164 | − irq_clear_status_flags(irq, IRQ_NOREQUEST); | |
| 165 | − } | |
| 166 | − | |
| 167 | − writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); | |
| 168 | − irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); | |
| 169 | −} | |
| 170 | − | |
| 171 | −static int __init netx_init(void) | |
| 172 | −{ | |
| 173 | − return platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| 174 | −} | |
| 175 | − | |
| 176 | −subsys_initcall(netx_init); | |
| 177 | − | |
| 178 | −void netx_restart(enum reboot_mode mode, const char *cmd) | |
| 179 | −{ | |
| 180 | − writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, | |
| 181 | − NETX_SYSTEM_RES_CR); | |
| 182 | −} | |
| @@ -1,14 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/generic.h | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/reboot.h> | |
| 9 | − | |
| 10 | −extern void __init netx_map_io(void); | |
| 11 | −extern void __init netx_init_irq(void); | |
| 12 | −extern void netx_restart(enum reboot_mode, const char *); | |
| 13 | − | |
| 14 | −extern void netx_timer_init(void); | |
| @@ -1,27 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/hardware.h | |
| 4 | − * | |
| 5 | − * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | −#ifndef __ASM_ARCH_HARDWARE_H | |
| 8 | −#define __ASM_ARCH_HARDWARE_H | |
| 9 | − | |
| 10 | −#define NETX_IO_PHYS 0x00100000 | |
| 11 | −#define NETX_IO_VIRT 0xe0000000 | |
| 12 | −#define NETX_IO_SIZE 0x00100000 | |
| 13 | − | |
| 14 | −#define SRAM_INTERNAL_PHYS_0 0x00000 | |
| 15 | −#define SRAM_INTERNAL_PHYS_1 0x08000 | |
| 16 | −#define SRAM_INTERNAL_PHYS_2 0x10000 | |
| 17 | −#define SRAM_INTERNAL_PHYS_3 0x18000 | |
| 18 | −#define SRAM_INTERNAL_PHYS(no) ((no) * 0x8000) | |
| 19 | − | |
| 20 | −#define XPEC_MEM_SIZE 0x4000 | |
| 21 | −#define XMAC_MEM_SIZE 0x1000 | |
| 22 | −#define SRAM_MEM_SIZE 0x8000 | |
| 23 | − | |
| 24 | −#define io_p2v(x) IOMEM((x) - NETX_IO_PHYS + NETX_IO_VIRT) | |
| 25 | −#define io_v2p(x) ((x) - NETX_IO_VIRT + NETX_IO_PHYS) | |
| 26 | − | |
| 27 | −#endif | |
| @@ -1,58 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/irqs.h | |
| 4 | − * | |
| 5 | − * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#define NETX_IRQ_VIC_START 64 | |
| 9 | −#define NETX_IRQ_SOFTINT (NETX_IRQ_VIC_START + 0) | |
| 10 | −#define NETX_IRQ_TIMER0 (NETX_IRQ_VIC_START + 1) | |
| 11 | −#define NETX_IRQ_TIMER1 (NETX_IRQ_VIC_START + 2) | |
| 12 | −#define NETX_IRQ_TIMER2 (NETX_IRQ_VIC_START + 3) | |
| 13 | −#define NETX_IRQ_SYSTIME_NS (NETX_IRQ_VIC_START + 4) | |
| 14 | −#define NETX_IRQ_SYSTIME_S (NETX_IRQ_VIC_START + 5) | |
| 15 | −#define NETX_IRQ_GPIO_15 (NETX_IRQ_VIC_START + 6) | |
| 16 | −#define NETX_IRQ_WATCHDOG (NETX_IRQ_VIC_START + 7) | |
| 17 | −#define NETX_IRQ_UART0 (NETX_IRQ_VIC_START + 8) | |
| 18 | −#define NETX_IRQ_UART1 (NETX_IRQ_VIC_START + 9) | |
| 19 | −#define NETX_IRQ_UART2 (NETX_IRQ_VIC_START + 10) | |
| 20 | −#define NETX_IRQ_USB (NETX_IRQ_VIC_START + 11) | |
| 21 | −#define NETX_IRQ_SPI (NETX_IRQ_VIC_START + 12) | |
| 22 | −#define NETX_IRQ_I2C (NETX_IRQ_VIC_START + 13) | |
| 23 | −#define NETX_IRQ_LCD (NETX_IRQ_VIC_START + 14) | |
| 24 | −#define NETX_IRQ_HIF (NETX_IRQ_VIC_START + 15) | |
| 25 | −#define NETX_IRQ_GPIO_0_14 (NETX_IRQ_VIC_START + 16) | |
| 26 | −#define NETX_IRQ_XPEC0 (NETX_IRQ_VIC_START + 17) | |
| 27 | −#define NETX_IRQ_XPEC1 (NETX_IRQ_VIC_START + 18) | |
| 28 | −#define NETX_IRQ_XPEC2 (NETX_IRQ_VIC_START + 19) | |
| 29 | −#define NETX_IRQ_XPEC3 (NETX_IRQ_VIC_START + 20) | |
| 30 | −#define NETX_IRQ_XPEC(no) (NETX_IRQ_VIC_START + 17 + (no)) | |
| 31 | −#define NETX_IRQ_MSYNC0 (NETX_IRQ_VIC_START + 21) | |
| 32 | −#define NETX_IRQ_MSYNC1 (NETX_IRQ_VIC_START + 22) | |
| 33 | −#define NETX_IRQ_MSYNC2 (NETX_IRQ_VIC_START + 23) | |
| 34 | −#define NETX_IRQ_MSYNC3 (NETX_IRQ_VIC_START + 24) | |
| 35 | −#define NETX_IRQ_IRQ_PHY (NETX_IRQ_VIC_START + 25) | |
| 36 | −#define NETX_IRQ_ISO_AREA (NETX_IRQ_VIC_START + 26) | |
| 37 | −/* int 27 is reserved */ | |
| 38 | −/* int 28 is reserved */ | |
| 39 | −#define NETX_IRQ_TIMER3 (NETX_IRQ_VIC_START + 29) | |
| 40 | −#define NETX_IRQ_TIMER4 (NETX_IRQ_VIC_START + 30) | |
| 41 | −/* int 31 is reserved */ | |
| 42 | − | |
| 43 | −#define NETX_IRQS (NETX_IRQ_VIC_START + 32) | |
| 44 | − | |
| 45 | −/* for multiplexed irqs on gpio 0..14 */ | |
| 46 | −#define NETX_IRQ_GPIO(x) (NETX_IRQS + (x)) | |
| 47 | −#define NETX_IRQ_GPIO_LAST NETX_IRQ_GPIO(14) | |
| 48 | − | |
| 49 | −/* Host interface interrupts */ | |
| 50 | −#define NETX_IRQ_HIF_CHAINED(x) (NETX_IRQ_GPIO_LAST + 1 + (x)) | |
| 51 | −#define NETX_IRQ_HIF_PIO35 NETX_IRQ_HIF_CHAINED(0) | |
| 52 | −#define NETX_IRQ_HIF_PIO36 NETX_IRQ_HIF_CHAINED(1) | |
| 53 | −#define NETX_IRQ_HIF_PIO40 NETX_IRQ_HIF_CHAINED(2) | |
| 54 | −#define NETX_IRQ_HIF_PIO47 NETX_IRQ_HIF_CHAINED(3) | |
| 55 | −#define NETX_IRQ_HIF_PIO72 NETX_IRQ_HIF_CHAINED(4) | |
| 56 | −#define NETX_IRQ_HIF_LAST NETX_IRQ_HIF_CHAINED(4) | |
| 57 | − | |
| 58 | −#define NR_IRQS (NETX_IRQ_HIF_LAST + 1) | |
| @@ -1,420 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/netx-regs.h | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#ifndef __ASM_ARCH_NETX_REGS_H | |
| 9 | −#define __ASM_ARCH_NETX_REGS_H | |
| 10 | − | |
| 11 | −/* offsets relative to the beginning of the io space */ | |
| 12 | −#define NETX_OFS_SYSTEM 0x00000 | |
| 13 | −#define NETX_OFS_MEMCR 0x00100 | |
| 14 | −#define NETX_OFS_DPMAS 0x03000 | |
| 15 | −#define NETX_OFS_GPIO 0x00800 | |
| 16 | −#define NETX_OFS_PIO 0x00900 | |
| 17 | −#define NETX_OFS_UART0 0x00a00 | |
| 18 | −#define NETX_OFS_UART1 0x00a40 | |
| 19 | −#define NETX_OFS_UART2 0x00a80 | |
| 20 | −#define NETX_OF_MIIMU 0x00b00 | |
| 21 | −#define NETX_OFS_SPI 0x00c00 | |
| 22 | −#define NETX_OFS_I2C 0x00d00 | |
| 23 | −#define NETX_OFS_SYSTIME 0x01100 | |
| 24 | −#define NETX_OFS_RTC 0x01200 | |
| 25 | −#define NETX_OFS_EXTBUS 0x03600 | |
| 26 | −#define NETX_OFS_LCD 0x04000 | |
| 27 | −#define NETX_OFS_USB 0x20000 | |
| 28 | −#define NETX_OFS_XMAC0 0x60000 | |
| 29 | −#define NETX_OFS_XMAC1 0x61000 | |
| 30 | −#define NETX_OFS_XMAC2 0x62000 | |
| 31 | −#define NETX_OFS_XMAC3 0x63000 | |
| 32 | −#define NETX_OFS_XMAC(no) (0x60000 + (no) * 0x1000) | |
| 33 | −#define NETX_OFS_PFIFO 0x64000 | |
| 34 | −#define NETX_OFS_XPEC0 0x70000 | |
| 35 | −#define NETX_OFS_XPEC1 0x74000 | |
| 36 | −#define NETX_OFS_XPEC2 0x78000 | |
| 37 | −#define NETX_OFS_XPEC3 0x7c000 | |
| 38 | −#define NETX_OFS_XPEC(no) (0x70000 + (no) * 0x4000) | |
| 39 | −#define NETX_OFS_VIC 0xff000 | |
| 40 | − | |
| 41 | −/* physical addresses */ | |
| 42 | −#define NETX_PA_SYSTEM (NETX_IO_PHYS + NETX_OFS_SYSTEM) | |
| 43 | −#define NETX_PA_MEMCR (NETX_IO_PHYS + NETX_OFS_MEMCR) | |
| 44 | −#define NETX_PA_DPMAS (NETX_IO_PHYS + NETX_OFS_DPMAS) | |
| 45 | −#define NETX_PA_GPIO (NETX_IO_PHYS + NETX_OFS_GPIO) | |
| 46 | −#define NETX_PA_PIO (NETX_IO_PHYS + NETX_OFS_PIO) | |
| 47 | −#define NETX_PA_UART0 (NETX_IO_PHYS + NETX_OFS_UART0) | |
| 48 | −#define NETX_PA_UART1 (NETX_IO_PHYS + NETX_OFS_UART1) | |
| 49 | −#define NETX_PA_UART2 (NETX_IO_PHYS + NETX_OFS_UART2) | |
| 50 | −#define NETX_PA_MIIMU (NETX_IO_PHYS + NETX_OF_MIIMU) | |
| 51 | −#define NETX_PA_SPI (NETX_IO_PHYS + NETX_OFS_SPI) | |
| 52 | −#define NETX_PA_I2C (NETX_IO_PHYS + NETX_OFS_I2C) | |
| 53 | −#define NETX_PA_SYSTIME (NETX_IO_PHYS + NETX_OFS_SYSTIME) | |
| 54 | −#define NETX_PA_RTC (NETX_IO_PHYS + NETX_OFS_RTC) | |
| 55 | −#define NETX_PA_EXTBUS (NETX_IO_PHYS + NETX_OFS_EXTBUS) | |
| 56 | −#define NETX_PA_LCD (NETX_IO_PHYS + NETX_OFS_LCD) | |
| 57 | −#define NETX_PA_USB (NETX_IO_PHYS + NETX_OFS_USB) | |
| 58 | −#define NETX_PA_XMAC0 (NETX_IO_PHYS + NETX_OFS_XMAC0) | |
| 59 | −#define NETX_PA_XMAC1 (NETX_IO_PHYS + NETX_OFS_XMAC1) | |
| 60 | −#define NETX_PA_XMAC2 (NETX_IO_PHYS + NETX_OFS_XMAC2) | |
| 61 | −#define NETX_PA_XMAC3 (NETX_IO_PHYS + NETX_OFS_XMAC3) | |
| 62 | −#define NETX_PA_XMAC(no) (NETX_IO_PHYS + NETX_OFS_XMAC(no)) | |
| 63 | −#define NETX_PA_PFIFO (NETX_IO_PHYS + NETX_OFS_PFIFO) | |
| 64 | −#define NETX_PA_XPEC0 (NETX_IO_PHYS + NETX_OFS_XPEC0) | |
| 65 | −#define NETX_PA_XPEC1 (NETX_IO_PHYS + NETX_OFS_XPEC1) | |
| 66 | −#define NETX_PA_XPEC2 (NETX_IO_PHYS + NETX_OFS_XPEC2) | |
| 67 | −#define NETX_PA_XPEC3 (NETX_IO_PHYS + NETX_OFS_XPEC3) | |
| 68 | −#define NETX_PA_XPEC(no) (NETX_IO_PHYS + NETX_OFS_XPEC(no)) | |
| 69 | −#define NETX_PA_VIC (NETX_IO_PHYS + NETX_OFS_VIC) | |
| 70 | − | |
| 71 | −/* virtual addresses */ | |
| 72 | −#define NETX_VA_SYSTEM (NETX_IO_VIRT + NETX_OFS_SYSTEM) | |
| 73 | −#define NETX_VA_MEMCR (NETX_IO_VIRT + NETX_OFS_MEMCR) | |
| 74 | −#define NETX_VA_DPMAS (NETX_IO_VIRT + NETX_OFS_DPMAS) | |
| 75 | −#define NETX_VA_GPIO (NETX_IO_VIRT + NETX_OFS_GPIO) | |
| 76 | −#define NETX_VA_PIO (NETX_IO_VIRT + NETX_OFS_PIO) | |
| 77 | −#define NETX_VA_UART0 (NETX_IO_VIRT + NETX_OFS_UART0) | |
| 78 | −#define NETX_VA_UART1 (NETX_IO_VIRT + NETX_OFS_UART1) | |
| 79 | −#define NETX_VA_UART2 (NETX_IO_VIRT + NETX_OFS_UART2) | |
| 80 | −#define NETX_VA_MIIMU (NETX_IO_VIRT + NETX_OF_MIIMU) | |
| 81 | −#define NETX_VA_SPI (NETX_IO_VIRT + NETX_OFS_SPI) | |
| 82 | −#define NETX_VA_I2C (NETX_IO_VIRT + NETX_OFS_I2C) | |
| 83 | −#define NETX_VA_SYSTIME (NETX_IO_VIRT + NETX_OFS_SYSTIME) | |
| 84 | −#define NETX_VA_RTC (NETX_IO_VIRT + NETX_OFS_RTC) | |
| 85 | −#define NETX_VA_EXTBUS (NETX_IO_VIRT + NETX_OFS_EXTBUS) | |
| 86 | −#define NETX_VA_LCD (NETX_IO_VIRT + NETX_OFS_LCD) | |
| 87 | −#define NETX_VA_USB (NETX_IO_VIRT + NETX_OFS_USB) | |
| 88 | −#define NETX_VA_XMAC0 (NETX_IO_VIRT + NETX_OFS_XMAC0) | |
| 89 | −#define NETX_VA_XMAC1 (NETX_IO_VIRT + NETX_OFS_XMAC1) | |
| 90 | −#define NETX_VA_XMAC2 (NETX_IO_VIRT + NETX_OFS_XMAC2) | |
| 91 | −#define NETX_VA_XMAC3 (NETX_IO_VIRT + NETX_OFS_XMAC3) | |
| 92 | −#define NETX_VA_XMAC(no) (NETX_IO_VIRT + NETX_OFS_XMAC(no)) | |
| 93 | −#define NETX_VA_PFIFO (NETX_IO_VIRT + NETX_OFS_PFIFO) | |
| 94 | −#define NETX_VA_XPEC0 (NETX_IO_VIRT + NETX_OFS_XPEC0) | |
| 95 | −#define NETX_VA_XPEC1 (NETX_IO_VIRT + NETX_OFS_XPEC1) | |
| 96 | −#define NETX_VA_XPEC2 (NETX_IO_VIRT + NETX_OFS_XPEC2) | |
| 97 | −#define NETX_VA_XPEC3 (NETX_IO_VIRT + NETX_OFS_XPEC3) | |
| 98 | −#define NETX_VA_XPEC(no) (NETX_IO_VIRT + NETX_OFS_XPEC(no)) | |
| 99 | −#define NETX_VA_VIC (NETX_IO_VIRT + NETX_OFS_VIC) | |
| 100 | − | |
| 101 | −/********************************* | |
| 102 | − * System functions * | |
| 103 | − *********************************/ | |
| 104 | − | |
| 105 | −/* Registers */ | |
| 106 | −#define NETX_SYSTEM_REG(ofs) IOMEM(NETX_VA_SYSTEM + (ofs)) | |
| 107 | −#define NETX_SYSTEM_BOO_SR NETX_SYSTEM_REG(0x00) | |
| 108 | −#define NETX_SYSTEM_IOC_CR NETX_SYSTEM_REG(0x04) | |
| 109 | −#define NETX_SYSTEM_IOC_MR NETX_SYSTEM_REG(0x08) | |
| 110 | − | |
| 111 | −/* FIXME: Docs are not consistent */ | |
| 112 | −/* #define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x08) */ | |
| 113 | −#define NETX_SYSTEM_RES_CR NETX_SYSTEM_REG(0x0c) | |
| 114 | − | |
| 115 | −#define NETX_SYSTEM_PHY_CONTROL NETX_SYSTEM_REG(0x10) | |
| 116 | −#define NETX_SYSTEM_REV NETX_SYSTEM_REG(0x34) | |
| 117 | −#define NETX_SYSTEM_IOC_ACCESS_KEY NETX_SYSTEM_REG(0x70) | |
| 118 | −#define NETX_SYSTEM_WDG_TR NETX_SYSTEM_REG(0x200) | |
| 119 | −#define NETX_SYSTEM_WDG_CTR NETX_SYSTEM_REG(0x204) | |
| 120 | −#define NETX_SYSTEM_WDG_IRQ_TIMEOUT NETX_SYSTEM_REG(0x208) | |
| 121 | −#define NETX_SYSTEM_WDG_RES_TIMEOUT NETX_SYSTEM_REG(0x20c) | |
| 122 | − | |
| 123 | −/* Bits */ | |
| 124 | −#define NETX_SYSTEM_RES_CR_RSTIN (1<<0) | |
| 125 | −#define NETX_SYSTEM_RES_CR_WDG_RES (1<<1) | |
| 126 | −#define NETX_SYSTEM_RES_CR_HOST_RES (1<<2) | |
| 127 | −#define NETX_SYSTEM_RES_CR_FIRMW_RES (1<<3) | |
| 128 | −#define NETX_SYSTEM_RES_CR_XPEC0_RES (1<<4) | |
| 129 | −#define NETX_SYSTEM_RES_CR_XPEC1_RES (1<<5) | |
| 130 | −#define NETX_SYSTEM_RES_CR_XPEC2_RES (1<<6) | |
| 131 | −#define NETX_SYSTEM_RES_CR_XPEC3_RES (1<<7) | |
| 132 | −#define NETX_SYSTEM_RES_CR_DIS_XPEC0_RES (1<<16) | |
| 133 | −#define NETX_SYSTEM_RES_CR_DIS_XPEC1_RES (1<<17) | |
| 134 | −#define NETX_SYSTEM_RES_CR_DIS_XPEC2_RES (1<<18) | |
| 135 | −#define NETX_SYSTEM_RES_CR_DIS_XPEC3_RES (1<<19) | |
| 136 | −#define NETX_SYSTEM_RES_CR_FIRMW_FLG0 (1<<20) | |
| 137 | −#define NETX_SYSTEM_RES_CR_FIRMW_FLG1 (1<<21) | |
| 138 | −#define NETX_SYSTEM_RES_CR_FIRMW_FLG2 (1<<22) | |
| 139 | −#define NETX_SYSTEM_RES_CR_FIRMW_FLG3 (1<<23) | |
| 140 | −#define NETX_SYSTEM_RES_CR_FIRMW_RES_EN (1<<24) | |
| 141 | −#define NETX_SYSTEM_RES_CR_RSTOUT (1<<25) | |
| 142 | −#define NETX_SYSTEM_RES_CR_EN_RSTOUT (1<<26) | |
| 143 | − | |
| 144 | −#define PHY_CONTROL_RESET (1<<31) | |
| 145 | −#define PHY_CONTROL_SIM_BYP (1<<30) | |
| 146 | −#define PHY_CONTROL_CLK_XLATIN (1<<29) | |
| 147 | −#define PHY_CONTROL_PHY1_EN (1<<21) | |
| 148 | −#define PHY_CONTROL_PHY1_NP_MSG_CODE | |
| 149 | −#define PHY_CONTROL_PHY1_AUTOMDIX (1<<17) | |
| 150 | −#define PHY_CONTROL_PHY1_FIXMODE (1<<16) | |
| 151 | −#define PHY_CONTROL_PHY1_MODE(mode) (((mode) & 0x7) << 13) | |
| 152 | −#define PHY_CONTROL_PHY0_EN (1<<12) | |
| 153 | −#define PHY_CONTROL_PHY0_NP_MSG_CODE | |
| 154 | −#define PHY_CONTROL_PHY0_AUTOMDIX (1<<8) | |
| 155 | −#define PHY_CONTROL_PHY0_FIXMODE (1<<7) | |
| 156 | −#define PHY_CONTROL_PHY0_MODE(mode) (((mode) & 0x7) << 4) | |
| 157 | −#define PHY_CONTROL_PHY_ADDRESS(adr) ((adr) & 0xf) | |
| 158 | − | |
| 159 | −#define PHY_MODE_10BASE_T_HALF 0 | |
| 160 | −#define PHY_MODE_10BASE_T_FULL 1 | |
| 161 | −#define PHY_MODE_100BASE_TX_FX_FULL 2 | |
| 162 | −#define PHY_MODE_100BASE_TX_FX_HALF 3 | |
| 163 | −#define PHY_MODE_100BASE_TX_HALF 4 | |
| 164 | −#define PHY_MODE_REPEATER 5 | |
| 165 | −#define PHY_MODE_POWER_DOWN 6 | |
| 166 | −#define PHY_MODE_ALL 7 | |
| 167 | − | |
| 168 | −/* Bits */ | |
| 169 | −#define VECT_CNTL_ENABLE (1 << 5) | |
| 170 | − | |
| 171 | −/******************************* | |
| 172 | − * GPIO and timer module * | |
| 173 | − *******************************/ | |
| 174 | − | |
| 175 | −/* Registers */ | |
| 176 | −#define NETX_GPIO_REG(ofs) IOMEM(NETX_VA_GPIO + (ofs)) | |
| 177 | −#define NETX_GPIO_CFG(gpio) NETX_GPIO_REG(0x0 + ((gpio)<<2)) | |
| 178 | −#define NETX_GPIO_THRESHOLD_CAPTURE(gpio) NETX_GPIO_REG(0x40 + ((gpio)<<2)) | |
| 179 | −#define NETX_GPIO_COUNTER_CTRL(counter) NETX_GPIO_REG(0x80 + ((counter)<<2)) | |
| 180 | −#define NETX_GPIO_COUNTER_MAX(counter) NETX_GPIO_REG(0x94 + ((counter)<<2)) | |
| 181 | −#define NETX_GPIO_COUNTER_CURRENT(counter) NETX_GPIO_REG(0xa8 + ((counter)<<2)) | |
| 182 | −#define NETX_GPIO_IRQ_ENABLE NETX_GPIO_REG(0xbc) | |
| 183 | −#define NETX_GPIO_IRQ_DISABLE NETX_GPIO_REG(0xc0) | |
| 184 | −#define NETX_GPIO_SYSTIME_NS_CMP NETX_GPIO_REG(0xc4) | |
| 185 | −#define NETX_GPIO_LINE NETX_GPIO_REG(0xc8) | |
| 186 | −#define NETX_GPIO_IRQ NETX_GPIO_REG(0xd0) | |
| 187 | − | |
| 188 | −/* Bits */ | |
| 189 | −#define NETX_GPIO_CFG_IOCFG_GP_INPUT (0x0) | |
| 190 | −#define NETX_GPIO_CFG_IOCFG_GP_OUTPUT (0x1) | |
| 191 | −#define NETX_GPIO_CFG_IOCFG_GP_UART (0x2) | |
| 192 | −#define NETX_GPIO_CFG_INV (1<<2) | |
| 193 | −#define NETX_GPIO_CFG_MODE_INPUT_READ (0<<3) | |
| 194 | −#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_CONT_RISING (1<<3) | |
| 195 | −#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_ONCE_RISING (2<<3) | |
| 196 | −#define NETX_GPIO_CFG_MODE_INPUT_CAPTURE_HIGH_LEVEL (3<<3) | |
| 197 | −#define NETX_GPIO_CFG_COUNT_REF_COUNTER0 (0<<5) | |
| 198 | −#define NETX_GPIO_CFG_COUNT_REF_COUNTER1 (1<<5) | |
| 199 | −#define NETX_GPIO_CFG_COUNT_REF_COUNTER2 (2<<5) | |
| 200 | −#define NETX_GPIO_CFG_COUNT_REF_COUNTER3 (3<<5) | |
| 201 | −#define NETX_GPIO_CFG_COUNT_REF_COUNTER4 (4<<5) | |
| 202 | −#define NETX_GPIO_CFG_COUNT_REF_SYSTIME (7<<5) | |
| 203 | − | |
| 204 | −#define NETX_GPIO_COUNTER_CTRL_RUN (1<<0) | |
| 205 | −#define NETX_GPIO_COUNTER_CTRL_SYM (1<<1) | |
| 206 | −#define NETX_GPIO_COUNTER_CTRL_ONCE (1<<2) | |
| 207 | −#define NETX_GPIO_COUNTER_CTRL_IRQ_EN (1<<3) | |
| 208 | −#define NETX_GPIO_COUNTER_CTRL_CNT_EVENT (1<<4) | |
| 209 | −#define NETX_GPIO_COUNTER_CTRL_RST_EN (1<<5) | |
| 210 | −#define NETX_GPIO_COUNTER_CTRL_SEL_EVENT (1<<6) | |
| 211 | −#define NETX_GPIO_COUNTER_CTRL_GPIO_REF /* FIXME */ | |
| 212 | − | |
| 213 | −#define GPIO_BIT(gpio) (1<<(gpio)) | |
| 214 | −#define COUNTER_BIT(counter) ((1<<16)<<(counter)) | |
| 215 | − | |
| 216 | −/******************************* | |
| 217 | − * PIO * | |
| 218 | − *******************************/ | |
| 219 | − | |
| 220 | −/* Registers */ | |
| 221 | −#define NETX_PIO_REG(ofs) IOMEM(NETX_VA_PIO + (ofs)) | |
| 222 | −#define NETX_PIO_INPIO NETX_PIO_REG(0x0) | |
| 223 | −#define NETX_PIO_OUTPIO NETX_PIO_REG(0x4) | |
| 224 | −#define NETX_PIO_OEPIO NETX_PIO_REG(0x8) | |
| 225 | − | |
| 226 | −/******************************* | |
| 227 | − * MII Unit * | |
| 228 | − *******************************/ | |
| 229 | − | |
| 230 | −/* Registers */ | |
| 231 | −#define NETX_MIIMU IOMEM(NETX_VA_MIIMU) | |
| 232 | − | |
| 233 | −/* Bits */ | |
| 234 | −#define MIIMU_SNRDY (1<<0) | |
| 235 | −#define MIIMU_PREAMBLE (1<<1) | |
| 236 | −#define MIIMU_OPMODE_WRITE (1<<2) | |
| 237 | −#define MIIMU_MDC_PERIOD (1<<3) | |
| 238 | −#define MIIMU_PHY_NRES (1<<4) | |
| 239 | −#define MIIMU_RTA (1<<5) | |
| 240 | −#define MIIMU_REGADDR(adr) (((adr) & 0x1f) << 6) | |
| 241 | −#define MIIMU_PHYADDR(adr) (((adr) & 0x1f) << 11) | |
| 242 | −#define MIIMU_DATA(data) (((data) & 0xffff) << 16) | |
| 243 | − | |
| 244 | −/******************************* | |
| 245 | − * xmac / xpec * | |
| 246 | − *******************************/ | |
| 247 | − | |
| 248 | −/* XPEC register offsets relative to NETX_VA_XPEC(no) */ | |
| 249 | −#define NETX_XPEC_R0_OFS 0x00 | |
| 250 | −#define NETX_XPEC_R1_OFS 0x04 | |
| 251 | −#define NETX_XPEC_R2_OFS 0x08 | |
| 252 | −#define NETX_XPEC_R3_OFS 0x0c | |
| 253 | −#define NETX_XPEC_R4_OFS 0x10 | |
| 254 | −#define NETX_XPEC_R5_OFS 0x14 | |
| 255 | −#define NETX_XPEC_R6_OFS 0x18 | |
| 256 | −#define NETX_XPEC_R7_OFS 0x1c | |
| 257 | −#define NETX_XPEC_RANGE01_OFS 0x20 | |
| 258 | −#define NETX_XPEC_RANGE23_OFS 0x24 | |
| 259 | −#define NETX_XPEC_RANGE45_OFS 0x28 | |
| 260 | −#define NETX_XPEC_RANGE67_OFS 0x2c | |
| 261 | −#define NETX_XPEC_PC_OFS 0x48 | |
| 262 | −#define NETX_XPEC_TIMER_OFS(timer) (0x30 + ((timer)<<2)) | |
| 263 | −#define NETX_XPEC_IRQ_OFS 0x8c | |
| 264 | −#define NETX_XPEC_SYSTIME_NS_OFS 0x90 | |
| 265 | −#define NETX_XPEC_FIFO_DATA_OFS 0x94 | |
| 266 | −#define NETX_XPEC_SYSTIME_S_OFS 0x98 | |
| 267 | −#define NETX_XPEC_ADC_OFS 0x9c | |
| 268 | −#define NETX_XPEC_URX_COUNT_OFS 0x40 | |
| 269 | −#define NETX_XPEC_UTX_COUNT_OFS 0x44 | |
| 270 | −#define NETX_XPEC_PC_OFS 0x48 | |
| 271 | −#define NETX_XPEC_ZERO_OFS 0x4c | |
| 272 | −#define NETX_XPEC_STATCFG_OFS 0x50 | |
| 273 | −#define NETX_XPEC_EC_MASKA_OFS 0x54 | |
| 274 | −#define NETX_XPEC_EC_MASKB_OFS 0x58 | |
| 275 | −#define NETX_XPEC_EC_MASK0_OFS 0x5c | |
| 276 | −#define NETX_XPEC_EC_MASK8_OFS 0x7c | |
| 277 | −#define NETX_XPEC_EC_MASK9_OFS 0x80 | |
| 278 | −#define NETX_XPEC_XPU_HOLD_PC_OFS 0x100 | |
| 279 | −#define NETX_XPEC_RAM_START_OFS 0x2000 | |
| 280 | − | |
| 281 | −/* Bits */ | |
| 282 | −#define XPU_HOLD_PC (1<<0) | |
| 283 | − | |
| 284 | −/* XMAC register offsets relative to NETX_VA_XMAC(no) */ | |
| 285 | −#define NETX_XMAC_RPU_PROGRAM_START_OFS 0x000 | |
| 286 | −#define NETX_XMAC_RPU_PROGRAM_END_OFS 0x3ff | |
| 287 | −#define NETX_XMAC_TPU_PROGRAM_START_OFS 0x400 | |
| 288 | −#define NETX_XMAC_TPU_PROGRAM_END_OFS 0x7ff | |
| 289 | −#define NETX_XMAC_RPU_HOLD_PC_OFS 0xa00 | |
| 290 | −#define NETX_XMAC_TPU_HOLD_PC_OFS 0xa04 | |
| 291 | −#define NETX_XMAC_STATUS_SHARED0_OFS 0x840 | |
| 292 | −#define NETX_XMAC_CONFIG_SHARED0_OFS 0x844 | |
| 293 | −#define NETX_XMAC_STATUS_SHARED1_OFS 0x848 | |
| 294 | −#define NETX_XMAC_CONFIG_SHARED1_OFS 0x84c | |
| 295 | −#define NETX_XMAC_STATUS_SHARED2_OFS 0x850 | |
| 296 | −#define NETX_XMAC_CONFIG_SHARED2_OFS 0x854 | |
| 297 | −#define NETX_XMAC_STATUS_SHARED3_OFS 0x858 | |
| 298 | −#define NETX_XMAC_CONFIG_SHARED3_OFS 0x85c | |
| 299 | − | |
| 300 | −#define RPU_HOLD_PC (1<<15) | |
| 301 | −#define TPU_HOLD_PC (1<<15) | |
| 302 | − | |
| 303 | −/******************************* | |
| 304 | − * Pointer FIFO * | |
| 305 | − *******************************/ | |
| 306 | − | |
| 307 | −/* Registers */ | |
| 308 | −#define NETX_PFIFO_REG(ofs) IOMEM(NETX_VA_PFIFO + (ofs)) | |
| 309 | −#define NETX_PFIFO_BASE(pfifo) NETX_PFIFO_REG(0x00 + ((pfifo)<<2)) | |
| 310 | −#define NETX_PFIFO_BORDER_BASE(pfifo) NETX_PFIFO_REG(0x80 + ((pfifo)<<2)) | |
| 311 | −#define NETX_PFIFO_RESET NETX_PFIFO_REG(0x100) | |
| 312 | −#define NETX_PFIFO_FULL NETX_PFIFO_REG(0x104) | |
| 313 | −#define NETX_PFIFO_EMPTY NETX_PFIFO_REG(0x108) | |
| 314 | −#define NETX_PFIFO_OVEFLOW NETX_PFIFO_REG(0x10c) | |
| 315 | −#define NETX_PFIFO_UNDERRUN NETX_PFIFO_REG(0x110) | |
| 316 | −#define NETX_PFIFO_FILL_LEVEL(pfifo) NETX_PFIFO_REG(0x180 + ((pfifo)<<2)) | |
| 317 | −#define NETX_PFIFO_XPEC_ISR(xpec) NETX_PFIFO_REG(0x400 + ((xpec) << 2)) | |
| 318 | − | |
| 319 | − | |
| 320 | −/******************************* | |
| 321 | − * Memory Controller * | |
| 322 | − *******************************/ | |
| 323 | − | |
| 324 | −/* Registers */ | |
| 325 | −#define NETX_MEMCR_REG(ofs) IOMEM(NETX_VA_MEMCR + (ofs)) | |
| 326 | −#define NETX_MEMCR_SRAM_CTRL(cs) NETX_MEMCR_REG(0x0 + 4 * (cs)) /* SRAM for CS 0..2 */ | |
| 327 | −#define NETX_MEMCR_SDRAM_CFG_CTRL NETX_MEMCR_REG(0x40) | |
| 328 | −#define NETX_MEMCR_SDRAM_TIMING_CTRL NETX_MEMCR_REG(0x44) | |
| 329 | −#define NETX_MEMCR_SDRAM_MODE NETX_MEMCR_REG(0x48) | |
| 330 | −#define NETX_MEMCR_SDRAM_EXT_MODE NETX_MEMCR_REG(0x4c) | |
| 331 | −#define NETX_MEMCR_PRIO_TIMESLOT_CTRL NETX_MEMCR_REG(0x80) | |
| 332 | −#define NETX_MEMCR_PRIO_ACCESS_CTRL NETX_MEMCR_REG(0x84) | |
| 333 | − | |
| 334 | −/* Bits */ | |
| 335 | −#define NETX_MEMCR_SRAM_CTRL_WIDTHEXTMEM(x) (((x) & 0x3) << 24) | |
| 336 | −#define NETX_MEMCR_SRAM_CTRL_WSPOSTPAUSEEXTMEM(x) (((x) & 0x3) << 16) | |
| 337 | −#define NETX_MEMCR_SRAM_CTRL_WSPREPASEEXTMEM(x) (((x) & 0x3) << 8) | |
| 338 | −#define NETX_MEMCR_SRAM_CTRL_WSEXTMEM(x) (((x) & 0x1f) << 0) | |
| 339 | − | |
| 340 | − | |
| 341 | −/******************************* | |
| 342 | − * Dual Port Memory * | |
| 343 | − *******************************/ | |
| 344 | − | |
| 345 | −/* Registers */ | |
| 346 | −#define NETX_DPMAS_REG(ofs) IOMEM(NETX_VA_DPMAS + (ofs)) | |
| 347 | −#define NETX_DPMAS_SYS_STAT NETX_DPMAS_REG(0x4d8) | |
| 348 | −#define NETX_DPMAS_INT_STAT NETX_DPMAS_REG(0x4e0) | |
| 349 | −#define NETX_DPMAS_INT_EN NETX_DPMAS_REG(0x4f0) | |
| 350 | −#define NETX_DPMAS_IF_CONF0 NETX_DPMAS_REG(0x608) | |
| 351 | −#define NETX_DPMAS_IF_CONF1 NETX_DPMAS_REG(0x60c) | |
| 352 | −#define NETX_DPMAS_EXT_CONFIG(cs) NETX_DPMAS_REG(0x610 + 4 * (cs)) | |
| 353 | −#define NETX_DPMAS_IO_MODE0 NETX_DPMAS_REG(0x620) /* I/O 32..63 */ | |
| 354 | −#define NETX_DPMAS_DRV_EN0 NETX_DPMAS_REG(0x624) | |
| 355 | −#define NETX_DPMAS_DATA0 NETX_DPMAS_REG(0x628) | |
| 356 | −#define NETX_DPMAS_IO_MODE1 NETX_DPMAS_REG(0x630) /* I/O 64..84 */ | |
| 357 | −#define NETX_DPMAS_DRV_EN1 NETX_DPMAS_REG(0x634) | |
| 358 | −#define NETX_DPMAS_DATA1 NETX_DPMAS_REG(0x638) | |
| 359 | − | |
| 360 | −/* Bits */ | |
| 361 | −#define NETX_DPMAS_INT_EN_GLB_EN (1<<31) | |
| 362 | −#define NETX_DPMAS_INT_EN_MEM_LCK (1<<30) | |
| 363 | −#define NETX_DPMAS_INT_EN_WDG (1<<29) | |
| 364 | −#define NETX_DPMAS_INT_EN_PIO72 (1<<28) | |
| 365 | −#define NETX_DPMAS_INT_EN_PIO47 (1<<27) | |
| 366 | −#define NETX_DPMAS_INT_EN_PIO40 (1<<26) | |
| 367 | −#define NETX_DPMAS_INT_EN_PIO36 (1<<25) | |
| 368 | −#define NETX_DPMAS_INT_EN_PIO35 (1<<24) | |
| 369 | − | |
| 370 | −#define NETX_DPMAS_IF_CONF0_HIF_DISABLED (0<<28) | |
| 371 | −#define NETX_DPMAS_IF_CONF0_HIF_EXT_BUS (1<<28) | |
| 372 | −#define NETX_DPMAS_IF_CONF0_HIF_UP_8BIT (2<<28) | |
| 373 | −#define NETX_DPMAS_IF_CONF0_HIF_UP_16BIT (3<<28) | |
| 374 | −#define NETX_DPMAS_IF_CONF0_HIF_IO (4<<28) | |
| 375 | −#define NETX_DPMAS_IF_CONF0_WAIT_DRV_PP (1<<14) | |
| 376 | −#define NETX_DPMAS_IF_CONF0_WAIT_DRV_OD (2<<14) | |
| 377 | −#define NETX_DPMAS_IF_CONF0_WAIT_DRV_TRI (3<<14) | |
| 378 | − | |
| 379 | −#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO35 (1<<26) | |
| 380 | −#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO36 (1<<27) | |
| 381 | −#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO40 (1<<28) | |
| 382 | −#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO47 (1<<29) | |
| 383 | −#define NETX_DPMAS_IF_CONF1_IRQ_POL_PIO72 (1<<30) | |
| 384 | − | |
| 385 | −#define NETX_EXT_CONFIG_TALEWIDTH(x) (((x) & 0x7) << 29) | |
| 386 | −#define NETX_EXT_CONFIG_TADRHOLD(x) (((x) & 0x7) << 26) | |
| 387 | −#define NETX_EXT_CONFIG_TCSON(x) (((x) & 0x7) << 23) | |
| 388 | −#define NETX_EXT_CONFIG_TRDON(x) (((x) & 0x7) << 20) | |
| 389 | −#define NETX_EXT_CONFIG_TWRON(x) (((x) & 0x7) << 17) | |
| 390 | −#define NETX_EXT_CONFIG_TWROFF(x) (((x) & 0x1f) << 12) | |
| 391 | −#define NETX_EXT_CONFIG_TRDWRCYC(x) (((x) & 0x1f) << 7) | |
| 392 | −#define NETX_EXT_CONFIG_WAIT_POL (1<<6) | |
| 393 | −#define NETX_EXT_CONFIG_WAIT_EN (1<<5) | |
| 394 | −#define NETX_EXT_CONFIG_NRD_MODE (1<<4) | |
| 395 | −#define NETX_EXT_CONFIG_DS_MODE (1<<3) | |
| 396 | −#define NETX_EXT_CONFIG_NWR_MODE (1<<2) | |
| 397 | −#define NETX_EXT_CONFIG_16BIT (1<<1) | |
| 398 | −#define NETX_EXT_CONFIG_CS_ENABLE (1<<0) | |
| 399 | − | |
| 400 | −#define NETX_DPMAS_IO_MODE0_WRL (1<<13) | |
| 401 | −#define NETX_DPMAS_IO_MODE0_WAIT (1<<14) | |
| 402 | −#define NETX_DPMAS_IO_MODE0_READY (1<<15) | |
| 403 | −#define NETX_DPMAS_IO_MODE0_CS0 (1<<19) | |
| 404 | −#define NETX_DPMAS_IO_MODE0_EXTRD (1<<20) | |
| 405 | − | |
| 406 | −#define NETX_DPMAS_IO_MODE1_CS2 (1<<15) | |
| 407 | −#define NETX_DPMAS_IO_MODE1_CS1 (1<<16) | |
| 408 | −#define NETX_DPMAS_IO_MODE1_SAMPLE_NPOR (0<<30) | |
| 409 | −#define NETX_DPMAS_IO_MODE1_SAMPLE_100MHZ (1<<30) | |
| 410 | −#define NETX_DPMAS_IO_MODE1_SAMPLE_NPIO36 (2<<30) | |
| 411 | −#define NETX_DPMAS_IO_MODE1_SAMPLE_PIO36 (3<<30) | |
| 412 | − | |
| 413 | −/******************************* | |
| 414 | − * I2C * | |
| 415 | − *******************************/ | |
| 416 | −#define NETX_I2C_REG(ofs) IOMEM(NETX_VA_I2C, (ofs)) | |
| 417 | −#define NETX_I2C_CTRL NETX_I2C_REG(0x0) | |
| 418 | −#define NETX_I2C_DATA NETX_I2C_REG(0x4) | |
| 419 | − | |
| 420 | −#endif /* __ASM_ARCH_NETX_REGS_H */ | |
| @@ -1,42 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/pfifo.h | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | − | |
| 9 | −#ifndef ASM_ARCH_PFIFO_H | |
| 10 | −#define ASM_ARCH_PFIFO_H | |
| 11 | − | |
| 12 | −static inline int pfifo_push(int no, unsigned int pointer) | |
| 13 | −{ | |
| 14 | − writel(pointer, NETX_PFIFO_BASE(no)); | |
| 15 | − return 0; | |
| 16 | −} | |
| 17 | − | |
| 18 | −static inline unsigned int pfifo_pop(int no) | |
| 19 | −{ | |
| 20 | − return readl(NETX_PFIFO_BASE(no)); | |
| 21 | −} | |
| 22 | − | |
| 23 | −static inline int pfifo_fill_level(int no) | |
| 24 | −{ | |
| 25 | − | |
| 26 | − return readl(NETX_PFIFO_FILL_LEVEL(no)); | |
| 27 | −} | |
| 28 | − | |
| 29 | −static inline int pfifo_full(int no) | |
| 30 | −{ | |
| 31 | − return readl(NETX_PFIFO_FULL) & (1<<no) ? 1 : 0; | |
| 32 | −} | |
| 33 | − | |
| 34 | −static inline int pfifo_empty(int no) | |
| 35 | −{ | |
| 36 | − return readl(NETX_PFIFO_EMPTY) & (1<<no) ? 1 : 0; | |
| 37 | −} | |
| 38 | − | |
| 39 | −int pfifo_request(unsigned int pfifo_mask); | |
| 40 | −void pfifo_free(unsigned int pfifo_mask); | |
| 41 | − | |
| 42 | −#endif /* ASM_ARCH_PFIFO_H */ | |
| @@ -1,63 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/uncompress.h | |
| 4 | − * | |
| 5 | − * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −/* | |
| 9 | − * The following code assumes the serial port has already been | |
| 10 | − * initialized by the bootloader. We search for the first enabled | |
| 11 | − * port in the most probable order. If you didn't setup a port in | |
| 12 | − * your bootloader then nothing will appear (which might be desired). | |
| 13 | − * | |
| 14 | − * This does not append a newline | |
| 15 | − */ | |
| 16 | − | |
| 17 | −#define REG(x) (*(volatile unsigned long *)(x)) | |
| 18 | − | |
| 19 | −#define UART1_BASE 0x100a00 | |
| 20 | −#define UART2_BASE 0x100a80 | |
| 21 | − | |
| 22 | −#define UART_DR 0x0 | |
| 23 | − | |
| 24 | −#define UART_CR 0x14 | |
| 25 | −#define CR_UART_EN (1<<0) | |
| 26 | − | |
| 27 | −#define UART_FR 0x18 | |
| 28 | −#define FR_BUSY (1<<3) | |
| 29 | −#define FR_TXFF (1<<5) | |
| 30 | − | |
| 31 | −static inline void putc(char c) | |
| 32 | −{ | |
| 33 | − unsigned long base; | |
| 34 | − | |
| 35 | − if (REG(UART1_BASE + UART_CR) & CR_UART_EN) | |
| 36 | − base = UART1_BASE; | |
| 37 | − else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) | |
| 38 | − base = UART2_BASE; | |
| 39 | − else | |
| 40 | − return; | |
| 41 | − | |
| 42 | − while (REG(base + UART_FR) & FR_TXFF); | |
| 43 | − REG(base + UART_DR) = c; | |
| 44 | −} | |
| 45 | − | |
| 46 | −static inline void flush(void) | |
| 47 | −{ | |
| 48 | − unsigned long base; | |
| 49 | − | |
| 50 | − if (REG(UART1_BASE + UART_CR) & CR_UART_EN) | |
| 51 | − base = UART1_BASE; | |
| 52 | − else if (REG(UART2_BASE + UART_CR) & CR_UART_EN) | |
| 53 | − base = UART2_BASE; | |
| 54 | − else | |
| 55 | − return; | |
| 56 | − | |
| 57 | − while (REG(base + UART_FR) & FR_BUSY); | |
| 58 | −} | |
| 59 | − | |
| 60 | −/* | |
| 61 | − * nothing to do | |
| 62 | − */ | |
| 63 | −#define arch_decomp_setup() | |
| @@ -1,30 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/include/mach/xc.h | |
| 4 | − * | |
| 5 | − * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#ifndef __ASM_ARCH_XC_H | |
| 9 | −#define __ASM_ARCH_XC_H | |
| 10 | − | |
| 11 | −struct xc { | |
| 12 | − int no; | |
| 13 | − unsigned int type; | |
| 14 | − unsigned int version; | |
| 15 | − void __iomem *xpec_base; | |
| 16 | − void __iomem *xmac_base; | |
| 17 | − void __iomem *sram_base; | |
| 18 | − int irq; | |
| 19 | − struct device *dev; | |
| 20 | −}; | |
| 21 | − | |
| 22 | −int xc_reset(struct xc *x); | |
| 23 | −int xc_stop(struct xc* x); | |
| 24 | −int xc_start(struct xc *x); | |
| 25 | −int xc_running(struct xc *x); | |
| 26 | −int xc_request_firmware(struct xc* x); | |
| 27 | −struct xc* request_xc(int xcno, struct device *dev); | |
| 28 | −void free_xc(struct xc *x); | |
| 29 | − | |
| 30 | −#endif /* __ASM_ARCH_XC_H */ | |
| @@ -1,197 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/nxdb500.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/dma-mapping.h> | |
| 9 | −#include <linux/init.h> | |
| 10 | −#include <linux/interrupt.h> | |
| 11 | −#include <linux/mtd/plat-ram.h> | |
| 12 | −#include <linux/platform_device.h> | |
| 13 | −#include <linux/amba/bus.h> | |
| 14 | −#include <linux/amba/clcd.h> | |
| 15 | − | |
| 16 | −#include <mach/hardware.h> | |
| 17 | −#include <asm/mach-types.h> | |
| 18 | −#include <asm/mach/arch.h> | |
| 19 | −#include <mach/netx-regs.h> | |
| 20 | −#include <linux/platform_data/eth-netx.h> | |
| 21 | − | |
| 22 | −#include "generic.h" | |
| 23 | −#include "fb.h" | |
| 24 | − | |
| 25 | −static struct clcd_panel qvga = { | |
| 26 | − .mode = { | |
| 27 | − .name = "QVGA", | |
| 28 | − .refresh = 60, | |
| 29 | − .xres = 240, | |
| 30 | − .yres = 320, | |
| 31 | − .pixclock = 187617, | |
| 32 | − .left_margin = 6, | |
| 33 | − .right_margin = 26, | |
| 34 | − .upper_margin = 0, | |
| 35 | − .lower_margin = 6, | |
| 36 | − .hsync_len = 6, | |
| 37 | − .vsync_len = 1, | |
| 38 | − .sync = 0, | |
| 39 | − .vmode = FB_VMODE_NONINTERLACED, | |
| 40 | − }, | |
| 41 | − .width = -1, | |
| 42 | − .height = -1, | |
| 43 | − .tim2 = 16, | |
| 44 | − .cntl = CNTL_LCDTFT | CNTL_BGR, | |
| 45 | − .bpp = 16, | |
| 46 | − .grayscale = 0, | |
| 47 | −}; | |
| 48 | − | |
| 49 | −static inline int nxdb500_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) | |
| 50 | −{ | |
| 51 | − var->green.length = 5; | |
| 52 | − var->green.msb_right = 0; | |
| 53 | − | |
| 54 | − return clcdfb_check(fb, var); | |
| 55 | −} | |
| 56 | − | |
| 57 | −static int nxdb500_clcd_setup(struct clcd_fb *fb) | |
| 58 | −{ | |
| 59 | − unsigned int val; | |
| 60 | − | |
| 61 | − fb->fb.var.green.length = 5; | |
| 62 | − fb->fb.var.green.msb_right = 0; | |
| 63 | − | |
| 64 | − /* enable asic control */ | |
| 65 | − val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); | |
| 66 | − writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); | |
| 67 | − | |
| 68 | − writel(3, NETX_SYSTEM_IOC_CR); | |
| 69 | − | |
| 70 | − val = readl(NETX_PIO_OUTPIO); | |
| 71 | − writel(val | 1, NETX_PIO_OUTPIO); | |
| 72 | − | |
| 73 | − val = readl(NETX_PIO_OEPIO); | |
| 74 | − writel(val | 1, NETX_PIO_OEPIO); | |
| 75 | − return netx_clcd_setup(fb); | |
| 76 | −} | |
| 77 | − | |
| 78 | −static struct clcd_board clcd_data = { | |
| 79 | − .name = "netX", | |
| 80 | − .check = nxdb500_check, | |
| 81 | − .decode = clcdfb_decode, | |
| 82 | − .enable = netx_clcd_enable, | |
| 83 | − .setup = nxdb500_clcd_setup, | |
| 84 | − .mmap = netx_clcd_mmap, | |
| 85 | − .remove = netx_clcd_remove, | |
| 86 | −}; | |
| 87 | − | |
| 88 | −static struct netxeth_platform_data eth0_platform_data = { | |
| 89 | − .xcno = 0, | |
| 90 | −}; | |
| 91 | − | |
| 92 | −static struct platform_device netx_eth0_device = { | |
| 93 | − .name = "netx-eth", | |
| 94 | − .id = 0, | |
| 95 | − .num_resources = 0, | |
| 96 | − .resource = NULL, | |
| 97 | − .dev = { | |
| 98 | − .platform_data = ð0_platform_data, | |
| 99 | − } | |
| 100 | −}; | |
| 101 | − | |
| 102 | −static struct netxeth_platform_data eth1_platform_data = { | |
| 103 | − .xcno = 1, | |
| 104 | −}; | |
| 105 | − | |
| 106 | −static struct platform_device netx_eth1_device = { | |
| 107 | − .name = "netx-eth", | |
| 108 | − .id = 1, | |
| 109 | − .num_resources = 0, | |
| 110 | − .resource = NULL, | |
| 111 | − .dev = { | |
| 112 | − .platform_data = ð1_platform_data, | |
| 113 | − } | |
| 114 | −}; | |
| 115 | − | |
| 116 | −static struct resource netx_uart0_resources[] = { | |
| 117 | − [0] = { | |
| 118 | − .start = 0x00100A00, | |
| 119 | − .end = 0x00100A3F, | |
| 120 | − .flags = IORESOURCE_MEM, | |
| 121 | − }, | |
| 122 | − [1] = { | |
| 123 | − .start = (NETX_IRQ_UART0), | |
| 124 | − .end = (NETX_IRQ_UART0), | |
| 125 | − .flags = IORESOURCE_IRQ, | |
| 126 | − }, | |
| 127 | −}; | |
| 128 | − | |
| 129 | −static struct platform_device netx_uart0_device = { | |
| 130 | − .name = "netx-uart", | |
| 131 | − .id = 0, | |
| 132 | − .num_resources = ARRAY_SIZE(netx_uart0_resources), | |
| 133 | − .resource = netx_uart0_resources, | |
| 134 | −}; | |
| 135 | − | |
| 136 | −static struct resource netx_uart1_resources[] = { | |
| 137 | − [0] = { | |
| 138 | − .start = 0x00100A40, | |
| 139 | − .end = 0x00100A7F, | |
| 140 | − .flags = IORESOURCE_MEM, | |
| 141 | − }, | |
| 142 | − [1] = { | |
| 143 | − .start = (NETX_IRQ_UART1), | |
| 144 | − .end = (NETX_IRQ_UART1), | |
| 145 | − .flags = IORESOURCE_IRQ, | |
| 146 | − }, | |
| 147 | −}; | |
| 148 | − | |
| 149 | −static struct platform_device netx_uart1_device = { | |
| 150 | − .name = "netx-uart", | |
| 151 | − .id = 1, | |
| 152 | − .num_resources = ARRAY_SIZE(netx_uart1_resources), | |
| 153 | − .resource = netx_uart1_resources, | |
| 154 | −}; | |
| 155 | − | |
| 156 | −static struct resource netx_uart2_resources[] = { | |
| 157 | − [0] = { | |
| 158 | − .start = 0x00100A80, | |
| 159 | − .end = 0x00100ABF, | |
| 160 | − .flags = IORESOURCE_MEM, | |
| 161 | − }, | |
| 162 | − [1] = { | |
| 163 | − .start = (NETX_IRQ_UART2), | |
| 164 | − .end = (NETX_IRQ_UART2), | |
| 165 | − .flags = IORESOURCE_IRQ, | |
| 166 | − }, | |
| 167 | −}; | |
| 168 | − | |
| 169 | −static struct platform_device netx_uart2_device = { | |
| 170 | − .name = "netx-uart", | |
| 171 | − .id = 2, | |
| 172 | − .num_resources = ARRAY_SIZE(netx_uart2_resources), | |
| 173 | − .resource = netx_uart2_resources, | |
| 174 | −}; | |
| 175 | − | |
| 176 | −static struct platform_device *devices[] __initdata = { | |
| 177 | − &netx_eth0_device, | |
| 178 | − &netx_eth1_device, | |
| 179 | − &netx_uart0_device, | |
| 180 | − &netx_uart1_device, | |
| 181 | − &netx_uart2_device, | |
| 182 | −}; | |
| 183 | − | |
| 184 | −static void __init nxdb500_init(void) | |
| 185 | −{ | |
| 186 | − netx_fb_init(&clcd_data, &qvga); | |
| 187 | − platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| 188 | −} | |
| 189 | − | |
| 190 | −MACHINE_START(NXDB500, "Hilscher nxdb500") | |
| 191 | − .atag_offset = 0x100, | |
| 192 | − .map_io = netx_map_io, | |
| 193 | − .init_irq = netx_init_irq, | |
| 194 | − .init_time = netx_timer_init, | |
| 195 | − .init_machine = nxdb500_init, | |
| 196 | − .restart = netx_restart, | |
| 197 | −MACHINE_END | |
| @@ -1,90 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/nxdkn.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/dma-mapping.h> | |
| 9 | −#include <linux/init.h> | |
| 10 | −#include <linux/interrupt.h> | |
| 11 | −#include <linux/mtd/plat-ram.h> | |
| 12 | −#include <linux/platform_device.h> | |
| 13 | −#include <linux/amba/bus.h> | |
| 14 | −#include <linux/amba/clcd.h> | |
| 15 | − | |
| 16 | −#include <mach/hardware.h> | |
| 17 | −#include <asm/mach-types.h> | |
| 18 | −#include <asm/mach/arch.h> | |
| 19 | −#include <mach/netx-regs.h> | |
| 20 | −#include <linux/platform_data/eth-netx.h> | |
| 21 | − | |
| 22 | −#include "generic.h" | |
| 23 | − | |
| 24 | −static struct netxeth_platform_data eth0_platform_data = { | |
| 25 | − .xcno = 0, | |
| 26 | −}; | |
| 27 | − | |
| 28 | −static struct platform_device nxdkn_eth0_device = { | |
| 29 | − .name = "netx-eth", | |
| 30 | − .id = 0, | |
| 31 | − .num_resources = 0, | |
| 32 | − .resource = NULL, | |
| 33 | − .dev = { | |
| 34 | − .platform_data = ð0_platform_data, | |
| 35 | − } | |
| 36 | −}; | |
| 37 | − | |
| 38 | −static struct netxeth_platform_data eth1_platform_data = { | |
| 39 | − .xcno = 1, | |
| 40 | −}; | |
| 41 | − | |
| 42 | −static struct platform_device nxdkn_eth1_device = { | |
| 43 | − .name = "netx-eth", | |
| 44 | − .id = 1, | |
| 45 | − .num_resources = 0, | |
| 46 | − .resource = NULL, | |
| 47 | − .dev = { | |
| 48 | − .platform_data = ð1_platform_data, | |
| 49 | − } | |
| 50 | −}; | |
| 51 | − | |
| 52 | −static struct resource netx_uart0_resources[] = { | |
| 53 | − [0] = { | |
| 54 | − .start = 0x00100A00, | |
| 55 | − .end = 0x00100A3F, | |
| 56 | − .flags = IORESOURCE_MEM, | |
| 57 | − }, | |
| 58 | − [1] = { | |
| 59 | − .start = (NETX_IRQ_UART0), | |
| 60 | − .end = (NETX_IRQ_UART0), | |
| 61 | − .flags = IORESOURCE_IRQ, | |
| 62 | − }, | |
| 63 | −}; | |
| 64 | − | |
| 65 | −static struct platform_device netx_uart0_device = { | |
| 66 | − .name = "netx-uart", | |
| 67 | − .id = 0, | |
| 68 | − .num_resources = ARRAY_SIZE(netx_uart0_resources), | |
| 69 | − .resource = netx_uart0_resources, | |
| 70 | −}; | |
| 71 | − | |
| 72 | −static struct platform_device *devices[] __initdata = { | |
| 73 | − &nxdkn_eth0_device, | |
| 74 | − &nxdkn_eth1_device, | |
| 75 | − &netx_uart0_device, | |
| 76 | −}; | |
| 77 | − | |
| 78 | −static void __init nxdkn_init(void) | |
| 79 | −{ | |
| 80 | − platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| 81 | −} | |
| 82 | − | |
| 83 | −MACHINE_START(NXDKN, "Hilscher nxdkn") | |
| 84 | − .atag_offset = 0x100, | |
| 85 | − .map_io = netx_map_io, | |
| 86 | − .init_irq = netx_init_irq, | |
| 87 | − .init_time = netx_timer_init, | |
| 88 | − .init_machine = nxdkn_init, | |
| 89 | − .restart = netx_restart, | |
| 90 | −MACHINE_END | |
| @@ -1,174 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/nxeb500hmi.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/dma-mapping.h> | |
| 9 | −#include <linux/init.h> | |
| 10 | −#include <linux/interrupt.h> | |
| 11 | −#include <linux/mtd/plat-ram.h> | |
| 12 | −#include <linux/platform_device.h> | |
| 13 | −#include <linux/amba/bus.h> | |
| 14 | −#include <linux/amba/clcd.h> | |
| 15 | − | |
| 16 | −#include <mach/hardware.h> | |
| 17 | −#include <asm/mach-types.h> | |
| 18 | −#include <asm/mach/arch.h> | |
| 19 | −#include <mach/netx-regs.h> | |
| 20 | −#include <linux/platform_data/eth-netx.h> | |
| 21 | − | |
| 22 | −#include "generic.h" | |
| 23 | −#include "fb.h" | |
| 24 | − | |
| 25 | −static struct clcd_panel qvga = { | |
| 26 | − .mode = { | |
| 27 | − .name = "QVGA", | |
| 28 | − .refresh = 60, | |
| 29 | − .xres = 240, | |
| 30 | − .yres = 320, | |
| 31 | − .pixclock = 187617, | |
| 32 | − .left_margin = 6, | |
| 33 | − .right_margin = 26, | |
| 34 | − .upper_margin = 0, | |
| 35 | − .lower_margin = 6, | |
| 36 | − .hsync_len = 6, | |
| 37 | − .vsync_len = 1, | |
| 38 | − .sync = 0, | |
| 39 | − .vmode = FB_VMODE_NONINTERLACED, | |
| 40 | − }, | |
| 41 | − .width = -1, | |
| 42 | − .height = -1, | |
| 43 | − .tim2 = 16, | |
| 44 | − .cntl = CNTL_LCDTFT | CNTL_BGR, | |
| 45 | − .bpp = 16, | |
| 46 | − .grayscale = 0, | |
| 47 | −}; | |
| 48 | − | |
| 49 | −static inline int nxeb500hmi_check(struct clcd_fb *fb, struct fb_var_screeninfo *var) | |
| 50 | −{ | |
| 51 | − var->green.length = 5; | |
| 52 | − var->green.msb_right = 0; | |
| 53 | − | |
| 54 | − return clcdfb_check(fb, var); | |
| 55 | −} | |
| 56 | − | |
| 57 | −static int nxeb500hmi_clcd_setup(struct clcd_fb *fb) | |
| 58 | −{ | |
| 59 | − unsigned int val; | |
| 60 | − | |
| 61 | − fb->fb.var.green.length = 5; | |
| 62 | − fb->fb.var.green.msb_right = 0; | |
| 63 | − | |
| 64 | − /* enable asic control */ | |
| 65 | − val = readl(NETX_SYSTEM_IOC_ACCESS_KEY); | |
| 66 | − writel(val, NETX_SYSTEM_IOC_ACCESS_KEY); | |
| 67 | − | |
| 68 | − writel(3, NETX_SYSTEM_IOC_CR); | |
| 69 | − | |
| 70 | − /* GPIO 14 is used for display enable on newer boards */ | |
| 71 | − writel(9, NETX_GPIO_CFG(14)); | |
| 72 | − | |
| 73 | − val = readl(NETX_PIO_OUTPIO); | |
| 74 | − writel(val | 1, NETX_PIO_OUTPIO); | |
| 75 | − | |
| 76 | − val = readl(NETX_PIO_OEPIO); | |
| 77 | − writel(val | 1, NETX_PIO_OEPIO); | |
| 78 | − return netx_clcd_setup(fb); | |
| 79 | −} | |
| 80 | − | |
| 81 | −static struct clcd_board clcd_data = { | |
| 82 | − .name = "netX", | |
| 83 | − .check = nxeb500hmi_check, | |
| 84 | − .decode = clcdfb_decode, | |
| 85 | − .enable = netx_clcd_enable, | |
| 86 | − .setup = nxeb500hmi_clcd_setup, | |
| 87 | − .mmap = netx_clcd_mmap, | |
| 88 | − .remove = netx_clcd_remove, | |
| 89 | −}; | |
| 90 | − | |
| 91 | −static struct netxeth_platform_data eth0_platform_data = { | |
| 92 | − .xcno = 0, | |
| 93 | −}; | |
| 94 | − | |
| 95 | −static struct platform_device netx_eth0_device = { | |
| 96 | − .name = "netx-eth", | |
| 97 | − .id = 0, | |
| 98 | − .num_resources = 0, | |
| 99 | − .resource = NULL, | |
| 100 | − .dev = { | |
| 101 | − .platform_data = ð0_platform_data, | |
| 102 | − } | |
| 103 | −}; | |
| 104 | − | |
| 105 | −static struct netxeth_platform_data eth1_platform_data = { | |
| 106 | − .xcno = 1, | |
| 107 | −}; | |
| 108 | − | |
| 109 | −static struct platform_device netx_eth1_device = { | |
| 110 | − .name = "netx-eth", | |
| 111 | − .id = 1, | |
| 112 | − .num_resources = 0, | |
| 113 | − .resource = NULL, | |
| 114 | − .dev = { | |
| 115 | − .platform_data = ð1_platform_data, | |
| 116 | − } | |
| 117 | −}; | |
| 118 | − | |
| 119 | −static struct resource netx_cf_resources[] = { | |
| 120 | − [0] = { | |
| 121 | − .start = 0x20000000, | |
| 122 | − .end = 0x25ffffff, | |
| 123 | − .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, | |
| 124 | − }, | |
| 125 | −}; | |
| 126 | − | |
| 127 | −static struct platform_device netx_cf_device = { | |
| 128 | − .name = "netx-cf", | |
| 129 | − .id = 0, | |
| 130 | − .resource = netx_cf_resources, | |
| 131 | − .num_resources = ARRAY_SIZE(netx_cf_resources), | |
| 132 | −}; | |
| 133 | − | |
| 134 | −static struct resource netx_uart0_resources[] = { | |
| 135 | − [0] = { | |
| 136 | − .start = 0x00100A00, | |
| 137 | − .end = 0x00100A3F, | |
| 138 | − .flags = IORESOURCE_MEM, | |
| 139 | − }, | |
| 140 | − [1] = { | |
| 141 | − .start = (NETX_IRQ_UART0), | |
| 142 | − .end = (NETX_IRQ_UART0), | |
| 143 | − .flags = IORESOURCE_IRQ, | |
| 144 | − }, | |
| 145 | −}; | |
| 146 | − | |
| 147 | −static struct platform_device netx_uart0_device = { | |
| 148 | − .name = "netx-uart", | |
| 149 | − .id = 0, | |
| 150 | − .num_resources = ARRAY_SIZE(netx_uart0_resources), | |
| 151 | − .resource = netx_uart0_resources, | |
| 152 | −}; | |
| 153 | − | |
| 154 | −static struct platform_device *devices[] __initdata = { | |
| 155 | − &netx_eth0_device, | |
| 156 | − &netx_eth1_device, | |
| 157 | − &netx_cf_device, | |
| 158 | − &netx_uart0_device, | |
| 159 | −}; | |
| 160 | − | |
| 161 | −static void __init nxeb500hmi_init(void) | |
| 162 | −{ | |
| 163 | − netx_fb_init(&clcd_data, &qvga); | |
| 164 | − platform_add_devices(devices, ARRAY_SIZE(devices)); | |
| 165 | −} | |
| 166 | − | |
| 167 | −MACHINE_START(NXEB500HMI, "Hilscher nxeb500hmi") | |
| 168 | − .atag_offset = 0x100, | |
| 169 | − .map_io = netx_map_io, | |
| 170 | − .init_irq = netx_init_irq, | |
| 171 | − .init_time = netx_timer_init, | |
| 172 | − .init_machine = nxeb500hmi_init, | |
| 173 | − .restart = netx_restart, | |
| 174 | −MACHINE_END | |
| @@ -1,56 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/pfifo.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/init.h> | |
| 9 | −#include <linux/module.h> | |
| 10 | −#include <linux/mutex.h> | |
| 11 | −#include <linux/io.h> | |
| 12 | − | |
| 13 | −#include <mach/hardware.h> | |
| 14 | −#include <mach/netx-regs.h> | |
| 15 | −#include <mach/pfifo.h> | |
| 16 | − | |
| 17 | −static DEFINE_MUTEX(pfifo_lock); | |
| 18 | − | |
| 19 | −static unsigned int pfifo_used = 0; | |
| 20 | − | |
| 21 | −int pfifo_request(unsigned int pfifo_mask) | |
| 22 | −{ | |
| 23 | − int err = 0; | |
| 24 | − unsigned int val; | |
| 25 | − | |
| 26 | − mutex_lock(&pfifo_lock); | |
| 27 | − | |
| 28 | − if (pfifo_mask & pfifo_used) { | |
| 29 | − err = -EBUSY; | |
| 30 | − goto out; | |
| 31 | − } | |
| 32 | − | |
| 33 | − pfifo_used |= pfifo_mask; | |
| 34 | − | |
| 35 | − val = readl(NETX_PFIFO_RESET); | |
| 36 | − writel(val | pfifo_mask, NETX_PFIFO_RESET); | |
| 37 | − writel(val, NETX_PFIFO_RESET); | |
| 38 | − | |
| 39 | −out: | |
| 40 | − mutex_unlock(&pfifo_lock); | |
| 41 | − return err; | |
| 42 | −} | |
| 43 | − | |
| 44 | −void pfifo_free(unsigned int pfifo_mask) | |
| 45 | −{ | |
| 46 | − mutex_lock(&pfifo_lock); | |
| 47 | − pfifo_used &= ~pfifo_mask; | |
| 48 | − mutex_unlock(&pfifo_lock); | |
| 49 | −} | |
| 50 | − | |
| 51 | −EXPORT_SYMBOL(pfifo_push); | |
| 52 | −EXPORT_SYMBOL(pfifo_pop); | |
| 53 | −EXPORT_SYMBOL(pfifo_fill_level); | |
| 54 | −EXPORT_SYMBOL(pfifo_empty); | |
| 55 | −EXPORT_SYMBOL(pfifo_request); | |
| 56 | −EXPORT_SYMBOL(pfifo_free); | |
| @@ -1,141 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/time.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/init.h> | |
| 9 | −#include <linux/interrupt.h> | |
| 10 | −#include <linux/irq.h> | |
| 11 | −#include <linux/clocksource.h> | |
| 12 | −#include <linux/clockchips.h> | |
| 13 | −#include <linux/io.h> | |
| 14 | − | |
| 15 | −#include <mach/hardware.h> | |
| 16 | −#include <asm/mach/time.h> | |
| 17 | −#include <mach/netx-regs.h> | |
| 18 | − | |
| 19 | −#define NETX_CLOCK_FREQ 100000000 | |
| 20 | −#define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ) | |
| 21 | − | |
| 22 | −#define TIMER_CLOCKEVENT 0 | |
| 23 | −#define TIMER_CLOCKSOURCE 1 | |
| 24 | − | |
| 25 | −static inline void timer_shutdown(struct clock_event_device *evt) | |
| 26 | −{ | |
| 27 | − /* disable timer */ | |
| 28 | − writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | |
| 29 | −} | |
| 30 | − | |
| 31 | −static int netx_shutdown(struct clock_event_device *evt) | |
| 32 | −{ | |
| 33 | − timer_shutdown(evt); | |
| 34 | − | |
| 35 | − return 0; | |
| 36 | −} | |
| 37 | − | |
| 38 | −static int netx_set_oneshot(struct clock_event_device *evt) | |
| 39 | −{ | |
| 40 | − u32 tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN; | |
| 41 | − | |
| 42 | − timer_shutdown(evt); | |
| 43 | − writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); | |
| 44 | − writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | |
| 45 | − | |
| 46 | − return 0; | |
| 47 | −} | |
| 48 | − | |
| 49 | −static int netx_set_periodic(struct clock_event_device *evt) | |
| 50 | −{ | |
| 51 | − u32 tmode = NETX_GPIO_COUNTER_CTRL_RST_EN | | |
| 52 | − NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN; | |
| 53 | − | |
| 54 | − timer_shutdown(evt); | |
| 55 | − writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT)); | |
| 56 | − writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT)); | |
| 57 | − | |
| 58 | − return 0; | |
| 59 | −} | |
| 60 | − | |
| 61 | −static int netx_set_next_event(unsigned long evt, | |
| 62 | − struct clock_event_device *clk) | |
| 63 | −{ | |
| 64 | − writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT)); | |
| 65 | − return 0; | |
| 66 | −} | |
| 67 | − | |
| 68 | −static struct clock_event_device netx_clockevent = { | |
| 69 | − .name = "netx-timer" __stringify(TIMER_CLOCKEVENT), | |
| 70 | − .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | |
| 71 | − .set_next_event = netx_set_next_event, | |
| 72 | − .set_state_shutdown = netx_shutdown, | |
| 73 | − .set_state_periodic = netx_set_periodic, | |
| 74 | − .set_state_oneshot = netx_set_oneshot, | |
| 75 | − .tick_resume = netx_shutdown, | |
| 76 | −}; | |
| 77 | − | |
| 78 | −/* | |
| 79 | − * IRQ handler for the timer | |
| 80 | − */ | |
| 81 | −static irqreturn_t | |
| 82 | −netx_timer_interrupt(int irq, void *dev_id) | |
| 83 | −{ | |
| 84 | − struct clock_event_device *evt = &netx_clockevent; | |
| 85 | − | |
| 86 | − /* acknowledge interrupt */ | |
| 87 | − writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | |
| 88 | − | |
| 89 | − evt->event_handler(evt); | |
| 90 | − | |
| 91 | − return IRQ_HANDLED; | |
| 92 | −} | |
| 93 | − | |
| 94 | −static struct irqaction netx_timer_irq = { | |
| 95 | − .name = "NetX Timer Tick", | |
| 96 | − .flags = IRQF_TIMER | IRQF_IRQPOLL, | |
| 97 | − .handler = netx_timer_interrupt, | |
| 98 | −}; | |
| 99 | − | |
| 100 | −/* | |
| 101 | − * Set up timer interrupt | |
| 102 | − */ | |
| 103 | −void __init netx_timer_init(void) | |
| 104 | −{ | |
| 105 | − /* disable timer initially */ | |
| 106 | − writel(0, NETX_GPIO_COUNTER_CTRL(0)); | |
| 107 | − | |
| 108 | − /* Reset the timer value to zero */ | |
| 109 | − writel(0, NETX_GPIO_COUNTER_CURRENT(0)); | |
| 110 | − | |
| 111 | − writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0)); | |
| 112 | − | |
| 113 | − /* acknowledge interrupt */ | |
| 114 | − writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | |
| 115 | − | |
| 116 | − /* Enable the interrupt in the specific timer | |
| 117 | − * register and start timer | |
| 118 | − */ | |
| 119 | − writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE); | |
| 120 | − writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN, | |
| 121 | − NETX_GPIO_COUNTER_CTRL(0)); | |
| 122 | − | |
| 123 | − setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); | |
| 124 | − | |
| 125 | − /* Setup timer one for clocksource */ | |
| 126 | − writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); | |
| 127 | − writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE)); | |
| 128 | − writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE)); | |
| 129 | − | |
| 130 | − writel(NETX_GPIO_COUNTER_CTRL_RUN, | |
| 131 | − NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE)); | |
| 132 | − | |
| 133 | − clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE), | |
| 134 | − "netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up); | |
| 135 | − | |
| 136 | − /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine. | |
| 137 | − * Adding some safety ... */ | |
| 138 | − netx_clockevent.cpumask = cpumask_of(0); | |
| 139 | − clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ, | |
| 140 | − 0xa00, 0xfffffffe); | |
| 141 | −} | |
| @@ -1,246 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * arch/arm/mach-netx/xc.c | |
| 4 | − * | |
| 5 | − * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | |
| 6 | − */ | |
| 7 | − | |
| 8 | −#include <linux/init.h> | |
| 9 | −#include <linux/device.h> | |
| 10 | −#include <linux/firmware.h> | |
| 11 | −#include <linux/mutex.h> | |
| 12 | −#include <linux/slab.h> | |
| 13 | −#include <linux/io.h> | |
| 14 | −#include <linux/export.h> | |
| 15 | − | |
| 16 | −#include <mach/hardware.h> | |
| 17 | −#include <mach/irqs.h> | |
| 18 | −#include <mach/netx-regs.h> | |
| 19 | − | |
| 20 | −#include <mach/xc.h> | |
| 21 | − | |
| 22 | −static DEFINE_MUTEX(xc_lock); | |
| 23 | − | |
| 24 | −static int xc_in_use = 0; | |
| 25 | − | |
| 26 | −struct fw_desc { | |
| 27 | − unsigned int ofs; | |
| 28 | − unsigned int size; | |
| 29 | − unsigned int patch_ofs; | |
| 30 | − unsigned int patch_entries; | |
| 31 | −}; | |
| 32 | − | |
| 33 | −struct fw_header { | |
| 34 | − unsigned int magic; | |
| 35 | − unsigned int type; | |
| 36 | − unsigned int version; | |
| 37 | − unsigned int reserved[5]; | |
| 38 | − struct fw_desc fw_desc[3]; | |
| 39 | −} __attribute__ ((packed)); | |
| 40 | − | |
| 41 | −int xc_stop(struct xc *x) | |
| 42 | −{ | |
| 43 | − writel(RPU_HOLD_PC, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); | |
| 44 | − writel(TPU_HOLD_PC, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); | |
| 45 | − writel(XPU_HOLD_PC, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); | |
| 46 | − return 0; | |
| 47 | −} | |
| 48 | − | |
| 49 | −int xc_start(struct xc *x) | |
| 50 | −{ | |
| 51 | − writel(0, x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS); | |
| 52 | − writel(0, x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS); | |
| 53 | − writel(0, x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS); | |
| 54 | − return 0; | |
| 55 | −} | |
| 56 | − | |
| 57 | −int xc_running(struct xc *x) | |
| 58 | −{ | |
| 59 | − return (readl(x->xmac_base + NETX_XMAC_RPU_HOLD_PC_OFS) & RPU_HOLD_PC) | |
| 60 | − || (readl(x->xmac_base + NETX_XMAC_TPU_HOLD_PC_OFS) & TPU_HOLD_PC) | |
| 61 | − || (readl(x->xpec_base + NETX_XPEC_XPU_HOLD_PC_OFS) & XPU_HOLD_PC) ? | |
| 62 | − 0 : 1; | |
| 63 | −} | |
| 64 | − | |
| 65 | −int xc_reset(struct xc *x) | |
| 66 | −{ | |
| 67 | − writel(0, x->xpec_base + NETX_XPEC_PC_OFS); | |
| 68 | − return 0; | |
| 69 | −} | |
| 70 | − | |
| 71 | −static int xc_check_ptr(struct xc *x, unsigned long adr, unsigned int size) | |
| 72 | −{ | |
| 73 | − if (adr >= NETX_PA_XMAC(x->no) && | |
| 74 | − adr + size < NETX_PA_XMAC(x->no) + XMAC_MEM_SIZE) | |
| 75 | − return 0; | |
| 76 | − | |
| 77 | − if (adr >= NETX_PA_XPEC(x->no) && | |
| 78 | − adr + size < NETX_PA_XPEC(x->no) + XPEC_MEM_SIZE) | |
| 79 | − return 0; | |
| 80 | − | |
| 81 | − dev_err(x->dev, "Illegal pointer in firmware found. aborting\n"); | |
| 82 | − | |
| 83 | − return -1; | |
| 84 | −} | |
| 85 | − | |
| 86 | −static int xc_patch(struct xc *x, const void *patch, int count) | |
| 87 | −{ | |
| 88 | − unsigned int val, adr; | |
| 89 | − const unsigned int *data = patch; | |
| 90 | − | |
| 91 | − int i; | |
| 92 | − for (i = 0; i < count; i++) { | |
| 93 | − adr = *data++; | |
| 94 | − val = *data++; | |
| 95 | − if (xc_check_ptr(x, adr, 4) < 0) | |
| 96 | − return -EINVAL; | |
| 97 | − | |
| 98 | − writel(val, (void __iomem *)io_p2v(adr)); | |
| 99 | − } | |
| 100 | − return 0; | |
| 101 | −} | |
| 102 | − | |
| 103 | −int xc_request_firmware(struct xc *x) | |
| 104 | −{ | |
| 105 | − int ret; | |
| 106 | − char name[16]; | |
| 107 | − const struct firmware *fw; | |
| 108 | − struct fw_header *head; | |
| 109 | − unsigned int size; | |
| 110 | − int i; | |
| 111 | − const void *src; | |
| 112 | − unsigned long dst; | |
| 113 | − | |
| 114 | − sprintf(name, "xc%d.bin", x->no); | |
| 115 | − | |
| 116 | − ret = request_firmware(&fw, name, x->dev); | |
| 117 | − | |
| 118 | − if (ret < 0) { | |
| 119 | − dev_err(x->dev, "request_firmware failed\n"); | |
| 120 | − return ret; | |
| 121 | − } | |
| 122 | − | |
| 123 | − head = (struct fw_header *)fw->data; | |
| 124 | − if (head->magic != 0x4e657458) { | |
| 125 | − if (head->magic == 0x5874654e) { | |
| 126 | − dev_err(x->dev, | |
| 127 | − "firmware magic is 'XteN'. Endianness problems?\n"); | |
| 128 | − ret = -ENODEV; | |
| 129 | − goto exit_release_firmware; | |
| 130 | − } | |
| 131 | − dev_err(x->dev, "unrecognized firmware magic 0x%08x\n", | |
| 132 | − head->magic); | |
| 133 | − ret = -ENODEV; | |
| 134 | − goto exit_release_firmware; | |
| 135 | − } | |
| 136 | − | |
| 137 | − x->type = head->type; | |
| 138 | − x->version = head->version; | |
| 139 | − | |
| 140 | − ret = -EINVAL; | |
| 141 | − | |
| 142 | − for (i = 0; i < 3; i++) { | |
| 143 | − src = fw->data + head->fw_desc[i].ofs; | |
| 144 | − dst = *(unsigned int *)src; | |
| 145 | − src += sizeof (unsigned int); | |
| 146 | − size = head->fw_desc[i].size - sizeof (unsigned int); | |
| 147 | − | |
| 148 | − if (xc_check_ptr(x, dst, size)) | |
| 149 | − goto exit_release_firmware; | |
| 150 | − | |
| 151 | − memcpy((void *)io_p2v(dst), src, size); | |
| 152 | − | |
| 153 | − src = fw->data + head->fw_desc[i].patch_ofs; | |
| 154 | − size = head->fw_desc[i].patch_entries; | |
| 155 | − ret = xc_patch(x, src, size); | |
| 156 | − if (ret < 0) | |
| 157 | − goto exit_release_firmware; | |
| 158 | − } | |
| 159 | − | |
| 160 | − ret = 0; | |
| 161 | − | |
| 162 | − exit_release_firmware: | |
| 163 | − release_firmware(fw); | |
| 164 | − | |
| 165 | − return ret; | |
| 166 | −} | |
| 167 | − | |
| 168 | −struct xc *request_xc(int xcno, struct device *dev) | |
| 169 | −{ | |
| 170 | − struct xc *x = NULL; | |
| 171 | − | |
| 172 | − mutex_lock(&xc_lock); | |
| 173 | − | |
| 174 | − if (xcno > 3) | |
| 175 | − goto exit; | |
| 176 | − if (xc_in_use & (1 << xcno)) | |
| 177 | − goto exit; | |
| 178 | − | |
| 179 | − x = kmalloc(sizeof (struct xc), GFP_KERNEL); | |
| 180 | − if (!x) | |
| 181 | − goto exit; | |
| 182 | − | |
| 183 | − if (!request_mem_region | |
| 184 | − (NETX_PA_XPEC(xcno), XPEC_MEM_SIZE, kobject_name(&dev->kobj))) | |
| 185 | − goto exit_free; | |
| 186 | − | |
| 187 | − if (!request_mem_region | |
| 188 | − (NETX_PA_XMAC(xcno), XMAC_MEM_SIZE, kobject_name(&dev->kobj))) | |
| 189 | − goto exit_release_1; | |
| 190 | − | |
| 191 | − if (!request_mem_region | |
| 192 | − (SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE, kobject_name(&dev->kobj))) | |
| 193 | − goto exit_release_2; | |
| 194 | − | |
| 195 | − x->xpec_base = (void * __iomem)io_p2v(NETX_PA_XPEC(xcno)); | |
| 196 | − x->xmac_base = (void * __iomem)io_p2v(NETX_PA_XMAC(xcno)); | |
| 197 | − x->sram_base = ioremap(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); | |
| 198 | − if (!x->sram_base) | |
| 199 | − goto exit_release_3; | |
| 200 | − | |
| 201 | − x->irq = NETX_IRQ_XPEC(xcno); | |
| 202 | − | |
| 203 | − x->no = xcno; | |
| 204 | − x->dev = dev; | |
| 205 | − | |
| 206 | − xc_in_use |= (1 << xcno); | |
| 207 | − | |
| 208 | − goto exit; | |
| 209 | − | |
| 210 | − exit_release_3: | |
| 211 | − release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); | |
| 212 | − exit_release_2: | |
| 213 | − release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); | |
| 214 | − exit_release_1: | |
| 215 | − release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); | |
| 216 | − exit_free: | |
| 217 | − kfree(x); | |
| 218 | − x = NULL; | |
| 219 | − exit: | |
| 220 | − mutex_unlock(&xc_lock); | |
| 221 | − return x; | |
| 222 | −} | |
| 223 | − | |
| 224 | −void free_xc(struct xc *x) | |
| 225 | −{ | |
| 226 | − int xcno = x->no; | |
| 227 | − | |
| 228 | − mutex_lock(&xc_lock); | |
| 229 | − | |
| 230 | − iounmap(x->sram_base); | |
| 231 | − release_mem_region(SRAM_INTERNAL_PHYS(xcno), SRAM_MEM_SIZE); | |
| 232 | − release_mem_region(NETX_PA_XMAC(xcno), XMAC_MEM_SIZE); | |
| 233 | − release_mem_region(NETX_PA_XPEC(xcno), XPEC_MEM_SIZE); | |
| 234 | − xc_in_use &= ~(1 << x->no); | |
| 235 | − kfree(x); | |
| 236 | − | |
| 237 | − mutex_unlock(&xc_lock); | |
| 238 | −} | |
| 239 | − | |
| 240 | −EXPORT_SYMBOL(free_xc); | |
| 241 | −EXPORT_SYMBOL(request_xc); | |
| 242 | −EXPORT_SYMBOL(xc_request_firmware); | |
| 243 | −EXPORT_SYMBOL(xc_reset); | |
| 244 | −EXPORT_SYMBOL(xc_running); | |
| 245 | −EXPORT_SYMBOL(xc_start); | |
| 246 | −EXPORT_SYMBOL(xc_stop); | |
| @@ -126,6 +126,8 @@ restart: · 125 unmodified lines | ||
| 126 | 126 | orr r11, r11, r13 @ mask all requested interrupts |
| 127 | 127 | str r11, [r12, #OMAP1510_GPIO_INT_MASK] |
| 128 | 128 | |
| 129 | + str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts | |
| 130 | + | |
| 129 | 131 | ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set? |
| 130 | 132 | beq hksw @ no - try next source |
| 131 | 133 | |
| @@ -133,7 +135,6 @@ restart: · 1 unmodified line | ||
| 133 | 135 | @@@@@@@@@@@@@@@@@@@@@@ |
| 134 | 136 | @ Keyboard clock FIQ mode interrupt handler |
| 135 | 137 | @ r10 now contains KEYBRD_CLK_MASK, use it |
| 136 | − str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt | |
| 137 | 138 | bic r11, r11, r10 @ unmask it |
| 138 | 139 | str r11, [r12, #OMAP1510_GPIO_INT_MASK] |
| 139 | 140 | |
| @@ -70,9 +70,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id) · 69 unmodified lines | ||
| 70 | 70 | * interrupts default to since commit 80ac93c27441 |
| 71 | 71 | * requires interrupt already acked and unmasked. |
| 72 | 72 | */ |
| 73 | − if (irq_chip->irq_ack) | |
| 74 | − irq_chip->irq_ack(d); | |
| 75 | − if (irq_chip->irq_unmask) | |
| 73 | + if (!WARN_ON_ONCE(!irq_chip->irq_unmask)) | |
| 76 | 74 | irq_chip->irq_unmask(d); |
| 77 | 75 | } |
| 78 | 76 | for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++) |
| @@ -127,6 +127,9 @@ static int __init omap4_sram_init(void) · 126 unmodified lines | ||
| 127 | 127 | struct device_node *np; |
| 128 | 128 | struct gen_pool *sram_pool; |
| 129 | 129 | |
| 130 | + if (!soc_is_omap44xx() && !soc_is_omap54xx()) | |
| 131 | + return 0; | |
| 132 | + | |
| 130 | 133 | np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); |
| 131 | 134 | if (!np) |
| 132 | 135 | pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", |
| @@ -379,7 +379,8 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = { · 378 unmodified lines | ||
| 379 | 379 | static struct omap_hwmod_class_sysconfig dra7xx_epwmss_sysc = { |
| 380 | 380 | .rev_offs = 0x0, |
| 381 | 381 | .sysc_offs = 0x4, |
| 382 | − .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET, | |
| 382 | + .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | |
| 383 | + SYSC_HAS_RESET_STATUS, | |
| 383 | 384 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), |
| 384 | 385 | .sysc_fields = &omap_hwmod_sysc_type2, |
| 385 | 386 | }; |
| @@ -46,6 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag) · 45 unmodified lines | ||
| 46 | 46 | switch (tag->u.acorn.vram_pages) { |
| 47 | 47 | case 512: |
| 48 | 48 | vram_size += PAGE_SIZE * 256; |
| 49 | + /* Fall through - ??? */ | |
| 49 | 50 | case 256: |
| 50 | 51 | vram_size += PAGE_SIZE * 256; |
| 51 | 52 | default: |
| @@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void) · 69 unmodified lines | ||
| 70 | 70 | switch (err) { |
| 71 | 71 | case -ENOSYS: |
| 72 | 72 | tegra_cpu_reset_handler_set(reset_address); |
| 73 | − /* pass-through */ | |
| 73 | + /* fall through */ | |
| 74 | 74 | case 0: |
| 75 | 75 | is_enabled = true; |
| 76 | 76 | break; |
| @@ -663,6 +663,7 @@ config ARM_LPAE · 662 unmodified lines | ||
| 663 | 663 | depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \ |
| 664 | 664 | !CPU_32v4 && !CPU_32v3 |
| 665 | 665 | select PHYS_ADDR_T_64BIT |
| 666 | + select SWIOTLB | |
| 666 | 667 | help |
| 667 | 668 | Say Y if you have an ARMv7 processor supporting the LPAE page |
| 668 | 669 | table format and you would like to access memory beyond the |
| @@ -695,7 +695,7 @@ thumb2arm(u16 tinstr) · 694 unmodified lines | ||
| 695 | 695 | return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] | |
| 696 | 696 | (tinstr & 255); /* register_list */ |
| 697 | 697 | } |
| 698 | − /* Else fall through for illegal instruction case */ | |
| 698 | + /* Else, fall through - for illegal instruction case */ | |
| 699 | 699 | |
| 700 | 700 | default: |
| 701 | 701 | return BAD_INSTR; |
| @@ -751,6 +751,8 @@ do_alignment_t32_to_handler(unsigned long *pinstr, struct pt_regs *regs, · 49 unmodified lines | ||
| 751 | 751 | case 0xe8e0: |
| 752 | 752 | case 0xe9e0: |
| 753 | 753 | poffset->un = (tinst2 & 0xff) << 2; |
| 754 | + /* Fall through */ | |
| 755 | + | |
| 754 | 756 | case 0xe940: |
| 755 | 757 | case 0xe9c0: |
| 756 | 758 | return do_alignment_ldrdstrd; |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | ||
| 15 | 15 | #include <linux/init.h> |
| 16 | 16 | #include <linux/device.h> |
| 17 | 17 | #include <linux/dma-mapping.h> |
| 18 | +#include <linux/dma-noncoherent.h> | |
| 18 | 19 | #include <linux/dma-contiguous.h> |
| 19 | 20 | #include <linux/highmem.h> |
| 20 | 21 | #include <linux/memblock.h> |
| @@ -1125,6 +1126,19 @@ int arm_dma_supported(struct device *dev, u64 mask) · 1104 unmodified lines | ||
| 1125 | 1126 | |
| 1126 | 1127 | static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent) |
| 1127 | 1128 | { |
| 1129 | + /* | |
| 1130 | + * When CONFIG_ARM_LPAE is set, physical address can extend above | |
| 1131 | + * 32-bits, which then can't be addressed by devices that only support | |
| 1132 | + * 32-bit DMA. | |
| 1133 | + * Use the generic dma-direct / swiotlb ops code in that case, as that | |
| 1134 | + * handles bounce buffering for us. | |
| 1135 | + * | |
| 1136 | + * Note: this checks CONFIG_ARM_LPAE instead of CONFIG_SWIOTLB as the | |
| 1137 | + * latter is also selected by the Xen code, but that code for now relies | |
| 1138 | + * on non-NULL dev_dma_ops. To be cleaned up later. | |
| 1139 | + */ | |
| 1140 | + if (IS_ENABLED(CONFIG_ARM_LPAE)) | |
| 1141 | + return NULL; | |
| 1128 | 1142 | return coherent ? &arm_coherent_dma_ops : &arm_dma_ops; |
| 1129 | 1143 | } |
| 1130 | 1144 | |
| @@ -2329,6 +2343,9 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, · 1198 unmodified lines | ||
| 2329 | 2343 | const struct dma_map_ops *dma_ops; |
| 2330 | 2344 | |
| 2331 | 2345 | dev->archdata.dma_coherent = coherent; |
| 2346 | +#ifdef CONFIG_SWIOTLB | |
| 2347 | + dev->dma_coherent = coherent; | |
| 2348 | +#endif | |
| 2332 | 2349 | |
| 2333 | 2350 | /* |
| 2334 | 2351 | * Don't override the dma_ops if they have already been set. Ideally |
| @@ -2363,3 +2380,45 @@ void arch_teardown_dma_ops(struct device *dev) · 28 unmodified lines | ||
| 2363 | 2380 | /* Let arch_setup_dma_ops() start again from scratch upon re-probe */ |
| 2364 | 2381 | set_dma_ops(dev, NULL); |
| 2365 | 2382 | } |
| 2383 | + | |
| 2384 | +#ifdef CONFIG_SWIOTLB | |
| 2385 | +void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr, | |
| 2386 | + size_t size, enum dma_data_direction dir) | |
| 2387 | +{ | |
| 2388 | + __dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1), | |
| 2389 | + size, dir); | |
| 2390 | +} | |
| 2391 | + | |
| 2392 | +void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, | |
| 2393 | + size_t size, enum dma_data_direction dir) | |
| 2394 | +{ | |
| 2395 | + __dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1), | |
| 2396 | + size, dir); | |
| 2397 | +} | |
| 2398 | + | |
| 2399 | +long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr, | |
| 2400 | + dma_addr_t dma_addr) | |
| 2401 | +{ | |
| 2402 | + return dma_to_pfn(dev, dma_addr); | |
| 2403 | +} | |
| 2404 | + | |
| 2405 | +pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot, | |
| 2406 | + unsigned long attrs) | |
| 2407 | +{ | |
| 2408 | + return __get_dma_pgprot(attrs, prot); | |
| 2409 | +} | |
| 2410 | + | |
| 2411 | +void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, | |
| 2412 | + gfp_t gfp, unsigned long attrs) | |
| 2413 | +{ | |
| 2414 | + return __dma_alloc(dev, size, dma_handle, gfp, | |
| 2415 | + __get_dma_pgprot(attrs, PAGE_KERNEL), false, | |
| 2416 | + attrs, __builtin_return_address(0)); | |
| 2417 | +} | |
| 2418 | + | |
| 2419 | +void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, | |
| 2420 | + dma_addr_t dma_handle, unsigned long attrs) | |
| 2421 | +{ | |
| 2422 | + __arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false); | |
| 2423 | +} | |
| 2424 | +#endif /* CONFIG_SWIOTLB */ | |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/dma-contiguous.h> |
| 22 | 22 | #include <linux/sizes.h> |
| 23 | 23 | #include <linux/stop_machine.h> |
| 24 | +#include <linux/swiotlb.h> | |
| 24 | 25 | |
| 25 | 26 | #include <asm/cp15.h> |
| 26 | 27 | #include <asm/mach-types.h> |
| @@ -174,6 +175,11 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max_low, · 147 unmodified lines | ||
| 174 | 175 | #ifdef CONFIG_HAVE_ARCH_PFN_VALID |
| 175 | 176 | int pfn_valid(unsigned long pfn) |
| 176 | 177 | { |
| 178 | + phys_addr_t addr = __pfn_to_phys(pfn); | |
| 179 | + | |
| 180 | + if (__phys_to_pfn(addr) != pfn) | |
| 181 | + return 0; | |
| 182 | + | |
| 177 | 183 | return memblock_is_map_memory(__pfn_to_phys(pfn)); |
| 178 | 184 | } |
| 179 | 185 | EXPORT_SYMBOL(pfn_valid); |
| @@ -463,6 +469,10 @@ static void __init free_highpages(void) · 283 unmodified lines | ||
| 463 | 469 | */ |
| 464 | 470 | void __init mem_init(void) |
| 465 | 471 | { |
| 472 | +#ifdef CONFIG_ARM_LPAE | |
| 473 | + swiotlb_init(1); | |
| 474 | +#endif | |
| 475 | + | |
| 466 | 476 | set_max_mapnr(pfn_to_page(max_pfn) - mem_map); |
| 467 | 477 | |
| 468 | 478 | /* this will put all unused low memory onto the freelists */ |
| @@ -623,7 +633,8 @@ static void update_sections_early(struct section_perm perms[], int n) · 154 unmodified lines | ||
| 623 | 633 | if (t->flags & PF_KTHREAD) |
| 624 | 634 | continue; |
| 625 | 635 | for_each_thread(t, s) |
| 626 | − set_section_perms(perms, n, true, s->mm); | |
| 636 | + if (s->mm) | |
| 637 | + set_section_perms(perms, n, true, s->mm); | |
| 627 | 638 | } |
| 628 | 639 | set_section_perms(perms, n, true, current->active_mm); |
| 629 | 640 | set_section_perms(perms, n, true, &init_mm); |
| @@ -388,17 +388,15 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 387 unmodified lines | ||
| 388 | 388 | /* |
| 389 | 389 | * not supported by current hardware on OMAP1 |
| 390 | 390 | * w |= (0x03 << 7); |
| 391 | − * fall through | |
| 392 | 391 | */ |
| 392 | + /* fall through */ | |
| 393 | 393 | case OMAP_DMA_DATA_BURST_16: |
| 394 | 394 | if (dma_omap2plus()) { |
| 395 | 395 | burst = 0x3; |
| 396 | 396 | break; |
| 397 | 397 | } |
| 398 | − /* | |
| 399 | − * OMAP1 don't support burst 16 | |
| 400 | − * fall through | |
| 401 | − */ | |
| 398 | + /* OMAP1 don't support burst 16 */ | |
| 399 | + /* fall through */ | |
| 402 | 400 | default: |
| 403 | 401 | BUG(); |
| 404 | 402 | } |
| @@ -474,10 +472,8 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 69 unmodified lines | ||
| 474 | 472 | burst = 0x3; |
| 475 | 473 | break; |
| 476 | 474 | } |
| 477 | − /* | |
| 478 | − * OMAP1 don't support burst 16 | |
| 479 | − * fall through | |
| 480 | − */ | |
| 475 | + /* OMAP1 don't support burst 16 */ | |
| 476 | + /* fall through */ | |
| 481 | 477 | default: |
| 482 | 478 | printk(KERN_ERR "Invalid DMA burst mode\n"); |
| 483 | 479 | BUG(); |
| @@ -52,7 +52,7 @@ ifeq ($(CONFIG_GENERIC_COMPAT_VDSO), y) · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | ifeq ($(CONFIG_CC_IS_CLANG), y) |
| 54 | 54 | $(warning CROSS_COMPILE_COMPAT is clang, the compat vDSO will not be built) |
| 55 | − else ifeq ($(CROSS_COMPILE_COMPAT),) | |
| 55 | + else ifeq ($(strip $(CROSS_COMPILE_COMPAT)),) | |
| 56 | 56 | $(warning CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built) |
| 57 | 57 | else ifeq ($(shell which $(CROSS_COMPILE_COMPAT)gcc 2> /dev/null),) |
| 58 | 58 | $(error $(CROSS_COMPILE_COMPAT)gcc not found, check CROSS_COMPILE_COMPAT) |
| @@ -339,6 +339,12 @@ · 338 unmodified lines | ||
| 339 | 339 | pinctrl-names = "default"; |
| 340 | 340 | }; |
| 341 | 341 | |
| 342 | +&ir { | |
| 343 | + status = "okay"; | |
| 344 | + pinctrl-0 = <&remote_input_ao_pins>; | |
| 345 | + pinctrl-names = "default"; | |
| 346 | +}; | |
| 347 | + | |
| 342 | 348 | &pwm_ef { |
| 343 | 349 | status = "okay"; |
| 344 | 350 | pinctrl-0 = <&pwm_e_pins>; |
| @@ -2386,6 +2386,7 @@ · 2385 unmodified lines | ||
| 2386 | 2386 | clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; |
| 2387 | 2387 | clock-names = "ddr"; |
| 2388 | 2388 | phys = <&usb2_phy1>; |
| 2389 | + phy-names = "usb2-phy"; | |
| 2389 | 2390 | dr_mode = "peripheral"; |
| 2390 | 2391 | g-rx-fifo-size = <192>; |
| 2391 | 2392 | g-np-tx-fifo-size = <128>; |
| @@ -53,6 +53,7 @@ · 52 unmodified lines | ||
| 53 | 53 | |
| 54 | 54 | gpio = <&gpio_ao GPIOAO_8 GPIO_ACTIVE_HIGH>; |
| 55 | 55 | enable-active-high; |
| 56 | + regulator-always-on; | |
| 56 | 57 | }; |
| 57 | 58 | |
| 58 | 59 | tf_io: gpio-regulator-tf_io { |
| @@ -462,7 +462,7 @@ · 461 unmodified lines | ||
| 462 | 462 | #define MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x1CC 0x434 0x000 0x5 0x0 |
| 463 | 463 | #define MX8MM_IOMUXC_SAI3_RXFS_TPSMP_HTRANS0 0x1CC 0x434 0x000 0x7 0x0 |
| 464 | 464 | #define MX8MM_IOMUXC_SAI3_RXC_SAI3_RX_BCLK 0x1D0 0x438 0x000 0x0 0x0 |
| 465 | −#define MX8MM_IOMUXC_SAI3_RXC_GPT1_CAPTURE2 0x1D0 0x438 0x000 0x1 0x0 | |
| 465 | +#define MX8MM_IOMUXC_SAI3_RXC_GPT1_CLK 0x1D0 0x438 0x000 0x1 0x0 | |
| 466 | 466 | #define MX8MM_IOMUXC_SAI3_RXC_SAI5_RX_BCLK 0x1D0 0x438 0x4D0 0x2 0x2 |
| 467 | 467 | #define MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x1D0 0x438 0x000 0x5 0x0 |
| 468 | 468 | #define MX8MM_IOMUXC_SAI3_RXC_TPSMP_HTRANS1 0x1D0 0x438 0x000 0x7 0x0 |
| @@ -472,7 +472,7 @@ · 3 unmodified lines | ||
| 472 | 472 | #define MX8MM_IOMUXC_SAI3_RXD_GPIO4_IO30 0x1D4 0x43C 0x000 0x5 0x0 |
| 473 | 473 | #define MX8MM_IOMUXC_SAI3_RXD_TPSMP_HDATA0 0x1D4 0x43C 0x000 0x7 0x0 |
| 474 | 474 | #define MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0x1D8 0x440 0x000 0x0 0x0 |
| 475 | −#define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CLK 0x1D8 0x440 0x000 0x1 0x0 | |
| 475 | +#define MX8MM_IOMUXC_SAI3_TXFS_GPT1_CAPTURE2 0x1D8 0x440 0x000 0x1 0x0 | |
| 476 | 476 | #define MX8MM_IOMUXC_SAI3_TXFS_SAI5_RX_DATA1 0x1D8 0x440 0x4D8 0x2 0x2 |
| 477 | 477 | #define MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31 0x1D8 0x440 0x000 0x5 0x0 |
| 478 | 478 | #define MX8MM_IOMUXC_SAI3_TXFS_TPSMP_HDATA1 0x1D8 0x440 0x000 0x7 0x0 |
| @@ -715,8 +715,7 @@ · 714 unmodified lines | ||
| 715 | 715 | |
| 716 | 716 | sai2: sai@308b0000 { |
| 717 | 717 | #sound-dai-cells = <0>; |
| 718 | − compatible = "fsl,imx8mq-sai", | |
| 719 | − "fsl,imx6sx-sai"; | |
| 718 | + compatible = "fsl,imx8mq-sai"; | |
| 720 | 719 | reg = <0x308b0000 0x10000>; |
| 721 | 720 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; |
| 722 | 721 | clocks = <&clk IMX8MQ_CLK_SAI2_IPG>, |
| @@ -155,6 +155,12 @@ static inline void gic_pmr_mask_irqs(void) · 154 unmodified lines | ||
| 155 | 155 | BUILD_BUG_ON(GICD_INT_DEF_PRI < (GIC_PRIO_IRQOFF | |
| 156 | 156 | GIC_PRIO_PSR_I_SET)); |
| 157 | 157 | BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON); |
| 158 | + /* | |
| 159 | + * Need to make sure IRQON allows IRQs when SCR_EL3.FIQ is cleared | |
| 160 | + * and non-secure PMR accesses are not subject to the shifts that | |
| 161 | + * are applied to IRQ priorities | |
| 162 | + */ | |
| 163 | + BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON); | |
| 158 | 164 | gic_write_pmr(GIC_PRIO_IRQOFF); |
| 159 | 165 | } |
| 160 | 166 | |
| @@ -35,9 +35,10 @@ · 34 unmodified lines | ||
| 35 | 35 | */ |
| 36 | 36 | |
| 37 | 37 | enum ftr_type { |
| 38 | − FTR_EXACT, /* Use a predefined safe value */ | |
| 39 | − FTR_LOWER_SAFE, /* Smaller value is safe */ | |
| 40 | − FTR_HIGHER_SAFE,/* Bigger value is safe */ | |
| 38 | + FTR_EXACT, /* Use a predefined safe value */ | |
| 39 | + FTR_LOWER_SAFE, /* Smaller value is safe */ | |
| 40 | + FTR_HIGHER_SAFE, /* Bigger value is safe */ | |
| 41 | + FTR_HIGHER_OR_ZERO_SAFE, /* Bigger value is safe, but 0 is biggest */ | |
| 41 | 42 | }; |
| 42 | 43 | |
| 43 | 44 | #define FTR_STRICT true /* SANITY check strict matching required */ |
| @@ -13,6 +13,8 @@ · 12 unmodified lines | ||
| 13 | 13 | #define DAIF_PROCCTX 0 |
| 14 | 14 | #define DAIF_PROCCTX_NOIRQ PSR_I_BIT |
| 15 | 15 | #define DAIF_ERRCTX (PSR_I_BIT | PSR_A_BIT) |
| 16 | +#define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) | |
| 17 | + | |
| 16 | 18 | |
| 17 | 19 | /* mask/save/unmask/restore all exceptions, including interrupts. */ |
| 18 | 20 | static inline void local_daif_mask(void) |
| @@ -105,7 +105,11 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long dram_base, · 104 unmodified lines | ||
| 105 | 105 | ((protocol##_t *)instance)->f(instance, ##__VA_ARGS__) |
| 106 | 106 | |
| 107 | 107 | #define alloc_screen_info(x...) &screen_info |
| 108 | −#define free_screen_info(x...) | |
| 108 | + | |
| 109 | +static inline void free_screen_info(efi_system_table_t *sys_table_arg, | |
| 110 | + struct screen_info *si) | |
| 111 | +{ | |
| 112 | +} | |
| 109 | 113 | |
| 110 | 114 | /* redeclare as 'hidden' so the compiler will generate relative references */ |
| 111 | 115 | extern struct screen_info screen_info __attribute__((__visibility__("hidden"))); |
| @@ -202,7 +202,7 @@ typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; · 201 unmodified lines | ||
| 202 | 202 | ({ \ |
| 203 | 203 | set_thread_flag(TIF_32BIT); \ |
| 204 | 204 | }) |
| 205 | −#ifdef CONFIG_GENERIC_COMPAT_VDSO | |
| 205 | +#ifdef CONFIG_COMPAT_VDSO | |
| 206 | 206 | #define COMPAT_ARCH_DLINFO \ |
| 207 | 207 | do { \ |
| 208 | 208 | /* \ |
| @@ -316,9 +316,10 @@ · 315 unmodified lines | ||
| 316 | 316 | |
| 317 | 317 | #define kvm_arm_exception_class \ |
| 318 | 318 | ECN(UNKNOWN), ECN(WFx), ECN(CP15_32), ECN(CP15_64), ECN(CP14_MR), \ |
| 319 | − ECN(CP14_LS), ECN(FP_ASIMD), ECN(CP10_ID), ECN(CP14_64), ECN(SVC64), \ | |
| 320 | − ECN(HVC64), ECN(SMC64), ECN(SYS64), ECN(IMP_DEF), ECN(IABT_LOW), \ | |
| 321 | − ECN(IABT_CUR), ECN(PC_ALIGN), ECN(DABT_LOW), ECN(DABT_CUR), \ | |
| 319 | + ECN(CP14_LS), ECN(FP_ASIMD), ECN(CP10_ID), ECN(PAC), ECN(CP14_64), \ | |
| 320 | + ECN(SVC64), ECN(HVC64), ECN(SMC64), ECN(SYS64), ECN(SVE), \ | |
| 321 | + ECN(IMP_DEF), ECN(IABT_LOW), ECN(IABT_CUR), \ | |
| 322 | + ECN(PC_ALIGN), ECN(DABT_LOW), ECN(DABT_CUR), \ | |
| 322 | 323 | ECN(SP_ALIGN), ECN(FP_EXC32), ECN(FP_EXC64), ECN(SERROR), \ |
| 323 | 324 | ECN(BREAKPT_LOW), ECN(BREAKPT_CUR), ECN(SOFTSTP_LOW), \ |
| 324 | 325 | ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \ |
| @@ -210,7 +210,11 @@ extern u64 vabits_user; · 209 unmodified lines | ||
| 210 | 210 | #define __tag_reset(addr) untagged_addr(addr) |
| 211 | 211 | #define __tag_get(addr) (__u8)((u64)(addr) >> 56) |
| 212 | 212 | #else |
| 213 | −#define __tag_set(addr, tag) (addr) | |
| 213 | +static inline const void *__tag_set(const void *addr, u8 tag) | |
| 214 | +{ | |
| 215 | + return addr; | |
| 216 | +} | |
| 217 | + | |
| 214 | 218 | #define __tag_reset(addr) (addr) |
| 215 | 219 | #define __tag_get(addr) 0 |
| 216 | 220 | #endif |
| @@ -301,8 +305,8 @@ static inline void *phys_to_virt(phys_addr_t x) · 84 unmodified lines | ||
| 301 | 305 | #define page_to_virt(page) ({ \ |
| 302 | 306 | unsigned long __addr = \ |
| 303 | 307 | ((__page_to_voff(page)) | PAGE_OFFSET); \ |
| 304 | − unsigned long __addr_tag = \ | |
| 305 | − __tag_set(__addr, page_kasan_tag(page)); \ | |
| 308 | + const void *__addr_tag = \ | |
| 309 | + __tag_set((void *)__addr, page_kasan_tag(page)); \ | |
| 306 | 310 | ((void *)__addr_tag); \ |
| 307 | 311 | }) |
| 308 | 312 | |
| @@ -209,7 +209,7 @@ static inline pmd_t pmd_mkcont(pmd_t pmd) · 208 unmodified lines | ||
| 209 | 209 | |
| 210 | 210 | static inline pte_t pte_mkdevmap(pte_t pte) |
| 211 | 211 | { |
| 212 | − return set_pte_bit(pte, __pgprot(PTE_DEVMAP)); | |
| 212 | + return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL)); | |
| 213 | 213 | } |
| 214 | 214 | |
| 215 | 215 | static inline void set_pte(pte_t *ptep, pte_t pte) |
| @@ -301,7 +301,6 @@ static inline int pte_same(pte_t pte_a, pte_t pte_b) · 85 unmodified lines | ||
| 301 | 301 | /* |
| 302 | 302 | * Huge pte definitions. |
| 303 | 303 | */ |
| 304 | −#define pte_huge(pte) (!(pte_val(pte) & PTE_TABLE_BIT)) | |
| 305 | 304 | #define pte_mkhuge(pte) (__pte(pte_val(pte) & ~PTE_TABLE_BIT)) |
| 306 | 305 | |
| 307 | 306 | /* |
| @@ -397,7 +396,10 @@ static inline int pmd_protnone(pmd_t pmd) · 89 unmodified lines | ||
| 397 | 396 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE |
| 398 | 397 | #define pmd_devmap(pmd) pte_devmap(pmd_pte(pmd)) |
| 399 | 398 | #endif |
| 400 | −#define pmd_mkdevmap(pmd) pte_pmd(pte_mkdevmap(pmd_pte(pmd))) | |
| 399 | +static inline pmd_t pmd_mkdevmap(pmd_t pmd) | |
| 400 | +{ | |
| 401 | + return pte_pmd(set_pte_bit(pmd_pte(pmd), __pgprot(PTE_DEVMAP))); | |
| 402 | +} | |
| 401 | 403 | |
| 402 | 404 | #define __pmd_to_phys(pmd) __pte_to_phys(pmd_pte(pmd)) |
| 403 | 405 | #define __phys_to_pmd_val(phys) __phys_to_pte_val(phys) |
| @@ -448,8 +450,8 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, · 44 unmodified lines | ||
| 448 | 450 | PMD_TYPE_SECT) |
| 449 | 451 | |
| 450 | 452 | #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3 |
| 451 | −#define pud_sect(pud) (0) | |
| 452 | −#define pud_table(pud) (1) | |
| 453 | +static inline bool pud_sect(pud_t pud) { return false; } | |
| 454 | +static inline bool pud_table(pud_t pud) { return true; } | |
| 453 | 455 | #else |
| 454 | 456 | #define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ |
| 455 | 457 | PUD_TYPE_SECT) |
| @@ -193,6 +193,16 @@ static inline void start_thread_common(struct pt_regs *regs, unsigned long pc) · 192 unmodified lines | ||
| 193 | 193 | regs->pmr_save = GIC_PRIO_IRQON; |
| 194 | 194 | } |
| 195 | 195 | |
| 196 | +static inline void set_ssbs_bit(struct pt_regs *regs) | |
| 197 | +{ | |
| 198 | + regs->pstate |= PSR_SSBS_BIT; | |
| 199 | +} | |
| 200 | + | |
| 201 | +static inline void set_compat_ssbs_bit(struct pt_regs *regs) | |
| 202 | +{ | |
| 203 | + regs->pstate |= PSR_AA32_SSBS_BIT; | |
| 204 | +} | |
| 205 | + | |
| 196 | 206 | static inline void start_thread(struct pt_regs *regs, unsigned long pc, |
| 197 | 207 | unsigned long sp) |
| 198 | 208 | { |
| @@ -200,7 +210,7 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc, · 1 unmodified line | ||
| 200 | 210 | regs->pstate = PSR_MODE_EL0t; |
| 201 | 211 | |
| 202 | 212 | if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE) |
| 203 | − regs->pstate |= PSR_SSBS_BIT; | |
| 213 | + set_ssbs_bit(regs); | |
| 204 | 214 | |
| 205 | 215 | regs->sp = sp; |
| 206 | 216 | } |
| @@ -219,7 +229,7 @@ static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, · 12 unmodified lines | ||
| 219 | 229 | #endif |
| 220 | 230 | |
| 221 | 231 | if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE) |
| 222 | − regs->pstate |= PSR_AA32_SSBS_BIT; | |
| 232 | + set_compat_ssbs_bit(regs); | |
| 223 | 233 | |
| 224 | 234 | regs->compat_sp = sp; |
| 225 | 235 | } |
| @@ -30,7 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | * in the the priority mask, it indicates that PSR.I should be set and |
| 31 | 31 | * interrupt disabling temporarily does not rely on IRQ priorities. |
| 32 | 32 | */ |
| 33 | −#define GIC_PRIO_IRQON 0xc0 | |
| 33 | +#define GIC_PRIO_IRQON 0xe0 | |
| 34 | 34 | #define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80) |
| 35 | 35 | #define GIC_PRIO_PSR_I_SET (1 << 4) |
| 36 | 36 | |
| @@ -8,19 +8,12 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/percpu.h> |
| 9 | 9 | #include <linux/sched.h> |
| 10 | 10 | #include <linux/sched/task_stack.h> |
| 11 | +#include <linux/types.h> | |
| 11 | 12 | |
| 12 | 13 | #include <asm/memory.h> |
| 13 | 14 | #include <asm/ptrace.h> |
| 14 | 15 | #include <asm/sdei.h> |
| 15 | 16 | |
| 16 | −struct stackframe { | |
| 17 | − unsigned long fp; | |
| 18 | − unsigned long pc; | |
| 19 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 20 | − int graph; | |
| 21 | −#endif | |
| 22 | −}; | |
| 23 | − | |
| 24 | 17 | enum stack_type { |
| 25 | 18 | STACK_TYPE_UNKNOWN, |
| 26 | 19 | STACK_TYPE_TASK, |
| @@ -28,6 +21,7 @@ enum stack_type { · 1 unmodified line | ||
| 28 | 21 | STACK_TYPE_OVERFLOW, |
| 29 | 22 | STACK_TYPE_SDEI_NORMAL, |
| 30 | 23 | STACK_TYPE_SDEI_CRITICAL, |
| 24 | + __NR_STACK_TYPES | |
| 31 | 25 | }; |
| 32 | 26 | |
| 33 | 27 | struct stack_info { |
| @@ -36,6 +30,37 @@ struct stack_info { · 2 unmodified lines | ||
| 36 | 30 | enum stack_type type; |
| 37 | 31 | }; |
| 38 | 32 | |
| 33 | +/* | |
| 34 | + * A snapshot of a frame record or fp/lr register values, along with some | |
| 35 | + * accounting information necessary for robust unwinding. | |
| 36 | + * | |
| 37 | + * @fp: The fp value in the frame record (or the real fp) | |
| 38 | + * @pc: The fp value in the frame record (or the real lr) | |
| 39 | + * | |
| 40 | + * @stacks_done: Stacks which have been entirely unwound, for which it is no | |
| 41 | + * longer valid to unwind to. | |
| 42 | + * | |
| 43 | + * @prev_fp: The fp that pointed to this frame record, or a synthetic value | |
| 44 | + * of 0. This is used to ensure that within a stack, each | |
| 45 | + * subsequent frame record is at an increasing address. | |
| 46 | + * @prev_type: The type of stack this frame record was on, or a synthetic | |
| 47 | + * value of STACK_TYPE_UNKNOWN. This is used to detect a | |
| 48 | + * transition from one stack to another. | |
| 49 | + * | |
| 50 | + * @graph: When FUNCTION_GRAPH_TRACER is selected, holds the index of a | |
| 51 | + * replacement lr value in the ftrace graph stack. | |
| 52 | + */ | |
| 53 | +struct stackframe { | |
| 54 | + unsigned long fp; | |
| 55 | + unsigned long pc; | |
| 56 | + DECLARE_BITMAP(stacks_done, __NR_STACK_TYPES); | |
| 57 | + unsigned long prev_fp; | |
| 58 | + enum stack_type prev_type; | |
| 59 | +#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 60 | + int graph; | |
| 61 | +#endif | |
| 62 | +}; | |
| 63 | + | |
| 39 | 64 | extern int unwind_frame(struct task_struct *tsk, struct stackframe *frame); |
| 40 | 65 | extern void walk_stackframe(struct task_struct *tsk, struct stackframe *frame, |
| 41 | 66 | int (*fn)(struct stackframe *, void *), void *data); |
| @@ -64,8 +89,9 @@ static inline bool on_irq_stack(unsigned long sp, · 22 unmodified lines | ||
| 64 | 89 | return true; |
| 65 | 90 | } |
| 66 | 91 | |
| 67 | −static inline bool on_task_stack(struct task_struct *tsk, unsigned long sp, | |
| 68 | − struct stack_info *info) | |
| 92 | +static inline bool on_task_stack(const struct task_struct *tsk, | |
| 93 | + unsigned long sp, | |
| 94 | + struct stack_info *info) | |
| 69 | 95 | { |
| 70 | 96 | unsigned long low = (unsigned long)task_stack_page(tsk); |
| 71 | 97 | unsigned long high = low + THREAD_SIZE; |
| @@ -112,10 +138,13 @@ static inline bool on_overflow_stack(unsigned long sp, · 40 unmodified lines | ||
| 112 | 138 | * We can only safely access per-cpu stacks from current in a non-preemptible |
| 113 | 139 | * context. |
| 114 | 140 | */ |
| 115 | −static inline bool on_accessible_stack(struct task_struct *tsk, | |
| 116 | − unsigned long sp, | |
| 117 | − struct stack_info *info) | |
| 141 | +static inline bool on_accessible_stack(const struct task_struct *tsk, | |
| 142 | + unsigned long sp, | |
| 143 | + struct stack_info *info) | |
| 118 | 144 | { |
| 145 | + if (info) | |
| 146 | + info->type = STACK_TYPE_UNKNOWN; | |
| 147 | + | |
| 119 | 148 | if (on_task_stack(tsk, sp, info)) |
| 120 | 149 | return true; |
| 121 | 150 | if (tsk != current || preemptible()) |
| @@ -130,4 +159,27 @@ static inline bool on_accessible_stack(struct task_struct *tsk, · 8 unmodified lines | ||
| 130 | 159 | return false; |
| 131 | 160 | } |
| 132 | 161 | |
| 162 | +static inline void start_backtrace(struct stackframe *frame, | |
| 163 | + unsigned long fp, unsigned long pc) | |
| 164 | +{ | |
| 165 | + frame->fp = fp; | |
| 166 | + frame->pc = pc; | |
| 167 | +#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 168 | + frame->graph = 0; | |
| 169 | +#endif | |
| 170 | + | |
| 171 | + /* | |
| 172 | + * Prime the first unwind. | |
| 173 | + * | |
| 174 | + * In unwind_frame() we'll check that the FP points to a valid stack, | |
| 175 | + * which can't be STACK_TYPE_UNKNOWN, and the first unwind will be | |
| 176 | + * treated as a transition to whichever stack that happens to be. The | |
| 177 | + * prev_fp value won't be used, but we set it to 0 such that it is | |
| 178 | + * definitely not an accessible stack address. | |
| 179 | + */ | |
| 180 | + bitmap_zero(frame->stacks_done, __NR_STACK_TYPES); | |
| 181 | + frame->prev_fp = 0; | |
| 182 | + frame->prev_type = STACK_TYPE_UNKNOWN; | |
| 183 | +} | |
| 184 | + | |
| 133 | 185 | #endif /* __ASM_STACKTRACE_H */ |
| @@ -16,6 +16,8 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | #define VDSO_HAS_CLOCK_GETRES 1 |
| 18 | 18 | |
| 19 | +#define VDSO_HAS_32BIT_FALLBACK 1 | |
| 20 | + | |
| 19 | 21 | static __always_inline |
| 20 | 22 | int gettimeofday_fallback(struct __kernel_old_timeval *_tv, |
| 21 | 23 | struct timezone *_tz) |
| @@ -51,6 +53,23 @@ long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 29 unmodified lines | ||
| 51 | 53 | return ret; |
| 52 | 54 | } |
| 53 | 55 | |
| 56 | +static __always_inline | |
| 57 | +long clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts) | |
| 58 | +{ | |
| 59 | + register struct old_timespec32 *ts asm("r1") = _ts; | |
| 60 | + register clockid_t clkid asm("r0") = _clkid; | |
| 61 | + register long ret asm ("r0"); | |
| 62 | + register long nr asm("r7") = __NR_compat_clock_gettime; | |
| 63 | + | |
| 64 | + asm volatile( | |
| 65 | + " swi #0\n" | |
| 66 | + : "=r" (ret) | |
| 67 | + : "r" (clkid), "r" (ts), "r" (nr) | |
| 68 | + : "memory"); | |
| 69 | + | |
| 70 | + return ret; | |
| 71 | +} | |
| 72 | + | |
| 54 | 73 | static __always_inline |
| 55 | 74 | int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) |
| 56 | 75 | { |
| @@ -72,6 +91,27 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 15 unmodified lines | ||
| 72 | 91 | return ret; |
| 73 | 92 | } |
| 74 | 93 | |
| 94 | +static __always_inline | |
| 95 | +int clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts) | |
| 96 | +{ | |
| 97 | + register struct old_timespec32 *ts asm("r1") = _ts; | |
| 98 | + register clockid_t clkid asm("r0") = _clkid; | |
| 99 | + register long ret asm ("r0"); | |
| 100 | + register long nr asm("r7") = __NR_compat_clock_getres; | |
| 101 | + | |
| 102 | + /* The checks below are required for ABI consistency with arm */ | |
| 103 | + if ((_clkid >= MAX_CLOCKS) && (_ts == NULL)) | |
| 104 | + return -EINVAL; | |
| 105 | + | |
| 106 | + asm volatile( | |
| 107 | + " swi #0\n" | |
| 108 | + : "=r" (ret) | |
| 109 | + : "r" (clkid), "r" (ts), "r" (nr) | |
| 110 | + : "memory"); | |
| 111 | + | |
| 112 | + return ret; | |
| 113 | +} | |
| 114 | + | |
| 75 | 115 | static __always_inline u64 __arch_get_hw_counter(s32 clock_mode) |
| 76 | 116 | { |
| 77 | 117 | u64 res; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 3 | 3 | #define _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 4 | 4 | |
| @@ -184,9 +184,17 @@ static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = { · 183 unmodified lines | ||
| 184 | 184 | }; |
| 185 | 185 | |
| 186 | 186 | static const struct arm64_ftr_bits ftr_id_aa64mmfr0[] = { |
| 187 | − S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI), | |
| 188 | − S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI), | |
| 189 | − ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI), | |
| 187 | + /* | |
| 188 | + * We already refuse to boot CPUs that don't support our configured | |
| 189 | + * page size, so we can only detect mismatches for a page size other | |
| 190 | + * than the one we're currently using. Unfortunately, SoCs like this | |
| 191 | + * exist in the wild so, even though we don't like it, we'll have to go | |
| 192 | + * along with it and treat them as non-strict. | |
| 193 | + */ | |
| 194 | + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN4_SHIFT, 4, ID_AA64MMFR0_TGRAN4_NI), | |
| 195 | + S_ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN64_SHIFT, 4, ID_AA64MMFR0_TGRAN64_NI), | |
| 196 | + ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_TGRAN16_SHIFT, 4, ID_AA64MMFR0_TGRAN16_NI), | |
| 197 | + | |
| 190 | 198 | ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_BIGENDEL0_SHIFT, 4, 0), |
| 191 | 199 | /* Linux shouldn't care about secure memory */ |
| 192 | 200 | ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR0_SNSMEM_SHIFT, 4, 0), |
| @@ -225,8 +233,8 @@ static const struct arm64_ftr_bits ftr_ctr[] = { · 32 unmodified lines | ||
| 225 | 233 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */ |
| 226 | 234 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_DIC_SHIFT, 1, 1), |
| 227 | 235 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_IDC_SHIFT, 1, 1), |
| 228 | − ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, CTR_CWG_SHIFT, 4, 0), | |
| 229 | − ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, CTR_ERG_SHIFT, 4, 0), | |
| 236 | + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, CTR_CWG_SHIFT, 4, 0), | |
| 237 | + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, CTR_ERG_SHIFT, 4, 0), | |
| 230 | 238 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1), |
| 231 | 239 | /* |
| 232 | 240 | * Linux can handle differing I-cache policies. Userspace JITs will |
| @@ -468,6 +476,10 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new, · 235 unmodified lines | ||
| 468 | 476 | case FTR_LOWER_SAFE: |
| 469 | 477 | ret = new < cur ? new : cur; |
| 470 | 478 | break; |
| 479 | + case FTR_HIGHER_OR_ZERO_SAFE: | |
| 480 | + if (!cur || !new) | |
| 481 | + break; | |
| 482 | + /* Fallthrough */ | |
| 471 | 483 | case FTR_HIGHER_SAFE: |
| 472 | 484 | ret = new > cur ? new : cur; |
| 473 | 485 | break; |
| @@ -207,16 +207,16 @@ static int call_step_hook(struct pt_regs *regs, unsigned int esr) · 206 unmodified lines | ||
| 207 | 207 | |
| 208 | 208 | list = user_mode(regs) ? &user_step_hook : &kernel_step_hook; |
| 209 | 209 | |
| 210 | − rcu_read_lock(); | |
| 211 | − | |
| 210 | + /* | |
| 211 | + * Since single-step exception disables interrupt, this function is | |
| 212 | + * entirely not preemptible, and we can use rcu list safely here. | |
| 213 | + */ | |
| 212 | 214 | list_for_each_entry_rcu(hook, list, node) { |
| 213 | 215 | retval = hook->fn(regs, esr); |
| 214 | 216 | if (retval == DBG_HOOK_HANDLED) |
| 215 | 217 | break; |
| 216 | 218 | } |
| 217 | 219 | |
| 218 | − rcu_read_unlock(); | |
| 219 | − | |
| 220 | 220 | return retval; |
| 221 | 221 | } |
| 222 | 222 | NOKPROBE_SYMBOL(call_step_hook); |
| @@ -305,14 +305,16 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr) · 82 unmodified lines | ||
| 305 | 305 | |
| 306 | 306 | list = user_mode(regs) ? &user_break_hook : &kernel_break_hook; |
| 307 | 307 | |
| 308 | − rcu_read_lock(); | |
| 308 | + /* | |
| 309 | + * Since brk exception disables interrupt, this function is | |
| 310 | + * entirely not preemptible, and we can use rcu list safely here. | |
| 311 | + */ | |
| 309 | 312 | list_for_each_entry_rcu(hook, list, node) { |
| 310 | 313 | unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK; |
| 311 | 314 | |
| 312 | 315 | if ((comment & ~hook->mask) == hook->imm) |
| 313 | 316 | fn = hook->fn; |
| 314 | 317 | } |
| 315 | − rcu_read_unlock(); | |
| 316 | 318 | |
| 317 | 319 | return fn ? fn(regs, esr) : DBG_HOOK_ERROR; |
| 318 | 320 | } |
| @@ -586,10 +586,8 @@ el1_sync: · 585 unmodified lines | ||
| 586 | 586 | b.eq el1_ia |
| 587 | 587 | cmp x24, #ESR_ELx_EC_SYS64 // configurable trap |
| 588 | 588 | b.eq el1_undef |
| 589 | − cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception | |
| 590 | − b.eq el1_sp_pc | |
| 591 | 589 | cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception |
| 592 | − b.eq el1_sp_pc | |
| 590 | + b.eq el1_pc | |
| 593 | 591 | cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL1 |
| 594 | 592 | b.eq el1_undef |
| 595 | 593 | cmp x24, #ESR_ELx_EC_BREAKPT_CUR // debug exception in EL1 |
| @@ -611,9 +609,11 @@ el1_da: · 15 unmodified lines | ||
| 611 | 609 | bl do_mem_abort |
| 612 | 610 | |
| 613 | 611 | kernel_exit 1 |
| 614 | −el1_sp_pc: | |
| 612 | +el1_pc: | |
| 615 | 613 | /* |
| 616 | − * Stack or PC alignment exception handling | |
| 614 | + * PC alignment exception handling. We don't handle SP alignment faults, | |
| 615 | + * since we will have hit a recursive exception when trying to push the | |
| 616 | + * initial pt_regs. | |
| 617 | 617 | */ |
| 618 | 618 | mrs x0, far_el1 |
| 619 | 619 | inherit_daif pstate=x23, tmp=x2 |
| @@ -732,9 +732,9 @@ el0_sync: · 112 unmodified lines | ||
| 732 | 732 | ccmp x24, #ESR_ELx_EC_WFx, #4, ne |
| 733 | 733 | b.eq el0_sys |
| 734 | 734 | cmp x24, #ESR_ELx_EC_SP_ALIGN // stack alignment exception |
| 735 | − b.eq el0_sp_pc | |
| 735 | + b.eq el0_sp | |
| 736 | 736 | cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception |
| 737 | − b.eq el0_sp_pc | |
| 737 | + b.eq el0_pc | |
| 738 | 738 | cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0 |
| 739 | 739 | b.eq el0_undef |
| 740 | 740 | cmp x24, #ESR_ELx_EC_BREAKPT_LOW // debug exception in EL0 |
| @@ -758,7 +758,7 @@ el0_sync_compat: · 17 unmodified lines | ||
| 758 | 758 | cmp x24, #ESR_ELx_EC_FP_EXC32 // FP/ASIMD exception |
| 759 | 759 | b.eq el0_fpsimd_exc |
| 760 | 760 | cmp x24, #ESR_ELx_EC_PC_ALIGN // pc alignment exception |
| 761 | − b.eq el0_sp_pc | |
| 761 | + b.eq el0_pc | |
| 762 | 762 | cmp x24, #ESR_ELx_EC_UNKNOWN // unknown exception in EL0 |
| 763 | 763 | b.eq el0_undef |
| 764 | 764 | cmp x24, #ESR_ELx_EC_CP15_32 // CP15 MRC/MCR trap |
| @@ -858,11 +858,15 @@ el0_fpsimd_exc: · 93 unmodified lines | ||
| 858 | 858 | mov x1, sp |
| 859 | 859 | bl do_fpsimd_exc |
| 860 | 860 | b ret_to_user |
| 861 | +el0_sp: | |
| 862 | + ldr x26, [sp, #S_SP] | |
| 863 | + b el0_sp_pc | |
| 864 | +el0_pc: | |
| 865 | + mrs x26, far_el1 | |
| 861 | 866 | el0_sp_pc: |
| 862 | 867 | /* |
| 863 | 868 | * Stack or PC alignment exception handling |
| 864 | 869 | */ |
| 865 | − mrs x26, far_el1 | |
| 866 | 870 | gic_prio_kentry_setup tmp=x0 |
| 867 | 871 | enable_da_f |
| 868 | 872 | #ifdef CONFIG_TRACE_IRQFLAGS |
| @@ -406,6 +406,18 @@ static __uint128_t arm64_cpu_to_le128(__uint128_t x) · 405 unmodified lines | ||
| 406 | 406 | |
| 407 | 407 | #define arm64_le128_to_cpu(x) arm64_cpu_to_le128(x) |
| 408 | 408 | |
| 409 | +static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst, | |
| 410 | + unsigned int vq) | |
| 411 | +{ | |
| 412 | + unsigned int i; | |
| 413 | + __uint128_t *p; | |
| 414 | + | |
| 415 | + for (i = 0; i < SVE_NUM_ZREGS; ++i) { | |
| 416 | + p = (__uint128_t *)ZREG(sst, vq, i); | |
| 417 | + *p = arm64_cpu_to_le128(fst->vregs[i]); | |
| 418 | + } | |
| 419 | +} | |
| 420 | + | |
| 409 | 421 | /* |
| 410 | 422 | * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to |
| 411 | 423 | * task->thread.sve_state. |
| @@ -423,17 +435,12 @@ static void fpsimd_to_sve(struct task_struct *task) · 11 unmodified lines | ||
| 423 | 435 | unsigned int vq; |
| 424 | 436 | void *sst = task->thread.sve_state; |
| 425 | 437 | struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; |
| 426 | − unsigned int i; | |
| 427 | − __uint128_t *p; | |
| 428 | 438 | |
| 429 | 439 | if (!system_supports_sve()) |
| 430 | 440 | return; |
| 431 | 441 | |
| 432 | 442 | vq = sve_vq_from_vl(task->thread.sve_vl); |
| 433 | − for (i = 0; i < 32; ++i) { | |
| 434 | − p = (__uint128_t *)ZREG(sst, vq, i); | |
| 435 | − *p = arm64_cpu_to_le128(fst->vregs[i]); | |
| 436 | − } | |
| 443 | + __fpsimd_to_sve(sst, fst, vq); | |
| 437 | 444 | } |
| 438 | 445 | |
| 439 | 446 | /* |
| @@ -459,7 +466,7 @@ static void sve_to_fpsimd(struct task_struct *task) · 19 unmodified lines | ||
| 459 | 466 | return; |
| 460 | 467 | |
| 461 | 468 | vq = sve_vq_from_vl(task->thread.sve_vl); |
| 462 | − for (i = 0; i < 32; ++i) { | |
| 469 | + for (i = 0; i < SVE_NUM_ZREGS; ++i) { | |
| 463 | 470 | p = (__uint128_t const *)ZREG(sst, vq, i); |
| 464 | 471 | fst->vregs[i] = arm64_le128_to_cpu(*p); |
| 465 | 472 | } |
| @@ -550,8 +557,6 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task) · 84 unmodified lines | ||
| 550 | 557 | unsigned int vq; |
| 551 | 558 | void *sst = task->thread.sve_state; |
| 552 | 559 | struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; |
| 553 | − unsigned int i; | |
| 554 | − __uint128_t *p; | |
| 555 | 560 | |
| 556 | 561 | if (!test_tsk_thread_flag(task, TIF_SVE)) |
| 557 | 562 | return; |
| @@ -559,11 +564,7 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task) · 1 unmodified line | ||
| 559 | 564 | vq = sve_vq_from_vl(task->thread.sve_vl); |
| 560 | 565 | |
| 561 | 566 | memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); |
| 562 | − | |
| 563 | − for (i = 0; i < 32; ++i) { | |
| 564 | − p = (__uint128_t *)ZREG(sst, vq, i); | |
| 565 | − *p = arm64_cpu_to_le128(fst->vregs[i]); | |
| 566 | − } | |
| 567 | + __fpsimd_to_sve(sst, fst, vq); | |
| 567 | 568 | } |
| 568 | 569 | |
| 569 | 570 | int sve_set_vector_length(struct task_struct *task, |
| @@ -73,7 +73,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) · 72 unmodified lines | ||
| 73 | 73 | |
| 74 | 74 | if (offset < -SZ_128M || offset >= SZ_128M) { |
| 75 | 75 | #ifdef CONFIG_ARM64_MODULE_PLTS |
| 76 | − struct plt_entry trampoline; | |
| 76 | + struct plt_entry trampoline, *dst; | |
| 77 | 77 | struct module *mod; |
| 78 | 78 | |
| 79 | 79 | /* |
| @@ -106,23 +106,27 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) · 26 unmodified lines | ||
| 106 | 106 | * to check if the actual opcodes are in fact identical, |
| 107 | 107 | * regardless of the offset in memory so use memcmp() instead. |
| 108 | 108 | */ |
| 109 | − trampoline = get_plt_entry(addr, mod->arch.ftrace_trampoline); | |
| 110 | − if (memcmp(mod->arch.ftrace_trampoline, &trampoline, | |
| 111 | − sizeof(trampoline))) { | |
| 112 | − if (plt_entry_is_initialized(mod->arch.ftrace_trampoline)) { | |
| 109 | + dst = mod->arch.ftrace_trampoline; | |
| 110 | + trampoline = get_plt_entry(addr, dst); | |
| 111 | + if (memcmp(dst, &trampoline, sizeof(trampoline))) { | |
| 112 | + if (plt_entry_is_initialized(dst)) { | |
| 113 | 113 | pr_err("ftrace: far branches to multiple entry points unsupported inside a single module\n"); |
| 114 | 114 | return -EINVAL; |
| 115 | 115 | } |
| 116 | 116 | |
| 117 | 117 | /* point the trampoline to our ftrace entry point */ |
| 118 | 118 | module_disable_ro(mod); |
| 119 | − *mod->arch.ftrace_trampoline = trampoline; | |
| 119 | + *dst = trampoline; | |
| 120 | 120 | module_enable_ro(mod, true); |
| 121 | 121 | |
| 122 | − /* update trampoline before patching in the branch */ | |
| 123 | − smp_wmb(); | |
| 122 | + /* | |
| 123 | + * Ensure updated trampoline is visible to instruction | |
| 124 | + * fetch before we patch in the branch. | |
| 125 | + */ | |
| 126 | + __flush_icache_range((unsigned long)&dst[0], | |
| 127 | + (unsigned long)&dst[1]); | |
| 124 | 128 | } |
| 125 | − addr = (unsigned long)(void *)mod->arch.ftrace_trampoline; | |
| 129 | + addr = (unsigned long)dst; | |
| 126 | 130 | #else /* CONFIG_ARM64_MODULE_PLTS */ |
| 127 | 131 | return -EINVAL; |
| 128 | 132 | #endif /* CONFIG_ARM64_MODULE_PLTS */ |
| @@ -536,13 +536,18 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 535 unmodified lines | ||
| 536 | 536 | /* Aligned */ |
| 537 | 537 | break; |
| 538 | 538 | case 1: |
| 539 | − /* Allow single byte watchpoint. */ | |
| 540 | − if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) | |
| 541 | − break; | |
| 542 | 539 | case 2: |
| 543 | 540 | /* Allow halfword watchpoints and breakpoints. */ |
| 544 | 541 | if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) |
| 545 | 542 | break; |
| 543 | + | |
| 544 | + /* Fallthrough */ | |
| 545 | + case 3: | |
| 546 | + /* Allow single byte watchpoint. */ | |
| 547 | + if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) | |
| 548 | + break; | |
| 549 | + | |
| 550 | + /* Fallthrough */ | |
| 546 | 551 | default: |
| 547 | 552 | return -EINVAL; |
| 548 | 553 | } |
| @@ -314,18 +314,21 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 313 unmodified lines | ||
| 314 | 314 | /* MOVW instruction relocations. */ |
| 315 | 315 | case R_AARCH64_MOVW_UABS_G0_NC: |
| 316 | 316 | overflow_check = false; |
| 317 | + /* Fall through */ | |
| 317 | 318 | case R_AARCH64_MOVW_UABS_G0: |
| 318 | 319 | ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0, |
| 319 | 320 | AARCH64_INSN_IMM_MOVKZ); |
| 320 | 321 | break; |
| 321 | 322 | case R_AARCH64_MOVW_UABS_G1_NC: |
| 322 | 323 | overflow_check = false; |
| 324 | + /* Fall through */ | |
| 323 | 325 | case R_AARCH64_MOVW_UABS_G1: |
| 324 | 326 | ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16, |
| 325 | 327 | AARCH64_INSN_IMM_MOVKZ); |
| 326 | 328 | break; |
| 327 | 329 | case R_AARCH64_MOVW_UABS_G2_NC: |
| 328 | 330 | overflow_check = false; |
| 331 | + /* Fall through */ | |
| 329 | 332 | case R_AARCH64_MOVW_UABS_G2: |
| 330 | 333 | ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32, |
| 331 | 334 | AARCH64_INSN_IMM_MOVKZ); |
| @@ -393,6 +396,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 61 unmodified lines | ||
| 393 | 396 | break; |
| 394 | 397 | case R_AARCH64_ADR_PREL_PG_HI21_NC: |
| 395 | 398 | overflow_check = false; |
| 399 | + /* Fall through */ | |
| 396 | 400 | case R_AARCH64_ADR_PREL_PG_HI21: |
| 397 | 401 | ovf = reloc_insn_adrp(me, sechdrs, loc, val); |
| 398 | 402 | if (ovf && ovf != -ERANGE) |
| @@ -154,12 +154,7 @@ void perf_callchain_kernel(struct perf_callchain_entry_ctx *entry, · 153 unmodified lines | ||
| 154 | 154 | return; |
| 155 | 155 | } |
| 156 | 156 | |
| 157 | − frame.fp = regs->regs[29]; | |
| 158 | − frame.pc = regs->pc; | |
| 159 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 160 | − frame.graph = 0; | |
| 161 | −#endif | |
| 162 | − | |
| 157 | + start_backtrace(&frame, regs->regs[29], regs->pc); | |
| 163 | 158 | walk_stackframe(current, &frame, callchain_trace, entry); |
| 164 | 159 | } |
| 165 | 160 | |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <asm/ptrace.h> |
| 22 | 22 | #include <asm/cacheflush.h> |
| 23 | 23 | #include <asm/debug-monitors.h> |
| 24 | +#include <asm/daifflags.h> | |
| 24 | 25 | #include <asm/system_misc.h> |
| 25 | 26 | #include <asm/insn.h> |
| 26 | 27 | #include <linux/uaccess.h> |
| @@ -167,33 +168,6 @@ static void __kprobes set_current_kprobe(struct kprobe *p) · 140 unmodified lines | ||
| 167 | 168 | __this_cpu_write(current_kprobe, p); |
| 168 | 169 | } |
| 169 | 170 | |
| 170 | −/* | |
| 171 | − * When PSTATE.D is set (masked), then software step exceptions can not be | |
| 172 | − * generated. | |
| 173 | − * SPSR's D bit shows the value of PSTATE.D immediately before the | |
| 174 | − * exception was taken. PSTATE.D is set while entering into any exception | |
| 175 | − * mode, however software clears it for any normal (none-debug-exception) | |
| 176 | − * mode in the exception entry. Therefore, when we are entering into kprobe | |
| 177 | − * breakpoint handler from any normal mode then SPSR.D bit is already | |
| 178 | − * cleared, however it is set when we are entering from any debug exception | |
| 179 | − * mode. | |
| 180 | − * Since we always need to generate single step exception after a kprobe | |
| 181 | − * breakpoint exception therefore we need to clear it unconditionally, when | |
| 182 | − * we become sure that the current breakpoint exception is for kprobe. | |
| 183 | − */ | |
| 184 | −static void __kprobes | |
| 185 | −spsr_set_debug_flag(struct pt_regs *regs, int mask) | |
| 186 | −{ | |
| 187 | − unsigned long spsr = regs->pstate; | |
| 188 | − | |
| 189 | − if (mask) | |
| 190 | − spsr |= PSR_D_BIT; | |
| 191 | − else | |
| 192 | − spsr &= ~PSR_D_BIT; | |
| 193 | − | |
| 194 | − regs->pstate = spsr; | |
| 195 | −} | |
| 196 | − | |
| 197 | 171 | /* |
| 198 | 172 | * Interrupts need to be disabled before single-step mode is set, and not |
| 199 | 173 | * reenabled until after single-step mode ends. |
| @@ -205,17 +179,17 @@ spsr_set_debug_flag(struct pt_regs *regs, int mask) · 5 unmodified lines | ||
| 205 | 179 | static void __kprobes kprobes_save_local_irqflag(struct kprobe_ctlblk *kcb, |
| 206 | 180 | struct pt_regs *regs) |
| 207 | 181 | { |
| 208 | − kcb->saved_irqflag = regs->pstate; | |
| 182 | + kcb->saved_irqflag = regs->pstate & DAIF_MASK; | |
| 209 | 183 | regs->pstate |= PSR_I_BIT; |
| 184 | + /* Unmask PSTATE.D for enabling software step exceptions. */ | |
| 185 | + regs->pstate &= ~PSR_D_BIT; | |
| 210 | 186 | } |
| 211 | 187 | |
| 212 | 188 | static void __kprobes kprobes_restore_local_irqflag(struct kprobe_ctlblk *kcb, |
| 213 | 189 | struct pt_regs *regs) |
| 214 | 190 | { |
| 215 | − if (kcb->saved_irqflag & PSR_I_BIT) | |
| 216 | − regs->pstate |= PSR_I_BIT; | |
| 217 | − else | |
| 218 | − regs->pstate &= ~PSR_I_BIT; | |
| 191 | + regs->pstate &= ~DAIF_MASK; | |
| 192 | + regs->pstate |= kcb->saved_irqflag; | |
| 219 | 193 | } |
| 220 | 194 | |
| 221 | 195 | static void __kprobes |
| @@ -252,8 +226,6 @@ static void __kprobes setup_singlestep(struct kprobe *p, · 30 unmodified lines | ||
| 252 | 226 | |
| 253 | 227 | set_ss_context(kcb, slot); /* mark pending ss */ |
| 254 | 228 | |
| 255 | − spsr_set_debug_flag(regs, 0); | |
| 256 | − | |
| 257 | 229 | /* IRQs and single stepping do not mix well. */ |
| 258 | 230 | kprobes_save_local_irqflag(kcb, regs); |
| 259 | 231 | kernel_enable_single_step(regs); |
| @@ -398,7 +398,7 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, · 397 unmodified lines | ||
| 398 | 398 | childregs->pstate |= PSR_UAO_BIT; |
| 399 | 399 | |
| 400 | 400 | if (arm64_get_ssbd_state() == ARM64_SSBD_FORCE_DISABLE) |
| 401 | − childregs->pstate |= PSR_SSBS_BIT; | |
| 401 | + set_ssbs_bit(childregs); | |
| 402 | 402 | |
| 403 | 403 | if (system_uses_irq_prio_masking()) |
| 404 | 404 | childregs->pmr_save = GIC_PRIO_IRQON; |
| @@ -442,6 +442,32 @@ void uao_thread_switch(struct task_struct *next) · 37 unmodified lines | ||
| 442 | 442 | } |
| 443 | 443 | } |
| 444 | 444 | |
| 445 | +/* | |
| 446 | + * Force SSBS state on context-switch, since it may be lost after migrating | |
| 447 | + * from a CPU which treats the bit as RES0 in a heterogeneous system. | |
| 448 | + */ | |
| 449 | +static void ssbs_thread_switch(struct task_struct *next) | |
| 450 | +{ | |
| 451 | + struct pt_regs *regs = task_pt_regs(next); | |
| 452 | + | |
| 453 | + /* | |
| 454 | + * Nothing to do for kernel threads, but 'regs' may be junk | |
| 455 | + * (e.g. idle task) so check the flags and bail early. | |
| 456 | + */ | |
| 457 | + if (unlikely(next->flags & PF_KTHREAD)) | |
| 458 | + return; | |
| 459 | + | |
| 460 | + /* If the mitigation is enabled, then we leave SSBS clear. */ | |
| 461 | + if ((arm64_get_ssbd_state() == ARM64_SSBD_FORCE_ENABLE) || | |
| 462 | + test_tsk_thread_flag(next, TIF_SSBD)) | |
| 463 | + return; | |
| 464 | + | |
| 465 | + if (compat_user_mode(regs)) | |
| 466 | + set_compat_ssbs_bit(regs); | |
| 467 | + else if (user_mode(regs)) | |
| 468 | + set_ssbs_bit(regs); | |
| 469 | +} | |
| 470 | + | |
| 445 | 471 | /* |
| 446 | 472 | * We store our current task in sp_el0, which is clobbered by userspace. Keep a |
| 447 | 473 | * shadow copy so that we can restore this upon entry from userspace. |
| @@ -471,6 +497,7 @@ __notrace_funcgraph struct task_struct *__switch_to(struct task_struct *prev, · 23 unmodified lines | ||
| 471 | 497 | entry_task_switch(next); |
| 472 | 498 | uao_thread_switch(next); |
| 473 | 499 | ptrauth_thread_switch(next); |
| 500 | + ssbs_thread_switch(next); | |
| 474 | 501 | |
| 475 | 502 | /* |
| 476 | 503 | * Complete any pending TLB or cache maintenance on this CPU in case |
| @@ -498,11 +525,8 @@ unsigned long get_wchan(struct task_struct *p) · 21 unmodified lines | ||
| 498 | 525 | if (!stack_page) |
| 499 | 526 | return 0; |
| 500 | 527 | |
| 501 | − frame.fp = thread_saved_fp(p); | |
| 502 | − frame.pc = thread_saved_pc(p); | |
| 503 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 504 | − frame.graph = 0; | |
| 505 | −#endif | |
| 528 | + start_backtrace(&frame, thread_saved_fp(p), thread_saved_pc(p)); | |
| 529 | + | |
| 506 | 530 | do { |
| 507 | 531 | if (unwind_frame(p, &frame)) |
| 508 | 532 | goto out; |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | #include <linux/export.h> |
| 10 | 10 | #include <linux/ftrace.h> |
| 11 | +#include <linux/kprobes.h> | |
| 11 | 12 | |
| 12 | 13 | #include <asm/stack_pointer.h> |
| 13 | 14 | #include <asm/stacktrace.h> |
| @@ -29,6 +30,7 @@ static int save_return_addr(struct stackframe *frame, void *d) · 15 unmodified lines | ||
| 29 | 30 | return 0; |
| 30 | 31 | } |
| 31 | 32 | } |
| 33 | +NOKPROBE_SYMBOL(save_return_addr); | |
| 32 | 34 | |
| 33 | 35 | void *return_address(unsigned int level) |
| 34 | 36 | { |
| @@ -38,12 +40,9 @@ void *return_address(unsigned int level) · 3 unmodified lines | ||
| 38 | 40 | data.level = level + 2; |
| 39 | 41 | data.addr = NULL; |
| 40 | 42 | |
| 41 | − frame.fp = (unsigned long)__builtin_frame_address(0); | |
| 42 | − frame.pc = (unsigned long)return_address; /* dummy */ | |
| 43 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 44 | − frame.graph = 0; | |
| 45 | −#endif | |
| 46 | − | |
| 43 | + start_backtrace(&frame, | |
| 44 | + (unsigned long)__builtin_frame_address(0), | |
| 45 | + (unsigned long)return_address); | |
| 47 | 46 | walk_stackframe(current, &frame, save_return_addr, &data); |
| 48 | 47 | |
| 49 | 48 | if (!data.level) |
| @@ -52,3 +51,4 @@ void *return_address(unsigned int level) · 2 unmodified lines | ||
| 52 | 51 | return NULL; |
| 53 | 52 | } |
| 54 | 53 | EXPORT_SYMBOL_GPL(return_address); |
| 54 | +NOKPROBE_SYMBOL(return_address); | |
| @@ -152,8 +152,8 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) · 151 unmodified lines | ||
| 152 | 152 | pr_crit("CPU%u: died during early boot\n", cpu); |
| 153 | 153 | break; |
| 154 | 154 | } |
| 155 | − /* Fall through */ | |
| 156 | 155 | pr_crit("CPU%u: may not have shut down cleanly\n", cpu); |
| 156 | + /* Fall through */ | |
| 157 | 157 | case CPU_STUCK_IN_KERNEL: |
| 158 | 158 | pr_crit("CPU%u: is stuck in kernel\n", cpu); |
| 159 | 159 | if (status & CPU_STUCK_REASON_52_BIT_VA) |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <linux/kernel.h> |
| 8 | 8 | #include <linux/export.h> |
| 9 | 9 | #include <linux/ftrace.h> |
| 10 | +#include <linux/kprobes.h> | |
| 10 | 11 | #include <linux/sched.h> |
| 11 | 12 | #include <linux/sched/debug.h> |
| 12 | 13 | #include <linux/sched/task_stack.h> |
| @@ -29,9 +30,18 @@ · 16 unmodified lines | ||
| 29 | 30 | * ldp x29, x30, [sp] |
| 30 | 31 | * add sp, sp, #0x10 |
| 31 | 32 | */ |
| 33 | + | |
| 34 | +/* | |
| 35 | + * Unwind from one frame record (A) to the next frame record (B). | |
| 36 | + * | |
| 37 | + * We terminate early if the location of B indicates a malformed chain of frame | |
| 38 | + * records (e.g. a cycle), determined based on the location and fp value of A | |
| 39 | + * and the location (but not the fp value) of B. | |
| 40 | + */ | |
| 32 | 41 | int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame) |
| 33 | 42 | { |
| 34 | 43 | unsigned long fp = frame->fp; |
| 44 | + struct stack_info info; | |
| 35 | 45 | |
| 36 | 46 | if (fp & 0xf) |
| 37 | 47 | return -EINVAL; |
| @@ -39,11 +49,40 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame) · 1 unmodified line | ||
| 39 | 49 | if (!tsk) |
| 40 | 50 | tsk = current; |
| 41 | 51 | |
| 42 | − if (!on_accessible_stack(tsk, fp, NULL)) | |
| 52 | + if (!on_accessible_stack(tsk, fp, &info)) | |
| 53 | + return -EINVAL; | |
| 54 | + | |
| 55 | + if (test_bit(info.type, frame->stacks_done)) | |
| 43 | 56 | return -EINVAL; |
| 44 | 57 | |
| 58 | + /* | |
| 59 | + * As stacks grow downward, any valid record on the same stack must be | |
| 60 | + * at a strictly higher address than the prior record. | |
| 61 | + * | |
| 62 | + * Stacks can nest in several valid orders, e.g. | |
| 63 | + * | |
| 64 | + * TASK -> IRQ -> OVERFLOW -> SDEI_NORMAL | |
| 65 | + * TASK -> SDEI_NORMAL -> SDEI_CRITICAL -> OVERFLOW | |
| 66 | + * | |
| 67 | + * ... but the nesting itself is strict. Once we transition from one | |
| 68 | + * stack to another, it's never valid to unwind back to that first | |
| 69 | + * stack. | |
| 70 | + */ | |
| 71 | + if (info.type == frame->prev_type) { | |
| 72 | + if (fp <= frame->prev_fp) | |
| 73 | + return -EINVAL; | |
| 74 | + } else { | |
| 75 | + set_bit(frame->prev_type, frame->stacks_done); | |
| 76 | + } | |
| 77 | + | |
| 78 | + /* | |
| 79 | + * Record this frame record's values and location. The prev_fp and | |
| 80 | + * prev_type are only meaningful to the next unwind_frame() invocation. | |
| 81 | + */ | |
| 45 | 82 | frame->fp = READ_ONCE_NOCHECK(*(unsigned long *)(fp)); |
| 46 | 83 | frame->pc = READ_ONCE_NOCHECK(*(unsigned long *)(fp + 8)); |
| 84 | + frame->prev_fp = fp; | |
| 85 | + frame->prev_type = info.type; | |
| 47 | 86 | |
| 48 | 87 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
| 49 | 88 | if (tsk->ret_stack && |
| @@ -73,6 +112,7 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame) · 23 unmodified lines | ||
| 73 | 112 | |
| 74 | 113 | return 0; |
| 75 | 114 | } |
| 115 | +NOKPROBE_SYMBOL(unwind_frame); | |
| 76 | 116 | |
| 77 | 117 | void notrace walk_stackframe(struct task_struct *tsk, struct stackframe *frame, |
| 78 | 118 | int (*fn)(struct stackframe *, void *), void *data) |
| @@ -87,6 +127,7 @@ void notrace walk_stackframe(struct task_struct *tsk, struct stackframe *frame, · 8 unmodified lines | ||
| 87 | 127 | break; |
| 88 | 128 | } |
| 89 | 129 | } |
| 130 | +NOKPROBE_SYMBOL(walk_stackframe); | |
| 90 | 131 | |
| 91 | 132 | #ifdef CONFIG_STACKTRACE |
| 92 | 133 | struct stack_trace_data { |
| @@ -122,12 +163,7 @@ void save_stack_trace_regs(struct pt_regs *regs, struct stack_trace *trace) · 29 unmodified lines | ||
| 122 | 163 | data.skip = trace->skip; |
| 123 | 164 | data.no_sched_functions = 0; |
| 124 | 165 | |
| 125 | − frame.fp = regs->regs[29]; | |
| 126 | − frame.pc = regs->pc; | |
| 127 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 128 | − frame.graph = 0; | |
| 129 | −#endif | |
| 130 | − | |
| 166 | + start_backtrace(&frame, regs->regs[29], regs->pc); | |
| 131 | 167 | walk_stackframe(current, &frame, save_trace, &data); |
| 132 | 168 | } |
| 133 | 169 | EXPORT_SYMBOL_GPL(save_stack_trace_regs); |
| @@ -146,17 +182,15 @@ static noinline void __save_stack_trace(struct task_struct *tsk, · 12 unmodified lines | ||
| 146 | 182 | data.no_sched_functions = nosched; |
| 147 | 183 | |
| 148 | 184 | if (tsk != current) { |
| 149 | − frame.fp = thread_saved_fp(tsk); | |
| 150 | − frame.pc = thread_saved_pc(tsk); | |
| 185 | + start_backtrace(&frame, thread_saved_fp(tsk), | |
| 186 | + thread_saved_pc(tsk)); | |
| 151 | 187 | } else { |
| 152 | 188 | /* We don't want this function nor the caller */ |
| 153 | 189 | data.skip += 2; |
| 154 | − frame.fp = (unsigned long)__builtin_frame_address(0); | |
| 155 | − frame.pc = (unsigned long)__save_stack_trace; | |
| 190 | + start_backtrace(&frame, | |
| 191 | + (unsigned long)__builtin_frame_address(0), | |
| 192 | + (unsigned long)__save_stack_trace); | |
| 156 | 193 | } |
| 157 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 158 | − frame.graph = 0; | |
| 159 | −#endif | |
| 160 | 194 | |
| 161 | 195 | walk_stackframe(tsk, &frame, save_trace, &data); |
| 162 | 196 | |
| @@ -38,11 +38,8 @@ unsigned long profile_pc(struct pt_regs *regs) · 37 unmodified lines | ||
| 38 | 38 | if (!in_lock_functions(regs->pc)) |
| 39 | 39 | return regs->pc; |
| 40 | 40 | |
| 41 | − frame.fp = regs->regs[29]; | |
| 42 | − frame.pc = regs->pc; | |
| 43 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 44 | − frame.graph = 0; | |
| 45 | −#endif | |
| 41 | + start_backtrace(&frame, regs->regs[29], regs->pc); | |
| 42 | + | |
| 46 | 43 | do { |
| 47 | 44 | int ret = unwind_frame(NULL, &frame); |
| 48 | 45 | if (ret < 0) |
| @@ -100,18 +100,17 @@ void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) · 99 unmodified lines | ||
| 100 | 100 | return; |
| 101 | 101 | |
| 102 | 102 | if (tsk == current) { |
| 103 | − frame.fp = (unsigned long)__builtin_frame_address(0); | |
| 104 | − frame.pc = (unsigned long)dump_backtrace; | |
| 103 | + start_backtrace(&frame, | |
| 104 | + (unsigned long)__builtin_frame_address(0), | |
| 105 | + (unsigned long)dump_backtrace); | |
| 105 | 106 | } else { |
| 106 | 107 | /* |
| 107 | 108 | * task blocked in __switch_to |
| 108 | 109 | */ |
| 109 | − frame.fp = thread_saved_fp(tsk); | |
| 110 | − frame.pc = thread_saved_pc(tsk); | |
| 110 | + start_backtrace(&frame, | |
| 111 | + thread_saved_fp(tsk), | |
| 112 | + thread_saved_pc(tsk)); | |
| 111 | 113 | } |
| 112 | −#ifdef CONFIG_FUNCTION_GRAPH_TRACER | |
| 113 | − frame.graph = 0; | |
| 114 | −#endif | |
| 115 | 114 | |
| 116 | 115 | printk("Call trace:\n"); |
| 117 | 116 | do { |
| @@ -734,6 +733,7 @@ static const char *esr_class_str[] = { · 616 unmodified lines | ||
| 734 | 733 | [ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC", |
| 735 | 734 | [ESR_ELx_EC_FP_ASIMD] = "ASIMD", |
| 736 | 735 | [ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS", |
| 736 | + [ESR_ELx_EC_PAC] = "PAC", | |
| 737 | 737 | [ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC", |
| 738 | 738 | [ESR_ELx_EC_ILL] = "PSTATE.IL", |
| 739 | 739 | [ESR_ELx_EC_SVC32] = "SVC (AArch32)", |
| @@ -32,10 +32,10 @@ UBSAN_SANITIZE := n · 31 unmodified lines | ||
| 32 | 32 | OBJECT_FILES_NON_STANDARD := y |
| 33 | 33 | KCOV_INSTRUMENT := n |
| 34 | 34 | |
| 35 | −ifeq ($(c-gettimeofday-y),) | |
| 36 | 35 | CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny |
| 37 | −else | |
| 38 | −CFLAGS_vgettimeofday.o = -O2 -mcmodel=tiny -include $(c-gettimeofday-y) | |
| 36 | + | |
| 37 | +ifneq ($(c-gettimeofday-y),) | |
| 38 | + CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y) | |
| 39 | 39 | endif |
| 40 | 40 | |
| 41 | 41 | # Clang versions less than 8 do not support -mcmodel=tiny |
| @@ -57,8 +57,7 @@ $(obj)/vdso.o : $(obj)/vdso.so · 15 unmodified lines | ||
| 57 | 57 | |
| 58 | 58 | # Link rule for the .so file, .lds has to be first |
| 59 | 59 | $(obj)/vdso.so.dbg: $(obj)/vdso.lds $(obj-vdso) FORCE |
| 60 | − $(call if_changed,ld) | |
| 61 | − $(call if_changed,vdso_check) | |
| 60 | + $(call if_changed,vdsold_and_vdso_check) | |
| 62 | 61 | |
| 63 | 62 | # Strip rule for the .so file |
| 64 | 63 | $(obj)/%.so: OBJCOPYFLAGS := -S |
| @@ -74,8 +73,8 @@ include/generated/vdso-offsets.h: $(obj)/vdso.so.dbg FORCE · 9 unmodified lines | ||
| 74 | 73 | $(call if_changed,vdsosym) |
| 75 | 74 | |
| 76 | 75 | # Actual build commands |
| 77 | −quiet_cmd_vdsocc = VDSOCC $@ | |
| 78 | − cmd_vdsocc = $(CC) $(a_flags) $(c_flags) -c -o $@ $< | |
| 76 | +quiet_cmd_vdsold_and_vdso_check = LD $@ | |
| 77 | + cmd_vdsold_and_vdso_check = $(cmd_ld); $(cmd_vdso_check) | |
| 79 | 78 | |
| 80 | 79 | # Install commands for the unstripped file |
| 81 | 80 | quiet_cmd_vdso_install = INSTALL $@ |
| @@ -144,8 +144,7 @@ $(obj)/vdso.so.dbg: $(obj)/vdso.so.raw $(obj)/$(munge) FORCE · 143 unmodified lines | ||
| 144 | 144 | |
| 145 | 145 | # Link rule for the .so file, .lds has to be first |
| 146 | 146 | $(obj)/vdso.so.raw: $(src)/vdso.lds $(obj-vdso) FORCE |
| 147 | − $(call if_changed,vdsold) | |
| 148 | − $(call if_changed,vdso_check) | |
| 147 | + $(call if_changed,vdsold_and_vdso_check) | |
| 149 | 148 | |
| 150 | 149 | # Compilation rules for the vDSO sources |
| 151 | 150 | $(c-obj-vdso): %.o: %.c FORCE |
| @@ -156,14 +155,17 @@ $(asm-obj-vdso): %.o: %.S FORCE · 4 unmodified lines | ||
| 156 | 155 | $(call if_changed_dep,vdsoas) |
| 157 | 156 | |
| 158 | 157 | # Actual build commands |
| 159 | −quiet_cmd_vdsold = VDSOL $@ | |
| 158 | +quiet_cmd_vdsold_and_vdso_check = LD32 $@ | |
| 159 | + cmd_vdsold_and_vdso_check = $(cmd_vdsold); $(cmd_vdso_check) | |
| 160 | + | |
| 161 | +quiet_cmd_vdsold = LD32 $@ | |
| 160 | 162 | cmd_vdsold = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_LDFLAGS) \ |
| 161 | 163 | -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) -o $@ |
| 162 | −quiet_cmd_vdsocc = VDSOC $@ | |
| 164 | +quiet_cmd_vdsocc = CC32 $@ | |
| 163 | 165 | cmd_vdsocc = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) -c -o $@ $< |
| 164 | −quiet_cmd_vdsocc_gettimeofday = VDSOC_GTD $@ | |
| 166 | +quiet_cmd_vdsocc_gettimeofday = CC32 $@ | |
| 165 | 167 | cmd_vdsocc_gettimeofday = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) $(VDSO_CFLAGS_gettimeofday_o) -c -o $@ $< |
| 166 | −quiet_cmd_vdsoas = VDSOA $@ | |
| 168 | +quiet_cmd_vdsoas = AS32 $@ | |
| 167 | 169 | cmd_vdsoas = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_AFLAGS) -c -o $@ $< |
| 168 | 170 | |
| 169 | 171 | quiet_cmd_vdsomunge = MUNGE $@ |
| @@ -18,40 +18,70 @@ · 17 unmodified lines | ||
| 18 | 18 | #define save_debug(ptr,reg,nr) \ |
| 19 | 19 | switch (nr) { \ |
| 20 | 20 | case 15: ptr[15] = read_debug(reg, 15); \ |
| 21 | + /* Fall through */ \ | |
| 21 | 22 | case 14: ptr[14] = read_debug(reg, 14); \ |
| 23 | + /* Fall through */ \ | |
| 22 | 24 | case 13: ptr[13] = read_debug(reg, 13); \ |
| 25 | + /* Fall through */ \ | |
| 23 | 26 | case 12: ptr[12] = read_debug(reg, 12); \ |
| 27 | + /* Fall through */ \ | |
| 24 | 28 | case 11: ptr[11] = read_debug(reg, 11); \ |
| 29 | + /* Fall through */ \ | |
| 25 | 30 | case 10: ptr[10] = read_debug(reg, 10); \ |
| 31 | + /* Fall through */ \ | |
| 26 | 32 | case 9: ptr[9] = read_debug(reg, 9); \ |
| 33 | + /* Fall through */ \ | |
| 27 | 34 | case 8: ptr[8] = read_debug(reg, 8); \ |
| 35 | + /* Fall through */ \ | |
| 28 | 36 | case 7: ptr[7] = read_debug(reg, 7); \ |
| 37 | + /* Fall through */ \ | |
| 29 | 38 | case 6: ptr[6] = read_debug(reg, 6); \ |
| 39 | + /* Fall through */ \ | |
| 30 | 40 | case 5: ptr[5] = read_debug(reg, 5); \ |
| 41 | + /* Fall through */ \ | |
| 31 | 42 | case 4: ptr[4] = read_debug(reg, 4); \ |
| 43 | + /* Fall through */ \ | |
| 32 | 44 | case 3: ptr[3] = read_debug(reg, 3); \ |
| 45 | + /* Fall through */ \ | |
| 33 | 46 | case 2: ptr[2] = read_debug(reg, 2); \ |
| 47 | + /* Fall through */ \ | |
| 34 | 48 | case 1: ptr[1] = read_debug(reg, 1); \ |
| 49 | + /* Fall through */ \ | |
| 35 | 50 | default: ptr[0] = read_debug(reg, 0); \ |
| 36 | 51 | } |
| 37 | 52 | |
| 38 | 53 | #define restore_debug(ptr,reg,nr) \ |
| 39 | 54 | switch (nr) { \ |
| 40 | 55 | case 15: write_debug(ptr[15], reg, 15); \ |
| 56 | + /* Fall through */ \ | |
| 41 | 57 | case 14: write_debug(ptr[14], reg, 14); \ |
| 58 | + /* Fall through */ \ | |
| 42 | 59 | case 13: write_debug(ptr[13], reg, 13); \ |
| 60 | + /* Fall through */ \ | |
| 43 | 61 | case 12: write_debug(ptr[12], reg, 12); \ |
| 62 | + /* Fall through */ \ | |
| 44 | 63 | case 11: write_debug(ptr[11], reg, 11); \ |
| 64 | + /* Fall through */ \ | |
| 45 | 65 | case 10: write_debug(ptr[10], reg, 10); \ |
| 66 | + /* Fall through */ \ | |
| 46 | 67 | case 9: write_debug(ptr[9], reg, 9); \ |
| 68 | + /* Fall through */ \ | |
| 47 | 69 | case 8: write_debug(ptr[8], reg, 8); \ |
| 70 | + /* Fall through */ \ | |
| 48 | 71 | case 7: write_debug(ptr[7], reg, 7); \ |
| 72 | + /* Fall through */ \ | |
| 49 | 73 | case 6: write_debug(ptr[6], reg, 6); \ |
| 74 | + /* Fall through */ \ | |
| 50 | 75 | case 5: write_debug(ptr[5], reg, 5); \ |
| 76 | + /* Fall through */ \ | |
| 51 | 77 | case 4: write_debug(ptr[4], reg, 4); \ |
| 78 | + /* Fall through */ \ | |
| 52 | 79 | case 3: write_debug(ptr[3], reg, 3); \ |
| 80 | + /* Fall through */ \ | |
| 53 | 81 | case 2: write_debug(ptr[2], reg, 2); \ |
| 82 | + /* Fall through */ \ | |
| 54 | 83 | case 1: write_debug(ptr[1], reg, 1); \ |
| 84 | + /* Fall through */ \ | |
| 55 | 85 | default: write_debug(ptr[0], reg, 0); \ |
| 56 | 86 | } |
| 57 | 87 | |
| @@ -178,13 +178,18 @@ void vcpu_write_spsr32(struct kvm_vcpu *vcpu, unsigned long v) · 177 unmodified lines | ||
| 178 | 178 | switch (spsr_idx) { |
| 179 | 179 | case KVM_SPSR_SVC: |
| 180 | 180 | write_sysreg_el1(v, SYS_SPSR); |
| 181 | + break; | |
| 181 | 182 | case KVM_SPSR_ABT: |
| 182 | 183 | write_sysreg(v, spsr_abt); |
| 184 | + break; | |
| 183 | 185 | case KVM_SPSR_UND: |
| 184 | 186 | write_sysreg(v, spsr_und); |
| 187 | + break; | |
| 185 | 188 | case KVM_SPSR_IRQ: |
| 186 | 189 | write_sysreg(v, spsr_irq); |
| 190 | + break; | |
| 187 | 191 | case KVM_SPSR_FIQ: |
| 188 | 192 | write_sysreg(v, spsr_fiq); |
| 193 | + break; | |
| 189 | 194 | } |
| 190 | 195 | } |
| @@ -632,7 +632,7 @@ static void reset_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r) · 631 unmodified lines | ||
| 632 | 632 | */ |
| 633 | 633 | val = ((pmcr & ~ARMV8_PMU_PMCR_MASK) |
| 634 | 634 | | (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E); |
| 635 | − __vcpu_sys_reg(vcpu, PMCR_EL0) = val; | |
| 635 | + __vcpu_sys_reg(vcpu, r->reg) = val; | |
| 636 | 636 | } |
| 637 | 637 | |
| 638 | 638 | static bool check_pmu_access_disabled(struct kvm_vcpu *vcpu, u64 flags) |
| @@ -981,13 +981,13 @@ static bool access_pmuserenr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, · 342 unmodified lines | ||
| 981 | 981 | /* Silly macro to expand the DBG{BCR,BVR,WVR,WCR}n_EL1 registers in one go */ |
| 982 | 982 | #define DBG_BCR_BVR_WCR_WVR_EL1(n) \ |
| 983 | 983 | { SYS_DESC(SYS_DBGBVRn_EL1(n)), \ |
| 984 | − trap_bvr, reset_bvr, n, 0, get_bvr, set_bvr }, \ | |
| 984 | + trap_bvr, reset_bvr, 0, 0, get_bvr, set_bvr }, \ | |
| 985 | 985 | { SYS_DESC(SYS_DBGBCRn_EL1(n)), \ |
| 986 | − trap_bcr, reset_bcr, n, 0, get_bcr, set_bcr }, \ | |
| 986 | + trap_bcr, reset_bcr, 0, 0, get_bcr, set_bcr }, \ | |
| 987 | 987 | { SYS_DESC(SYS_DBGWVRn_EL1(n)), \ |
| 988 | − trap_wvr, reset_wvr, n, 0, get_wvr, set_wvr }, \ | |
| 988 | + trap_wvr, reset_wvr, 0, 0, get_wvr, set_wvr }, \ | |
| 989 | 989 | { SYS_DESC(SYS_DBGWCRn_EL1(n)), \ |
| 990 | − trap_wcr, reset_wcr, n, 0, get_wcr, set_wcr } | |
| 990 | + trap_wcr, reset_wcr, 0, 0, get_wcr, set_wcr } | |
| 991 | 991 | |
| 992 | 992 | /* Macro to expand the PMEVCNTRn_EL0 register */ |
| 993 | 993 | #define PMU_PMEVCNTR_EL0(n) \ |
| @@ -1540,7 +1540,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 546 unmodified lines | ||
| 1540 | 1540 | { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, |
| 1541 | 1541 | { SYS_DESC(SYS_CTR_EL0), access_ctr }, |
| 1542 | 1542 | |
| 1543 | − { SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, }, | |
| 1543 | + { SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, PMCR_EL0 }, | |
| 1544 | 1544 | { SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 }, |
| 1545 | 1545 | { SYS_DESC(SYS_PMCNTENCLR_EL0), access_pmcnten, NULL, PMCNTENSET_EL0 }, |
| 1546 | 1546 | { SYS_DESC(SYS_PMOVSCLR_EL0), access_pmovs, NULL, PMOVSSET_EL0 }, |
| @@ -2254,13 +2254,19 @@ static int emulate_sys_reg(struct kvm_vcpu *vcpu, · 707 unmodified lines | ||
| 2254 | 2254 | } |
| 2255 | 2255 | |
| 2256 | 2256 | static void reset_sys_reg_descs(struct kvm_vcpu *vcpu, |
| 2257 | − const struct sys_reg_desc *table, size_t num) | |
| 2257 | + const struct sys_reg_desc *table, size_t num, | |
| 2258 | + unsigned long *bmap) | |
| 2258 | 2259 | { |
| 2259 | 2260 | unsigned long i; |
| 2260 | 2261 | |
| 2261 | 2262 | for (i = 0; i < num; i++) |
| 2262 | − if (table[i].reset) | |
| 2263 | + if (table[i].reset) { | |
| 2264 | + int reg = table[i].reg; | |
| 2265 | + | |
| 2263 | 2266 | table[i].reset(vcpu, &table[i]); |
| 2267 | + if (reg > 0 && reg < NR_SYS_REGS) | |
| 2268 | + set_bit(reg, bmap); | |
| 2269 | + } | |
| 2264 | 2270 | } |
| 2265 | 2271 | |
| 2266 | 2272 | /** |
| @@ -2774,18 +2780,16 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu) · 507 unmodified lines | ||
| 2774 | 2780 | { |
| 2775 | 2781 | size_t num; |
| 2776 | 2782 | const struct sys_reg_desc *table; |
| 2777 | − | |
| 2778 | − /* Catch someone adding a register without putting in reset entry. */ | |
| 2779 | − memset(&vcpu->arch.ctxt.sys_regs, 0x42, sizeof(vcpu->arch.ctxt.sys_regs)); | |
| 2783 | + DECLARE_BITMAP(bmap, NR_SYS_REGS) = { 0, }; | |
| 2780 | 2784 | |
| 2781 | 2785 | /* Generic chip reset first (so target could override). */ |
| 2782 | − reset_sys_reg_descs(vcpu, sys_reg_descs, ARRAY_SIZE(sys_reg_descs)); | |
| 2786 | + reset_sys_reg_descs(vcpu, sys_reg_descs, ARRAY_SIZE(sys_reg_descs), bmap); | |
| 2783 | 2787 | |
| 2784 | 2788 | table = get_target_table(vcpu->arch.target, true, &num); |
| 2785 | − reset_sys_reg_descs(vcpu, table, num); | |
| 2789 | + reset_sys_reg_descs(vcpu, table, num, bmap); | |
| 2786 | 2790 | |
| 2787 | 2791 | for (num = 1; num < NR_SYS_REGS; num++) { |
| 2788 | − if (WARN(__vcpu_sys_reg(vcpu, num) == 0x4242424242424242, | |
| 2792 | + if (WARN(!test_bit(num, bmap), | |
| 2789 | 2793 | "Didn't reset __vcpu_sys_reg(%zi)\n", num)) |
| 2790 | 2794 | break; |
| 2791 | 2795 | } |
| @@ -14,9 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot, |
| 15 | 15 | unsigned long attrs) |
| 16 | 16 | { |
| 17 | − if (!dev_is_dma_coherent(dev) || (attrs & DMA_ATTR_WRITE_COMBINE)) | |
| 18 | − return pgprot_writecombine(prot); | |
| 19 | − return prot; | |
| 17 | + return pgprot_writecombine(prot); | |
| 20 | 18 | } |
| 21 | 19 | |
| 22 | 20 | void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr, |
| @@ -777,6 +777,53 @@ void __init hook_debug_fault_code(int nr, · 776 unmodified lines | ||
| 777 | 777 | debug_fault_info[nr].name = name; |
| 778 | 778 | } |
| 779 | 779 | |
| 780 | +/* | |
| 781 | + * In debug exception context, we explicitly disable preemption despite | |
| 782 | + * having interrupts disabled. | |
| 783 | + * This serves two purposes: it makes it much less likely that we would | |
| 784 | + * accidentally schedule in exception context and it will force a warning | |
| 785 | + * if we somehow manage to schedule by accident. | |
| 786 | + */ | |
| 787 | +static void debug_exception_enter(struct pt_regs *regs) | |
| 788 | +{ | |
| 789 | + /* | |
| 790 | + * Tell lockdep we disabled irqs in entry.S. Do nothing if they were | |
| 791 | + * already disabled to preserve the last enabled/disabled addresses. | |
| 792 | + */ | |
| 793 | + if (interrupts_enabled(regs)) | |
| 794 | + trace_hardirqs_off(); | |
| 795 | + | |
| 796 | + if (user_mode(regs)) { | |
| 797 | + RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU"); | |
| 798 | + } else { | |
| 799 | + /* | |
| 800 | + * We might have interrupted pretty much anything. In | |
| 801 | + * fact, if we're a debug exception, we can even interrupt | |
| 802 | + * NMI processing. We don't want this code makes in_nmi() | |
| 803 | + * to return true, but we need to notify RCU. | |
| 804 | + */ | |
| 805 | + rcu_nmi_enter(); | |
| 806 | + } | |
| 807 | + | |
| 808 | + preempt_disable(); | |
| 809 | + | |
| 810 | + /* This code is a bit fragile. Test it. */ | |
| 811 | + RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work"); | |
| 812 | +} | |
| 813 | +NOKPROBE_SYMBOL(debug_exception_enter); | |
| 814 | + | |
| 815 | +static void debug_exception_exit(struct pt_regs *regs) | |
| 816 | +{ | |
| 817 | + preempt_enable_no_resched(); | |
| 818 | + | |
| 819 | + if (!user_mode(regs)) | |
| 820 | + rcu_nmi_exit(); | |
| 821 | + | |
| 822 | + if (interrupts_enabled(regs)) | |
| 823 | + trace_hardirqs_on(); | |
| 824 | +} | |
| 825 | +NOKPROBE_SYMBOL(debug_exception_exit); | |
| 826 | + | |
| 780 | 827 | #ifdef CONFIG_ARM64_ERRATUM_1463225 |
| 781 | 828 | DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); |
| 782 | 829 | |
| @@ -817,12 +864,7 @@ asmlinkage void __exception do_debug_exception(unsigned long addr_if_watchpoint, · 34 unmodified lines | ||
| 817 | 864 | if (cortex_a76_erratum_1463225_debug_handler(regs)) |
| 818 | 865 | return; |
| 819 | 866 | |
| 820 | − /* | |
| 821 | − * Tell lockdep we disabled irqs in entry.S. Do nothing if they were | |
| 822 | − * already disabled to preserve the last enabled/disabled addresses. | |
| 823 | − */ | |
| 824 | − if (interrupts_enabled(regs)) | |
| 825 | − trace_hardirqs_off(); | |
| 867 | + debug_exception_enter(regs); | |
| 826 | 868 | |
| 827 | 869 | if (user_mode(regs) && !is_ttbr0_addr(pc)) |
| 828 | 870 | arm64_apply_bp_hardening(); |
| @@ -832,7 +874,6 @@ asmlinkage void __exception do_debug_exception(unsigned long addr_if_watchpoint, · 3 unmodified lines | ||
| 832 | 874 | inf->sig, inf->code, (void __user *)pc, esr); |
| 833 | 875 | } |
| 834 | 876 | |
| 835 | − if (interrupts_enabled(regs)) | |
| 836 | − trace_hardirqs_on(); | |
| 877 | + debug_exception_exit(regs); | |
| 837 | 878 | } |
| 838 | 879 | NOKPROBE_SYMBOL(do_debug_exception); |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | 3 | |
| 4 | 4 | #ifndef __ASM_CSKY_BYTEORDER_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | |
| 3 | 3 | #ifndef __ASM_CSKY_CACHECTL_H |
| 4 | 4 | #define __ASM_CSKY_CACHECTL_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | 3 | |
| 4 | 4 | #ifndef _ASM_CSKY_PERF_REGS_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | 3 | |
| 4 | 4 | #ifndef _CSKY_PTRACE_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | 3 | |
| 4 | 4 | #ifndef __ASM_CSKY_SIGCONTEXT_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | 3 | |
| 4 | 4 | #define __ARCH_WANT_SYS_CLONE |
| @@ -398,6 +398,7 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) · 397 unmodified lines | ||
| 398 | 398 | default: |
| 399 | 399 | dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n", |
| 400 | 400 | clock_rate); |
| 401 | + /* fall through */ | |
| 401 | 402 | case 100000000: |
| 402 | 403 | mpll_mul = 0x19; |
| 403 | 404 | if (ref_clk_sel < 2) |
| @@ -46,6 +46,7 @@ static inline uint64_t CVMX_SLI_PCIE_MSI_RCV_FUNC(void) · 45 unmodified lines | ||
| 46 | 46 | case OCTEON_CN78XX & OCTEON_FAMILY_MASK: |
| 47 | 47 | if (OCTEON_IS_MODEL(OCTEON_CN78XX_PASS1_X)) |
| 48 | 48 | return 0x0000000000003CB0ull; |
| 49 | + /* Else, fall through */ | |
| 49 | 50 | default: |
| 50 | 51 | return 0x0000000000023CB0ull; |
| 51 | 52 | } |
| @@ -69,6 +69,8 @@ static int __populate_cache_leaves(unsigned int cpu) · 68 unmodified lines | ||
| 69 | 69 | if (c->tcache.waysize) |
| 70 | 70 | populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED); |
| 71 | 71 | |
| 72 | + this_cpu_ci->cpu_map_populated = true; | |
| 73 | + | |
| 72 | 74 | return 0; |
| 73 | 75 | } |
| 74 | 76 | |
| @@ -32,7 +32,8 @@ void __init setup_pit_timer(void) · 31 unmodified lines | ||
| 32 | 32 | |
| 33 | 33 | static int __init init_pit_clocksource(void) |
| 34 | 34 | { |
| 35 | − if (num_possible_cpus() > 1) /* PIT does not scale! */ | |
| 35 | + if (num_possible_cpus() > 1 || /* PIT does not scale! */ | |
| 36 | + !clockevent_state_periodic(&i8253_clockevent)) | |
| 36 | 37 | return 0; |
| 37 | 38 | |
| 38 | 39 | return clocksource_i8253_init(); |
| @@ -140,6 +140,7 @@ static int kvm_compute_return_epc(struct kvm_vcpu *vcpu, unsigned long instpc, · 139 unmodified lines | ||
| 140 | 140 | /* These are unconditional and in j_format. */ |
| 141 | 141 | case jal_op: |
| 142 | 142 | arch->gprs[31] = instpc + 8; |
| 143 | + /* fall through */ | |
| 143 | 144 | case j_op: |
| 144 | 145 | epc += 4; |
| 145 | 146 | epc >>= 28; |
| @@ -150,16 +150,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 149 unmodified lines | ||
| 150 | 150 | return 0; |
| 151 | 151 | } |
| 152 | 152 | |
| 153 | −bool kvm_arch_has_vcpu_debugfs(void) | |
| 154 | −{ | |
| 155 | − return false; | |
| 156 | −} | |
| 157 | − | |
| 158 | −int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) | |
| 159 | −{ | |
| 160 | − return 0; | |
| 161 | −} | |
| 162 | − | |
| 163 | 153 | void kvm_mips_free_vcpus(struct kvm *kvm) |
| 164 | 154 | { |
| 165 | 155 | unsigned int i; |
| @@ -172,12 +172,15 @@ static void mipsxx_cpu_setup(void *args) · 171 unmodified lines | ||
| 172 | 172 | case 4: |
| 173 | 173 | w_c0_perfctrl3(0); |
| 174 | 174 | w_c0_perfcntr3(reg.counter[3]); |
| 175 | + /* fall through */ | |
| 175 | 176 | case 3: |
| 176 | 177 | w_c0_perfctrl2(0); |
| 177 | 178 | w_c0_perfcntr2(reg.counter[2]); |
| 179 | + /* fall through */ | |
| 178 | 180 | case 2: |
| 179 | 181 | w_c0_perfctrl1(0); |
| 180 | 182 | w_c0_perfcntr1(reg.counter[1]); |
| 183 | + /* fall through */ | |
| 181 | 184 | case 1: |
| 182 | 185 | w_c0_perfctrl0(0); |
| 183 | 186 | w_c0_perfcntr0(reg.counter[0]); |
| @@ -195,10 +198,13 @@ static void mipsxx_cpu_start(void *args) · 11 unmodified lines | ||
| 195 | 198 | switch (counters) { |
| 196 | 199 | case 4: |
| 197 | 200 | w_c0_perfctrl3(WHAT | reg.control[3]); |
| 201 | + /* fall through */ | |
| 198 | 202 | case 3: |
| 199 | 203 | w_c0_perfctrl2(WHAT | reg.control[2]); |
| 204 | + /* fall through */ | |
| 200 | 205 | case 2: |
| 201 | 206 | w_c0_perfctrl1(WHAT | reg.control[1]); |
| 207 | + /* fall through */ | |
| 202 | 208 | case 1: |
| 203 | 209 | w_c0_perfctrl0(WHAT | reg.control[0]); |
| 204 | 210 | } |
| @@ -215,10 +221,13 @@ static void mipsxx_cpu_stop(void *args) · 10 unmodified lines | ||
| 215 | 221 | switch (counters) { |
| 216 | 222 | case 4: |
| 217 | 223 | w_c0_perfctrl3(0); |
| 224 | + /* fall through */ | |
| 218 | 225 | case 3: |
| 219 | 226 | w_c0_perfctrl2(0); |
| 227 | + /* fall through */ | |
| 220 | 228 | case 2: |
| 221 | 229 | w_c0_perfctrl1(0); |
| 230 | + /* fall through */ | |
| 222 | 231 | case 1: |
| 223 | 232 | w_c0_perfctrl0(0); |
| 224 | 233 | } |
| @@ -236,6 +245,7 @@ static int mipsxx_perfcount_handler(void) · 11 unmodified lines | ||
| 236 | 245 | |
| 237 | 246 | switch (counters) { |
| 238 | 247 | #define HANDLE_COUNTER(n) \ |
| 248 | + /* fall through */ \ | |
| 239 | 249 | case n + 1: \ |
| 240 | 250 | control = r_c0_perfctrl ## n(); \ |
| 241 | 251 | counter = r_c0_perfcntr ## n(); \ |
| @@ -297,12 +307,15 @@ static void reset_counters(void *arg) · 55 unmodified lines | ||
| 297 | 307 | case 4: |
| 298 | 308 | w_c0_perfctrl3(0); |
| 299 | 309 | w_c0_perfcntr3(0); |
| 310 | + /* fall through */ | |
| 300 | 311 | case 3: |
| 301 | 312 | w_c0_perfctrl2(0); |
| 302 | 313 | w_c0_perfcntr2(0); |
| 314 | + /* fall through */ | |
| 303 | 315 | case 2: |
| 304 | 316 | w_c0_perfctrl1(0); |
| 305 | 317 | w_c0_perfcntr1(0); |
| 318 | + /* fall through */ | |
| 306 | 319 | case 1: |
| 307 | 320 | w_c0_perfctrl0(0); |
| 308 | 321 | w_c0_perfcntr0(0); |
| @@ -474,6 +474,7 @@ static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn) · 473 unmodified lines | ||
| 474 | 474 | if (PCI_SLOT(devfn) == 0) |
| 475 | 475 | return bcm_pcie_readl(PCIE_DLSTATUS_REG) |
| 476 | 476 | & DLSTATUS_PHYLINKUP; |
| 477 | + /* else, fall through */ | |
| 477 | 478 | default: |
| 478 | 479 | return false; |
| 479 | 480 | } |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | #if _MIPS_SIM != _MIPS_SIM_ABI64 && defined(CONFIG_64BIT) |
| 10 | 10 | |
| 11 | 11 | /* Building 32-bit VDSO for the 64-bit kernel. Fake a 32-bit Kconfig. */ |
| 12 | +#define BUILD_VDSO32_64 | |
| 12 | 13 | #undef CONFIG_64BIT |
| 13 | 14 | #define CONFIG_32BIT 1 |
| 14 | 15 | #ifndef __ASSEMBLY__ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #ifndef __ASM_AUXVEC_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #ifndef __NDS32_BYTEORDER_H__ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 1994, 1995, 1996 by Ralf Baechle |
| 3 | 3 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 4 | 4 | #ifndef _ASM_CACHECTL |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | /* Copyright (C) 2005-2019 Andes Technology Corporation */ |
| 3 | 3 | #ifndef _FP_UDF_IEX_CRTL_H |
| 4 | 4 | #define _FP_UDF_IEX_CRTL_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #ifndef __ASM_NDS32_PARAM_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #ifndef __UAPI_ASM_NDS32_PTRACE_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #ifndef _ASMNDS32_SIGCONTEXT_H |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | // Copyright (C) 2005-2017 Andes Technology Corporation |
| 3 | 3 | |
| 4 | 4 | #define __ARCH_WANT_STAT64 |
| @@ -316,6 +316,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) · 315 unmodified lines | ||
| 316 | 316 | regs->uregs[0] = -EINTR; |
| 317 | 317 | break; |
| 318 | 318 | } |
| 319 | + /* Else, fall through */ | |
| 319 | 320 | case -ERESTARTNOINTR: |
| 320 | 321 | regs->uregs[0] = regs->orig_r0; |
| 321 | 322 | regs->ipc -= 4; |
| @@ -360,6 +361,7 @@ static void do_signal(struct pt_regs *regs) · 38 unmodified lines | ||
| 360 | 361 | switch (regs->uregs[0]) { |
| 361 | 362 | case -ERESTART_RESTARTBLOCK: |
| 362 | 363 | regs->uregs[15] = __NR_restart_syscall; |
| 364 | + /* Fall through */ | |
| 363 | 365 | case -ERESTARTNOHAND: |
| 364 | 366 | case -ERESTARTSYS: |
| 365 | 367 | case -ERESTARTNOINTR: |
| @@ -19,8 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | KBUILD_IMAGE := vmlinuz |
| 21 | 21 | |
| 22 | −KBUILD_DEFCONFIG := default_defconfig | |
| 23 | − | |
| 24 | 22 | NM = sh $(srctree)/arch/parisc/nm |
| 25 | 23 | CHECKFLAGS += -D__hppa__=1 |
| 26 | 24 | LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) |
| @@ -182,5 +180,8 @@ define archhelp · 155 unmodified lines | ||
| 182 | 180 | @echo ' zinstall - Install compressed vmlinuz kernel' |
| 183 | 181 | endef |
| 184 | 182 | |
| 183 | +archclean: | |
| 184 | + $(Q)$(MAKE) $(clean)=$(boot) | |
| 185 | + | |
| 185 | 186 | archheaders: |
| 186 | 187 | $(Q)$(MAKE) $(build)=arch/parisc/kernel/syscalls all |
| @@ -12,6 +12,7 @@ UBSAN_SANITIZE := n · 11 unmodified lines | ||
| 12 | 12 | targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 |
| 13 | 13 | targets += vmlinux.bin.xz vmlinux.bin.lzma vmlinux.bin.lzo vmlinux.bin.lz4 |
| 14 | 14 | targets += misc.o piggy.o sizes.h head.o real2.o firmware.o |
| 15 | +targets += real2.S firmware.c | |
| 15 | 16 | |
| 16 | 17 | KBUILD_CFLAGS := -D__KERNEL__ -O2 -DBOOTLOADER |
| 17 | 18 | KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING |
| @@ -55,7 +56,8 @@ $(obj)/misc.o: $(obj)/sizes.h · 37 unmodified lines | ||
| 55 | 56 | CPPFLAGS_vmlinux.lds += -I$(objtree)/$(obj) -DBOOTLOADER |
| 56 | 57 | $(obj)/vmlinux.lds: $(obj)/sizes.h |
| 57 | 58 | |
| 58 | −$(obj)/vmlinux.bin: vmlinux | |
| 59 | +OBJCOPYFLAGS_vmlinux.bin := -R .comment -R .note -S | |
| 60 | +$(obj)/vmlinux.bin: vmlinux FORCE | |
| 59 | 61 | $(call if_changed,objcopy) |
| 60 | 62 | |
| 61 | 63 | vmlinux.bin.all-y := $(obj)/vmlinux.bin |
| @@ -48,8 +48,8 @@ SECTIONS · 47 unmodified lines | ||
| 48 | 48 | *(.rodata.compressed) |
| 49 | 49 | } |
| 50 | 50 | |
| 51 | − /* bootloader code and data starts behind area of extracted kernel */ | |
| 52 | − . = (SZ_end - SZparisc_kernel_start + KERNEL_BINARY_TEXT_START); | |
| 51 | + /* bootloader code and data starts at least behind area of extracted kernel */ | |
| 52 | + . = MAX(ABSOLUTE(.), (SZ_end - SZparisc_kernel_start + KERNEL_BINARY_TEXT_START)); | |
| 53 | 53 | |
| 54 | 54 | /* align on next page boundary */ |
| 55 | 55 | . = ALIGN(4096); |
File renamed without changes.
| @@ -50,6 +50,10 @@ struct kprobe_ctlblk { · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | int __kprobes parisc_kprobe_break_handler(struct pt_regs *regs); |
| 52 | 52 | int __kprobes parisc_kprobe_ss_handler(struct pt_regs *regs); |
| 53 | +static inline int kprobe_fault_handler(struct pt_regs *regs, int trapnr) | |
| 54 | +{ | |
| 55 | + return 0; | |
| 56 | +} | |
| 53 | 57 | |
| 54 | 58 | #endif /* CONFIG_KPROBES */ |
| 55 | 59 | #endif /* _PARISC_KPROBES_H */ |
| @@ -2,6 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | #ifndef _PARISC_PGTABLE_H |
| 3 | 3 | #define _PARISC_PGTABLE_H |
| 4 | 4 | |
| 5 | +#include <asm/page.h> | |
| 5 | 6 | #include <asm-generic/4level-fixup.h> |
| 6 | 7 | |
| 7 | 8 | #include <asm/fixmap.h> |
| @@ -98,8 +99,6 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr) · 90 unmodified lines | ||
| 98 | 99 | |
| 99 | 100 | #endif /* !__ASSEMBLY__ */ |
| 100 | 101 | |
| 101 | −#include <asm/page.h> | |
| 102 | − | |
| 103 | 102 | #define pte_ERROR(e) \ |
| 104 | 103 | printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e)) |
| 105 | 104 | #define pmd_ERROR(e) \ |
| @@ -181,8 +181,9 @@ int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec, · 180 unmodified lines | ||
| 181 | 181 | for (i = 0; i < ARRAY_SIZE(insn); i++) |
| 182 | 182 | insn[i] = INSN_NOP; |
| 183 | 183 | |
| 184 | + __patch_text((void *)rec->ip, INSN_NOP); | |
| 184 | 185 | __patch_text_multiple((void *)rec->ip + 4 - sizeof(insn), |
| 185 | − insn, sizeof(insn)); | |
| 186 | + insn, sizeof(insn)-4); | |
| 186 | 187 | return 0; |
| 187 | 188 | } |
| 188 | 189 | #endif |
| @@ -63,7 +63,7 @@ ENTRY_CFI(flush_tlb_all_local) · 62 unmodified lines | ||
| 63 | 63 | |
| 64 | 64 | /* Flush Instruction Tlb */ |
| 65 | 65 | |
| 66 | − LDREG ITLB_SID_BASE(%r1), %r20 | |
| 66 | +88: LDREG ITLB_SID_BASE(%r1), %r20 | |
| 67 | 67 | LDREG ITLB_SID_STRIDE(%r1), %r21 |
| 68 | 68 | LDREG ITLB_SID_COUNT(%r1), %r22 |
| 69 | 69 | LDREG ITLB_OFF_BASE(%r1), %arg0 |
| @@ -103,6 +103,7 @@ fitonemiddle: /* Loop if LOOP = 1 */ · 33 unmodified lines | ||
| 103 | 103 | add %r21, %r20, %r20 /* increment space */ |
| 104 | 104 | |
| 105 | 105 | fitdone: |
| 106 | + ALTERNATIVE(88b, fitdone, ALT_COND_NO_SPLIT_TLB, INSN_NOP) | |
| 106 | 107 | |
| 107 | 108 | /* Flush Data Tlb */ |
| 108 | 109 | |
| @@ -18,3 +18,4 @@ obj-y := frnd.o driver.o decode_exc.o fpudispatch.o denormal.o \ · 17 unmodified lines | ||
| 18 | 18 | # other very old or stripped-down PA-RISC CPUs -- not currently supported |
| 19 | 19 | |
| 20 | 20 | obj-$(CONFIG_MATH_EMULATION) += unimplemented-math-emulation.o |
| 21 | +CFLAGS_REMOVE_fpudispatch.o = -Wimplicit-fallthrough | |
| @@ -66,6 +66,7 @@ parisc_acctyp(unsigned long code, unsigned int inst) · 65 unmodified lines | ||
| 66 | 66 | case 0x30000000: /* coproc2 */ |
| 67 | 67 | if (bit22set(inst)) |
| 68 | 68 | return VM_WRITE; |
| 69 | + /* fall through */ | |
| 69 | 70 | |
| 70 | 71 | case 0x0: /* indexed/memory management */ |
| 71 | 72 | if (bit22set(inst)) { |
| @@ -107,22 +107,22 @@ extern void _set_L3CR(unsigned long); · 106 unmodified lines | ||
| 107 | 107 | |
| 108 | 108 | static inline void dcbz(void *addr) |
| 109 | 109 | { |
| 110 | − __asm__ __volatile__ ("dcbz %y0" : : "Z"(*(u8 *)addr) : "memory"); | |
| 110 | + __asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory"); | |
| 111 | 111 | } |
| 112 | 112 | |
| 113 | 113 | static inline void dcbi(void *addr) |
| 114 | 114 | { |
| 115 | − __asm__ __volatile__ ("dcbi %y0" : : "Z"(*(u8 *)addr) : "memory"); | |
| 115 | + __asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory"); | |
| 116 | 116 | } |
| 117 | 117 | |
| 118 | 118 | static inline void dcbf(void *addr) |
| 119 | 119 | { |
| 120 | − __asm__ __volatile__ ("dcbf %y0" : : "Z"(*(u8 *)addr) : "memory"); | |
| 120 | + __asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory"); | |
| 121 | 121 | } |
| 122 | 122 | |
| 123 | 123 | static inline void dcbst(void *addr) |
| 124 | 124 | { |
| 125 | − __asm__ __volatile__ ("dcbst %y0" : : "Z"(*(u8 *)addr) : "memory"); | |
| 125 | + __asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory"); | |
| 126 | 126 | } |
| 127 | 127 | #endif /* !__ASSEMBLY__ */ |
| 128 | 128 | #endif /* __KERNEL__ */ |
| @@ -302,9 +302,14 @@ · 301 unmodified lines | ||
| 302 | 302 | #define H_SCM_UNBIND_MEM 0x3F0 |
| 303 | 303 | #define H_SCM_QUERY_BLOCK_MEM_BINDING 0x3F4 |
| 304 | 304 | #define H_SCM_QUERY_LOGICAL_MEM_BINDING 0x3F8 |
| 305 | −#define H_SCM_MEM_QUERY 0x3FC | |
| 306 | −#define H_SCM_BLOCK_CLEAR 0x400 | |
| 307 | −#define MAX_HCALL_OPCODE H_SCM_BLOCK_CLEAR | |
| 305 | +#define H_SCM_UNBIND_ALL 0x3FC | |
| 306 | +#define H_SCM_HEALTH 0x400 | |
| 307 | +#define H_SCM_PERFORMANCE_STATS 0x418 | |
| 308 | +#define MAX_HCALL_OPCODE H_SCM_PERFORMANCE_STATS | |
| 309 | + | |
| 310 | +/* Scope args for H_SCM_UNBIND_ALL */ | |
| 311 | +#define H_UNBIND_SCOPE_ALL (0x1) | |
| 312 | +#define H_UNBIND_SCOPE_DRC (0x2) | |
| 308 | 313 | |
| 309 | 314 | /* H_VIOCTL functions */ |
| 310 | 315 | #define H_GET_VIOA_DUMP_SIZE 0x01 |
| @@ -27,11 +27,10 @@ static inline void ppc_set_pmu_inuse(int inuse) · 26 unmodified lines | ||
| 27 | 27 | #ifdef CONFIG_PPC_PSERIES |
| 28 | 28 | get_lppaca()->pmcregs_in_use = inuse; |
| 29 | 29 | #endif |
| 30 | − } else { | |
| 30 | + } | |
| 31 | 31 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 32 | − get_paca()->pmcregs_in_use = inuse; | |
| 32 | + get_paca()->pmcregs_in_use = inuse; | |
| 33 | 33 | #endif |
| 34 | − } | |
| 35 | 34 | #endif |
| 36 | 35 | } |
| 37 | 36 | |
| @@ -49,6 +49,7 @@ · 48 unmodified lines | ||
| 49 | 49 | #define __ARCH_WANT_SYS_FORK |
| 50 | 50 | #define __ARCH_WANT_SYS_VFORK |
| 51 | 51 | #define __ARCH_WANT_SYS_CLONE |
| 52 | +#define __ARCH_WANT_SYS_CLONE3 | |
| 52 | 53 | |
| 53 | 54 | #endif /* __ASSEMBLY__ */ |
| 54 | 55 | #endif /* _ASM_POWERPC_UNISTD_H_ */ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 3 | 3 | #define _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 4 | 4 | |
| @@ -31,7 +31,7 @@ · 30 unmodified lines | ||
| 31 | 31 | * Struct fields are always 32 or 64 bit aligned, depending on them being 32 |
| 32 | 32 | * or 64 bit wide respectively. |
| 33 | 33 | * |
| 34 | − * See Documentation/virtual/kvm/ppc-pv.txt | |
| 34 | + * See Documentation/virt/kvm/ppc-pv.txt | |
| 35 | 35 | */ |
| 36 | 36 | struct kvm_vcpu_arch_shared { |
| 37 | 37 | __u64 scratch1; |
| @@ -176,9 +176,11 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg, · 175 unmodified lines | ||
| 176 | 176 | ret |= __get_user_inatomic(temp.v[1], p++); |
| 177 | 177 | ret |= __get_user_inatomic(temp.v[2], p++); |
| 178 | 178 | ret |= __get_user_inatomic(temp.v[3], p++); |
| 179 | + /* fall through */ | |
| 179 | 180 | case 4: |
| 180 | 181 | ret |= __get_user_inatomic(temp.v[4], p++); |
| 181 | 182 | ret |= __get_user_inatomic(temp.v[5], p++); |
| 183 | + /* fall through */ | |
| 182 | 184 | case 2: |
| 183 | 185 | ret |= __get_user_inatomic(temp.v[6], p++); |
| 184 | 186 | ret |= __get_user_inatomic(temp.v[7], p++); |
| @@ -259,9 +261,11 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg, · 74 unmodified lines | ||
| 259 | 261 | ret |= __put_user_inatomic(data.v[1], p++); |
| 260 | 262 | ret |= __put_user_inatomic(data.v[2], p++); |
| 261 | 263 | ret |= __put_user_inatomic(data.v[3], p++); |
| 264 | + /* fall through */ | |
| 262 | 265 | case 4: |
| 263 | 266 | ret |= __put_user_inatomic(data.v[4], p++); |
| 264 | 267 | ret |= __put_user_inatomic(data.v[5], p++); |
| 268 | + /* fall through */ | |
| 265 | 269 | case 2: |
| 266 | 270 | ret |= __put_user_inatomic(data.v[6], p++); |
| 267 | 271 | ret |= __put_user_inatomic(data.v[7], p++); |
| @@ -597,6 +597,14 @@ ppc_clone: · 596 unmodified lines | ||
| 597 | 597 | stw r0,_TRAP(r1) /* register set saved */ |
| 598 | 598 | b sys_clone |
| 599 | 599 | |
| 600 | + .globl ppc_clone3 | |
| 601 | +ppc_clone3: | |
| 602 | + SAVE_NVGPRS(r1) | |
| 603 | + lwz r0,_TRAP(r1) | |
| 604 | + rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */ | |
| 605 | + stw r0,_TRAP(r1) /* register set saved */ | |
| 606 | + b sys_clone3 | |
| 607 | + | |
| 600 | 608 | .globl ppc_swapcontext |
| 601 | 609 | ppc_swapcontext: |
| 602 | 610 | SAVE_NVGPRS(r1) |
| @@ -487,6 +487,11 @@ _GLOBAL(ppc_clone) · 486 unmodified lines | ||
| 487 | 487 | bl sys_clone |
| 488 | 488 | b .Lsyscall_exit |
| 489 | 489 | |
| 490 | +_GLOBAL(ppc_clone3) | |
| 491 | + bl save_nvgprs | |
| 492 | + bl sys_clone3 | |
| 493 | + b .Lsyscall_exit | |
| 494 | + | |
| 490 | 495 | _GLOBAL(ppc32_swapcontext) |
| 491 | 496 | bl save_nvgprs |
| 492 | 497 | bl compat_sys_swapcontext |
| @@ -1531,7 +1531,7 @@ EXC_COMMON(trap_0b_common, 0xb00, unknown_exception) · 1530 unmodified lines | ||
| 1531 | 1531 | * |
| 1532 | 1532 | * Call convention: |
| 1533 | 1533 | * |
| 1534 | − * syscall register convention is in Documentation/powerpc/syscall64-abi.txt | |
| 1534 | + * syscall register convention is in Documentation/powerpc/syscall64-abi.rst | |
| 1535 | 1535 | * |
| 1536 | 1536 | * For hypercalls, the register convention is as follows: |
| 1537 | 1537 | * r0 volatile |
| @@ -1198,6 +1198,9 @@ SYSCALL_DEFINE0(rt_sigreturn) · 1197 unmodified lines | ||
| 1198 | 1198 | goto bad; |
| 1199 | 1199 | |
| 1200 | 1200 | if (MSR_TM_ACTIVE(msr_hi<<32)) { |
| 1201 | + /* Trying to start TM on non TM system */ | |
| 1202 | + if (!cpu_has_feature(CPU_FTR_TM)) | |
| 1203 | + goto bad; | |
| 1201 | 1204 | /* We only recheckpoint on return if we're |
| 1202 | 1205 | * transaction. |
| 1203 | 1206 | */ |
| @@ -771,6 +771,11 @@ SYSCALL_DEFINE0(rt_sigreturn) · 770 unmodified lines | ||
| 771 | 771 | if (MSR_TM_ACTIVE(msr)) { |
| 772 | 772 | /* We recheckpoint on return. */ |
| 773 | 773 | struct ucontext __user *uc_transact; |
| 774 | + | |
| 775 | + /* Trying to start TM on non TM system */ | |
| 776 | + if (!cpu_has_feature(CPU_FTR_TM)) | |
| 777 | + goto badframe; | |
| 778 | + | |
| 774 | 779 | if (__get_user(uc_transact, &uc->uc_link)) |
| 775 | 780 | goto badframe; |
| 776 | 781 | if (restore_tm_sigcontexts(current, &uc->uc_mcontext, |
| @@ -516,4 +516,4 @@ · 515 unmodified lines | ||
| 516 | 516 | 432 common fsmount sys_fsmount |
| 517 | 517 | 433 common fspick sys_fspick |
| 518 | 518 | 434 common pidfd_open sys_pidfd_open |
| 519 | −# 435 reserved for clone3 | |
| 519 | +435 nospu clone3 ppc_clone3 | |
| @@ -239,6 +239,7 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr, · 238 unmodified lines | ||
| 239 | 239 | case 2: |
| 240 | 240 | case 6: |
| 241 | 241 | pte->may_write = true; |
| 242 | + /* fall through */ | |
| 242 | 243 | case 3: |
| 243 | 244 | case 5: |
| 244 | 245 | case 7: |
| @@ -660,8 +660,10 @@ long kvmppc_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 659 unmodified lines | ||
| 660 | 660 | } |
| 661 | 661 | tce = be64_to_cpu(tce); |
| 662 | 662 | |
| 663 | − if (kvmppc_tce_to_ua(vcpu->kvm, tce, &ua)) | |
| 664 | − return H_PARAMETER; | |
| 663 | + if (kvmppc_tce_to_ua(vcpu->kvm, tce, &ua)) { | |
| 664 | + ret = H_PARAMETER; | |
| 665 | + goto unlock_exit; | |
| 666 | + } | |
| 665 | 667 | |
| 666 | 668 | list_for_each_entry_lockless(stit, &stt->iommu_tables, next) { |
| 667 | 669 | ret = kvmppc_tce_iommu_map(vcpu->kvm, stt, |
| @@ -556,8 +556,10 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 555 unmodified lines | ||
| 556 | 556 | unsigned long tce = be64_to_cpu(((u64 *)tces)[i]); |
| 557 | 557 | |
| 558 | 558 | ua = 0; |
| 559 | − if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua, NULL)) | |
| 560 | − return H_PARAMETER; | |
| 559 | + if (kvmppc_rm_tce_to_ua(vcpu->kvm, tce, &ua, NULL)) { | |
| 560 | + ret = H_PARAMETER; | |
| 561 | + goto unlock_exit; | |
| 562 | + } | |
| 561 | 563 | |
| 562 | 564 | list_for_each_entry_lockless(stit, &stt->iommu_tables, next) { |
| 563 | 565 | ret = kvmppc_rm_tce_iommu_map(vcpu->kvm, stt, |
| @@ -3569,9 +3569,18 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, · 3568 unmodified lines | ||
| 3569 | 3569 | mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); |
| 3570 | 3570 | |
| 3571 | 3571 | if (kvmhv_on_pseries()) { |
| 3572 | + /* | |
| 3573 | + * We need to save and restore the guest visible part of the | |
| 3574 | + * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor | |
| 3575 | + * doesn't do this for us. Note only required if pseries since | |
| 3576 | + * this is done in kvmhv_load_hv_regs_and_go() below otherwise. | |
| 3577 | + */ | |
| 3578 | + unsigned long host_psscr; | |
| 3572 | 3579 | /* call our hypervisor to load up HV regs and go */ |
| 3573 | 3580 | struct hv_guest_state hvregs; |
| 3574 | 3581 | |
| 3582 | + host_psscr = mfspr(SPRN_PSSCR_PR); | |
| 3583 | + mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); | |
| 3575 | 3584 | kvmhv_save_hv_regs(vcpu, &hvregs); |
| 3576 | 3585 | hvregs.lpcr = lpcr; |
| 3577 | 3586 | vcpu->arch.regs.msr = vcpu->arch.shregs.msr; |
| @@ -3590,6 +3599,8 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, · 12 unmodified lines | ||
| 3590 | 3599 | vcpu->arch.shregs.msr = vcpu->arch.regs.msr; |
| 3591 | 3600 | vcpu->arch.shregs.dar = mfspr(SPRN_DAR); |
| 3592 | 3601 | vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); |
| 3602 | + vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); | |
| 3603 | + mtspr(SPRN_PSSCR_PR, host_psscr); | |
| 3593 | 3604 | |
| 3594 | 3605 | /* H_CEDE has to be handled now, not later */ |
| 3595 | 3606 | if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && |
| @@ -3654,6 +3665,8 @@ int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, · 58 unmodified lines | ||
| 3654 | 3665 | vcpu->arch.vpa.dirty = 1; |
| 3655 | 3666 | save_pmu = lp->pmcregs_in_use; |
| 3656 | 3667 | } |
| 3668 | + /* Must save pmu if this guest is capable of running nested guests */ | |
| 3669 | + save_pmu |= nesting_enabled(vcpu->kvm); | |
| 3657 | 3670 | |
| 3658 | 3671 | kvmhv_save_guest_pmu(vcpu, save_pmu); |
| 3659 | 3672 | |
| @@ -1986,10 +1986,8 @@ static int kvmppc_xive_create(struct kvm_device *dev, u32 type) · 1985 unmodified lines | ||
| 1986 | 1986 | |
| 1987 | 1987 | xive->single_escalation = xive_native_has_single_escalation(); |
| 1988 | 1988 | |
| 1989 | − if (ret) { | |
| 1990 | − kfree(xive); | |
| 1989 | + if (ret) | |
| 1991 | 1990 | return ret; |
| 1992 | − } | |
| 1993 | 1991 | |
| 1994 | 1992 | return 0; |
| 1995 | 1993 | } |
| @@ -1090,9 +1090,9 @@ static int kvmppc_xive_native_create(struct kvm_device *dev, u32 type) · 1089 unmodified lines | ||
| 1090 | 1090 | xive->ops = &kvmppc_xive_native_ops; |
| 1091 | 1091 | |
| 1092 | 1092 | if (ret) |
| 1093 | − kfree(xive); | |
| 1093 | + return ret; | |
| 1094 | 1094 | |
| 1095 | − return ret; | |
| 1095 | + return 0; | |
| 1096 | 1096 | } |
| 1097 | 1097 | |
| 1098 | 1098 | /* |
| @@ -50,6 +50,11 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) · 49 unmodified lines | ||
| 50 | 50 | return !!(v->arch.pending_exceptions) || kvm_request_pending(v); |
| 51 | 51 | } |
| 52 | 52 | |
| 53 | +bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu) | |
| 54 | +{ | |
| 55 | + return kvm_arch_vcpu_runnable(vcpu); | |
| 56 | +} | |
| 57 | + | |
| 53 | 58 | bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) |
| 54 | 59 | { |
| 55 | 60 | return false; |
| @@ -452,16 +457,6 @@ err_out: · 396 unmodified lines | ||
| 452 | 457 | return -EINVAL; |
| 453 | 458 | } |
| 454 | 459 | |
| 455 | −bool kvm_arch_has_vcpu_debugfs(void) | |
| 456 | −{ | |
| 457 | − return false; | |
| 458 | −} | |
| 459 | − | |
| 460 | −int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) | |
| 461 | −{ | |
| 462 | − return 0; | |
| 463 | −} | |
| 464 | − | |
| 465 | 460 | void kvm_arch_destroy_vm(struct kvm *kvm) |
| 466 | 461 | { |
| 467 | 462 | unsigned int i; |
| @@ -1899,11 +1899,20 @@ void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base, · 1898 unmodified lines | ||
| 1899 | 1899 | * |
| 1900 | 1900 | * For guests on platforms before POWER9, we clamp the it limit to 1G |
| 1901 | 1901 | * to avoid some funky things such as RTAS bugs etc... |
| 1902 | + * | |
| 1903 | + * On POWER9 we limit to 1TB in case the host erroneously told us that | |
| 1904 | + * the RMA was >1TB. Effective address bits 0:23 are treated as zero | |
| 1905 | + * (meaning the access is aliased to zero i.e. addr = addr % 1TB) | |
| 1906 | + * for virtual real mode addressing and so it doesn't make sense to | |
| 1907 | + * have an area larger than 1TB as it can't be addressed. | |
| 1902 | 1908 | */ |
| 1903 | 1909 | if (!early_cpu_has_feature(CPU_FTR_HVMODE)) { |
| 1904 | 1910 | ppc64_rma_size = first_memblock_size; |
| 1905 | 1911 | if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) |
| 1906 | 1912 | ppc64_rma_size = min_t(u64, ppc64_rma_size, 0x40000000); |
| 1913 | + else | |
| 1914 | + ppc64_rma_size = min_t(u64, ppc64_rma_size, | |
| 1915 | + 1UL << SID_SHIFT_1T); | |
| 1907 | 1916 | |
| 1908 | 1917 | /* Finally limit subsequent allocations */ |
| 1909 | 1918 | memblock_set_current_limit(ppc64_rma_size); |
| @@ -21,7 +21,7 @@ static void kasan_populate_pte(pte_t *ptep, pgprot_t prot) · 20 unmodified lines | ||
| 21 | 21 | __set_pte_at(&init_mm, va, ptep, pfn_pte(PHYS_PFN(pa), prot), 0); |
| 22 | 22 | } |
| 23 | 23 | |
| 24 | −static int kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end) | |
| 24 | +static int __ref kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end) | |
| 25 | 25 | { |
| 26 | 26 | pmd_t *pmd; |
| 27 | 27 | unsigned long k_cur, k_next; |
| @@ -35,7 +35,10 @@ static int kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_ · 7 unmodified lines | ||
| 35 | 35 | if ((void *)pmd_page_vaddr(*pmd) != kasan_early_shadow_pte) |
| 36 | 36 | continue; |
| 37 | 37 | |
| 38 | − new = pte_alloc_one_kernel(&init_mm); | |
| 38 | + if (slab_is_available()) | |
| 39 | + new = pte_alloc_one_kernel(&init_mm); | |
| 40 | + else | |
| 41 | + new = memblock_alloc(PTE_FRAG_SIZE, PTE_FRAG_SIZE); | |
| 39 | 42 | |
| 40 | 43 | if (!new) |
| 41 | 44 | return -ENOMEM; |
| @@ -239,7 +239,7 @@ void __init paging_init(void) · 238 unmodified lines | ||
| 239 | 239 | |
| 240 | 240 | #ifdef CONFIG_ZONE_DMA |
| 241 | 241 | max_zone_pfns[ZONE_DMA] = min(max_low_pfn, |
| 242 | − ((1UL << ARCH_ZONE_DMA_BITS) - 1) >> PAGE_SHIFT); | |
| 242 | + 1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT)); | |
| 243 | 243 | #endif |
| 244 | 244 | max_zone_pfns[ZONE_NORMAL] = max_low_pfn; |
| 245 | 245 | #ifdef CONFIG_HIGHMEM |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <linux/sched.h> |
| 12 | 12 | #include <linux/libnvdimm.h> |
| 13 | 13 | #include <linux/platform_device.h> |
| 14 | +#include <linux/delay.h> | |
| 14 | 15 | |
| 15 | 16 | #include <asm/plpar_wrappers.h> |
| 16 | 17 | |
| @@ -43,8 +44,9 @@ struct papr_scm_priv { · 26 unmodified lines | ||
| 43 | 44 | static int drc_pmem_bind(struct papr_scm_priv *p) |
| 44 | 45 | { |
| 45 | 46 | unsigned long ret[PLPAR_HCALL_BUFSIZE]; |
| 46 | − uint64_t rc, token; | |
| 47 | 47 | uint64_t saved = 0; |
| 48 | + uint64_t token; | |
| 49 | + int64_t rc; | |
| 48 | 50 | |
| 49 | 51 | /* |
| 50 | 52 | * When the hypervisor cannot map all the requested memory in a single |
| @@ -64,6 +66,10 @@ static int drc_pmem_bind(struct papr_scm_priv *p) · 13 unmodified lines | ||
| 64 | 66 | } while (rc == H_BUSY); |
| 65 | 67 | |
| 66 | 68 | if (rc) { |
| 69 | + /* H_OVERLAP needs a separate error path */ | |
| 70 | + if (rc == H_OVERLAP) | |
| 71 | + return -EBUSY; | |
| 72 | + | |
| 67 | 73 | dev_err(&p->pdev->dev, "bind err: %lld\n", rc); |
| 68 | 74 | return -ENXIO; |
| 69 | 75 | } |
| @@ -78,22 +84,36 @@ static int drc_pmem_bind(struct papr_scm_priv *p) · 8 unmodified lines | ||
| 78 | 84 | static int drc_pmem_unbind(struct papr_scm_priv *p) |
| 79 | 85 | { |
| 80 | 86 | unsigned long ret[PLPAR_HCALL_BUFSIZE]; |
| 81 | − uint64_t rc, token; | |
| 87 | + uint64_t token = 0; | |
| 88 | + int64_t rc; | |
| 82 | 89 | |
| 83 | − token = 0; | |
| 90 | + dev_dbg(&p->pdev->dev, "unbind drc %x\n", p->drc_index); | |
| 84 | 91 | |
| 85 | − /* NB: unbind has the same retry requirements mentioned above */ | |
| 92 | + /* NB: unbind has the same retry requirements as drc_pmem_bind() */ | |
| 86 | 93 | do { |
| 87 | − rc = plpar_hcall(H_SCM_UNBIND_MEM, ret, p->drc_index, | |
| 88 | − p->bound_addr, p->blocks, token); | |
| 94 | + | |
| 95 | + /* Unbind of all SCM resources associated with drcIndex */ | |
| 96 | + rc = plpar_hcall(H_SCM_UNBIND_ALL, ret, H_UNBIND_SCOPE_DRC, | |
| 97 | + p->drc_index, token); | |
| 89 | 98 | token = ret[0]; |
| 90 | − cond_resched(); | |
| 99 | + | |
| 100 | + /* Check if we are stalled for some time */ | |
| 101 | + if (H_IS_LONG_BUSY(rc)) { | |
| 102 | + msleep(get_longbusy_msecs(rc)); | |
| 103 | + rc = H_BUSY; | |
| 104 | + } else if (rc == H_BUSY) { | |
| 105 | + cond_resched(); | |
| 106 | + } | |
| 107 | + | |
| 91 | 108 | } while (rc == H_BUSY); |
| 92 | 109 | |
| 93 | 110 | if (rc) |
| 94 | 111 | dev_err(&p->pdev->dev, "unbind error: %lld\n", rc); |
| 112 | + else | |
| 113 | + dev_dbg(&p->pdev->dev, "unbind drc %x complete\n", | |
| 114 | + p->drc_index); | |
| 95 | 115 | |
| 96 | − return !!rc; | |
| 116 | + return rc == H_SUCCESS ? 0 : -ENXIO; | |
| 97 | 117 | } |
| 98 | 118 | |
| 99 | 119 | static int papr_scm_meta_get(struct papr_scm_priv *p, |
| @@ -255,12 +275,32 @@ static const struct attribute_group *papr_scm_dimm_groups[] = { · 155 unmodified lines | ||
| 255 | 275 | NULL, |
| 256 | 276 | }; |
| 257 | 277 | |
| 278 | +static inline int papr_scm_node(int node) | |
| 279 | +{ | |
| 280 | + int min_dist = INT_MAX, dist; | |
| 281 | + int nid, min_node; | |
| 282 | + | |
| 283 | + if ((node == NUMA_NO_NODE) || node_online(node)) | |
| 284 | + return node; | |
| 285 | + | |
| 286 | + min_node = first_online_node; | |
| 287 | + for_each_online_node(nid) { | |
| 288 | + dist = node_distance(node, nid); | |
| 289 | + if (dist < min_dist) { | |
| 290 | + min_dist = dist; | |
| 291 | + min_node = nid; | |
| 292 | + } | |
| 293 | + } | |
| 294 | + return min_node; | |
| 295 | +} | |
| 296 | + | |
| 258 | 297 | static int papr_scm_nvdimm_init(struct papr_scm_priv *p) |
| 259 | 298 | { |
| 260 | 299 | struct device *dev = &p->pdev->dev; |
| 261 | 300 | struct nd_mapping_desc mapping; |
| 262 | 301 | struct nd_region_desc ndr_desc; |
| 263 | 302 | unsigned long dimm_flags; |
| 303 | + int target_nid, online_nid; | |
| 264 | 304 | |
| 265 | 305 | p->bus_desc.ndctl = papr_scm_ndctl; |
| 266 | 306 | p->bus_desc.module = THIS_MODULE; |
| @@ -299,8 +339,10 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) · 32 unmodified lines | ||
| 299 | 339 | |
| 300 | 340 | memset(&ndr_desc, 0, sizeof(ndr_desc)); |
| 301 | 341 | ndr_desc.attr_groups = region_attr_groups; |
| 302 | − ndr_desc.numa_node = dev_to_node(&p->pdev->dev); | |
| 303 | − ndr_desc.target_node = ndr_desc.numa_node; | |
| 342 | + target_nid = dev_to_node(&p->pdev->dev); | |
| 343 | + online_nid = papr_scm_node(target_nid); | |
| 344 | + ndr_desc.numa_node = online_nid; | |
| 345 | + ndr_desc.target_node = target_nid; | |
| 304 | 346 | ndr_desc.res = &p->res; |
| 305 | 347 | ndr_desc.of_node = p->dn; |
| 306 | 348 | ndr_desc.provider_data = p; |
| @@ -318,6 +360,9 @@ static int papr_scm_nvdimm_init(struct papr_scm_priv *p) · 11 unmodified lines | ||
| 318 | 360 | ndr_desc.res, p->dn); |
| 319 | 361 | goto err; |
| 320 | 362 | } |
| 363 | + if (target_nid != online_nid) | |
| 364 | + dev_info(dev, "Region registered with target node %d and online node %d", | |
| 365 | + target_nid, online_nid); | |
| 321 | 366 | |
| 322 | 367 | return 0; |
| 323 | 368 | |
| @@ -389,6 +434,14 @@ static int papr_scm_probe(struct platform_device *pdev) · 65 unmodified lines | ||
| 389 | 434 | |
| 390 | 435 | /* request the hypervisor to bind this region to somewhere in memory */ |
| 391 | 436 | rc = drc_pmem_bind(p); |
| 437 | + | |
| 438 | + /* If phyp says drc memory still bound then force unbound and retry */ | |
| 439 | + if (rc == -EBUSY) { | |
| 440 | + dev_warn(&pdev->dev, "Retrying bind after unbinding\n"); | |
| 441 | + drc_pmem_unbind(p); | |
| 442 | + rc = drc_pmem_bind(p); | |
| 443 | + } | |
| 444 | + | |
| 392 | 445 | if (rc) |
| 393 | 446 | goto err; |
| 394 | 447 | |
| @@ -479,7 +479,7 @@ static int xive_find_target_in_mask(const struct cpumask *mask, · 478 unmodified lines | ||
| 479 | 479 | * Now go through the entire mask until we find a valid |
| 480 | 480 | * target. |
| 481 | 481 | */ |
| 482 | − for (;;) { | |
| 482 | + do { | |
| 483 | 483 | /* |
| 484 | 484 | * We re-check online as the fallback case passes us |
| 485 | 485 | * an untested affinity mask |
| @@ -487,12 +487,11 @@ static int xive_find_target_in_mask(const struct cpumask *mask, · 1 unmodified line | ||
| 487 | 487 | if (cpu_online(cpu) && xive_try_pick_target(cpu)) |
| 488 | 488 | return cpu; |
| 489 | 489 | cpu = cpumask_next(cpu, mask); |
| 490 | − if (cpu == first) | |
| 491 | − break; | |
| 492 | 490 | /* Wrap around */ |
| 493 | 491 | if (cpu >= nr_cpu_ids) |
| 494 | 492 | cpu = cpumask_first(mask); |
| 495 | − } | |
| 493 | + } while (cpu != first); | |
| 494 | + | |
| 496 | 495 | return -1; |
| 497 | 496 | } |
| 498 | 497 | |
| @@ -21,7 +21,6 @@ · 20 unmodified lines | ||
| 21 | 21 | cpus { |
| 22 | 22 | #address-cells = <1>; |
| 23 | 23 | #size-cells = <0>; |
| 24 | − timebase-frequency = <1000000>; | |
| 25 | 24 | cpu0: cpu@0 { |
| 26 | 25 | compatible = "sifive,e51", "sifive,rocket0", "riscv"; |
| 27 | 26 | device_type = "cpu"; |
| @@ -217,5 +216,20 @@ · 189 unmodified lines | ||
| 217 | 216 | #size-cells = <0>; |
| 218 | 217 | status = "disabled"; |
| 219 | 218 | }; |
| 219 | + eth0: ethernet@10090000 { | |
| 220 | + compatible = "sifive,fu540-c000-gem"; | |
| 221 | + interrupt-parent = <&plic0>; | |
| 222 | + interrupts = <53>; | |
| 223 | + reg = <0x0 0x10090000 0x0 0x2000 | |
| 224 | + 0x0 0x100a0000 0x0 0x1000>; | |
| 225 | + local-mac-address = [00 00 00 00 00 00]; | |
| 226 | + clock-names = "pclk", "hclk"; | |
| 227 | + clocks = <&prci PRCI_CLK_GEMGXLPLL>, | |
| 228 | + <&prci PRCI_CLK_GEMGXLPLL>; | |
| 229 | + #address-cells = <1>; | |
| 230 | + #size-cells = <0>; | |
| 231 | + status = "disabled"; | |
| 232 | + }; | |
| 233 | + | |
| 220 | 234 | }; |
| 221 | 235 | }; |
| @@ -76,3 +76,12 @@ · 75 unmodified lines | ||
| 76 | 76 | disable-wp; |
| 77 | 77 | }; |
| 78 | 78 | }; |
| 79 | + | |
| 80 | +ð0 { | |
| 81 | + status = "okay"; | |
| 82 | + phy-mode = "gmii"; | |
| 83 | + phy-handle = <&phy0>; | |
| 84 | + phy0: ethernet-phy@0 { | |
| 85 | + reg = <0>; | |
| 86 | + }; | |
| 87 | +}; | |
| @@ -34,6 +34,7 @@ CONFIG_PCIEPORTBUS=y · 33 unmodified lines | ||
| 34 | 34 | CONFIG_PCI_HOST_GENERIC=y |
| 35 | 35 | CONFIG_PCIE_XILINX=y |
| 36 | 36 | CONFIG_DEVTMPFS=y |
| 37 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 37 | 38 | CONFIG_BLK_DEV_LOOP=y |
| 38 | 39 | CONFIG_VIRTIO_BLK=y |
| 39 | 40 | CONFIG_BLK_DEV_SD=y |
| @@ -53,6 +54,10 @@ CONFIG_SERIAL_8250_CONSOLE=y · 13 unmodified lines | ||
| 53 | 54 | CONFIG_SERIAL_OF_PLATFORM=y |
| 54 | 55 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y |
| 55 | 56 | CONFIG_HVC_RISCV_SBI=y |
| 57 | +CONFIG_HW_RANDOM=y | |
| 58 | +CONFIG_HW_RANDOM_VIRTIO=y | |
| 59 | +CONFIG_SPI=y | |
| 60 | +CONFIG_SPI_SIFIVE=y | |
| 56 | 61 | # CONFIG_PTP_1588_CLOCK is not set |
| 57 | 62 | CONFIG_DRM=y |
| 58 | 63 | CONFIG_DRM_RADEON=y |
| @@ -66,8 +71,9 @@ CONFIG_USB_OHCI_HCD=y · 7 unmodified lines | ||
| 66 | 71 | CONFIG_USB_OHCI_HCD_PLATFORM=y |
| 67 | 72 | CONFIG_USB_STORAGE=y |
| 68 | 73 | CONFIG_USB_UAS=y |
| 74 | +CONFIG_MMC=y | |
| 75 | +CONFIG_MMC_SPI=y | |
| 69 | 76 | CONFIG_VIRTIO_MMIO=y |
| 70 | −CONFIG_SPI_SIFIVE=y | |
| 71 | 77 | CONFIG_EXT4_FS=y |
| 72 | 78 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 73 | 79 | CONFIG_AUTOFS4_FS=y |
| @@ -83,8 +89,4 @@ CONFIG_ROOT_NFS=y · 9 unmodified lines | ||
| 83 | 89 | CONFIG_CRYPTO_USER_API_HASH=y |
| 84 | 90 | CONFIG_CRYPTO_DEV_VIRTIO=y |
| 85 | 91 | CONFIG_PRINTK_TIME=y |
| 86 | −CONFIG_SPI=y | |
| 87 | −CONFIG_MMC_SPI=y | |
| 88 | −CONFIG_MMC=y | |
| 89 | −CONFIG_DEVTMPFS_MOUNT=y | |
| 90 | 92 | # CONFIG_RCU_TRACE is not set |
| @@ -34,6 +34,7 @@ CONFIG_PCIEPORTBUS=y · 33 unmodified lines | ||
| 34 | 34 | CONFIG_PCI_HOST_GENERIC=y |
| 35 | 35 | CONFIG_PCIE_XILINX=y |
| 36 | 36 | CONFIG_DEVTMPFS=y |
| 37 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 37 | 38 | CONFIG_BLK_DEV_LOOP=y |
| 38 | 39 | CONFIG_VIRTIO_BLK=y |
| 39 | 40 | CONFIG_BLK_DEV_SD=y |
| @@ -53,6 +54,8 @@ CONFIG_SERIAL_8250_CONSOLE=y · 13 unmodified lines | ||
| 53 | 54 | CONFIG_SERIAL_OF_PLATFORM=y |
| 54 | 55 | CONFIG_SERIAL_EARLYCON_RISCV_SBI=y |
| 55 | 56 | CONFIG_HVC_RISCV_SBI=y |
| 57 | +CONFIG_HW_RANDOM=y | |
| 58 | +CONFIG_HW_RANDOM_VIRTIO=y | |
| 56 | 59 | # CONFIG_PTP_1588_CLOCK is not set |
| 57 | 60 | CONFIG_DRM=y |
| 58 | 61 | CONFIG_DRM_RADEON=y |
| @@ -22,6 +22,7 @@ generic-y += kvm_para.h · 21 unmodified lines | ||
| 22 | 22 | generic-y += local.h |
| 23 | 23 | generic-y += local64.h |
| 24 | 24 | generic-y += mm-arch-hooks.h |
| 25 | +generic-y += msi.h | |
| 25 | 26 | generic-y += percpu.h |
| 26 | 27 | generic-y += preempt.h |
| 27 | 28 | generic-y += sections.h |
| @@ -30,10 +30,6 @@ enum fixed_addresses { · 29 unmodified lines | ||
| 30 | 30 | __end_of_fixed_addresses |
| 31 | 31 | }; |
| 32 | 32 | |
| 33 | −#define FIXADDR_SIZE (__end_of_fixed_addresses * PAGE_SIZE) | |
| 34 | −#define FIXADDR_TOP (VMALLOC_START) | |
| 35 | −#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | |
| 36 | − | |
| 37 | 33 | #define FIXMAP_PAGE_IO PAGE_KERNEL |
| 38 | 34 | |
| 39 | 35 | #define __early_set_fixmap __set_fixmap |
| @@ -420,14 +420,22 @@ static inline void pgtable_cache_init(void) · 419 unmodified lines | ||
| 420 | 420 | #define VMALLOC_END (PAGE_OFFSET - 1) |
| 421 | 421 | #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) |
| 422 | 422 | |
| 423 | +#define FIXADDR_TOP VMALLOC_START | |
| 424 | +#ifdef CONFIG_64BIT | |
| 425 | +#define FIXADDR_SIZE PMD_SIZE | |
| 426 | +#else | |
| 427 | +#define FIXADDR_SIZE PGDIR_SIZE | |
| 428 | +#endif | |
| 429 | +#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | |
| 430 | + | |
| 423 | 431 | /* |
| 424 | − * Task size is 0x4000000000 for RV64 or 0xb800000 for RV32. | |
| 432 | + * Task size is 0x4000000000 for RV64 or 0x9fc00000 for RV32. | |
| 425 | 433 | * Note that PGDIR_SIZE must evenly divide TASK_SIZE. |
| 426 | 434 | */ |
| 427 | 435 | #ifdef CONFIG_64BIT |
| 428 | 436 | #define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) |
| 429 | 437 | #else |
| 430 | −#define TASK_SIZE VMALLOC_START | |
| 438 | +#define TASK_SIZE FIXADDR_START | |
| 431 | 439 | #endif |
| 432 | 440 | |
| 433 | 441 | #include <asm-generic/pgtable.h> |
| @@ -16,7 +16,13 @@ extern void __fstate_restore(struct task_struct *restore_from); · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | static inline void __fstate_clean(struct pt_regs *regs) |
| 18 | 18 | { |
| 19 | − regs->sstatus |= (regs->sstatus & ~(SR_FS)) | SR_FS_CLEAN; | |
| 19 | + regs->sstatus = (regs->sstatus & ~SR_FS) | SR_FS_CLEAN; | |
| 20 | +} | |
| 21 | + | |
| 22 | +static inline void fstate_off(struct task_struct *task, | |
| 23 | + struct pt_regs *regs) | |
| 24 | +{ | |
| 25 | + regs->sstatus = (regs->sstatus & ~SR_FS) | SR_FS_OFF; | |
| 20 | 26 | } |
| 21 | 27 | |
| 22 | 28 | static inline void fstate_save(struct task_struct *task, |
| @@ -53,10 +53,17 @@ static inline void remote_sfence_vma(struct cpumask *cmask, unsigned long start, · 52 unmodified lines | ||
| 53 | 53 | } |
| 54 | 54 | |
| 55 | 55 | #define flush_tlb_all() sbi_remote_sfence_vma(NULL, 0, -1) |
| 56 | −#define flush_tlb_page(vma, addr) flush_tlb_range(vma, addr, 0) | |
| 56 | + | |
| 57 | 57 | #define flush_tlb_range(vma, start, end) \ |
| 58 | 58 | remote_sfence_vma(mm_cpumask((vma)->vm_mm), start, (end) - (start)) |
| 59 | −#define flush_tlb_mm(mm) \ | |
| 59 | + | |
| 60 | +static inline void flush_tlb_page(struct vm_area_struct *vma, | |
| 61 | + unsigned long addr) | |
| 62 | +{ | |
| 63 | + flush_tlb_range(vma, addr, addr + PAGE_SIZE); | |
| 64 | +} | |
| 65 | + | |
| 66 | +#define flush_tlb_mm(mm) \ | |
| 60 | 67 | remote_sfence_vma(mm_cpumask(mm), 0, -1) |
| 61 | 68 | |
| 62 | 69 | #endif /* CONFIG_SMP */ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | 4 | * Copyright (C) 2015 Regents of the University of California |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | 4 | * Copyright (C) 2015 Regents of the University of California |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | 4 | * Copyright (C) 2015 Regents of the University of California |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copied from arch/arm64/include/asm/hwcap.h |
| 4 | 4 | * |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 Regents of the University of California |
| 4 | 4 | */ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 Regents of the University of California |
| 4 | 4 | */ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | 4 | * Copyright (C) 2017 SiFive, Inc. |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #ifdef __LP64__ |
| 19 | 19 | #define __ARCH_WANT_NEW_STAT |
| 20 | 20 | #define __ARCH_WANT_SET_GET_RLIMIT |
| 21 | +#define __ARCH_WANT_SYS_CLONE3 | |
| 21 | 22 | #endif /* __LP64__ */ |
| 22 | 23 | |
| 23 | 24 | #include <asm-generic/unistd.h> |
| @@ -64,8 +64,14 @@ void start_thread(struct pt_regs *regs, unsigned long pc, · 63 unmodified lines | ||
| 64 | 64 | unsigned long sp) |
| 65 | 65 | { |
| 66 | 66 | regs->sstatus = SR_SPIE; |
| 67 | − if (has_fpu) | |
| 67 | + if (has_fpu) { | |
| 68 | 68 | regs->sstatus |= SR_FS_INITIAL; |
| 69 | + /* | |
| 70 | + * Restore the initial value to the FP register | |
| 71 | + * before starting the user program. | |
| 72 | + */ | |
| 73 | + fstate_restore(current, regs); | |
| 74 | + } | |
| 69 | 75 | regs->sepc = pc; |
| 70 | 76 | regs->sp = sp; |
| 71 | 77 | set_fs(USER_DS); |
| @@ -75,10 +81,11 @@ void flush_thread(void) · 3 unmodified lines | ||
| 75 | 81 | { |
| 76 | 82 | #ifdef CONFIG_FPU |
| 77 | 83 | /* |
| 78 | − * Reset FPU context | |
| 84 | + * Reset FPU state and context | |
| 79 | 85 | * frm: round to nearest, ties to even (IEEE default) |
| 80 | 86 | * fflags: accrued exceptions cleared |
| 81 | 87 | */ |
| 88 | + fstate_off(current, task_pt_regs(current)); | |
| 82 | 89 | memset(¤t->thread.fstate, 0, sizeof(current->thread.fstate)); |
| 83 | 90 | #endif |
| 84 | 91 | } |
| @@ -37,7 +37,7 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE · 36 unmodified lines | ||
| 37 | 37 | # these symbols in the kernel code rather than hand-coded addresses. |
| 38 | 38 | |
| 39 | 39 | SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \ |
| 40 | − -Wl,--hash-style=both | |
| 40 | + -Wl,--build-id -Wl,--hash-style=both | |
| 41 | 41 | $(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE |
| 42 | 42 | $(call if_changed,vdsold) |
| 43 | 43 | |
| @@ -5,5 +5,3 @@ lib-y += memset.o · 4 unmodified lines | ||
| 5 | 5 | lib-y += uaccess.o |
| 6 | 6 | |
| 7 | 7 | lib-$(CONFIG_64BIT) += tishift.o |
| 8 | − | |
| 9 | −lib-$(CONFIG_32BIT) += udivdi3.o | |
| @@ -81,9 +81,13 @@ EXPORT_SYMBOL(__delay); · 80 unmodified lines | ||
| 81 | 81 | void udelay(unsigned long usecs) |
| 82 | 82 | { |
| 83 | 83 | u64 ucycles = (u64)usecs * lpj_fine * UDELAY_MULT; |
| 84 | + u64 n; | |
| 84 | 85 | |
| 85 | 86 | if (unlikely(usecs > MAX_UDELAY_US)) { |
| 86 | − __delay((u64)usecs * riscv_timebase / 1000000ULL); | |
| 87 | + n = (u64)usecs * riscv_timebase; | |
| 88 | + do_div(n, 1000000); | |
| 89 | + | |
| 90 | + __delay(n); | |
| 87 | 91 | return; |
| 88 | 92 | } |
| 89 | 93 | |
| @@ -1,32 +0,0 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | −/* | |
| 3 | − * Copyright (C) 2016-2017 Free Software Foundation, Inc. | |
| 4 | − */ | |
| 5 | − | |
| 6 | −#include <linux/linkage.h> | |
| 7 | − | |
| 8 | −ENTRY(__udivdi3) | |
| 9 | − mv a2, a1 | |
| 10 | − mv a1, a0 | |
| 11 | − li a0, -1 | |
| 12 | − beqz a2, .L5 | |
| 13 | − li a3, 1 | |
| 14 | − bgeu a2, a1, .L2 | |
| 15 | −.L1: | |
| 16 | − blez a2, .L2 | |
| 17 | − slli a2, a2, 1 | |
| 18 | − slli a3, a3, 1 | |
| 19 | − bgtu a1, a2, .L1 | |
| 20 | −.L2: | |
| 21 | − li a0, 0 | |
| 22 | −.L3: | |
| 23 | − bltu a1, a2, .L4 | |
| 24 | − sub a1, a1, a2 | |
| 25 | − or a0, a0, a3 | |
| 26 | −.L4: | |
| 27 | − srli a3, a3, 1 | |
| 28 | − srli a2, a2, 1 | |
| 29 | − bnez a3, .L3 | |
| 30 | −.L5: | |
| 31 | − ret | |
| 32 | −ENDPROC(__udivdi3) | |
| @@ -36,7 +36,7 @@ CFLAGS_sclp_early_core.o += -I$(srctree)/drivers/s390/char · 35 unmodified lines | ||
| 36 | 36 | |
| 37 | 37 | obj-y := head.o als.o startup.o mem_detect.o ipl_parm.o ipl_report.o |
| 38 | 38 | obj-y += string.o ebcdic.o sclp_early_core.o mem.o ipl_vmparm.o cmdline.o |
| 39 | −obj-y += ctype.o text_dma.o | |
| 39 | +obj-y += version.o ctype.o text_dma.o | |
| 40 | 40 | obj-$(CONFIG_PROTECTED_VIRTUALIZATION_GUEST) += uv.o |
| 41 | 41 | obj-$(CONFIG_RELOCATABLE) += machine_kexec_reloc.o |
| 42 | 42 | obj-$(CONFIG_RANDOMIZE_BASE) += kaslr.o |
| @@ -8,10 +8,12 @@ void store_ipl_parmblock(void); · 7 unmodified lines | ||
| 8 | 8 | void setup_boot_command_line(void); |
| 9 | 9 | void parse_boot_command_line(void); |
| 10 | 10 | void setup_memory_end(void); |
| 11 | +void verify_facilities(void); | |
| 11 | 12 | void print_missing_facilities(void); |
| 12 | 13 | unsigned long get_random_base(unsigned long safe_addr); |
| 13 | 14 | |
| 14 | 15 | extern int kaslr_enabled; |
| 16 | +extern const char kernel_version[]; | |
| 15 | 17 | |
| 16 | 18 | unsigned long read_ipl_report(unsigned long safe_offset); |
| 17 | 19 | |
| @@ -361,6 +361,7 @@ ENTRY(startup_kdump) · 360 unmodified lines | ||
| 361 | 361 | .quad 0 # INITRD_SIZE |
| 362 | 362 | .quad 0 # OLDMEM_BASE |
| 363 | 363 | .quad 0 # OLDMEM_SIZE |
| 364 | + .quad kernel_version # points to kernel version string | |
| 364 | 365 | |
| 365 | 366 | .org COMMAND_LINE |
| 366 | 367 | .byte "root=/dev/ram0 ro" |
| @@ -48,9 +48,7 @@ void store_ipl_parmblock(void) · 47 unmodified lines | ||
| 48 | 48 | { |
| 49 | 49 | int rc; |
| 50 | 50 | |
| 51 | − uv_set_shared(__pa(&ipl_block)); | |
| 52 | 51 | rc = __diag308(DIAG308_STORE, &ipl_block); |
| 53 | − uv_remove_shared(__pa(&ipl_block)); | |
| 54 | 52 | if (rc == DIAG308_RC_OK && |
| 55 | 53 | ipl_block.hdr.version <= IPL_MAX_SUPPORTED_VERSION) |
| 56 | 54 | ipl_block_valid = 1; |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | #include <asm/timex.h> |
| 8 | 8 | #include <asm/sclp.h> |
| 9 | 9 | #include "compressed/decompressor.h" |
| 10 | +#include "boot.h" | |
| 10 | 11 | |
| 11 | 12 | #define PRNG_MODE_TDES 1 |
| 12 | 13 | #define PRNG_MODE_SHA512 2 |
| @@ -0,0 +1,7 @@ | ||
| 1 | +// SPDX-License-Identifier: GPL-2.0 | |
| 2 | +#include <generated/utsrelease.h> | |
| 3 | +#include <generated/compile.h> | |
| 4 | +#include "boot.h" | |
| 5 | + | |
| 6 | +const char kernel_version[] = UTS_RELEASE | |
| 7 | + " (" LINUX_COMPILE_BY "@" LINUX_COMPILE_HOST ") " UTS_VERSION; | |
| @@ -3,6 +3,7 @@ CONFIG_POSIX_MQUEUE=y · 2 unmodified lines | ||
| 3 | 3 | CONFIG_AUDIT=y |
| 4 | 4 | CONFIG_NO_HZ_IDLE=y |
| 5 | 5 | CONFIG_HIGH_RES_TIMERS=y |
| 6 | +CONFIG_PREEMPT=y | |
| 6 | 7 | CONFIG_BSD_PROCESS_ACCT=y |
| 7 | 8 | CONFIG_BSD_PROCESS_ACCT_V3=y |
| 8 | 9 | CONFIG_TASKSTATS=y |
| @@ -18,55 +19,71 @@ CONFIG_BLK_CGROUP=y · 9 unmodified lines | ||
| 18 | 19 | CONFIG_CFS_BANDWIDTH=y |
| 19 | 20 | CONFIG_RT_GROUP_SCHED=y |
| 20 | 21 | CONFIG_CGROUP_PIDS=y |
| 22 | +CONFIG_CGROUP_RDMA=y | |
| 21 | 23 | CONFIG_CGROUP_FREEZER=y |
| 22 | 24 | CONFIG_CGROUP_HUGETLB=y |
| 23 | 25 | CONFIG_CPUSETS=y |
| 24 | 26 | CONFIG_CGROUP_DEVICE=y |
| 25 | 27 | CONFIG_CGROUP_CPUACCT=y |
| 26 | 28 | CONFIG_CGROUP_PERF=y |
| 29 | +CONFIG_CGROUP_BPF=y | |
| 27 | 30 | CONFIG_NAMESPACES=y |
| 28 | 31 | CONFIG_USER_NS=y |
| 32 | +CONFIG_CHECKPOINT_RESTORE=y | |
| 29 | 33 | CONFIG_SCHED_AUTOGROUP=y |
| 30 | 34 | CONFIG_BLK_DEV_INITRD=y |
| 31 | 35 | CONFIG_EXPERT=y |
| 32 | 36 | # CONFIG_SYSFS_SYSCALL is not set |
| 33 | −CONFIG_CHECKPOINT_RESTORE=y | |
| 34 | 37 | CONFIG_BPF_SYSCALL=y |
| 35 | 38 | CONFIG_USERFAULTFD=y |
| 36 | 39 | # CONFIG_COMPAT_BRK is not set |
| 37 | 40 | CONFIG_PROFILING=y |
| 41 | +CONFIG_LIVEPATCH=y | |
| 42 | +CONFIG_TUNE_ZEC12=y | |
| 43 | +CONFIG_NR_CPUS=512 | |
| 44 | +CONFIG_NUMA=y | |
| 45 | +CONFIG_HZ_100=y | |
| 46 | +CONFIG_KEXEC_FILE=y | |
| 47 | +CONFIG_EXPOLINE=y | |
| 48 | +CONFIG_EXPOLINE_AUTO=y | |
| 49 | +CONFIG_CHSC_SCH=y | |
| 50 | +CONFIG_VFIO_CCW=m | |
| 51 | +CONFIG_VFIO_AP=m | |
| 52 | +CONFIG_CRASH_DUMP=y | |
| 53 | +CONFIG_HIBERNATION=y | |
| 54 | +CONFIG_PM_DEBUG=y | |
| 55 | +CONFIG_CMM=m | |
| 56 | +CONFIG_APPLDATA_BASE=y | |
| 57 | +CONFIG_KVM=m | |
| 58 | +CONFIG_VHOST_NET=m | |
| 59 | +CONFIG_VHOST_VSOCK=m | |
| 38 | 60 | CONFIG_OPROFILE=m |
| 39 | 61 | CONFIG_KPROBES=y |
| 40 | 62 | CONFIG_JUMP_LABEL=y |
| 41 | 63 | CONFIG_STATIC_KEYS_SELFTEST=y |
| 64 | +CONFIG_REFCOUNT_FULL=y | |
| 65 | +CONFIG_LOCK_EVENT_COUNTS=y | |
| 42 | 66 | CONFIG_MODULES=y |
| 43 | 67 | CONFIG_MODULE_FORCE_LOAD=y |
| 44 | 68 | CONFIG_MODULE_UNLOAD=y |
| 45 | 69 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 46 | 70 | CONFIG_MODVERSIONS=y |
| 47 | 71 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 72 | +CONFIG_MODULE_SIG=y | |
| 73 | +CONFIG_MODULE_SIG_SHA256=y | |
| 48 | 74 | CONFIG_BLK_DEV_INTEGRITY=y |
| 49 | 75 | CONFIG_BLK_DEV_THROTTLING=y |
| 50 | 76 | CONFIG_BLK_WBT=y |
| 51 | −CONFIG_BLK_WBT_SQ=y | |
| 77 | +CONFIG_BLK_CGROUP_IOLATENCY=y | |
| 52 | 78 | CONFIG_PARTITION_ADVANCED=y |
| 53 | 79 | CONFIG_IBM_PARTITION=y |
| 54 | 80 | CONFIG_BSD_DISKLABEL=y |
| 55 | 81 | CONFIG_MINIX_SUBPARTITION=y |
| 56 | 82 | CONFIG_SOLARIS_X86_PARTITION=y |
| 57 | 83 | CONFIG_UNIXWARE_DISKLABEL=y |
| 58 | −CONFIG_CFQ_GROUP_IOSCHED=y | |
| 59 | −CONFIG_DEFAULT_DEADLINE=y | |
| 60 | −CONFIG_LIVEPATCH=y | |
| 61 | −CONFIG_TUNE_ZEC12=y | |
| 62 | −CONFIG_NR_CPUS=512 | |
| 63 | −CONFIG_NUMA=y | |
| 64 | −CONFIG_PREEMPT=y | |
| 65 | −CONFIG_HZ_100=y | |
| 66 | −CONFIG_KEXEC_FILE=y | |
| 67 | −CONFIG_KEXEC_VERIFY_SIG=y | |
| 68 | −CONFIG_EXPOLINE=y | |
| 69 | −CONFIG_EXPOLINE_AUTO=y | |
| 84 | +CONFIG_IOSCHED_BFQ=y | |
| 85 | +CONFIG_BFQ_GROUP_IOSCHED=y | |
| 86 | +CONFIG_BINFMT_MISC=m | |
| 70 | 87 | CONFIG_MEMORY_HOTPLUG=y |
| 71 | 88 | CONFIG_MEMORY_HOTREMOVE=y |
| 72 | 89 | CONFIG_KSM=y |
| @@ -82,17 +99,8 @@ CONFIG_ZSMALLOC=m · 9 unmodified lines | ||
| 82 | 99 | CONFIG_ZSMALLOC_STAT=y |
| 83 | 100 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y |
| 84 | 101 | CONFIG_IDLE_PAGE_TRACKING=y |
| 85 | −CONFIG_PCI=y | |
| 86 | −CONFIG_PCI_DEBUG=y | |
| 87 | −CONFIG_HOTPLUG_PCI=y | |
| 88 | −CONFIG_HOTPLUG_PCI_S390=y | |
| 89 | −CONFIG_CHSC_SCH=y | |
| 90 | −CONFIG_VFIO_AP=m | |
| 91 | −CONFIG_VFIO_CCW=m | |
| 92 | −CONFIG_CRASH_DUMP=y | |
| 93 | −CONFIG_BINFMT_MISC=m | |
| 94 | −CONFIG_HIBERNATION=y | |
| 95 | −CONFIG_PM_DEBUG=y | |
| 102 | +CONFIG_PERCPU_STATS=y | |
| 103 | +CONFIG_GUP_BENCHMARK=y | |
| 96 | 104 | CONFIG_NET=y |
| 97 | 105 | CONFIG_PACKET=y |
| 98 | 106 | CONFIG_PACKET_DIAG=m |
| @@ -121,9 +129,6 @@ CONFIG_NET_IPVTI=m · 22 unmodified lines | ||
| 121 | 129 | CONFIG_INET_AH=m |
| 122 | 130 | CONFIG_INET_ESP=m |
| 123 | 131 | CONFIG_INET_IPCOMP=m |
| 124 | −CONFIG_INET_XFRM_MODE_TRANSPORT=m | |
| 125 | −CONFIG_INET_XFRM_MODE_TUNNEL=m | |
| 126 | −CONFIG_INET_XFRM_MODE_BEET=m | |
| 127 | 132 | CONFIG_INET_DIAG=m |
| 128 | 133 | CONFIG_INET_UDP_DIAG=m |
| 129 | 134 | CONFIG_TCP_CONG_ADVANCED=y |
| @@ -139,10 +144,6 @@ CONFIG_INET6_AH=m · 9 unmodified lines | ||
| 139 | 144 | CONFIG_INET6_ESP=m |
| 140 | 145 | CONFIG_INET6_IPCOMP=m |
| 141 | 146 | CONFIG_IPV6_MIP6=m |
| 142 | −CONFIG_INET6_XFRM_MODE_TRANSPORT=m | |
| 143 | −CONFIG_INET6_XFRM_MODE_TUNNEL=m | |
| 144 | −CONFIG_INET6_XFRM_MODE_BEET=m | |
| 145 | −CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | |
| 146 | 147 | CONFIG_IPV6_VTI=m |
| 147 | 148 | CONFIG_IPV6_SIT=m |
| 148 | 149 | CONFIG_IPV6_GRE=m |
| @@ -264,11 +265,8 @@ CONFIG_IP_VS_SED=m · 115 unmodified lines | ||
| 264 | 265 | CONFIG_IP_VS_NQ=m |
| 265 | 266 | CONFIG_IP_VS_FTP=m |
| 266 | 267 | CONFIG_IP_VS_PE_SIP=m |
| 267 | −CONFIG_NF_CONNTRACK_IPV4=m | |
| 268 | 268 | CONFIG_NF_TABLES_IPV4=y |
| 269 | −CONFIG_NFT_CHAIN_ROUTE_IPV4=m | |
| 270 | 269 | CONFIG_NF_TABLES_ARP=y |
| 271 | −CONFIG_NFT_CHAIN_NAT_IPV4=m | |
| 272 | 270 | CONFIG_IP_NF_IPTABLES=m |
| 273 | 271 | CONFIG_IP_NF_MATCH_AH=m |
| 274 | 272 | CONFIG_IP_NF_MATCH_ECN=m |
| @@ -287,10 +285,7 @@ CONFIG_IP_NF_SECURITY=m · 12 unmodified lines | ||
| 287 | 285 | CONFIG_IP_NF_ARPTABLES=m |
| 288 | 286 | CONFIG_IP_NF_ARPFILTER=m |
| 289 | 287 | CONFIG_IP_NF_ARP_MANGLE=m |
| 290 | −CONFIG_NF_CONNTRACK_IPV6=m | |
| 291 | 288 | CONFIG_NF_TABLES_IPV6=y |
| 292 | −CONFIG_NFT_CHAIN_ROUTE_IPV6=m | |
| 293 | −CONFIG_NFT_CHAIN_NAT_IPV6=m | |
| 294 | 289 | CONFIG_IP6_NF_IPTABLES=m |
| 295 | 290 | CONFIG_IP6_NF_MATCH_AH=m |
| 296 | 291 | CONFIG_IP6_NF_MATCH_EUI64=m |
| @@ -309,7 +304,7 @@ CONFIG_IP6_NF_RAW=m · 12 unmodified lines | ||
| 309 | 304 | CONFIG_IP6_NF_SECURITY=m |
| 310 | 305 | CONFIG_IP6_NF_NAT=m |
| 311 | 306 | CONFIG_IP6_NF_TARGET_MASQUERADE=m |
| 312 | −CONFIG_NF_TABLES_BRIDGE=y | |
| 307 | +CONFIG_NF_TABLES_BRIDGE=m | |
| 313 | 308 | CONFIG_RDS=m |
| 314 | 309 | CONFIG_RDS_RDMA=m |
| 315 | 310 | CONFIG_RDS_TCP=m |
| @@ -375,9 +370,11 @@ CONFIG_NETLINK_DIAG=m · 59 unmodified lines | ||
| 375 | 370 | CONFIG_CGROUP_NET_PRIO=y |
| 376 | 371 | CONFIG_BPF_JIT=y |
| 377 | 372 | CONFIG_NET_PKTGEN=m |
| 373 | +CONFIG_PCI=y | |
| 374 | +CONFIG_PCI_DEBUG=y | |
| 375 | +CONFIG_HOTPLUG_PCI=y | |
| 376 | +CONFIG_HOTPLUG_PCI_S390=y | |
| 378 | 377 | CONFIG_DEVTMPFS=y |
| 379 | −CONFIG_DMA_CMA=y | |
| 380 | −CONFIG_CMA_SIZE_MBYTES=0 | |
| 381 | 378 | CONFIG_CONNECTOR=y |
| 382 | 379 | CONFIG_ZRAM=m |
| 383 | 380 | CONFIG_BLK_DEV_LOOP=m |
| @@ -395,7 +392,6 @@ CONFIG_RAID_ATTRS=m · 11 unmodified lines | ||
| 395 | 392 | CONFIG_SCSI=y |
| 396 | 393 | CONFIG_BLK_DEV_SD=y |
| 397 | 394 | CONFIG_CHR_DEV_ST=m |
| 398 | −CONFIG_CHR_DEV_OSST=m | |
| 399 | 395 | CONFIG_BLK_DEV_SR=m |
| 400 | 396 | CONFIG_CHR_DEV_SG=y |
| 401 | 397 | CONFIG_CHR_DEV_SCH=m |
| @@ -415,17 +411,19 @@ CONFIG_SCSI_DH_RDAC=m · 13 unmodified lines | ||
| 415 | 411 | CONFIG_SCSI_DH_HP_SW=m |
| 416 | 412 | CONFIG_SCSI_DH_EMC=m |
| 417 | 413 | CONFIG_SCSI_DH_ALUA=m |
| 418 | −CONFIG_SCSI_OSD_INITIATOR=m | |
| 419 | −CONFIG_SCSI_OSD_ULD=m | |
| 420 | 414 | CONFIG_MD=y |
| 421 | 415 | CONFIG_BLK_DEV_MD=y |
| 422 | 416 | CONFIG_MD_LINEAR=m |
| 423 | 417 | CONFIG_MD_MULTIPATH=m |
| 424 | 418 | CONFIG_MD_FAULTY=m |
| 419 | +CONFIG_MD_CLUSTER=m | |
| 420 | +CONFIG_BCACHE=m | |
| 425 | 421 | CONFIG_BLK_DEV_DM=m |
| 422 | +CONFIG_DM_UNSTRIPED=m | |
| 426 | 423 | CONFIG_DM_CRYPT=m |
| 427 | 424 | CONFIG_DM_SNAPSHOT=m |
| 428 | 425 | CONFIG_DM_THIN_PROVISIONING=m |
| 426 | +CONFIG_DM_WRITECACHE=m | |
| 429 | 427 | CONFIG_DM_MIRROR=m |
| 430 | 428 | CONFIG_DM_LOG_USERSPACE=m |
| 431 | 429 | CONFIG_DM_RAID=m |
| @@ -445,23 +443,78 @@ CONFIG_EQUALIZER=m · 13 unmodified lines | ||
| 445 | 443 | CONFIG_IFB=m |
| 446 | 444 | CONFIG_MACVLAN=m |
| 447 | 445 | CONFIG_MACVTAP=m |
| 448 | −CONFIG_VXLAN=m | |
| 449 | 446 | CONFIG_TUN=m |
| 450 | 447 | CONFIG_VETH=m |
| 451 | 448 | CONFIG_VIRTIO_NET=m |
| 452 | 449 | CONFIG_NLMON=m |
| 450 | +# CONFIG_NET_VENDOR_3COM is not set | |
| 451 | +# CONFIG_NET_VENDOR_ADAPTEC is not set | |
| 452 | +# CONFIG_NET_VENDOR_AGERE is not set | |
| 453 | +# CONFIG_NET_VENDOR_ALACRITECH is not set | |
| 454 | +# CONFIG_NET_VENDOR_ALTEON is not set | |
| 455 | +# CONFIG_NET_VENDOR_AMAZON is not set | |
| 456 | +# CONFIG_NET_VENDOR_AMD is not set | |
| 457 | +# CONFIG_NET_VENDOR_AQUANTIA is not set | |
| 453 | 458 | # CONFIG_NET_VENDOR_ARC is not set |
| 459 | +# CONFIG_NET_VENDOR_ATHEROS is not set | |
| 460 | +# CONFIG_NET_VENDOR_AURORA is not set | |
| 461 | +# CONFIG_NET_VENDOR_BROADCOM is not set | |
| 462 | +# CONFIG_NET_VENDOR_BROCADE is not set | |
| 463 | +# CONFIG_NET_VENDOR_CADENCE is not set | |
| 464 | +# CONFIG_NET_VENDOR_CAVIUM is not set | |
| 454 | 465 | # CONFIG_NET_VENDOR_CHELSIO is not set |
| 466 | +# CONFIG_NET_VENDOR_CISCO is not set | |
| 467 | +# CONFIG_NET_VENDOR_CORTINA is not set | |
| 468 | +# CONFIG_NET_VENDOR_DEC is not set | |
| 469 | +# CONFIG_NET_VENDOR_DLINK is not set | |
| 470 | +# CONFIG_NET_VENDOR_EMULEX is not set | |
| 471 | +# CONFIG_NET_VENDOR_EZCHIP is not set | |
| 472 | +# CONFIG_NET_VENDOR_GOOGLE is not set | |
| 473 | +# CONFIG_NET_VENDOR_HP is not set | |
| 474 | +# CONFIG_NET_VENDOR_HUAWEI is not set | |
| 455 | 475 | # CONFIG_NET_VENDOR_INTEL is not set |
| 456 | 476 | # CONFIG_NET_VENDOR_MARVELL is not set |
| 457 | 477 | CONFIG_MLX4_EN=m |
| 458 | 478 | CONFIG_MLX5_CORE=m |
| 459 | 479 | CONFIG_MLX5_CORE_EN=y |
| 480 | +# CONFIG_MLXFW is not set | |
| 481 | +# CONFIG_NET_VENDOR_MICREL is not set | |
| 482 | +# CONFIG_NET_VENDOR_MICROCHIP is not set | |
| 483 | +# CONFIG_NET_VENDOR_MICROSEMI is not set | |
| 484 | +# CONFIG_NET_VENDOR_MYRI is not set | |
| 460 | 485 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 486 | +# CONFIG_NET_VENDOR_NETERION is not set | |
| 487 | +# CONFIG_NET_VENDOR_NETRONOME is not set | |
| 488 | +# CONFIG_NET_VENDOR_NI is not set | |
| 489 | +# CONFIG_NET_VENDOR_NVIDIA is not set | |
| 490 | +# CONFIG_NET_VENDOR_OKI is not set | |
| 491 | +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set | |
| 492 | +# CONFIG_NET_VENDOR_QLOGIC is not set | |
| 493 | +# CONFIG_NET_VENDOR_QUALCOMM is not set | |
| 494 | +# CONFIG_NET_VENDOR_RDC is not set | |
| 495 | +# CONFIG_NET_VENDOR_REALTEK is not set | |
| 496 | +# CONFIG_NET_VENDOR_RENESAS is not set | |
| 497 | +# CONFIG_NET_VENDOR_ROCKER is not set | |
| 498 | +# CONFIG_NET_VENDOR_SAMSUNG is not set | |
| 499 | +# CONFIG_NET_VENDOR_SEEQ is not set | |
| 500 | +# CONFIG_NET_VENDOR_SOLARFLARE is not set | |
| 501 | +# CONFIG_NET_VENDOR_SILAN is not set | |
| 502 | +# CONFIG_NET_VENDOR_SIS is not set | |
| 503 | +# CONFIG_NET_VENDOR_SMSC is not set | |
| 504 | +# CONFIG_NET_VENDOR_SOCIONEXT is not set | |
| 505 | +# CONFIG_NET_VENDOR_STMICRO is not set | |
| 506 | +# CONFIG_NET_VENDOR_SUN is not set | |
| 507 | +# CONFIG_NET_VENDOR_SYNOPSYS is not set | |
| 508 | +# CONFIG_NET_VENDOR_TEHUTI is not set | |
| 509 | +# CONFIG_NET_VENDOR_TI is not set | |
| 510 | +# CONFIG_NET_VENDOR_VIA is not set | |
| 511 | +# CONFIG_NET_VENDOR_WIZNET is not set | |
| 461 | 512 | CONFIG_PPP=m |
| 462 | 513 | CONFIG_PPP_BSDCOMP=m |
| 463 | 514 | CONFIG_PPP_DEFLATE=m |
| 515 | +CONFIG_PPP_FILTER=y | |
| 464 | 516 | CONFIG_PPP_MPPE=m |
| 517 | +CONFIG_PPP_MULTILINK=y | |
| 465 | 518 | CONFIG_PPPOE=m |
| 466 | 519 | CONFIG_PPTP=m |
| 467 | 520 | CONFIG_PPPOL2TP=m |
| @@ -473,10 +526,13 @@ CONFIG_INPUT_EVDEV=y · 5 unmodified lines | ||
| 473 | 526 | # CONFIG_INPUT_MOUSE is not set |
| 474 | 527 | # CONFIG_SERIO is not set |
| 475 | 528 | CONFIG_LEGACY_PTY_COUNT=0 |
| 529 | +CONFIG_NULL_TTY=m | |
| 476 | 530 | CONFIG_HW_RANDOM_VIRTIO=m |
| 477 | 531 | CONFIG_RAW_DRIVER=m |
| 478 | 532 | CONFIG_HANGCHECK_TIMER=m |
| 479 | 533 | CONFIG_TN3270_FS=y |
| 534 | +CONFIG_PPS=m | |
| 535 | +# CONFIG_PTP_1588_CLOCK is not set | |
| 480 | 536 | # CONFIG_HWMON is not set |
| 481 | 537 | CONFIG_WATCHDOG=y |
| 482 | 538 | CONFIG_WATCHDOG_NOWAYOUT=y |
| @@ -498,8 +554,8 @@ CONFIG_VFIO_MDEV_DEVICE=m · 15 unmodified lines | ||
| 498 | 554 | CONFIG_VIRTIO_PCI=m |
| 499 | 555 | CONFIG_VIRTIO_BALLOON=m |
| 500 | 556 | CONFIG_VIRTIO_INPUT=y |
| 501 | −CONFIG_S390_AP_IOMMU=y | |
| 502 | 557 | CONFIG_S390_CCW_IOMMU=y |
| 558 | +CONFIG_S390_AP_IOMMU=y | |
| 503 | 559 | CONFIG_EXT4_FS=y |
| 504 | 560 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 505 | 561 | CONFIG_EXT4_FS_SECURITY=y |
| @@ -519,6 +575,7 @@ CONFIG_OCFS2_FS=m · 13 unmodified lines | ||
| 519 | 575 | CONFIG_BTRFS_FS=y |
| 520 | 576 | CONFIG_BTRFS_FS_POSIX_ACL=y |
| 521 | 577 | CONFIG_BTRFS_DEBUG=y |
| 578 | +CONFIG_BTRFS_ASSERT=y | |
| 522 | 579 | CONFIG_NILFS2_FS=m |
| 523 | 580 | CONFIG_FS_DAX=y |
| 524 | 581 | CONFIG_EXPORTFS_BLOCK_OPS=y |
| @@ -552,8 +609,10 @@ CONFIG_ECRYPT_FS=m · 27 unmodified lines | ||
| 552 | 609 | CONFIG_CRAMFS=m |
| 553 | 610 | CONFIG_SQUASHFS=m |
| 554 | 611 | CONFIG_SQUASHFS_XATTR=y |
| 612 | +CONFIG_SQUASHFS_LZ4=y | |
| 555 | 613 | CONFIG_SQUASHFS_LZO=y |
| 556 | 614 | CONFIG_SQUASHFS_XZ=y |
| 615 | +CONFIG_SQUASHFS_ZSTD=y | |
| 557 | 616 | CONFIG_ROMFS_FS=m |
| 558 | 617 | CONFIG_NFS_FS=m |
| 559 | 618 | CONFIG_NFS_V3_ACL=y |
| @@ -564,7 +623,6 @@ CONFIG_NFSD_V3_ACL=y · 4 unmodified lines | ||
| 564 | 623 | CONFIG_NFSD_V4=y |
| 565 | 624 | CONFIG_NFSD_V4_SECURITY_LABEL=y |
| 566 | 625 | CONFIG_CIFS=m |
| 567 | −CONFIG_CIFS_STATS=y | |
| 568 | 626 | CONFIG_CIFS_STATS2=y |
| 569 | 627 | CONFIG_CIFS_WEAK_PW_HASH=y |
| 570 | 628 | CONFIG_CIFS_UPCALL=y |
| @@ -580,19 +638,112 @@ CONFIG_NLS_ISO8859_1=m · 9 unmodified lines | ||
| 580 | 638 | CONFIG_NLS_ISO8859_15=m |
| 581 | 639 | CONFIG_NLS_UTF8=m |
| 582 | 640 | CONFIG_DLM=m |
| 641 | +CONFIG_UNICODE=y | |
| 642 | +CONFIG_PERSISTENT_KEYRINGS=y | |
| 643 | +CONFIG_BIG_KEYS=y | |
| 644 | +CONFIG_ENCRYPTED_KEYS=m | |
| 645 | +CONFIG_SECURITY=y | |
| 646 | +CONFIG_SECURITY_NETWORK=y | |
| 647 | +CONFIG_FORTIFY_SOURCE=y | |
| 648 | +CONFIG_SECURITY_SELINUX=y | |
| 649 | +CONFIG_SECURITY_SELINUX_BOOTPARAM=y | |
| 650 | +CONFIG_SECURITY_SELINUX_DISABLE=y | |
| 651 | +CONFIG_INTEGRITY_SIGNATURE=y | |
| 652 | +CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y | |
| 653 | +CONFIG_IMA=y | |
| 654 | +CONFIG_IMA_DEFAULT_HASH_SHA256=y | |
| 655 | +CONFIG_IMA_WRITE_POLICY=y | |
| 656 | +CONFIG_IMA_APPRAISE=y | |
| 657 | +CONFIG_CRYPTO_USER=m | |
| 658 | +# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set | |
| 659 | +CONFIG_CRYPTO_PCRYPT=m | |
| 660 | +CONFIG_CRYPTO_CRYPTD=m | |
| 661 | +CONFIG_CRYPTO_TEST=m | |
| 662 | +CONFIG_CRYPTO_DH=m | |
| 663 | +CONFIG_CRYPTO_ECDH=m | |
| 664 | +CONFIG_CRYPTO_ECRDSA=m | |
| 665 | +CONFIG_CRYPTO_CHACHA20POLY1305=m | |
| 666 | +CONFIG_CRYPTO_AEGIS128=m | |
| 667 | +CONFIG_CRYPTO_AEGIS128L=m | |
| 668 | +CONFIG_CRYPTO_AEGIS256=m | |
| 669 | +CONFIG_CRYPTO_MORUS640=m | |
| 670 | +CONFIG_CRYPTO_MORUS1280=m | |
| 671 | +CONFIG_CRYPTO_CFB=m | |
| 672 | +CONFIG_CRYPTO_LRW=m | |
| 673 | +CONFIG_CRYPTO_PCBC=m | |
| 674 | +CONFIG_CRYPTO_KEYWRAP=m | |
| 675 | +CONFIG_CRYPTO_ADIANTUM=m | |
| 676 | +CONFIG_CRYPTO_XCBC=m | |
| 677 | +CONFIG_CRYPTO_VMAC=m | |
| 678 | +CONFIG_CRYPTO_CRC32=m | |
| 679 | +CONFIG_CRYPTO_XXHASH=m | |
| 680 | +CONFIG_CRYPTO_MICHAEL_MIC=m | |
| 681 | +CONFIG_CRYPTO_RMD128=m | |
| 682 | +CONFIG_CRYPTO_RMD160=m | |
| 683 | +CONFIG_CRYPTO_RMD256=m | |
| 684 | +CONFIG_CRYPTO_RMD320=m | |
| 685 | +CONFIG_CRYPTO_SHA3=m | |
| 686 | +CONFIG_CRYPTO_SM3=m | |
| 687 | +CONFIG_CRYPTO_TGR192=m | |
| 688 | +CONFIG_CRYPTO_WP512=m | |
| 689 | +CONFIG_CRYPTO_AES_TI=m | |
| 690 | +CONFIG_CRYPTO_ANUBIS=m | |
| 691 | +CONFIG_CRYPTO_ARC4=m | |
| 692 | +CONFIG_CRYPTO_BLOWFISH=m | |
| 693 | +CONFIG_CRYPTO_CAMELLIA=m | |
| 694 | +CONFIG_CRYPTO_CAST5=m | |
| 695 | +CONFIG_CRYPTO_CAST6=m | |
| 696 | +CONFIG_CRYPTO_FCRYPT=m | |
| 697 | +CONFIG_CRYPTO_KHAZAD=m | |
| 698 | +CONFIG_CRYPTO_SALSA20=m | |
| 699 | +CONFIG_CRYPTO_SEED=m | |
| 700 | +CONFIG_CRYPTO_SERPENT=m | |
| 701 | +CONFIG_CRYPTO_SM4=m | |
| 702 | +CONFIG_CRYPTO_TEA=m | |
| 703 | +CONFIG_CRYPTO_TWOFISH=m | |
| 704 | +CONFIG_CRYPTO_842=m | |
| 705 | +CONFIG_CRYPTO_LZ4=m | |
| 706 | +CONFIG_CRYPTO_LZ4HC=m | |
| 707 | +CONFIG_CRYPTO_ZSTD=m | |
| 708 | +CONFIG_CRYPTO_ANSI_CPRNG=m | |
| 709 | +CONFIG_CRYPTO_USER_API_HASH=m | |
| 710 | +CONFIG_CRYPTO_USER_API_SKCIPHER=m | |
| 711 | +CONFIG_CRYPTO_USER_API_RNG=m | |
| 712 | +CONFIG_CRYPTO_USER_API_AEAD=m | |
| 713 | +CONFIG_CRYPTO_STATS=y | |
| 714 | +CONFIG_ZCRYPT=m | |
| 715 | +CONFIG_PKEY=m | |
| 716 | +CONFIG_CRYPTO_PAES_S390=m | |
| 717 | +CONFIG_CRYPTO_SHA1_S390=m | |
| 718 | +CONFIG_CRYPTO_SHA256_S390=m | |
| 719 | +CONFIG_CRYPTO_SHA512_S390=m | |
| 720 | +CONFIG_CRYPTO_DES_S390=m | |
| 721 | +CONFIG_CRYPTO_AES_S390=m | |
| 722 | +CONFIG_CRYPTO_GHASH_S390=m | |
| 723 | +CONFIG_CRYPTO_CRC32_S390=y | |
| 724 | +CONFIG_CORDIC=m | |
| 725 | +CONFIG_CRC32_SELFTEST=y | |
| 726 | +CONFIG_CRC4=m | |
| 727 | +CONFIG_CRC7=m | |
| 728 | +CONFIG_CRC8=m | |
| 729 | +CONFIG_RANDOM32_SELFTEST=y | |
| 730 | +CONFIG_DMA_CMA=y | |
| 731 | +CONFIG_CMA_SIZE_MBYTES=0 | |
| 732 | +CONFIG_DMA_API_DEBUG=y | |
| 733 | +CONFIG_STRING_SELFTEST=y | |
| 583 | 734 | CONFIG_PRINTK_TIME=y |
| 584 | 735 | CONFIG_DYNAMIC_DEBUG=y |
| 585 | 736 | CONFIG_DEBUG_INFO=y |
| 586 | 737 | CONFIG_DEBUG_INFO_DWARF4=y |
| 587 | 738 | CONFIG_GDB_SCRIPTS=y |
| 588 | 739 | CONFIG_FRAME_WARN=1024 |
| 589 | −CONFIG_READABLE_ASM=y | |
| 590 | 740 | CONFIG_UNUSED_SYMBOLS=y |
| 591 | 741 | CONFIG_HEADERS_INSTALL=y |
| 592 | 742 | CONFIG_HEADERS_CHECK=y |
| 593 | 743 | CONFIG_DEBUG_SECTION_MISMATCH=y |
| 594 | 744 | CONFIG_MAGIC_SYSRQ=y |
| 595 | 745 | CONFIG_DEBUG_PAGEALLOC=y |
| 746 | +CONFIG_PAGE_OWNER=y | |
| 596 | 747 | CONFIG_DEBUG_RODATA_TEST=y |
| 597 | 748 | CONFIG_DEBUG_OBJECTS=y |
| 598 | 749 | CONFIG_DEBUG_OBJECTS_SELFTEST=y |
| @@ -645,7 +796,6 @@ CONFIG_STACK_TRACER=y · 46 unmodified lines | ||
| 645 | 796 | CONFIG_BLK_DEV_IO_TRACE=y |
| 646 | 797 | CONFIG_FUNCTION_PROFILER=y |
| 647 | 798 | CONFIG_HIST_TRIGGERS=y |
| 648 | −CONFIG_DMA_API_DEBUG=y | |
| 649 | 799 | CONFIG_LKDTM=m |
| 650 | 800 | CONFIG_TEST_LIST_SORT=y |
| 651 | 801 | CONFIG_TEST_SORT=y |
| @@ -657,85 +807,3 @@ CONFIG_ATOMIC64_SELFTEST=y · 5 unmodified lines | ||
| 657 | 807 | CONFIG_TEST_BPF=m |
| 658 | 808 | CONFIG_BUG_ON_DATA_CORRUPTION=y |
| 659 | 809 | CONFIG_S390_PTDUMP=y |
| 660 | −CONFIG_PERSISTENT_KEYRINGS=y | |
| 661 | −CONFIG_BIG_KEYS=y | |
| 662 | −CONFIG_ENCRYPTED_KEYS=m | |
| 663 | −CONFIG_SECURITY=y | |
| 664 | −CONFIG_SECURITY_NETWORK=y | |
| 665 | −CONFIG_FORTIFY_SOURCE=y | |
| 666 | −CONFIG_SECURITY_SELINUX=y | |
| 667 | −CONFIG_SECURITY_SELINUX_BOOTPARAM=y | |
| 668 | −CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 | |
| 669 | −CONFIG_SECURITY_SELINUX_DISABLE=y | |
| 670 | −CONFIG_INTEGRITY_SIGNATURE=y | |
| 671 | −CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y | |
| 672 | −CONFIG_IMA=y | |
| 673 | −CONFIG_IMA_DEFAULT_HASH_SHA256=y | |
| 674 | −CONFIG_IMA_WRITE_POLICY=y | |
| 675 | −CONFIG_IMA_APPRAISE=y | |
| 676 | −CONFIG_CRYPTO_DH=m | |
| 677 | −CONFIG_CRYPTO_ECDH=m | |
| 678 | −CONFIG_CRYPTO_USER=m | |
| 679 | −# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set | |
| 680 | −CONFIG_CRYPTO_PCRYPT=m | |
| 681 | −CONFIG_CRYPTO_CRYPTD=m | |
| 682 | −CONFIG_CRYPTO_TEST=m | |
| 683 | −CONFIG_CRYPTO_CHACHA20POLY1305=m | |
| 684 | −CONFIG_CRYPTO_LRW=m | |
| 685 | −CONFIG_CRYPTO_PCBC=m | |
| 686 | −CONFIG_CRYPTO_KEYWRAP=m | |
| 687 | −CONFIG_CRYPTO_XCBC=m | |
| 688 | −CONFIG_CRYPTO_VMAC=m | |
| 689 | −CONFIG_CRYPTO_CRC32=m | |
| 690 | −CONFIG_CRYPTO_MICHAEL_MIC=m | |
| 691 | −CONFIG_CRYPTO_RMD128=m | |
| 692 | −CONFIG_CRYPTO_RMD160=m | |
| 693 | −CONFIG_CRYPTO_RMD256=m | |
| 694 | −CONFIG_CRYPTO_RMD320=m | |
| 695 | −CONFIG_CRYPTO_SHA512=m | |
| 696 | −CONFIG_CRYPTO_SHA3=m | |
| 697 | −CONFIG_CRYPTO_TGR192=m | |
| 698 | −CONFIG_CRYPTO_WP512=m | |
| 699 | −CONFIG_CRYPTO_AES_TI=m | |
| 700 | −CONFIG_CRYPTO_ANUBIS=m | |
| 701 | −CONFIG_CRYPTO_BLOWFISH=m | |
| 702 | −CONFIG_CRYPTO_CAMELLIA=m | |
| 703 | −CONFIG_CRYPTO_CAST5=m | |
| 704 | −CONFIG_CRYPTO_CAST6=m | |
| 705 | −CONFIG_CRYPTO_FCRYPT=m | |
| 706 | −CONFIG_CRYPTO_KHAZAD=m | |
| 707 | −CONFIG_CRYPTO_SALSA20=m | |
| 708 | −CONFIG_CRYPTO_SEED=m | |
| 709 | −CONFIG_CRYPTO_SERPENT=m | |
| 710 | −CONFIG_CRYPTO_TEA=m | |
| 711 | −CONFIG_CRYPTO_TWOFISH=m | |
| 712 | −CONFIG_CRYPTO_842=m | |
| 713 | −CONFIG_CRYPTO_LZ4=m | |
| 714 | −CONFIG_CRYPTO_LZ4HC=m | |
| 715 | −CONFIG_CRYPTO_ANSI_CPRNG=m | |
| 716 | −CONFIG_CRYPTO_USER_API_HASH=m | |
| 717 | −CONFIG_CRYPTO_USER_API_SKCIPHER=m | |
| 718 | −CONFIG_CRYPTO_USER_API_RNG=m | |
| 719 | −CONFIG_CRYPTO_USER_API_AEAD=m | |
| 720 | −CONFIG_ZCRYPT=m | |
| 721 | −CONFIG_PKEY=m | |
| 722 | −CONFIG_CRYPTO_PAES_S390=m | |
| 723 | −CONFIG_CRYPTO_SHA1_S390=m | |
| 724 | −CONFIG_CRYPTO_SHA256_S390=m | |
| 725 | −CONFIG_CRYPTO_SHA512_S390=m | |
| 726 | −CONFIG_CRYPTO_DES_S390=m | |
| 727 | −CONFIG_CRYPTO_AES_S390=m | |
| 728 | −CONFIG_CRYPTO_GHASH_S390=m | |
| 729 | −CONFIG_CRYPTO_CRC32_S390=y | |
| 730 | −CONFIG_PKCS7_MESSAGE_PARSER=y | |
| 731 | −CONFIG_SYSTEM_TRUSTED_KEYRING=y | |
| 732 | −CONFIG_CRC7=m | |
| 733 | −CONFIG_CRC8=m | |
| 734 | −CONFIG_RANDOM32_SELFTEST=y | |
| 735 | −CONFIG_CORDIC=m | |
| 736 | −CONFIG_CMM=m | |
| 737 | −CONFIG_APPLDATA_BASE=y | |
| 738 | −CONFIG_KVM=m | |
| 739 | −CONFIG_KVM_S390_UCONTROL=y | |
| 740 | −CONFIG_VHOST_NET=m | |
| 741 | −CONFIG_VHOST_VSOCK=m | |
| @@ -12,30 +12,51 @@ CONFIG_TASK_IO_ACCOUNTING=y · 11 unmodified lines | ||
| 12 | 12 | CONFIG_IKCONFIG=y |
| 13 | 13 | CONFIG_IKCONFIG_PROC=y |
| 14 | 14 | CONFIG_NUMA_BALANCING=y |
| 15 | −# CONFIG_NUMA_BALANCING_DEFAULT_ENABLED is not set | |
| 16 | 15 | CONFIG_MEMCG=y |
| 17 | 16 | CONFIG_MEMCG_SWAP=y |
| 18 | 17 | CONFIG_BLK_CGROUP=y |
| 19 | 18 | CONFIG_CFS_BANDWIDTH=y |
| 20 | 19 | CONFIG_RT_GROUP_SCHED=y |
| 21 | 20 | CONFIG_CGROUP_PIDS=y |
| 21 | +CONFIG_CGROUP_RDMA=y | |
| 22 | 22 | CONFIG_CGROUP_FREEZER=y |
| 23 | 23 | CONFIG_CGROUP_HUGETLB=y |
| 24 | 24 | CONFIG_CPUSETS=y |
| 25 | 25 | CONFIG_CGROUP_DEVICE=y |
| 26 | 26 | CONFIG_CGROUP_CPUACCT=y |
| 27 | 27 | CONFIG_CGROUP_PERF=y |
| 28 | +CONFIG_CGROUP_BPF=y | |
| 28 | 29 | CONFIG_NAMESPACES=y |
| 29 | 30 | CONFIG_USER_NS=y |
| 31 | +CONFIG_CHECKPOINT_RESTORE=y | |
| 30 | 32 | CONFIG_SCHED_AUTOGROUP=y |
| 31 | 33 | CONFIG_BLK_DEV_INITRD=y |
| 32 | 34 | CONFIG_EXPERT=y |
| 33 | 35 | # CONFIG_SYSFS_SYSCALL is not set |
| 34 | −CONFIG_CHECKPOINT_RESTORE=y | |
| 35 | 36 | CONFIG_BPF_SYSCALL=y |
| 36 | 37 | CONFIG_USERFAULTFD=y |
| 37 | 38 | # CONFIG_COMPAT_BRK is not set |
| 38 | 39 | CONFIG_PROFILING=y |
| 40 | +CONFIG_LIVEPATCH=y | |
| 41 | +CONFIG_TUNE_ZEC12=y | |
| 42 | +CONFIG_NR_CPUS=512 | |
| 43 | +CONFIG_NUMA=y | |
| 44 | +# CONFIG_NUMA_EMU is not set | |
| 45 | +CONFIG_HZ_100=y | |
| 46 | +CONFIG_KEXEC_FILE=y | |
| 47 | +CONFIG_EXPOLINE=y | |
| 48 | +CONFIG_EXPOLINE_AUTO=y | |
| 49 | +CONFIG_CHSC_SCH=y | |
| 50 | +CONFIG_VFIO_CCW=m | |
| 51 | +CONFIG_VFIO_AP=m | |
| 52 | +CONFIG_CRASH_DUMP=y | |
| 53 | +CONFIG_HIBERNATION=y | |
| 54 | +CONFIG_PM_DEBUG=y | |
| 55 | +CONFIG_CMM=m | |
| 56 | +CONFIG_APPLDATA_BASE=y | |
| 57 | +CONFIG_KVM=m | |
| 58 | +CONFIG_VHOST_NET=m | |
| 59 | +CONFIG_VHOST_VSOCK=m | |
| 39 | 60 | CONFIG_OPROFILE=m |
| 40 | 61 | CONFIG_KPROBES=y |
| 41 | 62 | CONFIG_JUMP_LABEL=y |
| @@ -47,27 +68,18 @@ CONFIG_MODVERSIONS=y · 5 unmodified lines | ||
| 47 | 68 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 48 | 69 | CONFIG_MODULE_SIG=y |
| 49 | 70 | CONFIG_MODULE_SIG_SHA256=y |
| 50 | −CONFIG_BLK_DEV_INTEGRITY=y | |
| 51 | 71 | CONFIG_BLK_DEV_THROTTLING=y |
| 52 | 72 | CONFIG_BLK_WBT=y |
| 53 | −CONFIG_BLK_WBT_SQ=y | |
| 73 | +CONFIG_BLK_CGROUP_IOLATENCY=y | |
| 54 | 74 | CONFIG_PARTITION_ADVANCED=y |
| 55 | 75 | CONFIG_IBM_PARTITION=y |
| 56 | 76 | CONFIG_BSD_DISKLABEL=y |
| 57 | 77 | CONFIG_MINIX_SUBPARTITION=y |
| 58 | 78 | CONFIG_SOLARIS_X86_PARTITION=y |
| 59 | 79 | CONFIG_UNIXWARE_DISKLABEL=y |
| 60 | −CONFIG_CFQ_GROUP_IOSCHED=y | |
| 61 | −CONFIG_DEFAULT_DEADLINE=y | |
| 62 | −CONFIG_LIVEPATCH=y | |
| 63 | −CONFIG_TUNE_ZEC12=y | |
| 64 | −CONFIG_NR_CPUS=512 | |
| 65 | −CONFIG_NUMA=y | |
| 66 | −CONFIG_HZ_100=y | |
| 67 | −CONFIG_KEXEC_FILE=y | |
| 68 | −CONFIG_KEXEC_VERIFY_SIG=y | |
| 69 | −CONFIG_EXPOLINE=y | |
| 70 | −CONFIG_EXPOLINE_AUTO=y | |
| 80 | +CONFIG_IOSCHED_BFQ=y | |
| 81 | +CONFIG_BFQ_GROUP_IOSCHED=y | |
| 82 | +CONFIG_BINFMT_MISC=m | |
| 71 | 83 | CONFIG_MEMORY_HOTPLUG=y |
| 72 | 84 | CONFIG_MEMORY_HOTREMOVE=y |
| 73 | 85 | CONFIG_KSM=y |
| @@ -81,16 +93,8 @@ CONFIG_ZSMALLOC=m · 7 unmodified lines | ||
| 81 | 93 | CONFIG_ZSMALLOC_STAT=y |
| 82 | 94 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y |
| 83 | 95 | CONFIG_IDLE_PAGE_TRACKING=y |
| 84 | −CONFIG_PCI=y | |
| 85 | −CONFIG_HOTPLUG_PCI=y | |
| 86 | −CONFIG_HOTPLUG_PCI_S390=y | |
| 87 | −CONFIG_CHSC_SCH=y | |
| 88 | −CONFIG_VFIO_AP=m | |
| 89 | −CONFIG_VFIO_CCW=m | |
| 90 | −CONFIG_CRASH_DUMP=y | |
| 91 | −CONFIG_BINFMT_MISC=m | |
| 92 | −CONFIG_HIBERNATION=y | |
| 93 | −CONFIG_PM_DEBUG=y | |
| 96 | +CONFIG_PERCPU_STATS=y | |
| 97 | +CONFIG_GUP_BENCHMARK=y | |
| 94 | 98 | CONFIG_NET=y |
| 95 | 99 | CONFIG_PACKET=y |
| 96 | 100 | CONFIG_PACKET_DIAG=m |
| @@ -119,9 +123,6 @@ CONFIG_NET_IPVTI=m · 22 unmodified lines | ||
| 119 | 123 | CONFIG_INET_AH=m |
| 120 | 124 | CONFIG_INET_ESP=m |
| 121 | 125 | CONFIG_INET_IPCOMP=m |
| 122 | −CONFIG_INET_XFRM_MODE_TRANSPORT=m | |
| 123 | −CONFIG_INET_XFRM_MODE_TUNNEL=m | |
| 124 | −CONFIG_INET_XFRM_MODE_BEET=m | |
| 125 | 126 | CONFIG_INET_DIAG=m |
| 126 | 127 | CONFIG_INET_UDP_DIAG=m |
| 127 | 128 | CONFIG_TCP_CONG_ADVANCED=y |
| @@ -137,10 +138,6 @@ CONFIG_INET6_AH=m · 9 unmodified lines | ||
| 137 | 138 | CONFIG_INET6_ESP=m |
| 138 | 139 | CONFIG_INET6_IPCOMP=m |
| 139 | 140 | CONFIG_IPV6_MIP6=m |
| 140 | −CONFIG_INET6_XFRM_MODE_TRANSPORT=m | |
| 141 | −CONFIG_INET6_XFRM_MODE_TUNNEL=m | |
| 142 | −CONFIG_INET6_XFRM_MODE_BEET=m | |
| 143 | −CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | |
| 144 | 141 | CONFIG_IPV6_VTI=m |
| 145 | 142 | CONFIG_IPV6_SIT=m |
| 146 | 143 | CONFIG_IPV6_GRE=m |
| @@ -262,11 +259,8 @@ CONFIG_IP_VS_SED=m · 115 unmodified lines | ||
| 262 | 259 | CONFIG_IP_VS_NQ=m |
| 263 | 260 | CONFIG_IP_VS_FTP=m |
| 264 | 261 | CONFIG_IP_VS_PE_SIP=m |
| 265 | −CONFIG_NF_CONNTRACK_IPV4=m | |
| 266 | 262 | CONFIG_NF_TABLES_IPV4=y |
| 267 | −CONFIG_NFT_CHAIN_ROUTE_IPV4=m | |
| 268 | 263 | CONFIG_NF_TABLES_ARP=y |
| 269 | −CONFIG_NFT_CHAIN_NAT_IPV4=m | |
| 270 | 264 | CONFIG_IP_NF_IPTABLES=m |
| 271 | 265 | CONFIG_IP_NF_MATCH_AH=m |
| 272 | 266 | CONFIG_IP_NF_MATCH_ECN=m |
| @@ -285,10 +279,7 @@ CONFIG_IP_NF_SECURITY=m · 12 unmodified lines | ||
| 285 | 279 | CONFIG_IP_NF_ARPTABLES=m |
| 286 | 280 | CONFIG_IP_NF_ARPFILTER=m |
| 287 | 281 | CONFIG_IP_NF_ARP_MANGLE=m |
| 288 | −CONFIG_NF_CONNTRACK_IPV6=m | |
| 289 | 282 | CONFIG_NF_TABLES_IPV6=y |
| 290 | −CONFIG_NFT_CHAIN_ROUTE_IPV6=m | |
| 291 | −CONFIG_NFT_CHAIN_NAT_IPV6=m | |
| 292 | 283 | CONFIG_IP6_NF_IPTABLES=m |
| 293 | 284 | CONFIG_IP6_NF_MATCH_AH=m |
| 294 | 285 | CONFIG_IP6_NF_MATCH_EUI64=m |
| @@ -307,7 +298,7 @@ CONFIG_IP6_NF_RAW=m · 12 unmodified lines | ||
| 307 | 298 | CONFIG_IP6_NF_SECURITY=m |
| 308 | 299 | CONFIG_IP6_NF_NAT=m |
| 309 | 300 | CONFIG_IP6_NF_TARGET_MASQUERADE=m |
| 310 | −CONFIG_NF_TABLES_BRIDGE=y | |
| 301 | +CONFIG_NF_TABLES_BRIDGE=m | |
| 311 | 302 | CONFIG_RDS=m |
| 312 | 303 | CONFIG_RDS_RDMA=m |
| 313 | 304 | CONFIG_RDS_TCP=m |
| @@ -372,9 +363,11 @@ CONFIG_NETLINK_DIAG=m · 58 unmodified lines | ||
| 372 | 363 | CONFIG_CGROUP_NET_PRIO=y |
| 373 | 364 | CONFIG_BPF_JIT=y |
| 374 | 365 | CONFIG_NET_PKTGEN=m |
| 366 | +CONFIG_PCI=y | |
| 367 | +CONFIG_HOTPLUG_PCI=y | |
| 368 | +CONFIG_HOTPLUG_PCI_S390=y | |
| 369 | +CONFIG_UEVENT_HELPER=y | |
| 375 | 370 | CONFIG_DEVTMPFS=y |
| 376 | −CONFIG_DMA_CMA=y | |
| 377 | −CONFIG_CMA_SIZE_MBYTES=0 | |
| 378 | 371 | CONFIG_CONNECTOR=y |
| 379 | 372 | CONFIG_ZRAM=m |
| 380 | 373 | CONFIG_BLK_DEV_LOOP=m |
| @@ -383,6 +376,7 @@ CONFIG_BLK_DEV_DRBD=m · 2 unmodified lines | ||
| 383 | 376 | CONFIG_BLK_DEV_NBD=m |
| 384 | 377 | CONFIG_BLK_DEV_RAM=y |
| 385 | 378 | CONFIG_BLK_DEV_RAM_SIZE=32768 |
| 379 | +# CONFIG_BLK_DEV_XPRAM is not set | |
| 386 | 380 | CONFIG_VIRTIO_BLK=y |
| 387 | 381 | CONFIG_BLK_DEV_RBD=m |
| 388 | 382 | CONFIG_BLK_DEV_NVME=m |
| @@ -392,7 +386,6 @@ CONFIG_RAID_ATTRS=m · 3 unmodified lines | ||
| 392 | 386 | CONFIG_SCSI=y |
| 393 | 387 | CONFIG_BLK_DEV_SD=y |
| 394 | 388 | CONFIG_CHR_DEV_ST=m |
| 395 | −CONFIG_CHR_DEV_OSST=m | |
| 396 | 389 | CONFIG_BLK_DEV_SR=m |
| 397 | 390 | CONFIG_CHR_DEV_SG=y |
| 398 | 391 | CONFIG_CHR_DEV_SCH=m |
| @@ -412,17 +405,19 @@ CONFIG_SCSI_DH_RDAC=m · 13 unmodified lines | ||
| 412 | 405 | CONFIG_SCSI_DH_HP_SW=m |
| 413 | 406 | CONFIG_SCSI_DH_EMC=m |
| 414 | 407 | CONFIG_SCSI_DH_ALUA=m |
| 415 | −CONFIG_SCSI_OSD_INITIATOR=m | |
| 416 | −CONFIG_SCSI_OSD_ULD=m | |
| 417 | 408 | CONFIG_MD=y |
| 418 | 409 | CONFIG_BLK_DEV_MD=y |
| 419 | 410 | CONFIG_MD_LINEAR=m |
| 420 | 411 | CONFIG_MD_MULTIPATH=m |
| 421 | 412 | CONFIG_MD_FAULTY=m |
| 413 | +CONFIG_MD_CLUSTER=m | |
| 414 | +CONFIG_BCACHE=m | |
| 422 | 415 | CONFIG_BLK_DEV_DM=m |
| 416 | +CONFIG_DM_UNSTRIPED=m | |
| 423 | 417 | CONFIG_DM_CRYPT=m |
| 424 | 418 | CONFIG_DM_SNAPSHOT=m |
| 425 | 419 | CONFIG_DM_THIN_PROVISIONING=m |
| 420 | +CONFIG_DM_WRITECACHE=m | |
| 426 | 421 | CONFIG_DM_MIRROR=m |
| 427 | 422 | CONFIG_DM_LOG_USERSPACE=m |
| 428 | 423 | CONFIG_DM_RAID=m |
| @@ -435,6 +430,7 @@ CONFIG_DM_UEVENT=y · 6 unmodified lines | ||
| 435 | 430 | CONFIG_DM_FLAKEY=m |
| 436 | 431 | CONFIG_DM_VERITY=m |
| 437 | 432 | CONFIG_DM_SWITCH=m |
| 433 | +CONFIG_DM_INTEGRITY=m | |
| 438 | 434 | CONFIG_NETDEVICES=y |
| 439 | 435 | CONFIG_BONDING=m |
| 440 | 436 | CONFIG_DUMMY=m |
| @@ -442,23 +438,78 @@ CONFIG_EQUALIZER=m · 1 unmodified line | ||
| 442 | 438 | CONFIG_IFB=m |
| 443 | 439 | CONFIG_MACVLAN=m |
| 444 | 440 | CONFIG_MACVTAP=m |
| 445 | −CONFIG_VXLAN=m | |
| 446 | 441 | CONFIG_TUN=m |
| 447 | 442 | CONFIG_VETH=m |
| 448 | 443 | CONFIG_VIRTIO_NET=m |
| 449 | 444 | CONFIG_NLMON=m |
| 445 | +# CONFIG_NET_VENDOR_3COM is not set | |
| 446 | +# CONFIG_NET_VENDOR_ADAPTEC is not set | |
| 447 | +# CONFIG_NET_VENDOR_AGERE is not set | |
| 448 | +# CONFIG_NET_VENDOR_ALACRITECH is not set | |
| 449 | +# CONFIG_NET_VENDOR_ALTEON is not set | |
| 450 | +# CONFIG_NET_VENDOR_AMAZON is not set | |
| 451 | +# CONFIG_NET_VENDOR_AMD is not set | |
| 452 | +# CONFIG_NET_VENDOR_AQUANTIA is not set | |
| 450 | 453 | # CONFIG_NET_VENDOR_ARC is not set |
| 454 | +# CONFIG_NET_VENDOR_ATHEROS is not set | |
| 455 | +# CONFIG_NET_VENDOR_AURORA is not set | |
| 456 | +# CONFIG_NET_VENDOR_BROADCOM is not set | |
| 457 | +# CONFIG_NET_VENDOR_BROCADE is not set | |
| 458 | +# CONFIG_NET_VENDOR_CADENCE is not set | |
| 459 | +# CONFIG_NET_VENDOR_CAVIUM is not set | |
| 451 | 460 | # CONFIG_NET_VENDOR_CHELSIO is not set |
| 461 | +# CONFIG_NET_VENDOR_CISCO is not set | |
| 462 | +# CONFIG_NET_VENDOR_CORTINA is not set | |
| 463 | +# CONFIG_NET_VENDOR_DEC is not set | |
| 464 | +# CONFIG_NET_VENDOR_DLINK is not set | |
| 465 | +# CONFIG_NET_VENDOR_EMULEX is not set | |
| 466 | +# CONFIG_NET_VENDOR_EZCHIP is not set | |
| 467 | +# CONFIG_NET_VENDOR_GOOGLE is not set | |
| 468 | +# CONFIG_NET_VENDOR_HP is not set | |
| 469 | +# CONFIG_NET_VENDOR_HUAWEI is not set | |
| 452 | 470 | # CONFIG_NET_VENDOR_INTEL is not set |
| 453 | 471 | # CONFIG_NET_VENDOR_MARVELL is not set |
| 454 | 472 | CONFIG_MLX4_EN=m |
| 455 | 473 | CONFIG_MLX5_CORE=m |
| 456 | 474 | CONFIG_MLX5_CORE_EN=y |
| 475 | +# CONFIG_MLXFW is not set | |
| 476 | +# CONFIG_NET_VENDOR_MICREL is not set | |
| 477 | +# CONFIG_NET_VENDOR_MICROCHIP is not set | |
| 478 | +# CONFIG_NET_VENDOR_MICROSEMI is not set | |
| 479 | +# CONFIG_NET_VENDOR_MYRI is not set | |
| 457 | 480 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 481 | +# CONFIG_NET_VENDOR_NETERION is not set | |
| 482 | +# CONFIG_NET_VENDOR_NETRONOME is not set | |
| 483 | +# CONFIG_NET_VENDOR_NI is not set | |
| 484 | +# CONFIG_NET_VENDOR_NVIDIA is not set | |
| 485 | +# CONFIG_NET_VENDOR_OKI is not set | |
| 486 | +# CONFIG_NET_VENDOR_PACKET_ENGINES is not set | |
| 487 | +# CONFIG_NET_VENDOR_QLOGIC is not set | |
| 488 | +# CONFIG_NET_VENDOR_QUALCOMM is not set | |
| 489 | +# CONFIG_NET_VENDOR_RDC is not set | |
| 490 | +# CONFIG_NET_VENDOR_REALTEK is not set | |
| 491 | +# CONFIG_NET_VENDOR_RENESAS is not set | |
| 492 | +# CONFIG_NET_VENDOR_ROCKER is not set | |
| 493 | +# CONFIG_NET_VENDOR_SAMSUNG is not set | |
| 494 | +# CONFIG_NET_VENDOR_SEEQ is not set | |
| 495 | +# CONFIG_NET_VENDOR_SOLARFLARE is not set | |
| 496 | +# CONFIG_NET_VENDOR_SILAN is not set | |
| 497 | +# CONFIG_NET_VENDOR_SIS is not set | |
| 498 | +# CONFIG_NET_VENDOR_SMSC is not set | |
| 499 | +# CONFIG_NET_VENDOR_SOCIONEXT is not set | |
| 500 | +# CONFIG_NET_VENDOR_STMICRO is not set | |
| 501 | +# CONFIG_NET_VENDOR_SUN is not set | |
| 502 | +# CONFIG_NET_VENDOR_SYNOPSYS is not set | |
| 503 | +# CONFIG_NET_VENDOR_TEHUTI is not set | |
| 504 | +# CONFIG_NET_VENDOR_TI is not set | |
| 505 | +# CONFIG_NET_VENDOR_VIA is not set | |
| 506 | +# CONFIG_NET_VENDOR_WIZNET is not set | |
| 458 | 507 | CONFIG_PPP=m |
| 459 | 508 | CONFIG_PPP_BSDCOMP=m |
| 460 | 509 | CONFIG_PPP_DEFLATE=m |
| 510 | +CONFIG_PPP_FILTER=y | |
| 461 | 511 | CONFIG_PPP_MPPE=m |
| 512 | +CONFIG_PPP_MULTILINK=y | |
| 462 | 513 | CONFIG_PPPOE=m |
| 463 | 514 | CONFIG_PPTP=m |
| 464 | 515 | CONFIG_PPPOL2TP=m |
| @@ -470,17 +521,21 @@ CONFIG_INPUT_EVDEV=y · 5 unmodified lines | ||
| 470 | 521 | # CONFIG_INPUT_MOUSE is not set |
| 471 | 522 | # CONFIG_SERIO is not set |
| 472 | 523 | CONFIG_LEGACY_PTY_COUNT=0 |
| 524 | +CONFIG_NULL_TTY=m | |
| 473 | 525 | CONFIG_HW_RANDOM_VIRTIO=m |
| 474 | 526 | CONFIG_RAW_DRIVER=m |
| 475 | 527 | CONFIG_HANGCHECK_TIMER=m |
| 476 | 528 | CONFIG_TN3270_FS=y |
| 529 | +# CONFIG_PTP_1588_CLOCK is not set | |
| 477 | 530 | # CONFIG_HWMON is not set |
| 478 | 531 | CONFIG_WATCHDOG=y |
| 532 | +CONFIG_WATCHDOG_CORE=y | |
| 479 | 533 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 480 | 534 | CONFIG_SOFT_WATCHDOG=m |
| 481 | 535 | CONFIG_DIAG288_WATCHDOG=m |
| 482 | 536 | CONFIG_DRM=y |
| 483 | 537 | CONFIG_DRM_VIRTIO_GPU=y |
| 538 | +# CONFIG_BACKLIGHT_CLASS_DEVICE is not set | |
| 484 | 539 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 485 | 540 | # CONFIG_HID is not set |
| 486 | 541 | # CONFIG_USB_SUPPORT is not set |
| @@ -495,8 +550,8 @@ CONFIG_VFIO_MDEV_DEVICE=m · 8 unmodified lines | ||
| 495 | 550 | CONFIG_VIRTIO_PCI=m |
| 496 | 551 | CONFIG_VIRTIO_BALLOON=m |
| 497 | 552 | CONFIG_VIRTIO_INPUT=y |
| 498 | −CONFIG_S390_AP_IOMMU=y | |
| 499 | 553 | CONFIG_S390_CCW_IOMMU=y |
| 554 | +CONFIG_S390_AP_IOMMU=y | |
| 500 | 555 | CONFIG_EXT4_FS=y |
| 501 | 556 | CONFIG_EXT4_FS_POSIX_ACL=y |
| 502 | 557 | CONFIG_EXT4_FS_SECURITY=y |
| @@ -546,8 +601,10 @@ CONFIG_ECRYPT_FS=m · 43 unmodified lines | ||
| 546 | 601 | CONFIG_CRAMFS=m |
| 547 | 602 | CONFIG_SQUASHFS=m |
| 548 | 603 | CONFIG_SQUASHFS_XATTR=y |
| 604 | +CONFIG_SQUASHFS_LZ4=y | |
| 549 | 605 | CONFIG_SQUASHFS_LZO=y |
| 550 | 606 | CONFIG_SQUASHFS_XZ=y |
| 607 | +CONFIG_SQUASHFS_ZSTD=y | |
| 551 | 608 | CONFIG_ROMFS_FS=m |
| 552 | 609 | CONFIG_NFS_FS=m |
| 553 | 610 | CONFIG_NFS_V3_ACL=y |
| @@ -558,7 +615,6 @@ CONFIG_NFSD_V3_ACL=y · 4 unmodified lines | ||
| 558 | 615 | CONFIG_NFSD_V4=y |
| 559 | 616 | CONFIG_NFSD_V4_SECURITY_LABEL=y |
| 560 | 617 | CONFIG_CIFS=m |
| 561 | −CONFIG_CIFS_STATS=y | |
| 562 | 618 | CONFIG_CIFS_STATS2=y |
| 563 | 619 | CONFIG_CIFS_WEAK_PW_HASH=y |
| 564 | 620 | CONFIG_CIFS_UPCALL=y |
| @@ -574,31 +630,7 @@ CONFIG_NLS_ISO8859_1=m · 9 unmodified lines | ||
| 574 | 630 | CONFIG_NLS_ISO8859_15=m |
| 575 | 631 | CONFIG_NLS_UTF8=m |
| 576 | 632 | CONFIG_DLM=m |
| 577 | −CONFIG_PRINTK_TIME=y | |
| 578 | −CONFIG_DEBUG_INFO=y | |
| 579 | −CONFIG_DEBUG_INFO_DWARF4=y | |
| 580 | −CONFIG_GDB_SCRIPTS=y | |
| 581 | −# CONFIG_ENABLE_MUST_CHECK is not set | |
| 582 | −CONFIG_FRAME_WARN=1024 | |
| 583 | −CONFIG_UNUSED_SYMBOLS=y | |
| 584 | −CONFIG_MAGIC_SYSRQ=y | |
| 585 | −CONFIG_DEBUG_MEMORY_INIT=y | |
| 586 | −CONFIG_PANIC_ON_OOPS=y | |
| 587 | −CONFIG_RCU_TORTURE_TEST=m | |
| 588 | −CONFIG_RCU_CPU_STALL_TIMEOUT=60 | |
| 589 | −CONFIG_LATENCYTOP=y | |
| 590 | −CONFIG_SCHED_TRACER=y | |
| 591 | −CONFIG_FTRACE_SYSCALLS=y | |
| 592 | −CONFIG_STACK_TRACER=y | |
| 593 | −CONFIG_BLK_DEV_IO_TRACE=y | |
| 594 | −CONFIG_FUNCTION_PROFILER=y | |
| 595 | −CONFIG_HIST_TRIGGERS=y | |
| 596 | −CONFIG_LKDTM=m | |
| 597 | −CONFIG_PERCPU_TEST=m | |
| 598 | −CONFIG_ATOMIC64_SELFTEST=y | |
| 599 | −CONFIG_TEST_BPF=m | |
| 600 | −CONFIG_BUG_ON_DATA_CORRUPTION=y | |
| 601 | −CONFIG_S390_PTDUMP=y | |
| 633 | +CONFIG_UNICODE=y | |
| 602 | 634 | CONFIG_PERSISTENT_KEYRINGS=y |
| 603 | 635 | CONFIG_BIG_KEYS=y |
| 604 | 636 | CONFIG_ENCRYPTED_KEYS=m |
| @@ -606,7 +638,6 @@ CONFIG_SECURITY=y · 1 unmodified line | ||
| 606 | 638 | CONFIG_SECURITY_NETWORK=y |
| 607 | 639 | CONFIG_SECURITY_SELINUX=y |
| 608 | 640 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 609 | −CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0 | |
| 610 | 641 | CONFIG_SECURITY_SELINUX_DISABLE=y |
| 611 | 642 | CONFIG_INTEGRITY_SIGNATURE=y |
| 612 | 643 | CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y |
| @@ -615,31 +646,42 @@ CONFIG_IMA_DEFAULT_HASH_SHA256=y · 2 unmodified lines | ||
| 615 | 646 | CONFIG_IMA_WRITE_POLICY=y |
| 616 | 647 | CONFIG_IMA_APPRAISE=y |
| 617 | 648 | CONFIG_CRYPTO_FIPS=y |
| 618 | −CONFIG_CRYPTO_DH=m | |
| 619 | −CONFIG_CRYPTO_ECDH=m | |
| 620 | 649 | CONFIG_CRYPTO_USER=m |
| 621 | 650 | # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set |
| 622 | 651 | CONFIG_CRYPTO_PCRYPT=m |
| 623 | 652 | CONFIG_CRYPTO_CRYPTD=m |
| 624 | 653 | CONFIG_CRYPTO_TEST=m |
| 654 | +CONFIG_CRYPTO_DH=m | |
| 655 | +CONFIG_CRYPTO_ECDH=m | |
| 656 | +CONFIG_CRYPTO_ECRDSA=m | |
| 625 | 657 | CONFIG_CRYPTO_CHACHA20POLY1305=m |
| 658 | +CONFIG_CRYPTO_AEGIS128=m | |
| 659 | +CONFIG_CRYPTO_AEGIS128L=m | |
| 660 | +CONFIG_CRYPTO_AEGIS256=m | |
| 661 | +CONFIG_CRYPTO_MORUS640=m | |
| 662 | +CONFIG_CRYPTO_MORUS1280=m | |
| 663 | +CONFIG_CRYPTO_CFB=m | |
| 626 | 664 | CONFIG_CRYPTO_LRW=m |
| 665 | +CONFIG_CRYPTO_OFB=m | |
| 627 | 666 | CONFIG_CRYPTO_PCBC=m |
| 628 | 667 | CONFIG_CRYPTO_KEYWRAP=m |
| 668 | +CONFIG_CRYPTO_ADIANTUM=m | |
| 629 | 669 | CONFIG_CRYPTO_XCBC=m |
| 630 | 670 | CONFIG_CRYPTO_VMAC=m |
| 631 | 671 | CONFIG_CRYPTO_CRC32=m |
| 672 | +CONFIG_CRYPTO_XXHASH=m | |
| 632 | 673 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 633 | 674 | CONFIG_CRYPTO_RMD128=m |
| 634 | 675 | CONFIG_CRYPTO_RMD160=m |
| 635 | 676 | CONFIG_CRYPTO_RMD256=m |
| 636 | 677 | CONFIG_CRYPTO_RMD320=m |
| 637 | −CONFIG_CRYPTO_SHA512=m | |
| 638 | 678 | CONFIG_CRYPTO_SHA3=m |
| 679 | +CONFIG_CRYPTO_SM3=m | |
| 639 | 680 | CONFIG_CRYPTO_TGR192=m |
| 640 | 681 | CONFIG_CRYPTO_WP512=m |
| 641 | 682 | CONFIG_CRYPTO_AES_TI=m |
| 642 | 683 | CONFIG_CRYPTO_ANUBIS=m |
| 684 | +CONFIG_CRYPTO_ARC4=m | |
| 643 | 685 | CONFIG_CRYPTO_BLOWFISH=m |
| 644 | 686 | CONFIG_CRYPTO_CAMELLIA=m |
| 645 | 687 | CONFIG_CRYPTO_CAST5=m |
| @@ -649,16 +691,19 @@ CONFIG_CRYPTO_KHAZAD=m · 3 unmodified lines | ||
| 649 | 691 | CONFIG_CRYPTO_SALSA20=m |
| 650 | 692 | CONFIG_CRYPTO_SEED=m |
| 651 | 693 | CONFIG_CRYPTO_SERPENT=m |
| 694 | +CONFIG_CRYPTO_SM4=m | |
| 652 | 695 | CONFIG_CRYPTO_TEA=m |
| 653 | 696 | CONFIG_CRYPTO_TWOFISH=m |
| 654 | 697 | CONFIG_CRYPTO_842=m |
| 655 | 698 | CONFIG_CRYPTO_LZ4=m |
| 656 | 699 | CONFIG_CRYPTO_LZ4HC=m |
| 700 | +CONFIG_CRYPTO_ZSTD=m | |
| 657 | 701 | CONFIG_CRYPTO_ANSI_CPRNG=m |
| 658 | 702 | CONFIG_CRYPTO_USER_API_HASH=m |
| 659 | 703 | CONFIG_CRYPTO_USER_API_SKCIPHER=m |
| 660 | 704 | CONFIG_CRYPTO_USER_API_RNG=m |
| 661 | 705 | CONFIG_CRYPTO_USER_API_AEAD=m |
| 706 | +CONFIG_CRYPTO_STATS=y | |
| 662 | 707 | CONFIG_ZCRYPT=m |
| 663 | 708 | CONFIG_PKEY=m |
| 664 | 709 | CONFIG_CRYPTO_PAES_S390=m |
| @@ -669,12 +714,34 @@ CONFIG_CRYPTO_DES_S390=m · 4 unmodified lines | ||
| 669 | 714 | CONFIG_CRYPTO_AES_S390=m |
| 670 | 715 | CONFIG_CRYPTO_GHASH_S390=m |
| 671 | 716 | CONFIG_CRYPTO_CRC32_S390=y |
| 717 | +CONFIG_CORDIC=m | |
| 718 | +CONFIG_CRC4=m | |
| 672 | 719 | CONFIG_CRC7=m |
| 673 | 720 | CONFIG_CRC8=m |
| 674 | −CONFIG_CORDIC=m | |
| 675 | −CONFIG_CMM=m | |
| 676 | −CONFIG_APPLDATA_BASE=y | |
| 677 | −CONFIG_KVM=m | |
| 678 | −CONFIG_KVM_S390_UCONTROL=y | |
| 679 | −CONFIG_VHOST_NET=m | |
| 680 | −CONFIG_VHOST_VSOCK=m | |
| 721 | +CONFIG_DMA_CMA=y | |
| 722 | +CONFIG_CMA_SIZE_MBYTES=0 | |
| 723 | +CONFIG_PRINTK_TIME=y | |
| 724 | +CONFIG_DEBUG_INFO=y | |
| 725 | +CONFIG_DEBUG_INFO_DWARF4=y | |
| 726 | +CONFIG_GDB_SCRIPTS=y | |
| 727 | +CONFIG_FRAME_WARN=1024 | |
| 728 | +CONFIG_UNUSED_SYMBOLS=y | |
| 729 | +CONFIG_DEBUG_SECTION_MISMATCH=y | |
| 730 | +CONFIG_MAGIC_SYSRQ=y | |
| 731 | +CONFIG_DEBUG_MEMORY_INIT=y | |
| 732 | +CONFIG_PANIC_ON_OOPS=y | |
| 733 | +CONFIG_RCU_TORTURE_TEST=m | |
| 734 | +CONFIG_RCU_CPU_STALL_TIMEOUT=60 | |
| 735 | +CONFIG_LATENCYTOP=y | |
| 736 | +CONFIG_SCHED_TRACER=y | |
| 737 | +CONFIG_FTRACE_SYSCALLS=y | |
| 738 | +CONFIG_STACK_TRACER=y | |
| 739 | +CONFIG_BLK_DEV_IO_TRACE=y | |
| 740 | +CONFIG_FUNCTION_PROFILER=y | |
| 741 | +CONFIG_HIST_TRIGGERS=y | |
| 742 | +CONFIG_LKDTM=m | |
| 743 | +CONFIG_PERCPU_TEST=m | |
| 744 | +CONFIG_ATOMIC64_SELFTEST=y | |
| 745 | +CONFIG_TEST_BPF=m | |
| 746 | +CONFIG_BUG_ON_DATA_CORRUPTION=y | |
| 747 | +CONFIG_S390_PTDUMP=y | |
| @@ -1,27 +1,33 @@ | ||
| 1 | 1 | # CONFIG_SWAP is not set |
| 2 | 2 | CONFIG_NO_HZ_IDLE=y |
| 3 | 3 | CONFIG_HIGH_RES_TIMERS=y |
| 4 | +# CONFIG_CPU_ISOLATION is not set | |
| 5 | +# CONFIG_UTS_NS is not set | |
| 6 | +# CONFIG_PID_NS is not set | |
| 7 | +# CONFIG_NET_NS is not set | |
| 4 | 8 | CONFIG_BLK_DEV_INITRD=y |
| 5 | 9 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 6 | 10 | # CONFIG_COMPAT_BRK is not set |
| 7 | −CONFIG_PARTITION_ADVANCED=y | |
| 8 | −CONFIG_IBM_PARTITION=y | |
| 9 | −CONFIG_DEFAULT_DEADLINE=y | |
| 10 | 11 | CONFIG_TUNE_ZEC12=y |
| 11 | 12 | # CONFIG_COMPAT is not set |
| 12 | 13 | CONFIG_NR_CPUS=2 |
| 13 | −# CONFIG_HOTPLUG_CPU is not set | |
| 14 | 14 | CONFIG_HZ_100=y |
| 15 | 15 | # CONFIG_ARCH_RANDOM is not set |
| 16 | −# CONFIG_COMPACTION is not set | |
| 17 | −# CONFIG_MIGRATION is not set | |
| 18 | −# CONFIG_BOUNCE is not set | |
| 19 | −# CONFIG_CHECK_STACK is not set | |
| 16 | +# CONFIG_RELOCATABLE is not set | |
| 20 | 17 | # CONFIG_CHSC_SCH is not set |
| 21 | 18 | # CONFIG_SCM_BUS is not set |
| 22 | 19 | CONFIG_CRASH_DUMP=y |
| 23 | −# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 24 | 20 | # CONFIG_SECCOMP is not set |
| 21 | +# CONFIG_PFAULT is not set | |
| 22 | +# CONFIG_S390_HYPFS_FS is not set | |
| 23 | +# CONFIG_VIRTUALIZATION is not set | |
| 24 | +# CONFIG_S390_GUEST is not set | |
| 25 | +CONFIG_PARTITION_ADVANCED=y | |
| 26 | +CONFIG_IBM_PARTITION=y | |
| 27 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 28 | +# CONFIG_COMPACTION is not set | |
| 29 | +# CONFIG_MIGRATION is not set | |
| 30 | +# CONFIG_BOUNCE is not set | |
| 25 | 31 | CONFIG_NET=y |
| 26 | 32 | # CONFIG_IUCV is not set |
| 27 | 33 | CONFIG_DEVTMPFS=y |
| @@ -43,7 +49,6 @@ CONFIG_ZFCP=y · 15 unmodified lines | ||
| 43 | 49 | # CONFIG_HVC_IUCV is not set |
| 44 | 50 | # CONFIG_HW_RANDOM_S390 is not set |
| 45 | 51 | CONFIG_RAW_DRIVER=y |
| 46 | −# CONFIG_SCLP_ASYNC is not set | |
| 47 | 52 | # CONFIG_HMC_DRV is not set |
| 48 | 53 | # CONFIG_S390_TAPE is not set |
| 49 | 54 | # CONFIG_VMCP is not set |
| @@ -56,6 +61,7 @@ CONFIG_RAW_DRIVER=y · 6 unmodified lines | ||
| 56 | 61 | CONFIG_CONFIGFS_FS=y |
| 57 | 62 | # CONFIG_MISC_FILESYSTEMS is not set |
| 58 | 63 | # CONFIG_NETWORK_FILESYSTEMS is not set |
| 64 | +# CONFIG_DIMLIB is not set | |
| 59 | 65 | CONFIG_PRINTK_TIME=y |
| 60 | 66 | CONFIG_DEBUG_INFO=y |
| 61 | 67 | CONFIG_DEBUG_FS=y |
| @@ -64,7 +70,4 @@ CONFIG_PANIC_ON_OOPS=y · 2 unmodified lines | ||
| 64 | 70 | # CONFIG_SCHED_DEBUG is not set |
| 65 | 71 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| 66 | 72 | # CONFIG_FTRACE is not set |
| 67 | −# CONFIG_PFAULT is not set | |
| 68 | −# CONFIG_S390_HYPFS_FS is not set | |
| 69 | −# CONFIG_VIRTUALIZATION is not set | |
| 70 | −# CONFIG_S390_GUEST is not set | |
| 73 | +# CONFIG_RUNTIME_TESTING_MENU is not set | |
| @@ -118,7 +118,7 @@ do { \ · 117 unmodified lines | ||
| 118 | 118 | return PTR_ERR(rc); \ |
| 119 | 119 | } while(0) |
| 120 | 120 | |
| 121 | −static int hpyfs_vm_create_guest(struct dentry *systems_dir, | |
| 121 | +static int hypfs_vm_create_guest(struct dentry *systems_dir, | |
| 122 | 122 | struct diag2fc_data *data) |
| 123 | 123 | { |
| 124 | 124 | char guest_name[NAME_LEN + 1] = {}; |
| @@ -219,7 +219,7 @@ int hypfs_vm_create_files(struct dentry *root) · 94 unmodified lines | ||
| 219 | 219 | } |
| 220 | 220 | |
| 221 | 221 | for (i = 0; i < count; i++) { |
| 222 | − rc = hpyfs_vm_create_guest(dir, &(data[i])); | |
| 222 | + rc = hypfs_vm_create_guest(dir, &(data[i])); | |
| 223 | 223 | if (rc) |
| 224 | 224 | goto failed; |
| 225 | 225 | } |
| @@ -35,6 +35,7 @@ · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | #include <linux/typecheck.h> |
| 37 | 37 | #include <linux/compiler.h> |
| 38 | +#include <linux/types.h> | |
| 38 | 39 | #include <asm/atomic_ops.h> |
| 39 | 40 | #include <asm/barrier.h> |
| 40 | 41 | |
| @@ -55,7 +56,7 @@ __bitops_byte(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | ||
| 55 | 56 | return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3); |
| 56 | 57 | } |
| 57 | 58 | |
| 58 | −static inline void set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 59 | +static inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 59 | 60 | { |
| 60 | 61 | unsigned long *addr = __bitops_word(nr, ptr); |
| 61 | 62 | unsigned long mask; |
| @@ -76,7 +77,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | ||
| 76 | 77 | __atomic64_or(mask, (long *)addr); |
| 77 | 78 | } |
| 78 | 79 | |
| 79 | −static inline void clear_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 80 | +static inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 80 | 81 | { |
| 81 | 82 | unsigned long *addr = __bitops_word(nr, ptr); |
| 82 | 83 | unsigned long mask; |
| @@ -97,7 +98,8 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | ||
| 97 | 98 | __atomic64_and(mask, (long *)addr); |
| 98 | 99 | } |
| 99 | 100 | |
| 100 | −static inline void change_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 101 | +static inline void arch_change_bit(unsigned long nr, | |
| 102 | + volatile unsigned long *ptr) | |
| 101 | 103 | { |
| 102 | 104 | unsigned long *addr = __bitops_word(nr, ptr); |
| 103 | 105 | unsigned long mask; |
| @@ -118,8 +120,8 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | ||
| 118 | 120 | __atomic64_xor(mask, (long *)addr); |
| 119 | 121 | } |
| 120 | 122 | |
| 121 | −static inline int | |
| 122 | −test_and_set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 123 | +static inline bool arch_test_and_set_bit(unsigned long nr, | |
| 124 | + volatile unsigned long *ptr) | |
| 123 | 125 | { |
| 124 | 126 | unsigned long *addr = __bitops_word(nr, ptr); |
| 125 | 127 | unsigned long old, mask; |
| @@ -129,8 +131,8 @@ test_and_set_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 129 | 131 | return (old & mask) != 0; |
| 130 | 132 | } |
| 131 | 133 | |
| 132 | −static inline int | |
| 133 | −test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 134 | +static inline bool arch_test_and_clear_bit(unsigned long nr, | |
| 135 | + volatile unsigned long *ptr) | |
| 134 | 136 | { |
| 135 | 137 | unsigned long *addr = __bitops_word(nr, ptr); |
| 136 | 138 | unsigned long old, mask; |
| @@ -140,8 +142,8 @@ test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 140 | 142 | return (old & ~mask) != 0; |
| 141 | 143 | } |
| 142 | 144 | |
| 143 | −static inline int | |
| 144 | −test_and_change_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 145 | +static inline bool arch_test_and_change_bit(unsigned long nr, | |
| 146 | + volatile unsigned long *ptr) | |
| 145 | 147 | { |
| 146 | 148 | unsigned long *addr = __bitops_word(nr, ptr); |
| 147 | 149 | unsigned long old, mask; |
| @@ -151,30 +153,31 @@ test_and_change_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 151 | 153 | return (old & mask) != 0; |
| 152 | 154 | } |
| 153 | 155 | |
| 154 | −static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 156 | +static inline void arch___set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 155 | 157 | { |
| 156 | 158 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 157 | 159 | |
| 158 | 160 | *addr |= 1 << (nr & 7); |
| 159 | 161 | } |
| 160 | 162 | |
| 161 | −static inline void | |
| 162 | −__clear_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 163 | +static inline void arch___clear_bit(unsigned long nr, | |
| 164 | + volatile unsigned long *ptr) | |
| 163 | 165 | { |
| 164 | 166 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 165 | 167 | |
| 166 | 168 | *addr &= ~(1 << (nr & 7)); |
| 167 | 169 | } |
| 168 | 170 | |
| 169 | −static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 171 | +static inline void arch___change_bit(unsigned long nr, | |
| 172 | + volatile unsigned long *ptr) | |
| 170 | 173 | { |
| 171 | 174 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 172 | 175 | |
| 173 | 176 | *addr ^= 1 << (nr & 7); |
| 174 | 177 | } |
| 175 | 178 | |
| 176 | −static inline int | |
| 177 | −__test_and_set_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 179 | +static inline bool arch___test_and_set_bit(unsigned long nr, | |
| 180 | + volatile unsigned long *ptr) | |
| 178 | 181 | { |
| 179 | 182 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 180 | 183 | unsigned char ch; |
| @@ -184,8 +187,8 @@ __test_and_set_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 184 | 187 | return (ch >> (nr & 7)) & 1; |
| 185 | 188 | } |
| 186 | 189 | |
| 187 | −static inline int | |
| 188 | −__test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 190 | +static inline bool arch___test_and_clear_bit(unsigned long nr, | |
| 191 | + volatile unsigned long *ptr) | |
| 189 | 192 | { |
| 190 | 193 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 191 | 194 | unsigned char ch; |
| @@ -195,8 +198,8 @@ __test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 195 | 198 | return (ch >> (nr & 7)) & 1; |
| 196 | 199 | } |
| 197 | 200 | |
| 198 | −static inline int | |
| 199 | −__test_and_change_bit(unsigned long nr, volatile unsigned long *ptr) | |
| 201 | +static inline bool arch___test_and_change_bit(unsigned long nr, | |
| 202 | + volatile unsigned long *ptr) | |
| 200 | 203 | { |
| 201 | 204 | unsigned char *addr = __bitops_byte(nr, ptr); |
| 202 | 205 | unsigned char ch; |
| @@ -206,7 +209,8 @@ __test_and_change_bit(unsigned long nr, volatile unsigned long *ptr) · 3 unmodified lines | ||
| 206 | 209 | return (ch >> (nr & 7)) & 1; |
| 207 | 210 | } |
| 208 | 211 | |
| 209 | −static inline int test_bit(unsigned long nr, const volatile unsigned long *ptr) | |
| 212 | +static inline bool arch_test_bit(unsigned long nr, | |
| 213 | + const volatile unsigned long *ptr) | |
| 210 | 214 | { |
| 211 | 215 | const volatile unsigned char *addr; |
| 212 | 216 | |
| @@ -215,28 +219,30 @@ static inline int test_bit(unsigned long nr, const volatile unsigned long *ptr) · 2 unmodified lines | ||
| 215 | 219 | return (*addr >> (nr & 7)) & 1; |
| 216 | 220 | } |
| 217 | 221 | |
| 218 | −static inline int test_and_set_bit_lock(unsigned long nr, | |
| 219 | − volatile unsigned long *ptr) | |
| 222 | +static inline bool arch_test_and_set_bit_lock(unsigned long nr, | |
| 223 | + volatile unsigned long *ptr) | |
| 220 | 224 | { |
| 221 | − if (test_bit(nr, ptr)) | |
| 225 | + if (arch_test_bit(nr, ptr)) | |
| 222 | 226 | return 1; |
| 223 | − return test_and_set_bit(nr, ptr); | |
| 227 | + return arch_test_and_set_bit(nr, ptr); | |
| 224 | 228 | } |
| 225 | 229 | |
| 226 | −static inline void clear_bit_unlock(unsigned long nr, | |
| 227 | − volatile unsigned long *ptr) | |
| 230 | +static inline void arch_clear_bit_unlock(unsigned long nr, | |
| 231 | + volatile unsigned long *ptr) | |
| 228 | 232 | { |
| 229 | 233 | smp_mb__before_atomic(); |
| 230 | − clear_bit(nr, ptr); | |
| 234 | + arch_clear_bit(nr, ptr); | |
| 231 | 235 | } |
| 232 | 236 | |
| 233 | −static inline void __clear_bit_unlock(unsigned long nr, | |
| 234 | − volatile unsigned long *ptr) | |
| 237 | +static inline void arch___clear_bit_unlock(unsigned long nr, | |
| 238 | + volatile unsigned long *ptr) | |
| 235 | 239 | { |
| 236 | 240 | smp_mb(); |
| 237 | − __clear_bit(nr, ptr); | |
| 241 | + arch___clear_bit(nr, ptr); | |
| 238 | 242 | } |
| 239 | 243 | |
| 244 | +#include <asm-generic/bitops-instrumented.h> | |
| 245 | + | |
| 240 | 246 | /* |
| 241 | 247 | * Functions which use MSB0 bit numbering. |
| 242 | 248 | * The bits are numbered: |
| @@ -261,7 +267,8 @@ static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr) · 18 unmodified lines | ||
| 261 | 267 | return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr); |
| 262 | 268 | } |
| 263 | 269 | |
| 264 | −static inline int test_and_clear_bit_inv(unsigned long nr, volatile unsigned long *ptr) | |
| 270 | +static inline bool test_and_clear_bit_inv(unsigned long nr, | |
| 271 | + volatile unsigned long *ptr) | |
| 265 | 272 | { |
| 266 | 273 | return test_and_clear_bit(nr ^ (BITS_PER_LONG - 1), ptr); |
| 267 | 274 | } |
| @@ -276,8 +283,8 @@ static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr · 8 unmodified lines | ||
| 276 | 283 | return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr); |
| 277 | 284 | } |
| 278 | 285 | |
| 279 | −static inline int test_bit_inv(unsigned long nr, | |
| 280 | − const volatile unsigned long *ptr) | |
| 286 | +static inline bool test_bit_inv(unsigned long nr, | |
| 287 | + const volatile unsigned long *ptr) | |
| 281 | 288 | { |
| 282 | 289 | return test_bit(nr ^ (BITS_PER_LONG - 1), ptr); |
| 283 | 290 | } |
| @@ -177,6 +177,8 @@ static inline int devmem_is_allowed(unsigned long pfn) · 176 unmodified lines | ||
| 177 | 177 | #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ |
| 178 | 178 | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) |
| 179 | 179 | |
| 180 | +#define ARCH_ZONE_DMA_BITS 31 | |
| 181 | + | |
| 180 | 182 | #include <asm-generic/memory_model.h> |
| 181 | 183 | #include <asm-generic/getorder.h> |
| 182 | 184 | |
| @@ -28,7 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | * @sliba: storage list information block address |
| 29 | 29 | * @sla: storage list address |
| 30 | 30 | * @slsba: storage list state block address |
| 31 | − * @akey: access key for DLIB | |
| 31 | + * @akey: access key for SLIB | |
| 32 | 32 | * @bkey: access key for SL |
| 33 | 33 | * @ckey: access key for SBALs |
| 34 | 34 | * @dkey: access key for SLSB |
| @@ -50,11 +50,10 @@ struct qdesfmt0 { · 15 unmodified lines | ||
| 50 | 50 | /** |
| 51 | 51 | * struct qdr - queue description record (QDR) |
| 52 | 52 | * @qfmt: queue format |
| 53 | − * @pfmt: implementation dependent parameter format | |
| 54 | 53 | * @ac: adapter characteristics |
| 55 | 54 | * @iqdcnt: input queue descriptor count |
| 56 | 55 | * @oqdcnt: output queue descriptor count |
| 57 | − * @iqdsz: inpout queue descriptor size | |
| 56 | + * @iqdsz: input queue descriptor size | |
| 58 | 57 | * @oqdsz: output queue descriptor size |
| 59 | 58 | * @qiba: queue information block address |
| 60 | 59 | * @qkey: queue information block key |
| @@ -62,8 +61,7 @@ struct qdesfmt0 { · 1 unmodified line | ||
| 62 | 61 | */ |
| 63 | 62 | struct qdr { |
| 64 | 63 | u32 qfmt : 8; |
| 65 | − u32 pfmt : 8; | |
| 66 | − u32 : 8; | |
| 64 | + u32 : 16; | |
| 67 | 65 | u32 ac : 8; |
| 68 | 66 | u32 : 8; |
| 69 | 67 | u32 iqdcnt : 8; |
| @@ -327,6 +325,7 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int, · 257 unmodified lines | ||
| 327 | 325 | * struct qdio_initialize - qdio initialization data |
| 328 | 326 | * @cdev: associated ccw device |
| 329 | 327 | * @q_format: queue format |
| 328 | + * @qdr_ac: feature flags to set | |
| 330 | 329 | * @adapter_name: name for the adapter |
| 331 | 330 | * @qib_param_field_format: format for qib_parm_field |
| 332 | 331 | * @qib_param_field: pointer to 128 bytes or NULL, if no param field |
| @@ -338,6 +337,7 @@ typedef void qdio_handler_t(struct ccw_device *, unsigned int, int, · 5 unmodified lines | ||
| 338 | 337 | * @input_handler: handler to be called for input queues |
| 339 | 338 | * @output_handler: handler to be called for output queues |
| 340 | 339 | * @queue_start_poll_array: polling handlers (one per input queue or NULL) |
| 340 | + * @scan_threshold: # of in-use buffers that triggers scan on output queue | |
| 341 | 341 | * @int_parm: interruption parameter |
| 342 | 342 | * @input_sbal_addr_array: address of no_input_qs * 128 pointers |
| 343 | 343 | * @output_sbal_addr_array: address of no_output_qs * 128 pointers |
| @@ -54,6 +54,7 @@ · 53 unmodified lines | ||
| 54 | 54 | #define INITRD_SIZE_OFFSET 0x10410 |
| 55 | 55 | #define OLDMEM_BASE_OFFSET 0x10418 |
| 56 | 56 | #define OLDMEM_SIZE_OFFSET 0x10420 |
| 57 | +#define KERNEL_VERSION_OFFSET 0x10428 | |
| 57 | 58 | #define COMMAND_LINE_OFFSET 0x10480 |
| 58 | 59 | |
| 59 | 60 | #ifndef __ASSEMBLY__ |
| @@ -74,7 +75,8 @@ struct parmarea { · 14 unmodified lines | ||
| 74 | 75 | unsigned long initrd_size; /* 0x10410 */ |
| 75 | 76 | unsigned long oldmem_base; /* 0x10418 */ |
| 76 | 77 | unsigned long oldmem_size; /* 0x10420 */ |
| 77 | − char pad1[0x10480 - 0x10428]; /* 0x10428 - 0x10480 */ | |
| 78 | + unsigned long kernel_version; /* 0x10428 */ | |
| 79 | + char pad1[0x10480 - 0x10430]; /* 0x10430 - 0x10480 */ | |
| 78 | 80 | char command_line[ARCH_COMMAND_LINE_SIZE]; /* 0x10480 */ |
| 79 | 81 | }; |
| 80 | 82 | |
| @@ -82,6 +84,7 @@ extern int noexec_disabled; · 1 unmodified line | ||
| 82 | 84 | extern int memory_end_set; |
| 83 | 85 | extern unsigned long memory_end; |
| 84 | 86 | extern unsigned long max_physmem_end; |
| 87 | +extern unsigned long __swsusp_reset_dma; | |
| 85 | 88 | |
| 86 | 89 | #define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM) |
| 87 | 90 | #define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM) |
| @@ -34,5 +34,6 @@ · 33 unmodified lines | ||
| 34 | 34 | #define __ARCH_WANT_SYS_FORK |
| 35 | 35 | #define __ARCH_WANT_SYS_VFORK |
| 36 | 36 | #define __ARCH_WANT_SYS_CLONE |
| 37 | +#define __ARCH_WANT_SYS_CLONE3 | |
| 37 | 38 | |
| 38 | 39 | #endif /* _ASM_S390_UNISTD_H_ */ |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 3 | 3 | #define _UAPI__ASM_BPF_PERF_EVENT_H__ |
| 4 | 4 | |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _ASM_S390_UAPI_IPL_H |
| 3 | 3 | #define _ASM_S390_UAPI_IPL_H |
| 4 | 4 | |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | |
| 21 | 21 | #include <linux/ioctl.h> |
| 22 | 22 | #include <linux/compiler.h> |
| 23 | +#include <linux/types.h> | |
| 23 | 24 | |
| 24 | 25 | /* Name of the zcrypt device driver. */ |
| 25 | 26 | #define ZCRYPT_NAME "zcrypt" |
| @@ -160,17 +161,17 @@ struct ica_xcRB { · 134 unmodified lines | ||
| 160 | 161 | * @payload_len: Payload length |
| 161 | 162 | */ |
| 162 | 163 | struct ep11_cprb { |
| 163 | − uint16_t cprb_len; | |
| 164 | + __u16 cprb_len; | |
| 164 | 165 | unsigned char cprb_ver_id; |
| 165 | 166 | unsigned char pad_000[2]; |
| 166 | 167 | unsigned char flags; |
| 167 | 168 | unsigned char func_id[2]; |
| 168 | − uint32_t source_id; | |
| 169 | − uint32_t target_id; | |
| 170 | − uint32_t ret_code; | |
| 171 | − uint32_t reserved1; | |
| 172 | − uint32_t reserved2; | |
| 173 | − uint32_t payload_len; | |
| 169 | + __u32 source_id; | |
| 170 | + __u32 target_id; | |
| 171 | + __u32 ret_code; | |
| 172 | + __u32 reserved1; | |
| 173 | + __u32 reserved2; | |
| 174 | + __u32 payload_len; | |
| 174 | 175 | } __attribute__((packed)); |
| 175 | 176 | |
| 176 | 177 | /** |
| @@ -179,8 +180,8 @@ struct ep11_cprb { · 2 unmodified lines | ||
| 179 | 180 | * @dom_id: Usage domain id |
| 180 | 181 | */ |
| 181 | 182 | struct ep11_target_dev { |
| 182 | − uint16_t ap_id; | |
| 183 | − uint16_t dom_id; | |
| 183 | + __u16 ap_id; | |
| 184 | + __u16 dom_id; | |
| 184 | 185 | }; |
| 185 | 186 | |
| 186 | 187 | /** |
| @@ -195,14 +196,14 @@ struct ep11_target_dev { · 8 unmodified lines | ||
| 195 | 196 | * @resp: Addr to response block |
| 196 | 197 | */ |
| 197 | 198 | struct ep11_urb { |
| 198 | − uint16_t targets_num; | |
| 199 | − uint64_t targets; | |
| 200 | − uint64_t weight; | |
| 201 | − uint64_t req_no; | |
| 202 | − uint64_t req_len; | |
| 203 | − uint64_t req; | |
| 204 | − uint64_t resp_len; | |
| 205 | − uint64_t resp; | |
| 199 | + __u16 targets_num; | |
| 200 | + __u64 targets; | |
| 201 | + __u64 weight; | |
| 202 | + __u64 req_no; | |
| 203 | + __u64 req_len; | |
| 204 | + __u64 req; | |
| 205 | + __u64 resp_len; | |
| 206 | + __u64 resp; | |
| 206 | 207 | } __attribute__((packed)); |
| 207 | 208 | |
| 208 | 209 | /** |
| @@ -114,12 +114,8 @@ recursion_check: · 113 unmodified lines | ||
| 114 | 114 | * If it comes up a second time then there's something wrong going on: |
| 115 | 115 | * just break out and report an unknown stack type. |
| 116 | 116 | */ |
| 117 | − if (*visit_mask & (1UL << info->type)) { | |
| 118 | − printk_deferred_once(KERN_WARNING | |
| 119 | − "WARNING: stack recursion on stack type %d\n", | |
| 120 | − info->type); | |
| 117 | + if (*visit_mask & (1UL << info->type)) | |
| 121 | 118 | goto unknown; |
| 122 | − } | |
| 123 | 119 | *visit_mask |= 1UL << info->type; |
| 124 | 120 | return 0; |
| 125 | 121 | unknown: |
| @@ -60,12 +60,5 @@ ENTRY(startup_continue) · 59 unmodified lines | ||
| 60 | 60 | |
| 61 | 61 | .align 16 |
| 62 | 62 | .LPG1: |
| 63 | −.Lpcmsk:.quad 0x0000000180000000 | |
| 64 | −.L4malign:.quad 0xffffffffffc00000 | |
| 65 | −.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8 | |
| 66 | −.Lnop: .long 0x07000700 | |
| 67 | −.Lparmaddr: | |
| 68 | − .quad PARMAREA | |
| 69 | − .align 64 | |
| 70 | 63 | .Ldw: .quad 0x0002000180000000,0x0000000000000000 |
| 71 | 64 | .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 |
| @@ -31,7 +31,6 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <asm/os_info.h> |
| 32 | 32 | #include <asm/sections.h> |
| 33 | 33 | #include <asm/boot_data.h> |
| 34 | −#include <asm/uv.h> | |
| 35 | 34 | #include "entry.h" |
| 36 | 35 | |
| 37 | 36 | #define IPL_PARM_BLOCK_VERSION 0 |
| @@ -892,21 +891,15 @@ static void __reipl_run(void *unused) · 854 unmodified lines | ||
| 892 | 891 | { |
| 893 | 892 | switch (reipl_type) { |
| 894 | 893 | case IPL_TYPE_CCW: |
| 895 | − uv_set_shared(__pa(reipl_block_ccw)); | |
| 896 | 894 | diag308(DIAG308_SET, reipl_block_ccw); |
| 897 | − uv_remove_shared(__pa(reipl_block_ccw)); | |
| 898 | 895 | diag308(DIAG308_LOAD_CLEAR, NULL); |
| 899 | 896 | break; |
| 900 | 897 | case IPL_TYPE_FCP: |
| 901 | − uv_set_shared(__pa(reipl_block_fcp)); | |
| 902 | 898 | diag308(DIAG308_SET, reipl_block_fcp); |
| 903 | − uv_remove_shared(__pa(reipl_block_fcp)); | |
| 904 | 899 | diag308(DIAG308_LOAD_CLEAR, NULL); |
| 905 | 900 | break; |
| 906 | 901 | case IPL_TYPE_NSS: |
| 907 | − uv_set_shared(__pa(reipl_block_nss)); | |
| 908 | 902 | diag308(DIAG308_SET, reipl_block_nss); |
| 909 | − uv_remove_shared(__pa(reipl_block_nss)); | |
| 910 | 903 | diag308(DIAG308_LOAD_CLEAR, NULL); |
| 911 | 904 | break; |
| 912 | 905 | case IPL_TYPE_UNKNOWN: |
| @@ -1176,9 +1169,7 @@ static struct kset *dump_kset; · 263 unmodified lines | ||
| 1176 | 1169 | |
| 1177 | 1170 | static void diag308_dump(void *dump_block) |
| 1178 | 1171 | { |
| 1179 | − uv_set_shared(__pa(dump_block)); | |
| 1180 | 1172 | diag308(DIAG308_SET, dump_block); |
| 1181 | − uv_remove_shared(__pa(dump_block)); | |
| 1182 | 1173 | while (1) { |
| 1183 | 1174 | if (diag308(DIAG308_LOAD_NORMAL_DUMP, NULL) != 0x302) |
| 1184 | 1175 | break; |
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | #include <linux/elf.h> |
| 3 | +#include <asm/kexec.h> | |
| 3 | 4 | |
| 4 | 5 | int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val, |
| 5 | 6 | unsigned long addr) |
| @@ -34,7 +34,7 @@ struct cf_diag_csd { /* Counter set data per CPU */ · 33 unmodified lines | ||
| 34 | 34 | unsigned char start[PAGE_SIZE]; /* Counter set at event start */ |
| 35 | 35 | unsigned char data[PAGE_SIZE]; /* Counter set at event delete */ |
| 36 | 36 | }; |
| 37 | −DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd); | |
| 37 | +static DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd); | |
| 38 | 38 | |
| 39 | 39 | /* Counter sets are stored as data stream in a page sized memory buffer and |
| 40 | 40 | * exported to user space via raw data attached to the event sample data. |
| @@ -1114,8 +1114,7 @@ void __init setup_arch(char **cmdline_p) · 1113 unmodified lines | ||
| 1114 | 1114 | |
| 1115 | 1115 | ROOT_DEV = Root_RAM0; |
| 1116 | 1116 | |
| 1117 | − /* Is init_mm really needed? */ | |
| 1118 | − init_mm.start_code = PAGE_OFFSET; | |
| 1117 | + init_mm.start_code = (unsigned long) _text; | |
| 1119 | 1118 | init_mm.end_code = (unsigned long) _etext; |
| 1120 | 1119 | init_mm.end_data = (unsigned long) _edata; |
| 1121 | 1120 | init_mm.brk = (unsigned long) _end; |
| @@ -437,4 +437,4 @@ · 436 unmodified lines | ||
| 437 | 437 | 432 common fsmount sys_fsmount sys_fsmount |
| 438 | 438 | 433 common fspick sys_fspick sys_fspick |
| 439 | 439 | 434 common pidfd_open sys_pidfd_open sys_pidfd_open |
| 440 | −# 435 reserved for clone3 | |
| 440 | +435 common clone3 sys_clone3 sys_clone3 | |
| @@ -216,11 +216,6 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) · 215 unmodified lines | ||
| 216 | 216 | |
| 217 | 217 | if (!vdso_enabled) |
| 218 | 218 | return 0; |
| 219 | − /* | |
| 220 | − * Only map the vdso for dynamically linked elf binaries. | |
| 221 | − */ | |
| 222 | − if (!uses_interp) | |
| 223 | − return 0; | |
| 224 | 219 | |
| 225 | 220 | vdso_pages = vdso64_pages; |
| 226 | 221 | #ifdef CONFIG_COMPAT_VDSO |
| @@ -32,10 +32,9 @@ PHDRS { · 31 unmodified lines | ||
| 32 | 32 | SECTIONS |
| 33 | 33 | { |
| 34 | 34 | . = 0x100000; |
| 35 | − _stext = .; /* Start of text section */ | |
| 36 | 35 | .text : { |
| 37 | − /* Text and read-only data */ | |
| 38 | − _text = .; | |
| 36 | + _stext = .; /* Start of text section */ | |
| 37 | + _text = .; /* Text and read-only data */ | |
| 39 | 38 | HEAD_TEXT |
| 40 | 39 | TEXT_TEXT |
| 41 | 40 | SCHED_TEXT |
| @@ -47,11 +46,10 @@ SECTIONS · 5 unmodified lines | ||
| 47 | 46 | *(.text.*_indirect_*) |
| 48 | 47 | *(.fixup) |
| 49 | 48 | *(.gnu.warning) |
| 49 | + . = ALIGN(PAGE_SIZE); | |
| 50 | + _etext = .; /* End of text section */ | |
| 50 | 51 | } :text = 0x0700 |
| 51 | 52 | |
| 52 | − . = ALIGN(PAGE_SIZE); | |
| 53 | − _etext = .; /* End of text section */ | |
| 54 | − | |
| 55 | 53 | NOTES :text :note |
| 56 | 54 | |
| 57 | 55 | .dummy : { *(.dummy) } :data |
| @@ -2516,16 +2516,6 @@ out_err: · 2515 unmodified lines | ||
| 2516 | 2516 | return rc; |
| 2517 | 2517 | } |
| 2518 | 2518 | |
| 2519 | −bool kvm_arch_has_vcpu_debugfs(void) | |
| 2520 | −{ | |
| 2521 | − return false; | |
| 2522 | −} | |
| 2523 | − | |
| 2524 | −int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) | |
| 2525 | −{ | |
| 2526 | − return 0; | |
| 2527 | −} | |
| 2528 | − | |
| 2529 | 2519 | void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) |
| 2530 | 2520 | { |
| 2531 | 2521 | VCPU_EVENT(vcpu, 3, "%s", "free cpu"); |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | #include <linux/types.h> |
| 10 | 10 | #include <linux/export.h> |
| 11 | 11 | #include <linux/raid/xor.h> |
| 12 | +#include <asm/xor.h> | |
| 12 | 13 | |
| 13 | 14 | static void xor_xc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) |
| 14 | 15 | { |
| @@ -161,9 +161,9 @@ static void walk_pmd_level(struct seq_file *m, struct pg_state *st, · 160 unmodified lines | ||
| 161 | 161 | } |
| 162 | 162 | #endif |
| 163 | 163 | |
| 164 | − for (i = 0; i < PTRS_PER_PMD && addr < max_addr; i++) { | |
| 164 | + pmd = pmd_offset(pud, addr); | |
| 165 | + for (i = 0; i < PTRS_PER_PMD && addr < max_addr; i++, pmd++) { | |
| 165 | 166 | st->current_address = addr; |
| 166 | − pmd = pmd_offset(pud, addr); | |
| 167 | 167 | if (!pmd_none(*pmd)) { |
| 168 | 168 | if (pmd_large(*pmd)) { |
| 169 | 169 | prot = pmd_val(*pmd) & |
| @@ -192,9 +192,9 @@ static void walk_pud_level(struct seq_file *m, struct pg_state *st, · 22 unmodified lines | ||
| 192 | 192 | } |
| 193 | 193 | #endif |
| 194 | 194 | |
| 195 | − for (i = 0; i < PTRS_PER_PUD && addr < max_addr; i++) { | |
| 195 | + pud = pud_offset(p4d, addr); | |
| 196 | + for (i = 0; i < PTRS_PER_PUD && addr < max_addr; i++, pud++) { | |
| 196 | 197 | st->current_address = addr; |
| 197 | − pud = pud_offset(p4d, addr); | |
| 198 | 198 | if (!pud_none(*pud)) |
| 199 | 199 | if (pud_large(*pud)) { |
| 200 | 200 | prot = pud_val(*pud) & |
| @@ -222,9 +222,9 @@ static void walk_p4d_level(struct seq_file *m, struct pg_state *st, · 21 unmodified lines | ||
| 222 | 222 | } |
| 223 | 223 | #endif |
| 224 | 224 | |
| 225 | − for (i = 0; i < PTRS_PER_P4D && addr < max_addr; i++) { | |
| 225 | + p4d = p4d_offset(pgd, addr); | |
| 226 | + for (i = 0; i < PTRS_PER_P4D && addr < max_addr; i++, p4d++) { | |
| 226 | 227 | st->current_address = addr; |
| 227 | − p4d = p4d_offset(pgd, addr); | |
| 228 | 228 | if (!p4d_none(*p4d)) |
| 229 | 229 | walk_pud_level(m, st, p4d, addr); |
| 230 | 230 | else |
| @@ -327,6 +327,7 @@ static noinline void do_fault_error(struct pt_regs *regs, int access, · 326 unmodified lines | ||
| 327 | 327 | case VM_FAULT_BADACCESS: |
| 328 | 328 | if (access == VM_EXEC && signal_return(regs) == 0) |
| 329 | 329 | break; |
| 330 | + /* fallthrough */ | |
| 330 | 331 | case VM_FAULT_BADMAP: |
| 331 | 332 | /* Bad memory access. Check if it is kernel or user space. */ |
| 332 | 333 | if (user_mode(regs)) { |
| @@ -336,7 +337,9 @@ static noinline void do_fault_error(struct pt_regs *regs, int access, · 3 unmodified lines | ||
| 336 | 337 | do_sigsegv(regs, si_code); |
| 337 | 338 | break; |
| 338 | 339 | } |
| 340 | + /* fallthrough */ | |
| 339 | 341 | case VM_FAULT_BADCONTEXT: |
| 342 | + /* fallthrough */ | |
| 340 | 343 | case VM_FAULT_PFAULT: |
| 341 | 344 | do_no_context(regs); |
| 342 | 345 | break; |
| @@ -2424,8 +2424,8 @@ EXPORT_SYMBOL_GPL(gmap_pmdp_idte_global); · 2423 unmodified lines | ||
| 2424 | 2424 | * This function is assumed to be called with the guest_table_lock |
| 2425 | 2425 | * held. |
| 2426 | 2426 | */ |
| 2427 | −bool gmap_test_and_clear_dirty_pmd(struct gmap *gmap, pmd_t *pmdp, | |
| 2428 | − unsigned long gaddr) | |
| 2427 | +static bool gmap_test_and_clear_dirty_pmd(struct gmap *gmap, pmd_t *pmdp, | |
| 2428 | + unsigned long gaddr) | |
| 2429 | 2429 | { |
| 2430 | 2430 | if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID) |
| 2431 | 2431 | return false; |
| @@ -17,8 +17,6 @@ · 16 unmodified lines | ||
| 17 | 17 | |
| 18 | 18 | #ifdef CONFIG_PGSTE |
| 19 | 19 | |
| 20 | −static int page_table_allocate_pgste_min = 0; | |
| 21 | −static int page_table_allocate_pgste_max = 1; | |
| 22 | 20 | int page_table_allocate_pgste = 0; |
| 23 | 21 | EXPORT_SYMBOL(page_table_allocate_pgste); |
| 24 | 22 | |
| @@ -29,8 +27,8 @@ static struct ctl_table page_table_sysctl[] = { · 4 unmodified lines | ||
| 29 | 27 | .maxlen = sizeof(int), |
| 30 | 28 | .mode = S_IRUGO | S_IWUSR, |
| 31 | 29 | .proc_handler = proc_dointvec_minmax, |
| 32 | − .extra1 = &page_table_allocate_pgste_min, | |
| 33 | − .extra2 = &page_table_allocate_pgste_max, | |
| 30 | + .extra1 = SYSCTL_ZERO, | |
| 31 | + .extra2 = SYSCTL_ONE, | |
| 34 | 32 | }, |
| 35 | 33 | { } |
| 36 | 34 | }; |
| @@ -863,7 +863,7 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i · 862 unmodified lines | ||
| 863 | 863 | break; |
| 864 | 864 | case BPF_ALU64 | BPF_NEG: /* dst = -dst */ |
| 865 | 865 | /* lcgr %dst,%dst */ |
| 866 | − EMIT4(0xb9130000, dst_reg, dst_reg); | |
| 866 | + EMIT4(0xb9030000, dst_reg, dst_reg); | |
| 867 | 867 | break; |
| 868 | 868 | /* |
| 869 | 869 | * BPF_FROM_BE/LE |
| @@ -1049,8 +1049,8 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i · 179 unmodified lines | ||
| 1049 | 1049 | /* llgf %w1,map.max_entries(%b2) */ |
| 1050 | 1050 | EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2, |
| 1051 | 1051 | offsetof(struct bpf_array, map.max_entries)); |
| 1052 | − /* clgrj %b3,%w1,0xa,label0: if %b3 >= %w1 goto out */ | |
| 1053 | − EMIT6_PCREL_LABEL(0xec000000, 0x0065, BPF_REG_3, | |
| 1052 | + /* clrj %b3,%w1,0xa,label0: if (u32)%b3 >= (u32)%w1 goto out */ | |
| 1053 | + EMIT6_PCREL_LABEL(0xec000000, 0x0077, BPF_REG_3, | |
| 1054 | 1054 | REG_W1, 0, 0xa); |
| 1055 | 1055 | |
| 1056 | 1056 | /* |
| @@ -1076,8 +1076,10 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i · 19 unmodified lines | ||
| 1076 | 1076 | * goto out; |
| 1077 | 1077 | */ |
| 1078 | 1078 | |
| 1079 | − /* sllg %r1,%b3,3: %r1 = index * 8 */ | |
| 1080 | − EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, BPF_REG_3, REG_0, 3); | |
| 1079 | + /* llgfr %r1,%b3: %r1 = (u32) index */ | |
| 1080 | + EMIT4(0xb9160000, REG_1, BPF_REG_3); | |
| 1081 | + /* sllg %r1,%r1,3: %r1 *= 8 */ | |
| 1082 | + EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, REG_1, REG_0, 3); | |
| 1081 | 1083 | /* lg %r1,prog(%b2,%r1) */ |
| 1082 | 1084 | EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2, |
| 1083 | 1085 | REG_1, offsetof(struct bpf_array, ptrs)); |
| @@ -11,8 +11,7 @@ chkbss: $(addprefix $(obj)/, $(chkbss-files)) · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | quiet_cmd_chkbss = CHKBSS $< |
| 13 | 13 | cmd_chkbss = \ |
| 14 | − if $(OBJDUMP) -h $< | grep -q "\.bss" && \ | |
| 15 | − ! $(OBJDUMP) -j .bss -w -h $< | awk 'END { if ($$3) exit 1 }'; then \ | |
| 14 | + if ! $(OBJSIZE) --common $< | $(AWK) 'END { if ($$3) exit 1 }'; then \ | |
| 16 | 15 | echo "error: $< .bss section is not empty" >&2; exit 1; \ |
| 17 | 16 | fi; \ |
| 18 | 17 | touch $@; |
| @@ -1,2 +1,2 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #include <asm-generic/setup.h> |
| @@ -1,2 +1,2 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #include <asm-generic/types.h> |
| @@ -475,8 +475,6 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 474 unmodified lines | ||
| 475 | 475 | printk("dbr"); |
| 476 | 476 | break; |
| 477 | 477 | case FD_REG_N: |
| 478 | − if (0) | |
| 479 | − goto d_reg_n; | |
| 480 | 478 | case F_REG_N: |
| 481 | 479 | printk("fr%d", rn); |
| 482 | 480 | break; |
| @@ -488,7 +486,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 5 unmodified lines | ||
| 488 | 486 | printk("xd%d", rn & ~1); |
| 489 | 487 | break; |
| 490 | 488 | } |
| 491 | − d_reg_n: | |
| 489 | + /* else, fall through */ | |
| 492 | 490 | case D_REG_N: |
| 493 | 491 | printk("dr%d", rn); |
| 494 | 492 | break; |
| @@ -497,6 +495,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 2 unmodified lines | ||
| 497 | 495 | printk("xd%d", rm & ~1); |
| 498 | 496 | break; |
| 499 | 497 | } |
| 498 | + /* else, fall through */ | |
| 500 | 499 | case D_REG_M: |
| 501 | 500 | printk("dr%d", rm); |
| 502 | 501 | break; |
| @@ -157,6 +157,7 @@ int arch_bp_generic_fields(int sh_len, int sh_type, · 156 unmodified lines | ||
| 157 | 157 | switch (sh_type) { |
| 158 | 158 | case SH_BREAKPOINT_READ: |
| 159 | 159 | *gen_type = HW_BREAKPOINT_R; |
| 160 | + break; | |
| 160 | 161 | case SH_BREAKPOINT_WRITE: |
| 161 | 162 | *gen_type = HW_BREAKPOINT_W; |
| 162 | 163 | break; |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0-or-later */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later WITH Linux-syscall-note */ | |
| 2 | 2 | /* |
| 3 | 3 | * Copyright (c) 2017, Oracle and/or its affiliates. All rights reserved. |
| 4 | 4 | */ |
| @@ -34,10 +34,13 @@ static inline void time_travel_set_time(unsigned long long ns) · 33 unmodified lines | ||
| 34 | 34 | time_travel_time = ns; |
| 35 | 35 | } |
| 36 | 36 | |
| 37 | −static inline void time_travel_set_timer(enum time_travel_timer_mode mode, | |
| 38 | − unsigned long long expiry) | |
| 37 | +static inline void time_travel_set_timer_mode(enum time_travel_timer_mode mode) | |
| 39 | 38 | { |
| 40 | 39 | time_travel_timer_mode = mode; |
| 40 | +} | |
| 41 | + | |
| 42 | +static inline void time_travel_set_timer_expiry(unsigned long long expiry) | |
| 43 | +{ | |
| 41 | 44 | time_travel_timer_expiry = expiry; |
| 42 | 45 | } |
| 43 | 46 | #else |
| @@ -50,8 +53,11 @@ static inline void time_travel_set_time(unsigned long long ns) · 6 unmodified lines | ||
| 50 | 53 | { |
| 51 | 54 | } |
| 52 | 55 | |
| 53 | −static inline void time_travel_set_timer(enum time_travel_timer_mode mode, | |
| 54 | − unsigned long long expiry) | |
| 56 | +static inline void time_travel_set_timer_mode(enum time_travel_timer_mode mode) | |
| 57 | +{ | |
| 58 | +} | |
| 59 | + | |
| 60 | +static inline void time_travel_set_timer_expiry(unsigned long long expiry) | |
| 55 | 61 | { |
| 56 | 62 | } |
| 57 | 63 | |
| @@ -213,7 +213,7 @@ static void time_travel_sleep(unsigned long long duration) · 212 unmodified lines | ||
| 213 | 213 | if (time_travel_timer_mode != TT_TMR_DISABLED || |
| 214 | 214 | time_travel_timer_expiry < next) { |
| 215 | 215 | if (time_travel_timer_mode == TT_TMR_ONESHOT) |
| 216 | − time_travel_set_timer(TT_TMR_DISABLED, 0); | |
| 216 | + time_travel_set_timer_mode(TT_TMR_DISABLED); | |
| 217 | 217 | /* |
| 218 | 218 | * time_travel_time will be adjusted in the timer |
| 219 | 219 | * IRQ handler so it works even when the signal |
| @@ -50,7 +50,7 @@ void timer_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs) · 49 unmodified lines | ||
| 50 | 50 | static int itimer_shutdown(struct clock_event_device *evt) |
| 51 | 51 | { |
| 52 | 52 | if (time_travel_mode != TT_MODE_OFF) |
| 53 | − time_travel_set_timer(TT_TMR_DISABLED, 0); | |
| 53 | + time_travel_set_timer_mode(TT_TMR_DISABLED); | |
| 54 | 54 | |
| 55 | 55 | if (time_travel_mode != TT_MODE_INFCPU) |
| 56 | 56 | os_timer_disable(); |
| @@ -62,9 +62,10 @@ static int itimer_set_periodic(struct clock_event_device *evt) · 5 unmodified lines | ||
| 62 | 62 | { |
| 63 | 63 | unsigned long long interval = NSEC_PER_SEC / HZ; |
| 64 | 64 | |
| 65 | − if (time_travel_mode != TT_MODE_OFF) | |
| 66 | − time_travel_set_timer(TT_TMR_PERIODIC, | |
| 67 | − time_travel_time + interval); | |
| 65 | + if (time_travel_mode != TT_MODE_OFF) { | |
| 66 | + time_travel_set_timer_mode(TT_TMR_PERIODIC); | |
| 67 | + time_travel_set_timer_expiry(time_travel_time + interval); | |
| 68 | + } | |
| 68 | 69 | |
| 69 | 70 | if (time_travel_mode != TT_MODE_INFCPU) |
| 70 | 71 | os_timer_set_interval(interval); |
| @@ -77,9 +78,10 @@ static int itimer_next_event(unsigned long delta, · 6 unmodified lines | ||
| 77 | 78 | { |
| 78 | 79 | delta += 1; |
| 79 | 80 | |
| 80 | − if (time_travel_mode != TT_MODE_OFF) | |
| 81 | − time_travel_set_timer(TT_TMR_ONESHOT, | |
| 82 | − time_travel_time + delta); | |
| 81 | + if (time_travel_mode != TT_MODE_OFF) { | |
| 82 | + time_travel_set_timer_mode(TT_TMR_ONESHOT); | |
| 83 | + time_travel_set_timer_expiry(time_travel_time + delta); | |
| 84 | + } | |
| 83 | 85 | |
| 84 | 86 | if (time_travel_mode != TT_MODE_INFCPU) |
| 85 | 87 | return os_timer_one_shot(delta); |
| @@ -38,6 +38,7 @@ REALMODE_CFLAGS := $(M16_CFLAGS) -g -Os -DDISABLE_BRANCH_PROFILING \ · 37 unmodified lines | ||
| 38 | 38 | |
| 39 | 39 | REALMODE_CFLAGS += $(call __cc-option, $(CC), $(REALMODE_CFLAGS), -ffreestanding) |
| 40 | 40 | REALMODE_CFLAGS += $(call __cc-option, $(CC), $(REALMODE_CFLAGS), -fno-stack-protector) |
| 41 | +REALMODE_CFLAGS += $(call __cc-option, $(CC), $(REALMODE_CFLAGS), -Wno-address-of-packed-member) | |
| 41 | 42 | REALMODE_CFLAGS += $(call __cc-option, $(CC), $(REALMODE_CFLAGS), $(cc_stack_align4)) |
| 42 | 43 | export REALMODE_CFLAGS |
| 43 | 44 | |
| @@ -72,6 +72,8 @@ static unsigned long find_trampoline_placement(void) · 71 unmodified lines | ||
| 72 | 72 | |
| 73 | 73 | /* Find the first usable memory region under bios_start. */ |
| 74 | 74 | for (i = boot_params->e820_entries - 1; i >= 0; i--) { |
| 75 | + unsigned long new = bios_start; | |
| 76 | + | |
| 75 | 77 | entry = &boot_params->e820_table[i]; |
| 76 | 78 | |
| 77 | 79 | /* Skip all entries above bios_start. */ |
| @@ -84,15 +86,20 @@ static unsigned long find_trampoline_placement(void) · 6 unmodified lines | ||
| 84 | 86 | |
| 85 | 87 | /* Adjust bios_start to the end of the entry if needed. */ |
| 86 | 88 | if (bios_start > entry->addr + entry->size) |
| 87 | − bios_start = entry->addr + entry->size; | |
| 89 | + new = entry->addr + entry->size; | |
| 88 | 90 | |
| 89 | 91 | /* Keep bios_start page-aligned. */ |
| 90 | − bios_start = round_down(bios_start, PAGE_SIZE); | |
| 92 | + new = round_down(new, PAGE_SIZE); | |
| 91 | 93 | |
| 92 | 94 | /* Skip the entry if it's too small. */ |
| 93 | − if (bios_start - TRAMPOLINE_32BIT_SIZE < entry->addr) | |
| 95 | + if (new - TRAMPOLINE_32BIT_SIZE < entry->addr) | |
| 94 | 96 | continue; |
| 95 | 97 | |
| 98 | + /* Protect against underflow. */ | |
| 99 | + if (new - TRAMPOLINE_32BIT_SIZE > bios_start) | |
| 100 | + break; | |
| 101 | + | |
| 102 | + bios_start = new; | |
| 96 | 103 | break; |
| 97 | 104 | } |
| 98 | 105 | |
| @@ -37,6 +37,14 @@ int memcmp(const void *s1, const void *s2, size_t len) · 36 unmodified lines | ||
| 37 | 37 | return diff; |
| 38 | 38 | } |
| 39 | 39 | |
| 40 | +/* | |
| 41 | + * Clang may lower `memcmp == 0` to `bcmp == 0`. | |
| 42 | + */ | |
| 43 | +int bcmp(const void *s1, const void *s2, size_t len) | |
| 44 | +{ | |
| 45 | + return memcmp(s1, s2, len); | |
| 46 | +} | |
| 47 | + | |
| 40 | 48 | int strcmp(const char *str1, const char *str2) |
| 41 | 49 | { |
| 42 | 50 | const unsigned char *s1 = (const unsigned char *)str1; |
| @@ -314,6 +314,23 @@ For 32-bit we have the following conventions - kernel is built with · 313 unmodified lines | ||
| 314 | 314 | |
| 315 | 315 | #endif |
| 316 | 316 | |
| 317 | +/* | |
| 318 | + * Mitigate Spectre v1 for conditional swapgs code paths. | |
| 319 | + * | |
| 320 | + * FENCE_SWAPGS_USER_ENTRY is used in the user entry swapgs code path, to | |
| 321 | + * prevent a speculative swapgs when coming from kernel space. | |
| 322 | + * | |
| 323 | + * FENCE_SWAPGS_KERNEL_ENTRY is used in the kernel entry non-swapgs code path, | |
| 324 | + * to prevent the swapgs from getting speculatively skipped when coming from | |
| 325 | + * user space. | |
| 326 | + */ | |
| 327 | +.macro FENCE_SWAPGS_USER_ENTRY | |
| 328 | + ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER | |
| 329 | +.endm | |
| 330 | +.macro FENCE_SWAPGS_KERNEL_ENTRY | |
| 331 | + ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL | |
| 332 | +.endm | |
| 333 | + | |
| 317 | 334 | .macro STACKLEAK_ERASE_NOCLOBBER |
| 318 | 335 | #ifdef CONFIG_GCC_PLUGIN_STACKLEAK |
| 319 | 336 | PUSH_AND_CLEAR_REGS |
| @@ -1443,8 +1443,12 @@ BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR, · 1442 unmodified lines | ||
| 1443 | 1443 | |
| 1444 | 1444 | ENTRY(page_fault) |
| 1445 | 1445 | ASM_CLAC |
| 1446 | − pushl $0; /* %gs's slot on the stack */ | |
| 1446 | + pushl $do_page_fault | |
| 1447 | + jmp common_exception_read_cr2 | |
| 1448 | +END(page_fault) | |
| 1447 | 1449 | |
| 1450 | +common_exception_read_cr2: | |
| 1451 | + /* the function address is in %gs's slot on the stack */ | |
| 1448 | 1452 | SAVE_ALL switch_stacks=1 skip_gs=1 |
| 1449 | 1453 | |
| 1450 | 1454 | ENCODE_FRAME_POINTER |
| @@ -1452,6 +1456,7 @@ ENTRY(page_fault) · 1 unmodified line | ||
| 1452 | 1456 | |
| 1453 | 1457 | /* fixup %gs */ |
| 1454 | 1458 | GS_TO_REG %ecx |
| 1459 | + movl PT_GS(%esp), %edi | |
| 1455 | 1460 | REG_TO_PTGS %ecx |
| 1456 | 1461 | SET_KERNEL_GS %ecx |
| 1457 | 1462 | |
| @@ -1463,9 +1468,9 @@ ENTRY(page_fault) · 5 unmodified lines | ||
| 1463 | 1468 | |
| 1464 | 1469 | TRACE_IRQS_OFF |
| 1465 | 1470 | movl %esp, %eax # pt_regs pointer |
| 1466 | − call do_page_fault | |
| 1471 | + CALL_NOSPEC %edi | |
| 1467 | 1472 | jmp ret_from_exception |
| 1468 | −END(page_fault) | |
| 1473 | +END(common_exception_read_cr2) | |
| 1469 | 1474 | |
| 1470 | 1475 | common_exception: |
| 1471 | 1476 | /* the function address is in %gs's slot on the stack */ |
| @@ -1595,7 +1600,7 @@ END(general_protection) · 123 unmodified lines | ||
| 1595 | 1600 | ENTRY(async_page_fault) |
| 1596 | 1601 | ASM_CLAC |
| 1597 | 1602 | pushl $do_async_page_fault |
| 1598 | − jmp common_exception | |
| 1603 | + jmp common_exception_read_cr2 | |
| 1599 | 1604 | END(async_page_fault) |
| 1600 | 1605 | #endif |
| 1601 | 1606 | |
| @@ -519,7 +519,7 @@ ENTRY(interrupt_entry) · 518 unmodified lines | ||
| 519 | 519 | testb $3, CS-ORIG_RAX+8(%rsp) |
| 520 | 520 | jz 1f |
| 521 | 521 | SWAPGS |
| 522 | − | |
| 522 | + FENCE_SWAPGS_USER_ENTRY | |
| 523 | 523 | /* |
| 524 | 524 | * Switch to the thread stack. The IRET frame and orig_ax are |
| 525 | 525 | * on the stack, as well as the return address. RDI..R12 are |
| @@ -549,8 +549,10 @@ ENTRY(interrupt_entry) · 23 unmodified lines | ||
| 549 | 549 | UNWIND_HINT_FUNC |
| 550 | 550 | |
| 551 | 551 | movq (%rdi), %rdi |
| 552 | + jmp 2f | |
| 552 | 553 | 1: |
| 553 | − | |
| 554 | + FENCE_SWAPGS_KERNEL_ENTRY | |
| 555 | +2: | |
| 554 | 556 | PUSH_AND_CLEAR_REGS save_ret=1 |
| 555 | 557 | ENCODE_FRAME_POINTER 8 |
| 556 | 558 | |
| @@ -1238,6 +1240,13 @@ ENTRY(paranoid_entry) · 681 unmodified lines | ||
| 1238 | 1240 | */ |
| 1239 | 1241 | SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14 |
| 1240 | 1242 | |
| 1243 | + /* | |
| 1244 | + * The above SAVE_AND_SWITCH_TO_KERNEL_CR3 macro doesn't do an | |
| 1245 | + * unconditional CR3 write, even in the PTI case. So do an lfence | |
| 1246 | + * to prevent GS speculation, regardless of whether PTI is enabled. | |
| 1247 | + */ | |
| 1248 | + FENCE_SWAPGS_KERNEL_ENTRY | |
| 1249 | + | |
| 1241 | 1250 | ret |
| 1242 | 1251 | END(paranoid_entry) |
| 1243 | 1252 | |
| @@ -1288,6 +1297,7 @@ ENTRY(error_entry) · 44 unmodified lines | ||
| 1288 | 1297 | * from user mode due to an IRET fault. |
| 1289 | 1298 | */ |
| 1290 | 1299 | SWAPGS |
| 1300 | + FENCE_SWAPGS_USER_ENTRY | |
| 1291 | 1301 | /* We have user CR3. Change to kernel CR3. */ |
| 1292 | 1302 | SWITCH_TO_KERNEL_CR3 scratch_reg=%rax |
| 1293 | 1303 | |
| @@ -1301,6 +1311,8 @@ ENTRY(error_entry) · 7 unmodified lines | ||
| 1301 | 1311 | pushq %r12 |
| 1302 | 1312 | ret |
| 1303 | 1313 | |
| 1314 | +.Lerror_entry_done_lfence: | |
| 1315 | + FENCE_SWAPGS_KERNEL_ENTRY | |
| 1304 | 1316 | .Lerror_entry_done: |
| 1305 | 1317 | ret |
| 1306 | 1318 | |
| @@ -1318,7 +1330,7 @@ ENTRY(error_entry) · 11 unmodified lines | ||
| 1318 | 1330 | cmpq %rax, RIP+8(%rsp) |
| 1319 | 1331 | je .Lbstep_iret |
| 1320 | 1332 | cmpq $.Lgs_change, RIP+8(%rsp) |
| 1321 | − jne .Lerror_entry_done | |
| 1333 | + jne .Lerror_entry_done_lfence | |
| 1322 | 1334 | |
| 1323 | 1335 | /* |
| 1324 | 1336 | * hack: .Lgs_change can fail with user gsbase. If this happens, fix up |
| @@ -1326,6 +1338,7 @@ ENTRY(error_entry) · 1 unmodified line | ||
| 1326 | 1338 | * .Lgs_change's error handler with kernel gsbase. |
| 1327 | 1339 | */ |
| 1328 | 1340 | SWAPGS |
| 1341 | + FENCE_SWAPGS_USER_ENTRY | |
| 1329 | 1342 | SWITCH_TO_KERNEL_CR3 scratch_reg=%rax |
| 1330 | 1343 | jmp .Lerror_entry_done |
| 1331 | 1344 | |
| @@ -1340,6 +1353,7 @@ ENTRY(error_entry) · 8 unmodified lines | ||
| 1340 | 1353 | * gsbase and CR3. Switch to kernel gsbase and CR3: |
| 1341 | 1354 | */ |
| 1342 | 1355 | SWAPGS |
| 1356 | + FENCE_SWAPGS_USER_ENTRY | |
| 1343 | 1357 | SWITCH_TO_KERNEL_CR3 scratch_reg=%rax |
| 1344 | 1358 | |
| 1345 | 1359 | /* |
| @@ -1431,6 +1445,7 @@ ENTRY(nmi) · 85 unmodified lines | ||
| 1431 | 1445 | |
| 1432 | 1446 | swapgs |
| 1433 | 1447 | cld |
| 1448 | + FENCE_SWAPGS_USER_ENTRY | |
| 1434 | 1449 | SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx |
| 1435 | 1450 | movq %rsp, %rdx |
| 1436 | 1451 | movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp |
| @@ -661,10 +661,17 @@ fail: · 660 unmodified lines | ||
| 661 | 661 | |
| 662 | 662 | throttle = perf_event_overflow(event, &data, ®s); |
| 663 | 663 | out: |
| 664 | − if (throttle) | |
| 664 | + if (throttle) { | |
| 665 | 665 | perf_ibs_stop(event, 0); |
| 666 | − else | |
| 667 | − perf_ibs_enable_event(perf_ibs, hwc, period >> 4); | |
| 666 | + } else { | |
| 667 | + period >>= 4; | |
| 668 | + | |
| 669 | + if ((ibs_caps & IBS_CAPS_RDWROPCNT) && | |
| 670 | + (*config & IBS_OP_CNT_CTL)) | |
| 671 | + period |= *config & IBS_OP_CUR_CNT_RAND; | |
| 672 | + | |
| 673 | + perf_ibs_enable_event(perf_ibs, hwc, period); | |
| 674 | + } | |
| 668 | 675 | |
| 669 | 676 | perf_event_update_userpage(event); |
| 670 | 677 | |
| @@ -1236,7 +1236,7 @@ void x86_pmu_enable_event(struct perf_event *event) · 1235 unmodified lines | ||
| 1236 | 1236 | * Add a single event to the PMU. |
| 1237 | 1237 | * |
| 1238 | 1238 | * The event is added to the group of enabled events |
| 1239 | − * but only if it can be scehduled with existing events. | |
| 1239 | + * but only if it can be scheduled with existing events. | |
| 1240 | 1240 | */ |
| 1241 | 1241 | static int x86_pmu_add(struct perf_event *event, int flags) |
| 1242 | 1242 | { |
| @@ -20,7 +20,6 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <asm/intel-family.h> |
| 21 | 21 | #include <asm/apic.h> |
| 22 | 22 | #include <asm/cpu_device_id.h> |
| 23 | −#include <asm/hypervisor.h> | |
| 24 | 23 | |
| 25 | 24 | #include "../perf_event.h" |
| 26 | 25 | |
| @@ -263,8 +262,8 @@ static struct event_constraint intel_icl_event_constraints[] = { · 236 unmodified lines | ||
| 263 | 262 | }; |
| 264 | 263 | |
| 265 | 264 | static struct extra_reg intel_icl_extra_regs[] __read_mostly = { |
| 266 | − INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffff9fffull, RSP_0), | |
| 267 | − INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffff9fffull, RSP_1), | |
| 265 | + INTEL_UEVENT_EXTRA_REG(0x01b7, MSR_OFFCORE_RSP_0, 0x3fffffbfffull, RSP_0), | |
| 266 | + INTEL_UEVENT_EXTRA_REG(0x01bb, MSR_OFFCORE_RSP_1, 0x3fffffbfffull, RSP_1), | |
| 268 | 267 | INTEL_UEVENT_PEBS_LDLAT_EXTRA_REG(0x01cd), |
| 269 | 268 | INTEL_UEVENT_EXTRA_REG(0x01c6, MSR_PEBS_FRONTEND, 0x7fff17, FE), |
| 270 | 269 | EVENT_EXTRA_END |
| @@ -3573,6 +3572,11 @@ static u64 bdw_limit_period(struct perf_event *event, u64 left) · 3302 unmodified lines | ||
| 3573 | 3572 | return left; |
| 3574 | 3573 | } |
| 3575 | 3574 | |
| 3575 | +static u64 nhm_limit_period(struct perf_event *event, u64 left) | |
| 3576 | +{ | |
| 3577 | + return max(left, 32ULL); | |
| 3578 | +} | |
| 3579 | + | |
| 3576 | 3580 | PMU_FORMAT_ATTR(event, "config:0-7" ); |
| 3577 | 3581 | PMU_FORMAT_ATTR(umask, "config:8-15" ); |
| 3578 | 3582 | PMU_FORMAT_ATTR(edge, "config:18" ); |
| @@ -4053,7 +4057,7 @@ static bool check_msr(unsigned long msr, u64 mask) · 474 unmodified lines | ||
| 4053 | 4057 | * Disable the check for real HW, so we don't |
| 4054 | 4058 | * mess with potentionaly enabled registers: |
| 4055 | 4059 | */ |
| 4056 | − if (hypervisor_is_type(X86_HYPER_NATIVE)) | |
| 4060 | + if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) | |
| 4057 | 4061 | return true; |
| 4058 | 4062 | |
| 4059 | 4063 | /* |
| @@ -4607,6 +4611,7 @@ __init int intel_pmu_init(void) · 547 unmodified lines | ||
| 4607 | 4611 | x86_pmu.pebs_constraints = intel_nehalem_pebs_event_constraints; |
| 4608 | 4612 | x86_pmu.enable_all = intel_pmu_nhm_enable_all; |
| 4609 | 4613 | x86_pmu.extra_regs = intel_nehalem_extra_regs; |
| 4614 | + x86_pmu.limit_period = nhm_limit_period; | |
| 4610 | 4615 | |
| 4611 | 4616 | mem_attr = nhm_mem_events_attrs; |
| 4612 | 4617 | |
| @@ -4955,6 +4960,7 @@ __init int intel_pmu_init(void) · 342 unmodified lines | ||
| 4955 | 4960 | |
| 4956 | 4961 | case INTEL_FAM6_SKYLAKE_X: |
| 4957 | 4962 | pmem = true; |
| 4963 | + /* fall through */ | |
| 4958 | 4964 | case INTEL_FAM6_SKYLAKE_MOBILE: |
| 4959 | 4965 | case INTEL_FAM6_SKYLAKE_DESKTOP: |
| 4960 | 4966 | case INTEL_FAM6_KABYLAKE_MOBILE: |
| @@ -5004,6 +5010,7 @@ __init int intel_pmu_init(void) · 43 unmodified lines | ||
| 5004 | 5010 | case INTEL_FAM6_ICELAKE_X: |
| 5005 | 5011 | case INTEL_FAM6_ICELAKE_XEON_D: |
| 5006 | 5012 | pmem = true; |
| 5013 | + /* fall through */ | |
| 5007 | 5014 | case INTEL_FAM6_ICELAKE_MOBILE: |
| 5008 | 5015 | case INTEL_FAM6_ICELAKE_DESKTOP: |
| 5009 | 5016 | x86_pmu.late_ack = true; |
| @@ -851,7 +851,7 @@ struct event_constraint intel_skl_pebs_event_constraints[] = { · 850 unmodified lines | ||
| 851 | 851 | |
| 852 | 852 | struct event_constraint intel_icl_pebs_event_constraints[] = { |
| 853 | 853 | INTEL_FLAGS_UEVENT_CONSTRAINT(0x1c0, 0x100000000ULL), /* INST_RETIRED.PREC_DIST */ |
| 854 | − INTEL_FLAGS_UEVENT_CONSTRAINT(0x0400, 0x400000000ULL), /* SLOTS */ | |
| 854 | + INTEL_FLAGS_UEVENT_CONSTRAINT(0x0400, 0x800000000ULL), /* SLOTS */ | |
| 855 | 855 | |
| 856 | 856 | INTEL_PLD_CONSTRAINT(0x1cd, 0xff), /* MEM_TRANS_RETIRED.LOAD_LATENCY */ |
| 857 | 857 | INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x1d0, 0xf), /* MEM_INST_RETIRED.LOAD */ |
| @@ -18,6 +18,20 @@ · 17 unmodified lines | ||
| 18 | 18 | * Note: efi_info is commonly left uninitialized, but that field has a |
| 19 | 19 | * private magic, so it is better to leave it unchanged. |
| 20 | 20 | */ |
| 21 | + | |
| 22 | +#define sizeof_mbr(type, member) ({ sizeof(((type *)0)->member); }) | |
| 23 | + | |
| 24 | +#define BOOT_PARAM_PRESERVE(struct_member) \ | |
| 25 | + { \ | |
| 26 | + .start = offsetof(struct boot_params, struct_member), \ | |
| 27 | + .len = sizeof_mbr(struct boot_params, struct_member), \ | |
| 28 | + } | |
| 29 | + | |
| 30 | +struct boot_params_to_save { | |
| 31 | + unsigned int start; | |
| 32 | + unsigned int len; | |
| 33 | +}; | |
| 34 | + | |
| 21 | 35 | static void sanitize_boot_params(struct boot_params *boot_params) |
| 22 | 36 | { |
| 23 | 37 | /* |
| @@ -35,21 +49,40 @@ static void sanitize_boot_params(struct boot_params *boot_params) · 11 unmodified lines | ||
| 35 | 49 | * problems again. |
| 36 | 50 | */ |
| 37 | 51 | if (boot_params->sentinel) { |
| 38 | − /* fields in boot_params are left uninitialized, clear them */ | |
| 39 | − boot_params->acpi_rsdp_addr = 0; | |
| 40 | − memset(&boot_params->ext_ramdisk_image, 0, | |
| 41 | − (char *)&boot_params->efi_info - | |
| 42 | − (char *)&boot_params->ext_ramdisk_image); | |
| 43 | − memset(&boot_params->kbd_status, 0, | |
| 44 | − (char *)&boot_params->hdr - | |
| 45 | − (char *)&boot_params->kbd_status); | |
| 46 | − memset(&boot_params->_pad7[0], 0, | |
| 47 | − (char *)&boot_params->edd_mbr_sig_buffer[0] - | |
| 48 | − (char *)&boot_params->_pad7[0]); | |
| 49 | − memset(&boot_params->_pad8[0], 0, | |
| 50 | − (char *)&boot_params->eddbuf[0] - | |
| 51 | − (char *)&boot_params->_pad8[0]); | |
| 52 | − memset(&boot_params->_pad9[0], 0, sizeof(boot_params->_pad9)); | |
| 52 | + static struct boot_params scratch; | |
| 53 | + char *bp_base = (char *)boot_params; | |
| 54 | + char *save_base = (char *)&scratch; | |
| 55 | + int i; | |
| 56 | + | |
| 57 | + const struct boot_params_to_save to_save[] = { | |
| 58 | + BOOT_PARAM_PRESERVE(screen_info), | |
| 59 | + BOOT_PARAM_PRESERVE(apm_bios_info), | |
| 60 | + BOOT_PARAM_PRESERVE(tboot_addr), | |
| 61 | + BOOT_PARAM_PRESERVE(ist_info), | |
| 62 | + BOOT_PARAM_PRESERVE(hd0_info), | |
| 63 | + BOOT_PARAM_PRESERVE(hd1_info), | |
| 64 | + BOOT_PARAM_PRESERVE(sys_desc_table), | |
| 65 | + BOOT_PARAM_PRESERVE(olpc_ofw_header), | |
| 66 | + BOOT_PARAM_PRESERVE(efi_info), | |
| 67 | + BOOT_PARAM_PRESERVE(alt_mem_k), | |
| 68 | + BOOT_PARAM_PRESERVE(scratch), | |
| 69 | + BOOT_PARAM_PRESERVE(e820_entries), | |
| 70 | + BOOT_PARAM_PRESERVE(eddbuf_entries), | |
| 71 | + BOOT_PARAM_PRESERVE(edd_mbr_sig_buf_entries), | |
| 72 | + BOOT_PARAM_PRESERVE(edd_mbr_sig_buffer), | |
| 73 | + BOOT_PARAM_PRESERVE(hdr), | |
| 74 | + BOOT_PARAM_PRESERVE(e820_table), | |
| 75 | + BOOT_PARAM_PRESERVE(eddbuf), | |
| 76 | + }; | |
| 77 | + | |
| 78 | + memset(&scratch, 0, sizeof(scratch)); | |
| 79 | + | |
| 80 | + for (i = 0; i < ARRAY_SIZE(to_save); i++) { | |
| 81 | + memcpy(save_base + to_save[i].start, | |
| 82 | + bp_base + to_save[i].start, to_save[i].len); | |
| 83 | + } | |
| 84 | + | |
| 85 | + memcpy(boot_params, save_base, sizeof(*boot_params)); | |
| 53 | 86 | } |
| 54 | 87 | } |
| 55 | 88 | |
| @@ -281,6 +281,8 @@ · 280 unmodified lines | ||
| 281 | 281 | #define X86_FEATURE_CQM_OCCUP_LLC (11*32+ 1) /* LLC occupancy monitoring */ |
| 282 | 282 | #define X86_FEATURE_CQM_MBM_TOTAL (11*32+ 2) /* LLC Total MBM monitoring */ |
| 283 | 283 | #define X86_FEATURE_CQM_MBM_LOCAL (11*32+ 3) /* LLC Local MBM monitoring */ |
| 284 | +#define X86_FEATURE_FENCE_SWAPGS_USER (11*32+ 4) /* "" LFENCE in user entry SWAPGS path */ | |
| 285 | +#define X86_FEATURE_FENCE_SWAPGS_KERNEL (11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */ | |
| 284 | 286 | |
| 285 | 287 | /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ |
| 286 | 288 | #define X86_FEATURE_AVX512_BF16 (12*32+ 5) /* AVX512 BFLOAT16 instructions */ |
| @@ -394,5 +396,6 @@ · 107 unmodified lines | ||
| 394 | 396 | #define X86_BUG_L1TF X86_BUG(18) /* CPU is affected by L1 Terminal Fault */ |
| 395 | 397 | #define X86_BUG_MDS X86_BUG(19) /* CPU is affected by Microarchitectural data sampling */ |
| 396 | 398 | #define X86_BUG_MSBDS_ONLY X86_BUG(20) /* CPU is only affected by the MSDBS variant of BUG_MDS */ |
| 399 | +#define X86_BUG_SWAPGS X86_BUG(21) /* CPU is affected by speculation through SWAPGS */ | |
| 397 | 400 | |
| 398 | 401 | #endif /* _ASM_X86_CPUFEATURES_H */ |
| @@ -16,7 +16,6 @@ · 15 unmodified lines | ||
| 16 | 16 | #define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR |
| 17 | 17 | |
| 18 | 18 | #ifndef __ASSEMBLY__ |
| 19 | −extern void mcount(void); | |
| 20 | 19 | extern atomic_t modifying_ftrace_code; |
| 21 | 20 | extern void __fentry__(void); |
| 22 | 21 | |
| @@ -11,6 +11,21 @@ · 10 unmodified lines | ||
| 11 | 11 | * While adding a new CPUID for a new microarchitecture, add a new |
| 12 | 12 | * group to keep logically sorted out in chronological order. Within |
| 13 | 13 | * that group keep the CPUID for the variants sorted by model number. |
| 14 | + * | |
| 15 | + * The defined symbol names have the following form: | |
| 16 | + * INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF} | |
| 17 | + * where: | |
| 18 | + * OPTFAMILY Describes the family of CPUs that this belongs to. Default | |
| 19 | + * is assumed to be "_CORE" (and should be omitted). Other values | |
| 20 | + * currently in use are _ATOM and _XEON_PHI | |
| 21 | + * MICROARCH Is the code name for the micro-architecture for this core. | |
| 22 | + * N.B. Not the platform name. | |
| 23 | + * OPTDIFF If needed, a short string to differentiate by market segment. | |
| 24 | + * Exact strings here will vary over time. _DESKTOP, _MOBILE, and | |
| 25 | + * _X (short for Xeon server) should be used when they are | |
| 26 | + * appropriate. | |
| 27 | + * | |
| 28 | + * The #define line may optionally include a comment including platform names. | |
| 14 | 29 | */ |
| 15 | 30 | |
| 16 | 31 | #define INTEL_FAM6_CORE_YONAH 0x0E |
| @@ -35,6 +35,8 @@ · 34 unmodified lines | ||
| 35 | 35 | #include <asm/kvm_vcpu_regs.h> |
| 36 | 36 | #include <asm/hyperv-tlfs.h> |
| 37 | 37 | |
| 38 | +#define __KVM_HAVE_ARCH_VCPU_DEBUGFS | |
| 39 | + | |
| 38 | 40 | #define KVM_MAX_VCPUS 288 |
| 39 | 41 | #define KVM_SOFT_MAX_VCPUS 240 |
| 40 | 42 | #define KVM_MAX_VCPU_ID 1023 |
| @@ -607,15 +609,16 @@ struct kvm_vcpu_arch { · 566 unmodified lines | ||
| 607 | 609 | |
| 608 | 610 | /* |
| 609 | 611 | * QEMU userspace and the guest each have their own FPU state. |
| 610 | − * In vcpu_run, we switch between the user, maintained in the | |
| 611 | − * task_struct struct, and guest FPU contexts. While running a VCPU, | |
| 612 | − * the VCPU thread will have the guest FPU context. | |
| 612 | + * In vcpu_run, we switch between the user and guest FPU contexts. | |
| 613 | + * While running a VCPU, the VCPU thread will have the guest FPU | |
| 614 | + * context. | |
| 613 | 615 | * |
| 614 | 616 | * Note that while the PKRU state lives inside the fpu registers, |
| 615 | 617 | * it is switched out separately at VMENTER and VMEXIT time. The |
| 616 | 618 | * "guest_fpu" state here contains the guest FPU context, with the |
| 617 | 619 | * host PRKU bits. |
| 618 | 620 | */ |
| 621 | + struct fpu *user_fpu; | |
| 619 | 622 | struct fpu *guest_fpu; |
| 620 | 623 | |
| 621 | 624 | u64 xcr0; |
| @@ -1174,6 +1177,7 @@ struct kvm_x86_ops { · 552 unmodified lines | ||
| 1174 | 1177 | int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq, |
| 1175 | 1178 | uint32_t guest_irq, bool set); |
| 1176 | 1179 | void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu); |
| 1180 | + bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu); | |
| 1177 | 1181 | |
| 1178 | 1182 | int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc, |
| 1179 | 1183 | bool *expired); |
| @@ -381,6 +381,7 @@ · 380 unmodified lines | ||
| 381 | 381 | #define MSR_AMD64_PATCH_LEVEL 0x0000008b |
| 382 | 382 | #define MSR_AMD64_TSC_RATIO 0xc0000104 |
| 383 | 383 | #define MSR_AMD64_NB_CFG 0xc001001f |
| 384 | +#define MSR_AMD64_CPUID_FN_1 0xc0011004 | |
| 384 | 385 | #define MSR_AMD64_PATCH_LOADER 0xc0010020 |
| 385 | 386 | #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 |
| 386 | 387 | #define MSR_AMD64_OSVW_STATUS 0xc0010141 |
| @@ -192,7 +192,7 @@ · 191 unmodified lines | ||
| 192 | 192 | " lfence;\n" \ |
| 193 | 193 | " jmp 902b;\n" \ |
| 194 | 194 | " .align 16\n" \ |
| 195 | − "903: addl $4, %%esp;\n" \ | |
| 195 | + "903: lea 4(%%esp), %%esp;\n" \ | |
| 196 | 196 | " pushl %[thunk_target];\n" \ |
| 197 | 197 | " ret;\n" \ |
| 198 | 198 | " .align 16\n" \ |
| @@ -252,16 +252,20 @@ struct pebs_lbr { · 251 unmodified lines | ||
| 252 | 252 | #define IBSCTL_LVT_OFFSET_VALID (1ULL<<8) |
| 253 | 253 | #define IBSCTL_LVT_OFFSET_MASK 0x0F |
| 254 | 254 | |
| 255 | −/* ibs fetch bits/masks */ | |
| 255 | +/* IBS fetch bits/masks */ | |
| 256 | 256 | #define IBS_FETCH_RAND_EN (1ULL<<57) |
| 257 | 257 | #define IBS_FETCH_VAL (1ULL<<49) |
| 258 | 258 | #define IBS_FETCH_ENABLE (1ULL<<48) |
| 259 | 259 | #define IBS_FETCH_CNT 0xFFFF0000ULL |
| 260 | 260 | #define IBS_FETCH_MAX_CNT 0x0000FFFFULL |
| 261 | 261 | |
| 262 | −/* ibs op bits/masks */ | |
| 263 | −/* lower 4 bits of the current count are ignored: */ | |
| 264 | −#define IBS_OP_CUR_CNT (0xFFFF0ULL<<32) | |
| 262 | +/* | |
| 263 | + * IBS op bits/masks | |
| 264 | + * The lower 7 bits of the current count are random bits | |
| 265 | + * preloaded by hardware and ignored in software | |
| 266 | + */ | |
| 267 | +#define IBS_OP_CUR_CNT (0xFFF80ULL<<32) | |
| 268 | +#define IBS_OP_CUR_CNT_RAND (0x0007FULL<<32) | |
| 265 | 269 | #define IBS_OP_CNT_CTL (1ULL<<19) |
| 266 | 270 | #define IBS_OP_VAL (1ULL<<18) |
| 267 | 271 | #define IBS_OP_ENABLE (1ULL<<17) |
| @@ -96,6 +96,8 @@ long clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 95 unmodified lines | ||
| 96 | 96 | |
| 97 | 97 | #else |
| 98 | 98 | |
| 99 | +#define VDSO_HAS_32BIT_FALLBACK 1 | |
| 100 | + | |
| 99 | 101 | static __always_inline |
| 100 | 102 | long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) |
| 101 | 103 | { |
| @@ -113,6 +115,23 @@ long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 11 unmodified lines | ||
| 113 | 115 | return ret; |
| 114 | 116 | } |
| 115 | 117 | |
| 118 | +static __always_inline | |
| 119 | +long clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts) | |
| 120 | +{ | |
| 121 | + long ret; | |
| 122 | + | |
| 123 | + asm ( | |
| 124 | + "mov %%ebx, %%edx \n" | |
| 125 | + "mov %[clock], %%ebx \n" | |
| 126 | + "call __kernel_vsyscall \n" | |
| 127 | + "mov %%edx, %%ebx \n" | |
| 128 | + : "=a" (ret), "=m" (*_ts) | |
| 129 | + : "0" (__NR_clock_gettime), [clock] "g" (_clkid), "c" (_ts) | |
| 130 | + : "edx"); | |
| 131 | + | |
| 132 | + return ret; | |
| 133 | +} | |
| 134 | + | |
| 116 | 135 | static __always_inline |
| 117 | 136 | long gettimeofday_fallback(struct __kernel_old_timeval *_tv, |
| 118 | 137 | struct timezone *_tz) |
| @@ -148,6 +167,23 @@ clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 29 unmodified lines | ||
| 148 | 167 | return ret; |
| 149 | 168 | } |
| 150 | 169 | |
| 170 | +static __always_inline | |
| 171 | +long clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts) | |
| 172 | +{ | |
| 173 | + long ret; | |
| 174 | + | |
| 175 | + asm ( | |
| 176 | + "mov %%ebx, %%edx \n" | |
| 177 | + "mov %[clock], %%ebx \n" | |
| 178 | + "call __kernel_vsyscall \n" | |
| 179 | + "mov %%edx, %%ebx \n" | |
| 180 | + : "=a" (ret), "=m" (*_ts) | |
| 181 | + : "0" (__NR_clock_getres), [clock] "g" (_clkid), "c" (_ts) | |
| 182 | + : "edx"); | |
| 183 | + | |
| 184 | + return ret; | |
| 185 | +} | |
| 186 | + | |
| 151 | 187 | #endif |
| 152 | 188 | |
| 153 | 189 | #ifdef CONFIG_PARAVIRT_CLOCK |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _ASM_X86_BYTEORDER_H |
| 3 | 3 | #define _ASM_X86_BYTEORDER_H |
| 4 | 4 | |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _ASM_X86_HWCAP2_H |
| 3 | 3 | #define _ASM_X86_HWCAP2_H |
| 4 | 4 | |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _ASM_X86_SIGCONTEXT32_H |
| 3 | 3 | #define _ASM_X86_SIGCONTEXT32_H |
| 4 | 4 | |
| @@ -1,4 +1,4 @@ | ||
| 1 | −/* SPDX-License-Identifier: GPL-2.0 */ | |
| 1 | +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | |
| 2 | 2 | #ifndef _ASM_X86_TYPES_H |
| 3 | 3 | #define _ASM_X86_TYPES_H |
| 4 | 4 | |
| @@ -722,7 +722,7 @@ static __initdata unsigned long lapic_cal_pm1, lapic_cal_pm2; · 721 unmodified lines | ||
| 722 | 722 | static __initdata unsigned long lapic_cal_j1, lapic_cal_j2; |
| 723 | 723 | |
| 724 | 724 | /* |
| 725 | − * Temporary interrupt handler. | |
| 725 | + * Temporary interrupt handler and polled calibration function. | |
| 726 | 726 | */ |
| 727 | 727 | static void __init lapic_cal_handler(struct clock_event_device *dev) |
| 728 | 728 | { |
| @@ -851,7 +851,8 @@ bool __init apic_needs_pit(void) · 122 unmodified lines | ||
| 851 | 851 | static int __init calibrate_APIC_clock(void) |
| 852 | 852 | { |
| 853 | 853 | struct clock_event_device *levt = this_cpu_ptr(&lapic_events); |
| 854 | − void (*real_handler)(struct clock_event_device *dev); | |
| 854 | + u64 tsc_perj = 0, tsc_start = 0; | |
| 855 | + unsigned long jif_start; | |
| 855 | 856 | unsigned long deltaj; |
| 856 | 857 | long delta, deltatsc; |
| 857 | 858 | int pm_referenced = 0; |
| @@ -878,28 +879,64 @@ static int __init calibrate_APIC_clock(void) · 20 unmodified lines | ||
| 878 | 879 | apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n" |
| 879 | 880 | "calibrating APIC timer ...\n"); |
| 880 | 881 | |
| 882 | + /* | |
| 883 | + * There are platforms w/o global clockevent devices. Instead of | |
| 884 | + * making the calibration conditional on that, use a polling based | |
| 885 | + * approach everywhere. | |
| 886 | + */ | |
| 881 | 887 | local_irq_disable(); |
| 882 | 888 | |
| 883 | − /* Replace the global interrupt handler */ | |
| 884 | − real_handler = global_clock_event->event_handler; | |
| 885 | − global_clock_event->event_handler = lapic_cal_handler; | |
| 886 | − | |
| 887 | 889 | /* |
| 888 | 890 | * Setup the APIC counter to maximum. There is no way the lapic |
| 889 | 891 | * can underflow in the 100ms detection time frame |
| 890 | 892 | */ |
| 891 | 893 | __setup_APIC_LVTT(0xffffffff, 0, 0); |
| 892 | 894 | |
| 893 | − /* Let the interrupts run */ | |
| 895 | + /* | |
| 896 | + * Methods to terminate the calibration loop: | |
| 897 | + * 1) Global clockevent if available (jiffies) | |
| 898 | + * 2) TSC if available and frequency is known | |
| 899 | + */ | |
| 900 | + jif_start = READ_ONCE(jiffies); | |
| 901 | + | |
| 902 | + if (tsc_khz) { | |
| 903 | + tsc_start = rdtsc(); | |
| 904 | + tsc_perj = div_u64((u64)tsc_khz * 1000, HZ); | |
| 905 | + } | |
| 906 | + | |
| 907 | + /* | |
| 908 | + * Enable interrupts so the tick can fire, if a global | |
| 909 | + * clockevent device is available | |
| 910 | + */ | |
| 894 | 911 | local_irq_enable(); |
| 895 | 912 | |
| 896 | − while (lapic_cal_loops <= LAPIC_CAL_LOOPS) | |
| 897 | − cpu_relax(); | |
| 913 | + while (lapic_cal_loops <= LAPIC_CAL_LOOPS) { | |
| 914 | + /* Wait for a tick to elapse */ | |
| 915 | + while (1) { | |
| 916 | + if (tsc_khz) { | |
| 917 | + u64 tsc_now = rdtsc(); | |
| 918 | + if ((tsc_now - tsc_start) >= tsc_perj) { | |
| 919 | + tsc_start += tsc_perj; | |
| 920 | + break; | |
| 921 | + } | |
| 922 | + } else { | |
| 923 | + unsigned long jif_now = READ_ONCE(jiffies); | |
| 898 | 924 | |
| 899 | − local_irq_disable(); | |
| 925 | + if (time_after(jif_now, jif_start)) { | |
| 926 | + jif_start = jif_now; | |
| 927 | + break; | |
| 928 | + } | |
| 929 | + } | |
| 930 | + cpu_relax(); | |
| 931 | + } | |
| 900 | 932 | |
| 901 | − /* Restore the real event handler */ | |
| 902 | − global_clock_event->event_handler = real_handler; | |
| 933 | + /* Invoke the calibration routine */ | |
| 934 | + local_irq_disable(); | |
| 935 | + lapic_cal_handler(NULL); | |
| 936 | + local_irq_enable(); | |
| 937 | + } | |
| 938 | + | |
| 939 | + local_irq_disable(); | |
| 903 | 940 | |
| 904 | 941 | /* Build delta t1-t2 as apic timer counts down */ |
| 905 | 942 | delta = lapic_cal_t1 - lapic_cal_t2; |
| @@ -943,10 +980,11 @@ static int __init calibrate_APIC_clock(void) · 37 unmodified lines | ||
| 943 | 980 | levt->features &= ~CLOCK_EVT_FEAT_DUMMY; |
| 944 | 981 | |
| 945 | 982 | /* |
| 946 | − * PM timer calibration failed or not turned on | |
| 947 | − * so lets try APIC timer based calibration | |
| 983 | + * PM timer calibration failed or not turned on so lets try APIC | |
| 984 | + * timer based calibration, if a global clockevent device is | |
| 985 | + * available. | |
| 948 | 986 | */ |
| 949 | − if (!pm_referenced) { | |
| 987 | + if (!pm_referenced && global_clock_event) { | |
| 950 | 988 | apic_printk(APIC_VERBOSE, "... verify APIC timer\n"); |
| 951 | 989 | |
| 952 | 990 | /* |
| @@ -1141,6 +1179,10 @@ void clear_local_APIC(void) · 188 unmodified lines | ||
| 1141 | 1179 | apic_write(APIC_LVT0, v | APIC_LVT_MASKED); |
| 1142 | 1180 | v = apic_read(APIC_LVT1); |
| 1143 | 1181 | apic_write(APIC_LVT1, v | APIC_LVT_MASKED); |
| 1182 | + if (!x2apic_enabled()) { | |
| 1183 | + v = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | |
| 1184 | + apic_write(APIC_LDR, v); | |
| 1185 | + } | |
| 1144 | 1186 | if (maxlvt >= 4) { |
| 1145 | 1187 | v = apic_read(APIC_LVTPC); |
| 1146 | 1188 | apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); |
| @@ -38,32 +38,12 @@ static int bigsmp_early_logical_apicid(int cpu) · 37 unmodified lines | ||
| 38 | 38 | return early_per_cpu(x86_cpu_to_apicid, cpu); |
| 39 | 39 | } |
| 40 | 40 | |
| 41 | −static inline unsigned long calculate_ldr(int cpu) | |
| 42 | −{ | |
| 43 | − unsigned long val, id; | |
| 44 | − | |
| 45 | − val = apic_read(APIC_LDR) & ~APIC_LDR_MASK; | |
| 46 | − id = per_cpu(x86_bios_cpu_apicid, cpu); | |
| 47 | − val |= SET_APIC_LOGICAL_ID(id); | |
| 48 | − | |
| 49 | − return val; | |
| 50 | −} | |
| 51 | − | |
| 52 | 41 | /* |
| 53 | − * Set up the logical destination ID. | |
| 54 | − * | |
| 55 | − * Intel recommends to set DFR, LDR and TPR before enabling | |
| 56 | − * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
| 57 | − * document number 292116). So here it goes... | |
| 42 | + * bigsmp enables physical destination mode | |
| 43 | + * and doesn't use LDR and DFR | |
| 58 | 44 | */ |
| 59 | 45 | static void bigsmp_init_apic_ldr(void) |
| 60 | 46 | { |
| 61 | − unsigned long val; | |
| 62 | − int cpu = smp_processor_id(); | |
| 63 | − | |
| 64 | − apic_write(APIC_DFR, APIC_DFR_FLAT); | |
| 65 | − val = calculate_ldr(cpu); | |
| 66 | − apic_write(APIC_LDR, val); | |
| 67 | 47 | } |
| 68 | 48 | |
| 69 | 49 | static void bigsmp_setup_apic_routing(void) |
| @@ -2438,7 +2438,13 @@ unsigned int arch_dynirq_lower_bound(unsigned int from) · 2437 unmodified lines | ||
| 2438 | 2438 | * dmar_alloc_hwirq() may be called before setup_IO_APIC(), so use |
| 2439 | 2439 | * gsi_top if ioapic_dynirq_base hasn't been initialized yet. |
| 2440 | 2440 | */ |
| 2441 | − return ioapic_initialized ? ioapic_dynirq_base : gsi_top; | |
| 2441 | + if (!ioapic_initialized) | |
| 2442 | + return gsi_top; | |
| 2443 | + /* | |
| 2444 | + * For DT enabled machines ioapic_dynirq_base is irrelevant and not | |
| 2445 | + * updated. So simply return @from if ioapic_dynirq_base == 0. | |
| 2446 | + */ | |
| 2447 | + return ioapic_dynirq_base ? : from; | |
| 2442 | 2448 | } |
| 2443 | 2449 | |
| 2444 | 2450 | #ifdef CONFIG_X86_32 |
| @@ -184,7 +184,8 @@ void __init default_setup_apic_routing(void) · 183 unmodified lines | ||
| 184 | 184 | def_to_bigsmp = 0; |
| 185 | 185 | break; |
| 186 | 186 | } |
| 187 | − /* If P4 and above fall through */ | |
| 187 | + /* P4 and above */ | |
| 188 | + /* fall through */ | |
| 188 | 189 | case X86_VENDOR_HYGON: |
| 189 | 190 | case X86_VENDOR_AMD: |
| 190 | 191 | def_to_bigsmp = 1; |
| @@ -804,6 +804,64 @@ static void init_amd_ln(struct cpuinfo_x86 *c) · 803 unmodified lines | ||
| 804 | 804 | msr_set_bit(MSR_AMD64_DE_CFG, 31); |
| 805 | 805 | } |
| 806 | 806 | |
| 807 | +static bool rdrand_force; | |
| 808 | + | |
| 809 | +static int __init rdrand_cmdline(char *str) | |
| 810 | +{ | |
| 811 | + if (!str) | |
| 812 | + return -EINVAL; | |
| 813 | + | |
| 814 | + if (!strcmp(str, "force")) | |
| 815 | + rdrand_force = true; | |
| 816 | + else | |
| 817 | + return -EINVAL; | |
| 818 | + | |
| 819 | + return 0; | |
| 820 | +} | |
| 821 | +early_param("rdrand", rdrand_cmdline); | |
| 822 | + | |
| 823 | +static void clear_rdrand_cpuid_bit(struct cpuinfo_x86 *c) | |
| 824 | +{ | |
| 825 | + /* | |
| 826 | + * Saving of the MSR used to hide the RDRAND support during | |
| 827 | + * suspend/resume is done by arch/x86/power/cpu.c, which is | |
| 828 | + * dependent on CONFIG_PM_SLEEP. | |
| 829 | + */ | |
| 830 | + if (!IS_ENABLED(CONFIG_PM_SLEEP)) | |
| 831 | + return; | |
| 832 | + | |
| 833 | + /* | |
| 834 | + * The nordrand option can clear X86_FEATURE_RDRAND, so check for | |
| 835 | + * RDRAND support using the CPUID function directly. | |
| 836 | + */ | |
| 837 | + if (!(cpuid_ecx(1) & BIT(30)) || rdrand_force) | |
| 838 | + return; | |
| 839 | + | |
| 840 | + msr_clear_bit(MSR_AMD64_CPUID_FN_1, 62); | |
| 841 | + | |
| 842 | + /* | |
| 843 | + * Verify that the CPUID change has occurred in case the kernel is | |
| 844 | + * running virtualized and the hypervisor doesn't support the MSR. | |
| 845 | + */ | |
| 846 | + if (cpuid_ecx(1) & BIT(30)) { | |
| 847 | + pr_info_once("BIOS may not properly restore RDRAND after suspend, but hypervisor does not support hiding RDRAND via CPUID.\n"); | |
| 848 | + return; | |
| 849 | + } | |
| 850 | + | |
| 851 | + clear_cpu_cap(c, X86_FEATURE_RDRAND); | |
| 852 | + pr_info_once("BIOS may not properly restore RDRAND after suspend, hiding RDRAND via CPUID. Use rdrand=force to reenable.\n"); | |
| 853 | +} | |
| 854 | + | |
| 855 | +static void init_amd_jg(struct cpuinfo_x86 *c) | |
| 856 | +{ | |
| 857 | + /* | |
| 858 | + * Some BIOS implementations do not restore proper RDRAND support | |
| 859 | + * across suspend and resume. Check on whether to hide the RDRAND | |
| 860 | + * instruction support via CPUID. | |
| 861 | + */ | |
| 862 | + clear_rdrand_cpuid_bit(c); | |
| 863 | +} | |
| 864 | + | |
| 807 | 865 | static void init_amd_bd(struct cpuinfo_x86 *c) |
| 808 | 866 | { |
| 809 | 867 | u64 value; |
| @@ -818,6 +876,13 @@ static void init_amd_bd(struct cpuinfo_x86 *c) · 8 unmodified lines | ||
| 818 | 876 | wrmsrl_safe(MSR_F15H_IC_CFG, value); |
| 819 | 877 | } |
| 820 | 878 | } |
| 879 | + | |
| 880 | + /* | |
| 881 | + * Some BIOS implementations do not restore proper RDRAND support | |
| 882 | + * across suspend and resume. Check on whether to hide the RDRAND | |
| 883 | + * instruction support via CPUID. | |
| 884 | + */ | |
| 885 | + clear_rdrand_cpuid_bit(c); | |
| 821 | 886 | } |
| 822 | 887 | |
| 823 | 888 | static void init_amd_zn(struct cpuinfo_x86 *c) |
| @@ -860,6 +925,7 @@ static void init_amd(struct cpuinfo_x86 *c) · 36 unmodified lines | ||
| 860 | 925 | case 0x10: init_amd_gh(c); break; |
| 861 | 926 | case 0x12: init_amd_ln(c); break; |
| 862 | 927 | case 0x15: init_amd_bd(c); break; |
| 928 | + case 0x16: init_amd_jg(c); break; | |
| 863 | 929 | case 0x17: init_amd_zn(c); break; |
| 864 | 930 | } |
| 865 | 931 | |
| @@ -34,6 +34,7 @@ · 33 unmodified lines | ||
| 34 | 34 | |
| 35 | 35 | #include "cpu.h" |
| 36 | 36 | |
| 37 | +static void __init spectre_v1_select_mitigation(void); | |
| 37 | 38 | static void __init spectre_v2_select_mitigation(void); |
| 38 | 39 | static void __init ssb_select_mitigation(void); |
| 39 | 40 | static void __init l1tf_select_mitigation(void); |
| @@ -98,17 +99,11 @@ void __init check_bugs(void) · 58 unmodified lines | ||
| 98 | 99 | if (boot_cpu_has(X86_FEATURE_STIBP)) |
| 99 | 100 | x86_spec_ctrl_mask |= SPEC_CTRL_STIBP; |
| 100 | 101 | |
| 101 | − /* Select the proper spectre mitigation before patching alternatives */ | |
| 102 | + /* Select the proper CPU mitigations before patching alternatives: */ | |
| 103 | + spectre_v1_select_mitigation(); | |
| 102 | 104 | spectre_v2_select_mitigation(); |
| 103 | − | |
| 104 | − /* | |
| 105 | − * Select proper mitigation for any exposure to the Speculative Store | |
| 106 | − * Bypass vulnerability. | |
| 107 | − */ | |
| 108 | 105 | ssb_select_mitigation(); |
| 109 | − | |
| 110 | 106 | l1tf_select_mitigation(); |
| 111 | − | |
| 112 | 107 | mds_select_mitigation(); |
| 113 | 108 | |
| 114 | 109 | arch_smt_update(); |
| @@ -273,6 +268,98 @@ static int __init mds_cmdline(char *str) · 158 unmodified lines | ||
| 273 | 268 | } |
| 274 | 269 | early_param("mds", mds_cmdline); |
| 275 | 270 | |
| 271 | +#undef pr_fmt | |
| 272 | +#define pr_fmt(fmt) "Spectre V1 : " fmt | |
| 273 | + | |
| 274 | +enum spectre_v1_mitigation { | |
| 275 | + SPECTRE_V1_MITIGATION_NONE, | |
| 276 | + SPECTRE_V1_MITIGATION_AUTO, | |
| 277 | +}; | |
| 278 | + | |
| 279 | +static enum spectre_v1_mitigation spectre_v1_mitigation __ro_after_init = | |
| 280 | + SPECTRE_V1_MITIGATION_AUTO; | |
| 281 | + | |
| 282 | +static const char * const spectre_v1_strings[] = { | |
| 283 | + [SPECTRE_V1_MITIGATION_NONE] = "Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers", | |
| 284 | + [SPECTRE_V1_MITIGATION_AUTO] = "Mitigation: usercopy/swapgs barriers and __user pointer sanitization", | |
| 285 | +}; | |
| 286 | + | |
| 287 | +/* | |
| 288 | + * Does SMAP provide full mitigation against speculative kernel access to | |
| 289 | + * userspace? | |
| 290 | + */ | |
| 291 | +static bool smap_works_speculatively(void) | |
| 292 | +{ | |
| 293 | + if (!boot_cpu_has(X86_FEATURE_SMAP)) | |
| 294 | + return false; | |
| 295 | + | |
| 296 | + /* | |
| 297 | + * On CPUs which are vulnerable to Meltdown, SMAP does not | |
| 298 | + * prevent speculative access to user data in the L1 cache. | |
| 299 | + * Consider SMAP to be non-functional as a mitigation on these | |
| 300 | + * CPUs. | |
| 301 | + */ | |
| 302 | + if (boot_cpu_has(X86_BUG_CPU_MELTDOWN)) | |
| 303 | + return false; | |
| 304 | + | |
| 305 | + return true; | |
| 306 | +} | |
| 307 | + | |
| 308 | +static void __init spectre_v1_select_mitigation(void) | |
| 309 | +{ | |
| 310 | + if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1) || cpu_mitigations_off()) { | |
| 311 | + spectre_v1_mitigation = SPECTRE_V1_MITIGATION_NONE; | |
| 312 | + return; | |
| 313 | + } | |
| 314 | + | |
| 315 | + if (spectre_v1_mitigation == SPECTRE_V1_MITIGATION_AUTO) { | |
| 316 | + /* | |
| 317 | + * With Spectre v1, a user can speculatively control either | |
| 318 | + * path of a conditional swapgs with a user-controlled GS | |
| 319 | + * value. The mitigation is to add lfences to both code paths. | |
| 320 | + * | |
| 321 | + * If FSGSBASE is enabled, the user can put a kernel address in | |
| 322 | + * GS, in which case SMAP provides no protection. | |
| 323 | + * | |
| 324 | + * [ NOTE: Don't check for X86_FEATURE_FSGSBASE until the | |
| 325 | + * FSGSBASE enablement patches have been merged. ] | |
| 326 | + * | |
| 327 | + * If FSGSBASE is disabled, the user can only put a user space | |
| 328 | + * address in GS. That makes an attack harder, but still | |
| 329 | + * possible if there's no SMAP protection. | |
| 330 | + */ | |
| 331 | + if (!smap_works_speculatively()) { | |
| 332 | + /* | |
| 333 | + * Mitigation can be provided from SWAPGS itself or | |
| 334 | + * PTI as the CR3 write in the Meltdown mitigation | |
| 335 | + * is serializing. | |
| 336 | + * | |
| 337 | + * If neither is there, mitigate with an LFENCE to | |
| 338 | + * stop speculation through swapgs. | |
| 339 | + */ | |
| 340 | + if (boot_cpu_has_bug(X86_BUG_SWAPGS) && | |
| 341 | + !boot_cpu_has(X86_FEATURE_PTI)) | |
| 342 | + setup_force_cpu_cap(X86_FEATURE_FENCE_SWAPGS_USER); | |
| 343 | + | |
| 344 | + /* | |
| 345 | + * Enable lfences in the kernel entry (non-swapgs) | |
| 346 | + * paths, to prevent user entry from speculatively | |
| 347 | + * skipping swapgs. | |
| 348 | + */ | |
| 349 | + setup_force_cpu_cap(X86_FEATURE_FENCE_SWAPGS_KERNEL); | |
| 350 | + } | |
| 351 | + } | |
| 352 | + | |
| 353 | + pr_info("%s\n", spectre_v1_strings[spectre_v1_mitigation]); | |
| 354 | +} | |
| 355 | + | |
| 356 | +static int __init nospectre_v1_cmdline(char *str) | |
| 357 | +{ | |
| 358 | + spectre_v1_mitigation = SPECTRE_V1_MITIGATION_NONE; | |
| 359 | + return 0; | |
| 360 | +} | |
| 361 | +early_param("nospectre_v1", nospectre_v1_cmdline); | |
| 362 | + | |
| 276 | 363 | #undef pr_fmt |
| 277 | 364 | #define pr_fmt(fmt) "Spectre V2 : " fmt |
| 278 | 365 | |
| @@ -1226,7 +1313,7 @@ static ssize_t l1tf_show_state(char *buf) · 947 unmodified lines | ||
| 1226 | 1313 | |
| 1227 | 1314 | static ssize_t mds_show_state(char *buf) |
| 1228 | 1315 | { |
| 1229 | − if (!hypervisor_is_type(X86_HYPER_NATIVE)) { | |
| 1316 | + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { | |
| 1230 | 1317 | return sprintf(buf, "%s; SMT Host state unknown\n", |
| 1231 | 1318 | mds_strings[mds_mitigation]); |
| 1232 | 1319 | } |
| @@ -1290,7 +1377,7 @@ static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr · 57 unmodified lines | ||
| 1290 | 1377 | break; |
| 1291 | 1378 | |
| 1292 | 1379 | case X86_BUG_SPECTRE_V1: |
| 1293 | − return sprintf(buf, "Mitigation: __user pointer sanitization\n"); | |
| 1380 | + return sprintf(buf, "%s\n", spectre_v1_strings[spectre_v1_mitigation]); | |
| 1294 | 1381 | |
| 1295 | 1382 | case X86_BUG_SPECTRE_V2: |
| 1296 | 1383 | return sprintf(buf, "%s%s%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled], |
| @@ -1022,6 +1022,7 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) · 1021 unmodified lines | ||
| 1022 | 1022 | #define NO_L1TF BIT(3) |
| 1023 | 1023 | #define NO_MDS BIT(4) |
| 1024 | 1024 | #define MSBDS_ONLY BIT(5) |
| 1025 | +#define NO_SWAPGS BIT(6) | |
| 1025 | 1026 | |
| 1026 | 1027 | #define VULNWL(_vendor, _family, _model, _whitelist) \ |
| 1027 | 1028 | { X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist } |
| @@ -1048,30 +1049,38 @@ static const __initconst struct x86_cpu_id cpu_vuln_whitelist[] = { · 20 unmodified lines | ||
| 1048 | 1049 | VULNWL_INTEL(ATOM_BONNELL, NO_SPECULATION), |
| 1049 | 1050 | VULNWL_INTEL(ATOM_BONNELL_MID, NO_SPECULATION), |
| 1050 | 1051 | |
| 1051 | − VULNWL_INTEL(ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1052 | − VULNWL_INTEL(ATOM_SILVERMONT_X, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1053 | − VULNWL_INTEL(ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1054 | − VULNWL_INTEL(ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1055 | − VULNWL_INTEL(XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1056 | − VULNWL_INTEL(XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY), | |
| 1052 | + VULNWL_INTEL(ATOM_SILVERMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1053 | + VULNWL_INTEL(ATOM_SILVERMONT_X, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1054 | + VULNWL_INTEL(ATOM_SILVERMONT_MID, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1055 | + VULNWL_INTEL(ATOM_AIRMONT, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1056 | + VULNWL_INTEL(XEON_PHI_KNL, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1057 | + VULNWL_INTEL(XEON_PHI_KNM, NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1057 | 1058 | |
| 1058 | 1059 | VULNWL_INTEL(CORE_YONAH, NO_SSB), |
| 1059 | 1060 | |
| 1060 | − VULNWL_INTEL(ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY), | |
| 1061 | + VULNWL_INTEL(ATOM_AIRMONT_MID, NO_L1TF | MSBDS_ONLY | NO_SWAPGS), | |
| 1061 | 1062 | |
| 1062 | − VULNWL_INTEL(ATOM_GOLDMONT, NO_MDS | NO_L1TF), | |
| 1063 | − VULNWL_INTEL(ATOM_GOLDMONT_X, NO_MDS | NO_L1TF), | |
| 1064 | − VULNWL_INTEL(ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF), | |
| 1063 | + VULNWL_INTEL(ATOM_GOLDMONT, NO_MDS | NO_L1TF | NO_SWAPGS), | |
| 1064 | + VULNWL_INTEL(ATOM_GOLDMONT_X, NO_MDS | NO_L1TF | NO_SWAPGS), | |
| 1065 | + VULNWL_INTEL(ATOM_GOLDMONT_PLUS, NO_MDS | NO_L1TF | NO_SWAPGS), | |
| 1066 | + | |
| 1067 | + /* | |
| 1068 | + * Technically, swapgs isn't serializing on AMD (despite it previously | |
| 1069 | + * being documented as such in the APM). But according to AMD, %gs is | |
| 1070 | + * updated non-speculatively, and the issuing of %gs-relative memory | |
| 1071 | + * operands will be blocked until the %gs update completes, which is | |
| 1072 | + * good enough for our purposes. | |
| 1073 | + */ | |
| 1065 | 1074 | |
| 1066 | 1075 | /* AMD Family 0xf - 0x12 */ |
| 1067 | − VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS), | |
| 1068 | − VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS), | |
| 1069 | − VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS), | |
| 1070 | − VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS), | |
| 1076 | + VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1077 | + VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1078 | + VULNWL_AMD(0x11, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1079 | + VULNWL_AMD(0x12, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1071 | 1080 | |
| 1072 | 1081 | /* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */ |
| 1073 | − VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS), | |
| 1074 | − VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS), | |
| 1082 | + VULNWL_AMD(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1083 | + VULNWL_HYGON(X86_FAMILY_ANY, NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS), | |
| 1075 | 1084 | {} |
| 1076 | 1085 | }; |
| 1077 | 1086 | |
| @@ -1108,6 +1117,9 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) · 30 unmodified lines | ||
| 1108 | 1117 | setup_force_cpu_bug(X86_BUG_MSBDS_ONLY); |
| 1109 | 1118 | } |
| 1110 | 1119 | |
| 1120 | + if (!cpu_matches(NO_SWAPGS)) | |
| 1121 | + setup_force_cpu_bug(X86_BUG_SWAPGS); | |
| 1122 | + | |
| 1111 | 1123 | if (cpu_matches(NO_MELTDOWN)) |
| 1112 | 1124 | return; |
| 1113 | 1125 | |
| @@ -98,6 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) · 97 unmodified lines | ||
| 98 | 98 | case 7: |
| 99 | 99 | if (size < 0x40) |
| 100 | 100 | break; |
| 101 | + /* Else, fall through */ | |
| 101 | 102 | case 6: |
| 102 | 103 | case 5: |
| 103 | 104 | case 4: |
| @@ -17,6 +17,12 @@ · 16 unmodified lines | ||
| 17 | 17 | */ |
| 18 | 18 | static u32 umwait_control_cached = UMWAIT_CTRL_VAL(100000, UMWAIT_C02_ENABLE); |
| 19 | 19 | |
| 20 | +/* | |
| 21 | + * Cache the original IA32_UMWAIT_CONTROL MSR value which is configured by | |
| 22 | + * hardware or BIOS before kernel boot. | |
| 23 | + */ | |
| 24 | +static u32 orig_umwait_control_cached __ro_after_init; | |
| 25 | + | |
| 20 | 26 | /* |
| 21 | 27 | * Serialize access to umwait_control_cached and IA32_UMWAIT_CONTROL MSR in |
| 22 | 28 | * the sysfs write functions. |
| @@ -52,6 +58,23 @@ static int umwait_cpu_online(unsigned int cpu) · 29 unmodified lines | ||
| 52 | 58 | return 0; |
| 53 | 59 | } |
| 54 | 60 | |
| 61 | +/* | |
| 62 | + * The CPU hotplug callback sets the control MSR to the original control | |
| 63 | + * value. | |
| 64 | + */ | |
| 65 | +static int umwait_cpu_offline(unsigned int cpu) | |
| 66 | +{ | |
| 67 | + /* | |
| 68 | + * This code is protected by the CPU hotplug already and | |
| 69 | + * orig_umwait_control_cached is never changed after it caches | |
| 70 | + * the original control MSR value in umwait_init(). So there | |
| 71 | + * is no race condition here. | |
| 72 | + */ | |
| 73 | + wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0); | |
| 74 | + | |
| 75 | + return 0; | |
| 76 | +} | |
| 77 | + | |
| 55 | 78 | /* |
| 56 | 79 | * On resume, restore IA32_UMWAIT_CONTROL MSR on the boot processor which |
| 57 | 80 | * is the only active CPU at this time. The MSR is set up on the APs via the |
| @@ -185,8 +208,22 @@ static int __init umwait_init(void) · 127 unmodified lines | ||
| 185 | 208 | if (!boot_cpu_has(X86_FEATURE_WAITPKG)) |
| 186 | 209 | return -ENODEV; |
| 187 | 210 | |
| 211 | + /* | |
| 212 | + * Cache the original control MSR value before the control MSR is | |
| 213 | + * changed. This is the only place where orig_umwait_control_cached | |
| 214 | + * is modified. | |
| 215 | + */ | |
| 216 | + rdmsrl(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached); | |
| 217 | + | |
| 188 | 218 | ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "umwait:online", |
| 189 | − umwait_cpu_online, NULL); | |
| 219 | + umwait_cpu_online, umwait_cpu_offline); | |
| 220 | + if (ret < 0) { | |
| 221 | + /* | |
| 222 | + * On failure, the control MSR on all CPUs has the | |
| 223 | + * original control value. | |
| 224 | + */ | |
| 225 | + return ret; | |
| 226 | + } | |
| 190 | 227 | |
| 191 | 228 | register_syscore_ops(&umwait_syscore_ops); |
| 192 | 229 | |
| @@ -193,10 +193,10 @@ ENTRY(secondary_startup_64) · 192 unmodified lines | ||
| 193 | 193 | |
| 194 | 194 | /* Set up %gs. |
| 195 | 195 | * |
| 196 | − * The base of %gs always points to the bottom of the irqstack | |
| 197 | − * union. If the stack protector canary is enabled, it is | |
| 198 | − * located at %gs:40. Note that, on SMP, the boot cpu uses | |
| 199 | − * init data section till per cpu areas are set up. | |
| 196 | + * The base of %gs always points to fixed_percpu_data. If the | |
| 197 | + * stack protector canary is enabled, it is located at %gs:40. | |
| 198 | + * Note that, on SMP, the boot cpu uses init data section until | |
| 199 | + * the per cpu areas are set up. | |
| 200 | 200 | */ |
| 201 | 201 | movl $MSR_GS_BASE,%ecx |
| 202 | 202 | movl initial_gs(%rip),%eax |
| @@ -827,10 +827,6 @@ int __init hpet_enable(void) · 826 unmodified lines | ||
| 827 | 827 | if (!hpet_cfg_working()) |
| 828 | 828 | goto out_nohpet; |
| 829 | 829 | |
| 830 | − /* Validate that the counter is counting */ | |
| 831 | − if (!hpet_counting()) | |
| 832 | − goto out_nohpet; | |
| 833 | − | |
| 834 | 830 | /* |
| 835 | 831 | * Read the period and check for a sane value: |
| 836 | 832 | */ |
| @@ -896,6 +892,14 @@ int __init hpet_enable(void) · 59 unmodified lines | ||
| 896 | 892 | } |
| 897 | 893 | hpet_print_config(); |
| 898 | 894 | |
| 895 | + /* | |
| 896 | + * Validate that the counter is counting. This needs to be done | |
| 897 | + * after sanitizing the config registers to properly deal with | |
| 898 | + * force enabled HPETs. | |
| 899 | + */ | |
| 900 | + if (!hpet_counting()) | |
| 901 | + goto out_nohpet; | |
| 902 | + | |
| 899 | 903 | clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq); |
| 900 | 904 | |
| 901 | 905 | if (id & HPET_ID_LEGSUP) { |
| @@ -308,9 +308,6 @@ static notrace void kvm_guest_apic_eoi_write(u32 reg, u32 val) · 307 unmodified lines | ||
| 308 | 308 | |
| 309 | 309 | static void kvm_guest_cpu_init(void) |
| 310 | 310 | { |
| 311 | − if (!kvm_para_available()) | |
| 312 | − return; | |
| 313 | − | |
| 314 | 311 | if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF) && kvmapf) { |
| 315 | 312 | u64 pa = slow_virt_to_phys(this_cpu_ptr(&apf_reason)); |
| 316 | 313 | |
| @@ -625,9 +622,6 @@ static void __init kvm_guest_init(void) · 308 unmodified lines | ||
| 625 | 622 | { |
| 626 | 623 | int i; |
| 627 | 624 | |
| 628 | − if (!kvm_para_available()) | |
| 629 | − return; | |
| 630 | − | |
| 631 | 625 | paravirt_ops_setup(); |
| 632 | 626 | register_reboot_notifier(&kvm_pv_reboot_nb); |
| 633 | 627 | for (i = 0; i < KVM_TASK_SLEEP_HASHSIZE; i++) |
| @@ -848,8 +842,6 @@ asm( · 214 unmodified lines | ||
| 848 | 842 | */ |
| 849 | 843 | void __init kvm_spinlock_init(void) |
| 850 | 844 | { |
| 851 | − if (!kvm_para_available()) | |
| 852 | − return; | |
| 853 | 845 | /* Does host kernel support KVM_FEATURE_PV_UNHALT? */ |
| 854 | 846 | if (!kvm_para_has_feature(KVM_FEATURE_PV_UNHALT)) |
| 855 | 847 | return; |
| @@ -201,6 +201,7 @@ static int set_segment_reg(struct task_struct *task, · 200 unmodified lines | ||
| 201 | 201 | case offsetof(struct user_regs_struct, ss): |
| 202 | 202 | if (unlikely(value == 0)) |
| 203 | 203 | return -EIO; |
| 204 | + /* Else, fall through */ | |
| 204 | 205 | |
| 205 | 206 | default: |
| 206 | 207 | *pt_regs_access(task_pt_regs(task), offset) = value; |
| @@ -100,7 +100,7 @@ copy_stack_frame(const void __user *fp, struct stack_frame_user *frame) · 99 unmodified lines | ||
| 100 | 100 | { |
| 101 | 101 | int ret; |
| 102 | 102 | |
| 103 | − if (!access_ok(fp, sizeof(*frame))) | |
| 103 | + if (__range_not_ok(fp, sizeof(*frame), TASK_SIZE)) | |
| 104 | 104 | return 0; |
| 105 | 105 | |
| 106 | 106 | ret = 1; |
| @@ -230,9 +230,55 @@ static const struct dmi_system_id efifb_dmi_system_table[] __initconst = { · 229 unmodified lines | ||
| 230 | 230 | {}, |
| 231 | 231 | }; |
| 232 | 232 | |
| 233 | +/* | |
| 234 | + * Some devices have a portrait LCD but advertise a landscape resolution (and | |
| 235 | + * pitch). We simply swap width and height for these devices so that we can | |
| 236 | + * correctly deal with some of them coming with multiple resolutions. | |
| 237 | + */ | |
| 238 | +static const struct dmi_system_id efifb_dmi_swap_width_height[] __initconst = { | |
| 239 | + { | |
| 240 | + /* | |
| 241 | + * Lenovo MIIX310-10ICR, only some batches have the troublesome | |
| 242 | + * 800x1280 portrait screen. Luckily the portrait version has | |
| 243 | + * its own BIOS version, so we match on that. | |
| 244 | + */ | |
| 245 | + .matches = { | |
| 246 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 247 | + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"), | |
| 248 | + DMI_EXACT_MATCH(DMI_BIOS_VERSION, "1HCN44WW"), | |
| 249 | + }, | |
| 250 | + }, | |
| 251 | + { | |
| 252 | + /* Lenovo MIIX 320-10ICR with 800x1280 portrait screen */ | |
| 253 | + .matches = { | |
| 254 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 255 | + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, | |
| 256 | + "Lenovo MIIX 320-10ICR"), | |
| 257 | + }, | |
| 258 | + }, | |
| 259 | + { | |
| 260 | + /* Lenovo D330 with 800x1280 or 1200x1920 portrait screen */ | |
| 261 | + .matches = { | |
| 262 | + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 263 | + DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, | |
| 264 | + "Lenovo ideapad D330-10IGM"), | |
| 265 | + }, | |
| 266 | + }, | |
| 267 | + {}, | |
| 268 | +}; | |
| 269 | + | |
| 233 | 270 | __init void sysfb_apply_efi_quirks(void) |
| 234 | 271 | { |
| 235 | 272 | if (screen_info.orig_video_isVGA != VIDEO_TYPE_EFI || |
| 236 | 273 | !(screen_info.capabilities & VIDEO_CAPABILITY_SKIP_QUIRKS)) |
| 237 | 274 | dmi_check_system(efifb_dmi_system_table); |
| 275 | + | |
| 276 | + if (screen_info.orig_video_isVGA == VIDEO_TYPE_EFI && | |
| 277 | + dmi_check_system(efifb_dmi_swap_width_height)) { | |
| 278 | + u16 temp = screen_info.lfb_width; | |
| 279 | + | |
| 280 | + screen_info.lfb_width = screen_info.lfb_height; | |
| 281 | + screen_info.lfb_height = temp; | |
| 282 | + screen_info.lfb_linelength = 4 * screen_info.lfb_width; | |
| 283 | + } | |
| 238 | 284 | } |
| @@ -508,9 +508,12 @@ struct uprobe_xol_ops { · 507 unmodified lines | ||
| 508 | 508 | void (*abort)(struct arch_uprobe *, struct pt_regs *); |
| 509 | 509 | }; |
| 510 | 510 | |
| 511 | −static inline int sizeof_long(void) | |
| 511 | +static inline int sizeof_long(struct pt_regs *regs) | |
| 512 | 512 | { |
| 513 | − return in_ia32_syscall() ? 4 : 8; | |
| 513 | + /* | |
| 514 | + * Check registers for mode as in_xxx_syscall() does not apply here. | |
| 515 | + */ | |
| 516 | + return user_64bit_mode(regs) ? 8 : 4; | |
| 514 | 517 | } |
| 515 | 518 | |
| 516 | 519 | static int default_pre_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs) |
| @@ -521,9 +524,9 @@ static int default_pre_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs) · 4 unmodified lines | ||
| 521 | 524 | |
| 522 | 525 | static int emulate_push_stack(struct pt_regs *regs, unsigned long val) |
| 523 | 526 | { |
| 524 | − unsigned long new_sp = regs->sp - sizeof_long(); | |
| 527 | + unsigned long new_sp = regs->sp - sizeof_long(regs); | |
| 525 | 528 | |
| 526 | − if (copy_to_user((void __user *)new_sp, &val, sizeof_long())) | |
| 529 | + if (copy_to_user((void __user *)new_sp, &val, sizeof_long(regs))) | |
| 527 | 530 | return -EFAULT; |
| 528 | 531 | |
| 529 | 532 | regs->sp = new_sp; |
| @@ -556,7 +559,7 @@ static int default_post_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs · 26 unmodified lines | ||
| 556 | 559 | long correction = utask->vaddr - utask->xol_vaddr; |
| 557 | 560 | regs->ip += correction; |
| 558 | 561 | } else if (auprobe->defparam.fixups & UPROBE_FIX_CALL) { |
| 559 | − regs->sp += sizeof_long(); /* Pop incorrect return address */ | |
| 562 | + regs->sp += sizeof_long(regs); /* Pop incorrect return address */ | |
| 560 | 563 | if (emulate_push_stack(regs, utask->vaddr + auprobe->defparam.ilen)) |
| 561 | 564 | return -ERESTART; |
| 562 | 565 | } |
| @@ -675,7 +678,7 @@ static int branch_post_xol_op(struct arch_uprobe *auprobe, struct pt_regs *regs) · 112 unmodified lines | ||
| 675 | 678 | * "call" insn was executed out-of-line. Just restore ->sp and restart. |
| 676 | 679 | * We could also restore ->ip and try to call branch_emulate_op() again. |
| 677 | 680 | */ |
| 678 | − regs->sp += sizeof_long(); | |
| 681 | + regs->sp += sizeof_long(regs); | |
| 679 | 682 | return -ERESTART; |
| 680 | 683 | } |
| 681 | 684 | |
| @@ -1056,7 +1059,7 @@ bool arch_uprobe_skip_sstep(struct arch_uprobe *auprobe, struct pt_regs *regs) · 374 unmodified lines | ||
| 1056 | 1059 | unsigned long |
| 1057 | 1060 | arch_uretprobe_hijack_return_addr(unsigned long trampoline_vaddr, struct pt_regs *regs) |
| 1058 | 1061 | { |
| 1059 | − int rasize = sizeof_long(), nleft; | |
| 1062 | + int rasize = sizeof_long(regs), nleft; | |
| 1060 | 1063 | unsigned long orig_ret_vaddr = 0; /* clear high bits for 32-bit apps */ |
| 1061 | 1064 | |
| 1062 | 1065 | if (copy_from_user(&orig_ret_vaddr, (void __user *)regs->sp, rasize)) |
| @@ -8,11 +8,6 @@ · 7 unmodified lines | ||
| 8 | 8 | #include <linux/debugfs.h> |
| 9 | 9 | #include "lapic.h" |
| 10 | 10 | |
| 11 | −bool kvm_arch_has_vcpu_debugfs(void) | |
| 12 | −{ | |
| 13 | − return true; | |
| 14 | −} | |
| 15 | − | |
| 16 | 11 | static int vcpu_get_timer_advance_ns(void *data, u64 *val) |
| 17 | 12 | { |
| 18 | 13 | struct kvm_vcpu *vcpu = (struct kvm_vcpu *) data; |
| @@ -48,37 +43,22 @@ static int vcpu_get_tsc_scaling_frac_bits(void *data, u64 *val) · 29 unmodified lines | ||
| 48 | 43 | |
| 49 | 44 | DEFINE_SIMPLE_ATTRIBUTE(vcpu_tsc_scaling_frac_fops, vcpu_get_tsc_scaling_frac_bits, NULL, "%llu\n"); |
| 50 | 45 | |
| 51 | −int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) | |
| 46 | +void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) | |
| 52 | 47 | { |
| 53 | − struct dentry *ret; | |
| 54 | − | |
| 55 | − ret = debugfs_create_file("tsc-offset", 0444, | |
| 56 | − vcpu->debugfs_dentry, | |
| 57 | − vcpu, &vcpu_tsc_offset_fops); | |
| 58 | − if (!ret) | |
| 59 | − return -ENOMEM; | |
| 48 | + debugfs_create_file("tsc-offset", 0444, vcpu->debugfs_dentry, vcpu, | |
| 49 | + &vcpu_tsc_offset_fops); | |
| 60 | 50 | |
| 61 | − if (lapic_in_kernel(vcpu)) { | |
| 62 | − ret = debugfs_create_file("lapic_timer_advance_ns", 0444, | |
| 63 | − vcpu->debugfs_dentry, | |
| 64 | − vcpu, &vcpu_timer_advance_ns_fops); | |
| 65 | − if (!ret) | |
| 66 | − return -ENOMEM; | |
| 67 | − } | |
| 51 | + if (lapic_in_kernel(vcpu)) | |
| 52 | + debugfs_create_file("lapic_timer_advance_ns", 0444, | |
| 53 | + vcpu->debugfs_dentry, vcpu, | |
| 54 | + &vcpu_timer_advance_ns_fops); | |
| 68 | 55 | |
| 69 | 56 | if (kvm_has_tsc_control) { |
| 70 | − ret = debugfs_create_file("tsc-scaling-ratio", 0444, | |
| 71 | − vcpu->debugfs_dentry, | |
| 72 | − vcpu, &vcpu_tsc_scaling_fops); | |
| 73 | − if (!ret) | |
| 74 | − return -ENOMEM; | |
| 75 | − ret = debugfs_create_file("tsc-scaling-ratio-frac-bits", 0444, | |
| 76 | − vcpu->debugfs_dentry, | |
| 77 | − vcpu, &vcpu_tsc_scaling_frac_fops); | |
| 78 | − if (!ret) | |
| 79 | − return -ENOMEM; | |
| 80 | − | |
| 57 | + debugfs_create_file("tsc-scaling-ratio", 0444, | |
| 58 | + vcpu->debugfs_dentry, vcpu, | |
| 59 | + &vcpu_tsc_scaling_fops); | |
| 60 | + debugfs_create_file("tsc-scaling-ratio-frac-bits", 0444, | |
| 61 | + vcpu->debugfs_dentry, vcpu, | |
| 62 | + &vcpu_tsc_scaling_frac_fops); | |
| 81 | 63 | } |
| 82 | − | |
| 83 | − return 0; | |
| 84 | 64 | } |
| @@ -1781,7 +1781,7 @@ int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args) · 1780 unmodified lines | ||
| 1781 | 1781 | int kvm_vcpu_ioctl_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid, |
| 1782 | 1782 | struct kvm_cpuid_entry2 __user *entries) |
| 1783 | 1783 | { |
| 1784 | − uint16_t evmcs_ver = kvm_x86_ops->nested_get_evmcs_version(vcpu); | |
| 1784 | + uint16_t evmcs_ver = 0; | |
| 1785 | 1785 | struct kvm_cpuid_entry2 cpuid_entries[] = { |
| 1786 | 1786 | { .function = HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS }, |
| 1787 | 1787 | { .function = HYPERV_CPUID_INTERFACE }, |
| @@ -1793,6 +1793,9 @@ int kvm_vcpu_ioctl_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid, · 5 unmodified lines | ||
| 1793 | 1793 | }; |
| 1794 | 1794 | int i, nent = ARRAY_SIZE(cpuid_entries); |
| 1795 | 1795 | |
| 1796 | + if (kvm_x86_ops->nested_get_evmcs_version) | |
| 1797 | + evmcs_ver = kvm_x86_ops->nested_get_evmcs_version(vcpu); | |
| 1798 | + | |
| 1796 | 1799 | /* Skip NESTED_FEATURES if eVMCS is not supported */ |
| 1797 | 1800 | if (!evmcs_ver) |
| 1798 | 1801 | --nent; |
| @@ -216,6 +216,9 @@ static void recalculate_apic_map(struct kvm *kvm) · 215 unmodified lines | ||
| 216 | 216 | if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) |
| 217 | 217 | new->phys_map[xapic_id] = apic; |
| 218 | 218 | |
| 219 | + if (!kvm_apic_sw_enabled(apic)) | |
| 220 | + continue; | |
| 221 | + | |
| 219 | 222 | ldr = kvm_lapic_get_reg(apic, APIC_LDR); |
| 220 | 223 | |
| 221 | 224 | if (apic_x2apic_mode(apic)) { |
| @@ -258,6 +261,8 @@ static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) · 36 unmodified lines | ||
| 258 | 261 | static_key_slow_dec_deferred(&apic_sw_disabled); |
| 259 | 262 | else |
| 260 | 263 | static_key_slow_inc(&apic_sw_disabled.key); |
| 264 | + | |
| 265 | + recalculate_apic_map(apic->vcpu->kvm); | |
| 261 | 266 | } |
| 262 | 267 | } |
| 263 | 268 | |
| @@ -1548,7 +1553,6 @@ static void kvm_apic_inject_pending_timer_irqs(struct kvm_lapic *apic) · 1284 unmodified lines | ||
| 1548 | 1553 | static void apic_timer_expired(struct kvm_lapic *apic) |
| 1549 | 1554 | { |
| 1550 | 1555 | struct kvm_vcpu *vcpu = apic->vcpu; |
| 1551 | − struct swait_queue_head *q = &vcpu->wq; | |
| 1552 | 1556 | struct kvm_timer *ktimer = &apic->lapic_timer; |
| 1553 | 1557 | |
| 1554 | 1558 | if (atomic_read(&apic->lapic_timer.pending)) |
| @@ -1566,13 +1570,6 @@ static void apic_timer_expired(struct kvm_lapic *apic) · 11 unmodified lines | ||
| 1566 | 1570 | |
| 1567 | 1571 | atomic_inc(&apic->lapic_timer.pending); |
| 1568 | 1572 | kvm_set_pending_timer(vcpu); |
| 1569 | − | |
| 1570 | − /* | |
| 1571 | − * For x86, the atomic_inc() is serialized, thus | |
| 1572 | − * using swait_active() is safe. | |
| 1573 | − */ | |
| 1574 | − if (swait_active(q)) | |
| 1575 | − swake_up_one(q); | |
| 1576 | 1573 | } |
| 1577 | 1574 | |
| 1578 | 1575 | static void start_sw_tscdeadline(struct kvm_lapic *apic) |
| @@ -3466,7 +3466,7 @@ static bool fast_page_fault(struct kvm_vcpu *vcpu, gva_t gva, int level, · 3465 unmodified lines | ||
| 3466 | 3466 | /* |
| 3467 | 3467 | * Currently, fast page fault only works for direct mapping |
| 3468 | 3468 | * since the gfn is not stable for indirect shadow page. See |
| 3469 | − * Documentation/virtual/kvm/locking.txt to get more detail. | |
| 3469 | + * Documentation/virt/kvm/locking.txt to get more detail. | |
| 3470 | 3470 | */ |
| 3471 | 3471 | fault_handled = fast_pf_fix_direct_spte(vcpu, sp, |
| 3472 | 3472 | iterator.sptep, spte, |
| @@ -5653,38 +5653,7 @@ static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm, · 2180 unmodified lines | ||
| 5653 | 5653 | struct kvm_memory_slot *slot, |
| 5654 | 5654 | struct kvm_page_track_notifier_node *node) |
| 5655 | 5655 | { |
| 5656 | − struct kvm_mmu_page *sp; | |
| 5657 | − LIST_HEAD(invalid_list); | |
| 5658 | − unsigned long i; | |
| 5659 | − bool flush; | |
| 5660 | − gfn_t gfn; | |
| 5661 | − | |
| 5662 | − spin_lock(&kvm->mmu_lock); | |
| 5663 | − | |
| 5664 | − if (list_empty(&kvm->arch.active_mmu_pages)) | |
| 5665 | − goto out_unlock; | |
| 5666 | − | |
| 5667 | − flush = slot_handle_all_level(kvm, slot, kvm_zap_rmapp, false); | |
| 5668 | − | |
| 5669 | − for (i = 0; i < slot->npages; i++) { | |
| 5670 | − gfn = slot->base_gfn + i; | |
| 5671 | − | |
| 5672 | − for_each_valid_sp(kvm, sp, gfn) { | |
| 5673 | − if (sp->gfn != gfn) | |
| 5674 | − continue; | |
| 5675 | − | |
| 5676 | − kvm_mmu_prepare_zap_page(kvm, sp, &invalid_list); | |
| 5677 | − } | |
| 5678 | − if (need_resched() || spin_needbreak(&kvm->mmu_lock)) { | |
| 5679 | − kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); | |
| 5680 | − flush = false; | |
| 5681 | − cond_resched_lock(&kvm->mmu_lock); | |
| 5682 | − } | |
| 5683 | − } | |
| 5684 | − kvm_mmu_remote_flush_or_zap(kvm, &invalid_list, flush); | |
| 5685 | − | |
| 5686 | −out_unlock: | |
| 5687 | − spin_unlock(&kvm->mmu_lock); | |
| 5656 | + kvm_mmu_zap_all(kvm); | |
| 5688 | 5657 | } |
| 5689 | 5658 | |
| 5690 | 5659 | void kvm_mmu_init_vm(struct kvm *kvm) |
| @@ -1714,7 +1714,6 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu) · 1713 unmodified lines | ||
| 1714 | 1714 | if (!entry) |
| 1715 | 1715 | return -EINVAL; |
| 1716 | 1716 | |
| 1717 | − new_entry = READ_ONCE(*entry); | |
| 1718 | 1717 | new_entry = __sme_set((page_to_phys(svm->avic_backing_page) & |
| 1719 | 1718 | AVIC_PHYSICAL_ID_ENTRY_BACKING_PAGE_MASK) | |
| 1720 | 1719 | AVIC_PHYSICAL_ID_ENTRY_VALID_MASK); |
| @@ -2143,12 +2142,20 @@ static struct kvm_vcpu *svm_create_vcpu(struct kvm *kvm, unsigned int id) · 422 unmodified lines | ||
| 2143 | 2142 | goto out; |
| 2144 | 2143 | } |
| 2145 | 2144 | |
| 2145 | + svm->vcpu.arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache, | |
| 2146 | + GFP_KERNEL_ACCOUNT); | |
| 2147 | + if (!svm->vcpu.arch.user_fpu) { | |
| 2148 | + printk(KERN_ERR "kvm: failed to allocate kvm userspace's fpu\n"); | |
| 2149 | + err = -ENOMEM; | |
| 2150 | + goto free_partial_svm; | |
| 2151 | + } | |
| 2152 | + | |
| 2146 | 2153 | svm->vcpu.arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache, |
| 2147 | 2154 | GFP_KERNEL_ACCOUNT); |
| 2148 | 2155 | if (!svm->vcpu.arch.guest_fpu) { |
| 2149 | 2156 | printk(KERN_ERR "kvm: failed to allocate vcpu's fpu\n"); |
| 2150 | 2157 | err = -ENOMEM; |
| 2151 | − goto free_partial_svm; | |
| 2158 | + goto free_user_fpu; | |
| 2152 | 2159 | } |
| 2153 | 2160 | |
| 2154 | 2161 | err = kvm_vcpu_init(&svm->vcpu, kvm, id); |
| @@ -2211,6 +2218,8 @@ uninit: · 56 unmodified lines | ||
| 2211 | 2218 | kvm_vcpu_uninit(&svm->vcpu); |
| 2212 | 2219 | free_svm: |
| 2213 | 2220 | kmem_cache_free(x86_fpu_cache, svm->vcpu.arch.guest_fpu); |
| 2221 | +free_user_fpu: | |
| 2222 | + kmem_cache_free(x86_fpu_cache, svm->vcpu.arch.user_fpu); | |
| 2214 | 2223 | free_partial_svm: |
| 2215 | 2224 | kmem_cache_free(kvm_vcpu_cache, svm); |
| 2216 | 2225 | out: |
| @@ -2241,6 +2250,7 @@ static void svm_free_vcpu(struct kvm_vcpu *vcpu) · 24 unmodified lines | ||
| 2241 | 2250 | __free_page(virt_to_page(svm->nested.hsave)); |
| 2242 | 2251 | __free_pages(virt_to_page(svm->nested.msrpm), MSRPM_ALLOC_ORDER); |
| 2243 | 2252 | kvm_vcpu_uninit(vcpu); |
| 2253 | + kmem_cache_free(x86_fpu_cache, svm->vcpu.arch.user_fpu); | |
| 2244 | 2254 | kmem_cache_free(x86_fpu_cache, svm->vcpu.arch.guest_fpu); |
| 2245 | 2255 | kmem_cache_free(kvm_vcpu_cache, svm); |
| 2246 | 2256 | } |
| @@ -5179,6 +5189,11 @@ static void svm_deliver_avic_intr(struct kvm_vcpu *vcpu, int vec) · 2932 unmodified lines | ||
| 5179 | 5189 | kvm_vcpu_wake_up(vcpu); |
| 5180 | 5190 | } |
| 5181 | 5191 | |
| 5192 | +static bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu) | |
| 5193 | +{ | |
| 5194 | + return false; | |
| 5195 | +} | |
| 5196 | + | |
| 5182 | 5197 | static void svm_ir_list_del(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi) |
| 5183 | 5198 | { |
| 5184 | 5199 | unsigned long flags; |
| @@ -7113,12 +7128,6 @@ failed: · 1928 unmodified lines | ||
| 7113 | 7128 | return ret; |
| 7114 | 7129 | } |
| 7115 | 7130 | |
| 7116 | −static uint16_t nested_get_evmcs_version(struct kvm_vcpu *vcpu) | |
| 7117 | −{ | |
| 7118 | − /* Not supported */ | |
| 7119 | − return 0; | |
| 7120 | −} | |
| 7121 | − | |
| 7122 | 7131 | static int nested_enable_evmcs(struct kvm_vcpu *vcpu, |
| 7123 | 7132 | uint16_t *vmcs_version) |
| 7124 | 7133 | { |
| @@ -7303,6 +7312,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = { · 178 unmodified lines | ||
| 7303 | 7312 | |
| 7304 | 7313 | .pmu_ops = &amd_pmu_ops, |
| 7305 | 7314 | .deliver_posted_interrupt = svm_deliver_avic_intr, |
| 7315 | + .dy_apicv_has_pending_interrupt = svm_dy_apicv_has_pending_interrupt, | |
| 7306 | 7316 | .update_pi_irte = svm_update_pi_irte, |
| 7307 | 7317 | .setup_mce = svm_setup_mce, |
| 7308 | 7318 | |
| @@ -7316,7 +7326,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = { · 7 unmodified lines | ||
| 7316 | 7326 | .mem_enc_unreg_region = svm_unregister_enc_region, |
| 7317 | 7327 | |
| 7318 | 7328 | .nested_enable_evmcs = nested_enable_evmcs, |
| 7319 | − .nested_get_evmcs_version = nested_get_evmcs_version, | |
| 7329 | + .nested_get_evmcs_version = NULL, | |
| 7320 | 7330 | |
| 7321 | 7331 | .need_emulation_on_page_fault = svm_need_emulation_on_page_fault, |
| 7322 | 7332 | }; |
| @@ -220,6 +220,8 @@ static void free_nested(struct kvm_vcpu *vcpu) · 219 unmodified lines | ||
| 220 | 220 | if (!vmx->nested.vmxon && !vmx->nested.smm.vmxon) |
| 221 | 221 | return; |
| 222 | 222 | |
| 223 | + kvm_clear_request(KVM_REQ_GET_VMCS12_PAGES, vcpu); | |
| 224 | + | |
| 223 | 225 | vmx->nested.vmxon = false; |
| 224 | 226 | vmx->nested.smm.vmxon = false; |
| 225 | 227 | free_vpid(vmx->nested.vpid02); |
| @@ -232,7 +234,9 @@ static void free_nested(struct kvm_vcpu *vcpu) · 6 unmodified lines | ||
| 232 | 234 | vmx->vmcs01.shadow_vmcs = NULL; |
| 233 | 235 | } |
| 234 | 236 | kfree(vmx->nested.cached_vmcs12); |
| 237 | + vmx->nested.cached_vmcs12 = NULL; | |
| 235 | 238 | kfree(vmx->nested.cached_shadow_vmcs12); |
| 239 | + vmx->nested.cached_shadow_vmcs12 = NULL; | |
| 236 | 240 | /* Unpin physical memory we referred to in the vmcs02 */ |
| 237 | 241 | if (vmx->nested.apic_access_page) { |
| 238 | 242 | kvm_release_page_dirty(vmx->nested.apic_access_page); |
| @@ -6117,6 +6117,11 @@ static int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu) · 6116 unmodified lines | ||
| 6117 | 6117 | return max_irr; |
| 6118 | 6118 | } |
| 6119 | 6119 | |
| 6120 | +static bool vmx_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu) | |
| 6121 | +{ | |
| 6122 | + return pi_test_on(vcpu_to_pi_desc(vcpu)); | |
| 6123 | +} | |
| 6124 | + | |
| 6120 | 6125 | static void vmx_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap) |
| 6121 | 6126 | { |
| 6122 | 6127 | if (!kvm_vcpu_apicv_active(vcpu)) |
| @@ -6598,6 +6603,7 @@ static void vmx_free_vcpu(struct kvm_vcpu *vcpu) · 475 unmodified lines | ||
| 6598 | 6603 | free_loaded_vmcs(vmx->loaded_vmcs); |
| 6599 | 6604 | kfree(vmx->guest_msrs); |
| 6600 | 6605 | kvm_vcpu_uninit(vcpu); |
| 6606 | + kmem_cache_free(x86_fpu_cache, vmx->vcpu.arch.user_fpu); | |
| 6601 | 6607 | kmem_cache_free(x86_fpu_cache, vmx->vcpu.arch.guest_fpu); |
| 6602 | 6608 | kmem_cache_free(kvm_vcpu_cache, vmx); |
| 6603 | 6609 | } |
| @@ -6613,12 +6619,20 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, unsigned int id) · 9 unmodified lines | ||
| 6613 | 6619 | if (!vmx) |
| 6614 | 6620 | return ERR_PTR(-ENOMEM); |
| 6615 | 6621 | |
| 6622 | + vmx->vcpu.arch.user_fpu = kmem_cache_zalloc(x86_fpu_cache, | |
| 6623 | + GFP_KERNEL_ACCOUNT); | |
| 6624 | + if (!vmx->vcpu.arch.user_fpu) { | |
| 6625 | + printk(KERN_ERR "kvm: failed to allocate kvm userspace's fpu\n"); | |
| 6626 | + err = -ENOMEM; | |
| 6627 | + goto free_partial_vcpu; | |
| 6628 | + } | |
| 6629 | + | |
| 6616 | 6630 | vmx->vcpu.arch.guest_fpu = kmem_cache_zalloc(x86_fpu_cache, |
| 6617 | 6631 | GFP_KERNEL_ACCOUNT); |
| 6618 | 6632 | if (!vmx->vcpu.arch.guest_fpu) { |
| 6619 | 6633 | printk(KERN_ERR "kvm: failed to allocate vcpu's fpu\n"); |
| 6620 | 6634 | err = -ENOMEM; |
| 6621 | − goto free_partial_vcpu; | |
| 6635 | + goto free_user_fpu; | |
| 6622 | 6636 | } |
| 6623 | 6637 | |
| 6624 | 6638 | vmx->vpid = allocate_vpid(); |
| @@ -6721,6 +6735,8 @@ uninit_vcpu: · 96 unmodified lines | ||
| 6721 | 6735 | free_vcpu: |
| 6722 | 6736 | free_vpid(vmx->vpid); |
| 6723 | 6737 | kmem_cache_free(x86_fpu_cache, vmx->vcpu.arch.guest_fpu); |
| 6738 | +free_user_fpu: | |
| 6739 | + kmem_cache_free(x86_fpu_cache, vmx->vcpu.arch.user_fpu); | |
| 6724 | 6740 | free_partial_vcpu: |
| 6725 | 6741 | kmem_cache_free(kvm_vcpu_cache, vmx); |
| 6726 | 6742 | return ERR_PTR(err); |
| @@ -7715,6 +7731,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = { · 988 unmodified lines | ||
| 7715 | 7731 | .guest_apic_has_interrupt = vmx_guest_apic_has_interrupt, |
| 7716 | 7732 | .sync_pir_to_irr = vmx_sync_pir_to_irr, |
| 7717 | 7733 | .deliver_posted_interrupt = vmx_deliver_posted_interrupt, |
| 7734 | + .dy_apicv_has_pending_interrupt = vmx_dy_apicv_has_pending_interrupt, | |
| 7718 | 7735 | |
| 7719 | 7736 | .set_tss_addr = vmx_set_tss_addr, |
| 7720 | 7737 | .set_identity_map_addr = vmx_set_identity_map_addr, |
| @@ -7780,6 +7797,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = { · 59 unmodified lines | ||
| 7780 | 7797 | .set_nested_state = NULL, |
| 7781 | 7798 | .get_vmcs12_pages = NULL, |
| 7782 | 7799 | .nested_enable_evmcs = NULL, |
| 7800 | + .nested_get_evmcs_version = NULL, | |
| 7783 | 7801 | .need_emulation_on_page_fault = vmx_need_emulation_on_page_fault, |
| 7784 | 7802 | }; |
| 7785 | 7803 | |
| @@ -3306,6 +3306,10 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) · 3305 unmodified lines | ||
| 3306 | 3306 | |
| 3307 | 3307 | kvm_x86_ops->vcpu_load(vcpu, cpu); |
| 3308 | 3308 | |
| 3309 | + fpregs_assert_state_consistent(); | |
| 3310 | + if (test_thread_flag(TIF_NEED_FPU_LOAD)) | |
| 3311 | + switch_fpu_return(); | |
| 3312 | + | |
| 3309 | 3313 | /* Apply any externally detected TSC adjustments (due to suspend) */ |
| 3310 | 3314 | if (unlikely(vcpu->arch.tsc_offset_adjustment)) { |
| 3311 | 3315 | adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment); |
| @@ -6590,12 +6594,13 @@ restart: · 3278 unmodified lines | ||
| 6590 | 6594 | unsigned long rflags = kvm_x86_ops->get_rflags(vcpu); |
| 6591 | 6595 | toggle_interruptibility(vcpu, ctxt->interruptibility); |
| 6592 | 6596 | vcpu->arch.emulate_regs_need_sync_to_vcpu = false; |
| 6593 | − kvm_rip_write(vcpu, ctxt->eip); | |
| 6594 | − if (r == EMULATE_DONE && ctxt->tf) | |
| 6595 | − kvm_vcpu_do_singlestep(vcpu, &r); | |
| 6596 | 6597 | if (!ctxt->have_exception || |
| 6597 | − exception_type(ctxt->exception.vector) == EXCPT_TRAP) | |
| 6598 | + exception_type(ctxt->exception.vector) == EXCPT_TRAP) { | |
| 6599 | + kvm_rip_write(vcpu, ctxt->eip); | |
| 6600 | + if (r == EMULATE_DONE && ctxt->tf) | |
| 6601 | + kvm_vcpu_do_singlestep(vcpu, &r); | |
| 6598 | 6602 | __kvm_set_rflags(vcpu, ctxt->eflags); |
| 6603 | + } | |
| 6599 | 6604 | |
| 6600 | 6605 | /* |
| 6601 | 6606 | * For STI, interrupts are shadowed; so KVM_REQ_EVENT will |
| @@ -7202,7 +7207,7 @@ static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id) · 600 unmodified lines | ||
| 7202 | 7207 | |
| 7203 | 7208 | rcu_read_unlock(); |
| 7204 | 7209 | |
| 7205 | − if (target) | |
| 7210 | + if (target && READ_ONCE(target->ready)) | |
| 7206 | 7211 | kvm_vcpu_yield_to(target); |
| 7207 | 7212 | } |
| 7208 | 7213 | |
| @@ -7242,6 +7247,7 @@ int kvm_emulate_hypercall(struct kvm_vcpu *vcpu) · 33 unmodified lines | ||
| 7242 | 7247 | break; |
| 7243 | 7248 | case KVM_HC_KICK_CPU: |
| 7244 | 7249 | kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1); |
| 7250 | + kvm_sched_yield(vcpu->kvm, a1); | |
| 7245 | 7251 | ret = 0; |
| 7246 | 7252 | break; |
| 7247 | 7253 | #ifdef CONFIG_X86_64 |
| @@ -7990,9 +7996,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 742 unmodified lines | ||
| 7990 | 7996 | trace_kvm_entry(vcpu->vcpu_id); |
| 7991 | 7997 | guest_enter_irqoff(); |
| 7992 | 7998 | |
| 7993 | − fpregs_assert_state_consistent(); | |
| 7994 | − if (test_thread_flag(TIF_NEED_FPU_LOAD)) | |
| 7995 | − switch_fpu_return(); | |
| 7999 | + /* The preempt notifier should have taken care of the FPU already. */ | |
| 8000 | + WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD)); | |
| 7996 | 8001 | |
| 7997 | 8002 | if (unlikely(vcpu->arch.switch_db_regs)) { |
| 7998 | 8003 | set_debugreg(0, 7); |
| @@ -8270,7 +8275,7 @@ static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu) · 271 unmodified lines | ||
| 8270 | 8275 | { |
| 8271 | 8276 | fpregs_lock(); |
| 8272 | 8277 | |
| 8273 | − copy_fpregs_to_fpstate(¤t->thread.fpu); | |
| 8278 | + copy_fpregs_to_fpstate(vcpu->arch.user_fpu); | |
| 8274 | 8279 | /* PKRU is separately restored in kvm_x86_ops->run. */ |
| 8275 | 8280 | __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state, |
| 8276 | 8281 | ~XFEATURE_MASK_PKRU); |
| @@ -8287,7 +8292,7 @@ static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu) · 10 unmodified lines | ||
| 8287 | 8292 | fpregs_lock(); |
| 8288 | 8293 | |
| 8289 | 8294 | copy_fpregs_to_fpstate(vcpu->arch.guest_fpu); |
| 8290 | − copy_kernel_to_fpregs(¤t->thread.fpu.state); | |
| 8295 | + copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state); | |
| 8291 | 8296 | |
| 8292 | 8297 | fpregs_mark_activate(); |
| 8293 | 8298 | fpregs_unlock(); |
| @@ -9694,6 +9699,22 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) · 1400 unmodified lines | ||
| 9694 | 9699 | return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu); |
| 9695 | 9700 | } |
| 9696 | 9701 | |
| 9702 | +bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu) | |
| 9703 | +{ | |
| 9704 | + if (READ_ONCE(vcpu->arch.pv.pv_unhalted)) | |
| 9705 | + return true; | |
| 9706 | + | |
| 9707 | + if (kvm_test_request(KVM_REQ_NMI, vcpu) || | |
| 9708 | + kvm_test_request(KVM_REQ_SMI, vcpu) || | |
| 9709 | + kvm_test_request(KVM_REQ_EVENT, vcpu)) | |
| 9710 | + return true; | |
| 9711 | + | |
| 9712 | + if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu)) | |
| 9713 | + return true; | |
| 9714 | + | |
| 9715 | + return false; | |
| 9716 | +} | |
| 9717 | + | |
| 9697 | 9718 | bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) |
| 9698 | 9719 | { |
| 9699 | 9720 | return vcpu->arch.preempted_in_kernel; |
| @@ -1,6 +1,7 @@ | ||
| 1 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | 2 | #include <linux/types.h> |
| 3 | 3 | #include <linux/export.h> |
| 4 | +#include <asm/cpu.h> | |
| 4 | 5 | |
| 5 | 6 | unsigned int x86_family(unsigned int sig) |
| 6 | 7 | { |
| @@ -178,13 +178,15 @@ void FPU_printall(void) · 177 unmodified lines | ||
| 178 | 178 | for (i = 0; i < 8; i++) { |
| 179 | 179 | FPU_REG *r = &st(i); |
| 180 | 180 | u_char tagi = FPU_gettagi(i); |
| 181 | + | |
| 181 | 182 | switch (tagi) { |
| 182 | 183 | case TAG_Empty: |
| 183 | 184 | continue; |
| 184 | − break; | |
| 185 | 185 | case TAG_Zero: |
| 186 | 186 | case TAG_Special: |
| 187 | + /* Update tagi for the printk below */ | |
| 187 | 188 | tagi = FPU_Special(r); |
| 189 | + /* fall through */ | |
| 188 | 190 | case TAG_Valid: |
| 189 | 191 | printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i, |
| 190 | 192 | getsign(r) ? '-' : '+', |
| @@ -198,7 +200,6 @@ void FPU_printall(void) · 7 unmodified lines | ||
| 198 | 200 | printk("Whoops! Error in errors.c: tag%d is %d ", i, |
| 199 | 201 | tagi); |
| 200 | 202 | continue; |
| 201 | − break; | |
| 202 | 203 | } |
| 203 | 204 | printk("%s\n", tag_desc[(int)(unsigned)tagi]); |
| 204 | 205 | } |
| @@ -1352,7 +1352,7 @@ static void fyl2xp1(FPU_REG *st0_ptr, u_char st0_tag) · 1351 unmodified lines | ||
| 1352 | 1352 | case TW_Denormal: |
| 1353 | 1353 | if (denormal_operand() < 0) |
| 1354 | 1354 | return; |
| 1355 | − | |
| 1355 | + /* fall through */ | |
| 1356 | 1356 | case TAG_Zero: |
| 1357 | 1357 | case TAG_Valid: |
| 1358 | 1358 | setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr)); |
| @@ -177,13 +177,14 @@ static inline pmd_t *vmalloc_sync_one(pgd_t *pgd, unsigned long address) · 176 unmodified lines | ||
| 177 | 177 | |
| 178 | 178 | pmd = pmd_offset(pud, address); |
| 179 | 179 | pmd_k = pmd_offset(pud_k, address); |
| 180 | − if (!pmd_present(*pmd_k)) | |
| 181 | − return NULL; | |
| 182 | 180 | |
| 183 | − if (!pmd_present(*pmd)) | |
| 181 | + if (pmd_present(*pmd) != pmd_present(*pmd_k)) | |
| 184 | 182 | set_pmd(pmd, *pmd_k); |
| 183 | + | |
| 184 | + if (!pmd_present(*pmd_k)) | |
| 185 | + return NULL; | |
| 185 | 186 | else |
| 186 | − BUG_ON(pmd_page(*pmd) != pmd_page(*pmd_k)); | |
| 187 | + BUG_ON(pmd_pfn(*pmd) != pmd_pfn(*pmd_k)); | |
| 187 | 188 | |
| 188 | 189 | return pmd_k; |
| 189 | 190 | } |
| @@ -203,17 +204,13 @@ void vmalloc_sync_all(void) · 13 unmodified lines | ||
| 203 | 204 | spin_lock(&pgd_lock); |
| 204 | 205 | list_for_each_entry(page, &pgd_list, lru) { |
| 205 | 206 | spinlock_t *pgt_lock; |
| 206 | − pmd_t *ret; | |
| 207 | 207 | |
| 208 | 208 | /* the pgt_lock only for Xen */ |
| 209 | 209 | pgt_lock = &pgd_page_get_mm(page)->page_table_lock; |
| 210 | 210 | |
| 211 | 211 | spin_lock(pgt_lock); |
| 212 | − ret = vmalloc_sync_one(page_address(page), address); | |
| 212 | + vmalloc_sync_one(page_address(page), address); | |
| 213 | 213 | spin_unlock(pgt_lock); |
| 214 | − | |
| 215 | − if (!ret) | |
| 216 | − break; | |
| 217 | 214 | } |
| 218 | 215 | spin_unlock(&pgd_lock); |
| 219 | 216 | } |
| @@ -516,7 +516,7 @@ static inline void check_conflict(int warnlvl, pgprot_t prot, pgprotval_t val, · 515 unmodified lines | ||
| 516 | 516 | */ |
| 517 | 517 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long start, |
| 518 | 518 | unsigned long pfn, unsigned long npg, |
| 519 | − int warnlvl) | |
| 519 | + unsigned long lpsize, int warnlvl) | |
| 520 | 520 | { |
| 521 | 521 | pgprotval_t forbidden, res; |
| 522 | 522 | unsigned long end; |
| @@ -535,9 +535,17 @@ static inline pgprot_t static_protections(pgprot_t prot, unsigned long start, · 12 unmodified lines | ||
| 535 | 535 | check_conflict(warnlvl, prot, res, start, end, pfn, "Text NX"); |
| 536 | 536 | forbidden = res; |
| 537 | 537 | |
| 538 | − res = protect_kernel_text_ro(start, end); | |
| 539 | − check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO"); | |
| 540 | − forbidden |= res; | |
| 538 | + /* | |
| 539 | + * Special case to preserve a large page. If the change spawns the | |
| 540 | + * full large page mapping then there is no point to split it | |
| 541 | + * up. Happens with ftrace and is going to be removed once ftrace | |
| 542 | + * switched to text_poke(). | |
| 543 | + */ | |
| 544 | + if (lpsize != (npg * PAGE_SIZE) || (start & (lpsize - 1))) { | |
| 545 | + res = protect_kernel_text_ro(start, end); | |
| 546 | + check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO"); | |
| 547 | + forbidden |= res; | |
| 548 | + } | |
| 541 | 549 | |
| 542 | 550 | /* Check the PFN directly */ |
| 543 | 551 | res = protect_pci_bios(pfn, pfn + npg - 1); |
| @@ -819,7 +827,7 @@ static int __should_split_large_page(pte_t *kpte, unsigned long address, · 275 unmodified lines | ||
| 819 | 827 | * extra conditional required here. |
| 820 | 828 | */ |
| 821 | 829 | chk_prot = static_protections(old_prot, lpaddr, old_pfn, numpages, |
| 822 | − CPA_CONFLICT); | |
| 830 | + psize, CPA_CONFLICT); | |
| 823 | 831 | |
| 824 | 832 | if (WARN_ON_ONCE(pgprot_val(chk_prot) != pgprot_val(old_prot))) { |
| 825 | 833 | /* |
| @@ -855,7 +863,7 @@ static int __should_split_large_page(pte_t *kpte, unsigned long address, · 29 unmodified lines | ||
| 855 | 863 | * protection requirement in the large page. |
| 856 | 864 | */ |
| 857 | 865 | new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages, |
| 858 | − CPA_DETECT); | |
| 866 | + psize, CPA_DETECT); | |
| 859 | 867 | |
| 860 | 868 | /* |
| 861 | 869 | * If there is a conflict, split the large page. |
| @@ -906,7 +914,8 @@ static void split_set_pte(struct cpa_data *cpa, pte_t *pte, unsigned long pfn, · 44 unmodified lines | ||
| 906 | 914 | if (!cpa->force_static_prot) |
| 907 | 915 | goto set; |
| 908 | 916 | |
| 909 | − prot = static_protections(ref_prot, address, pfn, npg, CPA_PROTECT); | |
| 917 | + /* Hand in lpsize = 0 to enforce the protection mechanism */ | |
| 918 | + prot = static_protections(ref_prot, address, pfn, npg, 0, CPA_PROTECT); | |
| 910 | 919 | |
| 911 | 920 | if (pgprot_val(prot) == pgprot_val(ref_prot)) |
| 912 | 921 | goto set; |
| @@ -1503,7 +1512,8 @@ repeat: · 590 unmodified lines | ||
| 1503 | 1512 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
| 1504 | 1513 | |
| 1505 | 1514 | cpa_inc_4k_install(); |
| 1506 | − new_prot = static_protections(new_prot, address, pfn, 1, | |
| 1515 | + /* Hand in lpsize = 0 to enforce the protection mechanism */ | |
| 1516 | + new_prot = static_protections(new_prot, address, pfn, 1, 0, | |
| 1507 | 1517 | CPA_PROTECT); |
| 1508 | 1518 | |
| 1509 | 1519 | new_prot = pgprot_clear_protnone_bits(new_prot); |
| @@ -390,8 +390,9 @@ static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image, · 389 unmodified lines | ||
| 390 | 390 | |
| 391 | 391 | emit_prologue(&prog, bpf_prog->aux->stack_depth, |
| 392 | 392 | bpf_prog_was_classic(bpf_prog)); |
| 393 | + addrs[0] = prog - temp; | |
| 393 | 394 | |
| 394 | − for (i = 0; i < insn_cnt; i++, insn++) { | |
| 395 | + for (i = 1; i <= insn_cnt; i++, insn++) { | |
| 395 | 396 | const s32 imm32 = insn->imm; |
| 396 | 397 | u32 dst_reg = insn->dst_reg; |
| 397 | 398 | u32 src_reg = insn->src_reg; |
| @@ -1105,7 +1106,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) · 707 unmodified lines | ||
| 1105 | 1106 | extra_pass = true; |
| 1106 | 1107 | goto skip_init_addrs; |
| 1107 | 1108 | } |
| 1108 | − addrs = kmalloc_array(prog->len, sizeof(*addrs), GFP_KERNEL); | |
| 1109 | + addrs = kmalloc_array(prog->len + 1, sizeof(*addrs), GFP_KERNEL); | |
| 1109 | 1110 | if (!addrs) { |
| 1110 | 1111 | prog = orig_prog; |
| 1111 | 1112 | goto out_addrs; |
| @@ -1115,7 +1116,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) · 3 unmodified lines | ||
| 1115 | 1116 | * Before first pass, make a rough estimation of addrs[] |
| 1116 | 1117 | * each BPF instruction is translated to less than 64 bytes |
| 1117 | 1118 | */ |
| 1118 | − for (proglen = 0, i = 0; i < prog->len; i++) { | |
| 1119 | + for (proglen = 0, i = 0; i <= prog->len; i++) { | |
| 1119 | 1120 | proglen += 64; |
| 1120 | 1121 | addrs[i] = proglen; |
| 1121 | 1122 | } |
| @@ -1180,7 +1181,7 @@ out_image: · 58 unmodified lines | ||
| 1180 | 1181 | |
| 1181 | 1182 | if (!image || !prog->is_func || extra_pass) { |
| 1182 | 1183 | if (image) |
| 1183 | − bpf_prog_fill_jited_linfo(prog, addrs); | |
| 1184 | + bpf_prog_fill_jited_linfo(prog, addrs + 1); | |
| 1184 | 1185 | out_addrs: |
| 1185 | 1186 | kfree(addrs); |
| 1186 | 1187 | kfree(jit_data); |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <linux/smp.h> |
| 13 | 13 | #include <linux/perf_event.h> |
| 14 | 14 | #include <linux/tboot.h> |
| 15 | +#include <linux/dmi.h> | |
| 15 | 16 | |
| 16 | 17 | #include <asm/pgtable.h> |
| 17 | 18 | #include <asm/proto.h> |
| @@ -23,7 +24,7 @@ · 5 unmodified lines | ||
| 23 | 24 | #include <asm/debugreg.h> |
| 24 | 25 | #include <asm/cpu.h> |
| 25 | 26 | #include <asm/mmu_context.h> |
| 26 | −#include <linux/dmi.h> | |
| 27 | +#include <asm/cpu_device_id.h> | |
| 27 | 28 | |
| 28 | 29 | #ifdef CONFIG_X86_32 |
| 29 | 30 | __visible unsigned long saved_context_ebx; |
| @@ -397,15 +398,14 @@ static int __init bsp_pm_check_init(void) · 367 unmodified lines | ||
| 397 | 398 | |
| 398 | 399 | core_initcall(bsp_pm_check_init); |
| 399 | 400 | |
| 400 | −static int msr_init_context(const u32 *msr_id, const int total_num) | |
| 401 | +static int msr_build_context(const u32 *msr_id, const int num) | |
| 401 | 402 | { |
| 402 | − int i = 0; | |
| 403 | + struct saved_msrs *saved_msrs = &saved_context.saved_msrs; | |
| 403 | 404 | struct saved_msr *msr_array; |
| 405 | + int total_num; | |
| 406 | + int i, j; | |
| 404 | 407 | |
| 405 | − if (saved_context.saved_msrs.array || saved_context.saved_msrs.num > 0) { | |
| 406 | − pr_err("x86/pm: MSR quirk already applied, please check your DMI match table.\n"); | |
| 407 | − return -EINVAL; | |
| 408 | − } | |
| 408 | + total_num = saved_msrs->num + num; | |
| 409 | 409 | |
| 410 | 410 | msr_array = kmalloc_array(total_num, sizeof(struct saved_msr), GFP_KERNEL); |
| 411 | 411 | if (!msr_array) { |
| @@ -413,19 +413,30 @@ static int msr_init_context(const u32 *msr_id, const int total_num) · 1 unmodified line | ||
| 413 | 413 | return -ENOMEM; |
| 414 | 414 | } |
| 415 | 415 | |
| 416 | − for (i = 0; i < total_num; i++) { | |
| 417 | − msr_array[i].info.msr_no = msr_id[i]; | |
| 416 | + if (saved_msrs->array) { | |
| 417 | + /* | |
| 418 | + * Multiple callbacks can invoke this function, so copy any | |
| 419 | + * MSR save requests from previous invocations. | |
| 420 | + */ | |
| 421 | + memcpy(msr_array, saved_msrs->array, | |
| 422 | + sizeof(struct saved_msr) * saved_msrs->num); | |
| 423 | + | |
| 424 | + kfree(saved_msrs->array); | |
| 425 | + } | |
| 426 | + | |
| 427 | + for (i = saved_msrs->num, j = 0; i < total_num; i++, j++) { | |
| 428 | + msr_array[i].info.msr_no = msr_id[j]; | |
| 418 | 429 | msr_array[i].valid = false; |
| 419 | 430 | msr_array[i].info.reg.q = 0; |
| 420 | 431 | } |
| 421 | − saved_context.saved_msrs.num = total_num; | |
| 422 | − saved_context.saved_msrs.array = msr_array; | |
| 432 | + saved_msrs->num = total_num; | |
| 433 | + saved_msrs->array = msr_array; | |
| 423 | 434 | |
| 424 | 435 | return 0; |
| 425 | 436 | } |
| 426 | 437 | |
| 427 | 438 | /* |
| 428 | − * The following section is a quirk framework for problematic BIOSen: | |
| 439 | + * The following sections are a quirk framework for problematic BIOSen: | |
| 429 | 440 | * Sometimes MSRs are modified by the BIOSen after suspended to |
| 430 | 441 | * RAM, this might cause unexpected behavior after wakeup. |
| 431 | 442 | * Thus we save/restore these specified MSRs across suspend/resume |
| @@ -440,7 +451,7 @@ static int msr_initialize_bdw(const struct dmi_system_id *d) · 8 unmodified lines | ||
| 440 | 451 | u32 bdw_msr_id[] = { MSR_IA32_THERM_CONTROL }; |
| 441 | 452 | |
| 442 | 453 | pr_info("x86/pm: %s detected, MSR saving is needed during suspending.\n", d->ident); |
| 443 | − return msr_init_context(bdw_msr_id, ARRAY_SIZE(bdw_msr_id)); | |
| 454 | + return msr_build_context(bdw_msr_id, ARRAY_SIZE(bdw_msr_id)); | |
| 444 | 455 | } |
| 445 | 456 | |
| 446 | 457 | static const struct dmi_system_id msr_save_dmi_table[] = { |
| @@ -455,9 +466,58 @@ static const struct dmi_system_id msr_save_dmi_table[] = { · 8 unmodified lines | ||
| 455 | 466 | {} |
| 456 | 467 | }; |
| 457 | 468 | |
| 469 | +static int msr_save_cpuid_features(const struct x86_cpu_id *c) | |
| 470 | +{ | |
| 471 | + u32 cpuid_msr_id[] = { | |
| 472 | + MSR_AMD64_CPUID_FN_1, | |
| 473 | + }; | |
| 474 | + | |
| 475 | + pr_info("x86/pm: family %#hx cpu detected, MSR saving is needed during suspending.\n", | |
| 476 | + c->family); | |
| 477 | + | |
| 478 | + return msr_build_context(cpuid_msr_id, ARRAY_SIZE(cpuid_msr_id)); | |
| 479 | +} | |
| 480 | + | |
| 481 | +static const struct x86_cpu_id msr_save_cpu_table[] = { | |
| 482 | + { | |
| 483 | + .vendor = X86_VENDOR_AMD, | |
| 484 | + .family = 0x15, | |
| 485 | + .model = X86_MODEL_ANY, | |
| 486 | + .feature = X86_FEATURE_ANY, | |
| 487 | + .driver_data = (kernel_ulong_t)msr_save_cpuid_features, | |
| 488 | + }, | |
| 489 | + { | |
| 490 | + .vendor = X86_VENDOR_AMD, | |
| 491 | + .family = 0x16, | |
| 492 | + .model = X86_MODEL_ANY, | |
| 493 | + .feature = X86_FEATURE_ANY, | |
| 494 | + .driver_data = (kernel_ulong_t)msr_save_cpuid_features, | |
| 495 | + }, | |
| 496 | + {} | |
| 497 | +}; | |
| 498 | + | |
| 499 | +typedef int (*pm_cpu_match_t)(const struct x86_cpu_id *); | |
| 500 | +static int pm_cpu_check(const struct x86_cpu_id *c) | |
| 501 | +{ | |
| 502 | + const struct x86_cpu_id *m; | |
| 503 | + int ret = 0; | |
| 504 | + | |
| 505 | + m = x86_match_cpu(msr_save_cpu_table); | |
| 506 | + if (m) { | |
| 507 | + pm_cpu_match_t fn; | |
| 508 | + | |
| 509 | + fn = (pm_cpu_match_t)m->driver_data; | |
| 510 | + ret = fn(m); | |
| 511 | + } | |
| 512 | + | |
| 513 | + return ret; | |
| 514 | +} | |
| 515 | + | |
| 458 | 516 | static int pm_check_save_msr(void) |
| 459 | 517 | { |
| 460 | 518 | dmi_check_system(msr_save_dmi_table); |
| 519 | + pm_cpu_check(msr_save_cpu_table); | |
| 520 | + | |
| 461 | 521 | return 0; |
| 462 | 522 | } |
| 463 | 523 | |
| @@ -6,6 +6,9 @@ purgatory-y := purgatory.o stack.o setup-x86_$(BITS).o sha256.o entry64.o string · 5 unmodified lines | ||
| 6 | 6 | targets += $(purgatory-y) |
| 7 | 7 | PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y)) |
| 8 | 8 | |
| 9 | +$(obj)/string.o: $(srctree)/arch/x86/boot/compressed/string.c FORCE | |
| 10 | + $(call if_changed_rule,cc_o_c) | |
| 11 | + | |
| 9 | 12 | $(obj)/sha256.o: $(srctree)/lib/sha256.c FORCE |
| 10 | 13 | $(call if_changed_rule,cc_o_c) |
| 11 | 14 | |
| @@ -17,11 +20,34 @@ KCOV_INSTRUMENT := n · 5 unmodified lines | ||
| 17 | 20 | |
| 18 | 21 | # Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That |
| 19 | 22 | # in turn leaves some undefined symbols like __fentry__ in purgatory and not |
| 20 | −# sure how to relocate those. Like kexec-tools, use custom flags. | |
| 21 | − | |
| 22 | −KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -Os -mcmodel=large | |
| 23 | −KBUILD_CFLAGS += -m$(BITS) | |
| 24 | −KBUILD_CFLAGS += $(call cc-option,-fno-PIE) | |
| 23 | +# sure how to relocate those. | |
| 24 | +ifdef CONFIG_FUNCTION_TRACER | |
| 25 | +CFLAGS_REMOVE_sha256.o += $(CC_FLAGS_FTRACE) | |
| 26 | +CFLAGS_REMOVE_purgatory.o += $(CC_FLAGS_FTRACE) | |
| 27 | +CFLAGS_REMOVE_string.o += $(CC_FLAGS_FTRACE) | |
| 28 | +CFLAGS_REMOVE_kexec-purgatory.o += $(CC_FLAGS_FTRACE) | |
| 29 | +endif | |
| 30 | + | |
| 31 | +ifdef CONFIG_STACKPROTECTOR | |
| 32 | +CFLAGS_REMOVE_sha256.o += -fstack-protector | |
| 33 | +CFLAGS_REMOVE_purgatory.o += -fstack-protector | |
| 34 | +CFLAGS_REMOVE_string.o += -fstack-protector | |
| 35 | +CFLAGS_REMOVE_kexec-purgatory.o += -fstack-protector | |
| 36 | +endif | |
| 37 | + | |
| 38 | +ifdef CONFIG_STACKPROTECTOR_STRONG | |
| 39 | +CFLAGS_REMOVE_sha256.o += -fstack-protector-strong | |
| 40 | +CFLAGS_REMOVE_purgatory.o += -fstack-protector-strong | |
| 41 | +CFLAGS_REMOVE_string.o += -fstack-protector-strong | |
| 42 | +CFLAGS_REMOVE_kexec-purgatory.o += -fstack-protector-strong | |
| 43 | +endif | |
| 44 | + | |
| 45 | +ifdef CONFIG_RETPOLINE | |
| 46 | +CFLAGS_REMOVE_sha256.o += $(RETPOLINE_CFLAGS) | |
| 47 | +CFLAGS_REMOVE_purgatory.o += $(RETPOLINE_CFLAGS) | |
| 48 | +CFLAGS_REMOVE_string.o += $(RETPOLINE_CFLAGS) | |
| 49 | +CFLAGS_REMOVE_kexec-purgatory.o += $(RETPOLINE_CFLAGS) | |
| 50 | +endif | |
| 25 | 51 | |
| 26 | 52 | $(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE |
| 27 | 53 | $(call if_changed,ld) |
| @@ -68,3 +68,9 @@ void purgatory(void) · 67 unmodified lines | ||
| 68 | 68 | } |
| 69 | 69 | copy_backup_region(); |
| 70 | 70 | } |
| 71 | + | |
| 72 | +/* | |
| 73 | + * Defined in order to reuse memcpy() and memset() from | |
| 74 | + * arch/x86/boot/compressed/string.c | |
| 75 | + */ | |
| 76 | +void warn(const char *msg) {} | |
| @@ -1,23 +0,0 @@ | ||
| 1 | −// SPDX-License-Identifier: GPL-2.0-only | |
| 2 | −/* | |
| 3 | − * Simple string functions. | |
| 4 | − * | |
| 5 | − * Copyright (C) 2014 Red Hat Inc. | |
| 6 | − * | |
| 7 | − * Author: | |
| 8 | − * Vivek Goyal <vgoyal@redhat.com> | |
| 9 | − */ | |
| 10 | − | |
| 11 | −#include <linux/types.h> | |
| 12 | − | |
| 13 | −#include "../boot/string.c" | |
| 14 | − | |
| 15 | −void *memcpy(void *dst, const void *src, size_t len) | |
| 16 | −{ | |
| 17 | − return __builtin_memcpy(dst, src, len); | |
| 18 | −} | |
| 19 | − | |
| 20 | −void *memset(void *dst, int c, size_t len) | |
| 21 | −{ | |
| 22 | − return __builtin_memset(dst, c, len); | |
| 23 | −} | |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | #include <linux/linkage.h> |
| 16 | 16 | #include <asm/asm-offsets.h> |
| 17 | +#include <asm/asmmacro.h> | |
| 17 | 18 | #include <asm/processor.h> |
| 18 | 19 | #include <asm/coprocessor.h> |
| 19 | 20 | #include <asm/thread_info.h> |
| @@ -511,6 +511,7 @@ void cpu_reset(void) · 510 unmodified lines | ||
| 511 | 511 | "add %2, %2, %7\n\t" |
| 512 | 512 | "addi %0, %0, -1\n\t" |
| 513 | 513 | "bnez %0, 1b\n\t" |
| 514 | + "isync\n\t" | |
| 514 | 515 | /* Jump to identity mapping */ |
| 515 | 516 | "jx %3\n" |
| 516 | 517 | "2:\n\t" |
| @@ -1924,12 +1924,13 @@ static void bfq_add_request(struct request *rq) · 1923 unmodified lines | ||
| 1924 | 1924 | * confirmed no later than during the next |
| 1925 | 1925 | * I/O-plugging interval for bfqq. |
| 1926 | 1926 | */ |
| 1927 | − if (!bfq_bfqq_has_short_ttime(bfqq) && | |
| 1927 | + if (bfqd->last_completed_rq_bfqq && | |
| 1928 | + !bfq_bfqq_has_short_ttime(bfqq) && | |
| 1928 | 1929 | ktime_get_ns() - bfqd->last_completion < |
| 1929 | 1930 | 200 * NSEC_PER_USEC) { |
| 1930 | 1931 | if (bfqd->last_completed_rq_bfqq != bfqq && |
| 1931 | − bfqd->last_completed_rq_bfqq != | |
| 1932 | − bfqq->waker_bfqq) { | |
| 1932 | + bfqd->last_completed_rq_bfqq != | |
| 1933 | + bfqq->waker_bfqq) { | |
| 1933 | 1934 | /* |
| 1934 | 1935 | * First synchronization detected with |
| 1935 | 1936 | * a candidate waker queue, or with a |
| @@ -2250,9 +2251,14 @@ static void bfq_request_merged(struct request_queue *q, struct request *req, · 314 unmodified lines | ||
| 2250 | 2251 | blk_rq_pos(container_of(rb_prev(&req->rb_node), |
| 2251 | 2252 | struct request, rb_node))) { |
| 2252 | 2253 | struct bfq_queue *bfqq = bfq_init_rq(req); |
| 2253 | − struct bfq_data *bfqd = bfqq->bfqd; | |
| 2254 | + struct bfq_data *bfqd; | |
| 2254 | 2255 | struct request *prev, *next_rq; |
| 2255 | 2256 | |
| 2257 | + if (!bfqq) | |
| 2258 | + return; | |
| 2259 | + | |
| 2260 | + bfqd = bfqq->bfqd; | |
| 2261 | + | |
| 2256 | 2262 | /* Reposition request in its sort_list */ |
| 2257 | 2263 | elv_rb_del(&bfqq->sort_list, req); |
| 2258 | 2264 | elv_rb_add(&bfqq->sort_list, req); |
| @@ -2299,6 +2305,9 @@ static void bfq_requests_merged(struct request_queue *q, struct request *rq, · 40 unmodified lines | ||
| 2299 | 2305 | struct bfq_queue *bfqq = bfq_init_rq(rq), |
| 2300 | 2306 | *next_bfqq = bfq_init_rq(next); |
| 2301 | 2307 | |
| 2308 | + if (!bfqq) | |
| 2309 | + return; | |
| 2310 | + | |
| 2302 | 2311 | /* |
| 2303 | 2312 | * If next and rq belong to the same bfq_queue and next is older |
| 2304 | 2313 | * than rq, then reposition rq in the fifo (by substituting next |
| @@ -3354,38 +3363,57 @@ static void bfq_dispatch_remove(struct request_queue *q, struct request *rq) · 1049 unmodified lines | ||
| 3354 | 3363 | * there is no active group, then the primary expectation for |
| 3355 | 3364 | * this device is probably a high throughput. |
| 3356 | 3365 | * |
| 3357 | − * We are now left only with explaining the additional | |
| 3358 | − * compound condition that is checked below for deciding | |
| 3359 | − * whether the scenario is asymmetric. To explain this | |
| 3360 | − * compound condition, we need to add that the function | |
| 3366 | + * We are now left only with explaining the two sub-conditions in the | |
| 3367 | + * additional compound condition that is checked below for deciding | |
| 3368 | + * whether the scenario is asymmetric. To explain the first | |
| 3369 | + * sub-condition, we need to add that the function | |
| 3361 | 3370 | * bfq_asymmetric_scenario checks the weights of only |
| 3362 | − * non-weight-raised queues, for efficiency reasons (see | |
| 3363 | − * comments on bfq_weights_tree_add()). Then the fact that | |
| 3364 | − * bfqq is weight-raised is checked explicitly here. More | |
| 3365 | − * precisely, the compound condition below takes into account | |
| 3366 | − * also the fact that, even if bfqq is being weight-raised, | |
| 3367 | − * the scenario is still symmetric if all queues with requests | |
| 3368 | − * waiting for completion happen to be | |
| 3369 | − * weight-raised. Actually, we should be even more precise | |
| 3370 | − * here, and differentiate between interactive weight raising | |
| 3371 | − * and soft real-time weight raising. | |
| 3371 | + * non-weight-raised queues, for efficiency reasons (see comments on | |
| 3372 | + * bfq_weights_tree_add()). Then the fact that bfqq is weight-raised | |
| 3373 | + * is checked explicitly here. More precisely, the compound condition | |
| 3374 | + * below takes into account also the fact that, even if bfqq is being | |
| 3375 | + * weight-raised, the scenario is still symmetric if all queues with | |
| 3376 | + * requests waiting for completion happen to be | |
| 3377 | + * weight-raised. Actually, we should be even more precise here, and | |
| 3378 | + * differentiate between interactive weight raising and soft real-time | |
| 3379 | + * weight raising. | |
| 3380 | + * | |
| 3381 | + * The second sub-condition checked in the compound condition is | |
| 3382 | + * whether there is a fair amount of already in-flight I/O not | |
| 3383 | + * belonging to bfqq. If so, I/O dispatching is to be plugged, for the | |
| 3384 | + * following reason. The drive may decide to serve in-flight | |
| 3385 | + * non-bfqq's I/O requests before bfqq's ones, thereby delaying the | |
| 3386 | + * arrival of new I/O requests for bfqq (recall that bfqq is sync). If | |
| 3387 | + * I/O-dispatching is not plugged, then, while bfqq remains empty, a | |
| 3388 | + * basically uncontrolled amount of I/O from other queues may be | |
| 3389 | + * dispatched too, possibly causing the service of bfqq's I/O to be | |
| 3390 | + * delayed even longer in the drive. This problem gets more and more | |
| 3391 | + * serious as the speed and the queue depth of the drive grow, | |
| 3392 | + * because, as these two quantities grow, the probability to find no | |
| 3393 | + * queue busy but many requests in flight grows too. By contrast, | |
| 3394 | + * plugging I/O dispatching minimizes the delay induced by already | |
| 3395 | + * in-flight I/O, and enables bfqq to recover the bandwidth it may | |
| 3396 | + * lose because of this delay. | |
| 3372 | 3397 | * |
| 3373 | 3398 | * As a side note, it is worth considering that the above |
| 3374 | − * device-idling countermeasures may however fail in the | |
| 3375 | − * following unlucky scenario: if idling is (correctly) | |
| 3376 | − * disabled in a time period during which all symmetry | |
| 3377 | − * sub-conditions hold, and hence the device is allowed to | |
| 3378 | − * enqueue many requests, but at some later point in time some | |
| 3379 | − * sub-condition stops to hold, then it may become impossible | |
| 3380 | − * to let requests be served in the desired order until all | |
| 3381 | − * the requests already queued in the device have been served. | |
| 3399 | + * device-idling countermeasures may however fail in the following | |
| 3400 | + * unlucky scenario: if I/O-dispatch plugging is (correctly) disabled | |
| 3401 | + * in a time period during which all symmetry sub-conditions hold, and | |
| 3402 | + * therefore the device is allowed to enqueue many requests, but at | |
| 3403 | + * some later point in time some sub-condition stops to hold, then it | |
| 3404 | + * may become impossible to make requests be served in the desired | |
| 3405 | + * order until all the requests already queued in the device have been | |
| 3406 | + * served. The last sub-condition commented above somewhat mitigates | |
| 3407 | + * this problem for weight-raised queues. | |
| 3382 | 3408 | */ |
| 3383 | 3409 | static bool idling_needed_for_service_guarantees(struct bfq_data *bfqd, |
| 3384 | 3410 | struct bfq_queue *bfqq) |
| 3385 | 3411 | { |
| 3386 | 3412 | return (bfqq->wr_coeff > 1 && |
| 3387 | − bfqd->wr_busy_queues < | |
| 3388 | − bfq_tot_busy_queues(bfqd)) || | |
| 3413 | + (bfqd->wr_busy_queues < | |
| 3414 | + bfq_tot_busy_queues(bfqd) || | |
| 3415 | + bfqd->rq_in_driver >= | |
| 3416 | + bfqq->dispatched + 4)) || | |
| 3389 | 3417 | bfq_asymmetric_scenario(bfqd, bfqq); |
| 3390 | 3418 | } |
| 3391 | 3419 | |
| @@ -4745,6 +4773,8 @@ static struct request *bfq_dispatch_request(struct blk_mq_hw_ctx *hctx) · 1353 unmodified lines | ||
| 4745 | 4773 | */ |
| 4746 | 4774 | void bfq_put_queue(struct bfq_queue *bfqq) |
| 4747 | 4775 | { |
| 4776 | + struct bfq_queue *item; | |
| 4777 | + struct hlist_node *n; | |
| 4748 | 4778 | #ifdef CONFIG_BFQ_GROUP_IOSCHED |
| 4749 | 4779 | struct bfq_group *bfqg = bfqq_group(bfqq); |
| 4750 | 4780 | #endif |
| @@ -4789,6 +4819,36 @@ void bfq_put_queue(struct bfq_queue *bfqq) · 38 unmodified lines | ||
| 4789 | 4819 | bfqq->bfqd->burst_size--; |
| 4790 | 4820 | } |
| 4791 | 4821 | |
| 4822 | + /* | |
| 4823 | + * bfqq does not exist any longer, so it cannot be woken by | |
| 4824 | + * any other queue, and cannot wake any other queue. Then bfqq | |
| 4825 | + * must be removed from the woken list of its possible waker | |
| 4826 | + * queue, and all queues in the woken list of bfqq must stop | |
| 4827 | + * having a waker queue. Strictly speaking, these updates | |
| 4828 | + * should be performed when bfqq remains with no I/O source | |
| 4829 | + * attached to it, which happens before bfqq gets freed. In | |
| 4830 | + * particular, this happens when the last process associated | |
| 4831 | + * with bfqq exits or gets associated with a different | |
| 4832 | + * queue. However, both events lead to bfqq being freed soon, | |
| 4833 | + * and dangling references would come out only after bfqq gets | |
| 4834 | + * freed. So these updates are done here, as a simple and safe | |
| 4835 | + * way to handle all cases. | |
| 4836 | + */ | |
| 4837 | + /* remove bfqq from woken list */ | |
| 4838 | + if (!hlist_unhashed(&bfqq->woken_list_node)) | |
| 4839 | + hlist_del_init(&bfqq->woken_list_node); | |
| 4840 | + | |
| 4841 | + /* reset waker for all queues in woken list */ | |
| 4842 | + hlist_for_each_entry_safe(item, n, &bfqq->woken_list, | |
| 4843 | + woken_list_node) { | |
| 4844 | + item->waker_bfqq = NULL; | |
| 4845 | + bfq_clear_bfqq_has_waker(item); | |
| 4846 | + hlist_del_init(&item->woken_list_node); | |
| 4847 | + } | |
| 4848 | + | |
| 4849 | + if (bfqq->bfqd && bfqq->bfqd->last_completed_rq_bfqq == bfqq) | |
| 4850 | + bfqq->bfqd->last_completed_rq_bfqq = NULL; | |
| 4851 | + | |
| 4792 | 4852 | kmem_cache_free(bfq_pool, bfqq); |
| 4793 | 4853 | #ifdef CONFIG_BFQ_GROUP_IOSCHED |
| 4794 | 4854 | bfqg_and_blkg_put(bfqg); |
| @@ -4816,9 +4876,6 @@ static void bfq_put_cooperator(struct bfq_queue *bfqq) · 21 unmodified lines | ||
| 4816 | 4876 | |
| 4817 | 4877 | static void bfq_exit_bfqq(struct bfq_data *bfqd, struct bfq_queue *bfqq) |
| 4818 | 4878 | { |
| 4819 | − struct bfq_queue *item; | |
| 4820 | − struct hlist_node *n; | |
| 4821 | − | |
| 4822 | 4879 | if (bfqq == bfqd->in_service_queue) { |
| 4823 | 4880 | __bfq_bfqq_expire(bfqd, bfqq, BFQQE_BUDGET_TIMEOUT); |
| 4824 | 4881 | bfq_schedule_dispatch(bfqd); |
| @@ -4828,18 +4885,6 @@ static void bfq_exit_bfqq(struct bfq_data *bfqd, struct bfq_queue *bfqq) · 3 unmodified lines | ||
| 4828 | 4885 | |
| 4829 | 4886 | bfq_put_cooperator(bfqq); |
| 4830 | 4887 | |
| 4831 | − /* remove bfqq from woken list */ | |
| 4832 | − if (!hlist_unhashed(&bfqq->woken_list_node)) | |
| 4833 | − hlist_del_init(&bfqq->woken_list_node); | |
| 4834 | − | |
| 4835 | − /* reset waker for all queues in woken list */ | |
| 4836 | − hlist_for_each_entry_safe(item, n, &bfqq->woken_list, | |
| 4837 | − woken_list_node) { | |
| 4838 | − item->waker_bfqq = NULL; | |
| 4839 | − bfq_clear_bfqq_has_waker(item); | |
| 4840 | − hlist_del_init(&item->woken_list_node); | |
| 4841 | − } | |
| 4842 | − | |
| 4843 | 4888 | bfq_put_queue(bfqq); /* release process reference */ |
| 4844 | 4889 | } |
| 4845 | 4890 | |
| @@ -5417,12 +5462,12 @@ static void bfq_insert_request(struct blk_mq_hw_ctx *hctx, struct request *rq, · 571 unmodified lines | ||
| 5417 | 5462 | |
| 5418 | 5463 | spin_lock_irq(&bfqd->lock); |
| 5419 | 5464 | bfqq = bfq_init_rq(rq); |
| 5420 | − if (at_head || blk_rq_is_passthrough(rq)) { | |
| 5465 | + if (!bfqq || at_head || blk_rq_is_passthrough(rq)) { | |
| 5421 | 5466 | if (at_head) |
| 5422 | 5467 | list_add(&rq->queuelist, &bfqd->dispatch); |
| 5423 | 5468 | else |
| 5424 | 5469 | list_add_tail(&rq->queuelist, &bfqd->dispatch); |
| 5425 | − } else { /* bfqq is assumed to be non null here */ | |
| 5470 | + } else { | |
| 5426 | 5471 | idle_timer_disabled = __bfq_insert_request(bfqd, rq); |
| 5427 | 5472 | /* |
| 5428 | 5473 | * Update bfqq, because, if a queue merge has occurred |
| @@ -54,7 +54,7 @@ static struct blkcg_policy *blkcg_policy[BLKCG_MAX_POLS]; · 53 unmodified lines | ||
| 54 | 54 | |
| 55 | 55 | static LIST_HEAD(all_blkcgs); /* protected by blkcg_pol_mutex */ |
| 56 | 56 | |
| 57 | −static bool blkcg_debug_stats = false; | |
| 57 | +bool blkcg_debug_stats = false; | |
| 58 | 58 | static struct workqueue_struct *blkcg_punt_bio_wq; |
| 59 | 59 | |
| 60 | 60 | static bool blkcg_policy_enabled(struct request_queue *q, |
| @@ -944,10 +944,7 @@ static int blkcg_print_stat(struct seq_file *sf, void *v) · 883 unmodified lines | ||
| 944 | 944 | dbytes, dios); |
| 945 | 945 | } |
| 946 | 946 | |
| 947 | − if (!blkcg_debug_stats) | |
| 948 | − goto next; | |
| 949 | − | |
| 950 | − if (atomic_read(&blkg->use_delay)) { | |
| 947 | + if (blkcg_debug_stats && atomic_read(&blkg->use_delay)) { | |
| 951 | 948 | has_stats = true; |
| 952 | 949 | off += scnprintf(buf+off, size-off, |
| 953 | 950 | " use_delay=%d delay_nsec=%llu", |
| @@ -967,7 +964,7 @@ static int blkcg_print_stat(struct seq_file *sf, void *v) · 13 unmodified lines | ||
| 967 | 964 | has_stats = true; |
| 968 | 965 | off += written; |
| 969 | 966 | } |
| 970 | −next: | |
| 967 | + | |
| 971 | 968 | if (has_stats) { |
| 972 | 969 | if (off < size - 1) { |
| 973 | 970 | off += scnprintf(buf+off, size-off, "\n"); |
| @@ -917,6 +917,9 @@ static size_t iolatency_pd_stat(struct blkg_policy_data *pd, char *buf, · 916 unmodified lines | ||
| 917 | 917 | unsigned long long avg_lat; |
| 918 | 918 | unsigned long long cur_win; |
| 919 | 919 | |
| 920 | + if (!blkcg_debug_stats) | |
| 921 | + return 0; | |
| 922 | + | |
| 920 | 923 | if (iolat->ssd) |
| 921 | 924 | return iolatency_ssd_stat(iolat, buf, size); |
| 922 | 925 | |
| @@ -61,15 +61,6 @@ static inline void blk_mq_sched_completed_request(struct request *rq, u64 now) · 60 unmodified lines | ||
| 61 | 61 | e->type->ops.completed_request(rq, now); |
| 62 | 62 | } |
| 63 | 63 | |
| 64 | −static inline void blk_mq_sched_started_request(struct request *rq) | |
| 65 | −{ | |
| 66 | − struct request_queue *q = rq->q; | |
| 67 | − struct elevator_queue *e = q->elevator; | |
| 68 | − | |
| 69 | − if (e && e->type->ops.started_request) | |
| 70 | − e->type->ops.started_request(rq); | |
| 71 | −} | |
| 72 | − | |
| 73 | 64 | static inline void blk_mq_sched_requeue_request(struct request *rq) |
| 74 | 65 | { |
| 75 | 66 | struct request_queue *q = rq->q; |
| @@ -669,8 +669,6 @@ void blk_mq_start_request(struct request *rq) · 668 unmodified lines | ||
| 669 | 669 | { |
| 670 | 670 | struct request_queue *q = rq->q; |
| 671 | 671 | |
| 672 | − blk_mq_sched_started_request(rq); | |
| 673 | − | |
| 674 | 672 | trace_block_rq_issue(q, rq); |
| 675 | 673 | |
| 676 | 674 | if (test_bit(QUEUE_FLAG_STATS, &q->queue_flags)) { |
| @@ -2664,8 +2662,6 @@ void blk_mq_release(struct request_queue *q) · 1987 unmodified lines | ||
| 2664 | 2662 | struct blk_mq_hw_ctx *hctx, *next; |
| 2665 | 2663 | int i; |
| 2666 | 2664 | |
| 2667 | − cancel_delayed_work_sync(&q->requeue_work); | |
| 2668 | − | |
| 2669 | 2665 | queue_for_each_hw_ctx(q, hctx, i) |
| 2670 | 2666 | WARN_ON_ONCE(hctx && list_empty(&hctx->hctx_list)); |
| 2671 | 2667 | |
| @@ -202,6 +202,7 @@ static int rq_qos_wake_function(struct wait_queue_entry *curr, · 201 unmodified lines | ||
| 202 | 202 | return -1; |
| 203 | 203 | |
| 204 | 204 | data->got_token = true; |
| 205 | + smp_wmb(); | |
| 205 | 206 | list_del_init(&curr->entry); |
| 206 | 207 | wake_up_process(data->task); |
| 207 | 208 | return 1; |
| @@ -244,7 +245,9 @@ void rq_qos_wait(struct rq_wait *rqw, void *private_data, · 36 unmodified lines | ||
| 244 | 245 | return; |
| 245 | 246 | |
| 246 | 247 | prepare_to_wait_exclusive(&rqw->wait, &data.wq, TASK_UNINTERRUPTIBLE); |
| 248 | + has_sleeper = !wq_has_single_sleeper(&rqw->wait); | |
| 247 | 249 | do { |
| 250 | + /* The memory barrier in set_task_state saves us here. */ | |
| 248 | 251 | if (data.got_token) |
| 249 | 252 | break; |
| 250 | 253 | if (!has_sleeper && acquire_inflight_cb(rqw, private_data)) { |
| @@ -255,12 +258,14 @@ void rq_qos_wait(struct rq_wait *rqw, void *private_data, · 4 unmodified lines | ||
| 255 | 258 | * which means we now have two. Put our local token |
| 256 | 259 | * and wake anyone else potentially waiting for one. |
| 257 | 260 | */ |
| 261 | + smp_rmb(); | |
| 258 | 262 | if (data.got_token) |
| 259 | 263 | cleanup_cb(rqw, private_data); |
| 260 | 264 | break; |
| 261 | 265 | } |
| 262 | 266 | io_schedule(); |
| 263 | − has_sleeper = false; | |
| 267 | + has_sleeper = true; | |
| 268 | + set_current_state(TASK_UNINTERRUPTIBLE); | |
| 264 | 269 | } while (1); |
| 265 | 270 | finish_wait(&rqw->wait, &data.wq); |
| 266 | 271 | } |
| @@ -752,7 +752,8 @@ void blk_queue_virt_boundary(struct request_queue *q, unsigned long mask) · 751 unmodified lines | ||
| 752 | 752 | * page (which might not be idential to the Linux PAGE_SIZE). Because |
| 753 | 753 | * of that they are not limited by our notion of "segment size". |
| 754 | 754 | */ |
| 755 | − q->limits.max_segment_size = UINT_MAX; | |
| 755 | + if (mask) | |
| 756 | + q->limits.max_segment_size = UINT_MAX; | |
| 756 | 757 | } |
| 757 | 758 | EXPORT_SYMBOL(blk_queue_virt_boundary); |
| 758 | 759 | |
| @@ -892,6 +892,9 @@ static void __blk_release_queue(struct work_struct *work) · 891 unmodified lines | ||
| 892 | 892 | |
| 893 | 893 | blk_free_queue_stats(q->stats); |
| 894 | 894 | |
| 895 | + if (queue_is_mq(q)) | |
| 896 | + cancel_delayed_work_sync(&q->requeue_work); | |
| 897 | + | |
| 895 | 898 | blk_exit_queue(q); |
| 896 | 899 | |
| 897 | 900 | blk_queue_free_zone_bitmaps(q); |
| @@ -1969,7 +1969,7 @@ static const struct attribute *disk_events_attrs[] = { · 1968 unmodified lines | ||
| 1969 | 1969 | * The default polling interval can be specified by the kernel |
| 1970 | 1970 | * parameter block.events_dfl_poll_msecs which defaults to 0 |
| 1971 | 1971 | * (disable). This can also be modified runtime by writing to |
| 1972 | − * /sys/module/block/events_dfl_poll_msecs. | |
| 1972 | + * /sys/module/block/parameters/events_dfl_poll_msecs. | |
| 1973 | 1973 | */ |
| 1974 | 1974 | static int disk_events_set_dfl_poll_msecs(const char *val, |
| 1975 | 1975 | const struct kernel_param *kp) |
| @@ -611,8 +611,8 @@ static int iort_dev_find_its_id(struct device *dev, u32 req_id, · 610 unmodified lines | ||
| 611 | 611 | |
| 612 | 612 | /* Move to ITS specific data */ |
| 613 | 613 | its = (struct acpi_iort_its_group *)node->node_data; |
| 614 | − if (idx > its->its_count) { | |
| 615 | − dev_err(dev, "requested ITS ID index [%d] is greater than available [%d]\n", | |
| 614 | + if (idx >= its->its_count) { | |
| 615 | + dev_err(dev, "requested ITS ID index [%d] overruns ITS entries [%d]\n", | |
| 616 | 616 | idx, its->its_count); |
| 617 | 617 | return -ENXIO; |
| 618 | 618 | } |
| @@ -232,13 +232,15 @@ int acpi_device_set_power(struct acpi_device *device, int state) · 231 unmodified lines | ||
| 232 | 232 | if (device->power.flags.power_resources) |
| 233 | 233 | result = acpi_power_transition(device, target_state); |
| 234 | 234 | } else { |
| 235 | + int cur_state = device->power.state; | |
| 236 | + | |
| 235 | 237 | if (device->power.flags.power_resources) { |
| 236 | 238 | result = acpi_power_transition(device, ACPI_STATE_D0); |
| 237 | 239 | if (result) |
| 238 | 240 | goto end; |
| 239 | 241 | } |
| 240 | 242 | |
| 241 | − if (device->power.state == ACPI_STATE_D0) { | |
| 243 | + if (cur_state == ACPI_STATE_D0) { | |
| 242 | 244 | int psc; |
| 243 | 245 | |
| 244 | 246 | /* Nothing to do here if _PSC is not present. */ |
| @@ -1282,7 +1282,7 @@ static ssize_t hw_error_scrub_store(struct device *dev, · 1281 unmodified lines | ||
| 1282 | 1282 | if (rc) |
| 1283 | 1283 | return rc; |
| 1284 | 1284 | |
| 1285 | − device_lock(dev); | |
| 1285 | + nfit_device_lock(dev); | |
| 1286 | 1286 | nd_desc = dev_get_drvdata(dev); |
| 1287 | 1287 | if (nd_desc) { |
| 1288 | 1288 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| @@ -1299,7 +1299,7 @@ static ssize_t hw_error_scrub_store(struct device *dev, · 10 unmodified lines | ||
| 1299 | 1299 | break; |
| 1300 | 1300 | } |
| 1301 | 1301 | } |
| 1302 | − device_unlock(dev); | |
| 1302 | + nfit_device_unlock(dev); | |
| 1303 | 1303 | if (rc) |
| 1304 | 1304 | return rc; |
| 1305 | 1305 | return size; |
| @@ -1319,7 +1319,7 @@ static ssize_t scrub_show(struct device *dev, · 13 unmodified lines | ||
| 1319 | 1319 | ssize_t rc = -ENXIO; |
| 1320 | 1320 | bool busy; |
| 1321 | 1321 | |
| 1322 | − device_lock(dev); | |
| 1322 | + nfit_device_lock(dev); | |
| 1323 | 1323 | nd_desc = dev_get_drvdata(dev); |
| 1324 | 1324 | if (!nd_desc) { |
| 1325 | 1325 | device_unlock(dev); |
| @@ -1339,7 +1339,7 @@ static ssize_t scrub_show(struct device *dev, · 13 unmodified lines | ||
| 1339 | 1339 | } |
| 1340 | 1340 | |
| 1341 | 1341 | mutex_unlock(&acpi_desc->init_mutex); |
| 1342 | − device_unlock(dev); | |
| 1342 | + nfit_device_unlock(dev); | |
| 1343 | 1343 | return rc; |
| 1344 | 1344 | } |
| 1345 | 1345 | |
| @@ -1356,14 +1356,14 @@ static ssize_t scrub_store(struct device *dev, · 10 unmodified lines | ||
| 1356 | 1356 | if (val != 1) |
| 1357 | 1357 | return -EINVAL; |
| 1358 | 1358 | |
| 1359 | − device_lock(dev); | |
| 1359 | + nfit_device_lock(dev); | |
| 1360 | 1360 | nd_desc = dev_get_drvdata(dev); |
| 1361 | 1361 | if (nd_desc) { |
| 1362 | 1362 | struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc); |
| 1363 | 1363 | |
| 1364 | 1364 | rc = acpi_nfit_ars_rescan(acpi_desc, ARS_REQ_LONG); |
| 1365 | 1365 | } |
| 1366 | − device_unlock(dev); | |
| 1366 | + nfit_device_unlock(dev); | |
| 1367 | 1367 | if (rc) |
| 1368 | 1368 | return rc; |
| 1369 | 1369 | return size; |
| @@ -1749,9 +1749,9 @@ static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data) · 379 unmodified lines | ||
| 1749 | 1749 | struct acpi_device *adev = data; |
| 1750 | 1750 | struct device *dev = &adev->dev; |
| 1751 | 1751 | |
| 1752 | − device_lock(dev->parent); | |
| 1752 | + nfit_device_lock(dev->parent); | |
| 1753 | 1753 | __acpi_nvdimm_notify(dev, event); |
| 1754 | − device_unlock(dev->parent); | |
| 1754 | + nfit_device_unlock(dev->parent); | |
| 1755 | 1755 | } |
| 1756 | 1756 | |
| 1757 | 1757 | static bool acpi_nvdimm_has_method(struct acpi_device *adev, char *method) |
| @@ -3457,8 +3457,8 @@ static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc) · 1699 unmodified lines | ||
| 3457 | 3457 | struct device *dev = acpi_desc->dev; |
| 3458 | 3458 | |
| 3459 | 3459 | /* Bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */ |
| 3460 | − device_lock(dev); | |
| 3461 | − device_unlock(dev); | |
| 3460 | + nfit_device_lock(dev); | |
| 3461 | + nfit_device_unlock(dev); | |
| 3462 | 3462 | |
| 3463 | 3463 | /* Bounce the init_mutex to complete initial registration */ |
| 3464 | 3464 | mutex_lock(&acpi_desc->init_mutex); |
| @@ -3602,8 +3602,8 @@ void acpi_nfit_shutdown(void *data) · 137 unmodified lines | ||
| 3602 | 3602 | * acpi_nfit_ars_rescan() submissions have had a chance to |
| 3603 | 3603 | * either submit or see ->cancel set. |
| 3604 | 3604 | */ |
| 3605 | − device_lock(bus_dev); | |
| 3606 | − device_unlock(bus_dev); | |
| 3605 | + nfit_device_lock(bus_dev); | |
| 3606 | + nfit_device_unlock(bus_dev); | |
| 3607 | 3607 | |
| 3608 | 3608 | flush_workqueue(nfit_wq); |
| 3609 | 3609 | } |
| @@ -3746,9 +3746,9 @@ EXPORT_SYMBOL_GPL(__acpi_nfit_notify); · 136 unmodified lines | ||
| 3746 | 3746 | |
| 3747 | 3747 | static void acpi_nfit_notify(struct acpi_device *adev, u32 event) |
| 3748 | 3748 | { |
| 3749 | − device_lock(&adev->dev); | |
| 3749 | + nfit_device_lock(&adev->dev); | |
| 3750 | 3750 | __acpi_nfit_notify(&adev->dev, adev->handle, event); |
| 3751 | − device_unlock(&adev->dev); | |
| 3751 | + nfit_device_unlock(&adev->dev); | |
| 3752 | 3752 | } |
| 3753 | 3753 | |
| 3754 | 3754 | static const struct acpi_device_id acpi_nfit_ids[] = { |
| @@ -312,6 +312,30 @@ static inline struct acpi_nfit_desc *to_acpi_desc( · 311 unmodified lines | ||
| 312 | 312 | return container_of(nd_desc, struct acpi_nfit_desc, nd_desc); |
| 313 | 313 | } |
| 314 | 314 | |
| 315 | +#ifdef CONFIG_PROVE_LOCKING | |
| 316 | +static inline void nfit_device_lock(struct device *dev) | |
| 317 | +{ | |
| 318 | + device_lock(dev); | |
| 319 | + mutex_lock(&dev->lockdep_mutex); | |
| 320 | +} | |
| 321 | + | |
| 322 | +static inline void nfit_device_unlock(struct device *dev) | |
| 323 | +{ | |
| 324 | + mutex_unlock(&dev->lockdep_mutex); | |
| 325 | + device_unlock(dev); | |
| 326 | +} | |
| 327 | +#else | |
| 328 | +static inline void nfit_device_lock(struct device *dev) | |
| 329 | +{ | |
| 330 | + device_lock(dev); | |
| 331 | +} | |
| 332 | + | |
| 333 | +static inline void nfit_device_unlock(struct device *dev) | |
| 334 | +{ | |
| 335 | + device_unlock(dev); | |
| 336 | +} | |
| 337 | +#endif | |
| 338 | + | |
| 315 | 339 | const guid_t *to_nfit_uuid(enum nfit_uuids id); |
| 316 | 340 | int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *nfit, acpi_size sz); |
| 317 | 341 | void acpi_nfit_shutdown(void *data); |
| @@ -2204,6 +2204,12 @@ int __init acpi_scan_init(void) · 2203 unmodified lines | ||
| 2204 | 2204 | acpi_gpe_apply_masked_gpes(); |
| 2205 | 2205 | acpi_update_all_gpes(); |
| 2206 | 2206 | |
| 2207 | + /* | |
| 2208 | + * Although we call __add_memory() that is documented to require the | |
| 2209 | + * device_hotplug_lock, it is not necessary here because this is an | |
| 2210 | + * early code when userspace or any other code path cannot trigger | |
| 2211 | + * hotplug/hotunplug operations. | |
| 2212 | + */ | |
| 2207 | 2213 | mutex_lock(&acpi_scan_lock); |
| 2208 | 2214 | /* |
| 2209 | 2215 | * Enumerate devices in the ACPI namespace. |
| @@ -2988,7 +2988,7 @@ static void binder_transaction(struct binder_proc *proc, · 2987 unmodified lines | ||
| 2988 | 2988 | else |
| 2989 | 2989 | return_error = BR_DEAD_REPLY; |
| 2990 | 2990 | mutex_unlock(&context->context_mgr_node_lock); |
| 2991 | − if (target_node && target_proc == proc) { | |
| 2991 | + if (target_node && target_proc->pid == proc->pid) { | |
| 2992 | 2992 | binder_user_error("%d:%d got transaction to context manager from process owning it\n", |
| 2993 | 2993 | proc->pid, thread->pid); |
| 2994 | 2994 | return_error = BR_FAILED_REPLY; |
| @@ -3239,7 +3239,8 @@ static void binder_transaction(struct binder_proc *proc, · 244 unmodified lines | ||
| 3239 | 3239 | buffer_offset = off_start_offset; |
| 3240 | 3240 | off_end_offset = off_start_offset + tr->offsets_size; |
| 3241 | 3241 | sg_buf_offset = ALIGN(off_end_offset, sizeof(void *)); |
| 3242 | − sg_buf_end_offset = sg_buf_offset + extra_buffers_size; | |
| 3242 | + sg_buf_end_offset = sg_buf_offset + extra_buffers_size - | |
| 3243 | + ALIGN(secctx_sz, sizeof(u64)); | |
| 3243 | 3244 | off_min = 0; |
| 3244 | 3245 | for (buffer_offset = off_start_offset; buffer_offset < off_end_offset; |
| 3245 | 3246 | buffer_offset += sizeof(binder_size_t)) { |
| @@ -338,6 +338,9 @@ static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, · 337 unmodified lines | ||
| 338 | 338 | hpriv->phys[port] = NULL; |
| 339 | 339 | rc = 0; |
| 340 | 340 | break; |
| 341 | + case -EPROBE_DEFER: | |
| 342 | + /* Do not complain yet */ | |
| 343 | + break; | |
| 341 | 344 | |
| 342 | 345 | default: |
| 343 | 346 | dev_err(dev, |
| @@ -408,7 +411,6 @@ struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev, · 64 unmodified lines | ||
| 408 | 411 | hpriv->mmio = devm_ioremap_resource(dev, |
| 409 | 412 | platform_get_resource(pdev, IORESOURCE_MEM, 0)); |
| 410 | 413 | if (IS_ERR(hpriv->mmio)) { |
| 411 | − dev_err(dev, "no mmio space\n"); | |
| 412 | 414 | rc = PTR_ERR(hpriv->mmio); |
| 413 | 415 | goto err_out; |
| 414 | 416 | } |
| @@ -1786,6 +1786,21 @@ nothing_to_do: · 1785 unmodified lines | ||
| 1786 | 1786 | return 1; |
| 1787 | 1787 | } |
| 1788 | 1788 | |
| 1789 | +static bool ata_check_nblocks(struct scsi_cmnd *scmd, u32 n_blocks) | |
| 1790 | +{ | |
| 1791 | + struct request *rq = scmd->request; | |
| 1792 | + u32 req_blocks; | |
| 1793 | + | |
| 1794 | + if (!blk_rq_is_passthrough(rq)) | |
| 1795 | + return true; | |
| 1796 | + | |
| 1797 | + req_blocks = blk_rq_bytes(rq) / scmd->device->sector_size; | |
| 1798 | + if (n_blocks > req_blocks) | |
| 1799 | + return false; | |
| 1800 | + | |
| 1801 | + return true; | |
| 1802 | +} | |
| 1803 | + | |
| 1789 | 1804 | /** |
| 1790 | 1805 | * ata_scsi_rw_xlat - Translate SCSI r/w command into an ATA one |
| 1791 | 1806 | * @qc: Storage for translated ATA taskfile |
| @@ -1830,6 +1845,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc) · 38 unmodified lines | ||
| 1830 | 1845 | scsi_10_lba_len(cdb, &block, &n_block); |
| 1831 | 1846 | if (cdb[1] & (1 << 3)) |
| 1832 | 1847 | tf_flags |= ATA_TFLAG_FUA; |
| 1848 | + if (!ata_check_nblocks(scmd, n_block)) | |
| 1849 | + goto invalid_fld; | |
| 1833 | 1850 | break; |
| 1834 | 1851 | case READ_6: |
| 1835 | 1852 | case WRITE_6: |
| @@ -1844,6 +1861,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc) · 8 unmodified lines | ||
| 1844 | 1861 | */ |
| 1845 | 1862 | if (!n_block) |
| 1846 | 1863 | n_block = 256; |
| 1864 | + if (!ata_check_nblocks(scmd, n_block)) | |
| 1865 | + goto invalid_fld; | |
| 1847 | 1866 | break; |
| 1848 | 1867 | case READ_16: |
| 1849 | 1868 | case WRITE_16: |
| @@ -1854,6 +1873,8 @@ static unsigned int ata_scsi_rw_xlat(struct ata_queued_cmd *qc) · 4 unmodified lines | ||
| 1854 | 1873 | scsi_16_lba_len(cdb, &block, &n_block); |
| 1855 | 1874 | if (cdb[1] & (1 << 3)) |
| 1856 | 1875 | tf_flags |= ATA_TFLAG_FUA; |
| 1876 | + if (!ata_check_nblocks(scmd, n_block)) | |
| 1877 | + goto invalid_fld; | |
| 1857 | 1878 | break; |
| 1858 | 1879 | default: |
| 1859 | 1880 | DPRINTK("no-byte command\n"); |
| @@ -658,6 +658,10 @@ static void ata_pio_sector(struct ata_queued_cmd *qc) · 657 unmodified lines | ||
| 658 | 658 | unsigned int offset; |
| 659 | 659 | unsigned char *buf; |
| 660 | 660 | |
| 661 | + if (!qc->cursg) { | |
| 662 | + qc->curbytes = qc->nbytes; | |
| 663 | + return; | |
| 664 | + } | |
| 661 | 665 | if (qc->curbytes == qc->nbytes - qc->sect_size) |
| 662 | 666 | ap->hsm_task_state = HSM_ST_LAST; |
| 663 | 667 | |
| @@ -683,6 +687,8 @@ static void ata_pio_sector(struct ata_queued_cmd *qc) · 19 unmodified lines | ||
| 683 | 687 | |
| 684 | 688 | if (qc->cursg_ofs == qc->cursg->length) { |
| 685 | 689 | qc->cursg = sg_next(qc->cursg); |
| 690 | + if (!qc->cursg) | |
| 691 | + ap->hsm_task_state = HSM_ST_LAST; | |
| 686 | 692 | qc->cursg_ofs = 0; |
| 687 | 693 | } |
| 688 | 694 | } |
| @@ -56,7 +56,7 @@ static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev) · 55 unmodified lines | ||
| 56 | 56 | unsigned int ret; |
| 57 | 57 | struct rm_feature_desc *desc; |
| 58 | 58 | struct ata_taskfile tf; |
| 59 | − static const char cdb[] = { GPCMD_GET_CONFIGURATION, | |
| 59 | + static const char cdb[ATAPI_CDB_LEN] = { GPCMD_GET_CONFIGURATION, | |
| 60 | 60 | 2, /* only 1 feature descriptor requested */ |
| 61 | 61 | 0, 3, /* 3, removable medium feature */ |
| 62 | 62 | 0, 0, 0,/* reserved */ |
| @@ -158,7 +158,6 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) · 157 unmodified lines | ||
| 158 | 158 | static int rb532_pata_driver_remove(struct platform_device *pdev) |
| 159 | 159 | { |
| 160 | 160 | struct ata_host *ah = platform_get_drvdata(pdev); |
| 161 | − struct rb532_cf_info *info = ah->private_data; | |
| 162 | 161 | |
| 163 | 162 | ata_host_detach(ah); |
| 164 | 163 | |
| @@ -200,7 +200,7 @@ config ATM_NICSTAR_USE_SUNI · 199 unmodified lines | ||
| 200 | 200 | make the card work). |
| 201 | 201 | |
| 202 | 202 | config ATM_NICSTAR_USE_IDT77105 |
| 203 | − bool "Use IDT77015 PHY driver (25Mbps)" | |
| 203 | + bool "Use IDT77105 PHY driver (25Mbps)" | |
| 204 | 204 | depends on ATM_NICSTAR |
| 205 | 205 | help |
| 206 | 206 | Support for the PHYsical layer chip in ForeRunner LE25 cards. In |
| @@ -63,6 +63,7 @@ · 62 unmodified lines | ||
| 63 | 63 | #include <asm/byteorder.h> |
| 64 | 64 | #include <linux/vmalloc.h> |
| 65 | 65 | #include <linux/jiffies.h> |
| 66 | +#include <linux/nospec.h> | |
| 66 | 67 | #include "iphase.h" |
| 67 | 68 | #include "suni.h" |
| 68 | 69 | #define swap_byte_order(x) (((x & 0xff) << 8) | ((x & 0xff00) >> 8)) |
| @@ -2760,8 +2761,11 @@ static int ia_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg) · 2691 unmodified lines | ||
| 2760 | 2761 | } |
| 2761 | 2762 | if (copy_from_user(&ia_cmds, arg, sizeof ia_cmds)) return -EFAULT; |
| 2762 | 2763 | board = ia_cmds.status; |
| 2763 | − if ((board < 0) || (board > iadev_count)) | |
| 2764 | − board = 0; | |
| 2764 | + | |
| 2765 | + if ((board < 0) || (board > iadev_count)) | |
| 2766 | + board = 0; | |
| 2767 | + board = array_index_nospec(board, iadev_count + 1); | |
| 2768 | + | |
| 2765 | 2769 | iadev = ia_dev[board]; |
| 2766 | 2770 | switch (ia_cmds.cmd) { |
| 2767 | 2771 | case MEMDUMP: |
| @@ -448,6 +448,11 @@ config PANEL_BOOT_MESSAGE · 447 unmodified lines | ||
| 448 | 448 | choice |
| 449 | 449 | prompt "Backlight initial state" |
| 450 | 450 | default CHARLCD_BL_FLASH |
| 451 | + ---help--- | |
| 452 | + Select the initial backlight state on boot or module load. | |
| 453 | + | |
| 454 | + Previously, there was no option for this: the backlight flashed | |
| 455 | + briefly on init. Now you can also turn it off/on. | |
| 451 | 456 | |
| 452 | 457 | config CHARLCD_BL_OFF |
| 453 | 458 | bool "Off" |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | |
| 21 | 21 | #include <generated/utsrelease.h> |
| 22 | 22 | |
| 23 | −#include <misc/charlcd.h> | |
| 23 | +#include "charlcd.h" | |
| 24 | 24 | |
| 25 | 25 | #define LCD_MINOR 156 |
| 26 | 26 | |
| @@ -6,6 +6,9 @@ · 5 unmodified lines | ||
| 6 | 6 | * Copyright (C) 2016-2017 Glider bvba |
| 7 | 7 | */ |
| 8 | 8 | |
| 9 | +#ifndef _CHARLCD_H | |
| 10 | +#define _CHARLCD_H | |
| 11 | + | |
| 9 | 12 | struct charlcd { |
| 10 | 13 | const struct charlcd_ops *ops; |
| 11 | 14 | const unsigned char *char_conv; /* Optional */ |
| @@ -37,3 +40,5 @@ int charlcd_register(struct charlcd *lcd); · 25 unmodified lines | ||
| 37 | 40 | int charlcd_unregister(struct charlcd *lcd); |
| 38 | 41 | |
| 39 | 42 | void charlcd_poke(struct charlcd *lcd); |
| 43 | + | |
| 44 | +#endif /* CHARLCD_H */ | |
| @@ -14,8 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/property.h> |
| 15 | 15 | #include <linux/slab.h> |
| 16 | 16 | |
| 17 | −#include <misc/charlcd.h> | |
| 18 | − | |
| 17 | +#include "charlcd.h" | |
| 19 | 18 | |
| 20 | 19 | enum hd44780_pin { |
| 21 | 20 | /* Order does matter due to writing to GPIO array subsets! */ |
| @@ -74,7 +74,7 @@ struct ht16k33_priv { · 73 unmodified lines | ||
| 74 | 74 | struct ht16k33_fbdev fbdev; |
| 75 | 75 | }; |
| 76 | 76 | |
| 77 | −static struct fb_fix_screeninfo ht16k33_fb_fix = { | |
| 77 | +static const struct fb_fix_screeninfo ht16k33_fb_fix = { | |
| 78 | 78 | .id = DRIVER_NAME, |
| 79 | 79 | .type = FB_TYPE_PACKED_PIXELS, |
| 80 | 80 | .visual = FB_VISUAL_MONO10, |
| @@ -85,7 +85,7 @@ static struct fb_fix_screeninfo ht16k33_fb_fix = { · 4 unmodified lines | ||
| 85 | 85 | .accel = FB_ACCEL_NONE, |
| 86 | 86 | }; |
| 87 | 87 | |
| 88 | −static struct fb_var_screeninfo ht16k33_fb_var = { | |
| 88 | +static const struct fb_var_screeninfo ht16k33_fb_var = { | |
| 89 | 89 | .xres = HT16K33_MATRIX_LED_MAX_ROWS, |
| 90 | 90 | .yres = HT16K33_MATRIX_LED_MAX_COLS, |
| 91 | 91 | .xres_virtual = HT16K33_MATRIX_LED_MAX_ROWS, |
| @@ -55,7 +55,7 @@ · 54 unmodified lines | ||
| 55 | 55 | #include <linux/io.h> |
| 56 | 56 | #include <linux/uaccess.h> |
| 57 | 57 | |
| 58 | −#include <misc/charlcd.h> | |
| 58 | +#include "charlcd.h" | |
| 59 | 59 | |
| 60 | 60 | #define KEYPAD_MINOR 185 |
| 61 | 61 | |
| @@ -1617,6 +1617,8 @@ static void panel_attach(struct parport *port) · 1555 unmodified lines | ||
| 1617 | 1617 | return; |
| 1618 | 1618 | |
| 1619 | 1619 | err_lcd_unreg: |
| 1620 | + if (scan_timer.function) | |
| 1621 | + del_timer_sync(&scan_timer); | |
| 1620 | 1622 | if (lcd.enabled) |
| 1621 | 1623 | charlcd_unregister(lcd.charlcd); |
| 1622 | 1624 | err_unreg_device: |
| @@ -1663,6 +1663,9 @@ void device_initialize(struct device *dev) · 1662 unmodified lines | ||
| 1663 | 1663 | kobject_init(&dev->kobj, &device_ktype); |
| 1664 | 1664 | INIT_LIST_HEAD(&dev->dma_pools); |
| 1665 | 1665 | mutex_init(&dev->mutex); |
| 1666 | +#ifdef CONFIG_PROVE_LOCKING | |
| 1667 | + mutex_init(&dev->lockdep_mutex); | |
| 1668 | +#endif | |
| 1666 | 1669 | lockdep_set_novalidate_class(&dev->mutex); |
| 1667 | 1670 | spin_lock_init(&dev->devres_lock); |
| 1668 | 1671 | INIT_LIST_HEAD(&dev->devres_head); |
| @@ -1820,12 +1823,63 @@ static inline struct kobject *get_glue_dir(struct device *dev) · 151 unmodified lines | ||
| 1820 | 1823 | */ |
| 1821 | 1824 | static void cleanup_glue_dir(struct device *dev, struct kobject *glue_dir) |
| 1822 | 1825 | { |
| 1826 | + unsigned int ref; | |
| 1827 | + | |
| 1823 | 1828 | /* see if we live in a "glue" directory */ |
| 1824 | 1829 | if (!live_in_glue_dir(glue_dir, dev)) |
| 1825 | 1830 | return; |
| 1826 | 1831 | |
| 1827 | 1832 | mutex_lock(&gdp_mutex); |
| 1828 | − if (!kobject_has_children(glue_dir)) | |
| 1833 | + /** | |
| 1834 | + * There is a race condition between removing glue directory | |
| 1835 | + * and adding a new device under the glue directory. | |
| 1836 | + * | |
| 1837 | + * CPU1: CPU2: | |
| 1838 | + * | |
| 1839 | + * device_add() | |
| 1840 | + * get_device_parent() | |
| 1841 | + * class_dir_create_and_add() | |
| 1842 | + * kobject_add_internal() | |
| 1843 | + * create_dir() // create glue_dir | |
| 1844 | + * | |
| 1845 | + * device_add() | |
| 1846 | + * get_device_parent() | |
| 1847 | + * kobject_get() // get glue_dir | |
| 1848 | + * | |
| 1849 | + * device_del() | |
| 1850 | + * cleanup_glue_dir() | |
| 1851 | + * kobject_del(glue_dir) | |
| 1852 | + * | |
| 1853 | + * kobject_add() | |
| 1854 | + * kobject_add_internal() | |
| 1855 | + * create_dir() // in glue_dir | |
| 1856 | + * sysfs_create_dir_ns() | |
| 1857 | + * kernfs_create_dir_ns(sd) | |
| 1858 | + * | |
| 1859 | + * sysfs_remove_dir() // glue_dir->sd=NULL | |
| 1860 | + * sysfs_put() // free glue_dir->sd | |
| 1861 | + * | |
| 1862 | + * // sd is freed | |
| 1863 | + * kernfs_new_node(sd) | |
| 1864 | + * kernfs_get(glue_dir) | |
| 1865 | + * kernfs_add_one() | |
| 1866 | + * kernfs_put() | |
| 1867 | + * | |
| 1868 | + * Before CPU1 remove last child device under glue dir, if CPU2 add | |
| 1869 | + * a new device under glue dir, the glue_dir kobject reference count | |
| 1870 | + * will be increase to 2 in kobject_get(k). And CPU2 has been called | |
| 1871 | + * kernfs_create_dir_ns(). Meanwhile, CPU1 call sysfs_remove_dir() | |
| 1872 | + * and sysfs_put(). This result in glue_dir->sd is freed. | |
| 1873 | + * | |
| 1874 | + * Then the CPU2 will see a stale "empty" but still potentially used | |
| 1875 | + * glue dir around in kernfs_new_node(). | |
| 1876 | + * | |
| 1877 | + * In order to avoid this happening, we also should make sure that | |
| 1878 | + * kernfs_node for glue_dir is released in CPU1 only when refcount | |
| 1879 | + * for glue_dir kobj is 1. | |
| 1880 | + */ | |
| 1881 | + ref = kref_read(&glue_dir->kref); | |
| 1882 | + if (!kobject_has_children(glue_dir) && !--ref) | |
| 1829 | 1883 | kobject_del(glue_dir); |
| 1830 | 1884 | kobject_put(glue_dir); |
| 1831 | 1885 | mutex_unlock(&gdp_mutex); |
| @@ -2211,6 +2265,24 @@ void put_device(struct device *dev) · 379 unmodified lines | ||
| 2211 | 2265 | } |
| 2212 | 2266 | EXPORT_SYMBOL_GPL(put_device); |
| 2213 | 2267 | |
| 2268 | +bool kill_device(struct device *dev) | |
| 2269 | +{ | |
| 2270 | + /* | |
| 2271 | + * Require the device lock and set the "dead" flag to guarantee that | |
| 2272 | + * the update behavior is consistent with the other bitfields near | |
| 2273 | + * it and that we cannot have an asynchronous probe routine trying | |
| 2274 | + * to run while we are tearing out the bus/class/sysfs from | |
| 2275 | + * underneath the device. | |
| 2276 | + */ | |
| 2277 | + lockdep_assert_held(&dev->mutex); | |
| 2278 | + | |
| 2279 | + if (dev->p->dead) | |
| 2280 | + return false; | |
| 2281 | + dev->p->dead = true; | |
| 2282 | + return true; | |
| 2283 | +} | |
| 2284 | +EXPORT_SYMBOL_GPL(kill_device); | |
| 2285 | + | |
| 2214 | 2286 | /** |
| 2215 | 2287 | * device_del - delete device from system. |
| 2216 | 2288 | * @dev: device. |
| @@ -2230,15 +2302,8 @@ void device_del(struct device *dev) · 13 unmodified lines | ||
| 2230 | 2302 | struct kobject *glue_dir = NULL; |
| 2231 | 2303 | struct class_interface *class_intf; |
| 2232 | 2304 | |
| 2233 | − /* | |
| 2234 | − * Hold the device lock and set the "dead" flag to guarantee that | |
| 2235 | − * the update behavior is consistent with the other bitfields near | |
| 2236 | − * it and that we cannot have an asynchronous probe routine trying | |
| 2237 | − * to run while we are tearing out the bus/class/sysfs from | |
| 2238 | − * underneath the device. | |
| 2239 | − */ | |
| 2240 | 2305 | device_lock(dev); |
| 2241 | − dev->p->dead = true; | |
| 2306 | + kill_device(dev); | |
| 2242 | 2307 | device_unlock(dev); |
| 2243 | 2308 | |
| 2244 | 2309 | /* Notify clients of device removal. This call must come |
| @@ -141,8 +141,8 @@ int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed); · 140 unmodified lines | ||
| 141 | 141 | int fw_map_paged_buf(struct fw_priv *fw_priv); |
| 142 | 142 | #else |
| 143 | 143 | static inline void fw_free_paged_buf(struct fw_priv *fw_priv) {} |
| 144 | −int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; } | |
| 145 | −int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; } | |
| 144 | +static inline int fw_grow_paged_buf(struct fw_priv *fw_priv, int pages_needed) { return -ENXIO; } | |
| 145 | +static inline int fw_map_paged_buf(struct fw_priv *fw_priv) { return -ENXIO; } | |
| 146 | 146 | #endif |
| 147 | 147 | |
| 148 | 148 | #endif /* __FIRMWARE_LOADER_H */ |
| @@ -157,8 +157,13 @@ int platform_get_irq(struct platform_device *dev, unsigned int num) · 156 unmodified lines | ||
| 157 | 157 | * the device will only expose one IRQ, and this fallback |
| 158 | 158 | * allows a common code path across either kind of resource. |
| 159 | 159 | */ |
| 160 | − if (num == 0 && has_acpi_companion(&dev->dev)) | |
| 161 | − return acpi_dev_gpio_irq_get(ACPI_COMPANION(&dev->dev), num); | |
| 160 | + if (num == 0 && has_acpi_companion(&dev->dev)) { | |
| 161 | + int ret = acpi_dev_gpio_irq_get(ACPI_COMPANION(&dev->dev), num); | |
| 162 | + | |
| 163 | + /* Our callers expect -ENXIO for missing IRQs. */ | |
| 164 | + if (ret >= 0 || ret == -EPROBE_DEFER) | |
| 165 | + return ret; | |
| 166 | + } | |
| 162 | 167 | |
| 163 | 168 | return -ENXIO; |
| 164 | 169 | #endif |
| @@ -44,7 +44,7 @@ config REGMAP_IRQ · 43 unmodified lines | ||
| 44 | 44 | |
| 45 | 45 | config REGMAP_SOUNDWIRE |
| 46 | 46 | tristate |
| 47 | − depends on SOUNDWIRE_BUS | |
| 47 | + depends on SOUNDWIRE | |
| 48 | 48 | |
| 49 | 49 | config REGMAP_SCCB |
| 50 | 50 | tristate |
| @@ -323,10 +323,14 @@ flush(const char __user *str, size_t cnt, int exiting) · 322 unmodified lines | ||
| 323 | 323 | } |
| 324 | 324 | |
| 325 | 325 | flush_scheduled_work(); |
| 326 | − /* pass one: without sleeping, do aoedev_downdev */ | |
| 326 | + /* pass one: do aoedev_downdev, which might sleep */ | |
| 327 | +restart1: | |
| 327 | 328 | spin_lock_irqsave(&devlist_lock, flags); |
| 328 | 329 | for (d = devlist; d; d = d->next) { |
| 329 | 330 | spin_lock(&d->lock); |
| 331 | + if (d->flags & DEVFL_TKILL) | |
| 332 | + goto cont; | |
| 333 | + | |
| 330 | 334 | if (exiting) { |
| 331 | 335 | /* unconditionally take each device down */ |
| 332 | 336 | } else if (specified) { |
| @@ -338,8 +342,11 @@ flush(const char __user *str, size_t cnt, int exiting) · 5 unmodified lines | ||
| 338 | 342 | || d->ref) |
| 339 | 343 | goto cont; |
| 340 | 344 | |
| 345 | + spin_unlock(&d->lock); | |
| 346 | + spin_unlock_irqrestore(&devlist_lock, flags); | |
| 341 | 347 | aoedev_downdev(d); |
| 342 | 348 | d->flags |= DEVFL_TKILL; |
| 349 | + goto restart1; | |
| 343 | 350 | cont: |
| 344 | 351 | spin_unlock(&d->lock); |
| 345 | 352 | } |
| @@ -348,7 +355,7 @@ cont: · 2 unmodified lines | ||
| 348 | 355 | /* pass two: call freedev, which might sleep, |
| 349 | 356 | * for aoedevs marked with DEVFL_TKILL |
| 350 | 357 | */ |
| 351 | −restart: | |
| 358 | +restart2: | |
| 352 | 359 | spin_lock_irqsave(&devlist_lock, flags); |
| 353 | 360 | for (d = devlist; d; d = d->next) { |
| 354 | 361 | spin_lock(&d->lock); |
| @@ -357,7 +364,7 @@ restart: · 2 unmodified lines | ||
| 357 | 364 | spin_unlock(&d->lock); |
| 358 | 365 | spin_unlock_irqrestore(&devlist_lock, flags); |
| 359 | 366 | freedev(d); |
| 360 | − goto restart; | |
| 367 | + goto restart2; | |
| 361 | 368 | } |
| 362 | 369 | spin_unlock(&d->lock); |
| 363 | 370 | } |
| @@ -1726,6 +1726,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, · 1725 unmodified lines | ||
| 1726 | 1726 | /* MSch: invalidate default_params */ |
| 1727 | 1727 | default_params[drive].blocks = 0; |
| 1728 | 1728 | set_capacity(floppy->disk, MAX_DISK_SIZE * 2); |
| 1729 | + /* Fall through */ | |
| 1729 | 1730 | case FDFMTEND: |
| 1730 | 1731 | case FDFLUSH: |
| 1731 | 1732 | /* invalidate the buffer track to force a reread */ |
| @@ -322,6 +322,8 @@ static int drbd_thread_setup(void *arg) · 321 unmodified lines | ||
| 322 | 322 | thi->name[0], |
| 323 | 323 | resource->name); |
| 324 | 324 | |
| 325 | + allow_kernel_signal(DRBD_SIGKILL); | |
| 326 | + allow_kernel_signal(SIGXCPU); | |
| 325 | 327 | restart: |
| 326 | 328 | retval = thi->function(thi); |
| 327 | 329 | |
| @@ -5417,7 +5417,7 @@ static int drbd_do_auth(struct drbd_connection *connection) · 5416 unmodified lines | ||
| 5417 | 5417 | unsigned int key_len; |
| 5418 | 5418 | char secret[SHARED_SECRET_MAX]; /* 64 byte */ |
| 5419 | 5419 | unsigned int resp_size; |
| 5420 | − SHASH_DESC_ON_STACK(desc, connection->cram_hmac_tfm); | |
| 5420 | + struct shash_desc *desc; | |
| 5421 | 5421 | struct packet_info pi; |
| 5422 | 5422 | struct net_conf *nc; |
| 5423 | 5423 | int err, rv; |
| @@ -5430,6 +5430,13 @@ static int drbd_do_auth(struct drbd_connection *connection) · 6 unmodified lines | ||
| 5430 | 5430 | memcpy(secret, nc->shared_secret, key_len); |
| 5431 | 5431 | rcu_read_unlock(); |
| 5432 | 5432 | |
| 5433 | + desc = kmalloc(sizeof(struct shash_desc) + | |
| 5434 | + crypto_shash_descsize(connection->cram_hmac_tfm), | |
| 5435 | + GFP_KERNEL); | |
| 5436 | + if (!desc) { | |
| 5437 | + rv = -1; | |
| 5438 | + goto fail; | |
| 5439 | + } | |
| 5433 | 5440 | desc->tfm = connection->cram_hmac_tfm; |
| 5434 | 5441 | |
| 5435 | 5442 | rv = crypto_shash_setkey(connection->cram_hmac_tfm, (u8 *)secret, key_len); |
| @@ -5571,7 +5578,10 @@ static int drbd_do_auth(struct drbd_connection *connection) · 135 unmodified lines | ||
| 5571 | 5578 | kfree(peers_ch); |
| 5572 | 5579 | kfree(response); |
| 5573 | 5580 | kfree(right_response); |
| 5574 | − shash_desc_zero(desc); | |
| 5581 | + if (desc) { | |
| 5582 | + shash_desc_zero(desc); | |
| 5583 | + kfree(desc); | |
| 5584 | + } | |
| 5575 | 5585 | |
| 5576 | 5586 | return rv; |
| 5577 | 5587 | } |
| @@ -885,7 +885,7 @@ static void loop_unprepare_queue(struct loop_device *lo) · 884 unmodified lines | ||
| 885 | 885 | |
| 886 | 886 | static int loop_kthread_worker_fn(void *worker_ptr) |
| 887 | 887 | { |
| 888 | − current->flags |= PF_LESS_THROTTLE; | |
| 888 | + current->flags |= PF_LESS_THROTTLE | PF_MEMALLOC_NOIO; | |
| 889 | 889 | return kthread_worker_fn(worker_ptr); |
| 890 | 890 | } |
| 891 | 891 | |
| @@ -924,6 +924,7 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode, · 32 unmodified lines | ||
| 924 | 924 | struct file *file; |
| 925 | 925 | struct inode *inode; |
| 926 | 926 | struct address_space *mapping; |
| 927 | + struct block_device *claimed_bdev = NULL; | |
| 927 | 928 | int lo_flags = 0; |
| 928 | 929 | int error; |
| 929 | 930 | loff_t size; |
| @@ -942,10 +943,11 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode, · 12 unmodified lines | ||
| 942 | 943 | * here to avoid changing device under exclusive owner. |
| 943 | 944 | */ |
| 944 | 945 | if (!(mode & FMODE_EXCL)) { |
| 945 | − bdgrab(bdev); | |
| 946 | − error = blkdev_get(bdev, mode | FMODE_EXCL, loop_set_fd); | |
| 947 | − if (error) | |
| 946 | + claimed_bdev = bd_start_claiming(bdev, loop_set_fd); | |
| 947 | + if (IS_ERR(claimed_bdev)) { | |
| 948 | + error = PTR_ERR(claimed_bdev); | |
| 948 | 949 | goto out_putf; |
| 950 | + } | |
| 949 | 951 | } |
| 950 | 952 | |
| 951 | 953 | error = mutex_lock_killable(&loop_ctl_mutex); |
| @@ -1015,15 +1017,15 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode, · 63 unmodified lines | ||
| 1015 | 1017 | mutex_unlock(&loop_ctl_mutex); |
| 1016 | 1018 | if (partscan) |
| 1017 | 1019 | loop_reread_partitions(lo, bdev); |
| 1018 | − if (!(mode & FMODE_EXCL)) | |
| 1019 | − blkdev_put(bdev, mode | FMODE_EXCL); | |
| 1020 | + if (claimed_bdev) | |
| 1021 | + bd_abort_claiming(bdev, claimed_bdev, loop_set_fd); | |
| 1020 | 1022 | return 0; |
| 1021 | 1023 | |
| 1022 | 1024 | out_unlock: |
| 1023 | 1025 | mutex_unlock(&loop_ctl_mutex); |
| 1024 | 1026 | out_bdev: |
| 1025 | − if (!(mode & FMODE_EXCL)) | |
| 1026 | − blkdev_put(bdev, mode | FMODE_EXCL); | |
| 1027 | + if (claimed_bdev) | |
| 1028 | + bd_abort_claiming(bdev, claimed_bdev, loop_set_fd); | |
| 1027 | 1029 | out_putf: |
| 1028 | 1030 | fput(file); |
| 1029 | 1031 | out: |
| @@ -1231,7 +1231,7 @@ static void nbd_clear_sock_ioctl(struct nbd_device *nbd, · 1230 unmodified lines | ||
| 1231 | 1231 | struct block_device *bdev) |
| 1232 | 1232 | { |
| 1233 | 1233 | sock_shutdown(nbd); |
| 1234 | − kill_bdev(bdev); | |
| 1234 | + __invalidate_device(bdev, true); | |
| 1235 | 1235 | nbd_bdev_reset(bdev); |
| 1236 | 1236 | if (test_and_clear_bit(NBD_HAS_CONFIG_REF, |
| 1237 | 1237 | &nbd->config->runtime_flags)) |
| @@ -3038,6 +3038,17 @@ again: · 3037 unmodified lines | ||
| 3038 | 3038 | } |
| 3039 | 3039 | return true; |
| 3040 | 3040 | case RBD_OBJ_READ_PARENT: |
| 3041 | + /* | |
| 3042 | + * The parent image is read only up to the overlap -- zero-fill | |
| 3043 | + * from the overlap to the end of the request. | |
| 3044 | + */ | |
| 3045 | + if (!*result) { | |
| 3046 | + u32 obj_overlap = rbd_obj_img_extents_bytes(obj_req); | |
| 3047 | + | |
| 3048 | + if (obj_overlap < obj_req->ex.oe_len) | |
| 3049 | + rbd_obj_zero_range(obj_req, obj_overlap, | |
| 3050 | + obj_req->ex.oe_len - obj_overlap); | |
| 3051 | + } | |
| 3041 | 3052 | return true; |
| 3042 | 3053 | default: |
| 3043 | 3054 | BUG(); |
| @@ -965,6 +965,7 @@ static int read_per_ring_refs(struct xen_blkif_ring *ring, const char *dir) · 964 unmodified lines | ||
| 965 | 965 | } |
| 966 | 966 | } |
| 967 | 967 | |
| 968 | + err = -ENOMEM; | |
| 968 | 969 | for (i = 0; i < nr_grefs * XEN_BLKIF_REQS_PER_PAGE; i++) { |
| 969 | 970 | req = kzalloc(sizeof(*req), GFP_KERNEL); |
| 970 | 971 | if (!req) |
| @@ -987,7 +988,7 @@ static int read_per_ring_refs(struct xen_blkif_ring *ring, const char *dir) · 16 unmodified lines | ||
| 987 | 988 | err = xen_blkif_map(ring, ring_ref, nr_grefs, evtchn); |
| 988 | 989 | if (err) { |
| 989 | 990 | xenbus_dev_fatal(dev, err, "mapping ring-ref port %u", evtchn); |
| 990 | − return err; | |
| 991 | + goto fail; | |
| 991 | 992 | } |
| 992 | 993 | |
| 993 | 994 | return 0; |
| @@ -1007,8 +1008,7 @@ fail: · 13 unmodified lines | ||
| 1007 | 1008 | } |
| 1008 | 1009 | kfree(req); |
| 1009 | 1010 | } |
| 1010 | − return -ENOMEM; | |
| 1011 | − | |
| 1011 | + return err; | |
| 1012 | 1012 | } |
| 1013 | 1013 | |
| 1014 | 1014 | static int connect_ring(struct backend_info *be) |
| @@ -99,6 +99,27 @@ static int qca_send_reset(struct hci_dev *hdev) · 98 unmodified lines | ||
| 99 | 99 | return 0; |
| 100 | 100 | } |
| 101 | 101 | |
| 102 | +int qca_send_pre_shutdown_cmd(struct hci_dev *hdev) | |
| 103 | +{ | |
| 104 | + struct sk_buff *skb; | |
| 105 | + int err; | |
| 106 | + | |
| 107 | + bt_dev_dbg(hdev, "QCA pre shutdown cmd"); | |
| 108 | + | |
| 109 | + skb = __hci_cmd_sync(hdev, QCA_PRE_SHUTDOWN_CMD, 0, | |
| 110 | + NULL, HCI_INIT_TIMEOUT); | |
| 111 | + if (IS_ERR(skb)) { | |
| 112 | + err = PTR_ERR(skb); | |
| 113 | + bt_dev_err(hdev, "QCA preshutdown_cmd failed (%d)", err); | |
| 114 | + return err; | |
| 115 | + } | |
| 116 | + | |
| 117 | + kfree_skb(skb); | |
| 118 | + | |
| 119 | + return 0; | |
| 120 | +} | |
| 121 | +EXPORT_SYMBOL_GPL(qca_send_pre_shutdown_cmd); | |
| 122 | + | |
| 102 | 123 | static void qca_tlv_check_data(struct rome_config *config, |
| 103 | 124 | const struct firmware *fw) |
| 104 | 125 | { |
| @@ -119,6 +140,7 @@ static void qca_tlv_check_data(struct rome_config *config, · 14 unmodified lines | ||
| 119 | 140 | BT_DBG("Length\t\t : %d bytes", length); |
| 120 | 141 | |
| 121 | 142 | config->dnld_mode = ROME_SKIP_EVT_NONE; |
| 143 | + config->dnld_type = ROME_SKIP_EVT_NONE; | |
| 122 | 144 | |
| 123 | 145 | switch (config->type) { |
| 124 | 146 | case TLV_TYPE_PATCH: |
| @@ -268,7 +290,7 @@ static int qca_inject_cmd_complete_event(struct hci_dev *hdev) · 143 unmodified lines | ||
| 268 | 290 | |
| 269 | 291 | evt = skb_put(skb, sizeof(*evt)); |
| 270 | 292 | evt->ncmd = 1; |
| 271 | − evt->opcode = QCA_HCI_CC_OPCODE; | |
| 293 | + evt->opcode = cpu_to_le16(QCA_HCI_CC_OPCODE); | |
| 272 | 294 | |
| 273 | 295 | skb_put_u8(skb, QCA_HCI_CC_SUCCESS); |
| 274 | 296 | |
| @@ -323,7 +345,7 @@ static int qca_download_firmware(struct hci_dev *hdev, · 48 unmodified lines | ||
| 323 | 345 | */ |
| 324 | 346 | if (config->dnld_type == ROME_SKIP_EVT_VSE_CC || |
| 325 | 347 | config->dnld_type == ROME_SKIP_EVT_VSE) |
| 326 | − return qca_inject_cmd_complete_event(hdev); | |
| 348 | + ret = qca_inject_cmd_complete_event(hdev); | |
| 327 | 349 | |
| 328 | 350 | out: |
| 329 | 351 | release_firmware(fw); |
| @@ -388,6 +410,9 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, · 58 unmodified lines | ||
| 388 | 410 | return err; |
| 389 | 411 | } |
| 390 | 412 | |
| 413 | + /* Give the controller some time to get ready to receive the NVM */ | |
| 414 | + msleep(10); | |
| 415 | + | |
| 391 | 416 | /* Download NVM configuration */ |
| 392 | 417 | config.type = TLV_TYPE_NVM; |
| 393 | 418 | if (firmware_name) |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | #define EDL_PATCH_TLV_REQ_CMD (0x1E) |
| 14 | 14 | #define EDL_NVM_ACCESS_SET_REQ_CMD (0x01) |
| 15 | 15 | #define MAX_SIZE_PER_TLV_SEGMENT (243) |
| 16 | +#define QCA_PRE_SHUTDOWN_CMD (0xFC08) | |
| 16 | 17 | |
| 17 | 18 | #define EDL_CMD_REQ_RES_EVT (0x00) |
| 18 | 19 | #define EDL_PATCH_VER_RES_EVT (0x19) |
| @@ -135,6 +136,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, · 116 unmodified lines | ||
| 135 | 136 | const char *firmware_name); |
| 136 | 137 | int qca_read_soc_version(struct hci_dev *hdev, u32 *soc_version); |
| 137 | 138 | int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); |
| 139 | +int qca_send_pre_shutdown_cmd(struct hci_dev *hdev); | |
| 138 | 140 | static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) |
| 139 | 141 | { |
| 140 | 142 | return soc_type == QCA_WCN3990 || soc_type == QCA_WCN3998; |
| @@ -167,4 +169,9 @@ static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) · 26 unmodified lines | ||
| 167 | 169 | { |
| 168 | 170 | return false; |
| 169 | 171 | } |
| 172 | + | |
| 173 | +static inline int qca_send_pre_shutdown_cmd(struct hci_dev *hdev) | |
| 174 | +{ | |
| 175 | + return -EOPNOTSUPP; | |
| 176 | +} | |
| 170 | 177 | #endif |
| @@ -2762,8 +2762,10 @@ static int btusb_mtk_setup_firmware(struct hci_dev *hdev, const char *fwname) · 2761 unmodified lines | ||
| 2762 | 2762 | fw_size = fw->size; |
| 2763 | 2763 | |
| 2764 | 2764 | /* The size of patch header is 30 bytes, should be skip */ |
| 2765 | − if (fw_size < 30) | |
| 2765 | + if (fw_size < 30) { | |
| 2766 | + err = -EINVAL; | |
| 2766 | 2767 | goto err_release_fw; |
| 2768 | + } | |
| 2767 | 2769 | |
| 2768 | 2770 | fw_size -= 30; |
| 2769 | 2771 | fw_ptr += 30; |
| @@ -98,6 +98,9 @@ static int ath_open(struct hci_uart *hu) · 97 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | BT_DBG("hu %p", hu); |
| 100 | 100 | |
| 101 | + if (!hci_uart_has_flow_control(hu)) | |
| 102 | + return -EOPNOTSUPP; | |
| 103 | + | |
| 101 | 104 | ath = kzalloc(sizeof(*ath), GFP_KERNEL); |
| 102 | 105 | if (!ath) |
| 103 | 106 | return -ENOMEM; |
| @@ -406,6 +406,9 @@ static int bcm_open(struct hci_uart *hu) · 405 unmodified lines | ||
| 406 | 406 | |
| 407 | 407 | bt_dev_dbg(hu->hdev, "hu %p", hu); |
| 408 | 408 | |
| 409 | + if (!hci_uart_has_flow_control(hu)) | |
| 410 | + return -EOPNOTSUPP; | |
| 411 | + | |
| 409 | 412 | bcm = kzalloc(sizeof(*bcm), GFP_KERNEL); |
| 410 | 413 | if (!bcm) |
| 411 | 414 | return -ENOMEM; |
| @@ -391,6 +391,9 @@ static int intel_open(struct hci_uart *hu) · 390 unmodified lines | ||
| 391 | 391 | |
| 392 | 392 | BT_DBG("hu %p", hu); |
| 393 | 393 | |
| 394 | + if (!hci_uart_has_flow_control(hu)) | |
| 395 | + return -EOPNOTSUPP; | |
| 396 | + | |
| 394 | 397 | intel = kzalloc(sizeof(*intel), GFP_KERNEL); |
| 395 | 398 | if (!intel) |
| 396 | 399 | return -ENOMEM; |
| @@ -292,6 +292,19 @@ static int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb) · 291 unmodified lines | ||
| 292 | 292 | return 0; |
| 293 | 293 | } |
| 294 | 294 | |
| 295 | +/* Check the underlying device or tty has flow control support */ | |
| 296 | +bool hci_uart_has_flow_control(struct hci_uart *hu) | |
| 297 | +{ | |
| 298 | + /* serdev nodes check if the needed operations are present */ | |
| 299 | + if (hu->serdev) | |
| 300 | + return true; | |
| 301 | + | |
| 302 | + if (hu->tty->driver->ops->tiocmget && hu->tty->driver->ops->tiocmset) | |
| 303 | + return true; | |
| 304 | + | |
| 305 | + return false; | |
| 306 | +} | |
| 307 | + | |
| 295 | 308 | /* Flow control or un-flow control the device */ |
| 296 | 309 | void hci_uart_set_flow_control(struct hci_uart *hu, bool enable) |
| 297 | 310 | { |
| @@ -59,6 +59,9 @@ static int mrvl_open(struct hci_uart *hu) · 58 unmodified lines | ||
| 59 | 59 | |
| 60 | 60 | BT_DBG("hu %p", hu); |
| 61 | 61 | |
| 62 | + if (!hci_uart_has_flow_control(hu)) | |
| 63 | + return -EOPNOTSUPP; | |
| 64 | + | |
| 62 | 65 | mrvl = kzalloc(sizeof(*mrvl), GFP_KERNEL); |
| 63 | 66 | if (!mrvl) |
| 64 | 67 | return -ENOMEM; |
| @@ -473,6 +473,9 @@ static int qca_open(struct hci_uart *hu) · 472 unmodified lines | ||
| 473 | 473 | |
| 474 | 474 | BT_DBG("hu %p qca_open", hu); |
| 475 | 475 | |
| 476 | + if (!hci_uart_has_flow_control(hu)) | |
| 477 | + return -EOPNOTSUPP; | |
| 478 | + | |
| 476 | 479 | qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); |
| 477 | 480 | if (!qca) |
| 478 | 481 | return -ENOMEM; |
| @@ -702,7 +705,7 @@ static void device_want_to_sleep(struct hci_uart *hu) · 223 unmodified lines | ||
| 702 | 705 | unsigned long flags; |
| 703 | 706 | struct qca_data *qca = hu->priv; |
| 704 | 707 | |
| 705 | − BT_DBG("hu %p want to sleep", hu); | |
| 708 | + BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); | |
| 706 | 709 | |
| 707 | 710 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
| 708 | 711 | |
| @@ -717,7 +720,7 @@ static void device_want_to_sleep(struct hci_uart *hu) · 8 unmodified lines | ||
| 717 | 720 | break; |
| 718 | 721 | |
| 719 | 722 | case HCI_IBS_RX_ASLEEP: |
| 720 | − /* Fall through */ | |
| 723 | + break; | |
| 721 | 724 | |
| 722 | 725 | default: |
| 723 | 726 | /* Any other state is illegal */ |
| @@ -909,7 +912,7 @@ static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) · 185 unmodified lines | ||
| 909 | 912 | if (hdr->evt == HCI_EV_VENDOR) |
| 910 | 913 | complete(&qca->drop_ev_comp); |
| 911 | 914 | |
| 912 | − kfree(skb); | |
| 915 | + kfree_skb(skb); | |
| 913 | 916 | |
| 914 | 917 | return 0; |
| 915 | 918 | } |
| @@ -1383,6 +1386,9 @@ static int qca_power_off(struct hci_dev *hdev) · 467 unmodified lines | ||
| 1383 | 1386 | { |
| 1384 | 1387 | struct hci_uart *hu = hci_get_drvdata(hdev); |
| 1385 | 1388 | |
| 1389 | + /* Perform pre shutdown command */ | |
| 1390 | + qca_send_pre_shutdown_cmd(hdev); | |
| 1391 | + | |
| 1386 | 1392 | qca_power_shutdown(hu); |
| 1387 | 1393 | return 0; |
| 1388 | 1394 | } |
| @@ -104,6 +104,7 @@ int hci_uart_wait_until_sent(struct hci_uart *hu); · 103 unmodified lines | ||
| 104 | 104 | int hci_uart_init_ready(struct hci_uart *hu); |
| 105 | 105 | void hci_uart_init_work(struct work_struct *work); |
| 106 | 106 | void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed); |
| 107 | +bool hci_uart_has_flow_control(struct hci_uart *hu); | |
| 107 | 108 | void hci_uart_set_flow_control(struct hci_uart *hu, bool enable); |
| 108 | 109 | void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed, |
| 109 | 110 | unsigned int oper_speed); |
| @@ -456,6 +456,17 @@ struct hisi_lpc_acpi_cell { · 455 unmodified lines | ||
| 456 | 456 | size_t pdata_size; |
| 457 | 457 | }; |
| 458 | 458 | |
| 459 | +static void hisi_lpc_acpi_remove(struct device *hostdev) | |
| 460 | +{ | |
| 461 | + struct acpi_device *adev = ACPI_COMPANION(hostdev); | |
| 462 | + struct acpi_device *child; | |
| 463 | + | |
| 464 | + device_for_each_child(hostdev, NULL, hisi_lpc_acpi_remove_subdev); | |
| 465 | + | |
| 466 | + list_for_each_entry(child, &adev->children, node) | |
| 467 | + acpi_device_clear_enumerated(child); | |
| 468 | +} | |
| 469 | + | |
| 459 | 470 | /* |
| 460 | 471 | * hisi_lpc_acpi_probe - probe children for ACPI FW |
| 461 | 472 | * @hostdev: LPC host device pointer |
| @@ -555,8 +566,7 @@ static int hisi_lpc_acpi_probe(struct device *hostdev) · 93 unmodified lines | ||
| 555 | 566 | return 0; |
| 556 | 567 | |
| 557 | 568 | fail: |
| 558 | − device_for_each_child(hostdev, NULL, | |
| 559 | − hisi_lpc_acpi_remove_subdev); | |
| 569 | + hisi_lpc_acpi_remove(hostdev); | |
| 560 | 570 | return ret; |
| 561 | 571 | } |
| 562 | 572 | |
| @@ -569,6 +579,10 @@ static int hisi_lpc_acpi_probe(struct device *dev) · 6 unmodified lines | ||
| 569 | 579 | { |
| 570 | 580 | return -ENODEV; |
| 571 | 581 | } |
| 582 | + | |
| 583 | +static void hisi_lpc_acpi_remove(struct device *hostdev) | |
| 584 | +{ | |
| 585 | +} | |
| 572 | 586 | #endif // CONFIG_ACPI |
| 573 | 587 | |
| 574 | 588 | /* |
| @@ -606,24 +620,27 @@ static int hisi_lpc_probe(struct platform_device *pdev) · 31 unmodified lines | ||
| 606 | 620 | range->fwnode = dev->fwnode; |
| 607 | 621 | range->flags = LOGIC_PIO_INDIRECT; |
| 608 | 622 | range->size = PIO_INDIRECT_SIZE; |
| 623 | + range->hostdata = lpcdev; | |
| 624 | + range->ops = &hisi_lpc_ops; | |
| 625 | + lpcdev->io_host = range; | |
| 609 | 626 | |
| 610 | 627 | ret = logic_pio_register_range(range); |
| 611 | 628 | if (ret) { |
| 612 | 629 | dev_err(dev, "register IO range failed (%d)!\n", ret); |
| 613 | 630 | return ret; |
| 614 | 631 | } |
| 615 | − lpcdev->io_host = range; | |
| 616 | 632 | |
| 617 | 633 | /* register the LPC host PIO resources */ |
| 618 | 634 | if (acpi_device) |
| 619 | 635 | ret = hisi_lpc_acpi_probe(dev); |
| 620 | 636 | else |
| 621 | 637 | ret = of_platform_populate(dev->of_node, NULL, NULL, dev); |
| 622 | − if (ret) | |
| 638 | + if (ret) { | |
| 639 | + logic_pio_unregister_range(range); | |
| 623 | 640 | return ret; |
| 641 | + } | |
| 624 | 642 | |
| 625 | − lpcdev->io_host->hostdata = lpcdev; | |
| 626 | − lpcdev->io_host->ops = &hisi_lpc_ops; | |
| 643 | + dev_set_drvdata(dev, lpcdev); | |
| 627 | 644 | |
| 628 | 645 | io_end = lpcdev->io_host->io_start + lpcdev->io_host->size; |
| 629 | 646 | dev_info(dev, "registered range [%pa - %pa]\n", |
| @@ -632,6 +649,23 @@ static int hisi_lpc_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 632 | 649 | return ret; |
| 633 | 650 | } |
| 634 | 651 | |
| 652 | +static int hisi_lpc_remove(struct platform_device *pdev) | |
| 653 | +{ | |
| 654 | + struct device *dev = &pdev->dev; | |
| 655 | + struct acpi_device *acpi_device = ACPI_COMPANION(dev); | |
| 656 | + struct hisi_lpc_dev *lpcdev = dev_get_drvdata(dev); | |
| 657 | + struct logic_pio_hwaddr *range = lpcdev->io_host; | |
| 658 | + | |
| 659 | + if (acpi_device) | |
| 660 | + hisi_lpc_acpi_remove(dev); | |
| 661 | + else | |
| 662 | + of_platform_depopulate(dev); | |
| 663 | + | |
| 664 | + logic_pio_unregister_range(range); | |
| 665 | + | |
| 666 | + return 0; | |
| 667 | +} | |
| 668 | + | |
| 635 | 669 | static const struct of_device_id hisi_lpc_of_match[] = { |
| 636 | 670 | { .compatible = "hisilicon,hip06-lpc", }, |
| 637 | 671 | { .compatible = "hisilicon,hip07-lpc", }, |
| @@ -645,5 +679,6 @@ static struct platform_driver hisi_lpc_driver = { · 7 unmodified lines | ||
| 645 | 679 | .acpi_match_table = ACPI_PTR(hisi_lpc_acpi_match), |
| 646 | 680 | }, |
| 647 | 681 | .probe = hisi_lpc_probe, |
| 682 | + .remove = hisi_lpc_remove, | |
| 648 | 683 | }; |
| 649 | 684 | builtin_platform_driver(hisi_lpc_driver); |
| @@ -949,7 +949,7 @@ static int sysc_best_idle_mode(u32 idlemodes, u32 *best_mode) · 948 unmodified lines | ||
| 949 | 949 | *best_mode = SYSC_IDLE_SMART_WKUP; |
| 950 | 950 | else if (idlemodes & BIT(SYSC_IDLE_SMART)) |
| 951 | 951 | *best_mode = SYSC_IDLE_SMART; |
| 952 | − else if (idlemodes & SYSC_IDLE_FORCE) | |
| 952 | + else if (idlemodes & BIT(SYSC_IDLE_FORCE)) | |
| 953 | 953 | *best_mode = SYSC_IDLE_FORCE; |
| 954 | 954 | else |
| 955 | 955 | return -EINVAL; |
| @@ -1267,7 +1267,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { · 311 unmodified lines | ||
| 1267 | 1267 | SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0), |
| 1268 | 1268 | SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902, |
| 1269 | 1269 | 0xffff00f0, 0), |
| 1270 | − SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0), | |
| 1270 | + SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0xa3170504, 0xffffffff, 0), | |
| 1271 | + SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0), | |
| 1271 | 1272 | SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0), |
| 1272 | 1273 | SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0), |
| 1273 | 1274 | SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0), |
| @@ -1692,10 +1693,7 @@ static int sysc_init_sysc_mask(struct sysc *ddata) · 418 unmodified lines | ||
| 1692 | 1693 | if (error) |
| 1693 | 1694 | return 0; |
| 1694 | 1695 | |
| 1695 | − if (val) | |
| 1696 | − ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; | |
| 1697 | − else | |
| 1698 | − ddata->cfg.sysc_val = ddata->cap->sysc_mask; | |
| 1696 | + ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; | |
| 1699 | 1697 | |
| 1700 | 1698 | return 0; |
| 1701 | 1699 | } |
| @@ -2385,27 +2383,27 @@ static int sysc_probe(struct platform_device *pdev) · 683 unmodified lines | ||
| 2385 | 2383 | |
| 2386 | 2384 | error = sysc_init_dts_quirks(ddata); |
| 2387 | 2385 | if (error) |
| 2388 | − goto unprepare; | |
| 2386 | + return error; | |
| 2389 | 2387 | |
| 2390 | 2388 | error = sysc_map_and_check_registers(ddata); |
| 2391 | 2389 | if (error) |
| 2392 | − goto unprepare; | |
| 2390 | + return error; | |
| 2393 | 2391 | |
| 2394 | 2392 | error = sysc_init_sysc_mask(ddata); |
| 2395 | 2393 | if (error) |
| 2396 | − goto unprepare; | |
| 2394 | + return error; | |
| 2397 | 2395 | |
| 2398 | 2396 | error = sysc_init_idlemodes(ddata); |
| 2399 | 2397 | if (error) |
| 2400 | − goto unprepare; | |
| 2398 | + return error; | |
| 2401 | 2399 | |
| 2402 | 2400 | error = sysc_init_syss_mask(ddata); |
| 2403 | 2401 | if (error) |
| 2404 | − goto unprepare; | |
| 2402 | + return error; | |
| 2405 | 2403 | |
| 2406 | 2404 | error = sysc_init_pdata(ddata); |
| 2407 | 2405 | if (error) |
| 2408 | − goto unprepare; | |
| 2406 | + return error; | |
| 2409 | 2407 | |
| 2410 | 2408 | sysc_init_early_quirks(ddata); |
| 2411 | 2409 | |
| @@ -2415,7 +2413,7 @@ static int sysc_probe(struct platform_device *pdev) · 3 unmodified lines | ||
| 2415 | 2413 | |
| 2416 | 2414 | error = sysc_init_resets(ddata); |
| 2417 | 2415 | if (error) |
| 2418 | − return error; | |
| 2416 | + goto unprepare; | |
| 2419 | 2417 | |
| 2420 | 2418 | error = sysc_init_module(ddata); |
| 2421 | 2419 | if (error) |
| @@ -567,8 +567,7 @@ static inline unsigned long hpet_time_div(struct hpets *hpets, · 566 unmodified lines | ||
| 567 | 567 | unsigned long long m; |
| 568 | 568 | |
| 569 | 569 | m = hpets->hp_tick_freq + (dis >> 1); |
| 570 | − do_div(m, dis); | |
| 571 | − return (unsigned long)m; | |
| 570 | + return div64_ul(m, dis); | |
| 572 | 571 | } |
| 573 | 572 | |
| 574 | 573 | static int |
| @@ -76,7 +76,7 @@ static ssize_t ipmb_read(struct file *file, char __user *buf, size_t count, · 75 unmodified lines | ||
| 76 | 76 | struct ipmb_dev *ipmb_dev = to_ipmb_dev(file); |
| 77 | 77 | struct ipmb_request_elem *queue_elem; |
| 78 | 78 | struct ipmb_msg msg; |
| 79 | − ssize_t ret; | |
| 79 | + ssize_t ret = 0; | |
| 80 | 80 | |
| 81 | 81 | memset(&msg, 0, sizeof(msg)); |
| 82 | 82 | |
| @@ -737,7 +737,7 @@ static int pp_release(struct inode *inode, struct file *file) · 736 unmodified lines | ||
| 737 | 737 | "negotiated back to compatibility mode because user-space forgot\n"); |
| 738 | 738 | } |
| 739 | 739 | |
| 740 | − if (pp->flags & PP_CLAIMED) { | |
| 740 | + if ((pp->flags & PP_CLAIMED) && pp->pdev) { | |
| 741 | 741 | struct ieee1284_info *info; |
| 742 | 742 | |
| 743 | 743 | info = &pp->pdev->port->ieee1284; |
| @@ -77,6 +77,18 @@ static int tpm_go_idle(struct tpm_chip *chip) · 76 unmodified lines | ||
| 77 | 77 | return chip->ops->go_idle(chip); |
| 78 | 78 | } |
| 79 | 79 | |
| 80 | +static void tpm_clk_enable(struct tpm_chip *chip) | |
| 81 | +{ | |
| 82 | + if (chip->ops->clk_enable) | |
| 83 | + chip->ops->clk_enable(chip, true); | |
| 84 | +} | |
| 85 | + | |
| 86 | +static void tpm_clk_disable(struct tpm_chip *chip) | |
| 87 | +{ | |
| 88 | + if (chip->ops->clk_enable) | |
| 89 | + chip->ops->clk_enable(chip, false); | |
| 90 | +} | |
| 91 | + | |
| 80 | 92 | /** |
| 81 | 93 | * tpm_chip_start() - power on the TPM |
| 82 | 94 | * @chip: a TPM chip to use |
| @@ -89,13 +101,12 @@ int tpm_chip_start(struct tpm_chip *chip) · 6 unmodified lines | ||
| 89 | 101 | { |
| 90 | 102 | int ret; |
| 91 | 103 | |
| 92 | − if (chip->ops->clk_enable) | |
| 93 | − chip->ops->clk_enable(chip, true); | |
| 104 | + tpm_clk_enable(chip); | |
| 94 | 105 | |
| 95 | 106 | if (chip->locality == -1) { |
| 96 | 107 | ret = tpm_request_locality(chip); |
| 97 | 108 | if (ret) { |
| 98 | − chip->ops->clk_enable(chip, false); | |
| 109 | + tpm_clk_disable(chip); | |
| 99 | 110 | return ret; |
| 100 | 111 | } |
| 101 | 112 | } |
| @@ -103,8 +114,7 @@ int tpm_chip_start(struct tpm_chip *chip) · 1 unmodified line | ||
| 103 | 114 | ret = tpm_cmd_ready(chip); |
| 104 | 115 | if (ret) { |
| 105 | 116 | tpm_relinquish_locality(chip); |
| 106 | − if (chip->ops->clk_enable) | |
| 107 | − chip->ops->clk_enable(chip, false); | |
| 117 | + tpm_clk_disable(chip); | |
| 108 | 118 | return ret; |
| 109 | 119 | } |
| 110 | 120 | |
| @@ -124,8 +134,7 @@ void tpm_chip_stop(struct tpm_chip *chip) · 13 unmodified lines | ||
| 124 | 134 | { |
| 125 | 135 | tpm_go_idle(chip); |
| 126 | 136 | tpm_relinquish_locality(chip); |
| 127 | − if (chip->ops->clk_enable) | |
| 128 | − chip->ops->clk_enable(chip, false); | |
| 137 | + tpm_clk_disable(chip); | |
| 129 | 138 | } |
| 130 | 139 | EXPORT_SYMBOL_GPL(tpm_chip_stop); |
| 131 | 140 | |
| @@ -545,6 +554,20 @@ static int tpm_add_hwrng(struct tpm_chip *chip) · 413 unmodified lines | ||
| 545 | 554 | return hwrng_register(&chip->hwrng); |
| 546 | 555 | } |
| 547 | 556 | |
| 557 | +static int tpm_get_pcr_allocation(struct tpm_chip *chip) | |
| 558 | +{ | |
| 559 | + int rc; | |
| 560 | + | |
| 561 | + rc = (chip->flags & TPM_CHIP_FLAG_TPM2) ? | |
| 562 | + tpm2_get_pcr_allocation(chip) : | |
| 563 | + tpm1_get_pcr_allocation(chip); | |
| 564 | + | |
| 565 | + if (rc > 0) | |
| 566 | + return -ENODEV; | |
| 567 | + | |
| 568 | + return rc; | |
| 569 | +} | |
| 570 | + | |
| 548 | 571 | /* |
| 549 | 572 | * tpm_chip_register() - create a character device for the TPM chip |
| 550 | 573 | * @chip: TPM chip to use. |
| @@ -564,6 +587,12 @@ int tpm_chip_register(struct tpm_chip *chip) · 13 unmodified lines | ||
| 564 | 587 | if (rc) |
| 565 | 588 | return rc; |
| 566 | 589 | rc = tpm_auto_startup(chip); |
| 590 | + if (rc) { | |
| 591 | + tpm_chip_stop(chip); | |
| 592 | + return rc; | |
| 593 | + } | |
| 594 | + | |
| 595 | + rc = tpm_get_pcr_allocation(chip); | |
| 567 | 596 | tpm_chip_stop(chip); |
| 568 | 597 | if (rc) |
| 569 | 598 | return rc; |
| @@ -394,6 +394,7 @@ int tpm1_pcr_read(struct tpm_chip *chip, u32 pcr_idx, u8 *res_buf); · 393 unmodified lines | ||
| 394 | 394 | ssize_t tpm1_getcap(struct tpm_chip *chip, u32 subcap_id, cap_t *cap, |
| 395 | 395 | const char *desc, size_t min_cap_length); |
| 396 | 396 | int tpm1_get_random(struct tpm_chip *chip, u8 *out, size_t max); |
| 397 | +int tpm1_get_pcr_allocation(struct tpm_chip *chip); | |
| 397 | 398 | unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal); |
| 398 | 399 | int tpm_pm_suspend(struct device *dev); |
| 399 | 400 | int tpm_pm_resume(struct device *dev); |
| @@ -449,6 +450,7 @@ int tpm2_unseal_trusted(struct tpm_chip *chip, · 49 unmodified lines | ||
| 449 | 450 | ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id, |
| 450 | 451 | u32 *value, const char *desc); |
| 451 | 452 | |
| 453 | +ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip); | |
| 452 | 454 | int tpm2_auto_startup(struct tpm_chip *chip); |
| 453 | 455 | void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type); |
| 454 | 456 | unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal); |
| @@ -699,18 +699,6 @@ int tpm1_auto_startup(struct tpm_chip *chip) · 698 unmodified lines | ||
| 699 | 699 | goto out; |
| 700 | 700 | } |
| 701 | 701 | |
| 702 | − chip->allocated_banks = kcalloc(1, sizeof(*chip->allocated_banks), | |
| 703 | − GFP_KERNEL); | |
| 704 | − if (!chip->allocated_banks) { | |
| 705 | − rc = -ENOMEM; | |
| 706 | − goto out; | |
| 707 | − } | |
| 708 | − | |
| 709 | − chip->allocated_banks[0].alg_id = TPM_ALG_SHA1; | |
| 710 | − chip->allocated_banks[0].digest_size = hash_digest_size[HASH_ALGO_SHA1]; | |
| 711 | − chip->allocated_banks[0].crypto_id = HASH_ALGO_SHA1; | |
| 712 | − chip->nr_allocated_banks = 1; | |
| 713 | − | |
| 714 | 702 | return rc; |
| 715 | 703 | out: |
| 716 | 704 | if (rc > 0) |
| @@ -779,3 +767,27 @@ int tpm1_pm_suspend(struct tpm_chip *chip, u32 tpm_suspend_pcr) · 62 unmodified lines | ||
| 779 | 767 | return rc; |
| 780 | 768 | } |
| 781 | 769 | |
| 770 | +/** | |
| 771 | + * tpm1_get_pcr_allocation() - initialize the allocated bank | |
| 772 | + * @chip: TPM chip to use. | |
| 773 | + * | |
| 774 | + * The function initializes the SHA1 allocated bank to extend PCR | |
| 775 | + * | |
| 776 | + * Return: | |
| 777 | + * * 0 on success, | |
| 778 | + * * < 0 on error. | |
| 779 | + */ | |
| 780 | +int tpm1_get_pcr_allocation(struct tpm_chip *chip) | |
| 781 | +{ | |
| 782 | + chip->allocated_banks = kcalloc(1, sizeof(*chip->allocated_banks), | |
| 783 | + GFP_KERNEL); | |
| 784 | + if (!chip->allocated_banks) | |
| 785 | + return -ENOMEM; | |
| 786 | + | |
| 787 | + chip->allocated_banks[0].alg_id = TPM_ALG_SHA1; | |
| 788 | + chip->allocated_banks[0].digest_size = hash_digest_size[HASH_ALGO_SHA1]; | |
| 789 | + chip->allocated_banks[0].crypto_id = HASH_ALGO_SHA1; | |
| 790 | + chip->nr_allocated_banks = 1; | |
| 791 | + | |
| 792 | + return 0; | |
| 793 | +} | |
| @@ -840,7 +840,7 @@ struct tpm2_pcr_selection { · 839 unmodified lines | ||
| 840 | 840 | u8 pcr_select[3]; |
| 841 | 841 | } __packed; |
| 842 | 842 | |
| 843 | −static ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip) | |
| 843 | +ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip) | |
| 844 | 844 | { |
| 845 | 845 | struct tpm2_pcr_selection pcr_selection; |
| 846 | 846 | struct tpm_buf buf; |
| @@ -1040,10 +1040,6 @@ int tpm2_auto_startup(struct tpm_chip *chip) · 193 unmodified lines | ||
| 1040 | 1040 | goto out; |
| 1041 | 1041 | } |
| 1042 | 1042 | |
| 1043 | − rc = tpm2_get_pcr_allocation(chip); | |
| 1044 | − if (rc) | |
| 1045 | − goto out; | |
| 1046 | − | |
| 1047 | 1043 | rc = tpm2_get_cc_attrs_tbl(chip); |
| 1048 | 1044 | |
| 1049 | 1045 | out: |
| @@ -141,6 +141,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw, · 140 unmodified lines | ||
| 141 | 141 | continue; |
| 142 | 142 | |
| 143 | 143 | div = DIV_ROUND_CLOSEST(parent_rate, req->rate); |
| 144 | + if (div > GENERATED_MAX_DIV + 1) | |
| 145 | + div = GENERATED_MAX_DIV + 1; | |
| 144 | 146 | |
| 145 | 147 | clk_generated_best_diff(req, parent, parent_rate, div, |
| 146 | 148 | &best_diff, &best_rate); |
| @@ -324,6 +324,25 @@ static struct clk_core *clk_core_lookup(const char *name) · 323 unmodified lines | ||
| 324 | 324 | return NULL; |
| 325 | 325 | } |
| 326 | 326 | |
| 327 | +#ifdef CONFIG_OF | |
| 328 | +static int of_parse_clkspec(const struct device_node *np, int index, | |
| 329 | + const char *name, struct of_phandle_args *out_args); | |
| 330 | +static struct clk_hw * | |
| 331 | +of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec); | |
| 332 | +#else | |
| 333 | +static inline int of_parse_clkspec(const struct device_node *np, int index, | |
| 334 | + const char *name, | |
| 335 | + struct of_phandle_args *out_args) | |
| 336 | +{ | |
| 337 | + return -ENOENT; | |
| 338 | +} | |
| 339 | +static inline struct clk_hw * | |
| 340 | +of_clk_get_hw_from_clkspec(struct of_phandle_args *clkspec) | |
| 341 | +{ | |
| 342 | + return ERR_PTR(-ENOENT); | |
| 343 | +} | |
| 344 | +#endif | |
| 345 | + | |
| 327 | 346 | /** |
| 328 | 347 | * clk_core_get - Find the clk_core parent of a clk |
| 329 | 348 | * @core: clk to find parent of |
| @@ -355,8 +374,9 @@ static struct clk_core *clk_core_lookup(const char *name) · 25 unmodified lines | ||
| 355 | 374 | * }; |
| 356 | 375 | * |
| 357 | 376 | * Returns: -ENOENT when the provider can't be found or the clk doesn't |
| 358 | − * exist in the provider. -EINVAL when the name can't be found. NULL when the | |
| 359 | − * provider knows about the clk but it isn't provided on this system. | |
| 377 | + * exist in the provider or the name can't be found in the DT node or | |
| 378 | + * in a clkdev lookup. NULL when the provider knows about the clk but it | |
| 379 | + * isn't provided on this system. | |
| 360 | 380 | * A valid clk_core pointer when the clk can be found in the provider. |
| 361 | 381 | */ |
| 362 | 382 | static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) |
| @@ -367,17 +387,19 @@ static struct clk_core *clk_core_get(struct clk_core *core, u8 p_index) · 4 unmodified lines | ||
| 367 | 387 | struct device *dev = core->dev; |
| 368 | 388 | const char *dev_id = dev ? dev_name(dev) : NULL; |
| 369 | 389 | struct device_node *np = core->of_node; |
| 390 | + struct of_phandle_args clkspec; | |
| 370 | 391 | |
| 371 | − if (np && (name || index >= 0)) | |
| 372 | − hw = of_clk_get_hw(np, index, name); | |
| 373 | − | |
| 374 | − /* | |
| 375 | − * If the DT search above couldn't find the provider or the provider | |
| 376 | − * didn't know about this clk, fallback to looking up via clkdev based | |
| 377 | − * clk_lookups | |
| 378 | − */ | |
| 379 | − if (PTR_ERR(hw) == -ENOENT && name) | |
| 392 | + if (np && (name || index >= 0) && | |
| 393 | + !of_parse_clkspec(np, index, name, &clkspec)) { | |
| 394 | + hw = of_clk_get_hw_from_clkspec(&clkspec); | |
| 395 | + of_node_put(clkspec.np); | |
| 396 | + } else if (name) { | |
| 397 | + /* | |
| 398 | + * If the DT search above couldn't find the provider fallback to | |
| 399 | + * looking up via clkdev based clk_lookups. | |
| 400 | + */ | |
| 380 | 401 | hw = clk_find_hw(dev_id, name); |
| 402 | + } | |
| 381 | 403 | |
| 382 | 404 | if (IS_ERR(hw)) |
| 383 | 405 | return ERR_CAST(hw); |
| @@ -401,7 +423,7 @@ static void clk_core_fill_parent_index(struct clk_core *core, u8 index) · 17 unmodified lines | ||
| 401 | 423 | parent = ERR_PTR(-EPROBE_DEFER); |
| 402 | 424 | } else { |
| 403 | 425 | parent = clk_core_get(core, index); |
| 404 | − if (IS_ERR(parent) && PTR_ERR(parent) == -ENOENT) | |
| 426 | + if (IS_ERR(parent) && PTR_ERR(parent) == -ENOENT && entry->name) | |
| 405 | 427 | parent = clk_core_lookup(entry->name); |
| 406 | 428 | } |
| 407 | 429 | |
| @@ -1632,7 +1654,8 @@ static int clk_fetch_parent_index(struct clk_core *core, · 1224 unmodified lines | ||
| 1632 | 1654 | break; |
| 1633 | 1655 | |
| 1634 | 1656 | /* Fallback to comparing globally unique names */ |
| 1635 | − if (!strcmp(parent->name, core->parents[i].name)) | |
| 1657 | + if (core->parents[i].name && | |
| 1658 | + !strcmp(parent->name, core->parents[i].name)) | |
| 1636 | 1659 | break; |
| 1637 | 1660 | } |
| 1638 | 1661 | |
| @@ -25,9 +25,11 @@ static const struct mtk_fixed_clk top_fixed_clks[] = { · 24 unmodified lines | ||
| 25 | 25 | FIXED_CLK(CLK_TOP_UNIVP_192M, "univpll_192m", "univpll", 192000000), |
| 26 | 26 | }; |
| 27 | 27 | |
| 28 | +static const struct mtk_fixed_factor top_early_divs[] = { | |
| 29 | + FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, 2), | |
| 30 | +}; | |
| 31 | + | |
| 28 | 32 | static const struct mtk_fixed_factor top_divs[] = { |
| 29 | − FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, | |
| 30 | − 2), | |
| 31 | 33 | FACTOR(CLK_TOP_F26M_CK_D2, "csw_f26m_ck_d2", "clk26m", 1, |
| 32 | 34 | 2), |
| 33 | 35 | FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1, |
| @@ -1148,37 +1150,57 @@ static int clk_mt8183_apmixed_probe(struct platform_device *pdev) · 1114 unmodified lines | ||
| 1148 | 1150 | return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); |
| 1149 | 1151 | } |
| 1150 | 1152 | |
| 1153 | +static struct clk_onecell_data *top_clk_data; | |
| 1154 | + | |
| 1155 | +static void clk_mt8183_top_init_early(struct device_node *node) | |
| 1156 | +{ | |
| 1157 | + int i; | |
| 1158 | + | |
| 1159 | + top_clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); | |
| 1160 | + | |
| 1161 | + for (i = 0; i < CLK_TOP_NR_CLK; i++) | |
| 1162 | + top_clk_data->clks[i] = ERR_PTR(-EPROBE_DEFER); | |
| 1163 | + | |
| 1164 | + mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs), | |
| 1165 | + top_clk_data); | |
| 1166 | + | |
| 1167 | + of_clk_add_provider(node, of_clk_src_onecell_get, top_clk_data); | |
| 1168 | +} | |
| 1169 | + | |
| 1170 | +CLK_OF_DECLARE_DRIVER(mt8183_topckgen, "mediatek,mt8183-topckgen", | |
| 1171 | + clk_mt8183_top_init_early); | |
| 1172 | + | |
| 1151 | 1173 | static int clk_mt8183_top_probe(struct platform_device *pdev) |
| 1152 | 1174 | { |
| 1153 | 1175 | struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1154 | 1176 | void __iomem *base; |
| 1155 | − struct clk_onecell_data *clk_data; | |
| 1156 | 1177 | struct device_node *node = pdev->dev.of_node; |
| 1157 | 1178 | |
| 1158 | 1179 | base = devm_ioremap_resource(&pdev->dev, res); |
| 1159 | 1180 | if (IS_ERR(base)) |
| 1160 | 1181 | return PTR_ERR(base); |
| 1161 | 1182 | |
| 1162 | − clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK); | |
| 1163 | − | |
| 1164 | 1183 | mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks), |
| 1165 | − clk_data); | |
| 1184 | + top_clk_data); | |
| 1185 | + | |
| 1186 | + mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs), | |
| 1187 | + top_clk_data); | |
| 1166 | 1188 | |
| 1167 | − mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data); | |
| 1189 | + mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data); | |
| 1168 | 1190 | |
| 1169 | 1191 | mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes), |
| 1170 | − node, &mt8183_clk_lock, clk_data); | |
| 1192 | + node, &mt8183_clk_lock, top_clk_data); | |
| 1171 | 1193 | |
| 1172 | 1194 | mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes), |
| 1173 | − base, &mt8183_clk_lock, clk_data); | |
| 1195 | + base, &mt8183_clk_lock, top_clk_data); | |
| 1174 | 1196 | |
| 1175 | 1197 | mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs), |
| 1176 | − base, &mt8183_clk_lock, clk_data); | |
| 1198 | + base, &mt8183_clk_lock, top_clk_data); | |
| 1177 | 1199 | |
| 1178 | 1200 | mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks), |
| 1179 | − clk_data); | |
| 1201 | + top_clk_data); | |
| 1180 | 1202 | |
| 1181 | − return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); | |
| 1203 | + return of_clk_add_provider(node, of_clk_src_onecell_get, top_clk_data); | |
| 1182 | 1204 | } |
| 1183 | 1205 | |
| 1184 | 1206 | static int clk_mt8183_infra_probe(struct platform_device *pdev) |
| @@ -572,17 +572,11 @@ static int cpg_mssr_reset(struct reset_controller_dev *rcdev, · 571 unmodified lines | ||
| 572 | 572 | unsigned int reg = id / 32; |
| 573 | 573 | unsigned int bit = id % 32; |
| 574 | 574 | u32 bitmask = BIT(bit); |
| 575 | − unsigned long flags; | |
| 576 | − u32 value; | |
| 577 | 575 | |
| 578 | 576 | dev_dbg(priv->dev, "reset %u%02u\n", reg, bit); |
| 579 | 577 | |
| 580 | 578 | /* Reset module */ |
| 581 | − spin_lock_irqsave(&priv->rmw_lock, flags); | |
| 582 | − value = readl(priv->base + SRCR(reg)); | |
| 583 | − value |= bitmask; | |
| 584 | − writel(value, priv->base + SRCR(reg)); | |
| 585 | − spin_unlock_irqrestore(&priv->rmw_lock, flags); | |
| 579 | + writel(bitmask, priv->base + SRCR(reg)); | |
| 586 | 580 | |
| 587 | 581 | /* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */ |
| 588 | 582 | udelay(35); |
| @@ -599,16 +593,10 @@ static int cpg_mssr_assert(struct reset_controller_dev *rcdev, unsigned long id) · 10 unmodified lines | ||
| 599 | 593 | unsigned int reg = id / 32; |
| 600 | 594 | unsigned int bit = id % 32; |
| 601 | 595 | u32 bitmask = BIT(bit); |
| 602 | − unsigned long flags; | |
| 603 | − u32 value; | |
| 604 | 596 | |
| 605 | 597 | dev_dbg(priv->dev, "assert %u%02u\n", reg, bit); |
| 606 | 598 | |
| 607 | − spin_lock_irqsave(&priv->rmw_lock, flags); | |
| 608 | − value = readl(priv->base + SRCR(reg)); | |
| 609 | − value |= bitmask; | |
| 610 | − writel(value, priv->base + SRCR(reg)); | |
| 611 | − spin_unlock_irqrestore(&priv->rmw_lock, flags); | |
| 599 | + writel(bitmask, priv->base + SRCR(reg)); | |
| 612 | 600 | return 0; |
| 613 | 601 | } |
| 614 | 602 | |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include "clk-exynos5-subcmu.h" |
| 15 | 15 | |
| 16 | 16 | static struct samsung_clk_provider *ctx; |
| 17 | −static const struct exynos5_subcmu_info *cmu; | |
| 17 | +static const struct exynos5_subcmu_info **cmu; | |
| 18 | 18 | static int nr_cmus; |
| 19 | 19 | |
| 20 | 20 | static void exynos5_subcmu_clk_save(void __iomem *base, |
| @@ -56,17 +56,17 @@ static void exynos5_subcmu_defer_gate(struct samsung_clk_provider *ctx, · 35 unmodified lines | ||
| 56 | 56 | * when OF-core populates all device-tree nodes. |
| 57 | 57 | */ |
| 58 | 58 | void exynos5_subcmus_init(struct samsung_clk_provider *_ctx, int _nr_cmus, |
| 59 | − const struct exynos5_subcmu_info *_cmu) | |
| 59 | + const struct exynos5_subcmu_info **_cmu) | |
| 60 | 60 | { |
| 61 | 61 | ctx = _ctx; |
| 62 | 62 | cmu = _cmu; |
| 63 | 63 | nr_cmus = _nr_cmus; |
| 64 | 64 | |
| 65 | 65 | for (; _nr_cmus--; _cmu++) { |
| 66 | − exynos5_subcmu_defer_gate(ctx, _cmu->gate_clks, | |
| 67 | − _cmu->nr_gate_clks); | |
| 68 | − exynos5_subcmu_clk_save(ctx->reg_base, _cmu->suspend_regs, | |
| 69 | − _cmu->nr_suspend_regs); | |
| 66 | + exynos5_subcmu_defer_gate(ctx, (*_cmu)->gate_clks, | |
| 67 | + (*_cmu)->nr_gate_clks); | |
| 68 | + exynos5_subcmu_clk_save(ctx->reg_base, (*_cmu)->suspend_regs, | |
| 69 | + (*_cmu)->nr_suspend_regs); | |
| 70 | 70 | } |
| 71 | 71 | } |
| 72 | 72 | |
| @@ -163,9 +163,9 @@ static int __init exynos5_clk_probe(struct platform_device *pdev) · 90 unmodified lines | ||
| 163 | 163 | if (of_property_read_string(np, "label", &name) < 0) |
| 164 | 164 | continue; |
| 165 | 165 | for (i = 0; i < nr_cmus; i++) |
| 166 | − if (strcmp(cmu[i].pd_name, name) == 0) | |
| 166 | + if (strcmp(cmu[i]->pd_name, name) == 0) | |
| 167 | 167 | exynos5_clk_register_subcmu(&pdev->dev, |
| 168 | − &cmu[i], np); | |
| 168 | + cmu[i], np); | |
| 169 | 169 | } |
| 170 | 170 | return 0; |
| 171 | 171 | } |
| @@ -21,6 +21,6 @@ struct exynos5_subcmu_info { · 20 unmodified lines | ||
| 21 | 21 | }; |
| 22 | 22 | |
| 23 | 23 | void exynos5_subcmus_init(struct samsung_clk_provider *ctx, int nr_cmus, |
| 24 | − const struct exynos5_subcmu_info *cmu); | |
| 24 | + const struct exynos5_subcmu_info **cmu); | |
| 25 | 25 | |
| 26 | 26 | #endif |
| @@ -681,6 +681,10 @@ static const struct exynos5_subcmu_info exynos5250_disp_subcmu = { · 680 unmodified lines | ||
| 681 | 681 | .pd_name = "DISP1", |
| 682 | 682 | }; |
| 683 | 683 | |
| 684 | +static const struct exynos5_subcmu_info *exynos5250_subcmus[] = { | |
| 685 | + &exynos5250_disp_subcmu, | |
| 686 | +}; | |
| 687 | + | |
| 684 | 688 | static const struct samsung_pll_rate_table vpll_24mhz_tbl[] __initconst = { |
| 685 | 689 | /* sorted in descending order */ |
| 686 | 690 | /* PLL_36XX_RATE(rate, m, p, s, k) */ |
| @@ -843,7 +847,8 @@ static void __init exynos5250_clk_init(struct device_node *np) · 156 unmodified lines | ||
| 843 | 847 | |
| 844 | 848 | samsung_clk_sleep_init(reg_base, exynos5250_clk_regs, |
| 845 | 849 | ARRAY_SIZE(exynos5250_clk_regs)); |
| 846 | − exynos5_subcmus_init(ctx, 1, &exynos5250_disp_subcmu); | |
| 850 | + exynos5_subcmus_init(ctx, ARRAY_SIZE(exynos5250_subcmus), | |
| 851 | + exynos5250_subcmus); | |
| 847 | 852 | |
| 848 | 853 | samsung_clk_of_add_provider(np, ctx); |
| 849 | 854 | |
| @@ -534,8 +534,6 @@ static const struct samsung_gate_clock exynos5800_gate_clks[] __initconst = { · 533 unmodified lines | ||
| 534 | 534 | GATE_BUS_TOP, 24, 0, 0), |
| 535 | 535 | GATE(CLK_ACLK432_SCALER, "aclk432_scaler", "mout_user_aclk432_scaler", |
| 536 | 536 | GATE_BUS_TOP, 27, CLK_IS_CRITICAL, 0), |
| 537 | − GATE(CLK_MAU_EPLL, "mau_epll", "mout_user_mau_epll", | |
| 538 | − SRC_MASK_TOP7, 20, CLK_SET_RATE_PARENT, 0), | |
| 539 | 537 | }; |
| 540 | 538 | |
| 541 | 539 | static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = { |
| @@ -577,8 +575,13 @@ static const struct samsung_div_clock exynos5420_div_clks[] __initconst = { · 35 unmodified lines | ||
| 577 | 575 | |
| 578 | 576 | static const struct samsung_gate_clock exynos5420_gate_clks[] __initconst = { |
| 579 | 577 | GATE(CLK_SECKEY, "seckey", "aclk66_psgen", GATE_BUS_PERIS1, 1, 0, 0), |
| 578 | + /* Maudio Block */ | |
| 580 | 579 | GATE(CLK_MAU_EPLL, "mau_epll", "mout_mau_epll_clk", |
| 581 | 580 | SRC_MASK_TOP7, 20, CLK_SET_RATE_PARENT, 0), |
| 581 | + GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", | |
| 582 | + GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), | |
| 583 | + GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", | |
| 584 | + GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), | |
| 582 | 585 | }; |
| 583 | 586 | |
| 584 | 587 | static const struct samsung_mux_clock exynos5x_mux_clks[] __initconst = { |
| @@ -890,9 +893,6 @@ static const struct samsung_div_clock exynos5x_div_clks[] __initconst = { · 305 unmodified lines | ||
| 890 | 893 | /* GSCL Block */ |
| 891 | 894 | DIV(0, "dout_gscl_blk_333", "aclk333_432_gscl", DIV2_RATIO0, 6, 2), |
| 892 | 895 | |
| 893 | − /* MSCL Block */ | |
| 894 | − DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), | |
| 895 | − | |
| 896 | 896 | /* PSGEN */ |
| 897 | 897 | DIV(0, "dout_gen_blk", "mout_user_aclk266", DIV2_RATIO0, 8, 1), |
| 898 | 898 | DIV(0, "dout_jpg_blk", "aclk166", DIV2_RATIO0, 20, 1), |
| @@ -1017,12 +1017,6 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { · 118 unmodified lines | ||
| 1017 | 1017 | GATE(CLK_SCLK_DP1, "sclk_dp1", "dout_dp1", |
| 1018 | 1018 | GATE_TOP_SCLK_DISP1, 20, CLK_SET_RATE_PARENT, 0), |
| 1019 | 1019 | |
| 1020 | − /* Maudio Block */ | |
| 1021 | − GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", | |
| 1022 | − GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), | |
| 1023 | − GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", | |
| 1024 | − GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), | |
| 1025 | − | |
| 1026 | 1020 | /* FSYS Block */ |
| 1027 | 1021 | GATE(CLK_TSI, "tsi", "aclk200_fsys", GATE_BUS_FSYS0, 0, 0, 0), |
| 1028 | 1022 | GATE(CLK_PDMA0, "pdma0", "aclk200_fsys", GATE_BUS_FSYS0, 1, 0, 0), |
| @@ -1162,17 +1156,6 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = { · 133 unmodified lines | ||
| 1162 | 1156 | GATE(CLK_FIMC_LITE3, "fimc_lite3", "aclk333_432_gscl", |
| 1163 | 1157 | GATE_IP_GSCL1, 17, 0, 0), |
| 1164 | 1158 | |
| 1165 | − /* MSCL Block */ | |
| 1166 | − GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), | |
| 1167 | − GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), | |
| 1168 | − GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), | |
| 1169 | − GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", | |
| 1170 | − GATE_IP_MSCL, 8, 0, 0), | |
| 1171 | − GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", | |
| 1172 | − GATE_IP_MSCL, 9, 0, 0), | |
| 1173 | − GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", | |
| 1174 | − GATE_IP_MSCL, 10, 0, 0), | |
| 1175 | − | |
| 1176 | 1159 | /* ISP */ |
| 1177 | 1160 | GATE(CLK_SCLK_UART_ISP, "sclk_uart_isp", "dout_uart_isp", |
| 1178 | 1161 | GATE_TOP_SCLK_ISP, 0, CLK_SET_RATE_PARENT, 0), |
| @@ -1281,32 +1264,103 @@ static struct exynos5_subcmu_reg_dump exynos5x_mfc_suspend_regs[] = { · 102 unmodified lines | ||
| 1281 | 1264 | { DIV4_RATIO, 0, 0x3 }, /* DIV dout_mfc_blk */ |
| 1282 | 1265 | }; |
| 1283 | 1266 | |
| 1284 | −static const struct exynos5_subcmu_info exynos5x_subcmus[] = { | |
| 1285 | − { | |
| 1286 | − .div_clks = exynos5x_disp_div_clks, | |
| 1287 | − .nr_div_clks = ARRAY_SIZE(exynos5x_disp_div_clks), | |
| 1288 | − .gate_clks = exynos5x_disp_gate_clks, | |
| 1289 | − .nr_gate_clks = ARRAY_SIZE(exynos5x_disp_gate_clks), | |
| 1290 | − .suspend_regs = exynos5x_disp_suspend_regs, | |
| 1291 | − .nr_suspend_regs = ARRAY_SIZE(exynos5x_disp_suspend_regs), | |
| 1292 | − .pd_name = "DISP", | |
| 1293 | − }, { | |
| 1294 | − .div_clks = exynos5x_gsc_div_clks, | |
| 1295 | − .nr_div_clks = ARRAY_SIZE(exynos5x_gsc_div_clks), | |
| 1296 | − .gate_clks = exynos5x_gsc_gate_clks, | |
| 1297 | − .nr_gate_clks = ARRAY_SIZE(exynos5x_gsc_gate_clks), | |
| 1298 | − .suspend_regs = exynos5x_gsc_suspend_regs, | |
| 1299 | − .nr_suspend_regs = ARRAY_SIZE(exynos5x_gsc_suspend_regs), | |
| 1300 | − .pd_name = "GSC", | |
| 1301 | − }, { | |
| 1302 | − .div_clks = exynos5x_mfc_div_clks, | |
| 1303 | − .nr_div_clks = ARRAY_SIZE(exynos5x_mfc_div_clks), | |
| 1304 | − .gate_clks = exynos5x_mfc_gate_clks, | |
| 1305 | − .nr_gate_clks = ARRAY_SIZE(exynos5x_mfc_gate_clks), | |
| 1306 | − .suspend_regs = exynos5x_mfc_suspend_regs, | |
| 1307 | − .nr_suspend_regs = ARRAY_SIZE(exynos5x_mfc_suspend_regs), | |
| 1308 | − .pd_name = "MFC", | |
| 1309 | − }, | |
| 1267 | +static const struct samsung_gate_clock exynos5x_mscl_gate_clks[] __initconst = { | |
| 1268 | + /* MSCL Block */ | |
| 1269 | + GATE(CLK_MSCL0, "mscl0", "aclk400_mscl", GATE_IP_MSCL, 0, 0, 0), | |
| 1270 | + GATE(CLK_MSCL1, "mscl1", "aclk400_mscl", GATE_IP_MSCL, 1, 0, 0), | |
| 1271 | + GATE(CLK_MSCL2, "mscl2", "aclk400_mscl", GATE_IP_MSCL, 2, 0, 0), | |
| 1272 | + GATE(CLK_SMMU_MSCL0, "smmu_mscl0", "dout_mscl_blk", | |
| 1273 | + GATE_IP_MSCL, 8, 0, 0), | |
| 1274 | + GATE(CLK_SMMU_MSCL1, "smmu_mscl1", "dout_mscl_blk", | |
| 1275 | + GATE_IP_MSCL, 9, 0, 0), | |
| 1276 | + GATE(CLK_SMMU_MSCL2, "smmu_mscl2", "dout_mscl_blk", | |
| 1277 | + GATE_IP_MSCL, 10, 0, 0), | |
| 1278 | +}; | |
| 1279 | + | |
| 1280 | +static const struct samsung_div_clock exynos5x_mscl_div_clks[] __initconst = { | |
| 1281 | + DIV(0, "dout_mscl_blk", "aclk400_mscl", DIV2_RATIO0, 28, 2), | |
| 1282 | +}; | |
| 1283 | + | |
| 1284 | +static struct exynos5_subcmu_reg_dump exynos5x_mscl_suspend_regs[] = { | |
| 1285 | + { GATE_IP_MSCL, 0xffffffff, 0xffffffff }, /* MSCL gates */ | |
| 1286 | + { SRC_TOP3, 0, BIT(4) }, /* MUX mout_user_aclk400_mscl */ | |
| 1287 | + { DIV2_RATIO0, 0, 0x30000000 }, /* DIV dout_mscl_blk */ | |
| 1288 | +}; | |
| 1289 | + | |
| 1290 | +static const struct samsung_gate_clock exynos5800_mau_gate_clks[] __initconst = { | |
| 1291 | + GATE(CLK_MAU_EPLL, "mau_epll", "mout_user_mau_epll", | |
| 1292 | + SRC_MASK_TOP7, 20, CLK_SET_RATE_PARENT, 0), | |
| 1293 | + GATE(CLK_SCLK_MAUDIO0, "sclk_maudio0", "dout_maudio0", | |
| 1294 | + GATE_TOP_SCLK_MAU, 0, CLK_SET_RATE_PARENT, 0), | |
| 1295 | + GATE(CLK_SCLK_MAUPCM0, "sclk_maupcm0", "dout_maupcm0", | |
| 1296 | + GATE_TOP_SCLK_MAU, 1, CLK_SET_RATE_PARENT, 0), | |
| 1297 | +}; | |
| 1298 | + | |
| 1299 | +static struct exynos5_subcmu_reg_dump exynos5800_mau_suspend_regs[] = { | |
| 1300 | + { SRC_TOP9, 0, BIT(8) }, /* MUX mout_user_mau_epll */ | |
| 1301 | +}; | |
| 1302 | + | |
| 1303 | +static const struct exynos5_subcmu_info exynos5x_disp_subcmu = { | |
| 1304 | + .div_clks = exynos5x_disp_div_clks, | |
| 1305 | + .nr_div_clks = ARRAY_SIZE(exynos5x_disp_div_clks), | |
| 1306 | + .gate_clks = exynos5x_disp_gate_clks, | |
| 1307 | + .nr_gate_clks = ARRAY_SIZE(exynos5x_disp_gate_clks), | |
| 1308 | + .suspend_regs = exynos5x_disp_suspend_regs, | |
| 1309 | + .nr_suspend_regs = ARRAY_SIZE(exynos5x_disp_suspend_regs), | |
| 1310 | + .pd_name = "DISP", | |
| 1311 | +}; | |
| 1312 | + | |
| 1313 | +static const struct exynos5_subcmu_info exynos5x_gsc_subcmu = { | |
| 1314 | + .div_clks = exynos5x_gsc_div_clks, | |
| 1315 | + .nr_div_clks = ARRAY_SIZE(exynos5x_gsc_div_clks), | |
| 1316 | + .gate_clks = exynos5x_gsc_gate_clks, | |
| 1317 | + .nr_gate_clks = ARRAY_SIZE(exynos5x_gsc_gate_clks), | |
| 1318 | + .suspend_regs = exynos5x_gsc_suspend_regs, | |
| 1319 | + .nr_suspend_regs = ARRAY_SIZE(exynos5x_gsc_suspend_regs), | |
| 1320 | + .pd_name = "GSC", | |
| 1321 | +}; | |
| 1322 | + | |
| 1323 | +static const struct exynos5_subcmu_info exynos5x_mfc_subcmu = { | |
| 1324 | + .div_clks = exynos5x_mfc_div_clks, | |
| 1325 | + .nr_div_clks = ARRAY_SIZE(exynos5x_mfc_div_clks), | |
| 1326 | + .gate_clks = exynos5x_mfc_gate_clks, | |
| 1327 | + .nr_gate_clks = ARRAY_SIZE(exynos5x_mfc_gate_clks), | |
| 1328 | + .suspend_regs = exynos5x_mfc_suspend_regs, | |
| 1329 | + .nr_suspend_regs = ARRAY_SIZE(exynos5x_mfc_suspend_regs), | |
| 1330 | + .pd_name = "MFC", | |
| 1331 | +}; | |
| 1332 | + | |
| 1333 | +static const struct exynos5_subcmu_info exynos5x_mscl_subcmu = { | |
| 1334 | + .div_clks = exynos5x_mscl_div_clks, | |
| 1335 | + .nr_div_clks = ARRAY_SIZE(exynos5x_mscl_div_clks), | |
| 1336 | + .gate_clks = exynos5x_mscl_gate_clks, | |
| 1337 | + .nr_gate_clks = ARRAY_SIZE(exynos5x_mscl_gate_clks), | |
| 1338 | + .suspend_regs = exynos5x_mscl_suspend_regs, | |
| 1339 | + .nr_suspend_regs = ARRAY_SIZE(exynos5x_mscl_suspend_regs), | |
| 1340 | + .pd_name = "MSC", | |
| 1341 | +}; | |
| 1342 | + | |
| 1343 | +static const struct exynos5_subcmu_info exynos5800_mau_subcmu = { | |
| 1344 | + .gate_clks = exynos5800_mau_gate_clks, | |
| 1345 | + .nr_gate_clks = ARRAY_SIZE(exynos5800_mau_gate_clks), | |
| 1346 | + .suspend_regs = exynos5800_mau_suspend_regs, | |
| 1347 | + .nr_suspend_regs = ARRAY_SIZE(exynos5800_mau_suspend_regs), | |
| 1348 | + .pd_name = "MAU", | |
| 1349 | +}; | |
| 1350 | + | |
| 1351 | +static const struct exynos5_subcmu_info *exynos5x_subcmus[] = { | |
| 1352 | + &exynos5x_disp_subcmu, | |
| 1353 | + &exynos5x_gsc_subcmu, | |
| 1354 | + &exynos5x_mfc_subcmu, | |
| 1355 | + &exynos5x_mscl_subcmu, | |
| 1356 | +}; | |
| 1357 | + | |
| 1358 | +static const struct exynos5_subcmu_info *exynos5800_subcmus[] = { | |
| 1359 | + &exynos5x_disp_subcmu, | |
| 1360 | + &exynos5x_gsc_subcmu, | |
| 1361 | + &exynos5x_mfc_subcmu, | |
| 1362 | + &exynos5x_mscl_subcmu, | |
| 1363 | + &exynos5800_mau_subcmu, | |
| 1310 | 1364 | }; |
| 1311 | 1365 | |
| 1312 | 1366 | static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] __initconst = { |
| @@ -1539,11 +1593,17 @@ static void __init exynos5x_clk_init(struct device_node *np, · 226 unmodified lines | ||
| 1539 | 1593 | samsung_clk_extended_sleep_init(reg_base, |
| 1540 | 1594 | exynos5x_clk_regs, ARRAY_SIZE(exynos5x_clk_regs), |
| 1541 | 1595 | exynos5420_set_clksrc, ARRAY_SIZE(exynos5420_set_clksrc)); |
| 1542 | − if (soc == EXYNOS5800) | |
| 1596 | + | |
| 1597 | + if (soc == EXYNOS5800) { | |
| 1543 | 1598 | samsung_clk_sleep_init(reg_base, exynos5800_clk_regs, |
| 1544 | 1599 | ARRAY_SIZE(exynos5800_clk_regs)); |
| 1545 | − exynos5_subcmus_init(ctx, ARRAY_SIZE(exynos5x_subcmus), | |
| 1546 | − exynos5x_subcmus); | |
| 1600 | + | |
| 1601 | + exynos5_subcmus_init(ctx, ARRAY_SIZE(exynos5800_subcmus), | |
| 1602 | + exynos5800_subcmus); | |
| 1603 | + } else { | |
| 1604 | + exynos5_subcmus_init(ctx, ARRAY_SIZE(exynos5x_subcmus), | |
| 1605 | + exynos5x_subcmus); | |
| 1606 | + } | |
| 1547 | 1607 | |
| 1548 | 1608 | samsung_clk_of_add_provider(np, ctx); |
| 1549 | 1609 | } |
| @@ -38,7 +38,7 @@ static unsigned long clk_peri_cnt_clk_recalc_rate(struct clk_hw *hwclk, · 37 unmodified lines | ||
| 38 | 38 | if (socfpgaclk->fixed_div) { |
| 39 | 39 | div = socfpgaclk->fixed_div; |
| 40 | 40 | } else { |
| 41 | − if (!socfpgaclk->bypass_reg) | |
| 41 | + if (socfpgaclk->hw.reg) | |
| 42 | 42 | div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1); |
| 43 | 43 | } |
| 44 | 44 | |
| @@ -3,6 +3,7 @@ config SPRD_COMMON_CLK · 2 unmodified lines | ||
| 3 | 3 | tristate "Clock support for Spreadtrum SoCs" |
| 4 | 4 | depends on ARCH_SPRD || COMPILE_TEST |
| 5 | 5 | default ARCH_SPRD |
| 6 | + select REGMAP_MMIO | |
| 6 | 7 | |
| 7 | 8 | if SPRD_COMMON_CLK |
| 8 | 9 | |
| @@ -55,7 +55,7 @@ static u64 riscv_sched_clock(void) · 54 unmodified lines | ||
| 55 | 55 | return get_cycles64(); |
| 56 | 56 | } |
| 57 | 57 | |
| 58 | −static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = { | |
| 58 | +static struct clocksource riscv_clocksource = { | |
| 59 | 59 | .name = "riscv_clocksource", |
| 60 | 60 | .rating = 300, |
| 61 | 61 | .mask = CLOCKSOURCE_MASK(64), |
| @@ -92,7 +92,6 @@ void riscv_timer_interrupt(void) · 30 unmodified lines | ||
| 92 | 92 | static int __init riscv_timer_init_dt(struct device_node *n) |
| 93 | 93 | { |
| 94 | 94 | int cpuid, hartid, error; |
| 95 | − struct clocksource *cs; | |
| 96 | 95 | |
| 97 | 96 | hartid = riscv_of_processor_hartid(n); |
| 98 | 97 | if (hartid < 0) { |
| @@ -112,8 +111,7 @@ static int __init riscv_timer_init_dt(struct device_node *n) · 13 unmodified lines | ||
| 112 | 111 | |
| 113 | 112 | pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n", |
| 114 | 113 | __func__, cpuid, hartid); |
| 115 | − cs = per_cpu_ptr(&riscv_clocksource, cpuid); | |
| 116 | − error = clocksource_register_hz(cs, riscv_timebase); | |
| 114 | + error = clocksource_register_hz(&riscv_clocksource, riscv_timebase); | |
| 117 | 115 | if (error) { |
| 118 | 116 | pr_err("RISCV timer register failed [%d] for cpu = [%d]\n", |
| 119 | 117 | error, cpuid); |
| @@ -248,16 +248,12 @@ static int __maybe_unused cn_proc_show(struct seq_file *m, void *v) · 247 unmodified lines | ||
| 248 | 248 | return 0; |
| 249 | 249 | } |
| 250 | 250 | |
| 251 | −static struct cn_dev cdev = { | |
| 252 | − .input = cn_rx_skb, | |
| 253 | −}; | |
| 254 | − | |
| 255 | 251 | static int cn_init(void) |
| 256 | 252 | { |
| 257 | 253 | struct cn_dev *dev = &cdev; |
| 258 | 254 | struct netlink_kernel_cfg cfg = { |
| 259 | 255 | .groups = CN_NETLINK_USERS + 0xf, |
| 260 | − .input = dev->input, | |
| 256 | + .input = cn_rx_skb, | |
| 261 | 257 | }; |
| 262 | 258 | |
| 263 | 259 | dev->nls = netlink_kernel_create(&init_net, NETLINK_CONNECTOR, &cfg); |
| @@ -2528,7 +2528,7 @@ static int cpufreq_boost_set_sw(int state) · 2527 unmodified lines | ||
| 2528 | 2528 | } |
| 2529 | 2529 | |
| 2530 | 2530 | ret = dev_pm_qos_update_request(policy->max_freq_req, policy->max); |
| 2531 | − if (ret) | |
| 2531 | + if (ret < 0) | |
| 2532 | 2532 | break; |
| 2533 | 2533 | } |
| 2534 | 2534 | |
| @@ -131,10 +131,18 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy) · 130 unmodified lines | ||
| 131 | 131 | int err = -ENODEV; |
| 132 | 132 | |
| 133 | 133 | cpu = of_get_cpu_node(policy->cpu, NULL); |
| 134 | + if (!cpu) | |
| 135 | + goto out; | |
| 134 | 136 | |
| 137 | + max_freqp = of_get_property(cpu, "clock-frequency", NULL); | |
| 135 | 138 | of_node_put(cpu); |
| 136 | − if (!cpu) | |
| 139 | + if (!max_freqp) { | |
| 140 | + err = -EINVAL; | |
| 137 | 141 | goto out; |
| 142 | + } | |
| 143 | + | |
| 144 | + /* we need the freq in kHz */ | |
| 145 | + max_freq = *max_freqp / 1000; | |
| 138 | 146 | |
| 139 | 147 | dn = of_find_compatible_node(NULL, NULL, "1682m-sdc"); |
| 140 | 148 | if (!dn) |
| @@ -171,16 +179,6 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy) · 30 unmodified lines | ||
| 171 | 179 | } |
| 172 | 180 | |
| 173 | 181 | pr_debug("init cpufreq on CPU %d\n", policy->cpu); |
| 174 | − | |
| 175 | − max_freqp = of_get_property(cpu, "clock-frequency", NULL); | |
| 176 | − if (!max_freqp) { | |
| 177 | − err = -EINVAL; | |
| 178 | − goto out_unmap_sdcpwr; | |
| 179 | − } | |
| 180 | − | |
| 181 | − /* we need the freq in kHz */ | |
| 182 | − max_freq = *max_freqp / 1000; | |
| 183 | − | |
| 184 | 182 | pr_debug("max clock-frequency is at %u kHz\n", max_freq); |
| 185 | 183 | pr_debug("initializing frequency table\n"); |
| 186 | 184 | |
| @@ -199,9 +197,6 @@ static int pas_cpufreq_cpu_init(struct cpufreq_policy *policy) · 12 unmodified lines | ||
| 199 | 197 | cpufreq_generic_init(policy, pas_freqs, get_gizmo_latency()); |
| 200 | 198 | return 0; |
| 201 | 199 | |
| 202 | −out_unmap_sdcpwr: | |
| 203 | − iounmap(sdcpwr_mapbase); | |
| 204 | − | |
| 205 | 200 | out_unmap_sdcasr: |
| 206 | 201 | iounmap(sdcasr_mapbase); |
| 207 | 202 | out: |
| @@ -58,6 +58,19 @@ static int ccp_aes_gcm_setkey(struct crypto_aead *tfm, const u8 *key, · 57 unmodified lines | ||
| 58 | 58 | static int ccp_aes_gcm_setauthsize(struct crypto_aead *tfm, |
| 59 | 59 | unsigned int authsize) |
| 60 | 60 | { |
| 61 | + switch (authsize) { | |
| 62 | + case 16: | |
| 63 | + case 15: | |
| 64 | + case 14: | |
| 65 | + case 13: | |
| 66 | + case 12: | |
| 67 | + case 8: | |
| 68 | + case 4: | |
| 69 | + break; | |
| 70 | + default: | |
| 71 | + return -EINVAL; | |
| 72 | + } | |
| 73 | + | |
| 61 | 74 | return 0; |
| 62 | 75 | } |
| 63 | 76 | |
| @@ -104,6 +117,7 @@ static int ccp_aes_gcm_crypt(struct aead_request *req, bool encrypt) · 40 unmodified lines | ||
| 104 | 117 | memset(&rctx->cmd, 0, sizeof(rctx->cmd)); |
| 105 | 118 | INIT_LIST_HEAD(&rctx->cmd.entry); |
| 106 | 119 | rctx->cmd.engine = CCP_ENGINE_AES; |
| 120 | + rctx->cmd.u.aes.authsize = crypto_aead_authsize(tfm); | |
| 107 | 121 | rctx->cmd.u.aes.type = ctx->u.aes.type; |
| 108 | 122 | rctx->cmd.u.aes.mode = ctx->u.aes.mode; |
| 109 | 123 | rctx->cmd.u.aes.action = encrypt; |
| @@ -540,6 +540,10 @@ int ccp_dev_suspend(struct sp_device *sp, pm_message_t state) · 539 unmodified lines | ||
| 540 | 540 | unsigned long flags; |
| 541 | 541 | unsigned int i; |
| 542 | 542 | |
| 543 | + /* If there's no device there's nothing to do */ | |
| 544 | + if (!ccp) | |
| 545 | + return 0; | |
| 546 | + | |
| 543 | 547 | spin_lock_irqsave(&ccp->cmd_lock, flags); |
| 544 | 548 | |
| 545 | 549 | ccp->suspending = 1; |
| @@ -564,6 +568,10 @@ int ccp_dev_resume(struct sp_device *sp) · 18 unmodified lines | ||
| 564 | 568 | unsigned long flags; |
| 565 | 569 | unsigned int i; |
| 566 | 570 | |
| 571 | + /* If there's no device there's nothing to do */ | |
| 572 | + if (!ccp) | |
| 573 | + return 0; | |
| 574 | + | |
| 567 | 575 | spin_lock_irqsave(&ccp->cmd_lock, flags); |
| 568 | 576 | |
| 569 | 577 | ccp->suspending = 0; |
| @@ -622,6 +622,7 @@ static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, · 621 unmodified lines | ||
| 622 | 622 | |
| 623 | 623 | unsigned long long *final; |
| 624 | 624 | unsigned int dm_offset; |
| 625 | + unsigned int authsize; | |
| 625 | 626 | unsigned int jobid; |
| 626 | 627 | unsigned int ilen; |
| 627 | 628 | bool in_place = true; /* Default value */ |
| @@ -643,6 +644,21 @@ static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, · 15 unmodified lines | ||
| 643 | 644 | if (!aes->key) /* Gotta have a key SGL */ |
| 644 | 645 | return -EINVAL; |
| 645 | 646 | |
| 647 | + /* Zero defaults to 16 bytes, the maximum size */ | |
| 648 | + authsize = aes->authsize ? aes->authsize : AES_BLOCK_SIZE; | |
| 649 | + switch (authsize) { | |
| 650 | + case 16: | |
| 651 | + case 15: | |
| 652 | + case 14: | |
| 653 | + case 13: | |
| 654 | + case 12: | |
| 655 | + case 8: | |
| 656 | + case 4: | |
| 657 | + break; | |
| 658 | + default: | |
| 659 | + return -EINVAL; | |
| 660 | + } | |
| 661 | + | |
| 646 | 662 | /* First, decompose the source buffer into AAD & PT, |
| 647 | 663 | * and the destination buffer into AAD, CT & tag, or |
| 648 | 664 | * the input into CT & tag. |
| @@ -657,7 +673,7 @@ static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, · 8 unmodified lines | ||
| 657 | 673 | p_tag = scatterwalk_ffwd(sg_tag, p_outp, ilen); |
| 658 | 674 | } else { |
| 659 | 675 | /* Input length for decryption includes tag */ |
| 660 | − ilen = aes->src_len - AES_BLOCK_SIZE; | |
| 676 | + ilen = aes->src_len - authsize; | |
| 661 | 677 | p_tag = scatterwalk_ffwd(sg_tag, p_inp, ilen); |
| 662 | 678 | } |
| 663 | 679 | |
| @@ -766,8 +782,7 @@ static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, · 102 unmodified lines | ||
| 766 | 782 | while (src.sg_wa.bytes_left) { |
| 767 | 783 | ccp_prepare_data(&src, &dst, &op, AES_BLOCK_SIZE, true); |
| 768 | 784 | if (!src.sg_wa.bytes_left) { |
| 769 | − unsigned int nbytes = aes->src_len | |
| 770 | − % AES_BLOCK_SIZE; | |
| 785 | + unsigned int nbytes = ilen % AES_BLOCK_SIZE; | |
| 771 | 786 | |
| 772 | 787 | if (nbytes) { |
| 773 | 788 | op.eom = 1; |
| @@ -839,19 +854,19 @@ static int ccp_run_aes_gcm_cmd(struct ccp_cmd_queue *cmd_q, · 65 unmodified lines | ||
| 839 | 854 | |
| 840 | 855 | if (aes->action == CCP_AES_ACTION_ENCRYPT) { |
| 841 | 856 | /* Put the ciphered tag after the ciphertext. */ |
| 842 | − ccp_get_dm_area(&final_wa, 0, p_tag, 0, AES_BLOCK_SIZE); | |
| 857 | + ccp_get_dm_area(&final_wa, 0, p_tag, 0, authsize); | |
| 843 | 858 | } else { |
| 844 | 859 | /* Does this ciphered tag match the input? */ |
| 845 | − ret = ccp_init_dm_workarea(&tag, cmd_q, AES_BLOCK_SIZE, | |
| 860 | + ret = ccp_init_dm_workarea(&tag, cmd_q, authsize, | |
| 846 | 861 | DMA_BIDIRECTIONAL); |
| 847 | 862 | if (ret) |
| 848 | 863 | goto e_tag; |
| 849 | − ret = ccp_set_dm_area(&tag, 0, p_tag, 0, AES_BLOCK_SIZE); | |
| 864 | + ret = ccp_set_dm_area(&tag, 0, p_tag, 0, authsize); | |
| 850 | 865 | if (ret) |
| 851 | 866 | goto e_tag; |
| 852 | 867 | |
| 853 | 868 | ret = crypto_memneq(tag.address, final_wa.address, |
| 854 | − AES_BLOCK_SIZE) ? -EBADMSG : 0; | |
| 869 | + authsize) ? -EBADMSG : 0; | |
| 855 | 870 | ccp_dm_free(&tag); |
| 856 | 871 | } |
| 857 | 872 | |
| @@ -859,11 +874,11 @@ e_tag: · 1 unmodified line | ||
| 859 | 874 | ccp_dm_free(&final_wa); |
| 860 | 875 | |
| 861 | 876 | e_dst: |
| 862 | − if (aes->src_len && !in_place) | |
| 877 | + if (ilen > 0 && !in_place) | |
| 863 | 878 | ccp_free_data(&dst, cmd_q); |
| 864 | 879 | |
| 865 | 880 | e_src: |
| 866 | − if (aes->src_len) | |
| 881 | + if (ilen > 0) | |
| 867 | 882 | ccp_free_data(&src, cmd_q); |
| 868 | 883 | |
| 869 | 884 | e_aad: |
| @@ -314,14 +314,17 @@ void cryp_save_device_context(struct cryp_device_data *device_data, · 313 unmodified lines | ||
| 314 | 314 | case CRYP_KEY_SIZE_256: |
| 315 | 315 | ctx->key_4_l = readl_relaxed(&src_reg->key_4_l); |
| 316 | 316 | ctx->key_4_r = readl_relaxed(&src_reg->key_4_r); |
| 317 | + /* Fall through */ | |
| 317 | 318 | |
| 318 | 319 | case CRYP_KEY_SIZE_192: |
| 319 | 320 | ctx->key_3_l = readl_relaxed(&src_reg->key_3_l); |
| 320 | 321 | ctx->key_3_r = readl_relaxed(&src_reg->key_3_r); |
| 322 | + /* Fall through */ | |
| 321 | 323 | |
| 322 | 324 | case CRYP_KEY_SIZE_128: |
| 323 | 325 | ctx->key_2_l = readl_relaxed(&src_reg->key_2_l); |
| 324 | 326 | ctx->key_2_r = readl_relaxed(&src_reg->key_2_r); |
| 327 | + /* Fall through */ | |
| 325 | 328 | |
| 326 | 329 | default: |
| 327 | 330 | ctx->key_1_l = readl_relaxed(&src_reg->key_1_l); |
| @@ -361,14 +364,17 @@ void cryp_restore_device_context(struct cryp_device_data *device_data, · 33 unmodified lines | ||
| 361 | 364 | case CRYP_KEY_SIZE_256: |
| 362 | 365 | writel_relaxed(ctx->key_4_l, ®->key_4_l); |
| 363 | 366 | writel_relaxed(ctx->key_4_r, ®->key_4_r); |
| 367 | + /* Fall through */ | |
| 364 | 368 | |
| 365 | 369 | case CRYP_KEY_SIZE_192: |
| 366 | 370 | writel_relaxed(ctx->key_3_l, ®->key_3_l); |
| 367 | 371 | writel_relaxed(ctx->key_3_r, ®->key_3_r); |
| 372 | + /* Fall through */ | |
| 368 | 373 | |
| 369 | 374 | case CRYP_KEY_SIZE_128: |
| 370 | 375 | writel_relaxed(ctx->key_2_l, ®->key_2_l); |
| 371 | 376 | writel_relaxed(ctx->key_2_r, ®->key_2_r); |
| 377 | + /* Fall through */ | |
| 372 | 378 | |
| 373 | 379 | default: |
| 374 | 380 | writel_relaxed(ctx->key_1_l, ®->key_1_l); |
| @@ -50,7 +50,7 @@ struct dw_edma_burst { · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | struct dw_edma_region { |
| 52 | 52 | phys_addr_t paddr; |
| 53 | − dma_addr_t vaddr; | |
| 53 | + void __iomem *vaddr; | |
| 54 | 54 | size_t sz; |
| 55 | 55 | }; |
| 56 | 56 | |
| @@ -130,19 +130,19 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, · 129 unmodified lines | ||
| 130 | 130 | chip->id = pdev->devfn; |
| 131 | 131 | chip->irq = pdev->irq; |
| 132 | 132 | |
| 133 | − dw->rg_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->rg_bar]; | |
| 133 | + dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar]; | |
| 134 | 134 | dw->rg_region.vaddr += pdata->rg_off; |
| 135 | 135 | dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start; |
| 136 | 136 | dw->rg_region.paddr += pdata->rg_off; |
| 137 | 137 | dw->rg_region.sz = pdata->rg_sz; |
| 138 | 138 | |
| 139 | − dw->ll_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->ll_bar]; | |
| 139 | + dw->ll_region.vaddr = pcim_iomap_table(pdev)[pdata->ll_bar]; | |
| 140 | 140 | dw->ll_region.vaddr += pdata->ll_off; |
| 141 | 141 | dw->ll_region.paddr = pdev->resource[pdata->ll_bar].start; |
| 142 | 142 | dw->ll_region.paddr += pdata->ll_off; |
| 143 | 143 | dw->ll_region.sz = pdata->ll_sz; |
| 144 | 144 | |
| 145 | − dw->dt_region.vaddr = (dma_addr_t)pcim_iomap_table(pdev)[pdata->dt_bar]; | |
| 145 | + dw->dt_region.vaddr = pcim_iomap_table(pdev)[pdata->dt_bar]; | |
| 146 | 146 | dw->dt_region.vaddr += pdata->dt_off; |
| 147 | 147 | dw->dt_region.paddr = pdev->resource[pdata->dt_bar].start; |
| 148 | 148 | dw->dt_region.paddr += pdata->dt_off; |
| @@ -158,17 +158,17 @@ static int dw_edma_pcie_probe(struct pci_dev *pdev, · 9 unmodified lines | ||
| 158 | 158 | pci_dbg(pdev, "Mode:\t%s\n", |
| 159 | 159 | dw->mode == EDMA_MODE_LEGACY ? "Legacy" : "Unroll"); |
| 160 | 160 | |
| 161 | − pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n", | |
| 161 | + pci_dbg(pdev, "Registers:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", | |
| 162 | 162 | pdata->rg_bar, pdata->rg_off, pdata->rg_sz, |
| 163 | − &dw->rg_region.vaddr, &dw->rg_region.paddr); | |
| 163 | + dw->rg_region.vaddr, &dw->rg_region.paddr); | |
| 164 | 164 | |
| 165 | − pci_dbg(pdev, "L. List:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n", | |
| 165 | + pci_dbg(pdev, "L. List:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", | |
| 166 | 166 | pdata->ll_bar, pdata->ll_off, pdata->ll_sz, |
| 167 | − &dw->ll_region.vaddr, &dw->ll_region.paddr); | |
| 167 | + dw->ll_region.vaddr, &dw->ll_region.paddr); | |
| 168 | 168 | |
| 169 | − pci_dbg(pdev, "Data:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%pa, p=%pa)\n", | |
| 169 | + pci_dbg(pdev, "Data:\tBAR=%u, off=0x%.8lx, sz=0x%zx bytes, addr(v=%p, p=%pa)\n", | |
| 170 | 170 | pdata->dt_bar, pdata->dt_off, pdata->dt_sz, |
| 171 | − &dw->dt_region.vaddr, &dw->dt_region.paddr); | |
| 171 | + dw->dt_region.vaddr, &dw->dt_region.paddr); | |
| 172 | 172 | |
| 173 | 173 | pci_dbg(pdev, "Nr. IRQs:\t%u\n", dw->nr_irqs); |
| 174 | 174 | |
| @@ -25,7 +25,7 @@ enum dw_edma_control { · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) |
| 27 | 27 | { |
| 28 | − return (struct dw_edma_v0_regs __iomem *)dw->rg_region.vaddr; | |
| 28 | + return dw->rg_region.vaddr; | |
| 29 | 29 | } |
| 30 | 30 | |
| 31 | 31 | #define SET(dw, name, value) \ |
| @@ -192,13 +192,12 @@ u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir) · 160 unmodified lines | ||
| 192 | 192 | static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) |
| 193 | 193 | { |
| 194 | 194 | struct dw_edma_burst *child; |
| 195 | − struct dw_edma_v0_lli *lli; | |
| 196 | − struct dw_edma_v0_llp *llp; | |
| 195 | + struct dw_edma_v0_lli __iomem *lli; | |
| 196 | + struct dw_edma_v0_llp __iomem *llp; | |
| 197 | 197 | u32 control = 0, i = 0; |
| 198 | − u64 sar, dar, addr; | |
| 199 | 198 | int j; |
| 200 | 199 | |
| 201 | − lli = (struct dw_edma_v0_lli *)chunk->ll_region.vaddr; | |
| 200 | + lli = chunk->ll_region.vaddr; | |
| 202 | 201 | |
| 203 | 202 | if (chunk->cb) |
| 204 | 203 | control = DW_EDMA_V0_CB; |
| @@ -214,17 +213,15 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) · 9 unmodified lines | ||
| 214 | 213 | /* Transfer size */ |
| 215 | 214 | SET_LL(&lli[i].transfer_size, child->sz); |
| 216 | 215 | /* SAR - low, high */ |
| 217 | − sar = cpu_to_le64(child->sar); | |
| 218 | − SET_LL(&lli[i].sar_low, lower_32_bits(sar)); | |
| 219 | − SET_LL(&lli[i].sar_high, upper_32_bits(sar)); | |
| 216 | + SET_LL(&lli[i].sar_low, lower_32_bits(child->sar)); | |
| 217 | + SET_LL(&lli[i].sar_high, upper_32_bits(child->sar)); | |
| 220 | 218 | /* DAR - low, high */ |
| 221 | − dar = cpu_to_le64(child->dar); | |
| 222 | − SET_LL(&lli[i].dar_low, lower_32_bits(dar)); | |
| 223 | − SET_LL(&lli[i].dar_high, upper_32_bits(dar)); | |
| 219 | + SET_LL(&lli[i].dar_low, lower_32_bits(child->dar)); | |
| 220 | + SET_LL(&lli[i].dar_high, upper_32_bits(child->dar)); | |
| 224 | 221 | i++; |
| 225 | 222 | } |
| 226 | 223 | |
| 227 | − llp = (struct dw_edma_v0_llp *)&lli[i]; | |
| 224 | + llp = (void __iomem *)&lli[i]; | |
| 228 | 225 | control = DW_EDMA_V0_LLP | DW_EDMA_V0_TCB; |
| 229 | 226 | if (!chunk->cb) |
| 230 | 227 | control |= DW_EDMA_V0_CB; |
| @@ -232,9 +229,8 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk) · 1 unmodified line | ||
| 232 | 229 | /* Channel control */ |
| 233 | 230 | SET_LL(&llp->control, control); |
| 234 | 231 | /* Linked list - low, high */ |
| 235 | − addr = cpu_to_le64(chunk->ll_region.paddr); | |
| 236 | − SET_LL(&llp->llp_low, lower_32_bits(addr)); | |
| 237 | − SET_LL(&llp->llp_high, upper_32_bits(addr)); | |
| 232 | + SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr)); | |
| 233 | + SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr)); | |
| 238 | 234 | } |
| 239 | 235 | |
| 240 | 236 | void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) |
| @@ -242,7 +238,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) · 1 unmodified line | ||
| 242 | 238 | struct dw_edma_chan *chan = chunk->chan; |
| 243 | 239 | struct dw_edma *dw = chan->chip->dw; |
| 244 | 240 | u32 tmp; |
| 245 | − u64 llp; | |
| 246 | 241 | |
| 247 | 242 | dw_edma_v0_core_write_chunk(chunk); |
| 248 | 243 | |
| @@ -262,9 +257,10 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first) · 13 unmodified lines | ||
| 262 | 257 | SET_CH(dw, chan->dir, chan->id, ch_control1, |
| 263 | 258 | (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE)); |
| 264 | 259 | /* Linked list - low, high */ |
| 265 | − llp = cpu_to_le64(chunk->ll_region.paddr); | |
| 266 | − SET_CH(dw, chan->dir, chan->id, llp_low, lower_32_bits(llp)); | |
| 267 | − SET_CH(dw, chan->dir, chan->id, llp_high, upper_32_bits(llp)); | |
| 260 | + SET_CH(dw, chan->dir, chan->id, llp_low, | |
| 261 | + lower_32_bits(chunk->ll_region.paddr)); | |
| 262 | + SET_CH(dw, chan->dir, chan->id, llp_high, | |
| 263 | + upper_32_bits(chunk->ll_region.paddr)); | |
| 268 | 264 | } |
| 269 | 265 | /* Doorbell */ |
| 270 | 266 | SET_RW(dw, chan->dir, doorbell, |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include "dw-edma-core.h" |
| 15 | 15 | |
| 16 | 16 | #define REGS_ADDR(name) \ |
| 17 | − ((dma_addr_t *)®s->name) | |
| 17 | + ((void __force *)®s->name) | |
| 18 | 18 | #define REGISTER(name) \ |
| 19 | 19 | { #name, REGS_ADDR(name) } |
| 20 | 20 | |
| @@ -40,36 +40,37 @@ · 19 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | static struct dentry *base_dir; |
| 42 | 42 | static struct dw_edma *dw; |
| 43 | −static struct dw_edma_v0_regs *regs; | |
| 43 | +static struct dw_edma_v0_regs __iomem *regs; | |
| 44 | 44 | |
| 45 | 45 | static struct { |
| 46 | − void *start; | |
| 47 | − void *end; | |
| 46 | + void __iomem *start; | |
| 47 | + void __iomem *end; | |
| 48 | 48 | } lim[2][EDMA_V0_MAX_NR_CH]; |
| 49 | 49 | |
| 50 | 50 | struct debugfs_entries { |
| 51 | − char name[24]; | |
| 51 | + const char *name; | |
| 52 | 52 | dma_addr_t *reg; |
| 53 | 53 | }; |
| 54 | 54 | |
| 55 | 55 | static int dw_edma_debugfs_u32_get(void *data, u64 *val) |
| 56 | 56 | { |
| 57 | + void __iomem *reg = (void __force __iomem *)data; | |
| 57 | 58 | if (dw->mode == EDMA_MODE_LEGACY && |
| 58 | − data >= (void *)®s->type.legacy.ch) { | |
| 59 | − void *ptr = (void *)®s->type.legacy.ch; | |
| 59 | + reg >= (void __iomem *)®s->type.legacy.ch) { | |
| 60 | + void __iomem *ptr = ®s->type.legacy.ch; | |
| 60 | 61 | u32 viewport_sel = 0; |
| 61 | 62 | unsigned long flags; |
| 62 | 63 | u16 ch; |
| 63 | 64 | |
| 64 | 65 | for (ch = 0; ch < dw->wr_ch_cnt; ch++) |
| 65 | − if (lim[0][ch].start >= data && data < lim[0][ch].end) { | |
| 66 | − ptr += (data - lim[0][ch].start); | |
| 66 | + if (lim[0][ch].start >= reg && reg < lim[0][ch].end) { | |
| 67 | + ptr += (reg - lim[0][ch].start); | |
| 67 | 68 | goto legacy_sel_wr; |
| 68 | 69 | } |
| 69 | 70 | |
| 70 | 71 | for (ch = 0; ch < dw->rd_ch_cnt; ch++) |
| 71 | − if (lim[1][ch].start >= data && data < lim[1][ch].end) { | |
| 72 | − ptr += (data - lim[1][ch].start); | |
| 72 | + if (lim[1][ch].start >= reg && reg < lim[1][ch].end) { | |
| 73 | + ptr += (reg - lim[1][ch].start); | |
| 73 | 74 | goto legacy_sel_rd; |
| 74 | 75 | } |
| 75 | 76 | |
| @@ -86,7 +87,7 @@ legacy_sel_wr: · 10 unmodified lines | ||
| 86 | 87 | |
| 87 | 88 | raw_spin_unlock_irqrestore(&dw->lock, flags); |
| 88 | 89 | } else { |
| 89 | − *val = readl(data); | |
| 90 | + *val = readl(reg); | |
| 90 | 91 | } |
| 91 | 92 | |
| 92 | 93 | return 0; |
| @@ -105,7 +106,7 @@ static void dw_edma_debugfs_create_x32(const struct debugfs_entries entries[], · 12 unmodified lines | ||
| 105 | 106 | } |
| 106 | 107 | } |
| 107 | 108 | |
| 108 | −static void dw_edma_debugfs_regs_ch(struct dw_edma_v0_ch_regs *regs, | |
| 109 | +static void dw_edma_debugfs_regs_ch(struct dw_edma_v0_ch_regs __iomem *regs, | |
| 109 | 110 | struct dentry *dir) |
| 110 | 111 | { |
| 111 | 112 | int nr_entries; |
| @@ -288,7 +289,7 @@ void dw_edma_v0_debugfs_on(struct dw_edma_chip *chip) · 176 unmodified lines | ||
| 288 | 289 | if (!dw) |
| 289 | 290 | return; |
| 290 | 291 | |
| 291 | − regs = (struct dw_edma_v0_regs *)dw->rg_region.vaddr; | |
| 292 | + regs = dw->rg_region.vaddr; | |
| 292 | 293 | if (!regs) |
| 293 | 294 | return; |
| 294 | 295 | |
| @@ -1163,6 +1163,7 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev, · 1162 unmodified lines | ||
| 1163 | 1163 | switch (chan->feature & FSL_DMA_IP_MASK) { |
| 1164 | 1164 | case FSL_DMA_IP_85XX: |
| 1165 | 1165 | chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; |
| 1166 | + /* Fall through */ | |
| 1166 | 1167 | case FSL_DMA_IP_83XX: |
| 1167 | 1168 | chan->toggle_ext_start = fsl_chan_toggle_ext_start; |
| 1168 | 1169 | chan->set_src_loop_size = fsl_chan_set_src_loop_size; |
| @@ -142,7 +142,7 @@ enum d40_events { · 141 unmodified lines | ||
| 142 | 142 | * when the DMA hw is powered off. |
| 143 | 143 | * TODO: Add save/restore of D40_DREG_GCC on dma40 v3 or later, if that works. |
| 144 | 144 | */ |
| 145 | −static u32 d40_backup_regs[] = { | |
| 145 | +static __maybe_unused u32 d40_backup_regs[] = { | |
| 146 | 146 | D40_DREG_LCPA, |
| 147 | 147 | D40_DREG_LCLA, |
| 148 | 148 | D40_DREG_PRMSE, |
| @@ -211,7 +211,7 @@ static u32 d40_backup_regs_v4b[] = { · 62 unmodified lines | ||
| 211 | 211 | |
| 212 | 212 | #define BACKUP_REGS_SZ_V4B ARRAY_SIZE(d40_backup_regs_v4b) |
| 213 | 213 | |
| 214 | −static u32 d40_backup_regs_chan[] = { | |
| 214 | +static __maybe_unused u32 d40_backup_regs_chan[] = { | |
| 215 | 215 | D40_CHAN_REG_SSCFG, |
| 216 | 216 | D40_CHAN_REG_SSELT, |
| 217 | 217 | D40_CHAN_REG_SSPTR, |
| @@ -1366,7 +1366,7 @@ static irqreturn_t stm32_mdma_irq_handler(int irq, void *devid) · 1365 unmodified lines | ||
| 1366 | 1366 | |
| 1367 | 1367 | chan = &dmadev->chan[id]; |
| 1368 | 1368 | if (!chan) { |
| 1369 | − dev_err(chan2dev(chan), "MDMA channel not initialized\n"); | |
| 1369 | + dev_dbg(mdma2dev(dmadev), "MDMA channel not initialized\n"); | |
| 1370 | 1370 | goto exit; |
| 1371 | 1371 | } |
| 1372 | 1372 | |
| @@ -712,7 +712,7 @@ static struct dma_chan *tegra_dma_of_xlate(struct of_phandle_args *dma_spec, · 711 unmodified lines | ||
| 712 | 712 | return chan; |
| 713 | 713 | } |
| 714 | 714 | |
| 715 | −static int tegra_adma_runtime_suspend(struct device *dev) | |
| 715 | +static int __maybe_unused tegra_adma_runtime_suspend(struct device *dev) | |
| 716 | 716 | { |
| 717 | 717 | struct tegra_adma *tdma = dev_get_drvdata(dev); |
| 718 | 718 | struct tegra_adma_chan_regs *ch_reg; |
| @@ -744,7 +744,7 @@ clk_disable: · 25 unmodified lines | ||
| 744 | 744 | return 0; |
| 745 | 745 | } |
| 746 | 746 | |
| 747 | −static int tegra_adma_runtime_resume(struct device *dev) | |
| 747 | +static int __maybe_unused tegra_adma_runtime_resume(struct device *dev) | |
| 748 | 748 | { |
| 749 | 749 | struct tegra_adma *tdma = dev_get_drvdata(dev); |
| 750 | 750 | struct tegra_adma_chan_regs *ch_reg; |
| @@ -1234,7 +1234,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved( · 1233 unmodified lines | ||
| 1234 | 1234 | if (src_icg) { |
| 1235 | 1235 | d->ccr |= CCR_SRC_AMODE_DBLIDX; |
| 1236 | 1236 | d->ei = 1; |
| 1237 | − d->fi = src_icg; | |
| 1237 | + d->fi = src_icg + 1; | |
| 1238 | 1238 | } else if (xt->src_inc) { |
| 1239 | 1239 | d->ccr |= CCR_SRC_AMODE_POSTINC; |
| 1240 | 1240 | d->fi = 0; |
| @@ -1249,7 +1249,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved( · 8 unmodified lines | ||
| 1249 | 1249 | if (dst_icg) { |
| 1250 | 1250 | d->ccr |= CCR_DST_AMODE_DBLIDX; |
| 1251 | 1251 | sg->ei = 1; |
| 1252 | − sg->fi = dst_icg; | |
| 1252 | + sg->fi = dst_icg + 1; | |
| 1253 | 1253 | } else if (xt->dst_inc) { |
| 1254 | 1254 | d->ccr |= CCR_DST_AMODE_POSTINC; |
| 1255 | 1255 | sg->fi = 0; |
| @@ -957,7 +957,7 @@ static void set_broadcast_channel(struct fw_device *device, int generation) · 956 unmodified lines | ||
| 957 | 957 | device->bc_implemented = BC_IMPLEMENTED; |
| 958 | 958 | break; |
| 959 | 959 | } |
| 960 | − /* else fall through to case address error */ | |
| 960 | + /* else, fall through - to case address error */ | |
| 961 | 961 | case RCODE_ADDRESS_ERROR: |
| 962 | 962 | device->bc_implemented = BC_UNIMPLEMENTED; |
| 963 | 963 | } |
| @@ -284,7 +284,7 @@ static int manage_channel(struct fw_card *card, int irm_id, int generation, · 283 unmodified lines | ||
| 284 | 284 | if ((data[0] & bit) == (data[1] & bit)) |
| 285 | 285 | continue; |
| 286 | 286 | |
| 287 | − /* 1394-1995 IRM, fall through to retry. */ | |
| 287 | + /* fall through - It's a 1394-1995 IRM, retry. */ | |
| 288 | 288 | default: |
| 289 | 289 | if (retry) { |
| 290 | 290 | retry--; |
| @@ -54,6 +54,7 @@ static u32 *count_ports(u32 *sid, int *total_port_count, int *child_port_count) · 53 unmodified lines | ||
| 54 | 54 | switch (port_type) { |
| 55 | 55 | case SELFID_PORT_CHILD: |
| 56 | 56 | (*child_port_count)++; |
| 57 | + /* fall through */ | |
| 57 | 58 | case SELFID_PORT_PARENT: |
| 58 | 59 | case SELFID_PORT_NCONN: |
| 59 | 60 | (*total_port_count)++; |
| @@ -157,7 +157,7 @@ config DMI_SCAN_MACHINE_NON_EFI_FALLBACK · 156 unmodified lines | ||
| 157 | 157 | |
| 158 | 158 | config ISCSI_IBFT_FIND |
| 159 | 159 | bool "iSCSI Boot Firmware Table Attributes" |
| 160 | − depends on X86 && ACPI | |
| 160 | + depends on X86 && ISCSI_IBFT | |
| 161 | 161 | default n |
| 162 | 162 | help |
| 163 | 163 | This option enables the kernel to find the region of memory |
| @@ -168,7 +168,8 @@ config ISCSI_IBFT_FIND · 4 unmodified lines | ||
| 168 | 168 | config ISCSI_IBFT |
| 169 | 169 | tristate "iSCSI Boot Firmware Table Attributes module" |
| 170 | 170 | select ISCSI_BOOT_SYSFS |
| 171 | − depends on ISCSI_IBFT_FIND && SCSI && SCSI_LOWLEVEL | |
| 171 | + select ISCSI_IBFT_FIND if X86 | |
| 172 | + depends on ACPI && SCSI && SCSI_LOWLEVEL | |
| 172 | 173 | default n |
| 173 | 174 | help |
| 174 | 175 | This option enables support for detection and exposing of iSCSI |
| @@ -927,17 +927,33 @@ fail: · 926 unmodified lines | ||
| 927 | 927 | return status; |
| 928 | 928 | } |
| 929 | 929 | |
| 930 | +#define GET_EFI_CONFIG_TABLE(bits) \ | |
| 931 | +static void *get_efi_config_table##bits(efi_system_table_t *_sys_table, \ | |
| 932 | + efi_guid_t guid) \ | |
| 933 | +{ \ | |
| 934 | + efi_system_table_##bits##_t *sys_table; \ | |
| 935 | + efi_config_table_##bits##_t *tables; \ | |
| 936 | + int i; \ | |
| 937 | + \ | |
| 938 | + sys_table = (typeof(sys_table))_sys_table; \ | |
| 939 | + tables = (typeof(tables))(unsigned long)sys_table->tables; \ | |
| 940 | + \ | |
| 941 | + for (i = 0; i < sys_table->nr_tables; i++) { \ | |
| 942 | + if (efi_guidcmp(tables[i].guid, guid) != 0) \ | |
| 943 | + continue; \ | |
| 944 | + \ | |
| 945 | + return (void *)(unsigned long)tables[i].table; \ | |
| 946 | + } \ | |
| 947 | + \ | |
| 948 | + return NULL; \ | |
| 949 | +} | |
| 950 | +GET_EFI_CONFIG_TABLE(32) | |
| 951 | +GET_EFI_CONFIG_TABLE(64) | |
| 952 | + | |
| 930 | 953 | void *get_efi_config_table(efi_system_table_t *sys_table, efi_guid_t guid) |
| 931 | 954 | { |
| 932 | − efi_config_table_t *tables = (efi_config_table_t *)sys_table->tables; | |
| 933 | − int i; | |
| 934 | − | |
| 935 | − for (i = 0; i < sys_table->nr_tables; i++) { | |
| 936 | − if (efi_guidcmp(tables[i].guid, guid) != 0) | |
| 937 | − continue; | |
| 938 | − | |
| 939 | − return (void *)tables[i].table; | |
| 940 | − } | |
| 941 | − | |
| 942 | − return NULL; | |
| 955 | + if (efi_is_64bit()) | |
| 956 | + return get_efi_config_table64(sys_table, guid); | |
| 957 | + else | |
| 958 | + return get_efi_config_table32(sys_table, guid); | |
| 943 | 959 | } |
| @@ -84,6 +84,10 @@ MODULE_DESCRIPTION("sysfs interface to BIOS iBFT information"); · 83 unmodified lines | ||
| 84 | 84 | MODULE_LICENSE("GPL"); |
| 85 | 85 | MODULE_VERSION(IBFT_ISCSI_VERSION); |
| 86 | 86 | |
| 87 | +#ifndef CONFIG_ISCSI_IBFT_FIND | |
| 88 | +struct acpi_table_ibft *ibft_addr; | |
| 89 | +#endif | |
| 90 | + | |
| 87 | 91 | struct ibft_hdr { |
| 88 | 92 | u8 id; |
| 89 | 93 | u8 version; |
| @@ -40,6 +40,7 @@ config ALTERA_PR_IP_CORE_PLAT · 39 unmodified lines | ||
| 40 | 40 | config FPGA_MGR_ALTERA_PS_SPI |
| 41 | 41 | tristate "Altera FPGA Passive Serial over SPI" |
| 42 | 42 | depends on SPI |
| 43 | + select BITREVERSE | |
| 43 | 44 | help |
| 44 | 45 | FPGA manager driver support for Altera Arria/Cyclone/Stratix |
| 45 | 46 | using the passive serial interface over SPI. |
| @@ -210,7 +210,7 @@ static int altera_ps_write_complete(struct fpga_manager *mgr, · 209 unmodified lines | ||
| 210 | 210 | return -EIO; |
| 211 | 211 | } |
| 212 | 212 | |
| 213 | − if (!IS_ERR(conf->confd)) { | |
| 213 | + if (conf->confd) { | |
| 214 | 214 | if (!gpiod_get_raw_value_cansleep(conf->confd)) { |
| 215 | 215 | dev_err(&mgr->dev, "CONF_DONE is inactive!\n"); |
| 216 | 216 | return -EIO; |
| @@ -289,10 +289,13 @@ static int altera_ps_probe(struct spi_device *spi) · 72 unmodified lines | ||
| 289 | 289 | return PTR_ERR(conf->status); |
| 290 | 290 | } |
| 291 | 291 | |
| 292 | − conf->confd = devm_gpiod_get(&spi->dev, "confd", GPIOD_IN); | |
| 292 | + conf->confd = devm_gpiod_get_optional(&spi->dev, "confd", GPIOD_IN); | |
| 293 | 293 | if (IS_ERR(conf->confd)) { |
| 294 | − dev_warn(&spi->dev, "Not using confd gpio: %ld\n", | |
| 295 | − PTR_ERR(conf->confd)); | |
| 294 | + dev_err(&spi->dev, "Failed to get confd gpio: %ld\n", | |
| 295 | + PTR_ERR(conf->confd)); | |
| 296 | + return PTR_ERR(conf->confd); | |
| 297 | + } else if (!conf->confd) { | |
| 298 | + dev_warn(&spi->dev, "Not using confd gpio"); | |
| 296 | 299 | } |
| 297 | 300 | |
| 298 | 301 | /* Register manager with unique name */ |
| @@ -141,10 +141,148 @@ id_show(struct device *dev, struct device_attribute *attr, char *buf) · 140 unmodified lines | ||
| 141 | 141 | } |
| 142 | 142 | static DEVICE_ATTR_RO(id); |
| 143 | 143 | |
| 144 | −static const struct attribute *port_hdr_attrs[] = { | |
| 144 | +static ssize_t | |
| 145 | +ltr_show(struct device *dev, struct device_attribute *attr, char *buf) | |
| 146 | +{ | |
| 147 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 148 | + void __iomem *base; | |
| 149 | + u64 v; | |
| 150 | + | |
| 151 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 152 | + | |
| 153 | + mutex_lock(&pdata->lock); | |
| 154 | + v = readq(base + PORT_HDR_CTRL); | |
| 155 | + mutex_unlock(&pdata->lock); | |
| 156 | + | |
| 157 | + return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_CTRL_LATENCY, v)); | |
| 158 | +} | |
| 159 | + | |
| 160 | +static ssize_t | |
| 161 | +ltr_store(struct device *dev, struct device_attribute *attr, | |
| 162 | + const char *buf, size_t count) | |
| 163 | +{ | |
| 164 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 165 | + void __iomem *base; | |
| 166 | + bool ltr; | |
| 167 | + u64 v; | |
| 168 | + | |
| 169 | + if (kstrtobool(buf, <r)) | |
| 170 | + return -EINVAL; | |
| 171 | + | |
| 172 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 173 | + | |
| 174 | + mutex_lock(&pdata->lock); | |
| 175 | + v = readq(base + PORT_HDR_CTRL); | |
| 176 | + v &= ~PORT_CTRL_LATENCY; | |
| 177 | + v |= FIELD_PREP(PORT_CTRL_LATENCY, ltr ? 1 : 0); | |
| 178 | + writeq(v, base + PORT_HDR_CTRL); | |
| 179 | + mutex_unlock(&pdata->lock); | |
| 180 | + | |
| 181 | + return count; | |
| 182 | +} | |
| 183 | +static DEVICE_ATTR_RW(ltr); | |
| 184 | + | |
| 185 | +static ssize_t | |
| 186 | +ap1_event_show(struct device *dev, struct device_attribute *attr, char *buf) | |
| 187 | +{ | |
| 188 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 189 | + void __iomem *base; | |
| 190 | + u64 v; | |
| 191 | + | |
| 192 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 193 | + | |
| 194 | + mutex_lock(&pdata->lock); | |
| 195 | + v = readq(base + PORT_HDR_STS); | |
| 196 | + mutex_unlock(&pdata->lock); | |
| 197 | + | |
| 198 | + return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP1_EVT, v)); | |
| 199 | +} | |
| 200 | + | |
| 201 | +static ssize_t | |
| 202 | +ap1_event_store(struct device *dev, struct device_attribute *attr, | |
| 203 | + const char *buf, size_t count) | |
| 204 | +{ | |
| 205 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 206 | + void __iomem *base; | |
| 207 | + bool clear; | |
| 208 | + | |
| 209 | + if (kstrtobool(buf, &clear) || !clear) | |
| 210 | + return -EINVAL; | |
| 211 | + | |
| 212 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 213 | + | |
| 214 | + mutex_lock(&pdata->lock); | |
| 215 | + writeq(PORT_STS_AP1_EVT, base + PORT_HDR_STS); | |
| 216 | + mutex_unlock(&pdata->lock); | |
| 217 | + | |
| 218 | + return count; | |
| 219 | +} | |
| 220 | +static DEVICE_ATTR_RW(ap1_event); | |
| 221 | + | |
| 222 | +static ssize_t | |
| 223 | +ap2_event_show(struct device *dev, struct device_attribute *attr, | |
| 224 | + char *buf) | |
| 225 | +{ | |
| 226 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 227 | + void __iomem *base; | |
| 228 | + u64 v; | |
| 229 | + | |
| 230 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 231 | + | |
| 232 | + mutex_lock(&pdata->lock); | |
| 233 | + v = readq(base + PORT_HDR_STS); | |
| 234 | + mutex_unlock(&pdata->lock); | |
| 235 | + | |
| 236 | + return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP2_EVT, v)); | |
| 237 | +} | |
| 238 | + | |
| 239 | +static ssize_t | |
| 240 | +ap2_event_store(struct device *dev, struct device_attribute *attr, | |
| 241 | + const char *buf, size_t count) | |
| 242 | +{ | |
| 243 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 244 | + void __iomem *base; | |
| 245 | + bool clear; | |
| 246 | + | |
| 247 | + if (kstrtobool(buf, &clear) || !clear) | |
| 248 | + return -EINVAL; | |
| 249 | + | |
| 250 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 251 | + | |
| 252 | + mutex_lock(&pdata->lock); | |
| 253 | + writeq(PORT_STS_AP2_EVT, base + PORT_HDR_STS); | |
| 254 | + mutex_unlock(&pdata->lock); | |
| 255 | + | |
| 256 | + return count; | |
| 257 | +} | |
| 258 | +static DEVICE_ATTR_RW(ap2_event); | |
| 259 | + | |
| 260 | +static ssize_t | |
| 261 | +power_state_show(struct device *dev, struct device_attribute *attr, char *buf) | |
| 262 | +{ | |
| 263 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(dev); | |
| 264 | + void __iomem *base; | |
| 265 | + u64 v; | |
| 266 | + | |
| 267 | + base = dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); | |
| 268 | + | |
| 269 | + mutex_lock(&pdata->lock); | |
| 270 | + v = readq(base + PORT_HDR_STS); | |
| 271 | + mutex_unlock(&pdata->lock); | |
| 272 | + | |
| 273 | + return sprintf(buf, "0x%x\n", (u8)FIELD_GET(PORT_STS_PWR_STATE, v)); | |
| 274 | +} | |
| 275 | +static DEVICE_ATTR_RO(power_state); | |
| 276 | + | |
| 277 | +static struct attribute *port_hdr_attrs[] = { | |
| 145 | 278 | &dev_attr_id.attr, |
| 279 | + &dev_attr_ltr.attr, | |
| 280 | + &dev_attr_ap1_event.attr, | |
| 281 | + &dev_attr_ap2_event.attr, | |
| 282 | + &dev_attr_power_state.attr, | |
| 146 | 283 | NULL, |
| 147 | 284 | }; |
| 285 | +ATTRIBUTE_GROUPS(port_hdr); | |
| 148 | 286 | |
| 149 | 287 | static int port_hdr_init(struct platform_device *pdev, |
| 150 | 288 | struct dfl_feature *feature) |
| @@ -153,7 +291,7 @@ static int port_hdr_init(struct platform_device *pdev, · 2 unmodified lines | ||
| 153 | 291 | |
| 154 | 292 | port_reset(pdev); |
| 155 | 293 | |
| 156 | − return sysfs_create_files(&pdev->dev.kobj, port_hdr_attrs); | |
| 294 | + return device_add_groups(&pdev->dev, port_hdr_groups); | |
| 157 | 295 | } |
| 158 | 296 | |
| 159 | 297 | static void port_hdr_uinit(struct platform_device *pdev, |
| @@ -161,7 +299,7 @@ static void port_hdr_uinit(struct platform_device *pdev, · 1 unmodified line | ||
| 161 | 299 | { |
| 162 | 300 | dev_dbg(&pdev->dev, "PORT HDR UInit.\n"); |
| 163 | 301 | |
| 164 | − sysfs_remove_files(&pdev->dev.kobj, port_hdr_attrs); | |
| 302 | + device_remove_groups(&pdev->dev, port_hdr_groups); | |
| 165 | 303 | } |
| 166 | 304 | |
| 167 | 305 | static long |
| @@ -185,6 +323,11 @@ port_hdr_ioctl(struct platform_device *pdev, struct dfl_feature *feature, · 17 unmodified lines | ||
| 185 | 323 | return ret; |
| 186 | 324 | } |
| 187 | 325 | |
| 326 | +static const struct dfl_feature_id port_hdr_id_table[] = { | |
| 327 | + {.id = PORT_FEATURE_ID_HEADER,}, | |
| 328 | + {0,} | |
| 329 | +}; | |
| 330 | + | |
| 188 | 331 | static const struct dfl_feature_ops port_hdr_ops = { |
| 189 | 332 | .init = port_hdr_init, |
| 190 | 333 | .uinit = port_hdr_uinit, |
| @@ -214,10 +357,11 @@ afu_id_show(struct device *dev, struct device_attribute *attr, char *buf) · 23 unmodified lines | ||
| 214 | 357 | } |
| 215 | 358 | static DEVICE_ATTR_RO(afu_id); |
| 216 | 359 | |
| 217 | −static const struct attribute *port_afu_attrs[] = { | |
| 360 | +static struct attribute *port_afu_attrs[] = { | |
| 218 | 361 | &dev_attr_afu_id.attr, |
| 219 | 362 | NULL |
| 220 | 363 | }; |
| 364 | +ATTRIBUTE_GROUPS(port_afu); | |
| 221 | 365 | |
| 222 | 366 | static int port_afu_init(struct platform_device *pdev, |
| 223 | 367 | struct dfl_feature *feature) |
| @@ -234,7 +378,7 @@ static int port_afu_init(struct platform_device *pdev, · 10 unmodified lines | ||
| 234 | 378 | if (ret) |
| 235 | 379 | return ret; |
| 236 | 380 | |
| 237 | − return sysfs_create_files(&pdev->dev.kobj, port_afu_attrs); | |
| 381 | + return device_add_groups(&pdev->dev, port_afu_groups); | |
| 238 | 382 | } |
| 239 | 383 | |
| 240 | 384 | static void port_afu_uinit(struct platform_device *pdev, |
| @@ -242,9 +386,14 @@ static void port_afu_uinit(struct platform_device *pdev, · 1 unmodified line | ||
| 242 | 386 | { |
| 243 | 387 | dev_dbg(&pdev->dev, "PORT AFU UInit.\n"); |
| 244 | 388 | |
| 245 | − sysfs_remove_files(&pdev->dev.kobj, port_afu_attrs); | |
| 389 | + device_remove_groups(&pdev->dev, port_afu_groups); | |
| 246 | 390 | } |
| 247 | 391 | |
| 392 | +static const struct dfl_feature_id port_afu_id_table[] = { | |
| 393 | + {.id = PORT_FEATURE_ID_AFU,}, | |
| 394 | + {0,} | |
| 395 | +}; | |
| 396 | + | |
| 248 | 397 | static const struct dfl_feature_ops port_afu_ops = { |
| 249 | 398 | .init = port_afu_init, |
| 250 | 399 | .uinit = port_afu_uinit, |
| @@ -252,11 +401,11 @@ static const struct dfl_feature_ops port_afu_ops = { · 1 unmodified line | ||
| 252 | 401 | |
| 253 | 402 | static struct dfl_feature_driver port_feature_drvs[] = { |
| 254 | 403 | { |
| 255 | − .id = PORT_FEATURE_ID_HEADER, | |
| 404 | + .id_table = port_hdr_id_table, | |
| 256 | 405 | .ops = &port_hdr_ops, |
| 257 | 406 | }, |
| 258 | 407 | { |
| 259 | − .id = PORT_FEATURE_ID_AFU, | |
| 408 | + .id_table = port_afu_id_table, | |
| 260 | 409 | .ops = &port_afu_ops, |
| 261 | 410 | }, |
| 262 | 411 | { |
| @@ -16,6 +16,7 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | #include <linux/kernel.h> |
| 18 | 18 | #include <linux/module.h> |
| 19 | +#include <linux/uaccess.h> | |
| 19 | 20 | #include <linux/fpga-dfl.h> |
| 20 | 21 | |
| 21 | 22 | #include "dfl.h" |
| @@ -72,12 +73,61 @@ static ssize_t bitstream_metadata_show(struct device *dev, · 50 unmodified lines | ||
| 72 | 73 | } |
| 73 | 74 | static DEVICE_ATTR_RO(bitstream_metadata); |
| 74 | 75 | |
| 75 | −static const struct attribute *fme_hdr_attrs[] = { | |
| 76 | +static ssize_t cache_size_show(struct device *dev, | |
| 77 | + struct device_attribute *attr, char *buf) | |
| 78 | +{ | |
| 79 | + void __iomem *base; | |
| 80 | + u64 v; | |
| 81 | + | |
| 82 | + base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); | |
| 83 | + | |
| 84 | + v = readq(base + FME_HDR_CAP); | |
| 85 | + | |
| 86 | + return sprintf(buf, "%u\n", | |
| 87 | + (unsigned int)FIELD_GET(FME_CAP_CACHE_SIZE, v)); | |
| 88 | +} | |
| 89 | +static DEVICE_ATTR_RO(cache_size); | |
| 90 | + | |
| 91 | +static ssize_t fabric_version_show(struct device *dev, | |
| 92 | + struct device_attribute *attr, char *buf) | |
| 93 | +{ | |
| 94 | + void __iomem *base; | |
| 95 | + u64 v; | |
| 96 | + | |
| 97 | + base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); | |
| 98 | + | |
| 99 | + v = readq(base + FME_HDR_CAP); | |
| 100 | + | |
| 101 | + return sprintf(buf, "%u\n", | |
| 102 | + (unsigned int)FIELD_GET(FME_CAP_FABRIC_VERID, v)); | |
| 103 | +} | |
| 104 | +static DEVICE_ATTR_RO(fabric_version); | |
| 105 | + | |
| 106 | +static ssize_t socket_id_show(struct device *dev, | |
| 107 | + struct device_attribute *attr, char *buf) | |
| 108 | +{ | |
| 109 | + void __iomem *base; | |
| 110 | + u64 v; | |
| 111 | + | |
| 112 | + base = dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); | |
| 113 | + | |
| 114 | + v = readq(base + FME_HDR_CAP); | |
| 115 | + | |
| 116 | + return sprintf(buf, "%u\n", | |
| 117 | + (unsigned int)FIELD_GET(FME_CAP_SOCKET_ID, v)); | |
| 118 | +} | |
| 119 | +static DEVICE_ATTR_RO(socket_id); | |
| 120 | + | |
| 121 | +static struct attribute *fme_hdr_attrs[] = { | |
| 76 | 122 | &dev_attr_ports_num.attr, |
| 77 | 123 | &dev_attr_bitstream_id.attr, |
| 78 | 124 | &dev_attr_bitstream_metadata.attr, |
| 125 | + &dev_attr_cache_size.attr, | |
| 126 | + &dev_attr_fabric_version.attr, | |
| 127 | + &dev_attr_socket_id.attr, | |
| 79 | 128 | NULL, |
| 80 | 129 | }; |
| 130 | +ATTRIBUTE_GROUPS(fme_hdr); | |
| 81 | 131 | |
| 82 | 132 | static int fme_hdr_init(struct platform_device *pdev, |
| 83 | 133 | struct dfl_feature *feature) |
| @@ -89,7 +139,7 @@ static int fme_hdr_init(struct platform_device *pdev, · 5 unmodified lines | ||
| 89 | 139 | dev_dbg(&pdev->dev, "FME cap %llx.\n", |
| 90 | 140 | (unsigned long long)readq(base + FME_HDR_CAP)); |
| 91 | 141 | |
| 92 | − ret = sysfs_create_files(&pdev->dev.kobj, fme_hdr_attrs); | |
| 142 | + ret = device_add_groups(&pdev->dev, fme_hdr_groups); | |
| 93 | 143 | if (ret) |
| 94 | 144 | return ret; |
| 95 | 145 | |
| @@ -100,22 +150,68 @@ static void fme_hdr_uinit(struct platform_device *pdev, · 4 unmodified lines | ||
| 100 | 150 | struct dfl_feature *feature) |
| 101 | 151 | { |
| 102 | 152 | dev_dbg(&pdev->dev, "FME HDR UInit.\n"); |
| 103 | − sysfs_remove_files(&pdev->dev.kobj, fme_hdr_attrs); | |
| 153 | + device_remove_groups(&pdev->dev, fme_hdr_groups); | |
| 154 | +} | |
| 155 | + | |
| 156 | +static long fme_hdr_ioctl_release_port(struct dfl_feature_platform_data *pdata, | |
| 157 | + unsigned long arg) | |
| 158 | +{ | |
| 159 | + struct dfl_fpga_cdev *cdev = pdata->dfl_cdev; | |
| 160 | + int port_id; | |
| 161 | + | |
| 162 | + if (get_user(port_id, (int __user *)arg)) | |
| 163 | + return -EFAULT; | |
| 164 | + | |
| 165 | + return dfl_fpga_cdev_release_port(cdev, port_id); | |
| 166 | +} | |
| 167 | + | |
| 168 | +static long fme_hdr_ioctl_assign_port(struct dfl_feature_platform_data *pdata, | |
| 169 | + unsigned long arg) | |
| 170 | +{ | |
| 171 | + struct dfl_fpga_cdev *cdev = pdata->dfl_cdev; | |
| 172 | + int port_id; | |
| 173 | + | |
| 174 | + if (get_user(port_id, (int __user *)arg)) | |
| 175 | + return -EFAULT; | |
| 176 | + | |
| 177 | + return dfl_fpga_cdev_assign_port(cdev, port_id); | |
| 104 | 178 | } |
| 105 | 179 | |
| 180 | +static long fme_hdr_ioctl(struct platform_device *pdev, | |
| 181 | + struct dfl_feature *feature, | |
| 182 | + unsigned int cmd, unsigned long arg) | |
| 183 | +{ | |
| 184 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev); | |
| 185 | + | |
| 186 | + switch (cmd) { | |
| 187 | + case DFL_FPGA_FME_PORT_RELEASE: | |
| 188 | + return fme_hdr_ioctl_release_port(pdata, arg); | |
| 189 | + case DFL_FPGA_FME_PORT_ASSIGN: | |
| 190 | + return fme_hdr_ioctl_assign_port(pdata, arg); | |
| 191 | + } | |
| 192 | + | |
| 193 | + return -ENODEV; | |
| 194 | +} | |
| 195 | + | |
| 196 | +static const struct dfl_feature_id fme_hdr_id_table[] = { | |
| 197 | + {.id = FME_FEATURE_ID_HEADER,}, | |
| 198 | + {0,} | |
| 199 | +}; | |
| 200 | + | |
| 106 | 201 | static const struct dfl_feature_ops fme_hdr_ops = { |
| 107 | 202 | .init = fme_hdr_init, |
| 108 | 203 | .uinit = fme_hdr_uinit, |
| 204 | + .ioctl = fme_hdr_ioctl, | |
| 109 | 205 | }; |
| 110 | 206 | |
| 111 | 207 | static struct dfl_feature_driver fme_feature_drvs[] = { |
| 112 | 208 | { |
| 113 | − .id = FME_FEATURE_ID_HEADER, | |
| 209 | + .id_table = fme_hdr_id_table, | |
| 114 | 210 | .ops = &fme_hdr_ops, |
| 115 | 211 | }, |
| 116 | 212 | { |
| 117 | − .id = FME_FEATURE_ID_PR_MGMT, | |
| 118 | − .ops = &pr_mgmt_ops, | |
| 213 | + .id_table = fme_pr_mgmt_id_table, | |
| 214 | + .ops = &fme_pr_mgmt_ops, | |
| 119 | 215 | }, |
| 120 | 216 | { |
| 121 | 217 | .ops = NULL, |
| @@ -470,7 +470,12 @@ static long fme_pr_ioctl(struct platform_device *pdev, · 469 unmodified lines | ||
| 470 | 470 | return ret; |
| 471 | 471 | } |
| 472 | 472 | |
| 473 | −const struct dfl_feature_ops pr_mgmt_ops = { | |
| 473 | +const struct dfl_feature_id fme_pr_mgmt_id_table[] = { | |
| 474 | + {.id = FME_FEATURE_ID_PR_MGMT,}, | |
| 475 | + {0} | |
| 476 | +}; | |
| 477 | + | |
| 478 | +const struct dfl_feature_ops fme_pr_mgmt_ops = { | |
| 474 | 479 | .init = pr_mgmt_init, |
| 475 | 480 | .uinit = pr_mgmt_uinit, |
| 476 | 481 | .ioctl = fme_pr_ioctl, |
| @@ -33,6 +33,7 @@ struct dfl_fme { · 32 unmodified lines | ||
| 33 | 33 | struct dfl_feature_platform_data *pdata; |
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | −extern const struct dfl_feature_ops pr_mgmt_ops; | |
| 36 | +extern const struct dfl_feature_ops fme_pr_mgmt_ops; | |
| 37 | +extern const struct dfl_feature_id fme_pr_mgmt_id_table[]; | |
| 37 | 38 | |
| 38 | 39 | #endif /* __DFL_FME_H */ |
| @@ -223,8 +223,43 @@ disable_error_report_exit: · 222 unmodified lines | ||
| 223 | 223 | return ret; |
| 224 | 224 | } |
| 225 | 225 | |
| 226 | +static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) | |
| 227 | +{ | |
| 228 | + struct cci_drvdata *drvdata = pci_get_drvdata(pcidev); | |
| 229 | + struct dfl_fpga_cdev *cdev = drvdata->cdev; | |
| 230 | + int ret = 0; | |
| 231 | + | |
| 232 | + if (!num_vfs) { | |
| 233 | + /* | |
| 234 | + * disable SRIOV and then put released ports back to default | |
| 235 | + * PF access mode. | |
| 236 | + */ | |
| 237 | + pci_disable_sriov(pcidev); | |
| 238 | + | |
| 239 | + dfl_fpga_cdev_config_ports_pf(cdev); | |
| 240 | + | |
| 241 | + } else { | |
| 242 | + /* | |
| 243 | + * before enable SRIOV, put released ports into VF access mode | |
| 244 | + * first of all. | |
| 245 | + */ | |
| 246 | + ret = dfl_fpga_cdev_config_ports_vf(cdev, num_vfs); | |
| 247 | + if (ret) | |
| 248 | + return ret; | |
| 249 | + | |
| 250 | + ret = pci_enable_sriov(pcidev, num_vfs); | |
| 251 | + if (ret) | |
| 252 | + dfl_fpga_cdev_config_ports_pf(cdev); | |
| 253 | + } | |
| 254 | + | |
| 255 | + return ret; | |
| 256 | +} | |
| 257 | + | |
| 226 | 258 | static void cci_pci_remove(struct pci_dev *pcidev) |
| 227 | 259 | { |
| 260 | + if (dev_is_pf(&pcidev->dev)) | |
| 261 | + cci_pci_sriov_configure(pcidev, 0); | |
| 262 | + | |
| 228 | 263 | cci_remove_feature_devs(pcidev); |
| 229 | 264 | pci_disable_pcie_error_reporting(pcidev); |
| 230 | 265 | } |
| @@ -234,6 +269,7 @@ static struct pci_driver cci_pci_driver = { · 3 unmodified lines | ||
| 234 | 269 | .id_table = cci_pcie_id_tbl, |
| 235 | 270 | .probe = cci_pci_probe, |
| 236 | 271 | .remove = cci_pci_remove, |
| 272 | + .sriov_configure = cci_pci_sriov_configure, | |
| 237 | 273 | }; |
| 238 | 274 | |
| 239 | 275 | module_pci_driver(cci_pci_driver); |
| @@ -231,16 +231,20 @@ EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del); · 230 unmodified lines | ||
| 231 | 231 | */ |
| 232 | 232 | int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id) |
| 233 | 233 | { |
| 234 | − struct dfl_fpga_port_ops *port_ops = dfl_fpga_port_ops_get(pdev); | |
| 235 | − int port_id; | |
| 234 | + struct dfl_feature_platform_data *pdata = dev_get_platdata(&pdev->dev); | |
| 235 | + struct dfl_fpga_port_ops *port_ops; | |
| 236 | + | |
| 237 | + if (pdata->id != FEATURE_DEV_ID_UNUSED) | |
| 238 | + return pdata->id == *(int *)pport_id; | |
| 236 | 239 | |
| 240 | + port_ops = dfl_fpga_port_ops_get(pdev); | |
| 237 | 241 | if (!port_ops || !port_ops->get_id) |
| 238 | 242 | return 0; |
| 239 | 243 | |
| 240 | − port_id = port_ops->get_id(pdev); | |
| 244 | + pdata->id = port_ops->get_id(pdev); | |
| 241 | 245 | dfl_fpga_port_ops_put(port_ops); |
| 242 | 246 | |
| 243 | − return port_id == *(int *)pport_id; | |
| 247 | + return pdata->id == *(int *)pport_id; | |
| 244 | 248 | } |
| 245 | 249 | EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id); |
| 246 | 250 | |
| @@ -255,7 +259,8 @@ void dfl_fpga_dev_feature_uinit(struct platform_device *pdev) · 8 unmodified lines | ||
| 255 | 259 | |
| 256 | 260 | dfl_fpga_dev_for_each_feature(pdata, feature) |
| 257 | 261 | if (feature->ops) { |
| 258 | − feature->ops->uinit(pdev, feature); | |
| 262 | + if (feature->ops->uinit) | |
| 263 | + feature->ops->uinit(pdev, feature); | |
| 259 | 264 | feature->ops = NULL; |
| 260 | 265 | } |
| 261 | 266 | } |
| @@ -277,6 +282,21 @@ static int dfl_feature_instance_init(struct platform_device *pdev, · 15 unmodified lines | ||
| 277 | 282 | return ret; |
| 278 | 283 | } |
| 279 | 284 | |
| 285 | +static bool dfl_feature_drv_match(struct dfl_feature *feature, | |
| 286 | + struct dfl_feature_driver *driver) | |
| 287 | +{ | |
| 288 | + const struct dfl_feature_id *ids = driver->id_table; | |
| 289 | + | |
| 290 | + if (ids) { | |
| 291 | + while (ids->id) { | |
| 292 | + if (ids->id == feature->id) | |
| 293 | + return true; | |
| 294 | + ids++; | |
| 295 | + } | |
| 296 | + } | |
| 297 | + return false; | |
| 298 | +} | |
| 299 | + | |
| 280 | 300 | /** |
| 281 | 301 | * dfl_fpga_dev_feature_init - init for sub features of dfl feature device |
| 282 | 302 | * @pdev: feature device. |
| @@ -297,8 +317,7 @@ int dfl_fpga_dev_feature_init(struct platform_device *pdev, · 14 unmodified lines | ||
| 297 | 317 | |
| 298 | 318 | while (drv->ops) { |
| 299 | 319 | dfl_fpga_dev_for_each_feature(pdata, feature) { |
| 300 | − /* match feature and drv using id */ | |
| 301 | − if (feature->id == drv->id) { | |
| 320 | + if (dfl_feature_drv_match(feature, drv)) { | |
| 302 | 321 | ret = dfl_feature_instance_init(pdev, pdata, |
| 303 | 322 | feature, drv); |
| 304 | 323 | if (ret) |
| @@ -474,6 +493,7 @@ static int build_info_commit_dev(struct build_feature_devs_info *binfo) · 169 unmodified lines | ||
| 474 | 493 | pdata->dev = fdev; |
| 475 | 494 | pdata->num = binfo->feature_num; |
| 476 | 495 | pdata->dfl_cdev = binfo->cdev; |
| 496 | + pdata->id = FEATURE_DEV_ID_UNUSED; | |
| 477 | 497 | mutex_init(&pdata->lock); |
| 478 | 498 | lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type], |
| 479 | 499 | dfl_pdata_key_strings[type]); |
| @@ -973,25 +993,27 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev) · 493 unmodified lines | ||
| 973 | 993 | { |
| 974 | 994 | struct dfl_feature_platform_data *pdata, *ptmp; |
| 975 | 995 | |
| 976 | − remove_feature_devs(cdev); | |
| 977 | − | |
| 978 | 996 | mutex_lock(&cdev->lock); |
| 979 | − if (cdev->fme_dev) { | |
| 980 | − /* the fme should be unregistered. */ | |
| 981 | − WARN_ON(device_is_registered(cdev->fme_dev)); | |
| 997 | + if (cdev->fme_dev) | |
| 982 | 998 | put_device(cdev->fme_dev); |
| 983 | − } | |
| 984 | 999 | |
| 985 | 1000 | list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) { |
| 986 | 1001 | struct platform_device *port_dev = pdata->dev; |
| 987 | 1002 | |
| 988 | − /* the port should be unregistered. */ | |
| 989 | − WARN_ON(device_is_registered(&port_dev->dev)); | |
| 1003 | + /* remove released ports */ | |
| 1004 | + if (!device_is_registered(&port_dev->dev)) { | |
| 1005 | + dfl_id_free(feature_dev_id_type(port_dev), | |
| 1006 | + port_dev->id); | |
| 1007 | + platform_device_put(port_dev); | |
| 1008 | + } | |
| 1009 | + | |
| 990 | 1010 | list_del(&pdata->node); |
| 991 | 1011 | put_device(&port_dev->dev); |
| 992 | 1012 | } |
| 993 | 1013 | mutex_unlock(&cdev->lock); |
| 994 | 1014 | |
| 1015 | + remove_feature_devs(cdev); | |
| 1016 | + | |
| 995 | 1017 | fpga_region_unregister(cdev->region); |
| 996 | 1018 | devm_kfree(cdev->parent, cdev); |
| 997 | 1019 | } |
| @@ -1042,6 +1064,170 @@ static int __init dfl_fpga_init(void) · 44 unmodified lines | ||
| 1042 | 1064 | return ret; |
| 1043 | 1065 | } |
| 1044 | 1066 | |
| 1067 | +/** | |
| 1068 | + * dfl_fpga_cdev_release_port - release a port platform device | |
| 1069 | + * | |
| 1070 | + * @cdev: parent container device. | |
| 1071 | + * @port_id: id of the port platform device. | |
| 1072 | + * | |
| 1073 | + * This function allows user to release a port platform device. This is a | |
| 1074 | + * mandatory step before turn a port from PF into VF for SRIOV support. | |
| 1075 | + * | |
| 1076 | + * Return: 0 on success, negative error code otherwise. | |
| 1077 | + */ | |
| 1078 | +int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id) | |
| 1079 | +{ | |
| 1080 | + struct platform_device *port_pdev; | |
| 1081 | + int ret = -ENODEV; | |
| 1082 | + | |
| 1083 | + mutex_lock(&cdev->lock); | |
| 1084 | + port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id, | |
| 1085 | + dfl_fpga_check_port_id); | |
| 1086 | + if (!port_pdev) | |
| 1087 | + goto unlock_exit; | |
| 1088 | + | |
| 1089 | + if (!device_is_registered(&port_pdev->dev)) { | |
| 1090 | + ret = -EBUSY; | |
| 1091 | + goto put_dev_exit; | |
| 1092 | + } | |
| 1093 | + | |
| 1094 | + ret = dfl_feature_dev_use_begin(dev_get_platdata(&port_pdev->dev)); | |
| 1095 | + if (ret) | |
| 1096 | + goto put_dev_exit; | |
| 1097 | + | |
| 1098 | + platform_device_del(port_pdev); | |
| 1099 | + cdev->released_port_num++; | |
| 1100 | +put_dev_exit: | |
| 1101 | + put_device(&port_pdev->dev); | |
| 1102 | +unlock_exit: | |
| 1103 | + mutex_unlock(&cdev->lock); | |
| 1104 | + return ret; | |
| 1105 | +} | |
| 1106 | +EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port); | |
| 1107 | + | |
| 1108 | +/** | |
| 1109 | + * dfl_fpga_cdev_assign_port - assign a port platform device back | |
| 1110 | + * | |
| 1111 | + * @cdev: parent container device. | |
| 1112 | + * @port_id: id of the port platform device. | |
| 1113 | + * | |
| 1114 | + * This function allows user to assign a port platform device back. This is | |
| 1115 | + * a mandatory step after disable SRIOV support. | |
| 1116 | + * | |
| 1117 | + * Return: 0 on success, negative error code otherwise. | |
| 1118 | + */ | |
| 1119 | +int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id) | |
| 1120 | +{ | |
| 1121 | + struct platform_device *port_pdev; | |
| 1122 | + int ret = -ENODEV; | |
| 1123 | + | |
| 1124 | + mutex_lock(&cdev->lock); | |
| 1125 | + port_pdev = __dfl_fpga_cdev_find_port(cdev, &port_id, | |
| 1126 | + dfl_fpga_check_port_id); | |
| 1127 | + if (!port_pdev) | |
| 1128 | + goto unlock_exit; | |
| 1129 | + | |
| 1130 | + if (device_is_registered(&port_pdev->dev)) { | |
| 1131 | + ret = -EBUSY; | |
| 1132 | + goto put_dev_exit; | |
| 1133 | + } | |
| 1134 | + | |
| 1135 | + ret = platform_device_add(port_pdev); | |
| 1136 | + if (ret) | |
| 1137 | + goto put_dev_exit; | |
| 1138 | + | |
| 1139 | + dfl_feature_dev_use_end(dev_get_platdata(&port_pdev->dev)); | |
| 1140 | + cdev->released_port_num--; | |
| 1141 | +put_dev_exit: | |
| 1142 | + put_device(&port_pdev->dev); | |
| 1143 | +unlock_exit: | |
| 1144 | + mutex_unlock(&cdev->lock); | |
| 1145 | + return ret; | |
| 1146 | +} | |
| 1147 | +EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port); | |
| 1148 | + | |
| 1149 | +static void config_port_access_mode(struct device *fme_dev, int port_id, | |
| 1150 | + bool is_vf) | |
| 1151 | +{ | |
| 1152 | + void __iomem *base; | |
| 1153 | + u64 v; | |
| 1154 | + | |
| 1155 | + base = dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER); | |
| 1156 | + | |
| 1157 | + v = readq(base + FME_HDR_PORT_OFST(port_id)); | |
| 1158 | + | |
| 1159 | + v &= ~FME_PORT_OFST_ACC_CTRL; | |
| 1160 | + v |= FIELD_PREP(FME_PORT_OFST_ACC_CTRL, | |
| 1161 | + is_vf ? FME_PORT_OFST_ACC_VF : FME_PORT_OFST_ACC_PF); | |
| 1162 | + | |
| 1163 | + writeq(v, base + FME_HDR_PORT_OFST(port_id)); | |
| 1164 | +} | |
| 1165 | + | |
| 1166 | +#define config_port_vf_mode(dev, id) config_port_access_mode(dev, id, true) | |
| 1167 | +#define config_port_pf_mode(dev, id) config_port_access_mode(dev, id, false) | |
| 1168 | + | |
| 1169 | +/** | |
| 1170 | + * dfl_fpga_cdev_config_ports_pf - configure ports to PF access mode | |
| 1171 | + * | |
| 1172 | + * @cdev: parent container device. | |
| 1173 | + * | |
| 1174 | + * This function is needed in sriov configuration routine. It could be used to | |
| 1175 | + * configure the all released ports from VF access mode to PF. | |
| 1176 | + */ | |
| 1177 | +void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev) | |
| 1178 | +{ | |
| 1179 | + struct dfl_feature_platform_data *pdata; | |
| 1180 | + | |
| 1181 | + mutex_lock(&cdev->lock); | |
| 1182 | + list_for_each_entry(pdata, &cdev->port_dev_list, node) { | |
| 1183 | + if (device_is_registered(&pdata->dev->dev)) | |
| 1184 | + continue; | |
| 1185 | + | |
| 1186 | + config_port_pf_mode(cdev->fme_dev, pdata->id); | |
| 1187 | + } | |
| 1188 | + mutex_unlock(&cdev->lock); | |
| 1189 | +} | |
| 1190 | +EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf); | |
| 1191 | + | |
| 1192 | +/** | |
| 1193 | + * dfl_fpga_cdev_config_ports_vf - configure ports to VF access mode | |
| 1194 | + * | |
| 1195 | + * @cdev: parent container device. | |
| 1196 | + * @num_vfs: VF device number. | |
| 1197 | + * | |
| 1198 | + * This function is needed in sriov configuration routine. It could be used to | |
| 1199 | + * configure the released ports from PF access mode to VF. | |
| 1200 | + * | |
| 1201 | + * Return: 0 on success, negative error code otherwise. | |
| 1202 | + */ | |
| 1203 | +int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs) | |
| 1204 | +{ | |
| 1205 | + struct dfl_feature_platform_data *pdata; | |
| 1206 | + int ret = 0; | |
| 1207 | + | |
| 1208 | + mutex_lock(&cdev->lock); | |
| 1209 | + /* | |
| 1210 | + * can't turn multiple ports into 1 VF device, only 1 port for 1 VF | |
| 1211 | + * device, so if released port number doesn't match VF device number, | |
| 1212 | + * then reject the request with -EINVAL error code. | |
| 1213 | + */ | |
| 1214 | + if (cdev->released_port_num != num_vfs) { | |
| 1215 | + ret = -EINVAL; | |
| 1216 | + goto done; | |
| 1217 | + } | |
| 1218 | + | |
| 1219 | + list_for_each_entry(pdata, &cdev->port_dev_list, node) { | |
| 1220 | + if (device_is_registered(&pdata->dev->dev)) | |
| 1221 | + continue; | |
| 1222 | + | |
| 1223 | + config_port_vf_mode(cdev->fme_dev, pdata->id); | |
| 1224 | + } | |
| 1225 | +done: | |
| 1226 | + mutex_unlock(&cdev->lock); | |
| 1227 | + return ret; | |
| 1228 | +} | |
| 1229 | +EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_vf); | |
| 1230 | + | |
| 1045 | 1231 | static void __exit dfl_fpga_exit(void) |
| 1046 | 1232 | { |
| 1047 | 1233 | dfl_chardev_uinit(); |
| @@ -30,8 +30,8 @@ · 29 unmodified lines | ||
| 30 | 30 | /* plus one for fme device */ |
| 31 | 31 | #define MAX_DFL_FEATURE_DEV_NUM (MAX_DFL_FPGA_PORT_NUM + 1) |
| 32 | 32 | |
| 33 | −/* Reserved 0x0 for Header Group Register and 0xff for AFU */ | |
| 34 | −#define FEATURE_ID_FIU_HEADER 0x0 | |
| 33 | +/* Reserved 0xfe for Header Group Register and 0xff for AFU */ | |
| 34 | +#define FEATURE_ID_FIU_HEADER 0xfe | |
| 35 | 35 | #define FEATURE_ID_AFU 0xff |
| 36 | 36 | |
| 37 | 37 | #define FME_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER |
| @@ -119,6 +119,7 @@ · 81 unmodified lines | ||
| 119 | 119 | #define PORT_HDR_NEXT_AFU NEXT_AFU |
| 120 | 120 | #define PORT_HDR_CAP 0x30 |
| 121 | 121 | #define PORT_HDR_CTRL 0x38 |
| 122 | +#define PORT_HDR_STS 0x40 | |
| 122 | 123 | |
| 123 | 124 | /* Port Capability Register Bitfield */ |
| 124 | 125 | #define PORT_CAP_PORT_NUM GENMASK_ULL(1, 0) /* ID of this port */ |
| @@ -130,6 +131,16 @@ · 5 unmodified lines | ||
| 130 | 131 | /* Latency tolerance reporting. '1' >= 40us, '0' < 40us.*/ |
| 131 | 132 | #define PORT_CTRL_LATENCY BIT_ULL(2) |
| 132 | 133 | #define PORT_CTRL_SFTRST_ACK BIT_ULL(4) /* HW ack for reset */ |
| 134 | + | |
| 135 | +/* Port Status Register Bitfield */ | |
| 136 | +#define PORT_STS_AP2_EVT BIT_ULL(13) /* AP2 event detected */ | |
| 137 | +#define PORT_STS_AP1_EVT BIT_ULL(12) /* AP1 event detected */ | |
| 138 | +#define PORT_STS_PWR_STATE GENMASK_ULL(11, 8) /* AFU power states */ | |
| 139 | +#define PORT_STS_PWR_STATE_NORM 0 | |
| 140 | +#define PORT_STS_PWR_STATE_AP1 1 /* 50% throttling */ | |
| 141 | +#define PORT_STS_PWR_STATE_AP2 2 /* 90% throttling */ | |
| 142 | +#define PORT_STS_PWR_STATE_AP6 6 /* 100% throttling */ | |
| 143 | + | |
| 133 | 144 | /** |
| 134 | 145 | * struct dfl_fpga_port_ops - port ops |
| 135 | 146 | * |
| @@ -154,13 +165,22 @@ void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops); · 18 unmodified lines | ||
| 154 | 165 | int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id); |
| 155 | 166 | |
| 156 | 167 | /** |
| 157 | − * struct dfl_feature_driver - sub feature's driver | |
| 168 | + * struct dfl_feature_id - dfl private feature id | |
| 158 | 169 | * |
| 159 | − * @id: sub feature id. | |
| 160 | − * @ops: ops of this sub feature. | |
| 170 | + * @id: unique dfl private feature id. | |
| 161 | 171 | */ |
| 162 | −struct dfl_feature_driver { | |
| 172 | +struct dfl_feature_id { | |
| 163 | 173 | u64 id; |
| 174 | +}; | |
| 175 | + | |
| 176 | +/** | |
| 177 | + * struct dfl_feature_driver - dfl private feature driver | |
| 178 | + * | |
| 179 | + * @id_table: id_table for dfl private features supported by this driver. | |
| 180 | + * @ops: ops of this dfl private feature driver. | |
| 181 | + */ | |
| 182 | +struct dfl_feature_driver { | |
| 183 | + const struct dfl_feature_id *id_table; | |
| 164 | 184 | const struct dfl_feature_ops *ops; |
| 165 | 185 | }; |
| 166 | 186 | |
| @@ -183,6 +203,8 @@ struct dfl_feature { · 16 unmodified lines | ||
| 183 | 203 | |
| 184 | 204 | #define DEV_STATUS_IN_USE 0 |
| 185 | 205 | |
| 206 | +#define FEATURE_DEV_ID_UNUSED (-1) | |
| 207 | + | |
| 186 | 208 | /** |
| 187 | 209 | * struct dfl_feature_platform_data - platform data for feature devices |
| 188 | 210 | * |
| @@ -191,6 +213,7 @@ struct dfl_feature { · 2 unmodified lines | ||
| 191 | 213 | * @cdev: cdev of feature dev. |
| 192 | 214 | * @dev: ptr to platform device linked with this platform data. |
| 193 | 215 | * @dfl_cdev: ptr to container device. |
| 216 | + * @id: id used for this feature device. | |
| 194 | 217 | * @disable_count: count for port disable. |
| 195 | 218 | * @num: number for sub features. |
| 196 | 219 | * @dev_status: dev status (e.g. DEV_STATUS_IN_USE). |
| @@ -203,6 +226,7 @@ struct dfl_feature_platform_data { · 6 unmodified lines | ||
| 203 | 226 | struct cdev cdev; |
| 204 | 227 | struct platform_device *dev; |
| 205 | 228 | struct dfl_fpga_cdev *dfl_cdev; |
| 229 | + int id; | |
| 206 | 230 | unsigned int disable_count; |
| 207 | 231 | unsigned long dev_status; |
| 208 | 232 | void *private; |
| @@ -373,6 +397,7 @@ void dfl_fpga_enum_info_free(struct dfl_fpga_enum_info *info); · 164 unmodified lines | ||
| 373 | 397 | * @fme_dev: FME feature device under this container device. |
| 374 | 398 | * @lock: mutex lock to protect the port device list. |
| 375 | 399 | * @port_dev_list: list of all port feature devices under this container device. |
| 400 | + * @released_port_num: released port number under this container device. | |
| 376 | 401 | */ |
| 377 | 402 | struct dfl_fpga_cdev { |
| 378 | 403 | struct device *parent; |
| @@ -380,6 +405,7 @@ struct dfl_fpga_cdev { · 1 unmodified line | ||
| 380 | 405 | struct device *fme_dev; |
| 381 | 406 | struct mutex lock; |
| 382 | 407 | struct list_head port_dev_list; |
| 408 | + int released_port_num; | |
| 383 | 409 | }; |
| 384 | 410 | |
| 385 | 411 | struct dfl_fpga_cdev * |
| @@ -407,4 +433,9 @@ dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data, · 21 unmodified lines | ||
| 407 | 433 | |
| 408 | 434 | return pdev; |
| 409 | 435 | } |
| 436 | + | |
| 437 | +int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id); | |
| 438 | +int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id); | |
| 439 | +void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev); | |
| 440 | +int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vf); | |
| 410 | 441 | #endif /* __FPGA_DFL_H */ |
| @@ -38,8 +38,7 @@ · 37 unmodified lines | ||
| 38 | 38 | #define SCOM_STATUS_PIB_RESP_MASK 0x00007000 |
| 39 | 39 | #define SCOM_STATUS_PIB_RESP_SHIFT 12 |
| 40 | 40 | |
| 41 | −#define SCOM_STATUS_ANY_ERR (SCOM_STATUS_ERR_SUMMARY | \ | |
| 42 | − SCOM_STATUS_PROTECTION | \ | |
| 41 | +#define SCOM_STATUS_ANY_ERR (SCOM_STATUS_PROTECTION | \ | |
| 43 | 42 | SCOM_STATUS_PARITY | \ |
| 44 | 43 | SCOM_STATUS_PIB_ABORT | \ |
| 45 | 44 | SCOM_STATUS_PIB_RESP_MASK) |
| @@ -251,11 +250,6 @@ static int handle_fsi2pib_status(struct scom_device *scom, uint32_t status) · 205 unmodified lines | ||
| 251 | 250 | /* Return -EBUSY on PIB abort to force a retry */ |
| 252 | 251 | if (status & SCOM_STATUS_PIB_ABORT) |
| 253 | 252 | return -EBUSY; |
| 254 | − if (status & SCOM_STATUS_ERR_SUMMARY) { | |
| 255 | − fsi_device_write(scom->fsi_dev, SCOM_FSI2PIB_RESET_REG, &dummy, | |
| 256 | − sizeof(uint32_t)); | |
| 257 | − return -EIO; | |
| 258 | − } | |
| 259 | 253 | return 0; |
| 260 | 254 | } |
| 261 | 255 | |
| @@ -363,7 +363,7 @@ struct gpio_desc *of_find_gpio(struct device *dev, const char *con_id, · 362 unmodified lines | ||
| 363 | 363 | /* Special handling for SPI GPIOs if used */ |
| 364 | 364 | if (IS_ERR(desc)) |
| 365 | 365 | desc = of_find_spi_gpio(dev, con_id, &of_flags); |
| 366 | − if (IS_ERR(desc)) { | |
| 366 | + if (IS_ERR(desc) && PTR_ERR(desc) != -EPROBE_DEFER) { | |
| 367 | 367 | /* This quirk looks up flags and all */ |
| 368 | 368 | desc = of_find_spi_cs_gpio(dev, con_id, idx, flags); |
| 369 | 369 | if (!IS_ERR(desc)) |
| @@ -956,9 +956,11 @@ static int lineevent_create(struct gpio_device *gdev, void __user *ip) · 955 unmodified lines | ||
| 956 | 956 | } |
| 957 | 957 | |
| 958 | 958 | if (eflags & GPIOEVENT_REQUEST_RISING_EDGE) |
| 959 | − irqflags |= IRQF_TRIGGER_RISING; | |
| 959 | + irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | |
| 960 | + IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING; | |
| 960 | 961 | if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE) |
| 961 | − irqflags |= IRQF_TRIGGER_FALLING; | |
| 962 | + irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ? | |
| 963 | + IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING; | |
| 962 | 964 | irqflags |= IRQF_ONESHOT; |
| 963 | 965 | |
| 964 | 966 | INIT_KFIFO(le->events); |
| @@ -1089,9 +1091,11 @@ static long gpio_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) · 124 unmodified lines | ||
| 1089 | 1091 | if (test_bit(FLAG_ACTIVE_LOW, &desc->flags)) |
| 1090 | 1092 | lineinfo.flags |= GPIOLINE_FLAG_ACTIVE_LOW; |
| 1091 | 1093 | if (test_bit(FLAG_OPEN_DRAIN, &desc->flags)) |
| 1092 | − lineinfo.flags |= GPIOLINE_FLAG_OPEN_DRAIN; | |
| 1094 | + lineinfo.flags |= (GPIOLINE_FLAG_OPEN_DRAIN | | |
| 1095 | + GPIOLINE_FLAG_IS_OUT); | |
| 1093 | 1096 | if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) |
| 1094 | − lineinfo.flags |= GPIOLINE_FLAG_OPEN_SOURCE; | |
| 1097 | + lineinfo.flags |= (GPIOLINE_FLAG_OPEN_SOURCE | | |
| 1098 | + GPIOLINE_FLAG_IS_OUT); | |
| 1095 | 1099 | |
| 1096 | 1100 | if (copy_to_user(ip, &lineinfo, sizeof(lineinfo))) |
| 1097 | 1101 | return -EFAULT; |
| @@ -1369,21 +1373,13 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, · 271 unmodified lines | ||
| 1369 | 1373 | if (status) |
| 1370 | 1374 | goto err_remove_from_list; |
| 1371 | 1375 | |
| 1372 | − status = gpiochip_irqchip_init_valid_mask(chip); | |
| 1373 | − if (status) | |
| 1374 | − goto err_remove_from_list; | |
| 1375 | − | |
| 1376 | 1376 | status = gpiochip_alloc_valid_mask(chip); |
| 1377 | 1377 | if (status) |
| 1378 | − goto err_remove_irqchip_mask; | |
| 1379 | − | |
| 1380 | − status = gpiochip_add_irqchip(chip, lock_key, request_key); | |
| 1381 | − if (status) | |
| 1382 | − goto err_free_gpiochip_mask; | |
| 1378 | + goto err_remove_from_list; | |
| 1383 | 1379 | |
| 1384 | 1380 | status = of_gpiochip_add(chip); |
| 1385 | 1381 | if (status) |
| 1386 | − goto err_remove_chip; | |
| 1382 | + goto err_free_gpiochip_mask; | |
| 1387 | 1383 | |
| 1388 | 1384 | status = gpiochip_init_valid_mask(chip); |
| 1389 | 1385 | if (status) |
| @@ -1392,18 +1388,31 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, · 2 unmodified lines | ||
| 1392 | 1388 | for (i = 0; i < chip->ngpio; i++) { |
| 1393 | 1389 | struct gpio_desc *desc = &gdev->descs[i]; |
| 1394 | 1390 | |
| 1395 | − if (chip->get_direction && gpiochip_line_is_valid(chip, i)) | |
| 1396 | − desc->flags = !chip->get_direction(chip, i) ? | |
| 1397 | − (1 << FLAG_IS_OUT) : 0; | |
| 1398 | − else | |
| 1399 | − desc->flags = !chip->direction_input ? | |
| 1400 | − (1 << FLAG_IS_OUT) : 0; | |
| 1391 | + if (chip->get_direction && gpiochip_line_is_valid(chip, i)) { | |
| 1392 | + if (!chip->get_direction(chip, i)) | |
| 1393 | + set_bit(FLAG_IS_OUT, &desc->flags); | |
| 1394 | + else | |
| 1395 | + clear_bit(FLAG_IS_OUT, &desc->flags); | |
| 1396 | + } else { | |
| 1397 | + if (!chip->direction_input) | |
| 1398 | + set_bit(FLAG_IS_OUT, &desc->flags); | |
| 1399 | + else | |
| 1400 | + clear_bit(FLAG_IS_OUT, &desc->flags); | |
| 1401 | + } | |
| 1401 | 1402 | } |
| 1402 | 1403 | |
| 1403 | 1404 | acpi_gpiochip_add(chip); |
| 1404 | 1405 | |
| 1405 | 1406 | machine_gpiochip_add(chip); |
| 1406 | 1407 | |
| 1408 | + status = gpiochip_irqchip_init_valid_mask(chip); | |
| 1409 | + if (status) | |
| 1410 | + goto err_remove_acpi_chip; | |
| 1411 | + | |
| 1412 | + status = gpiochip_add_irqchip(chip, lock_key, request_key); | |
| 1413 | + if (status) | |
| 1414 | + goto err_remove_irqchip_mask; | |
| 1415 | + | |
| 1407 | 1416 | /* |
| 1408 | 1417 | * By first adding the chardev, and then adding the device, |
| 1409 | 1418 | * we get a device node entry in sysfs under |
| @@ -1415,21 +1424,21 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, · 5 unmodified lines | ||
| 1415 | 1424 | if (gpiolib_initialized) { |
| 1416 | 1425 | status = gpiochip_setup_dev(gdev); |
| 1417 | 1426 | if (status) |
| 1418 | − goto err_remove_acpi_chip; | |
| 1427 | + goto err_remove_irqchip; | |
| 1419 | 1428 | } |
| 1420 | 1429 | return 0; |
| 1421 | 1430 | |
| 1431 | +err_remove_irqchip: | |
| 1432 | + gpiochip_irqchip_remove(chip); | |
| 1433 | +err_remove_irqchip_mask: | |
| 1434 | + gpiochip_irqchip_free_valid_mask(chip); | |
| 1422 | 1435 | err_remove_acpi_chip: |
| 1423 | 1436 | acpi_gpiochip_remove(chip); |
| 1424 | 1437 | err_remove_of_chip: |
| 1425 | 1438 | gpiochip_free_hogs(chip); |
| 1426 | 1439 | of_gpiochip_remove(chip); |
| 1427 | −err_remove_chip: | |
| 1428 | − gpiochip_irqchip_remove(chip); | |
| 1429 | 1440 | err_free_gpiochip_mask: |
| 1430 | 1441 | gpiochip_free_valid_mask(chip); |
| 1431 | −err_remove_irqchip_mask: | |
| 1432 | − gpiochip_irqchip_free_valid_mask(chip); | |
| 1433 | 1442 | err_remove_from_list: |
| 1434 | 1443 | spin_lock_irqsave(&gpio_lock, flags); |
| 1435 | 1444 | list_del(&gdev->list); |
| @@ -394,7 +394,7 @@ config DRM_R128 · 393 unmodified lines | ||
| 394 | 394 | config DRM_I810 |
| 395 | 395 | tristate "Intel I810" |
| 396 | 396 | # !PREEMPT because of missing ioctl locking |
| 397 | − depends on DRM && AGP && AGP_INTEL && (!PREEMPT || BROKEN) | |
| 397 | + depends on DRM && AGP && AGP_INTEL && (!PREEMPTION || BROKEN) | |
| 398 | 398 | help |
| 399 | 399 | Choose this option if you have an Intel I810 graphics card. If M is |
| 400 | 400 | selected, the module will be called i810. AGP support is required |
| @@ -1140,7 +1140,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( · 1139 unmodified lines | ||
| 1140 | 1140 | adev->asic_type != CHIP_FIJI && |
| 1141 | 1141 | adev->asic_type != CHIP_POLARIS10 && |
| 1142 | 1142 | adev->asic_type != CHIP_POLARIS11 && |
| 1143 | − adev->asic_type != CHIP_POLARIS12) ? | |
| 1143 | + adev->asic_type != CHIP_POLARIS12 && | |
| 1144 | + adev->asic_type != CHIP_VEGAM) ? | |
| 1144 | 1145 | VI_BO_SIZE_ALIGN : 1; |
| 1145 | 1146 | |
| 1146 | 1147 | mapping_flags = AMDGPU_VM_PAGE_READABLE; |
| @@ -574,6 +574,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = { · 573 unmodified lines | ||
| 574 | 574 | { 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX }, |
| 575 | 575 | { 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX }, |
| 576 | 576 | { 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX }, |
| 577 | + { 0x1002, 0x699f, 0x1028, 0x0814, AMDGPU_PX_QUIRK_FORCE_ATPX }, | |
| 577 | 578 | { 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX }, |
| 578 | 579 | { 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX }, |
| 579 | 580 | { 0, 0, 0, 0, 0 }, |
| @@ -1044,29 +1044,27 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p, · 1043 unmodified lines | ||
| 1044 | 1044 | return r; |
| 1045 | 1045 | } |
| 1046 | 1046 | |
| 1047 | − fence = amdgpu_ctx_get_fence(ctx, entity, | |
| 1048 | − deps[i].handle); | |
| 1047 | + fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle); | |
| 1048 | + amdgpu_ctx_put(ctx); | |
| 1049 | + | |
| 1050 | + if (IS_ERR(fence)) | |
| 1051 | + return PTR_ERR(fence); | |
| 1052 | + else if (!fence) | |
| 1053 | + continue; | |
| 1049 | 1054 | |
| 1050 | 1055 | if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) { |
| 1051 | − struct drm_sched_fence *s_fence = to_drm_sched_fence(fence); | |
| 1056 | + struct drm_sched_fence *s_fence; | |
| 1052 | 1057 | struct dma_fence *old = fence; |
| 1053 | 1058 | |
| 1059 | + s_fence = to_drm_sched_fence(fence); | |
| 1054 | 1060 | fence = dma_fence_get(&s_fence->scheduled); |
| 1055 | 1061 | dma_fence_put(old); |
| 1056 | 1062 | } |
| 1057 | 1063 | |
| 1058 | − if (IS_ERR(fence)) { | |
| 1059 | − r = PTR_ERR(fence); | |
| 1060 | − amdgpu_ctx_put(ctx); | |
| 1064 | + r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true); | |
| 1065 | + dma_fence_put(fence); | |
| 1066 | + if (r) | |
| 1061 | 1067 | return r; |
| 1062 | − } else if (fence) { | |
| 1063 | − r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, | |
| 1064 | − true); | |
| 1065 | − dma_fence_put(fence); | |
| 1066 | − amdgpu_ctx_put(ctx); | |
| 1067 | − if (r) | |
| 1068 | − return r; | |
| 1069 | − } | |
| 1070 | 1068 | } |
| 1071 | 1069 | return 0; |
| 1072 | 1070 | } |
| @@ -1145,6 +1143,9 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p, · 72 unmodified lines | ||
| 1145 | 1143 | num_deps = chunk->length_dw * 4 / |
| 1146 | 1144 | sizeof(struct drm_amdgpu_cs_chunk_sem); |
| 1147 | 1145 | |
| 1146 | + if (p->post_deps) | |
| 1147 | + return -EINVAL; | |
| 1148 | + | |
| 1148 | 1149 | p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps), |
| 1149 | 1150 | GFP_KERNEL); |
| 1150 | 1151 | p->num_post_deps = 0; |
| @@ -1168,8 +1169,7 @@ static int amdgpu_cs_process_syncobj_out_dep(struct amdgpu_cs_parser *p, · 17 unmodified lines | ||
| 1168 | 1169 | |
| 1169 | 1170 | |
| 1170 | 1171 | static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p, |
| 1171 | − struct amdgpu_cs_chunk | |
| 1172 | − *chunk) | |
| 1172 | + struct amdgpu_cs_chunk *chunk) | |
| 1173 | 1173 | { |
| 1174 | 1174 | struct drm_amdgpu_cs_chunk_syncobj *syncobj_deps; |
| 1175 | 1175 | unsigned num_deps; |
| @@ -1179,6 +1179,9 @@ static int amdgpu_cs_process_syncobj_timeline_out_dep(struct amdgpu_cs_parser *p · 3 unmodified lines | ||
| 1179 | 1179 | num_deps = chunk->length_dw * 4 / |
| 1180 | 1180 | sizeof(struct drm_amdgpu_cs_chunk_syncobj); |
| 1181 | 1181 | |
| 1182 | + if (p->post_deps) | |
| 1183 | + return -EINVAL; | |
| 1184 | + | |
| 1182 | 1185 | p->post_deps = kmalloc_array(num_deps, sizeof(*p->post_deps), |
| 1183 | 1186 | GFP_KERNEL); |
| 1184 | 1187 | p->num_post_deps = 0; |
| @@ -534,21 +534,24 @@ int amdgpu_ctx_wait_prev_fence(struct amdgpu_ctx *ctx, · 533 unmodified lines | ||
| 534 | 534 | struct drm_sched_entity *entity) |
| 535 | 535 | { |
| 536 | 536 | struct amdgpu_ctx_entity *centity = to_amdgpu_ctx_entity(entity); |
| 537 | − unsigned idx = centity->sequence & (amdgpu_sched_jobs - 1); | |
| 538 | − struct dma_fence *other = centity->fences[idx]; | |
| 537 | + struct dma_fence *other; | |
| 538 | + unsigned idx; | |
| 539 | + long r; | |
| 539 | 540 | |
| 540 | − if (other) { | |
| 541 | − signed long r; | |
| 542 | − r = dma_fence_wait(other, true); | |
| 543 | − if (r < 0) { | |
| 544 | − if (r != -ERESTARTSYS) | |
| 545 | − DRM_ERROR("Error (%ld) waiting for fence!\n", r); | |
| 541 | + spin_lock(&ctx->ring_lock); | |
| 542 | + idx = centity->sequence & (amdgpu_sched_jobs - 1); | |
| 543 | + other = dma_fence_get(centity->fences[idx]); | |
| 544 | + spin_unlock(&ctx->ring_lock); | |
| 546 | 545 | |
| 547 | − return r; | |
| 548 | − } | |
| 549 | − } | |
| 546 | + if (!other) | |
| 547 | + return 0; | |
| 550 | 548 | |
| 551 | − return 0; | |
| 549 | + r = dma_fence_wait(other, true); | |
| 550 | + if (r < 0 && r != -ERESTARTSYS) | |
| 551 | + DRM_ERROR("Error (%ld) waiting for fence!\n", r); | |
| 552 | + | |
| 553 | + dma_fence_put(other); | |
| 554 | + return r; | |
| 552 | 555 | } |
| 553 | 556 | |
| 554 | 557 | void amdgpu_ctx_mgr_init(struct amdgpu_ctx_mgr *mgr) |
| @@ -707,7 +707,7 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file *f, char __user *buf, · 706 unmodified lines | ||
| 707 | 707 | thread = (*pos & GENMASK_ULL(59, 52)) >> 52; |
| 708 | 708 | bank = (*pos & GENMASK_ULL(61, 60)) >> 60; |
| 709 | 709 | |
| 710 | − data = kmalloc_array(1024, sizeof(*data), GFP_KERNEL); | |
| 710 | + data = kcalloc(1024, sizeof(*data), GFP_KERNEL); | |
| 711 | 711 | if (!data) |
| 712 | 712 | return -ENOMEM; |
| 713 | 713 | |
| @@ -148,7 +148,7 @@ struct amdgpu_mgpu_info mgpu_info = { · 147 unmodified lines | ||
| 148 | 148 | .mutex = __MUTEX_INITIALIZER(mgpu_info.mutex), |
| 149 | 149 | }; |
| 150 | 150 | int amdgpu_ras_enable = -1; |
| 151 | −uint amdgpu_ras_mask = 0xffffffff; | |
| 151 | +uint amdgpu_ras_mask = 0xfffffffb; | |
| 152 | 152 | |
| 153 | 153 | /** |
| 154 | 154 | * DOC: vramlimit (int) |
| @@ -32,7 +32,6 @@ struct amdgpu_gds { · 31 unmodified lines | ||
| 32 | 32 | uint32_t gws_size; |
| 33 | 33 | uint32_t oa_size; |
| 34 | 34 | uint32_t gds_compute_max_wave_id; |
| 35 | − uint32_t vgt_gs_max_wave_id; | |
| 36 | 35 | }; |
| 37 | 36 | |
| 38 | 37 | struct amdgpu_gds_reg_offset { |
| @@ -159,12 +159,16 @@ static ssize_t amdgpu_get_dpm_state(struct device *dev, · 158 unmodified lines | ||
| 159 | 159 | struct amdgpu_device *adev = ddev->dev_private; |
| 160 | 160 | enum amd_pm_state_type pm; |
| 161 | 161 | |
| 162 | − if (is_support_sw_smu(adev) && adev->smu.ppt_funcs->get_current_power_state) | |
| 163 | − pm = amdgpu_smu_get_current_power_state(adev); | |
| 164 | − else if (adev->powerplay.pp_funcs->get_current_power_state) | |
| 162 | + if (is_support_sw_smu(adev)) { | |
| 163 | + if (adev->smu.ppt_funcs->get_current_power_state) | |
| 164 | + pm = amdgpu_smu_get_current_power_state(adev); | |
| 165 | + else | |
| 166 | + pm = adev->pm.dpm.user_state; | |
| 167 | + } else if (adev->powerplay.pp_funcs->get_current_power_state) { | |
| 165 | 168 | pm = amdgpu_dpm_get_current_power_state(adev); |
| 166 | − else | |
| 169 | + } else { | |
| 167 | 170 | pm = adev->pm.dpm.user_state; |
| 171 | + } | |
| 168 | 172 | |
| 169 | 173 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 170 | 174 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : |
| @@ -191,7 +195,11 @@ static ssize_t amdgpu_set_dpm_state(struct device *dev, · 20 unmodified lines | ||
| 191 | 195 | goto fail; |
| 192 | 196 | } |
| 193 | 197 | |
| 194 | − if (adev->powerplay.pp_funcs->dispatch_tasks) { | |
| 198 | + if (is_support_sw_smu(adev)) { | |
| 199 | + mutex_lock(&adev->pm.mutex); | |
| 200 | + adev->pm.dpm.user_state = state; | |
| 201 | + mutex_unlock(&adev->pm.mutex); | |
| 202 | + } else if (adev->powerplay.pp_funcs->dispatch_tasks) { | |
| 195 | 203 | amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state); |
| 196 | 204 | } else { |
| 197 | 205 | mutex_lock(&adev->pm.mutex); |
| @@ -1734,7 +1742,7 @@ static ssize_t amdgpu_hwmon_get_fan1_input(struct device *dev, · 1536 unmodified lines | ||
| 1734 | 1742 | return -EINVAL; |
| 1735 | 1743 | |
| 1736 | 1744 | if (is_support_sw_smu(adev)) { |
| 1737 | − err = smu_get_current_rpm(&adev->smu, &speed); | |
| 1745 | + err = smu_get_fan_speed_rpm(&adev->smu, &speed); | |
| 1738 | 1746 | if (err) |
| 1739 | 1747 | return err; |
| 1740 | 1748 | } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { |
| @@ -1794,7 +1802,7 @@ static ssize_t amdgpu_hwmon_get_fan1_target(struct device *dev, · 53 unmodified lines | ||
| 1794 | 1802 | return -EINVAL; |
| 1795 | 1803 | |
| 1796 | 1804 | if (is_support_sw_smu(adev)) { |
| 1797 | − err = smu_get_current_rpm(&adev->smu, &rpm); | |
| 1805 | + err = smu_get_fan_speed_rpm(&adev->smu, &rpm); | |
| 1798 | 1806 | if (err) |
| 1799 | 1807 | return err; |
| 1800 | 1808 | } else if (adev->powerplay.pp_funcs->get_fan_speed_rpm) { |
| @@ -3067,28 +3075,44 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, struct amdgpu_device *a · 1266 unmodified lines | ||
| 3067 | 3075 | if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK, (void *)&value64, &size)) |
| 3068 | 3076 | seq_printf(m, "SMC Feature Mask: 0x%016llx\n", value64); |
| 3069 | 3077 | |
| 3070 | − /* UVD clocks */ | |
| 3071 | − if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) { | |
| 3072 | − if (!value) { | |
| 3073 | − seq_printf(m, "UVD: Disabled\n"); | |
| 3074 | − } else { | |
| 3075 | − seq_printf(m, "UVD: Enabled\n"); | |
| 3076 | − if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) | |
| 3077 | − seq_printf(m, "\t%u MHz (DCLK)\n", value/100); | |
| 3078 | − if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) | |
| 3079 | − seq_printf(m, "\t%u MHz (VCLK)\n", value/100); | |
| 3078 | + if (adev->asic_type > CHIP_VEGA20) { | |
| 3079 | + /* VCN clocks */ | |
| 3080 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_POWER_STATE, (void *)&value, &size)) { | |
| 3081 | + if (!value) { | |
| 3082 | + seq_printf(m, "VCN: Disabled\n"); | |
| 3083 | + } else { | |
| 3084 | + seq_printf(m, "VCN: Enabled\n"); | |
| 3085 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) | |
| 3086 | + seq_printf(m, "\t%u MHz (DCLK)\n", value/100); | |
| 3087 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) | |
| 3088 | + seq_printf(m, "\t%u MHz (VCLK)\n", value/100); | |
| 3089 | + } | |
| 3080 | 3090 | } |
| 3081 | − } | |
| 3082 | − seq_printf(m, "\n"); | |
| 3091 | + seq_printf(m, "\n"); | |
| 3092 | + } else { | |
| 3093 | + /* UVD clocks */ | |
| 3094 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) { | |
| 3095 | + if (!value) { | |
| 3096 | + seq_printf(m, "UVD: Disabled\n"); | |
| 3097 | + } else { | |
| 3098 | + seq_printf(m, "UVD: Enabled\n"); | |
| 3099 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size)) | |
| 3100 | + seq_printf(m, "\t%u MHz (DCLK)\n", value/100); | |
| 3101 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size)) | |
| 3102 | + seq_printf(m, "\t%u MHz (VCLK)\n", value/100); | |
| 3103 | + } | |
| 3104 | + } | |
| 3105 | + seq_printf(m, "\n"); | |
| 3083 | 3106 | |
| 3084 | − /* VCE clocks */ | |
| 3085 | − if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) { | |
| 3086 | − if (!value) { | |
| 3087 | − seq_printf(m, "VCE: Disabled\n"); | |
| 3088 | − } else { | |
| 3089 | − seq_printf(m, "VCE: Enabled\n"); | |
| 3090 | − if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size)) | |
| 3091 | − seq_printf(m, "\t%u MHz (ECCLK)\n", value/100); | |
| 3107 | + /* VCE clocks */ | |
| 3108 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) { | |
| 3109 | + if (!value) { | |
| 3110 | + seq_printf(m, "VCE: Disabled\n"); | |
| 3111 | + } else { | |
| 3112 | + seq_printf(m, "VCE: Enabled\n"); | |
| 3113 | + if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size)) | |
| 3114 | + seq_printf(m, "\t%u MHz (ECCLK)\n", value/100); | |
| 3115 | + } | |
| 3092 | 3116 | } |
| 3093 | 3117 | } |
| 3094 | 3118 | |
| @@ -136,11 +136,6 @@ static int amdgpu_ras_reserve_vram(struct amdgpu_device *adev, · 135 unmodified lines | ||
| 136 | 136 | static int amdgpu_ras_release_vram(struct amdgpu_device *adev, |
| 137 | 137 | struct amdgpu_bo **bo_ptr); |
| 138 | 138 | |
| 139 | −static void amdgpu_ras_self_test(struct amdgpu_device *adev) | |
| 140 | −{ | |
| 141 | − /* TODO */ | |
| 142 | −} | |
| 143 | − | |
| 144 | 139 | static ssize_t amdgpu_ras_debugfs_read(struct file *f, char __user *buf, |
| 145 | 140 | size_t size, loff_t *pos) |
| 146 | 141 | { |
| @@ -689,6 +684,12 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev, · 542 unmodified lines | ||
| 689 | 684 | if (!obj) |
| 690 | 685 | return -EINVAL; |
| 691 | 686 | |
| 687 | + if (block_info.block_id != TA_RAS_BLOCK__UMC) { | |
| 688 | + DRM_INFO("%s error injection is not supported yet\n", | |
| 689 | + ras_block_str(info->head.block)); | |
| 690 | + return -EINVAL; | |
| 691 | + } | |
| 692 | + | |
| 692 | 693 | ret = psp_ras_trigger_error(&adev->psp, &block_info); |
| 693 | 694 | if (ret) |
| 694 | 695 | DRM_ERROR("RAS ERROR: inject %s error failed ret %d\n", |
| @@ -1557,6 +1558,12 @@ int amdgpu_ras_init(struct amdgpu_device *adev) · 862 unmodified lines | ||
| 1557 | 1558 | |
| 1558 | 1559 | amdgpu_ras_check_supported(adev, &con->hw_supported, |
| 1559 | 1560 | &con->supported); |
| 1561 | + if (!con->hw_supported) { | |
| 1562 | + amdgpu_ras_set_context(adev, NULL); | |
| 1563 | + kfree(con); | |
| 1564 | + return 0; | |
| 1565 | + } | |
| 1566 | + | |
| 1560 | 1567 | con->features = 0; |
| 1561 | 1568 | INIT_LIST_HEAD(&con->head); |
| 1562 | 1569 | /* Might need get this flag from vbios. */ |
| @@ -1570,8 +1577,6 @@ int amdgpu_ras_init(struct amdgpu_device *adev) · 7 unmodified lines | ||
| 1570 | 1577 | if (amdgpu_ras_fs_init(adev)) |
| 1571 | 1578 | goto fs_out; |
| 1572 | 1579 | |
| 1573 | − amdgpu_ras_self_test(adev); | |
| 1574 | − | |
| 1575 | 1580 | DRM_INFO("RAS INFO: ras initialized successfully, " |
| 1576 | 1581 | "hardware ability[%x] ras_mask[%x]\n", |
| 1577 | 1582 | con->hw_supported, con->supported); |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #define AMDGPU_VCN_FIRMWARE_OFFSET 256 |
| 31 | 31 | #define AMDGPU_VCN_MAX_ENC_RINGS 3 |
| 32 | 32 | |
| 33 | +#define VCN_DEC_KMD_CMD 0x80000000 | |
| 33 | 34 | #define VCN_DEC_CMD_FENCE 0x00000000 |
| 34 | 35 | #define VCN_DEC_CMD_TRAP 0x00000001 |
| 35 | 36 | #define VCN_DEC_CMD_WRITE_REG 0x00000004 |
| @@ -1441,6 +1441,15 @@ static void gfx_v10_0_init_compute_vmid(struct amdgpu_device *adev) · 1440 unmodified lines | ||
| 1441 | 1441 | } |
| 1442 | 1442 | nv_grbm_select(adev, 0, 0, 0, 0); |
| 1443 | 1443 | mutex_unlock(&adev->srbm_mutex); |
| 1444 | + | |
| 1445 | + /* Initialize all compute VMIDs to have no GDS, GWS, or OA | |
| 1446 | + acccess. These should be enabled by FW for target VMIDs. */ | |
| 1447 | + for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) { | |
| 1448 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); | |
| 1449 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); | |
| 1450 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); | |
| 1451 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); | |
| 1452 | + } | |
| 1444 | 1453 | } |
| 1445 | 1454 | |
| 1446 | 1455 | static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev) |
| @@ -4197,15 +4206,6 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring *ring, · 2750 unmodified lines | ||
| 4197 | 4206 | unsigned vmid = AMDGPU_JOB_GET_VMID(job); |
| 4198 | 4207 | u32 header, control = 0; |
| 4199 | 4208 | |
| 4200 | − /* Prevent a hw deadlock due to a wave ID mismatch between ME and GDS. | |
| 4201 | − * This resets the wave ID counters. (needed by transform feedback) | |
| 4202 | − * TODO: This might only be needed on a VMID switch when we change | |
| 4203 | − * the GDS OA mapping, not sure. | |
| 4204 | − */ | |
| 4205 | − amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | |
| 4206 | − amdgpu_ring_write(ring, mmVGT_GS_MAX_WAVE_ID); | |
| 4207 | − amdgpu_ring_write(ring, ring->adev->gds.vgt_gs_max_wave_id); | |
| 4208 | − | |
| 4209 | 4209 | if (ib->flags & AMDGPU_IB_FLAG_CE) |
| 4210 | 4210 | header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2); |
| 4211 | 4211 | else |
| @@ -4611,6 +4611,7 @@ gfx_v10_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, · 399 unmodified lines | ||
| 4611 | 4611 | cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0, |
| 4612 | 4612 | TIME_STAMP_INT_ENABLE, 0); |
| 4613 | 4613 | WREG32(cp_int_cntl_reg, cp_int_cntl); |
| 4614 | + break; | |
| 4614 | 4615 | case AMDGPU_IRQ_STATE_ENABLE: |
| 4615 | 4616 | cp_int_cntl = RREG32(cp_int_cntl_reg); |
| 4616 | 4617 | cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0, |
| @@ -4951,7 +4952,7 @@ static const struct amdgpu_ring_funcs gfx_v10_0_ring_funcs_gfx = { · 334 unmodified lines | ||
| 4951 | 4952 | 5 + /* HDP_INVL */ |
| 4952 | 4953 | 8 + 8 + /* FENCE x2 */ |
| 4953 | 4954 | 2, /* SWITCH_BUFFER */ |
| 4954 | − .emit_ib_size = 7, /* gfx_v10_0_ring_emit_ib_gfx */ | |
| 4955 | + .emit_ib_size = 4, /* gfx_v10_0_ring_emit_ib_gfx */ | |
| 4955 | 4956 | .emit_ib = gfx_v10_0_ring_emit_ib_gfx, |
| 4956 | 4957 | .emit_fence = gfx_v10_0_ring_emit_fence, |
| 4957 | 4958 | .emit_pipeline_sync = gfx_v10_0_ring_emit_pipeline_sync, |
| @@ -5102,7 +5103,6 @@ static void gfx_v10_0_set_gds_init(struct amdgpu_device *adev) · 144 unmodified lines | ||
| 5102 | 5103 | default: |
| 5103 | 5104 | adev->gds.gds_size = 0x10000; |
| 5104 | 5105 | adev->gds.gds_compute_max_wave_id = 0x4ff; |
| 5105 | − adev->gds.vgt_gs_max_wave_id = 0x3ff; | |
| 5106 | 5106 | break; |
| 5107 | 5107 | } |
| 5108 | 5108 | |
| @@ -1879,6 +1879,15 @@ static void gfx_v7_0_init_compute_vmid(struct amdgpu_device *adev) · 1878 unmodified lines | ||
| 1879 | 1879 | } |
| 1880 | 1880 | cik_srbm_select(adev, 0, 0, 0, 0); |
| 1881 | 1881 | mutex_unlock(&adev->srbm_mutex); |
| 1882 | + | |
| 1883 | + /* Initialize all compute VMIDs to have no GDS, GWS, or OA | |
| 1884 | + acccess. These should be enabled by FW for target VMIDs. */ | |
| 1885 | + for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) { | |
| 1886 | + WREG32(amdgpu_gds_reg_offset[i].mem_base, 0); | |
| 1887 | + WREG32(amdgpu_gds_reg_offset[i].mem_size, 0); | |
| 1888 | + WREG32(amdgpu_gds_reg_offset[i].gws, 0); | |
| 1889 | + WREG32(amdgpu_gds_reg_offset[i].oa, 0); | |
| 1890 | + } | |
| 1882 | 1891 | } |
| 1883 | 1892 | |
| 1884 | 1893 | static void gfx_v7_0_config_init(struct amdgpu_device *adev) |
| @@ -1321,6 +1321,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) · 1320 unmodified lines | ||
| 1321 | 1321 | return 0; |
| 1322 | 1322 | } |
| 1323 | 1323 | |
| 1324 | +static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev) | |
| 1325 | +{ | |
| 1326 | + int r; | |
| 1327 | + | |
| 1328 | + r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); | |
| 1329 | + if (unlikely(r != 0)) | |
| 1330 | + return r; | |
| 1331 | + | |
| 1332 | + r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, | |
| 1333 | + AMDGPU_GEM_DOMAIN_VRAM); | |
| 1334 | + if (!r) | |
| 1335 | + adev->gfx.rlc.clear_state_gpu_addr = | |
| 1336 | + amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj); | |
| 1337 | + | |
| 1338 | + amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); | |
| 1339 | + | |
| 1340 | + return r; | |
| 1341 | +} | |
| 1342 | + | |
| 1343 | +static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev) | |
| 1344 | +{ | |
| 1345 | + int r; | |
| 1346 | + | |
| 1347 | + if (!adev->gfx.rlc.clear_state_obj) | |
| 1348 | + return; | |
| 1349 | + | |
| 1350 | + r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); | |
| 1351 | + if (likely(r == 0)) { | |
| 1352 | + amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); | |
| 1353 | + amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); | |
| 1354 | + } | |
| 1355 | +} | |
| 1356 | + | |
| 1324 | 1357 | static void gfx_v8_0_mec_fini(struct amdgpu_device *adev) |
| 1325 | 1358 | { |
| 1326 | 1359 | amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); |
| @@ -3706,6 +3739,15 @@ static void gfx_v8_0_init_compute_vmid(struct amdgpu_device *adev) · 2379 unmodified lines | ||
| 3706 | 3739 | } |
| 3707 | 3740 | vi_srbm_select(adev, 0, 0, 0, 0); |
| 3708 | 3741 | mutex_unlock(&adev->srbm_mutex); |
| 3742 | + | |
| 3743 | + /* Initialize all compute VMIDs to have no GDS, GWS, or OA | |
| 3744 | + acccess. These should be enabled by FW for target VMIDs. */ | |
| 3745 | + for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) { | |
| 3746 | + WREG32(amdgpu_gds_reg_offset[i].mem_base, 0); | |
| 3747 | + WREG32(amdgpu_gds_reg_offset[i].mem_size, 0); | |
| 3748 | + WREG32(amdgpu_gds_reg_offset[i].gws, 0); | |
| 3749 | + WREG32(amdgpu_gds_reg_offset[i].oa, 0); | |
| 3750 | + } | |
| 3709 | 3751 | } |
| 3710 | 3752 | |
| 3711 | 3753 | static void gfx_v8_0_config_init(struct amdgpu_device *adev) |
| @@ -4776,6 +4818,10 @@ static int gfx_v8_0_hw_init(void *handle) · 1064 unmodified lines | ||
| 4776 | 4818 | gfx_v8_0_init_golden_registers(adev); |
| 4777 | 4819 | gfx_v8_0_constants_init(adev); |
| 4778 | 4820 | |
| 4821 | + r = gfx_v8_0_csb_vram_pin(adev); | |
| 4822 | + if (r) | |
| 4823 | + return r; | |
| 4824 | + | |
| 4779 | 4825 | r = adev->gfx.rlc.funcs->resume(adev); |
| 4780 | 4826 | if (r) |
| 4781 | 4827 | return r; |
| @@ -4892,6 +4938,9 @@ static int gfx_v8_0_hw_fini(void *handle) · 110 unmodified lines | ||
| 4892 | 4938 | else |
| 4893 | 4939 | pr_err("rlc is busy, skip halt rlc\n"); |
| 4894 | 4940 | amdgpu_gfx_rlc_exit_safe_mode(adev); |
| 4941 | + | |
| 4942 | + gfx_v8_0_csb_vram_unpin(adev); | |
| 4943 | + | |
| 4895 | 4944 | return 0; |
| 4896 | 4945 | } |
| 4897 | 4946 | |
| @@ -596,14 +596,18 @@ static void gfx_v9_0_check_if_need_gfxoff(struct amdgpu_device *adev) · 595 unmodified lines | ||
| 596 | 596 | case CHIP_VEGA20: |
| 597 | 597 | break; |
| 598 | 598 | case CHIP_RAVEN: |
| 599 | − if (adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8) | |
| 600 | − break; | |
| 601 | − if ((adev->gfx.rlc_fw_version != 106 && | |
| 602 | − adev->gfx.rlc_fw_version < 531) || | |
| 603 | − (adev->gfx.rlc_fw_version == 53815) || | |
| 604 | − (adev->gfx.rlc_feature_version < 1) || | |
| 605 | − !adev->gfx.rlc.is_rlc_v2_1) | |
| 599 | + if (!(adev->rev_id >= 0x8 || adev->pdev->device == 0x15d8) | |
| 600 | + &&((adev->gfx.rlc_fw_version != 106 && | |
| 601 | + adev->gfx.rlc_fw_version < 531) || | |
| 602 | + (adev->gfx.rlc_fw_version == 53815) || | |
| 603 | + (adev->gfx.rlc_feature_version < 1) || | |
| 604 | + !adev->gfx.rlc.is_rlc_v2_1)) | |
| 606 | 605 | adev->pm.pp_feature &= ~PP_GFXOFF_MASK; |
| 606 | + | |
| 607 | + if (adev->pm.pp_feature & PP_GFXOFF_MASK) | |
| 608 | + adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | | |
| 609 | + AMD_PG_SUPPORT_CP | | |
| 610 | + AMD_PG_SUPPORT_RLC_SMU_HS; | |
| 607 | 611 | break; |
| 608 | 612 | default: |
| 609 | 613 | break; |
| @@ -1918,6 +1922,15 @@ static void gfx_v9_0_init_compute_vmid(struct amdgpu_device *adev) · 1308 unmodified lines | ||
| 1918 | 1922 | } |
| 1919 | 1923 | soc15_grbm_select(adev, 0, 0, 0, 0); |
| 1920 | 1924 | mutex_unlock(&adev->srbm_mutex); |
| 1925 | + | |
| 1926 | + /* Initialize all compute VMIDs to have no GDS, GWS, or OA | |
| 1927 | + acccess. These should be enabled by FW for target VMIDs. */ | |
| 1928 | + for (i = FIRST_COMPUTE_VMID; i < LAST_COMPUTE_VMID; i++) { | |
| 1929 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); | |
| 1930 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); | |
| 1931 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); | |
| 1932 | + WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); | |
| 1933 | + } | |
| 1921 | 1934 | } |
| 1922 | 1935 | |
| 1923 | 1936 | static void gfx_v9_0_constants_init(struct amdgpu_device *adev) |
| @@ -4860,7 +4873,7 @@ static void gfx_v9_0_ring_soft_recovery(struct amdgpu_ring *ring, unsigned vmid) · 2936 unmodified lines | ||
| 4860 | 4873 | value = REG_SET_FIELD(value, SQ_CMD, MODE, 0x01); |
| 4861 | 4874 | value = REG_SET_FIELD(value, SQ_CMD, CHECK_VMID, 1); |
| 4862 | 4875 | value = REG_SET_FIELD(value, SQ_CMD, VM_ID, vmid); |
| 4863 | − WREG32(mmSQ_CMD, value); | |
| 4876 | + WREG32_SOC15(GC, 0, mmSQ_CMD, value); | |
| 4864 | 4877 | } |
| 4865 | 4878 | |
| 4866 | 4879 | static void gfx_v9_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev, |
| @@ -552,7 +552,6 @@ static int nv_common_early_init(void *handle) · 551 unmodified lines | ||
| 552 | 552 | AMD_CG_SUPPORT_BIF_LS; |
| 553 | 553 | adev->pg_flags = AMD_PG_SUPPORT_VCN | |
| 554 | 554 | AMD_PG_SUPPORT_VCN_DPG | |
| 555 | − AMD_PG_SUPPORT_MMHUB | | |
| 556 | 555 | AMD_PG_SUPPORT_ATHUB; |
| 557 | 556 | adev->external_rev_id = adev->rev_id + 0x1; |
| 558 | 557 | break; |
| @@ -992,11 +992,6 @@ static int soc15_common_early_init(void *handle) · 991 unmodified lines | ||
| 992 | 992 | |
| 993 | 993 | adev->pg_flags = AMD_PG_SUPPORT_SDMA | AMD_PG_SUPPORT_VCN; |
| 994 | 994 | } |
| 995 | − | |
| 996 | − if (adev->pm.pp_feature & PP_GFXOFF_MASK) | |
| 997 | − adev->pg_flags |= AMD_PG_SUPPORT_GFX_PG | | |
| 998 | − AMD_PG_SUPPORT_CP | | |
| 999 | − AMD_PG_SUPPORT_RLC_SMU_HS; | |
| 1000 | 995 | break; |
| 1001 | 996 | default: |
| 1002 | 997 | /* FIXME: not supported yet */ |
| @@ -372,11 +372,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev) · 371 unmodified lines | ||
| 372 | 372 | WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, |
| 373 | 373 | upper_32_bits(adev->vcn.gpu_addr)); |
| 374 | 374 | offset = size; |
| 375 | − /* No signed header for now from firmware | |
| 376 | 375 | WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, |
| 377 | 376 | AMDGPU_UVD_FIRMWARE_OFFSET >> 3); |
| 378 | − */ | |
| 379 | − WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); | |
| 380 | 377 | } |
| 381 | 378 | |
| 382 | 379 | WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); |
| @@ -1488,7 +1485,7 @@ static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring) · 1105 unmodified lines | ||
| 1488 | 1485 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET, 0)); |
| 1489 | 1486 | amdgpu_ring_write(ring, 0); |
| 1490 | 1487 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1491 | − amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_START << 1); | |
| 1488 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1)); | |
| 1492 | 1489 | } |
| 1493 | 1490 | |
| 1494 | 1491 | /** |
| @@ -1501,7 +1498,7 @@ static void vcn_v2_0_dec_ring_insert_start(struct amdgpu_ring *ring) · 6 unmodified lines | ||
| 1501 | 1498 | static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring) |
| 1502 | 1499 | { |
| 1503 | 1500 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1504 | − amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_END << 1); | |
| 1501 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_END << 1)); | |
| 1505 | 1502 | } |
| 1506 | 1503 | |
| 1507 | 1504 | /** |
| @@ -1546,7 +1543,7 @@ static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 · 38 unmodified lines | ||
| 1546 | 1543 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff); |
| 1547 | 1544 | |
| 1548 | 1545 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1549 | − amdgpu_ring_write(ring, VCN_DEC_CMD_FENCE << 1); | |
| 1546 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_FENCE << 1)); | |
| 1550 | 1547 | |
| 1551 | 1548 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET, 0)); |
| 1552 | 1549 | amdgpu_ring_write(ring, 0); |
| @@ -1556,7 +1553,7 @@ static void vcn_v2_0_dec_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 · 3 unmodified lines | ||
| 1556 | 1553 | |
| 1557 | 1554 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1558 | 1555 | |
| 1559 | − amdgpu_ring_write(ring, VCN_DEC_CMD_TRAP << 1); | |
| 1556 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_TRAP << 1)); | |
| 1560 | 1557 | } |
| 1561 | 1558 | |
| 1562 | 1559 | /** |
| @@ -1600,7 +1597,7 @@ static void vcn_v2_0_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, · 37 unmodified lines | ||
| 1600 | 1597 | |
| 1601 | 1598 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1602 | 1599 | |
| 1603 | − amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1); | |
| 1600 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_REG_READ_COND_WAIT << 1)); | |
| 1604 | 1601 | } |
| 1605 | 1602 | |
| 1606 | 1603 | static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring, |
| @@ -1629,7 +1626,7 @@ static void vcn_v2_0_dec_ring_emit_wreg(struct amdgpu_ring *ring, · 22 unmodified lines | ||
| 1629 | 1626 | |
| 1630 | 1627 | amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); |
| 1631 | 1628 | |
| 1632 | − amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1); | |
| 1629 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_WRITE_REG << 1)); | |
| 1633 | 1630 | } |
| 1634 | 1631 | |
| 1635 | 1632 | /** |
| @@ -2082,6 +2079,36 @@ static int vcn_v2_0_process_interrupt(struct amdgpu_device *adev, · 446 unmodified lines | ||
| 2082 | 2079 | return 0; |
| 2083 | 2080 | } |
| 2084 | 2081 | |
| 2082 | +static int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring) | |
| 2083 | +{ | |
| 2084 | + struct amdgpu_device *adev = ring->adev; | |
| 2085 | + uint32_t tmp = 0; | |
| 2086 | + unsigned i; | |
| 2087 | + int r; | |
| 2088 | + | |
| 2089 | + WREG32(adev->vcn.external.scratch9, 0xCAFEDEAD); | |
| 2090 | + r = amdgpu_ring_alloc(ring, 4); | |
| 2091 | + if (r) | |
| 2092 | + return r; | |
| 2093 | + amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0)); | |
| 2094 | + amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1)); | |
| 2095 | + amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0)); | |
| 2096 | + amdgpu_ring_write(ring, 0xDEADBEEF); | |
| 2097 | + amdgpu_ring_commit(ring); | |
| 2098 | + for (i = 0; i < adev->usec_timeout; i++) { | |
| 2099 | + tmp = RREG32(adev->vcn.external.scratch9); | |
| 2100 | + if (tmp == 0xDEADBEEF) | |
| 2101 | + break; | |
| 2102 | + DRM_UDELAY(1); | |
| 2103 | + } | |
| 2104 | + | |
| 2105 | + if (i >= adev->usec_timeout) | |
| 2106 | + r = -ETIMEDOUT; | |
| 2107 | + | |
| 2108 | + return r; | |
| 2109 | +} | |
| 2110 | + | |
| 2111 | + | |
| 2085 | 2112 | static int vcn_v2_0_set_powergating_state(void *handle, |
| 2086 | 2113 | enum amd_powergating_state state) |
| 2087 | 2114 | { |
| @@ -2145,7 +2172,7 @@ static const struct amdgpu_ring_funcs vcn_v2_0_dec_ring_vm_funcs = { · 57 unmodified lines | ||
| 2145 | 2172 | .emit_ib = vcn_v2_0_dec_ring_emit_ib, |
| 2146 | 2173 | .emit_fence = vcn_v2_0_dec_ring_emit_fence, |
| 2147 | 2174 | .emit_vm_flush = vcn_v2_0_dec_ring_emit_vm_flush, |
| 2148 | − .test_ring = amdgpu_vcn_dec_ring_test_ring, | |
| 2175 | + .test_ring = vcn_v2_0_dec_ring_test_ring, | |
| 2149 | 2176 | .test_ib = amdgpu_vcn_dec_ring_test_ib, |
| 2150 | 2177 | .insert_nop = vcn_v2_0_dec_ring_insert_nop, |
| 2151 | 2178 | .insert_start = vcn_v2_0_dec_ring_insert_start, |
| @@ -1567,32 +1567,6 @@ copy_from_user_failed: · 1566 unmodified lines | ||
| 1567 | 1567 | return err; |
| 1568 | 1568 | } |
| 1569 | 1569 | |
| 1570 | −static int kfd_ioctl_alloc_queue_gws(struct file *filep, | |
| 1571 | − struct kfd_process *p, void *data) | |
| 1572 | −{ | |
| 1573 | − int retval; | |
| 1574 | − struct kfd_ioctl_alloc_queue_gws_args *args = data; | |
| 1575 | − struct kfd_dev *dev; | |
| 1576 | − | |
| 1577 | − if (!hws_gws_support) | |
| 1578 | − return -ENODEV; | |
| 1579 | − | |
| 1580 | − dev = kfd_device_by_id(args->gpu_id); | |
| 1581 | − if (!dev) { | |
| 1582 | − pr_debug("Could not find gpu id 0x%x\n", args->gpu_id); | |
| 1583 | − return -ENODEV; | |
| 1584 | − } | |
| 1585 | − if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) | |
| 1586 | − return -ENODEV; | |
| 1587 | − | |
| 1588 | − mutex_lock(&p->mutex); | |
| 1589 | − retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL); | |
| 1590 | − mutex_unlock(&p->mutex); | |
| 1591 | − | |
| 1592 | − args->first_gws = 0; | |
| 1593 | − return retval; | |
| 1594 | −} | |
| 1595 | − | |
| 1596 | 1570 | static int kfd_ioctl_get_dmabuf_info(struct file *filep, |
| 1597 | 1571 | struct kfd_process *p, void *data) |
| 1598 | 1572 | { |
| @@ -1795,8 +1769,6 @@ static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { · 196 unmodified lines | ||
| 1795 | 1769 | AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF, |
| 1796 | 1770 | kfd_ioctl_import_dmabuf, 0), |
| 1797 | 1771 | |
| 1798 | − AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS, | |
| 1799 | − kfd_ioctl_alloc_queue_gws, 0), | |
| 1800 | 1772 | }; |
| 1801 | 1773 | |
| 1802 | 1774 | #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls) |
| @@ -668,6 +668,7 @@ static int kfd_fill_gpu_cache_info(struct kfd_dev *kdev, · 667 unmodified lines | ||
| 668 | 668 | case CHIP_RAVEN: |
| 669 | 669 | pcache_info = raven_cache_info; |
| 670 | 670 | num_of_cache_types = ARRAY_SIZE(raven_cache_info); |
| 671 | + break; | |
| 671 | 672 | case CHIP_NAVI10: |
| 672 | 673 | pcache_info = navi10_cache_info; |
| 673 | 674 | num_of_cache_types = ARRAY_SIZE(navi10_cache_info); |
| @@ -429,7 +429,6 @@ struct mqd_manager *mqd_manager_init_v10(enum KFD_MQD_TYPE type, · 428 unmodified lines | ||
| 429 | 429 | |
| 430 | 430 | switch (type) { |
| 431 | 431 | case KFD_MQD_TYPE_CP: |
| 432 | − pr_debug("%s@%i\n", __func__, __LINE__); | |
| 433 | 432 | case KFD_MQD_TYPE_COMPUTE: |
| 434 | 433 | pr_debug("%s@%i\n", __func__, __LINE__); |
| 435 | 434 | mqd->allocate_mqd = allocate_mqd; |
| @@ -3131,13 +3131,25 @@ static enum dc_color_depth · 3130 unmodified lines | ||
| 3131 | 3131 | convert_color_depth_from_display_info(const struct drm_connector *connector, |
| 3132 | 3132 | const struct drm_connector_state *state) |
| 3133 | 3133 | { |
| 3134 | − uint32_t bpc = connector->display_info.bpc; | |
| 3134 | + uint8_t bpc = (uint8_t)connector->display_info.bpc; | |
| 3135 | + | |
| 3136 | + /* Assume 8 bpc by default if no bpc is specified. */ | |
| 3137 | + bpc = bpc ? bpc : 8; | |
| 3135 | 3138 | |
| 3136 | 3139 | if (!state) |
| 3137 | 3140 | state = connector->state; |
| 3138 | 3141 | |
| 3139 | 3142 | if (state) { |
| 3140 | − bpc = state->max_bpc; | |
| 3143 | + /* | |
| 3144 | + * Cap display bpc based on the user requested value. | |
| 3145 | + * | |
| 3146 | + * The value for state->max_bpc may not correctly updated | |
| 3147 | + * depending on when the connector gets added to the state | |
| 3148 | + * or if this was called outside of atomic check, so it | |
| 3149 | + * can't be used directly. | |
| 3150 | + */ | |
| 3151 | + bpc = min(bpc, state->max_requested_bpc); | |
| 3152 | + | |
| 3141 | 3153 | /* Round down to the nearest even number. */ |
| 3142 | 3154 | bpc = bpc - (bpc & 1); |
| 3143 | 3155 | } |
| @@ -262,12 +262,12 @@ void dce110_clk_mgr_construct( · 261 unmodified lines | ||
| 262 | 262 | struct dc_context *ctx, |
| 263 | 263 | struct clk_mgr_internal *clk_mgr) |
| 264 | 264 | { |
| 265 | + dce_clk_mgr_construct(ctx, clk_mgr); | |
| 266 | + | |
| 265 | 267 | memcpy(clk_mgr->max_clks_by_state, |
| 266 | 268 | dce110_max_clks_by_state, |
| 267 | 269 | sizeof(dce110_max_clks_by_state)); |
| 268 | 270 | |
| 269 | − dce_clk_mgr_construct(ctx, clk_mgr); | |
| 270 | − | |
| 271 | 271 | clk_mgr->regs = &disp_clk_regs; |
| 272 | 272 | clk_mgr->clk_mgr_shift = &disp_clk_shift; |
| 273 | 273 | clk_mgr->clk_mgr_mask = &disp_clk_mask; |
| @@ -226,12 +226,12 @@ void dce112_clk_mgr_construct( · 225 unmodified lines | ||
| 226 | 226 | struct dc_context *ctx, |
| 227 | 227 | struct clk_mgr_internal *clk_mgr) |
| 228 | 228 | { |
| 229 | + dce_clk_mgr_construct(ctx, clk_mgr); | |
| 230 | + | |
| 229 | 231 | memcpy(clk_mgr->max_clks_by_state, |
| 230 | 232 | dce112_max_clks_by_state, |
| 231 | 233 | sizeof(dce112_max_clks_by_state)); |
| 232 | 234 | |
| 233 | − dce_clk_mgr_construct(ctx, clk_mgr); | |
| 234 | − | |
| 235 | 235 | clk_mgr->regs = &disp_clk_regs; |
| 236 | 236 | clk_mgr->clk_mgr_shift = &disp_clk_shift; |
| 237 | 237 | clk_mgr->clk_mgr_mask = &disp_clk_mask; |
| @@ -127,12 +127,12 @@ static struct clk_mgr_funcs dce120_funcs = { · 126 unmodified lines | ||
| 127 | 127 | |
| 128 | 128 | void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) |
| 129 | 129 | { |
| 130 | + dce_clk_mgr_construct(ctx, clk_mgr); | |
| 131 | + | |
| 130 | 132 | memcpy(clk_mgr->max_clks_by_state, |
| 131 | 133 | dce120_max_clks_by_state, |
| 132 | 134 | sizeof(dce120_max_clks_by_state)); |
| 133 | 135 | |
| 134 | − dce_clk_mgr_construct(ctx, clk_mgr); | |
| 135 | − | |
| 136 | 136 | clk_mgr->base.dprefclk_khz = 600000; |
| 137 | 137 | clk_mgr->base.funcs = &dce120_funcs; |
| 138 | 138 | } |
| @@ -301,6 +301,8 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, · 300 unmodified lines | ||
| 301 | 301 | void dcn2_init_clocks(struct clk_mgr *clk_mgr) |
| 302 | 302 | { |
| 303 | 303 | memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); |
| 304 | + // Assumption is that boot state always supports pstate | |
| 305 | + clk_mgr->clks.p_state_change_support = true; | |
| 304 | 306 | } |
| 305 | 307 | |
| 306 | 308 | void dcn2_enable_pme_wa(struct clk_mgr *clk_mgr_base) |
| @@ -331,6 +333,7 @@ void dcn20_clk_mgr_construct( · 24 unmodified lines | ||
| 331 | 333 | struct dccg *dccg) |
| 332 | 334 | { |
| 333 | 335 | clk_mgr->base.ctx = ctx; |
| 336 | + clk_mgr->pp_smu = pp_smu; | |
| 334 | 337 | clk_mgr->base.funcs = &dcn2_funcs; |
| 335 | 338 | clk_mgr->regs = &clk_mgr_regs; |
| 336 | 339 | clk_mgr->clk_mgr_shift = &clk_mgr_shift; |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | */ |
| 24 | 24 | |
| 25 | 25 | #include <linux/slab.h> |
| 26 | +#include <linux/mm.h> | |
| 26 | 27 | |
| 27 | 28 | #include "dm_services.h" |
| 28 | 29 | |
| @@ -502,8 +503,10 @@ void dc_stream_set_static_screen_events(struct dc *dc, · 473 unmodified lines | ||
| 502 | 503 | |
| 503 | 504 | static void destruct(struct dc *dc) |
| 504 | 505 | { |
| 505 | − dc_release_state(dc->current_state); | |
| 506 | − dc->current_state = NULL; | |
| 506 | + if (dc->current_state) { | |
| 507 | + dc_release_state(dc->current_state); | |
| 508 | + dc->current_state = NULL; | |
| 509 | + } | |
| 507 | 510 | |
| 508 | 511 | destroy_links(dc); |
| 509 | 512 | |
| @@ -1169,8 +1172,8 @@ bool dc_post_update_surfaces_to_stream(struct dc *dc) · 659 unmodified lines | ||
| 1169 | 1172 | |
| 1170 | 1173 | struct dc_state *dc_create_state(struct dc *dc) |
| 1171 | 1174 | { |
| 1172 | − struct dc_state *context = kzalloc(sizeof(struct dc_state), | |
| 1173 | − GFP_KERNEL); | |
| 1175 | + struct dc_state *context = kvzalloc(sizeof(struct dc_state), | |
| 1176 | + GFP_KERNEL); | |
| 1174 | 1177 | |
| 1175 | 1178 | if (!context) |
| 1176 | 1179 | return NULL; |
| @@ -1190,11 +1193,11 @@ struct dc_state *dc_create_state(struct dc *dc) · 13 unmodified lines | ||
| 1190 | 1193 | struct dc_state *dc_copy_state(struct dc_state *src_ctx) |
| 1191 | 1194 | { |
| 1192 | 1195 | int i, j; |
| 1193 | − struct dc_state *new_ctx = kmemdup(src_ctx, | |
| 1194 | − sizeof(struct dc_state), GFP_KERNEL); | |
| 1196 | + struct dc_state *new_ctx = kvmalloc(sizeof(struct dc_state), GFP_KERNEL); | |
| 1195 | 1197 | |
| 1196 | 1198 | if (!new_ctx) |
| 1197 | 1199 | return NULL; |
| 1200 | + memcpy(new_ctx, src_ctx, sizeof(struct dc_state)); | |
| 1198 | 1201 | |
| 1199 | 1202 | for (i = 0; i < MAX_PIPES; i++) { |
| 1200 | 1203 | struct pipe_ctx *cur_pipe = &new_ctx->res_ctx.pipe_ctx[i]; |
| @@ -1228,7 +1231,7 @@ static void dc_state_free(struct kref *kref) · 27 unmodified lines | ||
| 1228 | 1231 | { |
| 1229 | 1232 | struct dc_state *context = container_of(kref, struct dc_state, refcount); |
| 1230 | 1233 | dc_resource_state_destruct(context); |
| 1231 | − kfree(context); | |
| 1234 | + kvfree(context); | |
| 1232 | 1235 | } |
| 1233 | 1236 | |
| 1234 | 1237 | void dc_release_state(struct dc_state *context) |
| @@ -532,6 +532,7 @@ static void read_edp_current_link_settings_on_detect(struct dc_link *link) · 531 unmodified lines | ||
| 532 | 532 | uint32_t read_dpcd_retry_cnt = 10; |
| 533 | 533 | enum dc_status status = DC_ERROR_UNEXPECTED; |
| 534 | 534 | int i; |
| 535 | + union max_down_spread max_down_spread = { {0} }; | |
| 535 | 536 | |
| 536 | 537 | // Read DPCD 00101h to find out the number of lanes currently set |
| 537 | 538 | for (i = 0; i < read_dpcd_retry_cnt; i++) { |
| @@ -553,8 +554,6 @@ static void read_edp_current_link_settings_on_detect(struct dc_link *link) · 15 unmodified lines | ||
| 553 | 554 | msleep(8); |
| 554 | 555 | } |
| 555 | 556 | |
| 556 | − ASSERT(status == DC_OK); | |
| 557 | − | |
| 558 | 557 | // Read DPCD 00100h to find if standard link rates are set |
| 559 | 558 | core_link_read_dpcd(link, DP_LINK_BW_SET, |
| 560 | 559 | &link_bw_set, sizeof(link_bw_set)); |
| @@ -576,6 +575,12 @@ static void read_edp_current_link_settings_on_detect(struct dc_link *link) · 15 unmodified lines | ||
| 576 | 575 | link->cur_link_settings.link_rate = link_bw_set; |
| 577 | 576 | link->cur_link_settings.use_link_rate_set = false; |
| 578 | 577 | } |
| 578 | + // Read DPCD 00003h to find the max down spread. | |
| 579 | + core_link_read_dpcd(link, DP_MAX_DOWNSPREAD, | |
| 580 | + &max_down_spread.raw, sizeof(max_down_spread)); | |
| 581 | + link->cur_link_settings.link_spread = | |
| 582 | + max_down_spread.bits.MAX_DOWN_SPREAD ? | |
| 583 | + LINK_SPREAD_05_DOWNSPREAD_30KHZ : LINK_SPREAD_DISABLED; | |
| 579 | 584 | } |
| 580 | 585 | |
| 581 | 586 | static bool detect_dp( |
| @@ -717,13 +722,6 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) · 135 unmodified lines | ||
| 717 | 722 | return false; |
| 718 | 723 | } |
| 719 | 724 | |
| 720 | − if (link->connector_signal == SIGNAL_TYPE_EDP) { | |
| 721 | − /* On detect, we want to make sure current link settings are | |
| 722 | − * up to date, especially if link was powered on by GOP. | |
| 723 | − */ | |
| 724 | − read_edp_current_link_settings_on_detect(link); | |
| 725 | − } | |
| 726 | − | |
| 727 | 725 | prev_sink = link->local_sink; |
| 728 | 726 | if (prev_sink != NULL) { |
| 729 | 727 | dc_sink_retain(prev_sink); |
| @@ -765,6 +763,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) · 35 unmodified lines | ||
| 765 | 763 | } |
| 766 | 764 | |
| 767 | 765 | case SIGNAL_TYPE_EDP: { |
| 766 | + read_edp_current_link_settings_on_detect(link); | |
| 768 | 767 | detect_edp_sink_caps(link); |
| 769 | 768 | sink_caps.transaction_type = |
| 770 | 769 | DDC_TRANSACTION_TYPE_I2C_OVER_AUX; |
| @@ -2329,7 +2328,7 @@ bool dc_link_set_backlight_level(const struct dc_link *link, · 1558 unmodified lines | ||
| 2329 | 2328 | if (core_dc->current_state->res_ctx.pipe_ctx[i].stream) { |
| 2330 | 2329 | if (core_dc->current_state->res_ctx. |
| 2331 | 2330 | pipe_ctx[i].stream->link |
| 2332 | − == link) | |
| 2331 | + == link) { | |
| 2333 | 2332 | /* DMCU -1 for all controller id values, |
| 2334 | 2333 | * therefore +1 here |
| 2335 | 2334 | */ |
| @@ -2337,6 +2336,13 @@ bool dc_link_set_backlight_level(const struct dc_link *link, · 1 unmodified line | ||
| 2337 | 2336 | core_dc->current_state-> |
| 2338 | 2337 | res_ctx.pipe_ctx[i].stream_res.tg->inst + |
| 2339 | 2338 | 1; |
| 2339 | + | |
| 2340 | + /* Disable brightness ramping when the display is blanked | |
| 2341 | + * as it can hang the DMCU | |
| 2342 | + */ | |
| 2343 | + if (core_dc->current_state->res_ctx.pipe_ctx[i].plane_state == NULL) | |
| 2344 | + frame_ramp = 0; | |
| 2345 | + } | |
| 2340 | 2346 | } |
| 2341 | 2347 | } |
| 2342 | 2348 | abm->funcs->set_backlight_level_pwm( |
| @@ -2984,8 +2990,10 @@ void dc_link_set_preferred_link_settings(struct dc *dc, · 641 unmodified lines | ||
| 2984 | 2990 | |
| 2985 | 2991 | /* Retrain with preferred link settings only relevant for |
| 2986 | 2992 | * DP signal type |
| 2993 | + * Check for non-DP signal or if passive dongle present | |
| 2987 | 2994 | */ |
| 2988 | − if (!dc_is_dp_signal(link->connector_signal)) | |
| 2995 | + if (!dc_is_dp_signal(link->connector_signal) || | |
| 2996 | + link->dongle_max_pix_clk > 0) | |
| 2989 | 2997 | return; |
| 2990 | 2998 | |
| 2991 | 2999 | for (i = 0; i < MAX_PIPES; i++) { |
| @@ -2230,18 +2230,25 @@ static void get_active_converter_info( · 2229 unmodified lines | ||
| 2230 | 2230 | link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE; |
| 2231 | 2231 | ddc_service_set_dongle_type(link->ddc, |
| 2232 | 2232 | link->dpcd_caps.dongle_type); |
| 2233 | + link->dpcd_caps.is_branch_dev = false; | |
| 2233 | 2234 | return; |
| 2234 | 2235 | } |
| 2235 | 2236 | |
| 2236 | 2237 | /* DPCD 0x5 bit 0 = 1, it indicate it's branch device */ |
| 2237 | − link->dpcd_caps.is_branch_dev = ds_port.fields.PORT_PRESENT; | |
| 2238 | + if (ds_port.fields.PORT_TYPE == DOWNSTREAM_DP) { | |
| 2239 | + link->dpcd_caps.is_branch_dev = false; | |
| 2240 | + } | |
| 2241 | + | |
| 2242 | + else { | |
| 2243 | + link->dpcd_caps.is_branch_dev = ds_port.fields.PORT_PRESENT; | |
| 2244 | + } | |
| 2238 | 2245 | |
| 2239 | 2246 | switch (ds_port.fields.PORT_TYPE) { |
| 2240 | 2247 | case DOWNSTREAM_VGA: |
| 2241 | 2248 | link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_VGA_CONVERTER; |
| 2242 | 2249 | break; |
| 2243 | − case DOWNSTREAM_DVI_HDMI: | |
| 2244 | − /* At this point we don't know is it DVI or HDMI, | |
| 2250 | + case DOWNSTREAM_DVI_HDMI_DP_PLUS_PLUS: | |
| 2251 | + /* At this point we don't know is it DVI or HDMI or DP++, | |
| 2245 | 2252 | * assume DVI.*/ |
| 2246 | 2253 | link->dpcd_caps.dongle_type = DISPLAY_DONGLE_DP_DVI_CONVERTER; |
| 2247 | 2254 | break; |
| @@ -2258,6 +2265,10 @@ static void get_active_converter_info( · 10 unmodified lines | ||
| 2258 | 2265 | det_caps, sizeof(det_caps)); |
| 2259 | 2266 | |
| 2260 | 2267 | switch (port_caps->bits.DWN_STRM_PORTX_TYPE) { |
| 2268 | + /*Handle DP case as DONGLE_NONE*/ | |
| 2269 | + case DOWN_STREAM_DETAILED_DP: | |
| 2270 | + link->dpcd_caps.dongle_type = DISPLAY_DONGLE_NONE; | |
| 2271 | + break; | |
| 2261 | 2272 | case DOWN_STREAM_DETAILED_VGA: |
| 2262 | 2273 | link->dpcd_caps.dongle_type = |
| 2263 | 2274 | DISPLAY_DONGLE_DP_VGA_CONVERTER; |
| @@ -2267,6 +2278,8 @@ static void get_active_converter_info( · 3 unmodified lines | ||
| 2267 | 2278 | DISPLAY_DONGLE_DP_DVI_CONVERTER; |
| 2268 | 2279 | break; |
| 2269 | 2280 | case DOWN_STREAM_DETAILED_HDMI: |
| 2281 | + case DOWN_STREAM_DETAILED_DP_PLUS_PLUS: | |
| 2282 | + /*Handle DP++ active converter case, process DP++ case as HDMI case according DP1.4 spec*/ | |
| 2270 | 2283 | link->dpcd_caps.dongle_type = |
| 2271 | 2284 | DISPLAY_DONGLE_DP_HDMI_CONVERTER; |
| 2272 | 2285 | |
| @@ -2282,14 +2295,18 @@ static void get_active_converter_info( · 9 unmodified lines | ||
| 2282 | 2295 | |
| 2283 | 2296 | link->dpcd_caps.dongle_caps.is_dp_hdmi_s3d_converter = |
| 2284 | 2297 | hdmi_caps.bits.FRAME_SEQ_TO_FRAME_PACK; |
| 2285 | − link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_pass_through = | |
| 2286 | − hdmi_caps.bits.YCrCr422_PASS_THROUGH; | |
| 2287 | − link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_pass_through = | |
| 2288 | − hdmi_caps.bits.YCrCr420_PASS_THROUGH; | |
| 2289 | − link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_converter = | |
| 2290 | − hdmi_caps.bits.YCrCr422_CONVERSION; | |
| 2291 | − link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_converter = | |
| 2292 | − hdmi_caps.bits.YCrCr420_CONVERSION; | |
| 2298 | + /*YCBCR capability only for HDMI case*/ | |
| 2299 | + if (port_caps->bits.DWN_STRM_PORTX_TYPE | |
| 2300 | + == DOWN_STREAM_DETAILED_HDMI) { | |
| 2301 | + link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_pass_through = | |
| 2302 | + hdmi_caps.bits.YCrCr422_PASS_THROUGH; | |
| 2303 | + link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_pass_through = | |
| 2304 | + hdmi_caps.bits.YCrCr420_PASS_THROUGH; | |
| 2305 | + link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr422_converter = | |
| 2306 | + hdmi_caps.bits.YCrCr422_CONVERSION; | |
| 2307 | + link->dpcd_caps.dongle_caps.is_dp_hdmi_ycbcr420_converter = | |
| 2308 | + hdmi_caps.bits.YCrCr420_CONVERSION; | |
| 2309 | + } | |
| 2293 | 2310 | |
| 2294 | 2311 | link->dpcd_caps.dongle_caps.dp_hdmi_max_bpc = |
| 2295 | 2312 | translate_dpcd_max_bpc( |
| @@ -258,7 +258,7 @@ bool resource_construct( · 257 unmodified lines | ||
| 258 | 258 | * PORT_CONNECTIVITY == 1 (as instructed by HW team). |
| 259 | 259 | */ |
| 260 | 260 | update_num_audio(&straps, &num_audio, &pool->audio_support); |
| 261 | − for (i = 0; i < pool->pipe_count && i < num_audio; i++) { | |
| 261 | + for (i = 0; i < caps->num_audio; i++) { | |
| 262 | 262 | struct audio *aud = create_funcs->create_audio(ctx, i); |
| 263 | 263 | |
| 264 | 264 | if (aud == NULL) { |
| @@ -1669,6 +1669,12 @@ static struct audio *find_first_free_audio( · 1404 unmodified lines | ||
| 1669 | 1669 | return pool->audios[i]; |
| 1670 | 1670 | } |
| 1671 | 1671 | } |
| 1672 | + | |
| 1673 | + /* use engine id to find free audio */ | |
| 1674 | + if ((id < pool->audio_count) && (res_ctx->is_audio_acquired[id] == false)) { | |
| 1675 | + return pool->audios[id]; | |
| 1676 | + } | |
| 1677 | + | |
| 1672 | 1678 | /*not found the matching one, first come first serve*/ |
| 1673 | 1679 | for (i = 0; i < pool->audio_count; i++) { |
| 1674 | 1680 | if (res_ctx->is_audio_acquired[i] == false) { |
| @@ -1833,6 +1839,7 @@ static int get_norm_pix_clk(const struct dc_crtc_timing *timing) · 158 unmodified lines | ||
| 1833 | 1839 | pix_clk /= 2; |
| 1834 | 1840 | if (timing->pixel_encoding != PIXEL_ENCODING_YCBCR422) { |
| 1835 | 1841 | switch (timing->display_color_depth) { |
| 1842 | + case COLOR_DEPTH_666: | |
| 1836 | 1843 | case COLOR_DEPTH_888: |
| 1837 | 1844 | normalized_pix_clk = pix_clk; |
| 1838 | 1845 | break; |
| @@ -1979,7 +1986,7 @@ enum dc_status resource_map_pool_resources( · 140 unmodified lines | ||
| 1979 | 1986 | /* TODO: Add check if ASIC support and EDID audio */ |
| 1980 | 1987 | if (!stream->converter_disable_audio && |
| 1981 | 1988 | dc_is_audio_capable_signal(pipe_ctx->stream->signal) && |
| 1982 | − stream->audio_info.mode_count) { | |
| 1989 | + stream->audio_info.mode_count && stream->audio_info.flags.all) { | |
| 1983 | 1990 | pipe_ctx->stream_res.audio = find_first_free_audio( |
| 1984 | 1991 | &context->res_ctx, pool, pipe_ctx->stream_res.stream_enc->id); |
| 1985 | 1992 | |
| @@ -612,7 +612,8 @@ bool dc_stream_set_dynamic_metadata(struct dc *dc, · 611 unmodified lines | ||
| 612 | 612 | |
| 613 | 613 | pipe_ctx->stream->dmdata_address = attr->address; |
| 614 | 614 | |
| 615 | − if (pipe_ctx->stream_res.stream_enc->funcs->set_dynamic_metadata != NULL) { | |
| 615 | + if (pipe_ctx->stream_res.stream_enc && | |
| 616 | + pipe_ctx->stream_res.stream_enc->funcs->set_dynamic_metadata != NULL) { | |
| 616 | 617 | if (pipe_ctx->stream->dmdata_address.quad_part != 0) { |
| 617 | 618 | /* if using dynamic meta, don't set up generic infopackets */ |
| 618 | 619 | pipe_ctx->stream_res.encoder_info_frame.hdrsmd.valid = false; |
| @@ -239,6 +239,10 @@ static void dmcu_set_backlight_level( · 238 unmodified lines | ||
| 239 | 239 | s2 |= (backlight_8_bit << ATOM_S2_CURRENT_BL_LEVEL_SHIFT); |
| 240 | 240 | |
| 241 | 241 | REG_WRITE(BIOS_SCRATCH_2, s2); |
| 242 | + | |
| 243 | + /* waitDMCUReadyForCmd */ | |
| 244 | + REG_WAIT(MASTER_COMM_CNTL_REG, MASTER_COMM_INTERRUPT, | |
| 245 | + 0, 1, 80000); | |
| 242 | 246 | } |
| 243 | 247 | |
| 244 | 248 | static void dce_abm_init(struct abm *abm) |
| @@ -965,11 +965,17 @@ void hwss_edp_backlight_control( · 964 unmodified lines | ||
| 965 | 965 | void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx) |
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