History

Expose c0 and SW encap ICM for RDMA

These two series from Mark and Shun extend RDMA mlx5 API. Mark's series provides c0 register used to match egress traffic sent by local device. Shun's series adds new type for ICM area.

Leon Romanovsky committed 2 years ago

Commit afcda192 parents 07f830a d727d271114 files · +14511 −10957Browse files

Unified · Split

1114 files
  1. .mailmap +1 −0
  2. CREDITS +8 −0
  3. Documentation/ABI/testing/sysfs-bus-optee-devices +9 −0
  4. Documentation/ABI/testing/sysfs-class-led +0 −9
  5. Documentation/arch/loongarch/introduction.rst +2 −2
  6. Documentation/arch/x86/boot.rst +1 −1
  7. Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml +6 −0
  8. Documentation/devicetree/bindings/display/fsl,lcdif.yaml +19 −1
  9. Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml +0 −1
  10. Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml +4 −0
  11. Documentation/devicetree/bindings/net/ethernet-controller.yaml +2 −2
  12. Documentation/devicetree/bindings/perf/riscv,pmu.yaml +1 −1
  13. Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml +1 −1
  14. Documentation/devicetree/bindings/pwm/imx-pwm.yaml +4 −6
  15. Documentation/devicetree/bindings/soc/rockchip/grf.yaml +1 −0
  16. Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +2 −0
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  18. Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +2 −2
  19. Documentation/devicetree/bindings/usb/usb-hcd.yaml +1 −1
  20. Documentation/filesystems/erofs.rst +4 −0
  21. Documentation/networking/tcp_ao.rst +1 −1
  22. Documentation/process/maintainer-netdev.rst +17 −3
  23. Documentation/trace/coresight/coresight.rst +1 −1
  24. Documentation/translations/zh_CN/arch/loongarch/introduction.rst +2 −2
  25. MAINTAINERS +85 −156
  26. Makefile +1 −1
  27. arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts +1 −3
  28. arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts +2 −2
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  30. arch/arm/boot/dts/nxp/imx/imx7s.dtsi +4 −4
  31. arch/arm/boot/dts/nxp/mxs/imx28-xea.dts +1 −0
  32. arch/arm/boot/dts/rockchip/rk3128.dtsi +1 −1
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  35. arch/arm/kernel/Makefile +1 −1
  36. arch/arm/mach-imx/mmdc.c +6 −1
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  38. arch/arm64/Makefile +1 −1
  39. arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +1 −4
  40. arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +1 −1
  41. arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +4 −4
  42. arch/arm64/boot/dts/freescale/imx8mp.dtsi +2 −0
  43. arch/arm64/boot/dts/freescale/imx8mq.dtsi +2 −0
  44. arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +11 −0
  45. arch/arm64/boot/dts/freescale/imx8ulp.dtsi +3 −3
  46. arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts +1 −1
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  48. arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +1 −1
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  50. arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts +7 −5
  51. arch/arm64/boot/dts/mediatek/mt7986a.dtsi +20 −4
  52. arch/arm64/boot/dts/mediatek/mt8173-evb.dts +2 −2
  53. arch/arm64/boot/dts/mediatek/mt8183-evb.dts +2 −2
  54. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi +5 −3
  55. arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +48 −48
  56. arch/arm64/boot/dts/mediatek/mt8183.dtsi +121 −121
  57. arch/arm64/boot/dts/mediatek/mt8186.dtsi +28 −16
  58. arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi +1 −1
  59. arch/arm64/boot/dts/mediatek/mt8195.dtsi +5 −1
  60. arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +1 −1
  61. arch/arm64/boot/dts/rockchip/rk3328.dtsi +1 −1
  62. arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi +1 −2
  63. arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts +2 −2
  64. arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi +1 −0
  65. arch/arm64/boot/dts/rockchip/rk3399.dtsi +4 −2
  66. arch/arm64/boot/dts/rockchip/rk356x.dtsi +1 −1
  67. arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +2 −2
  68. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts +1 −1
  69. arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi +1 −1
  70. arch/arm64/boot/dts/rockchip/rk3588s.dtsi +0 −1
  71. arch/arm64/include/asm/setup.h +15 −2
  72. arch/arm64/kernel/cpufeature.c +4 −0
  73. arch/arm64/kvm/vgic/vgic-v4.c +4 −0
  74. arch/arm64/mm/pageattr.c +3 −4
  75. arch/loongarch/Makefile +4 −1
  76. arch/loongarch/include/asm/asmmacro.h +1 −2
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  79. arch/loongarch/include/asm/percpu.h +5 −6
  80. arch/loongarch/include/asm/setup.h +1 −1
  81. arch/loongarch/kernel/relocate.c +9 −1
  82. arch/loongarch/kernel/stacktrace.c +1 −1
  83. arch/loongarch/kernel/time.c +9 −14
  84. arch/loongarch/kernel/unwind.c +0 −1
  85. arch/loongarch/kernel/unwind_prologue.c +1 −1
  86. arch/loongarch/mm/pgtable.c +2 −2
  87. arch/loongarch/net/bpf_jit.c +6 −12
  88. arch/mips/Kconfig +2 −0
  89. arch/mips/include/asm/mach-loongson64/boot_param.h +7 −2
  90. arch/mips/kernel/process.c +13 −12
  91. arch/mips/kernel/smp.c +2 −2
  92. arch/mips/loongson64/env.c +9 −1
  93. arch/mips/loongson64/init.c +31 −16
  94. arch/parisc/Kconfig +8 −5
  95. arch/parisc/include/asm/alternative.h +6 −3
  96. arch/parisc/include/asm/assembly.h +1 −0
  97. arch/parisc/include/asm/bug.h +22 −16
  98. arch/parisc/include/asm/elf.h +1 −9
  99. arch/parisc/include/asm/jump_label.h +6 −2
  100. arch/parisc/include/asm/ldcw.h +1 −1
  101. arch/parisc/include/asm/processor.h +2 −0
  102. arch/parisc/include/asm/uaccess.h +1 −0
  103. arch/parisc/include/uapi/asm/errno.h +0 −2
  104. arch/parisc/kernel/processor.c +1 −1
  105. arch/parisc/kernel/sys_parisc.c +1 −1
  106. arch/parisc/kernel/vmlinux.lds.S +1 −0
  107. arch/powerpc/kernel/fpu.S +13 −0
  108. arch/powerpc/kernel/process.c +3 −3
  109. arch/powerpc/kernel/trace/ftrace_entry.S +2 −2
  110. arch/powerpc/kernel/vector.S +2 −0
  111. arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts +0 −7
  112. arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts +0 −7
  113. arch/riscv/boot/dts/microchip/mpfs-polarberry.dts +0 −7
  114. arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts +0 −7
  115. arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts +0 −7
  116. arch/riscv/boot/dts/microchip/mpfs.dtsi +1 −0
  117. arch/riscv/boot/dts/sophgo/cv1800b.dtsi +0 −1
  118. arch/riscv/errata/andes/errata.c +13 −7
  119. arch/riscv/kernel/head.S +1 −1
  120. arch/riscv/kernel/module.c +84 −30
  121. arch/riscv/kernel/sys_riscv.c +1 −1
  122. arch/riscv/kernel/tests/module_test/test_uleb128.S +4 −4
  123. arch/riscv/kernel/traps_misaligned.c +2 −4
  124. arch/s390/include/asm/processor.h +0 −1
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  126. arch/s390/kernel/perf_pai_crypto.c +5 −6
  127. arch/s390/kernel/perf_pai_ext.c +0 −1
  128. arch/s390/kvm/vsie.c +0 −4
  129. arch/s390/mm/pgtable.c +1 −1
  130. arch/x86/coco/tdx/tdx.c +1 −0
  131. arch/x86/entry/common.c +92 −1
  132. arch/x86/entry/entry_64_compat.S +0 −77
  133. arch/x86/events/intel/core.c +1 −1
  134. arch/x86/hyperv/hv_init.c +21 −4
  135. arch/x86/include/asm/acpi.h +14 −0
  136. arch/x86/include/asm/ia32.h +7 −0
  137. arch/x86/include/asm/idtentry.h +4 −0
  138. arch/x86/include/asm/proto.h +0 −4
  139. arch/x86/include/asm/xen/hypervisor.h +9 −0
  140. arch/x86/kernel/acpi/boot.c +15 −19
  141. arch/x86/kernel/cpu/amd.c +3 −0
  142. arch/x86/kernel/cpu/microcode/amd.c +11 −28
  143. arch/x86/kernel/cpu/microcode/core.c +9 −6
  144. arch/x86/kernel/cpu/microcode/intel.c +7 −10
  145. arch/x86/kernel/cpu/microcode/internal.h +10 −4
  146. arch/x86/kernel/cpu/mshyperv.c +4 −1
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  148. arch/x86/kernel/sev.c +7 −4
  149. arch/x86/kernel/signal_64.c +3 −3
  150. arch/x86/kvm/debugfs.c +1 −0
  151. arch/x86/kvm/svm/svm.c +5 −3
  152. arch/x86/kvm/x86.c +6 −3
  153. arch/x86/mm/mem_encrypt_amd.c +11 −0
  154. arch/x86/net/bpf_jit_comp.c +46 −0
  155. arch/x86/xen/enlighten.c +5 −1
  156. arch/x86/xen/enlighten_pv.c +1 −1
  157. arch/x86/xen/xen-asm.S +1 −1
  158. arch/x86/xen/xen-ops.h +1 −1
  159. block/bdev.c +2 −0
  160. block/blk-cgroup.c +13 −0
  161. block/blk-cgroup.h +0 −2
  162. block/blk-core.c +11 −3
  163. block/blk-mq.c +51 −38
  164. block/blk-pm.c +5 −28
  165. block/blk-sysfs.c +2 −0
  166. block/blk-throttle.c +2 −0
  167. drivers/accel/ivpu/ivpu_hw_37xx.c +22 −24
  168. drivers/accel/ivpu/ivpu_pm.c +0 −3
  169. drivers/acpi/acpi_video.c +6 −10
  170. drivers/acpi/device_pm.c +13 −0
  171. drivers/acpi/processor_idle.c +1 −1
  172. drivers/acpi/resource.c +7 −0
  173. drivers/acpi/scan.c +6 −1
  174. drivers/acpi/utils.c +1 −1
  175. drivers/ata/libata-scsi.c +7 −2
  176. drivers/ata/pata_isapnp.c +3 −0
  177. drivers/base/cpu.c +3 −3
  178. drivers/base/devcoredump.c +3 −0
  179. drivers/base/memory.c +15 −3
  180. drivers/base/regmap/regcache.c +1 −2
  181. drivers/block/nbd.c +75 −42
  182. drivers/block/null_blk/main.c +13 −12
  183. drivers/cpufreq/amd-pstate.c +56 −15
  184. drivers/cpufreq/imx6q-cpufreq.c +1 −1
  185. drivers/cpufreq/qcom-cpufreq-nvmem.c +70 −3
  186. drivers/dma-buf/dma-resv.c +1 −1
  187. drivers/dpll/dpll_netlink.c +12 −5
  188. drivers/firewire/core-device.c +4 −7
  189. drivers/firewire/sbp2.c +3 −3
  190. drivers/firmware/Kconfig +1 −1
  191. drivers/firmware/arm_ffa/driver.c +46 −24
  192. drivers/firmware/arm_scmi/perf.c +10 −8
  193. drivers/firmware/efi/unaccepted_memory.c +1 −1
  194. drivers/firmware/qemu_fw_cfg.c +1 −1
  195. drivers/gpio/gpiolib-sysfs.c +9 −6
  196. drivers/gpu/drm/amd/amdgpu/amdgpu.h +1 −0
  197. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c +1 −1
  198. drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +1 −1
  199. drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +6 −0
  200. drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +6 −4
  201. drivers/gpu/drm/amd/amdgpu/amdgpu_display.c +3 −6
  202. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +12 −0
  203. drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +3 −0
  204. drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h +2 −0
  205. drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +7 −3
  206. drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +5 −0
  207. drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h +1 −0
  208. drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +18 −1
  209. drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c +6 −0
  210. drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +1 −3
  211. drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c +1 −0
  212. drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c +1 −0
  213. drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c +9 −1
  214. drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +2 −2
  215. drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +2 −2
  216. drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +2 −2
  217. drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c +1 −1
  218. drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c +3 −2
  219. drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +4 −3
  220. drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c +5 −0
  221. drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c +3 −3
  222. drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c +9 −9
  223. drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c +0 −5
  224. drivers/gpu/drm/amd/amdgpu/psp_v13_0.c +8 −4
  225. drivers/gpu/drm/amd/amdgpu/soc15.c +15 −5
  226. drivers/gpu/drm/amd/amdkfd/kfd_priv.h +1 −1
  227. drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c +33 −21
  228. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +19 −13
  229. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +7 −4
  230. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +14 −15
  231. drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c +7 −1
  232. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c +4 −4
  233. drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c +88 −89
  234. drivers/gpu/drm/amd/display/dc/core/dc.c +3 −3
  235. drivers/gpu/drm/amd/display/dc/core/dc_resource.c +3 −0
  236. drivers/gpu/drm/amd/display/dc/dc.h +1 −1
  237. drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c +5 −5
  238. drivers/gpu/drm/amd/display/dc/dc_types.h +1 −4
  239. drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +1 −1
  240. drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.c +4 −6
  241. drivers/gpu/drm/amd/display/dc/dcn35/dcn35_pg_cntl.c +10 −0
  242. drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +8 −1
  243. drivers/gpu/drm/amd/display/dc/dml/Makefile +4 −0
  244. drivers/gpu/drm/amd/display/dc/dml/dc_features.h +1 −1
  245. drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c +1 −14
  246. drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +14 −9
  247. drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c +80 −4
  248. drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.h +2 −0
  249. drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c +11 −11
  250. drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c +40 −20
  251. drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h +2 −0
  252. drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +2 −4
  253. drivers/gpu/drm/amd/display/dc/link/link_detection.c +4 −1
  254. drivers/gpu/drm/amd/display/dc/link/link_dpms.c +1 −2
  255. drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c +3 −3
  256. drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c +3 −13
  257. drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h +0 −1
  258. drivers/gpu/drm/amd/display/dmub/dmub_srv.h +14 −8
  259. drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c +40 −11
  260. drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h +2 −0
  261. drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h +2 −0
  262. drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h +29 −0
  263. drivers/gpu/drm/amd/include/kgd_pp_interface.h +18 −0
  264. drivers/gpu/drm/amd/pm/amdgpu_dpm.c +18 −0
  265. drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h +2 −0
  266. drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +10 −0
  267. drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +15 −0
  268. drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0_0.h +45 −32
  269. drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h +9 −1
  270. drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +2 −3
  271. drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c +4 −1
  272. drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c +17 −2
  273. drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c +43 −3
  274. drivers/gpu/drm/amd/pm/swsmu/smu_internal.h +1 −0
  275. drivers/gpu/drm/ast/ast_drv.h +12 −1
  276. drivers/gpu/drm/ast/ast_mode.c +55 −7
  277. drivers/gpu/drm/bridge/Kconfig +1 −0
  278. drivers/gpu/drm/bridge/panel.c +0 −17
  279. drivers/gpu/drm/ci/xfails/requirements.txt +3 −3
  280. drivers/gpu/drm/drm_atomic_helper.c +52 −26
  281. drivers/gpu/drm/drm_gpuvm.c +1 −1
  282. drivers/gpu/drm/drm_panel_orientation_quirks.c +6 −0
  283. drivers/gpu/drm/drm_prime.c +18 −15
  284. drivers/gpu/drm/exynos/exynos_drm_dma.c +3 −5
  285. drivers/gpu/drm/exynos/exynos_hdmi.c +2 −0
  286. drivers/gpu/drm/i915/display/icl_dsi.c +7 −0
  287. drivers/gpu/drm/i915/display/intel_crt.c +5 −0
  288. drivers/gpu/drm/i915/display/intel_display.c +25 −2
  289. drivers/gpu/drm/i915/display/intel_display.h +3 −0
  290. drivers/gpu/drm/i915/display/intel_dp.c +26 −6
  291. drivers/gpu/drm/i915/display/intel_dp_mst.c +24 −12
  292. drivers/gpu/drm/i915/display/intel_dsb.c +1 −1
  293. drivers/gpu/drm/i915/display/intel_dvo.c +6 −0
  294. drivers/gpu/drm/i915/display/intel_hdmi.c +4 −0
  295. drivers/gpu/drm/i915/display/intel_lvds.c +5 −0
  296. drivers/gpu/drm/i915/display/intel_sdvo.c +7 −1
  297. drivers/gpu/drm/i915/display/intel_tv.c +7 −1
  298. drivers/gpu/drm/i915/display/vlv_dsi.c +17 −1
  299. drivers/gpu/drm/i915/gt/intel_engine_user.c +22 −17
  300. drivers/gpu/drm/i915/gt/intel_gt.c +0 −11
  301. drivers/gpu/drm/i915/i915_driver.c +1 −3
  302. drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +1 −0
  303. drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c +1 −2
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  305. drivers/gpu/drm/msm/dp/dp_drm.c +3 −0
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  1035. sound/soc/sof/topology.c +3 −1
  1036. sound/usb/mixer_quirks.c +30 −0
  1037. tools/arch/arm64/include/asm/cputype.h +4 −1
  1038. tools/arch/arm64/include/uapi/asm/kvm.h +32 −0
  1039. tools/arch/arm64/include/uapi/asm/perf_regs.h +6 −4
  1040. tools/arch/arm64/tools/Makefile +1 −1
  1041. tools/arch/parisc/include/uapi/asm/errno.h +0 −2
  1042. tools/arch/s390/include/uapi/asm/kvm.h +16 −0
  1043. tools/arch/x86/include/asm/cpufeatures.h +15 −1
  1044. tools/arch/x86/include/asm/disabled-features.h +14 −2
  1045. tools/arch/x86/include/asm/msr-index.h +19 −4
  1046. tools/arch/x86/include/uapi/asm/prctl.h +12 −0
  1047. tools/hv/hv_kvp_daemon.c +12 −8
  1048. tools/hv/hv_set_ifconfig.sh +2 −2
  1049. tools/include/asm-generic/unaligned.h +1 −0
  1050. tools/include/uapi/asm-generic/unistd.h +9 −3
  1051. tools/include/uapi/drm/drm.h +20 −0
  1052. tools/include/uapi/drm/i915_drm.h +4 −4
  1053. tools/include/uapi/linux/fscrypt.h +2 −1
  1054. tools/include/uapi/linux/kvm.h +21 −3
  1055. tools/include/uapi/linux/mount.h +2 −1
  1056. tools/include/uapi/linux/vhost.h +8 −0
  1057. tools/net/ynl/Makefile.deps +1 −1
  1058. tools/net/ynl/generated/devlink-user.c +59 −30
  1059. tools/net/ynl/generated/ethtool-user.c +34 −17
  1060. tools/net/ynl/generated/fou-user.c +4 −2
  1061. tools/net/ynl/generated/handshake-user.c +2 −1
  1062. tools/net/ynl/ynl-gen-c.py +10 −6
  1063. tools/perf/MANIFEST +2 −0
  1064. tools/perf/Makefile.perf +15 −9
  1065. tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl +4 −0
  1066. tools/perf/arch/powerpc/entry/syscalls/syscall.tbl +4 −0
  1067. tools/perf/arch/s390/entry/syscalls/syscall.tbl +4 −0
  1068. tools/perf/arch/x86/entry/syscalls/syscall_64.tbl +3 −0
  1069. tools/perf/builtin-kwork.c +1 −1
  1070. tools/perf/builtin-list.c +6 −0
  1071. tools/perf/pmu-events/arch/arm64/ampere/ampereone/metrics.json +2 −0
  1072. tools/perf/trace/beauty/include/linux/socket.h +1 −0
  1073. tools/perf/util/Build +1 −1
  1074. tools/perf/util/bpf_lock_contention.c +2 −1
  1075. tools/perf/util/metricgroup.c +1 −1
  1076. tools/power/pm-graph/sleepgraph.py +1 −1
  1077. tools/power/x86/turbostat/turbostat.c +1537 −1537
  1078. tools/testing/nvdimm/test/ndtest.c +1 −1
  1079. tools/testing/selftests/arm64/fp/za-fork.c +1 −1
  1080. tools/testing/selftests/bpf/prog_tests/sockmap_listen.c +40 −11
  1081. tools/testing/selftests/bpf/prog_tests/tailcalls.c +84 −0
  1082. tools/testing/selftests/bpf/prog_tests/tc_redirect.c +190 −127
  1083. tools/testing/selftests/bpf/prog_tests/verifier.c +2 −0
  1084. tools/testing/selftests/bpf/progs/bpf_loop_bench.c +8 −5
  1085. tools/testing/selftests/bpf/progs/cb_refs.c +1 −0
  1086. tools/testing/selftests/bpf/progs/exceptions_fail.c +2 −0
  1087. tools/testing/selftests/bpf/progs/strobemeta.h +48 −30
  1088. tools/testing/selftests/bpf/progs/tailcall_poke.c +32 −0
  1089. tools/testing/selftests/bpf/progs/test_sockmap_listen.c +7 −0
  1090. tools/testing/selftests/bpf/progs/verifier_cfg.c +62 −0
  1091. tools/testing/selftests/bpf/progs/verifier_iterating_callbacks.c +242 −0
  1092. tools/testing/selftests/bpf/progs/verifier_loops1.c +6 −3
  1093. tools/testing/selftests/bpf/progs/verifier_precision.c +40 −0
  1094. tools/testing/selftests/bpf/progs/verifier_subprog_precision.c +72 −14
  1095. tools/testing/selftests/bpf/progs/xdp_synproxy_kern.c +52 −32
  1096. tools/testing/selftests/bpf/verifier/calls.c +3 −3
  1097. tools/testing/selftests/bpf/verifier/ld_imm64.c +4 −4
  1098. tools/testing/selftests/bpf/xskxceiver.c +12 −7
  1099. tools/testing/selftests/iommu/iommufd_utils.h +6 −7
  1100. tools/testing/selftests/kvm/Makefile +4 −3
  1101. tools/testing/selftests/kvm/x86_64/nx_huge_pages_test.c +1 −1
  1102. tools/testing/selftests/mm/.gitignore +1 −0
  1103. tools/testing/selftests/mm/Makefile +2 −2
  1104. tools/testing/selftests/mm/pagemap_ioctl.c +18 −14
  1105. tools/testing/selftests/mm/run_vmtests.sh +3 −0
  1106. tools/testing/selftests/net/af_unix/diag_uid.c +0 −1
  1107. tools/testing/selftests/net/cmsg_sender.c +1 −1
  1108. tools/testing/selftests/net/ipsec.c +2 −2
  1109. tools/testing/selftests/net/mptcp/mptcp_connect.c +4 −7
  1110. tools/testing/selftests/net/mptcp/mptcp_inq.c +4 −7
  1111. tools/testing/selftests/net/mptcp/mptcp_join.sh +1 −1
  1112. tools/testing/selftests/net/rtnetlink.sh +1 −1
  1113. tools/testing/vsock/vsock_test.c +13 −6
  1114. virt/kvm/kvm_main.c +8 −10
.mailmap+1−0
@@ -117,6 +117,7 @@ Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com> · 116 unmodified lines
117117 Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
118118 Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>
119119 Chao Yu <chao@kernel.org> <yuchao0@huawei.com>
120+Chester Lin <chester62515@gmail.com> <clin@suse.com>
120121 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessm.com>
121122 Chris Chiu <chris.chiu@canonical.com> <chiu@endlessos.org>
122123 Chris Lew <quic_clew@quicinc.com> <clew@codeaurora.org>
CREDITS+8−0
@@ -2944,6 +2944,14 @@ D: IPX development and support · 2943 unmodified lines
29442944 N: Venkatesh Pallipadi (Venki)
29452945 D: x86/HPET
29462946
2947+N: Antti Palosaari
2948+E: crope@iki.fi
2949+D: Various DVB drivers
2950+W: https://palosaari.fi/linux/
2951+S: Yliopistokatu 1 D 513
2952+S: FI-90570 Oulu
2953+S: FINLAND
2954+
29472955 N: Kyungmin Park
29482956 E: kyungmin.park@samsung.com
29492957 D: Samsung S5Pv210 and Exynos4210 mobile platforms
Documentation/ABI/testing/sysfs-bus-optee-devices+9−0
@@ -6,3 +6,12 @@ Description: · 5 unmodified lines
66 OP-TEE bus provides reference to registered drivers under this directory. The <uuid>
77 matches Trusted Application (TA) driver and corresponding TA in secure OS. Drivers
88 are free to create needed API under optee-ta-<uuid> directory.
9+
10+What: /sys/bus/tee/devices/optee-ta-<uuid>/need_supplicant
11+Date: November 2023
12+KernelVersion: 6.7
13+Contact: op-tee@lists.trustedfirmware.org
14+Description:
15+ Allows to distinguish whether an OP-TEE based TA/device requires user-space
16+ tee-supplicant to function properly or not. This attribute will be present for
17+ devices which depend on tee-supplicant to be running.
Documentation/ABI/testing/sysfs-class-led+0−9
@@ -59,15 +59,6 @@ Description: · 58 unmodified lines
5959 brightness. Reading this file when no hw brightness change
6060 event has happened will return an ENODATA error.
6161
62−What: /sys/class/leds/<led>/color
63−Date: June 2023
64−KernelVersion: 6.5
65−Description:
66− Color of the LED.
67−
68− This is a read-only file. Reading this file returns the color
69− of the LED as a string (e.g: "red", "green", "multicolor").
70−
7162 What: /sys/class/leds/<led>/trigger
7263 Date: March 2006
7364 KernelVersion: 2.6.17
Documentation/arch/loongarch/introduction.rst+2−2
@@ -375,9 +375,9 @@ Developer web site of Loongson and LoongArch (Software and Documentation): · 374 unmodified lines
375375
376376 Documentation of LoongArch ISA:
377377
378− https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-CN.pdf (in Chinese)
378+ https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.10-CN.pdf (in Chinese)
379379
380− https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-EN.pdf (in English)
380+ https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.10-EN.pdf (in English)
381381
382382 Documentation of LoongArch ELF psABI:
383383
Documentation/arch/x86/boot.rst+1−1
@@ -77,7 +77,7 @@ Protocol 2.14 BURNT BY INCORRECT COMMIT · 76 unmodified lines
7777 Protocol 2.15 (Kernel 5.5) Added the kernel_info and kernel_info.setup_type_max.
7878 ============= ============================================================
7979
80−.. note::
80+ .. note::
8181 The protocol version number should be changed only if the setup header
8282 is changed. There is no need to update the version number if boot_params
8383 or kernel_info are changed. Additionally, it is recommended to use
Documentation/devicetree/bindings/display/bridge/adi,adv7533.yaml+6−0
@@ -9,6 +9,9 @@ title: Analog Devices ADV7533/35 HDMI Encoders · 8 unmodified lines
99 maintainers:
1010 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
1111
12+allOf:
13+ - $ref: /schemas/sound/dai-common.yaml#
14+
1215 description: |
1316 The ADV7533 and ADV7535 are HDMI audio and video transmitters
1417 compatible with HDMI 1.4 and DVI 1.0. They support color space
@@ -89,6 +92,9 @@ properties: · 74 unmodified lines
8992 $ref: /schemas/types.yaml#/definitions/uint32
9093 enum: [ 1, 2, 3, 4 ]
9194
95+ "#sound-dai-cells":
96+ const: 0
97+
9298 ports:
9399 description:
94100 The ADV7533/35 has two video ports and one audio port.
Documentation/devicetree/bindings/display/fsl,lcdif.yaml+19−1
@@ -51,7 +51,10 @@ properties: · 50 unmodified lines
5151 minItems: 1
5252
5353 interrupts:
54− maxItems: 1
54+ items:
55+ - description: LCDIF DMA interrupt
56+ - description: LCDIF Error interrupt
57+ minItems: 1
5558
5659 power-domains:
5760 maxItems: 1
@@ -131,6 +134,21 @@ allOf: · 73 unmodified lines
131134 then:
132135 required:
133136 - power-domains
137+ - if:
138+ properties:
139+ compatible:
140+ contains:
141+ enum:
142+ - fsl,imx23-lcdif
143+ then:
144+ properties:
145+ interrupts:
146+ minItems: 2
147+ maxItems: 2
148+ else:
149+ properties:
150+ interrupts:
151+ maxItems: 1
134152
135153 examples:
136154 - |
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.yaml+0−1
@@ -10,7 +10,6 @@ maintainers: · 9 unmodified lines
1010 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
1111 - Philipp Zabel <p.zabel@pengutronix.de>
1212 - Jitao Shi <jitao.shi@mediatek.com>
13− - Xinlei Lee <xinlei.lee@mediatek.com>
1413
1514 description: |
1615 The MediaTek DSI function block is a sink of the display subsystem and can
Documentation/devicetree/bindings/interrupt-controller/qcom,mpm.yaml+4−0
@@ -62,6 +62,9 @@ properties: · 61 unmodified lines
6262 - description: MPM pin number
6363 - description: GIC SPI number for the MPM pin
6464
65+ '#power-domain-cells':
66+ const: 0
67+
6568 required:
6669 - compatible
6770 - reg
@@ -93,4 +96,5 @@ examples: · 25 unmodified lines
9396 <86 183>,
9497 <90 260>,
9598 <91 260>;
99+ #power-domain-cells = <0>;
96100 };
Documentation/devicetree/bindings/net/ethernet-controller.yaml+2−2
@@ -275,12 +275,12 @@ allOf: · 274 unmodified lines
275275 properties:
276276 rx-internal-delay-ps:
277277 description:
278− RGMII Receive Clock Delay defined in pico seconds.This is used for
278+ RGMII Receive Clock Delay defined in pico seconds. This is used for
279279 controllers that have configurable RX internal delays. If this
280280 property is present then the MAC applies the RX delay.
281281 tx-internal-delay-ps:
282282 description:
283− RGMII Transmit Clock Delay defined in pico seconds.This is used for
283+ RGMII Transmit Clock Delay defined in pico seconds. This is used for
284284 controllers that have configurable TX internal delays. If this
285285 property is present then the MAC applies the TX delay.
286286
Documentation/devicetree/bindings/perf/riscv,pmu.yaml+1−1
@@ -90,7 +90,7 @@ properties: · 89 unmodified lines
9090 bitmap of all MHPMCOUNTERx that can monitor the range of events
9191
9292 dependencies:
93− "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ]
93+ riscv,event-to-mhpmevent: [ "riscv,event-to-mhpmcounters" ]
9494
9595 required:
9696 - compatible
Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml+1−1
@@ -9,7 +9,7 @@ title: NXP S32G2 pin controller · 8 unmodified lines
99
1010 maintainers:
1111 - Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>
12− - Chester Lin <clin@suse.com>
12+ - Chester Lin <chester62515@gmail.com>
1313
1414 description: |
1515 S32G2 pinmux is implemented in SIUL2 (System Integration Unit Lite2),
Documentation/devicetree/bindings/pwm/imx-pwm.yaml+4−6
@@ -14,12 +14,10 @@ allOf: · 13 unmodified lines
1414
1515 properties:
1616 "#pwm-cells":
17− description: |
18− Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
19− in this directory for a description of the cells format.
20− enum:
21− - 2
22− - 3
17+ description:
18+ The only third cell flag supported by this binding is
19+ PWM_POLARITY_INVERTED. fsl,imx1-pwm does not support this flags.
20+ const: 3
2321
2422 compatible:
2523 oneOf:
Documentation/devicetree/bindings/soc/rockchip/grf.yaml+1−0
@@ -233,6 +233,7 @@ allOf: · 232 unmodified lines
233233 - rockchip,rk3399-grf
234234 - rockchip,rk3399-pmugrf
235235 - rockchip,rk3568-pmugrf
236+ - rockchip,rk3588-pmugrf
236237 - rockchip,rv1108-grf
237238 - rockchip,rv1108-pmugrf
238239
Documentation/devicetree/bindings/ufs/qcom,ufs.yaml+2−0
@@ -36,6 +36,7 @@ properties: · 35 unmodified lines
3636 - qcom,sm8350-ufshc
3737 - qcom,sm8450-ufshc
3838 - qcom,sm8550-ufshc
39+ - qcom,sm8650-ufshc
3940 - const: qcom,ufshc
4041 - const: jedec,ufs-2.0
4142
@@ -122,6 +123,7 @@ allOf: · 80 unmodified lines
122123 - qcom,sm8350-ufshc
123124 - qcom,sm8450-ufshc
124125 - qcom,sm8550-ufshc
126+ - qcom,sm8650-ufshc
125127 then:
126128 properties:
127129 clocks:
Documentation/devicetree/bindings/usb/microchip,usb5744.yaml+6−1
@@ -36,7 +36,11 @@ properties: · 35 unmodified lines
3636
3737 vdd-supply:
3838 description:
39− VDD power supply to the hub
39+ 3V3 power supply to the hub
40+
41+ vdd2-supply:
42+ description:
43+ 1V2 power supply to the hub
4044
4145 peer-hub:
4246 $ref: /schemas/types.yaml#/definitions/phandle
@@ -62,6 +66,7 @@ allOf: · 19 unmodified lines
6266 properties:
6367 reset-gpios: false
6468 vdd-supply: false
69+ vdd2-supply: false
6570 peer-hub: false
6671 i2c-bus: false
6772 else:
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml+2−2
@@ -521,8 +521,8 @@ examples: · 520 unmodified lines
521521
522522 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
523523 <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
524− <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
525− <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
524+ <GIC_SPI 488 IRQ_TYPE_EDGE_BOTH>,
525+ <GIC_SPI 489 IRQ_TYPE_EDGE_BOTH>;
526526 interrupt-names = "hs_phy_irq", "ss_phy_irq",
527527 "dm_hs_phy_irq", "dp_hs_phy_irq";
528528
Documentation/devicetree/bindings/usb/usb-hcd.yaml+1−1
@@ -41,7 +41,7 @@ examples: · 40 unmodified lines
4141 - |
4242 usb {
4343 phys = <&usb2_phy1>, <&usb3_phy1>;
44− phy-names = "usb";
44+ phy-names = "usb2", "usb3";
4545 #address-cells = <1>;
4646 #size-cells = <0>;
4747
Documentation/filesystems/erofs.rst+4−0
@@ -91,6 +91,10 @@ compatibility checking tool (fsck.erofs), and a debugging tool (dump.erofs): · 90 unmodified lines
9191
9292 - git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs-utils.git
9393
94+For more information, please also refer to the documentation site:
95+
96+- https://erofs.docs.kernel.org
97+
9498 Bugs and patches are welcome, please kindly help us and send to the following
9599 linux-erofs mailing list:
96100
Documentation/networking/tcp_ao.rst+1−1
@@ -99,7 +99,7 @@ also [6.1]:: · 98 unmodified lines
9999 when it is no longer considered permitted.
100100
101101 Linux TCP-AO will try its best to prevent you from removing a key that's
102−being used, considering it a key management failure. But sine keeping
102+being used, considering it a key management failure. But since keeping
103103 an outdated key may become a security issue and as a peer may
104104 unintentionally prevent the removal of an old key by always setting
105105 it as RNextKeyID - a forced key removal mechanism is provided, where
Documentation/process/maintainer-netdev.rst+17−3
@@ -193,9 +193,23 @@ Review timelines · 192 unmodified lines
193193 Generally speaking, the patches get triaged quickly (in less than
194194 48h). But be patient, if your patch is active in patchwork (i.e. it's
195195 listed on the project's patch list) the chances it was missed are close to zero.
196−Asking the maintainer for status updates on your
197−patch is a good way to ensure your patch is ignored or pushed to the
198−bottom of the priority list.
196+
197+The high volume of development on netdev makes reviewers move on
198+from discussions relatively quickly. New comments and replies
199+are very unlikely to arrive after a week of silence. If a patch
200+is no longer active in patchwork and the thread went idle for more
201+than a week - clarify the next steps and/or post the next version.
202+
203+For RFC postings specifically, if nobody responded in a week - reviewers
204+either missed the posting or have no strong opinions. If the code is ready,
205+repost as a PATCH.
206+
207+Emails saying just "ping" or "bump" are considered rude. If you can't figure
208+out the status of the patch from patchwork or where the discussion has
209+landed - describe your best guess and ask if it's correct. For example::
210+
211+ I don't understand what the next steps are. Person X seems to be unhappy
212+ with A, should I do B and repost the patches?
199213
200214 .. _Changes requested:
201215
Documentation/trace/coresight/coresight.rst+1−1
@@ -130,7 +130,7 @@ Misc: · 129 unmodified lines
130130 Device Tree Bindings
131131 --------------------
132132
133−See Documentation/devicetree/bindings/arm/arm,coresight-\*.yaml for details.
133+See ``Documentation/devicetree/bindings/arm/arm,coresight-*.yaml`` for details.
134134
135135 As of this writing drivers for ITM, STMs and CTIs are not provided but are
136136 expected to be added as the solution matures.
Documentation/translations/zh_CN/arch/loongarch/introduction.rst+2−2
@@ -338,9 +338,9 @@ Loongson与LoongArch的开发者网站（软件与文档资源）： · 337 unmodified lines
338338
339339 LoongArch指令集架构的文档：
340340
341− https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-CN.pdf （中文版）
341+ https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.10-CN.pdf （中文版）
342342
343− https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.02-EN.pdf （英文版）
343+ https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-Vol1-v1.10-EN.pdf （英文版）
344344
345345 LoongArch的ELF psABI文档：
346346
MAINTAINERS+85−156
@@ -171,13 +171,10 @@ S: Supported · 170 unmodified lines
171171 F: drivers/soc/fujitsu/a64fx-diag.c
172172
173173 A8293 MEDIA DRIVER
174−M: Antti Palosaari <crope@iki.fi>
175174 L: linux-media@vger.kernel.org
176−S: Maintained
175+S: Orphan
177176 W: https://linuxtv.org
178−W: http://palosaari.fi/linux/
179177 Q: http://patchwork.linuxtv.org/project/linux-media/list/
180−T: git git://linuxtv.org/anttip/media_tree.git
181178 F: drivers/media/dvb-frontends/a8293*
182179
183180 AACRAID SCSI RAID DRIVER
@@ -576,23 +573,17 @@ F: drivers/iio/accel/adxl372_i2c.c · 392 unmodified lines
576573 F: drivers/iio/accel/adxl372_spi.c
577574
578575 AF9013 MEDIA DRIVER
579−M: Antti Palosaari <crope@iki.fi>
580576 L: linux-media@vger.kernel.org
581−S: Maintained
577+S: Orphan
582578 W: https://linuxtv.org
583−W: http://palosaari.fi/linux/
584579 Q: http://patchwork.linuxtv.org/project/linux-media/list/
585−T: git git://linuxtv.org/anttip/media_tree.git
586580 F: drivers/media/dvb-frontends/af9013*
587581
588582 AF9033 MEDIA DRIVER
589−M: Antti Palosaari <crope@iki.fi>
590583 L: linux-media@vger.kernel.org
591−S: Maintained
584+S: Orphan
592585 W: https://linuxtv.org
593−W: http://palosaari.fi/linux/
594586 Q: http://patchwork.linuxtv.org/project/linux-media/list/
595−T: git git://linuxtv.org/anttip/media_tree.git
596587 F: drivers/media/dvb-frontends/af9033*
597588
598589 AFFS FILE SYSTEM
@@ -650,13 +641,10 @@ F: fs/aio.c · 51 unmodified lines
650641 F: include/linux/*aio*.h
651642
652643 AIRSPY MEDIA DRIVER
653−M: Antti Palosaari <crope@iki.fi>
654644 L: linux-media@vger.kernel.org
655−S: Maintained
645+S: Orphan
656646 W: https://linuxtv.org
657−W: http://palosaari.fi/linux/
658647 Q: http://patchwork.linuxtv.org/project/linux-media/list/
659−T: git git://linuxtv.org/anttip/media_tree.git
660648 F: drivers/media/usb/airspy/
661649
662650 ALACRITECH GIGABIT ETHERNET DRIVER
@@ -2155,6 +2143,7 @@ S: Maintained · 1492 unmodified lines
21552143 T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
21562144 F: arch/arm/boot/dts/nxp/imx/
21572145 F: arch/arm/boot/dts/nxp/mxs/
2146+F: arch/arm64/boot/dts/freescale/
21582147 X: arch/arm64/boot/dts/freescale/fsl-*
21592148 X: arch/arm64/boot/dts/freescale/qoriq-*
21602149 X: drivers/media/i2c/
@@ -2535,7 +2524,7 @@ F: drivers/*/*/*wpcm* · 374 unmodified lines
25352524 F: drivers/*/*wpcm*
25362525
25372526 ARM/NXP S32G ARCHITECTURE
2538−M: Chester Lin <clin@suse.com>
2527+M: Chester Lin <chester62515@gmail.com>
25392528 R: Andreas Färber <afaerber@suse.de>
25402529 R: Matthias Brugger <mbrugger@suse.com>
25412530 R: NXP S32 Linux Team <s32@nxp.com>
@@ -5076,7 +5065,6 @@ CLANG CONTROL FLOW INTEGRITY SUPPORT · 2534 unmodified lines
50765065 M: Sami Tolvanen <samitolvanen@google.com>
50775066 M: Kees Cook <keescook@chromium.org>
50785067 R: Nathan Chancellor <nathan@kernel.org>
5079−R: Nick Desaulniers <ndesaulniers@google.com>
50805068 L: llvm@lists.linux.dev
50815069 S: Supported
50825070 B: https://github.com/ClangBuiltLinux/linux/issues
@@ -5091,8 +5079,9 @@ F: .clang-format · 8 unmodified lines
50915079
50925080 CLANG/LLVM BUILD SUPPORT
50935081 M: Nathan Chancellor <nathan@kernel.org>
5094−M: Nick Desaulniers <ndesaulniers@google.com>
5095−R: Tom Rix <trix@redhat.com>
5082+R: Nick Desaulniers <ndesaulniers@google.com>
5083+R: Bill Wendling <morbo@google.com>
5084+R: Justin Stitt <justinstitt@google.com>
50965085 L: llvm@lists.linux.dev
50975086 S: Supported
50985087 W: https://clangbuiltlinux.github.io/
@@ -5242,7 +5231,6 @@ F: drivers/platform/x86/compal-laptop.c · 143 unmodified lines
52425231
52435232 COMPILER ATTRIBUTES
52445233 M: Miguel Ojeda <ojeda@kernel.org>
5245−R: Nick Desaulniers <ndesaulniers@google.com>
52465234 S: Maintained
52475235 F: include/linux/compiler_attributes.h
52485236
@@ -5605,13 +5593,10 @@ F: Documentation/driver-api/media/drivers/cx88* · 356 unmodified lines
56055593 F: drivers/media/pci/cx88/
56065594
56075595 CXD2820R MEDIA DRIVER
5608−M: Antti Palosaari <crope@iki.fi>
56095596 L: linux-media@vger.kernel.org
5610−S: Maintained
5597+S: Orphan
56115598 W: https://linuxtv.org
5612−W: http://palosaari.fi/linux/
56135599 Q: http://patchwork.linuxtv.org/project/linux-media/list/
5614−T: git git://linuxtv.org/anttip/media_tree.git
56155600 F: drivers/media/dvb-frontends/cxd2820r*
56165601
56175602 CXGB3 ETHERNET DRIVER (CXGB3)
@@ -5724,13 +5709,10 @@ F: Documentation/devicetree/bindings/input/cypress-sf.yaml · 106 unmodified lines
57245709 F: drivers/input/keyboard/cypress-sf.c
57255710
57265711 CYPRESS_FIRMWARE MEDIA DRIVER
5727−M: Antti Palosaari <crope@iki.fi>
57285712 L: linux-media@vger.kernel.org
5729−S: Maintained
5713+S: Orphan
57305714 W: https://linuxtv.org
5731−W: http://palosaari.fi/linux/
57325715 Q: http://patchwork.linuxtv.org/project/linux-media/list/
5733−T: git git://linuxtv.org/anttip/media_tree.git
57345716 F: drivers/media/common/cypress_firmware*
57355717
57365718 CYTTSP TOUCHSCREEN DRIVER
@@ -7320,53 +7302,38 @@ T: git git://linuxtv.org/media_tree.git · 1583 unmodified lines
73207302 F: drivers/media/pci/dt3155/
73217303
73227304 DVB_USB_AF9015 MEDIA DRIVER
7323−M: Antti Palosaari <crope@iki.fi>
73247305 L: linux-media@vger.kernel.org
7325−S: Maintained
7306+S: Orphan
73267307 W: https://linuxtv.org
7327−W: http://palosaari.fi/linux/
73287308 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7329−T: git git://linuxtv.org/anttip/media_tree.git
73307309 F: drivers/media/usb/dvb-usb-v2/af9015*
73317310
73327311 DVB_USB_AF9035 MEDIA DRIVER
7333−M: Antti Palosaari <crope@iki.fi>
73347312 L: linux-media@vger.kernel.org
7335−S: Maintained
7313+S: Orphan
73367314 W: https://linuxtv.org
7337−W: http://palosaari.fi/linux/
73387315 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7339−T: git git://linuxtv.org/anttip/media_tree.git
73407316 F: drivers/media/usb/dvb-usb-v2/af9035*
73417317
73427318 DVB_USB_ANYSEE MEDIA DRIVER
7343−M: Antti Palosaari <crope@iki.fi>
73447319 L: linux-media@vger.kernel.org
7345−S: Maintained
7320+S: Orphan
73467321 W: https://linuxtv.org
7347−W: http://palosaari.fi/linux/
73487322 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7349−T: git git://linuxtv.org/anttip/media_tree.git
73507323 F: drivers/media/usb/dvb-usb-v2/anysee*
73517324
73527325 DVB_USB_AU6610 MEDIA DRIVER
7353−M: Antti Palosaari <crope@iki.fi>
73547326 L: linux-media@vger.kernel.org
7355−S: Maintained
7327+S: Orphan
73567328 W: https://linuxtv.org
7357−W: http://palosaari.fi/linux/
73587329 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7359−T: git git://linuxtv.org/anttip/media_tree.git
73607330 F: drivers/media/usb/dvb-usb-v2/au6610*
73617331
73627332 DVB_USB_CE6230 MEDIA DRIVER
7363−M: Antti Palosaari <crope@iki.fi>
73647333 L: linux-media@vger.kernel.org
7365−S: Maintained
7334+S: Orphan
73667335 W: https://linuxtv.org
7367−W: http://palosaari.fi/linux/
73687336 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7369−T: git git://linuxtv.org/anttip/media_tree.git
73707337 F: drivers/media/usb/dvb-usb-v2/ce6230*
73717338
73727339 DVB_USB_CXUSB MEDIA DRIVER
@@ -7380,22 +7347,17 @@ T: git git://linuxtv.org/media_tree.git · 7 unmodified lines
73807347 F: drivers/media/usb/dvb-usb/cxusb*
73817348
73827349 DVB_USB_EC168 MEDIA DRIVER
7383−M: Antti Palosaari <crope@iki.fi>
73847350 L: linux-media@vger.kernel.org
7385−S: Maintained
7351+S: Orphan
73867352 W: https://linuxtv.org
7387−W: http://palosaari.fi/linux/
73887353 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7389−T: git git://linuxtv.org/anttip/media_tree.git
73907354 F: drivers/media/usb/dvb-usb-v2/ec168*
73917355
73927356 DVB_USB_GL861 MEDIA DRIVER
7393−M: Antti Palosaari <crope@iki.fi>
73947357 L: linux-media@vger.kernel.org
7395−S: Maintained
7358+S: Orphan
73967359 W: https://linuxtv.org
73977360 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7398−T: git git://linuxtv.org/anttip/media_tree.git
73997361 F: drivers/media/usb/dvb-usb-v2/gl861*
74007362
74017363 DVB_USB_MXL111SF MEDIA DRIVER
@@ -7409,23 +7371,18 @@ T: git git://linuxtv.org/mkrufky/mxl111sf.git · 7 unmodified lines
74097371 F: drivers/media/usb/dvb-usb-v2/mxl111sf*
74107372
74117373 DVB_USB_RTL28XXU MEDIA DRIVER
7412−M: Antti Palosaari <crope@iki.fi>
74137374 L: linux-media@vger.kernel.org
7414−S: Maintained
7375+S: Orphan
74157376 W: https://linuxtv.org
7416−W: http://palosaari.fi/linux/
74177377 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7418−T: git git://linuxtv.org/anttip/media_tree.git
74197378 F: drivers/media/usb/dvb-usb-v2/rtl28xxu*
74207379
74217380 DVB_USB_V2 MEDIA DRIVER
7422−M: Antti Palosaari <crope@iki.fi>
74237381 L: linux-media@vger.kernel.org
7424−S: Maintained
7382+S: Orphan
74257383 W: https://linuxtv.org
74267384 W: http://palosaari.fi/linux/
74277385 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7428−T: git git://linuxtv.org/anttip/media_tree.git
74297386 F: drivers/media/usb/dvb-usb-v2/dvb_usb*
74307387 F: drivers/media/usb/dvb-usb-v2/usb_urb.c
74317388
@@ -7467,13 +7424,10 @@ F: Documentation/devicetree/bindings/input/e3x0-button.txt · 35 unmodified lines
74677424 F: drivers/input/misc/e3x0-button.c
74687425
74697426 E4000 MEDIA DRIVER
7470−M: Antti Palosaari <crope@iki.fi>
74717427 L: linux-media@vger.kernel.org
7472−S: Maintained
7428+S: Orphan
74737429 W: https://linuxtv.org
7474−W: http://palosaari.fi/linux/
74757430 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7476−T: git git://linuxtv.org/anttip/media_tree.git
74777431 F: drivers/media/tuners/e4000*
74787432
74797433 EARTH_PT1 MEDIA DRIVER
@@ -7489,13 +7443,10 @@ S: Odd Fixes · 9 unmodified lines
74897443 F: drivers/media/pci/pt3/
74907444
74917445 EC100 MEDIA DRIVER
7492−M: Antti Palosaari <crope@iki.fi>
74937446 L: linux-media@vger.kernel.org
7494−S: Maintained
7447+S: Orphan
74957448 W: https://linuxtv.org
7496−W: http://palosaari.fi/linux/
74977449 Q: http://patchwork.linuxtv.org/project/linux-media/list/
7498−T: git git://linuxtv.org/anttip/media_tree.git
74997450 F: drivers/media/dvb-frontends/ec100*
75007451
75017452 ECRYPT FILE SYSTEM
@@ -7855,6 +7806,7 @@ R: Yue Hu <huyue2@coolpad.com> · 353 unmodified lines
78557806 R: Jeffle Xu <jefflexu@linux.alibaba.com>
78567807 L: linux-erofs@lists.ozlabs.org
78577808 S: Maintained
7809+W: https://erofs.docs.kernel.org
78587810 T: git git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git
78597811 F: Documentation/ABI/testing/sysfs-fs-erofs
78607812 F: Documentation/filesystems/erofs.rst
@@ -8112,13 +8064,10 @@ F: drivers/media/tuners/fc0011.c · 251 unmodified lines
81128064 F: drivers/media/tuners/fc0011.h
81138065
81148066 FC2580 MEDIA DRIVER
8115−M: Antti Palosaari <crope@iki.fi>
81168067 L: linux-media@vger.kernel.org
8117−S: Maintained
8068+S: Orphan
81188069 W: https://linuxtv.org
8119−W: http://palosaari.fi/linux/
81208070 Q: http://patchwork.linuxtv.org/project/linux-media/list/
8121−T: git git://linuxtv.org/anttip/media_tree.git
81228071 F: drivers/media/tuners/fc2580*
81238072
81248073 FCOE SUBSYSTEM (libfc, libfcoe, fcoe)
@@ -8950,7 +8899,6 @@ S: Maintained · 825 unmodified lines
89508899 F: scripts/get_maintainer.pl
89518900
89528901 GFS2 FILE SYSTEM
8953−M: Bob Peterson <rpeterso@redhat.com>
89548902 M: Andreas Gruenbacher <agruenba@redhat.com>
89558903 L: gfs2@lists.linux.dev
89568904 S: Supported
@@ -9249,13 +9197,10 @@ F: include/trace/events/habanalabs.h · 292 unmodified lines
92499197 F: include/uapi/drm/habanalabs_accel.h
92509198
92519199 HACKRF MEDIA DRIVER
9252−M: Antti Palosaari <crope@iki.fi>
92539200 L: linux-media@vger.kernel.org
9254−S: Maintained
9201+S: Orphan
92559202 W: https://linuxtv.org
9256−W: http://palosaari.fi/linux/
92579203 Q: http://patchwork.linuxtv.org/project/linux-media/list/
9258−T: git git://linuxtv.org/anttip/media_tree.git
92599204 F: drivers/media/usb/hackrf/
92609205
92619206 HANDSHAKE UPCALL FOR TRANSPORT LAYER SECURITY
@@ -9628,6 +9573,7 @@ F: drivers/crypto/hisilicon/sgl.c · 366 unmodified lines
96289573 F: include/linux/hisi_acc_qm.h
96299574
96309575 HISILICON ROCE DRIVER
9576+M: Chengchang Tang <tangchengchang@huawei.com>
96319577 M: Junxian Huang <huangjunxian6@hisilicon.com>
96329578 L: linux-rdma@vger.kernel.org
96339579 S: Maintained
@@ -11025,7 +10971,6 @@ F: drivers/net/wireless/intel/iwlwifi/ · 1391 unmodified lines
1102510971
1102610972 INTEL WMI SLIM BOOTLOADER (SBL) FIRMWARE UPDATE DRIVER
1102710973 M: Jithu Joseph <jithu.joseph@intel.com>
11028−R: Maurice Ma <maurice.ma@intel.com>
1102910974 S: Maintained
1103010975 W: https://slimbootloader.github.io/security/firmware-update.html
1103110976 F: drivers/platform/x86/intel/wmi/sbl-fw-update.c
@@ -11329,13 +11274,10 @@ F: Documentation/hwmon/it87.rst · 297 unmodified lines
1132911274 F: drivers/hwmon/it87.c
1133011275
1133111276 IT913X MEDIA DRIVER
11332−M: Antti Palosaari <crope@iki.fi>
1133311277 L: linux-media@vger.kernel.org
11334−S: Maintained
11278+S: Orphan
1133511279 W: https://linuxtv.org
11336−W: http://palosaari.fi/linux/
1133711280 Q: http://patchwork.linuxtv.org/project/linux-media/list/
11338−T: git git://linuxtv.org/anttip/media_tree.git
1133911281 F: drivers/media/tuners/it913x*
1134011282
1134111283 ITE IT66121 HDMI BRIDGE DRIVER
@@ -11517,7 +11459,6 @@ F: fs/autofs/ · 175 unmodified lines
1151711459 KERNEL BUILD + files below scripts/ (unless maintained elsewhere)
1151811460 M: Masahiro Yamada <masahiroy@kernel.org>
1151911461 R: Nathan Chancellor <nathan@kernel.org>
11520−R: Nick Desaulniers <ndesaulniers@google.com>
1152111462 R: Nicolas Schier <nicolas@fjasle.eu>
1152211463 L: linux-kbuild@vger.kernel.org
1152311464 S: Maintained
@@ -12209,6 +12150,13 @@ F: include/linux/nd.h · 685 unmodified lines
1220912150 F: include/uapi/linux/ndctl.h
1221012151 F: tools/testing/nvdimm/
1221112152
12153+LIBRARY CODE
12154+M: Andrew Morton <akpm@linux-foundation.org>
12155+L: linux-kernel@vger.kernel.org
12156+S: Supported
12157+T: git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm.git mm-nonmm-unstable
12158+F: lib/*
12159+
1221212160 LICENSES and SPDX stuff
1221312161 M: Thomas Gleixner <tglx@linutronix.de>
1221412162 M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
@@ -12688,13 +12636,10 @@ W: http://www.tazenda.demon.co.uk/phil/linux-hp · 473 unmodified lines
1268812636 F: arch/m68k/hp300/
1268912637
1269012638 M88DS3103 MEDIA DRIVER
12691−M: Antti Palosaari <crope@iki.fi>
1269212639 L: linux-media@vger.kernel.org
12693−S: Maintained
12640+S: Orphan
1269412641 W: https://linuxtv.org
12695−W: http://palosaari.fi/linux/
1269612642 Q: http://patchwork.linuxtv.org/project/linux-media/list/
12697−T: git git://linuxtv.org/anttip/media_tree.git
1269812643 F: drivers/media/dvb-frontends/m88ds3103*
1269912644
1270012645 M88RS2000 MEDIA DRIVER
@@ -13779,7 +13724,6 @@ F: drivers/net/ethernet/mellanox/mlxfw/ · 1078 unmodified lines
1377913724 MELLANOX HARDWARE PLATFORM SUPPORT
1378013725 M: Hans de Goede <hdegoede@redhat.com>
1378113726 M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
13782−M: Mark Gross <markgross@kernel.org>
1378313727 M: Vadim Pasternak <vadimp@nvidia.com>
1378413728 L: platform-driver-x86@vger.kernel.org
1378513729 S: Supported
@@ -14388,7 +14332,6 @@ F: drivers/platform/surface/surface_gpe.c · 602 unmodified lines
1438814332 MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
1438914333 M: Hans de Goede <hdegoede@redhat.com>
1439014334 M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
14391−M: Mark Gross <markgross@kernel.org>
1439214335 M: Maximilian Luz <luzmaximilian@gmail.com>
1439314336 L: platform-driver-x86@vger.kernel.org
1439414337 S: Maintained
@@ -14590,20 +14533,16 @@ F: include/asm-generic/tlb.h · 195 unmodified lines
1459014533 F: mm/mmu_gather.c
1459114534
1459214535 MN88472 MEDIA DRIVER
14593−M: Antti Palosaari <crope@iki.fi>
1459414536 L: linux-media@vger.kernel.org
14595−S: Maintained
14537+S: Orphan
1459614538 W: https://linuxtv.org
14597−W: http://palosaari.fi/linux/
1459814539 Q: http://patchwork.linuxtv.org/project/linux-media/list/
1459914540 F: drivers/media/dvb-frontends/mn88472*
1460014541
1460114542 MN88473 MEDIA DRIVER
14602−M: Antti Palosaari <crope@iki.fi>
1460314543 L: linux-media@vger.kernel.org
14604−S: Maintained
14544+S: Orphan
1460514545 W: https://linuxtv.org
14606−W: http://palosaari.fi/linux/
1460714546 Q: http://patchwork.linuxtv.org/project/linux-media/list/
1460814547 F: drivers/media/dvb-frontends/mn88473*
1460914548
@@ -14691,23 +14630,17 @@ S: Orphan · 81 unmodified lines
1469114630 F: drivers/platform/x86/msi-wmi.c
1469214631
1469314632 MSI001 MEDIA DRIVER
14694−M: Antti Palosaari <crope@iki.fi>
1469514633 L: linux-media@vger.kernel.org
14696−S: Maintained
14634+S: Orphan
1469714635 W: https://linuxtv.org
14698−W: http://palosaari.fi/linux/
1469914636 Q: http://patchwork.linuxtv.org/project/linux-media/list/
14700−T: git git://linuxtv.org/anttip/media_tree.git
1470114637 F: drivers/media/tuners/msi001*
1470214638
1470314639 MSI2500 MEDIA DRIVER
14704−M: Antti Palosaari <crope@iki.fi>
1470514640 L: linux-media@vger.kernel.org
14706−S: Maintained
14641+S: Orphan
1470714642 W: https://linuxtv.org
14708−W: http://palosaari.fi/linux/
1470914643 Q: http://patchwork.linuxtv.org/project/linux-media/list/
14710−T: git git://linuxtv.org/anttip/media_tree.git
1471114644 F: drivers/media/usb/msi2500/
1471214645
1471314646 MSTAR INTERRUPT CONTROLLER DRIVER
@@ -14995,6 +14928,7 @@ M: Jakub Kicinski <kuba@kernel.org> · 281 unmodified lines
1499514928 M: Paolo Abeni <pabeni@redhat.com>
1499614929 L: netdev@vger.kernel.org
1499714930 S: Maintained
14931+P: Documentation/process/maintainer-netdev.rst
1499814932 Q: https://patchwork.kernel.org/project/netdevbpf/list/
1499914933 T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
1500014934 T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next.git
@@ -15046,6 +14980,7 @@ M: Jakub Kicinski <kuba@kernel.org> · 45 unmodified lines
1504614980 M: Paolo Abeni <pabeni@redhat.com>
1504714981 L: netdev@vger.kernel.org
1504814982 S: Maintained
14983+P: Documentation/process/maintainer-netdev.rst
1504914984 Q: https://patchwork.kernel.org/project/netdevbpf/list/
1505014985 B: mailto:netdev@vger.kernel.org
1505114986 T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
@@ -15056,6 +14991,7 @@ F: Documentation/networking/ · 4 unmodified lines
1505614991 F: Documentation/process/maintainer-netdev.rst
1505714992 F: Documentation/userspace-api/netlink/
1505814993 F: include/linux/in.h
14994+F: include/linux/indirect_call_wrapper.h
1505914995 F: include/linux/net.h
1506014996 F: include/linux/netdevice.h
1506114997 F: include/net/
@@ -15068,6 +15004,7 @@ F: lib/random32.c · 6 unmodified lines
1506815004 F: net/
1506915005 F: tools/net/
1507015006 F: tools/testing/selftests/net/
15007+X: net/9p/
1507115008 X: net/bluetooth/
1507215009
1507315010 NETWORKING [IPSEC]
@@ -17775,13 +17712,10 @@ F: drivers/bus/fsl-mc/ · 2701 unmodified lines
1777517712 F: include/uapi/linux/fsl_mc.h
1777617713
1777717714 QT1010 MEDIA DRIVER
17778−M: Antti Palosaari <crope@iki.fi>
1777917715 L: linux-media@vger.kernel.org
17780−S: Maintained
17716+S: Orphan
1778117717 W: https://linuxtv.org
17782−W: http://palosaari.fi/linux/
1778317718 Q: http://patchwork.linuxtv.org/project/linux-media/list/
17784−T: git git://linuxtv.org/anttip/media_tree.git
1778517719 F: drivers/media/tuners/qt1010*
1778617720
1778717721 QUALCOMM ATH12K WIRELESS DRIVER
@@ -17948,6 +17882,8 @@ L: iommu@lists.linux.dev · 160 unmodified lines
1794817882 L: linux-arm-msm@vger.kernel.org
1794917883 S: Maintained
1795017884 F: drivers/iommu/arm/arm-smmu/qcom_iommu.c
17885+F: drivers/iommu/arm/arm-smmu/arm-smmu-qcom*
17886+F: drivers/iommu/msm_iommu*
1795117887
1795217888 QUALCOMM IPC ROUTER (QRTR) DRIVER
1795317889 M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -18834,33 +18770,24 @@ S: Maintained · 880 unmodified lines
1883418770 F: drivers/tty/rpmsg_tty.c
1883518771
1883618772 RTL2830 MEDIA DRIVER
18837−M: Antti Palosaari <crope@iki.fi>
1883818773 L: linux-media@vger.kernel.org
18839−S: Maintained
18774+S: Orphan
1884018775 W: https://linuxtv.org
18841−W: http://palosaari.fi/linux/
1884218776 Q: http://patchwork.linuxtv.org/project/linux-media/list/
18843−T: git git://linuxtv.org/anttip/media_tree.git
1884418777 F: drivers/media/dvb-frontends/rtl2830*
1884518778
1884618779 RTL2832 MEDIA DRIVER
18847−M: Antti Palosaari <crope@iki.fi>
1884818780 L: linux-media@vger.kernel.org
18849−S: Maintained
18781+S: Orphan
1885018782 W: https://linuxtv.org
18851−W: http://palosaari.fi/linux/
1885218783 Q: http://patchwork.linuxtv.org/project/linux-media/list/
18853−T: git git://linuxtv.org/anttip/media_tree.git
1885418784 F: drivers/media/dvb-frontends/rtl2832*
1885518785
1885618786 RTL2832_SDR MEDIA DRIVER
18857−M: Antti Palosaari <crope@iki.fi>
1885818787 L: linux-media@vger.kernel.org
18859−S: Maintained
18788+S: Orphan
1886018789 W: https://linuxtv.org
18861−W: http://palosaari.fi/linux/
1886218790 Q: http://patchwork.linuxtv.org/project/linux-media/list/
18863−T: git git://linuxtv.org/anttip/media_tree.git
1886418791 F: drivers/media/dvb-frontends/rtl2832_sdr*
1886518792
1886618793 RTL8180 WIRELESS DRIVER
@@ -19670,13 +19597,10 @@ F: drivers/media/platform/renesas/sh_vou.c · 803 unmodified lines
1967019597 F: include/media/drv-intf/sh_vou.h
1967119598
1967219599 SI2157 MEDIA DRIVER
19673−M: Antti Palosaari <crope@iki.fi>
1967419600 L: linux-media@vger.kernel.org
19675−S: Maintained
19601+S: Orphan
1967619602 W: https://linuxtv.org
19677−W: http://palosaari.fi/linux/
1967819603 Q: http://patchwork.linuxtv.org/project/linux-media/list/
19679−T: git git://linuxtv.org/anttip/media_tree.git
1968019604 F: drivers/media/tuners/si2157*
1968119605
1968219606 SI2165 MEDIA DRIVER
@@ -19688,13 +19612,10 @@ Q: http://patchwork.linuxtv.org/project/linux-media/list/ · 5 unmodified lines
1968819612 F: drivers/media/dvb-frontends/si2165*
1968919613
1969019614 SI2168 MEDIA DRIVER
19691−M: Antti Palosaari <crope@iki.fi>
1969219615 L: linux-media@vger.kernel.org
19693−S: Maintained
19616+S: Orphan
1969419617 W: https://linuxtv.org
19695−W: http://palosaari.fi/linux/
1969619618 Q: http://patchwork.linuxtv.org/project/linux-media/list/
19697−T: git git://linuxtv.org/anttip/media_tree.git
1969819619 F: drivers/media/dvb-frontends/si2168*
1969919620
1970019621 SI470X FM RADIO RECEIVER I2C DRIVER
@@ -21196,33 +21117,24 @@ W: http://tcp-lp-mod.sourceforge.net/ · 1495 unmodified lines
2119621117 F: net/ipv4/tcp_lp.c
2119721118
2119821119 TDA10071 MEDIA DRIVER
21199−M: Antti Palosaari <crope@iki.fi>
2120021120 L: linux-media@vger.kernel.org
21201−S: Maintained
21121+S: Orphan
2120221122 W: https://linuxtv.org
21203−W: http://palosaari.fi/linux/
2120421123 Q: http://patchwork.linuxtv.org/project/linux-media/list/
21205−T: git git://linuxtv.org/anttip/media_tree.git
2120621124 F: drivers/media/dvb-frontends/tda10071*
2120721125
2120821126 TDA18212 MEDIA DRIVER
21209−M: Antti Palosaari <crope@iki.fi>
2121021127 L: linux-media@vger.kernel.org
21211−S: Maintained
21128+S: Orphan
2121221129 W: https://linuxtv.org
21213−W: http://palosaari.fi/linux/
2121421130 Q: http://patchwork.linuxtv.org/project/linux-media/list/
21215−T: git git://linuxtv.org/anttip/media_tree.git
2121621131 F: drivers/media/tuners/tda18212*
2121721132
2121821133 TDA18218 MEDIA DRIVER
21219−M: Antti Palosaari <crope@iki.fi>
2122021134 L: linux-media@vger.kernel.org
21221−S: Maintained
21135+S: Orphan
2122221136 W: https://linuxtv.org
21223−W: http://palosaari.fi/linux/
2122421137 Q: http://patchwork.linuxtv.org/project/linux-media/list/
21225−T: git git://linuxtv.org/anttip/media_tree.git
2122621138 F: drivers/media/tuners/tda18218*
2122721139
2122821140 TDA18250 MEDIA DRIVER
@@ -21769,7 +21681,9 @@ F: Documentation/devicetree/bindings/counter/ti-eqep.yaml · 540 unmodified lines
2176921681 F: drivers/counter/ti-eqep.c
2177021682
2177121683 TI ETHERNET SWITCH DRIVER (CPSW)
21772−R: Grygorii Strashko <grygorii.strashko@ti.com>
21684+R: Siddharth Vadapalli <s-vadapalli@ti.com>
21685+R: Ravi Gunasekaran <r-gunasekaran@ti.com>
21686+R: Roger Quadros <rogerq@kernel.org>
2177321687 L: linux-omap@vger.kernel.org
2177421688 L: netdev@vger.kernel.org
2177521689 S: Maintained
@@ -21793,6 +21707,15 @@ F: Documentation/devicetree/bindings/media/i2c/ti,ds90* · 17 unmodified lines
2179321707 F: drivers/media/i2c/ds90*
2179421708 F: include/media/i2c/ds90*
2179521709
21710+TI ICSSG ETHERNET DRIVER (ICSSG)
21711+R: MD Danish Anwar <danishanwar@ti.com>
21712+R: Roger Quadros <rogerq@kernel.org>
21713+L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
21714+L: netdev@vger.kernel.org
21715+S: Maintained
21716+F: Documentation/devicetree/bindings/net/ti,icss*.yaml
21717+F: drivers/net/ethernet/ti/icssg/*
21718+
2179621719 TI J721E CSI2RX DRIVER
2179721720 M: Jai Luthra <j-luthra@ti.com>
2179821721 L: linux-media@vger.kernel.org
@@ -22068,6 +21991,7 @@ F: drivers/watchdog/tqmx86_wdt.c · 269 unmodified lines
2206821991 TRACING
2206921992 M: Steven Rostedt <rostedt@goodmis.org>
2207021993 M: Masami Hiramatsu <mhiramat@kernel.org>
21994+R: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
2207121995 L: linux-kernel@vger.kernel.org
2207221996 L: linux-trace-kernel@vger.kernel.org
2207321997 S: Maintained
@@ -22146,13 +22070,10 @@ F: include/uapi/linux/serial_core.h · 72 unmodified lines
2214622070 F: include/uapi/linux/tty.h
2214722071
2214822072 TUA9001 MEDIA DRIVER
22149−M: Antti Palosaari <crope@iki.fi>
2215022073 L: linux-media@vger.kernel.org
22151−S: Maintained
22074+S: Orphan
2215222075 W: https://linuxtv.org
22153−W: http://palosaari.fi/linux/
2215422076 Q: http://patchwork.linuxtv.org/project/linux-media/list/
22155−T: git git://linuxtv.org/anttip/media_tree.git
2215622077 F: drivers/media/tuners/tua9001*
2215722078
2215822079 TULIP NETWORK DRIVERS
@@ -23654,7 +23575,6 @@ F: drivers/platform/x86/x86-android-tablets/ · 1495 unmodified lines
2365423575 X86 PLATFORM DRIVERS
2365523576 M: Hans de Goede <hdegoede@redhat.com>
2365623577 M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
23657−M: Mark Gross <markgross@kernel.org>
2365823578 L: platform-driver-x86@vger.kernel.org
2365923579 S: Maintained
2366023580 Q: https://patchwork.kernel.org/project/platform-driver-x86/list/
@@ -23692,6 +23612,20 @@ F: arch/x86/kernel/dumpstack.c · 31 unmodified lines
2369223612 F: arch/x86/kernel/stacktrace.c
2369323613 F: arch/x86/kernel/unwind_*.c
2369423614
23615+X86 TRUST DOMAIN EXTENSIONS (TDX)
23616+M: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
23617+R: Dave Hansen <dave.hansen@linux.intel.com>
23618+L: x86@kernel.org
23619+L: linux-coco@lists.linux.dev
23620+S: Supported
23621+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/tdx
23622+F: arch/x86/boot/compressed/tdx*
23623+F: arch/x86/coco/tdx/
23624+F: arch/x86/include/asm/shared/tdx.h
23625+F: arch/x86/include/asm/tdx.h
23626+F: arch/x86/virt/vmx/tdx/
23627+F: drivers/virt/coco/tdx-guest
23628+
2369523629 X86 VDSO
2369623630 M: Andy Lutomirski <luto@kernel.org>
2369723631 L: linux-kernel@vger.kernel.org
@@ -23872,8 +23806,7 @@ T: git git://git.kernel.org/pub/scm/fs/xfs/xfs-linux.git · 174 unmodified lines
2387223806 P: Documentation/filesystems/xfs-maintainer-entry-profile.rst
2387323807 F: Documentation/ABI/testing/sysfs-fs-xfs
2387423808 F: Documentation/admin-guide/xfs.rst
23875−F: Documentation/filesystems/xfs-delayed-logging-design.rst
23876−F: Documentation/filesystems/xfs-self-describing-metadata.rst
23809+F: Documentation/filesystems/xfs-*
2387723810 F: fs/xfs/
2387823811 F: include/uapi/linux/dqblk_xfs.h
2387923812 F: include/uapi/linux/fsmap.h
@@ -24085,20 +24018,16 @@ S: Orphan · 205 unmodified lines
2408524018 F: drivers/net/wireless/zydas/zd1211rw/
2408624019
2408724020 ZD1301 MEDIA DRIVER
24088−M: Antti Palosaari <crope@iki.fi>
2408924021 L: linux-media@vger.kernel.org
24090−S: Maintained
24022+S: Orphan
2409124023 W: https://linuxtv.org/
24092−W: http://palosaari.fi/linux/
2409324024 Q: https://patchwork.linuxtv.org/project/linux-media/list/
2409424025 F: drivers/media/usb/dvb-usb-v2/zd1301*
2409524026
2409624027 ZD1301_DEMOD MEDIA DRIVER
24097−M: Antti Palosaari <crope@iki.fi>
2409824028 L: linux-media@vger.kernel.org
24099−S: Maintained
24029+S: Orphan
2410024030 W: https://linuxtv.org/
24101−W: http://palosaari.fi/linux/
2410224031 Q: https://patchwork.linuxtv.org/project/linux-media/list/
2410324032 F: drivers/media/dvb-frontends/zd1301_demod*
2410424033
Makefile+1−1
@@ -2,7 +2,7 @@ · 1 unmodified line
22 VERSION = 6
33 PATCHLEVEL = 7
44 SUBLEVEL = 0
5−EXTRAVERSION = -rc1
5+EXTRAVERSION = -rc5
66 NAME = Hurr durr I'ma ninja sloth
77
88 # *DOCUMENTATION*
arch/arm/boot/dts/broadcom/bcm2711-rpi-400.dts+1−3
@@ -36,9 +36,7 @@ · 35 unmodified lines
3636 gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
3737 };
3838
39−&leds {
40− /delete-node/ led_act;
41−};
39+/delete-node/ &led_act;
4240
4341 &pm {
4442 /delete-property/ system-power-controller;
arch/arm/boot/dts/nxp/imx/imx6q-skov-reve-mi1010ait-1cp1.dts+2−2
@@ -37,9 +37,9 @@ · 36 unmodified lines
3737
3838 &clks {
3939 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
40− <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
40+ <&clks IMX6QDL_CLK_LDB_DI1_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>;
4141 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
42− <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
42+ <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>;
4343 };
4444
4545 &hdmi {
arch/arm/boot/dts/nxp/imx/imx6ul-pico.dtsi+2−0
@@ -121,6 +121,8 @@ · 120 unmodified lines
121121 max-speed = <100>;
122122 interrupt-parent = <&gpio5>;
123123 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
124+ clocks = <&clks IMX6UL_CLK_ENET_REF>;
125+ clock-names = "rmii-ref";
124126 };
125127 };
126128 };
arch/arm/boot/dts/nxp/imx/imx7s.dtsi+4−4
@@ -454,7 +454,7 @@ · 453 unmodified lines
454454 };
455455
456456 gpt1: timer@302d0000 {
457− compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
457+ compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
458458 reg = <0x302d0000 0x10000>;
459459 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
460460 clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
@@ -463,7 +463,7 @@ · 2 unmodified lines
463463 };
464464
465465 gpt2: timer@302e0000 {
466− compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
466+ compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
467467 reg = <0x302e0000 0x10000>;
468468 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
469469 clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
@@ -473,7 +473,7 @@ · 3 unmodified lines
473473 };
474474
475475 gpt3: timer@302f0000 {
476− compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
476+ compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
477477 reg = <0x302f0000 0x10000>;
478478 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
479479 clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
@@ -483,7 +483,7 @@ · 3 unmodified lines
483483 };
484484
485485 gpt4: timer@30300000 {
486− compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt";
486+ compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt";
487487 reg = <0x30300000 0x10000>;
488488 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
489489 clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
arch/arm/boot/dts/nxp/mxs/imx28-xea.dts+1−0
@@ -8,6 +8,7 @@ · 7 unmodified lines
88 #include "imx28-lwe.dtsi"
99
1010 / {
11+ model = "Liebherr XEA board";
1112 compatible = "lwn,imx28-xea", "fsl,imx28";
1213 };
1314
arch/arm/boot/dts/rockchip/rk3128.dtsi+1−1
@@ -848,7 +848,7 @@ · 847 unmodified lines
848848 };
849849
850850 sdmmc_pwren: sdmmc-pwren {
851− rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
851+ rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>;
852852 };
853853
854854 sdmmc_bus4: sdmmc-bus4 {
arch/arm/boot/dts/rockchip/rk322x.dtsi+3−3
@@ -215,9 +215,9 @@ · 214 unmodified lines
215215
216216 power-domain@RK3228_PD_VOP {
217217 reg = <RK3228_PD_VOP>;
218− clocks =<&cru ACLK_VOP>,
219− <&cru DCLK_VOP>,
220− <&cru HCLK_VOP>;
218+ clocks = <&cru ACLK_VOP>,
219+ <&cru DCLK_VOP>,
220+ <&cru HCLK_VOP>;
221221 pm_qos = <&qos_vop>;
222222 #power-domain-cells = <0>;
223223 };
arch/arm/include/asm/kexec.h+0−4
@@ -2,8 +2,6 @@ · 1 unmodified line
22 #ifndef _ARM_KEXEC_H
33 #define _ARM_KEXEC_H
44
5−#ifdef CONFIG_KEXEC
6−
75 /* Maximum physical address we can use pages from */
86 #define KEXEC_SOURCE_MEMORY_LIMIT (-1UL)
97 /* Maximum address we can reach in physical address mode */
@@ -82,6 +80,4 @@ static inline struct page *boot_pfn_to_page(unsigned long boot_pfn) · 72 unmodified lines
8280
8381 #endif /* __ASSEMBLY__ */
8482
85−#endif /* CONFIG_KEXEC */
86−
8783 #endif /* _ARM_KEXEC_H */
arch/arm/kernel/Makefile+1−1
@@ -59,7 +59,7 @@ obj-$(CONFIG_FUNCTION_TRACER) += entry-ftrace.o · 58 unmodified lines
5959 obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o insn.o patch.o
6060 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o insn.o patch.o
6161 obj-$(CONFIG_JUMP_LABEL) += jump_label.o insn.o patch.o
62−obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
62+obj-$(CONFIG_KEXEC_CORE) += machine_kexec.o relocate_kernel.o
6363 # Main staffs in KPROBES are in arch/arm/probes/ .
6464 obj-$(CONFIG_KPROBES) += patch.o insn.o
6565 obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o
arch/arm/mach-imx/mmdc.c+6−1
@@ -501,6 +501,10 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b · 500 unmodified lines
501501
502502 name = devm_kasprintf(&pdev->dev,
503503 GFP_KERNEL, "mmdc%d", ret);
504+ if (!name) {
505+ ret = -ENOMEM;
506+ goto pmu_release_id;
507+ }
504508
505509 pmu_mmdc->mmdc_ipg_clk = mmdc_ipg_clk;
506510 pmu_mmdc->devtype_data = (struct fsl_mmdc_devtype_data *)of_id->data;
@@ -523,9 +527,10 @@ static int imx_mmdc_perf_init(struct platform_device *pdev, void __iomem *mmdc_b · 16 unmodified lines
523527
524528 pmu_register_err:
525529 pr_warn("MMDC Perf PMU failed (%d), disabled\n", ret);
526− ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
527530 cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node);
528531 hrtimer_cancel(&pmu_mmdc->hrtimer);
532+pmu_release_id:
533+ ida_simple_remove(&mmdc_ida, pmu_mmdc->id);
529534 pmu_free:
530535 kfree(pmu_mmdc);
531536 return ret;
arch/arm/xen/enlighten.c+2−1
@@ -484,7 +484,8 @@ static int __init xen_guest_init(void) · 483 unmodified lines
484484 * for secondary CPUs as they are brought up.
485485 * For uniformity we use VCPUOP_register_vcpu_info even on cpu0.
486486 */
487− xen_vcpu_info = alloc_percpu(struct vcpu_info);
487+ xen_vcpu_info = __alloc_percpu(sizeof(struct vcpu_info),
488+ 1 << fls(sizeof(struct vcpu_info) - 1));
488489 if (xen_vcpu_info == NULL)
489490 return -ENOMEM;
490491
arch/arm64/Makefile+1−1
@@ -158,7 +158,7 @@ endif · 157 unmodified lines
158158
159159 all: $(notdir $(KBUILD_IMAGE))
160160
161−
161+vmlinuz.efi: Image
162162 Image vmlinuz.efi: vmlinux
163163 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
164164
arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi+1−4
@@ -82,12 +82,9 @@ · 81 unmodified lines
8282 pinctrl-0 = <&pinctrl_wifi_pdn>;
8383 gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>;
8484 enable-active-high;
85+ regulator-always-on;
8586 regulator-name = "wifi_pwrdn_fake_regulator";
8687 regulator-settling-time-us = <100>;
87−
88− regulator-state-mem {
89− regulator-off-in-suspend;
90− };
9188 };
9289
9390 reg_pcie_switch: regulator-pcie-switch {
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi+1−1
@@ -149,7 +149,7 @@ dma_subsys: bus@5a000000 { · 148 unmodified lines
149149 clock-names = "ipg", "per";
150150 assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>;
151151 assigned-clock-rates = <24000000>;
152− #pwm-cells = <2>;
152+ #pwm-cells = <3>;
153153 power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>;
154154 };
155155
arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi+4−4
@@ -29,7 +29,7 @@ lsio_subsys: bus@5d000000 { · 28 unmodified lines
2929 <&pwm0_lpcg 1>;
3030 assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>;
3131 assigned-clock-rates = <24000000>;
32− #pwm-cells = <2>;
32+ #pwm-cells = <3>;
3333 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
3434 status = "disabled";
3535 };
@@ -42,7 +42,7 @@ lsio_subsys: bus@5d000000 { · 6 unmodified lines
4242 <&pwm1_lpcg 1>;
4343 assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>;
4444 assigned-clock-rates = <24000000>;
45− #pwm-cells = <2>;
45+ #pwm-cells = <3>;
4646 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
4747 status = "disabled";
4848 };
@@ -55,7 +55,7 @@ lsio_subsys: bus@5d000000 { · 6 unmodified lines
5555 <&pwm2_lpcg 1>;
5656 assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>;
5757 assigned-clock-rates = <24000000>;
58− #pwm-cells = <2>;
58+ #pwm-cells = <3>;
5959 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
6060 status = "disabled";
6161 };
@@ -68,7 +68,7 @@ lsio_subsys: bus@5d000000 { · 6 unmodified lines
6868 <&pwm3_lpcg 1>;
6969 assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>;
7070 assigned-clock-rates = <24000000>;
71− #pwm-cells = <2>;
71+ #pwm-cells = <3>;
7272 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
7373 status = "disabled";
7474 };
arch/arm64/boot/dts/freescale/imx8mp.dtsi+2−0
@@ -2072,6 +2072,7 @@ · 2071 unmodified lines
20722072 phys = <&usb3_phy0>, <&usb3_phy0>;
20732073 phy-names = "usb2-phy", "usb3-phy";
20742074 snps,gfladj-refclk-lpm-sel-quirk;
2075+ snps,parkmode-disable-ss-quirk;
20752076 };
20762077
20772078 };
@@ -2114,6 +2115,7 @@ · 36 unmodified lines
21142115 phys = <&usb3_phy1>, <&usb3_phy1>;
21152116 phy-names = "usb2-phy", "usb3-phy";
21162117 snps,gfladj-refclk-lpm-sel-quirk;
2118+ snps,parkmode-disable-ss-quirk;
21172119 };
21182120 };
21192121
arch/arm64/boot/dts/freescale/imx8mq.dtsi+2−0
@@ -1649,6 +1649,7 @@ · 1648 unmodified lines
16491649 phys = <&usb3_phy0>, <&usb3_phy0>;
16501650 phy-names = "usb2-phy", "usb3-phy";
16511651 power-domains = <&pgc_otg1>;
1652+ snps,parkmode-disable-ss-quirk;
16521653 status = "disabled";
16531654 };
16541655
@@ -1680,6 +1681,7 @@ · 25 unmodified lines
16801681 phys = <&usb3_phy1>, <&usb3_phy1>;
16811682 phy-names = "usb2-phy", "usb3-phy";
16821683 power-domains = <&pgc_otg2>;
1684+ snps,parkmode-disable-ss-quirk;
16831685 status = "disabled";
16841686 };
16851687
arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi+11−0
@@ -96,6 +96,17 @@ · 95 unmodified lines
9696 status = "okay";
9797 };
9898
99+&edma3 {
100+ power-domains = <&pd IMX_SC_R_DMA_1_CH0>,
101+ <&pd IMX_SC_R_DMA_1_CH1>,
102+ <&pd IMX_SC_R_DMA_1_CH2>,
103+ <&pd IMX_SC_R_DMA_1_CH3>,
104+ <&pd IMX_SC_R_DMA_1_CH4>,
105+ <&pd IMX_SC_R_DMA_1_CH5>,
106+ <&pd IMX_SC_R_DMA_1_CH6>,
107+ <&pd IMX_SC_R_DMA_1_CH7>;
108+};
109+
99110 &flexcan1 {
100111 fsl,clk-source = /bits/ 8 <1>;
101112 };
arch/arm64/boot/dts/freescale/imx8ulp.dtsi+3−3
@@ -483,7 +483,7 @@ · 482 unmodified lines
483483 };
484484 };
485485
486− gpioe: gpio@2d000080 {
486+ gpioe: gpio@2d000000 {
487487 compatible = "fsl,imx8ulp-gpio";
488488 reg = <0x2d000000 0x1000>;
489489 gpio-controller;
@@ -498,7 +498,7 @@ · 8 unmodified lines
498498 gpio-ranges = <&iomuxc1 0 32 24>;
499499 };
500500
501− gpiof: gpio@2d010080 {
501+ gpiof: gpio@2d010000 {
502502 compatible = "fsl,imx8ulp-gpio";
503503 reg = <0x2d010000 0x1000>;
504504 gpio-controller;
@@ -534,7 +534,7 @@ · 29 unmodified lines
534534 };
535535 };
536536
537− gpiod: gpio@2e200080 {
537+ gpiod: gpio@2e200000 {
538538 compatible = "fsl,imx8ulp-gpio";
539539 reg = <0x2e200000 0x1000>;
540540 gpio-controller;
arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts+1−1
@@ -577,7 +577,7 @@ · 576 unmodified lines
577577 fsl,pins = <
578578 MX93_PAD_UART2_TXD__LPUART2_TX 0x31e
579579 MX93_PAD_UART2_RXD__LPUART2_RX 0x31e
580− MX93_PAD_SAI1_TXD0__LPUART2_RTS_B 0x31e
580+ MX93_PAD_SAI1_TXD0__LPUART2_RTS_B 0x51e
581581 >;
582582 };
583583
arch/arm64/boot/dts/freescale/imx93.dtsi+5−5
@@ -417,7 +417,7 @@ · 416 unmodified lines
417417 compatible = "fsl,imx93-src-slice";
418418 reg = <0x44462400 0x400>, <0x44465800 0x400>;
419419 #power-domain-cells = <0>;
420− clocks = <&clk IMX93_CLK_MEDIA_AXI>,
420+ clocks = <&clk IMX93_CLK_NIC_MEDIA_GATE>,
421421 <&clk IMX93_CLK_MEDIA_APB>;
422422 };
423423 };
@@ -957,7 +957,7 @@ · 533 unmodified lines
957957 };
958958 };
959959
960− gpio2: gpio@43810080 {
960+ gpio2: gpio@43810000 {
961961 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
962962 reg = <0x43810000 0x1000>;
963963 gpio-controller;
@@ -972,7 +972,7 @@ · 8 unmodified lines
972972 gpio-ranges = <&iomuxc 0 4 30>;
973973 };
974974
975− gpio3: gpio@43820080 {
975+ gpio3: gpio@43820000 {
976976 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
977977 reg = <0x43820000 0x1000>;
978978 gpio-controller;
@@ -988,7 +988,7 @@ · 9 unmodified lines
988988 <&iomuxc 26 34 2>, <&iomuxc 28 0 4>;
989989 };
990990
991− gpio4: gpio@43830080 {
991+ gpio4: gpio@43830000 {
992992 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
993993 reg = <0x43830000 0x1000>;
994994 gpio-controller;
@@ -1003,7 +1003,7 @@ · 8 unmodified lines
10031003 gpio-ranges = <&iomuxc 0 38 28>, <&iomuxc 28 36 2>;
10041004 };
10051005
1006− gpio1: gpio@47400080 {
1006+ gpio1: gpio@47400000 {
10071007 compatible = "fsl,imx93-gpio", "fsl,imx8ulp-gpio";
10081008 reg = <0x47400000 0x1000>;
10091009 gpio-controller;
arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts+1−1
@@ -73,7 +73,7 @@ · 72 unmodified lines
7373 };
7474 };
7575
76− memory {
76+ memory@40000000 {
7777 reg = <0 0x40000000 0 0x40000000>;
7878 };
7979
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts+1−1
@@ -55,7 +55,7 @@ · 54 unmodified lines
5555 };
5656 };
5757
58− memory {
58+ memory@40000000 {
5959 reg = <0 0x40000000 0 0x20000000>;
6060 };
6161
arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts+7−5
@@ -126,6 +126,7 @@ · 125 unmodified lines
126126 compatible = "sff,sfp";
127127 i2c-bus = <&i2c_sfp1>;
128128 los-gpios = <&pio 46 GPIO_ACTIVE_HIGH>;
129+ maximum-power-milliwatt = <3000>;
129130 mod-def0-gpios = <&pio 49 GPIO_ACTIVE_LOW>;
130131 tx-disable-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
131132 tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
@@ -137,6 +138,7 @@ · 5 unmodified lines
137138 i2c-bus = <&i2c_sfp2>;
138139 los-gpios = <&pio 31 GPIO_ACTIVE_HIGH>;
139140 mod-def0-gpios = <&pio 47 GPIO_ACTIVE_LOW>;
141+ maximum-power-milliwatt = <3000>;
140142 tx-disable-gpios = <&pio 15 GPIO_ACTIVE_HIGH>;
141143 tx-fault-gpios = <&pio 48 GPIO_ACTIVE_HIGH>;
142144 };
@@ -150,16 +152,16 @@ · 7 unmodified lines
150152 trip = <&cpu_trip_active_high>;
151153 };
152154
153− cpu-active-low {
155+ cpu-active-med {
154156 /* active: set fan to cooling level 1 */
155157 cooling-device = <&fan 1 1>;
156− trip = <&cpu_trip_active_low>;
158+ trip = <&cpu_trip_active_med>;
157159 };
158160
159− cpu-passive {
160− /* passive: set fan to cooling level 0 */
161+ cpu-active-low {
162+ /* active: set fan to cooling level 0 */
161163 cooling-device = <&fan 0 0>;
162− trip = <&cpu_trip_passive>;
164+ trip = <&cpu_trip_active_low>;
163165 };
164166 };
165167 };
arch/arm64/boot/dts/mediatek/mt7986a.dtsi+20−4
@@ -374,6 +374,10 @@ · 373 unmodified lines
374374 reg = <0 0x11230000 0 0x1000>,
375375 <0 0x11c20000 0 0x1000>;
376376 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
377+ assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
378+ <&topckgen CLK_TOP_EMMC_250M_SEL>;
379+ assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>,
380+ <&topckgen CLK_TOP_NET1PLL_D5_D2>;
377381 clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
378382 <&infracfg CLK_INFRA_MSDC_HCK_CK>,
379383 <&infracfg CLK_INFRA_MSDC_CK>,
@@ -610,22 +614,34 @@ · 230 unmodified lines
610614 thermal-sensors = <&thermal 0>;
611615
612616 trips {
617+ cpu_trip_crit: crit {
618+ temperature = <125000>;
619+ hysteresis = <2000>;
620+ type = "critical";
621+ };
622+
623+ cpu_trip_hot: hot {
624+ temperature = <120000>;
625+ hysteresis = <2000>;
626+ type = "hot";
627+ };
628+
613629 cpu_trip_active_high: active-high {
614630 temperature = <115000>;
615631 hysteresis = <2000>;
616632 type = "active";
617633 };
618634
619− cpu_trip_active_low: active-low {
635+ cpu_trip_active_med: active-med {
620636 temperature = <85000>;
621637 hysteresis = <2000>;
622638 type = "active";
623639 };
624640
625− cpu_trip_passive: passive {
626− temperature = <40000>;
641+ cpu_trip_active_low: active-low {
642+ temperature = <60000>;
627643 hysteresis = <2000>;
628− type = "passive";
644+ type = "active";
629645 };
630646 };
631647 };
arch/arm64/boot/dts/mediatek/mt8173-evb.dts+2−2
@@ -44,7 +44,7 @@ · 43 unmodified lines
4444 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
4545 };
4646
47− usb_p1_vbus: regulator@0 {
47+ usb_p1_vbus: regulator-usb-p1 {
4848 compatible = "regulator-fixed";
4949 regulator-name = "usb_vbus";
5050 regulator-min-microvolt = <5000000>;
@@ -53,7 +53,7 @@ · 2 unmodified lines
5353 enable-active-high;
5454 };
5555
56− usb_p0_vbus: regulator@1 {
56+ usb_p0_vbus: regulator-usb-p0 {
5757 compatible = "regulator-fixed";
5858 regulator-name = "vbus";
5959 regulator-min-microvolt = <5000000>;
arch/arm64/boot/dts/mediatek/mt8183-evb.dts+2−2
@@ -31,14 +31,14 @@ · 30 unmodified lines
3131 #address-cells = <2>;
3232 #size-cells = <2>;
3333 ranges;
34− scp_mem_reserved: scp_mem_region {
34+ scp_mem_reserved: memory@50000000 {
3535 compatible = "shared-dma-pool";
3636 reg = <0 0x50000000 0 0x2900000>;
3737 no-map;
3838 };
3939 };
4040
41− ntc@0 {
41+ thermal-sensor {
4242 compatible = "murata,ncp03wf104";
4343 pullup-uv = <1800000>;
4444 pullup-ohm = <390000>;
arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi.dtsi+5−3
@@ -91,6 +91,8 @@ · 90 unmodified lines
9191
9292 &dsi0 {
9393 status = "okay";
94+ /delete-property/#size-cells;
95+ /delete-property/#address-cells;
9496 /delete-node/panel@0;
9597 ports {
9698 port {
@@ -441,20 +443,20 @@ · 344 unmodified lines
441443 };
442444
443445 touchscreen_pins: touchscreen-pins {
444− touch_int_odl {
446+ touch-int-odl {
445447 pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
446448 input-enable;
447449 bias-pull-up;
448450 };
449451
450− touch_rst_l {
452+ touch-rst-l {
451453 pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
452454 output-high;
453455 };
454456 };
455457
456458 trackpad_pins: trackpad-pins {
457− trackpad_int {
459+ trackpad-int {
458460 pinmux = <PINMUX_GPIO7__FUNC_GPIO7>;
459461 input-enable;
460462 bias-disable; /* pulled externally */
arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi+48−48
@@ -116,7 +116,7 @@ · 115 unmodified lines
116116 #size-cells = <2>;
117117 ranges;
118118
119− scp_mem_reserved: scp_mem_region {
119+ scp_mem_reserved: memory@50000000 {
120120 compatible = "shared-dma-pool";
121121 reg = <0 0x50000000 0 0x2900000>;
122122 no-map;
@@ -460,7 +460,7 @@ · 337 unmodified lines
460460
461461 &pio {
462462 aud_pins_default: audiopins {
463− pins_bus {
463+ pins-bus {
464464 pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>,
465465 <PINMUX_GPIO98__FUNC_I2S2_BCK>,
466466 <PINMUX_GPIO101__FUNC_I2S2_LRCK>,
@@ -482,7 +482,7 @@ · 15 unmodified lines
482482 };
483483
484484 aud_pins_tdm_out_on: audiotdmouton {
485− pins_bus {
485+ pins-bus {
486486 pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>,
487487 <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>,
488488 <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>,
@@ -494,7 +494,7 @@ · 5 unmodified lines
494494 };
495495
496496 aud_pins_tdm_out_off: audiotdmoutoff {
497− pins_bus {
497+ pins-bus {
498498 pinmux = <PINMUX_GPIO169__FUNC_GPIO169>,
499499 <PINMUX_GPIO170__FUNC_GPIO170>,
500500 <PINMUX_GPIO171__FUNC_GPIO171>,
@@ -508,13 +508,13 @@ · 7 unmodified lines
508508 };
509509
510510 bt_pins: bt-pins {
511− pins_bt_en {
511+ pins-bt-en {
512512 pinmux = <PINMUX_GPIO120__FUNC_GPIO120>;
513513 output-low;
514514 };
515515 };
516516
517− ec_ap_int_odl: ec_ap_int_odl {
517+ ec_ap_int_odl: ec-ap-int-odl {
518518 pins1 {
519519 pinmux = <PINMUX_GPIO151__FUNC_GPIO151>;
520520 input-enable;
@@ -522,7 +522,7 @@ · 1 unmodified line
522522 };
523523 };
524524
525− h1_int_od_l: h1_int_od_l {
525+ h1_int_od_l: h1-int-od-l {
526526 pins1 {
527527 pinmux = <PINMUX_GPIO153__FUNC_GPIO153>;
528528 input-enable;
@@ -530,7 +530,7 @@ · 1 unmodified line
530530 };
531531
532532 i2c0_pins: i2c0 {
533− pins_bus {
533+ pins-bus {
534534 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
535535 <PINMUX_GPIO83__FUNC_SCL0>;
536536 mediatek,pull-up-adv = <3>;
@@ -539,7 +539,7 @@ · 2 unmodified lines
539539 };
540540
541541 i2c1_pins: i2c1 {
542− pins_bus {
542+ pins-bus {
543543 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
544544 <PINMUX_GPIO84__FUNC_SCL1>;
545545 mediatek,pull-up-adv = <3>;
@@ -548,7 +548,7 @@ · 2 unmodified lines
548548 };
549549
550550 i2c2_pins: i2c2 {
551− pins_bus {
551+ pins-bus {
552552 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
553553 <PINMUX_GPIO104__FUNC_SDA2>;
554554 bias-disable;
@@ -557,7 +557,7 @@ · 2 unmodified lines
557557 };
558558
559559 i2c3_pins: i2c3 {
560− pins_bus {
560+ pins-bus {
561561 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
562562 <PINMUX_GPIO51__FUNC_SDA3>;
563563 mediatek,pull-up-adv = <3>;
@@ -566,7 +566,7 @@ · 2 unmodified lines
566566 };
567567
568568 i2c4_pins: i2c4 {
569− pins_bus {
569+ pins-bus {
570570 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
571571 <PINMUX_GPIO106__FUNC_SDA4>;
572572 bias-disable;
@@ -575,7 +575,7 @@ · 2 unmodified lines
575575 };
576576
577577 i2c5_pins: i2c5 {
578− pins_bus {
578+ pins-bus {
579579 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
580580 <PINMUX_GPIO49__FUNC_SDA5>;
581581 mediatek,pull-up-adv = <3>;
@@ -584,7 +584,7 @@ · 2 unmodified lines
584584 };
585585
586586 i2c6_pins: i2c6 {
587− pins_bus {
587+ pins-bus {
588588 pinmux = <PINMUX_GPIO11__FUNC_SCL6>,
589589 <PINMUX_GPIO12__FUNC_SDA6>;
590590 bias-disable;
@@ -592,7 +592,7 @@ · 1 unmodified line
592592 };
593593
594594 mmc0_pins_default: mmc0-pins-default {
595− pins_cmd_dat {
595+ pins-cmd-dat {
596596 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
597597 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
598598 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
@@ -607,13 +607,13 @@ · 8 unmodified lines
607607 mediatek,pull-up-adv = <01>;
608608 };
609609
610− pins_clk {
610+ pins-clk {
611611 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
612612 drive-strength = <MTK_DRIVE_14mA>;
613613 mediatek,pull-down-adv = <10>;
614614 };
615615
616− pins_rst {
616+ pins-rst {
617617 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
618618 drive-strength = <MTK_DRIVE_14mA>;
619619 mediatek,pull-down-adv = <01>;
@@ -621,7 +621,7 @@ · 1 unmodified line
621621 };
622622
623623 mmc0_pins_uhs: mmc0-pins-uhs {
624− pins_cmd_dat {
624+ pins-cmd-dat {
625625 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
626626 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
627627 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
@@ -636,19 +636,19 @@ · 8 unmodified lines
636636 mediatek,pull-up-adv = <01>;
637637 };
638638
639− pins_clk {
639+ pins-clk {
640640 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
641641 drive-strength = <MTK_DRIVE_14mA>;
642642 mediatek,pull-down-adv = <10>;
643643 };
644644
645− pins_ds {
645+ pins-ds {
646646 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
647647 drive-strength = <MTK_DRIVE_14mA>;
648648 mediatek,pull-down-adv = <10>;
649649 };
650650
651− pins_rst {
651+ pins-rst {
652652 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
653653 drive-strength = <MTK_DRIVE_14mA>;
654654 mediatek,pull-up-adv = <01>;
@@ -656,7 +656,7 @@ · 1 unmodified line
656656 };
657657
658658 mmc1_pins_default: mmc1-pins-default {
659− pins_cmd_dat {
659+ pins-cmd-dat {
660660 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
661661 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
662662 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
@@ -666,7 +666,7 @@ · 3 unmodified lines
666666 mediatek,pull-up-adv = <10>;
667667 };
668668
669− pins_clk {
669+ pins-clk {
670670 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
671671 input-enable;
672672 mediatek,pull-down-adv = <10>;
@@ -674,7 +674,7 @@ · 1 unmodified line
674674 };
675675
676676 mmc1_pins_uhs: mmc1-pins-uhs {
677− pins_cmd_dat {
677+ pins-cmd-dat {
678678 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
679679 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
680680 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
@@ -685,7 +685,7 @@ · 4 unmodified lines
685685 mediatek,pull-up-adv = <10>;
686686 };
687687
688− pins_clk {
688+ pins-clk {
689689 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
690690 drive-strength = <MTK_DRIVE_8mA>;
691691 mediatek,pull-down-adv = <10>;
@@ -693,15 +693,15 @@ · 1 unmodified line
693693 };
694694 };
695695
696− panel_pins_default: panel_pins_default {
697− panel_reset {
696+ panel_pins_default: panel-pins-default {
697+ panel-reset {
698698 pinmux = <PINMUX_GPIO45__FUNC_GPIO45>;
699699 output-low;
700700 bias-pull-up;
701701 };
702702 };
703703
704− pwm0_pin_default: pwm0_pin_default {
704+ pwm0_pin_default: pwm0-pin-default {
705705 pins1 {
706706 pinmux = <PINMUX_GPIO176__FUNC_GPIO176>;
707707 output-high;
@@ -713,14 +713,14 @@ · 5 unmodified lines
713713 };
714714
715715 scp_pins: scp {
716− pins_scp_uart {
716+ pins-scp-uart {
717717 pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>,
718718 <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>;
719719 };
720720 };
721721
722722 spi0_pins: spi0 {
723− pins_spi {
723+ pins-spi {
724724 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
725725 <PINMUX_GPIO86__FUNC_GPIO86>,
726726 <PINMUX_GPIO87__FUNC_SPI0_MO>,
@@ -730,7 +730,7 @@ · 3 unmodified lines
730730 };
731731
732732 spi1_pins: spi1 {
733− pins_spi {
733+ pins-spi {
734734 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
735735 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
736736 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
@@ -740,20 +740,20 @@ · 3 unmodified lines
740740 };
741741
742742 spi2_pins: spi2 {
743− pins_spi {
743+ pins-spi {
744744 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
745745 <PINMUX_GPIO1__FUNC_SPI2_MO>,
746746 <PINMUX_GPIO2__FUNC_SPI2_CLK>;
747747 bias-disable;
748748 };
749− pins_spi_mi {
749+ pins-spi-mi {
750750 pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>;
751751 mediatek,pull-down-adv = <00>;
752752 };
753753 };
754754
755755 spi3_pins: spi3 {
756− pins_spi {
756+ pins-spi {
757757 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
758758 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
759759 <PINMUX_GPIO23__FUNC_SPI3_MO>,
@@ -763,7 +763,7 @@ · 3 unmodified lines
763763 };
764764
765765 spi4_pins: spi4 {
766− pins_spi {
766+ pins-spi {
767767 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
768768 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
769769 <PINMUX_GPIO19__FUNC_SPI4_MO>,
@@ -773,7 +773,7 @@ · 3 unmodified lines
773773 };
774774
775775 spi5_pins: spi5 {
776− pins_spi {
776+ pins-spi {
777777 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
778778 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
779779 <PINMUX_GPIO15__FUNC_SPI5_MO>,
@@ -783,63 +783,63 @@ · 3 unmodified lines
783783 };
784784
785785 uart0_pins_default: uart0-pins-default {
786− pins_rx {
786+ pins-rx {
787787 pinmux = <PINMUX_GPIO95__FUNC_URXD0>;
788788 input-enable;
789789 bias-pull-up;
790790 };
791− pins_tx {
791+ pins-tx {
792792 pinmux = <PINMUX_GPIO96__FUNC_UTXD0>;
793793 };
794794 };
795795
796796 uart1_pins_default: uart1-pins-default {
797− pins_rx {
797+ pins-rx {
798798 pinmux = <PINMUX_GPIO121__FUNC_URXD1>;
799799 input-enable;
800800 bias-pull-up;
801801 };
802− pins_tx {
802+ pins-tx {
803803 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
804804 };
805− pins_rts {
805+ pins-rts {
806806 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
807807 output-enable;
808808 };
809− pins_cts {
809+ pins-cts {
810810 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
811811 input-enable;
812812 };
813813 };
814814
815815 uart1_pins_sleep: uart1-pins-sleep {
816− pins_rx {
816+ pins-rx {
817817 pinmux = <PINMUX_GPIO121__FUNC_GPIO121>;
818818 input-enable;
819819 bias-pull-up;
820820 };
821− pins_tx {
821+ pins-tx {
822822 pinmux = <PINMUX_GPIO115__FUNC_UTXD1>;
823823 };
824− pins_rts {
824+ pins-rts {
825825 pinmux = <PINMUX_GPIO47__FUNC_URTS1>;
826826 output-enable;
827827 };
828− pins_cts {
828+ pins-cts {
829829 pinmux = <PINMUX_GPIO46__FUNC_UCTS1>;
830830 input-enable;
831831 };
832832 };
833833
834834 wifi_pins_pwrseq: wifi-pins-pwrseq {
835− pins_wifi_enable {
835+ pins-wifi-enable {
836836 pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
837837 output-low;
838838 };
839839 };
840840
841841 wifi_pins_wakeup: wifi-pins-wakeup {
842− pins_wifi_wakeup {
842+ pins-wifi-wakeup {
843843 pinmux = <PINMUX_GPIO113__FUNC_GPIO113>;
844844 input-enable;
845845 };
arch/arm64/boot/dts/mediatek/mt8183.dtsi+121−121
@@ -1210,127 +1210,6 @@ · 1209 unmodified lines
12101210 nvmem-cell-names = "calibration-data";
12111211 };
12121212
1213− thermal_zones: thermal-zones {
1214− cpu_thermal: cpu-thermal {
1215− polling-delay-passive = <100>;
1216− polling-delay = <500>;
1217− thermal-sensors = <&thermal 0>;
1218− sustainable-power = <5000>;
1219−
1220− trips {
1221− threshold: trip-point0 {
1222− temperature = <68000>;
1223− hysteresis = <2000>;
1224− type = "passive";
1225− };
1226−
1227− target: trip-point1 {
1228− temperature = <80000>;
1229− hysteresis = <2000>;
1230− type = "passive";
1231− };
1232−
1233− cpu_crit: cpu-crit {
1234− temperature = <115000>;
1235− hysteresis = <2000>;
1236− type = "critical";
1237− };
1238− };
1239−
1240− cooling-maps {
1241− map0 {
1242− trip = <&target>;
1243− cooling-device = <&cpu0
1244− THERMAL_NO_LIMIT
1245− THERMAL_NO_LIMIT>,
1246− <&cpu1
1247− THERMAL_NO_LIMIT
1248− THERMAL_NO_LIMIT>,
1249− <&cpu2
1250− THERMAL_NO_LIMIT
1251− THERMAL_NO_LIMIT>,
1252− <&cpu3
1253− THERMAL_NO_LIMIT
1254− THERMAL_NO_LIMIT>;
1255− contribution = <3072>;
1256− };
1257− map1 {
1258− trip = <&target>;
1259− cooling-device = <&cpu4
1260− THERMAL_NO_LIMIT
1261− THERMAL_NO_LIMIT>,
1262− <&cpu5
1263− THERMAL_NO_LIMIT
1264− THERMAL_NO_LIMIT>,
1265− <&cpu6
1266− THERMAL_NO_LIMIT
1267− THERMAL_NO_LIMIT>,
1268− <&cpu7
1269− THERMAL_NO_LIMIT
1270− THERMAL_NO_LIMIT>;
1271− contribution = <1024>;
1272− };
1273− };
1274− };
1275−
1276− /* The tzts1 ~ tzts6 don't need to polling */
1277− /* The tzts1 ~ tzts6 don't need to thermal throttle */
1278−
1279− tzts1: tzts1 {
1280− polling-delay-passive = <0>;
1281− polling-delay = <0>;
1282− thermal-sensors = <&thermal 1>;
1283− sustainable-power = <5000>;
1284− trips {};
1285− cooling-maps {};
1286− };
1287−
1288− tzts2: tzts2 {
1289− polling-delay-passive = <0>;
1290− polling-delay = <0>;
1291− thermal-sensors = <&thermal 2>;
1292− sustainable-power = <5000>;
1293− trips {};
1294− cooling-maps {};
1295− };
1296−
1297− tzts3: tzts3 {
1298− polling-delay-passive = <0>;
1299− polling-delay = <0>;
1300− thermal-sensors = <&thermal 3>;
1301− sustainable-power = <5000>;
1302− trips {};
1303− cooling-maps {};
1304− };
1305−
1306− tzts4: tzts4 {
1307− polling-delay-passive = <0>;
1308− polling-delay = <0>;
1309− thermal-sensors = <&thermal 4>;
1310− sustainable-power = <5000>;
1311− trips {};
1312− cooling-maps {};
1313− };
1314−
1315− tzts5: tzts5 {
1316− polling-delay-passive = <0>;
1317− polling-delay = <0>;
1318− thermal-sensors = <&thermal 5>;
1319− sustainable-power = <5000>;
1320− trips {};
1321− cooling-maps {};
1322− };
1323−
1324− tztsABB: tztsABB {
1325− polling-delay-passive = <0>;
1326− polling-delay = <0>;
1327− thermal-sensors = <&thermal 6>;
1328− sustainable-power = <5000>;
1329− trips {};
1330− cooling-maps {};
1331− };
1332− };
1333−
13341213 pwm0: pwm@1100e000 {
13351214 compatible = "mediatek,mt8183-disp-pwm";
13361215 reg = <0 0x1100e000 0 0x1000>;
@@ -2105,4 +1984,125 @@ · 768 unmodified lines
21051984 power-domains = <&spm MT8183_POWER_DOMAIN_CAM>;
21061985 };
21071986 };
1987+
1988+ thermal_zones: thermal-zones {
1989+ cpu_thermal: cpu-thermal {
1990+ polling-delay-passive = <100>;
1991+ polling-delay = <500>;
1992+ thermal-sensors = <&thermal 0>;
1993+ sustainable-power = <5000>;
1994+
1995+ trips {
1996+ threshold: trip-point0 {
1997+ temperature = <68000>;
1998+ hysteresis = <2000>;
1999+ type = "passive";
2000+ };
2001+
2002+ target: trip-point1 {
2003+ temperature = <80000>;
2004+ hysteresis = <2000>;
2005+ type = "passive";
2006+ };
2007+
2008+ cpu_crit: cpu-crit {
2009+ temperature = <115000>;
2010+ hysteresis = <2000>;
2011+ type = "critical";
2012+ };
2013+ };
2014+
2015+ cooling-maps {
2016+ map0 {
2017+ trip = <&target>;
2018+ cooling-device = <&cpu0
2019+ THERMAL_NO_LIMIT
2020+ THERMAL_NO_LIMIT>,
2021+ <&cpu1
2022+ THERMAL_NO_LIMIT
2023+ THERMAL_NO_LIMIT>,
2024+ <&cpu2
2025+ THERMAL_NO_LIMIT
2026+ THERMAL_NO_LIMIT>,
2027+ <&cpu3
2028+ THERMAL_NO_LIMIT
2029+ THERMAL_NO_LIMIT>;
2030+ contribution = <3072>;
2031+ };
2032+ map1 {
2033+ trip = <&target>;
2034+ cooling-device = <&cpu4
2035+ THERMAL_NO_LIMIT
2036+ THERMAL_NO_LIMIT>,
2037+ <&cpu5
2038+ THERMAL_NO_LIMIT
2039+ THERMAL_NO_LIMIT>,
2040+ <&cpu6
2041+ THERMAL_NO_LIMIT
2042+ THERMAL_NO_LIMIT>,
2043+ <&cpu7
2044+ THERMAL_NO_LIMIT
2045+ THERMAL_NO_LIMIT>;
2046+ contribution = <1024>;
2047+ };
2048+ };
2049+ };
2050+
2051+ /* The tzts1 ~ tzts6 don't need to polling */
2052+ /* The tzts1 ~ tzts6 don't need to thermal throttle */
2053+
2054+ tzts1: tzts1 {
2055+ polling-delay-passive = <0>;
2056+ polling-delay = <0>;
2057+ thermal-sensors = <&thermal 1>;
2058+ sustainable-power = <5000>;
2059+ trips {};
2060+ cooling-maps {};
2061+ };
2062+
2063+ tzts2: tzts2 {
2064+ polling-delay-passive = <0>;
2065+ polling-delay = <0>;
2066+ thermal-sensors = <&thermal 2>;
2067+ sustainable-power = <5000>;
2068+ trips {};
2069+ cooling-maps {};
2070+ };
2071+
2072+ tzts3: tzts3 {
2073+ polling-delay-passive = <0>;
2074+ polling-delay = <0>;
2075+ thermal-sensors = <&thermal 3>;
2076+ sustainable-power = <5000>;
2077+ trips {};
2078+ cooling-maps {};
2079+ };
2080+
2081+ tzts4: tzts4 {
2082+ polling-delay-passive = <0>;
2083+ polling-delay = <0>;
2084+ thermal-sensors = <&thermal 4>;
2085+ sustainable-power = <5000>;
2086+ trips {};
2087+ cooling-maps {};
2088+ };
2089+
2090+ tzts5: tzts5 {
2091+ polling-delay-passive = <0>;
2092+ polling-delay = <0>;
2093+ thermal-sensors = <&thermal 5>;
2094+ sustainable-power = <5000>;
2095+ trips {};
2096+ cooling-maps {};
2097+ };
2098+
2099+ tztsABB: tztsABB {
2100+ polling-delay-passive = <0>;
2101+ polling-delay = <0>;
2102+ thermal-sensors = <&thermal 6>;
2103+ sustainable-power = <5000>;
2104+ trips {};
2105+ cooling-maps {};
2106+ };
2107+ };
21082108 };
arch/arm64/boot/dts/mediatek/mt8186.dtsi+28−16
@@ -924,7 +924,8 @@ · 923 unmodified lines
924924 reg = <MT8186_POWER_DOMAIN_CSIRX_TOP>;
925925 clocks = <&topckgen CLK_TOP_SENINF>,
926926 <&topckgen CLK_TOP_SENINF1>;
927− clock-names = "csirx_top0", "csirx_top1";
927+ clock-names = "subsys-csirx-top0",
928+ "subsys-csirx-top1";
928929 #power-domain-cells = <0>;
929930 };
930931
@@ -942,7 +943,8 @@ · 11 unmodified lines
942943 reg = <MT8186_POWER_DOMAIN_ADSP_AO>;
943944 clocks = <&topckgen CLK_TOP_AUDIODSP>,
944945 <&topckgen CLK_TOP_ADSP_BUS>;
945− clock-names = "audioadsp", "adsp_bus";
946+ clock-names = "audioadsp",
947+ "subsys-adsp-bus";
946948 #address-cells = <1>;
947949 #size-cells = <0>;
948950 #power-domain-cells = <1>;
@@ -975,8 +977,11 @@ · 26 unmodified lines
975977 <&mmsys CLK_MM_SMI_COMMON>,
976978 <&mmsys CLK_MM_SMI_GALS>,
977979 <&mmsys CLK_MM_SMI_IOMMU>;
978− clock-names = "disp", "mdp", "smi_infra", "smi_common",
979− "smi_gals", "smi_iommu";
980+ clock-names = "disp", "mdp",
981+ "subsys-smi-infra",
982+ "subsys-smi-common",
983+ "subsys-smi-gals",
984+ "subsys-smi-iommu";
980985 mediatek,infracfg = <&infracfg_ao>;
981986 #address-cells = <1>;
982987 #size-cells = <0>;
@@ -993,15 +998,17 @@ · 10 unmodified lines
993998
994999 power-domain@MT8186_POWER_DOMAIN_CAM {
9951000 reg = <MT8186_POWER_DOMAIN_CAM>;
996− clocks = <&topckgen CLK_TOP_CAM>,
997− <&topckgen CLK_TOP_SENINF>,
1001+ clocks = <&topckgen CLK_TOP_SENINF>,
9981002 <&topckgen CLK_TOP_SENINF1>,
9991003 <&topckgen CLK_TOP_SENINF2>,
10001004 <&topckgen CLK_TOP_SENINF3>,
1005+ <&camsys CLK_CAM2MM_GALS>,
10011006 <&topckgen CLK_TOP_CAMTM>,
1002− <&camsys CLK_CAM2MM_GALS>;
1003− clock-names = "cam-top", "cam0", "cam1", "cam2",
1004− "cam3", "cam-tm", "gals";
1007+ <&topckgen CLK_TOP_CAM>;
1008+ clock-names = "cam0", "cam1", "cam2",
1009+ "cam3", "gals",
1010+ "subsys-cam-tm",
1011+ "subsys-cam-top";
10051012 mediatek,infracfg = <&infracfg_ao>;
10061013 #address-cells = <1>;
10071014 #size-cells = <0>;
@@ -1020,9 +1027,9 @@ · 12 unmodified lines
10201027
10211028 power-domain@MT8186_POWER_DOMAIN_IMG {
10221029 reg = <MT8186_POWER_DOMAIN_IMG>;
1023− clocks = <&topckgen CLK_TOP_IMG1>,
1024− <&imgsys1 CLK_IMG1_GALS_IMG1>;
1025− clock-names = "img-top", "gals";
1030+ clocks = <&imgsys1 CLK_IMG1_GALS_IMG1>,
1031+ <&topckgen CLK_TOP_IMG1>;
1032+ clock-names = "gals", "subsys-img-top";
10261033 mediatek,infracfg = <&infracfg_ao>;
10271034 #address-cells = <1>;
10281035 #size-cells = <0>;
@@ -1041,8 +1048,11 @@ · 12 unmodified lines
10411048 <&ipesys CLK_IPE_LARB20>,
10421049 <&ipesys CLK_IPE_SMI_SUBCOM>,
10431050 <&ipesys CLK_IPE_GALS_IPE>;
1044− clock-names = "ipe-top", "ipe-larb0", "ipe-larb1",
1045− "ipe-smi", "ipe-gals";
1051+ clock-names = "subsys-ipe-top",
1052+ "subsys-ipe-larb0",
1053+ "subsys-ipe-larb1",
1054+ "subsys-ipe-smi",
1055+ "subsys-ipe-gals";
10461056 mediatek,infracfg = <&infracfg_ao>;
10471057 #power-domain-cells = <0>;
10481058 };
@@ -1061,7 +1071,9 @@ · 12 unmodified lines
10611071 clocks = <&topckgen CLK_TOP_WPE>,
10621072 <&wpesys CLK_WPE_SMI_LARB8_CK_EN>,
10631073 <&wpesys CLK_WPE_SMI_LARB8_PCLK_EN>;
1064− clock-names = "wpe0", "larb-ck", "larb-pclk";
1074+ clock-names = "wpe0",
1075+ "subsys-larb-ck",
1076+ "subsys-larb-pclk";
10651077 mediatek,infracfg = <&infracfg_ao>;
10661078 #power-domain-cells = <0>;
10671079 };
@@ -1656,7 +1668,7 @@ · 588 unmodified lines
16561668 #address-cells = <1>;
16571669 #size-cells = <1>;
16581670
1659− gpu_speedbin: gpu-speed-bin@59c {
1671+ gpu_speedbin: gpu-speedbin@59c {
16601672 reg = <0x59c 0x4>;
16611673 bits = <0 3>;
16621674 };
arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi+1−1
@@ -389,7 +389,7 @@ · 388 unmodified lines
389389 pinctrl-0 = <&i2c7_pins>;
390390
391391 pmic@34 {
392− #interrupt-cells = <1>;
392+ #interrupt-cells = <2>;
393393 compatible = "mediatek,mt6360";
394394 reg = <0x34>;
395395 interrupt-controller;
arch/arm64/boot/dts/mediatek/mt8195.dtsi+5−1
@@ -627,6 +627,8 @@ · 626 unmodified lines
627627
628628 power-domain@MT8195_POWER_DOMAIN_VENC_CORE1 {
629629 reg = <MT8195_POWER_DOMAIN_VENC_CORE1>;
630+ clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>;
631+ clock-names = "venc1-larb";
630632 mediatek,infracfg = <&infracfg_ao>;
631633 #power-domain-cells = <0>;
632634 };
@@ -689,6 +691,8 @@ · 56 unmodified lines
689691
690692 power-domain@MT8195_POWER_DOMAIN_VENC {
691693 reg = <MT8195_POWER_DOMAIN_VENC>;
694+ clocks = <&vencsys CLK_VENC_LARB>;
695+ clock-names = "venc0-larb";
692696 mediatek,infracfg = <&infracfg_ao>;
693697 #power-domain-cells = <0>;
694698 };
@@ -2665,7 +2669,7 @@ · 1970 unmodified lines
26652669 reg = <0 0x1b010000 0 0x1000>;
26662670 mediatek,larb-id = <20>;
26672671 mediatek,smi = <&smi_common_vpp>;
2668− clocks = <&vencsys_core1 CLK_VENC_CORE1_LARB>,
2672+ clocks = <&vencsys_core1 CLK_VENC_CORE1_VENC>,
26692673 <&vencsys_core1 CLK_VENC_CORE1_GALS>,
26702674 <&vppsys0 CLK_VPP0_GALS_VDO0_VDO1_VENCSYS_CORE1>;
26712675 clock-names = "apb", "smi", "gals";
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts+1−1
@@ -86,7 +86,7 @@ · 85 unmodified lines
8686 sgtl5000_clk: sgtl5000-oscillator {
8787 compatible = "fixed-clock";
8888 #clock-cells = <0>;
89− clock-frequency = <24576000>;
89+ clock-frequency = <24576000>;
9090 };
9191
9292 dc_12v: dc-12v-regulator {
arch/arm64/boot/dts/rockchip/rk3328.dtsi+1−1
@@ -668,7 +668,7 @@ · 667 unmodified lines
668668
669669 vdec: video-codec@ff360000 {
670670 compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec";
671− reg = <0x0 0xff360000 0x0 0x400>;
671+ reg = <0x0 0xff360000 0x0 0x480>;
672672 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
673673 clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
674674 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi+1−2
@@ -509,8 +509,7 @@ ap_i2c_tp: &i2c5 { · 508 unmodified lines
509509 &pci_rootport {
510510 mvl_wifi: wifi@0,0 {
511511 compatible = "pci1b4b,2b42";
512− reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
513− 0x83010000 0x0 0x00100000 0x0 0x00100000>;
512+ reg = <0x0000 0x0 0x0 0x0 0x0>;
514513 interrupt-parent = <&gpio0>;
515514 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
516515 pinctrl-names = "default";
arch/arm64/boot/dts/rockchip/rk3399-gru-scarlet-dumo.dts+2−2
@@ -34,8 +34,8 @@ · 33 unmodified lines
3434 &pci_rootport {
3535 wifi@0,0 {
3636 compatible = "qcom,ath10k";
37− reg = <0x00010000 0x0 0x00000000 0x0 0x00000000>,
38− <0x03010010 0x0 0x00000000 0x0 0x00200000>;
37+ reg = <0x00000000 0x0 0x00000000 0x0 0x00000000>,
38+ <0x03000010 0x0 0x00000000 0x0 0x00200000>;
3939 qcom,ath10k-calibration-variant = "GO_DUMO";
4040 };
4141 };
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi+1−0
@@ -489,6 +489,7 @@ ap_i2c_audio: &i2c8 { · 488 unmodified lines
489489 #address-cells = <3>;
490490 #size-cells = <2>;
491491 ranges;
492+ device_type = "pci";
492493 };
493494 };
494495
arch/arm64/boot/dts/rockchip/rk3399.dtsi+4−2
@@ -1109,7 +1109,9 @@ · 1108 unmodified lines
11091109 power-domain@RK3399_PD_VDU {
11101110 reg = <RK3399_PD_VDU>;
11111111 clocks = <&cru ACLK_VDU>,
1112− <&cru HCLK_VDU>;
1112+ <&cru HCLK_VDU>,
1113+ <&cru SCLK_VDU_CA>,
1114+ <&cru SCLK_VDU_CORE>;
11131115 pm_qos = <&qos_video_m1_r>,
11141116 <&qos_video_m1_w>;
11151117 #power-domain-cells = <0>;
@@ -1384,7 +1386,7 @@ · 268 unmodified lines
13841386
13851387 vdec: video-codec@ff660000 {
13861388 compatible = "rockchip,rk3399-vdec";
1387− reg = <0x0 0xff660000 0x0 0x400>;
1389+ reg = <0x0 0xff660000 0x0 0x480>;
13881390 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
13891391 clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
13901392 <&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;
arch/arm64/boot/dts/rockchip/rk356x.dtsi+1−1
@@ -977,7 +977,7 @@ · 976 unmodified lines
977977 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
978978 <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
979979 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
980− interrupt-names = "sys", "pmc", "msi", "legacy", "err";
980+ interrupt-names = "sys", "pmc", "msg", "legacy", "err";
981981 bus-range = <0x0 0xf>;
982982 clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
983983 <&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi+2−2
@@ -235,13 +235,13 @@ · 234 unmodified lines
235235 &pinctrl {
236236 fan {
237237 fan_int: fan-int {
238− rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
238+ rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
239239 };
240240 };
241241
242242 hym8563 {
243243 hym8563_int: hym8563-int {
244− rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
244+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
245245 };
246246 };
247247
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dts+1−1
@@ -38,7 +38,7 @@ · 37 unmodified lines
3838 leds {
3939 compatible = "gpio-leds";
4040 pinctrl-names = "default";
41− pinctrl-0 =<&leds_gpio>;
41+ pinctrl-0 = <&leds_gpio>;
4242
4343 led-1 {
4444 gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
arch/arm64/boot/dts/rockchip/rk3588s-pinctrl.dtsi+1−1
@@ -369,7 +369,7 @@ · 368 unmodified lines
369369 emmc_data_strobe: emmc-data-strobe {
370370 rockchip,pins =
371371 /* emmc_data_strobe */
372− <2 RK_PA2 1 &pcfg_pull_none>;
372+ <2 RK_PA2 1 &pcfg_pull_down>;
373373 };
374374 };
375375
arch/arm64/boot/dts/rockchip/rk3588s.dtsi+0−1
@@ -1362,7 +1362,6 @@ · 1361 unmodified lines
13621362 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
13631363 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
13641364 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
1365− interrupt-names = "ch0", "ch1", "ch2", "ch3";
13661365 rockchip,pmu = <&pmu1grf>;
13671366 };
13681367
arch/arm64/include/asm/setup.h+15−2
@@ -21,9 +21,22 @@ static inline bool arch_parse_debug_rodata(char *arg) · 20 unmodified lines
2121 extern bool rodata_enabled;
2222 extern bool rodata_full;
2323
24− if (arg && !strcmp(arg, "full")) {
24+ if (!arg)
25+ return false;
26+
27+ if (!strcmp(arg, "full")) {
28+ rodata_enabled = rodata_full = true;
29+ return true;
30+ }
31+
32+ if (!strcmp(arg, "off")) {
33+ rodata_enabled = rodata_full = false;
34+ return true;
35+ }
36+
37+ if (!strcmp(arg, "on")) {
2538 rodata_enabled = true;
26− rodata_full = true;
39+ rodata_full = false;
2740 return true;
2841 }
2942
arch/arm64/kernel/cpufeature.c+4−0
@@ -1839,6 +1839,10 @@ static int __init __kpti_install_ng_mappings(void *__unused) · 1838 unmodified lines
18391839
18401840 static void __init kpti_install_ng_mappings(void)
18411841 {
1842+ /* Check whether KPTI is going to be used */
1843+ if (!cpus_have_cap(ARM64_UNMAP_KERNEL_AT_EL0))
1844+ return;
1845+
18421846 /*
18431847 * We don't need to rewrite the page-tables if either we've done
18441848 * it already or we have KASLR enabled and therefore have not
arch/arm64/kvm/vgic/vgic-v4.c+4−0
@@ -436,6 +436,10 @@ int kvm_vgic_v4_set_forwarding(struct kvm *kvm, int virq, · 435 unmodified lines
436436 if (ret)
437437 goto out;
438438
439+ /* Silently exit if the vLPI is already mapped */
440+ if (irq->hw)
441+ goto out;
442+
439443 /*
440444 * Emit the mapping request. If it fails, the ITS probably
441445 * isn't v4 compatible, so let's silently bail out. Holding
arch/arm64/mm/pageattr.c+3−4
@@ -29,8 +29,8 @@ bool can_set_direct_map(void) · 28 unmodified lines
2929 *
3030 * KFENCE pool requires page-granular mapping if initialized late.
3131 */
32− return (rodata_enabled && rodata_full) || debug_pagealloc_enabled() ||
33− arm64_kfence_can_set_direct_map();
32+ return rodata_full || debug_pagealloc_enabled() ||
33+ arm64_kfence_can_set_direct_map();
3434 }
3535
3636 static int change_page_range(pte_t *ptep, unsigned long addr, void *data)
@@ -105,8 +105,7 @@ static int change_memory_common(unsigned long addr, int numpages, · 68 unmodified lines
105105 * If we are manipulating read-only permissions, apply the same
106106 * change to the linear mapping of the pages that back this VM area.
107107 */
108− if (rodata_enabled &&
109− rodata_full && (pgprot_val(set_mask) == PTE_RDONLY ||
108+ if (rodata_full && (pgprot_val(set_mask) == PTE_RDONLY ||
110109 pgprot_val(clear_mask) == PTE_RDONLY)) {
111110 for (i = 0; i < area->nr_pages; i++) {
112111 __change_memory_common((u64)page_address(area->pages[i]),
arch/loongarch/Makefile+4−1
@@ -68,6 +68,7 @@ LDFLAGS_vmlinux += -static -n -nostdlib · 67 unmodified lines
6868 ifdef CONFIG_AS_HAS_EXPLICIT_RELOCS
6969 cflags-y += $(call cc-option,-mexplicit-relocs)
7070 KBUILD_CFLAGS_KERNEL += $(call cc-option,-mdirect-extern-access)
71+KBUILD_CFLAGS_KERNEL += $(call cc-option,-fdirect-access-external-data)
7172 KBUILD_AFLAGS_MODULE += $(call cc-option,-fno-direct-access-external-data)
7273 KBUILD_CFLAGS_MODULE += $(call cc-option,-fno-direct-access-external-data)
7374 KBUILD_AFLAGS_MODULE += $(call cc-option,-mno-relax) $(call cc-option,-Wa$(comma)-mno-relax)
@@ -82,7 +83,7 @@ endif · 8 unmodified lines
8283
8384 ifeq ($(CONFIG_RELOCATABLE),y)
8485 KBUILD_CFLAGS_KERNEL += -fPIE
85−LDFLAGS_vmlinux += -static -pie --no-dynamic-linker -z notext
86+LDFLAGS_vmlinux += -static -pie --no-dynamic-linker -z notext $(call ld-option, --apply-dynamic-relocs)
8687 endif
8788
8889 cflags-y += $(call cc-option, -mno-check-zero-division)
@@ -142,6 +143,8 @@ vdso-install-y += arch/loongarch/vdso/vdso.so.dbg · 53 unmodified lines
142143
143144 all: $(notdir $(KBUILD_IMAGE))
144145
146+vmlinuz.efi: vmlinux.efi
147+
145148 vmlinux.elf vmlinux.efi vmlinuz.efi: vmlinux
146149 $(Q)$(MAKE) $(build)=$(boot) $(bootvars-y) $(boot)/$@
147150
arch/loongarch/include/asm/asmmacro.h+1−2
@@ -609,8 +609,7 @@ · 608 unmodified lines
609609 lu32i.d \reg, 0
610610 lu52i.d \reg, \reg, 0
611611 .pushsection ".la_abs", "aw", %progbits
612− 768:
613− .dword 768b-766b
612+ .dword 766b
614613 .dword \sym
615614 .popsection
616615 #endif
arch/loongarch/include/asm/elf.h+1−1
@@ -293,7 +293,7 @@ extern const char *__elf_platform; · 292 unmodified lines
293293 #define ELF_PLAT_INIT(_r, load_addr) do { \
294294 _r->regs[1] = _r->regs[2] = _r->regs[3] = _r->regs[4] = 0; \
295295 _r->regs[5] = _r->regs[6] = _r->regs[7] = _r->regs[8] = 0; \
296− _r->regs[9] = _r->regs[10] = _r->regs[11] = _r->regs[12] = 0; \
296+ _r->regs[9] = _r->regs[10] /* syscall n */ = _r->regs[12] = 0; \
297297 _r->regs[13] = _r->regs[14] = _r->regs[15] = _r->regs[16] = 0; \
298298 _r->regs[17] = _r->regs[18] = _r->regs[19] = _r->regs[20] = 0; \
299299 _r->regs[21] = _r->regs[22] = _r->regs[23] = _r->regs[24] = 0; \
arch/loongarch/include/asm/loongarch.h+2−3
@@ -1098,12 +1098,11 @@ · 1097 unmodified lines
10981098
10991099 static __always_inline u64 drdtime(void)
11001100 {
1101− int rID = 0;
11021101 u64 val = 0;
11031102
11041103 __asm__ __volatile__(
1105− "rdtime.d %0, %1 \n\t"
1106− : "=r"(val), "=r"(rID)
1104+ "rdtime.d %0, $zero\n\t"
1105+ : "=r"(val)
11071106 :
11081107 );
11091108 return val;
arch/loongarch/include/asm/percpu.h+5−6
@@ -40,13 +40,13 @@ static __always_inline unsigned long __percpu_##op(void *ptr, \ · 39 unmodified lines
4040 switch (size) { \
4141 case 4: \
4242 __asm__ __volatile__( \
43− "am"#asm_op".w" " %[ret], %[val], %[ptr] \n" \
43+ "am"#asm_op".w" " %[ret], %[val], %[ptr] \n" \
4444 : [ret] "=&r" (ret), [ptr] "+ZB"(*(u32 *)ptr) \
4545 : [val] "r" (val)); \
4646 break; \
4747 case 8: \
4848 __asm__ __volatile__( \
49− "am"#asm_op".d" " %[ret], %[val], %[ptr] \n" \
49+ "am"#asm_op".d" " %[ret], %[val], %[ptr] \n" \
5050 : [ret] "=&r" (ret), [ptr] "+ZB"(*(u64 *)ptr) \
5151 : [val] "r" (val)); \
5252 break; \
@@ -63,7 +63,7 @@ PERCPU_OP(and, and, &) · 10 unmodified lines
6363 PERCPU_OP(or, or, |)
6464 #undef PERCPU_OP
6565
66−static __always_inline unsigned long __percpu_read(void *ptr, int size)
66+static __always_inline unsigned long __percpu_read(void __percpu *ptr, int size)
6767 {
6868 unsigned long ret;
6969
@@ -100,7 +100,7 @@ static __always_inline unsigned long __percpu_read(void *ptr, int size) · 30 unmodified lines
100100 return ret;
101101 }
102102
103−static __always_inline void __percpu_write(void *ptr, unsigned long val, int size)
103+static __always_inline void __percpu_write(void __percpu *ptr, unsigned long val, int size)
104104 {
105105 switch (size) {
106106 case 1:
@@ -132,8 +132,7 @@ static __always_inline void __percpu_write(void *ptr, unsigned long val, int siz · 25 unmodified lines
132132 }
133133 }
134134
135−static __always_inline unsigned long __percpu_xchg(void *ptr, unsigned long val,
136− int size)
135+static __always_inline unsigned long __percpu_xchg(void *ptr, unsigned long val, int size)
137136 {
138137 switch (size) {
139138 case 1:
arch/loongarch/include/asm/setup.h+1−1
@@ -25,7 +25,7 @@ extern void set_merr_handler(unsigned long offset, void *addr, unsigned long len · 24 unmodified lines
2525 #ifdef CONFIG_RELOCATABLE
2626
2727 struct rela_la_abs {
28− long offset;
28+ long pc;
2929 long symvalue;
3030 };
3131
arch/loongarch/kernel/relocate.c+9−1
@@ -52,7 +52,7 @@ static inline void __init relocate_absolute(long random_offset) · 51 unmodified lines
5252 for (p = begin; (void *)p < end; p++) {
5353 long v = p->symvalue;
5454 uint32_t lu12iw, ori, lu32id, lu52id;
55− union loongarch_instruction *insn = (void *)p - p->offset;
55+ union loongarch_instruction *insn = (void *)p->pc;
5656
5757 lu12iw = (v >> 12) & 0xfffff;
5858 ori = v & 0xfff;
@@ -102,6 +102,14 @@ static inline __init unsigned long get_random_boot(void) · 43 unmodified lines
102102 return hash;
103103 }
104104
105+static int __init nokaslr(char *p)
106+{
107+ pr_info("KASLR is disabled.\n");
108+
109+ return 0; /* Print a notice and silence the boot warning */
110+}
111+early_param("nokaslr", nokaslr);
112+
105113 static inline __init bool kaslr_disabled(void)
106114 {
107115 char *str;
arch/loongarch/kernel/stacktrace.c+1−1
@@ -32,7 +32,7 @@ void arch_stack_walk(stack_trace_consume_fn consume_entry, void *cookie, · 31 unmodified lines
3232 }
3333
3434 for (unwind_start(&state, task, regs);
35− !unwind_done(&state) && !unwind_error(&state); unwind_next_frame(&state)) {
35+ !unwind_done(&state); unwind_next_frame(&state)) {
3636 addr = unwind_get_return_address(&state);
3737 if (!addr || !consume_entry(cookie, addr))
3838 break;
arch/loongarch/kernel/time.c+9−14
@@ -58,14 +58,16 @@ static int constant_set_state_oneshot(struct clock_event_device *evt) · 57 unmodified lines
5858 return 0;
5959 }
6060
61−static int constant_set_state_oneshot_stopped(struct clock_event_device *evt)
61+static int constant_set_state_periodic(struct clock_event_device *evt)
6262 {
63+ unsigned long period;
6364 unsigned long timer_config;
6465
6566 raw_spin_lock(&state_lock);
6667
67− timer_config = csr_read64(LOONGARCH_CSR_TCFG);
68− timer_config &= ~CSR_TCFG_EN;
68+ period = const_clock_freq / HZ;
69+ timer_config = period & CSR_TCFG_VAL;
70+ timer_config |= (CSR_TCFG_PERIOD | CSR_TCFG_EN);
6971 csr_write64(timer_config, LOONGARCH_CSR_TCFG);
7072
7173 raw_spin_unlock(&state_lock);
@@ -73,16 +75,14 @@ static int constant_set_state_oneshot_stopped(struct clock_event_device *evt) · 1 unmodified line
7375 return 0;
7476 }
7577
76−static int constant_set_state_periodic(struct clock_event_device *evt)
78+static int constant_set_state_shutdown(struct clock_event_device *evt)
7779 {
78− unsigned long period;
7980 unsigned long timer_config;
8081
8182 raw_spin_lock(&state_lock);
8283
83− period = const_clock_freq / HZ;
84− timer_config = period & CSR_TCFG_VAL;
85− timer_config |= (CSR_TCFG_PERIOD | CSR_TCFG_EN);
84+ timer_config = csr_read64(LOONGARCH_CSR_TCFG);
85+ timer_config &= ~CSR_TCFG_EN;
8686 csr_write64(timer_config, LOONGARCH_CSR_TCFG);
8787
8888 raw_spin_unlock(&state_lock);
@@ -90,11 +90,6 @@ static int constant_set_state_periodic(struct clock_event_device *evt) · 1 unmodified line
9090 return 0;
9191 }
9292
93−static int constant_set_state_shutdown(struct clock_event_device *evt)
94−{
95− return 0;
96−}
97−
9893 static int constant_timer_next_event(unsigned long delta, struct clock_event_device *evt)
9994 {
10095 unsigned long timer_config;
@@ -161,7 +156,7 @@ int constant_clockevent_init(void) · 60 unmodified lines
161156 cd->rating = 320;
162157 cd->cpumask = cpumask_of(cpu);
163158 cd->set_state_oneshot = constant_set_state_oneshot;
164− cd->set_state_oneshot_stopped = constant_set_state_oneshot_stopped;
159+ cd->set_state_oneshot_stopped = constant_set_state_shutdown;
165160 cd->set_state_periodic = constant_set_state_periodic;
166161 cd->set_state_shutdown = constant_set_state_shutdown;
167162 cd->set_next_event = constant_timer_next_event;
arch/loongarch/kernel/unwind.c+0−1
@@ -28,6 +28,5 @@ bool default_next_frame(struct unwind_state *state) · 27 unmodified lines
2828
2929 } while (!get_stack_info(state->sp, state->task, info));
3030
31− state->error = true;
3231 return false;
3332 }
arch/loongarch/kernel/unwind_prologue.c+1−1
@@ -227,7 +227,7 @@ static bool next_frame(struct unwind_state *state) · 226 unmodified lines
227227 } while (!get_stack_info(state->sp, state->task, info));
228228
229229 out:
230− state->error = true;
230+ state->stack_info.type = STACK_TYPE_UNKNOWN;
231231 return false;
232232 }
233233
arch/loongarch/mm/pgtable.c+2−2
@@ -13,13 +13,13 @@ struct page *dmw_virt_to_page(unsigned long kaddr) · 12 unmodified lines
1313 {
1414 return pfn_to_page(virt_to_pfn(kaddr));
1515 }
16−EXPORT_SYMBOL_GPL(dmw_virt_to_page);
16+EXPORT_SYMBOL(dmw_virt_to_page);
1717
1818 struct page *tlb_virt_to_page(unsigned long kaddr)
1919 {
2020 return pfn_to_page(pte_pfn(*virt_to_kpte(kaddr)));
2121 }
22−EXPORT_SYMBOL_GPL(tlb_virt_to_page);
22+EXPORT_SYMBOL(tlb_virt_to_page);
2323
2424 pgd_t *pgd_alloc(struct mm_struct *mm)
2525 {
arch/loongarch/net/bpf_jit.c+6−12
@@ -480,10 +480,12 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 479 unmodified lines
480480 case 8:
481481 move_reg(ctx, t1, src);
482482 emit_insn(ctx, extwb, dst, t1);
483+ emit_zext_32(ctx, dst, is32);
483484 break;
484485 case 16:
485486 move_reg(ctx, t1, src);
486487 emit_insn(ctx, extwh, dst, t1);
488+ emit_zext_32(ctx, dst, is32);
487489 break;
488490 case 32:
489491 emit_insn(ctx, addw, dst, src, LOONGARCH_GPR_ZERO);
@@ -772,8 +774,8 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 282 unmodified lines
772774 break;
773775 case 32:
774776 emit_insn(ctx, revb2w, dst, dst);
775− /* zero-extend 32 bits into 64 bits */
776− emit_zext_32(ctx, dst, is32);
777+ /* clear the upper 32 bits */
778+ emit_zext_32(ctx, dst, true);
777779 break;
778780 case 64:
779781 emit_insn(ctx, revbd, dst, dst);
@@ -911,8 +913,6 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 131 unmodified lines
911913
912914 /* function return */
913915 case BPF_JMP | BPF_EXIT:
914− emit_sext_32(ctx, regmap[BPF_REG_0], true);
915−
916916 if (i == ctx->prog->len - 1)
917917 break;
918918
@@ -988,14 +988,8 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext · 69 unmodified lines
988988 }
989989 break;
990990 case BPF_DW:
991− if (is_signed_imm12(off)) {
992− emit_insn(ctx, ldd, dst, src, off);
993− } else if (is_signed_imm14(off)) {
994− emit_insn(ctx, ldptrd, dst, src, off);
995− } else {
996− move_imm(ctx, t1, off, is32);
997− emit_insn(ctx, ldxd, dst, src, t1);
998− }
991+ move_imm(ctx, t1, off, is32);
992+ emit_insn(ctx, ldxd, dst, src, t1);
999993 break;
1000994 }
1001995
arch/mips/Kconfig+2−0
@@ -460,6 +460,7 @@ config MACH_LOONGSON2EF · 459 unmodified lines
460460
461461 config MACH_LOONGSON64
462462 bool "Loongson 64-bit family of machines"
463+ select ARCH_DMA_DEFAULT_COHERENT
463464 select ARCH_SPARSEMEM_ENABLE
464465 select ARCH_MIGHT_HAVE_PC_PARPORT
465466 select ARCH_MIGHT_HAVE_PC_SERIO
@@ -1251,6 +1252,7 @@ config CPU_LOONGSON64 · 785 unmodified lines
12511252 select CPU_SUPPORTS_MSA
12521253 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
12531254 select CPU_MIPSR2_IRQ_VI
1255+ select DMA_NONCOHERENT
12541256 select WEAK_ORDERING
12551257 select WEAK_REORDERING_BEYOND_LLSC
12561258 select MIPS_ASID_BITS_VARIABLE
arch/mips/include/asm/mach-loongson64/boot_param.h+7−2
@@ -14,7 +14,11 @@ · 13 unmodified lines
1414 #define ADAPTER_ROM 8
1515 #define ACPI_TABLE 9
1616 #define SMBIOS_TABLE 10
17−#define MAX_MEMORY_TYPE 11
17+#define UMA_VIDEO_RAM 11
18+#define VUMA_VIDEO_RAM 12
19+#define MAX_MEMORY_TYPE 13
20+
21+#define MEM_SIZE_IS_IN_BYTES (1 << 31)
1822
1923 #define LOONGSON3_BOOT_MEM_MAP_MAX 128
2024 struct efi_memory_map_loongson {
@@ -117,7 +121,8 @@ struct irq_source_routing_table { · 96 unmodified lines
117121 u64 pci_io_start_addr;
118122 u64 pci_io_end_addr;
119123 u64 pci_config_addr;
120− u32 dma_mask_bits;
124+ u16 dma_mask_bits;
125+ u16 dma_noncoherent;
121126 } __packed;
122127
123128 struct interface_info {
arch/mips/kernel/process.c+13−12
@@ -121,6 +121,19 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) · 120 unmodified lines
121121 /* Put the stack after the struct pt_regs. */
122122 childksp = (unsigned long) childregs;
123123 p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK;
124+
125+ /*
126+ * New tasks lose permission to use the fpu. This accelerates context
127+ * switching for most programs since they don't use the fpu.
128+ */
129+ clear_tsk_thread_flag(p, TIF_USEDFPU);
130+ clear_tsk_thread_flag(p, TIF_USEDMSA);
131+ clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
132+
133+#ifdef CONFIG_MIPS_MT_FPAFF
134+ clear_tsk_thread_flag(p, TIF_FPUBOUND);
135+#endif /* CONFIG_MIPS_MT_FPAFF */
136+
124137 if (unlikely(args->fn)) {
125138 /* kernel thread */
126139 unsigned long status = p->thread.cp0_status;
@@ -149,20 +162,8 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) · 22 unmodified lines
149162 p->thread.reg29 = (unsigned long) childregs;
150163 p->thread.reg31 = (unsigned long) ret_from_fork;
151164
152− /*
153− * New tasks lose permission to use the fpu. This accelerates context
154− * switching for most programs since they don't use the fpu.
155− */
156165 childregs->cp0_status &= ~(ST0_CU2|ST0_CU1);
157166
158− clear_tsk_thread_flag(p, TIF_USEDFPU);
159− clear_tsk_thread_flag(p, TIF_USEDMSA);
160− clear_tsk_thread_flag(p, TIF_MSA_CTX_LIVE);
161−
162−#ifdef CONFIG_MIPS_MT_FPAFF
163− clear_tsk_thread_flag(p, TIF_FPUBOUND);
164−#endif /* CONFIG_MIPS_MT_FPAFF */
165−
166167 #ifdef CONFIG_MIPS_FP_SUPPORT
167168 atomic_set(&p->thread.bd_emu_frame, BD_EMUFRAME_NONE);
168169 #endif
arch/mips/kernel/smp.c+2−2
@@ -351,10 +351,11 @@ early_initcall(mips_smp_ipi_init); · 350 unmodified lines
351351 */
352352 asmlinkage void start_secondary(void)
353353 {
354− unsigned int cpu;
354+ unsigned int cpu = raw_smp_processor_id();
355355
356356 cpu_probe();
357357 per_cpu_trap_init(false);
358+ rcutree_report_cpu_starting(cpu);
358359 mips_clockevent_init();
359360 mp_ops->init_secondary();
360361 cpu_report();
@@ -366,7 +367,6 @@ asmlinkage void start_secondary(void) · 5 unmodified lines
366367 */
367368
368369 calibrate_delay();
369− cpu = smp_processor_id();
370370 cpu_data[cpu].udelay_val = loops_per_jiffy;
371371
372372 set_cpu_sibling_map(cpu);
arch/mips/loongson64/env.c+9−1
@@ -13,6 +13,8 @@ · 12 unmodified lines
1313 * Copyright (C) 2009 Lemote Inc.
1414 * Author: Wu Zhangjin, wuzhangjin@gmail.com
1515 */
16+
17+#include <linux/dma-map-ops.h>
1618 #include <linux/export.h>
1719 #include <linux/pci_ids.h>
1820 #include <asm/bootinfo.h>
@@ -147,8 +149,14 @@ void __init prom_lefi_init_env(void) · 128 unmodified lines
147149
148150 loongson_sysconf.dma_mask_bits = eirq_source->dma_mask_bits;
149151 if (loongson_sysconf.dma_mask_bits < 32 ||
150− loongson_sysconf.dma_mask_bits > 64)
152+ loongson_sysconf.dma_mask_bits > 64) {
151153 loongson_sysconf.dma_mask_bits = 32;
154+ dma_default_coherent = true;
155+ } else {
156+ dma_default_coherent = !eirq_source->dma_noncoherent;
157+ }
158+
159+ pr_info("Firmware: Coherent DMA: %s\n", dma_default_coherent ? "on" : "off");
152160
153161 loongson_sysconf.restart_addr = boot_p->reset_system.ResetWarm;
154162 loongson_sysconf.poweroff_addr = boot_p->reset_system.Shutdown;
arch/mips/loongson64/init.c+31−16
@@ -49,8 +49,7 @@ void virtual_early_config(void) · 48 unmodified lines
4949 void __init szmem(unsigned int node)
5050 {
5151 u32 i, mem_type;
52− static unsigned long num_physpages;
53− u64 node_id, node_psize, start_pfn, end_pfn, mem_start, mem_size;
52+ phys_addr_t node_id, mem_start, mem_size;
5453
5554 /* Otherwise come from DTB */
5655 if (loongson_sysconf.fw_interface != LOONGSON_LEFI)
@@ -64,30 +63,46 @@ void __init szmem(unsigned int node) · 7 unmodified lines
6463
6564 mem_type = loongson_memmap->map[i].mem_type;
6665 mem_size = loongson_memmap->map[i].mem_size;
67− mem_start = loongson_memmap->map[i].mem_start;
66+
67+ /* Memory size comes in MB if MEM_SIZE_IS_IN_BYTES not set */
68+ if (mem_size & MEM_SIZE_IS_IN_BYTES)
69+ mem_size &= ~MEM_SIZE_IS_IN_BYTES;
70+ else
71+ mem_size = mem_size << 20;
72+
73+ mem_start = (node_id << 44) | loongson_memmap->map[i].mem_start;
6874
6975 switch (mem_type) {
7076 case SYSTEM_RAM_LOW:
7177 case SYSTEM_RAM_HIGH:
72− start_pfn = ((node_id << 44) + mem_start) >> PAGE_SHIFT;
73− node_psize = (mem_size << 20) >> PAGE_SHIFT;
74− end_pfn = start_pfn + node_psize;
75− num_physpages += node_psize;
76− pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
77− (u32)node_id, mem_type, mem_start, mem_size);
78− pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n",
79− start_pfn, end_pfn, num_physpages);
80− memblock_add_node(PFN_PHYS(start_pfn),
81− PFN_PHYS(node_psize), node,
78+ case UMA_VIDEO_RAM:
79+ pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes usable\n",
80+ (u32)node_id, mem_type, &mem_start, &mem_size);
81+ memblock_add_node(mem_start, mem_size, node,
8282 MEMBLOCK_NONE);
8383 break;
8484 case SYSTEM_RAM_RESERVED:
85− pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n",
86− (u32)node_id, mem_type, mem_start, mem_size);
87− memblock_reserve(((node_id << 44) + mem_start), mem_size << 20);
85+ case VIDEO_ROM:
86+ case ADAPTER_ROM:
87+ case ACPI_TABLE:
88+ case SMBIOS_TABLE:
89+ pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes reserved\n",
90+ (u32)node_id, mem_type, &mem_start, &mem_size);
91+ memblock_reserve(mem_start, mem_size);
92+ break;
93+ /* We should not reserve VUMA_VIDEO_RAM as it overlaps with MMIO */
94+ case VUMA_VIDEO_RAM:
95+ default:
96+ pr_info("Node %d, mem_type:%d\t[%pa], %pa bytes unhandled\n",
97+ (u32)node_id, mem_type, &mem_start, &mem_size);
8898 break;
8999 }
90100 }
101+
102+ /* Reserve vgabios if it comes from firmware */
103+ if (loongson_sysconf.vgabios_addr)
104+ memblock_reserve(virt_to_phys((void *)loongson_sysconf.vgabios_addr),
105+ SZ_256K);
91106 }
92107
93108 #ifndef CONFIG_NUMA
arch/parisc/Kconfig+8−5
@@ -115,9 +115,12 @@ config ARCH_HAS_ILOG2_U64 · 114 unmodified lines
115115 default n
116116
117117 config GENERIC_BUG
118− bool
119− default y
118+ def_bool y
120119 depends on BUG
120+ select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
121+
122+config GENERIC_BUG_RELATIVE_POINTERS
123+ bool
121124
122125 config GENERIC_HWEIGHT
123126 bool
@@ -140,11 +143,11 @@ config ARCH_MMAP_RND_COMPAT_BITS_MIN · 16 unmodified lines
140143 default 8
141144
142145 config ARCH_MMAP_RND_BITS_MAX
143− default 24 if 64BIT
144− default 17
146+ default 18 if 64BIT
147+ default 13
145148
146149 config ARCH_MMAP_RND_COMPAT_BITS_MAX
147− default 17
150+ default 13
148151
149152 # unless you want to implement ACPI on PA-RISC ... ;-)
150153 config PM
arch/parisc/include/asm/alternative.h+6−3
@@ -34,7 +34,8 @@ void apply_alternatives(struct alt_instr *start, struct alt_instr *end, · 33 unmodified lines
3434
3535 /* Alternative SMP implementation. */
3636 #define ALTERNATIVE(cond, replacement) "!0:" \
37− ".section .altinstructions, \"aw\" !" \
37+ ".section .altinstructions, \"a\" !" \
38+ ".align 4 !" \
3839 ".word (0b-4-.) !" \
3940 ".hword 1, " __stringify(cond) " !" \
4041 ".word " __stringify(replacement) " !" \
@@ -44,7 +45,8 @@ void apply_alternatives(struct alt_instr *start, struct alt_instr *end, · 3 unmodified lines
4445
4546 /* to replace one single instructions by a new instruction */
4647 #define ALTERNATIVE(from, to, cond, replacement)\
47− .section .altinstructions, "aw" ! \
48+ .section .altinstructions, "a" ! \
49+ .align 4 ! \
4850 .word (from - .) ! \
4951 .hword (to - from)/4, cond ! \
5052 .word replacement ! \
@@ -52,7 +54,8 @@ void apply_alternatives(struct alt_instr *start, struct alt_instr *end, · 1 unmodified line
5254
5355 /* to replace multiple instructions by new code */
5456 #define ALTERNATIVE_CODE(from, num_instructions, cond, new_instr_ptr)\
55− .section .altinstructions, "aw" ! \
57+ .section .altinstructions, "a" ! \
58+ .align 4 ! \
5659 .word (from - .) ! \
5760 .hword -num_instructions, cond ! \
5861 .word (new_instr_ptr - .) ! \
arch/parisc/include/asm/assembly.h+1−0
@@ -574,6 +574,7 @@ · 573 unmodified lines
574574 */
575575 #define ASM_EXCEPTIONTABLE_ENTRY(fault_addr, except_addr) \
576576 .section __ex_table,"aw" ! \
577+ .align 4 ! \
577578 .word (fault_addr - .), (except_addr - .) ! \
578579 .previous
579580
arch/parisc/include/asm/bug.h+22−16
@@ -17,24 +17,27 @@ · 16 unmodified lines
1717 #define PARISC_BUG_BREAK_ASM "break 0x1f, 0x1fff"
1818 #define PARISC_BUG_BREAK_INSN 0x03ffe01f /* PARISC_BUG_BREAK_ASM */
1919
20−#if defined(CONFIG_64BIT)
21−#define ASM_WORD_INSN ".dword\t"
20+#ifdef CONFIG_GENERIC_BUG_RELATIVE_POINTERS
21+# define __BUG_REL(val) ".word " __stringify(val) " - ."
2222 #else
23−#define ASM_WORD_INSN ".word\t"
23+# define __BUG_REL(val) ".word " __stringify(val)
2424 #endif
2525
26+
2627 #ifdef CONFIG_DEBUG_BUGVERBOSE
2728 #define BUG() \
2829 do { \
2930 asm volatile("\n" \
3031 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
31− "\t.pushsection __bug_table,\"aw\"\n" \
32− "2:\t" ASM_WORD_INSN "1b, %c0\n" \
33− "\t.short %c1, %c2\n" \
34− "\t.org 2b+%c3\n" \
32+ "\t.pushsection __bug_table,\"a\"\n" \
33+ "\t.align 4\n" \
34+ "2:\t" __BUG_REL(1b) "\n" \
35+ "\t" __BUG_REL(%c0) "\n" \
36+ "\t.short %1, %2\n" \
37+ "\t.blockz %3-2*4-2*2\n" \
3538 "\t.popsection" \
3639 : : "i" (__FILE__), "i" (__LINE__), \
37− "i" (0), "i" (sizeof(struct bug_entry)) ); \
40+ "i" (0), "i" (sizeof(struct bug_entry)) ); \
3841 unreachable(); \
3942 } while(0)
4043
@@ -51,10 +54,12 @@ · 10 unmodified lines
5154 do { \
5255 asm volatile("\n" \
5356 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
54− "\t.pushsection __bug_table,\"aw\"\n" \
55− "2:\t" ASM_WORD_INSN "1b, %c0\n" \
56− "\t.short %c1, %c2\n" \
57− "\t.org 2b+%c3\n" \
57+ "\t.pushsection __bug_table,\"a\"\n" \
58+ "\t.align 4\n" \
59+ "2:\t" __BUG_REL(1b) "\n" \
60+ "\t" __BUG_REL(%c0) "\n" \
61+ "\t.short %1, %2\n" \
62+ "\t.blockz %3-2*4-2*2\n" \
5863 "\t.popsection" \
5964 : : "i" (__FILE__), "i" (__LINE__), \
6065 "i" (BUGFLAG_WARNING|(flags)), \
@@ -65,10 +70,11 @@ · 4 unmodified lines
6570 do { \
6671 asm volatile("\n" \
6772 "1:\t" PARISC_BUG_BREAK_ASM "\n" \
68− "\t.pushsection __bug_table,\"aw\"\n" \
69− "2:\t" ASM_WORD_INSN "1b\n" \
70− "\t.short %c0\n" \
71− "\t.org 2b+%c1\n" \
73+ "\t.pushsection __bug_table,\"a\"\n" \
74+ "\t.align 4\n" \
75+ "2:\t" __BUG_REL(1b) "\n" \
76+ "\t.short %0\n" \
77+ "\t.blockz %1-4-2\n" \
7278 "\t.popsection" \
7379 : : "i" (BUGFLAG_WARNING|(flags)), \
7480 "i" (sizeof(struct bug_entry)) ); \
arch/parisc/include/asm/elf.h+1−9
@@ -349,15 +349,7 @@ struct pt_regs; /* forward declaration... */ · 348 unmodified lines
349349
350350 #define ELF_HWCAP 0
351351
352−/* Masks for stack and mmap randomization */
353−#define BRK_RND_MASK (is_32bit_task() ? 0x07ffUL : 0x3ffffUL)
354−#define MMAP_RND_MASK (is_32bit_task() ? 0x1fffUL : 0x3ffffUL)
355−#define STACK_RND_MASK MMAP_RND_MASK
356−
357−struct mm_struct;
358−extern unsigned long arch_randomize_brk(struct mm_struct *);
359−#define arch_randomize_brk arch_randomize_brk
360−
352+#define STACK_RND_MASK 0x7ff /* 8MB of VA */
361353
362354 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
363355 struct linux_binprm;
arch/parisc/include/asm/jump_label.h+6−2
@@ -15,10 +15,12 @@ static __always_inline bool arch_static_branch(struct static_key *key, bool bran · 14 unmodified lines
1515 asm_volatile_goto("1:\n\t"
1616 "nop\n\t"
1717 ".pushsection __jump_table, \"aw\"\n\t"
18+ ".align %1\n\t"
1819 ".word 1b - ., %l[l_yes] - .\n\t"
1920 __stringify(ASM_ULONG_INSN) " %c0 - .\n\t"
2021 ".popsection\n\t"
21− : : "i" (&((char *)key)[branch]) : : l_yes);
22+ : : "i" (&((char *)key)[branch]), "i" (sizeof(long))
23+ : : l_yes);
2224
2325 return false;
2426 l_yes:
@@ -30,10 +32,12 @@ static __always_inline bool arch_static_branch_jump(struct static_key *key, bool · 5 unmodified lines
3032 asm_volatile_goto("1:\n\t"
3133 "b,n %l[l_yes]\n\t"
3234 ".pushsection __jump_table, \"aw\"\n\t"
35+ ".align %1\n\t"
3336 ".word 1b - ., %l[l_yes] - .\n\t"
3437 __stringify(ASM_ULONG_INSN) " %c0 - .\n\t"
3538 ".popsection\n\t"
36− : : "i" (&((char *)key)[branch]) : : l_yes);
39+ : : "i" (&((char *)key)[branch]), "i" (sizeof(long))
40+ : : l_yes);
3741
3842 return false;
3943 l_yes:
arch/parisc/include/asm/ldcw.h+1−1
@@ -55,7 +55,7 @@ · 54 unmodified lines
5555 })
5656
5757 #ifdef CONFIG_SMP
58−# define __lock_aligned __section(".data..lock_aligned")
58+# define __lock_aligned __section(".data..lock_aligned") __aligned(16)
5959 #endif
6060
6161 #endif /* __PARISC_LDCW_H */
arch/parisc/include/asm/processor.h+2−0
@@ -47,6 +47,8 @@ · 46 unmodified lines
4747
4848 #ifndef __ASSEMBLY__
4949
50+struct rlimit;
51+unsigned long mmap_upper_limit(struct rlimit *rlim_stack);
5052 unsigned long calc_max_stack_size(unsigned long stack_max);
5153
5254 /*
arch/parisc/include/asm/uaccess.h+1−0
@@ -41,6 +41,7 @@ struct exception_table_entry { · 40 unmodified lines
4141
4242 #define ASM_EXCEPTIONTABLE_ENTRY( fault_addr, except_addr )\
4343 ".section __ex_table,\"aw\"\n" \
44+ ".align 4\n" \
4445 ".word (" #fault_addr " - .), (" #except_addr " - .)\n\t" \
4546 ".previous\n"
4647
arch/parisc/include/uapi/asm/errno.h+0−2
@@ -75,7 +75,6 @@ · 74 unmodified lines
7575
7676 /* We now return you to your regularly scheduled HPUX. */
7777
78−#define ENOSYM 215 /* symbol does not exist in executable */
7978 #define ENOTSOCK 216 /* Socket operation on non-socket */
8079 #define EDESTADDRREQ 217 /* Destination address required */
8180 #define EMSGSIZE 218 /* Message too long */
@@ -101,7 +100,6 @@ · 19 unmodified lines
101100 #define ETIMEDOUT 238 /* Connection timed out */
102101 #define ECONNREFUSED 239 /* Connection refused */
103102 #define EREFUSED ECONNREFUSED /* for HP's NFS apparently */
104−#define EREMOTERELEASE 240 /* Remote peer released connection */
105103 #define EHOSTDOWN 241 /* Host is down */
106104 #define EHOSTUNREACH 242 /* No route to host */
107105
arch/parisc/kernel/processor.c+1−1
@@ -383,7 +383,7 @@ show_cpuinfo (struct seq_file *m, void *v) · 382 unmodified lines
383383 char cpu_name[60], *p;
384384
385385 /* strip PA path from CPU name to not confuse lscpu */
386− strlcpy(cpu_name, per_cpu(cpu_data, 0).dev->name, sizeof(cpu_name));
386+ strscpy(cpu_name, per_cpu(cpu_data, 0).dev->name, sizeof(cpu_name));
387387 p = strrchr(cpu_name, '[');
388388 if (p)
389389 *(--p) = 0;
arch/parisc/kernel/sys_parisc.c+1−1
@@ -77,7 +77,7 @@ unsigned long calc_max_stack_size(unsigned long stack_max) · 76 unmodified lines
7777 * indicating that "current" should be used instead of a passed-in
7878 * value from the exec bprm as done with arch_pick_mmap_layout().
7979 */
80−static unsigned long mmap_upper_limit(struct rlimit *rlim_stack)
80+unsigned long mmap_upper_limit(struct rlimit *rlim_stack)
8181 {
8282 unsigned long stack_base;
8383
arch/parisc/kernel/vmlinux.lds.S+1−0
@@ -130,6 +130,7 @@ SECTIONS · 129 unmodified lines
130130 RO_DATA(8)
131131
132132 /* unwind info */
133+ . = ALIGN(4);
133134 .PARISC.unwind : {
134135 __start___unwind = .;
135136 *(.PARISC.unwind)
arch/powerpc/kernel/fpu.S+13−0
@@ -23,6 +23,15 @@ · 22 unmodified lines
2323 #include <asm/feature-fixups.h>
2424
2525 #ifdef CONFIG_VSX
26+#define __REST_1FPVSR(n,c,base) \
27+BEGIN_FTR_SECTION \
28+ b 2f; \
29+END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
30+ REST_FPR(n,base); \
31+ b 3f; \
32+2: REST_VSR(n,c,base); \
33+3:
34+
2635 #define __REST_32FPVSRS(n,c,base) \
2736 BEGIN_FTR_SECTION \
2837 b 2f; \
@@ -41,9 +50,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \ · 12 unmodified lines
4150 2: SAVE_32VSRS(n,c,base); \
4251 3:
4352 #else
53+#define __REST_1FPVSR(n,b,base) REST_FPR(n, base)
4454 #define __REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
4555 #define __SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
4656 #endif
57+#define REST_1FPVSR(n,c,base) __REST_1FPVSR(n,__REG_##c,__REG_##base)
4758 #define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
4859 #define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
4960
@@ -67,6 +78,7 @@ _GLOBAL(store_fp_state) · 17 unmodified lines
6778 SAVE_32FPVSRS(0, R4, R3)
6879 mffs fr0
6980 stfd fr0,FPSTATE_FPSCR(r3)
81+ REST_1FPVSR(0, R4, R3)
7082 blr
7183 EXPORT_SYMBOL(store_fp_state)
7284
@@ -138,4 +150,5 @@ _GLOBAL(save_fpu) · 65 unmodified lines
138150 2: SAVE_32FPVSRS(0, R4, R6)
139151 mffs fr0
140152 stfd fr0,FPSTATE_FPSCR(r6)
153+ REST_1FPVSR(0, R4, R6)
141154 blr
arch/powerpc/kernel/process.c+3−3
@@ -1198,11 +1198,11 @@ void kvmppc_save_user_regs(void) · 1197 unmodified lines
11981198
11991199 usermsr = current->thread.regs->msr;
12001200
1201+ /* Caller has enabled FP/VEC/VSX/TM in MSR */
12011202 if (usermsr & MSR_FP)
1202− save_fpu(current);
1203−
1203+ __giveup_fpu(current);
12041204 if (usermsr & MSR_VEC)
1205− save_altivec(current);
1205+ __giveup_altivec(current);
12061206
12071207 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
12081208 if (usermsr & MSR_TM) {
arch/powerpc/kernel/trace/ftrace_entry.S+2−2
@@ -62,7 +62,7 @@ · 61 unmodified lines
6262 .endif
6363
6464 /* Save previous stack pointer (r1) */
65− addi r8, r1, SWITCH_FRAME_SIZE
65+ addi r8, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
6666 PPC_STL r8, GPR1(r1)
6767
6868 .if \allregs == 1
@@ -182,7 +182,7 @@ ftrace_no_trace: · 113 unmodified lines
182182 mflr r3
183183 mtctr r3
184184 REST_GPR(3, r1)
185− addi r1, r1, SWITCH_FRAME_SIZE
185+ addi r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
186186 mtlr r0
187187 bctr
188188 #endif
arch/powerpc/kernel/vector.S+2−0
@@ -33,6 +33,7 @@ _GLOBAL(store_vr_state) · 32 unmodified lines
3333 mfvscr v0
3434 li r4, VRSTATE_VSCR
3535 stvx v0, r4, r3
36+ lvx v0, 0, r3
3637 blr
3738 EXPORT_SYMBOL(store_vr_state)
3839
@@ -109,6 +110,7 @@ _GLOBAL(save_altivec) · 70 unmodified lines
109110 mfvscr v0
110111 li r4,VRSTATE_VSCR
111112 stvx v0,r4,r7
113+ lvx v0,0,r7
112114 blr
113115
114116 #ifdef CONFIG_VSX
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts+0−7
@@ -8,9 +8,6 @@ · 7 unmodified lines
88 #include <dt-bindings/gpio/gpio.h>
99 #include <dt-bindings/leds/common.h>
1010
11−/* Clock frequency (in Hz) of the rtcclk */
12−#define RTCCLK_FREQ 1000000
13−
1411 / {
1512 model = "Microchip PolarFire-SoC Icicle Kit";
1613 compatible = "microchip,mpfs-icicle-reference-rtlv2210", "microchip,mpfs-icicle-kit",
@@ -29,10 +26,6 @@ · 12 unmodified lines
2926 stdout-path = "serial1:115200n8";
3027 };
3128
32− cpus {
33− timebase-frequency = <RTCCLK_FREQ>;
34− };
35−
3629 leds {
3730 compatible = "gpio-leds";
3831
arch/riscv/boot/dts/microchip/mpfs-m100pfsevp.dts+0−7
@@ -10,9 +10,6 @@ · 9 unmodified lines
1010 #include "mpfs.dtsi"
1111 #include "mpfs-m100pfs-fabric.dtsi"
1212
13−/* Clock frequency (in Hz) of the rtcclk */
14−#define MTIMER_FREQ 1000000
15−
1613 / {
1714 model = "Aries Embedded M100PFEVPS";
1815 compatible = "aries,m100pfsevp", "microchip,mpfs";
@@ -33,10 +30,6 @@ · 14 unmodified lines
3330 stdout-path = "serial1:115200n8";
3431 };
3532
36− cpus {
37− timebase-frequency = <MTIMER_FREQ>;
38− };
39−
4033 ddrc_cache_lo: memory@80000000 {
4134 device_type = "memory";
4235 reg = <0x0 0x80000000 0x0 0x40000000>;
arch/riscv/boot/dts/microchip/mpfs-polarberry.dts+0−7
@@ -6,9 +6,6 @@ · 5 unmodified lines
66 #include "mpfs.dtsi"
77 #include "mpfs-polarberry-fabric.dtsi"
88
9−/* Clock frequency (in Hz) of the rtcclk */
10−#define MTIMER_FREQ 1000000
11−
129 / {
1310 model = "Sundance PolarBerry";
1411 compatible = "sundance,polarberry", "microchip,mpfs";
@@ -22,10 +19,6 @@ · 7 unmodified lines
2219 stdout-path = "serial0:115200n8";
2320 };
2421
25− cpus {
26− timebase-frequency = <MTIMER_FREQ>;
27− };
28−
2922 ddrc_cache_lo: memory@80000000 {
3023 device_type = "memory";
3124 reg = <0x0 0x80000000 0x0 0x2e000000>;
arch/riscv/boot/dts/microchip/mpfs-sev-kit.dts+0−7
@@ -6,9 +6,6 @@ · 5 unmodified lines
66 #include "mpfs.dtsi"
77 #include "mpfs-sev-kit-fabric.dtsi"
88
9−/* Clock frequency (in Hz) of the rtcclk */
10−#define MTIMER_FREQ 1000000
11−
129 / {
1310 #address-cells = <2>;
1411 #size-cells = <2>;
@@ -28,10 +25,6 @@ · 13 unmodified lines
2825 stdout-path = "serial1:115200n8";
2926 };
3027
31− cpus {
32− timebase-frequency = <MTIMER_FREQ>;
33− };
34−
3528 reserved-memory {
3629 #address-cells = <2>;
3730 #size-cells = <2>;
arch/riscv/boot/dts/microchip/mpfs-tysom-m.dts+0−7
@@ -11,9 +11,6 @@ · 10 unmodified lines
1111 #include "mpfs.dtsi"
1212 #include "mpfs-tysom-m-fabric.dtsi"
1313
14−/* Clock frequency (in Hz) of the rtcclk */
15−#define MTIMER_FREQ 1000000
16−
1714 / {
1815 model = "Aldec TySOM-M-MPFS250T-REV2";
1916 compatible = "aldec,tysom-m-mpfs250t-rev2", "microchip,mpfs";
@@ -34,10 +31,6 @@ · 14 unmodified lines
3431 stdout-path = "serial1:115200n8";
3532 };
3633
37− cpus {
38− timebase-frequency = <MTIMER_FREQ>;
39− };
40−
4134 ddrc_cache_lo: memory@80000000 {
4235 device_type = "memory";
4336 reg = <0x0 0x80000000 0x0 0x30000000>;
arch/riscv/boot/dts/microchip/mpfs.dtsi+1−0
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 cpus {
1414 #address-cells = <1>;
1515 #size-cells = <0>;
16+ timebase-frequency = <1000000>;
1617
1718 cpu0: cpu@0 {
1819 compatible = "sifive,e51", "sifive,rocket0", "riscv";
arch/riscv/boot/dts/sophgo/cv1800b.dtsi+0−1
@@ -34,7 +34,6 @@ · 33 unmodified lines
3434 cpu0_intc: interrupt-controller {
3535 compatible = "riscv,cpu-intc";
3636 interrupt-controller;
37− #address-cells = <0>;
3837 #interrupt-cells = <1>;
3938 };
4039 };
arch/riscv/errata/andes/errata.c+13−7
@@ -38,29 +38,35 @@ static long ax45mp_iocp_sw_workaround(void) · 37 unmodified lines
3838 return ret.error ? 0 : ret.value;
3939 }
4040
41−static bool errata_probe_iocp(unsigned int stage, unsigned long arch_id, unsigned long impid)
41+static void errata_probe_iocp(unsigned int stage, unsigned long arch_id, unsigned long impid)
4242 {
43+ static bool done;
44+
4345 if (!IS_ENABLED(CONFIG_ERRATA_ANDES_CMO))
44− return false;
46+ return;
47+
48+ if (done)
49+ return;
50+
51+ done = true;
4552
4653 if (arch_id != ANDESTECH_AX45MP_MARCHID || impid != ANDESTECH_AX45MP_MIMPID)
47− return false;
54+ return;
4855
4956 if (!ax45mp_iocp_sw_workaround())
50− return false;
57+ return;
5158
5259 /* Set this just to make core cbo code happy */
5360 riscv_cbom_block_size = 1;
5461 riscv_noncoherent_supported();
55−
56− return true;
5762 }
5863
5964 void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end,
6065 unsigned long archid, unsigned long impid,
6166 unsigned int stage)
6267 {
63− errata_probe_iocp(stage, archid, impid);
68+ if (stage == RISCV_ALTERNATIVES_BOOT)
69+ errata_probe_iocp(stage, archid, impid);
6470
6571 /* we have nothing to patch here ATM so just return back */
6672 }
arch/riscv/kernel/head.S+1−1
@@ -154,7 +154,6 @@ secondary_start_sbi: · 153 unmodified lines
154154 XIP_FIXUP_OFFSET a3
155155 add a3, a3, a1
156156 REG_L sp, (a3)
157− scs_load_current
158157
159158 .Lsecondary_start_common:
160159
@@ -165,6 +164,7 @@ secondary_start_sbi: · 4 unmodified lines
165164 call relocate_enable_mmu
166165 #endif
167166 call .Lsetup_trap_vector
167+ scs_load_current
168168 tail smp_callin
169169 #endif /* CONFIG_SMP */
170170
arch/riscv/kernel/module.c+84−30
@@ -40,15 +40,6 @@ struct relocation_handlers { · 39 unmodified lines
4040 long buffer);
4141 };
4242
43−unsigned int initialize_relocation_hashtable(unsigned int num_relocations);
44−void process_accumulated_relocations(struct module *me);
45−int add_relocation_to_accumulate(struct module *me, int type, void *location,
46− unsigned int hashtable_bits, Elf_Addr v);
47−
48−struct hlist_head *relocation_hashtable;
49−
50−struct list_head used_buckets_list;
51−
5243 /*
5344 * The auipc+jalr instruction pair can reach any PC-relative offset
5445 * in the range [-2^31 - 2^11, 2^31 - 2^11)
@@ -64,7 +55,7 @@ static bool riscv_insn_valid_32bit_offset(ptrdiff_t val) · 9 unmodified lines
6455
6556 static int riscv_insn_rmw(void *location, u32 keep, u32 set)
6657 {
67− u16 *parcel = location;
58+ __le16 *parcel = location;
6859 u32 insn = (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) << 16;
6960
7061 insn &= keep;
@@ -77,7 +68,7 @@ static int riscv_insn_rmw(void *location, u32 keep, u32 set) · 6 unmodified lines
7768
7869 static int riscv_insn_rvc_rmw(void *location, u16 keep, u16 set)
7970 {
80− u16 *parcel = location;
71+ __le16 *parcel = location;
8172 u16 insn = le16_to_cpu(*parcel);
8273
8374 insn &= keep;
@@ -604,7 +595,10 @@ static const struct relocation_handlers reloc_handlers[] = { · 520 unmodified lines
604595 /* 192-255 nonstandard ABI extensions */
605596 };
606597
607−void process_accumulated_relocations(struct module *me)
598+static void
599+process_accumulated_relocations(struct module *me,
600+ struct hlist_head **relocation_hashtable,
601+ struct list_head *used_buckets_list)
608602 {
609603 /*
610604 * Only ADD/SUB/SET/ULEB128 should end up here.
@@ -624,18 +618,25 @@ void process_accumulated_relocations(struct module *me) · 13 unmodified lines
624618 * - Each relocation entry for a location address
625619 */
626620 struct used_bucket *bucket_iter;
621+ struct used_bucket *bucket_iter_tmp;
627622 struct relocation_head *rel_head_iter;
623+ struct hlist_node *rel_head_iter_tmp;
628624 struct relocation_entry *rel_entry_iter;
625+ struct relocation_entry *rel_entry_iter_tmp;
629626 int curr_type;
630627 void *location;
631628 long buffer;
632629
633− list_for_each_entry(bucket_iter, &used_buckets_list, head) {
634− hlist_for_each_entry(rel_head_iter, bucket_iter->bucket, node) {
630+ list_for_each_entry_safe(bucket_iter, bucket_iter_tmp,
631+ used_buckets_list, head) {
632+ hlist_for_each_entry_safe(rel_head_iter, rel_head_iter_tmp,
633+ bucket_iter->bucket, node) {
635634 buffer = 0;
636635 location = rel_head_iter->location;
637− list_for_each_entry(rel_entry_iter,
638− rel_head_iter->rel_entry, head) {
636+ list_for_each_entry_safe(rel_entry_iter,
637+ rel_entry_iter_tmp,
638+ rel_head_iter->rel_entry,
639+ head) {
639640 curr_type = rel_entry_iter->type;
640641 reloc_handlers[curr_type].reloc_handler(
641642 me, &buffer, rel_entry_iter->value);
@@ -648,11 +649,14 @@ void process_accumulated_relocations(struct module *me) · 6 unmodified lines
648649 kfree(bucket_iter);
649650 }
650651
651− kfree(relocation_hashtable);
652+ kfree(*relocation_hashtable);
652653 }
653654
654−int add_relocation_to_accumulate(struct module *me, int type, void *location,
655− unsigned int hashtable_bits, Elf_Addr v)
655+static int add_relocation_to_accumulate(struct module *me, int type,
656+ void *location,
657+ unsigned int hashtable_bits, Elf_Addr v,
658+ struct hlist_head *relocation_hashtable,
659+ struct list_head *used_buckets_list)
656660 {
657661 struct relocation_entry *entry;
658662 struct relocation_head *rel_head;
@@ -661,6 +665,10 @@ int add_relocation_to_accumulate(struct module *me, int type, void *location, · 2 unmodified lines
661665 unsigned long hash;
662666
663667 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
668+
669+ if (!entry)
670+ return -ENOMEM;
671+
664672 INIT_LIST_HEAD(&entry->head);
665673 entry->type = type;
666674 entry->value = v;
@@ -669,7 +677,10 @@ int add_relocation_to_accumulate(struct module *me, int type, void *location, · 2 unmodified lines
669677
670678 current_head = &relocation_hashtable[hash];
671679
672− /* Find matching location (if any) */
680+ /*
681+ * Search for the relocation_head for the relocations that happen at the
682+ * provided location
683+ */
673684 bool found = false;
674685 struct relocation_head *rel_head_iter;
675686
@@ -681,19 +692,45 @@ int add_relocation_to_accumulate(struct module *me, int type, void *location, · 5 unmodified lines
681692 }
682693 }
683694
695+ /*
696+ * If there has not yet been any relocations at the provided location,
697+ * create a relocation_head for that location and populate it with this
698+ * relocation_entry.
699+ */
684700 if (!found) {
685701 rel_head = kmalloc(sizeof(*rel_head), GFP_KERNEL);
702+
703+ if (!rel_head) {
704+ kfree(entry);
705+ return -ENOMEM;
706+ }
707+
686708 rel_head->rel_entry =
687709 kmalloc(sizeof(struct list_head), GFP_KERNEL);
710+
711+ if (!rel_head->rel_entry) {
712+ kfree(entry);
713+ kfree(rel_head);
714+ return -ENOMEM;
715+ }
716+
688717 INIT_LIST_HEAD(rel_head->rel_entry);
689718 rel_head->location = location;
690719 INIT_HLIST_NODE(&rel_head->node);
691720 if (!current_head->first) {
692721 bucket =
693722 kmalloc(sizeof(struct used_bucket), GFP_KERNEL);
723+
724+ if (!bucket) {
725+ kfree(entry);
726+ kfree(rel_head);
727+ kfree(rel_head->rel_entry);
728+ return -ENOMEM;
729+ }
730+
694731 INIT_LIST_HEAD(&bucket->head);
695732 bucket->bucket = current_head;
696− list_add(&bucket->head, &used_buckets_list);
733+ list_add(&bucket->head, used_buckets_list);
697734 }
698735 hlist_add_head(&rel_head->node, current_head);
699736 }
@@ -704,7 +741,9 @@ int add_relocation_to_accumulate(struct module *me, int type, void *location, · 4 unmodified lines
704741 return 0;
705742 }
706743
707−unsigned int initialize_relocation_hashtable(unsigned int num_relocations)
744+static unsigned int
745+initialize_relocation_hashtable(unsigned int num_relocations,
746+ struct hlist_head **relocation_hashtable)
708747 {
709748 /* Can safely assume that bits is not greater than sizeof(long) */
710749 unsigned long hashtable_size = roundup_pow_of_two(num_relocations);
@@ -720,12 +759,13 @@ unsigned int initialize_relocation_hashtable(unsigned int num_relocations) · 9 unmodified lines
720759
721760 hashtable_size <<= should_double_size;
722761
723− relocation_hashtable = kmalloc_array(hashtable_size,
724− sizeof(*relocation_hashtable),
725− GFP_KERNEL);
726− __hash_init(relocation_hashtable, hashtable_size);
762+ *relocation_hashtable = kmalloc_array(hashtable_size,
763+ sizeof(*relocation_hashtable),
764+ GFP_KERNEL);
765+ if (!*relocation_hashtable)
766+ return -ENOMEM;
727767
728− INIT_LIST_HEAD(&used_buckets_list);
768+ __hash_init(*relocation_hashtable, hashtable_size);
729769
730770 return hashtable_bits;
731771 }
@@ -742,7 +782,17 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, · 10 unmodified lines
742782 Elf_Addr v;
743783 int res;
744784 unsigned int num_relocations = sechdrs[relsec].sh_size / sizeof(*rel);
745− unsigned int hashtable_bits = initialize_relocation_hashtable(num_relocations);
785+ struct hlist_head *relocation_hashtable;
786+ struct list_head used_buckets_list;
787+ unsigned int hashtable_bits;
788+
789+ hashtable_bits = initialize_relocation_hashtable(num_relocations,
790+ &relocation_hashtable);
791+
792+ if (hashtable_bits < 0)
793+ return hashtable_bits;
794+
795+ INIT_LIST_HEAD(&used_buckets_list);
746796
747797 pr_debug("Applying relocate section %u to %u\n", relsec,
748798 sechdrs[relsec].sh_info);
@@ -823,14 +873,18 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, · 74 unmodified lines
823873 }
824874
825875 if (reloc_handlers[type].accumulate_handler)
826− res = add_relocation_to_accumulate(me, type, location, hashtable_bits, v);
876+ res = add_relocation_to_accumulate(me, type, location,
877+ hashtable_bits, v,
878+ relocation_hashtable,
879+ &used_buckets_list);
827880 else
828881 res = handler(me, location, v);
829882 if (res)
830883 return res;
831884 }
832885
833− process_accumulated_relocations(me);
886+ process_accumulated_relocations(me, &relocation_hashtable,
887+ &used_buckets_list);
834888
835889 return 0;
836890 }
arch/riscv/kernel/sys_riscv.c+1−1
@@ -169,7 +169,7 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair, · 168 unmodified lines
169169 pair->value &= ~missing;
170170 }
171171
172−static bool hwprobe_ext0_has(const struct cpumask *cpus, unsigned long ext)
172+static bool hwprobe_ext0_has(const struct cpumask *cpus, u64 ext)
173173 {
174174 struct riscv_hwprobe pair;
175175
arch/riscv/kernel/tests/module_test/test_uleb128.S+4−4
@@ -6,13 +6,13 @@ · 5 unmodified lines
66 .text
77 .global test_uleb_basic
88 test_uleb_basic:
9− ld a0, second
9+ lw a0, second
1010 addi a0, a0, -127
1111 ret
1212
1313 .global test_uleb_large
1414 test_uleb_large:
15− ld a0, fourth
15+ lw a0, fourth
1616 addi a0, a0, -0x07e8
1717 ret
1818
@@ -22,10 +22,10 @@ first: · 3 unmodified lines
2222 second:
2323 .reloc second, R_RISCV_SET_ULEB128, second
2424 .reloc second, R_RISCV_SUB_ULEB128, first
25− .dword 0
25+ .word 0
2626 third:
2727 .space 1000
2828 fourth:
2929 .reloc fourth, R_RISCV_SET_ULEB128, fourth
3030 .reloc fourth, R_RISCV_SUB_ULEB128, third
31− .dword 0
31+ .word 0
arch/riscv/kernel/traps_misaligned.c+2−4
@@ -550,16 +550,14 @@ int handle_misaligned_store(struct pt_regs *regs) · 549 unmodified lines
550550 } else if ((insn & INSN_MASK_C_SD) == INSN_MATCH_C_SD) {
551551 len = 8;
552552 val.data_ulong = GET_RS2S(insn, regs);
553− } else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP &&
554− ((insn >> SH_RD) & 0x1f)) {
553+ } else if ((insn & INSN_MASK_C_SDSP) == INSN_MATCH_C_SDSP) {
555554 len = 8;
556555 val.data_ulong = GET_RS2C(insn, regs);
557556 #endif
558557 } else if ((insn & INSN_MASK_C_SW) == INSN_MATCH_C_SW) {
559558 len = 4;
560559 val.data_ulong = GET_RS2S(insn, regs);
561− } else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP &&
562− ((insn >> SH_RD) & 0x1f)) {
560+ } else if ((insn & INSN_MASK_C_SWSP) == INSN_MATCH_C_SWSP) {
563561 len = 4;
564562 val.data_ulong = GET_RS2C(insn, regs);
565563 } else if ((insn & INSN_MASK_C_FSD) == INSN_MATCH_C_FSD) {
arch/s390/include/asm/processor.h+0−1
@@ -228,7 +228,6 @@ typedef struct thread_struct thread_struct; · 227 unmodified lines
228228 execve_tail(); \
229229 } while (0)
230230
231−/* Forward declaration, a strange C thing */
232231 struct task_struct;
233232 struct mm_struct;
234233 struct seq_file;
arch/s390/kernel/ipl.c+1−0
@@ -666,6 +666,7 @@ static int __init ipl_init(void) · 665 unmodified lines
666666 &ipl_ccw_attr_group_lpar);
667667 break;
668668 case IPL_TYPE_ECKD:
669+ case IPL_TYPE_ECKD_DUMP:
669670 rc = sysfs_create_group(&ipl_kset->kobj, &ipl_eckd_attr_group);
670671 break;
671672 case IPL_TYPE_FCP:
arch/s390/kernel/perf_pai_crypto.c+5−6
@@ -279,12 +279,6 @@ static int paicrypt_event_init(struct perf_event *event) · 278 unmodified lines
279279 if (IS_ERR(cpump))
280280 return PTR_ERR(cpump);
281281
282− /* Event initialization sets last_tag to 0. When later on the events
283− * are deleted and re-added, do not reset the event count value to zero.
284− * Events are added, deleted and re-added when 2 or more events
285− * are active at the same time.
286− */
287− event->hw.last_tag = 0;
288282 event->destroy = paicrypt_event_destroy;
289283
290284 if (a->sample_period) {
@@ -318,6 +312,11 @@ static void paicrypt_start(struct perf_event *event, int flags) · 27 unmodified lines
318312 {
319313 u64 sum;
320314
315+ /* Event initialization sets last_tag to 0. When later on the events
316+ * are deleted and re-added, do not reset the event count value to zero.
317+ * Events are added, deleted and re-added when 2 or more events
318+ * are active at the same time.
319+ */
321320 if (!event->hw.last_tag) {
322321 event->hw.last_tag = 1;
323322 sum = paicrypt_getall(event); /* Get current value */
arch/s390/kernel/perf_pai_ext.c+0−1
@@ -260,7 +260,6 @@ static int paiext_event_init(struct perf_event *event) · 259 unmodified lines
260260 rc = paiext_alloc(a, event);
261261 if (rc)
262262 return rc;
263− event->hw.last_tag = 0;
264263 event->destroy = paiext_event_destroy;
265264
266265 if (a->sample_period) {
arch/s390/kvm/vsie.c+0−4
@@ -587,10 +587,6 @@ void kvm_s390_vsie_gmap_notifier(struct gmap *gmap, unsigned long start, · 586 unmodified lines
587587
588588 if (!gmap_is_shadow(gmap))
589589 return;
590− if (start >= 1UL << 31)
591− /* We are only interested in prefix pages */
592− return;
593−
594590 /*
595591 * Only new shadow blocks are added to the list during runtime,
596592 * therefore we can safely reference them all the time.
arch/s390/mm/pgtable.c+1−1
@@ -756,7 +756,7 @@ void ptep_zap_unused(struct mm_struct *mm, unsigned long addr, · 755 unmodified lines
756756 pte_clear(mm, addr, ptep);
757757 }
758758 if (reset)
759− pgste_val(pgste) &= ~_PGSTE_GPS_USAGE_MASK;
759+ pgste_val(pgste) &= ~(_PGSTE_GPS_USAGE_MASK | _PGSTE_GPS_NODAT);
760760 pgste_set_unlock(ptep, pgste);
761761 preempt_enable();
762762 }
arch/x86/coco/tdx/tdx.c+1−0
@@ -10,6 +10,7 @@ · 9 unmodified lines
1010 #include <asm/coco.h>
1111 #include <asm/tdx.h>
1212 #include <asm/vmx.h>
13+#include <asm/ia32.h>
1314 #include <asm/insn.h>
1415 #include <asm/insn-eval.h>
1516 #include <asm/pgtable.h>
arch/x86/entry/common.c+92−1
@@ -26,6 +26,7 @@ · 25 unmodified lines
2626 #include <xen/events.h>
2727 #endif
2828
29+#include <asm/apic.h>
2930 #include <asm/desc.h>
3031 #include <asm/traps.h>
3132 #include <asm/vdso.h>
@@ -167,7 +168,96 @@ static __always_inline void do_syscall_32_irqs_on(struct pt_regs *regs, int nr) · 135 unmodified lines
167168 }
168169 }
169170
170−/* Handles int $0x80 */
171+#ifdef CONFIG_IA32_EMULATION
172+static __always_inline bool int80_is_external(void)
173+{
174+ const unsigned int offs = (0x80 / 32) * 0x10;
175+ const u32 bit = BIT(0x80 % 32);
176+
177+ /* The local APIC on XENPV guests is fake */
178+ if (cpu_feature_enabled(X86_FEATURE_XENPV))
179+ return false;
180+
181+ /*
182+ * If vector 0x80 is set in the APIC ISR then this is an external
183+ * interrupt. Either from broken hardware or injected by a VMM.
184+ *
185+ * Note: In guest mode this is only valid for secure guests where
186+ * the secure module fully controls the vAPIC exposed to the guest.
187+ */
188+ return apic_read(APIC_ISR + offs) & bit;
189+}
190+
191+/**
192+ * int80_emulation - 32-bit legacy syscall entry
193+ *
194+ * This entry point can be used by 32-bit and 64-bit programs to perform
195+ * 32-bit system calls. Instances of INT $0x80 can be found inline in
196+ * various programs and libraries. It is also used by the vDSO's
197+ * __kernel_vsyscall fallback for hardware that doesn't support a faster
198+ * entry method. Restarted 32-bit system calls also fall back to INT
199+ * $0x80 regardless of what instruction was originally used to do the
200+ * system call.
201+ *
202+ * This is considered a slow path. It is not used by most libc
203+ * implementations on modern hardware except during process startup.
204+ *
205+ * The arguments for the INT $0x80 based syscall are on stack in the
206+ * pt_regs structure:
207+ * eax: system call number
208+ * ebx, ecx, edx, esi, edi, ebp: arg1 - arg 6
209+ */
210+DEFINE_IDTENTRY_RAW(int80_emulation)
211+{
212+ int nr;
213+
214+ /* Kernel does not use INT $0x80! */
215+ if (unlikely(!user_mode(regs))) {
216+ irqentry_enter(regs);
217+ instrumentation_begin();
218+ panic("Unexpected external interrupt 0x80\n");
219+ }
220+
221+ /*
222+ * Establish kernel context for instrumentation, including for
223+ * int80_is_external() below which calls into the APIC driver.
224+ * Identical for soft and external interrupts.
225+ */
226+ enter_from_user_mode(regs);
227+
228+ instrumentation_begin();
229+ add_random_kstack_offset();
230+
231+ /* Validate that this is a soft interrupt to the extent possible */
232+ if (unlikely(int80_is_external()))
233+ panic("Unexpected external interrupt 0x80\n");
234+
235+ /*
236+ * The low level idtentry code pushed -1 into regs::orig_ax
237+ * and regs::ax contains the syscall number.
238+ *
239+ * User tracing code (ptrace or signal handlers) might assume
240+ * that the regs::orig_ax contains a 32-bit number on invoking
241+ * a 32-bit syscall.
242+ *
243+ * Establish the syscall convention by saving the 32bit truncated
244+ * syscall number in regs::orig_ax and by invalidating regs::ax.
245+ */
246+ regs->orig_ax = regs->ax & GENMASK(31, 0);
247+ regs->ax = -ENOSYS;
248+
249+ nr = syscall_32_enter(regs);
250+
251+ local_irq_enable();
252+ nr = syscall_enter_from_user_mode_work(regs, nr);
253+ do_syscall_32_irqs_on(regs, nr);
254+
255+ instrumentation_end();
256+ syscall_exit_to_user_mode(regs);
257+}
258+#else /* CONFIG_IA32_EMULATION */
259+
260+/* Handles int $0x80 on a 32bit kernel */
171261 __visible noinstr void do_int80_syscall_32(struct pt_regs *regs)
172262 {
173263 int nr = syscall_32_enter(regs);
@@ -186,6 +276,7 @@ __visible noinstr void do_int80_syscall_32(struct pt_regs *regs) · 12 unmodified lines
186276 instrumentation_end();
187277 syscall_exit_to_user_mode(regs);
188278 }
279+#endif /* !CONFIG_IA32_EMULATION */
189280
190281 static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)
191282 {
arch/x86/entry/entry_64_compat.S+0−77
@@ -275,80 +275,3 @@ SYM_INNER_LABEL(entry_SYSRETL_compat_end, SYM_L_GLOBAL) · 274 unmodified lines
275275 ANNOTATE_NOENDBR
276276 int3
277277 SYM_CODE_END(entry_SYSCALL_compat)
278−
279−/*
280− * 32-bit legacy system call entry.
281− *
282− * 32-bit x86 Linux system calls traditionally used the INT $0x80
283− * instruction. INT $0x80 lands here.
284− *
285− * This entry point can be used by 32-bit and 64-bit programs to perform
286− * 32-bit system calls. Instances of INT $0x80 can be found inline in
287− * various programs and libraries. It is also used by the vDSO's
288− * __kernel_vsyscall fallback for hardware that doesn't support a faster
289− * entry method. Restarted 32-bit system calls also fall back to INT
290− * $0x80 regardless of what instruction was originally used to do the
291− * system call.
292− *
293− * This is considered a slow path. It is not used by most libc
294− * implementations on modern hardware except during process startup.
295− *
296− * Arguments:
297− * eax system call number
298− * ebx arg1
299− * ecx arg2
300− * edx arg3
301− * esi arg4
302− * edi arg5
303− * ebp arg6
304− */
305−SYM_CODE_START(entry_INT80_compat)
306− UNWIND_HINT_ENTRY
307− ENDBR
308− /*
309− * Interrupts are off on entry.
310− */
311− ASM_CLAC /* Do this early to minimize exposure */
312− ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV
313−
314− /*
315− * User tracing code (ptrace or signal handlers) might assume that
316− * the saved RAX contains a 32-bit number when we're invoking a 32-bit
317− * syscall. Just in case the high bits are nonzero, zero-extend
318− * the syscall number. (This could almost certainly be deleted
319− * with no ill effects.)
320− */
321− movl %eax, %eax
322−
323− /* switch to thread stack expects orig_ax and rdi to be pushed */
324− pushq %rax /* pt_regs->orig_ax */
325−
326− /* Need to switch before accessing the thread stack. */
327− SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
328−
329− /* In the Xen PV case we already run on the thread stack. */
330− ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
331−
332− movq %rsp, %rax
333− movq PER_CPU_VAR(pcpu_hot + X86_top_of_stack), %rsp
334−
335− pushq 5*8(%rax) /* regs->ss */
336− pushq 4*8(%rax) /* regs->rsp */
337− pushq 3*8(%rax) /* regs->eflags */
338− pushq 2*8(%rax) /* regs->cs */
339− pushq 1*8(%rax) /* regs->ip */
340− pushq 0*8(%rax) /* regs->orig_ax */
341−.Lint80_keep_stack:
342−
343− PUSH_AND_CLEAR_REGS rax=$-ENOSYS
344− UNWIND_HINT_REGS
345−
346− cld
347−
348− IBRS_ENTER
349− UNTRAIN_RET
350−
351− movq %rsp, %rdi
352− call do_int80_syscall_32
353− jmp swapgs_restore_regs_and_return_to_usermode
354−SYM_CODE_END(entry_INT80_compat)
arch/x86/events/intel/core.c+1−1
@@ -4660,7 +4660,7 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu) · 4659 unmodified lines
46604660 if (pmu->intel_cap.pebs_output_pt_available)
46614661 pmu->pmu.capabilities |= PERF_PMU_CAP_AUX_OUTPUT;
46624662 else
4663− pmu->pmu.capabilities |= ~PERF_PMU_CAP_AUX_OUTPUT;
4663+ pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT;
46644664
46654665 intel_pmu_check_event_constraints(pmu->event_constraints,
46664666 pmu->num_counters,
arch/x86/hyperv/hv_init.c+21−4
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <linux/io.h>
1616 #include <asm/apic.h>
1717 #include <asm/desc.h>
18+#include <asm/e820/api.h>
1819 #include <asm/sev.h>
1920 #include <asm/ibt.h>
2021 #include <asm/hypervisor.h>
@@ -286,15 +287,31 @@ static int hv_cpu_die(unsigned int cpu) · 265 unmodified lines
286287
287288 static int __init hv_pci_init(void)
288289 {
289− int gen2vm = efi_enabled(EFI_BOOT);
290+ bool gen2vm = efi_enabled(EFI_BOOT);
290291
291292 /*
292− * For Generation-2 VM, we exit from pci_arch_init() by returning 0.
293− * The purpose is to suppress the harmless warning:
293+ * A Generation-2 VM doesn't support legacy PCI/PCIe, so both
294+ * raw_pci_ops and raw_pci_ext_ops are NULL, and pci_subsys_init() ->
295+ * pcibios_init() doesn't call pcibios_resource_survey() ->
296+ * e820__reserve_resources_late(); as a result, any emulated persistent
297+ * memory of E820_TYPE_PRAM (12) via the kernel parameter
298+ * memmap=nn[KMG]!ss is not added into iomem_resource and hence can't be
299+ * detected by register_e820_pmem(). Fix this by directly calling
300+ * e820__reserve_resources_late() here: e820__reserve_resources_late()
301+ * depends on e820__reserve_resources(), which has been called earlier
302+ * from setup_arch(). Note: e820__reserve_resources_late() also adds
303+ * any memory of E820_TYPE_PMEM (7) into iomem_resource, and
304+ * acpi_nfit_register_region() -> acpi_nfit_insert_resource() ->
305+ * region_intersects() returns REGION_INTERSECTS, so the memory of
306+ * E820_TYPE_PMEM won't get added twice.
307+ *
308+ * We return 0 here so that pci_arch_init() won't print the warning:
294309 * "PCI: Fatal: No config space access function found"
295310 */
296− if (gen2vm)
311+ if (gen2vm) {
312+ e820__reserve_resources_late();
297313 return 0;
314+ }
298315
299316 /* For Generation-1 VM, we'll proceed in pci_arch_init(). */
300317 return 1;
arch/x86/include/asm/acpi.h+14−0
@@ -16,6 +16,9 @@ · 15 unmodified lines
1616 #include <asm/x86_init.h>
1717 #include <asm/cpufeature.h>
1818 #include <asm/irq_vectors.h>
19+#include <asm/xen/hypervisor.h>
20+
21+#include <xen/xen.h>
1922
2023 #ifdef CONFIG_ACPI_APEI
2124 # include <asm/pgtable_types.h>
@@ -127,6 +130,17 @@ static inline void arch_acpi_set_proc_cap_bits(u32 *cap) · 105 unmodified lines
127130 if (!cpu_has(c, X86_FEATURE_MWAIT) ||
128131 boot_option_idle_override == IDLE_NOMWAIT)
129132 *cap &= ~(ACPI_PROC_CAP_C_C1_FFH | ACPI_PROC_CAP_C_C2C3_FFH);
133+
134+ if (xen_initial_domain()) {
135+ /*
136+ * When Linux is running as Xen dom0, the hypervisor is the
137+ * entity in charge of the processor power management, and so
138+ * Xen needs to check the OS capabilities reported in the
139+ * processor capabilities buffer matches what the hypervisor
140+ * driver supports.
141+ */
142+ xen_sanitize_proc_cap_bits(cap);
143+ }
130144 }
131145
132146 static inline bool acpi_has_cpu_in_madt(void)
arch/x86/include/asm/ia32.h+7−0
@@ -75,6 +75,11 @@ static inline bool ia32_enabled(void) · 74 unmodified lines
7575 return __ia32_enabled;
7676 }
7777
78+static inline void ia32_disable(void)
79+{
80+ __ia32_enabled = false;
81+}
82+
7883 #else /* !CONFIG_IA32_EMULATION */
7984
8085 static inline bool ia32_enabled(void)
@@ -82,6 +87,8 @@ static inline bool ia32_enabled(void) · 1 unmodified line
8287 return IS_ENABLED(CONFIG_X86_32);
8388 }
8489
90+static inline void ia32_disable(void) {}
91+
8592 #endif
8693
8794 #endif /* _ASM_X86_IA32_H */
arch/x86/include/asm/idtentry.h+4−0
@@ -569,6 +569,10 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_UD, exc_invalid_op); · 568 unmodified lines
569569 DECLARE_IDTENTRY_RAW(X86_TRAP_BP, exc_int3);
570570 DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF, exc_page_fault);
571571
572+#if defined(CONFIG_IA32_EMULATION)
573+DECLARE_IDTENTRY_RAW(IA32_SYSCALL_VECTOR, int80_emulation);
574+#endif
575+
572576 #ifdef CONFIG_X86_MCE
573577 #ifdef CONFIG_X86_64
574578 DECLARE_IDTENTRY_MCE(X86_TRAP_MC, exc_machine_check);
arch/x86/include/asm/proto.h+0−4
@@ -32,10 +32,6 @@ void entry_SYSCALL_compat(void); · 31 unmodified lines
3232 void entry_SYSCALL_compat_safe_stack(void);
3333 void entry_SYSRETL_compat_unsafe_stack(void);
3434 void entry_SYSRETL_compat_end(void);
35−void entry_INT80_compat(void);
36−#ifdef CONFIG_XEN_PV
37−void xen_entry_INT80_compat(void);
38−#endif
3935 #else /* !CONFIG_IA32_EMULATION */
4036 #define entry_SYSCALL_compat NULL
4137 #define entry_SYSENTER_compat NULL
arch/x86/include/asm/xen/hypervisor.h+9−0
@@ -100,4 +100,13 @@ static inline void leave_lazy(enum xen_lazy_mode mode) · 99 unmodified lines
100100
101101 enum xen_lazy_mode xen_get_lazy_mode(void);
102102
103+#if defined(CONFIG_XEN_DOM0) && defined(CONFIG_ACPI)
104+void xen_sanitize_proc_cap_bits(uint32_t *buf);
105+#else
106+static inline void xen_sanitize_proc_cap_bits(uint32_t *buf)
107+{
108+ BUG();
109+}
110+#endif
111+
103112 #endif /* _ASM_X86_XEN_HYPERVISOR_H */
arch/x86/kernel/acpi/boot.c+15−19
@@ -63,6 +63,7 @@ int acpi_fix_pin2_polarity __initdata; · 62 unmodified lines
6363
6464 #ifdef CONFIG_X86_LOCAL_APIC
6565 static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
66+static bool has_lapic_cpus __initdata;
6667 static bool acpi_support_online_capable;
6768 #endif
6869
@@ -232,6 +233,14 @@ acpi_parse_x2apic(union acpi_subtable_headers *header, const unsigned long end) · 163 unmodified lines
232233 if (!acpi_is_processor_usable(processor->lapic_flags))
233234 return 0;
234235
236+ /*
237+ * According to https://uefi.org/specs/ACPI/6.5/05_ACPI_Software_Programming_Model.html#processor-local-x2apic-structure
238+ * when MADT provides both valid LAPIC and x2APIC entries, the APIC ID
239+ * in x2APIC must be equal or greater than 0xff.
240+ */
241+ if (has_lapic_cpus && apic_id < 0xff)
242+ return 0;
243+
235244 /*
236245 * We need to register disabled CPU as well to permit
237246 * counting disabled CPUs. This allows us to size
@@ -1114,10 +1123,7 @@ static int __init early_acpi_parse_madt_lapic_addr_ovr(void) · 876 unmodified lines
11141123
11151124 static int __init acpi_parse_madt_lapic_entries(void)
11161125 {
1117− int count;
1118− int x2count = 0;
1119− int ret;
1120− struct acpi_subtable_proc madt_proc[2];
1126+ int count, x2count = 0;
11211127
11221128 if (!boot_cpu_has(X86_FEATURE_APIC))
11231129 return -ENODEV;
@@ -1126,21 +1132,11 @@ static int __init acpi_parse_madt_lapic_entries(void) · 2 unmodified lines
11261132 acpi_parse_sapic, MAX_LOCAL_APIC);
11271133
11281134 if (!count) {
1129− memset(madt_proc, 0, sizeof(madt_proc));
1130− madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC;
1131− madt_proc[0].handler = acpi_parse_lapic;
1132− madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC;
1133− madt_proc[1].handler = acpi_parse_x2apic;
1134− ret = acpi_table_parse_entries_array(ACPI_SIG_MADT,
1135− sizeof(struct acpi_table_madt),
1136− madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC);
1137− if (ret < 0) {
1138− pr_err("Error parsing LAPIC/X2APIC entries\n");
1139− return ret;
1140− }
1141−
1142− count = madt_proc[0].count;
1143− x2count = madt_proc[1].count;
1135+ count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC,
1136+ acpi_parse_lapic, MAX_LOCAL_APIC);
1137+ has_lapic_cpus = count > 0;
1138+ x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC,
1139+ acpi_parse_x2apic, MAX_LOCAL_APIC);
11441140 }
11451141 if (!count && !x2count) {
11461142 pr_err("No LAPIC entries present\n");
arch/x86/kernel/cpu/amd.c+3−0
@@ -1320,6 +1320,9 @@ static void zenbleed_check_cpu(void *unused) · 1319 unmodified lines
13201320
13211321 void amd_check_microcode(void)
13221322 {
1323+ if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
1324+ return;
1325+
13231326 on_each_cpu(zenbleed_check_cpu, NULL, 1);
13241327 }
13251328
arch/x86/kernel/cpu/microcode/amd.c+11−28
@@ -104,8 +104,6 @@ struct cont_desc { · 103 unmodified lines
104104 size_t size;
105105 };
106106
107−static u32 ucode_new_rev;
108−
109107 /*
110108 * Microcode patch container file is prepended to the initrd in cpio
111109 * format. See Documentation/arch/x86/microcode.rst
@@ -442,12 +440,11 @@ static int __apply_microcode_amd(struct microcode_amd *mc) · 330 unmodified lines
442440 *
443441 * Returns true if container found (sets @desc), false otherwise.
444442 */
445−static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size)
443+static bool early_apply_microcode(u32 cpuid_1_eax, u32 old_rev, void *ucode, size_t size)
446444 {
447445 struct cont_desc desc = { 0 };
448446 struct microcode_amd *mc;
449447 bool ret = false;
450− u32 rev, dummy;
451448
452449 desc.cpuid_1_eax = cpuid_1_eax;
453450
@@ -457,22 +454,15 @@ static bool early_apply_microcode(u32 cpuid_1_eax, void *ucode, size_t size) · 3 unmodified lines
457454 if (!mc)
458455 return ret;
459456
460− native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
461−
462457 /*
463458 * Allow application of the same revision to pick up SMT-specific
464459 * changes even if the revision of the other SMT thread is already
465460 * up-to-date.
466461 */
467− if (rev > mc->hdr.patch_id)
462+ if (old_rev > mc->hdr.patch_id)
468463 return ret;
469464
470− if (!__apply_microcode_amd(mc)) {
471− ucode_new_rev = mc->hdr.patch_id;
472− ret = true;
473− }
474−
475− return ret;
465+ return !__apply_microcode_amd(mc);
476466 }
477467
478468 static bool get_builtin_microcode(struct cpio_data *cp, unsigned int family)
@@ -506,9 +496,12 @@ static void __init find_blobs_in_containers(unsigned int cpuid_1_eax, struct cpi · 27 unmodified lines
506496 *ret = cp;
507497 }
508498
509−void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax)
499+void __init load_ucode_amd_bsp(struct early_load_data *ed, unsigned int cpuid_1_eax)
510500 {
511501 struct cpio_data cp = { };
502+ u32 dummy;
503+
504+ native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->old_rev, dummy);
512505
513506 /* Needed in load_microcode_amd() */
514507 ucode_cpu_info[0].cpu_sig.sig = cpuid_1_eax;
@@ -517,7 +510,8 @@ void __init load_ucode_amd_bsp(unsigned int cpuid_1_eax) · 2 unmodified lines
517510 if (!(cp.data && cp.size))
518511 return;
519512
520− early_apply_microcode(cpuid_1_eax, cp.data, cp.size);
513+ if (early_apply_microcode(cpuid_1_eax, ed->old_rev, cp.data, cp.size))
514+ native_rdmsr(MSR_AMD64_PATCH_LEVEL, ed->new_rev, dummy);
521515 }
522516
523517 static enum ucode_state load_microcode_amd(u8 family, const u8 *data, size_t size);
@@ -625,10 +619,8 @@ void reload_ucode_amd(unsigned int cpu) · 101 unmodified lines
625619 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
626620
627621 if (rev < mc->hdr.patch_id) {
628− if (!__apply_microcode_amd(mc)) {
629− ucode_new_rev = mc->hdr.patch_id;
630− pr_info("reload patch_level=0x%08x\n", ucode_new_rev);
631− }
622+ if (!__apply_microcode_amd(mc))
623+ pr_info_once("reload revision: 0x%08x\n", mc->hdr.patch_id);
632624 }
633625 }
634626
@@ -649,8 +641,6 @@ static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig) · 14 unmodified lines
649641 if (p && (p->patch_id == csig->rev))
650642 uci->mc = p->data;
651643
652− pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
653−
654644 return 0;
655645 }
656646
@@ -691,8 +681,6 @@ static enum ucode_state apply_microcode_amd(int cpu) · 34 unmodified lines
691681 rev = mc_amd->hdr.patch_id;
692682 ret = UCODE_UPDATED;
693683
694− pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
695−
696684 out:
697685 uci->cpu_sig.rev = rev;
698686 c->microcode = rev;
@@ -935,11 +923,6 @@ struct microcode_ops * __init init_amd_microcode(void) · 236 unmodified lines
935923 pr_warn("AMD CPU family 0x%x not supported\n", c->x86);
936924 return NULL;
937925 }
938−
939− if (ucode_new_rev)
940− pr_info_once("microcode updated early to new patch_level=0x%08x\n",
941− ucode_new_rev);
942−
943926 return &microcode_amd_ops;
944927 }
945928
arch/x86/kernel/cpu/microcode/core.c+9−6
@@ -41,8 +41,6 @@ · 40 unmodified lines
4141
4242 #include "internal.h"
4343
44−#define DRIVER_VERSION "2.2"
45−
4644 static struct microcode_ops *microcode_ops;
4745 bool dis_ucode_ldr = true;
4846
@@ -77,6 +75,8 @@ static u32 final_levels[] = { · 28 unmodified lines
7775 0, /* T-101 terminator */
7876 };
7977
78+struct early_load_data early_data;
79+
8080 /*
8181 * Check the current patch level on this CPU.
8282 *
@@ -155,9 +155,9 @@ void __init load_ucode_bsp(void) · 72 unmodified lines
155155 return;
156156
157157 if (intel)
158− load_ucode_intel_bsp();
158+ load_ucode_intel_bsp(&early_data);
159159 else
160− load_ucode_amd_bsp(cpuid_1_eax);
160+ load_ucode_amd_bsp(&early_data, cpuid_1_eax);
161161 }
162162
163163 void load_ucode_ap(void)
@@ -828,6 +828,11 @@ static int __init microcode_init(void) · 664 unmodified lines
828828 if (!microcode_ops)
829829 return -ENODEV;
830830
831+ pr_info_once("Current revision: 0x%08x\n", (early_data.new_rev ?: early_data.old_rev));
832+
833+ if (early_data.new_rev)
834+ pr_info_once("Updated early from: 0x%08x\n", early_data.old_rev);
835+
831836 microcode_pdev = platform_device_register_simple("microcode", -1, NULL, 0);
832837 if (IS_ERR(microcode_pdev))
833838 return PTR_ERR(microcode_pdev);
@@ -846,8 +851,6 @@ static int __init microcode_init(void) · 12 unmodified lines
846851 cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "x86/microcode:online",
847852 mc_cpu_online, mc_cpu_down_prep);
848853
849− pr_info("Microcode Update Driver: v%s.", DRIVER_VERSION);
850−
851854 return 0;
852855
853856 out_pdev:
arch/x86/kernel/cpu/microcode/intel.c+7−10
@@ -339,16 +339,9 @@ static enum ucode_state __apply_microcode(struct ucode_cpu_info *uci, · 338 unmodified lines
339339 static enum ucode_state apply_microcode_early(struct ucode_cpu_info *uci)
340340 {
341341 struct microcode_intel *mc = uci->mc;
342− enum ucode_state ret;
343− u32 cur_rev, date;
342+ u32 cur_rev;
344343
345− ret = __apply_microcode(uci, mc, &cur_rev);
346− if (ret == UCODE_UPDATED) {
347− date = mc->hdr.date;
348− pr_info_once("updated early: 0x%x -> 0x%x, date = %04x-%02x-%02x\n",
349− cur_rev, mc->hdr.rev, date & 0xffff, date >> 24, (date >> 16) & 0xff);
350− }
351− return ret;
344+ return __apply_microcode(uci, mc, &cur_rev);
352345 }
353346
354347 static __init bool load_builtin_intel_microcode(struct cpio_data *cp)
@@ -413,13 +406,17 @@ static int __init save_builtin_microcode(void) · 58 unmodified lines
413406 early_initcall(save_builtin_microcode);
414407
415408 /* Load microcode on BSP from initrd or builtin blobs */
416−void __init load_ucode_intel_bsp(void)
409+void __init load_ucode_intel_bsp(struct early_load_data *ed)
417410 {
418411 struct ucode_cpu_info uci;
419412
413+ ed->old_rev = intel_get_microcode_revision();
414+
420415 uci.mc = get_microcode_blob(&uci, false);
421416 if (uci.mc && apply_microcode_early(&uci) == UCODE_UPDATED)
422417 ucode_patch_va = UCODE_BSP_LOADED;
418+
419+ ed->new_rev = uci.cpu_sig.rev;
423420 }
424421
425422 void load_ucode_intel_ap(void)
arch/x86/kernel/cpu/microcode/internal.h+10−4
@@ -37,6 +37,12 @@ struct microcode_ops { · 36 unmodified lines
3737 use_nmi : 1;
3838 };
3939
40+struct early_load_data {
41+ u32 old_rev;
42+ u32 new_rev;
43+};
44+
45+extern struct early_load_data early_data;
4046 extern struct ucode_cpu_info ucode_cpu_info[];
4147 struct cpio_data find_microcode_in_initrd(const char *path);
4248
@@ -92,14 +98,14 @@ extern bool dis_ucode_ldr; · 49 unmodified lines
9298 extern bool force_minrev;
9399
94100 #ifdef CONFIG_CPU_SUP_AMD
95−void load_ucode_amd_bsp(unsigned int family);
101+void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family);
96102 void load_ucode_amd_ap(unsigned int family);
97103 int save_microcode_in_initrd_amd(unsigned int family);
98104 void reload_ucode_amd(unsigned int cpu);
99105 struct microcode_ops *init_amd_microcode(void);
100106 void exit_amd_microcode(void);
101107 #else /* CONFIG_CPU_SUP_AMD */
102−static inline void load_ucode_amd_bsp(unsigned int family) { }
108+static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family) { }
103109 static inline void load_ucode_amd_ap(unsigned int family) { }
104110 static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
105111 static inline void reload_ucode_amd(unsigned int cpu) { }
@@ -108,12 +114,12 @@ static inline void exit_amd_microcode(void) { } · 2 unmodified lines
108114 #endif /* !CONFIG_CPU_SUP_AMD */
109115
110116 #ifdef CONFIG_CPU_SUP_INTEL
111−void load_ucode_intel_bsp(void);
117+void load_ucode_intel_bsp(struct early_load_data *ed);
112118 void load_ucode_intel_ap(void);
113119 void reload_ucode_intel(void);
114120 struct microcode_ops *init_intel_microcode(void);
115121 #else /* CONFIG_CPU_SUP_INTEL */
116−static inline void load_ucode_intel_bsp(void) { }
122+static inline void load_ucode_intel_bsp(struct early_load_data *ed) { }
117123 static inline void load_ucode_intel_ap(void) { }
118124 static inline void reload_ucode_intel(void) { }
119125 static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
arch/x86/kernel/cpu/mshyperv.c+4−1
@@ -262,11 +262,14 @@ static uint32_t __init ms_hyperv_platform(void) · 261 unmodified lines
262262 static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs)
263263 {
264264 static atomic_t nmi_cpu = ATOMIC_INIT(-1);
265+ unsigned int old_cpu, this_cpu;
265266
266267 if (!unknown_nmi_panic)
267268 return NMI_DONE;
268269
269− if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1)
270+ old_cpu = -1;
271+ this_cpu = raw_smp_processor_id();
272+ if (!atomic_try_cmpxchg(&nmi_cpu, &old_cpu, this_cpu))
270273 return NMI_HANDLED;
271274
272275 return NMI_DONE;
arch/x86/kernel/idt.c+1−1
@@ -121,7 +121,7 @@ static const __initconst struct idt_data def_idts[] = { · 120 unmodified lines
121121
122122 static const struct idt_data ia32_idt[] __initconst = {
123123 #if defined(CONFIG_IA32_EMULATION)
124− SYSG(IA32_SYSCALL_VECTOR, entry_INT80_compat),
124+ SYSG(IA32_SYSCALL_VECTOR, asm_int80_emulation),
125125 #elif defined(CONFIG_X86_32)
126126 SYSG(IA32_SYSCALL_VECTOR, entry_INT80_32),
127127 #endif
arch/x86/kernel/sev.c+7−4
@@ -1234,10 +1234,6 @@ void setup_ghcb(void) · 1233 unmodified lines
12341234 if (!cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
12351235 return;
12361236
1237− /* First make sure the hypervisor talks a supported protocol. */
1238− if (!sev_es_negotiate_protocol())
1239− sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
1240−
12411237 /*
12421238 * Check whether the runtime #VC exception handler is active. It uses
12431239 * the per-CPU GHCB page which is set up by sev_es_init_vc_handling().
@@ -1254,6 +1250,13 @@ void setup_ghcb(void) · 10 unmodified lines
12541250 return;
12551251 }
12561252
1253+ /*
1254+ * Make sure the hypervisor talks a supported protocol.
1255+ * This gets called only in the BSP boot phase.
1256+ */
1257+ if (!sev_es_negotiate_protocol())
1258+ sev_es_terminate(SEV_TERM_SET_GEN, GHCB_SEV_ES_GEN_REQ);
1259+
12571260 /*
12581261 * Clear the boot_ghcb. The first exception comes in before the bss
12591262 * section is cleared.
arch/x86/kernel/signal_64.c+3−3
@@ -175,9 +175,6 @@ int x64_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs) · 174 unmodified lines
175175 frame = get_sigframe(ksig, regs, sizeof(struct rt_sigframe), &fp);
176176 uc_flags = frame_uc_flags(regs);
177177
178− if (setup_signal_shadow_stack(ksig))
179− return -EFAULT;
180−
181178 if (!user_access_begin(frame, sizeof(*frame)))
182179 return -EFAULT;
183180
@@ -198,6 +195,9 @@ int x64_setup_rt_frame(struct ksignal *ksig, struct pt_regs *regs) · 14 unmodified lines
198195 return -EFAULT;
199196 }
200197
198+ if (setup_signal_shadow_stack(ksig))
199+ return -EFAULT;
200+
201201 /* Set up registers for signal handler */
202202 regs->di = ksig->sig;
203203 /* In case the signal handler was declared without prototypes */
arch/x86/kvm/debugfs.c+1−0
@@ -182,6 +182,7 @@ static int kvm_mmu_rmaps_stat_release(struct inode *inode, struct file *file) · 181 unmodified lines
182182 }
183183
184184 static const struct file_operations mmu_rmaps_stat_fops = {
185+ .owner = THIS_MODULE,
185186 .open = kvm_mmu_rmaps_stat_open,
186187 .read = seq_read,
187188 .llseek = seq_lseek,
arch/x86/kvm/svm/svm.c+5−3
@@ -1855,15 +1855,17 @@ void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) · 1854 unmodified lines
18551855 bool old_paging = is_paging(vcpu);
18561856
18571857 #ifdef CONFIG_X86_64
1858− if (vcpu->arch.efer & EFER_LME && !vcpu->arch.guest_state_protected) {
1858+ if (vcpu->arch.efer & EFER_LME) {
18591859 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
18601860 vcpu->arch.efer |= EFER_LMA;
1861− svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
1861+ if (!vcpu->arch.guest_state_protected)
1862+ svm->vmcb->save.efer |= EFER_LMA | EFER_LME;
18621863 }
18631864
18641865 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) {
18651866 vcpu->arch.efer &= ~EFER_LMA;
1866− svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
1867+ if (!vcpu->arch.guest_state_protected)
1868+ svm->vmcb->save.efer &= ~(EFER_LMA | EFER_LME);
18671869 }
18681870 }
18691871 #endif
arch/x86/kvm/x86.c+6−3
@@ -5518,8 +5518,8 @@ static void kvm_vcpu_ioctl_x86_get_xsave2(struct kvm_vcpu *vcpu, · 5517 unmodified lines
55185518 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
55195519 struct kvm_xsave *guest_xsave)
55205520 {
5521− return kvm_vcpu_ioctl_x86_get_xsave2(vcpu, (void *)guest_xsave->region,
5522− sizeof(guest_xsave->region));
5521+ kvm_vcpu_ioctl_x86_get_xsave2(vcpu, (void *)guest_xsave->region,
5522+ sizeof(guest_xsave->region));
55235523 }
55245524
55255525 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
@@ -13031,7 +13031,10 @@ bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) · 7505 unmodified lines
1303113031 if (vcpu->arch.guest_state_protected)
1303213032 return true;
1303313033
13034− return vcpu->arch.preempted_in_kernel;
13034+ if (vcpu != kvm_get_running_vcpu())
13035+ return vcpu->arch.preempted_in_kernel;
13036+
13037+ return static_call(kvm_x86_get_cpl)(vcpu) == 0;
1303513038 }
1303613039
1303713040 unsigned long kvm_arch_vcpu_get_ip(struct kvm_vcpu *vcpu)
arch/x86/mm/mem_encrypt_amd.c+11−0
@@ -32,6 +32,7 @@ · 31 unmodified lines
3232 #include <asm/msr.h>
3333 #include <asm/cmdline.h>
3434 #include <asm/sev.h>
35+#include <asm/ia32.h>
3536
3637 #include "mm_internal.h"
3738
@@ -481,6 +482,16 @@ void __init sme_early_init(void) · 443 unmodified lines
481482 */
482483 if (sev_status & MSR_AMD64_SEV_ES_ENABLED)
483484 x86_cpuinit.parallel_bringup = false;
485+
486+ /*
487+ * The VMM is capable of injecting interrupt 0x80 and triggering the
488+ * compatibility syscall path.
489+ *
490+ * By default, the 32-bit emulation is disabled in order to ensure
491+ * the safety of the VM.
492+ */
493+ if (sev_status & MSR_AMD64_SEV_ENABLED)
494+ ia32_disable();
484495 }
485496
486497 void __init mem_encrypt_free_decrypted_mem(void)
arch/x86/net/bpf_jit_comp.c+46−0
@@ -3025,3 +3025,49 @@ void arch_bpf_stack_walk(bool (*consume_fn)(void *cookie, u64 ip, u64 sp, u64 bp · 3024 unmodified lines
30253025 #endif
30263026 WARN(1, "verification of programs using bpf_throw should have failed\n");
30273027 }
3028+
3029+void bpf_arch_poke_desc_update(struct bpf_jit_poke_descriptor *poke,
3030+ struct bpf_prog *new, struct bpf_prog *old)
3031+{
3032+ u8 *old_addr, *new_addr, *old_bypass_addr;
3033+ int ret;
3034+
3035+ old_bypass_addr = old ? NULL : poke->bypass_addr;
3036+ old_addr = old ? (u8 *)old->bpf_func + poke->adj_off : NULL;
3037+ new_addr = new ? (u8 *)new->bpf_func + poke->adj_off : NULL;
3038+
3039+ /*
3040+ * On program loading or teardown, the program's kallsym entry
3041+ * might not be in place, so we use __bpf_arch_text_poke to skip
3042+ * the kallsyms check.
3043+ */
3044+ if (new) {
3045+ ret = __bpf_arch_text_poke(poke->tailcall_target,
3046+ BPF_MOD_JUMP,
3047+ old_addr, new_addr);
3048+ BUG_ON(ret < 0);
3049+ if (!old) {
3050+ ret = __bpf_arch_text_poke(poke->tailcall_bypass,
3051+ BPF_MOD_JUMP,
3052+ poke->bypass_addr,
3053+ NULL);
3054+ BUG_ON(ret < 0);
3055+ }
3056+ } else {
3057+ ret = __bpf_arch_text_poke(poke->tailcall_bypass,
3058+ BPF_MOD_JUMP,
3059+ old_bypass_addr,
3060+ poke->bypass_addr);
3061+ BUG_ON(ret < 0);
3062+ /* let other CPUs finish the execution of program
3063+ * so that it will not possible to expose them
3064+ * to invalid nop, stack unwind, nop state
3065+ */
3066+ if (!ret)
3067+ synchronize_rcu();
3068+ ret = __bpf_arch_text_poke(poke->tailcall_target,
3069+ BPF_MOD_JUMP,
3070+ old_addr, NULL);
3071+ BUG_ON(ret < 0);
3072+ }
3073+}
arch/x86/xen/enlighten.c+5−1
@@ -33,9 +33,12 @@ EXPORT_SYMBOL_GPL(hypercall_page); · 32 unmodified lines
3333 * and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
3434 * but during boot it is switched to point to xen_vcpu_info.
3535 * The pointer is used in xen_evtchn_do_upcall to acknowledge pending events.
36+ * Make sure that xen_vcpu_info doesn't cross a page boundary by making it
37+ * cache-line aligned (the struct is guaranteed to have a size of 64 bytes,
38+ * which matches the cache line size of 64-bit x86 processors).
3639 */
3740 DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
38−DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);
41+DEFINE_PER_CPU_ALIGNED(struct vcpu_info, xen_vcpu_info);
3942
4043 /* Linux <-> Xen vCPU id mapping */
4144 DEFINE_PER_CPU(uint32_t, xen_vcpu_id);
@@ -160,6 +163,7 @@ void xen_vcpu_setup(int cpu) · 118 unmodified lines
160163 int err;
161164 struct vcpu_info *vcpup;
162165
166+ BUILD_BUG_ON(sizeof(*vcpup) > SMP_CACHE_BYTES);
163167 BUG_ON(HYPERVISOR_shared_info == &xen_dummy_shared_info);
164168
165169 /*
arch/x86/xen/enlighten_pv.c+1−1
@@ -704,7 +704,7 @@ static struct trap_array_entry trap_array[] = { · 703 unmodified lines
704704 TRAP_ENTRY(exc_int3, false ),
705705 TRAP_ENTRY(exc_overflow, false ),
706706 #ifdef CONFIG_IA32_EMULATION
707− { entry_INT80_compat, xen_entry_INT80_compat, false },
707+ TRAP_ENTRY(int80_emulation, false ),
708708 #endif
709709 TRAP_ENTRY(exc_page_fault, false ),
710710 TRAP_ENTRY(exc_divide_error, false ),
arch/x86/xen/xen-asm.S+1−1
@@ -156,7 +156,7 @@ xen_pv_trap asm_xenpv_exc_machine_check · 155 unmodified lines
156156 #endif /* CONFIG_X86_MCE */
157157 xen_pv_trap asm_exc_simd_coprocessor_error
158158 #ifdef CONFIG_IA32_EMULATION
159−xen_pv_trap entry_INT80_compat
159+xen_pv_trap asm_int80_emulation
160160 #endif
161161 xen_pv_trap asm_exc_xen_unknown_trap
162162 xen_pv_trap asm_exc_xen_hypervisor_callback
arch/x86/xen/xen-ops.h+1−1
@@ -21,7 +21,7 @@ extern void *xen_initial_gdt; · 20 unmodified lines
2121 struct trap_info;
2222 void xen_copy_trap_info(struct trap_info *traps);
2323
24−DECLARE_PER_CPU(struct vcpu_info, xen_vcpu_info);
24+DECLARE_PER_CPU_ALIGNED(struct vcpu_info, xen_vcpu_info);
2525 DECLARE_PER_CPU(unsigned long, xen_cr3);
2626 DECLARE_PER_CPU(unsigned long, xen_current_cr3);
2727
block/bdev.c+2−0
@@ -425,6 +425,8 @@ void bdev_set_nr_sectors(struct block_device *bdev, sector_t sectors) · 424 unmodified lines
425425
426426 void bdev_add(struct block_device *bdev, dev_t dev)
427427 {
428+ if (bdev_stable_writes(bdev))
429+ mapping_set_stable_writes(bdev->bd_inode->i_mapping);
428430 bdev->bd_dev = dev;
429431 bdev->bd_inode->i_rdev = dev;
430432 bdev->bd_inode->i_ino = dev;
block/blk-cgroup.c+13−0
@@ -577,6 +577,7 @@ static void blkg_destroy_all(struct gendisk *disk) · 576 unmodified lines
577577 struct request_queue *q = disk->queue;
578578 struct blkcg_gq *blkg, *n;
579579 int count = BLKG_DESTROY_BATCH_SIZE;
580+ int i;
580581
581582 restart:
582583 spin_lock_irq(&q->queue_lock);
@@ -602,6 +603,18 @@ restart: · 19 unmodified lines
602603 }
603604 }
604605
606+ /*
607+ * Mark policy deactivated since policy offline has been done, and
608+ * the free is scheduled, so future blkcg_deactivate_policy() can
609+ * be bypassed
610+ */
611+ for (i = 0; i < BLKCG_MAX_POLS; i++) {
612+ struct blkcg_policy *pol = blkcg_policy[i];
613+
614+ if (pol)
615+ __clear_bit(pol->plid, q->blkcg_pols);
616+ }
617+
605618 q->root_blkg = NULL;
606619 spin_unlock_irq(&q->queue_lock);
607620 }
block/blk-cgroup.h+0−2
@@ -249,8 +249,6 @@ static inline struct blkcg_gq *blkg_lookup(struct blkcg *blkcg, · 248 unmodified lines
249249 {
250250 struct blkcg_gq *blkg;
251251
252− WARN_ON_ONCE(!rcu_read_lock_held());
253−
254252 if (blkcg == &blkcg_root)
255253 return q->root_blkg;
256254
block/blk-core.c+11−3
@@ -501,9 +501,17 @@ static inline void bio_check_ro(struct bio *bio) · 500 unmodified lines
501501 if (op_is_write(bio_op(bio)) && bdev_read_only(bio->bi_bdev)) {
502502 if (op_is_flush(bio->bi_opf) && !bio_sectors(bio))
503503 return;
504− pr_warn_ratelimited("Trying to write to read-only block-device %pg\n",
505− bio->bi_bdev);
506− /* Older lvm-tools actually trigger this */
504+
505+ if (bio->bi_bdev->bd_ro_warned)
506+ return;
507+
508+ bio->bi_bdev->bd_ro_warned = true;
509+ /*
510+ * Use ioctl to set underlying disk of raid/dm to read-only
511+ * will trigger this.
512+ */
513+ pr_warn("Trying to write to read-only block-device %pg\n",
514+ bio->bi_bdev);
507515 }
508516 }
509517
block/blk-mq.c+51−38
@@ -1512,14 +1512,26 @@ void blk_mq_delay_kick_requeue_list(struct request_queue *q, · 1511 unmodified lines
15121512 }
15131513 EXPORT_SYMBOL(blk_mq_delay_kick_requeue_list);
15141514
1515+static bool blk_is_flush_data_rq(struct request *rq)
1516+{
1517+ return (rq->rq_flags & RQF_FLUSH_SEQ) && !is_flush_rq(rq);
1518+}
1519+
15151520 static bool blk_mq_rq_inflight(struct request *rq, void *priv)
15161521 {
15171522 /*
15181523 * If we find a request that isn't idle we know the queue is busy
15191524 * as it's checked in the iter.
15201525 * Return false to stop the iteration.
1526+ *
1527+ * In case of queue quiesce, if one flush data request is completed,
1528+ * don't count it as inflight given the flush sequence is suspended,
1529+ * and the original flush data request is invisible to driver, just
1530+ * like other pending requests because of quiesce
15211531 */
1522− if (blk_mq_request_started(rq)) {
1532+ if (blk_mq_request_started(rq) && !(blk_queue_quiesced(rq->q) &&
1533+ blk_is_flush_data_rq(rq) &&
1534+ blk_mq_request_completed(rq))) {
15231535 bool *busy = priv;
15241536
15251537 *busy = true;
@@ -2858,11 +2870,8 @@ static struct request *blk_mq_get_new_requests(struct request_queue *q, · 1332 unmodified lines
28582870 };
28592871 struct request *rq;
28602872
2861− if (unlikely(bio_queue_enter(bio)))
2862− return NULL;
2863−
28642873 if (blk_mq_attempt_bio_merge(q, bio, nsegs))
2865− goto queue_exit;
2874+ return NULL;
28662875
28672876 rq_qos_throttle(q, bio);
28682877
@@ -2878,35 +2887,23 @@ static struct request *blk_mq_get_new_requests(struct request_queue *q, · 9 unmodified lines
28782887 rq_qos_cleanup(q, bio);
28792888 if (bio->bi_opf & REQ_NOWAIT)
28802889 bio_wouldblock_error(bio);
2881−queue_exit:
2882− blk_queue_exit(q);
28832890 return NULL;
28842891 }
28852892
2886−static inline struct request *blk_mq_get_cached_request(struct request_queue *q,
2887− struct blk_plug *plug, struct bio **bio, unsigned int nsegs)
2893+/* return true if this @rq can be used for @bio */
2894+static bool blk_mq_can_use_cached_rq(struct request *rq, struct blk_plug *plug,
2895+ struct bio *bio)
28882896 {
2889− struct request *rq;
2890− enum hctx_type type, hctx_type;
2897+ enum hctx_type type = blk_mq_get_hctx_type(bio->bi_opf);
2898+ enum hctx_type hctx_type = rq->mq_hctx->type;
28912899
2892− if (!plug)
2893− return NULL;
2894− rq = rq_list_peek(&plug->cached_rq);
2895− if (!rq || rq->q != q)
2896− return NULL;
2897−
2898− if (blk_mq_attempt_bio_merge(q, *bio, nsegs)) {
2899− *bio = NULL;
2900− return NULL;
2901− }
2900+ WARN_ON_ONCE(rq_list_peek(&plug->cached_rq) != rq);
29022901
2903− type = blk_mq_get_hctx_type((*bio)->bi_opf);
2904− hctx_type = rq->mq_hctx->type;
29052902 if (type != hctx_type &&
29062903 !(type == HCTX_TYPE_READ && hctx_type == HCTX_TYPE_DEFAULT))
2907− return NULL;
2908− if (op_is_flush(rq->cmd_flags) != op_is_flush((*bio)->bi_opf))
2909− return NULL;
2904+ return false;
2905+ if (op_is_flush(rq->cmd_flags) != op_is_flush(bio->bi_opf))
2906+ return false;
29102907
29112908 /*
29122909 * If any qos ->throttle() end up blocking, we will have flushed the
@@ -2914,12 +2911,12 @@ static inline struct request *blk_mq_get_cached_request(struct request_queue *q, · 1 unmodified line
29142911 * before we throttle.
29152912 */
29162913 plug->cached_rq = rq_list_next(rq);
2917− rq_qos_throttle(q, *bio);
2914+ rq_qos_throttle(rq->q, bio);
29182915
29192916 blk_mq_rq_time_init(rq, 0);
2920− rq->cmd_flags = (*bio)->bi_opf;
2917+ rq->cmd_flags = bio->bi_opf;
29212918 INIT_LIST_HEAD(&rq->queuelist);
2922− return rq;
2919+ return true;
29232920 }
29242921
29252922 static void bio_set_ioprio(struct bio *bio)
@@ -2949,7 +2946,7 @@ void blk_mq_submit_bio(struct bio *bio) · 23 unmodified lines
29492946 struct blk_plug *plug = blk_mq_plug(bio);
29502947 const int is_sync = op_is_sync(bio->bi_opf);
29512948 struct blk_mq_hw_ctx *hctx;
2952− struct request *rq;
2949+ struct request *rq = NULL;
29532950 unsigned int nr_segs = 1;
29542951 blk_status_t ret;
29552952
@@ -2960,20 +2957,36 @@ void blk_mq_submit_bio(struct bio *bio) · 4 unmodified lines
29602957 return;
29612958 }
29622959
2963− if (!bio_integrity_prep(bio))
2964− return;
2965−
29662960 bio_set_ioprio(bio);
29672961
2968− rq = blk_mq_get_cached_request(q, plug, &bio, nr_segs);
2969− if (!rq) {
2970− if (!bio)
2962+ if (plug) {
2963+ rq = rq_list_peek(&plug->cached_rq);
2964+ if (rq && rq->q != q)
2965+ rq = NULL;
2966+ }
2967+ if (rq) {
2968+ if (!bio_integrity_prep(bio))
29712969 return;
2972− rq = blk_mq_get_new_requests(q, plug, bio, nr_segs);
2973− if (unlikely(!rq))
2970+ if (blk_mq_attempt_bio_merge(q, bio, nr_segs))
29742971 return;
2972+ if (blk_mq_can_use_cached_rq(rq, plug, bio))
2973+ goto done;
2974+ percpu_ref_get(&q->q_usage_counter);
2975+ } else {
2976+ if (unlikely(bio_queue_enter(bio)))
2977+ return;
2978+ if (!bio_integrity_prep(bio))
2979+ goto fail;
29752980 }
29762981
2982+ rq = blk_mq_get_new_requests(q, plug, bio, nr_segs);
2983+ if (unlikely(!rq)) {
2984+fail:
2985+ blk_queue_exit(q);
2986+ return;
2987+ }
2988+
2989+done:
29772990 trace_block_getrq(bio);
29782991
29792992 rq_qos_track(q, rq, bio);
block/blk-pm.c+5−28
@@ -163,38 +163,15 @@ EXPORT_SYMBOL(blk_pre_runtime_resume); · 162 unmodified lines
163163 * @q: the queue of the device
164164 *
165165 * Description:
166− * For historical reasons, this routine merely calls blk_set_runtime_active()
167− * to do the real work of restarting the queue. It does this regardless of
168− * whether the device's runtime-resume succeeded; even if it failed the
166+ * Restart the queue of a runtime suspended device. It does this regardless
167+ * of whether the device's runtime-resume succeeded; even if it failed the
169168 * driver or error handler will need to communicate with the device.
170169 *
171170 * This function should be called near the end of the device's
172− * runtime_resume callback.
171+ * runtime_resume callback to correct queue runtime PM status and re-enable
172+ * peeking requests from the queue.
173173 */
174174 void blk_post_runtime_resume(struct request_queue *q)
175−{
176− blk_set_runtime_active(q);
177−}
178−EXPORT_SYMBOL(blk_post_runtime_resume);
179−
180−/**
181− * blk_set_runtime_active - Force runtime status of the queue to be active
182− * @q: the queue of the device
183− *
184− * If the device is left runtime suspended during system suspend the resume
185− * hook typically resumes the device and corrects runtime status
186− * accordingly. However, that does not affect the queue runtime PM status
187− * which is still "suspended". This prevents processing requests from the
188− * queue.
189− *
190− * This function can be used in driver's resume hook to correct queue
191− * runtime PM status and re-enable peeking requests from the queue. It
192− * should be called before first request is added to the queue.
193− *
194− * This function is also called by blk_post_runtime_resume() for
195− * runtime resumes. It does everything necessary to restart the queue.
196− */
197−void blk_set_runtime_active(struct request_queue *q)
198175 {
199176 int old_status;
200177
@@ -211,4 +188,4 @@ void blk_set_runtime_active(struct request_queue *q) · 10 unmodified lines
211188 if (old_status != RPM_ACTIVE)
212189 blk_clear_pm_only(q);
213190 }
214−EXPORT_SYMBOL(blk_set_runtime_active);
191+EXPORT_SYMBOL(blk_post_runtime_resume);
block/blk-sysfs.c+2−0
@@ -615,6 +615,7 @@ static ssize_t queue_wb_lat_store(struct request_queue *q, const char *page, · 614 unmodified lines
615615 QUEUE_RW_ENTRY(queue_wb_lat, "wbt_lat_usec");
616616 #endif
617617
618+/* Common attributes for bio-based and request-based queues. */
618619 static struct attribute *queue_attrs[] = {
619620 &queue_ra_entry.attr,
620621 &queue_max_hw_sectors_entry.attr,
@@ -659,6 +660,7 @@ static struct attribute *queue_attrs[] = { · 38 unmodified lines
659660 NULL,
660661 };
661662
663+/* Request-based queue attributes that are not relevant for bio-based queues. */
662664 static struct attribute *blk_mq_queue_attrs[] = {
663665 &queue_requests_entry.attr,
664666 &elv_iosched_entry.attr,
block/blk-throttle.c+2−0
@@ -1320,6 +1320,7 @@ static void tg_conf_updated(struct throtl_grp *tg, bool global) · 1319 unmodified lines
13201320 tg_bps_limit(tg, READ), tg_bps_limit(tg, WRITE),
13211321 tg_iops_limit(tg, READ), tg_iops_limit(tg, WRITE));
13221322
1323+ rcu_read_lock();
13231324 /*
13241325 * Update has_rules[] flags for the updated tg's subtree. A tg is
13251326 * considered to have rules if either the tg itself or any of its
@@ -1347,6 +1348,7 @@ static void tg_conf_updated(struct throtl_grp *tg, bool global) · 21 unmodified lines
13471348 this_tg->latency_target = max(this_tg->latency_target,
13481349 parent_tg->latency_target);
13491350 }
1351+ rcu_read_unlock();
13501352
13511353 /*
13521354 * We're already holding queue_lock and know @tg is valid. Let's
drivers/accel/ivpu/ivpu_hw_37xx.c+22−24
@@ -502,6 +502,16 @@ static int ivpu_boot_pwr_domain_enable(struct ivpu_device *vdev) · 501 unmodified lines
502502 return ret;
503503 }
504504
505+static int ivpu_boot_pwr_domain_disable(struct ivpu_device *vdev)
506+{
507+ ivpu_boot_dpu_active_drive(vdev, false);
508+ ivpu_boot_pwr_island_isolation_drive(vdev, true);
509+ ivpu_boot_pwr_island_trickle_drive(vdev, false);
510+ ivpu_boot_pwr_island_drive(vdev, false);
511+
512+ return ivpu_boot_wait_for_pwr_island_status(vdev, 0x0);
513+}
514+
505515 static void ivpu_boot_no_snoop_enable(struct ivpu_device *vdev)
506516 {
507517 u32 val = REGV_RD32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES);
@@ -600,25 +610,17 @@ static int ivpu_hw_37xx_info_init(struct ivpu_device *vdev) · 92 unmodified lines
600610
601611 static int ivpu_hw_37xx_reset(struct ivpu_device *vdev)
602612 {
603− int ret;
604− u32 val;
605−
606− if (IVPU_WA(punit_disabled))
607− return 0;
613+ int ret = 0;
608614
609− ret = REGB_POLL_FLD(VPU_37XX_BUTTRESS_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);
610− if (ret) {
611− ivpu_err(vdev, "Timed out waiting for TRIGGER bit\n");
612− return ret;
615+ if (ivpu_boot_pwr_domain_disable(vdev)) {
616+ ivpu_err(vdev, "Failed to disable power domain\n");
617+ ret = -EIO;
613618 }
614619
615− val = REGB_RD32(VPU_37XX_BUTTRESS_VPU_IP_RESET);
616− val = REG_SET_FLD(VPU_37XX_BUTTRESS_VPU_IP_RESET, TRIGGER, val);
617− REGB_WR32(VPU_37XX_BUTTRESS_VPU_IP_RESET, val);
618−
619− ret = REGB_POLL_FLD(VPU_37XX_BUTTRESS_VPU_IP_RESET, TRIGGER, 0, TIMEOUT_US);
620− if (ret)
621− ivpu_err(vdev, "Timed out waiting for RESET completion\n");
620+ if (ivpu_pll_disable(vdev)) {
621+ ivpu_err(vdev, "Failed to disable PLL\n");
622+ ret = -EIO;
623+ }
622624
623625 return ret;
624626 }
@@ -651,10 +653,6 @@ static int ivpu_hw_37xx_power_up(struct ivpu_device *vdev) · 26 unmodified lines
651653 {
652654 int ret;
653655
654− ret = ivpu_hw_37xx_reset(vdev);
655− if (ret)
656− ivpu_warn(vdev, "Failed to reset HW: %d\n", ret);
657−
658656 ret = ivpu_hw_37xx_d0i3_disable(vdev);
659657 if (ret)
660658 ivpu_warn(vdev, "Failed to disable D0I3: %d\n", ret);
@@ -722,11 +720,11 @@ static int ivpu_hw_37xx_power_down(struct ivpu_device *vdev) · 61 unmodified lines
722720 {
723721 int ret = 0;
724722
725− if (!ivpu_hw_37xx_is_idle(vdev) && ivpu_hw_37xx_reset(vdev))
726− ivpu_err(vdev, "Failed to reset the VPU\n");
723+ if (!ivpu_hw_37xx_is_idle(vdev))
724+ ivpu_warn(vdev, "VPU not idle during power down\n");
727725
728− if (ivpu_pll_disable(vdev)) {
729− ivpu_err(vdev, "Failed to disable PLL\n");
726+ if (ivpu_hw_37xx_reset(vdev)) {
727+ ivpu_err(vdev, "Failed to reset VPU\n");
730728 ret = -EIO;
731729 }
732730
drivers/accel/ivpu/ivpu_pm.c+0−3
@@ -250,9 +250,6 @@ int ivpu_rpm_get_if_active(struct ivpu_device *vdev) · 249 unmodified lines
250250 {
251251 int ret;
252252
253− ivpu_dbg(vdev, RPM, "rpm_get_if_active count %d\n",
254− atomic_read(&vdev->drm.dev->power.usage_count));
255−
256253 ret = pm_runtime_get_if_active(vdev->drm.dev, false);
257254 drm_WARN_ON(&vdev->drm, ret < 0);
258255
drivers/acpi/acpi_video.c+6−10
@@ -253,8 +253,7 @@ static const struct backlight_ops acpi_backlight_ops = { · 252 unmodified lines
253253 static int video_get_max_state(struct thermal_cooling_device *cooling_dev,
254254 unsigned long *state)
255255 {
256− struct acpi_device *device = cooling_dev->devdata;
257− struct acpi_video_device *video = acpi_driver_data(device);
256+ struct acpi_video_device *video = cooling_dev->devdata;
258257
259258 *state = video->brightness->count - ACPI_VIDEO_FIRST_LEVEL - 1;
260259 return 0;
@@ -263,8 +262,7 @@ static int video_get_max_state(struct thermal_cooling_device *cooling_dev, · 2 unmodified lines
263262 static int video_get_cur_state(struct thermal_cooling_device *cooling_dev,
264263 unsigned long *state)
265264 {
266− struct acpi_device *device = cooling_dev->devdata;
267− struct acpi_video_device *video = acpi_driver_data(device);
265+ struct acpi_video_device *video = cooling_dev->devdata;
268266 unsigned long long level;
269267 int offset;
270268
@@ -283,8 +281,7 @@ static int video_get_cur_state(struct thermal_cooling_device *cooling_dev, · 12 unmodified lines
283281 static int
284282 video_set_cur_state(struct thermal_cooling_device *cooling_dev, unsigned long state)
285283 {
286− struct acpi_device *device = cooling_dev->devdata;
287− struct acpi_video_device *video = acpi_driver_data(device);
284+ struct acpi_video_device *video = cooling_dev->devdata;
288285 int level;
289286
290287 if (state >= video->brightness->count - ACPI_VIDEO_FIRST_LEVEL)
@@ -1125,7 +1122,6 @@ static int acpi_video_bus_get_one_device(struct acpi_device *device, void *arg) · 834 unmodified lines
11251122
11261123 strcpy(acpi_device_name(device), ACPI_VIDEO_DEVICE_NAME);
11271124 strcpy(acpi_device_class(device), ACPI_VIDEO_CLASS);
1128− device->driver_data = data;
11291125
11301126 data->device_id = device_id;
11311127 data->video = video;
@@ -1747,8 +1743,8 @@ static void acpi_video_dev_register_backlight(struct acpi_video_device *device) · 615 unmodified lines
17471743 device->backlight->props.brightness =
17481744 acpi_video_get_brightness(device->backlight);
17491745
1750− device->cooling_dev = thermal_cooling_device_register("LCD",
1751− device->dev, &video_cooling_ops);
1746+ device->cooling_dev = thermal_cooling_device_register("LCD", device,
1747+ &video_cooling_ops);
17521748 if (IS_ERR(device->cooling_dev)) {
17531749 /*
17541750 * Set cooling_dev to NULL so we don't crash trying to free it.
@@ -2031,7 +2027,7 @@ static int acpi_video_bus_add(struct acpi_device *device) · 276 unmodified lines
20312027 * HP ZBook Fury 16 G10 requires ACPI video's child devices have _PS0
20322028 * evaluated to have functional panel brightness control.
20332029 */
2034− acpi_device_fix_up_power_extended(device);
2030+ acpi_device_fix_up_power_children(device);
20352031
20362032 pr_info("%s [%s] (multi-head: %s rom: %s post: %s)\n",
20372033 ACPI_VIDEO_DEVICE_NAME, acpi_device_bid(device),
drivers/acpi/device_pm.c+13−0
@@ -397,6 +397,19 @@ void acpi_device_fix_up_power_extended(struct acpi_device *adev) · 396 unmodified lines
397397 }
398398 EXPORT_SYMBOL_GPL(acpi_device_fix_up_power_extended);
399399
400+/**
401+ * acpi_device_fix_up_power_children - Force a device's children into D0.
402+ * @adev: Parent device object whose children's power state is to be fixed up.
403+ *
404+ * Call acpi_device_fix_up_power() for @adev's children so long as they
405+ * are reported as present and enabled.
406+ */
407+void acpi_device_fix_up_power_children(struct acpi_device *adev)
408+{
409+ acpi_dev_for_each_child(adev, fix_up_power_if_applicable, NULL);
410+}
411+EXPORT_SYMBOL_GPL(acpi_device_fix_up_power_children);
412+
400413 int acpi_device_update_power(struct acpi_device *device, int *state_p)
401414 {
402415 int state;
drivers/acpi/processor_idle.c+1−1
@@ -592,7 +592,7 @@ static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) · 591 unmodified lines
592592 while (1) {
593593
594594 if (cx->entry_method == ACPI_CSTATE_HALT)
595− safe_halt();
595+ raw_safe_halt();
596596 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
597597 io_idle(cx->address);
598598 } else
drivers/acpi/resource.c+7−0
@@ -447,6 +447,13 @@ static const struct dmi_system_id irq1_level_low_skip_override[] = { · 446 unmodified lines
447447 DMI_MATCH(DMI_BOARD_NAME, "B1402CBA"),
448448 },
449449 },
450+ {
451+ /* Asus ExpertBook B1402CVA */
452+ .matches = {
453+ DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
454+ DMI_MATCH(DMI_BOARD_NAME, "B1402CVA"),
455+ },
456+ },
450457 {
451458 /* Asus ExpertBook B1502CBA */
452459 .matches = {
drivers/acpi/scan.c+6−1
@@ -1568,17 +1568,22 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, · 1567 unmodified lines
15681568 int err;
15691569 const struct iommu_ops *ops;
15701570
1571+ /* Serialise to make dev->iommu stable under our potential fwspec */
1572+ mutex_lock(&iommu_probe_device_lock);
15711573 /*
15721574 * If we already translated the fwspec there is nothing left to do,
15731575 * return the iommu_ops.
15741576 */
15751577 ops = acpi_iommu_fwspec_ops(dev);
1576− if (ops)
1578+ if (ops) {
1579+ mutex_unlock(&iommu_probe_device_lock);
15771580 return ops;
1581+ }
15781582
15791583 err = iort_iommu_configure_id(dev, id_in);
15801584 if (err && err != -EPROBE_DEFER)
15811585 err = viot_iommu_configure(dev);
1586+ mutex_unlock(&iommu_probe_device_lock);
15821587
15831588 /*
15841589 * If we have reason to believe the IOMMU driver missed the initial
drivers/acpi/utils.c+1−1
@@ -399,13 +399,13 @@ acpi_evaluate_reference(acpi_handle handle, · 398 unmodified lines
399399 acpi_handle_debug(list->handles[i], "Found in reference list\n");
400400 }
401401
402−end:
403402 if (ACPI_FAILURE(status)) {
404403 list->count = 0;
405404 kfree(list->handles);
406405 list->handles = NULL;
407406 }
408407
408+end:
409409 kfree(buffer.pointer);
410410
411411 return status;
drivers/ata/libata-scsi.c+7−2
@@ -1055,9 +1055,14 @@ int ata_scsi_dev_config(struct scsi_device *sdev, struct ata_device *dev) · 1054 unmodified lines
10551055 * Ask the sd driver to issue START STOP UNIT on runtime suspend
10561056 * and resume and shutdown only. For system level suspend/resume,
10571057 * devices power state is handled directly by libata EH.
1058+ * Given that disks are always spun up on system resume, also
1059+ * make sure that the sd driver forces runtime suspended disks
1060+ * to be resumed to correctly reflect the power state of the
1061+ * device.
10581062 */
1059− sdev->manage_runtime_start_stop = true;
1060− sdev->manage_shutdown = true;
1063+ sdev->manage_runtime_start_stop = 1;
1064+ sdev->manage_shutdown = 1;
1065+ sdev->force_runtime_start_on_system_start = 1;
10611066 }
10621067
10631068 /*
drivers/ata/pata_isapnp.c+3−0
@@ -82,6 +82,9 @@ static int isapnp_init_one(struct pnp_dev *idev, const struct pnp_device_id *dev · 81 unmodified lines
8282 if (pnp_port_valid(idev, 1)) {
8383 ctl_addr = devm_ioport_map(&idev->dev,
8484 pnp_port_start(idev, 1), 1);
85+ if (!ctl_addr)
86+ return -ENOMEM;
87+
8588 ap->ioaddr.altstatus_addr = ctl_addr;
8689 ap->ioaddr.ctl_addr = ctl_addr;
8790 ap->ops = &isapnp_port_ops;
drivers/base/cpu.c+3−3
@@ -144,7 +144,7 @@ static DEVICE_ATTR(release, S_IWUSR, NULL, cpu_release_store); · 143 unmodified lines
144144 #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
145145 #endif /* CONFIG_HOTPLUG_CPU */
146146
147−#ifdef CONFIG_KEXEC
147+#ifdef CONFIG_KEXEC_CORE
148148 #include <linux/kexec.h>
149149
150150 static ssize_t crash_notes_show(struct device *dev,
@@ -189,14 +189,14 @@ static const struct attribute_group crash_note_cpu_attr_group = { · 38 unmodified lines
189189 #endif
190190
191191 static const struct attribute_group *common_cpu_attr_groups[] = {
192−#ifdef CONFIG_KEXEC
192+#ifdef CONFIG_KEXEC_CORE
193193 &crash_note_cpu_attr_group,
194194 #endif
195195 NULL
196196 };
197197
198198 static const struct attribute_group *hotplugable_cpu_attr_groups[] = {
199−#ifdef CONFIG_KEXEC
199+#ifdef CONFIG_KEXEC_CORE
200200 &crash_note_cpu_attr_group,
201201 #endif
202202 NULL
drivers/base/devcoredump.c+3−0
@@ -362,6 +362,7 @@ void dev_coredumpm(struct device *dev, struct module *owner, · 361 unmodified lines
362362 devcd->devcd_dev.class = &devcd_class;
363363
364364 mutex_lock(&devcd->mutex);
365+ dev_set_uevent_suppress(&devcd->devcd_dev, true);
365366 if (device_add(&devcd->devcd_dev))
366367 goto put_device;
367368
@@ -376,6 +377,8 @@ void dev_coredumpm(struct device *dev, struct module *owner, · 8 unmodified lines
376377 "devcoredump"))
377378 dev_warn(dev, "devcoredump create_link failed\n");
378379
380+ dev_set_uevent_suppress(&devcd->devcd_dev, false);
381+ kobject_uevent(&devcd->devcd_dev.kobj, KOBJ_ADD);
379382 INIT_DELAYED_WORK(&devcd->del_wk, devcd_del);
380383 schedule_delayed_work(&devcd->del_wk, DEVCD_TIMEOUT);
381384 mutex_unlock(&devcd->mutex);
drivers/base/memory.c+15−3
@@ -180,6 +180,9 @@ static inline unsigned long memblk_nr_poison(struct memory_block *mem) · 179 unmodified lines
180180 }
181181 #endif
182182
183+/*
184+ * Must acquire mem_hotplug_lock in write mode.
185+ */
183186 static int memory_block_online(struct memory_block *mem)
184187 {
185188 unsigned long start_pfn = section_nr_to_pfn(mem->start_section_nr);
@@ -204,10 +207,11 @@ static int memory_block_online(struct memory_block *mem) · 18 unmodified lines
204207 if (mem->altmap)
205208 nr_vmemmap_pages = mem->altmap->free;
206209
210+ mem_hotplug_begin();
207211 if (nr_vmemmap_pages) {
208212 ret = mhp_init_memmap_on_memory(start_pfn, nr_vmemmap_pages, zone);
209213 if (ret)
210− return ret;
214+ goto out;
211215 }
212216
213217 ret = online_pages(start_pfn + nr_vmemmap_pages,
@@ -215,7 +219,7 @@ static int memory_block_online(struct memory_block *mem) · 1 unmodified line
215219 if (ret) {
216220 if (nr_vmemmap_pages)
217221 mhp_deinit_memmap_on_memory(start_pfn, nr_vmemmap_pages);
218− return ret;
222+ goto out;
219223 }
220224
221225 /*
@@ -227,9 +231,14 @@ static int memory_block_online(struct memory_block *mem) · 5 unmodified lines
227231 nr_vmemmap_pages);
228232
229233 mem->zone = zone;
234+out:
235+ mem_hotplug_done();
230236 return ret;
231237 }
232238
239+/*
240+ * Must acquire mem_hotplug_lock in write mode.
241+ */
233242 static int memory_block_offline(struct memory_block *mem)
234243 {
235244 unsigned long start_pfn = section_nr_to_pfn(mem->start_section_nr);
@@ -247,6 +256,7 @@ static int memory_block_offline(struct memory_block *mem) · 11 unmodified lines
247256 if (mem->altmap)
248257 nr_vmemmap_pages = mem->altmap->free;
249258
259+ mem_hotplug_begin();
250260 if (nr_vmemmap_pages)
251261 adjust_present_page_count(pfn_to_page(start_pfn), mem->group,
252262 -nr_vmemmap_pages);
@@ -258,13 +268,15 @@ static int memory_block_offline(struct memory_block *mem) · 5 unmodified lines
258268 if (nr_vmemmap_pages)
259269 adjust_present_page_count(pfn_to_page(start_pfn),
260270 mem->group, nr_vmemmap_pages);
261− return ret;
271+ goto out;
262272 }
263273
264274 if (nr_vmemmap_pages)
265275 mhp_deinit_memmap_on_memory(start_pfn, nr_vmemmap_pages);
266276
267277 mem->zone = NULL;
278+out:
279+ mem_hotplug_done();
268280 return ret;
269281 }
270282
drivers/base/regmap/regcache.c+1−2
@@ -410,8 +410,7 @@ out: · 409 unmodified lines
410410 rb_entry(node, struct regmap_range_node, node);
411411
412412 /* If there's nothing in the cache there's nothing to sync */
413− ret = regcache_read(map, this->selector_reg, &i);
414− if (ret != 0)
413+ if (regcache_read(map, this->selector_reg, &i) != 0)
415414 continue;
416415
417416 ret = _regmap_write(map, this->selector_reg, i);
drivers/block/nbd.c+75−42
@@ -67,6 +67,7 @@ struct nbd_sock { · 66 unmodified lines
6767 struct recv_thread_args {
6868 struct work_struct work;
6969 struct nbd_device *nbd;
70+ struct nbd_sock *nsock;
7071 int index;
7172 };
7273
@@ -395,6 +396,22 @@ static u32 req_to_nbd_cmd_type(struct request *req) · 322 unmodified lines
395396 }
396397 }
397398
399+static struct nbd_config *nbd_get_config_unlocked(struct nbd_device *nbd)
400+{
401+ if (refcount_inc_not_zero(&nbd->config_refs)) {
402+ /*
403+ * Add smp_mb__after_atomic to ensure that reading nbd->config_refs
404+ * and reading nbd->config is ordered. The pair is the barrier in
405+ * nbd_alloc_and_init_config(), avoid nbd->config_refs is set
406+ * before nbd->config.
407+ */
408+ smp_mb__after_atomic();
409+ return nbd->config;
410+ }
411+
412+ return NULL;
413+}
414+
398415 static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req)
399416 {
400417 struct nbd_cmd *cmd = blk_mq_rq_to_pdu(req);
@@ -409,13 +426,13 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req) · 8 unmodified lines
409426 return BLK_EH_DONE;
410427 }
411428
412− if (!refcount_inc_not_zero(&nbd->config_refs)) {
429+ config = nbd_get_config_unlocked(nbd);
430+ if (!config) {
413431 cmd->status = BLK_STS_TIMEOUT;
414432 __clear_bit(NBD_CMD_INFLIGHT, &cmd->flags);
415433 mutex_unlock(&cmd->lock);
416434 goto done;
417435 }
418− config = nbd->config;
419436
420437 if (config->num_connections > 1 ||
421438 (config->num_connections == 1 && nbd->tag_set.timeout)) {
@@ -489,15 +506,9 @@ done: · 67 unmodified lines
489506 return BLK_EH_DONE;
490507 }
491508
492−/*
493− * Send or receive packet. Return a positive value on success and
494− * negtive value on failue, and never return 0.
495− */
496−static int sock_xmit(struct nbd_device *nbd, int index, int send,
497− struct iov_iter *iter, int msg_flags, int *sent)
509+static int __sock_xmit(struct nbd_device *nbd, struct socket *sock, int send,
510+ struct iov_iter *iter, int msg_flags, int *sent)
498511 {
499− struct nbd_config *config = nbd->config;
500− struct socket *sock = config->socks[index]->sock;
501512 int result;
502513 struct msghdr msg;
503514 unsigned int noreclaim_flag;
@@ -540,6 +551,19 @@ static int sock_xmit(struct nbd_device *nbd, int index, int send, · 36 unmodified lines
540551 return result;
541552 }
542553
554+/*
555+ * Send or receive packet. Return a positive value on success and
556+ * negtive value on failure, and never return 0.
557+ */
558+static int sock_xmit(struct nbd_device *nbd, int index, int send,
559+ struct iov_iter *iter, int msg_flags, int *sent)
560+{
561+ struct nbd_config *config = nbd->config;
562+ struct socket *sock = config->socks[index]->sock;
563+
564+ return __sock_xmit(nbd, sock, send, iter, msg_flags, sent);
565+}
566+
543567 /*
544568 * Different settings for sk->sk_sndtimeo can result in different return values
545569 * if there is a signal pending when we enter sendmsg, because reasons?
@@ -696,7 +720,7 @@ out: · 150 unmodified lines
696720 return 0;
697721 }
698722
699−static int nbd_read_reply(struct nbd_device *nbd, int index,
723+static int nbd_read_reply(struct nbd_device *nbd, struct socket *sock,
700724 struct nbd_reply *reply)
701725 {
702726 struct kvec iov = {.iov_base = reply, .iov_len = sizeof(*reply)};
@@ -705,7 +729,7 @@ static int nbd_read_reply(struct nbd_device *nbd, int index, · 2 unmodified lines
705729
706730 reply->magic = 0;
707731 iov_iter_kvec(&to, ITER_DEST, &iov, 1, sizeof(*reply));
708− result = sock_xmit(nbd, index, 0, &to, MSG_WAITALL, NULL);
732+ result = __sock_xmit(nbd, sock, 0, &to, MSG_WAITALL, NULL);
709733 if (result < 0) {
710734 if (!nbd_disconnected(nbd->config))
711735 dev_err(disk_to_dev(nbd->disk),
@@ -829,14 +853,14 @@ static void recv_work(struct work_struct *work) · 117 unmodified lines
829853 struct nbd_device *nbd = args->nbd;
830854 struct nbd_config *config = nbd->config;
831855 struct request_queue *q = nbd->disk->queue;
832− struct nbd_sock *nsock;
856+ struct nbd_sock *nsock = args->nsock;
833857 struct nbd_cmd *cmd;
834858 struct request *rq;
835859
836860 while (1) {
837861 struct nbd_reply reply;
838862
839− if (nbd_read_reply(nbd, args->index, &reply))
863+ if (nbd_read_reply(nbd, nsock->sock, &reply))
840864 break;
841865
842866 /*
@@ -871,7 +895,6 @@ static void recv_work(struct work_struct *work) · 28 unmodified lines
871895 percpu_ref_put(&q->q_usage_counter);
872896 }
873897
874− nsock = config->socks[args->index];
875898 mutex_lock(&nsock->tx_lock);
876899 nbd_mark_nsock_dead(nbd, nsock, 1);
877900 mutex_unlock(&nsock->tx_lock);
@@ -977,12 +1000,12 @@ static int nbd_handle_cmd(struct nbd_cmd *cmd, int index) · 99 unmodified lines
9771000 struct nbd_sock *nsock;
9781001 int ret;
9791002
980− if (!refcount_inc_not_zero(&nbd->config_refs)) {
1003+ config = nbd_get_config_unlocked(nbd);
1004+ if (!config) {
9811005 dev_err_ratelimited(disk_to_dev(nbd->disk),
9821006 "Socks array is empty\n");
9831007 return -EINVAL;
9841008 }
985− config = nbd->config;
9861009
9871010 if (index >= config->num_connections) {
9881011 dev_err_ratelimited(disk_to_dev(nbd->disk),
@@ -1215,6 +1238,7 @@ static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg) · 226 unmodified lines
12151238 INIT_WORK(&args->work, recv_work);
12161239 args->index = i;
12171240 args->nbd = nbd;
1241+ args->nsock = nsock;
12181242 nsock->cookie++;
12191243 mutex_unlock(&nsock->tx_lock);
12201244 sockfd_put(old);
@@ -1397,6 +1421,7 @@ static int nbd_start_device(struct nbd_device *nbd) · 176 unmodified lines
13971421 refcount_inc(&nbd->config_refs);
13981422 INIT_WORK(&args->work, recv_work);
13991423 args->nbd = nbd;
1424+ args->nsock = config->socks[i];
14001425 args->index = i;
14011426 queue_work(nbd->recv_workq, &args->work);
14021427 }
@@ -1530,17 +1555,20 @@ static int nbd_ioctl(struct block_device *bdev, blk_mode_t mode, · 127 unmodified lines
15301555 return error;
15311556 }
15321557
1533−static struct nbd_config *nbd_alloc_config(void)
1558+static int nbd_alloc_and_init_config(struct nbd_device *nbd)
15341559 {
15351560 struct nbd_config *config;
15361561
1562+ if (WARN_ON(nbd->config))
1563+ return -EINVAL;
1564+
15371565 if (!try_module_get(THIS_MODULE))
1538− return ERR_PTR(-ENODEV);
1566+ return -ENODEV;
15391567
15401568 config = kzalloc(sizeof(struct nbd_config), GFP_NOFS);
15411569 if (!config) {
15421570 module_put(THIS_MODULE);
1543− return ERR_PTR(-ENOMEM);
1571+ return -ENOMEM;
15441572 }
15451573
15461574 atomic_set(&config->recv_threads, 0);
@@ -1548,12 +1576,24 @@ static struct nbd_config *nbd_alloc_config(void) · 1 unmodified line
15481576 init_waitqueue_head(&config->conn_wait);
15491577 config->blksize_bits = NBD_DEF_BLKSIZE_BITS;
15501578 atomic_set(&config->live_connections, 0);
1551− return config;
1579+
1580+ nbd->config = config;
1581+ /*
1582+ * Order refcount_set(&nbd->config_refs, 1) and nbd->config assignment,
1583+ * its pair is the barrier in nbd_get_config_unlocked().
1584+ * So nbd_get_config_unlocked() won't see nbd->config as null after
1585+ * refcount_inc_not_zero() succeed.
1586+ */
1587+ smp_mb__before_atomic();
1588+ refcount_set(&nbd->config_refs, 1);
1589+
1590+ return 0;
15521591 }
15531592
15541593 static int nbd_open(struct gendisk *disk, blk_mode_t mode)
15551594 {
15561595 struct nbd_device *nbd;
1596+ struct nbd_config *config;
15571597 int ret = 0;
15581598
15591599 mutex_lock(&nbd_index_mutex);
@@ -1566,27 +1606,25 @@ static int nbd_open(struct gendisk *disk, blk_mode_t mode) · 6 unmodified lines
15661606 ret = -ENXIO;
15671607 goto out;
15681608 }
1569− if (!refcount_inc_not_zero(&nbd->config_refs)) {
1570− struct nbd_config *config;
15711609
1610+ config = nbd_get_config_unlocked(nbd);
1611+ if (!config) {
15721612 mutex_lock(&nbd->config_lock);
15731613 if (refcount_inc_not_zero(&nbd->config_refs)) {
15741614 mutex_unlock(&nbd->config_lock);
15751615 goto out;
15761616 }
1577− config = nbd_alloc_config();
1578− if (IS_ERR(config)) {
1579− ret = PTR_ERR(config);
1617+ ret = nbd_alloc_and_init_config(nbd);
1618+ if (ret) {
15801619 mutex_unlock(&nbd->config_lock);
15811620 goto out;
15821621 }
1583− nbd->config = config;
1584− refcount_set(&nbd->config_refs, 1);
1622+
15851623 refcount_inc(&nbd->refs);
15861624 mutex_unlock(&nbd->config_lock);
15871625 if (max_part)
15881626 set_bit(GD_NEED_PART_SCAN, &disk->state);
1589− } else if (nbd_disconnected(nbd->config)) {
1627+ } else if (nbd_disconnected(config)) {
15901628 if (max_part)
15911629 set_bit(GD_NEED_PART_SCAN, &disk->state);
15921630 }
@@ -1990,22 +2028,17 @@ again: · 397 unmodified lines
19902028 pr_err("nbd%d already in use\n", index);
19912029 return -EBUSY;
19922030 }
1993− if (WARN_ON(nbd->config)) {
1994− mutex_unlock(&nbd->config_lock);
1995− nbd_put(nbd);
1996− return -EINVAL;
1997− }
1998− config = nbd_alloc_config();
1999− if (IS_ERR(config)) {
2031+
2032+ ret = nbd_alloc_and_init_config(nbd);
2033+ if (ret) {
20002034 mutex_unlock(&nbd->config_lock);
20012035 nbd_put(nbd);
20022036 pr_err("couldn't allocate config\n");
2003− return PTR_ERR(config);
2037+ return ret;
20042038 }
2005− nbd->config = config;
2006− refcount_set(&nbd->config_refs, 1);
2007− set_bit(NBD_RT_BOUND, &config->runtime_flags);
20082039
2040+ config = nbd->config;
2041+ set_bit(NBD_RT_BOUND, &config->runtime_flags);
20092042 ret = nbd_genl_size_set(info, nbd);
20102043 if (ret)
20112044 goto out;
@@ -2208,7 +2241,8 @@ static int nbd_genl_reconfigure(struct sk_buff *skb, struct genl_info *info) · 196 unmodified lines
22082241 }
22092242 mutex_unlock(&nbd_index_mutex);
22102243
2211− if (!refcount_inc_not_zero(&nbd->config_refs)) {
2244+ config = nbd_get_config_unlocked(nbd);
2245+ if (!config) {
22122246 dev_err(nbd_to_dev(nbd),
22132247 "not configured, cannot reconfigure\n");
22142248 nbd_put(nbd);
@@ -2216,7 +2250,6 @@ static int nbd_genl_reconfigure(struct sk_buff *skb, struct genl_info *info) · 1 unmodified line
22162250 }
22172251
22182252 mutex_lock(&nbd->config_lock);
2219− config = nbd->config;
22202253 if (!test_bit(NBD_RT_BOUND, &config->runtime_flags) ||
22212254 !nbd->pid) {
22222255 dev_err(nbd_to_dev(nbd),
drivers/block/null_blk/main.c+13−12
@@ -1464,19 +1464,13 @@ blk_status_t null_process_cmd(struct nullb_cmd *cmd, enum req_op op, · 1463 unmodified lines
14641464 return BLK_STS_OK;
14651465 }
14661466
1467−static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,
1468− sector_t nr_sectors, enum req_op op)
1467+static void null_handle_cmd(struct nullb_cmd *cmd, sector_t sector,
1468+ sector_t nr_sectors, enum req_op op)
14691469 {
14701470 struct nullb_device *dev = cmd->nq->dev;
14711471 struct nullb *nullb = dev->nullb;
14721472 blk_status_t sts;
14731473
1474− if (test_bit(NULLB_DEV_FL_THROTTLED, &dev->flags)) {
1475− sts = null_handle_throttled(cmd);
1476− if (sts != BLK_STS_OK)
1477− return sts;
1478− }
1479−
14801474 if (op == REQ_OP_FLUSH) {
14811475 cmd->error = errno_to_blk_status(null_handle_flush(nullb));
14821476 goto out;
@@ -1493,7 +1487,6 @@ static blk_status_t null_handle_cmd(struct nullb_cmd *cmd, sector_t sector, · 10 unmodified lines
14931487
14941488 out:
14951489 nullb_complete_cmd(cmd);
1496− return BLK_STS_OK;
14971490 }
14981491
14991492 static enum hrtimer_restart nullb_bwtimer_fn(struct hrtimer *timer)
@@ -1724,8 +1717,6 @@ static blk_status_t null_queue_rq(struct blk_mq_hw_ctx *hctx, · 224 unmodified lines
17241717 cmd->fake_timeout = should_timeout_request(rq) ||
17251718 blk_should_fake_timeout(rq->q);
17261719
1727− blk_mq_start_request(rq);
1728−
17291720 if (should_requeue_request(rq)) {
17301721 /*
17311722 * Alternate between hitting the core BUSY path, and the
@@ -1738,6 +1729,15 @@ static blk_status_t null_queue_rq(struct blk_mq_hw_ctx *hctx, · 6 unmodified lines
17381729 return BLK_STS_OK;
17391730 }
17401731
1732+ if (test_bit(NULLB_DEV_FL_THROTTLED, &nq->dev->flags)) {
1733+ blk_status_t sts = null_handle_throttled(cmd);
1734+
1735+ if (sts != BLK_STS_OK)
1736+ return sts;
1737+ }
1738+
1739+ blk_mq_start_request(rq);
1740+
17411741 if (is_poll) {
17421742 spin_lock(&nq->poll_lock);
17431743 list_add_tail(&rq->queuelist, &nq->poll_list);
@@ -1747,7 +1747,8 @@ static blk_status_t null_queue_rq(struct blk_mq_hw_ctx *hctx, · 3 unmodified lines
17471747 if (cmd->fake_timeout)
17481748 return BLK_STS_OK;
17491749
1750− return null_handle_cmd(cmd, sector, nr_sectors, req_op(rq));
1750+ null_handle_cmd(cmd, sector, nr_sectors, req_op(rq));
1751+ return BLK_STS_OK;
17511752 }
17521753
17531754 static void null_queue_rqs(struct request **rqlist)
drivers/cpufreq/amd-pstate.c+56−15
@@ -307,11 +307,11 @@ static int pstate_init_perf(struct amd_cpudata *cpudata) · 306 unmodified lines
307307 highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
308308
309309 WRITE_ONCE(cpudata->highest_perf, highest_perf);
310−
310+ WRITE_ONCE(cpudata->max_limit_perf, highest_perf);
311311 WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1));
312312 WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1));
313313 WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1));
314−
314+ WRITE_ONCE(cpudata->min_limit_perf, AMD_CPPC_LOWEST_PERF(cap1));
315315 return 0;
316316 }
317317
@@ -329,11 +329,12 @@ static int cppc_init_perf(struct amd_cpudata *cpudata) · 11 unmodified lines
329329 highest_perf = cppc_perf.highest_perf;
330330
331331 WRITE_ONCE(cpudata->highest_perf, highest_perf);
332−
332+ WRITE_ONCE(cpudata->max_limit_perf, highest_perf);
333333 WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf);
334334 WRITE_ONCE(cpudata->lowest_nonlinear_perf,
335335 cppc_perf.lowest_nonlinear_perf);
336336 WRITE_ONCE(cpudata->lowest_perf, cppc_perf.lowest_perf);
337+ WRITE_ONCE(cpudata->min_limit_perf, cppc_perf.lowest_perf);
337338
338339 if (cppc_state == AMD_PSTATE_ACTIVE)
339340 return 0;
@@ -432,6 +433,10 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf, · 92 unmodified lines
432433 u64 prev = READ_ONCE(cpudata->cppc_req_cached);
433434 u64 value = prev;
434435
436+ min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,
437+ cpudata->max_limit_perf);
438+ max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,
439+ cpudata->max_limit_perf);
435440 des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf);
436441
437442 if ((cppc_state == AMD_PSTATE_GUIDED) && (gov_flags & CPUFREQ_GOV_DYNAMIC_SWITCHING)) {
@@ -470,6 +475,22 @@ static int amd_pstate_verify(struct cpufreq_policy_data *policy) · 32 unmodified lines
470475 return 0;
471476 }
472477
478+static int amd_pstate_update_min_max_limit(struct cpufreq_policy *policy)
479+{
480+ u32 max_limit_perf, min_limit_perf;
481+ struct amd_cpudata *cpudata = policy->driver_data;
482+
483+ max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);
484+ min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);
485+
486+ WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
487+ WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
488+ WRITE_ONCE(cpudata->max_limit_freq, policy->max);
489+ WRITE_ONCE(cpudata->min_limit_freq, policy->min);
490+
491+ return 0;
492+}
493+
473494 static int amd_pstate_update_freq(struct cpufreq_policy *policy,
474495 unsigned int target_freq, bool fast_switch)
475496 {
@@ -480,6 +501,9 @@ static int amd_pstate_update_freq(struct cpufreq_policy *policy, · 4 unmodified lines
480501 if (!cpudata->max_freq)
481502 return -ENODEV;
482503
504+ if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq)
505+ amd_pstate_update_min_max_limit(policy);
506+
483507 cap_perf = READ_ONCE(cpudata->highest_perf);
484508 min_perf = READ_ONCE(cpudata->lowest_perf);
485509 max_perf = cap_perf;
@@ -518,7 +542,9 @@ static int amd_pstate_target(struct cpufreq_policy *policy, · 32 unmodified lines
518542 static unsigned int amd_pstate_fast_switch(struct cpufreq_policy *policy,
519543 unsigned int target_freq)
520544 {
521− return amd_pstate_update_freq(policy, target_freq, true);
545+ if (!amd_pstate_update_freq(policy, target_freq, true))
546+ return target_freq;
547+ return policy->cur;
522548 }
523549
524550 static void amd_pstate_adjust_perf(unsigned int cpu,
@@ -532,6 +558,10 @@ static void amd_pstate_adjust_perf(unsigned int cpu, · 7 unmodified lines
532558 struct amd_cpudata *cpudata = policy->driver_data;
533559 unsigned int target_freq;
534560
561+ if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq)
562+ amd_pstate_update_min_max_limit(policy);
563+
564+
535565 cap_perf = READ_ONCE(cpudata->highest_perf);
536566 lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
537567 max_freq = READ_ONCE(cpudata->max_freq);
@@ -745,6 +775,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) · 207 unmodified lines
745775 /* Initial processor data capability frequencies */
746776 cpudata->max_freq = max_freq;
747777 cpudata->min_freq = min_freq;
778+ cpudata->max_limit_freq = max_freq;
779+ cpudata->min_limit_freq = min_freq;
748780 cpudata->nominal_freq = nominal_freq;
749781 cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
750782
@@ -850,11 +882,16 @@ static ssize_t show_energy_performance_available_preferences( · 99 unmodified lines
850882 {
851883 int i = 0;
852884 int offset = 0;
885+ struct amd_cpudata *cpudata = policy->driver_data;
886+
887+ if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
888+ return sysfs_emit_at(buf, offset, "%s\n",
889+ energy_perf_strings[EPP_INDEX_PERFORMANCE]);
853890
854891 while (energy_perf_strings[i] != NULL)
855892 offset += sysfs_emit_at(buf, offset, "%s ", energy_perf_strings[i++]);
856893
857− sysfs_emit_at(buf, offset, "\n");
894+ offset += sysfs_emit_at(buf, offset, "\n");
858895
859896 return offset;
860897 }
@@ -1183,16 +1220,25 @@ static int amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy) · 322 unmodified lines
11831220 return 0;
11841221 }
11851222
1186−static void amd_pstate_epp_init(unsigned int cpu)
1223+static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
11871224 {
1188− struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
11891225 struct amd_cpudata *cpudata = policy->driver_data;
1190− u32 max_perf, min_perf;
1226+ u32 max_perf, min_perf, min_limit_perf, max_limit_perf;
11911227 u64 value;
11921228 s16 epp;
11931229
11941230 max_perf = READ_ONCE(cpudata->highest_perf);
11951231 min_perf = READ_ONCE(cpudata->lowest_perf);
1232+ max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);
1233+ min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);
1234+
1235+ max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,
1236+ cpudata->max_limit_perf);
1237+ min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,
1238+ cpudata->max_limit_perf);
1239+
1240+ WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
1241+ WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
11961242
11971243 value = READ_ONCE(cpudata->cppc_req_cached);
11981244
@@ -1210,9 +1256,6 @@ static void amd_pstate_epp_init(unsigned int cpu) · 11 unmodified lines
12101256 value &= ~AMD_CPPC_DES_PERF(~0L);
12111257 value |= AMD_CPPC_DES_PERF(0);
12121258
1213− if (cpudata->epp_policy == cpudata->policy)
1214− goto skip_epp;
1215−
12161259 cpudata->epp_policy = cpudata->policy;
12171260
12181261 /* Get BIOS pre-defined epp value */
@@ -1222,7 +1265,7 @@ static void amd_pstate_epp_init(unsigned int cpu) · 3 unmodified lines
12221265 * This return value can only be negative for shared_memory
12231266 * systems where EPP register read/write not supported.
12241267 */
1225− goto skip_epp;
1268+ return;
12261269 }
12271270
12281271 if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
@@ -1236,8 +1279,6 @@ static void amd_pstate_epp_init(unsigned int cpu) · 7 unmodified lines
12361279
12371280 WRITE_ONCE(cpudata->cppc_req_cached, value);
12381281 amd_pstate_set_epp(cpudata, epp);
1239−skip_epp:
1240− cpufreq_cpu_put(policy);
12411282 }
12421283
12431284 static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)
@@ -1252,7 +1293,7 @@ static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy) · 8 unmodified lines
12521293
12531294 cpudata->policy = policy->policy;
12541295
1255− amd_pstate_epp_init(policy->cpu);
1296+ amd_pstate_epp_update_limit(policy);
12561297
12571298 return 0;
12581299 }
drivers/cpufreq/imx6q-cpufreq.c+1−1
@@ -327,7 +327,7 @@ static int imx6ul_opp_check_speed_grading(struct device *dev) · 326 unmodified lines
327327 imx6x_disable_freq_in_opp(dev, 696000000);
328328
329329 if (of_machine_is_compatible("fsl,imx6ull")) {
330− if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
330+ if (val < OCOTP_CFG3_6ULL_SPEED_792MHZ)
331331 imx6x_disable_freq_in_opp(dev, 792000000);
332332
333333 if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
drivers/cpufreq/qcom-cpufreq-nvmem.c+70−3
@@ -23,8 +23,10 @@ · 22 unmodified lines
2323 #include <linux/nvmem-consumer.h>
2424 #include <linux/of.h>
2525 #include <linux/platform_device.h>
26+#include <linux/pm.h>
2627 #include <linux/pm_domain.h>
2728 #include <linux/pm_opp.h>
29+#include <linux/pm_runtime.h>
2830 #include <linux/slab.h>
2931 #include <linux/soc/qcom/smem.h>
3032
@@ -55,6 +57,7 @@ struct qcom_cpufreq_match_data { · 24 unmodified lines
5557
5658 struct qcom_cpufreq_drv_cpu {
5759 int opp_token;
60+ struct device **virt_devs;
5861 };
5962
6063 struct qcom_cpufreq_drv {
@@ -424,6 +427,30 @@ static const struct qcom_cpufreq_match_data match_data_ipq8074 = { · 363 unmodified lines
424427 .get_version = qcom_cpufreq_ipq8074_name_version,
425428 };
426429
430+static void qcom_cpufreq_suspend_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)
431+{
432+ const char * const *name = drv->data->genpd_names;
433+ int i;
434+
435+ if (!drv->cpus[cpu].virt_devs)
436+ return;
437+
438+ for (i = 0; *name; i++, name++)
439+ device_set_awake_path(drv->cpus[cpu].virt_devs[i]);
440+}
441+
442+static void qcom_cpufreq_put_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)
443+{
444+ const char * const *name = drv->data->genpd_names;
445+ int i;
446+
447+ if (!drv->cpus[cpu].virt_devs)
448+ return;
449+
450+ for (i = 0; *name; i++, name++)
451+ pm_runtime_put(drv->cpus[cpu].virt_devs[i]);
452+}
453+
427454 static int qcom_cpufreq_probe(struct platform_device *pdev)
428455 {
429456 struct qcom_cpufreq_drv *drv;
@@ -478,6 +505,7 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) · 48 unmodified lines
478505 of_node_put(np);
479506
480507 for_each_possible_cpu(cpu) {
508+ struct device **virt_devs = NULL;
481509 struct dev_pm_opp_config config = {
482510 .supported_hw = NULL,
483511 };
@@ -498,7 +526,7 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) · 14 unmodified lines
498526
499527 if (drv->data->genpd_names) {
500528 config.genpd_names = drv->data->genpd_names;
501− config.virt_devs = NULL;
529+ config.virt_devs = &virt_devs;
502530 }
503531
504532 if (config.supported_hw || config.genpd_names) {
@@ -509,6 +537,27 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) · 4 unmodified lines
509537 goto free_opp;
510538 }
511539 }
540+
541+ if (virt_devs) {
542+ const char * const *name = config.genpd_names;
543+ int i, j;
544+
545+ for (i = 0; *name; i++, name++) {
546+ ret = pm_runtime_resume_and_get(virt_devs[i]);
547+ if (ret) {
548+ dev_err(cpu_dev, "failed to resume %s: %d\n",
549+ *name, ret);
550+
551+ /* Rollback previous PM runtime calls */
552+ name = config.genpd_names;
553+ for (j = 0; *name && j < i; j++, name++)
554+ pm_runtime_put(virt_devs[j]);
555+
556+ goto free_opp;
557+ }
558+ }
559+ drv->cpus[cpu].virt_devs = virt_devs;
560+ }
512561 }
513562
514563 cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
@@ -522,8 +571,10 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) · 7 unmodified lines
522571 dev_err(cpu_dev, "Failed to register platform device\n");
523572
524573 free_opp:
525− for_each_possible_cpu(cpu)
574+ for_each_possible_cpu(cpu) {
575+ qcom_cpufreq_put_virt_devs(drv, cpu);
526576 dev_pm_opp_clear_config(drv->cpus[cpu].opp_token);
577+ }
527578 return ret;
528579 }
529580
@@ -534,15 +585,31 @@ static void qcom_cpufreq_remove(struct platform_device *pdev) · 4 unmodified lines
534585
535586 platform_device_unregister(cpufreq_dt_pdev);
536587
537− for_each_possible_cpu(cpu)
588+ for_each_possible_cpu(cpu) {
589+ qcom_cpufreq_put_virt_devs(drv, cpu);
538590 dev_pm_opp_clear_config(drv->cpus[cpu].opp_token);
591+ }
539592 }
540593
594+static int qcom_cpufreq_suspend(struct device *dev)
595+{
596+ struct qcom_cpufreq_drv *drv = dev_get_drvdata(dev);
597+ unsigned int cpu;
598+
599+ for_each_possible_cpu(cpu)
600+ qcom_cpufreq_suspend_virt_devs(drv, cpu);
601+
602+ return 0;
603+}
604+
605+static DEFINE_SIMPLE_DEV_PM_OPS(qcom_cpufreq_pm_ops, qcom_cpufreq_suspend, NULL);
606+
541607 static struct platform_driver qcom_cpufreq_driver = {
542608 .probe = qcom_cpufreq_probe,
543609 .remove_new = qcom_cpufreq_remove,
544610 .driver = {
545611 .name = "qcom-cpufreq-nvmem",
612+ .pm = pm_sleep_ptr(&qcom_cpufreq_pm_ops),
546613 },
547614 };
548615
drivers/dma-buf/dma-resv.c+1−1
@@ -301,7 +301,7 @@ void dma_resv_add_fence(struct dma_resv *obj, struct dma_fence *fence, · 300 unmodified lines
301301
302302 dma_resv_list_entry(fobj, i, obj, &old, &old_usage);
303303 if ((old->context == fence->context && old_usage >= usage &&
304− dma_fence_is_later(fence, old)) ||
304+ dma_fence_is_later_or_same(fence, old)) ||
305305 dma_fence_is_signaled(old)) {
306306 dma_resv_list_set(fobj, i, fence, usage);
307307 dma_fence_put(old);
drivers/dpll/dpll_netlink.c+12−5
@@ -1093,9 +1093,10 @@ int dpll_nl_pin_id_get_doit(struct sk_buff *skb, struct genl_info *info) · 1092 unmodified lines
10931093 return -ENOMEM;
10941094 hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0,
10951095 DPLL_CMD_PIN_ID_GET);
1096− if (!hdr)
1096+ if (!hdr) {
1097+ nlmsg_free(msg);
10971098 return -EMSGSIZE;
1098−
1099+ }
10991100 pin = dpll_pin_find_from_nlattr(info);
11001101 if (!IS_ERR(pin)) {
11011102 ret = dpll_msg_add_pin_handle(msg, pin);
@@ -1123,8 +1124,10 @@ int dpll_nl_pin_get_doit(struct sk_buff *skb, struct genl_info *info) · 21 unmodified lines
11231124 return -ENOMEM;
11241125 hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0,
11251126 DPLL_CMD_PIN_GET);
1126− if (!hdr)
1127+ if (!hdr) {
1128+ nlmsg_free(msg);
11271129 return -EMSGSIZE;
1130+ }
11281131 ret = dpll_cmd_pin_get_one(msg, pin, info->extack);
11291132 if (ret) {
11301133 nlmsg_free(msg);
@@ -1256,8 +1259,10 @@ int dpll_nl_device_id_get_doit(struct sk_buff *skb, struct genl_info *info) · 125 unmodified lines
12561259 return -ENOMEM;
12571260 hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0,
12581261 DPLL_CMD_DEVICE_ID_GET);
1259− if (!hdr)
1262+ if (!hdr) {
1263+ nlmsg_free(msg);
12601264 return -EMSGSIZE;
1265+ }
12611266
12621267 dpll = dpll_device_find_from_nlattr(info);
12631268 if (!IS_ERR(dpll)) {
@@ -1284,8 +1289,10 @@ int dpll_nl_device_get_doit(struct sk_buff *skb, struct genl_info *info) · 20 unmodified lines
12841289 return -ENOMEM;
12851290 hdr = genlmsg_put_reply(msg, info, &dpll_nl_family, 0,
12861291 DPLL_CMD_DEVICE_GET);
1287− if (!hdr)
1292+ if (!hdr) {
1293+ nlmsg_free(msg);
12881294 return -EMSGSIZE;
1295+ }
12891296
12901297 ret = dpll_device_get_one(dpll, msg, info->extack);
12911298 if (ret) {
drivers/firewire/core-device.c+4−7
@@ -717,14 +717,11 @@ static void create_units(struct fw_device *device) · 716 unmodified lines
717717 fw_unit_attributes,
718718 &unit->attribute_group);
719719
720− if (device_register(&unit->device) < 0)
721− goto skip_unit;
722−
723720 fw_device_get(device);
724− continue;
725−
726− skip_unit:
727− kfree(unit);
721+ if (device_register(&unit->device) < 0) {
722+ put_device(&unit->device);
723+ continue;
724+ }
728725 }
729726 }
730727
drivers/firewire/sbp2.c+3−3
@@ -1519,9 +1519,9 @@ static int sbp2_scsi_slave_configure(struct scsi_device *sdev) · 1518 unmodified lines
15191519 sdev->use_10_for_rw = 1;
15201520
15211521 if (sbp2_param_exclusive_login) {
1522− sdev->manage_system_start_stop = true;
1523− sdev->manage_runtime_start_stop = true;
1524− sdev->manage_shutdown = true;
1522+ sdev->manage_system_start_stop = 1;
1523+ sdev->manage_runtime_start_stop = 1;
1524+ sdev->manage_shutdown = 1;
15251525 }
15261526
15271527 if (sdev->type == TYPE_ROM)
drivers/firmware/Kconfig+1−1
@@ -131,7 +131,7 @@ config RASPBERRYPI_FIRMWARE · 130 unmodified lines
131131
132132 config FW_CFG_SYSFS
133133 tristate "QEMU fw_cfg device support in sysfs"
134− depends on SYSFS && (ARM || ARM64 || PARISC || PPC_PMAC || SPARC || X86)
134+ depends on SYSFS && (ARM || ARM64 || PARISC || PPC_PMAC || RISCV || SPARC || X86)
135135 depends on HAS_IOPORT_MAP
136136 default n
137137 help
drivers/firmware/arm_ffa/driver.c+46−24
@@ -99,6 +99,7 @@ struct ffa_drv_info { · 98 unmodified lines
9999 void *tx_buffer;
100100 bool mem_ops_native;
101101 bool bitmap_created;
102+ bool notif_enabled;
102103 unsigned int sched_recv_irq;
103104 unsigned int cpuhp_state;
104105 struct ffa_pcpu_irq __percpu *irq_pcpu;
@@ -782,7 +783,7 @@ static void ffa_notification_info_get(void) · 677 unmodified lines
782783 if (ids_processed >= max_ids - 1)
783784 break;
784785
785− part_id = packed_id_list[++ids_processed];
786+ part_id = packed_id_list[ids_processed++];
786787
787788 if (!ids_count[list]) { /* Global Notification */
788789 __do_sched_recv_cb(part_id, 0, false);
@@ -794,7 +795,7 @@ static void ffa_notification_info_get(void) · 5 unmodified lines
794795 if (ids_processed >= max_ids - 1)
795796 break;
796797
797− vcpu_id = packed_id_list[++ids_processed];
798+ vcpu_id = packed_id_list[ids_processed++];
798799
799800 __do_sched_recv_cb(part_id, vcpu_id, true);
800801 }
@@ -889,6 +890,8 @@ static int ffa_memory_lend(struct ffa_mem_ops_args *args) · 88 unmodified lines
889890
890891 #define FFA_SECURE_PARTITION_ID_FLAG BIT(15)
891892
893+#define ffa_notifications_disabled() (!drv_info->notif_enabled)
894+
892895 enum notify_type {
893896 NON_SECURE_VM,
894897 SECURE_PARTITION,
@@ -908,6 +911,9 @@ static int ffa_sched_recv_cb_update(u16 part_id, ffa_sched_recv_cb callback, · 13 unmodified lines
908911 struct ffa_dev_part_info *partition;
909912 bool cb_valid;
910913
914+ if (ffa_notifications_disabled())
915+ return -EOPNOTSUPP;
916+
911917 partition = xa_load(&drv_info->partition_info, part_id);
912918 write_lock(&partition->rw_lock);
913919
@@ -1001,6 +1007,9 @@ static int ffa_notify_relinquish(struct ffa_device *dev, int notify_id) · 87 unmodified lines
10011007 int rc;
10021008 enum notify_type type = ffa_notify_type_get(dev->vm_id);
10031009
1010+ if (ffa_notifications_disabled())
1011+ return -EOPNOTSUPP;
1012+
10041013 if (notify_id >= FFA_MAX_NOTIFICATIONS)
10051014 return -EINVAL;
10061015
@@ -1027,6 +1036,9 @@ static int ffa_notify_request(struct ffa_device *dev, bool is_per_vcpu, · 20 unmodified lines
10271036 u32 flags = 0;
10281037 enum notify_type type = ffa_notify_type_get(dev->vm_id);
10291038
1039+ if (ffa_notifications_disabled())
1040+ return -EOPNOTSUPP;
1041+
10301042 if (notify_id >= FFA_MAX_NOTIFICATIONS)
10311043 return -EINVAL;
10321044
@@ -1057,6 +1069,9 @@ static int ffa_notify_send(struct ffa_device *dev, int notify_id, · 24 unmodified lines
10571069 {
10581070 u32 flags = 0;
10591071
1072+ if (ffa_notifications_disabled())
1073+ return -EOPNOTSUPP;
1074+
10601075 if (is_per_vcpu)
10611076 flags |= (PER_VCPU_NOTIFICATION_FLAG | vcpu << 16);
10621077
@@ -1233,7 +1248,7 @@ static void ffa_partitions_cleanup(void) · 170 unmodified lines
12331248 if (!count)
12341249 return;
12351250
1236− info = kcalloc(count, sizeof(**info), GFP_KERNEL);
1251+ info = kcalloc(count, sizeof(*info), GFP_KERNEL);
12371252 if (!info)
12381253 return;
12391254
@@ -1311,8 +1326,10 @@ static int ffa_sched_recv_irq_map(void) · 71 unmodified lines
13111326
13121327 static void ffa_sched_recv_irq_unmap(void)
13131328 {
1314− if (drv_info->sched_recv_irq)
1329+ if (drv_info->sched_recv_irq) {
13151330 irq_dispose_mapping(drv_info->sched_recv_irq);
1331+ drv_info->sched_recv_irq = 0;
1332+ }
13161333 }
13171334
13181335 static int ffa_cpuhp_pcpu_irq_enable(unsigned int cpu)
@@ -1329,17 +1346,23 @@ static int ffa_cpuhp_pcpu_irq_disable(unsigned int cpu) · 10 unmodified lines
13291346
13301347 static void ffa_uninit_pcpu_irq(void)
13311348 {
1332− if (drv_info->cpuhp_state)
1349+ if (drv_info->cpuhp_state) {
13331350 cpuhp_remove_state(drv_info->cpuhp_state);
1351+ drv_info->cpuhp_state = 0;
1352+ }
13341353
1335− if (drv_info->notif_pcpu_wq)
1354+ if (drv_info->notif_pcpu_wq) {
13361355 destroy_workqueue(drv_info->notif_pcpu_wq);
1356+ drv_info->notif_pcpu_wq = NULL;
1357+ }
13371358
13381359 if (drv_info->sched_recv_irq)
13391360 free_percpu_irq(drv_info->sched_recv_irq, drv_info->irq_pcpu);
13401361
1341− if (drv_info->irq_pcpu)
1362+ if (drv_info->irq_pcpu) {
13421363 free_percpu(drv_info->irq_pcpu);
1364+ drv_info->irq_pcpu = NULL;
1365+ }
13431366 }
13441367
13451368 static int ffa_init_pcpu_irq(unsigned int irq)
@@ -1388,22 +1411,23 @@ static void ffa_notifications_cleanup(void) · 42 unmodified lines
13881411 ffa_notification_bitmap_destroy();
13891412 drv_info->bitmap_created = false;
13901413 }
1414+ drv_info->notif_enabled = false;
13911415 }
13921416
1393−static int ffa_notifications_setup(void)
1417+static void ffa_notifications_setup(void)
13941418 {
13951419 int ret, irq;
13961420
13971421 ret = ffa_features(FFA_NOTIFICATION_BITMAP_CREATE, 0, NULL, NULL);
13981422 if (ret) {
1399− pr_err("Notifications not supported, continuing with it ..\n");
1400− return 0;
1423+ pr_info("Notifications not supported, continuing with it ..\n");
1424+ return;
14011425 }
14021426
14031427 ret = ffa_notification_bitmap_create();
14041428 if (ret) {
1405− pr_err("notification_bitmap_create error %d\n", ret);
1406− return ret;
1429+ pr_info("Notification bitmap create error %d\n", ret);
1430+ return;
14071431 }
14081432 drv_info->bitmap_created = true;
14091433
@@ -1422,14 +1446,11 @@ static int ffa_notifications_setup(void) · 12 unmodified lines
14221446 hash_init(drv_info->notifier_hash);
14231447 mutex_init(&drv_info->notify_lock);
14241448
1425− /* Register internal scheduling callback */
1426− ret = ffa_sched_recv_cb_update(drv_info->vm_id, ffa_self_notif_handle,
1427− drv_info, true);
1428− if (!ret)
1429− return ret;
1449+ drv_info->notif_enabled = true;
1450+ return;
14301451 cleanup:
1452+ pr_info("Notification setup failed %d, not enabled\n", ret);
14311453 ffa_notifications_cleanup();
1432− return ret;
14331454 }
14341455
14351456 static int __init ffa_init(void)
@@ -1483,17 +1504,18 @@ static int __init ffa_init(void) · 47 unmodified lines
14831504 mutex_init(&drv_info->rx_lock);
14841505 mutex_init(&drv_info->tx_lock);
14851506
1486− ffa_setup_partitions();
1487−
14881507 ffa_set_up_mem_ops_native_flag();
14891508
1490− ret = ffa_notifications_setup();
1509+ ffa_notifications_setup();
1510+
1511+ ffa_setup_partitions();
1512+
1513+ ret = ffa_sched_recv_cb_update(drv_info->vm_id, ffa_self_notif_handle,
1514+ drv_info, true);
14911515 if (ret)
1492− goto partitions_cleanup;
1516+ pr_info("Failed to register driver sched callback %d\n", ret);
14931517
14941518 return 0;
1495−partitions_cleanup:
1496− ffa_partitions_cleanup();
14971519 free_pages:
14981520 if (drv_info->tx_buffer)
14991521 free_pages_exact(drv_info->tx_buffer, RXTX_BUFFER_SIZE);
drivers/firmware/arm_scmi/perf.c+10−8
@@ -152,7 +152,7 @@ struct perf_dom_info { · 151 unmodified lines
152152 u32 opp_count;
153153 u32 sustained_freq_khz;
154154 u32 sustained_perf_level;
155− u32 mult_factor;
155+ unsigned long mult_factor;
156156 struct scmi_perf_domain_info info;
157157 struct scmi_opp opp[MAX_OPPS];
158158 struct scmi_fc_info *fc_info;
@@ -268,13 +268,14 @@ scmi_perf_domain_attributes_get(const struct scmi_protocol_handle *ph, · 109 unmodified lines
268268 dom_info->sustained_perf_level =
269269 le32_to_cpu(attr->sustained_perf_level);
270270 if (!dom_info->sustained_freq_khz ||
271− !dom_info->sustained_perf_level)
271+ !dom_info->sustained_perf_level ||
272+ dom_info->level_indexing_mode)
272273 /* CPUFreq converts to kHz, hence default 1000 */
273274 dom_info->mult_factor = 1000;
274275 else
275276 dom_info->mult_factor =
276− (dom_info->sustained_freq_khz * 1000) /
277− dom_info->sustained_perf_level;
277+ (dom_info->sustained_freq_khz * 1000UL)
278+ / dom_info->sustained_perf_level;
278279 strscpy(dom_info->info.name, attr->name,
279280 SCMI_SHORT_NAME_MAX_SIZE);
280281 }
@@ -798,7 +799,7 @@ static int scmi_dvfs_device_opps_add(const struct scmi_protocol_handle *ph, · 517 unmodified lines
798799 if (!dom->level_indexing_mode)
799800 freq = dom->opp[idx].perf * dom->mult_factor;
800801 else
801− freq = dom->opp[idx].indicative_freq * 1000;
802+ freq = dom->opp[idx].indicative_freq * dom->mult_factor;
802803
803804 data.level = dom->opp[idx].perf;
804805 data.freq = freq;
@@ -845,7 +846,8 @@ static int scmi_dvfs_freq_set(const struct scmi_protocol_handle *ph, u32 domain, · 40 unmodified lines
845846 } else {
846847 struct scmi_opp *opp;
847848
848− opp = LOOKUP_BY_FREQ(dom->opps_by_freq, freq / 1000);
849+ opp = LOOKUP_BY_FREQ(dom->opps_by_freq,
850+ freq / dom->mult_factor);
849851 if (!opp)
850852 return -EIO;
851853
@@ -879,7 +881,7 @@ static int scmi_dvfs_freq_get(const struct scmi_protocol_handle *ph, u32 domain, · 27 unmodified lines
879881 if (!opp)
880882 return -EIO;
881883
882− *freq = opp->indicative_freq * 1000;
884+ *freq = opp->indicative_freq * dom->mult_factor;
883885 }
884886
885887 return ret;
@@ -902,7 +904,7 @@ static int scmi_dvfs_est_power_get(const struct scmi_protocol_handle *ph, · 16 unmodified lines
902904 if (!dom->level_indexing_mode)
903905 opp_freq = opp->perf * dom->mult_factor;
904906 else
905− opp_freq = opp->indicative_freq * 1000;
907+ opp_freq = opp->indicative_freq * dom->mult_factor;
906908
907909 if (opp_freq < *freq)
908910 continue;
drivers/firmware/efi/unaccepted_memory.c+1−1
@@ -101,7 +101,7 @@ retry: · 100 unmodified lines
101101 * overlap on physical address level.
102102 */
103103 list_for_each_entry(entry, &accepting_list, list) {
104− if (entry->end < range.start)
104+ if (entry->end <= range.start)
105105 continue;
106106 if (entry->start >= range.end)
107107 continue;
drivers/firmware/qemu_fw_cfg.c+1−1
@@ -211,7 +211,7 @@ static void fw_cfg_io_cleanup(void) · 210 unmodified lines
211211
212212 /* arch-specific ctrl & data register offsets are not available in ACPI, DT */
213213 #if !(defined(FW_CFG_CTRL_OFF) && defined(FW_CFG_DATA_OFF))
214−# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64))
214+# if (defined(CONFIG_ARM) || defined(CONFIG_ARM64) || defined(CONFIG_RISCV))
215215 # define FW_CFG_CTRL_OFF 0x08
216216 # define FW_CFG_DATA_OFF 0x00
217217 # define FW_CFG_DMA_OFF 0x10
drivers/gpio/gpiolib-sysfs.c+9−6
@@ -474,14 +474,17 @@ static ssize_t export_store(const struct class *class, · 473 unmodified lines
474474 goto done;
475475
476476 status = gpiod_set_transitory(desc, false);
477− if (!status) {
478− status = gpiod_export(desc, true);
479− if (status < 0)
480− gpiod_free(desc);
481− else
482− set_bit(FLAG_SYSFS, &desc->flags);
477+ if (status) {
478+ gpiod_free(desc);
479+ goto done;
483480 }
484481
482+ status = gpiod_export(desc, true);
483+ if (status < 0)
484+ gpiod_free(desc);
485+ else
486+ set_bit(FLAG_SYSFS, &desc->flags);
487+
485488 done:
486489 if (status)
487490 pr_debug("%s: status %d\n", __func__, status);
drivers/gpu/drm/amd/amdgpu/amdgpu.h+1−0
@@ -248,6 +248,7 @@ extern int amdgpu_umsch_mm; · 247 unmodified lines
248248 extern int amdgpu_seamless;
249249
250250 extern int amdgpu_user_partt_mode;
251+extern int amdgpu_agp;
251252
252253 #define AMDGPU_VM_MAX_NUM_CTX 4096
253254 #define AMDGPU_SG_THRESHOLD (256*1024*1024)
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+1−1
@@ -547,7 +547,7 @@ int amdgpu_amdkfd_get_xgmi_bandwidth_mbytes(struct amdgpu_device *dst, · 546 unmodified lines
547547 struct amdgpu_device *adev = dst, *peer_adev;
548548 int num_links;
549549
550− if (adev->asic_type != CHIP_ALDEBARAN)
550+ if (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(9, 4, 2))
551551 return 0;
552552
553553 if (src)
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+1−1
@@ -207,7 +207,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p, · 206 unmodified lines
207207 }
208208
209209 for (i = 0; i < p->nchunks; i++) {
210− struct drm_amdgpu_cs_chunk __user **chunk_ptr = NULL;
210+ struct drm_amdgpu_cs_chunk __user *chunk_ptr = NULL;
211211 struct drm_amdgpu_cs_chunk user_chunk;
212212 uint32_t __user *cdata;
213213
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+6−0
@@ -638,6 +638,9 @@ static ssize_t amdgpu_debugfs_regs_didt_read(struct file *f, char __user *buf, · 637 unmodified lines
638638 if (size & 0x3 || *pos & 0x3)
639639 return -EINVAL;
640640
641+ if (!adev->didt_rreg)
642+ return -EOPNOTSUPP;
643+
641644 r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
642645 if (r < 0) {
643646 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
@@ -694,6 +697,9 @@ static ssize_t amdgpu_debugfs_regs_didt_write(struct file *f, const char __user · 50 unmodified lines
694697 if (size & 0x3 || *pos & 0x3)
695698 return -EINVAL;
696699
700+ if (!adev->didt_wreg)
701+ return -EOPNOTSUPP;
702+
697703 r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
698704 if (r < 0) {
699705 pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+6−4
@@ -3791,10 +3791,6 @@ static void amdgpu_device_set_mcbp(struct amdgpu_device *adev) · 3790 unmodified lines
37913791 adev->gfx.mcbp = true;
37923792 else if (amdgpu_mcbp == 0)
37933793 adev->gfx.mcbp = false;
3794− else if ((amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(9, 0, 0)) &&
3795− (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(10, 0, 0)) &&
3796− adev->gfx.num_gfx_rings)
3797− adev->gfx.mcbp = true;
37983794
37993795 if (amdgpu_sriov_vf(adev))
38003796 adev->gfx.mcbp = true;
@@ -4531,6 +4527,8 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) · 730 unmodified lines
45314527 if (r)
45324528 return r;
45334529
4530+ amdgpu_ttm_set_buffer_funcs_status(adev, false);
4531+
45344532 amdgpu_fence_driver_hw_fini(adev);
45354533
45364534 amdgpu_device_ip_suspend_phase2(adev);
@@ -4538,6 +4536,10 @@ int amdgpu_device_suspend(struct drm_device *dev, bool fbcon) · 1 unmodified line
45384536 if (amdgpu_sriov_vf(adev))
45394537 amdgpu_virt_release_full_gpu(adev, false);
45404538
4539+ r = amdgpu_dpm_notify_rlc_state(adev, false);
4540+ if (r)
4541+ return r;
4542+
45414543 return 0;
45424544 }
45434545
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c+3−6
@@ -340,14 +340,11 @@ int amdgpu_display_crtc_set_config(struct drm_mode_set *set, · 339 unmodified lines
340340 adev->have_disp_power_ref = true;
341341 return ret;
342342 }
343− /* if we have no active crtcs, then drop the power ref
344− * we got before
343+ /* if we have no active crtcs, then go to
344+ * drop the power ref we got before
345345 */
346− if (!active && adev->have_disp_power_ref) {
347− pm_runtime_put_autosuspend(dev->dev);
346+ if (!active && adev->have_disp_power_ref)
348347 adev->have_disp_power_ref = false;
349− }
350−
351348 out:
352349 /* drop the power reference we got coming in here */
353350 pm_runtime_put_autosuspend(dev->dev);
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+12−0
@@ -207,6 +207,7 @@ int amdgpu_user_partt_mode = AMDGPU_AUTO_COMPUTE_PARTITION_MODE; · 206 unmodified lines
207207 int amdgpu_umsch_mm;
208208 int amdgpu_seamless = -1; /* auto */
209209 uint amdgpu_debug_mask;
210+int amdgpu_agp = -1; /* auto */
210211
211212 static void amdgpu_drv_delayed_reset_work_handler(struct work_struct *work);
212213
@@ -961,6 +962,15 @@ module_param_named(seamless, amdgpu_seamless, int, 0444); · 748 unmodified lines
961962 MODULE_PARM_DESC(debug_mask, "debug options for amdgpu, disabled by default");
962963 module_param_named(debug_mask, amdgpu_debug_mask, uint, 0444);
963964
965+/**
966+ * DOC: agp (int)
967+ * Enable the AGP aperture. This provides an aperture in the GPU's internal
968+ * address space for direct access to system memory. Note that these accesses
969+ * are non-snooped, so they are only used for access to uncached memory.
970+ */
971+MODULE_PARM_DESC(agp, "AGP (-1 = auto (default), 0 = disable, 1 = enable)");
972+module_param_named(agp, amdgpu_agp, int, 0444);
973+
964974 /* These devices are not supported by amdgpu.
965975 * They are supported by the mach64, r128, radeon drivers
966976 */
@@ -2253,6 +2263,8 @@ retry_init: · 1286 unmodified lines
22532263 pm_runtime_mark_last_busy(ddev->dev);
22542264 pm_runtime_put_autosuspend(ddev->dev);
22552265
2266+ pci_wake_from_d3(pdev, TRUE);
2267+
22562268 /*
22572269 * For runpm implemented via BACO, PMFW will handle the
22582270 * timing for BACO in and out:
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c+3−0
@@ -181,6 +181,9 @@ uint64_t amdgpu_gmc_agp_addr(struct ttm_buffer_object *bo) · 180 unmodified lines
181181 {
182182 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
183183
184+ if (!bo->ttm)
185+ return AMDGPU_BO_INVALID_OFFSET;
186+
184187 if (bo->ttm->num_pages != 1 || bo->ttm->caching == ttm_cached)
185188 return AMDGPU_BO_INVALID_OFFSET;
186189
drivers/gpu/drm/amd/amdgpu/amdgpu_mca.h+2−0
@@ -46,6 +46,8 @@ · 45 unmodified lines
4646 #define MCA_REG__STATUS__ERRORCODEEXT(x) MCA_REG_FIELD(x, 21, 16)
4747 #define MCA_REG__STATUS__ERRORCODE(x) MCA_REG_FIELD(x, 15, 0)
4848
49+#define MCA_REG__SYND__ERRORINFORMATION(x) MCA_REG_FIELD(x, 17, 0)
50+
4951 enum amdgpu_mca_ip {
5052 AMDGPU_MCA_IP_UNKNOW = -1,
5153 AMDGPU_MCA_IP_PSP = 0,
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c+7−3
@@ -1527,10 +1527,14 @@ u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo) · 1526 unmodified lines
15271527 u64 amdgpu_bo_gpu_offset_no_check(struct amdgpu_bo *bo)
15281528 {
15291529 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
1530− uint64_t offset;
1530+ uint64_t offset = AMDGPU_BO_INVALID_OFFSET;
15311531
1532− offset = (bo->tbo.resource->start << PAGE_SHIFT) +
1533− amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
1532+ if (bo->tbo.resource->mem_type == TTM_PL_TT)
1533+ offset = amdgpu_gmc_agp_addr(&bo->tbo);
1534+
1535+ if (offset == AMDGPU_BO_INVALID_OFFSET)
1536+ offset = (bo->tbo.resource->start << PAGE_SHIFT) +
1537+ amdgpu_ttm_domain_start(adev, bo->tbo.resource->mem_type);
15341538
15351539 return amdgpu_gmc_sign_extend(offset);
15361540 }
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+5−0
@@ -1473,6 +1473,11 @@ int psp_xgmi_get_topology_info(struct psp_context *psp, · 1472 unmodified lines
14731473 topology->nodes[i].num_links = (requires_reflection && topology->nodes[i].num_links) ?
14741474 topology->nodes[i].num_links : node_num_links;
14751475 }
1476+ /* popluate the connected port num info if supported and available */
1477+ if (ta_port_num_support && topology->nodes[i].num_links) {
1478+ memcpy(topology->nodes[i].port_num, link_extend_info_output->nodes[i].port_num,
1479+ sizeof(struct xgmi_connected_port_num) * TA_XGMI__MAX_PORT_NUM);
1480+ }
14761481
14771482 /* reflect the topology information for bi-directionality */
14781483 if (requires_reflection && topology->nodes[i].num_hops)
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h+1−0
@@ -150,6 +150,7 @@ struct psp_xgmi_node_info { · 149 unmodified lines
150150 uint8_t is_sharing_enabled;
151151 enum ta_xgmi_assigned_sdma_engine sdma_engine;
152152 uint8_t num_links;
153+ struct xgmi_connected_port_num port_num[TA_XGMI__MAX_PORT_NUM];
153154 };
154155
155156 struct psp_xgmi_topology_info {
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c+18−1
@@ -28,6 +28,7 @@ · 27 unmodified lines
2828 #include <linux/reboot.h>
2929 #include <linux/syscalls.h>
3030 #include <linux/pm_runtime.h>
31+#include <linux/list_sort.h>
3132
3233 #include "amdgpu.h"
3334 #include "amdgpu_ras.h"
@@ -1188,7 +1189,7 @@ static int amdgpu_ras_query_error_status_helper(struct amdgpu_device *adev, · 1154 unmodified lines
11881189 }
11891190
11901191 if (block_obj->hw_ops->query_ras_error_count)
1191− block_obj->hw_ops->query_ras_error_count(adev, &err_data);
1192+ block_obj->hw_ops->query_ras_error_count(adev, err_data);
11921193
11931194 if ((info->head.block == AMDGPU_RAS_BLOCK__SDMA) ||
11941195 (info->head.block == AMDGPU_RAS_BLOCK__GFX) ||
@@ -3665,6 +3666,21 @@ static struct ras_err_node *amdgpu_ras_error_node_new(void) · 2470 unmodified lines
36653666 return err_node;
36663667 }
36673668
3669+static int ras_err_info_cmp(void *priv, const struct list_head *a, const struct list_head *b)
3670+{
3671+ struct ras_err_node *nodea = container_of(a, struct ras_err_node, node);
3672+ struct ras_err_node *nodeb = container_of(b, struct ras_err_node, node);
3673+ struct amdgpu_smuio_mcm_config_info *infoa = &nodea->err_info.mcm_info;
3674+ struct amdgpu_smuio_mcm_config_info *infob = &nodeb->err_info.mcm_info;
3675+
3676+ if (unlikely(infoa->socket_id != infob->socket_id))
3677+ return infoa->socket_id - infob->socket_id;
3678+ else
3679+ return infoa->die_id - infob->die_id;
3680+
3681+ return 0;
3682+}
3683+
36683684 static struct ras_err_info *amdgpu_ras_error_get_info(struct ras_err_data *err_data,
36693685 struct amdgpu_smuio_mcm_config_info *mcm_info)
36703686 {
@@ -3682,6 +3698,7 @@ static struct ras_err_info *amdgpu_ras_error_get_info(struct ras_err_data *err_d · 11 unmodified lines
36823698
36833699 err_data->err_list_count++;
36843700 list_add_tail(&err_node->node, &err_data->err_node_list);
3701+ list_sort(NULL, &err_data->err_node_list, ras_err_info_cmp);
36853702
36863703 return &err_node->err_info;
36873704 }
drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c+6−0
@@ -214,6 +214,12 @@ static bool __get_eeprom_i2c_addr(struct amdgpu_device *adev, · 213 unmodified lines
214214 control->i2c_address = EEPROM_I2C_MADDR_0;
215215 return true;
216216 case IP_VERSION(13, 0, 0):
217+ if (strnstr(atom_ctx->vbios_pn, "D707",
218+ sizeof(atom_ctx->vbios_pn)))
219+ control->i2c_address = EEPROM_I2C_MADDR_0;
220+ else
221+ control->i2c_address = EEPROM_I2C_MADDR_4;
222+ return true;
217223 case IP_VERSION(13, 0, 6):
218224 case IP_VERSION(13, 0, 10):
219225 control->i2c_address = EEPROM_I2C_MADDR_4;
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+1−3
@@ -959,10 +959,8 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo) · 958 unmodified lines
959959 return 0;
960960
961961 addr = amdgpu_gmc_agp_addr(bo);
962− if (addr != AMDGPU_BO_INVALID_OFFSET) {
963− bo->resource->start = addr >> PAGE_SHIFT;
962+ if (addr != AMDGPU_BO_INVALID_OFFSET)
964963 return 0;
965− }
966964
967965 /* allocate GART space */
968966 placement.num_placement = 1;
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+1−0
@@ -398,6 +398,7 @@ int amdgpu_uvd_sw_fini(struct amdgpu_device *adev) · 397 unmodified lines
398398 * amdgpu_uvd_entity_init - init entity
399399 *
400400 * @adev: amdgpu_device pointer
401+ * @ring: amdgpu_ring pointer to check
401402 *
402403 * Initialize the entity used for handle management in the kernel driver.
403404 */
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c+1−0
@@ -230,6 +230,7 @@ int amdgpu_vce_sw_fini(struct amdgpu_device *adev) · 229 unmodified lines
230230 * amdgpu_vce_entity_init - init entity
231231 *
232232 * @adev: amdgpu_device pointer
233+ * @ring: amdgpu_ring pointer to check
233234 *
234235 * Initialize the entity used for handle management in the kernel driver.
235236 */
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+9−1
@@ -89,6 +89,10 @@ MODULE_FIRMWARE("amdgpu/gc_11_5_0_me.bin"); · 88 unmodified lines
8989 MODULE_FIRMWARE("amdgpu/gc_11_5_0_mec.bin");
9090 MODULE_FIRMWARE("amdgpu/gc_11_5_0_rlc.bin");
9191
92+static const struct soc15_reg_golden golden_settings_gc_11_0[] = {
93+ SOC15_REG_GOLDEN_VALUE(GC, 0, regTCP_CNTL, 0x20000000, 0x20000000)
94+};
95+
9296 static const struct soc15_reg_golden golden_settings_gc_11_0_1[] =
9397 {
9498 SOC15_REG_GOLDEN_VALUE(GC, 0, regCGTT_GS_NGG_CLK_CTRL, 0x9fff8fff, 0x00000010),
@@ -304,6 +308,10 @@ static void gfx_v11_0_init_golden_registers(struct amdgpu_device *adev) · 209 unmodified lines
304308 default:
305309 break;
306310 }
311+ soc15_program_register_sequence(adev,
312+ golden_settings_gc_11_0,
313+ (const u32)ARRAY_SIZE(golden_settings_gc_11_0));
314+
307315 }
308316
309317 static void gfx_v11_0_write_data_to_reg(struct amdgpu_ring *ring, int eng_sel,
@@ -419,7 +427,7 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) · 109 unmodified lines
419427 adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
420428 cpu_ptr = &adev->wb.wb[index];
421429
422− r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib);
430+ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
423431 if (r) {
424432 DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
425433 goto err1;
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+2−2
@@ -883,8 +883,8 @@ static int gfx_v8_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) · 882 unmodified lines
883883 gpu_addr = adev->wb.gpu_addr + (index * 4);
884884 adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
885885 memset(&ib, 0, sizeof(ib));
886− r = amdgpu_ib_get(adev, NULL, 16,
887− AMDGPU_IB_POOL_DIRECT, &ib);
886+
887+ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
888888 if (r)
889889 goto err1;
890890
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c+2−2
@@ -1039,8 +1039,8 @@ static int gfx_v9_0_ring_test_ib(struct amdgpu_ring *ring, long timeout) · 1038 unmodified lines
10391039 gpu_addr = adev->wb.gpu_addr + (index * 4);
10401040 adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
10411041 memset(&ib, 0, sizeof(ib));
1042− r = amdgpu_ib_get(adev, NULL, 16,
1043− AMDGPU_IB_POOL_DIRECT, &ib);
1042+
1043+ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
10441044 if (r)
10451045 goto err1;
10461046
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c+2−2
@@ -297,8 +297,8 @@ static int gfx_v9_4_3_ring_test_ib(struct amdgpu_ring *ring, long timeout) · 296 unmodified lines
297297 gpu_addr = adev->wb.gpu_addr + (index * 4);
298298 adev->wb.wb[index] = cpu_to_le32(0xCAFEDEAD);
299299 memset(&ib, 0, sizeof(ib));
300− r = amdgpu_ib_get(adev, NULL, 16,
301− AMDGPU_IB_POOL_DIRECT, &ib);
300+
301+ r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
302302 if (r)
303303 goto err1;
304304
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c+1−1
@@ -675,7 +675,7 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev, · 674 unmodified lines
675675 amdgpu_gmc_set_agp_default(adev, mc);
676676 amdgpu_gmc_vram_location(adev, &adev->gmc, base);
677677 amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
678− if (!amdgpu_sriov_vf(adev))
678+ if (!amdgpu_sriov_vf(adev) && (amdgpu_agp == 1))
679679 amdgpu_gmc_agp_location(adev, mc);
680680
681681 /* base offset of vram pages */
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c+3−2
@@ -640,8 +640,9 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev, · 639 unmodified lines
640640 amdgpu_gmc_set_agp_default(adev, mc);
641641 amdgpu_gmc_vram_location(adev, &adev->gmc, base);
642642 amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_HIGH);
643− if (!amdgpu_sriov_vf(adev) ||
644− (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 5, 0)))
643+ if (!amdgpu_sriov_vf(adev) &&
644+ (amdgpu_ip_version(adev, GC_HWIP, 0) < IP_VERSION(11, 5, 0)) &&
645+ (amdgpu_agp == 1))
645646 amdgpu_gmc_agp_location(adev, mc);
646647
647648 /* base offset of vram pages */
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+4−3
@@ -1630,7 +1630,7 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev, · 1629 unmodified lines
16301630 } else {
16311631 amdgpu_gmc_vram_location(adev, mc, base);
16321632 amdgpu_gmc_gart_location(adev, mc, AMDGPU_GART_PLACEMENT_BEST_FIT);
1633− if (!amdgpu_sriov_vf(adev))
1633+ if (!amdgpu_sriov_vf(adev) && (amdgpu_agp == 1))
16341634 amdgpu_gmc_agp_location(adev, mc);
16351635 }
16361636 /* base offset of vram pages */
@@ -2170,8 +2170,6 @@ static int gmc_v9_0_sw_fini(void *handle) · 533 unmodified lines
21702170
21712171 if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3))
21722172 amdgpu_gmc_sysfs_fini(adev);
2173− adev->gmc.num_mem_partitions = 0;
2174− kfree(adev->gmc.mem_partitions);
21752173
21762174 amdgpu_gmc_ras_fini(adev);
21772175 amdgpu_gem_force_release(adev);
@@ -2185,6 +2183,9 @@ static int gmc_v9_0_sw_fini(void *handle) · 7 unmodified lines
21852183 amdgpu_bo_free_kernel(&adev->gmc.pdb0_bo, NULL, &adev->gmc.ptr_pdb0);
21862184 amdgpu_bo_fini(adev);
21872185
2186+ adev->gmc.num_mem_partitions = 0;
2187+ kfree(adev->gmc.mem_partitions);
2188+
21882189 return 0;
21892190 }
21902191
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c+5−0
@@ -129,6 +129,11 @@ static void hdp_v4_0_get_clockgating_state(struct amdgpu_device *adev, · 128 unmodified lines
129129 {
130130 int data;
131131
132+ if (amdgpu_ip_version(adev, HDP_HWIP, 0) == IP_VERSION(4, 4, 2)) {
133+ /* Default enabled */
134+ *flags |= AMD_CG_SUPPORT_HDP_MGCG;
135+ return;
136+ }
132137 /* AMD_CG_SUPPORT_HDP_LS */
133138 data = RREG32(SOC15_REG_OFFSET(HDP, 0, mmHDP_MEM_POWER_LS));
134139 if (data & HDP_MEM_POWER_LS__LS_ENABLE_MASK)
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c+3−3
@@ -130,6 +130,9 @@ static void mmhub_v1_8_init_system_aperture_regs(struct amdgpu_device *adev) · 129 unmodified lines
130130 uint64_t value;
131131 int i;
132132
133+ if (amdgpu_sriov_vf(adev))
134+ return;
135+
133136 inst_mask = adev->aid_mask;
134137 for_each_inst(i, inst_mask) {
135138 /* Program the AGP BAR */
@@ -139,9 +142,6 @@ static void mmhub_v1_8_init_system_aperture_regs(struct amdgpu_device *adev) · 3 unmodified lines
139142 WREG32_SOC15(MMHUB, i, regMC_VM_AGP_TOP,
140143 adev->gmc.agp_end >> 24);
141144
142− if (amdgpu_sriov_vf(adev))
143− return;
144−
145145 /* Program the system aperture low logical page number. */
146146 WREG32_SOC15(MMHUB, i, regMC_VM_SYSTEM_APERTURE_LOW_ADDR,
147147 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18);
drivers/gpu/drm/amd/amdgpu/nbio_v7_11.c+9−9
@@ -259,17 +259,17 @@ const struct nbio_hdp_flush_reg nbio_v7_11_hdp_flush_reg = { · 258 unmodified lines
259259
260260 static void nbio_v7_11_init_registers(struct amdgpu_device *adev)
261261 {
262−/* uint32_t def, data;
262+ uint32_t def, data;
263+
264+ def = data = RREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3);
265+ data = REG_SET_FIELD(data, BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3,
266+ CI_SWUS_MAX_READ_REQUEST_SIZE_MODE, 1);
267+ data = REG_SET_FIELD(data, BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3,
268+ CI_SWUS_MAX_READ_REQUEST_SIZE_PRIV, 1);
263269
264− def = data = RREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3);
265− data = REG_SET_FIELD(data, BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3,
266− CI_SWUS_MAX_READ_REQUEST_SIZE_MODE, 1);
267− data = REG_SET_FIELD(data, BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3,
268− CI_SWUS_MAX_READ_REQUEST_SIZE_PRIV, 1);
270+ if (def != data)
271+ WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3, data);
269272
270− if (def != data)
271− WREG32_SOC15(NBIO, 0, regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3, data);
272−*/
273273 }
274274
275275 static void nbio_v7_11_update_medium_grain_clock_gating(struct amdgpu_device *adev,
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c+0−5
@@ -611,11 +611,6 @@ static void nbio_v7_9_handle_ras_controller_intr_no_bifring(struct amdgpu_device · 610 unmodified lines
611611
612612 dev_info(adev->dev, "RAS controller interrupt triggered "
613613 "by NBIF error\n");
614−
615− /* ras_controller_int is dedicated for nbif ras error,
616− * not the global interrupt for sync flood
617− */
618− amdgpu_ras_reset_gpu(adev);
619614 }
620615
621616 amdgpu_ras_error_data_fini(&err_data);
drivers/gpu/drm/amd/amdgpu/psp_v13_0.c+8−4
@@ -60,7 +60,7 @@ MODULE_FIRMWARE("amdgpu/psp_14_0_0_ta.bin"); · 59 unmodified lines
6060 #define GFX_CMD_USB_PD_USE_LFB 0x480
6161
6262 /* Retry times for vmbx ready wait */
63−#define PSP_VMBX_POLLING_LIMIT 20000
63+#define PSP_VMBX_POLLING_LIMIT 3000
6464
6565 /* VBIOS gfl defines */
6666 #define MBOX_READY_MASK 0x80000000
@@ -161,14 +161,18 @@ static int psp_v13_0_wait_for_vmbx_ready(struct psp_context *psp) · 94 unmodified lines
161161 static int psp_v13_0_wait_for_bootloader(struct psp_context *psp)
162162 {
163163 struct amdgpu_device *adev = psp->adev;
164− int retry_loop, ret;
164+ int retry_loop, retry_cnt, ret;
165165
166+ retry_cnt =
167+ (amdgpu_ip_version(adev, MP0_HWIP, 0) == IP_VERSION(13, 0, 6)) ?
168+ PSP_VMBX_POLLING_LIMIT :
169+ 10;
166170 /* Wait for bootloader to signify that it is ready having bit 31 of
167171 * C2PMSG_35 set to 1. All other bits are expected to be cleared.
168172 * If there is an error in processing command, bits[7:0] will be set.
169173 * This is applicable for PSP v13.0.6 and newer.
170174 */
171− for (retry_loop = 0; retry_loop < PSP_VMBX_POLLING_LIMIT; retry_loop++) {
175+ for (retry_loop = 0; retry_loop < retry_cnt; retry_loop++) {
172176 ret = psp_wait_for(
173177 psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
174178 0x80000000, 0xffffffff, false);
@@ -821,7 +825,7 @@ static int psp_v13_0_query_boot_status(struct psp_context *psp) · 646 unmodified lines
821825 if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6))
822826 return 0;
823827
824− if (RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_59) < 0x00a10007)
828+ if (RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_59) < 0x00a10109)
825829 return 0;
826830
827831 for_each_inst(i, inst_mask) {
drivers/gpu/drm/amd/amdgpu/soc15.c+15−5
@@ -1161,6 +1161,11 @@ static int soc15_common_early_init(void *handle) · 1160 unmodified lines
11611161 AMD_PG_SUPPORT_VCN_DPG |
11621162 AMD_PG_SUPPORT_JPEG;
11631163 adev->external_rev_id = adev->rev_id + 0x46;
1164+ /* GC 9.4.3 uses MMIO register region hole at a different offset */
1165+ if (!amdgpu_sriov_vf(adev)) {
1166+ adev->rmmio_remap.reg_offset = 0x1A000;
1167+ adev->rmmio_remap.bus_addr = adev->rmmio_base + 0x1A000;
1168+ }
11641169 break;
11651170 default:
11661171 /* FIXME: not supported yet */
@@ -1418,11 +1423,14 @@ static void soc15_common_get_clockgating_state(void *handle, u64 *flags) · 251 unmodified lines
14181423 if (amdgpu_sriov_vf(adev))
14191424 *flags = 0;
14201425
1421− adev->nbio.funcs->get_clockgating_state(adev, flags);
1426+ if (adev->nbio.funcs && adev->nbio.funcs->get_clockgating_state)
1427+ adev->nbio.funcs->get_clockgating_state(adev, flags);
14221428
1423− adev->hdp.funcs->get_clock_gating_state(adev, flags);
1429+ if (adev->hdp.funcs && adev->hdp.funcs->get_clock_gating_state)
1430+ adev->hdp.funcs->get_clock_gating_state(adev, flags);
14241431
1425− if (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 2)) {
1432+ if ((amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 2)) &&
1433+ (amdgpu_ip_version(adev, MP0_HWIP, 0) != IP_VERSION(13, 0, 6))) {
14261434 /* AMD_CG_SUPPORT_DRM_MGCG */
14271435 data = RREG32(SOC15_REG_OFFSET(MP0, 0, mmMP0_MISC_CGTT_CTRL0));
14281436 if (!(data & 0x01000000))
@@ -1435,9 +1443,11 @@ static void soc15_common_get_clockgating_state(void *handle, u64 *flags) · 6 unmodified lines
14351443 }
14361444
14371445 /* AMD_CG_SUPPORT_ROM_MGCG */
1438− adev->smuio.funcs->get_clock_gating_state(adev, flags);
1446+ if (adev->smuio.funcs && adev->smuio.funcs->get_clock_gating_state)
1447+ adev->smuio.funcs->get_clock_gating_state(adev, flags);
14391448
1440− adev->df.funcs->get_clockgating_state(adev, flags);
1449+ if (adev->df.funcs && adev->df.funcs->get_clockgating_state)
1450+ adev->df.funcs->get_clockgating_state(adev, flags);
14411451 }
14421452
14431453 static int soc15_common_set_powergating_state(void *handle,
drivers/gpu/drm/amd/amdkfd/kfd_priv.h+1−1
@@ -1128,7 +1128,7 @@ static inline struct kfd_node *kfd_node_by_irq_ids(struct amdgpu_device *adev, · 1127 unmodified lines
11281128 struct kfd_dev *dev = adev->kfd.dev;
11291129 uint32_t i;
11301130
1131− if (adev->ip_versions[GC_HWIP][0] != IP_VERSION(9, 4, 3))
1131+ if (KFD_GC_VERSION(dev) != IP_VERSION(9, 4, 3))
11321132 return dev->nodes[0];
11331133
11341134 for (i = 0; i < dev->num_nodes; i++)
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c+33−21
@@ -169,16 +169,43 @@ int pqm_init(struct process_queue_manager *pqm, struct kfd_process *p) · 168 unmodified lines
169169 return 0;
170170 }
171171
172+static void pqm_clean_queue_resource(struct process_queue_manager *pqm,
173+ struct process_queue_node *pqn)
174+{
175+ struct kfd_node *dev;
176+ struct kfd_process_device *pdd;
177+
178+ dev = pqn->q->device;
179+
180+ pdd = kfd_get_process_device_data(dev, pqm->process);
181+ if (!pdd) {
182+ pr_err("Process device data doesn't exist\n");
183+ return;
184+ }
185+
186+ if (pqn->q->gws) {
187+ if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) &&
188+ !dev->kfd->shared_resources.enable_mes)
189+ amdgpu_amdkfd_remove_gws_from_process(
190+ pqm->process->kgd_process_info, pqn->q->gws);
191+ pdd->qpd.num_gws = 0;
192+ }
193+
194+ if (dev->kfd->shared_resources.enable_mes) {
195+ amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->gang_ctx_bo);
196+ if (pqn->q->wptr_bo)
197+ amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo);
198+ }
199+}
200+
172201 void pqm_uninit(struct process_queue_manager *pqm)
173202 {
174203 struct process_queue_node *pqn, *next;
175204
176205 list_for_each_entry_safe(pqn, next, &pqm->queues, process_queue_list) {
177− if (pqn->q && pqn->q->gws &&
178− KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) &&
179− !pqn->q->device->kfd->shared_resources.enable_mes)
180− amdgpu_amdkfd_remove_gws_from_process(pqm->process->kgd_process_info,
181− pqn->q->gws);
206+ if (pqn->q)
207+ pqm_clean_queue_resource(pqm, pqn);
208+
182209 kfd_procfs_del_queue(pqn->q);
183210 uninit_queue(pqn->q);
184211 list_del(&pqn->process_queue_list);
@@ -461,22 +488,7 @@ int pqm_destroy_queue(struct process_queue_manager *pqm, unsigned int qid) · 276 unmodified lines
461488 goto err_destroy_queue;
462489 }
463490
464− if (pqn->q->gws) {
465− if (KFD_GC_VERSION(pqn->q->device) != IP_VERSION(9, 4, 3) &&
466− !dev->kfd->shared_resources.enable_mes)
467− amdgpu_amdkfd_remove_gws_from_process(
468− pqm->process->kgd_process_info,
469− pqn->q->gws);
470− pdd->qpd.num_gws = 0;
471− }
472−
473− if (dev->kfd->shared_resources.enable_mes) {
474− amdgpu_amdkfd_free_gtt_mem(dev->adev,
475− pqn->q->gang_ctx_bo);
476− if (pqn->q->wptr_bo)
477− amdgpu_amdkfd_free_gtt_mem(dev->adev, pqn->q->wptr_bo);
478−
479− }
491+ pqm_clean_queue_resource(pqm, pqn);
480492 uninit_queue(pqn->q);
481493 }
482494
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+19−13
@@ -2079,7 +2079,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) · 2078 unmodified lines
20792079 struct dmub_srv_create_params create_params;
20802080 struct dmub_srv_region_params region_params;
20812081 struct dmub_srv_region_info region_info;
2082− struct dmub_srv_fb_params fb_params;
2082+ struct dmub_srv_memory_params memory_params;
20832083 struct dmub_srv_fb_info *fb_info;
20842084 struct dmub_srv *dmub_srv;
20852085 const struct dmcub_firmware_header_v1_0 *hdr;
@@ -2182,6 +2182,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) · 96 unmodified lines
21822182 adev->dm.dmub_fw->data +
21832183 le32_to_cpu(hdr->header.ucode_array_offset_bytes) +
21842184 PSP_HEADER_BYTES;
2185+ region_params.is_mailbox_in_inbox = false;
21852186
21862187 status = dmub_srv_calc_region_info(dmub_srv, &region_params,
21872188 &region_info);
@@ -2205,10 +2206,10 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) · 17 unmodified lines
22052206 return r;
22062207
22072208 /* Rebase the regions on the framebuffer address. */
2208− memset(&fb_params, 0, sizeof(fb_params));
2209− fb_params.cpu_addr = adev->dm.dmub_bo_cpu_addr;
2210− fb_params.gpu_addr = adev->dm.dmub_bo_gpu_addr;
2211− fb_params.region_info = &region_info;
2209+ memset(&memory_params, 0, sizeof(memory_params));
2210+ memory_params.cpu_fb_addr = adev->dm.dmub_bo_cpu_addr;
2211+ memory_params.gpu_fb_addr = adev->dm.dmub_bo_gpu_addr;
2212+ memory_params.region_info = &region_info;
22122213
22132214 adev->dm.dmub_fb_info =
22142215 kzalloc(sizeof(*adev->dm.dmub_fb_info), GFP_KERNEL);
@@ -2220,7 +2221,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) · 5 unmodified lines
22202221 return -ENOMEM;
22212222 }
22222223
2223− status = dmub_srv_calc_fb_info(dmub_srv, &fb_params, fb_info);
2224+ status = dmub_srv_calc_mem_info(dmub_srv, &memory_params, fb_info);
22242225 if (status != DMUB_STATUS_OK) {
22252226 DRM_ERROR("Error calculating DMUB FB info: %d\n", status);
22262227 return -EINVAL;
@@ -6266,7 +6267,7 @@ int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connector, · 4039 unmodified lines
62666267 dm_new_state->underscan_enable = val;
62676268 ret = 0;
62686269 } else if (property == adev->mode_info.abm_level_property) {
6269− dm_new_state->abm_level = val;
6270+ dm_new_state->abm_level = val ?: ABM_LEVEL_IMMEDIATE_DISABLE;
62706271 ret = 0;
62716272 }
62726273
@@ -6311,7 +6312,8 @@ int amdgpu_dm_connector_atomic_get_property(struct drm_connector *connector, · 38 unmodified lines
63116312 *val = dm_state->underscan_enable;
63126313 ret = 0;
63136314 } else if (property == adev->mode_info.abm_level_property) {
6314− *val = dm_state->abm_level;
6315+ *val = (dm_state->abm_level != ABM_LEVEL_IMMEDIATE_DISABLE) ?
6316+ dm_state->abm_level : 0;
63156317 ret = 0;
63166318 }
63176319
@@ -6384,7 +6386,8 @@ void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector) · 66 unmodified lines
63846386 state->pbn = 0;
63856387
63866388 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP)
6387− state->abm_level = amdgpu_dm_abm_level;
6389+ state->abm_level = amdgpu_dm_abm_level ?:
6390+ ABM_LEVEL_IMMEDIATE_DISABLE;
63886391
63896392 __drm_atomic_helper_connector_reset(connector, &state->base);
63906393 }
@@ -7481,6 +7484,9 @@ static int amdgpu_dm_i2c_xfer(struct i2c_adapter *i2c_adap, · 1090 unmodified lines
74817484 int i;
74827485 int result = -EIO;
74837486
7487+ if (!ddc_service->ddc_pin || !ddc_service->ddc_pin->hw_info.hw_supported)
7488+ return result;
7489+
74847490 cmd.payloads = kcalloc(num, sizeof(struct i2c_payload), GFP_KERNEL);
74857491
74867492 if (!cmd.payloads)
@@ -9603,14 +9609,14 @@ static bool should_reset_plane(struct drm_atomic_state *state, · 2116 unmodified lines
96039609 struct drm_plane *other;
96049610 struct drm_plane_state *old_other_state, *new_other_state;
96059611 struct drm_crtc_state *new_crtc_state;
9612+ struct amdgpu_device *adev = drm_to_adev(plane->dev);
96069613 int i;
96079614
96089615 /*
9609− * TODO: Remove this hack once the checks below are sufficient
9610− * enough to determine when we need to reset all the planes on
9611− * the stream.
9616+ * TODO: Remove this hack for all asics once it proves that the
9617+ * fast updates works fine on DCN3.2+.
96129618 */
9613− if (state->allow_modeset)
9619+ if (adev->ip_versions[DCE_HWIP][0] < IP_VERSION(3, 2, 0) && state->allow_modeset)
96149620 return true;
96159621
96169622 /* Exit early if we know that we're adding or removing the plane. */
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c+7−4
@@ -63,6 +63,12 @@ static void apply_edid_quirks(struct edid *edid, struct dc_edid_caps *edid_caps) · 62 unmodified lines
6363 DRM_DEBUG_DRIVER("Disabling FAMS on monitor with panel id %X\n", panel_id);
6464 edid_caps->panel_patch.disable_fams = true;
6565 break;
66+ /* Workaround for some monitors that do not clear DPCD 0x317 if FreeSync is unsupported */
67+ case drm_edid_encode_panel_id('A', 'U', 'O', 0xA7AB):
68+ case drm_edid_encode_panel_id('A', 'U', 'O', 0xE69B):
69+ DRM_DEBUG_DRIVER("Clearing DPCD 0x317 on monitor with panel id %X\n", panel_id);
70+ edid_caps->panel_patch.remove_sink_ext_caps = true;
71+ break;
6672 default:
6773 return;
6874 }
@@ -536,11 +542,8 @@ bool dm_helpers_dp_read_dpcd( · 467 unmodified lines
536542
537543 struct amdgpu_dm_connector *aconnector = link->priv;
538544
539− if (!aconnector) {
540− drm_dbg_dp(aconnector->base.dev,
541− "Failed to find connector for link!\n");
545+ if (!aconnector)
542546 return false;
543− }
544547
545548 return drm_dp_dpcd_read(&aconnector->dm_dp_aux.aux, address, data,
546549 size) == size;
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+14−15
@@ -1604,31 +1604,31 @@ enum dc_status dm_dp_mst_is_port_support_mode( · 1603 unmodified lines
16041604 unsigned int upper_link_bw_in_kbps = 0, down_link_bw_in_kbps = 0;
16051605 unsigned int max_compressed_bw_in_kbps = 0;
16061606 struct dc_dsc_bw_range bw_range = {0};
1607− struct drm_dp_mst_topology_mgr *mst_mgr;
1607+ uint16_t full_pbn = aconnector->mst_output_port->full_pbn;
16081608
16091609 /*
1610− * check if the mode could be supported if DSC pass-through is supported
1611− * AND check if there enough bandwidth available to support the mode
1612− * with DSC enabled.
1610+ * Consider the case with the depth of the mst topology tree is equal or less than 2
1611+ * A. When dsc bitstream can be transmitted along the entire path
1612+ * 1. dsc is possible between source and branch/leaf device (common dsc params is possible), AND
1613+ * 2. dsc passthrough supported at MST branch, or
1614+ * 3. dsc decoding supported at leaf MST device
1615+ * Use maximum dsc compression as bw constraint
1616+ * B. When dsc bitstream cannot be transmitted along the entire path
1617+ * Use native bw as bw constraint
16131618 */
16141619 if (is_dsc_common_config_possible(stream, &bw_range) &&
1615− aconnector->mst_output_port->passthrough_aux) {
1616− mst_mgr = aconnector->mst_output_port->mgr;
1617− mutex_lock(&mst_mgr->lock);
1618−
1620+ (aconnector->mst_output_port->passthrough_aux ||
1621+ aconnector->dsc_aux == &aconnector->mst_output_port->aux)) {
16191622 cur_link_settings = stream->link->verified_link_cap;
16201623
16211624 upper_link_bw_in_kbps = dc_link_bandwidth_kbps(aconnector->dc_link,
1622− &cur_link_settings
1623− );
1624− down_link_bw_in_kbps = kbps_from_pbn(aconnector->mst_output_port->full_pbn);
1625+ &cur_link_settings);
1626+ down_link_bw_in_kbps = kbps_from_pbn(full_pbn);
16251627
16261628 /* pick the bottleneck */
16271629 end_to_end_bw_in_kbps = min(upper_link_bw_in_kbps,
16281630 down_link_bw_in_kbps);
16291631
1630− mutex_unlock(&mst_mgr->lock);
1631−
16321632 /*
16331633 * use the maximum dsc compression bandwidth as the required
16341634 * bandwidth for the mode
@@ -1643,8 +1643,7 @@ enum dc_status dm_dp_mst_is_port_support_mode( · 8 unmodified lines
16431643 /* check if mode could be supported within full_pbn */
16441644 bpp = convert_dc_color_depth_into_bpc(stream->timing.display_color_depth) * 3;
16451645 pbn = drm_dp_calc_pbn_mode(stream->timing.pix_clk_100hz / 10, bpp, false);
1646−
1647− if (pbn > aconnector->mst_output_port->full_pbn)
1646+ if (pbn > full_pbn)
16481647 return DC_FAIL_BANDWIDTH_VALIDATE;
16491648 }
16501649
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c+7−1
@@ -2386,7 +2386,13 @@ static enum bp_result get_vram_info_v30( · 2385 unmodified lines
23862386 return BP_RESULT_BADBIOSTABLE;
23872387
23882388 info->num_chans = info_v30->channel_num;
2389− info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
2389+ /* As suggested by VBIOS we should always use
2390+ * dram_channel_width_bytes = 2 when using VRAM
2391+ * table version 3.0. This is because the channel_width
2392+ * param in the VRAM info table is changed in 7000 series and
2393+ * no longer represents the memory channel width.
2394+ */
2395+ info->dram_channel_width_bytes = 2;
23902396
23912397 return result;
23922398 }
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c+4−4
@@ -334,7 +334,7 @@ static struct wm_table lpddr5_wm_table = { · 333 unmodified lines
334334 {
335335 .wm_inst = WM_A,
336336 .wm_type = WM_TYPE_PSTATE_CHG,
337− .pstate_latency_us = 11.65333,
337+ .pstate_latency_us = 129.0,
338338 .sr_exit_time_us = 11.5,
339339 .sr_enter_plus_exit_time_us = 14.5,
340340 .valid = true,
@@ -342,7 +342,7 @@ static struct wm_table lpddr5_wm_table = { · 1 unmodified line
342342 {
343343 .wm_inst = WM_B,
344344 .wm_type = WM_TYPE_PSTATE_CHG,
345− .pstate_latency_us = 11.65333,
345+ .pstate_latency_us = 129.0,
346346 .sr_exit_time_us = 11.5,
347347 .sr_enter_plus_exit_time_us = 14.5,
348348 .valid = true,
@@ -350,7 +350,7 @@ static struct wm_table lpddr5_wm_table = { · 1 unmodified line
350350 {
351351 .wm_inst = WM_C,
352352 .wm_type = WM_TYPE_PSTATE_CHG,
353− .pstate_latency_us = 11.65333,
353+ .pstate_latency_us = 129.0,
354354 .sr_exit_time_us = 11.5,
355355 .sr_enter_plus_exit_time_us = 14.5,
356356 .valid = true,
@@ -358,7 +358,7 @@ static struct wm_table lpddr5_wm_table = { · 1 unmodified line
358358 {
359359 .wm_inst = WM_D,
360360 .wm_type = WM_TYPE_PSTATE_CHG,
361− .pstate_latency_us = 11.65333,
361+ .pstate_latency_us = 129.0,
362362 .sr_exit_time_us = 11.5,
363363 .sr_enter_plus_exit_time_us = 14.5,
364364 .valid = true,
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c+88−89
@@ -232,6 +232,10 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base, · 231 unmodified lines
232232 if (dc->work_arounds.skip_clock_update)
233233 return;
234234
235+ /* DTBCLK is fixed, so set a default if unspecified. */
236+ if (new_clocks->dtbclk_en && !new_clocks->ref_dtbclk_khz)
237+ new_clocks->ref_dtbclk_khz = 600000;
238+
235239 /*
236240 * if it is safe to lower, but we are already in the lower state, we don't have to do anything
237241 * also if safe to lower is false, we just go in the higher state
@@ -265,8 +269,10 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base, · 27 unmodified lines
265269
266270 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) {
267271 dcn35_smu_set_dtbclk(clk_mgr, true);
268− dcn35_update_clocks_update_dtb_dto(clk_mgr, context, clk_mgr_base->clks.ref_dtbclk_khz);
269272 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en;
273+
274+ dcn35_update_clocks_update_dtb_dto(clk_mgr, context, new_clocks->ref_dtbclk_khz);
275+ clk_mgr_base->clks.ref_dtbclk_khz = new_clocks->ref_dtbclk_khz;
270276 }
271277
272278 /* check that we're not already in D0 */
@@ -314,17 +320,12 @@ void dcn35_update_clocks(struct clk_mgr *clk_mgr_base, · 41 unmodified lines
314320 update_dispclk = true;
315321 }
316322
317− if (!new_clocks->dtbclk_en) {
318− new_clocks->ref_dtbclk_khz = 600000;
319− }
320−
321323 /* clock limits are received with MHz precision, divide by 1000 to prevent setting clocks at every call */
322324 if (!dc->debug.disable_dtb_ref_clk_switch &&
323− should_set_clock(safe_to_lower, new_clocks->ref_dtbclk_khz / 1000, clk_mgr_base->clks.ref_dtbclk_khz / 1000)) {
324− /* DCCG requires KHz precision for DTBCLK */
325− dcn35_smu_set_dtbclk(clk_mgr, true);
326−
327− dcn35_update_clocks_update_dtb_dto(clk_mgr, context, clk_mgr_base->clks.ref_dtbclk_khz);
325+ should_set_clock(safe_to_lower, new_clocks->ref_dtbclk_khz / 1000,
326+ clk_mgr_base->clks.ref_dtbclk_khz / 1000)) {
327+ dcn35_update_clocks_update_dtb_dto(clk_mgr, context, new_clocks->ref_dtbclk_khz);
328+ clk_mgr_base->clks.ref_dtbclk_khz = new_clocks->ref_dtbclk_khz;
328329 }
329330
330331 if (dpp_clock_lowered) {
@@ -443,32 +444,32 @@ static struct wm_table ddr5_wm_table = { · 112 unmodified lines
443444 .wm_inst = WM_A,
444445 .wm_type = WM_TYPE_PSTATE_CHG,
445446 .pstate_latency_us = 11.72,
446− .sr_exit_time_us = 9,
447− .sr_enter_plus_exit_time_us = 11,
447+ .sr_exit_time_us = 14.0,
448+ .sr_enter_plus_exit_time_us = 16.0,
448449 .valid = true,
449450 },
450451 {
451452 .wm_inst = WM_B,
452453 .wm_type = WM_TYPE_PSTATE_CHG,
453454 .pstate_latency_us = 11.72,
454− .sr_exit_time_us = 9,
455− .sr_enter_plus_exit_time_us = 11,
455+ .sr_exit_time_us = 14.0,
456+ .sr_enter_plus_exit_time_us = 16.0,
456457 .valid = true,
457458 },
458459 {
459460 .wm_inst = WM_C,
460461 .wm_type = WM_TYPE_PSTATE_CHG,
461462 .pstate_latency_us = 11.72,
462− .sr_exit_time_us = 9,
463− .sr_enter_plus_exit_time_us = 11,
463+ .sr_exit_time_us = 14.0,
464+ .sr_enter_plus_exit_time_us = 16.0,
464465 .valid = true,
465466 },
466467 {
467468 .wm_inst = WM_D,
468469 .wm_type = WM_TYPE_PSTATE_CHG,
469470 .pstate_latency_us = 11.72,
470− .sr_exit_time_us = 9,
471− .sr_enter_plus_exit_time_us = 11,
471+ .sr_exit_time_us = 14.0,
472+ .sr_enter_plus_exit_time_us = 16.0,
472473 .valid = true,
473474 },
474475 }
@@ -480,32 +481,32 @@ static struct wm_table lpddr5_wm_table = { · 5 unmodified lines
480481 .wm_inst = WM_A,
481482 .wm_type = WM_TYPE_PSTATE_CHG,
482483 .pstate_latency_us = 11.65333,
483− .sr_exit_time_us = 11.5,
484− .sr_enter_plus_exit_time_us = 14.5,
484+ .sr_exit_time_us = 14.0,
485+ .sr_enter_plus_exit_time_us = 16.0,
485486 .valid = true,
486487 },
487488 {
488489 .wm_inst = WM_B,
489490 .wm_type = WM_TYPE_PSTATE_CHG,
490491 .pstate_latency_us = 11.65333,
491− .sr_exit_time_us = 11.5,
492− .sr_enter_plus_exit_time_us = 14.5,
492+ .sr_exit_time_us = 14.0,
493+ .sr_enter_plus_exit_time_us = 16.0,
493494 .valid = true,
494495 },
495496 {
496497 .wm_inst = WM_C,
497498 .wm_type = WM_TYPE_PSTATE_CHG,
498499 .pstate_latency_us = 11.65333,
499− .sr_exit_time_us = 11.5,
500− .sr_enter_plus_exit_time_us = 14.5,
500+ .sr_exit_time_us = 14.0,
501+ .sr_enter_plus_exit_time_us = 16.0,
501502 .valid = true,
502503 },
503504 {
504505 .wm_inst = WM_D,
505506 .wm_type = WM_TYPE_PSTATE_CHG,
506507 .pstate_latency_us = 11.65333,
507− .sr_exit_time_us = 11.5,
508− .sr_enter_plus_exit_time_us = 14.5,
508+ .sr_exit_time_us = 14.0,
509+ .sr_enter_plus_exit_time_us = 16.0,
509510 .valid = true,
510511 },
511512 }
@@ -515,11 +516,6 @@ static DpmClocks_t_dcn35 dummy_clocks; · 3 unmodified lines
515516
516517 static struct dcn35_watermarks dummy_wms = { 0 };
517518
518−static struct dcn35_ss_info_table ss_info_table = {
519− .ss_divider = 1000,
520− .ss_percentage = {0, 0, 375, 375, 375}
521−};
522−
523519 static void dcn35_build_watermark_ranges(struct clk_bw_params *bw_params, struct dcn35_watermarks *table)
524520 {
525521 int i, num_valid_sets;
@@ -653,27 +649,47 @@ static unsigned int convert_wck_ratio(uint8_t wck_ratio) · 127 unmodified lines
653649 return 1;
654650 }
655651
652+static inline uint32_t calc_dram_speed_mts(const MemPstateTable_t *entry)
653+{
654+ return entry->UClk * convert_wck_ratio(entry->WckRatio) * 2;
655+}
656+
656657 static void dcn35_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk_mgr,
657658 struct integrated_info *bios_info,
658659 DpmClocks_t_dcn35 *clock_table)
659660 {
660661 struct clk_bw_params *bw_params = clk_mgr->base.bw_params;
661662 struct clk_limit_table_entry def_max = bw_params->clk_table.entries[bw_params->clk_table.num_entries - 1];
662− uint32_t max_pstate = 0, max_uclk = 0, max_fclk = 0;
663− uint32_t min_pstate = 0, max_dispclk = 0, max_dppclk = 0;
663+ uint32_t max_fclk = 0, min_pstate = 0, max_dispclk = 0, max_dppclk = 0;
664+ uint32_t max_pstate = 0, max_dram_speed_mts = 0, min_dram_speed_mts = 0;
664665 int i;
665666
667+ /* Determine min/max p-state values. */
666668 for (i = 0; i < clock_table->NumMemPstatesEnabled; i++) {
667− if (is_valid_clock_value(clock_table->MemPstateTable[i].UClk) &&
668− clock_table->MemPstateTable[i].UClk > max_uclk) {
669− max_uclk = clock_table->MemPstateTable[i].UClk;
669+ uint32_t dram_speed_mts = calc_dram_speed_mts(&clock_table->MemPstateTable[i]);
670+
671+ if (is_valid_clock_value(dram_speed_mts) && dram_speed_mts > max_dram_speed_mts) {
672+ max_dram_speed_mts = dram_speed_mts;
670673 max_pstate = i;
671674 }
672675 }
673676
674− /* We expect the table to contain at least one valid Uclk entry. */
675− ASSERT(is_valid_clock_value(max_uclk));
677+ min_dram_speed_mts = max_dram_speed_mts;
678+ min_pstate = max_pstate;
679+
680+ for (i = 0; i < clock_table->NumMemPstatesEnabled; i++) {
681+ uint32_t dram_speed_mts = calc_dram_speed_mts(&clock_table->MemPstateTable[i]);
682+
683+ if (is_valid_clock_value(dram_speed_mts) && dram_speed_mts < min_dram_speed_mts) {
684+ min_dram_speed_mts = dram_speed_mts;
685+ min_pstate = i;
686+ }
687+ }
676688
689+ /* We expect the table to contain at least one valid P-state entry. */
690+ ASSERT(clock_table->NumMemPstatesEnabled &&
691+ is_valid_clock_value(max_dram_speed_mts) &&
692+ is_valid_clock_value(min_dram_speed_mts));
677693
678694 /* dispclk and dppclk can be max at any voltage, same number of levels for both */
679695 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS &&
@@ -683,47 +699,46 @@ static void dcn35_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk · 3 unmodified lines
683699 max_dppclk = find_max_clk_value(clock_table->DppClocks,
684700 clock_table->NumDispClkLevelsEnabled);
685701 } else {
702+ /* Invalid number of entries in the table from PMFW. */
686703 ASSERT(0);
687704 }
688− if (clock_table->NumFclkLevelsEnabled <= NUM_FCLK_DPM_LEVELS)
689− max_fclk = find_max_clk_value(clock_table->FclkClocks_Freq,
690− clock_table->NumFclkLevelsEnabled);
691705
692− for (i = 0; i < clock_table->NumMemPstatesEnabled; i++) {
693− uint32_t min_uclk = clock_table->MemPstateTable[0].UClk;
694− int j;
706+ /* Base the clock table on dcfclk, need at least one entry regardless of pmfw table */
707+ ASSERT(clock_table->NumDcfClkLevelsEnabled > 0);
695708
696− for (j = 1; j < clock_table->NumMemPstatesEnabled; j++) {
697− if (is_valid_clock_value(clock_table->MemPstateTable[j].UClk) &&
698− clock_table->MemPstateTable[j].UClk < min_uclk &&
699− clock_table->MemPstateTable[j].Voltage <= clock_table->SocVoltage[i]) {
700− min_uclk = clock_table->MemPstateTable[j].UClk;
701− min_pstate = j;
702− }
703− }
709+ max_fclk = find_max_clk_value(clock_table->FclkClocks_Freq, clock_table->NumFclkLevelsEnabled);
710+
711+ for (i = 0; i < clock_table->NumDcfClkLevelsEnabled; i++) {
712+ int j;
704713
714+ /* First search defaults for the clocks we don't read using closest lower or equal default dcfclk */
705715 for (j = bw_params->clk_table.num_entries - 1; j > 0; j--)
706716 if (bw_params->clk_table.entries[j].dcfclk_mhz <= clock_table->DcfClocks[i])
707− break;
717+ break;
708718
709719 bw_params->clk_table.entries[i].phyclk_mhz = bw_params->clk_table.entries[j].phyclk_mhz;
710720 bw_params->clk_table.entries[i].phyclk_d18_mhz = bw_params->clk_table.entries[j].phyclk_d18_mhz;
711721 bw_params->clk_table.entries[i].dtbclk_mhz = bw_params->clk_table.entries[j].dtbclk_mhz;
712− bw_params->clk_table.entries[i].fclk_mhz = max_fclk;
722+
723+ /* Now update clocks we do read */
713724 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemPstateTable[min_pstate].MemClk;
714725 bw_params->clk_table.entries[i].voltage = clock_table->MemPstateTable[min_pstate].Voltage;
715726 bw_params->clk_table.entries[i].dcfclk_mhz = clock_table->DcfClocks[i];
716727 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i];
717728 bw_params->clk_table.entries[i].dispclk_mhz = max_dispclk;
718729 bw_params->clk_table.entries[i].dppclk_mhz = max_dppclk;
719− bw_params->clk_table.entries[i].wck_ratio = convert_wck_ratio(
720− clock_table->MemPstateTable[min_pstate].WckRatio);
721− }
730+ bw_params->clk_table.entries[i].wck_ratio =
731+ convert_wck_ratio(clock_table->MemPstateTable[min_pstate].WckRatio);
732+
733+ /* Dcfclk and Fclk are tied, but at a different ratio */
734+ bw_params->clk_table.entries[i].fclk_mhz = min(max_fclk, 2 * clock_table->DcfClocks[i]);
735+ }
722736
723737 /* Make sure to include at least one entry at highest pstate */
724738 if (max_pstate != min_pstate || i == 0) {
725739 if (i > MAX_NUM_DPM_LVL - 1)
726740 i = MAX_NUM_DPM_LVL - 1;
741+
727742 bw_params->clk_table.entries[i].fclk_mhz = max_fclk;
728743 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemPstateTable[max_pstate].MemClk;
729744 bw_params->clk_table.entries[i].voltage = clock_table->MemPstateTable[max_pstate].Voltage;
@@ -739,6 +754,7 @@ static void dcn35_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk · 9 unmodified lines
739754 }
740755 bw_params->clk_table.num_entries = i--;
741756
757+ /* Make sure all highest clocks are included*/
742758 bw_params->clk_table.entries[i].socclk_mhz =
743759 find_max_clk_value(clock_table->SocClocks, NUM_SOCCLK_DPM_LEVELS);
744760 bw_params->clk_table.entries[i].dispclk_mhz =
@@ -757,6 +773,11 @@ static void dcn35_clk_mgr_helper_populate_bw_params(struct clk_mgr_internal *clk · 12 unmodified lines
757773 bw_params->clk_table.num_entries_per_clk.num_fclk_levels = clock_table->NumFclkLevelsEnabled;
758774 bw_params->clk_table.num_entries_per_clk.num_memclk_levels = clock_table->NumMemPstatesEnabled;
759775 bw_params->clk_table.num_entries_per_clk.num_socclk_levels = clock_table->NumSocClkLevelsEnabled;
776+
777+ /*
778+ * Set any 0 clocks to max default setting. Not an issue for
779+ * power since we aren't doing switching in such case anyway
780+ */
760781 for (i = 0; i < bw_params->clk_table.num_entries; i++) {
761782 if (!bw_params->clk_table.entries[i].fclk_mhz) {
762783 bw_params->clk_table.entries[i].fclk_mhz = def_max.fclk_mhz;
@@ -820,22 +841,22 @@ static void dcn35_set_idle_state(struct clk_mgr *clk_mgr_base, bool allow_idle) · 57 unmodified lines
820841
821842 if (dc->config.disable_ips == DMUB_IPS_ENABLE ||
822843 dc->config.disable_ips == DMUB_IPS_DISABLE_DYNAMIC) {
823− val |= DMUB_IPS1_ALLOW_MASK;
824− val |= DMUB_IPS2_ALLOW_MASK;
825− } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS1) {
826844 val = val & ~DMUB_IPS1_ALLOW_MASK;
827845 val = val & ~DMUB_IPS2_ALLOW_MASK;
828− } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS2) {
829− val |= DMUB_IPS1_ALLOW_MASK;
830− val = val & ~DMUB_IPS2_ALLOW_MASK;
831− } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS2_Z10) {
846+ } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS1) {
832847 val |= DMUB_IPS1_ALLOW_MASK;
833848 val |= DMUB_IPS2_ALLOW_MASK;
849+ } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS2) {
850+ val = val & ~DMUB_IPS1_ALLOW_MASK;
851+ val |= DMUB_IPS2_ALLOW_MASK;
852+ } else if (dc->config.disable_ips == DMUB_IPS_DISABLE_IPS2_Z10) {
853+ val = val & ~DMUB_IPS1_ALLOW_MASK;
854+ val = val & ~DMUB_IPS2_ALLOW_MASK;
834855 }
835856
836857 if (!allow_idle) {
837− val = val & ~DMUB_IPS1_ALLOW_MASK;
838− val = val & ~DMUB_IPS2_ALLOW_MASK;
858+ val |= DMUB_IPS1_ALLOW_MASK;
859+ val |= DMUB_IPS2_ALLOW_MASK;
839860 }
840861
841862 dcn35_smu_write_ips_scratch(clk_mgr, val);
@@ -965,21 +986,6 @@ struct clk_mgr_funcs dcn35_fpga_funcs = { · 123 unmodified lines
965986 .get_dtb_ref_clk_frequency = dcn31_get_dtb_ref_freq_khz,
966987 };
967988
968−static void dcn35_read_ss_info_from_lut(struct clk_mgr_internal *clk_mgr)
969−{
970− uint32_t clock_source;
971− struct dc_context *ctx = clk_mgr->base.ctx;
972−
973− REG_GET(CLK1_CLK2_BYPASS_CNTL, CLK2_BYPASS_SEL, &clock_source);
974−
975− clk_mgr->dprefclk_ss_percentage = ss_info_table.ss_percentage[clock_source];
976−
977− if (clk_mgr->dprefclk_ss_percentage != 0) {
978− clk_mgr->ss_on_dprefclk = true;
979− clk_mgr->dprefclk_ss_divider = ss_info_table.ss_divider;
980− }
981−}
982−
983989 void dcn35_clk_mgr_construct(
984990 struct dc_context *ctx,
985991 struct clk_mgr_dcn35 *clk_mgr,
@@ -1043,17 +1049,11 @@ void dcn35_clk_mgr_construct( · 57 unmodified lines
10431049 dcn35_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info);
10441050
10451051 clk_mgr->base.base.dprefclk_khz = dcn35_smu_get_dprefclk(&clk_mgr->base);
1046− clk_mgr->base.base.clks.ref_dtbclk_khz = dcn35_smu_get_dtbclk(&clk_mgr->base);
1047−
1048− if (!clk_mgr->base.base.clks.ref_dtbclk_khz)
1049− dcn35_smu_set_dtbclk(&clk_mgr->base, true);
1052+ clk_mgr->base.base.clks.ref_dtbclk_khz = 600000;
10501053
1051− clk_mgr->base.base.clks.dtbclk_en = true;
10521054 dce_clock_read_ss_info(&clk_mgr->base);
10531055 /*when clk src is from FCH, it could have ss, same clock src as DPREF clk*/
10541056
1055− dcn35_read_ss_info_from_lut(&clk_mgr->base);
1056−
10571057 clk_mgr->base.base.bw_params = &dcn35_bw_params;
10581058
10591059 if (clk_mgr->base.base.ctx->dc->debug.pstate_enabled) {
@@ -1129,7 +1129,6 @@ void dcn35_clk_mgr_construct( · 69 unmodified lines
11291129 ctx->dc->debug.disable_dpp_power_gate = false;
11301130 ctx->dc->debug.disable_hubp_power_gate = false;
11311131 ctx->dc->debug.disable_dsc_power_gate = false;
1132− ctx->dc->debug.disable_hpo_power_gate = false;
11331132 } else {
11341133 /*let's reset the config control flag*/
11351134 ctx->dc->config.disable_ips = DMUB_IPS_DISABLE_ALL; /*pmfw not support it, disable it all*/
drivers/gpu/drm/amd/display/dc/core/dc.c+3−3
@@ -3178,7 +3178,7 @@ static bool update_planes_and_stream_state(struct dc *dc, · 3177 unmodified lines
31783178 struct pipe_ctx *otg_master = resource_get_otg_master_for_stream(&context->res_ctx,
31793179 context->streams[i]);
31803180
3181− if (otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE)
3181+ if (otg_master && otg_master->stream->test_pattern.type != DP_TEST_PATTERN_VIDEO_MODE)
31823182 resource_build_test_pattern_params(&context->res_ctx, otg_master);
31833183 }
31843184 }
@@ -4934,8 +4934,8 @@ bool dc_dmub_is_ips_idle_state(struct dc *dc) · 1749 unmodified lines
49344934 if (dc->hwss.get_idle_state)
49354935 idle_state = dc->hwss.get_idle_state(dc);
49364936
4937− if ((idle_state & DMUB_IPS1_ALLOW_MASK) ||
4938− (idle_state & DMUB_IPS2_ALLOW_MASK))
4937+ if (!(idle_state & DMUB_IPS1_ALLOW_MASK) ||
4938+ !(idle_state & DMUB_IPS2_ALLOW_MASK))
49394939 return true;
49404940
49414941 return false;
drivers/gpu/drm/amd/display/dc/core/dc_resource.c+3−0
@@ -5190,6 +5190,9 @@ bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy( · 5189 unmodified lines
51905190 sec_next = sec_pipe->next_odm_pipe;
51915191 sec_prev = sec_pipe->prev_odm_pipe;
51925192
5193+ if (pri_pipe == NULL)
5194+ return false;
5195+
51935196 *sec_pipe = *pri_pipe;
51945197
51955198 sec_pipe->top_pipe = sec_top;
drivers/gpu/drm/amd/display/dc/dc.h+1−1
@@ -874,6 +874,7 @@ struct dc_debug_options { · 873 unmodified lines
874874 unsigned int seamless_boot_odm_combine;
875875 unsigned int force_odm_combine_4to1; //bit vector based on otg inst
876876 int minimum_z8_residency_time;
877+ int minimum_z10_residency_time;
877878 bool disable_z9_mpc;
878879 unsigned int force_fclk_khz;
879880 bool enable_tri_buf;
@@ -1608,7 +1609,6 @@ struct dc_link { · 728 unmodified lines
16081609 enum edp_revision edp_revision;
16091610 union dpcd_sink_ext_caps dpcd_sink_ext_caps;
16101611
1611− struct backlight_settings backlight_settings;
16121612 struct psr_settings psr_settings;
16131613
16141614 struct replay_settings replay_settings;
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c+5−5
@@ -1202,11 +1202,11 @@ void dc_dmub_srv_exit_low_power_state(const struct dc *dc) · 1201 unmodified lines
12021202 allow_state = dc->hwss.get_idle_state(dc);
12031203 dc->hwss.set_idle_state(dc, false);
12041204
1205− if (allow_state & DMUB_IPS2_ALLOW_MASK) {
1205+ if (!(allow_state & DMUB_IPS2_ALLOW_MASK)) {
12061206 // Wait for evaluation time
12071207 udelay(dc->debug.ips2_eval_delay_us);
12081208 commit_state = dc->hwss.get_idle_state(dc);
1209− if (commit_state & DMUB_IPS2_COMMIT_MASK) {
1209+ if (!(commit_state & DMUB_IPS2_COMMIT_MASK)) {
12101210 // Tell PMFW to exit low power state
12111211 dc->clk_mgr->funcs->exit_low_power_state(dc->clk_mgr);
12121212
@@ -1216,7 +1216,7 @@ void dc_dmub_srv_exit_low_power_state(const struct dc *dc) · 3 unmodified lines
12161216
12171217 for (i = 0; i < max_num_polls; ++i) {
12181218 commit_state = dc->hwss.get_idle_state(dc);
1219− if (!(commit_state & DMUB_IPS2_COMMIT_MASK))
1219+ if (commit_state & DMUB_IPS2_COMMIT_MASK)
12201220 break;
12211221
12221222 udelay(1);
@@ -1235,10 +1235,10 @@ void dc_dmub_srv_exit_low_power_state(const struct dc *dc) · 12 unmodified lines
12351235 }
12361236
12371237 dc_dmub_srv_notify_idle(dc, false);
1238− if (allow_state & DMUB_IPS1_ALLOW_MASK) {
1238+ if (!(allow_state & DMUB_IPS1_ALLOW_MASK)) {
12391239 for (i = 0; i < max_num_polls; ++i) {
12401240 commit_state = dc->hwss.get_idle_state(dc);
1241− if (!(commit_state & DMUB_IPS1_COMMIT_MASK))
1241+ if (commit_state & DMUB_IPS1_COMMIT_MASK)
12421242 break;
12431243
12441244 udelay(1);
drivers/gpu/drm/amd/display/dc/dc_types.h+1−4
@@ -177,6 +177,7 @@ struct dc_panel_patch { · 176 unmodified lines
177177 unsigned int disable_fams;
178178 unsigned int skip_avmute;
179179 unsigned int mst_start_top_delay;
180+ unsigned int remove_sink_ext_caps;
180181 };
181182
182183 struct dc_edid_caps {
@@ -990,10 +991,6 @@ struct link_mst_stream_allocation_table { · 807 unmodified lines
990991 struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
991992 };
992993
993−struct backlight_settings {
994− uint32_t backlight_millinits;
995−};
996−
997994 /* PSR feature flags */
998995 struct psr_settings {
999996 bool psr_feature_enabled; // PSR is supported by sink
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c+1−1
@@ -871,7 +871,7 @@ static const struct dc_plane_cap plane_cap = { · 870 unmodified lines
871871 static const struct dc_debug_options debug_defaults_drv = {
872872 .disable_z10 = false,
873873 .enable_z9_disable_interface = true,
874− .minimum_z8_residency_time = 2000,
874+ .minimum_z8_residency_time = 2100,
875875 .psr_skip_crtc_disable = true,
876876 .replay_skip_crtc_disabled = true,
877877 .disable_dmcu = true,
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_dio_stream_encoder.c+4−6
@@ -261,12 +261,6 @@ static void enc35_stream_encoder_enable( · 260 unmodified lines
261261 /* invalid mode ! */
262262 ASSERT_CRITICAL(false);
263263 }
264−
265− REG_UPDATE(DIG_FE_CLK_CNTL, DIG_FE_CLK_EN, 1);
266− REG_UPDATE(DIG_FE_EN_CNTL, DIG_FE_ENABLE, 1);
267− } else {
268− REG_UPDATE(DIG_FE_EN_CNTL, DIG_FE_ENABLE, 0);
269− REG_UPDATE(DIG_FE_CLK_CNTL, DIG_FE_CLK_EN, 0);
270264 }
271265 }
272266
@@ -436,6 +430,8 @@ static void enc35_disable_fifo(struct stream_encoder *enc) · 163 unmodified lines
436430 struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
437431
438432 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_ENABLE, 0);
433+ REG_UPDATE(DIG_FE_EN_CNTL, DIG_FE_ENABLE, 0);
434+ REG_UPDATE(DIG_FE_CLK_CNTL, DIG_FE_CLK_EN, 0);
439435 }
440436
441437 static void enc35_enable_fifo(struct stream_encoder *enc)
@@ -443,6 +439,8 @@ static void enc35_enable_fifo(struct stream_encoder *enc) · 1 unmodified line
443439 struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
444440
445441 REG_UPDATE(DIG_FIFO_CTRL0, DIG_FIFO_READ_START_LEVEL, 0x7);
442+ REG_UPDATE(DIG_FE_CLK_CNTL, DIG_FE_CLK_EN, 1);
443+ REG_UPDATE(DIG_FE_EN_CNTL, DIG_FE_ENABLE, 1);
446444
447445 enc35_reset_fifo(enc, true);
448446 enc35_reset_fifo(enc, false);
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_pg_cntl.c+10−0
@@ -261,6 +261,7 @@ void pg_cntl35_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on) · 260 unmodified lines
261261 uint32_t power_gate = power_on ? 0 : 1;
262262 uint32_t pwr_status = power_on ? 0 : 2;
263263 uint32_t org_ip_request_cntl;
264+ uint32_t power_forceon;
264265 bool block_enabled;
265266
266267 if (pg_cntl->ctx->dc->debug.ignore_pg ||
@@ -277,6 +278,10 @@ void pg_cntl35_hpo_pg_control(struct pg_cntl *pg_cntl, bool power_on) · 10 unmodified lines
277278 return;
278279 }
279280
281+ REG_GET(DOMAIN25_PG_CONFIG, DOMAIN_POWER_FORCEON, &power_forceon);
282+ if (power_forceon)
283+ return;
284+
280285 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
281286 if (org_ip_request_cntl == 0)
282287 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
@@ -304,6 +309,7 @@ void pg_cntl35_io_clk_pg_control(struct pg_cntl *pg_cntl, bool power_on) · 21 unmodified lines
304309 uint32_t power_gate = power_on ? 0 : 1;
305310 uint32_t pwr_status = power_on ? 0 : 2;
306311 uint32_t org_ip_request_cntl;
312+ uint32_t power_forceon;
307313 bool block_enabled;
308314
309315 if (pg_cntl->ctx->dc->debug.ignore_pg ||
@@ -319,6 +325,10 @@ void pg_cntl35_io_clk_pg_control(struct pg_cntl *pg_cntl, bool power_on) · 9 unmodified lines
319325 return;
320326 }
321327
328+ REG_GET(DOMAIN22_PG_CONFIG, DOMAIN_POWER_FORCEON, &power_forceon);
329+ if (power_forceon)
330+ return;
331+
322332 REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
323333 if (org_ip_request_cntl == 0)
324334 REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c+8−1
@@ -1712,6 +1712,13 @@ static bool dcn35_validate_bandwidth(struct dc *dc, · 1711 unmodified lines
17121712
17131713 out = dml2_validate(dc, context, fast_validate);
17141714
1715+ if (fast_validate)
1716+ return out;
1717+
1718+ DC_FP_START();
1719+ dcn35_decide_zstate_support(dc, context);
1720+ DC_FP_END();
1721+
17151722 return out;
17161723 }
17171724
@@ -1857,7 +1864,7 @@ static bool dcn35_resource_construct( · 139 unmodified lines
18571864
18581865 /* Use pipe context based otg sync logic */
18591866 dc->config.use_pipe_ctx_sync_logic = true;
1860− dc->config.use_default_clock_table = false;
1867+
18611868 /* read VBIOS LTTPR caps */
18621869 {
18631870 if (ctx->dc_bios->funcs->get_lttpr_caps) {
drivers/gpu/drm/amd/display/dc/dml/Makefile+4−0
@@ -61,8 +61,12 @@ endif · 60 unmodified lines
6161 endif
6262
6363 ifneq ($(CONFIG_FRAME_WARN),0)
64+ifeq ($(filter y,$(CONFIG_KASAN)$(CONFIG_KCSAN)),y)
65+frame_warn_flag := -Wframe-larger-than=3072
66+else
6467 frame_warn_flag := -Wframe-larger-than=2048
6568 endif
69+endif
6670
6771 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_ccflags)
6872 CFLAGS_$(AMDDALPATH)/dc/dml/display_mode_vba.o := $(dml_ccflags)
drivers/gpu/drm/amd/display/dc/dml/dc_features.h+1−1
@@ -36,7 +36,7 @@ · 35 unmodified lines
3636 * Define the maximum amount of states supported by the ASIC. Every ASIC has a
3737 * specific number of states; this macro defines the maximum number of states.
3838 */
39−#define DC__VOLTAGE_STATES 20
39+#define DC__VOLTAGE_STATES 40
4040 #define DC__NUM_DPP__4 1
4141 #define DC__NUM_DPP__0_PRESENT 1
4242 #define DC__NUM_DPP__1_PRESENT 1
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c+1−14
@@ -950,10 +950,8 @@ static enum dcn_zstate_support_state decide_zstate_support(struct dc *dc, struc · 949 unmodified lines
950950 {
951951 int plane_count;
952952 int i;
953− unsigned int min_dst_y_next_start_us;
954953
955954 plane_count = 0;
956− min_dst_y_next_start_us = 0;
957955 for (i = 0; i < dc->res_pool->pipe_count; i++) {
958956 if (context->res_ctx.pipe_ctx[i].plane_state)
959957 plane_count++;
@@ -975,26 +973,15 @@ static enum dcn_zstate_support_state decide_zstate_support(struct dc *dc, struc · 15 unmodified lines
975973 else if (context->stream_count == 1 && context->streams[0]->signal == SIGNAL_TYPE_EDP) {
976974 struct dc_link *link = context->streams[0]->sink->link;
977975 struct dc_stream_status *stream_status = &context->stream_status[0];
978− struct dc_stream_state *current_stream = context->streams[0];
979976 int minmum_z8_residency = dc->debug.minimum_z8_residency_time > 0 ? dc->debug.minimum_z8_residency_time : 1000;
980977 bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency;
981978 bool is_pwrseq0 = link->link_index == 0;
982− bool isFreesyncVideo;
983−
984− isFreesyncVideo = current_stream->adjust.v_total_min == current_stream->adjust.v_total_max;
985− isFreesyncVideo = isFreesyncVideo && current_stream->timing.v_total < current_stream->adjust.v_total_min;
986− for (i = 0; i < dc->res_pool->pipe_count; i++) {
987− if (context->res_ctx.pipe_ctx[i].stream == current_stream && isFreesyncVideo) {
988− min_dst_y_next_start_us = context->res_ctx.pipe_ctx[i].dlg_regs.min_dst_y_next_start_us;
989− break;
990− }
991− }
992979
993980 /* Don't support multi-plane configurations */
994981 if (stream_status->plane_count > 1)
995982 return DCN_ZSTATE_SUPPORT_DISALLOW;
996983
997− if (is_pwrseq0 && (context->bw_ctx.dml.vba.StutterPeriod > 5000.0 || min_dst_y_next_start_us > 5000))
984+ if (is_pwrseq0 && context->bw_ctx.dml.vba.StutterPeriod > 5000.0)
998985 return DCN_ZSTATE_SUPPORT_ALLOW;
999986 else if (is_pwrseq0 && link->psr_settings.psr_version == DC_PSR_VERSION_1 && !link->panel_config.psr.disable_psr)
1000987 return allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY;
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c+14−9
@@ -1192,13 +1192,16 @@ static bool update_pipe_slice_table_with_split_flags( · 1191 unmodified lines
11921192 */
11931193 struct pipe_ctx *pipe;
11941194 bool odm;
1195− int i;
1195+ int dc_pipe_idx, dml_pipe_idx = 0;
11961196 bool updated = false;
11971197
1198− for (i = 0; i < dc->res_pool->pipe_count; i++) {
1199− pipe = &context->res_ctx.pipe_ctx[i];
1198+ for (dc_pipe_idx = 0;
1199+ dc_pipe_idx < dc->res_pool->pipe_count; dc_pipe_idx++) {
1200+ pipe = &context->res_ctx.pipe_ctx[dc_pipe_idx];
1201+ if (resource_is_pipe_type(pipe, FREE_PIPE))
1202+ continue;
12001203
1201− if (merge[i]) {
1204+ if (merge[dc_pipe_idx]) {
12021205 if (resource_is_pipe_type(pipe, OPP_HEAD))
12031206 /* merging OPP head means reducing ODM slice
12041207 * count by 1
@@ -1213,17 +1216,18 @@ static bool update_pipe_slice_table_with_split_flags( · 8 unmodified lines
12131216 updated = true;
12141217 }
12151218
1216− if (split[i]) {
1217− odm = vba->ODMCombineEnabled[vba->pipe_plane[i]] !=
1219+ if (split[dc_pipe_idx]) {
1220+ odm = vba->ODMCombineEnabled[vba->pipe_plane[dml_pipe_idx]] !=
12181221 dm_odm_combine_mode_disabled;
12191222 if (odm && resource_is_pipe_type(pipe, OPP_HEAD))
12201223 update_slice_table_for_stream(
1221− table, pipe->stream, split[i] - 1);
1224+ table, pipe->stream, split[dc_pipe_idx] - 1);
12221225 else if (!odm && resource_is_pipe_type(pipe, DPP_PIPE))
12231226 update_slice_table_for_plane(table, pipe,
1224− pipe->plane_state, split[i] - 1);
1227+ pipe->plane_state, split[dc_pipe_idx] - 1);
12251228 updated = true;
12261229 }
1230+ dml_pipe_idx++;
12271231 }
12281232 return updated;
12291233 }
@@ -2231,6 +2235,7 @@ void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, · 1001 unmodified lines
22312235 int i, pipe_idx, vlevel_temp = 0;
22322236 double dcfclk = dcn3_2_soc.clock_limits[0].dcfclk_mhz;
22332237 double dcfclk_from_validation = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb];
2238+ double dram_speed_from_validation = context->bw_ctx.dml.vba.DRAMSpeed;
22342239 double dcfclk_from_fw_based_mclk_switching = dcfclk_from_validation;
22352240 bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] !=
22362241 dm_dram_clock_change_unsupported;
@@ -2418,7 +2423,7 @@ void dcn32_calculate_wm_and_dlg_fpu(struct dc *dc, struct dc_state *context, · 181 unmodified lines
24182423 }
24192424
24202425 if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_C].valid) {
2421− min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed;
2426+ min_dram_speed_mts = dram_speed_from_validation;
24222427 min_dram_speed_mts_margin = 160;
24232428
24242429 context->bw_ctx.dml.soc.dram_clock_change_latency_us =
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c+80−4
@@ -164,10 +164,10 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = { · 163 unmodified lines
164164 },
165165 },
166166 .num_states = 5,
167− .sr_exit_time_us = 9.0,
168− .sr_enter_plus_exit_time_us = 11.0,
169− .sr_exit_z8_time_us = 50.0, /*changed from 442.0*/
170− .sr_enter_plus_exit_z8_time_us = 50.0,/*changed from 560.0*/
167+ .sr_exit_time_us = 14.0,
168+ .sr_enter_plus_exit_time_us = 16.0,
169+ .sr_exit_z8_time_us = 525.0,
170+ .sr_enter_plus_exit_z8_time_us = 715.0,
171171 .fclk_change_latency_us = 20.0,
172172 .usr_retraining_latency_us = 2,
173173 .writeback_latency_us = 12.0,
@@ -329,6 +329,48 @@ void dcn35_update_bw_bounding_box_fpu(struct dc *dc, · 155 unmodified lines
329329 /*temp till dml2 fully work without dml1*/
330330 dml_init_instance(&dc->dml, &dcn3_5_soc, &dcn3_5_ip,
331331 DML_PROJECT_DCN31);
332+
333+ /*copy to dml2, before dml2_create*/
334+ if (clk_table->num_entries > 2) {
335+
336+ for (i = 0; i < clk_table->num_entries; i++) {
337+ dc->dml2_options.bbox_overrides.clks_table.num_states =
338+ clk_table->num_entries;
339+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dcfclk_mhz =
340+ clock_limits[i].dcfclk_mhz;
341+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].fclk_mhz =
342+ clock_limits[i].fabricclk_mhz;
343+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dispclk_mhz =
344+ clock_limits[i].dispclk_mhz;
345+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].dppclk_mhz =
346+ clock_limits[i].dppclk_mhz;
347+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].socclk_mhz =
348+ clock_limits[i].socclk_mhz;
349+ dc->dml2_options.bbox_overrides.clks_table.clk_entries[i].memclk_mhz =
350+ clk_table->entries[i].memclk_mhz * clk_table->entries[i].wck_ratio;
351+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dcfclk_levels =
352+ clk_table->num_entries;
353+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_fclk_levels =
354+ clk_table->num_entries;
355+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dispclk_levels =
356+ clk_table->num_entries;
357+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_dppclk_levels =
358+ clk_table->num_entries;
359+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_socclk_levels =
360+ clk_table->num_entries;
361+ dc->dml2_options.bbox_overrides.clks_table.num_entries_per_clk.num_memclk_levels =
362+ clk_table->num_entries;
363+ }
364+ }
365+
366+ /* Update latency values */
367+ dc->dml2_options.bbox_overrides.dram_clock_change_latency_us = dcn3_5_soc.dram_clock_change_latency_us;
368+
369+ dc->dml2_options.bbox_overrides.sr_exit_latency_us = dcn3_5_soc.sr_exit_time_us;
370+ dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us = dcn3_5_soc.sr_enter_plus_exit_time_us;
371+
372+ dc->dml2_options.bbox_overrides.sr_exit_z8_time_us = dcn3_5_soc.sr_exit_z8_time_us;
373+ dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us = dcn3_5_soc.sr_enter_plus_exit_z8_time_us;
332374 }
333375
334376 static bool is_dual_plane(enum surface_pixel_format format)
@@ -507,3 +549,37 @@ int dcn35_populate_dml_pipes_from_context_fpu(struct dc *dc, · 172 unmodified lines
507549
508550 return pipe_cnt;
509551 }
552+
553+void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context)
554+{
555+ enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW;
556+ unsigned int i, plane_count = 0;
557+
558+ for (i = 0; i < dc->res_pool->pipe_count; i++) {
559+ if (context->res_ctx.pipe_ctx[i].plane_state)
560+ plane_count++;
561+ }
562+
563+ if (plane_count == 0) {
564+ support = DCN_ZSTATE_SUPPORT_ALLOW;
565+ } else if (plane_count == 1 && context->stream_count == 1 && context->streams[0]->signal == SIGNAL_TYPE_EDP) {
566+ struct dc_link *link = context->streams[0]->sink->link;
567+ bool is_pwrseq0 = link && link->link_index == 0;
568+ bool is_psr1 = link && link->psr_settings.psr_version == DC_PSR_VERSION_1 && !link->panel_config.psr.disable_psr;
569+ int minmum_z8_residency =
570+ dc->debug.minimum_z8_residency_time > 0 ? dc->debug.minimum_z8_residency_time : 1000;
571+ bool allow_z8 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z8_residency;
572+ int minmum_z10_residency =
573+ dc->debug.minimum_z10_residency_time > 0 ? dc->debug.minimum_z10_residency_time : 5000;
574+ bool allow_z10 = context->bw_ctx.dml.vba.StutterPeriod > (double)minmum_z10_residency;
575+
576+ if (is_pwrseq0 && allow_z10)
577+ support = DCN_ZSTATE_SUPPORT_ALLOW;
578+ else if (is_pwrseq0 && is_psr1)
579+ support = allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY;
580+ else if (allow_z8)
581+ support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY;
582+ }
583+
584+ context->bw_ctx.bw.dcn.clk.zstate_support = support;
585+}
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.h+2−0
@@ -39,4 +39,6 @@ int dcn35_populate_dml_pipes_from_context_fpu(struct dc *dc, · 38 unmodified lines
3939 display_e2e_pipe_params_st *pipes,
4040 bool fast_validate);
4141
42+void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context);
43+
4244 #endif
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c+11−11
@@ -6329,7 +6329,7 @@ static void dml_prefetch_check(struct display_mode_lib_st *mode_lib) · 6328 unmodified lines
63296329 mode_lib->ms.NoOfDPPThisState,
63306330 mode_lib->ms.dpte_group_bytes,
63316331 s->HostVMInefficiencyFactor,
6332− mode_lib->ms.soc.hostvm_min_page_size_kbytes,
6332+ mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024,
63336333 mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels);
63346334
63356335 s->NextMaxVStartup = s->MaxVStartupAllPlanes[j];
@@ -6542,7 +6542,7 @@ static void dml_prefetch_check(struct display_mode_lib_st *mode_lib) · 206 unmodified lines
65426542 mode_lib->ms.cache_display_cfg.plane.HostVMEnable,
65436543 mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels,
65446544 mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,
6545− mode_lib->ms.soc.hostvm_min_page_size_kbytes,
6545+ mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024,
65466546 mode_lib->ms.PDEAndMetaPTEBytesPerFrame[j][k],
65476547 mode_lib->ms.MetaRowBytes[j][k],
65486548 mode_lib->ms.DPTEBytesPerRow[j][k],
@@ -7687,7 +7687,7 @@ dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib) · 1138 unmodified lines
76877687 CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
76887688 CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
76897689 CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
7690− CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes;
7690+ CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
76917691 CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
76927692 CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
76937693 CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = mode_lib->ms.PTEBufferSizeNotExceededPerState;
@@ -7957,7 +7957,7 @@ dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib) · 263 unmodified lines
79577957 UseMinimumDCFCLK_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
79587958 UseMinimumDCFCLK_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
79597959 UseMinimumDCFCLK_params->NumberOfActiveSurfaces = mode_lib->ms.num_active_planes;
7960− UseMinimumDCFCLK_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes;
7960+ UseMinimumDCFCLK_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
79617961 UseMinimumDCFCLK_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
79627962 UseMinimumDCFCLK_params->DynamicMetadataVMEnabled = mode_lib->ms.ip.dynamic_metadata_vm_enabled;
79637963 UseMinimumDCFCLK_params->ImmediateFlipRequirement = s->ImmediateFlipRequiredFinal;
@@ -8699,7 +8699,7 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc · 735 unmodified lines
86998699 CalculateVMRowAndSwath_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
87008700 CalculateVMRowAndSwath_params->GPUVMMaxPageTableLevels = mode_lib->ms.cache_display_cfg.plane.GPUVMMaxPageTableLevels;
87018701 CalculateVMRowAndSwath_params->GPUVMMinPageSizeKBytes = mode_lib->ms.cache_display_cfg.plane.GPUVMMinPageSizeKBytes;
8702− CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes;
8702+ CalculateVMRowAndSwath_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
87038703 CalculateVMRowAndSwath_params->PTEBufferModeOverrideEn = mode_lib->ms.cache_display_cfg.plane.PTEBufferModeOverrideEn;
87048704 CalculateVMRowAndSwath_params->PTEBufferModeOverrideVal = mode_lib->ms.cache_display_cfg.plane.PTEBufferMode;
87058705 CalculateVMRowAndSwath_params->PTEBufferSizeNotExceeded = s->dummy_boolean_array[0];
@@ -8805,7 +8805,7 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc · 99 unmodified lines
88058805 mode_lib->ms.cache_display_cfg.hw.DPPPerSurface,
88068806 locals->dpte_group_bytes,
88078807 s->HostVMInefficiencyFactor,
8808− mode_lib->ms.soc.hostvm_min_page_size_kbytes,
8808+ mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024,
88098809 mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels);
88108810
88118811 locals->TCalc = 24.0 / locals->DCFCLKDeepSleep;
@@ -8995,7 +8995,7 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc · 183 unmodified lines
89958995 CalculatePrefetchSchedule_params->GPUVMEnable = mode_lib->ms.cache_display_cfg.plane.GPUVMEnable;
89968996 CalculatePrefetchSchedule_params->HostVMEnable = mode_lib->ms.cache_display_cfg.plane.HostVMEnable;
89978997 CalculatePrefetchSchedule_params->HostVMMaxNonCachedPageTableLevels = mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels;
8998− CalculatePrefetchSchedule_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes;
8998+ CalculatePrefetchSchedule_params->HostVMMinPageSize = mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024;
89998999 CalculatePrefetchSchedule_params->DynamicMetadataEnable = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataEnable[k];
90009000 CalculatePrefetchSchedule_params->DynamicMetadataVMEnabled = mode_lib->ms.ip.dynamic_metadata_vm_enabled;
90019001 CalculatePrefetchSchedule_params->DynamicMetadataLinesBeforeActiveRequired = mode_lib->ms.cache_display_cfg.plane.DynamicMetadataLinesBeforeActiveRequired[k];
@@ -9240,7 +9240,7 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc · 238 unmodified lines
92409240 mode_lib->ms.cache_display_cfg.plane.HostVMEnable,
92419241 mode_lib->ms.cache_display_cfg.plane.HostVMMaxPageTableLevels,
92429242 mode_lib->ms.cache_display_cfg.plane.GPUVMEnable,
9243− mode_lib->ms.soc.hostvm_min_page_size_kbytes,
9243+ mode_lib->ms.soc.hostvm_min_page_size_kbytes * 1024,
92449244 locals->PDEAndMetaPTEBytesFrame[k],
92459245 locals->MetaRowByte[k],
92469246 locals->PixelPTEBytesPerRow[k],
@@ -9447,12 +9447,12 @@ void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struc · 200 unmodified lines
94479447
94489448 // Output
94499449 CalculateWatermarks_params->Watermark = &s->dummy_watermark; // Watermarks *Watermark
9450− CalculateWatermarks_params->DRAMClockChangeSupport = &mode_lib->ms.support.DRAMClockChangeSupport[j];
9450+ CalculateWatermarks_params->DRAMClockChangeSupport = &mode_lib->ms.support.DRAMClockChangeSupport[0];
94519451 CalculateWatermarks_params->MaxActiveDRAMClockChangeLatencySupported = &s->dummy_single_array[0][0]; // dml_float_t *MaxActiveDRAMClockChangeLatencySupported[]
94529452 CalculateWatermarks_params->SubViewportLinesNeededInMALL = &mode_lib->ms.SubViewportLinesNeededInMALL[j]; // dml_uint_t SubViewportLinesNeededInMALL[]
9453− CalculateWatermarks_params->FCLKChangeSupport = &mode_lib->ms.support.FCLKChangeSupport[j];
9453+ CalculateWatermarks_params->FCLKChangeSupport = &mode_lib->ms.support.FCLKChangeSupport[0];
94549454 CalculateWatermarks_params->MaxActiveFCLKChangeLatencySupported = &s->dummy_single[0]; // dml_float_t *MaxActiveFCLKChangeLatencySupported
9455− CalculateWatermarks_params->USRRetrainingSupport = &mode_lib->ms.support.USRRetrainingSupport[j];
9455+ CalculateWatermarks_params->USRRetrainingSupport = &mode_lib->ms.support.USRRetrainingSupport[0];
94569456
94579457 CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(
94589458 &mode_lib->scratch,
drivers/gpu/drm/amd/display/dc/dml2/dml2_translation_helper.c+40−20
@@ -341,25 +341,42 @@ void dml2_init_soc_states(struct dml2_context *dml2, const struct dc *in_dc, · 340 unmodified lines
341341 break;
342342 }
343343
344− /* Override from passed values, mainly for debugging purposes, if available */
345− if (dml2->config.bbox_overrides.sr_exit_latency_us) {
346− p->in_states->state_array[0].sr_exit_time_us = dml2->config.bbox_overrides.sr_exit_latency_us;
347− }
344+ /* Override from passed values, if available */
345+ for (i = 0; i < p->in_states->num_states; i++) {
346+ if (dml2->config.bbox_overrides.sr_exit_latency_us) {
347+ p->in_states->state_array[i].sr_exit_time_us =
348+ dml2->config.bbox_overrides.sr_exit_latency_us;
349+ }
348350
349− if (dml2->config.bbox_overrides.sr_enter_plus_exit_latency_us) {
350− p->in_states->state_array[0].sr_enter_plus_exit_time_us = dml2->config.bbox_overrides.sr_enter_plus_exit_latency_us;
351− }
351+ if (dml2->config.bbox_overrides.sr_enter_plus_exit_latency_us) {
352+ p->in_states->state_array[i].sr_enter_plus_exit_time_us =
353+ dml2->config.bbox_overrides.sr_enter_plus_exit_latency_us;
354+ }
352355
353− if (dml2->config.bbox_overrides.urgent_latency_us) {
354− p->in_states->state_array[0].urgent_latency_pixel_data_only_us = dml2->config.bbox_overrides.urgent_latency_us;
355− }
356+ if (dml2->config.bbox_overrides.sr_exit_z8_time_us) {
357+ p->in_states->state_array[i].sr_exit_z8_time_us =
358+ dml2->config.bbox_overrides.sr_exit_z8_time_us;
359+ }
356360
357− if (dml2->config.bbox_overrides.dram_clock_change_latency_us) {
358− p->in_states->state_array[0].dram_clock_change_latency_us = dml2->config.bbox_overrides.dram_clock_change_latency_us;
359− }
361+ if (dml2->config.bbox_overrides.sr_enter_plus_exit_z8_time_us) {
362+ p->in_states->state_array[i].sr_enter_plus_exit_z8_time_us =
363+ dml2->config.bbox_overrides.sr_enter_plus_exit_z8_time_us;
364+ }
365+
366+ if (dml2->config.bbox_overrides.urgent_latency_us) {
367+ p->in_states->state_array[i].urgent_latency_pixel_data_only_us =
368+ dml2->config.bbox_overrides.urgent_latency_us;
369+ }
360370
361− if (dml2->config.bbox_overrides.fclk_change_latency_us) {
362− p->in_states->state_array[0].fclk_change_latency_us = dml2->config.bbox_overrides.fclk_change_latency_us;
371+ if (dml2->config.bbox_overrides.dram_clock_change_latency_us) {
372+ p->in_states->state_array[i].dram_clock_change_latency_us =
373+ dml2->config.bbox_overrides.dram_clock_change_latency_us;
374+ }
375+
376+ if (dml2->config.bbox_overrides.fclk_change_latency_us) {
377+ p->in_states->state_array[i].fclk_change_latency_us =
378+ dml2->config.bbox_overrides.fclk_change_latency_us;
379+ }
363380 }
364381
365382 /* DCFCLK stas values are project specific */
@@ -498,8 +515,8 @@ void dml2_translate_socbb_params(const struct dc *in, struct soc_bounding_box_st · 132 unmodified lines
498515 out->do_urgent_latency_adjustment = in_soc_params->do_urgent_latency_adjustment;
499516 out->dram_channel_width_bytes = (dml_uint_t)in_soc_params->dram_channel_width_bytes;
500517 out->fabric_datapath_to_dcn_data_return_bytes = (dml_uint_t)in_soc_params->fabric_datapath_to_dcn_data_return_bytes;
501− out->gpuvm_min_page_size_kbytes = in_soc_params->gpuvm_min_page_size_bytes * 1024;
502− out->hostvm_min_page_size_kbytes = in_soc_params->hostvm_min_page_size_bytes * 1024;
518+ out->gpuvm_min_page_size_kbytes = in_soc_params->gpuvm_min_page_size_bytes / 1024;
519+ out->hostvm_min_page_size_kbytes = in_soc_params->hostvm_min_page_size_bytes / 1024;
503520 out->mall_allocated_for_dcn_mbytes = (dml_uint_t)in_soc_params->mall_allocated_for_dcn_mbytes;
504521 out->max_avg_dram_bw_use_normal_percent = in_soc_params->max_avg_dram_bw_use_normal_percent;
505522 out->max_avg_fabric_bw_use_normal_percent = in_soc_params->max_avg_fabric_bw_use_normal_percent;
@@ -1040,9 +1057,12 @@ void map_dc_state_into_dml_display_cfg(struct dml2_context *dml2, struct dc_stat · 534 unmodified lines
10401057 }
10411058
10421059 //Generally these are set by referencing our latest BB/IP params in dcn32_resource.c file
1043− dml_dispcfg->plane.GPUVMEnable = true;
1044− dml_dispcfg->plane.GPUVMMaxPageTableLevels = 4;
1045− dml_dispcfg->plane.HostVMEnable = false;
1060+ dml_dispcfg->plane.GPUVMEnable = dml2->v20.dml_core_ctx.ip.gpuvm_enable;
1061+ dml_dispcfg->plane.GPUVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.gpuvm_max_page_table_levels;
1062+ dml_dispcfg->plane.HostVMEnable = dml2->v20.dml_core_ctx.ip.hostvm_enable;
1063+ dml_dispcfg->plane.HostVMMaxPageTableLevels = dml2->v20.dml_core_ctx.ip.hostvm_max_page_table_levels;
1064+ if (dml2->v20.dml_core_ctx.ip.hostvm_enable)
1065+ dml2->v20.dml_core_ctx.policy.AllowForPStateChangeOrStutterInVBlankFinal = dml_prefetch_support_uclk_fclk_and_stutter;
10461066
10471067 dml2_populate_pipe_to_plane_index_mapping(dml2, context);
10481068
drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h+2−0
@@ -139,6 +139,8 @@ struct dml2_soc_bbox_overrides { · 138 unmodified lines
139139 double urgent_latency_us;
140140 double sr_exit_latency_us;
141141 double sr_enter_plus_exit_latency_us;
142+ double sr_exit_z8_time_us;
143+ double sr_enter_plus_exit_z8_time_us;
142144 double dram_clock_change_latency_us;
143145 double fclk_change_latency_us;
144146 unsigned int dram_num_chan;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c+2−4
@@ -487,8 +487,7 @@ bool dcn32_set_mcm_luts( · 486 unmodified lines
487487 if (plane_state->blend_tf->type == TF_TYPE_HWPWL)
488488 lut_params = &plane_state->blend_tf->pwl;
489489 else if (plane_state->blend_tf->type == TF_TYPE_DISTRIBUTED_POINTS) {
490− cm_helper_translate_curve_to_hw_format(plane_state->ctx,
491− plane_state->blend_tf,
490+ cm3_helper_translate_curve_to_hw_format(plane_state->blend_tf,
492491 &dpp_base->regamma_params, false);
493492 lut_params = &dpp_base->regamma_params;
494493 }
@@ -503,8 +502,7 @@ bool dcn32_set_mcm_luts( · 8 unmodified lines
503502 else if (plane_state->in_shaper_func->type == TF_TYPE_DISTRIBUTED_POINTS) {
504503 // TODO: dpp_base replace
505504 ASSERT(false);
506− cm_helper_translate_curve_to_hw_format(plane_state->ctx,
507− plane_state->in_shaper_func,
505+ cm3_helper_translate_curve_to_hw_format(plane_state->in_shaper_func,
508506 &dpp_base->shaper_params, true);
509507 lut_params = &dpp_base->shaper_params;
510508 }
drivers/gpu/drm/amd/display/dc/link/link_detection.c+4−1
@@ -879,7 +879,7 @@ static bool detect_link_and_local_sink(struct dc_link *link, · 878 unmodified lines
879879 (link->dpcd_sink_ext_caps.bits.oled == 1)) {
880880 dpcd_set_source_specific_data(link);
881881 msleep(post_oui_delay);
882− set_cached_brightness_aux(link);
882+ set_default_brightness_aux(link);
883883 }
884884
885885 return true;
@@ -1088,6 +1088,9 @@ static bool detect_link_and_local_sink(struct dc_link *link, · 202 unmodified lines
10881088 if (sink->edid_caps.panel_patch.skip_scdc_overwrite)
10891089 link->ctx->dc->debug.hdmi20_disable = true;
10901090
1091+ if (sink->edid_caps.panel_patch.remove_sink_ext_caps)
1092+ link->dpcd_sink_ext_caps.raw = 0;
1093+
10911094 if (dc_is_hdmi_signal(link->connector_signal))
10921095 read_scdc_caps(link->ddc, link->local_sink);
10931096
drivers/gpu/drm/amd/display/dc/link/link_dpms.c+1−2
@@ -2142,8 +2142,7 @@ static enum dc_status enable_link_dp(struct dc_state *state, · 2141 unmodified lines
21422142 if (link->dpcd_sink_ext_caps.bits.oled == 1 ||
21432143 link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1 ||
21442144 link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1) {
2145− set_cached_brightness_aux(link);
2146−
2145+ set_default_brightness_aux(link);
21472146 if (link->dpcd_sink_ext_caps.bits.oled == 1)
21482147 msleep(bl_oled_enable_delay);
21492148 edp_backlight_enable_aux(link, true);
drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c+3−3
@@ -115,7 +115,7 @@ static enum link_training_result perform_fixed_vs_pe_nontransparent_training_seq · 114 unmodified lines
115115 lt_settings->cr_pattern_time = 16000;
116116
117117 /* Fixed VS/PE specific: Toggle link rate */
118− apply_toggle_rate_wa = (link->vendor_specific_lttpr_link_rate_wa == target_rate);
118+ apply_toggle_rate_wa = ((link->vendor_specific_lttpr_link_rate_wa == target_rate) || (link->vendor_specific_lttpr_link_rate_wa == 0));
119119 target_rate = get_dpcd_link_rate(&lt_settings->link_settings);
120120 toggle_rate = (target_rate == 0x6) ? 0xA : 0x6;
121121
@@ -271,7 +271,7 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence_legacy( · 149 unmodified lines
271271 /* Vendor specific: Toggle link rate */
272272 toggle_rate = (rate == 0x6) ? 0xA : 0x6;
273273
274− if (link->vendor_specific_lttpr_link_rate_wa == rate) {
274+ if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) {
275275 core_link_write_dpcd(
276276 link,
277277 DP_LINK_BW_SET,
@@ -617,7 +617,7 @@ enum link_training_result dp_perform_fixed_vs_pe_training_sequence( · 339 unmodified lines
617617 /* Vendor specific: Toggle link rate */
618618 toggle_rate = (rate == 0x6) ? 0xA : 0x6;
619619
620− if (link->vendor_specific_lttpr_link_rate_wa == rate) {
620+ if (link->vendor_specific_lttpr_link_rate_wa == rate || link->vendor_specific_lttpr_link_rate_wa == 0) {
621621 core_link_write_dpcd(
622622 link,
623623 DP_LINK_BW_SET,
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c+3−13
@@ -170,7 +170,6 @@ bool edp_set_backlight_level_nits(struct dc_link *link, · 169 unmodified lines
170170 *(uint32_t *)&dpcd_backlight_set.backlight_level_millinits = backlight_millinits;
171171 *(uint16_t *)&dpcd_backlight_set.backlight_transition_time_ms = (uint16_t)transition_time_in_ms;
172172
173− link->backlight_settings.backlight_millinits = backlight_millinits;
174173
175174 if (!link->dpcd_caps.panel_luminance_control) {
176175 if (core_link_write_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
@@ -288,9 +287,9 @@ bool set_default_brightness_aux(struct dc_link *link) · 111 unmodified lines
288287 if (link && link->dpcd_sink_ext_caps.bits.oled == 1) {
289288 if (!read_default_bl_aux(link, &default_backlight))
290289 default_backlight = 150000;
291− // if < 1 nits or > 5000, it might be wrong readback
292− if (default_backlight < 1000 || default_backlight > 5000000)
293− default_backlight = 150000; //
290+ // if > 5000, it might be wrong readback
291+ if (default_backlight > 5000000)
292+ default_backlight = 150000;
294293
295294 return edp_set_backlight_level_nits(link, true,
296295 default_backlight, 0);
@@ -298,15 +297,6 @@ bool set_default_brightness_aux(struct dc_link *link) · 1 unmodified line
298297 return false;
299298 }
300299
301−bool set_cached_brightness_aux(struct dc_link *link)
302−{
303− if (link->backlight_settings.backlight_millinits)
304− return edp_set_backlight_level_nits(link, true,
305− link->backlight_settings.backlight_millinits, 0);
306− else
307− return set_default_brightness_aux(link);
308− return false;
309−}
310300 bool edp_is_ilr_optimization_enabled(struct dc_link *link)
311301 {
312302 if (link->dpcd_caps.edp_supported_link_rates_count == 0 || !link->panel_config.ilr.optimize_edp_link_rate)
drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.h+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
3030 enum dp_panel_mode dp_get_panel_mode(struct dc_link *link);
3131 void dp_set_panel_mode(struct dc_link *link, enum dp_panel_mode panel_mode);
3232 bool set_default_brightness_aux(struct dc_link *link);
33−bool set_cached_brightness_aux(struct dc_link *link);
3433 void edp_panel_backlight_power_on(struct dc_link *link, bool wait_for_hpd);
3534 int edp_get_backlight_level(const struct dc_link *link);
3635 bool edp_get_backlight_level_nits(struct dc_link *link,
drivers/gpu/drm/amd/display/dmub/dmub_srv.h+14−8
@@ -195,6 +195,7 @@ struct dmub_srv_region_params { · 194 unmodified lines
195195 uint32_t vbios_size;
196196 const uint8_t *fw_inst_const;
197197 const uint8_t *fw_bss_data;
198+ bool is_mailbox_in_inbox;
198199 };
199200
200201 /**
@@ -214,20 +215,25 @@ struct dmub_srv_region_params { · 13 unmodified lines
214215 */
215216 struct dmub_srv_region_info {
216217 uint32_t fb_size;
218+ uint32_t inbox_size;
217219 uint8_t num_regions;
218220 struct dmub_region regions[DMUB_WINDOW_TOTAL];
219221 };
220222
221223 /**
222− * struct dmub_srv_fb_params - parameters used for driver fb setup
224+ * struct dmub_srv_memory_params - parameters used for driver fb setup
223225 * @region_info: region info calculated by dmub service
224− * @cpu_addr: base cpu address for the framebuffer
225− * @gpu_addr: base gpu virtual address for the framebuffer
226+ * @cpu_fb_addr: base cpu address for the framebuffer
227+ * @cpu_inbox_addr: base cpu address for the gart
228+ * @gpu_fb_addr: base gpu virtual address for the framebuffer
229+ * @gpu_inbox_addr: base gpu virtual address for the gart
226230 */
227−struct dmub_srv_fb_params {
231+struct dmub_srv_memory_params {
228232 const struct dmub_srv_region_info *region_info;
229− void *cpu_addr;
230− uint64_t gpu_addr;
233+ void *cpu_fb_addr;
234+ void *cpu_inbox_addr;
235+ uint64_t gpu_fb_addr;
236+ uint64_t gpu_inbox_addr;
231237 };
232238
233239 /**
@@ -563,8 +569,8 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub, · 329 unmodified lines
563569 * DMUB_STATUS_OK - success
564570 * DMUB_STATUS_INVALID - unspecified error
565571 */
566−enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
567− const struct dmub_srv_fb_params *params,
572+enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
573+ const struct dmub_srv_memory_params *params,
568574 struct dmub_srv_fb_info *out);
569575
570576 /**
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c+40−11
@@ -434,7 +434,7 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub, · 433 unmodified lines
434434 uint32_t fw_state_size = DMUB_FW_STATE_SIZE;
435435 uint32_t trace_buffer_size = DMUB_TRACE_BUFFER_SIZE;
436436 uint32_t scratch_mem_size = DMUB_SCRATCH_MEM_SIZE;
437−
437+ uint32_t previous_top = 0;
438438 if (!dmub->sw_init)
439439 return DMUB_STATUS_INVALID;
440440
@@ -459,8 +459,15 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub, · 18 unmodified lines
459459 bios->base = dmub_align(stack->top, 256);
460460 bios->top = bios->base + params->vbios_size;
461461
462− mail->base = dmub_align(bios->top, 256);
463− mail->top = mail->base + DMUB_MAILBOX_SIZE;
462+ if (params->is_mailbox_in_inbox) {
463+ mail->base = 0;
464+ mail->top = mail->base + DMUB_MAILBOX_SIZE;
465+ previous_top = bios->top;
466+ } else {
467+ mail->base = dmub_align(bios->top, 256);
468+ mail->top = mail->base + DMUB_MAILBOX_SIZE;
469+ previous_top = mail->top;
470+ }
464471
465472 fw_info = dmub_get_fw_meta_info(params);
466473
@@ -479,7 +486,7 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub, · 12 unmodified lines
479486 dmub->fw_version = fw_info->fw_version;
480487 }
481488
482− trace_buff->base = dmub_align(mail->top, 256);
489+ trace_buff->base = dmub_align(previous_top, 256);
483490 trace_buff->top = trace_buff->base + dmub_align(trace_buffer_size, 64);
484491
485492 fw_state->base = dmub_align(trace_buff->top, 256);
@@ -490,11 +497,14 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub, · 4 unmodified lines
490497
491498 out->fb_size = dmub_align(scratch_mem->top, 4096);
492499
500+ if (params->is_mailbox_in_inbox)
501+ out->inbox_size = dmub_align(mail->top, 4096);
502+
493503 return DMUB_STATUS_OK;
494504 }
495505
496−enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
497− const struct dmub_srv_fb_params *params,
506+enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
507+ const struct dmub_srv_memory_params *params,
498508 struct dmub_srv_fb_info *out)
499509 {
500510 uint8_t *cpu_base;
@@ -509,8 +519,8 @@ enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, · 8 unmodified lines
509519 if (params->region_info->num_regions != DMUB_NUM_WINDOWS)
510520 return DMUB_STATUS_INVALID;
511521
512− cpu_base = (uint8_t *)params->cpu_addr;
513− gpu_base = params->gpu_addr;
522+ cpu_base = (uint8_t *)params->cpu_fb_addr;
523+ gpu_base = params->gpu_fb_addr;
514524
515525 for (i = 0; i < DMUB_NUM_WINDOWS; ++i) {
516526 const struct dmub_region *reg =
@@ -518,6 +528,12 @@ enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, · 1 unmodified line
518528
519529 out->fb[i].cpu_addr = cpu_base + reg->base;
520530 out->fb[i].gpu_addr = gpu_base + reg->base;
531+
532+ if (i == DMUB_WINDOW_4_MAILBOX && params->cpu_inbox_addr != 0) {
533+ out->fb[i].cpu_addr = (uint8_t *)params->cpu_inbox_addr + reg->base;
534+ out->fb[i].gpu_addr = params->gpu_inbox_addr + reg->base;
535+ }
536+
521537 out->fb[i].size = reg->top - reg->base;
522538 }
523539
@@ -707,9 +723,16 @@ enum dmub_status dmub_srv_sync_inbox1(struct dmub_srv *dmub) · 183 unmodified lines
707723 return DMUB_STATUS_INVALID;
708724
709725 if (dmub->hw_funcs.get_inbox1_rptr && dmub->hw_funcs.get_inbox1_wptr) {
710− dmub->inbox1_rb.rptr = dmub->hw_funcs.get_inbox1_rptr(dmub);
711− dmub->inbox1_rb.wrpt = dmub->hw_funcs.get_inbox1_wptr(dmub);
712− dmub->inbox1_last_wptr = dmub->inbox1_rb.wrpt;
726+ uint32_t rptr = dmub->hw_funcs.get_inbox1_rptr(dmub);
727+ uint32_t wptr = dmub->hw_funcs.get_inbox1_wptr(dmub);
728+
729+ if (rptr > dmub->inbox1_rb.capacity || wptr > dmub->inbox1_rb.capacity) {
730+ return DMUB_STATUS_HW_FAILURE;
731+ } else {
732+ dmub->inbox1_rb.rptr = rptr;
733+ dmub->inbox1_rb.wrpt = wptr;
734+ dmub->inbox1_last_wptr = dmub->inbox1_rb.wrpt;
735+ }
713736 }
714737
715738 return DMUB_STATUS_OK;
@@ -743,6 +766,11 @@ enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, · 27 unmodified lines
743766 if (!dmub->hw_init)
744767 return DMUB_STATUS_INVALID;
745768
769+ if (dmub->inbox1_rb.rptr > dmub->inbox1_rb.capacity ||
770+ dmub->inbox1_rb.wrpt > dmub->inbox1_rb.capacity) {
771+ return DMUB_STATUS_HW_FAILURE;
772+ }
773+
746774 if (dmub_rb_push_front(&dmub->inbox1_rb, cmd))
747775 return DMUB_STATUS_OK;
748776
@@ -1049,6 +1077,7 @@ enum dmub_status dmub_srv_wait_for_inbox0_ack(struct dmub_srv *dmub, uint32_t ti · 300 unmodified lines
10491077 ack = dmub->hw_funcs.read_inbox0_ack_register(dmub);
10501078 if (ack)
10511079 return DMUB_STATUS_OK;
1080+ udelay(1);
10521081 }
10531082 return DMUB_STATUS_TIMEOUT;
10541083 }
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_0_0_offset.h+2−0
@@ -6369,6 +6369,8 @@ · 6368 unmodified lines
63696369 #define regTCP_INVALIDATE_BASE_IDX 1
63706370 #define regTCP_STATUS 0x19a1
63716371 #define regTCP_STATUS_BASE_IDX 1
6372+#define regTCP_CNTL 0x19a2
6373+#define regTCP_CNTL_BASE_IDX 1
63726374 #define regTCP_CNTL2 0x19a3
63736375 #define regTCP_CNTL2_BASE_IDX 1
63746376 #define regTCP_DEBUG_INDEX 0x19a5
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_offset.h+2−0
@@ -781,6 +781,8 @@ · 780 unmodified lines
781781 #define regBIF_BIF256_CI256_RC3X4_USB4_PCIE_CNTL2_BASE_IDX 5
782782 #define regBIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1 0x420187
783783 #define regBIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1_BASE_IDX 5
784+#define regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3 0x4201c6
785+#define regBIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3_BASE_IDX 5
784786
785787
786788 // addressBlock: nbio_nbif0_bif_cfg_dev0_rc_bifcfgdecp
drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_11_0_sh_mask.h+29−0
@@ -24646,6 +24646,35 @@ · 24645 unmodified lines
2464624646 //BIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1
2464724647 #define BIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1__MST_MEM_LS_EN_MASK 0x00000001L
2464824648 #define BIF_BIF256_CI256_RC3X4_USB4_PCIE_TX_POWER_CTRL_1__REPLAY_MEM_LS_EN_MASK 0x00000008L
24649+//BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3
24650+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_PAYLOAD_SIZE_MODE__SHIFT 0x8
24651+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_PRIV_MAX_PAYLOAD_SIZE__SHIFT 0x9
24652+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_10BIT_TAG_EN_OVERRIDE__SHIFT 0xb
24653+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_10BIT_TAG_EN_OVERRIDE__SHIFT 0xd
24654+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__MST_DROP_SYNC_FLOOD_EN__SHIFT 0xf
24655+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_PAYLOAD_SIZE_MODE__SHIFT 0x10
24656+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_PRIV_MAX_PAYLOAD_SIZE__SHIFT 0x11
24657+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_READ_REQUEST_SIZE_MODE__SHIFT 0x14
24658+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_PRIV_MAX_READ_REQUEST_SIZE__SHIFT 0x15
24659+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_READ_SAFE_MODE__SHIFT 0x18
24660+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_EXTENDED_TAG_EN_OVERRIDE__SHIFT 0x19
24661+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_READ_REQUEST_SIZE_MODE__SHIFT 0x1b
24662+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_READ_REQUEST_SIZE_PRIV__SHIFT 0x1c
24663+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_EXTENDED_TAG_EN_OVERRIDE__SHIFT 0x1e
24664+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_PAYLOAD_SIZE_MODE_MASK 0x00000100L
24665+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_PRIV_MAX_PAYLOAD_SIZE_MASK 0x00000600L
24666+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_10BIT_TAG_EN_OVERRIDE_MASK 0x00001800L
24667+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_10BIT_TAG_EN_OVERRIDE_MASK 0x00006000L
24668+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__MST_DROP_SYNC_FLOOD_EN_MASK 0x00008000L
24669+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_PAYLOAD_SIZE_MODE_MASK 0x00010000L
24670+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_PRIV_MAX_PAYLOAD_SIZE_MASK 0x000E0000L
24671+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_READ_REQUEST_SIZE_MODE_MASK 0x00100000L
24672+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_PRIV_MAX_READ_REQUEST_SIZE_MASK 0x00E00000L
24673+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_MAX_READ_SAFE_MODE_MASK 0x01000000L
24674+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_EXTENDED_TAG_EN_OVERRIDE_MASK 0x06000000L
24675+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_READ_REQUEST_SIZE_MODE_MASK 0x08000000L
24676+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_MAX_READ_REQUEST_SIZE_PRIV_MASK 0x30000000L
24677+#define BIF_BIF256_CI256_RC3X4_USB4_PCIE_MST_CTRL_3__CI_SWUS_EXTENDED_TAG_EN_OVERRIDE_MASK 0xC0000000L
2464924678
2465024679 // addressBlock: nbio_nbif0_bif_cfg_dev0_rc_bifcfgdecp
2465124680 //BIF_CFG_DEV0_RC0_VENDOR_ID
drivers/gpu/drm/amd/include/kgd_pp_interface.h+18−0
@@ -444,6 +444,7 @@ struct amd_pm_funcs { · 443 unmodified lines
444444 struct dpm_clocks *clock_table);
445445 int (*get_smu_prv_buf_details)(void *handle, void **addr, size_t *size);
446446 void (*pm_compute_clocks)(void *handle);
447+ int (*notify_rlc_state)(void *handle, bool en);
447448 };
448449
449450 struct metrics_table_header {
@@ -1084,6 +1085,10 @@ struct gpu_metrics_v3_0 { · 634 unmodified lines
10841085 uint16_t average_dram_reads;
10851086 /* time filtered DRAM write bandwidth [MB/sec] */
10861087 uint16_t average_dram_writes;
1088+ /* time filtered IPU read bandwidth [MB/sec] */
1089+ uint16_t average_ipu_reads;
1090+ /* time filtered IPU write bandwidth [MB/sec] */
1091+ uint16_t average_ipu_writes;
10871092
10881093 /* Driver attached timestamp (in ns) */
10891094 uint64_t system_clock_counter;
@@ -1103,6 +1108,8 @@ struct gpu_metrics_v3_0 { · 13 unmodified lines
11031108 uint32_t average_all_core_power;
11041109 /* calculated core power [mW] */
11051110 uint16_t average_core_power[16];
1111+ /* time filtered total system power [mW] */
1112+ uint16_t average_sys_power;
11061113 /* maximum IRM defined STAPM power limit [mW] */
11071114 uint16_t stapm_power_limit;
11081115 /* time filtered STAPM power limit [mW] */
@@ -1115,6 +1122,8 @@ struct gpu_metrics_v3_0 { · 6 unmodified lines
11151122 uint16_t average_ipuclk_frequency;
11161123 uint16_t average_fclk_frequency;
11171124 uint16_t average_vclk_frequency;
1125+ uint16_t average_uclk_frequency;
1126+ uint16_t average_mpipu_frequency;
11181127
11191128 /* Current clocks */
11201129 /* target core frequency [MHz] */
@@ -1124,6 +1133,15 @@ struct gpu_metrics_v3_0 { · 3 unmodified lines
11241133 /* GFXCLK frequency limit enforced on GFX [MHz] */
11251134 uint16_t current_gfx_maxfreq;
11261135
1136+ /* Throttle Residency (ASIC dependent) */
1137+ uint32_t throttle_residency_prochot;
1138+ uint32_t throttle_residency_spl;
1139+ uint32_t throttle_residency_fppt;
1140+ uint32_t throttle_residency_sppt;
1141+ uint32_t throttle_residency_thm_core;
1142+ uint32_t throttle_residency_thm_gfx;
1143+ uint32_t throttle_residency_thm_soc;
1144+
11271145 /* Metrics table alpha filter time constant [us] */
11281146 uint32_t time_filter_alphavalue;
11291147 };
drivers/gpu/drm/amd/pm/amdgpu_dpm.c+18−0
@@ -181,6 +181,24 @@ int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev, · 180 unmodified lines
181181 return ret;
182182 }
183183
184+int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en)
185+{
186+ int ret = 0;
187+ const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
188+
189+ if (pp_funcs && pp_funcs->notify_rlc_state) {
190+ mutex_lock(&adev->pm.mutex);
191+
192+ ret = pp_funcs->notify_rlc_state(
193+ adev->powerplay.pp_handle,
194+ en);
195+
196+ mutex_unlock(&adev->pm.mutex);
197+ }
198+
199+ return ret;
200+}
201+
184202 bool amdgpu_dpm_is_baco_supported(struct amdgpu_device *adev)
185203 {
186204 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h+2−0
@@ -415,6 +415,8 @@ int amdgpu_dpm_mode1_reset(struct amdgpu_device *adev); · 414 unmodified lines
415415 int amdgpu_dpm_set_mp1_state(struct amdgpu_device *adev,
416416 enum pp_mp1_state mp1_state);
417417
418+int amdgpu_dpm_notify_rlc_state(struct amdgpu_device *adev, bool en);
419+
418420 int amdgpu_dpm_set_gfx_power_up_by_imu(struct amdgpu_device *adev);
419421
420422 int amdgpu_dpm_baco_exit(struct amdgpu_device *adev);
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+10−0
@@ -1710,6 +1710,16 @@ static int smu_disable_dpms(struct smu_context *smu) · 1709 unmodified lines
17101710 }
17111711 }
17121712
1713+ /* Notify SMU RLC is going to be off, stop RLC and SMU interaction.
1714+ * otherwise SMU will hang while interacting with RLC if RLC is halted
1715+ * this is a WA for Vangogh asic which fix the SMU hang issue.
1716+ */
1717+ ret = smu_notify_rlc_state(smu, false);
1718+ if (ret) {
1719+ dev_err(adev->dev, "Fail to notify rlc status!\n");
1720+ return ret;
1721+ }
1722+
17131723 if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(9, 4, 2) &&
17141724 !((adev->flags & AMD_IS_APU) && adev->gfx.imu.funcs) &&
17151725 !amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->stop)
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h+15−0
@@ -1360,6 +1360,11 @@ struct pptable_funcs { · 1359 unmodified lines
13601360 * management.
13611361 */
13621362 int (*dpm_set_umsch_mm_enable)(struct smu_context *smu, bool enable);
1363+
1364+ /**
1365+ * @notify_rlc_state: Notify RLC power state to SMU.
1366+ */
1367+ int (*notify_rlc_state)(struct smu_context *smu, bool en);
13631368 };
13641369
13651370 typedef enum {
@@ -1403,6 +1408,16 @@ typedef enum { · 37 unmodified lines
14031408 METRICS_PCIE_WIDTH,
14041409 METRICS_CURR_FANPWM,
14051410 METRICS_CURR_SOCKETPOWER,
1411+ METRICS_AVERAGE_VPECLK,
1412+ METRICS_AVERAGE_IPUCLK,
1413+ METRICS_AVERAGE_MPIPUCLK,
1414+ METRICS_THROTTLER_RESIDENCY_PROCHOT,
1415+ METRICS_THROTTLER_RESIDENCY_SPL,
1416+ METRICS_THROTTLER_RESIDENCY_FPPT,
1417+ METRICS_THROTTLER_RESIDENCY_SPPT,
1418+ METRICS_THROTTLER_RESIDENCY_THM_CORE,
1419+ METRICS_THROTTLER_RESIDENCY_THM_GFX,
1420+ METRICS_THROTTLER_RESIDENCY_THM_SOC,
14061421 } MetricsMember_t;
14071422
14081423 enum smu_cmn2asic_mapping_type {
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0_0.h+45−32
@@ -27,7 +27,7 @@ · 26 unmodified lines
2727 // *** IMPORTANT ***
2828 // SMU TEAM: Always increment the interface version if
2929 // any structure is changed in this file
30−#define PMFW_DRIVER_IF_VERSION 6
30+#define PMFW_DRIVER_IF_VERSION 7
3131
3232 typedef struct {
3333 int32_t value;
@@ -150,37 +150,50 @@ typedef struct { · 116 unmodified lines
150150 } DpmClocks_t;
151151
152152 typedef struct {
153− uint16_t CoreFrequency[16]; //Target core frequency [MHz]
154− uint16_t CorePower[16]; //CAC calculated core power [mW]
155− uint16_t CoreTemperature[16]; //TSEN measured core temperature [centi-C]
156− uint16_t GfxTemperature; //TSEN measured GFX temperature [centi-C]
157− uint16_t SocTemperature; //TSEN measured SOC temperature [centi-C]
158− uint16_t StapmOpnLimit; //Maximum IRM defined STAPM power limit [mW]
159− uint16_t StapmCurrentLimit; //Time filtered STAPM power limit [mW]
160− uint16_t InfrastructureCpuMaxFreq; //CCLK frequency limit enforced on classic cores [MHz]
161− uint16_t InfrastructureGfxMaxFreq; //GFXCLK frequency limit enforced on GFX [MHz]
162− uint16_t SkinTemp; //Maximum skin temperature reported by APU and HS2 chassis sensors [centi-C]
163− uint16_t GfxclkFrequency; //Time filtered target GFXCLK frequency [MHz]
164− uint16_t FclkFrequency; //Time filtered target FCLK frequency [MHz]
165− uint16_t GfxActivity; //Time filtered GFX busy % [0-100]
166− uint16_t SocclkFrequency; //Time filtered target SOCCLK frequency [MHz]
167− uint16_t VclkFrequency; //Time filtered target VCLK frequency [MHz]
168− uint16_t VcnActivity; //Time filtered VCN busy % [0-100]
169− uint16_t VpeclkFrequency; //Time filtered target VPECLK frequency [MHz]
170− uint16_t IpuclkFrequency; //Time filtered target IPUCLK frequency [MHz]
171− uint16_t IpuBusy[8]; //Time filtered IPU per-column busy % [0-100]
172− uint16_t DRAMReads; //Time filtered DRAM read bandwidth [MB/sec]
173− uint16_t DRAMWrites; //Time filtered DRAM write bandwidth [MB/sec]
174− uint16_t CoreC0Residency[16]; //Time filtered per-core C0 residency % [0-100]
175− uint16_t IpuPower; //Time filtered IPU power [mW]
176− uint32_t ApuPower; //Time filtered APU power [mW]
177− uint32_t GfxPower; //Time filtered GFX power [mW]
178− uint32_t dGpuPower; //Time filtered dGPU power [mW]
179− uint32_t SocketPower; //Time filtered power used for PPT/STAPM [APU+dGPU] [mW]
180− uint32_t AllCorePower; //Time filtered sum of core power across all cores in the socket [mW]
181− uint32_t FilterAlphaValue; //Metrics table alpha filter time constant [us]
182− uint32_t MetricsCounter; //Counter that is incremented on every metrics table update [PM_TIMER cycles]
183− uint32_t spare[16];
153+ uint16_t CoreFrequency[16]; //Target core frequency [MHz]
154+ uint16_t CorePower[16]; //CAC calculated core power [mW]
155+ uint16_t CoreTemperature[16]; //TSEN measured core temperature [centi-C]
156+ uint16_t GfxTemperature; //TSEN measured GFX temperature [centi-C]
157+ uint16_t SocTemperature; //TSEN measured SOC temperature [centi-C]
158+ uint16_t StapmOpnLimit; //Maximum IRM defined STAPM power limit [mW]
159+ uint16_t StapmCurrentLimit; //Time filtered STAPM power limit [mW]
160+ uint16_t InfrastructureCpuMaxFreq; //CCLK frequency limit enforced on classic cores [MHz]
161+ uint16_t InfrastructureGfxMaxFreq; //GFXCLK frequency limit enforced on GFX [MHz]
162+ uint16_t SkinTemp; //Maximum skin temperature reported by APU and HS2 chassis sensors [centi-C]
163+ uint16_t GfxclkFrequency; //Time filtered target GFXCLK frequency [MHz]
164+ uint16_t FclkFrequency; //Time filtered target FCLK frequency [MHz]
165+ uint16_t GfxActivity; //Time filtered GFX busy % [0-100]
166+ uint16_t SocclkFrequency; //Time filtered target SOCCLK frequency [MHz]
167+ uint16_t VclkFrequency; //Time filtered target VCLK frequency [MHz]
168+ uint16_t VcnActivity; //Time filtered VCN busy % [0-100]
169+ uint16_t VpeclkFrequency; //Time filtered target VPECLK frequency [MHz]
170+ uint16_t IpuclkFrequency; //Time filtered target IPUCLK frequency [MHz]
171+ uint16_t IpuBusy[8]; //Time filtered IPU per-column busy % [0-100]
172+ uint16_t DRAMReads; //Time filtered DRAM read bandwidth [MB/sec]
173+ uint16_t DRAMWrites; //Time filtered DRAM write bandwidth [MB/sec]
174+ uint16_t CoreC0Residency[16]; //Time filtered per-core C0 residency % [0-100]
175+ uint16_t IpuPower; //Time filtered IPU power [mW]
176+ uint32_t ApuPower; //Time filtered APU power [mW]
177+ uint32_t GfxPower; //Time filtered GFX power [mW]
178+ uint32_t dGpuPower; //Time filtered dGPU power [mW]
179+ uint32_t SocketPower; //Time filtered power used for PPT/STAPM [APU+dGPU] [mW]
180+ uint32_t AllCorePower; //Time filtered sum of core power across all cores in the socket [mW]
181+ uint32_t FilterAlphaValue; //Metrics table alpha filter time constant [us]
182+ uint32_t MetricsCounter; //Counter that is incremented on every metrics table update [PM_TIMER cycles]
183+ uint16_t MemclkFrequency; //Time filtered target MEMCLK frequency [MHz]
184+ uint16_t MpipuclkFrequency; //Time filtered target MPIPUCLK frequency [MHz]
185+ uint16_t IpuReads; //Time filtered IPU read bandwidth [MB/sec]
186+ uint16_t IpuWrites; //Time filtered IPU write bandwidth [MB/sec]
187+ uint32_t ThrottleResidency_PROCHOT; //Counter that is incremented on every metrics table update when PROCHOT was engaged [PM_TIMER cycles]
188+ uint32_t ThrottleResidency_SPL; //Counter that is incremented on every metrics table update when SPL was engaged [PM_TIMER cycles]
189+ uint32_t ThrottleResidency_FPPT; //Counter that is incremented on every metrics table update when fast PPT was engaged [PM_TIMER cycles]
190+ uint32_t ThrottleResidency_SPPT; //Counter that is incremented on every metrics table update when slow PPT was engaged [PM_TIMER cycles]
191+ uint32_t ThrottleResidency_THM_CORE; //Counter that is incremented on every metrics table update when CORE thermal throttling was engaged [PM_TIMER cycles]
192+ uint32_t ThrottleResidency_THM_GFX; //Counter that is incremented on every metrics table update when GFX thermal throttling was engaged [PM_TIMER cycles]
193+ uint32_t ThrottleResidency_THM_SOC; //Counter that is incremented on every metrics table update when SOC thermal throttling was engaged [PM_TIMER cycles]
194+ uint16_t Psys; //Time filtered Psys power [mW]
195+ uint16_t spare1;
196+ uint32_t spare[6];
184197 } SmuMetrics_t;
185198
186199 //ISP tile definitions
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_pmfw.h+9−1
@@ -123,7 +123,7 @@ typedef enum { · 122 unmodified lines
123123 VOLTAGE_GUARDBAND_COUNT
124124 } GFX_GUARDBAND_e;
125125
126−#define SMU_METRICS_TABLE_VERSION 0x8
126+#define SMU_METRICS_TABLE_VERSION 0x9
127127
128128 typedef struct __attribute__((packed, aligned(4))) {
129129 uint32_t AccumulationCounter;
@@ -211,6 +211,14 @@ typedef struct __attribute__((packed, aligned(4))) { · 81 unmodified lines
211211 //XGMI Data tranfser size
212212 uint64_t XgmiReadDataSizeAcc[8];//in KByte
213213 uint64_t XgmiWriteDataSizeAcc[8];//in KByte
214+
215+ //PCIE BW Data and error count
216+ uint32_t PcieBandwidth[4];
217+ uint32_t PCIeL0ToRecoveryCountAcc; // The Pcie counter itself is accumulated
218+ uint32_t PCIenReplayAAcc; // The Pcie counter itself is accumulated
219+ uint32_t PCIenReplayARolloverCountAcc; // The Pcie counter itself is accumulated
220+ uint32_t PCIeNAKSentCountAcc; // The Pcie counter itself is accumulated
221+ uint32_t PCIeNAKReceivedCountAcc; // The Pcie counter itself is accumulated
214222 } MetricsTable_t;
215223
216224 #define SMU_VF_METRICS_TABLE_VERSION 0x3
drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c+2−3
@@ -2193,8 +2193,7 @@ static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clock · 2192 unmodified lines
21932193 return 0;
21942194 }
21952195
2196−
2197−static int vangogh_system_features_control(struct smu_context *smu, bool en)
2196+static int vangogh_notify_rlc_state(struct smu_context *smu, bool en)
21982197 {
21992198 struct amdgpu_device *adev = smu->adev;
22002199 int ret = 0;
@@ -2523,7 +2522,7 @@ static const struct pptable_funcs vangogh_ppt_funcs = { · 322 unmodified lines
25232522 .print_clk_levels = vangogh_common_print_clk_levels,
25242523 .set_default_dpm_table = vangogh_set_default_dpm_tables,
25252524 .set_fine_grain_gfx_freq_parameters = vangogh_set_fine_grain_gfx_freq_parameters,
2526− .system_features_control = vangogh_system_features_control,
2525+ .notify_rlc_state = vangogh_notify_rlc_state,
25272526 .feature_is_enabled = smu_cmn_feature_is_enabled,
25282527 .set_power_profile_mode = vangogh_set_power_profile_mode,
25292528 .get_power_profile_mode = vangogh_get_power_profile_mode,
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c+4−1
@@ -257,8 +257,11 @@ static int aldebaran_tables_init(struct smu_context *smu) · 256 unmodified lines
257257 }
258258
259259 smu_table->ecc_table = kzalloc(tables[SMU_TABLE_ECCINFO].size, GFP_KERNEL);
260− if (!smu_table->ecc_table)
260+ if (!smu_table->ecc_table) {
261+ kfree(smu_table->metrics_table);
262+ kfree(smu_table->gpu_metrics_table);
261263 return -ENOMEM;
264+ }
262265
263266 return 0;
264267 }
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+17−2
@@ -1454,7 +1454,7 @@ static int smu_v13_0_6_register_irq_handler(struct smu_context *smu) · 1453 unmodified lines
14541454
14551455 static int smu_v13_0_6_notify_unload(struct smu_context *smu)
14561456 {
1457− if (smu->smc_fw_version <= 0x553500)
1457+ if (amdgpu_in_reset(smu->adev))
14581458 return 0;
14591459
14601460 dev_dbg(smu->adev->dev, "Notify PMFW about driver unload");
@@ -2095,6 +2095,14 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context *smu, void **table · 634 unmodified lines
20952095 smu_v13_0_6_get_current_pcie_link_speed(smu);
20962096 gpu_metrics->pcie_bandwidth_acc =
20972097 SMUQ10_ROUND(metrics->PcieBandwidthAcc[0]);
2098+ gpu_metrics->pcie_bandwidth_inst =
2099+ SMUQ10_ROUND(metrics->PcieBandwidth[0]);
2100+ gpu_metrics->pcie_l0_to_recov_count_acc =
2101+ metrics->PCIeL0ToRecoveryCountAcc;
2102+ gpu_metrics->pcie_replay_count_acc =
2103+ metrics->PCIenReplayAAcc;
2104+ gpu_metrics->pcie_replay_rover_count_acc =
2105+ metrics->PCIenReplayARolloverCountAcc;
20982106 }
20992107
21002108 gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
@@ -2585,13 +2593,20 @@ static bool mca_gfx_smu_bank_is_valid(const struct mca_ras_info *mca_ras, struct · 484 unmodified lines
25852593 static bool mca_smu_bank_is_valid(const struct mca_ras_info *mca_ras, struct amdgpu_device *adev,
25862594 enum amdgpu_mca_error_type type, struct mca_bank_entry *entry)
25872595 {
2596+ struct smu_context *smu = adev->powerplay.pp_handle;
25882597 uint32_t errcode, instlo;
25892598
25902599 instlo = REG_GET_FIELD(entry->regs[MCA_REG_IDX_IPID], MCMP1_IPIDT0, InstanceIdLo);
25912600 if (instlo != 0x03b30400)
25922601 return false;
25932602
2594− errcode = REG_GET_FIELD(entry->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);
2603+ if (!(adev->flags & AMD_IS_APU) && smu->smc_fw_version >= 0x00555600) {
2604+ errcode = MCA_REG__SYND__ERRORINFORMATION(entry->regs[MCA_REG_IDX_SYND]);
2605+ errcode &= 0xff;
2606+ } else {
2607+ errcode = REG_GET_FIELD(entry->regs[MCA_REG_IDX_STATUS], MCMP1_STATUST0, ErrorCode);
2608+ }
2609+
25952610 return mca_smu_check_error_code(adev, mca_ras, errcode);
25962611 }
25972612
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c+43−3
@@ -246,11 +246,20 @@ static int smu_v14_0_0_get_smu_metrics_data(struct smu_context *smu, · 245 unmodified lines
246246 *value = 0;
247247 break;
248248 case METRICS_AVERAGE_UCLK:
249− *value = 0;
249+ *value = metrics->MemclkFrequency;
250250 break;
251251 case METRICS_AVERAGE_FCLK:
252252 *value = metrics->FclkFrequency;
253253 break;
254+ case METRICS_AVERAGE_VPECLK:
255+ *value = metrics->VpeclkFrequency;
256+ break;
257+ case METRICS_AVERAGE_IPUCLK:
258+ *value = metrics->IpuclkFrequency;
259+ break;
260+ case METRICS_AVERAGE_MPIPUCLK:
261+ *value = metrics->MpipuclkFrequency;
262+ break;
254263 case METRICS_AVERAGE_GFXACTIVITY:
255264 *value = metrics->GfxActivity / 100;
256265 break;
@@ -270,8 +279,26 @@ static int smu_v14_0_0_get_smu_metrics_data(struct smu_context *smu, · 13 unmodified lines
270279 *value = metrics->SocTemperature / 100 *
271280 SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
272281 break;
273− case METRICS_THROTTLER_STATUS:
274− *value = 0;
282+ case METRICS_THROTTLER_RESIDENCY_PROCHOT:
283+ *value = metrics->ThrottleResidency_PROCHOT;
284+ break;
285+ case METRICS_THROTTLER_RESIDENCY_SPL:
286+ *value = metrics->ThrottleResidency_SPL;
287+ break;
288+ case METRICS_THROTTLER_RESIDENCY_FPPT:
289+ *value = metrics->ThrottleResidency_FPPT;
290+ break;
291+ case METRICS_THROTTLER_RESIDENCY_SPPT:
292+ *value = metrics->ThrottleResidency_SPPT;
293+ break;
294+ case METRICS_THROTTLER_RESIDENCY_THM_CORE:
295+ *value = metrics->ThrottleResidency_THM_CORE;
296+ break;
297+ case METRICS_THROTTLER_RESIDENCY_THM_GFX:
298+ *value = metrics->ThrottleResidency_THM_GFX;
299+ break;
300+ case METRICS_THROTTLER_RESIDENCY_THM_SOC:
301+ *value = metrics->ThrottleResidency_THM_SOC;
275302 break;
276303 case METRICS_VOLTAGE_VDDGFX:
277304 *value = 0;
@@ -498,6 +525,8 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu, · 220 unmodified lines
498525 sizeof(uint16_t) * 16);
499526 gpu_metrics->average_dram_reads = metrics.DRAMReads;
500527 gpu_metrics->average_dram_writes = metrics.DRAMWrites;
528+ gpu_metrics->average_ipu_reads = metrics.IpuReads;
529+ gpu_metrics->average_ipu_writes = metrics.IpuWrites;
501530
502531 gpu_metrics->average_socket_power = metrics.SocketPower;
503532 gpu_metrics->average_ipu_power = metrics.IpuPower;
@@ -505,6 +534,7 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu, · 1 unmodified line
505534 gpu_metrics->average_gfx_power = metrics.GfxPower;
506535 gpu_metrics->average_dgpu_power = metrics.dGpuPower;
507536 gpu_metrics->average_all_core_power = metrics.AllCorePower;
537+ gpu_metrics->average_sys_power = metrics.Psys;
508538 memcpy(&gpu_metrics->average_core_power[0],
509539 &metrics.CorePower[0],
510540 sizeof(uint16_t) * 16);
@@ -515,6 +545,8 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu, · 4 unmodified lines
515545 gpu_metrics->average_fclk_frequency = metrics.FclkFrequency;
516546 gpu_metrics->average_vclk_frequency = metrics.VclkFrequency;
517547 gpu_metrics->average_ipuclk_frequency = metrics.IpuclkFrequency;
548+ gpu_metrics->average_uclk_frequency = metrics.MemclkFrequency;
549+ gpu_metrics->average_mpipu_frequency = metrics.MpipuclkFrequency;
518550
519551 memcpy(&gpu_metrics->current_coreclk[0],
520552 &metrics.CoreFrequency[0],
@@ -522,6 +554,14 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu, · 1 unmodified line
522554 gpu_metrics->current_core_maxfreq = metrics.InfrastructureCpuMaxFreq;
523555 gpu_metrics->current_gfx_maxfreq = metrics.InfrastructureGfxMaxFreq;
524556
557+ gpu_metrics->throttle_residency_prochot = metrics.ThrottleResidency_PROCHOT;
558+ gpu_metrics->throttle_residency_spl = metrics.ThrottleResidency_SPL;
559+ gpu_metrics->throttle_residency_fppt = metrics.ThrottleResidency_FPPT;
560+ gpu_metrics->throttle_residency_sppt = metrics.ThrottleResidency_SPPT;
561+ gpu_metrics->throttle_residency_thm_core = metrics.ThrottleResidency_THM_CORE;
562+ gpu_metrics->throttle_residency_thm_gfx = metrics.ThrottleResidency_THM_GFX;
563+ gpu_metrics->throttle_residency_thm_soc = metrics.ThrottleResidency_THM_SOC;
564+
525565 gpu_metrics->time_filter_alphavalue = metrics.FilterAlphaValue;
526566 gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
527567
drivers/gpu/drm/amd/pm/swsmu/smu_internal.h+1−0
@@ -97,6 +97,7 @@ · 96 unmodified lines
9797 #define smu_get_default_config_table_settings(smu, config_table) smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, config_table)
9898 #define smu_set_config_table(smu, config_table) smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table)
9999 #define smu_init_pptable_microcode(smu) smu_ppt_funcs(init_pptable_microcode, 0, smu)
100+#define smu_notify_rlc_state(smu, en) smu_ppt_funcs(notify_rlc_state, 0, smu, en)
100101
101102 #endif
102103 #endif
drivers/gpu/drm/ast/ast_drv.h+12−1
@@ -174,6 +174,17 @@ to_ast_sil164_connector(struct drm_connector *connector) · 173 unmodified lines
174174 return container_of(connector, struct ast_sil164_connector, base);
175175 }
176176
177+struct ast_bmc_connector {
178+ struct drm_connector base;
179+ struct drm_connector *physical_connector;
180+};
181+
182+static inline struct ast_bmc_connector *
183+to_ast_bmc_connector(struct drm_connector *connector)
184+{
185+ return container_of(connector, struct ast_bmc_connector, base);
186+}
187+
177188 /*
178189 * Device
179190 */
@@ -218,7 +229,7 @@ struct ast_device { · 38 unmodified lines
218229 } astdp;
219230 struct {
220231 struct drm_encoder encoder;
221− struct drm_connector connector;
232+ struct ast_bmc_connector bmc_connector;
222233 } bmc;
223234 } output;
224235
drivers/gpu/drm/ast/ast_mode.c+55−7
@@ -1767,6 +1767,30 @@ static const struct drm_encoder_funcs ast_bmc_encoder_funcs = { · 1766 unmodified lines
17671767 .destroy = drm_encoder_cleanup,
17681768 };
17691769
1770+static int ast_bmc_connector_helper_detect_ctx(struct drm_connector *connector,
1771+ struct drm_modeset_acquire_ctx *ctx,
1772+ bool force)
1773+{
1774+ struct ast_bmc_connector *bmc_connector = to_ast_bmc_connector(connector);
1775+ struct drm_connector *physical_connector = bmc_connector->physical_connector;
1776+
1777+ /*
1778+ * Most user-space compositors cannot handle more than one connected
1779+ * connector per CRTC. Hence, we only mark the BMC as connected if the
1780+ * physical connector is disconnected. If the physical connector's status
1781+ * is connected or unknown, the BMC remains disconnected. This has no
1782+ * effect on the output of the BMC.
1783+ *
1784+ * FIXME: Remove this logic once user-space compositors can handle more
1785+ * than one connector per CRTC. The BMC should always be connected.
1786+ */
1787+
1788+ if (physical_connector && physical_connector->status == connector_status_disconnected)
1789+ return connector_status_connected;
1790+
1791+ return connector_status_disconnected;
1792+}
1793+
17701794 static int ast_bmc_connector_helper_get_modes(struct drm_connector *connector)
17711795 {
17721796 return drm_add_modes_noedid(connector, 4096, 4096);
@@ -1774,6 +1798,7 @@ static int ast_bmc_connector_helper_get_modes(struct drm_connector *connector) · 1 unmodified line
17741798
17751799 static const struct drm_connector_helper_funcs ast_bmc_connector_helper_funcs = {
17761800 .get_modes = ast_bmc_connector_helper_get_modes,
1801+ .detect_ctx = ast_bmc_connector_helper_detect_ctx,
17771802 };
17781803
17791804 static const struct drm_connector_funcs ast_bmc_connector_funcs = {
@@ -1784,12 +1809,33 @@ static const struct drm_connector_funcs ast_bmc_connector_funcs = { · 4 unmodified lines
17841809 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
17851810 };
17861811
1787−static int ast_bmc_output_init(struct ast_device *ast)
1812+static int ast_bmc_connector_init(struct drm_device *dev,
1813+ struct ast_bmc_connector *bmc_connector,
1814+ struct drm_connector *physical_connector)
1815+{
1816+ struct drm_connector *connector = &bmc_connector->base;
1817+ int ret;
1818+
1819+ ret = drm_connector_init(dev, connector, &ast_bmc_connector_funcs,
1820+ DRM_MODE_CONNECTOR_VIRTUAL);
1821+ if (ret)
1822+ return ret;
1823+
1824+ drm_connector_helper_add(connector, &ast_bmc_connector_helper_funcs);
1825+
1826+ bmc_connector->physical_connector = physical_connector;
1827+
1828+ return 0;
1829+}
1830+
1831+static int ast_bmc_output_init(struct ast_device *ast,
1832+ struct drm_connector *physical_connector)
17881833 {
17891834 struct drm_device *dev = &ast->base;
17901835 struct drm_crtc *crtc = &ast->crtc;
17911836 struct drm_encoder *encoder = &ast->output.bmc.encoder;
1792− struct drm_connector *connector = &ast->output.bmc.connector;
1837+ struct ast_bmc_connector *bmc_connector = &ast->output.bmc.bmc_connector;
1838+ struct drm_connector *connector = &bmc_connector->base;
17931839 int ret;
17941840
17951841 ret = drm_encoder_init(dev, encoder,
@@ -1799,13 +1845,10 @@ static int ast_bmc_output_init(struct ast_device *ast) · 3 unmodified lines
17991845 return ret;
18001846 encoder->possible_crtcs = drm_crtc_mask(crtc);
18011847
1802− ret = drm_connector_init(dev, connector, &ast_bmc_connector_funcs,
1803− DRM_MODE_CONNECTOR_VIRTUAL);
1848+ ret = ast_bmc_connector_init(dev, bmc_connector, physical_connector);
18041849 if (ret)
18051850 return ret;
18061851
1807− drm_connector_helper_add(connector, &ast_bmc_connector_helper_funcs);
1808−
18091852 ret = drm_connector_attach_encoder(connector, encoder);
18101853 if (ret)
18111854 return ret;
@@ -1864,6 +1907,7 @@ static const struct drm_mode_config_funcs ast_mode_config_funcs = { · 52 unmodified lines
18641907 int ast_mode_config_init(struct ast_device *ast)
18651908 {
18661909 struct drm_device *dev = &ast->base;
1910+ struct drm_connector *physical_connector = NULL;
18671911 int ret;
18681912
18691913 ret = drmm_mode_config_init(dev);
@@ -1904,23 +1948,27 @@ int ast_mode_config_init(struct ast_device *ast) · 34 unmodified lines
19041948 ret = ast_vga_output_init(ast);
19051949 if (ret)
19061950 return ret;
1951+ physical_connector = &ast->output.vga.vga_connector.base;
19071952 }
19081953 if (ast->tx_chip_types & AST_TX_SIL164_BIT) {
19091954 ret = ast_sil164_output_init(ast);
19101955 if (ret)
19111956 return ret;
1957+ physical_connector = &ast->output.sil164.sil164_connector.base;
19121958 }
19131959 if (ast->tx_chip_types & AST_TX_DP501_BIT) {
19141960 ret = ast_dp501_output_init(ast);
19151961 if (ret)
19161962 return ret;
1963+ physical_connector = &ast->output.dp501.connector;
19171964 }
19181965 if (ast->tx_chip_types & AST_TX_ASTDP_BIT) {
19191966 ret = ast_astdp_output_init(ast);
19201967 if (ret)
19211968 return ret;
1969+ physical_connector = &ast->output.astdp.connector;
19221970 }
1923− ret = ast_bmc_output_init(ast);
1971+ ret = ast_bmc_output_init(ast, physical_connector);
19241972 if (ret)
19251973 return ret;
19261974
drivers/gpu/drm/bridge/Kconfig+1−0
@@ -313,6 +313,7 @@ config DRM_TOSHIBA_TC358768 · 312 unmodified lines
313313 select REGMAP_I2C
314314 select DRM_PANEL
315315 select DRM_MIPI_DSI
316+ select VIDEOMODE_HELPERS
316317 help
317318 Toshiba TC358768AXBG/TC358778XBG DSI bridge chip driver.
318319
drivers/gpu/drm/bridge/panel.c+0−17
@@ -4,8 +4,6 @@ · 3 unmodified lines
44 * Copyright (C) 2017 Broadcom
55 */
66
7−#include <linux/device.h>
8−
97 #include <drm/drm_atomic_helper.h>
108 #include <drm/drm_bridge.h>
119 #include <drm/drm_connector.h>
@@ -21,7 +19,6 @@ struct panel_bridge { · 9 unmodified lines
2119 struct drm_bridge bridge;
2220 struct drm_connector connector;
2321 struct drm_panel *panel;
24− struct device_link *link;
2522 u32 connector_type;
2623 };
2724
@@ -63,24 +60,13 @@ static int panel_bridge_attach(struct drm_bridge *bridge, · 35 unmodified lines
6360 {
6461 struct panel_bridge *panel_bridge = drm_bridge_to_panel_bridge(bridge);
6562 struct drm_connector *connector = &panel_bridge->connector;
66− struct drm_panel *panel = panel_bridge->panel;
67− struct drm_device *drm_dev = bridge->dev;
6863 int ret;
6964
70− panel_bridge->link = device_link_add(drm_dev->dev, panel->dev,
71− DL_FLAG_STATELESS);
72− if (!panel_bridge->link) {
73− DRM_ERROR("Failed to add device link between %s and %s\n",
74− dev_name(drm_dev->dev), dev_name(panel->dev));
75− return -EINVAL;
76− }
77−
7865 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
7966 return 0;
8067
8168 if (!bridge->encoder) {
8269 DRM_ERROR("Missing encoder\n");
83− device_link_del(panel_bridge->link);
8470 return -ENODEV;
8571 }
8672
@@ -92,7 +78,6 @@ static int panel_bridge_attach(struct drm_bridge *bridge, · 5 unmodified lines
9278 panel_bridge->connector_type);
9379 if (ret) {
9480 DRM_ERROR("Failed to initialize connector\n");
95− device_link_del(panel_bridge->link);
9681 return ret;
9782 }
9883
@@ -115,8 +100,6 @@ static void panel_bridge_detach(struct drm_bridge *bridge) · 16 unmodified lines
115100 struct panel_bridge *panel_bridge = drm_bridge_to_panel_bridge(bridge);
116101 struct drm_connector *connector = &panel_bridge->connector;
117102
118− device_link_del(panel_bridge->link);
119−
120103 /*
121104 * Cleanup the connector if we know it was initialized.
122105 *
drivers/gpu/drm/ci/xfails/requirements.txt+3−3
@@ -5,7 +5,7 @@ termcolor==2.3.0 · 4 unmodified lines
55 certifi==2023.7.22
66 charset-normalizer==3.2.0
77 idna==3.4
8−pip==23.2.1
8+pip==23.3
99 python-gitlab==3.15.0
1010 requests==2.31.0
1111 requests-toolbelt==1.0.0
@@ -13,5 +13,5 @@ ruamel.yaml==0.17.32 · 1 unmodified line
1313 ruamel.yaml.clib==0.2.7
1414 setuptools==68.0.0
1515 tenacity==8.2.3
16−urllib3==2.0.4
17−wheel==0.41.1
16+urllib3==2.0.7
17+wheel==0.41.1
drivers/gpu/drm/drm_atomic_helper.c+52−26
@@ -2012,7 +2012,7 @@ int drm_atomic_helper_commit(struct drm_device *dev, · 2011 unmodified lines
20122012 return ret;
20132013
20142014 drm_atomic_helper_async_commit(dev, state);
2015− drm_atomic_helper_cleanup_planes(dev, state);
2015+ drm_atomic_helper_unprepare_planes(dev, state);
20162016
20172017 return 0;
20182018 }
@@ -2072,7 +2072,7 @@ int drm_atomic_helper_commit(struct drm_device *dev, · 53 unmodified lines
20722072 return 0;
20732073
20742074 err:
2075− drm_atomic_helper_cleanup_planes(dev, state);
2075+ drm_atomic_helper_unprepare_planes(dev, state);
20762076 return ret;
20772077 }
20782078 EXPORT_SYMBOL(drm_atomic_helper_commit);
@@ -2650,6 +2650,39 @@ fail_prepare_fb: · 571 unmodified lines
26502650 }
26512651 EXPORT_SYMBOL(drm_atomic_helper_prepare_planes);
26522652
2653+/**
2654+ * drm_atomic_helper_unprepare_planes - release plane resources on aborts
2655+ * @dev: DRM device
2656+ * @state: atomic state object with old state structures
2657+ *
2658+ * This function cleans up plane state, specifically framebuffers, from the
2659+ * atomic state. It undoes the effects of drm_atomic_helper_prepare_planes()
2660+ * when aborting an atomic commit. For cleaning up after a successful commit
2661+ * use drm_atomic_helper_cleanup_planes().
2662+ */
2663+void drm_atomic_helper_unprepare_planes(struct drm_device *dev,
2664+ struct drm_atomic_state *state)
2665+{
2666+ struct drm_plane *plane;
2667+ struct drm_plane_state *new_plane_state;
2668+ int i;
2669+
2670+ for_each_new_plane_in_state(state, plane, new_plane_state, i) {
2671+ const struct drm_plane_helper_funcs *funcs = plane->helper_private;
2672+
2673+ if (funcs->end_fb_access)
2674+ funcs->end_fb_access(plane, new_plane_state);
2675+ }
2676+
2677+ for_each_new_plane_in_state(state, plane, new_plane_state, i) {
2678+ const struct drm_plane_helper_funcs *funcs = plane->helper_private;
2679+
2680+ if (funcs->cleanup_fb)
2681+ funcs->cleanup_fb(plane, new_plane_state);
2682+ }
2683+}
2684+EXPORT_SYMBOL(drm_atomic_helper_unprepare_planes);
2685+
26532686 static bool plane_crtc_active(const struct drm_plane_state *state)
26542687 {
26552688 return state->crtc && state->crtc->state->active;
@@ -2784,6 +2817,17 @@ void drm_atomic_helper_commit_planes(struct drm_device *dev, · 128 unmodified lines
27842817
27852818 funcs->atomic_flush(crtc, old_state);
27862819 }
2820+
2821+ /*
2822+ * Signal end of framebuffer access here before hw_done. After hw_done,
2823+ * a later commit might have already released the plane state.
2824+ */
2825+ for_each_old_plane_in_state(old_state, plane, old_plane_state, i) {
2826+ const struct drm_plane_helper_funcs *funcs = plane->helper_private;
2827+
2828+ if (funcs->end_fb_access)
2829+ funcs->end_fb_access(plane, old_plane_state);
2830+ }
27872831 }
27882832 EXPORT_SYMBOL(drm_atomic_helper_commit_planes);
27892833
@@ -2911,40 +2955,22 @@ EXPORT_SYMBOL(drm_atomic_helper_disable_planes_on_crtc); · 121 unmodified lines
29112955 * configuration. Hence the old configuration must be perserved in @old_state to
29122956 * be able to call this function.
29132957 *
2914− * This function must also be called on the new state when the atomic update
2915− * fails at any point after calling drm_atomic_helper_prepare_planes().
2958+ * This function may not be called on the new state when the atomic update
2959+ * fails at any point after calling drm_atomic_helper_prepare_planes(). Use
2960+ * drm_atomic_helper_unprepare_planes() in this case.
29162961 */
29172962 void drm_atomic_helper_cleanup_planes(struct drm_device *dev,
29182963 struct drm_atomic_state *old_state)
29192964 {
29202965 struct drm_plane *plane;
2921− struct drm_plane_state *old_plane_state, *new_plane_state;
2966+ struct drm_plane_state *old_plane_state;
29222967 int i;
29232968
2924− for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, new_plane_state, i) {
2969+ for_each_old_plane_in_state(old_state, plane, old_plane_state, i) {
29252970 const struct drm_plane_helper_funcs *funcs = plane->helper_private;
29262971
2927− if (funcs->end_fb_access)
2928− funcs->end_fb_access(plane, new_plane_state);
2929− }
2930−
2931− for_each_oldnew_plane_in_state(old_state, plane, old_plane_state, new_plane_state, i) {
2932− const struct drm_plane_helper_funcs *funcs;
2933− struct drm_plane_state *plane_state;
2934−
2935− /*
2936− * This might be called before swapping when commit is aborted,
2937− * in which case we have to cleanup the new state.
2938− */
2939− if (old_plane_state == plane->state)
2940− plane_state = new_plane_state;
2941− else
2942− plane_state = old_plane_state;
2943−
2944− funcs = plane->helper_private;
2945−
29462972 if (funcs->cleanup_fb)
2947− funcs->cleanup_fb(plane, plane_state);
2973+ funcs->cleanup_fb(plane, old_plane_state);
29482974 }
29492975 }
29502976 EXPORT_SYMBOL(drm_atomic_helper_cleanup_planes);
drivers/gpu/drm/drm_gpuvm.c+1−1
@@ -1,4 +1,4 @@
1−// SPDX-License-Identifier: GPL-2.0 OR MIT
1+// SPDX-License-Identifier: GPL-2.0-only OR MIT
22 /*
33 * Copyright (c) 2022 Red Hat.
44 *
drivers/gpu/drm/drm_panel_orientation_quirks.c+6−0
@@ -336,6 +336,12 @@ static const struct dmi_system_id orientation_data[] = { · 335 unmodified lines
336336 DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "IdeaPad Duet 3 10IGL5"),
337337 },
338338 .driver_data = (void *)&lcd1200x1920_rightside_up,
339+ }, { /* Lenovo Legion Go 8APU1 */
340+ .matches = {
341+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
342+ DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Legion Go 8APU1"),
343+ },
344+ .driver_data = (void *)&lcd1600x2560_leftside_up,
339345 }, { /* Lenovo Yoga Book X90F / X90L */
340346 .matches = {
341347 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
drivers/gpu/drm/drm_prime.c+18−15
@@ -278,7 +278,7 @@ void drm_gem_dmabuf_release(struct dma_buf *dma_buf) · 277 unmodified lines
278278 }
279279 EXPORT_SYMBOL(drm_gem_dmabuf_release);
280280
281−/*
281+/**
282282 * drm_gem_prime_fd_to_handle - PRIME import function for GEM drivers
283283 * @dev: drm_device to import into
284284 * @file_priv: drm file-private structure
@@ -292,9 +292,9 @@ EXPORT_SYMBOL(drm_gem_dmabuf_release); · 7 unmodified lines
292292 *
293293 * Returns 0 on success or a negative error code on failure.
294294 */
295−static int drm_gem_prime_fd_to_handle(struct drm_device *dev,
296− struct drm_file *file_priv, int prime_fd,
297− uint32_t *handle)
295+int drm_gem_prime_fd_to_handle(struct drm_device *dev,
296+ struct drm_file *file_priv, int prime_fd,
297+ uint32_t *handle)
298298 {
299299 struct dma_buf *dma_buf;
300300 struct drm_gem_object *obj;
@@ -360,6 +360,7 @@ out_put: · 59 unmodified lines
360360 dma_buf_put(dma_buf);
361361 return ret;
362362 }
363+EXPORT_SYMBOL(drm_gem_prime_fd_to_handle);
363364
364365 int drm_prime_fd_to_handle_ioctl(struct drm_device *dev, void *data,
365366 struct drm_file *file_priv)
@@ -408,7 +409,7 @@ static struct dma_buf *export_and_register_object(struct drm_device *dev, · 42 unmodified lines
408409 return dmabuf;
409410 }
410411
411−/*
412+/**
412413 * drm_gem_prime_handle_to_fd - PRIME export function for GEM drivers
413414 * @dev: dev to export the buffer from
414415 * @file_priv: drm file-private structure
@@ -421,10 +422,10 @@ static struct dma_buf *export_and_register_object(struct drm_device *dev, · 6 unmodified lines
421422 * The actual exporting from GEM object to a dma-buf is done through the
422423 * &drm_gem_object_funcs.export callback.
423424 */
424−static int drm_gem_prime_handle_to_fd(struct drm_device *dev,
425− struct drm_file *file_priv, uint32_t handle,
426− uint32_t flags,
427− int *prime_fd)
425+int drm_gem_prime_handle_to_fd(struct drm_device *dev,
426+ struct drm_file *file_priv, uint32_t handle,
427+ uint32_t flags,
428+ int *prime_fd)
428429 {
429430 struct drm_gem_object *obj;
430431 int ret = 0;
@@ -506,6 +507,7 @@ out_unlock: · 75 unmodified lines
506507
507508 return ret;
508509 }
510+EXPORT_SYMBOL(drm_gem_prime_handle_to_fd);
509511
510512 int drm_prime_handle_to_fd_ioctl(struct drm_device *dev, void *data,
511513 struct drm_file *file_priv)
@@ -864,9 +866,9 @@ EXPORT_SYMBOL(drm_prime_get_contiguous_size); · 352 unmodified lines
864866 * @obj: GEM object to export
865867 * @flags: flags like DRM_CLOEXEC and DRM_RDWR
866868 *
867− * This is the implementation of the &drm_gem_object_funcs.export functions
868− * for GEM drivers using the PRIME helpers. It is used as the default for
869− * drivers that do not set their own.
869+ * This is the implementation of the &drm_gem_object_funcs.export functions for GEM drivers
870+ * using the PRIME helpers. It is used as the default in
871+ * drm_gem_prime_handle_to_fd().
870872 */
871873 struct dma_buf *drm_gem_prime_export(struct drm_gem_object *obj,
872874 int flags)
@@ -962,9 +964,10 @@ EXPORT_SYMBOL(drm_gem_prime_import_dev); · 89 unmodified lines
962964 * @dev: drm_device to import into
963965 * @dma_buf: dma-buf object to import
964966 *
965− * This is the implementation of the gem_prime_import functions for GEM
966− * drivers using the PRIME helpers. It is the default for drivers that do
967− * not set their own &drm_driver.gem_prime_import.
967+ * This is the implementation of the gem_prime_import functions for GEM drivers
968+ * using the PRIME helpers. Drivers can use this as their
969+ * &drm_driver.gem_prime_import implementation. It is used as the default
970+ * implementation in drm_gem_prime_fd_to_handle().
968971 *
969972 * Drivers must arrange to call drm_prime_gem_destroy() from their
970973 * &drm_gem_object_funcs.free hook when using this function.
drivers/gpu/drm/exynos/exynos_drm_dma.c+3−5
@@ -107,18 +107,16 @@ int exynos_drm_register_dma(struct drm_device *drm, struct device *dev, · 106 unmodified lines
107107 return 0;
108108
109109 if (!priv->mapping) {
110− void *mapping;
110+ void *mapping = NULL;
111111
112112 if (IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU))
113113 mapping = arm_iommu_create_mapping(&platform_bus_type,
114114 EXYNOS_DEV_ADDR_START, EXYNOS_DEV_ADDR_SIZE);
115115 else if (IS_ENABLED(CONFIG_IOMMU_DMA))
116116 mapping = iommu_get_domain_for_dev(priv->dma_dev);
117− else
118− mapping = ERR_PTR(-ENODEV);
119117
120− if (IS_ERR(mapping))
121− return PTR_ERR(mapping);
118+ if (!mapping)
119+ return -ENODEV;
122120 priv->mapping = mapping;
123121 }
124122
drivers/gpu/drm/exynos/exynos_hdmi.c+2−0
@@ -1861,6 +1861,8 @@ static int hdmi_bind(struct device *dev, struct device *master, void *data) · 1860 unmodified lines
18611861 return ret;
18621862
18631863 crtc = exynos_drm_crtc_get_by_type(drm_dev, EXYNOS_DISPLAY_TYPE_HDMI);
1864+ if (IS_ERR(crtc))
1865+ return PTR_ERR(crtc);
18641866 crtc->pipe_clk = &hdata->phy_clk;
18651867
18661868 ret = hdmi_create_connector(encoder);
drivers/gpu/drm/i915/display/icl_dsi.c+7−0
@@ -1440,6 +1440,13 @@ static void gen11_dsi_post_disable(struct intel_atomic_state *state, · 1439 unmodified lines
14401440 static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
14411441 struct drm_display_mode *mode)
14421442 {
1443+ struct drm_i915_private *i915 = to_i915(connector->dev);
1444+ enum drm_mode_status status;
1445+
1446+ status = intel_cpu_transcoder_mode_valid(i915, mode);
1447+ if (status != MODE_OK)
1448+ return status;
1449+
14431450 /* FIXME: DSC? */
14441451 return intel_dsi_mode_valid(connector, mode);
14451452 }
drivers/gpu/drm/i915/display/intel_crt.c+5−0
@@ -348,8 +348,13 @@ intel_crt_mode_valid(struct drm_connector *connector, · 347 unmodified lines
348348 struct drm_device *dev = connector->dev;
349349 struct drm_i915_private *dev_priv = to_i915(dev);
350350 int max_dotclk = dev_priv->max_dotclk_freq;
351+ enum drm_mode_status status;
351352 int max_clock;
352353
354+ status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
355+ if (status != MODE_OK)
356+ return status;
357+
353358 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
354359 return MODE_NO_DBLESCAN;
355360
drivers/gpu/drm/i915/display/intel_display.c+25−2
@@ -906,12 +906,18 @@ static bool needs_async_flip_vtd_wa(const struct intel_crtc_state *crtc_state) · 905 unmodified lines
906906 static bool planes_enabling(const struct intel_crtc_state *old_crtc_state,
907907 const struct intel_crtc_state *new_crtc_state)
908908 {
909+ if (!new_crtc_state->hw.active)
910+ return false;
911+
909912 return is_enabling(active_planes, old_crtc_state, new_crtc_state);
910913 }
911914
912915 static bool planes_disabling(const struct intel_crtc_state *old_crtc_state,
913916 const struct intel_crtc_state *new_crtc_state)
914917 {
918+ if (!old_crtc_state->hw.active)
919+ return false;
920+
915921 return is_disabling(active_planes, old_crtc_state, new_crtc_state);
916922 }
917923
@@ -928,6 +934,9 @@ static bool vrr_params_changed(const struct intel_crtc_state *old_crtc_state, · 10 unmodified lines
928934 static bool vrr_enabling(const struct intel_crtc_state *old_crtc_state,
929935 const struct intel_crtc_state *new_crtc_state)
930936 {
937+ if (!new_crtc_state->hw.active)
938+ return false;
939+
931940 return is_enabling(vrr.enable, old_crtc_state, new_crtc_state) ||
932941 (new_crtc_state->vrr.enable &&
933942 (new_crtc_state->update_m_n || new_crtc_state->update_lrr ||
@@ -937,6 +946,9 @@ static bool vrr_enabling(const struct intel_crtc_state *old_crtc_state, · 3 unmodified lines
937946 static bool vrr_disabling(const struct intel_crtc_state *old_crtc_state,
938947 const struct intel_crtc_state *new_crtc_state)
939948 {
949+ if (!old_crtc_state->hw.active)
950+ return false;
951+
940952 return is_disabling(vrr.enable, old_crtc_state, new_crtc_state) ||
941953 (old_crtc_state->vrr.enable &&
942954 (new_crtc_state->update_m_n || new_crtc_state->update_lrr ||
@@ -6853,10 +6865,11 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state) · 5910 unmodified lines
68536865 if (!intel_crtc_needs_modeset(new_crtc_state))
68546866 continue;
68556867
6868+ intel_pre_plane_update(state, crtc);
6869+
68566870 if (!old_crtc_state->hw.active)
68576871 continue;
68586872
6859− intel_pre_plane_update(state, crtc);
68606873 intel_crtc_disable_planes(state, crtc);
68616874 }
68626875
@@ -7475,7 +7488,7 @@ int intel_atomic_commit(struct drm_device *dev, struct drm_atomic_state *_state, · 612 unmodified lines
74757488 for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
74767489 intel_color_cleanup_commit(new_crtc_state);
74777490
7478− drm_atomic_helper_cleanup_planes(dev, &state->base);
7491+ drm_atomic_helper_unprepare_planes(dev, &state->base);
74797492 intel_runtime_pm_put(&dev_priv->runtime_pm, state->wakeref);
74807493 return ret;
74817494 }
@@ -7856,6 +7869,16 @@ enum drm_mode_status intel_mode_valid(struct drm_device *dev, · 374 unmodified lines
78567869 mode->vtotal > vtotal_max)
78577870 return MODE_V_ILLEGAL;
78587871
7872+ return MODE_OK;
7873+}
7874+
7875+enum drm_mode_status intel_cpu_transcoder_mode_valid(struct drm_i915_private *dev_priv,
7876+ const struct drm_display_mode *mode)
7877+{
7878+ /*
7879+ * Additional transcoder timing limits,
7880+ * excluding BXT/GLK DSI transcoders.
7881+ */
78597882 if (DISPLAY_VER(dev_priv) >= 5) {
78607883 if (mode->hdisplay < 64 ||
78617884 mode->htotal - mode->hdisplay < 32)
drivers/gpu/drm/i915/display/intel_display.h+3−0
@@ -403,6 +403,9 @@ enum drm_mode_status · 402 unmodified lines
403403 intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
404404 const struct drm_display_mode *mode,
405405 bool bigjoiner);
406+enum drm_mode_status
407+intel_cpu_transcoder_mode_valid(struct drm_i915_private *i915,
408+ const struct drm_display_mode *mode);
406409 enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
407410 bool is_trans_port_sync_mode(const struct intel_crtc_state *state);
408411 bool is_trans_port_sync_master(const struct intel_crtc_state *state);
drivers/gpu/drm/i915/display/intel_dp.c+26−6
@@ -1172,6 +1172,10 @@ intel_dp_mode_valid(struct drm_connector *_connector, · 1171 unmodified lines
11721172 enum drm_mode_status status;
11731173 bool dsc = false, bigjoiner = false;
11741174
1175+ status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
1176+ if (status != MODE_OK)
1177+ return status;
1178+
11751179 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
11761180 return MODE_H_ILLEGAL;
11771181
@@ -6037,8 +6041,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, · 4859 unmodified lines
60376041 * (eg. Acer Chromebook C710), so we'll check it only if multiple
60386042 * ports are attempting to use the same AUX CH, according to VBT.
60396043 */
6040− if (intel_bios_dp_has_shared_aux_ch(encoder->devdata) &&
6041− !intel_digital_port_connected(encoder)) {
6044+ if (intel_bios_dp_has_shared_aux_ch(encoder->devdata)) {
60426045 /*
60436046 * If this fails, presume the DPCD answer came
60446047 * from some other port using the same AUX CH.
@@ -6046,10 +6049,27 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, · 1 unmodified line
60466049 * FIXME maybe cleaner to check this before the
60476050 * DPCD read? Would need sort out the VDD handling...
60486051 */
6049− drm_info(&dev_priv->drm,
6050− "[ENCODER:%d:%s] HPD is down, disabling eDP\n",
6051− encoder->base.base.id, encoder->base.name);
6052− goto out_vdd_off;
6052+ if (!intel_digital_port_connected(encoder)) {
6053+ drm_info(&dev_priv->drm,
6054+ "[ENCODER:%d:%s] HPD is down, disabling eDP\n",
6055+ encoder->base.base.id, encoder->base.name);
6056+ goto out_vdd_off;
6057+ }
6058+
6059+ /*
6060+ * Unfortunately even the HPD based detection fails on
6061+ * eg. Asus B360M-A (CFL+CNP), so as a last resort fall
6062+ * back to checking for a VGA branch device. Only do this
6063+ * on known affected platforms to minimize false positives.
6064+ */
6065+ if (DISPLAY_VER(dev_priv) == 9 && drm_dp_is_branch(intel_dp->dpcd) &&
6066+ (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_TYPE_MASK) ==
6067+ DP_DWN_STRM_PORT_TYPE_ANALOG) {
6068+ drm_info(&dev_priv->drm,
6069+ "[ENCODER:%d:%s] VGA converter detected, disabling eDP\n",
6070+ encoder->base.base.id, encoder->base.name);
6071+ goto out_vdd_off;
6072+ }
60536073 }
60546074
60556075 mutex_lock(&dev_priv->drm.mode_config.mutex);
drivers/gpu/drm/i915/display/intel_dp_mst.c+24−12
@@ -959,6 +959,10 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, · 958 unmodified lines
959959 return 0;
960960 }
961961
962+ *status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
963+ if (*status != MODE_OK)
964+ return 0;
965+
962966 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
963967 *status = MODE_NO_DBLESCAN;
964968 return 0;
@@ -993,6 +997,10 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, · 28 unmodified lines
993997 if (intel_dp_need_bigjoiner(intel_dp, mode->hdisplay, target_clock)) {
994998 bigjoiner = true;
995999 max_dotclk *= 2;
1000+
1001+ /* TODO: add support for bigjoiner */
1002+ *status = MODE_CLOCK_HIGH;
1003+ return 0;
9961004 }
9971005
9981006 if (DISPLAY_VER(dev_priv) >= 10 &&
@@ -1027,11 +1035,15 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, · 28 unmodified lines
10271035 * Big joiner configuration needs DSC for TGL which is not true for
10281036 * XE_LPD where uncompressed joiner is supported.
10291037 */
1030− if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc)
1031− return MODE_CLOCK_HIGH;
1038+ if (DISPLAY_VER(dev_priv) < 13 && bigjoiner && !dsc) {
1039+ *status = MODE_CLOCK_HIGH;
1040+ return 0;
1041+ }
10321042
1033− if (mode_rate > max_rate && !dsc)
1034− return MODE_CLOCK_HIGH;
1043+ if (mode_rate > max_rate && !dsc) {
1044+ *status = MODE_CLOCK_HIGH;
1045+ return 0;
1046+ }
10351047
10361048 *status = intel_mode_valid_max_plane_size(dev_priv, mode, false);
10371049 return 0;
@@ -1161,6 +1173,14 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo · 123 unmodified lines
11611173 intel_connector->port = port;
11621174 drm_dp_mst_get_port_malloc(port);
11631175
1176+ /*
1177+ * TODO: set the AUX for the actual MST port decompressing the stream.
1178+ * At the moment the driver only supports enabling this globally in the
1179+ * first downstream MST branch, via intel_dp's (root port) AUX.
1180+ */
1181+ intel_connector->dp.dsc_decompression_aux = &intel_dp->aux;
1182+ intel_dp_mst_read_decompression_port_dsc_caps(intel_dp, intel_connector);
1183+
11641184 connector = &intel_connector->base;
11651185 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
11661186 DRM_MODE_CONNECTOR_DisplayPort);
@@ -1172,14 +1192,6 @@ static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topolo · 5 unmodified lines
11721192
11731193 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
11741194
1175− /*
1176− * TODO: set the AUX for the actual MST port decompressing the stream.
1177− * At the moment the driver only supports enabling this globally in the
1178− * first downstream MST branch, via intel_dp's (root port) AUX.
1179− */
1180− intel_connector->dp.dsc_decompression_aux = &intel_dp->aux;
1181− intel_dp_mst_read_decompression_port_dsc_caps(intel_dp, intel_connector);
1182−
11831195 for_each_pipe(dev_priv, pipe) {
11841196 struct drm_encoder *enc =
11851197 &intel_dp->mst_encoders[pipe]->base.base;
drivers/gpu/drm/i915/display/intel_dsb.c+1−1
@@ -340,7 +340,7 @@ static int intel_dsb_dewake_scanline(const struct intel_crtc_state *crtc_state) · 339 unmodified lines
340340 }
341341
342342 static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
343− unsigned int dewake_scanline)
343+ int dewake_scanline)
344344 {
345345 struct intel_crtc *crtc = dsb->crtc;
346346 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
drivers/gpu/drm/i915/display/intel_dvo.c+6−0
@@ -217,11 +217,17 @@ intel_dvo_mode_valid(struct drm_connector *_connector, · 216 unmodified lines
217217 struct drm_display_mode *mode)
218218 {
219219 struct intel_connector *connector = to_intel_connector(_connector);
220+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
220221 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
221222 const struct drm_display_mode *fixed_mode =
222223 intel_panel_fixed_mode(connector, mode);
223224 int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq;
224225 int target_clock = mode->clock;
226+ enum drm_mode_status status;
227+
228+ status = intel_cpu_transcoder_mode_valid(i915, mode);
229+ if (status != MODE_OK)
230+ return status;
225231
226232 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
227233 return MODE_NO_DBLESCAN;
drivers/gpu/drm/i915/display/intel_hdmi.c+4−0
@@ -1983,6 +1983,10 @@ intel_hdmi_mode_valid(struct drm_connector *connector, · 1982 unmodified lines
19831983 bool ycbcr_420_only;
19841984 enum intel_output_format sink_format;
19851985
1986+ status = intel_cpu_transcoder_mode_valid(dev_priv, mode);
1987+ if (status != MODE_OK)
1988+ return status;
1989+
19861990 if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
19871991 clock *= 2;
19881992
drivers/gpu/drm/i915/display/intel_lvds.c+5−0
@@ -389,11 +389,16 @@ intel_lvds_mode_valid(struct drm_connector *_connector, · 388 unmodified lines
389389 struct drm_display_mode *mode)
390390 {
391391 struct intel_connector *connector = to_intel_connector(_connector);
392+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
392393 const struct drm_display_mode *fixed_mode =
393394 intel_panel_fixed_mode(connector, mode);
394395 int max_pixclk = to_i915(connector->base.dev)->max_dotclk_freq;
395396 enum drm_mode_status status;
396397
398+ status = intel_cpu_transcoder_mode_valid(i915, mode);
399+ if (status != MODE_OK)
400+ return status;
401+
397402 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
398403 return MODE_NO_DBLESCAN;
399404
drivers/gpu/drm/i915/display/intel_sdvo.c+7−1
@@ -1921,13 +1921,19 @@ static enum drm_mode_status · 1920 unmodified lines
19211921 intel_sdvo_mode_valid(struct drm_connector *connector,
19221922 struct drm_display_mode *mode)
19231923 {
1924+ struct drm_i915_private *i915 = to_i915(connector->dev);
19241925 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
19251926 struct intel_sdvo_connector *intel_sdvo_connector =
19261927 to_intel_sdvo_connector(connector);
1927− int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
19281928 bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
1929+ int max_dotclk = i915->max_dotclk_freq;
1930+ enum drm_mode_status status;
19291931 int clock = mode->clock;
19301932
1933+ status = intel_cpu_transcoder_mode_valid(i915, mode);
1934+ if (status != MODE_OK)
1935+ return status;
1936+
19311937 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
19321938 return MODE_NO_DBLESCAN;
19331939
drivers/gpu/drm/i915/display/intel_tv.c+7−1
@@ -958,8 +958,14 @@ static enum drm_mode_status · 957 unmodified lines
958958 intel_tv_mode_valid(struct drm_connector *connector,
959959 struct drm_display_mode *mode)
960960 {
961+ struct drm_i915_private *i915 = to_i915(connector->dev);
961962 const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
962− int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
963+ int max_dotclk = i915->max_dotclk_freq;
964+ enum drm_mode_status status;
965+
966+ status = intel_cpu_transcoder_mode_valid(i915, mode);
967+ if (status != MODE_OK)
968+ return status;
963969
964970 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
965971 return MODE_NO_DBLESCAN;
drivers/gpu/drm/i915/display/vlv_dsi.c+17−1
@@ -1541,9 +1541,25 @@ static const struct drm_encoder_funcs intel_dsi_funcs = { · 1540 unmodified lines
15411541 .destroy = intel_dsi_encoder_destroy,
15421542 };
15431543
1544+static enum drm_mode_status vlv_dsi_mode_valid(struct drm_connector *connector,
1545+ struct drm_display_mode *mode)
1546+{
1547+ struct drm_i915_private *i915 = to_i915(connector->dev);
1548+
1549+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) {
1550+ enum drm_mode_status status;
1551+
1552+ status = intel_cpu_transcoder_mode_valid(i915, mode);
1553+ if (status != MODE_OK)
1554+ return status;
1555+ }
1556+
1557+ return intel_dsi_mode_valid(connector, mode);
1558+}
1559+
15441560 static const struct drm_connector_helper_funcs intel_dsi_connector_helper_funcs = {
15451561 .get_modes = intel_dsi_get_modes,
1546− .mode_valid = intel_dsi_mode_valid,
1562+ .mode_valid = vlv_dsi_mode_valid,
15471563 .atomic_check = intel_digital_connector_atomic_check,
15481564 };
15491565
drivers/gpu/drm/i915/gt/intel_engine_user.c+22−17
@@ -41,12 +41,15 @@ void intel_engine_add_user(struct intel_engine_cs *engine) · 40 unmodified lines
4141 llist_add(&engine->uabi_llist, &engine->i915->uabi_engines_llist);
4242 }
4343
44−static const u8 uabi_classes[] = {
44+#define I915_NO_UABI_CLASS ((u16)(-1))
45+
46+static const u16 uabi_classes[] = {
4547 [RENDER_CLASS] = I915_ENGINE_CLASS_RENDER,
4648 [COPY_ENGINE_CLASS] = I915_ENGINE_CLASS_COPY,
4749 [VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
4850 [VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
4951 [COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
52+ [OTHER_CLASS] = I915_NO_UABI_CLASS, /* Not exposed to users, no uabi class. */
5053 };
5154
5255 static int engine_cmp(void *priv, const struct list_head *A,
@@ -200,6 +203,7 @@ static void engine_rename(struct intel_engine_cs *engine, const char *name, u16 · 147 unmodified lines
200203
201204 void intel_engines_driver_register(struct drm_i915_private *i915)
202205 {
206+ u16 name_instance, other_instance = 0;
203207 struct legacy_ring ring = {};
204208 struct list_head *it, *next;
205209 struct rb_node **p, *prev;
@@ -216,27 +220,28 @@ void intel_engines_driver_register(struct drm_i915_private *i915) · 10 unmodified lines
216220 if (intel_gt_has_unrecoverable_error(engine->gt))
217221 continue; /* ignore incomplete engines */
218222
219− /*
220− * We don't want to expose the GSC engine to the users, but we
221− * still rename it so it is easier to identify in the debug logs
222− */
223− if (engine->id == GSC0) {
224− engine_rename(engine, "gsc", 0);
225− continue;
226− }
227−
228223 GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));
229224 engine->uabi_class = uabi_classes[engine->class];
225+ if (engine->uabi_class == I915_NO_UABI_CLASS) {
226+ name_instance = other_instance++;
227+ } else {
228+ GEM_BUG_ON(engine->uabi_class >=
229+ ARRAY_SIZE(i915->engine_uabi_class_count));
230+ name_instance =
231+ i915->engine_uabi_class_count[engine->uabi_class]++;
232+ }
233+ engine->uabi_instance = name_instance;
230234
231− GEM_BUG_ON(engine->uabi_class >=
232− ARRAY_SIZE(i915->engine_uabi_class_count));
233− engine->uabi_instance =
234− i915->engine_uabi_class_count[engine->uabi_class]++;
235−
236− /* Replace the internal name with the final user facing name */
235+ /*
236+ * Replace the internal name with the final user and log facing
237+ * name.
238+ */
237239 engine_rename(engine,
238240 intel_engine_class_repr(engine->class),
239− engine->uabi_instance);
241+ name_instance);
242+
243+ if (engine->uabi_class == I915_NO_UABI_CLASS)
244+ continue;
240245
241246 rb_link_node(&engine->uabi_node, prev, p);
242247 rb_insert_color(&engine->uabi_node, &i915->uabi_engines);
drivers/gpu/drm/i915/gt/intel_gt.c+0−11
@@ -982,8 +982,6 @@ int intel_gt_probe_all(struct drm_i915_private *i915) · 981 unmodified lines
982982
983983 err:
984984 i915_probe_error(i915, "Failed to initialize %s! (%d)\n", gtdef->name, ret);
985− intel_gt_release_all(i915);
986−
987985 return ret;
988986 }
989987
@@ -1002,15 +1000,6 @@ int intel_gt_tiles_init(struct drm_i915_private *i915) · 12 unmodified lines
10021000 return 0;
10031001 }
10041002
1005−void intel_gt_release_all(struct drm_i915_private *i915)
1006−{
1007− struct intel_gt *gt;
1008− unsigned int id;
1009−
1010− for_each_gt(gt, i915, id)
1011− i915->gt[id] = NULL;
1012−}
1013−
10141003 void intel_gt_info_print(const struct intel_gt_info *info,
10151004 struct drm_printer *p)
10161005 {
drivers/gpu/drm/i915/i915_driver.c+1−3
@@ -782,7 +782,7 @@ int i915_driver_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 781 unmodified lines
782782
783783 ret = i915_driver_mmio_probe(i915);
784784 if (ret < 0)
785− goto out_tiles_cleanup;
785+ goto out_runtime_pm_put;
786786
787787 ret = i915_driver_hw_probe(i915);
788788 if (ret < 0)
@@ -842,8 +842,6 @@ out_cleanup_hw: · 53 unmodified lines
842842 i915_ggtt_driver_late_release(i915);
843843 out_cleanup_mmio:
844844 i915_driver_mmio_release(i915);
845−out_tiles_cleanup:
846− intel_gt_release_all(i915);
847845 out_runtime_pm_put:
848846 enable_rpm_wakeref_asserts(&i915->runtime_pm);
849847 i915_driver_late_release(i915);
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h+1−0
@@ -406,6 +406,7 @@ static const struct dpu_perf_cfg sc8280xp_perf_data = { · 405 unmodified lines
406406 .min_llcc_ib = 0,
407407 .min_dram_ib = 800000,
408408 .danger_lut_tbl = {0xf, 0xffff, 0x0},
409+ .safe_lut_tbl = {0xfe00, 0xfe00, 0xffff},
409410 .qos_lut_tbl = {
410411 {.nentry = ARRAY_SIZE(sc8180x_qos_linear),
411412 .entries = sc8180x_qos_linear
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c+1−2
@@ -844,8 +844,7 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev) · 843 unmodified lines
844844
845845 return 0;
846846 fail:
847− if (mdp5_kms)
848− mdp5_destroy(mdp5_kms);
847+ mdp5_destroy(mdp5_kms);
849848 return ret;
850849 }
851850
drivers/gpu/drm/msm/dp/dp_display.c+10−5
@@ -365,9 +365,11 @@ static int dp_display_send_hpd_notification(struct dp_display_private *dp, · 364 unmodified lines
365365 /* reset video pattern flag on disconnect */
366366 if (!hpd) {
367367 dp->panel->video_test = false;
368− drm_dp_set_subconnector_property(dp->dp_display.connector,
369− connector_status_disconnected,
370− dp->panel->dpcd, dp->panel->downstream_ports);
368+ if (!dp->dp_display.is_edp)
369+ drm_dp_set_subconnector_property(dp->dp_display.connector,
370+ connector_status_disconnected,
371+ dp->panel->dpcd,
372+ dp->panel->downstream_ports);
371373 }
372374
373375 dp->dp_display.is_connected = hpd;
@@ -396,8 +398,11 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp) · 22 unmodified lines
396398
397399 dp_link_process_request(dp->link);
398400
399− drm_dp_set_subconnector_property(dp->dp_display.connector, connector_status_connected,
400− dp->panel->dpcd, dp->panel->downstream_ports);
401+ if (!dp->dp_display.is_edp)
402+ drm_dp_set_subconnector_property(dp->dp_display.connector,
403+ connector_status_connected,
404+ dp->panel->dpcd,
405+ dp->panel->downstream_ports);
401406
402407 edid = dp->panel->edid;
403408
drivers/gpu/drm/msm/dp/dp_drm.c+3−0
@@ -345,6 +345,9 @@ struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display, struct dr · 344 unmodified lines
345345 if (IS_ERR(connector))
346346 return connector;
347347
348+ if (!dp_display->is_edp)
349+ drm_connector_attach_dp_subconnector_property(connector);
350+
348351 drm_connector_attach_encoder(connector, encoder);
349352
350353 return connector;
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c+1−1
@@ -918,7 +918,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy *phy, · 917 unmodified lines
918918 if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2)) {
919919 if (phy->cphy_mode) {
920920 vreg_ctrl_0 = 0x45;
921− vreg_ctrl_1 = 0x45;
921+ vreg_ctrl_1 = 0x41;
922922 glbl_rescode_top_ctrl = 0x00;
923923 glbl_rescode_bot_ctrl = 0x00;
924924 } else {
drivers/gpu/drm/msm/msm_drv.c+0−2
@@ -288,8 +288,6 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) · 287 unmodified lines
288288 if (ret)
289289 goto err_msm_uninit;
290290
291− drm_kms_helper_poll_init(ddev);
292−
293291 if (priv->kms_init) {
294292 drm_kms_helper_poll_init(ddev);
295293 msm_fbdev_setup(ddev);
drivers/gpu/drm/nouveau/dispnv50/disp.c+1−1
@@ -2474,7 +2474,7 @@ nv50_disp_atomic_commit(struct drm_device *dev, · 2473 unmodified lines
24742474
24752475 err_cleanup:
24762476 if (ret)
2477− drm_atomic_helper_cleanup_planes(dev, state);
2477+ drm_atomic_helper_unprepare_planes(dev, state);
24782478 done:
24792479 pm_runtime_put_autosuspend(dev->dev);
24802480 return ret;
drivers/gpu/drm/nouveau/include/nvkm/core/event.h+2−2
@@ -14,7 +14,7 @@ struct nvkm_event { · 13 unmodified lines
1414 int index_nr;
1515
1616 spinlock_t refs_lock;
17− spinlock_t list_lock;
17+ rwlock_t list_lock;
1818 int *refs;
1919
2020 struct list_head ntfy;
@@ -38,7 +38,7 @@ nvkm_event_init(const struct nvkm_event_func *func, struct nvkm_subdev *subdev, · 17 unmodified lines
3838 int types_nr, int index_nr, struct nvkm_event *event)
3939 {
4040 spin_lock_init(&event->refs_lock);
41− spin_lock_init(&event->list_lock);
41+ rwlock_init(&event->list_lock);
4242 return __nvkm_event_init(func, subdev, types_nr, index_nr, event);
4343 }
4444
drivers/gpu/drm/nouveau/include/nvrm/535.113.01/common/shared/msgq/inc/msgq/msgq_priv.h+51−0
@@ -26,6 +26,49 @@ · 25 unmodified lines
2626 * DEALINGS IN THE SOFTWARE.
2727 */
2828
29+/**
30+ * msgqTxHeader -- TX queue data structure
31+ * @version: the version of this structure, must be 0
32+ * @size: the size of the entire queue, including this header
33+ * @msgSize: the padded size of queue element, 16 is minimum
34+ * @msgCount: the number of elements in this queue
35+ * @writePtr: head index of this queue
36+ * @flags: 1 = swap the RX pointers
37+ * @rxHdrOff: offset of readPtr in this structure
38+ * @entryOff: offset of beginning of queue (msgqRxHeader), relative to
39+ * beginning of this structure
40+ *
41+ * The command queue is a queue of RPCs that are sent from the driver to the
42+ * GSP. The status queue is a queue of messages/responses from GSP-RM to the
43+ * driver. Although the driver allocates memory for both queues, the command
44+ * queue is owned by the driver and the status queue is owned by GSP-RM. In
45+ * addition, the headers of the two queues must not share the same 4K page.
46+ *
47+ * Each queue is prefixed with this data structure. The idea is that a queue
48+ * and its header are written to only by their owner. That is, only the
49+ * driver writes to the command queue and command queue header, and only the
50+ * GSP writes to the status (receive) queue and its header.
51+ *
52+ * This is enforced by the concept of "swapping" the RX pointers. This is
53+ * why the 'flags' field must be set to 1. 'rxHdrOff' is how the GSP knows
54+ * where the where the tail pointer of its status queue.
55+ *
56+ * When the driver writes a new RPC to the command queue, it updates writePtr.
57+ * When it reads a new message from the status queue, it updates readPtr. In
58+ * this way, the GSP knows when a new command is in the queue (it polls
59+ * writePtr) and it knows how much free space is in the status queue (it
60+ * checks readPtr). The driver never cares about how much free space is in
61+ * the status queue.
62+ *
63+ * As usual, producers write to the head pointer, and consumers read from the
64+ * tail pointer. When head == tail, the queue is empty.
65+ *
66+ * So to summarize:
67+ * command.writePtr = head of command queue
68+ * command.readPtr = tail of status queue
69+ * status.writePtr = head of status queue
70+ * status.readPtr = tail of command queue
71+ */
2972 typedef struct
3073 {
3174 NvU32 version; // queue version
@@ -38,6 +81,14 @@ typedef struct · 6 unmodified lines
3881 NvU32 entryOff; // Offset of entries from start of backing store.
3982 } msgqTxHeader;
4083
84+/**
85+ * msgqRxHeader - RX queue data structure
86+ * @readPtr: tail index of the other queue
87+ *
88+ * Although this is a separate struct, it could easily be merged into
89+ * msgqTxHeader. msgqTxHeader.rxHdrOff is simply the offset of readPtr
90+ * from the beginning of msgqTxHeader.
91+ */
4192 typedef struct
4293 {
4394 NvU32 readPtr; // message id of last message read
drivers/gpu/drm/nouveau/include/nvrm/535.113.01/nvidia/generated/g_os_nvoc.h+1−1
@@ -38,7 +38,7 @@ typedef struct PACKED_REGISTRY_TABLE · 37 unmodified lines
3838 {
3939 NvU32 size;
4040 NvU32 numEntries;
41− PACKED_REGISTRY_ENTRY entries[0];
41+ PACKED_REGISTRY_ENTRY entries[] __counted_by(numEntries);
4242 } PACKED_REGISTRY_TABLE;
4343
4444 #endif
drivers/gpu/drm/nouveau/nouveau_bo.c+3−2
@@ -318,8 +318,9 @@ nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain, · 317 unmodified lines
318318 (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
319319 continue;
320320
321− if (pi < 0)
322− pi = i;
321+ /* pick the last one as it will be smallest. */
322+ pi = i;
323+
323324 /* Stop once the buffer is larger than the current page size. */
324325 if (*size >= 1ULL << vmm->page[i].shift)
325326 break;
drivers/gpu/drm/nouveau/nouveau_display.c+5−0
@@ -726,6 +726,11 @@ nouveau_display_create(struct drm_device *dev) · 725 unmodified lines
726726
727727 if (nouveau_modeset != 2) {
728728 ret = nvif_disp_ctor(&drm->client.device, "kmsDisp", 0, &disp->disp);
729+ /* no display hw */
730+ if (ret == -ENODEV) {
731+ ret = 0;
732+ goto disp_create_err;
733+ }
729734
730735 if (!ret && (disp->disp.outp_mask || drm->vbios.dcb.entries)) {
731736 nouveau_display_create_properties(dev);
drivers/gpu/drm/nouveau/nvkm/core/event.c+6−6
@@ -81,17 +81,17 @@ nvkm_event_ntfy_state(struct nvkm_event_ntfy *ntfy) · 80 unmodified lines
8181 static void
8282 nvkm_event_ntfy_remove(struct nvkm_event_ntfy *ntfy)
8383 {
84− spin_lock_irq(&ntfy->event->list_lock);
84+ write_lock_irq(&ntfy->event->list_lock);
8585 list_del_init(&ntfy->head);
86− spin_unlock_irq(&ntfy->event->list_lock);
86+ write_unlock_irq(&ntfy->event->list_lock);
8787 }
8888
8989 static void
9090 nvkm_event_ntfy_insert(struct nvkm_event_ntfy *ntfy)
9191 {
92− spin_lock_irq(&ntfy->event->list_lock);
92+ write_lock_irq(&ntfy->event->list_lock);
9393 list_add_tail(&ntfy->head, &ntfy->event->ntfy);
94− spin_unlock_irq(&ntfy->event->list_lock);
94+ write_unlock_irq(&ntfy->event->list_lock);
9595 }
9696
9797 static void
@@ -176,7 +176,7 @@ nvkm_event_ntfy(struct nvkm_event *event, int id, u32 bits) · 78 unmodified lines
176176 return;
177177
178178 nvkm_trace(event->subdev, "event: ntfy %08x on %d\n", bits, id);
179− spin_lock_irqsave(&event->list_lock, flags);
179+ read_lock_irqsave(&event->list_lock, flags);
180180
181181 list_for_each_entry_safe(ntfy, ntmp, &event->ntfy, head) {
182182 if (ntfy->id == id && ntfy->bits & bits) {
@@ -185,7 +185,7 @@ nvkm_event_ntfy(struct nvkm_event *event, int id, u32 bits) · 2 unmodified lines
185185 }
186186 }
187187
188− spin_unlock_irqrestore(&event->list_lock, flags);
188+ read_unlock_irqrestore(&event->list_lock, flags);
189189 }
190190
191191 void
drivers/gpu/drm/nouveau/nvkm/engine/fifo/r535.c+1−1
@@ -539,7 +539,7 @@ r535_fifo_runl_ctor(struct nvkm_fifo *fifo) · 538 unmodified lines
539539 struct nvkm_runl *runl;
540540 struct nvkm_engn *engn;
541541 u32 cgids = 2048;
542− u32 chids = 2048 / CHID_PER_USERD;
542+ u32 chids = 2048;
543543 int ret;
544544 NV2080_CTRL_FIFO_GET_DEVICE_INFO_TABLE_PARAMS *ctrl;
545545
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c+87−7
@@ -365,10 +365,8 @@ r535_gsp_rpc_send(struct nvkm_gsp *gsp, void *argv, bool wait, u32 repc) · 364 unmodified lines
365365 }
366366
367367 ret = r535_gsp_cmdq_push(gsp, rpc);
368− if (ret) {
369− mutex_unlock(&gsp->cmdq.mutex);
368+ if (ret)
370369 return ERR_PTR(ret);
371− }
372370
373371 if (wait) {
374372 msg = r535_gsp_msg_recv(gsp, fn, repc);
@@ -689,8 +687,8 @@ r535_gsp_rpc_get(struct nvkm_gsp *gsp, u32 fn, u32 argc) · 314 unmodified lines
689687 struct nvfw_gsp_rpc *rpc;
690688
691689 rpc = r535_gsp_cmdq_get(gsp, ALIGN(sizeof(*rpc) + argc, sizeof(u64)));
692− if (!rpc)
693− return NULL;
690+ if (IS_ERR(rpc))
691+ return ERR_CAST(rpc);
694692
695693 rpc->header_version = 0x03000000;
696694 rpc->signature = ('C' << 24) | ('P' << 16) | ('R' << 8) | 'V';
@@ -1048,7 +1046,7 @@ r535_gsp_rpc_set_registry(struct nvkm_gsp *gsp) · 351 unmodified lines
10481046 char *strings;
10491047 int str_offset;
10501048 int i;
1051− size_t rpc_size = sizeof(*rpc) + sizeof(rpc->entries[0]) * NV_GSP_REG_NUM_ENTRIES;
1049+ size_t rpc_size = struct_size(rpc, entries, NV_GSP_REG_NUM_ENTRIES);
10521050
10531051 /* add strings + null terminator */
10541052 for (i = 0; i < NV_GSP_REG_NUM_ENTRIES; i++)
@@ -1159,7 +1157,7 @@ static void · 104 unmodified lines
11591157 r535_gsp_acpi_mux_id(acpi_handle handle, u32 id, MUX_METHOD_DATA_ELEMENT *mode,
11601158 MUX_METHOD_DATA_ELEMENT *part)
11611159 {
1162− acpi_handle iter = NULL, handle_mux;
1160+ acpi_handle iter = NULL, handle_mux = NULL;
11631161 acpi_status status;
11641162 unsigned long long value;
11651163
@@ -1379,6 +1377,13 @@ r535_gsp_msg_post_event(void *priv, u32 fn, void *repv, u32 repc) · 213 unmodified lines
13791377 return 0;
13801378 }
13811379
1380+/**
1381+ * r535_gsp_msg_run_cpu_sequencer() -- process I/O commands from the GSP
1382+ *
1383+ * The GSP sequencer is a list of I/O commands that the GSP can send to
1384+ * the driver to perform for various purposes. The most common usage is to
1385+ * perform a special mid-initialization reset.
1386+ */
13821387 static int
13831388 r535_gsp_msg_run_cpu_sequencer(void *priv, u32 fn, void *repv, u32 repc)
13841389 {
@@ -1718,6 +1723,23 @@ r535_gsp_libos_id8(const char *name) · 333 unmodified lines
17181723 return id;
17191724 }
17201725
1726+/**
1727+ * create_pte_array() - creates a PTE array of a physically contiguous buffer
1728+ * @ptes: pointer to the array
1729+ * @addr: base address of physically contiguous buffer (GSP_PAGE_SIZE aligned)
1730+ * @size: size of the buffer
1731+ *
1732+ * GSP-RM sometimes expects physically-contiguous buffers to have an array of
1733+ * "PTEs" for each page in that buffer. Although in theory that allows for
1734+ * the buffer to be physically discontiguous, GSP-RM does not currently
1735+ * support that.
1736+ *
1737+ * In this case, the PTEs are DMA addresses of each page of the buffer. Since
1738+ * the buffer is physically contiguous, calculating all the PTEs is simple
1739+ * math.
1740+ *
1741+ * See memdescGetPhysAddrsForGpu()
1742+ */
17211743 static void create_pte_array(u64 *ptes, dma_addr_t addr, size_t size)
17221744 {
17231745 unsigned int num_pages = DIV_ROUND_UP_ULL(size, GSP_PAGE_SIZE);
@@ -1727,6 +1749,35 @@ static void create_pte_array(u64 *ptes, dma_addr_t addr, size_t size) · 3 unmodified lines
17271749 ptes[i] = (u64)addr + (i << GSP_PAGE_SHIFT);
17281750 }
17291751
1752+/**
1753+ * r535_gsp_libos_init() -- create the libos arguments structure
1754+ *
1755+ * The logging buffers are byte queues that contain encoded printf-like
1756+ * messages from GSP-RM. They need to be decoded by a special application
1757+ * that can parse the buffers.
1758+ *
1759+ * The 'loginit' buffer contains logs from early GSP-RM init and
1760+ * exception dumps. The 'logrm' buffer contains the subsequent logs. Both are
1761+ * written to directly by GSP-RM and can be any multiple of GSP_PAGE_SIZE.
1762+ *
1763+ * The physical address map for the log buffer is stored in the buffer
1764+ * itself, starting with offset 1. Offset 0 contains the "put" pointer.
1765+ *
1766+ * The GSP only understands 4K pages (GSP_PAGE_SIZE), so even if the kernel is
1767+ * configured for a larger page size (e.g. 64K pages), we need to give
1768+ * the GSP an array of 4K pages. Fortunately, since the buffer is
1769+ * physically contiguous, it's simple math to calculate the addresses.
1770+ *
1771+ * The buffers must be a multiple of GSP_PAGE_SIZE. GSP-RM also currently
1772+ * ignores the @kind field for LOGINIT, LOGINTR, and LOGRM, but expects the
1773+ * buffers to be physically contiguous anyway.
1774+ *
1775+ * The memory allocated for the arguments must remain until the GSP sends the
1776+ * init_done RPC.
1777+ *
1778+ * See _kgspInitLibosLoggingStructures (allocates memory for buffers)
1779+ * See kgspSetupLibosInitArgs_IMPL (creates pLibosInitArgs[] array)
1780+ */
17301781 static int
17311782 r535_gsp_libos_init(struct nvkm_gsp *gsp)
17321783 {
@@ -1837,6 +1888,35 @@ nvkm_gsp_radix3_dtor(struct nvkm_gsp *gsp, struct nvkm_gsp_radix3 *rx3) · 104 unmodified lines
18371888 nvkm_gsp_mem_dtor(gsp, &rx3->mem[i]);
18381889 }
18391890
1891+/**
1892+ * nvkm_gsp_radix3_sg - build a radix3 table from a S/G list
1893+ *
1894+ * The GSP uses a three-level page table, called radix3, to map the firmware.
1895+ * Each 64-bit "pointer" in the table is either the bus address of an entry in
1896+ * the next table (for levels 0 and 1) or the bus address of the next page in
1897+ * the GSP firmware image itself.
1898+ *
1899+ * Level 0 contains a single entry in one page that points to the first page
1900+ * of level 1.
1901+ *
1902+ * Level 1, since it's also only one page in size, contains up to 512 entries,
1903+ * one for each page in Level 2.
1904+ *
1905+ * Level 2 can be up to 512 pages in size, and each of those entries points to
1906+ * the next page of the firmware image. Since there can be up to 512*512
1907+ * pages, that limits the size of the firmware to 512*512*GSP_PAGE_SIZE = 1GB.
1908+ *
1909+ * Internally, the GSP has its window into system memory, but the base
1910+ * physical address of the aperture is not 0. In fact, it varies depending on
1911+ * the GPU architecture. Since the GPU is a PCI device, this window is
1912+ * accessed via DMA and is therefore bound by IOMMU translation. The end
1913+ * result is that GSP-RM must translate the bus addresses in the table to GSP
1914+ * physical addresses. All this should happen transparently.
1915+ *
1916+ * Returns 0 on success, or negative error code
1917+ *
1918+ * See kgspCreateRadix3_IMPL
1919+ */
18401920 static int
18411921 nvkm_gsp_radix3_sg(struct nvkm_device *device, struct sg_table *sgt, u64 size,
18421922 struct nvkm_gsp_radix3 *rx3)
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c+1−1
@@ -31,7 +31,7 @@ tu102_vmm_flush(struct nvkm_vmm *vmm, int depth) · 30 unmodified lines
3131
3232 type |= 0x00000001; /* PAGE_ALL */
3333 if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))
34− type |= 0x00000004; /* HUB_ONLY */
34+ type |= 0x00000006; /* HUB_ONLY | ALL PDB (hack) */
3535
3636 mutex_lock(&vmm->mmu->mutex);
3737
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c+6−4
@@ -1709,6 +1709,7 @@ static const struct panel_desc auo_b101uan08_3_desc = { · 1708 unmodified lines
17091709 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
17101710 MIPI_DSI_MODE_LPM,
17111711 .init_cmds = auo_b101uan08_3_init_cmd,
1712+ .lp11_before_reset = true,
17121713 };
17131714
17141715 static const struct drm_display_mode boe_tv105wum_nw0_default_mode = {
@@ -1763,14 +1764,15 @@ static const struct panel_desc starry_qfh032011_53g_desc = { · 48 unmodified lines
17631764 .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
17641765 MIPI_DSI_MODE_LPM,
17651766 .init_cmds = starry_qfh032011_53g_init_cmd,
1767+ .lp11_before_reset = true,
17661768 };
17671769
17681770 static const struct drm_display_mode starry_himax83102_j02_default_mode = {
1769− .clock = 161600,
1771+ .clock = 162850,
17701772 .hdisplay = 1200,
1771− .hsync_start = 1200 + 40,
1772− .hsync_end = 1200 + 40 + 20,
1773− .htotal = 1200 + 40 + 20 + 40,
1773+ .hsync_start = 1200 + 50,
1774+ .hsync_end = 1200 + 50 + 20,
1775+ .htotal = 1200 + 50 + 20 + 50,
17741776 .vdisplay = 1920,
17751777 .vsync_start = 1920 + 116,
17761778 .vsync_end = 1920 + 116 + 8,
drivers/gpu/drm/panel/panel-novatek-nt36523.c+2−2
@@ -1254,9 +1254,9 @@ static int nt36523_probe(struct mipi_dsi_device *dsi) · 1253 unmodified lines
12541254 return dev_err_probe(dev, -EPROBE_DEFER, "cannot get secondary DSI host\n");
12551255
12561256 pinfo->dsi[1] = mipi_dsi_device_register_full(dsi1_host, info);
1257− if (!pinfo->dsi[1]) {
1257+ if (IS_ERR(pinfo->dsi[1])) {
12581258 dev_err(dev, "cannot get secondary DSI device\n");
1259− return -ENODEV;
1259+ return PTR_ERR(pinfo->dsi[1]);
12601260 }
12611261 }
12621262
drivers/gpu/drm/panel/panel-simple.c+7−6
@@ -2379,13 +2379,13 @@ static const struct panel_desc innolux_g070y2_t02 = { · 2378 unmodified lines
23792379 static const struct display_timing innolux_g101ice_l01_timing = {
23802380 .pixelclock = { 60400000, 71100000, 74700000 },
23812381 .hactive = { 1280, 1280, 1280 },
2382− .hfront_porch = { 41, 80, 100 },
2383− .hback_porch = { 40, 79, 99 },
2384− .hsync_len = { 1, 1, 1 },
2382+ .hfront_porch = { 30, 60, 70 },
2383+ .hback_porch = { 30, 60, 70 },
2384+ .hsync_len = { 22, 40, 60 },
23852385 .vactive = { 800, 800, 800 },
2386− .vfront_porch = { 5, 11, 14 },
2387− .vback_porch = { 4, 11, 14 },
2388− .vsync_len = { 1, 1, 1 },
2386+ .vfront_porch = { 3, 8, 14 },
2387+ .vback_porch = { 3, 8, 14 },
2388+ .vsync_len = { 4, 7, 12 },
23892389 .flags = DISPLAY_FLAGS_DE_HIGH,
23902390 };
23912391
@@ -2402,6 +2402,7 @@ static const struct panel_desc innolux_g101ice_l01 = { · 10 unmodified lines
24022402 .disable = 200,
24032403 },
24042404 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
2405+ .bus_flags = DRM_BUS_FLAG_DE_HIGH,
24052406 .connector_type = DRM_MODE_CONNECTOR_LVDS,
24062407 };
24072408
drivers/gpu/drm/panfrost/panfrost_devfreq.c+15−2
@@ -29,14 +29,20 @@ static void panfrost_devfreq_update_utilization(struct panfrost_devfreq *pfdevfr · 28 unmodified lines
2929 static int panfrost_devfreq_target(struct device *dev, unsigned long *freq,
3030 u32 flags)
3131 {
32+ struct panfrost_device *ptdev = dev_get_drvdata(dev);
3233 struct dev_pm_opp *opp;
34+ int err;
3335
3436 opp = devfreq_recommended_opp(dev, freq, flags);
3537 if (IS_ERR(opp))
3638 return PTR_ERR(opp);
3739 dev_pm_opp_put(opp);
3840
39− return dev_pm_opp_set_rate(dev, *freq);
41+ err = dev_pm_opp_set_rate(dev, *freq);
42+ if (!err)
43+ ptdev->pfdevfreq.current_frequency = *freq;
44+
45+ return err;
4046 }
4147
4248 static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq)
@@ -58,7 +64,6 @@ static int panfrost_devfreq_get_dev_status(struct device *dev, · 15 unmodified lines
5864 spin_lock_irqsave(&pfdevfreq->lock, irqflags);
5965
6066 panfrost_devfreq_update_utilization(pfdevfreq);
61− pfdevfreq->current_frequency = status->current_frequency;
6267
6368 status->total_time = ktime_to_ns(ktime_add(pfdevfreq->busy_time,
6469 pfdevfreq->idle_time));
@@ -164,6 +169,14 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) · 99 unmodified lines
164169
165170 panfrost_devfreq_profile.initial_freq = cur_freq;
166171
172+ /*
173+ * We could wait until panfrost_devfreq_target() to set this value, but
174+ * since the simple_ondemand governor works asynchronously, there's a
175+ * chance by the time someone opens the device's fdinfo file, current
176+ * frequency hasn't been updated yet, so let's just do an early set.
177+ */
178+ pfdevfreq->current_frequency = cur_freq;
179+
167180 /*
168181 * Set the recommend OPP this will enable and configure the regulator
169182 * if any and will avoid a switch off by regulator_late_cleanup()
drivers/gpu/drm/panfrost/panfrost_gem.c+1−1
@@ -200,7 +200,7 @@ static enum drm_gem_object_status panfrost_gem_status(struct drm_gem_object *obj · 199 unmodified lines
200200 struct panfrost_gem_object *bo = to_panfrost_bo(obj);
201201 enum drm_gem_object_status res = 0;
202202
203− if (bo->base.pages)
203+ if (bo->base.base.import_attach || bo->base.pages)
204204 res |= DRM_GEM_OBJECT_RESIDENT;
205205
206206 if (bo->base.madv == PANFROST_MADV_DONTNEED)
drivers/gpu/drm/rockchip/rockchip_drm_vop.c+11−3
@@ -247,14 +247,22 @@ static inline void vop_cfg_done(struct vop *vop) · 246 unmodified lines
247247 VOP_REG_SET(vop, common, cfg_done, 1);
248248 }
249249
250−static bool has_rb_swapped(uint32_t format)
250+static bool has_rb_swapped(uint32_t version, uint32_t format)
251251 {
252252 switch (format) {
253253 case DRM_FORMAT_XBGR8888:
254254 case DRM_FORMAT_ABGR8888:
255− case DRM_FORMAT_BGR888:
256255 case DRM_FORMAT_BGR565:
257256 return true;
257+ /*
258+ * full framework (IP version 3.x) only need rb swapped for RGB888 and
259+ * little framework (IP version 2.x) only need rb swapped for BGR888,
260+ * check for 3.x to also only rb swap BGR888 for unknown vop version
261+ */
262+ case DRM_FORMAT_RGB888:
263+ return VOP_MAJOR(version) == 3;
264+ case DRM_FORMAT_BGR888:
265+ return VOP_MAJOR(version) != 3;
258266 default:
259267 return false;
260268 }
@@ -1030,7 +1038,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, · 769 unmodified lines
10301038 VOP_WIN_SET(vop, win, dsp_info, dsp_info);
10311039 VOP_WIN_SET(vop, win, dsp_st, dsp_st);
10321040
1033− rb_swap = has_rb_swapped(fb->format->format);
1041+ rb_swap = has_rb_swapped(vop->data->version, fb->format->format);
10341042 VOP_WIN_SET(vop, win, rb_swap, rb_swap);
10351043
10361044 /*
drivers/greybus/Kconfig+1−0
@@ -20,6 +20,7 @@ if GREYBUS · 19 unmodified lines
2020 config GREYBUS_BEAGLEPLAY
2121 tristate "Greybus BeaglePlay driver"
2222 depends on SERIAL_DEV_BUS
23+ select CRC_CCITT
2324 help
2425 Select this option if you have a BeaglePlay where CC1352
2526 co-processor acts as Greybus SVC.
drivers/hid/hid-apple.c+2−0
@@ -345,6 +345,8 @@ static const struct apple_non_apple_keyboard non_apple_keyboards[] = { · 344 unmodified lines
345345 { "AONE" },
346346 { "GANSS" },
347347 { "Hailuck" },
348+ { "Jamesdonkey" },
349+ { "A3R" },
348350 };
349351
350352 static bool apple_is_non_apple_keyboard(struct hid_device *hdev)
drivers/hid/hid-asus.c+23−4
@@ -381,7 +381,7 @@ static int asus_raw_event(struct hid_device *hdev, · 380 unmodified lines
381381 return 0;
382382 }
383383
384−static int asus_kbd_set_report(struct hid_device *hdev, u8 *buf, size_t buf_size)
384+static int asus_kbd_set_report(struct hid_device *hdev, const u8 *buf, size_t buf_size)
385385 {
386386 unsigned char *dmabuf;
387387 int ret;
@@ -404,7 +404,7 @@ static int asus_kbd_set_report(struct hid_device *hdev, u8 *buf, size_t buf_size · 16 unmodified lines
404404
405405 static int asus_kbd_init(struct hid_device *hdev)
406406 {
407− u8 buf[] = { FEATURE_KBD_REPORT_ID, 0x41, 0x53, 0x55, 0x53, 0x20, 0x54,
407+ const u8 buf[] = { FEATURE_KBD_REPORT_ID, 0x41, 0x53, 0x55, 0x53, 0x20, 0x54,
408408 0x65, 0x63, 0x68, 0x2e, 0x49, 0x6e, 0x63, 0x2e, 0x00 };
409409 int ret;
410410
@@ -418,7 +418,7 @@ static int asus_kbd_init(struct hid_device *hdev) · 7 unmodified lines
418418 static int asus_kbd_get_functions(struct hid_device *hdev,
419419 unsigned char *kbd_func)
420420 {
421− u8 buf[] = { FEATURE_KBD_REPORT_ID, 0x05, 0x20, 0x31, 0x00, 0x08 };
421+ const u8 buf[] = { FEATURE_KBD_REPORT_ID, 0x05, 0x20, 0x31, 0x00, 0x08 };
422422 u8 *readbuf;
423423 int ret;
424424
@@ -449,7 +449,7 @@ static int asus_kbd_get_functions(struct hid_device *hdev, · 24 unmodified lines
449449
450450 static int rog_nkey_led_init(struct hid_device *hdev)
451451 {
452− u8 buf_init_start[] = { FEATURE_KBD_LED_REPORT_ID1, 0xB9 };
452+ const u8 buf_init_start[] = { FEATURE_KBD_LED_REPORT_ID1, 0xB9 };
453453 u8 buf_init2[] = { FEATURE_KBD_LED_REPORT_ID1, 0x41, 0x53, 0x55, 0x53, 0x20,
454454 0x54, 0x65, 0x63, 0x68, 0x2e, 0x49, 0x6e, 0x63, 0x2e, 0x00 };
455455 u8 buf_init3[] = { FEATURE_KBD_LED_REPORT_ID1,
@@ -1000,6 +1000,24 @@ static int asus_start_multitouch(struct hid_device *hdev) · 544 unmodified lines
10001000 return 0;
10011001 }
10021002
1003+static int __maybe_unused asus_resume(struct hid_device *hdev) {
1004+ struct asus_drvdata *drvdata = hid_get_drvdata(hdev);
1005+ int ret = 0;
1006+
1007+ if (drvdata->kbd_backlight) {
1008+ const u8 buf[] = { FEATURE_KBD_REPORT_ID, 0xba, 0xc5, 0xc4,
1009+ drvdata->kbd_backlight->cdev.brightness };
1010+ ret = asus_kbd_set_report(hdev, buf, sizeof(buf));
1011+ if (ret < 0) {
1012+ hid_err(hdev, "Asus failed to set keyboard backlight: %d\n", ret);
1013+ goto asus_resume_err;
1014+ }
1015+ }
1016+
1017+asus_resume_err:
1018+ return ret;
1019+}
1020+
10031021 static int __maybe_unused asus_reset_resume(struct hid_device *hdev)
10041022 {
10051023 struct asus_drvdata *drvdata = hid_get_drvdata(hdev);
@@ -1294,6 +1312,7 @@ static struct hid_driver asus_driver = { · 288 unmodified lines
12941312 .input_configured = asus_input_configured,
12951313 #ifdef CONFIG_PM
12961314 .reset_resume = asus_reset_resume,
1315+ .resume = asus_resume,
12971316 #endif
12981317 .event = asus_event,
12991318 .raw_event = asus_raw_event
drivers/hid/hid-core.c+10−2
@@ -702,15 +702,22 @@ static void hid_close_report(struct hid_device *device) · 701 unmodified lines
702702 * Free a device structure, all reports, and all fields.
703703 */
704704
705−static void hid_device_release(struct device *dev)
705+void hiddev_free(struct kref *ref)
706706 {
707− struct hid_device *hid = to_hid_device(dev);
707+ struct hid_device *hid = container_of(ref, struct hid_device, ref);
708708
709709 hid_close_report(hid);
710710 kfree(hid->dev_rdesc);
711711 kfree(hid);
712712 }
713713
714+static void hid_device_release(struct device *dev)
715+{
716+ struct hid_device *hid = to_hid_device(dev);
717+
718+ kref_put(&hid->ref, hiddev_free);
719+}
720+
714721 /*
715722 * Fetch a report description item from the data stream. We support long
716723 * items, though they are not used yet.
@@ -2846,6 +2853,7 @@ struct hid_device *hid_allocate_device(void) · 2129 unmodified lines
28462853 spin_lock_init(&hdev->debug_list_lock);
28472854 sema_init(&hdev->driver_input_lock, 1);
28482855 mutex_init(&hdev->ll_open_lock);
2856+ kref_init(&hdev->ref);
28492857
28502858 hid_bpf_device_init(hdev);
28512859
drivers/hid/hid-debug.c+3−0
@@ -1135,6 +1135,7 @@ static int hid_debug_events_open(struct inode *inode, struct file *file) · 1134 unmodified lines
11351135 goto out;
11361136 }
11371137 list->hdev = (struct hid_device *) inode->i_private;
1138+ kref_get(&list->hdev->ref);
11381139 file->private_data = list;
11391140 mutex_init(&list->read_mutex);
11401141
@@ -1227,6 +1228,8 @@ static int hid_debug_events_release(struct inode *inode, struct file *file) · 86 unmodified lines
12271228 list_del(&list->node);
12281229 spin_unlock_irqrestore(&list->hdev->debug_list_lock, flags);
12291230 kfifo_free(&list->hid_debug_fifo);
1231+
1232+ kref_put(&list->hdev->ref, hiddev_free);
12301233 kfree(list);
12311234
12321235 return 0;
drivers/hid/hid-glorious.c+14−2
@@ -21,6 +21,10 @@ MODULE_DESCRIPTION("HID driver for Glorious PC Gaming Race mice"); · 20 unmodified lines
2121 * Glorious Model O and O- specify the const flag in the consumer input
2222 * report descriptor, which leads to inputs being ignored. Fix this
2323 * by patching the descriptor.
24+ *
25+ * Glorious Model I incorrectly specifes the Usage Minimum for its
26+ * keyboard HID report, causing keycodes to be misinterpreted.
27+ * Fix this by setting Usage Minimum to 0 in that report.
2428 */
2529 static __u8 *glorious_report_fixup(struct hid_device *hdev, __u8 *rdesc,
2630 unsigned int *rsize)
@@ -32,6 +36,10 @@ static __u8 *glorious_report_fixup(struct hid_device *hdev, __u8 *rdesc, · 5 unmodified lines
3236 rdesc[85] = rdesc[113] = rdesc[141] = \
3337 HID_MAIN_ITEM_VARIABLE | HID_MAIN_ITEM_RELATIVE;
3438 }
39+ if (*rsize == 156 && rdesc[41] == 1) {
40+ hid_info(hdev, "patching Glorious Model I keyboard report descriptor\n");
41+ rdesc[41] = 0;
42+ }
3543 return rdesc;
3644 }
3745
@@ -44,6 +52,8 @@ static void glorious_update_name(struct hid_device *hdev) · 6 unmodified lines
4452 model = "Model O"; break;
4553 case USB_DEVICE_ID_GLORIOUS_MODEL_D:
4654 model = "Model D"; break;
55+ case USB_DEVICE_ID_GLORIOUS_MODEL_I:
56+ model = "Model I"; break;
4757 }
4858
4959 snprintf(hdev->name, sizeof(hdev->name), "%s %s", "Glorious", model);
@@ -66,10 +76,12 @@ static int glorious_probe(struct hid_device *hdev, · 16 unmodified lines
6676 }
6777
6878 static const struct hid_device_id glorious_devices[] = {
69− { HID_USB_DEVICE(USB_VENDOR_ID_GLORIOUS,
79+ { HID_USB_DEVICE(USB_VENDOR_ID_SINOWEALTH,
7080 USB_DEVICE_ID_GLORIOUS_MODEL_O) },
71− { HID_USB_DEVICE(USB_VENDOR_ID_GLORIOUS,
81+ { HID_USB_DEVICE(USB_VENDOR_ID_SINOWEALTH,
7282 USB_DEVICE_ID_GLORIOUS_MODEL_D) },
83+ { HID_USB_DEVICE(USB_VENDOR_ID_LAVIEW,
84+ USB_DEVICE_ID_GLORIOUS_MODEL_I) },
7385 { }
7486 };
7587 MODULE_DEVICE_TABLE(hid, glorious_devices);
drivers/hid/hid-ids.h+7−5
@@ -511,10 +511,6 @@ · 510 unmodified lines
511511 #define USB_DEVICE_ID_GENERAL_TOUCH_WIN8_PIT_010A 0x010a
512512 #define USB_DEVICE_ID_GENERAL_TOUCH_WIN8_PIT_E100 0xe100
513513
514−#define USB_VENDOR_ID_GLORIOUS 0x258a
515−#define USB_DEVICE_ID_GLORIOUS_MODEL_D 0x0033
516−#define USB_DEVICE_ID_GLORIOUS_MODEL_O 0x0036
517−
518514 #define I2C_VENDOR_ID_GOODIX 0x27c6
519515 #define I2C_DEVICE_ID_GOODIX_01F0 0x01f0
520516
@@ -745,6 +741,9 @@ · 224 unmodified lines
745741 #define USB_VENDOR_ID_LABTEC 0x1020
746742 #define USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD 0x0006
747743
744+#define USB_VENDOR_ID_LAVIEW 0x22D4
745+#define USB_DEVICE_ID_GLORIOUS_MODEL_I 0x1503
746+
748747 #define USB_VENDOR_ID_LCPOWER 0x1241
749748 #define USB_DEVICE_ID_LCPOWER_LC1000 0xf767
750749
@@ -869,7 +868,6 @@ · 118 unmodified lines
869868 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_2 0xc534
870869 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1 0xc539
871870 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_1 0xc53f
872−#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_2 0xc547
873871 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_POWERPLAY 0xc53a
874872 #define USB_DEVICE_ID_SPACETRAVELLER 0xc623
875873 #define USB_DEVICE_ID_SPACENAVIGATOR 0xc626
@@ -1160,6 +1158,10 @@ · 284 unmodified lines
11601158 #define USB_VENDOR_ID_SIGMATEL 0x066F
11611159 #define USB_DEVICE_ID_SIGMATEL_STMP3780 0x3780
11621160
1161+#define USB_VENDOR_ID_SINOWEALTH 0x258a
1162+#define USB_DEVICE_ID_GLORIOUS_MODEL_D 0x0033
1163+#define USB_DEVICE_ID_GLORIOUS_MODEL_O 0x0036
1164+
11631165 #define USB_VENDOR_ID_SIS_TOUCH 0x0457
11641166 #define USB_DEVICE_ID_SIS9200_TOUCH 0x9200
11651167 #define USB_DEVICE_ID_SIS817_TOUCH 0x0817
drivers/hid/hid-logitech-dj.c+3−8
@@ -1695,12 +1695,11 @@ static int logi_dj_raw_event(struct hid_device *hdev, · 1694 unmodified lines
16951695 }
16961696 /*
16971697 * Mouse-only receivers send unnumbered mouse data. The 27 MHz
1698− * receiver uses 6 byte packets, the nano receiver 8 bytes,
1699− * the lightspeed receiver (Pro X Superlight) 13 bytes.
1698+ * receiver uses 6 byte packets, the nano receiver 8 bytes.
17001699 */
17011700 if (djrcv_dev->unnumbered_application == HID_GD_MOUSE &&
1702− size <= 13){
1703− u8 mouse_report[14];
1701+ size <= 8) {
1702+ u8 mouse_report[9];
17041703
17051704 /* Prepend report id */
17061705 mouse_report[0] = REPORT_TYPE_MOUSE;
@@ -1984,10 +1983,6 @@ static const struct hid_device_id logi_dj_receivers[] = { · 277 unmodified lines
19841983 HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
19851984 USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_1),
19861985 .driver_data = recvr_type_gaming_hidpp},
1987− { /* Logitech lightspeed receiver (0xc547) */
1988− HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
1989− USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED_1_2),
1990− .driver_data = recvr_type_gaming_hidpp},
19911986
19921987 { /* Logitech 27 MHz HID++ 1.0 receiver (0xc513) */
19931988 HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER),
drivers/hid/hid-mcp2221.c+3−1
@@ -1142,6 +1142,8 @@ static int mcp2221_probe(struct hid_device *hdev, · 1141 unmodified lines
11421142 if (ret)
11431143 return ret;
11441144
1145+ hid_device_io_start(hdev);
1146+
11451147 /* Set I2C bus clock diviser */
11461148 if (i2c_clk_freq > 400)
11471149 i2c_clk_freq = 400;
@@ -1157,12 +1159,12 @@ static int mcp2221_probe(struct hid_device *hdev, · 9 unmodified lines
11571159 snprintf(mcp->adapter.name, sizeof(mcp->adapter.name),
11581160 "MCP2221 usb-i2c bridge");
11591161
1162+ i2c_set_adapdata(&mcp->adapter, mcp);
11601163 ret = devm_i2c_add_adapter(&hdev->dev, &mcp->adapter);
11611164 if (ret) {
11621165 hid_err(hdev, "can't add usb-i2c adapter: %d\n", ret);
11631166 return ret;
11641167 }
1165− i2c_set_adapdata(&mcp->adapter, mcp);
11661168
11671169 #if IS_REACHABLE(CONFIG_GPIOLIB)
11681170 /* Setup GPIO chip */
drivers/hid/hid-multitouch.c+5−0
@@ -2046,6 +2046,11 @@ static const struct hid_device_id mt_devices[] = { · 2045 unmodified lines
20462046 MT_USB_DEVICE(USB_VENDOR_ID_HANVON_ALT,
20472047 USB_DEVICE_ID_HANVON_ALT_MULTITOUCH) },
20482048
2049+ /* HONOR GLO-GXXX panel */
2050+ { .driver_data = MT_CLS_VTL,
2051+ HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
2052+ 0x347d, 0x7853) },
2053+
20492054 /* Ilitek dual touch panel */
20502055 { .driver_data = MT_CLS_NSMU,
20512056 MT_USB_DEVICE(USB_VENDOR_ID_ILITEK,
drivers/hid/hid-quirks.c+1−0
@@ -33,6 +33,7 @@ static const struct hid_device_id hid_quirks[] = { · 32 unmodified lines
3333 { HID_USB_DEVICE(USB_VENDOR_ID_AKAI, USB_DEVICE_ID_AKAI_MPKMINI2), HID_QUIRK_NO_INIT_REPORTS },
3434 { HID_USB_DEVICE(USB_VENDOR_ID_ALPS, USB_DEVICE_ID_IBM_GAMEPAD), HID_QUIRK_BADPAD },
3535 { HID_USB_DEVICE(USB_VENDOR_ID_AMI, USB_DEVICE_ID_AMI_VIRT_KEYBOARD_AND_MOUSE), HID_QUIRK_ALWAYS_POLL },
36+ { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_REVB_ANSI), HID_QUIRK_ALWAYS_POLL },
3637 { HID_USB_DEVICE(USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_2PORTKVM), HID_QUIRK_NOGET },
3738 { HID_USB_DEVICE(USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVMC), HID_QUIRK_NOGET },
3839 { HID_USB_DEVICE(USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVM), HID_QUIRK_NOGET },
drivers/hwmon/acpi_power_meter.c+4−0
@@ -31,6 +31,7 @@ · 30 unmodified lines
3131 #define POWER_METER_CAN_NOTIFY (1 << 3)
3232 #define POWER_METER_IS_BATTERY (1 << 8)
3333 #define UNKNOWN_HYSTERESIS 0xFFFFFFFF
34+#define UNKNOWN_POWER 0xFFFFFFFF
3435
3536 #define METER_NOTIFY_CONFIG 0x80
3637 #define METER_NOTIFY_TRIP 0x81
@@ -348,6 +349,9 @@ static ssize_t show_power(struct device *dev, · 311 unmodified lines
348349 update_meter(resource);
349350 mutex_unlock(&resource->lock);
350351
352+ if (resource->power == UNKNOWN_POWER)
353+ return -ENODATA;
354+
351355 return sprintf(buf, "%llu\n", resource->power * 1000);
352356 }
353357
drivers/hwmon/corsair-psu.c+17−1
@@ -899,7 +899,23 @@ static struct hid_driver corsairpsu_driver = { · 898 unmodified lines
899899 .reset_resume = corsairpsu_resume,
900900 #endif
901901 };
902−module_hid_driver(corsairpsu_driver);
902+
903+static int __init corsair_init(void)
904+{
905+ return hid_register_driver(&corsairpsu_driver);
906+}
907+
908+static void __exit corsair_exit(void)
909+{
910+ hid_unregister_driver(&corsairpsu_driver);
911+}
912+
913+/*
914+ * With module_init() the driver would load before the HID bus when
915+ * built-in, so use late_initcall() instead.
916+ */
917+late_initcall(corsair_init);
918+module_exit(corsair_exit);
903919
904920 MODULE_LICENSE("GPL");
905921 MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
drivers/hwmon/ltc2991.c+1−1
@@ -373,7 +373,7 @@ static int ltc2991_init(struct ltc2991_state *st) · 372 unmodified lines
373373 LTC2991_REPEAT_ACQ_EN);
374374 if (ret)
375375 return dev_err_probe(st->dev, ret,
376− "Error: Failed to set contiuous mode.\n");
376+ "Error: Failed to set continuous mode.\n");
377377
378378 /* Enable all channels and trigger conversions */
379379 return regmap_write(st->regmap, LTC2991_CH_EN_TRIGGER,
drivers/hwmon/max31827.c+1−0
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include <linux/i2c.h>
1313 #include <linux/mutex.h>
1414 #include <linux/regmap.h>
15+#include <linux/regulator/consumer.h>
1516
1617 #define MAX31827_T_REG 0x0
1718 #define MAX31827_CONFIGURATION_REG 0x2
drivers/hwmon/nzxt-kraken2.c+2−2
@@ -161,13 +161,13 @@ static int kraken2_probe(struct hid_device *hdev, · 160 unmodified lines
161161 ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
162162 if (ret) {
163163 hid_err(hdev, "hid hw start failed with %d\n", ret);
164− goto fail_and_stop;
164+ return ret;
165165 }
166166
167167 ret = hid_hw_open(hdev);
168168 if (ret) {
169169 hid_err(hdev, "hid hw open failed with %d\n", ret);
170− goto fail_and_close;
170+ goto fail_and_stop;
171171 }
172172
173173 priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "kraken2",
drivers/hwtracing/coresight/coresight-etm-perf.c+2−2
@@ -493,7 +493,7 @@ static void etm_event_start(struct perf_event *event, int flags) · 492 unmodified lines
493493 goto fail_end_stop;
494494
495495 /* Finally enable the tracer */
496− if (coresight_enable_source(csdev, CS_MODE_PERF, event))
496+ if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
497497 goto fail_disable_path;
498498
499499 /*
@@ -587,7 +587,7 @@ static void etm_event_stop(struct perf_event *event, int mode) · 87 unmodified lines
587587 return;
588588
589589 /* stop tracer */
590− coresight_disable_source(csdev, event);
590+ source_ops(csdev)->disable(csdev, event);
591591
592592 /* tell the core */
593593 event->hw.state = PERF_HES_STOPPED;
drivers/hwtracing/coresight/coresight-etm4x-core.c+3−3
@@ -2224,7 +2224,7 @@ static void clear_etmdrvdata(void *info) · 2223 unmodified lines
22242224 per_cpu(delayed_probe, cpu) = NULL;
22252225 }
22262226
2227−static void __exit etm4_remove_dev(struct etmv4_drvdata *drvdata)
2227+static void etm4_remove_dev(struct etmv4_drvdata *drvdata)
22282228 {
22292229 bool had_delayed_probe;
22302230 /*
@@ -2253,7 +2253,7 @@ static void __exit etm4_remove_dev(struct etmv4_drvdata *drvdata) · 22 unmodified lines
22532253 }
22542254 }
22552255
2256−static void __exit etm4_remove_amba(struct amba_device *adev)
2256+static void etm4_remove_amba(struct amba_device *adev)
22572257 {
22582258 struct etmv4_drvdata *drvdata = dev_get_drvdata(&adev->dev);
22592259
@@ -2261,7 +2261,7 @@ static void __exit etm4_remove_amba(struct amba_device *adev) · 1 unmodified line
22612261 etm4_remove_dev(drvdata);
22622262 }
22632263
2264−static int __exit etm4_remove_platform_dev(struct platform_device *pdev)
2264+static int etm4_remove_platform_dev(struct platform_device *pdev)
22652265 {
22662266 struct etmv4_drvdata *drvdata = dev_get_drvdata(&pdev->dev);
22672267
drivers/hwtracing/coresight/ultrasoc-smb.c+23−35
@@ -99,7 +99,7 @@ static int smb_open(struct inode *inode, struct file *file) · 98 unmodified lines
9999 struct smb_drv_data, miscdev);
100100 int ret = 0;
101101
102− mutex_lock(&drvdata->mutex);
102+ spin_lock(&drvdata->spinlock);
103103
104104 if (drvdata->reading) {
105105 ret = -EBUSY;
@@ -115,7 +115,7 @@ static int smb_open(struct inode *inode, struct file *file) · 9 unmodified lines
115115
116116 drvdata->reading = true;
117117 out:
118− mutex_unlock(&drvdata->mutex);
118+ spin_unlock(&drvdata->spinlock);
119119
120120 return ret;
121121 }
@@ -132,10 +132,8 @@ static ssize_t smb_read(struct file *file, char __user *data, size_t len, · 10 unmodified lines
132132 if (!len)
133133 return 0;
134134
135− mutex_lock(&drvdata->mutex);
136−
137135 if (!sdb->data_size)
138− goto out;
136+ return 0;
139137
140138 to_copy = min(sdb->data_size, len);
141139
@@ -145,20 +143,15 @@ static ssize_t smb_read(struct file *file, char __user *data, size_t len, · 3 unmodified lines
145143
146144 if (copy_to_user(data, sdb->buf_base + sdb->buf_rdptr, to_copy)) {
147145 dev_dbg(dev, "Failed to copy data to user\n");
148− to_copy = -EFAULT;
149− goto out;
146+ return -EFAULT;
150147 }
151148
152149 *ppos += to_copy;
153−
154150 smb_update_read_ptr(drvdata, to_copy);
155−
156− dev_dbg(dev, "%zu bytes copied\n", to_copy);
157−out:
158151 if (!sdb->data_size)
159152 smb_reset_buffer(drvdata);
160− mutex_unlock(&drvdata->mutex);
161153
154+ dev_dbg(dev, "%zu bytes copied\n", to_copy);
162155 return to_copy;
163156 }
164157
@@ -167,9 +160,9 @@ static int smb_release(struct inode *inode, struct file *file) · 2 unmodified lines
167160 struct smb_drv_data *drvdata = container_of(file->private_data,
168161 struct smb_drv_data, miscdev);
169162
170− mutex_lock(&drvdata->mutex);
163+ spin_lock(&drvdata->spinlock);
171164 drvdata->reading = false;
172− mutex_unlock(&drvdata->mutex);
165+ spin_unlock(&drvdata->spinlock);
173166
174167 return 0;
175168 }
@@ -262,7 +255,7 @@ static int smb_enable(struct coresight_device *csdev, enum cs_mode mode, · 86 unmodified lines
262255 struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent);
263256 int ret = 0;
264257
265− mutex_lock(&drvdata->mutex);
258+ spin_lock(&drvdata->spinlock);
266259
267260 /* Do nothing, the trace data is reading by other interface now */
268261 if (drvdata->reading) {
@@ -294,7 +287,7 @@ static int smb_enable(struct coresight_device *csdev, enum cs_mode mode, · 25 unmodified lines
294287
295288 dev_dbg(&csdev->dev, "Ultrasoc SMB enabled\n");
296289 out:
297− mutex_unlock(&drvdata->mutex);
290+ spin_unlock(&drvdata->spinlock);
298291
299292 return ret;
300293 }
@@ -304,7 +297,7 @@ static int smb_disable(struct coresight_device *csdev) · 3 unmodified lines
304297 struct smb_drv_data *drvdata = dev_get_drvdata(csdev->dev.parent);
305298 int ret = 0;
306299
307− mutex_lock(&drvdata->mutex);
300+ spin_lock(&drvdata->spinlock);
308301
309302 if (drvdata->reading) {
310303 ret = -EBUSY;
@@ -327,7 +320,7 @@ static int smb_disable(struct coresight_device *csdev) · 16 unmodified lines
327320
328321 dev_dbg(&csdev->dev, "Ultrasoc SMB disabled\n");
329322 out:
330− mutex_unlock(&drvdata->mutex);
323+ spin_unlock(&drvdata->spinlock);
331324
332325 return ret;
333326 }
@@ -408,7 +401,7 @@ static unsigned long smb_update_buffer(struct coresight_device *csdev, · 74 unmodified lines
408401 if (!buf)
409402 return 0;
410403
411− mutex_lock(&drvdata->mutex);
404+ spin_lock(&drvdata->spinlock);
412405
413406 /* Don't do anything if another tracer is using this sink. */
414407 if (atomic_read(&csdev->refcnt) != 1)
@@ -432,7 +425,7 @@ static unsigned long smb_update_buffer(struct coresight_device *csdev, · 17 unmodified lines
432425 if (!buf->snapshot && lost)
433426 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
434427 out:
435− mutex_unlock(&drvdata->mutex);
428+ spin_unlock(&drvdata->spinlock);
436429
437430 return data_size;
438431 }
@@ -484,7 +477,6 @@ static int smb_init_data_buffer(struct platform_device *pdev, · 45 unmodified lines
484477 static void smb_init_hw(struct smb_drv_data *drvdata)
485478 {
486479 smb_disable_hw(drvdata);
487− smb_reset_buffer(drvdata);
488480
489481 writel(SMB_LB_CFG_LO_DEFAULT, drvdata->base + SMB_LB_CFG_LO_REG);
490482 writel(SMB_LB_CFG_HI_DEFAULT, drvdata->base + SMB_LB_CFG_HI_REG);
@@ -590,37 +582,33 @@ static int smb_probe(struct platform_device *pdev) · 99 unmodified lines
590582 return ret;
591583 }
592584
593− mutex_init(&drvdata->mutex);
585+ ret = smb_config_inport(dev, true);
586+ if (ret)
587+ return ret;
588+
589+ smb_reset_buffer(drvdata);
590+ platform_set_drvdata(pdev, drvdata);
591+ spin_lock_init(&drvdata->spinlock);
594592 drvdata->pid = -1;
595593
596594 ret = smb_register_sink(pdev, drvdata);
597595 if (ret) {
596+ smb_config_inport(&pdev->dev, false);
598597 dev_err(dev, "Failed to register SMB sink\n");
599598 return ret;
600599 }
601600
602− ret = smb_config_inport(dev, true);
603− if (ret) {
604− smb_unregister_sink(drvdata);
605− return ret;
606− }
607−
608− platform_set_drvdata(pdev, drvdata);
609−
610601 return 0;
611602 }
612603
613604 static int smb_remove(struct platform_device *pdev)
614605 {
615606 struct smb_drv_data *drvdata = platform_get_drvdata(pdev);
616− int ret;
617−
618− ret = smb_config_inport(&pdev->dev, false);
619− if (ret)
620− return ret;
621607
622608 smb_unregister_sink(drvdata);
623609
610+ smb_config_inport(&pdev->dev, false);
611+
624612 return 0;
625613 }
626614
drivers/hwtracing/coresight/ultrasoc-smb.h+3−3
@@ -8,7 +8,7 @@ · 7 unmodified lines
88 #define _ULTRASOC_SMB_H
99
1010 #include <linux/miscdevice.h>
11−#include <linux/mutex.h>
11+#include <linux/spinlock.h>
1212
1313 /* Offset of SMB global registers */
1414 #define SMB_GLB_CFG_REG 0x00
@@ -105,7 +105,7 @@ struct smb_data_buffer { · 90 unmodified lines
105105 * @csdev: Component vitals needed by the framework.
106106 * @sdb: Data buffer for SMB.
107107 * @miscdev: Specifics to handle "/dev/xyz.smb" entry.
108− * @mutex: Control data access to one at a time.
108+ * @spinlock: Control data access to one at a time.
109109 * @reading: Synchronise user space access to SMB buffer.
110110 * @pid: Process ID of the process being monitored by the
111111 * session that is using this component.
@@ -116,7 +116,7 @@ struct smb_drv_data { · 4 unmodified lines
116116 struct coresight_device *csdev;
117117 struct smb_data_buffer sdb;
118118 struct miscdevice miscdev;
119− struct mutex mutex;
119+ spinlock_t spinlock;
120120 bool reading;
121121 pid_t pid;
122122 enum cs_mode mode;
drivers/hwtracing/ptt/hisi_ptt.c+11−3
@@ -342,9 +342,9 @@ static int hisi_ptt_register_irq(struct hisi_ptt *hisi_ptt) · 341 unmodified lines
342342 return ret;
343343
344344 hisi_ptt->trace_irq = pci_irq_vector(pdev, HISI_PTT_TRACE_DMA_IRQ);
345− ret = devm_request_threaded_irq(&pdev->dev, hisi_ptt->trace_irq,
346− NULL, hisi_ptt_isr, 0,
347− DRV_NAME, hisi_ptt);
345+ ret = devm_request_irq(&pdev->dev, hisi_ptt->trace_irq, hisi_ptt_isr,
346+ IRQF_NOBALANCING | IRQF_NO_THREAD, DRV_NAME,
347+ hisi_ptt);
348348 if (ret) {
349349 pci_err(pdev, "failed to request irq %d, ret = %d\n",
350350 hisi_ptt->trace_irq, ret);
@@ -1000,6 +1000,9 @@ static int hisi_ptt_pmu_event_init(struct perf_event *event) · 649 unmodified lines
10001000 return -EOPNOTSUPP;
10011001 }
10021002
1003+ if (event->attach_state & PERF_ATTACH_TASK)
1004+ return -EOPNOTSUPP;
1005+
10031006 if (event->attr.type != hisi_ptt->hisi_ptt_pmu.type)
10041007 return -ENOENT;
10051008
@@ -1178,6 +1181,10 @@ static void hisi_ptt_pmu_del(struct perf_event *event, int flags) · 172 unmodified lines
11781181 hisi_ptt_pmu_stop(event, PERF_EF_UPDATE);
11791182 }
11801183
1184+static void hisi_ptt_pmu_read(struct perf_event *event)
1185+{
1186+}
1187+
11811188 static void hisi_ptt_remove_cpuhp_instance(void *hotplug_node)
11821189 {
11831190 cpuhp_state_remove_instance_nocalls(hisi_ptt_pmu_online, hotplug_node);
@@ -1221,6 +1228,7 @@ static int hisi_ptt_register_pmu(struct hisi_ptt *hisi_ptt) · 37 unmodified lines
12211228 .stop = hisi_ptt_pmu_stop,
12221229 .add = hisi_ptt_pmu_add,
12231230 .del = hisi_ptt_pmu_del,
1231+ .read = hisi_ptt_pmu_read,
12241232 };
12251233
12261234 reg = readl(hisi_ptt->iobase + HISI_PTT_LOCATION);
drivers/i2c/busses/i2c-designware-common.c+8−8
@@ -63,7 +63,7 @@ static int dw_reg_read(void *context, unsigned int reg, unsigned int *val) · 62 unmodified lines
6363 {
6464 struct dw_i2c_dev *dev = context;
6565
66− *val = readl_relaxed(dev->base + reg);
66+ *val = readl(dev->base + reg);
6767
6868 return 0;
6969 }
@@ -72,7 +72,7 @@ static int dw_reg_write(void *context, unsigned int reg, unsigned int val) · 2 unmodified lines
7272 {
7373 struct dw_i2c_dev *dev = context;
7474
75− writel_relaxed(val, dev->base + reg);
75+ writel(val, dev->base + reg);
7676
7777 return 0;
7878 }
@@ -81,7 +81,7 @@ static int dw_reg_read_swab(void *context, unsigned int reg, unsigned int *val) · 2 unmodified lines
8181 {
8282 struct dw_i2c_dev *dev = context;
8383
84− *val = swab32(readl_relaxed(dev->base + reg));
84+ *val = swab32(readl(dev->base + reg));
8585
8686 return 0;
8787 }
@@ -90,7 +90,7 @@ static int dw_reg_write_swab(void *context, unsigned int reg, unsigned int val) · 2 unmodified lines
9090 {
9191 struct dw_i2c_dev *dev = context;
9292
93− writel_relaxed(swab32(val), dev->base + reg);
93+ writel(swab32(val), dev->base + reg);
9494
9595 return 0;
9696 }
@@ -99,8 +99,8 @@ static int dw_reg_read_word(void *context, unsigned int reg, unsigned int *val) · 2 unmodified lines
9999 {
100100 struct dw_i2c_dev *dev = context;
101101
102− *val = readw_relaxed(dev->base + reg) |
103− (readw_relaxed(dev->base + reg + 2) << 16);
102+ *val = readw(dev->base + reg) |
103+ (readw(dev->base + reg + 2) << 16);
104104
105105 return 0;
106106 }
@@ -109,8 +109,8 @@ static int dw_reg_write_word(void *context, unsigned int reg, unsigned int val) · 2 unmodified lines
109109 {
110110 struct dw_i2c_dev *dev = context;
111111
112− writew_relaxed(val, dev->base + reg);
113− writew_relaxed(val >> 16, dev->base + reg + 2);
112+ writew(val, dev->base + reg);
113+ writew(val >> 16, dev->base + reg + 2);
114114
115115 return 0;
116116 }
drivers/i2c/busses/i2c-ocores.c+2−2
@@ -771,8 +771,8 @@ static int ocores_i2c_resume(struct device *dev) · 770 unmodified lines
771771 return ocores_init(dev, i2c);
772772 }
773773
774−static DEFINE_SIMPLE_DEV_PM_OPS(ocores_i2c_pm,
775− ocores_i2c_suspend, ocores_i2c_resume);
774+static DEFINE_NOIRQ_DEV_PM_OPS(ocores_i2c_pm,
775+ ocores_i2c_suspend, ocores_i2c_resume);
776776
777777 static struct platform_driver ocores_i2c_driver = {
778778 .probe = ocores_i2c_probe,
drivers/i2c/busses/i2c-pxa.c+68−8
@@ -265,6 +265,9 @@ struct pxa_i2c { · 264 unmodified lines
265265 u32 hs_mask;
266266
267267 struct i2c_bus_recovery_info recovery;
268+ struct pinctrl *pinctrl;
269+ struct pinctrl_state *pinctrl_default;
270+ struct pinctrl_state *pinctrl_recovery;
268271 };
269272
270273 #define _IBMR(i2c) ((i2c)->reg_ibmr)
@@ -1299,12 +1302,13 @@ static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap) · 1028 unmodified lines
12991302 */
13001303 gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
13011304 gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
1305+
1306+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
13021307 }
13031308
13041309 static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
13051310 {
13061311 struct pxa_i2c *i2c = adap->algo_data;
1307− struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
13081312 u32 isr;
13091313
13101314 /*
@@ -1318,7 +1322,7 @@ static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap) · 7 unmodified lines
13181322 i2c_pxa_do_reset(i2c);
13191323 }
13201324
1321− WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default));
1325+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
13221326
13231327 dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
13241328 readl(_IBMR(i2c)), readl(_ISR(i2c)));
@@ -1340,20 +1344,76 @@ static int i2c_pxa_init_recovery(struct pxa_i2c *i2c) · 15 unmodified lines
13401344 if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
13411345 return 0;
13421346
1343− bri->pinctrl = devm_pinctrl_get(dev);
1344− if (PTR_ERR(bri->pinctrl) == -ENODEV) {
1345− bri->pinctrl = NULL;
1347+ i2c->pinctrl = devm_pinctrl_get(dev);
1348+ if (PTR_ERR(i2c->pinctrl) == -ENODEV)
1349+ i2c->pinctrl = NULL;
1350+ if (IS_ERR(i2c->pinctrl))
1351+ return PTR_ERR(i2c->pinctrl);
1352+
1353+ if (!i2c->pinctrl)
1354+ return 0;
1355+
1356+ i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
1357+ PINCTRL_STATE_DEFAULT);
1358+ i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
1359+
1360+ if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
1361+ dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
1362+ PTR_ERR(i2c->pinctrl_default),
1363+ PTR_ERR(i2c->pinctrl_recovery));
1364+ return 0;
1365+ }
1366+
1367+ /*
1368+ * Claiming GPIOs can influence the pinmux state, and may glitch the
1369+ * I2C bus. Do this carefully.
1370+ */
1371+ bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
1372+ if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
1373+ return -EPROBE_DEFER;
1374+ if (IS_ERR(bri->scl_gpiod)) {
1375+ dev_info(dev, "missing scl gpio recovery information: %pe\n",
1376+ bri->scl_gpiod);
1377+ return 0;
1378+ }
1379+
1380+ /*
1381+ * We have SCL. Pull SCL low and wait a bit so that SDA glitches
1382+ * have no effect.
1383+ */
1384+ gpiod_direction_output(bri->scl_gpiod, 0);
1385+ udelay(10);
1386+ bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
1387+
1388+ /* Wait a bit in case of a SDA glitch, and then release SCL. */
1389+ udelay(10);
1390+ gpiod_direction_output(bri->scl_gpiod, 1);
1391+
1392+ if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
1393+ return -EPROBE_DEFER;
1394+
1395+ if (IS_ERR(bri->sda_gpiod)) {
1396+ dev_info(dev, "missing sda gpio recovery information: %pe\n",
1397+ bri->sda_gpiod);
13461398 return 0;
13471399 }
1348− if (IS_ERR(bri->pinctrl))
1349− return PTR_ERR(bri->pinctrl);
13501400
13511401 bri->prepare_recovery = i2c_pxa_prepare_recovery;
13521402 bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
1403+ bri->recover_bus = i2c_generic_scl_recovery;
13531404
13541405 i2c->adap.bus_recovery_info = bri;
13551406
1356− return 0;
1407+ /*
1408+ * Claiming GPIOs can change the pinmux state, which confuses the
1409+ * pinctrl since pinctrl's idea of the current setting is unaffected
1410+ * by the pinmux change caused by claiming the GPIO. Work around that
1411+ * by switching pinctrl to the GPIO state here. We do it this way to
1412+ * avoid glitching the I2C bus.
1413+ */
1414+ pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
1415+
1416+ return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
13571417 }
13581418
13591419 static int i2c_pxa_probe(struct platform_device *dev)
drivers/infiniband/core/umem.c+0−6
@@ -96,12 +96,6 @@ unsigned long ib_umem_find_best_pgsz(struct ib_umem *umem, · 95 unmodified lines
9696 return page_size;
9797 }
9898
99− /* rdma_for_each_block() has a bug if the page size is smaller than the
100− * page size used to build the umem. For now prevent smaller page sizes
101− * from being returned.
102− */
103− pgsz_bitmap &= GENMASK(BITS_PER_LONG - 1, PAGE_SHIFT);
104−
10599 /* The best result is the smallest page size that results in the minimum
106100 * number of required pages. Compute the largest page size that could
107101 * work based on VA address bits that don't change.
drivers/infiniband/core/verbs.c+1−1
@@ -1971,7 +1971,7 @@ int ib_get_eth_speed(struct ib_device *dev, u32 port_num, u16 *speed, u8 *width) · 1970 unmodified lines
19711971 int rc;
19721972 u32 netdev_speed;
19731973 struct net_device *netdev;
1974− struct ethtool_link_ksettings lksettings;
1974+ struct ethtool_link_ksettings lksettings = {};
19751975
19761976 if (rdma_port_get_link_layer(dev, port_num) != IB_LINK_LAYER_ETHERNET)
19771977 return -EINVAL;
drivers/infiniband/hw/bnxt_re/main.c+1−1
@@ -71,7 +71,7 @@ static char version[] = · 70 unmodified lines
7171 BNXT_RE_DESC "\n";
7272
7373 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>");
74−MODULE_DESCRIPTION(BNXT_RE_DESC " Driver");
74+MODULE_DESCRIPTION(BNXT_RE_DESC);
7575 MODULE_LICENSE("Dual BSD/GPL");
7676
7777 /* globals */
drivers/infiniband/hw/hns/hns_roce_hw_v2.c+9−4
@@ -4776,10 +4776,15 @@ static int check_cong_type(struct ib_qp *ibqp, · 4775 unmodified lines
47764776 cong_alg->wnd_mode_sel = WND_LIMIT;
47774777 break;
47784778 default:
4779− ibdev_err(&hr_dev->ib_dev,
4780− "error type(%u) for congestion selection.\n",
4781− hr_dev->caps.cong_type);
4782− return -EINVAL;
4779+ ibdev_warn(&hr_dev->ib_dev,
4780+ "invalid type(%u) for congestion selection.\n",
4781+ hr_dev->caps.cong_type);
4782+ hr_dev->caps.cong_type = CONG_TYPE_DCQCN;
4783+ cong_alg->alg_sel = CONG_DCQCN;
4784+ cong_alg->alg_sub_sel = UNSUPPORT_CONG_LEVEL;
4785+ cong_alg->dip_vld = DIP_INVALID;
4786+ cong_alg->wnd_mode_sel = WND_LIMIT;
4787+ break;
47834788 }
47844789
47854790 return 0;
drivers/infiniband/hw/irdma/hw.c+9−7
@@ -321,7 +321,11 @@ static void irdma_process_aeq(struct irdma_pci_f *rf) · 320 unmodified lines
321321 break;
322322 case IRDMA_AE_QP_SUSPEND_COMPLETE:
323323 if (iwqp->iwdev->vsi.tc_change_pending) {
324− atomic_dec(&iwqp->sc_qp.vsi->qp_suspend_reqs);
324+ if (!atomic_dec_return(&qp->vsi->qp_suspend_reqs))
325+ wake_up(&iwqp->iwdev->suspend_wq);
326+ }
327+ if (iwqp->suspend_pending) {
328+ iwqp->suspend_pending = false;
325329 wake_up(&iwqp->iwdev->suspend_wq);
326330 }
327331 break;
@@ -581,9 +585,6 @@ static void irdma_destroy_cqp(struct irdma_pci_f *rf) · 253 unmodified lines
581585 struct irdma_cqp *cqp = &rf->cqp;
582586 int status = 0;
583587
584− if (rf->cqp_cmpl_wq)
585− destroy_workqueue(rf->cqp_cmpl_wq);
586−
587588 status = irdma_sc_cqp_destroy(dev->cqp);
588589 if (status)
589590 ibdev_dbg(to_ibdev(dev), "ERR: Destroy CQP failed %d\n", status);
@@ -748,6 +749,9 @@ static void irdma_destroy_ccq(struct irdma_pci_f *rf) · 158 unmodified lines
748749 struct irdma_ccq *ccq = &rf->ccq;
749750 int status = 0;
750751
752+ if (rf->cqp_cmpl_wq)
753+ destroy_workqueue(rf->cqp_cmpl_wq);
754+
751755 if (!rf->reset)
752756 status = irdma_sc_ccq_destroy(dev->ccq, 0, true);
753757 if (status)
@@ -1180,7 +1184,6 @@ static int irdma_create_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq, · 426 unmodified lines
11801184 int status;
11811185 struct irdma_ceq_init_info info = {};
11821186 struct irdma_sc_dev *dev = &rf->sc_dev;
1183− u64 scratch;
11841187 u32 ceq_size;
11851188
11861189 info.ceq_id = ceq_id;
@@ -1201,14 +1204,13 @@ static int irdma_create_ceq(struct irdma_pci_f *rf, struct irdma_ceq *iwceq, · 14 unmodified lines
12011204 iwceq->sc_ceq.ceq_id = ceq_id;
12021205 info.dev = dev;
12031206 info.vsi = vsi;
1204− scratch = (uintptr_t)&rf->cqp.sc_cqp;
12051207 status = irdma_sc_ceq_init(&iwceq->sc_ceq, &info);
12061208 if (!status) {
12071209 if (dev->ceq_valid)
12081210 status = irdma_cqp_ceq_cmd(&rf->sc_dev, &iwceq->sc_ceq,
12091211 IRDMA_OP_CEQ_CREATE);
12101212 else
1211− status = irdma_sc_cceq_create(&iwceq->sc_ceq, scratch);
1213+ status = irdma_sc_cceq_create(&iwceq->sc_ceq, 0);
12121214 }
12131215
12141216 if (status) {
drivers/infiniband/hw/irdma/main.c+1−1
@@ -48,7 +48,7 @@ static void irdma_prep_tc_change(struct irdma_device *iwdev) · 47 unmodified lines
4848 /* Wait for all qp's to suspend */
4949 wait_event_timeout(iwdev->suspend_wq,
5050 !atomic_read(&iwdev->vsi.qp_suspend_reqs),
51− IRDMA_EVENT_TIMEOUT);
51+ msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS));
5252 irdma_ws_reset(&iwdev->vsi);
5353 }
5454
drivers/infiniband/hw/irdma/main.h+1−1
@@ -78,7 +78,7 @@ extern struct auxiliary_driver i40iw_auxiliary_drv; · 77 unmodified lines
7878
7979 #define MAX_DPC_ITERATIONS 128
8080
81−#define IRDMA_EVENT_TIMEOUT 50000
81+#define IRDMA_EVENT_TIMEOUT_MS 5000
8282 #define IRDMA_VCHNL_EVENT_TIMEOUT 100000
8383 #define IRDMA_RST_TIMEOUT_HZ 4
8484
drivers/infiniband/hw/irdma/verbs.c+27−8
@@ -1157,6 +1157,21 @@ exit: · 1156 unmodified lines
11571157 return prio;
11581158 }
11591159
1160+static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1161+{
1162+ if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1163+ !iwqp->suspend_pending,
1164+ msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1165+ iwqp->suspend_pending = false;
1166+ ibdev_warn(&iwqp->iwdev->ibdev,
1167+ "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1168+ iwqp->ibqp.qp_num, iwqp->last_aeq);
1169+ return -EBUSY;
1170+ }
1171+
1172+ return 0;
1173+}
1174+
11601175 /**
11611176 * irdma_modify_qp_roce - modify qp request
11621177 * @ibqp: qp's pointer for modify
@@ -1420,17 +1435,11 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 257 unmodified lines
14201435
14211436 info.next_iwarp_state = IRDMA_QP_STATE_SQD;
14221437 issue_modify_qp = 1;
1438+ iwqp->suspend_pending = true;
14231439 break;
14241440 case IB_QPS_SQE:
14251441 case IB_QPS_ERR:
14261442 case IB_QPS_RESET:
1427− if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS) {
1428− spin_unlock_irqrestore(&iwqp->lock, flags);
1429− info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1430− irdma_hw_modify_qp(iwdev, iwqp, &info, true);
1431− spin_lock_irqsave(&iwqp->lock, flags);
1432− }
1433−
14341443 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
14351444 spin_unlock_irqrestore(&iwqp->lock, flags);
14361445 if (udata && udata->inlen) {
@@ -1467,6 +1476,11 @@ int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 30 unmodified lines
14671476 ctx_info->rem_endpoint_idx = udp_info->arp_idx;
14681477 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
14691478 return -EINVAL;
1479+ if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1480+ ret = irdma_wait_for_suspend(iwqp);
1481+ if (ret)
1482+ return ret;
1483+ }
14701484 spin_lock_irqsave(&iwqp->lock, flags);
14711485 if (iwqp->iwarp_state == info.curr_iwarp_state) {
14721486 iwqp->iwarp_state = info.next_iwarp_state;
@@ -2900,7 +2914,7 @@ static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region, · 1427 unmodified lines
29002914 iwmr->type = reg_type;
29012915
29022916 pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ?
2903− iwdev->rf->sc_dev.hw_attrs.page_size_cap : PAGE_SIZE;
2917+ iwdev->rf->sc_dev.hw_attrs.page_size_cap : SZ_4K;
29042918
29052919 iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt);
29062920 if (unlikely(!iwmr->page_size)) {
@@ -2932,6 +2946,11 @@ static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req, · 25 unmodified lines
29322946 int err;
29332947 u8 lvl;
29342948
2949+ /* iWarp: Catch page not starting on OS page boundary */
2950+ if (!rdma_protocol_roce(&iwdev->ibdev, 1) &&
2951+ ib_umem_offset(iwmr->region))
2952+ return -EINVAL;
2953+
29352954 total = req.sq_pages + req.rq_pages + 1;
29362955 if (total > iwmr->page_cnt)
29372956 return -EINVAL;
drivers/infiniband/hw/irdma/verbs.h+1−0
@@ -198,6 +198,7 @@ struct irdma_qp { · 197 unmodified lines
198198 u8 flush_issued : 1;
199199 u8 sig_all : 1;
200200 u8 pau_mode : 1;
201+ u8 suspend_pending : 1;
201202 u8 rsvd : 1;
202203 u8 iwarp_state;
203204 u16 term_sq_flush_code;
drivers/infiniband/hw/mlx5/dm.c+5−0
@@ -341,6 +341,8 @@ static enum mlx5_sw_icm_type get_icm_type(int uapi_type) · 340 unmodified lines
341341 return MLX5_SW_ICM_TYPE_HEADER_MODIFY;
342342 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
343343 return MLX5_SW_ICM_TYPE_HEADER_MODIFY_PATTERN;
344+ case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
345+ return MLX5_SW_ICM_TYPE_SW_ENCAP;
344346 case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
345347 default:
346348 return MLX5_SW_ICM_TYPE_STEERING;
@@ -364,6 +366,7 @@ static struct ib_dm *handle_alloc_dm_sw_icm(struct ib_ucontext *ctx, · 17 unmodified lines
364366 switch (type) {
365367 case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
366368 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
369+ case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
367370 if (!(MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner) ||
368371 MLX5_CAP_FLOWTABLE_NIC_TX(dev, sw_owner) ||
369372 MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner_v2) ||
@@ -438,6 +441,7 @@ struct ib_dm *mlx5_ib_alloc_dm(struct ib_device *ibdev, · 68 unmodified lines
438441 case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
439442 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
440443 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
444+ case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
441445 return handle_alloc_dm_sw_icm(context, attr, attrs, type);
442446 default:
443447 return ERR_PTR(-EOPNOTSUPP);
@@ -491,6 +495,7 @@ static int mlx5_ib_dealloc_dm(struct ib_dm *ibdm, · 47 unmodified lines
491495 case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
492496 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
493497 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
498+ case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
494499 return mlx5_dm_icm_dealloc(ctx, to_icm(ibdm));
495500 default:
496501 return -EOPNOTSUPP;
drivers/infiniband/hw/mlx5/main.c+24−0
@@ -818,6 +818,17 @@ static int mlx5_query_node_desc(struct mlx5_ib_dev *dev, char *node_desc) · 817 unmodified lines
818818 MLX5_REG_NODE_DESC, 0, 0);
819819 }
820820
821+static void fill_esw_mgr_reg_c0(struct mlx5_core_dev *mdev,
822+ struct mlx5_ib_query_device_resp *resp)
823+{
824+ struct mlx5_eswitch *esw = mdev->priv.eswitch;
825+ u16 vport = mlx5_eswitch_manager_vport(mdev);
826+
827+ resp->reg_c0.value = mlx5_eswitch_get_vport_metadata_for_match(esw,
828+ vport);
829+ resp->reg_c0.mask = mlx5_eswitch_get_vport_metadata_mask();
830+}
831+
821832 static int mlx5_ib_query_device(struct ib_device *ibdev,
822833 struct ib_device_attr *props,
823834 struct ib_udata *uhw)
@@ -1209,6 +1220,19 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, · 385 unmodified lines
12091220 MLX5_CAP_GEN(mdev, log_max_dci_errored_streams);
12101221 }
12111222
1223+ if (offsetofend(typeof(resp), reserved) <= uhw_outlen)
1224+ resp.response_length += sizeof(resp.reserved);
1225+
1226+ if (offsetofend(typeof(resp), reg_c0) <= uhw_outlen) {
1227+ struct mlx5_eswitch *esw = mdev->priv.eswitch;
1228+
1229+ resp.response_length += sizeof(resp.reg_c0);
1230+
1231+ if (mlx5_eswitch_mode(mdev) == MLX5_ESWITCH_OFFLOADS &&
1232+ mlx5_eswitch_vport_match_metadata_enabled(esw))
1233+ fill_esw_mgr_reg_c0(mdev, &resp);
1234+ }
1235+
12121236 if (uhw_outlen) {
12131237 err = ib_copy_to_udata(uhw, &resp, resp.response_length);
12141238
drivers/infiniband/hw/mlx5/mr.c+1−0
@@ -1347,6 +1347,7 @@ struct ib_mr *mlx5_ib_reg_dm_mr(struct ib_pd *pd, struct ib_dm *dm, · 1346 unmodified lines
13471347 case MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM:
13481348 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM:
13491349 case MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM:
1350+ case MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM:
13501351 if (attr->access_flags & ~MLX5_IB_DM_SW_ICM_ALLOWED_ACCESS)
13511352 return ERR_PTR(-EINVAL);
13521353
drivers/infiniband/ulp/rtrs/rtrs-clt.c+3−4
@@ -384,7 +384,7 @@ static void complete_rdma_req(struct rtrs_clt_io_req *req, int errno, · 383 unmodified lines
384384 struct rtrs_clt_path *clt_path;
385385 int err;
386386
387− if (WARN_ON(!req->in_use))
387+ if (!req->in_use)
388388 return;
389389 if (WARN_ON(!req->con))
390390 return;
@@ -1699,7 +1699,7 @@ static int create_con_cq_qp(struct rtrs_clt_con *con) · 1308 unmodified lines
16991699 clt_path->s.dev_ref++;
17001700 max_send_wr = min_t(int, wr_limit,
17011701 /* QD * (REQ + RSP + FR REGS or INVS) + drain */
1702− clt_path->queue_depth * 3 + 1);
1702+ clt_path->queue_depth * 4 + 1);
17031703 max_recv_wr = min_t(int, wr_limit,
17041704 clt_path->queue_depth * 3 + 1);
17051705 max_send_sge = 2;
@@ -2350,8 +2350,6 @@ static int init_conns(struct rtrs_clt_path *clt_path) · 644 unmodified lines
23502350 if (err)
23512351 goto destroy;
23522352
2353− rtrs_start_hb(&clt_path->s);
2354−
23552353 return 0;
23562354
23572355 destroy:
@@ -2625,6 +2623,7 @@ static int init_path(struct rtrs_clt_path *clt_path) · 267 unmodified lines
26252623 goto out;
26262624 }
26272625 rtrs_clt_path_up(clt_path);
2626+ rtrs_start_hb(&clt_path->s);
26282627 out:
26292628 mutex_unlock(&clt_path->init_mutex);
26302629
drivers/infiniband/ulp/rtrs/rtrs-srv.c+27−10
@@ -65,8 +65,9 @@ static bool rtrs_srv_change_state(struct rtrs_srv_path *srv_path, · 64 unmodified lines
6565 {
6666 enum rtrs_srv_state old_state;
6767 bool changed = false;
68+ unsigned long flags;
6869
69− spin_lock_irq(&srv_path->state_lock);
70+ spin_lock_irqsave(&srv_path->state_lock, flags);
7071 old_state = srv_path->state;
7172 switch (new_state) {
7273 case RTRS_SRV_CONNECTED:
@@ -87,7 +88,7 @@ static bool rtrs_srv_change_state(struct rtrs_srv_path *srv_path, · 14 unmodified lines
8788 }
8889 if (changed)
8990 srv_path->state = new_state;
90− spin_unlock_irq(&srv_path->state_lock);
91+ spin_unlock_irqrestore(&srv_path->state_lock, flags);
9192
9293 return changed;
9394 }
@@ -550,7 +551,10 @@ static void unmap_cont_bufs(struct rtrs_srv_path *srv_path) · 456 unmodified lines
550551 struct rtrs_srv_mr *srv_mr;
551552
552553 srv_mr = &srv_path->mrs[i];
553− rtrs_iu_free(srv_mr->iu, srv_path->s.dev->ib_dev, 1);
554+
555+ if (always_invalidate)
556+ rtrs_iu_free(srv_mr->iu, srv_path->s.dev->ib_dev, 1);
557+
554558 ib_dereg_mr(srv_mr->mr);
555559 ib_dma_unmap_sg(srv_path->s.dev->ib_dev, srv_mr->sgt.sgl,
556560 srv_mr->sgt.nents, DMA_BIDIRECTIONAL);
@@ -709,20 +713,23 @@ static void rtrs_srv_info_rsp_done(struct ib_cq *cq, struct ib_wc *wc) · 152 unmodified lines
709713 WARN_ON(wc->opcode != IB_WC_SEND);
710714 }
711715
712−static void rtrs_srv_path_up(struct rtrs_srv_path *srv_path)
716+static int rtrs_srv_path_up(struct rtrs_srv_path *srv_path)
713717 {
714718 struct rtrs_srv_sess *srv = srv_path->srv;
715719 struct rtrs_srv_ctx *ctx = srv->ctx;
716− int up;
720+ int up, ret = 0;
717721
718722 mutex_lock(&srv->paths_ev_mutex);
719723 up = ++srv->paths_up;
720724 if (up == 1)
721− ctx->ops.link_ev(srv, RTRS_SRV_LINK_EV_CONNECTED, NULL);
725+ ret = ctx->ops.link_ev(srv, RTRS_SRV_LINK_EV_CONNECTED, NULL);
722726 mutex_unlock(&srv->paths_ev_mutex);
723727
724728 /* Mark session as established */
725− srv_path->established = true;
729+ if (!ret)
730+ srv_path->established = true;
731+
732+ return ret;
726733 }
727734
728735 static void rtrs_srv_path_down(struct rtrs_srv_path *srv_path)
@@ -851,7 +858,12 @@ static int process_info_req(struct rtrs_srv_con *con, · 122 unmodified lines
851858 goto iu_free;
852859 kobject_get(&srv_path->kobj);
853860 get_device(&srv_path->srv->dev);
854− rtrs_srv_change_state(srv_path, RTRS_SRV_CONNECTED);
861+ err = rtrs_srv_change_state(srv_path, RTRS_SRV_CONNECTED);
862+ if (!err) {
863+ rtrs_err(s, "rtrs_srv_change_state(), err: %d\n", err);
864+ goto iu_free;
865+ }
866+
855867 rtrs_srv_start_hb(srv_path);
856868
857869 /*
@@ -860,7 +872,11 @@ static int process_info_req(struct rtrs_srv_con *con, · 2 unmodified lines
860872 * all connections are successfully established. Thus, simply notify
861873 * listener with a proper event if we are the first path.
862874 */
863− rtrs_srv_path_up(srv_path);
875+ err = rtrs_srv_path_up(srv_path);
876+ if (err) {
877+ rtrs_err(s, "rtrs_srv_path_up(), err: %d\n", err);
878+ goto iu_free;
879+ }
864880
865881 ib_dma_sync_single_for_device(srv_path->s.dev->ib_dev,
866882 tx_iu->dma_addr,
@@ -1516,7 +1532,6 @@ static void rtrs_srv_close_work(struct work_struct *work) · 649 unmodified lines
15161532
15171533 srv_path = container_of(work, typeof(*srv_path), close_work);
15181534
1519− rtrs_srv_destroy_path_files(srv_path);
15201535 rtrs_srv_stop_hb(srv_path);
15211536
15221537 for (i = 0; i < srv_path->s.con_num; i++) {
@@ -1536,6 +1551,8 @@ static void rtrs_srv_close_work(struct work_struct *work) · 13 unmodified lines
15361551 /* Wait for all completion */
15371552 wait_for_completion(&srv_path->complete_done);
15381553
1554+ rtrs_srv_destroy_path_files(srv_path);
1555+
15391556 /* Notify upper layer if we are the last path */
15401557 rtrs_srv_path_down(srv_path);
15411558
drivers/iommu/intel/dmar.c+18−0
@@ -1522,6 +1522,15 @@ void qi_flush_dev_iotlb(struct intel_iommu *iommu, u16 sid, u16 pfsid, · 1521 unmodified lines
15221522 {
15231523 struct qi_desc desc;
15241524
1525+ /*
1526+ * VT-d spec, section 4.3:
1527+ *
1528+ * Software is recommended to not submit any Device-TLB invalidation
1529+ * requests while address remapping hardware is disabled.
1530+ */
1531+ if (!(iommu->gcmd & DMA_GCMD_TE))
1532+ return;
1533+
15251534 if (mask) {
15261535 addr |= (1ULL << (VTD_PAGE_SHIFT + mask - 1)) - 1;
15271536 desc.qw1 = QI_DEV_IOTLB_ADDR(addr) | QI_DEV_IOTLB_SIZE;
@@ -1587,6 +1596,15 @@ void qi_flush_dev_iotlb_pasid(struct intel_iommu *iommu, u16 sid, u16 pfsid, · 59 unmodified lines
15871596 unsigned long mask = 1UL << (VTD_PAGE_SHIFT + size_order - 1);
15881597 struct qi_desc desc = {.qw1 = 0, .qw2 = 0, .qw3 = 0};
15891598
1599+ /*
1600+ * VT-d spec, section 4.3:
1601+ *
1602+ * Software is recommended to not submit any Device-TLB invalidation
1603+ * requests while address remapping hardware is disabled.
1604+ */
1605+ if (!(iommu->gcmd & DMA_GCMD_TE))
1606+ return;
1607+
15901608 desc.qw0 = QI_DEV_EIOTLB_PASID(pasid) | QI_DEV_EIOTLB_SID(sid) |
15911609 QI_DEV_EIOTLB_QDEP(qdep) | QI_DEIOTLB_TYPE |
15921610 QI_DEV_IOTLB_PFSID(pfsid);
drivers/iommu/intel/iommu.c+11−7
@@ -299,7 +299,7 @@ static int iommu_skip_te_disable; · 298 unmodified lines
299299 #define IDENTMAP_AZALIA 4
300300
301301 const struct iommu_ops intel_iommu_ops;
302−const struct iommu_dirty_ops intel_dirty_ops;
302+static const struct iommu_dirty_ops intel_dirty_ops;
303303
304304 static bool translation_pre_enabled(struct intel_iommu *iommu)
305305 {
@@ -2207,6 +2207,8 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, · 1901 unmodified lines
22072207 attr |= DMA_FL_PTE_DIRTY;
22082208 }
22092209
2210+ domain->has_mappings = true;
2211+
22102212 pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | attr;
22112213
22122214 while (nr_pages > 0) {
@@ -2490,7 +2492,8 @@ static int dmar_domain_attach_device(struct dmar_domain *domain, · 277 unmodified lines
24902492 return ret;
24912493 }
24922494
2493− iommu_enable_pci_caps(info);
2495+ if (sm_supported(info->iommu) || !domain_type_is_si(info->domain))
2496+ iommu_enable_pci_caps(info);
24942497
24952498 return 0;
24962499 }
@@ -3925,8 +3928,8 @@ static int domain_context_clear_one_cb(struct pci_dev *pdev, u16 alias, void *op · 1428 unmodified lines
39253928 */
39263929 static void domain_context_clear(struct device_domain_info *info)
39273930 {
3928− if (!info->iommu || !info->dev || !dev_is_pci(info->dev))
3929− return;
3931+ if (!dev_is_pci(info->dev))
3932+ domain_context_clear_one(info, info->bus, info->devfn);
39303933
39313934 pci_for_each_dma_alias(to_pci_dev(info->dev),
39323935 &domain_context_clear_one_cb, info);
@@ -4360,7 +4363,8 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain) · 427 unmodified lines
43604363 return true;
43614364
43624365 spin_lock_irqsave(&dmar_domain->lock, flags);
4363− if (!domain_support_force_snooping(dmar_domain)) {
4366+ if (!domain_support_force_snooping(dmar_domain) ||
4367+ (!dmar_domain->use_first_level && dmar_domain->has_mappings)) {
43644368 spin_unlock_irqrestore(&dmar_domain->lock, flags);
43654369 return false;
43664370 }
@@ -4925,7 +4929,7 @@ static int intel_iommu_read_and_clear_dirty(struct iommu_domain *domain, · 558 unmodified lines
49254929 return 0;
49264930 }
49274931
4928−const struct iommu_dirty_ops intel_dirty_ops = {
4932+static const struct iommu_dirty_ops intel_dirty_ops = {
49294933 .set_dirty_tracking = intel_iommu_set_dirty_tracking,
49304934 .read_and_clear_dirty = intel_iommu_read_and_clear_dirty,
49314935 };
@@ -5073,7 +5077,7 @@ static void quirk_igfx_skip_te_disable(struct pci_dev *dev) · 141 unmodified lines
50735077 ver = (dev->device >> 8) & 0xff;
50745078 if (ver != 0x45 && ver != 0x46 && ver != 0x4c &&
50755079 ver != 0x4e && ver != 0x8a && ver != 0x98 &&
5076− ver != 0x9a && ver != 0xa7)
5080+ ver != 0x9a && ver != 0xa7 && ver != 0x7d)
50775081 return;
50785082
50795083 if (risky_device(dev))
drivers/iommu/intel/iommu.h+3−0
@@ -602,6 +602,9 @@ struct dmar_domain { · 601 unmodified lines
602602 */
603603 u8 dirty_tracking:1; /* Dirty tracking is enabled */
604604 u8 nested_parent:1; /* Has other domains nested on it */
605+ u8 has_mappings:1; /* Has mappings configured through
606+ * iommu_map() interface.
607+ */
605608
606609 spinlock_t lock; /* Protect device tracking lists */
607610 struct list_head devices; /* all devices' list */
drivers/iommu/intel/svm.c+26−0
@@ -216,6 +216,27 @@ static void intel_flush_svm_range(struct intel_svm *svm, unsigned long address, · 215 unmodified lines
216216 rcu_read_unlock();
217217 }
218218
219+static void intel_flush_svm_all(struct intel_svm *svm)
220+{
221+ struct device_domain_info *info;
222+ struct intel_svm_dev *sdev;
223+
224+ rcu_read_lock();
225+ list_for_each_entry_rcu(sdev, &svm->devs, list) {
226+ info = dev_iommu_priv_get(sdev->dev);
227+
228+ qi_flush_piotlb(sdev->iommu, sdev->did, svm->pasid, 0, -1UL, 0);
229+ if (info->ats_enabled) {
230+ qi_flush_dev_iotlb_pasid(sdev->iommu, sdev->sid, info->pfsid,
231+ svm->pasid, sdev->qdep,
232+ 0, 64 - VTD_PAGE_SHIFT);
233+ quirk_extra_dev_tlb_flush(info, 0, 64 - VTD_PAGE_SHIFT,
234+ svm->pasid, sdev->qdep);
235+ }
236+ }
237+ rcu_read_unlock();
238+}
239+
219240 /* Pages have been freed at this point */
220241 static void intel_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn,
221242 struct mm_struct *mm,
@@ -223,6 +244,11 @@ static void intel_arch_invalidate_secondary_tlbs(struct mmu_notifier *mn, · 1 unmodified line
223244 {
224245 struct intel_svm *svm = container_of(mn, struct intel_svm, notifier);
225246
247+ if (start == 0 && end == -1UL) {
248+ intel_flush_svm_all(svm);
249+ return;
250+ }
251+
226252 intel_flush_svm_range(svm, start,
227253 (end - start + PAGE_SIZE - 1) >> VTD_PAGE_SHIFT, 0);
228254 }
drivers/iommu/iommu.c+49−30
@@ -485,11 +485,12 @@ static void iommu_deinit_device(struct device *dev) · 484 unmodified lines
485485 dev_iommu_free(dev);
486486 }
487487
488+DEFINE_MUTEX(iommu_probe_device_lock);
489+
488490 static int __iommu_probe_device(struct device *dev, struct list_head *group_list)
489491 {
490492 const struct iommu_ops *ops = dev->bus->iommu_ops;
491493 struct iommu_group *group;
492− static DEFINE_MUTEX(iommu_probe_device_lock);
493494 struct group_device *gdev;
494495 int ret;
495496
@@ -502,17 +503,15 @@ static int __iommu_probe_device(struct device *dev, struct list_head *group_list · 6 unmodified lines
502503 * probably be able to use device_lock() here to minimise the scope,
503504 * but for now enforcing a simple global ordering is fine.
504505 */
505− mutex_lock(&iommu_probe_device_lock);
506+ lockdep_assert_held(&iommu_probe_device_lock);
506507
507508 /* Device is probed already if in a group */
508− if (dev->iommu_group) {
509− ret = 0;
510− goto out_unlock;
511− }
509+ if (dev->iommu_group)
510+ return 0;
512511
513512 ret = iommu_init_device(dev, ops);
514513 if (ret)
515− goto out_unlock;
514+ return ret;
516515
517516 group = dev->iommu_group;
518517 gdev = iommu_group_alloc_device(group, dev);
@@ -548,7 +547,6 @@ static int __iommu_probe_device(struct device *dev, struct list_head *group_list · 29 unmodified lines
548547 list_add_tail(&group->entry, group_list);
549548 }
550549 mutex_unlock(&group->mutex);
551− mutex_unlock(&iommu_probe_device_lock);
552550
553551 if (dev_is_pci(dev))
554552 iommu_dma_set_pci_32bit_workaround(dev);
@@ -562,8 +560,6 @@ err_put_group: · 7 unmodified lines
562560 iommu_deinit_device(dev);
563561 mutex_unlock(&group->mutex);
564562 iommu_group_put(group);
565−out_unlock:
566− mutex_unlock(&iommu_probe_device_lock);
567563
568564 return ret;
569565 }
@@ -573,7 +569,9 @@ int iommu_probe_device(struct device *dev) · 3 unmodified lines
573569 const struct iommu_ops *ops;
574570 int ret;
575571
572+ mutex_lock(&iommu_probe_device_lock);
576573 ret = __iommu_probe_device(dev, NULL);
574+ mutex_unlock(&iommu_probe_device_lock);
577575 if (ret)
578576 return ret;
579577
@@ -1788,7 +1786,7 @@ iommu_group_alloc_default_domain(struct iommu_group *group, int req_type) · 1208 unmodified lines
17881786 */
17891787 if (ops->default_domain) {
17901788 if (req_type)
1791− return NULL;
1789+ return ERR_PTR(-EINVAL);
17921790 return ops->default_domain;
17931791 }
17941792
@@ -1797,15 +1795,15 @@ iommu_group_alloc_default_domain(struct iommu_group *group, int req_type) · 2 unmodified lines
17971795
17981796 /* The driver gave no guidance on what type to use, try the default */
17991797 dom = __iommu_group_alloc_default_domain(group, iommu_def_domain_type);
1800− if (dom)
1798+ if (!IS_ERR(dom))
18011799 return dom;
18021800
18031801 /* Otherwise IDENTITY and DMA_FQ defaults will try DMA */
18041802 if (iommu_def_domain_type == IOMMU_DOMAIN_DMA)
1805− return NULL;
1803+ return ERR_PTR(-EINVAL);
18061804 dom = __iommu_group_alloc_default_domain(group, IOMMU_DOMAIN_DMA);
1807− if (!dom)
1808− return NULL;
1805+ if (IS_ERR(dom))
1806+ return dom;
18091807
18101808 pr_warn("Failed to allocate default IOMMU domain of type %u for group %s - Falling back to IOMMU_DOMAIN_DMA",
18111809 iommu_def_domain_type, group->name);
@@ -1822,7 +1820,9 @@ static int probe_iommu_group(struct device *dev, void *data) · 10 unmodified lines
18221820 struct list_head *group_list = data;
18231821 int ret;
18241822
1823+ mutex_lock(&iommu_probe_device_lock);
18251824 ret = __iommu_probe_device(dev, group_list);
1825+ mutex_unlock(&iommu_probe_device_lock);
18261826 if (ret == -ENODEV)
18271827 ret = 0;
18281828
@@ -2094,10 +2094,17 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, · 265 unmodified lines
20942094 else if (ops->domain_alloc)
20952095 domain = ops->domain_alloc(alloc_type);
20962096 else
2097− return NULL;
2097+ return ERR_PTR(-EOPNOTSUPP);
20982098
2099+ /*
2100+ * Many domain_alloc ops now return ERR_PTR, make things easier for the
2101+ * driver by accepting ERR_PTR from all domain_alloc ops instead of
2102+ * having two rules.
2103+ */
2104+ if (IS_ERR(domain))
2105+ return domain;
20992106 if (!domain)
2100− return NULL;
2107+ return ERR_PTR(-ENOMEM);
21012108
21022109 domain->type = type;
21032110 /*
@@ -2110,9 +2117,14 @@ static struct iommu_domain *__iommu_domain_alloc(const struct iommu_ops *ops, · 6 unmodified lines
21102117 if (!domain->ops)
21112118 domain->ops = ops->default_domain_ops;
21122119
2113− if (iommu_is_dma_domain(domain) && iommu_get_dma_cookie(domain)) {
2114− iommu_domain_free(domain);
2115− domain = NULL;
2120+ if (iommu_is_dma_domain(domain)) {
2121+ int rc;
2122+
2123+ rc = iommu_get_dma_cookie(domain);
2124+ if (rc) {
2125+ iommu_domain_free(domain);
2126+ return ERR_PTR(rc);
2127+ }
21162128 }
21172129 return domain;
21182130 }
@@ -2129,10 +2141,15 @@ __iommu_group_domain_alloc(struct iommu_group *group, unsigned int type) · 10 unmodified lines
21292141
21302142 struct iommu_domain *iommu_domain_alloc(const struct bus_type *bus)
21312143 {
2144+ struct iommu_domain *domain;
2145+
21322146 if (bus == NULL || bus->iommu_ops == NULL)
21332147 return NULL;
2134− return __iommu_domain_alloc(bus->iommu_ops, NULL,
2148+ domain = __iommu_domain_alloc(bus->iommu_ops, NULL,
21352149 IOMMU_DOMAIN_UNMANAGED);
2150+ if (IS_ERR(domain))
2151+ return NULL;
2152+ return domain;
21362153 }
21372154 EXPORT_SYMBOL_GPL(iommu_domain_alloc);
21382155
@@ -3041,8 +3058,8 @@ static int iommu_setup_default_domain(struct iommu_group *group, · 902 unmodified lines
30413058 return -EINVAL;
30423059
30433060 dom = iommu_group_alloc_default_domain(group, req_type);
3044− if (!dom)
3045− return -ENODEV;
3061+ if (IS_ERR(dom))
3062+ return PTR_ERR(dom);
30463063
30473064 if (group->default_domain == dom)
30483065 return 0;
@@ -3243,21 +3260,23 @@ void iommu_device_unuse_default_domain(struct device *dev) · 194 unmodified lines
32433260
32443261 static int __iommu_group_alloc_blocking_domain(struct iommu_group *group)
32453262 {
3263+ struct iommu_domain *domain;
3264+
32463265 if (group->blocking_domain)
32473266 return 0;
32483267
3249− group->blocking_domain =
3250− __iommu_group_domain_alloc(group, IOMMU_DOMAIN_BLOCKED);
3251− if (!group->blocking_domain) {
3268+ domain = __iommu_group_domain_alloc(group, IOMMU_DOMAIN_BLOCKED);
3269+ if (IS_ERR(domain)) {
32523270 /*
32533271 * For drivers that do not yet understand IOMMU_DOMAIN_BLOCKED
32543272 * create an empty domain instead.
32553273 */
3256− group->blocking_domain = __iommu_group_domain_alloc(
3257− group, IOMMU_DOMAIN_UNMANAGED);
3258− if (!group->blocking_domain)
3259− return -EINVAL;
3274+ domain = __iommu_group_domain_alloc(group,
3275+ IOMMU_DOMAIN_UNMANAGED);
3276+ if (IS_ERR(domain))
3277+ return PTR_ERR(domain);
32603278 }
3279+ group->blocking_domain = domain;
32613280 return 0;
32623281 }
32633282
drivers/iommu/iommufd/device.c+7−7
@@ -571,7 +571,7 @@ iommufd_device_auto_get_domain(struct iommufd_device *idev, · 570 unmodified lines
571571 continue;
572572 destroy_hwpt = (*do_attach)(idev, hwpt);
573573 if (IS_ERR(destroy_hwpt)) {
574− iommufd_put_object(&hwpt->obj);
574+ iommufd_put_object(idev->ictx, &hwpt->obj);
575575 /*
576576 * -EINVAL means the domain is incompatible with the
577577 * device. Other error codes should propagate to
@@ -583,7 +583,7 @@ iommufd_device_auto_get_domain(struct iommufd_device *idev, · 5 unmodified lines
583583 goto out_unlock;
584584 }
585585 *pt_id = hwpt->obj.id;
586− iommufd_put_object(&hwpt->obj);
586+ iommufd_put_object(idev->ictx, &hwpt->obj);
587587 goto out_unlock;
588588 }
589589
@@ -652,7 +652,7 @@ static int iommufd_device_change_pt(struct iommufd_device *idev, u32 *pt_id, · 62 unmodified lines
652652 destroy_hwpt = ERR_PTR(-EINVAL);
653653 goto out_put_pt_obj;
654654 }
655− iommufd_put_object(pt_obj);
655+ iommufd_put_object(idev->ictx, pt_obj);
656656
657657 /* This destruction has to be after we unlock everything */
658658 if (destroy_hwpt)
@@ -660,7 +660,7 @@ static int iommufd_device_change_pt(struct iommufd_device *idev, u32 *pt_id, · 1 unmodified line
660660 return 0;
661661
662662 out_put_pt_obj:
663− iommufd_put_object(pt_obj);
663+ iommufd_put_object(idev->ictx, pt_obj);
664664 return PTR_ERR(destroy_hwpt);
665665 }
666666
@@ -792,7 +792,7 @@ static int iommufd_access_change_ioas_id(struct iommufd_access *access, u32 id) · 125 unmodified lines
792792 if (IS_ERR(ioas))
793793 return PTR_ERR(ioas);
794794 rc = iommufd_access_change_ioas(access, ioas);
795− iommufd_put_object(&ioas->obj);
795+ iommufd_put_object(access->ictx, &ioas->obj);
796796 return rc;
797797 }
798798
@@ -941,7 +941,7 @@ void iommufd_access_notify_unmap(struct io_pagetable *iopt, unsigned long iova, · 142 unmodified lines
941941
942942 access->ops->unmap(access->data, iova, length);
943943
944− iommufd_put_object(&access->obj);
944+ iommufd_put_object(access->ictx, &access->obj);
945945 xa_lock(&ioas->iopt.access_list);
946946 }
947947 xa_unlock(&ioas->iopt.access_list);
@@ -1243,6 +1243,6 @@ int iommufd_get_hw_info(struct iommufd_ucmd *ucmd) · 295 unmodified lines
12431243 out_free:
12441244 kfree(data);
12451245 out_put:
1246− iommufd_put_object(&idev->obj);
1246+ iommufd_put_object(ucmd->ictx, &idev->obj);
12471247 return rc;
12481248 }
drivers/iommu/iommufd/hw_pagetable.c+4−4
@@ -318,9 +318,9 @@ out_unlock: · 317 unmodified lines
318318 if (ioas)
319319 mutex_unlock(&ioas->mutex);
320320 out_put_pt:
321− iommufd_put_object(pt_obj);
321+ iommufd_put_object(ucmd->ictx, pt_obj);
322322 out_put_idev:
323− iommufd_put_object(&idev->obj);
323+ iommufd_put_object(ucmd->ictx, &idev->obj);
324324 return rc;
325325 }
326326
@@ -345,7 +345,7 @@ int iommufd_hwpt_set_dirty_tracking(struct iommufd_ucmd *ucmd) · 18 unmodified lines
345345 rc = iopt_set_dirty_tracking(&ioas->iopt, hwpt_paging->common.domain,
346346 enable);
347347
348− iommufd_put_object(&hwpt_paging->common.obj);
348+ iommufd_put_object(ucmd->ictx, &hwpt_paging->common.obj);
349349 return rc;
350350 }
351351
@@ -368,6 +368,6 @@ int iommufd_hwpt_get_dirty_bitmap(struct iommufd_ucmd *ucmd) · 16 unmodified lines
368368 rc = iopt_read_and_clear_dirty_data(
369369 &ioas->iopt, hwpt_paging->common.domain, cmd->flags, cmd);
370370
371− iommufd_put_object(&hwpt_paging->common.obj);
371+ iommufd_put_object(ucmd->ictx, &hwpt_paging->common.obj);
372372 return rc;
373373 }
drivers/iommu/iommufd/ioas.c+7−7
@@ -105,7 +105,7 @@ int iommufd_ioas_iova_ranges(struct iommufd_ucmd *ucmd) · 104 unmodified lines
105105 rc = -EMSGSIZE;
106106 out_put:
107107 up_read(&ioas->iopt.iova_rwsem);
108− iommufd_put_object(&ioas->obj);
108+ iommufd_put_object(ucmd->ictx, &ioas->obj);
109109 return rc;
110110 }
111111
@@ -175,7 +175,7 @@ out_free: · 63 unmodified lines
175175 interval_tree_remove(node, &allowed_iova);
176176 kfree(container_of(node, struct iopt_allowed, node));
177177 }
178− iommufd_put_object(&ioas->obj);
178+ iommufd_put_object(ucmd->ictx, &ioas->obj);
179179 return rc;
180180 }
181181
@@ -228,7 +228,7 @@ int iommufd_ioas_map(struct iommufd_ucmd *ucmd) · 46 unmodified lines
228228 cmd->iova = iova;
229229 rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd));
230230 out_put:
231− iommufd_put_object(&ioas->obj);
231+ iommufd_put_object(ucmd->ictx, &ioas->obj);
232232 return rc;
233233 }
234234
@@ -258,7 +258,7 @@ int iommufd_ioas_copy(struct iommufd_ucmd *ucmd) · 23 unmodified lines
258258 return PTR_ERR(src_ioas);
259259 rc = iopt_get_pages(&src_ioas->iopt, cmd->src_iova, cmd->length,
260260 &pages_list);
261− iommufd_put_object(&src_ioas->obj);
261+ iommufd_put_object(ucmd->ictx, &src_ioas->obj);
262262 if (rc)
263263 return rc;
264264
@@ -279,7 +279,7 @@ int iommufd_ioas_copy(struct iommufd_ucmd *ucmd) · 14 unmodified lines
279279 cmd->dst_iova = iova;
280280 rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd));
281281 out_put_dst:
282− iommufd_put_object(&dst_ioas->obj);
282+ iommufd_put_object(ucmd->ictx, &dst_ioas->obj);
283283 out_pages:
284284 iopt_free_pages_list(&pages_list);
285285 return rc;
@@ -315,7 +315,7 @@ int iommufd_ioas_unmap(struct iommufd_ucmd *ucmd) · 29 unmodified lines
315315 rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd));
316316
317317 out_put:
318− iommufd_put_object(&ioas->obj);
318+ iommufd_put_object(ucmd->ictx, &ioas->obj);
319319 return rc;
320320 }
321321
@@ -393,6 +393,6 @@ int iommufd_ioas_option(struct iommufd_ucmd *ucmd) · 71 unmodified lines
393393 rc = -EOPNOTSUPP;
394394 }
395395
396− iommufd_put_object(&ioas->obj);
396+ iommufd_put_object(ucmd->ictx, &ioas->obj);
397397 return rc;
398398 }
drivers/iommu/iommufd/iommufd_private.h+57−13
@@ -21,6 +21,7 @@ struct iommufd_ctx { · 20 unmodified lines
2121 struct file *file;
2222 struct xarray objects;
2323 struct xarray groups;
24+ wait_queue_head_t destroy_wait;
2425
2526 u8 account_mode;
2627 /* Compatibility with VFIO no iommu */
@@ -135,7 +136,7 @@ enum iommufd_object_type { · 108 unmodified lines
135136
136137 /* Base struct for all objects with a userspace ID handle. */
137138 struct iommufd_object {
138− struct rw_semaphore destroy_rwsem;
139+ refcount_t shortterm_users;
139140 refcount_t users;
140141 enum iommufd_object_type type;
141142 unsigned int id;
@@ -143,10 +144,15 @@ struct iommufd_object { · 1 unmodified line
143144
144145 static inline bool iommufd_lock_obj(struct iommufd_object *obj)
145146 {
146− if (!down_read_trylock(&obj->destroy_rwsem))
147+ if (!refcount_inc_not_zero(&obj->users))
147148 return false;
148− if (!refcount_inc_not_zero(&obj->users)) {
149− up_read(&obj->destroy_rwsem);
149+ if (!refcount_inc_not_zero(&obj->shortterm_users)) {
150+ /*
151+ * If the caller doesn't already have a ref on obj this must be
152+ * called under the xa_lock. Otherwise the caller is holding a
153+ * ref on users. Thus it cannot be one before this decrement.
154+ */
155+ refcount_dec(&obj->users);
150156 return false;
151157 }
152158 return true;
@@ -154,10 +160,16 @@ static inline bool iommufd_lock_obj(struct iommufd_object *obj) · 1 unmodified line
154160
155161 struct iommufd_object *iommufd_get_object(struct iommufd_ctx *ictx, u32 id,
156162 enum iommufd_object_type type);
157−static inline void iommufd_put_object(struct iommufd_object *obj)
163+static inline void iommufd_put_object(struct iommufd_ctx *ictx,
164+ struct iommufd_object *obj)
158165 {
166+ /*
167+ * Users first, then shortterm so that REMOVE_WAIT_SHORTTERM never sees
168+ * a spurious !0 users with a 0 shortterm_users.
169+ */
159170 refcount_dec(&obj->users);
160− up_read(&obj->destroy_rwsem);
171+ if (refcount_dec_and_test(&obj->shortterm_users))
172+ wake_up_interruptible_all(&ictx->destroy_wait);
161173 }
162174
163175 void iommufd_object_abort(struct iommufd_ctx *ictx, struct iommufd_object *obj);
@@ -165,17 +177,49 @@ void iommufd_object_abort_and_destroy(struct iommufd_ctx *ictx, · 1 unmodified line
165177 struct iommufd_object *obj);
166178 void iommufd_object_finalize(struct iommufd_ctx *ictx,
167179 struct iommufd_object *obj);
168−void __iommufd_object_destroy_user(struct iommufd_ctx *ictx,
169− struct iommufd_object *obj, bool allow_fail);
180+
181+enum {
182+ REMOVE_WAIT_SHORTTERM = 1,
183+};
184+int iommufd_object_remove(struct iommufd_ctx *ictx,
185+ struct iommufd_object *to_destroy, u32 id,
186+ unsigned int flags);
187+
188+/*
189+ * The caller holds a users refcount and wants to destroy the object. At this
190+ * point the caller has no shortterm_users reference and at least the xarray
191+ * will be holding one.
192+ */
170193 static inline void iommufd_object_destroy_user(struct iommufd_ctx *ictx,
171194 struct iommufd_object *obj)
172195 {
173− __iommufd_object_destroy_user(ictx, obj, false);
196+ int ret;
197+
198+ ret = iommufd_object_remove(ictx, obj, obj->id, REMOVE_WAIT_SHORTTERM);
199+
200+ /*
201+ * If there is a bug and we couldn't destroy the object then we did put
202+ * back the caller's users refcount and will eventually try to free it
203+ * again during close.
204+ */
205+ WARN_ON(ret);
174206 }
175−static inline void iommufd_object_deref_user(struct iommufd_ctx *ictx,
176− struct iommufd_object *obj)
207+
208+/*
209+ * The HWPT allocated by autodomains is used in possibly many devices and
210+ * is automatically destroyed when its refcount reaches zero.
211+ *
212+ * If userspace uses the HWPT manually, even for a short term, then it will
213+ * disrupt this refcounting and the auto-free in the kernel will not work.
214+ * Userspace that tries to use the automatically allocated HWPT must be careful
215+ * to ensure that it is consistently destroyed, eg by not racing accesses
216+ * and by not attaching an automatic HWPT to a device manually.
217+ */
218+static inline void
219+iommufd_object_put_and_try_destroy(struct iommufd_ctx *ictx,
220+ struct iommufd_object *obj)
177221 {
178− __iommufd_object_destroy_user(ictx, obj, true);
222+ iommufd_object_remove(ictx, obj, obj->id, 0);
179223 }
180224
181225 struct iommufd_object *_iommufd_object_alloc(struct iommufd_ctx *ictx,
@@ -311,7 +355,7 @@ static inline void iommufd_hw_pagetable_put(struct iommufd_ctx *ictx, · 129 unmodified lines
311355 lockdep_assert_not_held(&hwpt_paging->ioas->mutex);
312356
313357 if (hwpt_paging->auto_domain) {
314− iommufd_object_deref_user(ictx, &hwpt->obj);
358+ iommufd_object_put_and_try_destroy(ictx, &hwpt->obj);
315359 return;
316360 }
317361 }
drivers/iommu/iommufd/main.c+80−66
@@ -33,7 +33,6 @@ struct iommufd_object *_iommufd_object_alloc(struct iommufd_ctx *ictx, · 32 unmodified lines
3333 size_t size,
3434 enum iommufd_object_type type)
3535 {
36− static struct lock_class_key obj_keys[IOMMUFD_OBJ_MAX];
3736 struct iommufd_object *obj;
3837 int rc;
3938
@@ -41,15 +40,8 @@ struct iommufd_object *_iommufd_object_alloc(struct iommufd_ctx *ictx, · 1 unmodified line
4140 if (!obj)
4241 return ERR_PTR(-ENOMEM);
4342 obj->type = type;
44− /*
45− * In most cases the destroy_rwsem is obtained with try so it doesn't
46− * interact with lockdep, however on destroy we have to sleep. This
47− * means if we have to destroy an object while holding a get on another
48− * object it triggers lockdep. Using one locking class per object type
49− * is a simple and reasonable way to avoid this.
50− */
51− __init_rwsem(&obj->destroy_rwsem, "iommufd_object::destroy_rwsem",
52− &obj_keys[type]);
43+ /* Starts out bias'd by 1 until it is removed from the xarray */
44+ refcount_set(&obj->shortterm_users, 1);
5345 refcount_set(&obj->users, 1);
5446
5547 /*
@@ -129,92 +121,113 @@ struct iommufd_object *iommufd_get_object(struct iommufd_ctx *ictx, u32 id, · 73 unmodified lines
129121 return obj;
130122 }
131123
124+static int iommufd_object_dec_wait_shortterm(struct iommufd_ctx *ictx,
125+ struct iommufd_object *to_destroy)
126+{
127+ if (refcount_dec_and_test(&to_destroy->shortterm_users))
128+ return 0;
129+
130+ if (wait_event_timeout(ictx->destroy_wait,
131+ refcount_read(&to_destroy->shortterm_users) ==
132+ 0,
133+ msecs_to_jiffies(10000)))
134+ return 0;
135+
136+ pr_crit("Time out waiting for iommufd object to become free\n");
137+ refcount_inc(&to_destroy->shortterm_users);
138+ return -EBUSY;
139+}
140+
132141 /*
133142 * Remove the given object id from the xarray if the only reference to the
134− * object is held by the xarray. The caller must call ops destroy().
143+ * object is held by the xarray.
135144 */
136−static struct iommufd_object *iommufd_object_remove(struct iommufd_ctx *ictx,
137− u32 id, bool extra_put)
145+int iommufd_object_remove(struct iommufd_ctx *ictx,
146+ struct iommufd_object *to_destroy, u32 id,
147+ unsigned int flags)
138148 {
139149 struct iommufd_object *obj;
140150 XA_STATE(xas, &ictx->objects, id);
141−
142− xa_lock(&ictx->objects);
143− obj = xas_load(&xas);
144− if (xa_is_zero(obj) || !obj) {
145− obj = ERR_PTR(-ENOENT);
146− goto out_xa;
147− }
151+ bool zerod_shortterm = false;
152+ int ret;
148153
149154 /*
150− * If the caller is holding a ref on obj we put it here under the
151− * spinlock.
155+ * The purpose of the shortterm_users is to ensure deterministic
156+ * destruction of objects used by external drivers and destroyed by this
157+ * function. Any temporary increment of the refcount must increment
158+ * shortterm_users, such as during ioctl execution.
152159 */
153− if (extra_put)
160+ if (flags & REMOVE_WAIT_SHORTTERM) {
161+ ret = iommufd_object_dec_wait_shortterm(ictx, to_destroy);
162+ if (ret) {
163+ /*
164+ * We have a bug. Put back the callers reference and
165+ * defer cleaning this object until close.
166+ */
167+ refcount_dec(&to_destroy->users);
168+ return ret;
169+ }
170+ zerod_shortterm = true;
171+ }
172+
173+ xa_lock(&ictx->objects);
174+ obj = xas_load(&xas);
175+ if (to_destroy) {
176+ /*
177+ * If the caller is holding a ref on obj we put it here under
178+ * the spinlock.
179+ */
154180 refcount_dec(&obj->users);
155181
182+ if (WARN_ON(obj != to_destroy)) {
183+ ret = -ENOENT;
184+ goto err_xa;
185+ }
186+ } else if (xa_is_zero(obj) || !obj) {
187+ ret = -ENOENT;
188+ goto err_xa;
189+ }
190+
156191 if (!refcount_dec_if_one(&obj->users)) {
157− obj = ERR_PTR(-EBUSY);
158− goto out_xa;
192+ ret = -EBUSY;
193+ goto err_xa;
159194 }
160195
161196 xas_store(&xas, NULL);
162197 if (ictx->vfio_ioas == container_of(obj, struct iommufd_ioas, obj))
163198 ictx->vfio_ioas = NULL;
164−
165−out_xa:
166199 xa_unlock(&ictx->objects);
167200
168− /* The returned object reference count is zero */
169− return obj;
170−}
171−
172−/*
173− * The caller holds a users refcount and wants to destroy the object. Returns
174− * true if the object was destroyed. In all cases the caller no longer has a
175− * reference on obj.
176− */
177−void __iommufd_object_destroy_user(struct iommufd_ctx *ictx,
178− struct iommufd_object *obj, bool allow_fail)
179−{
180− struct iommufd_object *ret;
181−
182201 /*
183− * The purpose of the destroy_rwsem is to ensure deterministic
184− * destruction of objects used by external drivers and destroyed by this
185− * function. Any temporary increment of the refcount must hold the read
186− * side of this, such as during ioctl execution.
187− */
188− down_write(&obj->destroy_rwsem);
189− ret = iommufd_object_remove(ictx, obj->id, true);
190− up_write(&obj->destroy_rwsem);
191−
192− if (allow_fail && IS_ERR(ret))
193− return;
194−
195− /*
196− * If there is a bug and we couldn't destroy the object then we did put
197− * back the caller's refcount and will eventually try to free it again
198− * during close.
202+ * Since users is zero any positive users_shortterm must be racing
203+ * iommufd_put_object(), or we have a bug.
199204 */
200− if (WARN_ON(IS_ERR(ret)))
201− return;
205+ if (!zerod_shortterm) {
206+ ret = iommufd_object_dec_wait_shortterm(ictx, obj);
207+ if (WARN_ON(ret))
208+ return ret;
209+ }
202210
203211 iommufd_object_ops[obj->type].destroy(obj);
204212 kfree(obj);
213+ return 0;
214+
215+err_xa:
216+ if (zerod_shortterm) {
217+ /* Restore the xarray owned reference */
218+ refcount_set(&obj->shortterm_users, 1);
219+ }
220+ xa_unlock(&ictx->objects);
221+
222+ /* The returned object reference count is zero */
223+ return ret;
205224 }
206225
207226 static int iommufd_destroy(struct iommufd_ucmd *ucmd)
208227 {
209228 struct iommu_destroy *cmd = ucmd->cmd;
210− struct iommufd_object *obj;
211229
212− obj = iommufd_object_remove(ucmd->ictx, cmd->id, false);
213− if (IS_ERR(obj))
214− return PTR_ERR(obj);
215− iommufd_object_ops[obj->type].destroy(obj);
216− kfree(obj);
217− return 0;
230+ return iommufd_object_remove(ucmd->ictx, NULL, cmd->id, 0);
218231 }
219232
220233 static int iommufd_fops_open(struct inode *inode, struct file *filp)
@@ -238,6 +251,7 @@ static int iommufd_fops_open(struct inode *inode, struct file *filp) · 17 unmodified lines
238251 xa_init_flags(&ictx->objects, XA_FLAGS_ALLOC1 | XA_FLAGS_ACCOUNT);
239252 xa_init(&ictx->groups);
240253 ictx->file = filp;
254+ init_waitqueue_head(&ictx->destroy_wait);
241255 filp->private_data = ictx;
242256 return 0;
243257 }
drivers/iommu/iommufd/selftest.c+7−7
@@ -86,7 +86,7 @@ void iommufd_test_syz_conv_iova_id(struct iommufd_ucmd *ucmd, · 85 unmodified lines
8686 if (IS_ERR(ioas))
8787 return;
8888 *iova = iommufd_test_syz_conv_iova(&ioas->iopt, iova);
89− iommufd_put_object(&ioas->obj);
89+ iommufd_put_object(ucmd->ictx, &ioas->obj);
9090 }
9191
9292 struct mock_iommu_domain {
@@ -500,7 +500,7 @@ get_md_pagetable(struct iommufd_ucmd *ucmd, u32 mockpt_id, · 407 unmodified lines
500500 return hwpt;
501501 if (hwpt->domain->type != IOMMU_DOMAIN_UNMANAGED ||
502502 hwpt->domain->ops != mock_ops.default_domain_ops) {
503− iommufd_put_object(&hwpt->obj);
503+ iommufd_put_object(ucmd->ictx, &hwpt->obj);
504504 return ERR_PTR(-EINVAL);
505505 }
506506 *mock = container_of(hwpt->domain, struct mock_iommu_domain, domain);
@@ -518,7 +518,7 @@ get_md_pagetable_nested(struct iommufd_ucmd *ucmd, u32 mockpt_id, · 11 unmodified lines
518518 return hwpt;
519519 if (hwpt->domain->type != IOMMU_DOMAIN_NESTED ||
520520 hwpt->domain->ops != &domain_nested_ops) {
521− iommufd_put_object(&hwpt->obj);
521+ iommufd_put_object(ucmd->ictx, &hwpt->obj);
522522 return ERR_PTR(-EINVAL);
523523 }
524524 *mock_nested = container_of(hwpt->domain,
@@ -681,7 +681,7 @@ static int iommufd_test_mock_domain_replace(struct iommufd_ucmd *ucmd, · 156 unmodified lines
681681 rc = iommufd_ucmd_respond(ucmd, sizeof(*cmd));
682682
683683 out_dev_obj:
684− iommufd_put_object(dev_obj);
684+ iommufd_put_object(ucmd->ictx, dev_obj);
685685 return rc;
686686 }
687687
@@ -699,7 +699,7 @@ static int iommufd_test_add_reserved(struct iommufd_ucmd *ucmd, · 11 unmodified lines
699699 down_write(&ioas->iopt.iova_rwsem);
700700 rc = iopt_reserve_iova(&ioas->iopt, start, start + length - 1, NULL);
701701 up_write(&ioas->iopt.iova_rwsem);
702− iommufd_put_object(&ioas->obj);
702+ iommufd_put_object(ucmd->ictx, &ioas->obj);
703703 return rc;
704704 }
705705
@@ -754,7 +754,7 @@ static int iommufd_test_md_check_pa(struct iommufd_ucmd *ucmd, · 48 unmodified lines
754754 rc = 0;
755755
756756 out_put:
757− iommufd_put_object(&hwpt->obj);
757+ iommufd_put_object(ucmd->ictx, &hwpt->obj);
758758 return rc;
759759 }
760760
@@ -1233,7 +1233,7 @@ static int iommufd_test_dirty(struct iommufd_ucmd *ucmd, unsigned int mockpt_id, · 472 unmodified lines
12331233 out_free:
12341234 kvfree(tmp);
12351235 out_put:
1236− iommufd_put_object(&hwpt->obj);
1236+ iommufd_put_object(ucmd->ictx, &hwpt->obj);
12371237 return rc;
12381238 }
12391239
drivers/iommu/iommufd/vfio_compat.c+9−9
@@ -41,7 +41,7 @@ int iommufd_vfio_compat_ioas_get_id(struct iommufd_ctx *ictx, u32 *out_ioas_id) · 40 unmodified lines
4141 if (IS_ERR(ioas))
4242 return PTR_ERR(ioas);
4343 *out_ioas_id = ioas->obj.id;
44− iommufd_put_object(&ioas->obj);
44+ iommufd_put_object(ictx, &ioas->obj);
4545 return 0;
4646 }
4747 EXPORT_SYMBOL_NS_GPL(iommufd_vfio_compat_ioas_get_id, IOMMUFD_VFIO);
@@ -98,7 +98,7 @@ int iommufd_vfio_compat_ioas_create(struct iommufd_ctx *ictx) · 50 unmodified lines
9898
9999 if (ictx->vfio_ioas && iommufd_lock_obj(&ictx->vfio_ioas->obj)) {
100100 ret = 0;
101− iommufd_put_object(&ictx->vfio_ioas->obj);
101+ iommufd_put_object(ictx, &ictx->vfio_ioas->obj);
102102 goto out_abort;
103103 }
104104 ictx->vfio_ioas = ioas;
@@ -133,7 +133,7 @@ int iommufd_vfio_ioas(struct iommufd_ucmd *ucmd) · 28 unmodified lines
133133 if (IS_ERR(ioas))
134134 return PTR_ERR(ioas);
135135 cmd->ioas_id = ioas->obj.id;
136− iommufd_put_object(&ioas->obj);
136+ iommufd_put_object(ucmd->ictx, &ioas->obj);
137137 return iommufd_ucmd_respond(ucmd, sizeof(*cmd));
138138
139139 case IOMMU_VFIO_IOAS_SET:
@@ -143,7 +143,7 @@ int iommufd_vfio_ioas(struct iommufd_ucmd *ucmd) · 3 unmodified lines
143143 xa_lock(&ucmd->ictx->objects);
144144 ucmd->ictx->vfio_ioas = ioas;
145145 xa_unlock(&ucmd->ictx->objects);
146− iommufd_put_object(&ioas->obj);
146+ iommufd_put_object(ucmd->ictx, &ioas->obj);
147147 return 0;
148148
149149 case IOMMU_VFIO_IOAS_CLEAR:
@@ -190,7 +190,7 @@ static int iommufd_vfio_map_dma(struct iommufd_ctx *ictx, unsigned int cmd, · 40 unmodified lines
190190 iova = map.iova;
191191 rc = iopt_map_user_pages(ictx, &ioas->iopt, &iova, u64_to_user_ptr(map.vaddr),
192192 map.size, iommu_prot, 0);
193− iommufd_put_object(&ioas->obj);
193+ iommufd_put_object(ictx, &ioas->obj);
194194 return rc;
195195 }
196196
@@ -249,7 +249,7 @@ static int iommufd_vfio_unmap_dma(struct iommufd_ctx *ictx, unsigned int cmd, · 52 unmodified lines
249249 rc = -EFAULT;
250250
251251 err_put:
252− iommufd_put_object(&ioas->obj);
252+ iommufd_put_object(ictx, &ioas->obj);
253253 return rc;
254254 }
255255
@@ -272,7 +272,7 @@ static int iommufd_vfio_cc_iommu(struct iommufd_ctx *ictx) · 16 unmodified lines
272272 }
273273 mutex_unlock(&ioas->mutex);
274274
275− iommufd_put_object(&ioas->obj);
275+ iommufd_put_object(ictx, &ioas->obj);
276276 return rc;
277277 }
278278
@@ -349,7 +349,7 @@ static int iommufd_vfio_set_iommu(struct iommufd_ctx *ictx, unsigned long type) · 70 unmodified lines
349349 */
350350 if (type == VFIO_TYPE1_IOMMU)
351351 rc = iopt_disable_large_pages(&ioas->iopt);
352− iommufd_put_object(&ioas->obj);
352+ iommufd_put_object(ictx, &ioas->obj);
353353 return rc;
354354 }
355355
@@ -511,7 +511,7 @@ static int iommufd_vfio_iommu_get_info(struct iommufd_ctx *ictx, · 155 unmodified lines
511511
512512 out_put:
513513 up_read(&ioas->iopt.iova_rwsem);
514− iommufd_put_object(&ioas->obj);
514+ iommufd_put_object(ictx, &ioas->obj);
515515 return rc;
516516 }
517517
drivers/iommu/of_iommu.c+10−4
@@ -112,16 +112,20 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, · 111 unmodified lines
112112 const u32 *id)
113113 {
114114 const struct iommu_ops *ops = NULL;
115− struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
115+ struct iommu_fwspec *fwspec;
116116 int err = NO_IOMMU;
117117
118118 if (!master_np)
119119 return NULL;
120120
121+ /* Serialise to make dev->iommu stable under our potential fwspec */
122+ mutex_lock(&iommu_probe_device_lock);
123+ fwspec = dev_iommu_fwspec_get(dev);
121124 if (fwspec) {
122− if (fwspec->ops)
125+ if (fwspec->ops) {
126+ mutex_unlock(&iommu_probe_device_lock);
123127 return fwspec->ops;
124−
128+ }
125129 /* In the deferred case, start again from scratch */
126130 iommu_fwspec_free(dev);
127131 }
@@ -155,6 +159,8 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, · 27 unmodified lines
155159 fwspec = dev_iommu_fwspec_get(dev);
156160 ops = fwspec->ops;
157161 }
162+ mutex_unlock(&iommu_probe_device_lock);
163+
158164 /*
159165 * If we have reason to believe the IOMMU driver missed the initial
160166 * probe for dev, replay it to get things in order.
@@ -191,7 +197,7 @@ iommu_resv_region_get_type(struct device *dev, · 30 unmodified lines
191197 if (start == phys->start && end == phys->end)
192198 return IOMMU_RESV_DIRECT;
193199
194− dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", &phys,
200+ dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", phys,
195201 &start, &end);
196202 return IOMMU_RESV_RESERVED;
197203 }
drivers/irqchip/irq-gic-v3-its.c+10−6
@@ -2379,12 +2379,12 @@ retry_baser: · 2378 unmodified lines
23792379 break;
23802380 }
23812381
2382+ if (!shr)
2383+ gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order));
2384+
23822385 its_write_baser(its, baser, val);
23832386 tmp = baser->val;
23842387
2385− if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE)
2386− tmp &= ~GITS_BASER_SHAREABILITY_MASK;
2387−
23882388 if ((val ^ tmp) & GITS_BASER_SHAREABILITY_MASK) {
23892389 /*
23902390 * Shareability didn't stick. Just use
@@ -2394,10 +2394,9 @@ retry_baser: · 3 unmodified lines
23942394 * non-cacheable as well.
23952395 */
23962396 shr = tmp & GITS_BASER_SHAREABILITY_MASK;
2397− if (!shr) {
2397+ if (!shr)
23982398 cache = GITS_BASER_nC;
2399− gic_flush_dcache_to_poc(base, PAGE_ORDER_TO_SIZE(order));
2400− }
2399+
24012400 goto retry_baser;
24022401 }
24032402
@@ -2609,6 +2608,11 @@ static int its_alloc_tables(struct its_node *its) · 205 unmodified lines
26092608 /* erratum 24313: ignore memory access type */
26102609 cache = GITS_BASER_nCnB;
26112610
2611+ if (its->flags & ITS_FLAGS_FORCE_NON_SHAREABLE) {
2612+ cache = GITS_BASER_nC;
2613+ shr = 0;
2614+ }
2615+
26122616 for (i = 0; i < GITS_BASER_NR_REGS; i++) {
26132617 struct its_baser *baser = its->tables + i;
26142618 u64 val = its_read_baser(its, baser);
drivers/leds/led-class.c+0−14
@@ -75,19 +75,6 @@ static ssize_t max_brightness_show(struct device *dev, · 74 unmodified lines
7575 }
7676 static DEVICE_ATTR_RO(max_brightness);
7777
78−static ssize_t color_show(struct device *dev,
79− struct device_attribute *attr, char *buf)
80−{
81− const char *color_text = "invalid";
82− struct led_classdev *led_cdev = dev_get_drvdata(dev);
83−
84− if (led_cdev->color < LED_COLOR_ID_MAX)
85− color_text = led_colors[led_cdev->color];
86−
87− return sysfs_emit(buf, "%s\n", color_text);
88−}
89−static DEVICE_ATTR_RO(color);
90−
9178 #ifdef CONFIG_LEDS_TRIGGERS
9279 static BIN_ATTR(trigger, 0644, led_trigger_read, led_trigger_write, 0);
9380 static struct bin_attribute *led_trigger_bin_attrs[] = {
@@ -102,7 +89,6 @@ static const struct attribute_group led_trigger_group = { · 8 unmodified lines
10289 static struct attribute *led_class_attrs[] = {
10390 &dev_attr_brightness.attr,
10491 &dev_attr_max_brightness.attr,
105− &dev_attr_color.attr,
10692 NULL,
10793 };
10894
drivers/leds/trigger/ledtrig-netdev.c+7−4
@@ -226,6 +226,11 @@ static int set_device_name(struct led_netdev_data *trigger_data, · 225 unmodified lines
226226
227227 cancel_delayed_work_sync(&trigger_data->work);
228228
229+ /*
230+ * Take RTNL lock before trigger_data lock to prevent potential
231+ * deadlock with netdev notifier registration.
232+ */
233+ rtnl_lock();
229234 mutex_lock(&trigger_data->lock);
230235
231236 if (trigger_data->net_dev) {
@@ -245,16 +250,14 @@ static int set_device_name(struct led_netdev_data *trigger_data, · 13 unmodified lines
245250 trigger_data->carrier_link_up = false;
246251 trigger_data->link_speed = SPEED_UNKNOWN;
247252 trigger_data->duplex = DUPLEX_UNKNOWN;
248− if (trigger_data->net_dev != NULL) {
249− rtnl_lock();
253+ if (trigger_data->net_dev)
250254 get_device_state(trigger_data);
251− rtnl_unlock();
252− }
253255
254256 trigger_data->last_activity = 0;
255257
256258 set_baseline_state(trigger_data);
257259 mutex_unlock(&trigger_data->lock);
260+ rtnl_unlock();
258261
259262 return 0;
260263 }
drivers/md/bcache/bcache.h+1−0
@@ -265,6 +265,7 @@ struct bcache_device { · 264 unmodified lines
265265 #define BCACHE_DEV_WB_RUNNING 3
266266 #define BCACHE_DEV_RATE_DW_RUNNING 4
267267 int nr_stripes;
268+#define BCH_MIN_STRIPE_SZ ((4 << 20) >> SECTOR_SHIFT)
268269 unsigned int stripe_size;
269270 atomic_t *stripe_sectors_dirty;
270271 unsigned long *full_dirty_stripes;
drivers/md/bcache/btree.c+18−9
@@ -293,16 +293,16 @@ static void btree_complete_write(struct btree *b, struct btree_write *w) · 292 unmodified lines
293293 w->journal = NULL;
294294 }
295295
296−static void btree_node_write_unlock(struct closure *cl)
296+static CLOSURE_CALLBACK(btree_node_write_unlock)
297297 {
298− struct btree *b = container_of(cl, struct btree, io);
298+ closure_type(b, struct btree, io);
299299
300300 up(&b->io_mutex);
301301 }
302302
303−static void __btree_node_write_done(struct closure *cl)
303+static CLOSURE_CALLBACK(__btree_node_write_done)
304304 {
305− struct btree *b = container_of(cl, struct btree, io);
305+ closure_type(b, struct btree, io);
306306 struct btree_write *w = btree_prev_write(b);
307307
308308 bch_bbio_free(b->bio, b->c);
@@ -315,12 +315,12 @@ static void __btree_node_write_done(struct closure *cl) · 6 unmodified lines
315315 closure_return_with_destructor(cl, btree_node_write_unlock);
316316 }
317317
318−static void btree_node_write_done(struct closure *cl)
318+static CLOSURE_CALLBACK(btree_node_write_done)
319319 {
320− struct btree *b = container_of(cl, struct btree, io);
320+ closure_type(b, struct btree, io);
321321
322322 bio_free_pages(b->bio);
323− __btree_node_write_done(cl);
323+ __btree_node_write_done(&cl->work);
324324 }
325325
326326 static void btree_node_write_endio(struct bio *bio)
@@ -1000,6 +1000,9 @@ err: · 673 unmodified lines
10001000 *
10011001 * The btree node will have either a read or a write lock held, depending on
10021002 * level and op->lock.
1003+ *
1004+ * Note: Only error code or btree pointer will be returned, it is unncessary
1005+ * for callers to check NULL pointer.
10031006 */
10041007 struct btree *bch_btree_node_get(struct cache_set *c, struct btree_op *op,
10051008 struct bkey *k, int level, bool write,
@@ -1111,6 +1114,10 @@ retry: · 105 unmodified lines
11111114 mutex_unlock(&b->c->bucket_lock);
11121115 }
11131116
1117+/*
1118+ * Only error code or btree pointer will be returned, it is unncessary for
1119+ * callers to check NULL pointer.
1120+ */
11141121 struct btree *__bch_btree_node_alloc(struct cache_set *c, struct btree_op *op,
11151122 int level, bool wait,
11161123 struct btree *parent)
@@ -1368,7 +1375,7 @@ static int btree_gc_coalesce(struct btree *b, struct btree_op *op, · 251 unmodified lines
13681375 memset(new_nodes, 0, sizeof(new_nodes));
13691376 closure_init_stack(&cl);
13701377
1371− while (nodes < GC_MERGE_NODES && !IS_ERR(r[nodes].b))
1378+ while (nodes < GC_MERGE_NODES && !IS_ERR_OR_NULL(r[nodes].b))
13721379 keys += r[nodes++].keys;
13731380
13741381 blocks = btree_default_blocks(b->c) * 2 / 3;
@@ -1515,7 +1522,7 @@ out_nocoalesce: · 140 unmodified lines
15151522 bch_keylist_free(&keylist);
15161523
15171524 for (i = 0; i < nodes; i++)
1518− if (!IS_ERR(new_nodes[i])) {
1525+ if (!IS_ERR_OR_NULL(new_nodes[i])) {
15191526 btree_node_free(new_nodes[i]);
15201527 rw_unlock(true, new_nodes[i]);
15211528 }
@@ -1532,6 +1539,8 @@ static int btree_gc_rewrite_node(struct btree *b, struct btree_op *op, · 10 unmodified lines
15321539 return 0;
15331540
15341541 n = btree_node_alloc_replacement(replace, NULL);
1542+ if (IS_ERR(n))
1543+ return 0;
15351544
15361545 /* recheck reserve after allocating replacement node */
15371546 if (btree_check_reserve(b, NULL)) {
drivers/md/bcache/journal.c+10−10
@@ -723,11 +723,11 @@ static void journal_write_endio(struct bio *bio) · 722 unmodified lines
723723 closure_put(&w->c->journal.io);
724724 }
725725
726−static void journal_write(struct closure *cl);
726+static CLOSURE_CALLBACK(journal_write);
727727
728−static void journal_write_done(struct closure *cl)
728+static CLOSURE_CALLBACK(journal_write_done)
729729 {
730− struct journal *j = container_of(cl, struct journal, io);
730+ closure_type(j, struct journal, io);
731731 struct journal_write *w = (j->cur == j->w)
732732 ? &j->w[1]
733733 : &j->w[0];
@@ -736,19 +736,19 @@ static void journal_write_done(struct closure *cl) · 2 unmodified lines
736736 continue_at_nobarrier(cl, journal_write, bch_journal_wq);
737737 }
738738
739−static void journal_write_unlock(struct closure *cl)
739+static CLOSURE_CALLBACK(journal_write_unlock)
740740 __releases(&c->journal.lock)
741741 {
742− struct cache_set *c = container_of(cl, struct cache_set, journal.io);
742+ closure_type(c, struct cache_set, journal.io);
743743
744744 c->journal.io_in_flight = 0;
745745 spin_unlock(&c->journal.lock);
746746 }
747747
748−static void journal_write_unlocked(struct closure *cl)
748+static CLOSURE_CALLBACK(journal_write_unlocked)
749749 __releases(c->journal.lock)
750750 {
751− struct cache_set *c = container_of(cl, struct cache_set, journal.io);
751+ closure_type(c, struct cache_set, journal.io);
752752 struct cache *ca = c->cache;
753753 struct journal_write *w = c->journal.cur;
754754 struct bkey *k = &c->journal.key;
@@ -823,12 +823,12 @@ static void journal_write_unlocked(struct closure *cl) · 68 unmodified lines
823823 continue_at(cl, journal_write_done, NULL);
824824 }
825825
826−static void journal_write(struct closure *cl)
826+static CLOSURE_CALLBACK(journal_write)
827827 {
828− struct cache_set *c = container_of(cl, struct cache_set, journal.io);
828+ closure_type(c, struct cache_set, journal.io);
829829
830830 spin_lock(&c->journal.lock);
831− journal_write_unlocked(cl);
831+ journal_write_unlocked(&cl->work);
832832 }
833833
834834 static void journal_try_write(struct cache_set *c)
drivers/md/bcache/movinggc.c+8−8
@@ -35,16 +35,16 @@ static bool moving_pred(struct keybuf *buf, struct bkey *k) · 34 unmodified lines
3535
3636 /* Moving GC - IO loop */
3737
38−static void moving_io_destructor(struct closure *cl)
38+static CLOSURE_CALLBACK(moving_io_destructor)
3939 {
40− struct moving_io *io = container_of(cl, struct moving_io, cl);
40+ closure_type(io, struct moving_io, cl);
4141
4242 kfree(io);
4343 }
4444
45−static void write_moving_finish(struct closure *cl)
45+static CLOSURE_CALLBACK(write_moving_finish)
4646 {
47− struct moving_io *io = container_of(cl, struct moving_io, cl);
47+ closure_type(io, struct moving_io, cl);
4848 struct bio *bio = &io->bio.bio;
4949
5050 bio_free_pages(bio);
@@ -89,9 +89,9 @@ static void moving_init(struct moving_io *io) · 38 unmodified lines
8989 bch_bio_map(bio, NULL);
9090 }
9191
92−static void write_moving(struct closure *cl)
92+static CLOSURE_CALLBACK(write_moving)
9393 {
94− struct moving_io *io = container_of(cl, struct moving_io, cl);
94+ closure_type(io, struct moving_io, cl);
9595 struct data_insert_op *op = &io->op;
9696
9797 if (!op->status) {
@@ -113,9 +113,9 @@ static void write_moving(struct closure *cl) · 15 unmodified lines
113113 continue_at(cl, write_moving_finish, op->wq);
114114 }
115115
116−static void read_moving_submit(struct closure *cl)
116+static CLOSURE_CALLBACK(read_moving_submit)
117117 {
118− struct moving_io *io = container_of(cl, struct moving_io, cl);
118+ closure_type(io, struct moving_io, cl);
119119 struct bio *bio = &io->bio.bio;
120120
121121 bch_submit_bbio(bio, io->op.c, &io->w->key, 0);
drivers/md/bcache/request.c+37−37
@@ -25,7 +25,7 @@ · 24 unmodified lines
2525
2626 struct kmem_cache *bch_search_cache;
2727
28−static void bch_data_insert_start(struct closure *cl);
28+static CLOSURE_CALLBACK(bch_data_insert_start);
2929
3030 static unsigned int cache_mode(struct cached_dev *dc)
3131 {
@@ -55,9 +55,9 @@ static void bio_csum(struct bio *bio, struct bkey *k) · 23 unmodified lines
5555
5656 /* Insert data into cache */
5757
58−static void bch_data_insert_keys(struct closure *cl)
58+static CLOSURE_CALLBACK(bch_data_insert_keys)
5959 {
60− struct data_insert_op *op = container_of(cl, struct data_insert_op, cl);
60+ closure_type(op, struct data_insert_op, cl);
6161 atomic_t *journal_ref = NULL;
6262 struct bkey *replace_key = op->replace ? &op->replace_key : NULL;
6363 int ret;
@@ -136,9 +136,9 @@ out: · 72 unmodified lines
136136 continue_at(cl, bch_data_insert_keys, op->wq);
137137 }
138138
139−static void bch_data_insert_error(struct closure *cl)
139+static CLOSURE_CALLBACK(bch_data_insert_error)
140140 {
141− struct data_insert_op *op = container_of(cl, struct data_insert_op, cl);
141+ closure_type(op, struct data_insert_op, cl);
142142
143143 /*
144144 * Our data write just errored, which means we've got a bunch of keys to
@@ -163,7 +163,7 @@ static void bch_data_insert_error(struct closure *cl) · 18 unmodified lines
163163
164164 op->insert_keys.top = dst;
165165
166− bch_data_insert_keys(cl);
166+ bch_data_insert_keys(&cl->work);
167167 }
168168
169169 static void bch_data_insert_endio(struct bio *bio)
@@ -184,9 +184,9 @@ static void bch_data_insert_endio(struct bio *bio) · 14 unmodified lines
184184 bch_bbio_endio(op->c, bio, bio->bi_status, "writing data to cache");
185185 }
186186
187−static void bch_data_insert_start(struct closure *cl)
187+static CLOSURE_CALLBACK(bch_data_insert_start)
188188 {
189− struct data_insert_op *op = container_of(cl, struct data_insert_op, cl);
189+ closure_type(op, struct data_insert_op, cl);
190190 struct bio *bio = op->bio, *n;
191191
192192 if (op->bypass)
@@ -305,16 +305,16 @@ err: · 112 unmodified lines
305305 * If op->bypass is true, instead of inserting the data it invalidates the
306306 * region of the cache represented by op->bio and op->inode.
307307 */
308−void bch_data_insert(struct closure *cl)
308+CLOSURE_CALLBACK(bch_data_insert)
309309 {
310− struct data_insert_op *op = container_of(cl, struct data_insert_op, cl);
310+ closure_type(op, struct data_insert_op, cl);
311311
312312 trace_bcache_write(op->c, op->inode, op->bio,
313313 op->writeback, op->bypass);
314314
315315 bch_keylist_init(&op->insert_keys);
316316 bio_get(op->bio);
317− bch_data_insert_start(cl);
317+ bch_data_insert_start(&cl->work);
318318 }
319319
320320 /*
@@ -575,9 +575,9 @@ static int cache_lookup_fn(struct btree_op *op, struct btree *b, struct bkey *k) · 254 unmodified lines
575575 return n == bio ? MAP_DONE : MAP_CONTINUE;
576576 }
577577
578−static void cache_lookup(struct closure *cl)
578+static CLOSURE_CALLBACK(cache_lookup)
579579 {
580− struct search *s = container_of(cl, struct search, iop.cl);
580+ closure_type(s, struct search, iop.cl);
581581 struct bio *bio = &s->bio.bio;
582582 struct cached_dev *dc;
583583 int ret;
@@ -698,9 +698,9 @@ static void do_bio_hook(struct search *s, · 114 unmodified lines
698698 bio_cnt_set(bio, 3);
699699 }
700700
701−static void search_free(struct closure *cl)
701+static CLOSURE_CALLBACK(search_free)
702702 {
703− struct search *s = container_of(cl, struct search, cl);
703+ closure_type(s, struct search, cl);
704704
705705 atomic_dec(&s->iop.c->search_inflight);
706706
@@ -749,20 +749,20 @@ static inline struct search *search_alloc(struct bio *bio, · 42 unmodified lines
749749
750750 /* Cached devices */
751751
752−static void cached_dev_bio_complete(struct closure *cl)
752+static CLOSURE_CALLBACK(cached_dev_bio_complete)
753753 {
754− struct search *s = container_of(cl, struct search, cl);
754+ closure_type(s, struct search, cl);
755755 struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
756756
757757 cached_dev_put(dc);
758− search_free(cl);
758+ search_free(&cl->work);
759759 }
760760
761761 /* Process reads */
762762
763−static void cached_dev_read_error_done(struct closure *cl)
763+static CLOSURE_CALLBACK(cached_dev_read_error_done)
764764 {
765− struct search *s = container_of(cl, struct search, cl);
765+ closure_type(s, struct search, cl);
766766
767767 if (s->iop.replace_collision)
768768 bch_mark_cache_miss_collision(s->iop.c, s->d);
@@ -770,12 +770,12 @@ static void cached_dev_read_error_done(struct closure *cl) · 1 unmodified line
770770 if (s->iop.bio)
771771 bio_free_pages(s->iop.bio);
772772
773− cached_dev_bio_complete(cl);
773+ cached_dev_bio_complete(&cl->work);
774774 }
775775
776−static void cached_dev_read_error(struct closure *cl)
776+static CLOSURE_CALLBACK(cached_dev_read_error)
777777 {
778− struct search *s = container_of(cl, struct search, cl);
778+ closure_type(s, struct search, cl);
779779 struct bio *bio = &s->bio.bio;
780780
781781 /*
@@ -801,9 +801,9 @@ static void cached_dev_read_error(struct closure *cl) · 19 unmodified lines
801801 continue_at(cl, cached_dev_read_error_done, NULL);
802802 }
803803
804−static void cached_dev_cache_miss_done(struct closure *cl)
804+static CLOSURE_CALLBACK(cached_dev_cache_miss_done)
805805 {
806− struct search *s = container_of(cl, struct search, cl);
806+ closure_type(s, struct search, cl);
807807 struct bcache_device *d = s->d;
808808
809809 if (s->iop.replace_collision)
@@ -812,13 +812,13 @@ static void cached_dev_cache_miss_done(struct closure *cl) · 2 unmodified lines
812812 if (s->iop.bio)
813813 bio_free_pages(s->iop.bio);
814814
815− cached_dev_bio_complete(cl);
815+ cached_dev_bio_complete(&cl->work);
816816 closure_put(&d->cl);
817817 }
818818
819−static void cached_dev_read_done(struct closure *cl)
819+static CLOSURE_CALLBACK(cached_dev_read_done)
820820 {
821− struct search *s = container_of(cl, struct search, cl);
821+ closure_type(s, struct search, cl);
822822 struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
823823
824824 /*
@@ -858,9 +858,9 @@ static void cached_dev_read_done(struct closure *cl) · 33 unmodified lines
858858 continue_at(cl, cached_dev_cache_miss_done, NULL);
859859 }
860860
861−static void cached_dev_read_done_bh(struct closure *cl)
861+static CLOSURE_CALLBACK(cached_dev_read_done_bh)
862862 {
863− struct search *s = container_of(cl, struct search, cl);
863+ closure_type(s, struct search, cl);
864864 struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
865865
866866 bch_mark_cache_accounting(s->iop.c, s->d,
@@ -955,13 +955,13 @@ static void cached_dev_read(struct cached_dev *dc, struct search *s) · 88 unmodified lines
955955
956956 /* Process writes */
957957
958−static void cached_dev_write_complete(struct closure *cl)
958+static CLOSURE_CALLBACK(cached_dev_write_complete)
959959 {
960− struct search *s = container_of(cl, struct search, cl);
960+ closure_type(s, struct search, cl);
961961 struct cached_dev *dc = container_of(s->d, struct cached_dev, disk);
962962
963963 up_read_non_owner(&dc->writeback_lock);
964− cached_dev_bio_complete(cl);
964+ cached_dev_bio_complete(&cl->work);
965965 }
966966
967967 static void cached_dev_write(struct cached_dev *dc, struct search *s)
@@ -1048,9 +1048,9 @@ insert_data: · 80 unmodified lines
10481048 continue_at(cl, cached_dev_write_complete, NULL);
10491049 }
10501050
1051−static void cached_dev_nodata(struct closure *cl)
1051+static CLOSURE_CALLBACK(cached_dev_nodata)
10521052 {
1053− struct search *s = container_of(cl, struct search, cl);
1053+ closure_type(s, struct search, cl);
10541054 struct bio *bio = &s->bio.bio;
10551055
10561056 if (s->iop.flush_journal)
@@ -1265,9 +1265,9 @@ static int flash_dev_cache_miss(struct btree *b, struct search *s, · 208 unmodified lines
12651265 return MAP_CONTINUE;
12661266 }
12671267
1268−static void flash_dev_nodata(struct closure *cl)
1268+static CLOSURE_CALLBACK(flash_dev_nodata)
12691269 {
1270− struct search *s = container_of(cl, struct search, cl);
1270+ closure_type(s, struct search, cl);
12711271
12721272 if (s->iop.flush_journal)
12731273 bch_journal_meta(s->iop.c, cl);
drivers/md/bcache/request.h+1−1
@@ -34,7 +34,7 @@ struct data_insert_op { · 33 unmodified lines
3434 };
3535
3636 unsigned int bch_get_congested(const struct cache_set *c);
37−void bch_data_insert(struct closure *cl);
37+CLOSURE_CALLBACK(bch_data_insert);
3838
3939 void bch_cached_dev_request_init(struct cached_dev *dc);
4040 void cached_dev_submit_bio(struct bio *bio);
drivers/md/bcache/super.c+23−21
@@ -327,9 +327,9 @@ static void __write_super(struct cache_sb *sb, struct cache_sb_disk *out, · 326 unmodified lines
327327 submit_bio(bio);
328328 }
329329
330−static void bch_write_bdev_super_unlock(struct closure *cl)
330+static CLOSURE_CALLBACK(bch_write_bdev_super_unlock)
331331 {
332− struct cached_dev *dc = container_of(cl, struct cached_dev, sb_write);
332+ closure_type(dc, struct cached_dev, sb_write);
333333
334334 up(&dc->sb_write_mutex);
335335 }
@@ -363,9 +363,9 @@ static void write_super_endio(struct bio *bio) · 27 unmodified lines
363363 closure_put(&ca->set->sb_write);
364364 }
365365
366−static void bcache_write_super_unlock(struct closure *cl)
366+static CLOSURE_CALLBACK(bcache_write_super_unlock)
367367 {
368− struct cache_set *c = container_of(cl, struct cache_set, sb_write);
368+ closure_type(c, struct cache_set, sb_write);
369369
370370 up(&c->sb_write_mutex);
371371 }
@@ -407,9 +407,9 @@ static void uuid_endio(struct bio *bio) · 35 unmodified lines
407407 closure_put(cl);
408408 }
409409
410−static void uuid_io_unlock(struct closure *cl)
410+static CLOSURE_CALLBACK(uuid_io_unlock)
411411 {
412− struct cache_set *c = container_of(cl, struct cache_set, uuid_write);
412+ closure_type(c, struct cache_set, uuid_write);
413413
414414 up(&c->uuid_write_mutex);
415415 }
@@ -905,6 +905,8 @@ static int bcache_device_init(struct bcache_device *d, unsigned int block_size, · 489 unmodified lines
905905
906906 if (!d->stripe_size)
907907 d->stripe_size = 1 << 31;
908+ else if (d->stripe_size < BCH_MIN_STRIPE_SZ)
909+ d->stripe_size = roundup(BCH_MIN_STRIPE_SZ, d->stripe_size);
908910
909911 n = DIV_ROUND_UP_ULL(sectors, d->stripe_size);
910912 if (!n || n > max_stripes) {
@@ -1342,9 +1344,9 @@ void bch_cached_dev_release(struct kobject *kobj) · 431 unmodified lines
13421344 module_put(THIS_MODULE);
13431345 }
13441346
1345−static void cached_dev_free(struct closure *cl)
1347+static CLOSURE_CALLBACK(cached_dev_free)
13461348 {
1347− struct cached_dev *dc = container_of(cl, struct cached_dev, disk.cl);
1349+ closure_type(dc, struct cached_dev, disk.cl);
13481350
13491351 if (test_and_clear_bit(BCACHE_DEV_WB_RUNNING, &dc->disk.flags))
13501352 cancel_writeback_rate_update_dwork(dc);
@@ -1376,9 +1378,9 @@ static void cached_dev_free(struct closure *cl) · 25 unmodified lines
13761378 kobject_put(&dc->disk.kobj);
13771379 }
13781380
1379−static void cached_dev_flush(struct closure *cl)
1381+static CLOSURE_CALLBACK(cached_dev_flush)
13801382 {
1381− struct cached_dev *dc = container_of(cl, struct cached_dev, disk.cl);
1383+ closure_type(dc, struct cached_dev, disk.cl);
13821384 struct bcache_device *d = &dc->disk;
13831385
13841386 mutex_lock(&bch_register_lock);
@@ -1497,9 +1499,9 @@ void bch_flash_dev_release(struct kobject *kobj) · 112 unmodified lines
14971499 kfree(d);
14981500 }
14991501
1500−static void flash_dev_free(struct closure *cl)
1502+static CLOSURE_CALLBACK(flash_dev_free)
15011503 {
1502− struct bcache_device *d = container_of(cl, struct bcache_device, cl);
1504+ closure_type(d, struct bcache_device, cl);
15031505
15041506 mutex_lock(&bch_register_lock);
15051507 atomic_long_sub(bcache_dev_sectors_dirty(d),
@@ -1510,9 +1512,9 @@ static void flash_dev_free(struct closure *cl) · 4 unmodified lines
15101512 kobject_put(&d->kobj);
15111513 }
15121514
1513−static void flash_dev_flush(struct closure *cl)
1515+static CLOSURE_CALLBACK(flash_dev_flush)
15141516 {
1515− struct bcache_device *d = container_of(cl, struct bcache_device, cl);
1517+ closure_type(d, struct bcache_device, cl);
15161518
15171519 mutex_lock(&bch_register_lock);
15181520 bcache_device_unlink(d);
@@ -1668,9 +1670,9 @@ void bch_cache_set_release(struct kobject *kobj) · 149 unmodified lines
16681670 module_put(THIS_MODULE);
16691671 }
16701672
1671−static void cache_set_free(struct closure *cl)
1673+static CLOSURE_CALLBACK(cache_set_free)
16721674 {
1673− struct cache_set *c = container_of(cl, struct cache_set, cl);
1675+ closure_type(c, struct cache_set, cl);
16741676 struct cache *ca;
16751677
16761678 debugfs_remove(c->debug);
@@ -1709,9 +1711,9 @@ static void cache_set_free(struct closure *cl) · 32 unmodified lines
17091711 kobject_put(&c->kobj);
17101712 }
17111713
1712−static void cache_set_flush(struct closure *cl)
1714+static CLOSURE_CALLBACK(cache_set_flush)
17131715 {
1714− struct cache_set *c = container_of(cl, struct cache_set, caching);
1716+ closure_type(c, struct cache_set, caching);
17151717 struct cache *ca = c->cache;
17161718 struct btree *b;
17171719
@@ -1806,9 +1808,9 @@ static void conditional_stop_bcache_device(struct cache_set *c, · 88 unmodified lines
18061808 }
18071809 }
18081810
1809−static void __cache_set_unregister(struct closure *cl)
1811+static CLOSURE_CALLBACK(__cache_set_unregister)
18101812 {
1811− struct cache_set *c = container_of(cl, struct cache_set, caching);
1813+ closure_type(c, struct cache_set, caching);
18121814 struct cached_dev *dc;
18131815 struct bcache_device *d;
18141816 size_t i;
@@ -2016,7 +2018,7 @@ static int run_cache_set(struct cache_set *c) · 201 unmodified lines
20162018 c->root = bch_btree_node_get(c, NULL, k,
20172019 j->btree_level,
20182020 true, NULL);
2019− if (IS_ERR_OR_NULL(c->root))
2021+ if (IS_ERR(c->root))
20202022 goto err;
20212023
20222024 list_del_init(&c->root->list);
drivers/md/bcache/sysfs.c+1−1
@@ -1104,7 +1104,7 @@ SHOW(__bch_cache) · 1103 unmodified lines
11041104 sum += INITIAL_PRIO - cached[i];
11051105
11061106 if (n)
1107− do_div(sum, n);
1107+ sum = div64_u64(sum, n);
11081108
11091109 for (i = 0; i < ARRAY_SIZE(q); i++)
11101110 q[i] = INITIAL_PRIO - cached[n * (i + 1) /
drivers/md/bcache/writeback.c+26−14
@@ -341,16 +341,16 @@ static void dirty_init(struct keybuf_key *w) · 340 unmodified lines
341341 bch_bio_map(bio, NULL);
342342 }
343343
344−static void dirty_io_destructor(struct closure *cl)
344+static CLOSURE_CALLBACK(dirty_io_destructor)
345345 {
346− struct dirty_io *io = container_of(cl, struct dirty_io, cl);
346+ closure_type(io, struct dirty_io, cl);
347347
348348 kfree(io);
349349 }
350350
351−static void write_dirty_finish(struct closure *cl)
351+static CLOSURE_CALLBACK(write_dirty_finish)
352352 {
353− struct dirty_io *io = container_of(cl, struct dirty_io, cl);
353+ closure_type(io, struct dirty_io, cl);
354354 struct keybuf_key *w = io->bio.bi_private;
355355 struct cached_dev *dc = io->dc;
356356
@@ -400,9 +400,9 @@ static void dirty_endio(struct bio *bio) · 43 unmodified lines
400400 closure_put(&io->cl);
401401 }
402402
403−static void write_dirty(struct closure *cl)
403+static CLOSURE_CALLBACK(write_dirty)
404404 {
405− struct dirty_io *io = container_of(cl, struct dirty_io, cl);
405+ closure_type(io, struct dirty_io, cl);
406406 struct keybuf_key *w = io->bio.bi_private;
407407 struct cached_dev *dc = io->dc;
408408
@@ -462,9 +462,9 @@ static void read_dirty_endio(struct bio *bio) · 53 unmodified lines
462462 dirty_endio(bio);
463463 }
464464
465−static void read_dirty_submit(struct closure *cl)
465+static CLOSURE_CALLBACK(read_dirty_submit)
466466 {
467− struct dirty_io *io = container_of(cl, struct dirty_io, cl);
467+ closure_type(io, struct dirty_io, cl);
468468
469469 closure_bio_submit(io->dc->disk.c, &io->bio, cl);
470470
@@ -913,7 +913,7 @@ static int bch_dirty_init_thread(void *arg) · 442 unmodified lines
913913 int cur_idx, prev_idx, skip_nr;
914914
915915 k = p = NULL;
916− cur_idx = prev_idx = 0;
916+ prev_idx = 0;
917917
918918 bch_btree_iter_init(&c->root->keys, &iter, NULL);
919919 k = bch_btree_iter_next_filter(&iter, &c->root->keys, bch_ptr_bad);
@@ -977,24 +977,35 @@ static int bch_btre_dirty_init_thread_nr(void) · 57 unmodified lines
977977 void bch_sectors_dirty_init(struct bcache_device *d)
978978 {
979979 int i;
980+ struct btree *b = NULL;
980981 struct bkey *k = NULL;
981982 struct btree_iter iter;
982983 struct sectors_dirty_init op;
983984 struct cache_set *c = d->c;
984985 struct bch_dirty_init_state state;
985986
987+retry_lock:
988+ b = c->root;
989+ rw_lock(0, b, b->level);
990+ if (b != c->root) {
991+ rw_unlock(0, b);
992+ goto retry_lock;
993+ }
994+
986995 /* Just count root keys if no leaf node */
987− rw_lock(0, c->root, c->root->level);
988996 if (c->root->level == 0) {
989997 bch_btree_op_init(&op.op, -1);
990998 op.inode = d->id;
991999 op.count = 0;
9921000
9931001 for_each_key_filter(&c->root->keys,
994− k, &iter, bch_ptr_invalid)
1002+ k, &iter, bch_ptr_invalid) {
1003+ if (KEY_INODE(k) != op.inode)
1004+ continue;
9951005 sectors_dirty_init_fn(&op.op, c->root, k);
1006+ }
9961007
997− rw_unlock(0, c->root);
1008+ rw_unlock(0, b);
9981009 return;
9991010 }
10001011
@@ -1014,23 +1025,24 @@ void bch_sectors_dirty_init(struct bcache_device *d) · 13 unmodified lines
10141025 if (atomic_read(&state.enough))
10151026 break;
10161027
1028+ atomic_inc(&state.started);
10171029 state.infos[i].state = &state;
10181030 state.infos[i].thread =
10191031 kthread_run(bch_dirty_init_thread, &state.infos[i],
10201032 "bch_dirtcnt[%d]", i);
10211033 if (IS_ERR(state.infos[i].thread)) {
10221034 pr_err("fails to run thread bch_dirty_init[%d]\n", i);
1035+ atomic_dec(&state.started);
10231036 for (--i; i >= 0; i--)
10241037 kthread_stop(state.infos[i].thread);
10251038 goto out;
10261039 }
1027− atomic_inc(&state.started);
10281040 }
10291041
10301042 out:
10311043 /* Must wait for all threads to stop. */
10321044 wait_event(state.wait, atomic_read(&state.started) == 0);
1033− rw_unlock(0, c->root);
1045+ rw_unlock(0, b);
10341046 }
10351047
10361048 void bch_cached_dev_writeback_init(struct cached_dev *dc)
drivers/md/dm-bufio.c+62−25
@@ -254,7 +254,7 @@ enum evict_result { · 253 unmodified lines
254254
255255 typedef enum evict_result (*le_predicate)(struct lru_entry *le, void *context);
256256
257−static struct lru_entry *lru_evict(struct lru *lru, le_predicate pred, void *context)
257+static struct lru_entry *lru_evict(struct lru *lru, le_predicate pred, void *context, bool no_sleep)
258258 {
259259 unsigned long tested = 0;
260260 struct list_head *h = lru->cursor;
@@ -295,7 +295,8 @@ static struct lru_entry *lru_evict(struct lru *lru, le_predicate pred, void *con · 34 unmodified lines
295295
296296 h = h->next;
297297
298− cond_resched();
298+ if (!no_sleep)
299+ cond_resched();
299300 }
300301
301302 return NULL;
@@ -382,7 +383,10 @@ struct dm_buffer { · 80 unmodified lines
382383 */
383384
384385 struct buffer_tree {
385− struct rw_semaphore lock;
386+ union {
387+ struct rw_semaphore lock;
388+ rwlock_t spinlock;
389+ } u;
386390 struct rb_root root;
387391 } ____cacheline_aligned_in_smp;
388392
@@ -393,9 +397,12 @@ struct dm_buffer_cache { · 4 unmodified lines
393397 * on the locks.
394398 */
395399 unsigned int num_locks;
400+ bool no_sleep;
396401 struct buffer_tree trees[];
397402 };
398403
404+static DEFINE_STATIC_KEY_FALSE(no_sleep_enabled);
405+
399406 static inline unsigned int cache_index(sector_t block, unsigned int num_locks)
400407 {
401408 return dm_hash_locks_index(block, num_locks);
@@ -403,22 +410,34 @@ static inline unsigned int cache_index(sector_t block, unsigned int num_locks) · 1 unmodified line
403410
404411 static inline void cache_read_lock(struct dm_buffer_cache *bc, sector_t block)
405412 {
406− down_read(&bc->trees[cache_index(block, bc->num_locks)].lock);
413+ if (static_branch_unlikely(&no_sleep_enabled) && bc->no_sleep)
414+ read_lock_bh(&bc->trees[cache_index(block, bc->num_locks)].u.spinlock);
415+ else
416+ down_read(&bc->trees[cache_index(block, bc->num_locks)].u.lock);
407417 }
408418
409419 static inline void cache_read_unlock(struct dm_buffer_cache *bc, sector_t block)
410420 {
411− up_read(&bc->trees[cache_index(block, bc->num_locks)].lock);
421+ if (static_branch_unlikely(&no_sleep_enabled) && bc->no_sleep)
422+ read_unlock_bh(&bc->trees[cache_index(block, bc->num_locks)].u.spinlock);
423+ else
424+ up_read(&bc->trees[cache_index(block, bc->num_locks)].u.lock);
412425 }
413426
414427 static inline void cache_write_lock(struct dm_buffer_cache *bc, sector_t block)
415428 {
416− down_write(&bc->trees[cache_index(block, bc->num_locks)].lock);
429+ if (static_branch_unlikely(&no_sleep_enabled) && bc->no_sleep)
430+ write_lock_bh(&bc->trees[cache_index(block, bc->num_locks)].u.spinlock);
431+ else
432+ down_write(&bc->trees[cache_index(block, bc->num_locks)].u.lock);
417433 }
418434
419435 static inline void cache_write_unlock(struct dm_buffer_cache *bc, sector_t block)
420436 {
421− up_write(&bc->trees[cache_index(block, bc->num_locks)].lock);
437+ if (static_branch_unlikely(&no_sleep_enabled) && bc->no_sleep)
438+ write_unlock_bh(&bc->trees[cache_index(block, bc->num_locks)].u.spinlock);
439+ else
440+ up_write(&bc->trees[cache_index(block, bc->num_locks)].u.lock);
422441 }
423442
424443 /*
@@ -442,18 +461,32 @@ static void lh_init(struct lock_history *lh, struct dm_buffer_cache *cache, bool · 17 unmodified lines
442461
443462 static void __lh_lock(struct lock_history *lh, unsigned int index)
444463 {
445− if (lh->write)
446− down_write(&lh->cache->trees[index].lock);
447− else
448− down_read(&lh->cache->trees[index].lock);
464+ if (lh->write) {
465+ if (static_branch_unlikely(&no_sleep_enabled) && lh->cache->no_sleep)
466+ write_lock_bh(&lh->cache->trees[index].u.spinlock);
467+ else
468+ down_write(&lh->cache->trees[index].u.lock);
469+ } else {
470+ if (static_branch_unlikely(&no_sleep_enabled) && lh->cache->no_sleep)
471+ read_lock_bh(&lh->cache->trees[index].u.spinlock);
472+ else
473+ down_read(&lh->cache->trees[index].u.lock);
474+ }
449475 }
450476
451477 static void __lh_unlock(struct lock_history *lh, unsigned int index)
452478 {
453− if (lh->write)
454− up_write(&lh->cache->trees[index].lock);
455− else
456− up_read(&lh->cache->trees[index].lock);
479+ if (lh->write) {
480+ if (static_branch_unlikely(&no_sleep_enabled) && lh->cache->no_sleep)
481+ write_unlock_bh(&lh->cache->trees[index].u.spinlock);
482+ else
483+ up_write(&lh->cache->trees[index].u.lock);
484+ } else {
485+ if (static_branch_unlikely(&no_sleep_enabled) && lh->cache->no_sleep)
486+ read_unlock_bh(&lh->cache->trees[index].u.spinlock);
487+ else
488+ up_read(&lh->cache->trees[index].u.lock);
489+ }
457490 }
458491
459492 /*
@@ -502,14 +535,18 @@ static struct dm_buffer *list_to_buffer(struct list_head *l) · 42 unmodified lines
502535 return le_to_buffer(le);
503536 }
504537
505−static void cache_init(struct dm_buffer_cache *bc, unsigned int num_locks)
538+static void cache_init(struct dm_buffer_cache *bc, unsigned int num_locks, bool no_sleep)
506539 {
507540 unsigned int i;
508541
509542 bc->num_locks = num_locks;
543+ bc->no_sleep = no_sleep;
510544
511545 for (i = 0; i < bc->num_locks; i++) {
512− init_rwsem(&bc->trees[i].lock);
546+ if (no_sleep)
547+ rwlock_init(&bc->trees[i].u.spinlock);
548+ else
549+ init_rwsem(&bc->trees[i].u.lock);
513550 bc->trees[i].root = RB_ROOT;
514551 }
515552
@@ -648,7 +685,7 @@ static struct dm_buffer *__cache_evict(struct dm_buffer_cache *bc, int list_mode · 132 unmodified lines
648685 struct lru_entry *le;
649686 struct dm_buffer *b;
650687
651− le = lru_evict(&bc->lru[list_mode], __evict_pred, &w);
688+ le = lru_evict(&bc->lru[list_mode], __evict_pred, &w, bc->no_sleep);
652689 if (!le)
653690 return NULL;
654691
@@ -702,7 +739,7 @@ static void __cache_mark_many(struct dm_buffer_cache *bc, int old_mode, int new_ · 47 unmodified lines
702739 struct evict_wrapper w = {.lh = lh, .pred = pred, .context = context};
703740
704741 while (true) {
705− le = lru_evict(&bc->lru[old_mode], __evict_pred, &w);
742+ le = lru_evict(&bc->lru[old_mode], __evict_pred, &w, bc->no_sleep);
706743 if (!le)
707744 break;
708745
@@ -915,10 +952,11 @@ static void cache_remove_range(struct dm_buffer_cache *bc, · 206 unmodified lines
915952 {
916953 unsigned int i;
917954
955+ BUG_ON(bc->no_sleep);
918956 for (i = 0; i < bc->num_locks; i++) {
919− down_write(&bc->trees[i].lock);
957+ down_write(&bc->trees[i].u.lock);
920958 __remove_range(bc, &bc->trees[i].root, begin, end, pred, release);
921− up_write(&bc->trees[i].lock);
959+ up_write(&bc->trees[i].u.lock);
922960 }
923961 }
924962
@@ -979,8 +1017,6 @@ struct dm_bufio_client { · 54 unmodified lines
9791017 struct dm_buffer_cache cache; /* must be last member */
9801018 };
9811019
982−static DEFINE_STATIC_KEY_FALSE(no_sleep_enabled);
983−
9841020 /*----------------------------------------------------------------*/
9851021
9861022 #define dm_bufio_in_request() (!!current->bio_list)
@@ -1871,7 +1907,8 @@ static void *new_read(struct dm_bufio_client *c, sector_t block, · 884 unmodified lines
18711907 if (need_submit)
18721908 submit_io(b, REQ_OP_READ, read_endio);
18731909
1874− wait_on_bit_io(&b->state, B_READING, TASK_UNINTERRUPTIBLE);
1910+ if (nf != NF_GET) /* we already tested this condition above */
1911+ wait_on_bit_io(&b->state, B_READING, TASK_UNINTERRUPTIBLE);
18751912
18761913 if (b->read_error) {
18771914 int error = blk_status_to_errno(b->read_error);
@@ -2421,7 +2458,7 @@ struct dm_bufio_client *dm_bufio_client_create(struct block_device *bdev, unsign · 543 unmodified lines
24212458 r = -ENOMEM;
24222459 goto bad_client;
24232460 }
2424− cache_init(&c->cache, num_locks);
2461+ cache_init(&c->cache, num_locks, (flags & DM_BUFIO_CLIENT_NO_SLEEP) != 0);
24252462
24262463 c->bdev = bdev;
24272464 c->block_size = block_size;
drivers/md/dm-crypt.c+1−1
@@ -1673,7 +1673,7 @@ static struct bio *crypt_alloc_buffer(struct dm_crypt_io *io, unsigned int size) · 1672 unmodified lines
16731673 unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
16741674 gfp_t gfp_mask = GFP_NOWAIT | __GFP_HIGHMEM;
16751675 unsigned int remaining_size;
1676− unsigned int order = MAX_ORDER - 1;
1676+ unsigned int order = MAX_ORDER;
16771677
16781678 retry:
16791679 if (unlikely(gfp_mask & __GFP_DIRECT_RECLAIM))
drivers/md/dm-delay.c+52−60
@@ -33,7 +33,7 @@ struct delay_c { · 32 unmodified lines
3333 struct work_struct flush_expired_bios;
3434 struct list_head delayed_bios;
3535 struct task_struct *worker;
36− atomic_t may_delay;
36+ bool may_delay;
3737
3838 struct delay_class read;
3939 struct delay_class write;
@@ -73,39 +73,6 @@ static inline bool delay_is_fast(struct delay_c *dc) · 33 unmodified lines
7373 return !!dc->worker;
7474 }
7575
76−static void flush_delayed_bios_fast(struct delay_c *dc, bool flush_all)
77−{
78− struct dm_delay_info *delayed, *next;
79−
80− mutex_lock(&delayed_bios_lock);
81− list_for_each_entry_safe(delayed, next, &dc->delayed_bios, list) {
82− if (flush_all || time_after_eq(jiffies, delayed->expires)) {
83− struct bio *bio = dm_bio_from_per_bio_data(delayed,
84− sizeof(struct dm_delay_info));
85− list_del(&delayed->list);
86− dm_submit_bio_remap(bio, NULL);
87− delayed->class->ops--;
88− }
89− }
90− mutex_unlock(&delayed_bios_lock);
91−}
92−
93−static int flush_worker_fn(void *data)
94−{
95− struct delay_c *dc = data;
96−
97− while (1) {
98− flush_delayed_bios_fast(dc, false);
99− if (unlikely(list_empty(&dc->delayed_bios))) {
100− set_current_state(TASK_INTERRUPTIBLE);
101− schedule();
102− } else
103− cond_resched();
104− }
105−
106− return 0;
107−}
108−
10976 static void flush_bios(struct bio *bio)
11077 {
11178 struct bio *n;
@@ -118,36 +85,61 @@ static void flush_bios(struct bio *bio) · 6 unmodified lines
11885 }
11986 }
12087
121−static struct bio *flush_delayed_bios(struct delay_c *dc, bool flush_all)
88+static void flush_delayed_bios(struct delay_c *dc, bool flush_all)
12289 {
12390 struct dm_delay_info *delayed, *next;
91+ struct bio_list flush_bio_list;
12492 unsigned long next_expires = 0;
125− unsigned long start_timer = 0;
126− struct bio_list flush_bios = { };
93+ bool start_timer = false;
94+ bio_list_init(&flush_bio_list);
12795
12896 mutex_lock(&delayed_bios_lock);
12997 list_for_each_entry_safe(delayed, next, &dc->delayed_bios, list) {
98+ cond_resched();
13099 if (flush_all || time_after_eq(jiffies, delayed->expires)) {
131100 struct bio *bio = dm_bio_from_per_bio_data(delayed,
132101 sizeof(struct dm_delay_info));
133102 list_del(&delayed->list);
134− bio_list_add(&flush_bios, bio);
103+ bio_list_add(&flush_bio_list, bio);
135104 delayed->class->ops--;
136105 continue;
137106 }
138107
139− if (!start_timer) {
140− start_timer = 1;
141− next_expires = delayed->expires;
142− } else
143− next_expires = min(next_expires, delayed->expires);
108+ if (!delay_is_fast(dc)) {
109+ if (!start_timer) {
110+ start_timer = true;
111+ next_expires = delayed->expires;
112+ } else {
113+ next_expires = min(next_expires, delayed->expires);
114+ }
115+ }
144116 }
145117 mutex_unlock(&delayed_bios_lock);
146118
147119 if (start_timer)
148120 queue_timeout(dc, next_expires);
149121
150− return bio_list_get(&flush_bios);
122+ flush_bios(bio_list_get(&flush_bio_list));
123+}
124+
125+static int flush_worker_fn(void *data)
126+{
127+ struct delay_c *dc = data;
128+
129+ while (!kthread_should_stop()) {
130+ flush_delayed_bios(dc, false);
131+ mutex_lock(&delayed_bios_lock);
132+ if (unlikely(list_empty(&dc->delayed_bios))) {
133+ set_current_state(TASK_INTERRUPTIBLE);
134+ mutex_unlock(&delayed_bios_lock);
135+ schedule();
136+ } else {
137+ mutex_unlock(&delayed_bios_lock);
138+ cond_resched();
139+ }
140+ }
141+
142+ return 0;
151143 }
152144
153145 static void flush_expired_bios(struct work_struct *work)
@@ -155,10 +147,7 @@ static void flush_expired_bios(struct work_struct *work) · 1 unmodified line
155147 struct delay_c *dc;
156148
157149 dc = container_of(work, struct delay_c, flush_expired_bios);
158− if (delay_is_fast(dc))
159− flush_delayed_bios_fast(dc, false);
160− else
161− flush_bios(flush_delayed_bios(dc, false));
150+ flush_delayed_bios(dc, false);
162151 }
163152
164153 static void delay_dtr(struct dm_target *ti)
@@ -177,8 +166,7 @@ static void delay_dtr(struct dm_target *ti) · 12 unmodified lines
177166 if (dc->worker)
178167 kthread_stop(dc->worker);
179168
180− if (!delay_is_fast(dc))
181− mutex_destroy(&dc->timer_lock);
169+ mutex_destroy(&dc->timer_lock);
182170
183171 kfree(dc);
184172 }
@@ -236,7 +224,8 @@ static int delay_ctr(struct dm_target *ti, unsigned int argc, char **argv) · 51 unmodified lines
236224
237225 ti->private = dc;
238226 INIT_LIST_HEAD(&dc->delayed_bios);
239− atomic_set(&dc->may_delay, 1);
227+ mutex_init(&dc->timer_lock);
228+ dc->may_delay = true;
240229 dc->argc = argc;
241230
242231 ret = delay_class_ctr(ti, &dc->read, argv);
@@ -282,12 +271,12 @@ out: · 39 unmodified lines
282271 "dm-delay-flush-worker");
283272 if (IS_ERR(dc->worker)) {
284273 ret = PTR_ERR(dc->worker);
274+ dc->worker = NULL;
285275 goto bad;
286276 }
287277 } else {
288278 timer_setup(&dc->delay_timer, handle_delayed_timer, 0);
289279 INIT_WORK(&dc->flush_expired_bios, flush_expired_bios);
290− mutex_init(&dc->timer_lock);
291280 dc->kdelayd_wq = alloc_workqueue("kdelayd", WQ_MEM_RECLAIM, 0);
292281 if (!dc->kdelayd_wq) {
293282 ret = -EINVAL;
@@ -312,7 +301,7 @@ static int delay_bio(struct delay_c *dc, struct delay_class *c, struct bio *bio) · 18 unmodified lines
312301 struct dm_delay_info *delayed;
313302 unsigned long expires = 0;
314303
315− if (!c->delay || !atomic_read(&dc->may_delay))
304+ if (!c->delay)
316305 return DM_MAPIO_REMAPPED;
317306
318307 delayed = dm_per_bio_data(bio, sizeof(struct dm_delay_info));
@@ -321,6 +310,10 @@ static int delay_bio(struct delay_c *dc, struct delay_class *c, struct bio *bio) · 2 unmodified lines
321310 delayed->expires = expires = jiffies + msecs_to_jiffies(c->delay);
322311
323312 mutex_lock(&delayed_bios_lock);
313+ if (unlikely(!dc->may_delay)) {
314+ mutex_unlock(&delayed_bios_lock);
315+ return DM_MAPIO_REMAPPED;
316+ }
324317 c->ops++;
325318 list_add_tail(&delayed->list, &dc->delayed_bios);
326319 mutex_unlock(&delayed_bios_lock);
@@ -337,21 +330,20 @@ static void delay_presuspend(struct dm_target *ti) · 10 unmodified lines
337330 {
338331 struct delay_c *dc = ti->private;
339332
340− atomic_set(&dc->may_delay, 0);
333+ mutex_lock(&delayed_bios_lock);
334+ dc->may_delay = false;
335+ mutex_unlock(&delayed_bios_lock);
341336
342− if (delay_is_fast(dc))
343− flush_delayed_bios_fast(dc, true);
344− else {
337+ if (!delay_is_fast(dc))
345338 del_timer_sync(&dc->delay_timer);
346− flush_bios(flush_delayed_bios(dc, true));
347− }
339+ flush_delayed_bios(dc, true);
348340 }
349341
350342 static void delay_resume(struct dm_target *ti)
351343 {
352344 struct delay_c *dc = ti->private;
353345
354− atomic_set(&dc->may_delay, 1);
346+ dc->may_delay = true;
355347 }
356348
357349 static int delay_map(struct dm_target *ti, struct bio *bio)
drivers/md/dm-flakey.c+1−1
@@ -434,7 +434,7 @@ static struct bio *clone_bio(struct dm_target *ti, struct flakey_c *fc, struct b · 433 unmodified lines
434434
435435 remaining_size = size;
436436
437− order = MAX_ORDER - 1;
437+ order = MAX_ORDER;
438438 while (remaining_size) {
439439 struct page *pages;
440440 unsigned size_to_add, to_copy;
drivers/md/dm-verity-fec.c+4−3
@@ -24,7 +24,8 @@ bool verity_fec_is_enabled(struct dm_verity *v) · 23 unmodified lines
2424 */
2525 static inline struct dm_verity_fec_io *fec_io(struct dm_verity_io *io)
2626 {
27− return (struct dm_verity_fec_io *) verity_io_digest_end(io->v, io);
27+ return (struct dm_verity_fec_io *)
28+ ((char *)io + io->v->ti->per_io_data_size - sizeof(struct dm_verity_fec_io));
2829 }
2930
3031 /*
@@ -185,7 +186,7 @@ static int fec_is_erasure(struct dm_verity *v, struct dm_verity_io *io, · 154 unmodified lines
185186 {
186187 if (unlikely(verity_hash(v, verity_io_hash_req(v, io),
187188 data, 1 << v->data_dev_block_bits,
188− verity_io_real_digest(v, io))))
189+ verity_io_real_digest(v, io), true)))
189190 return 0;
190191
191192 return memcmp(verity_io_real_digest(v, io), want_digest,
@@ -386,7 +387,7 @@ static int fec_decode_rsb(struct dm_verity *v, struct dm_verity_io *io, · 194 unmodified lines
386387 /* Always re-validate the corrected block against the expected hash */
387388 r = verity_hash(v, verity_io_hash_req(v, io), fio->output,
388389 1 << v->data_dev_block_bits,
389− verity_io_real_digest(v, io));
390+ verity_io_real_digest(v, io), true);
390391 if (unlikely(r < 0))
391392 return r;
392393
drivers/md/dm-verity-target.c+17−13
@@ -135,20 +135,21 @@ static int verity_hash_update(struct dm_verity *v, struct ahash_request *req, · 134 unmodified lines
135135 * Wrapper for crypto_ahash_init, which handles verity salting.
136136 */
137137 static int verity_hash_init(struct dm_verity *v, struct ahash_request *req,
138− struct crypto_wait *wait)
138+ struct crypto_wait *wait, bool may_sleep)
139139 {
140140 int r;
141141
142142 ahash_request_set_tfm(req, v->tfm);
143− ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
144− CRYPTO_TFM_REQ_MAY_BACKLOG,
145− crypto_req_done, (void *)wait);
143+ ahash_request_set_callback(req,
144+ may_sleep ? CRYPTO_TFM_REQ_MAY_SLEEP | CRYPTO_TFM_REQ_MAY_BACKLOG : 0,
145+ crypto_req_done, (void *)wait);
146146 crypto_init_wait(wait);
147147
148148 r = crypto_wait_req(crypto_ahash_init(req), wait);
149149
150150 if (unlikely(r < 0)) {
151− DMERR("crypto_ahash_init failed: %d", r);
151+ if (r != -ENOMEM)
152+ DMERR("crypto_ahash_init failed: %d", r);
152153 return r;
153154 }
154155
@@ -179,12 +180,12 @@ out: · 24 unmodified lines
179180 }
180181
181182 int verity_hash(struct dm_verity *v, struct ahash_request *req,
182− const u8 *data, size_t len, u8 *digest)
183+ const u8 *data, size_t len, u8 *digest, bool may_sleep)
183184 {
184185 int r;
185186 struct crypto_wait wait;
186187
187− r = verity_hash_init(v, req, &wait);
188+ r = verity_hash_init(v, req, &wait, may_sleep);
188189 if (unlikely(r < 0))
189190 goto out;
190191
@@ -322,7 +323,7 @@ static int verity_verify_level(struct dm_verity *v, struct dm_verity_io *io, · 131 unmodified lines
322323
323324 r = verity_hash(v, verity_io_hash_req(v, io),
324325 data, 1 << v->hash_dev_block_bits,
325− verity_io_real_digest(v, io));
326+ verity_io_real_digest(v, io), !io->in_tasklet);
326327 if (unlikely(r < 0))
327328 goto release_ret_r;
328329
@@ -556,7 +557,7 @@ static int verity_verify_io(struct dm_verity_io *io) · 227 unmodified lines
556557 continue;
557558 }
558559
559− r = verity_hash_init(v, req, &wait);
560+ r = verity_hash_init(v, req, &wait, !io->in_tasklet);
560561 if (unlikely(r < 0))
561562 return r;
562563
@@ -641,7 +642,6 @@ static void verity_work(struct work_struct *w) · 78 unmodified lines
641642
642643 io->in_tasklet = false;
643644
644− verity_fec_init_io(io);
645645 verity_finish_io(io, errno_to_blk_status(verity_verify_io(io)));
646646 }
647647
@@ -652,7 +652,7 @@ static void verity_tasklet(unsigned long data) · 4 unmodified lines
652652
653653 io->in_tasklet = true;
654654 err = verity_verify_io(io);
655− if (err == -EAGAIN) {
655+ if (err == -EAGAIN || err == -ENOMEM) {
656656 /* fallback to retrying with work-queue */
657657 INIT_WORK(&io->work, verity_work);
658658 queue_work(io->v->verify_wq, &io->work);
@@ -667,7 +667,9 @@ static void verity_end_io(struct bio *bio) · 8 unmodified lines
667667 struct dm_verity_io *io = bio->bi_private;
668668
669669 if (bio->bi_status &&
670− (!verity_fec_is_enabled(io->v) || verity_is_system_shutting_down())) {
670+ (!verity_fec_is_enabled(io->v) ||
671+ verity_is_system_shutting_down() ||
672+ (bio->bi_opf & REQ_RAHEAD))) {
671673 verity_finish_io(io, bio->bi_status);
672674 return;
673675 }
@@ -791,6 +793,8 @@ static int verity_map(struct dm_target *ti, struct bio *bio) · 117 unmodified lines
791793 bio->bi_private = io;
792794 io->iter = bio->bi_iter;
793795
796+ verity_fec_init_io(io);
797+
794798 verity_submit_prefetch(v, io);
795799
796800 submit_bio_noacct(bio);
@@ -1033,7 +1037,7 @@ static int verity_alloc_zero_digest(struct dm_verity *v) · 236 unmodified lines
10331037 goto out;
10341038
10351039 r = verity_hash(v, req, zero_data, 1 << v->data_dev_block_bits,
1036− v->zero_digest);
1040+ v->zero_digest, true);
10371041
10381042 out:
10391043 kfree(req);
drivers/md/dm-verity.h+1−7
@@ -115,12 +115,6 @@ static inline u8 *verity_io_want_digest(struct dm_verity *v, · 114 unmodified lines
115115 return (u8 *)(io + 1) + v->ahash_reqsize + v->digest_size;
116116 }
117117
118−static inline u8 *verity_io_digest_end(struct dm_verity *v,
119− struct dm_verity_io *io)
120−{
121− return verity_io_want_digest(v, io) + v->digest_size;
122−}
123−
124118 extern int verity_for_bv_block(struct dm_verity *v, struct dm_verity_io *io,
125119 struct bvec_iter *iter,
126120 int (*process)(struct dm_verity *v,
@@ -128,7 +122,7 @@ extern int verity_for_bv_block(struct dm_verity *v, struct dm_verity_io *io, · 1 unmodified line
128122 u8 *data, size_t len));
129123
130124 extern int verity_hash(struct dm_verity *v, struct ahash_request *req,
131− const u8 *data, size_t len, u8 *digest);
125+ const u8 *data, size_t len, u8 *digest, bool may_sleep);
132126
133127 extern int verity_hash_for_block(struct dm_verity *v, struct dm_verity_io *io,
134128 sector_t block, u8 *digest, bool *is_zero);
drivers/md/md.c+78−69
@@ -490,7 +490,7 @@ int mddev_suspend(struct mddev *mddev, bool interruptible) · 489 unmodified lines
490490 }
491491 EXPORT_SYMBOL_GPL(mddev_suspend);
492492
493−void mddev_resume(struct mddev *mddev)
493+static void __mddev_resume(struct mddev *mddev, bool recovery_needed)
494494 {
495495 lockdep_assert_not_held(&mddev->reconfig_mutex);
496496
@@ -507,12 +507,18 @@ void mddev_resume(struct mddev *mddev) · 10 unmodified lines
507507 percpu_ref_resurrect(&mddev->active_io);
508508 wake_up(&mddev->sb_wait);
509509
510− set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
510+ if (recovery_needed)
511+ set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
511512 md_wakeup_thread(mddev->thread);
512513 md_wakeup_thread(mddev->sync_thread); /* possibly kick off a reshape */
513514
514515 mutex_unlock(&mddev->suspend_mutex);
515516 }
517+
518+void mddev_resume(struct mddev *mddev)
519+{
520+ return __mddev_resume(mddev, true);
521+}
516522 EXPORT_SYMBOL_GPL(mddev_resume);
517523
518524 /*
@@ -4840,25 +4846,29 @@ action_show(struct mddev *mddev, char *page) · 4321 unmodified lines
48404846 return sprintf(page, "%s\n", type);
48414847 }
48424848
4843−static void stop_sync_thread(struct mddev *mddev)
4849+/**
4850+ * stop_sync_thread() - wait for sync_thread to stop if it's running.
4851+ * @mddev: the array.
4852+ * @locked: if set, reconfig_mutex will still be held after this function
4853+ * return; if not set, reconfig_mutex will be released after this
4854+ * function return.
4855+ * @check_seq: if set, only wait for curent running sync_thread to stop, noted
4856+ * that new sync_thread can still start.
4857+ */
4858+static void stop_sync_thread(struct mddev *mddev, bool locked, bool check_seq)
48444859 {
4845− if (!test_bit(MD_RECOVERY_RUNNING, &mddev->recovery))
4846− return;
4860+ int sync_seq;
48474861
4848− if (mddev_lock(mddev))
4849− return;
4862+ if (check_seq)
4863+ sync_seq = atomic_read(&mddev->sync_seq);
48504864
4851− /*
4852− * Check again in case MD_RECOVERY_RUNNING is cleared before lock is
4853− * held.
4854− */
48554865 if (!test_bit(MD_RECOVERY_RUNNING, &mddev->recovery)) {
4856− mddev_unlock(mddev);
4866+ if (!locked)
4867+ mddev_unlock(mddev);
48574868 return;
48584869 }
48594870
4860− if (work_pending(&mddev->del_work))
4861− flush_workqueue(md_misc_wq);
4871+ mddev_unlock(mddev);
48624872
48634873 set_bit(MD_RECOVERY_INTR, &mddev->recovery);
48644874 /*
@@ -4866,21 +4876,28 @@ static void stop_sync_thread(struct mddev *mddev) · 1 unmodified line
48664876 * never happen
48674877 */
48684878 md_wakeup_thread_directly(mddev->sync_thread);
4879+ if (work_pending(&mddev->sync_work))
4880+ flush_work(&mddev->sync_work);
48694881
4870− mddev_unlock(mddev);
4882+ wait_event(resync_wait,
4883+ !test_bit(MD_RECOVERY_RUNNING, &mddev->recovery) ||
4884+ (check_seq && sync_seq != atomic_read(&mddev->sync_seq)));
4885+
4886+ if (locked)
4887+ mddev_lock_nointr(mddev);
48714888 }
48724889
48734890 static void idle_sync_thread(struct mddev *mddev)
48744891 {
4875− int sync_seq = atomic_read(&mddev->sync_seq);
4876−
48774892 mutex_lock(&mddev->sync_mutex);
48784893 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
4879− stop_sync_thread(mddev);
48804894
4881− wait_event(resync_wait, sync_seq != atomic_read(&mddev->sync_seq) ||
4882− !test_bit(MD_RECOVERY_RUNNING, &mddev->recovery));
4895+ if (mddev_lock(mddev)) {
4896+ mutex_unlock(&mddev->sync_mutex);
4897+ return;
4898+ }
48834899
4900+ stop_sync_thread(mddev, false, true);
48844901 mutex_unlock(&mddev->sync_mutex);
48854902 }
48864903
@@ -4888,11 +4905,13 @@ static void frozen_sync_thread(struct mddev *mddev) · 1 unmodified line
48884905 {
48894906 mutex_lock(&mddev->sync_mutex);
48904907 set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
4891− stop_sync_thread(mddev);
48924908
4893− wait_event(resync_wait, mddev->sync_thread == NULL &&
4894− !test_bit(MD_RECOVERY_RUNNING, &mddev->recovery));
4909+ if (mddev_lock(mddev)) {
4910+ mutex_unlock(&mddev->sync_mutex);
4911+ return;
4912+ }
48954913
4914+ stop_sync_thread(mddev, false, false);
48964915 mutex_unlock(&mddev->sync_mutex);
48974916 }
48984917
@@ -6264,14 +6283,7 @@ static void md_clean(struct mddev *mddev) · 1365 unmodified lines
62646283
62656284 static void __md_stop_writes(struct mddev *mddev)
62666285 {
6267− set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
6268− if (work_pending(&mddev->del_work))
6269− flush_workqueue(md_misc_wq);
6270− if (mddev->sync_thread) {
6271− set_bit(MD_RECOVERY_INTR, &mddev->recovery);
6272− md_reap_sync_thread(mddev);
6273− }
6274−
6286+ stop_sync_thread(mddev, true, false);
62756287 del_timer_sync(&mddev->safemode_timer);
62766288
62776289 if (mddev->pers && mddev->pers->quiesce) {
@@ -6355,25 +6367,16 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev) · 77 unmodified lines
63556367 int err = 0;
63566368 int did_freeze = 0;
63576369
6370+ if (mddev->external && test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags))
6371+ return -EBUSY;
6372+
63586373 if (!test_bit(MD_RECOVERY_FROZEN, &mddev->recovery)) {
63596374 did_freeze = 1;
63606375 set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
63616376 md_wakeup_thread(mddev->thread);
63626377 }
6363− if (test_bit(MD_RECOVERY_RUNNING, &mddev->recovery))
6364− set_bit(MD_RECOVERY_INTR, &mddev->recovery);
63656378
6366− /*
6367− * Thread might be blocked waiting for metadata update which will now
6368− * never happen
6369− */
6370− md_wakeup_thread_directly(mddev->sync_thread);
6371−
6372− if (mddev->external && test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags))
6373− return -EBUSY;
6374− mddev_unlock(mddev);
6375− wait_event(resync_wait, !test_bit(MD_RECOVERY_RUNNING,
6376− &mddev->recovery));
6379+ stop_sync_thread(mddev, false, false);
63776380 wait_event(mddev->sb_wait,
63786381 !test_bit(MD_SB_CHANGE_PENDING, &mddev->sb_flags));
63796382 mddev_lock_nointr(mddev);
@@ -6383,29 +6386,30 @@ static int md_set_readonly(struct mddev *mddev, struct block_device *bdev) · 3 unmodified lines
63836386 mddev->sync_thread ||
63846387 test_bit(MD_RECOVERY_RUNNING, &mddev->recovery)) {
63856388 pr_warn("md: %s still in use.\n",mdname(mddev));
6386− if (did_freeze) {
6387− clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
6388− set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
6389− md_wakeup_thread(mddev->thread);
6390− }
63916389 err = -EBUSY;
63926390 goto out;
63936391 }
6392+
63946393 if (mddev->pers) {
63956394 __md_stop_writes(mddev);
63966395
6397− err = -ENXIO;
6398− if (mddev->ro == MD_RDONLY)
6396+ if (mddev->ro == MD_RDONLY) {
6397+ err = -ENXIO;
63996398 goto out;
6399+ }
6400+
64006401 mddev->ro = MD_RDONLY;
64016402 set_disk_ro(mddev->gendisk, 1);
6403+ }
6404+
6405+out:
6406+ if ((mddev->pers && !err) || did_freeze) {
64026407 clear_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
64036408 set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
64046409 md_wakeup_thread(mddev->thread);
64056410 sysfs_notify_dirent_safe(mddev->sysfs_state);
6406− err = 0;
64076411 }
6408−out:
6412+
64096413 mutex_unlock(&mddev->open_mutex);
64106414 return err;
64116415 }
@@ -6426,20 +6430,8 @@ static int do_md_stop(struct mddev *mddev, int mode, · 14 unmodified lines
64266430 set_bit(MD_RECOVERY_FROZEN, &mddev->recovery);
64276431 md_wakeup_thread(mddev->thread);
64286432 }
6429− if (test_bit(MD_RECOVERY_RUNNING, &mddev->recovery))
6430− set_bit(MD_RECOVERY_INTR, &mddev->recovery);
6431−
6432− /*
6433− * Thread might be blocked waiting for metadata update which will now
6434− * never happen
6435− */
6436− md_wakeup_thread_directly(mddev->sync_thread);
64376433
6438− mddev_unlock(mddev);
6439− wait_event(resync_wait, (mddev->sync_thread == NULL &&
6440− !test_bit(MD_RECOVERY_RUNNING,
6441− &mddev->recovery)));
6442− mddev_lock_nointr(mddev);
6434+ stop_sync_thread(mddev, true, false);
64436435
64446436 mutex_lock(&mddev->open_mutex);
64456437 if ((mddev->pers && atomic_read(&mddev->openers) > !!bdev) ||
@@ -8666,7 +8658,8 @@ static void md_end_clone_io(struct bio *bio) · 2220 unmodified lines
86668658 struct bio *orig_bio = md_io_clone->orig_bio;
86678659 struct mddev *mddev = md_io_clone->mddev;
86688660
8669− orig_bio->bi_status = bio->bi_status;
8661+ if (bio->bi_status && !orig_bio->bi_status)
8662+ orig_bio->bi_status = bio->bi_status;
86708663
86718664 if (md_io_clone->start_time)
86728665 bio_end_io_acct(orig_bio, md_io_clone->start_time);
@@ -9402,7 +9395,15 @@ static void md_start_sync(struct work_struct *ws) · 729 unmodified lines
94029395 goto not_running;
94039396 }
94049397
9405− suspend ? mddev_unlock_and_resume(mddev) : mddev_unlock(mddev);
9398+ mddev_unlock(mddev);
9399+ /*
9400+ * md_start_sync was triggered by MD_RECOVERY_NEEDED, so we should
9401+ * not set it again. Otherwise, we may cause issue like this one:
9402+ * https://bugzilla.kernel.org/show_bug.cgi?id=218200
9403+ * Therefore, use __mddev_resume(mddev, false).
9404+ */
9405+ if (suspend)
9406+ __mddev_resume(mddev, false);
94069407 md_wakeup_thread(mddev->sync_thread);
94079408 sysfs_notify_dirent_safe(mddev->sysfs_action);
94089409 md_new_event();
@@ -9414,7 +9415,15 @@ not_running: · 5 unmodified lines
94149415 clear_bit(MD_RECOVERY_REQUESTED, &mddev->recovery);
94159416 clear_bit(MD_RECOVERY_CHECK, &mddev->recovery);
94169417 clear_bit(MD_RECOVERY_RUNNING, &mddev->recovery);
9417− suspend ? mddev_unlock_and_resume(mddev) : mddev_unlock(mddev);
9418+ mddev_unlock(mddev);
9419+ /*
9420+ * md_start_sync was triggered by MD_RECOVERY_NEEDED, so we should
9421+ * not set it again. Otherwise, we may cause issue like this one:
9422+ * https://bugzilla.kernel.org/show_bug.cgi?id=218200
9423+ * Therefore, use __mddev_resume(mddev, false).
9424+ */
9425+ if (suspend)
9426+ __mddev_resume(mddev, false);
94189427
94199428 wake_up(&resync_wait);
94209429 if (test_and_clear_bit(MD_RECOVERY_RECOVER, &mddev->recovery) &&
drivers/md/raid5.c+2−2
@@ -5892,11 +5892,11 @@ static bool stripe_ahead_of_reshape(struct mddev *mddev, struct r5conf *conf, · 5891 unmodified lines
58925892 int dd_idx;
58935893
58945894 for (dd_idx = 0; dd_idx < sh->disks; dd_idx++) {
5895− if (dd_idx == sh->pd_idx)
5895+ if (dd_idx == sh->pd_idx || dd_idx == sh->qd_idx)
58965896 continue;
58975897
58985898 min_sector = min(min_sector, sh->dev[dd_idx].sector);
5899− max_sector = min(max_sector, sh->dev[dd_idx].sector);
5899+ max_sector = max(max_sector, sh->dev[dd_idx].sector);
59005900 }
59015901
59025902 spin_lock_irq(&conf->device_lock);
drivers/media/pci/mgb4/Kconfig+1−0
@@ -2,6 +2,7 @@ · 1 unmodified line
22 config VIDEO_MGB4
33 tristate "Digiteq Automotive MGB4 support"
44 depends on VIDEO_DEV && PCI && I2C && DMADEVICES && SPI && MTD && IIO
5+ depends on COMMON_CLK
56 select VIDEOBUF2_DMA_SG
67 select IIO_BUFFER
78 select IIO_TRIGGERED_BUFFER
drivers/media/pci/mgb4/mgb4_core.c+15−5
@@ -42,6 +42,10 @@ · 41 unmodified lines
4242
4343 #define MGB4_USER_IRQS 16
4444
45+#define DIGITEQ_VID 0x1ed8
46+#define T100_DID 0x0101
47+#define T200_DID 0x0201
48+
4549 ATTRIBUTE_GROUPS(mgb4_pci);
4650
4751 static int flashid;
@@ -151,7 +155,7 @@ static struct spi_master *get_spi_adap(struct platform_device *pdev) · 103 unmodified lines
151155 return dev ? container_of(dev, struct spi_master, dev) : NULL;
152156 }
153157
154−static int init_spi(struct mgb4_dev *mgbdev)
158+static int init_spi(struct mgb4_dev *mgbdev, u32 devid)
155159 {
156160 struct resource spi_resources[] = {
157161 {
@@ -213,8 +217,13 @@ static int init_spi(struct mgb4_dev *mgbdev) · 55 unmodified lines
213217 snprintf(mgbdev->fw_part_name, sizeof(mgbdev->fw_part_name),
214218 "mgb4-fw.%d", flashid);
215219 mgbdev->partitions[0].name = mgbdev->fw_part_name;
216− mgbdev->partitions[0].size = 0x400000;
217− mgbdev->partitions[0].offset = 0x400000;
220+ if (devid == T200_DID) {
221+ mgbdev->partitions[0].size = 0x950000;
222+ mgbdev->partitions[0].offset = 0x1000000;
223+ } else {
224+ mgbdev->partitions[0].size = 0x400000;
225+ mgbdev->partitions[0].offset = 0x400000;
226+ }
218227 mgbdev->partitions[0].mask_flags = 0;
219228
220229 snprintf(mgbdev->data_part_name, sizeof(mgbdev->data_part_name),
@@ -551,7 +560,7 @@ static int mgb4_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 330 unmodified lines
551560 goto err_video_regs;
552561
553562 /* SPI FLASH */
554− rv = init_spi(mgbdev);
563+ rv = init_spi(mgbdev, id->device);
555564 if (rv < 0)
556565 goto err_cmt_regs;
557566
@@ -666,7 +675,8 @@ static void mgb4_remove(struct pci_dev *pdev) · 108 unmodified lines
666675 }
667676
668677 static const struct pci_device_id mgb4_pci_ids[] = {
669− { PCI_DEVICE(0x1ed8, 0x0101), },
678+ { PCI_DEVICE(DIGITEQ_VID, T100_DID), },
679+ { PCI_DEVICE(DIGITEQ_VID, T200_DID), },
670680 { 0, }
671681 };
672682 MODULE_DEVICE_TABLE(pci, mgb4_pci_ids);
drivers/media/platform/renesas/vsp1/vsp1_pipe.c+1−1
@@ -373,7 +373,7 @@ int vsp1_pipeline_stop(struct vsp1_pipeline *pipe) · 372 unmodified lines
373373 (7 << VI6_DPR_SMPPT_TGW_SHIFT) |
374374 (VI6_DPR_NODE_UNUSED << VI6_DPR_SMPPT_PT_SHIFT));
375375
376− v4l2_subdev_call(&pipe->output->entity.subdev, video, s_stream, 0);
376+ vsp1_wpf_stop(pipe->output);
377377
378378 return ret;
379379 }
drivers/media/platform/renesas/vsp1/vsp1_rpf.c+1−9
@@ -43,14 +43,6 @@ static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf, · 42 unmodified lines
4343 data);
4444 }
4545
46−/* -----------------------------------------------------------------------------
47− * V4L2 Subdevice Operations
48− */
49−
50−static const struct v4l2_subdev_ops rpf_ops = {
51− .pad = &vsp1_rwpf_pad_ops,
52−};
53−
5446 /* -----------------------------------------------------------------------------
5547 * VSP1 Entity Operations
5648 */
@@ -411,7 +403,7 @@ struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index) · 354 unmodified lines
411403 rpf->entity.index = index;
412404
413405 sprintf(name, "rpf.%u", index);
414− ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &rpf_ops,
406+ ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &vsp1_rwpf_subdev_ops,
415407 MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
416408 if (ret < 0)
417409 return ERR_PTR(ret);
drivers/media/platform/renesas/vsp1/vsp1_rwpf.c+6−2
@@ -24,7 +24,7 @@ struct v4l2_rect *vsp1_rwpf_get_crop(struct vsp1_rwpf *rwpf, · 23 unmodified lines
2424 }
2525
2626 /* -----------------------------------------------------------------------------
27− * V4L2 Subdevice Pad Operations
27+ * V4L2 Subdevice Operations
2828 */
2929
3030 static int vsp1_rwpf_enum_mbus_code(struct v4l2_subdev *subdev,
@@ -243,7 +243,7 @@ done: · 212 unmodified lines
243243 return ret;
244244 }
245245
246−const struct v4l2_subdev_pad_ops vsp1_rwpf_pad_ops = {
246+static const struct v4l2_subdev_pad_ops vsp1_rwpf_pad_ops = {
247247 .init_cfg = vsp1_entity_init_cfg,
248248 .enum_mbus_code = vsp1_rwpf_enum_mbus_code,
249249 .enum_frame_size = vsp1_rwpf_enum_frame_size,
@@ -253,6 +253,10 @@ const struct v4l2_subdev_pad_ops vsp1_rwpf_pad_ops = { · 3 unmodified lines
253253 .set_selection = vsp1_rwpf_set_selection,
254254 };
255255
256+const struct v4l2_subdev_ops vsp1_rwpf_subdev_ops = {
257+ .pad = &vsp1_rwpf_pad_ops,
258+};
259+
256260 /* -----------------------------------------------------------------------------
257261 * Controls
258262 */
drivers/media/platform/renesas/vsp1/vsp1_rwpf.h+3−1
@@ -79,9 +79,11 @@ static inline struct vsp1_rwpf *entity_to_rwpf(struct vsp1_entity *entity) · 78 unmodified lines
7979 struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index);
8080 struct vsp1_rwpf *vsp1_wpf_create(struct vsp1_device *vsp1, unsigned int index);
8181
82+void vsp1_wpf_stop(struct vsp1_rwpf *wpf);
83+
8284 int vsp1_rwpf_init_ctrls(struct vsp1_rwpf *rwpf, unsigned int ncontrols);
8385
84−extern const struct v4l2_subdev_pad_ops vsp1_rwpf_pad_ops;
86+extern const struct v4l2_subdev_ops vsp1_rwpf_subdev_ops;
8587
8688 struct v4l2_rect *vsp1_rwpf_get_crop(struct vsp1_rwpf *rwpf,
8789 struct v4l2_subdev_state *sd_state);
drivers/media/platform/renesas/vsp1/vsp1_wpf.c+3−26
@@ -186,17 +186,13 @@ static int wpf_init_controls(struct vsp1_rwpf *wpf) · 185 unmodified lines
186186 }
187187
188188 /* -----------------------------------------------------------------------------
189− * V4L2 Subdevice Core Operations
189+ * VSP1 Entity Operations
190190 */
191191
192−static int wpf_s_stream(struct v4l2_subdev *subdev, int enable)
192+void vsp1_wpf_stop(struct vsp1_rwpf *wpf)
193193 {
194− struct vsp1_rwpf *wpf = to_rwpf(subdev);
195194 struct vsp1_device *vsp1 = wpf->entity.vsp1;
196195
197− if (enable)
198− return 0;
199−
200196 /*
201197 * Write to registers directly when stopping the stream as there will be
202198 * no pipeline run to apply the display list.
@@ -204,27 +200,8 @@ static int wpf_s_stream(struct v4l2_subdev *subdev, int enable) · 1 unmodified line
204200 vsp1_write(vsp1, VI6_WPF_IRQ_ENB(wpf->entity.index), 0);
205201 vsp1_write(vsp1, wpf->entity.index * VI6_WPF_OFFSET +
206202 VI6_WPF_SRCRPF, 0);
207−
208− return 0;
209203 }
210204
211−/* -----------------------------------------------------------------------------
212− * V4L2 Subdevice Operations
213− */
214−
215−static const struct v4l2_subdev_video_ops wpf_video_ops = {
216− .s_stream = wpf_s_stream,
217−};
218−
219−static const struct v4l2_subdev_ops wpf_ops = {
220− .video = &wpf_video_ops,
221− .pad = &vsp1_rwpf_pad_ops,
222−};
223−
224−/* -----------------------------------------------------------------------------
225− * VSP1 Entity Operations
226− */
227−
228205 static void vsp1_wpf_destroy(struct vsp1_entity *entity)
229206 {
230207 struct vsp1_rwpf *wpf = entity_to_rwpf(entity);
@@ -583,7 +560,7 @@ struct vsp1_rwpf *vsp1_wpf_create(struct vsp1_device *vsp1, unsigned int index) · 352 unmodified lines
583560 wpf->entity.index = index;
584561
585562 sprintf(name, "wpf.%u", index);
586− ret = vsp1_entity_init(vsp1, &wpf->entity, name, 2, &wpf_ops,
563+ ret = vsp1_entity_init(vsp1, &wpf->entity, name, 2, &vsp1_rwpf_subdev_ops,
587564 MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
588565 if (ret < 0)
589566 return ERR_PTR(ret);
drivers/misc/mei/client.c+2−2
@@ -2011,7 +2011,7 @@ ssize_t mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb, unsigned long time · 2010 unmodified lines
20112011
20122012 mei_hdr = mei_msg_hdr_init(cb);
20132013 if (IS_ERR(mei_hdr)) {
2014− rets = -PTR_ERR(mei_hdr);
2014+ rets = PTR_ERR(mei_hdr);
20152015 mei_hdr = NULL;
20162016 goto err;
20172017 }
@@ -2032,7 +2032,7 @@ ssize_t mei_cl_write(struct mei_cl *cl, struct mei_cl_cb *cb, unsigned long time · 14 unmodified lines
20322032
20332033 hbuf_slots = mei_hbuf_empty_slots(dev);
20342034 if (hbuf_slots < 0) {
2035− rets = -EOVERFLOW;
2035+ buf_len = -EOVERFLOW;
20362036 goto out;
20372037 }
20382038
drivers/misc/mei/pxp/mei_pxp.c+2−1
@@ -84,9 +84,10 @@ mei_pxp_send_message(struct device *dev, const void *message, size_t size, unsig · 83 unmodified lines
8484 byte = ret;
8585 break;
8686 }
87+ return byte;
8788 }
8889
89− return byte;
90+ return 0;
9091 }
9192
9293 /**
drivers/mmc/core/block.c+2−0
@@ -1482,6 +1482,8 @@ static void mmc_blk_cqe_complete_rq(struct mmc_queue *mq, struct request *req) · 1481 unmodified lines
14821482 blk_mq_requeue_request(req, true);
14831483 else
14841484 __blk_mq_end_request(req, BLK_STS_OK);
1485+ } else if (mq->in_recovery) {
1486+ blk_mq_requeue_request(req, true);
14851487 } else {
14861488 blk_mq_end_request(req, BLK_STS_OK);
14871489 }
drivers/mmc/core/core.c+7−2
@@ -551,7 +551,9 @@ int mmc_cqe_recovery(struct mmc_host *host) · 550 unmodified lines
551551 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
552552 cmd.flags &= ~MMC_RSP_CRC; /* Ignore CRC */
553553 cmd.busy_timeout = MMC_CQE_RECOVERY_TIMEOUT;
554− mmc_wait_for_cmd(host, &cmd, 0);
554+ mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
555+
556+ mmc_poll_for_busy(host->card, MMC_CQE_RECOVERY_TIMEOUT, true, MMC_BUSY_IO);
555557
556558 memset(&cmd, 0, sizeof(cmd));
557559 cmd.opcode = MMC_CMDQ_TASK_MGMT;
@@ -559,10 +561,13 @@ int mmc_cqe_recovery(struct mmc_host *host) · 1 unmodified line
559561 cmd.flags = MMC_RSP_R1B | MMC_CMD_AC;
560562 cmd.flags &= ~MMC_RSP_CRC; /* Ignore CRC */
561563 cmd.busy_timeout = MMC_CQE_RECOVERY_TIMEOUT;
562− err = mmc_wait_for_cmd(host, &cmd, 0);
564+ err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
563565
564566 host->cqe_ops->cqe_recovery_finish(host);
565567
568+ if (err)
569+ err = mmc_wait_for_cmd(host, &cmd, MMC_CMD_RETRIES);
570+
566571 mmc_retune_release(host);
567572
568573 return err;
drivers/mmc/host/cqhci-core.c+22−22
@@ -942,8 +942,8 @@ static bool cqhci_clear_all_tasks(struct mmc_host *mmc, unsigned int timeout) · 941 unmodified lines
942942 ret = cqhci_tasks_cleared(cq_host);
943943
944944 if (!ret)
945− pr_debug("%s: cqhci: Failed to clear tasks\n",
946− mmc_hostname(mmc));
945+ pr_warn("%s: cqhci: Failed to clear tasks\n",
946+ mmc_hostname(mmc));
947947
948948 return ret;
949949 }
@@ -976,7 +976,7 @@ static bool cqhci_halt(struct mmc_host *mmc, unsigned int timeout) · 26 unmodified lines
976976 ret = cqhci_halted(cq_host);
977977
978978 if (!ret)
979− pr_debug("%s: cqhci: Failed to halt\n", mmc_hostname(mmc));
979+ pr_warn("%s: cqhci: Failed to halt\n", mmc_hostname(mmc));
980980
981981 return ret;
982982 }
@@ -984,10 +984,10 @@ static bool cqhci_halt(struct mmc_host *mmc, unsigned int timeout) · 1 unmodified line
984984 /*
985985 * After halting we expect to be able to use the command line. We interpret the
986986 * failure to halt to mean the data lines might still be in use (and the upper
987− * layers will need to send a STOP command), so we set the timeout based on a
988− * generous command timeout.
987+ * layers will need to send a STOP command), however failing to halt complicates
988+ * the recovery, so set a timeout that would reasonably allow I/O to complete.
989989 */
990−#define CQHCI_START_HALT_TIMEOUT 5
990+#define CQHCI_START_HALT_TIMEOUT 500
991991
992992 static void cqhci_recovery_start(struct mmc_host *mmc)
993993 {
@@ -1075,28 +1075,28 @@ static void cqhci_recovery_finish(struct mmc_host *mmc) · 81 unmodified lines
10751075
10761076 ok = cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
10771077
1078− if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
1079− ok = false;
1080−
10811078 /*
10821079 * The specification contradicts itself, by saying that tasks cannot be
10831080 * cleared if CQHCI does not halt, but if CQHCI does not halt, it should
10841081 * be disabled/re-enabled, but not to disable before clearing tasks.
10851082 * Have a go anyway.
10861083 */
1087− if (!ok) {
1088− pr_debug("%s: cqhci: disable / re-enable\n", mmc_hostname(mmc));
1089− cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
1090− cqcfg &= ~CQHCI_ENABLE;
1091− cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
1092− cqcfg |= CQHCI_ENABLE;
1093− cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
1094− /* Be sure that there are no tasks */
1095− ok = cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
1096− if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
1097− ok = false;
1098− WARN_ON(!ok);
1099− }
1084+ if (!cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT))
1085+ ok = false;
1086+
1087+ /* Disable to make sure tasks really are cleared */
1088+ cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
1089+ cqcfg &= ~CQHCI_ENABLE;
1090+ cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
1091+
1092+ cqcfg = cqhci_readl(cq_host, CQHCI_CFG);
1093+ cqcfg |= CQHCI_ENABLE;
1094+ cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
1095+
1096+ cqhci_halt(mmc, CQHCI_FINISH_HALT_TIMEOUT);
1097+
1098+ if (!ok)
1099+ cqhci_clear_all_tasks(mmc, CQHCI_CLEAR_TIMEOUT);
11001100
11011101 cqhci_recover_mrqs(cq_host);
11021102
drivers/mmc/host/sdhci-pci-gli.c+29−25
@@ -1189,6 +1189,32 @@ static void gl9763e_hs400_enhanced_strobe(struct mmc_host *mmc, · 1188 unmodified lines
11891189 sdhci_writel(host, val, SDHCI_GLI_9763E_HS400_ES_REG);
11901190 }
11911191
1192+static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot,
1193+ bool enable)
1194+{
1195+ struct pci_dev *pdev = slot->chip->pdev;
1196+ u32 value;
1197+
1198+ pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
1199+ value &= ~GLI_9763E_VHS_REV;
1200+ value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
1201+ pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
1202+
1203+ pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
1204+
1205+ if (enable)
1206+ value &= ~GLI_9763E_CFG_LPSN_DIS;
1207+ else
1208+ value |= GLI_9763E_CFG_LPSN_DIS;
1209+
1210+ pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
1211+
1212+ pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
1213+ value &= ~GLI_9763E_VHS_REV;
1214+ value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
1215+ pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
1216+}
1217+
11921218 static void sdhci_set_gl9763e_signaling(struct sdhci_host *host,
11931219 unsigned int timing)
11941220 {
@@ -1297,6 +1323,9 @@ static int gl9763e_add_host(struct sdhci_pci_slot *slot) · 102 unmodified lines
12971323 if (ret)
12981324 goto cleanup;
12991325
1326+ /* Disable LPM negotiation to avoid entering L1 state. */
1327+ gl9763e_set_low_power_negotiation(slot, false);
1328+
13001329 return 0;
13011330
13021331 cleanup:
@@ -1340,31 +1369,6 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) · 37 unmodified lines
13401369 }
13411370
13421371 #ifdef CONFIG_PM
1343−static void gl9763e_set_low_power_negotiation(struct sdhci_pci_slot *slot, bool enable)
1344−{
1345− struct pci_dev *pdev = slot->chip->pdev;
1346− u32 value;
1347−
1348− pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
1349− value &= ~GLI_9763E_VHS_REV;
1350− value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_W);
1351− pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
1352−
1353− pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG, &value);
1354−
1355− if (enable)
1356− value &= ~GLI_9763E_CFG_LPSN_DIS;
1357− else
1358− value |= GLI_9763E_CFG_LPSN_DIS;
1359−
1360− pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG, value);
1361−
1362− pci_read_config_dword(pdev, PCIE_GLI_9763E_VHS, &value);
1363− value &= ~GLI_9763E_VHS_REV;
1364− value |= FIELD_PREP(GLI_9763E_VHS_REV, GLI_9763E_VHS_REV_R);
1365− pci_write_config_dword(pdev, PCIE_GLI_9763E_VHS, value);
1366−}
1367−
13681372 static int gl9763e_runtime_suspend(struct sdhci_pci_chip *chip)
13691373 {
13701374 struct sdhci_pci_slot *slot = chip->slots[0];
drivers/mmc/host/sdhci-sprd.c+25−0
@@ -416,12 +416,33 @@ static void sdhci_sprd_request_done(struct sdhci_host *host, · 415 unmodified lines
416416 mmc_request_done(host->mmc, mrq);
417417 }
418418
419+static void sdhci_sprd_set_power(struct sdhci_host *host, unsigned char mode,
420+ unsigned short vdd)
421+{
422+ struct mmc_host *mmc = host->mmc;
423+
424+ switch (mode) {
425+ case MMC_POWER_OFF:
426+ mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, 0);
427+
428+ mmc_regulator_disable_vqmmc(mmc);
429+ break;
430+ case MMC_POWER_ON:
431+ mmc_regulator_enable_vqmmc(mmc);
432+ break;
433+ case MMC_POWER_UP:
434+ mmc_regulator_set_ocr(host->mmc, mmc->supply.vmmc, vdd);
435+ break;
436+ }
437+}
438+
419439 static struct sdhci_ops sdhci_sprd_ops = {
420440 .read_l = sdhci_sprd_readl,
421441 .write_l = sdhci_sprd_writel,
422442 .write_w = sdhci_sprd_writew,
423443 .write_b = sdhci_sprd_writeb,
424444 .set_clock = sdhci_sprd_set_clock,
445+ .set_power = sdhci_sprd_set_power,
425446 .get_max_clock = sdhci_sprd_get_max_clock,
426447 .get_min_clock = sdhci_sprd_get_min_clock,
427448 .set_bus_width = sdhci_set_bus_width,
@@ -823,6 +844,10 @@ static int sdhci_sprd_probe(struct platform_device *pdev) · 395 unmodified lines
823844 host->caps1 &= ~(SDHCI_SUPPORT_SDR50 | SDHCI_SUPPORT_SDR104 |
824845 SDHCI_SUPPORT_DDR50);
825846
847+ ret = mmc_regulator_get_supply(host->mmc);
848+ if (ret)
849+ goto pm_runtime_disable;
850+
826851 ret = sdhci_setup_host(host);
827852 if (ret)
828853 goto pm_runtime_disable;
drivers/net/arcnet/arcdevice.h+2−0
@@ -186,6 +186,8 @@ do { \ · 185 unmodified lines
186186 #define ARC_IS_5MBIT 1 /* card default speed is 5MBit */
187187 #define ARC_CAN_10MBIT 2 /* card uses COM20022, supporting 10MBit,
188188 but default is 2.5MBit. */
189+#define ARC_HAS_LED 4 /* card has software controlled LEDs */
190+#define ARC_HAS_ROTARY 8 /* card has rotary encoder */
189191
190192 /* information needed to define an encapsulation driver */
191193 struct ArcProto {
drivers/net/arcnet/com20020-pci.c+46−43
@@ -213,12 +213,13 @@ static int com20020pci_probe(struct pci_dev *pdev, · 212 unmodified lines
213213 if (!strncmp(ci->name, "EAE PLX-PCI FB2", 15))
214214 lp->backplane = 1;
215215
216− /* Get the dev_id from the PLX rotary coder */
217− if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
218− dev_id_mask = 0x3;
219− dev->dev_id = (inb(priv->misc + ci->rotary) >> 4) & dev_id_mask;
220−
221− snprintf(dev->name, sizeof(dev->name), "arc%d-%d", dev->dev_id, i);
216+ if (ci->flags & ARC_HAS_ROTARY) {
217+ /* Get the dev_id from the PLX rotary coder */
218+ if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
219+ dev_id_mask = 0x3;
220+ dev->dev_id = (inb(priv->misc + ci->rotary) >> 4) & dev_id_mask;
221+ snprintf(dev->name, sizeof(dev->name), "arc%d-%d", dev->dev_id, i);
222+ }
222223
223224 if (arcnet_inb(ioaddr, COM20020_REG_R_STATUS) == 0xFF) {
224225 pr_err("IO address %Xh is empty!\n", ioaddr);
@@ -230,6 +231,10 @@ static int com20020pci_probe(struct pci_dev *pdev, · 5 unmodified lines
230231 goto err_free_arcdev;
231232 }
232233
234+ ret = com20020_found(dev, IRQF_SHARED);
235+ if (ret)
236+ goto err_free_arcdev;
237+
233238 card = devm_kzalloc(&pdev->dev, sizeof(struct com20020_dev),
234239 GFP_KERNEL);
235240 if (!card) {
@@ -239,41 +244,39 @@ static int com20020pci_probe(struct pci_dev *pdev, · 3 unmodified lines
239244
240245 card->index = i;
241246 card->pci_priv = priv;
242− card->tx_led.brightness_set = led_tx_set;
243− card->tx_led.default_trigger = devm_kasprintf(&pdev->dev,
244− GFP_KERNEL, "arc%d-%d-tx",
245− dev->dev_id, i);
246− card->tx_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
247− "pci:green:tx:%d-%d",
248− dev->dev_id, i);
249−
250− card->tx_led.dev = &dev->dev;
251− card->recon_led.brightness_set = led_recon_set;
252− card->recon_led.default_trigger = devm_kasprintf(&pdev->dev,
253− GFP_KERNEL, "arc%d-%d-recon",
254− dev->dev_id, i);
255− card->recon_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
256− "pci:red:recon:%d-%d",
257− dev->dev_id, i);
258− card->recon_led.dev = &dev->dev;
259− card->dev = dev;
260−
261− ret = devm_led_classdev_register(&pdev->dev, &card->tx_led);
262− if (ret)
263− goto err_free_arcdev;
264247
265− ret = devm_led_classdev_register(&pdev->dev, &card->recon_led);
266− if (ret)
267− goto err_free_arcdev;
268−
269− dev_set_drvdata(&dev->dev, card);
270−
271− ret = com20020_found(dev, IRQF_SHARED);
272− if (ret)
273− goto err_free_arcdev;
274−
275− devm_arcnet_led_init(dev, dev->dev_id, i);
248+ if (ci->flags & ARC_HAS_LED) {
249+ card->tx_led.brightness_set = led_tx_set;
250+ card->tx_led.default_trigger = devm_kasprintf(&pdev->dev,
251+ GFP_KERNEL, "arc%d-%d-tx",
252+ dev->dev_id, i);
253+ card->tx_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
254+ "pci:green:tx:%d-%d",
255+ dev->dev_id, i);
256+
257+ card->tx_led.dev = &dev->dev;
258+ card->recon_led.brightness_set = led_recon_set;
259+ card->recon_led.default_trigger = devm_kasprintf(&pdev->dev,
260+ GFP_KERNEL, "arc%d-%d-recon",
261+ dev->dev_id, i);
262+ card->recon_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
263+ "pci:red:recon:%d-%d",
264+ dev->dev_id, i);
265+ card->recon_led.dev = &dev->dev;
266+
267+ ret = devm_led_classdev_register(&pdev->dev, &card->tx_led);
268+ if (ret)
269+ goto err_free_arcdev;
270+
271+ ret = devm_led_classdev_register(&pdev->dev, &card->recon_led);
272+ if (ret)
273+ goto err_free_arcdev;
274+
275+ dev_set_drvdata(&dev->dev, card);
276+ devm_arcnet_led_init(dev, dev->dev_id, i);
277+ }
276278
279+ card->dev = dev;
277280 list_add(&card->list, &priv->list_dev);
278281 continue;
279282
@@ -329,7 +332,7 @@ static struct com20020_pci_card_info card_info_5mbit = { · 49 unmodified lines
329332 };
330333
331334 static struct com20020_pci_card_info card_info_sohard = {
332− .name = "PLX-PCI",
335+ .name = "SOHARD SH ARC-PCI",
333336 .devcount = 1,
334337 /* SOHARD needs PCI base addr 4 */
335338 .chan_map_tbl = {
@@ -364,7 +367,7 @@ static struct com20020_pci_card_info card_info_eae_arc1 = { · 28 unmodified lines
364367 },
365368 },
366369 .rotary = 0x0,
367− .flags = ARC_CAN_10MBIT,
370+ .flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
368371 };
369372
370373 static struct com20020_pci_card_info card_info_eae_ma1 = {
@@ -396,7 +399,7 @@ static struct com20020_pci_card_info card_info_eae_ma1 = { · 25 unmodified lines
396399 },
397400 },
398401 .rotary = 0x0,
399− .flags = ARC_CAN_10MBIT,
402+ .flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
400403 };
401404
402405 static struct com20020_pci_card_info card_info_eae_fb2 = {
@@ -421,7 +424,7 @@ static struct com20020_pci_card_info card_info_eae_fb2 = { · 18 unmodified lines
421424 },
422425 },
423426 .rotary = 0x0,
424− .flags = ARC_CAN_10MBIT,
427+ .flags = ARC_HAS_ROTARY | ARC_HAS_LED | ARC_CAN_10MBIT,
425428 };
426429
427430 static const struct pci_device_id com20020pci_id_table[] = {
drivers/net/bonding/bond_main.c+6−0
@@ -1500,6 +1500,10 @@ done: · 1499 unmodified lines
15001500 static void bond_setup_by_slave(struct net_device *bond_dev,
15011501 struct net_device *slave_dev)
15021502 {
1503+ bool was_up = !!(bond_dev->flags & IFF_UP);
1504+
1505+ dev_close(bond_dev);
1506+
15031507 bond_dev->header_ops = slave_dev->header_ops;
15041508
15051509 bond_dev->type = slave_dev->type;
@@ -1514,6 +1518,8 @@ static void bond_setup_by_slave(struct net_device *bond_dev, · 8 unmodified lines
15141518 bond_dev->flags &= ~(IFF_BROADCAST | IFF_MULTICAST);
15151519 bond_dev->flags |= (IFF_POINTOPOINT | IFF_NOARP);
15161520 }
1521+ if (was_up)
1522+ dev_open(bond_dev, NULL);
15171523 }
15181524
15191525 /* On bonding slaves other than the currently active slave, suppress
drivers/net/dsa/microchip/ksz_common.c+12−4
@@ -2713,10 +2713,18 @@ static int ksz_connect_tag_protocol(struct dsa_switch *ds, · 2712 unmodified lines
27132713 {
27142714 struct ksz_tagger_data *tagger_data;
27152715
2716− tagger_data = ksz_tagger_data(ds);
2717− tagger_data->xmit_work_fn = ksz_port_deferred_xmit;
2718−
2719− return 0;
2716+ switch (proto) {
2717+ case DSA_TAG_PROTO_KSZ8795:
2718+ return 0;
2719+ case DSA_TAG_PROTO_KSZ9893:
2720+ case DSA_TAG_PROTO_KSZ9477:
2721+ case DSA_TAG_PROTO_LAN937X:
2722+ tagger_data = ksz_tagger_data(ds);
2723+ tagger_data->xmit_work_fn = ksz_port_deferred_xmit;
2724+ return 0;
2725+ default:
2726+ return -EPROTONOSUPPORT;
2727+ }
27202728 }
27212729
27222730 static int ksz_port_vlan_filtering(struct dsa_switch *ds, int port,
drivers/net/dsa/mv88e6xxx/chip.c+20−6
@@ -577,6 +577,18 @@ static void mv88e6250_phylink_get_caps(struct mv88e6xxx_chip *chip, int port, · 576 unmodified lines
577577 config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;
578578 }
579579
580+static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
581+ struct phylink_config *config)
582+{
583+ unsigned long *supported = config->supported_interfaces;
584+
585+ /* Translate the default cmode */
586+ mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
587+
588+ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
589+ MAC_1000FD;
590+}
591+
580592 static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip)
581593 {
582594 u16 reg, val;
@@ -3880,7 +3892,8 @@ static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port) · 3297 unmodified lines
38803892 struct mv88e6xxx_chip *chip = ds->priv;
38813893 int err;
38823894
3883− if (chip->info->ops->pcs_ops->pcs_init) {
3895+ if (chip->info->ops->pcs_ops &&
3896+ chip->info->ops->pcs_ops->pcs_init) {
38843897 err = chip->info->ops->pcs_ops->pcs_init(chip, port);
38853898 if (err)
38863899 return err;
@@ -3895,7 +3908,8 @@ static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port) · 8 unmodified lines
38953908
38963909 mv88e6xxx_teardown_devlink_regions_port(ds, port);
38973910
3898− if (chip->info->ops->pcs_ops->pcs_teardown)
3911+ if (chip->info->ops->pcs_ops &&
3912+ chip->info->ops->pcs_ops->pcs_teardown)
38993913 chip->info->ops->pcs_ops->pcs_teardown(chip, port);
39003914 }
39013915
@@ -4340,7 +4354,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = { · 438 unmodified lines
43404354 .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
43414355 .stu_getnext = mv88e6352_g1_stu_getnext,
43424356 .stu_loadpurge = mv88e6352_g1_stu_loadpurge,
4343− .phylink_get_caps = mv88e6185_phylink_get_caps,
4357+ .phylink_get_caps = mv88e6351_phylink_get_caps,
43444358 };
43454359
43464360 static const struct mv88e6xxx_ops mv88e6172_ops = {
@@ -4440,7 +4454,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = { · 93 unmodified lines
44404454 .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
44414455 .stu_getnext = mv88e6352_g1_stu_getnext,
44424456 .stu_loadpurge = mv88e6352_g1_stu_loadpurge,
4443− .phylink_get_caps = mv88e6185_phylink_get_caps,
4457+ .phylink_get_caps = mv88e6351_phylink_get_caps,
44444458 };
44454459
44464460 static const struct mv88e6xxx_ops mv88e6176_ops = {
@@ -5069,7 +5083,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = { · 622 unmodified lines
50695083 .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge,
50705084 .stu_getnext = mv88e6352_g1_stu_getnext,
50715085 .stu_loadpurge = mv88e6352_g1_stu_loadpurge,
5072− .phylink_get_caps = mv88e6185_phylink_get_caps,
5086+ .phylink_get_caps = mv88e6351_phylink_get_caps,
50735087 };
50745088
50755089 static const struct mv88e6xxx_ops mv88e6351_ops = {
@@ -5117,7 +5131,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = { · 41 unmodified lines
51175131 .stu_loadpurge = mv88e6352_g1_stu_loadpurge,
51185132 .avb_ops = &mv88e6352_avb_ops,
51195133 .ptp_ops = &mv88e6352_ptp_ops,
5120− .phylink_get_caps = mv88e6185_phylink_get_caps,
5134+ .phylink_get_caps = mv88e6351_phylink_get_caps,
51215135 };
51225136
51235137 static const struct mv88e6xxx_ops mv88e6352_ops = {
drivers/net/dsa/mv88e6xxx/pcs-639x.c+29−2
@@ -465,6 +465,7 @@ mv88e639x_pcs_select(struct mv88e6xxx_chip *chip, int port, · 464 unmodified lines
465465 case PHY_INTERFACE_MODE_10GBASER:
466466 case PHY_INTERFACE_MODE_XAUI:
467467 case PHY_INTERFACE_MODE_RXAUI:
468+ case PHY_INTERFACE_MODE_USXGMII:
468469 return &mpcs->xg_pcs;
469470
470471 default:
@@ -873,7 +874,8 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs, · 402 unmodified lines
873874 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
874875 int err;
875876
876− if (interface == PHY_INTERFACE_MODE_10GBASER) {
877+ if (interface == PHY_INTERFACE_MODE_10GBASER ||
878+ interface == PHY_INTERFACE_MODE_USXGMII) {
877879 err = mv88e6393x_erratum_5_2(mpcs);
878880 if (err)
879881 return err;
@@ -886,12 +888,37 @@ static int mv88e6393x_xg_pcs_post_config(struct phylink_pcs *pcs, · 6 unmodified lines
886888 return mv88e639x_xg_pcs_enable(mpcs);
887889 }
888890
891+static void mv88e6393x_xg_pcs_get_state(struct phylink_pcs *pcs,
892+ struct phylink_link_state *state)
893+{
894+ struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
895+ u16 status, lp_status;
896+ int err;
897+
898+ if (state->interface != PHY_INTERFACE_MODE_USXGMII)
899+ return mv88e639x_xg_pcs_get_state(pcs, state);
900+
901+ state->link = false;
902+
903+ err = mv88e639x_read(mpcs, MV88E6390_USXGMII_PHY_STATUS, &status);
904+ err = err ? : mv88e639x_read(mpcs, MV88E6390_USXGMII_LP_STATUS, &lp_status);
905+ if (err) {
906+ dev_err(mpcs->mdio.dev.parent,
907+ "can't read USXGMII status: %pe\n", ERR_PTR(err));
908+ return;
909+ }
910+
911+ state->link = !!(status & MDIO_USXGMII_LINK);
912+ state->an_complete = state->link;
913+ phylink_decode_usxgmii_word(state, lp_status);
914+}
915+
889916 static const struct phylink_pcs_ops mv88e6393x_xg_pcs_ops = {
890917 .pcs_enable = mv88e6393x_xg_pcs_enable,
891918 .pcs_disable = mv88e6393x_xg_pcs_disable,
892919 .pcs_pre_config = mv88e6393x_xg_pcs_pre_config,
893920 .pcs_post_config = mv88e6393x_xg_pcs_post_config,
894− .pcs_get_state = mv88e639x_xg_pcs_get_state,
921+ .pcs_get_state = mv88e6393x_xg_pcs_get_state,
895922 .pcs_config = mv88e639x_xg_pcs_config,
896923 };
897924
drivers/net/ethernet/amd/pds_core/adminq.c+1−1
@@ -146,7 +146,7 @@ irqreturn_t pdsc_adminq_isr(int irq, void *data) · 145 unmodified lines
146146 }
147147
148148 queue_work(pdsc->wq, &qcq->work);
149− pds_core_intr_mask(&pdsc->intr_ctrl[irq], PDS_CORE_INTR_MASK_CLEAR);
149+ pds_core_intr_mask(&pdsc->intr_ctrl[qcq->intx], PDS_CORE_INTR_MASK_CLEAR);
150150
151151 return IRQ_HANDLED;
152152 }
drivers/net/ethernet/amd/pds_core/core.h+1−1
@@ -15,7 +15,7 @@ · 14 unmodified lines
1515 #define PDSC_DRV_DESCRIPTION "AMD/Pensando Core Driver"
1616
1717 #define PDSC_WATCHDOG_SECS 5
18−#define PDSC_QUEUE_NAME_MAX_SZ 32
18+#define PDSC_QUEUE_NAME_MAX_SZ 16
1919 #define PDSC_ADMINQ_MIN_LENGTH 16 /* must be a power of two */
2020 #define PDSC_NOTIFYQ_LENGTH 64 /* must be a power of two */
2121 #define PDSC_TEARDOWN_RECOVERY false
drivers/net/ethernet/amd/pds_core/dev.c+6−2
@@ -261,10 +261,14 @@ static int pdsc_identify(struct pdsc *pdsc) · 260 unmodified lines
261261 struct pds_core_drv_identity drv = {};
262262 size_t sz;
263263 int err;
264+ int n;
264265
265266 drv.drv_type = cpu_to_le32(PDS_DRIVER_LINUX);
266− snprintf(drv.driver_ver_str, sizeof(drv.driver_ver_str),
267− "%s %s", PDS_CORE_DRV_NAME, utsname()->release);
267+ /* Catching the return quiets a Wformat-truncation complaint */
268+ n = snprintf(drv.driver_ver_str, sizeof(drv.driver_ver_str),
269+ "%s %s", PDS_CORE_DRV_NAME, utsname()->release);
270+ if (n > sizeof(drv.driver_ver_str))
271+ dev_dbg(pdsc->dev, "release name truncated, don't care\n");
268272
269273 /* Next let's get some info about the device
270274 * We use the devcmd_lock at this level in order to
drivers/net/ethernet/amd/pds_core/devlink.c+1−1
@@ -104,7 +104,7 @@ int pdsc_dl_info_get(struct devlink *dl, struct devlink_info_req *req, · 103 unmodified lines
104104 struct pds_core_fw_list_info fw_list;
105105 struct pdsc *pdsc = devlink_priv(dl);
106106 union pds_core_dev_comp comp;
107− char buf[16];
107+ char buf[32];
108108 int listlen;
109109 int err;
110110 int i;
drivers/net/ethernet/amd/xgbe/xgbe-drv.c+14−0
@@ -682,10 +682,24 @@ static void xgbe_service(struct work_struct *work) · 681 unmodified lines
682682 static void xgbe_service_timer(struct timer_list *t)
683683 {
684684 struct xgbe_prv_data *pdata = from_timer(pdata, t, service_timer);
685+ struct xgbe_channel *channel;
686+ unsigned int i;
685687
686688 queue_work(pdata->dev_workqueue, &pdata->service_work);
687689
688690 mod_timer(&pdata->service_timer, jiffies + HZ);
691+
692+ if (!pdata->tx_usecs)
693+ return;
694+
695+ for (i = 0; i < pdata->channel_count; i++) {
696+ channel = pdata->channel[i];
697+ if (!channel->tx_ring || channel->tx_timer_active)
698+ break;
699+ channel->tx_timer_active = 1;
700+ mod_timer(&channel->tx_timer,
701+ jiffies + usecs_to_jiffies(pdata->tx_usecs));
702+ }
689703 }
690704
691705 static void xgbe_init_timers(struct xgbe_prv_data *pdata)
drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c+8−3
@@ -314,10 +314,15 @@ static int xgbe_get_link_ksettings(struct net_device *netdev, · 313 unmodified lines
314314
315315 cmd->base.phy_address = pdata->phy.address;
316316
317− cmd->base.autoneg = pdata->phy.autoneg;
318− cmd->base.speed = pdata->phy.speed;
319− cmd->base.duplex = pdata->phy.duplex;
317+ if (netif_carrier_ok(netdev)) {
318+ cmd->base.speed = pdata->phy.speed;
319+ cmd->base.duplex = pdata->phy.duplex;
320+ } else {
321+ cmd->base.speed = SPEED_UNKNOWN;
322+ cmd->base.duplex = DUPLEX_UNKNOWN;
323+ }
320324
325+ cmd->base.autoneg = pdata->phy.autoneg;
321326 cmd->base.port = PORT_NONE;
322327
323328 XGBE_LM_COPY(cmd, supported, lks, supported);
drivers/net/ethernet/amd/xgbe/xgbe-mdio.c+13−1
@@ -1193,7 +1193,19 @@ static int xgbe_phy_config_fixed(struct xgbe_prv_data *pdata) · 1192 unmodified lines
11931193 if (pdata->phy.duplex != DUPLEX_FULL)
11941194 return -EINVAL;
11951195
1196− xgbe_set_mode(pdata, mode);
1196+ /* Force the mode change for SFI in Fixed PHY config.
1197+ * Fixed PHY configs needs PLL to be enabled while doing mode set.
1198+ * When the SFP module isn't connected during boot, driver assumes
1199+ * AN is ON and attempts autonegotiation. However, if the connected
1200+ * SFP comes up in Fixed PHY config, the link will not come up as
1201+ * PLL isn't enabled while the initial mode set command is issued.
1202+ * So, force the mode change for SFI in Fixed PHY configuration to
1203+ * fix link issues.
1204+ */
1205+ if (mode == XGBE_MODE_SFI)
1206+ xgbe_change_mode(pdata, mode);
1207+ else
1208+ xgbe_set_mode(pdata, mode);
11971209
11981210 return 0;
11991211 }
drivers/net/ethernet/aquantia/atlantic/aq_ptp.c+5−5
@@ -553,17 +553,17 @@ void aq_ptp_tx_hwtstamp(struct aq_nic_s *aq_nic, u64 timestamp) · 552 unmodified lines
553553
554554 /* aq_ptp_rx_hwtstamp - utility function which checks for RX time stamp
555555 * @adapter: pointer to adapter struct
556− * @skb: particular skb to send timestamp with
556+ * @shhwtstamps: particular skb_shared_hwtstamps to save timestamp
557557 *
558558 * if the timestamp is valid, we convert it into the timecounter ns
559559 * value, then store that result into the hwtstamps structure which
560560 * is passed up the network stack
561561 */
562−static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct sk_buff *skb,
562+static void aq_ptp_rx_hwtstamp(struct aq_ptp_s *aq_ptp, struct skb_shared_hwtstamps *shhwtstamps,
563563 u64 timestamp)
564564 {
565565 timestamp -= atomic_read(&aq_ptp->offset_ingress);
566− aq_ptp_convert_to_hwtstamp(aq_ptp, skb_hwtstamps(skb), timestamp);
566+ aq_ptp_convert_to_hwtstamp(aq_ptp, shhwtstamps, timestamp);
567567 }
568568
569569 void aq_ptp_hwtstamp_config_get(struct aq_ptp_s *aq_ptp,
@@ -639,7 +639,7 @@ bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring) · 69 unmodified lines
639639 &aq_ptp->ptp_rx == ring || &aq_ptp->hwts_rx == ring;
640640 }
641641
642−u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
642+u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
643643 unsigned int len)
644644 {
645645 struct aq_ptp_s *aq_ptp = aq_nic->aq_ptp;
@@ -648,7 +648,7 @@ u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p, · 2 unmodified lines
648648 p, len, &timestamp);
649649
650650 if (ret > 0)
651− aq_ptp_rx_hwtstamp(aq_ptp, skb, timestamp);
651+ aq_ptp_rx_hwtstamp(aq_ptp, shhwtstamps, timestamp);
652652
653653 return ret;
654654 }
drivers/net/ethernet/aquantia/atlantic/aq_ptp.h+2−2
@@ -67,7 +67,7 @@ int aq_ptp_hwtstamp_config_set(struct aq_ptp_s *aq_ptp, · 66 unmodified lines
6767 /* Return either ring is belong to PTP or not*/
6868 bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring);
6969
70−u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct sk_buff *skb, u8 *p,
70+u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic, struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
7171 unsigned int len);
7272
7373 struct ptp_clock *aq_ptp_get_ptp_clock(struct aq_ptp_s *aq_ptp);
@@ -143,7 +143,7 @@ static inline bool aq_ptp_ring(struct aq_nic_s *aq_nic, struct aq_ring_s *ring) · 69 unmodified lines
143143 }
144144
145145 static inline u16 aq_ptp_extract_ts(struct aq_nic_s *aq_nic,
146− struct sk_buff *skb, u8 *p,
146+ struct skb_shared_hwtstamps *shhwtstamps, u8 *p,
147147 unsigned int len)
148148 {
149149 return 0;
drivers/net/ethernet/aquantia/atlantic/aq_ring.c+12−6
@@ -647,7 +647,7 @@ static int __aq_ring_rx_clean(struct aq_ring_s *self, struct napi_struct *napi, · 646 unmodified lines
647647 }
648648 if (is_ptp_ring)
649649 buff->len -=
650− aq_ptp_extract_ts(self->aq_nic, skb,
650+ aq_ptp_extract_ts(self->aq_nic, skb_hwtstamps(skb),
651651 aq_buf_vaddr(&buff->rxdata),
652652 buff->len);
653653
@@ -742,6 +742,8 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring, · 88 unmodified lines
742742 struct aq_ring_buff_s *buff = &rx_ring->buff_ring[rx_ring->sw_head];
743743 bool is_ptp_ring = aq_ptp_ring(rx_ring->aq_nic, rx_ring);
744744 struct aq_ring_buff_s *buff_ = NULL;
745+ u16 ptp_hwtstamp_len = 0;
746+ struct skb_shared_hwtstamps shhwtstamps;
745747 struct sk_buff *skb = NULL;
746748 unsigned int next_ = 0U;
747749 struct xdp_buff xdp;
@@ -810,11 +812,12 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring, · 62 unmodified lines
810812 hard_start = page_address(buff->rxdata.page) +
811813 buff->rxdata.pg_off - rx_ring->page_offset;
812814
813− if (is_ptp_ring)
814− buff->len -=
815− aq_ptp_extract_ts(rx_ring->aq_nic, skb,
816− aq_buf_vaddr(&buff->rxdata),
817− buff->len);
815+ if (is_ptp_ring) {
816+ ptp_hwtstamp_len = aq_ptp_extract_ts(rx_ring->aq_nic, &shhwtstamps,
817+ aq_buf_vaddr(&buff->rxdata),
818+ buff->len);
819+ buff->len -= ptp_hwtstamp_len;
820+ }
818821
819822 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
820823 xdp_prepare_buff(&xdp, hard_start, rx_ring->page_offset,
@@ -834,6 +837,9 @@ static int __aq_ring_xdp_clean(struct aq_ring_s *rx_ring, · 13 unmodified lines
834837 if (IS_ERR(skb) || !skb)
835838 continue;
836839
840+ if (ptp_hwtstamp_len > 0)
841+ *skb_hwtstamps(skb) = shhwtstamps;
842+
837843 if (buff->is_vlan)
838844 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
839845 buff->vlan_rx_tag);
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c+1−0
@@ -2075,6 +2075,7 @@ destroy_flow_table: · 2074 unmodified lines
20752075 rhashtable_destroy(&tc_info->flow_table);
20762076 free_tc_info:
20772077 kfree(tc_info);
2078+ bp->tc_info = NULL;
20782079 return rc;
20792080 }
20802081
drivers/net/ethernet/broadcom/tg3.c+46−7
@@ -6474,6 +6474,14 @@ static void tg3_dump_state(struct tg3 *tp) · 6473 unmodified lines
64746474 int i;
64756475 u32 *regs;
64766476
6477+ /* If it is a PCI error, all registers will be 0xffff,
6478+ * we don't dump them out, just report the error and return
6479+ */
6480+ if (tp->pdev->error_state != pci_channel_io_normal) {
6481+ netdev_err(tp->dev, "PCI channel ERROR!\n");
6482+ return;
6483+ }
6484+
64776485 regs = kzalloc(TG3_REG_BLK_SIZE, GFP_ATOMIC);
64786486 if (!regs)
64796487 return;
@@ -6889,7 +6897,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) · 409 unmodified lines
68896897 desc_idx, *post_ptr);
68906898 drop_it_no_recycle:
68916899 /* Other statistics kept track of by card. */
6892− tp->rx_dropped++;
6900+ tnapi->rx_dropped++;
68936901 goto next_pkt;
68946902 }
68956903
@@ -7918,8 +7926,10 @@ static int tg3_tso_bug(struct tg3 *tp, struct tg3_napi *tnapi, · 1022 unmodified lines
79187926
79197927 segs = skb_gso_segment(skb, tp->dev->features &
79207928 ~(NETIF_F_TSO | NETIF_F_TSO6));
7921− if (IS_ERR(segs) || !segs)
7929+ if (IS_ERR(segs) || !segs) {
7930+ tnapi->tx_dropped++;
79227931 goto tg3_tso_bug_end;
7932+ }
79237933
79247934 skb_list_walk_safe(segs, seg, next) {
79257935 skb_mark_not_on_list(seg);
@@ -8190,7 +8200,7 @@ dma_error: · 264 unmodified lines
81908200 drop:
81918201 dev_kfree_skb_any(skb);
81928202 drop_nofree:
8193− tp->tx_dropped++;
8203+ tnapi->tx_dropped++;
81948204 return NETDEV_TX_OK;
81958205 }
81968206
@@ -9405,7 +9415,7 @@ static void __tg3_set_rx_mode(struct net_device *); · 1208 unmodified lines
94059415 /* tp->lock is held. */
94069416 static int tg3_halt(struct tg3 *tp, int kind, bool silent)
94079417 {
9408− int err;
9418+ int err, i;
94099419
94109420 tg3_stop_fw(tp);
94119421
@@ -9426,6 +9436,13 @@ static int tg3_halt(struct tg3 *tp, int kind, bool silent) · 14 unmodified lines
94269436
94279437 /* And make sure the next sample is new data */
94289438 memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats));
9439+
9440+ for (i = 0; i < TG3_IRQ_MAX_VECS; ++i) {
9441+ struct tg3_napi *tnapi = &tp->napi[i];
9442+
9443+ tnapi->rx_dropped = 0;
9444+ tnapi->tx_dropped = 0;
9445+ }
94299446 }
94309447
94319448 return err;
@@ -11250,7 +11267,8 @@ static void tg3_reset_task(struct work_struct *work) · 1818 unmodified lines
1125011267 rtnl_lock();
1125111268 tg3_full_lock(tp, 0);
1125211269
11253− if (tp->pcierr_recovery || !netif_running(tp->dev)) {
11270+ if (tp->pcierr_recovery || !netif_running(tp->dev) ||
11271+ tp->pdev->error_state != pci_channel_io_normal) {
1125411272 tg3_flag_clear(tp, RESET_TASK_PENDING);
1125511273 tg3_full_unlock(tp);
1125611274 rtnl_unlock();
@@ -11975,6 +11993,9 @@ static void tg3_get_nstats(struct tg3 *tp, struct rtnl_link_stats64 *stats) · 718 unmodified lines
1197511993 {
1197611994 struct rtnl_link_stats64 *old_stats = &tp->net_stats_prev;
1197711995 struct tg3_hw_stats *hw_stats = tp->hw_stats;
11996+ unsigned long rx_dropped;
11997+ unsigned long tx_dropped;
11998+ int i;
1197811999
1197912000 stats->rx_packets = old_stats->rx_packets +
1198012001 get_stat64(&hw_stats->rx_ucast_packets) +
@@ -12021,8 +12042,26 @@ static void tg3_get_nstats(struct tg3 *tp, struct rtnl_link_stats64 *stats) · 40 unmodified lines
1202112042 stats->rx_missed_errors = old_stats->rx_missed_errors +
1202212043 get_stat64(&hw_stats->rx_discards);
1202312044
12024− stats->rx_dropped = tp->rx_dropped;
12025− stats->tx_dropped = tp->tx_dropped;
12045+ /* Aggregate per-queue counters. The per-queue counters are updated
12046+ * by a single writer, race-free. The result computed by this loop
12047+ * might not be 100% accurate (counters can be updated in the middle of
12048+ * the loop) but the next tg3_get_nstats() will recompute the current
12049+ * value so it is acceptable.
12050+ *
12051+ * Note that these counters wrap around at 4G on 32bit machines.
12052+ */
12053+ rx_dropped = (unsigned long)(old_stats->rx_dropped);
12054+ tx_dropped = (unsigned long)(old_stats->tx_dropped);
12055+
12056+ for (i = 0; i < tp->irq_cnt; i++) {
12057+ struct tg3_napi *tnapi = &tp->napi[i];
12058+
12059+ rx_dropped += tnapi->rx_dropped;
12060+ tx_dropped += tnapi->tx_dropped;
12061+ }
12062+
12063+ stats->rx_dropped = rx_dropped;
12064+ stats->tx_dropped = tx_dropped;
1202612065 }
1202712066
1202812067 static int tg3_get_regs_len(struct net_device *dev)
drivers/net/ethernet/broadcom/tg3.h+2−2
@@ -3018,6 +3018,7 @@ struct tg3_napi { · 3017 unmodified lines
30183018 u16 *rx_rcb_prod_idx;
30193019 struct tg3_rx_prodring_set prodring;
30203020 struct tg3_rx_buffer_desc *rx_rcb;
3021+ unsigned long rx_dropped;
30213022
30223023 u32 tx_prod ____cacheline_aligned;
30233024 u32 tx_cons;
@@ -3026,6 +3027,7 @@ struct tg3_napi { · 2 unmodified lines
30263027 u32 prodmbox;
30273028 struct tg3_tx_buffer_desc *tx_ring;
30283029 struct tg3_tx_ring_info *tx_buffers;
3030+ unsigned long tx_dropped;
30293031
30303032 dma_addr_t status_mapping;
30313033 dma_addr_t rx_rcb_mapping;
@@ -3220,8 +3222,6 @@ struct tg3 { · 188 unmodified lines
32203222
32213223
32223224 /* begin "everything else" cacheline(s) section */
3223− unsigned long rx_dropped;
3224− unsigned long tx_dropped;
32253225 struct rtnl_link_stats64 net_stats_prev;
32263226 struct tg3_ethtool_stats estats_prev;
32273227
drivers/net/ethernet/cortina/gemini.c+29−16
@@ -432,8 +432,8 @@ static const struct gmac_max_framelen gmac_maxlens[] = { · 431 unmodified lines
432432 .val = CONFIG0_MAXLEN_1536,
433433 },
434434 {
435− .max_l3_len = 1542,
436− .val = CONFIG0_MAXLEN_1542,
435+ .max_l3_len = 1548,
436+ .val = CONFIG0_MAXLEN_1548,
437437 },
438438 {
439439 .max_l3_len = 9212,
@@ -1145,6 +1145,7 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, · 705 unmodified lines
11451145 dma_addr_t mapping;
11461146 unsigned short mtu;
11471147 void *buffer;
1148+ int ret;
11481149
11491150 mtu = ETH_HLEN;
11501151 mtu += netdev->mtu;
@@ -1159,9 +1160,30 @@ static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb, · 8 unmodified lines
11591160 word3 |= mtu;
11601161 }
11611162
1162− if (skb->ip_summed != CHECKSUM_NONE) {
1163+ if (skb->len >= ETH_FRAME_LEN) {
1164+ /* Hardware offloaded checksumming isn't working on frames
1165+ * bigger than 1514 bytes. A hypothesis about this is that the
1166+ * checksum buffer is only 1518 bytes, so when the frames get
1167+ * bigger they get truncated, or the last few bytes get
1168+ * overwritten by the FCS.
1169+ *
1170+ * Just use software checksumming and bypass on bigger frames.
1171+ */
1172+ if (skb->ip_summed == CHECKSUM_PARTIAL) {
1173+ ret = skb_checksum_help(skb);
1174+ if (ret)
1175+ return ret;
1176+ }
1177+ word1 |= TSS_BYPASS_BIT;
1178+ } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
11631179 int tcp = 0;
11641180
1181+ /* We do not switch off the checksumming on non TCP/UDP
1182+ * frames: as is shown from tests, the checksumming engine
1183+ * is smart enough to see that a frame is not actually TCP
1184+ * or UDP and then just pass it through without any changes
1185+ * to the frame.
1186+ */
11651187 if (skb->protocol == htons(ETH_P_IP)) {
11661188 word1 |= TSS_IP_CHKSUM_BIT;
11671189 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP;
@@ -1978,15 +2000,6 @@ static int gmac_change_mtu(struct net_device *netdev, int new_mtu) · 810 unmodified lines
19782000 return 0;
19792001 }
19802002
1981−static netdev_features_t gmac_fix_features(struct net_device *netdev,
1982− netdev_features_t features)
1983−{
1984− if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK)
1985− features &= ~GMAC_OFFLOAD_FEATURES;
1986−
1987− return features;
1988−}
1989−
19902003 static int gmac_set_features(struct net_device *netdev,
19912004 netdev_features_t features)
19922005 {
@@ -2212,7 +2225,6 @@ static const struct net_device_ops gmac_351x_ops = { · 219 unmodified lines
22122225 .ndo_set_mac_address = gmac_set_mac_address,
22132226 .ndo_get_stats64 = gmac_get_stats64,
22142227 .ndo_change_mtu = gmac_change_mtu,
2215− .ndo_fix_features = gmac_fix_features,
22162228 .ndo_set_features = gmac_set_features,
22172229 };
22182230
@@ -2464,11 +2476,12 @@ static int gemini_ethernet_port_probe(struct platform_device *pdev) · 245 unmodified lines
24642476
24652477 netdev->hw_features = GMAC_OFFLOAD_FEATURES;
24662478 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2467− /* We can handle jumbo frames up to 10236 bytes so, let's accept
2468− * payloads of 10236 bytes minus VLAN and ethernet header
2479+ /* We can receive jumbo frames up to 10236 bytes but only
2480+ * transmit 2047 bytes so, let's accept payloads of 2047
2481+ * bytes minus VLAN and ethernet header
24692482 */
24702483 netdev->min_mtu = ETH_MIN_MTU;
2471− netdev->max_mtu = 10236 - VLAN_ETH_HLEN;
2484+ netdev->max_mtu = MTU_SIZE_BIT_MASK - VLAN_ETH_HLEN;
24722485
24732486 port->freeq_refill = 0;
24742487 netif_napi_add(netdev, &port->napi, gmac_napi_poll);
drivers/net/ethernet/cortina/gemini.h+2−2
@@ -502,7 +502,7 @@ union gmac_txdesc_3 { · 501 unmodified lines
502502 #define SOF_BIT 0x80000000
503503 #define EOF_BIT 0x40000000
504504 #define EOFIE_BIT BIT(29)
505−#define MTU_SIZE_BIT_MASK 0x1fff
505+#define MTU_SIZE_BIT_MASK 0x7ff /* Max MTU 2047 bytes */
506506
507507 /* GMAC Tx Descriptor */
508508 struct gmac_txdesc {
@@ -787,7 +787,7 @@ union gmac_config0 { · 278 unmodified lines
787787 #define CONFIG0_MAXLEN_1536 0
788788 #define CONFIG0_MAXLEN_1518 1
789789 #define CONFIG0_MAXLEN_1522 2
790−#define CONFIG0_MAXLEN_1542 3
790+#define CONFIG0_MAXLEN_1548 3
791791 #define CONFIG0_MAXLEN_9k 4 /* 9212 */
792792 #define CONFIG0_MAXLEN_10k 5 /* 10236 */
793793 #define CONFIG0_MAXLEN_1518__6 6
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+10−6
@@ -516,8 +516,6 @@ struct sk_buff *dpaa2_eth_alloc_skb(struct dpaa2_eth_priv *priv, · 515 unmodified lines
516516
517517 memcpy(skb->data, fd_vaddr + fd_offset, fd_length);
518518
519− dpaa2_eth_recycle_buf(priv, ch, dpaa2_fd_get_addr(fd));
520−
521519 return skb;
522520 }
523521
@@ -589,6 +587,7 @@ void dpaa2_eth_rx(struct dpaa2_eth_priv *priv, · 65 unmodified lines
589587 struct rtnl_link_stats64 *percpu_stats;
590588 struct dpaa2_eth_drv_stats *percpu_extras;
591589 struct device *dev = priv->net_dev->dev.parent;
590+ bool recycle_rx_buf = false;
592591 void *buf_data;
593592 u32 xdp_act;
594593
@@ -618,6 +617,8 @@ void dpaa2_eth_rx(struct dpaa2_eth_priv *priv, · 23 unmodified lines
618617 dma_unmap_page(dev, addr, priv->rx_buf_size,
619618 DMA_BIDIRECTIONAL);
620619 skb = dpaa2_eth_build_linear_skb(ch, fd, vaddr);
620+ } else {
621+ recycle_rx_buf = true;
621622 }
622623 } else if (fd_format == dpaa2_fd_sg) {
623624 WARN_ON(priv->xdp_prog);
@@ -637,6 +638,9 @@ void dpaa2_eth_rx(struct dpaa2_eth_priv *priv, · 13 unmodified lines
637638 goto err_build_skb;
638639
639640 dpaa2_eth_receive_skb(priv, ch, fd, vaddr, fq, percpu_stats, skb);
641+
642+ if (recycle_rx_buf)
643+ dpaa2_eth_recycle_buf(priv, ch, dpaa2_fd_get_addr(fd));
640644 return;
641645
642646 err_build_skb:
@@ -1073,14 +1077,12 @@ static int dpaa2_eth_build_single_fd(struct dpaa2_eth_priv *priv, · 430 unmodified lines
10731077 dma_addr_t addr;
10741078
10751079 buffer_start = skb->data - dpaa2_eth_needed_headroom(skb);
1076−
1077− /* If there's enough room to align the FD address, do it.
1078− * It will help hardware optimize accesses.
1079− */
10801080 aligned_start = PTR_ALIGN(buffer_start - DPAA2_ETH_TX_BUF_ALIGN,
10811081 DPAA2_ETH_TX_BUF_ALIGN);
10821082 if (aligned_start >= skb->head)
10831083 buffer_start = aligned_start;
1084+ else
1085+ return -ENOMEM;
10841086
10851087 /* Store a backpointer to the skb at the beginning of the buffer
10861088 * (in the private data area) such that we can release it
@@ -4967,6 +4969,8 @@ static int dpaa2_eth_probe(struct fsl_mc_device *dpni_dev) · 3880 unmodified lines
49674969 if (err)
49684970 goto err_dl_port_add;
49694971
4972+ net_dev->needed_headroom = DPAA2_ETH_SWA_SIZE + DPAA2_ETH_TX_BUF_ALIGN;
4973+
49704974 err = register_netdev(net_dev);
49714975 if (err < 0) {
49724976 dev_err(dev, "register_netdev() failed\n");
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.h+1−1
@@ -740,7 +740,7 @@ static inline bool dpaa2_eth_rx_pause_enabled(u64 link_options) · 739 unmodified lines
740740
741741 static inline unsigned int dpaa2_eth_needed_headroom(struct sk_buff *skb)
742742 {
743− unsigned int headroom = DPAA2_ETH_SWA_SIZE;
743+ unsigned int headroom = DPAA2_ETH_SWA_SIZE + DPAA2_ETH_TX_BUF_ALIGN;
744744
745745 /* If we don't have an skb (e.g. XDP buffer), we only need space for
746746 * the software annotation area
drivers/net/ethernet/google/gve/gve_main.c+7−1
@@ -254,10 +254,13 @@ static int gve_napi_poll(struct napi_struct *napi, int budget) · 253 unmodified lines
254254 if (block->tx) {
255255 if (block->tx->q_num < priv->tx_cfg.num_queues)
256256 reschedule |= gve_tx_poll(block, budget);
257− else
257+ else if (budget)
258258 reschedule |= gve_xdp_poll(block, budget);
259259 }
260260
261+ if (!budget)
262+ return 0;
263+
261264 if (block->rx) {
262265 work_done = gve_rx_poll(block, budget);
263266 reschedule |= work_done == budget;
@@ -298,6 +301,9 @@ static int gve_napi_poll_dqo(struct napi_struct *napi, int budget) · 34 unmodified lines
298301 if (block->tx)
299302 reschedule |= gve_tx_poll_dqo(block, /*do_clean=*/true);
300303
304+ if (!budget)
305+ return 0;
306+
301307 if (block->rx) {
302308 work_done = gve_rx_poll_dqo(block, budget);
303309 reschedule |= work_done == budget;
drivers/net/ethernet/google/gve/gve_rx.c+0−4
@@ -1007,10 +1007,6 @@ int gve_rx_poll(struct gve_notify_block *block, int budget) · 1006 unmodified lines
10071007
10081008 feat = block->napi.dev->features;
10091009
1010− /* If budget is 0, do all the work */
1011− if (budget == 0)
1012− budget = INT_MAX;
1013−
10141010 if (budget > 0)
10151011 work_done = gve_clean_rx_done(rx, budget, feat);
10161012
drivers/net/ethernet/google/gve/gve_tx.c+0−4
@@ -925,10 +925,6 @@ bool gve_xdp_poll(struct gve_notify_block *block, int budget) · 924 unmodified lines
925925 bool repoll;
926926 u32 to_do;
927927
928− /* If budget is 0, do all the work */
929− if (budget == 0)
930− budget = INT_MAX;
931−
932928 /* Find out how much work there is to be done */
933929 nic_done = gve_tx_load_event_counter(priv, tx);
934930 to_do = min_t(u32, (nic_done - tx->done), budget);
drivers/net/ethernet/hisilicon/hns/hns_dsaf_mac.c+29−0
@@ -66,6 +66,27 @@ static enum mac_mode hns_get_enet_interface(const struct hns_mac_cb *mac_cb) · 65 unmodified lines
6666 }
6767 }
6868
69+static u32 hns_mac_link_anti_shake(struct mac_driver *mac_ctrl_drv)
70+{
71+#define HNS_MAC_LINK_WAIT_TIME 5
72+#define HNS_MAC_LINK_WAIT_CNT 40
73+
74+ u32 link_status = 0;
75+ int i;
76+
77+ if (!mac_ctrl_drv->get_link_status)
78+ return link_status;
79+
80+ for (i = 0; i < HNS_MAC_LINK_WAIT_CNT; i++) {
81+ msleep(HNS_MAC_LINK_WAIT_TIME);
82+ mac_ctrl_drv->get_link_status(mac_ctrl_drv, &link_status);
83+ if (!link_status)
84+ break;
85+ }
86+
87+ return link_status;
88+}
89+
6990 void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status)
7091 {
7192 struct mac_driver *mac_ctrl_drv;
@@ -83,6 +104,14 @@ void hns_mac_get_link_status(struct hns_mac_cb *mac_cb, u32 *link_status) · 11 unmodified lines
83104 &sfp_prsnt);
84105 if (!ret)
85106 *link_status = *link_status && sfp_prsnt;
107+
108+ /* for FIBER port, it may have a fake link up.
109+ * when the link status changes from down to up, we need to do
110+ * anti-shake. the anti-shake time is base on tests.
111+ * only FIBER port need to do this.
112+ */
113+ if (*link_status && !mac_cb->link)
114+ *link_status = hns_mac_link_anti_shake(mac_ctrl_drv);
86115 }
87116
88117 mac_cb->link = *link_status;
drivers/net/ethernet/hisilicon/hns/hns_enet.c+31−22
@@ -142,7 +142,8 @@ MODULE_DEVICE_TABLE(acpi, hns_enet_acpi_match); · 141 unmodified lines
142142
143143 static void fill_desc(struct hnae_ring *ring, void *priv,
144144 int size, dma_addr_t dma, int frag_end,
145− int buf_num, enum hns_desc_type type, int mtu)
145+ int buf_num, enum hns_desc_type type, int mtu,
146+ bool is_gso)
146147 {
147148 struct hnae_desc *desc = &ring->desc[ring->next_to_use];
148149 struct hnae_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];
@@ -275,6 +276,15 @@ static int hns_nic_maybe_stop_tso( · 126 unmodified lines
275276 return 0;
276277 }
277278
279+static int hns_nic_maybe_stop_tx_v2(struct sk_buff **out_skb, int *bnum,
280+ struct hnae_ring *ring)
281+{
282+ if (skb_is_gso(*out_skb))
283+ return hns_nic_maybe_stop_tso(out_skb, bnum, ring);
284+ else
285+ return hns_nic_maybe_stop_tx(out_skb, bnum, ring);
286+}
287+
278288 static void fill_tso_desc(struct hnae_ring *ring, void *priv,
279289 int size, dma_addr_t dma, int frag_end,
280290 int buf_num, enum hns_desc_type type, int mtu)
@@ -300,6 +310,19 @@ static void fill_tso_desc(struct hnae_ring *ring, void *priv, · 19 unmodified lines
300310 mtu);
301311 }
302312
313+static void fill_desc_v2(struct hnae_ring *ring, void *priv,
314+ int size, dma_addr_t dma, int frag_end,
315+ int buf_num, enum hns_desc_type type, int mtu,
316+ bool is_gso)
317+{
318+ if (is_gso)
319+ fill_tso_desc(ring, priv, size, dma, frag_end, buf_num, type,
320+ mtu);
321+ else
322+ fill_v2_desc(ring, priv, size, dma, frag_end, buf_num, type,
323+ mtu);
324+}
325+
303326 netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev,
304327 struct sk_buff *skb,
305328 struct hns_nic_ring_data *ring_data)
@@ -313,6 +336,7 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev, · 7 unmodified lines
313336 int seg_num;
314337 dma_addr_t dma;
315338 int size, next_to_use;
339+ bool is_gso;
316340 int i;
317341
318342 switch (priv->ops.maybe_stop_tx(&skb, &buf_num, ring)) {
@@ -339,8 +363,9 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev, · 20 unmodified lines
339363 ring->stats.sw_err_cnt++;
340364 goto out_err_tx_ok;
341365 }
366+ is_gso = skb_is_gso(skb);
342367 priv->ops.fill_desc(ring, skb, size, dma, seg_num == 1 ? 1 : 0,
343− buf_num, DESC_TYPE_SKB, ndev->mtu);
368+ buf_num, DESC_TYPE_SKB, ndev->mtu, is_gso);
344369
345370 /* fill the fragments */
346371 for (i = 1; i < seg_num; i++) {
@@ -354,7 +379,7 @@ netdev_tx_t hns_nic_net_xmit_hw(struct net_device *ndev, · 7 unmodified lines
354379 }
355380 priv->ops.fill_desc(ring, skb_frag_page(frag), size, dma,
356381 seg_num - 1 == i ? 1 : 0, buf_num,
357− DESC_TYPE_PAGE, ndev->mtu);
382+ DESC_TYPE_PAGE, ndev->mtu, is_gso);
358383 }
359384
360385 /*complete translate all packets*/
@@ -1776,15 +1801,6 @@ static int hns_nic_set_features(struct net_device *netdev, · 1415 unmodified lines
17761801 netdev_info(netdev, "enet v1 do not support tso!\n");
17771802 break;
17781803 default:
1779− if (features & (NETIF_F_TSO | NETIF_F_TSO6)) {
1780− priv->ops.fill_desc = fill_tso_desc;
1781− priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
1782− /* The chip only support 7*4096 */
1783− netif_set_tso_max_size(netdev, 7 * 4096);
1784− } else {
1785− priv->ops.fill_desc = fill_v2_desc;
1786− priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
1787− }
17881804 break;
17891805 }
17901806 netdev->features = features;
@@ -2159,16 +2175,9 @@ static void hns_nic_set_priv_ops(struct net_device *netdev) · 368 unmodified lines
21592175 priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
21602176 } else {
21612177 priv->ops.get_rxd_bnum = get_v2rx_desc_bnum;
2162− if ((netdev->features & NETIF_F_TSO) ||
2163− (netdev->features & NETIF_F_TSO6)) {
2164− priv->ops.fill_desc = fill_tso_desc;
2165− priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
2166− /* This chip only support 7*4096 */
2167− netif_set_tso_max_size(netdev, 7 * 4096);
2168− } else {
2169− priv->ops.fill_desc = fill_v2_desc;
2170− priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
2171− }
2178+ priv->ops.fill_desc = fill_desc_v2;
2179+ priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx_v2;
2180+ netif_set_tso_max_size(netdev, 7 * 4096);
21722181 /* enable tso when init
21732182 * control tso on/off through TSE bit in bd
21742183 */
drivers/net/ethernet/hisilicon/hns/hns_enet.h+2−1
@@ -44,7 +44,8 @@ struct hns_nic_ring_data { · 43 unmodified lines
4444 struct hns_nic_ops {
4545 void (*fill_desc)(struct hnae_ring *ring, void *priv,
4646 int size, dma_addr_t dma, int frag_end,
47− int buf_num, enum hns_desc_type type, int mtu);
47+ int buf_num, enum hns_desc_type type, int mtu,
48+ bool is_gso);
4849 int (*maybe_stop_tx)(struct sk_buff **out_skb,
4950 int *bnum, struct hnae_ring *ring);
5051 void (*get_rxd_bnum)(u32 bnum_flag, int *out_bnum);
drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c+6−3
@@ -503,11 +503,14 @@ static void hns3_get_coal_info(struct hns3_enet_tqp_vector *tqp_vector, · 502 unmodified lines
503503 }
504504
505505 sprintf(result[j++], "%d", i);
506− sprintf(result[j++], "%s", dim_state_str[dim->state]);
506+ sprintf(result[j++], "%s", dim->state < ARRAY_SIZE(dim_state_str) ?
507+ dim_state_str[dim->state] : "unknown");
507508 sprintf(result[j++], "%u", dim->profile_ix);
508− sprintf(result[j++], "%s", dim_cqe_mode_str[dim->mode]);
509+ sprintf(result[j++], "%s", dim->mode < ARRAY_SIZE(dim_cqe_mode_str) ?
510+ dim_cqe_mode_str[dim->mode] : "unknown");
509511 sprintf(result[j++], "%s",
510− dim_tune_stat_str[dim->tune_state]);
512+ dim->tune_state < ARRAY_SIZE(dim_tune_stat_str) ?
513+ dim_tune_stat_str[dim->tune_state] : "unknown");
511514 sprintf(result[j++], "%u", dim->steps_left);
512515 sprintf(result[j++], "%u", dim->steps_right);
513516 sprintf(result[j++], "%u", dim->tired);
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+1−1
@@ -5139,7 +5139,7 @@ static int hns3_init_mac_addr(struct net_device *netdev) · 5138 unmodified lines
51395139 struct hns3_nic_priv *priv = netdev_priv(netdev);
51405140 char format_mac_addr[HNAE3_FORMAT_MAC_ADDR_LEN];
51415141 struct hnae3_handle *h = priv->ae_handle;
5142− u8 mac_addr_temp[ETH_ALEN];
5142+ u8 mac_addr_temp[ETH_ALEN] = {0};
51435143 int ret = 0;
51445144
51455145 if (h->ae_algo->ops->get_mac_addr)
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+25−8
@@ -61,6 +61,7 @@ static void hclge_sync_fd_table(struct hclge_dev *hdev); · 60 unmodified lines
6161 static void hclge_update_fec_stats(struct hclge_dev *hdev);
6262 static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret,
6363 int wait_cnt);
64+static int hclge_update_port_info(struct hclge_dev *hdev);
6465
6566 static struct hnae3_ae_algo ae_algo;
6667
@@ -3041,6 +3042,9 @@ static void hclge_update_link_status(struct hclge_dev *hdev) · 2974 unmodified lines
30413042
30423043 if (state != hdev->hw.mac.link) {
30433044 hdev->hw.mac.link = state;
3045+ if (state == HCLGE_LINK_STATUS_UP)
3046+ hclge_update_port_info(hdev);
3047+
30443048 client->ops->link_status_change(handle, state);
30453049 hclge_config_mac_tnl_int(hdev, state);
30463050 if (rclient && rclient->ops->link_status_change)
@@ -10025,8 +10029,6 @@ static void hclge_rm_vport_vlan_table(struct hclge_vport *vport, u16 vlan_id, · 6978 unmodified lines
1002510029 struct hclge_vport_vlan_cfg *vlan, *tmp;
1002610030 struct hclge_dev *hdev = vport->back;
1002710031
10028− mutex_lock(&hdev->vport_lock);
10029−
1003010032 list_for_each_entry_safe(vlan, tmp, &vport->vlan_list, node) {
1003110033 if (vlan->vlan_id == vlan_id) {
1003210034 if (is_write_tbl && vlan->hd_tbl_status)
@@ -10041,8 +10043,6 @@ static void hclge_rm_vport_vlan_table(struct hclge_vport *vport, u16 vlan_id, · 8 unmodified lines
1004110043 break;
1004210044 }
1004310045 }
10044−
10045− mutex_unlock(&hdev->vport_lock);
1004610046 }
1004710047
1004810048 void hclge_rm_vport_all_vlan_table(struct hclge_vport *vport, bool is_del_list)
@@ -10451,11 +10451,16 @@ int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, · 402 unmodified lines
1045110451 * handle mailbox. Just record the vlan id, and remove it after
1045210452 * reset finished.
1045310453 */
10454+ mutex_lock(&hdev->vport_lock);
1045410455 if ((test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) ||
1045510456 test_bit(HCLGE_STATE_RST_FAIL, &hdev->state)) && is_kill) {
1045610457 set_bit(vlan_id, vport->vlan_del_fail_bmap);
10458+ mutex_unlock(&hdev->vport_lock);
1045710459 return -EBUSY;
10460+ } else if (!is_kill && test_bit(vlan_id, vport->vlan_del_fail_bmap)) {
10461+ clear_bit(vlan_id, vport->vlan_del_fail_bmap);
1045810462 }
10463+ mutex_unlock(&hdev->vport_lock);
1045910464
1046010465 /* when port base vlan enabled, we use port base vlan as the vlan
1046110466 * filter entry. In this case, we don't update vlan filter table
@@ -10470,17 +10475,22 @@ int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, · 8 unmodified lines
1047010475 }
1047110476
1047210477 if (!ret) {
10473− if (!is_kill)
10478+ if (!is_kill) {
1047410479 hclge_add_vport_vlan_table(vport, vlan_id,
1047510480 writen_to_tbl);
10476− else if (is_kill && vlan_id != 0)
10481+ } else if (is_kill && vlan_id != 0) {
10482+ mutex_lock(&hdev->vport_lock);
1047710483 hclge_rm_vport_vlan_table(vport, vlan_id, false);
10484+ mutex_unlock(&hdev->vport_lock);
10485+ }
1047810486 } else if (is_kill) {
1047910487 /* when remove hw vlan filter failed, record the vlan id,
1048010488 * and try to remove it from hw later, to be consistence
1048110489 * with stack
1048210490 */
10491+ mutex_lock(&hdev->vport_lock);
1048310492 set_bit(vlan_id, vport->vlan_del_fail_bmap);
10493+ mutex_unlock(&hdev->vport_lock);
1048410494 }
1048510495
1048610496 hclge_set_vport_vlan_fltr_change(vport);
@@ -10520,6 +10530,7 @@ static void hclge_sync_vlan_filter(struct hclge_dev *hdev) · 33 unmodified lines
1052010530 int i, ret, sync_cnt = 0;
1052110531 u16 vlan_id;
1052210532
10533+ mutex_lock(&hdev->vport_lock);
1052310534 /* start from vport 1 for PF is always alive */
1052410535 for (i = 0; i < hdev->num_alloc_vport; i++) {
1052510536 struct hclge_vport *vport = &hdev->vport[i];
@@ -10530,21 +10541,26 @@ static void hclge_sync_vlan_filter(struct hclge_dev *hdev) · 4 unmodified lines
1053010541 ret = hclge_set_vlan_filter_hw(hdev, htons(ETH_P_8021Q),
1053110542 vport->vport_id, vlan_id,
1053210543 true);
10533− if (ret && ret != -EINVAL)
10544+ if (ret && ret != -EINVAL) {
10545+ mutex_unlock(&hdev->vport_lock);
1053410546 return;
10547+ }
1053510548
1053610549 clear_bit(vlan_id, vport->vlan_del_fail_bmap);
1053710550 hclge_rm_vport_vlan_table(vport, vlan_id, false);
1053810551 hclge_set_vport_vlan_fltr_change(vport);
1053910552
1054010553 sync_cnt++;
10541− if (sync_cnt >= HCLGE_MAX_SYNC_COUNT)
10554+ if (sync_cnt >= HCLGE_MAX_SYNC_COUNT) {
10555+ mutex_unlock(&hdev->vport_lock);
1054210556 return;
10557+ }
1054310558
1054410559 vlan_id = find_first_bit(vport->vlan_del_fail_bmap,
1054510560 VLAN_N_VID);
1054610561 }
1054710562 }
10563+ mutex_unlock(&hdev->vport_lock);
1054810564
1054910565 hclge_sync_vlan_fltr_state(hdev);
1055010566 }
@@ -11651,6 +11667,7 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) · 1100 unmodified lines
1165111667 goto err_msi_irq_uninit;
1165211668
1165311669 if (hdev->hw.mac.media_type == HNAE3_MEDIA_TYPE_COPPER) {
11670+ clear_bit(HNAE3_DEV_SUPPORT_FEC_B, ae_dev->caps);
1165411671 if (hnae3_dev_phy_imp_supported(hdev))
1165511672 ret = hclge_update_tp_port_info(hdev);
1165611673 else
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+22−3
@@ -1206,6 +1206,8 @@ static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, · 1205 unmodified lines
12061206 test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) {
12071207 set_bit(vlan_id, hdev->vlan_del_fail_bmap);
12081208 return -EBUSY;
1209+ } else if (!is_kill && test_bit(vlan_id, hdev->vlan_del_fail_bmap)) {
1210+ clear_bit(vlan_id, hdev->vlan_del_fail_bmap);
12091211 }
12101212
12111213 hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN,
@@ -1233,20 +1235,25 @@ static void hclgevf_sync_vlan_filter(struct hclgevf_dev *hdev) · 21 unmodified lines
12331235 int ret, sync_cnt = 0;
12341236 u16 vlan_id;
12351237
1238+ if (bitmap_empty(hdev->vlan_del_fail_bmap, VLAN_N_VID))
1239+ return;
1240+
1241+ rtnl_lock();
12361242 vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID);
12371243 while (vlan_id != VLAN_N_VID) {
12381244 ret = hclgevf_set_vlan_filter(handle, htons(ETH_P_8021Q),
12391245 vlan_id, true);
12401246 if (ret)
1241− return;
1247+ break;
12421248
12431249 clear_bit(vlan_id, hdev->vlan_del_fail_bmap);
12441250 sync_cnt++;
12451251 if (sync_cnt >= HCLGEVF_MAX_SYNC_COUNT)
1246− return;
1252+ break;
12471253
12481254 vlan_id = find_first_bit(hdev->vlan_del_fail_bmap, VLAN_N_VID);
12491255 }
1256+ rtnl_unlock();
12501257 }
12511258
12521259 static int hclgevf_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable)
@@ -1974,8 +1981,18 @@ static enum hclgevf_evt_cause hclgevf_check_evt_cause(struct hclgevf_dev *hdev, · 721 unmodified lines
19741981 return HCLGEVF_VECTOR0_EVENT_OTHER;
19751982 }
19761983
1984+static void hclgevf_reset_timer(struct timer_list *t)
1985+{
1986+ struct hclgevf_dev *hdev = from_timer(hdev, t, reset_timer);
1987+
1988+ hclgevf_clear_event_cause(hdev, HCLGEVF_VECTOR0_EVENT_RST);
1989+ hclgevf_reset_task_schedule(hdev);
1990+}
1991+
19771992 static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data)
19781993 {
1994+#define HCLGEVF_RESET_DELAY 5
1995+
19791996 enum hclgevf_evt_cause event_cause;
19801997 struct hclgevf_dev *hdev = data;
19811998 u32 clearval;
@@ -1987,7 +2004,8 @@ static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) · 5 unmodified lines
19872004
19882005 switch (event_cause) {
19892006 case HCLGEVF_VECTOR0_EVENT_RST:
1990− hclgevf_reset_task_schedule(hdev);
2007+ mod_timer(&hdev->reset_timer,
2008+ jiffies + msecs_to_jiffies(HCLGEVF_RESET_DELAY));
19912009 break;
19922010 case HCLGEVF_VECTOR0_EVENT_MBX:
19932011 hclgevf_mbx_handler(hdev);
@@ -2930,6 +2948,7 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev) · 936 unmodified lines
29302948 HCLGEVF_DRIVER_NAME);
29312949
29322950 hclgevf_task_schedule(hdev, round_jiffies_relative(HZ));
2951+ timer_setup(&hdev->reset_timer, hclgevf_reset_timer, 0);
29332952
29342953 return 0;
29352954
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.h+1−0
@@ -219,6 +219,7 @@ struct hclgevf_dev { · 218 unmodified lines
219219 enum hnae3_reset_type reset_level;
220220 unsigned long reset_pending;
221221 enum hnae3_reset_type reset_type;
222+ struct timer_list reset_timer;
222223
223224 #define HCLGEVF_RESET_REQUESTED 0
224225 #define HCLGEVF_RESET_PENDING 1
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_mbx.c+7−0
@@ -63,6 +63,9 @@ static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1, · 62 unmodified lines
6363 i++;
6464 }
6565
66+ /* ensure additional_info will be seen after received_resp */
67+ smp_rmb();
68+
6669 if (i >= HCLGEVF_MAX_TRY_TIMES) {
6770 dev_err(&hdev->pdev->dev,
6871 "VF could not get mbx(%u,%u) resp(=%d) from PF in %d tries\n",
@@ -178,6 +181,10 @@ static void hclgevf_handle_mbx_response(struct hclgevf_dev *hdev, · 109 unmodified lines
178181 resp->resp_status = hclgevf_resp_to_errno(resp_status);
179182 memcpy(resp->additional_info, req->msg.resp_data,
180183 HCLGE_MBX_MAX_RESP_DATA_SIZE * sizeof(u8));
184+
185+ /* ensure additional_info will be seen before setting received_resp */
186+ smp_wmb();
187+
181188 if (match_id) {
182189 /* If match_id is not zero, it means PF support match_id.
183190 * if the match_id is right, VF get the right response, or
drivers/net/ethernet/intel/i40e/i40e_main.c+1−1
@@ -16224,7 +16224,7 @@ static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 16223 unmodified lines
1622416224 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
1622516225 if (val < MAX_FRAME_SIZE_DEFAULT)
1622616226 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
16227− i, val);
16227+ pf->hw.port, val);
1622816228
1622916229 /* Add a filter to drop all Flow control frames from any VSI from being
1623016230 * transmitted. By doing so we stop a malicious VF from sending out
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+9−7
@@ -3844,7 +3844,7 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg) · 3843 unmodified lines
38443844 struct i40e_pf *pf = vf->pf;
38453845 struct i40e_vsi *vsi = NULL;
38463846 int aq_ret = 0;
3847− int i, ret;
3847+ int i;
38483848
38493849 if (!i40e_sync_vf_state(vf, I40E_VF_STATE_ACTIVE)) {
38503850 aq_ret = -EINVAL;
@@ -3868,8 +3868,10 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg) · 17 unmodified lines
38683868 }
38693869
38703870 cfilter = kzalloc(sizeof(*cfilter), GFP_KERNEL);
3871− if (!cfilter)
3872− return -ENOMEM;
3871+ if (!cfilter) {
3872+ aq_ret = -ENOMEM;
3873+ goto err_out;
3874+ }
38733875
38743876 /* parse destination mac address */
38753877 for (i = 0; i < ETH_ALEN; i++)
@@ -3917,13 +3919,13 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf *vf, u8 *msg) · 41 unmodified lines
39173919
39183920 /* Adding cloud filter programmed as TC filter */
39193921 if (tcf.dst_port)
3920− ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
3922+ aq_ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter, true);
39213923 else
3922− ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3923− if (ret) {
3924+ aq_ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
3925+ if (aq_ret) {
39243926 dev_err(&pf->pdev->dev,
39253927 "VF %d: Failed to add cloud filter, err %pe aq_err %s\n",
3926− vf->vf_id, ERR_PTR(ret),
3928+ vf->vf_id, ERR_PTR(aq_ret),
39273929 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
39283930 goto err_free;
39293931 }
drivers/net/ethernet/intel/iavf/iavf_ethtool.c+2−10
@@ -827,18 +827,10 @@ static int __iavf_set_coalesce(struct net_device *netdev, · 826 unmodified lines
827827 struct iavf_adapter *adapter = netdev_priv(netdev);
828828 int i;
829829
830− if (ec->rx_coalesce_usecs == 0) {
831− if (ec->use_adaptive_rx_coalesce)
832− netif_info(adapter, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n");
833− } else if ((ec->rx_coalesce_usecs < IAVF_MIN_ITR) ||
834− (ec->rx_coalesce_usecs > IAVF_MAX_ITR)) {
830+ if (ec->rx_coalesce_usecs > IAVF_MAX_ITR) {
835831 netif_info(adapter, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
836832 return -EINVAL;
837− } else if (ec->tx_coalesce_usecs == 0) {
838− if (ec->use_adaptive_tx_coalesce)
839− netif_info(adapter, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n");
840− } else if ((ec->tx_coalesce_usecs < IAVF_MIN_ITR) ||
841− (ec->tx_coalesce_usecs > IAVF_MAX_ITR)) {
833+ } else if (ec->tx_coalesce_usecs > IAVF_MAX_ITR) {
842834 netif_info(adapter, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
843835 return -EINVAL;
844836 }
drivers/net/ethernet/intel/iavf/iavf_txrx.h+0−1
@@ -15,7 +15,6 @@ · 14 unmodified lines
1515 */
1616 #define IAVF_ITR_DYNAMIC 0x8000 /* use top bit as a flag */
1717 #define IAVF_ITR_MASK 0x1FFE /* mask for ITR register value */
18−#define IAVF_MIN_ITR 2 /* reg uses 2 usec resolution */
1918 #define IAVF_ITR_100K 10 /* all values below must be even */
2019 #define IAVF_ITR_50K 20
2120 #define IAVF_ITR_20K 50
drivers/net/ethernet/intel/ice/ice_ddp.c+100−3
@@ -1479,14 +1479,14 @@ ice_post_dwnld_pkg_actions(struct ice_hw *hw) · 1478 unmodified lines
14791479 }
14801480
14811481 /**
1482− * ice_download_pkg
1482+ * ice_download_pkg_with_sig_seg
14831483 * @hw: pointer to the hardware structure
14841484 * @pkg_hdr: pointer to package header
14851485 *
14861486 * Handles the download of a complete package.
14871487 */
14881488 static enum ice_ddp_state
1489−ice_download_pkg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
1489+ice_download_pkg_with_sig_seg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
14901490 {
14911491 enum ice_aq_err aq_err = hw->adminq.sq_last_status;
14921492 enum ice_ddp_state state = ICE_DDP_PKG_ERR;
@@ -1519,6 +1519,103 @@ ice_download_pkg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr) · 26 unmodified lines
15191519 state = ice_post_dwnld_pkg_actions(hw);
15201520
15211521 ice_release_global_cfg_lock(hw);
1522+
1523+ return state;
1524+}
1525+
1526+/**
1527+ * ice_dwnld_cfg_bufs
1528+ * @hw: pointer to the hardware structure
1529+ * @bufs: pointer to an array of buffers
1530+ * @count: the number of buffers in the array
1531+ *
1532+ * Obtains global config lock and downloads the package configuration buffers
1533+ * to the firmware.
1534+ */
1535+static enum ice_ddp_state
1536+ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
1537+{
1538+ enum ice_ddp_state state;
1539+ struct ice_buf_hdr *bh;
1540+ int status;
1541+
1542+ if (!bufs || !count)
1543+ return ICE_DDP_PKG_ERR;
1544+
1545+ /* If the first buffer's first section has its metadata bit set
1546+ * then there are no buffers to be downloaded, and the operation is
1547+ * considered a success.
1548+ */
1549+ bh = (struct ice_buf_hdr *)bufs;
1550+ if (le32_to_cpu(bh->section_entry[0].type) & ICE_METADATA_BUF)
1551+ return ICE_DDP_PKG_SUCCESS;
1552+
1553+ status = ice_acquire_global_cfg_lock(hw, ICE_RES_WRITE);
1554+ if (status) {
1555+ if (status == -EALREADY)
1556+ return ICE_DDP_PKG_ALREADY_LOADED;
1557+ return ice_map_aq_err_to_ddp_state(hw->adminq.sq_last_status);
1558+ }
1559+
1560+ state = ice_dwnld_cfg_bufs_no_lock(hw, bufs, 0, count, true);
1561+ if (!state)
1562+ state = ice_post_dwnld_pkg_actions(hw);
1563+
1564+ ice_release_global_cfg_lock(hw);
1565+
1566+ return state;
1567+}
1568+
1569+/**
1570+ * ice_download_pkg_without_sig_seg
1571+ * @hw: pointer to the hardware structure
1572+ * @ice_seg: pointer to the segment of the package to be downloaded
1573+ *
1574+ * Handles the download of a complete package without signature segment.
1575+ */
1576+static enum ice_ddp_state
1577+ice_download_pkg_without_sig_seg(struct ice_hw *hw, struct ice_seg *ice_seg)
1578+{
1579+ struct ice_buf_table *ice_buf_tbl;
1580+
1581+ ice_debug(hw, ICE_DBG_PKG, "Segment format version: %d.%d.%d.%d\n",
1582+ ice_seg->hdr.seg_format_ver.major,
1583+ ice_seg->hdr.seg_format_ver.minor,
1584+ ice_seg->hdr.seg_format_ver.update,
1585+ ice_seg->hdr.seg_format_ver.draft);
1586+
1587+ ice_debug(hw, ICE_DBG_PKG, "Seg: type 0x%X, size %d, name %s\n",
1588+ le32_to_cpu(ice_seg->hdr.seg_type),
1589+ le32_to_cpu(ice_seg->hdr.seg_size), ice_seg->hdr.seg_id);
1590+
1591+ ice_buf_tbl = ice_find_buf_table(ice_seg);
1592+
1593+ ice_debug(hw, ICE_DBG_PKG, "Seg buf count: %d\n",
1594+ le32_to_cpu(ice_buf_tbl->buf_count));
1595+
1596+ return ice_dwnld_cfg_bufs(hw, ice_buf_tbl->buf_array,
1597+ le32_to_cpu(ice_buf_tbl->buf_count));
1598+}
1599+
1600+/**
1601+ * ice_download_pkg
1602+ * @hw: pointer to the hardware structure
1603+ * @pkg_hdr: pointer to package header
1604+ * @ice_seg: pointer to the segment of the package to be downloaded
1605+ *
1606+ * Handles the download of a complete package.
1607+ */
1608+static enum ice_ddp_state
1609+ice_download_pkg(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr,
1610+ struct ice_seg *ice_seg)
1611+{
1612+ enum ice_ddp_state state;
1613+
1614+ if (hw->pkg_has_signing_seg)
1615+ state = ice_download_pkg_with_sig_seg(hw, pkg_hdr);
1616+ else
1617+ state = ice_download_pkg_without_sig_seg(hw, ice_seg);
1618+
15221619 ice_post_pkg_dwnld_vlan_mode_cfg(hw);
15231620
15241621 return state;
@@ -2083,7 +2180,7 @@ enum ice_ddp_state ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len) · 558 unmodified lines
20832180
20842181 /* initialize package hints and then download package */
20852182 ice_init_pkg_hints(hw, seg);
2086− state = ice_download_pkg(hw, pkg);
2183+ state = ice_download_pkg(hw, pkg, seg);
20872184 if (state == ICE_DDP_PKG_ALREADY_LOADED) {
20882185 ice_debug(hw, ICE_DBG_INIT,
20892186 "package previously loaded - no work.\n");
drivers/net/ethernet/intel/ice/ice_dpll.c+9−12
@@ -815,12 +815,6 @@ ice_dpll_input_prio_set(const struct dpll_pin *pin, void *pin_priv, · 814 unmodified lines
815815 struct ice_pf *pf = d->pf;
816816 int ret;
817817
818− if (prio > ICE_DPLL_PRIO_MAX) {
819− NL_SET_ERR_MSG_FMT(extack, "prio out of supported range 0-%d",
820− ICE_DPLL_PRIO_MAX);
821− return -EINVAL;
822− }
823−
824818 mutex_lock(&pf->dplls.lock);
825819 ret = ice_dpll_hw_input_prio_set(pf, d, p, prio, extack);
826820 mutex_unlock(&pf->dplls.lock);
@@ -1756,6 +1750,7 @@ ice_dpll_init_dpll(struct ice_pf *pf, struct ice_dpll *d, bool cgu, · 929 unmodified lines
17561750 }
17571751 d->pf = pf;
17581752 if (cgu) {
1753+ ice_dpll_update_state(pf, d, true);
17591754 ret = dpll_device_register(d->dpll, type, &ice_dpll_ops, d);
17601755 if (ret) {
17611756 dpll_device_put(d->dpll);
@@ -1796,8 +1791,6 @@ static int ice_dpll_init_worker(struct ice_pf *pf) · 34 unmodified lines
17961791 struct ice_dplls *d = &pf->dplls;
17971792 struct kthread_worker *kworker;
17981793
1799− ice_dpll_update_state(pf, &d->eec, true);
1800− ice_dpll_update_state(pf, &d->pps, true);
18011794 kthread_init_delayed_work(&d->work, ice_dpll_periodic_work);
18021795 kworker = kthread_create_worker(0, "ice-dplls-%s",
18031796 dev_name(ice_pf_to_dev(pf)));
@@ -1830,6 +1823,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, · 26 unmodified lines
18301823 int num_pins, i, ret = -EINVAL;
18311824 struct ice_hw *hw = &pf->hw;
18321825 struct ice_dpll_pin *pins;
1826+ unsigned long caps;
18331827 u8 freq_supp_num;
18341828 bool input;
18351829
@@ -1849,6 +1843,7 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, · 13 unmodified lines
18491843 }
18501844
18511845 for (i = 0; i < num_pins; i++) {
1846+ caps = 0;
18521847 pins[i].idx = i;
18531848 pins[i].prop.board_label = ice_cgu_get_pin_name(hw, i, input);
18541849 pins[i].prop.type = ice_cgu_get_pin_type(hw, i, input);
@@ -1861,8 +1856,8 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, · 6 unmodified lines
18611856 &dp->input_prio[i]);
18621857 if (ret)
18631858 return ret;
1864− pins[i].prop.capabilities |=
1865− DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE;
1859+ caps |= (DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE |
1860+ DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE);
18661861 pins[i].prop.phase_range.min =
18671862 pf->dplls.input_phase_adj_max;
18681863 pins[i].prop.phase_range.max =
@@ -1872,9 +1867,11 @@ ice_dpll_init_info_direct_pins(struct ice_pf *pf, · 3 unmodified lines
18721867 pf->dplls.output_phase_adj_max;
18731868 pins[i].prop.phase_range.max =
18741869 -pf->dplls.output_phase_adj_max;
1870+ ret = ice_cgu_get_output_pin_state_caps(hw, i, &caps);
1871+ if (ret)
1872+ return ret;
18751873 }
1876− pins[i].prop.capabilities |=
1877− DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE;
1874+ pins[i].prop.capabilities = caps;
18781875 ret = ice_dpll_pin_state_update(pf, &pins[i], pin_type, NULL);
18791876 if (ret)
18801877 return ret;
drivers/net/ethernet/intel/ice/ice_dpll.h+0−1
@@ -6,7 +6,6 @@ · 5 unmodified lines
66
77 #include "ice.h"
88
9−#define ICE_DPLL_PRIO_MAX 0xF
109 #define ICE_DPLL_RCLK_NUM_MAX 4
1110
1211 /** ice_dpll_pin - store info about pins
drivers/net/ethernet/intel/ice/ice_lag.c+72−50
@@ -569,6 +569,50 @@ resume_traffic: · 568 unmodified lines
569569 dev_dbg(dev, "Problem restarting traffic for LAG node move\n");
570570 }
571571
572+/**
573+ * ice_lag_build_netdev_list - populate the lag struct's netdev list
574+ * @lag: local lag struct
575+ * @ndlist: pointer to netdev list to populate
576+ */
577+static void ice_lag_build_netdev_list(struct ice_lag *lag,
578+ struct ice_lag_netdev_list *ndlist)
579+{
580+ struct ice_lag_netdev_list *nl;
581+ struct net_device *tmp_nd;
582+
583+ INIT_LIST_HEAD(&ndlist->node);
584+ rcu_read_lock();
585+ for_each_netdev_in_bond_rcu(lag->upper_netdev, tmp_nd) {
586+ nl = kzalloc(sizeof(*nl), GFP_ATOMIC);
587+ if (!nl)
588+ break;
589+
590+ nl->netdev = tmp_nd;
591+ list_add(&nl->node, &ndlist->node);
592+ }
593+ rcu_read_unlock();
594+ lag->netdev_head = &ndlist->node;
595+}
596+
597+/**
598+ * ice_lag_destroy_netdev_list - free lag struct's netdev list
599+ * @lag: pointer to local lag struct
600+ * @ndlist: pointer to lag struct netdev list
601+ */
602+static void ice_lag_destroy_netdev_list(struct ice_lag *lag,
603+ struct ice_lag_netdev_list *ndlist)
604+{
605+ struct ice_lag_netdev_list *entry, *n;
606+
607+ rcu_read_lock();
608+ list_for_each_entry_safe(entry, n, &ndlist->node, node) {
609+ list_del(&entry->node);
610+ kfree(entry);
611+ }
612+ rcu_read_unlock();
613+ lag->netdev_head = NULL;
614+}
615+
572616 /**
573617 * ice_lag_move_single_vf_nodes - Move Tx scheduling nodes for single VF
574618 * @lag: primary interface LAG struct
@@ -597,7 +641,6 @@ ice_lag_move_single_vf_nodes(struct ice_lag *lag, u8 oldport, u8 newport, · 22 unmodified lines
597641 void ice_lag_move_new_vf_nodes(struct ice_vf *vf)
598642 {
599643 struct ice_lag_netdev_list ndlist;
600− struct list_head *tmp, *n;
601644 u8 pri_port, act_port;
602645 struct ice_lag *lag;
603646 struct ice_vsi *vsi;
@@ -621,38 +664,15 @@ void ice_lag_move_new_vf_nodes(struct ice_vf *vf) · 17 unmodified lines
621664 pri_port = pf->hw.port_info->lport;
622665 act_port = lag->active_port;
623666
624− if (lag->upper_netdev) {
625− struct ice_lag_netdev_list *nl;
626− struct net_device *tmp_nd;
627−
628− INIT_LIST_HEAD(&ndlist.node);
629− rcu_read_lock();
630− for_each_netdev_in_bond_rcu(lag->upper_netdev, tmp_nd) {
631− nl = kzalloc(sizeof(*nl), GFP_ATOMIC);
632− if (!nl)
633− break;
634−
635− nl->netdev = tmp_nd;
636− list_add(&nl->node, &ndlist.node);
637− }
638− rcu_read_unlock();
639− }
640−
641− lag->netdev_head = &ndlist.node;
667+ if (lag->upper_netdev)
668+ ice_lag_build_netdev_list(lag, &ndlist);
642669
643670 if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG) &&
644671 lag->bonded && lag->primary && pri_port != act_port &&
645672 !list_empty(lag->netdev_head))
646673 ice_lag_move_single_vf_nodes(lag, pri_port, act_port, vsi->idx);
647674
648− list_for_each_safe(tmp, n, &ndlist.node) {
649− struct ice_lag_netdev_list *entry;
650−
651− entry = list_entry(tmp, struct ice_lag_netdev_list, node);
652− list_del(&entry->node);
653− kfree(entry);
654− }
655− lag->netdev_head = NULL;
675+ ice_lag_destroy_netdev_list(lag, &ndlist);
656676
657677 new_vf_unlock:
658678 mutex_unlock(&pf->lag_mutex);
@@ -679,6 +699,29 @@ static void ice_lag_move_vf_nodes(struct ice_lag *lag, u8 oldport, u8 newport) · 20 unmodified lines
679699 ice_lag_move_single_vf_nodes(lag, oldport, newport, i);
680700 }
681701
702+/**
703+ * ice_lag_move_vf_nodes_cfg - move vf nodes outside LAG netdev event context
704+ * @lag: local lag struct
705+ * @src_prt: lport value for source port
706+ * @dst_prt: lport value for destination port
707+ *
708+ * This function is used to move nodes during an out-of-netdev-event situation,
709+ * primarily when the driver needs to reconfigure or recreate resources.
710+ *
711+ * Must be called while holding the lag_mutex to avoid lag events from
712+ * processing while out-of-sync moves are happening. Also, paired moves,
713+ * such as used in a reset flow, should both be called under the same mutex
714+ * lock to avoid changes between start of reset and end of reset.
715+ */
716+void ice_lag_move_vf_nodes_cfg(struct ice_lag *lag, u8 src_prt, u8 dst_prt)
717+{
718+ struct ice_lag_netdev_list ndlist;
719+
720+ ice_lag_build_netdev_list(lag, &ndlist);
721+ ice_lag_move_vf_nodes(lag, src_prt, dst_prt);
722+ ice_lag_destroy_netdev_list(lag, &ndlist);
723+}
724+
682725 #define ICE_LAG_SRIOV_CP_RECIPE 10
683726 #define ICE_LAG_SRIOV_TRAIN_PKT_LEN 16
684727
@@ -2051,7 +2094,6 @@ void ice_lag_rebuild(struct ice_pf *pf) · 1366 unmodified lines
20512094 {
20522095 struct ice_lag_netdev_list ndlist;
20532096 struct ice_lag *lag, *prim_lag;
2054− struct list_head *tmp, *n;
20552097 u8 act_port, loc_port;
20562098
20572099 if (!pf->lag || !pf->lag->bonded)
@@ -2063,21 +2105,7 @@ void ice_lag_rebuild(struct ice_pf *pf) · 5 unmodified lines
20632105 if (lag->primary) {
20642106 prim_lag = lag;
20652107 } else {
2066− struct ice_lag_netdev_list *nl;
2067− struct net_device *tmp_nd;
2068−
2069− INIT_LIST_HEAD(&ndlist.node);
2070− rcu_read_lock();
2071− for_each_netdev_in_bond_rcu(lag->upper_netdev, tmp_nd) {
2072− nl = kzalloc(sizeof(*nl), GFP_ATOMIC);
2073− if (!nl)
2074− break;
2075−
2076− nl->netdev = tmp_nd;
2077− list_add(&nl->node, &ndlist.node);
2078− }
2079− rcu_read_unlock();
2080− lag->netdev_head = &ndlist.node;
2108+ ice_lag_build_netdev_list(lag, &ndlist);
20812109 prim_lag = ice_lag_find_primary(lag);
20822110 }
20832111
@@ -2107,13 +2135,7 @@ void ice_lag_rebuild(struct ice_pf *pf) · 23 unmodified lines
21072135
21082136 ice_clear_rdma_cap(pf);
21092137 lag_rebuild_out:
2110− list_for_each_safe(tmp, n, &ndlist.node) {
2111− struct ice_lag_netdev_list *entry;
2112−
2113− entry = list_entry(tmp, struct ice_lag_netdev_list, node);
2114− list_del(&entry->node);
2115− kfree(entry);
2116− }
2138+ ice_lag_destroy_netdev_list(lag, &ndlist);
21172139 mutex_unlock(&pf->lag_mutex);
21182140 }
21192141
drivers/net/ethernet/intel/ice/ice_lag.h+1−0
@@ -65,4 +65,5 @@ int ice_init_lag(struct ice_pf *pf); · 64 unmodified lines
6565 void ice_deinit_lag(struct ice_pf *pf);
6666 void ice_lag_rebuild(struct ice_pf *pf);
6767 bool ice_lag_is_switchdev_running(struct ice_pf *pf);
68+void ice_lag_move_vf_nodes_cfg(struct ice_lag *lag, u8 src_prt, u8 dst_prt);
6869 #endif /* _ICE_LAG_H_ */
drivers/net/ethernet/intel/ice/ice_main.c+3−9
@@ -7401,15 +7401,6 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) · 7400 unmodified lines
74017401 goto err_vsi_rebuild;
74027402 }
74037403
7404− /* configure PTP timestamping after VSI rebuild */
7405− if (test_bit(ICE_FLAG_PTP_SUPPORTED, pf->flags)) {
7406− if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF)
7407− ice_ptp_cfg_timestamp(pf, false);
7408− else if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL)
7409− /* for E82x PHC owner always need to have interrupts */
7410− ice_ptp_cfg_timestamp(pf, true);
7411− }
7412−
74137404 err = ice_vsi_rebuild_by_type(pf, ICE_VSI_SWITCHDEV_CTRL);
74147405 if (err) {
74157406 dev_err(dev, "Switchdev CTRL VSI rebuild failed: %d\n", err);
@@ -7461,6 +7452,9 @@ static void ice_rebuild(struct ice_pf *pf, enum ice_reset_req reset_type) · 45 unmodified lines
74617452 ice_plug_aux_dev(pf);
74627453 if (ice_is_feature_supported(pf, ICE_F_SRIOV_LAG))
74637454 ice_lag_rebuild(pf);
7455+
7456+ /* Restore timestamp mode settings after VSI rebuild */
7457+ ice_ptp_restore_timestamp_mode(pf);
74647458 return;
74657459
74667460 err_vsi_rebuild:
drivers/net/ethernet/intel/ice/ice_ptp.c+78−66
@@ -256,48 +256,42 @@ ice_verify_pin_e810t(struct ptp_clock_info *info, unsigned int pin, · 255 unmodified lines
256256 }
257257
258258 /**
259− * ice_ptp_configure_tx_tstamp - Enable or disable Tx timestamp interrupt
260− * @pf: The PF pointer to search in
261− * @on: bool value for whether timestamp interrupt is enabled or disabled
259+ * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device
260+ * @pf: Board private structure
261+ *
262+ * Program the device to respond appropriately to the Tx timestamp interrupt
263+ * cause.
262264 */
263−static void ice_ptp_configure_tx_tstamp(struct ice_pf *pf, bool on)
265+static void ice_ptp_cfg_tx_interrupt(struct ice_pf *pf)
264266 {
267+ struct ice_hw *hw = &pf->hw;
268+ bool enable;
265269 u32 val;
266270
271+ switch (pf->ptp.tx_interrupt_mode) {
272+ case ICE_PTP_TX_INTERRUPT_ALL:
273+ /* React to interrupts across all quads. */
274+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f);
275+ enable = true;
276+ break;
277+ case ICE_PTP_TX_INTERRUPT_NONE:
278+ /* Do not react to interrupts on any quad. */
279+ wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0);
280+ enable = false;
281+ break;
282+ case ICE_PTP_TX_INTERRUPT_SELF:
283+ default:
284+ enable = pf->ptp.tstamp_config.tx_type == HWTSTAMP_TX_ON;
285+ break;
286+ }
287+
267288 /* Configure the Tx timestamp interrupt */
268− val = rd32(&pf->hw, PFINT_OICR_ENA);
269− if (on)
289+ val = rd32(hw, PFINT_OICR_ENA);
290+ if (enable)
270291 val |= PFINT_OICR_TSYN_TX_M;
271292 else
272293 val &= ~PFINT_OICR_TSYN_TX_M;
273− wr32(&pf->hw, PFINT_OICR_ENA, val);
274−}
275−
276−/**
277− * ice_set_tx_tstamp - Enable or disable Tx timestamping
278− * @pf: The PF pointer to search in
279− * @on: bool value for whether timestamps are enabled or disabled
280− */
281−static void ice_set_tx_tstamp(struct ice_pf *pf, bool on)
282−{
283− struct ice_vsi *vsi;
284− u16 i;
285−
286− vsi = ice_get_main_vsi(pf);
287− if (!vsi)
288− return;
289−
290− /* Set the timestamp enable flag for all the Tx rings */
291− ice_for_each_txq(vsi, i) {
292− if (!vsi->tx_rings[i])
293− continue;
294− vsi->tx_rings[i]->ptp_tx = on;
295− }
296−
297− if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_SELF)
298− ice_ptp_configure_tx_tstamp(pf, on);
299−
300− pf->ptp.tstamp_config.tx_type = on ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
294+ wr32(hw, PFINT_OICR_ENA, val);
301295 }
302296
303297 /**
@@ -311,7 +305,7 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) · 7 unmodified lines
311305 u16 i;
312306
313307 vsi = ice_get_main_vsi(pf);
314− if (!vsi)
308+ if (!vsi || !vsi->rx_rings)
315309 return;
316310
317311 /* Set the timestamp flag for all the Rx rings */
@@ -320,23 +314,50 @@ static void ice_set_rx_tstamp(struct ice_pf *pf, bool on) · 2 unmodified lines
320314 continue;
321315 vsi->rx_rings[i]->ptp_rx = on;
322316 }
317+}
318+
319+/**
320+ * ice_ptp_disable_timestamp_mode - Disable current timestamp mode
321+ * @pf: Board private structure
322+ *
323+ * Called during preparation for reset to temporarily disable timestamping on
324+ * the device. Called during remove to disable timestamping while cleaning up
325+ * driver resources.
326+ */
327+static void ice_ptp_disable_timestamp_mode(struct ice_pf *pf)
328+{
329+ struct ice_hw *hw = &pf->hw;
330+ u32 val;
331+
332+ val = rd32(hw, PFINT_OICR_ENA);
333+ val &= ~PFINT_OICR_TSYN_TX_M;
334+ wr32(hw, PFINT_OICR_ENA, val);
323335
324− pf->ptp.tstamp_config.rx_filter = on ? HWTSTAMP_FILTER_ALL :
325− HWTSTAMP_FILTER_NONE;
336+ ice_set_rx_tstamp(pf, false);
326337 }
327338
328339 /**
329− * ice_ptp_cfg_timestamp - Configure timestamp for init/deinit
340+ * ice_ptp_restore_timestamp_mode - Restore timestamp configuration
330341 * @pf: Board private structure
331− * @ena: bool value to enable or disable time stamp
332342 *
333− * This function will configure timestamping during PTP initialization
334− * and deinitialization
343+ * Called at the end of rebuild to restore timestamp configuration after
344+ * a device reset.
335345 */
336−void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena)
346+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf)
337347 {
338− ice_set_tx_tstamp(pf, ena);
339− ice_set_rx_tstamp(pf, ena);
348+ struct ice_hw *hw = &pf->hw;
349+ bool enable_rx;
350+
351+ ice_ptp_cfg_tx_interrupt(pf);
352+
353+ enable_rx = pf->ptp.tstamp_config.rx_filter == HWTSTAMP_FILTER_ALL;
354+ ice_set_rx_tstamp(pf, enable_rx);
355+
356+ /* Trigger an immediate software interrupt to ensure that timestamps
357+ * which occurred during reset are handled now.
358+ */
359+ wr32(hw, PFINT_OICR, PFINT_OICR_TSYN_TX_M);
360+ ice_flush(hw);
340361 }
341362
342363 /**
@@ -2037,10 +2058,10 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) · 1694 unmodified lines
20372058 {
20382059 switch (config->tx_type) {
20392060 case HWTSTAMP_TX_OFF:
2040− ice_set_tx_tstamp(pf, false);
2061+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_OFF;
20412062 break;
20422063 case HWTSTAMP_TX_ON:
2043− ice_set_tx_tstamp(pf, true);
2064+ pf->ptp.tstamp_config.tx_type = HWTSTAMP_TX_ON;
20442065 break;
20452066 default:
20462067 return -ERANGE;
@@ -2048,7 +2069,7 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) · 1 unmodified line
20482069
20492070 switch (config->rx_filter) {
20502071 case HWTSTAMP_FILTER_NONE:
2051− ice_set_rx_tstamp(pf, false);
2072+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
20522073 break;
20532074 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
20542075 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
@@ -2064,12 +2085,15 @@ ice_ptp_set_timestamp_mode(struct ice_pf *pf, struct hwtstamp_config *config) · 9 unmodified lines
20642085 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
20652086 case HWTSTAMP_FILTER_NTP_ALL:
20662087 case HWTSTAMP_FILTER_ALL:
2067− ice_set_rx_tstamp(pf, true);
2088+ pf->ptp.tstamp_config.rx_filter = HWTSTAMP_FILTER_ALL;
20682089 break;
20692090 default:
20702091 return -ERANGE;
20712092 }
20722093
2094+ /* Immediately update the device timestamping mode */
2095+ ice_ptp_restore_timestamp_mode(pf);
2096+
20732097 return 0;
20742098 }
20752099
@@ -2737,7 +2761,7 @@ void ice_ptp_prepare_for_reset(struct ice_pf *pf) · 661 unmodified lines
27372761 clear_bit(ICE_FLAG_PTP, pf->flags);
27382762
27392763 /* Disable timestamping for both Tx and Rx */
2740− ice_ptp_cfg_timestamp(pf, false);
2764+ ice_ptp_disable_timestamp_mode(pf);
27412765
27422766 kthread_cancel_delayed_work_sync(&ptp->work);
27432767
@@ -2803,15 +2827,7 @@ static int ice_ptp_init_owner(struct ice_pf *pf) · 59 unmodified lines
28032827 /* Release the global hardware lock */
28042828 ice_ptp_unlock(hw);
28052829
2806− if (pf->ptp.tx_interrupt_mode == ICE_PTP_TX_INTERRUPT_ALL) {
2807− /* The clock owner for this device type handles the timestamp
2808− * interrupt for all ports.
2809− */
2810− ice_ptp_configure_tx_tstamp(pf, true);
2811−
2812− /* React on all quads interrupts for E82x */
2813− wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x1f);
2814−
2830+ if (!ice_is_e810(hw)) {
28152831 /* Enable quad interrupts */
28162832 err = ice_ptp_tx_ena_intr(pf, true, itr);
28172833 if (err)
@@ -2881,13 +2897,6 @@ static int ice_ptp_init_port(struct ice_pf *pf, struct ice_ptp_port *ptp_port) · 63 unmodified lines
28812897 case ICE_PHY_E810:
28822898 return ice_ptp_init_tx_e810(pf, &ptp_port->tx);
28832899 case ICE_PHY_E822:
2884− /* Non-owner PFs don't react to any interrupts on E82x,
2885− * neither on own quad nor on others
2886− */
2887− if (!ice_ptp_pf_handles_tx_interrupt(pf)) {
2888− ice_ptp_configure_tx_tstamp(pf, false);
2889− wr32(hw, PFINT_TSYN_MSK + (0x4 * hw->pf_id), (u32)0x0);
2890− }
28912900 kthread_init_delayed_work(&ptp_port->ov_work,
28922901 ice_ptp_wait_for_offsets);
28932902
@@ -3032,6 +3041,9 @@ void ice_ptp_init(struct ice_pf *pf) · 138 unmodified lines
30323041 /* Start the PHY timestamping block */
30333042 ice_ptp_reset_phy_timestamping(pf);
30343043
3044+ /* Configure initial Tx interrupt settings */
3045+ ice_ptp_cfg_tx_interrupt(pf);
3046+
30353047 set_bit(ICE_FLAG_PTP, pf->flags);
30363048 err = ice_ptp_init_work(pf, ptp);
30373049 if (err)
@@ -3067,7 +3079,7 @@ void ice_ptp_release(struct ice_pf *pf) · 29 unmodified lines
30673079 return;
30683080
30693081 /* Disable timestamping for both Tx and Rx */
3070− ice_ptp_cfg_timestamp(pf, false);
3082+ ice_ptp_disable_timestamp_mode(pf);
30713083
30723084 ice_ptp_remove_auxbus_device(pf);
30733085
drivers/net/ethernet/intel/ice/ice_ptp.h+2−3
@@ -292,7 +292,7 @@ int ice_ptp_clock_index(struct ice_pf *pf); · 291 unmodified lines
292292 struct ice_pf;
293293 int ice_ptp_set_ts_config(struct ice_pf *pf, struct ifreq *ifr);
294294 int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr);
295−void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena);
295+void ice_ptp_restore_timestamp_mode(struct ice_pf *pf);
296296
297297 void ice_ptp_extts_event(struct ice_pf *pf);
298298 s8 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb);
@@ -317,8 +317,7 @@ static inline int ice_ptp_get_ts_config(struct ice_pf *pf, struct ifreq *ifr) · 18 unmodified lines
317317 return -EOPNOTSUPP;
318318 }
319319
320−static inline void ice_ptp_cfg_timestamp(struct ice_pf *pf, bool ena) { }
321−
320+static inline void ice_ptp_restore_timestamp_mode(struct ice_pf *pf) { }
322321 static inline void ice_ptp_extts_event(struct ice_pf *pf) { }
323322 static inline s8
324323 ice_ptp_request_ts(struct ice_ptp_tx *tx, struct sk_buff *skb)
drivers/net/ethernet/intel/ice/ice_ptp_hw.c+54−0
@@ -3961,3 +3961,57 @@ int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num) · 3960 unmodified lines
39613961
39623962 return ret;
39633963 }
3964+
3965+/**
3966+ * ice_cgu_get_output_pin_state_caps - get output pin state capabilities
3967+ * @hw: pointer to the hw struct
3968+ * @pin_id: id of a pin
3969+ * @caps: capabilities to modify
3970+ *
3971+ * Return:
3972+ * * 0 - success, state capabilities were modified
3973+ * * negative - failure, capabilities were not modified
3974+ */
3975+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id,
3976+ unsigned long *caps)
3977+{
3978+ bool can_change = true;
3979+
3980+ switch (hw->device_id) {
3981+ case ICE_DEV_ID_E810C_SFP:
3982+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3)
3983+ can_change = false;
3984+ break;
3985+ case ICE_DEV_ID_E810C_QSFP:
3986+ if (pin_id == ZL_OUT2 || pin_id == ZL_OUT3 || pin_id == ZL_OUT4)
3987+ can_change = false;
3988+ break;
3989+ case ICE_DEV_ID_E823L_10G_BASE_T:
3990+ case ICE_DEV_ID_E823L_1GBE:
3991+ case ICE_DEV_ID_E823L_BACKPLANE:
3992+ case ICE_DEV_ID_E823L_QSFP:
3993+ case ICE_DEV_ID_E823L_SFP:
3994+ case ICE_DEV_ID_E823C_10G_BASE_T:
3995+ case ICE_DEV_ID_E823C_BACKPLANE:
3996+ case ICE_DEV_ID_E823C_QSFP:
3997+ case ICE_DEV_ID_E823C_SFP:
3998+ case ICE_DEV_ID_E823C_SGMII:
3999+ if (hw->cgu_part_number ==
4000+ ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 &&
4001+ pin_id == ZL_OUT2)
4002+ can_change = false;
4003+ else if (hw->cgu_part_number ==
4004+ ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 &&
4005+ pin_id == SI_OUT1)
4006+ can_change = false;
4007+ break;
4008+ default:
4009+ return -EINVAL;
4010+ }
4011+ if (can_change)
4012+ *caps |= DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE;
4013+ else
4014+ *caps &= ~DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE;
4015+
4016+ return 0;
4017+}
drivers/net/ethernet/intel/ice/ice_ptp_hw.h+2−0
@@ -282,6 +282,8 @@ int ice_get_cgu_state(struct ice_hw *hw, u8 dpll_idx, · 281 unmodified lines
282282 int ice_get_cgu_rclk_pin_info(struct ice_hw *hw, u8 *base_idx, u8 *pin_num);
283283
284284 void ice_ptp_init_phy_model(struct ice_hw *hw);
285+int ice_cgu_get_output_pin_state_caps(struct ice_hw *hw, u8 pin_id,
286+ unsigned long *caps);
285287
286288 #define PFTSYN_SEM_BYTES 4
287289
drivers/net/ethernet/intel/ice/ice_sriov.c+1−6
@@ -374,16 +374,11 @@ static void ice_ena_vf_mappings(struct ice_vf *vf) · 373 unmodified lines
374374 */
375375 int ice_calc_vf_reg_idx(struct ice_vf *vf, struct ice_q_vector *q_vector)
376376 {
377− struct ice_pf *pf;
378−
379377 if (!vf || !q_vector)
380378 return -EINVAL;
381379
382− pf = vf->pf;
383−
384380 /* always add one to account for the OICR being the first MSIX */
385− return pf->sriov_base_vector + pf->vfs.num_msix_per * vf->vf_id +
386− q_vector->v_idx + 1;
381+ return vf->first_vector_idx + q_vector->v_idx + 1;
387382 }
388383
389384 /**
drivers/net/ethernet/intel/ice/ice_txrx.c+0−3
@@ -2306,9 +2306,6 @@ ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb, · 2305 unmodified lines
23062306 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
23072307 return;
23082308
2309− if (!tx_ring->ptp_tx)
2310− return;
2311−
23122309 /* Tx timestamps cannot be sampled when doing TSO */
23132310 if (first->tx_flags & ICE_TX_FLAGS_TSO)
23142311 return;
drivers/net/ethernet/intel/ice/ice_txrx.h+0−1
@@ -380,7 +380,6 @@ struct ice_tx_ring { · 379 unmodified lines
380380 #define ICE_TX_FLAGS_RING_VLAN_L2TAG2 BIT(2)
381381 u8 flags;
382382 u8 dcb_tc; /* Traffic class of ring */
383− u8 ptp_tx;
384383 } ____cacheline_internodealigned_in_smp;
385384
386385 static inline bool ice_ring_uses_build_skb(struct ice_rx_ring *ring)
drivers/net/ethernet/intel/ice/ice_vf_lib.c+20−0
@@ -829,12 +829,16 @@ static void ice_notify_vf_reset(struct ice_vf *vf) · 828 unmodified lines
829829 int ice_reset_vf(struct ice_vf *vf, u32 flags)
830830 {
831831 struct ice_pf *pf = vf->pf;
832+ struct ice_lag *lag;
832833 struct ice_vsi *vsi;
834+ u8 act_prt, pri_prt;
833835 struct device *dev;
834836 int err = 0;
835837 bool rsd;
836838
837839 dev = ice_pf_to_dev(pf);
840+ act_prt = ICE_LAG_INVALID_PORT;
841+ pri_prt = pf->hw.port_info->lport;
838842
839843 if (flags & ICE_VF_RESET_NOTIFY)
840844 ice_notify_vf_reset(vf);
@@ -845,6 +849,17 @@ int ice_reset_vf(struct ice_vf *vf, u32 flags) · 4 unmodified lines
845849 return 0;
846850 }
847851
852+ lag = pf->lag;
853+ mutex_lock(&pf->lag_mutex);
854+ if (lag && lag->bonded && lag->primary) {
855+ act_prt = lag->active_port;
856+ if (act_prt != pri_prt && act_prt != ICE_LAG_INVALID_PORT &&
857+ lag->upper_netdev)
858+ ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);
859+ else
860+ act_prt = ICE_LAG_INVALID_PORT;
861+ }
862+
848863 if (flags & ICE_VF_RESET_LOCK)
849864 mutex_lock(&vf->cfg_lock);
850865 else
@@ -937,6 +952,11 @@ out_unlock: · 86 unmodified lines
937952 if (flags & ICE_VF_RESET_LOCK)
938953 mutex_unlock(&vf->cfg_lock);
939954
955+ if (lag && lag->bonded && lag->primary &&
956+ act_prt != ICE_LAG_INVALID_PORT)
957+ ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
958+ mutex_unlock(&pf->lag_mutex);
959+
940960 return err;
941961 }
942962
drivers/net/ethernet/intel/ice/ice_vf_vsi_vlan_ops.c+8−3
@@ -32,7 +32,6 @@ static void ice_port_vlan_on(struct ice_vsi *vsi) · 31 unmodified lines
3232 /* setup outer VLAN ops */
3333 vlan_ops->set_port_vlan = ice_vsi_set_outer_port_vlan;
3434 vlan_ops->clear_port_vlan = ice_vsi_clear_outer_port_vlan;
35− vlan_ops->clear_port_vlan = ice_vsi_clear_outer_port_vlan;
3635
3736 /* setup inner VLAN ops */
3837 vlan_ops = &vsi->inner_vlan_ops;
@@ -47,8 +46,13 @@ static void ice_port_vlan_on(struct ice_vsi *vsi) · 8 unmodified lines
4746
4847 vlan_ops->set_port_vlan = ice_vsi_set_inner_port_vlan;
4948 vlan_ops->clear_port_vlan = ice_vsi_clear_inner_port_vlan;
50− vlan_ops->clear_port_vlan = ice_vsi_clear_inner_port_vlan;
5149 }
50+
51+ /* all Rx traffic should be in the domain of the assigned port VLAN,
52+ * so prevent disabling Rx VLAN filtering
53+ */
54+ vlan_ops->dis_rx_filtering = noop_vlan;
55+
5256 vlan_ops->ena_rx_filtering = ice_vsi_ena_rx_vlan_filtering;
5357 }
5458
@@ -77,6 +81,8 @@ static void ice_port_vlan_off(struct ice_vsi *vsi) · 22 unmodified lines
7781 vlan_ops->del_vlan = ice_vsi_del_vlan;
7882 }
7983
84+ vlan_ops->dis_rx_filtering = ice_vsi_dis_rx_vlan_filtering;
85+
8086 if (!test_bit(ICE_FLAG_VF_VLAN_PRUNING, pf->flags))
8187 vlan_ops->ena_rx_filtering = noop_vlan;
8288 else
@@ -141,7 +147,6 @@ void ice_vf_vsi_init_vlan_ops(struct ice_vsi *vsi) · 58 unmodified lines
141147 &vsi->outer_vlan_ops : &vsi->inner_vlan_ops;
142148
143149 vlan_ops->add_vlan = ice_vsi_add_vlan;
144− vlan_ops->dis_rx_filtering = ice_vsi_dis_rx_vlan_filtering;
145150 vlan_ops->ena_tx_filtering = ice_vsi_ena_tx_vlan_filtering;
146151 vlan_ops->dis_tx_filtering = ice_vsi_dis_tx_vlan_filtering;
147152 }
drivers/net/ethernet/intel/ice/ice_virtchnl.c+27−3
@@ -1523,7 +1523,6 @@ static int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg) · 1522 unmodified lines
15231523 u16 num_q_vectors_mapped, vsi_id, vector_id;
15241524 struct virtchnl_irq_map_info *irqmap_info;
15251525 struct virtchnl_vector_map *map;
1526− struct ice_pf *pf = vf->pf;
15271526 struct ice_vsi *vsi;
15281527 int i;
15291528
@@ -1535,7 +1534,7 @@ static int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg) · 5 unmodified lines
15351534 * there is actually at least a single VF queue vector mapped
15361535 */
15371536 if (!test_bit(ICE_VF_STATE_ACTIVE, vf->vf_states) ||
1538− pf->vfs.num_msix_per < num_q_vectors_mapped ||
1537+ vf->num_msix < num_q_vectors_mapped ||
15391538 !num_q_vectors_mapped) {
15401539 v_ret = VIRTCHNL_STATUS_ERR_PARAM;
15411540 goto error_param;
@@ -1557,7 +1556,7 @@ static int ice_vc_cfg_irq_map_msg(struct ice_vf *vf, u8 *msg) · 15 unmodified lines
15571556 /* vector_id is always 0-based for each VF, and can never be
15581557 * larger than or equal to the max allowed interrupts per VF
15591558 */
1560− if (!(vector_id < pf->vfs.num_msix_per) ||
1559+ if (!(vector_id < vf->num_msix) ||
15611560 !ice_vc_isvalid_vsi_id(vf, vsi_id) ||
15621561 (!vector_id && (map->rxq_map || map->txq_map))) {
15631562 v_ret = VIRTCHNL_STATUS_ERR_PARAM;
@@ -1603,9 +1602,24 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) · 39 unmodified lines
16031602 (struct virtchnl_vsi_queue_config_info *)msg;
16041603 struct virtchnl_queue_pair_info *qpi;
16051604 struct ice_pf *pf = vf->pf;
1605+ struct ice_lag *lag;
16061606 struct ice_vsi *vsi;
1607+ u8 act_prt, pri_prt;
16071608 int i = -1, q_idx;
16081609
1610+ lag = pf->lag;
1611+ mutex_lock(&pf->lag_mutex);
1612+ act_prt = ICE_LAG_INVALID_PORT;
1613+ pri_prt = pf->hw.port_info->lport;
1614+ if (lag && lag->bonded && lag->primary) {
1615+ act_prt = lag->active_port;
1616+ if (act_prt != pri_prt && act_prt != ICE_LAG_INVALID_PORT &&
1617+ lag->upper_netdev)
1618+ ice_lag_move_vf_nodes_cfg(lag, act_prt, pri_prt);
1619+ else
1620+ act_prt = ICE_LAG_INVALID_PORT;
1621+ }
1622+
16091623 if (!test_bit(ICE_VF_STATE_ACTIVE, vf->vf_states))
16101624 goto error_param;
16111625
@@ -1729,6 +1743,11 @@ static int ice_vc_cfg_qs_msg(struct ice_vf *vf, u8 *msg) · 117 unmodified lines
17291743 }
17301744 }
17311745
1746+ if (lag && lag->bonded && lag->primary &&
1747+ act_prt != ICE_LAG_INVALID_PORT)
1748+ ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
1749+ mutex_unlock(&pf->lag_mutex);
1750+
17321751 /* send the response to the VF */
17331752 return ice_vc_send_msg_to_vf(vf, VIRTCHNL_OP_CONFIG_VSI_QUEUES,
17341753 VIRTCHNL_STATUS_SUCCESS, NULL, 0);
@@ -1743,6 +1762,11 @@ error_param: · 8 unmodified lines
17431762 vf->vf_id, i);
17441763 }
17451764
1765+ if (lag && lag->bonded && lag->primary &&
1766+ act_prt != ICE_LAG_INVALID_PORT)
1767+ ice_lag_move_vf_nodes_cfg(lag, pri_prt, act_prt);
1768+ mutex_unlock(&pf->lag_mutex);
1769+
17461770 ice_lag_move_new_vf_nodes(vf);
17471771
17481772 /* send the response to the VF */
drivers/net/ethernet/marvell/mvneta.c+20−8
@@ -4790,14 +4790,17 @@ static void mvneta_ethtool_get_strings(struct net_device *netdev, u32 sset, · 4789 unmodified lines
47904790 u8 *data)
47914791 {
47924792 if (sset == ETH_SS_STATS) {
4793+ struct mvneta_port *pp = netdev_priv(netdev);
47934794 int i;
47944795
47954796 for (i = 0; i < ARRAY_SIZE(mvneta_statistics); i++)
47964797 memcpy(data + i * ETH_GSTRING_LEN,
47974798 mvneta_statistics[i].name, ETH_GSTRING_LEN);
47984799
4799− data += ETH_GSTRING_LEN * ARRAY_SIZE(mvneta_statistics);
4800− page_pool_ethtool_stats_get_strings(data);
4800+ if (!pp->bm_priv) {
4801+ data += ETH_GSTRING_LEN * ARRAY_SIZE(mvneta_statistics);
4802+ page_pool_ethtool_stats_get_strings(data);
4803+ }
48014804 }
48024805 }
48034806
@@ -4915,8 +4918,10 @@ static void mvneta_ethtool_pp_stats(struct mvneta_port *pp, u64 *data) · 111 unmodified lines
49154918 struct page_pool_stats stats = {};
49164919 int i;
49174920
4918− for (i = 0; i < rxq_number; i++)
4919− page_pool_get_stats(pp->rxqs[i].page_pool, &stats);
4921+ for (i = 0; i < rxq_number; i++) {
4922+ if (pp->rxqs[i].page_pool)
4923+ page_pool_get_stats(pp->rxqs[i].page_pool, &stats);
4924+ }
49204925
49214926 page_pool_ethtool_stats_get(data, &stats);
49224927 }
@@ -4932,14 +4937,21 @@ static void mvneta_ethtool_get_stats(struct net_device *dev, · 9 unmodified lines
49324937 for (i = 0; i < ARRAY_SIZE(mvneta_statistics); i++)
49334938 *data++ = pp->ethtool_stats[i];
49344939
4935− mvneta_ethtool_pp_stats(pp, data);
4940+ if (!pp->bm_priv)
4941+ mvneta_ethtool_pp_stats(pp, data);
49364942 }
49374943
49384944 static int mvneta_ethtool_get_sset_count(struct net_device *dev, int sset)
49394945 {
4940− if (sset == ETH_SS_STATS)
4941− return ARRAY_SIZE(mvneta_statistics) +
4942− page_pool_ethtool_stats_get_count();
4946+ if (sset == ETH_SS_STATS) {
4947+ int count = ARRAY_SIZE(mvneta_statistics);
4948+ struct mvneta_port *pp = netdev_priv(dev);
4949+
4950+ if (!pp->bm_priv)
4951+ count += page_pool_ethtool_stats_get_count();
4952+
4953+ return count;
4954+ }
49434955
49444956 return -EOPNOTSUPP;
49454957 }
drivers/net/ethernet/marvell/octeontx2/af/mbox.h+1−1
@@ -1945,7 +1945,7 @@ struct mcs_hw_info { · 1944 unmodified lines
19451945 u8 tcam_entries; /* RX/TX Tcam entries per mcs block */
19461946 u8 secy_entries; /* RX/TX SECY entries per mcs block */
19471947 u8 sc_entries; /* RX/TX SC CAM entries per mcs block */
1948− u8 sa_entries; /* PN table entries = SA entries */
1948+ u16 sa_entries; /* PN table entries = SA entries */
19491949 u64 rsvd[16];
19501950 };
19511951
drivers/net/ethernet/marvell/octeontx2/af/mcs.c+15−3
@@ -117,7 +117,7 @@ void mcs_get_rx_secy_stats(struct mcs *mcs, struct mcs_secy_stats *stats, int id · 116 unmodified lines
117117 reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYTAGGEDCTLX(id);
118118 stats->pkt_tagged_ctl_cnt = mcs_reg_read(mcs, reg);
119119
120− reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(id);
120+ reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(id);
121121 stats->pkt_untaged_cnt = mcs_reg_read(mcs, reg);
122122
123123 reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(id);
@@ -215,7 +215,7 @@ void mcs_get_sc_stats(struct mcs *mcs, struct mcs_sc_stats *stats, · 91 unmodified lines
215215 reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCNOTVALIDX(id);
216216 stats->pkt_notvalid_cnt = mcs_reg_read(mcs, reg);
217217
218− reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(id);
218+ reg = MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(id);
219219 stats->pkt_unchecked_cnt = mcs_reg_read(mcs, reg);
220220
221221 if (mcs->hw->mcs_blks > 1) {
@@ -1219,6 +1219,17 @@ struct mcs *mcs_get_pdata(int mcs_id) · 997 unmodified lines
12191219 return NULL;
12201220 }
12211221
1222+bool is_mcs_bypass(int mcs_id)
1223+{
1224+ struct mcs *mcs_dev;
1225+
1226+ list_for_each_entry(mcs_dev, &mcs_list, mcs_list) {
1227+ if (mcs_dev->mcs_id == mcs_id)
1228+ return mcs_dev->bypass;
1229+ }
1230+ return true;
1231+}
1232+
12221233 void mcs_set_port_cfg(struct mcs *mcs, struct mcs_port_cfg_set_req *req)
12231234 {
12241235 u64 val = 0;
@@ -1436,7 +1447,7 @@ static int mcs_x2p_calibration(struct mcs *mcs) · 211 unmodified lines
14361447 return err;
14371448 }
14381449
1439−static void mcs_set_external_bypass(struct mcs *mcs, u8 bypass)
1450+static void mcs_set_external_bypass(struct mcs *mcs, bool bypass)
14401451 {
14411452 u64 val;
14421453
@@ -1447,6 +1458,7 @@ static void mcs_set_external_bypass(struct mcs *mcs, u8 bypass) · 4 unmodified lines
14471458 else
14481459 val &= ~BIT_ULL(6);
14491460 mcs_reg_write(mcs, MCSX_MIL_GLOBAL, val);
1461+ mcs->bypass = bypass;
14501462 }
14511463
14521464 static void mcs_global_cfg(struct mcs *mcs)
drivers/net/ethernet/marvell/octeontx2/af/mcs.h+2−0
@@ -149,6 +149,7 @@ struct mcs { · 148 unmodified lines
149149 u16 num_vec;
150150 void *rvu;
151151 u16 *tx_sa_active;
152+ bool bypass;
152153 };
153154
154155 struct mcs_ops {
@@ -206,6 +207,7 @@ void mcs_get_custom_tag_cfg(struct mcs *mcs, struct mcs_custom_tag_cfg_get_req * · 51 unmodified lines
206207 int mcs_alloc_ctrlpktrule(struct rsrc_bmap *rsrc, u16 *pf_map, u16 offset, u16 pcifunc);
207208 int mcs_free_ctrlpktrule(struct mcs *mcs, struct mcs_free_ctrl_pkt_rule_req *req);
208209 int mcs_ctrlpktrule_write(struct mcs *mcs, struct mcs_ctrl_pkt_rule_write_req *req);
210+bool is_mcs_bypass(int mcs_id);
209211
210212 /* CN10K-B APIs */
211213 void cn10kb_mcs_set_hw_capabilities(struct mcs *mcs);
drivers/net/ethernet/marvell/octeontx2/af/mcs_reg.h+27−4
@@ -810,14 +810,37 @@ · 809 unmodified lines
810810 offset = 0x9d8ull; \
811811 offset; })
812812
813+#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDX(a) ({ \
814+ u64 offset; \
815+ \
816+ offset = 0xee80ull; \
817+ if (mcs->hw->mcs_blks > 1) \
818+ offset = 0xe818ull; \
819+ offset += (a) * 0x8ull; \
820+ offset; })
821+
822+#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) ({ \
823+ u64 offset; \
824+ \
825+ offset = 0xa680ull; \
826+ if (mcs->hw->mcs_blks > 1) \
827+ offset = 0xd018ull; \
828+ offset += (a) * 0x8ull; \
829+ offset; })
830+
831+#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) ({ \
832+ u64 offset; \
833+ \
834+ offset = 0xf680ull; \
835+ if (mcs->hw->mcs_blks > 1) \
836+ offset = 0xe018ull; \
837+ offset += (a) * 0x8ull; \
838+ offset; })
839+
813840 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCDECRYPTEDX(a) (0xe680ull + (a) * 0x8ull)
814841 #define MCSX_CSE_RX_MEM_SLAVE_INOCTETSSCVALIDATEX(a) (0xde80ull + (a) * 0x8ull)
815−#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDORNOTAGX(a) (0xa680ull + (a) * 0x8ull)
816842 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYNOTAGX(a) (0xd218 + (a) * 0x8ull)
817−#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYUNTAGGEDX(a) (0xd018ull + (a) * 0x8ull)
818−#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCUNCHECKEDOROKX(a) (0xee80ull + (a) * 0x8ull)
819843 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSECYCTLX(a) (0xb680ull + (a) * 0x8ull)
820−#define MCSX_CSE_RX_MEM_SLAVE_INPKTSSCLATEORDELAYEDX(a) (0xf680ull + (a) * 0x8ull)
821844 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSAINVALIDX(a) (0x12680ull + (a) * 0x8ull)
822845 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTUSINGSAERRORX(a) (0x15680ull + (a) * 0x8ull)
823846 #define MCSX_CSE_RX_MEM_SLAVE_INPKTSSANOTVALIDX(a) (0x13680ull + (a) * 0x8ull)
drivers/net/ethernet/marvell/octeontx2/af/rvu.c+3−0
@@ -2631,6 +2631,9 @@ static void __rvu_flr_handler(struct rvu *rvu, u16 pcifunc) · 2630 unmodified lines
26312631 rvu_npc_free_mcam_entries(rvu, pcifunc, -1);
26322632 rvu_mac_reset(rvu, pcifunc);
26332633
2634+ if (rvu->mcs_blk_cnt)
2635+ rvu_mcs_flr_handler(rvu, pcifunc);
2636+
26342637 mutex_unlock(&rvu->flr_lock);
26352638 }
26362639
drivers/net/ethernet/marvell/octeontx2/af/rvu.h+1−0
@@ -345,6 +345,7 @@ struct nix_hw { · 344 unmodified lines
345345 struct nix_txvlan txvlan;
346346 struct nix_ipolicer *ipolicer;
347347 u64 *tx_credits;
348+ u8 cc_mcs_cnt;
348349 };
349350
350351 /* RVU block's capabilities or functionality,
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c+1−4
@@ -1087,7 +1087,7 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl) · 1086 unmodified lines
10871087
10881088 rvu_dl->devlink_wq = create_workqueue("rvu_devlink_wq");
10891089 if (!rvu_dl->devlink_wq)
1090− goto err;
1090+ return -ENOMEM;
10911091
10921092 INIT_WORK(&rvu_reporters->intr_work, rvu_npa_intr_work);
10931093 INIT_WORK(&rvu_reporters->err_work, rvu_npa_err_work);
@@ -1095,9 +1095,6 @@ static int rvu_npa_register_reporters(struct rvu_devlink *rvu_dl) · 1 unmodified line
10951095 INIT_WORK(&rvu_reporters->ras_work, rvu_npa_ras_work);
10961096
10971097 return 0;
1098−err:
1099− rvu_npa_health_reporters_destroy(rvu_dl);
1100− return -ENOMEM;
11011098 }
11021099
11031100 static int rvu_npa_health_reporters_create(struct rvu_devlink *rvu_dl)
drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+10−2
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include "rvu_reg.h"
1313 #include "rvu.h"
1414 #include "npc.h"
15+#include "mcs.h"
1516 #include "cgx.h"
1617 #include "lmac_common.h"
1718 #include "rvu_npc_hash.h"
@@ -4389,6 +4390,12 @@ static void nix_link_config(struct rvu *rvu, int blkaddr, · 4371 unmodified lines
43894390 SDP_HW_MAX_FRS << 16 | NIC_HW_MIN_FRS);
43904391 }
43914392
4393+ /* Get MCS external bypass status for CN10K-B */
4394+ if (mcs_get_blkcnt() == 1) {
4395+ /* Adjust for 2 credits when external bypass is disabled */
4396+ nix_hw->cc_mcs_cnt = is_mcs_bypass(0) ? 0 : 2;
4397+ }
4398+
43924399 /* Set credits for Tx links assuming max packet length allowed.
43934400 * This will be reconfigured based on MTU set for PF/VF.
43944401 */
@@ -4412,6 +4419,7 @@ static void nix_link_config(struct rvu *rvu, int blkaddr, · 17 unmodified lines
44124419 tx_credits = (lmac_fifo_len - lmac_max_frs) / 16;
44134420 /* Enable credits and set credit pkt count to max allowed */
44144421 cfg = (tx_credits << 12) | (0x1FF << 2) | BIT_ULL(1);
4422+ cfg |= FIELD_PREP(NIX_AF_LINKX_MCS_CNT_MASK, nix_hw->cc_mcs_cnt);
44154423
44164424 link = iter + slink;
44174425 nix_hw->tx_credits[link] = tx_credits;
@@ -5505,6 +5513,8 @@ int rvu_mbox_handler_nix_bandprof_free(struct rvu *rvu, · 1087 unmodified lines
55055513
55065514 ipolicer = &nix_hw->ipolicer[layer];
55075515 for (idx = 0; idx < req->prof_count[layer]; idx++) {
5516+ if (idx == MAX_BANDPROF_PER_PFFUNC)
5517+ break;
55085518 prof_idx = req->prof_idx[layer][idx];
55095519 if (prof_idx >= ipolicer->band_prof.max ||
55105520 ipolicer->pfvf_map[prof_idx] != pcifunc)
@@ -5518,8 +5528,6 @@ int rvu_mbox_handler_nix_bandprof_free(struct rvu *rvu, · 7 unmodified lines
55185528 ipolicer->pfvf_map[prof_idx] = 0x00;
55195529 ipolicer->match_id[prof_idx] = 0;
55205530 rvu_free_rsrc(&ipolicer->band_prof, prof_idx);
5521− if (idx == MAX_BANDPROF_PER_PFFUNC)
5522− break;
55235531 }
55245532 }
55255533 mutex_unlock(&rvu->rsrc_lock);
drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+7−1
@@ -389,7 +389,13 @@ static u64 npc_get_default_entry_action(struct rvu *rvu, struct npc_mcam *mcam, · 388 unmodified lines
389389 int bank, nixlf, index;
390390
391391 /* get ucast entry rule entry index */
392− nix_get_nixlf(rvu, pf_func, &nixlf, NULL);
392+ if (nix_get_nixlf(rvu, pf_func, &nixlf, NULL)) {
393+ dev_err(rvu->dev, "%s: nixlf not attached to pcifunc:0x%x\n",
394+ __func__, pf_func);
395+ /* Action 0 is drop */
396+ return 0;
397+ }
398+
393399 index = npc_get_nixlf_mcam_index(mcam, pf_func, nixlf,
394400 NIXLF_UCAST_ENTRY);
395401 bank = npc_get_bank(mcam, index);
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.c+2−2
@@ -31,8 +31,8 @@ static struct hw_reg_map txsch_reg_map[NIX_TXSCH_LVL_CNT] = { · 30 unmodified lines
3131 {NIX_TXSCH_LVL_TL4, 3, 0xFFFF, {{0x0B00, 0x0B08}, {0x0B10, 0x0B18},
3232 {0x1200, 0x12E0} } },
3333 {NIX_TXSCH_LVL_TL3, 4, 0xFFFF, {{0x1000, 0x10E0}, {0x1600, 0x1608},
34− {0x1610, 0x1618}, {0x1700, 0x17B0} } },
35− {NIX_TXSCH_LVL_TL2, 2, 0xFFFF, {{0x0E00, 0x0EE0}, {0x1700, 0x17B0} } },
34+ {0x1610, 0x1618}, {0x1700, 0x17C8} } },
35+ {NIX_TXSCH_LVL_TL2, 2, 0xFFFF, {{0x0E00, 0x0EE0}, {0x1700, 0x17C8} } },
3636 {NIX_TXSCH_LVL_TL1, 1, 0xFFFF, {{0x0C00, 0x0D98} } },
3737 };
3838
drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h+1−0
@@ -437,6 +437,7 @@ · 436 unmodified lines
437437
438438 #define NIX_AF_LINKX_BASE_MASK GENMASK_ULL(11, 0)
439439 #define NIX_AF_LINKX_RANGE_MASK GENMASK_ULL(19, 16)
440+#define NIX_AF_LINKX_MCS_CNT_MASK GENMASK_ULL(33, 32)
440441
441442 /* SSO */
442443 #define SSO_AF_CONST (0x1000)
drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c+3−0
@@ -450,6 +450,9 @@ int cn10k_set_ipolicer_rate(struct otx2_nic *pfvf, u16 profile, · 449 unmodified lines
450450 aq->prof.pebs_mantissa = 0;
451451 aq->prof_mask.pebs_mantissa = 0xFF;
452452
453+ aq->prof.hl_en = 0;
454+ aq->prof_mask.hl_en = 1;
455+
453456 /* Fill AQ info */
454457 aq->qidx = profile;
455458 aq->ctype = NIX_AQ_CTYPE_BANDPROF;
drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h+2−0
@@ -1070,6 +1070,8 @@ int otx2_init_tc(struct otx2_nic *nic); · 1069 unmodified lines
10701070 void otx2_shutdown_tc(struct otx2_nic *nic);
10711071 int otx2_setup_tc(struct net_device *netdev, enum tc_setup_type type,
10721072 void *type_data);
1073+void otx2_tc_apply_ingress_police_rules(struct otx2_nic *nic);
1074+
10731075 /* CGX/RPM DMAC filters support */
10741076 int otx2_dmacflt_get_max_cnt(struct otx2_nic *pf);
10751077 int otx2_dmacflt_add(struct otx2_nic *pf, const u8 *mac, u32 bit_pos);
drivers/net/ethernet/marvell/octeontx2/nic/otx2_ethtool.c+5−1
@@ -334,9 +334,12 @@ static void otx2_get_pauseparam(struct net_device *netdev, · 333 unmodified lines
334334 if (is_otx2_lbkvf(pfvf->pdev))
335335 return;
336336
337+ mutex_lock(&pfvf->mbox.lock);
337338 req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(&pfvf->mbox);
338− if (!req)
339+ if (!req) {
340+ mutex_unlock(&pfvf->mbox.lock);
339341 return;
342+ }
340343
341344 if (!otx2_sync_mbox_msg(&pfvf->mbox)) {
342345 rsp = (struct cgx_pause_frm_cfg *)
@@ -344,6 +347,7 @@ static void otx2_get_pauseparam(struct net_device *netdev, · 1 unmodified line
344347 pause->rx_pause = rsp->rx_pause;
345348 pause->tx_pause = rsp->tx_pause;
346349 }
350+ mutex_unlock(&pfvf->mbox.lock);
347351 }
348352
349353 static int otx2_set_pauseparam(struct net_device *netdev,
drivers/net/ethernet/marvell/octeontx2/nic/otx2_flows.c+19−1
@@ -1088,6 +1088,7 @@ int otx2_add_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc) · 1087 unmodified lines
10881088 struct ethhdr *eth_hdr;
10891089 bool new = false;
10901090 int err = 0;
1091+ u64 vf_num;
10911092 u32 ring;
10921093
10931094 if (!flow_cfg->max_flows) {
@@ -1100,7 +1101,21 @@ int otx2_add_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc) · 6 unmodified lines
11001101 if (!(pfvf->flags & OTX2_FLAG_NTUPLE_SUPPORT))
11011102 return -ENOMEM;
11021103
1103− if (ring >= pfvf->hw.rx_queues && fsp->ring_cookie != RX_CLS_FLOW_DISC)
1104+ /* Number of queues on a VF can be greater or less than
1105+ * the PF's queue. Hence no need to check for the
1106+ * queue count. Hence no need to check queue count if PF
1107+ * is installing for its VF. Below is the expected vf_num value
1108+ * based on the ethtool commands.
1109+ *
1110+ * e.g.
1111+ * 1. ethtool -U <netdev> ... action -1 ==> vf_num:255
1112+ * 2. ethtool -U <netdev> ... action <queue_num> ==> vf_num:0
1113+ * 3. ethtool -U <netdev> ... vf <vf_idx> queue <queue_num> ==>
1114+ * vf_num:vf_idx+1
1115+ */
1116+ vf_num = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
1117+ if (!is_otx2_vf(pfvf->pcifunc) && !vf_num &&
1118+ ring >= pfvf->hw.rx_queues && fsp->ring_cookie != RX_CLS_FLOW_DISC)
11041119 return -EINVAL;
11051120
11061121 if (fsp->location >= otx2_get_maxflows(flow_cfg))
@@ -1182,6 +1197,9 @@ int otx2_add_flow(struct otx2_nic *pfvf, struct ethtool_rxnfc *nfc) · 75 unmodified lines
11821197 flow_cfg->nr_flows++;
11831198 }
11841199
1200+ if (flow->is_vf)
1201+ netdev_info(pfvf->netdev,
1202+ "Make sure that VF's queue number is within its queue limit\n");
11851203 return 0;
11861204 }
11871205
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+18−2
@@ -566,7 +566,9 @@ static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq) · 565 unmodified lines
566566 otx2_write64(pf, RVU_PF_VFPF_MBOX_INTX(1), intr);
567567 otx2_queue_work(mbox, pf->mbox_pfvf_wq, 64, vfs, intr,
568568 TYPE_PFVF);
569− vfs -= 64;
569+ if (intr)
570+ trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
571+ vfs = 64;
570572 }
571573
572574 intr = otx2_read64(pf, RVU_PF_VFPF_MBOX_INTX(0));
@@ -574,7 +576,8 @@ static irqreturn_t otx2_pfvf_mbox_intr_handler(int irq, void *pf_irq) · 1 unmodified line
574576
575577 otx2_queue_work(mbox, pf->mbox_pfvf_wq, 0, vfs, intr, TYPE_PFVF);
576578
577− trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
579+ if (intr)
580+ trace_otx2_msg_interrupt(mbox->mbox.pdev, "VF(s) to PF", intr);
578581
579582 return IRQ_HANDLED;
580583 }
@@ -1685,6 +1688,14 @@ static void otx2_do_set_rx_mode(struct otx2_nic *pf) · 1104 unmodified lines
16851688 mutex_unlock(&pf->mbox.lock);
16861689 }
16871690
1691+static void otx2_set_irq_coalesce(struct otx2_nic *pfvf)
1692+{
1693+ int cint;
1694+
1695+ for (cint = 0; cint < pfvf->hw.cint_cnt; cint++)
1696+ otx2_config_irq_coalescing(pfvf, cint);
1697+}
1698+
16881699 static void otx2_dim_work(struct work_struct *w)
16891700 {
16901701 struct dim_cq_moder cur_moder;
@@ -1700,6 +1711,7 @@ static void otx2_dim_work(struct work_struct *w) · 9 unmodified lines
17001711 CQ_TIMER_THRESH_MAX : cur_moder.usec;
17011712 pfvf->hw.cq_ecount_wait = (cur_moder.pkts > NAPI_POLL_WEIGHT) ?
17021713 NAPI_POLL_WEIGHT : cur_moder.pkts;
1714+ otx2_set_irq_coalesce(pfvf);
17031715 dim->state = DIM_START_MEASURE;
17041716 }
17051717
@@ -1870,6 +1882,8 @@ int otx2_open(struct net_device *netdev) · 164 unmodified lines
18701882 if (pf->flags & OTX2_FLAG_DMACFLTR_SUPPORT)
18711883 otx2_dmacflt_reinstall_flows(pf);
18721884
1885+ otx2_tc_apply_ingress_police_rules(pf);
1886+
18731887 err = otx2_rxtx_enable(pf, true);
18741888 /* If a mbox communication error happens at this point then interface
18751889 * will end up in a state such that it is in down state but hardware
@@ -1934,6 +1948,8 @@ int otx2_stop(struct net_device *netdev) · 58 unmodified lines
19341948 /* Clear RSS enable flag */
19351949 rss = &pf->hw.rss_info;
19361950 rss->enable = false;
1951+ if (!netif_is_rxfh_configured(netdev))
1952+ kfree(rss->rss_ctx[DEFAULT_RSS_CONTEXT_GROUP]);
19371953
19381954 /* Cleanup Queue IRQ */
19391955 vec = pci_irq_vector(pf->pdev,
drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c+95−25
@@ -47,6 +47,9 @@ struct otx2_tc_flow { · 46 unmodified lines
4747 bool is_act_police;
4848 u32 prio;
4949 struct npc_install_flow_req req;
50+ u64 rate;
51+ u32 burst;
52+ bool is_pps;
5053 };
5154
5255 static void otx2_get_egress_burst_cfg(struct otx2_nic *nic, u32 burst,
@@ -284,21 +287,10 @@ static int otx2_tc_egress_matchall_delete(struct otx2_nic *nic, · 231 unmodified lines
284287 return err;
285288 }
286289
287−static int otx2_tc_act_set_police(struct otx2_nic *nic,
288− struct otx2_tc_flow *node,
289− struct flow_cls_offload *f,
290− u64 rate, u32 burst, u32 mark,
291− struct npc_install_flow_req *req, bool pps)
290+static int otx2_tc_act_set_hw_police(struct otx2_nic *nic,
291+ struct otx2_tc_flow *node)
292292 {
293− struct netlink_ext_ack *extack = f->common.extack;
294− struct otx2_hw *hw = &nic->hw;
295− int rq_idx, rc;
296−
297− rq_idx = find_first_zero_bit(&nic->rq_bmap, hw->rx_queues);
298− if (rq_idx >= hw->rx_queues) {
299− NL_SET_ERR_MSG_MOD(extack, "Police action rules exceeded");
300− return -EINVAL;
301− }
293+ int rc;
302294
303295 mutex_lock(&nic->mbox.lock);
304296
@@ -308,23 +300,17 @@ static int otx2_tc_act_set_police(struct otx2_nic *nic, · 3 unmodified lines
308300 return rc;
309301 }
310302
311− rc = cn10k_set_ipolicer_rate(nic, node->leaf_profile, burst, rate, pps);
303+ rc = cn10k_set_ipolicer_rate(nic, node->leaf_profile,
304+ node->burst, node->rate, node->is_pps);
312305 if (rc)
313306 goto free_leaf;
314307
315− rc = cn10k_map_unmap_rq_policer(nic, rq_idx, node->leaf_profile, true);
308+ rc = cn10k_map_unmap_rq_policer(nic, node->rq, node->leaf_profile, true);
316309 if (rc)
317310 goto free_leaf;
318311
319312 mutex_unlock(&nic->mbox.lock);
320313
321− req->match_id = mark & 0xFFFFULL;
322− req->index = rq_idx;
323− req->op = NIX_RX_ACTIONOP_UCAST;
324− set_bit(rq_idx, &nic->rq_bmap);
325− node->is_act_police = true;
326− node->rq = rq_idx;
327−
328314 return 0;
329315
330316 free_leaf:
@@ -336,6 +322,39 @@ free_leaf: · 5 unmodified lines
336322 return rc;
337323 }
338324
325+static int otx2_tc_act_set_police(struct otx2_nic *nic,
326+ struct otx2_tc_flow *node,
327+ struct flow_cls_offload *f,
328+ u64 rate, u32 burst, u32 mark,
329+ struct npc_install_flow_req *req, bool pps)
330+{
331+ struct netlink_ext_ack *extack = f->common.extack;
332+ struct otx2_hw *hw = &nic->hw;
333+ int rq_idx, rc;
334+
335+ rq_idx = find_first_zero_bit(&nic->rq_bmap, hw->rx_queues);
336+ if (rq_idx >= hw->rx_queues) {
337+ NL_SET_ERR_MSG_MOD(extack, "Police action rules exceeded");
338+ return -EINVAL;
339+ }
340+
341+ req->match_id = mark & 0xFFFFULL;
342+ req->index = rq_idx;
343+ req->op = NIX_RX_ACTIONOP_UCAST;
344+
345+ node->is_act_police = true;
346+ node->rq = rq_idx;
347+ node->burst = burst;
348+ node->rate = rate;
349+ node->is_pps = pps;
350+
351+ rc = otx2_tc_act_set_hw_police(nic, node);
352+ if (!rc)
353+ set_bit(rq_idx, &nic->rq_bmap);
354+
355+ return rc;
356+}
357+
339358 static int otx2_tc_parse_actions(struct otx2_nic *nic,
340359 struct flow_action *flow_action,
341360 struct npc_install_flow_req *req,
@@ -1044,6 +1063,11 @@ static int otx2_tc_del_flow(struct otx2_nic *nic, · 702 unmodified lines
10441063 }
10451064
10461065 if (flow_node->is_act_police) {
1066+ __clear_bit(flow_node->rq, &nic->rq_bmap);
1067+
1068+ if (nic->flags & OTX2_FLAG_INTF_DOWN)
1069+ goto free_mcam_flow;
1070+
10471071 mutex_lock(&nic->mbox.lock);
10481072
10491073 err = cn10k_map_unmap_rq_policer(nic, flow_node->rq,
@@ -1059,11 +1083,10 @@ static int otx2_tc_del_flow(struct otx2_nic *nic, · 9 unmodified lines
10591083 "Unable to free leaf bandwidth profile(%d)\n",
10601084 flow_node->leaf_profile);
10611085
1062− __clear_bit(flow_node->rq, &nic->rq_bmap);
1063−
10641086 mutex_unlock(&nic->mbox.lock);
10651087 }
10661088
1089+free_mcam_flow:
10671090 otx2_del_mcam_flow_entry(nic, flow_node->entry, NULL);
10681091 otx2_tc_update_mcam_table(nic, flow_cfg, flow_node, false);
10691092 kfree_rcu(flow_node, rcu);
@@ -1083,6 +1106,11 @@ static int otx2_tc_add_flow(struct otx2_nic *nic, · 13 unmodified lines
10831106 if (!(nic->flags & OTX2_FLAG_TC_FLOWER_SUPPORT))
10841107 return -ENOMEM;
10851108
1109+ if (nic->flags & OTX2_FLAG_INTF_DOWN) {
1110+ NL_SET_ERR_MSG_MOD(extack, "Interface not initialized");
1111+ return -EINVAL;
1112+ }
1113+
10861114 if (flow_cfg->nr_flows == flow_cfg->max_flows) {
10871115 NL_SET_ERR_MSG_MOD(extack,
10881116 "Free MCAM entry not available to add the flow");
@@ -1442,3 +1470,45 @@ void otx2_shutdown_tc(struct otx2_nic *nic) · 353 unmodified lines
14421470 otx2_destroy_tc_flow_list(nic);
14431471 }
14441472 EXPORT_SYMBOL(otx2_shutdown_tc);
1473+
1474+static void otx2_tc_config_ingress_rule(struct otx2_nic *nic,
1475+ struct otx2_tc_flow *node)
1476+{
1477+ struct npc_install_flow_req *req;
1478+
1479+ if (otx2_tc_act_set_hw_police(nic, node))
1480+ return;
1481+
1482+ mutex_lock(&nic->mbox.lock);
1483+
1484+ req = otx2_mbox_alloc_msg_npc_install_flow(&nic->mbox);
1485+ if (!req)
1486+ goto err;
1487+
1488+ memcpy(req, &node->req, sizeof(struct npc_install_flow_req));
1489+
1490+ if (otx2_sync_mbox_msg(&nic->mbox))
1491+ netdev_err(nic->netdev,
1492+ "Failed to install MCAM flow entry for ingress rule");
1493+err:
1494+ mutex_unlock(&nic->mbox.lock);
1495+}
1496+
1497+void otx2_tc_apply_ingress_police_rules(struct otx2_nic *nic)
1498+{
1499+ struct otx2_flow_config *flow_cfg = nic->flow_cfg;
1500+ struct otx2_tc_flow *node;
1501+
1502+ /* If any ingress policer rules exist for the interface then
1503+ * apply those rules. Ingress policer rules depend on bandwidth
1504+ * profiles linked to the receive queues. Since no receive queues
1505+ * exist when interface is down, ingress policer rules are stored
1506+ * and configured in hardware after all receive queues are allocated
1507+ * in otx2_open.
1508+ */
1509+ list_for_each_entry(node, &flow_cfg->flow_list_tc, list) {
1510+ if (node->is_act_police)
1511+ otx2_tc_config_ingress_rule(nic, node);
1512+ }
1513+}
1514+EXPORT_SYMBOL(otx2_tc_apply_ingress_police_rules);
drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c+10−10
@@ -512,11 +512,18 @@ static void otx2_adjust_adaptive_coalese(struct otx2_nic *pfvf, struct otx2_cq_p · 511 unmodified lines
512512 {
513513 struct dim_sample dim_sample;
514514 u64 rx_frames, rx_bytes;
515+ u64 tx_frames, tx_bytes;
515516
516517 rx_frames = OTX2_GET_RX_STATS(RX_BCAST) + OTX2_GET_RX_STATS(RX_MCAST) +
517518 OTX2_GET_RX_STATS(RX_UCAST);
518519 rx_bytes = OTX2_GET_RX_STATS(RX_OCTS);
519− dim_update_sample(pfvf->napi_events, rx_frames, rx_bytes, &dim_sample);
520+ tx_bytes = OTX2_GET_TX_STATS(TX_OCTS);
521+ tx_frames = OTX2_GET_TX_STATS(TX_UCAST);
522+
523+ dim_update_sample(pfvf->napi_events,
524+ rx_frames + tx_frames,
525+ rx_bytes + tx_bytes,
526+ &dim_sample);
520527 net_dim(&cq_poll->dim, dim_sample);
521528 }
522529
@@ -558,16 +565,9 @@ int otx2_napi_handler(struct napi_struct *napi, int budget) · 35 unmodified lines
558565 if (pfvf->flags & OTX2_FLAG_INTF_DOWN)
559566 return workdone;
560567
561− /* Check for adaptive interrupt coalesce */
562− if (workdone != 0 &&
563− ((pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED) ==
564− OTX2_FLAG_ADPTV_INT_COAL_ENABLED)) {
565− /* Adjust irq coalese using net_dim */
568+ /* Adjust irq coalese using net_dim */
569+ if (pfvf->flags & OTX2_FLAG_ADPTV_INT_COAL_ENABLED)
566570 otx2_adjust_adaptive_coalese(pfvf, cq_poll);
567− /* Update irq coalescing */
568− for (i = 0; i < pfvf->hw.cint_cnt; i++)
569− otx2_config_irq_coalescing(pfvf, i);
570− }
571571
572572 if (unlikely(!filled_cnt)) {
573573 struct refill_work *work;
drivers/net/ethernet/mellanox/mlx5/core/en/ptp.c+16−4
@@ -177,6 +177,8 @@ static void mlx5e_ptpsq_mark_ts_cqes_undelivered(struct mlx5e_ptpsq *ptpsq, · 176 unmodified lines
177177
178178 static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq,
179179 struct mlx5_cqe64 *cqe,
180+ u8 *md_buff,
181+ u8 *md_buff_sz,
180182 int budget)
181183 {
182184 struct mlx5e_ptp_port_ts_cqe_list *pending_cqe_list = ptpsq->ts_cqe_pending_list;
@@ -211,19 +213,24 @@ static void mlx5e_ptp_handle_ts_cqe(struct mlx5e_ptpsq *ptpsq, · 28 unmodified lines
211213 mlx5e_ptpsq_mark_ts_cqes_undelivered(ptpsq, hwtstamp);
212214 out:
213215 napi_consume_skb(skb, budget);
214− mlx5e_ptp_metadata_fifo_push(&ptpsq->metadata_freelist, metadata_id);
216+ md_buff[*md_buff_sz++] = metadata_id;
215217 if (unlikely(mlx5e_ptp_metadata_map_unhealthy(&ptpsq->metadata_map)) &&
216218 !test_and_set_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
217219 queue_work(ptpsq->txqsq.priv->wq, &ptpsq->report_unhealthy_work);
218220 }
219221
220−static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int budget)
222+static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int napi_budget)
221223 {
222224 struct mlx5e_ptpsq *ptpsq = container_of(cq, struct mlx5e_ptpsq, ts_cq);
223− struct mlx5_cqwq *cqwq = &cq->wq;
225+ int budget = min(napi_budget, MLX5E_TX_CQ_POLL_BUDGET);
226+ u8 metadata_buff[MLX5E_TX_CQ_POLL_BUDGET];
227+ u8 metadata_buff_sz = 0;
228+ struct mlx5_cqwq *cqwq;
224229 struct mlx5_cqe64 *cqe;
225230 int work_done = 0;
226231
232+ cqwq = &cq->wq;
233+
227234 if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &ptpsq->txqsq.state)))
228235 return false;
229236
@@ -234,7 +241,8 @@ static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int budget) · 4 unmodified lines
234241 do {
235242 mlx5_cqwq_pop(cqwq);
236243
237− mlx5e_ptp_handle_ts_cqe(ptpsq, cqe, budget);
244+ mlx5e_ptp_handle_ts_cqe(ptpsq, cqe,
245+ metadata_buff, &metadata_buff_sz, napi_budget);
238246 } while ((++work_done < budget) && (cqe = mlx5_cqwq_get_cqe(cqwq)));
239247
240248 mlx5_cqwq_update_db_record(cqwq);
@@ -242,6 +250,10 @@ static bool mlx5e_ptp_poll_ts_cq(struct mlx5e_cq *cq, int budget) · 1 unmodified line
242250 /* ensure cq space is freed before enabling more cqes */
243251 wmb();
244252
253+ while (metadata_buff_sz > 0)
254+ mlx5e_ptp_metadata_fifo_push(&ptpsq->metadata_freelist,
255+ metadata_buff[--metadata_buff_sz]);
256+
245257 mlx5e_txqsq_wake(&ptpsq->txqsq);
246258
247259 return work_done == budget;
drivers/net/ethernet/mellanox/mlx5/core/en/reporter_rx.c+2−2
@@ -492,11 +492,11 @@ static int mlx5e_rx_reporter_dump(struct devlink_health_reporter *reporter, · 491 unmodified lines
492492
493493 void mlx5e_reporter_rx_timeout(struct mlx5e_rq *rq)
494494 {
495− char icosq_str[MLX5E_REPORTER_PER_Q_MAX_LEN] = {};
496495 char err_str[MLX5E_REPORTER_PER_Q_MAX_LEN];
497496 struct mlx5e_icosq *icosq = rq->icosq;
498497 struct mlx5e_priv *priv = rq->priv;
499498 struct mlx5e_err_ctx err_ctx = {};
499+ char icosq_str[32] = {};
500500
501501 err_ctx.ctx = rq;
502502 err_ctx.recover = mlx5e_rx_reporter_timeout_recover;
@@ -505,7 +505,7 @@ void mlx5e_reporter_rx_timeout(struct mlx5e_rq *rq) · 2 unmodified lines
505505 if (icosq)
506506 snprintf(icosq_str, sizeof(icosq_str), "ICOSQ: 0x%x, ", icosq->sqn);
507507 snprintf(err_str, sizeof(err_str),
508− "RX timeout on channel: %d, %sRQ: 0x%x, CQ: 0x%x",
508+ "RX timeout on channel: %d, %s RQ: 0x%x, CQ: 0x%x",
509509 rq->ix, icosq_str, rq->rqn, rq->cq.mcq.cqn);
510510
511511 mlx5e_health_report(priv, priv->rx_reporter, err_str, &err_ctx);
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun.c+14−16
@@ -300,9 +300,6 @@ int mlx5e_tc_tun_create_header_ipv4(struct mlx5e_priv *priv, · 299 unmodified lines
300300 if (err)
301301 goto destroy_neigh_entry;
302302
303− e->encap_size = ipv4_encap_size;
304− e->encap_header = encap_header;
305−
306303 if (!(nud_state & NUD_VALID)) {
307304 neigh_event_send(attr.n, NULL);
308305 /* the encap entry will be made valid on neigh update event
@@ -322,6 +319,8 @@ int mlx5e_tc_tun_create_header_ipv4(struct mlx5e_priv *priv, · 13 unmodified lines
322319 goto destroy_neigh_entry;
323320 }
324321
322+ e->encap_size = ipv4_encap_size;
323+ e->encap_header = encap_header;
325324 e->flags |= MLX5_ENCAP_ENTRY_VALID;
326325 mlx5e_rep_queue_neigh_stats_work(netdev_priv(attr.out_dev));
327326 mlx5e_route_lookup_ipv4_put(&attr);
@@ -404,16 +403,12 @@ int mlx5e_tc_tun_update_header_ipv4(struct mlx5e_priv *priv, · 76 unmodified lines
404403 if (err)
405404 goto free_encap;
406405
407− e->encap_size = ipv4_encap_size;
408− kfree(e->encap_header);
409− e->encap_header = encap_header;
410−
411406 if (!(nud_state & NUD_VALID)) {
412407 neigh_event_send(attr.n, NULL);
413408 /* the encap entry will be made valid on neigh update event
414409 * and not used before that.
415410 */
416− goto release_neigh;
411+ goto free_encap;
417412 }
418413
419414 memset(&reformat_params, 0, sizeof(reformat_params));
@@ -427,6 +422,10 @@ int mlx5e_tc_tun_update_header_ipv4(struct mlx5e_priv *priv, · 7 unmodified lines
427422 goto free_encap;
428423 }
429424
425+ e->encap_size = ipv4_encap_size;
426+ kfree(e->encap_header);
427+ e->encap_header = encap_header;
428+
430429 e->flags |= MLX5_ENCAP_ENTRY_VALID;
431430 mlx5e_rep_queue_neigh_stats_work(netdev_priv(attr.out_dev));
432431 mlx5e_route_lookup_ipv4_put(&attr);
@@ -568,9 +567,6 @@ int mlx5e_tc_tun_create_header_ipv6(struct mlx5e_priv *priv, · 135 unmodified lines
568567 if (err)
569568 goto destroy_neigh_entry;
570569
571− e->encap_size = ipv6_encap_size;
572− e->encap_header = encap_header;
573−
574570 if (!(nud_state & NUD_VALID)) {
575571 neigh_event_send(attr.n, NULL);
576572 /* the encap entry will be made valid on neigh update event
@@ -590,6 +586,8 @@ int mlx5e_tc_tun_create_header_ipv6(struct mlx5e_priv *priv, · 13 unmodified lines
590586 goto destroy_neigh_entry;
591587 }
592588
589+ e->encap_size = ipv6_encap_size;
590+ e->encap_header = encap_header;
593591 e->flags |= MLX5_ENCAP_ENTRY_VALID;
594592 mlx5e_rep_queue_neigh_stats_work(netdev_priv(attr.out_dev));
595593 mlx5e_route_lookup_ipv6_put(&attr);
@@ -671,16 +669,12 @@ int mlx5e_tc_tun_update_header_ipv6(struct mlx5e_priv *priv, · 75 unmodified lines
671669 if (err)
672670 goto free_encap;
673671
674− e->encap_size = ipv6_encap_size;
675− kfree(e->encap_header);
676− e->encap_header = encap_header;
677−
678672 if (!(nud_state & NUD_VALID)) {
679673 neigh_event_send(attr.n, NULL);
680674 /* the encap entry will be made valid on neigh update event
681675 * and not used before that.
682676 */
683− goto release_neigh;
677+ goto free_encap;
684678 }
685679
686680 memset(&reformat_params, 0, sizeof(reformat_params));
@@ -694,6 +688,10 @@ int mlx5e_tc_tun_update_header_ipv6(struct mlx5e_priv *priv, · 7 unmodified lines
694688 goto free_encap;
695689 }
696690
691+ e->encap_size = ipv6_encap_size;
692+ kfree(e->encap_header);
693+ e->encap_header = encap_header;
694+
697695 e->flags |= MLX5_ENCAP_ENTRY_VALID;
698696 mlx5e_rep_queue_neigh_stats_work(netdev_priv(attr.out_dev));
699697 mlx5e_route_lookup_ipv6_put(&attr);
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+9−4
@@ -43,12 +43,17 @@ void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv, · 42 unmodified lines
4343 struct ethtool_drvinfo *drvinfo)
4444 {
4545 struct mlx5_core_dev *mdev = priv->mdev;
46+ int count;
4647
4748 strscpy(drvinfo->driver, KBUILD_MODNAME, sizeof(drvinfo->driver));
48− snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
49− "%d.%d.%04d (%.16s)",
50− fw_rev_maj(mdev), fw_rev_min(mdev), fw_rev_sub(mdev),
51− mdev->board_id);
49+ count = snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
50+ "%d.%d.%04d (%.16s)", fw_rev_maj(mdev),
51+ fw_rev_min(mdev), fw_rev_sub(mdev), mdev->board_id);
52+ if (count == sizeof(drvinfo->fw_version))
53+ snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
54+ "%d.%d.%04d", fw_rev_maj(mdev),
55+ fw_rev_min(mdev), fw_rev_sub(mdev));
56+
5257 strscpy(drvinfo->bus_info, dev_name(mdev->device),
5358 sizeof(drvinfo->bus_info));
5459 }
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+8−4
@@ -71,13 +71,17 @@ static void mlx5e_rep_get_drvinfo(struct net_device *dev, · 70 unmodified lines
7171 {
7272 struct mlx5e_priv *priv = netdev_priv(dev);
7373 struct mlx5_core_dev *mdev = priv->mdev;
74+ int count;
7475
7576 strscpy(drvinfo->driver, mlx5e_rep_driver_name,
7677 sizeof(drvinfo->driver));
77− snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
78− "%d.%d.%04d (%.16s)",
79− fw_rev_maj(mdev), fw_rev_min(mdev),
80− fw_rev_sub(mdev), mdev->board_id);
78+ count = snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
79+ "%d.%d.%04d (%.16s)", fw_rev_maj(mdev),
80+ fw_rev_min(mdev), fw_rev_sub(mdev), mdev->board_id);
81+ if (count == sizeof(drvinfo->fw_version))
82+ snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
83+ "%d.%d.%04d", fw_rev_maj(mdev),
84+ fw_rev_min(mdev), fw_rev_sub(mdev));
8185 }
8286
8387 static const struct counter_desc sw_rep_stats_desc[] = {
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+32−28
@@ -3147,7 +3147,7 @@ static struct mlx5_fields fields[] = { · 3146 unmodified lines
31473147 OFFLOAD(DIPV6_31_0, 32, U32_MAX, ip6.daddr.s6_addr32[3], 0,
31483148 dst_ipv4_dst_ipv6.ipv6_layout.ipv6[12]),
31493149 OFFLOAD(IPV6_HOPLIMIT, 8, U8_MAX, ip6.hop_limit, 0, ttl_hoplimit),
3150− OFFLOAD(IP_DSCP, 16, 0xc00f, ip6, 0, ip_dscp),
3150+ OFFLOAD(IP_DSCP, 16, 0x0fc0, ip6, 0, ip_dscp),
31513151
31523152 OFFLOAD(TCP_SPORT, 16, U16_MAX, tcp.source, 0, tcp_sport),
31533153 OFFLOAD(TCP_DPORT, 16, U16_MAX, tcp.dest, 0, tcp_dport),
@@ -3158,21 +3158,31 @@ static struct mlx5_fields fields[] = { · 4 unmodified lines
31583158 OFFLOAD(UDP_DPORT, 16, U16_MAX, udp.dest, 0, udp_dport),
31593159 };
31603160
3161−static unsigned long mask_to_le(unsigned long mask, int size)
3161+static u32 mask_field_get(void *mask, struct mlx5_fields *f)
31623162 {
3163− __be32 mask_be32;
3164− __be16 mask_be16;
3165−
3166− if (size == 32) {
3167− mask_be32 = (__force __be32)(mask);
3168− mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32));
3169− } else if (size == 16) {
3170− mask_be32 = (__force __be32)(mask);
3171− mask_be16 = *(__be16 *)&mask_be32;
3172− mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16));
3163+ switch (f->field_bsize) {
3164+ case 32:
3165+ return be32_to_cpu(*(__be32 *)mask) & f->field_mask;
3166+ case 16:
3167+ return be16_to_cpu(*(__be16 *)mask) & (u16)f->field_mask;
3168+ default:
3169+ return *(u8 *)mask & (u8)f->field_mask;
31733170 }
3171+}
31743172
3175− return mask;
3173+static void mask_field_clear(void *mask, struct mlx5_fields *f)
3174+{
3175+ switch (f->field_bsize) {
3176+ case 32:
3177+ *(__be32 *)mask &= ~cpu_to_be32(f->field_mask);
3178+ break;
3179+ case 16:
3180+ *(__be16 *)mask &= ~cpu_to_be16((u16)f->field_mask);
3181+ break;
3182+ default:
3183+ *(u8 *)mask &= ~(u8)f->field_mask;
3184+ break;
3185+ }
31763186 }
31773187
31783188 static int offload_pedit_fields(struct mlx5e_priv *priv,
@@ -3184,11 +3194,12 @@ static int offload_pedit_fields(struct mlx5e_priv *priv, · 5 unmodified lines
31843194 struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals;
31853195 struct pedit_headers_action *hdrs = parse_attr->hdrs;
31863196 void *headers_c, *headers_v, *action, *vals_p;
3187− u32 *s_masks_p, *a_masks_p, s_mask, a_mask;
31883197 struct mlx5e_tc_mod_hdr_acts *mod_acts;
3189− unsigned long mask, field_mask;
3198+ void *s_masks_p, *a_masks_p;
31903199 int i, first, last, next_z;
31913200 struct mlx5_fields *f;
3201+ unsigned long mask;
3202+ u32 s_mask, a_mask;
31923203 u8 cmd;
31933204
31943205 mod_acts = &parse_attr->mod_hdr_acts;
@@ -3204,15 +3215,11 @@ static int offload_pedit_fields(struct mlx5e_priv *priv, · 9 unmodified lines
32043215 bool skip;
32053216
32063217 f = &fields[i];
3207− /* avoid seeing bits set from previous iterations */
3208− s_mask = 0;
3209− a_mask = 0;
3210−
32113218 s_masks_p = (void *)set_masks + f->offset;
32123219 a_masks_p = (void *)add_masks + f->offset;
32133220
3214− s_mask = *s_masks_p & f->field_mask;
3215− a_mask = *a_masks_p & f->field_mask;
3221+ s_mask = mask_field_get(s_masks_p, f);
3222+ a_mask = mask_field_get(a_masks_p, f);
32163223
32173224 if (!s_mask && !a_mask) /* nothing to offload here */
32183225 continue;
@@ -3239,22 +3246,20 @@ static int offload_pedit_fields(struct mlx5e_priv *priv, · 20 unmodified lines
32393246 match_mask, f->field_bsize))
32403247 skip = true;
32413248 /* clear to denote we consumed this field */
3242− *s_masks_p &= ~f->field_mask;
3249+ mask_field_clear(s_masks_p, f);
32433250 } else {
32443251 cmd = MLX5_ACTION_TYPE_ADD;
32453252 mask = a_mask;
32463253 vals_p = (void *)add_vals + f->offset;
32473254 /* add 0 is no change */
3248− if ((*(u32 *)vals_p & f->field_mask) == 0)
3255+ if (!mask_field_get(vals_p, f))
32493256 skip = true;
32503257 /* clear to denote we consumed this field */
3251− *a_masks_p &= ~f->field_mask;
3258+ mask_field_clear(a_masks_p, f);
32523259 }
32533260 if (skip)
32543261 continue;
32553262
3256− mask = mask_to_le(mask, f->field_bsize);
3257−
32583263 first = find_first_bit(&mask, f->field_bsize);
32593264 next_z = find_next_zero_bit(&mask, f->field_bsize, first);
32603265 last = find_last_bit(&mask, f->field_bsize);
@@ -3281,10 +3286,9 @@ static int offload_pedit_fields(struct mlx5e_priv *priv, · 20 unmodified lines
32813286 MLX5_SET(set_action_in, action, field, f->field);
32823287
32833288 if (cmd == MLX5_ACTION_TYPE_SET) {
3289+ unsigned long field_mask = f->field_mask;
32843290 int start;
32853291
3286− field_mask = mask_to_le(f->field_mask, f->field_bsize);
3287−
32883292 /* if field is bit sized it can start not from first bit */
32893293 start = find_first_bit(&field_mask, f->field_bsize);
32903294
drivers/net/ethernet/mellanox/mlx5/core/en_tx.c+2−2
@@ -399,9 +399,9 @@ mlx5e_txwqe_complete(struct mlx5e_txqsq *sq, struct sk_buff *skb, · 398 unmodified lines
399399 u8 metadata_index = be32_to_cpu(eseg->flow_table_metadata);
400400
401401 mlx5e_skb_cb_hwtstamp_init(skb);
402− mlx5e_ptpsq_track_metadata(sq->ptpsq, metadata_index);
403402 mlx5e_ptp_metadata_map_put(&sq->ptpsq->metadata_map, skb,
404403 metadata_index);
404+ mlx5e_ptpsq_track_metadata(sq->ptpsq, metadata_index);
405405 if (!netif_tx_queue_stopped(sq->txq) &&
406406 mlx5e_ptpsq_metadata_freelist_empty(sq->ptpsq)) {
407407 netif_tx_stop_queue(sq->txq);
@@ -494,10 +494,10 @@ mlx5e_sq_xmit_wqe(struct mlx5e_txqsq *sq, struct sk_buff *skb, · 86 unmodified lines
494494
495495 err_drop:
496496 stats->dropped++;
497− dev_kfree_skb_any(skb);
498497 if (unlikely(sq->ptpsq && (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
499498 mlx5e_ptp_metadata_fifo_push(&sq->ptpsq->metadata_freelist,
500499 be32_to_cpu(eseg->flow_table_metadata));
500+ dev_kfree_skb_any(skb);
501501 mlx5e_tx_flush(sq);
502502 }
503503
drivers/net/ethernet/mellanox/mlx5/core/eq.c+19−6
@@ -885,11 +885,14 @@ static void comp_irq_release_sf(struct mlx5_core_dev *dev, u16 vecidx) · 884 unmodified lines
885885 {
886886 struct mlx5_eq_table *table = dev->priv.eq_table;
887887 struct mlx5_irq *irq;
888+ int cpu;
888889
889890 irq = xa_load(&table->comp_irqs, vecidx);
890891 if (!irq)
891892 return;
892893
894+ cpu = cpumask_first(mlx5_irq_get_affinity_mask(irq));
895+ cpumask_clear_cpu(cpu, &table->used_cpus);
893896 xa_erase(&table->comp_irqs, vecidx);
894897 mlx5_irq_affinity_irq_release(dev, irq);
895898 }
@@ -897,16 +900,26 @@ static void comp_irq_release_sf(struct mlx5_core_dev *dev, u16 vecidx) · 1 unmodified line
897900 static int comp_irq_request_sf(struct mlx5_core_dev *dev, u16 vecidx)
898901 {
899902 struct mlx5_eq_table *table = dev->priv.eq_table;
903+ struct mlx5_irq_pool *pool = mlx5_irq_pool_get(dev);
904+ struct irq_affinity_desc af_desc = {};
900905 struct mlx5_irq *irq;
901906
902− irq = mlx5_irq_affinity_irq_request_auto(dev, &table->used_cpus, vecidx);
903− if (IS_ERR(irq)) {
904− /* In case SF irq pool does not exist, fallback to the PF irqs*/
905− if (PTR_ERR(irq) == -ENOENT)
906− return comp_irq_request_pci(dev, vecidx);
907+ /* In case SF irq pool does not exist, fallback to the PF irqs*/
908+ if (!mlx5_irq_pool_is_sf_pool(pool))
909+ return comp_irq_request_pci(dev, vecidx);
907910
911+ af_desc.is_managed = 1;
912+ cpumask_copy(&af_desc.mask, cpu_online_mask);
913+ cpumask_andnot(&af_desc.mask, &af_desc.mask, &table->used_cpus);
914+ irq = mlx5_irq_affinity_request(pool, &af_desc);
915+ if (IS_ERR(irq))
908916 return PTR_ERR(irq);
909− }
917+
918+ cpumask_or(&table->used_cpus, &table->used_cpus, mlx5_irq_get_affinity_mask(irq));
919+ mlx5_core_dbg(pool->dev, "IRQ %u mapped to cpu %*pbl, %u EQs on this irq\n",
920+ pci_irq_vector(dev->pdev, mlx5_irq_get_index(irq)),
921+ cpumask_pr_args(mlx5_irq_get_affinity_mask(irq)),
922+ mlx5_irq_read_locked(irq) / MLX5_EQ_REFS_PER_IRQ);
910923
911924 return xa_err(xa_store(&table->comp_irqs, vecidx, irq, GFP_KERNEL));
912925 }
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h+0−7
@@ -616,13 +616,6 @@ static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw) · 615 unmodified lines
616616 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
617617 }
618618
619−/* The returned number is valid only when the dev is eswitch manager. */
620−static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
621−{
622− return mlx5_core_is_ecpf_esw_manager(dev) ?
623− MLX5_VPORT_ECPF : MLX5_VPORT_PF;
624−}
625−
626619 static inline bool
627620 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
628621 {
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+2−1
@@ -984,7 +984,8 @@ mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *on_esw, · 983 unmodified lines
984984 dest.vport.flags |= MLX5_FLOW_DEST_VPORT_VHCA_ID;
985985 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
986986
987− if (rep->vport == MLX5_VPORT_UPLINK && on_esw->offloads.ft_ipsec_tx_pol) {
987+ if (rep->vport == MLX5_VPORT_UPLINK &&
988+ on_esw == from_esw && on_esw->offloads.ft_ipsec_tx_pol) {
988989 dest.ft = on_esw->offloads.ft_ipsec_tx_pol;
989990 flow_act.flags = FLOW_ACT_IGNORE_FLOW_LEVEL;
990991 dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
drivers/net/ethernet/mellanox/mlx5/core/irq_affinity.c+0−42
@@ -168,45 +168,3 @@ void mlx5_irq_affinity_irq_release(struct mlx5_core_dev *dev, struct mlx5_irq *i · 167 unmodified lines
168168 if (pool->irqs_per_cpu)
169169 cpu_put(pool, cpu);
170170 }
171−
172−/**
173− * mlx5_irq_affinity_irq_request_auto - request one IRQ for mlx5 device.
174− * @dev: mlx5 device that is requesting the IRQ.
175− * @used_cpus: cpumask of bounded cpus by the device
176− * @vecidx: vector index to request an IRQ for.
177− *
178− * Each IRQ is bounded to at most 1 CPU.
179− * This function is requesting an IRQ according to the default assignment.
180− * The default assignment policy is:
181− * - request the least loaded IRQ which is not bound to any
182− * CPU of the previous IRQs requested.
183− *
184− * On success, this function updates used_cpus mask and returns an irq pointer.
185− * In case of an error, an appropriate error pointer is returned.
186− */
187−struct mlx5_irq *mlx5_irq_affinity_irq_request_auto(struct mlx5_core_dev *dev,
188− struct cpumask *used_cpus, u16 vecidx)
189−{
190− struct mlx5_irq_pool *pool = mlx5_irq_pool_get(dev);
191− struct irq_affinity_desc af_desc = {};
192− struct mlx5_irq *irq;
193−
194− if (!mlx5_irq_pool_is_sf_pool(pool))
195− return ERR_PTR(-ENOENT);
196−
197− af_desc.is_managed = 1;
198− cpumask_copy(&af_desc.mask, cpu_online_mask);
199− cpumask_andnot(&af_desc.mask, &af_desc.mask, used_cpus);
200− irq = mlx5_irq_affinity_request(pool, &af_desc);
201−
202− if (IS_ERR(irq))
203− return irq;
204−
205− cpumask_or(used_cpus, used_cpus, mlx5_irq_get_affinity_mask(irq));
206− mlx5_core_dbg(pool->dev, "IRQ %u mapped to cpu %*pbl, %u EQs on this irq\n",
207− pci_irq_vector(dev->pdev, mlx5_irq_get_index(irq)),
208− cpumask_pr_args(mlx5_irq_get_affinity_mask(irq)),
209− mlx5_irq_read_locked(irq) / MLX5_EQ_REFS_PER_IRQ);
210−
211− return irq;
212−}
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c+6−1
@@ -384,7 +384,12 @@ static int mlx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 383 unmodified lines
384384
385385 static int mlx5_ptp_adjphase(struct ptp_clock_info *ptp, s32 delta)
386386 {
387− return mlx5_ptp_adjtime(ptp, delta);
387+ struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info);
388+ struct mlx5_core_dev *mdev;
389+
390+ mdev = container_of(clock, struct mlx5_core_dev, clock);
391+
392+ return mlx5_ptp_adjtime_real_time(mdev, delta);
388393 }
389394
390395 static int mlx5_ptp_freq_adj_real_time(struct mlx5_core_dev *mdev, long scaled_ppm)
drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c+37−1
@@ -13,11 +13,13 @@ struct mlx5_dm { · 12 unmodified lines
1313 unsigned long *steering_sw_icm_alloc_blocks;
1414 unsigned long *header_modify_sw_icm_alloc_blocks;
1515 unsigned long *header_modify_pattern_sw_icm_alloc_blocks;
16+ unsigned long *header_encap_sw_icm_alloc_blocks;
1617 };
1718
1819 struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev)
1920 {
2021 u64 header_modify_pattern_icm_blocks = 0;
22+ u64 header_sw_encap_icm_blocks = 0;
2123 u64 header_modify_icm_blocks = 0;
2224 u64 steering_icm_blocks = 0;
2325 struct mlx5_dm *dm;
@@ -54,6 +56,17 @@ struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev) · 30 unmodified lines
5456 goto err_modify_hdr;
5557 }
5658
59+ if (MLX5_CAP_DEV_MEM(dev, log_indirect_encap_sw_icm_size)) {
60+ header_sw_encap_icm_blocks =
61+ BIT(MLX5_CAP_DEV_MEM(dev, log_indirect_encap_sw_icm_size) -
62+ MLX5_LOG_SW_ICM_BLOCK_SIZE(dev));
63+
64+ dm->header_encap_sw_icm_alloc_blocks =
65+ bitmap_zalloc(header_sw_encap_icm_blocks, GFP_KERNEL);
66+ if (!dm->header_encap_sw_icm_alloc_blocks)
67+ goto err_pattern;
68+ }
69+
5770 support_v2 = MLX5_CAP_FLOWTABLE_NIC_RX(dev, sw_owner_v2) &&
5871 MLX5_CAP_FLOWTABLE_NIC_TX(dev, sw_owner_v2) &&
5972 MLX5_CAP64_DEV_MEM(dev, header_modify_pattern_sw_icm_start_address);
@@ -66,11 +79,14 @@ struct mlx5_dm *mlx5_dm_create(struct mlx5_core_dev *dev) · 6 unmodified lines
6679 dm->header_modify_pattern_sw_icm_alloc_blocks =
6780 bitmap_zalloc(header_modify_pattern_icm_blocks, GFP_KERNEL);
6881 if (!dm->header_modify_pattern_sw_icm_alloc_blocks)
69− goto err_pattern;
82+ goto err_sw_encap;
7083 }
7184
7285 return dm;
7386
87+err_sw_encap:
88+ bitmap_free(dm->header_encap_sw_icm_alloc_blocks);
89+
7490 err_pattern:
7591 bitmap_free(dm->header_modify_sw_icm_alloc_blocks);
7692
@@ -105,6 +121,14 @@ void mlx5_dm_cleanup(struct mlx5_core_dev *dev) · 28 unmodified lines
105121 bitmap_free(dm->header_modify_sw_icm_alloc_blocks);
106122 }
107123
124+ if (dm->header_encap_sw_icm_alloc_blocks) {
125+ WARN_ON(!bitmap_empty(dm->header_encap_sw_icm_alloc_blocks,
126+ BIT(MLX5_CAP_DEV_MEM(dev,
127+ log_indirect_encap_sw_icm_size) -
128+ MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))));
129+ bitmap_free(dm->header_encap_sw_icm_alloc_blocks);
130+ }
131+
108132 if (dm->header_modify_pattern_sw_icm_alloc_blocks) {
109133 WARN_ON(!bitmap_empty(dm->header_modify_pattern_sw_icm_alloc_blocks,
110134 BIT(MLX5_CAP_DEV_MEM(dev,
@@ -164,6 +188,13 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type, · 53 unmodified lines
164188 log_header_modify_pattern_sw_icm_size);
165189 block_map = dm->header_modify_pattern_sw_icm_alloc_blocks;
166190 break;
191+ case MLX5_SW_ICM_TYPE_SW_ENCAP:
192+ icm_start_addr = MLX5_CAP64_DEV_MEM(dev,
193+ indirect_encap_sw_icm_start_address);
194+ log_icm_size = MLX5_CAP_DEV_MEM(dev,
195+ log_indirect_encap_sw_icm_size);
196+ block_map = dm->header_encap_sw_icm_alloc_blocks;
197+ break;
167198 default:
168199 return -EINVAL;
169200 }
@@ -242,6 +273,11 @@ int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type · 72 unmodified lines
242273 header_modify_pattern_sw_icm_start_address);
243274 block_map = dm->header_modify_pattern_sw_icm_alloc_blocks;
244275 break;
276+ case MLX5_SW_ICM_TYPE_SW_ENCAP:
277+ icm_start_addr = MLX5_CAP64_DEV_MEM(dev,
278+ indirect_encap_sw_icm_start_address);
279+ block_map = dm->header_encap_sw_icm_alloc_blocks;
280+ break;
245281 default:
246282 return -EINVAL;
247283 }
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c+3−3
@@ -28,7 +28,7 @@ · 27 unmodified lines
2828 struct mlx5_irq {
2929 struct atomic_notifier_head nh;
3030 cpumask_var_t mask;
31− char name[MLX5_MAX_IRQ_NAME];
31+ char name[MLX5_MAX_IRQ_FORMATTED_NAME];
3232 struct mlx5_irq_pool *pool;
3333 int refcount;
3434 struct msi_map map;
@@ -292,8 +292,8 @@ struct mlx5_irq *mlx5_irq_alloc(struct mlx5_irq_pool *pool, int i, · 257 unmodified lines
292292 else
293293 irq_sf_set_name(pool, name, i);
294294 ATOMIC_INIT_NOTIFIER_HEAD(&irq->nh);
295− snprintf(irq->name, MLX5_MAX_IRQ_NAME,
296− "%s@pci:%s", name, pci_name(dev->pdev));
295+ snprintf(irq->name, MLX5_MAX_IRQ_FORMATTED_NAME,
296+ MLX5_IRQ_NAME_FORMAT_STR, name, pci_name(dev->pdev));
297297 err = request_irq(irq->map.virq, irq_int_handler, 0, irq->name,
298298 &irq->nh);
299299 if (err) {
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h+3−0
@@ -7,6 +7,9 @@ · 6 unmodified lines
77 #include <linux/mlx5/driver.h>
88
99 #define MLX5_MAX_IRQ_NAME (32)
10+#define MLX5_IRQ_NAME_FORMAT_STR ("%s@pci:%s")
11+#define MLX5_MAX_IRQ_FORMATTED_NAME \
12+ (MLX5_MAX_IRQ_NAME + sizeof(MLX5_IRQ_NAME_FORMAT_STR))
1013 /* max irq_index is 2047, so four chars */
1114 #define MLX5_MAX_IRQ_IDX_CHARS (4)
1215 #define MLX5_EQ_REFS_PER_IRQ (2)
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c+2−1
@@ -57,7 +57,8 @@ static const char *dr_action_id_to_str(enum mlx5dr_action_type action_id) · 56 unmodified lines
5757
5858 static bool mlx5dr_action_supp_fwd_fdb_multi_ft(struct mlx5_core_dev *dev)
5959 {
60− return (MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table_limit_regc) ||
60+ return (MLX5_CAP_GEN(dev, steering_format_version) < MLX5_STEERING_FORMAT_CONNECTX_6DX ||
61+ MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table_limit_regc) ||
6162 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_any_table));
6263 }
6364
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_send.c+13−102
@@ -52,7 +52,6 @@ struct dr_qp_init_attr { · 51 unmodified lines
5252 u32 cqn;
5353 u32 pdn;
5454 u32 max_send_wr;
55− u32 max_send_sge;
5655 struct mlx5_uars_page *uar;
5756 u8 isolate_vl_tc:1;
5857 };
@@ -247,37 +246,6 @@ static int dr_poll_cq(struct mlx5dr_cq *dr_cq, int ne) · 188 unmodified lines
247246 return err == CQ_POLL_ERR ? err : npolled;
248247 }
249248
250−static int dr_qp_get_args_update_send_wqe_size(struct dr_qp_init_attr *attr)
251−{
252− return roundup_pow_of_two(sizeof(struct mlx5_wqe_ctrl_seg) +
253− sizeof(struct mlx5_wqe_flow_update_ctrl_seg) +
254− sizeof(struct mlx5_wqe_header_modify_argument_update_seg));
255−}
256−
257−/* We calculate for specific RC QP with the required functionality */
258−static int dr_qp_calc_rc_send_wqe(struct dr_qp_init_attr *attr)
259−{
260− int update_arg_size;
261− int inl_size = 0;
262− int tot_size;
263− int size;
264−
265− update_arg_size = dr_qp_get_args_update_send_wqe_size(attr);
266−
267− size = sizeof(struct mlx5_wqe_ctrl_seg) +
268− sizeof(struct mlx5_wqe_raddr_seg);
269− inl_size = size + ALIGN(sizeof(struct mlx5_wqe_inline_seg) +
270− DR_STE_SIZE, 16);
271−
272− size += attr->max_send_sge * sizeof(struct mlx5_wqe_data_seg);
273−
274− size = max(size, update_arg_size);
275−
276− tot_size = max(size, inl_size);
277−
278− return ALIGN(tot_size, MLX5_SEND_WQE_BB);
279−}
280−
281249 static struct mlx5dr_qp *dr_create_rc_qp(struct mlx5_core_dev *mdev,
282250 struct dr_qp_init_attr *attr)
283251 {
@@ -285,7 +253,6 @@ static struct mlx5dr_qp *dr_create_rc_qp(struct mlx5_core_dev *mdev, · 1 unmodified line
285253 u32 temp_qpc[MLX5_ST_SZ_DW(qpc)] = {};
286254 struct mlx5_wq_param wqp;
287255 struct mlx5dr_qp *dr_qp;
288− int wqe_size;
289256 int inlen;
290257 void *qpc;
291258 void *in;
@@ -365,15 +332,6 @@ static struct mlx5dr_qp *dr_create_rc_qp(struct mlx5_core_dev *mdev, · 73 unmodified lines
365332 if (err)
366333 goto err_in;
367334 dr_qp->uar = attr->uar;
368− wqe_size = dr_qp_calc_rc_send_wqe(attr);
369− dr_qp->max_inline_data = min(wqe_size -
370− (sizeof(struct mlx5_wqe_ctrl_seg) +
371− sizeof(struct mlx5_wqe_raddr_seg) +
372− sizeof(struct mlx5_wqe_inline_seg)),
373− (2 * MLX5_SEND_WQE_BB -
374− (sizeof(struct mlx5_wqe_ctrl_seg) +
375− sizeof(struct mlx5_wqe_raddr_seg) +
376− sizeof(struct mlx5_wqe_inline_seg))));
377335
378336 return dr_qp;
379337
@@ -437,48 +395,8 @@ dr_rdma_handle_flow_access_arg_segments(struct mlx5_wqe_ctrl_seg *wq_ctrl, · 57 unmodified lines
437395 MLX5_SEND_WQE_DS;
438396 }
439397
440−static int dr_set_data_inl_seg(struct mlx5dr_qp *dr_qp,
441− struct dr_data_seg *data_seg, void *wqe)
442−{
443− int inline_header_size = sizeof(struct mlx5_wqe_ctrl_seg) +
444− sizeof(struct mlx5_wqe_raddr_seg) +
445− sizeof(struct mlx5_wqe_inline_seg);
446− struct mlx5_wqe_inline_seg *seg;
447− int left_space;
448− int inl = 0;
449− void *addr;
450− int len;
451− int idx;
452−
453− seg = wqe;
454− wqe += sizeof(*seg);
455− addr = (void *)(unsigned long)(data_seg->addr);
456− len = data_seg->length;
457− inl += len;
458− left_space = MLX5_SEND_WQE_BB - inline_header_size;
459−
460− if (likely(len > left_space)) {
461− memcpy(wqe, addr, left_space);
462− len -= left_space;
463− addr += left_space;
464− idx = (dr_qp->sq.pc + 1) & (dr_qp->sq.wqe_cnt - 1);
465− wqe = mlx5_wq_cyc_get_wqe(&dr_qp->wq.sq, idx);
466− }
467−
468− memcpy(wqe, addr, len);
469−
470− if (likely(inl)) {
471− seg->byte_count = cpu_to_be32(inl | MLX5_INLINE_SEG);
472− return DIV_ROUND_UP(inl + sizeof(seg->byte_count),
473− MLX5_SEND_WQE_DS);
474− } else {
475− return 0;
476− }
477−}
478−
479398 static void
480−dr_rdma_handle_icm_write_segments(struct mlx5dr_qp *dr_qp,
481− struct mlx5_wqe_ctrl_seg *wq_ctrl,
399+dr_rdma_handle_icm_write_segments(struct mlx5_wqe_ctrl_seg *wq_ctrl,
482400 u64 remote_addr,
483401 u32 rkey,
484402 struct dr_data_seg *data_seg,
@@ -494,17 +412,15 @@ dr_rdma_handle_icm_write_segments(struct mlx5dr_qp *dr_qp, · 9 unmodified lines
494412 wq_raddr->reserved = 0;
495413
496414 wq_dseg = (void *)(wq_raddr + 1);
497− /* WQE ctrl segment + WQE remote addr segment */
498− *size = (sizeof(*wq_ctrl) + sizeof(*wq_raddr)) / MLX5_SEND_WQE_DS;
499415
500− if (data_seg->send_flags & IB_SEND_INLINE) {
501− *size += dr_set_data_inl_seg(dr_qp, data_seg, wq_dseg);
502− } else {
503− wq_dseg->byte_count = cpu_to_be32(data_seg->length);
504− wq_dseg->lkey = cpu_to_be32(data_seg->lkey);
505− wq_dseg->addr = cpu_to_be64(data_seg->addr);
506− *size += sizeof(*wq_dseg) / MLX5_SEND_WQE_DS; /* WQE data segment */
507− }
416+ wq_dseg->byte_count = cpu_to_be32(data_seg->length);
417+ wq_dseg->lkey = cpu_to_be32(data_seg->lkey);
418+ wq_dseg->addr = cpu_to_be64(data_seg->addr);
419+
420+ *size = (sizeof(*wq_ctrl) + /* WQE ctrl segment */
421+ sizeof(*wq_dseg) + /* WQE data segment */
422+ sizeof(*wq_raddr)) / /* WQE remote addr segment */
423+ MLX5_SEND_WQE_DS;
508424 }
509425
510426 static void dr_set_ctrl_seg(struct mlx5_wqe_ctrl_seg *wq_ctrl,
@@ -535,7 +451,7 @@ static void dr_rdma_segments(struct mlx5dr_qp *dr_qp, u64 remote_addr, · 24 unmodified lines
535451 switch (opcode) {
536452 case MLX5_OPCODE_RDMA_READ:
537453 case MLX5_OPCODE_RDMA_WRITE:
538− dr_rdma_handle_icm_write_segments(dr_qp, wq_ctrl, remote_addr,
454+ dr_rdma_handle_icm_write_segments(wq_ctrl, remote_addr,
539455 rkey, data_seg, &size);
540456 break;
541457 case MLX5_OPCODE_FLOW_TBL_ACCESS:
@@ -656,7 +572,7 @@ static void dr_fill_write_args_segs(struct mlx5dr_send_ring *send_ring, · 114 unmodified lines
656572 if (send_ring->pending_wqe % send_ring->signal_th == 0)
657573 send_info->write.send_flags |= IB_SEND_SIGNALED;
658574 else
659− send_info->write.send_flags &= ~IB_SEND_SIGNALED;
575+ send_info->write.send_flags = 0;
660576 }
661577
662578 static void dr_fill_write_icm_segs(struct mlx5dr_domain *dmn,
@@ -680,13 +596,9 @@ static void dr_fill_write_icm_segs(struct mlx5dr_domain *dmn, · 17 unmodified lines
680596 }
681597
682598 send_ring->pending_wqe++;
683− if (!send_info->write.lkey)
684− send_info->write.send_flags |= IB_SEND_INLINE;
685599
686600 if (send_ring->pending_wqe % send_ring->signal_th == 0)
687601 send_info->write.send_flags |= IB_SEND_SIGNALED;
688− else
689− send_info->write.send_flags &= ~IB_SEND_SIGNALED;
690602
691603 send_ring->pending_wqe++;
692604 send_info->read.length = send_info->write.length;
@@ -696,9 +608,9 @@ static void dr_fill_write_icm_segs(struct mlx5dr_domain *dmn, · 3 unmodified lines
696608 send_info->read.lkey = send_ring->sync_mr->mkey;
697609
698610 if (send_ring->pending_wqe % send_ring->signal_th == 0)
699− send_info->read.send_flags |= IB_SEND_SIGNALED;
611+ send_info->read.send_flags = IB_SEND_SIGNALED;
700612 else
701− send_info->read.send_flags &= ~IB_SEND_SIGNALED;
613+ send_info->read.send_flags = 0;
702614 }
703615
704616 static void dr_fill_data_segs(struct mlx5dr_domain *dmn,
@@ -1345,7 +1257,6 @@ int mlx5dr_send_ring_alloc(struct mlx5dr_domain *dmn) · 640 unmodified lines
13451257 dmn->send_ring->cq->qp = dmn->send_ring->qp;
13461258
13471259 dmn->info.max_send_wr = QUEUE_SIZE;
1348− init_attr.max_send_sge = 1;
13491260 dmn->info.max_inline_size = min(dmn->send_ring->qp->max_inline_data,
13501261 DR_STE_SIZE);
13511262
drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+95−32
@@ -160,6 +160,18 @@ struct nfp_tun_mac_addr_offload { · 159 unmodified lines
160160 u8 addr[ETH_ALEN];
161161 };
162162
163+/**
164+ * struct nfp_neigh_update_work - update neighbour information to nfp
165+ * @work: Work queue for writing neigh to the nfp
166+ * @n: neighbour entry
167+ * @app: Back pointer to app
168+ */
169+struct nfp_neigh_update_work {
170+ struct work_struct work;
171+ struct neighbour *n;
172+ struct nfp_app *app;
173+};
174+
163175 enum nfp_flower_mac_offload_cmd {
164176 NFP_TUNNEL_MAC_OFFLOAD_ADD = 0,
165177 NFP_TUNNEL_MAC_OFFLOAD_DEL = 1,
@@ -607,38 +619,30 @@ err: · 441 unmodified lines
607619 nfp_flower_cmsg_warn(app, "Neighbour configuration failed.\n");
608620 }
609621
610−static int
611−nfp_tun_neigh_event_handler(struct notifier_block *nb, unsigned long event,
612− void *ptr)
622+static void
623+nfp_tun_release_neigh_update_work(struct nfp_neigh_update_work *update_work)
613624 {
614− struct nfp_flower_priv *app_priv;
615− struct netevent_redirect *redir;
616− struct neighbour *n;
625+ neigh_release(update_work->n);
626+ kfree(update_work);
627+}
628+
629+static void nfp_tun_neigh_update(struct work_struct *work)
630+{
631+ struct nfp_neigh_update_work *update_work;
617632 struct nfp_app *app;
633+ struct neighbour *n;
618634 bool neigh_invalid;
619635 int err;
620636
621− switch (event) {
622− case NETEVENT_REDIRECT:
623− redir = (struct netevent_redirect *)ptr;
624− n = redir->neigh;
625− break;
626− case NETEVENT_NEIGH_UPDATE:
627− n = (struct neighbour *)ptr;
628− break;
629− default:
630− return NOTIFY_DONE;
631− }
632−
633− neigh_invalid = !(n->nud_state & NUD_VALID) || n->dead;
634−
635− app_priv = container_of(nb, struct nfp_flower_priv, tun.neigh_nb);
636− app = app_priv->app;
637+ update_work = container_of(work, struct nfp_neigh_update_work, work);
638+ app = update_work->app;
639+ n = update_work->n;
637640
638641 if (!nfp_flower_get_port_id_from_netdev(app, n->dev))
639− return NOTIFY_DONE;
642+ goto out;
640643
641644 #if IS_ENABLED(CONFIG_INET)
645+ neigh_invalid = !(n->nud_state & NUD_VALID) || n->dead;
642646 if (n->tbl->family == AF_INET6) {
643647 #if IS_ENABLED(CONFIG_IPV6)
644648 struct flowi6 flow6 = {};
@@ -655,13 +659,11 @@ nfp_tun_neigh_event_handler(struct notifier_block *nb, unsigned long event, · 10 unmodified lines
655659 dst = ip6_dst_lookup_flow(dev_net(n->dev), NULL,
656660 &flow6, NULL);
657661 if (IS_ERR(dst))
658− return NOTIFY_DONE;
662+ goto out;
659663
660664 dst_release(dst);
661665 }
662666 nfp_tun_write_neigh(n->dev, app, &flow6, n, true, false);
663−#else
664− return NOTIFY_DONE;
665667 #endif /* CONFIG_IPV6 */
666668 } else {
667669 struct flowi4 flow4 = {};
@@ -678,17 +680,71 @@ nfp_tun_neigh_event_handler(struct notifier_block *nb, unsigned long event, · 10 unmodified lines
678680 rt = ip_route_output_key(dev_net(n->dev), &flow4);
679681 err = PTR_ERR_OR_ZERO(rt);
680682 if (err)
681− return NOTIFY_DONE;
683+ goto out;
682684
683685 ip_rt_put(rt);
684686 }
685687 nfp_tun_write_neigh(n->dev, app, &flow4, n, false, false);
686688 }
687−#else
688− return NOTIFY_DONE;
689689 #endif /* CONFIG_INET */
690+out:
691+ nfp_tun_release_neigh_update_work(update_work);
692+}
690693
691− return NOTIFY_OK;
694+static struct nfp_neigh_update_work *
695+nfp_tun_alloc_neigh_update_work(struct nfp_app *app, struct neighbour *n)
696+{
697+ struct nfp_neigh_update_work *update_work;
698+
699+ update_work = kzalloc(sizeof(*update_work), GFP_ATOMIC);
700+ if (!update_work)
701+ return NULL;
702+
703+ INIT_WORK(&update_work->work, nfp_tun_neigh_update);
704+ neigh_hold(n);
705+ update_work->n = n;
706+ update_work->app = app;
707+
708+ return update_work;
709+}
710+
711+static int
712+nfp_tun_neigh_event_handler(struct notifier_block *nb, unsigned long event,
713+ void *ptr)
714+{
715+ struct nfp_neigh_update_work *update_work;
716+ struct nfp_flower_priv *app_priv;
717+ struct netevent_redirect *redir;
718+ struct neighbour *n;
719+ struct nfp_app *app;
720+
721+ switch (event) {
722+ case NETEVENT_REDIRECT:
723+ redir = (struct netevent_redirect *)ptr;
724+ n = redir->neigh;
725+ break;
726+ case NETEVENT_NEIGH_UPDATE:
727+ n = (struct neighbour *)ptr;
728+ break;
729+ default:
730+ return NOTIFY_DONE;
731+ }
732+#if IS_ENABLED(CONFIG_IPV6)
733+ if (n->tbl != ipv6_stub->nd_tbl && n->tbl != &arp_tbl)
734+#else
735+ if (n->tbl != &arp_tbl)
736+#endif
737+ return NOTIFY_DONE;
738+
739+ app_priv = container_of(nb, struct nfp_flower_priv, tun.neigh_nb);
740+ app = app_priv->app;
741+ update_work = nfp_tun_alloc_neigh_update_work(app, n);
742+ if (!update_work)
743+ return NOTIFY_DONE;
744+
745+ queue_work(system_highpri_wq, &update_work->work);
746+
747+ return NOTIFY_DONE;
692748 }
693749
694750 void nfp_tunnel_request_route_v4(struct nfp_app *app, struct sk_buff *skb)
@@ -706,6 +762,7 @@ void nfp_tunnel_request_route_v4(struct nfp_app *app, struct sk_buff *skb) · 11 unmodified lines
706762 netdev = nfp_app_dev_get(app, be32_to_cpu(payload->ingress_port), NULL);
707763 if (!netdev)
708764 goto fail_rcu_unlock;
765+ dev_hold(netdev);
709766
710767 flow.daddr = payload->ipv4_addr;
711768 flow.flowi4_proto = IPPROTO_UDP;
@@ -725,13 +782,16 @@ void nfp_tunnel_request_route_v4(struct nfp_app *app, struct sk_buff *skb) · 13 unmodified lines
725782 ip_rt_put(rt);
726783 if (!n)
727784 goto fail_rcu_unlock;
785+ rcu_read_unlock();
786+
728787 nfp_tun_write_neigh(n->dev, app, &flow, n, false, true);
729788 neigh_release(n);
730− rcu_read_unlock();
789+ dev_put(netdev);
731790 return;
732791
733792 fail_rcu_unlock:
734793 rcu_read_unlock();
794+ dev_put(netdev);
735795 nfp_flower_cmsg_warn(app, "Requested route not found.\n");
736796 }
737797
@@ -749,6 +809,7 @@ void nfp_tunnel_request_route_v6(struct nfp_app *app, struct sk_buff *skb) · 11 unmodified lines
749809 netdev = nfp_app_dev_get(app, be32_to_cpu(payload->ingress_port), NULL);
750810 if (!netdev)
751811 goto fail_rcu_unlock;
812+ dev_hold(netdev);
752813
753814 flow.daddr = payload->ipv6_addr;
754815 flow.flowi6_proto = IPPROTO_UDP;
@@ -766,14 +827,16 @@ void nfp_tunnel_request_route_v6(struct nfp_app *app, struct sk_buff *skb) · 11 unmodified lines
766827 dst_release(dst);
767828 if (!n)
768829 goto fail_rcu_unlock;
830+ rcu_read_unlock();
769831
770832 nfp_tun_write_neigh(n->dev, app, &flow, n, true, true);
771833 neigh_release(n);
772− rcu_read_unlock();
834+ dev_put(netdev);
773835 return;
774836
775837 fail_rcu_unlock:
776838 rcu_read_unlock();
839+ dev_put(netdev);
777840 nfp_flower_cmsg_warn(app, "Requested IPv6 route not found.\n");
778841 }
779842
drivers/net/ethernet/pensando/ionic/ionic_dev.h+1−1
@@ -223,7 +223,7 @@ struct ionic_desc_info { · 222 unmodified lines
223223 void *cb_arg;
224224 };
225225
226−#define IONIC_QUEUE_NAME_MAX_SZ 32
226+#define IONIC_QUEUE_NAME_MAX_SZ 16
227227
228228 struct ionic_queue {
229229 struct device *dev;
drivers/net/ethernet/pensando/ionic/ionic_lif.c+8−8
@@ -49,24 +49,24 @@ static void ionic_lif_queue_identify(struct ionic_lif *lif); · 48 unmodified lines
4949 static void ionic_dim_work(struct work_struct *work)
5050 {
5151 struct dim *dim = container_of(work, struct dim, work);
52+ struct ionic_intr_info *intr;
5253 struct dim_cq_moder cur_moder;
5354 struct ionic_qcq *qcq;
55+ struct ionic_lif *lif;
5456 u32 new_coal;
5557
5658 cur_moder = net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
5759 qcq = container_of(dim, struct ionic_qcq, dim);
58− new_coal = ionic_coal_usec_to_hw(qcq->q.lif->ionic, cur_moder.usec);
60+ lif = qcq->q.lif;
61+ new_coal = ionic_coal_usec_to_hw(lif->ionic, cur_moder.usec);
5962 new_coal = new_coal ? new_coal : 1;
6063
61− if (qcq->intr.dim_coal_hw != new_coal) {
62− unsigned int qi = qcq->cq.bound_q->index;
63− struct ionic_lif *lif = qcq->q.lif;
64−
65− qcq->intr.dim_coal_hw = new_coal;
64+ intr = &qcq->intr;
65+ if (intr->dim_coal_hw != new_coal) {
66+ intr->dim_coal_hw = new_coal;
6667
6768 ionic_intr_coal_init(lif->ionic->idev.intr_ctrl,
68− lif->rxqcqs[qi]->intr.index,
69− qcq->intr.dim_coal_hw);
69+ intr->index, intr->dim_coal_hw);
7070 }
7171
7272 dim->state = DIM_START_MEASURE;
drivers/net/ethernet/realtek/r8169_main.c+45−17
@@ -196,6 +196,7 @@ enum rtl_registers { · 195 unmodified lines
196196 /* No threshold before first PCI xfer */
197197 #define RX_FIFO_THRESH (7 << RXCFG_FIFO_SHIFT)
198198 #define RX_EARLY_OFF (1 << 11)
199+#define RX_PAUSE_SLOT_ON (1 << 11) /* 8125b and later */
199200 #define RXCFG_DMA_SHIFT 8
200201 /* Unlimited maximum PCI burst. */
201202 #define RX_DMA_BURST (7 << RXCFG_DMA_SHIFT)
@@ -579,6 +580,7 @@ struct rtl8169_tc_offsets { · 377 unmodified lines
579580 enum rtl_flag {
580581 RTL_FLAG_TASK_ENABLED = 0,
581582 RTL_FLAG_TASK_RESET_PENDING,
583+ RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE,
582584 RTL_FLAG_TASK_TX_TIMEOUT,
583585 RTL_FLAG_MAX
584586 };
@@ -624,6 +626,7 @@ struct rtl8169_private { · 39 unmodified lines
624626
625627 unsigned supports_gmii:1;
626628 unsigned aspm_manageable:1;
629+ unsigned dash_enabled:1;
627630 dma_addr_t counters_phys_addr;
628631 struct rtl8169_counters *counters;
629632 struct rtl8169_tc_offsets tc_offset;
@@ -1253,14 +1256,26 @@ static bool r8168ep_check_dash(struct rtl8169_private *tp) · 623 unmodified lines
12531256 return r8168ep_ocp_read(tp, 0x128) & BIT(0);
12541257 }
12551258
1256−static enum rtl_dash_type rtl_check_dash(struct rtl8169_private *tp)
1259+static bool rtl_dash_is_enabled(struct rtl8169_private *tp)
1260+{
1261+ switch (tp->dash_type) {
1262+ case RTL_DASH_DP:
1263+ return r8168dp_check_dash(tp);
1264+ case RTL_DASH_EP:
1265+ return r8168ep_check_dash(tp);
1266+ default:
1267+ return false;
1268+ }
1269+}
1270+
1271+static enum rtl_dash_type rtl_get_dash_type(struct rtl8169_private *tp)
12571272 {
12581273 switch (tp->mac_version) {
12591274 case RTL_GIGA_MAC_VER_28:
12601275 case RTL_GIGA_MAC_VER_31:
1261− return r8168dp_check_dash(tp) ? RTL_DASH_DP : RTL_DASH_NONE;
1276+ return RTL_DASH_DP;
12621277 case RTL_GIGA_MAC_VER_51 ... RTL_GIGA_MAC_VER_53:
1263− return r8168ep_check_dash(tp) ? RTL_DASH_EP : RTL_DASH_NONE;
1278+ return RTL_DASH_EP;
12641279 default:
12651280 return RTL_DASH_NONE;
12661281 }
@@ -1453,7 +1468,7 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts) · 186 unmodified lines
14531468
14541469 device_set_wakeup_enable(tp_to_dev(tp), wolopts);
14551470
1456− if (tp->dash_type == RTL_DASH_NONE) {
1471+ if (!tp->dash_enabled) {
14571472 rtl_set_d3_pll_down(tp, !wolopts);
14581473 tp->dev->wol_enabled = wolopts ? 1 : 0;
14591474 }
@@ -2292,9 +2307,13 @@ static void rtl_init_rxcfg(struct rtl8169_private *tp) · 832 unmodified lines
22922307 case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_53:
22932308 RTL_W32(tp, RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST | RX_EARLY_OFF);
22942309 break;
2295− case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_63:
2310+ case RTL_GIGA_MAC_VER_61:
22962311 RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST);
22972312 break;
2313+ case RTL_GIGA_MAC_VER_63:
2314+ RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
2315+ RX_PAUSE_SLOT_ON);
2316+ break;
22982317 default:
22992318 RTL_W32(tp, RxConfig, RX128_INT_EN | RX_DMA_BURST);
23002319 break;
@@ -2512,7 +2531,7 @@ static void rtl_wol_enable_rx(struct rtl8169_private *tp) · 211 unmodified lines
25122531
25132532 static void rtl_prepare_power_down(struct rtl8169_private *tp)
25142533 {
2515− if (tp->dash_type != RTL_DASH_NONE)
2534+ if (tp->dash_enabled)
25162535 return;
25172536
25182537 if (tp->mac_version == RTL_GIGA_MAC_VER_32 ||
@@ -2586,9 +2605,7 @@ static void rtl_set_rx_mode(struct net_device *dev) · 67 unmodified lines
25862605 rx_mode &= ~AcceptMulticast;
25872606 } else if (netdev_mc_count(dev) > MC_FILTER_LIMIT ||
25882607 dev->flags & IFF_ALLMULTI ||
2589− tp->mac_version == RTL_GIGA_MAC_VER_35 ||
2590− tp->mac_version == RTL_GIGA_MAC_VER_46 ||
2591− tp->mac_version == RTL_GIGA_MAC_VER_48) {
2608+ tp->mac_version == RTL_GIGA_MAC_VER_35) {
25922609 /* accept all multicasts */
25932610 } else if (netdev_mc_empty(dev)) {
25942611 rx_mode &= ~AcceptMulticast;
@@ -4571,6 +4588,8 @@ static void rtl_task(struct work_struct *work) · 1976 unmodified lines
45714588 reset:
45724589 rtl_reset_work(tp);
45734590 netif_wake_queue(tp->dev);
4591+ } else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
4592+ rtl_reset_work(tp);
45744593 }
45754594 out_unlock:
45764595 rtnl_unlock();
@@ -4604,7 +4623,7 @@ static void r8169_phylink_handler(struct net_device *ndev) · 27 unmodified lines
46044623 } else {
46054624 /* In few cases rx is broken after link-down otherwise */
46064625 if (rtl_is_8125(tp))
4607− rtl_reset_work(tp);
4626+ rtl_schedule_task(tp, RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE);
46084627 pm_runtime_idle(d);
46094628 }
46104629
@@ -4648,10 +4667,16 @@ static void rtl8169_down(struct rtl8169_private *tp) · 37 unmodified lines
46484667 rtl8169_cleanup(tp);
46494668 rtl_disable_exit_l1(tp);
46504669 rtl_prepare_power_down(tp);
4670+
4671+ if (tp->dash_type != RTL_DASH_NONE)
4672+ rtl8168_driver_stop(tp);
46514673 }
46524674
46534675 static void rtl8169_up(struct rtl8169_private *tp)
46544676 {
4677+ if (tp->dash_type != RTL_DASH_NONE)
4678+ rtl8168_driver_start(tp);
4679+
46554680 pci_set_master(tp->pci_dev);
46564681 phy_init_hw(tp->phydev);
46574682 phy_resume(tp->phydev);
@@ -4674,7 +4699,7 @@ static int rtl8169_close(struct net_device *dev) · 16 unmodified lines
46744699 rtl8169_down(tp);
46754700 rtl8169_rx_clear(tp);
46764701
4677− cancel_work_sync(&tp->wk.work);
4702+ cancel_work(&tp->wk.work);
46784703
46794704 free_irq(tp->irq, tp);
46804705
@@ -4869,7 +4894,7 @@ static int rtl8169_runtime_idle(struct device *device) · 188 unmodified lines
48694894 {
48704895 struct rtl8169_private *tp = dev_get_drvdata(device);
48714896
4872− if (tp->dash_type != RTL_DASH_NONE)
4897+ if (tp->dash_enabled)
48734898 return -EBUSY;
48744899
48754900 if (!netif_running(tp->dev) || !netif_carrier_ok(tp->dev))
@@ -4895,8 +4920,7 @@ static void rtl_shutdown(struct pci_dev *pdev) · 19 unmodified lines
48954920 /* Restore original MAC address */
48964921 rtl_rar_set(tp, tp->dev->perm_addr);
48974922
4898− if (system_state == SYSTEM_POWER_OFF &&
4899− tp->dash_type == RTL_DASH_NONE) {
4923+ if (system_state == SYSTEM_POWER_OFF && !tp->dash_enabled) {
49004924 pci_wake_from_d3(pdev, tp->saved_wolopts);
49014925 pci_set_power_state(pdev, PCI_D3hot);
49024926 }
@@ -4909,6 +4933,8 @@ static void rtl_remove_one(struct pci_dev *pdev) · 6 unmodified lines
49094933 if (pci_dev_run_wake(pdev))
49104934 pm_runtime_get_noresume(&pdev->dev);
49114935
4936+ cancel_work_sync(&tp->wk.work);
4937+
49124938 unregister_netdev(tp->dev);
49134939
49144940 if (tp->dash_type != RTL_DASH_NONE)
@@ -5254,7 +5280,8 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 339 unmodified lines
52545280 rc = pci_disable_link_state(pdev, PCIE_LINK_STATE_L1);
52555281 tp->aspm_manageable = !rc;
52565282
5257− tp->dash_type = rtl_check_dash(tp);
5283+ tp->dash_type = rtl_get_dash_type(tp);
5284+ tp->dash_enabled = rtl_dash_is_enabled(tp);
52585285
52595286 tp->cp_cmd = RTL_R16(tp, CPlusCmd) & CPCMD_MASK;
52605287
@@ -5325,7 +5352,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 64 unmodified lines
53255352 /* configure chip for default features */
53265353 rtl8169_set_features(dev, dev->features);
53275354
5328− if (tp->dash_type == RTL_DASH_NONE) {
5355+ if (!tp->dash_enabled) {
53295356 rtl_set_d3_pll_down(tp, true);
53305357 } else {
53315358 rtl_set_d3_pll_down(tp, false);
@@ -5365,7 +5392,8 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 33 unmodified lines
53655392 "ok" : "ko");
53665393
53675394 if (tp->dash_type != RTL_DASH_NONE) {
5368− netdev_info(dev, "DASH enabled\n");
5395+ netdev_info(dev, "DASH %s\n",
5396+ tp->dash_enabled ? "enabled" : "disabled");
53695397 rtl8168_driver_start(tp);
53705398 }
53715399
drivers/net/ethernet/renesas/ravb_main.c+45−24
@@ -515,6 +515,15 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) · 514 unmodified lines
515515 {
516516 struct ravb_private *priv = netdev_priv(ndev);
517517
518+ if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
519+ ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);
520+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
521+ } else {
522+ ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_RGMII, CXR35);
523+ ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
524+ CXR31_SEL_LINK0);
525+ }
526+
518527 /* Receive frame limit set register */
519528 ravb_write(ndev, GBETH_RX_BUFF_MAX + ETH_FCS_LEN, RFLR);
520529
@@ -537,14 +546,6 @@ static void ravb_emac_init_gbeth(struct net_device *ndev) · 16 unmodified lines
537546
538547 /* E-MAC interrupt enable register */
539548 ravb_write(ndev, ECSIPR_ICDIP, ECSIPR);
540−
541− if (priv->phy_interface == PHY_INTERFACE_MODE_MII) {
542− ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1, 0);
543− ravb_write(ndev, (1000 << 16) | CXR35_SEL_XMII_MII, CXR35);
544− } else {
545− ravb_modify(ndev, CXR31, CXR31_SEL_LINK0 | CXR31_SEL_LINK1,
546− CXR31_SEL_LINK0);
547− }
548549 }
549550
550551 static void ravb_emac_init_rcar(struct net_device *ndev)
@@ -1811,19 +1812,20 @@ static int ravb_open(struct net_device *ndev) · 1260 unmodified lines
18111812 if (info->gptp)
18121813 ravb_ptp_init(ndev, priv->pdev);
18131814
1814− netif_tx_start_all_queues(ndev);
1815−
18161815 /* PHY control start */
18171816 error = ravb_phy_start(ndev);
18181817 if (error)
18191818 goto out_ptp_stop;
18201819
1820+ netif_tx_start_all_queues(ndev);
1821+
18211822 return 0;
18221823
18231824 out_ptp_stop:
18241825 /* Stop PTP Clock driver */
18251826 if (info->gptp)
18261827 ravb_ptp_stop(ndev);
1828+ ravb_stop_dma(ndev);
18271829 out_free_irq_mgmta:
18281830 if (!info->multi_irqs)
18291831 goto out_free_irq;
@@ -1874,6 +1876,12 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 44 unmodified lines
18741876 struct net_device *ndev = priv->ndev;
18751877 int error;
18761878
1879+ if (!rtnl_trylock()) {
1880+ usleep_range(1000, 2000);
1881+ schedule_work(&priv->work);
1882+ return;
1883+ }
1884+
18771885 netif_tx_stop_all_queues(ndev);
18781886
18791887 /* Stop PTP Clock driver */
@@ -1907,7 +1915,7 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 27 unmodified lines
19071915 */
19081916 netdev_err(ndev, "%s: ravb_dmac_init() failed, error %d\n",
19091917 __func__, error);
1910− return;
1918+ goto out_unlock;
19111919 }
19121920 ravb_emac_init(ndev);
19131921
@@ -1917,6 +1925,9 @@ out: · 3 unmodified lines
19171925 ravb_ptp_init(ndev, priv->pdev);
19181926
19191927 netif_tx_start_all_queues(ndev);
1928+
1929+out_unlock:
1930+ rtnl_unlock();
19201931 }
19211932
19221933 /* Packet transmit function for Ethernet AVB */
@@ -2645,9 +2656,14 @@ static int ravb_probe(struct platform_device *pdev) · 722 unmodified lines
26452656 ndev->features = info->net_features;
26462657 ndev->hw_features = info->net_hw_features;
26472658
2648− reset_control_deassert(rstc);
2659+ error = reset_control_deassert(rstc);
2660+ if (error)
2661+ goto out_free_netdev;
2662+
26492663 pm_runtime_enable(&pdev->dev);
2650− pm_runtime_get_sync(&pdev->dev);
2664+ error = pm_runtime_resume_and_get(&pdev->dev);
2665+ if (error < 0)
2666+ goto out_rpm_disable;
26512667
26522668 if (info->multi_irqs) {
26532669 if (info->err_mgmt_irqs)
@@ -2872,11 +2888,12 @@ out_disable_gptp_clk: · 218 unmodified lines
28722888 out_disable_refclk:
28732889 clk_disable_unprepare(priv->refclk);
28742890 out_release:
2875− free_netdev(ndev);
2876−
28772891 pm_runtime_put(&pdev->dev);
2892+out_rpm_disable:
28782893 pm_runtime_disable(&pdev->dev);
28792894 reset_control_assert(rstc);
2895+out_free_netdev:
2896+ free_netdev(ndev);
28802897 return error;
28812898 }
28822899
@@ -2886,22 +2903,26 @@ static void ravb_remove(struct platform_device *pdev) · 3 unmodified lines
28862903 struct ravb_private *priv = netdev_priv(ndev);
28872904 const struct ravb_hw_info *info = priv->info;
28882905
2889− /* Stop PTP Clock driver */
2890− if (info->ccc_gac)
2891− ravb_ptp_stop(ndev);
2892−
2893− clk_disable_unprepare(priv->gptp_clk);
2894− clk_disable_unprepare(priv->refclk);
2895−
2896− /* Set reset mode */
2897− ravb_write(ndev, CCC_OPC_RESET, CCC);
28982906 unregister_netdev(ndev);
28992907 if (info->nc_queues)
29002908 netif_napi_del(&priv->napi[RAVB_NC]);
29012909 netif_napi_del(&priv->napi[RAVB_BE]);
2910+
29022911 ravb_mdio_release(priv);
2912+
2913+ /* Stop PTP Clock driver */
2914+ if (info->ccc_gac)
2915+ ravb_ptp_stop(ndev);
2916+
29032917 dma_free_coherent(ndev->dev.parent, priv->desc_bat_size, priv->desc_bat,
29042918 priv->desc_bat_dma);
2919+
2920+ /* Set reset mode */
2921+ ravb_write(ndev, CCC_OPC_RESET, CCC);
2922+
2923+ clk_disable_unprepare(priv->gptp_clk);
2924+ clk_disable_unprepare(priv->refclk);
2925+
29052926 pm_runtime_put_sync(&pdev->dev);
29062927 pm_runtime_disable(&pdev->dev);
29072928 reset_control_assert(priv->rstc);
drivers/net/ethernet/renesas/rswitch.c+13−9
@@ -1504,8 +1504,8 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd · 1503 unmodified lines
15041504 {
15051505 struct rswitch_device *rdev = netdev_priv(ndev);
15061506 struct rswitch_gwca_queue *gq = rdev->tx_queue;
1507+ netdev_tx_t ret = NETDEV_TX_OK;
15071508 struct rswitch_ext_desc *desc;
1508− int ret = NETDEV_TX_OK;
15091509 dma_addr_t dma_addr;
15101510
15111511 if (rswitch_get_num_cur_queues(gq) >= gq->ring_size - 1) {
@@ -1517,10 +1517,8 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd · 5 unmodified lines
15171517 return ret;
15181518
15191519 dma_addr = dma_map_single(ndev->dev.parent, skb->data, skb->len, DMA_TO_DEVICE);
1520− if (dma_mapping_error(ndev->dev.parent, dma_addr)) {
1521− dev_kfree_skb_any(skb);
1522− return ret;
1523− }
1520+ if (dma_mapping_error(ndev->dev.parent, dma_addr))
1521+ goto err_kfree;
15241522
15251523 gq->skbs[gq->cur] = skb;
15261524 desc = &gq->tx_ring[gq->cur];
@@ -1533,10 +1531,8 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd · 6 unmodified lines
15331531 struct rswitch_gwca_ts_info *ts_info;
15341532
15351533 ts_info = kzalloc(sizeof(*ts_info), GFP_ATOMIC);
1536− if (!ts_info) {
1537− dma_unmap_single(ndev->dev.parent, dma_addr, skb->len, DMA_TO_DEVICE);
1538− return -ENOMEM;
1539− }
1534+ if (!ts_info)
1535+ goto err_unmap;
15401536
15411537 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
15421538 rdev->ts_tag++;
@@ -1558,6 +1554,14 @@ static netdev_tx_t rswitch_start_xmit(struct sk_buff *skb, struct net_device *nd · 15 unmodified lines
15581554 gq->cur = rswitch_next_queue_index(gq, true, 1);
15591555 rswitch_modify(rdev->addr, GWTRC(gq->index), 0, BIT(gq->index % 32));
15601556
1557+ return ret;
1558+
1559+err_unmap:
1560+ dma_unmap_single(ndev->dev.parent, dma_addr, skb->len, DMA_TO_DEVICE);
1561+
1562+err_kfree:
1563+ dev_kfree_skb_any(skb);
1564+
15611565 return ret;
15621566 }
15631567
drivers/net/ethernet/stmicro/stmmac/Kconfig+1−1
@@ -280,7 +280,7 @@ config DWMAC_INTEL · 279 unmodified lines
280280 config DWMAC_LOONGSON
281281 tristate "Loongson PCI DWMAC support"
282282 default MACH_LOONGSON64
283− depends on STMMAC_ETH && PCI
283+ depends on (MACH_LOONGSON64 || COMPILE_TEST) && STMMAC_ETH && PCI
284284 depends on COMMON_CLK
285285 help
286286 This selects the LOONGSON PCI bus support for the stmmac driver,
drivers/net/ethernet/stmicro/stmmac/dwmac5.c+19−26
@@ -710,28 +710,22 @@ void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev, · 709 unmodified lines
710710 }
711711 }
712712
713−void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,
713+void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
714+ u32 num_txq, u32 num_rxq,
714715 bool enable)
715716 {
716717 u32 value;
717718
718− if (!enable) {
719− value = readl(ioaddr + MAC_FPE_CTRL_STS);
720−
721− value &= ~EFPE;
722−
723− writel(value, ioaddr + MAC_FPE_CTRL_STS);
724− return;
719+ if (enable) {
720+ cfg->fpe_csr = EFPE;
721+ value = readl(ioaddr + GMAC_RXQ_CTRL1);
722+ value &= ~GMAC_RXQCTRL_FPRQ;
723+ value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT;
724+ writel(value, ioaddr + GMAC_RXQ_CTRL1);
725+ } else {
726+ cfg->fpe_csr = 0;
725727 }
726−
727− value = readl(ioaddr + GMAC_RXQ_CTRL1);
728− value &= ~GMAC_RXQCTRL_FPRQ;
729− value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT;
730− writel(value, ioaddr + GMAC_RXQ_CTRL1);
731−
732− value = readl(ioaddr + MAC_FPE_CTRL_STS);
733− value |= EFPE;
734− writel(value, ioaddr + MAC_FPE_CTRL_STS);
728+ writel(cfg->fpe_csr, ioaddr + MAC_FPE_CTRL_STS);
735729 }
736730
737731 int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev)
@@ -741,6 +735,9 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) · 3 unmodified lines
741735
742736 status = FPE_EVENT_UNKNOWN;
743737
738+ /* Reads from the MAC_FPE_CTRL_STS register should only be performed
739+ * here, since the status flags of MAC_FPE_CTRL_STS are "clear on read"
740+ */
744741 value = readl(ioaddr + MAC_FPE_CTRL_STS);
745742
746743 if (value & TRSP) {
@@ -766,19 +763,15 @@ int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) · 19 unmodified lines
766763 return status;
767764 }
768765
769−void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, enum stmmac_mpacket_type type)
766+void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
767+ enum stmmac_mpacket_type type)
770768 {
771− u32 value;
769+ u32 value = cfg->fpe_csr;
772770
773− value = readl(ioaddr + MAC_FPE_CTRL_STS);
774−
775− if (type == MPACKET_VERIFY) {
776− value &= ~SRSP;
771+ if (type == MPACKET_VERIFY)
777772 value |= SVER;
778− } else {
779− value &= ~SVER;
773+ else if (type == MPACKET_RESPONSE)
780774 value |= SRSP;
781− }
782775
783776 writel(value, ioaddr + MAC_FPE_CTRL_STS);
784777 }
drivers/net/ethernet/stmicro/stmmac/dwmac5.h+3−1
@@ -153,9 +153,11 @@ int dwmac5_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg, · 152 unmodified lines
153153 unsigned int ptp_rate);
154154 void dwmac5_est_irq_status(void __iomem *ioaddr, struct net_device *dev,
155155 struct stmmac_extra_stats *x, u32 txqcnt);
156−void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,
156+void dwmac5_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
157+ u32 num_txq, u32 num_rxq,
157158 bool enable);
158159 void dwmac5_fpe_send_mpacket(void __iomem *ioaddr,
160+ struct stmmac_fpe_cfg *cfg,
159161 enum stmmac_mpacket_type type);
160162 int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev);
161163
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c+2−1
@@ -1484,7 +1484,8 @@ static int dwxgmac3_est_configure(void __iomem *ioaddr, struct stmmac_est *cfg, · 1483 unmodified lines
14841484 return 0;
14851485 }
14861486
1487−static void dwxgmac3_fpe_configure(void __iomem *ioaddr, u32 num_txq,
1487+static void dwxgmac3_fpe_configure(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
1488+ u32 num_txq,
14881489 u32 num_rxq, bool enable)
14891490 {
14901491 u32 value;
drivers/net/ethernet/stmicro/stmmac/hwif.h+3−1
@@ -412,9 +412,11 @@ struct stmmac_ops { · 411 unmodified lines
412412 unsigned int ptp_rate);
413413 void (*est_irq_status)(void __iomem *ioaddr, struct net_device *dev,
414414 struct stmmac_extra_stats *x, u32 txqcnt);
415− void (*fpe_configure)(void __iomem *ioaddr, u32 num_txq, u32 num_rxq,
415+ void (*fpe_configure)(void __iomem *ioaddr, struct stmmac_fpe_cfg *cfg,
416+ u32 num_txq, u32 num_rxq,
416417 bool enable);
417418 void (*fpe_send_mpacket)(void __iomem *ioaddr,
419+ struct stmmac_fpe_cfg *cfg,
418420 enum stmmac_mpacket_type type);
419421 int (*fpe_irq_status)(void __iomem *ioaddr, struct net_device *dev);
420422 };
drivers/net/ethernet/stmicro/stmmac/mmc_core.c+4−0
@@ -177,8 +177,10 @@ · 176 unmodified lines
177177 #define MMC_XGMAC_RX_DISCARD_OCT_GB 0x1b4
178178 #define MMC_XGMAC_RX_ALIGN_ERR_PKT 0x1bc
179179
180+#define MMC_XGMAC_TX_FPE_INTR_MASK 0x204
180181 #define MMC_XGMAC_TX_FPE_FRAG 0x208
181182 #define MMC_XGMAC_TX_HOLD_REQ 0x20c
183+#define MMC_XGMAC_RX_FPE_INTR_MASK 0x224
182184 #define MMC_XGMAC_RX_PKT_ASSEMBLY_ERR 0x228
183185 #define MMC_XGMAC_RX_PKT_SMD_ERR 0x22c
184186 #define MMC_XGMAC_RX_PKT_ASSEMBLY_OK 0x230
@@ -352,6 +354,8 @@ static void dwxgmac_mmc_intr_all_mask(void __iomem *mmcaddr) · 167 unmodified lines
352354 {
353355 writel(0x0, mmcaddr + MMC_RX_INTR_MASK);
354356 writel(0x0, mmcaddr + MMC_TX_INTR_MASK);
357+ writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_TX_FPE_INTR_MASK);
358+ writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_FPE_INTR_MASK);
355359 writel(MMC_DEFAULT_MASK, mmcaddr + MMC_XGMAC_RX_IPC_INTR_MASK);
356360 }
357361
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+9−2
@@ -964,7 +964,8 @@ static void stmmac_fpe_link_state_handle(struct stmmac_priv *priv, bool is_up) · 963 unmodified lines
964964 bool *hs_enable = &fpe_cfg->hs_enable;
965965
966966 if (is_up && *hs_enable) {
967− stmmac_fpe_send_mpacket(priv, priv->ioaddr, MPACKET_VERIFY);
967+ stmmac_fpe_send_mpacket(priv, priv->ioaddr, fpe_cfg,
968+ MPACKET_VERIFY);
968969 } else {
969970 *lo_state = FPE_STATE_OFF;
970971 *lp_state = FPE_STATE_OFF;
@@ -5293,6 +5294,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) · 4322 unmodified lines
52935294
52945295 dma_dir = page_pool_get_dma_dir(rx_q->page_pool);
52955296 buf_sz = DIV_ROUND_UP(priv->dma_conf.dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
5297+ limit = min(priv->dma_conf.dma_rx_size - 1, (unsigned int)limit);
52965298
52975299 if (netif_msg_rx_status(priv)) {
52985300 void *rx_head;
@@ -5328,10 +5330,10 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) · 29 unmodified lines
53285330 len = 0;
53295331 }
53305332
5333+read_again:
53315334 if (count >= limit)
53325335 break;
53335336
5334−read_again:
53355337 buf1_len = 0;
53365338 buf2_len = 0;
53375339 entry = next_entry;
@@ -5838,6 +5840,7 @@ static void stmmac_fpe_event_status(struct stmmac_priv *priv, int status) · 500 unmodified lines
58385840 /* If user has requested FPE enable, quickly response */
58395841 if (*hs_enable)
58405842 stmmac_fpe_send_mpacket(priv, priv->ioaddr,
5843+ fpe_cfg,
58415844 MPACKET_RESPONSE);
58425845 }
58435846
@@ -7262,6 +7265,7 @@ static void stmmac_fpe_lp_task(struct work_struct *work) · 1418 unmodified lines
72627265 if (*lo_state == FPE_STATE_ENTERING_ON &&
72637266 *lp_state == FPE_STATE_ENTERING_ON) {
72647267 stmmac_fpe_configure(priv, priv->ioaddr,
7268+ fpe_cfg,
72657269 priv->plat->tx_queues_to_use,
72667270 priv->plat->rx_queues_to_use,
72677271 *enable);
@@ -7280,6 +7284,7 @@ static void stmmac_fpe_lp_task(struct work_struct *work) · 12 unmodified lines
72807284 netdev_info(priv->dev, SEND_VERIFY_MPAKCET_FMT,
72817285 *lo_state, *lp_state);
72827286 stmmac_fpe_send_mpacket(priv, priv->ioaddr,
7287+ fpe_cfg,
72837288 MPACKET_VERIFY);
72847289 }
72857290 /* Sleep then retry */
@@ -7294,6 +7299,7 @@ void stmmac_fpe_handshake(struct stmmac_priv *priv, bool enable) · 8 unmodified lines
72947299 if (priv->plat->fpe_cfg->hs_enable != enable) {
72957300 if (enable) {
72967301 stmmac_fpe_send_mpacket(priv, priv->ioaddr,
7302+ priv->plat->fpe_cfg,
72977303 MPACKET_VERIFY);
72987304 } else {
72997305 priv->plat->fpe_cfg->lo_fpe_state = FPE_STATE_OFF;
@@ -7754,6 +7760,7 @@ int stmmac_suspend(struct device *dev) · 454 unmodified lines
77547760 if (priv->dma_cap.fpesel) {
77557761 /* Disable FPE */
77567762 stmmac_fpe_configure(priv, priv->ioaddr,
7763+ priv->plat->fpe_cfg,
77577764 priv->plat->tx_queues_to_use,
77587765 priv->plat->rx_queues_to_use, false);
77597766
drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c+1−0
@@ -1079,6 +1079,7 @@ disable: · 1078 unmodified lines
10791079
10801080 priv->plat->fpe_cfg->enable = false;
10811081 stmmac_fpe_configure(priv, priv->ioaddr,
1082+ priv->plat->fpe_cfg,
10821083 priv->plat->tx_queues_to_use,
10831084 priv->plat->rx_queues_to_use,
10841085 false);
drivers/net/ethernet/ti/icssg/icssg_prueth.c+10−5
@@ -2063,7 +2063,7 @@ static int prueth_probe(struct platform_device *pdev) · 2062 unmodified lines
20632063 &prueth->shram);
20642064 if (ret) {
20652065 dev_err(dev, "unable to get PRUSS SHRD RAM2: %d\n", ret);
2066− pruss_put(prueth->pruss);
2066+ goto put_pruss;
20672067 }
20682068
20692069 prueth->sram_pool = of_gen_pool_get(np, "sram", 0);
@@ -2105,10 +2105,7 @@ static int prueth_probe(struct platform_device *pdev) · 35 unmodified lines
21052105 prueth->iep1 = icss_iep_get_idx(np, 1);
21062106 if (IS_ERR(prueth->iep1)) {
21072107 ret = dev_err_probe(dev, PTR_ERR(prueth->iep1), "iep1 get failed\n");
2108− icss_iep_put(prueth->iep0);
2109− prueth->iep0 = NULL;
2110− prueth->iep1 = NULL;
2111− goto free_pool;
2108+ goto put_iep0;
21122109 }
21132110
21142111 if (prueth->pdata.quirk_10m_link_issue) {
@@ -2205,6 +2202,12 @@ netdev_exit: · 90 unmodified lines
22052202 exit_iep:
22062203 if (prueth->pdata.quirk_10m_link_issue)
22072204 icss_iep_exit_fw(prueth->iep1);
2205+ icss_iep_put(prueth->iep1);
2206+
2207+put_iep0:
2208+ icss_iep_put(prueth->iep0);
2209+ prueth->iep0 = NULL;
2210+ prueth->iep1 = NULL;
22082211
22092212 free_pool:
22102213 gen_pool_free(prueth->sram_pool,
@@ -2212,6 +2215,8 @@ free_pool: · 1 unmodified line
22122215
22132216 put_mem:
22142217 pruss_release_mem_region(prueth->pruss, &prueth->shram);
2218+
2219+put_pruss:
22152220 pruss_put(prueth->pruss);
22162221
22172222 put_cores:
drivers/net/ethernet/wangxun/libwx/wx_hw.c+5−3
@@ -1769,10 +1769,12 @@ int wx_sw_init(struct wx *wx) · 1768 unmodified lines
17691769 wx->subsystem_device_id = pdev->subsystem_device;
17701770 } else {
17711771 err = wx_flash_read_dword(wx, 0xfffdc, &ssid);
1772− if (!err)
1773− wx->subsystem_device_id = swab16((u16)ssid);
1772+ if (err < 0) {
1773+ wx_err(wx, "read of internal subsystem device id failed\n");
1774+ return err;
1775+ }
17741776
1775− return err;
1777+ wx->subsystem_device_id = swab16((u16)ssid);
17761778 }
17771779
17781780 wx->mac_table = kcalloc(wx->mac.num_rar_entries,
drivers/net/ethernet/wangxun/libwx/wx_lib.c+1−1
@@ -1972,11 +1972,11 @@ void wx_reset_interrupt_capability(struct wx *wx) · 1971 unmodified lines
19721972 if (!pdev->msi_enabled && !pdev->msix_enabled)
19731973 return;
19741974
1975− pci_free_irq_vectors(wx->pdev);
19761975 if (pdev->msix_enabled) {
19771976 kfree(wx->msix_entries);
19781977 wx->msix_entries = NULL;
19791978 }
1979+ pci_free_irq_vectors(wx->pdev);
19801980 }
19811981 EXPORT_SYMBOL(wx_reset_interrupt_capability);
19821982
drivers/net/ethernet/wangxun/ngbe/ngbe_main.c+1−3
@@ -121,10 +121,8 @@ static int ngbe_sw_init(struct wx *wx) · 120 unmodified lines
121121
122122 /* PCI config space info */
123123 err = wx_sw_init(wx);
124− if (err < 0) {
125− wx_err(wx, "read of internal subsystem device id failed\n");
124+ if (err < 0)
126125 return err;
127− }
128126
129127 /* mac type, phy type , oem type */
130128 ngbe_init_type_code(wx);
drivers/net/ethernet/wangxun/txgbe/txgbe_main.c+1−3
@@ -364,10 +364,8 @@ static int txgbe_sw_init(struct wx *wx) · 363 unmodified lines
364364
365365 /* PCI config space info */
366366 err = wx_sw_init(wx);
367− if (err < 0) {
368− wx_err(wx, "read of internal subsystem device id failed\n");
367+ if (err < 0)
369368 return err;
370− }
371369
372370 txgbe_init_type_code(wx);
373371
drivers/net/ethernet/xilinx/xilinx_axienet_main.c+1−1
@@ -822,7 +822,7 @@ axienet_start_xmit(struct sk_buff *skb, struct net_device *ndev) · 821 unmodified lines
822822 if (lp->features & XAE_FEATURE_FULL_TX_CSUM) {
823823 /* Tx Full Checksum Offload Enabled */
824824 cur_p->app0 |= 2;
825− } else if (lp->features & XAE_FEATURE_PARTIAL_RX_CSUM) {
825+ } else if (lp->features & XAE_FEATURE_PARTIAL_TX_CSUM) {
826826 csum_start_off = skb_transport_offset(skb);
827827 csum_index_off = csum_start_off + skb->csum_offset;
828828 /* Tx Partial Checksum Offload Enabled */
drivers/net/hyperv/Kconfig+1−0
@@ -3,5 +3,6 @@ config HYPERV_NET · 2 unmodified lines
33 tristate "Microsoft Hyper-V virtual network driver"
44 depends on HYPERV
55 select UCS2_STRING
6+ select NLS
67 help
78 Select this option to enable the Hyper-V virtual network driver.
drivers/net/hyperv/netvsc_drv.c+45−21
@@ -2206,9 +2206,6 @@ static int netvsc_vf_join(struct net_device *vf_netdev, · 2205 unmodified lines
22062206 goto upper_link_failed;
22072207 }
22082208
2209− /* set slave flag before open to prevent IPv6 addrconf */
2210− vf_netdev->flags |= IFF_SLAVE;
2211−
22122209 schedule_delayed_work(&ndev_ctx->vf_takeover, VF_TAKEOVER_INT);
22132210
22142211 call_netdevice_notifiers(NETDEV_JOIN, vf_netdev);
@@ -2315,16 +2312,18 @@ static struct net_device *get_netvsc_byslot(const struct net_device *vf_netdev) · 100 unmodified lines
23152312

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