Pull staging/IIO fixes from Greg KH: "Here are a number of small staging and IIO driver fixes for reported issues for 5.5-rc2 Nothing major, a bunch of tiny IIO driver issues resolved, and some staging driver fixes for things that people ran into with 5.5-rc1. Full details are in the shortlog. All of these have been in linux-next with no reported issues" * tag 'staging-5.5-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (28 commits) fbtft: Fix the initialization from property algorithm staging: rtl8712: fix interface sanity check staging: rtl8188eu: fix interface sanity check staging: gigaset: add endpoint-type sanity check staging: gigaset: fix illegal free on probe errors staging: gigaset: fix general protection fault on probe staging: vchiq: call unregister_chrdev_region() when driver registration fails staging: exfat: fix multiple definition error of `rename_file' staging/wlan-ng: add CRC32 dependency in Kconfig staging: hp100: Fix build error without ETHERNET staging: fbtft: Do not hardcode SPI CS polarity inversion staging: exfat: properly support discard in clr_alloc_bitmap() staging/octeon: Mark Ethernet driver as BROKEN iio: adc: max9611: Fix too short conversion time delay iio: ad7949: fix channels mixups iio: imu: st_lsm6dsx: do not power-off accel if events are enabled iio: imu: st_lsm6dsx: track hw FIFO buffering with fifo_mask iio: imu: st_lsm6dsx: fix decimation factor estimation iio: imu: inv_mpu6050: fix temperature reporting using bad unit iio: humidity: hdc100x: fix IIO_HUMIDITYRELATIVE channel reporting ...
Unified · Split
| @@ -1,4 +1,4 @@ | ||
| 1 | −# SPDX-License-Identifier: GPL-2.0-only | |
| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) | |
| 2 | 2 | %YAML 1.2 |
| 3 | 3 | --- |
| 4 | 4 | $id: http://devicetree.org/schemas/iio/adc/adi,ad7292.yaml# |
| @@ -53,7 +53,8 @@ patternProperties: · 48 unmodified lines | ||
| 53 | 53 | description: | |
| 54 | 54 | The channel number. It can have up to 8 channels numbered from 0 to 7. |
| 55 | 55 | items: |
| 56 | − maximum: 7 | |
| 56 | + - minimum: 0 | |
| 57 | + maximum: 7 | |
| 57 | 58 | |
| 58 | 59 | diff-channels: |
| 59 | 60 | description: see Documentation/devicetree/bindings/iio/adc/adc.txt |
| @@ -992,6 +992,7 @@ static const struct iio_trigger_ops st_accel_trigger_ops = { · 991 unmodified lines | ||
| 992 | 992 | #define ST_ACCEL_TRIGGER_OPS NULL |
| 993 | 993 | #endif |
| 994 | 994 | |
| 995 | +#ifdef CONFIG_ACPI | |
| 995 | 996 | static const struct iio_mount_matrix * |
| 996 | 997 | get_mount_matrix(const struct iio_dev *indio_dev, |
| 997 | 998 | const struct iio_chan_spec *chan) |
| @@ -1012,7 +1013,6 @@ static const struct iio_chan_spec_ext_info mount_matrix_ext_info[] = { · 14 unmodified lines | ||
| 1012 | 1013 | static int apply_acpi_orientation(struct iio_dev *indio_dev, |
| 1013 | 1014 | struct iio_chan_spec *channels) |
| 1014 | 1015 | { |
| 1015 | −#ifdef CONFIG_ACPI | |
| 1016 | 1016 | struct st_sensor_data *adata = iio_priv(indio_dev); |
| 1017 | 1017 | struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL}; |
| 1018 | 1018 | struct acpi_device *adev; |
| @@ -1140,10 +1140,14 @@ static int apply_acpi_orientation(struct iio_dev *indio_dev, · 121 unmodified lines | ||
| 1140 | 1140 | out: |
| 1141 | 1141 | kfree(buffer.pointer); |
| 1142 | 1142 | return ret; |
| 1143 | +} | |
| 1143 | 1144 | #else /* !CONFIG_ACPI */ |
| 1145 | +static int apply_acpi_orientation(struct iio_dev *indio_dev, | |
| 1146 | + struct iio_chan_spec *channels) | |
| 1147 | +{ | |
| 1144 | 1148 | return 0; |
| 1145 | −#endif | |
| 1146 | 1149 | } |
| 1150 | +#endif | |
| 1147 | 1151 | |
| 1148 | 1152 | /* |
| 1149 | 1153 | * st_accel_get_settings() - get sensor settings from device name |
| @@ -39,6 +39,8 @@ · 38 unmodified lines | ||
| 39 | 39 | #define AD7124_STATUS_POR_FLAG_MSK BIT(4) |
| 40 | 40 | |
| 41 | 41 | /* AD7124_ADC_CONTROL */ |
| 42 | +#define AD7124_ADC_CTRL_REF_EN_MSK BIT(8) | |
| 43 | +#define AD7124_ADC_CTRL_REF_EN(x) FIELD_PREP(AD7124_ADC_CTRL_REF_EN_MSK, x) | |
| 42 | 44 | #define AD7124_ADC_CTRL_PWR_MSK GENMASK(7, 6) |
| 43 | 45 | #define AD7124_ADC_CTRL_PWR(x) FIELD_PREP(AD7124_ADC_CTRL_PWR_MSK, x) |
| 44 | 46 | #define AD7124_ADC_CTRL_MODE_MSK GENMASK(5, 2) |
| @@ -424,7 +426,10 @@ static int ad7124_init_channel_vref(struct ad7124_state *st, · 379 unmodified lines | ||
| 424 | 426 | break; |
| 425 | 427 | case AD7124_INT_REF: |
| 426 | 428 | st->channel_config[channel_number].vref_mv = 2500; |
| 427 | − break; | |
| 429 | + st->adc_control &= ~AD7124_ADC_CTRL_REF_EN_MSK; | |
| 430 | + st->adc_control |= AD7124_ADC_CTRL_REF_EN(1); | |
| 431 | + return ad_sd_write_reg(&st->sd, AD7124_ADC_CONTROL, | |
| 432 | + 2, st->adc_control); | |
| 428 | 433 | default: |
| 429 | 434 | dev_err(&st->sd.spi->dev, "Invalid reference %d\n", refsel); |
| 430 | 435 | return -EINVAL; |
| @@ -85,7 +85,7 @@ err_unlock: · 84 unmodified lines | ||
| 85 | 85 | |
| 86 | 86 | static int ad7606_read_samples(struct ad7606_state *st) |
| 87 | 87 | { |
| 88 | − unsigned int num = st->chip_info->num_channels; | |
| 88 | + unsigned int num = st->chip_info->num_channels - 1; | |
| 89 | 89 | u16 *data = st->data; |
| 90 | 90 | int ret; |
| 91 | 91 | |
| @@ -89,6 +89,7 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, · 88 unmodified lines | ||
| 89 | 89 | unsigned int channel) |
| 90 | 90 | { |
| 91 | 91 | int ret; |
| 92 | + int i; | |
| 92 | 93 | int bits_per_word = ad7949_adc->resolution; |
| 93 | 94 | int mask = GENMASK(ad7949_adc->resolution, 0); |
| 94 | 95 | struct spi_message msg; |
| @@ -100,12 +101,23 @@ static int ad7949_spi_read_channel(struct ad7949_adc_chip *ad7949_adc, int *val, · 5 unmodified lines | ||
| 100 | 101 | }, |
| 101 | 102 | }; |
| 102 | 103 | |
| 103 | − ret = ad7949_spi_write_cfg(ad7949_adc, | |
| 104 | − channel << AD7949_OFFSET_CHANNEL_SEL, | |
| 105 | − AD7949_MASK_CHANNEL_SEL); | |
| 106 | − if (ret) | |
| 107 | − return ret; | |
| 104 | + /* | |
| 105 | + * 1: write CFG for sample N and read old data (sample N-2) | |
| 106 | + * 2: if CFG was not changed since sample N-1 then we'll get good data | |
| 107 | + * at the next xfer, so we bail out now, otherwise we write something | |
| 108 | + * and we read garbage (sample N-1 configuration). | |
| 109 | + */ | |
| 110 | + for (i = 0; i < 2; i++) { | |
| 111 | + ret = ad7949_spi_write_cfg(ad7949_adc, | |
| 112 | + channel << AD7949_OFFSET_CHANNEL_SEL, | |
| 113 | + AD7949_MASK_CHANNEL_SEL); | |
| 114 | + if (ret) | |
| 115 | + return ret; | |
| 116 | + if (channel == ad7949_adc->current_channel) | |
| 117 | + break; | |
| 118 | + } | |
| 108 | 119 | |
| 120 | + /* 3: write something and read actual data */ | |
| 109 | 121 | ad7949_adc->buffer = 0; |
| 110 | 122 | spi_message_init_with_transfers(&msg, tx, 1); |
| 111 | 123 | ret = spi_sync(ad7949_adc->spi, &msg); |
| @@ -185,7 +185,7 @@ static int mrfld_adc_probe(struct platform_device *pdev) · 184 unmodified lines | ||
| 185 | 185 | int irq; |
| 186 | 186 | int ret; |
| 187 | 187 | |
| 188 | − indio_dev = devm_iio_device_alloc(dev, sizeof(*indio_dev)); | |
| 188 | + indio_dev = devm_iio_device_alloc(dev, sizeof(struct mrfld_adc)); | |
| 189 | 189 | if (!indio_dev) |
| 190 | 190 | return -ENOMEM; |
| 191 | 191 | |
| @@ -478,7 +478,13 @@ static int max1027_probe(struct spi_device *spi) · 477 unmodified lines | ||
| 478 | 478 | st->trig->ops = &max1027_trigger_ops; |
| 479 | 479 | st->trig->dev.parent = &spi->dev; |
| 480 | 480 | iio_trigger_set_drvdata(st->trig, indio_dev); |
| 481 | − iio_trigger_register(st->trig); | |
| 481 | + ret = devm_iio_trigger_register(&indio_dev->dev, | |
| 482 | + st->trig); | |
| 483 | + if (ret < 0) { | |
| 484 | + dev_err(&indio_dev->dev, | |
| 485 | + "Failed to register iio trigger\n"); | |
| 486 | + return ret; | |
| 487 | + } | |
| 482 | 488 | |
| 483 | 489 | ret = devm_request_threaded_irq(&spi->dev, spi->irq, |
| 484 | 490 | iio_trigger_generic_data_rdy_poll, |
| @@ -89,6 +89,12 @@ · 88 unmodified lines | ||
| 89 | 89 | #define MAX9611_TEMP_SCALE_NUM 1000000 |
| 90 | 90 | #define MAX9611_TEMP_SCALE_DIV 2083 |
| 91 | 91 | |
| 92 | +/* | |
| 93 | + * Conversion time is 2 ms (typically) at Ta=25 degreeC | |
| 94 | + * No maximum value is known, so play it safe. | |
| 95 | + */ | |
| 96 | +#define MAX9611_CONV_TIME_US_RANGE 3000, 3300 | |
| 97 | + | |
| 92 | 98 | struct max9611_dev { |
| 93 | 99 | struct device *dev; |
| 94 | 100 | struct i2c_client *i2c_client; |
| @@ -236,11 +242,9 @@ static int max9611_read_single(struct max9611_dev *max9611, · 141 unmodified lines | ||
| 236 | 242 | return ret; |
| 237 | 243 | } |
| 238 | 244 | |
| 239 | − /* | |
| 240 | − * need a delay here to make register configuration | |
| 241 | − * stabilize. 1 msec at least, from empirical testing. | |
| 242 | − */ | |
| 243 | − usleep_range(1000, 2000); | |
| 245 | + /* need a delay here to make register configuration stabilize. */ | |
| 246 | + | |
| 247 | + usleep_range(MAX9611_CONV_TIME_US_RANGE); | |
| 244 | 248 | |
| 245 | 249 | ret = i2c_smbus_read_word_swapped(max9611->i2c_client, reg_addr); |
| 246 | 250 | if (ret < 0) { |
| @@ -507,7 +511,7 @@ static int max9611_init(struct max9611_dev *max9611) · 260 unmodified lines | ||
| 507 | 511 | MAX9611_REG_CTRL2, 0); |
| 508 | 512 | return ret; |
| 509 | 513 | } |
| 510 | − usleep_range(1000, 2000); | |
| 514 | + usleep_range(MAX9611_CONV_TIME_US_RANGE); | |
| 511 | 515 | |
| 512 | 516 | return 0; |
| 513 | 517 | } |
| @@ -229,7 +229,7 @@ static int hdc100x_read_raw(struct iio_dev *indio_dev, · 228 unmodified lines | ||
| 229 | 229 | *val2 = 65536; |
| 230 | 230 | return IIO_VAL_FRACTIONAL; |
| 231 | 231 | } else { |
| 232 | − *val = 100; | |
| 232 | + *val = 100000; | |
| 233 | 233 | *val2 = 65536; |
| 234 | 234 | return IIO_VAL_FRACTIONAL; |
| 235 | 235 | } |
| @@ -117,6 +117,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 116 unmodified lines | ||
| 117 | 117 | .reg = ®_set_6050, |
| 118 | 118 | .config = &chip_config_6050, |
| 119 | 119 | .fifo_size = 1024, |
| 120 | + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, | |
| 120 | 121 | }, |
| 121 | 122 | { |
| 122 | 123 | .whoami = INV_MPU6500_WHOAMI_VALUE, |
| @@ -124,6 +125,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 124 | 125 | .reg = ®_set_6500, |
| 125 | 126 | .config = &chip_config_6050, |
| 126 | 127 | .fifo_size = 512, |
| 128 | + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, | |
| 127 | 129 | }, |
| 128 | 130 | { |
| 129 | 131 | .whoami = INV_MPU6515_WHOAMI_VALUE, |
| @@ -131,6 +133,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 131 | 133 | .reg = ®_set_6500, |
| 132 | 134 | .config = &chip_config_6050, |
| 133 | 135 | .fifo_size = 512, |
| 136 | + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, | |
| 134 | 137 | }, |
| 135 | 138 | { |
| 136 | 139 | .whoami = INV_MPU6000_WHOAMI_VALUE, |
| @@ -138,6 +141,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 138 | 141 | .reg = ®_set_6050, |
| 139 | 142 | .config = &chip_config_6050, |
| 140 | 143 | .fifo_size = 1024, |
| 144 | + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, | |
| 141 | 145 | }, |
| 142 | 146 | { |
| 143 | 147 | .whoami = INV_MPU9150_WHOAMI_VALUE, |
| @@ -145,6 +149,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 145 | 149 | .reg = ®_set_6050, |
| 146 | 150 | .config = &chip_config_6050, |
| 147 | 151 | .fifo_size = 1024, |
| 152 | + .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, | |
| 148 | 153 | }, |
| 149 | 154 | { |
| 150 | 155 | .whoami = INV_MPU9250_WHOAMI_VALUE, |
| @@ -152,6 +157,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 152 | 157 | .reg = ®_set_6500, |
| 153 | 158 | .config = &chip_config_6050, |
| 154 | 159 | .fifo_size = 512, |
| 160 | + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, | |
| 155 | 161 | }, |
| 156 | 162 | { |
| 157 | 163 | .whoami = INV_MPU9255_WHOAMI_VALUE, |
| @@ -159,6 +165,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 159 | 165 | .reg = ®_set_6500, |
| 160 | 166 | .config = &chip_config_6050, |
| 161 | 167 | .fifo_size = 512, |
| 168 | + .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, | |
| 162 | 169 | }, |
| 163 | 170 | { |
| 164 | 171 | .whoami = INV_ICM20608_WHOAMI_VALUE, |
| @@ -166,6 +173,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 166 | 173 | .reg = ®_set_6500, |
| 167 | 174 | .config = &chip_config_6050, |
| 168 | 175 | .fifo_size = 512, |
| 176 | + .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, | |
| 169 | 177 | }, |
| 170 | 178 | { |
| 171 | 179 | .whoami = INV_ICM20602_WHOAMI_VALUE, |
| @@ -173,6 +181,7 @@ static const struct inv_mpu6050_hw hw_info[] = { · 1 unmodified line | ||
| 173 | 181 | .reg = ®_set_icm20602, |
| 174 | 182 | .config = &chip_config_6050, |
| 175 | 183 | .fifo_size = 1008, |
| 184 | + .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, | |
| 176 | 185 | }, |
| 177 | 186 | }; |
| 178 | 187 | |
| @@ -481,12 +490,8 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev, · 302 unmodified lines | ||
| 481 | 490 | |
| 482 | 491 | return IIO_VAL_INT_PLUS_MICRO; |
| 483 | 492 | case IIO_TEMP: |
| 484 | − *val = 0; | |
| 485 | − if (st->chip_type == INV_ICM20602) | |
| 486 | − *val2 = INV_ICM20602_TEMP_SCALE; | |
| 487 | − else | |
| 488 | − *val2 = INV_MPU6050_TEMP_SCALE; | |
| 489 | − | |
| 493 | + *val = st->hw->temp.scale / 1000000; | |
| 494 | + *val2 = st->hw->temp.scale % 1000000; | |
| 490 | 495 | return IIO_VAL_INT_PLUS_MICRO; |
| 491 | 496 | case IIO_MAGN: |
| 492 | 497 | return inv_mpu_magn_get_scale(st, chan, val, val2); |
| @@ -496,11 +501,7 @@ inv_mpu6050_read_raw(struct iio_dev *indio_dev, · 3 unmodified lines | ||
| 496 | 501 | case IIO_CHAN_INFO_OFFSET: |
| 497 | 502 | switch (chan->type) { |
| 498 | 503 | case IIO_TEMP: |
| 499 | − if (st->chip_type == INV_ICM20602) | |
| 500 | − *val = INV_ICM20602_TEMP_OFFSET; | |
| 501 | − else | |
| 502 | − *val = INV_MPU6050_TEMP_OFFSET; | |
| 503 | − | |
| 504 | + *val = st->hw->temp.offset; | |
| 504 | 505 | return IIO_VAL_INT; |
| 505 | 506 | default: |
| 506 | 507 | return -EINVAL; |
| @@ -107,6 +107,7 @@ struct inv_mpu6050_chip_config { · 106 unmodified lines | ||
| 107 | 107 | * @reg: register map of the chip. |
| 108 | 108 | * @config: configuration of the chip. |
| 109 | 109 | * @fifo_size: size of the FIFO in bytes. |
| 110 | + * @temp: offset and scale to apply to raw temperature. | |
| 110 | 111 | */ |
| 111 | 112 | struct inv_mpu6050_hw { |
| 112 | 113 | u8 whoami; |
| @@ -114,6 +115,10 @@ struct inv_mpu6050_hw { · 1 unmodified line | ||
| 114 | 115 | const struct inv_mpu6050_reg_map *reg; |
| 115 | 116 | const struct inv_mpu6050_chip_config *config; |
| 116 | 117 | size_t fifo_size; |
| 118 | + struct { | |
| 119 | + int offset; | |
| 120 | + int scale; | |
| 121 | + } temp; | |
| 117 | 122 | }; |
| 118 | 123 | |
| 119 | 124 | /* |
| @@ -279,16 +284,19 @@ struct inv_mpu6050_state { · 159 unmodified lines | ||
| 279 | 284 | #define INV_MPU6050_REG_UP_TIME_MIN 5000 |
| 280 | 285 | #define INV_MPU6050_REG_UP_TIME_MAX 10000 |
| 281 | 286 | |
| 282 | −#define INV_MPU6050_TEMP_OFFSET 12421 | |
| 283 | −#define INV_MPU6050_TEMP_SCALE 2941 | |
| 287 | +#define INV_MPU6050_TEMP_OFFSET 12420 | |
| 288 | +#define INV_MPU6050_TEMP_SCALE 2941176 | |
| 284 | 289 | #define INV_MPU6050_MAX_GYRO_FS_PARAM 3 |
| 285 | 290 | #define INV_MPU6050_MAX_ACCL_FS_PARAM 3 |
| 286 | 291 | #define INV_MPU6050_THREE_AXIS 3 |
| 287 | 292 | #define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3 |
| 288 | 293 | #define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3 |
| 289 | 294 | |
| 290 | −#define INV_ICM20602_TEMP_OFFSET 8170 | |
| 291 | −#define INV_ICM20602_TEMP_SCALE 3060 | |
| 295 | +#define INV_MPU6500_TEMP_OFFSET 7011 | |
| 296 | +#define INV_MPU6500_TEMP_SCALE 2995178 | |
| 297 | + | |
| 298 | +#define INV_ICM20608_TEMP_OFFSET 8170 | |
| 299 | +#define INV_ICM20608_TEMP_SCALE 3059976 | |
| 292 | 300 | |
| 293 | 301 | /* 6 + 6 + 7 (for MPU9x50) = 19 round up to 24 and plus 8 */ |
| 294 | 302 | #define INV_MPU6050_OUTPUT_DATA_SIZE 32 |
| @@ -320,7 +320,6 @@ enum st_lsm6dsx_fifo_mode { · 319 unmodified lines | ||
| 320 | 320 | * @odr: Output data rate of the sensor [Hz]. |
| 321 | 321 | * @watermark: Sensor watermark level. |
| 322 | 322 | * @sip: Number of samples in a given pattern. |
| 323 | − * @decimator: FIFO decimation factor. | |
| 324 | 323 | * @ts_ref: Sensor timestamp reference for hw one. |
| 325 | 324 | * @ext_info: Sensor settings if it is connected to i2c controller |
| 326 | 325 | */ |
| @@ -334,7 +333,6 @@ struct st_lsm6dsx_sensor { · 7 unmodified lines | ||
| 334 | 333 | |
| 335 | 334 | u16 watermark; |
| 336 | 335 | u8 sip; |
| 337 | − u8 decimator; | |
| 338 | 336 | s64 ts_ref; |
| 339 | 337 | |
| 340 | 338 | struct { |
| @@ -351,9 +349,9 @@ struct st_lsm6dsx_sensor { · 10 unmodified lines | ||
| 351 | 349 | * @fifo_lock: Mutex to prevent concurrent access to the hw FIFO. |
| 352 | 350 | * @conf_lock: Mutex to prevent concurrent FIFO configuration update. |
| 353 | 351 | * @page_lock: Mutex to prevent concurrent memory page configuration. |
| 354 | − * @fifo_mode: FIFO operating mode supported by the device. | |
| 355 | 352 | * @suspend_mask: Suspended sensor bitmask. |
| 356 | 353 | * @enable_mask: Enabled sensor bitmask. |
| 354 | + * @fifo_mask: Enabled hw FIFO bitmask. | |
| 357 | 355 | * @ts_gain: Hw timestamp rate after internal calibration. |
| 358 | 356 | * @ts_sip: Total number of timestamp samples in a given pattern. |
| 359 | 357 | * @sip: Total number of samples (acc/gyro/ts) in a given pattern. |
| @@ -373,9 +371,9 @@ struct st_lsm6dsx_hw { · 13 unmodified lines | ||
| 373 | 371 | struct mutex conf_lock; |
| 374 | 372 | struct mutex page_lock; |
| 375 | 373 | |
| 376 | − enum st_lsm6dsx_fifo_mode fifo_mode; | |
| 377 | 374 | u8 suspend_mask; |
| 378 | 375 | u8 enable_mask; |
| 376 | + u8 fifo_mask; | |
| 379 | 377 | s64 ts_gain; |
| 380 | 378 | u8 ts_sip; |
| 381 | 379 | u8 sip; |
| @@ -78,14 +78,20 @@ struct st_lsm6dsx_decimator_entry st_lsm6dsx_decimator_table[] = { · 77 unmodified lines | ||
| 78 | 78 | { 32, 0x7 }, |
| 79 | 79 | }; |
| 80 | 80 | |
| 81 | −static int st_lsm6dsx_get_decimator_val(u8 val) | |
| 81 | +static int | |
| 82 | +st_lsm6dsx_get_decimator_val(struct st_lsm6dsx_sensor *sensor, u32 max_odr) | |
| 82 | 83 | { |
| 83 | 84 | const int max_size = ARRAY_SIZE(st_lsm6dsx_decimator_table); |
| 85 | + u32 decimator = max_odr / sensor->odr; | |
| 84 | 86 | int i; |
| 85 | 87 | |
| 86 | − for (i = 0; i < max_size; i++) | |
| 87 | − if (st_lsm6dsx_decimator_table[i].decimator == val) | |
| 88 | + if (decimator > 1) | |
| 89 | + decimator = round_down(decimator, 2); | |
| 90 | + | |
| 91 | + for (i = 0; i < max_size; i++) { | |
| 92 | + if (st_lsm6dsx_decimator_table[i].decimator == decimator) | |
| 88 | 93 | break; |
| 94 | + } | |
| 89 | 95 | |
| 90 | 96 | return i == max_size ? 0 : st_lsm6dsx_decimator_table[i].val; |
| 91 | 97 | } |
| @@ -111,6 +117,13 @@ static void st_lsm6dsx_get_max_min_odr(struct st_lsm6dsx_hw *hw, · 19 unmodified lines | ||
| 111 | 117 | } |
| 112 | 118 | } |
| 113 | 119 | |
| 120 | +static u8 st_lsm6dsx_get_sip(struct st_lsm6dsx_sensor *sensor, u32 min_odr) | |
| 121 | +{ | |
| 122 | + u8 sip = sensor->odr / min_odr; | |
| 123 | + | |
| 124 | + return sip > 1 ? round_down(sip, 2) : sip; | |
| 125 | +} | |
| 126 | + | |
| 114 | 127 | static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw) |
| 115 | 128 | { |
| 116 | 129 | const struct st_lsm6dsx_reg *ts_dec_reg; |
| @@ -131,12 +144,10 @@ static int st_lsm6dsx_update_decimators(struct st_lsm6dsx_hw *hw) · 14 unmodified lines | ||
| 131 | 144 | sensor = iio_priv(hw->iio_devs[i]); |
| 132 | 145 | /* update fifo decimators and sample in pattern */ |
| 133 | 146 | if (hw->enable_mask & BIT(sensor->id)) { |
| 134 | − sensor->sip = sensor->odr / min_odr; | |
| 135 | − sensor->decimator = max_odr / sensor->odr; | |
| 136 | − data = st_lsm6dsx_get_decimator_val(sensor->decimator); | |
| 147 | + sensor->sip = st_lsm6dsx_get_sip(sensor, min_odr); | |
| 148 | + data = st_lsm6dsx_get_decimator_val(sensor, max_odr); | |
| 137 | 149 | } else { |
| 138 | 150 | sensor->sip = 0; |
| 139 | − sensor->decimator = 0; | |
| 140 | 151 | data = 0; |
| 141 | 152 | } |
| 142 | 153 | ts_sip = max_t(u16, ts_sip, sensor->sip); |
| @@ -176,17 +187,10 @@ int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw, · 33 unmodified lines | ||
| 176 | 187 | enum st_lsm6dsx_fifo_mode fifo_mode) |
| 177 | 188 | { |
| 178 | 189 | unsigned int data; |
| 179 | − int err; | |
| 180 | 190 | |
| 181 | 191 | data = FIELD_PREP(ST_LSM6DSX_FIFO_MODE_MASK, fifo_mode); |
| 182 | − err = st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR, | |
| 183 | − ST_LSM6DSX_FIFO_MODE_MASK, data); | |
| 184 | − if (err < 0) | |
| 185 | − return err; | |
| 186 | − | |
| 187 | − hw->fifo_mode = fifo_mode; | |
| 188 | − | |
| 189 | − return 0; | |
| 192 | + return st_lsm6dsx_update_bits_locked(hw, ST_LSM6DSX_REG_FIFO_MODE_ADDR, | |
| 193 | + ST_LSM6DSX_FIFO_MODE_MASK, data); | |
| 190 | 194 | } |
| 191 | 195 | |
| 192 | 196 | static int st_lsm6dsx_set_fifo_odr(struct st_lsm6dsx_sensor *sensor, |
| @@ -608,11 +612,17 @@ int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw) · 415 unmodified lines | ||
| 608 | 612 | int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable) |
| 609 | 613 | { |
| 610 | 614 | struct st_lsm6dsx_hw *hw = sensor->hw; |
| 615 | + u8 fifo_mask; | |
| 611 | 616 | int err; |
| 612 | 617 | |
| 613 | 618 | mutex_lock(&hw->conf_lock); |
| 614 | 619 | |
| 615 | − if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) { | |
| 620 | + if (enable) | |
| 621 | + fifo_mask = hw->fifo_mask | BIT(sensor->id); | |
| 622 | + else | |
| 623 | + fifo_mask = hw->fifo_mask & ~BIT(sensor->id); | |
| 624 | + | |
| 625 | + if (hw->fifo_mask) { | |
| 616 | 626 | err = st_lsm6dsx_flush_fifo(hw); |
| 617 | 627 | if (err < 0) |
| 618 | 628 | goto out; |
| @@ -642,15 +652,19 @@ int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable) · 23 unmodified lines | ||
| 642 | 652 | if (err < 0) |
| 643 | 653 | goto out; |
| 644 | 654 | |
| 645 | − if (hw->enable_mask) { | |
| 655 | + if (fifo_mask) { | |
| 646 | 656 | /* reset hw ts counter */ |
| 647 | 657 | err = st_lsm6dsx_reset_hw_ts(hw); |
| 648 | 658 | if (err < 0) |
| 649 | 659 | goto out; |
| 650 | 660 | |
| 651 | 661 | err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); |
| 662 | + if (err < 0) | |
| 663 | + goto out; | |
| 652 | 664 | } |
| 653 | 665 | |
| 666 | + hw->fifo_mask = fifo_mask; | |
| 667 | + | |
| 654 | 668 | out: |
| 655 | 669 | mutex_unlock(&hw->conf_lock); |
| 656 | 670 | |
| @@ -1447,8 +1447,9 @@ st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr) · 1446 unmodified lines | ||
| 1447 | 1447 | return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); |
| 1448 | 1448 | } |
| 1449 | 1449 | |
| 1450 | −int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, | |
| 1451 | − bool enable) | |
| 1450 | +static int | |
| 1451 | +__st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, | |
| 1452 | + bool enable) | |
| 1452 | 1453 | { |
| 1453 | 1454 | struct st_lsm6dsx_hw *hw = sensor->hw; |
| 1454 | 1455 | u32 odr = enable ? sensor->odr : 0; |
| @@ -1466,6 +1467,26 @@ int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, · 11 unmodified lines | ||
| 1466 | 1467 | return 0; |
| 1467 | 1468 | } |
| 1468 | 1469 | |
| 1470 | +static int | |
| 1471 | +st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) | |
| 1472 | +{ | |
| 1473 | + struct st_lsm6dsx_hw *hw = sensor->hw; | |
| 1474 | + | |
| 1475 | + if (sensor->id == ST_LSM6DSX_ID_GYRO || enable) | |
| 1476 | + return 0; | |
| 1477 | + | |
| 1478 | + return hw->enable_event; | |
| 1479 | +} | |
| 1480 | + | |
| 1481 | +int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, | |
| 1482 | + bool enable) | |
| 1483 | +{ | |
| 1484 | + if (st_lsm6dsx_check_events(sensor, enable)) | |
| 1485 | + return 0; | |
| 1486 | + | |
| 1487 | + return __st_lsm6dsx_sensor_set_enable(sensor, enable); | |
| 1488 | +} | |
| 1489 | + | |
| 1469 | 1490 | static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, |
| 1470 | 1491 | u8 addr, int *val) |
| 1471 | 1492 | { |
| @@ -1661,7 +1682,7 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, · 189 unmodified lines | ||
| 1661 | 1682 | struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); |
| 1662 | 1683 | struct st_lsm6dsx_hw *hw = sensor->hw; |
| 1663 | 1684 | u8 enable_event; |
| 1664 | − int err = 0; | |
| 1685 | + int err; | |
| 1665 | 1686 | |
| 1666 | 1687 | if (type != IIO_EV_TYPE_THRESH) |
| 1667 | 1688 | return -EINVAL; |
| @@ -1689,7 +1710,8 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, · 21 unmodified lines | ||
| 1689 | 1710 | return err; |
| 1690 | 1711 | |
| 1691 | 1712 | mutex_lock(&hw->conf_lock); |
| 1692 | − err = st_lsm6dsx_sensor_set_enable(sensor, state); | |
| 1713 | + if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) | |
| 1714 | + err = __st_lsm6dsx_sensor_set_enable(sensor, state); | |
| 1693 | 1715 | mutex_unlock(&hw->conf_lock); |
| 1694 | 1716 | if (err < 0) |
| 1695 | 1717 | return err; |
| @@ -2300,7 +2322,7 @@ static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) · 604 unmodified lines | ||
| 2300 | 2322 | hw->suspend_mask |= BIT(sensor->id); |
| 2301 | 2323 | } |
| 2302 | 2324 | |
| 2303 | − if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) | |
| 2325 | + if (hw->fifo_mask) | |
| 2304 | 2326 | err = st_lsm6dsx_flush_fifo(hw); |
| 2305 | 2327 | |
| 2306 | 2328 | return err; |
| @@ -2336,7 +2358,7 @@ static int __maybe_unused st_lsm6dsx_resume(struct device *dev) · 29 unmodified lines | ||
| 2336 | 2358 | hw->suspend_mask &= ~BIT(sensor->id); |
| 2337 | 2359 | } |
| 2338 | 2360 | |
| 2339 | − if (hw->enable_mask) | |
| 2361 | + if (hw->fifo_mask) | |
| 2340 | 2362 | err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); |
| 2341 | 2363 | |
| 2342 | 2364 | return err; |
| @@ -444,8 +444,10 @@ static struct ltc2983_custom_sensor *__ltc2983_custom_sensor_new( · 443 unmodified lines | ||
| 444 | 444 | else |
| 445 | 445 | temp = __convert_to_raw(temp, resolution); |
| 446 | 446 | } else { |
| 447 | − of_property_read_u32_index(np, propname, index, | |
| 448 | − (u32 *)&temp); | |
| 447 | + u32 t32; | |
| 448 | + | |
| 449 | + of_property_read_u32_index(np, propname, index, &t32); | |
| 450 | + temp = t32; | |
| 449 | 451 | } |
| 450 | 452 | |
| 451 | 453 | for (j = 0; j < n_size; j++) |
| @@ -805,8 +805,8 @@ s32 create_dir(struct inode *inode, struct chain_t *p_dir, · 804 unmodified lines | ||
| 805 | 805 | s32 create_file(struct inode *inode, struct chain_t *p_dir, |
| 806 | 806 | struct uni_name_t *p_uniname, u8 mode, struct file_id_t *fid); |
| 807 | 807 | void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry); |
| 808 | −s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry, | |
| 809 | − struct uni_name_t *p_uniname, struct file_id_t *fid); | |
| 808 | +s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 old_entry, | |
| 809 | + struct uni_name_t *p_uniname, struct file_id_t *fid); | |
| 810 | 810 | s32 move_file(struct inode *inode, struct chain_t *p_olddir, s32 oldentry, |
| 811 | 811 | struct chain_t *p_newdir, struct uni_name_t *p_uniname, |
| 812 | 812 | struct file_id_t *fid); |
| @@ -192,8 +192,6 @@ static s32 clr_alloc_bitmap(struct super_block *sb, u32 clu) · 191 unmodified lines | ||
| 192 | 192 | |
| 193 | 193 | exfat_bitmap_clear((u8 *)p_fs->vol_amap[i]->b_data, b); |
| 194 | 194 | |
| 195 | − return sector_write(sb, sector, p_fs->vol_amap[i], 0); | |
| 196 | − | |
| 197 | 195 | #ifdef CONFIG_EXFAT_DISCARD |
| 198 | 196 | if (opts->discard) { |
| 199 | 197 | ret = sb_issue_discard(sb, START_SECTOR(clu), |
| @@ -202,9 +200,13 @@ static s32 clr_alloc_bitmap(struct super_block *sb, u32 clu) · 2 unmodified lines | ||
| 202 | 200 | if (ret == -EOPNOTSUPP) { |
| 203 | 201 | pr_warn("discard not supported by device, disabling"); |
| 204 | 202 | opts->discard = 0; |
| 203 | + } else { | |
| 204 | + return ret; | |
| 205 | 205 | } |
| 206 | 206 | } |
| 207 | 207 | #endif /* CONFIG_EXFAT_DISCARD */ |
| 208 | + | |
| 209 | + return sector_write(sb, sector, p_fs->vol_amap[i], 0); | |
| 208 | 210 | } |
| 209 | 211 | |
| 210 | 212 | static u32 test_alloc_bitmap(struct super_block *sb, u32 clu) |
| @@ -2322,8 +2324,8 @@ void remove_file(struct inode *inode, struct chain_t *p_dir, s32 entry) · 2111 unmodified lines | ||
| 2322 | 2324 | fs_func->delete_dir_entry(sb, p_dir, entry, 0, num_entries); |
| 2323 | 2325 | } |
| 2324 | 2326 | |
| 2325 | −s32 rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, | |
| 2326 | − struct uni_name_t *p_uniname, struct file_id_t *fid) | |
| 2327 | +s32 exfat_rename_file(struct inode *inode, struct chain_t *p_dir, s32 oldentry, | |
| 2328 | + struct uni_name_t *p_uniname, struct file_id_t *fid) | |
| 2327 | 2329 | { |
| 2328 | 2330 | s32 ret, newentry = -1, num_old_entries, num_new_entries; |
| 2329 | 2331 | sector_t sector_old, sector_new; |
| @@ -1262,8 +1262,8 @@ static int ffsMoveFile(struct inode *old_parent_inode, struct file_id_t *fid, · 1261 unmodified lines | ||
| 1262 | 1262 | fs_set_vol_flags(sb, VOL_DIRTY); |
| 1263 | 1263 | |
| 1264 | 1264 | if (olddir.dir == newdir.dir) |
| 1265 | − ret = rename_file(new_parent_inode, &olddir, dentry, &uni_name, | |
| 1266 | − fid); | |
| 1265 | + ret = exfat_rename_file(new_parent_inode, &olddir, dentry, | |
| 1266 | + &uni_name, fid); | |
| 1267 | 1267 | else |
| 1268 | 1268 | ret = move_file(new_parent_inode, &olddir, dentry, &newdir, |
| 1269 | 1269 | &uni_name, fid); |
| @@ -63,11 +63,17 @@ static int init_display(struct fbtft_par *par) · 62 unmodified lines | ||
| 63 | 63 | { |
| 64 | 64 | int ret; |
| 65 | 65 | |
| 66 | − /* Set CS active high */ | |
| 67 | − par->spi->mode |= SPI_CS_HIGH; | |
| 66 | + /* | |
| 67 | + * Set CS active inverse polarity: just setting SPI_CS_HIGH does not | |
| 68 | + * work with GPIO based chip selects that are logically active high | |
| 69 | + * but inverted inside the GPIO library, so enforce inverted | |
| 70 | + * semantics. | |
| 71 | + */ | |
| 72 | + par->spi->mode ^= SPI_CS_HIGH; | |
| 68 | 73 | ret = spi_setup(par->spi); |
| 69 | 74 | if (ret) { |
| 70 | − dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); | |
| 75 | + dev_err(par->info->device, | |
| 76 | + "Could not set inverse CS polarity\n"); | |
| 71 | 77 | return ret; |
| 72 | 78 | } |
| 73 | 79 | |
| @@ -150,10 +150,17 @@ static int init_display(struct fbtft_par *par) · 149 unmodified lines | ||
| 150 | 150 | |
| 151 | 151 | /* enable SPI interface by having CS and MOSI low during reset */ |
| 152 | 152 | save_mode = par->spi->mode; |
| 153 | − par->spi->mode |= SPI_CS_HIGH; | |
| 154 | − ret = spi_setup(par->spi); /* set CS inactive low */ | |
| 153 | + /* | |
| 154 | + * Set CS active inverse polarity: just setting SPI_CS_HIGH does not | |
| 155 | + * work with GPIO based chip selects that are logically active high | |
| 156 | + * but inverted inside the GPIO library, so enforce inverted | |
| 157 | + * semantics. | |
| 158 | + */ | |
| 159 | + par->spi->mode ^= SPI_CS_HIGH; | |
| 160 | + ret = spi_setup(par->spi); | |
| 155 | 161 | if (ret) { |
| 156 | − dev_err(par->info->device, "Could not set SPI_CS_HIGH\n"); | |
| 162 | + dev_err(par->info->device, | |
| 163 | + "Could not set inverse CS polarity\n"); | |
| 157 | 164 | return ret; |
| 158 | 165 | } |
| 159 | 166 | write_reg(par, 0x00); /* make sure mode is set */ |
| @@ -913,7 +913,7 @@ static int fbtft_init_display_from_property(struct fbtft_par *par) · 912 unmodified lines | ||
| 913 | 913 | if (count == 0) |
| 914 | 914 | return -EINVAL; |
| 915 | 915 | |
| 916 | − values = kmalloc_array(count, sizeof(*values), GFP_KERNEL); | |
| 916 | + values = kmalloc_array(count + 1, sizeof(*values), GFP_KERNEL); | |
| 917 | 917 | if (!values) |
| 918 | 918 | return -ENOMEM; |
| 919 | 919 | |
| @@ -926,9 +926,9 @@ static int fbtft_init_display_from_property(struct fbtft_par *par) · 6 unmodified lines | ||
| 926 | 926 | gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ |
| 927 | 927 | |
| 928 | 928 | index = -1; |
| 929 | − while (index < count) { | |
| 930 | − val = values[++index]; | |
| 929 | + val = values[++index]; | |
| 931 | 930 | |
| 931 | + while (index < count) { | |
| 932 | 932 | if (val & FBTFT_OF_INIT_CMD) { |
| 933 | 933 | val &= 0xFFFF; |
| 934 | 934 | i = 0; |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | config NET_VENDOR_HP |
| 7 | 7 | bool "HP devices" |
| 8 | 8 | default y |
| 9 | + depends on ETHERNET | |
| 9 | 10 | depends on ISA || EISA || PCI |
| 10 | 11 | ---help--- |
| 11 | 12 | If you have a network (Ethernet) card belonging to this class, say Y. |
| @@ -571,8 +571,7 @@ static int gigaset_initcshw(struct cardstate *cs) · 570 unmodified lines | ||
| 571 | 571 | { |
| 572 | 572 | struct usb_cardstate *ucs; |
| 573 | 573 | |
| 574 | − cs->hw.usb = ucs = | |
| 575 | − kmalloc(sizeof(struct usb_cardstate), GFP_KERNEL); | |
| 574 | + cs->hw.usb = ucs = kzalloc(sizeof(struct usb_cardstate), GFP_KERNEL); | |
| 576 | 575 | if (!ucs) { |
| 577 | 576 | pr_err("out of memory\n"); |
| 578 | 577 | return -ENOMEM; |
| @@ -584,9 +583,6 @@ static int gigaset_initcshw(struct cardstate *cs) · 5 unmodified lines | ||
| 584 | 583 | ucs->bchars[3] = 0; |
| 585 | 584 | ucs->bchars[4] = 0x11; |
| 586 | 585 | ucs->bchars[5] = 0x13; |
| 587 | − ucs->bulk_out_buffer = NULL; | |
| 588 | − ucs->bulk_out_urb = NULL; | |
| 589 | − ucs->read_urb = NULL; | |
| 590 | 586 | tasklet_init(&cs->write_tasklet, |
| 591 | 587 | gigaset_modem_fill, (unsigned long) cs); |
| 592 | 588 | |
| @@ -685,6 +681,11 @@ static int gigaset_probe(struct usb_interface *interface, · 92 unmodified lines | ||
| 685 | 681 | return -ENODEV; |
| 686 | 682 | } |
| 687 | 683 | |
| 684 | + if (hostif->desc.bNumEndpoints < 2) { | |
| 685 | + dev_err(&interface->dev, "missing endpoints\n"); | |
| 686 | + return -ENODEV; | |
| 687 | + } | |
| 688 | + | |
| 688 | 689 | dev_info(&udev->dev, "%s: Device matched ... !\n", __func__); |
| 689 | 690 | |
| 690 | 691 | /* allocate memory for our device state and initialize it */ |
| @@ -704,6 +705,12 @@ static int gigaset_probe(struct usb_interface *interface, · 13 unmodified lines | ||
| 704 | 705 | |
| 705 | 706 | endpoint = &hostif->endpoint[0].desc; |
| 706 | 707 | |
| 708 | + if (!usb_endpoint_is_bulk_out(endpoint)) { | |
| 709 | + dev_err(&interface->dev, "missing bulk-out endpoint\n"); | |
| 710 | + retval = -ENODEV; | |
| 711 | + goto error; | |
| 712 | + } | |
| 713 | + | |
| 707 | 714 | buffer_size = le16_to_cpu(endpoint->wMaxPacketSize); |
| 708 | 715 | ucs->bulk_out_size = buffer_size; |
| 709 | 716 | ucs->bulk_out_epnum = usb_endpoint_num(endpoint); |
| @@ -723,6 +730,12 @@ static int gigaset_probe(struct usb_interface *interface, · 13 unmodified lines | ||
| 723 | 730 | |
| 724 | 731 | endpoint = &hostif->endpoint[1].desc; |
| 725 | 732 | |
| 733 | + if (!usb_endpoint_is_int_in(endpoint)) { | |
| 734 | + dev_err(&interface->dev, "missing int-in endpoint\n"); | |
| 735 | + retval = -ENODEV; | |
| 736 | + goto error; | |
| 737 | + } | |
| 738 | + | |
| 726 | 739 | ucs->busy = 0; |
| 727 | 740 | |
| 728 | 741 | ucs->read_urb = usb_alloc_urb(0, GFP_KERNEL); |
| @@ -3,6 +3,7 @@ config OCTEON_ETHERNET · 2 unmodified lines | ||
| 3 | 3 | tristate "Cavium Networks Octeon Ethernet support" |
| 4 | 4 | depends on CAVIUM_OCTEON_SOC || COMPILE_TEST |
| 5 | 5 | depends on NETDEVICES |
| 6 | + depends on BROKEN | |
| 6 | 7 | select PHYLIB |
| 7 | 8 | select MDIO_OCTEON |
| 8 | 9 | help |
| @@ -70,7 +70,7 @@ static struct dvobj_priv *usb_dvobj_init(struct usb_interface *usb_intf) · 69 unmodified lines | ||
| 70 | 70 | phost_conf = pusbd->actconfig; |
| 71 | 71 | pconf_desc = &phost_conf->desc; |
| 72 | 72 | |
| 73 | − phost_iface = &usb_intf->altsetting[0]; | |
| 73 | + phost_iface = usb_intf->cur_altsetting; | |
| 74 | 74 | piface_desc = &phost_iface->desc; |
| 75 | 75 | |
| 76 | 76 | pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces; |
| @@ -247,7 +247,7 @@ static uint r8712_usb_dvobj_init(struct _adapter *padapter) · 246 unmodified lines | ||
| 247 | 247 | |
| 248 | 248 | pdvobjpriv->padapter = padapter; |
| 249 | 249 | padapter->eeprom_address_size = 6; |
| 250 | − phost_iface = &pintf->altsetting[0]; | |
| 250 | + phost_iface = pintf->cur_altsetting; | |
| 251 | 251 | piface_desc = &phost_iface->desc; |
| 252 | 252 | pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; |
| 253 | 253 | if (pusbd->speed == USB_SPEED_HIGH) { |
| @@ -3309,7 +3309,7 @@ static int __init vchiq_driver_init(void) · 3308 unmodified lines | ||
| 3309 | 3309 | return 0; |
| 3310 | 3310 | |
| 3311 | 3311 | region_unregister: |
| 3312 | − platform_driver_unregister(&vchiq_driver); | |
| 3312 | + unregister_chrdev_region(vchiq_devid, 1); | |
| 3313 | 3313 | |
| 3314 | 3314 | class_destroy: |
| 3315 | 3315 | class_destroy(vchiq_class); |
| @@ -4,6 +4,7 @@ config PRISM2_USB · 3 unmodified lines | ||
| 4 | 4 | depends on WLAN && USB && CFG80211 |
| 5 | 5 | select WIRELESS_EXT |
| 6 | 6 | select WEXT_PRIV |
| 7 | + select CRC32 | |
| 7 | 8 | help |
| 8 | 9 | This is the wlan-ng prism 2.5/3 USB driver for a wide range of |
| 9 | 10 | old USB wireless devices. |