Add support for disabling states L1.1 and L1.2 to pci_disable_link_state(). Allow separate control of ASPM and PCI PM L1 substates.
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| @@ -1544,9 +1544,13 @@ extern bool pcie_ports_native; · 1543 unmodified lines | ||
| 1544 | 1544 | #define pcie_ports_native false |
| 1545 | 1545 | #endif |
| 1546 | 1546 | |
| 1547 | −#define PCIE_LINK_STATE_L0S 1 | |
| 1548 | −#define PCIE_LINK_STATE_L1 2 | |
| 1549 | −#define PCIE_LINK_STATE_CLKPM 4 | |
| 1547 | +#define PCIE_LINK_STATE_L0S BIT(0) | |
| 1548 | +#define PCIE_LINK_STATE_L1 BIT(1) | |
| 1549 | +#define PCIE_LINK_STATE_CLKPM BIT(2) | |
| 1550 | +#define PCIE_LINK_STATE_L1_1 BIT(3) | |
| 1551 | +#define PCIE_LINK_STATE_L1_2 BIT(4) | |
| 1552 | +#define PCIE_LINK_STATE_L1_1_PCIPM BIT(5) | |
| 1553 | +#define PCIE_LINK_STATE_L1_2_PCIPM BIT(6) | |
| 1550 | 1554 | |
| 1551 | 1555 | #ifdef CONFIG_PCIEASPM |
| 1552 | 1556 | int pci_disable_link_state(struct pci_dev *pdev, int state); |