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drm/dp_tunnel: Add UHBR tunneling support

Add the DPCD registers and detection required to support UHBR link rates over Thunderbolt tunnels.

Imre Deak committed 4 months ago

Commit b0b6d441 parent 7d594b23 files · +148 −1Browse files

Unified · Split

3 files
  1. drivers/gpu/drm/display/drm_dp_tunnel.c +115 −1
  2. include/drm/display/drm_dp.h +12 −0
  3. include/drm/display/drm_dp_tunnel.h +21 −0
drivers/gpu/drm/display/drm_dp_tunnel.c+115−1
@@ -111,6 +111,8 @@ · 110 unmodified lines
111 DPTUN_REG(DP_ALLOCATED_BW) | \111 DPTUN_REG(DP_ALLOCATED_BW) | \
112 DPTUN_REG(DP_TUNNELING_MAX_LINK_RATE) | \112 DPTUN_REG(DP_TUNNELING_MAX_LINK_RATE) | \
113 DPTUN_REG(DP_TUNNELING_MAX_LANE_COUNT) | \113 DPTUN_REG(DP_TUNNELING_MAX_LANE_COUNT) | \
114 DPTUN_REG(DP_TUNNELING_MAIN_LINK_CHANNEL_CODING) | \
115 DPTUN_REG(DP_TUNNELING_128B132B_LINK_RATE) | \
114 DPTUN_REG(DP_DPTX_BW_ALLOCATION_MODE_CONTROL))116 DPTUN_REG(DP_DPTX_BW_ALLOCATION_MODE_CONTROL))
115 117
116static const DECLARE_BITMAP(dptun_info_regs, 64) = {118static const DECLARE_BITMAP(dptun_info_regs, 64) = {
@@ -140,11 +142,14 @@ struct drm_dp_tunnel { · 23 unmodified lines
140 int estimated_bw;142 int estimated_bw;
141 int allocated_bw;143 int allocated_bw;
142 144
145 u8 dprx_128b132b_rates;
143 int max_dprx_rate;146 int max_dprx_rate;
144 u8 max_dprx_lane_count;147 u8 max_dprx_lane_count;
145 148
146 u8 adapter_id;149 u8 adapter_id;
147 150
151 bool dprx_128b132b_support:1;
152 bool dprx_128b132b_lane0_mapping_support:1;
148 bool bw_alloc_supported:1;153 bool bw_alloc_supported:1;
149 bool bw_alloc_enabled:1;154 bool bw_alloc_enabled:1;
150 bool has_io_error:1;155 bool has_io_error:1;
@@ -260,9 +265,46 @@ static int tunnel_reg_bw_granularity(const struct drm_dp_tunnel_regs *regs) · 109 unmodified lines
260 return (250000 << gr) / 8;265 return (250000 << gr) / 8;
261}266}
262 267
268static bool tunnel_reg_dprx_128b132b_support(const struct drm_dp_tunnel_regs *regs)
269{
270 return tunnel_reg(regs, DP_TUNNELING_MAIN_LINK_CHANNEL_CODING) & DP_128B132B_DP_SUPPORTED;
271}
272
273static bool tunnel_reg_dprx_128b132b_lane0_mapping_support(const struct drm_dp_tunnel_regs *regs)
274{
275 return tunnel_reg(regs, DP_TUNNELING_128B132B_LINK_RATE) &
276 DP_TUNNELING_128B132B_LL_LANE0_MAPPING_SUPPORT;
277}
278
279static u8 tunnel_reg_dprx_128b132b_rates(const struct drm_dp_tunnel_regs *regs)
280{
281 if (!tunnel_reg_dprx_128b132b_support(regs))
282 return 0;
283
284 return tunnel_reg(regs, DP_TUNNELING_128B132B_LINK_RATE) &
285 DP_TUNNELING_128B132B_LINK_RATE_MASK;
286}
287
288static u8 max_128b132b_rate(u8 rates)
289{
290 if (rates & DP_TUNNELING_20GBPS_PER_LANE_SUPPORT)
291 return DP_TUNNELING_20GBPS_PER_LANE_SUPPORT;
292 else if (rates & DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT)
293 return DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT;
294 else if (rates & DP_TUNNELING_10GBPS_PER_LANE_SUPPORT)
295 return DP_TUNNELING_10GBPS_PER_LANE_SUPPORT;
296
297 WARN_ON(rates);
298
299 return 0;
300}
301
263static int tunnel_reg_max_dprx_rate(const struct drm_dp_tunnel_regs *regs)302static int tunnel_reg_max_dprx_rate(const struct drm_dp_tunnel_regs *regs)
264{303{
265 u8 bw_code = tunnel_reg(regs, DP_TUNNELING_MAX_LINK_RATE);304 u8 bw_code = max_128b132b_rate(tunnel_reg_dprx_128b132b_rates(regs));
305
306 if (!bw_code)
307 bw_code = tunnel_reg(regs, DP_TUNNELING_MAX_LINK_RATE);
266 308
267 return drm_dp_bw_code_to_link_rate(bw_code);309 return drm_dp_bw_code_to_link_rate(bw_code);
268}310}
@@ -706,6 +748,23 @@ static bool update_dprx_caps(struct drm_dp_tunnel *tunnel, const struct drm_dp_t · 437 unmodified lines
706{748{
707 bool changed = false;749 bool changed = false;
708 750
751 if (tunnel_reg_dprx_128b132b_support(regs) != tunnel->dprx_128b132b_support) {
752 tunnel->dprx_128b132b_support = tunnel_reg_dprx_128b132b_support(regs);
753 changed = true;
754 }
755
756 if (tunnel_reg_dprx_128b132b_lane0_mapping_support(regs) !=
757 tunnel->dprx_128b132b_lane0_mapping_support) {
758 tunnel->dprx_128b132b_lane0_mapping_support =
759 tunnel_reg_dprx_128b132b_lane0_mapping_support(regs);
760 changed = true;
761 }
762
763 if (tunnel_reg_dprx_128b132b_rates(regs) != tunnel->dprx_128b132b_rates) {
764 tunnel->dprx_128b132b_rates = tunnel_reg_dprx_128b132b_rates(regs);
765 changed = true;
766 }
767
709 if (tunnel_reg_max_dprx_rate(regs) != tunnel->max_dprx_rate) {768 if (tunnel_reg_max_dprx_rate(regs) != tunnel->max_dprx_rate) {
710 tunnel->max_dprx_rate = tunnel_reg_max_dprx_rate(regs);769 tunnel->max_dprx_rate = tunnel_reg_max_dprx_rate(regs);
711 changed = true;770 changed = true;
@@ -1331,6 +1390,61 @@ int drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr, struct drm_dp_aux *a · 619 unmodified lines
1331}1390}
1332EXPORT_SYMBOL(drm_dp_tunnel_handle_irq);1391EXPORT_SYMBOL(drm_dp_tunnel_handle_irq);
1333 1392
1393/**
1394 * drm_dp_tunnel_128b132b_supported - Query if 128b132b is supported by the tunnel's DPRX
1395 * @tunnel: Tunnel object
1396 *
1397 * The function is used to query if 128b132b is supported by the DPRX connected
1398 * to @tunnel.
1399 *
1400 * Returns %true if 128b132b is supported by the DPRX.
1401 */
1402bool drm_dp_tunnel_128b132b_supported(const struct drm_dp_tunnel *tunnel)
1403{
1404 return tunnel->dprx_128b132b_support;
1405}
1406EXPORT_SYMBOL(drm_dp_tunnel_128b132b_supported);
1407
1408/**
1409 * drm_dp_tunnel_128b132b_lane0_mapping_supported - Check 128b/132b lane 0 mapping support
1410 * @tunnel: Tunnel object
1411 *
1412 * Check whether the DP-out adapter always maps lane 0 as expected by the
1413 * DPRX on a tunneled 128b/132b link. If the function returns %true, one- and
1414 * two-lane configurations with UHBR link rates can always be used. If it
1415 * returns %false, using one or two lanes with UHBR link rates may cause a
1416 * lane-count conversion failure in the DPRX, requiring corrective action by
1417 * the source during link training. See DP Standard v2.1b, section
1418 * 3.5.2.16.3, 128b/132b DPRX Lane Count Conversion Failure Indication and
1419 * Corrective Action.
1420 *
1421 * A four-lane configuration can always be used, provided that the DPRX
1422 * supports it, regardless of the function's return value.
1423 *
1424 * Returns %true if the DP-out adapter supports the 128b/132b lane 0 mapping.
1425 */
1426bool drm_dp_tunnel_128b132b_lane0_mapping_supported(const struct drm_dp_tunnel *tunnel)
1427{
1428 return tunnel->dprx_128b132b_lane0_mapping_support;
1429}
1430EXPORT_SYMBOL(drm_dp_tunnel_128b132b_lane0_mapping_supported);
1431
1432/**
1433 * drm_dp_tunnel_128b132b_dprx_rates - Query the supported 128b132b rates of the tunnel's DPRX
1434 * @tunnel: Tunnel object
1435 *
1436 * The function is used to query the supported 128b132b rates of the DPRX connected
1437 * to @tunnel. Note that the related DP_128B132B_SUPPROTED_LINK_RATES DPCD
1438 * register will indicate no supported 128B132B rates for a tunneled DPRX.
1439 *
1440 * Returns the mask of supported 128b132b rates.
1441 */
1442u8 drm_dp_tunnel_128b132b_dprx_rates(const struct drm_dp_tunnel *tunnel)
1443{
1444 return tunnel->dprx_128b132b_rates;
1445}
1446EXPORT_SYMBOL(drm_dp_tunnel_128b132b_dprx_rates);
1447
1334/**1448/**
1335 * drm_dp_tunnel_max_dprx_rate - Query the maximum rate of the tunnel's DPRX1449 * drm_dp_tunnel_max_dprx_rate - Query the maximum rate of the tunnel's DPRX
1336 * @tunnel: Tunnel object1450 * @tunnel: Tunnel object
include/drm/display/drm_dp.h+12−0
@@ -1497,6 +1497,18 @@ · 1496 unmodified lines
1497#define DP_TUNNELING_MAX_LANE_COUNT 0xe00291497#define DP_TUNNELING_MAX_LANE_COUNT 0xe0029
1498#define DP_TUNNELING_MAX_LANE_COUNT_MASK 0x1f1498#define DP_TUNNELING_MAX_LANE_COUNT_MASK 0x1f
1499 1499
1500#define DP_TUNNELING_MAIN_LINK_CHANNEL_CODING 0xe002b
1501#define DP_128B132B_DP_SUPPORTED (1 << 0)
1502
1503#define DP_TUNNELING_128B132B_LINK_RATE 0xe002c
1504#define DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT (1 << 2)
1505#define DP_TUNNELING_20GBPS_PER_LANE_SUPPORT (1 << 1)
1506#define DP_TUNNELING_10GBPS_PER_LANE_SUPPORT (1 << 0)
1507#define DP_TUNNELING_128B132B_LINK_RATE_MASK (DP_TUNNELING_10GBPS_PER_LANE_SUPPORT | \
1508 DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT | \
1509 DP_TUNNELING_20GBPS_PER_LANE_SUPPORT)
1510#define DP_TUNNELING_128B132B_LL_LANE0_MAPPING_SUPPORT (1 << 7)
1511
1500#define DP_DPTX_BW_ALLOCATION_MODE_CONTROL 0xe00301512#define DP_DPTX_BW_ALLOCATION_MODE_CONTROL 0xe0030
1501#define DP_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE (1 << 7)1513#define DP_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE (1 << 7)
1502#define DP_UNMASK_BW_ALLOCATION_IRQ (1 << 6)1514#define DP_UNMASK_BW_ALLOCATION_IRQ (1 << 6)
include/drm/display/drm_dp_tunnel.h+21−0
@@ -63,6 +63,9 @@ void drm_dp_tunnel_set_io_error(struct drm_dp_tunnel *tunnel); · 62 unmodified lines
63int drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr,63int drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr,
64 struct drm_dp_aux *aux);64 struct drm_dp_aux *aux);
65 65
66bool drm_dp_tunnel_128b132b_supported(const struct drm_dp_tunnel *tunnel);
67bool drm_dp_tunnel_128b132b_lane0_mapping_supported(const struct drm_dp_tunnel *tunnel);
68u8 drm_dp_tunnel_128b132b_dprx_rates(const struct drm_dp_tunnel *tunnel);
66int drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel);69int drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel);
67int drm_dp_tunnel_max_dprx_lane_count(const struct drm_dp_tunnel *tunnel);70int drm_dp_tunnel_max_dprx_lane_count(const struct drm_dp_tunnel *tunnel);
68int drm_dp_tunnel_available_bw(const struct drm_dp_tunnel *tunnel);71int drm_dp_tunnel_available_bw(const struct drm_dp_tunnel *tunnel);
@@ -173,6 +176,24 @@ drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr, · 104 unmodified lines
173 return -EOPNOTSUPP;176 return -EOPNOTSUPP;
174}177}
175 178
179static inline bool
180drm_dp_tunnel_128b132b_supported(const struct drm_dp_tunnel *tunnel)
181{
182 return false;
183}
184
185static inline bool
186drm_dp_tunnel_128b132b_lane0_mapping_supported(const struct drm_dp_tunnel *tunnel)
187{
188 return false;
189}
190
191static inline u8
192drm_dp_tunnel_128b132b_dprx_rates(const struct drm_dp_tunnel *tunnel)
193{
194 return 0;
195}
196
176static inline int197static inline int
177drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel)198drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel)
178{199{