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drm/dp_tunnel: Add UHBR tunneling support

Add the DPCD registers and detection required to support UHBR link rates over Thunderbolt tunnels.

Imre Deak committed 4 months ago

Commit b0b6d441 parent 7d594b23 files · +148 −1Browse files

Showing the changes to include/drm (2 of 3 files). Show all

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2 files
  1. include/drm/display/drm_dp.h +12 −0
  2. include/drm/display/drm_dp_tunnel.h +21 −0
include/drm/display/drm_dp.h+12−0
@@ -1497,6 +1497,18 @@ · 1496 unmodified lines
1497#define DP_TUNNELING_MAX_LANE_COUNT 0xe00291497#define DP_TUNNELING_MAX_LANE_COUNT 0xe0029
1498#define DP_TUNNELING_MAX_LANE_COUNT_MASK 0x1f1498#define DP_TUNNELING_MAX_LANE_COUNT_MASK 0x1f
1499 1499
1500#define DP_TUNNELING_MAIN_LINK_CHANNEL_CODING 0xe002b
1501#define DP_128B132B_DP_SUPPORTED (1 << 0)
1502
1503#define DP_TUNNELING_128B132B_LINK_RATE 0xe002c
1504#define DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT (1 << 2)
1505#define DP_TUNNELING_20GBPS_PER_LANE_SUPPORT (1 << 1)
1506#define DP_TUNNELING_10GBPS_PER_LANE_SUPPORT (1 << 0)
1507#define DP_TUNNELING_128B132B_LINK_RATE_MASK (DP_TUNNELING_10GBPS_PER_LANE_SUPPORT | \
1508 DP_TUNNELING_13_5GBPS_PER_LANE_SUPPORT | \
1509 DP_TUNNELING_20GBPS_PER_LANE_SUPPORT)
1510#define DP_TUNNELING_128B132B_LL_LANE0_MAPPING_SUPPORT (1 << 7)
1511
1500#define DP_DPTX_BW_ALLOCATION_MODE_CONTROL 0xe00301512#define DP_DPTX_BW_ALLOCATION_MODE_CONTROL 0xe0030
1501#define DP_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE (1 << 7)1513#define DP_DISPLAY_DRIVER_BW_ALLOCATION_MODE_ENABLE (1 << 7)
1502#define DP_UNMASK_BW_ALLOCATION_IRQ (1 << 6)1514#define DP_UNMASK_BW_ALLOCATION_IRQ (1 << 6)
include/drm/display/drm_dp_tunnel.h+21−0
@@ -63,6 +63,9 @@ void drm_dp_tunnel_set_io_error(struct drm_dp_tunnel *tunnel); · 62 unmodified lines
63int drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr,63int drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr,
64 struct drm_dp_aux *aux);64 struct drm_dp_aux *aux);
65 65
66bool drm_dp_tunnel_128b132b_supported(const struct drm_dp_tunnel *tunnel);
67bool drm_dp_tunnel_128b132b_lane0_mapping_supported(const struct drm_dp_tunnel *tunnel);
68u8 drm_dp_tunnel_128b132b_dprx_rates(const struct drm_dp_tunnel *tunnel);
66int drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel);69int drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel);
67int drm_dp_tunnel_max_dprx_lane_count(const struct drm_dp_tunnel *tunnel);70int drm_dp_tunnel_max_dprx_lane_count(const struct drm_dp_tunnel *tunnel);
68int drm_dp_tunnel_available_bw(const struct drm_dp_tunnel *tunnel);71int drm_dp_tunnel_available_bw(const struct drm_dp_tunnel *tunnel);
@@ -173,6 +176,24 @@ drm_dp_tunnel_handle_irq(struct drm_dp_tunnel_mgr *mgr, · 104 unmodified lines
173 return -EOPNOTSUPP;176 return -EOPNOTSUPP;
174}177}
175 178
179static inline bool
180drm_dp_tunnel_128b132b_supported(const struct drm_dp_tunnel *tunnel)
181{
182 return false;
183}
184
185static inline bool
186drm_dp_tunnel_128b132b_lane0_mapping_supported(const struct drm_dp_tunnel *tunnel)
187{
188 return false;
189}
190
191static inline u8
192drm_dp_tunnel_128b132b_dprx_rates(const struct drm_dp_tunnel *tunnel)
193{
194 return 0;
195}
196
176static inline int197static inline int
177drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel)198drm_dp_tunnel_max_dprx_rate(const struct drm_dp_tunnel *tunnel)
178{199{