History

Merge remote-tracking branch 'torvalds/master' into perf/core

Minor conflict in tools/perf/arch/arm/util/auxtrace.c as one fix there was cherry-picked for the last perf/urgent pull req to Linus, so was already there.

Arnaldo Carvalho de Melo committed 6 years ago

Commit b1aa3db2 parents 7c43b0c bcf87681009 files · +9599 −6464Browse files

Unified · Split

1009 files
  1. .mailmap +8 −0
  2. Documentation/ABI/testing/debugfs-driver-habanalabs +10 −1
  3. Documentation/admin-guide/README.rst +1 −1
  4. Documentation/arm64/cpu-feature-registers.rst +2 −0
  5. Documentation/block/bfq-iosched.rst +1 −8
  6. Documentation/core-api/dma-api.rst +8 −0
  7. Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml +3 −0
  8. Documentation/devicetree/bindings/sound/simple-card.yaml +13 −4
  9. Documentation/driver-api/ptp.rst +12 −0
  10. Documentation/filesystems/overlayfs.rst +2 −2
  11. Documentation/networking/arcnet.rst +1 −1
  12. Documentation/networking/ax25.rst +1 −1
  13. Documentation/networking/bareudp.rst +15 −9
  14. Documentation/networking/can_ucan_protocol.rst +2 −2
  15. Documentation/networking/devlink/devlink-trap.rst +4 −0
  16. Documentation/networking/dsa/dsa.rst +1 −1
  17. Documentation/networking/ip-sysctl.rst +1 −1
  18. Documentation/networking/ipvs-sysctl.rst +1 −1
  19. Documentation/networking/rxrpc.rst +1 −1
  20. Documentation/powerpc/vas-api.rst +1 −1
  21. Documentation/process/changes.rst +1 −1
  22. Documentation/process/coding-style.rst +20 −0
  23. Documentation/virt/kvm/api.rst +3 −2
  24. MAINTAINERS +29 −15
  25. Makefile +3 −3
  26. arch/arm/boot/dts/am437x-l4.dtsi +10 −4
  27. arch/arm/boot/dts/armada-38x.dtsi +2 −1
  28. arch/arm/boot/dts/imx6qdl-gw551x.dtsi +1 −1
  29. arch/arm/boot/dts/imx6qdl-icore.dtsi +2 −1
  30. arch/arm/boot/dts/imx6sx-sabreauto.dts +1 −1
  31. arch/arm/boot/dts/imx6sx-sdb.dtsi +1 −1
  32. arch/arm/boot/dts/keystone-k2g-evm.dts +1 −1
  33. arch/arm/boot/dts/meson.dtsi +1 −1
  34. arch/arm/boot/dts/omap3-n900.dts +8 −4
  35. arch/arm/boot/dts/socfpga.dtsi +1 −1
  36. arch/arm/boot/dts/socfpga_arria10.dtsi +1 −1
  37. arch/arm/boot/dts/sun4i-a10.dtsi +1 −1
  38. arch/arm/boot/dts/sun5i.dtsi +1 −1
  39. arch/arm/boot/dts/sun7i-a20.dtsi +1 −1
  40. arch/arm/include/asm/percpu.h +2 −0
  41. arch/arm/kernel/asm-offsets.c +0 −9
  42. arch/arm/kernel/hw_breakpoint.c +22 −5
  43. arch/arm/kernel/vdso.c +1 −0
  44. arch/arm/mach-imx/devices/devices-common.h +1 −1
  45. arch/arm/mach-imx/devices/platform-gpio-mxc.c +3 −2
  46. arch/arm/mach-imx/devices/platform-imx-dma.c +1 −5
  47. arch/arm/mach-imx/mm-imx21.c +1 −2
  48. arch/arm/mach-imx/mm-imx27.c +1 −2
  49. arch/arm/mach-omap2/omap_hwmod.c +11 −3
  50. arch/arm/mm/mmu.c +1 −1
  51. arch/arm64/Makefile +1 −1
  52. arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +1 −0
  53. arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +4 −4
  54. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +1 −0
  55. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +4 −3
  56. arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts +1 −1
  57. arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts +1 −1
  58. arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi +24 −0
  59. arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +5 −0
  60. arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +1 −0
  61. arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +1 −4
  62. arch/arm64/configs/defconfig +1 −1
  63. arch/arm64/include/asm/alternative.h +2 −2
  64. arch/arm64/include/asm/arch_timer.h +1 −0
  65. arch/arm64/include/asm/checksum.h +3 −2
  66. arch/arm64/include/asm/debug-monitors.h +2 −0
  67. arch/arm64/include/asm/kvm_host.h +8 −3
  68. arch/arm64/include/asm/pgtable-prot.h +1 −1
  69. arch/arm64/include/asm/smp.h +0 −1
  70. arch/arm64/include/asm/syscall.h +11 −1
  71. arch/arm64/include/asm/thread_info.h +1 −0
  72. arch/arm64/include/asm/vdso/clocksource.h +5 −2
  73. arch/arm64/include/asm/vdso/compat_gettimeofday.h +7 −1
  74. arch/arm64/kernel/alternative.c +2 −14
  75. arch/arm64/kernel/cpu_errata.c +1 −0
  76. arch/arm64/kernel/debug-monitors.c +18 −6
  77. arch/arm64/kernel/entry-common.c +1 −1
  78. arch/arm64/kernel/entry.S +31 −21
  79. arch/arm64/kernel/kgdb.c +1 −1
  80. arch/arm64/kernel/ptrace.c +37 −12
  81. arch/arm64/kernel/signal.c +2 −9
  82. arch/arm64/kernel/syscall.c +19 −2
  83. arch/arm64/kernel/vdso32/Makefile +1 −1
  84. arch/arm64/kvm/mmu.c +6 −5
  85. arch/mips/include/asm/unroll.h +3 −5
  86. arch/mips/kvm/emulate.c +4 −0
  87. arch/mips/pci/pci-xtalk-bridge.c +3 −2
  88. arch/parisc/include/asm/atomic.h +2 −0
  89. arch/parisc/include/asm/cmpxchg.h +2 −0
  90. arch/parisc/lib/bitops.c +12 −0
  91. arch/powerpc/include/asm/icswx.h +2 −0
  92. arch/powerpc/kernel/exceptions-64s.S +12 −4
  93. arch/powerpc/kernel/paca.c +1 −1
  94. arch/powerpc/mm/book3s64/hash_utils.c +25 −0
  95. arch/powerpc/mm/book3s64/pkeys.c +7 −5
  96. arch/powerpc/perf/core-book3s.c +6 −0
  97. arch/powerpc/platforms/powernv/vas-fault.c +1 −1
  98. arch/riscv/Kconfig +2 −0
  99. arch/riscv/include/asm/barrier.h +9 −1
  100. arch/riscv/include/asm/gdb_xml.h +1 −2
  101. arch/riscv/include/asm/kgdb.h +3 −2
  102. arch/riscv/include/asm/thread_info.h +4 −0
  103. arch/riscv/kernel/kgdb.c +5 −5
  104. arch/riscv/mm/init.c +45 −21
  105. arch/riscv/mm/kasan_init.c +2 −2
  106. arch/s390/kernel/perf_cpum_cf_events.c +2 −2
  107. arch/s390/mm/hugetlbpage.c +1 −1
  108. arch/sh/include/asm/pgalloc.h +1 −9
  109. arch/sh/kernel/entry-common.S +3 −3
  110. arch/x86/boot/compressed/Makefile +2 −2
  111. arch/x86/entry/Makefile +11 −3
  112. arch/x86/entry/common.c +2 −2
  113. arch/x86/include/asm/idtentry.h +10 −12
  114. arch/x86/include/asm/io_bitmap.h +16 −0
  115. arch/x86/include/asm/iosf_mbi.h +1 −0
  116. arch/x86/include/asm/paravirt.h +5 −0
  117. arch/x86/include/asm/paravirt_types.h +1 −0
  118. arch/x86/include/uapi/asm/kvm.h +3 −2
  119. arch/x86/kernel/apic/io_apic.c +5 −5
  120. arch/x86/kernel/apic/msi.c +12 −6
  121. arch/x86/kernel/apic/vector.c +5 −18
  122. arch/x86/kernel/dumpstack.c +17 −10
  123. arch/x86/kernel/fpu/xstate.c +1 −1
  124. arch/x86/kernel/i8259.c +1 −1
  125. arch/x86/kernel/paravirt.c +2 −1
  126. arch/x86/kernel/process.c +2 −16
  127. arch/x86/kernel/stacktrace.c +0 −5
  128. arch/x86/kernel/traps.c +2 −0
  129. arch/x86/kernel/unwind_orc.c +6 −2
  130. arch/x86/kernel/vmlinux.lds.S +1 −0
  131. arch/x86/kvm/lapic.c +1 −1
  132. arch/x86/kvm/svm/svm.c +6 −3
  133. arch/x86/kvm/vmx/nested.c +14 −3
  134. arch/x86/kvm/vmx/nested.h +5 −0
  135. arch/x86/math-emu/wm_sqrt.S +1 −1
  136. arch/x86/platform/uv/uv_irq.c +2 −1
  137. arch/x86/xen/enlighten_pv.c +12 −0
  138. arch/xtensa/include/asm/checksum.h +1 −1
  139. arch/xtensa/kernel/perf_event.c +1 −3
  140. arch/xtensa/kernel/setup.c +2 −1
  141. arch/xtensa/kernel/xtensa_ksyms.c +2 −2
  142. block/blk-mq.c +2 −2
  143. crypto/asymmetric_keys/public_key.c +1 −0
  144. drivers/android/binder_alloc.c +1 −1
  145. drivers/atm/atmtcp.c +8 −2
  146. drivers/base/base.h +0 −1
  147. drivers/base/core.c +32 −12
  148. drivers/base/dd.c +0 −5
  149. drivers/base/property.c +1 −1
  150. drivers/base/regmap/Kconfig +1 −1
  151. drivers/base/regmap/regmap-debugfs.c +29 −23
  152. drivers/base/regmap/regmap.c +1 −1
  153. drivers/block/nbd.c +15 −10
  154. drivers/block/zram/zram_drv.c +2 −1
  155. drivers/bus/ti-sysc.c +34 −11
  156. drivers/char/mem.c +7 −3
  157. drivers/char/random.c +1 −0
  158. drivers/char/virtio_console.c +2 −1
  159. drivers/clk/Kconfig +1 −0
  160. drivers/clk/clk-ast2600.c +41 −8
  161. drivers/clk/mvebu/Kconfig +1 −0
  162. drivers/clocksource/arm_arch_timer.c +11 −0
  163. drivers/clocksource/timer-ti-dm-systimer.c +36 −10
  164. drivers/counter/104-quad-8.c +19 −3
  165. drivers/cpufreq/intel_pstate.c +6 −2
  166. drivers/crypto/chelsio/chtls/chtls_cm.c +1 −1
  167. drivers/crypto/chelsio/chtls/chtls_io.c +4 −3
  168. drivers/dma-buf/dma-buf.c +7 −4
  169. drivers/dma/dmatest.c +2 −0
  170. drivers/dma/dw/core.c +0 −12
  171. drivers/dma/fsl-edma-common.c +16 −12
  172. drivers/dma/fsl-edma-common.h +1 −1
  173. drivers/dma/fsl-edma.c +7 −0
  174. drivers/dma/idxd/cdev.c +16 −3
  175. drivers/dma/idxd/device.c +25 −0
  176. drivers/dma/idxd/idxd.h +1 −0
  177. drivers/dma/idxd/irq.c +2 −1
  178. drivers/dma/idxd/sysfs.c +5 −0
  179. drivers/dma/imx-sdma.c +4 −7
  180. drivers/dma/ioat/dma.c +12 −0
  181. drivers/dma/ioat/dma.h +0 −2
  182. drivers/dma/mcf-edma.c +7 −0
  183. drivers/dma/sh/usb-dmac.c +2 −0
  184. drivers/dma/tegra210-adma.c +4 −1
  185. drivers/dma/ti/k3-udma-private.c +1 −0
  186. drivers/dma/ti/k3-udma.c +19 −20
  187. drivers/firmware/efi/efi-pstore.c +1 −4
  188. drivers/firmware/efi/efi.c +8 −4
  189. drivers/firmware/efi/efivars.c +1 −4
  190. drivers/firmware/efi/libstub/Makefile +1 −2
  191. drivers/firmware/efi/libstub/alignedmem.c +1 −1
  192. drivers/firmware/efi/libstub/arm64-stub.c +14 −11
  193. drivers/firmware/efi/libstub/efi-stub-helper.c +1 −1
  194. drivers/firmware/efi/libstub/efi-stub.c +0 −17
  195. drivers/firmware/efi/libstub/efistub.h +16 −0
  196. drivers/firmware/efi/libstub/x86-stub.c +4 −4
  197. drivers/firmware/efi/vars.c +6 −0
  198. drivers/firmware/psci/psci_checker.c +5 −3
  199. drivers/firmware/qemu_fw_cfg.c +4 −3
  200. drivers/fpga/dfl-afu-main.c +2 −1
  201. drivers/fpga/dfl-pci.c +2 −1
  202. drivers/gpio/gpio-arizona.c +6 −1
  203. drivers/gpio/gpio-pca953x.c +94 −5
  204. drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +15 −5
  205. drivers/gpu/drm/amd/amdgpu/amdgpu_job.c +2 −1
  206. drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +2 −1
  207. drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +59 −4
  208. drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +8 −1
  209. drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +8 −18
  210. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +42 −10
  211. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +10 −1
  212. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +26 −27
  213. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h +3 −0
  214. drivers/gpu/drm/amd/display/dc/core/dc_stream.c +16 −3
  215. drivers/gpu/drm/amd/powerplay/renoir_ppt.c +1 −1
  216. drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c +6 −4
  217. drivers/gpu/drm/aspeed/aspeed_gfx_drv.c +1 −2
  218. drivers/gpu/drm/bochs/bochs_kms.c +1 −0
  219. drivers/gpu/drm/bridge/adv7511/adv7511_drv.c +1 −0
  220. drivers/gpu/drm/bridge/nwl-dsi.c +0 −5
  221. drivers/gpu/drm/drm_fb_helper.c +5 −1
  222. drivers/gpu/drm/drm_gem.c +4 −6
  223. drivers/gpu/drm/drm_mipi_dbi.c +1 −1
  224. drivers/gpu/drm/drm_of.c +1 −3
  225. drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c +3 −2
  226. drivers/gpu/drm/i915/display/intel_display.c +11 −0
  227. drivers/gpu/drm/i915/display/intel_display.h +1 −0
  228. drivers/gpu/drm/i915/display/intel_fbc.c +36 −29
  229. drivers/gpu/drm/i915/display/intel_hdmi.c +2 −8
  230. drivers/gpu/drm/i915/gt/intel_context.c +6 −6
  231. drivers/gpu/drm/i915/gt/intel_lrc.c +5 −14
  232. drivers/gpu/drm/i915/gt/selftest_rps.c +4 −4
  233. drivers/gpu/drm/i915/i915_debugfs.c +1 −1
  234. drivers/gpu/drm/i915/i915_drv.h +4 −3
  235. drivers/gpu/drm/i915/i915_perf.c +1 −0
  236. drivers/gpu/drm/i915/i915_vma.c +6 −9
  237. drivers/gpu/drm/lima/lima_pp.c +2 −0
  238. drivers/gpu/drm/mcde/mcde_display.c +8 −3
  239. drivers/gpu/drm/mediatek/Kconfig +1 −1
  240. drivers/gpu/drm/mediatek/mtk_drm_crtc.c +2 −6
  241. drivers/gpu/drm/mediatek/mtk_drm_drv.c +2 −4
  242. drivers/gpu/drm/mediatek/mtk_drm_plane.c +15 −10
  243. drivers/gpu/drm/mediatek/mtk_dsi.c +1 −4
  244. drivers/gpu/drm/mediatek/mtk_hdmi.c +1 −11
  245. drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c +0 −52
  246. drivers/gpu/drm/meson/meson_registers.h +6 −0
  247. drivers/gpu/drm/meson/meson_viu.c +2 −9
  248. drivers/gpu/drm/nouveau/dispnv50/disp.c +5 −2
  249. drivers/gpu/drm/nouveau/nouveau_display.c +25 −2
  250. drivers/gpu/drm/nouveau/nouveau_dmem.c +1 −1
  251. drivers/gpu/drm/nouveau/nouveau_fbcon.c +2 −1
  252. drivers/gpu/drm/nouveau/nouveau_svm.c +1 −0
  253. drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c +21 −9
  254. drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c +2 −2
  255. drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c +2 −2
  256. drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +3 −3
  257. drivers/gpu/drm/panel/panel-simple.c +15 −1
  258. drivers/gpu/drm/radeon/ci_dpm.c +3 −4
  259. drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +1 −1
  260. drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c +4 −4
  261. drivers/hid/hid-alps.c +2 −0
  262. drivers/hid/hid-apple.c +18 −0
  263. drivers/hid/hid-ids.h +3 −0
  264. drivers/hid/hid-logitech-dj.c +3 −3
  265. drivers/hid/hid-logitech-hidpp.c +1 −1
  266. drivers/hid/hid-magicmouse.c +6 −0
  267. drivers/hid/hid-quirks.c +2 −0
  268. drivers/hid/hid-steam.c +4 −2
  269. drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c +8 −0
  270. drivers/hwmon/amd_energy.c +1 −1
  271. drivers/hwmon/aspeed-pwm-tacho.c +2 −0
  272. drivers/hwmon/drivetemp.c +43 −0
  273. drivers/hwmon/emc2103.c +1 −1
  274. drivers/hwmon/nct6775.c +3 −3
  275. drivers/hwmon/pmbus/adm1275.c +8 −2
  276. drivers/hwmon/scmi-hwmon.c +1 −1
  277. drivers/hwtracing/coresight/coresight-cti.c +54 −42
  278. drivers/hwtracing/coresight/coresight-etm4x.c +53 −29
  279. drivers/hwtracing/intel_th/core.c +18 −3
  280. drivers/hwtracing/intel_th/pci.c +15 −0
  281. drivers/hwtracing/intel_th/sth.c +1 −3
  282. drivers/i2c/busses/i2c-cadence.c +12 −16
  283. drivers/i2c/busses/i2c-qcom-geni.c +4 −2
  284. drivers/i2c/busses/i2c-rcar.c +3 −0
  285. drivers/i2c/i2c-core-slave.c +4 −3
  286. drivers/iio/accel/mma8452.c +4 −1
  287. drivers/iio/adc/ad7780.c +1 −1
  288. drivers/iio/adc/adi-axi-adc.c +2 −2
  289. drivers/iio/health/afe4403.c +6 −3
  290. drivers/iio/health/afe4404.c +5 −3
  291. drivers/iio/humidity/hdc100x.c +7 −3
  292. drivers/iio/humidity/hts221.h +5 −2
  293. drivers/iio/humidity/hts221_buffer.c +5 −4
  294. drivers/iio/industrialio-core.c +2 −0
  295. drivers/iio/magnetometer/ak8974.c +17 −12
  296. drivers/iio/pressure/ms5611_core.c +8 −3
  297. drivers/iio/pressure/zpa2326.c +3 −1
  298. drivers/infiniband/core/cm.c +2 −0
  299. drivers/infiniband/core/cq.c +11 −3
  300. drivers/infiniband/core/rdma_core.c +3 −3
  301. drivers/infiniband/core/sa_query.c +17 −21
  302. drivers/infiniband/core/ucma.c +4 −0
  303. drivers/infiniband/hw/hfi1/init.c +28 −9
  304. drivers/infiniband/hw/hfi1/qp.c +5 −2
  305. drivers/infiniband/hw/hfi1/tid_rdma.c +4 −1
  306. drivers/infiniband/hw/hns/hns_roce_hw_v2.c +22 −12
  307. drivers/infiniband/hw/hns/hns_roce_mr.c +1 −1
  308. drivers/infiniband/hw/mlx5/main.c +1 −1
  309. drivers/infiniband/hw/mlx5/odp.c +21 −6
  310. drivers/infiniband/hw/mlx5/qp.c +22 −14
  311. drivers/infiniband/hw/mlx5/srq_cmd.c +2 −2
  312. drivers/infiniband/sw/rdmavt/qp.c +4 −29
  313. drivers/infiniband/sw/rdmavt/rc.c +1 −3
  314. drivers/infiniband/sw/siw/siw_main.c +2 −1
  315. drivers/input/mouse/elan_i2c_core.c +5 −4
  316. drivers/input/mouse/synaptics.c +1 −0
  317. drivers/input/serio/i8042-x86ia64io.h +7 −0
  318. drivers/input/touchscreen/elants_i2c.c +0 −1
  319. drivers/interconnect/core.c +9 −3
  320. drivers/interconnect/qcom/msm8916.c +7 −7
  321. drivers/iommu/Kconfig +1 −0
  322. drivers/iommu/amd/amd_iommu.h +1 −1
  323. drivers/iommu/amd/iommu.c +3 −2
  324. drivers/iommu/arm-smmu-qcom.c +1 −1
  325. drivers/iommu/hyperv-iommu.c +4 −1
  326. drivers/iommu/intel/irq_remapping.c +1 −1
  327. drivers/iommu/iommu.c +1 −1
  328. drivers/iommu/qcom_iommu.c +17 −20
  329. drivers/iommu/sun50i-iommu.c +3 −5
  330. drivers/md/dm-integrity.c +2 −2
  331. drivers/md/dm-rq.c +0 −4
  332. drivers/md/dm-writecache.c +6 −0
  333. drivers/md/dm-zoned-metadata.c +8 −1
  334. drivers/md/dm-zoned-reclaim.c +3 −4
  335. drivers/md/dm-zoned-target.c +1 −9
  336. drivers/md/dm.c +70 −31
  337. drivers/mfd/ioc3.c +3 −2
  338. drivers/misc/atmel-ssc.c +12 −12
  339. drivers/misc/habanalabs/command_submission.c +11 −3
  340. drivers/misc/habanalabs/debugfs.c +8 −15
  341. drivers/misc/habanalabs/device.c +1 −1
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  928. sound/drivers/opl3/opl3_synth.c +2 −0
  929. sound/pci/hda/hda_auto_parser.c +6 −0
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  995. tools/testing/selftests/net/fib_nexthop_multiprefix.sh +1 −1
  996. tools/testing/selftests/net/fib_nexthops.sh +13 −0
  997. tools/testing/selftests/net/forwarding/ethtool.sh +0 −2
  998. tools/testing/selftests/net/ip_defrag.sh +2 −0
  999. tools/testing/selftests/net/psock_fanout.c +2 −1
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  1001. tools/testing/selftests/net/so_txtime.c +1 −1
  1002. tools/testing/selftests/net/tcp_mmap.c +3 −3
  1003. tools/testing/selftests/net/txtimestamp.sh +1 −1
  1004. tools/testing/selftests/powerpc/nx-gzip/gunz_test.c +2 −2
  1005. tools/testing/selftests/powerpc/nx-gzip/gzfht_test.c +2 −2
  1006. tools/testing/selftests/tpm2/test_smoke.sh +2 −2
  1007. tools/testing/selftests/tpm2/test_space.sh +1 −1
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.mailmap+8−0
@@ -90,11 +90,16 @@ Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com> · 89 unmodified lines
90Frank Zago <fzago@systemfabricworks.com>90Frank Zago <fzago@systemfabricworks.com>
91Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com>91Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com>
92Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>92Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>
93Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>
94Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com>
95Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@linux.vnet.ibm.com>
93Greg Kroah-Hartman <greg@echidna.(none)>96Greg Kroah-Hartman <greg@echidna.(none)>
94Greg Kroah-Hartman <gregkh@suse.de>97Greg Kroah-Hartman <gregkh@suse.de>
95Greg Kroah-Hartman <greg@kroah.com>98Greg Kroah-Hartman <greg@kroah.com>
96Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>99Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com>
97Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>100Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org>
101Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com>
102Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com>
98Henk Vergonet <Henk.Vergonet@gmail.com>103Henk Vergonet <Henk.Vergonet@gmail.com>
99Henrik Kretzschmar <henne@nachtwindheim.de>104Henrik Kretzschmar <henne@nachtwindheim.de>
100Henrik Rydberg <rydberg@bitmath.org>105Henrik Rydberg <rydberg@bitmath.org>
@@ -193,6 +198,9 @@ Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> · 92 unmodified lines
193Mayuresh Janorkar <mayur@ti.com>198Mayuresh Janorkar <mayur@ti.com>
194Michael Buesch <m@bues.ch>199Michael Buesch <m@bues.ch>
195Michel Dänzer <michel@tungstengraphics.com>200Michel Dänzer <michel@tungstengraphics.com>
201Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
202Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
203Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
196Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>204Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
197Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>205Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
198Mitesh shah <mshah@teja.com>206Mitesh shah <mshah@teja.com>
Documentation/ABI/testing/debugfs-driver-habanalabs+10−1
@@ -16,7 +16,16 @@ Description: Allow the root user to disable/enable in runtime the clock · 15 unmodified lines
16 gating mechanism in Gaudi. Due to how Gaudi is built, the16 gating mechanism in Gaudi. Due to how Gaudi is built, the
17 clock gating needs to be disabled in order to access the17 clock gating needs to be disabled in order to access the
18 registers of the TPC and MME engines. This is sometimes needed18 registers of the TPC and MME engines. This is sometimes needed
19 during debug by the user and hence the user needs this option19 during debug by the user and hence the user needs this option.
20 The user can supply a bitmask value, each bit represents
21 a different engine to disable/enable its clock gating feature.
22 The bitmask is composed of 20 bits:
23 0 - 7 : DMA channels
24 8 - 11 : MME engines
25 12 - 19 : TPC engines
26 The bit's location of a specific engine can be determined
27 using (1 << GAUDI_ENGINE_ID_*). GAUDI_ENGINE_ID_* values
28 are defined in uapi habanalabs.h file in enum gaudi_engine_id
20 29
21What: /sys/kernel/debug/habanalabs/hl<n>/command_buffers30What: /sys/kernel/debug/habanalabs/hl<n>/command_buffers
22Date: Jan 201931Date: Jan 2019
Documentation/admin-guide/README.rst+1−1
@@ -258,7 +258,7 @@ Configuring the kernel · 257 unmodified lines
258Compiling the kernel258Compiling the kernel
259--------------------259--------------------
260 260
261 - Make sure you have at least gcc 4.6 available.261 - Make sure you have at least gcc 4.9 available.
262 For more information, refer to :ref:`Documentation/process/changes.rst <changes>`.262 For more information, refer to :ref:`Documentation/process/changes.rst <changes>`.
263 263
264 Please note that you can still run a.out user programs with this kernel.264 Please note that you can still run a.out user programs with this kernel.
Documentation/arm64/cpu-feature-registers.rst+2−0
@@ -171,6 +171,7 @@ infrastructure: · 170 unmodified lines
171 171
172 172
173 3) ID_AA64PFR1_EL1 - Processor Feature Register 1173 3) ID_AA64PFR1_EL1 - Processor Feature Register 1
174
174 +------------------------------+---------+---------+175 +------------------------------+---------+---------+
175 | Name | bits | visible |176 | Name | bits | visible |
176 +------------------------------+---------+---------+177 +------------------------------+---------+---------+
@@ -181,6 +182,7 @@ infrastructure: · 4 unmodified lines
181 182
182 183
183 4) MIDR_EL1 - Main ID Register184 4) MIDR_EL1 - Main ID Register
185
184 +------------------------------+---------+---------+186 +------------------------------+---------+---------+
185 | Name | bits | visible |187 | Name | bits | visible |
186 +------------------------------+---------+---------+188 +------------------------------+---------+---------+
Documentation/block/bfq-iosched.rst+1−8
@@ -492,13 +492,6 @@ set max_budget to higher values than those to which BFQ would have set · 491 unmodified lines
492it with auto-tuning. An alternative way to achieve this goal is to492it with auto-tuning. An alternative way to achieve this goal is to
493just increase the value of timeout_sync, leaving max_budget equal to 0.493just increase the value of timeout_sync, leaving max_budget equal to 0.
494 494
495weights
496-------
497
498Read-only parameter, used to show the weights of the currently active
499BFQ queues.
500
501
5024. Group scheduling with BFQ4954. Group scheduling with BFQ
503============================496============================
504 497
@@ -566,7 +559,7 @@ Parameters to set · 61 unmodified lines
566For each group, there is only the following parameter to set.559For each group, there is only the following parameter to set.
567 560
568weight (namely blkio.bfq.weight or io.bfq-weight): the weight of the561weight (namely blkio.bfq.weight or io.bfq-weight): the weight of the
569group inside its parent. Available values: 1..10000 (default 100). The562group inside its parent. Available values: 1..1000 (default 100). The
570linear mapping between ioprio and weights, described at the beginning563linear mapping between ioprio and weights, described at the beginning
571of the tunable section, is still valid, but all weights higher than564of the tunable section, is still valid, but all weights higher than
572IOPRIO_BE_NR*10 are mapped to ioprio 0.565IOPRIO_BE_NR*10 are mapped to ioprio 0.
Documentation/core-api/dma-api.rst+8−0
@@ -204,6 +204,14 @@ Returns the maximum size of a mapping for the device. The size parameter · 203 unmodified lines
204of the mapping functions like dma_map_single(), dma_map_page() and204of the mapping functions like dma_map_single(), dma_map_page() and
205others should not be larger than the returned value.205others should not be larger than the returned value.
206 206
207::
208
209 bool
210 dma_need_sync(struct device *dev, dma_addr_t dma_addr);
211
212Returns %true if dma_sync_single_for_{device,cpu} calls are required to
213transfer memory ownership. Returns %false if those calls can be skipped.
214
207::215::
208 216
209 unsigned long217 unsigned long
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml+3−0
@@ -47,6 +47,9 @@ properties: · 46 unmodified lines
47 $ref: /schemas/types.yaml#/definitions/phandle-array47 $ref: /schemas/types.yaml#/definitions/phandle-array
48 description: Phandle to the device SRAM48 description: Phandle to the device SRAM
49 49
50 iommus:
51 maxItems: 1
52
50 memory-region:53 memory-region:
51 description:54 description:
52 CMA pool to use for buffers allocation instead of the default55 CMA pool to use for buffers allocation instead of the default
Documentation/devicetree/bindings/sound/simple-card.yaml+13−4
@@ -378,6 +378,8 @@ examples: · 377 unmodified lines
378 - |378 - |
379 sound {379 sound {
380 compatible = "simple-audio-card";380 compatible = "simple-audio-card";
381 #address-cells = <1>;
382 #size-cells = <0>;
381 383
382 simple-audio-card,name = "rsnd-ak4643";384 simple-audio-card,name = "rsnd-ak4643";
383 simple-audio-card,format = "left_j";385 simple-audio-card,format = "left_j";
@@ -391,10 +393,12 @@ examples: · 7 unmodified lines
391 "ak4642 Playback", "DAI1 Playback";393 "ak4642 Playback", "DAI1 Playback";
392 394
393 dpcmcpu: simple-audio-card,cpu@0 {395 dpcmcpu: simple-audio-card,cpu@0 {
396 reg = <0>;
394 sound-dai = <&rcar_sound 0>;397 sound-dai = <&rcar_sound 0>;
395 };398 };
396 399
397 simple-audio-card,cpu@1 {400 simple-audio-card,cpu@1 {
401 reg = <1>;
398 sound-dai = <&rcar_sound 1>;402 sound-dai = <&rcar_sound 1>;
399 };403 };
400 404
@@ -418,6 +422,8 @@ examples: · 17 unmodified lines
418 - |422 - |
419 sound {423 sound {
420 compatible = "simple-audio-card";424 compatible = "simple-audio-card";
425 #address-cells = <1>;
426 #size-cells = <0>;
421 427
422 simple-audio-card,routing =428 simple-audio-card,routing =
423 "pcm3168a Playback", "DAI1 Playback",429 "pcm3168a Playback", "DAI1 Playback",
@@ -426,6 +432,7 @@ examples: · 2 unmodified lines
426 "pcm3168a Playback", "DAI4 Playback";432 "pcm3168a Playback", "DAI4 Playback";
427 433
428 simple-audio-card,dai-link@0 {434 simple-audio-card,dai-link@0 {
435 reg = <0>;
429 format = "left_j";436 format = "left_j";
430 bitclock-master = <&sndcpu0>;437 bitclock-master = <&sndcpu0>;
431 frame-master = <&sndcpu0>;438 frame-master = <&sndcpu0>;
@@ -439,22 +446,23 @@ examples: · 7 unmodified lines
439 };446 };
440 447
441 simple-audio-card,dai-link@1 {448 simple-audio-card,dai-link@1 {
449 reg = <1>;
442 format = "i2s";450 format = "i2s";
443 bitclock-master = <&sndcpu1>;451 bitclock-master = <&sndcpu1>;
444 frame-master = <&sndcpu1>;452 frame-master = <&sndcpu1>;
445 453
446 convert-channels = <8>; /* TDM Split */454 convert-channels = <8>; /* TDM Split */
447 455
448 sndcpu1: cpu@0 {456 sndcpu1: cpu0 {
449 sound-dai = <&rcar_sound 1>;457 sound-dai = <&rcar_sound 1>;
450 };458 };
451 cpu@1 {459 cpu1 {
452 sound-dai = <&rcar_sound 2>;460 sound-dai = <&rcar_sound 2>;
453 };461 };
454 cpu@2 {462 cpu2 {
455 sound-dai = <&rcar_sound 3>;463 sound-dai = <&rcar_sound 3>;
456 };464 };
457 cpu@3 {465 cpu3 {
458 sound-dai = <&rcar_sound 4>;466 sound-dai = <&rcar_sound 4>;
459 };467 };
460 codec {468 codec {
@@ -466,6 +474,7 @@ examples: · 5 unmodified lines
466 };474 };
467 475
468 simple-audio-card,dai-link@2 {476 simple-audio-card,dai-link@2 {
477 reg = <2>;
469 format = "i2s";478 format = "i2s";
470 bitclock-master = <&sndcpu2>;479 bitclock-master = <&sndcpu2>;
471 frame-master = <&sndcpu2>;480 frame-master = <&sndcpu2>;
Documentation/driver-api/ptp.rst+12−0
@@ -23,6 +23,7 @@ PTP hardware clock infrastructure for Linux · 22 unmodified lines
23 + Ancillary clock features23 + Ancillary clock features
24 - Time stamp external events24 - Time stamp external events
25 - Period output signals configurable from user space25 - Period output signals configurable from user space
26 - Low Pass Filter (LPF) access from user space
26 - Synchronization of the Linux system time via the PPS subsystem27 - Synchronization of the Linux system time via the PPS subsystem
27 28
28PTP hardware clock kernel API29PTP hardware clock kernel API
@@ -94,3 +95,14 @@ Supported hardware · 65 unmodified lines
94 95
95 - Auxiliary Slave/Master Mode Snapshot (optional interrupt)96 - Auxiliary Slave/Master Mode Snapshot (optional interrupt)
96 - Target Time (optional interrupt)97 - Target Time (optional interrupt)
98
99 * Renesas (IDT) ClockMatrix™
100
101 - Up to 4 independent PHC channels
102 - Integrated low pass filter (LPF), access via .adjPhase (compliant to ITU-T G.8273.2)
103 - Programmable output periodic signals
104 - Programmable inputs can time stamp external triggers
105 - Driver and/or hardware configuration through firmware (idtcm.bin)
106 - LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.8273.2))
107 - Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk to ASSPs/SoCs/FPGAs)
108 - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)
Documentation/filesystems/overlayfs.rst+2−2
@@ -560,8 +560,8 @@ When the NFS export feature is enabled, all directory index entries are · 559 unmodified lines
560verified on mount time to check that upper file handles are not stale.560verified on mount time to check that upper file handles are not stale.
561This verification may cause significant overhead in some cases.561This verification may cause significant overhead in some cases.
562 562
563Note: the mount options index=off,nfs_export=on are conflicting and will563Note: the mount options index=off,nfs_export=on are conflicting for a
564result in an error.564read-write mount and will result in an error.
565 565
566 566
567Testsuite567Testsuite
Documentation/networking/arcnet.rst+1−1
@@ -434,7 +434,7 @@ can set up your network then: · 433 unmodified lines
434 ifconfig arc0 insight434 ifconfig arc0 insight
435 route add insight arc0435 route add insight arc0
436 route add freedom arc0 /* I would use the subnet here (like I said436 route add freedom arc0 /* I would use the subnet here (like I said
437 to to in "single protocol" above),437 to in "single protocol" above),
438 but the rest of the subnet438 but the rest of the subnet
439 unfortunately lies across the PPP439 unfortunately lies across the PPP
440 link on freedom, which confuses440 link on freedom, which confuses
Documentation/networking/ax25.rst+1−1
@@ -6,7 +6,7 @@ AX.25 · 5 unmodified lines
6 6
7To use the amateur radio protocols within Linux you will need to get a7To use the amateur radio protocols within Linux you will need to get a
8suitable copy of the AX.25 Utilities. More detailed information about8suitable copy of the AX.25 Utilities. More detailed information about
9AX.25, NET/ROM and ROSE, associated programs and and utilities can be9AX.25, NET/ROM and ROSE, associated programs and utilities can be
10found on http://www.linux-ax25.org.10found on http://www.linux-ax25.org.
11 11
12There is an active mailing list for discussing Linux amateur radio matters12There is an active mailing list for discussing Linux amateur radio matters
Documentation/networking/bareudp.rst+15−9
@@ -8,9 +8,8 @@ There are various L3 encapsulation standards using UDP being discussed to · 7 unmodified lines
8leverage the UDP based load balancing capability of different networks.8leverage the UDP based load balancing capability of different networks.
9MPLSoUDP (__ https://tools.ietf.org/html/rfc7510) is one among them.9MPLSoUDP (__ https://tools.ietf.org/html/rfc7510) is one among them.
10 10
11The Bareudp tunnel module provides a generic L3 encapsulation tunnelling11The Bareudp tunnel module provides a generic L3 encapsulation support for
12support for tunnelling different L3 protocols like MPLS, IP, NSH etc. inside12tunnelling different L3 protocols like MPLS, IP, NSH etc. inside a UDP tunnel.
13a UDP tunnel.
14 13
15Special Handling14Special Handling
16----------------15----------------
@@ -26,7 +25,7 @@ Usage · 9 unmodified lines
26 25
271) Device creation & deletion261) Device creation & deletion
28 27
29 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847.28 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc
30 29
31 This creates a bareudp tunnel device which tunnels L3 traffic with ethertype30 This creates a bareudp tunnel device which tunnels L3 traffic with ethertype
32 0x8847 (MPLS traffic). The destination port of the UDP header will be set to31 0x8847 (MPLS traffic). The destination port of the UDP header will be set to
@@ -34,14 +33,21 @@ Usage · 1 unmodified line
34 33
35 b) ip link delete bareudp034 b) ip link delete bareudp0
36 35
372) Device creation with multiple proto mode enabled362) Device creation with multiproto mode enabled
38 37
39There are two ways to create a bareudp device for MPLS & IP with multiproto mode38The multiproto mode allows bareudp tunnels to handle several protocols of the
40enabled.39same family. It is currently only available for IP and MPLS. This mode has to
40be enabled explicitly with the "multiproto" flag.
41 41
42 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847 multiproto42 a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype ipv4 multiproto
43 43
44 b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls44 For an IPv4 tunnel the multiproto mode allows the tunnel to also handle
45 IPv6.
46
47 b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc multiproto
48
49 For MPLS, the multiproto mode allows the tunnel to handle both unicast
50 and multicast MPLS packets.
45 51
463) Device Usage523) Device Usage
47 53
Documentation/networking/can_ucan_protocol.rst+2−2
@@ -144,7 +144,7 @@ UCAN_COMMAND_SET_BITTIMING · 143 unmodified lines
144 144
145*Host2Dev; mandatory*145*Host2Dev; mandatory*
146 146
147Setup bittiming by sending the the structure147Setup bittiming by sending the structure
148``ucan_ctl_payload_t.cmd_set_bittiming`` (see ``struct bittiming`` for148``ucan_ctl_payload_t.cmd_set_bittiming`` (see ``struct bittiming`` for
149details)149details)
150 150
@@ -232,7 +232,7 @@ UCAN_IN_TX_COMPLETE · 81 unmodified lines
232 zero232 zero
233 233
234The CAN device has sent a message to the CAN bus. It answers with a234The CAN device has sent a message to the CAN bus. It answers with a
235list of of tuples <echo-ids, flags>.235list of tuples <echo-ids, flags>.
236 236
237The echo-id identifies the frame from (echos the id from a previous237The echo-id identifies the frame from (echos the id from a previous
238UCAN_OUT_TX message). The flag indicates the result of the238UCAN_OUT_TX message). The flag indicates the result of the
Documentation/networking/devlink/devlink-trap.rst+4−0
@@ -486,6 +486,10 @@ narrow. The description of these groups must be added to the following table: · 485 unmodified lines
486 - Contains packet traps for packets that should be locally delivered after486 - Contains packet traps for packets that should be locally delivered after
487 routing, but do not match more specific packet traps (e.g.,487 routing, but do not match more specific packet traps (e.g.,
488 ``ipv4_bgp``)488 ``ipv4_bgp``)
489 * - ``external_delivery``
490 - Contains packet traps for packets that should be routed through an
491 external interface (e.g., management interface) that does not belong to
492 the same device (e.g., switch ASIC) as the ingress interface
489 * - ``ipv6``493 * - ``ipv6``
490 - Contains packet traps for various IPv6 control packets (e.g., Router494 - Contains packet traps for various IPv6 control packets (e.g., Router
491 Advertisements)495 Advertisements)
Documentation/networking/dsa/dsa.rst+1−1
@@ -95,7 +95,7 @@ Ethernet switch. · 94 unmodified lines
95Networking stack hooks95Networking stack hooks
96----------------------96----------------------
97 97
98When a master netdev is used with DSA, a small hook is placed in in the98When a master netdev is used with DSA, a small hook is placed in the
99networking stack is in order to have the DSA subsystem process the Ethernet99networking stack is in order to have the DSA subsystem process the Ethernet
100switch specific tagging protocol. DSA accomplishes this by registering a100switch specific tagging protocol. DSA accomplishes this by registering a
101specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the101specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the
Documentation/networking/ip-sysctl.rst+1−1
@@ -741,7 +741,7 @@ tcp_fastopen - INTEGER · 740 unmodified lines
741 741
742 Default: 0x1742 Default: 0x1
743 743
744 Note that that additional client or server features are only744 Note that additional client or server features are only
745 effective if the basic support (0x1 and 0x2) are enabled respectively.745 effective if the basic support (0x1 and 0x2) are enabled respectively.
746 746
747tcp_fastopen_blackhole_timeout_sec - INTEGER747tcp_fastopen_blackhole_timeout_sec - INTEGER
Documentation/networking/ipvs-sysctl.rst+1−1
@@ -114,7 +114,7 @@ drop_entry - INTEGER · 113 unmodified lines
114 modes (when there is no enough available memory, the strategy114 modes (when there is no enough available memory, the strategy
115 is enabled and the variable is automatically set to 2,115 is enabled and the variable is automatically set to 2,
116 otherwise the strategy is disabled and the variable is set to116 otherwise the strategy is disabled and the variable is set to
117 1), and 3 means that that the strategy is always enabled.117 1), and 3 means that the strategy is always enabled.
118 118
119drop_packet - INTEGER119drop_packet - INTEGER
120 - 0 - disabled (default)120 - 0 - disabled (default)
Documentation/networking/rxrpc.rst+1−1
@@ -186,7 +186,7 @@ About the AF_RXRPC driver: · 185 unmodified lines
186 time [tunable] after the last connection using it discarded, in case a new186 time [tunable] after the last connection using it discarded, in case a new
187 connection is made that could use it.187 connection is made that could use it.
188 188
189 (#) A client-side connection is only shared between calls if they have have189 (#) A client-side connection is only shared between calls if they have
190 the same key struct describing their security (and assuming the calls190 the same key struct describing their security (and assuming the calls
191 would otherwise share the connection). Non-secured calls would also be191 would otherwise share the connection). Non-secured calls would also be
192 able to share connections with each other.192 able to share connections with each other.
Documentation/powerpc/vas-api.rst+1−1
@@ -213,7 +213,7 @@ request buffers are not in memory. The operating system handles the fault by · 212 unmodified lines
213updating CSB with the following data:213updating CSB with the following data:
214 214
215 csb.flags = CSB_V;215 csb.flags = CSB_V;
216 csb.cc = CSB_CC_TRANSLATION;216 csb.cc = CSB_CC_FAULT_ADDRESS;
217 csb.ce = CSB_CE_TERMINATION;217 csb.ce = CSB_CE_TERMINATION;
218 csb.address = fault_address;218 csb.address = fault_address;
219 219
Documentation/process/changes.rst+1−1
@@ -29,7 +29,7 @@ you probably needn't concern yourself with pcmciautils. · 28 unmodified lines
29====================== =============== ========================================29====================== =============== ========================================
30 Program Minimal version Command to check the version30 Program Minimal version Command to check the version
31====================== =============== ========================================31====================== =============== ========================================
32GNU C 4.8 gcc --version32GNU C 4.9 gcc --version
33GNU make 3.81 make --version33GNU make 3.81 make --version
34binutils 2.23 ld -v34binutils 2.23 ld -v
35flex 2.5.35 flex --version35flex 2.5.35 flex --version
Documentation/process/coding-style.rst+20−0
@@ -319,6 +319,26 @@ If you are afraid to mix up your local variable names, you have another · 318 unmodified lines
319problem, which is called the function-growth-hormone-imbalance syndrome.319problem, which is called the function-growth-hormone-imbalance syndrome.
320See chapter 6 (Functions).320See chapter 6 (Functions).
321 321
322For symbol names and documentation, avoid introducing new usage of
323'master / slave' (or 'slave' independent of 'master') and 'blacklist /
324whitelist'.
325
326Recommended replacements for 'master / slave' are:
327 '{primary,main} / {secondary,replica,subordinate}'
328 '{initiator,requester} / {target,responder}'
329 '{controller,host} / {device,worker,proxy}'
330 'leader / follower'
331 'director / performer'
332
333Recommended replacements for 'blacklist/whitelist' are:
334 'denylist / allowlist'
335 'blocklist / passlist'
336
337Exceptions for introducing new usage is to maintain a userspace ABI/API,
338or when updating code for an existing (as of 2020) hardware or protocol
339specification that mandates those terms. For new specifications
340translate specification usage of the terminology to the kernel coding
341standard where possible.
322 342
3235) Typedefs3435) Typedefs
324-----------344-----------
Documentation/virt/kvm/api.rst+3−2
@@ -4339,14 +4339,15 @@ Errors: · 4338 unmodified lines
4339#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x000000014339#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
4340 4340
4341 struct kvm_vmx_nested_state_hdr {4341 struct kvm_vmx_nested_state_hdr {
4342 __u32 flags;
4343 __u64 vmxon_pa;4342 __u64 vmxon_pa;
4344 __u64 vmcs12_pa;4343 __u64 vmcs12_pa;
4345 __u64 preemption_timer_deadline;
4346 4344
4347 struct {4345 struct {
4348 __u16 flags;4346 __u16 flags;
4349 } smm;4347 } smm;
4348
4349 __u32 flags;
4350 __u64 preemption_timer_deadline;
4350 };4351 };
4351 4352
4352 struct kvm_vmx_nested_state_data {4353 struct kvm_vmx_nested_state_data {
MAINTAINERS+29−15
@@ -782,7 +782,7 @@ F: include/dt-bindings/reset/altr,rst-mgr-a10sr.h · 781 unmodified lines
782F: include/linux/mfd/altera-a10sr.h782F: include/linux/mfd/altera-a10sr.h
783 783
784ALTERA TRIPLE SPEED ETHERNET DRIVER784ALTERA TRIPLE SPEED ETHERNET DRIVER
785M: Thor Thayer <thor.thayer@linux.intel.com>785M: Joyce Ooi <joyce.ooi@intel.com>
786L: netdev@vger.kernel.org786L: netdev@vger.kernel.org
787S: Maintained787S: Maintained
788F: drivers/net/ethernet/altera/788F: drivers/net/ethernet/altera/
@@ -1425,7 +1425,7 @@ F: arch/arm*/include/asm/perf_event.h · 636 unmodified lines
1425F: arch/arm*/kernel/hw_breakpoint.c1425F: arch/arm*/kernel/hw_breakpoint.c
1426F: arch/arm*/kernel/perf_*1426F: arch/arm*/kernel/perf_*
1427F: arch/arm/oprofile/common.c1427F: arch/arm/oprofile/common.c
1428F: drivers/perf/*1428F: drivers/perf/
1429F: include/linux/perf/arm_pmu.h1429F: include/linux/perf/arm_pmu.h
1430 1430
1431ARM PORT1431ARM PORT
@@ -2929,6 +2929,7 @@ F: include/uapi/linux/atm* · 1497 unmodified lines
2929 2929
2930ATMEL MACB ETHERNET DRIVER2930ATMEL MACB ETHERNET DRIVER
2931M: Nicolas Ferre <nicolas.ferre@microchip.com>2931M: Nicolas Ferre <nicolas.ferre@microchip.com>
2932M: Claudiu Beznea <claudiu.beznea@microchip.com>
2932S: Supported2933S: Supported
2933F: drivers/net/ethernet/cadence/2934F: drivers/net/ethernet/cadence/
2934 2935
@@ -3306,7 +3307,7 @@ X: arch/riscv/net/bpf_jit_comp32.c · 371 unmodified lines
3306 3307
3307BPF JIT for S3903308BPF JIT for S390
3308M: Ilya Leoshkevich <iii@linux.ibm.com>3309M: Ilya Leoshkevich <iii@linux.ibm.com>
3309M: Heiko Carstens <heiko.carstens@de.ibm.com>3310M: Heiko Carstens <hca@linux.ibm.com>
3310M: Vasily Gorbik <gor@linux.ibm.com>3311M: Vasily Gorbik <gor@linux.ibm.com>
3311L: netdev@vger.kernel.org3312L: netdev@vger.kernel.org
3312L: bpf@vger.kernel.org3313L: bpf@vger.kernel.org
@@ -5021,7 +5022,6 @@ F: drivers/mfd/da91??-*.c · 1708 unmodified lines
5021F: drivers/pinctrl/pinctrl-da90??.c5022F: drivers/pinctrl/pinctrl-da90??.c
5022F: drivers/power/supply/da9052-battery.c5023F: drivers/power/supply/da9052-battery.c
5023F: drivers/power/supply/da91??-*.c5024F: drivers/power/supply/da91??-*.c
5024F: drivers/regulator/da903x.c
5025F: drivers/regulator/da9???-regulator.[ch]5025F: drivers/regulator/da9???-regulator.[ch]
5026F: drivers/regulator/slg51000-regulator.[ch]5026F: drivers/regulator/slg51000-regulator.[ch]
5027F: drivers/rtc/rtc-da90??.c5027F: drivers/rtc/rtc-da90??.c
@@ -5111,7 +5111,7 @@ M: Vinod Koul <vkoul@kernel.org> · 83 unmodified lines
5111L: dmaengine@vger.kernel.org5111L: dmaengine@vger.kernel.org
5112S: Maintained5112S: Maintained
5113Q: https://patchwork.kernel.org/project/linux-dmaengine/list/5113Q: https://patchwork.kernel.org/project/linux-dmaengine/list/
5114T: git git://git.infradead.org/users/vkoul/slave-dma.git5114T: git git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git
5115F: Documentation/devicetree/bindings/dma/5115F: Documentation/devicetree/bindings/dma/
5116F: Documentation/driver-api/dmaengine/5116F: Documentation/driver-api/dmaengine/
5117F: drivers/dma/5117F: drivers/dma/
@@ -6956,6 +6956,7 @@ M: Timur Tabi <timur@kernel.org> · 1838 unmodified lines
6956M: Nicolin Chen <nicoleotsuka@gmail.com>6956M: Nicolin Chen <nicoleotsuka@gmail.com>
6957M: Xiubo Li <Xiubo.Lee@gmail.com>6957M: Xiubo Li <Xiubo.Lee@gmail.com>
6958R: Fabio Estevam <festevam@gmail.com>6958R: Fabio Estevam <festevam@gmail.com>
6959R: Shengjiu Wang <shengjiu.wang@gmail.com>
6959L: alsa-devel@alsa-project.org (moderated for non-subscribers)6960L: alsa-devel@alsa-project.org (moderated for non-subscribers)
6960L: linuxppc-dev@lists.ozlabs.org6961L: linuxppc-dev@lists.ozlabs.org
6961S: Maintained6962S: Maintained
@@ -9305,6 +9306,17 @@ F: Documentation/kbuild/kconfig* · 2343 unmodified lines
9305F: scripts/Kconfig.include9306F: scripts/Kconfig.include
9306F: scripts/kconfig/9307F: scripts/kconfig/
9307 9308
9309KCOV
9310R: Dmitry Vyukov <dvyukov@google.com>
9311R: Andrey Konovalov <andreyknvl@google.com>
9312L: kasan-dev@googlegroups.com
9313S: Maintained
9314F: Documentation/dev-tools/kcov.rst
9315F: include/linux/kcov.h
9316F: include/uapi/linux/kcov.h
9317F: kernel/kcov.c
9318F: scripts/Makefile.kcov
9319
9308KCSAN9320KCSAN
9309M: Marco Elver <elver@google.com>9321M: Marco Elver <elver@google.com>
9310R: Dmitry Vyukov <dvyukov@google.com>9322R: Dmitry Vyukov <dvyukov@google.com>
@@ -11240,7 +11252,7 @@ S: Maintained · 1929 unmodified lines
11240F: drivers/crypto/atmel-ecc.*11252F: drivers/crypto/atmel-ecc.*
11241 11253
11242MICROCHIP I2C DRIVER11254MICROCHIP I2C DRIVER
11243M: Ludovic Desroches <ludovic.desroches@microchip.com>11255M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
11244L: linux-i2c@vger.kernel.org11256L: linux-i2c@vger.kernel.org
11245S: Supported11257S: Supported
11246F: drivers/i2c/busses/i2c-at91-*.c11258F: drivers/i2c/busses/i2c-at91-*.c
@@ -11333,17 +11345,17 @@ F: drivers/iio/adc/at91-sama5d2_adc.c · 86 unmodified lines
11333F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h11345F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h
11334 11346
11335MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER11347MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
11336M: Nicolas Ferre <nicolas.ferre@microchip.com>11348M: Claudiu Beznea <claudiu.beznea@microchip.com>
11337S: Supported11349S: Supported
11338F: drivers/power/reset/at91-sama5d2_shdwc.c11350F: drivers/power/reset/at91-sama5d2_shdwc.c
11339 11351
11340MICROCHIP SPI DRIVER11352MICROCHIP SPI DRIVER
11341M: Nicolas Ferre <nicolas.ferre@microchip.com>11353M: Tudor Ambarus <tudor.ambarus@microchip.com>
11342S: Supported11354S: Supported
11343F: drivers/spi/spi-atmel.*11355F: drivers/spi/spi-atmel.*
11344 11356
11345MICROCHIP SSC DRIVER11357MICROCHIP SSC DRIVER
11346M: Nicolas Ferre <nicolas.ferre@microchip.com>11358M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
11347L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)11359L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
11348S: Supported11360S: Supported
11349F: drivers/misc/atmel-ssc.c11361F: drivers/misc/atmel-ssc.c
@@ -14176,7 +14188,8 @@ F: Documentation/devicetree/bindings/net/qcom,ethqos.txt · 2826 unmodified lines
14176F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c14188F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
14177 14189
14178QUALCOMM GENERIC INTERFACE I2C DRIVER14190QUALCOMM GENERIC INTERFACE I2C DRIVER
14179M: Alok Chauhan <alokc@codeaurora.org>14191M: Akash Asthana <akashast@codeaurora.org>
14192M: Mukesh Savaliya <msavaliy@codeaurora.org>
14180L: linux-i2c@vger.kernel.org14193L: linux-i2c@vger.kernel.org
14181L: linux-arm-msm@vger.kernel.org14194L: linux-arm-msm@vger.kernel.org
14182S: Supported14195S: Supported
@@ -14831,7 +14844,7 @@ S: Maintained · 648 unmodified lines
14831F: drivers/video/fbdev/savage/14844F: drivers/video/fbdev/savage/
14832 14845
14833S39014846S390
14834M: Heiko Carstens <heiko.carstens@de.ibm.com>14847M: Heiko Carstens <hca@linux.ibm.com>
14835M: Vasily Gorbik <gor@linux.ibm.com>14848M: Vasily Gorbik <gor@linux.ibm.com>
14836M: Christian Borntraeger <borntraeger@de.ibm.com>14849M: Christian Borntraeger <borntraeger@de.ibm.com>
14837L: linux-s390@vger.kernel.org14850L: linux-s390@vger.kernel.org
@@ -14862,7 +14875,8 @@ F: drivers/s390/block/dasd* · 24 unmodified lines
14862F: include/linux/dasd_mod.h14875F: include/linux/dasd_mod.h
14863 14876
14864S390 IOMMU (PCI)14877S390 IOMMU (PCI)
14865M: Gerald Schaefer <gerald.schaefer@de.ibm.com>14878M: Matthew Rosato <mjrosato@linux.ibm.com>
14879M: Gerald Schaefer <gerald.schaefer@linux.ibm.com>
14866L: linux-s390@vger.kernel.org14880L: linux-s390@vger.kernel.org
14867S: Supported14881S: Supported
14868W: http://www.ibm.com/developerworks/linux/linux390/14882W: http://www.ibm.com/developerworks/linux/linux390/
@@ -14890,7 +14904,7 @@ F: drivers/s390/net/ · 21 unmodified lines
14890 14904
14891S390 PCI SUBSYSTEM14905S390 PCI SUBSYSTEM
14892M: Niklas Schnelle <schnelle@linux.ibm.com>14906M: Niklas Schnelle <schnelle@linux.ibm.com>
14893M: Gerald Schaefer <gerald.schaefer@de.ibm.com>14907M: Gerald Schaefer <gerald.schaefer@linux.ibm.com>
14894L: linux-s390@vger.kernel.org14908L: linux-s390@vger.kernel.org
14895S: Supported14909S: Supported
14896W: http://www.ibm.com/developerworks/linux/linux390/14910W: http://www.ibm.com/developerworks/linux/linux390/
@@ -17513,7 +17527,7 @@ F: Documentation/admin-guide/ufs.rst · 2616 unmodified lines
17513F: fs/ufs/17527F: fs/ufs/
17514 17528
17515UHID USERSPACE HID IO DRIVER17529UHID USERSPACE HID IO DRIVER
17516M: David Herrmann <dh.herrmann@googlemail.com>17530M: David Rheinsberg <david.rheinsberg@gmail.com>
17517L: linux-input@vger.kernel.org17531L: linux-input@vger.kernel.org
17518S: Maintained17532S: Maintained
17519F: drivers/hid/uhid.c17533F: drivers/hid/uhid.c
@@ -18472,7 +18486,7 @@ S: Maintained · 952 unmodified lines
18472F: drivers/rtc/rtc-sd3078.c18486F: drivers/rtc/rtc-sd3078.c
18473 18487
18474WIIMOTE HID DRIVER18488WIIMOTE HID DRIVER
18475M: David Herrmann <dh.herrmann@googlemail.com>18489M: David Rheinsberg <david.rheinsberg@gmail.com>
18476L: linux-input@vger.kernel.org18490L: linux-input@vger.kernel.org
18477S: Maintained18491S: Maintained
18478F: drivers/hid/hid-wiimote*18492F: drivers/hid/hid-wiimote*
Makefile+3−3
@@ -2,7 +2,7 @@ · 1 unmodified line
2VERSION = 52VERSION = 5
3PATCHLEVEL = 83PATCHLEVEL = 8
4SUBLEVEL = 04SUBLEVEL = 0
5EXTRAVERSION = -rc45EXTRAVERSION =
6NAME = Kleptomaniac Octopus6NAME = Kleptomaniac Octopus
7 7
8# *DOCUMENTATION*8# *DOCUMENTATION*
@@ -567,7 +567,7 @@ ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),) · 558 unmodified lines
567ifneq ($(CROSS_COMPILE),)567ifneq ($(CROSS_COMPILE),)
568CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%))568CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%))
569GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))569GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))
570CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)570CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE))
571GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)571GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
572endif572endif
573ifneq ($(GCC_TOOLCHAIN),)573ifneq ($(GCC_TOOLCHAIN),)
@@ -1754,7 +1754,7 @@ PHONY += descend $(build-dirs) · 1180 unmodified lines
1754descend: $(build-dirs)1754descend: $(build-dirs)
1755$(build-dirs): prepare1755$(build-dirs): prepare
1756 $(Q)$(MAKE) $(build)=$@ \1756 $(Q)$(MAKE) $(build)=$@ \
1757 single-build=$(if $(filter-out $@/, $(filter $@/%, $(single-no-ko))),1) \1757 single-build=$(if $(filter-out $@/, $(filter $@/%, $(KBUILD_SINGLE_TARGETS))),1) \
1758 need-builtin=1 need-modorder=11758 need-builtin=1 need-modorder=1
1759 1759
1760clean-dirs := $(addprefix _clean_, $(clean-dirs))1760clean-dirs := $(addprefix _clean_, $(clean-dirs))
arch/arm/boot/dts/am437x-l4.dtsi+10−4
@@ -1540,8 +1540,9 @@ · 1539 unmodified lines
1540 reg = <0xcc020 0x4>;1540 reg = <0xcc020 0x4>;
1541 reg-names = "rev";1541 reg-names = "rev";
1542 /* Domains (P, C): per_pwrdm, l4ls_clkdm */1542 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1543 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;1543 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>,
1544 clock-names = "fck";1544 <&dcan0_fck>;
1545 clock-names = "fck", "osc";
1545 #address-cells = <1>;1546 #address-cells = <1>;
1546 #size-cells = <1>;1547 #size-cells = <1>;
1547 ranges = <0x0 0xcc000 0x2000>;1548 ranges = <0x0 0xcc000 0x2000>;
@@ -1549,6 +1550,8 @@ · 1 unmodified line
1549 dcan0: can@0 {1550 dcan0: can@0 {
1550 compatible = "ti,am4372-d_can", "ti,am3352-d_can";1551 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1551 reg = <0x0 0x2000>;1552 reg = <0x0 0x2000>;
1553 clocks = <&dcan0_fck>;
1554 clock-names = "fck";
1552 syscon-raminit = <&scm_conf 0x644 0>;1555 syscon-raminit = <&scm_conf 0x644 0>;
1553 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;1556 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
1554 status = "disabled";1557 status = "disabled";
@@ -1560,8 +1563,9 @@ · 5 unmodified lines
1560 reg = <0xd0020 0x4>;1563 reg = <0xd0020 0x4>;
1561 reg-names = "rev";1564 reg-names = "rev";
1562 /* Domains (P, C): per_pwrdm, l4ls_clkdm */1565 /* Domains (P, C): per_pwrdm, l4ls_clkdm */
1563 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;1566 clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>,
1564 clock-names = "fck";1567 <&dcan1_fck>;
1568 clock-names = "fck", "osc";
1565 #address-cells = <1>;1569 #address-cells = <1>;
1566 #size-cells = <1>;1570 #size-cells = <1>;
1567 ranges = <0x0 0xd0000 0x2000>;1571 ranges = <0x0 0xd0000 0x2000>;
@@ -1569,6 +1573,8 @@ · 1 unmodified line
1569 dcan1: can@0 {1573 dcan1: can@0 {
1570 compatible = "ti,am4372-d_can", "ti,am3352-d_can";1574 compatible = "ti,am4372-d_can", "ti,am3352-d_can";
1571 reg = <0x0 0x2000>;1575 reg = <0x0 0x2000>;
1576 clocks = <&dcan1_fck>;
1577 clock-name = "fck";
1572 syscon-raminit = <&scm_conf 0x644 1>;1578 syscon-raminit = <&scm_conf 0x644 1>;
1573 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;1579 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
1574 status = "disabled";1580 status = "disabled";
arch/arm/boot/dts/armada-38x.dtsi+2−1
@@ -342,7 +342,8 @@ · 341 unmodified lines
342 342
343 comphy: phy@18300 {343 comphy: phy@18300 {
344 compatible = "marvell,armada-380-comphy";344 compatible = "marvell,armada-380-comphy";
345 reg = <0x18300 0x100>;345 reg-names = "comphy", "conf";
346 reg = <0x18300 0x100>, <0x18460 4>;
346 #address-cells = <1>;347 #address-cells = <1>;
347 #size-cells = <0>;348 #size-cells = <0>;
348 349
arch/arm/boot/dts/imx6qdl-gw551x.dtsi+1−1
@@ -110,7 +110,7 @@ · 109 unmodified lines
110 simple-audio-card,frame-master = <&sound_codec>;110 simple-audio-card,frame-master = <&sound_codec>;
111 111
112 sound_cpu: simple-audio-card,cpu {112 sound_cpu: simple-audio-card,cpu {
113 sound-dai = <&ssi2>;113 sound-dai = <&ssi1>;
114 };114 };
115 115
116 sound_codec: simple-audio-card,codec {116 sound_codec: simple-audio-card,codec {
arch/arm/boot/dts/imx6qdl-icore.dtsi+2−1
@@ -397,7 +397,7 @@ · 396 unmodified lines
397 397
398 pinctrl_usbotg: usbotggrp {398 pinctrl_usbotg: usbotggrp {
399 fsl,pins = <399 fsl,pins = <
400 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059400 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
401 >;401 >;
402 };402 };
403 403
@@ -409,6 +409,7 @@ · 5 unmodified lines
409 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070409 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070
410 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070410 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070
411 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070411 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
412 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
412 >;413 >;
413 };414 };
414 415
arch/arm/boot/dts/imx6sx-sabreauto.dts+1−1
@@ -99,7 +99,7 @@ · 98 unmodified lines
99&fec2 {99&fec2 {
100 pinctrl-names = "default";100 pinctrl-names = "default";
101 pinctrl-0 = <&pinctrl_enet2>;101 pinctrl-0 = <&pinctrl_enet2>;
102 phy-mode = "rgmii";102 phy-mode = "rgmii-id";
103 phy-handle = <&ethphy0>;103 phy-handle = <&ethphy0>;
104 fsl,magic-packet;104 fsl,magic-packet;
105 status = "okay";105 status = "okay";
arch/arm/boot/dts/imx6sx-sdb.dtsi+1−1
@@ -213,7 +213,7 @@ · 212 unmodified lines
213&fec2 {213&fec2 {
214 pinctrl-names = "default";214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_enet2>;215 pinctrl-0 = <&pinctrl_enet2>;
216 phy-mode = "rgmii";216 phy-mode = "rgmii-id";
217 phy-handle = <&ethphy2>;217 phy-handle = <&ethphy2>;
218 status = "okay";218 status = "okay";
219};219};
arch/arm/boot/dts/keystone-k2g-evm.dts+1−1
@@ -402,7 +402,7 @@ · 401 unmodified lines
402 402
403&gbe0 {403&gbe0 {
404 phy-handle = <&ethphy0>;404 phy-handle = <&ethphy0>;
405 phy-mode = "rgmii-id";405 phy-mode = "rgmii-rxid";
406 status = "okay";406 status = "okay";
407};407};
408 408
arch/arm/boot/dts/meson.dtsi+1−1
@@ -11,7 +11,7 @@ · 10 unmodified lines
11 #size-cells = <1>;11 #size-cells = <1>;
12 interrupt-parent = <&gic>;12 interrupt-parent = <&gic>;
13 13
14 L2: l2-cache-controller@c4200000 {14 L2: cache-controller@c4200000 {
15 compatible = "arm,pl310-cache";15 compatible = "arm,pl310-cache";
16 reg = <0xc4200000 0x1000>;16 reg = <0xc4200000 0x1000>;
17 cache-unified;17 cache-unified;
arch/arm/boot/dts/omap3-n900.dts+8−4
@@ -105,6 +105,14 @@ · 104 unmodified lines
105 linux,code = <SW_FRONT_PROXIMITY>;105 linux,code = <SW_FRONT_PROXIMITY>;
106 linux,can-disable;106 linux,can-disable;
107 };107 };
108
109 machine_cover {
110 label = "Machine Cover";
111 gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
112 linux,input-type = <EV_SW>;
113 linux,code = <SW_MACHINE_COVER>;
114 linux,can-disable;
115 };
108 };116 };
109 117
110 isp1707: isp1707 {118 isp1707: isp1707 {
@@ -819,10 +827,6 @@ · 708 unmodified lines
819 pinctrl-0 = <&mmc1_pins>;827 pinctrl-0 = <&mmc1_pins>;
820 vmmc-supply = <&vmmc1>;828 vmmc-supply = <&vmmc1>;
821 bus-width = <4>;829 bus-width = <4>;
822 /* For debugging, it is often good idea to remove this GPIO.
823 It means you can remove back cover (to reboot by removing
824 battery) and still use the MMC card. */
825 cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */
826};830};
827 831
828/* most boards use vaux3, only some old versions use vmmc2 instead */832/* most boards use vaux3, only some old versions use vmmc2 instead */
arch/arm/boot/dts/socfpga.dtsi+1−1
@@ -726,7 +726,7 @@ · 725 unmodified lines
726 };726 };
727 };727 };
728 728
729 L2: l2-cache@fffef000 {729 L2: cache-controller@fffef000 {
730 compatible = "arm,pl310-cache";730 compatible = "arm,pl310-cache";
731 reg = <0xfffef000 0x1000>;731 reg = <0xfffef000 0x1000>;
732 interrupts = <0 38 0x04>;732 interrupts = <0 38 0x04>;
arch/arm/boot/dts/socfpga_arria10.dtsi+1−1
@@ -636,7 +636,7 @@ · 635 unmodified lines
636 reg = <0xffcfb100 0x80>;636 reg = <0xffcfb100 0x80>;
637 };637 };
638 638
639 L2: l2-cache@fffff000 {639 L2: cache-controller@fffff000 {
640 compatible = "arm,pl310-cache";640 compatible = "arm,pl310-cache";
641 reg = <0xfffff000 0x1000>;641 reg = <0xfffff000 0x1000>;
642 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;642 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
arch/arm/boot/dts/sun4i-a10.dtsi+1−1
@@ -198,7 +198,7 @@ · 197 unmodified lines
198 default-pool {198 default-pool {
199 compatible = "shared-dma-pool";199 compatible = "shared-dma-pool";
200 size = <0x6000000>;200 size = <0x6000000>;
201 alloc-ranges = <0x4a000000 0x6000000>;201 alloc-ranges = <0x40000000 0x10000000>;
202 reusable;202 reusable;
203 linux,cma-default;203 linux,cma-default;
204 };204 };
arch/arm/boot/dts/sun5i.dtsi+1−1
@@ -117,7 +117,7 @@ · 116 unmodified lines
117 default-pool {117 default-pool {
118 compatible = "shared-dma-pool";118 compatible = "shared-dma-pool";
119 size = <0x6000000>;119 size = <0x6000000>;
120 alloc-ranges = <0x4a000000 0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;
121 reusable;121 reusable;
122 linux,cma-default;122 linux,cma-default;
123 };123 };
arch/arm/boot/dts/sun7i-a20.dtsi+1−1
@@ -181,7 +181,7 @@ · 180 unmodified lines
181 default-pool {181 default-pool {
182 compatible = "shared-dma-pool";182 compatible = "shared-dma-pool";
183 size = <0x6000000>;183 size = <0x6000000>;
184 alloc-ranges = <0x4a000000 0x6000000>;184 alloc-ranges = <0x40000000 0x10000000>;
185 reusable;185 reusable;
186 linux,cma-default;186 linux,cma-default;
187 };187 };
arch/arm/include/asm/percpu.h+2−0
@@ -5,6 +5,8 @@ · 4 unmodified lines
5#ifndef _ASM_ARM_PERCPU_H_5#ifndef _ASM_ARM_PERCPU_H_
6#define _ASM_ARM_PERCPU_H_6#define _ASM_ARM_PERCPU_H_
7 7
8#include <asm/thread_info.h>
9
8/*10/*
9 * Same as asm-generic/percpu.h, except that we store the per cpu offset11 * Same as asm-generic/percpu.h, except that we store the per cpu offset
10 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V712 * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7
arch/arm/kernel/asm-offsets.c+0−9
@@ -31,15 +31,6 @@ · 30 unmodified lines
31#if defined(__APCS_26__)31#if defined(__APCS_26__)
32#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-3232#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
33#endif33#endif
34/*
35 * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854
36 * miscompiles find_get_entry(), and can result in EXT3 and EXT4
37 * filesystem corruption (possibly other FS too).
38 */
39#if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803
40#error Your compiler is too buggy; it is known to miscompile kernels
41#error and result in filesystem corruption and oopses.
42#endif
43 34
44int main(void)35int main(void)
45{36{
arch/arm/kernel/hw_breakpoint.c+22−5
@@ -683,6 +683,12 @@ static void disable_single_step(struct perf_event *bp) · 682 unmodified lines
683 arch_install_hw_breakpoint(bp);683 arch_install_hw_breakpoint(bp);
684}684}
685 685
686static int watchpoint_fault_on_uaccess(struct pt_regs *regs,
687 struct arch_hw_breakpoint *info)
688{
689 return !user_mode(regs) && info->ctrl.privilege == ARM_BREAKPOINT_USER;
690}
691
686static void watchpoint_handler(unsigned long addr, unsigned int fsr,692static void watchpoint_handler(unsigned long addr, unsigned int fsr,
687 struct pt_regs *regs)693 struct pt_regs *regs)
688{694{
@@ -742,16 +748,27 @@ static void watchpoint_handler(unsigned long addr, unsigned int fsr, · 53 unmodified lines
742 }748 }
743 749
744 pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);750 pr_debug("watchpoint fired: address = 0x%x\n", info->trigger);
751
752 /*
753 * If we triggered a user watchpoint from a uaccess routine,
754 * then handle the stepping ourselves since userspace really
755 * can't help us with this.
756 */
757 if (watchpoint_fault_on_uaccess(regs, info))
758 goto step;
759
745 perf_bp_event(wp, regs);760 perf_bp_event(wp, regs);
746 761
747 /*762 /*
748 * If no overflow handler is present, insert a temporary763 * Defer stepping to the overflow handler if one is installed.
749 * mismatch breakpoint so we can single-step over the764 * Otherwise, insert a temporary mismatch breakpoint so that
750 * watchpoint trigger.765 * we can single-step over the watchpoint trigger.
751 */766 */
752 if (is_default_overflow_handler(wp))767 if (!is_default_overflow_handler(wp))
753 enable_single_step(wp, instruction_pointer(regs));768 goto unlock;
754 769
770step:
771 enable_single_step(wp, instruction_pointer(regs));
755unlock:772unlock:
756 rcu_read_unlock();773 rcu_read_unlock();
757 }774 }
arch/arm/kernel/vdso.c+1−0
@@ -184,6 +184,7 @@ static void __init patch_vdso(void *ehdr) · 183 unmodified lines
184 if (!cntvct_ok) {184 if (!cntvct_ok) {
185 vdso_nullpatch_one(&einfo, "__vdso_gettimeofday");185 vdso_nullpatch_one(&einfo, "__vdso_gettimeofday");
186 vdso_nullpatch_one(&einfo, "__vdso_clock_gettime");186 vdso_nullpatch_one(&einfo, "__vdso_clock_gettime");
187 vdso_nullpatch_one(&einfo, "__vdso_clock_gettime64");
187 }188 }
188}189}
189 190
arch/arm/mach-imx/devices/devices-common.h+1−1
@@ -289,6 +289,6 @@ struct platform_device *__init imx_add_spi_imx( · 288 unmodified lines
289 const struct spi_imx_master *pdata);289 const struct spi_imx_master *pdata);
290 290
291struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,291struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
292 int irq, int irq_err);292 int irq);
293struct platform_device *imx_add_imx_sdma(char *name,293struct platform_device *imx_add_imx_sdma(char *name,
294 resource_size_t iobase, int irq, struct sdma_platform_data *pdata);294 resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
arch/arm/mach-imx/devices/platform-gpio-mxc.c+3−2
@@ -24,7 +24,8 @@ struct platform_device *__init mxc_register_gpio(char *name, int id, · 23 unmodified lines
24 .flags = IORESOURCE_IRQ,24 .flags = IORESOURCE_IRQ,
25 },25 },
26 };26 };
27 unsigned int nres;
27 28
28 return platform_device_register_resndata(&mxc_aips_bus,29 nres = irq_high ? ARRAY_SIZE(res) : ARRAY_SIZE(res) - 1;
29 name, id, res, ARRAY_SIZE(res), NULL, 0);30 return platform_device_register_resndata(&mxc_aips_bus, name, id, res, nres, NULL, 0);
30}31}
arch/arm/mach-imx/devices/platform-imx-dma.c+1−5
@@ -6,7 +6,7 @@ · 5 unmodified lines
6#include "devices-common.h"6#include "devices-common.h"
7 7
8struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,8struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
9 resource_size_t iobase, int irq, int irq_err)9 resource_size_t iobase, int irq)
10{10{
11 struct resource res[] = {11 struct resource res[] = {
12 {12 {
@@ -17,10 +17,6 @@ struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, · 4 unmodified lines
17 .start = irq,17 .start = irq,
18 .end = irq,18 .end = irq,
19 .flags = IORESOURCE_IRQ,19 .flags = IORESOURCE_IRQ,
20 }, {
21 .start = irq_err,
22 .end = irq_err,
23 .flags = IORESOURCE_IRQ,
24 },20 },
25 };21 };
26 22
arch/arm/mach-imx/mm-imx21.c+1−2
@@ -78,8 +78,7 @@ void __init imx21_soc_init(void) · 77 unmodified lines
78 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);78 mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0);
79 79
80 pinctrl_provide_dummies();80 pinctrl_provide_dummies();
81 imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR,81 imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, MX21_INT_DMACH0);
82 MX21_INT_DMACH0, 0); /* No ERR irq */
83 platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,82 platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res,
84 ARRAY_SIZE(imx21_audmux_res));83 ARRAY_SIZE(imx21_audmux_res));
85}84}
arch/arm/mach-imx/mm-imx27.c+1−2
@@ -79,8 +79,7 @@ void __init imx27_soc_init(void) · 78 unmodified lines
79 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);79 mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
80 80
81 pinctrl_provide_dummies();81 pinctrl_provide_dummies();
82 imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR,82 imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, MX27_INT_DMACH0);
83 MX27_INT_DMACH0, 0); /* No ERR irq */
84 /* imx27 has the imx21 type audmux */83 /* imx27 has the imx21 type audmux */
85 platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,84 platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res,
86 ARRAY_SIZE(imx27_audmux_res));85 ARRAY_SIZE(imx27_audmux_res));
arch/arm/mach-omap2/omap_hwmod.c+11−3
@@ -3435,7 +3435,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 3434 unmodified lines
3435 regs = ioremap(data->module_pa,3435 regs = ioremap(data->module_pa,
3436 data->module_size);3436 data->module_size);
3437 if (!regs)3437 if (!regs)
3438 return -ENOMEM;3438 goto out_free_sysc;
3439 }3439 }
3440 3440
3441 /*3441 /*
@@ -3445,13 +3445,13 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 3 unmodified lines
3445 if (oh->class->name && strcmp(oh->class->name, data->name)) {3445 if (oh->class->name && strcmp(oh->class->name, data->name)) {
3446 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);3446 class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL);
3447 if (!class)3447 if (!class)
3448 return -ENOMEM;3448 goto out_unmap;
3449 }3449 }
3450 3450
3451 if (list_empty(&oh->slave_ports)) {3451 if (list_empty(&oh->slave_ports)) {
3452 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);3452 oi = kcalloc(1, sizeof(*oi), GFP_KERNEL);
3453 if (!oi)3453 if (!oi)
3454 return -ENOMEM;3454 goto out_free_class;
3455 3455
3456 /*3456 /*
3457 * Note that we assume interconnect interface clocks will be3457 * Note that we assume interconnect interface clocks will be
@@ -3478,6 +3478,14 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 20 unmodified lines
3478 spin_unlock_irqrestore(&oh->_lock, flags);3478 spin_unlock_irqrestore(&oh->_lock, flags);
3479 3479
3480 return 0;3480 return 0;
3481
3482out_free_class:
3483 kfree(class);
3484out_unmap:
3485 iounmap(regs);
3486out_free_sysc:
3487 kfree(sysc);
3488 return -ENOMEM;
3481}3489}
3482 3490
3483static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {3491static const struct omap_hwmod_reset omap24xx_reset_quirks[] = {
arch/arm/mm/mmu.c+1−1
@@ -966,7 +966,7 @@ void __init create_mapping_late(struct mm_struct *mm, struct map_desc *md, · 965 unmodified lines
966 pud_t *pud;966 pud_t *pud;
967 967
968 p4d = p4d_alloc(mm, pgd_offset(mm, md->virtual), md->virtual);968 p4d = p4d_alloc(mm, pgd_offset(mm, md->virtual), md->virtual);
969 if (!WARN_ON(!p4d))969 if (WARN_ON(!p4d))
970 return;970 return;
971 pud = pud_alloc(mm, p4d, md->virtual);971 pud = pud_alloc(mm, p4d, md->virtual);
972 if (WARN_ON(!pud))972 if (WARN_ON(!pud))
arch/arm64/Makefile+1−1
@@ -137,7 +137,7 @@ export TEXT_OFFSET · 136 unmodified lines
137 137
138core-y += arch/arm64/138core-y += arch/arm64/
139libs-y := arch/arm64/lib/ $(libs-y)139libs-y := arch/arm64/lib/ $(libs-y)
140core-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a140libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
141 141
142# Default target when executing plain make142# Default target when executing plain make
143boot := arch/arm64/boot143boot := arch/arm64/boot
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi+1−0
@@ -161,6 +161,7 @@ · 160 unmodified lines
161 resets = <&ccu RST_BUS_VE>;161 resets = <&ccu RST_BUS_VE>;
162 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;162 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
163 allwinner,sram = <&ve_sram 1>;163 allwinner,sram = <&ve_sram 1>;
164 iommus = <&iommu 3>;
164 };165 };
165 166
166 gpu: gpu@1800000 {167 gpu: gpu@1800000 {
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi+4−4
@@ -77,7 +77,7 @@ · 76 unmodified lines
77 method = "smc";77 method = "smc";
78 };78 };
79 79
80 intc: intc@fffc1000 {80 intc: interrupt-controller@fffc1000 {
81 compatible = "arm,gic-400", "arm,cortex-a15-gic";81 compatible = "arm,gic-400", "arm,cortex-a15-gic";
82 #interrupt-cells = <3>;82 #interrupt-cells = <3>;
83 interrupt-controller;83 interrupt-controller;
@@ -302,7 +302,7 @@ · 218 unmodified lines
302 status = "disabled";302 status = "disabled";
303 };303 };
304 304
305 nand: nand@ffb90000 {305 nand: nand-controller@ffb90000 {
306 #address-cells = <1>;306 #address-cells = <1>;
307 #size-cells = <0>;307 #size-cells = <0>;
308 compatible = "altr,socfpga-denali-nand";308 compatible = "altr,socfpga-denali-nand";
@@ -445,7 +445,7 @@ · 136 unmodified lines
445 clock-names = "timer";445 clock-names = "timer";
446 };446 };
447 447
448 uart0: serial0@ffc02000 {448 uart0: serial@ffc02000 {
449 compatible = "snps,dw-apb-uart";449 compatible = "snps,dw-apb-uart";
450 reg = <0xffc02000 0x100>;450 reg = <0xffc02000 0x100>;
451 interrupts = <0 108 4>;451 interrupts = <0 108 4>;
@@ -456,7 +456,7 @@ · 4 unmodified lines
456 status = "disabled";456 status = "disabled";
457 };457 };
458 458
459 uart1: serial1@ffc02100 {459 uart1: serial@ffc02100 {
460 compatible = "snps,dw-apb-uart";460 compatible = "snps,dw-apb-uart";
461 reg = <0xffc02100 0x100>;461 reg = <0xffc02100 0x100>;
462 interrupts = <0 109 4>;462 interrupts = <0 109 4>;
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts+1−0
@@ -155,6 +155,7 @@ · 154 unmodified lines
155};155};
156 156
157&qspi {157&qspi {
158 status = "okay";
158 flash@0 {159 flash@0 {
159 #address-cells = <1>;160 #address-cells = <1>;
160 #size-cells = <1>;161 #size-cells = <1>;
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts+4−3
@@ -188,6 +188,7 @@ · 187 unmodified lines
188};188};
189 189
190&qspi {190&qspi {
191 status = "okay";
191 flash@0 {192 flash@0 {
192 #address-cells = <1>;193 #address-cells = <1>;
193 #size-cells = <1>;194 #size-cells = <1>;
@@ -211,12 +212,12 @@ · 17 unmodified lines
211 212
212 qspi_boot: partition@0 {213 qspi_boot: partition@0 {
213 label = "Boot and fpga data";214 label = "Boot and fpga data";
214 reg = <0x0 0x034B0000>;215 reg = <0x0 0x03FE0000>;
215 };216 };
216 217
217 qspi_rootfs: partition@4000000 {218 qspi_rootfs: partition@3FE0000 {
218 label = "Root Filesystem - JFFS2";219 label = "Root Filesystem - JFFS2";
219 reg = <0x034B0000 0x0EB50000>;220 reg = <0x03FE0000 0x0C020000>;
220 };221 };
221 };222 };
222 };223 };
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts+1−1
@@ -10,7 +10,7 @@ · 9 unmodified lines
10#include <dt-bindings/input/input.h>10#include <dt-bindings/input/input.h>
11#include <dt-bindings/sound/meson-aiu.h>11#include <dt-bindings/sound/meson-aiu.h>
12 12
13#include "meson-gxl-s905x.dtsi"13#include "meson-gxl-s805x.dtsi"
14 14
15/ {15/ {
16 compatible = "libretech,aml-s805x-ac", "amlogic,s805x",16 compatible = "libretech,aml-s805x-ac", "amlogic,s805x",
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts+1−1
@@ -9,7 +9,7 @@ · 8 unmodified lines
9 9
10#include <dt-bindings/input/input.h>10#include <dt-bindings/input/input.h>
11 11
12#include "meson-gxl-s905x.dtsi"12#include "meson-gxl-s805x.dtsi"
13 13
14/ {14/ {
15 compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";15 compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi+24−0
@@ -0,0 +1,24 @@
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 BayLibre SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 */
6
7#include "meson-gxl-s905x.dtsi"
8
9/ {
10 compatible = "amlogic,s805x", "amlogic,meson-gxl";
11};
12
13/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
14&mali {
15 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
16 <&clkc CLKID_MALI_0>,
17 <&clkc CLKID_MALI>; /* Glitch free mux */
18 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
19 <0>, /* Do Nothing */
20 <&clkc CLKID_MALI_0>;
21 assigned-clock-rates = <0>, /* Do Nothing */
22 <666666666>,
23 <0>; /* Do Nothing */
24};
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi+5−0
@@ -337,6 +337,11 @@ · 336 unmodified lines
337 };337 };
338};338};
339 339
340&hwrng {
341 clocks = <&clkc CLKID_RNG0>;
342 clock-names = "core";
343};
344
340&i2c_A {345&i2c_A {
341 clocks = <&clkc CLKID_I2C>;346 clocks = <&clkc CLKID_I2C>;
342};347};
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts+1−0
@@ -98,6 +98,7 @@ · 97 unmodified lines
98};98};
99 99
100&qspi {100&qspi {
101 status = "okay";
101 flash@0 {102 flash@0 {
102 #address-cells = <1>;103 #address-cells = <1>;
103 #size-cells = <1>;104 #size-cells = <1>;
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts+1−4
@@ -454,10 +454,7 @@ · 453 unmodified lines
454 status = "okay";454 status = "okay";
455 phy-mode = "2500base-x";455 phy-mode = "2500base-x";
456 phys = <&cp1_comphy5 2>;456 phys = <&cp1_comphy5 2>;
457 fixed-link {457 managed = "in-band-status";
458 speed = <2500>;
459 full-duplex;
460 };
461};458};
462 459
463&cp1_spi1 {460&cp1_spi1 {
arch/arm64/configs/defconfig+1−1
@@ -194,7 +194,7 @@ CONFIG_HOTPLUG_PCI=y · 193 unmodified lines
194CONFIG_HOTPLUG_PCI_ACPI=y194CONFIG_HOTPLUG_PCI_ACPI=y
195CONFIG_PCI_AARDVARK=y195CONFIG_PCI_AARDVARK=y
196CONFIG_PCI_TEGRA=y196CONFIG_PCI_TEGRA=y
197CONFIG_PCIE_RCAR=y197CONFIG_PCIE_RCAR_HOST=y
198CONFIG_PCI_HOST_GENERIC=y198CONFIG_PCI_HOST_GENERIC=y
199CONFIG_PCI_XGENE=y199CONFIG_PCI_XGENE=y
200CONFIG_PCIE_ALTERA=y200CONFIG_PCIE_ALTERA=y
arch/arm64/include/asm/alternative.h+2−2
@@ -77,9 +77,9 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 76 unmodified lines
77 "663:\n\t" \77 "663:\n\t" \
78 newinstr "\n" \78 newinstr "\n" \
79 "664:\n\t" \79 "664:\n\t" \
80 ".previous\n\t" \
81 ".org . - (664b-663b) + (662b-661b)\n\t" \80 ".org . - (664b-663b) + (662b-661b)\n\t" \
82 ".org . - (662b-661b) + (664b-663b)\n" \81 ".org . - (662b-661b) + (664b-663b)\n\t" \
82 ".previous\n" \
83 ".endif\n"83 ".endif\n"
84 84
85#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \85#define __ALTERNATIVE_CFG_CB(oldinstr, feature, cfg_enabled, cb) \
arch/arm64/include/asm/arch_timer.h+1−0
@@ -58,6 +58,7 @@ struct arch_timer_erratum_workaround { · 57 unmodified lines
58 u64 (*read_cntvct_el0)(void);58 u64 (*read_cntvct_el0)(void);
59 int (*set_next_event_phys)(unsigned long, struct clock_event_device *);59 int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
60 int (*set_next_event_virt)(unsigned long, struct clock_event_device *);60 int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
61 bool disable_compat_vdso;
61};62};
62 63
63DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *,64DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *,
arch/arm64/include/asm/checksum.h+3−2
@@ -24,16 +24,17 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) · 23 unmodified lines
24{24{
25 __uint128_t tmp;25 __uint128_t tmp;
26 u64 sum;26 u64 sum;
27 int n = ihl; /* we want it signed */
27 28
28 tmp = *(const __uint128_t *)iph;29 tmp = *(const __uint128_t *)iph;
29 iph += 16;30 iph += 16;
30 ihl -= 4;31 n -= 4;
31 tmp += ((tmp >> 64) | (tmp << 64));32 tmp += ((tmp >> 64) | (tmp << 64));
32 sum = tmp >> 64;33 sum = tmp >> 64;
33 do {34 do {
34 sum += *(const u32 *)iph;35 sum += *(const u32 *)iph;
35 iph += 4;36 iph += 4;
36 } while (--ihl);37 } while (--n > 0);
37 38
38 sum += ((sum >> 32) | (sum << 32));39 sum += ((sum >> 32) | (sum << 32));
39 return csum_fold((__force u32)(sum >> 32));40 return csum_fold((__force u32)(sum >> 32));
arch/arm64/include/asm/debug-monitors.h+2−0
@@ -109,6 +109,8 @@ void disable_debug_monitors(enum dbg_active_el el); · 108 unmodified lines
109 109
110void user_rewind_single_step(struct task_struct *task);110void user_rewind_single_step(struct task_struct *task);
111void user_fastforward_single_step(struct task_struct *task);111void user_fastforward_single_step(struct task_struct *task);
112void user_regs_reset_single_step(struct user_pt_regs *regs,
113 struct task_struct *task);
112 114
113void kernel_enable_single_step(struct pt_regs *regs);115void kernel_enable_single_step(struct pt_regs *regs);
114void kernel_disable_single_step(void);116void kernel_disable_single_step(void);
arch/arm64/include/asm/kvm_host.h+8−3
@@ -380,9 +380,14 @@ struct kvm_vcpu_arch { · 379 unmodified lines
380#define vcpu_has_sve(vcpu) (system_supports_sve() && \380#define vcpu_has_sve(vcpu) (system_supports_sve() && \
381 ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE))381 ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_SVE))
382 382
383#define vcpu_has_ptrauth(vcpu) ((system_supports_address_auth() || \383#ifdef CONFIG_ARM64_PTR_AUTH
384 system_supports_generic_auth()) && \384#define vcpu_has_ptrauth(vcpu) \
385 ((vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH))385 ((cpus_have_final_cap(ARM64_HAS_ADDRESS_AUTH) || \
386 cpus_have_final_cap(ARM64_HAS_GENERIC_AUTH)) && \
387 (vcpu)->arch.flags & KVM_ARM64_GUEST_HAS_PTRAUTH)
388#else
389#define vcpu_has_ptrauth(vcpu) false
390#endif
386 391
387#define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs)392#define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs)
388 393
arch/arm64/include/asm/pgtable-prot.h+1−1
@@ -67,7 +67,7 @@ extern bool arm64_use_ng_mappings; · 66 unmodified lines
67#define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)67#define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN)
68#define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)68#define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY)
69#define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)69#define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN)
70#define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP)70#define PAGE_HYP_DEVICE __pgprot(_PROT_DEFAULT | PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_HYP | PTE_HYP_XN)
71 71
72#define PAGE_S2_MEMATTR(attr) \72#define PAGE_S2_MEMATTR(attr) \
73 ({ \73 ({ \
arch/arm64/include/asm/smp.h+0−1
@@ -30,7 +30,6 @@ · 29 unmodified lines
30#include <linux/threads.h>30#include <linux/threads.h>
31#include <linux/cpumask.h>31#include <linux/cpumask.h>
32#include <linux/thread_info.h>32#include <linux/thread_info.h>
33#include <asm/pointer_auth.h>
34 33
35DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);34DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
36 35
arch/arm64/include/asm/syscall.h+11−1
@@ -34,6 +34,10 @@ static inline long syscall_get_error(struct task_struct *task, · 33 unmodified lines
34 struct pt_regs *regs)34 struct pt_regs *regs)
35{35{
36 unsigned long error = regs->regs[0];36 unsigned long error = regs->regs[0];
37
38 if (is_compat_thread(task_thread_info(task)))
39 error = sign_extend64(error, 31);
40
37 return IS_ERR_VALUE(error) ? error : 0;41 return IS_ERR_VALUE(error) ? error : 0;
38}42}
39 43
@@ -47,7 +51,13 @@ static inline void syscall_set_return_value(struct task_struct *task, · 7 unmodified lines
47 struct pt_regs *regs,51 struct pt_regs *regs,
48 int error, long val)52 int error, long val)
49{53{
50 regs->regs[0] = (long) error ? error : val;54 if (error)
55 val = error;
56
57 if (is_compat_thread(task_thread_info(task)))
58 val = lower_32_bits(val);
59
60 regs->regs[0] = val;
51}61}
52 62
53#define SYSCALL_MAX_ARGS 663#define SYSCALL_MAX_ARGS 6
arch/arm64/include/asm/thread_info.h+1−0
@@ -93,6 +93,7 @@ void arch_release_task_struct(struct task_struct *tsk); · 92 unmodified lines
93#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU)93#define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU)
94#define _TIF_UPROBE (1 << TIF_UPROBE)94#define _TIF_UPROBE (1 << TIF_UPROBE)
95#define _TIF_FSCHECK (1 << TIF_FSCHECK)95#define _TIF_FSCHECK (1 << TIF_FSCHECK)
96#define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP)
96#define _TIF_32BIT (1 << TIF_32BIT)97#define _TIF_32BIT (1 << TIF_32BIT)
97#define _TIF_SVE (1 << TIF_SVE)98#define _TIF_SVE (1 << TIF_SVE)
98 99
arch/arm64/include/asm/vdso/clocksource.h+5−2
@@ -2,7 +2,10 @@ · 1 unmodified line
2#ifndef __ASM_VDSOCLOCKSOURCE_H2#ifndef __ASM_VDSOCLOCKSOURCE_H
3#define __ASM_VDSOCLOCKSOURCE_H3#define __ASM_VDSOCLOCKSOURCE_H
4 4
5#define VDSO_ARCH_CLOCKMODES \5#define VDSO_ARCH_CLOCKMODES \
6 VDSO_CLOCKMODE_ARCHTIMER6 /* vdso clocksource for both 32 and 64bit tasks */ \
7 VDSO_CLOCKMODE_ARCHTIMER, \
8 /* vdso clocksource for 64bit tasks only */ \
9 VDSO_CLOCKMODE_ARCHTIMER_NOCOMPAT
7 10
8#endif11#endif
arch/arm64/include/asm/vdso/compat_gettimeofday.h+7−1
@@ -111,7 +111,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode) · 110 unmodified lines
111 * update. Return something. Core will do another round and then111 * update. Return something. Core will do another round and then
112 * see the mode change and fallback to the syscall.112 * see the mode change and fallback to the syscall.
113 */113 */
114 if (clock_mode == VDSO_CLOCKMODE_NONE)114 if (clock_mode != VDSO_CLOCKMODE_ARCHTIMER)
115 return 0;115 return 0;
116 116
117 /*117 /*
@@ -152,6 +152,12 @@ static __always_inline const struct vdso_data *__arch_get_vdso_data(void) · 34 unmodified lines
152 return ret;152 return ret;
153}153}
154 154
155static inline bool vdso_clocksource_ok(const struct vdso_data *vd)
156{
157 return vd->clock_mode == VDSO_CLOCKMODE_ARCHTIMER;
158}
159#define vdso_clocksource_ok vdso_clocksource_ok
160
155#endif /* !__ASSEMBLY__ */161#endif /* !__ASSEMBLY__ */
156 162
157#endif /* __ASM_VDSO_GETTIMEOFDAY_H */163#endif /* __ASM_VDSO_GETTIMEOFDAY_H */
arch/arm64/kernel/alternative.c+2−14
@@ -43,20 +43,8 @@ bool alternative_is_applied(u16 cpufeature) · 42 unmodified lines
43 */43 */
44static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)44static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
45{45{
46 unsigned long replptr;46 unsigned long replptr = (unsigned long)ALT_REPL_PTR(alt);
47 47 return !(pc >= replptr && pc <= (replptr + alt->alt_len));
48 if (kernel_text_address(pc))
49 return true;
50
51 replptr = (unsigned long)ALT_REPL_PTR(alt);
52 if (pc >= replptr && pc <= (replptr + alt->alt_len))
53 return false;
54
55 /*
56 * Branching into *another* alternate sequence is doomed, and
57 * we're not even trying to fix it up.
58 */
59 BUG();
60}48}
61 49
62#define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))50#define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))
arch/arm64/kernel/cpu_errata.c+1−0
@@ -782,6 +782,7 @@ static const struct midr_range erratum_1463225[] = { · 781 unmodified lines
782 MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1),782 MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1),
783 /* Kryo4xx Gold (rcpe to rfpf) => (r0p0 to r3p1) */783 /* Kryo4xx Gold (rcpe to rfpf) => (r0p0 to r3p1) */
784 MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xf),784 MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xf),
785 {},
785};786};
786#endif787#endif
787 788
arch/arm64/kernel/debug-monitors.c+18−6
@@ -141,17 +141,20 @@ postcore_initcall(debug_monitors_init); · 140 unmodified lines
141/*141/*
142 * Single step API and exception handling.142 * Single step API and exception handling.
143 */143 */
144static void set_regs_spsr_ss(struct pt_regs *regs)144static void set_user_regs_spsr_ss(struct user_pt_regs *regs)
145{145{
146 regs->pstate |= DBG_SPSR_SS;146 regs->pstate |= DBG_SPSR_SS;
147}147}
148NOKPROBE_SYMBOL(set_regs_spsr_ss);148NOKPROBE_SYMBOL(set_user_regs_spsr_ss);
149 149
150static void clear_regs_spsr_ss(struct pt_regs *regs)150static void clear_user_regs_spsr_ss(struct user_pt_regs *regs)
151{151{
152 regs->pstate &= ~DBG_SPSR_SS;152 regs->pstate &= ~DBG_SPSR_SS;
153}153}
154NOKPROBE_SYMBOL(clear_regs_spsr_ss);154NOKPROBE_SYMBOL(clear_user_regs_spsr_ss);
155
156#define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs)
157#define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs)
155 158
156static DEFINE_SPINLOCK(debug_hook_lock);159static DEFINE_SPINLOCK(debug_hook_lock);
157static LIST_HEAD(user_step_hook);160static LIST_HEAD(user_step_hook);
@@ -391,17 +394,26 @@ void user_rewind_single_step(struct task_struct *task) · 233 unmodified lines
391 * If single step is active for this thread, then set SPSR.SS394 * If single step is active for this thread, then set SPSR.SS
392 * to 1 to avoid returning to the active-pending state.395 * to 1 to avoid returning to the active-pending state.
393 */396 */
394 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))397 if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
395 set_regs_spsr_ss(task_pt_regs(task));398 set_regs_spsr_ss(task_pt_regs(task));
396}399}
397NOKPROBE_SYMBOL(user_rewind_single_step);400NOKPROBE_SYMBOL(user_rewind_single_step);
398 401
399void user_fastforward_single_step(struct task_struct *task)402void user_fastforward_single_step(struct task_struct *task)
400{403{
401 if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP))404 if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
402 clear_regs_spsr_ss(task_pt_regs(task));405 clear_regs_spsr_ss(task_pt_regs(task));
403}406}
404 407
408void user_regs_reset_single_step(struct user_pt_regs *regs,
409 struct task_struct *task)
410{
411 if (test_tsk_thread_flag(task, TIF_SINGLESTEP))
412 set_user_regs_spsr_ss(regs);
413 else
414 clear_user_regs_spsr_ss(regs);
415}
416
405/* Kernel API */417/* Kernel API */
406void kernel_enable_single_step(struct pt_regs *regs)418void kernel_enable_single_step(struct pt_regs *regs)
407{419{
arch/arm64/kernel/entry-common.c+1−1
@@ -57,7 +57,7 @@ static void notrace el1_dbg(struct pt_regs *regs, unsigned long esr) · 56 unmodified lines
57 /*57 /*
58 * The CPU masked interrupts, and we are leaving them masked during58 * The CPU masked interrupts, and we are leaving them masked during
59 * do_debug_exception(). Update PMR as if we had called59 * do_debug_exception(). Update PMR as if we had called
60 * local_mask_daif().60 * local_daif_mask().
61 */61 */
62 if (system_uses_irq_prio_masking())62 if (system_uses_irq_prio_masking())
63 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);63 gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET);
arch/arm64/kernel/entry.S+31−21
@@ -126,8 +126,10 @@ alternative_else_nop_endif · 125 unmodified lines
126 add \dst, \dst, #(\sym - .entry.tramp.text)126 add \dst, \dst, #(\sym - .entry.tramp.text)
127 .endm127 .endm
128 128
129 // This macro corrupts x0-x3. It is the caller's duty129 /*
130 // to save/restore them if required.130 * This macro corrupts x0-x3. It is the caller's duty to save/restore
131 * them if required.
132 */
131 .macro apply_ssbd, state, tmp1, tmp2133 .macro apply_ssbd, state, tmp1, tmp2
132#ifdef CONFIG_ARM64_SSBD134#ifdef CONFIG_ARM64_SSBD
133alternative_cb arm64_enable_wa2_handling135alternative_cb arm64_enable_wa2_handling
@@ -167,13 +169,28 @@ alternative_cb_end · 33 unmodified lines
167 stp x28, x29, [sp, #16 * 14]169 stp x28, x29, [sp, #16 * 14]
168 170
169 .if \el == 0171 .if \el == 0
172 .if \regsize == 32
173 /*
174 * If we're returning from a 32-bit task on a system affected by
175 * 1418040 then re-enable userspace access to the virtual counter.
176 */
177#ifdef CONFIG_ARM64_ERRATUM_1418040
178alternative_if ARM64_WORKAROUND_1418040
179 mrs x0, cntkctl_el1
180 orr x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN
181 msr cntkctl_el1, x0
182alternative_else_nop_endif
183#endif
184 .endif
170 clear_gp_regs185 clear_gp_regs
171 mrs x21, sp_el0186 mrs x21, sp_el0
172 ldr_this_cpu tsk, __entry_task, x20187 ldr_this_cpu tsk, __entry_task, x20
173 msr sp_el0, tsk188 msr sp_el0, tsk
174 189
175 // Ensure MDSCR_EL1.SS is clear, since we can unmask debug exceptions190 /*
176 // when scheduling.191 * Ensure MDSCR_EL1.SS is clear, since we can unmask debug exceptions
192 * when scheduling.
193 */
177 ldr x19, [tsk, #TSK_TI_FLAGS]194 ldr x19, [tsk, #TSK_TI_FLAGS]
178 disable_step_tsk x19, x20195 disable_step_tsk x19, x20
179 196
@@ -320,6 +337,14 @@ alternative_else_nop_endif · 140 unmodified lines
320 tst x22, #PSR_MODE32_BIT // native task?337 tst x22, #PSR_MODE32_BIT // native task?
321 b.eq 3f338 b.eq 3f
322 339
340#ifdef CONFIG_ARM64_ERRATUM_1418040
341alternative_if ARM64_WORKAROUND_1418040
342 mrs x0, cntkctl_el1
343 bic x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN
344 msr cntkctl_el1, x0
345alternative_else_nop_endif
346#endif
347
323#ifdef CONFIG_ARM64_ERRATUM_845719348#ifdef CONFIG_ARM64_ERRATUM_845719
324alternative_if ARM64_WORKAROUND_845719349alternative_if ARM64_WORKAROUND_845719
325#ifdef CONFIG_PID_IN_CONTEXTIDR350#ifdef CONFIG_PID_IN_CONTEXTIDR
@@ -331,21 +356,6 @@ alternative_if ARM64_WORKAROUND_845719 · 5 unmodified lines
331alternative_else_nop_endif356alternative_else_nop_endif
332#endif357#endif
3333:3583:
334#ifdef CONFIG_ARM64_ERRATUM_1418040
335alternative_if_not ARM64_WORKAROUND_1418040
336 b 4f
337alternative_else_nop_endif
338 /*
339 * if (x22.mode32 == cntkctl_el1.el0vcten)
340 * cntkctl_el1.el0vcten = ~cntkctl_el1.el0vcten
341 */
342 mrs x1, cntkctl_el1
343 eon x0, x1, x22, lsr #3
344 tbz x0, #1, 4f
345 eor x1, x1, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN
346 msr cntkctl_el1, x1
3474:
348#endif
349 scs_save tsk, x0359 scs_save tsk, x0
350 360
351 /* No kernel C function calls after this as user keys are set. */361 /* No kernel C function calls after this as user keys are set. */
@@ -377,11 +387,11 @@ alternative_else_nop_endif · 25 unmodified lines
377 .if \el == 0387 .if \el == 0
378alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0388alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
379#ifdef CONFIG_UNMAP_KERNEL_AT_EL0389#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
380 bne 5f390 bne 4f
381 msr far_el1, x30391 msr far_el1, x30
382 tramp_alias x30, tramp_exit_native392 tramp_alias x30, tramp_exit_native
383 br x30393 br x30
3845:3944:
385 tramp_alias x30, tramp_exit_compat395 tramp_alias x30, tramp_exit_compat
386 br x30396 br x30
387#endif397#endif
arch/arm64/kernel/kgdb.c+1−1
@@ -252,7 +252,7 @@ static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned int esr) · 251 unmodified lines
252 if (!kgdb_single_step)252 if (!kgdb_single_step)
253 return DBG_HOOK_ERROR;253 return DBG_HOOK_ERROR;
254 254
255 kgdb_handle_exception(1, SIGTRAP, 0, regs);255 kgdb_handle_exception(0, SIGTRAP, 0, regs);
256 return DBG_HOOK_HANDLED;256 return DBG_HOOK_HANDLED;
257}257}
258NOKPROBE_SYMBOL(kgdb_step_brk_fn);258NOKPROBE_SYMBOL(kgdb_step_brk_fn);
arch/arm64/kernel/ptrace.c+37−12
@@ -1811,19 +1811,42 @@ static void tracehook_report_syscall(struct pt_regs *regs, · 1810 unmodified lines
1811 unsigned long saved_reg;1811 unsigned long saved_reg;
1812 1812
1813 /*1813 /*
1814 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is1814 * We have some ABI weirdness here in the way that we handle syscall
1815 * used to denote syscall entry/exit:1815 * exit stops because we indicate whether or not the stop has been
1816 * signalled from syscall entry or syscall exit by clobbering a general
1817 * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee
1818 * and restoring its old value after the stop. This means that:
1819 *
1820 * - Any writes by the tracer to this register during the stop are
1821 * ignored/discarded.
1822 *
1823 * - The actual value of the register is not available during the stop,
1824 * so the tracer cannot save it and restore it later.
1825 *
1826 * - Syscall stops behave differently to seccomp and pseudo-step traps
1827 * (the latter do not nobble any registers).
1816 */1828 */
1817 regno = (is_compat_task() ? 12 : 7);1829 regno = (is_compat_task() ? 12 : 7);
1818 saved_reg = regs->regs[regno];1830 saved_reg = regs->regs[regno];
1819 regs->regs[regno] = dir;1831 regs->regs[regno] = dir;
1820 1832
1821 if (dir == PTRACE_SYSCALL_EXIT)1833 if (dir == PTRACE_SYSCALL_ENTER) {
1834 if (tracehook_report_syscall_entry(regs))
1835 forget_syscall(regs);
1836 regs->regs[regno] = saved_reg;
1837 } else if (!test_thread_flag(TIF_SINGLESTEP)) {
1822 tracehook_report_syscall_exit(regs, 0);1838 tracehook_report_syscall_exit(regs, 0);
1823 else if (tracehook_report_syscall_entry(regs))1839 regs->regs[regno] = saved_reg;
1824 forget_syscall(regs);1840 } else {
1841 regs->regs[regno] = saved_reg;
1825 1842
1826 regs->regs[regno] = saved_reg;1843 /*
1844 * Signal a pseudo-step exception since we are stepping but
1845 * tracer modifications to the registers may have rewound the
1846 * state machine.
1847 */
1848 tracehook_report_syscall_exit(regs, 1);
1849 }
1827}1850}
1828 1851
1829int syscall_trace_enter(struct pt_regs *regs)1852int syscall_trace_enter(struct pt_regs *regs)
@@ -1833,12 +1856,12 @@ int syscall_trace_enter(struct pt_regs *regs) · 3 unmodified lines
1833 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {1856 if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {
1834 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);1857 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1835 if (!in_syscall(regs) || (flags & _TIF_SYSCALL_EMU))1858 if (!in_syscall(regs) || (flags & _TIF_SYSCALL_EMU))
1836 return -1;1859 return NO_SYSCALL;
1837 }1860 }
1838 1861
1839 /* Do the secure computing after ptrace; failures should be fast. */1862 /* Do the secure computing after ptrace; failures should be fast. */
1840 if (secure_computing() == -1)1863 if (secure_computing() == -1)
1841 return -1;1864 return NO_SYSCALL;
1842 1865
1843 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))1866 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1844 trace_sys_enter(regs, regs->syscallno);1867 trace_sys_enter(regs, regs->syscallno);
@@ -1851,12 +1874,14 @@ int syscall_trace_enter(struct pt_regs *regs) · 6 unmodified lines
1851 1874
1852void syscall_trace_exit(struct pt_regs *regs)1875void syscall_trace_exit(struct pt_regs *regs)
1853{1876{
1877 unsigned long flags = READ_ONCE(current_thread_info()->flags);
1878
1854 audit_syscall_exit(regs);1879 audit_syscall_exit(regs);
1855 1880
1856 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))1881 if (flags & _TIF_SYSCALL_TRACEPOINT)
1857 trace_sys_exit(regs, regs_return_value(regs));1882 trace_sys_exit(regs, regs_return_value(regs));
1858 1883
1859 if (test_thread_flag(TIF_SYSCALL_TRACE))1884 if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP))
1860 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);1885 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1861 1886
1862 rseq_syscall(regs);1887 rseq_syscall(regs);
@@ -1934,8 +1959,8 @@ static int valid_native_regs(struct user_pt_regs *regs) · 71 unmodified lines
1934 */1959 */
1935int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)1960int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1936{1961{
1937 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))1962 /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
1938 regs->pstate &= ~DBG_SPSR_SS;1963 user_regs_reset_single_step(regs, task);
1939 1964
1940 if (is_compat_thread(task_thread_info(task)))1965 if (is_compat_thread(task_thread_info(task)))
1941 return valid_compat_regs(regs);1966 return valid_compat_regs(regs);
arch/arm64/kernel/signal.c+2−9
@@ -800,7 +800,6 @@ static void setup_restart_syscall(struct pt_regs *regs) · 799 unmodified lines
800 */800 */
801static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)801static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
802{802{
803 struct task_struct *tsk = current;
804 sigset_t *oldset = sigmask_to_save();803 sigset_t *oldset = sigmask_to_save();
805 int usig = ksig->sig;804 int usig = ksig->sig;
806 int ret;805 int ret;
@@ -824,14 +823,8 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) · 17 unmodified lines
824 */823 */
825 ret |= !valid_user_regs(&regs->user_regs, current);824 ret |= !valid_user_regs(&regs->user_regs, current);
826 825
827 /*826 /* Step into the signal handler if we are stepping */
828 * Fast forward the stepping logic so we step into the signal827 signal_setup_done(ret, ksig, test_thread_flag(TIF_SINGLESTEP));
829 * handler.
830 */
831 if (!ret)
832 user_fastforward_single_step(tsk);
833
834 signal_setup_done(ret, ksig, 0);
835}828}
836 829
837/*830/*
arch/arm64/kernel/syscall.c+19−2
@@ -50,6 +50,9 @@ static void invoke_syscall(struct pt_regs *regs, unsigned int scno, · 49 unmodified lines
50 ret = do_ni_syscall(regs, scno);50 ret = do_ni_syscall(regs, scno);
51 }51 }
52 52
53 if (is_compat_task())
54 ret = lower_32_bits(ret);
55
53 regs->regs[0] = ret;56 regs->regs[0] = ret;
54}57}
55 58
@@ -121,7 +124,21 @@ static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, · 65 unmodified lines
121 user_exit();124 user_exit();
122 125
123 if (has_syscall_work(flags)) {126 if (has_syscall_work(flags)) {
124 /* set default errno for user-issued syscall(-1) */127 /*
128 * The de-facto standard way to skip a system call using ptrace
129 * is to set the system call to -1 (NO_SYSCALL) and set x0 to a
130 * suitable error code for consumption by userspace. However,
131 * this cannot be distinguished from a user-issued syscall(-1)
132 * and so we must set x0 to -ENOSYS here in case the tracer doesn't
133 * issue the skip and we fall into trace_exit with x0 preserved.
134 *
135 * This is slightly odd because it also means that if a tracer
136 * sets the system call number to -1 but does not initialise x0,
137 * then x0 will be preserved for all system calls apart from a
138 * user-issued syscall(-1). However, requesting a skip and not
139 * setting the return value is unlikely to do anything sensible
140 * anyway.
141 */
125 if (scno == NO_SYSCALL)142 if (scno == NO_SYSCALL)
126 regs->regs[0] = -ENOSYS;143 regs->regs[0] = -ENOSYS;
127 scno = syscall_trace_enter(regs);144 scno = syscall_trace_enter(regs);
@@ -139,7 +156,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, · 11 unmodified lines
139 if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) {156 if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) {
140 local_daif_mask();157 local_daif_mask();
141 flags = current_thread_info()->flags;158 flags = current_thread_info()->flags;
142 if (!has_syscall_work(flags)) {159 if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP)) {
143 /*160 /*
144 * We're off to userspace, where interrupts are161 * We're off to userspace, where interrupts are
145 * always enabled after we restore the flags from162 * always enabled after we restore the flags from
arch/arm64/kernel/vdso32/Makefile+1−1
@@ -14,7 +14,7 @@ COMPAT_GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE_COMPAT)elfedit)) · 13 unmodified lines
14COMPAT_GCC_TOOLCHAIN := $(realpath $(COMPAT_GCC_TOOLCHAIN_DIR)/..)14COMPAT_GCC_TOOLCHAIN := $(realpath $(COMPAT_GCC_TOOLCHAIN_DIR)/..)
15 15
16CC_COMPAT_CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%))16CC_COMPAT_CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%))
17CC_COMPAT_CLANG_FLAGS += --prefix=$(COMPAT_GCC_TOOLCHAIN_DIR)17CC_COMPAT_CLANG_FLAGS += --prefix=$(COMPAT_GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE_COMPAT))
18CC_COMPAT_CLANG_FLAGS += -no-integrated-as -Qunused-arguments18CC_COMPAT_CLANG_FLAGS += -no-integrated-as -Qunused-arguments
19ifneq ($(COMPAT_GCC_TOOLCHAIN),)19ifneq ($(COMPAT_GCC_TOOLCHAIN),)
20CC_COMPAT_CLANG_FLAGS += --gcc-toolchain=$(COMPAT_GCC_TOOLCHAIN)20CC_COMPAT_CLANG_FLAGS += --gcc-toolchain=$(COMPAT_GCC_TOOLCHAIN)
arch/arm64/kvm/mmu.c+6−5
@@ -1326,7 +1326,7 @@ static bool stage2_get_leaf_entry(struct kvm *kvm, phys_addr_t addr, · 1325 unmodified lines
1326 return true;1326 return true;
1327}1327}
1328 1328
1329static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr)1329static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr, unsigned long sz)
1330{1330{
1331 pud_t *pudp;1331 pud_t *pudp;
1332 pmd_t *pmdp;1332 pmd_t *pmdp;
@@ -1338,11 +1338,11 @@ static bool stage2_is_exec(struct kvm *kvm, phys_addr_t addr) · 5 unmodified lines
1338 return false;1338 return false;
1339 1339
1340 if (pudp)1340 if (pudp)
1341 return kvm_s2pud_exec(pudp);1341 return sz <= PUD_SIZE && kvm_s2pud_exec(pudp);
1342 else if (pmdp)1342 else if (pmdp)
1343 return kvm_s2pmd_exec(pmdp);1343 return sz <= PMD_SIZE && kvm_s2pmd_exec(pmdp);
1344 else1344 else
1345 return kvm_s2pte_exec(ptep);1345 return sz == PAGE_SIZE && kvm_s2pte_exec(ptep);
1346}1346}
1347 1347
1348static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,1348static int stage2_set_pte(struct kvm *kvm, struct kvm_mmu_memory_cache *cache,
@@ -1958,7 +1958,8 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 609 unmodified lines
1958 * execute permissions, and we preserve whatever we have.1958 * execute permissions, and we preserve whatever we have.
1959 */1959 */
1960 needs_exec = exec_fault ||1960 needs_exec = exec_fault ||
1961 (fault_status == FSC_PERM && stage2_is_exec(kvm, fault_ipa));1961 (fault_status == FSC_PERM &&
1962 stage2_is_exec(kvm, fault_ipa, vma_pagesize));
1962 1963
1963 if (vma_pagesize == PUD_SIZE) {1964 if (vma_pagesize == PUD_SIZE) {
1964 pud_t new_pud = kvm_pfn_pud(pfn, mem_type);1965 pud_t new_pud = kvm_pfn_pud(pfn, mem_type);
arch/mips/include/asm/unroll.h+3−5
@@ -19,15 +19,13 @@ · 18 unmodified lines
19 \19 \
20 /* \20 /* \
21 * We can't unroll if the number of iterations isn't \21 * We can't unroll if the number of iterations isn't \
22 * compile-time constant. Unfortunately GCC versions \22 * compile-time constant. Unfortunately clang versions \
23 * up until 4.6 tend to miss obvious constants & cause \23 * up until 8.0 tend to miss obvious constants & cause \
24 * this check to fail, even though they go on to \24 * this check to fail, even though they go on to \
25 * generate reasonable code for the switch statement, \25 * generate reasonable code for the switch statement, \
26 * so we skip the sanity check for those compilers. \26 * so we skip the sanity check for those compilers. \
27 */ \27 */ \
28 BUILD_BUG_ON((CONFIG_GCC_VERSION >= 40700 || \28 BUILD_BUG_ON(!__builtin_constant_p(times)); \
29 CONFIG_CLANG_VERSION >= 80000) && \
30 !__builtin_constant_p(times)); \
31 \29 \
32 switch (times) { \30 switch (times) { \
33 case 32: fn(__VA_ARGS__); /* fall through */ \31 case 32: fn(__VA_ARGS__); /* fall through */ \
arch/mips/kvm/emulate.c+4−0
@@ -1722,6 +1722,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst, · 1721 unmodified lines
1722 vcpu->arch.gprs[rt], *(u32 *)data);1722 vcpu->arch.gprs[rt], *(u32 *)data);
1723 break;1723 break;
1724 1724
1725#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ)
1725 case sdl_op:1726 case sdl_op:
1726 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(1727 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(
1727 vcpu->arch.host_cp0_badvaddr) & (~0x7);1728 vcpu->arch.host_cp0_badvaddr) & (~0x7);
@@ -1815,6 +1816,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst, · 87 unmodified lines
1815 vcpu->arch.pc, vcpu->arch.host_cp0_badvaddr,1816 vcpu->arch.pc, vcpu->arch.host_cp0_badvaddr,
1816 vcpu->arch.gprs[rt], *(u64 *)data);1817 vcpu->arch.gprs[rt], *(u64 *)data);
1817 break;1818 break;
1819#endif
1818 1820
1819#ifdef CONFIG_CPU_LOONGSON641821#ifdef CONFIG_CPU_LOONGSON64
1820 case sdc2_op:1822 case sdc2_op:
@@ -2002,6 +2004,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst, · 181 unmodified lines
2002 }2004 }
2003 break;2005 break;
2004 2006
2007#if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ)
2005 case ldl_op:2008 case ldl_op:
2006 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(2009 run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa(
2007 vcpu->arch.host_cp0_badvaddr) & (~0x7);2010 vcpu->arch.host_cp0_badvaddr) & (~0x7);
@@ -2073,6 +2076,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst, · 65 unmodified lines
2073 break;2076 break;
2074 }2077 }
2075 break;2078 break;
2079#endif
2076 2080
2077#ifdef CONFIG_CPU_LOONGSON642081#ifdef CONFIG_CPU_LOONGSON64
2078 case ldc2_op:2082 case ldc2_op:
arch/mips/pci/pci-xtalk-bridge.c+3−2
@@ -627,9 +627,10 @@ static int bridge_probe(struct platform_device *pdev) · 626 unmodified lines
627 return -ENOMEM;627 return -ENOMEM;
628 domain = irq_domain_create_hierarchy(parent, 0, 8, fn,628 domain = irq_domain_create_hierarchy(parent, 0, 8, fn,
629 &bridge_domain_ops, NULL);629 &bridge_domain_ops, NULL);
630 irq_domain_free_fwnode(fn);630 if (!domain) {
631 if (!domain)631 irq_domain_free_fwnode(fn);
632 return -ENOMEM;632 return -ENOMEM;
633 }
633 634
634 pci_set_flags(PCI_PROBE_ONLY);635 pci_set_flags(PCI_PROBE_ONLY);
635 636
arch/parisc/include/asm/atomic.h+2−0
@@ -212,6 +212,8 @@ atomic64_set(atomic64_t *v, s64 i) · 211 unmodified lines
212 _atomic_spin_unlock_irqrestore(v, flags);212 _atomic_spin_unlock_irqrestore(v, flags);
213}213}
214 214
215#define atomic64_set_release(v, i) atomic64_set((v), (i))
216
215static __inline__ s64217static __inline__ s64
216atomic64_read(const atomic64_t *v)218atomic64_read(const atomic64_t *v)
217{219{
arch/parisc/include/asm/cmpxchg.h+2−0
@@ -60,6 +60,7 @@ extern void __cmpxchg_called_with_bad_pointer(void); · 59 unmodified lines
60extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,60extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,
61 unsigned int new_);61 unsigned int new_);
62extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);62extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);
63extern u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new_);
63 64
64/* don't worry...optimizer will get rid of most of this */65/* don't worry...optimizer will get rid of most of this */
65static inline unsigned long66static inline unsigned long
@@ -71,6 +72,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) · 5 unmodified lines
71#endif72#endif
72 case 4: return __cmpxchg_u32((unsigned int *)ptr,73 case 4: return __cmpxchg_u32((unsigned int *)ptr,
73 (unsigned int)old, (unsigned int)new_);74 (unsigned int)old, (unsigned int)new_);
75 case 1: return __cmpxchg_u8((u8 *)ptr, (u8)old, (u8)new_);
74 }76 }
75 __cmpxchg_called_with_bad_pointer();77 __cmpxchg_called_with_bad_pointer();
76 return old;78 return old;
arch/parisc/lib/bitops.c+12−0
@@ -79,3 +79,15 @@ unsigned long __cmpxchg_u32(volatile unsigned int *ptr, unsigned int old, unsign · 78 unmodified lines
79 _atomic_spin_unlock_irqrestore(ptr, flags);79 _atomic_spin_unlock_irqrestore(ptr, flags);
80 return (unsigned long)prev;80 return (unsigned long)prev;
81}81}
82
83u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new)
84{
85 unsigned long flags;
86 u8 prev;
87
88 _atomic_spin_lock_irqsave(ptr, flags);
89 if ((prev = *ptr) == old)
90 *ptr = new;
91 _atomic_spin_unlock_irqrestore(ptr, flags);
92 return prev;
93}
arch/powerpc/include/asm/icswx.h+2−0
@@ -77,6 +77,8 @@ struct coprocessor_completion_block { · 76 unmodified lines
77#define CSB_CC_CHAIN (37)77#define CSB_CC_CHAIN (37)
78#define CSB_CC_SEQUENCE (38)78#define CSB_CC_SEQUENCE (38)
79#define CSB_CC_HW (39)79#define CSB_CC_HW (39)
80/* P9 DD2 NX Workbook 3.2 (Table 4-36): Address translation fault */
81#define CSB_CC_FAULT_ADDRESS (250)
80 82
81#define CSB_SIZE (0x10)83#define CSB_SIZE (0x10)
82#define CSB_ALIGN CSB_SIZE84#define CSB_ALIGN CSB_SIZE
arch/powerpc/kernel/exceptions-64s.S+12−4
@@ -2551,7 +2551,7 @@ EXC_VIRT_NONE(0x5400, 0x100) · 2550 unmodified lines
2551INT_DEFINE_BEGIN(denorm_exception)2551INT_DEFINE_BEGIN(denorm_exception)
2552 IVEC=0x15002552 IVEC=0x1500
2553 IHSRR=12553 IHSRR=1
2554 IBRANCH_COMMON=02554 IBRANCH_TO_COMMON=0
2555 IKVM_REAL=12555 IKVM_REAL=1
2556INT_DEFINE_END(denorm_exception)2556INT_DEFINE_END(denorm_exception)
2557 2557
@@ -3072,10 +3072,18 @@ do_hash_page: · 514 unmodified lines
3072 ori r0,r0,DSISR_BAD_FAULT_64S@l3072 ori r0,r0,DSISR_BAD_FAULT_64S@l
3073 and. r0,r5,r0 /* weird error? */3073 and. r0,r5,r0 /* weird error? */
3074 bne- handle_page_fault /* if not, try to insert a HPTE */3074 bne- handle_page_fault /* if not, try to insert a HPTE */
3075
3076 /*
3077 * If we are in an "NMI" (e.g., an interrupt when soft-disabled), then
3078 * don't call hash_page, just fail the fault. This is required to
3079 * prevent re-entrancy problems in the hash code, namely perf
3080 * interrupts hitting while something holds H_PAGE_BUSY, and taking a
3081 * hash fault. See the comment in hash_preload().
3082 */
3075 ld r11, PACA_THREAD_INFO(r13)3083 ld r11, PACA_THREAD_INFO(r13)
3076 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */3084 lwz r0,TI_PREEMPT(r11)
3077 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */3085 andis. r0,r0,NMI_MASK@h
3078 bne 77f /* then don't call hash_page now */3086 bne 77f
3079 3087
3080 /*3088 /*
3081 * r3 contains the trap number3089 * r3 contains the trap number
arch/powerpc/kernel/paca.c+1−1
@@ -87,7 +87,7 @@ static void *__init alloc_shared_lppaca(unsigned long size, unsigned long align, · 86 unmodified lines
87 * This is very early in boot, so no harm done if the kernel crashes at87 * This is very early in boot, so no harm done if the kernel crashes at
88 * this point.88 * this point.
89 */89 */
90 BUG_ON(shared_lppaca_size >= shared_lppaca_total_size);90 BUG_ON(shared_lppaca_size > shared_lppaca_total_size);
91 91
92 return ptr;92 return ptr;
93}93}
arch/powerpc/mm/book3s64/hash_utils.c+25−0
@@ -1559,6 +1559,7 @@ static void hash_preload(struct mm_struct *mm, pte_t *ptep, unsigned long ea, · 1558 unmodified lines
1559 pgd_t *pgdir;1559 pgd_t *pgdir;
1560 int rc, ssize, update_flags = 0;1560 int rc, ssize, update_flags = 0;
1561 unsigned long access = _PAGE_PRESENT | _PAGE_READ | (is_exec ? _PAGE_EXEC : 0);1561 unsigned long access = _PAGE_PRESENT | _PAGE_READ | (is_exec ? _PAGE_EXEC : 0);
1562 unsigned long flags;
1562 1563
1563 BUG_ON(get_region_id(ea) != USER_REGION_ID);1564 BUG_ON(get_region_id(ea) != USER_REGION_ID);
1564 1565
@@ -1592,6 +1593,28 @@ static void hash_preload(struct mm_struct *mm, pte_t *ptep, unsigned long ea, · 27 unmodified lines
1592 return;1593 return;
1593#endif /* CONFIG_PPC_64K_PAGES */1594#endif /* CONFIG_PPC_64K_PAGES */
1594 1595
1596 /*
1597 * __hash_page_* must run with interrupts off, as it sets the
1598 * H_PAGE_BUSY bit. It's possible for perf interrupts to hit at any
1599 * time and may take a hash fault reading the user stack, see
1600 * read_user_stack_slow() in the powerpc/perf code.
1601 *
1602 * If that takes a hash fault on the same page as we lock here, it
1603 * will bail out when seeing H_PAGE_BUSY set, and retry the access
1604 * leading to an infinite loop.
1605 *
1606 * Disabling interrupts here does not prevent perf interrupts, but it
1607 * will prevent them taking hash faults (see the NMI test in
1608 * do_hash_page), then read_user_stack's copy_from_user_nofault will
1609 * fail and perf will fall back to read_user_stack_slow(), which
1610 * walks the Linux page tables.
1611 *
1612 * Interrupts must also be off for the duration of the
1613 * mm_is_thread_local test and update, to prevent preempt running the
1614 * mm on another CPU (XXX: this may be racy vs kthread_use_mm).
1615 */
1616 local_irq_save(flags);
1617
1595 /* Is that local to this CPU ? */1618 /* Is that local to this CPU ? */
1596 if (mm_is_thread_local(mm))1619 if (mm_is_thread_local(mm))
1597 update_flags |= HPTE_LOCAL_UPDATE;1620 update_flags |= HPTE_LOCAL_UPDATE;
@@ -1614,6 +1637,8 @@ static void hash_preload(struct mm_struct *mm, pte_t *ptep, unsigned long ea, · 16 unmodified lines
1614 mm_ctx_user_psize(&mm->context),1637 mm_ctx_user_psize(&mm->context),
1615 mm_ctx_user_psize(&mm->context),1638 mm_ctx_user_psize(&mm->context),
1616 pte_val(*ptep));1639 pte_val(*ptep));
1640
1641 local_irq_restore(flags);
1617}1642}
1618 1643
1619/*1644/*
arch/powerpc/mm/book3s64/pkeys.c+7−5
@@ -354,12 +354,14 @@ static bool pkey_access_permitted(int pkey, bool write, bool execute) · 353 unmodified lines
354 u64 amr;354 u64 amr;
355 355
356 pkey_shift = pkeyshift(pkey);356 pkey_shift = pkeyshift(pkey);
357 if (execute && !(read_iamr() & (IAMR_EX_BIT << pkey_shift)))357 if (execute)
358 return true;358 return !(read_iamr() & (IAMR_EX_BIT << pkey_shift));
359
360 amr = read_amr();
361 if (write)
362 return !(amr & (AMR_WR_BIT << pkey_shift));
359 363
360 amr = read_amr(); /* Delay reading amr until absolutely needed */364 return !(amr & (AMR_RD_BIT << pkey_shift));
361 return ((!write && !(amr & (AMR_RD_BIT << pkey_shift))) ||
362 (write && !(amr & (AMR_WR_BIT << pkey_shift))));
363}365}
364 366
365bool arch_pte_access_permitted(u64 pte, bool write, bool execute)367bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
arch/powerpc/perf/core-book3s.c+6−0
@@ -2179,6 +2179,12 @@ static void __perf_event_interrupt(struct pt_regs *regs) · 2178 unmodified lines
2179 2179
2180 perf_read_regs(regs);2180 perf_read_regs(regs);
2181 2181
2182 /*
2183 * If perf interrupts hit in a local_irq_disable (soft-masked) region,
2184 * we consider them as NMIs. This is required to prevent hash faults on
2185 * user addresses when reading callchains. See the NMI test in
2186 * do_hash_page.
2187 */
2182 nmi = perf_intr_is_nmi(regs);2188 nmi = perf_intr_is_nmi(regs);
2183 if (nmi)2189 if (nmi)
2184 nmi_enter();2190 nmi_enter();
arch/powerpc/platforms/powernv/vas-fault.c+1−1
@@ -79,7 +79,7 @@ static void update_csb(struct vas_window *window, · 78 unmodified lines
79 csb_addr = (void __user *)be64_to_cpu(crb->csb_addr);79 csb_addr = (void __user *)be64_to_cpu(crb->csb_addr);
80 80
81 memset(&csb, 0, sizeof(csb));81 memset(&csb, 0, sizeof(csb));
82 csb.cc = CSB_CC_TRANSLATION;82 csb.cc = CSB_CC_FAULT_ADDRESS;
83 csb.ce = CSB_CE_TERMINATION;83 csb.ce = CSB_CE_TERMINATION;
84 csb.cs = 0;84 csb.cs = 0;
85 csb.count = 0;85 csb.count = 0;
arch/riscv/Kconfig+2−0
@@ -23,6 +23,8 @@ config RISCV · 22 unmodified lines
23 select ARCH_HAS_SET_DIRECT_MAP23 select ARCH_HAS_SET_DIRECT_MAP
24 select ARCH_HAS_SET_MEMORY24 select ARCH_HAS_SET_MEMORY
25 select ARCH_HAS_STRICT_KERNEL_RWX if MMU25 select ARCH_HAS_STRICT_KERNEL_RWX if MMU
26 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
27 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT
26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU28 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
27 select ARCH_WANT_FRAME_POINTERS29 select ARCH_WANT_FRAME_POINTERS
28 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT30 select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
arch/riscv/include/asm/barrier.h+9−1
@@ -58,8 +58,16 @@ do { \ · 57 unmodified lines
58 * The AQ/RL pair provides a RCpc critical section, but there's not really any58 * The AQ/RL pair provides a RCpc critical section, but there's not really any
59 * way we can take advantage of that here because the ordering is only enforced59 * way we can take advantage of that here because the ordering is only enforced
60 * on that one lock. Thus, we're just doing a full fence.60 * on that one lock. Thus, we're just doing a full fence.
61 *
62 * Since we allow writeX to be called from preemptive regions we need at least
63 * an "o" in the predecessor set to ensure device writes are visible before the
64 * task is marked as available for scheduling on a new hart. While I don't see
65 * any concrete reason we need a full IO fence, it seems safer to just upgrade
66 * this in order to avoid any IO crossing a scheduling boundary. In both
67 * instances the scheduler pairs this with an mb(), so nothing is necessary on
68 * the new hart.
61 */69 */
62#define smp_mb__after_spinlock() RISCV_FENCE(rw,rw)70#define smp_mb__after_spinlock() RISCV_FENCE(iorw,iorw)
63 71
64#include <asm-generic/barrier.h>72#include <asm-generic/barrier.h>
65 73
arch/riscv/include/asm/gdb_xml.h+1−2
@@ -3,8 +3,7 @@ · 2 unmodified lines
3#ifndef __ASM_GDB_XML_H_3#ifndef __ASM_GDB_XML_H_
4#define __ASM_GDB_XML_H_4#define __ASM_GDB_XML_H_
5 5
6#define kgdb_arch_gdb_stub_feature riscv_gdb_stub_feature6const char riscv_gdb_stub_feature[64] =
7static const char riscv_gdb_stub_feature[64] =
8 "PacketSize=800;qXfer:features:read+;";7 "PacketSize=800;qXfer:features:read+;";
9 8
10static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:";9static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:";
arch/riscv/include/asm/kgdb.h+3−2
@@ -19,7 +19,6 @@ · 18 unmodified lines
19 19
20#ifndef __ASSEMBLY__20#ifndef __ASSEMBLY__
21 21
22extern int kgdb_has_hit_break(unsigned long addr);
23extern unsigned long kgdb_compiled_break;22extern unsigned long kgdb_compiled_break;
24 23
25static inline void arch_kgdb_breakpoint(void)24static inline void arch_kgdb_breakpoint(void)
@@ -106,7 +105,9 @@ static inline void arch_kgdb_breakpoint(void) · 80 unmodified lines
106#define DBG_REG_BADADDR_OFF 34105#define DBG_REG_BADADDR_OFF 34
107#define DBG_REG_CAUSE_OFF 35106#define DBG_REG_CAUSE_OFF 35
108 107
109#include <asm/gdb_xml.h>108extern const char riscv_gdb_stub_feature[64];
109
110#define kgdb_arch_gdb_stub_feature riscv_gdb_stub_feature
110 111
111#endif112#endif
112#endif113#endif
arch/riscv/include/asm/thread_info.h+4−0
@@ -12,7 +12,11 @@ · 11 unmodified lines
12#include <linux/const.h>12#include <linux/const.h>
13 13
14/* thread information allocation */14/* thread information allocation */
15#ifdef CONFIG_64BIT
16#define THREAD_SIZE_ORDER (2)
17#else
15#define THREAD_SIZE_ORDER (1)18#define THREAD_SIZE_ORDER (1)
19#endif
16#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)20#define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER)
17 21
18#ifndef __ASSEMBLY__22#ifndef __ASSEMBLY__
arch/riscv/kernel/kgdb.c+5−5
@@ -44,18 +44,18 @@ DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) · 43 unmodified lines
44DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)44DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ)
45DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)45DECLARE_INSN(sret, MATCH_SRET, MASK_SRET)
46 46
47int decode_register_index(unsigned long opcode, int offset)47static int decode_register_index(unsigned long opcode, int offset)
48{48{
49 return (opcode >> offset) & 0x1F;49 return (opcode >> offset) & 0x1F;
50}50}
51 51
52int decode_register_index_short(unsigned long opcode, int offset)52static int decode_register_index_short(unsigned long opcode, int offset)
53{53{
54 return ((opcode >> offset) & 0x7) + 8;54 return ((opcode >> offset) & 0x7) + 8;
55}55}
56 56
57/* Calculate the new address for after a step */57/* Calculate the new address for after a step */
58int get_step_address(struct pt_regs *regs, unsigned long *next_addr)58static int get_step_address(struct pt_regs *regs, unsigned long *next_addr)
59{59{
60 unsigned long pc = regs->epc;60 unsigned long pc = regs->epc;
61 unsigned long *regs_ptr = (unsigned long *)regs;61 unsigned long *regs_ptr = (unsigned long *)regs;
@@ -136,7 +136,7 @@ int get_step_address(struct pt_regs *regs, unsigned long *next_addr) · 74 unmodified lines
136 return 0;136 return 0;
137}137}
138 138
139int do_single_step(struct pt_regs *regs)139static int do_single_step(struct pt_regs *regs)
140{140{
141 /* Determine where the target instruction will send us to */141 /* Determine where the target instruction will send us to */
142 unsigned long addr = 0;142 unsigned long addr = 0;
@@ -320,7 +320,7 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code, · 177 unmodified lines
320 return err;320 return err;
321}321}
322 322
323int kgdb_riscv_kgdbbreak(unsigned long addr)323static int kgdb_riscv_kgdbbreak(unsigned long addr)
324{324{
325 if (stepped_address == addr)325 if (stepped_address == addr)
326 return KGDB_SW_SINGLE_STEP;326 return KGDB_SW_SINGLE_STEP;
arch/riscv/mm/init.c+45−21
@@ -95,19 +95,40 @@ void __init mem_init(void) · 94 unmodified lines
95#ifdef CONFIG_BLK_DEV_INITRD95#ifdef CONFIG_BLK_DEV_INITRD
96static void __init setup_initrd(void)96static void __init setup_initrd(void)
97{97{
98 phys_addr_t start;
98 unsigned long size;99 unsigned long size;
99 100
100 if (initrd_start >= initrd_end) {101 /* Ignore the virtul address computed during device tree parsing */
101 pr_info("initrd not found or empty");102 initrd_start = initrd_end = 0;
103
104 if (!phys_initrd_size)
105 return;
106 /*
107 * Round the memory region to page boundaries as per free_initrd_mem()
108 * This allows us to detect whether the pages overlapping the initrd
109 * are in use, but more importantly, reserves the entire set of pages
110 * as we don't want these pages allocated for other purposes.
111 */
112 start = round_down(phys_initrd_start, PAGE_SIZE);
113 size = phys_initrd_size + (phys_initrd_start - start);
114 size = round_up(size, PAGE_SIZE);
115
116 if (!memblock_is_region_memory(start, size)) {
117 pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
118 (u64)start, size);
102 goto disable;119 goto disable;
103 }120 }
104 if (__pa_symbol(initrd_end) > PFN_PHYS(max_low_pfn)) {121
105 pr_err("initrd extends beyond end of memory");122 if (memblock_is_region_reserved(start, size)) {
123 pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
124 (u64)start, size);
106 goto disable;125 goto disable;
107 }126 }
108 127
109 size = initrd_end - initrd_start;128 memblock_reserve(start, size);
110 memblock_reserve(__pa_symbol(initrd_start), size);129 /* Now convert initrd to virtual addresses */
130 initrd_start = (unsigned long)__va(phys_initrd_start);
131 initrd_end = initrd_start + phys_initrd_size;
111 initrd_below_start_ok = 1;132 initrd_below_start_ok = 1;
112 133
113 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",134 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
@@ -126,33 +147,36 @@ void __init setup_bootmem(void) · 12 unmodified lines
126{147{
127 struct memblock_region *reg;148 struct memblock_region *reg;
128 phys_addr_t mem_size = 0;149 phys_addr_t mem_size = 0;
150 phys_addr_t total_mem = 0;
151 phys_addr_t mem_start, end = 0;
129 phys_addr_t vmlinux_end = __pa_symbol(&_end);152 phys_addr_t vmlinux_end = __pa_symbol(&_end);
130 phys_addr_t vmlinux_start = __pa_symbol(&_start);153 phys_addr_t vmlinux_start = __pa_symbol(&_start);
131 154
132 /* Find the memory region containing the kernel */155 /* Find the memory region containing the kernel */
133 for_each_memblock(memory, reg) {156 for_each_memblock(memory, reg) {
134 phys_addr_t end = reg->base + reg->size;157 end = reg->base + reg->size;
135 158 if (!total_mem)
136 if (reg->base <= vmlinux_start && vmlinux_end <= end) {159 mem_start = reg->base;
137 mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET);160 if (reg->base <= vmlinux_start && vmlinux_end <= end)
138 161 BUG_ON(reg->size == 0);
139 /*162 total_mem = total_mem + reg->size;
140 * Remove memblock from the end of usable area to the
141 * end of region
142 */
143 if (reg->base + mem_size < end)
144 memblock_remove(reg->base + mem_size,
145 end - reg->base - mem_size);
146 }
147 }163 }
148 BUG_ON(mem_size == 0);164
165 /*
166 * Remove memblock from the end of usable area to the
167 * end of region
168 */
169 mem_size = min(total_mem, (phys_addr_t)-PAGE_OFFSET);
170 if (mem_start + mem_size < end)
171 memblock_remove(mem_start + mem_size,
172 end - mem_start - mem_size);
149 173
150 /* Reserve from the start of the kernel to the end of the kernel */174 /* Reserve from the start of the kernel to the end of the kernel */
151 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);175 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
152 176
153 set_max_mapnr(PFN_DOWN(mem_size));
154 max_pfn = PFN_DOWN(memblock_end_of_DRAM());177 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
155 max_low_pfn = max_pfn;178 max_low_pfn = max_pfn;
179 set_max_mapnr(max_low_pfn);
156 180
157#ifdef CONFIG_BLK_DEV_INITRD181#ifdef CONFIG_BLK_DEV_INITRD
158 setup_initrd();182 setup_initrd();
arch/riscv/mm/kasan_init.c+2−2
@@ -44,7 +44,7 @@ asmlinkage void __init kasan_early_init(void) · 43 unmodified lines
44 (__pa(((uintptr_t) kasan_early_shadow_pmd))),44 (__pa(((uintptr_t) kasan_early_shadow_pmd))),
45 __pgprot(_PAGE_TABLE)));45 __pgprot(_PAGE_TABLE)));
46 46
47 flush_tlb_all();47 local_flush_tlb_all();
48}48}
49 49
50static void __init populate(void *start, void *end)50static void __init populate(void *start, void *end)
@@ -79,7 +79,7 @@ static void __init populate(void *start, void *end) · 28 unmodified lines
79 pfn_pgd(PFN_DOWN(__pa(&pmd[offset])),79 pfn_pgd(PFN_DOWN(__pa(&pmd[offset])),
80 __pgprot(_PAGE_TABLE)));80 __pgprot(_PAGE_TABLE)));
81 81
82 flush_tlb_all();82 local_flush_tlb_all();
83 memset(start, 0, end - start);83 memset(start, 0, end - start);
84}84}
85 85
arch/s390/kernel/perf_cpum_cf_events.c+2−2
@@ -292,7 +292,7 @@ CPUMF_EVENT_ATTR(cf_z15, TX_C_TABORT_SPECIAL, 0x00f5); · 291 unmodified lines
292CPUMF_EVENT_ATTR(cf_z15, DFLT_ACCESS, 0x00f7);292CPUMF_EVENT_ATTR(cf_z15, DFLT_ACCESS, 0x00f7);
293CPUMF_EVENT_ATTR(cf_z15, DFLT_CYCLES, 0x00fc);293CPUMF_EVENT_ATTR(cf_z15, DFLT_CYCLES, 0x00fc);
294CPUMF_EVENT_ATTR(cf_z15, DFLT_CC, 0x00108);294CPUMF_EVENT_ATTR(cf_z15, DFLT_CC, 0x00108);
295CPUMF_EVENT_ATTR(cf_z15, DFLT_CCERROR, 0x00109);295CPUMF_EVENT_ATTR(cf_z15, DFLT_CCFINISH, 0x00109);
296CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);296CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
297CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);297CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
298 298
@@ -629,7 +629,7 @@ static struct attribute *cpumcf_z15_pmu_event_attr[] __initdata = { · 330 unmodified lines
629 CPUMF_EVENT_PTR(cf_z15, DFLT_ACCESS),629 CPUMF_EVENT_PTR(cf_z15, DFLT_ACCESS),
630 CPUMF_EVENT_PTR(cf_z15, DFLT_CYCLES),630 CPUMF_EVENT_PTR(cf_z15, DFLT_CYCLES),
631 CPUMF_EVENT_PTR(cf_z15, DFLT_CC),631 CPUMF_EVENT_PTR(cf_z15, DFLT_CC),
632 CPUMF_EVENT_PTR(cf_z15, DFLT_CCERROR),632 CPUMF_EVENT_PTR(cf_z15, DFLT_CCFINISH),
633 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE),633 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
634 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE),634 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
635 NULL,635 NULL,
arch/s390/mm/hugetlbpage.c+1−1
@@ -117,7 +117,7 @@ static inline pte_t __rste_to_pte(unsigned long rste) · 116 unmodified lines
117 _PAGE_YOUNG);117 _PAGE_YOUNG);
118#ifdef CONFIG_MEM_SOFT_DIRTY118#ifdef CONFIG_MEM_SOFT_DIRTY
119 pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY,119 pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY,
120 _PAGE_DIRTY);120 _PAGE_SOFT_DIRTY);
121#endif121#endif
122 pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC,122 pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC,
123 _PAGE_NOEXEC);123 _PAGE_NOEXEC);
arch/sh/include/asm/pgalloc.h+1−9
@@ -12,6 +12,7 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); · 11 unmodified lines
12extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);12extern void pud_populate(struct mm_struct *mm, pud_t *pudp, pmd_t *pmd);
13extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);13extern pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address);
14extern void pmd_free(struct mm_struct *mm, pmd_t *pmd);14extern void pmd_free(struct mm_struct *mm, pmd_t *pmd);
15#define __pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, (pmdp))
15#endif16#endif
16 17
17static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,18static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
@@ -33,13 +34,4 @@ do { \ · 15 unmodified lines
33 tlb_remove_page((tlb), (pte)); \34 tlb_remove_page((tlb), (pte)); \
34} while (0)35} while (0)
35 36
36#if CONFIG_PGTABLE_LEVELS > 2
37#define __pmd_free_tlb(tlb, pmdp, addr) \
38do { \
39 struct page *page = virt_to_page(pmdp); \
40 pgtable_pmd_page_dtor(page); \
41 tlb_remove_page((tlb), page); \
42} while (0);
43#endif
44
45#endif /* __ASM_SH_PGALLOC_H */37#endif /* __ASM_SH_PGALLOC_H */
arch/sh/kernel/entry-common.S+3−3
@@ -199,7 +199,7 @@ syscall_trace_entry: · 198 unmodified lines
199 mov.l @(OFF_R7,r15), r7 ! arg3199 mov.l @(OFF_R7,r15), r7 ! arg3
200 mov.l @(OFF_R3,r15), r3 ! syscall_nr200 mov.l @(OFF_R3,r15), r3 ! syscall_nr
201 !201 !
202 mov.l 2f, r10 ! Number of syscalls202 mov.l 6f, r10 ! Number of syscalls
203 cmp/hs r10, r3203 cmp/hs r10, r3
204 bf syscall_call204 bf syscall_call
205 mov #-ENOSYS, r0205 mov #-ENOSYS, r0
@@ -353,7 +353,7 @@ ENTRY(system_call) · 147 unmodified lines
353 tst r9, r8353 tst r9, r8
354 bf syscall_trace_entry354 bf syscall_trace_entry
355 !355 !
356 mov.l 2f, r8 ! Number of syscalls356 mov.l 6f, r8 ! Number of syscalls
357 cmp/hs r8, r3357 cmp/hs r8, r3
358 bt syscall_badsys358 bt syscall_badsys
359 !359 !
@@ -392,7 +392,7 @@ syscall_exit: · 32 unmodified lines
392#if !defined(CONFIG_CPU_SH2)392#if !defined(CONFIG_CPU_SH2)
3931: .long TRA3931: .long TRA
394#endif394#endif
3952: .long NR_syscalls3956: .long NR_syscalls
3963: .long sys_call_table3963: .long sys_call_table
3977: .long do_syscall_trace_enter3977: .long do_syscall_trace_enter
3988: .long do_syscall_trace_leave3988: .long do_syscall_trace_leave
arch/x86/boot/compressed/Makefile+2−2
@@ -90,8 +90,8 @@ endif · 89 unmodified lines
90 90
91vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o91vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o
92 92
93vmlinux-objs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
94vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o93vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o
94efi-obj-$(CONFIG_EFI_STUB) = $(objtree)/drivers/firmware/efi/libstub/lib.a
95 95
96# The compressed kernel is built with -fPIC/-fPIE so that a boot loader96# The compressed kernel is built with -fPIC/-fPIE so that a boot loader
97# can place it anywhere in memory and it will still run. However, since97# can place it anywhere in memory and it will still run. However, since
@@ -115,7 +115,7 @@ endef · 17 unmodified lines
115quiet_cmd_check-and-link-vmlinux = LD $@115quiet_cmd_check-and-link-vmlinux = LD $@
116 cmd_check-and-link-vmlinux = $(cmd_check_data_rel); $(cmd_ld)116 cmd_check-and-link-vmlinux = $(cmd_check_data_rel); $(cmd_ld)
117 117
118$(obj)/vmlinux: $(vmlinux-objs-y) FORCE118$(obj)/vmlinux: $(vmlinux-objs-y) $(efi-obj-y) FORCE
119 $(call if_changed,check-and-link-vmlinux)119 $(call if_changed,check-and-link-vmlinux)
120 120
121OBJCOPYFLAGS_vmlinux.bin := -R .comment -S121OBJCOPYFLAGS_vmlinux.bin := -R .comment -S
arch/x86/entry/Makefile+11−3
@@ -7,12 +7,20 @@ KASAN_SANITIZE := n · 6 unmodified lines
7UBSAN_SANITIZE := n7UBSAN_SANITIZE := n
8KCOV_INSTRUMENT := n8KCOV_INSTRUMENT := n
9 9
10CFLAGS_REMOVE_common.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong10CFLAGS_REMOVE_common.o = $(CC_FLAGS_FTRACE)
11CFLAGS_REMOVE_syscall_32.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong11CFLAGS_REMOVE_syscall_64.o = $(CC_FLAGS_FTRACE)
12CFLAGS_REMOVE_syscall_64.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong12CFLAGS_REMOVE_syscall_32.o = $(CC_FLAGS_FTRACE)
13CFLAGS_REMOVE_syscall_x32.o = $(CC_FLAGS_FTRACE)
14
15CFLAGS_common.o += -fno-stack-protector
16CFLAGS_syscall_64.o += -fno-stack-protector
17CFLAGS_syscall_32.o += -fno-stack-protector
18CFLAGS_syscall_x32.o += -fno-stack-protector
13 19
14CFLAGS_syscall_64.o += $(call cc-option,-Wno-override-init,)20CFLAGS_syscall_64.o += $(call cc-option,-Wno-override-init,)
15CFLAGS_syscall_32.o += $(call cc-option,-Wno-override-init,)21CFLAGS_syscall_32.o += $(call cc-option,-Wno-override-init,)
22CFLAGS_syscall_x32.o += $(call cc-option,-Wno-override-init,)
23
16obj-y := entry_$(BITS).o thunk_$(BITS).o syscall_$(BITS).o24obj-y := entry_$(BITS).o thunk_$(BITS).o syscall_$(BITS).o
17obj-y += common.o25obj-y += common.o
18 26
arch/x86/entry/common.c+2−2
@@ -46,7 +46,7 @@ · 45 unmodified lines
46#include <trace/events/syscalls.h>46#include <trace/events/syscalls.h>
47 47
48/* Check that the stack and regs on entry from user mode are sane. */48/* Check that the stack and regs on entry from user mode are sane. */
49static void check_user_regs(struct pt_regs *regs)49static noinstr void check_user_regs(struct pt_regs *regs)
50{50{
51 if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) {51 if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) {
52 /*52 /*
@@ -294,7 +294,7 @@ static void __prepare_exit_to_usermode(struct pt_regs *regs) · 241 unmodified lines
294#endif294#endif
295}295}
296 296
297__visible noinstr void prepare_exit_to_usermode(struct pt_regs *regs)297static noinstr void prepare_exit_to_usermode(struct pt_regs *regs)
298{298{
299 instrumentation_begin();299 instrumentation_begin();
300 __prepare_exit_to_usermode(regs);300 __prepare_exit_to_usermode(regs);
arch/x86/include/asm/idtentry.h+10−12
@@ -469,16 +469,15 @@ __visible noinstr void func(struct pt_regs *regs, \ · 468 unmodified lines
469 .align 8469 .align 8
470SYM_CODE_START(irq_entries_start)470SYM_CODE_START(irq_entries_start)
471 vector=FIRST_EXTERNAL_VECTOR471 vector=FIRST_EXTERNAL_VECTOR
472 pos = .
473 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)472 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
474 UNWIND_HINT_IRET_REGS473 UNWIND_HINT_IRET_REGS
4740 :
475 .byte 0x6a, vector475 .byte 0x6a, vector
476 jmp asm_common_interrupt476 jmp asm_common_interrupt
477 nop477 nop
478 /* Ensure that the above is 8 bytes max */478 /* Ensure that the above is 8 bytes max */
479 . = pos + 8479 . = 0b + 8
480 pos=pos+8480 vector = vector+1
481 vector=vector+1
482 .endr481 .endr
483SYM_CODE_END(irq_entries_start)482SYM_CODE_END(irq_entries_start)
484 483
@@ -486,16 +485,15 @@ SYM_CODE_END(irq_entries_start) · 1 unmodified line
486 .align 8485 .align 8
487SYM_CODE_START(spurious_entries_start)486SYM_CODE_START(spurious_entries_start)
488 vector=FIRST_SYSTEM_VECTOR487 vector=FIRST_SYSTEM_VECTOR
489 pos = .
490 .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)488 .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
491 UNWIND_HINT_IRET_REGS489 UNWIND_HINT_IRET_REGS
4900 :
492 .byte 0x6a, vector491 .byte 0x6a, vector
493 jmp asm_spurious_interrupt492 jmp asm_spurious_interrupt
494 nop493 nop
495 /* Ensure that the above is 8 bytes max */494 /* Ensure that the above is 8 bytes max */
496 . = pos + 8495 . = 0b + 8
497 pos=pos+8496 vector = vector+1
498 vector=vector+1
499 .endr497 .endr
500SYM_CODE_END(spurious_entries_start)498SYM_CODE_END(spurious_entries_start)
501#endif499#endif
@@ -553,7 +551,7 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_MC, exc_machine_check); · 51 unmodified lines
553 551
554/* NMI */552/* NMI */
555DECLARE_IDTENTRY_NMI(X86_TRAP_NMI, exc_nmi);553DECLARE_IDTENTRY_NMI(X86_TRAP_NMI, exc_nmi);
556#ifdef CONFIG_XEN_PV554#if defined(CONFIG_XEN_PV) && defined(CONFIG_X86_64)
557DECLARE_IDTENTRY_RAW(X86_TRAP_NMI, xenpv_exc_nmi);555DECLARE_IDTENTRY_RAW(X86_TRAP_NMI, xenpv_exc_nmi);
558#endif556#endif
559 557
@@ -563,7 +561,7 @@ DECLARE_IDTENTRY_DEBUG(X86_TRAP_DB, exc_debug); · 3 unmodified lines
563#else561#else
564DECLARE_IDTENTRY_RAW(X86_TRAP_DB, exc_debug);562DECLARE_IDTENTRY_RAW(X86_TRAP_DB, exc_debug);
565#endif563#endif
566#ifdef CONFIG_XEN_PV564#if defined(CONFIG_XEN_PV) && defined(CONFIG_X86_64)
567DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug);565DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug);
568#endif566#endif
569 567
@@ -626,8 +624,8 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR, sysvec_kvm_posted_intr_nested · 56 unmodified lines
626 624
627#if IS_ENABLED(CONFIG_HYPERV)625#if IS_ENABLED(CONFIG_HYPERV)
628DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback);626DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback);
629DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment);627DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment);
630DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_STIMER0_VECTOR, sysvec_hyperv_stimer0);628DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0);
631#endif629#endif
632 630
633#if IS_ENABLED(CONFIG_ACRN_GUEST)631#if IS_ENABLED(CONFIG_ACRN_GUEST)
arch/x86/include/asm/io_bitmap.h+16−0
@@ -19,12 +19,28 @@ struct task_struct; · 18 unmodified lines
19void io_bitmap_share(struct task_struct *tsk);19void io_bitmap_share(struct task_struct *tsk);
20void io_bitmap_exit(struct task_struct *tsk);20void io_bitmap_exit(struct task_struct *tsk);
21 21
22static inline void native_tss_invalidate_io_bitmap(void)
23{
24 /*
25 * Invalidate the I/O bitmap by moving io_bitmap_base outside the
26 * TSS limit so any subsequent I/O access from user space will
27 * trigger a #GP.
28 *
29 * This is correct even when VMEXIT rewrites the TSS limit
30 * to 0x67 as the only requirement is that the base points
31 * outside the limit.
32 */
33 this_cpu_write(cpu_tss_rw.x86_tss.io_bitmap_base,
34 IO_BITMAP_OFFSET_INVALID);
35}
36
22void native_tss_update_io_bitmap(void);37void native_tss_update_io_bitmap(void);
23 38
24#ifdef CONFIG_PARAVIRT_XXL39#ifdef CONFIG_PARAVIRT_XXL
25#include <asm/paravirt.h>40#include <asm/paravirt.h>
26#else41#else
27#define tss_update_io_bitmap native_tss_update_io_bitmap42#define tss_update_io_bitmap native_tss_update_io_bitmap
43#define tss_invalidate_io_bitmap native_tss_invalidate_io_bitmap
28#endif44#endif
29 45
30#else46#else
arch/x86/include/asm/iosf_mbi.h+1−0
@@ -39,6 +39,7 @@ · 38 unmodified lines
39#define BT_MBI_UNIT_PMC 0x0439#define BT_MBI_UNIT_PMC 0x04
40#define BT_MBI_UNIT_GFX 0x0640#define BT_MBI_UNIT_GFX 0x06
41#define BT_MBI_UNIT_SMI 0x0C41#define BT_MBI_UNIT_SMI 0x0C
42#define BT_MBI_UNIT_CCK 0x14
42#define BT_MBI_UNIT_USB 0x4343#define BT_MBI_UNIT_USB 0x43
43#define BT_MBI_UNIT_SATA 0xA344#define BT_MBI_UNIT_SATA 0xA3
44#define BT_MBI_UNIT_PCIE 0xA645#define BT_MBI_UNIT_PCIE 0xA6
arch/x86/include/asm/paravirt.h+5−0
@@ -302,6 +302,11 @@ static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) · 301 unmodified lines
302}302}
303 303
304#ifdef CONFIG_X86_IOPL_IOPERM304#ifdef CONFIG_X86_IOPL_IOPERM
305static inline void tss_invalidate_io_bitmap(void)
306{
307 PVOP_VCALL0(cpu.invalidate_io_bitmap);
308}
309
305static inline void tss_update_io_bitmap(void)310static inline void tss_update_io_bitmap(void)
306{311{
307 PVOP_VCALL0(cpu.update_io_bitmap);312 PVOP_VCALL0(cpu.update_io_bitmap);
arch/x86/include/asm/paravirt_types.h+1−0
@@ -141,6 +141,7 @@ struct pv_cpu_ops { · 140 unmodified lines
141 void (*load_sp0)(unsigned long sp0);141 void (*load_sp0)(unsigned long sp0);
142 142
143#ifdef CONFIG_X86_IOPL_IOPERM143#ifdef CONFIG_X86_IOPL_IOPERM
144 void (*invalidate_io_bitmap)(void);
144 void (*update_io_bitmap)(void);145 void (*update_io_bitmap)(void);
145#endif146#endif
146 147
arch/x86/include/uapi/asm/kvm.h+3−2
@@ -408,14 +408,15 @@ struct kvm_vmx_nested_state_data { · 407 unmodified lines
408};408};
409 409
410struct kvm_vmx_nested_state_hdr {410struct kvm_vmx_nested_state_hdr {
411 __u32 flags;
412 __u64 vmxon_pa;411 __u64 vmxon_pa;
413 __u64 vmcs12_pa;412 __u64 vmcs12_pa;
414 __u64 preemption_timer_deadline;
415 413
416 struct {414 struct {
417 __u16 flags;415 __u16 flags;
418 } smm;416 } smm;
417
418 __u32 flags;
419 __u64 preemption_timer_deadline;
419};420};
420 421
421struct kvm_svm_nested_state_data {422struct kvm_svm_nested_state_data {
arch/x86/kernel/apic/io_apic.c+5−5
@@ -2316,12 +2316,12 @@ static int mp_irqdomain_create(int ioapic) · 2315 unmodified lines
2316 ip->irqdomain = irq_domain_create_linear(fn, hwirqs, cfg->ops,2316 ip->irqdomain = irq_domain_create_linear(fn, hwirqs, cfg->ops,
2317 (void *)(long)ioapic);2317 (void *)(long)ioapic);
2318 2318
2319 /* Release fw handle if it was allocated above */2319 if (!ip->irqdomain) {
2320 if (!cfg->dev)2320 /* Release fw handle if it was allocated above */
2321 irq_domain_free_fwnode(fn);2321 if (!cfg->dev)
2322 2322 irq_domain_free_fwnode(fn);
2323 if (!ip->irqdomain)
2324 return -ENOMEM;2323 return -ENOMEM;
2324 }
2325 2325
2326 ip->irqdomain->parent = parent;2326 ip->irqdomain->parent = parent;
2327 2327
arch/x86/kernel/apic/msi.c+12−6
@@ -263,12 +263,13 @@ void __init arch_init_msi_domain(struct irq_domain *parent) · 262 unmodified lines
263 msi_default_domain =263 msi_default_domain =
264 pci_msi_create_irq_domain(fn, &pci_msi_domain_info,264 pci_msi_create_irq_domain(fn, &pci_msi_domain_info,
265 parent);265 parent);
266 irq_domain_free_fwnode(fn);
267 }266 }
268 if (!msi_default_domain)267 if (!msi_default_domain) {
268 irq_domain_free_fwnode(fn);
269 pr_warn("failed to initialize irqdomain for MSI/MSI-x.\n");269 pr_warn("failed to initialize irqdomain for MSI/MSI-x.\n");
270 else270 } else {
271 msi_default_domain->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK;271 msi_default_domain->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK;
272 }
272}273}
273 274
274#ifdef CONFIG_IRQ_REMAP275#ifdef CONFIG_IRQ_REMAP
@@ -301,7 +302,8 @@ struct irq_domain *arch_create_remap_msi_irq_domain(struct irq_domain *parent, · 26 unmodified lines
301 if (!fn)302 if (!fn)
302 return NULL;303 return NULL;
303 d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent);304 d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent);
304 irq_domain_free_fwnode(fn);305 if (!d)
306 irq_domain_free_fwnode(fn);
305 return d;307 return d;
306}308}
307#endif309#endif
@@ -364,7 +366,8 @@ static struct irq_domain *dmar_get_irq_domain(void) · 56 unmodified lines
364 if (fn) {366 if (fn) {
365 dmar_domain = msi_create_irq_domain(fn, &dmar_msi_domain_info,367 dmar_domain = msi_create_irq_domain(fn, &dmar_msi_domain_info,
366 x86_vector_domain);368 x86_vector_domain);
367 irq_domain_free_fwnode(fn);369 if (!dmar_domain)
370 irq_domain_free_fwnode(fn);
368 }371 }
369out:372out:
370 mutex_unlock(&dmar_lock);373 mutex_unlock(&dmar_lock);
@@ -489,7 +492,10 @@ struct irq_domain *hpet_create_irq_domain(int hpet_id) · 118 unmodified lines
489 }492 }
490 493
491 d = msi_create_irq_domain(fn, domain_info, parent);494 d = msi_create_irq_domain(fn, domain_info, parent);
492 irq_domain_free_fwnode(fn);495 if (!d) {
496 irq_domain_free_fwnode(fn);
497 kfree(domain_info);
498 }
493 return d;499 return d;
494}500}
495 501
arch/x86/kernel/apic/vector.c+5−18
@@ -446,12 +446,10 @@ static int x86_vector_activate(struct irq_domain *dom, struct irq_data *irqd, · 445 unmodified lines
446 trace_vector_activate(irqd->irq, apicd->is_managed,446 trace_vector_activate(irqd->irq, apicd->is_managed,
447 apicd->can_reserve, reserve);447 apicd->can_reserve, reserve);
448 448
449 /* Nothing to do for fixed assigned vectors */
450 if (!apicd->can_reserve && !apicd->is_managed)
451 return 0;
452
453 raw_spin_lock_irqsave(&vector_lock, flags);449 raw_spin_lock_irqsave(&vector_lock, flags);
454 if (reserve || irqd_is_managed_and_shutdown(irqd))450 if (!apicd->can_reserve && !apicd->is_managed)
451 assign_irq_vector_any_locked(irqd);
452 else if (reserve || irqd_is_managed_and_shutdown(irqd))
455 vector_assign_managed_shutdown(irqd);453 vector_assign_managed_shutdown(irqd);
456 else if (apicd->is_managed)454 else if (apicd->is_managed)
457 ret = activate_managed(irqd);455 ret = activate_managed(irqd);
@@ -709,7 +707,6 @@ int __init arch_early_irq_init(void) · 251 unmodified lines
709 x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops,707 x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops,
710 NULL);708 NULL);
711 BUG_ON(x86_vector_domain == NULL);709 BUG_ON(x86_vector_domain == NULL);
712 irq_domain_free_fwnode(fn);
713 irq_set_default_host(x86_vector_domain);710 irq_set_default_host(x86_vector_domain);
714 711
715 arch_init_msi_domain(x86_vector_domain);712 arch_init_msi_domain(x86_vector_domain);
@@ -775,20 +772,10 @@ void lapic_offline(void) · 59 unmodified lines
775static int apic_set_affinity(struct irq_data *irqd,772static int apic_set_affinity(struct irq_data *irqd,
776 const struct cpumask *dest, bool force)773 const struct cpumask *dest, bool force)
777{774{
778 struct apic_chip_data *apicd = apic_chip_data(irqd);
779 int err;775 int err;
780 776
781 /*777 if (WARN_ON_ONCE(!irqd_is_activated(irqd)))
782 * Core code can call here for inactive interrupts. For inactive778 return -EIO;
783 * interrupts which use managed or reservation mode there is no
784 * point in going through the vector assignment right now as the
785 * activation will assign a vector which fits the destination
786 * cpumask. Let the core code store the destination mask and be
787 * done with it.
788 */
789 if (!irqd_is_activated(irqd) &&
790 (apicd->is_managed || apicd->can_reserve))
791 return IRQ_SET_MASK_OK;
792 779
793 raw_spin_lock(&vector_lock);780 raw_spin_lock(&vector_lock);
794 cpumask_and(vector_searchmask, dest, cpu_online_mask);781 cpumask_and(vector_searchmask, dest, cpu_online_mask);
arch/x86/kernel/dumpstack.c+17−10
@@ -71,6 +71,22 @@ static void printk_stack_address(unsigned long address, int reliable, · 70 unmodified lines
71 printk("%s %s%pB\n", log_lvl, reliable ? "" : "? ", (void *)address);71 printk("%s %s%pB\n", log_lvl, reliable ? "" : "? ", (void *)address);
72}72}
73 73
74static int copy_code(struct pt_regs *regs, u8 *buf, unsigned long src,
75 unsigned int nbytes)
76{
77 if (!user_mode(regs))
78 return copy_from_kernel_nofault(buf, (u8 *)src, nbytes);
79
80 /*
81 * Make sure userspace isn't trying to trick us into dumping kernel
82 * memory by pointing the userspace instruction pointer at it.
83 */
84 if (__chk_range_not_ok(src, nbytes, TASK_SIZE_MAX))
85 return -EINVAL;
86
87 return copy_from_user_nmi(buf, (void __user *)src, nbytes);
88}
89
74/*90/*
75 * There are a couple of reasons for the 2/3rd prologue, courtesy of Linus:91 * There are a couple of reasons for the 2/3rd prologue, courtesy of Linus:
76 *92 *
@@ -97,17 +113,8 @@ void show_opcodes(struct pt_regs *regs, const char *loglvl) · 20 unmodified lines
97#define OPCODE_BUFSIZE (PROLOGUE_SIZE + 1 + EPILOGUE_SIZE)113#define OPCODE_BUFSIZE (PROLOGUE_SIZE + 1 + EPILOGUE_SIZE)
98 u8 opcodes[OPCODE_BUFSIZE];114 u8 opcodes[OPCODE_BUFSIZE];
99 unsigned long prologue = regs->ip - PROLOGUE_SIZE;115 unsigned long prologue = regs->ip - PROLOGUE_SIZE;
100 bool bad_ip;
101
102 /*
103 * Make sure userspace isn't trying to trick us into dumping kernel
104 * memory by pointing the userspace instruction pointer at it.
105 */
106 bad_ip = user_mode(regs) &&
107 __chk_range_not_ok(prologue, OPCODE_BUFSIZE, TASK_SIZE_MAX);
108 116
109 if (bad_ip || copy_from_kernel_nofault(opcodes, (u8 *)prologue,117 if (copy_code(regs, opcodes, prologue, sizeof(opcodes))) {
110 OPCODE_BUFSIZE)) {
111 printk("%sCode: Bad RIP value.\n", loglvl);118 printk("%sCode: Bad RIP value.\n", loglvl);
112 } else {119 } else {
113 printk("%sCode: %" __stringify(PROLOGUE_SIZE) "ph <%02x> %"120 printk("%sCode: %" __stringify(PROLOGUE_SIZE) "ph <%02x> %"
arch/x86/kernel/fpu/xstate.c+1−1
@@ -1074,7 +1074,7 @@ int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int of · 1073 unmodified lines
1074 copy_part(offsetof(struct fxregs_state, st_space), 128,1074 copy_part(offsetof(struct fxregs_state, st_space), 128,
1075 &xsave->i387.st_space, &kbuf, &offset_start, &count);1075 &xsave->i387.st_space, &kbuf, &offset_start, &count);
1076 if (header.xfeatures & XFEATURE_MASK_SSE)1076 if (header.xfeatures & XFEATURE_MASK_SSE)
1077 copy_part(xstate_offsets[XFEATURE_MASK_SSE], 256,1077 copy_part(xstate_offsets[XFEATURE_SSE], 256,
1078 &xsave->i387.xmm_space, &kbuf, &offset_start, &count);1078 &xsave->i387.xmm_space, &kbuf, &offset_start, &count);
1079 /*1079 /*
1080 * Fill xsave->i387.sw_reserved value for ptrace frame:1080 * Fill xsave->i387.sw_reserved value for ptrace frame:
arch/x86/kernel/i8259.c+1−1
@@ -207,7 +207,7 @@ spurious_8259A_irq: · 206 unmodified lines
207 * lets ACK and report it. [once per IRQ]207 * lets ACK and report it. [once per IRQ]
208 */208 */
209 if (!(spurious_irq_mask & irqmask)) {209 if (!(spurious_irq_mask & irqmask)) {
210 printk(KERN_DEBUG210 printk_deferred(KERN_DEBUG
211 "spurious 8259A interrupt: IRQ%d.\n", irq);211 "spurious 8259A interrupt: IRQ%d.\n", irq);
212 spurious_irq_mask |= irqmask;212 spurious_irq_mask |= irqmask;
213 }213 }
arch/x86/kernel/paravirt.c+2−1
@@ -324,7 +324,8 @@ struct paravirt_patch_template pv_ops = { · 323 unmodified lines
324 .cpu.swapgs = native_swapgs,324 .cpu.swapgs = native_swapgs,
325 325
326#ifdef CONFIG_X86_IOPL_IOPERM326#ifdef CONFIG_X86_IOPL_IOPERM
327 .cpu.update_io_bitmap = native_tss_update_io_bitmap,327 .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap,
328 .cpu.update_io_bitmap = native_tss_update_io_bitmap,
328#endif329#endif
329 330
330 .cpu.start_context_switch = paravirt_nop,331 .cpu.start_context_switch = paravirt_nop,
arch/x86/kernel/process.c+2−16
@@ -322,20 +322,6 @@ void arch_setup_new_exec(void) · 321 unmodified lines
322}322}
323 323
324#ifdef CONFIG_X86_IOPL_IOPERM324#ifdef CONFIG_X86_IOPL_IOPERM
325static inline void tss_invalidate_io_bitmap(struct tss_struct *tss)
326{
327 /*
328 * Invalidate the I/O bitmap by moving io_bitmap_base outside the
329 * TSS limit so any subsequent I/O access from user space will
330 * trigger a #GP.
331 *
332 * This is correct even when VMEXIT rewrites the TSS limit
333 * to 0x67 as the only requirement is that the base points
334 * outside the limit.
335 */
336 tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET_INVALID;
337}
338
339static inline void switch_to_bitmap(unsigned long tifp)325static inline void switch_to_bitmap(unsigned long tifp)
340{326{
341 /*327 /*
@@ -346,7 +332,7 @@ static inline void switch_to_bitmap(unsigned long tifp) · 4 unmodified lines
346 * user mode.332 * user mode.
347 */333 */
348 if (tifp & _TIF_IO_BITMAP)334 if (tifp & _TIF_IO_BITMAP)
349 tss_invalidate_io_bitmap(this_cpu_ptr(&cpu_tss_rw));335 tss_invalidate_io_bitmap();
350}336}
351 337
352static void tss_copy_io_bitmap(struct tss_struct *tss, struct io_bitmap *iobm)338static void tss_copy_io_bitmap(struct tss_struct *tss, struct io_bitmap *iobm)
@@ -380,7 +366,7 @@ void native_tss_update_io_bitmap(void) · 27 unmodified lines
380 u16 *base = &tss->x86_tss.io_bitmap_base;366 u16 *base = &tss->x86_tss.io_bitmap_base;
381 367
382 if (!test_thread_flag(TIF_IO_BITMAP)) {368 if (!test_thread_flag(TIF_IO_BITMAP)) {
383 tss_invalidate_io_bitmap(tss);369 native_tss_invalidate_io_bitmap();
384 return;370 return;
385 }371 }
386 372
arch/x86/kernel/stacktrace.c+0−5
@@ -58,7 +58,6 @@ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry, · 57 unmodified lines
58 * or a page fault), which can make frame pointers58 * or a page fault), which can make frame pointers
59 * unreliable.59 * unreliable.
60 */60 */
61
62 if (IS_ENABLED(CONFIG_FRAME_POINTER))61 if (IS_ENABLED(CONFIG_FRAME_POINTER))
63 return -EINVAL;62 return -EINVAL;
64 }63 }
@@ -81,10 +80,6 @@ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry, · 16 unmodified lines
81 if (unwind_error(&state))80 if (unwind_error(&state))
82 return -EINVAL;81 return -EINVAL;
83 82
84 /* Success path for non-user tasks, i.e. kthreads and idle tasks */
85 if (!(task->flags & (PF_KTHREAD | PF_IDLE)))
86 return -EINVAL;
87
88 return 0;83 return 0;
89}84}
90 85
arch/x86/kernel/traps.c+2−0
@@ -303,6 +303,8 @@ DEFINE_IDTENTRY_ERRORCODE(exc_alignment_check) · 302 unmodified lines
303 303
304 do_trap(X86_TRAP_AC, SIGBUS, "alignment check", regs,304 do_trap(X86_TRAP_AC, SIGBUS, "alignment check", regs,
305 error_code, BUS_ADRALN, NULL);305 error_code, BUS_ADRALN, NULL);
306
307 local_irq_disable();
306}308}
307 309
308#ifdef CONFIG_VMAP_STACK310#ifdef CONFIG_VMAP_STACK
arch/x86/kernel/unwind_orc.c+6−2
@@ -440,8 +440,11 @@ bool unwind_next_frame(struct unwind_state *state) · 439 unmodified lines
440 /*440 /*
441 * Find the orc_entry associated with the text address.441 * Find the orc_entry associated with the text address.
442 *442 *
443 * Decrement call return addresses by one so they work for sibling443 * For a call frame (as opposed to a signal frame), state->ip points to
444 * calls and calls to noreturn functions.444 * the instruction after the call. That instruction's stack layout
445 * could be different from the call instruction's layout, for example
446 * if the call was to a noreturn function. So get the ORC data for the
447 * call instruction itself.
445 */448 */
446 orc = orc_find(state->signal ? state->ip : state->ip - 1);449 orc = orc_find(state->signal ? state->ip : state->ip - 1);
447 if (!orc) {450 if (!orc) {
@@ -662,6 +665,7 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task, · 214 unmodified lines
662 state->sp = task->thread.sp;665 state->sp = task->thread.sp;
663 state->bp = READ_ONCE_NOCHECK(frame->bp);666 state->bp = READ_ONCE_NOCHECK(frame->bp);
664 state->ip = READ_ONCE_NOCHECK(frame->ret_addr);667 state->ip = READ_ONCE_NOCHECK(frame->ret_addr);
668 state->signal = (void *)state->ip == ret_from_fork;
665 }669 }
666 670
667 if (get_stack_info((unsigned long *)state->sp, state->task,671 if (get_stack_info((unsigned long *)state->sp, state->task,
arch/x86/kernel/vmlinux.lds.S+1−0
@@ -358,6 +358,7 @@ SECTIONS · 357 unmodified lines
358 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {358 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
359 __bss_start = .;359 __bss_start = .;
360 *(.bss..page_aligned)360 *(.bss..page_aligned)
361 . = ALIGN(PAGE_SIZE);
361 *(BSS_MAIN)362 *(BSS_MAIN)
362 BSS_DECRYPTED363 BSS_DECRYPTED
363 . = ALIGN(PAGE_SIZE);364 . = ALIGN(PAGE_SIZE);
arch/x86/kvm/lapic.c+1−1
@@ -2195,7 +2195,7 @@ void kvm_set_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu, u64 data) · 2194 unmodified lines
2195{2195{
2196 struct kvm_lapic *apic = vcpu->arch.apic;2196 struct kvm_lapic *apic = vcpu->arch.apic;
2197 2197
2198 if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) ||2198 if (!kvm_apic_present(vcpu) || apic_lvtt_oneshot(apic) ||
2199 apic_lvtt_period(apic))2199 apic_lvtt_period(apic))
2200 return;2200 return;
2201 2201
arch/x86/kvm/svm/svm.c+6−3
@@ -1090,7 +1090,7 @@ static void init_vmcb(struct vcpu_svm *svm) · 1089 unmodified lines
1090 svm->nested.vmcb = 0;1090 svm->nested.vmcb = 0;
1091 svm->vcpu.arch.hflags = 0;1091 svm->vcpu.arch.hflags = 0;
1092 1092
1093 if (pause_filter_count) {1093 if (!kvm_pause_in_guest(svm->vcpu.kvm)) {
1094 control->pause_filter_count = pause_filter_count;1094 control->pause_filter_count = pause_filter_count;
1095 if (pause_filter_thresh)1095 if (pause_filter_thresh)
1096 control->pause_filter_thresh = pause_filter_thresh;1096 control->pause_filter_thresh = pause_filter_thresh;
@@ -2693,7 +2693,7 @@ static int pause_interception(struct vcpu_svm *svm) · 1596 unmodified lines
2693 struct kvm_vcpu *vcpu = &svm->vcpu;2693 struct kvm_vcpu *vcpu = &svm->vcpu;
2694 bool in_kernel = (svm_get_cpl(vcpu) == 0);2694 bool in_kernel = (svm_get_cpl(vcpu) == 0);
2695 2695
2696 if (pause_filter_thresh)2696 if (!kvm_pause_in_guest(vcpu->kvm))
2697 grow_ple_window(vcpu);2697 grow_ple_window(vcpu);
2698 2698
2699 kvm_vcpu_on_spin(vcpu, in_kernel);2699 kvm_vcpu_on_spin(vcpu, in_kernel);
@@ -3780,7 +3780,7 @@ static void svm_handle_exit_irqoff(struct kvm_vcpu *vcpu) · 1080 unmodified lines
3780 3780
3781static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)3781static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)
3782{3782{
3783 if (pause_filter_thresh)3783 if (!kvm_pause_in_guest(vcpu->kvm))
3784 shrink_ple_window(vcpu);3784 shrink_ple_window(vcpu);
3785}3785}
3786 3786
@@ -3958,6 +3958,9 @@ static void svm_vm_destroy(struct kvm *kvm) · 171 unmodified lines
3958 3958
3959static int svm_vm_init(struct kvm *kvm)3959static int svm_vm_init(struct kvm *kvm)
3960{3960{
3961 if (!pause_filter_count || !pause_filter_thresh)
3962 kvm->arch.pause_in_guest = true;
3963
3961 if (avic) {3964 if (avic) {
3962 int ret = avic_vm_init(kvm);3965 int ret = avic_vm_init(kvm);
3963 if (ret)3966 if (ret)
arch/x86/kvm/vmx/nested.c+14−3
@@ -6079,6 +6079,9 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 6078 unmodified lines
6079 ~(KVM_STATE_NESTED_SMM_GUEST_MODE | KVM_STATE_NESTED_SMM_VMXON))6079 ~(KVM_STATE_NESTED_SMM_GUEST_MODE | KVM_STATE_NESTED_SMM_VMXON))
6080 return -EINVAL;6080 return -EINVAL;
6081 6081
6082 if (kvm_state->hdr.vmx.flags & ~KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE)
6083 return -EINVAL;
6084
6082 /*6085 /*
6083 * SMM temporarily disables VMX, so we cannot be in guest mode,6086 * SMM temporarily disables VMX, so we cannot be in guest mode,
6084 * nor can VMLAUNCH/VMRESUME be pending. Outside SMM, SMM flags6087 * nor can VMLAUNCH/VMRESUME be pending. Outside SMM, SMM flags
@@ -6108,9 +6111,16 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 23 unmodified lines
6108 if (ret)6111 if (ret)
6109 return ret;6112 return ret;
6110 6113
6111 /* Empty 'VMXON' state is permitted */6114 /* Empty 'VMXON' state is permitted if no VMCS loaded */
6112 if (kvm_state->size < sizeof(*kvm_state) + sizeof(*vmcs12))6115 if (kvm_state->size < sizeof(*kvm_state) + sizeof(*vmcs12)) {
6113 return 0;6116 /* See vmx_has_valid_vmcs12. */
6117 if ((kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE) ||
6118 (kvm_state->flags & KVM_STATE_NESTED_EVMCS) ||
6119 (kvm_state->hdr.vmx.vmcs12_pa != -1ull))
6120 return -EINVAL;
6121 else
6122 return 0;
6123 }
6114 6124
6115 if (kvm_state->hdr.vmx.vmcs12_pa != -1ull) {6125 if (kvm_state->hdr.vmx.vmcs12_pa != -1ull) {
6116 if (kvm_state->hdr.vmx.vmcs12_pa == kvm_state->hdr.vmx.vmxon_pa ||6126 if (kvm_state->hdr.vmx.vmcs12_pa == kvm_state->hdr.vmx.vmxon_pa ||
@@ -6176,6 +6186,7 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 59 unmodified lines
6176 goto error_guest_mode;6186 goto error_guest_mode;
6177 }6187 }
6178 6188
6189 vmx->nested.has_preemption_timer_deadline = false;
6179 if (kvm_state->hdr.vmx.flags & KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE) {6190 if (kvm_state->hdr.vmx.flags & KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE) {
6180 vmx->nested.has_preemption_timer_deadline = true;6191 vmx->nested.has_preemption_timer_deadline = true;
6181 vmx->nested.preemption_timer_deadline =6192 vmx->nested.preemption_timer_deadline =
arch/x86/kvm/vmx/nested.h+5−0
@@ -47,6 +47,11 @@ static inline struct vmcs12 *get_shadow_vmcs12(struct kvm_vcpu *vcpu) · 46 unmodified lines
47 return to_vmx(vcpu)->nested.cached_shadow_vmcs12;47 return to_vmx(vcpu)->nested.cached_shadow_vmcs12;
48}48}
49 49
50/*
51 * Note: the same condition is checked against the state provided by userspace
52 * in vmx_set_nested_state; if it is satisfied, the nested state must include
53 * the VMCS12.
54 */
50static inline int vmx_has_valid_vmcs12(struct kvm_vcpu *vcpu)55static inline int vmx_has_valid_vmcs12(struct kvm_vcpu *vcpu)
51{56{
52 struct vcpu_vmx *vmx = to_vmx(vcpu);57 struct vcpu_vmx *vmx = to_vmx(vcpu);
arch/x86/math-emu/wm_sqrt.S+1−1
@@ -209,7 +209,7 @@ sqrt_stage_2_finish: · 208 unmodified lines
209 209
210#ifdef PARANOID210#ifdef PARANOID
211/* It should be possible to get here only if the arg is ffff....ffff */211/* It should be possible to get here only if the arg is ffff....ffff */
212 cmp $0xffffffff,FPU_fsqrt_arg_1212 cmpl $0xffffffff,FPU_fsqrt_arg_1
213 jnz sqrt_stage_2_error213 jnz sqrt_stage_2_error
214#endif /* PARANOID */214#endif /* PARANOID */
215 215
arch/x86/platform/uv/uv_irq.c+2−1
@@ -167,9 +167,10 @@ static struct irq_domain *uv_get_irq_domain(void) · 166 unmodified lines
167 goto out;167 goto out;
168 168
169 uv_domain = irq_domain_create_tree(fn, &uv_domain_ops, NULL);169 uv_domain = irq_domain_create_tree(fn, &uv_domain_ops, NULL);
170 irq_domain_free_fwnode(fn);
171 if (uv_domain)170 if (uv_domain)
172 uv_domain->parent = x86_vector_domain;171 uv_domain->parent = x86_vector_domain;
172 else
173 irq_domain_free_fwnode(fn);
173out:174out:
174 mutex_unlock(&uv_lock);175 mutex_unlock(&uv_lock);
175 176
arch/x86/xen/enlighten_pv.c+12−0
@@ -870,6 +870,17 @@ static void xen_load_sp0(unsigned long sp0) · 869 unmodified lines
870}870}
871 871
872#ifdef CONFIG_X86_IOPL_IOPERM872#ifdef CONFIG_X86_IOPL_IOPERM
873static void xen_invalidate_io_bitmap(void)
874{
875 struct physdev_set_iobitmap iobitmap = {
876 .bitmap = 0,
877 .nr_ports = 0,
878 };
879
880 native_tss_invalidate_io_bitmap();
881 HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap);
882}
883
873static void xen_update_io_bitmap(void)884static void xen_update_io_bitmap(void)
874{885{
875 struct physdev_set_iobitmap iobitmap;886 struct physdev_set_iobitmap iobitmap;
@@ -1099,6 +1110,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = { · 223 unmodified lines
1099 .load_sp0 = xen_load_sp0,1110 .load_sp0 = xen_load_sp0,
1100 1111
1101#ifdef CONFIG_X86_IOPL_IOPERM1112#ifdef CONFIG_X86_IOPL_IOPERM
1113 .invalidate_io_bitmap = xen_invalidate_io_bitmap,
1102 .update_io_bitmap = xen_update_io_bitmap,1114 .update_io_bitmap = xen_update_io_bitmap,
1103#endif1115#endif
1104 .io_delay = xen_io_delay,1116 .io_delay = xen_io_delay,
arch/xtensa/include/asm/checksum.h+1−1
@@ -57,7 +57,7 @@ static inline · 56 unmodified lines
57__wsum csum_and_copy_from_user(const void __user *src, void *dst,57__wsum csum_and_copy_from_user(const void __user *src, void *dst,
58 int len, __wsum sum, int *err_ptr)58 int len, __wsum sum, int *err_ptr)
59{59{
60 if (access_ok(dst, len))60 if (access_ok(src, len))
61 return csum_partial_copy_generic((__force const void *)src, dst,61 return csum_partial_copy_generic((__force const void *)src, dst,
62 len, sum, err_ptr, NULL);62 len, sum, err_ptr, NULL);
63 if (len)63 if (len)
arch/xtensa/kernel/perf_event.c+1−3
@@ -362,9 +362,7 @@ irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id) · 361 unmodified lines
362 struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events);362 struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events);
363 unsigned i;363 unsigned i;
364 364
365 for (i = find_first_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS);365 for_each_set_bit(i, ev->used_mask, XCHAL_NUM_PERF_COUNTERS) {
366 i < XCHAL_NUM_PERF_COUNTERS;
367 i = find_next_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS, i + 1)) {
368 uint32_t v = get_er(XTENSA_PMU_PMSTAT(i));366 uint32_t v = get_er(XTENSA_PMU_PMSTAT(i));
369 struct perf_event *event = ev->event[i];367 struct perf_event *event = ev->event[i];
370 struct hw_perf_event *hwc = &event->hw;368 struct hw_perf_event *hwc = &event->hw;
arch/xtensa/kernel/setup.c+2−1
@@ -724,7 +724,8 @@ c_start(struct seq_file *f, loff_t *pos) · 723 unmodified lines
724static void *724static void *
725c_next(struct seq_file *f, void *v, loff_t *pos)725c_next(struct seq_file *f, void *v, loff_t *pos)
726{726{
727 return NULL;727 ++*pos;
728 return c_start(f, pos);
728}729}
729 730
730static void731static void
arch/xtensa/kernel/xtensa_ksyms.c+2−2
@@ -87,13 +87,13 @@ void __xtensa_libgcc_window_spill(void) · 86 unmodified lines
87}87}
88EXPORT_SYMBOL(__xtensa_libgcc_window_spill);88EXPORT_SYMBOL(__xtensa_libgcc_window_spill);
89 89
90unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v)90unsigned int __sync_fetch_and_and_4(volatile void *p, unsigned int v)
91{91{
92 BUG();92 BUG();
93}93}
94EXPORT_SYMBOL(__sync_fetch_and_and_4);94EXPORT_SYMBOL(__sync_fetch_and_and_4);
95 95
96unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v)96unsigned int __sync_fetch_and_or_4(volatile void *p, unsigned int v)
97{97{
98 BUG();98 BUG();
99}99}
block/blk-mq.c+2−2
@@ -828,10 +828,10 @@ static bool blk_mq_rq_inflight(struct blk_mq_hw_ctx *hctx, struct request *rq, · 827 unmodified lines
828 void *priv, bool reserved)828 void *priv, bool reserved)
829{829{
830 /*830 /*
831 * If we find a request that is inflight and the queue matches,831 * If we find a request that isn't idle and the queue matches,
832 * we know the queue is busy. Return false to stop the iteration.832 * we know the queue is busy. Return false to stop the iteration.
833 */833 */
834 if (rq->state == MQ_RQ_IN_FLIGHT && rq->q == hctx->queue) {834 if (blk_mq_request_started(rq) && rq->q == hctx->queue) {
835 bool *busy = priv;835 bool *busy = priv;
836 836
837 *busy = true;837 *busy = true;
crypto/asymmetric_keys/public_key.c+1−0
@@ -119,6 +119,7 @@ static int software_key_query(const struct kernel_pkey_params *params, · 118 unmodified lines
119 if (IS_ERR(tfm))119 if (IS_ERR(tfm))
120 return PTR_ERR(tfm);120 return PTR_ERR(tfm);
121 121
122 ret = -ENOMEM;
122 key = kmalloc(pkey->keylen + sizeof(u32) * 2 + pkey->paramlen,123 key = kmalloc(pkey->keylen + sizeof(u32) * 2 + pkey->paramlen,
123 GFP_KERNEL);124 GFP_KERNEL);
124 if (!key)125 if (!key)
drivers/android/binder_alloc.c+1−1
@@ -947,7 +947,7 @@ enum lru_status binder_alloc_free_page(struct list_head *item, · 946 unmodified lines
947 trace_binder_unmap_user_end(alloc, index);947 trace_binder_unmap_user_end(alloc, index);
948 }948 }
949 mmap_read_unlock(mm);949 mmap_read_unlock(mm);
950 mmput(mm);950 mmput_async(mm);
951 951
952 trace_binder_unmap_kernel_start(alloc, index);952 trace_binder_unmap_kernel_start(alloc, index);
953 953
drivers/atm/atmtcp.c+8−2
@@ -433,9 +433,15 @@ static int atmtcp_remove_persistent(int itf) · 432 unmodified lines
433 return -EMEDIUMTYPE;433 return -EMEDIUMTYPE;
434 }434 }
435 dev_data = PRIV(dev);435 dev_data = PRIV(dev);
436 if (!dev_data->persist) return 0;436 if (!dev_data->persist) {
437 atm_dev_put(dev);
438 return 0;
439 }
437 dev_data->persist = 0;440 dev_data->persist = 0;
438 if (PRIV(dev)->vcc) return 0;441 if (PRIV(dev)->vcc) {
442 atm_dev_put(dev);
443 return 0;
444 }
439 kfree(dev_data);445 kfree(dev_data);
440 atm_dev_put(dev);446 atm_dev_put(dev);
441 atm_dev_deregister(dev);447 atm_dev_deregister(dev);
drivers/base/base.h+0−1
@@ -153,7 +153,6 @@ extern char *make_class_name(const char *name, struct kobject *kobj); · 152 unmodified lines
153extern int devres_release_all(struct device *dev);153extern int devres_release_all(struct device *dev);
154extern void device_block_probing(void);154extern void device_block_probing(void);
155extern void device_unblock_probing(void);155extern void device_unblock_probing(void);
156extern void driver_deferred_probe_force_trigger(void);
157 156
158/* /sys/devices directory */157/* /sys/devices directory */
159extern struct kset *devices_kset;158extern struct kset *devices_kset;
drivers/base/core.c+32−12
@@ -50,6 +50,7 @@ static DEFINE_MUTEX(wfs_lock); · 49 unmodified lines
50static LIST_HEAD(deferred_sync);50static LIST_HEAD(deferred_sync);
51static unsigned int defer_sync_state_count = 1;51static unsigned int defer_sync_state_count = 1;
52static unsigned int defer_fw_devlink_count;52static unsigned int defer_fw_devlink_count;
53static LIST_HEAD(deferred_fw_devlink);
53static DEFINE_MUTEX(defer_fw_devlink_lock);54static DEFINE_MUTEX(defer_fw_devlink_lock);
54static bool fw_devlink_is_permissive(void);55static bool fw_devlink_is_permissive(void);
55 56
@@ -754,11 +755,11 @@ static void __device_links_queue_sync_state(struct device *dev, · 698 unmodified lines
754 */755 */
755 dev->state_synced = true;756 dev->state_synced = true;
756 757
757 if (WARN_ON(!list_empty(&dev->links.defer_sync)))758 if (WARN_ON(!list_empty(&dev->links.defer_hook)))
758 return;759 return;
759 760
760 get_device(dev);761 get_device(dev);
761 list_add_tail(&dev->links.defer_sync, list);762 list_add_tail(&dev->links.defer_hook, list);
762}763}
763 764
764/**765/**
@@ -776,8 +777,8 @@ static void device_links_flush_sync_list(struct list_head *list, · 11 unmodified lines
776{777{
777 struct device *dev, *tmp;778 struct device *dev, *tmp;
778 779
779 list_for_each_entry_safe(dev, tmp, list, links.defer_sync) {780 list_for_each_entry_safe(dev, tmp, list, links.defer_hook) {
780 list_del_init(&dev->links.defer_sync);781 list_del_init(&dev->links.defer_hook);
781 782
782 if (dev != dont_lock_dev)783 if (dev != dont_lock_dev)
783 device_lock(dev);784 device_lock(dev);
@@ -815,12 +816,12 @@ void device_links_supplier_sync_state_resume(void) · 31 unmodified lines
815 if (defer_sync_state_count)816 if (defer_sync_state_count)
816 goto out;817 goto out;
817 818
818 list_for_each_entry_safe(dev, tmp, &deferred_sync, links.defer_sync) {819 list_for_each_entry_safe(dev, tmp, &deferred_sync, links.defer_hook) {
819 /*820 /*
820 * Delete from deferred_sync list before queuing it to821 * Delete from deferred_sync list before queuing it to
821 * sync_list because defer_sync is used for both lists.822 * sync_list because defer_hook is used for both lists.
822 */823 */
823 list_del_init(&dev->links.defer_sync);824 list_del_init(&dev->links.defer_hook);
824 __device_links_queue_sync_state(dev, &sync_list);825 __device_links_queue_sync_state(dev, &sync_list);
825 }826 }
826out:827out:
@@ -838,8 +839,8 @@ late_initcall(sync_state_resume_initcall); · 11 unmodified lines
838 839
839static void __device_links_supplier_defer_sync(struct device *sup)840static void __device_links_supplier_defer_sync(struct device *sup)
840{841{
841 if (list_empty(&sup->links.defer_sync) && dev_has_sync_state(sup))842 if (list_empty(&sup->links.defer_hook) && dev_has_sync_state(sup))
842 list_add_tail(&sup->links.defer_sync, &deferred_sync);843 list_add_tail(&sup->links.defer_hook, &deferred_sync);
843}844}
844 845
845static void device_link_drop_managed(struct device_link *link)846static void device_link_drop_managed(struct device_link *link)
@@ -1052,7 +1053,7 @@ void device_links_driver_cleanup(struct device *dev) · 206 unmodified lines
1052 WRITE_ONCE(link->status, DL_STATE_DORMANT);1053 WRITE_ONCE(link->status, DL_STATE_DORMANT);
1053 }1054 }
1054 1055
1055 list_del_init(&dev->links.defer_sync);1056 list_del_init(&dev->links.defer_hook);
1056 __device_links_no_driver(dev);1057 __device_links_no_driver(dev);
1057 1058
1058 device_links_write_unlock();1059 device_links_write_unlock();
@@ -1244,6 +1245,12 @@ static void fw_devlink_link_device(struct device *dev) · 185 unmodified lines
1244 fw_ret = -EAGAIN;1245 fw_ret = -EAGAIN;
1245 } else {1246 } else {
1246 fw_ret = -ENODEV;1247 fw_ret = -ENODEV;
1248 /*
1249 * defer_hook is not used to add device to deferred_sync list
1250 * until device is bound. Since deferred fw devlink also blocks
1251 * probing, same list hook can be used for deferred_fw_devlink.
1252 */
1253 list_add_tail(&dev->links.defer_hook, &deferred_fw_devlink);
1247 }1254 }
1248 1255
1249 if (fw_ret == -ENODEV)1256 if (fw_ret == -ENODEV)
@@ -1312,6 +1319,9 @@ void fw_devlink_pause(void) · 62 unmodified lines
1312 */1319 */
1313void fw_devlink_resume(void)1320void fw_devlink_resume(void)
1314{1321{
1322 struct device *dev, *tmp;
1323 LIST_HEAD(probe_list);
1324
1315 mutex_lock(&defer_fw_devlink_lock);1325 mutex_lock(&defer_fw_devlink_lock);
1316 if (!defer_fw_devlink_count) {1326 if (!defer_fw_devlink_count) {
1317 WARN(true, "Unmatched fw_devlink pause/resume!");1327 WARN(true, "Unmatched fw_devlink pause/resume!");
@@ -1323,9 +1333,19 @@ void fw_devlink_resume(void) · 5 unmodified lines
1323 goto out;1333 goto out;
1324 1334
1325 device_link_add_missing_supplier_links();1335 device_link_add_missing_supplier_links();
1326 driver_deferred_probe_force_trigger();1336 list_splice_tail_init(&deferred_fw_devlink, &probe_list);
1327out:1337out:
1328 mutex_unlock(&defer_fw_devlink_lock);1338 mutex_unlock(&defer_fw_devlink_lock);
1339
1340 /*
1341 * bus_probe_device() can cause new devices to get added and they'll
1342 * try to grab defer_fw_devlink_lock. So, this needs to be done outside
1343 * the defer_fw_devlink_lock.
1344 */
1345 list_for_each_entry_safe(dev, tmp, &probe_list, links.defer_hook) {
1346 list_del_init(&dev->links.defer_hook);
1347 bus_probe_device(dev);
1348 }
1329}1349}
1330/* Device links support end. */1350/* Device links support end. */
1331 1351
@@ -2172,7 +2192,7 @@ void device_initialize(struct device *dev) · 840 unmodified lines
2172 INIT_LIST_HEAD(&dev->links.consumers);2192 INIT_LIST_HEAD(&dev->links.consumers);
2173 INIT_LIST_HEAD(&dev->links.suppliers);2193 INIT_LIST_HEAD(&dev->links.suppliers);
2174 INIT_LIST_HEAD(&dev->links.needs_suppliers);2194 INIT_LIST_HEAD(&dev->links.needs_suppliers);
2175 INIT_LIST_HEAD(&dev->links.defer_sync);2195 INIT_LIST_HEAD(&dev->links.defer_hook);
2176 dev->links.status = DL_DEV_NO_DRIVER;2196 dev->links.status = DL_DEV_NO_DRIVER;
2177}2197}
2178EXPORT_SYMBOL_GPL(device_initialize);2198EXPORT_SYMBOL_GPL(device_initialize);
drivers/base/dd.c+0−5
@@ -164,11 +164,6 @@ static void driver_deferred_probe_trigger(void) · 163 unmodified lines
164 if (!driver_deferred_probe_enable)164 if (!driver_deferred_probe_enable)
165 return;165 return;
166 166
167 driver_deferred_probe_force_trigger();
168}
169
170void driver_deferred_probe_force_trigger(void)
171{
172 /*167 /*
173 * A successful probe means that all the devices in the pending list168 * A successful probe means that all the devices in the pending list
174 * should be triggered to be reprobed. Move all the deferred devices169 * should be triggered to be reprobed. Move all the deferred devices
drivers/base/property.c+1−1
@@ -721,7 +721,7 @@ struct fwnode_handle *device_get_next_child_node(struct device *dev, · 720 unmodified lines
721 return next;721 return next;
722 722
723 /* When no more children in primary, continue with secondary */723 /* When no more children in primary, continue with secondary */
724 if (!IS_ERR_OR_NULL(fwnode->secondary))724 if (fwnode && !IS_ERR_OR_NULL(fwnode->secondary))
725 next = fwnode_get_next_child_node(fwnode->secondary, child);725 next = fwnode_get_next_child_node(fwnode->secondary, child);
726 726
727 return next;727 return next;
drivers/base/regmap/Kconfig+1−1
@@ -4,7 +4,7 @@ · 3 unmodified lines
4# subsystems should select the appropriate symbols.4# subsystems should select the appropriate symbols.
5 5
6config REGMAP6config REGMAP
7 default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SCCB || REGMAP_I3C)7 default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SCCB || REGMAP_I3C)
8 select IRQ_DOMAIN if REGMAP_IRQ8 select IRQ_DOMAIN if REGMAP_IRQ
9 bool9 bool
10 10
drivers/base/regmap/regmap-debugfs.c+29−23
@@ -463,29 +463,31 @@ static ssize_t regmap_cache_only_write_file(struct file *file, · 462 unmodified lines
463{463{
464 struct regmap *map = container_of(file->private_data,464 struct regmap *map = container_of(file->private_data,
465 struct regmap, cache_only);465 struct regmap, cache_only);
466 ssize_t result;466 bool new_val, require_sync = false;
467 bool was_enabled, require_sync = false;
468 int err;467 int err;
469 468
470 map->lock(map->lock_arg);469 err = kstrtobool_from_user(user_buf, count, &new_val);
470 /* Ignore malforned data like debugfs_write_file_bool() */
471 if (err)
472 return count;
471 473
472 was_enabled = map->cache_only;474 err = debugfs_file_get(file->f_path.dentry);
475 if (err)
476 return err;
473 477
474 result = debugfs_write_file_bool(file, user_buf, count, ppos);478 map->lock(map->lock_arg);
475 if (result < 0) {
476 map->unlock(map->lock_arg);
477 return result;
478 }
479 479
480 if (map->cache_only && !was_enabled) {480 if (new_val && !map->cache_only) {
481 dev_warn(map->dev, "debugfs cache_only=Y forced\n");481 dev_warn(map->dev, "debugfs cache_only=Y forced\n");
482 add_taint(TAINT_USER, LOCKDEP_STILL_OK);482 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
483 } else if (!map->cache_only && was_enabled) {483 } else if (!new_val && map->cache_only) {
484 dev_warn(map->dev, "debugfs cache_only=N forced: syncing cache\n");484 dev_warn(map->dev, "debugfs cache_only=N forced: syncing cache\n");
485 require_sync = true;485 require_sync = true;
486 }486 }
487 map->cache_only = new_val;
487 488
488 map->unlock(map->lock_arg);489 map->unlock(map->lock_arg);
490 debugfs_file_put(file->f_path.dentry);
489 491
490 if (require_sync) {492 if (require_sync) {
491 err = regcache_sync(map);493 err = regcache_sync(map);
@@ -493,7 +495,7 @@ static ssize_t regmap_cache_only_write_file(struct file *file, · 1 unmodified line
493 dev_err(map->dev, "Failed to sync cache %d\n", err);495 dev_err(map->dev, "Failed to sync cache %d\n", err);
494 }496 }
495 497
496 return result;498 return count;
497}499}
498 500
499static const struct file_operations regmap_cache_only_fops = {501static const struct file_operations regmap_cache_only_fops = {
@@ -508,28 +510,32 @@ static ssize_t regmap_cache_bypass_write_file(struct file *file, · 8 unmodified lines
508{510{
509 struct regmap *map = container_of(file->private_data,511 struct regmap *map = container_of(file->private_data,
510 struct regmap, cache_bypass);512 struct regmap, cache_bypass);
511 ssize_t result;513 bool new_val;
512 bool was_enabled;514 int err;
513 515
514 map->lock(map->lock_arg);516 err = kstrtobool_from_user(user_buf, count, &new_val);
517 /* Ignore malforned data like debugfs_write_file_bool() */
518 if (err)
519 return count;
515 520
516 was_enabled = map->cache_bypass;521 err = debugfs_file_get(file->f_path.dentry);
522 if (err)
523 return err;
517 524
518 result = debugfs_write_file_bool(file, user_buf, count, ppos);525 map->lock(map->lock_arg);
519 if (result < 0)
520 goto out;
521 526
522 if (map->cache_bypass && !was_enabled) {527 if (new_val && !map->cache_bypass) {
523 dev_warn(map->dev, "debugfs cache_bypass=Y forced\n");528 dev_warn(map->dev, "debugfs cache_bypass=Y forced\n");
524 add_taint(TAINT_USER, LOCKDEP_STILL_OK);529 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
525 } else if (!map->cache_bypass && was_enabled) {530 } else if (!new_val && map->cache_bypass) {
526 dev_warn(map->dev, "debugfs cache_bypass=N forced\n");531 dev_warn(map->dev, "debugfs cache_bypass=N forced\n");
527 }532 }
533 map->cache_bypass = new_val;
528 534
529out:
530 map->unlock(map->lock_arg);535 map->unlock(map->lock_arg);
536 debugfs_file_put(file->f_path.dentry);
531 537
532 return result;538 return count;
533}539}
534 540
535static const struct file_operations regmap_cache_bypass_fops = {541static const struct file_operations regmap_cache_bypass_fops = {
drivers/base/regmap/regmap.c+1−1
@@ -1364,7 +1364,7 @@ static int dev_get_regmap_match(struct device *dev, void *res, void *data) · 1363 unmodified lines
1364 1364
1365 /* If the user didn't specify a name match any */1365 /* If the user didn't specify a name match any */
1366 if (data)1366 if (data)
1367 return (*r)->name == data;1367 return !strcmp((*r)->name, data);
1368 else1368 else
1369 return 1;1369 return 1;
1370}1370}
drivers/block/nbd.c+15−10
@@ -1033,25 +1033,26 @@ static int nbd_add_socket(struct nbd_device *nbd, unsigned long arg, · 1032 unmodified lines
1033 test_bit(NBD_RT_BOUND, &config->runtime_flags))) {1033 test_bit(NBD_RT_BOUND, &config->runtime_flags))) {
1034 dev_err(disk_to_dev(nbd->disk),1034 dev_err(disk_to_dev(nbd->disk),
1035 "Device being setup by another task");1035 "Device being setup by another task");
1036 sockfd_put(sock);1036 err = -EBUSY;
1037 return -EBUSY;1037 goto put_socket;
1038 }
1039
1040 nsock = kzalloc(sizeof(*nsock), GFP_KERNEL);
1041 if (!nsock) {
1042 err = -ENOMEM;
1043 goto put_socket;
1038 }1044 }
1039 1045
1040 socks = krealloc(config->socks, (config->num_connections + 1) *1046 socks = krealloc(config->socks, (config->num_connections + 1) *
1041 sizeof(struct nbd_sock *), GFP_KERNEL);1047 sizeof(struct nbd_sock *), GFP_KERNEL);
1042 if (!socks) {1048 if (!socks) {
1043 sockfd_put(sock);1049 kfree(nsock);
1044 return -ENOMEM;1050 err = -ENOMEM;
1051 goto put_socket;
1045 }1052 }
1046 1053
1047 config->socks = socks;1054 config->socks = socks;
1048 1055
1049 nsock = kzalloc(sizeof(struct nbd_sock), GFP_KERNEL);
1050 if (!nsock) {
1051 sockfd_put(sock);
1052 return -ENOMEM;
1053 }
1054
1055 nsock->fallback_index = -1;1056 nsock->fallback_index = -1;
1056 nsock->dead = false;1057 nsock->dead = false;
1057 mutex_init(&nsock->tx_lock);1058 mutex_init(&nsock->tx_lock);
@@ -1063,6 +1064,10 @@ static int nbd_add_socket(struct nbd_device *nbd, unsigned long arg, · 5 unmodified lines
1063 atomic_inc(&config->live_connections);1064 atomic_inc(&config->live_connections);
1064 1065
1065 return 0;1066 return 0;
1067
1068put_socket:
1069 sockfd_put(sock);
1070 return err;
1066}1071}
1067 1072
1068static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg)1073static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg)
drivers/block/zram/zram_drv.c+2−1
@@ -2021,7 +2021,8 @@ static ssize_t hot_add_show(struct class *class, · 2020 unmodified lines
2021 return ret;2021 return ret;
2022 return scnprintf(buf, PAGE_SIZE, "%d\n", ret);2022 return scnprintf(buf, PAGE_SIZE, "%d\n", ret);
2023}2023}
2024static CLASS_ATTR_RO(hot_add);2024static struct class_attribute class_attr_hot_add =
2025 __ATTR(hot_add, 0400, hot_add_show, NULL);
2025 2026
2026static ssize_t hot_remove_store(struct class *class,2027static ssize_t hot_remove_store(struct class *class,
2027 struct class_attribute *attr,2028 struct class_attribute *attr,
drivers/bus/ti-sysc.c+34−11
@@ -236,15 +236,14 @@ static int sysc_wait_softreset(struct sysc *ddata) · 235 unmodified lines
236 syss_done = ddata->cfg.syss_mask;236 syss_done = ddata->cfg.syss_mask;
237 237
238 if (syss_offset >= 0) {238 if (syss_offset >= 0) {
239 error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval,239 error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata,
240 (rstval & ddata->cfg.syss_mask) ==240 rstval, (rstval & ddata->cfg.syss_mask) ==
241 syss_done,241 syss_done, 100, MAX_MODULE_SOFTRESET_WAIT);
242 100, MAX_MODULE_SOFTRESET_WAIT);
243 242
244 } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {243 } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) {
245 error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval,244 error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata,
246 !(rstval & sysc_mask),245 rstval, !(rstval & sysc_mask),
247 100, MAX_MODULE_SOFTRESET_WAIT);246 100, MAX_MODULE_SOFTRESET_WAIT);
248 }247 }
249 248
250 return error;249 return error;
@@ -1279,7 +1278,8 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev) · 1028 unmodified lines
1279 1278
1280 ddata = dev_get_drvdata(dev);1279 ddata = dev_get_drvdata(dev);
1281 1280
1282 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)1281 if (ddata->cfg.quirks &
1282 (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
1283 return 0;1283 return 0;
1284 1284
1285 return pm_runtime_force_suspend(dev);1285 return pm_runtime_force_suspend(dev);
@@ -1291,7 +1291,8 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev) · 5 unmodified lines
1291 1291
1292 ddata = dev_get_drvdata(dev);1292 ddata = dev_get_drvdata(dev);
1293 1293
1294 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)1294 if (ddata->cfg.quirks &
1295 (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE))
1295 return 0;1296 return 0;
1296 1297
1297 return pm_runtime_force_resume(dev);1298 return pm_runtime_force_resume(dev);
@@ -1728,8 +1729,8 @@ static void sysc_quirk_rtc(struct sysc *ddata, bool lock) · 430 unmodified lines
1728 1729
1729 local_irq_save(flags);1730 local_irq_save(flags);
1730 /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */1731 /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */
1731 error = readl_poll_timeout(ddata->module_va + 0x44, val,1732 error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val,
1732 !(val & BIT(0)), 100, 50);1733 !(val & BIT(0)), 100, 50);
1733 if (error)1734 if (error)
1734 dev_warn(ddata->dev, "rtc busy timeout\n");1735 dev_warn(ddata->dev, "rtc busy timeout\n");
1735 /* Now we have ~15 microseconds to read/write various registers */1736 /* Now we have ~15 microseconds to read/write various registers */
@@ -2864,6 +2865,24 @@ static int sysc_check_disabled_devices(struct sysc *ddata) · 1128 unmodified lines
2864 return error;2865 return error;
2865}2866}
2866 2867
2868/*
2869 * Ignore timers tagged with no-reset and no-idle. These are likely in use,
2870 * for example by drivers/clocksource/timer-ti-dm-systimer.c. If more checks
2871 * are needed, we could also look at the timer register configuration.
2872 */
2873static int sysc_check_active_timer(struct sysc *ddata)
2874{
2875 if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
2876 ddata->cap->type != TI_SYSC_OMAP4_TIMER)
2877 return 0;
2878
2879 if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
2880 (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
2881 return -EBUSY;
2882
2883 return 0;
2884}
2885
2867static const struct of_device_id sysc_match_table[] = {2886static const struct of_device_id sysc_match_table[] = {
2868 { .compatible = "simple-bus", },2887 { .compatible = "simple-bus", },
2869 { /* sentinel */ },2888 { /* sentinel */ },
@@ -2920,6 +2939,10 @@ static int sysc_probe(struct platform_device *pdev) · 50 unmodified lines
2920 if (error)2939 if (error)
2921 return error;2940 return error;
2922 2941
2942 error = sysc_check_active_timer(ddata);
2943 if (error)
2944 return error;
2945
2923 error = sysc_get_clocks(ddata);2946 error = sysc_get_clocks(ddata);
2924 if (error)2947 if (error)
2925 return error;2948 return error;
drivers/char/mem.c+7−3
@@ -814,7 +814,8 @@ static struct inode *devmem_inode; · 813 unmodified lines
814#ifdef CONFIG_IO_STRICT_DEVMEM814#ifdef CONFIG_IO_STRICT_DEVMEM
815void revoke_devmem(struct resource *res)815void revoke_devmem(struct resource *res)
816{816{
817 struct inode *inode = READ_ONCE(devmem_inode);817 /* pairs with smp_store_release() in devmem_init_inode() */
818 struct inode *inode = smp_load_acquire(&devmem_inode);
818 819
819 /*820 /*
820 * Check that the initialization has completed. Losing the race821 * Check that the initialization has completed. Losing the race
@@ -1028,8 +1029,11 @@ static int devmem_init_inode(void) · 207 unmodified lines
1028 return rc;1029 return rc;
1029 }1030 }
1030 1031
1031 /* publish /dev/mem initialized */1032 /*
1032 WRITE_ONCE(devmem_inode, inode);1033 * Publish /dev/mem initialized.
1034 * Pairs with smp_load_acquire() in revoke_devmem().
1035 */
1036 smp_store_release(&devmem_inode, inode);
1033 1037
1034 return 0;1038 return 0;
1035}1039}
drivers/char/random.c+1−0
@@ -1277,6 +1277,7 @@ void add_interrupt_randomness(int irq, int irq_flags) · 1276 unmodified lines
1277 1277
1278 fast_mix(fast_pool);1278 fast_mix(fast_pool);
1279 add_interrupt_bench(cycles);1279 add_interrupt_bench(cycles);
1280 this_cpu_add(net_rand_state.s1, fast_pool->pool[cycles & 3]);
1280 1281
1281 if (unlikely(crng_init == 0)) {1282 if (unlikely(crng_init == 0)) {
1282 if ((fast_pool->count >= 64) &&1283 if ((fast_pool->count >= 64) &&
drivers/char/virtio_console.c+2−1
@@ -2116,6 +2116,7 @@ static struct virtio_device_id id_table[] = { · 2115 unmodified lines
2116 { VIRTIO_ID_CONSOLE, VIRTIO_DEV_ANY_ID },2116 { VIRTIO_ID_CONSOLE, VIRTIO_DEV_ANY_ID },
2117 { 0 },2117 { 0 },
2118};2118};
2119MODULE_DEVICE_TABLE(virtio, id_table);
2119 2120
2120static unsigned int features[] = {2121static unsigned int features[] = {
2121 VIRTIO_CONSOLE_F_SIZE,2122 VIRTIO_CONSOLE_F_SIZE,
@@ -2128,6 +2129,7 @@ static struct virtio_device_id rproc_serial_id_table[] = { · 6 unmodified lines
2128#endif2129#endif
2129 { 0 },2130 { 0 },
2130};2131};
2132MODULE_DEVICE_TABLE(virtio, rproc_serial_id_table);
2131 2133
2132static unsigned int rproc_serial_features[] = {2134static unsigned int rproc_serial_features[] = {
2133};2135};
@@ -2280,6 +2282,5 @@ static void __exit fini(void) · 146 unmodified lines
2280module_init(init);2282module_init(init);
2281module_exit(fini);2283module_exit(fini);
2282 2284
2283MODULE_DEVICE_TABLE(virtio, id_table);
2284MODULE_DESCRIPTION("Virtio console driver");2285MODULE_DESCRIPTION("Virtio console driver");
2285MODULE_LICENSE("GPL");2286MODULE_LICENSE("GPL");
drivers/clk/Kconfig+1−0
@@ -50,6 +50,7 @@ source "drivers/clk/versatile/Kconfig" · 49 unmodified lines
50config CLK_HSDK50config CLK_HSDK
51 bool "PLL Driver for HSDK platform"51 bool "PLL Driver for HSDK platform"
52 depends on OF || COMPILE_TEST52 depends on OF || COMPILE_TEST
53 depends on IOMEM
53 help54 help
54 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs55 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
55 control.56 control.
drivers/clk/clk-ast2600.c+41−8
@@ -131,6 +131,18 @@ static const struct clk_div_table ast2600_eclk_div_table[] = { · 130 unmodified lines
131 { 0 }131 { 0 }
132};132};
133 133
134static const struct clk_div_table ast2600_emmc_extclk_div_table[] = {
135 { 0x0, 2 },
136 { 0x1, 4 },
137 { 0x2, 6 },
138 { 0x3, 8 },
139 { 0x4, 10 },
140 { 0x5, 12 },
141 { 0x6, 14 },
142 { 0x7, 16 },
143 { 0 }
144};
145
134static const struct clk_div_table ast2600_mac_div_table[] = {146static const struct clk_div_table ast2600_mac_div_table[] = {
135 { 0x0, 4 },147 { 0x0, 4 },
136 { 0x1, 4 },148 { 0x1, 4 },
@@ -390,6 +402,11 @@ static struct clk_hw *aspeed_g6_clk_hw_register_gate(struct device *dev, · 253 unmodified lines
390 return hw;402 return hw;
391}403}
392 404
405static const char *const emmc_extclk_parent_names[] = {
406 "emmc_extclk_hpll_in",
407 "mpll",
408};
409
393static const char * const vclk_parent_names[] = {410static const char * const vclk_parent_names[] = {
394 "dpll",411 "dpll",
395 "d1pll",412 "d1pll",
@@ -459,16 +476,32 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev) · 63 unmodified lines
459 return PTR_ERR(hw);476 return PTR_ERR(hw);
460 aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw;477 aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw;
461 478
462 /* EMMC ext clock divider */479 /* EMMC ext clock */
463 hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "hpll", 0,480 hw = clk_hw_register_fixed_factor(dev, "emmc_extclk_hpll_in", "hpll",
464 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 15, 0,481 0, 1, 2);
465 &aspeed_g6_clk_lock);
466 if (IS_ERR(hw))482 if (IS_ERR(hw))
467 return PTR_ERR(hw);483 return PTR_ERR(hw);
468 hw = clk_hw_register_divider_table(dev, "emmc_extclk", "emmc_extclk_gate", 0,484
469 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 12, 3, 0,485 hw = clk_hw_register_mux(dev, "emmc_extclk_mux",
470 ast2600_div_table,486 emmc_extclk_parent_names,
471 &aspeed_g6_clk_lock);487 ARRAY_SIZE(emmc_extclk_parent_names), 0,
488 scu_g6_base + ASPEED_G6_CLK_SELECTION1, 11, 1,
489 0, &aspeed_g6_clk_lock);
490 if (IS_ERR(hw))
491 return PTR_ERR(hw);
492
493 hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "emmc_extclk_mux",
494 0, scu_g6_base + ASPEED_G6_CLK_SELECTION1,
495 15, 0, &aspeed_g6_clk_lock);
496 if (IS_ERR(hw))
497 return PTR_ERR(hw);
498
499 hw = clk_hw_register_divider_table(dev, "emmc_extclk",
500 "emmc_extclk_gate", 0,
501 scu_g6_base +
502 ASPEED_G6_CLK_SELECTION1, 12,
503 3, 0, ast2600_emmc_extclk_div_table,
504 &aspeed_g6_clk_lock);
472 if (IS_ERR(hw))505 if (IS_ERR(hw))
473 return PTR_ERR(hw);506 return PTR_ERR(hw);
474 aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw;507 aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw;
drivers/clk/mvebu/Kconfig+1−0
@@ -42,6 +42,7 @@ config ARMADA_AP806_SYSCON · 41 unmodified lines
42 42
43config ARMADA_AP_CPU_CLK43config ARMADA_AP_CPU_CLK
44 bool44 bool
45 select ARMADA_AP_CP_HELPER
45 46
46config ARMADA_CP110_SYSCON47config ARMADA_CP110_SYSCON
47 bool48 bool
drivers/clocksource/arm_arch_timer.c+11−0
@@ -480,6 +480,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = { · 479 unmodified lines
480 .set_next_event_virt = erratum_set_next_event_tval_virt,480 .set_next_event_virt = erratum_set_next_event_tval_virt,
481 },481 },
482#endif482#endif
483#ifdef CONFIG_ARM64_ERRATUM_1418040
484 {
485 .match_type = ate_match_local_cap_id,
486 .id = (void *)ARM64_WORKAROUND_1418040,
487 .desc = "ARM erratum 1418040",
488 .disable_compat_vdso = true,
489 },
490#endif
483};491};
484 492
485typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,493typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *,
@@ -566,6 +574,9 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa · 80 unmodified lines
566 if (wa->read_cntvct_el0) {574 if (wa->read_cntvct_el0) {
567 clocksource_counter.vdso_clock_mode = VDSO_CLOCKMODE_NONE;575 clocksource_counter.vdso_clock_mode = VDSO_CLOCKMODE_NONE;
568 vdso_default = VDSO_CLOCKMODE_NONE;576 vdso_default = VDSO_CLOCKMODE_NONE;
577 } else if (wa->disable_compat_vdso && vdso_default != VDSO_CLOCKMODE_NONE) {
578 vdso_default = VDSO_CLOCKMODE_ARCHTIMER_NOCOMPAT;
579 clocksource_counter.vdso_clock_mode = vdso_default;
569 }580 }
570}581}
571 582
drivers/clocksource/timer-ti-dm-systimer.c+36−10
@@ -19,7 +19,7 @@ · 18 unmodified lines
19/* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */19/* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
20#define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \20#define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \
21 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)21 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)
22 22#define DMTIMER_TYPE1_DISABLE (SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)
23#define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)23#define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)
24#define DMTIMER_RESET_WAIT 10000024#define DMTIMER_RESET_WAIT 100000
25 25
@@ -44,6 +44,8 @@ struct dmtimer_systimer { · 18 unmodified lines
44 u8 ctrl;44 u8 ctrl;
45 u8 wakeup;45 u8 wakeup;
46 u8 ifctrl;46 u8 ifctrl;
47 struct clk *fck;
48 struct clk *ick;
47 unsigned long rate;49 unsigned long rate;
48};50};
49 51
@@ -298,16 +300,20 @@ static void __init dmtimer_systimer_select_best(void) · 248 unmodified lines
298}300}
299 301
300/* Interface clocks are only available on some SoCs variants */302/* Interface clocks are only available on some SoCs variants */
301static int __init dmtimer_systimer_init_clock(struct device_node *np,303static int __init dmtimer_systimer_init_clock(struct dmtimer_systimer *t,
304 struct device_node *np,
302 const char *name,305 const char *name,
303 unsigned long *rate)306 unsigned long *rate)
304{307{
305 struct clk *clock;308 struct clk *clock;
306 unsigned long r;309 unsigned long r;
310 bool is_ick = false;
307 int error;311 int error;
308 312
313 is_ick = !strncmp(name, "ick", 3);
314
309 clock = of_clk_get_by_name(np, name);315 clock = of_clk_get_by_name(np, name);
310 if ((PTR_ERR(clock) == -EINVAL) && !strncmp(name, "ick", 3))316 if ((PTR_ERR(clock) == -EINVAL) && is_ick)
311 return 0;317 return 0;
312 else if (IS_ERR(clock))318 else if (IS_ERR(clock))
313 return PTR_ERR(clock);319 return PTR_ERR(clock);
@@ -320,6 +326,11 @@ static int __init dmtimer_systimer_init_clock(struct device_node *np, · 6 unmodified lines
320 if (!r)326 if (!r)
321 return -ENODEV;327 return -ENODEV;
322 328
329 if (is_ick)
330 t->ick = clock;
331 else
332 t->fck = clock;
333
323 *rate = r;334 *rate = r;
324 335
325 return 0;336 return 0;
@@ -339,7 +350,10 @@ static void dmtimer_systimer_enable(struct dmtimer_systimer *t) · 13 unmodified lines
339 350
340static void dmtimer_systimer_disable(struct dmtimer_systimer *t)351static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
341{352{
342 writel_relaxed(0, t->base + t->sysc);353 if (!dmtimer_systimer_revision1(t))
354 return;
355
356 writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
343}357}
344 358
345static int __init dmtimer_systimer_setup(struct device_node *np,359static int __init dmtimer_systimer_setup(struct device_node *np,
@@ -366,13 +380,13 @@ static int __init dmtimer_systimer_setup(struct device_node *np, · 20 unmodified lines
366 pr_err("%s: clock source init failed: %i\n", __func__, error);380 pr_err("%s: clock source init failed: %i\n", __func__, error);
367 381
368 /* For ti-sysc, we have timer clocks at the parent module level */382 /* For ti-sysc, we have timer clocks at the parent module level */
369 error = dmtimer_systimer_init_clock(np->parent, "fck", &rate);383 error = dmtimer_systimer_init_clock(t, np->parent, "fck", &rate);
370 if (error)384 if (error)
371 goto err_unmap;385 goto err_unmap;
372 386
373 t->rate = rate;387 t->rate = rate;
374 388
375 error = dmtimer_systimer_init_clock(np->parent, "ick", &rate);389 error = dmtimer_systimer_init_clock(t, np->parent, "ick", &rate);
376 if (error)390 if (error)
377 goto err_unmap;391 goto err_unmap;
378 392
@@ -496,12 +510,18 @@ static void omap_clockevent_idle(struct clock_event_device *evt) · 117 unmodified lines
496 struct dmtimer_systimer *t = &clkevt->t;510 struct dmtimer_systimer *t = &clkevt->t;
497 511
498 dmtimer_systimer_disable(t);512 dmtimer_systimer_disable(t);
513 clk_disable(t->fck);
499}514}
500 515
501static void omap_clockevent_unidle(struct clock_event_device *evt)516static void omap_clockevent_unidle(struct clock_event_device *evt)
502{517{
503 struct dmtimer_clockevent *clkevt = to_dmtimer_clockevent(evt);518 struct dmtimer_clockevent *clkevt = to_dmtimer_clockevent(evt);
504 struct dmtimer_systimer *t = &clkevt->t;519 struct dmtimer_systimer *t = &clkevt->t;
520 int error;
521
522 error = clk_enable(t->fck);
523 if (error)
524 pr_err("could not enable timer fck on resume: %i\n", error);
505 525
506 dmtimer_systimer_enable(t);526 dmtimer_systimer_enable(t);
507 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena);527 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena);
@@ -570,8 +590,8 @@ static int __init dmtimer_clockevent_init(struct device_node *np) · 62 unmodified lines
570 3, /* Timer internal resynch latency */590 3, /* Timer internal resynch latency */
571 0xffffffff);591 0xffffffff);
572 592
573 if (of_device_is_compatible(np, "ti,am33xx") ||593 if (of_machine_is_compatible("ti,am33xx") ||
574 of_device_is_compatible(np, "ti,am43")) {594 of_machine_is_compatible("ti,am43")) {
575 dev->suspend = omap_clockevent_idle;595 dev->suspend = omap_clockevent_idle;
576 dev->resume = omap_clockevent_unidle;596 dev->resume = omap_clockevent_unidle;
577 }597 }
@@ -616,12 +636,18 @@ static void dmtimer_clocksource_suspend(struct clocksource *cs) · 38 unmodified lines
616 636
617 clksrc->loadval = readl_relaxed(t->base + t->counter);637 clksrc->loadval = readl_relaxed(t->base + t->counter);
618 dmtimer_systimer_disable(t);638 dmtimer_systimer_disable(t);
639 clk_disable(t->fck);
619}640}
620 641
621static void dmtimer_clocksource_resume(struct clocksource *cs)642static void dmtimer_clocksource_resume(struct clocksource *cs)
622{643{
623 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);644 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
624 struct dmtimer_systimer *t = &clksrc->t;645 struct dmtimer_systimer *t = &clksrc->t;
646 int error;
647
648 error = clk_enable(t->fck);
649 if (error)
650 pr_err("could not enable timer fck on resume: %i\n", error);
625 651
626 dmtimer_systimer_enable(t);652 dmtimer_systimer_enable(t);
627 writel_relaxed(clksrc->loadval, t->base + t->counter);653 writel_relaxed(clksrc->loadval, t->base + t->counter);
@@ -653,8 +679,8 @@ static int __init dmtimer_clocksource_init(struct device_node *np) · 25 unmodified lines
653 dev->mask = CLOCKSOURCE_MASK(32);679 dev->mask = CLOCKSOURCE_MASK(32);
654 dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;680 dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;
655 681
656 if (of_device_is_compatible(np, "ti,am33xx") ||682 /* Unlike for clockevent, legacy code sets suspend only for am4 */
657 of_device_is_compatible(np, "ti,am43")) {683 if (of_machine_is_compatible("ti,am43")) {
658 dev->suspend = dmtimer_clocksource_suspend;684 dev->suspend = dmtimer_clocksource_suspend;
659 dev->resume = dmtimer_clocksource_resume;685 dev->resume = dmtimer_clocksource_resume;
660 }686 }
drivers/counter/104-quad-8.c+19−3
@@ -1274,18 +1274,26 @@ static ssize_t quad8_signal_cable_fault_read(struct counter_device *counter, · 1273 unmodified lines
1274 struct counter_signal *signal,1274 struct counter_signal *signal,
1275 void *private, char *buf)1275 void *private, char *buf)
1276{1276{
1277 const struct quad8_iio *const priv = counter->priv;1277 struct quad8_iio *const priv = counter->priv;
1278 const size_t channel_id = signal->id / 2;1278 const size_t channel_id = signal->id / 2;
1279 const bool disabled = !(priv->cable_fault_enable & BIT(channel_id));1279 bool disabled;
1280 unsigned int status;1280 unsigned int status;
1281 unsigned int fault;1281 unsigned int fault;
1282 1282
1283 if (disabled)1283 mutex_lock(&priv->lock);
1284
1285 disabled = !(priv->cable_fault_enable & BIT(channel_id));
1286
1287 if (disabled) {
1288 mutex_unlock(&priv->lock);
1284 return -EINVAL;1289 return -EINVAL;
1290 }
1285 1291
1286 /* Logic 0 = cable fault */1292 /* Logic 0 = cable fault */
1287 status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);1293 status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);
1288 1294
1295 mutex_unlock(&priv->lock);
1296
1289 /* Mask respective channel and invert logic */1297 /* Mask respective channel and invert logic */
1290 fault = !(status & BIT(channel_id));1298 fault = !(status & BIT(channel_id));
1291 1299
@@ -1317,6 +1325,8 @@ static ssize_t quad8_signal_cable_fault_enable_write( · 25 unmodified lines
1317 if (ret)1325 if (ret)
1318 return ret;1326 return ret;
1319 1327
1328 mutex_lock(&priv->lock);
1329
1320 if (enable)1330 if (enable)
1321 priv->cable_fault_enable |= BIT(channel_id);1331 priv->cable_fault_enable |= BIT(channel_id);
1322 else1332 else
@@ -1327,6 +1337,8 @@ static ssize_t quad8_signal_cable_fault_enable_write( · 4 unmodified lines
1327 1337
1328 outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);1338 outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS);
1329 1339
1340 mutex_unlock(&priv->lock);
1341
1330 return len;1342 return len;
1331}1343}
1332 1344
@@ -1353,6 +1365,8 @@ static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter, · 20 unmodified lines
1353 if (ret)1365 if (ret)
1354 return ret;1366 return ret;
1355 1367
1368 mutex_lock(&priv->lock);
1369
1356 priv->fck_prescaler[channel_id] = prescaler;1370 priv->fck_prescaler[channel_id] = prescaler;
1357 1371
1358 /* Reset Byte Pointer */1372 /* Reset Byte Pointer */
@@ -1363,6 +1377,8 @@ static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter, · 4 unmodified lines
1363 outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,1377 outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC,
1364 base_offset + 1);1378 base_offset + 1);
1365 1379
1380 mutex_unlock(&priv->lock);
1381
1366 return len;1382 return len;
1367}1383}
1368 1384
drivers/cpufreq/intel_pstate.c+6−2
@@ -2464,7 +2464,7 @@ static struct cpufreq_driver intel_cpufreq = { · 2463 unmodified lines
2464 .name = "intel_cpufreq",2464 .name = "intel_cpufreq",
2465};2465};
2466 2466
2467static struct cpufreq_driver *default_driver = &intel_pstate;2467static struct cpufreq_driver *default_driver;
2468 2468
2469static void intel_pstate_driver_cleanup(void)2469static void intel_pstate_driver_cleanup(void)
2470{2470{
@@ -2758,6 +2758,7 @@ static int __init intel_pstate_init(void) · 287 unmodified lines
2758 hwp_active++;2758 hwp_active++;
2759 hwp_mode_bdw = id->driver_data;2759 hwp_mode_bdw = id->driver_data;
2760 intel_pstate.attr = hwp_cpufreq_attrs;2760 intel_pstate.attr = hwp_cpufreq_attrs;
2761 default_driver = &intel_pstate;
2761 goto hwp_cpu_matched;2762 goto hwp_cpu_matched;
2762 }2763 }
2763 } else {2764 } else {
@@ -2775,7 +2776,8 @@ static int __init intel_pstate_init(void) · 11 unmodified lines
2775 return -ENODEV;2776 return -ENODEV;
2776 }2777 }
2777 /* Without HWP start in the passive mode. */2778 /* Without HWP start in the passive mode. */
2778 default_driver = &intel_cpufreq;2779 if (!default_driver)
2780 default_driver = &intel_cpufreq;
2779 2781
2780hwp_cpu_matched:2782hwp_cpu_matched:
2781 /*2783 /*
@@ -2820,6 +2822,8 @@ static int __init intel_pstate_setup(char *str) · 38 unmodified lines
2820 2822
2821 if (!strcmp(str, "disable")) {2823 if (!strcmp(str, "disable")) {
2822 no_load = 1;2824 no_load = 1;
2825 } else if (!strcmp(str, "active")) {
2826 default_driver = &intel_pstate;
2823 } else if (!strcmp(str, "passive")) {2827 } else if (!strcmp(str, "passive")) {
2824 default_driver = &intel_cpufreq;2828 default_driver = &intel_cpufreq;
2825 no_hwp = 1;2829 no_hwp = 1;
drivers/crypto/chelsio/chtls/chtls_cm.c+1−1
@@ -102,7 +102,7 @@ static struct net_device *chtls_find_netdev(struct chtls_dev *cdev, · 101 unmodified lines
102 case PF_INET:102 case PF_INET:
103 if (likely(!inet_sk(sk)->inet_rcv_saddr))103 if (likely(!inet_sk(sk)->inet_rcv_saddr))
104 return ndev;104 return ndev;
105 ndev = ip_dev_find(&init_net, inet_sk(sk)->inet_rcv_saddr);105 ndev = __ip_dev_find(&init_net, inet_sk(sk)->inet_rcv_saddr, false);
106 break;106 break;
107#if IS_ENABLED(CONFIG_IPV6)107#if IS_ENABLED(CONFIG_IPV6)
108 case PF_INET6:108 case PF_INET6:
drivers/crypto/chelsio/chtls/chtls_io.c+4−3
@@ -1052,14 +1052,15 @@ int chtls_sendmsg(struct sock *sk, struct msghdr *msg, size_t size) · 1051 unmodified lines
1052 &record_type);1052 &record_type);
1053 if (err)1053 if (err)
1054 goto out_err;1054 goto out_err;
1055
1056 /* Avoid appending tls handshake, alert to tls data */
1057 if (skb)
1058 tx_skb_finalize(skb);
1055 }1059 }
1056 1060
1057 recordsz = size;1061 recordsz = size;
1058 csk->tlshws.txleft = recordsz;1062 csk->tlshws.txleft = recordsz;
1059 csk->tlshws.type = record_type;1063 csk->tlshws.type = record_type;
1060
1061 if (skb)
1062 ULP_SKB_CB(skb)->ulp.tls.type = record_type;
1063 }1064 }
1064 1065
1065 if (!skb || (ULP_SKB_CB(skb)->flags & ULPCB_FLAG_NO_APPEND) ||1066 if (!skb || (ULP_SKB_CB(skb)->flags & ULPCB_FLAG_NO_APPEND) ||
drivers/dma-buf/dma-buf.c+7−4
@@ -45,10 +45,10 @@ static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen) · 44 unmodified lines
45 size_t ret = 0;45 size_t ret = 0;
46 46
47 dmabuf = dentry->d_fsdata;47 dmabuf = dentry->d_fsdata;
48 dma_resv_lock(dmabuf->resv, NULL);48 spin_lock(&dmabuf->name_lock);
49 if (dmabuf->name)49 if (dmabuf->name)
50 ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN);50 ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN);
51 dma_resv_unlock(dmabuf->resv);51 spin_unlock(&dmabuf->name_lock);
52 52
53 return dynamic_dname(dentry, buffer, buflen, "/%s:%s",53 return dynamic_dname(dentry, buffer, buflen, "/%s:%s",
54 dentry->d_name.name, ret > 0 ? name : "");54 dentry->d_name.name, ret > 0 ? name : "");
@@ -338,8 +338,10 @@ static long dma_buf_set_name(struct dma_buf *dmabuf, const char __user *buf) · 283 unmodified lines
338 kfree(name);338 kfree(name);
339 goto out_unlock;339 goto out_unlock;
340 }340 }
341 spin_lock(&dmabuf->name_lock);
341 kfree(dmabuf->name);342 kfree(dmabuf->name);
342 dmabuf->name = name;343 dmabuf->name = name;
344 spin_unlock(&dmabuf->name_lock);
343 345
344out_unlock:346out_unlock:
345 dma_resv_unlock(dmabuf->resv);347 dma_resv_unlock(dmabuf->resv);
@@ -402,10 +404,10 @@ static void dma_buf_show_fdinfo(struct seq_file *m, struct file *file) · 56 unmodified lines
402 /* Don't count the temporary reference taken inside procfs seq_show */404 /* Don't count the temporary reference taken inside procfs seq_show */
403 seq_printf(m, "count:\t%ld\n", file_count(dmabuf->file) - 1);405 seq_printf(m, "count:\t%ld\n", file_count(dmabuf->file) - 1);
404 seq_printf(m, "exp_name:\t%s\n", dmabuf->exp_name);406 seq_printf(m, "exp_name:\t%s\n", dmabuf->exp_name);
405 dma_resv_lock(dmabuf->resv, NULL);407 spin_lock(&dmabuf->name_lock);
406 if (dmabuf->name)408 if (dmabuf->name)
407 seq_printf(m, "name:\t%s\n", dmabuf->name);409 seq_printf(m, "name:\t%s\n", dmabuf->name);
408 dma_resv_unlock(dmabuf->resv);410 spin_unlock(&dmabuf->name_lock);
409}411}
410 412
411static const struct file_operations dma_buf_fops = {413static const struct file_operations dma_buf_fops = {
@@ -542,6 +544,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) · 130 unmodified lines
542 dmabuf->size = exp_info->size;544 dmabuf->size = exp_info->size;
543 dmabuf->exp_name = exp_info->exp_name;545 dmabuf->exp_name = exp_info->exp_name;
544 dmabuf->owner = exp_info->owner;546 dmabuf->owner = exp_info->owner;
547 spin_lock_init(&dmabuf->name_lock);
545 init_waitqueue_head(&dmabuf->poll);548 init_waitqueue_head(&dmabuf->poll);
546 dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll;549 dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll;
547 dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0;550 dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0;
drivers/dma/dmatest.c+2−0
@@ -1176,6 +1176,8 @@ static int dmatest_run_set(const char *val, const struct kernel_param *kp) · 1175 unmodified lines
1176 } else if (dmatest_run) {1176 } else if (dmatest_run) {
1177 if (!is_threaded_test_pending(info)) {1177 if (!is_threaded_test_pending(info)) {
1178 pr_info("No channels configured, continue with any\n");1178 pr_info("No channels configured, continue with any\n");
1179 if (!is_threaded_test_run(info))
1180 stop_threaded_test(info);
1179 add_threaded_test(info);1181 add_threaded_test(info);
1180 }1182 }
1181 start_threaded_tests(info);1183 start_threaded_tests(info);
drivers/dma/dw/core.c+0−12
@@ -118,16 +118,11 @@ static void dwc_initialize(struct dw_dma_chan *dwc) · 117 unmodified lines
118{118{
119 struct dw_dma *dw = to_dw_dma(dwc->chan.device);119 struct dw_dma *dw = to_dw_dma(dwc->chan.device);
120 120
121 if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags))
122 return;
123
124 dw->initialize_chan(dwc);121 dw->initialize_chan(dwc);
125 122
126 /* Enable interrupts */123 /* Enable interrupts */
127 channel_set_bit(dw, MASK.XFER, dwc->mask);124 channel_set_bit(dw, MASK.XFER, dwc->mask);
128 channel_set_bit(dw, MASK.ERROR, dwc->mask);125 channel_set_bit(dw, MASK.ERROR, dwc->mask);
129
130 set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
131}126}
132 127
133/*----------------------------------------------------------------------*/128/*----------------------------------------------------------------------*/
@@ -954,8 +949,6 @@ static void dwc_issue_pending(struct dma_chan *chan) · 820 unmodified lines
954 949
955void do_dw_dma_off(struct dw_dma *dw)950void do_dw_dma_off(struct dw_dma *dw)
956{951{
957 unsigned int i;
958
959 dma_writel(dw, CFG, 0);952 dma_writel(dw, CFG, 0);
960 953
961 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);954 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask);
@@ -966,9 +959,6 @@ void do_dw_dma_off(struct dw_dma *dw) · 4 unmodified lines
966 959
967 while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)960 while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
968 cpu_relax();961 cpu_relax();
969
970 for (i = 0; i < dw->dma.chancnt; i++)
971 clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags);
972}962}
973 963
974void do_dw_dma_on(struct dw_dma *dw)964void do_dw_dma_on(struct dw_dma *dw)
@@ -1032,8 +1022,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan) · 57 unmodified lines
1032 /* Clear custom channel configuration */1022 /* Clear custom channel configuration */
1033 memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));1023 memset(&dwc->dws, 0, sizeof(struct dw_dma_slave));
1034 1024
1035 clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags);
1036
1037 /* Disable interrupts */1025 /* Disable interrupts */
1038 channel_clear_bit(dw, MASK.XFER, dwc->mask);1026 channel_clear_bit(dw, MASK.XFER, dwc->mask);
1039 channel_clear_bit(dw, MASK.BLOCK, dwc->mask);1027 channel_clear_bit(dw, MASK.BLOCK, dwc->mask);
drivers/dma/fsl-edma-common.c+16−12
@@ -352,26 +352,28 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, · 351 unmodified lines
352 /*352 /*
353 * TCD parameters are stored in struct fsl_edma_hw_tcd in little353 * TCD parameters are stored in struct fsl_edma_hw_tcd in little
354 * endian format. However, we need to load the TCD registers in354 * endian format. However, we need to load the TCD registers in
355 * big- or little-endian obeying the eDMA engine model endian.355 * big- or little-endian obeying the eDMA engine model endian,
356 * and this is performed from specific edma_write functions
356 */357 */
357 edma_writew(edma, 0, &regs->tcd[ch].csr);358 edma_writew(edma, 0, &regs->tcd[ch].csr);
358 edma_writel(edma, le32_to_cpu(tcd->saddr), &regs->tcd[ch].saddr);
359 edma_writel(edma, le32_to_cpu(tcd->daddr), &regs->tcd[ch].daddr);
360 359
361 edma_writew(edma, le16_to_cpu(tcd->attr), &regs->tcd[ch].attr);360 edma_writel(edma, (s32)tcd->saddr, &regs->tcd[ch].saddr);
362 edma_writew(edma, le16_to_cpu(tcd->soff), &regs->tcd[ch].soff);361 edma_writel(edma, (s32)tcd->daddr, &regs->tcd[ch].daddr);
363 362
364 edma_writel(edma, le32_to_cpu(tcd->nbytes), &regs->tcd[ch].nbytes);363 edma_writew(edma, (s16)tcd->attr, &regs->tcd[ch].attr);
365 edma_writel(edma, le32_to_cpu(tcd->slast), &regs->tcd[ch].slast);364 edma_writew(edma, tcd->soff, &regs->tcd[ch].soff);
366 365
367 edma_writew(edma, le16_to_cpu(tcd->citer), &regs->tcd[ch].citer);366 edma_writel(edma, (s32)tcd->nbytes, &regs->tcd[ch].nbytes);
368 edma_writew(edma, le16_to_cpu(tcd->biter), &regs->tcd[ch].biter);367 edma_writel(edma, (s32)tcd->slast, &regs->tcd[ch].slast);
369 edma_writew(edma, le16_to_cpu(tcd->doff), &regs->tcd[ch].doff);
370 368
371 edma_writel(edma, le32_to_cpu(tcd->dlast_sga),369 edma_writew(edma, (s16)tcd->citer, &regs->tcd[ch].citer);
370 edma_writew(edma, (s16)tcd->biter, &regs->tcd[ch].biter);
371 edma_writew(edma, (s16)tcd->doff, &regs->tcd[ch].doff);
372
373 edma_writel(edma, (s32)tcd->dlast_sga,
372 &regs->tcd[ch].dlast_sga);374 &regs->tcd[ch].dlast_sga);
373 375
374 edma_writew(edma, le16_to_cpu(tcd->csr), &regs->tcd[ch].csr);376 edma_writew(edma, (s16)tcd->csr, &regs->tcd[ch].csr);
375}377}
376 378
377static inline379static inline
@@ -589,6 +591,8 @@ void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) · 211 unmodified lines
589{591{
590 struct virt_dma_desc *vdesc;592 struct virt_dma_desc *vdesc;
591 593
594 lockdep_assert_held(&fsl_chan->vchan.lock);
595
592 vdesc = vchan_next_desc(&fsl_chan->vchan);596 vdesc = vchan_next_desc(&fsl_chan->vchan);
593 if (!vdesc)597 if (!vdesc)
594 return;598 return;
drivers/dma/fsl-edma-common.h+1−1
@@ -33,7 +33,7 @@ · 32 unmodified lines
33#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0)33#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0)
34#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1)34#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1)
35#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1))35#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1))
36#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0))36#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(2) | BIT(0))
37#define EDMA_TCD_ATTR_SSIZE_8BIT 037#define EDMA_TCD_ATTR_SSIZE_8BIT 0
38#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8)38#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8)
39#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8)39#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8)
drivers/dma/fsl-edma.c+7−0
@@ -45,6 +45,13 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) · 44 unmodified lines
45 fsl_chan = &fsl_edma->chans[ch];45 fsl_chan = &fsl_edma->chans[ch];
46 46
47 spin_lock(&fsl_chan->vchan.lock);47 spin_lock(&fsl_chan->vchan.lock);
48
49 if (!fsl_chan->edesc) {
50 /* terminate_all called before */
51 spin_unlock(&fsl_chan->vchan.lock);
52 continue;
53 }
54
48 if (!fsl_chan->edesc->iscyclic) {55 if (!fsl_chan->edesc->iscyclic) {
49 list_del(&fsl_chan->edesc->vdesc.node);56 list_del(&fsl_chan->edesc->vdesc.node);
50 vchan_cookie_complete(&fsl_chan->edesc->vdesc);57 vchan_cookie_complete(&fsl_chan->edesc->vdesc);
drivers/dma/idxd/cdev.c+16−3
@@ -74,6 +74,7 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp) · 73 unmodified lines
74 struct idxd_device *idxd;74 struct idxd_device *idxd;
75 struct idxd_wq *wq;75 struct idxd_wq *wq;
76 struct device *dev;76 struct device *dev;
77 int rc = 0;
77 78
78 wq = inode_wq(inode);79 wq = inode_wq(inode);
79 idxd = wq->idxd;80 idxd = wq->idxd;
@@ -81,17 +82,27 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp) · 1 unmodified line
81 82
82 dev_dbg(dev, "%s called: %d\n", __func__, idxd_wq_refcount(wq));83 dev_dbg(dev, "%s called: %d\n", __func__, idxd_wq_refcount(wq));
83 84
84 if (idxd_wq_refcount(wq) > 0 && wq_dedicated(wq))
85 return -EBUSY;
86
87 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);85 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
88 if (!ctx)86 if (!ctx)
89 return -ENOMEM;87 return -ENOMEM;
90 88
89 mutex_lock(&wq->wq_lock);
90
91 if (idxd_wq_refcount(wq) > 0 && wq_dedicated(wq)) {
92 rc = -EBUSY;
93 goto failed;
94 }
95
91 ctx->wq = wq;96 ctx->wq = wq;
92 filp->private_data = ctx;97 filp->private_data = ctx;
93 idxd_wq_get(wq);98 idxd_wq_get(wq);
99 mutex_unlock(&wq->wq_lock);
94 return 0;100 return 0;
101
102 failed:
103 mutex_unlock(&wq->wq_lock);
104 kfree(ctx);
105 return rc;
95}106}
96 107
97static int idxd_cdev_release(struct inode *node, struct file *filep)108static int idxd_cdev_release(struct inode *node, struct file *filep)
@@ -105,7 +116,9 @@ static int idxd_cdev_release(struct inode *node, struct file *filep) · 7 unmodified lines
105 filep->private_data = NULL;116 filep->private_data = NULL;
106 117
107 kfree(ctx);118 kfree(ctx);
119 mutex_lock(&wq->wq_lock);
108 idxd_wq_put(wq);120 idxd_wq_put(wq);
121 mutex_unlock(&wq->wq_lock);
109 return 0;122 return 0;
110}123}
111 124
drivers/dma/idxd/device.c+25−0
@@ -320,6 +320,31 @@ void idxd_wq_unmap_portal(struct idxd_wq *wq) · 319 unmodified lines
320 devm_iounmap(dev, wq->dportal);320 devm_iounmap(dev, wq->dportal);
321}321}
322 322
323void idxd_wq_disable_cleanup(struct idxd_wq *wq)
324{
325 struct idxd_device *idxd = wq->idxd;
326 struct device *dev = &idxd->pdev->dev;
327 int i, wq_offset;
328
329 lockdep_assert_held(&idxd->dev_lock);
330 memset(&wq->wqcfg, 0, sizeof(wq->wqcfg));
331 wq->type = IDXD_WQT_NONE;
332 wq->size = 0;
333 wq->group = NULL;
334 wq->threshold = 0;
335 wq->priority = 0;
336 clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
337 memset(wq->name, 0, WQ_NAME_SIZE);
338
339 for (i = 0; i < 8; i++) {
340 wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32);
341 iowrite32(0, idxd->reg_base + wq_offset);
342 dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n",
343 wq->id, i, wq_offset,
344 ioread32(idxd->reg_base + wq_offset));
345 }
346}
347
323/* Device control bits */348/* Device control bits */
324static inline bool idxd_is_enabled(struct idxd_device *idxd)349static inline bool idxd_is_enabled(struct idxd_device *idxd)
325{350{
drivers/dma/idxd/idxd.h+1−0
@@ -290,6 +290,7 @@ int idxd_wq_enable(struct idxd_wq *wq); · 289 unmodified lines
290int idxd_wq_disable(struct idxd_wq *wq);290int idxd_wq_disable(struct idxd_wq *wq);
291int idxd_wq_map_portal(struct idxd_wq *wq);291int idxd_wq_map_portal(struct idxd_wq *wq);
292void idxd_wq_unmap_portal(struct idxd_wq *wq);292void idxd_wq_unmap_portal(struct idxd_wq *wq);
293void idxd_wq_disable_cleanup(struct idxd_wq *wq);
293 294
294/* submission */295/* submission */
295int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc);296int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc);
drivers/dma/idxd/irq.c+2−1
@@ -141,7 +141,7 @@ irqreturn_t idxd_misc_thread(int vec, void *data) · 140 unmodified lines
141 141
142 iowrite32(cause, idxd->reg_base + IDXD_INTCAUSE_OFFSET);142 iowrite32(cause, idxd->reg_base + IDXD_INTCAUSE_OFFSET);
143 if (!err)143 if (!err)
144 return IRQ_HANDLED;144 goto out;
145 145
146 gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);146 gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET);
147 if (gensts.state == IDXD_DEVICE_STATE_HALT) {147 if (gensts.state == IDXD_DEVICE_STATE_HALT) {
@@ -162,6 +162,7 @@ irqreturn_t idxd_misc_thread(int vec, void *data) · 14 unmodified lines
162 spin_unlock_bh(&idxd->dev_lock);162 spin_unlock_bh(&idxd->dev_lock);
163 }163 }
164 164
165 out:
165 idxd_unmask_msix_vector(idxd, irq_entry->id);166 idxd_unmask_msix_vector(idxd, irq_entry->id);
166 return IRQ_HANDLED;167 return IRQ_HANDLED;
167}168}
drivers/dma/idxd/sysfs.c+5−0
@@ -315,6 +315,11 @@ static int idxd_config_bus_remove(struct device *dev) · 314 unmodified lines
315 idxd_unregister_dma_device(idxd);315 idxd_unregister_dma_device(idxd);
316 spin_lock_irqsave(&idxd->dev_lock, flags);316 spin_lock_irqsave(&idxd->dev_lock, flags);
317 rc = idxd_device_disable(idxd);317 rc = idxd_device_disable(idxd);
318 for (i = 0; i < idxd->max_wqs; i++) {
319 struct idxd_wq *wq = &idxd->wqs[i];
320
321 idxd_wq_disable_cleanup(wq);
322 }
318 spin_unlock_irqrestore(&idxd->dev_lock, flags);323 spin_unlock_irqrestore(&idxd->dev_lock, flags);
319 module_put(THIS_MODULE);324 module_put(THIS_MODULE);
320 if (rc < 0)325 if (rc < 0)
drivers/dma/imx-sdma.c+4−7
@@ -1331,8 +1331,7 @@ static void sdma_free_chan_resources(struct dma_chan *chan) · 1330 unmodified lines
1331 1331
1332 sdma_channel_synchronize(chan);1332 sdma_channel_synchronize(chan);
1333 1333
1334 if (sdmac->event_id0 >= 0)1334 sdma_event_disable(sdmac, sdmac->event_id0);
1335 sdma_event_disable(sdmac, sdmac->event_id0);
1336 if (sdmac->event_id1)1335 if (sdmac->event_id1)
1337 sdma_event_disable(sdmac, sdmac->event_id1);1336 sdma_event_disable(sdmac, sdmac->event_id1);
1338 1337
@@ -1632,11 +1631,9 @@ static int sdma_config(struct dma_chan *chan, · 293 unmodified lines
1632 memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg));1631 memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg));
1633 1632
1634 /* Set ENBLn earlier to make sure dma request triggered after that */1633 /* Set ENBLn earlier to make sure dma request triggered after that */
1635 if (sdmac->event_id0 >= 0) {1634 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events)
1636 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events)1635 return -EINVAL;
1637 return -EINVAL;1636 sdma_event_enable(sdmac, sdmac->event_id0);
1638 sdma_event_enable(sdmac, sdmac->event_id0);
1639 }
1640 1637
1641 if (sdmac->event_id1) {1638 if (sdmac->event_id1) {
1642 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)1639 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events)
drivers/dma/ioat/dma.c+12−0
@@ -26,6 +26,18 @@ · 25 unmodified lines
26 26
27#include "../dmaengine.h"27#include "../dmaengine.h"
28 28
29int completion_timeout = 200;
30module_param(completion_timeout, int, 0644);
31MODULE_PARM_DESC(completion_timeout,
32 "set ioat completion timeout [msec] (default 200 [msec])");
33int idle_timeout = 2000;
34module_param(idle_timeout, int, 0644);
35MODULE_PARM_DESC(idle_timeout,
36 "set ioat idel timeout [msec] (default 2000 [msec])");
37
38#define IDLE_TIMEOUT msecs_to_jiffies(idle_timeout)
39#define COMPLETION_TIMEOUT msecs_to_jiffies(completion_timeout)
40
29static char *chanerr_str[] = {41static char *chanerr_str[] = {
30 "DMA Transfer Source Address Error",42 "DMA Transfer Source Address Error",
31 "DMA Transfer Destination Address Error",43 "DMA Transfer Destination Address Error",
drivers/dma/ioat/dma.h+0−2
@@ -104,8 +104,6 @@ struct ioatdma_chan { · 103 unmodified lines
104 #define IOAT_RUN 5104 #define IOAT_RUN 5
105 #define IOAT_CHAN_ACTIVE 6105 #define IOAT_CHAN_ACTIVE 6
106 struct timer_list timer;106 struct timer_list timer;
107 #define COMPLETION_TIMEOUT msecs_to_jiffies(100)
108 #define IDLE_TIMEOUT msecs_to_jiffies(2000)
109 #define RESET_DELAY msecs_to_jiffies(100)107 #define RESET_DELAY msecs_to_jiffies(100)
110 struct ioatdma_device *ioat_dma;108 struct ioatdma_device *ioat_dma;
111 dma_addr_t completion_dma;109 dma_addr_t completion_dma;
drivers/dma/mcf-edma.c+7−0
@@ -35,6 +35,13 @@ static irqreturn_t mcf_edma_tx_handler(int irq, void *dev_id) · 34 unmodified lines
35 mcf_chan = &mcf_edma->chans[ch];35 mcf_chan = &mcf_edma->chans[ch];
36 36
37 spin_lock(&mcf_chan->vchan.lock);37 spin_lock(&mcf_chan->vchan.lock);
38
39 if (!mcf_chan->edesc) {
40 /* terminate_all called before */
41 spin_unlock(&mcf_chan->vchan.lock);
42 continue;
43 }
44
38 if (!mcf_chan->edesc->iscyclic) {45 if (!mcf_chan->edesc->iscyclic) {
39 list_del(&mcf_chan->edesc->vdesc.node);46 list_del(&mcf_chan->edesc->vdesc.node);
40 vchan_cookie_complete(&mcf_chan->edesc->vdesc);47 vchan_cookie_complete(&mcf_chan->edesc->vdesc);
drivers/dma/sh/usb-dmac.c+2−0
@@ -586,6 +586,8 @@ static void usb_dmac_isr_transfer_end(struct usb_dmac_chan *chan) · 585 unmodified lines
586 desc->residue = usb_dmac_get_current_residue(chan, desc,586 desc->residue = usb_dmac_get_current_residue(chan, desc,
587 desc->sg_index - 1);587 desc->sg_index - 1);
588 desc->done_cookie = desc->vd.tx.cookie;588 desc->done_cookie = desc->vd.tx.cookie;
589 desc->vd.tx_result.result = DMA_TRANS_NOERROR;
590 desc->vd.tx_result.residue = desc->residue;
589 vchan_cookie_complete(&desc->vd);591 vchan_cookie_complete(&desc->vd);
590 592
591 /* Restart the next transfer if this driver has a next desc */593 /* Restart the next transfer if this driver has a next desc */
drivers/dma/tegra210-adma.c+4−1
@@ -658,6 +658,7 @@ static int tegra_adma_alloc_chan_resources(struct dma_chan *dc) · 657 unmodified lines
658 658
659 ret = pm_runtime_get_sync(tdc2dev(tdc));659 ret = pm_runtime_get_sync(tdc2dev(tdc));
660 if (ret < 0) {660 if (ret < 0) {
661 pm_runtime_put_noidle(tdc2dev(tdc));
661 free_irq(tdc->irq, tdc);662 free_irq(tdc->irq, tdc);
662 return ret;663 return ret;
663 }664 }
@@ -869,8 +870,10 @@ static int tegra_adma_probe(struct platform_device *pdev) · 205 unmodified lines
869 pm_runtime_enable(&pdev->dev);870 pm_runtime_enable(&pdev->dev);
870 871
871 ret = pm_runtime_get_sync(&pdev->dev);872 ret = pm_runtime_get_sync(&pdev->dev);
872 if (ret < 0)873 if (ret < 0) {
874 pm_runtime_put_noidle(&pdev->dev);
873 goto rpm_disable;875 goto rpm_disable;
876 }
874 877
875 ret = tegra_adma_init(tdma);878 ret = tegra_adma_init(tdma);
876 if (ret)879 if (ret)
drivers/dma/ti/k3-udma-private.c+1−0
@@ -42,6 +42,7 @@ struct udma_dev *of_xudma_dev_get(struct device_node *np, const char *property) · 41 unmodified lines
42 ud = platform_get_drvdata(pdev);42 ud = platform_get_drvdata(pdev);
43 if (!ud) {43 if (!ud) {
44 pr_debug("UDMA has not been probed\n");44 pr_debug("UDMA has not been probed\n");
45 put_device(&pdev->dev);
45 return ERR_PTR(-EPROBE_DEFER);46 return ERR_PTR(-EPROBE_DEFER);
46 }47 }
47 48
drivers/dma/ti/k3-udma.c+19−20
@@ -1753,7 +1753,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 1752 unmodified lines
1753 dev_err(ud->ddev.dev,1753 dev_err(ud->ddev.dev,
1754 "Descriptor pool allocation failed\n");1754 "Descriptor pool allocation failed\n");
1755 uc->use_dma_pool = false;1755 uc->use_dma_pool = false;
1756 return -ENOMEM;1756 ret = -ENOMEM;
1757 goto err_cleanup;
1757 }1758 }
1758 }1759 }
1759 1760
@@ -1773,16 +1774,18 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 13 unmodified lines
1773 1774
1774 ret = udma_get_chan_pair(uc);1775 ret = udma_get_chan_pair(uc);
1775 if (ret)1776 if (ret)
1776 return ret;1777 goto err_cleanup;
1777 1778
1778 ret = udma_alloc_tx_resources(uc);1779 ret = udma_alloc_tx_resources(uc);
1779 if (ret)1780 if (ret) {
1780 return ret;1781 udma_put_rchan(uc);
1782 goto err_cleanup;
1783 }
1781 1784
1782 ret = udma_alloc_rx_resources(uc);1785 ret = udma_alloc_rx_resources(uc);
1783 if (ret) {1786 if (ret) {
1784 udma_free_tx_resources(uc);1787 udma_free_tx_resources(uc);
1785 return ret;1788 goto err_cleanup;
1786 }1789 }
1787 1790
1788 uc->config.src_thread = ud->psil_base + uc->tchan->id;1791 uc->config.src_thread = ud->psil_base + uc->tchan->id;
@@ -1800,10 +1803,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 11 unmodified lines
1800 uc->id);1803 uc->id);
1801 1804
1802 ret = udma_alloc_tx_resources(uc);1805 ret = udma_alloc_tx_resources(uc);
1803 if (ret) {1806 if (ret)
1804 uc->config.remote_thread_id = -1;1807 goto err_cleanup;
1805 return ret;
1806 }
1807 1808
1808 uc->config.src_thread = ud->psil_base + uc->tchan->id;1809 uc->config.src_thread = ud->psil_base + uc->tchan->id;
1809 uc->config.dst_thread = uc->config.remote_thread_id;1810 uc->config.dst_thread = uc->config.remote_thread_id;
@@ -1820,10 +1821,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 10 unmodified lines
1820 uc->id);1821 uc->id);
1821 1822
1822 ret = udma_alloc_rx_resources(uc);1823 ret = udma_alloc_rx_resources(uc);
1823 if (ret) {1824 if (ret)
1824 uc->config.remote_thread_id = -1;1825 goto err_cleanup;
1825 return ret;
1826 }
1827 1826
1828 uc->config.src_thread = uc->config.remote_thread_id;1827 uc->config.src_thread = uc->config.remote_thread_id;
1829 uc->config.dst_thread = (ud->psil_base + uc->rchan->id) |1828 uc->config.dst_thread = (ud->psil_base + uc->rchan->id) |
@@ -1838,7 +1837,9 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 8 unmodified lines
1838 /* Can not happen */1837 /* Can not happen */
1839 dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n",1838 dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n",
1840 __func__, uc->id, uc->config.dir);1839 __func__, uc->id, uc->config.dir);
1841 return -EINVAL;1840 ret = -EINVAL;
1841 goto err_cleanup;
1842
1842 }1843 }
1843 1844
1844 /* check if the channel configuration was successful */1845 /* check if the channel configuration was successful */
@@ -1847,7 +1848,7 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 2 unmodified lines
1847 1848
1848 if (udma_is_chan_running(uc)) {1849 if (udma_is_chan_running(uc)) {
1849 dev_warn(ud->dev, "chan%d: is running!\n", uc->id);1850 dev_warn(ud->dev, "chan%d: is running!\n", uc->id);
1850 udma_stop(uc);1851 udma_reset_chan(uc, false);
1851 if (udma_is_chan_running(uc)) {1852 if (udma_is_chan_running(uc)) {
1852 dev_err(ud->dev, "chan%d: won't stop!\n", uc->id);1853 dev_err(ud->dev, "chan%d: won't stop!\n", uc->id);
1853 ret = -EBUSY;1854 ret = -EBUSY;
@@ -1906,8 +1907,6 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 52 unmodified lines
1906 1907
1907 udma_reset_rings(uc);1908 udma_reset_rings(uc);
1908 1909
1909 INIT_DELAYED_WORK_ONSTACK(&uc->tx_drain.work,
1910 udma_check_tx_completion);
1911 return 0;1910 return 0;
1912 1911
1913err_irq_free:1912err_irq_free:
@@ -1919,7 +1918,7 @@ err_psi_free: · 5 unmodified lines
1919err_res_free:1918err_res_free:
1920 udma_free_tx_resources(uc);1919 udma_free_tx_resources(uc);
1921 udma_free_rx_resources(uc);1920 udma_free_rx_resources(uc);
1922 1921err_cleanup:
1923 udma_reset_uchan(uc);1922 udma_reset_uchan(uc);
1924 1923
1925 if (uc->use_dma_pool) {1924 if (uc->use_dma_pool) {
@@ -3019,7 +3018,6 @@ static void udma_free_chan_resources(struct dma_chan *chan) · 1093 unmodified lines
3019 }3018 }
3020 3019
3021 cancel_delayed_work_sync(&uc->tx_drain.work);3020 cancel_delayed_work_sync(&uc->tx_drain.work);
3022 destroy_delayed_work_on_stack(&uc->tx_drain.work);
3023 3021
3024 if (uc->irq_num_ring > 0) {3022 if (uc->irq_num_ring > 0) {
3025 free_irq(uc->irq_num_ring, uc);3023 free_irq(uc->irq_num_ring, uc);
@@ -3593,7 +3591,7 @@ static int udma_probe(struct platform_device *pdev) · 567 unmodified lines
3593 return ret;3591 return ret;
3594 }3592 }
3595 3593
3596 ret = of_property_read_u32(navss_node, "ti,udma-atype", &ud->atype);3594 ret = of_property_read_u32(dev->of_node, "ti,udma-atype", &ud->atype);
3597 if (!ret && ud->atype > 2) {3595 if (!ret && ud->atype > 2) {
3598 dev_err(dev, "Invalid atype: %u\n", ud->atype);3596 dev_err(dev, "Invalid atype: %u\n", ud->atype);
3599 return -EINVAL;3597 return -EINVAL;
@@ -3711,6 +3709,7 @@ static int udma_probe(struct platform_device *pdev) · 111 unmodified lines
3711 tasklet_init(&uc->vc.task, udma_vchan_complete,3709 tasklet_init(&uc->vc.task, udma_vchan_complete,
3712 (unsigned long)&uc->vc);3710 (unsigned long)&uc->vc);
3713 init_completion(&uc->teardown_completed);3711 init_completion(&uc->teardown_completed);
3712 INIT_DELAYED_WORK(&uc->tx_drain.work, udma_check_tx_completion);
3714 }3713 }
3715 3714
3716 ret = dma_async_device_register(&ud->ddev);3715 ret = dma_async_device_register(&ud->ddev);
drivers/firmware/efi/efi-pstore.c+1−4
@@ -356,10 +356,7 @@ static struct pstore_info efi_pstore_info = { · 355 unmodified lines
356 356
357static __init int efivars_pstore_init(void)357static __init int efivars_pstore_init(void)
358{358{
359 if (!efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))359 if (!efivars_kobject() || !efivar_supports_writes())
360 return 0;
361
362 if (!efivars_kobject())
363 return 0;360 return 0;
364 361
365 if (efivars_pstore_disable)362 if (efivars_pstore_disable)
drivers/firmware/efi/efi.c+8−4
@@ -176,11 +176,13 @@ static struct efivar_operations generic_ops; · 175 unmodified lines
176static int generic_ops_register(void)176static int generic_ops_register(void)
177{177{
178 generic_ops.get_variable = efi.get_variable;178 generic_ops.get_variable = efi.get_variable;
179 generic_ops.set_variable = efi.set_variable;
180 generic_ops.set_variable_nonblocking = efi.set_variable_nonblocking;
181 generic_ops.get_next_variable = efi.get_next_variable;179 generic_ops.get_next_variable = efi.get_next_variable;
182 generic_ops.query_variable_store = efi_query_variable_store;180 generic_ops.query_variable_store = efi_query_variable_store;
183 181
182 if (efi_rt_services_supported(EFI_RT_SUPPORTED_SET_VARIABLE)) {
183 generic_ops.set_variable = efi.set_variable;
184 generic_ops.set_variable_nonblocking = efi.set_variable_nonblocking;
185 }
184 return efivars_register(&generic_efivars, &generic_ops, efi_kobj);186 return efivars_register(&generic_efivars, &generic_ops, efi_kobj);
185}187}
186 188
@@ -382,7 +384,8 @@ static int __init efisubsys_init(void) · 195 unmodified lines
382 return -ENOMEM;384 return -ENOMEM;
383 }385 }
384 386
385 if (efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES)) {387 if (efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE |
388 EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME)) {
386 efivar_ssdt_load();389 efivar_ssdt_load();
387 error = generic_ops_register();390 error = generic_ops_register();
388 if (error)391 if (error)
@@ -416,7 +419,8 @@ static int __init efisubsys_init(void) · 27 unmodified lines
416err_remove_group:419err_remove_group:
417 sysfs_remove_group(efi_kobj, &efi_subsys_attr_group);420 sysfs_remove_group(efi_kobj, &efi_subsys_attr_group);
418err_unregister:421err_unregister:
419 if (efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))422 if (efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE |
423 EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME))
420 generic_ops_unregister();424 generic_ops_unregister();
421err_put:425err_put:
422 kobject_put(efi_kobj);426 kobject_put(efi_kobj);
drivers/firmware/efi/efivars.c+1−4
@@ -680,11 +680,8 @@ int efivars_sysfs_init(void) · 679 unmodified lines
680 struct kobject *parent_kobj = efivars_kobject();680 struct kobject *parent_kobj = efivars_kobject();
681 int error = 0;681 int error = 0;
682 682
683 if (!efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))
684 return -ENODEV;
685
686 /* No efivars has been registered yet */683 /* No efivars has been registered yet */
687 if (!parent_kobj)684 if (!parent_kobj || !efivar_supports_writes())
688 return 0;685 return 0;
689 686
690 printk(KERN_INFO "EFI Variables Facility v%s %s\n", EFIVARS_VERSION,687 printk(KERN_INFO "EFI Variables Facility v%s %s\n", EFIVARS_VERSION,
drivers/firmware/efi/libstub/Makefile+1−2
@@ -6,8 +6,7 @@ · 5 unmodified lines
6# enabled, even if doing so doesn't break the build.6# enabled, even if doing so doesn't break the build.
7#7#
8cflags-$(CONFIG_X86_32) := -march=i3868cflags-$(CONFIG_X86_32) := -march=i386
9cflags-$(CONFIG_X86_64) := -mcmodel=small \9cflags-$(CONFIG_X86_64) := -mcmodel=small
10 $(call cc-option,-maccumulate-outgoing-args)
11cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \10cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \
12 -fPIC -fno-strict-aliasing -mno-red-zone \11 -fPIC -fno-strict-aliasing -mno-red-zone \
13 -mno-mmx -mno-sse -fshort-wchar \12 -mno-mmx -mno-sse -fshort-wchar \
drivers/firmware/efi/libstub/alignedmem.c+1−1
@@ -44,7 +44,7 @@ efi_status_t efi_allocate_pages_aligned(unsigned long size, unsigned long *addr, · 43 unmodified lines
44 *addr = ALIGN((unsigned long)alloc_addr, align);44 *addr = ALIGN((unsigned long)alloc_addr, align);
45 45
46 if (slack > 0) {46 if (slack > 0) {
47 int l = (alloc_addr % align) / EFI_PAGE_SIZE;47 int l = (alloc_addr & (align - 1)) / EFI_PAGE_SIZE;
48 48
49 if (l) {49 if (l) {
50 efi_bs_call(free_pages, alloc_addr, slack - l + 1);50 efi_bs_call(free_pages, alloc_addr, slack - l + 1);
drivers/firmware/efi/libstub/arm64-stub.c+14−11
@@ -35,13 +35,16 @@ efi_status_t check_platform_features(void) · 34 unmodified lines
35}35}
36 36
37/*37/*
38 * Relocatable kernels can fix up the misalignment with respect to38 * Although relocatable kernels can fix up the misalignment with respect to
39 * MIN_KIMG_ALIGN, so they only require a minimum alignment of EFI_KIMG_ALIGN39 * MIN_KIMG_ALIGN, the resulting virtual text addresses are subtly out of
40 * (which accounts for the alignment of statically allocated objects such as40 * sync with those recorded in the vmlinux when kaslr is disabled but the
41 * the swapper stack.)41 * image required relocation anyway. Therefore retain 2M alignment unless
42 * KASLR is in use.
42 */43 */
43static const u64 min_kimg_align = IS_ENABLED(CONFIG_RELOCATABLE) ? EFI_KIMG_ALIGN44static u64 min_kimg_align(void)
44 : MIN_KIMG_ALIGN;45{
46 return efi_nokaslr ? MIN_KIMG_ALIGN : EFI_KIMG_ALIGN;
47}
45 48
46efi_status_t handle_kernel_image(unsigned long *image_addr,49efi_status_t handle_kernel_image(unsigned long *image_addr,
47 unsigned long *image_size,50 unsigned long *image_size,
@@ -74,21 +77,21 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 26 unmodified lines
74 77
75 kernel_size = _edata - _text;78 kernel_size = _edata - _text;
76 kernel_memsize = kernel_size + (_end - _edata);79 kernel_memsize = kernel_size + (_end - _edata);
77 *reserve_size = kernel_memsize + TEXT_OFFSET % min_kimg_align;80 *reserve_size = kernel_memsize + TEXT_OFFSET % min_kimg_align();
78 81
79 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && phys_seed != 0) {82 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && phys_seed != 0) {
80 /*83 /*
81 * If KASLR is enabled, and we have some randomness available,84 * If KASLR is enabled, and we have some randomness available,
82 * locate the kernel at a randomized offset in physical memory.85 * locate the kernel at a randomized offset in physical memory.
83 */86 */
84 status = efi_random_alloc(*reserve_size, min_kimg_align,87 status = efi_random_alloc(*reserve_size, min_kimg_align(),
85 reserve_addr, phys_seed);88 reserve_addr, phys_seed);
86 } else {89 } else {
87 status = EFI_OUT_OF_RESOURCES;90 status = EFI_OUT_OF_RESOURCES;
88 }91 }
89 92
90 if (status != EFI_SUCCESS) {93 if (status != EFI_SUCCESS) {
91 if (IS_ALIGNED((u64)_text - TEXT_OFFSET, min_kimg_align)) {94 if (IS_ALIGNED((u64)_text - TEXT_OFFSET, min_kimg_align())) {
92 /*95 /*
93 * Just execute from wherever we were loaded by the96 * Just execute from wherever we were loaded by the
94 * UEFI PE/COFF loader if the alignment is suitable.97 * UEFI PE/COFF loader if the alignment is suitable.
@@ -99,7 +102,7 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 4 unmodified lines
99 }102 }
100 103
101 status = efi_allocate_pages_aligned(*reserve_size, reserve_addr,104 status = efi_allocate_pages_aligned(*reserve_size, reserve_addr,
102 ULONG_MAX, min_kimg_align);105 ULONG_MAX, min_kimg_align());
103 106
104 if (status != EFI_SUCCESS) {107 if (status != EFI_SUCCESS) {
105 efi_err("Failed to relocate kernel\n");108 efi_err("Failed to relocate kernel\n");
@@ -108,7 +111,7 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 2 unmodified lines
108 }111 }
109 }112 }
110 113
111 *image_addr = *reserve_addr + TEXT_OFFSET % min_kimg_align;114 *image_addr = *reserve_addr + TEXT_OFFSET % min_kimg_align();
112 memcpy((void *)*image_addr, _text, kernel_size);115 memcpy((void *)*image_addr, _text, kernel_size);
113 116
114 return EFI_SUCCESS;117 return EFI_SUCCESS;
drivers/firmware/efi/libstub/efi-stub-helper.c+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
19#include "efistub.h"19#include "efistub.h"
20 20
21bool efi_nochunk;21bool efi_nochunk;
22bool efi_nokaslr;22bool efi_nokaslr = !IS_ENABLED(CONFIG_RANDOMIZE_BASE);
23bool efi_noinitrd;23bool efi_noinitrd;
24int efi_loglevel = CONSOLE_LOGLEVEL_DEFAULT;24int efi_loglevel = CONSOLE_LOGLEVEL_DEFAULT;
25bool efi_novamap;25bool efi_novamap;
drivers/firmware/efi/libstub/efi-stub.c+0−17
@@ -121,23 +121,6 @@ static unsigned long get_dram_base(void) · 120 unmodified lines
121 return membase;121 return membase;
122}122}
123 123
124/*
125 * This function handles the architcture specific differences between arm and
126 * arm64 regarding where the kernel image must be loaded and any memory that
127 * must be reserved. On failure it is required to free all
128 * all allocations it has made.
129 */
130efi_status_t handle_kernel_image(unsigned long *image_addr,
131 unsigned long *image_size,
132 unsigned long *reserve_addr,
133 unsigned long *reserve_size,
134 unsigned long dram_base,
135 efi_loaded_image_t *image);
136
137asmlinkage void __noreturn efi_enter_kernel(unsigned long entrypoint,
138 unsigned long fdt_addr,
139 unsigned long fdt_size);
140
141/*124/*
142 * EFI entry point for the arm/arm64 EFI stubs. This is the entrypoint125 * EFI entry point for the arm/arm64 EFI stubs. This is the entrypoint
143 * that is described in the PE/COFF header. Most of the code is the same126 * that is described in the PE/COFF header. Most of the code is the same
drivers/firmware/efi/libstub/efistub.h+16−0
@@ -776,6 +776,22 @@ efi_status_t efi_load_initrd(efi_loaded_image_t *image, · 775 unmodified lines
776 unsigned long *load_size,776 unsigned long *load_size,
777 unsigned long soft_limit,777 unsigned long soft_limit,
778 unsigned long hard_limit);778 unsigned long hard_limit);
779/*
780 * This function handles the architcture specific differences between arm and
781 * arm64 regarding where the kernel image must be loaded and any memory that
782 * must be reserved. On failure it is required to free all
783 * all allocations it has made.
784 */
785efi_status_t handle_kernel_image(unsigned long *image_addr,
786 unsigned long *image_size,
787 unsigned long *reserve_addr,
788 unsigned long *reserve_size,
789 unsigned long dram_base,
790 efi_loaded_image_t *image);
791
792asmlinkage void __noreturn efi_enter_kernel(unsigned long entrypoint,
793 unsigned long fdt_addr,
794 unsigned long fdt_size);
779 795
780void efi_handle_post_ebs_state(void);796void efi_handle_post_ebs_state(void);
781 797
drivers/firmware/efi/libstub/x86-stub.c+4−4
@@ -8,6 +8,7 @@ · 7 unmodified lines
8 8
9#include <linux/efi.h>9#include <linux/efi.h>
10#include <linux/pci.h>10#include <linux/pci.h>
11#include <linux/stddef.h>
11 12
12#include <asm/efi.h>13#include <asm/efi.h>
13#include <asm/e820/types.h>14#include <asm/e820/types.h>
@@ -361,8 +362,6 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, · 347 unmodified lines
361 int options_size = 0;362 int options_size = 0;
362 efi_status_t status;363 efi_status_t status;
363 char *cmdline_ptr;364 char *cmdline_ptr;
364 unsigned long ramdisk_addr;
365 unsigned long ramdisk_size;
366 365
367 efi_system_table = sys_table_arg;366 efi_system_table = sys_table_arg;
368 367
@@ -390,8 +389,9 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, · 21 unmodified lines
390 389
391 hdr = &boot_params->hdr;390 hdr = &boot_params->hdr;
392 391
393 /* Copy the second sector to boot_params */392 /* Copy the setup header from the second sector to boot_params */
394 memcpy(&hdr->jump, image_base + 512, 512);393 memcpy(&hdr->jump, image_base + 512,
394 sizeof(struct setup_header) - offsetof(struct setup_header, jump));
395 395
396 /*396 /*
397 * Fill out some of the header fields ourselves because the397 * Fill out some of the header fields ourselves because the
drivers/firmware/efi/vars.c+6−0
@@ -1229,3 +1229,9 @@ out: · 1228 unmodified lines
1229 return rv;1229 return rv;
1230}1230}
1231EXPORT_SYMBOL_GPL(efivars_unregister);1231EXPORT_SYMBOL_GPL(efivars_unregister);
1232
1233int efivar_supports_writes(void)
1234{
1235 return __efivars && __efivars->ops->set_variable;
1236}
1237EXPORT_SYMBOL_GPL(efivar_supports_writes);
drivers/firmware/psci/psci_checker.c+5−3
@@ -157,8 +157,10 @@ static int alloc_init_cpu_groups(cpumask_var_t **pcpu_groups) · 156 unmodified lines
157 157
158 cpu_groups = kcalloc(nb_available_cpus, sizeof(cpu_groups),158 cpu_groups = kcalloc(nb_available_cpus, sizeof(cpu_groups),
159 GFP_KERNEL);159 GFP_KERNEL);
160 if (!cpu_groups)160 if (!cpu_groups) {
161 free_cpumask_var(tmp);
161 return -ENOMEM;162 return -ENOMEM;
163 }
162 164
163 cpumask_copy(tmp, cpu_online_mask);165 cpumask_copy(tmp, cpu_online_mask);
164 166
@@ -167,6 +169,7 @@ static int alloc_init_cpu_groups(cpumask_var_t **pcpu_groups) · 2 unmodified lines
167 topology_core_cpumask(cpumask_any(tmp));169 topology_core_cpumask(cpumask_any(tmp));
168 170
169 if (!alloc_cpumask_var(&cpu_groups[num_groups], GFP_KERNEL)) {171 if (!alloc_cpumask_var(&cpu_groups[num_groups], GFP_KERNEL)) {
172 free_cpumask_var(tmp);
170 free_cpu_groups(num_groups, &cpu_groups);173 free_cpu_groups(num_groups, &cpu_groups);
171 return -ENOMEM;174 return -ENOMEM;
172 }175 }
@@ -196,13 +199,12 @@ static int hotplug_tests(void) · 23 unmodified lines
196 if (!page_buf)199 if (!page_buf)
197 goto out_free_cpu_groups;200 goto out_free_cpu_groups;
198 201
199 err = 0;
200 /*202 /*
201 * Of course the last CPU cannot be powered down and cpu_down() should203 * Of course the last CPU cannot be powered down and cpu_down() should
202 * refuse doing that.204 * refuse doing that.
203 */205 */
204 pr_info("Trying to turn off and on again all CPUs\n");206 pr_info("Trying to turn off and on again all CPUs\n");
205 err += down_and_up_cpus(cpu_online_mask, offlined_cpus);207 err = down_and_up_cpus(cpu_online_mask, offlined_cpus);
206 208
207 /*209 /*
208 * Take down CPUs by cpu group this time. When the last CPU is turned210 * Take down CPUs by cpu group this time. When the last CPU is turned
drivers/firmware/qemu_fw_cfg.c+4−3
@@ -605,8 +605,10 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f) · 604 unmodified lines
605 /* register entry under "/sys/firmware/qemu_fw_cfg/by_key/" */605 /* register entry under "/sys/firmware/qemu_fw_cfg/by_key/" */
606 err = kobject_init_and_add(&entry->kobj, &fw_cfg_sysfs_entry_ktype,606 err = kobject_init_and_add(&entry->kobj, &fw_cfg_sysfs_entry_ktype,
607 fw_cfg_sel_ko, "%d", entry->select);607 fw_cfg_sel_ko, "%d", entry->select);
608 if (err)608 if (err) {
609 goto err_register;609 kobject_put(&entry->kobj);
610 return err;
611 }
610 612
611 /* add raw binary content access */613 /* add raw binary content access */
612 err = sysfs_create_bin_file(&entry->kobj, &fw_cfg_sysfs_attr_raw);614 err = sysfs_create_bin_file(&entry->kobj, &fw_cfg_sysfs_attr_raw);
@@ -622,7 +624,6 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f) · 9 unmodified lines
622 624
623err_add_raw:625err_add_raw:
624 kobject_del(&entry->kobj);626 kobject_del(&entry->kobj);
625err_register:
626 kfree(entry);627 kfree(entry);
627 return err;628 return err;
628}629}
drivers/fpga/dfl-afu-main.c+2−1
@@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev) · 82 unmodified lines
83 * on this port and minimum soft reset pulse width has elapsed.83 * on this port and minimum soft reset pulse width has elapsed.
84 * Driver polls port_soft_reset_ack to determine if reset done by HW.84 * Driver polls port_soft_reset_ack to determine if reset done by HW.
85 */85 */
86 if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,86 if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
87 v & PORT_CTRL_SFTRST_ACK,
87 RST_POLL_INVL, RST_POLL_TIMEOUT)) {88 RST_POLL_INVL, RST_POLL_TIMEOUT)) {
88 dev_err(&pdev->dev, "timeout, fail to reset device\n");89 dev_err(&pdev->dev, "timeout, fail to reset device\n");
89 return -ETIMEDOUT;90 return -ETIMEDOUT;
drivers/fpga/dfl-pci.c+2−1
@@ -227,7 +227,6 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) · 226 unmodified lines
227{227{
228 struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);228 struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
229 struct dfl_fpga_cdev *cdev = drvdata->cdev;229 struct dfl_fpga_cdev *cdev = drvdata->cdev;
230 int ret = 0;
231 230
232 if (!num_vfs) {231 if (!num_vfs) {
233 /*232 /*
@@ -239,6 +238,8 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) · 5 unmodified lines
239 dfl_fpga_cdev_config_ports_pf(cdev);238 dfl_fpga_cdev_config_ports_pf(cdev);
240 239
241 } else {240 } else {
241 int ret;
242
242 /*243 /*
243 * before enable SRIOV, put released ports into VF access mode244 * before enable SRIOV, put released ports into VF access mode
244 * first of all.245 * first of all.
drivers/gpio/gpio-arizona.c+6−1
@@ -64,6 +64,7 @@ static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) · 63 unmodified lines
64 ret = pm_runtime_get_sync(chip->parent);64 ret = pm_runtime_get_sync(chip->parent);
65 if (ret < 0) {65 if (ret < 0) {
66 dev_err(chip->parent, "Failed to resume: %d\n", ret);66 dev_err(chip->parent, "Failed to resume: %d\n", ret);
67 pm_runtime_put_autosuspend(chip->parent);
67 return ret;68 return ret;
68 }69 }
69 70
@@ -72,12 +73,15 @@ static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) · 2 unmodified lines
72 if (ret < 0) {73 if (ret < 0) {
73 dev_err(chip->parent, "Failed to drop cache: %d\n",74 dev_err(chip->parent, "Failed to drop cache: %d\n",
74 ret);75 ret);
76 pm_runtime_put_autosuspend(chip->parent);
75 return ret;77 return ret;
76 }78 }
77 79
78 ret = regmap_read(arizona->regmap, reg, &val);80 ret = regmap_read(arizona->regmap, reg, &val);
79 if (ret < 0)81 if (ret < 0) {
82 pm_runtime_put_autosuspend(chip->parent);
80 return ret;83 return ret;
84 }
81 85
82 pm_runtime_mark_last_busy(chip->parent);86 pm_runtime_mark_last_busy(chip->parent);
83 pm_runtime_put_autosuspend(chip->parent);87 pm_runtime_put_autosuspend(chip->parent);
@@ -106,6 +110,7 @@ static int arizona_gpio_direction_out(struct gpio_chip *chip, · 22 unmodified lines
106 ret = pm_runtime_get_sync(chip->parent);110 ret = pm_runtime_get_sync(chip->parent);
107 if (ret < 0) {111 if (ret < 0) {
108 dev_err(chip->parent, "Failed to resume: %d\n", ret);112 dev_err(chip->parent, "Failed to resume: %d\n", ret);
113 pm_runtime_put(chip->parent);
109 return ret;114 return ret;
110 }115 }
111 }116 }
drivers/gpio/gpio-pca953x.c+94−5
@@ -107,6 +107,84 @@ static const struct i2c_device_id pca953x_id[] = { · 106 unmodified lines
107};107};
108MODULE_DEVICE_TABLE(i2c, pca953x_id);108MODULE_DEVICE_TABLE(i2c, pca953x_id);
109 109
110#ifdef CONFIG_GPIO_PCA953X_IRQ
111
112#include <linux/dmi.h>
113#include <linux/gpio.h>
114#include <linux/list.h>
115
116static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
117 {
118 /*
119 * On Intel Galileo Gen 2 board the IRQ pin of one of
120 * the I²C GPIO expanders, which has GpioInt() resource,
121 * is provided as an absolute number instead of being
122 * relative. Since first controller (gpio-sch.c) and
123 * second (gpio-dwapb.c) are at the fixed bases, we may
124 * safely refer to the number in the global space to get
125 * an IRQ out of it.
126 */
127 .matches = {
128 DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
129 },
130 },
131 {}
132};
133
134#ifdef CONFIG_ACPI
135static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data)
136{
137 struct acpi_resource_gpio *agpio;
138 int *pin = data;
139
140 if (acpi_gpio_get_irq_resource(ares, &agpio))
141 *pin = agpio->pin_table[0];
142 return 1;
143}
144
145static int pca953x_acpi_find_pin(struct device *dev)
146{
147 struct acpi_device *adev = ACPI_COMPANION(dev);
148 int pin = -ENOENT, ret;
149 LIST_HEAD(r);
150
151 ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin);
152 acpi_dev_free_resource_list(&r);
153 if (ret < 0)
154 return ret;
155
156 return pin;
157}
158#else
159static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; }
160#endif
161
162static int pca953x_acpi_get_irq(struct device *dev)
163{
164 int pin, ret;
165
166 pin = pca953x_acpi_find_pin(dev);
167 if (pin < 0)
168 return pin;
169
170 dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin);
171
172 if (!gpio_is_valid(pin))
173 return -EINVAL;
174
175 ret = gpio_request(pin, "pca953x interrupt");
176 if (ret)
177 return ret;
178
179 ret = gpio_to_irq(pin);
180
181 /* When pin is used as an IRQ, no need to keep it requested */
182 gpio_free(pin);
183
184 return ret;
185}
186#endif
187
110static const struct acpi_device_id pca953x_acpi_ids[] = {188static const struct acpi_device_id pca953x_acpi_ids[] = {
111 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },189 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
112 { }190 { }
@@ -322,6 +400,7 @@ static const struct regmap_config pca953x_ai_i2c_regmap = { · 209 unmodified lines
322 .writeable_reg = pca953x_writeable_register,400 .writeable_reg = pca953x_writeable_register,
323 .volatile_reg = pca953x_volatile_register,401 .volatile_reg = pca953x_volatile_register,
324 402
403 .disable_locking = true,
325 .cache_type = REGCACHE_RBTREE,404 .cache_type = REGCACHE_RBTREE,
326 .max_register = 0x7f,405 .max_register = 0x7f,
327};406};
@@ -623,8 +702,6 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) · 295 unmodified lines
623 DECLARE_BITMAP(reg_direction, MAX_LINE);702 DECLARE_BITMAP(reg_direction, MAX_LINE);
624 int level;703 int level;
625 704
626 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
627
628 if (chip->driver_data & PCA_PCAL) {705 if (chip->driver_data & PCA_PCAL) {
629 /* Enable latch on interrupt-enabled inputs */706 /* Enable latch on interrupt-enabled inputs */
630 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);707 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
@@ -635,7 +712,11 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) · 4 unmodified lines
635 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);712 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
636 }713 }
637 714
715 /* Switch direction to input if needed */
716 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
717
638 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);718 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
719 bitmap_complement(reg_direction, reg_direction, gc->ngpio);
639 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);720 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
640 721
641 /* Look for any newly setup interrupt */722 /* Look for any newly setup interrupt */
@@ -734,14 +815,16 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid) · 92 unmodified lines
734 struct gpio_chip *gc = &chip->gpio_chip;815 struct gpio_chip *gc = &chip->gpio_chip;
735 DECLARE_BITMAP(pending, MAX_LINE);816 DECLARE_BITMAP(pending, MAX_LINE);
736 int level;817 int level;
818 bool ret;
737 819
738 if (!pca953x_irq_pending(chip, pending))820 mutex_lock(&chip->i2c_lock);
739 return IRQ_NONE;821 ret = pca953x_irq_pending(chip, pending);
822 mutex_unlock(&chip->i2c_lock);
740 823
741 for_each_set_bit(level, pending, gc->ngpio)824 for_each_set_bit(level, pending, gc->ngpio)
742 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));825 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
743 826
744 return IRQ_HANDLED;827 return IRQ_RETVAL(ret);
745}828}
746 829
747static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)830static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
@@ -752,6 +835,12 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) · 4 unmodified lines
752 DECLARE_BITMAP(irq_stat, MAX_LINE);835 DECLARE_BITMAP(irq_stat, MAX_LINE);
753 int ret;836 int ret;
754 837
838 if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
839 ret = pca953x_acpi_get_irq(&client->dev);
840 if (ret > 0)
841 client->irq = ret;
842 }
843
755 if (!client->irq)844 if (!client->irq)
756 return 0;845 return 0;
757 846
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+15−5
@@ -1295,27 +1295,37 @@ static void amdgpu_ib_preempt_job_recovery(struct drm_gpu_scheduler *sched) · 1294 unmodified lines
1295static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring)1295static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring)
1296{1296{
1297 struct amdgpu_job *job;1297 struct amdgpu_job *job;
1298 struct drm_sched_job *s_job;1298 struct drm_sched_job *s_job, *tmp;
1299 uint32_t preempt_seq;1299 uint32_t preempt_seq;
1300 struct dma_fence *fence, **ptr;1300 struct dma_fence *fence, **ptr;
1301 struct amdgpu_fence_driver *drv = &ring->fence_drv;1301 struct amdgpu_fence_driver *drv = &ring->fence_drv;
1302 struct drm_gpu_scheduler *sched = &ring->sched;1302 struct drm_gpu_scheduler *sched = &ring->sched;
1303 bool preempted = true;
1303 1304
1304 if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)1305 if (ring->funcs->type != AMDGPU_RING_TYPE_GFX)
1305 return;1306 return;
1306 1307
1307 preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2));1308 preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2));
1308 if (preempt_seq <= atomic_read(&drv->last_seq))1309 if (preempt_seq <= atomic_read(&drv->last_seq)) {
1309 return;1310 preempted = false;
1311 goto no_preempt;
1312 }
1310 1313
1311 preempt_seq &= drv->num_fences_mask;1314 preempt_seq &= drv->num_fences_mask;
1312 ptr = &drv->fences[preempt_seq];1315 ptr = &drv->fences[preempt_seq];
1313 fence = rcu_dereference_protected(*ptr, 1);1316 fence = rcu_dereference_protected(*ptr, 1);
1314 1317
1318no_preempt:
1315 spin_lock(&sched->job_list_lock);1319 spin_lock(&sched->job_list_lock);
1316 list_for_each_entry(s_job, &sched->ring_mirror_list, node) {1320 list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
1321 if (dma_fence_is_signaled(&s_job->s_fence->finished)) {
1322 /* remove job from ring_mirror_list */
1323 list_del_init(&s_job->node);
1324 sched->ops->free_job(s_job);
1325 continue;
1326 }
1317 job = to_amdgpu_job(s_job);1327 job = to_amdgpu_job(s_job);
1318 if (job->fence == fence)1328 if (preempted && job->fence == fence)
1319 /* mark the job as preempted */1329 /* mark the job as preempted */
1320 job->preemption_status |= AMDGPU_IB_PREEMPTED;1330 job->preemption_status |= AMDGPU_IB_PREEMPTED;
1321 }1331 }
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c+2−1
@@ -37,7 +37,8 @@ static void amdgpu_job_timedout(struct drm_sched_job *s_job) · 36 unmodified lines
37 37
38 memset(&ti, 0, sizeof(struct amdgpu_task_info));38 memset(&ti, 0, sizeof(struct amdgpu_task_info));
39 39
40 if (amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {40 if (amdgpu_gpu_recovery &&
41 amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) {
41 DRM_ERROR("ring %s timeout, but soft recovered\n",42 DRM_ERROR("ring %s timeout, but soft recovered\n",
42 s_job->sched->name);43 s_job->sched->name);
43 return;44 return;
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+2−1
@@ -692,9 +692,10 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 691 unmodified lines
692 return n ? -EFAULT : 0;692 return n ? -EFAULT : 0;
693 }693 }
694 case AMDGPU_INFO_DEV_INFO: {694 case AMDGPU_INFO_DEV_INFO: {
695 struct drm_amdgpu_info_device dev_info = {};695 struct drm_amdgpu_info_device dev_info;
696 uint64_t vm_size;696 uint64_t vm_size;
697 697
698 memset(&dev_info, 0, sizeof(dev_info));
698 dev_info.device_id = dev->pdev->device;699 dev_info.device_id = dev->pdev->device;
699 dev_info.chip_rev = adev->rev_id;700 dev_info.chip_rev = adev->rev_id;
700 dev_info.external_rev = adev->external_rev_id;701 dev_info.external_rev = adev->external_rev_id;
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+59−4
@@ -372,6 +372,52 @@ static int psp_tmr_load(struct psp_context *psp) · 371 unmodified lines
372 return ret;372 return ret;
373}373}
374 374
375static void psp_prep_tmr_unload_cmd_buf(struct psp_context *psp,
376 struct psp_gfx_cmd_resp *cmd)
377{
378 if (amdgpu_sriov_vf(psp->adev))
379 cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR;
380 else
381 cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR;
382}
383
384static int psp_tmr_unload(struct psp_context *psp)
385{
386 int ret;
387 struct psp_gfx_cmd_resp *cmd;
388
389 cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
390 if (!cmd)
391 return -ENOMEM;
392
393 psp_prep_tmr_unload_cmd_buf(psp, cmd);
394 DRM_INFO("free PSP TMR buffer\n");
395
396 ret = psp_cmd_submit_buf(psp, NULL, cmd,
397 psp->fence_buf_mc_addr);
398
399 kfree(cmd);
400
401 return ret;
402}
403
404static int psp_tmr_terminate(struct psp_context *psp)
405{
406 int ret;
407 void *tmr_buf;
408 void **pptr;
409
410 ret = psp_tmr_unload(psp);
411 if (ret)
412 return ret;
413
414 /* free TMR memory buffer */
415 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
416 amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
417
418 return 0;
419}
420
375static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,421static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd,
376 uint64_t asd_mc, uint32_t size)422 uint64_t asd_mc, uint32_t size)
377{423{
@@ -1779,8 +1825,6 @@ static int psp_hw_fini(void *handle) · 1401 unmodified lines
1779{1825{
1780 struct amdgpu_device *adev = (struct amdgpu_device *)handle;1826 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
1781 struct psp_context *psp = &adev->psp;1827 struct psp_context *psp = &adev->psp;
1782 void *tmr_buf;
1783 void **pptr;
1784 1828
1785 if (psp->adev->psp.ta_fw) {1829 if (psp->adev->psp.ta_fw) {
1786 psp_ras_terminate(psp);1830 psp_ras_terminate(psp);
@@ -1790,10 +1834,9 @@ static int psp_hw_fini(void *handle) · 3 unmodified lines
1790 1834
1791 psp_asd_unload(psp);1835 psp_asd_unload(psp);
1792 1836
1837 psp_tmr_terminate(psp);
1793 psp_ring_destroy(psp, PSP_RING_TYPE__KM);1838 psp_ring_destroy(psp, PSP_RING_TYPE__KM);
1794 1839
1795 pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
1796 amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
1797 amdgpu_bo_free_kernel(&psp->fw_pri_bo,1840 amdgpu_bo_free_kernel(&psp->fw_pri_bo,
1798 &psp->fw_pri_mc_addr, &psp->fw_pri_buf);1841 &psp->fw_pri_mc_addr, &psp->fw_pri_buf);
1799 amdgpu_bo_free_kernel(&psp->fence_buf_bo,1842 amdgpu_bo_free_kernel(&psp->fence_buf_bo,
@@ -1840,6 +1883,18 @@ static int psp_suspend(void *handle) · 40 unmodified lines
1840 }1883 }
1841 }1884 }
1842 1885
1886 ret = psp_asd_unload(psp);
1887 if (ret) {
1888 DRM_ERROR("Failed to unload asd\n");
1889 return ret;
1890 }
1891
1892 ret = psp_tmr_terminate(psp);
1893 if (ret) {
1894 DRM_ERROR("Falied to terminate tmr\n");
1895 return ret;
1896 }
1897
1843 ret = psp_ring_stop(psp, PSP_RING_TYPE__KM);1898 ret = psp_ring_stop(psp, PSP_RING_TYPE__KM);
1844 if (ret) {1899 if (ret) {
1845 DRM_ERROR("PSP ring stop failed\n");1900 DRM_ERROR("PSP ring stop failed\n");
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+8−1
@@ -7513,12 +7513,17 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring) · 7512 unmodified lines
7513 struct amdgpu_device *adev = ring->adev;7513 struct amdgpu_device *adev = ring->adev;
7514 struct amdgpu_kiq *kiq = &adev->gfx.kiq;7514 struct amdgpu_kiq *kiq = &adev->gfx.kiq;
7515 struct amdgpu_ring *kiq_ring = &kiq->ring;7515 struct amdgpu_ring *kiq_ring = &kiq->ring;
7516 unsigned long flags;
7516 7517
7517 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)7518 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
7518 return -EINVAL;7519 return -EINVAL;
7519 7520
7520 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size))7521 spin_lock_irqsave(&kiq->ring_lock, flags);
7522
7523 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) {
7524 spin_unlock_irqrestore(&kiq->ring_lock, flags);
7521 return -ENOMEM;7525 return -ENOMEM;
7526 }
7522 7527
7523 /* assert preemption condition */7528 /* assert preemption condition */
7524 amdgpu_ring_set_preempt_cond_exec(ring, false);7529 amdgpu_ring_set_preempt_cond_exec(ring, false);
@@ -7529,6 +7534,8 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring) · 4 unmodified lines
7529 ++ring->trail_seq);7534 ++ring->trail_seq);
7530 amdgpu_ring_commit(kiq_ring);7535 amdgpu_ring_commit(kiq_ring);
7531 7536
7537 spin_unlock_irqrestore(&kiq->ring_lock, flags);
7538
7532 /* poll the trailing fence */7539 /* poll the trailing fence */
7533 for (i = 0; i < adev->usec_timeout; i++) {7540 for (i = 0; i < adev->usec_timeout; i++) {
7534 if (ring->trail_seq ==7541 if (ring->trail_seq ==
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c+8−18
@@ -314,30 +314,20 @@ static uint64_t sdma_v5_0_ring_get_rptr(struct amdgpu_ring *ring) · 313 unmodified lines
314static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring)314static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring)
315{315{
316 struct amdgpu_device *adev = ring->adev;316 struct amdgpu_device *adev = ring->adev;
317 u64 *wptr = NULL;317 u64 wptr;
318 uint64_t local_wptr = 0;
319 318
320 if (ring->use_doorbell) {319 if (ring->use_doorbell) {
321 /* XXX check if swapping is necessary on BE */320 /* XXX check if swapping is necessary on BE */
322 wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]);321 wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs]));
323 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr);322 DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr);
324 *wptr = (*wptr) >> 2;
325 DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr);
326 } else {323 } else {
327 u32 lowbit, highbit;324 wptr = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI));
328 325 wptr = wptr << 32;
329 wptr = &local_wptr;326 wptr |= RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR));
330 lowbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)) >> 2;327 DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr);
331 highbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2;
332
333 DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n",
334 ring->me, highbit, lowbit);
335 *wptr = highbit;
336 *wptr = (*wptr) << 32;
337 *wptr |= lowbit;
338 }328 }
339 329
340 return *wptr;330 return wptr >> 2;
341}331}
342 332
343/**333/**
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+42−10
@@ -974,6 +974,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) · 973 unmodified lines
974 /* Update the actual used number of crtc */974 /* Update the actual used number of crtc */
975 adev->mode_info.num_crtc = adev->dm.display_indexes_num;975 adev->mode_info.num_crtc = adev->dm.display_indexes_num;
976 976
977 /* create fake encoders for MST */
978 dm_dp_create_fake_mst_encoders(adev);
979
977 /* TODO: Add_display_info? */980 /* TODO: Add_display_info? */
978 981
979 /* TODO use dynamic cursor width */982 /* TODO use dynamic cursor width */
@@ -997,6 +1000,12 @@ error: · 17 unmodified lines
997 1000
998static void amdgpu_dm_fini(struct amdgpu_device *adev)1001static void amdgpu_dm_fini(struct amdgpu_device *adev)
999{1002{
1003 int i;
1004
1005 for (i = 0; i < adev->dm.display_indexes_num; i++) {
1006 drm_encoder_cleanup(&adev->dm.mst_encoders[i].base);
1007 }
1008
1000 amdgpu_dm_audio_fini(adev);1009 amdgpu_dm_audio_fini(adev);
1001 1010
1002 amdgpu_dm_destroy_drm_device(&adev->dm);1011 amdgpu_dm_destroy_drm_device(&adev->dm);
@@ -1358,7 +1367,7 @@ static int dm_late_init(void *handle) · 355 unmodified lines
1358 struct dmcu *dmcu = NULL;1367 struct dmcu *dmcu = NULL;
1359 bool ret;1368 bool ret;
1360 1369
1361 if (!adev->dm.fw_dmcu)1370 if (!adev->dm.fw_dmcu && !adev->dm.dmub_fw)
1362 return detect_mst_link_for_all_connectors(adev->ddev);1371 return detect_mst_link_for_all_connectors(adev->ddev);
1363 1372
1364 dmcu = adev->dm.dc->res_pool->dmcu;1373 dmcu = adev->dm.dc->res_pool->dmcu;
@@ -2010,6 +2019,7 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) · 645 unmodified lines
2010 struct amdgpu_display_manager *dm;2019 struct amdgpu_display_manager *dm;
2011 struct drm_connector *conn_base;2020 struct drm_connector *conn_base;
2012 struct amdgpu_device *adev;2021 struct amdgpu_device *adev;
2022 struct dc_link *link = NULL;
2013 static const u8 pre_computed_values[] = {2023 static const u8 pre_computed_values[] = {
2014 50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,2024 50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
2015 71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};2025 71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
@@ -2017,6 +2027,10 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) · 1 unmodified line
2017 if (!aconnector || !aconnector->dc_link)2027 if (!aconnector || !aconnector->dc_link)
2018 return;2028 return;
2019 2029
2030 link = aconnector->dc_link;
2031 if (link->connector_signal != SIGNAL_TYPE_EDP)
2032 return;
2033
2020 conn_base = &aconnector->base;2034 conn_base = &aconnector->base;
2021 adev = conn_base->dev->dev_private;2035 adev = conn_base->dev->dev_private;
2022 dm = &adev->dm;2036 dm = &adev->dm;
@@ -8703,20 +8717,38 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, · 6680 unmodified lines
8703 * the same resource. If we have a new DC context as part of8717 * the same resource. If we have a new DC context as part of
8704 * the DM atomic state from validation we need to free it and8718 * the DM atomic state from validation we need to free it and
8705 * retain the existing one instead.8719 * retain the existing one instead.
8720 *
8721 * Furthermore, since the DM atomic state only contains the DC
8722 * context and can safely be annulled, we can free the state
8723 * and clear the associated private object now to free
8724 * some memory and avoid a possible use-after-free later.
8706 */8725 */
8707 struct dm_atomic_state *new_dm_state, *old_dm_state;
8708 8726
8709 new_dm_state = dm_atomic_get_new_state(state);8727 for (i = 0; i < state->num_private_objs; i++) {
8710 old_dm_state = dm_atomic_get_old_state(state);8728 struct drm_private_obj *obj = state->private_objs[i].ptr;
8711 8729
8712 if (new_dm_state && old_dm_state) {8730 if (obj->funcs == adev->dm.atomic_obj.funcs) {
8713 if (new_dm_state->context)8731 int j = state->num_private_objs-1;
8714 dc_release_state(new_dm_state->context);
8715 8732
8716 new_dm_state->context = old_dm_state->context;8733 dm_atomic_destroy_state(obj,
8734 state->private_objs[i].state);
8735
8736 /* If i is not at the end of the array then the
8737 * last element needs to be moved to where i was
8738 * before the array can safely be truncated.
8739 */
8740 if (i != j)
8741 state->private_objs[i] =
8742 state->private_objs[j];
8717 8743
8718 if (old_dm_state->context)8744 state->private_objs[j].ptr = NULL;
8719 dc_retain_state(old_dm_state->context);8745 state->private_objs[j].state = NULL;
8746 state->private_objs[j].old_state = NULL;
8747 state->private_objs[j].new_state = NULL;
8748
8749 state->num_private_objs = j;
8750 break;
8751 }
8720 }8752 }
8721 }8753 }
8722 8754
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h+10−1
@@ -43,6 +43,9 @@ · 42 unmodified lines
43 */43 */
44 44
45#define AMDGPU_DM_MAX_DISPLAY_INDEX 3145#define AMDGPU_DM_MAX_DISPLAY_INDEX 31
46
47#define AMDGPU_DM_MAX_CRTC 6
48
46/*49/*
47#include "include/amdgpu_dal_power_if.h"50#include "include/amdgpu_dal_power_if.h"
48#include "amdgpu_dm_irq.h"51#include "amdgpu_dm_irq.h"
@@ -328,6 +331,13 @@ struct amdgpu_display_manager { · 279 unmodified lines
328 * available in FW331 * available in FW
329 */332 */
330 const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box;333 const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box;
334
335 /**
336 * @mst_encoders:
337 *
338 * fake encoders used for DP MST.
339 */
340 struct amdgpu_encoder mst_encoders[AMDGPU_DM_MAX_CRTC];
331};341};
332 342
333struct amdgpu_dm_connector {343struct amdgpu_dm_connector {
@@ -356,7 +366,6 @@ struct amdgpu_dm_connector { · 22 unmodified lines
356 struct amdgpu_dm_dp_aux dm_dp_aux;366 struct amdgpu_dm_dp_aux dm_dp_aux;
357 struct drm_dp_mst_port *port;367 struct drm_dp_mst_port *port;
358 struct amdgpu_dm_connector *mst_port;368 struct amdgpu_dm_connector *mst_port;
359 struct amdgpu_encoder *mst_encoder;
360 struct drm_dp_aux *dsc_aux;369 struct drm_dp_aux *dsc_aux;
361 370
362 /* TODO see if we can merge with ddc_bus or make a dm_connector */371 /* TODO see if we can merge with ddc_bus or make a dm_connector */
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+26−27
@@ -95,7 +95,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector) · 94 unmodified lines
95{95{
96 struct amdgpu_dm_connector *aconnector =96 struct amdgpu_dm_connector *aconnector =
97 to_amdgpu_dm_connector(connector);97 to_amdgpu_dm_connector(connector);
98 struct amdgpu_encoder *amdgpu_encoder = aconnector->mst_encoder;
99 98
100 if (aconnector->dc_sink) {99 if (aconnector->dc_sink) {
101 dc_link_remove_remote_sink(aconnector->dc_link,100 dc_link_remove_remote_sink(aconnector->dc_link,
@@ -105,8 +104,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector) · 3 unmodified lines
105 104
106 kfree(aconnector->edid);105 kfree(aconnector->edid);
107 106
108 drm_encoder_cleanup(&amdgpu_encoder->base);
109 kfree(amdgpu_encoder);
110 drm_connector_cleanup(connector);107 drm_connector_cleanup(connector);
111 drm_dp_mst_put_port_malloc(aconnector->port);108 drm_dp_mst_put_port_malloc(aconnector->port);
112 kfree(aconnector);109 kfree(aconnector);
@@ -243,7 +240,11 @@ static struct drm_encoder * · 130 unmodified lines
243dm_mst_atomic_best_encoder(struct drm_connector *connector,240dm_mst_atomic_best_encoder(struct drm_connector *connector,
244 struct drm_connector_state *connector_state)241 struct drm_connector_state *connector_state)
245{242{
246 return &to_amdgpu_dm_connector(connector)->mst_encoder->base;243 struct drm_device *dev = connector->dev;
244 struct amdgpu_device *adev = dev->dev_private;
245 struct amdgpu_crtc *acrtc = to_amdgpu_crtc(connector_state->crtc);
246
247 return &adev->dm.mst_encoders[acrtc->crtc_id].base;
247}248}
248 249
249static int250static int
@@ -306,31 +307,27 @@ static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = { · 56 unmodified lines
306 .destroy = amdgpu_dm_encoder_destroy,307 .destroy = amdgpu_dm_encoder_destroy,
307};308};
308 309
309static struct amdgpu_encoder *310void
310dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)311dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev)
311{312{
312 struct drm_device *dev = connector->base.dev;313 struct drm_device *dev = adev->ddev;
313 struct amdgpu_device *adev = dev->dev_private;314 int i;
314 struct amdgpu_encoder *amdgpu_encoder;
315 struct drm_encoder *encoder;
316
317 amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
318 if (!amdgpu_encoder)
319 return NULL;
320 315
321 encoder = &amdgpu_encoder->base;316 for (i = 0; i < adev->dm.display_indexes_num; i++) {
322 encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);317 struct amdgpu_encoder *amdgpu_encoder = &adev->dm.mst_encoders[i];
318 struct drm_encoder *encoder = &amdgpu_encoder->base;
323 319
324 drm_encoder_init(320 encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
325 dev,
326 &amdgpu_encoder->base,
327 &amdgpu_dm_encoder_funcs,
328 DRM_MODE_ENCODER_DPMST,
329 NULL);
330 321
331 drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);322 drm_encoder_init(
323 dev,
324 &amdgpu_encoder->base,
325 &amdgpu_dm_encoder_funcs,
326 DRM_MODE_ENCODER_DPMST,
327 NULL);
332 328
333 return amdgpu_encoder;329 drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
330 }
334}331}
335 332
336static struct drm_connector *333static struct drm_connector *
@@ -343,6 +340,7 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, · 6 unmodified lines
343 struct amdgpu_device *adev = dev->dev_private;340 struct amdgpu_device *adev = dev->dev_private;
344 struct amdgpu_dm_connector *aconnector;341 struct amdgpu_dm_connector *aconnector;
345 struct drm_connector *connector;342 struct drm_connector *connector;
343 int i;
346 344
347 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);345 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
348 if (!aconnector)346 if (!aconnector)
@@ -369,9 +367,10 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, · 20 unmodified lines
369 master->dc_link,367 master->dc_link,
370 master->connector_id);368 master->connector_id);
371 369
372 aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);370 for (i = 0; i < adev->dm.display_indexes_num; i++) {
373 drm_connector_attach_encoder(&aconnector->base,371 drm_connector_attach_encoder(&aconnector->base,
374 &aconnector->mst_encoder->base);372 &adev->dm.mst_encoders[i].base);
373 }
375 374
376 connector->max_bpc_property = master->base.max_bpc_property;375 connector->max_bpc_property = master->base.max_bpc_property;
377 if (connector->max_bpc_property)376 if (connector->max_bpc_property)
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h+3−0
@@ -35,6 +35,9 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, · 34 unmodified lines
35 struct amdgpu_dm_connector *aconnector,35 struct amdgpu_dm_connector *aconnector,
36 int link_index);36 int link_index);
37 37
38void
39dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev);
40
38#if defined(CONFIG_DRM_AMD_DC_DCN)41#if defined(CONFIG_DRM_AMD_DC_DCN)
39bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,42bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state,
40 struct dc_state *dc_state);43 struct dc_state *dc_state);
drivers/gpu/drm/amd/display/dc/core/dc_stream.c+16−3
@@ -56,7 +56,7 @@ void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink) · 55 unmodified lines
56 }56 }
57}57}
58 58
59static void dc_stream_construct(struct dc_stream_state *stream,59static bool dc_stream_construct(struct dc_stream_state *stream,
60 struct dc_sink *dc_sink_data)60 struct dc_sink *dc_sink_data)
61{61{
62 uint32_t i = 0;62 uint32_t i = 0;
@@ -118,11 +118,17 @@ static void dc_stream_construct(struct dc_stream_state *stream, · 55 unmodified lines
118 update_stream_signal(stream, dc_sink_data);118 update_stream_signal(stream, dc_sink_data);
119 119
120 stream->out_transfer_func = dc_create_transfer_func();120 stream->out_transfer_func = dc_create_transfer_func();
121 if (stream->out_transfer_func == NULL) {
122 dc_sink_release(dc_sink_data);
123 return false;
124 }
121 stream->out_transfer_func->type = TF_TYPE_BYPASS;125 stream->out_transfer_func->type = TF_TYPE_BYPASS;
122 stream->out_transfer_func->ctx = stream->ctx;126 stream->out_transfer_func->ctx = stream->ctx;
123 127
124 stream->stream_id = stream->ctx->dc_stream_id_count;128 stream->stream_id = stream->ctx->dc_stream_id_count;
125 stream->ctx->dc_stream_id_count++;129 stream->ctx->dc_stream_id_count++;
130
131 return true;
126}132}
127 133
128static void dc_stream_destruct(struct dc_stream_state *stream)134static void dc_stream_destruct(struct dc_stream_state *stream)
@@ -164,13 +170,20 @@ struct dc_stream_state *dc_create_stream_for_sink( · 35 unmodified lines
164 170
165 stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);171 stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
166 if (stream == NULL)172 if (stream == NULL)
167 return NULL;173 goto alloc_fail;
168 174
169 dc_stream_construct(stream, sink);175 if (dc_stream_construct(stream, sink) == false)
176 goto construct_fail;
170 177
171 kref_init(&stream->refcount);178 kref_init(&stream->refcount);
172 179
173 return stream;180 return stream;
181
182construct_fail:
183 kfree(stream);
184
185alloc_fail:
186 return NULL;
174}187}
175 188
176struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)189struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream)
drivers/gpu/drm/amd/powerplay/renoir_ppt.c+1−1
@@ -689,7 +689,7 @@ static int renoir_set_power_profile_mode(struct smu_context *smu, long *input, u · 688 unmodified lines
689 return -EINVAL;689 return -EINVAL;
690 }690 }
691 691
692 ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask,692 ret = smu_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify,
693 1 << workload_type,693 1 << workload_type,
694 NULL);694 NULL);
695 if (ret) {695 if (ret) {
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c+6−4
@@ -644,9 +644,6 @@ static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, · 643 unmodified lines
644 644
645 /* sclk is bigger than max sclk in the dependence table */645 /* sclk is bigger than max sclk in the dependence table */
646 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;646 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
647 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),
648 (dep_table->entries[i - 1].vddc -
649 (uint16_t)VDDC_VDDCI_DELTA));
650 647
651 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control)648 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control)
652 *voltage |= (data->vbios_boot_state.vddci_bootup_value *649 *voltage |= (data->vbios_boot_state.vddci_bootup_value *
@@ -654,8 +651,13 @@ static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, · 1 unmodified line
654 else if (dep_table->entries[i - 1].vddci)651 else if (dep_table->entries[i - 1].vddci)
655 *voltage |= (dep_table->entries[i - 1].vddci *652 *voltage |= (dep_table->entries[i - 1].vddci *
656 VOLTAGE_SCALE) << VDDC_SHIFT;653 VOLTAGE_SCALE) << VDDC_SHIFT;
657 else654 else {
655 vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),
656 (dep_table->entries[i - 1].vddc -
657 (uint16_t)VDDC_VDDCI_DELTA));
658
658 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;659 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
660 }
659 661
660 if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)662 if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
661 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;663 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c+1−2
@@ -173,8 +173,6 @@ static int aspeed_gfx_load(struct drm_device *drm) · 172 unmodified lines
173 173
174 drm_mode_config_reset(drm);174 drm_mode_config_reset(drm);
175 175
176 drm_fbdev_generic_setup(drm, 32);
177
178 return 0;176 return 0;
179}177}
180 178
@@ -225,6 +223,7 @@ static int aspeed_gfx_probe(struct platform_device *pdev) · 44 unmodified lines
225 if (ret)223 if (ret)
226 goto err_unload;224 goto err_unload;
227 225
226 drm_fbdev_generic_setup(&priv->drm, 32);
228 return 0;227 return 0;
229 228
230err_unload:229err_unload:
drivers/gpu/drm/bochs/bochs_kms.c+1−0
@@ -146,6 +146,7 @@ int bochs_kms_init(struct bochs_device *bochs) · 145 unmodified lines
146 bochs->dev->mode_config.preferred_depth = 24;146 bochs->dev->mode_config.preferred_depth = 24;
147 bochs->dev->mode_config.prefer_shadow = 0;147 bochs->dev->mode_config.prefer_shadow = 0;
148 bochs->dev->mode_config.prefer_shadow_fbdev = 1;148 bochs->dev->mode_config.prefer_shadow_fbdev = 1;
149 bochs->dev->mode_config.fbdev_use_iomem = true;
149 bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;150 bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
150 151
151 bochs->dev->mode_config.funcs = &bochs_mode_funcs;152 bochs->dev->mode_config.funcs = &bochs_mode_funcs;
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c+1−0
@@ -1224,6 +1224,7 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id) · 1223 unmodified lines
1224 1224
1225 adv7511->bridge.funcs = &adv7511_bridge_funcs;1225 adv7511->bridge.funcs = &adv7511_bridge_funcs;
1226 adv7511->bridge.of_node = dev->of_node;1226 adv7511->bridge.of_node = dev->of_node;
1227 adv7511->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
1227 1228
1228 drm_bridge_add(&adv7511->bridge);1229 drm_bridge_add(&adv7511->bridge);
1229 1230
drivers/gpu/drm/bridge/nwl-dsi.c+0−5
@@ -917,11 +917,6 @@ static int nwl_dsi_bridge_attach(struct drm_bridge *bridge, · 916 unmodified lines
917 struct drm_panel *panel;917 struct drm_panel *panel;
918 int ret;918 int ret;
919 919
920 if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) {
921 DRM_ERROR("Fix bridge driver to make connector optional!");
922 return -EINVAL;
923 }
924
925 ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0, &panel,920 ret = drm_of_find_panel_or_bridge(dsi->dev->of_node, 1, 0, &panel,
926 &panel_bridge);921 &panel_bridge);
927 if (ret)922 if (ret)
drivers/gpu/drm/drm_fb_helper.c+5−1
@@ -399,7 +399,11 @@ static void drm_fb_helper_dirty_blit_real(struct drm_fb_helper *fb_helper, · 398 unmodified lines
399 unsigned int y;399 unsigned int y;
400 400
401 for (y = clip->y1; y < clip->y2; y++) {401 for (y = clip->y1; y < clip->y2; y++) {
402 memcpy(dst, src, len);402 if (!fb_helper->dev->mode_config.fbdev_use_iomem)
403 memcpy(dst, src, len);
404 else
405 memcpy_toio((void __iomem *)dst, src, len);
406
403 src += fb->pitches[0];407 src += fb->pitches[0];
404 dst += fb->pitches[0];408 dst += fb->pitches[0];
405 }409 }
drivers/gpu/drm/drm_gem.c+4−6
@@ -871,9 +871,6 @@ err: · 870 unmodified lines
871 * @file_priv: drm file-private structure871 * @file_priv: drm file-private structure
872 *872 *
873 * Open an object using the global name, returning a handle and the size.873 * Open an object using the global name, returning a handle and the size.
874 *
875 * This handle (of course) holds a reference to the object, so the object
876 * will not go away until the handle is deleted.
877 */874 */
878int875int
879drm_gem_open_ioctl(struct drm_device *dev, void *data,876drm_gem_open_ioctl(struct drm_device *dev, void *data,
@@ -898,14 +895,15 @@ drm_gem_open_ioctl(struct drm_device *dev, void *data, · 18 unmodified lines
898 895
899 /* drm_gem_handle_create_tail unlocks dev->object_name_lock. */896 /* drm_gem_handle_create_tail unlocks dev->object_name_lock. */
900 ret = drm_gem_handle_create_tail(file_priv, obj, &handle);897 ret = drm_gem_handle_create_tail(file_priv, obj, &handle);
901 drm_gem_object_put_unlocked(obj);
902 if (ret)898 if (ret)
903 return ret;899 goto err;
904 900
905 args->handle = handle;901 args->handle = handle;
906 args->size = obj->size;902 args->size = obj->size;
907 903
908 return 0;904err:
905 drm_gem_object_put_unlocked(obj);
906 return ret;
909}907}
910 908
911/**909/**
drivers/gpu/drm/drm_mipi_dbi.c+1−1
@@ -923,7 +923,7 @@ static int mipi_dbi_spi1_transfer(struct mipi_dbi *dbi, int dc, · 922 unmodified lines
923 }923 }
924 }924 }
925 925
926 tr.len = chunk;926 tr.len = chunk * 2;
927 len -= chunk;927 len -= chunk;
928 928
929 ret = spi_sync(spi, &m);929 ret = spi_sync(spi, &m);
drivers/gpu/drm/drm_of.c+1−3
@@ -322,10 +322,8 @@ static int drm_of_lvds_get_remote_pixels_type( · 321 unmodified lines
322 * configurations by passing the endpoints explicitly to322 * configurations by passing the endpoints explicitly to
323 * drm_of_lvds_get_dual_link_pixel_order().323 * drm_of_lvds_get_dual_link_pixel_order().
324 */324 */
325 if (!current_pt || pixels_type != current_pt) {325 if (!current_pt || pixels_type != current_pt)
326 of_node_put(remote_port);
327 return -EINVAL;326 return -EINVAL;
328 }
329 }327 }
330 328
331 return pixels_type;329 return pixels_type;
drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c+3−2
@@ -307,8 +307,6 @@ static int hibmc_load(struct drm_device *dev) · 306 unmodified lines
307 /* reset all the states of crtc/plane/encoder/connector */307 /* reset all the states of crtc/plane/encoder/connector */
308 drm_mode_config_reset(dev);308 drm_mode_config_reset(dev);
309 309
310 drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
311
312 return 0;310 return 0;
313 311
314err:312err:
@@ -355,6 +353,9 @@ static int hibmc_pci_probe(struct pci_dev *pdev, · 40 unmodified lines
355 ret);353 ret);
356 goto err_unload;354 goto err_unload;
357 }355 }
356
357 drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth);
358
358 return 0;359 return 0;
359 360
360err_unload:361err_unload:
drivers/gpu/drm/i915/display/intel_display.c+11−0
@@ -3822,6 +3822,17 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, · 3821 unmodified lines
3822 return true;3822 return true;
3823}3823}
3824 3824
3825unsigned int
3826intel_plane_fence_y_offset(const struct intel_plane_state *plane_state)
3827{
3828 int x = 0, y = 0;
3829
3830 intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0,
3831 plane_state->color_plane[0].offset, 0);
3832
3833 return y;
3834}
3835
3825static int skl_check_main_surface(struct intel_plane_state *plane_state)3836static int skl_check_main_surface(struct intel_plane_state *plane_state)
3826{3837{
3827 struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev);3838 struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev);
drivers/gpu/drm/i915/display/intel_display.h+1−0
@@ -608,6 +608,7 @@ unsigned int i9xx_plane_max_stride(struct intel_plane *plane, · 607 unmodified lines
608 u32 pixel_format, u64 modifier,608 u32 pixel_format, u64 modifier,
609 unsigned int rotation);609 unsigned int rotation);
610int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);610int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
611unsigned int intel_plane_fence_y_offset(const struct intel_plane_state *plane_state);
611 612
612struct intel_display_error_state *613struct intel_display_error_state *
613intel_display_capture_error_state(struct drm_i915_private *dev_priv);614intel_display_capture_error_state(struct drm_i915_private *dev_priv);
drivers/gpu/drm/i915/display/intel_fbc.c+36−29
@@ -47,19 +47,6 @@ · 46 unmodified lines
47#include "intel_fbc.h"47#include "intel_fbc.h"
48#include "intel_frontbuffer.h"48#include "intel_frontbuffer.h"
49 49
50/*
51 * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the
52 * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's
53 * origin so the x and y offsets can actually fit the registers. As a
54 * consequence, the fence doesn't really start exactly at the display plane
55 * address we program because it starts at the real start of the buffer, so we
56 * have to take this into consideration here.
57 */
58static unsigned int get_crtc_fence_y_offset(struct intel_fbc *fbc)
59{
60 return fbc->state_cache.plane.y - fbc->state_cache.plane.adjusted_y;
61}
62
63/*50/*
64 * For SKL+, the plane source size used by the hardware is based on the value we51 * For SKL+, the plane source size used by the hardware is based on the value we
65 * write to the PLANE_SIZE register. For BDW-, the hardware looks at the value52 * write to the PLANE_SIZE register. For BDW-, the hardware looks at the value
@@ -141,7 +128,7 @@ static void i8xx_fbc_activate(struct drm_i915_private *dev_priv) · 75 unmodified lines
141 fbc_ctl2 |= FBC_CTL_CPU_FENCE;128 fbc_ctl2 |= FBC_CTL_CPU_FENCE;
142 intel_de_write(dev_priv, FBC_CONTROL2, fbc_ctl2);129 intel_de_write(dev_priv, FBC_CONTROL2, fbc_ctl2);
143 intel_de_write(dev_priv, FBC_FENCE_OFF,130 intel_de_write(dev_priv, FBC_FENCE_OFF,
144 params->crtc.fence_y_offset);131 params->fence_y_offset);
145 }132 }
146 133
147 /* enable it... */134 /* enable it... */
@@ -175,7 +162,7 @@ static void g4x_fbc_activate(struct drm_i915_private *dev_priv) · 27 unmodified lines
175 if (params->fence_id >= 0) {162 if (params->fence_id >= 0) {
176 dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id;163 dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id;
177 intel_de_write(dev_priv, DPFC_FENCE_YOFF,164 intel_de_write(dev_priv, DPFC_FENCE_YOFF,
178 params->crtc.fence_y_offset);165 params->fence_y_offset);
179 } else {166 } else {
180 intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0);167 intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0);
181 }168 }
@@ -243,7 +230,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) · 61 unmodified lines
243 intel_de_write(dev_priv, SNB_DPFC_CTL_SA,230 intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
244 SNB_CPU_FENCE_ENABLE | params->fence_id);231 SNB_CPU_FENCE_ENABLE | params->fence_id);
245 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,232 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,
246 params->crtc.fence_y_offset);233 params->fence_y_offset);
247 }234 }
248 } else {235 } else {
249 if (IS_GEN(dev_priv, 6)) {236 if (IS_GEN(dev_priv, 6)) {
@@ -253,7 +240,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) · 3 unmodified lines
253 }240 }
254 241
255 intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF,242 intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF,
256 params->crtc.fence_y_offset);243 params->fence_y_offset);
257 /* enable it... */244 /* enable it... */
258 intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);245 intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN);
259 246
@@ -320,7 +307,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) · 60 unmodified lines
320 intel_de_write(dev_priv, SNB_DPFC_CTL_SA,307 intel_de_write(dev_priv, SNB_DPFC_CTL_SA,
321 SNB_CPU_FENCE_ENABLE | params->fence_id);308 SNB_CPU_FENCE_ENABLE | params->fence_id);
322 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,309 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,
323 params->crtc.fence_y_offset);310 params->fence_y_offset);
324 } else if (dev_priv->ggtt.num_fences) {311 } else if (dev_priv->ggtt.num_fences) {
325 intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);312 intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);
326 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);313 intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);
@@ -631,8 +618,8 @@ static bool rotation_is_valid(struct drm_i915_private *dev_priv, · 304 unmodified lines
631/*618/*
632 * For some reason, the hardware tracking starts looking at whatever we619 * For some reason, the hardware tracking starts looking at whatever we
633 * programmed as the display plane base address register. It does not look at620 * programmed as the display plane base address register. It does not look at
634 * the X and Y offset registers. That's why we look at the crtc->adjusted{x,y}621 * the X and Y offset registers. That's why we include the src x/y offsets
635 * variables instead of just looking at the pipe/plane size.622 * instead of just looking at the plane size.
636 */623 */
637static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)624static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc)
638{625{
@@ -705,7 +692,6 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, · 66 unmodified lines
705 cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;692 cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
706 cache->plane.adjusted_x = plane_state->color_plane[0].x;693 cache->plane.adjusted_x = plane_state->color_plane[0].x;
707 cache->plane.adjusted_y = plane_state->color_plane[0].y;694 cache->plane.adjusted_y = plane_state->color_plane[0].y;
708 cache->plane.y = plane_state->uapi.src.y1 >> 16;
709 695
710 cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;696 cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode;
711 697
@@ -713,6 +699,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, · 1 unmodified line
713 cache->fb.stride = fb->pitches[0];699 cache->fb.stride = fb->pitches[0];
714 cache->fb.modifier = fb->modifier;700 cache->fb.modifier = fb->modifier;
715 701
702 cache->fence_y_offset = intel_plane_fence_y_offset(plane_state);
703
716 drm_WARN_ON(&dev_priv->drm, plane_state->flags & PLANE_HAS_FENCE &&704 drm_WARN_ON(&dev_priv->drm, plane_state->flags & PLANE_HAS_FENCE &&
717 !plane_state->vma->fence);705 !plane_state->vma->fence);
718 706
@@ -731,6 +719,25 @@ static bool intel_fbc_cfb_size_changed(struct drm_i915_private *dev_priv) · 12 unmodified lines
731 fbc->compressed_fb.size * fbc->threshold;719 fbc->compressed_fb.size * fbc->threshold;
732}720}
733 721
722static u16 intel_fbc_gen9_wa_cfb_stride(struct drm_i915_private *dev_priv)
723{
724 struct intel_fbc *fbc = &dev_priv->fbc;
725 struct intel_fbc_state_cache *cache = &fbc->state_cache;
726
727 if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&
728 cache->fb.modifier != I915_FORMAT_MOD_X_TILED)
729 return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
730 else
731 return 0;
732}
733
734static bool intel_fbc_gen9_wa_cfb_stride_changed(struct drm_i915_private *dev_priv)
735{
736 struct intel_fbc *fbc = &dev_priv->fbc;
737
738 return fbc->params.gen9_wa_cfb_stride != intel_fbc_gen9_wa_cfb_stride(dev_priv);
739}
740
734static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv)741static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv)
735{742{
736 struct intel_fbc *fbc = &dev_priv->fbc;743 struct intel_fbc *fbc = &dev_priv->fbc;
@@ -883,12 +890,13 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc, · 146 unmodified lines
883 memset(params, 0, sizeof(*params));890 memset(params, 0, sizeof(*params));
884 891
885 params->fence_id = cache->fence_id;892 params->fence_id = cache->fence_id;
893 params->fence_y_offset = cache->fence_y_offset;
886 894
887 params->crtc.pipe = crtc->pipe;895 params->crtc.pipe = crtc->pipe;
888 params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane;896 params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane;
889 params->crtc.fence_y_offset = get_crtc_fence_y_offset(fbc);
890 897
891 params->fb.format = cache->fb.format;898 params->fb.format = cache->fb.format;
899 params->fb.modifier = cache->fb.modifier;
892 params->fb.stride = cache->fb.stride;900 params->fb.stride = cache->fb.stride;
893 901
894 params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache);902 params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache);
@@ -918,6 +926,9 @@ static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state) · 23 unmodified lines
918 if (params->fb.format != cache->fb.format)926 if (params->fb.format != cache->fb.format)
919 return false;927 return false;
920 928
929 if (params->fb.modifier != cache->fb.modifier)
930 return false;
931
921 if (params->fb.stride != cache->fb.stride)932 if (params->fb.stride != cache->fb.stride)
922 return false;933 return false;
923 934
@@ -1197,7 +1208,8 @@ void intel_fbc_enable(struct intel_atomic_state *state, · 273 unmodified lines
1197 1208
1198 if (fbc->crtc) {1209 if (fbc->crtc) {
1199 if (fbc->crtc != crtc ||1210 if (fbc->crtc != crtc ||
1200 !intel_fbc_cfb_size_changed(dev_priv))1211 (!intel_fbc_cfb_size_changed(dev_priv) &&
1212 !intel_fbc_gen9_wa_cfb_stride_changed(dev_priv)))
1201 goto out;1213 goto out;
1202 1214
1203 __intel_fbc_disable(dev_priv);1215 __intel_fbc_disable(dev_priv);
@@ -1219,12 +1231,7 @@ void intel_fbc_enable(struct intel_atomic_state *state, · 15 unmodified lines
1219 goto out;1231 goto out;
1220 }1232 }
1221 1233
1222 if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) &&1234 cache->gen9_wa_cfb_stride = intel_fbc_gen9_wa_cfb_stride(dev_priv);
1223 plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED)
1224 cache->gen9_wa_cfb_stride =
1225 DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8;
1226 else
1227 cache->gen9_wa_cfb_stride = 0;
1228 1235
1229 drm_dbg_kms(&dev_priv->drm, "Enabling FBC on pipe %c\n",1236 drm_dbg_kms(&dev_priv->drm, "Enabling FBC on pipe %c\n",
1230 pipe_name(crtc->pipe));1237 pipe_name(crtc->pipe));
drivers/gpu/drm/i915/display/intel_hdmi.c+2−8
@@ -2867,19 +2867,13 @@ intel_hdmi_connector_register(struct drm_connector *connector) · 2866 unmodified lines
2867 return ret;2867 return ret;
2868}2868}
2869 2869
2870static void intel_hdmi_destroy(struct drm_connector *connector)2870static void intel_hdmi_connector_unregister(struct drm_connector *connector)
2871{2871{
2872 struct cec_notifier *n = intel_attached_hdmi(to_intel_connector(connector))->cec_notifier;2872 struct cec_notifier *n = intel_attached_hdmi(to_intel_connector(connector))->cec_notifier;
2873 2873
2874 cec_notifier_conn_unregister(n);2874 cec_notifier_conn_unregister(n);
2875 2875
2876 intel_connector_destroy(connector);
2877}
2878
2879static void intel_hdmi_connector_unregister(struct drm_connector *connector)
2880{
2881 intel_hdmi_remove_i2c_symlink(connector);2876 intel_hdmi_remove_i2c_symlink(connector);
2882
2883 intel_connector_unregister(connector);2877 intel_connector_unregister(connector);
2884}2878}
2885 2879
@@ -2891,7 +2885,7 @@ static const struct drm_connector_funcs intel_hdmi_connector_funcs = { · 5 unmodified lines
2891 .atomic_set_property = intel_digital_connector_atomic_set_property,2885 .atomic_set_property = intel_digital_connector_atomic_set_property,
2892 .late_register = intel_hdmi_connector_register,2886 .late_register = intel_hdmi_connector_register,
2893 .early_unregister = intel_hdmi_connector_unregister,2887 .early_unregister = intel_hdmi_connector_unregister,
2894 .destroy = intel_hdmi_destroy,2888 .destroy = intel_connector_destroy,
2895 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,2889 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2896 .atomic_duplicate_state = intel_digital_connector_duplicate_state,2890 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
2897};2891};
drivers/gpu/drm/i915/gt/intel_context.c+6−6
@@ -204,25 +204,25 @@ static int __ring_active(struct intel_ring *ring) · 203 unmodified lines
204{204{
205 int err;205 int err;
206 206
207 err = i915_active_acquire(&ring->vma->active);207 err = intel_ring_pin(ring);
208 if (err)208 if (err)
209 return err;209 return err;
210 210
211 err = intel_ring_pin(ring);211 err = i915_active_acquire(&ring->vma->active);
212 if (err)212 if (err)
213 goto err_active;213 goto err_pin;
214 214
215 return 0;215 return 0;
216 216
217err_active:217err_pin:
218 i915_active_release(&ring->vma->active);218 intel_ring_unpin(ring);
219 return err;219 return err;
220}220}
221 221
222static void __ring_retire(struct intel_ring *ring)222static void __ring_retire(struct intel_ring *ring)
223{223{
224 intel_ring_unpin(ring);
225 i915_active_release(&ring->vma->active);224 i915_active_release(&ring->vma->active);
225 intel_ring_unpin(ring);
226}226}
227 227
228__i915_active_call228__i915_active_call
drivers/gpu/drm/i915/gt/intel_lrc.c+5−14
@@ -5396,13 +5396,8 @@ static void virtual_engine_initial_hint(struct virtual_engine *ve) · 5395 unmodified lines
5396 * typically be the first we inspect for submission.5396 * typically be the first we inspect for submission.
5397 */5397 */
5398 swp = prandom_u32_max(ve->num_siblings);5398 swp = prandom_u32_max(ve->num_siblings);
5399 if (!swp)5399 if (swp)
5400 return;5400 swap(ve->siblings[swp], ve->siblings[0]);
5401
5402 swap(ve->siblings[swp], ve->siblings[0]);
5403 if (!intel_engine_has_relative_mmio(ve->siblings[0]))
5404 virtual_update_register_offsets(ve->context.lrc_reg_state,
5405 ve->siblings[0]);
5406}5401}
5407 5402
5408static int virtual_context_alloc(struct intel_context *ce)5403static int virtual_context_alloc(struct intel_context *ce)
@@ -5415,15 +5410,9 @@ static int virtual_context_alloc(struct intel_context *ce) · 6 unmodified lines
5415static int virtual_context_pin(struct intel_context *ce)5410static int virtual_context_pin(struct intel_context *ce)
5416{5411{
5417 struct virtual_engine *ve = container_of(ce, typeof(*ve), context);5412 struct virtual_engine *ve = container_of(ce, typeof(*ve), context);
5418 int err;
5419 5413
5420 /* Note: we must use a real engine class for setting up reg state */5414 /* Note: we must use a real engine class for setting up reg state */
5421 err = __execlists_context_pin(ce, ve->siblings[0]);5415 return __execlists_context_pin(ce, ve->siblings[0]);
5422 if (err)
5423 return err;
5424
5425 virtual_engine_initial_hint(ve);
5426 return 0;
5427}5416}
5428 5417
5429static void virtual_context_enter(struct intel_context *ce)5418static void virtual_context_enter(struct intel_context *ce)
@@ -5688,6 +5677,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings, · 258 unmodified lines
5688 intel_engine_init_active(&ve->base, ENGINE_VIRTUAL);5677 intel_engine_init_active(&ve->base, ENGINE_VIRTUAL);
5689 intel_engine_init_breadcrumbs(&ve->base);5678 intel_engine_init_breadcrumbs(&ve->base);
5690 intel_engine_init_execlists(&ve->base);5679 intel_engine_init_execlists(&ve->base);
5680 ve->base.breadcrumbs.irq_armed = true; /* fake HW, used for irq_work */
5691 5681
5692 ve->base.cops = &virtual_context_ops;5682 ve->base.cops = &virtual_context_ops;
5693 ve->base.request_alloc = execlists_request_alloc;5683 ve->base.request_alloc = execlists_request_alloc;
@@ -5769,6 +5759,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings, · 75 unmodified lines
5769 5759
5770 ve->base.flags |= I915_ENGINE_IS_VIRTUAL;5760 ve->base.flags |= I915_ENGINE_IS_VIRTUAL;
5771 5761
5762 virtual_engine_initial_hint(ve);
5772 return &ve->context;5763 return &ve->context;
5773 5764
5774err_put:5765err_put:
drivers/gpu/drm/i915/gt/selftest_rps.c+4−4
@@ -44,9 +44,9 @@ static int cmp_u64(const void *A, const void *B) · 43 unmodified lines
44{44{
45 const u64 *a = A, *b = B;45 const u64 *a = A, *b = B;
46 46
47 if (a < b)47 if (*a < *b)
48 return -1;48 return -1;
49 else if (a > b)49 else if (*a > *b)
50 return 1;50 return 1;
51 else51 else
52 return 0;52 return 0;
@@ -56,9 +56,9 @@ static int cmp_u32(const void *A, const void *B) · 3 unmodified lines
56{56{
57 const u32 *a = A, *b = B;57 const u32 *a = A, *b = B;
58 58
59 if (a < b)59 if (*a < *b)
60 return -1;60 return -1;
61 else if (a > b)61 else if (*a > *b)
62 return 1;62 return 1;
63 else63 else
64 return 0;64 return 0;
drivers/gpu/drm/i915/i915_debugfs.c+1−1
@@ -230,7 +230,7 @@ static int per_file_stats(int id, void *ptr, void *data) · 229 unmodified lines
230 struct file_stats *stats = data;230 struct file_stats *stats = data;
231 struct i915_vma *vma;231 struct i915_vma *vma;
232 232
233 if (!kref_get_unless_zero(&obj->base.refcount))233 if (IS_ERR_OR_NULL(obj) || !kref_get_unless_zero(&obj->base.refcount))
234 return 0;234 return 0;
235 235
236 stats->count++;236 stats->count++;
drivers/gpu/drm/i915/i915_drv.h+4−3
@@ -410,8 +410,6 @@ struct intel_fbc { · 409 unmodified lines
410 int adjusted_x;410 int adjusted_x;
411 int adjusted_y;411 int adjusted_y;
412 412
413 int y;
414
415 u16 pixel_blend_mode;413 u16 pixel_blend_mode;
416 } plane;414 } plane;
417 415
@@ -420,6 +418,8 @@ struct intel_fbc { · 2 unmodified lines
420 unsigned int stride;418 unsigned int stride;
421 u64 modifier;419 u64 modifier;
422 } fb;420 } fb;
421
422 unsigned int fence_y_offset;
423 u16 gen9_wa_cfb_stride;423 u16 gen9_wa_cfb_stride;
424 s8 fence_id;424 s8 fence_id;
425 } state_cache;425 } state_cache;
@@ -435,15 +435,16 @@ struct intel_fbc { · 9 unmodified lines
435 struct {435 struct {
436 enum pipe pipe;436 enum pipe pipe;
437 enum i9xx_plane_id i9xx_plane;437 enum i9xx_plane_id i9xx_plane;
438 unsigned int fence_y_offset;
439 } crtc;438 } crtc;
440 439
441 struct {440 struct {
442 const struct drm_format_info *format;441 const struct drm_format_info *format;
443 unsigned int stride;442 unsigned int stride;
443 u64 modifier;
444 } fb;444 } fb;
445 445
446 int cfb_size;446 int cfb_size;
447 unsigned int fence_y_offset;
447 u16 gen9_wa_cfb_stride;448 u16 gen9_wa_cfb_stride;
448 s8 fence_id;449 s8 fence_id;
449 bool plane_visible;450 bool plane_visible;
drivers/gpu/drm/i915/i915_perf.c+1−0
@@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs, · 1591 unmodified lines
1592 u32 d;1592 u32 d;
1593 1593
1594 cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;1594 cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM;
1595 cmd |= MI_SRM_LRM_GLOBAL_GTT;
1595 if (INTEL_GEN(stream->perf->i915) >= 8)1596 if (INTEL_GEN(stream->perf->i915) >= 8)
1596 cmd++;1597 cmd++;
1597 1598
drivers/gpu/drm/i915/i915_vma.c+6−9
@@ -104,6 +104,7 @@ vma_create(struct drm_i915_gem_object *obj, · 103 unmodified lines
104 struct i915_address_space *vm,104 struct i915_address_space *vm,
105 const struct i915_ggtt_view *view)105 const struct i915_ggtt_view *view)
106{106{
107 struct i915_vma *pos = ERR_PTR(-E2BIG);
107 struct i915_vma *vma;108 struct i915_vma *vma;
108 struct rb_node *rb, **p;109 struct rb_node *rb, **p;
109 110
@@ -184,7 +185,6 @@ vma_create(struct drm_i915_gem_object *obj, · 74 unmodified lines
184 rb = NULL;185 rb = NULL;
185 p = &obj->vma.tree.rb_node;186 p = &obj->vma.tree.rb_node;
186 while (*p) {187 while (*p) {
187 struct i915_vma *pos;
188 long cmp;188 long cmp;
189 189
190 rb = *p;190 rb = *p;
@@ -196,16 +196,12 @@ vma_create(struct drm_i915_gem_object *obj, · 5 unmodified lines
196 * and dispose of ours.196 * and dispose of ours.
197 */197 */
198 cmp = i915_vma_compare(pos, vm, view);198 cmp = i915_vma_compare(pos, vm, view);
199 if (cmp == 0) {
200 spin_unlock(&obj->vma.lock);
201 i915_vma_free(vma);
202 return pos;
203 }
204
205 if (cmp < 0)199 if (cmp < 0)
206 p = &rb->rb_right;200 p = &rb->rb_right;
207 else201 else if (cmp > 0)
208 p = &rb->rb_left;202 p = &rb->rb_left;
203 else
204 goto err_unlock;
209 }205 }
210 rb_link_node(&vma->obj_node, rb, p);206 rb_link_node(&vma->obj_node, rb, p);
211 rb_insert_color(&vma->obj_node, &obj->vma.tree);207 rb_insert_color(&vma->obj_node, &obj->vma.tree);
@@ -228,8 +224,9 @@ vma_create(struct drm_i915_gem_object *obj, · 16 unmodified lines
228err_unlock:224err_unlock:
229 spin_unlock(&obj->vma.lock);225 spin_unlock(&obj->vma.lock);
230err_vma:226err_vma:
227 i915_vm_put(vm);
231 i915_vma_free(vma);228 i915_vma_free(vma);
232 return ERR_PTR(-E2BIG);229 return pos;
233}230}
234 231
235static struct i915_vma *232static struct i915_vma *
drivers/gpu/drm/lima/lima_pp.c+2−0
@@ -271,6 +271,8 @@ void lima_pp_fini(struct lima_ip *ip) · 270 unmodified lines
271 271
272int lima_pp_bcast_resume(struct lima_ip *ip)272int lima_pp_bcast_resume(struct lima_ip *ip)
273{273{
274 /* PP has been reset by individual PP resume */
275 ip->data.async_reset = false;
274 return 0;276 return 0;
275}277}
276 278
drivers/gpu/drm/mcde/mcde_display.c+8−3
@@ -1060,9 +1060,14 @@ static void mcde_display_update(struct drm_simple_display_pipe *pipe, · 1059 unmodified lines
1060 */1060 */
1061 if (fb) {1061 if (fb) {
1062 mcde_set_extsrc(mcde, drm_fb_cma_get_gem_addr(fb, pstate, 0));1062 mcde_set_extsrc(mcde, drm_fb_cma_get_gem_addr(fb, pstate, 0));
1063 if (!mcde->video_mode)1063 if (!mcde->video_mode) {
1064 /* Send a single frame using software sync */1064 /*
1065 mcde_display_send_one_frame(mcde);1065 * Send a single frame using software sync if the flow
1066 * is not active yet.
1067 */
1068 if (mcde->flow_active == 0)
1069 mcde_display_send_one_frame(mcde);
1070 }
1066 dev_info_once(mcde->dev, "sent first display update\n");1071 dev_info_once(mcde->dev, "sent first display update\n");
1067 } else {1072 } else {
1068 /*1073 /*
drivers/gpu/drm/mediatek/Kconfig+1−1
@@ -6,12 +6,12 @@ config DRM_MEDIATEK · 5 unmodified lines
6 depends on COMMON_CLK6 depends on COMMON_CLK
7 depends on HAVE_ARM_SMCCC7 depends on HAVE_ARM_SMCCC
8 depends on OF8 depends on OF
9 depends on MTK_MMSYS
9 select DRM_GEM_CMA_HELPER10 select DRM_GEM_CMA_HELPER
10 select DRM_KMS_HELPER11 select DRM_KMS_HELPER
11 select DRM_MIPI_DSI12 select DRM_MIPI_DSI
12 select DRM_PANEL13 select DRM_PANEL
13 select MEMORY14 select MEMORY
14 select MTK_MMSYS
15 select MTK_SMI15 select MTK_SMI
16 select VIDEOMODE_HELPERS16 select VIDEOMODE_HELPERS
17 help17 help
drivers/gpu/drm/mediatek/mtk_drm_crtc.c+2−6
@@ -193,7 +193,6 @@ static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc) · 192 unmodified lines
193 int ret;193 int ret;
194 int i;194 int i;
195 195
196 DRM_DEBUG_DRIVER("%s\n", __func__);
197 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {196 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
198 ret = clk_prepare_enable(mtk_crtc->ddp_comp[i]->clk);197 ret = clk_prepare_enable(mtk_crtc->ddp_comp[i]->clk);
199 if (ret) {198 if (ret) {
@@ -213,7 +212,6 @@ static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc) · 13 unmodified lines
213{212{
214 int i;213 int i;
215 214
216 DRM_DEBUG_DRIVER("%s\n", __func__);
217 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)215 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
218 clk_disable_unprepare(mtk_crtc->ddp_comp[i]->clk);216 clk_disable_unprepare(mtk_crtc->ddp_comp[i]->clk);
219}217}
@@ -258,7 +256,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) · 38 unmodified lines
258 int ret;256 int ret;
259 int i;257 int i;
260 258
261 DRM_DEBUG_DRIVER("%s\n", __func__);
262 if (WARN_ON(!crtc->state))259 if (WARN_ON(!crtc->state))
263 return -EINVAL;260 return -EINVAL;
264 261
@@ -299,7 +296,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) · 34 unmodified lines
299 goto err_mutex_unprepare;296 goto err_mutex_unprepare;
300 }297 }
301 298
302 DRM_DEBUG_DRIVER("mediatek_ddp_ddp_path_setup\n");
303 for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {299 for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
304 mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,300 mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,
305 mtk_crtc->ddp_comp[i]->id,301 mtk_crtc->ddp_comp[i]->id,
@@ -349,7 +345,6 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) · 43 unmodified lines
349 struct drm_crtc *crtc = &mtk_crtc->base;345 struct drm_crtc *crtc = &mtk_crtc->base;
350 int i;346 int i;
351 347
352 DRM_DEBUG_DRIVER("%s\n", __func__);
353 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {348 for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
354 mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);349 mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);
355 if (i == 1)350 if (i == 1)
@@ -831,7 +826,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, · 475 unmodified lines
831 826
832#if IS_REACHABLE(CONFIG_MTK_CMDQ)827#if IS_REACHABLE(CONFIG_MTK_CMDQ)
833 mtk_crtc->cmdq_client =828 mtk_crtc->cmdq_client =
834 cmdq_mbox_create(dev, drm_crtc_index(&mtk_crtc->base),829 cmdq_mbox_create(mtk_crtc->mmsys_dev,
830 drm_crtc_index(&mtk_crtc->base),
835 2000);831 2000);
836 if (IS_ERR(mtk_crtc->cmdq_client)) {832 if (IS_ERR(mtk_crtc->cmdq_client)) {
837 dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing register by CPU now\n",833 dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing register by CPU now\n",
drivers/gpu/drm/mediatek/mtk_drm_drv.c+2−4
@@ -444,7 +444,6 @@ static int mtk_drm_probe(struct platform_device *pdev) · 443 unmodified lines
444 if (!private)444 if (!private)
445 return -ENOMEM;445 return -ENOMEM;
446 446
447 private->data = of_device_get_match_data(dev);
448 private->mmsys_dev = dev->parent;447 private->mmsys_dev = dev->parent;
449 if (!private->mmsys_dev) {448 if (!private->mmsys_dev) {
450 dev_err(dev, "Failed to get MMSYS device\n");449 dev_err(dev, "Failed to get MMSYS device\n");
@@ -514,7 +513,8 @@ static int mtk_drm_probe(struct platform_device *pdev) · 63 unmodified lines
514 goto err_node;513 goto err_node;
515 }514 }
516 515
517 ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);516 ret = mtk_ddp_comp_init(dev->parent, node, comp,
517 comp_id, NULL);
518 if (ret) {518 if (ret) {
519 of_node_put(node);519 of_node_put(node);
520 goto err_node;520 goto err_node;
@@ -571,7 +571,6 @@ static int mtk_drm_sys_suspend(struct device *dev) · 50 unmodified lines
571 int ret;571 int ret;
572 572
573 ret = drm_mode_config_helper_suspend(drm);573 ret = drm_mode_config_helper_suspend(drm);
574 DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
575 574
576 return ret;575 return ret;
577}576}
@@ -583,7 +582,6 @@ static int mtk_drm_sys_resume(struct device *dev) · 5 unmodified lines
583 int ret;582 int ret;
584 583
585 ret = drm_mode_config_helper_resume(drm);584 ret = drm_mode_config_helper_resume(drm);
586 DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
587 585
588 return ret;586 return ret;
589}587}
drivers/gpu/drm/mediatek/mtk_drm_plane.c+15−10
@@ -164,6 +164,16 @@ static int mtk_plane_atomic_check(struct drm_plane *plane, · 163 unmodified lines
164 true, true);164 true, true);
165}165}
166 166
167static void mtk_plane_atomic_disable(struct drm_plane *plane,
168 struct drm_plane_state *old_state)
169{
170 struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
171
172 state->pending.enable = false;
173 wmb(); /* Make sure the above parameter is set before update */
174 state->pending.dirty = true;
175}
176
167static void mtk_plane_atomic_update(struct drm_plane *plane,177static void mtk_plane_atomic_update(struct drm_plane *plane,
168 struct drm_plane_state *old_state)178 struct drm_plane_state *old_state)
169{179{
@@ -178,6 +188,11 @@ static void mtk_plane_atomic_update(struct drm_plane *plane, · 8 unmodified lines
178 if (!crtc || WARN_ON(!fb))188 if (!crtc || WARN_ON(!fb))
179 return;189 return;
180 190
191 if (!plane->state->visible) {
192 mtk_plane_atomic_disable(plane, old_state);
193 return;
194 }
195
181 gem = fb->obj[0];196 gem = fb->obj[0];
182 mtk_gem = to_mtk_gem_obj(gem);197 mtk_gem = to_mtk_gem_obj(gem);
183 addr = mtk_gem->dma_addr;198 addr = mtk_gem->dma_addr;
@@ -200,16 +215,6 @@ static void mtk_plane_atomic_update(struct drm_plane *plane, · 16 unmodified lines
200 state->pending.dirty = true;215 state->pending.dirty = true;
201}216}
202 217
203static void mtk_plane_atomic_disable(struct drm_plane *plane,
204 struct drm_plane_state *old_state)
205{
206 struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
207
208 state->pending.enable = false;
209 wmb(); /* Make sure the above parameter is set before update */
210 state->pending.dirty = true;
211}
212
213static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {218static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
214 .prepare_fb = drm_gem_fb_prepare_fb,219 .prepare_fb = drm_gem_fb_prepare_fb,
215 .atomic_check = mtk_plane_atomic_check,220 .atomic_check = mtk_plane_atomic_check,
drivers/gpu/drm/mediatek/mtk_dsi.c+1−4
@@ -316,10 +316,7 @@ static void mtk_dsi_lane0_ulp_mode_leave(struct mtk_dsi *dsi) · 315 unmodified lines
316 316
317static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi)317static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi)
318{318{
319 u32 tmp_reg1;319 return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN;
320
321 tmp_reg1 = readl(dsi->regs + DSI_PHY_LCCON);
322 return ((tmp_reg1 & LC_HS_TX_EN) == 1) ? true : false;
323}320}
324 321
325static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter)322static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter)
drivers/gpu/drm/mediatek/mtk_hdmi.c+1−11
@@ -1630,8 +1630,6 @@ static int mtk_hdmi_audio_startup(struct device *dev, void *data) · 1629 unmodified lines
1630{1630{
1631 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);1631 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1632 1632
1633 dev_dbg(dev, "%s\n", __func__);
1634
1635 mtk_hdmi_audio_enable(hdmi);1633 mtk_hdmi_audio_enable(hdmi);
1636 1634
1637 return 0;1635 return 0;
@@ -1641,8 +1639,6 @@ static void mtk_hdmi_audio_shutdown(struct device *dev, void *data) · 3 unmodified lines
1641{1639{
1642 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);1640 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1643 1641
1644 dev_dbg(dev, "%s\n", __func__);
1645
1646 mtk_hdmi_audio_disable(hdmi);1642 mtk_hdmi_audio_disable(hdmi);
1647}1643}
1648 1644
@@ -1651,8 +1647,6 @@ mtk_hdmi_audio_digital_mute(struct device *dev, void *data, bool enable) · 2 unmodified lines
1651{1647{
1652 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);1648 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1653 1649
1654 dev_dbg(dev, "%s(%d)\n", __func__, enable);
1655
1656 if (enable)1650 if (enable)
1657 mtk_hdmi_hw_aud_mute(hdmi);1651 mtk_hdmi_hw_aud_mute(hdmi);
1658 else1652 else
@@ -1665,8 +1659,6 @@ static int mtk_hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, · 6 unmodified lines
1665{1659{
1666 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);1660 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1667 1661
1668 dev_dbg(dev, "%s\n", __func__);
1669
1670 memcpy(buf, hdmi->conn.eld, min(sizeof(hdmi->conn.eld), len));1662 memcpy(buf, hdmi->conn.eld, min(sizeof(hdmi->conn.eld), len));
1671 1663
1672 return 0;1664 return 0;
@@ -1766,7 +1758,6 @@ static int mtk_drm_hdmi_probe(struct platform_device *pdev) · 93 unmodified lines
1766 goto err_bridge_remove;1758 goto err_bridge_remove;
1767 }1759 }
1768 1760
1769 dev_dbg(dev, "mediatek hdmi probe success\n");
1770 return 0;1761 return 0;
1771 1762
1772err_bridge_remove:1763err_bridge_remove:
@@ -1789,7 +1780,7 @@ static int mtk_hdmi_suspend(struct device *dev) · 16 unmodified lines
1789 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);1780 struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
1790 1781
1791 mtk_hdmi_clk_disable_audio(hdmi);1782 mtk_hdmi_clk_disable_audio(hdmi);
1792 dev_dbg(dev, "hdmi suspend success!\n");1783
1793 return 0;1784 return 0;
1794}1785}
1795 1786
@@ -1804,7 +1795,6 @@ static int mtk_hdmi_resume(struct device *dev) · 8 unmodified lines
1804 return ret;1795 return ret;
1805 }1796 }
1806 1797
1807 dev_dbg(dev, "hdmi resume success!\n");
1808 return 0;1798 return 0;
1809}1799}
1810#endif1800#endif
drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c+0−52
@@ -107,60 +107,10 @@ · 106 unmodified lines
107#define RGS_HDMITX_5T1_EDG (0xf << 4)107#define RGS_HDMITX_5T1_EDG (0xf << 4)
108#define RGS_HDMITX_PLUG_TST BIT(0)108#define RGS_HDMITX_PLUG_TST BIT(0)
109 109
110static const u8 PREDIV[3][4] = {
111 {0x0, 0x0, 0x0, 0x0}, /* 27Mhz */
112 {0x1, 0x1, 0x1, 0x1}, /* 74Mhz */
113 {0x1, 0x1, 0x1, 0x1} /* 148Mhz */
114};
115
116static const u8 TXDIV[3][4] = {
117 {0x3, 0x3, 0x3, 0x2}, /* 27Mhz */
118 {0x2, 0x1, 0x1, 0x1}, /* 74Mhz */
119 {0x1, 0x0, 0x0, 0x0} /* 148Mhz */
120};
121
122static const u8 FBKSEL[3][4] = {
123 {0x1, 0x1, 0x1, 0x1}, /* 27Mhz */
124 {0x1, 0x0, 0x1, 0x1}, /* 74Mhz */
125 {0x1, 0x0, 0x1, 0x1} /* 148Mhz */
126};
127
128static const u8 FBKDIV[3][4] = {
129 {19, 24, 29, 19}, /* 27Mhz */
130 {19, 24, 14, 19}, /* 74Mhz */
131 {19, 24, 14, 19} /* 148Mhz */
132};
133
134static const u8 DIVEN[3][4] = {
135 {0x2, 0x1, 0x1, 0x2}, /* 27Mhz */
136 {0x2, 0x2, 0x2, 0x2}, /* 74Mhz */
137 {0x2, 0x2, 0x2, 0x2} /* 148Mhz */
138};
139
140static const u8 HTPLLBP[3][4] = {
141 {0xc, 0xc, 0x8, 0xc}, /* 27Mhz */
142 {0xc, 0xf, 0xf, 0xc}, /* 74Mhz */
143 {0xc, 0xf, 0xf, 0xc} /* 148Mhz */
144};
145
146static const u8 HTPLLBC[3][4] = {
147 {0x2, 0x3, 0x3, 0x2}, /* 27Mhz */
148 {0x2, 0x3, 0x3, 0x2}, /* 74Mhz */
149 {0x2, 0x3, 0x3, 0x2} /* 148Mhz */
150};
151
152static const u8 HTPLLBR[3][4] = {
153 {0x1, 0x1, 0x0, 0x1}, /* 27Mhz */
154 {0x1, 0x2, 0x2, 0x1}, /* 74Mhz */
155 {0x1, 0x2, 0x2, 0x1} /* 148Mhz */
156};
157
158static int mtk_hdmi_pll_prepare(struct clk_hw *hw)110static int mtk_hdmi_pll_prepare(struct clk_hw *hw)
159{111{
160 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);112 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
161 113
162 dev_dbg(hdmi_phy->dev, "%s\n", __func__);
163
164 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN);114 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN);
165 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);115 mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);
166 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_MHLCK_EN);116 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_MHLCK_EN);
@@ -178,8 +128,6 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw) · 11 unmodified lines
178{128{
179 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);129 struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
180 130
181 dev_dbg(hdmi_phy->dev, "%s\n", __func__);
182
183 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN);131 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN);
184 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN);132 mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN);
185 usleep_range(100, 150);133 usleep_range(100, 150);
drivers/gpu/drm/meson/meson_registers.h+6−0
@@ -261,6 +261,12 @@ · 260 unmodified lines
261#define VIU_OSD_FIFO_DEPTH_VAL(val) ((val & 0x7f) << 12)261#define VIU_OSD_FIFO_DEPTH_VAL(val) ((val & 0x7f) << 12)
262#define VIU_OSD_WORDS_PER_BURST(words) (((words & 0x4) >> 1) << 22)262#define VIU_OSD_WORDS_PER_BURST(words) (((words & 0x4) >> 1) << 22)
263#define VIU_OSD_FIFO_LIMITS(size) ((size & 0xf) << 24)263#define VIU_OSD_FIFO_LIMITS(size) ((size & 0xf) << 24)
264#define VIU_OSD_BURST_LENGTH_24 (0x0 << 31 | 0x0 << 10)
265#define VIU_OSD_BURST_LENGTH_32 (0x0 << 31 | 0x1 << 10)
266#define VIU_OSD_BURST_LENGTH_48 (0x0 << 31 | 0x2 << 10)
267#define VIU_OSD_BURST_LENGTH_64 (0x0 << 31 | 0x3 << 10)
268#define VIU_OSD_BURST_LENGTH_96 (0x1 << 31 | 0x0 << 10)
269#define VIU_OSD_BURST_LENGTH_128 (0x1 << 31 | 0x1 << 10)
264 270
265#define VD1_IF0_GEN_REG 0x1a50271#define VD1_IF0_GEN_REG 0x1a50
266#define VD1_IF0_CANVAS0 0x1a51272#define VD1_IF0_CANVAS0 0x1a51
drivers/gpu/drm/meson/meson_viu.c+2−9
@@ -411,13 +411,6 @@ void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv) · 410 unmodified lines
411 priv->io_base + _REG(VIU_MISC_CTRL1));411 priv->io_base + _REG(VIU_MISC_CTRL1));
412}412}
413 413
414static inline uint32_t meson_viu_osd_burst_length_reg(uint32_t length)
415{
416 uint32_t val = (((length & 0x80) % 24) / 12);
417
418 return (((val & 0x3) << 10) | (((val & 0x4) >> 2) << 31));
419}
420
421void meson_viu_init(struct meson_drm *priv)414void meson_viu_init(struct meson_drm *priv)
422{415{
423 uint32_t reg;416 uint32_t reg;
@@ -444,9 +437,9 @@ void meson_viu_init(struct meson_drm *priv) · 20 unmodified lines
444 VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */437 VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */
445 438
446 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))439 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A))
447 reg |= meson_viu_osd_burst_length_reg(32);440 reg |= VIU_OSD_BURST_LENGTH_32;
448 else441 else
449 reg |= meson_viu_osd_burst_length_reg(64);442 reg |= VIU_OSD_BURST_LENGTH_64;
450 443
451 writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT));444 writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT));
452 writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT));445 writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT));
drivers/gpu/drm/nouveau/dispnv50/disp.c+5−2
@@ -601,6 +601,9 @@ nv50_audio_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) · 600 unmodified lines
601 (0x0100 << nv_crtc->index),601 (0x0100 << nv_crtc->index),
602 };602 };
603 603
604 if (!nv_encoder->audio)
605 return;
606
604 nv_encoder->audio = false;607 nv_encoder->audio = false;
605 nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));608 nvif_mthd(&disp->disp->object, 0, &args, sizeof(args));
606 609
@@ -2070,7 +2073,7 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) · 1463 unmodified lines
2070 */2073 */
2071 if (core->assign_windows) {2074 if (core->assign_windows) {
2072 core->func->wndw.owner(core);2075 core->func->wndw.owner(core);
2073 core->func->update(core, interlock, false);2076 nv50_disp_atomic_commit_core(state, interlock);
2074 core->assign_windows = false;2077 core->assign_windows = false;
2075 interlock[NV50_DISP_INTERLOCK_CORE] = 0;2078 interlock[NV50_DISP_INTERLOCK_CORE] = 0;
2076 }2079 }
@@ -2503,7 +2506,7 @@ nv50_display_create(struct drm_device *dev) · 426 unmodified lines
2503 if (disp->disp->object.oclass >= TU102_DISP)2506 if (disp->disp->object.oclass >= TU102_DISP)
2504 nouveau_display(dev)->format_modifiers = wndwc57e_modifiers;2507 nouveau_display(dev)->format_modifiers = wndwc57e_modifiers;
2505 else2508 else
2506 if (disp->disp->object.oclass >= GF110_DISP)2509 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_FERMI)
2507 nouveau_display(dev)->format_modifiers = disp90xx_modifiers;2510 nouveau_display(dev)->format_modifiers = disp90xx_modifiers;
2508 else2511 else
2509 nouveau_display(dev)->format_modifiers = disp50xx_modifiers;2512 nouveau_display(dev)->format_modifiers = disp50xx_modifiers;
drivers/gpu/drm/nouveau/nouveau_display.c+25−2
@@ -191,6 +191,7 @@ nouveau_decode_mod(struct nouveau_drm *drm, · 190 unmodified lines
191 uint32_t *tile_mode,191 uint32_t *tile_mode,
192 uint8_t *kind)192 uint8_t *kind)
193{193{
194 struct nouveau_display *disp = nouveau_display(drm->dev);
194 BUG_ON(!tile_mode || !kind);195 BUG_ON(!tile_mode || !kind);
195 196
196 if (modifier == DRM_FORMAT_MOD_LINEAR) {197 if (modifier == DRM_FORMAT_MOD_LINEAR) {
@@ -202,6 +203,12 @@ nouveau_decode_mod(struct nouveau_drm *drm, · 5 unmodified lines
202 * Extract the block height and kind from the corresponding203 * Extract the block height and kind from the corresponding
203 * modifier fields. See drm_fourcc.h for details.204 * modifier fields. See drm_fourcc.h for details.
204 */205 */
206
207 if ((modifier & (0xffull << 12)) == 0ull) {
208 /* Legacy modifier. Translate to this dev's 'kind.' */
209 modifier |= disp->format_modifiers[0] & (0xffull << 12);
210 }
211
205 *tile_mode = (uint32_t)(modifier & 0xF);212 *tile_mode = (uint32_t)(modifier & 0xF);
206 *kind = (uint8_t)((modifier >> 12) & 0xFF);213 *kind = (uint8_t)((modifier >> 12) & 0xFF);
207 214
@@ -227,6 +234,16 @@ nouveau_framebuffer_get_layout(struct drm_framebuffer *fb, · 19 unmodified lines
227 }234 }
228}235}
229 236
237static const u64 legacy_modifiers[] = {
238 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(0),
239 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(1),
240 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(2),
241 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(3),
242 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(4),
243 DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(5),
244 DRM_FORMAT_MOD_INVALID
245};
246
230static int247static int
231nouveau_validate_decode_mod(struct nouveau_drm *drm,248nouveau_validate_decode_mod(struct nouveau_drm *drm,
232 uint64_t modifier,249 uint64_t modifier,
@@ -247,8 +264,14 @@ nouveau_validate_decode_mod(struct nouveau_drm *drm, · 14 unmodified lines
247 (disp->format_modifiers[mod] != modifier);264 (disp->format_modifiers[mod] != modifier);
248 mod++);265 mod++);
249 266
250 if (disp->format_modifiers[mod] == DRM_FORMAT_MOD_INVALID)267 if (disp->format_modifiers[mod] == DRM_FORMAT_MOD_INVALID) {
251 return -EINVAL;268 for (mod = 0;
269 (legacy_modifiers[mod] != DRM_FORMAT_MOD_INVALID) &&
270 (legacy_modifiers[mod] != modifier);
271 mod++);
272 if (legacy_modifiers[mod] == DRM_FORMAT_MOD_INVALID)
273 return -EINVAL;
274 }
252 275
253 nouveau_decode_mod(drm, modifier, tile_mode, kind);276 nouveau_decode_mod(drm, modifier, tile_mode, kind);
254 277
drivers/gpu/drm/nouveau/nouveau_dmem.c+1−1
@@ -550,7 +550,7 @@ static unsigned long nouveau_dmem_migrate_copy_one(struct nouveau_drm *drm, · 549 unmodified lines
550 DMA_BIDIRECTIONAL);550 DMA_BIDIRECTIONAL);
551 if (dma_mapping_error(dev, *dma_addr))551 if (dma_mapping_error(dev, *dma_addr))
552 goto out_free_page;552 goto out_free_page;
553 if (drm->dmem->migrate.copy_func(drm, page_size(spage),553 if (drm->dmem->migrate.copy_func(drm, 1,
554 NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr))554 NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr))
555 goto out_dma_unmap;555 goto out_dma_unmap;
556 } else {556 } else {
drivers/gpu/drm/nouveau/nouveau_fbcon.c+2−1
@@ -315,7 +315,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper, · 314 unmodified lines
315 struct drm_framebuffer *fb;315 struct drm_framebuffer *fb;
316 struct nouveau_channel *chan;316 struct nouveau_channel *chan;
317 struct nouveau_bo *nvbo;317 struct nouveau_bo *nvbo;
318 struct drm_mode_fb_cmd2 mode_cmd;318 struct drm_mode_fb_cmd2 mode_cmd = {};
319 int ret;319 int ret;
320 320
321 mode_cmd.width = sizes->surface_width;321 mode_cmd.width = sizes->surface_width;
@@ -590,6 +590,7 @@ fini: · 268 unmodified lines
590 drm_fb_helper_fini(&fbcon->helper);590 drm_fb_helper_fini(&fbcon->helper);
591free:591free:
592 kfree(fbcon);592 kfree(fbcon);
593 drm->fbcon = NULL;
593 return ret;594 return ret;
594}595}
595 596
drivers/gpu/drm/nouveau/nouveau_svm.c+1−0
@@ -562,6 +562,7 @@ static int nouveau_range_fault(struct nouveau_svmm *svmm, · 561 unmodified lines
562 .end = notifier->notifier.interval_tree.last + 1,562 .end = notifier->notifier.interval_tree.last + 1,
563 .pfn_flags_mask = HMM_PFN_REQ_FAULT | HMM_PFN_REQ_WRITE,563 .pfn_flags_mask = HMM_PFN_REQ_FAULT | HMM_PFN_REQ_WRITE,
564 .hmm_pfns = hmm_pfns,564 .hmm_pfns = hmm_pfns,
565 .dev_private_owner = drm->dev,
565 };566 };
566 struct mm_struct *mm = notifier->notifier.mm;567 struct mm_struct *mm = notifier->notifier.mm;
567 int ret;568 int ret;
drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c+21−9
@@ -117,15 +117,6 @@ nvkm_outp_acquire_hda(struct nvkm_outp *outp, enum nvkm_ior_type type, · 116 unmodified lines
117{117{
118 struct nvkm_ior *ior;118 struct nvkm_ior *ior;
119 119
120 /* First preference is to reuse the OR that is currently armed
121 * on HW, if any, in order to prevent unnecessary switching.
122 */
123 list_for_each_entry(ior, &outp->disp->ior, head) {
124 if (!ior->identity && !!ior->func->hda.hpd == hda &&
125 !ior->asy.outp && ior->arm.outp == outp)
126 return nvkm_outp_acquire_ior(outp, user, ior);
127 }
128
129 /* Failing that, a completely unused OR is the next best thing. */120 /* Failing that, a completely unused OR is the next best thing. */
130 list_for_each_entry(ior, &outp->disp->ior, head) {121 list_for_each_entry(ior, &outp->disp->ior, head) {
131 if (!ior->identity && !!ior->func->hda.hpd == hda &&122 if (!ior->identity && !!ior->func->hda.hpd == hda &&
@@ -173,6 +164,27 @@ nvkm_outp_acquire(struct nvkm_outp *outp, u8 user, bool hda) · 41 unmodified lines
173 return nvkm_outp_acquire_ior(outp, user, ior);164 return nvkm_outp_acquire_ior(outp, user, ior);
174 }165 }
175 166
167 /* First preference is to reuse the OR that is currently armed
168 * on HW, if any, in order to prevent unnecessary switching.
169 */
170 list_for_each_entry(ior, &outp->disp->ior, head) {
171 if (!ior->identity && !ior->asy.outp && ior->arm.outp == outp) {
172 /*XXX: For various complicated reasons, we can't outright switch
173 * the boot-time OR on the first modeset without some fairly
174 * invasive changes.
175 *
176 * The systems that were fixed by modifying the OR selection
177 * code to account for HDA support shouldn't regress here as
178 * the HDA-enabled ORs match the relevant output's pad macro
179 * index, and the firmware seems to select an OR this way.
180 *
181 * This warning is to make it obvious if that proves wrong.
182 */
183 WARN_ON(hda && !ior->func->hda.hpd);
184 return nvkm_outp_acquire_ior(outp, user, ior);
185 }
186 }
187
176 /* If we don't need HDA, first try to acquire an OR that doesn't188 /* If we don't need HDA, first try to acquire an OR that doesn't
177 * support it to leave free the ones that do.189 * support it to leave free the ones that do.
178 */190 */
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxg94.c+2−2
@@ -118,10 +118,10 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 117 unmodified lines
118 if (retries)118 if (retries)
119 udelay(400);119 udelay(400);
120 120
121 /* transaction request, wait up to 1ms for it to complete */121 /* transaction request, wait up to 2ms for it to complete */
122 nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl);122 nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl);
123 123
124 timeout = 1000;124 timeout = 2000;
125 do {125 do {
126 ctrl = nvkm_rd32(device, 0x00e4e4 + base);126 ctrl = nvkm_rd32(device, 0x00e4e4 + base);
127 udelay(1);127 udelay(1);
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/auxgm200.c+2−2
@@ -118,10 +118,10 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 117 unmodified lines
118 if (retries)118 if (retries)
119 udelay(400);119 udelay(400);
120 120
121 /* transaction request, wait up to 1ms for it to complete */121 /* transaction request, wait up to 2ms for it to complete */
122 nvkm_wr32(device, 0x00d954 + base, 0x00010000 | ctrl);122 nvkm_wr32(device, 0x00d954 + base, 0x00010000 | ctrl);
123 123
124 timeout = 1000;124 timeout = 2000;
125 do {125 do {
126 ctrl = nvkm_rd32(device, 0x00d954 + base);126 ctrl = nvkm_rd32(device, 0x00d954 + base);
127 udelay(1);127 udelay(1);
drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c+3−3
@@ -615,9 +615,9 @@ static const struct panel_desc boe_tv101wum_nl6_desc = { · 614 unmodified lines
615static const struct drm_display_mode auo_kd101n80_45na_default_mode = {615static const struct drm_display_mode auo_kd101n80_45na_default_mode = {
616 .clock = 157000,616 .clock = 157000,
617 .hdisplay = 1200,617 .hdisplay = 1200,
618 .hsync_start = 1200 + 80,618 .hsync_start = 1200 + 60,
619 .hsync_end = 1200 + 80 + 24,619 .hsync_end = 1200 + 60 + 24,
620 .htotal = 1200 + 80 + 24 + 36,620 .htotal = 1200 + 60 + 24 + 56,
621 .vdisplay = 1920,621 .vdisplay = 1920,
622 .vsync_start = 1920 + 16,622 .vsync_start = 1920 + 16,
623 .vsync_end = 1920 + 16 + 4,623 .vsync_end = 1920 + 16 + 4,
drivers/gpu/drm/panel/panel-simple.c+15−1
@@ -1250,7 +1250,21 @@ static const struct panel_desc boe_nv133fhm_n61 = { · 1249 unmodified lines
1250 .height = 165,1250 .height = 165,
1251 },1251 },
1252 .delay = {1252 .delay = {
1253 .hpd_absent_delay = 200,1253 /*
1254 * When power is first given to the panel there's a short
1255 * spike on the HPD line. It was explained that this spike
1256 * was until the TCON data download was complete. On
1257 * one system this was measured at 8 ms. We'll put 15 ms
1258 * in the prepare delay just to be safe and take it away
1259 * from the hpd_absent_delay (which would otherwise be 200 ms)
1260 * to handle this. That means:
1261 * - If HPD isn't hooked up you still have 200 ms delay.
1262 * - If HPD is hooked up we won't try to look at it for the
1263 * first 15 ms.
1264 */
1265 .prepare = 15,
1266 .hpd_absent_delay = 185,
1267
1254 .unprepare = 500,1268 .unprepare = 500,
1255 },1269 },
1256 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,1270 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
drivers/gpu/drm/radeon/ci_dpm.c+3−4
@@ -5563,6 +5563,7 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 5562 unmodified lines
5563 if (!rdev->pm.dpm.ps)5563 if (!rdev->pm.dpm.ps)
5564 return -ENOMEM;5564 return -ENOMEM;
5565 power_state_offset = (u8 *)state_array->states;5565 power_state_offset = (u8 *)state_array->states;
5566 rdev->pm.dpm.num_ps = 0;
5566 for (i = 0; i < state_array->ucNumEntries; i++) {5567 for (i = 0; i < state_array->ucNumEntries; i++) {
5567 u8 *idx;5568 u8 *idx;
5568 power_state = (union pplib_power_state *)power_state_offset;5569 power_state = (union pplib_power_state *)power_state_offset;
@@ -5572,10 +5573,8 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 3 unmodified lines
5572 if (!rdev->pm.power_state[i].clock_info)5573 if (!rdev->pm.power_state[i].clock_info)
5573 return -EINVAL;5574 return -EINVAL;
5574 ps = kzalloc(sizeof(struct ci_ps), GFP_KERNEL);5575 ps = kzalloc(sizeof(struct ci_ps), GFP_KERNEL);
5575 if (ps == NULL) {5576 if (ps == NULL)
5576 kfree(rdev->pm.dpm.ps);
5577 return -ENOMEM;5577 return -ENOMEM;
5578 }
5579 rdev->pm.dpm.ps[i].ps_priv = ps;5578 rdev->pm.dpm.ps[i].ps_priv = ps;
5580 ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],5579 ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
5581 non_clock_info,5580 non_clock_info,
@@ -5597,8 +5596,8 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 15 unmodified lines
5597 k++;5596 k++;
5598 }5597 }
5599 power_state_offset += 2 + power_state->v2.ucNumDPMLevels;5598 power_state_offset += 2 + power_state->v2.ucNumDPMLevels;
5599 rdev->pm.dpm.num_ps = i + 1;
5600 }5600 }
5601 rdev->pm.dpm.num_ps = state_array->ucNumEntries;
5602 5601
5603 /* fill in the vce power states */5602 /* fill in the vce power states */
5604 for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) {5603 for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) {
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c+1−1
@@ -260,7 +260,7 @@ sun4i_hdmi_connector_detect(struct drm_connector *connector, bool force) · 259 unmodified lines
260 unsigned long reg;260 unsigned long reg;
261 261
262 reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG);262 reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG);
263 if (reg & SUN4I_HDMI_HPD_HIGH) {263 if (!(reg & SUN4I_HDMI_HPD_HIGH)) {
264 cec_phys_addr_invalidate(hdmi->cec_adap);264 cec_phys_addr_invalidate(hdmi->cec_adap);
265 return connector_status_disconnected;265 return connector_status_disconnected;
266 }266 }
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c+4−4
@@ -1069,10 +1069,6 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 1068 unmodified lines
1069 if (new_content_type != SAME_AS_DISPLAY) {1069 if (new_content_type != SAME_AS_DISPLAY) {
1070 struct vmw_surface_metadata metadata = {0};1070 struct vmw_surface_metadata metadata = {0};
1071 1071
1072 metadata.base_size.width = hdisplay;
1073 metadata.base_size.height = vdisplay;
1074 metadata.base_size.depth = 1;
1075
1076 /*1072 /*
1077 * If content buffer is a buffer object, then we have to1073 * If content buffer is a buffer object, then we have to
1078 * construct surface info1074 * construct surface info
@@ -1104,6 +1100,10 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 25 unmodified lines
1104 metadata = new_vfbs->surface->metadata;1100 metadata = new_vfbs->surface->metadata;
1105 }1101 }
1106 1102
1103 metadata.base_size.width = hdisplay;
1104 metadata.base_size.height = vdisplay;
1105 metadata.base_size.depth = 1;
1106
1107 if (vps->surf) {1107 if (vps->surf) {
1108 struct drm_vmw_size cur_base_size =1108 struct drm_vmw_size cur_base_size =
1109 vps->surf->metadata.base_size;1109 vps->surf->metadata.base_size;
drivers/hid/hid-alps.c+2−0
@@ -25,6 +25,7 @@ · 24 unmodified lines
25 25
26#define U1_MOUSE_REPORT_ID 0x01 /* Mouse data ReportID */26#define U1_MOUSE_REPORT_ID 0x01 /* Mouse data ReportID */
27#define U1_ABSOLUTE_REPORT_ID 0x03 /* Absolute data ReportID */27#define U1_ABSOLUTE_REPORT_ID 0x03 /* Absolute data ReportID */
28#define U1_ABSOLUTE_REPORT_ID_SECD 0x02 /* FW-PTP Absolute data ReportID */
28#define U1_FEATURE_REPORT_ID 0x05 /* Feature ReportID */29#define U1_FEATURE_REPORT_ID 0x05 /* Feature ReportID */
29#define U1_SP_ABSOLUTE_REPORT_ID 0x06 /* Feature ReportID */30#define U1_SP_ABSOLUTE_REPORT_ID 0x06 /* Feature ReportID */
30 31
@@ -368,6 +369,7 @@ static int u1_raw_event(struct alps_dev *hdata, u8 *data, int size) · 337 unmodified lines
368 case U1_FEATURE_REPORT_ID:369 case U1_FEATURE_REPORT_ID:
369 break;370 break;
370 case U1_ABSOLUTE_REPORT_ID:371 case U1_ABSOLUTE_REPORT_ID:
372 case U1_ABSOLUTE_REPORT_ID_SECD:
371 for (i = 0; i < hdata->max_fingers; i++) {373 for (i = 0; i < hdata->max_fingers; i++) {
372 u8 *contact = &data[i * 5];374 u8 *contact = &data[i * 5];
373 375
drivers/hid/hid-apple.c+18−0
@@ -60,6 +60,7 @@ MODULE_PARM_DESC(swap_fn_leftctrl, "Swap the Fn and left Control keys. " · 59 unmodified lines
60struct apple_sc {60struct apple_sc {
61 unsigned long quirks;61 unsigned long quirks;
62 unsigned int fn_on;62 unsigned int fn_on;
63 unsigned int fn_found;
63 DECLARE_BITMAP(pressed_numlock, KEY_CNT);64 DECLARE_BITMAP(pressed_numlock, KEY_CNT);
64};65};
65 66
@@ -365,12 +366,15 @@ static int apple_input_mapping(struct hid_device *hdev, struct hid_input *hi, · 299 unmodified lines
365 struct hid_field *field, struct hid_usage *usage,366 struct hid_field *field, struct hid_usage *usage,
366 unsigned long **bit, int *max)367 unsigned long **bit, int *max)
367{368{
369 struct apple_sc *asc = hid_get_drvdata(hdev);
370
368 if (usage->hid == (HID_UP_CUSTOM | 0x0003) ||371 if (usage->hid == (HID_UP_CUSTOM | 0x0003) ||
369 usage->hid == (HID_UP_MSVENDOR | 0x0003) ||372 usage->hid == (HID_UP_MSVENDOR | 0x0003) ||
370 usage->hid == (HID_UP_HPVENDOR2 | 0x0003)) {373 usage->hid == (HID_UP_HPVENDOR2 | 0x0003)) {
371 /* The fn key on Apple USB keyboards */374 /* The fn key on Apple USB keyboards */
372 set_bit(EV_REP, hi->input->evbit);375 set_bit(EV_REP, hi->input->evbit);
373 hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN);376 hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN);
377 asc->fn_found = true;
374 apple_setup_input(hi->input);378 apple_setup_input(hi->input);
375 return 1;379 return 1;
376 }380 }
@@ -397,6 +401,19 @@ static int apple_input_mapped(struct hid_device *hdev, struct hid_input *hi, · 20 unmodified lines
397 return 0;401 return 0;
398}402}
399 403
404static int apple_input_configured(struct hid_device *hdev,
405 struct hid_input *hidinput)
406{
407 struct apple_sc *asc = hid_get_drvdata(hdev);
408
409 if ((asc->quirks & APPLE_HAS_FN) && !asc->fn_found) {
410 hid_info(hdev, "Fn key not found (Apple Wireless Keyboard clone?), disabling Fn key handling\n");
411 asc->quirks = 0;
412 }
413
414 return 0;
415}
416
400static int apple_probe(struct hid_device *hdev,417static int apple_probe(struct hid_device *hdev,
401 const struct hid_device_id *id)418 const struct hid_device_id *id)
402{419{
@@ -611,6 +628,7 @@ static struct hid_driver apple_driver = { · 208 unmodified lines
611 .event = apple_event,628 .event = apple_event,
612 .input_mapping = apple_input_mapping,629 .input_mapping = apple_input_mapping,
613 .input_mapped = apple_input_mapped,630 .input_mapped = apple_input_mapped,
631 .input_configured = apple_input_configured,
614};632};
615module_hid_driver(apple_driver);633module_hid_driver(apple_driver);
616 634
drivers/hid/hid-ids.h+3−0
@@ -618,6 +618,7 @@ · 617 unmodified lines
618#define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081 0xa081618#define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081 0xa081
619#define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2 0xa0c2619#define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2 0xa0c2
620#define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096 0xa096620#define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096 0xa096
621#define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A293 0xa293
621 622
622#define USB_VENDOR_ID_IMATION 0x0718623#define USB_VENDOR_ID_IMATION 0x0718
623#define USB_DEVICE_ID_DISC_STAKKA 0xd000624#define USB_DEVICE_ID_DISC_STAKKA 0xd000
@@ -998,6 +999,8 @@ · 374 unmodified lines
998#define USB_DEVICE_ID_ROCCAT_RYOS_MK_PRO 0x3232999#define USB_DEVICE_ID_ROCCAT_RYOS_MK_PRO 0x3232
999#define USB_DEVICE_ID_ROCCAT_SAVU 0x2d5a1000#define USB_DEVICE_ID_ROCCAT_SAVU 0x2d5a
1000 1001
1002#define USB_VENDOR_ID_SAI 0x17dd
1003
1001#define USB_VENDOR_ID_SAITEK 0x06a31004#define USB_VENDOR_ID_SAITEK 0x06a3
1002#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff171005#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17
1003#define USB_DEVICE_ID_SAITEK_PS1000 0x06211006#define USB_DEVICE_ID_SAITEK_PS1000 0x0621
drivers/hid/hid-logitech-dj.c+3−3
@@ -1153,7 +1153,7 @@ static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev) · 1152 unmodified lines
1153 if (!dj_report)1153 if (!dj_report)
1154 return -ENOMEM;1154 return -ENOMEM;
1155 dj_report->report_id = REPORT_ID_DJ_SHORT;1155 dj_report->report_id = REPORT_ID_DJ_SHORT;
1156 dj_report->device_index = 0xFF;1156 dj_report->device_index = HIDPP_RECEIVER_INDEX;
1157 dj_report->report_type = REPORT_TYPE_CMD_GET_PAIRED_DEVICES;1157 dj_report->report_type = REPORT_TYPE_CMD_GET_PAIRED_DEVICES;
1158 retval = logi_dj_recv_send_report(djrcv_dev, dj_report);1158 retval = logi_dj_recv_send_report(djrcv_dev, dj_report);
1159 kfree(dj_report);1159 kfree(dj_report);
@@ -1175,7 +1175,7 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, · 15 unmodified lines
1175 1175
1176 if (djrcv_dev->type == recvr_type_dj) {1176 if (djrcv_dev->type == recvr_type_dj) {
1177 dj_report->report_id = REPORT_ID_DJ_SHORT;1177 dj_report->report_id = REPORT_ID_DJ_SHORT;
1178 dj_report->device_index = 0xFF;1178 dj_report->device_index = HIDPP_RECEIVER_INDEX;
1179 dj_report->report_type = REPORT_TYPE_CMD_SWITCH;1179 dj_report->report_type = REPORT_TYPE_CMD_SWITCH;
1180 dj_report->report_params[CMD_SWITCH_PARAM_DEVBITFIELD] = 0x3F;1180 dj_report->report_params[CMD_SWITCH_PARAM_DEVBITFIELD] = 0x3F;
1181 dj_report->report_params[CMD_SWITCH_PARAM_TIMEOUT_SECONDS] =1181 dj_report->report_params[CMD_SWITCH_PARAM_TIMEOUT_SECONDS] =
@@ -1204,7 +1204,7 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, · 22 unmodified lines
1204 memset(buf, 0, HIDPP_REPORT_SHORT_LENGTH);1204 memset(buf, 0, HIDPP_REPORT_SHORT_LENGTH);
1205 1205
1206 buf[0] = REPORT_ID_HIDPP_SHORT;1206 buf[0] = REPORT_ID_HIDPP_SHORT;
1207 buf[1] = 0xFF;1207 buf[1] = HIDPP_RECEIVER_INDEX;
1208 buf[2] = 0x80;1208 buf[2] = 0x80;
1209 buf[3] = 0x00;1209 buf[3] = 0x00;
1210 buf[4] = 0x00;1210 buf[4] = 0x00;
drivers/hid/hid-logitech-hidpp.c+1−1
@@ -3146,7 +3146,7 @@ static int hi_res_scroll_enable(struct hidpp_device *hidpp) · 3145 unmodified lines
3146 multiplier = 1;3146 multiplier = 1;
3147 3147
3148 hidpp->vertical_wheel_counter.wheel_multiplier = multiplier;3148 hidpp->vertical_wheel_counter.wheel_multiplier = multiplier;
3149 hid_info(hidpp->hid_dev, "multiplier = %d\n", multiplier);3149 hid_dbg(hidpp->hid_dev, "wheel multiplier = %d\n", multiplier);
3150 return 0;3150 return 0;
3151}3151}
3152 3152
drivers/hid/hid-magicmouse.c+6−0
@@ -535,6 +535,12 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd · 534 unmodified lines
535 __set_bit(MSC_RAW, input->mscbit);535 __set_bit(MSC_RAW, input->mscbit);
536 }536 }
537 537
538 /*
539 * hid-input may mark device as using autorepeat, but neither
540 * the trackpad, nor the mouse actually want it.
541 */
542 __clear_bit(EV_REP, input->evbit);
543
538 return 0;544 return 0;
539}545}
540 546
drivers/hid/hid-quirks.c+2−0
@@ -88,6 +88,7 @@ static const struct hid_device_id hid_quirks[] = { · 87 unmodified lines
88 { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },88 { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
89 { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },89 { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
90 { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096), HID_QUIRK_NO_INIT_REPORTS },90 { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096), HID_QUIRK_NO_INIT_REPORTS },
91 { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A293), HID_QUIRK_ALWAYS_POLL },
91 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A), HID_QUIRK_ALWAYS_POLL },92 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A), HID_QUIRK_ALWAYS_POLL },
92 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL },93 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL },
93 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL },94 { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL },
@@ -832,6 +833,7 @@ static const struct hid_device_id hid_ignore_list[] = { · 738 unmodified lines
832 { HID_USB_DEVICE(USB_VENDOR_ID_PETZL, USB_DEVICE_ID_PETZL_HEADLAMP) },833 { HID_USB_DEVICE(USB_VENDOR_ID_PETZL, USB_DEVICE_ID_PETZL_HEADLAMP) },
833 { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) },834 { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) },
834 { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) },835 { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) },
836 { HID_USB_DEVICE(USB_VENDOR_ID_SAI, USB_DEVICE_ID_CYPRESS_HIDCOM) },
835#if IS_ENABLED(CONFIG_MOUSE_SYNAPTICS_USB)837#if IS_ENABLED(CONFIG_MOUSE_SYNAPTICS_USB)
836 { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP) },838 { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP) },
837 { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_INT_TP) },839 { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_INT_TP) },
drivers/hid/hid-steam.c+4−2
@@ -526,7 +526,8 @@ static int steam_register(struct steam_device *steam) · 525 unmodified lines
526 steam_battery_register(steam);526 steam_battery_register(steam);
527 527
528 mutex_lock(&steam_devices_lock);528 mutex_lock(&steam_devices_lock);
529 list_add(&steam->list, &steam_devices);529 if (list_empty(&steam->list))
530 list_add(&steam->list, &steam_devices);
530 mutex_unlock(&steam_devices_lock);531 mutex_unlock(&steam_devices_lock);
531 }532 }
532 533
@@ -552,7 +553,7 @@ static void steam_unregister(struct steam_device *steam) · 19 unmodified lines
552 hid_info(steam->hdev, "Steam Controller '%s' disconnected",553 hid_info(steam->hdev, "Steam Controller '%s' disconnected",
553 steam->serial_no);554 steam->serial_no);
554 mutex_lock(&steam_devices_lock);555 mutex_lock(&steam_devices_lock);
555 list_del(&steam->list);556 list_del_init(&steam->list);
556 mutex_unlock(&steam_devices_lock);557 mutex_unlock(&steam_devices_lock);
557 steam->serial_no[0] = 0;558 steam->serial_no[0] = 0;
558 }559 }
@@ -738,6 +739,7 @@ static int steam_probe(struct hid_device *hdev, · 179 unmodified lines
738 mutex_init(&steam->mutex);739 mutex_init(&steam->mutex);
739 steam->quirks = id->driver_data;740 steam->quirks = id->driver_data;
740 INIT_WORK(&steam->work_connect, steam_work_connect_cb);741 INIT_WORK(&steam->work_connect, steam_work_connect_cb);
742 INIT_LIST_HEAD(&steam->list);
741 743
742 steam->client_hdev = steam_create_client_hid(hdev);744 steam->client_hdev = steam_create_client_hid(hdev);
743 if (IS_ERR(steam->client_hdev)) {745 if (IS_ERR(steam->client_hdev)) {
drivers/hid/i2c-hid/i2c-hid-dmi-quirks.c+8−0
@@ -373,6 +373,14 @@ static const struct dmi_system_id i2c_hid_dmi_desc_override_table[] = { · 372 unmodified lines
373 },373 },
374 .driver_data = (void *)&sipodev_desc374 .driver_data = (void *)&sipodev_desc
375 },375 },
376 {
377 .ident = "Mediacom FlexBook edge 13",
378 .matches = {
379 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDIACOM"),
380 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "FlexBook_edge13-M-FBE13"),
381 },
382 .driver_data = (void *)&sipodev_desc
383 },
376 {384 {
377 .ident = "Odys Winbook 13",385 .ident = "Odys Winbook 13",
378 .matches = {386 .matches = {
drivers/hwmon/amd_energy.c+1−1
@@ -362,7 +362,7 @@ static struct platform_driver amd_energy_driver = { · 361 unmodified lines
362static struct platform_device *amd_energy_platdev;362static struct platform_device *amd_energy_platdev;
363 363
364static const struct x86_cpu_id cpu_ids[] __initconst = {364static const struct x86_cpu_id cpu_ids[] __initconst = {
365 X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL),365 X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x17, 0x31, NULL),
366 {}366 {}
367};367};
368MODULE_DEVICE_TABLE(x86cpu, cpu_ids);368MODULE_DEVICE_TABLE(x86cpu, cpu_ids);
drivers/hwmon/aspeed-pwm-tacho.c+2−0
@@ -851,6 +851,8 @@ static int aspeed_create_fan(struct device *dev, · 850 unmodified lines
851 ret = of_property_read_u32(child, "reg", &pwm_port);851 ret = of_property_read_u32(child, "reg", &pwm_port);
852 if (ret)852 if (ret)
853 return ret;853 return ret;
854 if (pwm_port >= ARRAY_SIZE(pwm_port_params))
855 return -EINVAL;
854 aspeed_create_pwm_port(priv, (u8)pwm_port);856 aspeed_create_pwm_port(priv, (u8)pwm_port);
855 857
856 ret = of_property_count_u8_elems(child, "cooling-levels");858 ret = of_property_count_u8_elems(child, "cooling-levels");
drivers/hwmon/drivetemp.c+43−0
@@ -285,6 +285,42 @@ static int drivetemp_get_scttemp(struct drivetemp_data *st, u32 attr, long *val) · 284 unmodified lines
285 return err;285 return err;
286}286}
287 287
288static const char * const sct_avoid_models[] = {
289/*
290 * These drives will have WRITE FPDMA QUEUED command timeouts and sometimes just
291 * freeze until power-cycled under heavy write loads when their temperature is
292 * getting polled in SCT mode. The SMART mode seems to be fine, though.
293 *
294 * While only the 3 TB model (DT01ACA3) was actually caught exhibiting the
295 * problem let's play safe here to avoid data corruption and ban the whole
296 * DT01ACAx family.
297
298 * The models from this array are prefix-matched.
299 */
300 "TOSHIBA DT01ACA",
301};
302
303static bool drivetemp_sct_avoid(struct drivetemp_data *st)
304{
305 struct scsi_device *sdev = st->sdev;
306 unsigned int ctr;
307
308 if (!sdev->model)
309 return false;
310
311 /*
312 * The "model" field contains just the raw SCSI INQUIRY response
313 * "product identification" field, which has a width of 16 bytes.
314 * This field is space-filled, but is NOT NULL-terminated.
315 */
316 for (ctr = 0; ctr < ARRAY_SIZE(sct_avoid_models); ctr++)
317 if (!strncmp(sdev->model, sct_avoid_models[ctr],
318 strlen(sct_avoid_models[ctr])))
319 return true;
320
321 return false;
322}
323
288static int drivetemp_identify_sata(struct drivetemp_data *st)324static int drivetemp_identify_sata(struct drivetemp_data *st)
289{325{
290 struct scsi_device *sdev = st->sdev;326 struct scsi_device *sdev = st->sdev;
@@ -326,6 +362,13 @@ static int drivetemp_identify_sata(struct drivetemp_data *st) · 35 unmodified lines
326 /* bail out if this is not a SATA device */362 /* bail out if this is not a SATA device */
327 if (!is_ata || !is_sata)363 if (!is_ata || !is_sata)
328 return -ENODEV;364 return -ENODEV;
365
366 if (have_sct && drivetemp_sct_avoid(st)) {
367 dev_notice(&sdev->sdev_gendev,
368 "will avoid using SCT for temperature monitoring\n");
369 have_sct = false;
370 }
371
329 if (!have_sct)372 if (!have_sct)
330 goto skip_sct;373 goto skip_sct;
331 374
drivers/hwmon/emc2103.c+1−1
@@ -443,7 +443,7 @@ static ssize_t pwm1_enable_store(struct device *dev, · 442 unmodified lines
443 }443 }
444 444
445 result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg);445 result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg);
446 if (result) {446 if (result < 0) {
447 count = result;447 count = result;
448 goto err;448 goto err;
449 }449 }
drivers/hwmon/nct6775.c+3−3
@@ -786,13 +786,13 @@ static const char *const nct6798_temp_label[] = { · 785 unmodified lines
786 "Agent1 Dimm1",786 "Agent1 Dimm1",
787 "BYTE_TEMP0",787 "BYTE_TEMP0",
788 "BYTE_TEMP1",788 "BYTE_TEMP1",
789 "",789 "PECI Agent 0 Calibration", /* undocumented */
790 "",790 "PECI Agent 1 Calibration", /* undocumented */
791 "",791 "",
792 "Virtual_TEMP"792 "Virtual_TEMP"
793};793};
794 794
795#define NCT6798_TEMP_MASK 0x8fff0ffe795#define NCT6798_TEMP_MASK 0xbfff0ffe
796#define NCT6798_VIRT_TEMP_MASK 0x80000c00796#define NCT6798_VIRT_TEMP_MASK 0x80000c00
797 797
798/* NCT6102D/NCT6106D specific data */798/* NCT6102D/NCT6106D specific data */
drivers/hwmon/pmbus/adm1275.c+8−2
@@ -465,6 +465,7 @@ MODULE_DEVICE_TABLE(i2c, adm1275_id); · 464 unmodified lines
465static int adm1275_probe(struct i2c_client *client,465static int adm1275_probe(struct i2c_client *client,
466 const struct i2c_device_id *id)466 const struct i2c_device_id *id)
467{467{
468 s32 (*config_read_fn)(const struct i2c_client *client, u8 reg);
468 u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];469 u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1];
469 int config, device_config;470 int config, device_config;
470 int ret;471 int ret;
@@ -510,11 +511,16 @@ static int adm1275_probe(struct i2c_client *client, · 39 unmodified lines
510 "Device mismatch: Configured %s, detected %s\n",511 "Device mismatch: Configured %s, detected %s\n",
511 id->name, mid->name);512 id->name, mid->name);
512 513
513 config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG);514 if (mid->driver_data == adm1272 || mid->driver_data == adm1278 ||
515 mid->driver_data == adm1293 || mid->driver_data == adm1294)
516 config_read_fn = i2c_smbus_read_word_data;
517 else
518 config_read_fn = i2c_smbus_read_byte_data;
519 config = config_read_fn(client, ADM1275_PMON_CONFIG);
514 if (config < 0)520 if (config < 0)
515 return config;521 return config;
516 522
517 device_config = i2c_smbus_read_byte_data(client, ADM1275_DEVICE_CONFIG);523 device_config = config_read_fn(client, ADM1275_DEVICE_CONFIG);
518 if (device_config < 0)524 if (device_config < 0)
519 return device_config;525 return device_config;
520 526
drivers/hwmon/scmi-hwmon.c+1−1
@@ -147,7 +147,7 @@ static enum hwmon_sensor_types scmi_types[] = { · 146 unmodified lines
147 [ENERGY] = hwmon_energy,147 [ENERGY] = hwmon_energy,
148};148};
149 149
150static u32 hwmon_attributes[] = {150static u32 hwmon_attributes[hwmon_max] = {
151 [hwmon_chip] = HWMON_C_REGISTER_TZ,151 [hwmon_chip] = HWMON_C_REGISTER_TZ,
152 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,152 [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL,
153 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,153 [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL,
drivers/hwtracing/coresight/coresight-cti.c+54−42
@@ -747,17 +747,50 @@ static int cti_dying_cpu(unsigned int cpu) · 746 unmodified lines
747 return 0;747 return 0;
748}748}
749 749
750static int cti_pm_setup(struct cti_drvdata *drvdata)
751{
752 int ret;
753
754 if (drvdata->ctidev.cpu == -1)
755 return 0;
756
757 if (nr_cti_cpu)
758 goto done;
759
760 cpus_read_lock();
761 ret = cpuhp_setup_state_nocalls_cpuslocked(
762 CPUHP_AP_ARM_CORESIGHT_CTI_STARTING,
763 "arm/coresight_cti:starting",
764 cti_starting_cpu, cti_dying_cpu);
765 if (ret) {
766 cpus_read_unlock();
767 return ret;
768 }
769
770 ret = cpu_pm_register_notifier(&cti_cpu_pm_nb);
771 cpus_read_unlock();
772 if (ret) {
773 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING);
774 return ret;
775 }
776
777done:
778 nr_cti_cpu++;
779 cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata;
780
781 return 0;
782}
783
750/* release PM registrations */784/* release PM registrations */
751static void cti_pm_release(struct cti_drvdata *drvdata)785static void cti_pm_release(struct cti_drvdata *drvdata)
752{786{
753 if (drvdata->ctidev.cpu >= 0) {787 if (drvdata->ctidev.cpu == -1)
754 if (--nr_cti_cpu == 0) {788 return;
755 cpu_pm_unregister_notifier(&cti_cpu_pm_nb);
756 789
757 cpuhp_remove_state_nocalls(790 cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL;
758 CPUHP_AP_ARM_CORESIGHT_CTI_STARTING);791 if (--nr_cti_cpu == 0) {
759 }792 cpu_pm_unregister_notifier(&cti_cpu_pm_nb);
760 cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL;793 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING);
761 }794 }
762}795}
763 796
@@ -823,19 +856,14 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 59 unmodified lines
823 856
824 /* driver data*/857 /* driver data*/
825 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);858 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
826 if (!drvdata) {859 if (!drvdata)
827 ret = -ENOMEM;860 return -ENOMEM;
828 dev_info(dev, "%s, mem err\n", __func__);
829 goto err_out;
830 }
831 861
832 /* Validity for the resource is already checked by the AMBA core */862 /* Validity for the resource is already checked by the AMBA core */
833 base = devm_ioremap_resource(dev, res);863 base = devm_ioremap_resource(dev, res);
834 if (IS_ERR(base)) {864 if (IS_ERR(base))
835 ret = PTR_ERR(base);865 return PTR_ERR(base);
836 dev_err(dev, "%s, remap err\n", __func__);866
837 goto err_out;
838 }
839 drvdata->base = base;867 drvdata->base = base;
840 868
841 dev_set_drvdata(dev, drvdata);869 dev_set_drvdata(dev, drvdata);
@@ -854,8 +882,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 12 unmodified lines
854 pdata = coresight_cti_get_platform_data(dev);882 pdata = coresight_cti_get_platform_data(dev);
855 if (IS_ERR(pdata)) {883 if (IS_ERR(pdata)) {
856 dev_err(dev, "coresight_cti_get_platform_data err\n");884 dev_err(dev, "coresight_cti_get_platform_data err\n");
857 ret = PTR_ERR(pdata);885 return PTR_ERR(pdata);
858 goto err_out;
859 }886 }
860 887
861 /* default to powered - could change on PM notifications */888 /* default to powered - could change on PM notifications */
@@ -867,35 +894,20 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 5 unmodified lines
867 drvdata->ctidev.cpu);894 drvdata->ctidev.cpu);
868 else895 else
869 cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev);896 cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev);
870 if (!cti_desc.name) {897 if (!cti_desc.name)
871 ret = -ENOMEM;898 return -ENOMEM;
872 goto err_out;
873 }
874 899
875 /* setup CPU power management handling for CPU bound CTI devices. */900 /* setup CPU power management handling for CPU bound CTI devices. */
876 if (drvdata->ctidev.cpu >= 0) {901 ret = cti_pm_setup(drvdata);
877 cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata;902 if (ret)
878 if (!nr_cti_cpu++) {903 return ret;
879 cpus_read_lock();
880 ret = cpuhp_setup_state_nocalls_cpuslocked(
881 CPUHP_AP_ARM_CORESIGHT_CTI_STARTING,
882 "arm/coresight_cti:starting",
883 cti_starting_cpu, cti_dying_cpu);
884
885 if (!ret)
886 ret = cpu_pm_register_notifier(&cti_cpu_pm_nb);
887 cpus_read_unlock();
888 if (ret)
889 goto err_out;
890 }
891 }
892 904
893 /* create dynamic attributes for connections */905 /* create dynamic attributes for connections */
894 ret = cti_create_cons_sysfs(dev, drvdata);906 ret = cti_create_cons_sysfs(dev, drvdata);
895 if (ret) {907 if (ret) {
896 dev_err(dev, "%s: create dynamic sysfs entries failed\n",908 dev_err(dev, "%s: create dynamic sysfs entries failed\n",
897 cti_desc.name);909 cti_desc.name);
898 goto err_out;910 goto pm_release;
899 }911 }
900 912
901 /* set up coresight component description */913 /* set up coresight component description */
@@ -908,7 +920,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 6 unmodified lines
908 drvdata->csdev = coresight_register(&cti_desc);920 drvdata->csdev = coresight_register(&cti_desc);
909 if (IS_ERR(drvdata->csdev)) {921 if (IS_ERR(drvdata->csdev)) {
910 ret = PTR_ERR(drvdata->csdev);922 ret = PTR_ERR(drvdata->csdev);
911 goto err_out;923 goto pm_release;
912 }924 }
913 925
914 /* add to list of CTI devices */926 /* add to list of CTI devices */
@@ -927,7 +939,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 12 unmodified lines
927 dev_info(&drvdata->csdev->dev, "CTI initialized\n");939 dev_info(&drvdata->csdev->dev, "CTI initialized\n");
928 return 0;940 return 0;
929 941
930err_out:942pm_release:
931 cti_pm_release(drvdata);943 cti_pm_release(drvdata);
932 return ret;944 return ret;
933}945}
drivers/hwtracing/coresight/coresight-etm4x.c+53−29
@@ -1388,18 +1388,57 @@ static struct notifier_block etm4_cpu_pm_nb = { · 1387 unmodified lines
1388 .notifier_call = etm4_cpu_pm_notify,1388 .notifier_call = etm4_cpu_pm_notify,
1389};1389};
1390 1390
1391static int etm4_cpu_pm_register(void)1391/* Setup PM. Called with cpus locked. Deals with error conditions and counts */
1392static int etm4_pm_setup_cpuslocked(void)
1392{1393{
1393 if (IS_ENABLED(CONFIG_CPU_PM))1394 int ret;
1394 return cpu_pm_register_notifier(&etm4_cpu_pm_nb);
1395 1395
1396 return 0;1396 if (etm4_count++)
1397 return 0;
1398
1399 ret = cpu_pm_register_notifier(&etm4_cpu_pm_nb);
1400 if (ret)
1401 goto reduce_count;
1402
1403 ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING,
1404 "arm/coresight4:starting",
1405 etm4_starting_cpu, etm4_dying_cpu);
1406
1407 if (ret)
1408 goto unregister_notifier;
1409
1410 ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ONLINE_DYN,
1411 "arm/coresight4:online",
1412 etm4_online_cpu, NULL);
1413
1414 /* HP dyn state ID returned in ret on success */
1415 if (ret > 0) {
1416 hp_online = ret;
1417 return 0;
1418 }
1419
1420 /* failed dyn state - remove others */
1421 cpuhp_remove_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING);
1422
1423unregister_notifier:
1424 cpu_pm_unregister_notifier(&etm4_cpu_pm_nb);
1425
1426reduce_count:
1427 --etm4_count;
1428 return ret;
1397}1429}
1398 1430
1399static void etm4_cpu_pm_unregister(void)1431static void etm4_pm_clear(void)
1400{1432{
1401 if (IS_ENABLED(CONFIG_CPU_PM))1433 if (--etm4_count != 0)
1402 cpu_pm_unregister_notifier(&etm4_cpu_pm_nb);1434 return;
1435
1436 cpu_pm_unregister_notifier(&etm4_cpu_pm_nb);
1437 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING);
1438 if (hp_online) {
1439 cpuhp_remove_state_nocalls(hp_online);
1440 hp_online = 0;
1441 }
1403}1442}
1404 1443
1405static int etm4_probe(struct amba_device *adev, const struct amba_id *id)1444static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
@@ -1453,24 +1492,15 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) · 47 unmodified lines
1453 etm4_init_arch_data, drvdata, 1))1492 etm4_init_arch_data, drvdata, 1))
1454 dev_err(dev, "ETM arch init failed\n");1493 dev_err(dev, "ETM arch init failed\n");
1455 1494
1456 if (!etm4_count++) {1495 ret = etm4_pm_setup_cpuslocked();
1457 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING,1496 cpus_read_unlock();
1458 "arm/coresight4:starting",
1459 etm4_starting_cpu, etm4_dying_cpu);
1460 ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ONLINE_DYN,
1461 "arm/coresight4:online",
1462 etm4_online_cpu, NULL);
1463 if (ret < 0)
1464 goto err_arch_supported;
1465 hp_online = ret;
1466 1497
1467 ret = etm4_cpu_pm_register();1498 /* etm4_pm_setup_cpuslocked() does its own cleanup - exit on error */
1468 if (ret)1499 if (ret) {
1469 goto err_arch_supported;1500 etmdrvdata[drvdata->cpu] = NULL;
1501 return ret;
1470 }1502 }
1471 1503
1472 cpus_read_unlock();
1473
1474 if (etm4_arch_supported(drvdata->arch) == false) {1504 if (etm4_arch_supported(drvdata->arch) == false) {
1475 ret = -EINVAL;1505 ret = -EINVAL;
1476 goto err_arch_supported;1506 goto err_arch_supported;
@@ -1517,13 +1547,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) · 40 unmodified lines
1517 1547
1518err_arch_supported:1548err_arch_supported:
1519 etmdrvdata[drvdata->cpu] = NULL;1549 etmdrvdata[drvdata->cpu] = NULL;
1520 if (--etm4_count == 0) {1550 etm4_pm_clear();
1521 etm4_cpu_pm_unregister();
1522
1523 cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING);
1524 if (hp_online)
1525 cpuhp_remove_state_nocalls(hp_online);
1526 }
1527 return ret;1551 return ret;
1528}1552}
1529 1553
drivers/hwtracing/intel_th/core.c+18−3
@@ -1021,15 +1021,30 @@ int intel_th_set_output(struct intel_th_device *thdev, · 1020 unmodified lines
1021{1021{
1022 struct intel_th_device *hub = to_intel_th_hub(thdev);1022 struct intel_th_device *hub = to_intel_th_hub(thdev);
1023 struct intel_th_driver *hubdrv = to_intel_th_driver(hub->dev.driver);1023 struct intel_th_driver *hubdrv = to_intel_th_driver(hub->dev.driver);
1024 int ret;
1024 1025
1025 /* In host mode, this is up to the external debugger, do nothing. */1026 /* In host mode, this is up to the external debugger, do nothing. */
1026 if (hub->host_mode)1027 if (hub->host_mode)
1027 return 0;1028 return 0;
1028 1029
1029 if (!hubdrv->set_output)1030 /*
1030 return -ENOTSUPP;1031 * hub is instantiated together with the source device that
1032 * calls here, so guaranteed to be present.
1033 */
1034 hubdrv = to_intel_th_driver(hub->dev.driver);
1035 if (!hubdrv || !try_module_get(hubdrv->driver.owner))
1036 return -EINVAL;
1037
1038 if (!hubdrv->set_output) {
1039 ret = -ENOTSUPP;
1040 goto out;
1041 }
1042
1043 ret = hubdrv->set_output(hub, master);
1031 1044
1032 return hubdrv->set_output(hub, master);1045out:
1046 module_put(hubdrv->driver.owner);
1047 return ret;
1033}1048}
1034EXPORT_SYMBOL_GPL(intel_th_set_output);1049EXPORT_SYMBOL_GPL(intel_th_set_output);
1035 1050
drivers/hwtracing/intel_th/pci.c+15−0
@@ -233,11 +233,21 @@ static const struct pci_device_id intel_th_pci_id_table[] = { · 232 unmodified lines
233 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6),233 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6),
234 .driver_data = (kernel_ulong_t)&intel_th_2x,234 .driver_data = (kernel_ulong_t)&intel_th_2x,
235 },235 },
236 {
237 /* Tiger Lake PCH-H */
238 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x43a6),
239 .driver_data = (kernel_ulong_t)&intel_th_2x,
240 },
236 {241 {
237 /* Jasper Lake PCH */242 /* Jasper Lake PCH */
238 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6),243 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6),
239 .driver_data = (kernel_ulong_t)&intel_th_2x,244 .driver_data = (kernel_ulong_t)&intel_th_2x,
240 },245 },
246 {
247 /* Jasper Lake CPU */
248 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4e29),
249 .driver_data = (kernel_ulong_t)&intel_th_2x,
250 },
241 {251 {
242 /* Elkhart Lake CPU */252 /* Elkhart Lake CPU */
243 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529),253 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529),
@@ -248,6 +258,11 @@ static const struct pci_device_id intel_th_pci_id_table[] = { · 4 unmodified lines
248 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26),258 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26),
249 .driver_data = (kernel_ulong_t)&intel_th_2x,259 .driver_data = (kernel_ulong_t)&intel_th_2x,
250 },260 },
261 {
262 /* Emmitsburg PCH */
263 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1bcc),
264 .driver_data = (kernel_ulong_t)&intel_th_2x,
265 },
251 { 0 },266 { 0 },
252};267};
253 268
drivers/hwtracing/intel_th/sth.c+1−3
@@ -161,9 +161,7 @@ static int sth_stm_link(struct stm_data *stm_data, unsigned int master, · 160 unmodified lines
161{161{
162 struct sth_device *sth = container_of(stm_data, struct sth_device, stm);162 struct sth_device *sth = container_of(stm_data, struct sth_device, stm);
163 163
164 intel_th_set_output(to_intel_th_device(sth->dev), master);164 return intel_th_set_output(to_intel_th_device(sth->dev), master);
165
166 return 0;
167}165}
168 166
169static int intel_th_sw_init(struct sth_device *sth)167static int intel_th_sw_init(struct sth_device *sth)
drivers/i2c/busses/i2c-cadence.c+12−16
@@ -421,20 +421,21 @@ static irqreturn_t cdns_i2c_master_isr(void *ptr) · 420 unmodified lines
421 /* Read data if receive data valid is set */421 /* Read data if receive data valid is set */
422 while (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) &422 while (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) &
423 CDNS_I2C_SR_RXDV) {423 CDNS_I2C_SR_RXDV) {
424 /*
425 * Clear hold bit that was set for FIFO control if
426 * RX data left is less than FIFO depth, unless
427 * repeated start is selected.
428 */
429 if ((id->recv_count < CDNS_I2C_FIFO_DEPTH) &&
430 !id->bus_hold_flag)
431 cdns_i2c_clear_bus_hold(id);
432
433 if (id->recv_count > 0) {424 if (id->recv_count > 0) {
434 *(id->p_recv_buf)++ =425 *(id->p_recv_buf)++ =
435 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);426 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);
436 id->recv_count--;427 id->recv_count--;
437 id->curr_recv_count--;428 id->curr_recv_count--;
429
430 /*
431 * Clear hold bit that was set for FIFO control
432 * if RX data left is less than or equal to
433 * FIFO DEPTH unless repeated start is selected
434 */
435 if (id->recv_count <= CDNS_I2C_FIFO_DEPTH &&
436 !id->bus_hold_flag)
437 cdns_i2c_clear_bus_hold(id);
438
438 } else {439 } else {
439 dev_err(id->adap.dev.parent,440 dev_err(id->adap.dev.parent,
440 "xfer_size reg rollover. xfer aborted!\n");441 "xfer_size reg rollover. xfer aborted!\n");
@@ -594,10 +595,8 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id) · 153 unmodified lines
594 * Check for the message size against FIFO depth and set the595 * Check for the message size against FIFO depth and set the
595 * 'hold bus' bit if it is greater than FIFO depth.596 * 'hold bus' bit if it is greater than FIFO depth.
596 */597 */
597 if ((id->recv_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)598 if (id->recv_count > CDNS_I2C_FIFO_DEPTH)
598 ctrl_reg |= CDNS_I2C_CR_HOLD;599 ctrl_reg |= CDNS_I2C_CR_HOLD;
599 else
600 ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
601 600
602 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);601 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
603 602
@@ -654,11 +653,8 @@ static void cdns_i2c_msend(struct cdns_i2c *id) · 50 unmodified lines
654 * Check for the message size against FIFO depth and set the653 * Check for the message size against FIFO depth and set the
655 * 'hold bus' bit if it is greater than FIFO depth.654 * 'hold bus' bit if it is greater than FIFO depth.
656 */655 */
657 if ((id->send_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)656 if (id->send_count > CDNS_I2C_FIFO_DEPTH)
658 ctrl_reg |= CDNS_I2C_CR_HOLD;657 ctrl_reg |= CDNS_I2C_CR_HOLD;
659 else
660 ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
661
662 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);658 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
663 659
664 /* Clear the interrupts in interrupt status register. */660 /* Clear the interrupts in interrupt status register. */
drivers/i2c/busses/i2c-qcom-geni.c+4−2
@@ -367,7 +367,6 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 366 unmodified lines
367 geni_se_select_mode(se, GENI_SE_FIFO);367 geni_se_select_mode(se, GENI_SE_FIFO);
368 368
369 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);369 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);
370 geni_se_setup_m_cmd(se, I2C_READ, m_param);
371 370
372 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {371 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {
373 geni_se_select_mode(se, GENI_SE_FIFO);372 geni_se_select_mode(se, GENI_SE_FIFO);
@@ -375,6 +374,8 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 1 unmodified line
375 dma_buf = NULL;374 dma_buf = NULL;
376 }375 }
377 376
377 geni_se_setup_m_cmd(se, I2C_READ, m_param);
378
378 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);379 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
379 if (!time_left)380 if (!time_left)
380 geni_i2c_abort_xfer(gi2c);381 geni_i2c_abort_xfer(gi2c);
@@ -408,7 +409,6 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 27 unmodified lines
408 geni_se_select_mode(se, GENI_SE_FIFO);409 geni_se_select_mode(se, GENI_SE_FIFO);
409 410
410 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);411 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);
411 geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
412 412
413 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {413 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {
414 geni_se_select_mode(se, GENI_SE_FIFO);414 geni_se_select_mode(se, GENI_SE_FIFO);
@@ -416,6 +416,8 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 1 unmodified line
416 dma_buf = NULL;416 dma_buf = NULL;
417 }417 }
418 418
419 geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
420
419 if (!dma_buf) /* Get FIFO IRQ */421 if (!dma_buf) /* Get FIFO IRQ */
420 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);422 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);
421 423
drivers/i2c/busses/i2c-rcar.c+3−0
@@ -868,6 +868,7 @@ static int rcar_unreg_slave(struct i2c_client *slave) · 867 unmodified lines
868 /* disable irqs and ensure none is running before clearing ptr */868 /* disable irqs and ensure none is running before clearing ptr */
869 rcar_i2c_write(priv, ICSIER, 0);869 rcar_i2c_write(priv, ICSIER, 0);
870 rcar_i2c_write(priv, ICSCR, 0);870 rcar_i2c_write(priv, ICSCR, 0);
871 rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
871 872
872 synchronize_irq(priv->irq);873 synchronize_irq(priv->irq);
873 priv->slave = NULL;874 priv->slave = NULL;
@@ -969,6 +970,8 @@ static int rcar_i2c_probe(struct platform_device *pdev) · 95 unmodified lines
969 if (ret < 0)970 if (ret < 0)
970 goto out_pm_put;971 goto out_pm_put;
971 972
973 rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
974
972 if (priv->devtype == I2C_RCAR_GEN3) {975 if (priv->devtype == I2C_RCAR_GEN3) {
973 priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);976 priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
974 if (!IS_ERR(priv->rstc)) {977 if (!IS_ERR(priv->rstc)) {
drivers/i2c/i2c-core-slave.c+4−3
@@ -18,10 +18,8 @@ int i2c_slave_register(struct i2c_client *client, i2c_slave_cb_t slave_cb) · 17 unmodified lines
18{18{
19 int ret;19 int ret;
20 20
21 if (!client || !slave_cb) {21 if (WARN(IS_ERR_OR_NULL(client) || !slave_cb, "insufficient data\n"))
22 WARN(1, "insufficient data\n");
23 return -EINVAL;22 return -EINVAL;
24 }
25 23
26 if (!(client->flags & I2C_CLIENT_SLAVE))24 if (!(client->flags & I2C_CLIENT_SLAVE))
27 dev_warn(&client->dev, "%s: client slave flag not set. You might see address collisions\n",25 dev_warn(&client->dev, "%s: client slave flag not set. You might see address collisions\n",
@@ -60,6 +58,9 @@ int i2c_slave_unregister(struct i2c_client *client) · 32 unmodified lines
60{58{
61 int ret;59 int ret;
62 60
61 if (IS_ERR_OR_NULL(client))
62 return -EINVAL;
63
63 if (!client->adapter->algo->unreg_slave) {64 if (!client->adapter->algo->unreg_slave) {
64 dev_err(&client->dev, "%s: not supported by adapter\n", __func__);65 dev_err(&client->dev, "%s: not supported by adapter\n", __func__);
65 return -EOPNOTSUPP;66 return -EOPNOTSUPP;
drivers/iio/accel/mma8452.c+4−1
@@ -1685,10 +1685,13 @@ static int mma8452_probe(struct i2c_client *client, · 1684 unmodified lines
1685 1685
1686 ret = mma8452_set_freefall_mode(data, false);1686 ret = mma8452_set_freefall_mode(data, false);
1687 if (ret < 0)1687 if (ret < 0)
1688 goto buffer_cleanup;1688 goto unregister_device;
1689 1689
1690 return 0;1690 return 0;
1691 1691
1692unregister_device:
1693 iio_device_unregister(indio_dev);
1694
1692buffer_cleanup:1695buffer_cleanup:
1693 iio_triggered_buffer_cleanup(indio_dev);1696 iio_triggered_buffer_cleanup(indio_dev);
1694 1697
drivers/iio/adc/ad7780.c+1−1
@@ -329,7 +329,7 @@ static int ad7780_probe(struct spi_device *spi) · 328 unmodified lines
329 329
330 ret = ad7780_init_gpios(&spi->dev, st);330 ret = ad7780_init_gpios(&spi->dev, st);
331 if (ret)331 if (ret)
332 goto error_cleanup_buffer_and_trigger;332 return ret;
333 333
334 st->reg = devm_regulator_get(&spi->dev, "avdd");334 st->reg = devm_regulator_get(&spi->dev, "avdd");
335 if (IS_ERR(st->reg))335 if (IS_ERR(st->reg))
drivers/iio/adc/adi-axi-adc.c+2−2
@@ -332,12 +332,12 @@ static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev) · 331 unmodified lines
332 if (cl->dev->of_node != cln)332 if (cl->dev->of_node != cln)
333 continue;333 continue;
334 334
335 if (!try_module_get(dev->driver->owner)) {335 if (!try_module_get(cl->dev->driver->owner)) {
336 mutex_unlock(&registered_clients_lock);336 mutex_unlock(&registered_clients_lock);
337 return ERR_PTR(-ENODEV);337 return ERR_PTR(-ENODEV);
338 }338 }
339 339
340 get_device(dev);340 get_device(cl->dev);
341 cl->info = info;341 cl->info = info;
342 mutex_unlock(&registered_clients_lock);342 mutex_unlock(&registered_clients_lock);
343 return cl;343 return cl;
drivers/iio/health/afe4403.c+6−3
@@ -65,6 +65,7 @@ static const struct reg_field afe4403_reg_fields[] = { · 64 unmodified lines
65 * @regulator: Pointer to the regulator for the IC65 * @regulator: Pointer to the regulator for the IC
66 * @trig: IIO trigger for this device66 * @trig: IIO trigger for this device
67 * @irq: ADC_RDY line interrupt number67 * @irq: ADC_RDY line interrupt number
68 * @buffer: Used to construct data layout to push into IIO buffer.
68 */69 */
69struct afe4403_data {70struct afe4403_data {
70 struct device *dev;71 struct device *dev;
@@ -74,6 +75,8 @@ struct afe4403_data { · 3 unmodified lines
74 struct regulator *regulator;75 struct regulator *regulator;
75 struct iio_trigger *trig;76 struct iio_trigger *trig;
76 int irq;77 int irq;
78 /* Ensure suitable alignment for timestamp */
79 s32 buffer[8] __aligned(8);
77};80};
78 81
79enum afe4403_chan_id {82enum afe4403_chan_id {
@@ -309,7 +312,6 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 229 unmodified lines
309 struct iio_dev *indio_dev = pf->indio_dev;312 struct iio_dev *indio_dev = pf->indio_dev;
310 struct afe4403_data *afe = iio_priv(indio_dev);313 struct afe4403_data *afe = iio_priv(indio_dev);
311 int ret, bit, i = 0;314 int ret, bit, i = 0;
312 s32 buffer[8];
313 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};315 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ};
314 u8 rx[3];316 u8 rx[3];
315 317
@@ -326,7 +328,7 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 10 unmodified lines
326 if (ret)328 if (ret)
327 goto err;329 goto err;
328 330
329 buffer[i++] = get_unaligned_be24(&rx[0]);331 afe->buffer[i++] = get_unaligned_be24(&rx[0]);
330 }332 }
331 333
332 /* Disable reading from the device */334 /* Disable reading from the device */
@@ -335,7 +337,8 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 2 unmodified lines
335 if (ret)337 if (ret)
336 goto err;338 goto err;
337 339
338 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);340 iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
341 pf->timestamp);
339err:342err:
340 iio_trigger_notify_done(indio_dev->trig);343 iio_trigger_notify_done(indio_dev->trig);
341 344
drivers/iio/health/afe4404.c+5−3
@@ -83,6 +83,7 @@ static const struct reg_field afe4404_reg_fields[] = { · 82 unmodified lines
83 * @regulator: Pointer to the regulator for the IC83 * @regulator: Pointer to the regulator for the IC
84 * @trig: IIO trigger for this device84 * @trig: IIO trigger for this device
85 * @irq: ADC_RDY line interrupt number85 * @irq: ADC_RDY line interrupt number
86 * @buffer: Used to construct a scan to push to the iio buffer.
86 */87 */
87struct afe4404_data {88struct afe4404_data {
88 struct device *dev;89 struct device *dev;
@@ -91,6 +92,7 @@ struct afe4404_data { · 2 unmodified lines
91 struct regulator *regulator;92 struct regulator *regulator;
92 struct iio_trigger *trig;93 struct iio_trigger *trig;
93 int irq;94 int irq;
95 s32 buffer[10] __aligned(8);
94};96};
95 97
96enum afe4404_chan_id {98enum afe4404_chan_id {
@@ -328,17 +330,17 @@ static irqreturn_t afe4404_trigger_handler(int irq, void *private) · 231 unmodified lines
328 struct iio_dev *indio_dev = pf->indio_dev;330 struct iio_dev *indio_dev = pf->indio_dev;
329 struct afe4404_data *afe = iio_priv(indio_dev);331 struct afe4404_data *afe = iio_priv(indio_dev);
330 int ret, bit, i = 0;332 int ret, bit, i = 0;
331 s32 buffer[10];
332 333
333 for_each_set_bit(bit, indio_dev->active_scan_mask,334 for_each_set_bit(bit, indio_dev->active_scan_mask,
334 indio_dev->masklength) {335 indio_dev->masklength) {
335 ret = regmap_read(afe->regmap, afe4404_channel_values[bit],336 ret = regmap_read(afe->regmap, afe4404_channel_values[bit],
336 &buffer[i++]);337 &afe->buffer[i++]);
337 if (ret)338 if (ret)
338 goto err;339 goto err;
339 }340 }
340 341
341 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp);342 iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer,
343 pf->timestamp);
342err:344err:
343 iio_trigger_notify_done(indio_dev->trig);345 iio_trigger_notify_done(indio_dev->trig);
344 346
drivers/iio/humidity/hdc100x.c+7−3
@@ -38,6 +38,11 @@ struct hdc100x_data { · 37 unmodified lines
38 38
39 /* integration time of the sensor */39 /* integration time of the sensor */
40 int adc_int_us[2];40 int adc_int_us[2];
41 /* Ensure natural alignment of timestamp */
42 struct {
43 __be16 channels[2];
44 s64 ts __aligned(8);
45 } scan;
41};46};
42 47
43/* integration time in us */48/* integration time in us */
@@ -322,7 +327,6 @@ static irqreturn_t hdc100x_trigger_handler(int irq, void *p) · 278 unmodified lines
322 struct i2c_client *client = data->client;327 struct i2c_client *client = data->client;
323 int delay = data->adc_int_us[0] + data->adc_int_us[1];328 int delay = data->adc_int_us[0] + data->adc_int_us[1];
324 int ret;329 int ret;
325 s16 buf[8]; /* 2x s16 + padding + 8 byte timestamp */
326 330
327 /* dual read starts at temp register */331 /* dual read starts at temp register */
328 mutex_lock(&data->lock);332 mutex_lock(&data->lock);
@@ -333,13 +337,13 @@ static irqreturn_t hdc100x_trigger_handler(int irq, void *p) · 4 unmodified lines
333 }337 }
334 usleep_range(delay, delay + 1000);338 usleep_range(delay, delay + 1000);
335 339
336 ret = i2c_master_recv(client, (u8 *)buf, 4);340 ret = i2c_master_recv(client, (u8 *)data->scan.channels, 4);
337 if (ret < 0) {341 if (ret < 0) {
338 dev_err(&client->dev, "cannot read sensor data\n");342 dev_err(&client->dev, "cannot read sensor data\n");
339 goto err;343 goto err;
340 }344 }
341 345
342 iio_push_to_buffers_with_timestamp(indio_dev, buf,346 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan,
343 iio_get_time_ns(indio_dev));347 iio_get_time_ns(indio_dev));
344err:348err:
345 mutex_unlock(&data->lock);349 mutex_unlock(&data->lock);
drivers/iio/humidity/hts221.h+5−2
@@ -14,8 +14,6 @@ · 13 unmodified lines
14 14
15#include <linux/iio/iio.h>15#include <linux/iio/iio.h>
16 16
17#define HTS221_DATA_SIZE 2
18
19enum hts221_sensor_type {17enum hts221_sensor_type {
20 HTS221_SENSOR_H,18 HTS221_SENSOR_H,
21 HTS221_SENSOR_T,19 HTS221_SENSOR_T,
@@ -39,6 +37,11 @@ struct hts221_hw { · 17 unmodified lines
39 37
40 bool enabled;38 bool enabled;
41 u8 odr;39 u8 odr;
40 /* Ensure natural alignment of timestamp */
41 struct {
42 __le16 channels[2];
43 s64 ts __aligned(8);
44 } scan;
42};45};
43 46
44extern const struct dev_pm_ops hts221_pm_ops;47extern const struct dev_pm_ops hts221_pm_ops;
drivers/iio/humidity/hts221_buffer.c+5−4
@@ -160,7 +160,6 @@ static const struct iio_buffer_setup_ops hts221_buffer_ops = { · 159 unmodified lines
160 160
161static irqreturn_t hts221_buffer_handler_thread(int irq, void *p)161static irqreturn_t hts221_buffer_handler_thread(int irq, void *p)
162{162{
163 u8 buffer[ALIGN(2 * HTS221_DATA_SIZE, sizeof(s64)) + sizeof(s64)];
164 struct iio_poll_func *pf = p;163 struct iio_poll_func *pf = p;
165 struct iio_dev *iio_dev = pf->indio_dev;164 struct iio_dev *iio_dev = pf->indio_dev;
166 struct hts221_hw *hw = iio_priv(iio_dev);165 struct hts221_hw *hw = iio_priv(iio_dev);
@@ -170,18 +169,20 @@ static irqreturn_t hts221_buffer_handler_thread(int irq, void *p) · 3 unmodified lines
170 /* humidity data */169 /* humidity data */
171 ch = &iio_dev->channels[HTS221_SENSOR_H];170 ch = &iio_dev->channels[HTS221_SENSOR_H];
172 err = regmap_bulk_read(hw->regmap, ch->address,171 err = regmap_bulk_read(hw->regmap, ch->address,
173 buffer, HTS221_DATA_SIZE);172 &hw->scan.channels[0],
173 sizeof(hw->scan.channels[0]));
174 if (err < 0)174 if (err < 0)
175 goto out;175 goto out;
176 176
177 /* temperature data */177 /* temperature data */
178 ch = &iio_dev->channels[HTS221_SENSOR_T];178 ch = &iio_dev->channels[HTS221_SENSOR_T];
179 err = regmap_bulk_read(hw->regmap, ch->address,179 err = regmap_bulk_read(hw->regmap, ch->address,
180 buffer + HTS221_DATA_SIZE, HTS221_DATA_SIZE);180 &hw->scan.channels[1],
181 sizeof(hw->scan.channels[1]));
181 if (err < 0)182 if (err < 0)
182 goto out;183 goto out;
183 184
184 iio_push_to_buffers_with_timestamp(iio_dev, buffer,185 iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan,
185 iio_get_time_ns(iio_dev));186 iio_get_time_ns(iio_dev));
186 187
187out:188out:
drivers/iio/industrialio-core.c+2−0
@@ -130,6 +130,8 @@ static const char * const iio_modifier_names[] = { · 129 unmodified lines
130 [IIO_MOD_PM2P5] = "pm2p5",130 [IIO_MOD_PM2P5] = "pm2p5",
131 [IIO_MOD_PM4] = "pm4",131 [IIO_MOD_PM4] = "pm4",
132 [IIO_MOD_PM10] = "pm10",132 [IIO_MOD_PM10] = "pm10",
133 [IIO_MOD_ETHANOL] = "ethanol",
134 [IIO_MOD_H2] = "h2",
133};135};
134 136
135/* relies on pairs of these shared then separate */137/* relies on pairs of these shared then separate */
drivers/iio/magnetometer/ak8974.c+17−12
@@ -192,6 +192,11 @@ struct ak8974 { · 191 unmodified lines
192 bool drdy_irq;192 bool drdy_irq;
193 struct completion drdy_complete;193 struct completion drdy_complete;
194 bool drdy_active_low;194 bool drdy_active_low;
195 /* Ensure timestamp is naturally aligned */
196 struct {
197 __le16 channels[3];
198 s64 ts __aligned(8);
199 } scan;
195};200};
196 201
197static const char ak8974_reg_avdd[] = "avdd";202static const char ak8974_reg_avdd[] = "avdd";
@@ -657,7 +662,6 @@ static void ak8974_fill_buffer(struct iio_dev *indio_dev) · 459 unmodified lines
657{662{
658 struct ak8974 *ak8974 = iio_priv(indio_dev);663 struct ak8974 *ak8974 = iio_priv(indio_dev);
659 int ret;664 int ret;
660 __le16 hw_values[8]; /* Three axes + 64bit padding */
661 665
662 pm_runtime_get_sync(&ak8974->i2c->dev);666 pm_runtime_get_sync(&ak8974->i2c->dev);
663 mutex_lock(&ak8974->lock);667 mutex_lock(&ak8974->lock);
@@ -667,13 +671,13 @@ static void ak8974_fill_buffer(struct iio_dev *indio_dev) · 3 unmodified lines
667 dev_err(&ak8974->i2c->dev, "error triggering measure\n");671 dev_err(&ak8974->i2c->dev, "error triggering measure\n");
668 goto out_unlock;672 goto out_unlock;
669 }673 }
670 ret = ak8974_getresult(ak8974, hw_values);674 ret = ak8974_getresult(ak8974, ak8974->scan.channels);
671 if (ret) {675 if (ret) {
672 dev_err(&ak8974->i2c->dev, "error getting measures\n");676 dev_err(&ak8974->i2c->dev, "error getting measures\n");
673 goto out_unlock;677 goto out_unlock;
674 }678 }
675 679
676 iio_push_to_buffers_with_timestamp(indio_dev, hw_values,680 iio_push_to_buffers_with_timestamp(indio_dev, &ak8974->scan,
677 iio_get_time_ns(indio_dev));681 iio_get_time_ns(indio_dev));
678 682
679 out_unlock:683 out_unlock:
@@ -862,19 +866,21 @@ static int ak8974_probe(struct i2c_client *i2c, · 182 unmodified lines
862 ak8974->map = devm_regmap_init_i2c(i2c, &ak8974_regmap_config);866 ak8974->map = devm_regmap_init_i2c(i2c, &ak8974_regmap_config);
863 if (IS_ERR(ak8974->map)) {867 if (IS_ERR(ak8974->map)) {
864 dev_err(&i2c->dev, "failed to allocate register map\n");868 dev_err(&i2c->dev, "failed to allocate register map\n");
869 pm_runtime_put_noidle(&i2c->dev);
870 pm_runtime_disable(&i2c->dev);
865 return PTR_ERR(ak8974->map);871 return PTR_ERR(ak8974->map);
866 }872 }
867 873
868 ret = ak8974_set_power(ak8974, AK8974_PWR_ON);874 ret = ak8974_set_power(ak8974, AK8974_PWR_ON);
869 if (ret) {875 if (ret) {
870 dev_err(&i2c->dev, "could not power on\n");876 dev_err(&i2c->dev, "could not power on\n");
871 goto power_off;877 goto disable_pm;
872 }878 }
873 879
874 ret = ak8974_detect(ak8974);880 ret = ak8974_detect(ak8974);
875 if (ret) {881 if (ret) {
876 dev_err(&i2c->dev, "neither AK8974 nor AMI30x found\n");882 dev_err(&i2c->dev, "neither AK8974 nor AMI30x found\n");
877 goto power_off;883 goto disable_pm;
878 }884 }
879 885
880 ret = ak8974_selftest(ak8974);886 ret = ak8974_selftest(ak8974);
@@ -884,14 +890,9 @@ static int ak8974_probe(struct i2c_client *i2c, · 3 unmodified lines
884 ret = ak8974_reset(ak8974);890 ret = ak8974_reset(ak8974);
885 if (ret) {891 if (ret) {
886 dev_err(&i2c->dev, "AK8974 reset failed\n");892 dev_err(&i2c->dev, "AK8974 reset failed\n");
887 goto power_off;893 goto disable_pm;
888 }894 }
889 895
890 pm_runtime_set_autosuspend_delay(&i2c->dev,
891 AK8974_AUTOSUSPEND_DELAY);
892 pm_runtime_use_autosuspend(&i2c->dev);
893 pm_runtime_put(&i2c->dev);
894
895 indio_dev->dev.parent = &i2c->dev;896 indio_dev->dev.parent = &i2c->dev;
896 switch (ak8974->variant) {897 switch (ak8974->variant) {
897 case AK8974_WHOAMI_VALUE_AMI306:898 case AK8974_WHOAMI_VALUE_AMI306:
@@ -957,6 +958,11 @@ no_irq: · 59 unmodified lines
957 goto cleanup_buffer;958 goto cleanup_buffer;
958 }959 }
959 960
961 pm_runtime_set_autosuspend_delay(&i2c->dev,
962 AK8974_AUTOSUSPEND_DELAY);
963 pm_runtime_use_autosuspend(&i2c->dev);
964 pm_runtime_put(&i2c->dev);
965
960 return 0;966 return 0;
961 967
962cleanup_buffer:968cleanup_buffer:
@@ -965,7 +971,6 @@ disable_pm: · 2 unmodified lines
965 pm_runtime_put_noidle(&i2c->dev);971 pm_runtime_put_noidle(&i2c->dev);
966 pm_runtime_disable(&i2c->dev);972 pm_runtime_disable(&i2c->dev);
967 ak8974_set_power(ak8974, AK8974_PWR_OFF);973 ak8974_set_power(ak8974, AK8974_PWR_OFF);
968power_off:
969 regulator_bulk_disable(ARRAY_SIZE(ak8974->regs), ak8974->regs);974 regulator_bulk_disable(ARRAY_SIZE(ak8974->regs), ak8974->regs);
970 975
971 return ret;976 return ret;
drivers/iio/pressure/ms5611_core.c+8−3
@@ -212,16 +212,21 @@ static irqreturn_t ms5611_trigger_handler(int irq, void *p) · 211 unmodified lines
212 struct iio_poll_func *pf = p;212 struct iio_poll_func *pf = p;
213 struct iio_dev *indio_dev = pf->indio_dev;213 struct iio_dev *indio_dev = pf->indio_dev;
214 struct ms5611_state *st = iio_priv(indio_dev);214 struct ms5611_state *st = iio_priv(indio_dev);
215 s32 buf[4]; /* s32 (pressure) + s32 (temp) + 2 * s32 (timestamp) */215 /* Ensure buffer elements are naturally aligned */
216 struct {
217 s32 channels[2];
218 s64 ts __aligned(8);
219 } scan;
216 int ret;220 int ret;
217 221
218 mutex_lock(&st->lock);222 mutex_lock(&st->lock);
219 ret = ms5611_read_temp_and_pressure(indio_dev, &buf[1], &buf[0]);223 ret = ms5611_read_temp_and_pressure(indio_dev, &scan.channels[1],
224 &scan.channels[0]);
220 mutex_unlock(&st->lock);225 mutex_unlock(&st->lock);
221 if (ret < 0)226 if (ret < 0)
222 goto err;227 goto err;
223 228
224 iio_push_to_buffers_with_timestamp(indio_dev, buf,229 iio_push_to_buffers_with_timestamp(indio_dev, &scan,
225 iio_get_time_ns(indio_dev));230 iio_get_time_ns(indio_dev));
226 231
227err:232err:
drivers/iio/pressure/zpa2326.c+3−1
@@ -665,8 +665,10 @@ static int zpa2326_resume(const struct iio_dev *indio_dev) · 664 unmodified lines
665 int err;665 int err;
666 666
667 err = pm_runtime_get_sync(indio_dev->dev.parent);667 err = pm_runtime_get_sync(indio_dev->dev.parent);
668 if (err < 0)668 if (err < 0) {
669 pm_runtime_put(indio_dev->dev.parent);
669 return err;670 return err;
671 }
670 672
671 if (err > 0) {673 if (err > 0) {
672 /*674 /*
drivers/infiniband/core/cm.c+2−0
@@ -3676,10 +3676,12 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, · 3675 unmodified lines
3676 return ret;3676 return ret;
3677 }3677 }
3678 cm_id_priv->id.state = IB_CM_IDLE;3678 cm_id_priv->id.state = IB_CM_IDLE;
3679 spin_lock_irq(&cm.lock);
3679 if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) {3680 if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) {
3680 rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table);3681 rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table);
3681 RB_CLEAR_NODE(&cm_id_priv->sidr_id_node);3682 RB_CLEAR_NODE(&cm_id_priv->sidr_id_node);
3682 }3683 }
3684 spin_unlock_irq(&cm.lock);
3683 return 0;3685 return 0;
3684}3686}
3685 3687
drivers/infiniband/core/cq.c+11−3
@@ -72,6 +72,15 @@ static void rdma_dim_init(struct ib_cq *cq) · 71 unmodified lines
72 INIT_WORK(&dim->work, ib_cq_rdma_dim_work);72 INIT_WORK(&dim->work, ib_cq_rdma_dim_work);
73}73}
74 74
75static void rdma_dim_destroy(struct ib_cq *cq)
76{
77 if (!cq->dim)
78 return;
79
80 cancel_work_sync(&cq->dim->work);
81 kfree(cq->dim);
82}
83
75static int __poll_cq(struct ib_cq *cq, int num_entries, struct ib_wc *wc)84static int __poll_cq(struct ib_cq *cq, int num_entries, struct ib_wc *wc)
76{85{
77 int rc;86 int rc;
@@ -266,6 +275,7 @@ struct ib_cq *__ib_alloc_cq_user(struct ib_device *dev, void *private, · 188 unmodified lines
266 return cq;275 return cq;
267 276
268out_destroy_cq:277out_destroy_cq:
278 rdma_dim_destroy(cq);
269 rdma_restrack_del(&cq->res);279 rdma_restrack_del(&cq->res);
270 cq->device->ops.destroy_cq(cq, udata);280 cq->device->ops.destroy_cq(cq, udata);
271out_free_wc:281out_free_wc:
@@ -331,12 +341,10 @@ void ib_free_cq_user(struct ib_cq *cq, struct ib_udata *udata) · 59 unmodified lines
331 WARN_ON_ONCE(1);341 WARN_ON_ONCE(1);
332 }342 }
333 343
344 rdma_dim_destroy(cq);
334 trace_cq_free(cq);345 trace_cq_free(cq);
335 rdma_restrack_del(&cq->res);346 rdma_restrack_del(&cq->res);
336 cq->device->ops.destroy_cq(cq, udata);347 cq->device->ops.destroy_cq(cq, udata);
337 if (cq->dim)
338 cancel_work_sync(&cq->dim->work);
339 kfree(cq->dim);
340 kfree(cq->wc);348 kfree(cq->wc);
341 kfree(cq);349 kfree(cq);
342}350}
drivers/infiniband/core/rdma_core.c+3−3
@@ -649,9 +649,6 @@ void rdma_alloc_commit_uobject(struct ib_uobject *uobj, · 648 unmodified lines
649{649{
650 struct ib_uverbs_file *ufile = attrs->ufile;650 struct ib_uverbs_file *ufile = attrs->ufile;
651 651
652 /* alloc_commit consumes the uobj kref */
653 uobj->uapi_object->type_class->alloc_commit(uobj);
654
655 /* kref is held so long as the uobj is on the uobj list. */652 /* kref is held so long as the uobj is on the uobj list. */
656 uverbs_uobject_get(uobj);653 uverbs_uobject_get(uobj);
657 spin_lock_irq(&ufile->uobjects_lock);654 spin_lock_irq(&ufile->uobjects_lock);
@@ -661,6 +658,9 @@ void rdma_alloc_commit_uobject(struct ib_uobject *uobj, · 3 unmodified lines
661 /* matches atomic_set(-1) in alloc_uobj */658 /* matches atomic_set(-1) in alloc_uobj */
662 atomic_set(&uobj->usecnt, 0);659 atomic_set(&uobj->usecnt, 0);
663 660
661 /* alloc_commit consumes the uobj kref */
662 uobj->uapi_object->type_class->alloc_commit(uobj);
663
664 /* Matches the down_read in rdma_alloc_begin_uobject */664 /* Matches the down_read in rdma_alloc_begin_uobject */
665 up_read(&ufile->hw_destroy_rwsem);665 up_read(&ufile->hw_destroy_rwsem);
666}666}
drivers/infiniband/core/sa_query.c+17−21
@@ -829,13 +829,20 @@ static int ib_nl_get_path_rec_attrs_len(ib_sa_comp_mask comp_mask) · 828 unmodified lines
829 return len;829 return len;
830}830}
831 831
832static int ib_nl_send_msg(struct ib_sa_query *query, gfp_t gfp_mask)832static int ib_nl_make_request(struct ib_sa_query *query, gfp_t gfp_mask)
833{833{
834 struct sk_buff *skb = NULL;834 struct sk_buff *skb = NULL;
835 struct nlmsghdr *nlh;835 struct nlmsghdr *nlh;
836 void *data;836 void *data;
837 struct ib_sa_mad *mad;837 struct ib_sa_mad *mad;
838 int len;838 int len;
839 unsigned long flags;
840 unsigned long delay;
841 gfp_t gfp_flag;
842 int ret;
843
844 INIT_LIST_HEAD(&query->list);
845 query->seq = (u32)atomic_inc_return(&ib_nl_sa_request_seq);
839 846
840 mad = query->mad_buf->mad;847 mad = query->mad_buf->mad;
841 len = ib_nl_get_path_rec_attrs_len(mad->sa_hdr.comp_mask);848 len = ib_nl_get_path_rec_attrs_len(mad->sa_hdr.comp_mask);
@@ -860,36 +867,25 @@ static int ib_nl_send_msg(struct ib_sa_query *query, gfp_t gfp_mask) · 18 unmodified lines
860 /* Repair the nlmsg header length */867 /* Repair the nlmsg header length */
861 nlmsg_end(skb, nlh);868 nlmsg_end(skb, nlh);
862 869
863 return rdma_nl_multicast(&init_net, skb, RDMA_NL_GROUP_LS, gfp_mask);870 gfp_flag = ((gfp_mask & GFP_ATOMIC) == GFP_ATOMIC) ? GFP_ATOMIC :
864}871 GFP_NOWAIT;
865 872
866static int ib_nl_make_request(struct ib_sa_query *query, gfp_t gfp_mask)873 spin_lock_irqsave(&ib_nl_request_lock, flags);
867{874 ret = rdma_nl_multicast(&init_net, skb, RDMA_NL_GROUP_LS, gfp_flag);
868 unsigned long flags;
869 unsigned long delay;
870 int ret;
871 875
872 INIT_LIST_HEAD(&query->list);876 if (ret)
873 query->seq = (u32)atomic_inc_return(&ib_nl_sa_request_seq);877 goto out;
874 878
875 /* Put the request on the list first.*/879 /* Put the request on the list.*/
876 spin_lock_irqsave(&ib_nl_request_lock, flags);
877 delay = msecs_to_jiffies(sa_local_svc_timeout_ms);880 delay = msecs_to_jiffies(sa_local_svc_timeout_ms);
878 query->timeout = delay + jiffies;881 query->timeout = delay + jiffies;
879 list_add_tail(&query->list, &ib_nl_request_list);882 list_add_tail(&query->list, &ib_nl_request_list);
880 /* Start the timeout if this is the only request */883 /* Start the timeout if this is the only request */
881 if (ib_nl_request_list.next == &query->list)884 if (ib_nl_request_list.next == &query->list)
882 queue_delayed_work(ib_nl_wq, &ib_nl_timed_work, delay);885 queue_delayed_work(ib_nl_wq, &ib_nl_timed_work, delay);
883 spin_unlock_irqrestore(&ib_nl_request_lock, flags);
884 886
885 ret = ib_nl_send_msg(query, gfp_mask);887out:
886 if (ret) {888 spin_unlock_irqrestore(&ib_nl_request_lock, flags);
887 ret = -EIO;
888 /* Remove the request */
889 spin_lock_irqsave(&ib_nl_request_lock, flags);
890 list_del(&query->list);
891 spin_unlock_irqrestore(&ib_nl_request_lock, flags);
892 }
893 889
894 return ret;890 return ret;
895}891}
drivers/infiniband/core/ucma.c+4−0
@@ -1084,6 +1084,8 @@ static ssize_t ucma_connect(struct ucma_file *file, const char __user *inbuf, · 1083 unmodified lines
1084 size_t in_size;1084 size_t in_size;
1085 int ret;1085 int ret;
1086 1086
1087 if (in_len < offsetofend(typeof(cmd), reserved))
1088 return -EINVAL;
1087 in_size = min_t(size_t, in_len, sizeof(cmd));1089 in_size = min_t(size_t, in_len, sizeof(cmd));
1088 if (copy_from_user(&cmd, inbuf, in_size))1090 if (copy_from_user(&cmd, inbuf, in_size))
1089 return -EFAULT;1091 return -EFAULT;
@@ -1141,6 +1143,8 @@ static ssize_t ucma_accept(struct ucma_file *file, const char __user *inbuf, · 51 unmodified lines
1141 size_t in_size;1143 size_t in_size;
1142 int ret;1144 int ret;
1143 1145
1146 if (in_len < offsetofend(typeof(cmd), reserved))
1147 return -EINVAL;
1144 in_size = min_t(size_t, in_len, sizeof(cmd));1148 in_size = min_t(size_t, in_len, sizeof(cmd));
1145 if (copy_from_user(&cmd, inbuf, in_size))1149 if (copy_from_user(&cmd, inbuf, in_size))
1146 return -EFAULT;1150 return -EFAULT;
drivers/infiniband/hw/hfi1/init.c+28−9
@@ -830,6 +830,29 @@ wq_error: · 829 unmodified lines
830 return -ENOMEM;830 return -ENOMEM;
831}831}
832 832
833/**
834 * destroy_workqueues - destroy per port workqueues
835 * @dd: the hfi1_ib device
836 */
837static void destroy_workqueues(struct hfi1_devdata *dd)
838{
839 int pidx;
840 struct hfi1_pportdata *ppd;
841
842 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
843 ppd = dd->pport + pidx;
844
845 if (ppd->hfi1_wq) {
846 destroy_workqueue(ppd->hfi1_wq);
847 ppd->hfi1_wq = NULL;
848 }
849 if (ppd->link_wq) {
850 destroy_workqueue(ppd->link_wq);
851 ppd->link_wq = NULL;
852 }
853 }
854}
855
833/**856/**
834 * enable_general_intr() - Enable the IRQs that will be handled by the857 * enable_general_intr() - Enable the IRQs that will be handled by the
835 * general interrupt handler.858 * general interrupt handler.
@@ -1103,15 +1126,10 @@ static void shutdown_device(struct hfi1_devdata *dd) · 267 unmodified lines
1103 * We can't count on interrupts since we are stopping.1126 * We can't count on interrupts since we are stopping.
1104 */1127 */
1105 hfi1_quiet_serdes(ppd);1128 hfi1_quiet_serdes(ppd);
1106 1129 if (ppd->hfi1_wq)
1107 if (ppd->hfi1_wq) {1130 flush_workqueue(ppd->hfi1_wq);
1108 destroy_workqueue(ppd->hfi1_wq);1131 if (ppd->link_wq)
1109 ppd->hfi1_wq = NULL;1132 flush_workqueue(ppd->link_wq);
1110 }
1111 if (ppd->link_wq) {
1112 destroy_workqueue(ppd->link_wq);
1113 ppd->link_wq = NULL;
1114 }
1115 }1133 }
1116 sdma_exit(dd);1134 sdma_exit(dd);
1117}1135}
@@ -1756,6 +1774,7 @@ static void remove_one(struct pci_dev *pdev) · 638 unmodified lines
1756 * clear dma engines, etc.1774 * clear dma engines, etc.
1757 */1775 */
1758 shutdown_device(dd);1776 shutdown_device(dd);
1777 destroy_workqueues(dd);
1759 1778
1760 stop_timers(dd);1779 stop_timers(dd);
1761 1780
drivers/infiniband/hw/hfi1/qp.c+5−2
@@ -195,7 +195,7 @@ static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu) · 194 unmodified lines
195{195{
196 /* Constraining 10KB packets to 8KB packets */196 /* Constraining 10KB packets to 8KB packets */
197 if (mtu == (enum ib_mtu)OPA_MTU_10240)197 if (mtu == (enum ib_mtu)OPA_MTU_10240)
198 mtu = OPA_MTU_8192;198 mtu = (enum ib_mtu)OPA_MTU_8192;
199 return opa_mtu_enum_to_int((enum opa_mtu)mtu);199 return opa_mtu_enum_to_int((enum opa_mtu)mtu);
200}200}
201 201
@@ -367,7 +367,10 @@ bool _hfi1_schedule_send(struct rvt_qp *qp) · 165 unmodified lines
367 struct hfi1_ibport *ibp =367 struct hfi1_ibport *ibp =
368 to_iport(qp->ibqp.device, qp->port_num);368 to_iport(qp->ibqp.device, qp->port_num);
369 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);369 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
370 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);370 struct hfi1_devdata *dd = ppd->dd;
371
372 if (dd->flags & HFI1_SHUTDOWN)
373 return true;
371 374
372 return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq,375 return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq,
373 priv->s_sde ?376 priv->s_sde ?
drivers/infiniband/hw/hfi1/tid_rdma.c+4−1
@@ -5406,7 +5406,10 @@ static bool _hfi1_schedule_tid_send(struct rvt_qp *qp) · 5405 unmodified lines
5406 struct hfi1_ibport *ibp =5406 struct hfi1_ibport *ibp =
5407 to_iport(qp->ibqp.device, qp->port_num);5407 to_iport(qp->ibqp.device, qp->port_num);
5408 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);5408 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
5409 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);5409 struct hfi1_devdata *dd = ppd->dd;
5410
5411 if ((dd->flags & HFI1_SHUTDOWN))
5412 return true;
5410 5413
5411 return iowait_tid_schedule(&priv->s_iowait, ppd->hfi1_wq,5414 return iowait_tid_schedule(&priv->s_iowait, ppd->hfi1_wq,
5412 priv->s_sde ?5415 priv->s_sde ?
drivers/infiniband/hw/hns/hns_roce_hw_v2.c+22−12
@@ -3954,6 +3954,15 @@ static int config_qp_sq_buf(struct hns_roce_dev *hr_dev, · 3953 unmodified lines
3954 return 0;3954 return 0;
3955}3955}
3956 3956
3957static inline enum ib_mtu get_mtu(struct ib_qp *ibqp,
3958 const struct ib_qp_attr *attr)
3959{
3960 if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_UD)
3961 return IB_MTU_4096;
3962
3963 return attr->path_mtu;
3964}
3965
3957static int modify_qp_init_to_rtr(struct ib_qp *ibqp,3966static int modify_qp_init_to_rtr(struct ib_qp *ibqp,
3958 const struct ib_qp_attr *attr, int attr_mask,3967 const struct ib_qp_attr *attr, int attr_mask,
3959 struct hns_roce_v2_qp_context *context,3968 struct hns_roce_v2_qp_context *context,
@@ -3965,6 +3974,7 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, · 5 unmodified lines
3965 struct ib_device *ibdev = &hr_dev->ib_dev;3974 struct ib_device *ibdev = &hr_dev->ib_dev;
3966 dma_addr_t trrl_ba;3975 dma_addr_t trrl_ba;
3967 dma_addr_t irrl_ba;3976 dma_addr_t irrl_ba;
3977 enum ib_mtu mtu;
3968 u8 port_num;3978 u8 port_num;
3969 u64 *mtts;3979 u64 *mtts;
3970 u8 *dmac;3980 u8 *dmac;
@@ -4062,23 +4072,23 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, · 91 unmodified lines
4062 roce_set_field(qpc_mask->byte_52_udpspn_dmac, V2_QPC_BYTE_52_DMAC_M,4072 roce_set_field(qpc_mask->byte_52_udpspn_dmac, V2_QPC_BYTE_52_DMAC_M,
4063 V2_QPC_BYTE_52_DMAC_S, 0);4073 V2_QPC_BYTE_52_DMAC_S, 0);
4064 4074
4065 /* mtu*(2^LP_PKTN_INI) should not bigger than 1 message length 64kb */4075 mtu = get_mtu(ibqp, attr);
4076
4077 if (attr_mask & IB_QP_PATH_MTU) {
4078 roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4079 V2_QPC_BYTE_24_MTU_S, mtu);
4080 roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4081 V2_QPC_BYTE_24_MTU_S, 0);
4082 }
4083
4084#define MAX_LP_MSG_LEN 65536
4085 /* MTU*(2^LP_PKTN_INI) shouldn't be bigger than 64kb */
4066 roce_set_field(context->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,4086 roce_set_field(context->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
4067 V2_QPC_BYTE_56_LP_PKTN_INI_S,4087 V2_QPC_BYTE_56_LP_PKTN_INI_S,
4068 ilog2(hr_dev->caps.max_sq_inline / IB_MTU_4096));4088 ilog2(MAX_LP_MSG_LEN / ib_mtu_enum_to_int(mtu)));
4069 roce_set_field(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,4089 roce_set_field(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
4070 V2_QPC_BYTE_56_LP_PKTN_INI_S, 0);4090 V2_QPC_BYTE_56_LP_PKTN_INI_S, 0);
4071 4091
4072 if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_UD)
4073 roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4074 V2_QPC_BYTE_24_MTU_S, IB_MTU_4096);
4075 else if (attr_mask & IB_QP_PATH_MTU)
4076 roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4077 V2_QPC_BYTE_24_MTU_S, attr->path_mtu);
4078
4079 roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4080 V2_QPC_BYTE_24_MTU_S, 0);
4081
4082 roce_set_bit(qpc_mask->byte_108_rx_reqepsn,4092 roce_set_bit(qpc_mask->byte_108_rx_reqepsn,
4083 V2_QPC_BYTE_108_RX_REQ_PSN_ERR_S, 0);4093 V2_QPC_BYTE_108_RX_REQ_PSN_ERR_S, 0);
4084 roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M,4094 roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M,
drivers/infiniband/hw/hns/hns_roce_mr.c+1−1
@@ -120,7 +120,7 @@ static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr, · 119 unmodified lines
120 120
121 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;121 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;
122 buf_attr.page_shift = is_fast ? PAGE_SHIFT :122 buf_attr.page_shift = is_fast ? PAGE_SHIFT :
123 hr_dev->caps.pbl_buf_pg_sz + HNS_HW_PAGE_SHIFT;123 hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT;
124 buf_attr.region[0].size = length;124 buf_attr.region[0].size = length;
125 buf_attr.region[0].hopnum = mr->pbl_hop_num;125 buf_attr.region[0].hopnum = mr->pbl_hop_num;
126 buf_attr.region_count = 1;126 buf_attr.region_count = 1;
drivers/infiniband/hw/mlx5/main.c+1−1
@@ -511,7 +511,7 @@ static int mlx5_query_port_roce(struct ib_device *device, u8 port_num, · 510 unmodified lines
511 mdev_port_num);511 mdev_port_num);
512 if (err)512 if (err)
513 goto out;513 goto out;
514 ext = MLX5_CAP_PCAM_FEATURE(dev->mdev, ptys_extended_ethernet);514 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
515 eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper);515 eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper);
516 516
517 props->active_width = IB_WIDTH_4X;517 props->active_width = IB_WIDTH_4X;
drivers/infiniband/hw/mlx5/odp.c+21−6
@@ -601,6 +601,23 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 600 unmodified lines
601 */601 */
602 synchronize_srcu(&dev->odp_srcu);602 synchronize_srcu(&dev->odp_srcu);
603 603
604 /*
605 * All work on the prefetch list must be completed, xa_erase() prevented
606 * new work from being created.
607 */
608 wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work));
609
610 /*
611 * At this point it is forbidden for any other thread to enter
612 * pagefault_mr() on this imr. It is already forbidden to call
613 * pagefault_mr() on an implicit child. Due to this additions to
614 * implicit_children are prevented.
615 */
616
617 /*
618 * Block destroy_unused_implicit_child_mr() from incrementing
619 * num_deferred_work.
620 */
604 xa_lock(&imr->implicit_children);621 xa_lock(&imr->implicit_children);
605 xa_for_each (&imr->implicit_children, idx, mtt) {622 xa_for_each (&imr->implicit_children, idx, mtt) {
606 __xa_erase(&imr->implicit_children, idx);623 __xa_erase(&imr->implicit_children, idx);
@@ -609,9 +626,8 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 2 unmodified lines
609 xa_unlock(&imr->implicit_children);626 xa_unlock(&imr->implicit_children);
610 627
611 /*628 /*
612 * num_deferred_work can only be incremented inside the odp_srcu, or629 * Wait for any concurrent destroy_unused_implicit_child_mr() to
613 * under xa_lock while the child is in the xarray. Thus at this point630 * complete.
614 * it is only decreasing, and all work holding it is now on the wq.
615 */631 */
616 wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work));632 wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work));
617 633
@@ -1781,9 +1797,7 @@ static bool init_prefetch_work(struct ib_pd *pd, · 1163 unmodified lines
1781 work->frags[i].mr =1797 work->frags[i].mr =
1782 get_prefetchable_mr(pd, advice, sg_list[i].lkey);1798 get_prefetchable_mr(pd, advice, sg_list[i].lkey);
1783 if (!work->frags[i].mr) {1799 if (!work->frags[i].mr) {
1784 work->num_sge = i - 1;1800 work->num_sge = i;
1785 if (i)
1786 destroy_prefetch_work(work);
1787 return false;1801 return false;
1788 }1802 }
1789 1803
@@ -1849,6 +1863,7 @@ int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd, · 59 unmodified lines
1849 srcu_key = srcu_read_lock(&dev->odp_srcu);1863 srcu_key = srcu_read_lock(&dev->odp_srcu);
1850 if (!init_prefetch_work(pd, advice, pf_flags, work, sg_list, num_sge)) {1864 if (!init_prefetch_work(pd, advice, pf_flags, work, sg_list, num_sge)) {
1851 srcu_read_unlock(&dev->odp_srcu, srcu_key);1865 srcu_read_unlock(&dev->odp_srcu, srcu_key);
1866 destroy_prefetch_work(work);
1852 return -EINVAL;1867 return -EINVAL;
1853 }1868 }
1854 queue_work(system_unbound_wq, &work->work);1869 queue_work(system_unbound_wq, &work->work);
drivers/infiniband/hw/mlx5/qp.c+22−14
@@ -1766,15 +1766,14 @@ err: · 1765 unmodified lines
1766}1766}
1767 1767
1768static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,1768static void configure_requester_scat_cqe(struct mlx5_ib_dev *dev,
1769 struct mlx5_ib_qp *qp,
1769 struct ib_qp_init_attr *init_attr,1770 struct ib_qp_init_attr *init_attr,
1770 struct mlx5_ib_create_qp *ucmd,
1771 void *qpc)1771 void *qpc)
1772{1772{
1773 int scqe_sz;1773 int scqe_sz;
1774 bool allow_scat_cqe = false;1774 bool allow_scat_cqe = false;
1775 1775
1776 if (ucmd)1776 allow_scat_cqe = qp->flags_en & MLX5_QP_FLAG_ALLOW_SCATTER_CQE;
1777 allow_scat_cqe = ucmd->flags & MLX5_QP_FLAG_ALLOW_SCATTER_CQE;
1778 1777
1779 if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR)1778 if (!allow_scat_cqe && init_attr->sq_sig_type != IB_SIGNAL_ALL_WR)
1780 return;1779 return;
@@ -1853,8 +1852,6 @@ static int create_xrc_tgt_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 72 unmodified lines
1853 u32 *in;1852 u32 *in;
1854 int err;1853 int err;
1855 1854
1856 mutex_init(&qp->mutex);
1857
1858 if (attr->sq_sig_type == IB_SIGNAL_ALL_WR)1855 if (attr->sq_sig_type == IB_SIGNAL_ALL_WR)
1859 qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;1856 qp->sq_signal_bits = MLX5_WQE_CTRL_CQ_UPDATE;
1860 1857
@@ -1938,7 +1935,6 @@ static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, · 77 unmodified lines
1938 u32 *in;1935 u32 *in;
1939 int err;1936 int err;
1940 1937
1941 mutex_init(&qp->mutex);
1942 spin_lock_init(&qp->sq.lock);1938 spin_lock_init(&qp->sq.lock);
1943 spin_lock_init(&qp->rq.lock);1939 spin_lock_init(&qp->rq.lock);
1944 1940
@@ -2012,7 +2008,7 @@ static int create_user_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, · 67 unmodified lines
2012 }2008 }
2013 if ((qp->flags_en & MLX5_QP_FLAG_SCATTER_CQE) &&2009 if ((qp->flags_en & MLX5_QP_FLAG_SCATTER_CQE) &&
2014 (qp->type == MLX5_IB_QPT_DCI || qp->type == IB_QPT_RC))2010 (qp->type == MLX5_IB_QPT_DCI || qp->type == IB_QPT_RC))
2015 configure_requester_scat_cqe(dev, init_attr, ucmd, qpc);2011 configure_requester_scat_cqe(dev, qp, init_attr, qpc);
2016 2012
2017 if (qp->rq.wqe_cnt) {2013 if (qp->rq.wqe_cnt) {
2018 MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);2014 MLX5_SET(qpc, qpc, log_rq_stride, qp->rq.wqe_shift - 4);
@@ -2129,7 +2125,6 @@ static int create_kernel_qp(struct mlx5_ib_dev *dev, struct ib_pd *pd, · 110 unmodified lines
2129 u32 *in;2125 u32 *in;
2130 int err;2126 int err;
2131 2127
2132 mutex_init(&qp->mutex);
2133 spin_lock_init(&qp->sq.lock);2128 spin_lock_init(&qp->sq.lock);
2134 spin_lock_init(&qp->rq.lock);2129 spin_lock_init(&qp->rq.lock);
2135 2130
@@ -2543,13 +2538,18 @@ static void process_vendor_flag(struct mlx5_ib_dev *dev, int *flags, int flag, · 407 unmodified lines
2543 return;2538 return;
2544 }2539 }
2545 2540
2546 if (flag == MLX5_QP_FLAG_SCATTER_CQE) {2541 switch (flag) {
2542 case MLX5_QP_FLAG_SCATTER_CQE:
2543 case MLX5_QP_FLAG_ALLOW_SCATTER_CQE:
2547 /*2544 /*
2548 * We don't return error if this flag was provided,2545 * We don't return error if these flags were provided,
2549 * and mlx5 doesn't have right capability.2546 * and mlx5 doesn't have right capability.
2550 */2547 */
2551 *flags &= ~MLX5_QP_FLAG_SCATTER_CQE;2548 *flags &= ~(MLX5_QP_FLAG_SCATTER_CQE |
2549 MLX5_QP_FLAG_ALLOW_SCATTER_CQE);
2552 return;2550 return;
2551 default:
2552 break;
2553 }2553 }
2554 mlx5_ib_dbg(dev, "Vendor create QP flag 0x%X is not supported\n", flag);2554 mlx5_ib_dbg(dev, "Vendor create QP flag 0x%X is not supported\n", flag);
2555}2555}
@@ -2589,6 +2589,8 @@ static int process_vendor_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 33 unmodified lines
2589 process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SIGNATURE, true, qp);2589 process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SIGNATURE, true, qp);
2590 process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SCATTER_CQE,2590 process_vendor_flag(dev, &flags, MLX5_QP_FLAG_SCATTER_CQE,
2591 MLX5_CAP_GEN(mdev, sctr_data_cqe), qp);2591 MLX5_CAP_GEN(mdev, sctr_data_cqe), qp);
2592 process_vendor_flag(dev, &flags, MLX5_QP_FLAG_ALLOW_SCATTER_CQE,
2593 MLX5_CAP_GEN(mdev, sctr_data_cqe), qp);
2592 2594
2593 if (qp->type == IB_QPT_RAW_PACKET) {2595 if (qp->type == IB_QPT_RAW_PACKET) {
2594 cond = MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) ||2596 cond = MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) ||
@@ -2668,6 +2670,10 @@ static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 73 unmodified lines
2668 if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl)2670 if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl)
2669 return (create_flags) ? -EINVAL : 0;2671 return (create_flags) ? -EINVAL : 0;
2670 2672
2673 process_create_flag(dev, &create_flags, IB_QP_CREATE_NETIF_QP,
2674 mlx5_get_flow_namespace(dev->mdev,
2675 MLX5_FLOW_NAMESPACE_BYPASS),
2676 qp);
2671 process_create_flag(dev, &create_flags,2677 process_create_flag(dev, &create_flags,
2672 IB_QP_CREATE_INTEGRITY_EN,2678 IB_QP_CREATE_INTEGRITY_EN,
2673 MLX5_CAP_GEN(mdev, sho), qp);2679 MLX5_CAP_GEN(mdev, sho), qp);
@@ -2959,6 +2965,7 @@ struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attr, · 285 unmodified lines
2959 goto free_ucmd;2965 goto free_ucmd;
2960 }2966 }
2961 2967
2968 mutex_init(&qp->mutex);
2962 qp->type = type;2969 qp->type = type;
2963 if (udata) {2970 if (udata) {
2964 err = process_vendor_flags(dev, qp, params.ucmd, attr);2971 err = process_vendor_flags(dev, qp, params.ucmd, attr);
@@ -3001,11 +3008,12 @@ destroy_qp: · 36 unmodified lines
3001 mlx5_ib_destroy_dct(qp);3008 mlx5_ib_destroy_dct(qp);
3002 } else {3009 } else {
3003 /*3010 /*
3004 * The two lines below are temp solution till QP allocation3011 * These lines below are temp solution till QP allocation
3005 * will be moved to be under IB/core responsiblity.3012 * will be moved to be under IB/core responsiblity.
3006 */3013 */
3007 qp->ibqp.send_cq = attr->send_cq;3014 qp->ibqp.send_cq = attr->send_cq;
3008 qp->ibqp.recv_cq = attr->recv_cq;3015 qp->ibqp.recv_cq = attr->recv_cq;
3016 qp->ibqp.pd = pd;
3009 destroy_qp_common(dev, qp, udata);3017 destroy_qp_common(dev, qp, udata);
3010 }3018 }
3011 3019
drivers/infiniband/hw/mlx5/srq_cmd.c+2−2
@@ -83,11 +83,11 @@ struct mlx5_core_srq *mlx5_cmd_get_srq(struct mlx5_ib_dev *dev, u32 srqn) · 82 unmodified lines
83 struct mlx5_srq_table *table = &dev->srq_table;83 struct mlx5_srq_table *table = &dev->srq_table;
84 struct mlx5_core_srq *srq;84 struct mlx5_core_srq *srq;
85 85
86 xa_lock(&table->array);86 xa_lock_irq(&table->array);
87 srq = xa_load(&table->array, srqn);87 srq = xa_load(&table->array, srqn);
88 if (srq)88 if (srq)
89 refcount_inc(&srq->common.refcount);89 refcount_inc(&srq->common.refcount);
90 xa_unlock(&table->array);90 xa_unlock_irq(&table->array);
91 91
92 return srq;92 return srq;
93}93}
drivers/infiniband/sw/rdmavt/qp.c+4−29
@@ -901,8 +901,6 @@ static void rvt_init_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, · 900 unmodified lines
901 qp->s_tail_ack_queue = 0;901 qp->s_tail_ack_queue = 0;
902 qp->s_acked_ack_queue = 0;902 qp->s_acked_ack_queue = 0;
903 qp->s_num_rd_atomic = 0;903 qp->s_num_rd_atomic = 0;
904 if (qp->r_rq.kwq)
905 qp->r_rq.kwq->count = qp->r_rq.size;
906 qp->r_sge.num_sge = 0;904 qp->r_sge.num_sge = 0;
907 atomic_set(&qp->s_reserved_used, 0);905 atomic_set(&qp->s_reserved_used, 0);
908}906}
@@ -2366,31 +2364,6 @@ bad_lkey: · 1457 unmodified lines
2366 return 0;2364 return 0;
2367}2365}
2368 2366
2369/**
2370 * get_count - count numbers of request work queue entries
2371 * in circular buffer
2372 * @rq: data structure for request queue entry
2373 * @tail: tail indices of the circular buffer
2374 * @head: head indices of the circular buffer
2375 *
2376 * Return - total number of entries in the circular buffer
2377 */
2378static u32 get_count(struct rvt_rq *rq, u32 tail, u32 head)
2379{
2380 u32 count;
2381
2382 count = head;
2383
2384 if (count >= rq->size)
2385 count = 0;
2386 if (count < tail)
2387 count += rq->size - tail;
2388 else
2389 count -= tail;
2390
2391 return count;
2392}
2393
2394/**2367/**
2395 * get_rvt_head - get head indices of the circular buffer2368 * get_rvt_head - get head indices of the circular buffer
2396 * @rq: data structure for request queue entry2369 * @rq: data structure for request queue entry
@@ -2465,7 +2438,7 @@ int rvt_get_rwqe(struct rvt_qp *qp, bool wr_id_only) · 68 unmodified lines
2465 2438
2466 if (kwq->count < RVT_RWQ_COUNT_THRESHOLD) {2439 if (kwq->count < RVT_RWQ_COUNT_THRESHOLD) {
2467 head = get_rvt_head(rq, ip);2440 head = get_rvt_head(rq, ip);
2468 kwq->count = get_count(rq, tail, head);2441 kwq->count = rvt_get_rq_count(rq, head, tail);
2469 }2442 }
2470 if (unlikely(kwq->count == 0)) {2443 if (unlikely(kwq->count == 0)) {
2471 ret = 0;2444 ret = 0;
@@ -2500,7 +2473,9 @@ int rvt_get_rwqe(struct rvt_qp *qp, bool wr_id_only) · 28 unmodified lines
2500 * the number of remaining WQEs.2473 * the number of remaining WQEs.
2501 */2474 */
2502 if (kwq->count < srq->limit) {2475 if (kwq->count < srq->limit) {
2503 kwq->count = get_count(rq, tail, get_rvt_head(rq, ip));2476 kwq->count =
2477 rvt_get_rq_count(rq,
2478 get_rvt_head(rq, ip), tail);
2504 if (kwq->count < srq->limit) {2479 if (kwq->count < srq->limit) {
2505 struct ib_event ev;2480 struct ib_event ev;
2506 2481
drivers/infiniband/sw/rdmavt/rc.c+1−3
@@ -127,9 +127,7 @@ __be32 rvt_compute_aeth(struct rvt_qp *qp) · 126 unmodified lines
127 * not atomic, which is OK, since the fuzziness is127 * not atomic, which is OK, since the fuzziness is
128 * resolved as further ACKs go out.128 * resolved as further ACKs go out.
129 */129 */
130 credits = head - tail;130 credits = rvt_get_rq_count(&qp->r_rq, head, tail);
131 if ((int)credits < 0)
132 credits += qp->r_rq.size;
133 }131 }
134 /*132 /*
135 * Binary search the credit table to find the code to133 * Binary search the credit table to find the code to
drivers/infiniband/sw/siw/siw_main.c+2−1
@@ -67,12 +67,13 @@ static int siw_device_register(struct siw_device *sdev, const char *name) · 66 unmodified lines
67 static int dev_id = 1;67 static int dev_id = 1;
68 int rv;68 int rv;
69 69
70 sdev->vendor_part_id = dev_id++;
71
70 rv = ib_register_device(base_dev, name);72 rv = ib_register_device(base_dev, name);
71 if (rv) {73 if (rv) {
72 pr_warn("siw: device registration error %d\n", rv);74 pr_warn("siw: device registration error %d\n", rv);
73 return rv;75 return rv;
74 }76 }
75 sdev->vendor_part_id = dev_id++;
76 77
77 siw_dbg(base_dev, "HWaddr=%pM\n", sdev->netdev->dev_addr);78 siw_dbg(base_dev, "HWaddr=%pM\n", sdev->netdev->dev_addr);
78 79
drivers/input/mouse/elan_i2c_core.c+5−4
@@ -951,6 +951,8 @@ static void elan_report_absolute(struct elan_tp_data *data, u8 *packet) · 950 unmodified lines
951 u8 hover_info = packet[ETP_HOVER_INFO_OFFSET];951 u8 hover_info = packet[ETP_HOVER_INFO_OFFSET];
952 bool contact_valid, hover_event;952 bool contact_valid, hover_event;
953 953
954 pm_wakeup_event(&data->client->dev, 0);
955
954 hover_event = hover_info & 0x40;956 hover_event = hover_info & 0x40;
955 for (i = 0; i < ETP_MAX_FINGERS; i++) {957 for (i = 0; i < ETP_MAX_FINGERS; i++) {
956 contact_valid = tp_info & (1U << (3 + i));958 contact_valid = tp_info & (1U << (3 + i));
@@ -974,6 +976,8 @@ static void elan_report_trackpoint(struct elan_tp_data *data, u8 *report) · 17 unmodified lines
974 u8 *packet = &report[ETP_REPORT_ID_OFFSET + 1];976 u8 *packet = &report[ETP_REPORT_ID_OFFSET + 1];
975 int x, y;977 int x, y;
976 978
979 pm_wakeup_event(&data->client->dev, 0);
980
977 if (!data->tp_input) {981 if (!data->tp_input) {
978 dev_warn_once(&data->client->dev,982 dev_warn_once(&data->client->dev,
979 "received a trackpoint report while no trackpoint device has been created. Please report upstream.\n");983 "received a trackpoint report while no trackpoint device has been created. Please report upstream.\n");
@@ -998,7 +1002,6 @@ static void elan_report_trackpoint(struct elan_tp_data *data, u8 *report) · 18 unmodified lines
998static irqreturn_t elan_isr(int irq, void *dev_id)1002static irqreturn_t elan_isr(int irq, void *dev_id)
999{1003{
1000 struct elan_tp_data *data = dev_id;1004 struct elan_tp_data *data = dev_id;
1001 struct device *dev = &data->client->dev;
1002 int error;1005 int error;
1003 u8 report[ETP_MAX_REPORT_LEN];1006 u8 report[ETP_MAX_REPORT_LEN];
1004 1007
@@ -1016,8 +1019,6 @@ static irqreturn_t elan_isr(int irq, void *dev_id) · 11 unmodified lines
1016 if (error)1019 if (error)
1017 goto out;1020 goto out;
1018 1021
1019 pm_wakeup_event(dev, 0);
1020
1021 switch (report[ETP_REPORT_ID_OFFSET]) {1022 switch (report[ETP_REPORT_ID_OFFSET]) {
1022 case ETP_REPORT_ID:1023 case ETP_REPORT_ID:
1023 elan_report_absolute(data, report);1024 elan_report_absolute(data, report);
@@ -1026,7 +1027,7 @@ static irqreturn_t elan_isr(int irq, void *dev_id) · 2 unmodified lines
1026 elan_report_trackpoint(data, report);1027 elan_report_trackpoint(data, report);
1027 break;1028 break;
1028 default:1029 default:
1029 dev_err(dev, "invalid report id data (%x)\n",1030 dev_err(&data->client->dev, "invalid report id data (%x)\n",
1030 report[ETP_REPORT_ID_OFFSET]);1031 report[ETP_REPORT_ID_OFFSET]);
1031 }1032 }
1032 1033
drivers/input/mouse/synaptics.c+1−0
@@ -179,6 +179,7 @@ static const char * const smbus_pnp_ids[] = { · 178 unmodified lines
179 "LEN0093", /* T480 */179 "LEN0093", /* T480 */
180 "LEN0096", /* X280 */180 "LEN0096", /* X280 */
181 "LEN0097", /* X280 -> ALPS trackpoint */181 "LEN0097", /* X280 -> ALPS trackpoint */
182 "LEN0099", /* X1 Extreme 1st */
182 "LEN009b", /* T580 */183 "LEN009b", /* T580 */
183 "LEN200f", /* T450s */184 "LEN200f", /* T450s */
184 "LEN2044", /* L470 */185 "LEN2044", /* L470 */
drivers/input/serio/i8042-x86ia64io.h+7−0
@@ -425,6 +425,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = { · 424 unmodified lines
425 DMI_MATCH(DMI_PRODUCT_NAME, "076804U"),425 DMI_MATCH(DMI_PRODUCT_NAME, "076804U"),
426 },426 },
427 },427 },
428 {
429 /* Lenovo XiaoXin Air 12 */
430 .matches = {
431 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
432 DMI_MATCH(DMI_PRODUCT_NAME, "80UN"),
433 },
434 },
428 {435 {
429 .matches = {436 .matches = {
430 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),437 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
drivers/input/touchscreen/elants_i2c.c+0−1
@@ -1325,7 +1325,6 @@ static int elants_i2c_probe(struct i2c_client *client, · 1324 unmodified lines
1325 0, MT_TOOL_PALM, 0, 0);1325 0, MT_TOOL_PALM, 0, 0);
1326 input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->x_res);1326 input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->x_res);
1327 input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->y_res);1327 input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->y_res);
1328 input_abs_set_res(ts->input, ABS_MT_TOUCH_MAJOR, 1);
1329 1328
1330 touchscreen_parse_properties(ts->input, true, &ts->prop);1329 touchscreen_parse_properties(ts->input, true, &ts->prop);
1331 1330
drivers/interconnect/core.c+9−3
@@ -243,6 +243,7 @@ static int aggregate_requests(struct icc_node *node) · 242 unmodified lines
243{243{
244 struct icc_provider *p = node->provider;244 struct icc_provider *p = node->provider;
245 struct icc_req *r;245 struct icc_req *r;
246 u32 avg_bw, peak_bw;
246 247
247 node->avg_bw = 0;248 node->avg_bw = 0;
248 node->peak_bw = 0;249 node->peak_bw = 0;
@@ -251,9 +252,14 @@ static int aggregate_requests(struct icc_node *node) · 2 unmodified lines
251 p->pre_aggregate(node);252 p->pre_aggregate(node);
252 253
253 hlist_for_each_entry(r, &node->req_list, req_node) {254 hlist_for_each_entry(r, &node->req_list, req_node) {
254 if (!r->enabled)255 if (r->enabled) {
255 continue;256 avg_bw = r->avg_bw;
256 p->aggregate(node, r->tag, r->avg_bw, r->peak_bw,257 peak_bw = r->peak_bw;
258 } else {
259 avg_bw = 0;
260 peak_bw = 0;
261 }
262 p->aggregate(node, r->tag, avg_bw, peak_bw,
257 &node->avg_bw, &node->peak_bw);263 &node->avg_bw, &node->peak_bw);
258 }264 }
259 265
drivers/interconnect/qcom/msm8916.c+7−7
@@ -197,13 +197,13 @@ DEFINE_QNODE(pcnoc_int_0, MSM8916_PNOC_INT_0, 8, -1, -1, MSM8916_PNOC_SNOC_MAS, · 196 unmodified lines
197DEFINE_QNODE(pcnoc_int_1, MSM8916_PNOC_INT_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);197DEFINE_QNODE(pcnoc_int_1, MSM8916_PNOC_INT_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
198DEFINE_QNODE(pcnoc_m_0, MSM8916_PNOC_MAS_0, 8, -1, -1, MSM8916_PNOC_INT_0);198DEFINE_QNODE(pcnoc_m_0, MSM8916_PNOC_MAS_0, 8, -1, -1, MSM8916_PNOC_INT_0);
199DEFINE_QNODE(pcnoc_m_1, MSM8916_PNOC_MAS_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);199DEFINE_QNODE(pcnoc_m_1, MSM8916_PNOC_MAS_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
200DEFINE_QNODE(pcnoc_s_0, MSM8916_PNOC_SLV_0, 8, -1, -1, MSM8916_SLAVE_CLK_CTL, MSM8916_SLAVE_TLMM, MSM8916_SLAVE_TCSR, MSM8916_SLAVE_SECURITY, MSM8916_SLAVE_MSS);200DEFINE_QNODE(pcnoc_s_0, MSM8916_PNOC_SLV_0, 4, -1, -1, MSM8916_SLAVE_CLK_CTL, MSM8916_SLAVE_TLMM, MSM8916_SLAVE_TCSR, MSM8916_SLAVE_SECURITY, MSM8916_SLAVE_MSS);
201DEFINE_QNODE(pcnoc_s_1, MSM8916_PNOC_SLV_1, 8, -1, -1, MSM8916_SLAVE_IMEM_CFG, MSM8916_SLAVE_CRYPTO_0_CFG, MSM8916_SLAVE_MSG_RAM, MSM8916_SLAVE_PDM, MSM8916_SLAVE_PRNG);201DEFINE_QNODE(pcnoc_s_1, MSM8916_PNOC_SLV_1, 4, -1, -1, MSM8916_SLAVE_IMEM_CFG, MSM8916_SLAVE_CRYPTO_0_CFG, MSM8916_SLAVE_MSG_RAM, MSM8916_SLAVE_PDM, MSM8916_SLAVE_PRNG);
202DEFINE_QNODE(pcnoc_s_2, MSM8916_PNOC_SLV_2, 8, -1, -1, MSM8916_SLAVE_SPDM, MSM8916_SLAVE_BOOT_ROM, MSM8916_SLAVE_BIMC_CFG, MSM8916_SLAVE_PNOC_CFG, MSM8916_SLAVE_PMIC_ARB);202DEFINE_QNODE(pcnoc_s_2, MSM8916_PNOC_SLV_2, 4, -1, -1, MSM8916_SLAVE_SPDM, MSM8916_SLAVE_BOOT_ROM, MSM8916_SLAVE_BIMC_CFG, MSM8916_SLAVE_PNOC_CFG, MSM8916_SLAVE_PMIC_ARB);
203DEFINE_QNODE(pcnoc_s_3, MSM8916_PNOC_SLV_3, 8, -1, -1, MSM8916_SLAVE_MPM, MSM8916_SLAVE_SNOC_CFG, MSM8916_SLAVE_RBCPR_CFG, MSM8916_SLAVE_QDSS_CFG, MSM8916_SLAVE_DEHR_CFG);203DEFINE_QNODE(pcnoc_s_3, MSM8916_PNOC_SLV_3, 4, -1, -1, MSM8916_SLAVE_MPM, MSM8916_SLAVE_SNOC_CFG, MSM8916_SLAVE_RBCPR_CFG, MSM8916_SLAVE_QDSS_CFG, MSM8916_SLAVE_DEHR_CFG);
204DEFINE_QNODE(pcnoc_s_4, MSM8916_PNOC_SLV_4, 8, -1, -1, MSM8916_SLAVE_VENUS_CFG, MSM8916_SLAVE_CAMERA_CFG, MSM8916_SLAVE_DISPLAY_CFG);204DEFINE_QNODE(pcnoc_s_4, MSM8916_PNOC_SLV_4, 4, -1, -1, MSM8916_SLAVE_VENUS_CFG, MSM8916_SLAVE_CAMERA_CFG, MSM8916_SLAVE_DISPLAY_CFG);
205DEFINE_QNODE(pcnoc_s_8, MSM8916_PNOC_SLV_8, 8, -1, -1, MSM8916_SLAVE_USB_HS, MSM8916_SLAVE_SDCC_1, MSM8916_SLAVE_BLSP_1);205DEFINE_QNODE(pcnoc_s_8, MSM8916_PNOC_SLV_8, 4, -1, -1, MSM8916_SLAVE_USB_HS, MSM8916_SLAVE_SDCC_1, MSM8916_SLAVE_BLSP_1);
206DEFINE_QNODE(pcnoc_s_9, MSM8916_PNOC_SLV_9, 8, -1, -1, MSM8916_SLAVE_SDCC_2, MSM8916_SLAVE_LPASS, MSM8916_SLAVE_GRAPHICS_3D_CFG);206DEFINE_QNODE(pcnoc_s_9, MSM8916_PNOC_SLV_9, 4, -1, -1, MSM8916_SLAVE_SDCC_2, MSM8916_SLAVE_LPASS, MSM8916_SLAVE_GRAPHICS_3D_CFG);
207DEFINE_QNODE(pcnoc_snoc_mas, MSM8916_PNOC_SNOC_MAS, 8, 29, -1, MSM8916_PNOC_SNOC_SLV);207DEFINE_QNODE(pcnoc_snoc_mas, MSM8916_PNOC_SNOC_MAS, 8, 29, -1, MSM8916_PNOC_SNOC_SLV);
208DEFINE_QNODE(pcnoc_snoc_slv, MSM8916_PNOC_SNOC_SLV, 8, -1, 45, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC, MSM8916_SNOC_INT_1);208DEFINE_QNODE(pcnoc_snoc_slv, MSM8916_PNOC_SNOC_SLV, 8, -1, 45, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC, MSM8916_SNOC_INT_1);
209DEFINE_QNODE(qdss_int, MSM8916_SNOC_QDSS_INT, 8, -1, -1, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC);209DEFINE_QNODE(qdss_int, MSM8916_SNOC_QDSS_INT, 8, -1, -1, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC);
drivers/iommu/Kconfig+1−0
@@ -305,6 +305,7 @@ config ROCKCHIP_IOMMU · 304 unmodified lines
305 305
306config SUN50I_IOMMU306config SUN50I_IOMMU
307 bool "Allwinner H6 IOMMU Support"307 bool "Allwinner H6 IOMMU Support"
308 depends on HAS_DMA
308 depends on ARCH_SUNXI || COMPILE_TEST309 depends on ARCH_SUNXI || COMPILE_TEST
309 select ARM_DMA_USE_IOMMU310 select ARM_DMA_USE_IOMMU
310 select IOMMU_API311 select IOMMU_API
drivers/iommu/amd/amd_iommu.h+1−1
@@ -102,7 +102,7 @@ extern int __init add_special_device(u8 type, u8 id, u16 *devid, · 101 unmodified lines
102#ifdef CONFIG_DMI102#ifdef CONFIG_DMI
103void amd_iommu_apply_ivrs_quirks(void);103void amd_iommu_apply_ivrs_quirks(void);
104#else104#else
105static void amd_iommu_apply_ivrs_quirks(void) { }105static inline void amd_iommu_apply_ivrs_quirks(void) { }
106#endif106#endif
107 107
108#endif108#endif
drivers/iommu/amd/iommu.c+3−2
@@ -3985,9 +3985,10 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu) · 3984 unmodified lines
3985 if (!fn)3985 if (!fn)
3986 return -ENOMEM;3986 return -ENOMEM;
3987 iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu);3987 iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu);
3988 irq_domain_free_fwnode(fn);3988 if (!iommu->ir_domain) {
3989 if (!iommu->ir_domain)3989 irq_domain_free_fwnode(fn);
3990 return -ENOMEM;3990 return -ENOMEM;
3991 }
3991 3992
3992 iommu->ir_domain->parent = arch_get_ir_parent_domain();3993 iommu->ir_domain->parent = arch_get_ir_parent_domain();
3993 iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain,3994 iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain,
drivers/iommu/arm-smmu-qcom.c+1−1
@@ -12,7 +12,7 @@ struct qcom_smmu { · 11 unmodified lines
12 struct arm_smmu_device smmu;12 struct arm_smmu_device smmu;
13};13};
14 14
15static const struct of_device_id qcom_smmu_client_of_match[] = {15static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = {
16 { .compatible = "qcom,adreno" },16 { .compatible = "qcom,adreno" },
17 { .compatible = "qcom,mdp4" },17 { .compatible = "qcom,mdp4" },
18 { .compatible = "qcom,mdss" },18 { .compatible = "qcom,mdss" },
drivers/iommu/hyperv-iommu.c+4−1
@@ -155,7 +155,10 @@ static int __init hyperv_prepare_irq_remapping(void) · 154 unmodified lines
155 0, IOAPIC_REMAPPING_ENTRY, fn,155 0, IOAPIC_REMAPPING_ENTRY, fn,
156 &hyperv_ir_domain_ops, NULL);156 &hyperv_ir_domain_ops, NULL);
157 157
158 irq_domain_free_fwnode(fn);158 if (!ioapic_ir_domain) {
159 irq_domain_free_fwnode(fn);
160 return -ENOMEM;
161 }
159 162
160 /*163 /*
161 * Hyper-V doesn't provide irq remapping function for164 * Hyper-V doesn't provide irq remapping function for
drivers/iommu/intel/irq_remapping.c+1−1
@@ -563,8 +563,8 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu) · 562 unmodified lines
563 0, INTR_REMAP_TABLE_ENTRIES,563 0, INTR_REMAP_TABLE_ENTRIES,
564 fn, &intel_ir_domain_ops,564 fn, &intel_ir_domain_ops,
565 iommu);565 iommu);
566 irq_domain_free_fwnode(fn);
567 if (!iommu->ir_domain) {566 if (!iommu->ir_domain) {
567 irq_domain_free_fwnode(fn);
568 pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id);568 pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id);
569 goto out_free_bitmap;569 goto out_free_bitmap;
570 }570 }
drivers/iommu/iommu.c+1−1
@@ -295,10 +295,10 @@ void iommu_release_device(struct device *dev) · 294 unmodified lines
295 return;295 return;
296 296
297 iommu_device_unlink(dev->iommu->iommu_dev, dev);297 iommu_device_unlink(dev->iommu->iommu_dev, dev);
298 iommu_group_remove_device(dev);
299 298
300 ops->release_device(dev);299 ops->release_device(dev);
301 300
301 iommu_group_remove_device(dev);
302 module_put(ops->owner);302 module_put(ops->owner);
303 dev_iommu_free(dev);303 dev_iommu_free(dev);
304}304}
drivers/iommu/qcom_iommu.c+17−20
@@ -65,6 +65,7 @@ struct qcom_iommu_domain { · 64 unmodified lines
65 struct mutex init_mutex; /* Protects iommu pointer */65 struct mutex init_mutex; /* Protects iommu pointer */
66 struct iommu_domain domain;66 struct iommu_domain domain;
67 struct qcom_iommu_dev *iommu;67 struct qcom_iommu_dev *iommu;
68 struct iommu_fwspec *fwspec;
68};69};
69 70
70static struct qcom_iommu_domain *to_qcom_iommu_domain(struct iommu_domain *dom)71static struct qcom_iommu_domain *to_qcom_iommu_domain(struct iommu_domain *dom)
@@ -84,9 +85,9 @@ static struct qcom_iommu_dev * to_iommu(struct device *dev) · 13 unmodified lines
84 return dev_iommu_priv_get(dev);85 return dev_iommu_priv_get(dev);
85}86}
86 87
87static struct qcom_iommu_ctx * to_ctx(struct device *dev, unsigned asid)88static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid)
88{89{
89 struct qcom_iommu_dev *qcom_iommu = to_iommu(dev);90 struct qcom_iommu_dev *qcom_iommu = d->iommu;
90 if (!qcom_iommu)91 if (!qcom_iommu)
91 return NULL;92 return NULL;
92 return qcom_iommu->ctxs[asid - 1];93 return qcom_iommu->ctxs[asid - 1];
@@ -118,14 +119,12 @@ iommu_readq(struct qcom_iommu_ctx *ctx, unsigned reg) · 25 unmodified lines
118 119
119static void qcom_iommu_tlb_sync(void *cookie)120static void qcom_iommu_tlb_sync(void *cookie)
120{121{
121 struct iommu_fwspec *fwspec;122 struct qcom_iommu_domain *qcom_domain = cookie;
122 struct device *dev = cookie;123 struct iommu_fwspec *fwspec = qcom_domain->fwspec;
123 unsigned i;124 unsigned i;
124 125
125 fwspec = dev_iommu_fwspec_get(dev);
126
127 for (i = 0; i < fwspec->num_ids; i++) {126 for (i = 0; i < fwspec->num_ids; i++) {
128 struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);127 struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
129 unsigned int val, ret;128 unsigned int val, ret;
130 129
131 iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0);130 iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0);
@@ -139,14 +138,12 @@ static void qcom_iommu_tlb_sync(void *cookie) · 7 unmodified lines
139 138
140static void qcom_iommu_tlb_inv_context(void *cookie)139static void qcom_iommu_tlb_inv_context(void *cookie)
141{140{
142 struct device *dev = cookie;141 struct qcom_iommu_domain *qcom_domain = cookie;
143 struct iommu_fwspec *fwspec;142 struct iommu_fwspec *fwspec = qcom_domain->fwspec;
144 unsigned i;143 unsigned i;
145 144
146 fwspec = dev_iommu_fwspec_get(dev);
147
148 for (i = 0; i < fwspec->num_ids; i++) {145 for (i = 0; i < fwspec->num_ids; i++) {
149 struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);146 struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
150 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid);147 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid);
151 }148 }
152 149
@@ -156,16 +153,14 @@ static void qcom_iommu_tlb_inv_context(void *cookie) · 3 unmodified lines
156static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,153static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
157 size_t granule, bool leaf, void *cookie)154 size_t granule, bool leaf, void *cookie)
158{155{
159 struct device *dev = cookie;156 struct qcom_iommu_domain *qcom_domain = cookie;
160 struct iommu_fwspec *fwspec;157 struct iommu_fwspec *fwspec = qcom_domain->fwspec;
161 unsigned i, reg;158 unsigned i, reg;
162 159
163 reg = leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA;160 reg = leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA;
164 161
165 fwspec = dev_iommu_fwspec_get(dev);
166
167 for (i = 0; i < fwspec->num_ids; i++) {162 for (i = 0; i < fwspec->num_ids; i++) {
168 struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);163 struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
169 size_t s = size;164 size_t s = size;
170 165
171 iova = (iova >> 12) << 12;166 iova = (iova >> 12) << 12;
@@ -256,7 +251,9 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, · 84 unmodified lines
256 };251 };
257 252
258 qcom_domain->iommu = qcom_iommu;253 qcom_domain->iommu = qcom_iommu;
259 pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, dev);254 qcom_domain->fwspec = fwspec;
255
256 pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, qcom_domain);
260 if (!pgtbl_ops) {257 if (!pgtbl_ops) {
261 dev_err(qcom_iommu->dev, "failed to allocate pagetable ops\n");258 dev_err(qcom_iommu->dev, "failed to allocate pagetable ops\n");
262 ret = -ENOMEM;259 ret = -ENOMEM;
@@ -269,7 +266,7 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, · 6 unmodified lines
269 domain->geometry.force_aperture = true;266 domain->geometry.force_aperture = true;
270 267
271 for (i = 0; i < fwspec->num_ids; i++) {268 for (i = 0; i < fwspec->num_ids; i++) {
272 struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);269 struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
273 270
274 if (!ctx->secure_init) {271 if (!ctx->secure_init) {
275 ret = qcom_scm_restore_sec_cfg(qcom_iommu->sec_id, ctx->asid);272 ret = qcom_scm_restore_sec_cfg(qcom_iommu->sec_id, ctx->asid);
@@ -419,7 +416,7 @@ static void qcom_iommu_detach_dev(struct iommu_domain *domain, struct device *de · 143 unmodified lines
419 416
420 pm_runtime_get_sync(qcom_iommu->dev);417 pm_runtime_get_sync(qcom_iommu->dev);
421 for (i = 0; i < fwspec->num_ids; i++) {418 for (i = 0; i < fwspec->num_ids; i++) {
422 struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);419 struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
423 420
424 /* Disable the context bank: */421 /* Disable the context bank: */
425 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);422 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
drivers/iommu/sun50i-iommu.c+3−5
@@ -313,9 +313,9 @@ static int sun50i_iommu_flush_all_tlb(struct sun50i_iommu *iommu) · 312 unmodified lines
313 IOMMU_TLB_FLUSH_MICRO_TLB(1) |313 IOMMU_TLB_FLUSH_MICRO_TLB(1) |
314 IOMMU_TLB_FLUSH_MICRO_TLB(0));314 IOMMU_TLB_FLUSH_MICRO_TLB(0));
315 315
316 ret = readl_poll_timeout(iommu->base + IOMMU_TLB_FLUSH_REG,316 ret = readl_poll_timeout_atomic(iommu->base + IOMMU_TLB_FLUSH_REG,
317 reg, !reg,317 reg, !reg,
318 1, 2000);318 1, 2000);
319 if (ret)319 if (ret)
320 dev_warn(iommu->dev, "TLB Flush timed out!\n");320 dev_warn(iommu->dev, "TLB Flush timed out!\n");
321 321
@@ -556,7 +556,6 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova · 234 unmodified lines
556{556{
557 struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);557 struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain);
558 phys_addr_t pt_phys;558 phys_addr_t pt_phys;
559 dma_addr_t pte_dma;
560 u32 *pte_addr;559 u32 *pte_addr;
561 u32 dte;560 u32 dte;
562 561
@@ -566,7 +565,6 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova · 3 unmodified lines
566 565
567 pt_phys = sun50i_dte_get_pt_address(dte);566 pt_phys = sun50i_dte_get_pt_address(dte);
568 pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);567 pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova);
569 pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE;
570 568
571 if (!sun50i_pte_is_page_valid(*pte_addr))569 if (!sun50i_pte_is_page_valid(*pte_addr))
572 return 0;570 return 0;
drivers/md/dm-integrity.c+2−2
@@ -2420,7 +2420,7 @@ static void integrity_writer(struct work_struct *w) · 2419 unmodified lines
2420 unsigned prev_free_sectors;2420 unsigned prev_free_sectors;
2421 2421
2422 /* the following test is not needed, but it tests the replay code */2422 /* the following test is not needed, but it tests the replay code */
2423 if (unlikely(dm_suspended(ic->ti)) && !ic->meta_dev)2423 if (unlikely(dm_post_suspending(ic->ti)) && !ic->meta_dev)
2424 return;2424 return;
2425 2425
2426 spin_lock_irq(&ic->endio_wait.lock);2426 spin_lock_irq(&ic->endio_wait.lock);
@@ -2481,7 +2481,7 @@ static void integrity_recalc(struct work_struct *w) · 54 unmodified lines
2481 2481
2482next_chunk:2482next_chunk:
2483 2483
2484 if (unlikely(dm_suspended(ic->ti)))2484 if (unlikely(dm_post_suspending(ic->ti)))
2485 goto unlock_ret;2485 goto unlock_ret;
2486 2486
2487 range.logical_sector = le64_to_cpu(ic->sb->recalc_sector);2487 range.logical_sector = le64_to_cpu(ic->sb->recalc_sector);
drivers/md/dm-rq.c+0−4
@@ -146,10 +146,6 @@ static void rq_end_stats(struct mapped_device *md, struct request *orig) · 145 unmodified lines
146 */146 */
147static void rq_completed(struct mapped_device *md)147static void rq_completed(struct mapped_device *md)
148{148{
149 /* nudge anyone waiting on suspend queue */
150 if (unlikely(wq_has_sleeper(&md->wait)))
151 wake_up(&md->wait);
152
153 /*149 /*
154 * dm_put() must be at the end of this function. See the comment above150 * dm_put() must be at the end of this function. See the comment above
155 */151 */
drivers/md/dm-writecache.c+6−0
@@ -2266,6 +2266,12 @@ invalid_optional: · 2265 unmodified lines
2266 }2266 }
2267 2267
2268 if (WC_MODE_PMEM(wc)) {2268 if (WC_MODE_PMEM(wc)) {
2269 if (!dax_synchronous(wc->ssd_dev->dax_dev)) {
2270 r = -EOPNOTSUPP;
2271 ti->error = "Asynchronous persistent memory not supported as pmem cache";
2272 goto bad;
2273 }
2274
2269 r = persistent_memory_claim(wc);2275 r = persistent_memory_claim(wc);
2270 if (r) {2276 if (r) {
2271 ti->error = "Unable to map persistent memory for cache";2277 ti->error = "Unable to map persistent memory for cache";
drivers/md/dm-zoned-metadata.c+8−1
@@ -2217,8 +2217,15 @@ struct dm_zone *dmz_alloc_zone(struct dmz_metadata *zmd, unsigned int dev_idx, · 2216 unmodified lines
2217{2217{
2218 struct list_head *list;2218 struct list_head *list;
2219 struct dm_zone *zone;2219 struct dm_zone *zone;
2220 int i = 0;2220 int i;
2221
2222 /* Schedule reclaim to ensure free zones are available */
2223 if (!(flags & DMZ_ALLOC_RECLAIM)) {
2224 for (i = 0; i < zmd->nr_devs; i++)
2225 dmz_schedule_reclaim(zmd->dev[i].reclaim);
2226 }
2221 2227
2228 i = 0;
2222again:2229again:
2223 if (flags & DMZ_ALLOC_CACHE)2230 if (flags & DMZ_ALLOC_CACHE)
2224 list = &zmd->unmap_cache_list;2231 list = &zmd->unmap_cache_list;
drivers/md/dm-zoned-reclaim.c+3−4
@@ -456,6 +456,8 @@ static unsigned int dmz_reclaim_percentage(struct dmz_reclaim *zrc) · 455 unmodified lines
456 nr_zones = dmz_nr_rnd_zones(zmd, zrc->dev_idx);456 nr_zones = dmz_nr_rnd_zones(zmd, zrc->dev_idx);
457 nr_unmap = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx);457 nr_unmap = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx);
458 }458 }
459 if (nr_unmap <= 1)
460 return 0;
459 return nr_unmap * 100 / nr_zones;461 return nr_unmap * 100 / nr_zones;
460}462}
461 463
@@ -501,7 +503,7 @@ static void dmz_reclaim_work(struct work_struct *work) · 39 unmodified lines
501{503{
502 struct dmz_reclaim *zrc = container_of(work, struct dmz_reclaim, work.work);504 struct dmz_reclaim *zrc = container_of(work, struct dmz_reclaim, work.work);
503 struct dmz_metadata *zmd = zrc->metadata;505 struct dmz_metadata *zmd = zrc->metadata;
504 unsigned int p_unmap, nr_unmap_rnd = 0, nr_rnd = 0;506 unsigned int p_unmap;
505 int ret;507 int ret;
506 508
507 if (dmz_dev_is_dying(zmd))509 if (dmz_dev_is_dying(zmd))
@@ -527,9 +529,6 @@ static void dmz_reclaim_work(struct work_struct *work) · 19 unmodified lines
527 zrc->kc_throttle.throttle = min(75U, 100U - p_unmap / 2);529 zrc->kc_throttle.throttle = min(75U, 100U - p_unmap / 2);
528 }530 }
529 531
530 nr_unmap_rnd = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx);
531 nr_rnd = dmz_nr_rnd_zones(zmd, zrc->dev_idx);
532
533 DMDEBUG("(%s/%u): Reclaim (%u): %s, %u%% free zones (%u/%u cache %u/%u random)",532 DMDEBUG("(%s/%u): Reclaim (%u): %s, %u%% free zones (%u/%u cache %u/%u random)",
534 dmz_metadata_label(zmd), zrc->dev_idx,533 dmz_metadata_label(zmd), zrc->dev_idx,
535 zrc->kc_throttle.throttle,534 zrc->kc_throttle.throttle,
drivers/md/dm-zoned-target.c+1−9
@@ -400,15 +400,7 @@ static void dmz_handle_bio(struct dmz_target *dmz, struct dm_chunk_work *cw, · 399 unmodified lines
400 dm_per_bio_data(bio, sizeof(struct dmz_bioctx));400 dm_per_bio_data(bio, sizeof(struct dmz_bioctx));
401 struct dmz_metadata *zmd = dmz->metadata;401 struct dmz_metadata *zmd = dmz->metadata;
402 struct dm_zone *zone;402 struct dm_zone *zone;
403 int i, ret;403 int ret;
404
405 /*
406 * Write may trigger a zone allocation. So make sure the
407 * allocation can succeed.
408 */
409 if (bio_op(bio) == REQ_OP_WRITE)
410 for (i = 0; i < dmz->nr_ddevs; i++)
411 dmz_schedule_reclaim(dmz->dev[i].reclaim);
412 404
413 dmz_lock_metadata(zmd);405 dmz_lock_metadata(zmd);
414 406
drivers/md/dm.c+70−31
@@ -12,6 +12,7 @@ · 11 unmodified lines
12#include <linux/init.h>12#include <linux/init.h>
13#include <linux/module.h>13#include <linux/module.h>
14#include <linux/mutex.h>14#include <linux/mutex.h>
15#include <linux/sched/mm.h>
15#include <linux/sched/signal.h>16#include <linux/sched/signal.h>
16#include <linux/blkpg.h>17#include <linux/blkpg.h>
17#include <linux/bio.h>18#include <linux/bio.h>
@@ -142,6 +143,7 @@ EXPORT_SYMBOL_GPL(dm_bio_get_target_bio_nr); · 124 unmodified lines
142#define DMF_NOFLUSH_SUSPENDING 5143#define DMF_NOFLUSH_SUSPENDING 5
143#define DMF_DEFERRED_REMOVE 6144#define DMF_DEFERRED_REMOVE 6
144#define DMF_SUSPENDED_INTERNALLY 7145#define DMF_SUSPENDED_INTERNALLY 7
146#define DMF_POST_SUSPENDING 8
145 147
146#define DM_NUMA_NODE NUMA_NO_NODE148#define DM_NUMA_NODE NUMA_NO_NODE
147static int dm_numa_node = DM_NUMA_NODE;149static int dm_numa_node = DM_NUMA_NODE;
@@ -654,28 +656,6 @@ static void free_tio(struct dm_target_io *tio) · 506 unmodified lines
654 bio_put(&tio->clone);656 bio_put(&tio->clone);
655}657}
656 658
657static bool md_in_flight_bios(struct mapped_device *md)
658{
659 int cpu;
660 struct hd_struct *part = &dm_disk(md)->part0;
661 long sum = 0;
662
663 for_each_possible_cpu(cpu) {
664 sum += part_stat_local_read_cpu(part, in_flight[0], cpu);
665 sum += part_stat_local_read_cpu(part, in_flight[1], cpu);
666 }
667
668 return sum != 0;
669}
670
671static bool md_in_flight(struct mapped_device *md)
672{
673 if (queue_is_mq(md->queue))
674 return blk_mq_queue_inflight(md->queue);
675 else
676 return md_in_flight_bios(md);
677}
678
679u64 dm_start_time_ns_from_clone(struct bio *bio)659u64 dm_start_time_ns_from_clone(struct bio *bio)
680{660{
681 struct dm_target_io *tio = container_of(bio, struct dm_target_io, clone);661 struct dm_target_io *tio = container_of(bio, struct dm_target_io, clone);
@@ -1465,9 +1445,6 @@ static int __send_empty_flush(struct clone_info *ci) · 783 unmodified lines
1465 BUG_ON(bio_has_data(ci->bio));1445 BUG_ON(bio_has_data(ci->bio));
1466 while ((ti = dm_table_get_target(ci->map, target_nr++)))1446 while ((ti = dm_table_get_target(ci->map, target_nr++)))
1467 __send_duplicate_bios(ci, ti, ti->num_flush_bios, NULL);1447 __send_duplicate_bios(ci, ti, ti->num_flush_bios, NULL);
1468
1469 bio_disassociate_blkg(ci->bio);
1470
1471 return 0;1448 return 0;
1472}1449}
1473 1450
@@ -1655,6 +1632,7 @@ static blk_qc_t __split_and_process_bio(struct mapped_device *md, · 181 unmodified lines
1655 ci.bio = &flush_bio;1632 ci.bio = &flush_bio;
1656 ci.sector_count = 0;1633 ci.sector_count = 0;
1657 error = __send_empty_flush(&ci);1634 error = __send_empty_flush(&ci);
1635 bio_uninit(ci.bio);
1658 /* dec_pending submits any data associated with flush */1636 /* dec_pending submits any data associated with flush */
1659 } else if (op_is_zone_mgmt(bio_op(bio))) {1637 } else if (op_is_zone_mgmt(bio_op(bio))) {
1660 ci.bio = bio;1638 ci.bio = bio;
@@ -1729,6 +1707,7 @@ static blk_qc_t __process_bio(struct mapped_device *md, struct dm_table *map, · 68 unmodified lines
1729 ci.bio = &flush_bio;1707 ci.bio = &flush_bio;
1730 ci.sector_count = 0;1708 ci.sector_count = 0;
1731 error = __send_empty_flush(&ci);1709 error = __send_empty_flush(&ci);
1710 bio_uninit(ci.bio);
1732 /* dec_pending submits any data associated with flush */1711 /* dec_pending submits any data associated with flush */
1733 } else {1712 } else {
1734 struct dm_target_io *tio;1713 struct dm_target_io *tio;
@@ -2430,6 +2409,7 @@ static void __dm_destroy(struct mapped_device *md, bool wait) · 695 unmodified lines
2430 if (!dm_suspended_md(md)) {2409 if (!dm_suspended_md(md)) {
2431 dm_table_presuspend_targets(map);2410 dm_table_presuspend_targets(map);
2432 set_bit(DMF_SUSPENDED, &md->flags);2411 set_bit(DMF_SUSPENDED, &md->flags);
2412 set_bit(DMF_POST_SUSPENDING, &md->flags);
2433 dm_table_postsuspend_targets(map);2413 dm_table_postsuspend_targets(map);
2434 }2414 }
2435 /* dm_put_live_table must be before msleep, otherwise deadlock is possible */2415 /* dm_put_live_table must be before msleep, otherwise deadlock is possible */
@@ -2470,15 +2450,29 @@ void dm_put(struct mapped_device *md) · 34 unmodified lines
2470}2450}
2471EXPORT_SYMBOL_GPL(dm_put);2451EXPORT_SYMBOL_GPL(dm_put);
2472 2452
2473static int dm_wait_for_completion(struct mapped_device *md, long task_state)2453static bool md_in_flight_bios(struct mapped_device *md)
2454{
2455 int cpu;
2456 struct hd_struct *part = &dm_disk(md)->part0;
2457 long sum = 0;
2458
2459 for_each_possible_cpu(cpu) {
2460 sum += part_stat_local_read_cpu(part, in_flight[0], cpu);
2461 sum += part_stat_local_read_cpu(part, in_flight[1], cpu);
2462 }
2463
2464 return sum != 0;
2465}
2466
2467static int dm_wait_for_bios_completion(struct mapped_device *md, long task_state)
2474{2468{
2475 int r = 0;2469 int r = 0;
2476 DEFINE_WAIT(wait);2470 DEFINE_WAIT(wait);
2477 2471
2478 while (1) {2472 while (true) {
2479 prepare_to_wait(&md->wait, &wait, task_state);2473 prepare_to_wait(&md->wait, &wait, task_state);
2480 2474
2481 if (!md_in_flight(md))2475 if (!md_in_flight_bios(md))
2482 break;2476 break;
2483 2477
2484 if (signal_pending_state(task_state, current)) {2478 if (signal_pending_state(task_state, current)) {
@@ -2493,6 +2487,28 @@ static int dm_wait_for_completion(struct mapped_device *md, long task_state) · 8 unmodified lines
2493 return r;2487 return r;
2494}2488}
2495 2489
2490static int dm_wait_for_completion(struct mapped_device *md, long task_state)
2491{
2492 int r = 0;
2493
2494 if (!queue_is_mq(md->queue))
2495 return dm_wait_for_bios_completion(md, task_state);
2496
2497 while (true) {
2498 if (!blk_mq_queue_inflight(md->queue))
2499 break;
2500
2501 if (signal_pending_state(task_state, current)) {
2502 r = -EINTR;
2503 break;
2504 }
2505
2506 msleep(5);
2507 }
2508
2509 return r;
2510}
2511
2496/*2512/*
2497 * Process the deferred bios2513 * Process the deferred bios
2498 */2514 */
@@ -2752,7 +2768,9 @@ retry: · 253 unmodified lines
2752 if (r)2768 if (r)
2753 goto out_unlock;2769 goto out_unlock;
2754 2770
2771 set_bit(DMF_POST_SUSPENDING, &md->flags);
2755 dm_table_postsuspend_targets(map);2772 dm_table_postsuspend_targets(map);
2773 clear_bit(DMF_POST_SUSPENDING, &md->flags);
2756 2774
2757out_unlock:2775out_unlock:
2758 mutex_unlock(&md->suspend_lock);2776 mutex_unlock(&md->suspend_lock);
@@ -2849,7 +2867,9 @@ static void __dm_internal_suspend(struct mapped_device *md, unsigned suspend_fla · 90 unmodified lines
2849 (void) __dm_suspend(md, map, suspend_flags, TASK_UNINTERRUPTIBLE,2867 (void) __dm_suspend(md, map, suspend_flags, TASK_UNINTERRUPTIBLE,
2850 DMF_SUSPENDED_INTERNALLY);2868 DMF_SUSPENDED_INTERNALLY);
2851 2869
2870 set_bit(DMF_POST_SUSPENDING, &md->flags);
2852 dm_table_postsuspend_targets(map);2871 dm_table_postsuspend_targets(map);
2872 clear_bit(DMF_POST_SUSPENDING, &md->flags);
2853}2873}
2854 2874
2855static void __dm_internal_resume(struct mapped_device *md)2875static void __dm_internal_resume(struct mapped_device *md)
@@ -2926,17 +2946,25 @@ EXPORT_SYMBOL_GPL(dm_internal_resume_fast); · 70 unmodified lines
2926int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action,2946int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action,
2927 unsigned cookie)2947 unsigned cookie)
2928{2948{
2949 int r;
2950 unsigned noio_flag;
2929 char udev_cookie[DM_COOKIE_LENGTH];2951 char udev_cookie[DM_COOKIE_LENGTH];
2930 char *envp[] = { udev_cookie, NULL };2952 char *envp[] = { udev_cookie, NULL };
2931 2953
2954 noio_flag = memalloc_noio_save();
2955
2932 if (!cookie)2956 if (!cookie)
2933 return kobject_uevent(&disk_to_dev(md->disk)->kobj, action);2957 r = kobject_uevent(&disk_to_dev(md->disk)->kobj, action);
2934 else {2958 else {
2935 snprintf(udev_cookie, DM_COOKIE_LENGTH, "%s=%u",2959 snprintf(udev_cookie, DM_COOKIE_LENGTH, "%s=%u",
2936 DM_COOKIE_ENV_VAR_NAME, cookie);2960 DM_COOKIE_ENV_VAR_NAME, cookie);
2937 return kobject_uevent_env(&disk_to_dev(md->disk)->kobj,2961 r = kobject_uevent_env(&disk_to_dev(md->disk)->kobj,
2938 action, envp);2962 action, envp);
2939 }2963 }
2964
2965 memalloc_noio_restore(noio_flag);
2966
2967 return r;
2940}2968}
2941 2969
2942uint32_t dm_next_uevent_seq(struct mapped_device *md)2970uint32_t dm_next_uevent_seq(struct mapped_device *md)
@@ -3002,6 +3030,11 @@ int dm_suspended_md(struct mapped_device *md) · 59 unmodified lines
3002 return test_bit(DMF_SUSPENDED, &md->flags);3030 return test_bit(DMF_SUSPENDED, &md->flags);
3003}3031}
3004 3032
3033static int dm_post_suspending_md(struct mapped_device *md)
3034{
3035 return test_bit(DMF_POST_SUSPENDING, &md->flags);
3036}
3037
3005int dm_suspended_internally_md(struct mapped_device *md)3038int dm_suspended_internally_md(struct mapped_device *md)
3006{3039{
3007 return test_bit(DMF_SUSPENDED_INTERNALLY, &md->flags);3040 return test_bit(DMF_SUSPENDED_INTERNALLY, &md->flags);
@@ -3018,6 +3051,12 @@ int dm_suspended(struct dm_target *ti) · 10 unmodified lines
3018}3051}
3019EXPORT_SYMBOL_GPL(dm_suspended);3052EXPORT_SYMBOL_GPL(dm_suspended);
3020 3053
3054int dm_post_suspending(struct dm_target *ti)
3055{
3056 return dm_post_suspending_md(dm_table_get_md(ti->table));
3057}
3058EXPORT_SYMBOL_GPL(dm_post_suspending);
3059
3021int dm_noflush_suspending(struct dm_target *ti)3060int dm_noflush_suspending(struct dm_target *ti)
3022{3061{
3023 return __noflush_suspending(dm_table_get_md(ti->table));3062 return __noflush_suspending(dm_table_get_md(ti->table));
drivers/mfd/ioc3.c+3−2
@@ -142,10 +142,11 @@ static int ioc3_irq_domain_setup(struct ioc3_priv_data *ipd, int irq) · 141 unmodified lines
142 goto err;142 goto err;
143 143
144 domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd);144 domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd);
145 if (!domain)145 if (!domain) {
146 irq_domain_free_fwnode(fn);
146 goto err;147 goto err;
148 }
147 149
148 irq_domain_free_fwnode(fn);
149 ipd->domain = domain;150 ipd->domain = domain;
150 151
151 irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain);152 irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain);
drivers/misc/atmel-ssc.c+12−12
@@ -10,7 +10,7 @@ · 9 unmodified lines
10#include <linux/clk.h>10#include <linux/clk.h>
11#include <linux/err.h>11#include <linux/err.h>
12#include <linux/io.h>12#include <linux/io.h>
13#include <linux/spinlock.h>13#include <linux/mutex.h>
14#include <linux/atmel-ssc.h>14#include <linux/atmel-ssc.h>
15#include <linux/slab.h>15#include <linux/slab.h>
16#include <linux/module.h>16#include <linux/module.h>
@@ -20,7 +20,7 @@ · 3 unmodified lines
20#include "../../sound/soc/atmel/atmel_ssc_dai.h"20#include "../../sound/soc/atmel/atmel_ssc_dai.h"
21 21
22/* Serialize access to ssc_list and user count */22/* Serialize access to ssc_list and user count */
23static DEFINE_SPINLOCK(user_lock);23static DEFINE_MUTEX(user_lock);
24static LIST_HEAD(ssc_list);24static LIST_HEAD(ssc_list);
25 25
26struct ssc_device *ssc_request(unsigned int ssc_num)26struct ssc_device *ssc_request(unsigned int ssc_num)
@@ -28,7 +28,7 @@ struct ssc_device *ssc_request(unsigned int ssc_num) · 1 unmodified line
28 int ssc_valid = 0;28 int ssc_valid = 0;
29 struct ssc_device *ssc;29 struct ssc_device *ssc;
30 30
31 spin_lock(&user_lock);31 mutex_lock(&user_lock);
32 list_for_each_entry(ssc, &ssc_list, list) {32 list_for_each_entry(ssc, &ssc_list, list) {
33 if (ssc->pdev->dev.of_node) {33 if (ssc->pdev->dev.of_node) {
34 if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc")34 if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc")
@@ -44,18 +44,18 @@ struct ssc_device *ssc_request(unsigned int ssc_num) · 9 unmodified lines
44 }44 }
45 45
46 if (!ssc_valid) {46 if (!ssc_valid) {
47 spin_unlock(&user_lock);47 mutex_unlock(&user_lock);
48 pr_err("ssc: ssc%d platform device is missing\n", ssc_num);48 pr_err("ssc: ssc%d platform device is missing\n", ssc_num);
49 return ERR_PTR(-ENODEV);49 return ERR_PTR(-ENODEV);
50 }50 }
51 51
52 if (ssc->user) {52 if (ssc->user) {
53 spin_unlock(&user_lock);53 mutex_unlock(&user_lock);
54 dev_dbg(&ssc->pdev->dev, "module busy\n");54 dev_dbg(&ssc->pdev->dev, "module busy\n");
55 return ERR_PTR(-EBUSY);55 return ERR_PTR(-EBUSY);
56 }56 }
57 ssc->user++;57 ssc->user++;
58 spin_unlock(&user_lock);58 mutex_unlock(&user_lock);
59 59
60 clk_prepare(ssc->clk);60 clk_prepare(ssc->clk);
61 61
@@ -67,14 +67,14 @@ void ssc_free(struct ssc_device *ssc) · 5 unmodified lines
67{67{
68 bool disable_clk = true;68 bool disable_clk = true;
69 69
70 spin_lock(&user_lock);70 mutex_lock(&user_lock);
71 if (ssc->user)71 if (ssc->user)
72 ssc->user--;72 ssc->user--;
73 else {73 else {
74 disable_clk = false;74 disable_clk = false;
75 dev_dbg(&ssc->pdev->dev, "device already free\n");75 dev_dbg(&ssc->pdev->dev, "device already free\n");
76 }76 }
77 spin_unlock(&user_lock);77 mutex_unlock(&user_lock);
78 78
79 if (disable_clk)79 if (disable_clk)
80 clk_unprepare(ssc->clk);80 clk_unprepare(ssc->clk);
@@ -237,9 +237,9 @@ static int ssc_probe(struct platform_device *pdev) · 156 unmodified lines
237 return -ENXIO;237 return -ENXIO;
238 }238 }
239 239
240 spin_lock(&user_lock);240 mutex_lock(&user_lock);
241 list_add_tail(&ssc->list, &ssc_list);241 list_add_tail(&ssc->list, &ssc_list);
242 spin_unlock(&user_lock);242 mutex_unlock(&user_lock);
243 243
244 platform_set_drvdata(pdev, ssc);244 platform_set_drvdata(pdev, ssc);
245 245
@@ -258,9 +258,9 @@ static int ssc_remove(struct platform_device *pdev) · 12 unmodified lines
258 258
259 ssc_sound_dai_remove(ssc);259 ssc_sound_dai_remove(ssc);
260 260
261 spin_lock(&user_lock);261 mutex_lock(&user_lock);
262 list_del(&ssc->list);262 list_del(&ssc->list);
263 spin_unlock(&user_lock);263 mutex_unlock(&user_lock);
264 264
265 return 0;265 return 0;
266}266}
drivers/misc/habanalabs/command_submission.c+11−3
@@ -499,11 +499,19 @@ static int validate_queue_index(struct hl_device *hdev, · 498 unmodified lines
499 struct asic_fixed_properties *asic = &hdev->asic_prop;499 struct asic_fixed_properties *asic = &hdev->asic_prop;
500 struct hw_queue_properties *hw_queue_prop;500 struct hw_queue_properties *hw_queue_prop;
501 501
502 /* This must be checked here to prevent out-of-bounds access to
503 * hw_queues_props array
504 */
505 if (chunk->queue_index >= HL_MAX_QUEUES) {
506 dev_err(hdev->dev, "Queue index %d is invalid\n",
507 chunk->queue_index);
508 return -EINVAL;
509 }
510
502 hw_queue_prop = &asic->hw_queues_props[chunk->queue_index];511 hw_queue_prop = &asic->hw_queues_props[chunk->queue_index];
503 512
504 if ((chunk->queue_index >= HL_MAX_QUEUES) ||513 if (hw_queue_prop->type == QUEUE_TYPE_NA) {
505 (hw_queue_prop->type == QUEUE_TYPE_NA)) {514 dev_err(hdev->dev, "Queue index %d is not applicable\n",
506 dev_err(hdev->dev, "Queue index %d is invalid\n",
507 chunk->queue_index);515 chunk->queue_index);
508 return -EINVAL;516 return -EINVAL;
509 }517 }
drivers/misc/habanalabs/debugfs.c+8−15
@@ -36,7 +36,7 @@ static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 35 unmodified lines
36 pkt.i2c_reg = i2c_reg;36 pkt.i2c_reg = i2c_reg;
37 37
38 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),38 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
39 HL_DEVICE_TIMEOUT_USEC, (long *) val);39 0, (long *) val);
40 40
41 if (rc)41 if (rc)
42 dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);42 dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);
@@ -63,7 +63,7 @@ static int hl_debugfs_i2c_write(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 20 unmodified lines
63 pkt.value = cpu_to_le64(val);63 pkt.value = cpu_to_le64(val);
64 64
65 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),65 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
66 HL_DEVICE_TIMEOUT_USEC, NULL);66 0, NULL);
67 67
68 if (rc)68 if (rc)
69 dev_err(hdev->dev, "Failed to write to I2C, error %d\n", rc);69 dev_err(hdev->dev, "Failed to write to I2C, error %d\n", rc);
@@ -87,7 +87,7 @@ static void hl_debugfs_led_set(struct hl_device *hdev, u8 led, u8 state) · 17 unmodified lines
87 pkt.value = cpu_to_le64(state);87 pkt.value = cpu_to_le64(state);
88 88
89 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),89 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
90 HL_DEVICE_TIMEOUT_USEC, NULL);90 0, NULL);
91 91
92 if (rc)92 if (rc)
93 dev_err(hdev->dev, "Failed to set LED %d, error %d\n", led, rc);93 dev_err(hdev->dev, "Failed to set LED %d, error %d\n", led, rc);
@@ -981,7 +981,7 @@ static ssize_t hl_clk_gate_read(struct file *f, char __user *buf, · 887 unmodified lines
981 if (*ppos)981 if (*ppos)
982 return 0;982 return 0;
983 983
984 sprintf(tmp_buf, "%d\n", hdev->clock_gating);984 sprintf(tmp_buf, "0x%llx\n", hdev->clock_gating_mask);
985 rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,985 rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
986 strlen(tmp_buf) + 1);986 strlen(tmp_buf) + 1);
987 987
@@ -993,7 +993,7 @@ static ssize_t hl_clk_gate_write(struct file *f, const char __user *buf, · 5 unmodified lines
993{993{
994 struct hl_dbg_device_entry *entry = file_inode(f)->i_private;994 struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
995 struct hl_device *hdev = entry->hdev;995 struct hl_device *hdev = entry->hdev;
996 u32 value;996 u64 value;
997 ssize_t rc;997 ssize_t rc;
998 998
999 if (atomic_read(&hdev->in_reset)) {999 if (atomic_read(&hdev->in_reset)) {
@@ -1002,19 +1002,12 @@ static ssize_t hl_clk_gate_write(struct file *f, const char __user *buf, · 2 unmodified lines
1002 return 0;1002 return 0;
1003 }1003 }
1004 1004
1005 rc = kstrtouint_from_user(buf, count, 10, &value);1005 rc = kstrtoull_from_user(buf, count, 16, &value);
1006 if (rc)1006 if (rc)
1007 return rc;1007 return rc;
1008 1008
1009 if (value) {1009 hdev->clock_gating_mask = value;
1010 hdev->clock_gating = 1;1010 hdev->asic_funcs->set_clock_gating(hdev);
1011 if (hdev->asic_funcs->enable_clock_gating)
1012 hdev->asic_funcs->enable_clock_gating(hdev);
1013 } else {
1014 if (hdev->asic_funcs->disable_clock_gating)
1015 hdev->asic_funcs->disable_clock_gating(hdev);
1016 hdev->clock_gating = 0;
1017 }
1018 1011
1019 return count;1012 return count;
1020}1013}
drivers/misc/habanalabs/device.c+1−1
@@ -608,7 +608,7 @@ int hl_device_set_debug_mode(struct hl_device *hdev, bool enable) · 607 unmodified lines
608 hdev->in_debug = 0;608 hdev->in_debug = 0;
609 609
610 if (!hdev->hard_reset_pending)610 if (!hdev->hard_reset_pending)
611 hdev->asic_funcs->enable_clock_gating(hdev);611 hdev->asic_funcs->set_clock_gating(hdev);
612 612
613 goto out;613 goto out;
614 }614 }
drivers/misc/habanalabs/firmware_if.c+5−5
@@ -61,7 +61,7 @@ int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode) · 60 unmodified lines
61 pkt.ctl = cpu_to_le32(opcode << ARMCP_PKT_CTL_OPCODE_SHIFT);61 pkt.ctl = cpu_to_le32(opcode << ARMCP_PKT_CTL_OPCODE_SHIFT);
62 62
63 return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,63 return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,
64 sizeof(pkt), HL_DEVICE_TIMEOUT_USEC, NULL);64 sizeof(pkt), 0, NULL);
65}65}
66 66
67int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,67int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
@@ -144,7 +144,7 @@ int hl_fw_unmask_irq(struct hl_device *hdev, u16 event_type) · 76 unmodified lines
144 pkt.value = cpu_to_le64(event_type);144 pkt.value = cpu_to_le64(event_type);
145 145
146 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),146 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
147 HL_DEVICE_TIMEOUT_USEC, &result);147 0, &result);
148 148
149 if (rc)149 if (rc)
150 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);150 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
@@ -183,7 +183,7 @@ int hl_fw_unmask_irq_arr(struct hl_device *hdev, const u32 *irq_arr, · 32 unmodified lines
183 ARMCP_PKT_CTL_OPCODE_SHIFT);183 ARMCP_PKT_CTL_OPCODE_SHIFT);
184 184
185 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,185 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
186 total_pkt_size, HL_DEVICE_TIMEOUT_USEC, &result);186 total_pkt_size, 0, &result);
187 187
188 if (rc)188 if (rc)
189 dev_err(hdev->dev, "failed to unmask IRQ array\n");189 dev_err(hdev->dev, "failed to unmask IRQ array\n");
@@ -204,7 +204,7 @@ int hl_fw_test_cpu_queue(struct hl_device *hdev) · 14 unmodified lines
204 test_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);204 test_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
205 205
206 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,206 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,
207 sizeof(test_pkt), HL_DEVICE_TIMEOUT_USEC, &result);207 sizeof(test_pkt), 0, &result);
208 208
209 if (!rc) {209 if (!rc) {
210 if (result != ARMCP_PACKET_FENCE_VAL)210 if (result != ARMCP_PACKET_FENCE_VAL)
@@ -248,7 +248,7 @@ int hl_fw_send_heartbeat(struct hl_device *hdev) · 37 unmodified lines
248 hb_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);248 hb_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
249 249
250 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,250 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,
251 sizeof(hb_pkt), HL_DEVICE_TIMEOUT_USEC, &result);251 sizeof(hb_pkt), 0, &result);
252 252
253 if ((rc) || (result != ARMCP_PACKET_FENCE_VAL))253 if ((rc) || (result != ARMCP_PACKET_FENCE_VAL))
254 rc = -EIO;254 rc = -EIO;
drivers/misc/habanalabs/gaudi/gaudi.c+84−39
@@ -80,6 +80,7 @@ · 79 unmodified lines
80#define GAUDI_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)80#define GAUDI_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
81#define GAUDI_PLDM_TPC_KERNEL_WAIT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)81#define GAUDI_PLDM_TPC_KERNEL_WAIT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
82#define GAUDI_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */82#define GAUDI_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */
83#define GAUDI_MSG_TO_CPU_TIMEOUT_USEC 4000000 /* 4s */
83 84
84#define GAUDI_QMAN0_FENCE_VAL 0x72E91AB985#define GAUDI_QMAN0_FENCE_VAL 0x72E91AB9
85 86
@@ -98,6 +99,11 @@ · 12 unmodified lines
98 99
99#define GAUDI_ARB_WDT_TIMEOUT 0x1000000100#define GAUDI_ARB_WDT_TIMEOUT 0x1000000
100 101
102#define GAUDI_CLK_GATE_DEBUGFS_MASK (\
103 BIT(GAUDI_ENGINE_ID_MME_0) |\
104 BIT(GAUDI_ENGINE_ID_MME_2) |\
105 GENMASK_ULL(GAUDI_ENGINE_ID_TPC_7, GAUDI_ENGINE_ID_TPC_0))
106
101static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = {107static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = {
102 "gaudi cq 0_0", "gaudi cq 0_1", "gaudi cq 0_2", "gaudi cq 0_3",108 "gaudi cq 0_0", "gaudi cq 0_1", "gaudi cq 0_2", "gaudi cq 0_3",
103 "gaudi cq 1_0", "gaudi cq 1_1", "gaudi cq 1_2", "gaudi cq 1_3",109 "gaudi cq 1_0", "gaudi cq 1_1", "gaudi cq 1_2", "gaudi cq 1_3",
@@ -106,14 +112,14 @@ static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { · 2 unmodified lines
106};112};
107 113
108static const u8 gaudi_dma_assignment[GAUDI_DMA_MAX] = {114static const u8 gaudi_dma_assignment[GAUDI_DMA_MAX] = {
109 [GAUDI_PCI_DMA_1] = 0,115 [GAUDI_PCI_DMA_1] = GAUDI_ENGINE_ID_DMA_0,
110 [GAUDI_PCI_DMA_2] = 1,116 [GAUDI_PCI_DMA_2] = GAUDI_ENGINE_ID_DMA_1,
111 [GAUDI_PCI_DMA_3] = 5,117 [GAUDI_PCI_DMA_3] = GAUDI_ENGINE_ID_DMA_5,
112 [GAUDI_HBM_DMA_1] = 2,118 [GAUDI_HBM_DMA_1] = GAUDI_ENGINE_ID_DMA_2,
113 [GAUDI_HBM_DMA_2] = 3,119 [GAUDI_HBM_DMA_2] = GAUDI_ENGINE_ID_DMA_3,
114 [GAUDI_HBM_DMA_3] = 4,120 [GAUDI_HBM_DMA_3] = GAUDI_ENGINE_ID_DMA_4,
115 [GAUDI_HBM_DMA_4] = 6,121 [GAUDI_HBM_DMA_4] = GAUDI_ENGINE_ID_DMA_6,
116 [GAUDI_HBM_DMA_5] = 7122 [GAUDI_HBM_DMA_5] = GAUDI_ENGINE_ID_DMA_7
117};123};
118 124
119static const u8 gaudi_cq_assignment[NUMBER_OF_CMPLT_QUEUES] = {125static const u8 gaudi_cq_assignment[NUMBER_OF_CMPLT_QUEUES] = {
@@ -1819,7 +1825,7 @@ static void gaudi_init_golden_registers(struct hl_device *hdev) · 1699 unmodified lines
1819 1825
1820 gaudi_init_rate_limiter(hdev);1826 gaudi_init_rate_limiter(hdev);
1821 1827
1822 gaudi_disable_clock_gating(hdev);1828 hdev->asic_funcs->disable_clock_gating(hdev);
1823 1829
1824 for (tpc_id = 0, tpc_offset = 0;1830 for (tpc_id = 0, tpc_offset = 0;
1825 tpc_id < TPC_NUMBER_OF_ENGINES;1831 tpc_id < TPC_NUMBER_OF_ENGINES;
@@ -2531,46 +2537,55 @@ static void gaudi_tpc_stall(struct hl_device *hdev) · 705 unmodified lines
2531 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);2537 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);
2532}2538}
2533 2539
2534static void gaudi_enable_clock_gating(struct hl_device *hdev)2540static void gaudi_set_clock_gating(struct hl_device *hdev)
2535{2541{
2536 struct gaudi_device *gaudi = hdev->asic_specific;2542 struct gaudi_device *gaudi = hdev->asic_specific;
2537 u32 qman_offset;2543 u32 qman_offset;
2538 int i;2544 int i;
2539 2545
2540 if (!hdev->clock_gating)
2541 return;
2542
2543 if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE)
2544 return;
2545
2546 /* In case we are during debug session, don't enable the clock gate2546 /* In case we are during debug session, don't enable the clock gate
2547 * as it may interfere2547 * as it may interfere
2548 */2548 */
2549 if (hdev->in_debug)2549 if (hdev->in_debug)
2550 return;2550 return;
2551 2551
2552 for (i = 0, qman_offset = 0 ; i < PCI_DMA_NUMBER_OF_CHNLS ; i++) {2552 for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {
2553 if (!(hdev->clock_gating_mask &
2554 (BIT_ULL(gaudi_dma_assignment[i]))))
2555 continue;
2556
2553 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;2557 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2554 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);2558 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
2555 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,2559 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2556 QMAN_UPPER_CP_CGM_PWR_GATE_EN);2560 QMAN_UPPER_CP_CGM_PWR_GATE_EN);
2557 }2561 }
2558 2562
2559 for (; i < HBM_DMA_NUMBER_OF_CHNLS ; i++) {2563 for (i = GAUDI_HBM_DMA_1 ; i < GAUDI_DMA_MAX ; i++) {
2564 if (!(hdev->clock_gating_mask &
2565 (BIT_ULL(gaudi_dma_assignment[i]))))
2566 continue;
2567
2560 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;2568 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
2561 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);2569 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
2562 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,2570 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
2563 QMAN_COMMON_CP_CGM_PWR_GATE_EN);2571 QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2564 }2572 }
2565 2573
2566 WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);2574 if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0))) {
2567 WREG32(mmMME0_QM_CGM_CFG,2575 WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2568 QMAN_COMMON_CP_CGM_PWR_GATE_EN);2576 WREG32(mmMME0_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2569 WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);2577 }
2570 WREG32(mmMME2_QM_CGM_CFG,2578
2571 QMAN_COMMON_CP_CGM_PWR_GATE_EN);2579 if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2))) {
2580 WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2581 WREG32(mmMME2_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2582 }
2572 2583
2573 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {2584 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
2585 if (!(hdev->clock_gating_mask &
2586 (BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i))))
2587 continue;
2588
2574 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,2589 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,
2575 QMAN_CGM1_PWR_GATE_EN);2590 QMAN_CGM1_PWR_GATE_EN);
2576 WREG32(mmTPC0_QM_CGM_CFG + qman_offset,2591 WREG32(mmTPC0_QM_CGM_CFG + qman_offset,
@@ -2663,7 +2678,7 @@ static void gaudi_halt_engines(struct hl_device *hdev, bool hard_reset) · 86 unmodified lines
2663 gaudi_stop_hbm_dma_qmans(hdev);2678 gaudi_stop_hbm_dma_qmans(hdev);
2664 gaudi_stop_pci_dma_qmans(hdev);2679 gaudi_stop_pci_dma_qmans(hdev);
2665 2680
2666 gaudi_disable_clock_gating(hdev);2681 hdev->asic_funcs->disable_clock_gating(hdev);
2667 2682
2668 msleep(wait_timeout_ms);2683 msleep(wait_timeout_ms);
2669 2684
@@ -3003,7 +3018,7 @@ static int gaudi_hw_init(struct hl_device *hdev) · 333 unmodified lines
3003 3018
3004 gaudi_init_tpc_qmans(hdev);3019 gaudi_init_tpc_qmans(hdev);
3005 3020
3006 gaudi_enable_clock_gating(hdev);3021 hdev->asic_funcs->set_clock_gating(hdev);
3007 3022
3008 gaudi_enable_timestamp(hdev);3023 gaudi_enable_timestamp(hdev);
3009 3024
@@ -3112,7 +3127,9 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset) · 102 unmodified lines
3112 HW_CAP_HBM_DMA | HW_CAP_PLL |3127 HW_CAP_HBM_DMA | HW_CAP_PLL |
3113 HW_CAP_MMU |3128 HW_CAP_MMU |
3114 HW_CAP_SRAM_SCRAMBLER |3129 HW_CAP_SRAM_SCRAMBLER |
3115 HW_CAP_HBM_SCRAMBLER);3130 HW_CAP_HBM_SCRAMBLER |
3131 HW_CAP_CLK_GATE);
3132
3116 memset(gaudi->events_stat, 0, sizeof(gaudi->events_stat));3133 memset(gaudi->events_stat, 0, sizeof(gaudi->events_stat));
3117}3134}
3118 3135
@@ -3463,6 +3480,9 @@ static int gaudi_send_cpu_message(struct hl_device *hdev, u32 *msg, · 344 unmodified lines
3463 return 0;3480 return 0;
3464 }3481 }
3465 3482
3483 if (!timeout)
3484 timeout = GAUDI_MSG_TO_CPU_TIMEOUT_USEC;
3485
3466 return hl_fw_send_cpu_message(hdev, GAUDI_QUEUE_ID_CPU_PQ, msg, len,3486 return hl_fw_send_cpu_message(hdev, GAUDI_QUEUE_ID_CPU_PQ, msg, len,
3467 timeout, result);3487 timeout, result);
3468}3488}
@@ -3865,6 +3885,12 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 396 unmodified lines
3865 rc = -EPERM;3885 rc = -EPERM;
3866 break;3886 break;
3867 3887
3888 case PACKET_WREG_BULK:
3889 dev_err(hdev->dev,
3890 "User not allowed to use WREG_BULK\n");
3891 rc = -EPERM;
3892 break;
3893
3868 case PACKET_LOAD_AND_EXE:3894 case PACKET_LOAD_AND_EXE:
3869 rc = gaudi_validate_load_and_exe_pkt(hdev, parser,3895 rc = gaudi_validate_load_and_exe_pkt(hdev, parser,
3870 (struct packet_load_and_exe *) user_pkt);3896 (struct packet_load_and_exe *) user_pkt);
@@ -3880,7 +3906,6 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 9 unmodified lines
3880 break;3906 break;
3881 3907
3882 case PACKET_WREG_32:3908 case PACKET_WREG_32:
3883 case PACKET_WREG_BULK:
3884 case PACKET_MSG_LONG:3909 case PACKET_MSG_LONG:
3885 case PACKET_MSG_SHORT:3910 case PACKET_MSG_SHORT:
3886 case PACKET_REPEAT:3911 case PACKET_REPEAT:
@@ -4521,13 +4546,18 @@ static int gaudi_debugfs_read32(struct hl_device *hdev, u64 addr, u32 *val) · 634 unmodified lines
4521 int rc = 0;4546 int rc = 0;
4522 4547
4523 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {4548 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4524 if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {4549
4550 if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4551 (hdev->clock_gating_mask &
4552 GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4553
4525 dev_err_ratelimited(hdev->dev,4554 dev_err_ratelimited(hdev->dev,
4526 "Can't read register - clock gating is enabled!\n");4555 "Can't read register - clock gating is enabled!\n");
4527 rc = -EFAULT;4556 rc = -EFAULT;
4528 } else {4557 } else {
4529 *val = RREG32(addr - CFG_BASE);4558 *val = RREG32(addr - CFG_BASE);
4530 }4559 }
4560
4531 } else if ((addr >= SRAM_BASE_ADDR) &&4561 } else if ((addr >= SRAM_BASE_ADDR) &&
4532 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {4562 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {
4533 *val = readl(hdev->pcie_bar[SRAM_BAR_ID] +4563 *val = readl(hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4563,13 +4593,18 @@ static int gaudi_debugfs_write32(struct hl_device *hdev, u64 addr, u32 val) · 29 unmodified lines
4563 int rc = 0;4593 int rc = 0;
4564 4594
4565 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {4595 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4566 if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {4596
4597 if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4598 (hdev->clock_gating_mask &
4599 GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4600
4567 dev_err_ratelimited(hdev->dev,4601 dev_err_ratelimited(hdev->dev,
4568 "Can't write register - clock gating is enabled!\n");4602 "Can't write register - clock gating is enabled!\n");
4569 rc = -EFAULT;4603 rc = -EFAULT;
4570 } else {4604 } else {
4571 WREG32(addr - CFG_BASE, val);4605 WREG32(addr - CFG_BASE, val);
4572 }4606 }
4607
4573 } else if ((addr >= SRAM_BASE_ADDR) &&4608 } else if ((addr >= SRAM_BASE_ADDR) &&
4574 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {4609 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {
4575 writel(val, hdev->pcie_bar[SRAM_BAR_ID] +4610 writel(val, hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4605,7 +4640,11 @@ static int gaudi_debugfs_read64(struct hl_device *hdev, u64 addr, u64 *val) · 29 unmodified lines
4605 int rc = 0;4640 int rc = 0;
4606 4641
4607 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {4642 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4608 if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {4643
4644 if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4645 (hdev->clock_gating_mask &
4646 GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4647
4609 dev_err_ratelimited(hdev->dev,4648 dev_err_ratelimited(hdev->dev,
4610 "Can't read register - clock gating is enabled!\n");4649 "Can't read register - clock gating is enabled!\n");
4611 rc = -EFAULT;4650 rc = -EFAULT;
@@ -4615,6 +4654,7 @@ static int gaudi_debugfs_read64(struct hl_device *hdev, u64 addr, u64 *val) · 3 unmodified lines
4615 4654
4616 *val = (((u64) val_h) << 32) | val_l;4655 *val = (((u64) val_h) << 32) | val_l;
4617 }4656 }
4657
4618 } else if ((addr >= SRAM_BASE_ADDR) &&4658 } else if ((addr >= SRAM_BASE_ADDR) &&
4619 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {4659 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {
4620 *val = readq(hdev->pcie_bar[SRAM_BAR_ID] +4660 *val = readq(hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4651,7 +4691,11 @@ static int gaudi_debugfs_write64(struct hl_device *hdev, u64 addr, u64 val) · 30 unmodified lines
4651 int rc = 0;4691 int rc = 0;
4652 4692
4653 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {4693 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4654 if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {4694
4695 if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4696 (hdev->clock_gating_mask &
4697 GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4698
4655 dev_err_ratelimited(hdev->dev,4699 dev_err_ratelimited(hdev->dev,
4656 "Can't write register - clock gating is enabled!\n");4700 "Can't write register - clock gating is enabled!\n");
4657 rc = -EFAULT;4701 rc = -EFAULT;
@@ -4660,6 +4704,7 @@ static int gaudi_debugfs_write64(struct hl_device *hdev, u64 addr, u64 val) · 2 unmodified lines
4660 WREG32(addr + sizeof(u32) - CFG_BASE,4704 WREG32(addr + sizeof(u32) - CFG_BASE,
4661 upper_32_bits(val));4705 upper_32_bits(val));
4662 }4706 }
4707
4663 } else if ((addr >= SRAM_BASE_ADDR) &&4708 } else if ((addr >= SRAM_BASE_ADDR) &&
4664 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {4709 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {
4665 writeq(val, hdev->pcie_bar[SRAM_BAR_ID] +4710 writeq(val, hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4881,7 +4926,7 @@ static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid) · 215 unmodified lines
4881 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_ARUSER, asid);4926 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_ARUSER, asid);
4882 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_AWUSER, asid);4927 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_AWUSER, asid);
4883 4928
4884 hdev->asic_funcs->enable_clock_gating(hdev);4929 hdev->asic_funcs->set_clock_gating(hdev);
4885 4930
4886 mutex_unlock(&gaudi->clk_gate_mutex);4931 mutex_unlock(&gaudi->clk_gate_mutex);
4887}4932}
@@ -5262,7 +5307,7 @@ static void gaudi_print_ecc_info_generic(struct hl_device *hdev, · 374 unmodified lines
5262 }5307 }
5263 5308
5264 if (disable_clock_gating) {5309 if (disable_clock_gating) {
5265 hdev->asic_funcs->enable_clock_gating(hdev);5310 hdev->asic_funcs->set_clock_gating(hdev);
5266 mutex_unlock(&gaudi->clk_gate_mutex);5311 mutex_unlock(&gaudi->clk_gate_mutex);
5267 }5312 }
5268}5313}
@@ -5749,7 +5794,7 @@ static bool gaudi_tpc_read_interrupts(struct hl_device *hdev, u8 tpc_id, · 480 unmodified lines
5749 /* Clear interrupts */5794 /* Clear interrupts */
5750 WREG32(mmTPC0_CFG_TPC_INTR_CAUSE + tpc_offset, 0);5795 WREG32(mmTPC0_CFG_TPC_INTR_CAUSE + tpc_offset, 0);
5751 5796
5752 hdev->asic_funcs->enable_clock_gating(hdev);5797 hdev->asic_funcs->set_clock_gating(hdev);
5753 5798
5754 mutex_unlock(&gaudi->clk_gate_mutex);5799 mutex_unlock(&gaudi->clk_gate_mutex);
5755 5800
@@ -6265,7 +6310,7 @@ static bool gaudi_is_device_idle(struct hl_device *hdev, u32 *mask, · 509 unmodified lines
6265 if (s)6310 if (s)
6266 seq_puts(s, "\n");6311 seq_puts(s, "\n");
6267 6312
6268 hdev->asic_funcs->enable_clock_gating(hdev);6313 hdev->asic_funcs->set_clock_gating(hdev);
6269 6314
6270 mutex_unlock(&gaudi->clk_gate_mutex);6315 mutex_unlock(&gaudi->clk_gate_mutex);
6271 6316
@@ -6366,7 +6411,7 @@ static int gaudi_run_tpc_kernel(struct hl_device *hdev, u64 tpc_kernel, · 94 unmodified lines
6366 dev_err(hdev->dev,6411 dev_err(hdev->dev,
6367 "Timeout while waiting for TPC%d icache prefetch\n",6412 "Timeout while waiting for TPC%d icache prefetch\n",
6368 tpc_id);6413 tpc_id);
6369 hdev->asic_funcs->enable_clock_gating(hdev);6414 hdev->asic_funcs->set_clock_gating(hdev);
6370 mutex_unlock(&gaudi->clk_gate_mutex);6415 mutex_unlock(&gaudi->clk_gate_mutex);
6371 return -EIO;6416 return -EIO;
6372 }6417 }
@@ -6395,7 +6440,7 @@ static int gaudi_run_tpc_kernel(struct hl_device *hdev, u64 tpc_kernel, · 22 unmodified lines
6395 1000,6440 1000,
6396 kernel_timeout);6441 kernel_timeout);
6397 6442
6398 hdev->asic_funcs->enable_clock_gating(hdev);6443 hdev->asic_funcs->set_clock_gating(hdev);
6399 mutex_unlock(&gaudi->clk_gate_mutex);6444 mutex_unlock(&gaudi->clk_gate_mutex);
6400 6445
6401 if (rc) {6446 if (rc) {
@@ -6736,7 +6781,7 @@ static const struct hl_asic_funcs gaudi_funcs = { · 334 unmodified lines
6736 .mmu_invalidate_cache = gaudi_mmu_invalidate_cache,6781 .mmu_invalidate_cache = gaudi_mmu_invalidate_cache,
6737 .mmu_invalidate_cache_range = gaudi_mmu_invalidate_cache_range,6782 .mmu_invalidate_cache_range = gaudi_mmu_invalidate_cache_range,
6738 .send_heartbeat = gaudi_send_heartbeat,6783 .send_heartbeat = gaudi_send_heartbeat,
6739 .enable_clock_gating = gaudi_enable_clock_gating,6784 .set_clock_gating = gaudi_set_clock_gating,
6740 .disable_clock_gating = gaudi_disable_clock_gating,6785 .disable_clock_gating = gaudi_disable_clock_gating,
6741 .debug_coresight = gaudi_debug_coresight,6786 .debug_coresight = gaudi_debug_coresight,
6742 .is_device_idle = gaudi_is_device_idle,6787 .is_device_idle = gaudi_is_device_idle,
drivers/misc/habanalabs/goya/goya.c+12−8
@@ -88,6 +88,7 @@ · 87 unmodified lines
88#define GOYA_PLDM_MMU_TIMEOUT_USEC (MMU_CONFIG_TIMEOUT_USEC * 100)88#define GOYA_PLDM_MMU_TIMEOUT_USEC (MMU_CONFIG_TIMEOUT_USEC * 100)
89#define GOYA_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)89#define GOYA_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
90#define GOYA_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */90#define GOYA_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */
91#define GOYA_MSG_TO_CPU_TIMEOUT_USEC 4000000 /* 4s */
91 92
92#define GOYA_QMAN0_FENCE_VAL 0xD169B24393#define GOYA_QMAN0_FENCE_VAL 0xD169B243
93 94
@@ -2830,6 +2831,9 @@ int goya_send_cpu_message(struct hl_device *hdev, u32 *msg, u16 len, · 2736 unmodified lines
2830 return 0;2831 return 0;
2831 }2832 }
2832 2833
2834 if (!timeout)
2835 timeout = GOYA_MSG_TO_CPU_TIMEOUT_USEC;
2836
2833 return hl_fw_send_cpu_message(hdev, GOYA_QUEUE_ID_CPU_PQ, msg, len,2837 return hl_fw_send_cpu_message(hdev, GOYA_QUEUE_ID_CPU_PQ, msg, len,
2834 timeout, result);2838 timeout, result);
2835}2839}
@@ -4431,8 +4435,8 @@ static int goya_unmask_irq_arr(struct hl_device *hdev, u32 *irq_arr, · 1595 unmodified lines
4431 pkt->armcp_pkt.ctl = cpu_to_le32(ARMCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY <<4435 pkt->armcp_pkt.ctl = cpu_to_le32(ARMCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY <<
4432 ARMCP_PKT_CTL_OPCODE_SHIFT);4436 ARMCP_PKT_CTL_OPCODE_SHIFT);
4433 4437
4434 rc = goya_send_cpu_message(hdev, (u32 *) pkt, total_pkt_size,4438 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
4435 HL_DEVICE_TIMEOUT_USEC, &result);4439 total_pkt_size, 0, &result);
4436 4440
4437 if (rc)4441 if (rc)
4438 dev_err(hdev->dev, "failed to unmask IRQ array\n");4442 dev_err(hdev->dev, "failed to unmask IRQ array\n");
@@ -4464,8 +4468,8 @@ static int goya_unmask_irq(struct hl_device *hdev, u16 event_type) · 25 unmodified lines
4464 ARMCP_PKT_CTL_OPCODE_SHIFT);4468 ARMCP_PKT_CTL_OPCODE_SHIFT);
4465 pkt.value = cpu_to_le64(event_type);4469 pkt.value = cpu_to_le64(event_type);
4466 4470
4467 rc = goya_send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),4471 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
4468 HL_DEVICE_TIMEOUT_USEC, &result);4472 0, &result);
4469 4473
4470 if (rc)4474 if (rc)
4471 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);4475 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
@@ -5028,14 +5032,14 @@ int goya_armcp_info_get(struct hl_device *hdev) · 556 unmodified lines
5028 return 0;5032 return 0;
5029}5033}
5030 5034
5031static void goya_enable_clock_gating(struct hl_device *hdev)5035static void goya_set_clock_gating(struct hl_device *hdev)
5032{5036{
5033 5037 /* clock gating not supported in Goya */
5034}5038}
5035 5039
5036static void goya_disable_clock_gating(struct hl_device *hdev)5040static void goya_disable_clock_gating(struct hl_device *hdev)
5037{5041{
5038 5042 /* clock gating not supported in Goya */
5039}5043}
5040 5044
5041static bool goya_is_device_idle(struct hl_device *hdev, u32 *mask,5045static bool goya_is_device_idle(struct hl_device *hdev, u32 *mask,
@@ -5259,7 +5263,7 @@ static const struct hl_asic_funcs goya_funcs = { · 217 unmodified lines
5259 .mmu_invalidate_cache = goya_mmu_invalidate_cache,5263 .mmu_invalidate_cache = goya_mmu_invalidate_cache,
5260 .mmu_invalidate_cache_range = goya_mmu_invalidate_cache_range,5264 .mmu_invalidate_cache_range = goya_mmu_invalidate_cache_range,
5261 .send_heartbeat = goya_send_heartbeat,5265 .send_heartbeat = goya_send_heartbeat,
5262 .enable_clock_gating = goya_enable_clock_gating,5266 .set_clock_gating = goya_set_clock_gating,
5263 .disable_clock_gating = goya_disable_clock_gating,5267 .disable_clock_gating = goya_disable_clock_gating,
5264 .debug_coresight = goya_debug_coresight,5268 .debug_coresight = goya_debug_coresight,
5265 .is_device_idle = goya_is_device_idle,5269 .is_device_idle = goya_is_device_idle,
drivers/misc/habanalabs/habanalabs.h+13−6
@@ -578,8 +578,9 @@ enum hl_pll_frequency { · 577 unmodified lines
578 * @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with578 * @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with
579 * ASID-VA-size mask.579 * ASID-VA-size mask.
580 * @send_heartbeat: send is-alive packet to ArmCP and verify response.580 * @send_heartbeat: send is-alive packet to ArmCP and verify response.
581 * @enable_clock_gating: enable clock gating for reducing power consumption.581 * @set_clock_gating: enable/disable clock gating per engine according to
582 * @disable_clock_gating: disable clock for accessing registers on HBW.582 * clock gating mask in hdev
583 * @disable_clock_gating: disable clock gating completely
583 * @debug_coresight: perform certain actions on Coresight for debugging.584 * @debug_coresight: perform certain actions on Coresight for debugging.
584 * @is_device_idle: return true if device is idle, false otherwise.585 * @is_device_idle: return true if device is idle, false otherwise.
585 * @soft_reset_late_init: perform certain actions needed after soft reset.586 * @soft_reset_late_init: perform certain actions needed after soft reset.
@@ -587,7 +588,11 @@ enum hl_pll_frequency { · 1 unmodified line
587 * @hw_queues_unlock: release H/W queues lock.588 * @hw_queues_unlock: release H/W queues lock.
588 * @get_pci_id: retrieve PCI ID.589 * @get_pci_id: retrieve PCI ID.
589 * @get_eeprom_data: retrieve EEPROM data from F/W.590 * @get_eeprom_data: retrieve EEPROM data from F/W.
590 * @send_cpu_message: send buffer to ArmCP.591 * @send_cpu_message: send message to F/W. If the message is timedout, the
592 * driver will eventually reset the device. The timeout can
593 * be determined by the calling function or it can be 0 and
594 * then the timeout is the default timeout for the specific
595 * ASIC
591 * @get_hw_state: retrieve the H/W state596 * @get_hw_state: retrieve the H/W state
592 * @pci_bars_map: Map PCI BARs.597 * @pci_bars_map: Map PCI BARs.
593 * @set_dram_bar_base: Set DRAM BAR to map specific device address. Returns598 * @set_dram_bar_base: Set DRAM BAR to map specific device address. Returns
@@ -680,7 +685,7 @@ struct hl_asic_funcs { · 86 unmodified lines
680 int (*mmu_invalidate_cache_range)(struct hl_device *hdev, bool is_hard,685 int (*mmu_invalidate_cache_range)(struct hl_device *hdev, bool is_hard,
681 u32 asid, u64 va, u64 size);686 u32 asid, u64 va, u64 size);
682 int (*send_heartbeat)(struct hl_device *hdev);687 int (*send_heartbeat)(struct hl_device *hdev);
683 void (*enable_clock_gating)(struct hl_device *hdev);688 void (*set_clock_gating)(struct hl_device *hdev);
684 void (*disable_clock_gating)(struct hl_device *hdev);689 void (*disable_clock_gating)(struct hl_device *hdev);
685 int (*debug_coresight)(struct hl_device *hdev, void *data);690 int (*debug_coresight)(struct hl_device *hdev, void *data);
686 bool (*is_device_idle)(struct hl_device *hdev, u32 *mask,691 bool (*is_device_idle)(struct hl_device *hdev, u32 *mask,
@@ -1398,6 +1403,9 @@ struct hl_device_idle_busy_ts { · 711 unmodified lines
1398 * @max_power: the max power of the device, as configured by the sysadmin. This1403 * @max_power: the max power of the device, as configured by the sysadmin. This
1399 * value is saved so in case of hard-reset, the driver will restore1404 * value is saved so in case of hard-reset, the driver will restore
1400 * this value and update the F/W after the re-initialization1405 * this value and update the F/W after the re-initialization
1406 * @clock_gating_mask: is clock gating enabled. bitmask that represents the
1407 * different engines. See debugfs-driver-habanalabs for
1408 * details.
1401 * @in_reset: is device in reset flow.1409 * @in_reset: is device in reset flow.
1402 * @curr_pll_profile: current PLL profile.1410 * @curr_pll_profile: current PLL profile.
1403 * @cs_active_cnt: number of active command submissions on this device (active1411 * @cs_active_cnt: number of active command submissions on this device (active
@@ -1425,7 +1433,6 @@ struct hl_device_idle_busy_ts { · 21 unmodified lines
1425 * @init_done: is the initialization of the device done.1433 * @init_done: is the initialization of the device done.
1426 * @mmu_enable: is MMU enabled.1434 * @mmu_enable: is MMU enabled.
1427 * @mmu_huge_page_opt: is MMU huge pages optimization enabled.1435 * @mmu_huge_page_opt: is MMU huge pages optimization enabled.
1428 * @clock_gating: is clock gating enabled.
1429 * @device_cpu_disabled: is the device CPU disabled (due to timeouts)1436 * @device_cpu_disabled: is the device CPU disabled (due to timeouts)
1430 * @dma_mask: the dma mask that was set for this device1437 * @dma_mask: the dma mask that was set for this device
1431 * @in_debug: is device under debug. This, together with fpriv_list, enforces1438 * @in_debug: is device under debug. This, together with fpriv_list, enforces
@@ -1493,6 +1500,7 @@ struct hl_device { · 61 unmodified lines
1493 atomic64_t dram_used_mem;1500 atomic64_t dram_used_mem;
1494 u64 timeout_jiffies;1501 u64 timeout_jiffies;
1495 u64 max_power;1502 u64 max_power;
1503 u64 clock_gating_mask;
1496 atomic_t in_reset;1504 atomic_t in_reset;
1497 enum hl_pll_frequency curr_pll_profile;1505 enum hl_pll_frequency curr_pll_profile;
1498 int cs_active_cnt;1506 int cs_active_cnt;
@@ -1514,7 +1522,6 @@ struct hl_device { · 15 unmodified lines
1514 u8 dram_default_page_mapping;1522 u8 dram_default_page_mapping;
1515 u8 pmmu_huge_range;1523 u8 pmmu_huge_range;
1516 u8 init_done;1524 u8 init_done;
1517 u8 clock_gating;
1518 u8 device_cpu_disabled;1525 u8 device_cpu_disabled;
1519 u8 dma_mask;1526 u8 dma_mask;
1520 u8 in_debug;1527 u8 in_debug;
drivers/misc/habanalabs/habanalabs_drv.c+1−1
@@ -232,7 +232,7 @@ static void set_driver_behavior_per_device(struct hl_device *hdev) · 231 unmodified lines
232 hdev->fw_loading = 1;232 hdev->fw_loading = 1;
233 hdev->cpu_queues_enable = 1;233 hdev->cpu_queues_enable = 1;
234 hdev->heartbeat = 1;234 hdev->heartbeat = 1;
235 hdev->clock_gating = 1;235 hdev->clock_gating_mask = ULONG_MAX;
236 236
237 hdev->reset_pcilink = 0;237 hdev->reset_pcilink = 0;
238 hdev->axi_drain = 0;238 hdev->axi_drain = 0;
drivers/misc/habanalabs/hwmon.c+9−10
@@ -10,7 +10,6 @@ · 9 unmodified lines
10#include <linux/pci.h>10#include <linux/pci.h>
11#include <linux/hwmon.h>11#include <linux/hwmon.h>
12 12
13#define SENSORS_PKT_TIMEOUT 1000000 /* 1s */
14#define HWMON_NR_SENSOR_TYPES (hwmon_pwm + 1)13#define HWMON_NR_SENSOR_TYPES (hwmon_pwm + 1)
15 14
16int hl_build_hwmon_channel_info(struct hl_device *hdev,15int hl_build_hwmon_channel_info(struct hl_device *hdev,
@@ -323,7 +322,7 @@ int hl_get_temperature(struct hl_device *hdev, · 306 unmodified lines
323 pkt.type = __cpu_to_le16(attr);322 pkt.type = __cpu_to_le16(attr);
324 323
325 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),324 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
326 SENSORS_PKT_TIMEOUT, value);325 0, value);
327 326
328 if (rc) {327 if (rc) {
329 dev_err(hdev->dev,328 dev_err(hdev->dev,
@@ -350,7 +349,7 @@ int hl_set_temperature(struct hl_device *hdev, · 20 unmodified lines
350 pkt.value = __cpu_to_le64(value);349 pkt.value = __cpu_to_le64(value);
351 350
352 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),351 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
353 SENSORS_PKT_TIMEOUT, NULL);352 0, NULL);
354 353
355 if (rc)354 if (rc)
356 dev_err(hdev->dev,355 dev_err(hdev->dev,
@@ -374,7 +373,7 @@ int hl_get_voltage(struct hl_device *hdev, · 17 unmodified lines
374 pkt.type = __cpu_to_le16(attr);373 pkt.type = __cpu_to_le16(attr);
375 374
376 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),375 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
377 SENSORS_PKT_TIMEOUT, value);376 0, value);
378 377
379 if (rc) {378 if (rc) {
380 dev_err(hdev->dev,379 dev_err(hdev->dev,
@@ -400,7 +399,7 @@ int hl_get_current(struct hl_device *hdev, · 19 unmodified lines
400 pkt.type = __cpu_to_le16(attr);399 pkt.type = __cpu_to_le16(attr);
401 400
402 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),401 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
403 SENSORS_PKT_TIMEOUT, value);402 0, value);
404 403
405 if (rc) {404 if (rc) {
406 dev_err(hdev->dev,405 dev_err(hdev->dev,
@@ -426,7 +425,7 @@ int hl_get_fan_speed(struct hl_device *hdev, · 19 unmodified lines
426 pkt.type = __cpu_to_le16(attr);425 pkt.type = __cpu_to_le16(attr);
427 426
428 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),427 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
429 SENSORS_PKT_TIMEOUT, value);428 0, value);
430 429
431 if (rc) {430 if (rc) {
432 dev_err(hdev->dev,431 dev_err(hdev->dev,
@@ -452,7 +451,7 @@ int hl_get_pwm_info(struct hl_device *hdev, · 19 unmodified lines
452 pkt.type = __cpu_to_le16(attr);451 pkt.type = __cpu_to_le16(attr);
453 452
454 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),453 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
455 SENSORS_PKT_TIMEOUT, value);454 0, value);
456 455
457 if (rc) {456 if (rc) {
458 dev_err(hdev->dev,457 dev_err(hdev->dev,
@@ -479,7 +478,7 @@ void hl_set_pwm_info(struct hl_device *hdev, int sensor_index, u32 attr, · 20 unmodified lines
479 pkt.value = cpu_to_le64(value);478 pkt.value = cpu_to_le64(value);
480 479
481 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),480 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
482 SENSORS_PKT_TIMEOUT, NULL);481 0, NULL);
483 482
484 if (rc)483 if (rc)
485 dev_err(hdev->dev,484 dev_err(hdev->dev,
@@ -502,7 +501,7 @@ int hl_set_voltage(struct hl_device *hdev, · 16 unmodified lines
502 pkt.value = __cpu_to_le64(value);501 pkt.value = __cpu_to_le64(value);
503 502
504 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),503 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
505 SENSORS_PKT_TIMEOUT, NULL);504 0, NULL);
506 505
507 if (rc)506 if (rc)
508 dev_err(hdev->dev,507 dev_err(hdev->dev,
@@ -527,7 +526,7 @@ int hl_set_current(struct hl_device *hdev, · 18 unmodified lines
527 pkt.value = __cpu_to_le64(value);526 pkt.value = __cpu_to_le64(value);
528 527
529 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),528 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
530 SENSORS_PKT_TIMEOUT, NULL);529 0, NULL);
531 530
532 if (rc)531 if (rc)
533 dev_err(hdev->dev,532 dev_err(hdev->dev,
drivers/misc/habanalabs/sysfs.c+4−7
@@ -9,9 +9,6 @@ · 8 unmodified lines
9 9
10#include <linux/pci.h>10#include <linux/pci.h>
11 11
12#define SET_CLK_PKT_TIMEOUT 1000000 /* 1s */
13#define SET_PWR_PKT_TIMEOUT 1000000 /* 1s */
14
15long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr)12long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr)
16{13{
17 struct armcp_packet pkt;14 struct armcp_packet pkt;
@@ -29,7 +26,7 @@ long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr) · 11 unmodified lines
29 pkt.pll_index = cpu_to_le32(pll_index);26 pkt.pll_index = cpu_to_le32(pll_index);
30 27
31 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),28 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
32 SET_CLK_PKT_TIMEOUT, &result);29 0, &result);
33 30
34 if (rc) {31 if (rc) {
35 dev_err(hdev->dev,32 dev_err(hdev->dev,
@@ -54,7 +51,7 @@ void hl_set_frequency(struct hl_device *hdev, u32 pll_index, u64 freq) · 18 unmodified lines
54 pkt.value = cpu_to_le64(freq);51 pkt.value = cpu_to_le64(freq);
55 52
56 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),53 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
57 SET_CLK_PKT_TIMEOUT, NULL);54 0, NULL);
58 55
59 if (rc)56 if (rc)
60 dev_err(hdev->dev,57 dev_err(hdev->dev,
@@ -74,7 +71,7 @@ u64 hl_get_max_power(struct hl_device *hdev) · 13 unmodified lines
74 ARMCP_PKT_CTL_OPCODE_SHIFT);71 ARMCP_PKT_CTL_OPCODE_SHIFT);
75 72
76 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),73 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
77 SET_PWR_PKT_TIMEOUT, &result);74 0, &result);
78 75
79 if (rc) {76 if (rc) {
80 dev_err(hdev->dev, "Failed to get max power, error %d\n", rc);77 dev_err(hdev->dev, "Failed to get max power, error %d\n", rc);
@@ -96,7 +93,7 @@ void hl_set_max_power(struct hl_device *hdev, u64 value) · 15 unmodified lines
96 pkt.value = cpu_to_le64(value);93 pkt.value = cpu_to_le64(value);
97 94
98 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),95 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
99 SET_PWR_PKT_TIMEOUT, NULL);96 0, NULL);
100 97
101 if (rc)98 if (rc)
102 dev_err(hdev->dev, "Failed to set max power, error %d\n", rc);99 dev_err(hdev->dev, "Failed to set max power, error %d\n", rc);
drivers/misc/mei/bus.c+1−2
@@ -745,9 +745,8 @@ static int mei_cl_device_remove(struct device *dev) · 744 unmodified lines
745 745
746 mei_cl_bus_module_put(cldev);746 mei_cl_bus_module_put(cldev);
747 module_put(THIS_MODULE);747 module_put(THIS_MODULE);
748 dev->driver = NULL;
749 return ret;
750 748
749 return ret;
751}750}
752 751
753static ssize_t name_show(struct device *dev, struct device_attribute *a,752static ssize_t name_show(struct device *dev, struct device_attribute *a,
drivers/mmc/host/meson-gx-mmc.c+4−2
@@ -1146,9 +1146,11 @@ static int meson_mmc_probe(struct platform_device *pdev) · 1145 unmodified lines
1146 1146
1147 mmc->caps |= MMC_CAP_CMD23;1147 mmc->caps |= MMC_CAP_CMD23;
1148 if (host->dram_access_quirk) {1148 if (host->dram_access_quirk) {
1149 /* Limit segments to 1 due to low available sram memory */
1150 mmc->max_segs = 1;
1149 /* Limit to the available sram memory */1151 /* Limit to the available sram memory */
1150 mmc->max_segs = SD_EMMC_SRAM_DATA_BUF_LEN / mmc->max_blk_size;1152 mmc->max_blk_count = SD_EMMC_SRAM_DATA_BUF_LEN /
1151 mmc->max_blk_count = mmc->max_segs;1153 mmc->max_blk_size;
1152 } else {1154 } else {
1153 mmc->max_blk_count = CMD_CFG_LENGTH_MASK;1155 mmc->max_blk_count = CMD_CFG_LENGTH_MASK;
1154 mmc->max_segs = SD_EMMC_DESC_BUF_LEN /1156 mmc->max_segs = SD_EMMC_DESC_BUF_LEN /
drivers/mmc/host/owl-mmc.c+1−1
@@ -689,7 +689,7 @@ MODULE_DEVICE_TABLE(of, owl_mmc_of_match); · 688 unmodified lines
689static struct platform_driver owl_mmc_driver = {689static struct platform_driver owl_mmc_driver = {
690 .driver = {690 .driver = {
691 .name = "owl_mmc",691 .name = "owl_mmc",
692 .of_match_table = of_match_ptr(owl_mmc_of_match),692 .of_match_table = owl_mmc_of_match,
693 },693 },
694 .probe = owl_mmc_probe,694 .probe = owl_mmc_probe,
695 .remove = owl_mmc_remove,695 .remove = owl_mmc_remove,
drivers/mmc/host/sdhci-msm.c+3−2
@@ -618,8 +618,9 @@ static int msm_init_cm_dll(struct sdhci_host *host) · 617 unmodified lines
618 config &= ~CORE_CLK_PWRSAVE;618 config &= ~CORE_CLK_PWRSAVE;
619 writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec);619 writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec);
620 620
621 config = msm_host->dll_config;621 if (msm_host->dll_config)
622 writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config);622 writel_relaxed(msm_host->dll_config,
623 host->ioaddr + msm_offset->core_dll_config);
623 624
624 if (msm_host->use_14lpp_dll_reset) {625 if (msm_host->use_14lpp_dll_reset) {
625 config = readl_relaxed(host->ioaddr +626 config = readl_relaxed(host->ioaddr +
drivers/mmc/host/sdhci-of-aspeed.c+1−1
@@ -68,7 +68,7 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) · 67 unmodified lines
68 if (WARN_ON(clock > host->max_clk))68 if (WARN_ON(clock > host->max_clk))
69 clock = host->max_clk;69 clock = host->max_clk;
70 70
71 for (div = 1; div < 256; div *= 2) {71 for (div = 2; div < 256; div *= 2) {
72 if ((parent / div) <= clock)72 if ((parent / div) <= clock)
73 break;73 break;
74 }74 }
drivers/net/bareudp.c+22−7
@@ -407,19 +407,34 @@ free_dst: · 406 unmodified lines
407 return err;407 return err;
408}408}
409 409
410static bool bareudp_proto_valid(struct bareudp_dev *bareudp, __be16 proto)
411{
412 if (bareudp->ethertype == proto)
413 return true;
414
415 if (!bareudp->multi_proto_mode)
416 return false;
417
418 if (bareudp->ethertype == htons(ETH_P_MPLS_UC) &&
419 proto == htons(ETH_P_MPLS_MC))
420 return true;
421
422 if (bareudp->ethertype == htons(ETH_P_IP) &&
423 proto == htons(ETH_P_IPV6))
424 return true;
425
426 return false;
427}
428
410static netdev_tx_t bareudp_xmit(struct sk_buff *skb, struct net_device *dev)429static netdev_tx_t bareudp_xmit(struct sk_buff *skb, struct net_device *dev)
411{430{
412 struct bareudp_dev *bareudp = netdev_priv(dev);431 struct bareudp_dev *bareudp = netdev_priv(dev);
413 struct ip_tunnel_info *info = NULL;432 struct ip_tunnel_info *info = NULL;
414 int err;433 int err;
415 434
416 if (skb->protocol != bareudp->ethertype) {435 if (!bareudp_proto_valid(bareudp, skb->protocol)) {
417 if (!bareudp->multi_proto_mode ||436 err = -EINVAL;
418 (skb->protocol != htons(ETH_P_MPLS_MC) &&437 goto tx_error;
419 skb->protocol != htons(ETH_P_IPV6))) {
420 err = -EINVAL;
421 goto tx_error;
422 }
423 }438 }
424 439
425 info = skb_tunnel_info(skb);440 info = skb_tunnel_info(skb);
drivers/net/bonding/bond_main.c+7−3
@@ -5053,15 +5053,19 @@ int bond_create(struct net *net, const char *name) · 5052 unmodified lines
5053 bond_dev->rtnl_link_ops = &bond_link_ops;5053 bond_dev->rtnl_link_ops = &bond_link_ops;
5054 5054
5055 res = register_netdevice(bond_dev);5055 res = register_netdevice(bond_dev);
5056 if (res < 0) {
5057 free_netdev(bond_dev);
5058 rtnl_unlock();
5059
5060 return res;
5061 }
5056 5062
5057 netif_carrier_off(bond_dev);5063 netif_carrier_off(bond_dev);
5058 5064
5059 bond_work_init_all(bond);5065 bond_work_init_all(bond);
5060 5066
5061 rtnl_unlock();5067 rtnl_unlock();
5062 if (res < 0)5068 return 0;
5063 free_netdev(bond_dev);
5064 return res;
5065}5069}
5066 5070
5067static int __net_init bond_net_init(struct net *net)5071static int __net_init bond_net_init(struct net *net)
drivers/net/bonding/bond_netlink.c+1−2
@@ -456,11 +456,10 @@ static int bond_newlink(struct net *src_net, struct net_device *bond_dev, · 455 unmodified lines
456 return err;456 return err;
457 457
458 err = register_netdevice(bond_dev);458 err = register_netdevice(bond_dev);
459
460 netif_carrier_off(bond_dev);
461 if (!err) {459 if (!err) {
462 struct bonding *bond = netdev_priv(bond_dev);460 struct bonding *bond = netdev_priv(bond_dev);
463 461
462 netif_carrier_off(bond_dev);
464 bond_work_init_all(bond);463 bond_work_init_all(bond);
465 }464 }
466 465
drivers/net/dsa/microchip/ksz8795.c+3−0
@@ -1268,6 +1268,9 @@ static int ksz8795_switch_init(struct ksz_device *dev) · 1267 unmodified lines
1268 return -ENOMEM;1268 return -ENOMEM;
1269 }1269 }
1270 1270
1271 /* set the real number of ports */
1272 dev->ds->num_ports = dev->port_cnt;
1273
1271 return 0;1274 return 0;
1272}1275}
1273 1276
drivers/net/dsa/microchip/ksz9477.c+26−19
@@ -974,23 +974,6 @@ static void ksz9477_port_mirror_del(struct dsa_switch *ds, int port, · 973 unmodified lines
974 PORT_MIRROR_SNIFFER, false);974 PORT_MIRROR_SNIFFER, false);
975}975}
976 976
977static void ksz9477_phy_setup(struct ksz_device *dev, int port,
978 struct phy_device *phy)
979{
980 /* Only apply to port with PHY. */
981 if (port >= dev->phy_port_cnt)
982 return;
983
984 /* The MAC actually cannot run in 1000 half-duplex mode. */
985 phy_remove_link_mode(phy,
986 ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
987
988 /* PHY does not support gigabit. */
989 if (!(dev->features & GBIT_SUPPORT))
990 phy_remove_link_mode(phy,
991 ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
992}
993
994static bool ksz9477_get_gbit(struct ksz_device *dev, u8 data)977static bool ksz9477_get_gbit(struct ksz_device *dev, u8 data)
995{978{
996 bool gbit;979 bool gbit;
@@ -1588,6 +1571,9 @@ static int ksz9477_switch_init(struct ksz_device *dev) · 591 unmodified lines
1588 return -ENOMEM;1571 return -ENOMEM;
1589 }1572 }
1590 1573
1574 /* set the real number of ports */
1575 dev->ds->num_ports = dev->port_cnt;
1576
1591 return 0;1577 return 0;
1592}1578}
1593 1579
@@ -1600,7 +1586,6 @@ static const struct ksz_dev_ops ksz9477_dev_ops = { · 6 unmodified lines
1600 .get_port_addr = ksz9477_get_port_addr,1586 .get_port_addr = ksz9477_get_port_addr,
1601 .cfg_port_member = ksz9477_cfg_port_member,1587 .cfg_port_member = ksz9477_cfg_port_member,
1602 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,1588 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,
1603 .phy_setup = ksz9477_phy_setup,
1604 .port_setup = ksz9477_port_setup,1589 .port_setup = ksz9477_port_setup,
1605 .r_mib_cnt = ksz9477_r_mib_cnt,1590 .r_mib_cnt = ksz9477_r_mib_cnt,
1606 .r_mib_pkt = ksz9477_r_mib_pkt,1591 .r_mib_pkt = ksz9477_r_mib_pkt,
@@ -1614,7 +1599,29 @@ static const struct ksz_dev_ops ksz9477_dev_ops = { · 7 unmodified lines
1614 1599
1615int ksz9477_switch_register(struct ksz_device *dev)1600int ksz9477_switch_register(struct ksz_device *dev)
1616{1601{
1617 return ksz_switch_register(dev, &ksz9477_dev_ops);1602 int ret, i;
1603 struct phy_device *phydev;
1604
1605 ret = ksz_switch_register(dev, &ksz9477_dev_ops);
1606 if (ret)
1607 return ret;
1608
1609 for (i = 0; i < dev->phy_port_cnt; ++i) {
1610 if (!dsa_is_user_port(dev->ds, i))
1611 continue;
1612
1613 phydev = dsa_to_port(dev->ds, i)->slave->phydev;
1614
1615 /* The MAC actually cannot run in 1000 half-duplex mode. */
1616 phy_remove_link_mode(phydev,
1617 ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
1618
1619 /* PHY does not support gigabit. */
1620 if (!(dev->features & GBIT_SUPPORT))
1621 phy_remove_link_mode(phydev,
1622 ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
1623 }
1624 return ret;
1618}1625}
1619EXPORT_SYMBOL(ksz9477_switch_register);1626EXPORT_SYMBOL(ksz9477_switch_register);
1620 1627
drivers/net/dsa/microchip/ksz9477_i2c.c+1−0
@@ -79,6 +79,7 @@ MODULE_DEVICE_TABLE(i2c, ksz9477_i2c_id); · 78 unmodified lines
79static const struct of_device_id ksz9477_dt_ids[] = {79static const struct of_device_id ksz9477_dt_ids[] = {
80 { .compatible = "microchip,ksz9477" },80 { .compatible = "microchip,ksz9477" },
81 { .compatible = "microchip,ksz9897" },81 { .compatible = "microchip,ksz9897" },
82 { .compatible = "microchip,ksz9893" },
82 { .compatible = "microchip,ksz9567" },83 { .compatible = "microchip,ksz9567" },
83 {},84 {},
84};85};
drivers/net/dsa/microchip/ksz_common.c+0−2
@@ -358,8 +358,6 @@ int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy) · 357 unmodified lines
358 358
359 /* setup slave port */359 /* setup slave port */
360 dev->dev_ops->port_setup(dev, port, false);360 dev->dev_ops->port_setup(dev, port, false);
361 if (dev->dev_ops->phy_setup)
362 dev->dev_ops->phy_setup(dev, port, phy);
363 361
364 /* port_stp_state_set() will be called after to enable the port so362 /* port_stp_state_set() will be called after to enable the port so
365 * there is no need to do anything.363 * there is no need to do anything.
drivers/net/dsa/microchip/ksz_common.h+0−2
@@ -119,8 +119,6 @@ struct ksz_dev_ops { · 118 unmodified lines
119 u32 (*get_port_addr)(int port, int offset);119 u32 (*get_port_addr)(int port, int offset);
120 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);120 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
121 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);121 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
122 void (*phy_setup)(struct ksz_device *dev, int port,
123 struct phy_device *phy);
124 void (*port_cleanup)(struct ksz_device *dev, int port);122 void (*port_cleanup)(struct ksz_device *dev, int port);
125 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);123 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
126 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);124 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
drivers/net/dsa/mv88e6xxx/chip.c+19−3
@@ -664,8 +664,11 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 663 unmodified lines
664 const struct phylink_link_state *state)664 const struct phylink_link_state *state)
665{665{
666 struct mv88e6xxx_chip *chip = ds->priv;666 struct mv88e6xxx_chip *chip = ds->priv;
667 struct mv88e6xxx_port *p;
667 int err;668 int err;
668 669
670 p = &chip->ports[port];
671
669 /* FIXME: is this the correct test? If we're in fixed mode on an672 /* FIXME: is this the correct test? If we're in fixed mode on an
670 * internal port, why should we process this any different from673 * internal port, why should we process this any different from
671 * PHY mode? On the other hand, the port may be automedia between674 * PHY mode? On the other hand, the port may be automedia between
@@ -675,10 +678,14 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 3 unmodified lines
675 return;678 return;
676 679
677 mv88e6xxx_reg_lock(chip);680 mv88e6xxx_reg_lock(chip);
678 /* FIXME: should we force the link down here - but if we do, how681 /* In inband mode, the link may come up at any time while the link
679 * do we restore the link force/unforce state? The driver layering682 * is not forced down. Force the link down while we reconfigure the
680 * gets in the way.683 * interface mode.
681 */684 */
685 if (mode == MLO_AN_INBAND && p->interface != state->interface &&
686 chip->info->ops->port_set_link)
687 chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN);
688
682 err = mv88e6xxx_port_config_interface(chip, port, state->interface);689 err = mv88e6xxx_port_config_interface(chip, port, state->interface);
683 if (err && err != -EOPNOTSUPP)690 if (err && err != -EOPNOTSUPP)
684 goto err_unlock;691 goto err_unlock;
@@ -691,6 +698,15 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 6 unmodified lines
691 if (err > 0)698 if (err > 0)
692 err = 0;699 err = 0;
693 700
701 /* Undo the forced down state above after completing configuration
702 * irrespective of its state on entry, which allows the link to come up.
703 */
704 if (mode == MLO_AN_INBAND && p->interface != state->interface &&
705 chip->info->ops->port_set_link)
706 chip->info->ops->port_set_link(chip, port, LINK_UNFORCED);
707
708 p->interface = state->interface;
709
694err_unlock:710err_unlock:
695 mv88e6xxx_reg_unlock(chip);711 mv88e6xxx_reg_unlock(chip);
696 712
drivers/net/dsa/mv88e6xxx/chip.h+1−0
@@ -232,6 +232,7 @@ struct mv88e6xxx_port { · 231 unmodified lines
232 u64 atu_full_violation;232 u64 atu_full_violation;
233 u64 vtu_member_violation;233 u64 vtu_member_violation;
234 u64 vtu_miss_violation;234 u64 vtu_miss_violation;
235 phy_interface_t interface;
235 u8 cmode;236 u8 cmode;
236 bool mirror_ingress;237 bool mirror_ingress;
237 bool mirror_egress;238 bool mirror_egress;
drivers/net/ethernet/aquantia/atlantic/aq_hw.h+1−0
@@ -64,6 +64,7 @@ struct aq_hw_caps_s { · 63 unmodified lines
64 u8 rx_rings;64 u8 rx_rings;
65 bool flow_control;65 bool flow_control;
66 bool is_64_dma;66 bool is_64_dma;
67 u32 quirks;
67 u32 priv_data_len;68 u32 priv_data_len;
68};69};
69 70
drivers/net/ethernet/aquantia/atlantic/aq_nic.c+9−0
@@ -415,6 +415,15 @@ int aq_nic_init(struct aq_nic_s *self) · 414 unmodified lines
415 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {415 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
416 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;416 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
417 err = aq_phy_init(self->aq_hw);417 err = aq_phy_init(self->aq_hw);
418
419 /* Disable the PTP on NICs where it's known to cause datapath
420 * problems.
421 * Ideally this should have been done by PHY provisioning, but
422 * many units have been shipped with enabled PTP block already.
423 */
424 if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
425 if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
426 aq_phy_disable_ptp(self->aq_hw);
418 }427 }
419 428
420 for (i = 0U; i < self->aq_vecs; i++) {429 for (i = 0U; i < self->aq_vecs; i++) {
drivers/net/ethernet/aquantia/atlantic/aq_nic.h+2−0
@@ -81,6 +81,8 @@ struct aq_nic_cfg_s { · 80 unmodified lines
81#define AQ_NIC_FLAG_ERR_UNPLUG 0x40000000U81#define AQ_NIC_FLAG_ERR_UNPLUG 0x40000000U
82#define AQ_NIC_FLAG_ERR_HW 0x80000000U82#define AQ_NIC_FLAG_ERR_HW 0x80000000U
83 83
84#define AQ_NIC_QUIRK_BAD_PTP BIT(0)
85
84#define AQ_NIC_WOL_MODES (WAKE_MAGIC |\86#define AQ_NIC_WOL_MODES (WAKE_MAGIC |\
85 WAKE_PHY)87 WAKE_PHY)
86 88
drivers/net/ethernet/aquantia/atlantic/aq_phy.c+27−2
@@ -1,10 +1,14 @@
1// SPDX-License-Identifier: GPL-2.0-only1// SPDX-License-Identifier: GPL-2.0-only
2/* aQuantia Corporation Network Driver2/* Atlantic Network Driver
3 * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved3 *
4 * Copyright (C) 2018-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
4 */6 */
5 7
6#include "aq_phy.h"8#include "aq_phy.h"
7 9
10#define HW_ATL_PTP_DISABLE_MSK BIT(10)
11
8bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw)12bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw)
9{13{
10 int err = 0;14 int err = 0;
@@ -145,3 +149,24 @@ bool aq_phy_init(struct aq_hw_s *aq_hw) · 134 unmodified lines
145 149
146 return true;150 return true;
147}151}
152
153void aq_phy_disable_ptp(struct aq_hw_s *aq_hw)
154{
155 static const u16 ptp_registers[] = {
156 0x031e,
157 0x031d,
158 0x031c,
159 0x031b,
160 };
161 u16 val;
162 int i;
163
164 for (i = 0; i < ARRAY_SIZE(ptp_registers); i++) {
165 val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1,
166 ptp_registers[i]);
167
168 aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1,
169 ptp_registers[i],
170 val & ~HW_ATL_PTP_DISABLE_MSK);
171 }
172}
drivers/net/ethernet/aquantia/atlantic/aq_phy.h+6−2
@@ -1,6 +1,8 @@
1/* SPDX-License-Identifier: GPL-2.0-only */1/* SPDX-License-Identifier: GPL-2.0-only */
2/* aQuantia Corporation Network Driver2/* Atlantic Network Driver
3 * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved3 *
4 * Copyright (C) 2018-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
4 */6 */
5 7
6#ifndef AQ_PHY_H8#ifndef AQ_PHY_H
@@ -29,4 +31,6 @@ bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw); · 22 unmodified lines
29 31
30bool aq_phy_init(struct aq_hw_s *aq_hw);32bool aq_phy_init(struct aq_hw_s *aq_hw);
31 33
34void aq_phy_disable_ptp(struct aq_hw_s *aq_hw);
35
32#endif /* AQ_PHY_H */36#endif /* AQ_PHY_H */
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c+25−1
@@ -93,6 +93,25 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = { · 92 unmodified lines
93 AQ_NIC_RATE_100M,93 AQ_NIC_RATE_100M,
94};94};
95 95
96const struct aq_hw_caps_s hw_atl_b0_caps_aqc111 = {
97 DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
98 .media_type = AQ_HW_MEDIA_TYPE_TP,
99 .link_speed_msk = AQ_NIC_RATE_5G |
100 AQ_NIC_RATE_2G5 |
101 AQ_NIC_RATE_1G |
102 AQ_NIC_RATE_100M,
103 .quirks = AQ_NIC_QUIRK_BAD_PTP,
104};
105
106const struct aq_hw_caps_s hw_atl_b0_caps_aqc112 = {
107 DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
108 .media_type = AQ_HW_MEDIA_TYPE_TP,
109 .link_speed_msk = AQ_NIC_RATE_2G5 |
110 AQ_NIC_RATE_1G |
111 AQ_NIC_RATE_100M,
112 .quirks = AQ_NIC_QUIRK_BAD_PTP,
113};
114
96static int hw_atl_b0_hw_reset(struct aq_hw_s *self)115static int hw_atl_b0_hw_reset(struct aq_hw_s *self)
97{116{
98 int err = 0;117 int err = 0;
@@ -354,8 +373,13 @@ static int hw_atl_b0_hw_init_tx_tc_rate_limit(struct aq_hw_s *self) · 255 unmodified lines
354 373
355 /* WSP, if min_rate is set for at least one TC.374 /* WSP, if min_rate is set for at least one TC.
356 * RR otherwise.375 * RR otherwise.
376 *
377 * NB! MAC FW sets arb mode itself if PTP is enabled. We shouldn't
378 * overwrite it here in that case.
357 */379 */
358 hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);380 if (!nic_cfg->is_ptp)
381 hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);
382
359 /* Data TC Arbiter takes precedence over Descriptor TC Arbiter,383 /* Data TC Arbiter takes precedence over Descriptor TC Arbiter,
360 * leave Descriptor TC Arbiter as RR.384 * leave Descriptor TC Arbiter as RR.
361 */385 */
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h+4−6
@@ -18,17 +18,15 @@ extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc100; · 17 unmodified lines
18extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;18extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;
19extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;19extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;
20extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;20extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;
21 21extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc111;
22#define hw_atl_b0_caps_aqc111 hw_atl_b0_caps_aqc10822extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc112;
23#define hw_atl_b0_caps_aqc112 hw_atl_b0_caps_aqc109
24 23
25#define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc10024#define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100
26#define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc10725#define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107
27#define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc10826#define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108
28#define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc10927#define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109
29 28#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc111
30#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc10829#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc112
31#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc109
32 30
33extern const struct aq_hw_ops hw_atl_ops_b0;31extern const struct aq_hw_ops hw_atl_ops_b0;
34 32
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c+2−2
@@ -1700,7 +1700,7 @@ void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location, · 1699 unmodified lines
1700 for (i = 0; i < 4; ++i)1700 for (i = 0; i < 4; ++i)
1701 aq_hw_write_reg(aq_hw,1701 aq_hw_write_reg(aq_hw,
1702 HW_ATL_RPF_L3_SRCA_ADR(location + i),1702 HW_ATL_RPF_L3_SRCA_ADR(location + i),
1703 ipv6_src[i]);1703 ipv6_src[3 - i]);
1704}1704}
1705 1705
1706void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,1706void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location,
@@ -1711,7 +1711,7 @@ void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, · 4 unmodified lines
1711 for (i = 0; i < 4; ++i)1711 for (i = 0; i < 4; ++i)
1712 aq_hw_write_reg(aq_hw,1712 aq_hw_write_reg(aq_hw,
1713 HW_ATL_RPF_L3_DSTA_ADR(location + i),1713 HW_ATL_RPF_L3_DSTA_ADR(location + i),
1714 ipv6_dest[i]);1714 ipv6_dest[3 - i]);
1715}1715}
1716 1716
1717u32 hw_atl_sem_ram_get(struct aq_hw_s *self)1717u32 hw_atl_sem_ram_get(struct aq_hw_s *self)
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h+1−1
@@ -1360,7 +1360,7 @@ · 1359 unmodified lines
1360 */1360 */
1361 1361
1362 /* Register address for bitfield pif_rpf_l3_da0_i[31:0] */1362 /* Register address for bitfield pif_rpf_l3_da0_i[31:0] */
1363#define HW_ATL_RPF_L3_DSTA_ADR(filter) (0x000053B0 + (filter) * 0x4)1363#define HW_ATL_RPF_L3_DSTA_ADR(filter) (0x000053D0 + (filter) * 0x4)
1364/* Bitmask for bitfield l3_da0[1F:0] */1364/* Bitmask for bitfield l3_da0[1F:0] */
1365#define HW_ATL_RPF_L3_DSTA_MSK 0xFFFFFFFFu1365#define HW_ATL_RPF_L3_DSTA_MSK 0xFFFFFFFFu
1366/* Inverted bitmask for bitfield l3_da0[1F:0] */1366/* Inverted bitmask for bitfield l3_da0[1F:0] */
drivers/net/ethernet/atheros/ag71xx.c+2−1
@@ -556,7 +556,8 @@ static int ag71xx_mdio_probe(struct ag71xx *ag) · 555 unmodified lines
556 ag->mdio_reset = of_reset_control_get_exclusive(np, "mdio");556 ag->mdio_reset = of_reset_control_get_exclusive(np, "mdio");
557 if (IS_ERR(ag->mdio_reset)) {557 if (IS_ERR(ag->mdio_reset)) {
558 netif_err(ag, probe, ndev, "Failed to get reset mdio.\n");558 netif_err(ag, probe, ndev, "Failed to get reset mdio.\n");
559 return PTR_ERR(ag->mdio_reset);559 err = PTR_ERR(ag->mdio_reset);
560 goto mdio_err_put_clk;
560 }561 }
561 562
562 mii_bus->name = "ag71xx_mdio";563 mii_bus->name = "ag71xx_mdio";
drivers/net/ethernet/broadcom/bnxt/bnxt.c+15−7
@@ -3418,7 +3418,7 @@ void bnxt_set_tpa_flags(struct bnxt *bp) · 3417 unmodified lines
3418 */3418 */
3419void bnxt_set_ring_params(struct bnxt *bp)3419void bnxt_set_ring_params(struct bnxt *bp)
3420{3420{
3421 u32 ring_size, rx_size, rx_space;3421 u32 ring_size, rx_size, rx_space, max_rx_cmpl;
3422 u32 agg_factor = 0, agg_ring_size = 0;3422 u32 agg_factor = 0, agg_ring_size = 0;
3423 3423
3424 /* 8 for CRC and VLAN */3424 /* 8 for CRC and VLAN */
@@ -3474,7 +3474,15 @@ void bnxt_set_ring_params(struct bnxt *bp) · 49 unmodified lines
3474 bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT);3474 bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT);
3475 bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1;3475 bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1;
3476 3476
3477 ring_size = bp->rx_ring_size * (2 + agg_factor) + bp->tx_ring_size;3477 max_rx_cmpl = bp->rx_ring_size;
3478 /* MAX TPA needs to be added because TPA_START completions are
3479 * immediately recycled, so the TPA completions are not bound by
3480 * the RX ring size.
3481 */
3482 if (bp->flags & BNXT_FLAG_TPA)
3483 max_rx_cmpl += bp->max_tpa;
3484 /* RX and TPA completions are 32-byte, all others are 16-byte */
3485 ring_size = max_rx_cmpl * 2 + agg_ring_size + bp->tx_ring_size;
3478 bp->cp_ring_size = ring_size;3486 bp->cp_ring_size = ring_size;
3479 3487
3480 bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT);3488 bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT);
@@ -10385,15 +10393,15 @@ static void bnxt_sp_task(struct work_struct *work) · 6904 unmodified lines
10385 &bp->sp_event))10393 &bp->sp_event))
10386 bnxt_hwrm_phy_qcaps(bp);10394 bnxt_hwrm_phy_qcaps(bp);
10387 10395
10388 if (test_and_clear_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT,
10389 &bp->sp_event))
10390 bnxt_init_ethtool_link_settings(bp);
10391
10392 rc = bnxt_update_link(bp, true);10396 rc = bnxt_update_link(bp, true);
10393 mutex_unlock(&bp->link_lock);
10394 if (rc)10397 if (rc)
10395 netdev_err(bp->dev, "SP task can't update link (rc: %x)\n",10398 netdev_err(bp->dev, "SP task can't update link (rc: %x)\n",
10396 rc);10399 rc);
10400
10401 if (test_and_clear_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT,
10402 &bp->sp_event))
10403 bnxt_init_ethtool_link_settings(bp);
10404 mutex_unlock(&bp->link_lock);
10397 }10405 }
10398 if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) {10406 if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) {
10399 int rc;10407 int rc;
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+4−1
@@ -1765,8 +1765,11 @@ static int bnxt_set_pauseparam(struct net_device *dev, · 1764 unmodified lines
1765 if (epause->tx_pause)1765 if (epause->tx_pause)
1766 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;1766 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1767 1767
1768 if (netif_running(dev))1768 if (netif_running(dev)) {
1769 mutex_lock(&bp->link_lock);
1769 rc = bnxt_hwrm_set_pause(bp);1770 rc = bnxt_hwrm_set_pause(bp);
1771 mutex_unlock(&bp->link_lock);
1772 }
1770 return rc;1773 return rc;
1771}1774}
1772 1775
drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c+1−1
@@ -396,6 +396,7 @@ static void bnxt_free_vf_resources(struct bnxt *bp) · 395 unmodified lines
396 }396 }
397 }397 }
398 398
399 bp->pf.active_vfs = 0;
399 kfree(bp->pf.vf);400 kfree(bp->pf.vf);
400 bp->pf.vf = NULL;401 bp->pf.vf = NULL;
401}402}
@@ -835,7 +836,6 @@ void bnxt_sriov_disable(struct bnxt *bp) · 433 unmodified lines
835 836
836 bnxt_free_vf_resources(bp);837 bnxt_free_vf_resources(bp);
837 838
838 bp->pf.active_vfs = 0;
839 /* Reclaim all resources for the PF. */839 /* Reclaim all resources for the PF. */
840 rtnl_lock();840 rtnl_lock();
841 bnxt_restore_pf_fw_resources(bp);841 bnxt_restore_pf_fw_resources(bp);
drivers/net/ethernet/broadcom/genet/bcmgenet.c+65−79
@@ -543,14 +543,14 @@ static int bcmgenet_hfb_validate_mask(void *mask, size_t size) · 542 unmodified lines
543#define VALIDATE_MASK(x) \543#define VALIDATE_MASK(x) \
544 bcmgenet_hfb_validate_mask(&(x), sizeof(x))544 bcmgenet_hfb_validate_mask(&(x), sizeof(x))
545 545
546static int bcmgenet_hfb_insert_data(u32 *f, int offset,546static int bcmgenet_hfb_insert_data(struct bcmgenet_priv *priv, u32 f_index,
547 void *val, void *mask, size_t size)547 u32 offset, void *val, void *mask,
548 size_t size)
548{549{
549 int index;550 u32 index, tmp;
550 u32 tmp;
551 551
552 index = offset / 2;552 index = f_index * priv->hw_params->hfb_filter_size + offset / 2;
553 tmp = f[index];553 tmp = bcmgenet_hfb_readl(priv, index * sizeof(u32));
554 554
555 while (size--) {555 while (size--) {
556 if (offset++ & 1) {556 if (offset++ & 1) {
@@ -567,9 +567,10 @@ static int bcmgenet_hfb_insert_data(u32 *f, int offset, · 10 unmodified lines
567 tmp |= 0x10000;567 tmp |= 0x10000;
568 break;568 break;
569 }569 }
570 f[index++] = tmp;570 bcmgenet_hfb_writel(priv, tmp, index++ * sizeof(u32));
571 if (size)571 if (size)
572 tmp = f[index];572 tmp = bcmgenet_hfb_readl(priv,
573 index * sizeof(u32));
573 } else {574 } else {
574 tmp &= ~0xCFF00;575 tmp &= ~0xCFF00;
575 tmp |= (*(unsigned char *)val++) << 8;576 tmp |= (*(unsigned char *)val++) << 8;
@@ -585,44 +586,26 @@ static int bcmgenet_hfb_insert_data(u32 *f, int offset, · 9 unmodified lines
585 break;586 break;
586 }587 }
587 if (!size)588 if (!size)
588 f[index] = tmp;589 bcmgenet_hfb_writel(priv, tmp, index * sizeof(u32));
589 }590 }
590 }591 }
591 592
592 return 0;593 return 0;
593}594}
594 595
595static void bcmgenet_hfb_set_filter(struct bcmgenet_priv *priv, u32 *f_data,596static void bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
596 u32 f_length, u32 rx_queue, int f_index)597 struct bcmgenet_rxnfc_rule *rule)
597{
598 u32 base = f_index * priv->hw_params->hfb_filter_size;
599 int i;
600
601 for (i = 0; i < f_length; i++)
602 bcmgenet_hfb_writel(priv, f_data[i], (base + i) * sizeof(u32));
603
604 bcmgenet_hfb_set_filter_length(priv, f_index, 2 * f_length);
605 bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f_index, rx_queue);
606}
607
608static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
609 struct bcmgenet_rxnfc_rule *rule)
610{598{
611 struct ethtool_rx_flow_spec *fs = &rule->fs;599 struct ethtool_rx_flow_spec *fs = &rule->fs;
612 int err = 0, offset = 0, f_length = 0;600 u32 offset = 0, f_length = 0, f;
613 u8 val_8, mask_8;601 u8 val_8, mask_8;
614 __be16 val_16;602 __be16 val_16;
615 u16 mask_16;603 u16 mask_16;
616 size_t size;604 size_t size;
617 u32 *f_data;
618
619 f_data = kcalloc(priv->hw_params->hfb_filter_size, sizeof(u32),
620 GFP_KERNEL);
621 if (!f_data)
622 return -ENOMEM;
623 605
606 f = fs->location;
624 if (fs->flow_type & FLOW_MAC_EXT) {607 if (fs->flow_type & FLOW_MAC_EXT) {
625 bcmgenet_hfb_insert_data(f_data, 0,608 bcmgenet_hfb_insert_data(priv, f, 0,
626 &fs->h_ext.h_dest, &fs->m_ext.h_dest,609 &fs->h_ext.h_dest, &fs->m_ext.h_dest,
627 sizeof(fs->h_ext.h_dest));610 sizeof(fs->h_ext.h_dest));
628 }611 }
@@ -630,11 +613,11 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 1 unmodified line
630 if (fs->flow_type & FLOW_EXT) {613 if (fs->flow_type & FLOW_EXT) {
631 if (fs->m_ext.vlan_etype ||614 if (fs->m_ext.vlan_etype ||
632 fs->m_ext.vlan_tci) {615 fs->m_ext.vlan_tci) {
633 bcmgenet_hfb_insert_data(f_data, 12,616 bcmgenet_hfb_insert_data(priv, f, 12,
634 &fs->h_ext.vlan_etype,617 &fs->h_ext.vlan_etype,
635 &fs->m_ext.vlan_etype,618 &fs->m_ext.vlan_etype,
636 sizeof(fs->h_ext.vlan_etype));619 sizeof(fs->h_ext.vlan_etype));
637 bcmgenet_hfb_insert_data(f_data, 14,620 bcmgenet_hfb_insert_data(priv, f, 14,
638 &fs->h_ext.vlan_tci,621 &fs->h_ext.vlan_tci,
639 &fs->m_ext.vlan_tci,622 &fs->m_ext.vlan_tci,
640 sizeof(fs->h_ext.vlan_tci));623 sizeof(fs->h_ext.vlan_tci));
@@ -646,15 +629,15 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 5 unmodified lines
646 switch (fs->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {629 switch (fs->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
647 case ETHER_FLOW:630 case ETHER_FLOW:
648 f_length += DIV_ROUND_UP(ETH_HLEN, 2);631 f_length += DIV_ROUND_UP(ETH_HLEN, 2);
649 bcmgenet_hfb_insert_data(f_data, 0,632 bcmgenet_hfb_insert_data(priv, f, 0,
650 &fs->h_u.ether_spec.h_dest,633 &fs->h_u.ether_spec.h_dest,
651 &fs->m_u.ether_spec.h_dest,634 &fs->m_u.ether_spec.h_dest,
652 sizeof(fs->h_u.ether_spec.h_dest));635 sizeof(fs->h_u.ether_spec.h_dest));
653 bcmgenet_hfb_insert_data(f_data, ETH_ALEN,636 bcmgenet_hfb_insert_data(priv, f, ETH_ALEN,
654 &fs->h_u.ether_spec.h_source,637 &fs->h_u.ether_spec.h_source,
655 &fs->m_u.ether_spec.h_source,638 &fs->m_u.ether_spec.h_source,
656 sizeof(fs->h_u.ether_spec.h_source));639 sizeof(fs->h_u.ether_spec.h_source));
657 bcmgenet_hfb_insert_data(f_data, (2 * ETH_ALEN) + offset,640 bcmgenet_hfb_insert_data(priv, f, (2 * ETH_ALEN) + offset,
658 &fs->h_u.ether_spec.h_proto,641 &fs->h_u.ether_spec.h_proto,
659 &fs->m_u.ether_spec.h_proto,642 &fs->m_u.ether_spec.h_proto,
660 sizeof(fs->h_u.ether_spec.h_proto));643 sizeof(fs->h_u.ether_spec.h_proto));
@@ -664,21 +647,21 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 3 unmodified lines
664 /* Specify IP Ether Type */647 /* Specify IP Ether Type */
665 val_16 = htons(ETH_P_IP);648 val_16 = htons(ETH_P_IP);
666 mask_16 = 0xFFFF;649 mask_16 = 0xFFFF;
667 bcmgenet_hfb_insert_data(f_data, (2 * ETH_ALEN) + offset,650 bcmgenet_hfb_insert_data(priv, f, (2 * ETH_ALEN) + offset,
668 &val_16, &mask_16, sizeof(val_16));651 &val_16, &mask_16, sizeof(val_16));
669 bcmgenet_hfb_insert_data(f_data, 15 + offset,652 bcmgenet_hfb_insert_data(priv, f, 15 + offset,
670 &fs->h_u.usr_ip4_spec.tos,653 &fs->h_u.usr_ip4_spec.tos,
671 &fs->m_u.usr_ip4_spec.tos,654 &fs->m_u.usr_ip4_spec.tos,
672 sizeof(fs->h_u.usr_ip4_spec.tos));655 sizeof(fs->h_u.usr_ip4_spec.tos));
673 bcmgenet_hfb_insert_data(f_data, 23 + offset,656 bcmgenet_hfb_insert_data(priv, f, 23 + offset,
674 &fs->h_u.usr_ip4_spec.proto,657 &fs->h_u.usr_ip4_spec.proto,
675 &fs->m_u.usr_ip4_spec.proto,658 &fs->m_u.usr_ip4_spec.proto,
676 sizeof(fs->h_u.usr_ip4_spec.proto));659 sizeof(fs->h_u.usr_ip4_spec.proto));
677 bcmgenet_hfb_insert_data(f_data, 26 + offset,660 bcmgenet_hfb_insert_data(priv, f, 26 + offset,
678 &fs->h_u.usr_ip4_spec.ip4src,661 &fs->h_u.usr_ip4_spec.ip4src,
679 &fs->m_u.usr_ip4_spec.ip4src,662 &fs->m_u.usr_ip4_spec.ip4src,
680 sizeof(fs->h_u.usr_ip4_spec.ip4src));663 sizeof(fs->h_u.usr_ip4_spec.ip4src));
681 bcmgenet_hfb_insert_data(f_data, 30 + offset,664 bcmgenet_hfb_insert_data(priv, f, 30 + offset,
682 &fs->h_u.usr_ip4_spec.ip4dst,665 &fs->h_u.usr_ip4_spec.ip4dst,
683 &fs->m_u.usr_ip4_spec.ip4dst,666 &fs->m_u.usr_ip4_spec.ip4dst,
684 sizeof(fs->h_u.usr_ip4_spec.ip4dst));667 sizeof(fs->h_u.usr_ip4_spec.ip4dst));
@@ -688,11 +671,11 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 3 unmodified lines
688 /* Only supports 20 byte IPv4 header */671 /* Only supports 20 byte IPv4 header */
689 val_8 = 0x45;672 val_8 = 0x45;
690 mask_8 = 0xFF;673 mask_8 = 0xFF;
691 bcmgenet_hfb_insert_data(f_data, ETH_HLEN + offset,674 bcmgenet_hfb_insert_data(priv, f, ETH_HLEN + offset,
692 &val_8, &mask_8,675 &val_8, &mask_8,
693 sizeof(val_8));676 sizeof(val_8));
694 size = sizeof(fs->h_u.usr_ip4_spec.l4_4_bytes);677 size = sizeof(fs->h_u.usr_ip4_spec.l4_4_bytes);
695 bcmgenet_hfb_insert_data(f_data,678 bcmgenet_hfb_insert_data(priv, f,
696 ETH_HLEN + 20 + offset,679 ETH_HLEN + 20 + offset,
697 &fs->h_u.usr_ip4_spec.l4_4_bytes,680 &fs->h_u.usr_ip4_spec.l4_4_bytes,
698 &fs->m_u.usr_ip4_spec.l4_4_bytes,681 &fs->m_u.usr_ip4_spec.l4_4_bytes,
@@ -701,34 +684,42 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 2 unmodified lines
701 break;684 break;
702 }685 }
703 686
687 bcmgenet_hfb_set_filter_length(priv, f, 2 * f_length);
704 if (!fs->ring_cookie || fs->ring_cookie == RX_CLS_FLOW_WAKE) {688 if (!fs->ring_cookie || fs->ring_cookie == RX_CLS_FLOW_WAKE) {
705 /* Ring 0 flows can be handled by the default Descriptor Ring689 /* Ring 0 flows can be handled by the default Descriptor Ring
706 * We'll map them to ring 0, but don't enable the filter690 * We'll map them to ring 0, but don't enable the filter
707 */691 */
708 bcmgenet_hfb_set_filter(priv, f_data, f_length, 0,692 bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f, 0);
709 fs->location);
710 rule->state = BCMGENET_RXNFC_STATE_DISABLED;693 rule->state = BCMGENET_RXNFC_STATE_DISABLED;
711 } else {694 } else {
712 /* Other Rx rings are direct mapped here */695 /* Other Rx rings are direct mapped here */
713 bcmgenet_hfb_set_filter(priv, f_data, f_length,696 bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f,
714 fs->ring_cookie, fs->location);697 fs->ring_cookie);
715 bcmgenet_hfb_enable_filter(priv, fs->location);698 bcmgenet_hfb_enable_filter(priv, f);
716 rule->state = BCMGENET_RXNFC_STATE_ENABLED;699 rule->state = BCMGENET_RXNFC_STATE_ENABLED;
717 }700 }
718
719 kfree(f_data);
720
721 return err;
722}701}
723 702
724/* bcmgenet_hfb_clear703/* bcmgenet_hfb_clear
725 *704 *
726 * Clear Hardware Filter Block and disable all filtering.705 * Clear Hardware Filter Block and disable all filtering.
727 */706 */
707static void bcmgenet_hfb_clear_filter(struct bcmgenet_priv *priv, u32 f_index)
708{
709 u32 base, i;
710
711 base = f_index * priv->hw_params->hfb_filter_size;
712 for (i = 0; i < priv->hw_params->hfb_filter_size; i++)
713 bcmgenet_hfb_writel(priv, 0x0, (base + i) * sizeof(u32));
714}
715
728static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv)716static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv)
729{717{
730 u32 i;718 u32 i;
731 719
720 if (GENET_IS_V1(priv) || GENET_IS_V2(priv))
721 return;
722
732 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_CTRL);723 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_CTRL);
733 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS);724 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS);
734 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS + 4);725 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS + 4);
@@ -740,19 +731,18 @@ static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv) · 5 unmodified lines
740 bcmgenet_hfb_reg_writel(priv, 0x0,731 bcmgenet_hfb_reg_writel(priv, 0x0,
741 HFB_FLT_LEN_V3PLUS + i * sizeof(u32));732 HFB_FLT_LEN_V3PLUS + i * sizeof(u32));
742 733
743 for (i = 0; i < priv->hw_params->hfb_filter_cnt *734 for (i = 0; i < priv->hw_params->hfb_filter_cnt; i++)
744 priv->hw_params->hfb_filter_size; i++)735 bcmgenet_hfb_clear_filter(priv, i);
745 bcmgenet_hfb_writel(priv, 0x0, i * sizeof(u32));
746}736}
747 737
748static void bcmgenet_hfb_init(struct bcmgenet_priv *priv)738static void bcmgenet_hfb_init(struct bcmgenet_priv *priv)
749{739{
750 int i;740 int i;
751 741
742 INIT_LIST_HEAD(&priv->rxnfc_list);
752 if (GENET_IS_V1(priv) || GENET_IS_V2(priv))743 if (GENET_IS_V1(priv) || GENET_IS_V2(priv))
753 return;744 return;
754 745
755 INIT_LIST_HEAD(&priv->rxnfc_list);
756 for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {746 for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
757 INIT_LIST_HEAD(&priv->rxnfc_rules[i].list);747 INIT_LIST_HEAD(&priv->rxnfc_rules[i].list);
758 priv->rxnfc_rules[i].state = BCMGENET_RXNFC_STATE_UNUSED;748 priv->rxnfc_rules[i].state = BCMGENET_RXNFC_STATE_UNUSED;
@@ -1437,18 +1427,15 @@ static int bcmgenet_insert_flow(struct net_device *dev, · 678 unmodified lines
1437 loc_rule = &priv->rxnfc_rules[cmd->fs.location];1427 loc_rule = &priv->rxnfc_rules[cmd->fs.location];
1438 if (loc_rule->state == BCMGENET_RXNFC_STATE_ENABLED)1428 if (loc_rule->state == BCMGENET_RXNFC_STATE_ENABLED)
1439 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);1429 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);
1440 if (loc_rule->state != BCMGENET_RXNFC_STATE_UNUSED)1430 if (loc_rule->state != BCMGENET_RXNFC_STATE_UNUSED) {
1441 list_del(&loc_rule->list);1431 list_del(&loc_rule->list);
1432 bcmgenet_hfb_clear_filter(priv, cmd->fs.location);
1433 }
1442 loc_rule->state = BCMGENET_RXNFC_STATE_UNUSED;1434 loc_rule->state = BCMGENET_RXNFC_STATE_UNUSED;
1443 memcpy(&loc_rule->fs, &cmd->fs,1435 memcpy(&loc_rule->fs, &cmd->fs,
1444 sizeof(struct ethtool_rx_flow_spec));1436 sizeof(struct ethtool_rx_flow_spec));
1445 1437
1446 err = bcmgenet_hfb_create_rxnfc_filter(priv, loc_rule);1438 bcmgenet_hfb_create_rxnfc_filter(priv, loc_rule);
1447 if (err) {
1448 netdev_err(dev, "rxnfc: Could not install rule (%d)\n",
1449 err);
1450 return err;
1451 }
1452 1439
1453 list_add_tail(&loc_rule->list, &priv->rxnfc_list);1440 list_add_tail(&loc_rule->list, &priv->rxnfc_list);
1454 1441
@@ -1473,8 +1460,10 @@ static int bcmgenet_delete_flow(struct net_device *dev, · 18 unmodified lines
1473 1460
1474 if (rule->state == BCMGENET_RXNFC_STATE_ENABLED)1461 if (rule->state == BCMGENET_RXNFC_STATE_ENABLED)
1475 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);1462 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);
1476 if (rule->state != BCMGENET_RXNFC_STATE_UNUSED)1463 if (rule->state != BCMGENET_RXNFC_STATE_UNUSED) {
1477 list_del(&rule->list);1464 list_del(&rule->list);
1465 bcmgenet_hfb_clear_filter(priv, cmd->fs.location);
1466 }
1478 rule->state = BCMGENET_RXNFC_STATE_UNUSED;1467 rule->state = BCMGENET_RXNFC_STATE_UNUSED;
1479 memset(&rule->fs, 0, sizeof(struct ethtool_rx_flow_spec));1468 memset(&rule->fs, 0, sizeof(struct ethtool_rx_flow_spec));
1480 1469
@@ -3999,7 +3988,7 @@ static int bcmgenet_probe(struct platform_device *pdev) · 2518 unmodified lines
3999 if (err)3988 if (err)
4000 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));3989 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
4001 if (err)3990 if (err)
4002 goto err;3991 goto err_clk_disable;
4003 3992
4004 /* Mii wait queue */3993 /* Mii wait queue */
4005 init_waitqueue_head(&priv->wq);3994 init_waitqueue_head(&priv->wq);
@@ -4011,14 +4000,14 @@ static int bcmgenet_probe(struct platform_device *pdev) · 5 unmodified lines
4011 if (IS_ERR(priv->clk_wol)) {4000 if (IS_ERR(priv->clk_wol)) {
4012 dev_dbg(&priv->pdev->dev, "failed to get enet-wol clock\n");4001 dev_dbg(&priv->pdev->dev, "failed to get enet-wol clock\n");
4013 err = PTR_ERR(priv->clk_wol);4002 err = PTR_ERR(priv->clk_wol);
4014 goto err;4003 goto err_clk_disable;
4015 }4004 }
4016 4005
4017 priv->clk_eee = devm_clk_get_optional(&priv->pdev->dev, "enet-eee");4006 priv->clk_eee = devm_clk_get_optional(&priv->pdev->dev, "enet-eee");
4018 if (IS_ERR(priv->clk_eee)) {4007 if (IS_ERR(priv->clk_eee)) {
4019 dev_dbg(&priv->pdev->dev, "failed to get enet-eee clock\n");4008 dev_dbg(&priv->pdev->dev, "failed to get enet-eee clock\n");
4020 err = PTR_ERR(priv->clk_eee);4009 err = PTR_ERR(priv->clk_eee);
4021 goto err;4010 goto err_clk_disable;
4022 }4011 }
4023 4012
4024 /* If this is an internal GPHY, power it on now, before UniMAC is4013 /* If this is an internal GPHY, power it on now, before UniMAC is
@@ -4129,8 +4118,9 @@ static int bcmgenet_resume(struct device *d) · 104 unmodified lines
4129{4118{
4130 struct net_device *dev = dev_get_drvdata(d);4119 struct net_device *dev = dev_get_drvdata(d);
4131 struct bcmgenet_priv *priv = netdev_priv(dev);4120 struct bcmgenet_priv *priv = netdev_priv(dev);
4121 struct bcmgenet_rxnfc_rule *rule;
4132 unsigned long dma_ctrl;4122 unsigned long dma_ctrl;
4133 u32 offset, reg;4123 u32 reg;
4134 int ret;4124 int ret;
4135 4125
4136 if (!netif_running(dev))4126 if (!netif_running(dev))
@@ -4161,10 +4151,11 @@ static int bcmgenet_resume(struct device *d) · 24 unmodified lines
4161 4151
4162 bcmgenet_set_hw_addr(priv, dev->dev_addr);4152 bcmgenet_set_hw_addr(priv, dev->dev_addr);
4163 4153
4164 offset = HFB_FLT_ENABLE_V3PLUS;4154 /* Restore hardware filters */
4165 bcmgenet_hfb_reg_writel(priv, priv->hfb_en[1], offset);4155 bcmgenet_hfb_clear(priv);
4166 bcmgenet_hfb_reg_writel(priv, priv->hfb_en[2], offset + sizeof(u32));4156 list_for_each_entry(rule, &priv->rxnfc_list, list)
4167 bcmgenet_hfb_reg_writel(priv, priv->hfb_en[0], HFB_CTRL);4157 if (rule->state != BCMGENET_RXNFC_STATE_UNUSED)
4158 bcmgenet_hfb_create_rxnfc_filter(priv, rule);
4168 4159
4169 if (priv->internal_phy) {4160 if (priv->internal_phy) {
4170 reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);4161 reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);
@@ -4208,7 +4199,6 @@ static int bcmgenet_suspend(struct device *d) · 37 unmodified lines
4208{4199{
4209 struct net_device *dev = dev_get_drvdata(d);4200 struct net_device *dev = dev_get_drvdata(d);
4210 struct bcmgenet_priv *priv = netdev_priv(dev);4201 struct bcmgenet_priv *priv = netdev_priv(dev);
4211 u32 offset;
4212 4202
4213 if (!netif_running(dev))4203 if (!netif_running(dev))
4214 return 0;4204 return 0;
@@ -4220,11 +4210,7 @@ static int bcmgenet_suspend(struct device *d) · 5 unmodified lines
4220 if (!device_may_wakeup(d))4210 if (!device_may_wakeup(d))
4221 phy_suspend(dev->phydev);4211 phy_suspend(dev->phydev);
4222 4212
4223 /* Preserve filter state and disable filtering */4213 /* Disable filtering */
4224 priv->hfb_en[0] = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);
4225 offset = HFB_FLT_ENABLE_V3PLUS;
4226 priv->hfb_en[1] = bcmgenet_hfb_reg_readl(priv, offset);
4227 priv->hfb_en[2] = bcmgenet_hfb_reg_readl(priv, offset + sizeof(u32));
4228 bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);4214 bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);
4229 4215
4230 return 0;4216 return 0;
drivers/net/ethernet/broadcom/genet/bcmgenet.h+0−1
@@ -696,7 +696,6 @@ struct bcmgenet_priv { · 695 unmodified lines
696 u32 wolopts;696 u32 wolopts;
697 u8 sopass[SOPASS_MAX];697 u8 sopass[SOPASS_MAX];
698 bool wol_active;698 bool wol_active;
699 u32 hfb_en[3];
700 699
701 struct bcmgenet_mib_counters mib;700 struct bcmgenet_mib_counters mib;
702 701
drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c+15−7
@@ -217,20 +217,28 @@ void bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv, · 216 unmodified lines
217 217
218 priv->wol_active = 0;218 priv->wol_active = 0;
219 clk_disable_unprepare(priv->clk_wol);219 clk_disable_unprepare(priv->clk_wol);
220 priv->crc_fwd_en = 0;
220 221
221 /* Disable Magic Packet Detection */222 /* Disable Magic Packet Detection */
222 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);223 if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) {
223 reg &= ~(MPD_EN | MPD_PW_EN);224 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
224 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);225 if (!(reg & MPD_EN))
226 return; /* already reset so skip the rest */
227 reg &= ~(MPD_EN | MPD_PW_EN);
228 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);
229 }
225 230
226 /* Disable WAKE_FILTER Detection */231 /* Disable WAKE_FILTER Detection */
227 reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);232 if (priv->wolopts & WAKE_FILTER) {
228 reg &= ~(RBUF_HFB_EN | RBUF_ACPI_EN);233 reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);
229 bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);234 if (!(reg & RBUF_ACPI_EN))
235 return; /* already reset so skip the rest */
236 reg &= ~(RBUF_HFB_EN | RBUF_ACPI_EN);
237 bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);
238 }
230 239
231 /* Disable CRC Forward */240 /* Disable CRC Forward */
232 reg = bcmgenet_umac_readl(priv, UMAC_CMD);241 reg = bcmgenet_umac_readl(priv, UMAC_CMD);
233 reg &= ~CMD_CRC_FWD;242 reg &= ~CMD_CRC_FWD;
234 bcmgenet_umac_writel(priv, reg, UMAC_CMD);243 bcmgenet_umac_writel(priv, reg, UMAC_CMD);
235 priv->crc_fwd_en = 0;
236}244}
drivers/net/ethernet/cadence/macb_main.c+20−13
@@ -2821,11 +2821,13 @@ static void macb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) · 2820 unmodified lines
2821{2821{
2822 struct macb *bp = netdev_priv(netdev);2822 struct macb *bp = netdev_priv(netdev);
2823 2823
2824 wol->supported = 0;2824 if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) {
2825 wol->wolopts = 0;
2826
2827 if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET)
2828 phylink_ethtool_get_wol(bp->phylink, wol);2825 phylink_ethtool_get_wol(bp->phylink, wol);
2826 wol->supported |= WAKE_MAGIC;
2827
2828 if (bp->wol & MACB_WOL_ENABLED)
2829 wol->wolopts |= WAKE_MAGIC;
2830 }
2829}2831}
2830 2832
2831static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)2833static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
@@ -2833,9 +2835,13 @@ static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) · 1 unmodified line
2833 struct macb *bp = netdev_priv(netdev);2835 struct macb *bp = netdev_priv(netdev);
2834 int ret;2836 int ret;
2835 2837
2838 /* Pass the order to phylink layer */
2836 ret = phylink_ethtool_set_wol(bp->phylink, wol);2839 ret = phylink_ethtool_set_wol(bp->phylink, wol);
2837 if (!ret)2840 /* Don't manage WoL on MAC if handled by the PHY
2838 return 0;2841 * or if there's a failure in talking to the PHY
2842 */
2843 if (!ret || ret != -EOPNOTSUPP)
2844 return ret;
2839 2845
2840 if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) ||2846 if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) ||
2841 (wol->wolopts & ~WAKE_MAGIC))2847 (wol->wolopts & ~WAKE_MAGIC))
@@ -3730,7 +3736,7 @@ static int macb_init(struct platform_device *pdev) · 888 unmodified lines
3730 3736
3731 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {3737 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
3732 val = 0;3738 val = 0;
3733 if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)3739 if (phy_interface_mode_is_rgmii(bp->phy_interface))
3734 val = GEM_BIT(RGMII);3740 val = GEM_BIT(RGMII);
3735 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&3741 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
3736 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII))3742 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII))
@@ -4422,7 +4428,7 @@ static int macb_probe(struct platform_device *pdev) · 685 unmodified lines
4422 bp->wol = 0;4428 bp->wol = 0;
4423 if (of_get_property(np, "magic-packet", NULL))4429 if (of_get_property(np, "magic-packet", NULL))
4424 bp->wol |= MACB_WOL_HAS_MAGIC_PACKET;4430 bp->wol |= MACB_WOL_HAS_MAGIC_PACKET;
4425 device_init_wakeup(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET);4431 device_set_wakeup_capable(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET);
4426 4432
4427 spin_lock_init(&bp->lock);4433 spin_lock_init(&bp->lock);
4428 4434
@@ -4598,10 +4604,10 @@ static int __maybe_unused macb_suspend(struct device *dev) · 169 unmodified lines
4598 bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT);4604 bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT);
4599 }4605 }
4600 4606
4601 netif_carrier_off(netdev);
4602 if (bp->ptp_info)4607 if (bp->ptp_info)
4603 bp->ptp_info->ptp_remove(netdev);4608 bp->ptp_info->ptp_remove(netdev);
4604 pm_runtime_force_suspend(dev);4609 if (!device_may_wakeup(dev))
4610 pm_runtime_force_suspend(dev);
4605 4611
4606 return 0;4612 return 0;
4607}4613}
@@ -4616,7 +4622,8 @@ static int __maybe_unused macb_resume(struct device *dev) · 8 unmodified lines
4616 if (!netif_running(netdev))4622 if (!netif_running(netdev))
4617 return 0;4623 return 0;
4618 4624
4619 pm_runtime_force_resume(dev);4625 if (!device_may_wakeup(dev))
4626 pm_runtime_force_resume(dev);
4620 4627
4621 if (bp->wol & MACB_WOL_ENABLED) {4628 if (bp->wol & MACB_WOL_ENABLED) {
4622 macb_writel(bp, IDR, MACB_BIT(WOL));4629 macb_writel(bp, IDR, MACB_BIT(WOL));
@@ -4654,7 +4661,7 @@ static int __maybe_unused macb_runtime_suspend(struct device *dev) · 31 unmodified lines
4654 struct net_device *netdev = dev_get_drvdata(dev);4661 struct net_device *netdev = dev_get_drvdata(dev);
4655 struct macb *bp = netdev_priv(netdev);4662 struct macb *bp = netdev_priv(netdev);
4656 4663
4657 if (!(device_may_wakeup(&bp->dev->dev))) {4664 if (!(device_may_wakeup(dev))) {
4658 clk_disable_unprepare(bp->tx_clk);4665 clk_disable_unprepare(bp->tx_clk);
4659 clk_disable_unprepare(bp->hclk);4666 clk_disable_unprepare(bp->hclk);
4660 clk_disable_unprepare(bp->pclk);4667 clk_disable_unprepare(bp->pclk);
@@ -4670,7 +4677,7 @@ static int __maybe_unused macb_runtime_resume(struct device *dev) · 9 unmodified lines
4670 struct net_device *netdev = dev_get_drvdata(dev);4677 struct net_device *netdev = dev_get_drvdata(dev);
4671 struct macb *bp = netdev_priv(netdev);4678 struct macb *bp = netdev_priv(netdev);
4672 4679
4673 if (!(device_may_wakeup(&bp->dev->dev))) {4680 if (!(device_may_wakeup(dev))) {
4674 clk_prepare_enable(bp->pclk);4681 clk_prepare_enable(bp->pclk);
4675 clk_prepare_enable(bp->hclk);4682 clk_prepare_enable(bp->hclk);
4676 clk_prepare_enable(bp->tx_clk);4683 clk_prepare_enable(bp->tx_clk);
drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c+5−5
@@ -1112,16 +1112,16 @@ static bool is_addr_all_mask(u8 *ipmask, int family) · 1111 unmodified lines
1112 struct in_addr *addr;1112 struct in_addr *addr;
1113 1113
1114 addr = (struct in_addr *)ipmask;1114 addr = (struct in_addr *)ipmask;
1115 if (ntohl(addr->s_addr) == 0xffffffff)1115 if (addr->s_addr == htonl(0xffffffff))
1116 return true;1116 return true;
1117 } else if (family == AF_INET6) {1117 } else if (family == AF_INET6) {
1118 struct in6_addr *addr6;1118 struct in6_addr *addr6;
1119 1119
1120 addr6 = (struct in6_addr *)ipmask;1120 addr6 = (struct in6_addr *)ipmask;
1121 if (ntohl(addr6->s6_addr32[0]) == 0xffffffff &&1121 if (addr6->s6_addr32[0] == htonl(0xffffffff) &&
1122 ntohl(addr6->s6_addr32[1]) == 0xffffffff &&1122 addr6->s6_addr32[1] == htonl(0xffffffff) &&
1123 ntohl(addr6->s6_addr32[2]) == 0xffffffff &&1123 addr6->s6_addr32[2] == htonl(0xffffffff) &&
1124 ntohl(addr6->s6_addr32[3]) == 0xffffffff)1124 addr6->s6_addr32[3] == htonl(0xffffffff))
1125 return true;1125 return true;
1126 }1126 }
1127 return false;1127 return false;
drivers/net/ethernet/chelsio/cxgb4/sge.c+1−0
@@ -2938,6 +2938,7 @@ static inline int uld_send(struct adapter *adap, struct sk_buff *skb, · 2937 unmodified lines
2938 txq_info = adap->sge.uld_txq_info[tx_uld_type];2938 txq_info = adap->sge.uld_txq_info[tx_uld_type];
2939 if (unlikely(!txq_info)) {2939 if (unlikely(!txq_info)) {
2940 WARN_ON(true);2940 WARN_ON(true);
2941 kfree_skb(skb);
2941 return NET_XMIT_DROP;2942 return NET_XMIT_DROP;
2942 }2943 }
2943 2944
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+4−4
@@ -3493,7 +3493,7 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 3492 unmodified lines
3493 drv_fw = &fw_info->fw_hdr;3493 drv_fw = &fw_info->fw_hdr;
3494 3494
3495 /* Read the header of the firmware on the card */3495 /* Read the header of the firmware on the card */
3496 ret = -t4_read_flash(adap, FLASH_FW_START,3496 ret = t4_read_flash(adap, FLASH_FW_START,
3497 sizeof(*card_fw) / sizeof(uint32_t),3497 sizeof(*card_fw) / sizeof(uint32_t),
3498 (uint32_t *)card_fw, 1);3498 (uint32_t *)card_fw, 1);
3499 if (ret == 0) {3499 if (ret == 0) {
@@ -3522,8 +3522,8 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 22 unmodified lines
3522 should_install_fs_fw(adap, card_fw_usable,3522 should_install_fs_fw(adap, card_fw_usable,
3523 be32_to_cpu(fs_fw->fw_ver),3523 be32_to_cpu(fs_fw->fw_ver),
3524 be32_to_cpu(card_fw->fw_ver))) {3524 be32_to_cpu(card_fw->fw_ver))) {
3525 ret = -t4_fw_upgrade(adap, adap->mbox, fw_data,3525 ret = t4_fw_upgrade(adap, adap->mbox, fw_data,
3526 fw_size, 0);3526 fw_size, 0);
3527 if (ret != 0) {3527 if (ret != 0) {
3528 dev_err(adap->pdev_dev,3528 dev_err(adap->pdev_dev,
3529 "failed to install firmware: %d\n", ret);3529 "failed to install firmware: %d\n", ret);
@@ -3554,7 +3554,7 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 24 unmodified lines
3554 FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c),3554 FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c),
3555 FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k),3555 FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k),
3556 FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k));3556 FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k));
3557 ret = EINVAL;3557 ret = -EINVAL;
3558 goto bye;3558 goto bye;
3559 }3559 }
3560 3560
drivers/net/ethernet/cortina/gemini.c+4−1
@@ -2446,6 +2446,7 @@ static int gemini_ethernet_port_probe(struct platform_device *pdev) · 2445 unmodified lines
2446 port->reset = devm_reset_control_get_exclusive(dev, NULL);2446 port->reset = devm_reset_control_get_exclusive(dev, NULL);
2447 if (IS_ERR(port->reset)) {2447 if (IS_ERR(port->reset)) {
2448 dev_err(dev, "no reset\n");2448 dev_err(dev, "no reset\n");
2449 clk_disable_unprepare(port->pclk);
2449 return PTR_ERR(port->reset);2450 return PTR_ERR(port->reset);
2450 }2451 }
2451 reset_control_reset(port->reset);2452 reset_control_reset(port->reset);
@@ -2501,8 +2502,10 @@ static int gemini_ethernet_port_probe(struct platform_device *pdev) · 49 unmodified lines
2501 IRQF_SHARED,2502 IRQF_SHARED,
2502 port_names[port->id],2503 port_names[port->id],
2503 port);2504 port);
2504 if (ret)2505 if (ret) {
2506 clk_disable_unprepare(port->pclk);
2505 return ret;2507 return ret;
2508 }
2506 2509
2507 ret = register_netdev(netdev);2510 ret = register_netdev(netdev);
2508 if (!ret) {2511 if (!ret) {
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c+1−1
@@ -2938,7 +2938,7 @@ static int dpaa_eth_probe(struct platform_device *pdev) · 2937 unmodified lines
2938 DMA_BIT_MASK(40));2938 DMA_BIT_MASK(40));
2939 if (err) {2939 if (err) {
2940 netdev_err(net_dev, "dma_coerce_mask_and_coherent() failed\n");2940 netdev_err(net_dev, "dma_coerce_mask_and_coherent() failed\n");
2941 return err;2941 goto free_netdev;
2942 }2942 }
2943 2943
2944 /* If fsl_fm_max_frm is set to a higher value than the all-common 1500,2944 /* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+1−1
@@ -3632,7 +3632,7 @@ static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv) · 3631 unmodified lines
3632 3632
3633 dpni_dev = to_fsl_mc_device(priv->net_dev->dev.parent);3633 dpni_dev = to_fsl_mc_device(priv->net_dev->dev.parent);
3634 dpmac_dev = fsl_mc_get_endpoint(dpni_dev);3634 dpmac_dev = fsl_mc_get_endpoint(dpni_dev);
3635 if (IS_ERR(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)3635 if (IS_ERR_OR_NULL(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
3636 return 0;3636 return 0;
3637 3637
3638 if (dpaa2_mac_is_type_fixed(dpmac_dev, priv->mc_io))3638 if (dpaa2_mac_is_type_fixed(dpmac_dev, priv->mc_io))
drivers/net/ethernet/freescale/enetc/enetc.c+2−2
@@ -266,7 +266,7 @@ static irqreturn_t enetc_msix(int irq, void *data) · 265 unmodified lines
266 /* disable interrupts */266 /* disable interrupts */
267 enetc_wr_reg(v->rbier, 0);267 enetc_wr_reg(v->rbier, 0);
268 268
269 for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings)269 for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS)
270 enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0);270 enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0);
271 271
272 napi_schedule_irqoff(&v->napi);272 napi_schedule_irqoff(&v->napi);
@@ -302,7 +302,7 @@ static int enetc_poll(struct napi_struct *napi, int budget) · 29 unmodified lines
302 /* enable interrupts */302 /* enable interrupts */
303 enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE);303 enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE);
304 304
305 for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings)305 for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS)
306 enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i),306 enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i),
307 ENETC_TBIER_TXTIE);307 ENETC_TBIER_TXTIE);
308 308
drivers/net/ethernet/freescale/enetc/enetc_pf.c+1−0
@@ -906,6 +906,7 @@ static int enetc_pf_probe(struct pci_dev *pdev, · 905 unmodified lines
906 return 0;906 return 0;
907 907
908err_reg_netdev:908err_reg_netdev:
909 enetc_mdio_remove(pf);
909 enetc_of_put_phy(priv);910 enetc_of_put_phy(priv);
910 enetc_free_msix(priv);911 enetc_free_msix(priv);
911err_alloc_msix:912err_alloc_msix:
drivers/net/ethernet/freescale/fec.h+1−5
@@ -525,11 +525,6 @@ struct fec_enet_private { · 524 unmodified lines
525 unsigned int total_tx_ring_size;525 unsigned int total_tx_ring_size;
526 unsigned int total_rx_ring_size;526 unsigned int total_rx_ring_size;
527 527
528 unsigned long work_tx;
529 unsigned long work_rx;
530 unsigned long work_ts;
531 unsigned long work_mdio;
532
533 struct platform_device *pdev;528 struct platform_device *pdev;
534 529
535 int dev_id;530 int dev_id;
@@ -595,6 +590,7 @@ struct fec_enet_private { · 59 unmodified lines
595void fec_ptp_init(struct platform_device *pdev, int irq_idx);590void fec_ptp_init(struct platform_device *pdev, int irq_idx);
596void fec_ptp_stop(struct platform_device *pdev);591void fec_ptp_stop(struct platform_device *pdev);
597void fec_ptp_start_cyclecounter(struct net_device *ndev);592void fec_ptp_start_cyclecounter(struct net_device *ndev);
593void fec_ptp_disable_hwts(struct net_device *ndev);
598int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr);594int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr);
599int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr);595int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr);
600 596
drivers/net/ethernet/freescale/fec_main.c+48−69
@@ -75,8 +75,6 @@ static void fec_enet_itr_coal_init(struct net_device *ndev); · 74 unmodified lines
75 75
76#define DRIVER_NAME "fec"76#define DRIVER_NAME "fec"
77 77
78#define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0))
79
80/* Pause frame feild and FIFO threshold */78/* Pause frame feild and FIFO threshold */
81#define FEC_ENET_FCE (1 << 5)79#define FEC_ENET_FCE (1 << 5)
82#define FEC_ENET_RSEM_V 0x8480#define FEC_ENET_RSEM_V 0x84
@@ -1248,8 +1246,6 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id) · 1165 unmodified lines
1248 1246
1249 fep = netdev_priv(ndev);1247 fep = netdev_priv(ndev);
1250 1248
1251 queue_id = FEC_ENET_GET_QUQUE(queue_id);
1252
1253 txq = fep->tx_queue[queue_id];1249 txq = fep->tx_queue[queue_id];
1254 /* get next bdp of dirty_tx */1250 /* get next bdp of dirty_tx */
1255 nq = netdev_get_tx_queue(ndev, queue_id);1251 nq = netdev_get_tx_queue(ndev, queue_id);
@@ -1298,8 +1294,13 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id) · 42 unmodified lines
1298 ndev->stats.tx_bytes += skb->len;1294 ndev->stats.tx_bytes += skb->len;
1299 }1295 }
1300 1296
1301 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&1297 /* NOTE: SKBTX_IN_PROGRESS being set does not imply it's we who
1302 fep->bufdesc_ex) {1298 * are to time stamp the packet, so we still need to check time
1299 * stamping enabled flag.
1300 */
1301 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
1302 fep->hwts_tx_en) &&
1303 fep->bufdesc_ex) {
1303 struct skb_shared_hwtstamps shhwtstamps;1304 struct skb_shared_hwtstamps shhwtstamps;
1304 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;1305 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1305 1306
@@ -1340,17 +1341,14 @@ skb_done: · 34 unmodified lines
1340 writel(0, txq->bd.reg_desc_active);1341 writel(0, txq->bd.reg_desc_active);
1341}1342}
1342 1343
1343static void1344static void fec_enet_tx(struct net_device *ndev)
1344fec_enet_tx(struct net_device *ndev)
1345{1345{
1346 struct fec_enet_private *fep = netdev_priv(ndev);1346 struct fec_enet_private *fep = netdev_priv(ndev);
1347 u16 queue_id;1347 int i;
1348 /* First process class A queue, then Class B and Best Effort queue */1348
1349 for_each_set_bit(queue_id, &fep->work_tx, FEC_ENET_MAX_TX_QS) {1349 /* Make sure that AVB queues are processed first. */
1350 clear_bit(queue_id, &fep->work_tx);1350 for (i = fep->num_tx_queues - 1; i >= 0; i--)
1351 fec_enet_tx_queue(ndev, queue_id);1351 fec_enet_tx_queue(ndev, i);
1352 }
1353 return;
1354}1352}
1355 1353
1356static int1354static int
@@ -1426,7 +1424,6 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id) · 69 unmodified lines
1426#ifdef CONFIG_M532x1424#ifdef CONFIG_M532x
1427 flush_cache_all();1425 flush_cache_all();
1428#endif1426#endif
1429 queue_id = FEC_ENET_GET_QUQUE(queue_id);
1430 rxq = fep->rx_queue[queue_id];1427 rxq = fep->rx_queue[queue_id];
1431 1428
1432 /* First, grab all of the stats for the incoming packet.1429 /* First, grab all of the stats for the incoming packet.
@@ -1550,6 +1547,7 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id) · 117 unmodified lines
1550 htons(ETH_P_8021Q),1547 htons(ETH_P_8021Q),
1551 vlan_tag);1548 vlan_tag);
1552 1549
1550 skb_record_rx_queue(skb, queue_id);
1553 napi_gro_receive(&fep->napi, skb);1551 napi_gro_receive(&fep->napi, skb);
1554 1552
1555 if (is_copybreak) {1553 if (is_copybreak) {
@@ -1595,48 +1593,30 @@ rx_processing_done: · 39 unmodified lines
1595 return pkt_received;1593 return pkt_received;
1596}1594}
1597 1595
1598static int1596static int fec_enet_rx(struct net_device *ndev, int budget)
1599fec_enet_rx(struct net_device *ndev, int budget)
1600{1597{
1601 int pkt_received = 0;
1602 u16 queue_id;
1603 struct fec_enet_private *fep = netdev_priv(ndev);1598 struct fec_enet_private *fep = netdev_priv(ndev);
1599 int i, done = 0;
1604 1600
1605 for_each_set_bit(queue_id, &fep->work_rx, FEC_ENET_MAX_RX_QS) {1601 /* Make sure that AVB queues are processed first. */
1606 int ret;1602 for (i = fep->num_rx_queues - 1; i >= 0; i--)
1603 done += fec_enet_rx_queue(ndev, budget - done, i);
1607 1604
1608 ret = fec_enet_rx_queue(ndev,1605 return done;
1609 budget - pkt_received, queue_id);
1610
1611 if (ret < budget - pkt_received)
1612 clear_bit(queue_id, &fep->work_rx);
1613
1614 pkt_received += ret;
1615 }
1616 return pkt_received;
1617}1606}
1618 1607
1619static bool1608static bool fec_enet_collect_events(struct fec_enet_private *fep)
1620fec_enet_collect_events(struct fec_enet_private *fep, uint int_events)
1621{1609{
1622 if (int_events == 0)1610 uint int_events;
1623 return false;1611
1612 int_events = readl(fep->hwp + FEC_IEVENT);
1624 1613
1625 if (int_events & FEC_ENET_RXF_0)1614 /* Don't clear MDIO events, we poll for those */
1626 fep->work_rx |= (1 << 2);1615 int_events &= ~FEC_ENET_MII;
1627 if (int_events & FEC_ENET_RXF_1)
1628 fep->work_rx |= (1 << 0);
1629 if (int_events & FEC_ENET_RXF_2)
1630 fep->work_rx |= (1 << 1);
1631 1616
1632 if (int_events & FEC_ENET_TXF_0)1617 writel(int_events, fep->hwp + FEC_IEVENT);
1633 fep->work_tx |= (1 << 2);
1634 if (int_events & FEC_ENET_TXF_1)
1635 fep->work_tx |= (1 << 0);
1636 if (int_events & FEC_ENET_TXF_2)
1637 fep->work_tx |= (1 << 1);
1638 1618
1639 return true;1619 return int_events != 0;
1640}1620}
1641 1621
1642static irqreturn_t1622static irqreturn_t
@@ -1644,18 +1624,9 @@ fec_enet_interrupt(int irq, void *dev_id) · 1 unmodified line
1644{1624{
1645 struct net_device *ndev = dev_id;1625 struct net_device *ndev = dev_id;
1646 struct fec_enet_private *fep = netdev_priv(ndev);1626 struct fec_enet_private *fep = netdev_priv(ndev);
1647 uint int_events;
1648 irqreturn_t ret = IRQ_NONE;1627 irqreturn_t ret = IRQ_NONE;
1649 1628
1650 int_events = readl(fep->hwp + FEC_IEVENT);1629 if (fec_enet_collect_events(fep) && fep->link) {
1651
1652 /* Don't clear MDIO events, we poll for those */
1653 int_events &= ~FEC_ENET_MII;
1654
1655 writel(int_events, fep->hwp + FEC_IEVENT);
1656 fec_enet_collect_events(fep, int_events);
1657
1658 if ((fep->work_tx || fep->work_rx) && fep->link) {
1659 ret = IRQ_HANDLED;1630 ret = IRQ_HANDLED;
1660 1631
1661 if (napi_schedule_prep(&fep->napi)) {1632 if (napi_schedule_prep(&fep->napi)) {
@@ -1672,17 +1643,19 @@ static int fec_enet_rx_napi(struct napi_struct *napi, int budget) · 10 unmodified lines
1672{1643{
1673 struct net_device *ndev = napi->dev;1644 struct net_device *ndev = napi->dev;
1674 struct fec_enet_private *fep = netdev_priv(ndev);1645 struct fec_enet_private *fep = netdev_priv(ndev);
1675 int pkts;1646 int done = 0;
1676 1647
1677 pkts = fec_enet_rx(ndev, budget);1648 do {
1678 1649 done += fec_enet_rx(ndev, budget - done);
1679 fec_enet_tx(ndev);1650 fec_enet_tx(ndev);
1651 } while ((done < budget) && fec_enet_collect_events(fep));
1680 1652
1681 if (pkts < budget) {1653 if (done < budget) {
1682 napi_complete_done(napi, pkts);1654 napi_complete_done(napi, done);
1683 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);1655 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1684 }1656 }
1685 return pkts;1657
1658 return done;
1686}1659}
1687 1660
1688/* ------------------------------------------------------------------------- */1661/* ------------------------------------------------------------------------- */
@@ -2755,10 +2728,16 @@ static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) · 1066 unmodified lines
2755 return -ENODEV;2728 return -ENODEV;
2756 2729
2757 if (fep->bufdesc_ex) {2730 if (fep->bufdesc_ex) {
2758 if (cmd == SIOCSHWTSTAMP)2731 bool use_fec_hwts = !phy_has_hwtstamp(phydev);
2759 return fec_ptp_set(ndev, rq);2732
2760 if (cmd == SIOCGHWTSTAMP)2733 if (cmd == SIOCSHWTSTAMP) {
2761 return fec_ptp_get(ndev, rq);2734 if (use_fec_hwts)
2735 return fec_ptp_set(ndev, rq);
2736 fec_ptp_disable_hwts(ndev);
2737 } else if (cmd == SIOCGHWTSTAMP) {
2738 if (use_fec_hwts)
2739 return fec_ptp_get(ndev, rq);
2740 }
2762 }2741 }
2763 2742
2764 return phy_mii_ioctl(phydev, rq, cmd);2743 return phy_mii_ioctl(phydev, rq, cmd);
drivers/net/ethernet/freescale/fec_ptp.c+12−0
@@ -452,6 +452,18 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp, · 451 unmodified lines
452 return -EOPNOTSUPP;452 return -EOPNOTSUPP;
453}453}
454 454
455/**
456 * fec_ptp_disable_hwts - disable hardware time stamping
457 * @ndev: pointer to net_device
458 */
459void fec_ptp_disable_hwts(struct net_device *ndev)
460{
461 struct fec_enet_private *fep = netdev_priv(ndev);
462
463 fep->hwts_tx_en = 0;
464 fep->hwts_rx_en = 0;
465}
466
455int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr)467int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr)
456{468{
457 struct fec_enet_private *fep = netdev_priv(ndev);469 struct fec_enet_private *fep = netdev_priv(ndev);
drivers/net/ethernet/freescale/gianfar.c+5−1
@@ -779,8 +779,12 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) · 778 unmodified lines
779 779
780 mac_addr = of_get_mac_address(np);780 mac_addr = of_get_mac_address(np);
781 781
782 if (!IS_ERR(mac_addr))782 if (!IS_ERR(mac_addr)) {
783 ether_addr_copy(dev->dev_addr, mac_addr);783 ether_addr_copy(dev->dev_addr, mac_addr);
784 } else {
785 eth_hw_addr_random(dev);
786 dev_info(&ofdev->dev, "Using random MAC address: %pM\n", dev->dev_addr);
787 }
784 788
785 if (model && !strcasecmp(model, "TSEC"))789 if (model && !strcasecmp(model, "TSEC"))
786 priv->device_flags |= FSL_GIANFAR_DEV_HAS_GIGABIT |790 priv->device_flags |= FSL_GIANFAR_DEV_HAS_GIGABIT |
drivers/net/ethernet/hisilicon/hns3/hnae3.h+1−0
@@ -77,6 +77,7 @@ · 76 unmodified lines
77 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)77 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
78 78
79enum hns_desc_type {79enum hns_desc_type {
80 DESC_TYPE_UNKNOWN,
80 DESC_TYPE_SKB,81 DESC_TYPE_SKB,
81 DESC_TYPE_FRAGLIST_SKB,82 DESC_TYPE_FRAGLIST_SKB,
82 DESC_TYPE_PAGE,83 DESC_TYPE_PAGE,
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+20−25
@@ -1093,16 +1093,8 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 1092 unmodified lines
1093 int k, sizeoflast;1093 int k, sizeoflast;
1094 dma_addr_t dma;1094 dma_addr_t dma;
1095 1095
1096 if (type == DESC_TYPE_SKB) {1096 if (type == DESC_TYPE_FRAGLIST_SKB ||
1097 struct sk_buff *skb = (struct sk_buff *)priv;1097 type == DESC_TYPE_SKB) {
1098 int ret;
1099
1100 ret = hns3_fill_skb_desc(ring, skb, desc);
1101 if (unlikely(ret < 0))
1102 return ret;
1103
1104 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
1105 } else if (type == DESC_TYPE_FRAGLIST_SKB) {
1106 struct sk_buff *skb = (struct sk_buff *)priv;1098 struct sk_buff *skb = (struct sk_buff *)priv;
1107 1099
1108 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);1100 dma = dma_map_single(dev, skb->data, size, DMA_TO_DEVICE);
@@ -1118,12 +1110,12 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 9 unmodified lines
1118 return -ENOMEM;1110 return -ENOMEM;
1119 }1111 }
1120 1112
1113 desc_cb->priv = priv;
1121 desc_cb->length = size;1114 desc_cb->length = size;
1115 desc_cb->dma = dma;
1116 desc_cb->type = type;
1122 1117
1123 if (likely(size <= HNS3_MAX_BD_SIZE)) {1118 if (likely(size <= HNS3_MAX_BD_SIZE)) {
1124 desc_cb->priv = priv;
1125 desc_cb->dma = dma;
1126 desc_cb->type = type;
1127 desc->addr = cpu_to_le64(dma);1119 desc->addr = cpu_to_le64(dma);
1128 desc->tx.send_size = cpu_to_le16(size);1120 desc->tx.send_size = cpu_to_le16(size);
1129 desc->tx.bdtp_fe_sc_vld_ra_ri =1121 desc->tx.bdtp_fe_sc_vld_ra_ri =
@@ -1135,18 +1127,11 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 5 unmodified lines
1135 }1127 }
1136 1128
1137 frag_buf_num = hns3_tx_bd_count(size);1129 frag_buf_num = hns3_tx_bd_count(size);
1138 sizeoflast = size & HNS3_TX_LAST_SIZE_M;1130 sizeoflast = size % HNS3_MAX_BD_SIZE;
1139 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;1131 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
1140 1132
1141 /* When frag size is bigger than hardware limit, split this frag */1133 /* When frag size is bigger than hardware limit, split this frag */
1142 for (k = 0; k < frag_buf_num; k++) {1134 for (k = 0; k < frag_buf_num; k++) {
1143 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1144 desc_cb->priv = priv;
1145 desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1146 desc_cb->type = ((type == DESC_TYPE_FRAGLIST_SKB ||
1147 type == DESC_TYPE_SKB) && !k) ?
1148 type : DESC_TYPE_PAGE;
1149
1150 /* now, fill the descriptor */1135 /* now, fill the descriptor */
1151 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);1136 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
1152 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?1137 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
@@ -1158,7 +1143,6 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 5 unmodified lines
1158 /* move ring pointer to next */1143 /* move ring pointer to next */
1159 ring_ptr_move_fw(ring, next_to_use);1144 ring_ptr_move_fw(ring, next_to_use);
1160 1145
1161 desc_cb = &ring->desc_cb[ring->next_to_use];
1162 desc = &ring->desc[ring->next_to_use];1146 desc = &ring->desc[ring->next_to_use];
1163 }1147 }
1164 1148
@@ -1346,6 +1330,10 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 181 unmodified lines
1346 unsigned int i;1330 unsigned int i;
1347 1331
1348 for (i = 0; i < ring->desc_num; i++) {1332 for (i = 0; i < ring->desc_num; i++) {
1333 struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1334
1335 memset(desc, 0, sizeof(*desc));
1336
1349 /* check if this is where we started */1337 /* check if this is where we started */
1350 if (ring->next_to_use == next_to_use_orig)1338 if (ring->next_to_use == next_to_use_orig)
1351 break;1339 break;
@@ -1353,6 +1341,9 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 1 unmodified line
1353 /* rollback one */1341 /* rollback one */
1354 ring_ptr_move_bw(ring, next_to_use);1342 ring_ptr_move_bw(ring, next_to_use);
1355 1343
1344 if (!ring->desc_cb[ring->next_to_use].dma)
1345 continue;
1346
1356 /* unmap the descriptor dma address */1347 /* unmap the descriptor dma address */
1357 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB ||1348 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB ||
1358 ring->desc_cb[ring->next_to_use].type ==1349 ring->desc_cb[ring->next_to_use].type ==
@@ -1369,6 +1360,7 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 10 unmodified lines
1369 1360
1370 ring->desc_cb[ring->next_to_use].length = 0;1361 ring->desc_cb[ring->next_to_use].length = 0;
1371 ring->desc_cb[ring->next_to_use].dma = 0;1362 ring->desc_cb[ring->next_to_use].dma = 0;
1363 ring->desc_cb[ring->next_to_use].type = DESC_TYPE_UNKNOWN;
1372 }1364 }
1373}1365}
1374 1366
@@ -1439,6 +1431,10 @@ netdev_tx_t hns3_nic_net_xmit(struct sk_buff *skb, struct net_device *netdev) · 64 unmodified lines
1439 1431
1440 next_to_use_head = ring->next_to_use;1432 next_to_use_head = ring->next_to_use;
1441 1433
1434 ret = hns3_fill_skb_desc(ring, skb, &ring->desc[ring->next_to_use]);
1435 if (unlikely(ret < 0))
1436 goto fill_err;
1437
1442 ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);1438 ret = hns3_fill_skb_to_desc(ring, skb, DESC_TYPE_SKB);
1443 if (unlikely(ret < 0))1439 if (unlikely(ret < 0))
1444 goto fill_err;1440 goto fill_err;
@@ -4127,9 +4123,8 @@ static void hns3_client_uninit(struct hnae3_handle *handle, bool reset) · 2682 unmodified lines
4127 4123
4128 hns3_put_ring_config(priv);4124 hns3_put_ring_config(priv);
4129 4125
4130 hns3_dbg_uninit(handle);
4131
4132out_netdev_free:4126out_netdev_free:
4127 hns3_dbg_uninit(handle);
4133 free_netdev(netdev);4128 free_netdev(netdev);
4134}4129}
4135 4130
@@ -4141,8 +4136,8 @@ static void hns3_link_status_change(struct hnae3_handle *handle, bool linkup) · 5 unmodified lines
4141 return;4136 return;
4142 4137
4143 if (linkup) {4138 if (linkup) {
4144 netif_carrier_on(netdev);
4145 netif_tx_wake_all_queues(netdev);4139 netif_tx_wake_all_queues(netdev);
4140 netif_carrier_on(netdev);
4146 if (netif_msg_link(handle))4141 if (netif_msg_link(handle))
4147 netdev_info(netdev, "link up\n");4142 netdev_info(netdev, "link up\n");
4148 } else {4143 } else {
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h+0−2
@@ -165,8 +165,6 @@ enum hns3_nic_state { · 164 unmodified lines
165#define HNS3_TXD_MSS_S 0165#define HNS3_TXD_MSS_S 0
166#define HNS3_TXD_MSS_M (0x3fff << HNS3_TXD_MSS_S)166#define HNS3_TXD_MSS_M (0x3fff << HNS3_TXD_MSS_S)
167 167
168#define HNS3_TX_LAST_SIZE_M 0xffff
169
170#define HNS3_VECTOR_TX_IRQ BIT_ULL(0)168#define HNS3_VECTOR_TX_IRQ BIT_ULL(0)
171#define HNS3_VECTOR_RX_IRQ BIT_ULL(1)169#define HNS3_VECTOR_RX_IRQ BIT_ULL(1)
172 170
drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c+6−3
@@ -180,18 +180,21 @@ static void hns3_lb_check_skb_data(struct hns3_enet_ring *ring, · 179 unmodified lines
180{180{
181 struct hns3_enet_tqp_vector *tqp_vector = ring->tqp_vector;181 struct hns3_enet_tqp_vector *tqp_vector = ring->tqp_vector;
182 unsigned char *packet = skb->data;182 unsigned char *packet = skb->data;
183 u32 len = skb_headlen(skb);
183 u32 i;184 u32 i;
184 185
185 for (i = 0; i < skb->len; i++)186 len = min_t(u32, len, HNS3_NIC_LB_TEST_PACKET_SIZE);
187
188 for (i = 0; i < len; i++)
186 if (packet[i] != (unsigned char)(i & 0xff))189 if (packet[i] != (unsigned char)(i & 0xff))
187 break;190 break;
188 191
189 /* The packet is correctly received */192 /* The packet is correctly received */
190 if (i == skb->len)193 if (i == HNS3_NIC_LB_TEST_PACKET_SIZE)
191 tqp_vector->rx_group.total_packets++;194 tqp_vector->rx_group.total_packets++;
192 else195 else
193 print_hex_dump(KERN_ERR, "selftest:", DUMP_PREFIX_OFFSET, 16, 1,196 print_hex_dump(KERN_ERR, "selftest:", DUMP_PREFIX_OFFSET, 16, 1,
194 skb->data, skb->len, true);197 skb->data, len, true);
195 198
196 dev_kfree_skb_any(skb);199 dev_kfree_skb_any(skb);
197}200}
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+42−44
@@ -2673,11 +2673,10 @@ void hclge_task_schedule(struct hclge_dev *hdev, unsigned long delay_time) · 2672 unmodified lines
2673 delay_time);2673 delay_time);
2674}2674}
2675 2675
2676static int hclge_get_mac_link_status(struct hclge_dev *hdev)2676static int hclge_get_mac_link_status(struct hclge_dev *hdev, int *link_status)
2677{2677{
2678 struct hclge_link_status_cmd *req;2678 struct hclge_link_status_cmd *req;
2679 struct hclge_desc desc;2679 struct hclge_desc desc;
2680 int link_status;
2681 int ret;2680 int ret;
2682 2681
2683 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QUERY_LINK_STATUS, true);2682 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QUERY_LINK_STATUS, true);
@@ -2689,33 +2688,25 @@ static int hclge_get_mac_link_status(struct hclge_dev *hdev) · 5 unmodified lines
2689 }2688 }
2690 2689
2691 req = (struct hclge_link_status_cmd *)desc.data;2690 req = (struct hclge_link_status_cmd *)desc.data;
2692 link_status = req->status & HCLGE_LINK_STATUS_UP_M;2691 *link_status = (req->status & HCLGE_LINK_STATUS_UP_M) > 0 ?
2692 HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;
2693 2693
2694 return !!link_status;2694 return 0;
2695}2695}
2696 2696
2697static int hclge_get_mac_phy_link(struct hclge_dev *hdev)2697static int hclge_get_mac_phy_link(struct hclge_dev *hdev, int *link_status)
2698{2698{
2699 unsigned int mac_state;2699 struct phy_device *phydev = hdev->hw.mac.phydev;
2700 int link_stat;2700
2701 *link_status = HCLGE_LINK_STATUS_DOWN;
2701 2702
2702 if (test_bit(HCLGE_STATE_DOWN, &hdev->state))2703 if (test_bit(HCLGE_STATE_DOWN, &hdev->state))
2703 return 0;2704 return 0;
2704 2705
2705 mac_state = hclge_get_mac_link_status(hdev);2706 if (phydev && (phydev->state != PHY_RUNNING || !phydev->link))
2706 2707 return 0;
2707 if (hdev->hw.mac.phydev) {
2708 if (hdev->hw.mac.phydev->state == PHY_RUNNING)
2709 link_stat = mac_state &
2710 hdev->hw.mac.phydev->link;
2711 else
2712 link_stat = 0;
2713
2714 } else {
2715 link_stat = mac_state;
2716 }
2717 2708
2718 return !!link_stat;2709 return hclge_get_mac_link_status(hdev, link_status);
2719}2710}
2720 2711
2721static void hclge_update_link_status(struct hclge_dev *hdev)2712static void hclge_update_link_status(struct hclge_dev *hdev)
@@ -2725,6 +2716,7 @@ static void hclge_update_link_status(struct hclge_dev *hdev) · 3 unmodified lines
2725 struct hnae3_handle *rhandle;2716 struct hnae3_handle *rhandle;
2726 struct hnae3_handle *handle;2717 struct hnae3_handle *handle;
2727 int state;2718 int state;
2719 int ret;
2728 int i;2720 int i;
2729 2721
2730 if (!client)2722 if (!client)
@@ -2733,7 +2725,12 @@ static void hclge_update_link_status(struct hclge_dev *hdev) · 2 unmodified lines
2733 if (test_and_set_bit(HCLGE_STATE_LINK_UPDATING, &hdev->state))2725 if (test_and_set_bit(HCLGE_STATE_LINK_UPDATING, &hdev->state))
2734 return;2726 return;
2735 2727
2736 state = hclge_get_mac_phy_link(hdev);2728 ret = hclge_get_mac_phy_link(hdev, &state);
2729 if (ret) {
2730 clear_bit(HCLGE_STATE_LINK_UPDATING, &hdev->state);
2731 return;
2732 }
2733
2737 if (state != hdev->hw.mac.link) {2734 if (state != hdev->hw.mac.link) {
2738 for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {2735 for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {
2739 handle = &hdev->vport[i].nic;2736 handle = &hdev->vport[i].nic;
@@ -5809,9 +5806,9 @@ static int hclge_add_fd_entry(struct hnae3_handle *handle, · 3069 unmodified lines
5809 /* to avoid rule conflict, when user configure rule by ethtool,5806 /* to avoid rule conflict, when user configure rule by ethtool,
5810 * we need to clear all arfs rules5807 * we need to clear all arfs rules
5811 */5808 */
5809 spin_lock_bh(&hdev->fd_rule_lock);
5812 hclge_clear_arfs_rules(handle);5810 hclge_clear_arfs_rules(handle);
5813 5811
5814 spin_lock_bh(&hdev->fd_rule_lock);
5815 ret = hclge_fd_config_rule(hdev, rule);5812 ret = hclge_fd_config_rule(hdev, rule);
5816 5813
5817 spin_unlock_bh(&hdev->fd_rule_lock);5814 spin_unlock_bh(&hdev->fd_rule_lock);
@@ -5854,6 +5851,7 @@ static int hclge_del_fd_entry(struct hnae3_handle *handle, · 36 unmodified lines
5854 return ret;5851 return ret;
5855}5852}
5856 5853
5854/* make sure being called after lock up with fd_rule_lock */
5857static void hclge_del_all_fd_entries(struct hnae3_handle *handle,5855static void hclge_del_all_fd_entries(struct hnae3_handle *handle,
5858 bool clear_list)5856 bool clear_list)
5859{5857{
@@ -5866,7 +5864,6 @@ static void hclge_del_all_fd_entries(struct hnae3_handle *handle, · 6 unmodified lines
5866 if (!hnae3_dev_fd_supported(hdev))5864 if (!hnae3_dev_fd_supported(hdev))
5867 return;5865 return;
5868 5866
5869 spin_lock_bh(&hdev->fd_rule_lock);
5870 for_each_set_bit(location, hdev->fd_bmap,5867 for_each_set_bit(location, hdev->fd_bmap,
5871 hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1])5868 hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1])
5872 hclge_fd_tcam_config(hdev, HCLGE_FD_STAGE_1, true, location,5869 hclge_fd_tcam_config(hdev, HCLGE_FD_STAGE_1, true, location,
@@ -5883,8 +5880,6 @@ static void hclge_del_all_fd_entries(struct hnae3_handle *handle, · 10 unmodified lines
5883 bitmap_zero(hdev->fd_bmap,5880 bitmap_zero(hdev->fd_bmap,
5884 hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]);5881 hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]);
5885 }5882 }
5886
5887 spin_unlock_bh(&hdev->fd_rule_lock);
5888}5883}
5889 5884
5890static int hclge_restore_fd_entries(struct hnae3_handle *handle)5885static int hclge_restore_fd_entries(struct hnae3_handle *handle)
@@ -6266,7 +6261,7 @@ static int hclge_add_fd_entry_by_arfs(struct hnae3_handle *handle, u16 queue_id, · 375 unmodified lines
6266 u16 flow_id, struct flow_keys *fkeys)6261 u16 flow_id, struct flow_keys *fkeys)
6267{6262{
6268 struct hclge_vport *vport = hclge_get_vport(handle);6263 struct hclge_vport *vport = hclge_get_vport(handle);
6269 struct hclge_fd_rule_tuples new_tuples;6264 struct hclge_fd_rule_tuples new_tuples = {};
6270 struct hclge_dev *hdev = vport->back;6265 struct hclge_dev *hdev = vport->back;
6271 struct hclge_fd_rule *rule;6266 struct hclge_fd_rule *rule;
6272 u16 tmp_queue_id;6267 u16 tmp_queue_id;
@@ -6276,19 +6271,17 @@ static int hclge_add_fd_entry_by_arfs(struct hnae3_handle *handle, u16 queue_id, · 3 unmodified lines
6276 if (!hnae3_dev_fd_supported(hdev))6271 if (!hnae3_dev_fd_supported(hdev))
6277 return -EOPNOTSUPP;6272 return -EOPNOTSUPP;
6278 6273
6279 memset(&new_tuples, 0, sizeof(new_tuples));
6280 hclge_fd_get_flow_tuples(fkeys, &new_tuples);
6281
6282 spin_lock_bh(&hdev->fd_rule_lock);
6283
6284 /* when there is already fd rule existed add by user,6274 /* when there is already fd rule existed add by user,
6285 * arfs should not work6275 * arfs should not work
6286 */6276 */
6277 spin_lock_bh(&hdev->fd_rule_lock);
6287 if (hdev->fd_active_type == HCLGE_FD_EP_ACTIVE) {6278 if (hdev->fd_active_type == HCLGE_FD_EP_ACTIVE) {
6288 spin_unlock_bh(&hdev->fd_rule_lock);6279 spin_unlock_bh(&hdev->fd_rule_lock);
6289 return -EOPNOTSUPP;6280 return -EOPNOTSUPP;
6290 }6281 }
6291 6282
6283 hclge_fd_get_flow_tuples(fkeys, &new_tuples);
6284
6292 /* check is there flow director filter existed for this flow,6285 /* check is there flow director filter existed for this flow,
6293 * if not, create a new filter for it;6286 * if not, create a new filter for it;
6294 * if filter exist with different queue id, modify the filter;6287 * if filter exist with different queue id, modify the filter;
@@ -6371,6 +6364,7 @@ static void hclge_rfs_filter_expire(struct hclge_dev *hdev) · 76 unmodified lines
6371#endif6364#endif
6372}6365}
6373 6366
6367/* make sure being called after lock up with fd_rule_lock */
6374static void hclge_clear_arfs_rules(struct hnae3_handle *handle)6368static void hclge_clear_arfs_rules(struct hnae3_handle *handle)
6375{6369{
6376#ifdef CONFIG_RFS_ACCEL6370#ifdef CONFIG_RFS_ACCEL
@@ -6423,10 +6417,14 @@ static void hclge_enable_fd(struct hnae3_handle *handle, bool enable) · 46 unmodified lines
6423 6417
6424 hdev->fd_en = enable;6418 hdev->fd_en = enable;
6425 clear = hdev->fd_active_type == HCLGE_FD_ARFS_ACTIVE;6419 clear = hdev->fd_active_type == HCLGE_FD_ARFS_ACTIVE;
6426 if (!enable)6420
6421 if (!enable) {
6422 spin_lock_bh(&hdev->fd_rule_lock);
6427 hclge_del_all_fd_entries(handle, clear);6423 hclge_del_all_fd_entries(handle, clear);
6428 else6424 spin_unlock_bh(&hdev->fd_rule_lock);
6425 } else {
6429 hclge_restore_fd_entries(handle);6426 hclge_restore_fd_entries(handle);
6427 }
6430}6428}
6431 6429
6432static void hclge_cfg_mac_mode(struct hclge_dev *hdev, bool enable)6430static void hclge_cfg_mac_mode(struct hclge_dev *hdev, bool enable)
@@ -6524,14 +6522,15 @@ static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret) · 91 unmodified lines
6524{6522{
6525#define HCLGE_MAC_LINK_STATUS_NUM 1006523#define HCLGE_MAC_LINK_STATUS_NUM 100
6526 6524
6525 int link_status;
6527 int i = 0;6526 int i = 0;
6528 int ret;6527 int ret;
6529 6528
6530 do {6529 do {
6531 ret = hclge_get_mac_link_status(hdev);6530 ret = hclge_get_mac_link_status(hdev, &link_status);
6532 if (ret < 0)6531 if (ret)
6533 return ret;6532 return ret;
6534 else if (ret == link_ret)6533 if (link_status == link_ret)
6535 return 0;6534 return 0;
6536 6535
6537 msleep(HCLGE_LINK_STATUS_MS);6536 msleep(HCLGE_LINK_STATUS_MS);
@@ -6542,9 +6541,6 @@ static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret) · 4 unmodified lines
6542static int hclge_mac_phy_link_status_wait(struct hclge_dev *hdev, bool en,6541static int hclge_mac_phy_link_status_wait(struct hclge_dev *hdev, bool en,
6543 bool is_phy)6542 bool is_phy)
6544{6543{
6545#define HCLGE_LINK_STATUS_DOWN 0
6546#define HCLGE_LINK_STATUS_UP 1
6547
6548 int link_ret;6544 int link_ret;
6549 6545
6550 link_ret = en ? HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;6546 link_ret = en ? HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;
@@ -6891,8 +6887,9 @@ static void hclge_ae_stop(struct hnae3_handle *handle) · 340 unmodified lines
6891 int i;6887 int i;
6892 6888
6893 set_bit(HCLGE_STATE_DOWN, &hdev->state);6889 set_bit(HCLGE_STATE_DOWN, &hdev->state);
6894 6890 spin_lock_bh(&hdev->fd_rule_lock);
6895 hclge_clear_arfs_rules(handle);6891 hclge_clear_arfs_rules(handle);
6892 spin_unlock_bh(&hdev->fd_rule_lock);
6896 6893
6897 /* If it is not PF reset, the firmware will disable the MAC,6894 /* If it is not PF reset, the firmware will disable the MAC,
6898 * so it only need to stop phy here.6895 * so it only need to stop phy here.
@@ -9045,11 +9042,12 @@ int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, · 2146 unmodified lines
9045 bool writen_to_tbl = false;9042 bool writen_to_tbl = false;
9046 int ret = 0;9043 int ret = 0;
9047 9044
9048 /* When device is resetting, firmware is unable to handle9045 /* When device is resetting or reset failed, firmware is unable to
9049 * mailbox. Just record the vlan id, and remove it after9046 * handle mailbox. Just record the vlan id, and remove it after
9050 * reset finished.9047 * reset finished.
9051 */9048 */
9052 if (test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) && is_kill) {9049 if ((test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state) ||
9050 test_bit(HCLGE_STATE_RST_FAIL, &hdev->state)) && is_kill) {
9053 set_bit(vlan_id, vport->vlan_del_fail_bmap);9051 set_bit(vlan_id, vport->vlan_del_fail_bmap);
9054 return -EBUSY;9052 return -EBUSY;
9055 }9053 }
@@ -9859,7 +9857,7 @@ retry: · 803 unmodified lines
9859 set_bit(HCLGE_STATE_RST_HANDLING, &hdev->state);9857 set_bit(HCLGE_STATE_RST_HANDLING, &hdev->state);
9860 hdev->reset_type = HNAE3_FLR_RESET;9858 hdev->reset_type = HNAE3_FLR_RESET;
9861 ret = hclge_reset_prepare(hdev);9859 ret = hclge_reset_prepare(hdev);
9862 if (ret) {9860 if (ret || hdev->reset_pending) {
9863 dev_err(&hdev->pdev->dev, "fail to prepare FLR, ret=%d\n",9861 dev_err(&hdev->pdev->dev, "fail to prepare FLR, ret=%d\n",
9864 ret);9862 ret);
9865 if (hdev->reset_pending ||9863 if (hdev->reset_pending ||
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h+3−0
@@ -317,6 +317,9 @@ enum hclge_link_fail_code { · 316 unmodified lines
317 HCLGE_LF_XSFP_ABSENT,317 HCLGE_LF_XSFP_ABSENT,
318};318};
319 319
320#define HCLGE_LINK_STATUS_DOWN 0
321#define HCLGE_LINK_STATUS_UP 1
322
320#define HCLGE_PG_NUM 4323#define HCLGE_PG_NUM 4
321#define HCLGE_SCH_MODE_SP 0324#define HCLGE_SCH_MODE_SP 0
322#define HCLGE_SCH_MODE_DWRR 1325#define HCLGE_SCH_MODE_DWRR 1
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+31−12
@@ -1592,11 +1592,12 @@ static int hclgevf_set_vlan_filter(struct hnae3_handle *handle, · 1591 unmodified lines
1592 if (proto != htons(ETH_P_8021Q))1592 if (proto != htons(ETH_P_8021Q))
1593 return -EPROTONOSUPPORT;1593 return -EPROTONOSUPPORT;
1594 1594
1595 /* When device is resetting, firmware is unable to handle1595 /* When device is resetting or reset failed, firmware is unable to
1596 * mailbox. Just record the vlan id, and remove it after1596 * handle mailbox. Just record the vlan id, and remove it after
1597 * reset finished.1597 * reset finished.
1598 */1598 */
1599 if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) && is_kill) {1599 if ((test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) ||
1600 test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) && is_kill) {
1600 set_bit(vlan_id, hdev->vlan_del_fail_bmap);1601 set_bit(vlan_id, hdev->vlan_del_fail_bmap);
1601 return -EBUSY;1602 return -EBUSY;
1602 }1603 }
@@ -1793,6 +1794,11 @@ static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) · 190 unmodified lines
1793 if (hdev->reset_type == HNAE3_VF_FUNC_RESET) {1794 if (hdev->reset_type == HNAE3_VF_FUNC_RESET) {
1794 hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0);1795 hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0);
1795 ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0);1796 ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0);
1797 if (ret) {
1798 dev_err(&hdev->pdev->dev,
1799 "failed to assert VF reset, ret = %d\n", ret);
1800 return ret;
1801 }
1796 hdev->rst_stats.vf_func_rst_cnt++;1802 hdev->rst_stats.vf_func_rst_cnt++;
1797 }1803 }
1798 1804
@@ -3434,23 +3440,36 @@ void hclgevf_update_port_base_vlan_info(struct hclgevf_dev *hdev, u16 state, · 1635 unmodified lines
3434{3440{
3435 struct hnae3_handle *nic = &hdev->nic;3441 struct hnae3_handle *nic = &hdev->nic;
3436 struct hclge_vf_to_pf_msg send_msg;3442 struct hclge_vf_to_pf_msg send_msg;
3443 int ret;
3437 3444
3438 rtnl_lock();3445 rtnl_lock();
3439 hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT);3446
3440 rtnl_unlock();3447 if (test_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state) ||
3448 test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state)) {
3449 dev_warn(&hdev->pdev->dev,
3450 "is resetting when updating port based vlan info\n");
3451 rtnl_unlock();
3452 return;
3453 }
3454
3455 ret = hclgevf_notify_client(hdev, HNAE3_DOWN_CLIENT);
3456 if (ret) {
3457 rtnl_unlock();
3458 return;
3459 }
3441 3460
3442 /* send msg to PF and wait update port based vlan info */3461 /* send msg to PF and wait update port based vlan info */
3443 hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN,3462 hclgevf_build_send_msg(&send_msg, HCLGE_MBX_SET_VLAN,
3444 HCLGE_MBX_PORT_BASE_VLAN_CFG);3463 HCLGE_MBX_PORT_BASE_VLAN_CFG);
3445 memcpy(send_msg.data, port_base_vlan_info, data_size);3464 memcpy(send_msg.data, port_base_vlan_info, data_size);
3446 hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0);3465 ret = hclgevf_send_mbx_msg(hdev, &send_msg, false, NULL, 0);
3447 3466 if (!ret) {
3448 if (state == HNAE3_PORT_BASE_VLAN_DISABLE)3467 if (state == HNAE3_PORT_BASE_VLAN_DISABLE)
3449 nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_DISABLE;3468 nic->port_base_vlan_state = state;
3450 else3469 else
3451 nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE;3470 nic->port_base_vlan_state = HNAE3_PORT_BASE_VLAN_ENABLE;
3471 }
3452 3472
3453 rtnl_lock();
3454 hclgevf_notify_client(hdev, HNAE3_UP_CLIENT);3473 hclgevf_notify_client(hdev, HNAE3_UP_CLIENT);
3455 rtnl_unlock();3474 rtnl_unlock();
3456}3475}
drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c+2−0
@@ -814,6 +814,8 @@ err_aeqs_init: · 813 unmodified lines
814err_init_msix:814err_init_msix:
815err_pfhwdev_alloc:815err_pfhwdev_alloc:
816 hinic_free_hwif(hwif);816 hinic_free_hwif(hwif);
817 if (err > 0)
818 err = -EIO;
817 return ERR_PTR(err);819 return ERR_PTR(err);
818}820}
819 821
drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.c+72−19
@@ -370,48 +370,89 @@ int hinic_msg_to_mgmt(struct hinic_pf_to_mgmt *pf_to_mgmt, · 369 unmodified lines
370 MSG_NOT_RESP, timeout);370 MSG_NOT_RESP, timeout);
371}371}
372 372
373/**373static void recv_mgmt_msg_work_handler(struct work_struct *work)
374 * mgmt_recv_msg_handler - handler for message from mgmt cpu
375 * @pf_to_mgmt: PF to MGMT channel
376 * @recv_msg: received message details
377 **/
378static void mgmt_recv_msg_handler(struct hinic_pf_to_mgmt *pf_to_mgmt,
379 struct hinic_recv_msg *recv_msg)
380{374{
381 struct hinic_hwif *hwif = pf_to_mgmt->hwif;375 struct hinic_mgmt_msg_handle_work *mgmt_work =
382 struct pci_dev *pdev = hwif->pdev;376 container_of(work, struct hinic_mgmt_msg_handle_work, work);
383 u8 *buf_out = recv_msg->buf_out;377 struct hinic_pf_to_mgmt *pf_to_mgmt = mgmt_work->pf_to_mgmt;
378 struct pci_dev *pdev = pf_to_mgmt->hwif->pdev;
379 u8 *buf_out = pf_to_mgmt->mgmt_ack_buf;
384 struct hinic_mgmt_cb *mgmt_cb;380 struct hinic_mgmt_cb *mgmt_cb;
385 unsigned long cb_state;381 unsigned long cb_state;
386 u16 out_size = 0;382 u16 out_size = 0;
387 383
388 if (recv_msg->mod >= HINIC_MOD_MAX) {384 memset(buf_out, 0, MAX_PF_MGMT_BUF_SIZE);
385
386 if (mgmt_work->mod >= HINIC_MOD_MAX) {
389 dev_err(&pdev->dev, "Unknown MGMT MSG module = %d\n",387 dev_err(&pdev->dev, "Unknown MGMT MSG module = %d\n",
390 recv_msg->mod);388 mgmt_work->mod);
389 kfree(mgmt_work->msg);
390 kfree(mgmt_work);
391 return;391 return;
392 }392 }
393 393
394 mgmt_cb = &pf_to_mgmt->mgmt_cb[recv_msg->mod];394 mgmt_cb = &pf_to_mgmt->mgmt_cb[mgmt_work->mod];
395 395
396 cb_state = cmpxchg(&mgmt_cb->state,396 cb_state = cmpxchg(&mgmt_cb->state,
397 HINIC_MGMT_CB_ENABLED,397 HINIC_MGMT_CB_ENABLED,
398 HINIC_MGMT_CB_ENABLED | HINIC_MGMT_CB_RUNNING);398 HINIC_MGMT_CB_ENABLED | HINIC_MGMT_CB_RUNNING);
399 399
400 if ((cb_state == HINIC_MGMT_CB_ENABLED) && (mgmt_cb->cb))400 if ((cb_state == HINIC_MGMT_CB_ENABLED) && (mgmt_cb->cb))
401 mgmt_cb->cb(mgmt_cb->handle, recv_msg->cmd,401 mgmt_cb->cb(mgmt_cb->handle, mgmt_work->cmd,
402 recv_msg->msg, recv_msg->msg_len,402 mgmt_work->msg, mgmt_work->msg_len,
403 buf_out, &out_size);403 buf_out, &out_size);
404 else404 else
405 dev_err(&pdev->dev, "No MGMT msg handler, mod: %d, cmd: %d\n",405 dev_err(&pdev->dev, "No MGMT msg handler, mod: %d, cmd: %d\n",
406 recv_msg->mod, recv_msg->cmd);406 mgmt_work->mod, mgmt_work->cmd);
407 407
408 mgmt_cb->state &= ~HINIC_MGMT_CB_RUNNING;408 mgmt_cb->state &= ~HINIC_MGMT_CB_RUNNING;
409 409
410 if (!recv_msg->async_mgmt_to_pf)410 if (!mgmt_work->async_mgmt_to_pf)
411 /* MGMT sent sync msg, send the response */411 /* MGMT sent sync msg, send the response */
412 msg_to_mgmt_async(pf_to_mgmt, recv_msg->mod, recv_msg->cmd,412 msg_to_mgmt_async(pf_to_mgmt, mgmt_work->mod, mgmt_work->cmd,
413 buf_out, out_size, MGMT_RESP,413 buf_out, out_size, MGMT_RESP,
414 recv_msg->msg_id);414 mgmt_work->msg_id);
415
416 kfree(mgmt_work->msg);
417 kfree(mgmt_work);
418}
419
420/**
421 * mgmt_recv_msg_handler - handler for message from mgmt cpu
422 * @pf_to_mgmt: PF to MGMT channel
423 * @recv_msg: received message details
424 **/
425static void mgmt_recv_msg_handler(struct hinic_pf_to_mgmt *pf_to_mgmt,
426 struct hinic_recv_msg *recv_msg)
427{
428 struct hinic_mgmt_msg_handle_work *mgmt_work = NULL;
429 struct pci_dev *pdev = pf_to_mgmt->hwif->pdev;
430
431 mgmt_work = kzalloc(sizeof(*mgmt_work), GFP_KERNEL);
432 if (!mgmt_work) {
433 dev_err(&pdev->dev, "Allocate mgmt work memory failed\n");
434 return;
435 }
436
437 if (recv_msg->msg_len) {
438 mgmt_work->msg = kzalloc(recv_msg->msg_len, GFP_KERNEL);
439 if (!mgmt_work->msg) {
440 dev_err(&pdev->dev, "Allocate mgmt msg memory failed\n");
441 kfree(mgmt_work);
442 return;
443 }
444 }
445
446 mgmt_work->pf_to_mgmt = pf_to_mgmt;
447 mgmt_work->msg_len = recv_msg->msg_len;
448 memcpy(mgmt_work->msg, recv_msg->msg, recv_msg->msg_len);
449 mgmt_work->msg_id = recv_msg->msg_id;
450 mgmt_work->mod = recv_msg->mod;
451 mgmt_work->cmd = recv_msg->cmd;
452 mgmt_work->async_mgmt_to_pf = recv_msg->async_mgmt_to_pf;
453
454 INIT_WORK(&mgmt_work->work, recv_mgmt_msg_work_handler);
455 queue_work(pf_to_mgmt->workq, &mgmt_work->work);
415}456}
416 457
417/**458/**
@@ -546,6 +587,12 @@ static int alloc_msg_buf(struct hinic_pf_to_mgmt *pf_to_mgmt) · 128 unmodified lines
546 if (!pf_to_mgmt->sync_msg_buf)587 if (!pf_to_mgmt->sync_msg_buf)
547 return -ENOMEM;588 return -ENOMEM;
548 589
590 pf_to_mgmt->mgmt_ack_buf = devm_kzalloc(&pdev->dev,
591 MAX_PF_MGMT_BUF_SIZE,
592 GFP_KERNEL);
593 if (!pf_to_mgmt->mgmt_ack_buf)
594 return -ENOMEM;
595
549 return 0;596 return 0;
550}597}
551 598
@@ -571,6 +618,11 @@ int hinic_pf_to_mgmt_init(struct hinic_pf_to_mgmt *pf_to_mgmt, · 19 unmodified lines
571 return 0;618 return 0;
572 619
573 sema_init(&pf_to_mgmt->sync_msg_lock, 1);620 sema_init(&pf_to_mgmt->sync_msg_lock, 1);
621 pf_to_mgmt->workq = create_singlethread_workqueue("hinic_mgmt");
622 if (!pf_to_mgmt->workq) {
623 dev_err(&pdev->dev, "Failed to initialize MGMT workqueue\n");
624 return -ENOMEM;
625 }
574 pf_to_mgmt->sync_msg_id = 0;626 pf_to_mgmt->sync_msg_id = 0;
575 627
576 err = alloc_msg_buf(pf_to_mgmt);628 err = alloc_msg_buf(pf_to_mgmt);
@@ -605,4 +657,5 @@ void hinic_pf_to_mgmt_free(struct hinic_pf_to_mgmt *pf_to_mgmt) · 28 unmodified lines
605 657
606 hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MSG_FROM_MGMT_CPU);658 hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MSG_FROM_MGMT_CPU);
607 hinic_api_cmd_free(pf_to_mgmt->cmd_chain);659 hinic_api_cmd_free(pf_to_mgmt->cmd_chain);
660 destroy_workqueue(pf_to_mgmt->workq);
608}661}
drivers/net/ethernet/huawei/hinic/hinic_hw_mgmt.h+16−0
@@ -119,6 +119,7 @@ struct hinic_pf_to_mgmt { · 118 unmodified lines
119 struct semaphore sync_msg_lock;119 struct semaphore sync_msg_lock;
120 u16 sync_msg_id;120 u16 sync_msg_id;
121 u8 *sync_msg_buf;121 u8 *sync_msg_buf;
122 void *mgmt_ack_buf;
122 123
123 struct hinic_recv_msg recv_resp_msg_from_mgmt;124 struct hinic_recv_msg recv_resp_msg_from_mgmt;
124 struct hinic_recv_msg recv_msg_from_mgmt;125 struct hinic_recv_msg recv_msg_from_mgmt;
@@ -126,6 +127,21 @@ struct hinic_pf_to_mgmt { · 1 unmodified line
126 struct hinic_api_cmd_chain *cmd_chain[HINIC_API_CMD_MAX];127 struct hinic_api_cmd_chain *cmd_chain[HINIC_API_CMD_MAX];
127 128
128 struct hinic_mgmt_cb mgmt_cb[HINIC_MOD_MAX];129 struct hinic_mgmt_cb mgmt_cb[HINIC_MOD_MAX];
130
131 struct workqueue_struct *workq;
132};
133
134struct hinic_mgmt_msg_handle_work {
135 struct work_struct work;
136 struct hinic_pf_to_mgmt *pf_to_mgmt;
137
138 void *msg;
139 u16 msg_len;
140
141 enum hinic_mod_type mod;
142 u8 cmd;
143 u16 msg_id;
144 int async_mgmt_to_pf;
129};145};
130 146
131void hinic_register_mgmt_msg_cb(struct hinic_pf_to_mgmt *pf_to_mgmt,147void hinic_register_mgmt_msg_cb(struct hinic_pf_to_mgmt *pf_to_mgmt,
drivers/net/ethernet/ibm/ibmvnic.c+1−1
@@ -3206,7 +3206,7 @@ req_rx_irq_failed: · 3205 unmodified lines
3206req_tx_irq_failed:3206req_tx_irq_failed:
3207 for (j = 0; j < i; j++) {3207 for (j = 0; j < i; j++) {
3208 free_irq(adapter->tx_scrq[j]->irq, adapter->tx_scrq[j]);3208 free_irq(adapter->tx_scrq[j]->irq, adapter->tx_scrq[j]);
3209 irq_dispose_mapping(adapter->rx_scrq[j]->irq);3209 irq_dispose_mapping(adapter->tx_scrq[j]->irq);
3210 }3210 }
3211 release_sub_crqs(adapter, 1);3211 release_sub_crqs(adapter, 1);
3212 return rc;3212 return rc;
drivers/net/ethernet/intel/e1000e/ich8lan.c+1−3
@@ -301,10 +301,8 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) · 300 unmodified lines
301 */301 */
302 hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;302 hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;
303 ret_val = e1000_disable_ulp_lpt_lp(hw, true);303 ret_val = e1000_disable_ulp_lpt_lp(hw, true);
304 if (ret_val) {304 if (ret_val)
305 e_warn("Failed to disable ULP\n");305 e_warn("Failed to disable ULP\n");
306 goto out;
307 }
308 306
309 ret_val = hw->phy.ops.acquire(hw);307 ret_val = hw->phy.ops.acquire(hw);
310 if (ret_val) {308 if (ret_val) {
drivers/net/ethernet/intel/igb/igb_main.c+9−0
@@ -6224,9 +6224,18 @@ static void igb_reset_task(struct work_struct *work) · 6223 unmodified lines
6224 struct igb_adapter *adapter;6224 struct igb_adapter *adapter;
6225 adapter = container_of(work, struct igb_adapter, reset_task);6225 adapter = container_of(work, struct igb_adapter, reset_task);
6226 6226
6227 rtnl_lock();
6228 /* If we're already down or resetting, just bail */
6229 if (test_bit(__IGB_DOWN, &adapter->state) ||
6230 test_bit(__IGB_RESETTING, &adapter->state)) {
6231 rtnl_unlock();
6232 return;
6233 }
6234
6227 igb_dump(adapter);6235 igb_dump(adapter);
6228 netdev_err(adapter->netdev, "Reset adapter\n");6236 netdev_err(adapter->netdev, "Reset adapter\n");
6229 igb_reinit_locked(adapter);6237 igb_reinit_locked(adapter);
6238 rtnl_unlock();
6230}6239}
6231 6240
6232/**6241/**
drivers/net/ethernet/marvell/mvneta.c+1−1
@@ -3959,7 +3959,7 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, · 3958 unmodified lines
3959 /* When at 2.5G, the link partner can send frames with shortened3959 /* When at 2.5G, the link partner can send frames with shortened
3960 * preambles.3960 * preambles.
3961 */3961 */
3962 if (state->speed == SPEED_2500)3962 if (state->interface == PHY_INTERFACE_MODE_2500BASEX)
3963 new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE;3963 new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE;
3964 3964
3965 if (pp->phy_interface != state->interface) {3965 if (pp->phy_interface != state->interface) {
drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+3−0
@@ -1730,10 +1730,12 @@ static void otx2_reset_task(struct work_struct *work) · 1729 unmodified lines
1730 if (!netif_running(pf->netdev))1730 if (!netif_running(pf->netdev))
1731 return;1731 return;
1732 1732
1733 rtnl_lock();
1733 otx2_stop(pf->netdev);1734 otx2_stop(pf->netdev);
1734 pf->reset_count++;1735 pf->reset_count++;
1735 otx2_open(pf->netdev);1736 otx2_open(pf->netdev);
1736 netif_trans_update(pf->netdev);1737 netif_trans_update(pf->netdev);
1738 rtnl_unlock();
1737}1739}
1738 1740
1739static const struct net_device_ops otx2_netdev_ops = {1741static const struct net_device_ops otx2_netdev_ops = {
@@ -2111,6 +2113,7 @@ static void otx2_remove(struct pci_dev *pdev) · 371 unmodified lines
2111 2113
2112 pf = netdev_priv(netdev);2114 pf = netdev_priv(netdev);
2113 2115
2116 cancel_work_sync(&pf->reset_task);
2114 /* Disable link notifications */2117 /* Disable link notifications */
2115 otx2_cgx_config_linkevents(pf, false);2118 otx2_cgx_config_linkevents(pf, false);
2116 2119
drivers/net/ethernet/marvell/octeontx2/nic/otx2_vf.c+2−0
@@ -617,6 +617,8 @@ static void otx2vf_remove(struct pci_dev *pdev) · 616 unmodified lines
617 617
618 vf = netdev_priv(netdev);618 vf = netdev_priv(netdev);
619 619
620 cancel_work_sync(&vf->reset_task);
621 unregister_netdev(netdev);
620 otx2vf_disable_mbox_intr(vf);622 otx2vf_disable_mbox_intr(vf);
621 623
622 otx2_detach_resources(&vf->mbox);624 otx2_detach_resources(&vf->mbox);
drivers/net/ethernet/marvell/sky2.c+1−1
@@ -203,7 +203,7 @@ io_error: · 202 unmodified lines
203 203
204static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)204static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg)
205{205{
206 u16 v;206 u16 v = 0;
207 __gm_phy_read(hw, port, reg, &v);207 __gm_phy_read(hw, port, reg, &v);
208 return v;208 return v;
209}209}
drivers/net/ethernet/mediatek/mtk_eth_soc.c+16−5
@@ -171,11 +171,21 @@ static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth, · 170 unmodified lines
171 return 0;171 return 0;
172}172}
173 173
174static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, int speed)174static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth,
175 phy_interface_t interface, int speed)
175{176{
176 u32 val;177 u32 val;
177 int ret;178 int ret;
178 179
180 if (interface == PHY_INTERFACE_MODE_TRGMII) {
181 mtk_w32(eth, TRGMII_MODE, INTF_MODE);
182 val = 500000000;
183 ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val);
184 if (ret)
185 dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret);
186 return;
187 }
188
179 val = (speed == SPEED_1000) ?189 val = (speed == SPEED_1000) ?
180 INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100;190 INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100;
181 mtk_w32(eth, val, INTF_MODE);191 mtk_w32(eth, val, INTF_MODE);
@@ -262,10 +272,9 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, · 80 unmodified lines
262 state->interface))272 state->interface))
263 goto err_phy;273 goto err_phy;
264 } else {274 } else {
265 if (state->interface !=275 mtk_gmac0_rgmii_adjust(mac->hw,
266 PHY_INTERFACE_MODE_TRGMII)276 state->interface,
267 mtk_gmac0_rgmii_adjust(mac->hw,277 state->speed);
268 state->speed);
269 278
270 /* mt7623_pad_clk_setup */279 /* mt7623_pad_clk_setup */
271 for (i = 0 ; i < NUM_TRGMII_CTRL; i++)280 for (i = 0 ; i < NUM_TRGMII_CTRL; i++)
@@ -2882,6 +2891,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) · 2610 unmodified lines
2882 eth->netdev[id]->irq = eth->irq[0];2891 eth->netdev[id]->irq = eth->irq[0];
2883 eth->netdev[id]->dev.of_node = np;2892 eth->netdev[id]->dev.of_node = np;
2884 2893
2894 eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
2895
2885 return 0;2896 return 0;
2886 2897
2887free_netdev:2898free_netdev:
drivers/net/ethernet/mellanox/mlx4/main.c+2−0
@@ -4356,12 +4356,14 @@ end: · 4355 unmodified lines
4356static void mlx4_shutdown(struct pci_dev *pdev)4356static void mlx4_shutdown(struct pci_dev *pdev)
4357{4357{
4358 struct mlx4_dev_persistent *persist = pci_get_drvdata(pdev);4358 struct mlx4_dev_persistent *persist = pci_get_drvdata(pdev);
4359 struct mlx4_dev *dev = persist->dev;
4359 4360
4360 mlx4_info(persist->dev, "mlx4_shutdown was called\n");4361 mlx4_info(persist->dev, "mlx4_shutdown was called\n");
4361 mutex_lock(&persist->interface_state_mutex);4362 mutex_lock(&persist->interface_state_mutex);
4362 if (persist->interface_state & MLX4_INTERFACE_STATE_UP)4363 if (persist->interface_state & MLX4_INTERFACE_STATE_UP)
4363 mlx4_unload_one(pdev);4364 mlx4_unload_one(pdev);
4364 mutex_unlock(&persist->interface_state_mutex);4365 mutex_unlock(&persist->interface_state_mutex);
4366 mlx4_pci_disable_device(dev);
4365}4367}
4366 4368
4367static const struct pci_error_handlers mlx4_err_handler = {4369static const struct pci_error_handlers mlx4_err_handler = {
drivers/net/ethernet/mellanox/mlx5/core/en/dcbnl.h+1−0
@@ -29,6 +29,7 @@ struct mlx5e_dcbx { · 28 unmodified lines
29 bool manual_buffer;29 bool manual_buffer;
30 u32 cable_len;30 u32 cable_len;
31 u32 xoff;31 u32 xoff;
32 u16 port_buff_cell_sz;
32};33};
33 34
34#define MLX5E_MAX_DSCP (64)35#define MLX5E_MAX_DSCP (64)
drivers/net/ethernet/mellanox/mlx5/core/en/port.c+18−3
@@ -78,11 +78,26 @@ static const u32 mlx5e_ext_link_speed[MLX5E_EXT_LINK_MODES_NUMBER] = { · 77 unmodified lines
78 [MLX5E_400GAUI_8] = 400000,78 [MLX5E_400GAUI_8] = 400000,
79};79};
80 80
81bool mlx5e_ptys_ext_supported(struct mlx5_core_dev *mdev)
82{
83 struct mlx5e_port_eth_proto eproto;
84 int err;
85
86 if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet))
87 return true;
88
89 err = mlx5_port_query_eth_proto(mdev, 1, true, &eproto);
90 if (err)
91 return false;
92
93 return !!eproto.cap;
94}
95
81static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev,96static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev,
82 const u32 **arr, u32 *size,97 const u32 **arr, u32 *size,
83 bool force_legacy)98 bool force_legacy)
84{99{
85 bool ext = force_legacy ? false : MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);100 bool ext = force_legacy ? false : mlx5e_ptys_ext_supported(mdev);
86 101
87 *size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) :102 *size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) :
88 ARRAY_SIZE(mlx5e_link_speed);103 ARRAY_SIZE(mlx5e_link_speed);
@@ -177,7 +192,7 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) · 88 unmodified lines
177 bool ext;192 bool ext;
178 int err;193 int err;
179 194
180 ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);195 ext = mlx5e_ptys_ext_supported(mdev);
181 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);196 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
182 if (err)197 if (err)
183 goto out;198 goto out;
@@ -205,7 +220,7 @@ int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) · 21 unmodified lines
205 int err;220 int err;
206 int i;221 int i;
207 222
208 ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);223 ext = mlx5e_ptys_ext_supported(mdev);
209 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);224 err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
210 if (err)225 if (err)
211 return err;226 return err;
drivers/net/ethernet/mellanox/mlx5/core/en/port.h+1−1
@@ -54,7 +54,7 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); · 53 unmodified lines
54int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);54int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
55u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,55u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,
56 bool force_legacy);56 bool force_legacy);
57 57bool mlx5e_ptys_ext_supported(struct mlx5_core_dev *mdev);
58int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out);58int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out);
59int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in);59int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in);
60int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);60int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer);
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.c+29−24
@@ -34,6 +34,7 @@ · 33 unmodified lines
34int mlx5e_port_query_buffer(struct mlx5e_priv *priv,34int mlx5e_port_query_buffer(struct mlx5e_priv *priv,
35 struct mlx5e_port_buffer *port_buffer)35 struct mlx5e_port_buffer *port_buffer)
36{36{
37 u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz;
37 struct mlx5_core_dev *mdev = priv->mdev;38 struct mlx5_core_dev *mdev = priv->mdev;
38 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);39 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
39 u32 total_used = 0;40 u32 total_used = 0;
@@ -57,11 +58,11 @@ int mlx5e_port_query_buffer(struct mlx5e_priv *priv, · 17 unmodified lines
57 port_buffer->buffer[i].epsb =58 port_buffer->buffer[i].epsb =
58 MLX5_GET(bufferx_reg, buffer, epsb);59 MLX5_GET(bufferx_reg, buffer, epsb);
59 port_buffer->buffer[i].size =60 port_buffer->buffer[i].size =
60 MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT;61 MLX5_GET(bufferx_reg, buffer, size) * port_buff_cell_sz;
61 port_buffer->buffer[i].xon =62 port_buffer->buffer[i].xon =
62 MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT;63 MLX5_GET(bufferx_reg, buffer, xon_threshold) * port_buff_cell_sz;
63 port_buffer->buffer[i].xoff =64 port_buffer->buffer[i].xoff =
64 MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT;65 MLX5_GET(bufferx_reg, buffer, xoff_threshold) * port_buff_cell_sz;
65 total_used += port_buffer->buffer[i].size;66 total_used += port_buffer->buffer[i].size;
66 67
67 mlx5e_dbg(HW, priv, "buffer %d: size=%d, xon=%d, xoff=%d, epsb=%d, lossy=%d\n", i,68 mlx5e_dbg(HW, priv, "buffer %d: size=%d, xon=%d, xoff=%d, epsb=%d, lossy=%d\n", i,
@@ -73,7 +74,7 @@ int mlx5e_port_query_buffer(struct mlx5e_priv *priv, · 5 unmodified lines
73 }74 }
74 75
75 port_buffer->port_buffer_size =76 port_buffer->port_buffer_size =
76 MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT;77 MLX5_GET(pbmc_reg, out, port_buffer_size) * port_buff_cell_sz;
77 port_buffer->spare_buffer_size =78 port_buffer->spare_buffer_size =
78 port_buffer->port_buffer_size - total_used;79 port_buffer->port_buffer_size - total_used;
79 80
@@ -88,9 +89,9 @@ out: · 8 unmodified lines
88static int port_set_buffer(struct mlx5e_priv *priv,89static int port_set_buffer(struct mlx5e_priv *priv,
89 struct mlx5e_port_buffer *port_buffer)90 struct mlx5e_port_buffer *port_buffer)
90{91{
92 u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz;
91 struct mlx5_core_dev *mdev = priv->mdev;93 struct mlx5_core_dev *mdev = priv->mdev;
92 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);94 int sz = MLX5_ST_SZ_BYTES(pbmc_reg);
93 void *buffer;
94 void *in;95 void *in;
95 int err;96 int err;
96 int i;97 int i;
@@ -104,16 +105,18 @@ static int port_set_buffer(struct mlx5e_priv *priv, · 7 unmodified lines
104 goto out;105 goto out;
105 106
106 for (i = 0; i < MLX5E_MAX_BUFFER; i++) {107 for (i = 0; i < MLX5E_MAX_BUFFER; i++) {
107 buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]);108 void *buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]);
108 109 u64 size = port_buffer->buffer[i].size;
109 MLX5_SET(bufferx_reg, buffer, size,110 u64 xoff = port_buffer->buffer[i].xoff;
110 port_buffer->buffer[i].size >> MLX5E_BUFFER_CELL_SHIFT);111 u64 xon = port_buffer->buffer[i].xon;
111 MLX5_SET(bufferx_reg, buffer, lossy,112
112 port_buffer->buffer[i].lossy);113 do_div(size, port_buff_cell_sz);
113 MLX5_SET(bufferx_reg, buffer, xoff_threshold,114 do_div(xoff, port_buff_cell_sz);
114 port_buffer->buffer[i].xoff >> MLX5E_BUFFER_CELL_SHIFT);115 do_div(xon, port_buff_cell_sz);
115 MLX5_SET(bufferx_reg, buffer, xon_threshold,116 MLX5_SET(bufferx_reg, buffer, size, size);
116 port_buffer->buffer[i].xon >> MLX5E_BUFFER_CELL_SHIFT);117 MLX5_SET(bufferx_reg, buffer, lossy, port_buffer->buffer[i].lossy);
118 MLX5_SET(bufferx_reg, buffer, xoff_threshold, xoff);
119 MLX5_SET(bufferx_reg, buffer, xon_threshold, xon);
117 }120 }
118 121
119 err = mlx5e_port_set_pbmc(mdev, in);122 err = mlx5e_port_set_pbmc(mdev, in);
@@ -143,7 +146,7 @@ static u32 calculate_xoff(struct mlx5e_priv *priv, unsigned int mtu) · 23 unmodified lines
143}146}
144 147
145static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer,148static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer,
146 u32 xoff, unsigned int max_mtu)149 u32 xoff, unsigned int max_mtu, u16 port_buff_cell_sz)
147{150{
148 int i;151 int i;
149 152
@@ -155,7 +158,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 5 unmodified lines
155 }158 }
156 159
157 if (port_buffer->buffer[i].size <160 if (port_buffer->buffer[i].size <
158 (xoff + max_mtu + (1 << MLX5E_BUFFER_CELL_SHIFT))) {161 (xoff + max_mtu + port_buff_cell_sz)) {
159 pr_err("buffer_size[%d]=%d is not enough for lossless buffer\n",162 pr_err("buffer_size[%d]=%d is not enough for lossless buffer\n",
160 i, port_buffer->buffer[i].size);163 i, port_buffer->buffer[i].size);
161 return -ENOMEM;164 return -ENOMEM;
@@ -175,6 +178,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 13 unmodified lines
175 * @pfc_en: <input> current pfc configuration178 * @pfc_en: <input> current pfc configuration
176 * @buffer: <input> current prio to buffer mapping179 * @buffer: <input> current prio to buffer mapping
177 * @xoff: <input> xoff value180 * @xoff: <input> xoff value
181 * @port_buff_cell_sz: <input> port buffer cell_size
178 * @port_buffer: <output> port receive buffer configuration182 * @port_buffer: <output> port receive buffer configuration
179 * @change: <output>183 * @change: <output>
180 *184 *
@@ -189,7 +193,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 8 unmodified lines
189 * sets change to true if buffer configuration was modified.193 * sets change to true if buffer configuration was modified.
190 */194 */
191static int update_buffer_lossy(unsigned int max_mtu,195static int update_buffer_lossy(unsigned int max_mtu,
192 u8 pfc_en, u8 *buffer, u32 xoff,196 u8 pfc_en, u8 *buffer, u32 xoff, u16 port_buff_cell_sz,
193 struct mlx5e_port_buffer *port_buffer,197 struct mlx5e_port_buffer *port_buffer,
194 bool *change)198 bool *change)
195{199{
@@ -225,7 +229,7 @@ static int update_buffer_lossy(unsigned int max_mtu, · 29 unmodified lines
225 }229 }
226 230
227 if (changed) {231 if (changed) {
228 err = update_xoff_threshold(port_buffer, xoff, max_mtu);232 err = update_xoff_threshold(port_buffer, xoff, max_mtu, port_buff_cell_sz);
229 if (err)233 if (err)
230 return err;234 return err;
231 235
@@ -262,6 +266,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 30 unmodified lines
262 u32 *buffer_size,266 u32 *buffer_size,
263 u8 *prio2buffer)267 u8 *prio2buffer)
264{268{
269 u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz;
265 struct mlx5e_port_buffer port_buffer;270 struct mlx5e_port_buffer port_buffer;
266 u32 xoff = calculate_xoff(priv, mtu);271 u32 xoff = calculate_xoff(priv, mtu);
267 bool update_prio2buffer = false;272 bool update_prio2buffer = false;
@@ -282,7 +287,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 14 unmodified lines
282 287
283 if (change & MLX5E_PORT_BUFFER_CABLE_LEN) {288 if (change & MLX5E_PORT_BUFFER_CABLE_LEN) {
284 update_buffer = true;289 update_buffer = true;
285 err = update_xoff_threshold(&port_buffer, xoff, max_mtu);290 err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz);
286 if (err)291 if (err)
287 return err;292 return err;
288 }293 }
@@ -292,7 +297,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 3 unmodified lines
292 if (err)297 if (err)
293 return err;298 return err;
294 299
295 err = update_buffer_lossy(max_mtu, pfc->pfc_en, buffer, xoff,300 err = update_buffer_lossy(max_mtu, pfc->pfc_en, buffer, xoff, port_buff_cell_sz,
296 &port_buffer, &update_buffer);301 &port_buffer, &update_buffer);
297 if (err)302 if (err)
298 return err;303 return err;
@@ -304,7 +309,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 5 unmodified lines
304 if (err)309 if (err)
305 return err;310 return err;
306 311
307 err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer,312 err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer, port_buff_cell_sz,
308 xoff, &port_buffer, &update_buffer);313 xoff, &port_buffer, &update_buffer);
309 if (err)314 if (err)
310 return err;315 return err;
@@ -329,7 +334,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 18 unmodified lines
329 return -EINVAL;334 return -EINVAL;
330 335
331 update_buffer = true;336 update_buffer = true;
332 err = update_xoff_threshold(&port_buffer, xoff, max_mtu);337 err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz);
333 if (err)338 if (err)
334 return err;339 return err;
335 }340 }
@@ -337,7 +342,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 1 unmodified line
337 /* Need to update buffer configuration if xoff value is changed */342 /* Need to update buffer configuration if xoff value is changed */
338 if (!update_buffer && xoff != priv->dcbx.xoff) {343 if (!update_buffer && xoff != priv->dcbx.xoff) {
339 update_buffer = true;344 update_buffer = true;
340 err = update_xoff_threshold(&port_buffer, xoff, max_mtu);345 err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz);
341 if (err)346 if (err)
342 return err;347 return err;
343 }348 }
drivers/net/ethernet/mellanox/mlx5/core/en/port_buffer.h+0−1
@@ -36,7 +36,6 @@ · 35 unmodified lines
36#include "port.h"36#include "port.h"
37 37
38#define MLX5E_MAX_BUFFER 838#define MLX5E_MAX_BUFFER 8
39#define MLX5E_BUFFER_CELL_SHIFT 7
40#define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */39#define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */
41 40
42#define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \41#define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \
drivers/net/ethernet/mellanox/mlx5/core/en/rep/bond.c+5−2
@@ -183,13 +183,16 @@ void mlx5e_rep_bond_unslave(struct mlx5_eswitch *esw, · 182 unmodified lines
183 183
184static bool mlx5e_rep_is_lag_netdev(struct net_device *netdev)184static bool mlx5e_rep_is_lag_netdev(struct net_device *netdev)
185{185{
186 struct mlx5e_priv *priv = netdev_priv(netdev);186 struct mlx5e_rep_priv *rpriv;
187 struct mlx5e_rep_priv *rpriv = priv->ppriv;187 struct mlx5e_priv *priv;
188 188
189 /* A given netdev is not a representor or not a slave of LAG configuration */189 /* A given netdev is not a representor or not a slave of LAG configuration */
190 if (!mlx5e_eswitch_rep(netdev) || !bond_slave_get_rtnl(netdev))190 if (!mlx5e_eswitch_rep(netdev) || !bond_slave_get_rtnl(netdev))
191 return false;191 return false;
192 192
193 priv = netdev_priv(netdev);
194 rpriv = priv->ppriv;
195
193 /* Egress acl forward to vport is supported only non-uplink representor */196 /* Egress acl forward to vport is supported only non-uplink representor */
194 return rpriv->rep->vport != MLX5_VPORT_UPLINK;197 return rpriv->rep->vport != MLX5_VPORT_UPLINK;
195}198}
drivers/net/ethernet/mellanox/mlx5/core/en/rep/neigh.c+0−1
@@ -6,7 +6,6 @@ · 5 unmodified lines
6#include <linux/rculist.h>6#include <linux/rculist.h>
7#include <linux/rtnetlink.h>7#include <linux/rtnetlink.h>
8#include <linux/workqueue.h>8#include <linux/workqueue.h>
9#include <linux/rwlock.h>
10#include <linux/spinlock.h>9#include <linux/spinlock.h>
11#include <linux/notifier.h>10#include <linux/notifier.h>
12#include <net/netevent.h>11#include <net/netevent.h>
drivers/net/ethernet/mellanox/mlx5/core/en/rep/tc.c+21−9
@@ -551,19 +551,31 @@ static bool mlx5e_restore_tunnel(struct mlx5e_priv *priv, struct sk_buff *skb, · 550 unmodified lines
551 }551 }
552 }552 }
553 553
554 tun_dst = tun_rx_dst(enc_opts.key.len);554 if (key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
555 tun_dst = __ip_tun_set_dst(key.enc_ipv4.src, key.enc_ipv4.dst,
556 key.enc_ip.tos, key.enc_ip.ttl,
557 key.enc_tp.dst, TUNNEL_KEY,
558 key32_to_tunnel_id(key.enc_key_id.keyid),
559 enc_opts.key.len);
560 } else if (key.enc_control.addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
561 tun_dst = __ipv6_tun_set_dst(&key.enc_ipv6.src, &key.enc_ipv6.dst,
562 key.enc_ip.tos, key.enc_ip.ttl,
563 key.enc_tp.dst, 0, TUNNEL_KEY,
564 key32_to_tunnel_id(key.enc_key_id.keyid),
565 enc_opts.key.len);
566 } else {
567 netdev_dbg(priv->netdev,
568 "Couldn't restore tunnel, unsupported addr_type: %d\n",
569 key.enc_control.addr_type);
570 return false;
571 }
572
555 if (!tun_dst) {573 if (!tun_dst) {
556 WARN_ON_ONCE(true);574 netdev_dbg(priv->netdev, "Couldn't restore tunnel, no tun_dst\n");
557 return false;575 return false;
558 }576 }
559 577
560 ip_tunnel_key_init(&tun_dst->u.tun_info.key,578 tun_dst->u.tun_info.key.tp_src = key.enc_tp.src;
561 key.enc_ipv4.src, key.enc_ipv4.dst,
562 key.enc_ip.tos, key.enc_ip.ttl,
563 0, /* label */
564 key.enc_tp.src, key.enc_tp.dst,
565 key32_to_tunnel_id(key.enc_key_id.keyid),
566 TUNNEL_KEY);
567 579
568 if (enc_opts.key.len)580 if (enc_opts.key.len)
569 ip_tunnel_info_opts_set(&tun_dst->u.tun_info,581 ip_tunnel_info_opts_set(&tun_dst->u.tun_info,
drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.c+1−0
@@ -1097,6 +1097,7 @@ mlx5_tc_ct_flush_ft_entry(void *ptr, void *arg) · 1096 unmodified lines
1097 struct mlx5_ct_entry *entry = ptr;1097 struct mlx5_ct_entry *entry = ptr;
1098 1098
1099 mlx5_tc_ct_entry_del_rules(ct_priv, entry);1099 mlx5_tc_ct_entry_del_rules(ct_priv, entry);
1100 kfree(entry);
1100}1101}
1101 1102
1102static void1103static void
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_geneve.c+2−0
@@ -301,6 +301,8 @@ static int mlx5e_tc_tun_parse_geneve_params(struct mlx5e_priv *priv, · 300 unmodified lines
301 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type, ETH_P_TEB);301 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type, ETH_P_TEB);
302 }302 }
303 303
304 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
305
304 return 0;306 return 0;
305}307}
306 308
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_gre.c+2−0
@@ -80,6 +80,8 @@ static int mlx5e_tc_tun_parse_gretap(struct mlx5e_priv *priv, · 79 unmodified lines
80 gre_key.key, be32_to_cpu(enc_keyid.key->keyid));80 gre_key.key, be32_to_cpu(enc_keyid.key->keyid));
81 }81 }
82 82
83 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
84
83 return 0;85 return 0;
84}86}
85 87
drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_vxlan.c+2−0
@@ -136,6 +136,8 @@ static int mlx5e_tc_tun_parse_vxlan(struct mlx5e_priv *priv, · 135 unmodified lines
136 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,136 MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni,
137 be32_to_cpu(enc_keyid.key->keyid));137 be32_to_cpu(enc_keyid.key->keyid));
138 138
139 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
140
139 return 0;141 return 0;
140}142}
141 143
drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c+19−0
@@ -1217,6 +1217,24 @@ static int mlx5e_trust_initialize(struct mlx5e_priv *priv) · 1216 unmodified lines
1217 return 0;1217 return 0;
1218}1218}
1219 1219
1220#define MLX5E_BUFFER_CELL_SHIFT 7
1221
1222static u16 mlx5e_query_port_buffers_cell_size(struct mlx5e_priv *priv)
1223{
1224 struct mlx5_core_dev *mdev = priv->mdev;
1225 u32 out[MLX5_ST_SZ_DW(sbcam_reg)] = {};
1226 u32 in[MLX5_ST_SZ_DW(sbcam_reg)] = {};
1227
1228 if (!MLX5_CAP_GEN(mdev, sbcam_reg))
1229 return (1 << MLX5E_BUFFER_CELL_SHIFT);
1230
1231 if (mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out),
1232 MLX5_REG_SBCAM, 0, 0))
1233 return (1 << MLX5E_BUFFER_CELL_SHIFT);
1234
1235 return MLX5_GET(sbcam_reg, out, cap_cell_size);
1236}
1237
1220void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv)1238void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv)
1221{1239{
1222 struct mlx5e_dcbx *dcbx = &priv->dcbx;1240 struct mlx5e_dcbx *dcbx = &priv->dcbx;
@@ -1234,6 +1252,7 @@ void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv) · 11 unmodified lines
1234 if (priv->dcbx.mode == MLX5E_DCBX_PARAM_VER_OPER_HOST)1252 if (priv->dcbx.mode == MLX5E_DCBX_PARAM_VER_OPER_HOST)
1235 priv->dcbx.cap |= DCB_CAP_DCBX_HOST;1253 priv->dcbx.cap |= DCB_CAP_DCBX_HOST;
1236 1254
1255 priv->dcbx.port_buff_cell_sz = mlx5e_query_port_buffers_cell_size(priv);
1237 priv->dcbx.manual_buffer = false;1256 priv->dcbx.manual_buffer = false;
1238 priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN;1257 priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN;
1239 1258
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+4−4
@@ -200,7 +200,7 @@ static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev, · 199 unmodified lines
200 struct ptys2ethtool_config **arr,200 struct ptys2ethtool_config **arr,
201 u32 *size)201 u32 *size)
202{202{
203 bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);203 bool ext = mlx5e_ptys_ext_supported(mdev);
204 204
205 *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;205 *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table;
206 *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :206 *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) :
@@ -883,7 +883,7 @@ static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp, · 676 unmodified lines
883 struct ethtool_link_ksettings *link_ksettings)883 struct ethtool_link_ksettings *link_ksettings)
884{884{
885 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;885 unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising;
886 bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);886 bool ext = mlx5e_ptys_ext_supported(mdev);
887 887
888 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);888 ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext);
889}889}
@@ -913,7 +913,7 @@ int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv, · 23 unmodified lines
913 __func__, err);913 __func__, err);
914 goto err_query_regs;914 goto err_query_regs;
915 }915 }
916 ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);916 ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability);
917 eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,917 eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
918 eth_proto_capability);918 eth_proto_capability);
919 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,919 eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
@@ -1066,7 +1066,7 @@ int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv, · 146 unmodified lines
1066 autoneg = link_ksettings->base.autoneg;1066 autoneg = link_ksettings->base.autoneg;
1067 speed = link_ksettings->base.speed;1067 speed = link_ksettings->base.speed;
1068 1068
1069 ext_supported = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);1069 ext_supported = mlx5e_ptys_ext_supported(mdev);
1070 ext = ext_requested(autoneg, adver, ext_supported);1070 ext = ext_requested(autoneg, adver, ext_supported);
1071 if (!ext_supported && ext)1071 if (!ext_supported && ext)
1072 return -EOPNOTSUPP;1072 return -EOPNOTSUPP;
drivers/net/ethernet/mellanox/mlx5/core/en_main.c+34−12
@@ -419,7 +419,7 @@ static int mlx5e_alloc_rq(struct mlx5e_channel *c, · 418 unmodified lines
419 err = mlx5_wq_ll_create(mdev, &rqp->wq, rqc_wq, &rq->mpwqe.wq,419 err = mlx5_wq_ll_create(mdev, &rqp->wq, rqc_wq, &rq->mpwqe.wq,
420 &rq->wq_ctrl);420 &rq->wq_ctrl);
421 if (err)421 if (err)
422 return err;422 goto err_rq_wq_destroy;
423 423
424 rq->mpwqe.wq.db = &rq->mpwqe.wq.db[MLX5_RCV_DBR];424 rq->mpwqe.wq.db = &rq->mpwqe.wq.db[MLX5_RCV_DBR];
425 425
@@ -470,7 +470,7 @@ static int mlx5e_alloc_rq(struct mlx5e_channel *c, · 44 unmodified lines
470 err = mlx5_wq_cyc_create(mdev, &rqp->wq, rqc_wq, &rq->wqe.wq,470 err = mlx5_wq_cyc_create(mdev, &rqp->wq, rqc_wq, &rq->wqe.wq,
471 &rq->wq_ctrl);471 &rq->wq_ctrl);
472 if (err)472 if (err)
473 return err;473 goto err_rq_wq_destroy;
474 474
475 rq->wqe.wq.db = &rq->wqe.wq.db[MLX5_RCV_DBR];475 rq->wqe.wq.db = &rq->wqe.wq.db[MLX5_RCV_DBR];
476 476
@@ -3069,6 +3069,25 @@ void mlx5e_timestamp_init(struct mlx5e_priv *priv) · 2592 unmodified lines
3069 priv->tstamp.rx_filter = HWTSTAMP_FILTER_NONE;3069 priv->tstamp.rx_filter = HWTSTAMP_FILTER_NONE;
3070}3070}
3071 3071
3072static void mlx5e_modify_admin_state(struct mlx5_core_dev *mdev,
3073 enum mlx5_port_status state)
3074{
3075 struct mlx5_eswitch *esw = mdev->priv.eswitch;
3076 int vport_admin_state;
3077
3078 mlx5_set_port_admin_status(mdev, state);
3079
3080 if (!MLX5_ESWITCH_MANAGER(mdev) || mlx5_eswitch_mode(esw) == MLX5_ESWITCH_OFFLOADS)
3081 return;
3082
3083 if (state == MLX5_PORT_UP)
3084 vport_admin_state = MLX5_VPORT_ADMIN_STATE_AUTO;
3085 else
3086 vport_admin_state = MLX5_VPORT_ADMIN_STATE_DOWN;
3087
3088 mlx5_eswitch_set_vport_state(esw, MLX5_VPORT_UPLINK, vport_admin_state);
3089}
3090
3072int mlx5e_open_locked(struct net_device *netdev)3091int mlx5e_open_locked(struct net_device *netdev)
3073{3092{
3074 struct mlx5e_priv *priv = netdev_priv(netdev);3093 struct mlx5e_priv *priv = netdev_priv(netdev);
@@ -3101,12 +3120,9 @@ int mlx5e_open(struct net_device *netdev) · 26 unmodified lines
3101 mutex_lock(&priv->state_lock);3120 mutex_lock(&priv->state_lock);
3102 err = mlx5e_open_locked(netdev);3121 err = mlx5e_open_locked(netdev);
3103 if (!err)3122 if (!err)
3104 mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_UP);3123 mlx5e_modify_admin_state(priv->mdev, MLX5_PORT_UP);
3105 mutex_unlock(&priv->state_lock);3124 mutex_unlock(&priv->state_lock);
3106 3125
3107 if (mlx5_vxlan_allowed(priv->mdev->vxlan))
3108 udp_tunnel_get_rx_info(netdev);
3109
3110 return err;3126 return err;
3111}3127}
3112 3128
@@ -3138,7 +3154,7 @@ int mlx5e_close(struct net_device *netdev) · 25 unmodified lines
3138 return -ENODEV;3154 return -ENODEV;
3139 3155
3140 mutex_lock(&priv->state_lock);3156 mutex_lock(&priv->state_lock);
3141 mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_DOWN);3157 mlx5e_modify_admin_state(priv->mdev, MLX5_PORT_DOWN);
3142 err = mlx5e_close_locked(netdev);3158 err = mlx5e_close_locked(netdev);
3143 mutex_unlock(&priv->state_lock);3159 mutex_unlock(&priv->state_lock);
3144 3160
@@ -5121,6 +5137,10 @@ static int mlx5e_init_nic_rx(struct mlx5e_priv *priv) · 1976 unmodified lines
5121 if (err)5137 if (err)
5122 goto err_destroy_flow_steering;5138 goto err_destroy_flow_steering;
5123 5139
5140#ifdef CONFIG_MLX5_EN_ARFS
5141 priv->netdev->rx_cpu_rmap = mlx5_eq_table_get_rmap(priv->mdev);
5142#endif
5143
5124 return 0;5144 return 0;
5125 5145
5126err_destroy_flow_steering:5146err_destroy_flow_steering:
@@ -5181,7 +5201,7 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv) · 54 unmodified lines
5181 5201
5182 /* Marking the link as currently not needed by the Driver */5202 /* Marking the link as currently not needed by the Driver */
5183 if (!netif_running(netdev))5203 if (!netif_running(netdev))
5184 mlx5_set_port_admin_status(mdev, MLX5_PORT_DOWN);5204 mlx5e_modify_admin_state(mdev, MLX5_PORT_DOWN);
5185 5205
5186 mlx5e_set_netdev_mtu_boundaries(priv);5206 mlx5e_set_netdev_mtu_boundaries(priv);
5187 mlx5e_set_dev_port_mtu(priv);5207 mlx5e_set_dev_port_mtu(priv);
@@ -5202,6 +5222,8 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv) · 14 unmodified lines
5202 rtnl_lock();5222 rtnl_lock();
5203 if (netif_running(netdev))5223 if (netif_running(netdev))
5204 mlx5e_open(netdev);5224 mlx5e_open(netdev);
5225 if (mlx5_vxlan_allowed(priv->mdev->vxlan))
5226 udp_tunnel_get_rx_info(netdev);
5205 netif_device_attach(netdev);5227 netif_device_attach(netdev);
5206 rtnl_unlock();5228 rtnl_unlock();
5207}5229}
@@ -5216,6 +5238,8 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv) · 8 unmodified lines
5216 rtnl_lock();5238 rtnl_lock();
5217 if (netif_running(priv->netdev))5239 if (netif_running(priv->netdev))
5218 mlx5e_close(priv->netdev);5240 mlx5e_close(priv->netdev);
5241 if (mlx5_vxlan_allowed(priv->mdev->vxlan))
5242 udp_tunnel_drop_rx_info(priv->netdev);
5219 netif_device_detach(priv->netdev);5243 netif_device_detach(priv->netdev);
5220 rtnl_unlock();5244 rtnl_unlock();
5221 5245
@@ -5288,10 +5312,6 @@ int mlx5e_netdev_init(struct net_device *netdev, · 66 unmodified lines
5288 /* netdev init */5312 /* netdev init */
5289 netif_carrier_off(netdev);5313 netif_carrier_off(netdev);
5290 5314
5291#ifdef CONFIG_MLX5_EN_ARFS
5292 netdev->rx_cpu_rmap = mlx5_eq_table_get_rmap(mdev);
5293#endif
5294
5295 return 0;5315 return 0;
5296 5316
5297err_free_cpumask:5317err_free_cpumask:
@@ -5389,6 +5409,8 @@ err_cleanup_tx: · 91 unmodified lines
5389 profile->cleanup_tx(priv);5409 profile->cleanup_tx(priv);
5390 5410
5391out:5411out:
5412 set_bit(MLX5E_STATE_DESTROYING, &priv->state);
5413 cancel_work_sync(&priv->update_stats_work);
5392 return err;5414 return err;
5393}5415}
5394 5416
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+3−0
@@ -936,6 +936,7 @@ err_close_drop_rq: · 935 unmodified lines
936 936
937static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)937static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)
938{938{
939 mlx5e_ethtool_cleanup_steering(priv);
939 rep_vport_rx_rule_destroy(priv);940 rep_vport_rx_rule_destroy(priv);
940 mlx5e_destroy_rep_root_ft(priv);941 mlx5e_destroy_rep_root_ft(priv);
941 mlx5e_destroy_ttc_table(priv, &priv->fs.ttc);942 mlx5e_destroy_ttc_table(priv, &priv->fs.ttc);
@@ -1080,6 +1081,8 @@ static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv) · 138 unmodified lines
1080 1081
1081 mlx5e_rep_tc_enable(priv);1082 mlx5e_rep_tc_enable(priv);
1082 1083
1084 mlx5_modify_vport_admin_state(mdev, MLX5_VPORT_STATE_OP_MOD_UPLINK,
1085 0, 0, MLX5_VPORT_ADMIN_STATE_AUTO);
1083 mlx5_lag_add(mdev, netdev);1086 mlx5_lag_add(mdev, netdev);
1084 priv->events_nb.notifier_call = uplink_rep_async_event;1087 priv->events_nb.notifier_call = uplink_rep_async_event;
1085 mlx5_notifier_register(mdev, &priv->events_nb);1088 mlx5_notifier_register(mdev, &priv->events_nb);
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+10−5
@@ -2356,6 +2356,7 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 2355 unmodified lines
2356 match.key->vlan_priority);2356 match.key->vlan_priority);
2357 2357
2358 *match_level = MLX5_MATCH_L2;2358 *match_level = MLX5_MATCH_L2;
2359 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
2359 }2360 }
2360 }2361 }
2361 2362
@@ -4670,9 +4671,10 @@ static bool is_flow_rule_duplicate_allowed(struct net_device *dev, · 2308 unmodified lines
4670 struct mlx5e_rep_priv *rpriv)4671 struct mlx5e_rep_priv *rpriv)
4671{4672{
4672 /* Offloaded flow rule is allowed to duplicate on non-uplink representor4673 /* Offloaded flow rule is allowed to duplicate on non-uplink representor
4673 * sharing tc block with other slaves of a lag device.4674 * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this
4675 * function is called from NIC mode.
4674 */4676 */
4675 return netif_is_lag_port(dev) && rpriv->rep->vport != MLX5_VPORT_UPLINK;4677 return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK;
4676}4678}
4677 4679
4678int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,4680int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv,
@@ -4686,13 +4688,12 @@ int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, · 7 unmodified lines
4686 4688
4687 rcu_read_lock();4689 rcu_read_lock();
4688 flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);4690 flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params);
4689 rcu_read_unlock();
4690 if (flow) {4691 if (flow) {
4691 /* Same flow rule offloaded to non-uplink representor sharing tc block,4692 /* Same flow rule offloaded to non-uplink representor sharing tc block,
4692 * just return 0.4693 * just return 0.
4693 */4694 */
4694 if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)4695 if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev)
4695 goto out;4696 goto rcu_unlock;
4696 4697
4697 NL_SET_ERR_MSG_MOD(extack,4698 NL_SET_ERR_MSG_MOD(extack,
4698 "flow cookie already exists, ignoring");4699 "flow cookie already exists, ignoring");
@@ -4700,8 +4701,12 @@ int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, · 1 unmodified line
4700 "flow cookie %lx already exists, ignoring\n",4701 "flow cookie %lx already exists, ignoring\n",
4701 f->cookie);4702 f->cookie);
4702 err = -EEXIST;4703 err = -EEXIST;
4703 goto out;4704 goto rcu_unlock;
4704 }4705 }
4706rcu_unlock:
4707 rcu_read_unlock();
4708 if (flow)
4709 goto out;
4705 4710
4706 trace_mlx5e_configure_flower(f);4711 trace_mlx5e_configure_flower(f);
4707 err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);4712 err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow);
drivers/net/ethernet/mellanox/mlx5/core/esw/acl/ingress_lgcy.c+0−1
@@ -217,7 +217,6 @@ int esw_acl_ingress_lgcy_setup(struct mlx5_eswitch *esw, · 216 unmodified lines
217 }217 }
218 218
219 /* Create ingress allow rule */219 /* Create ingress allow rule */
220 memset(spec, 0, sizeof(*spec));
221 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;220 spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS;
222 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;221 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW;
223 vport->ingress.allow_rule = mlx5_add_flow_rules(vport->ingress.acl, spec,222 vport->ingress.allow_rule = mlx5_add_flow_rules(vport->ingress.acl, spec,
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c+16−11
@@ -1608,7 +1608,7 @@ abort: · 1607 unmodified lines
1608 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);1608 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
1609 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);1609 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
1610 }1610 }
1611 1611 esw_destroy_tsar(esw);
1612 return err;1612 return err;
1613}1613}
1614 1614
@@ -1653,8 +1653,6 @@ void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf) · 38 unmodified lines
1653 else if (esw->mode == MLX5_ESWITCH_OFFLOADS)1653 else if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1654 esw_offloads_disable(esw);1654 esw_offloads_disable(esw);
1655 1655
1656 esw_destroy_tsar(esw);
1657
1658 old_mode = esw->mode;1656 old_mode = esw->mode;
1659 esw->mode = MLX5_ESWITCH_NONE;1657 esw->mode = MLX5_ESWITCH_NONE;
1660 1658
@@ -1664,6 +1662,8 @@ void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf) · 3 unmodified lines
1664 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);1662 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_IB);
1665 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);1663 mlx5_reload_interface(esw->dev, MLX5_INTERFACE_PROTOCOL_ETH);
1666 }1664 }
1665 esw_destroy_tsar(esw);
1666
1667 if (clear_vf)1667 if (clear_vf)
1668 mlx5_eswitch_clear_vf_vports_info(esw);1668 mlx5_eswitch_clear_vf_vports_info(esw);
1669}1669}
@@ -1826,6 +1826,8 @@ int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, · 156 unmodified lines
1826 u16 vport, int link_state)1826 u16 vport, int link_state)
1827{1827{
1828 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);1828 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1829 int opmod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT;
1830 int other_vport = 1;
1829 int err = 0;1831 int err = 0;
1830 1832
1831 if (!ESW_ALLOWED(esw))1833 if (!ESW_ALLOWED(esw))
@@ -1833,15 +1835,17 @@ int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, · 1 unmodified line
1833 if (IS_ERR(evport))1835 if (IS_ERR(evport))
1834 return PTR_ERR(evport);1836 return PTR_ERR(evport);
1835 1837
1838 if (vport == MLX5_VPORT_UPLINK) {
1839 opmod = MLX5_VPORT_STATE_OP_MOD_UPLINK;
1840 other_vport = 0;
1841 vport = 0;
1842 }
1836 mutex_lock(&esw->state_lock);1843 mutex_lock(&esw->state_lock);
1837 1844
1838 err = mlx5_modify_vport_admin_state(esw->dev,1845 err = mlx5_modify_vport_admin_state(esw->dev, opmod, vport, other_vport, link_state);
1839 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
1840 vport, 1, link_state);
1841 if (err) {1846 if (err) {
1842 mlx5_core_warn(esw->dev,1847 mlx5_core_warn(esw->dev, "Failed to set vport %d link state, opmod = %d, err = %d",
1843 "Failed to set vport %d link state, err = %d",1848 vport, opmod, err);
1844 vport, err);
1845 goto unlock;1849 goto unlock;
1846 }1850 }
1847 1851
@@ -1883,8 +1887,6 @@ int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, · 35 unmodified lines
1883 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);1887 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
1884 int err = 0;1888 int err = 0;
1885 1889
1886 if (!ESW_ALLOWED(esw))
1887 return -EPERM;
1888 if (IS_ERR(evport))1890 if (IS_ERR(evport))
1889 return PTR_ERR(evport);1891 return PTR_ERR(evport);
1890 if (vlan > 4095 || qos > 7)1892 if (vlan > 4095 || qos > 7)
@@ -1912,6 +1914,9 @@ int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, · 21 unmodified lines
1912 u8 set_flags = 0;1914 u8 set_flags = 0;
1913 int err;1915 int err;
1914 1916
1917 if (!ESW_ALLOWED(esw))
1918 return -EPERM;
1919
1915 if (vlan || qos)1920 if (vlan || qos)
1916 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;1921 set_flags = SET_VLAN_STRIP | SET_VLAN_INSERT;
1917 1922
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h+2−0
@@ -680,6 +680,8 @@ static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { r · 679 unmodified lines
680static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}680static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {}
681static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }681static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
682static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }682static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
683static inline
684int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
683static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)685static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
684{686{
685 return ERR_PTR(-EOPNOTSUPP);687 return ERR_PTR(-EOPNOTSUPP);
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+12−7
@@ -236,6 +236,15 @@ static struct mlx5_eswitch_rep *mlx5_eswitch_get_rep(struct mlx5_eswitch *esw, · 235 unmodified lines
236 return &esw->offloads.vport_reps[idx];236 return &esw->offloads.vport_reps[idx];
237}237}
238 238
239static void
240mlx5_eswitch_set_rule_flow_source(struct mlx5_eswitch *esw,
241 struct mlx5_flow_spec *spec,
242 struct mlx5_esw_flow_attr *attr)
243{
244 if (MLX5_CAP_ESW_FLOWTABLE(esw->dev, flow_source) &&
245 attr && attr->in_rep && attr->in_rep->vport == MLX5_VPORT_UPLINK)
246 spec->flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;
247}
239 248
240static void249static void
241mlx5_eswitch_set_rule_source_port(struct mlx5_eswitch *esw,250mlx5_eswitch_set_rule_source_port(struct mlx5_eswitch *esw,
@@ -259,9 +268,6 @@ mlx5_eswitch_set_rule_source_port(struct mlx5_eswitch *esw, · 17 unmodified lines
259 mlx5_eswitch_get_vport_metadata_mask());268 mlx5_eswitch_get_vport_metadata_mask());
260 269
261 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;270 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_2;
262 misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, misc_parameters);
263 if (memchr_inv(misc, 0, MLX5_ST_SZ_BYTES(fte_match_set_misc)))
264 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
265 } else {271 } else {
266 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);272 misc = MLX5_ADDR_OF(fte_match_param, spec->match_value, misc_parameters);
267 MLX5_SET(fte_match_set_misc, misc, source_port, attr->in_rep->vport);273 MLX5_SET(fte_match_set_misc, misc, source_port, attr->in_rep->vport);
@@ -279,10 +285,6 @@ mlx5_eswitch_set_rule_source_port(struct mlx5_eswitch *esw, · 11 unmodified lines
279 285
280 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;286 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
281 }287 }
282
283 if (MLX5_CAP_ESW_FLOWTABLE(esw->dev, flow_source) &&
284 attr->in_rep->vport == MLX5_VPORT_UPLINK)
285 spec->flow_context.flow_source = MLX5_FLOW_CONTEXT_FLOW_SOURCE_UPLINK;
286}288}
287 289
288struct mlx5_flow_handle *290struct mlx5_flow_handle *
@@ -396,6 +398,8 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, · 107 unmodified lines
396 goto err_esw_get;398 goto err_esw_get;
397 }399 }
398 400
401 mlx5_eswitch_set_rule_flow_source(esw, spec, attr);
402
399 if (mlx5_eswitch_termtbl_required(esw, attr, &flow_act, spec))403 if (mlx5_eswitch_termtbl_required(esw, attr, &flow_act, spec))
400 rule = mlx5_eswitch_add_termtbl_rule(esw, fdb, spec, attr,404 rule = mlx5_eswitch_add_termtbl_rule(esw, fdb, spec, attr,
401 &flow_act, dest, i);405 &flow_act, dest, i);
@@ -462,6 +466,7 @@ mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw, · 60 unmodified lines
462 i++;466 i++;
463 467
464 mlx5_eswitch_set_rule_source_port(esw, spec, attr);468 mlx5_eswitch_set_rule_source_port(esw, spec, attr);
469 mlx5_eswitch_set_rule_flow_source(esw, spec, attr);
465 470
466 if (attr->outer_match_level != MLX5_MATCH_NONE)471 if (attr->outer_match_level != MLX5_MATCH_NONE)
467 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;472 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+5−23
@@ -797,7 +797,7 @@ static struct mlx5_flow_table *find_closest_ft_recursive(struct fs_node *root, · 796 unmodified lines
797 return ft;797 return ft;
798}798}
799 799
800/* If reverse if false then return the first flow table in next priority of800/* If reverse is false then return the first flow table in next priority of
801 * prio in the tree, else return the last flow table in the previous priority801 * prio in the tree, else return the last flow table in the previous priority
802 * of prio in the tree.802 * of prio in the tree.
803 */803 */
@@ -829,34 +829,16 @@ static struct mlx5_flow_table *find_prev_chained_ft(struct fs_prio *prio) · 25 unmodified lines
829 return find_closest_ft(prio, true);829 return find_closest_ft(prio, true);
830}830}
831 831
832static struct fs_prio *find_fwd_ns_prio(struct mlx5_flow_root_namespace *root,
833 struct mlx5_flow_namespace *ns)
834{
835 struct mlx5_flow_namespace *root_ns = &root->ns;
836 struct fs_prio *iter_prio;
837 struct fs_prio *prio;
838
839 fs_get_obj(prio, ns->node.parent);
840 list_for_each_entry(iter_prio, &root_ns->node.children, node.list) {
841 if (iter_prio == prio &&
842 !list_is_last(&prio->node.children, &iter_prio->node.list))
843 return list_next_entry(iter_prio, node.list);
844 }
845 return NULL;
846}
847
848static struct mlx5_flow_table *find_next_fwd_ft(struct mlx5_flow_table *ft,832static struct mlx5_flow_table *find_next_fwd_ft(struct mlx5_flow_table *ft,
849 struct mlx5_flow_act *flow_act)833 struct mlx5_flow_act *flow_act)
850{834{
851 struct mlx5_flow_root_namespace *root = find_root(&ft->node);
852 struct fs_prio *prio;835 struct fs_prio *prio;
836 bool next_ns;
853 837
854 if (flow_act->action & MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS)838 next_ns = flow_act->action & MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS;
855 prio = find_fwd_ns_prio(root, ft->ns);839 fs_get_obj(prio, next_ns ? ft->ns->node.parent : ft->node.parent);
856 else
857 fs_get_obj(prio, ft->node.parent);
858 840
859 return (prio) ? find_next_chained_ft(prio) : NULL;841 return find_next_chained_ft(prio);
860}842}
861 843
862static int connect_fts_in_prio(struct mlx5_core_dev *dev,844static int connect_fts_in_prio(struct mlx5_core_dev *dev,
drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c+65−13
@@ -273,17 +273,17 @@ static int mlx5_extts_configure(struct ptp_clock_info *ptp, · 272 unmodified lines
273 if (rq->extts.index >= clock->ptp_info.n_pins)273 if (rq->extts.index >= clock->ptp_info.n_pins)
274 return -EINVAL;274 return -EINVAL;
275 275
276 pin = ptp_find_pin(clock->ptp, PTP_PF_EXTTS, rq->extts.index);
277 if (pin < 0)
278 return -EBUSY;
279
276 if (on) {280 if (on) {
277 pin = ptp_find_pin(clock->ptp, PTP_PF_EXTTS, rq->extts.index);
278 if (pin < 0)
279 return -EBUSY;
280 pin_mode = MLX5_PIN_MODE_IN;281 pin_mode = MLX5_PIN_MODE_IN;
281 pattern = !!(rq->extts.flags & PTP_FALLING_EDGE);282 pattern = !!(rq->extts.flags & PTP_FALLING_EDGE);
282 field_select = MLX5_MTPPS_FS_PIN_MODE |283 field_select = MLX5_MTPPS_FS_PIN_MODE |
283 MLX5_MTPPS_FS_PATTERN |284 MLX5_MTPPS_FS_PATTERN |
284 MLX5_MTPPS_FS_ENABLE;285 MLX5_MTPPS_FS_ENABLE;
285 } else {286 } else {
286 pin = rq->extts.index;
287 field_select = MLX5_MTPPS_FS_ENABLE;287 field_select = MLX5_MTPPS_FS_ENABLE;
288 }288 }
289 289
@@ -331,12 +331,12 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp, · 41 unmodified lines
331 if (rq->perout.index >= clock->ptp_info.n_pins)331 if (rq->perout.index >= clock->ptp_info.n_pins)
332 return -EINVAL;332 return -EINVAL;
333 333
334 if (on) {334 pin = ptp_find_pin(clock->ptp, PTP_PF_PEROUT,
335 pin = ptp_find_pin(clock->ptp, PTP_PF_PEROUT,335 rq->perout.index);
336 rq->perout.index);336 if (pin < 0)
337 if (pin < 0)337 return -EBUSY;
338 return -EBUSY;
339 338
339 if (on) {
340 pin_mode = MLX5_PIN_MODE_OUT;340 pin_mode = MLX5_PIN_MODE_OUT;
341 pattern = MLX5_OUT_PATTERN_PERIODIC;341 pattern = MLX5_OUT_PATTERN_PERIODIC;
342 ts.tv_sec = rq->perout.period.sec;342 ts.tv_sec = rq->perout.period.sec;
@@ -362,7 +362,6 @@ static int mlx5_perout_configure(struct ptp_clock_info *ptp, · 19 unmodified lines
362 MLX5_MTPPS_FS_ENABLE |362 MLX5_MTPPS_FS_ENABLE |
363 MLX5_MTPPS_FS_TIME_STAMP;363 MLX5_MTPPS_FS_TIME_STAMP;
364 } else {364 } else {
365 pin = rq->perout.index;
366 field_select = MLX5_MTPPS_FS_ENABLE;365 field_select = MLX5_MTPPS_FS_ENABLE;
367 }366 }
368 367
@@ -409,10 +408,31 @@ static int mlx5_ptp_enable(struct ptp_clock_info *ptp, · 40 unmodified lines
409 return 0;408 return 0;
410}409}
411 410
411enum {
412 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_IN = BIT(0),
413 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_OUT = BIT(1),
414};
415
412static int mlx5_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,416static int mlx5_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
413 enum ptp_pin_function func, unsigned int chan)417 enum ptp_pin_function func, unsigned int chan)
414{418{
415 return (func == PTP_PF_PHYSYNC) ? -EOPNOTSUPP : 0;419 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock,
420 ptp_info);
421
422 switch (func) {
423 case PTP_PF_NONE:
424 return 0;
425 case PTP_PF_EXTTS:
426 return !(clock->pps_info.pin_caps[pin] &
427 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_IN);
428 case PTP_PF_PEROUT:
429 return !(clock->pps_info.pin_caps[pin] &
430 MLX5_MTPPS_REG_CAP_PIN_X_MODE_SUPPORT_PPS_OUT);
431 default:
432 return -EOPNOTSUPP;
433 }
434
435 return -EOPNOTSUPP;
416}436}
417 437
418static const struct ptp_clock_info mlx5_ptp_clock_info = {438static const struct ptp_clock_info mlx5_ptp_clock_info = {
@@ -432,6 +452,38 @@ static const struct ptp_clock_info mlx5_ptp_clock_info = { · 13 unmodified lines
432 .verify = NULL,452 .verify = NULL,
433};453};
434 454
455static int mlx5_query_mtpps_pin_mode(struct mlx5_core_dev *mdev, u8 pin,
456 u32 *mtpps, u32 mtpps_size)
457{
458 u32 in[MLX5_ST_SZ_DW(mtpps_reg)] = {};
459
460 MLX5_SET(mtpps_reg, in, pin, pin);
461
462 return mlx5_core_access_reg(mdev, in, sizeof(in), mtpps,
463 mtpps_size, MLX5_REG_MTPPS, 0, 0);
464}
465
466static int mlx5_get_pps_pin_mode(struct mlx5_clock *clock, u8 pin)
467{
468 struct mlx5_core_dev *mdev = clock->mdev;
469 u32 out[MLX5_ST_SZ_DW(mtpps_reg)] = {};
470 u8 mode;
471 int err;
472
473 err = mlx5_query_mtpps_pin_mode(mdev, pin, out, sizeof(out));
474 if (err || !MLX5_GET(mtpps_reg, out, enable))
475 return PTP_PF_NONE;
476
477 mode = MLX5_GET(mtpps_reg, out, pin_mode);
478
479 if (mode == MLX5_PIN_MODE_IN)
480 return PTP_PF_EXTTS;
481 else if (mode == MLX5_PIN_MODE_OUT)
482 return PTP_PF_PEROUT;
483
484 return PTP_PF_NONE;
485}
486
435static int mlx5_init_pin_config(struct mlx5_clock *clock)487static int mlx5_init_pin_config(struct mlx5_clock *clock)
436{488{
437 int i;489 int i;
@@ -451,8 +503,8 @@ static int mlx5_init_pin_config(struct mlx5_clock *clock) · 13 unmodified lines
451 sizeof(clock->ptp_info.pin_config[i].name),503 sizeof(clock->ptp_info.pin_config[i].name),
452 "mlx5_pps%d", i);504 "mlx5_pps%d", i);
453 clock->ptp_info.pin_config[i].index = i;505 clock->ptp_info.pin_config[i].index = i;
454 clock->ptp_info.pin_config[i].func = PTP_PF_NONE;506 clock->ptp_info.pin_config[i].func = mlx5_get_pps_pin_mode(clock, i);
455 clock->ptp_info.pin_config[i].chan = i;507 clock->ptp_info.pin_config[i].chan = 0;
456 }508 }
457 509
458 return 0;510 return 0;
drivers/net/ethernet/mellanox/mlx5/core/port.c+77−16
@@ -293,7 +293,40 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num) · 292 unmodified lines
293 return 0;293 return 0;
294}294}
295 295
296static int mlx5_eeprom_page(int offset)296static int mlx5_query_module_id(struct mlx5_core_dev *dev, int module_num,
297 u8 *module_id)
298{
299 u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {};
300 u32 out[MLX5_ST_SZ_DW(mcia_reg)];
301 int err, status;
302 u8 *ptr;
303
304 MLX5_SET(mcia_reg, in, i2c_device_address, MLX5_I2C_ADDR_LOW);
305 MLX5_SET(mcia_reg, in, module, module_num);
306 MLX5_SET(mcia_reg, in, device_address, 0);
307 MLX5_SET(mcia_reg, in, page_number, 0);
308 MLX5_SET(mcia_reg, in, size, 1);
309 MLX5_SET(mcia_reg, in, l, 0);
310
311 err = mlx5_core_access_reg(dev, in, sizeof(in), out,
312 sizeof(out), MLX5_REG_MCIA, 0, 0);
313 if (err)
314 return err;
315
316 status = MLX5_GET(mcia_reg, out, status);
317 if (status) {
318 mlx5_core_err(dev, "query_mcia_reg failed: status: 0x%x\n",
319 status);
320 return -EIO;
321 }
322 ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0);
323
324 *module_id = ptr[0];
325
326 return 0;
327}
328
329static int mlx5_qsfp_eeprom_page(u16 offset)
297{330{
298 if (offset < MLX5_EEPROM_PAGE_LENGTH)331 if (offset < MLX5_EEPROM_PAGE_LENGTH)
299 /* Addresses between 0-255 - page 00 */332 /* Addresses between 0-255 - page 00 */
@@ -307,7 +340,7 @@ static int mlx5_eeprom_page(int offset) · 7 unmodified lines
307 MLX5_EEPROM_HIGH_PAGE_LENGTH);340 MLX5_EEPROM_HIGH_PAGE_LENGTH);
308}341}
309 342
310static int mlx5_eeprom_high_page_offset(int page_num)343static int mlx5_qsfp_eeprom_high_page_offset(int page_num)
311{344{
312 if (!page_num) /* Page 0 always start from low page */345 if (!page_num) /* Page 0 always start from low page */
313 return 0;346 return 0;
@@ -316,35 +349,62 @@ static int mlx5_eeprom_high_page_offset(int page_num) · 2 unmodified lines
316 return page_num * MLX5_EEPROM_HIGH_PAGE_LENGTH;349 return page_num * MLX5_EEPROM_HIGH_PAGE_LENGTH;
317}350}
318 351
352static void mlx5_qsfp_eeprom_params_set(u16 *i2c_addr, int *page_num, u16 *offset)
353{
354 *i2c_addr = MLX5_I2C_ADDR_LOW;
355 *page_num = mlx5_qsfp_eeprom_page(*offset);
356 *offset -= mlx5_qsfp_eeprom_high_page_offset(*page_num);
357}
358
359static void mlx5_sfp_eeprom_params_set(u16 *i2c_addr, int *page_num, u16 *offset)
360{
361 *i2c_addr = MLX5_I2C_ADDR_LOW;
362 *page_num = 0;
363
364 if (*offset < MLX5_EEPROM_PAGE_LENGTH)
365 return;
366
367 *i2c_addr = MLX5_I2C_ADDR_HIGH;
368 *offset -= MLX5_EEPROM_PAGE_LENGTH;
369}
370
319int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,371int mlx5_query_module_eeprom(struct mlx5_core_dev *dev,
320 u16 offset, u16 size, u8 *data)372 u16 offset, u16 size, u8 *data)
321{373{
322 int module_num, page_num, status, err;374 int module_num, status, err, page_num = 0;
375 u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {};
323 u32 out[MLX5_ST_SZ_DW(mcia_reg)];376 u32 out[MLX5_ST_SZ_DW(mcia_reg)];
324 u32 in[MLX5_ST_SZ_DW(mcia_reg)];377 u16 i2c_addr = 0;
325 u16 i2c_addr;378 u8 module_id;
326 void *ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0);379 void *ptr;
327 380
328 err = mlx5_query_module_num(dev, &module_num);381 err = mlx5_query_module_num(dev, &module_num);
329 if (err)382 if (err)
330 return err;383 return err;
331 384
332 memset(in, 0, sizeof(in));385 err = mlx5_query_module_id(dev, module_num, &module_id);
333 size = min_t(int, size, MLX5_EEPROM_MAX_BYTES);386 if (err)
334 387 return err;
335 /* Get the page number related to the given offset */
336 page_num = mlx5_eeprom_page(offset);
337 388
338 /* Set the right offset according to the page number,389 switch (module_id) {
339 * For page_num > 0, relative offset is always >= 128 (high page).390 case MLX5_MODULE_ID_SFP:
340 */391 mlx5_sfp_eeprom_params_set(&i2c_addr, &page_num, &offset);
341 offset -= mlx5_eeprom_high_page_offset(page_num);392 break;
393 case MLX5_MODULE_ID_QSFP:
394 case MLX5_MODULE_ID_QSFP_PLUS:
395 case MLX5_MODULE_ID_QSFP28:
396 mlx5_qsfp_eeprom_params_set(&i2c_addr, &page_num, &offset);
397 break;
398 default:
399 mlx5_core_err(dev, "Module ID not recognized: 0x%x\n", module_id);
400 return -EINVAL;
401 }
342 402
343 if (offset + size > MLX5_EEPROM_PAGE_LENGTH)403 if (offset + size > MLX5_EEPROM_PAGE_LENGTH)
344 /* Cross pages read, read until offset 256 in low page */404 /* Cross pages read, read until offset 256 in low page */
345 size -= offset + size - MLX5_EEPROM_PAGE_LENGTH;405 size -= offset + size - MLX5_EEPROM_PAGE_LENGTH;
346 406
347 i2c_addr = MLX5_I2C_ADDR_LOW;407 size = min_t(int, size, MLX5_EEPROM_MAX_BYTES);
348 408
349 MLX5_SET(mcia_reg, in, l, 0);409 MLX5_SET(mcia_reg, in, l, 0);
350 MLX5_SET(mcia_reg, in, module, module_num);410 MLX5_SET(mcia_reg, in, module, module_num);
@@ -365,6 +425,7 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, · 14 unmodified lines
365 return -EIO;425 return -EIO;
366 }426 }
367 427
428 ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0);
368 memcpy(data, ptr, size);429 memcpy(data, ptr, size);
369 430
370 return size;431 return size;
drivers/net/ethernet/mellanox/mlxsw/core.c+7−4
@@ -710,7 +710,7 @@ static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) · 709 unmodified lines
710 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,710 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
711 mlxsw_core);711 mlxsw_core);
712 if (err)712 if (err)
713 return err;713 goto err_trap_register;
714 714
715 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);715 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
716 if (err)716 if (err)
@@ -722,6 +722,7 @@ static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) · 5 unmodified lines
722err_emad_trap_set:722err_emad_trap_set:
723 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,723 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
724 mlxsw_core);724 mlxsw_core);
725err_trap_register:
725 destroy_workqueue(mlxsw_core->emad_wq);726 destroy_workqueue(mlxsw_core->emad_wq);
726 return err;727 return err;
727}728}
@@ -1813,7 +1814,7 @@ static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, · 1085 unmodified lines
1813 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,1814 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1814 bulk_list, cb, cb_priv, tid);1815 bulk_list, cb, cb_priv, tid);
1815 if (err) {1816 if (err) {
1816 kfree(trans);1817 kfree_rcu(trans, rcu);
1817 return err;1818 return err;
1818 }1819 }
1819 return 0;1820 return 0;
@@ -2050,11 +2051,13 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, · 230 unmodified lines
2050 break;2051 break;
2051 }2052 }
2052 }2053 }
2053 rcu_read_unlock();2054 if (!found) {
2054 if (!found)2055 rcu_read_unlock();
2055 goto drop;2056 goto drop;
2057 }
2056 2058
2057 rxl->func(skb, local_port, rxl_item->priv);2059 rxl->func(skb, local_port, rxl_item->priv);
2060 rcu_read_unlock();
2058 return;2061 return;
2059 2062
2060drop:2063drop:
drivers/net/ethernet/mellanox/mlxsw/core_env.c+32−16
@@ -45,7 +45,7 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id, · 44 unmodified lines
45static int45static int
46mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,46mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
47 u16 offset, u16 size, void *data,47 u16 offset, u16 size, void *data,
48 unsigned int *p_read_size)48 bool qsfp, unsigned int *p_read_size)
49{49{
50 char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE];50 char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE];
51 char mcia_pl[MLXSW_REG_MCIA_LEN];51 char mcia_pl[MLXSW_REG_MCIA_LEN];
@@ -54,6 +54,10 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, · 2 unmodified lines
54 int status;54 int status;
55 int err;55 int err;
56 56
57 /* MCIA register accepts buffer size <= 48. Page of size 128 should be
58 * read by chunks of size 48, 48, 32. Align the size of the last chunk
59 * to avoid reading after the end of the page.
60 */
57 size = min_t(u16, size, MLXSW_REG_MCIA_EEPROM_SIZE);61 size = min_t(u16, size, MLXSW_REG_MCIA_EEPROM_SIZE);
58 62
59 if (offset < MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH &&63 if (offset < MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH &&
@@ -63,18 +67,25 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, · 3 unmodified lines
63 67
64 i2c_addr = MLXSW_REG_MCIA_I2C_ADDR_LOW;68 i2c_addr = MLXSW_REG_MCIA_I2C_ADDR_LOW;
65 if (offset >= MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH) {69 if (offset >= MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH) {
66 page = MLXSW_REG_MCIA_PAGE_GET(offset);70 if (qsfp) {
67 offset -= MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH * page;71 /* When reading upper pages 1, 2 and 3 the offset
68 /* When reading upper pages 1, 2 and 3 the offset starts at72 * starts at 128. Please refer to "QSFP+ Memory Map"
69 * 128. Please refer to "QSFP+ Memory Map" figure in SFF-843673 * figure in SFF-8436 specification for graphical
70 * specification for graphical depiction.74 * depiction.
71 * MCIA register accepts buffer size <= 48. Page of size 12875 */
72 * should be read by chunks of size 48, 48, 32. Align the size76 page = MLXSW_REG_MCIA_PAGE_GET(offset);
73 * of the last chunk to avoid reading after the end of the77 offset -= MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH * page;
74 * page.78 if (offset + size > MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH)
75 */79 size = MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH - offset;
76 if (offset + size > MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH)80 } else {
77 size = MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH - offset;81 /* When reading upper pages 1, 2 and 3 the offset
82 * starts at 0 and I2C high address is used. Please refer
83 * refer to "Memory Organization" figure in SFF-8472
84 * specification for graphical depiction.
85 */
86 i2c_addr = MLXSW_REG_MCIA_I2C_ADDR_HIGH;
87 offset -= MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH;
88 }
78 }89 }
79 90
80 mlxsw_reg_mcia_pack(mcia_pl, module, 0, page, offset, size, i2c_addr);91 mlxsw_reg_mcia_pack(mcia_pl, module, 0, page, offset, size, i2c_addr);
@@ -166,7 +177,7 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module, · 85 unmodified lines
166 int err;177 int err;
167 178
168 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, 0, offset,179 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, 0, offset,
169 module_info, &read_size);180 module_info, false, &read_size);
170 if (err)181 if (err)
171 return err;182 return err;
172 183
@@ -197,7 +208,7 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module, · 24 unmodified lines
197 /* Verify if transceiver provides diagnostic monitoring page */208 /* Verify if transceiver provides diagnostic monitoring page */
198 err = mlxsw_env_query_module_eeprom(mlxsw_core, module,209 err = mlxsw_env_query_module_eeprom(mlxsw_core, module,
199 SFP_DIAGMON, 1, &diag_mon,210 SFP_DIAGMON, 1, &diag_mon,
200 &read_size);211 false, &read_size);
201 if (err)212 if (err)
202 return err;213 return err;
203 214
@@ -225,17 +236,22 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev, · 21 unmodified lines
225 int offset = ee->offset;236 int offset = ee->offset;
226 unsigned int read_size;237 unsigned int read_size;
227 int i = 0;238 int i = 0;
239 bool qsfp;
228 int err;240 int err;
229 241
230 if (!ee->len)242 if (!ee->len)
231 return -EINVAL;243 return -EINVAL;
232 244
233 memset(data, 0, ee->len);245 memset(data, 0, ee->len);
246 /* Validate module identifier value. */
247 err = mlxsw_env_validate_cable_ident(mlxsw_core, module, &qsfp);
248 if (err)
249 return err;
234 250
235 while (i < ee->len) {251 while (i < ee->len) {
236 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, offset,252 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, offset,
237 ee->len - i, data + i,253 ee->len - i, data + i,
238 &read_size);254 qsfp, &read_size);
239 if (err) {255 if (err) {
240 netdev_err(netdev, "Eeprom query failed\n");256 netdev_err(netdev, "Eeprom query failed\n");
241 return err;257 return err;
drivers/net/ethernet/mellanox/mlxsw/pci.c+38−16
@@ -1414,23 +1414,12 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core, · 1413 unmodified lines
1414 u16 num_pages;1414 u16 num_pages;
1415 int err;1415 int err;
1416 1416
1417 mutex_init(&mlxsw_pci->cmd.lock);
1418 init_waitqueue_head(&mlxsw_pci->cmd.wait);
1419
1420 mlxsw_pci->core = mlxsw_core;1417 mlxsw_pci->core = mlxsw_core;
1421 1418
1422 mbox = mlxsw_cmd_mbox_alloc();1419 mbox = mlxsw_cmd_mbox_alloc();
1423 if (!mbox)1420 if (!mbox)
1424 return -ENOMEM;1421 return -ENOMEM;
1425 1422
1426 err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1427 if (err)
1428 goto mbox_put;
1429
1430 err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.out_mbox);
1431 if (err)
1432 goto err_out_mbox_alloc;
1433
1434 err = mlxsw_pci_sw_reset(mlxsw_pci, mlxsw_pci->id);1423 err = mlxsw_pci_sw_reset(mlxsw_pci, mlxsw_pci->id);
1435 if (err)1424 if (err)
1436 goto err_sw_reset;1425 goto err_sw_reset;
@@ -1537,9 +1526,6 @@ err_query_fw: · 100 unmodified lines
1537 mlxsw_pci_free_irq_vectors(mlxsw_pci);1526 mlxsw_pci_free_irq_vectors(mlxsw_pci);
1538err_alloc_irq:1527err_alloc_irq:
1539err_sw_reset:1528err_sw_reset:
1540 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox);
1541err_out_mbox_alloc:
1542 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1543mbox_put:1529mbox_put:
1544 mlxsw_cmd_mbox_free(mbox);1530 mlxsw_cmd_mbox_free(mbox);
1545 return err;1531 return err;
@@ -1553,8 +1539,6 @@ static void mlxsw_pci_fini(void *bus_priv) · 7 unmodified lines
1553 mlxsw_pci_aqs_fini(mlxsw_pci);1539 mlxsw_pci_aqs_fini(mlxsw_pci);
1554 mlxsw_pci_fw_area_fini(mlxsw_pci);1540 mlxsw_pci_fw_area_fini(mlxsw_pci);
1555 mlxsw_pci_free_irq_vectors(mlxsw_pci);1541 mlxsw_pci_free_irq_vectors(mlxsw_pci);
1556 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox);
1557 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1558}1542}
1559 1543
1560static struct mlxsw_pci_queue *1544static struct mlxsw_pci_queue *
@@ -1776,6 +1760,37 @@ static const struct mlxsw_bus mlxsw_pci_bus = { · 215 unmodified lines
1776 .features = MLXSW_BUS_F_TXRX | MLXSW_BUS_F_RESET,1760 .features = MLXSW_BUS_F_TXRX | MLXSW_BUS_F_RESET,
1777};1761};
1778 1762
1763static int mlxsw_pci_cmd_init(struct mlxsw_pci *mlxsw_pci)
1764{
1765 int err;
1766
1767 mutex_init(&mlxsw_pci->cmd.lock);
1768 init_waitqueue_head(&mlxsw_pci->cmd.wait);
1769
1770 err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1771 if (err)
1772 goto err_in_mbox_alloc;
1773
1774 err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.out_mbox);
1775 if (err)
1776 goto err_out_mbox_alloc;
1777
1778 return 0;
1779
1780err_out_mbox_alloc:
1781 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1782err_in_mbox_alloc:
1783 mutex_destroy(&mlxsw_pci->cmd.lock);
1784 return err;
1785}
1786
1787static void mlxsw_pci_cmd_fini(struct mlxsw_pci *mlxsw_pci)
1788{
1789 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox);
1790 mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox);
1791 mutex_destroy(&mlxsw_pci->cmd.lock);
1792}
1793
1779static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)1794static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1780{1795{
1781 const char *driver_name = pdev->driver->name;1796 const char *driver_name = pdev->driver->name;
@@ -1831,6 +1846,10 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 49 unmodified lines
1831 mlxsw_pci->pdev = pdev;1846 mlxsw_pci->pdev = pdev;
1832 pci_set_drvdata(pdev, mlxsw_pci);1847 pci_set_drvdata(pdev, mlxsw_pci);
1833 1848
1849 err = mlxsw_pci_cmd_init(mlxsw_pci);
1850 if (err)
1851 goto err_pci_cmd_init;
1852
1834 mlxsw_pci->bus_info.device_kind = driver_name;1853 mlxsw_pci->bus_info.device_kind = driver_name;
1835 mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);1854 mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev);
1836 mlxsw_pci->bus_info.dev = &pdev->dev;1855 mlxsw_pci->bus_info.dev = &pdev->dev;
@@ -1848,6 +1867,8 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 11 unmodified lines
1848 return 0;1867 return 0;
1849 1868
1850err_bus_device_register:1869err_bus_device_register:
1870 mlxsw_pci_cmd_fini(mlxsw_pci);
1871err_pci_cmd_init:
1851 iounmap(mlxsw_pci->hw_addr);1872 iounmap(mlxsw_pci->hw_addr);
1852err_ioremap:1873err_ioremap:
1853err_pci_resource_len_check:1874err_pci_resource_len_check:
@@ -1865,6 +1886,7 @@ static void mlxsw_pci_remove(struct pci_dev *pdev) · 11 unmodified lines
1865 struct mlxsw_pci *mlxsw_pci = pci_get_drvdata(pdev);1886 struct mlxsw_pci *mlxsw_pci = pci_get_drvdata(pdev);
1866 1887
1867 mlxsw_core_bus_device_unregister(mlxsw_pci->core, false);1888 mlxsw_core_bus_device_unregister(mlxsw_pci->core, false);
1889 mlxsw_pci_cmd_fini(mlxsw_pci);
1868 iounmap(mlxsw_pci->hw_addr);1890 iounmap(mlxsw_pci->hw_addr);
1869 pci_release_regions(mlxsw_pci->pdev);1891 pci_release_regions(mlxsw_pci->pdev);
1870 pci_disable_device(mlxsw_pci->pdev);1892 pci_disable_device(mlxsw_pci->pdev);
drivers/net/ethernet/mellanox/mlxsw/reg.h+1−0
@@ -5536,6 +5536,7 @@ enum mlxsw_reg_htgt_trap_group { · 5535 unmodified lines
5536 MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST,5536 MLXSW_REG_HTGT_TRAP_GROUP_SP_MULTICAST,
5537 MLXSW_REG_HTGT_TRAP_GROUP_SP_NEIGH_DISCOVERY,5537 MLXSW_REG_HTGT_TRAP_GROUP_SP_NEIGH_DISCOVERY,
5538 MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP,5538 MLXSW_REG_HTGT_TRAP_GROUP_SP_ROUTER_EXP,
5539 MLXSW_REG_HTGT_TRAP_GROUP_SP_EXTERNAL_ROUTE,
5539 MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME,5540 MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME,
5540 MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP,5541 MLXSW_REG_HTGT_TRAP_GROUP_SP_DHCP,
5541 MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT,5542 MLXSW_REG_HTGT_TRAP_GROUP_SP_EVENT,
drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c+27−34
@@ -5001,15 +5001,6 @@ static void mlxsw_sp_router_fib4_del(struct mlxsw_sp *mlxsw_sp, · 5000 unmodified lines
5001 5001
5002static bool mlxsw_sp_fib6_rt_should_ignore(const struct fib6_info *rt)5002static bool mlxsw_sp_fib6_rt_should_ignore(const struct fib6_info *rt)
5003{5003{
5004 /* Packets with link-local destination IP arriving to the router
5005 * are trapped to the CPU, so no need to program specific routes
5006 * for them. Only allow prefix routes (usually one fe80::/64) so
5007 * that packets are trapped for the right reason.
5008 */
5009 if ((ipv6_addr_type(&rt->fib6_dst.addr) & IPV6_ADDR_LINKLOCAL) &&
5010 (rt->fib6_flags & (RTF_LOCAL | RTF_ANYCAST)))
5011 return true;
5012
5013 /* Multicast routes aren't supported, so ignore them. Neighbour5004 /* Multicast routes aren't supported, so ignore them. Neighbour
5014 * Discovery packets are specifically trapped.5005 * Discovery packets are specifically trapped.
5015 */5006 */
@@ -6262,7 +6253,7 @@ static int mlxsw_sp_router_fib_event(struct notifier_block *nb, · 1246 unmodified lines
6262 }6253 }
6263 6254
6264 fib_work = kzalloc(sizeof(*fib_work), GFP_ATOMIC);6255 fib_work = kzalloc(sizeof(*fib_work), GFP_ATOMIC);
6265 if (WARN_ON(!fib_work))6256 if (!fib_work)
6266 return NOTIFY_BAD;6257 return NOTIFY_BAD;
6267 6258
6268 fib_work->mlxsw_sp = router->mlxsw_sp;6259 fib_work->mlxsw_sp = router->mlxsw_sp;
@@ -8078,16 +8069,6 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, · 1809 unmodified lines
8078 mlxsw_sp->router = router;8069 mlxsw_sp->router = router;
8079 router->mlxsw_sp = mlxsw_sp;8070 router->mlxsw_sp = mlxsw_sp;
8080 8071
8081 router->inetaddr_nb.notifier_call = mlxsw_sp_inetaddr_event;
8082 err = register_inetaddr_notifier(&router->inetaddr_nb);
8083 if (err)
8084 goto err_register_inetaddr_notifier;
8085
8086 router->inet6addr_nb.notifier_call = mlxsw_sp_inet6addr_event;
8087 err = register_inet6addr_notifier(&router->inet6addr_nb);
8088 if (err)
8089 goto err_register_inet6addr_notifier;
8090
8091 INIT_LIST_HEAD(&mlxsw_sp->router->nexthop_neighs_list);8072 INIT_LIST_HEAD(&mlxsw_sp->router->nexthop_neighs_list);
8092 err = __mlxsw_sp_router_init(mlxsw_sp);8073 err = __mlxsw_sp_router_init(mlxsw_sp);
8093 if (err)8074 if (err)
@@ -8128,12 +8109,6 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, · 34 unmodified lines
8128 if (err)8109 if (err)
8129 goto err_neigh_init;8110 goto err_neigh_init;
8130 8111
8131 mlxsw_sp->router->netevent_nb.notifier_call =
8132 mlxsw_sp_router_netevent_event;
8133 err = register_netevent_notifier(&mlxsw_sp->router->netevent_nb);
8134 if (err)
8135 goto err_register_netevent_notifier;
8136
8137 err = mlxsw_sp_mp_hash_init(mlxsw_sp);8112 err = mlxsw_sp_mp_hash_init(mlxsw_sp);
8138 if (err)8113 if (err)
8139 goto err_mp_hash_init;8114 goto err_mp_hash_init;
@@ -8142,6 +8117,22 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, · 2 unmodified lines
8142 if (err)8117 if (err)
8143 goto err_dscp_init;8118 goto err_dscp_init;
8144 8119
8120 router->inetaddr_nb.notifier_call = mlxsw_sp_inetaddr_event;
8121 err = register_inetaddr_notifier(&router->inetaddr_nb);
8122 if (err)
8123 goto err_register_inetaddr_notifier;
8124
8125 router->inet6addr_nb.notifier_call = mlxsw_sp_inet6addr_event;
8126 err = register_inet6addr_notifier(&router->inet6addr_nb);
8127 if (err)
8128 goto err_register_inet6addr_notifier;
8129
8130 mlxsw_sp->router->netevent_nb.notifier_call =
8131 mlxsw_sp_router_netevent_event;
8132 err = register_netevent_notifier(&mlxsw_sp->router->netevent_nb);
8133 if (err)
8134 goto err_register_netevent_notifier;
8135
8145 mlxsw_sp->router->fib_nb.notifier_call = mlxsw_sp_router_fib_event;8136 mlxsw_sp->router->fib_nb.notifier_call = mlxsw_sp_router_fib_event;
8146 err = register_fib_notifier(mlxsw_sp_net(mlxsw_sp),8137 err = register_fib_notifier(mlxsw_sp_net(mlxsw_sp),
8147 &mlxsw_sp->router->fib_nb,8138 &mlxsw_sp->router->fib_nb,
@@ -8152,10 +8143,15 @@ int mlxsw_sp_router_init(struct mlxsw_sp *mlxsw_sp, · 4 unmodified lines
8152 return 0;8143 return 0;
8153 8144
8154err_register_fib_notifier:8145err_register_fib_notifier:
8155err_dscp_init:
8156err_mp_hash_init:
8157 unregister_netevent_notifier(&mlxsw_sp->router->netevent_nb);8146 unregister_netevent_notifier(&mlxsw_sp->router->netevent_nb);
8158err_register_netevent_notifier:8147err_register_netevent_notifier:
8148 unregister_inet6addr_notifier(&router->inet6addr_nb);
8149err_register_inet6addr_notifier:
8150 unregister_inetaddr_notifier(&router->inetaddr_nb);
8151err_register_inetaddr_notifier:
8152 mlxsw_core_flush_owq();
8153err_dscp_init:
8154err_mp_hash_init:
8159 mlxsw_sp_neigh_fini(mlxsw_sp);8155 mlxsw_sp_neigh_fini(mlxsw_sp);
8160err_neigh_init:8156err_neigh_init:
8161 mlxsw_sp_vrs_fini(mlxsw_sp);8157 mlxsw_sp_vrs_fini(mlxsw_sp);
@@ -8174,10 +8170,6 @@ err_ipips_init: · 12 unmodified lines
8174err_rifs_init:8170err_rifs_init:
8175 __mlxsw_sp_router_fini(mlxsw_sp);8171 __mlxsw_sp_router_fini(mlxsw_sp);
8176err_router_init:8172err_router_init:
8177 unregister_inet6addr_notifier(&router->inet6addr_nb);
8178err_register_inet6addr_notifier:
8179 unregister_inetaddr_notifier(&router->inetaddr_nb);
8180err_register_inetaddr_notifier:
8181 mutex_destroy(&mlxsw_sp->router->lock);8173 mutex_destroy(&mlxsw_sp->router->lock);
8182 kfree(mlxsw_sp->router);8174 kfree(mlxsw_sp->router);
8183 return err;8175 return err;
@@ -8188,6 +8180,9 @@ void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp) · 4 unmodified lines
8188 unregister_fib_notifier(mlxsw_sp_net(mlxsw_sp),8180 unregister_fib_notifier(mlxsw_sp_net(mlxsw_sp),
8189 &mlxsw_sp->router->fib_nb);8181 &mlxsw_sp->router->fib_nb);
8190 unregister_netevent_notifier(&mlxsw_sp->router->netevent_nb);8182 unregister_netevent_notifier(&mlxsw_sp->router->netevent_nb);
8183 unregister_inet6addr_notifier(&mlxsw_sp->router->inet6addr_nb);
8184 unregister_inetaddr_notifier(&mlxsw_sp->router->inetaddr_nb);
8185 mlxsw_core_flush_owq();
8191 mlxsw_sp_neigh_fini(mlxsw_sp);8186 mlxsw_sp_neigh_fini(mlxsw_sp);
8192 mlxsw_sp_vrs_fini(mlxsw_sp);8187 mlxsw_sp_vrs_fini(mlxsw_sp);
8193 mlxsw_sp_mr_fini(mlxsw_sp);8188 mlxsw_sp_mr_fini(mlxsw_sp);
@@ -8197,8 +8192,6 @@ void mlxsw_sp_router_fini(struct mlxsw_sp *mlxsw_sp) · 3 unmodified lines
8197 mlxsw_sp_ipips_fini(mlxsw_sp);8192 mlxsw_sp_ipips_fini(mlxsw_sp);
8198 mlxsw_sp_rifs_fini(mlxsw_sp);8193 mlxsw_sp_rifs_fini(mlxsw_sp);
8199 __mlxsw_sp_router_fini(mlxsw_sp);8194 __mlxsw_sp_router_fini(mlxsw_sp);
8200 unregister_inet6addr_notifier(&mlxsw_sp->router->inet6addr_nb);
8201 unregister_inetaddr_notifier(&mlxsw_sp->router->inetaddr_nb);
8202 mutex_destroy(&mlxsw_sp->router->lock);8195 mutex_destroy(&mlxsw_sp->router->lock);
8203 kfree(mlxsw_sp->router);8196 kfree(mlxsw_sp->router);
8204}8197}
drivers/net/ethernet/mellanox/mlxsw/spectrum_trap.c+11−3
@@ -328,6 +328,9 @@ mlxsw_sp_trap_policer_items_arr[] = { · 327 unmodified lines
328 {328 {
329 .policer = MLXSW_SP_TRAP_POLICER(18, 1024, 128),329 .policer = MLXSW_SP_TRAP_POLICER(18, 1024, 128),
330 },330 },
331 {
332 .policer = MLXSW_SP_TRAP_POLICER(19, 1024, 512),
333 },
331};334};
332 335
333static const struct mlxsw_sp_trap_group_item mlxsw_sp_trap_group_items_arr[] = {336static const struct mlxsw_sp_trap_group_item mlxsw_sp_trap_group_items_arr[] = {
@@ -421,6 +424,11 @@ static const struct mlxsw_sp_trap_group_item mlxsw_sp_trap_group_items_arr[] = { · 87 unmodified lines
421 .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME,424 .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_IP2ME,
422 .priority = 2,425 .priority = 2,
423 },426 },
427 {
428 .group = DEVLINK_TRAP_GROUP_GENERIC(EXTERNAL_DELIVERY, 19),
429 .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_EXTERNAL_ROUTE,
430 .priority = 1,
431 },
424 {432 {
425 .group = DEVLINK_TRAP_GROUP_GENERIC(IPV6, 15),433 .group = DEVLINK_TRAP_GROUP_GENERIC(IPV6, 15),
426 .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6,434 .hw_group_id = MLXSW_REG_HTGT_TRAP_GROUP_SP_IPV6,
@@ -882,11 +890,11 @@ static const struct mlxsw_sp_trap_item mlxsw_sp_trap_items_arr[] = { · 455 unmodified lines
882 },890 },
883 },891 },
884 {892 {
885 .trap = MLXSW_SP_TRAP_CONTROL(EXTERNAL_ROUTE, LOCAL_DELIVERY,893 .trap = MLXSW_SP_TRAP_CONTROL(EXTERNAL_ROUTE, EXTERNAL_DELIVERY,
886 TRAP),894 TRAP),
887 .listeners_arr = {895 .listeners_arr = {
888 MLXSW_SP_RXL_MARK(RTR_INGRESS0, IP2ME, TRAP_TO_CPU,896 MLXSW_SP_RXL_MARK(RTR_INGRESS0, EXTERNAL_ROUTE,
889 false),897 TRAP_TO_CPU, false),
890 },898 },
891 },899 },
892 {900 {
drivers/net/ethernet/mscc/ocelot.c+5−5
@@ -748,21 +748,21 @@ void ocelot_get_txtstamp(struct ocelot *ocelot) · 747 unmodified lines
748 748
749 spin_unlock_irqrestore(&port->tx_skbs.lock, flags);749 spin_unlock_irqrestore(&port->tx_skbs.lock, flags);
750 750
751 /* Next ts */751 /* Get the h/w timestamp */
752 ocelot_write(ocelot, SYS_PTP_NXT_PTP_NXT, SYS_PTP_NXT);752 ocelot_get_hwtimestamp(ocelot, &ts);
753 753
754 if (unlikely(!skb_match))754 if (unlikely(!skb_match))
755 continue;755 continue;
756 756
757 /* Get the h/w timestamp */
758 ocelot_get_hwtimestamp(ocelot, &ts);
759
760 /* Set the timestamp into the skb */757 /* Set the timestamp into the skb */
761 memset(&shhwtstamps, 0, sizeof(shhwtstamps));758 memset(&shhwtstamps, 0, sizeof(shhwtstamps));
762 shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);759 shhwtstamps.hwtstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
763 skb_tstamp_tx(skb_match, &shhwtstamps);760 skb_tstamp_tx(skb_match, &shhwtstamps);
764 761
765 dev_kfree_skb_any(skb_match);762 dev_kfree_skb_any(skb_match);
763
764 /* Next ts */
765 ocelot_write(ocelot, SYS_PTP_NXT_PTP_NXT, SYS_PTP_NXT);
766 }766 }
767}767}
768EXPORT_SYMBOL(ocelot_get_txtstamp);768EXPORT_SYMBOL(ocelot_get_txtstamp);
drivers/net/ethernet/neterion/vxge/vxge-main.c+1−1
@@ -98,7 +98,7 @@ static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo) · 97 unmodified lines
98{98{
99 struct sk_buff **skb_ptr = NULL;99 struct sk_buff **skb_ptr = NULL;
100 struct sk_buff **temp;100 struct sk_buff **temp;
101#define NR_SKB_COMPLETED 128101#define NR_SKB_COMPLETED 16
102 struct sk_buff *completed[NR_SKB_COMPLETED];102 struct sk_buff *completed[NR_SKB_COMPLETED];
103 int more;103 int more;
104 104
drivers/net/ethernet/ni/nixge.c+5−3
@@ -1299,19 +1299,21 @@ static int nixge_probe(struct platform_device *pdev) · 1298 unmodified lines
1299 netif_napi_add(ndev, &priv->napi, nixge_poll, NAPI_POLL_WEIGHT);1299 netif_napi_add(ndev, &priv->napi, nixge_poll, NAPI_POLL_WEIGHT);
1300 err = nixge_of_get_resources(pdev);1300 err = nixge_of_get_resources(pdev);
1301 if (err)1301 if (err)
1302 return err;1302 goto free_netdev;
1303 __nixge_hw_set_mac_address(ndev);1303 __nixge_hw_set_mac_address(ndev);
1304 1304
1305 priv->tx_irq = platform_get_irq_byname(pdev, "tx");1305 priv->tx_irq = platform_get_irq_byname(pdev, "tx");
1306 if (priv->tx_irq < 0) {1306 if (priv->tx_irq < 0) {
1307 netdev_err(ndev, "could not find 'tx' irq");1307 netdev_err(ndev, "could not find 'tx' irq");
1308 return priv->tx_irq;1308 err = priv->tx_irq;
1309 goto free_netdev;
1309 }1310 }
1310 1311
1311 priv->rx_irq = platform_get_irq_byname(pdev, "rx");1312 priv->rx_irq = platform_get_irq_byname(pdev, "rx");
1312 if (priv->rx_irq < 0) {1313 if (priv->rx_irq < 0) {
1313 netdev_err(ndev, "could not find 'rx' irq");1314 netdev_err(ndev, "could not find 'rx' irq");
1314 return priv->rx_irq;1315 err = priv->rx_irq;
1316 goto free_netdev;
1315 }1317 }
1316 1318
1317 priv->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;1319 priv->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;
drivers/net/ethernet/pensando/ionic/ionic_ethtool.c+22−37
@@ -103,15 +103,18 @@ static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, · 102 unmodified lines
103 void *p)103 void *p)
104{104{
105 struct ionic_lif *lif = netdev_priv(netdev);105 struct ionic_lif *lif = netdev_priv(netdev);
106 unsigned int offset;
106 unsigned int size;107 unsigned int size;
107 108
108 regs->version = IONIC_DEV_CMD_REG_VERSION;109 regs->version = IONIC_DEV_CMD_REG_VERSION;
109 110
111 offset = 0;
110 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);112 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
111 memcpy_fromio(p, lif->ionic->idev.dev_info_regs->words, size);113 memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
112 114
115 offset += size;
113 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);116 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
114 memcpy_fromio(p, lif->ionic->idev.dev_cmd_regs->words, size);117 memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
115}118}
116 119
117static int ionic_get_link_ksettings(struct net_device *netdev,120static int ionic_get_link_ksettings(struct net_device *netdev,
@@ -468,12 +471,18 @@ static void ionic_get_ringparam(struct net_device *netdev, · 350 unmodified lines
468 ring->rx_pending = lif->nrxq_descs;471 ring->rx_pending = lif->nrxq_descs;
469}472}
470 473
474static void ionic_set_ringsize(struct ionic_lif *lif, void *arg)
475{
476 struct ethtool_ringparam *ring = arg;
477
478 lif->ntxq_descs = ring->tx_pending;
479 lif->nrxq_descs = ring->rx_pending;
480}
481
471static int ionic_set_ringparam(struct net_device *netdev,482static int ionic_set_ringparam(struct net_device *netdev,
472 struct ethtool_ringparam *ring)483 struct ethtool_ringparam *ring)
473{484{
474 struct ionic_lif *lif = netdev_priv(netdev);485 struct ionic_lif *lif = netdev_priv(netdev);
475 bool running;
476 int err;
477 486
478 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {487 if (ring->rx_mini_pending || ring->rx_jumbo_pending) {
479 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");488 netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n");
@@ -491,22 +500,7 @@ static int ionic_set_ringparam(struct net_device *netdev, · 11 unmodified lines
491 ring->rx_pending == lif->nrxq_descs)500 ring->rx_pending == lif->nrxq_descs)
492 return 0;501 return 0;
493 502
494 err = ionic_wait_for_bit(lif, IONIC_LIF_F_QUEUE_RESET);503 return ionic_reset_queues(lif, ionic_set_ringsize, ring);
495 if (err)
496 return err;
497
498 running = test_bit(IONIC_LIF_F_UP, lif->state);
499 if (running)
500 ionic_stop(netdev);
501
502 lif->ntxq_descs = ring->tx_pending;
503 lif->nrxq_descs = ring->rx_pending;
504
505 if (running)
506 ionic_open(netdev);
507 clear_bit(IONIC_LIF_F_QUEUE_RESET, lif->state);
508
509 return 0;
510}504}
511 505
512static void ionic_get_channels(struct net_device *netdev,506static void ionic_get_channels(struct net_device *netdev,
@@ -521,12 +515,17 @@ static void ionic_get_channels(struct net_device *netdev, · 8 unmodified lines
521 ch->combined_count = lif->nxqs;515 ch->combined_count = lif->nxqs;
522}516}
523 517
518static void ionic_set_queuecount(struct ionic_lif *lif, void *arg)
519{
520 struct ethtool_channels *ch = arg;
521
522 lif->nxqs = ch->combined_count;
523}
524
524static int ionic_set_channels(struct net_device *netdev,525static int ionic_set_channels(struct net_device *netdev,
525 struct ethtool_channels *ch)526 struct ethtool_channels *ch)
526{527{
527 struct ionic_lif *lif = netdev_priv(netdev);528 struct ionic_lif *lif = netdev_priv(netdev);
528 bool running;
529 int err;
530 529
531 if (!ch->combined_count || ch->other_count ||530 if (!ch->combined_count || ch->other_count ||
532 ch->rx_count || ch->tx_count)531 ch->rx_count || ch->tx_count)
@@ -535,21 +534,7 @@ static int ionic_set_channels(struct net_device *netdev, · 2 unmodified lines
535 if (ch->combined_count == lif->nxqs)534 if (ch->combined_count == lif->nxqs)
536 return 0;535 return 0;
537 536
538 err = ionic_wait_for_bit(lif, IONIC_LIF_F_QUEUE_RESET);537 return ionic_reset_queues(lif, ionic_set_queuecount, ch);
539 if (err)
540 return err;
541
542 running = test_bit(IONIC_LIF_F_UP, lif->state);
543 if (running)
544 ionic_stop(netdev);
545
546 lif->nxqs = ch->combined_count;
547
548 if (running)
549 ionic_open(netdev);
550 clear_bit(IONIC_LIF_F_QUEUE_RESET, lif->state);
551
552 return 0;
553}538}
554 539
555static u32 ionic_get_priv_flags(struct net_device *netdev)540static u32 ionic_get_priv_flags(struct net_device *netdev)
drivers/net/ethernet/pensando/ionic/ionic_lif.c+44−27
@@ -96,8 +96,7 @@ static void ionic_link_status_check(struct ionic_lif *lif) · 95 unmodified lines
96 u16 link_status;96 u16 link_status;
97 bool link_up;97 bool link_up;
98 98
99 if (!test_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state) ||99 if (!test_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state))
100 test_bit(IONIC_LIF_F_QUEUE_RESET, lif->state))
101 return;100 return;
102 101
103 link_status = le16_to_cpu(lif->info->status.link_status);102 link_status = le16_to_cpu(lif->info->status.link_status);
@@ -114,16 +113,22 @@ static void ionic_link_status_check(struct ionic_lif *lif) · 10 unmodified lines
114 netif_carrier_on(netdev);113 netif_carrier_on(netdev);
115 }114 }
116 115
117 if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev))116 if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev)) {
117 mutex_lock(&lif->queue_lock);
118 ionic_start_queues(lif);118 ionic_start_queues(lif);
119 mutex_unlock(&lif->queue_lock);
120 }
119 } else {121 } else {
120 if (netif_carrier_ok(netdev)) {122 if (netif_carrier_ok(netdev)) {
121 netdev_info(netdev, "Link down\n");123 netdev_info(netdev, "Link down\n");
122 netif_carrier_off(netdev);124 netif_carrier_off(netdev);
123 }125 }
124 126
125 if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev))127 if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev)) {
128 mutex_lock(&lif->queue_lock);
126 ionic_stop_queues(lif);129 ionic_stop_queues(lif);
130 mutex_unlock(&lif->queue_lock);
131 }
127 }132 }
128 133
129 clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);134 clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);
@@ -863,8 +868,7 @@ static int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr) · 733 unmodified lines
863 if (f)868 if (f)
864 return 0;869 return 0;
865 870
866 netdev_dbg(lif->netdev, "rx_filter add ADDR %pM (id %d)\n", addr,871 netdev_dbg(lif->netdev, "rx_filter add ADDR %pM\n", addr);
867 ctx.comp.rx_filter_add.filter_id);
868 872
869 memcpy(ctx.cmd.rx_filter_add.mac.addr, addr, ETH_ALEN);873 memcpy(ctx.cmd.rx_filter_add.mac.addr, addr, ETH_ALEN);
870 err = ionic_adminq_post_wait(lif, &ctx);874 err = ionic_adminq_post_wait(lif, &ctx);
@@ -893,6 +897,9 @@ static int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr) · 22 unmodified lines
893 return -ENOENT;897 return -ENOENT;
894 }898 }
895 899
900 netdev_dbg(lif->netdev, "rx_filter del ADDR %pM (id %d)\n",
901 addr, f->filter_id);
902
896 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);903 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);
897 ionic_rx_filter_free(lif, f);904 ionic_rx_filter_free(lif, f);
898 spin_unlock_bh(&lif->rx_filters.lock);905 spin_unlock_bh(&lif->rx_filters.lock);
@@ -901,9 +908,6 @@ static int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr) · 2 unmodified lines
901 if (err && err != -EEXIST)908 if (err && err != -EEXIST)
902 return err;909 return err;
903 910
904 netdev_dbg(lif->netdev, "rx_filter del ADDR %pM (id %d)\n", addr,
905 ctx.cmd.rx_filter_del.filter_id);
906
907 return 0;911 return 0;
908}912}
909 913
@@ -1313,7 +1317,7 @@ static int ionic_change_mtu(struct net_device *netdev, int new_mtu) · 403 unmodified lines
1313 return err;1317 return err;
1314 1318
1315 netdev->mtu = new_mtu;1319 netdev->mtu = new_mtu;
1316 err = ionic_reset_queues(lif);1320 err = ionic_reset_queues(lif, NULL, NULL);
1317 1321
1318 return err;1322 return err;
1319}1323}
@@ -1325,7 +1329,7 @@ static void ionic_tx_timeout_work(struct work_struct *ws) · 5 unmodified lines
1325 netdev_info(lif->netdev, "Tx Timeout recovery\n");1329 netdev_info(lif->netdev, "Tx Timeout recovery\n");
1326 1330
1327 rtnl_lock();1331 rtnl_lock();
1328 ionic_reset_queues(lif);1332 ionic_reset_queues(lif, NULL, NULL);
1329 rtnl_unlock();1333 rtnl_unlock();
1330}1334}
1331 1335
@@ -1351,13 +1355,11 @@ static int ionic_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, · 19 unmodified lines
1351 };1355 };
1352 int err;1356 int err;
1353 1357
1358 netdev_dbg(netdev, "rx_filter add VLAN %d\n", vid);
1354 err = ionic_adminq_post_wait(lif, &ctx);1359 err = ionic_adminq_post_wait(lif, &ctx);
1355 if (err)1360 if (err)
1356 return err;1361 return err;
1357 1362
1358 netdev_dbg(netdev, "rx_filter add VLAN %d (id %d)\n", vid,
1359 ctx.comp.rx_filter_add.filter_id);
1360
1361 return ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx);1363 return ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx);
1362}1364}
1363 1365
@@ -1382,8 +1384,8 @@ static int ionic_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, · 18 unmodified lines
1382 return -ENOENT;1384 return -ENOENT;
1383 }1385 }
1384 1386
1385 netdev_dbg(netdev, "rx_filter del VLAN %d (id %d)\n", vid,1387 netdev_dbg(netdev, "rx_filter del VLAN %d (id %d)\n",
1386 le32_to_cpu(ctx.cmd.rx_filter_del.filter_id));1388 vid, f->filter_id);
1387 1389
1388 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);1390 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);
1389 ionic_rx_filter_free(lif, f);1391 ionic_rx_filter_free(lif, f);
@@ -1673,6 +1675,14 @@ int ionic_open(struct net_device *netdev) · 283 unmodified lines
1673 if (err)1675 if (err)
1674 goto err_out;1676 goto err_out;
1675 1677
1678 err = netif_set_real_num_tx_queues(netdev, lif->nxqs);
1679 if (err)
1680 goto err_txrx_deinit;
1681
1682 err = netif_set_real_num_rx_queues(netdev, lif->nxqs);
1683 if (err)
1684 goto err_txrx_deinit;
1685
1676 /* don't start the queues until we have link */1686 /* don't start the queues until we have link */
1677 if (netif_carrier_ok(netdev)) {1687 if (netif_carrier_ok(netdev)) {
1678 err = ionic_start_queues(lif);1688 err = ionic_start_queues(lif);
@@ -1980,26 +1990,30 @@ static const struct net_device_ops ionic_netdev_ops = { · 301 unmodified lines
1980 .ndo_get_vf_stats = ionic_get_vf_stats,1990 .ndo_get_vf_stats = ionic_get_vf_stats,
1981};1991};
1982 1992
1983int ionic_reset_queues(struct ionic_lif *lif)1993int ionic_reset_queues(struct ionic_lif *lif, ionic_reset_cb cb, void *arg)
1984{1994{
1985 bool running;1995 bool running;
1986 int err = 0;1996 int err = 0;
1987 1997
1988 err = ionic_wait_for_bit(lif, IONIC_LIF_F_QUEUE_RESET);1998 mutex_lock(&lif->queue_lock);
1989 if (err)
1990 return err;
1991
1992 running = netif_running(lif->netdev);1999 running = netif_running(lif->netdev);
1993 if (running) {2000 if (running) {
1994 netif_device_detach(lif->netdev);2001 netif_device_detach(lif->netdev);
1995 err = ionic_stop(lif->netdev);2002 err = ionic_stop(lif->netdev);
2003 if (err)
2004 goto reset_out;
1996 }2005 }
1997 if (!err && running) {2006
1998 ionic_open(lif->netdev);2007 if (cb)
2008 cb(lif, arg);
2009
2010 if (running) {
2011 err = ionic_open(lif->netdev);
1999 netif_device_attach(lif->netdev);2012 netif_device_attach(lif->netdev);
2000 }2013 }
2001 2014
2002 clear_bit(IONIC_LIF_F_QUEUE_RESET, lif->state);2015reset_out:
2016 mutex_unlock(&lif->queue_lock);
2003 2017
2004 return err;2018 return err;
2005}2019}
@@ -2146,7 +2160,9 @@ static void ionic_lif_handle_fw_down(struct ionic_lif *lif) · 140 unmodified lines
2146 2160
2147 if (test_bit(IONIC_LIF_F_UP, lif->state)) {2161 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
2148 dev_info(ionic->dev, "Surprise FW stop, stopping queues\n");2162 dev_info(ionic->dev, "Surprise FW stop, stopping queues\n");
2163 mutex_lock(&lif->queue_lock);
2149 ionic_stop_queues(lif);2164 ionic_stop_queues(lif);
2165 mutex_unlock(&lif->queue_lock);
2150 }2166 }
2151 2167
2152 if (netif_running(lif->netdev)) {2168 if (netif_running(lif->netdev)) {
@@ -2265,15 +2281,15 @@ static void ionic_lif_deinit(struct ionic_lif *lif) · 112 unmodified lines
2265 cancel_work_sync(&lif->deferred.work);2281 cancel_work_sync(&lif->deferred.work);
2266 cancel_work_sync(&lif->tx_timeout_work);2282 cancel_work_sync(&lif->tx_timeout_work);
2267 ionic_rx_filters_deinit(lif);2283 ionic_rx_filters_deinit(lif);
2284 if (lif->netdev->features & NETIF_F_RXHASH)
2285 ionic_lif_rss_deinit(lif);
2268 }2286 }
2269 2287
2270 if (lif->netdev->features & NETIF_F_RXHASH)
2271 ionic_lif_rss_deinit(lif);
2272
2273 napi_disable(&lif->adminqcq->napi);2288 napi_disable(&lif->adminqcq->napi);
2274 ionic_lif_qcq_deinit(lif, lif->notifyqcq);2289 ionic_lif_qcq_deinit(lif, lif->notifyqcq);
2275 ionic_lif_qcq_deinit(lif, lif->adminqcq);2290 ionic_lif_qcq_deinit(lif, lif->adminqcq);
2276 2291
2292 mutex_destroy(&lif->queue_lock);
2277 ionic_lif_reset(lif);2293 ionic_lif_reset(lif);
2278}2294}
2279 2295
@@ -2450,6 +2466,7 @@ static int ionic_lif_init(struct ionic_lif *lif) · 170 unmodified lines
2450 return err;2466 return err;
2451 2467
2452 lif->hw_index = le16_to_cpu(comp.hw_index);2468 lif->hw_index = le16_to_cpu(comp.hw_index);
2469 mutex_init(&lif->queue_lock);
2453 2470
2454 /* now that we have the hw_index we can figure out our doorbell page */2471 /* now that we have the hw_index we can figure out our doorbell page */
2455 lif->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);2472 lif->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);
drivers/net/ethernet/pensando/ionic/ionic_lif.h+4−8
@@ -135,7 +135,6 @@ enum ionic_lif_state_flags { · 134 unmodified lines
135 IONIC_LIF_F_SW_DEBUG_STATS,135 IONIC_LIF_F_SW_DEBUG_STATS,
136 IONIC_LIF_F_UP,136 IONIC_LIF_F_UP,
137 IONIC_LIF_F_LINK_CHECK_REQUESTED,137 IONIC_LIF_F_LINK_CHECK_REQUESTED,
138 IONIC_LIF_F_QUEUE_RESET,
139 IONIC_LIF_F_FW_RESET,138 IONIC_LIF_F_FW_RESET,
140 139
141 /* leave this as last */140 /* leave this as last */
@@ -165,6 +164,7 @@ struct ionic_lif { · 23 unmodified lines
165 unsigned int hw_index;164 unsigned int hw_index;
166 unsigned int kern_pid;165 unsigned int kern_pid;
167 u64 __iomem *kern_dbpage;166 u64 __iomem *kern_dbpage;
167 struct mutex queue_lock; /* lock for queue structures */
168 spinlock_t adminq_lock; /* lock for AdminQ operations */168 spinlock_t adminq_lock; /* lock for AdminQ operations */
169 struct ionic_qcq *adminqcq;169 struct ionic_qcq *adminqcq;
170 struct ionic_qcq *notifyqcq;170 struct ionic_qcq *notifyqcq;
@@ -213,12 +213,6 @@ struct ionic_lif { · 42 unmodified lines
213#define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q)213#define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q)
214#define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q)214#define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q)
215 215
216/* return 0 if successfully set the bit, else non-zero */
217static inline int ionic_wait_for_bit(struct ionic_lif *lif, int bitname)
218{
219 return wait_on_bit_lock(lif->state, bitname, TASK_INTERRUPTIBLE);
220}
221
222static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)216static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)
223{217{
224 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);218 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);
@@ -248,6 +242,8 @@ static inline u32 ionic_coal_hw_to_usec(struct ionic *ionic, u32 units) · 23 unmodified lines
248 return (units * div) / mult;242 return (units * div) / mult;
249}243}
250 244
245typedef void (*ionic_reset_cb)(struct ionic_lif *lif, void *arg);
246
251void ionic_link_status_check_request(struct ionic_lif *lif);247void ionic_link_status_check_request(struct ionic_lif *lif);
252void ionic_get_stats64(struct net_device *netdev,248void ionic_get_stats64(struct net_device *netdev,
253 struct rtnl_link_stats64 *ns);249 struct rtnl_link_stats64 *ns);
@@ -267,7 +263,7 @@ int ionic_lif_rss_config(struct ionic_lif *lif, u16 types, · 13 unmodified lines
267 263
268int ionic_open(struct net_device *netdev);264int ionic_open(struct net_device *netdev);
269int ionic_stop(struct net_device *netdev);265int ionic_stop(struct net_device *netdev);
270int ionic_reset_queues(struct ionic_lif *lif);266int ionic_reset_queues(struct ionic_lif *lif, ionic_reset_cb cb, void *arg);
271 267
272static inline void debug_stats_txq_post(struct ionic_qcq *qcq,268static inline void debug_stats_txq_post(struct ionic_qcq *qcq,
273 struct ionic_txq_desc *desc, bool dbell)269 struct ionic_txq_desc *desc, bool dbell)
drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c+29−0
@@ -21,13 +21,16 @@ void ionic_rx_filter_free(struct ionic_lif *lif, struct ionic_rx_filter *f) · 20 unmodified lines
21void ionic_rx_filter_replay(struct ionic_lif *lif)21void ionic_rx_filter_replay(struct ionic_lif *lif)
22{22{
23 struct ionic_rx_filter_add_cmd *ac;23 struct ionic_rx_filter_add_cmd *ac;
24 struct hlist_head new_id_list;
24 struct ionic_admin_ctx ctx;25 struct ionic_admin_ctx ctx;
25 struct ionic_rx_filter *f;26 struct ionic_rx_filter *f;
26 struct hlist_head *head;27 struct hlist_head *head;
27 struct hlist_node *tmp;28 struct hlist_node *tmp;
29 unsigned int key;
28 unsigned int i;30 unsigned int i;
29 int err;31 int err;
30 32
33 INIT_HLIST_HEAD(&new_id_list);
31 ac = &ctx.cmd.rx_filter_add;34 ac = &ctx.cmd.rx_filter_add;
32 35
33 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {36 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
@@ -58,9 +61,30 @@ void ionic_rx_filter_replay(struct ionic_lif *lif) · 24 unmodified lines
58 ac->mac.addr);61 ac->mac.addr);
59 break;62 break;
60 }63 }
64 spin_lock_bh(&lif->rx_filters.lock);
65 ionic_rx_filter_free(lif, f);
66 spin_unlock_bh(&lif->rx_filters.lock);
67
68 continue;
61 }69 }
70
71 /* remove from old id list, save new id in tmp list */
72 spin_lock_bh(&lif->rx_filters.lock);
73 hlist_del(&f->by_id);
74 spin_unlock_bh(&lif->rx_filters.lock);
75 f->filter_id = le32_to_cpu(ctx.comp.rx_filter_add.filter_id);
76 hlist_add_head(&f->by_id, &new_id_list);
62 }77 }
63 }78 }
79
80 /* rebuild the by_id hash lists with the new filter ids */
81 spin_lock_bh(&lif->rx_filters.lock);
82 hlist_for_each_entry_safe(f, tmp, &new_id_list, by_id) {
83 key = f->filter_id & IONIC_RX_FILTER_HLISTS_MASK;
84 head = &lif->rx_filters.by_id[key];
85 hlist_add_head(&f->by_id, head);
86 }
87 spin_unlock_bh(&lif->rx_filters.lock);
64}88}
65 89
66int ionic_rx_filters_init(struct ionic_lif *lif)90int ionic_rx_filters_init(struct ionic_lif *lif)
@@ -69,10 +93,12 @@ int ionic_rx_filters_init(struct ionic_lif *lif) · 2 unmodified lines
69 93
70 spin_lock_init(&lif->rx_filters.lock);94 spin_lock_init(&lif->rx_filters.lock);
71 95
96 spin_lock_bh(&lif->rx_filters.lock);
72 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {97 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
73 INIT_HLIST_HEAD(&lif->rx_filters.by_hash[i]);98 INIT_HLIST_HEAD(&lif->rx_filters.by_hash[i]);
74 INIT_HLIST_HEAD(&lif->rx_filters.by_id[i]);99 INIT_HLIST_HEAD(&lif->rx_filters.by_id[i]);
75 }100 }
101 spin_unlock_bh(&lif->rx_filters.lock);
76 102
77 return 0;103 return 0;
78}104}
@@ -84,11 +110,13 @@ void ionic_rx_filters_deinit(struct ionic_lif *lif) · 5 unmodified lines
84 struct hlist_node *tmp;110 struct hlist_node *tmp;
85 unsigned int i;111 unsigned int i;
86 112
113 spin_lock_bh(&lif->rx_filters.lock);
87 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {114 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
88 head = &lif->rx_filters.by_id[i];115 head = &lif->rx_filters.by_id[i];
89 hlist_for_each_entry_safe(f, tmp, head, by_id)116 hlist_for_each_entry_safe(f, tmp, head, by_id)
90 ionic_rx_filter_free(lif, f);117 ionic_rx_filter_free(lif, f);
91 }118 }
119 spin_unlock_bh(&lif->rx_filters.lock);
92}120}
93 121
94int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,122int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,
@@ -124,6 +152,7 @@ int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index, · 29 unmodified lines
124 f->filter_id = le32_to_cpu(ctx->comp.rx_filter_add.filter_id);152 f->filter_id = le32_to_cpu(ctx->comp.rx_filter_add.filter_id);
125 f->rxq_index = rxq_index;153 f->rxq_index = rxq_index;
126 memcpy(&f->cmd, ac, sizeof(f->cmd));154 memcpy(&f->cmd, ac, sizeof(f->cmd));
155 netdev_dbg(lif->netdev, "rx_filter add filter_id %d\n", f->filter_id);
127 156
128 INIT_HLIST_NODE(&f->by_hash);157 INIT_HLIST_NODE(&f->by_hash);
129 INIT_HLIST_NODE(&f->by_id);158 INIT_HLIST_NODE(&f->by_id);
drivers/net/ethernet/pensando/ionic/ionic_txrx.c+0−6
@@ -161,12 +161,6 @@ static void ionic_rx_clean(struct ionic_queue *q, · 160 unmodified lines
161 return;161 return;
162 }162 }
163 163
164 /* no packet processing while resetting */
165 if (unlikely(test_bit(IONIC_LIF_F_QUEUE_RESET, q->lif->state))) {
166 stats->dropped++;
167 return;
168 }
169
170 stats->pkts++;164 stats->pkts++;
171 stats->bytes += le16_to_cpu(comp->len);165 stats->bytes += le16_to_cpu(comp->len);
172 166
drivers/net/ethernet/qlogic/qed/qed.h+2−0
@@ -876,6 +876,8 @@ struct qed_dev { · 875 unmodified lines
876 struct qed_dbg_feature dbg_features[DBG_FEATURE_NUM];876 struct qed_dbg_feature dbg_features[DBG_FEATURE_NUM];
877 u8 engine_for_debug;877 u8 engine_for_debug;
878 bool disable_ilt_dump;878 bool disable_ilt_dump;
879 bool dbg_bin_dump;
880
879 DECLARE_HASHTABLE(connections, 10);881 DECLARE_HASHTABLE(connections, 10);
880 const struct firmware *firmware;882 const struct firmware *firmware;
881 883
drivers/net/ethernet/qlogic/qed/qed_cxt.c+2−2
@@ -2008,8 +2008,8 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn, · 2007 unmodified lines
2008 enum protocol_type proto;2008 enum protocol_type proto;
2009 2009
2010 if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {2010 if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {
2011 DP_NOTICE(p_hwfn,2011 DP_VERBOSE(p_hwfn, QED_MSG_SP,
2012 "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");2012 "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
2013 p_hwfn->hw_info.personality = QED_PCI_ETH_ROCE;2013 p_hwfn->hw_info.personality = QED_PCI_ETH_ROCE;
2014 }2014 }
2015 2015
drivers/net/ethernet/qlogic/qed/qed_debug.c+16−1
@@ -7506,6 +7506,12 @@ static enum dbg_status format_feature(struct qed_hwfn *p_hwfn, · 7505 unmodified lines
7506 if (p_hwfn->cdev->print_dbg_data)7506 if (p_hwfn->cdev->print_dbg_data)
7507 qed_dbg_print_feature(text_buf, text_size_bytes);7507 qed_dbg_print_feature(text_buf, text_size_bytes);
7508 7508
7509 /* Just return the original binary buffer if requested */
7510 if (p_hwfn->cdev->dbg_bin_dump) {
7511 vfree(text_buf);
7512 return DBG_STATUS_OK;
7513 }
7514
7509 /* Free the old dump_buf and point the dump_buf to the newly allocagted7515 /* Free the old dump_buf and point the dump_buf to the newly allocagted
7510 * and formatted text buffer.7516 * and formatted text buffer.
7511 */7517 */
@@ -7733,7 +7739,9 @@ int qed_dbg_mcp_trace_size(struct qed_dev *cdev) · 221 unmodified lines
7733#define REGDUMP_HEADER_SIZE_SHIFT 07739#define REGDUMP_HEADER_SIZE_SHIFT 0
7734#define REGDUMP_HEADER_SIZE_MASK 0xffffff7740#define REGDUMP_HEADER_SIZE_MASK 0xffffff
7735#define REGDUMP_HEADER_FEATURE_SHIFT 247741#define REGDUMP_HEADER_FEATURE_SHIFT 24
7736#define REGDUMP_HEADER_FEATURE_MASK 0x3f7742#define REGDUMP_HEADER_FEATURE_MASK 0x1f
7743#define REGDUMP_HEADER_BIN_DUMP_SHIFT 29
7744#define REGDUMP_HEADER_BIN_DUMP_MASK 0x1
7737#define REGDUMP_HEADER_OMIT_ENGINE_SHIFT 307745#define REGDUMP_HEADER_OMIT_ENGINE_SHIFT 30
7738#define REGDUMP_HEADER_OMIT_ENGINE_MASK 0x17746#define REGDUMP_HEADER_OMIT_ENGINE_MASK 0x1
7739#define REGDUMP_HEADER_ENGINE_SHIFT 317747#define REGDUMP_HEADER_ENGINE_SHIFT 31
@@ -7771,6 +7779,7 @@ static u32 qed_calc_regdump_header(struct qed_dev *cdev, · 31 unmodified lines
7771 feature, feature_size);7779 feature, feature_size);
7772 7780
7773 SET_FIELD(res, REGDUMP_HEADER_FEATURE, feature);7781 SET_FIELD(res, REGDUMP_HEADER_FEATURE, feature);
7782 SET_FIELD(res, REGDUMP_HEADER_BIN_DUMP, 1);
7774 SET_FIELD(res, REGDUMP_HEADER_OMIT_ENGINE, omit_engine);7783 SET_FIELD(res, REGDUMP_HEADER_OMIT_ENGINE, omit_engine);
7775 SET_FIELD(res, REGDUMP_HEADER_ENGINE, engine);7784 SET_FIELD(res, REGDUMP_HEADER_ENGINE, engine);
7776 7785
@@ -7794,6 +7803,7 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) · 17 unmodified lines
7794 omit_engine = 1;7803 omit_engine = 1;
7795 7804
7796 mutex_lock(&qed_dbg_lock);7805 mutex_lock(&qed_dbg_lock);
7806 cdev->dbg_bin_dump = true;
7797 7807
7798 org_engine = qed_get_debug_engine(cdev);7808 org_engine = qed_get_debug_engine(cdev);
7799 for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) {7809 for (cur_engine = 0; cur_engine < cdev->num_hwfns; cur_engine++) {
@@ -7931,6 +7941,10 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) · 131 unmodified lines
7931 DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc);7941 DP_ERR(cdev, "qed_dbg_mcp_trace failed. rc = %d\n", rc);
7932 }7942 }
7933 7943
7944 /* Re-populate nvm attribute info */
7945 qed_mcp_nvm_info_free(p_hwfn);
7946 qed_mcp_nvm_info_populate(p_hwfn);
7947
7934 /* nvm cfg1 */7948 /* nvm cfg1 */
7935 rc = qed_dbg_nvm_image(cdev,7949 rc = qed_dbg_nvm_image(cdev,
7936 (u8 *)buffer + offset +7950 (u8 *)buffer + offset +
@@ -7993,6 +8007,7 @@ int qed_dbg_all_data(struct qed_dev *cdev, void *buffer) · 56 unmodified lines
7993 QED_NVM_IMAGE_MDUMP, "QED_NVM_IMAGE_MDUMP", rc);8007 QED_NVM_IMAGE_MDUMP, "QED_NVM_IMAGE_MDUMP", rc);
7994 }8008 }
7995 8009
8010 cdev->dbg_bin_dump = false;
7996 mutex_unlock(&qed_dbg_lock);8011 mutex_unlock(&qed_dbg_lock);
7997 8012
7998 return 0;8013 return 0;
drivers/net/ethernet/qlogic/qed/qed_dev.c+4−10
@@ -3102,7 +3102,7 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) · 3101 unmodified lines
3102 }3102 }
3103 3103
3104 /* Log and clear previous pglue_b errors if such exist */3104 /* Log and clear previous pglue_b errors if such exist */
3105 qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt);3105 qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt, true);
3106 3106
3107 /* Enable the PF's internal FID_enable in the PXP */3107 /* Enable the PF's internal FID_enable in the PXP */
3108 rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt,3108 rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt,
@@ -4472,12 +4472,6 @@ static int qed_get_dev_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) · 1363 unmodified lines
4472 return 0;4472 return 0;
4473}4473}
4474 4474
4475static void qed_nvm_info_free(struct qed_hwfn *p_hwfn)
4476{
4477 kfree(p_hwfn->nvm_info.image_att);
4478 p_hwfn->nvm_info.image_att = NULL;
4479}
4480
4481static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn,4475static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn,
4482 void __iomem *p_regview,4476 void __iomem *p_regview,
4483 void __iomem *p_doorbells,4477 void __iomem *p_doorbells,
@@ -4562,7 +4556,7 @@ static int qed_hw_prepare_single(struct qed_hwfn *p_hwfn, · 78 unmodified lines
4562 return rc;4556 return rc;
4563err3:4557err3:
4564 if (IS_LEAD_HWFN(p_hwfn))4558 if (IS_LEAD_HWFN(p_hwfn))
4565 qed_nvm_info_free(p_hwfn);4559 qed_mcp_nvm_info_free(p_hwfn);
4566err2:4560err2:
4567 if (IS_LEAD_HWFN(p_hwfn))4561 if (IS_LEAD_HWFN(p_hwfn))
4568 qed_iov_free_hw_info(p_hwfn->cdev);4562 qed_iov_free_hw_info(p_hwfn->cdev);
@@ -4623,7 +4617,7 @@ int qed_hw_prepare(struct qed_dev *cdev, · 54 unmodified lines
4623 if (rc) {4617 if (rc) {
4624 if (IS_PF(cdev)) {4618 if (IS_PF(cdev)) {
4625 qed_init_free(p_hwfn);4619 qed_init_free(p_hwfn);
4626 qed_nvm_info_free(p_hwfn);4620 qed_mcp_nvm_info_free(p_hwfn);
4627 qed_mcp_free(p_hwfn);4621 qed_mcp_free(p_hwfn);
4628 qed_hw_hwfn_free(p_hwfn);4622 qed_hw_hwfn_free(p_hwfn);
4629 }4623 }
@@ -4657,7 +4651,7 @@ void qed_hw_remove(struct qed_dev *cdev) · 27 unmodified lines
4657 4651
4658 qed_iov_free_hw_info(cdev);4652 qed_iov_free_hw_info(cdev);
4659 4653
4660 qed_nvm_info_free(p_hwfn);4654 qed_mcp_nvm_info_free(p_hwfn);
4661}4655}
4662 4656
4663static void qed_chain_free_next_ptr(struct qed_dev *cdev,4657static void qed_chain_free_next_ptr(struct qed_dev *cdev,
drivers/net/ethernet/qlogic/qed/qed_int.c+31−22
@@ -257,9 +257,10 @@ out: · 256 unmodified lines
257#define PGLUE_ATTENTION_ZLR_VALID (1 << 25)257#define PGLUE_ATTENTION_ZLR_VALID (1 << 25)
258#define PGLUE_ATTENTION_ILT_VALID (1 << 23)258#define PGLUE_ATTENTION_ILT_VALID (1 << 23)
259 259
260int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,260int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
261 struct qed_ptt *p_ptt)261 bool hw_init)
262{262{
263 char msg[256];
263 u32 tmp;264 u32 tmp;
264 265
265 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2);266 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2);
@@ -273,22 +274,23 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 7 unmodified lines
273 details = qed_rd(p_hwfn, p_ptt,274 details = qed_rd(p_hwfn, p_ptt,
274 PGLUE_B_REG_TX_ERR_WR_DETAILS);275 PGLUE_B_REG_TX_ERR_WR_DETAILS);
275 276
276 DP_NOTICE(p_hwfn,277 snprintf(msg, sizeof(msg),
277 "Illegal write by chip to [%08x:%08x] blocked.\n"278 "Illegal write by chip to [%08x:%08x] blocked.\n"
278 "Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n"279 "Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n"
279 "Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]\n",280 "Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]",
280 addr_hi, addr_lo, details,281 addr_hi, addr_lo, details,
281 (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID),282 (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID),
282 (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID),283 (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID),
283 GET_FIELD(details,284 !!GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VF_VALID),
284 PGLUE_ATTENTION_DETAILS_VF_VALID) ? 1 : 0,285 tmp,
285 tmp,286 !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_WAS_ERR),
286 GET_FIELD(tmp,287 !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_BME),
287 PGLUE_ATTENTION_DETAILS2_WAS_ERR) ? 1 : 0,288 !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_FID_EN));
288 GET_FIELD(tmp,289
289 PGLUE_ATTENTION_DETAILS2_BME) ? 1 : 0,290 if (hw_init)
290 GET_FIELD(tmp,291 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
291 PGLUE_ATTENTION_DETAILS2_FID_EN) ? 1 : 0);292 else
293 DP_NOTICE(p_hwfn, "%s\n", msg);
292 }294 }
293 295
294 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2);296 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2);
@@ -321,8 +323,14 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 26 unmodified lines
321 }323 }
322 324
323 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL);325 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL);
324 if (tmp & PGLUE_ATTENTION_ICPL_VALID)326 if (tmp & PGLUE_ATTENTION_ICPL_VALID) {
325 DP_NOTICE(p_hwfn, "ICPL error - %08x\n", tmp);327 snprintf(msg, sizeof(msg), "ICPL error - %08x", tmp);
328
329 if (hw_init)
330 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
331 else
332 DP_NOTICE(p_hwfn, "%s\n", msg);
333 }
326 334
327 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS);335 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS);
328 if (tmp & PGLUE_ATTENTION_ZLR_VALID) {336 if (tmp & PGLUE_ATTENTION_ZLR_VALID) {
@@ -361,7 +369,7 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 32 unmodified lines
361 369
362static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn)370static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn)
363{371{
364 return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt);372 return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt, false);
365}373}
366 374
367static int qed_fw_assertion(struct qed_hwfn *p_hwfn)375static int qed_fw_assertion(struct qed_hwfn *p_hwfn)
@@ -1193,7 +1201,8 @@ static int qed_int_attentions(struct qed_hwfn *p_hwfn) · 825 unmodified lines
1193 index, attn_bits, attn_acks, asserted_bits,1201 index, attn_bits, attn_acks, asserted_bits,
1194 deasserted_bits, p_sb_attn_sw->known_attn);1202 deasserted_bits, p_sb_attn_sw->known_attn);
1195 } else if (asserted_bits == 0x100) {1203 } else if (asserted_bits == 0x100) {
1196 DP_INFO(p_hwfn, "MFW indication via attention\n");1204 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
1205 "MFW indication via attention\n");
1197 } else {1206 } else {
1198 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,1207 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
1199 "MFW indication [deassertion]\n");1208 "MFW indication [deassertion]\n");
drivers/net/ethernet/qlogic/qed/qed_int.h+2−2
@@ -442,7 +442,7 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, · 441 unmodified lines
442 442
443#define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev))443#define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev))
444 444
445int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,445int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
446 struct qed_ptt *p_ptt);446 bool hw_init);
447 447
448#endif448#endif
drivers/net/ethernet/qlogic/qed/qed_mcp.c+7−0
@@ -3280,6 +3280,13 @@ err0: · 3279 unmodified lines
3280 return rc;3280 return rc;
3281}3281}
3282 3282
3283void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn)
3284{
3285 kfree(p_hwfn->nvm_info.image_att);
3286 p_hwfn->nvm_info.image_att = NULL;
3287 p_hwfn->nvm_info.valid = false;
3288}
3289
3283int3290int
3284qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,3291qed_mcp_get_nvm_image_att(struct qed_hwfn *p_hwfn,
3285 enum qed_nvm_images image_id,3292 enum qed_nvm_images image_id,
drivers/net/ethernet/qlogic/qed/qed_mcp.h+7−0
@@ -1220,6 +1220,13 @@ void qed_mcp_read_ufp_config(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); · 1219 unmodified lines
1220 */1220 */
1221int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);1221int qed_mcp_nvm_info_populate(struct qed_hwfn *p_hwfn);
1222 1222
1223/**
1224 * @brief Delete nvm info shadow in the given hardware function
1225 *
1226 * @param p_hwfn
1227 */
1228void qed_mcp_nvm_info_free(struct qed_hwfn *p_hwfn);
1229
1223/**1230/**
1224 * @brief Get the engine affinity configuration.1231 * @brief Get the engine affinity configuration.
1225 *1232 *
drivers/net/ethernet/qualcomm/rmnet/rmnet_config.c+13−5
@@ -47,15 +47,23 @@ static int rmnet_unregister_real_device(struct net_device *real_dev) · 46 unmodified lines
47 return 0;47 return 0;
48}48}
49 49
50static int rmnet_register_real_device(struct net_device *real_dev)50static int rmnet_register_real_device(struct net_device *real_dev,
51 struct netlink_ext_ack *extack)
51{52{
52 struct rmnet_port *port;53 struct rmnet_port *port;
53 int rc, entry;54 int rc, entry;
54 55
55 ASSERT_RTNL();56 ASSERT_RTNL();
56 57
57 if (rmnet_is_real_dev_registered(real_dev))58 if (rmnet_is_real_dev_registered(real_dev)) {
59 port = rmnet_get_port_rtnl(real_dev);
60 if (port->rmnet_mode != RMNET_EPMODE_VND) {
61 NL_SET_ERR_MSG_MOD(extack, "bridge device already exists");
62 return -EINVAL;
63 }
64
58 return 0;65 return 0;
66 }
59 67
60 port = kzalloc(sizeof(*port), GFP_KERNEL);68 port = kzalloc(sizeof(*port), GFP_KERNEL);
61 if (!port)69 if (!port)
@@ -133,7 +141,7 @@ static int rmnet_newlink(struct net *src_net, struct net_device *dev, · 71 unmodified lines
133 141
134 mux_id = nla_get_u16(data[IFLA_RMNET_MUX_ID]);142 mux_id = nla_get_u16(data[IFLA_RMNET_MUX_ID]);
135 143
136 err = rmnet_register_real_device(real_dev);144 err = rmnet_register_real_device(real_dev, extack);
137 if (err)145 if (err)
138 goto err0;146 goto err0;
139 147
@@ -422,7 +430,7 @@ int rmnet_add_bridge(struct net_device *rmnet_dev, · 282 unmodified lines
422 }430 }
423 431
424 if (port->rmnet_mode != RMNET_EPMODE_VND) {432 if (port->rmnet_mode != RMNET_EPMODE_VND) {
425 NL_SET_ERR_MSG_MOD(extack, "bridge device already exists");433 NL_SET_ERR_MSG_MOD(extack, "more than one bridge dev attached");
426 return -EINVAL;434 return -EINVAL;
427 }435 }
428 436
@@ -433,7 +441,7 @@ int rmnet_add_bridge(struct net_device *rmnet_dev, · 4 unmodified lines
433 return -EBUSY;441 return -EBUSY;
434 }442 }
435 443
436 err = rmnet_register_real_device(slave_dev);444 err = rmnet_register_real_device(slave_dev, extack);
437 if (err)445 if (err)
438 return -EBUSY;446 return -EBUSY;
439 447
drivers/net/ethernet/renesas/ravb_main.c+24−2
@@ -1450,6 +1450,7 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 1449 unmodified lines
1450 struct ravb_private *priv = container_of(work, struct ravb_private,1450 struct ravb_private *priv = container_of(work, struct ravb_private,
1451 work);1451 work);
1452 struct net_device *ndev = priv->ndev;1452 struct net_device *ndev = priv->ndev;
1453 int error;
1453 1454
1454 netif_tx_stop_all_queues(ndev);1455 netif_tx_stop_all_queues(ndev);
1455 1456
@@ -1458,15 +1459,36 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 2 unmodified lines
1458 ravb_ptp_stop(ndev);1459 ravb_ptp_stop(ndev);
1459 1460
1460 /* Wait for DMA stopping */1461 /* Wait for DMA stopping */
1461 ravb_stop_dma(ndev);1462 if (ravb_stop_dma(ndev)) {
1463 /* If ravb_stop_dma() fails, the hardware is still operating
1464 * for TX and/or RX. So, this should not call the following
1465 * functions because ravb_dmac_init() is possible to fail too.
1466 * Also, this should not retry ravb_stop_dma() again and again
1467 * here because it's possible to wait forever. So, this just
1468 * re-enables the TX and RX and skip the following
1469 * re-initialization procedure.
1470 */
1471 ravb_rcv_snd_enable(ndev);
1472 goto out;
1473 }
1462 1474
1463 ravb_ring_free(ndev, RAVB_BE);1475 ravb_ring_free(ndev, RAVB_BE);
1464 ravb_ring_free(ndev, RAVB_NC);1476 ravb_ring_free(ndev, RAVB_NC);
1465 1477
1466 /* Device init */1478 /* Device init */
1467 ravb_dmac_init(ndev);1479 error = ravb_dmac_init(ndev);
1480 if (error) {
1481 /* If ravb_dmac_init() fails, descriptors are freed. So, this
1482 * should return here to avoid re-enabling the TX and RX in
1483 * ravb_emac_init().
1484 */
1485 netdev_err(ndev, "%s: ravb_dmac_init() failed, error %d\n",
1486 __func__, error);
1487 return;
1488 }
1468 ravb_emac_init(ndev);1489 ravb_emac_init(ndev);
1469 1490
1491out:
1470 /* Initialise PTP Clock driver */1492 /* Initialise PTP Clock driver */
1471 if (priv->chip_id == RCAR_GEN2)1493 if (priv->chip_id == RCAR_GEN2)
1472 ravb_ptp_init(ndev, priv->pdev);1494 ravb_ptp_init(ndev, priv->pdev);
drivers/net/ethernet/smsc/smc91x.c+2−2
@@ -2274,7 +2274,7 @@ static int smc_drv_probe(struct platform_device *pdev) · 2273 unmodified lines
2274 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,2274 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2275 "power", 0, 0, 100);2275 "power", 0, 0, 100);
2276 if (ret)2276 if (ret)
2277 return ret;2277 goto out_free_netdev;
2278 2278
2279 /*2279 /*
2280 * Optional reset GPIO configured? Minimum 100 ns reset needed2280 * Optional reset GPIO configured? Minimum 100 ns reset needed
@@ -2283,7 +2283,7 @@ static int smc_drv_probe(struct platform_device *pdev) · 2 unmodified lines
2283 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,2283 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2284 "reset", 0, 0, 100);2284 "reset", 0, 0, 100);
2285 if (ret)2285 if (ret)
2286 return ret;2286 goto out_free_netdev;
2287 2287
2288 /*2288 /*
2289 * Need to wait for optional EEPROM to load, max 750 us according2289 * Need to wait for optional EEPROM to load, max 750 us according
drivers/net/ethernet/socionext/sni_ave.c+1−1
@@ -1191,7 +1191,7 @@ static int ave_init(struct net_device *ndev) · 1190 unmodified lines
1191 ret = regmap_update_bits(priv->regmap, SG_ETPINMODE,1191 ret = regmap_update_bits(priv->regmap, SG_ETPINMODE,
1192 priv->pinmode_mask, priv->pinmode_val);1192 priv->pinmode_mask, priv->pinmode_val);
1193 if (ret)1193 if (ret)
1194 return ret;1194 goto out_reset_assert;
1195 1195
1196 ave_global_reset(ndev);1196 ave_global_reset(ndev);
1197 1197
drivers/net/ethernet/ti/am65-cpsw-nuss.c+2−1
@@ -1850,7 +1850,8 @@ static int am65_cpsw_nuss_init_ndev_2g(struct am65_cpsw_common *common) · 1849 unmodified lines
1850 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;1850 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
1851 port->ndev->hw_features = NETIF_F_SG |1851 port->ndev->hw_features = NETIF_F_SG |
1852 NETIF_F_RXCSUM |1852 NETIF_F_RXCSUM |
1853 NETIF_F_HW_CSUM;1853 NETIF_F_HW_CSUM |
1854 NETIF_F_HW_TC;
1854 port->ndev->features = port->ndev->hw_features |1855 port->ndev->features = port->ndev->hw_features |
1855 NETIF_F_HW_VLAN_CTAG_FILTER;1856 NETIF_F_HW_VLAN_CTAG_FILTER;
1856 port->ndev->vlan_features |= NETIF_F_SG;1857 port->ndev->vlan_features |= NETIF_F_SG;
drivers/net/geneve.c+1−1
@@ -1615,11 +1615,11 @@ static int geneve_changelink(struct net_device *dev, struct nlattr *tb[], · 1614 unmodified lines
1615 struct netlink_ext_ack *extack)1615 struct netlink_ext_ack *extack)
1616{1616{
1617 struct geneve_dev *geneve = netdev_priv(dev);1617 struct geneve_dev *geneve = netdev_priv(dev);
1618 enum ifla_geneve_df df = geneve->df;
1618 struct geneve_sock *gs4, *gs6;1619 struct geneve_sock *gs4, *gs6;
1619 struct ip_tunnel_info info;1620 struct ip_tunnel_info info;
1620 bool metadata;1621 bool metadata;
1621 bool use_udp6_rx_checksums;1622 bool use_udp6_rx_checksums;
1622 enum ifla_geneve_df df;
1623 bool ttl_inherit;1623 bool ttl_inherit;
1624 int err;1624 int err;
1625 1625
drivers/net/hippi/rrunner.c+1−1
@@ -1242,7 +1242,7 @@ static int rr_open(struct net_device *dev) · 1241 unmodified lines
1242 rrpriv->info = NULL;1242 rrpriv->info = NULL;
1243 }1243 }
1244 if (rrpriv->rx_ctrl) {1244 if (rrpriv->rx_ctrl) {
1245 pci_free_consistent(pdev, sizeof(struct ring_ctrl),1245 pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
1246 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);1246 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
1247 rrpriv->rx_ctrl = NULL;1247 rrpriv->rx_ctrl = NULL;
1248 }1248 }
drivers/net/ieee802154/adf7242.c+4−2
@@ -4,7 +4,7 @@ · 3 unmodified lines
4 *4 *
5 * Copyright 2009-2017 Analog Devices Inc.5 * Copyright 2009-2017 Analog Devices Inc.
6 *6 *
7 * http://www.analog.com/ADF72427 * https://www.analog.com/ADF7242
8 */8 */
9 9
10#include <linux/kernel.h>10#include <linux/kernel.h>
@@ -1262,7 +1262,7 @@ static int adf7242_probe(struct spi_device *spi) · 1251 unmodified lines
1262 WQ_MEM_RECLAIM);1262 WQ_MEM_RECLAIM);
1263 if (unlikely(!lp->wqueue)) {1263 if (unlikely(!lp->wqueue)) {
1264 ret = -ENOMEM;1264 ret = -ENOMEM;
1265 goto err_hw_init;1265 goto err_alloc_wq;
1266 }1266 }
1267 1267
1268 ret = adf7242_hw_init(lp);1268 ret = adf7242_hw_init(lp);
@@ -1294,6 +1294,8 @@ static int adf7242_probe(struct spi_device *spi) · 25 unmodified lines
1294 return ret;1294 return ret;
1295 1295
1296err_hw_init:1296err_hw_init:
1297 destroy_workqueue(lp->wqueue);
1298err_alloc_wq:
1297 mutex_destroy(&lp->bmux);1299 mutex_destroy(&lp->bmux);
1298 ieee802154_free_hw(lp->hw);1300 ieee802154_free_hw(lp->hw);
1299 1301
drivers/net/ipa/gsi.c+7−9
@@ -500,6 +500,13 @@ static int gsi_channel_stop_command(struct gsi_channel *channel) · 499 unmodified lines
500 int ret;500 int ret;
501 501
502 state = gsi_channel_state(channel);502 state = gsi_channel_state(channel);
503
504 /* Channel could have entered STOPPED state since last call
505 * if it timed out. If so, we're done.
506 */
507 if (state == GSI_CHANNEL_STATE_STOPPED)
508 return 0;
509
503 if (state != GSI_CHANNEL_STATE_STARTED &&510 if (state != GSI_CHANNEL_STATE_STARTED &&
504 state != GSI_CHANNEL_STATE_STOP_IN_PROC)511 state != GSI_CHANNEL_STATE_STOP_IN_PROC)
505 return -EINVAL;512 return -EINVAL;
@@ -789,20 +796,11 @@ int gsi_channel_start(struct gsi *gsi, u32 channel_id) · 283 unmodified lines
789int gsi_channel_stop(struct gsi *gsi, u32 channel_id)796int gsi_channel_stop(struct gsi *gsi, u32 channel_id)
790{797{
791 struct gsi_channel *channel = &gsi->channel[channel_id];798 struct gsi_channel *channel = &gsi->channel[channel_id];
792 enum gsi_channel_state state;
793 u32 retries;799 u32 retries;
794 int ret;800 int ret;
795 801
796 gsi_channel_freeze(channel);802 gsi_channel_freeze(channel);
797 803
798 /* Channel could have entered STOPPED state since last call if the
799 * STOP command timed out. We won't stop a channel if stopping it
800 * was successful previously (so we still want the freeze above).
801 */
802 state = gsi_channel_state(channel);
803 if (state == GSI_CHANNEL_STATE_STOPPED)
804 return 0;
805
806 /* RX channels might require a little time to enter STOPPED state */804 /* RX channels might require a little time to enter STOPPED state */
807 retries = channel->toward_ipa ? 0 : GSI_CHANNEL_STOP_RX_RETRIES;805 retries = channel->toward_ipa ? 0 : GSI_CHANNEL_STOP_RX_RETRIES;
808 806
drivers/net/ipa/ipa_cmd.c+15−0
@@ -586,6 +586,21 @@ u32 ipa_cmd_tag_process_count(void) · 585 unmodified lines
586 return 4;586 return 4;
587}587}
588 588
589void ipa_cmd_tag_process(struct ipa *ipa)
590{
591 u32 count = ipa_cmd_tag_process_count();
592 struct gsi_trans *trans;
593
594 trans = ipa_cmd_trans_alloc(ipa, count);
595 if (trans) {
596 ipa_cmd_tag_process_add(trans);
597 gsi_trans_commit_wait(trans);
598 } else {
599 dev_err(&ipa->pdev->dev,
600 "error allocating %u entry tag transaction\n", count);
601 }
602}
603
589static struct ipa_cmd_info *604static struct ipa_cmd_info *
590ipa_cmd_info_alloc(struct ipa_endpoint *endpoint, u32 tre_count)605ipa_cmd_info_alloc(struct ipa_endpoint *endpoint, u32 tre_count)
591{606{
drivers/net/ipa/ipa_cmd.h+8−0
@@ -171,6 +171,14 @@ void ipa_cmd_tag_process_add(struct gsi_trans *trans); · 170 unmodified lines
171 */171 */
172u32 ipa_cmd_tag_process_count(void);172u32 ipa_cmd_tag_process_count(void);
173 173
174/**
175 * ipa_cmd_tag_process() - Perform a tag process
176 *
177 * @Return: The number of elements to allocate in a transaction
178 * to hold tag process commands
179 */
180void ipa_cmd_tag_process(struct ipa *ipa);
181
174/**182/**
175 * ipa_cmd_trans_alloc() - Allocate a transaction for the command TX endpoint183 * ipa_cmd_trans_alloc() - Allocate a transaction for the command TX endpoint
176 * @ipa: IPA pointer184 * @ipa: IPA pointer
drivers/net/ipa/ipa_data-sdm845.c+0−1
@@ -44,7 +44,6 @@ static const struct ipa_gsi_endpoint_data ipa_gsi_endpoint_data[] = { · 43 unmodified lines
44 .endpoint = {44 .endpoint = {
45 .seq_type = IPA_SEQ_INVALID,45 .seq_type = IPA_SEQ_INVALID,
46 .config = {46 .config = {
47 .checksum = true,
48 .aggregation = true,47 .aggregation = true,
49 .status_enable = true,48 .status_enable = true,
50 .rx = {49 .rx = {
drivers/net/ipa/ipa_endpoint.c+2−0
@@ -1450,6 +1450,8 @@ void ipa_endpoint_suspend(struct ipa *ipa) · 1449 unmodified lines
1450 if (ipa->modem_netdev)1450 if (ipa->modem_netdev)
1451 ipa_modem_suspend(ipa->modem_netdev);1451 ipa_modem_suspend(ipa->modem_netdev);
1452 1452
1453 ipa_cmd_tag_process(ipa);
1454
1453 ipa_endpoint_suspend_one(ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]);1455 ipa_endpoint_suspend_one(ipa->name_map[IPA_ENDPOINT_AP_LAN_RX]);
1454 ipa_endpoint_suspend_one(ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]);1456 ipa_endpoint_suspend_one(ipa->name_map[IPA_ENDPOINT_AP_COMMAND_TX]);
1455}1457}
drivers/net/ipa/ipa_gsi.c+1−0
@@ -6,6 +6,7 @@ · 5 unmodified lines
6 6
7#include <linux/types.h>7#include <linux/types.h>
8 8
9#include "ipa_gsi.h"
9#include "gsi_trans.h"10#include "gsi_trans.h"
10#include "ipa.h"11#include "ipa.h"
11#include "ipa_endpoint.h"12#include "ipa_endpoint.h"
drivers/net/ipa/ipa_gsi.h+2−0
@@ -8,7 +8,9 @@ · 7 unmodified lines
8 8
9#include <linux/types.h>9#include <linux/types.h>
10 10
11struct gsi;
11struct gsi_trans;12struct gsi_trans;
13struct ipa_gsi_endpoint_data;
12 14
13/**15/**
14 * ipa_gsi_trans_complete() - GSI transaction completion callback16 * ipa_gsi_trans_complete() - GSI transaction completion callback
drivers/net/ipa/ipa_qmi_msg.c+3−3
@@ -119,7 +119,7 @@ struct qmi_elem_info ipa_driver_init_complete_rsp_ei[] = { · 118 unmodified lines
119 sizeof_field(struct ipa_driver_init_complete_rsp,119 sizeof_field(struct ipa_driver_init_complete_rsp,
120 rsp),120 rsp),
121 .tlv_type = 0x02,121 .tlv_type = 0x02,
122 .elem_size = offsetof(struct ipa_driver_init_complete_rsp,122 .offset = offsetof(struct ipa_driver_init_complete_rsp,
123 rsp),123 rsp),
124 .ei_array = qmi_response_type_v01_ei,124 .ei_array = qmi_response_type_v01_ei,
125 },125 },
@@ -137,7 +137,7 @@ struct qmi_elem_info ipa_init_complete_ind_ei[] = { · 11 unmodified lines
137 sizeof_field(struct ipa_init_complete_ind,137 sizeof_field(struct ipa_init_complete_ind,
138 status),138 status),
139 .tlv_type = 0x02,139 .tlv_type = 0x02,
140 .elem_size = offsetof(struct ipa_init_complete_ind,140 .offset = offsetof(struct ipa_init_complete_ind,
141 status),141 status),
142 .ei_array = qmi_response_type_v01_ei,142 .ei_array = qmi_response_type_v01_ei,
143 },143 },
@@ -218,7 +218,7 @@ struct qmi_elem_info ipa_init_modem_driver_req_ei[] = { · 74 unmodified lines
218 sizeof_field(struct ipa_init_modem_driver_req,218 sizeof_field(struct ipa_init_modem_driver_req,
219 platform_type_valid),219 platform_type_valid),
220 .tlv_type = 0x10,220 .tlv_type = 0x10,
221 .elem_size = offsetof(struct ipa_init_modem_driver_req,221 .offset = offsetof(struct ipa_init_modem_driver_req,
222 platform_type_valid),222 platform_type_valid),
223 },223 },
224 {224 {
drivers/net/macsec.c+2−3
@@ -4052,9 +4052,8 @@ static int macsec_newlink(struct net *net, struct net_device *dev, · 4051 unmodified lines
4052 return err;4052 return err;
4053 4053
4054 netdev_lockdep_set_classes(dev);4054 netdev_lockdep_set_classes(dev);
4055 lockdep_set_class_and_subclass(&dev->addr_list_lock,4055 lockdep_set_class(&dev->addr_list_lock,
4056 &macsec_netdev_addr_lock_key,4056 &macsec_netdev_addr_lock_key);
4057 dev->lower_level);
4058 4057
4059 err = netdev_upper_dev_link(real_dev, dev, extack);4058 err = netdev_upper_dev_link(real_dev, dev, extack);
4060 if (err < 0)4059 if (err < 0)
drivers/net/macvlan.c+2−3
@@ -880,9 +880,8 @@ static struct lock_class_key macvlan_netdev_addr_lock_key; · 879 unmodified lines
880static void macvlan_set_lockdep_class(struct net_device *dev)880static void macvlan_set_lockdep_class(struct net_device *dev)
881{881{
882 netdev_lockdep_set_classes(dev);882 netdev_lockdep_set_classes(dev);
883 lockdep_set_class_and_subclass(&dev->addr_list_lock,883 lockdep_set_class(&dev->addr_list_lock,
884 &macvlan_netdev_addr_lock_key,884 &macvlan_netdev_addr_lock_key);
885 dev->lower_level);
886}885}
887 886
888static int macvlan_init(struct net_device *dev)887static int macvlan_init(struct net_device *dev)
drivers/net/netdevsim/netdev.c+2−2
@@ -302,7 +302,7 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port) · 301 unmodified lines
302 rtnl_lock();302 rtnl_lock();
303 err = nsim_bpf_init(ns);303 err = nsim_bpf_init(ns);
304 if (err)304 if (err)
305 goto err_free_netdev;305 goto err_rtnl_unlock;
306 306
307 nsim_ipsec_init(ns);307 nsim_ipsec_init(ns);
308 308
@@ -316,8 +316,8 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port) · 7 unmodified lines
316err_ipsec_teardown:316err_ipsec_teardown:
317 nsim_ipsec_teardown(ns);317 nsim_ipsec_teardown(ns);
318 nsim_bpf_uninit(ns);318 nsim_bpf_uninit(ns);
319err_rtnl_unlock:
319 rtnl_unlock();320 rtnl_unlock();
320err_free_netdev:
321 free_netdev(dev);321 free_netdev(dev);
322 return ERR_PTR(err);322 return ERR_PTR(err);
323}323}
drivers/net/phy/dp83640.c+4−0
@@ -1260,6 +1260,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1259 unmodified lines
1260 dp83640->hwts_rx_en = 1;1260 dp83640->hwts_rx_en = 1;
1261 dp83640->layer = PTP_CLASS_L4;1261 dp83640->layer = PTP_CLASS_L4;
1262 dp83640->version = PTP_CLASS_V1;1262 dp83640->version = PTP_CLASS_V1;
1263 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
1263 break;1264 break;
1264 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:1265 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1265 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:1266 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
@@ -1267,6 +1268,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
1267 dp83640->hwts_rx_en = 1;1268 dp83640->hwts_rx_en = 1;
1268 dp83640->layer = PTP_CLASS_L4;1269 dp83640->layer = PTP_CLASS_L4;
1269 dp83640->version = PTP_CLASS_V2;1270 dp83640->version = PTP_CLASS_V2;
1271 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
1270 break;1272 break;
1271 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:1273 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1272 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:1274 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
@@ -1274,6 +1276,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
1274 dp83640->hwts_rx_en = 1;1276 dp83640->hwts_rx_en = 1;
1275 dp83640->layer = PTP_CLASS_L2;1277 dp83640->layer = PTP_CLASS_L2;
1276 dp83640->version = PTP_CLASS_V2;1278 dp83640->version = PTP_CLASS_V2;
1279 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
1277 break;1280 break;
1278 case HWTSTAMP_FILTER_PTP_V2_EVENT:1281 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1279 case HWTSTAMP_FILTER_PTP_V2_SYNC:1282 case HWTSTAMP_FILTER_PTP_V2_SYNC:
@@ -1281,6 +1284,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
1281 dp83640->hwts_rx_en = 1;1284 dp83640->hwts_rx_en = 1;
1282 dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2;1285 dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2;
1283 dp83640->version = PTP_CLASS_V2;1286 dp83640->version = PTP_CLASS_V2;
1287 cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
1284 break;1288 break;
1285 default:1289 default:
1286 return -ERANGE;1290 return -ERANGE;
drivers/net/tun.c+2−0
@@ -62,6 +62,7 @@ · 61 unmodified lines
62#include <net/rtnetlink.h>62#include <net/rtnetlink.h>
63#include <net/sock.h>63#include <net/sock.h>
64#include <net/xdp.h>64#include <net/xdp.h>
65#include <net/ip_tunnels.h>
65#include <linux/seq_file.h>66#include <linux/seq_file.h>
66#include <linux/uio.h>67#include <linux/uio.h>
67#include <linux/skb_array.h>68#include <linux/skb_array.h>
@@ -1351,6 +1352,7 @@ static void tun_net_init(struct net_device *dev) · 1283 unmodified lines
1351 switch (tun->flags & TUN_TYPE_MASK) {1352 switch (tun->flags & TUN_TYPE_MASK) {
1352 case IFF_TUN:1353 case IFF_TUN:
1353 dev->netdev_ops = &tun_netdev_ops;1354 dev->netdev_ops = &tun_netdev_ops;
1355 dev->header_ops = &ip_tunnel_header_ops;
1354 1356
1355 /* Point-to-Point TUN Device */1357 /* Point-to-Point TUN Device */
1356 dev->hard_header_len = 0;1358 dev->hard_header_len = 0;
drivers/net/usb/ax88172a.c+1−0
@@ -187,6 +187,7 @@ static int ax88172a_bind(struct usbnet *dev, struct usb_interface *intf) · 186 unmodified lines
187 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);187 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
188 if (ret < ETH_ALEN) {188 if (ret < ETH_ALEN) {
189 netdev_err(dev->net, "Failed to read MAC address: %d\n", ret);189 netdev_err(dev->net, "Failed to read MAC address: %d\n", ret);
190 ret = -EIO;
190 goto free;191 goto free;
191 }192 }
192 memcpy(dev->net->dev_addr, buf, ETH_ALEN);193 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
drivers/net/usb/hso.c+7−3
@@ -1390,8 +1390,9 @@ static void hso_serial_set_termios(struct tty_struct *tty, struct ktermios *old) · 1389 unmodified lines
1390 unsigned long flags;1390 unsigned long flags;
1391 1391
1392 if (old)1392 if (old)
1393 hso_dbg(0x16, "Termios called with: cflags new[%d] - old[%d]\n",1393 hso_dbg(0x16, "Termios called with: cflags new[%u] - old[%u]\n",
1394 tty->termios.c_cflag, old->c_cflag);1394 (unsigned int)tty->termios.c_cflag,
1395 (unsigned int)old->c_cflag);
1395 1396
1396 /* the actual setup */1397 /* the actual setup */
1397 spin_lock_irqsave(&serial->serial_lock, flags);1398 spin_lock_irqsave(&serial->serial_lock, flags);
@@ -2260,12 +2261,14 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs, · 862 unmodified lines
2260 2261
2261 minor = get_free_serial_index();2262 minor = get_free_serial_index();
2262 if (minor < 0)2263 if (minor < 0)
2263 goto exit;2264 goto exit2;
2264 2265
2265 /* register our minor number */2266 /* register our minor number */
2266 serial->parent->dev = tty_port_register_device_attr(&serial->port,2267 serial->parent->dev = tty_port_register_device_attr(&serial->port,
2267 tty_drv, minor, &serial->parent->interface->dev,2268 tty_drv, minor, &serial->parent->interface->dev,
2268 serial->parent, hso_serial_dev_groups);2269 serial->parent, hso_serial_dev_groups);
2270 if (IS_ERR(serial->parent->dev))
2271 goto exit2;
2269 2272
2270 /* fill in specific data for later use */2273 /* fill in specific data for later use */
2271 serial->minor = minor;2274 serial->minor = minor;
@@ -2310,6 +2313,7 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs, · 38 unmodified lines
2310 return 0;2313 return 0;
2311exit:2314exit:
2312 hso_serial_tty_unregister(serial);2315 hso_serial_tty_unregister(serial);
2316exit2:
2313 hso_serial_common_free(serial);2317 hso_serial_common_free(serial);
2314 return -1;2318 return -1;
2315}2319}
drivers/net/usb/lan78xx.c+31−82
@@ -377,10 +377,6 @@ struct lan78xx_net { · 376 unmodified lines
377 struct tasklet_struct bh;377 struct tasklet_struct bh;
378 struct delayed_work wq;378 struct delayed_work wq;
379 379
380 struct usb_host_endpoint *ep_blkin;
381 struct usb_host_endpoint *ep_blkout;
382 struct usb_host_endpoint *ep_intr;
383
384 int msg_enable;380 int msg_enable;
385 381
386 struct urb *urb_intr;382 struct urb *urb_intr;
@@ -2860,78 +2856,12 @@ lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net) · 2473 unmodified lines
2860 return NETDEV_TX_OK;2856 return NETDEV_TX_OK;
2861}2857}
2862 2858
2863static int
2864lan78xx_get_endpoints(struct lan78xx_net *dev, struct usb_interface *intf)
2865{
2866 int tmp;
2867 struct usb_host_interface *alt = NULL;
2868 struct usb_host_endpoint *in = NULL, *out = NULL;
2869 struct usb_host_endpoint *status = NULL;
2870
2871 for (tmp = 0; tmp < intf->num_altsetting; tmp++) {
2872 unsigned ep;
2873
2874 in = NULL;
2875 out = NULL;
2876 status = NULL;
2877 alt = intf->altsetting + tmp;
2878
2879 for (ep = 0; ep < alt->desc.bNumEndpoints; ep++) {
2880 struct usb_host_endpoint *e;
2881 int intr = 0;
2882
2883 e = alt->endpoint + ep;
2884 switch (e->desc.bmAttributes) {
2885 case USB_ENDPOINT_XFER_INT:
2886 if (!usb_endpoint_dir_in(&e->desc))
2887 continue;
2888 intr = 1;
2889 /* FALLTHROUGH */
2890 case USB_ENDPOINT_XFER_BULK:
2891 break;
2892 default:
2893 continue;
2894 }
2895 if (usb_endpoint_dir_in(&e->desc)) {
2896 if (!intr && !in)
2897 in = e;
2898 else if (intr && !status)
2899 status = e;
2900 } else {
2901 if (!out)
2902 out = e;
2903 }
2904 }
2905 if (in && out)
2906 break;
2907 }
2908 if (!alt || !in || !out)
2909 return -EINVAL;
2910
2911 dev->pipe_in = usb_rcvbulkpipe(dev->udev,
2912 in->desc.bEndpointAddress &
2913 USB_ENDPOINT_NUMBER_MASK);
2914 dev->pipe_out = usb_sndbulkpipe(dev->udev,
2915 out->desc.bEndpointAddress &
2916 USB_ENDPOINT_NUMBER_MASK);
2917 dev->ep_intr = status;
2918
2919 return 0;
2920}
2921
2922static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)2859static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf)
2923{2860{
2924 struct lan78xx_priv *pdata = NULL;2861 struct lan78xx_priv *pdata = NULL;
2925 int ret;2862 int ret;
2926 int i;2863 int i;
2927 2864
2928 ret = lan78xx_get_endpoints(dev, intf);
2929 if (ret) {
2930 netdev_warn(dev->net, "lan78xx_get_endpoints failed: %d\n",
2931 ret);
2932 return ret;
2933 }
2934
2935 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);2865 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL);
2936 2866
2937 pdata = (struct lan78xx_priv *)(dev->data[0]);2867 pdata = (struct lan78xx_priv *)(dev->data[0]);
@@ -3700,6 +3630,7 @@ static void lan78xx_stat_monitor(struct timer_list *t) · 762 unmodified lines
3700static int lan78xx_probe(struct usb_interface *intf,3630static int lan78xx_probe(struct usb_interface *intf,
3701 const struct usb_device_id *id)3631 const struct usb_device_id *id)
3702{3632{
3633 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr;
3703 struct lan78xx_net *dev;3634 struct lan78xx_net *dev;
3704 struct net_device *netdev;3635 struct net_device *netdev;
3705 struct usb_device *udev;3636 struct usb_device *udev;
@@ -3748,6 +3679,34 @@ static int lan78xx_probe(struct usb_interface *intf, · 42 unmodified lines
3748 3679
3749 mutex_init(&dev->stats.access_lock);3680 mutex_init(&dev->stats.access_lock);
3750 3681
3682 if (intf->cur_altsetting->desc.bNumEndpoints < 3) {
3683 ret = -ENODEV;
3684 goto out2;
3685 }
3686
3687 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3688 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in);
3689 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) {
3690 ret = -ENODEV;
3691 goto out2;
3692 }
3693
3694 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3695 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out);
3696 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) {
3697 ret = -ENODEV;
3698 goto out2;
3699 }
3700
3701 ep_intr = &intf->cur_altsetting->endpoint[2];
3702 if (!usb_endpoint_is_int_in(&ep_intr->desc)) {
3703 ret = -ENODEV;
3704 goto out2;
3705 }
3706
3707 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3708 usb_endpoint_num(&ep_intr->desc));
3709
3751 ret = lan78xx_bind(dev, intf);3710 ret = lan78xx_bind(dev, intf);
3752 if (ret < 0)3711 if (ret < 0)
3753 goto out2;3712 goto out2;
@@ -3759,18 +3718,7 @@ static int lan78xx_probe(struct usb_interface *intf, · 5 unmodified lines
3759 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;3718 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE;
3760 netif_set_gso_max_size(netdev, MAX_SINGLE_PACKET_SIZE - MAX_HEADER);3719 netif_set_gso_max_size(netdev, MAX_SINGLE_PACKET_SIZE - MAX_HEADER);
3761 3720
3762 dev->ep_blkin = (intf->cur_altsetting)->endpoint + 0;3721 period = ep_intr->desc.bInterval;
3763 dev->ep_blkout = (intf->cur_altsetting)->endpoint + 1;
3764 dev->ep_intr = (intf->cur_altsetting)->endpoint + 2;
3765
3766 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE);
3767 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE);
3768
3769 dev->pipe_intr = usb_rcvintpipe(dev->udev,
3770 dev->ep_intr->desc.bEndpointAddress &
3771 USB_ENDPOINT_NUMBER_MASK);
3772 period = dev->ep_intr->desc.bInterval;
3773
3774 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);3722 maxp = usb_maxpacket(dev->udev, dev->pipe_intr, 0);
3775 buf = kmalloc(maxp, GFP_KERNEL);3723 buf = kmalloc(maxp, GFP_KERNEL);
3776 if (buf) {3724 if (buf) {
@@ -3783,6 +3731,7 @@ static int lan78xx_probe(struct usb_interface *intf, · 6 unmodified lines
3783 usb_fill_int_urb(dev->urb_intr, dev->udev,3731 usb_fill_int_urb(dev->urb_intr, dev->udev,
3784 dev->pipe_intr, buf, maxp,3732 dev->pipe_intr, buf, maxp,
3785 intr_complete, dev, period);3733 intr_complete, dev, period);
3734 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER;
3786 }3735 }
3787 }3736 }
3788 3737
drivers/net/usb/qmi_wwan.c+1−0
@@ -1370,6 +1370,7 @@ static const struct usb_device_id products[] = { · 1369 unmodified lines
1370 {QMI_QUIRK_SET_DTR(0x1e0e, 0x9001, 5)}, /* SIMCom 7100E, 7230E, 7600E ++ */1370 {QMI_QUIRK_SET_DTR(0x1e0e, 0x9001, 5)}, /* SIMCom 7100E, 7230E, 7600E ++ */
1371 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0121, 4)}, /* Quectel EC21 Mini PCIe */1371 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0121, 4)}, /* Quectel EC21 Mini PCIe */
1372 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)}, /* Quectel EG91 */1372 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)}, /* Quectel EG91 */
1373 {QMI_QUIRK_SET_DTR(0x2c7c, 0x0195, 4)}, /* Quectel EG95 */
1373 {QMI_FIXED_INTF(0x2c7c, 0x0296, 4)}, /* Quectel BG96 */1374 {QMI_FIXED_INTF(0x2c7c, 0x0296, 4)}, /* Quectel BG96 */
1374 {QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)}, /* Fibocom NL678 series */1375 {QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)}, /* Fibocom NL678 series */
1375 {QMI_FIXED_INTF(0x0489, 0xe0b4, 0)}, /* Foxconn T77W968 LTE */1376 {QMI_FIXED_INTF(0x0489, 0xe0b4, 0)}, /* Foxconn T77W968 LTE */
drivers/net/usb/smsc95xx.c+8−1
@@ -1287,11 +1287,14 @@ static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) · 1286 unmodified lines
1287 1287
1288 /* Init all registers */1288 /* Init all registers */
1289 ret = smsc95xx_reset(dev);1289 ret = smsc95xx_reset(dev);
1290 if (ret)
1291 goto free_pdata;
1290 1292
1291 /* detect device revision as different features may be available */1293 /* detect device revision as different features may be available */
1292 ret = smsc95xx_read_reg(dev, ID_REV, &val);1294 ret = smsc95xx_read_reg(dev, ID_REV, &val);
1293 if (ret < 0)1295 if (ret < 0)
1294 return ret;1296 goto free_pdata;
1297
1295 val >>= 16;1298 val >>= 16;
1296 pdata->chip_id = val;1299 pdata->chip_id = val;
1297 pdata->mdix_ctrl = get_mdix_status(dev->net);1300 pdata->mdix_ctrl = get_mdix_status(dev->net);
@@ -1317,6 +1320,10 @@ static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) · 19 unmodified lines
1317 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);1320 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
1318 1321
1319 return 0;1322 return 0;
1323
1324free_pdata:
1325 kfree(pdata);
1326 return ret;
1320}1327}
1321 1328
1322static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)1329static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
drivers/net/vxlan.c+12−4
@@ -1376,6 +1376,7 @@ static int vxlan_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb, · 1375 unmodified lines
1376 for (h = 0; h < FDB_HASH_SIZE; ++h) {1376 for (h = 0; h < FDB_HASH_SIZE; ++h) {
1377 struct vxlan_fdb *f;1377 struct vxlan_fdb *f;
1378 1378
1379 rcu_read_lock();
1379 hlist_for_each_entry_rcu(f, &vxlan->fdb_head[h], hlist) {1380 hlist_for_each_entry_rcu(f, &vxlan->fdb_head[h], hlist) {
1380 struct vxlan_rdst *rd;1381 struct vxlan_rdst *rd;
1381 1382
@@ -1387,8 +1388,10 @@ static int vxlan_fdb_dump(struct sk_buff *skb, struct netlink_callback *cb, · 5 unmodified lines
1387 cb->nlh->nlmsg_seq,1388 cb->nlh->nlmsg_seq,
1388 RTM_NEWNEIGH,1389 RTM_NEWNEIGH,
1389 NLM_F_MULTI, NULL);1390 NLM_F_MULTI, NULL);
1390 if (err < 0)1391 if (err < 0) {
1392 rcu_read_unlock();
1391 goto out;1393 goto out;
1394 }
1392skip_nh:1395skip_nh:
1393 *idx += 1;1396 *idx += 1;
1394 continue;1397 continue;
@@ -1403,12 +1406,15 @@ skip_nh: · 8 unmodified lines
1403 cb->nlh->nlmsg_seq,1406 cb->nlh->nlmsg_seq,
1404 RTM_NEWNEIGH,1407 RTM_NEWNEIGH,
1405 NLM_F_MULTI, rd);1408 NLM_F_MULTI, rd);
1406 if (err < 0)1409 if (err < 0) {
1410 rcu_read_unlock();
1407 goto out;1411 goto out;
1412 }
1408skip:1413skip:
1409 *idx += 1;1414 *idx += 1;
1410 }1415 }
1411 }1416 }
1417 rcu_read_unlock();
1412 }1418 }
1413out:1419out:
1414 return err;1420 return err;
@@ -3070,8 +3076,10 @@ static void vxlan_flush(struct vxlan_dev *vxlan, bool do_all) · 1655 unmodified lines
3070 if (!do_all && (f->state & (NUD_PERMANENT | NUD_NOARP)))3076 if (!do_all && (f->state & (NUD_PERMANENT | NUD_NOARP)))
3071 continue;3077 continue;
3072 /* the all_zeros_mac entry is deleted at vxlan_uninit */3078 /* the all_zeros_mac entry is deleted at vxlan_uninit */
3073 if (!is_zero_ether_addr(f->eth_addr))3079 if (is_zero_ether_addr(f->eth_addr) &&
3074 vxlan_fdb_destroy(vxlan, f, true, true);3080 f->vni == vxlan->cfg.vni)
3081 continue;
3082 vxlan_fdb_destroy(vxlan, f, true, true);
3075 }3083 }
3076 spin_unlock_bh(&vxlan->hash_lock[h]);3084 spin_unlock_bh(&vxlan->hash_lock[h]);
3077 }3085 }
drivers/net/wan/hdlc_x25.c+3−1
@@ -71,8 +71,10 @@ static int x25_data_indication(struct net_device *dev, struct sk_buff *skb) · 70 unmodified lines
71{71{
72 unsigned char *ptr;72 unsigned char *ptr;
73 73
74 if (skb_cow(skb, 1))74 if (skb_cow(skb, 1)) {
75 kfree_skb(skb);
75 return NET_RX_DROP;76 return NET_RX_DROP;
77 }
76 78
77 skb_push(skb, 1);79 skb_push(skb, 1);
78 skb_reset_network_header(skb);80 skb_reset_network_header(skb);
drivers/net/wan/lapbether.c+13−4
@@ -128,10 +128,12 @@ static int lapbeth_data_indication(struct net_device *dev, struct sk_buff *skb) · 127 unmodified lines
128{128{
129 unsigned char *ptr;129 unsigned char *ptr;
130 130
131 skb_push(skb, 1);131 if (skb_cow(skb, 1)) {
132 132 kfree_skb(skb);
133 if (skb_cow(skb, 1))
134 return NET_RX_DROP;133 return NET_RX_DROP;
134 }
135
136 skb_push(skb, 1);
135 137
136 ptr = skb->data;138 ptr = skb->data;
137 *ptr = X25_IFACE_DATA;139 *ptr = X25_IFACE_DATA;
@@ -303,7 +305,6 @@ static void lapbeth_setup(struct net_device *dev) · 165 unmodified lines
303 dev->netdev_ops = &lapbeth_netdev_ops;305 dev->netdev_ops = &lapbeth_netdev_ops;
304 dev->needs_free_netdev = true;306 dev->needs_free_netdev = true;
305 dev->type = ARPHRD_X25;307 dev->type = ARPHRD_X25;
306 dev->hard_header_len = 3;
307 dev->mtu = 1000;308 dev->mtu = 1000;
308 dev->addr_len = 0;309 dev->addr_len = 0;
309}310}
@@ -324,6 +325,14 @@ static int lapbeth_new_device(struct net_device *dev) · 14 unmodified lines
324 if (!ndev)325 if (!ndev)
325 goto out;326 goto out;
326 327
328 /* When transmitting data:
329 * first this driver removes a pseudo header of 1 byte,
330 * then the lapb module prepends an LAPB header of at most 3 bytes,
331 * then this driver prepends a length field of 2 bytes,
332 * then the underlying Ethernet device prepends its own header.
333 */
334 ndev->hard_header_len = -1 + 3 + 2 + dev->hard_header_len;
335
327 lapbeth = netdev_priv(ndev);336 lapbeth = netdev_priv(ndev);
328 lapbeth->axdev = ndev;337 lapbeth->axdev = ndev;
329 338
drivers/net/wan/x25_asy.c+14−7
@@ -183,7 +183,7 @@ static inline void x25_asy_unlock(struct x25_asy *sl) · 182 unmodified lines
183 netif_wake_queue(sl->dev);183 netif_wake_queue(sl->dev);
184}184}
185 185
186/* Send one completely decapsulated IP datagram to the IP layer. */186/* Send an LAPB frame to the LAPB module to process. */
187 187
188static void x25_asy_bump(struct x25_asy *sl)188static void x25_asy_bump(struct x25_asy *sl)
189{189{
@@ -195,13 +195,12 @@ static void x25_asy_bump(struct x25_asy *sl) · 5 unmodified lines
195 count = sl->rcount;195 count = sl->rcount;
196 dev->stats.rx_bytes += count;196 dev->stats.rx_bytes += count;
197 197
198 skb = dev_alloc_skb(count+1);198 skb = dev_alloc_skb(count);
199 if (skb == NULL) {199 if (skb == NULL) {
200 netdev_warn(sl->dev, "memory squeeze, dropping packet\n");200 netdev_warn(sl->dev, "memory squeeze, dropping packet\n");
201 dev->stats.rx_dropped++;201 dev->stats.rx_dropped++;
202 return;202 return;
203 }203 }
204 skb_push(skb, 1); /* LAPB internal control */
205 skb_put_data(skb, sl->rbuff, count);204 skb_put_data(skb, sl->rbuff, count);
206 skb->protocol = x25_type_trans(skb, sl->dev);205 skb->protocol = x25_type_trans(skb, sl->dev);
207 err = lapb_data_received(skb->dev, skb);206 err = lapb_data_received(skb->dev, skb);
@@ -209,7 +208,6 @@ static void x25_asy_bump(struct x25_asy *sl) · 1 unmodified line
209 kfree_skb(skb);208 kfree_skb(skb);
210 printk(KERN_DEBUG "x25_asy: data received err - %d\n", err);209 printk(KERN_DEBUG "x25_asy: data received err - %d\n", err);
211 } else {210 } else {
212 netif_rx(skb);
213 dev->stats.rx_packets++;211 dev->stats.rx_packets++;
214 }212 }
215}213}
@@ -356,12 +354,21 @@ static netdev_tx_t x25_asy_xmit(struct sk_buff *skb, · 140 unmodified lines
356 */354 */
357 355
358/*356/*
359 * Called when I frame data arrives. We did the work above - throw it357 * Called when I frame data arrive. We add a pseudo header for upper
360 * at the net layer.358 * layers and pass it to upper layers.
361 */359 */
362 360
363static int x25_asy_data_indication(struct net_device *dev, struct sk_buff *skb)361static int x25_asy_data_indication(struct net_device *dev, struct sk_buff *skb)
364{362{
363 if (skb_cow(skb, 1)) {
364 kfree_skb(skb);
365 return NET_RX_DROP;
366 }
367 skb_push(skb, 1);
368 skb->data[0] = X25_IFACE_DATA;
369
370 skb->protocol = x25_type_trans(skb, dev);
371
365 return netif_rx(skb);372 return netif_rx(skb);
366}373}
367 374
@@ -657,7 +664,7 @@ static void x25_asy_unesc(struct x25_asy *sl, unsigned char s) · 289 unmodified lines
657 switch (s) {664 switch (s) {
658 case X25_END:665 case X25_END:
659 if (!test_and_clear_bit(SLF_ERROR, &sl->flags) &&666 if (!test_and_clear_bit(SLF_ERROR, &sl->flags) &&
660 sl->rcount > 2)667 sl->rcount >= 2)
661 x25_asy_bump(sl);668 x25_asy_bump(sl);
662 clear_bit(SLF_ESCAPE, &sl->flags);669 clear_bit(SLF_ESCAPE, &sl->flags);
663 sl->rcount = 0;670 sl->rcount = 0;
drivers/net/wireguard/device.c+1−0
@@ -262,6 +262,7 @@ static void wg_setup(struct net_device *dev) · 261 unmodified lines
262 max(sizeof(struct ipv6hdr), sizeof(struct iphdr));262 max(sizeof(struct ipv6hdr), sizeof(struct iphdr));
263 263
264 dev->netdev_ops = &netdev_ops;264 dev->netdev_ops = &netdev_ops;
265 dev->header_ops = &ip_tunnel_header_ops;
265 dev->hard_header_len = 0;266 dev->hard_header_len = 0;
266 dev->addr_len = 0;267 dev->addr_len = 0;
267 dev->needed_headroom = DATA_PACKET_HEAD_ROOM;268 dev->needed_headroom = DATA_PACKET_HEAD_ROOM;
drivers/net/wireguard/queueing.h+2−17
@@ -11,6 +11,7 @@ · 10 unmodified lines
11#include <linux/skbuff.h>11#include <linux/skbuff.h>
12#include <linux/ip.h>12#include <linux/ip.h>
13#include <linux/ipv6.h>13#include <linux/ipv6.h>
14#include <net/ip_tunnels.h>
14 15
15struct wg_device;16struct wg_device;
16struct wg_peer;17struct wg_peer;
@@ -65,25 +66,9 @@ struct packet_cb { · 48 unmodified lines
65#define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))66#define PACKET_CB(skb) ((struct packet_cb *)((skb)->cb))
66#define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)67#define PACKET_PEER(skb) (PACKET_CB(skb)->keypair->entry.peer)
67 68
68/* Returns either the correct skb->protocol value, or 0 if invalid. */
69static inline __be16 wg_examine_packet_protocol(struct sk_buff *skb)
70{
71 if (skb_network_header(skb) >= skb->head &&
72 (skb_network_header(skb) + sizeof(struct iphdr)) <=
73 skb_tail_pointer(skb) &&
74 ip_hdr(skb)->version == 4)
75 return htons(ETH_P_IP);
76 if (skb_network_header(skb) >= skb->head &&
77 (skb_network_header(skb) + sizeof(struct ipv6hdr)) <=
78 skb_tail_pointer(skb) &&
79 ipv6_hdr(skb)->version == 6)
80 return htons(ETH_P_IPV6);
81 return 0;
82}
83
84static inline bool wg_check_packet_protocol(struct sk_buff *skb)69static inline bool wg_check_packet_protocol(struct sk_buff *skb)
85{70{
86 __be16 real_protocol = wg_examine_packet_protocol(skb);71 __be16 real_protocol = ip_tunnel_parse_protocol(skb);
87 return real_protocol && skb->protocol == real_protocol;72 return real_protocol && skb->protocol == real_protocol;
88}73}
89 74
drivers/net/wireguard/receive.c+1−1
@@ -387,7 +387,7 @@ static void wg_packet_consume_data_done(struct wg_peer *peer, · 386 unmodified lines
387 */387 */
388 skb->ip_summed = CHECKSUM_UNNECESSARY;388 skb->ip_summed = CHECKSUM_UNNECESSARY;
389 skb->csum_level = ~0; /* All levels */389 skb->csum_level = ~0; /* All levels */
390 skb->protocol = wg_examine_packet_protocol(skb);390 skb->protocol = ip_tunnel_parse_protocol(skb);
391 if (skb->protocol == htons(ETH_P_IP)) {391 if (skb->protocol == htons(ETH_P_IP)) {
392 len = ntohs(ip_hdr(skb)->tot_len);392 len = ntohs(ip_hdr(skb)->tot_len);
393 if (unlikely(len < sizeof(struct iphdr)))393 if (unlikely(len < sizeof(struct iphdr)))
drivers/net/wireless/ath/ath10k/ahb.c+1−1
@@ -820,7 +820,7 @@ err_free_irq: · 819 unmodified lines
820 ath10k_ahb_release_irq_legacy(ar);820 ath10k_ahb_release_irq_legacy(ar);
821 821
822err_free_pipes:822err_free_pipes:
823 ath10k_pci_free_pipes(ar);823 ath10k_pci_release_resource(ar);
824 824
825err_resource_deinit:825err_resource_deinit:
826 ath10k_ahb_resource_deinit(ar);826 ath10k_ahb_resource_deinit(ar);
drivers/net/wireless/ath/ath10k/pci.c+37−41
@@ -3473,6 +3473,28 @@ int ath10k_pci_setup_resource(struct ath10k *ar) · 3472 unmodified lines
3473 3473
3474 timer_setup(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry, 0);3474 timer_setup(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry, 0);
3475 3475
3476 ar_pci->attr = kmemdup(pci_host_ce_config_wlan,
3477 sizeof(pci_host_ce_config_wlan),
3478 GFP_KERNEL);
3479 if (!ar_pci->attr)
3480 return -ENOMEM;
3481
3482 ar_pci->pipe_config = kmemdup(pci_target_ce_config_wlan,
3483 sizeof(pci_target_ce_config_wlan),
3484 GFP_KERNEL);
3485 if (!ar_pci->pipe_config) {
3486 ret = -ENOMEM;
3487 goto err_free_attr;
3488 }
3489
3490 ar_pci->serv_to_pipe = kmemdup(pci_target_service_to_ce_map_wlan,
3491 sizeof(pci_target_service_to_ce_map_wlan),
3492 GFP_KERNEL);
3493 if (!ar_pci->serv_to_pipe) {
3494 ret = -ENOMEM;
3495 goto err_free_pipe_config;
3496 }
3497
3476 if (QCA_REV_6174(ar) || QCA_REV_9377(ar))3498 if (QCA_REV_6174(ar) || QCA_REV_9377(ar))
3477 ath10k_pci_override_ce_config(ar);3499 ath10k_pci_override_ce_config(ar);
3478 3500
@@ -3480,18 +3502,31 @@ int ath10k_pci_setup_resource(struct ath10k *ar) · 1 unmodified line
3480 if (ret) {3502 if (ret) {
3481 ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",3503 ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
3482 ret);3504 ret);
3483 return ret;3505 goto err_free_serv_to_pipe;
3484 }3506 }
3485 3507
3486 return 0;3508 return 0;
3509
3510err_free_serv_to_pipe:
3511 kfree(ar_pci->serv_to_pipe);
3512err_free_pipe_config:
3513 kfree(ar_pci->pipe_config);
3514err_free_attr:
3515 kfree(ar_pci->attr);
3516 return ret;
3487}3517}
3488 3518
3489void ath10k_pci_release_resource(struct ath10k *ar)3519void ath10k_pci_release_resource(struct ath10k *ar)
3490{3520{
3521 struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
3522
3491 ath10k_pci_rx_retry_sync(ar);3523 ath10k_pci_rx_retry_sync(ar);
3492 netif_napi_del(&ar->napi);3524 netif_napi_del(&ar->napi);
3493 ath10k_pci_ce_deinit(ar);3525 ath10k_pci_ce_deinit(ar);
3494 ath10k_pci_free_pipes(ar);3526 ath10k_pci_free_pipes(ar);
3527 kfree(ar_pci->attr);
3528 kfree(ar_pci->pipe_config);
3529 kfree(ar_pci->serv_to_pipe);
3495}3530}
3496 3531
3497static const struct ath10k_bus_ops ath10k_pci_bus_ops = {3532static const struct ath10k_bus_ops ath10k_pci_bus_ops = {
@@ -3601,30 +3636,6 @@ static int ath10k_pci_probe(struct pci_dev *pdev, · 103 unmodified lines
3601 3636
3602 timer_setup(&ar_pci->ps_timer, ath10k_pci_ps_timer, 0);3637 timer_setup(&ar_pci->ps_timer, ath10k_pci_ps_timer, 0);
3603 3638
3604 ar_pci->attr = kmemdup(pci_host_ce_config_wlan,
3605 sizeof(pci_host_ce_config_wlan),
3606 GFP_KERNEL);
3607 if (!ar_pci->attr) {
3608 ret = -ENOMEM;
3609 goto err_free;
3610 }
3611
3612 ar_pci->pipe_config = kmemdup(pci_target_ce_config_wlan,
3613 sizeof(pci_target_ce_config_wlan),
3614 GFP_KERNEL);
3615 if (!ar_pci->pipe_config) {
3616 ret = -ENOMEM;
3617 goto err_free;
3618 }
3619
3620 ar_pci->serv_to_pipe = kmemdup(pci_target_service_to_ce_map_wlan,
3621 sizeof(pci_target_service_to_ce_map_wlan),
3622 GFP_KERNEL);
3623 if (!ar_pci->serv_to_pipe) {
3624 ret = -ENOMEM;
3625 goto err_free;
3626 }
3627
3628 ret = ath10k_pci_setup_resource(ar);3639 ret = ath10k_pci_setup_resource(ar);
3629 if (ret) {3640 if (ret) {
3630 ath10k_err(ar, "failed to setup resource: %d\n", ret);3641 ath10k_err(ar, "failed to setup resource: %d\n", ret);
@@ -3705,10 +3716,9 @@ err_unsupported: · 74 unmodified lines
3705 3716
3706err_free_irq:3717err_free_irq:
3707 ath10k_pci_free_irq(ar);3718 ath10k_pci_free_irq(ar);
3708 ath10k_pci_rx_retry_sync(ar);
3709 3719
3710err_deinit_irq:3720err_deinit_irq:
3711 ath10k_pci_deinit_irq(ar);3721 ath10k_pci_release_resource(ar);
3712 3722
3713err_sleep:3723err_sleep:
3714 ath10k_pci_sleep_sync(ar);3724 ath10k_pci_sleep_sync(ar);
@@ -3720,29 +3730,18 @@ err_free_pipes: · 5 unmodified lines
3720err_core_destroy:3730err_core_destroy:
3721 ath10k_core_destroy(ar);3731 ath10k_core_destroy(ar);
3722 3732
3723err_free:
3724 kfree(ar_pci->attr);
3725 kfree(ar_pci->pipe_config);
3726 kfree(ar_pci->serv_to_pipe);
3727
3728 return ret;3733 return ret;
3729}3734}
3730 3735
3731static void ath10k_pci_remove(struct pci_dev *pdev)3736static void ath10k_pci_remove(struct pci_dev *pdev)
3732{3737{
3733 struct ath10k *ar = pci_get_drvdata(pdev);3738 struct ath10k *ar = pci_get_drvdata(pdev);
3734 struct ath10k_pci *ar_pci;
3735 3739
3736 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n");3740 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n");
3737 3741
3738 if (!ar)3742 if (!ar)
3739 return;3743 return;
3740 3744
3741 ar_pci = ath10k_pci_priv(ar);
3742
3743 if (!ar_pci)
3744 return;
3745
3746 ath10k_core_unregister(ar);3745 ath10k_core_unregister(ar);
3747 ath10k_pci_free_irq(ar);3746 ath10k_pci_free_irq(ar);
3748 ath10k_pci_deinit_irq(ar);3747 ath10k_pci_deinit_irq(ar);
@@ -3750,9 +3749,6 @@ static void ath10k_pci_remove(struct pci_dev *pdev) · 1 unmodified line
3750 ath10k_pci_sleep_sync(ar);3749 ath10k_pci_sleep_sync(ar);
3751 ath10k_pci_release(ar);3750 ath10k_pci_release(ar);
3752 ath10k_core_destroy(ar);3751 ath10k_core_destroy(ar);
3753 kfree(ar_pci->attr);
3754 kfree(ar_pci->pipe_config);
3755 kfree(ar_pci->serv_to_pipe);
3756}3752}
3757 3753
3758MODULE_DEVICE_TABLE(pci, ath10k_pci_id_table);3754MODULE_DEVICE_TABLE(pci, ath10k_pci_id_table);
drivers/net/wireless/ath/ath9k/hif_usb.c+3−1
@@ -733,11 +733,13 @@ static void ath9k_hif_usb_reg_in_cb(struct urb *urb) · 732 unmodified lines
733 return;733 return;
734 }734 }
735 735
736 rx_buf->skb = nskb;
737
736 usb_fill_int_urb(urb, hif_dev->udev,738 usb_fill_int_urb(urb, hif_dev->udev,
737 usb_rcvintpipe(hif_dev->udev,739 usb_rcvintpipe(hif_dev->udev,
738 USB_REG_IN_PIPE),740 USB_REG_IN_PIPE),
739 nskb->data, MAX_REG_IN_BUF_SIZE,741 nskb->data, MAX_REG_IN_BUF_SIZE,
740 ath9k_hif_usb_reg_in_cb, nskb, 1);742 ath9k_hif_usb_reg_in_cb, rx_buf, 1);
741 }743 }
742 744
743resubmit:745resubmit:
drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c+14−2
@@ -271,6 +271,8 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, · 270 unmodified lines
271{271{
272 struct iwl_fw_ini_trigger_tlv *trig = (void *)tlv->data;272 struct iwl_fw_ini_trigger_tlv *trig = (void *)tlv->data;
273 u32 tp = le32_to_cpu(trig->time_point);273 u32 tp = le32_to_cpu(trig->time_point);
274 struct iwl_ucode_tlv *dup = NULL;
275 int ret;
274 276
275 if (le32_to_cpu(tlv->length) < sizeof(*trig))277 if (le32_to_cpu(tlv->length) < sizeof(*trig))
276 return -EINVAL;278 return -EINVAL;
@@ -283,10 +285,20 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, · 6 unmodified lines
283 return -EINVAL;285 return -EINVAL;
284 }286 }
285 287
286 if (!le32_to_cpu(trig->occurrences))288 if (!le32_to_cpu(trig->occurrences)) {
289 dup = kmemdup(tlv, sizeof(*tlv) + le32_to_cpu(tlv->length),
290 GFP_KERNEL);
291 if (!dup)
292 return -ENOMEM;
293 trig = (void *)dup->data;
287 trig->occurrences = cpu_to_le32(-1);294 trig->occurrences = cpu_to_le32(-1);
295 tlv = dup;
296 }
297
298 ret = iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);
299 kfree(dup);
288 300
289 return iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);301 return ret;
290}302}
291 303
292static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,304static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,
drivers/net/wireless/intel/iwlwifi/mvm/sta.c+3−5
@@ -1189,17 +1189,15 @@ static int iwl_mvm_inactivity_check(struct iwl_mvm *mvm, u8 alloc_for_sta) · 1188 unmodified lines
1189 for_each_set_bit(i, &changetid_queues, IWL_MAX_HW_QUEUES)1189 for_each_set_bit(i, &changetid_queues, IWL_MAX_HW_QUEUES)
1190 iwl_mvm_change_queue_tid(mvm, i);1190 iwl_mvm_change_queue_tid(mvm, i);
1191 1191
1192 rcu_read_unlock();
1193
1192 if (free_queue >= 0 && alloc_for_sta != IWL_MVM_INVALID_STA) {1194 if (free_queue >= 0 && alloc_for_sta != IWL_MVM_INVALID_STA) {
1193 ret = iwl_mvm_free_inactive_queue(mvm, free_queue, queue_owner,1195 ret = iwl_mvm_free_inactive_queue(mvm, free_queue, queue_owner,
1194 alloc_for_sta);1196 alloc_for_sta);
1195 if (ret) {1197 if (ret)
1196 rcu_read_unlock();
1197 return ret;1198 return ret;
1198 }
1199 }1199 }
1200 1200
1201 rcu_read_unlock();
1202
1203 return free_queue;1201 return free_queue;
1204}1202}
1205 1203
drivers/net/wireless/intel/iwlwifi/pcie/drv.c+2−0
@@ -582,6 +582,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { · 581 unmodified lines
582 IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),582 IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
583 IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),583 IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
584 IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),584 IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
585 IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
586 IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
585 587
586 IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),588 IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
587 589
drivers/net/wireless/mediatek/mt76/mt76.h+1−0
@@ -301,6 +301,7 @@ struct mt76_hw_cap { · 300 unmodified lines
301#define MT_DRV_TX_ALIGNED4_SKBS BIT(1)301#define MT_DRV_TX_ALIGNED4_SKBS BIT(1)
302#define MT_DRV_SW_RX_AIRTIME BIT(2)302#define MT_DRV_SW_RX_AIRTIME BIT(2)
303#define MT_DRV_RX_DMA_HDR BIT(3)303#define MT_DRV_RX_DMA_HDR BIT(3)
304#define MT_DRV_HW_MGMT_TXQ BIT(4)
304 305
305struct mt76_driver_ops {306struct mt76_driver_ops {
306 u32 drv_flags;307 u32 drv_flags;
drivers/net/wireless/mediatek/mt76/mt7603/main.c+2−0
@@ -642,8 +642,10 @@ mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) · 641 unmodified lines
642{642{
643 struct mt7603_dev *dev = hw->priv;643 struct mt7603_dev *dev = hw->priv;
644 644
645 mutex_lock(&dev->mt76.mutex);
645 dev->coverage_class = max_t(s16, coverage_class, 0);646 dev->coverage_class = max_t(s16, coverage_class, 0);
646 mt7603_mac_set_timing(dev);647 mt7603_mac_set_timing(dev);
648 mutex_unlock(&dev->mt76.mutex);
647}649}
648 650
649static void mt7603_tx(struct ieee80211_hw *hw,651static void mt7603_tx(struct ieee80211_hw *hw,
drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c+5−4
@@ -234,10 +234,11 @@ mt7615_queues_acq(struct seq_file *s, void *data) · 233 unmodified lines
234 int i;234 int i;
235 235
236 for (i = 0; i < 16; i++) {236 for (i = 0; i < 16; i++) {
237 int j, acs = i / 4, index = i % 4;237 int j, wmm_idx = i % MT7615_MAX_WMM_SETS;
238 int acs = i / MT7615_MAX_WMM_SETS;
238 u32 ctrl, val, qlen = 0;239 u32 ctrl, val, qlen = 0;
239 240
240 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, index));241 val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, wmm_idx));
241 ctrl = BIT(31) | BIT(15) | (acs << 8);242 ctrl = BIT(31) | BIT(15) | (acs << 8);
242 243
243 for (j = 0; j < 32; j++) {244 for (j = 0; j < 32; j++) {
@@ -245,11 +246,11 @@ mt7615_queues_acq(struct seq_file *s, void *data) · 1 unmodified line
245 continue;246 continue;
246 247
247 mt76_wr(dev, MT_PLE_FL_Q0_CTRL,248 mt76_wr(dev, MT_PLE_FL_Q0_CTRL,
248 ctrl | (j + (index << 5)));249 ctrl | (j + (wmm_idx << 5)));
249 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,250 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
250 GENMASK(11, 0));251 GENMASK(11, 0));
251 }252 }
252 seq_printf(s, "AC%d%d: queued=%d\n", acs, index, qlen);253 seq_printf(s, "AC%d%d: queued=%d\n", wmm_idx, acs, qlen);
253 }254 }
254 255
255 return 0;256 return 0;
drivers/net/wireless/mediatek/mt76/mt7615/dma.c+5−4
@@ -36,10 +36,10 @@ static int · 35 unmodified lines
36mt7622_init_tx_queues_multi(struct mt7615_dev *dev)36mt7622_init_tx_queues_multi(struct mt7615_dev *dev)
37{37{
38 static const u8 wmm_queue_map[] = {38 static const u8 wmm_queue_map[] = {
39 MT7622_TXQ_AC0,39 [IEEE80211_AC_BK] = MT7622_TXQ_AC0,
40 MT7622_TXQ_AC1,40 [IEEE80211_AC_BE] = MT7622_TXQ_AC1,
41 MT7622_TXQ_AC2,41 [IEEE80211_AC_VI] = MT7622_TXQ_AC2,
42 MT7622_TXQ_AC3,42 [IEEE80211_AC_VO] = MT7622_TXQ_AC3,
43 };43 };
44 int ret;44 int ret;
45 int i;45 int i;
@@ -100,6 +100,7 @@ mt7615_tx_cleanup(struct mt7615_dev *dev) · 54 unmodified lines
100 int i;100 int i;
101 101
102 mt76_queue_tx_cleanup(dev, MT_TXQ_MCU, false);102 mt76_queue_tx_cleanup(dev, MT_TXQ_MCU, false);
103 mt76_queue_tx_cleanup(dev, MT_TXQ_PSD, false);
103 if (is_mt7615(&dev->mt76)) {104 if (is_mt7615(&dev->mt76)) {
104 mt76_queue_tx_cleanup(dev, MT_TXQ_BE, false);105 mt76_queue_tx_cleanup(dev, MT_TXQ_BE, false);
105 } else {106 } else {
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c+1−2
@@ -72,8 +72,7 @@ static int mt7615_eeprom_load(struct mt7615_dev *dev, u32 addr) · 71 unmodified lines
72{72{
73 int ret;73 int ret;
74 74
75 ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_SIZE +75 ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_FULL_SIZE);
76 MT7615_EEPROM_EXTRA_DATA);
77 if (ret < 0)76 if (ret < 0)
78 return ret;77 return ret;
79 78
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h+1−1
@@ -17,7 +17,7 @@ · 16 unmodified lines
17#define MT7615_EEPROM_TXDPD_SIZE 21617#define MT7615_EEPROM_TXDPD_SIZE 216
18#define MT7615_EEPROM_TXDPD_COUNT (44 + 3)18#define MT7615_EEPROM_TXDPD_COUNT (44 + 3)
19 19
20#define MT7615_EEPROM_EXTRA_DATA (MT7615_EEPROM_TXDPD_OFFSET + \20#define MT7615_EEPROM_FULL_SIZE (MT7615_EEPROM_TXDPD_OFFSET + \
21 MT7615_EEPROM_TXDPD_COUNT * \21 MT7615_EEPROM_TXDPD_COUNT * \
22 MT7615_EEPROM_TXDPD_SIZE)22 MT7615_EEPROM_TXDPD_SIZE)
23 23
drivers/net/wireless/mediatek/mt76/mt7615/mac.c+7−13
@@ -526,22 +526,16 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, · 525 unmodified lines
526 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;526 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
527 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;527 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
528 528
529 if (ieee80211_is_data(fc) || ieee80211_is_bufferable_mmpdu(fc)) {529 if (beacon) {
530 q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
531 skb_get_queue_mapping(skb);
532 p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
533 } else if (beacon) {
534 if (ext_phy)
535 q_idx = MT_LMAC_BCN1;
536 else
537 q_idx = MT_LMAC_BCN0;
538 p_fmt = MT_TX_TYPE_FW;530 p_fmt = MT_TX_TYPE_FW;
531 q_idx = ext_phy ? MT_LMAC_BCN1 : MT_LMAC_BCN0;
532 } else if (skb_get_queue_mapping(skb) >= MT_TXQ_PSD) {
533 p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
534 q_idx = ext_phy ? MT_LMAC_ALTX1 : MT_LMAC_ALTX0;
539 } else {535 } else {
540 if (ext_phy)
541 q_idx = MT_LMAC_ALTX1;
542 else
543 q_idx = MT_LMAC_ALTX0;
544 p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;536 p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
537 q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
538 mt7615_lmac_mapping(dev, skb_get_queue_mapping(skb));
545 }539 }
546 540
547 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |541 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
drivers/net/wireless/mediatek/mt76/mt7615/mac.h+0−15
@@ -124,21 +124,6 @@ enum tx_pkt_type { · 123 unmodified lines
124 MT_TX_TYPE_FW,124 MT_TX_TYPE_FW,
125};125};
126 126
127enum tx_pkt_queue_idx {
128 MT_LMAC_AC00,
129 MT_LMAC_AC01,
130 MT_LMAC_AC02,
131 MT_LMAC_AC03,
132 MT_LMAC_ALTX0 = 0x10,
133 MT_LMAC_BMC0,
134 MT_LMAC_BCN0,
135 MT_LMAC_PSMP0,
136 MT_LMAC_ALTX1,
137 MT_LMAC_BMC1,
138 MT_LMAC_BCN1,
139 MT_LMAC_PSMP1,
140};
141
142enum tx_port_idx {127enum tx_port_idx {
143 MT_TX_PORT_IDX_LMAC,128 MT_TX_PORT_IDX_LMAC,
144 MT_TX_PORT_IDX_MCU129 MT_TX_PORT_IDX_MCU
drivers/net/wireless/mediatek/mt76/mt7615/main.c+4−0
@@ -397,6 +397,7 @@ mt7615_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, · 396 unmodified lines
397 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;397 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
398 struct mt7615_dev *dev = mt7615_hw_dev(hw);398 struct mt7615_dev *dev = mt7615_hw_dev(hw);
399 399
400 queue = mt7615_lmac_mapping(dev, queue);
400 queue += mvif->wmm_idx * MT7615_MAX_WMM_SETS;401 queue += mvif->wmm_idx * MT7615_MAX_WMM_SETS;
401 402
402 return mt7615_mcu_set_wmm(dev, queue, params);403 return mt7615_mcu_set_wmm(dev, queue, params);
@@ -735,9 +736,12 @@ static void · 332 unmodified lines
735mt7615_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)736mt7615_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
736{737{
737 struct mt7615_phy *phy = mt7615_hw_phy(hw);738 struct mt7615_phy *phy = mt7615_hw_phy(hw);
739 struct mt7615_dev *dev = phy->dev;
738 740
741 mutex_lock(&dev->mt76.mutex);
739 phy->coverage_class = max_t(s16, coverage_class, 0);742 phy->coverage_class = max_t(s16, coverage_class, 0);
740 mt7615_mac_set_timing(phy);743 mt7615_mac_set_timing(phy);
744 mutex_unlock(&dev->mt76.mutex);
741}745}
742 746
743static int747static int
drivers/net/wireless/mediatek/mt76/mt7615/mmio.c+1−1
@@ -146,7 +146,7 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, · 145 unmodified lines
146 static const struct mt76_driver_ops drv_ops = {146 static const struct mt76_driver_ops drv_ops = {
147 /* txwi_size = txd size + txp size */147 /* txwi_size = txd size + txp size */
148 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7615_txp_common),148 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7615_txp_common),
149 .drv_flags = MT_DRV_TXWI_NO_FREE,149 .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
150 .survey_flags = SURVEY_INFO_TIME_TX |150 .survey_flags = SURVEY_INFO_TIME_TX |
151 SURVEY_INFO_TIME_RX |151 SURVEY_INFO_TIME_RX |
152 SURVEY_INFO_TIME_BSS_RX,152 SURVEY_INFO_TIME_BSS_RX,
drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h+30−0
@@ -282,6 +282,21 @@ struct mt7615_dev { · 281 unmodified lines
282 struct list_head wd_head;282 struct list_head wd_head;
283};283};
284 284
285enum tx_pkt_queue_idx {
286 MT_LMAC_AC00,
287 MT_LMAC_AC01,
288 MT_LMAC_AC02,
289 MT_LMAC_AC03,
290 MT_LMAC_ALTX0 = 0x10,
291 MT_LMAC_BMC0,
292 MT_LMAC_BCN0,
293 MT_LMAC_PSMP0,
294 MT_LMAC_ALTX1,
295 MT_LMAC_BMC1,
296 MT_LMAC_BCN1,
297 MT_LMAC_PSMP1,
298};
299
285enum {300enum {
286 HW_BSSID_0 = 0x0,301 HW_BSSID_0 = 0x0,
287 HW_BSSID_1,302 HW_BSSID_1,
@@ -447,6 +462,21 @@ static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev) · 159 unmodified lines
447 return MT7615_WTBL_SIZE;462 return MT7615_WTBL_SIZE;
448}463}
449 464
465static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
466{
467 static const u8 lmac_queue_map[] = {
468 [IEEE80211_AC_BK] = MT_LMAC_AC00,
469 [IEEE80211_AC_BE] = MT_LMAC_AC01,
470 [IEEE80211_AC_VI] = MT_LMAC_AC02,
471 [IEEE80211_AC_VO] = MT_LMAC_AC03,
472 };
473
474 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
475 return MT_LMAC_AC01; /* BE */
476
477 return lmac_queue_map[ac];
478}
479
450void mt7615_dma_reset(struct mt7615_dev *dev);480void mt7615_dma_reset(struct mt7615_dev *dev);
451void mt7615_scan_work(struct work_struct *work);481void mt7615_scan_work(struct work_struct *work);
452void mt7615_roc_work(struct work_struct *work);482void mt7615_roc_work(struct work_struct *work);
drivers/net/wireless/mediatek/mt76/mt7615/usb.c+7−6
@@ -270,7 +270,7 @@ static int mt7663u_probe(struct usb_interface *usb_intf, · 269 unmodified lines
270{270{
271 static const struct mt76_driver_ops drv_ops = {271 static const struct mt76_driver_ops drv_ops = {
272 .txwi_size = MT_USB_TXD_SIZE,272 .txwi_size = MT_USB_TXD_SIZE,
273 .drv_flags = MT_DRV_RX_DMA_HDR,273 .drv_flags = MT_DRV_RX_DMA_HDR | MT_DRV_HW_MGMT_TXQ,
274 .tx_prepare_skb = mt7663u_tx_prepare_skb,274 .tx_prepare_skb = mt7663u_tx_prepare_skb,
275 .tx_complete_skb = mt7663u_tx_complete_skb,275 .tx_complete_skb = mt7663u_tx_complete_skb,
276 .tx_status_data = mt7663u_tx_status_data,276 .tx_status_data = mt7663u_tx_status_data,
@@ -329,25 +329,26 @@ static int mt7663u_probe(struct usb_interface *usb_intf, · 52 unmodified lines
329 if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,329 if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
330 FW_STATE_PWR_ON << 1, 500)) {330 FW_STATE_PWR_ON << 1, 500)) {
331 dev_err(dev->mt76.dev, "Timeout for power on\n");331 dev_err(dev->mt76.dev, "Timeout for power on\n");
332 return -EIO;332 ret = -EIO;
333 goto error;
333 }334 }
334 335
335alloc_queues:336alloc_queues:
336 ret = mt76u_alloc_mcu_queue(&dev->mt76);337 ret = mt76u_alloc_mcu_queue(&dev->mt76);
337 if (ret)338 if (ret)
338 goto error;339 goto error_free_q;
339 340
340 ret = mt76u_alloc_queues(&dev->mt76);341 ret = mt76u_alloc_queues(&dev->mt76);
341 if (ret)342 if (ret)
342 goto error;343 goto error_free_q;
343 344
344 ret = mt7663u_register_device(dev);345 ret = mt7663u_register_device(dev);
345 if (ret)346 if (ret)
346 goto error_freeq;347 goto error_free_q;
347 348
348 return 0;349 return 0;
349 350
350error_freeq:351error_free_q:
351 mt76u_queues_deinit(&dev->mt76);352 mt76u_queues_deinit(&dev->mt76);
352error:353error:
353 mt76u_deinit(&dev->mt76);354 mt76u_deinit(&dev->mt76);
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c+3−2
@@ -456,8 +456,9 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) · 455 unmodified lines
456 tasklet_disable(&dev->mt76.tx_tasklet);456 tasklet_disable(&dev->mt76.tx_tasklet);
457 napi_disable(&dev->mt76.tx_napi);457 napi_disable(&dev->mt76.tx_napi);
458 458
459 for (i = 0; i < ARRAY_SIZE(dev->mt76.napi); i++)459 mt76_for_each_q_rx(&dev->mt76, i) {
460 napi_disable(&dev->mt76.napi[i]);460 napi_disable(&dev->mt76.napi[i]);
461 }
461 462
462 mutex_lock(&dev->mt76.mutex);463 mutex_lock(&dev->mt76.mutex);
463 464
@@ -515,7 +516,7 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) · 51 unmodified lines
515 516
516 tasklet_enable(&dev->mt76.pre_tbtt_tasklet);517 tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
517 518
518 for (i = 0; i < ARRAY_SIZE(dev->mt76.napi); i++) {519 mt76_for_each_q_rx(&dev->mt76, i) {
519 napi_enable(&dev->mt76.napi[i]);520 napi_enable(&dev->mt76.napi[i]);
520 napi_schedule(&dev->mt76.napi[i]);521 napi_schedule(&dev->mt76.napi[i]);
521 }522 }
drivers/net/wireless/mediatek/mt76/mt7915/main.c+3−0
@@ -716,9 +716,12 @@ static void · 715 unmodified lines
716mt7915_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)716mt7915_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
717{717{
718 struct mt7915_phy *phy = mt7915_hw_phy(hw);718 struct mt7915_phy *phy = mt7915_hw_phy(hw);
719 struct mt7915_dev *dev = phy->dev;
719 720
721 mutex_lock(&dev->mt76.mutex);
720 phy->coverage_class = max_t(s16, coverage_class, 0);722 phy->coverage_class = max_t(s16, coverage_class, 0);
721 mt7915_mac_set_timing(phy);723 mt7915_mac_set_timing(phy);
724 mutex_unlock(&dev->mt76.mutex);
722}725}
723 726
724static int727static int
drivers/net/wireless/mediatek/mt76/tx.c+7−0
@@ -264,6 +264,13 @@ mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta, · 263 unmodified lines
264 skb_set_queue_mapping(skb, qid);264 skb_set_queue_mapping(skb, qid);
265 }265 }
266 266
267 if ((dev->drv->drv_flags & MT_DRV_HW_MGMT_TXQ) &&
268 !ieee80211_is_data(hdr->frame_control) &&
269 !ieee80211_is_bufferable_mmpdu(hdr->frame_control)) {
270 qid = MT_TXQ_PSD;
271 skb_set_queue_mapping(skb, qid);
272 }
273
267 if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))274 if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
268 ieee80211_get_tx_rates(info->control.vif, sta, skb,275 ieee80211_get_tx_rates(info->control.vif, sta, skb,
269 info->control.rates, 1);276 info->control.rates, 1);
drivers/net/wireless/mediatek/mt76/usb.c+26−13
@@ -1010,17 +1010,18 @@ static void mt76u_tx_kick(struct mt76_dev *dev, struct mt76_queue *q) · 1009 unmodified lines
1010static u8 mt76u_ac_to_hwq(struct mt76_dev *dev, u8 ac)1010static u8 mt76u_ac_to_hwq(struct mt76_dev *dev, u8 ac)
1011{1011{
1012 if (mt76_chip(dev) == 0x7663) {1012 if (mt76_chip(dev) == 0x7663) {
1013 static const u8 wmm_queue_map[] = {1013 static const u8 lmac_queue_map[] = {
1014 [IEEE80211_AC_VO] = 0,1014 /* ac to lmac mapping */
1015 [IEEE80211_AC_VI] = 1,1015 [IEEE80211_AC_BK] = 0,
1016 [IEEE80211_AC_BE] = 2,1016 [IEEE80211_AC_BE] = 1,
1017 [IEEE80211_AC_BK] = 4,1017 [IEEE80211_AC_VI] = 2,
1018 [IEEE80211_AC_VO] = 4,
1018 };1019 };
1019 1020
1020 if (WARN_ON(ac >= ARRAY_SIZE(wmm_queue_map)))1021 if (WARN_ON(ac >= ARRAY_SIZE(lmac_queue_map)))
1021 return 2; /* BE */1022 return 1; /* BE */
1022 1023
1023 return wmm_queue_map[ac];1024 return lmac_queue_map[ac];
1024 }1025 }
1025 1026
1026 return mt76_ac_to_hwq(ac);1027 return mt76_ac_to_hwq(ac);
@@ -1066,11 +1067,16 @@ static int mt76u_alloc_tx(struct mt76_dev *dev) · 39 unmodified lines
1066 1067
1067static void mt76u_free_tx(struct mt76_dev *dev)1068static void mt76u_free_tx(struct mt76_dev *dev)
1068{1069{
1069 struct mt76_queue *q;1070 int i;
1070 int i, j;
1071 1071
1072 for (i = 0; i < IEEE80211_NUM_ACS; i++) {1072 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
1073 struct mt76_queue *q;
1074 int j;
1075
1073 q = dev->q_tx[i].q;1076 q = dev->q_tx[i].q;
1077 if (!q)
1078 continue;
1079
1074 for (j = 0; j < q->ndesc; j++)1080 for (j = 0; j < q->ndesc; j++)
1075 usb_free_urb(q->entry[j].urb);1081 usb_free_urb(q->entry[j].urb);
1076 }1082 }
@@ -1078,17 +1084,22 @@ static void mt76u_free_tx(struct mt76_dev *dev) · 1 unmodified line
1078 1084
1079void mt76u_stop_tx(struct mt76_dev *dev)1085void mt76u_stop_tx(struct mt76_dev *dev)
1080{1086{
1081 struct mt76_queue_entry entry;1087 int ret;
1082 struct mt76_queue *q;
1083 int i, j, ret;
1084 1088
1085 ret = wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(&dev->phy),1089 ret = wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(&dev->phy),
1086 HZ / 5);1090 HZ / 5);
1087 if (!ret) {1091 if (!ret) {
1092 struct mt76_queue_entry entry;
1093 struct mt76_queue *q;
1094 int i, j;
1095
1088 dev_err(dev->dev, "timed out waiting for pending tx\n");1096 dev_err(dev->dev, "timed out waiting for pending tx\n");
1089 1097
1090 for (i = 0; i < IEEE80211_NUM_ACS; i++) {1098 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
1091 q = dev->q_tx[i].q;1099 q = dev->q_tx[i].q;
1100 if (!q)
1101 continue;
1102
1092 for (j = 0; j < q->ndesc; j++)1103 for (j = 0; j < q->ndesc; j++)
1093 usb_kill_urb(q->entry[j].urb);1104 usb_kill_urb(q->entry[j].urb);
1094 }1105 }
@@ -1100,6 +1111,8 @@ void mt76u_stop_tx(struct mt76_dev *dev) · 5 unmodified lines
1100 */1111 */
1101 for (i = 0; i < IEEE80211_NUM_ACS; i++) {1112 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
1102 q = dev->q_tx[i].q;1113 q = dev->q_tx[i].q;
1114 if (!q)
1115 continue;
1103 1116
1104 /* Assure we are in sync with killed tasklet. */1117 /* Assure we are in sync with killed tasklet. */
1105 spin_lock_bh(&q->lock);1118 spin_lock_bh(&q->lock);
drivers/net/xen-netfront.c+42−22
@@ -63,6 +63,8 @@ module_param_named(max_queues, xennet_max_queues, uint, 0644); · 62 unmodified lines
63MODULE_PARM_DESC(max_queues,63MODULE_PARM_DESC(max_queues,
64 "Maximum number of queues per virtual interface");64 "Maximum number of queues per virtual interface");
65 65
66#define XENNET_TIMEOUT (5 * HZ)
67
66static const struct ethtool_ops xennet_ethtool_ops;68static const struct ethtool_ops xennet_ethtool_ops;
67 69
68struct netfront_cb {70struct netfront_cb {
@@ -1334,12 +1336,15 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev) · 1265 unmodified lines
1334 1336
1335 netif_carrier_off(netdev);1337 netif_carrier_off(netdev);
1336 1338
1337 xenbus_switch_state(dev, XenbusStateInitialising);1339 do {
1338 wait_event(module_wq,1340 xenbus_switch_state(dev, XenbusStateInitialising);
1339 xenbus_read_driver_state(dev->otherend) !=1341 err = wait_event_timeout(module_wq,
1340 XenbusStateClosed &&1342 xenbus_read_driver_state(dev->otherend) !=
1341 xenbus_read_driver_state(dev->otherend) !=1343 XenbusStateClosed &&
1342 XenbusStateUnknown);1344 xenbus_read_driver_state(dev->otherend) !=
1345 XenbusStateUnknown, XENNET_TIMEOUT);
1346 } while (!err);
1347
1343 return netdev;1348 return netdev;
1344 1349
1345 exit:1350 exit:
@@ -2139,28 +2144,43 @@ static const struct attribute_group xennet_dev_group = { · 793 unmodified lines
2139};2144};
2140#endif /* CONFIG_SYSFS */2145#endif /* CONFIG_SYSFS */
2141 2146
2142static int xennet_remove(struct xenbus_device *dev)2147static void xennet_bus_close(struct xenbus_device *dev)
2143{2148{
2144 struct netfront_info *info = dev_get_drvdata(&dev->dev);2149 int ret;
2145
2146 dev_dbg(&dev->dev, "%s\n", dev->nodename);
2147 2150
2148 if (xenbus_read_driver_state(dev->otherend) != XenbusStateClosed) {2151 if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed)
2152 return;
2153 do {
2149 xenbus_switch_state(dev, XenbusStateClosing);2154 xenbus_switch_state(dev, XenbusStateClosing);
2150 wait_event(module_wq,2155 ret = wait_event_timeout(module_wq,
2151 xenbus_read_driver_state(dev->otherend) ==2156 xenbus_read_driver_state(dev->otherend) ==
2152 XenbusStateClosing ||2157 XenbusStateClosing ||
2153 xenbus_read_driver_state(dev->otherend) ==2158 xenbus_read_driver_state(dev->otherend) ==
2154 XenbusStateUnknown);2159 XenbusStateClosed ||
2160 xenbus_read_driver_state(dev->otherend) ==
2161 XenbusStateUnknown,
2162 XENNET_TIMEOUT);
2163 } while (!ret);
2164
2165 if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed)
2166 return;
2155 2167
2168 do {
2156 xenbus_switch_state(dev, XenbusStateClosed);2169 xenbus_switch_state(dev, XenbusStateClosed);
2157 wait_event(module_wq,2170 ret = wait_event_timeout(module_wq,
2158 xenbus_read_driver_state(dev->otherend) ==2171 xenbus_read_driver_state(dev->otherend) ==
2159 XenbusStateClosed ||2172 XenbusStateClosed ||
2160 xenbus_read_driver_state(dev->otherend) ==2173 xenbus_read_driver_state(dev->otherend) ==
2161 XenbusStateUnknown);2174 XenbusStateUnknown,
2162 }2175 XENNET_TIMEOUT);
2176 } while (!ret);
2177}
2178
2179static int xennet_remove(struct xenbus_device *dev)
2180{
2181 struct netfront_info *info = dev_get_drvdata(&dev->dev);
2163 2182
2183 xennet_bus_close(dev);
2164 xennet_disconnect_backend(info);2184 xennet_disconnect_backend(info);
2165 2185
2166 if (info->netdev->reg_state == NETREG_REGISTERED)2186 if (info->netdev->reg_state == NETREG_REGISTERED)
drivers/nfc/s3fwrn5/core.c+1−0
@@ -198,6 +198,7 @@ int s3fwrn5_recv_frame(struct nci_dev *ndev, struct sk_buff *skb, · 197 unmodified lines
198 case S3FWRN5_MODE_FW:198 case S3FWRN5_MODE_FW:
199 return s3fwrn5_fw_recv_frame(ndev, skb);199 return s3fwrn5_fw_recv_frame(ndev, skb);
200 default:200 default:
201 kfree_skb(skb);
201 return -ENODEV;202 return -ENODEV;
202 }203 }
203}204}
drivers/nvdimm/security.c+1−1
@@ -95,7 +95,7 @@ static struct key *nvdimm_lookup_user_key(struct nvdimm *nvdimm, · 94 unmodified lines
95 struct encrypted_key_payload *epayload;95 struct encrypted_key_payload *epayload;
96 struct device *dev = &nvdimm->dev;96 struct device *dev = &nvdimm->dev;
97 97
98 keyref = lookup_user_key(id, 0, 0);98 keyref = lookup_user_key(id, 0, KEY_NEED_SEARCH);
99 if (IS_ERR(keyref))99 if (IS_ERR(keyref))
100 return NULL;100 return NULL;
101 101
drivers/nvme/host/core.c+4−12
@@ -1102,6 +1102,9 @@ static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, · 1101 unmodified lines
1102 int pos;1102 int pos;
1103 int len;1103 int len;
1104 1104
1105 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1106 return 0;
1107
1105 c.identify.opcode = nvme_admin_identify;1108 c.identify.opcode = nvme_admin_identify;
1106 c.identify.nsid = cpu_to_le32(nsid);1109 c.identify.nsid = cpu_to_le32(nsid);
1107 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;1110 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
@@ -1115,18 +1118,6 @@ static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid, · 7 unmodified lines
1115 if (status) {1118 if (status) {
1116 dev_warn(ctrl->device,1119 dev_warn(ctrl->device,
1117 "Identify Descriptors failed (%d)\n", status);1120 "Identify Descriptors failed (%d)\n", status);
1118 /*
1119 * Don't treat non-retryable errors as fatal, as we potentially
1120 * already have a NGUID or EUI-64. If we failed with DNR set,
1121 * we want to silently ignore the error as we can still
1122 * identify the device, but if the status has DNR set, we want
1123 * to propagate the error back specifically for the disk
1124 * revalidation flow to make sure we don't abandon the
1125 * device just because of a temporal retry-able error (such
1126 * as path of transport errors).
1127 */
1128 if (status > 0 && (status & NVME_SC_DNR))
1129 status = 0;
1130 goto free_data;1121 goto free_data;
1131 }1122 }
1132 1123
@@ -1980,6 +1971,7 @@ static int __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id) · 847 unmodified lines
1980 if (ns->head->disk) {1971 if (ns->head->disk) {
1981 nvme_update_disk_info(ns->head->disk, ns, id);1972 nvme_update_disk_info(ns->head->disk, ns, id);
1982 blk_queue_stack_limits(ns->head->disk->queue, ns->queue);1973 blk_queue_stack_limits(ns->head->disk->queue, ns->queue);
1974 nvme_mpath_update_disk_size(ns->head->disk);
1983 }1975 }
1984#endif1976#endif
1985 return 0;1977 return 0;
drivers/nvme/host/nvme.h+20−0
@@ -129,6 +129,13 @@ enum nvme_quirks { · 128 unmodified lines
129 * Don't change the value of the temperature threshold feature129 * Don't change the value of the temperature threshold feature
130 */130 */
131 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),131 NVME_QUIRK_NO_TEMP_THRESH_CHANGE = (1 << 14),
132
133 /*
134 * The controller doesn't handle the Identify Namespace
135 * Identification Descriptor list subcommand despite claiming
136 * NVMe 1.3 compliance.
137 */
138 NVME_QUIRK_NO_NS_DESC_LIST = (1 << 15),
132};139};
133 140
134/*141/*
@@ -604,6 +611,16 @@ static inline void nvme_trace_bio_complete(struct request *req, · 469 unmodified lines
604 trace_block_bio_complete(ns->head->disk->queue, req->bio);611 trace_block_bio_complete(ns->head->disk->queue, req->bio);
605}612}
606 613
614static inline void nvme_mpath_update_disk_size(struct gendisk *disk)
615{
616 struct block_device *bdev = bdget_disk(disk, 0);
617
618 if (bdev) {
619 bd_set_size(bdev, get_capacity(disk) << SECTOR_SHIFT);
620 bdput(bdev);
621 }
622}
623
607extern struct device_attribute dev_attr_ana_grpid;624extern struct device_attribute dev_attr_ana_grpid;
608extern struct device_attribute dev_attr_ana_state;625extern struct device_attribute dev_attr_ana_state;
609extern struct device_attribute subsys_attr_iopolicy;626extern struct device_attribute subsys_attr_iopolicy;
@@ -679,6 +696,9 @@ static inline void nvme_mpath_wait_freeze(struct nvme_subsystem *subsys) · 69 unmodified lines
679static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)696static inline void nvme_mpath_start_freeze(struct nvme_subsystem *subsys)
680{697{
681}698}
699static inline void nvme_mpath_update_disk_size(struct gendisk *disk)
700{
701}
682#endif /* CONFIG_NVME_MULTIPATH */702#endif /* CONFIG_NVME_MULTIPATH */
683 703
684#ifdef CONFIG_NVM704#ifdef CONFIG_NVM
drivers/nvme/host/pci.c+4−0
@@ -3099,6 +3099,8 @@ static const struct pci_device_id nvme_id_table[] = { · 3098 unmodified lines
3099 { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */3099 { PCI_VDEVICE(INTEL, 0x5845), /* Qemu emulated controller */
3100 .driver_data = NVME_QUIRK_IDENTIFY_CNS |3100 .driver_data = NVME_QUIRK_IDENTIFY_CNS |
3101 NVME_QUIRK_DISABLE_WRITE_ZEROES, },3101 NVME_QUIRK_DISABLE_WRITE_ZEROES, },
3102 { PCI_DEVICE(0x126f, 0x2263), /* Silicon Motion unidentified */
3103 .driver_data = NVME_QUIRK_NO_NS_DESC_LIST, },
3102 { PCI_DEVICE(0x1bb1, 0x0100), /* Seagate Nytro Flash Storage */3104 { PCI_DEVICE(0x1bb1, 0x0100), /* Seagate Nytro Flash Storage */
3103 .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },3105 .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY, },
3104 { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */3106 { PCI_DEVICE(0x1c58, 0x0003), /* HGST adapter */
@@ -3122,6 +3124,8 @@ static const struct pci_device_id nvme_id_table[] = { · 17 unmodified lines
3122 { PCI_DEVICE(0x1cc1, 0x8201), /* ADATA SX8200PNP 512GB */3124 { PCI_DEVICE(0x1cc1, 0x8201), /* ADATA SX8200PNP 512GB */
3123 .driver_data = NVME_QUIRK_NO_DEEPEST_PS |3125 .driver_data = NVME_QUIRK_NO_DEEPEST_PS |
3124 NVME_QUIRK_IGNORE_DEV_SUBNQN, },3126 NVME_QUIRK_IGNORE_DEV_SUBNQN, },
3127 { PCI_DEVICE(0x1c5c, 0x1504), /* SK Hynix PC400 */
3128 .driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
3125 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },3129 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3126 { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001),3130 { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001),
3127 .driver_data = NVME_QUIRK_SINGLE_VECTOR },3131 .driver_data = NVME_QUIRK_SINGLE_VECTOR },
drivers/nvme/host/tcp.c+3−0
@@ -1382,6 +1382,9 @@ static int nvme_tcp_alloc_queue(struct nvme_ctrl *nctrl, · 1381 unmodified lines
1382 if (nctrl->opts->tos >= 0)1382 if (nctrl->opts->tos >= 0)
1383 ip_sock_set_tos(queue->sock->sk, nctrl->opts->tos);1383 ip_sock_set_tos(queue->sock->sk, nctrl->opts->tos);
1384 1384
1385 /* Set 10 seconds timeout for icresp recvmsg */
1386 queue->sock->sk->sk_rcvtimeo = 10 * HZ;
1387
1385 queue->sock->sk->sk_allocation = GFP_ATOMIC;1388 queue->sock->sk->sk_allocation = GFP_ATOMIC;
1386 nvme_tcp_set_queue_io_cpu(queue);1389 nvme_tcp_set_queue_io_cpu(queue);
1387 queue->request = NULL;1390 queue->request = NULL;
drivers/opp/of.c+4−0
@@ -902,6 +902,10 @@ static int _of_add_opp_table_v1(struct device *dev, struct opp_table *opp_table) · 901 unmodified lines
902 return -EINVAL;902 return -EINVAL;
903 }903 }
904 904
905 mutex_lock(&opp_table->lock);
906 opp_table->parsed_static_opps = 1;
907 mutex_unlock(&opp_table->lock);
908
905 val = prop->value;909 val = prop->value;
906 while (nr) {910 while (nr) {
907 unsigned long freq = be32_to_cpup(val++) * 1000;911 unsigned long freq = be32_to_cpup(val++) * 1000;
drivers/pci/controller/vmd.c+3−2
@@ -546,9 +546,10 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) · 545 unmodified lines
546 546
547 vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,547 vmd->irq_domain = pci_msi_create_irq_domain(fn, &vmd_msi_domain_info,
548 x86_vector_domain);548 x86_vector_domain);
549 irq_domain_free_fwnode(fn);549 if (!vmd->irq_domain) {
550 if (!vmd->irq_domain)550 irq_domain_free_fwnode(fn);
551 return -ENODEV;551 return -ENODEV;
552 }
552 553
553 pci_add_resource(&resources, &vmd->resources[0]);554 pci_add_resource(&resources, &vmd->resources[0]);
554 pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);555 pci_add_resource_offset(&resources, &vmd->resources[1], offset[0]);
drivers/pci/pci.c+9−21
@@ -4638,8 +4638,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) · 4637 unmodified lines
4638 * pcie_wait_for_link_delay - Wait until link is active or inactive4638 * pcie_wait_for_link_delay - Wait until link is active or inactive
4639 * @pdev: Bridge device4639 * @pdev: Bridge device
4640 * @active: waiting for active or inactive?4640 * @active: waiting for active or inactive?
4641 * @delay: Delay to wait after link has become active (in ms). Specify %04641 * @delay: Delay to wait after link has become active (in ms)
4642 * for no delay.
4643 *4642 *
4644 * Use this to wait till link becomes active or inactive.4643 * Use this to wait till link becomes active or inactive.
4645 */4644 */
@@ -4680,7 +4679,7 @@ static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, · 34 unmodified lines
4680 msleep(10);4679 msleep(10);
4681 timeout -= 10;4680 timeout -= 10;
4682 }4681 }
4683 if (active && ret && delay)4682 if (active && ret)
4684 msleep(delay);4683 msleep(delay);
4685 else if (ret != active)4684 else if (ret != active)
4686 pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",4685 pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",
@@ -4801,28 +4800,17 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) · 114 unmodified lines
4801 if (!pcie_downstream_port(dev))4800 if (!pcie_downstream_port(dev))
4802 return;4801 return;
4803 4802
4804 /*4803 if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
4805 * Per PCIe r5.0, sec 6.6.1, for downstream ports that support4804 pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
4806 * speeds > 5 GT/s, we must wait for link training to complete4805 msleep(delay);
4807 * before the mandatory delay.4806 } else {
4808 *4807 pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
4809 * We can only tell when link training completes via DLL Link4808 delay);
4810 * Active, which is required for downstream ports that support4809 if (!pcie_wait_for_link_delay(dev, true, delay)) {
4811 * speeds > 5 GT/s (sec 7.5.3.6). Unfortunately some common
4812 * devices do not implement Link Active reporting even when it's
4813 * required, so we'll check for that directly instead of checking
4814 * the supported link speed. We assume devices without Link Active
4815 * reporting can train in 100 ms regardless of speed.
4816 */
4817 if (dev->link_active_reporting) {
4818 pci_dbg(dev, "waiting for link to train\n");
4819 if (!pcie_wait_for_link_delay(dev, true, 0)) {
4820 /* Did not train, no need to wait any further */4810 /* Did not train, no need to wait any further */
4821 return;4811 return;
4822 }4812 }
4823 }4813 }
4824 pci_dbg(child, "waiting %d ms to become accessible\n", delay);
4825 msleep(delay);
4826 4814
4827 if (!pci_device_is_present(child)) {4815 if (!pci_device_is_present(child)) {
4828 pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);4816 pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);
drivers/pci/quirks.c+13−0
@@ -2330,6 +2330,19 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f1, quirk_disable_aspm_l0s); · 2329 unmodified lines
2330DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f4, quirk_disable_aspm_l0s);2330DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x10f4, quirk_disable_aspm_l0s);
2331DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1508, quirk_disable_aspm_l0s);2331DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1508, quirk_disable_aspm_l0s);
2332 2332
2333static void quirk_disable_aspm_l0s_l1(struct pci_dev *dev)
2334{
2335 pci_info(dev, "Disabling ASPM L0s/L1\n");
2336 pci_disable_link_state(dev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
2337}
2338
2339/*
2340 * ASM1083/1085 PCIe-PCI bridge devices cause AER timeout errors on the
2341 * upstream PCIe root port when ASPM is enabled. At least L0s mode is affected;
2342 * disable both L0s and L1 for now to be safe.
2343 */
2344DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ASMEDIA, 0x1080, quirk_disable_aspm_l0s_l1);
2345
2333/*2346/*
2334 * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain2347 * Some Pericom PCIe-to-PCI bridges in reverse mode need the PCIe Retrain
2335 * Link bit cleared after starting the link retrain process to allow this2348 * Link bit cleared after starting the link retrain process to allow this
drivers/perf/arm-cci.c+1−0
@@ -1718,6 +1718,7 @@ static struct platform_driver cci_pmu_driver = { · 1717 unmodified lines
1718 .driver = {1718 .driver = {
1719 .name = DRIVER_NAME,1719 .name = DRIVER_NAME,
1720 .of_match_table = arm_cci_pmu_matches,1720 .of_match_table = arm_cci_pmu_matches,
1721 .suppress_bind_attrs = true,
1721 },1722 },
1722 .probe = cci_pmu_probe,1723 .probe = cci_pmu_probe,
1723 .remove = cci_pmu_remove,1724 .remove = cci_pmu_remove,
drivers/perf/arm-ccn.c+1−0
@@ -1545,6 +1545,7 @@ static struct platform_driver arm_ccn_driver = { · 1544 unmodified lines
1545 .driver = {1545 .driver = {
1546 .name = "arm-ccn",1546 .name = "arm-ccn",
1547 .of_match_table = arm_ccn_match,1547 .of_match_table = arm_ccn_match,
1548 .suppress_bind_attrs = true,
1548 },1549 },
1549 .probe = arm_ccn_probe,1550 .probe = arm_ccn_probe,
1550 .remove = arm_ccn_remove,1551 .remove = arm_ccn_remove,
drivers/perf/arm_dsu_pmu.c+1−0
@@ -757,6 +757,7 @@ static struct platform_driver dsu_pmu_driver = { · 756 unmodified lines
757 .driver = {757 .driver = {
758 .name = DRVNAME,758 .name = DRVNAME,
759 .of_match_table = of_match_ptr(dsu_pmu_of_match),759 .of_match_table = of_match_ptr(dsu_pmu_of_match),
760 .suppress_bind_attrs = true,
760 },761 },
761 .probe = dsu_pmu_device_probe,762 .probe = dsu_pmu_device_probe,
762 .remove = dsu_pmu_device_remove,763 .remove = dsu_pmu_device_remove,
drivers/perf/arm_smmuv3_pmu.c+2−0
@@ -742,6 +742,7 @@ static int smmu_pmu_probe(struct platform_device *pdev) · 741 unmodified lines
742 platform_set_drvdata(pdev, smmu_pmu);742 platform_set_drvdata(pdev, smmu_pmu);
743 743
744 smmu_pmu->pmu = (struct pmu) {744 smmu_pmu->pmu = (struct pmu) {
745 .module = THIS_MODULE,
745 .task_ctx_nr = perf_invalid_context,746 .task_ctx_nr = perf_invalid_context,
746 .pmu_enable = smmu_pmu_enable,747 .pmu_enable = smmu_pmu_enable,
747 .pmu_disable = smmu_pmu_disable,748 .pmu_disable = smmu_pmu_disable,
@@ -859,6 +860,7 @@ static void smmu_pmu_shutdown(struct platform_device *pdev) · 111 unmodified lines
859static struct platform_driver smmu_pmu_driver = {860static struct platform_driver smmu_pmu_driver = {
860 .driver = {861 .driver = {
861 .name = "arm-smmu-v3-pmcg",862 .name = "arm-smmu-v3-pmcg",
863 .suppress_bind_attrs = true,
862 },864 },
863 .probe = smmu_pmu_probe,865 .probe = smmu_pmu_probe,
864 .remove = smmu_pmu_remove,866 .remove = smmu_pmu_remove,
drivers/perf/arm_spe_pmu.c+1−0
@@ -1226,6 +1226,7 @@ static struct platform_driver arm_spe_pmu_driver = { · 1225 unmodified lines
1226 .driver = {1226 .driver = {
1227 .name = DRVNAME,1227 .name = DRVNAME,
1228 .of_match_table = of_match_ptr(arm_spe_pmu_of_match),1228 .of_match_table = of_match_ptr(arm_spe_pmu_of_match),
1229 .suppress_bind_attrs = true,
1229 },1230 },
1230 .probe = arm_spe_pmu_device_probe,1231 .probe = arm_spe_pmu_device_probe,
1231 .remove = arm_spe_pmu_device_remove,1232 .remove = arm_spe_pmu_device_remove,
drivers/perf/fsl_imx8_ddr_perf.c+2−0
@@ -512,6 +512,7 @@ static int ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base, · 511 unmodified lines
512{512{
513 *pmu = (struct ddr_pmu) {513 *pmu = (struct ddr_pmu) {
514 .pmu = (struct pmu) {514 .pmu = (struct pmu) {
515 .module = THIS_MODULE,
515 .capabilities = PERF_PMU_CAP_NO_EXCLUDE,516 .capabilities = PERF_PMU_CAP_NO_EXCLUDE,
516 .task_ctx_nr = perf_invalid_context,517 .task_ctx_nr = perf_invalid_context,
517 .attr_groups = attr_groups,518 .attr_groups = attr_groups,
@@ -706,6 +707,7 @@ static struct platform_driver imx_ddr_pmu_driver = { · 188 unmodified lines
706 .driver = {707 .driver = {
707 .name = "imx-ddr-pmu",708 .name = "imx-ddr-pmu",
708 .of_match_table = imx_ddr_pmu_dt_ids,709 .of_match_table = imx_ddr_pmu_dt_ids,
710 .suppress_bind_attrs = true,
709 },711 },
710 .probe = ddr_perf_probe,712 .probe = ddr_perf_probe,
711 .remove = ddr_perf_remove,713 .remove = ddr_perf_remove,
drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c+2−0
@@ -378,6 +378,7 @@ static int hisi_ddrc_pmu_probe(struct platform_device *pdev) · 377 unmodified lines
378 ddrc_pmu->sccl_id, ddrc_pmu->index_id);378 ddrc_pmu->sccl_id, ddrc_pmu->index_id);
379 ddrc_pmu->pmu = (struct pmu) {379 ddrc_pmu->pmu = (struct pmu) {
380 .name = name,380 .name = name,
381 .module = THIS_MODULE,
381 .task_ctx_nr = perf_invalid_context,382 .task_ctx_nr = perf_invalid_context,
382 .event_init = hisi_uncore_pmu_event_init,383 .event_init = hisi_uncore_pmu_event_init,
383 .pmu_enable = hisi_uncore_pmu_enable,384 .pmu_enable = hisi_uncore_pmu_enable,
@@ -418,6 +419,7 @@ static struct platform_driver hisi_ddrc_pmu_driver = { · 34 unmodified lines
418 .driver = {419 .driver = {
419 .name = "hisi_ddrc_pmu",420 .name = "hisi_ddrc_pmu",
420 .acpi_match_table = ACPI_PTR(hisi_ddrc_pmu_acpi_match),421 .acpi_match_table = ACPI_PTR(hisi_ddrc_pmu_acpi_match),
422 .suppress_bind_attrs = true,
421 },423 },
422 .probe = hisi_ddrc_pmu_probe,424 .probe = hisi_ddrc_pmu_probe,
423 .remove = hisi_ddrc_pmu_remove,425 .remove = hisi_ddrc_pmu_remove,
drivers/perf/hisilicon/hisi_uncore_hha_pmu.c+2−0
@@ -390,6 +390,7 @@ static int hisi_hha_pmu_probe(struct platform_device *pdev) · 389 unmodified lines
390 hha_pmu->sccl_id, hha_pmu->index_id);390 hha_pmu->sccl_id, hha_pmu->index_id);
391 hha_pmu->pmu = (struct pmu) {391 hha_pmu->pmu = (struct pmu) {
392 .name = name,392 .name = name,
393 .module = THIS_MODULE,
393 .task_ctx_nr = perf_invalid_context,394 .task_ctx_nr = perf_invalid_context,
394 .event_init = hisi_uncore_pmu_event_init,395 .event_init = hisi_uncore_pmu_event_init,
395 .pmu_enable = hisi_uncore_pmu_enable,396 .pmu_enable = hisi_uncore_pmu_enable,
@@ -430,6 +431,7 @@ static struct platform_driver hisi_hha_pmu_driver = { · 34 unmodified lines
430 .driver = {431 .driver = {
431 .name = "hisi_hha_pmu",432 .name = "hisi_hha_pmu",
432 .acpi_match_table = ACPI_PTR(hisi_hha_pmu_acpi_match),433 .acpi_match_table = ACPI_PTR(hisi_hha_pmu_acpi_match),
434 .suppress_bind_attrs = true,
433 },435 },
434 .probe = hisi_hha_pmu_probe,436 .probe = hisi_hha_pmu_probe,
435 .remove = hisi_hha_pmu_remove,437 .remove = hisi_hha_pmu_remove,
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c+2−0
@@ -380,6 +380,7 @@ static int hisi_l3c_pmu_probe(struct platform_device *pdev) · 379 unmodified lines
380 l3c_pmu->sccl_id, l3c_pmu->index_id);380 l3c_pmu->sccl_id, l3c_pmu->index_id);
381 l3c_pmu->pmu = (struct pmu) {381 l3c_pmu->pmu = (struct pmu) {
382 .name = name,382 .name = name,
383 .module = THIS_MODULE,
383 .task_ctx_nr = perf_invalid_context,384 .task_ctx_nr = perf_invalid_context,
384 .event_init = hisi_uncore_pmu_event_init,385 .event_init = hisi_uncore_pmu_event_init,
385 .pmu_enable = hisi_uncore_pmu_enable,386 .pmu_enable = hisi_uncore_pmu_enable,
@@ -420,6 +421,7 @@ static struct platform_driver hisi_l3c_pmu_driver = { · 34 unmodified lines
420 .driver = {421 .driver = {
421 .name = "hisi_l3c_pmu",422 .name = "hisi_l3c_pmu",
422 .acpi_match_table = ACPI_PTR(hisi_l3c_pmu_acpi_match),423 .acpi_match_table = ACPI_PTR(hisi_l3c_pmu_acpi_match),
424 .suppress_bind_attrs = true,
423 },425 },
424 .probe = hisi_l3c_pmu_probe,426 .probe = hisi_l3c_pmu_probe,
425 .remove = hisi_l3c_pmu_remove,427 .remove = hisi_l3c_pmu_remove,
drivers/perf/qcom_l2_pmu.c+1−0
@@ -1028,6 +1028,7 @@ static struct platform_driver l2_cache_pmu_driver = { · 1027 unmodified lines
1028 .driver = {1028 .driver = {
1029 .name = "qcom-l2cache-pmu",1029 .name = "qcom-l2cache-pmu",
1030 .acpi_match_table = ACPI_PTR(l2_cache_pmu_acpi_match),1030 .acpi_match_table = ACPI_PTR(l2_cache_pmu_acpi_match),
1031 .suppress_bind_attrs = true,
1031 },1032 },
1032 .probe = l2_cache_pmu_probe,1033 .probe = l2_cache_pmu_probe,
1033 .remove = l2_cache_pmu_remove,1034 .remove = l2_cache_pmu_remove,
drivers/perf/qcom_l3_pmu.c+1−0
@@ -814,6 +814,7 @@ static struct platform_driver qcom_l3_cache_pmu_driver = { · 813 unmodified lines
814 .driver = {814 .driver = {
815 .name = "qcom-l3cache-pmu",815 .name = "qcom-l3cache-pmu",
816 .acpi_match_table = ACPI_PTR(qcom_l3_cache_pmu_acpi_match),816 .acpi_match_table = ACPI_PTR(qcom_l3_cache_pmu_acpi_match),
817 .suppress_bind_attrs = true,
817 },818 },
818 .probe = qcom_l3_cache_pmu_probe,819 .probe = qcom_l3_cache_pmu_probe,
819};820};
drivers/perf/thunderx2_pmu.c+1−0
@@ -1017,6 +1017,7 @@ static struct platform_driver tx2_uncore_driver = { · 1016 unmodified lines
1017 .driver = {1017 .driver = {
1018 .name = "tx2-uncore-pmu",1018 .name = "tx2-uncore-pmu",
1019 .acpi_match_table = ACPI_PTR(tx2_uncore_acpi_match),1019 .acpi_match_table = ACPI_PTR(tx2_uncore_acpi_match),
1020 .suppress_bind_attrs = true,
1020 },1021 },
1021 .probe = tx2_uncore_probe,1022 .probe = tx2_uncore_probe,
1022 .remove = tx2_uncore_remove,1023 .remove = tx2_uncore_remove,
drivers/perf/xgene_pmu.c+1−0
@@ -1975,6 +1975,7 @@ static struct platform_driver xgene_pmu_driver = { · 1974 unmodified lines
1975 .name = "xgene-pmu",1975 .name = "xgene-pmu",
1976 .of_match_table = xgene_pmu_of_match,1976 .of_match_table = xgene_pmu_of_match,
1977 .acpi_match_table = ACPI_PTR(xgene_pmu_acpi_match),1977 .acpi_match_table = ACPI_PTR(xgene_pmu_acpi_match),
1978 .suppress_bind_attrs = true,
1978 },1979 },
1979};1980};
1980 1981
drivers/phy/allwinner/phy-sun4i-usb.c+3−2
@@ -545,13 +545,14 @@ static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work) · 544 unmodified lines
545 struct sun4i_usb_phy_data *data =545 struct sun4i_usb_phy_data *data =
546 container_of(work, struct sun4i_usb_phy_data, detect.work);546 container_of(work, struct sun4i_usb_phy_data, detect.work);
547 struct phy *phy0 = data->phys[0].phy;547 struct phy *phy0 = data->phys[0].phy;
548 struct sun4i_usb_phy *phy = phy_get_drvdata(phy0);548 struct sun4i_usb_phy *phy;
549 bool force_session_end, id_notify = false, vbus_notify = false;549 bool force_session_end, id_notify = false, vbus_notify = false;
550 int id_det, vbus_det;550 int id_det, vbus_det;
551 551
552 if (phy0 == NULL)552 if (!phy0)
553 return;553 return;
554 554
555 phy = phy_get_drvdata(phy0);
555 id_det = sun4i_usb_phy0_get_id_det(data);556 id_det = sun4i_usb_phy0_get_id_det(data);
556 vbus_det = sun4i_usb_phy0_get_vbus_det(data);557 vbus_det = sun4i_usb_phy0_get_vbus_det(data);
557 558
drivers/phy/intel/phy-intel-combo.c+8−6
@@ -134,7 +134,7 @@ static inline void combo_phy_w32_off_mask(void __iomem *base, unsigned int reg, · 133 unmodified lines
134 134
135 reg_val = readl(base + reg);135 reg_val = readl(base + reg);
136 reg_val &= ~mask;136 reg_val &= ~mask;
137 reg_val |= FIELD_PREP(mask, val);137 reg_val |= val;
138 writel(reg_val, base + reg);138 writel(reg_val, base + reg);
139}139}
140 140
@@ -169,7 +169,7 @@ static int intel_cbphy_pcie_en_pad_refclk(struct intel_cbphy_iphy *iphy) · 28 unmodified lines
169 return 0;169 return 0;
170 170
171 combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,171 combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,
172 PCIE_PHY_CLK_PAD, 0);172 PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 0));
173 173
174 /* Delay for stable clock PLL */174 /* Delay for stable clock PLL */
175 usleep_range(50, 100);175 usleep_range(50, 100);
@@ -192,14 +192,14 @@ static int intel_cbphy_pcie_dis_pad_refclk(struct intel_cbphy_iphy *iphy) · 16 unmodified lines
192 return 0;192 return 0;
193 193
194 combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,194 combo_phy_w32_off_mask(cbphy->app_base, PCIE_PHY_GEN_CTRL,
195 PCIE_PHY_CLK_PAD, 1);195 PCIE_PHY_CLK_PAD, FIELD_PREP(PCIE_PHY_CLK_PAD, 1));
196 196
197 return 0;197 return 0;
198}198}
199 199
200static int intel_cbphy_set_mode(struct intel_combo_phy *cbphy)200static int intel_cbphy_set_mode(struct intel_combo_phy *cbphy)
201{201{
202 enum intel_combo_mode cb_mode = PHY_PCIE_MODE;202 enum intel_combo_mode cb_mode;
203 enum aggregated_mode aggr = cbphy->aggr_mode;203 enum aggregated_mode aggr = cbphy->aggr_mode;
204 struct device *dev = cbphy->dev;204 struct device *dev = cbphy->dev;
205 enum intel_phy_mode mode;205 enum intel_phy_mode mode;
@@ -224,6 +224,8 @@ static int intel_cbphy_set_mode(struct intel_combo_phy *cbphy) · 18 unmodified lines
224 224
225 cb_mode = SATA0_SATA1_MODE;225 cb_mode = SATA0_SATA1_MODE;
226 break;226 break;
227 default:
228 return -EINVAL;
227 }229 }
228 230
229 ret = regmap_write(cbphy->hsiocfg, REG_COMBO_MODE(cbphy->bid), cb_mode);231 ret = regmap_write(cbphy->hsiocfg, REG_COMBO_MODE(cbphy->bid), cb_mode);
@@ -385,7 +387,7 @@ static int intel_cbphy_calibrate(struct phy *phy) · 155 unmodified lines
385 387
386 /* trigger auto RX adaptation */388 /* trigger auto RX adaptation */
387 combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),389 combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),
388 ADAPT_REQ_MSK, 3);390 ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 3));
389 /* Wait RX adaptation to finish */391 /* Wait RX adaptation to finish */
390 ret = readl_poll_timeout(cr_base + CR_ADDR(PCS_XF_RX_ADAPT_ACK, id),392 ret = readl_poll_timeout(cr_base + CR_ADDR(PCS_XF_RX_ADAPT_ACK, id),
391 val, val & RX_ADAPT_ACK_BIT, 10, 5000);393 val, val & RX_ADAPT_ACK_BIT, 10, 5000);
@@ -396,7 +398,7 @@ static int intel_cbphy_calibrate(struct phy *phy) · 4 unmodified lines
396 398
397 /* Stop RX adaptation */399 /* Stop RX adaptation */
398 combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),400 combo_phy_w32_off_mask(cr_base, CR_ADDR(PCS_XF_ATE_OVRD_IN_2, id),
399 ADAPT_REQ_MSK, 0);401 ADAPT_REQ_MSK, FIELD_PREP(ADAPT_REQ_MSK, 0));
400 402
401 return ret;403 return ret;
402}404}
drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c+2−2
@@ -607,8 +607,8 @@ static int inno_dsidphy_probe(struct platform_device *pdev) · 606 unmodified lines
607 platform_set_drvdata(pdev, inno);607 platform_set_drvdata(pdev, inno);
608 608
609 inno->phy_base = devm_platform_ioremap_resource(pdev, 0);609 inno->phy_base = devm_platform_ioremap_resource(pdev, 0);
610 if (!inno->phy_base)610 if (IS_ERR(inno->phy_base))
611 return -ENOMEM;611 return PTR_ERR(inno->phy_base);
612 612
613 inno->ref_clk = devm_clk_get(dev, "ref");613 inno->ref_clk = devm_clk_get(dev, "ref");
614 if (IS_ERR(inno->ref_clk)) {614 if (IS_ERR(inno->ref_clk)) {
drivers/phy/ti/phy-am654-serdes.c+1−1
@@ -72,7 +72,7 @@ struct serdes_am654_clk_mux { · 71 unmodified lines
72#define to_serdes_am654_clk_mux(_hw) \72#define to_serdes_am654_clk_mux(_hw) \
73 container_of(_hw, struct serdes_am654_clk_mux, hw)73 container_of(_hw, struct serdes_am654_clk_mux, hw)
74 74
75static struct regmap_config serdes_am654_regmap_config = {75static const struct regmap_config serdes_am654_regmap_config = {
76 .reg_bits = 32,76 .reg_bits = 32,
77 .val_bits = 32,77 .val_bits = 32,
78 .reg_stride = 4,78 .reg_stride = 4,
drivers/phy/ti/phy-j721e-wiz.c+5−5
@@ -117,7 +117,7 @@ struct wiz_clk_mux { · 116 unmodified lines
117struct wiz_clk_divider {117struct wiz_clk_divider {
118 struct clk_hw hw;118 struct clk_hw hw;
119 struct regmap_field *field;119 struct regmap_field *field;
120 struct clk_div_table *table;120 const struct clk_div_table *table;
121 struct clk_init_data clk_data;121 struct clk_init_data clk_data;
122};122};
123 123
@@ -131,7 +131,7 @@ struct wiz_clk_mux_sel { · 7 unmodified lines
131 131
132struct wiz_clk_div_sel {132struct wiz_clk_div_sel {
133 struct regmap_field *field;133 struct regmap_field *field;
134 struct clk_div_table *table;134 const struct clk_div_table *table;
135 const char *node_name;135 const char *node_name;
136};136};
137 137
@@ -173,7 +173,7 @@ static struct wiz_clk_mux_sel clk_mux_sel_10g[] = { · 35 unmodified lines
173 },173 },
174};174};
175 175
176static struct clk_div_table clk_div_table[] = {176static const struct clk_div_table clk_div_table[] = {
177 { .val = 0, .div = 1, },177 { .val = 0, .div = 1, },
178 { .val = 1, .div = 2, },178 { .val = 1, .div = 2, },
179 { .val = 2, .div = 4, },179 { .val = 2, .div = 4, },
@@ -559,7 +559,7 @@ static const struct clk_ops wiz_clk_div_ops = { · 379 unmodified lines
559 559
560static int wiz_div_clk_register(struct wiz *wiz, struct device_node *node,560static int wiz_div_clk_register(struct wiz *wiz, struct device_node *node,
561 struct regmap_field *field,561 struct regmap_field *field,
562 struct clk_div_table *table)562 const struct clk_div_table *table)
563{563{
564 struct device *dev = wiz->dev;564 struct device *dev = wiz->dev;
565 struct wiz_clk_divider *div;565 struct wiz_clk_divider *div;
@@ -756,7 +756,7 @@ static const struct reset_control_ops wiz_phy_reset_ops = { · 190 unmodified lines
756 .deassert = wiz_phy_reset_deassert,756 .deassert = wiz_phy_reset_deassert,
757};757};
758 758
759static struct regmap_config wiz_regmap_config = {759static const struct regmap_config wiz_regmap_config = {
760 .reg_bits = 32,760 .reg_bits = 32,
761 .val_bits = 32,761 .val_bits = 32,
762 .reg_stride = 4,762 .reg_stride = 4,
drivers/pinctrl/intel/pinctrl-baytrail.c+53−14
@@ -800,6 +800,21 @@ static void byt_gpio_disable_free(struct pinctrl_dev *pctl_dev, · 799 unmodified lines
800 pm_runtime_put(vg->dev);800 pm_runtime_put(vg->dev);
801}801}
802 802
803static void byt_gpio_direct_irq_check(struct intel_pinctrl *vg,
804 unsigned int offset)
805{
806 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
807
808 /*
809 * Before making any direction modifications, do a check if gpio is set
810 * for direct IRQ. On Bay Trail, setting GPIO to output does not make
811 * sense, so let's at least inform the caller before they shoot
812 * themselves in the foot.
813 */
814 if (readl(conf_reg) & BYT_DIRECT_IRQ_EN)
815 dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output");
816}
817
803static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev,818static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev,
804 struct pinctrl_gpio_range *range,819 struct pinctrl_gpio_range *range,
805 unsigned int offset,820 unsigned int offset,
@@ -807,7 +822,6 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, · 1 unmodified line
807{822{
808 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);823 struct intel_pinctrl *vg = pinctrl_dev_get_drvdata(pctl_dev);
809 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);824 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
810 void __iomem *conf_reg = byt_gpio_reg(vg, offset, BYT_CONF0_REG);
811 unsigned long flags;825 unsigned long flags;
812 u32 value;826 u32 value;
813 827
@@ -817,14 +831,8 @@ static int byt_gpio_set_direction(struct pinctrl_dev *pctl_dev, · 3 unmodified lines
817 value &= ~BYT_DIR_MASK;831 value &= ~BYT_DIR_MASK;
818 if (input)832 if (input)
819 value |= BYT_OUTPUT_EN;833 value |= BYT_OUTPUT_EN;
820 else if (readl(conf_reg) & BYT_DIRECT_IRQ_EN)834 else
821 /*835 byt_gpio_direct_irq_check(vg, offset);
822 * Before making any direction modifications, do a check if gpio
823 * is set for direct IRQ. On baytrail, setting GPIO to output
824 * does not make sense, so let's at least inform the caller before
825 * they shoot themselves in the foot.
826 */
827 dev_info_once(vg->dev, "Potential Error: Setting GPIO with direct_irq_en to output");
828 836
829 writel(value, val_reg);837 writel(value, val_reg);
830 838
@@ -1165,19 +1173,50 @@ static int byt_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) · 334 unmodified lines
1165 1173
1166static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)1174static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned int offset)
1167{1175{
1168 return pinctrl_gpio_direction_input(chip->base + offset);1176 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1177 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1178 unsigned long flags;
1179 u32 reg;
1180
1181 raw_spin_lock_irqsave(&byt_lock, flags);
1182
1183 reg = readl(val_reg);
1184 reg &= ~BYT_DIR_MASK;
1185 reg |= BYT_OUTPUT_EN;
1186 writel(reg, val_reg);
1187
1188 raw_spin_unlock_irqrestore(&byt_lock, flags);
1189 return 0;
1169}1190}
1170 1191
1192/*
1193 * Note despite the temptation this MUST NOT be converted into a call to
1194 * pinctrl_gpio_direction_output() + byt_gpio_set() that does not work this
1195 * MUST be done as a single BYT_VAL_REG register write.
1196 * See the commit message of the commit adding this comment for details.
1197 */
1171static int byt_gpio_direction_output(struct gpio_chip *chip,1198static int byt_gpio_direction_output(struct gpio_chip *chip,
1172 unsigned int offset, int value)1199 unsigned int offset, int value)
1173{1200{
1174 int ret = pinctrl_gpio_direction_output(chip->base + offset);1201 struct intel_pinctrl *vg = gpiochip_get_data(chip);
1202 void __iomem *val_reg = byt_gpio_reg(vg, offset, BYT_VAL_REG);
1203 unsigned long flags;
1204 u32 reg;
1175 1205
1176 if (ret)1206 raw_spin_lock_irqsave(&byt_lock, flags);
1177 return ret;1207
1208 byt_gpio_direct_irq_check(vg, offset);
1178 1209
1179 byt_gpio_set(chip, offset, value);1210 reg = readl(val_reg);
1211 reg &= ~BYT_DIR_MASK;
1212 if (value)
1213 reg |= BYT_LEVEL;
1214 else
1215 reg &= ~BYT_LEVEL;
1180 1216
1217 writel(reg, val_reg);
1218
1219 raw_spin_unlock_irqrestore(&byt_lock, flags);
1181 return 0;1220 return 0;
1182}1221}
1183 1222
drivers/pinctrl/pinctrl-amd.h+1−1
@@ -252,7 +252,7 @@ static const struct amd_pingroup kerncz_groups[] = { · 251 unmodified lines
252 {252 {
253 .name = "uart0",253 .name = "uart0",
254 .pins = uart0_pins,254 .pins = uart0_pins,
255 .npins = 9,255 .npins = 5,
256 },256 },
257 {257 {
258 .name = "uart1",258 .name = "uart1",
drivers/pinctrl/qcom/Kconfig+2−0
@@ -7,6 +7,8 @@ config PINCTRL_MSM · 6 unmodified lines
7 select PINCONF7 select PINCONF
8 select GENERIC_PINCONF8 select GENERIC_PINCONF
9 select GPIOLIB_IRQCHIP9 select GPIOLIB_IRQCHIP
10 select IRQ_DOMAIN_HIERARCHY
11 select IRQ_FASTEOI_HIERARCHY_HANDLERS
10 12
11config PINCTRL_APQ806413config PINCTRL_APQ8064
12 tristate "Qualcomm APQ8064 pin controller driver"14 tristate "Qualcomm APQ8064 pin controller driver"
drivers/pinctrl/qcom/pinctrl-msm.c+72−2
@@ -832,6 +832,52 @@ static void msm_gpio_irq_unmask(struct irq_data *d) · 831 unmodified lines
832 msm_gpio_irq_clear_unmask(d, false);832 msm_gpio_irq_clear_unmask(d, false);
833}833}
834 834
835/**
836 * msm_gpio_update_dual_edge_parent() - Prime next edge for IRQs handled by parent.
837 * @d: The irq dta.
838 *
839 * This is much like msm_gpio_update_dual_edge_pos() but for IRQs that are
840 * normally handled by the parent irqchip. The logic here is slightly
841 * different due to what's easy to do with our parent, but in principle it's
842 * the same.
843 */
844static void msm_gpio_update_dual_edge_parent(struct irq_data *d)
845{
846 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
847 struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
848 const struct msm_pingroup *g = &pctrl->soc->groups[d->hwirq];
849 int loop_limit = 100;
850 unsigned int val;
851 unsigned int type;
852
853 /* Read the value and make a guess about what edge we need to catch */
854 val = msm_readl_io(pctrl, g) & BIT(g->in_bit);
855 type = val ? IRQ_TYPE_EDGE_FALLING : IRQ_TYPE_EDGE_RISING;
856
857 do {
858 /* Set the parent to catch the next edge */
859 irq_chip_set_type_parent(d, type);
860
861 /*
862 * Possibly the line changed between when we last read "val"
863 * (and decided what edge we needed) and when set the edge.
864 * If the value didn't change (or changed and then changed
865 * back) then we're done.
866 */
867 val = msm_readl_io(pctrl, g) & BIT(g->in_bit);
868 if (type == IRQ_TYPE_EDGE_RISING) {
869 if (!val)
870 return;
871 type = IRQ_TYPE_EDGE_FALLING;
872 } else if (type == IRQ_TYPE_EDGE_FALLING) {
873 if (val)
874 return;
875 type = IRQ_TYPE_EDGE_RISING;
876 }
877 } while (loop_limit-- > 0);
878 dev_warn_once(pctrl->dev, "dual-edge irq failed to stabilize\n");
879}
880
835static void msm_gpio_irq_ack(struct irq_data *d)881static void msm_gpio_irq_ack(struct irq_data *d)
836{882{
837 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);883 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
@@ -840,8 +886,11 @@ static void msm_gpio_irq_ack(struct irq_data *d) · 2 unmodified lines
840 unsigned long flags;886 unsigned long flags;
841 u32 val;887 u32 val;
842 888
843 if (test_bit(d->hwirq, pctrl->skip_wake_irqs))889 if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) {
890 if (test_bit(d->hwirq, pctrl->dual_edge_irqs))
891 msm_gpio_update_dual_edge_parent(d);
844 return;892 return;
893 }
845 894
846 g = &pctrl->soc->groups[d->hwirq];895 g = &pctrl->soc->groups[d->hwirq];
847 896
@@ -860,6 +909,17 @@ static void msm_gpio_irq_ack(struct irq_data *d) · 12 unmodified lines
860 raw_spin_unlock_irqrestore(&pctrl->lock, flags);909 raw_spin_unlock_irqrestore(&pctrl->lock, flags);
861}910}
862 911
912static bool msm_gpio_needs_dual_edge_parent_workaround(struct irq_data *d,
913 unsigned int type)
914{
915 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
916 struct msm_pinctrl *pctrl = gpiochip_get_data(gc);
917
918 return type == IRQ_TYPE_EDGE_BOTH &&
919 pctrl->soc->wakeirq_dual_edge_errata && d->parent_data &&
920 test_bit(d->hwirq, pctrl->skip_wake_irqs);
921}
922
863static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)923static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type)
864{924{
865 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);925 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
@@ -868,11 +928,21 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) · 2 unmodified lines
868 unsigned long flags;928 unsigned long flags;
869 u32 val;929 u32 val;
870 930
931 if (msm_gpio_needs_dual_edge_parent_workaround(d, type)) {
932 set_bit(d->hwirq, pctrl->dual_edge_irqs);
933 irq_set_handler_locked(d, handle_fasteoi_ack_irq);
934 msm_gpio_update_dual_edge_parent(d);
935 return 0;
936 }
937
871 if (d->parent_data)938 if (d->parent_data)
872 irq_chip_set_type_parent(d, type);939 irq_chip_set_type_parent(d, type);
873 940
874 if (test_bit(d->hwirq, pctrl->skip_wake_irqs))941 if (test_bit(d->hwirq, pctrl->skip_wake_irqs)) {
942 clear_bit(d->hwirq, pctrl->dual_edge_irqs);
943 irq_set_handler_locked(d, handle_fasteoi_irq);
875 return 0;944 return 0;
945 }
876 946
877 g = &pctrl->soc->groups[d->hwirq];947 g = &pctrl->soc->groups[d->hwirq];
878 948
drivers/pinctrl/qcom/pinctrl-msm.h+4−0
@@ -113,6 +113,9 @@ struct msm_gpio_wakeirq_map { · 112 unmodified lines
113 * @pull_no_keeper: The SoC does not support keeper bias.113 * @pull_no_keeper: The SoC does not support keeper bias.
114 * @wakeirq_map: The map of wakeup capable GPIOs and the pin at PDC/MPM114 * @wakeirq_map: The map of wakeup capable GPIOs and the pin at PDC/MPM
115 * @nwakeirq_map: The number of entries in @wakeirq_map115 * @nwakeirq_map: The number of entries in @wakeirq_map
116 * @wakeirq_dual_edge_errata: If true then GPIOs using the wakeirq_map need
117 * to be aware that their parent can't handle dual
118 * edge interrupts.
116 */119 */
117struct msm_pinctrl_soc_data {120struct msm_pinctrl_soc_data {
118 const struct pinctrl_pin_desc *pins;121 const struct pinctrl_pin_desc *pins;
@@ -128,6 +131,7 @@ struct msm_pinctrl_soc_data { · 9 unmodified lines
128 const int *reserved_gpios;131 const int *reserved_gpios;
129 const struct msm_gpio_wakeirq_map *wakeirq_map;132 const struct msm_gpio_wakeirq_map *wakeirq_map;
130 unsigned int nwakeirq_map;133 unsigned int nwakeirq_map;
134 bool wakeirq_dual_edge_errata;
131};135};
132 136
133extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;137extern const struct dev_pm_ops msm_pinctrl_dev_pm_ops;
drivers/pinctrl/qcom/pinctrl-sc7180.c+1−0
@@ -1147,6 +1147,7 @@ static const struct msm_pinctrl_soc_data sc7180_pinctrl = { · 1146 unmodified lines
1147 .ntiles = ARRAY_SIZE(sc7180_tiles),1147 .ntiles = ARRAY_SIZE(sc7180_tiles),
1148 .wakeirq_map = sc7180_pdc_map,1148 .wakeirq_map = sc7180_pdc_map,
1149 .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),1149 .nwakeirq_map = ARRAY_SIZE(sc7180_pdc_map),
1150 .wakeirq_dual_edge_errata = true,
1150};1151};
1151 1152
1152static int sc7180_pinctrl_probe(struct platform_device *pdev)1153static int sc7180_pinctrl_probe(struct platform_device *pdev)
drivers/platform/x86/asus-wmi.c+1−0
@@ -441,6 +441,7 @@ static int asus_wmi_battery_add(struct power_supply *battery) · 440 unmodified lines
441 * battery is named BATT.441 * battery is named BATT.
442 */442 */
443 if (strcmp(battery->desc->name, "BAT0") != 0 &&443 if (strcmp(battery->desc->name, "BAT0") != 0 &&
444 strcmp(battery->desc->name, "BAT1") != 0 &&
444 strcmp(battery->desc->name, "BATT") != 0)445 strcmp(battery->desc->name, "BATT") != 0)
445 return -ENODEV;446 return -ENODEV;
446 447
drivers/platform/x86/intel_speed_select_if/isst_if_common.h+3−0
@@ -13,6 +13,9 @@ · 12 unmodified lines
13#define INTEL_RAPL_PRIO_DEVID_0 0x345113#define INTEL_RAPL_PRIO_DEVID_0 0x3451
14#define INTEL_CFG_MBOX_DEVID_0 0x345914#define INTEL_CFG_MBOX_DEVID_0 0x3459
15 15
16#define INTEL_RAPL_PRIO_DEVID_1 0x3251
17#define INTEL_CFG_MBOX_DEVID_1 0x3259
18
16/*19/*
17 * Validate maximum commands in a single request.20 * Validate maximum commands in a single request.
18 * This is enough to handle command to every core in one ioctl, or all21 * This is enough to handle command to every core in one ioctl, or all
drivers/platform/x86/intel_speed_select_if/isst_if_mbox_pci.c+1−0
@@ -147,6 +147,7 @@ static long isst_if_mbox_proc_cmd(u8 *cmd_ptr, int *write_only, int resume) · 146 unmodified lines
147 147
148static const struct pci_device_id isst_if_mbox_ids[] = {148static const struct pci_device_id isst_if_mbox_ids[] = {
149 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_0)},149 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_0)},
150 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_CFG_MBOX_DEVID_1)},
150 { 0 },151 { 0 },
151};152};
152MODULE_DEVICE_TABLE(pci, isst_if_mbox_ids);153MODULE_DEVICE_TABLE(pci, isst_if_mbox_ids);
drivers/platform/x86/intel_speed_select_if/isst_if_mmio.c+1−0
@@ -72,6 +72,7 @@ static long isst_if_mmio_rd_wr(u8 *cmd_ptr, int *write_only, int resume) · 71 unmodified lines
72 72
73static const struct pci_device_id isst_if_ids[] = {73static const struct pci_device_id isst_if_ids[] = {
74 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_RAPL_PRIO_DEVID_0)},74 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_RAPL_PRIO_DEVID_0)},
75 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, INTEL_RAPL_PRIO_DEVID_1)},
75 { 0 },76 { 0 },
76};77};
77MODULE_DEVICE_TABLE(pci, isst_if_ids);78MODULE_DEVICE_TABLE(pci, isst_if_ids);
drivers/platform/x86/thinkpad_acpi.c+11−3
@@ -885,11 +885,19 @@ static ssize_t dispatch_proc_write(struct file *file, · 884 unmodified lines
885 885
886 if (!ibm || !ibm->write)886 if (!ibm || !ibm->write)
887 return -EINVAL;887 return -EINVAL;
888 if (count > PAGE_SIZE - 1)
889 return -EINVAL;
890
891 kernbuf = kmalloc(count + 1, GFP_KERNEL);
892 if (!kernbuf)
893 return -ENOMEM;
888 894
889 kernbuf = strndup_user(userbuf, PAGE_SIZE);895 if (copy_from_user(kernbuf, userbuf, count)) {
890 if (IS_ERR(kernbuf))896 kfree(kernbuf);
891 return PTR_ERR(kernbuf);897 return -EFAULT;
898 }
892 899
900 kernbuf[count] = 0;
893 ret = ibm->write(kernbuf);901 ret = ibm->write(kernbuf);
894 if (ret == 0)902 if (ret == 0)
895 ret = count;903 ret = count;
drivers/regulator/Makefile+1−1
@@ -31,7 +31,7 @@ obj-$(CONFIG_REGULATOR_BD70528) += bd70528-regulator.o · 30 unmodified lines
31obj-$(CONFIG_REGULATOR_BD71828) += bd71828-regulator.o31obj-$(CONFIG_REGULATOR_BD71828) += bd71828-regulator.o
32obj-$(CONFIG_REGULATOR_BD718XX) += bd718x7-regulator.o32obj-$(CONFIG_REGULATOR_BD718XX) += bd718x7-regulator.o
33obj-$(CONFIG_REGULATOR_BD9571MWV) += bd9571mwv-regulator.o33obj-$(CONFIG_REGULATOR_BD9571MWV) += bd9571mwv-regulator.o
34obj-$(CONFIG_REGULATOR_DA903X) += da903x.o34obj-$(CONFIG_REGULATOR_DA903X) += da903x-regulator.o
35obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o35obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o
36obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o36obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o
37obj-$(CONFIG_REGULATOR_DA9062) += da9062-regulator.o37obj-$(CONFIG_REGULATOR_DA9062) += da9062-regulator.o
drivers/regulator/da903x-regulator.crenamed from drivers/regulator/da903x.c+0−0

File renamed without changes.

drivers/regulator/qcom_smd-regulator.c+1−1
@@ -821,7 +821,7 @@ static const struct rpm_regulator_data rpm_pm8994_regulators[] = { · 820 unmodified lines
821static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {821static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
822 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },822 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
823 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },823 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
824 { "s2", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },824 { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
825 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },825 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
826 {}826 {}
827};827};
drivers/scsi/libiscsi.c+1−1
@@ -2629,7 +2629,7 @@ struct Scsi_Host *iscsi_host_alloc(struct scsi_host_template *sht, · 2628 unmodified lines
2629 "iscsi_q_%d", shost->host_no);2629 "iscsi_q_%d", shost->host_no);
2630 ihost->workq = alloc_workqueue("%s",2630 ihost->workq = alloc_workqueue("%s",
2631 WQ_SYSFS | __WQ_LEGACY | WQ_MEM_RECLAIM | WQ_UNBOUND,2631 WQ_SYSFS | __WQ_LEGACY | WQ_MEM_RECLAIM | WQ_UNBOUND,
2632 2, ihost->workq_name);2632 1, ihost->workq_name);
2633 if (!ihost->workq)2633 if (!ihost->workq)
2634 goto free_host;2634 goto free_host;
2635 }2635 }
drivers/scsi/megaraid/megaraid_sas_fusion.c+0−2
@@ -3739,10 +3739,8 @@ static irqreturn_t megasas_isr_fusion(int irq, void *devp) · 3738 unmodified lines
3739 if (instance->mask_interrupts)3739 if (instance->mask_interrupts)
3740 return IRQ_NONE;3740 return IRQ_NONE;
3741 3741
3742#if defined(ENABLE_IRQ_POLL)
3743 if (irq_context->irq_poll_scheduled)3742 if (irq_context->irq_poll_scheduled)
3744 return IRQ_HANDLED;3743 return IRQ_HANDLED;
3745#endif
3746 3744
3747 if (!instance->msix_vectors) {3745 if (!instance->msix_vectors) {
3748 mfiStatus = instance->instancet->clear_intr(instance);3746 mfiStatus = instance->instancet->clear_intr(instance);
drivers/scsi/mpt3sas/mpt3sas_ctl.c+7−5
@@ -3145,19 +3145,18 @@ BRM_status_show(struct device *cdev, struct device_attribute *attr, · 3144 unmodified lines
3145 if (!ioc->is_warpdrive) {3145 if (!ioc->is_warpdrive) {
3146 ioc_err(ioc, "%s: BRM attribute is only for warpdrive\n",3146 ioc_err(ioc, "%s: BRM attribute is only for warpdrive\n",
3147 __func__);3147 __func__);
3148 goto out;3148 return 0;
3149 }3149 }
3150 /* pci_access_mutex lock acquired by sysfs show path */3150 /* pci_access_mutex lock acquired by sysfs show path */
3151 mutex_lock(&ioc->pci_access_mutex);3151 mutex_lock(&ioc->pci_access_mutex);
3152 if (ioc->pci_error_recovery || ioc->remove_host) {3152 if (ioc->pci_error_recovery || ioc->remove_host)
3153 mutex_unlock(&ioc->pci_access_mutex);3153 goto out;
3154 return 0;
3155 }
3156 3154
3157 /* allocate upto GPIOVal 36 entries */3155 /* allocate upto GPIOVal 36 entries */
3158 sz = offsetof(Mpi2IOUnitPage3_t, GPIOVal) + (sizeof(u16) * 36);3156 sz = offsetof(Mpi2IOUnitPage3_t, GPIOVal) + (sizeof(u16) * 36);
3159 io_unit_pg3 = kzalloc(sz, GFP_KERNEL);3157 io_unit_pg3 = kzalloc(sz, GFP_KERNEL);
3160 if (!io_unit_pg3) {3158 if (!io_unit_pg3) {
3159 rc = -ENOMEM;
3161 ioc_err(ioc, "%s: failed allocating memory for iounit_pg3: (%d) bytes\n",3160 ioc_err(ioc, "%s: failed allocating memory for iounit_pg3: (%d) bytes\n",
3162 __func__, sz);3161 __func__, sz);
3163 goto out;3162 goto out;
@@ -3167,6 +3166,7 @@ BRM_status_show(struct device *cdev, struct device_attribute *attr, · 3 unmodified lines
3167 0) {3166 0) {
3168 ioc_err(ioc, "%s: failed reading iounit_pg3\n",3167 ioc_err(ioc, "%s: failed reading iounit_pg3\n",
3169 __func__);3168 __func__);
3169 rc = -EINVAL;
3170 goto out;3170 goto out;
3171 }3171 }
3172 3172
@@ -3174,12 +3174,14 @@ BRM_status_show(struct device *cdev, struct device_attribute *attr, · 1 unmodified line
3174 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {3174 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
3175 ioc_err(ioc, "%s: iounit_pg3 failed with ioc_status(0x%04x)\n",3175 ioc_err(ioc, "%s: iounit_pg3 failed with ioc_status(0x%04x)\n",
3176 __func__, ioc_status);3176 __func__, ioc_status);
3177 rc = -EINVAL;
3177 goto out;3178 goto out;
3178 }3179 }
3179 3180
3180 if (io_unit_pg3->GPIOCount < 25) {3181 if (io_unit_pg3->GPIOCount < 25) {
3181 ioc_err(ioc, "%s: iounit_pg3->GPIOCount less than 25 entries, detected (%d) entries\n",3182 ioc_err(ioc, "%s: iounit_pg3->GPIOCount less than 25 entries, detected (%d) entries\n",
3182 __func__, io_unit_pg3->GPIOCount);3183 __func__, io_unit_pg3->GPIOCount);
3184 rc = -EINVAL;
3183 goto out;3185 goto out;
3184 }3186 }
3185 3187
drivers/scsi/scsi_devinfo.c+1−0
@@ -239,6 +239,7 @@ static struct { · 238 unmodified lines
239 {"LSI", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},239 {"LSI", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},
240 {"ENGENIO", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},240 {"ENGENIO", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},
241 {"LENOVO", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},241 {"LENOVO", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},
242 {"FUJITSU", "Universal Xport", "*", BLIST_NO_ULD_ATTACH},
242 {"SanDisk", "Cruzer Blade", NULL, BLIST_TRY_VPD_PAGES |243 {"SanDisk", "Cruzer Blade", NULL, BLIST_TRY_VPD_PAGES |
243 BLIST_INQUIRY_36},244 BLIST_INQUIRY_36},
244 {"SMSC", "USB 2 HS-CF", NULL, BLIST_SPARSELUN | BLIST_INQUIRY_36},245 {"SMSC", "USB 2 HS-CF", NULL, BLIST_SPARSELUN | BLIST_INQUIRY_36},
drivers/scsi/scsi_dh.c+1−0
@@ -63,6 +63,7 @@ static const struct scsi_dh_blist scsi_dh_blist[] = { · 62 unmodified lines
63 {"LSI", "INF-01-00", "rdac", },63 {"LSI", "INF-01-00", "rdac", },
64 {"ENGENIO", "INF-01-00", "rdac", },64 {"ENGENIO", "INF-01-00", "rdac", },
65 {"LENOVO", "DE_Series", "rdac", },65 {"LENOVO", "DE_Series", "rdac", },
66 {"FUJITSU", "ETERNUS_AHB", "rdac", },
66 {NULL, NULL, NULL },67 {NULL, NULL, NULL },
67};68};
68 69
drivers/scsi/scsi_lib.c+11−5
@@ -547,6 +547,15 @@ static void scsi_mq_uninit_cmd(struct scsi_cmnd *cmd) · 546 unmodified lines
547 scsi_uninit_cmd(cmd);547 scsi_uninit_cmd(cmd);
548}548}
549 549
550static void scsi_run_queue_async(struct scsi_device *sdev)
551{
552 if (scsi_target(sdev)->single_lun ||
553 !list_empty(&sdev->host->starved_list))
554 kblockd_schedule_work(&sdev->requeue_work);
555 else
556 blk_mq_run_hw_queues(sdev->request_queue, true);
557}
558
550/* Returns false when no more bytes to process, true if there are more */559/* Returns false when no more bytes to process, true if there are more */
551static bool scsi_end_request(struct request *req, blk_status_t error,560static bool scsi_end_request(struct request *req, blk_status_t error,
552 unsigned int bytes)561 unsigned int bytes)
@@ -591,11 +600,7 @@ static bool scsi_end_request(struct request *req, blk_status_t error, · 38 unmodified lines
591 600
592 __blk_mq_end_request(req, error);601 __blk_mq_end_request(req, error);
593 602
594 if (scsi_target(sdev)->single_lun ||603 scsi_run_queue_async(sdev);
595 !list_empty(&sdev->host->starved_list))
596 kblockd_schedule_work(&sdev->requeue_work);
597 else
598 blk_mq_run_hw_queues(q, true);
599 604
600 percpu_ref_put(&q->q_usage_counter);605 percpu_ref_put(&q->q_usage_counter);
601 return false;606 return false;
@@ -1702,6 +1707,7 @@ out_put_budget: · 1100 unmodified lines
1702 */1707 */
1703 if (req->rq_flags & RQF_DONTPREP)1708 if (req->rq_flags & RQF_DONTPREP)
1704 scsi_mq_uninit_cmd(cmd);1709 scsi_mq_uninit_cmd(cmd);
1710 scsi_run_queue_async(sdev);
1705 break;1711 break;
1706 }1712 }
1707 return ret;1713 return ret;
drivers/scsi/scsi_transport_iscsi.c+1−1
@@ -4760,7 +4760,7 @@ static __init int iscsi_transport_init(void) · 4759 unmodified lines
4760 4760
4761 iscsi_eh_timer_workq = alloc_workqueue("%s",4761 iscsi_eh_timer_workq = alloc_workqueue("%s",
4762 WQ_SYSFS | __WQ_LEGACY | WQ_MEM_RECLAIM | WQ_UNBOUND,4762 WQ_SYSFS | __WQ_LEGACY | WQ_MEM_RECLAIM | WQ_UNBOUND,
4763 2, "iscsi_eh");4763 1, "iscsi_eh");
4764 if (!iscsi_eh_timer_workq) {4764 if (!iscsi_eh_timer_workq) {
4765 err = -ENOMEM;4765 err = -ENOMEM;
4766 goto release_nls;4766 goto release_nls;
drivers/scsi/scsi_transport_spi.c+1−1
@@ -339,7 +339,7 @@ store_spi_transport_##field(struct device *dev, \ · 338 unmodified lines
339 struct spi_transport_attrs *tp \339 struct spi_transport_attrs *tp \
340 = (struct spi_transport_attrs *)&starget->starget_data; \340 = (struct spi_transport_attrs *)&starget->starget_data; \
341 \341 \
342 if (i->f->set_##field) \342 if (!i->f->set_##field) \
343 return -EINVAL; \343 return -EINVAL; \
344 val = simple_strtoul(buf, NULL, 0); \344 val = simple_strtoul(buf, NULL, 0); \
345 if (val > tp->max_##field) \345 if (val > tp->max_##field) \
drivers/soc/amlogic/meson-gx-socinfo.c+5−3
@@ -66,10 +66,12 @@ static const struct meson_gx_package_id { · 65 unmodified lines
66 { "A113D", 0x25, 0x22, 0xff },66 { "A113D", 0x25, 0x22, 0xff },
67 { "S905D2", 0x28, 0x10, 0xf0 },67 { "S905D2", 0x28, 0x10, 0xf0 },
68 { "S905X2", 0x28, 0x40, 0xf0 },68 { "S905X2", 0x28, 0x40, 0xf0 },
69 { "S922X", 0x29, 0x40, 0xf0 },
70 { "A311D", 0x29, 0x10, 0xf0 },69 { "A311D", 0x29, 0x10, 0xf0 },
71 { "S905X3", 0x2b, 0x5, 0xf },70 { "S922X", 0x29, 0x40, 0xf0 },
72 { "S905D3", 0x2b, 0xb0, 0xf0 },71 { "S905D3", 0x2b, 0x4, 0xf5 },
72 { "S905X3", 0x2b, 0x5, 0xf5 },
73 { "S905X3", 0x2b, 0x10, 0x3f },
74 { "S905D3", 0x2b, 0x30, 0x3f },
73 { "A113L", 0x2c, 0x0, 0xf8 },75 { "A113L", 0x2c, 0x0, 0xf8 },
74};76};
75 77
drivers/soc/imx/soc-imx.c+3−0
@@ -33,6 +33,9 @@ static int __init imx_soc_device_init(void) · 32 unmodified lines
33 u32 val;33 u32 val;
34 int ret;34 int ret;
35 35
36 if (of_machine_is_compatible("fsl,ls1021a"))
37 return 0;
38
36 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);39 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
37 if (!soc_dev_attr)40 if (!soc_dev_attr)
38 return -ENOMEM;41 return -ENOMEM;
drivers/soundwire/intel.c+3−2
@@ -930,8 +930,9 @@ static int intel_create_dai(struct sdw_cdns *cdns, · 929 unmodified lines
930 930
931 /* TODO: Read supported rates/formats from hardware */931 /* TODO: Read supported rates/formats from hardware */
932 for (i = off; i < (off + num); i++) {932 for (i = off; i < (off + num); i++) {
933 dais[i].name = kasprintf(GFP_KERNEL, "SDW%d Pin%d",933 dais[i].name = devm_kasprintf(cdns->dev, GFP_KERNEL,
934 cdns->instance, i);934 "SDW%d Pin%d",
935 cdns->instance, i);
935 if (!dais[i].name)936 if (!dais[i].name)
936 return -ENOMEM;937 return -ENOMEM;
937 938
drivers/spi/spi-mt65xx.c+8−7
@@ -36,7 +36,6 @@ · 35 unmodified lines
36#define SPI_CFG0_SCK_LOW_OFFSET 836#define SPI_CFG0_SCK_LOW_OFFSET 8
37#define SPI_CFG0_CS_HOLD_OFFSET 1637#define SPI_CFG0_CS_HOLD_OFFSET 16
38#define SPI_CFG0_CS_SETUP_OFFSET 2438#define SPI_CFG0_CS_SETUP_OFFSET 24
39#define SPI_ADJUST_CFG0_SCK_LOW_OFFSET 16
40#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET 039#define SPI_ADJUST_CFG0_CS_HOLD_OFFSET 0
41#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 1640#define SPI_ADJUST_CFG0_CS_SETUP_OFFSET 16
42 41
@@ -48,6 +47,8 @@ · 5 unmodified lines
48#define SPI_CFG1_CS_IDLE_MASK 0xff47#define SPI_CFG1_CS_IDLE_MASK 0xff
49#define SPI_CFG1_PACKET_LOOP_MASK 0xff0048#define SPI_CFG1_PACKET_LOOP_MASK 0xff00
50#define SPI_CFG1_PACKET_LENGTH_MASK 0x3ff000049#define SPI_CFG1_PACKET_LENGTH_MASK 0x3ff0000
50#define SPI_CFG2_SCK_HIGH_OFFSET 0
51#define SPI_CFG2_SCK_LOW_OFFSET 16
51 52
52#define SPI_CMD_ACT BIT(0)53#define SPI_CMD_ACT BIT(0)
53#define SPI_CMD_RESUME BIT(1)54#define SPI_CMD_RESUME BIT(1)
@@ -283,7 +284,7 @@ static void mtk_spi_set_cs(struct spi_device *spi, bool enable) · 229 unmodified lines
283static void mtk_spi_prepare_transfer(struct spi_master *master,284static void mtk_spi_prepare_transfer(struct spi_master *master,
284 struct spi_transfer *xfer)285 struct spi_transfer *xfer)
285{286{
286 u32 spi_clk_hz, div, sck_time, cs_time, reg_val = 0;287 u32 spi_clk_hz, div, sck_time, cs_time, reg_val;
287 struct mtk_spi *mdata = spi_master_get_devdata(master);288 struct mtk_spi *mdata = spi_master_get_devdata(master);
288 289
289 spi_clk_hz = clk_get_rate(mdata->spi_clk);290 spi_clk_hz = clk_get_rate(mdata->spi_clk);
@@ -296,18 +297,18 @@ static void mtk_spi_prepare_transfer(struct spi_master *master, · 6 unmodified lines
296 cs_time = sck_time * 2;297 cs_time = sck_time * 2;
297 298
298 if (mdata->dev_comp->enhance_timing) {299 if (mdata->dev_comp->enhance_timing) {
300 reg_val = (((sck_time - 1) & 0xffff)
301 << SPI_CFG2_SCK_HIGH_OFFSET);
299 reg_val |= (((sck_time - 1) & 0xffff)302 reg_val |= (((sck_time - 1) & 0xffff)
300 << SPI_CFG0_SCK_HIGH_OFFSET);303 << SPI_CFG2_SCK_LOW_OFFSET);
301 reg_val |= (((sck_time - 1) & 0xffff)
302 << SPI_ADJUST_CFG0_SCK_LOW_OFFSET);
303 writel(reg_val, mdata->base + SPI_CFG2_REG);304 writel(reg_val, mdata->base + SPI_CFG2_REG);
304 reg_val |= (((cs_time - 1) & 0xffff)305 reg_val = (((cs_time - 1) & 0xffff)
305 << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);306 << SPI_ADJUST_CFG0_CS_HOLD_OFFSET);
306 reg_val |= (((cs_time - 1) & 0xffff)307 reg_val |= (((cs_time - 1) & 0xffff)
307 << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);308 << SPI_ADJUST_CFG0_CS_SETUP_OFFSET);
308 writel(reg_val, mdata->base + SPI_CFG0_REG);309 writel(reg_val, mdata->base + SPI_CFG0_REG);
309 } else {310 } else {
310 reg_val |= (((sck_time - 1) & 0xff)311 reg_val = (((sck_time - 1) & 0xff)
311 << SPI_CFG0_SCK_HIGH_OFFSET);312 << SPI_CFG0_SCK_HIGH_OFFSET);
312 reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);313 reg_val |= (((sck_time - 1) & 0xff) << SPI_CFG0_SCK_LOW_OFFSET);
313 reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);314 reg_val |= (((cs_time - 1) & 0xff) << SPI_CFG0_CS_HOLD_OFFSET);
drivers/spi/spi-sun6i.c+6−8
@@ -198,7 +198,7 @@ static int sun6i_spi_transfer_one(struct spi_master *master, · 197 unmodified lines
198 struct spi_transfer *tfr)198 struct spi_transfer *tfr)
199{199{
200 struct sun6i_spi *sspi = spi_master_get_devdata(master);200 struct sun6i_spi *sspi = spi_master_get_devdata(master);
201 unsigned int mclk_rate, div, timeout;201 unsigned int mclk_rate, div, div_cdr1, div_cdr2, timeout;
202 unsigned int start, end, tx_time;202 unsigned int start, end, tx_time;
203 unsigned int trig_level;203 unsigned int trig_level;
204 unsigned int tx_len = 0;204 unsigned int tx_len = 0;
@@ -287,14 +287,12 @@ static int sun6i_spi_transfer_one(struct spi_master *master, · 82 unmodified lines
287 * First try CDR2, and if we can't reach the expected287 * First try CDR2, and if we can't reach the expected
288 * frequency, fall back to CDR1.288 * frequency, fall back to CDR1.
289 */289 */
290 div = mclk_rate / (2 * tfr->speed_hz);290 div_cdr1 = DIV_ROUND_UP(mclk_rate, tfr->speed_hz);
291 if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {291 div_cdr2 = DIV_ROUND_UP(div_cdr1, 2);
292 if (div > 0)292 if (div_cdr2 <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) {
293 div--;293 reg = SUN6I_CLK_CTL_CDR2(div_cdr2 - 1) | SUN6I_CLK_CTL_DRS;
294
295 reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS;
296 } else {294 } else {
297 div = ilog2(mclk_rate) - ilog2(tfr->speed_hz);295 div = min(SUN6I_CLK_CTL_CDR1_MASK, order_base_2(div_cdr1));
298 reg = SUN6I_CLK_CTL_CDR1(div);296 reg = SUN6I_CLK_CTL_CDR1(div);
299 }297 }
300 298
drivers/staging/comedi/drivers/addi_apci_1032.c+14−6
@@ -106,14 +106,22 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 105 unmodified lines
106 unsigned int *data)106 unsigned int *data)
107{107{
108 struct apci1032_private *devpriv = dev->private;108 struct apci1032_private *devpriv = dev->private;
109 unsigned int shift, oldmask;109 unsigned int shift, oldmask, himask, lomask;
110 110
111 switch (data[0]) {111 switch (data[0]) {
112 case INSN_CONFIG_DIGITAL_TRIG:112 case INSN_CONFIG_DIGITAL_TRIG:
113 if (data[1] != 0)113 if (data[1] != 0)
114 return -EINVAL;114 return -EINVAL;
115 shift = data[3];115 shift = data[3];
116 oldmask = (1U << shift) - 1;116 if (shift < 32) {
117 oldmask = (1U << shift) - 1;
118 himask = data[4] << shift;
119 lomask = data[5] << shift;
120 } else {
121 oldmask = 0xffffffffu;
122 himask = 0;
123 lomask = 0;
124 }
117 switch (data[2]) {125 switch (data[2]) {
118 case COMEDI_DIGITAL_TRIG_DISABLE:126 case COMEDI_DIGITAL_TRIG_DISABLE:
119 devpriv->ctrl = 0;127 devpriv->ctrl = 0;
@@ -136,8 +144,8 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 16 unmodified lines
136 devpriv->mode2 &= oldmask;144 devpriv->mode2 &= oldmask;
137 }145 }
138 /* configure specified channels */146 /* configure specified channels */
139 devpriv->mode1 |= data[4] << shift;147 devpriv->mode1 |= himask;
140 devpriv->mode2 |= data[5] << shift;148 devpriv->mode2 |= lomask;
141 break;149 break;
142 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:150 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
143 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |151 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
@@ -154,8 +162,8 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 10 unmodified lines
154 devpriv->mode2 &= oldmask;162 devpriv->mode2 &= oldmask;
155 }163 }
156 /* configure specified channels */164 /* configure specified channels */
157 devpriv->mode1 |= data[4] << shift;165 devpriv->mode1 |= himask;
158 devpriv->mode2 |= data[5] << shift;166 devpriv->mode2 |= lomask;
159 break;167 break;
160 default:168 default:
161 return -EINVAL;169 return -EINVAL;
drivers/staging/comedi/drivers/addi_apci_1500.c+26−8
@@ -452,13 +452,14 @@ static int apci1500_di_cfg_trig(struct comedi_device *dev, · 451 unmodified lines
452 struct apci1500_private *devpriv = dev->private;452 struct apci1500_private *devpriv = dev->private;
453 unsigned int trig = data[1];453 unsigned int trig = data[1];
454 unsigned int shift = data[3];454 unsigned int shift = data[3];
455 unsigned int hi_mask = data[4] << shift;455 unsigned int hi_mask;
456 unsigned int lo_mask = data[5] << shift;456 unsigned int lo_mask;
457 unsigned int chan_mask = hi_mask | lo_mask;457 unsigned int chan_mask;
458 unsigned int old_mask = (1 << shift) - 1;458 unsigned int old_mask;
459 unsigned int pm = devpriv->pm[trig] & old_mask;459 unsigned int pm;
460 unsigned int pt = devpriv->pt[trig] & old_mask;460 unsigned int pt;
461 unsigned int pp = devpriv->pp[trig] & old_mask;461 unsigned int pp;
462 unsigned int invalid_chan;
462 463
463 if (trig > 1) {464 if (trig > 1) {
464 dev_dbg(dev->class_dev,465 dev_dbg(dev->class_dev,
@@ -466,11 +467,28 @@ static int apci1500_di_cfg_trig(struct comedi_device *dev, · 1 unmodified line
466 return -EINVAL;467 return -EINVAL;
467 }468 }
468 469
469 if (chan_mask > 0xffff) {470 if (shift <= 16) {
471 hi_mask = data[4] << shift;
472 lo_mask = data[5] << shift;
473 old_mask = (1U << shift) - 1;
474 invalid_chan = (data[4] | data[5]) >> (16 - shift);
475 } else {
476 hi_mask = 0;
477 lo_mask = 0;
478 old_mask = 0xffff;
479 invalid_chan = data[4] | data[5];
480 }
481 chan_mask = hi_mask | lo_mask;
482
483 if (invalid_chan) {
470 dev_dbg(dev->class_dev, "invalid digital trigger channel\n");484 dev_dbg(dev->class_dev, "invalid digital trigger channel\n");
471 return -EINVAL;485 return -EINVAL;
472 }486 }
473 487
488 pm = devpriv->pm[trig] & old_mask;
489 pt = devpriv->pt[trig] & old_mask;
490 pp = devpriv->pp[trig] & old_mask;
491
474 switch (data[2]) {492 switch (data[2]) {
475 case COMEDI_DIGITAL_TRIG_DISABLE:493 case COMEDI_DIGITAL_TRIG_DISABLE:
476 /* clear trigger configuration */494 /* clear trigger configuration */
drivers/staging/comedi/drivers/addi_apci_1564.c+14−6
@@ -331,14 +331,22 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 330 unmodified lines
331 unsigned int *data)331 unsigned int *data)
332{332{
333 struct apci1564_private *devpriv = dev->private;333 struct apci1564_private *devpriv = dev->private;
334 unsigned int shift, oldmask;334 unsigned int shift, oldmask, himask, lomask;
335 335
336 switch (data[0]) {336 switch (data[0]) {
337 case INSN_CONFIG_DIGITAL_TRIG:337 case INSN_CONFIG_DIGITAL_TRIG:
338 if (data[1] != 0)338 if (data[1] != 0)
339 return -EINVAL;339 return -EINVAL;
340 shift = data[3];340 shift = data[3];
341 oldmask = (1U << shift) - 1;341 if (shift < 32) {
342 oldmask = (1U << shift) - 1;
343 himask = data[4] << shift;
344 lomask = data[5] << shift;
345 } else {
346 oldmask = 0xffffffffu;
347 himask = 0;
348 lomask = 0;
349 }
342 switch (data[2]) {350 switch (data[2]) {
343 case COMEDI_DIGITAL_TRIG_DISABLE:351 case COMEDI_DIGITAL_TRIG_DISABLE:
344 devpriv->ctrl = 0;352 devpriv->ctrl = 0;
@@ -362,8 +370,8 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 17 unmodified lines
362 devpriv->mode2 &= oldmask;370 devpriv->mode2 &= oldmask;
363 }371 }
364 /* configure specified channels */372 /* configure specified channels */
365 devpriv->mode1 |= data[4] << shift;373 devpriv->mode1 |= himask;
366 devpriv->mode2 |= data[5] << shift;374 devpriv->mode2 |= lomask;
367 break;375 break;
368 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:376 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
369 if (devpriv->ctrl != (APCI1564_DI_IRQ_ENA |377 if (devpriv->ctrl != (APCI1564_DI_IRQ_ENA |
@@ -380,8 +388,8 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 10 unmodified lines
380 devpriv->mode2 &= oldmask;388 devpriv->mode2 &= oldmask;
381 }389 }
382 /* configure specified channels */390 /* configure specified channels */
383 devpriv->mode1 |= data[4] << shift;391 devpriv->mode1 |= himask;
384 devpriv->mode2 |= data[5] << shift;392 devpriv->mode2 |= lomask;
385 break;393 break;
386 default:394 default:
387 return -EINVAL;395 return -EINVAL;
drivers/staging/comedi/drivers/ni_6527.c+1−1
@@ -332,7 +332,7 @@ static int ni6527_intr_insn_config(struct comedi_device *dev, · 331 unmodified lines
332 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:332 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
333 /* check shift amount */333 /* check shift amount */
334 shift = data[3];334 shift = data[3];
335 if (shift >= s->n_chan) {335 if (shift >= 32) {
336 mask = 0;336 mask = 0;
337 rising = 0;337 rising = 0;
338 falling = 0;338 falling = 0;
drivers/staging/media/atomisp/Kconfig+1−1
@@ -22,7 +22,7 @@ config VIDEO_ATOMISP · 21 unmodified lines
22 module will be called atomisp22 module will be called atomisp
23 23
24config VIDEO_ATOMISP_ISP240124config VIDEO_ATOMISP_ISP2401
25 bool "VIDEO_ATOMISP_ISP2401"25 bool "Use Intel Atom ISP on Cherrytail/Anniedale (ISP2401)"
26 depends on VIDEO_ATOMISP26 depends on VIDEO_ATOMISP
27 help27 help
28 Enable support for Atom ISP2401-based boards.28 Enable support for Atom ISP2401-based boards.
drivers/staging/media/atomisp/Makefile+1−5
@@ -156,6 +156,7 @@ atomisp-objs += \ · 155 unmodified lines
156 pci/hive_isp_css_common/host/timed_ctrl.o \156 pci/hive_isp_css_common/host/timed_ctrl.o \
157 pci/hive_isp_css_common/host/vmem.o \157 pci/hive_isp_css_common/host/vmem.o \
158 pci/hive_isp_css_shared/host/tag.o \158 pci/hive_isp_css_shared/host/tag.o \
159 pci/system_local.o \
159 160
160obj-byt = \161obj-byt = \
161 pci/css_2400_system/hive/ia_css_isp_configs.o \162 pci/css_2400_system/hive/ia_css_isp_configs.o \
@@ -182,7 +183,6 @@ INCLUDES += \ · 20 unmodified lines
182 -I$(atomisp)/include/hmm/ \183 -I$(atomisp)/include/hmm/ \
183 -I$(atomisp)/include/mmu/ \184 -I$(atomisp)/include/mmu/ \
184 -I$(atomisp)/pci/ \185 -I$(atomisp)/pci/ \
185 -I$(atomisp)/pci/hrt/ \
186 -I$(atomisp)/pci/base/circbuf/interface/ \186 -I$(atomisp)/pci/base/circbuf/interface/ \
187 -I$(atomisp)/pci/base/refcount/interface/ \187 -I$(atomisp)/pci/base/refcount/interface/ \
188 -I$(atomisp)/pci/camera/pipe/interface/ \188 -I$(atomisp)/pci/camera/pipe/interface/ \
@@ -192,7 +192,6 @@ INCLUDES += \ · 3 unmodified lines
192 -I$(atomisp)/pci/hive_isp_css_include/ \192 -I$(atomisp)/pci/hive_isp_css_include/ \
193 -I$(atomisp)/pci/hive_isp_css_include/device_access/ \193 -I$(atomisp)/pci/hive_isp_css_include/device_access/ \
194 -I$(atomisp)/pci/hive_isp_css_include/host/ \194 -I$(atomisp)/pci/hive_isp_css_include/host/ \
195 -I$(atomisp)/pci/hive_isp_css_include/memory_access/ \
196 -I$(atomisp)/pci/hive_isp_css_shared/ \195 -I$(atomisp)/pci/hive_isp_css_shared/ \
197 -I$(atomisp)/pci/hive_isp_css_shared/host/ \196 -I$(atomisp)/pci/hive_isp_css_shared/host/ \
198 -I$(atomisp)/pci/isp/kernels/ \197 -I$(atomisp)/pci/isp/kernels/ \
@@ -311,9 +310,7 @@ INCLUDES += \ · 112 unmodified lines
311 -I$(atomisp)/pci/runtime/tagger/interface/310 -I$(atomisp)/pci/runtime/tagger/interface/
312 311
313INCLUDES_byt += \312INCLUDES_byt += \
314 -I$(atomisp)/pci/css_2400_system/ \
315 -I$(atomisp)/pci/css_2400_system/hive/ \313 -I$(atomisp)/pci/css_2400_system/hive/ \
316 -I$(atomisp)/pci/css_2400_system/hrt/ \
317 314
318INCLUDES_cht += \315INCLUDES_cht += \
319 -I$(atomisp)/pci/css_2401_system/ \316 -I$(atomisp)/pci/css_2401_system/ \
@@ -321,7 +318,6 @@ INCLUDES_cht += \ · 1 unmodified line
321 -I$(atomisp)/pci/css_2401_system/hive/ \318 -I$(atomisp)/pci/css_2401_system/hive/ \
322 -I$(atomisp)/pci/css_2401_system/hrt/ \319 -I$(atomisp)/pci/css_2401_system/hrt/ \
323 320
324# -I$(atomisp)/pci/css_2401_system/hrt/ \
325# -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \321# -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \
326 322
327DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__323DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__
drivers/staging/media/atomisp/i2c/atomisp-ov2680.c+3−3
@@ -495,11 +495,11 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) · 494 unmodified lines
495 ret = ov2680_read_reg(client, 1, OV2680_MIRROR_REG, &val);495 ret = ov2680_read_reg(client, 1, OV2680_MIRROR_REG, &val);
496 if (ret)496 if (ret)
497 return ret;497 return ret;
498 if (value) {498 if (value)
499 val |= OV2680_FLIP_MIRROR_BIT_ENABLE;499 val |= OV2680_FLIP_MIRROR_BIT_ENABLE;
500 } else {500 else
501 val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE;501 val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE;
502 }502
503 ret = ov2680_write_reg(client, 1,503 ret = ov2680_write_reg(client, 1,
504 OV2680_MIRROR_REG, val);504 OV2680_MIRROR_REG, val);
505 if (ret)505 if (ret)
drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c+4−2
@@ -1899,7 +1899,7 @@ static int ov5693_probe(struct i2c_client *client) · 1898 unmodified lines
1899{1899{
1900 struct ov5693_device *dev;1900 struct ov5693_device *dev;
1901 int i2c;1901 int i2c;
1902 int ret = 0;1902 int ret;
1903 void *pdata;1903 void *pdata;
1904 unsigned int i;1904 unsigned int i;
1905 1905
@@ -1929,8 +1929,10 @@ static int ov5693_probe(struct i2c_client *client) · 23 unmodified lines
1929 pdata = gmin_camera_platform_data(&dev->sd,1929 pdata = gmin_camera_platform_data(&dev->sd,
1930 ATOMISP_INPUT_FORMAT_RAW_10,1930 ATOMISP_INPUT_FORMAT_RAW_10,
1931 atomisp_bayer_order_bggr);1931 atomisp_bayer_order_bggr);
1932 if (!pdata)1932 if (!pdata) {
1933 ret = -EINVAL;
1933 goto out_free;1934 goto out_free;
1935 }
1934 1936
1935 ret = ov5693_s_config(&dev->sd, client->irq, pdata);1937 ret = ov5693_s_config(&dev->sd, client->irq, pdata);
1936 if (ret)1938 if (ret)
drivers/staging/media/atomisp/include/linux/atomisp_platform.h+1−0
@@ -250,6 +250,7 @@ const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void); · 249 unmodified lines
250#define IS_MFLD __IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID)250#define IS_MFLD __IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID)
251#define IS_BYT __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT)251#define IS_BYT __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT)
252#define IS_CHT __IS_SOC(INTEL_FAM6_ATOM_AIRMONT)252#define IS_CHT __IS_SOC(INTEL_FAM6_ATOM_AIRMONT)
253#define IS_MRFD __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT_MID)
253#define IS_MOFD __IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID)254#define IS_MOFD __IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID)
254 255
255/* Both CHT and MOFD come with ISP2401 */256/* Both CHT and MOFD come with ISP2401 */
drivers/staging/media/atomisp/pci/atomisp-regs.h+0−3
@@ -20,9 +20,6 @@ · 19 unmodified lines
20#define ATOMISP_REGS_H20#define ATOMISP_REGS_H
21 21
22/* common register definitions */22/* common register definitions */
23#define PUNIT_PORT 0x04
24#define CCK_PORT 0x14
25
26#define PCICMDSTS 0x0123#define PCICMDSTS 0x01
27#define INTR 0x0f24#define INTR 0x0f
28#define MSI_CAPID 0x2425#define MSI_CAPID 0x24
drivers/staging/media/atomisp/pci/atomisp_acc.c+2−2
@@ -355,11 +355,11 @@ int atomisp_acc_map(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) · 354 unmodified lines
355 355
356 pgnr = DIV_ROUND_UP(map->length, PAGE_SIZE);356 pgnr = DIV_ROUND_UP(map->length, PAGE_SIZE);
357 if (pgnr < ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {357 if (pgnr < ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {
358 dev_err(atomisp_dev,358 dev_err(asd->isp->dev,
359 "user space memory size is less than the expected size..\n");359 "user space memory size is less than the expected size..\n");
360 return -ENOMEM;360 return -ENOMEM;
361 } else if (pgnr > ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {361 } else if (pgnr > ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {
362 dev_err(atomisp_dev,362 dev_err(asd->isp->dev,
363 "user space memory size is large than the expected size..\n");363 "user space memory size is large than the expected size..\n");
364 return -ENOMEM;364 return -ENOMEM;
365 }365 }
drivers/staging/media/atomisp/pci/atomisp_cmd.c+32−27
@@ -21,6 +21,7 @@ · 20 unmodified lines
21#include <linux/firmware.h>21#include <linux/firmware.h>
22#include <linux/pci.h>22#include <linux/pci.h>
23#include <linux/interrupt.h>23#include <linux/interrupt.h>
24#include <linux/io.h>
24#include <linux/kernel.h>25#include <linux/kernel.h>
25#include <linux/kfifo.h>26#include <linux/kfifo.h>
26#include <linux/pm_runtime.h>27#include <linux/pm_runtime.h>
@@ -109,7 +110,7 @@ struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev) · 82 unmodified lines
109 110
110static unsigned short atomisp_get_sensor_fps(struct atomisp_sub_device *asd)111static unsigned short atomisp_get_sensor_fps(struct atomisp_sub_device *asd)
111{112{
112 struct v4l2_subdev_frame_interval fi;113 struct v4l2_subdev_frame_interval fi = { 0 };
113 struct atomisp_device *isp = asd->isp;114 struct atomisp_device *isp = asd->isp;
114 115
115 unsigned short fps = 0;116 unsigned short fps = 0;
@@ -206,6 +207,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, · 90 unmodified lines
206 enum atomisp_dfs_mode mode,207 enum atomisp_dfs_mode mode,
207 bool force)208 bool force)
208{209{
210 struct pci_dev *pdev = to_pci_dev(isp->dev);
209 /* FIXME! Only use subdev[0] status yet */211 /* FIXME! Only use subdev[0] status yet */
210 struct atomisp_sub_device *asd = &isp->asd[0];212 struct atomisp_sub_device *asd = &isp->asd[0];
211 const struct atomisp_dfs_config *dfs;213 const struct atomisp_dfs_config *dfs;
@@ -219,7 +221,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, · 7 unmodified lines
219 return -EINVAL;221 return -EINVAL;
220 }222 }
221 223
222 if ((isp->pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==224 if ((pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
223 ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd))225 ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd))
224 isp->dfs = &dfs_config_cht_soc;226 isp->dfs = &dfs_config_cht_soc;
225 227
@@ -357,39 +359,41 @@ static void clear_isp_irq(enum hrt_isp_css_irq irq) · 131 unmodified lines
357 irq_clear_all(IRQ0_ID);359 irq_clear_all(IRQ0_ID);
358}360}
359 361
360void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev)362void atomisp_msi_irq_init(struct atomisp_device *isp)
361{363{
364 struct pci_dev *pdev = to_pci_dev(isp->dev);
362 u32 msg32;365 u32 msg32;
363 u16 msg16;366 u16 msg16;
364 367
365 pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32);368 pci_read_config_dword(pdev, PCI_MSI_CAPID, &msg32);
366 msg32 |= 1 << MSI_ENABLE_BIT;369 msg32 |= 1 << MSI_ENABLE_BIT;
367 pci_write_config_dword(dev, PCI_MSI_CAPID, msg32);370 pci_write_config_dword(pdev, PCI_MSI_CAPID, msg32);
368 371
369 msg32 = (1 << INTR_IER) | (1 << INTR_IIR);372 msg32 = (1 << INTR_IER) | (1 << INTR_IIR);
370 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32);373 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg32);
371 374
372 pci_read_config_word(dev, PCI_COMMAND, &msg16);375 pci_read_config_word(pdev, PCI_COMMAND, &msg16);
373 msg16 |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |376 msg16 |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
374 PCI_COMMAND_INTX_DISABLE);377 PCI_COMMAND_INTX_DISABLE);
375 pci_write_config_word(dev, PCI_COMMAND, msg16);378 pci_write_config_word(pdev, PCI_COMMAND, msg16);
376}379}
377 380
378void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev)381void atomisp_msi_irq_uninit(struct atomisp_device *isp)
379{382{
383 struct pci_dev *pdev = to_pci_dev(isp->dev);
380 u32 msg32;384 u32 msg32;
381 u16 msg16;385 u16 msg16;
382 386
383 pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32);387 pci_read_config_dword(pdev, PCI_MSI_CAPID, &msg32);
384 msg32 &= ~(1 << MSI_ENABLE_BIT);388 msg32 &= ~(1 << MSI_ENABLE_BIT);
385 pci_write_config_dword(dev, PCI_MSI_CAPID, msg32);389 pci_write_config_dword(pdev, PCI_MSI_CAPID, msg32);
386 390
387 msg32 = 0x0;391 msg32 = 0x0;
388 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32);392 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg32);
389 393
390 pci_read_config_word(dev, PCI_COMMAND, &msg16);394 pci_read_config_word(pdev, PCI_COMMAND, &msg16);
391 msg16 &= ~(PCI_COMMAND_MASTER);395 msg16 &= ~(PCI_COMMAND_MASTER);
392 pci_write_config_word(dev, PCI_COMMAND, msg16);396 pci_write_config_word(pdev, PCI_COMMAND, msg16);
393}397}
394 398
395static void atomisp_sof_event(struct atomisp_sub_device *asd)399static void atomisp_sof_event(struct atomisp_sub_device *asd)
@@ -480,11 +484,12 @@ static void print_csi_rx_errors(enum mipi_port_id port, · 84 unmodified lines
480/* Clear irq reg */484/* Clear irq reg */
481static void clear_irq_reg(struct atomisp_device *isp)485static void clear_irq_reg(struct atomisp_device *isp)
482{486{
487 struct pci_dev *pdev = to_pci_dev(isp->dev);
483 u32 msg_ret;488 u32 msg_ret;
484 489
485 pci_read_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, &msg_ret);490 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &msg_ret);
486 msg_ret |= 1 << INTR_IIR;491 msg_ret |= 1 << INTR_IIR;
487 pci_write_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, msg_ret);492 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg_ret);
488}493}
489 494
490static struct atomisp_sub_device *495static struct atomisp_sub_device *
@@ -665,11 +670,10 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) · 174 unmodified lines
665void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr,670void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr,
666 unsigned int size)671 unsigned int size)
667{672{
668 u32 __iomem *io_virt_addr;
669 unsigned int data = 0;673 unsigned int data = 0;
670 unsigned int size32 = DIV_ROUND_UP(size, sizeof(u32));674 unsigned int size32 = DIV_ROUND_UP(size, sizeof(u32));
671 675
672 dev_dbg(isp->dev, "atomisp_io_base:%p\n", atomisp_io_base);676 dev_dbg(isp->dev, "atomisp mmio base: %p\n", isp->base);
673 dev_dbg(isp->dev, "%s, addr:0x%x, size: %d, size32: %d\n", __func__,677 dev_dbg(isp->dev, "%s, addr:0x%x, size: %d, size32: %d\n", __func__,
674 addr, size, size32);678 addr, size, size32);
675 if (size32 * 4 + addr > 0x4000) {679 if (size32 * 4 + addr > 0x4000) {
@@ -678,13 +682,12 @@ void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, · 2 unmodified lines
678 return;682 return;
679 }683 }
680 addr += SP_DMEM_BASE;684 addr += SP_DMEM_BASE;
681 io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);685 addr &= 0x003FFFFF;
682 do {686 do {
683 data = *io_virt_addr;687 data = readl(isp->base + addr);
684 dev_dbg(isp->dev, "%s, \t [0x%x]:0x%x\n", __func__, addr, data);688 dev_dbg(isp->dev, "%s, \t [0x%x]:0x%x\n", __func__, addr, data);
685 io_virt_addr += sizeof(u32);689 addr += sizeof(u32);
686 size32 -= 1;690 } while (--size32);
687 } while (size32 > 0);
688}691}
689 692
690static struct videobuf_buffer *atomisp_css_frame_to_vbuf(693static struct videobuf_buffer *atomisp_css_frame_to_vbuf(
@@ -1289,6 +1292,7 @@ void atomisp_delayed_init_work(struct work_struct *work) · 598 unmodified lines
1289 1292
1290static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout)1293static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout)
1291{1294{
1295 struct pci_dev *pdev = to_pci_dev(isp->dev);
1292 enum ia_css_pipe_id css_pipe_id;1296 enum ia_css_pipe_id css_pipe_id;
1293 bool stream_restart[MAX_STREAM_NUM] = {0};1297 bool stream_restart[MAX_STREAM_NUM] = {0};
1294 bool depth_mode = false;1298 bool depth_mode = false;
@@ -1372,8 +1376,8 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) · 77 unmodified lines
1372 clear_isp_irq(hrt_isp_css_irq_sp);1376 clear_isp_irq(hrt_isp_css_irq_sp);
1373 1377
1374 /* Set the SRSE to 3 before resetting */1378 /* Set the SRSE to 3 before resetting */
1375 pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control |1379 pci_write_config_dword(pdev, PCI_I_CONTROL,
1376 MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);1380 isp->saved_regs.i_control | MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
1377 1381
1378 /* reset ISP and restore its state */1382 /* reset ISP and restore its state */
1379 isp->isp_timeout = true;1383 isp->isp_timeout = true;
@@ -6158,6 +6162,7 @@ out: · 4778 unmodified lines
6158/*Turn off ISP dphy */6162/*Turn off ISP dphy */
6159int atomisp_ospm_dphy_down(struct atomisp_device *isp)6163int atomisp_ospm_dphy_down(struct atomisp_device *isp)
6160{6164{
6165 struct pci_dev *pdev = to_pci_dev(isp->dev);
6161 unsigned long flags;6166 unsigned long flags;
6162 u32 reg;6167 u32 reg;
6163 6168
@@ -6179,9 +6184,9 @@ done: · 15 unmodified lines
6179 * MRFLD HW design need all CSI ports are disabled before6184 * MRFLD HW design need all CSI ports are disabled before
6180 * powering down the IUNIT.6185 * powering down the IUNIT.
6181 */6186 */
6182 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &reg);6187 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &reg);
6183 reg |= MRFLD_ALL_CSI_PORTS_OFF_MASK;6188 reg |= MRFLD_ALL_CSI_PORTS_OFF_MASK;
6184 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, reg);6189 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, reg);
6185 return 0;6190 return 0;
6186}6191}
6187 6192
drivers/staging/media/atomisp/pci/atomisp_cmd.h+2−2
@@ -68,8 +68,8 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe); · 67 unmodified lines
68/*68/*
69 * Interrupt functions69 * Interrupt functions
70 */70 */
71void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev);71void atomisp_msi_irq_init(struct atomisp_device *isp);
72void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev);72void atomisp_msi_irq_uninit(struct atomisp_device *isp);
73void atomisp_wdt_work(struct work_struct *work);73void atomisp_wdt_work(struct work_struct *work);
74void atomisp_wdt(struct timer_list *t);74void atomisp_wdt(struct timer_list *t);
75void atomisp_setup_flash(struct atomisp_sub_device *asd);75void atomisp_setup_flash(struct atomisp_sub_device *asd);
drivers/staging/media/atomisp/pci/atomisp_compat.h+0−2
@@ -29,8 +29,6 @@ struct atomisp_sub_device; · 28 unmodified lines
29struct video_device;29struct video_device;
30enum atomisp_input_stream_id;30enum atomisp_input_stream_id;
31 31
32extern void __iomem *atomisp_io_base;
33
34struct atomisp_metadata_buf {32struct atomisp_metadata_buf {
35 struct ia_css_metadata *metadata;33 struct ia_css_metadata *metadata;
36 void *md_vptr;34 void *md_vptr;
drivers/staging/media/atomisp/pci/atomisp_compat_css20.c+34−36
@@ -33,13 +33,12 @@ · 32 unmodified lines
33#include "atomisp_ioctl.h"33#include "atomisp_ioctl.h"
34#include "atomisp_acc.h"34#include "atomisp_acc.h"
35 35
36#include <asm/intel-mid.h>
37
38#include "ia_css_debug.h"36#include "ia_css_debug.h"
39#include "ia_css_isp_param.h"37#include "ia_css_isp_param.h"
40#include "sh_css_hrt.h"38#include "sh_css_hrt.h"
41#include "ia_css_isys.h"39#include "ia_css_isys.h"
42 40
41#include <linux/io.h>
43#include <linux/pm_runtime.h>42#include <linux/pm_runtime.h>
44 43
45/* Assume max number of ACC stages */44/* Assume max number of ACC stages */
@@ -69,92 +68,94 @@ struct bayer_ds_factor { · 23 unmodified lines
69 68
70static void atomisp_css2_hw_store_8(hrt_address addr, uint8_t data)69static void atomisp_css2_hw_store_8(hrt_address addr, uint8_t data)
71{70{
72 s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);71 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
73 unsigned long flags;72 unsigned long flags;
74 73
75 spin_lock_irqsave(&mmio_lock, flags);74 spin_lock_irqsave(&mmio_lock, flags);
76 *io_virt_addr = data;75 writeb(data, isp->base + (addr & 0x003FFFFF));
77 spin_unlock_irqrestore(&mmio_lock, flags);76 spin_unlock_irqrestore(&mmio_lock, flags);
78}77}
79 78
80static void atomisp_css2_hw_store_16(hrt_address addr, uint16_t data)79static void atomisp_css2_hw_store_16(hrt_address addr, uint16_t data)
81{80{
82 s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);81 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
83 unsigned long flags;82 unsigned long flags;
84 83
85 spin_lock_irqsave(&mmio_lock, flags);84 spin_lock_irqsave(&mmio_lock, flags);
86 *io_virt_addr = data;85 writew(data, isp->base + (addr & 0x003FFFFF));
87 spin_unlock_irqrestore(&mmio_lock, flags);86 spin_unlock_irqrestore(&mmio_lock, flags);
88}87}
89 88
90void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data)89void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data)
91{90{
92 s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);91 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
93 unsigned long flags;92 unsigned long flags;
94 93
95 spin_lock_irqsave(&mmio_lock, flags);94 spin_lock_irqsave(&mmio_lock, flags);
96 *io_virt_addr = data;95 writel(data, isp->base + (addr & 0x003FFFFF));
97 spin_unlock_irqrestore(&mmio_lock, flags);96 spin_unlock_irqrestore(&mmio_lock, flags);
98}97}
99 98
100static uint8_t atomisp_css2_hw_load_8(hrt_address addr)99static uint8_t atomisp_css2_hw_load_8(hrt_address addr)
101{100{
102 s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);101 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
103 unsigned long flags;102 unsigned long flags;
104 u8 ret;103 u8 ret;
105 104
106 spin_lock_irqsave(&mmio_lock, flags);105 spin_lock_irqsave(&mmio_lock, flags);
107 ret = *io_virt_addr;106 ret = readb(isp->base + (addr & 0x003FFFFF));
108 spin_unlock_irqrestore(&mmio_lock, flags);107 spin_unlock_irqrestore(&mmio_lock, flags);
109 return ret;108 return ret;
110}109}
111 110
112static uint16_t atomisp_css2_hw_load_16(hrt_address addr)111static uint16_t atomisp_css2_hw_load_16(hrt_address addr)
113{112{
114 s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);113 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
115 unsigned long flags;114 unsigned long flags;
116 u16 ret;115 u16 ret;
117 116
118 spin_lock_irqsave(&mmio_lock, flags);117 spin_lock_irqsave(&mmio_lock, flags);
119 ret = *io_virt_addr;118 ret = readw(isp->base + (addr & 0x003FFFFF));
120 spin_unlock_irqrestore(&mmio_lock, flags);119 spin_unlock_irqrestore(&mmio_lock, flags);
121 return ret;120 return ret;
122}121}
123 122
124static uint32_t atomisp_css2_hw_load_32(hrt_address addr)123static uint32_t atomisp_css2_hw_load_32(hrt_address addr)
125{124{
126 s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);125 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
127 unsigned long flags;126 unsigned long flags;
128 u32 ret;127 u32 ret;
129 128
130 spin_lock_irqsave(&mmio_lock, flags);129 spin_lock_irqsave(&mmio_lock, flags);
131 ret = *io_virt_addr;130 ret = readl(isp->base + (addr & 0x003FFFFF));
132 spin_unlock_irqrestore(&mmio_lock, flags);131 spin_unlock_irqrestore(&mmio_lock, flags);
133 return ret;132 return ret;
134}133}
135 134
136static void atomisp_css2_hw_store(hrt_address addr,135static void atomisp_css2_hw_store(hrt_address addr, const void *from, uint32_t n)
137 const void *from, uint32_t n)
138{136{
139 s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);137 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
140 unsigned long flags;138 unsigned long flags;
141 unsigned int i;139 unsigned int i;
142 140
141 addr &= 0x003FFFFF;
143 spin_lock_irqsave(&mmio_lock, flags);142 spin_lock_irqsave(&mmio_lock, flags);
144 for (i = 0; i < n; i++, io_virt_addr++, from++)143 for (i = 0; i < n; i++, from++)
145 *io_virt_addr = *(s8 *)from;144 writeb(*(s8 *)from, isp->base + addr + i);
145
146 spin_unlock_irqrestore(&mmio_lock, flags);146 spin_unlock_irqrestore(&mmio_lock, flags);
147}147}
148 148
149static void atomisp_css2_hw_load(hrt_address addr, void *to, uint32_t n)149static void atomisp_css2_hw_load(hrt_address addr, void *to, uint32_t n)
150{150{
151 s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);151 struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
152 unsigned long flags;152 unsigned long flags;
153 unsigned int i;153 unsigned int i;
154 154
155 addr &= 0x003FFFFF;
155 spin_lock_irqsave(&mmio_lock, flags);156 spin_lock_irqsave(&mmio_lock, flags);
156 for (i = 0; i < n; i++, to++, io_virt_addr++)157 for (i = 0; i < n; i++, to++)
157 *(s8 *)to = *io_virt_addr;158 *(s8 *)to = readb(isp->base + addr + i);
158 spin_unlock_irqrestore(&mmio_lock, flags);159 spin_unlock_irqrestore(&mmio_lock, flags);
159}160}
160 161
@@ -181,10 +182,10 @@ void atomisp_load_uint32(hrt_address addr, uint32_t *data) · 20 unmodified lines
181 *data = atomisp_css2_hw_load_32(addr);182 *data = atomisp_css2_hw_load_32(addr);
182}183}
183 184
184static int hmm_get_mmu_base_addr(unsigned int *mmu_base_addr)185static int hmm_get_mmu_base_addr(struct device *dev, unsigned int *mmu_base_addr)
185{186{
186 if (!sh_mmu_mrfld.get_pd_base) {187 if (!sh_mmu_mrfld.get_pd_base) {
187 dev_err(atomisp_dev, "get mmu base address failed.\n");188 dev_err(dev, "get mmu base address failed.\n");
188 return -EINVAL;189 return -EINVAL;
189 }190 }
190 191
@@ -839,7 +840,7 @@ int atomisp_css_init(struct atomisp_device *isp) · 648 unmodified lines
839 int ret;840 int ret;
840 int err;841 int err;
841 842
842 ret = hmm_get_mmu_base_addr(&mmu_base_addr);843 ret = hmm_get_mmu_base_addr(isp->dev, &mmu_base_addr);
843 if (ret)844 if (ret)
844 return ret;845 return ret;
845 846
@@ -941,7 +942,7 @@ int atomisp_css_resume(struct atomisp_device *isp) · 95 unmodified lines
941 unsigned int mmu_base_addr;942 unsigned int mmu_base_addr;
942 int ret;943 int ret;
943 944
944 ret = hmm_get_mmu_base_addr(&mmu_base_addr);945 ret = hmm_get_mmu_base_addr(isp->dev, &mmu_base_addr);
945 if (ret) {946 if (ret) {
946 dev_err(isp->dev, "get base address error.\n");947 dev_err(isp->dev, "get base address error.\n");
947 return -EINVAL;948 return -EINVAL;
@@ -1966,8 +1967,7 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, · 1018 unmodified lines
1966 true,1967 true,
1967 0x13000,1968 0x13000,
1968 &size_mem_words) != 0) {1969 &size_mem_words) != 0) {
1969 if (intel_mid_identify_cpu() ==1970 if (IS_MRFD)
1970 INTEL_MID_CPU_CHIP_TANGIER)
1971 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_2;1971 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_2;
1972 else1972 else
1973 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1;1973 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1;
@@ -2414,13 +2414,13 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, · 440 unmodified lines
2414 struct ia_css_resolution *effective_res =2414 struct ia_css_resolution *effective_res =
2415 &stream_config->input_config.effective_res;2415 &stream_config->input_config.effective_res;
2416 2416
2417 const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} };2417 static const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} };
2418 /*2418 /*
2419 * BZ201033: YUV decimation factor of 4 causes couple of rightmost2419 * BZ201033: YUV decimation factor of 4 causes couple of rightmost
2420 * columns to be shaded. Remove this factor to work around the CSS bug.2420 * columns to be shaded. Remove this factor to work around the CSS bug.
2421 * const unsigned int yuv_dec_fct[] = {4, 2};2421 * const unsigned int yuv_dec_fct[] = {4, 2};
2422 */2422 */
2423 const unsigned int yuv_dec_fct[] = { 2 };2423 static const unsigned int yuv_dec_fct[] = { 2 };
2424 unsigned int i;2424 unsigned int i;
2425 2425
2426 if (width == 0 && height == 0)2426 if (width == 0 && height == 0)
@@ -2540,7 +2540,7 @@ static void __configure_video_pp_input(struct atomisp_sub_device *asd, · 113 unmodified lines
2540 struct ia_css_resolution *effective_res =2540 struct ia_css_resolution *effective_res =
2541 &stream_config->input_config.effective_res;2541 &stream_config->input_config.effective_res;
2542 2542
2543 const struct bayer_ds_factor bds_factors[] = {2543 static const struct bayer_ds_factor bds_factors[] = {
2544 {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2}2544 {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2}
2545 };2545 };
2546 unsigned int i;2546 unsigned int i;
@@ -4337,7 +4337,7 @@ static const char * const fw_acc_type_name[] = { · 1790 unmodified lines
4337 [IA_CSS_ACC_STANDALONE] = "Stand-alone acceleration",4337 [IA_CSS_ACC_STANDALONE] = "Stand-alone acceleration",
4338};4338};
4339 4339
4340int atomisp_css_dump_blob_infor(void)4340int atomisp_css_dump_blob_infor(struct atomisp_device *isp)
4341{4341{
4342 struct ia_css_blob_descr *bd = sh_css_blob_info;4342 struct ia_css_blob_descr *bd = sh_css_blob_info;
4343 unsigned int i, nm = sh_css_num_binaries;4343 unsigned int i, nm = sh_css_num_binaries;
@@ -4354,8 +4354,7 @@ int atomisp_css_dump_blob_infor(void) · 10 unmodified lines
4354 for (i = 0; i < sh_css_num_binaries - NUM_OF_SPS; i++) {4354 for (i = 0; i < sh_css_num_binaries - NUM_OF_SPS; i++) {
4355 switch (bd[i].header.type) {4355 switch (bd[i].header.type) {
4356 case ia_css_isp_firmware:4356 case ia_css_isp_firmware:
4357 dev_dbg(atomisp_dev,4357 dev_dbg(isp->dev, "Num%2d type %s (%s), binary id is %2d, name is %s\n",
4358 "Num%2d type %s (%s), binary id is %2d, name is %s\n",
4359 i + NUM_OF_SPS,4358 i + NUM_OF_SPS,
4360 fw_type_name[bd[i].header.type],4359 fw_type_name[bd[i].header.type],
4361 fw_acc_type_name[bd[i].header.info.isp.type],4360 fw_acc_type_name[bd[i].header.info.isp.type],
@@ -4363,8 +4362,7 @@ int atomisp_css_dump_blob_infor(void) · 1 unmodified line
4363 bd[i].name);4362 bd[i].name);
4364 break;4363 break;
4365 default:4364 default:
4366 dev_dbg(atomisp_dev,4365 dev_dbg(isp->dev, "Num%2d type %s, name is %s\n",
4367 "Num%2d type %s, name is %s\n",
4368 i + NUM_OF_SPS, fw_type_name[bd[i].header.type],4366 i + NUM_OF_SPS, fw_type_name[bd[i].header.type],
4369 bd[i].name);4367 bd[i].name);
4370 }4368 }
drivers/staging/media/atomisp/pci/atomisp_compat_css20.h+1−1
@@ -153,7 +153,7 @@ int atomisp_css_debug_dump_isp_binary(void); · 152 unmodified lines
153 153
154int atomisp_css_dump_sp_raw_copy_linecount(bool reduced);154int atomisp_css_dump_sp_raw_copy_linecount(bool reduced);
155 155
156int atomisp_css_dump_blob_infor(void);156int atomisp_css_dump_blob_infor(struct atomisp_device *isp);
157 157
158void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd,158void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd,
159 uint32_t isp_config_id);159 uint32_t isp_config_id);
drivers/staging/media/atomisp/pci/atomisp_drvfs.c+7−7
@@ -62,9 +62,9 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 61 unmodified lines
62 62
63 if (opt & OPTION_VALID) {63 if (opt & OPTION_VALID) {
64 if (opt & OPTION_BIN_LIST) {64 if (opt & OPTION_BIN_LIST) {
65 ret = atomisp_css_dump_blob_infor();65 ret = atomisp_css_dump_blob_infor(isp);
66 if (ret) {66 if (ret) {
67 dev_err(atomisp_dev, "%s dump blob infor err[ret:%d]\n",67 dev_err(isp->dev, "%s dump blob infor err[ret:%d]\n",
68 __func__, ret);68 __func__, ret);
69 goto opt_err;69 goto opt_err;
70 }70 }
@@ -76,7 +76,7 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 5 unmodified lines
76 atomisp_css_debug_dump_isp_binary();76 atomisp_css_debug_dump_isp_binary();
77 } else {77 } else {
78 ret = -EPERM;78 ret = -EPERM;
79 dev_err(atomisp_dev, "%s dump running bin err[ret:%d]\n",79 dev_err(isp->dev, "%s dump running bin err[ret:%d]\n",
80 __func__, ret);80 __func__, ret);
81 goto opt_err;81 goto opt_err;
82 }82 }
@@ -86,8 +86,7 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 3 unmodified lines
86 hmm_show_mem_stat(__func__, __LINE__);86 hmm_show_mem_stat(__func__, __LINE__);
87 } else {87 } else {
88 ret = -EINVAL;88 ret = -EINVAL;
89 dev_err(atomisp_dev, "%s dump nothing[ret=%d]\n", __func__,89 dev_err(isp->dev, "%s dump nothing[ret=%d]\n", __func__, ret);
90 ret);
91 }90 }
92 91
93opt_err:92opt_err:
@@ -185,8 +184,9 @@ static void iunit_drvfs_remove_files(struct device_driver *drv) · 91 unmodified lines
185 driver_remove_file(drv, &iunit_drvfs_attrs[i]);184 driver_remove_file(drv, &iunit_drvfs_attrs[i]);
186}185}
187 186
188int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp)187int atomisp_drvfs_init(struct atomisp_device *isp)
189{188{
189 struct device_driver *drv = isp->dev->driver;
190 int ret;190 int ret;
191 191
192 iunit_debug.isp = isp;192 iunit_debug.isp = isp;
@@ -194,7 +194,7 @@ int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp) · 1 unmodified line
194 194
195 ret = iunit_drvfs_create_files(iunit_debug.drv);195 ret = iunit_drvfs_create_files(iunit_debug.drv);
196 if (ret) {196 if (ret) {
197 dev_err(atomisp_dev, "drvfs_create_files error: %d\n", ret);197 dev_err(isp->dev, "drvfs_create_files error: %d\n", ret);
198 iunit_drvfs_remove_files(iunit_debug.drv);198 iunit_drvfs_remove_files(iunit_debug.drv);
199 }199 }
200 200
drivers/staging/media/atomisp/pci/atomisp_drvfs.h+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
19#ifndef __ATOMISP_DRVFS_H__19#ifndef __ATOMISP_DRVFS_H__
20#define __ATOMISP_DRVFS_H__20#define __ATOMISP_DRVFS_H__
21 21
22int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp);22int atomisp_drvfs_init(struct atomisp_device *isp);
23void atomisp_drvfs_exit(void);23void atomisp_drvfs_exit(void);
24 24
25#endif /* __ATOMISP_DRVFS_H__ */25#endif /* __ATOMISP_DRVFS_H__ */
drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c+351−186
@@ -26,6 +26,9 @@ enum clock_rate { · 25 unmodified lines
26#define CLK_RATE_19_2MHZ 1920000026#define CLK_RATE_19_2MHZ 19200000
27#define CLK_RATE_25_0MHZ 2500000027#define CLK_RATE_25_0MHZ 25000000
28 28
29/* Valid clock number range from 0 to 5 */
30#define MAX_CLK_COUNT 5
31
29/* X-Powers AXP288 register set */32/* X-Powers AXP288 register set */
30#define ALDO1_SEL_REG 0x2833#define ALDO1_SEL_REG 0x28
31#define ALDO1_CTRL3_REG 0x1334#define ALDO1_CTRL3_REG 0x13
@@ -61,9 +64,7 @@ enum clock_rate { · 29 unmodified lines
61 64
62struct gmin_subdev {65struct gmin_subdev {
63 struct v4l2_subdev *subdev;66 struct v4l2_subdev *subdev;
64 int clock_num;
65 enum clock_rate clock_src;67 enum clock_rate clock_src;
66 bool clock_on;
67 struct clk *pmc_clk;68 struct clk *pmc_clk;
68 struct gpio_desc *gpio0;69 struct gpio_desc *gpio0;
69 struct gpio_desc *gpio1;70 struct gpio_desc *gpio1;
@@ -75,11 +76,16 @@ struct gmin_subdev { · 5 unmodified lines
75 unsigned int csi_lanes;76 unsigned int csi_lanes;
76 enum atomisp_input_format csi_fmt;77 enum atomisp_input_format csi_fmt;
77 enum atomisp_bayer_order csi_bayer;78 enum atomisp_bayer_order csi_bayer;
79
80 bool clock_on;
78 bool v1p8_on;81 bool v1p8_on;
79 bool v2p8_on;82 bool v2p8_on;
80 bool v1p2_on;83 bool v1p2_on;
81 bool v2p8_vcm_on;84 bool v2p8_vcm_on;
82 85
86 int v1p8_gpio;
87 int v2p8_gpio;
88
83 u8 pwm_i2c_addr;89 u8 pwm_i2c_addr;
84 90
85 /* For PMIC AXP */91 /* For PMIC AXP */
@@ -90,9 +96,9 @@ struct gmin_subdev { · 4 unmodified lines
90static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS];96static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS];
91 97
92/* ACPI HIDs for the PMICs that could be used by this driver */98/* ACPI HIDs for the PMICs that could be used by this driver */
93#define PMIC_ACPI_AXP "INT33F4:00" /* XPower AXP288 PMIC */99#define PMIC_ACPI_AXP "INT33F4" /* XPower AXP288 PMIC */
94#define PMIC_ACPI_TI "INT33F5:00" /* Dollar Cove TI PMIC */100#define PMIC_ACPI_TI "INT33F5" /* Dollar Cove TI PMIC */
95#define PMIC_ACPI_CRYSTALCOVE "INT33FD:00" /* Crystal Cove PMIC */101#define PMIC_ACPI_CRYSTALCOVE "INT33FD" /* Crystal Cove PMIC */
96 102
97#define PMIC_PLATFORM_TI "intel_soc_pmic_chtdc_ti"103#define PMIC_PLATFORM_TI "intel_soc_pmic_chtdc_ti"
98 104
@@ -105,7 +111,7 @@ static enum { · 6 unmodified lines
105} pmic_id;111} pmic_id;
106 112
107static const char *pmic_name[] = {113static const char *pmic_name[] = {
108 [PMIC_UNSET] = "unset",114 [PMIC_UNSET] = "ACPI device PM",
109 [PMIC_REGULATOR] = "regulator driver",115 [PMIC_REGULATOR] = "regulator driver",
110 [PMIC_AXP] = "XPower AXP288 PMIC",116 [PMIC_AXP] = "XPower AXP288 PMIC",
111 [PMIC_TI] = "Dollar Cove TI PMIC",117 [PMIC_TI] = "Dollar Cove TI PMIC",
@@ -119,24 +125,6 @@ static const struct atomisp_platform_data pdata = { · 7 unmodified lines
119 .subdevs = pdata_subdevs,125 .subdevs = pdata_subdevs,
120};126};
121 127
122/*
123 * Something of a hack. The ECS E7 board drives camera 2.8v from an
124 * external regulator instead of the PMIC. There's a gmin_CamV2P8
125 * config variable that specifies the GPIO to handle this particular
126 * case, but this needs a broader architecture for handling camera
127 * power.
128 */
129enum { V2P8_GPIO_UNSET = -2, V2P8_GPIO_NONE = -1 };
130static int v2p8_gpio = V2P8_GPIO_UNSET;
131
132/*
133 * Something of a hack. The CHT RVP board drives camera 1.8v from an
134 * external regulator instead of the PMIC just like ECS E7 board, see the
135 * comments above.
136 */
137enum { V1P8_GPIO_UNSET = -2, V1P8_GPIO_NONE = -1 };
138static int v1p8_gpio = V1P8_GPIO_UNSET;
139
140static LIST_HEAD(vcm_devices);128static LIST_HEAD(vcm_devices);
141static DEFINE_MUTEX(vcm_lock);129static DEFINE_MUTEX(vcm_lock);
142 130
@@ -199,6 +187,8 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev, · 56 unmodified lines
199 * gmin_subdev struct is already initialized for us.187 * gmin_subdev struct is already initialized for us.
200 */188 */
201 gs = find_gmin_subdev(subdev);189 gs = find_gmin_subdev(subdev);
190 if (!gs)
191 return -ENODEV;
202 192
203 pdata.subdevs[i].type = type;193 pdata.subdevs[i].type = type;
204 pdata.subdevs[i].port = gs->csi_port;194 pdata.subdevs[i].port = gs->csi_port;
@@ -294,6 +284,7 @@ static struct gmin_cfg_var mrd7_vars[] = { · 89 unmodified lines
294 {"INT33F8:00_CsiFmt", "13"},284 {"INT33F8:00_CsiFmt", "13"},
295 {"INT33F8:00_CsiBayer", "0"},285 {"INT33F8:00_CsiBayer", "0"},
296 {"INT33F8:00_CamClk", "0"},286 {"INT33F8:00_CamClk", "0"},
287
297 {"INT33F9:00_CamType", "1"},288 {"INT33F9:00_CamType", "1"},
298 {"INT33F9:00_CsiPort", "0"},289 {"INT33F9:00_CsiPort", "0"},
299 {"INT33F9:00_CsiLanes", "1"},290 {"INT33F9:00_CsiLanes", "1"},
@@ -309,6 +300,7 @@ static struct gmin_cfg_var ecs7_vars[] = { · 9 unmodified lines
309 {"INT33BE:00_CsiFmt", "13"},300 {"INT33BE:00_CsiFmt", "13"},
310 {"INT33BE:00_CsiBayer", "2"},301 {"INT33BE:00_CsiBayer", "2"},
311 {"INT33BE:00_CamClk", "0"},302 {"INT33BE:00_CamClk", "0"},
303
312 {"INT33F0:00_CsiPort", "0"},304 {"INT33F0:00_CsiPort", "0"},
313 {"INT33F0:00_CsiLanes", "1"},305 {"INT33F0:00_CsiLanes", "1"},
314 {"INT33F0:00_CsiFmt", "13"},306 {"INT33F0:00_CsiFmt", "13"},
@@ -322,6 +314,7 @@ static struct gmin_cfg_var i8880_vars[] = { · 7 unmodified lines
322 {"XXOV2680:00_CsiPort", "1"},314 {"XXOV2680:00_CsiPort", "1"},
323 {"XXOV2680:00_CsiLanes", "1"},315 {"XXOV2680:00_CsiLanes", "1"},
324 {"XXOV2680:00_CamClk", "0"},316 {"XXOV2680:00_CamClk", "0"},
317
325 {"XXGC0310:00_CsiPort", "0"},318 {"XXGC0310:00_CsiPort", "0"},
326 {"XXGC0310:00_CsiLanes", "1"},319 {"XXGC0310:00_CsiLanes", "1"},
327 {"XXGC0310:00_CamClk", "1"},320 {"XXGC0310:00_CamClk", "1"},
@@ -381,34 +374,27 @@ static const guid_t atomisp_dsm_guid = GUID_INIT(0xdc2f6c4f, 0x045b, 0x4f1d, · 53 unmodified lines
381#define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */374#define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */
382static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME];375static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME];
383 376
384static int gmin_i2c_match_one(struct device *dev, const void *data)
385{
386 const char *name = data;
387 struct i2c_client *client;
388
389 if (dev->type != &i2c_client_type)
390 return 0;
391
392 client = to_i2c_client(dev);
393
394 return (!strcmp(name, client->name));
395}
396
397static struct i2c_client *gmin_i2c_dev_exists(struct device *dev, char *name,377static struct i2c_client *gmin_i2c_dev_exists(struct device *dev, char *name,
398 struct i2c_client **client)378 struct i2c_client **client)
399{379{
380 struct acpi_device *adev;
400 struct device *d;381 struct device *d;
401 382
402 while ((d = bus_find_device(&i2c_bus_type, NULL, name,383 adev = acpi_dev_get_first_match_dev(name, NULL, -1);
403 gmin_i2c_match_one))) {384 if (!adev)
404 *client = to_i2c_client(d);385 return NULL;
405 dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n",
406 (*client)->name, (*client)->addr,
407 (*client)->adapter->nr);
408 return *client;
409 }
410 386
411 return NULL;387 d = bus_find_device_by_acpi_dev(&i2c_bus_type, adev);
388 acpi_dev_put(adev);
389 if (!d)
390 return NULL;
391
392 *client = i2c_verify_client(d);
393 put_device(d);
394
395 dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n",
396 (*client)->name, (*client)->addr, (*client)->adapter->nr);
397 return *client;
412}398}
413 399
414static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg,400static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg,
@@ -427,94 +413,222 @@ static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg, · 12 unmodified lines
427 "I2C write, addr: 0x%02x, reg: 0x%02x, value: 0x%02x, mask: 0x%02x\n",413 "I2C write, addr: 0x%02x, reg: 0x%02x, value: 0x%02x, mask: 0x%02x\n",
428 i2c_addr, reg, value, mask);414 i2c_addr, reg, value, mask);
429 415
430 ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg,416 ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg, value, mask);
431 value, mask);417 if (ret == -EOPNOTSUPP)
432
433 if (ret == -EOPNOTSUPP) {
434 dev_err(dev,418 dev_err(dev,
435 "ACPI didn't mapped the OpRegion needed to access I2C address 0x%02x.\n"419 "ACPI didn't mapped the OpRegion needed to access I2C address 0x%02x.\n"
436 "Need to compile the Kernel using CONFIG_*_PMIC_OPREGION settings\n",420 "Need to compile the kernel using CONFIG_*_PMIC_OPREGION settings\n",
437 i2c_addr);421 i2c_addr);
438 return ret;
439 }
440 422
441 return ret;423 return ret;
442}424}
443 425
444static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)426static int atomisp_get_acpi_power(struct device *dev)
445{427{
446 struct i2c_client *power = NULL, *client = v4l2_get_subdevdata(subdev);428 char name[5];
447 struct acpi_device *adev;429 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
448 acpi_handle handle;430 struct acpi_buffer b_name = { sizeof(name), name };
449 struct device *dev;431 union acpi_object *package, *element;
450 int i, ret;432 acpi_handle handle = ACPI_HANDLE(dev);
433 acpi_handle rhandle;
434 acpi_status status;
435 int clock_num = -1;
436 int i;
451 437
452 if (!client)438 status = acpi_evaluate_object(handle, "_PR0", NULL, &buffer);
453 return NULL;439 if (!ACPI_SUCCESS(status))
440 return -1;
454 441
455 dev = &client->dev;442 package = buffer.pointer;
456 443
457 handle = ACPI_HANDLE(dev);444 if (!buffer.length || !package
445 || package->type != ACPI_TYPE_PACKAGE
446 || !package->package.count)
447 goto fail;
458 448
459 // FIXME: may need to release resources allocated by acpi_bus_get_device()449 for (i = 0; i < package->package.count; i++) {
460 if (!handle || acpi_bus_get_device(handle, &adev)) {450 element = &package->package.elements[i];
461 dev_err(dev, "Error could not get ACPI device\n");
462 return NULL;
463 }
464 451
465 dev_info(&client->dev, "%s: ACPI detected it on bus ID=%s, HID=%s\n",452 if (element->type != ACPI_TYPE_LOCAL_REFERENCE)
466 __func__, acpi_device_bid(adev), acpi_device_hid(adev));453 continue;
467 454
468 if (!pmic_id) {455 rhandle = element->reference.handle;
469 if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power))456 if (!rhandle)
470 pmic_id = PMIC_TI;457 goto fail;
471 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power))458
472 pmic_id = PMIC_AXP;459 acpi_get_name(rhandle, ACPI_SINGLE_NAME, &b_name);
473 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power))460
474 pmic_id = PMIC_CRYSTALCOVE;461 dev_dbg(dev, "Found PM resource '%s'\n", name);
475 else462 if (strlen(name) == 4 && !strncmp(name, "CLK", 3)) {
476 pmic_id = PMIC_REGULATOR;463 if (name[3] >= '0' && name[3] <= '4')
464 clock_num = name[3] - '0';
465#if 0
466 /*
467 * We could abort here, but let's parse all resources,
468 * as this is helpful for debugging purposes
469 */
470 if (clock_num >= 0)
471 break;
472#endif
473 }
477 }474 }
478 475
479 for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++)476fail:
480 ;477 ACPI_FREE(buffer.pointer);
481 if (i >= MAX_SUBDEVS)478
482 return NULL;479 return clock_num;
480}
481
482static u8 gmin_get_pmic_id_and_addr(struct device *dev)
483{
484 struct i2c_client *power;
485 static u8 pmic_i2c_addr;
486
487 if (pmic_id)
488 return pmic_i2c_addr;
489
490 if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power))
491 pmic_id = PMIC_TI;
492 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power))
493 pmic_id = PMIC_AXP;
494 else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power))
495 pmic_id = PMIC_CRYSTALCOVE;
496 else
497 pmic_id = PMIC_REGULATOR;
498
499 pmic_i2c_addr = power ? power->addr : 0;
500 return pmic_i2c_addr;
501}
502
503static int gmin_detect_pmic(struct v4l2_subdev *subdev)
504{
505 struct i2c_client *client = v4l2_get_subdevdata(subdev);
506 struct device *dev = &client->dev;
507 u8 pmic_i2c_addr;
508
509 pmic_i2c_addr = gmin_get_pmic_id_and_addr(dev);
510 dev_info(dev, "gmin: power management provided via %s (i2c addr 0x%02x)\n",
511 pmic_name[pmic_id], pmic_i2c_addr);
512 return pmic_i2c_addr;
513}
514
515static int gmin_subdev_add(struct gmin_subdev *gs)
516{
517 struct i2c_client *client = v4l2_get_subdevdata(gs->subdev);
518 struct device *dev = &client->dev;
519 struct acpi_device *adev = ACPI_COMPANION(dev);
520 int ret, clock_num = -1;
521
522 dev_info(dev, "%s: ACPI path is %pfw\n", __func__, dev_fwnode(dev));
523
524 /*WA:CHT requires XTAL clock as PLL is not stable.*/
525 gs->clock_src = gmin_get_var_int(dev, false, "ClkSrc",
526 VLV2_CLK_PLL_19P2MHZ);
527
528 gs->csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);
529 gs->csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);
530
531 gs->gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
532 if (IS_ERR(gs->gpio0))
533 gs->gpio0 = NULL;
534 else
535 dev_info(dev, "will handle gpio0 via ACPI\n");
536
537 gs->gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
538 if (IS_ERR(gs->gpio1))
539 gs->gpio1 = NULL;
540 else
541 dev_info(dev, "will handle gpio1 via ACPI\n");
542
543 /*
544 * Those are used only when there is an external regulator apart
545 * from the PMIC that would be providing power supply, like on the
546 * two cases below:
547 *
548 * The ECS E7 board drives camera 2.8v from an external regulator
549 * instead of the PMIC. There's a gmin_CamV2P8 config variable
550 * that specifies the GPIO to handle this particular case,
551 * but this needs a broader architecture for handling camera power.
552 *
553 * The CHT RVP board drives camera 1.8v from an* external regulator
554 * instead of the PMIC just like ECS E7 board.
555 */
483 556
484 if (power) {557 gs->v1p8_gpio = gmin_get_var_int(dev, true, "V1P8GPIO", -1);
485 gmin_subdevs[i].pwm_i2c_addr = power->addr;558 gs->v2p8_gpio = gmin_get_var_int(dev, true, "V2P8GPIO", -1);
559
560 /*
561 * FIXME:
562 *
563 * The ACPI handling code checks for the _PR? tables in order to
564 * know what is required to switch the device from power state
565 * D0 (_PR0) up to D3COLD (_PR3).
566 *
567 * The adev->flags.power_manageable is set to true if the device
568 * has a _PR0 table, which can be checked by calling
569 * acpi_device_power_manageable(adev).
570 *
571 * However, this only says that the device can be set to power off
572 * mode.
573 *
574 * At least on the DSDT tables we've seen so far, there's no _PR3,
575 * nor _PS3 (which would have a somewhat similar effect).
576 * So, using ACPI for power management won't work, except if adding
577 * an ACPI override logic somewhere.
578 *
579 * So, at least for the existing devices we know, the check below
580 * will always be false.
581 */
582 if (acpi_device_can_wakeup(adev) &&
583 acpi_device_can_poweroff(adev)) {
486 dev_info(dev,584 dev_info(dev,
487 "gmin: power management provided via %s (i2c addr 0x%02x)\n",585 "gmin: power management provided via device PM\n");
488 pmic_name[pmic_id], power->addr);586 return 0;
489 } else {
490 dev_info(dev, "gmin: power management provided via %s\n",
491 pmic_name[pmic_id]);
492 }587 }
493 588
494 gmin_subdevs[i].subdev = subdev;589 /*
495 gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0);590 * The code below is here due to backward compatibility with devices
496 /*WA:CHT requires XTAL clock as PLL is not stable.*/591 * whose ACPI BIOS may not contain everything that would be needed
497 gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc",592 * in order to set clocks and do power management.
498 VLV2_CLK_PLL_19P2MHZ);593 */
499 gmin_subdevs[i].csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);594
500 gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);595 /*
596 * According with :
597 * https://github.com/projectceladon/hardware-intel-kernelflinger/blob/master/doc/fastboot.md
598 *
599 * The "CamClk" EFI var is set via fastboot on some Android devices,
600 * and seems to contain the number of the clock used to feed the
601 * sensor.
602 *
603 * On systems with a proper ACPI table, this is given via the _PR0
604 * power resource table. The logic below should first check if there
605 * is a power resource already, falling back to the EFI vars detection
606 * otherwise.
607 */
501 608
502 /* get PMC clock with clock framework */609 /* Try first to use ACPI to get the clock resource */
503 snprintf(gmin_pmc_clk_name,610 if (acpi_device_power_manageable(adev))
504 sizeof(gmin_pmc_clk_name),611 clock_num = atomisp_get_acpi_power(dev);
505 "%s_%d", "pmc_plt_clk", gmin_subdevs[i].clock_num);
506 612
507 gmin_subdevs[i].pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);613 /* Fall-back use EFI and/or DMI match */
508 if (IS_ERR(gmin_subdevs[i].pmc_clk)) {614 if (clock_num < 0)
509 ret = PTR_ERR(gmin_subdevs[i].pmc_clk);615 clock_num = gmin_get_var_int(dev, false, "CamClk", 0);
510 616
511 dev_err(dev,617 if (clock_num < 0 || clock_num > MAX_CLK_COUNT) {
512 "Failed to get clk from %s : %d\n",618 dev_err(dev, "Invalid clock number\n");
513 gmin_pmc_clk_name,619 return -EINVAL;
514 ret);620 }
515 621
516 return NULL;622 snprintf(gmin_pmc_clk_name, sizeof(gmin_pmc_clk_name),
623 "%s_%d", "pmc_plt_clk", clock_num);
624
625 gs->pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);
626 if (IS_ERR(gs->pmc_clk)) {
627 ret = PTR_ERR(gs->pmc_clk);
628 dev_err(dev, "Failed to get clk from %s: %d\n", gmin_pmc_clk_name, ret);
629 return ret;
517 }630 }
631 dev_info(dev, "Will use CLK%d (%s)\n", clock_num, gmin_pmc_clk_name);
518 632
519 /*633 /*
520 * The firmware might enable the clock at634 * The firmware might enable the clock at
@@ -526,25 +640,17 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) · 5 unmodified lines
526 * to disable a clock that has not been enabled,640 * to disable a clock that has not been enabled,
527 * we need to enable the clock first.641 * we need to enable the clock first.
528 */642 */
529 ret = clk_prepare_enable(gmin_subdevs[i].pmc_clk);643 ret = clk_prepare_enable(gs->pmc_clk);
530 if (!ret)644 if (!ret)
531 clk_disable_unprepare(gmin_subdevs[i].pmc_clk);645 clk_disable_unprepare(gs->pmc_clk);
532
533 gmin_subdevs[i].gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
534 if (IS_ERR(gmin_subdevs[i].gpio0))
535 gmin_subdevs[i].gpio0 = NULL;
536
537 gmin_subdevs[i].gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
538 if (IS_ERR(gmin_subdevs[i].gpio1))
539 gmin_subdevs[i].gpio1 = NULL;
540 646
541 switch (pmic_id) {647 switch (pmic_id) {
542 case PMIC_REGULATOR:648 case PMIC_REGULATOR:
543 gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX");649 gs->v1p8_reg = regulator_get(dev, "V1P8SX");
544 gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX");650 gs->v2p8_reg = regulator_get(dev, "V2P8SX");
545 651
546 gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A");652 gs->v1p2_reg = regulator_get(dev, "V1P2A");
547 gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B");653 gs->v2p8_vcm_reg = regulator_get(dev, "VPROG4B");
548 654
549 /* Note: ideally we would initialize v[12]p8_on to the655 /* Note: ideally we would initialize v[12]p8_on to the
550 * output of regulator_is_enabled(), but sadly that656 * output of regulator_is_enabled(), but sadly that
@@ -556,32 +662,31 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) · 5 unmodified lines
556 break;662 break;
557 663
558 case PMIC_AXP:664 case PMIC_AXP:
559 gmin_subdevs[i].eldo1_1p8v = gmin_get_var_int(dev, false,665 gs->eldo1_1p8v = gmin_get_var_int(dev, false,
560 "eldo1_1p8v",666 "eldo1_1p8v",
561 ELDO1_1P8V);667 ELDO1_1P8V);
562 gmin_subdevs[i].eldo1_sel_reg = gmin_get_var_int(dev, false,668 gs->eldo1_sel_reg = gmin_get_var_int(dev, false,
563 "eldo1_sel_reg",669 "eldo1_sel_reg",
564 ELDO1_SEL_REG);670 ELDO1_SEL_REG);
565 gmin_subdevs[i].eldo1_ctrl_shift = gmin_get_var_int(dev, false,671 gs->eldo1_ctrl_shift = gmin_get_var_int(dev, false,
566 "eldo1_ctrl_shift",672 "eldo1_ctrl_shift",
567 ELDO1_CTRL_SHIFT);673 ELDO1_CTRL_SHIFT);
568 gmin_subdevs[i].eldo2_1p8v = gmin_get_var_int(dev, false,674 gs->eldo2_1p8v = gmin_get_var_int(dev, false,
569 "eldo2_1p8v",675 "eldo2_1p8v",
570 ELDO2_1P8V);676 ELDO2_1P8V);
571 gmin_subdevs[i].eldo2_sel_reg = gmin_get_var_int(dev, false,677 gs->eldo2_sel_reg = gmin_get_var_int(dev, false,
572 "eldo2_sel_reg",678 "eldo2_sel_reg",
573 ELDO2_SEL_REG);679 ELDO2_SEL_REG);
574 gmin_subdevs[i].eldo2_ctrl_shift = gmin_get_var_int(dev, false,680 gs->eldo2_ctrl_shift = gmin_get_var_int(dev, false,
575 "eldo2_ctrl_shift",681 "eldo2_ctrl_shift",
576 ELDO2_CTRL_SHIFT);682 ELDO2_CTRL_SHIFT);
577 gmin_subdevs[i].pwm_i2c_addr = power->addr;
578 break;683 break;
579 684
580 default:685 default:
581 break;686 break;
582 }687 }
583 688
584 return &gmin_subdevs[i];689 return 0;
585}690}
586 691
587static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev)692static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev)
@@ -591,7 +696,17 @@ static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev) · 3 unmodified lines
591 for (i = 0; i < MAX_SUBDEVS; i++)696 for (i = 0; i < MAX_SUBDEVS; i++)
592 if (gmin_subdevs[i].subdev == subdev)697 if (gmin_subdevs[i].subdev == subdev)
593 return &gmin_subdevs[i];698 return &gmin_subdevs[i];
594 return gmin_subdev_add(subdev);699 return NULL;
700}
701
702static struct gmin_subdev *find_free_gmin_subdev_slot(void)
703{
704 unsigned int i;
705
706 for (i = 0; i < MAX_SUBDEVS; i++)
707 if (gmin_subdevs[i].subdev == NULL)
708 return &gmin_subdevs[i];
709 return NULL;
595}710}
596 711
597static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs,712static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs,
@@ -700,32 +815,24 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) · 102 unmodified lines
700{815{
701 struct gmin_subdev *gs = find_gmin_subdev(subdev);816 struct gmin_subdev *gs = find_gmin_subdev(subdev);
702 int ret;817 int ret;
703 struct device *dev;
704 struct i2c_client *client = v4l2_get_subdevdata(subdev);
705 int value;818 int value;
706 819
707 dev = &client->dev;820 if (gs->v1p8_gpio >= 0) {
708 821 pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n",
709 if (v1p8_gpio == V1P8_GPIO_UNSET) {822 gs->v1p8_gpio);
710 v1p8_gpio = gmin_get_var_int(dev, true,823 ret = gpio_request(gs->v1p8_gpio, "camera_v1p8_en");
711 "V1P8GPIO", V1P8_GPIO_NONE);824 if (!ret)
712 if (v1p8_gpio != V1P8_GPIO_NONE) {825 ret = gpio_direction_output(gs->v1p8_gpio, 0);
713 pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n",826 if (ret)
714 v1p8_gpio);827 pr_err("V1P8 GPIO initialization failed\n");
715 ret = gpio_request(v1p8_gpio, "camera_v1p8_en");
716 if (!ret)
717 ret = gpio_direction_output(v1p8_gpio, 0);
718 if (ret)
719 pr_err("V1P8 GPIO initialization failed\n");
720 }
721 }828 }
722 829
723 if (!gs || gs->v1p8_on == on)830 if (!gs || gs->v1p8_on == on)
724 return 0;831 return 0;
725 gs->v1p8_on = on;832 gs->v1p8_on = on;
726 833
727 if (v1p8_gpio >= 0)834 if (gs->v1p8_gpio >= 0)
728 gpio_set_value(v1p8_gpio, on);835 gpio_set_value(gs->v1p8_gpio, on);
729 836
730 if (gs->v1p8_reg) {837 if (gs->v1p8_reg) {
731 regulator_set_voltage(gs->v1p8_reg, 1800000, 1800000);838 regulator_set_voltage(gs->v1p8_reg, 1800000, 1800000);
@@ -762,32 +869,24 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) · 30 unmodified lines
762{869{
763 struct gmin_subdev *gs = find_gmin_subdev(subdev);870 struct gmin_subdev *gs = find_gmin_subdev(subdev);
764 int ret;871 int ret;
765 struct device *dev;
766 struct i2c_client *client = v4l2_get_subdevdata(subdev);
767 int value;872 int value;
768 873
769 dev = &client->dev;874 if (gs->v2p8_gpio >= 0) {
770 875 pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n",
771 if (v2p8_gpio == V2P8_GPIO_UNSET) {876 gs->v2p8_gpio);
772 v2p8_gpio = gmin_get_var_int(dev, true,877 ret = gpio_request(gs->v2p8_gpio, "camera_v2p8");
773 "V2P8GPIO", V2P8_GPIO_NONE);878 if (!ret)
774 if (v2p8_gpio != V2P8_GPIO_NONE) {879 ret = gpio_direction_output(gs->v2p8_gpio, 0);
775 pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n",880 if (ret)
776 v2p8_gpio);881 pr_err("V2P8 GPIO initialization failed\n");
777 ret = gpio_request(v2p8_gpio, "camera_v2p8");
778 if (!ret)
779 ret = gpio_direction_output(v2p8_gpio, 0);
780 if (ret)
781 pr_err("V2P8 GPIO initialization failed\n");
782 }
783 }882 }
784 883
785 if (!gs || gs->v2p8_on == on)884 if (!gs || gs->v2p8_on == on)
786 return 0;885 return 0;
787 gs->v2p8_on = on;886 gs->v2p8_on = on;
788 887
789 if (v2p8_gpio >= 0)888 if (gs->v2p8_gpio >= 0)
790 gpio_set_value(v2p8_gpio, on);889 gpio_set_value(gs->v2p8_gpio, on);
791 890
792 if (gs->v2p8_reg) {891 if (gs->v2p8_reg) {
793 regulator_set_voltage(gs->v2p8_reg, 2900000, 2900000);892 regulator_set_voltage(gs->v2p8_reg, 2900000, 2900000);
@@ -819,6 +918,37 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) · 25 unmodified lines
819 return -EINVAL;918 return -EINVAL;
820}919}
821 920
921static int gmin_acpi_pm_ctrl(struct v4l2_subdev *subdev, int on)
922{
923 int ret = 0;
924 struct gmin_subdev *gs = find_gmin_subdev(subdev);
925 struct i2c_client *client = v4l2_get_subdevdata(subdev);
926 struct acpi_device *adev = ACPI_COMPANION(&client->dev);
927
928 /* Use the ACPI power management to control it */
929 on = !!on;
930 if (gs->clock_on == on)
931 return 0;
932
933 dev_dbg(subdev->dev, "Setting power state to %s\n",
934 on ? "on" : "off");
935
936 if (on)
937 ret = acpi_device_set_power(adev,
938 ACPI_STATE_D0);
939 else
940 ret = acpi_device_set_power(adev,
941 ACPI_STATE_D3_COLD);
942
943 if (!ret)
944 gs->clock_on = on;
945 else
946 dev_err(subdev->dev, "Couldn't set power state to %s\n",
947 on ? "on" : "off");
948
949 return ret;
950}
951
822static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on)952static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on)
823{953{
824 int ret = 0;954 int ret = 0;
@@ -884,7 +1014,7 @@ static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, · 59 unmodified lines
884 return NULL;1014 return NULL;
885}1015}
886 1016
887static struct camera_sensor_platform_data gmin_plat = {1017static struct camera_sensor_platform_data pmic_gmin_plat = {
888 .gpio0_ctrl = gmin_gpio0_ctrl,1018 .gpio0_ctrl = gmin_gpio0_ctrl,
889 .gpio1_ctrl = gmin_gpio1_ctrl,1019 .gpio1_ctrl = gmin_gpio1_ctrl,
890 .v1p8_ctrl = gmin_v1p8_ctrl,1020 .v1p8_ctrl = gmin_v1p8_ctrl,
@@ -895,17 +1025,36 @@ static struct camera_sensor_platform_data gmin_plat = { · 4 unmodified lines
895 .get_vcm_ctrl = gmin_get_vcm_ctrl,1025 .get_vcm_ctrl = gmin_get_vcm_ctrl,
896};1026};
897 1027
1028static struct camera_sensor_platform_data acpi_gmin_plat = {
1029 .gpio0_ctrl = gmin_gpio0_ctrl,
1030 .gpio1_ctrl = gmin_gpio1_ctrl,
1031 .v1p8_ctrl = gmin_acpi_pm_ctrl,
1032 .v2p8_ctrl = gmin_acpi_pm_ctrl,
1033 .v1p2_ctrl = gmin_acpi_pm_ctrl,
1034 .flisclk_ctrl = gmin_acpi_pm_ctrl,
1035 .csi_cfg = gmin_csi_cfg,
1036 .get_vcm_ctrl = gmin_get_vcm_ctrl,
1037};
1038
898struct camera_sensor_platform_data *gmin_camera_platform_data(1039struct camera_sensor_platform_data *gmin_camera_platform_data(
899 struct v4l2_subdev *subdev,1040 struct v4l2_subdev *subdev,
900 enum atomisp_input_format csi_format,1041 enum atomisp_input_format csi_format,
901 enum atomisp_bayer_order csi_bayer)1042 enum atomisp_bayer_order csi_bayer)
902{1043{
903 struct gmin_subdev *gs = find_gmin_subdev(subdev);1044 u8 pmic_i2c_addr = gmin_detect_pmic(subdev);
1045 struct gmin_subdev *gs;
904 1046
1047 gs = find_free_gmin_subdev_slot();
1048 gs->subdev = subdev;
905 gs->csi_fmt = csi_format;1049 gs->csi_fmt = csi_format;
906 gs->csi_bayer = csi_bayer;1050 gs->csi_bayer = csi_bayer;
1051 gs->pwm_i2c_addr = pmic_i2c_addr;
907 1052
908 return &gmin_plat;1053 gmin_subdev_add(gs);
1054 if (gs->pmc_clk)
1055 return &pmic_gmin_plat;
1056 else
1057 return &acpi_gmin_plat;
909}1058}
910EXPORT_SYMBOL_GPL(gmin_camera_platform_data);1059EXPORT_SYMBOL_GPL(gmin_camera_platform_data);
911 1060
@@ -957,12 +1106,28 @@ static int gmin_get_config_dsm_var(struct device *dev, · 45 unmodified lines
957 union acpi_object *obj, *cur = NULL;1106 union acpi_object *obj, *cur = NULL;
958 int i;1107 int i;
959 1108
1109 /*
1110 * The data reported by "CamClk" seems to be either 0 or 1 at the
1111 * _DSM table.
1112 *
1113 * At the ACPI tables we looked so far, this is not related to the
1114 * actual clock source for the sensor, which is given by the
1115 * _PR0 ACPI table. So, ignore it, as otherwise this will be
1116 * set to a wrong value.
1117 */
1118 if (!strcmp(var, "CamClk"))
1119 return -EINVAL;
1120
960 obj = acpi_evaluate_dsm(handle, &atomisp_dsm_guid, 0, 0, NULL);1121 obj = acpi_evaluate_dsm(handle, &atomisp_dsm_guid, 0, 0, NULL);
961 if (!obj) {1122 if (!obj) {
962 dev_info_once(dev, "Didn't find ACPI _DSM table.\n");1123 dev_info_once(dev, "Didn't find ACPI _DSM table.\n");
963 return -EINVAL;1124 return -EINVAL;
964 }1125 }
965 1126
1127 /* Return on unexpected object type */
1128 if (obj->type != ACPI_TYPE_PACKAGE)
1129 return -EINVAL;
1130
966#if 0 /* Just for debugging purposes */1131#if 0 /* Just for debugging purposes */
967 for (i = 0; i < obj->package.count; i++) {1132 for (i = 0; i < obj->package.count; i++) {
968 union acpi_object *cur = &obj->package.elements[i];1133 union acpi_object *cur = &obj->package.elements[i];
@@ -1155,10 +1320,10 @@ EXPORT_SYMBOL_GPL(camera_sensor_csi); · 186 unmodified lines
1155 * trying. The driver itself does direct calls to the PUNIT to manage1320 * trying. The driver itself does direct calls to the PUNIT to manage
1156 * ISP power.1321 * ISP power.
1157 */1322 */
1158static void isp_pm_cap_fixup(struct pci_dev *dev)1323static void isp_pm_cap_fixup(struct pci_dev *pdev)
1159{1324{
1160 dev_info(&dev->dev, "Disabling PCI power management on camera ISP\n");1325 dev_info(&pdev->dev, "Disabling PCI power management on camera ISP\n");
1161 dev->pm_cap = 0;1326 pdev->pm_cap = 0;
1162}1327}
1163DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup);1328DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup);
1164 1329
drivers/staging/media/atomisp/pci/atomisp_internal.h+1−1
@@ -216,12 +216,12 @@ struct atomisp_sw_contex { · 215 unmodified lines
216 * ci device struct216 * ci device struct
217 */217 */
218struct atomisp_device {218struct atomisp_device {
219 struct pci_dev *pdev;
220 struct device *dev;219 struct device *dev;
221 struct v4l2_device v4l2_dev;220 struct v4l2_device v4l2_dev;
222 struct media_device media_dev;221 struct media_device media_dev;
223 struct atomisp_platform_data *pdata;222 struct atomisp_platform_data *pdata;
224 void *mmu_l1_base;223 void *mmu_l1_base;
224 void __iomem *base;
225 const struct firmware *firmware;225 const struct firmware *firmware;
226 226
227 struct pm_qos_request pm_qos;227 struct pm_qos_request pm_qos;
drivers/staging/media/atomisp/pci/atomisp_ioctl.c+9−10
@@ -549,8 +549,7 @@ static int atomisp_querycap(struct file *file, void *fh, · 548 unmodified lines
549 549
550 strscpy(cap->driver, DRIVER, sizeof(cap->driver));550 strscpy(cap->driver, DRIVER, sizeof(cap->driver));
551 strscpy(cap->card, CARD, sizeof(cap->card));551 strscpy(cap->card, CARD, sizeof(cap->card));
552 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",552 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", dev_name(isp->dev));
553 pci_name(isp->pdev));
554 553
555 return 0;554 return 0;
556}555}
@@ -1635,6 +1634,7 @@ static int atomisp_streamon(struct file *file, void *fh, · 1078 unmodified lines
1635 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);1634 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
1636 struct atomisp_sub_device *asd = pipe->asd;1635 struct atomisp_sub_device *asd = pipe->asd;
1637 struct atomisp_device *isp = video_get_drvdata(vdev);1636 struct atomisp_device *isp = video_get_drvdata(vdev);
1637 struct pci_dev *pdev = to_pci_dev(isp->dev);
1638 enum ia_css_pipe_id css_pipe_id;1638 enum ia_css_pipe_id css_pipe_id;
1639 unsigned int sensor_start_stream;1639 unsigned int sensor_start_stream;
1640 unsigned int wdt_duration = ATOMISP_ISP_TIMEOUT_DURATION;1640 unsigned int wdt_duration = ATOMISP_ISP_TIMEOUT_DURATION;
@@ -1844,9 +1844,8 @@ start_sensor: · 203 unmodified lines
1844 /* Enable the CSI interface on ANN B0/K0 */1844 /* Enable the CSI interface on ANN B0/K0 */
1845 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<1845 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
1846 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {1846 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
1847 pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,1847 pci_write_config_word(pdev, MRFLD_PCI_CSI_CONTROL,
1848 isp->saved_regs.csi_control |1848 isp->saved_regs.csi_control | MRFLD_PCI_CSI_CONTROL_CSI_READY);
1849 MRFLD_PCI_CSI_CONTROL_CSI_READY);
1850 }1849 }
1851 1850
1852 /* stream on the sensor */1851 /* stream on the sensor */
@@ -1891,6 +1890,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) · 38 unmodified lines
1891{1890{
1892 struct video_device *vdev = video_devdata(file);1891 struct video_device *vdev = video_devdata(file);
1893 struct atomisp_device *isp = video_get_drvdata(vdev);1892 struct atomisp_device *isp = video_get_drvdata(vdev);
1893 struct pci_dev *pdev = to_pci_dev(isp->dev);
1894 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);1894 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
1895 struct atomisp_sub_device *asd = pipe->asd;1895 struct atomisp_sub_device *asd = pipe->asd;
1896 struct atomisp_video_pipe *capture_pipe = NULL;1896 struct atomisp_video_pipe *capture_pipe = NULL;
@@ -2076,9 +2076,8 @@ stopsensor: · 179 unmodified lines
2076 /* Disable the CSI interface on ANN B0/K0 */2076 /* Disable the CSI interface on ANN B0/K0 */
2077 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<2077 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
2078 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {2078 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
2079 pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,2079 pci_write_config_word(pdev, MRFLD_PCI_CSI_CONTROL,
2080 isp->saved_regs.csi_control &2080 isp->saved_regs.csi_control & ~MRFLD_PCI_CSI_CONTROL_CSI_READY);
2081 ~MRFLD_PCI_CSI_CONTROL_CSI_READY);
2082 }2081 }
2083 2082
2084 if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, false))2083 if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, false))
@@ -2111,8 +2110,8 @@ stopsensor: · 26 unmodified lines
2111 }2110 }
2112 2111
2113 /* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */2112 /* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */
2114 pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control |2113 pci_write_config_dword(pdev, PCI_I_CONTROL,
2115 MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);2114 isp->saved_regs.i_control | MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
2116 dev_err(isp->dev, "atomisp_reset");2115 dev_err(isp->dev, "atomisp_reset");
2117 atomisp_reset(isp);2116 atomisp_reset(isp);
2118 for (i = 0; i < isp->num_of_streams; i++) {2117 for (i = 0; i < isp->num_of_streams; i++) {
drivers/staging/media/atomisp/pci/atomisp_v4l2.c+127−158
@@ -127,8 +127,6 @@ MODULE_PARM_DESC(pad_h, "extra data for ISP processing"); · 126 unmodified lines
127 127
128struct device *atomisp_dev;128struct device *atomisp_dev;
129 129
130void __iomem *atomisp_io_base;
131
132static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {130static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
133 {131 {
134 .width = ISP_FREQ_RULE_ANY,132 .width = ISP_FREQ_RULE_ANY,
@@ -512,30 +510,27 @@ void atomisp_acc_unregister(struct atomisp_acc_pipe *video) · 377 unmodified lines
512 510
513static int atomisp_save_iunit_reg(struct atomisp_device *isp)511static int atomisp_save_iunit_reg(struct atomisp_device *isp)
514{512{
515 struct pci_dev *dev = isp->pdev;513 struct pci_dev *pdev = to_pci_dev(isp->dev);
516 514
517 dev_dbg(isp->dev, "%s\n", __func__);515 dev_dbg(isp->dev, "%s\n", __func__);
518 516
519 pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);517 pci_read_config_word(pdev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
520 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */518 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
521 pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);519 pci_read_config_dword(pdev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
522 pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);520 pci_read_config_dword(pdev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
523 pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);521 pci_read_config_word(pdev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
524 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);522 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
525 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,523 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &isp->saved_regs.interrupt_control);
526 &isp->saved_regs.interrupt_control);524
527 525 pci_read_config_dword(pdev, MRFLD_PCI_PMCS, &isp->saved_regs.pmcs);
528 pci_read_config_dword(dev, MRFLD_PCI_PMCS,
529 &isp->saved_regs.pmcs);
530 /* Ensure read/write combining is enabled. */526 /* Ensure read/write combining is enabled. */
531 pci_read_config_dword(dev, PCI_I_CONTROL,527 pci_read_config_dword(pdev, PCI_I_CONTROL, &isp->saved_regs.i_control);
532 &isp->saved_regs.i_control);
533 isp->saved_regs.i_control |=528 isp->saved_regs.i_control |=
534 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |529 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
535 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;530 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
536 pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,531 pci_read_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
537 &isp->saved_regs.csi_access_viol);532 &isp->saved_regs.csi_access_viol);
538 pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,533 pci_read_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
539 &isp->saved_regs.csi_rcomp_config);534 &isp->saved_regs.csi_rcomp_config);
540 /*535 /*
541 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.536 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
@@ -545,65 +540,58 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp) · 3 unmodified lines
545 * is missed, and IUNIT can hang.540 * is missed, and IUNIT can hang.
546 * For both issues, setting this bit is a workaround.541 * For both issues, setting this bit is a workaround.
547 */542 */
548 isp->saved_regs.csi_rcomp_config |=543 isp->saved_regs.csi_rcomp_config |= MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
549 MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;544 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
550 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
551 &isp->saved_regs.csi_afe_dly);545 &isp->saved_regs.csi_afe_dly);
552 pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,546 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
553 &isp->saved_regs.csi_control);547 &isp->saved_regs.csi_control);
554 if (isp->media_dev.hw_revision >=548 if (isp->media_dev.hw_revision >=
555 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))549 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
556 isp->saved_regs.csi_control |=550 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_PARPATHEN;
557 MRFLD_PCI_CSI_CONTROL_PARPATHEN;
558 /*551 /*
559 * On CHT CSI_READY bit should be enabled before stream on552 * On CHT CSI_READY bit should be enabled before stream on
560 */553 */
561 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<554 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
562 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))555 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
563 isp->saved_regs.csi_control |=556 isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_CSI_READY;
564 MRFLD_PCI_CSI_CONTROL_CSI_READY;557 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
565 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
566 &isp->saved_regs.csi_afe_rcomp_config);558 &isp->saved_regs.csi_afe_rcomp_config);
567 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,559 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
568 &isp->saved_regs.csi_afe_hs_control);560 &isp->saved_regs.csi_afe_hs_control);
569 pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,561 pci_read_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
570 &isp->saved_regs.csi_deadline_control);562 &isp->saved_regs.csi_deadline_control);
571 return 0;563 return 0;
572}564}
573 565
574static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)566static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
575{567{
576 struct pci_dev *dev = isp->pdev;568 struct pci_dev *pdev = to_pci_dev(isp->dev);
577 569
578 dev_dbg(isp->dev, "%s\n", __func__);570 dev_dbg(isp->dev, "%s\n", __func__);
579 571
580 pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);572 pci_write_config_word(pdev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
581 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,573 pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, isp->saved_regs.ispmmadr);
582 isp->saved_regs.ispmmadr);574 pci_write_config_dword(pdev, PCI_MSI_CAPID, isp->saved_regs.msicap);
583 pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);575 pci_write_config_dword(pdev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
584 pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);576 pci_write_config_word(pdev, PCI_MSI_DATA, isp->saved_regs.msi_data);
585 pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);577 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
586 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);578 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, isp->saved_regs.interrupt_control);
587 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,579 pci_write_config_dword(pdev, PCI_I_CONTROL, isp->saved_regs.i_control);
588 isp->saved_regs.interrupt_control);580
589 pci_write_config_dword(dev, PCI_I_CONTROL,581 pci_write_config_dword(pdev, MRFLD_PCI_PMCS, isp->saved_regs.pmcs);
590 isp->saved_regs.i_control);582 pci_write_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
591
592 pci_write_config_dword(dev, MRFLD_PCI_PMCS,
593 isp->saved_regs.pmcs);
594 pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
595 isp->saved_regs.csi_access_viol);583 isp->saved_regs.csi_access_viol);
596 pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,584 pci_write_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
597 isp->saved_regs.csi_rcomp_config);585 isp->saved_regs.csi_rcomp_config);
598 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,586 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
599 isp->saved_regs.csi_afe_dly);587 isp->saved_regs.csi_afe_dly);
600 pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,588 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
601 isp->saved_regs.csi_control);589 isp->saved_regs.csi_control);
602 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,590 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
603 isp->saved_regs.csi_afe_rcomp_config);591 isp->saved_regs.csi_afe_rcomp_config);
604 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,592 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
605 isp->saved_regs.csi_afe_hs_control);593 isp->saved_regs.csi_afe_hs_control);
606 pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,594 pci_write_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
607 isp->saved_regs.csi_deadline_control);595 isp->saved_regs.csi_deadline_control);
608 596
609 /*597 /*
@@ -619,7 +607,7 @@ static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp) · 9 unmodified lines
619 607
620static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)608static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
621{609{
622 struct pci_dev *dev = isp->pdev;610 struct pci_dev *pdev = to_pci_dev(isp->dev);
623 u32 irq;611 u32 irq;
624 unsigned long flags;612 unsigned long flags;
625 613
@@ -635,11 +623,11 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) · 9 unmodified lines
635 * So, here we need to check if there is any pending623 * So, here we need to check if there is any pending
636 * IRQ, if so, waiting for it to be served624 * IRQ, if so, waiting for it to be served
637 */625 */
638 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);626 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
639 irq = irq & 1 << INTR_IIR;627 irq = irq & 1 << INTR_IIR;
640 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);628 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
641 629
642 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);630 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
643 if (!(irq & (1 << INTR_IIR)))631 if (!(irq & (1 << INTR_IIR)))
644 goto done;632 goto done;
645 633
@@ -652,11 +640,11 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) · 6 unmodified lines
652 spin_unlock_irqrestore(&isp->lock, flags);640 spin_unlock_irqrestore(&isp->lock, flags);
653 return -EAGAIN;641 return -EAGAIN;
654 } else {642 } else {
655 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);643 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
656 irq = irq & 1 << INTR_IIR;644 irq = irq & 1 << INTR_IIR;
657 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);645 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
658 646
659 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);647 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
660 if (!(irq & (1 << INTR_IIR))) {648 if (!(irq & (1 << INTR_IIR))) {
661 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);649 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
662 goto done;650 goto done;
@@ -675,11 +663,11 @@ done: · 12 unmodified lines
675 * to IIR. It could block subsequent interrupt messages.663 * to IIR. It could block subsequent interrupt messages.
676 * HW sighting:4568410.664 * HW sighting:4568410.
677 */665 */
678 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);666 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
679 irq &= ~(1 << INTR_IER);667 irq &= ~(1 << INTR_IER);
680 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);668 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
681 669
682 atomisp_msi_irq_uninit(isp, dev);670 atomisp_msi_irq_uninit(isp);
683 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);671 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
684 spin_unlock_irqrestore(&isp->lock, flags);672 spin_unlock_irqrestore(&isp->lock, flags);
685 673
@@ -755,7 +743,7 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) · 69 unmodified lines
755 743
756 /* Wait until ISPSSPM0 bit[25:24] shows the right value */744 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
757 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);745 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
758 tmp = (tmp & MRFLD_ISPSSPM0_ISPSSC_MASK) >> MRFLD_ISPSSPM0_ISPSSS_OFFSET;746 tmp = (tmp >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) & MRFLD_ISPSSPM0_ISPSSC_MASK;
759 if (tmp == val) {747 if (tmp == val) {
760 trace_ipu_cstate(enable);748 trace_ipu_cstate(enable);
761 return 0;749 return 0;
@@ -778,15 +766,13 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) · 16 unmodified lines
778/* Workaround for pmu_nc_set_power_state not ready in MRFLD */766/* Workaround for pmu_nc_set_power_state not ready in MRFLD */
779int atomisp_mrfld_power_down(struct atomisp_device *isp)767int atomisp_mrfld_power_down(struct atomisp_device *isp)
780{768{
781// FIXME: at least with ISP2401, enabling this code causes the driver to break769 return atomisp_mrfld_power(isp, false);
782 return 0 && atomisp_mrfld_power(isp, false);
783}770}
784 771
785/* Workaround for pmu_nc_set_power_state not ready in MRFLD */772/* Workaround for pmu_nc_set_power_state not ready in MRFLD */
786int atomisp_mrfld_power_up(struct atomisp_device *isp)773int atomisp_mrfld_power_up(struct atomisp_device *isp)
787{774{
788// FIXME: at least with ISP2401, enabling this code causes the driver to break775 return atomisp_mrfld_power(isp, true);
789 return 0 && atomisp_mrfld_power(isp, true);
790}776}
791 777
792int atomisp_runtime_suspend(struct device *dev)778int atomisp_runtime_suspend(struct device *dev)
@@ -902,6 +888,7 @@ static int __maybe_unused atomisp_resume(struct device *dev) · 109 unmodified lines
902 888
903int atomisp_csi_lane_config(struct atomisp_device *isp)889int atomisp_csi_lane_config(struct atomisp_device *isp)
904{890{
891 struct pci_dev *pdev = to_pci_dev(isp->dev);
905 static const struct {892 static const struct {
906 u8 code;893 u8 code;
907 u8 lanes[MRFLD_PORT_NUM];894 u8 lanes[MRFLD_PORT_NUM];
@@ -1003,7 +990,7 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) · 95 unmodified lines
1003 return -EINVAL;990 return -EINVAL;
1004 }991 }
1005 992
1006 pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);993 pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
1007 csi_control &= ~port_config_mask;994 csi_control &= ~port_config_mask;
1008 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)995 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
1009 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))996 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
@@ -1013,7 +1000,7 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) · 3 unmodified lines
1013 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)1000 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
1014 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);1001 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
1015 1002
1016 pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);1003 pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1017 1004
1018 dev_dbg(isp->dev,1005 dev_dbg(isp->dev,
1019 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",1006 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
@@ -1440,8 +1427,7 @@ atomisp_load_firmware(struct atomisp_device *isp) · 420 unmodified lines
1440 * Check for flags the driver was compiled with against the PCI1427 * Check for flags the driver was compiled with against the PCI
1441 * device. Always returns true on other than ISP 2400.1428 * device. Always returns true on other than ISP 2400.
1442 */1429 */
1443static bool is_valid_device(struct pci_dev *dev,1430static bool is_valid_device(struct pci_dev *pdev, const struct pci_device_id *id)
1444 const struct pci_device_id *id)
1445{1431{
1446 unsigned int a0_max_id = 0;1432 unsigned int a0_max_id = 0;
1447 const char *name;1433 const char *name;
@@ -1465,14 +1451,14 @@ static bool is_valid_device(struct pci_dev *dev, · 17 unmodified lines
1465 name = "Cherrytrail";1451 name = "Cherrytrail";
1466 break;1452 break;
1467 default:1453 default:
1468 dev_err(&dev->dev, "%s: unknown device ID %x04:%x04\n",1454 dev_err(&pdev->dev, "%s: unknown device ID %x04:%x04\n",
1469 product, id->vendor, id->device);1455 product, id->vendor, id->device);
1470 return false;1456 return false;
1471 }1457 }
1472 1458
1473 if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {1459 if (pdev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1474 dev_err(&dev->dev, "%s revision %d is not unsupported\n",1460 dev_err(&pdev->dev, "%s revision %d is not unsupported\n",
1475 name, dev->revision);1461 name, pdev->revision);
1476 return false;1462 return false;
1477 }1463 }
1478 1464
@@ -1483,22 +1469,20 @@ static bool is_valid_device(struct pci_dev *dev, · 4 unmodified lines
1483 1469
1484#if defined(ISP2400)1470#if defined(ISP2400)
1485 if (IS_ISP2401) {1471 if (IS_ISP2401) {
1486 dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n",1472 dev_err(&pdev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1487 name);1473 name);
1488 return false;1474 return false;
1489 }1475 }
1490#else1476#else
1491 if (!IS_ISP2401) {1477 if (!IS_ISP2401) {
1492 dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n",1478 dev_err(&pdev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1493 name);1479 name);
1494 return false;1480 return false;
1495 }1481 }
1496#endif1482#endif
1497 1483
1498 dev_info(&dev->dev, "Detected %s version %d (ISP240%c) on %s\n",1484 dev_info(&pdev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1499 name, dev->revision,1485 name, pdev->revision, IS_ISP2401 ? '1' : '0', product);
1500 IS_ISP2401 ? '1' : '0',
1501 product);
1502 1486
1503 return true;1487 return true;
1504}1488}
@@ -1538,66 +1522,60 @@ alloc_fail: · 33 unmodified lines
1538 1522
1539#define ATOM_ISP_PCI_BAR 01523#define ATOM_ISP_PCI_BAR 0
1540 1524
1541static int atomisp_pci_probe(struct pci_dev *dev,1525static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1542 const struct pci_device_id *id)
1543{1526{
1544 const struct atomisp_platform_data *pdata;1527 const struct atomisp_platform_data *pdata;
1545 struct atomisp_device *isp;1528 struct atomisp_device *isp;
1546 unsigned int start;1529 unsigned int start;
1547 void __iomem *base;
1548 int err, val;1530 int err, val;
1549 u32 irq;1531 u32 irq;
1550 1532
1551 if (!is_valid_device(dev, id))1533 if (!is_valid_device(pdev, id))
1552 return -ENODEV;1534 return -ENODEV;
1553 1535
1554 /* Pointer to struct device. */1536 /* Pointer to struct device. */
1555 atomisp_dev = &dev->dev;1537 atomisp_dev = &pdev->dev;
1556 1538
1557 pdata = atomisp_get_platform_data();1539 pdata = atomisp_get_platform_data();
1558 if (!pdata)1540 if (!pdata)
1559 dev_warn(&dev->dev, "no platform data available\n");1541 dev_warn(&pdev->dev, "no platform data available\n");
1560 1542
1561 err = pcim_enable_device(dev);1543 err = pcim_enable_device(pdev);
1562 if (err) {1544 if (err) {
1563 dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",1545 dev_err(&pdev->dev, "Failed to enable CI ISP device (%d)\n", err);
1564 err);
1565 return err;1546 return err;
1566 }1547 }
1567 1548
1568 start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);1549 start = pci_resource_start(pdev, ATOM_ISP_PCI_BAR);
1569 dev_dbg(&dev->dev, "start: 0x%x\n", start);1550 dev_dbg(&pdev->dev, "start: 0x%x\n", start);
1570 1551
1571 err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));1552 err = pcim_iomap_regions(pdev, 1 << ATOM_ISP_PCI_BAR, pci_name(pdev));
1572 if (err) {1553 if (err) {
1573 dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",1554 dev_err(&pdev->dev, "Failed to I/O memory remapping (%d)\n", err);
1574 err);
1575 goto ioremap_fail;1555 goto ioremap_fail;
1576 }1556 }
1577 1557
1578 base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];1558 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
1579 dev_dbg(&dev->dev, "base: %p\n", base);
1580
1581 atomisp_io_base = base;
1582
1583 dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1584
1585 isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1586 if (!isp) {1559 if (!isp) {
1587 err = -ENOMEM;1560 err = -ENOMEM;
1588 goto atomisp_dev_alloc_fail;1561 goto atomisp_dev_alloc_fail;
1589 }1562 }
1590 isp->pdev = dev;1563
1591 isp->dev = &dev->dev;1564 isp->dev = &pdev->dev;
1565 isp->base = pcim_iomap_table(pdev)[ATOM_ISP_PCI_BAR];
1592 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;1566 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
1593 isp->saved_regs.ispmmadr = start;1567 isp->saved_regs.ispmmadr = start;
1594 1568
1569 dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base);
1570
1595 rt_mutex_init(&isp->mutex);1571 rt_mutex_init(&isp->mutex);
1596 mutex_init(&isp->streamoff_mutex);1572 mutex_init(&isp->streamoff_mutex);
1597 spin_lock_init(&isp->lock);1573 spin_lock_init(&isp->lock);
1598 1574
1599 /* This is not a true PCI device on SoC, so the delay is not needed. */1575 /* This is not a true PCI device on SoC, so the delay is not needed. */
1600 isp->pdev->d3_delay = 0;1576 pdev->d3_delay = 0;
1577
1578 pci_set_drvdata(pdev, isp);
1601 1579
1602 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {1580 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
1603 case ATOMISP_PCI_DEVICE_SOC_MRFLD:1581 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
@@ -1648,15 +1626,14 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 44 unmodified lines
1648 * have specs yet for exactly how it varies. Default to1626 * have specs yet for exactly how it varies. Default to
1649 * BYT-CR but let provisioning set it via EFI variable1627 * BYT-CR but let provisioning set it via EFI variable
1650 */1628 */
1651 isp->hpll_freq = gmin_get_var_int(&dev->dev, false, "HpllFreq",1629 isp->hpll_freq = gmin_get_var_int(&pdev->dev, false, "HpllFreq", HPLL_FREQ_2000MHZ);
1652 HPLL_FREQ_2000MHZ);
1653 1630
1654 /*1631 /*
1655 * for BYT/CHT we are put isp into D3cold to avoid pci registers access1632 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
1656 * in power off. Set d3cold_delay to 0 since default 100ms is not1633 * in power off. Set d3cold_delay to 0 since default 100ms is not
1657 * necessary.1634 * necessary.
1658 */1635 */
1659 isp->pdev->d3cold_delay = 0;1636 pdev->d3cold_delay = 0;
1660 break;1637 break;
1661 case ATOMISP_PCI_DEVICE_SOC_ANN:1638 case ATOMISP_PCI_DEVICE_SOC_ANN:
1662 isp->media_dev.hw_revision = (1639 isp->media_dev.hw_revision = (
@@ -1666,7 +1643,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 3 unmodified lines
1666 ATOMISP_HW_REVISION_ISP2401_LEGACY1643 ATOMISP_HW_REVISION_ISP2401_LEGACY
1667#endif1644#endif
1668 << ATOMISP_HW_REVISION_SHIFT);1645 << ATOMISP_HW_REVISION_SHIFT);
1669 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?1646 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1670 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;1647 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1671 isp->dfs = &dfs_config_merr;1648 isp->dfs = &dfs_config_merr;
1672 isp->hpll_freq = HPLL_FREQ_1600MHZ;1649 isp->hpll_freq = HPLL_FREQ_1600MHZ;
@@ -1679,13 +1656,13 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
1679 ATOMISP_HW_REVISION_ISP2401_LEGACY1656 ATOMISP_HW_REVISION_ISP2401_LEGACY
1680#endif1657#endif
1681 << ATOMISP_HW_REVISION_SHIFT);1658 << ATOMISP_HW_REVISION_SHIFT);
1682 isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?1659 isp->media_dev.hw_revision |= pdev->revision < 2 ?
1683 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;1660 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
1684 1661
1685 isp->dfs = &dfs_config_cht;1662 isp->dfs = &dfs_config_cht;
1686 isp->pdev->d3cold_delay = 0;1663 pdev->d3cold_delay = 0;
1687 1664
1688 iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);1665 iosf_mbi_read(BT_MBI_UNIT_CCK, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1689 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {1666 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
1690 case 0x00:1667 case 0x00:
1691 isp->hpll_freq = HPLL_FREQ_800MHZ;1668 isp->hpll_freq = HPLL_FREQ_800MHZ;
@@ -1698,18 +1675,16 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
1698 break;1675 break;
1699 default:1676 default:
1700 isp->hpll_freq = HPLL_FREQ_1600MHZ;1677 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1701 dev_warn(isp->dev,1678 dev_warn(&pdev->dev, "read HPLL from cck failed. Default to 1600 MHz.\n");
1702 "read HPLL from cck failed. Default to 1600 MHz.\n");
1703 }1679 }
1704 break;1680 break;
1705 default:1681 default:
1706 dev_err(&dev->dev, "un-supported IUNIT device\n");1682 dev_err(&pdev->dev, "un-supported IUNIT device\n");
1707 err = -ENODEV;1683 err = -ENODEV;
1708 goto atomisp_dev_alloc_fail;1684 goto atomisp_dev_alloc_fail;
1709 }1685 }
1710 1686
1711 dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",1687 dev_info(&pdev->dev, "ISP HPLL frequency base = %d MHz\n", isp->hpll_freq);
1712 isp->hpll_freq);
1713 1688
1714 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;1689 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
1715 1690
@@ -1718,30 +1693,28 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 2 unmodified lines
1718 isp->firmware = atomisp_load_firmware(isp);1693 isp->firmware = atomisp_load_firmware(isp);
1719 if (!isp->firmware) {1694 if (!isp->firmware) {
1720 err = -ENOENT;1695 err = -ENOENT;
1721 dev_dbg(&dev->dev, "Firmware load failed\n");1696 dev_dbg(&pdev->dev, "Firmware load failed\n");
1722 goto load_fw_fail;1697 goto load_fw_fail;
1723 }1698 }
1724 1699
1725 err = sh_css_check_firmware_version(isp->dev,1700 err = sh_css_check_firmware_version(isp->dev, isp->firmware->data);
1726 isp->firmware->data);
1727 if (err) {1701 if (err) {
1728 dev_dbg(&dev->dev, "Firmware version check failed\n");1702 dev_dbg(&pdev->dev, "Firmware version check failed\n");
1729 goto fw_validation_fail;1703 goto fw_validation_fail;
1730 }1704 }
1731 } else {1705 } else {
1732 dev_info(&dev->dev, "Firmware load will be deferred\n");1706 dev_info(&pdev->dev, "Firmware load will be deferred\n");
1733 }1707 }
1734 1708
1735 pci_set_master(dev);1709 pci_set_master(pdev);
1736 pci_set_drvdata(dev, isp);
1737 1710
1738 err = pci_enable_msi(dev);1711 err = pci_enable_msi(pdev);
1739 if (err) {1712 if (err) {
1740 dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);1713 dev_err(&pdev->dev, "Failed to enable msi (%d)\n", err);
1741 goto enable_msi_fail;1714 goto enable_msi_fail;
1742 }1715 }
1743 1716
1744 atomisp_msi_irq_init(isp, dev);1717 atomisp_msi_irq_init(isp);
1745 1718
1746 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);1719 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
1747 1720
@@ -1762,8 +1735,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 14 unmodified lines
1762 * Workaround for imbalance data eye issue which is observed1735 * Workaround for imbalance data eye issue which is observed
1763 * on TNG B0.1736 * on TNG B0.
1764 */1737 */
1765 pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,1738 pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &csi_afe_trim);
1766 &csi_afe_trim);
1767 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<1739 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
1768 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |1740 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
1769 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<1741 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
@@ -1776,20 +1748,18 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
1776 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |1748 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
1777 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<1749 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
1778 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);1750 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1779 pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,1751 pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim);
1780 csi_afe_trim);
1781 }1752 }
1782 1753
1783 err = atomisp_initialize_modules(isp);1754 err = atomisp_initialize_modules(isp);
1784 if (err < 0) {1755 if (err < 0) {
1785 dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);1756 dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err);
1786 goto initialize_modules_fail;1757 goto initialize_modules_fail;
1787 }1758 }
1788 1759
1789 err = atomisp_register_entities(isp);1760 err = atomisp_register_entities(isp);
1790 if (err < 0) {1761 if (err < 0) {
1791 dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",1762 dev_err(&pdev->dev, "atomisp_register_entities failed (%d)\n", err);
1792 err);
1793 goto register_entities_fail;1763 goto register_entities_fail;
1794 }1764 }
1795 err = atomisp_create_pads_links(isp);1765 err = atomisp_create_pads_links(isp);
@@ -1802,24 +1772,24 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
1802 /* save the iunit context only once after all the values are init'ed. */1772 /* save the iunit context only once after all the values are init'ed. */
1803 atomisp_save_iunit_reg(isp);1773 atomisp_save_iunit_reg(isp);
1804 1774
1805 pm_runtime_put_noidle(&dev->dev);1775 pm_runtime_put_noidle(&pdev->dev);
1806 pm_runtime_allow(&dev->dev);1776 pm_runtime_allow(&pdev->dev);
1807 1777
1808 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);1778 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
1809 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);1779 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
1810 if (err) {1780 if (err) {
1811 dev_err(&dev->dev, "Failed to register reserved memory pool.\n");1781 dev_err(&pdev->dev, "Failed to register reserved memory pool.\n");
1812 goto hmm_pool_fail;1782 goto hmm_pool_fail;
1813 }1783 }
1814 1784
1815 /* Init ISP memory management */1785 /* Init ISP memory management */
1816 hmm_init();1786 hmm_init();
1817 1787
1818 err = devm_request_threaded_irq(&dev->dev, dev->irq,1788 err = devm_request_threaded_irq(&pdev->dev, pdev->irq,
1819 atomisp_isr, atomisp_isr_thread,1789 atomisp_isr, atomisp_isr_thread,
1820 IRQF_SHARED, "isp_irq", isp);1790 IRQF_SHARED, "isp_irq", isp);
1821 if (err) {1791 if (err) {
1822 dev_err(&dev->dev, "Failed to request irq (%d)\n", err);1792 dev_err(&pdev->dev, "Failed to request irq (%d)\n", err);
1823 goto request_irq_fail;1793 goto request_irq_fail;
1824 }1794 }
1825 1795
@@ -1827,23 +1797,23 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 1 unmodified line
1827 if (!defer_fw_load) {1797 if (!defer_fw_load) {
1828 err = atomisp_css_load_firmware(isp);1798 err = atomisp_css_load_firmware(isp);
1829 if (err) {1799 if (err) {
1830 dev_err(&dev->dev, "Failed to init css.\n");1800 dev_err(&pdev->dev, "Failed to init css.\n");
1831 goto css_init_fail;1801 goto css_init_fail;
1832 }1802 }
1833 } else {1803 } else {
1834 dev_dbg(&dev->dev, "Skip css init.\n");1804 dev_dbg(&pdev->dev, "Skip css init.\n");
1835 }1805 }
1836 /* Clear FW image from memory */1806 /* Clear FW image from memory */
1837 release_firmware(isp->firmware);1807 release_firmware(isp->firmware);
1838 isp->firmware = NULL;1808 isp->firmware = NULL;
1839 isp->css_env.isp_css_fw.data = NULL;1809 isp->css_env.isp_css_fw.data = NULL;
1840 1810
1841 atomisp_drvfs_init(&dev->driver->driver, isp);1811 atomisp_drvfs_init(isp);
1842 1812
1843 return 0;1813 return 0;
1844 1814
1845css_init_fail:1815css_init_fail:
1846 devm_free_irq(&dev->dev, dev->irq, isp);1816 devm_free_irq(&pdev->dev, pdev->irq, isp);
1847request_irq_fail:1817request_irq_fail:
1848 hmm_cleanup();1818 hmm_cleanup();
1849 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);1819 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
@@ -1856,8 +1826,8 @@ register_entities_fail: · 6 unmodified lines
1856 atomisp_uninitialize_modules(isp);1826 atomisp_uninitialize_modules(isp);
1857initialize_modules_fail:1827initialize_modules_fail:
1858 cpu_latency_qos_remove_request(&isp->pm_qos);1828 cpu_latency_qos_remove_request(&isp->pm_qos);
1859 atomisp_msi_irq_uninit(isp, dev);1829 atomisp_msi_irq_uninit(isp);
1860 pci_disable_msi(dev);1830 pci_disable_msi(pdev);
1861enable_msi_fail:1831enable_msi_fail:
1862fw_validation_fail:1832fw_validation_fail:
1863 release_firmware(isp->firmware);1833 release_firmware(isp->firmware);
@@ -1869,35 +1839,34 @@ load_fw_fail: · 5 unmodified lines
1869 * The following lines have been copied from atomisp suspend path1839 * The following lines have been copied from atomisp suspend path
1870 */1840 */
1871 1841
1872 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);1842 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1873 irq = irq & 1 << INTR_IIR;1843 irq = irq & 1 << INTR_IIR;
1874 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);1844 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1875 1845
1876 pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);1846 pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
1877 irq &= ~(1 << INTR_IER);1847 irq &= ~(1 << INTR_IER);
1878 pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);1848 pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
1879 1849
1880 atomisp_msi_irq_uninit(isp, dev);1850 atomisp_msi_irq_uninit(isp);
1881 1851
1882 atomisp_ospm_dphy_down(isp);1852 atomisp_ospm_dphy_down(isp);
1883 1853
1884 /* Address later when we worry about the ...field chips */1854 /* Address later when we worry about the ...field chips */
1885 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))1855 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1886 dev_err(&dev->dev, "Failed to switch off ISP\n");1856 dev_err(&pdev->dev, "Failed to switch off ISP\n");
1887 1857
1888atomisp_dev_alloc_fail:1858atomisp_dev_alloc_fail:
1889 pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR);1859 pcim_iounmap_regions(pdev, 1 << ATOM_ISP_PCI_BAR);
1890 1860
1891ioremap_fail:1861ioremap_fail:
1892 return err;1862 return err;
1893}1863}
1894 1864
1895static void atomisp_pci_remove(struct pci_dev *dev)1865static void atomisp_pci_remove(struct pci_dev *pdev)
1896{1866{
1897 struct atomisp_device *isp = (struct atomisp_device *)1867 struct atomisp_device *isp = pci_get_drvdata(pdev);
1898 pci_get_drvdata(dev);
1899 1868
1900 dev_info(&dev->dev, "Removing atomisp driver\n");1869 dev_info(&pdev->dev, "Removing atomisp driver\n");
1901 1870
1902 atomisp_drvfs_exit();1871 atomisp_drvfs_exit();
1903 1872
@@ -1906,11 +1875,11 @@ static void atomisp_pci_remove(struct pci_dev *dev) · 2 unmodified lines
1906 ia_css_unload_firmware();1875 ia_css_unload_firmware();
1907 hmm_cleanup();1876 hmm_cleanup();
1908 1877
1909 pm_runtime_forbid(&dev->dev);1878 pm_runtime_forbid(&pdev->dev);
1910 pm_runtime_get_noresume(&dev->dev);1879 pm_runtime_get_noresume(&pdev->dev);
1911 cpu_latency_qos_remove_request(&isp->pm_qos);1880 cpu_latency_qos_remove_request(&isp->pm_qos);
1912 1881
1913 atomisp_msi_irq_uninit(isp, dev);1882 atomisp_msi_irq_uninit(isp);
1914 atomisp_unregister_entities(isp);1883 atomisp_unregister_entities(isp);
1915 1884
1916 destroy_workqueue(isp->wdt_work_queue);1885 destroy_workqueue(isp->wdt_work_queue);
drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c+14−14
@@ -48,7 +48,7 @@ static struct ia_css_refcount_entry *refcount_find_entry(ia_css_ptr ptr, · 47 unmodified lines
48 return NULL;48 return NULL;
49 if (!myrefcount.items) {49 if (!myrefcount.items) {
50 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,50 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
51 "refcount_find_entry(): Ref count not initialized!\n");51 "%s(): Ref count not initialized!\n", __func__);
52 return NULL;52 return NULL;
53 }53 }
54 54
@@ -73,12 +73,12 @@ int ia_css_refcount_init(uint32_t size) · 18 unmodified lines
73 73
74 if (size == 0) {74 if (size == 0) {
75 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,75 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
76 "ia_css_refcount_init(): Size of 0 for Ref count init!\n");76 "%s(): Size of 0 for Ref count init!\n", __func__);
77 return -EINVAL;77 return -EINVAL;
78 }78 }
79 if (myrefcount.items) {79 if (myrefcount.items) {
80 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,80 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
81 "ia_css_refcount_init(): Ref count is already initialized\n");81 "%s(): Ref count is already initialized\n", __func__);
82 return -EINVAL;82 return -EINVAL;
83 }83 }
84 myrefcount.items =84 myrefcount.items =
@@ -99,7 +99,7 @@ void ia_css_refcount_uninit(void) · 14 unmodified lines
99 u32 i;99 u32 i;
100 100
101 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,101 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
102 "ia_css_refcount_uninit() entry\n");102 "%s() entry\n", __func__);
103 for (i = 0; i < myrefcount.size; i++) {103 for (i = 0; i < myrefcount.size; i++) {
104 /* driver verifier tool has issues with &arr[i]104 /* driver verifier tool has issues with &arr[i]
105 and prefers arr + i; as these are actually equivalent105 and prefers arr + i; as these are actually equivalent
@@ -120,7 +120,7 @@ void ia_css_refcount_uninit(void) · 14 unmodified lines
120 myrefcount.items = NULL;120 myrefcount.items = NULL;
121 myrefcount.size = 0;121 myrefcount.size = 0;
122 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,122 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
123 "ia_css_refcount_uninit() leave\n");123 "%s() leave\n", __func__);
124}124}
125 125
126ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr)126ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr)
@@ -133,7 +133,7 @@ ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr) · 6 unmodified lines
133 entry = refcount_find_entry(ptr, false);133 entry = refcount_find_entry(ptr, false);
134 134
135 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,135 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
136 "ia_css_refcount_increment(%x) 0x%x\n", id, ptr);136 "%s(%x) 0x%x\n", __func__, id, ptr);
137 137
138 if (!entry) {138 if (!entry) {
139 entry = refcount_find_entry(ptr, true);139 entry = refcount_find_entry(ptr, true);
@@ -145,7 +145,7 @@ ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr) · 5 unmodified lines
145 145
146 if (entry->id != id) {146 if (entry->id != id) {
147 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,147 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
148 "ia_css_refcount_increment(): Ref count IDS do not match!\n");148 "%s(): Ref count IDS do not match!\n", __func__);
149 return mmgr_NULL;149 return mmgr_NULL;
150 }150 }
151 151
@@ -165,7 +165,7 @@ bool ia_css_refcount_decrement(s32 id, ia_css_ptr ptr) · 13 unmodified lines
165 struct ia_css_refcount_entry *entry;165 struct ia_css_refcount_entry *entry;
166 166
167 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,167 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
168 "ia_css_refcount_decrement(%x) 0x%x\n", id, ptr);168 "%s(%x) 0x%x\n", __func__, id, ptr);
169 169
170 if (ptr == mmgr_NULL)170 if (ptr == mmgr_NULL)
171 return false;171 return false;
@@ -175,7 +175,7 @@ bool ia_css_refcount_decrement(s32 id, ia_css_ptr ptr) · 3 unmodified lines
175 if (entry) {175 if (entry) {
176 if (entry->id != id) {176 if (entry->id != id) {
177 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,177 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
178 "ia_css_refcount_decrement(): Ref count IDS do not match!\n");178 "%s(): Ref count IDS do not match!\n", __func__);
179 return false;179 return false;
180 }180 }
181 if (entry->count > 0) {181 if (entry->count > 0) {
@@ -225,8 +225,8 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 43 unmodified lines
225 u32 count = 0;225 u32 count = 0;
226 226
227 assert(clear_func_ptr);227 assert(clear_func_ptr);
228 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_clear(%x)\n",228 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s(%x)\n",
229 id);229 __func__, id);
230 230
231 for (i = 0; i < myrefcount.size; i++) {231 for (i = 0; i < myrefcount.size; i++) {
232 /* driver verifier tool has issues with &arr[i]232 /* driver verifier tool has issues with &arr[i]
@@ -236,14 +236,14 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 3 unmodified lines
236 entry = myrefcount.items + i;236 entry = myrefcount.items + i;
237 if ((entry->data != mmgr_NULL) && (entry->id == id)) {237 if ((entry->data != mmgr_NULL) && (entry->id == id)) {
238 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,238 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
239 "ia_css_refcount_clear: %x: 0x%x\n",239 "%s: %x: 0x%x\n", __func__,
240 id, entry->data);240 id, entry->data);
241 if (clear_func_ptr) {241 if (clear_func_ptr) {
242 /* clear using provided function */242 /* clear using provided function */
243 clear_func_ptr(entry->data);243 clear_func_ptr(entry->data);
244 } else {244 } else {
245 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,245 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
246 "ia_css_refcount_clear: using hmm_free: no clear_func\n");246 "%s: using hmm_free: no clear_func\n", __func__);
247 hmm_free(entry->data);247 hmm_free(entry->data);
248 }248 }
249 249
@@ -260,7 +260,7 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 10 unmodified lines
260 }260 }
261 }261 }
262 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,262 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
263 "ia_css_refcount_clear(%x): cleared %d\n", id,263 "%s(%x): cleared %d\n", __func__, id,
264 count);264 count);
265}265}
266 266
drivers/staging/media/atomisp/pci/hive_types.h+3−21
@@ -52,32 +52,14 @@ typedef unsigned short hive_uint16; · 51 unmodified lines
52typedef unsigned int hive_uint32;52typedef unsigned int hive_uint32;
53typedef unsigned long long hive_uint64;53typedef unsigned long long hive_uint64;
54 54
55/* by default assume 32 bit master port (both data and address) */55#define HRT_DATA_WIDTH 32
56#ifndef HRT_DATA_WIDTH56#define HRT_ADDRESS_WIDTH 64
57#define HRT_DATA_WIDTH 32
58#endif
59#ifndef HRT_ADDRESS_WIDTH
60#define HRT_ADDRESS_WIDTH 32
61#endif
62
63#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8)57#define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8)
64#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8)58#define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8)
59#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
65 60
66#if HRT_DATA_WIDTH == 64
67typedef hive_uint64 hrt_data;
68#elif HRT_DATA_WIDTH == 32
69typedef hive_uint32 hrt_data;61typedef hive_uint32 hrt_data;
70#else
71#error data width not supported
72#endif
73
74#if HRT_ADDRESS_WIDTH == 64
75typedef hive_uint64 hrt_address;62typedef hive_uint64 hrt_address;
76#elif HRT_ADDRESS_WIDTH == 32
77typedef hive_uint32 hrt_address;
78#else
79#error adddres width not supported
80#endif
81 63
82/* use 64 bit addresses in simulation, where possible */64/* use 64 bit addresses in simulation, where possible */
83typedef hive_uint64 hive_sim_address;65typedef hive_uint64 hive_sim_address;
drivers/staging/media/atomisp/pci/hmm/hmm.c+5−5
@@ -735,11 +735,11 @@ ia_css_ptr hmm_host_vaddr_to_hrt_vaddr(const void *ptr) · 734 unmodified lines
735 735
736void hmm_show_mem_stat(const char *func, const int line)736void hmm_show_mem_stat(const char *func, const int line)
737{737{
738 trace_printk("tol_cnt=%d usr_size=%d res_size=%d res_cnt=%d sys_size=%d dyc_thr=%d dyc_size=%d.\n",738 pr_info("tol_cnt=%d usr_size=%d res_size=%d res_cnt=%d sys_size=%d dyc_thr=%d dyc_size=%d.\n",
739 hmm_mem_stat.tol_cnt,739 hmm_mem_stat.tol_cnt,
740 hmm_mem_stat.usr_size, hmm_mem_stat.res_size,740 hmm_mem_stat.usr_size, hmm_mem_stat.res_size,
741 hmm_mem_stat.res_cnt, hmm_mem_stat.sys_size,741 hmm_mem_stat.res_cnt, hmm_mem_stat.sys_size,
742 hmm_mem_stat.dyc_thr, hmm_mem_stat.dyc_size);742 hmm_mem_stat.dyc_thr, hmm_mem_stat.dyc_size);
743}743}
744 744
745void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr)745void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr)
drivers/staging/media/atomisp/pci/isp2400_system_global.h+0−302
@@ -13,306 +13,4 @@ · 12 unmodified lines
13 * more details.13 * more details.
14 */14 */
15 15
16#ifndef __SYSTEM_GLOBAL_H_INCLUDED__
17#define __SYSTEM_GLOBAL_H_INCLUDED__
18
19#include <hive_isp_css_defs.h>
20#include <type_support.h>
21
22/*
23 * The longest allowed (uninteruptible) bus transfer, does not
24 * take stalling into account
25 */
26#define HIVE_ISP_MAX_BURST_LENGTH 1024
27
28/*
29 * Maximum allowed burst length in words for the ISP DMA
30 */
31#define ISP_DMA_MAX_BURST_LENGTH 128
32
33/*
34 * Create a list of HAS and IS properties that defines the system
35 *
36 * The configuration assumes the following
37 * - The system is hetereogeneous; Multiple cells and devices classes
38 * - The cell and device instances are homogeneous, each device type
39 * belongs to the same class
40 * - Device instances supporting a subset of the class capabilities are
41 * allowed
42 *
43 * We could manage different device classes through the enumerated
44 * lists (C) or the use of classes (C++), but that is presently not
45 * fully supported
46 *
47 * N.B. the 3 input formatters are of 2 different classess
48 */
49
50#define USE_INPUT_SYSTEM_VERSION_216#define USE_INPUT_SYSTEM_VERSION_2
51
52#define HAS_MMU_VERSION_2
53#define HAS_DMA_VERSION_2
54#define HAS_GDC_VERSION_2
55#define HAS_VAMEM_VERSION_2
56#define HAS_HMEM_VERSION_1
57#define HAS_BAMEM_VERSION_2
58#define HAS_IRQ_VERSION_2
59#define HAS_IRQ_MAP_VERSION_2
60#define HAS_INPUT_FORMATTER_VERSION_2
61/* 2401: HAS_INPUT_SYSTEM_VERSION_2401 */
62#define HAS_INPUT_SYSTEM_VERSION_2
63#define HAS_BUFFERED_SENSOR
64#define HAS_FIFO_MONITORS_VERSION_2
65/* #define HAS_GP_REGS_VERSION_2 */
66#define HAS_GP_DEVICE_VERSION_2
67#define HAS_GPIO_VERSION_1
68#define HAS_TIMED_CTRL_VERSION_1
69#define HAS_RX_VERSION_2
70
71#define DMA_DDR_TO_VAMEM_WORKAROUND
72#define DMA_DDR_TO_HMEM_WORKAROUND
73
74/*
75 * Semi global. "HRT" is accessible from SP, but the HRT types do not fully apply
76 */
77#define HRT_VADDRESS_WIDTH 32
78//#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property*/
79#define HRT_DATA_WIDTH 32
80
81#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
82#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8)
83
84/* The main bus connecting all devices */
85#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH
86#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES
87
88/* per-frame parameter handling support */
89#define SH_CSS_ENABLE_PER_FRAME_PARAMS
90
91typedef u32 hrt_bus_align_t;
92
93/*
94 * Enumerate the devices, device access through the API is by ID, through the DLI by address
95 * The enumerator terminators are used to size the wiring arrays and as an exception value.
96 */
97typedef enum {
98 DDR0_ID = 0,
99 N_DDR_ID
100} ddr_ID_t;
101
102typedef enum {
103 ISP0_ID = 0,
104 N_ISP_ID
105} isp_ID_t;
106
107typedef enum {
108 SP0_ID = 0,
109 N_SP_ID
110} sp_ID_t;
111
112typedef enum {
113 MMU0_ID = 0,
114 MMU1_ID,
115 N_MMU_ID
116} mmu_ID_t;
117
118typedef enum {
119 DMA0_ID = 0,
120 N_DMA_ID
121} dma_ID_t;
122
123typedef enum {
124 GDC0_ID = 0,
125 GDC1_ID,
126 N_GDC_ID
127} gdc_ID_t;
128
129#define N_GDC_ID_CPP 2 // this extra define is needed because we want to use it also in the preprocessor, and that doesn't work with enums.
130
131typedef enum {
132 VAMEM0_ID = 0,
133 VAMEM1_ID,
134 VAMEM2_ID,
135 N_VAMEM_ID
136} vamem_ID_t;
137
138typedef enum {
139 BAMEM0_ID = 0,
140 N_BAMEM_ID
141} bamem_ID_t;
142
143typedef enum {
144 HMEM0_ID = 0,
145 N_HMEM_ID
146} hmem_ID_t;
147
148/*
149typedef enum {
150 IRQ0_ID = 0,
151 N_IRQ_ID
152} irq_ID_t;
153*/
154
155typedef enum {
156 IRQ0_ID = 0, // GP IRQ block
157 IRQ1_ID, // Input formatter
158 IRQ2_ID, // input system
159 IRQ3_ID, // input selector
160 N_IRQ_ID
161} irq_ID_t;
162
163typedef enum {
164 FIFO_MONITOR0_ID = 0,
165 N_FIFO_MONITOR_ID
166} fifo_monitor_ID_t;
167
168/*
169 * Deprecated: Since all gp_reg instances are different
170 * and put in the address maps of other devices we cannot
171 * enumerate them as that assumes the instrances are the
172 * same.
173 *
174 * We define a single GP_DEVICE containing all gp_regs
175 * w.r.t. a single base address
176 *
177typedef enum {
178 GP_REGS0_ID = 0,
179 N_GP_REGS_ID
180} gp_regs_ID_t;
181 */
182typedef enum {
183 GP_DEVICE0_ID = 0,
184 N_GP_DEVICE_ID
185} gp_device_ID_t;
186
187typedef enum {
188 GP_TIMER0_ID = 0,
189 GP_TIMER1_ID,
190 GP_TIMER2_ID,
191 GP_TIMER3_ID,
192 GP_TIMER4_ID,
193 GP_TIMER5_ID,
194 GP_TIMER6_ID,
195 GP_TIMER7_ID,
196 N_GP_TIMER_ID
197} gp_timer_ID_t;
198
199typedef enum {
200 GPIO0_ID = 0,
201 N_GPIO_ID
202} gpio_ID_t;
203
204typedef enum {
205 TIMED_CTRL0_ID = 0,
206 N_TIMED_CTRL_ID
207} timed_ctrl_ID_t;
208
209typedef enum {
210 INPUT_FORMATTER0_ID = 0,
211 INPUT_FORMATTER1_ID,
212 INPUT_FORMATTER2_ID,
213 INPUT_FORMATTER3_ID,
214 N_INPUT_FORMATTER_ID
215} input_formatter_ID_t;
216
217/* The IF RST is outside the IF */
218#define INPUT_FORMATTER0_SRST_OFFSET 0x0824
219#define INPUT_FORMATTER1_SRST_OFFSET 0x0624
220#define INPUT_FORMATTER2_SRST_OFFSET 0x0424
221#define INPUT_FORMATTER3_SRST_OFFSET 0x0224
222
223#define INPUT_FORMATTER0_SRST_MASK 0x0001
224#define INPUT_FORMATTER1_SRST_MASK 0x0002
225#define INPUT_FORMATTER2_SRST_MASK 0x0004
226#define INPUT_FORMATTER3_SRST_MASK 0x0008
227
228typedef enum {
229 INPUT_SYSTEM0_ID = 0,
230 N_INPUT_SYSTEM_ID
231} input_system_ID_t;
232
233typedef enum {
234 RX0_ID = 0,
235 N_RX_ID
236} rx_ID_t;
237
238enum mipi_port_id {
239 MIPI_PORT0_ID = 0,
240 MIPI_PORT1_ID,
241 MIPI_PORT2_ID,
242 N_MIPI_PORT_ID
243};
244
245#define N_RX_CHANNEL_ID 4
246
247/* Generic port enumeration with an internal port type ID */
248typedef enum {
249 CSI_PORT0_ID = 0,
250 CSI_PORT1_ID,
251 CSI_PORT2_ID,
252 TPG_PORT0_ID,
253 PRBS_PORT0_ID,
254 FIFO_PORT0_ID,
255 MEMORY_PORT0_ID,
256 N_INPUT_PORT_ID
257} input_port_ID_t;
258
259typedef enum {
260 CAPTURE_UNIT0_ID = 0,
261 CAPTURE_UNIT1_ID,
262 CAPTURE_UNIT2_ID,
263 ACQUISITION_UNIT0_ID,
264 DMA_UNIT0_ID,
265 CTRL_UNIT0_ID,
266 GPREGS_UNIT0_ID,
267 FIFO_UNIT0_ID,
268 IRQ_UNIT0_ID,
269 N_SUB_SYSTEM_ID
270} sub_system_ID_t;
271
272#define N_CAPTURE_UNIT_ID 3
273#define N_ACQUISITION_UNIT_ID 1
274#define N_CTRL_UNIT_ID 1
275
276enum ia_css_isp_memories {
277 IA_CSS_ISP_PMEM0 = 0,
278 IA_CSS_ISP_DMEM0,
279 IA_CSS_ISP_VMEM0,
280 IA_CSS_ISP_VAMEM0,
281 IA_CSS_ISP_VAMEM1,
282 IA_CSS_ISP_VAMEM2,
283 IA_CSS_ISP_HMEM0,
284 IA_CSS_SP_DMEM0,
285 IA_CSS_DDR,
286 N_IA_CSS_MEMORIES
287};
288
289#define IA_CSS_NUM_MEMORIES 9
290/* For driver compatibility */
291#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
292#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
293
294#if 0
295typedef enum {
296 dev_chn, /* device channels, external resource */
297 ext_mem, /* external memories */
298 int_mem, /* internal memories */
299 int_chn /* internal channels, user defined */
300} resource_type_t;
301
302/* if this enum is extended with other memory resources, pls also extend the function resource_to_memptr() */
303typedef enum {
304 vied_nci_dev_chn_dma_ext0,
305 int_mem_vmem0,
306 int_mem_dmem0
307} resource_id_t;
308
309/* enum listing the different memories within a program group.
310 This enum is used in the mem_ptr_t type */
311typedef enum {
312 buf_mem_invalid = 0,
313 buf_mem_vmem_prog0,
314 buf_mem_dmem_prog0
315} buf_mem_t;
316
317#endif
318#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/isp2400_system_local.h+0−321
@@ -1,321 +0,0 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2010-2015, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16#ifndef __SYSTEM_LOCAL_H_INCLUDED__
17#define __SYSTEM_LOCAL_H_INCLUDED__
18
19#ifdef HRT_ISP_CSS_CUSTOM_HOST
20#ifndef HRT_USE_VIR_ADDRS
21#define HRT_USE_VIR_ADDRS
22#endif
23#endif
24
25#include "system_global.h"
26
27/* HRT assumes 32 by default (see Linux/include/hive_types.h), overrule it in case it is different */
28#undef HRT_ADDRESS_WIDTH
29#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */
30
31/* This interface is deprecated */
32#include "hive_types.h"
33
34/*
35 * Cell specific address maps
36 */
37#if HRT_ADDRESS_WIDTH == 64
38
39#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */
40
41/* DDR */
42static const hrt_address DDR_BASE[N_DDR_ID] = {
43 (hrt_address)0x0000000120000000ULL
44};
45
46/* ISP */
47static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
48 (hrt_address)0x0000000000020000ULL
49};
50
51static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
52 (hrt_address)0x0000000000200000ULL
53};
54
55static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
56 (hrt_address)0x0000000000100000ULL
57};
58
59static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
60 (hrt_address)0x00000000001C0000ULL,
61 (hrt_address)0x00000000001D0000ULL,
62 (hrt_address)0x00000000001E0000ULL
63};
64
65static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
66 (hrt_address)0x00000000001F0000ULL
67};
68
69/* SP */
70static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
71 (hrt_address)0x0000000000010000ULL
72};
73
74static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
75 (hrt_address)0x0000000000300000ULL
76};
77
78static const hrt_address SP_PMEM_BASE[N_SP_ID] = {
79 (hrt_address)0x00000000000B0000ULL
80};
81
82/* MMU */
83/*
84 * MMU0_ID: The data MMU
85 * MMU1_ID: The icache MMU
86 */
87static const hrt_address MMU_BASE[N_MMU_ID] = {
88 (hrt_address)0x0000000000070000ULL,
89 (hrt_address)0x00000000000A0000ULL
90};
91
92/* DMA */
93static const hrt_address DMA_BASE[N_DMA_ID] = {
94 (hrt_address)0x0000000000040000ULL
95};
96
97/* IRQ */
98static const hrt_address IRQ_BASE[N_IRQ_ID] = {
99 (hrt_address)0x0000000000000500ULL,
100 (hrt_address)0x0000000000030A00ULL,
101 (hrt_address)0x000000000008C000ULL,
102 (hrt_address)0x0000000000090200ULL
103};
104
105/*
106 (hrt_address)0x0000000000000500ULL};
107 */
108
109/* GDC */
110static const hrt_address GDC_BASE[N_GDC_ID] = {
111 (hrt_address)0x0000000000050000ULL,
112 (hrt_address)0x0000000000060000ULL
113};
114
115/* FIFO_MONITOR (not a subset of GP_DEVICE) */
116static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
117 (hrt_address)0x0000000000000000ULL
118};
119
120/*
121static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
122 (hrt_address)0x0000000000000000ULL};
123
124static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
125 (hrt_address)0x0000000000090000ULL};
126*/
127
128/* GP_DEVICE (single base for all separate GP_REG instances) */
129static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
130 (hrt_address)0x0000000000000000ULL
131};
132
133/*GP TIMER , all timer registers are inter-twined,
134 * so, having multiple base addresses for
135 * different timers does not help*/
136static const hrt_address GP_TIMER_BASE =
137 (hrt_address)0x0000000000000600ULL;
138/* GPIO */
139static const hrt_address GPIO_BASE[N_GPIO_ID] = {
140 (hrt_address)0x0000000000000400ULL
141};
142
143/* TIMED_CTRL */
144static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
145 (hrt_address)0x0000000000000100ULL
146};
147
148/* INPUT_FORMATTER */
149static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
150 (hrt_address)0x0000000000030000ULL,
151 (hrt_address)0x0000000000030200ULL,
152 (hrt_address)0x0000000000030400ULL,
153 (hrt_address)0x0000000000030600ULL
154}; /* memcpy() */
155
156/* INPUT_SYSTEM */
157static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
158 (hrt_address)0x0000000000080000ULL
159};
160
161/* (hrt_address)0x0000000000081000ULL, */ /* capture A */
162/* (hrt_address)0x0000000000082000ULL, */ /* capture B */
163/* (hrt_address)0x0000000000083000ULL, */ /* capture C */
164/* (hrt_address)0x0000000000084000ULL, */ /* Acquisition */
165/* (hrt_address)0x0000000000085000ULL, */ /* DMA */
166/* (hrt_address)0x0000000000089000ULL, */ /* ctrl */
167/* (hrt_address)0x000000000008A000ULL, */ /* GP regs */
168/* (hrt_address)0x000000000008B000ULL, */ /* FIFO */
169/* (hrt_address)0x000000000008C000ULL, */ /* IRQ */
170
171/* RX, the MIPI lane control regs start at offset 0 */
172static const hrt_address RX_BASE[N_RX_ID] = {
173 (hrt_address)0x0000000000080100ULL
174};
175
176#elif HRT_ADDRESS_WIDTH == 32
177
178#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */
179
180/* DDR : Attention, this value not defined in 32-bit */
181static const hrt_address DDR_BASE[N_DDR_ID] = {
182 (hrt_address)0x00000000UL
183};
184
185/* ISP */
186static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
187 (hrt_address)0x00020000UL
188};
189
190static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
191 (hrt_address)0x00200000UL
192};
193
194static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
195 (hrt_address)0x100000UL
196};
197
198static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
199 (hrt_address)0xffffffffUL,
200 (hrt_address)0xffffffffUL,
201 (hrt_address)0xffffffffUL
202};
203
204static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
205 (hrt_address)0xffffffffUL
206};
207
208/* SP */
209static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
210 (hrt_address)0x00010000UL
211};
212
213static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
214 (hrt_address)0x00300000UL
215};
216
217static const hrt_address SP_PMEM_BASE[N_SP_ID] = {
218 (hrt_address)0x000B0000UL
219};
220
221/* MMU */
222/*
223 * MMU0_ID: The data MMU
224 * MMU1_ID: The icache MMU
225 */
226static const hrt_address MMU_BASE[N_MMU_ID] = {
227 (hrt_address)0x00070000UL,
228 (hrt_address)0x000A0000UL
229};
230
231/* DMA */
232static const hrt_address DMA_BASE[N_DMA_ID] = {
233 (hrt_address)0x00040000UL
234};
235
236/* IRQ */
237static const hrt_address IRQ_BASE[N_IRQ_ID] = {
238 (hrt_address)0x00000500UL,
239 (hrt_address)0x00030A00UL,
240 (hrt_address)0x0008C000UL,
241 (hrt_address)0x00090200UL
242};
243
244/*
245 (hrt_address)0x00000500UL};

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