History

Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, geode: add a VSA2 ID for General Software x86: use BOOTMEM_EXCLUSIVE on 32-bit x86, 32-bit: fix boot failure on TSC-less processors x86: fix NULL pointer deref in __switch_to x86: set PAE PHYSICAL_MASK_SHIFT to 44 bits.

Linus Torvalds committed 18 years ago

Commit b1ae8d32 parents 5501792 ffe6e1d7 files · +26 −16Browse files

Unified · Split

7 files
  1. arch/x86/kernel/geode_32.c +4 −1
  2. arch/x86/kernel/process_32.c +1 −0
  3. arch/x86/kernel/process_64.c +1 −0
  4. arch/x86/kernel/setup_32.c +8 −2
  5. arch/x86/kernel/tsc_32.c +8 −10
  6. include/asm-x86/geode.h +2 −2
  7. include/asm-x86/page_32.h +2 −1
arch/x86/kernel/geode_32.c+4−1
@@ -166,6 +166,8 @@ int geode_has_vsa2(void) · 165 unmodified lines
166166 static int has_vsa2 = -1;
167167
168168 if (has_vsa2 == -1) {
169+ u16 val;
170+
169171 /*
170172 * The VSA has virtual registers that we can query for a
171173 * signature.
@@ -173,7 +175,8 @@ int geode_has_vsa2(void) · 1 unmodified line
173175 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
174176 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
175177
176− has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
178+ val = inw(VSA_VRC_DATA);
179+ has_vsa2 = (val == AMD_VSA_SIG || val == GSW_VSA_SIG);
177180 }
178181
179182 return has_vsa2;
arch/x86/kernel/process_32.c+1−0
@@ -333,6 +333,7 @@ void flush_thread(void) · 332 unmodified lines
333333 /*
334334 * Forget coprocessor state..
335335 */
336+ tsk->fpu_counter = 0;
336337 clear_fpu(tsk);
337338 clear_used_math();
338339 }
arch/x86/kernel/process_64.c+1−0
@@ -294,6 +294,7 @@ void flush_thread(void) · 293 unmodified lines
294294 /*
295295 * Forget coprocessor state..
296296 */
297+ tsk->fpu_counter = 0;
297298 clear_fpu(tsk);
298299 clear_used_math();
299300 }
arch/x86/kernel/setup_32.c+8−2
@@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void) · 531 unmodified lines
532532 (unsigned long)(crash_size >> 20),
533533 (unsigned long)(crash_base >> 20),
534534 (unsigned long)(total_mem >> 20));
535+
536+ if (reserve_bootmem(crash_base, crash_size,
537+ BOOTMEM_EXCLUSIVE) < 0) {
538+ printk(KERN_INFO "crashkernel reservation "
539+ "failed - memory is in use\n");
540+ return;
541+ }
542+
535543 crashk_res.start = crash_base;
536544 crashk_res.end = crash_base + crash_size - 1;
537− reserve_bootmem(crash_base, crash_size,
538− BOOTMEM_DEFAULT);
539545 } else
540546 printk(KERN_INFO "crashkernel reservation failed - "
541547 "you have to specify a base address\n");
arch/x86/kernel/tsc_32.c+8−10
@@ -14,7 +14,10 @@ · 13 unmodified lines
1414
1515 #include "mach_timer.h"
1616
17−static int tsc_disabled;
17+/* native_sched_clock() is called before tsc_init(), so
18+ we must start with the TSC soft disabled to prevent
19+ erroneous rdtsc usage on !cpu_has_tsc processors */
20+static int tsc_disabled = -1;
1821
1922 /*
2023 * On some systems the TSC frequency does not
@@ -402,25 +405,20 @@ void __init tsc_init(void) · 381 unmodified lines
402405 {
403406 int cpu;
404407
405− if (!cpu_has_tsc || tsc_disabled) {
406− /* Disable the TSC in case of !cpu_has_tsc */
407− tsc_disabled = 1;
408+ if (!cpu_has_tsc || tsc_disabled > 0)
408409 return;
409− }
410410
411411 cpu_khz = calculate_cpu_khz();
412412 tsc_khz = cpu_khz;
413413
414414 if (!cpu_khz) {
415415 mark_tsc_unstable("could not calculate TSC khz");
416− /*
417− * We need to disable the TSC completely in this case
418− * to prevent sched_clock() from using it.
419− */
420− tsc_disabled = 1;
421416 return;
422417 }
423418
419+ /* now allow native_sched_clock() to use rdtsc */
420+ tsc_disabled = 0;
421+
424422 printk("Detected %lu.%03lu MHz processor.\n",
425423 (unsigned long)cpu_khz / 1000,
426424 (unsigned long)cpu_khz % 1000);
include/asm-x86/geode.h+2−2
@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev); · 111 unmodified lines
112112 #define VSA_VR_UNLOCK 0xFC53 /* unlock virtual register */
113113 #define VSA_VR_SIGNATURE 0x0003
114114 #define VSA_VR_MEM_SIZE 0x0200
115−#define VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
116−
115+#define AMD_VSA_SIG 0x4132 /* signature is ascii 'VSA2' */
116+#define GSW_VSA_SIG 0x534d /* General Software signature */
117117 /* GPIO */
118118
119119 #define GPIO_OUTPUT_VAL 0x00
include/asm-x86/page_32.h+2−1
@@ -14,7 +14,8 @@ · 13 unmodified lines
1414 #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
1515
1616 #ifdef CONFIG_X86_PAE
17−#define __PHYSICAL_MASK_SHIFT 36
17+/* 44=32+12, the limit we can fit into an unsigned long pfn */
18+#define __PHYSICAL_MASK_SHIFT 44
1819 #define __VIRTUAL_MASK_SHIFT 32
1920 #define PAGETABLE_LEVELS 3
2021