"gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already",
Unified · Split
| @@ -250,7 +250,7 @@ static void board_hwcontrol(struct mtd_info *mtd, int cmd) · 249 unmodified lines | |||
| 250 | <title>Device ready function</title> | 250 | <title>Device ready function</title> |
| 251 | <para> | 251 | <para> |
| 252 | If the hardware interface has the ready busy pin of the NAND chip connected to a | 252 | If the hardware interface has the ready busy pin of the NAND chip connected to a |
| 253 | GPIO or other accesible I/O pin, this function is used to read back the state of the | 253 | GPIO or other accessible I/O pin, this function is used to read back the state of the |
| 254 | pin. The function has no arguments and should return 0, if the device is busy (R/B pin | 254 | pin. The function has no arguments and should return 0, if the device is busy (R/B pin |
| 255 | is low) and 1, if the device is ready (R/B pin is high). | 255 | is low) and 1, if the device is ready (R/B pin is high). |
| 256 | If the hardware interface does not give access to the ready busy pin, then | 256 | If the hardware interface does not give access to the ready busy pin, then |
| @@ -91,7 +91,7 @@ int main(int argc, char **argv) · 90 unmodified lines | |||
| 91 | 91 | ||
| 92 | if (ret == -1) { | 92 | if (ret == -1) { |
| 93 | perror("cgroup.event_control " | 93 | perror("cgroup.event_control " |
| 94 | "is not accessable any more"); | 94 | "is not accessible any more"); |
| 95 | break; | 95 | break; |
| 96 | } | 96 | } |
| 97 | 97 | ||
| @@ -398,7 +398,7 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y. · 397 unmodified lines | |||
| 398 | written to move_charge_at_immigrate. | 398 | written to move_charge_at_immigrate. |
| 399 | 399 | ||
| 400 | 9.10 Memory thresholds | 400 | 9.10 Memory thresholds |
| 401 | Memory controler implements memory thresholds using cgroups notification | 401 | Memory controller implements memory thresholds using cgroups notification |
| 402 | API. You can use Documentation/cgroups/cgroup_event_listener.c to test | 402 | API. You can use Documentation/cgroups/cgroup_event_listener.c to test |
| 403 | it. | 403 | it. |
| 404 | 404 | ||
| @@ -598,7 +598,7 @@ a 5-byte jump instruction. So there are several limitations. · 597 unmodified lines | |||
| 598 | a) The instructions in DCR must be relocatable. | 598 | a) The instructions in DCR must be relocatable. |
| 599 | b) The instructions in DCR must not include a call instruction. | 599 | b) The instructions in DCR must not include a call instruction. |
| 600 | c) JTPR must not be targeted by any jump or call instruction. | 600 | c) JTPR must not be targeted by any jump or call instruction. |
| 601 | d) DCR must not straddle the border betweeen functions. | 601 | d) DCR must not straddle the border between functions. |
| 602 | 602 | ||
| 603 | Anyway, these limitations are checked by the in-kernel instruction | 603 | Anyway, these limitations are checked by the in-kernel instruction |
| 604 | decoder, so you don't need to worry about that. | 604 | decoder, so you don't need to worry about that. |
| @@ -874,7 +874,7 @@ Possible values are: · 873 unmodified lines | |||
| 874 | - KVM_MP_STATE_HALTED: the vcpu has executed a HLT instruction and | 874 | - KVM_MP_STATE_HALTED: the vcpu has executed a HLT instruction and |
| 875 | is waiting for an interrupt | 875 | is waiting for an interrupt |
| 876 | - KVM_MP_STATE_SIPI_RECEIVED: the vcpu has just received a SIPI (vector | 876 | - KVM_MP_STATE_SIPI_RECEIVED: the vcpu has just received a SIPI (vector |
| 877 | accesible via KVM_GET_VCPU_EVENTS) | 877 | accessible via KVM_GET_VCPU_EVENTS) |
| 878 | 878 | ||
| 879 | This ioctl is only useful after KVM_CREATE_IRQCHIP. Without an in-kernel | 879 | This ioctl is only useful after KVM_CREATE_IRQCHIP. Without an in-kernel |
| 880 | irqchip, the multiprocessing state must be maintained by userspace. | 880 | irqchip, the multiprocessing state must be maintained by userspace. |
| @@ -32,7 +32,7 @@ the physical hardware, both with regard to SPI and to GPIOs. · 31 unmodified lines | |||
| 32 | This function is called by the CAIF SPI interface to give | 32 | This function is called by the CAIF SPI interface to give |
| 33 | you a chance to set up your hardware to be ready to receive | 33 | you a chance to set up your hardware to be ready to receive |
| 34 | a stream of data from the master. The xfer structure contains | 34 | a stream of data from the master. The xfer structure contains |
| 35 | both physical and logical adresses, as well as the total length | 35 | both physical and logical addresses, as well as the total length |
| 36 | of the transfer in both directions.The dev parameter can be used | 36 | of the transfer in both directions.The dev parameter can be used |
| 37 | to map to different CAIF SPI slave devices. | 37 | to map to different CAIF SPI slave devices. |
| 38 | 38 | ||
| @@ -1098,7 +1098,7 @@ supported currently at the toplevel. · 1097 unmodified lines | |||
| 1098 | * an arbitrary array of bytes | 1098 | * an arbitrary array of bytes |
| 1099 | */ | 1099 | */ |
| 1100 | 1100 | ||
| 1101 | childnode@addresss { /* define a child node named "childnode" | 1101 | childnode@address { /* define a child node named "childnode" |
| 1102 | * whose unit name is "childnode at | 1102 | * whose unit name is "childnode at |
| 1103 | * address" | 1103 | * address" |
| 1104 | */ | 1104 | */ |
| @@ -573,7 +573,7 @@ Changes from 20041018 to 20041123 · 572 unmodified lines | |||
| 573 | * Backround nodev_timeout processing to DPC This enables us to | 573 | * Backround nodev_timeout processing to DPC This enables us to |
| 574 | unblock (stop dev_loss_tmo) when appopriate. | 574 | unblock (stop dev_loss_tmo) when appopriate. |
| 575 | * Fix array discovery with multiple luns. The max_luns was 0 at | 575 | * Fix array discovery with multiple luns. The max_luns was 0 at |
| 576 | the time the host structure was intialized. lpfc_cfg_params | 576 | the time the host structure was initialized. lpfc_cfg_params |
| 577 | then set the max_luns to the correct value afterwards. | 577 | then set the max_luns to the correct value afterwards. |
| 578 | * Remove unused define LPFC_MAX_LUN and set the default value of | 578 | * Remove unused define LPFC_MAX_LUN and set the default value of |
| 579 | lpfc_max_lun parameter to 512. | 579 | lpfc_max_lun parameter to 512. |
| @@ -19,7 +19,7 @@ Linux system over a sample period: · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | - the pid of the task(process) which initialized the timer | 20 | - the pid of the task(process) which initialized the timer |
| 21 | - the name of the process which initialized the timer | 21 | - the name of the process which initialized the timer |
| 22 | - the function where the timer was intialized | 22 | - the function where the timer was initialized |
| 23 | - the callback function which is associated to the timer | 23 | - the callback function which is associated to the timer |
| 24 | - the number of events (callbacks) | 24 | - the number of events (callbacks) |
| 25 | 25 | ||
| @@ -236,7 +236,7 @@ static struct resource it8152_mem = { · 235 unmodified lines | |||
| 236 | 236 | ||
| 237 | /* | 237 | /* |
| 238 | * The following functions are needed for DMA bouncing. | 238 | * The following functions are needed for DMA bouncing. |
| 239 | * ITE8152 chip can addrees up to 64MByte, so all the devices | 239 | * ITE8152 chip can address up to 64MByte, so all the devices |
| 240 | * connected to ITE8152 (PCI and USB) should have limited DMA window | 240 | * connected to ITE8152 (PCI and USB) should have limited DMA window |
| 241 | */ | 241 | */ |
| 242 | 242 | ||
| @@ -70,7 +70,7 @@ static inline struct vic_device *to_vic(struct sys_device *sys) · 69 unmodified lines | |||
| 70 | * vic_init2 - common initialisation code | 70 | * vic_init2 - common initialisation code |
| 71 | * @base: Base of the VIC. | 71 | * @base: Base of the VIC. |
| 72 | * | 72 | * |
| 73 | * Common initialisation code for registeration | 73 | * Common initialisation code for registration |
| 74 | * and resume. | 74 | * and resume. |
| 75 | */ | 75 | */ |
| 76 | static void vic_init2(void __iomem *base) | 76 | static void vic_init2(void __iomem *base) |
| @@ -128,17 +128,17 @@ static struct spi_board_info __initdata ecb_at91spi_devices[] = { · 127 unmodified lines | |||
| 128 | .platform_data = &my_flash0_platform, | 128 | .platform_data = &my_flash0_platform, |
| 129 | #endif | 129 | #endif |
| 130 | }, | 130 | }, |
| 131 | { /* User accessable spi - cs1 (250KHz) */ | 131 | { /* User accessible spi - cs1 (250KHz) */ |
| 132 | .modalias = "spi-cs1", | 132 | .modalias = "spi-cs1", |
| 133 | .chip_select = 1, | 133 | .chip_select = 1, |
| 134 | .max_speed_hz = 250 * 1000, | 134 | .max_speed_hz = 250 * 1000, |
| 135 | }, | 135 | }, |
| 136 | { /* User accessable spi - cs2 (1MHz) */ | 136 | { /* User accessible spi - cs2 (1MHz) */ |
| 137 | .modalias = "spi-cs2", | 137 | .modalias = "spi-cs2", |
| 138 | .chip_select = 2, | 138 | .chip_select = 2, |
| 139 | .max_speed_hz = 1 * 1000 * 1000, | 139 | .max_speed_hz = 1 * 1000 * 1000, |
| 140 | }, | 140 | }, |
| 141 | { /* User accessable spi - cs3 (10MHz) */ | 141 | { /* User accessible spi - cs3 (10MHz) */ |
| 142 | .modalias = "spi-cs3", | 142 | .modalias = "spi-cs3", |
| 143 | .chip_select = 3, | 143 | .chip_select = 3, |
| 144 | .max_speed_hz = 10 * 1000 * 1000, | 144 | .max_speed_hz = 10 * 1000 * 1000, |
| @@ -757,7 +757,7 @@ static int chipcHw_divide(int num, int denom) · 756 unmodified lines | |||
| 757 | t = t << 1; | 757 | t = t << 1; |
| 758 | } | 758 | } |
| 759 | 759 | ||
| 760 | /* Intialize the result */ | 760 | /* Initialize the result */ |
| 761 | r = 0; | 761 | r = 0; |
| 762 | 762 | ||
| 763 | do { | 763 | do { |
| @@ -893,7 +893,7 @@ int dmacHw_setDataDescriptor(dmacHw_CONFIG_t *pConfig, /* [ IN ] Configuration · 892 unmodified lines | |||
| 893 | */ | 893 | */ |
| 894 | /****************************************************************************/ | 894 | /****************************************************************************/ |
| 895 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ | 895 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ |
| 896 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ | 896 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */ |
| 897 | ) { | 897 | ) { |
| 898 | dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle); | 898 | dmacHw_CBLK_t *pCblk = dmacHw_HANDLE_TO_CBLK(handle); |
| 899 | 899 | ||
| @@ -316,7 +316,7 @@ static void DisplayDescRing(void *pDescriptor, /* [ IN ] Descriptor buffer */ · 315 unmodified lines | |||
| 316 | /** | 316 | /** |
| 317 | * @brief Check if DMA channel is the flow controller | 317 | * @brief Check if DMA channel is the flow controller |
| 318 | * | 318 | * |
| 319 | * @return 1 : If DMA is a flow controler | 319 | * @return 1 : If DMA is a flow controller |
| 320 | * 0 : Peripheral is the flow controller | 320 | * 0 : Peripheral is the flow controller |
| 321 | * | 321 | * |
| 322 | * @note | 322 | * @note |
| @@ -558,7 +558,7 @@ static int tmrHw_divide(int num, int denom) · 557 unmodified lines | |||
| 558 | t = t << 1; | 558 | t = t << 1; |
| 559 | } | 559 | } |
| 560 | 560 | ||
| 561 | /* Intialize the result */ | 561 | /* Initialize the result */ |
| 562 | r = 0; | 562 | r = 0; |
| 563 | 563 | ||
| 564 | do { | 564 | do { |
| @@ -671,7 +671,7 @@ static int ConfigChannel(DMA_Handle_t handle) · 670 unmodified lines | |||
| 671 | 671 | ||
| 672 | /****************************************************************************/ | 672 | /****************************************************************************/ |
| 673 | /** | 673 | /** |
| 674 | * Intializes all of the data structures associated with the DMA. | 674 | * Initializes all of the data structures associated with the DMA. |
| 675 | * @return | 675 | * @return |
| 676 | * >= 0 - Initialization was successfull. | 676 | * >= 0 - Initialization was successfull. |
| 677 | * | 677 | * |
| @@ -590,7 +590,7 @@ void dmacHw_printDebugInfo(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle · 589 unmodified lines | |||
| 590 | */ | 590 | */ |
| 591 | /****************************************************************************/ | 591 | /****************************************************************************/ |
| 592 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ | 592 | uint32_t dmacHw_getDmaControllerAttribute(dmacHw_HANDLE_t handle, /* [ IN ] DMA Channel handle */ |
| 593 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controler attribute of type dmacHw_CONTROLLER_ATTRIB_e */ | 593 | dmacHw_CONTROLLER_ATTRIB_e attr /* [ IN ] DMA Controller attribute of type dmacHw_CONTROLLER_ATTRIB_e */ |
| 594 | ); | 594 | ); |
| 595 | 595 | ||
| 596 | #endif /* _DMACHW_H */ | 596 | #endif /* _DMACHW_H */ |
| @@ -28,7 +28,7 @@ · 27 unmodified lines | |||
| 28 | 28 | ||
| 29 | /* Data type for DMA Link List Item */ | 29 | /* Data type for DMA Link List Item */ |
| 30 | typedef struct { | 30 | typedef struct { |
| 31 | uint32_t sar; /* Source Adress Register. | 31 | uint32_t sar; /* Source Address Register. |
| 32 | Address must be aligned to CTLx.SRC_TR_WIDTH. */ | 32 | Address must be aligned to CTLx.SRC_TR_WIDTH. */ |
| 33 | uint32_t dar; /* Destination Address Register. | 33 | uint32_t dar; /* Destination Address Register. |
| 34 | Address must be aligned to CTLx.DST_TR_WIDTH. */ | 34 | Address must be aligned to CTLx.DST_TR_WIDTH. */ |
| @@ -35,7 +35,7 @@ typedef struct { · 34 unmodified lines | |||
| 35 | 35 | ||
| 36 | /* Data type representing DMA channel registers */ | 36 | /* Data type representing DMA channel registers */ |
| 37 | typedef struct { | 37 | typedef struct { |
| 38 | dmacHw_REG64_t ChannelSar; /* Source Adress Register. 64 bits (upper 32 bits are reserved) | 38 | dmacHw_REG64_t ChannelSar; /* Source Address Register. 64 bits (upper 32 bits are reserved) |
| 39 | Address must be aligned to CTLx.SRC_TR_WIDTH. | 39 | Address must be aligned to CTLx.SRC_TR_WIDTH. |
| 40 | */ | 40 | */ |
| 41 | dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved) | 41 | dmacHw_REG64_t ChannelDar; /* Destination Address Register.64 bits (upper 32 bits are reserved) |
| @@ -33,7 +33,7 @@ · 32 unmodified lines | |||
| 33 | #define GEMINI_LPC_HOST_BASE 0x47000000 | 33 | #define GEMINI_LPC_HOST_BASE 0x47000000 |
| 34 | #define GEMINI_LPC_IO_BASE 0x47800000 | 34 | #define GEMINI_LPC_IO_BASE 0x47800000 |
| 35 | #define GEMINI_INTERRUPT_BASE 0x48000000 | 35 | #define GEMINI_INTERRUPT_BASE 0x48000000 |
| 36 | /* TODO: Different interrupt controlers when SMP | 36 | /* TODO: Different interrupt controllers when SMP |
| 37 | * #define GEMINI_INTERRUPT0_BASE 0x48000000 | 37 | * #define GEMINI_INTERRUPT0_BASE 0x48000000 |
| 38 | * #define GEMINI_INTERRUPT1_BASE 0x49000000 | 38 | * #define GEMINI_INTERRUPT1_BASE 0x49000000 |
| 39 | */ | 39 | */ |
| @@ -153,7 +153,7 @@ __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) · 152 unmodified lines | |||
| 153 | { | 153 | { |
| 154 | if (mtype == MT_DEVICE) { | 154 | if (mtype == MT_DEVICE) { |
| 155 | /* The peripherals in the 88000000 - D0000000 range | 155 | /* The peripherals in the 88000000 - D0000000 range |
| 156 | * are only accessable by type MT_DEVICE_NONSHARED. | 156 | * are only accessible by type MT_DEVICE_NONSHARED. |
| 157 | * Adjust mtype as necessary to make this "just work." | 157 | * Adjust mtype as necessary to make this "just work." |
| 158 | */ | 158 | */ |
| 159 | if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) | 159 | if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) |
| @@ -252,7 +252,7 @@ static int omap3_enter_idle_bm(struct cpuidle_device *dev, · 251 unmodified lines | |||
| 252 | * FIXME: we currently manage device-specific idle states | 252 | * FIXME: we currently manage device-specific idle states |
| 253 | * for PER and CORE in combination with CPU-specific | 253 | * for PER and CORE in combination with CPU-specific |
| 254 | * idle states. This is wrong, and device-specific | 254 | * idle states. This is wrong, and device-specific |
| 255 | * idle managment needs to be separated out into | 255 | * idle management needs to be separated out into |
| 256 | * its own code. | 256 | * its own code. |
| 257 | */ | 257 | */ |
| 258 | 258 | ||
| @@ -843,7 +843,7 @@ void __init omap_serial_init_port(int port) · 842 unmodified lines | |||
| 843 | } | 843 | } |
| 844 | 844 | ||
| 845 | /** | 845 | /** |
| 846 | * omap_serial_init() - intialize all supported serial ports | 846 | * omap_serial_init() - initialize all supported serial ports |
| 847 | * | 847 | * |
| 848 | * Initializes all available UARTs as serial ports. Platforms | 848 | * Initializes all available UARTs as serial ports. Platforms |
| 849 | * can call this function when they want to have default behaviour | 849 | * can call this function when they want to have default behaviour |
| @@ -337,7 +337,7 @@ void __init mxm_8x10_mmc_init(void) · 336 unmodified lines | |||
| 337 | } | 337 | } |
| 338 | #endif | 338 | #endif |
| 339 | 339 | ||
| 340 | /* USB Open Host Controler Interface */ | 340 | /* USB Open Host Controller Interface */ |
| 341 | static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { | 341 | static struct pxaohci_platform_data mxm_8x10_ohci_platform_data = { |
| 342 | .port_mode = PMM_NPS_MODE, | 342 | .port_mode = PMM_NPS_MODE, |
| 343 | .flags = ENABLE_PORT_ALL | 343 | .flags = ENABLE_PORT_ALL |
| @@ -740,7 +740,7 @@ static int __init s3c64xx_dma_init(void) · 739 unmodified lines | |||
| 740 | /* Set all DMA configuration to be DMA, not SDMA */ | 740 | /* Set all DMA configuration to be DMA, not SDMA */ |
| 741 | writel(0xffffff, S3C_SYSREG(0x110)); | 741 | writel(0xffffff, S3C_SYSREG(0x110)); |
| 742 | 742 | ||
| 743 | /* Register standard DMA controlers */ | 743 | /* Register standard DMA controllers */ |
| 744 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); | 744 | s3c64xx_dma_init1(0, DMACH_UART0, IRQ_DMA0, 0x75000000); |
| 745 | s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); | 745 | s3c64xx_dma_init1(8, DMACH_PCM1_TX, IRQ_DMA1, 0x75100000); |
| 746 | 746 | ||
| @@ -371,7 +371,7 @@ struct pmx_driver pmx_driver = { · 370 unmodified lines | |||
| 371 | }; | 371 | }; |
| 372 | 372 | ||
| 373 | /* Add spear300 specific devices here */ | 373 | /* Add spear300 specific devices here */ |
| 374 | /* arm gpio1 device registeration */ | 374 | /* arm gpio1 device registration */ |
| 375 | static struct pl061_platform_data gpio1_plat_data = { | 375 | static struct pl061_platform_data gpio1_plat_data = { |
| 376 | .gpio_base = 8, | 376 | .gpio_base = 8, |
| 377 | .irq_base = SPEAR_GPIO1_INT_BASE, | 377 | .irq_base = SPEAR_GPIO1_INT_BASE, |
| @@ -451,7 +451,7 @@ void __init spear300_init(void) · 73 unmodified lines | |||
| 451 | /* call spear3xx family common init function */ | 451 | /* call spear3xx family common init function */ |
| 452 | spear3xx_init(); | 452 | spear3xx_init(); |
| 453 | 453 | ||
| 454 | /* shared irq registeration */ | 454 | /* shared irq registration */ |
| 455 | shirq_ras1.regs.base = | 455 | shirq_ras1.regs.base = |
| 456 | ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); | 456 | ioremap(SPEAR300_TELECOM_BASE, SPEAR300_TELECOM_REG_SIZE); |
| 457 | if (shirq_ras1.regs.base) { | 457 | if (shirq_ras1.regs.base) { |
| @@ -266,7 +266,7 @@ void __init spear310_init(void) · 265 unmodified lines | |||
| 266 | /* call spear3xx family common init function */ | 266 | /* call spear3xx family common init function */ |
| 267 | spear3xx_init(); | 267 | spear3xx_init(); |
| 268 | 268 | ||
| 269 | /* shared irq registeration */ | 269 | /* shared irq registration */ |
| 270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); | 270 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SPEAR310_SOC_CONFIG_SIZE); |
| 271 | if (base) { | 271 | if (base) { |
| 272 | /* shirq 1 */ | 272 | /* shirq 1 */ |
| @@ -519,7 +519,7 @@ void __init spear320_init(void) · 518 unmodified lines | |||
| 519 | /* call spear3xx family common init function */ | 519 | /* call spear3xx family common init function */ |
| 520 | spear3xx_init(); | 520 | spear3xx_init(); |
| 521 | 521 | ||
| 522 | /* shared irq registeration */ | 522 | /* shared irq registration */ |
| 523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); | 523 | base = ioremap(SPEAR320_SOC_CONFIG_BASE, SPEAR320_SOC_CONFIG_SIZE); |
| 524 | if (base) { | 524 | if (base) { |
| 525 | /* shirq 1 */ | 525 | /* shirq 1 */ |
| @@ -22,7 +22,7 @@ · 21 unmodified lines | |||
| 22 | #include <mach/spear.h> | 22 | #include <mach/spear.h> |
| 23 | 23 | ||
| 24 | /* Add spear3xx machines common devices here */ | 24 | /* Add spear3xx machines common devices here */ |
| 25 | /* gpio device registeration */ | 25 | /* gpio device registration */ |
| 26 | static struct pl061_platform_data gpio_plat_data = { | 26 | static struct pl061_platform_data gpio_plat_data = { |
| 27 | .gpio_base = 0, | 27 | .gpio_base = 0, |
| 28 | .irq_base = SPEAR_GPIO_INT_BASE, | 28 | .irq_base = SPEAR_GPIO_INT_BASE, |
| @@ -41,7 +41,7 @@ struct amba_device gpio_device = { · 12 unmodified lines | |||
| 41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 41 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | /* uart device registeration */ | 44 | /* uart device registration */ |
| 45 | struct amba_device uart_device = { | 45 | struct amba_device uart_device = { |
| 46 | .dev = { | 46 | .dev = { |
| 47 | .init_name = "uart", | 47 | .init_name = "uart", |
| @@ -543,6 +543,6 @@ void spear_pmx_init(struct pmx_driver *pmx_driver, uint base, uint size) · 495 unmodified lines | |||
| 543 | 543 | ||
| 544 | pmx_fail: | 544 | pmx_fail: |
| 545 | if (ret) | 545 | if (ret) |
| 546 | printk(KERN_ERR "padmux: registeration failed. err no: %d\n", | 546 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", |
| 547 | ret); | 547 | ret); |
| 548 | } | 548 | } |
| @@ -23,7 +23,7 @@ · 22 unmodified lines | |||
| 23 | #include <mach/spear.h> | 23 | #include <mach/spear.h> |
| 24 | 24 | ||
| 25 | /* Add spear6xx machines common devices here */ | 25 | /* Add spear6xx machines common devices here */ |
| 26 | /* uart device registeration */ | 26 | /* uart device registration */ |
| 27 | struct amba_device uart_device[] = { | 27 | struct amba_device uart_device[] = { |
| 28 | { | 28 | { |
| 29 | .dev = { | 29 | .dev = { |
| @@ -50,7 +50,7 @@ struct amba_device uart_device[] = { · 20 unmodified lines | |||
| 50 | } | 50 | } |
| 51 | }; | 51 | }; |
| 52 | 52 | ||
| 53 | /* gpio device registeration */ | 53 | /* gpio device registration */ |
| 54 | static struct pl061_platform_data gpio_plat_data[] = { | 54 | static struct pl061_platform_data gpio_plat_data[] = { |
| 55 | { | 55 | { |
| 56 | .gpio_base = 0, | 56 | .gpio_base = 0, |
| @@ -64,7 +64,7 @@ config MACH_U300_DUAL_RAM · 63 unmodified lines | |||
| 64 | bool "Dual RAM" | 64 | bool "Dual RAM" |
| 65 | help | 65 | help |
| 66 | Select this if you want support for Dual RAM phones. | 66 | Select this if you want support for Dual RAM phones. |
| 67 | This is two RAM memorys on different EMIFs. | 67 | This is two RAM memories on different EMIFs. |
| 68 | endchoice | 68 | endchoice |
| 69 | 69 | ||
| 70 | config U300_DEBUG | 70 | config U300_DEBUG |
| @@ -24,7 +24,7 @@ · 23 unmodified lines | |||
| 24 | * @src_addr: transfer source address | 24 | * @src_addr: transfer source address |
| 25 | * @dst_addr: transfer destination address | 25 | * @dst_addr: transfer destination address |
| 26 | * @link_addr: physical address to next lli | 26 | * @link_addr: physical address to next lli |
| 27 | * @virt_link_addr: virtual addres of next lli (only used by pool_free) | 27 | * @virt_link_addr: virtual address of next lli (only used by pool_free) |
| 28 | * @phy_this: physical address of current lli (only used by pool_free) | 28 | * @phy_this: physical address of current lli (only used by pool_free) |
| 29 | */ | 29 | */ |
| 30 | struct coh901318_lli { | 30 | struct coh901318_lli { |
| @@ -90,7 +90,7 @@ struct powersave { · 59 unmodified lines | |||
| 90 | * struct coh901318_platform - platform arch structure | 90 | * struct coh901318_platform - platform arch structure |
| 91 | * @chans_slave: specifying dma slave channels | 91 | * @chans_slave: specifying dma slave channels |
| 92 | * @chans_memcpy: specifying dma memcpy channels | 92 | * @chans_memcpy: specifying dma memcpy channels |
| 93 | * @access_memory_state: requesting DMA memeory access (on / off) | 93 | * @access_memory_state: requesting DMA memory access (on / off) |
| 94 | * @chan_conf: dma channel configurations | 94 | * @chan_conf: dma channel configurations |
| 95 | * @max_channels: max number of dma chanenls | 95 | * @max_channels: max number of dma chanenls |
| 96 | */ | 96 | */ |
| @@ -66,7 +66,7 @@ extern int imx_irq_set_priority(unsigned char irq, unsigned char prio); · 65 unmodified lines | |||
| 66 | 66 | ||
| 67 | /* all normal IRQs can be FIQs */ | 67 | /* all normal IRQs can be FIQs */ |
| 68 | #define FIQ_START 0 | 68 | #define FIQ_START 0 |
| 69 | /* switch betwean IRQ and FIQ */ | 69 | /* switch between IRQ and FIQ */ |
| 70 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); | 70 | extern int mxc_set_irq_fiq(unsigned int irq, unsigned int type); |
| 71 | 71 | ||
| 72 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ | 72 | #endif /* __ASM_ARCH_MXC_IRQS_H__ */ |
| @@ -339,7 +339,7 @@ struct omap_hwmod_omap2_prcm { · 338 unmodified lines | |||
| 339 | /** | 339 | /** |
| 340 | * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data | 340 | * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data |
| 341 | * @clkctrl_reg: PRCM address of the clock control register | 341 | * @clkctrl_reg: PRCM address of the clock control register |
| 342 | * @rstctrl_reg: adress of the XXX_RSTCTRL register located in the PRM | 342 | * @rstctrl_reg: address of the XXX_RSTCTRL register located in the PRM |
| 343 | * @submodule_wkdep_bit: bit shift of the WKDEP range | 343 | * @submodule_wkdep_bit: bit shift of the WKDEP range |
| 344 | */ | 344 | */ |
| 345 | struct omap_hwmod_omap4_prcm { | 345 | struct omap_hwmod_omap4_prcm { |
| @@ -1197,7 +1197,7 @@ · 1196 unmodified lines | |||
| 1197 | #define SADD_LEN 0x0002 /* Slave Address Length */ | 1197 | #define SADD_LEN 0x0002 /* Slave Address Length */ |
| 1198 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ | 1198 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ |
| 1199 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ | 1199 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
| 1200 | #define GEN 0x0010 /* General Call Adrress Matching Enabled */ | 1200 | #define GEN 0x0010 /* General Call Address Matching Enabled */ |
| 1201 | 1201 | ||
| 1202 | /* TWI_SLAVE_STAT Masks */ | 1202 | /* TWI_SLAVE_STAT Masks */ |
| 1203 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ | 1203 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
| @@ -1206,7 +1206,7 @@ · 1205 unmodified lines | |||
| 1206 | #define SADD_LEN 0x0002 /* Slave Address Length */ | 1206 | #define SADD_LEN 0x0002 /* Slave Address Length */ |
| 1207 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ | 1207 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ |
| 1208 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ | 1208 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
| 1209 | #define GEN 0x0010 /* General Call Adrress Matching Enabled */ | 1209 | #define GEN 0x0010 /* General Call Address Matching Enabled */ |
| 1210 | 1210 | ||
| 1211 | /* TWI_SLAVE_STAT Masks */ | 1211 | /* TWI_SLAVE_STAT Masks */ |
| 1212 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ | 1212 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
| @@ -1523,7 +1523,7 @@ · 1522 unmodified lines | |||
| 1523 | #define SADD_LEN 0x0002 /* Slave Address Length */ | 1523 | #define SADD_LEN 0x0002 /* Slave Address Length */ |
| 1524 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ | 1524 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ |
| 1525 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ | 1525 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
| 1526 | #define GEN 0x0010 /* General Call Adrress Matching Enabled */ | 1526 | #define GEN 0x0010 /* General Call Address Matching Enabled */ |
| 1527 | 1527 | ||
| 1528 | /* TWI_SLAVE_STAT Masks */ | 1528 | /* TWI_SLAVE_STAT Masks */ |
| 1529 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ | 1529 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
| @@ -2185,7 +2185,7 @@ · 2184 unmodified lines | |||
| 2185 | #define SADD_LEN 0x0002 /* Slave Address Length */ | 2185 | #define SADD_LEN 0x0002 /* Slave Address Length */ |
| 2186 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ | 2186 | #define STDVAL 0x0004 /* Slave Transmit Data Valid */ |
| 2187 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ | 2187 | #define NAK 0x0008 /* NAK/ACK* Generated At Conclusion Of Transfer */ |
| 2188 | #define GEN 0x0010 /* General Call Adrress Matching Enabled */ | 2188 | #define GEN 0x0010 /* General Call Address Matching Enabled */ |
| 2189 | 2189 | ||
| 2190 | /* TWIx_SLAVE_STAT Masks */ | 2190 | /* TWIx_SLAVE_STAT Masks */ |
| 2191 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ | 2191 | #define SDIR 0x0001 /* Slave Transfer Direction (Transmit/Receive*) */ |
| @@ -139,7 +139,7 @@ copy_nand_to_ram: · 138 unmodified lines | |||
| 139 | lsrq 8, $r4 | 139 | lsrq 8, $r4 |
| 140 | move.b $r4, [$r1] ; Row address | 140 | move.b $r4, [$r1] ; Row address |
| 141 | lsrq 8, $r4 | 141 | lsrq 8, $r4 |
| 142 | move.b $r4, [$r1] ; Row adddress | 142 | move.b $r4, [$r1] ; Row address |
| 143 | moveq 20, $r4 | 143 | moveq 20, $r4 |
| 144 | 2: bne 2b | 144 | 2: bne 2b |
| 145 | subq 1, $r4 | 145 | subq 1, $r4 |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * The following devices are accessable using this driver using | 2 | * The following devices are accessible using this driver using |
| 3 | * GPIO_MAJOR (120) and a couple of minor numbers. | 3 | * GPIO_MAJOR (120) and a couple of minor numbers. |
| 4 | * | 4 | * |
| 5 | * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10): | 5 | * For ETRAX 100LX (CONFIG_ETRAX_ARCH_V10): |
| @@ -48,7 +48,7 @@ config DEFAULT_CMDLINE · 47 unmodified lines | |||
| 48 | builtin kernel commandline enabled. | 48 | builtin kernel commandline enabled. |
| 49 | 49 | ||
| 50 | config KERNEL_COMMAND | 50 | config KERNEL_COMMAND |
| 51 | string "Buildin commmand string" | 51 | string "Buildin command string" |
| 52 | depends on DEFAULT_CMDLINE | 52 | depends on DEFAULT_CMDLINE |
| 53 | help | 53 | help |
| 54 | builtin kernel commandline strings. | 54 | builtin kernel commandline strings. |
| @@ -130,7 +130,7 @@ static void mmio_access(struct kvm_vcpu *vcpu, u64 src_pa, u64 *dest, · 129 unmodified lines | |||
| 130 | 130 | ||
| 131 | local_irq_save(psr); | 131 | local_irq_save(psr); |
| 132 | 132 | ||
| 133 | /*Intercept the acces for PIB range*/ | 133 | /*Intercept the access for PIB range*/ |
| 134 | if (iot == GPFN_PIB) { | 134 | if (iot == GPFN_PIB) { |
| 135 | if (!dir) | 135 | if (!dir) |
| 136 | lsapic_write(vcpu, src_pa, s, *dest); | 136 | lsapic_write(vcpu, src_pa, s, *dest); |
| @@ -130,7 +130,7 @@ static void restore_core_regs(void) · 129 unmodified lines | |||
| 130 | au_writel(sleep_usb[1], USBD_ENABLE); | 130 | au_writel(sleep_usb[1], USBD_ENABLE); |
| 131 | au_sync(); | 131 | au_sync(); |
| 132 | #else | 132 | #else |
| 133 | /* enable accces to OTG memory */ | 133 | /* enable access to OTG memory */ |
| 134 | au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); | 134 | au_writel(au_readl(USB_MSR_BASE + 4) | (1 << 6), USB_MSR_BASE + 4); |
| 135 | au_sync(); | 135 | au_sync(); |
| 136 | 136 | ||
| @@ -88,7 +88,7 @@ static inline dma_addr_t _dma_to_phys_offset_raw(dma_addr_t dma) · 87 unmodified lines | |||
| 88 | } | 88 | } |
| 89 | 89 | ||
| 90 | /* These are not portable and should not be used in drivers. Drivers should | 90 | /* These are not portable and should not be used in drivers. Drivers should |
| 91 | * be using ioremap() and friends to map physical addreses to virtual | 91 | * be using ioremap() and friends to map physical addresses to virtual |
| 92 | * addresses and dma_map*() and friends to map virtual addresses into DMA | 92 | * addresses and dma_map*() and friends to map virtual addresses into DMA |
| 93 | * addresses and back. | 93 | * addresses and back. |
| 94 | */ | 94 | */ |
| @@ -65,7 +65,7 @@ static struct nand_ecclayout qi_lb60_ecclayout_1gb = { · 64 unmodified lines | |||
| 65 | 65 | ||
| 66 | /* Early prototypes of the QI LB60 had only 1GB of NAND. | 66 | /* Early prototypes of the QI LB60 had only 1GB of NAND. |
| 67 | * In order to support these devices aswell the partition and ecc layout is | 67 | * In order to support these devices aswell the partition and ecc layout is |
| 68 | * initalized depending on the NAND size */ | 68 | * initialized depending on the NAND size */ |
| 69 | static struct mtd_partition qi_lb60_partitions_1gb[] = { | 69 | static struct mtd_partition qi_lb60_partitions_1gb[] = { |
| 70 | { | 70 | { |
| 71 | .name = "NAND BOOT partition", | 71 | .name = "NAND BOOT partition", |
| @@ -464,7 +464,7 @@ static int __init qi_lb60_board_setup(void) · 392 unmodified lines | |||
| 464 | board_gpio_setup(); | 464 | board_gpio_setup(); |
| 465 | 465 | ||
| 466 | if (qi_lb60_init_platform_devices()) | 466 | if (qi_lb60_init_platform_devices()) |
| 467 | panic("Failed to initalize platform devices\n"); | 467 | panic("Failed to initialize platform devices\n"); |
| 468 | 468 | ||
| 469 | return 0; | 469 | return 0; |
| 470 | } | 470 | } |
| @@ -546,7 +546,7 @@ static int __init jz4740_gpio_init(void) · 545 unmodified lines | |||
| 546 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) | 546 | for (i = 0; i < ARRAY_SIZE(jz4740_gpio_chips); ++i) |
| 547 | jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); | 547 | jz4740_gpio_chip_init(&jz4740_gpio_chips[i], i); |
| 548 | 548 | ||
| 549 | printk(KERN_INFO "JZ4740 GPIO initalized\n"); | 549 | printk(KERN_INFO "JZ4740 GPIO initialized\n"); |
| 550 | 550 | ||
| 551 | return 0; | 551 | return 0; |
| 552 | } | 552 | } |
| @@ -43,7 +43,7 @@ static struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS]; · 42 unmodified lines | |||
| 43 | static char *mtypes[3] = { | 43 | static char *mtypes[3] = { |
| 44 | "Dont use memory", | 44 | "Dont use memory", |
| 45 | "YAMON PROM memory", | 45 | "YAMON PROM memory", |
| 46 | "Free memmory", | 46 | "Free memory", |
| 47 | }; | 47 | }; |
| 48 | #endif | 48 | #endif |
| 49 | 49 | ||
| @@ -900,7 +900,7 @@ static int cvmx_pcie_rc_initialize(int pcie_port) · 899 unmodified lines | |||
| 900 | mem_access_subid.s.ror = 0; | 900 | mem_access_subid.s.ror = 0; |
| 901 | /* Disable Relaxed Ordering for Writes. */ | 901 | /* Disable Relaxed Ordering for Writes. */ |
| 902 | mem_access_subid.s.row = 0; | 902 | mem_access_subid.s.row = 0; |
| 903 | /* PCIe Adddress Bits <63:34>. */ | 903 | /* PCIe Address Bits <63:34>. */ |
| 904 | mem_access_subid.s.ba = 0; | 904 | mem_access_subid.s.ba = 0; |
| 905 | 905 | ||
| 906 | /* | 906 | /* |
| @@ -57,7 +57,7 @@ · 56 unmodified lines | |||
| 57 | unsigned long ptv_memsize; | 57 | unsigned long ptv_memsize; |
| 58 | 58 | ||
| 59 | /* | 59 | /* |
| 60 | * struct low_mem_reserved - Items in low memmory that are reserved | 60 | * struct low_mem_reserved - Items in low memory that are reserved |
| 61 | * @start: Physical address of item | 61 | * @start: Physical address of item |
| 62 | * @size: Size, in bytes, of this item | 62 | * @size: Size, in bytes, of this item |
| 63 | * @is_aliased: True if this is RAM aliased from another location. If false, | 63 | * @is_aliased: True if this is RAM aliased from another location. If false, |
| @@ -107,7 +107,7 @@ int txx9_pci_mem_high __initdata; · 106 unmodified lines | |||
| 107 | 107 | ||
| 108 | /* | 108 | /* |
| 109 | * allocate pci_controller and resources. | 109 | * allocate pci_controller and resources. |
| 110 | * mem_base, io_base: physical addresss. 0 for auto assignment. | 110 | * mem_base, io_base: physical address. 0 for auto assignment. |
| 111 | * mem_size and io_size means max size on auto assignment. | 111 | * mem_size and io_size means max size on auto assignment. |
| 112 | * pcic must be &txx9_primary_pcic or NULL. | 112 | * pcic must be &txx9_primary_pcic or NULL. |
| 113 | */ | 113 | */ |
| @@ -93,7 +93,7 @@ typedef struct mem_ctlr { · 92 unmodified lines | |||
| 93 | } memctl8xx_t; | 93 | } memctl8xx_t; |
| 94 | 94 | ||
| 95 | /*----------------------------------------------------------------------- | 95 | /*----------------------------------------------------------------------- |
| 96 | * BR - Memory Controler: Base Register 16-9 | 96 | * BR - Memory Controller: Base Register 16-9 |
| 97 | */ | 97 | */ |
| 98 | #define BR_BA_MSK 0xffff8000 /* Base Address Mask */ | 98 | #define BR_BA_MSK 0xffff8000 /* Base Address Mask */ |
| 99 | #define BR_AT_MSK 0x00007000 /* Address Type Mask */ | 99 | #define BR_AT_MSK 0x00007000 /* Address Type Mask */ |
| @@ -110,7 +110,7 @@ typedef struct mem_ctlr { · 10 unmodified lines | |||
| 110 | #define BR_V 0x00000001 /* Bank Valid */ | 110 | #define BR_V 0x00000001 /* Bank Valid */ |
| 111 | 111 | ||
| 112 | /*----------------------------------------------------------------------- | 112 | /*----------------------------------------------------------------------- |
| 113 | * OR - Memory Controler: Option Register 16-11 | 113 | * OR - Memory Controller: Option Register 16-11 |
| 114 | */ | 114 | */ |
| 115 | #define OR_AM_MSK 0xffff8000 /* Address Mask Mask */ | 115 | #define OR_AM_MSK 0xffff8000 /* Address Mask Mask */ |
| 116 | #define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */ | 116 | #define OR_ATM_MSK 0x00007000 /* Address Type Mask Mask */ |
| @@ -1469,7 +1469,7 @@ static int cell_global_start(struct op_counter_config *ctr) · 1468 unmodified lines | |||
| 1469 | * The pm_interval register is setup to write the SPU PC value into the | 1469 | * The pm_interval register is setup to write the SPU PC value into the |
| 1470 | * trace buffer at the maximum rate possible. The trace buffer is configured | 1470 | * trace buffer at the maximum rate possible. The trace buffer is configured |
| 1471 | * to store the PCs, wrapping when it is full. The performance counter is | 1471 | * to store the PCs, wrapping when it is full. The performance counter is |
| 1472 | * intialized to the max hardware count minus the number of events, N, between | 1472 | * initialized to the max hardware count minus the number of events, N, between |
| 1473 | * samples. Once the N events have occured, a HW counter overflow occurs | 1473 | * samples. Once the N events have occured, a HW counter overflow occurs |
| 1474 | * causing the generation of a HW counter interrupt which also stops the | 1474 | * causing the generation of a HW counter interrupt which also stops the |
| 1475 | * writing of the SPU PC values to the trace buffer. Hence the last PC | 1475 | * writing of the SPU PC values to the trace buffer. Hence the last PC |
| @@ -231,7 +231,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep) · 230 unmodified lines | |||
| 231 | ori r4, r4, 0x002a | 231 | ori r4, r4, 0x002a |
| 232 | mtspr SPRN_DBAT0L, r4 | 232 | mtspr SPRN_DBAT0L, r4 |
| 233 | lis r8, TMP_VIRT_IMMR@h | 233 | lis r8, TMP_VIRT_IMMR@h |
| 234 | ori r4, r8, 0x001e /* 1 MByte accessable from Kernel Space only */ | 234 | ori r4, r8, 0x001e /* 1 MByte accessible from Kernel Space only */ |
| 235 | mtspr SPRN_DBAT0U, r4 | 235 | mtspr SPRN_DBAT0U, r4 |
| 236 | isync | 236 | isync |
| 237 | 237 | ||
| @@ -241,7 +241,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep) · 3 unmodified lines | |||
| 241 | ori r4, r4, 0x002a | 241 | ori r4, r4, 0x002a |
| 242 | mtspr SPRN_DBAT1L, r4 | 242 | mtspr SPRN_DBAT1L, r4 |
| 243 | lis r9, (TMP_VIRT_IMMR + 0x01000000)@h | 243 | lis r9, (TMP_VIRT_IMMR + 0x01000000)@h |
| 244 | ori r4, r9, 0x001e /* 1 MByte accessable from Kernel Space only */ | 244 | ori r4, r9, 0x001e /* 1 MByte accessible from Kernel Space only */ |
| 245 | mtspr SPRN_DBAT1U, r4 | 245 | mtspr SPRN_DBAT1U, r4 |
| 246 | isync | 246 | isync |
| 247 | 247 | ||
| @@ -253,7 +253,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep) · 5 unmodified lines | |||
| 253 | li r4, 0x0002 | 253 | li r4, 0x0002 |
| 254 | mtspr SPRN_DBAT2L, r4 | 254 | mtspr SPRN_DBAT2L, r4 |
| 255 | lis r4, KERNELBASE@h | 255 | lis r4, KERNELBASE@h |
| 256 | ori r4, r4, 0x001e /* 1 MByte accessable from Kernel Space only */ | 256 | ori r4, r4, 0x001e /* 1 MByte accessible from Kernel Space only */ |
| 257 | mtspr SPRN_DBAT2U, r4 | 257 | mtspr SPRN_DBAT2U, r4 |
| 258 | isync | 258 | isync |
| 259 | 259 | ||
| @@ -566,10 +566,10 @@ static int ps3_setup_dynamic_device(const struct ps3_repository_device *repo) · 565 unmodified lines | |||
| 566 | case PS3_DEV_TYPE_STOR_DISK: | 566 | case PS3_DEV_TYPE_STOR_DISK: |
| 567 | result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK); | 567 | result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK); |
| 568 | 568 | ||
| 569 | /* Some devices are not accessable from the Other OS lpar. */ | 569 | /* Some devices are not accessible from the Other OS lpar. */ |
| 570 | if (result == -ENODEV) { | 570 | if (result == -ENODEV) { |
| 571 | result = 0; | 571 | result = 0; |
| 572 | pr_debug("%s:%u: not accessable\n", __func__, | 572 | pr_debug("%s:%u: not accessible\n", __func__, |
| 573 | __LINE__); | 573 | __LINE__); |
| 574 | } | 574 | } |
| 575 | 575 | ||
| @@ -44,7 +44,7 @@ · 43 unmodified lines | |||
| 44 | * @lock: | 44 | * @lock: |
| 45 | * @ipi_debug_brk_mask: | 45 | * @ipi_debug_brk_mask: |
| 46 | * | 46 | * |
| 47 | * The HV mantains per SMT thread mappings of HV outlet to HV plug on | 47 | * The HV maintains per SMT thread mappings of HV outlet to HV plug on |
| 48 | * behalf of the guest. These mappings are implemented as 256 bit guest | 48 | * behalf of the guest. These mappings are implemented as 256 bit guest |
| 49 | * supplied bitmaps indexed by plug number. The addresses of the bitmaps | 49 | * supplied bitmaps indexed by plug number. The addresses of the bitmaps |
| 50 | * are registered with the HV through lv1_configure_irq_state_bitmap(). | 50 | * are registered with the HV through lv1_configure_irq_state_bitmap(). |
| @@ -568,7 +568,7 @@ static void sh5_flush_dcache_page(void *page) · 567 unmodified lines | |||
| 568 | } | 568 | } |
| 569 | 569 | ||
| 570 | /* | 570 | /* |
| 571 | * Flush the range [start,end] of kernel virtual adddress space from | 571 | * Flush the range [start,end] of kernel virtual address space from |
| 572 | * the I-cache. The corresponding range must be purged from the | 572 | * the I-cache. The corresponding range must be purged from the |
| 573 | * D-cache also because the SH-5 doesn't have cache snooping between | 573 | * D-cache also because the SH-5 doesn't have cache snooping between |
| 574 | * the caches. The addresses will be visible through the superpage | 574 | * the caches. The addresses will be visible through the superpage |
| @@ -622,7 +622,7 @@ static const char CHAFSR_PERR_msg[] = · 621 unmodified lines | |||
| 622 | static const char CHAFSR_IERR_msg[] = | 622 | static const char CHAFSR_IERR_msg[] = |
| 623 | "Internal processor error"; | 623 | "Internal processor error"; |
| 624 | static const char CHAFSR_ISAP_msg[] = | 624 | static const char CHAFSR_ISAP_msg[] = |
| 625 | "System request parity error on incoming addresss"; | 625 | "System request parity error on incoming address"; |
| 626 | static const char CHAFSR_UCU_msg[] = | 626 | static const char CHAFSR_UCU_msg[] = |
| 627 | "Uncorrectable E-cache ECC error for ifetch/data"; | 627 | "Uncorrectable E-cache ECC error for ifetch/data"; |
| 628 | static const char CHAFSR_UCC_msg[] = | 628 | static const char CHAFSR_UCC_msg[] = |
| @@ -92,7 +92,7 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) · 91 unmodified lines | |||
| 92 | extern void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd); | 92 | extern void ___pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd); |
| 93 | 93 | ||
| 94 | static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, | 94 | static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, |
| 95 | unsigned long adddress) | 95 | unsigned long address) |
| 96 | { | 96 | { |
| 97 | ___pmd_free_tlb(tlb, pmd); | 97 | ___pmd_free_tlb(tlb, pmd); |
| 98 | } | 98 | } |
| @@ -902,7 +902,7 @@ extern unsigned long thread_saved_pc(struct task_struct *tsk); · 901 unmodified lines | |||
| 902 | /* | 902 | /* |
| 903 | * The below -8 is to reserve 8 bytes on top of the ring0 stack. | 903 | * The below -8 is to reserve 8 bytes on top of the ring0 stack. |
| 904 | * This is necessary to guarantee that the entire "struct pt_regs" | 904 | * This is necessary to guarantee that the entire "struct pt_regs" |
| 905 | * is accessable even if the CPU haven't stored the SS/ESP registers | 905 | * is accessible even if the CPU haven't stored the SS/ESP registers |
| 906 | * on the stack (interrupt gate does not save these registers | 906 | * on the stack (interrupt gate does not save these registers |
| 907 | * when switching to the same priv ring). | 907 | * when switching to the same priv ring). |
| 908 | * Therefore beware: accessing the ss/esp fields of the | 908 | * Therefore beware: accessing the ss/esp fields of the |
| @@ -1086,7 +1086,7 @@ static int alloc_new_range(struct dma_ops_domain *dma_dom, · 1085 unmodified lines | |||
| 1086 | 1086 | ||
| 1087 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; | 1087 | dma_dom->aperture_size += APERTURE_RANGE_SIZE; |
| 1088 | 1088 | ||
| 1089 | /* Intialize the exclusion range if necessary */ | 1089 | /* Initialize the exclusion range if necessary */ |
| 1090 | for_each_iommu(iommu) { | 1090 | for_each_iommu(iommu) { |
| 1091 | if (iommu->exclusion_start && | 1091 | if (iommu->exclusion_start && |
| 1092 | iommu->exclusion_start >= dma_dom->aperture[index]->offset | 1092 | iommu->exclusion_start >= dma_dom->aperture[index]->offset |
| @@ -1353,7 +1353,7 @@ static void dma_ops_domain_free(struct dma_ops_domain *dom) · 260 unmodified lines | |||
| 1353 | 1353 | ||
| 1354 | /* | 1354 | /* |
| 1355 | * Allocates a new protection domain usable for the dma_ops functions. | 1355 | * Allocates a new protection domain usable for the dma_ops functions. |
| 1356 | * It also intializes the page table and the address allocator data | 1356 | * It also initializes the page table and the address allocator data |
| 1357 | * structures required for the dma_ops interface | 1357 | * structures required for the dma_ops interface |
| 1358 | */ | 1358 | */ |
| 1359 | static struct dma_ops_domain *dma_ops_domain_alloc(void) | 1359 | static struct dma_ops_domain *dma_ops_domain_alloc(void) |
| @@ -103,7 +103,7 @@ struct dw_spi_reg { · 102 unmodified lines | |||
| 103 | static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0; | 103 | static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0; |
| 104 | 104 | ||
| 105 | static u32 *pclk_spi0; | 105 | static u32 *pclk_spi0; |
| 106 | /* Always contains an accessable address, start with 0 */ | 106 | /* Always contains an accessible address, start with 0 */ |
| 107 | static struct dw_spi_reg *pspi; | 107 | static struct dw_spi_reg *pspi; |
| 108 | 108 | ||
| 109 | static struct kmsg_dumper dw_dumper; | 109 | static struct kmsg_dumper dw_dumper; |
| @@ -124,7 +124,7 @@ ENTRY(startup_32) · 123 unmodified lines | |||
| 124 | movsl | 124 | movsl |
| 125 | movl pa(boot_params) + NEW_CL_POINTER,%esi | 125 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
| 126 | andl %esi,%esi | 126 | andl %esi,%esi |
| 127 | jz 1f # No comand line | 127 | jz 1f # No command line |
| 128 | movl $pa(boot_command_line),%edi | 128 | movl $pa(boot_command_line),%edi |
| 129 | movl $(COMMAND_LINE_SIZE/4),%ecx | 129 | movl $(COMMAND_LINE_SIZE/4),%ecx |
| 130 | rep | 130 | rep |
| @@ -1030,7 +1030,7 @@ cfq_find_alloc_cfqg(struct cfq_data *cfqd, struct cgroup *cgroup, int create) · 1029 unmodified lines | |||
| 1030 | 1030 | ||
| 1031 | /* | 1031 | /* |
| 1032 | * Add group onto cgroup list. It might happen that bdi->dev is | 1032 | * Add group onto cgroup list. It might happen that bdi->dev is |
| 1033 | * not initiliazed yet. Initialize this new group without major | 1033 | * not initialized yet. Initialize this new group without major |
| 1034 | * and minor info and this info will be filled in once a new thread | 1034 | * and minor info and this info will be filled in once a new thread |
| 1035 | * comes for IO. See code above. | 1035 | * comes for IO. See code above. |
| 1036 | */ | 1036 | */ |
| @@ -93,7 +93,7 @@ · 92 unmodified lines | |||
| 93 | 93 | ||
| 94 | #define AOPOBJ_AML_CONSTANT 0x01 /* Integer is an AML constant */ | 94 | #define AOPOBJ_AML_CONSTANT 0x01 /* Integer is an AML constant */ |
| 95 | #define AOPOBJ_STATIC_POINTER 0x02 /* Data is part of an ACPI table, don't delete */ | 95 | #define AOPOBJ_STATIC_POINTER 0x02 /* Data is part of an ACPI table, don't delete */ |
| 96 | #define AOPOBJ_DATA_VALID 0x04 /* Object is intialized and data is valid */ | 96 | #define AOPOBJ_DATA_VALID 0x04 /* Object is initialized and data is valid */ |
| 97 | #define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */ | 97 | #define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */ |
| 98 | #define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */ | 98 | #define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */ |
| 99 | #define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */ | 99 | #define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */ |
| @@ -2240,7 +2240,7 @@ int ata_dev_configure(struct ata_device *dev) · 2239 unmodified lines | |||
| 2240 | if (id[ATA_ID_CFA_KEY_MGMT] & 1) | 2240 | if (id[ATA_ID_CFA_KEY_MGMT] & 1) |
| 2241 | ata_dev_printk(dev, KERN_WARNING, | 2241 | ata_dev_printk(dev, KERN_WARNING, |
| 2242 | "supports DRM functions and may " | 2242 | "supports DRM functions and may " |
| 2243 | "not be fully accessable.\n"); | 2243 | "not be fully accessible.\n"); |
| 2244 | snprintf(revbuf, 7, "CFA"); | 2244 | snprintf(revbuf, 7, "CFA"); |
| 2245 | } else { | 2245 | } else { |
| 2246 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | 2246 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); |
| @@ -2248,7 +2248,7 @@ int ata_dev_configure(struct ata_device *dev) · 1 unmodified line | |||
| 2248 | if (ata_id_has_tpm(id)) | 2248 | if (ata_id_has_tpm(id)) |
| 2249 | ata_dev_printk(dev, KERN_WARNING, | 2249 | ata_dev_printk(dev, KERN_WARNING, |
| 2250 | "supports DRM functions and may " | 2250 | "supports DRM functions and may " |
| 2251 | "not be fully accessable.\n"); | 2251 | "not be fully accessible.\n"); |
| 2252 | } | 2252 | } |
| 2253 | 2253 | ||
| 2254 | dev->n_sectors = ata_id_n_sectors(id); | 2254 | dev->n_sectors = ata_id_n_sectors(id); |
| @@ -370,7 +370,7 @@ static int __devinit vsc_sata_init_one(struct pci_dev *pdev, · 369 unmodified lines | |||
| 370 | if (pci_resource_len(pdev, 0) == 0) | 370 | if (pci_resource_len(pdev, 0) == 0) |
| 371 | return -ENODEV; | 371 | return -ENODEV; |
| 372 | 372 | ||
| 373 | /* map IO regions and intialize host accordingly */ | 373 | /* map IO regions and initialize host accordingly */ |
| 374 | rc = pcim_iomap_regions(pdev, 1 << VSC_MMIO_BAR, DRV_NAME); | 374 | rc = pcim_iomap_regions(pdev, 1 << VSC_MMIO_BAR, DRV_NAME); |
| 375 | if (rc == -EBUSY) | 375 | if (rc == -EBUSY) |
| 376 | pcim_pin_device(pdev); | 376 | pcim_pin_device(pdev); |
| @@ -572,7 +572,7 @@ struct idt77252_dev · 571 unmodified lines | |||
| 572 | #define SAR_STAT_TSQF 0x00001000 /* Transmit Status Queue full */ | 572 | #define SAR_STAT_TSQF 0x00001000 /* Transmit Status Queue full */ |
| 573 | #define SAR_STAT_TMROF 0x00000800 /* Timer overflow */ | 573 | #define SAR_STAT_TMROF 0x00000800 /* Timer overflow */ |
| 574 | #define SAR_STAT_PHYI 0x00000400 /* PHY device Interrupt flag */ | 574 | #define SAR_STAT_PHYI 0x00000400 /* PHY device Interrupt flag */ |
| 575 | #define SAR_STAT_CMDBZ 0x00000200 /* ABR SAR Comand Busy Flag */ | 575 | #define SAR_STAT_CMDBZ 0x00000200 /* ABR SAR Command Busy Flag */ |
| 576 | #define SAR_STAT_FBQ3A 0x00000100 /* Free Buffer Queue 3 Attention */ | 576 | #define SAR_STAT_FBQ3A 0x00000100 /* Free Buffer Queue 3 Attention */ |
| 577 | #define SAR_STAT_FBQ2A 0x00000080 /* Free Buffer Queue 2 Attention */ | 577 | #define SAR_STAT_FBQ2A 0x00000080 /* Free Buffer Queue 2 Attention */ |
| 578 | #define SAR_STAT_RSQF 0x00000040 /* Receive Status Queue full */ | 578 | #define SAR_STAT_RSQF 0x00000040 /* Receive Status Queue full */ |
| @@ -2063,7 +2063,7 @@ static int tx_init(struct atm_dev *dev) · 2062 unmodified lines | |||
| 2063 | - UBR Table size is 4K | 2063 | - UBR Table size is 4K |
| 2064 | - UBR wait queue is 4K | 2064 | - UBR wait queue is 4K |
| 2065 | since the table and wait queues are contiguous, all the bytes | 2065 | since the table and wait queues are contiguous, all the bytes |
| 2066 | can be initialized by one memeset. | 2066 | can be initialized by one memeset. |
| 2067 | */ | 2067 | */ |
| 2068 | 2068 | ||
| 2069 | vcsize_sel = 0; | 2069 | vcsize_sel = 0; |
| @@ -2089,7 +2089,7 @@ static int tx_init(struct atm_dev *dev) · 19 unmodified lines | |||
| 2089 | - ABR Table size is 2K | 2089 | - ABR Table size is 2K |
| 2090 | - ABR wait queue is 2K | 2090 | - ABR wait queue is 2K |
| 2091 | since the table and wait queues are contiguous, all the bytes | 2091 | since the table and wait queues are contiguous, all the bytes |
| 2092 | can be intialized by one memeset. | 2092 | can be initialized by one memeset. |
| 2093 | */ | 2093 | */ |
| 2094 | i = ABR_SCHED_TABLE * iadev->memSize; | 2094 | i = ABR_SCHED_TABLE * iadev->memSize; |
| 2095 | writew((i >> 11) & 0xffff, iadev->seg_reg+ABR_SBPTR_BASE); | 2095 | writew((i >> 11) & 0xffff, iadev->seg_reg+ABR_SBPTR_BASE); |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | |||
| 8 | * | 8 | * |
| 9 | * | 9 | * |
| 10 | * The driver model core calls device_pm_add() when a device is registered. | 10 | * The driver model core calls device_pm_add() when a device is registered. |
| 11 | * This will intialize the embedded device_pm_info object in the device | 11 | * This will initialize the embedded device_pm_info object in the device |
| 12 | * and add it to the list of power-controlled devices. sysfs entries for | 12 | * and add it to the list of power-controlled devices. sysfs entries for |
| 13 | * controlling device power management will also be added. | 13 | * controlling device power management will also be added. |
| 14 | * | 14 | * |
| @@ -1060,8 +1060,8 @@ static irqreturn_t intel_mid_dma_interrupt2(int irq, void *data) · 1059 unmodified lines | |||
| 1060 | * mid_setup_dma - Setup the DMA controller | 1060 | * mid_setup_dma - Setup the DMA controller |
| 1061 | * @pdev: Controller PCI device structure | 1061 | * @pdev: Controller PCI device structure |
| 1062 | * | 1062 | * |
| 1063 | * Initilize the DMA controller, channels, registers with DMA engine, | 1063 | * Initialize the DMA controller, channels, registers with DMA engine, |
| 1064 | * ISR. Initilize DMA controller channels. | 1064 | * ISR. Initialize DMA controller channels. |
| 1065 | */ | 1065 | */ |
| 1066 | static int mid_setup_dma(struct pci_dev *pdev) | 1066 | static int mid_setup_dma(struct pci_dev *pdev) |
| 1067 | { | 1067 | { |
| @@ -1219,7 +1219,7 @@ static void middma_shutdown(struct pci_dev *pdev) · 151 unmodified lines | |||
| 1219 | * @pdev: Controller PCI device structure | 1219 | * @pdev: Controller PCI device structure |
| 1220 | * @id: pci device id structure | 1220 | * @id: pci device id structure |
| 1221 | * | 1221 | * |
| 1222 | * Initilize the PCI device, map BARs, query driver data. | 1222 | * Initialize the PCI device, map BARs, query driver data. |
| 1223 | * Call setup_dma to complete contoller and chan initilzation | 1223 | * Call setup_dma to complete contoller and chan initilzation |
| 1224 | */ | 1224 | */ |
| 1225 | static int __devinit intel_mid_dma_probe(struct pci_dev *pdev, | 1225 | static int __devinit intel_mid_dma_probe(struct pci_dev *pdev, |
| @@ -99,7 +99,7 @@ struct amd8131_dev_info { · 98 unmodified lines | |||
| 99 | 99 | ||
| 100 | /* | 100 | /* |
| 101 | * AMD8131 chipset has two pairs of PCIX Bridge and related IOAPIC | 101 | * AMD8131 chipset has two pairs of PCIX Bridge and related IOAPIC |
| 102 | * Controler, and ATCA-6101 has two AMD8131 chipsets, so there are | 102 | * Controller, and ATCA-6101 has two AMD8131 chipsets, so there are |
| 103 | * four PCIX Bridges on ATCA-6101 altogether. | 103 | * four PCIX Bridges on ATCA-6101 altogether. |
| 104 | * | 104 | * |
| 105 | * These PCIX Bridges share the same PCI Device ID and are all of | 105 | * These PCIX Bridges share the same PCI Device ID and are all of |
| @@ -47,7 +47,7 @@ static void cell_edac_count_ce(struct mem_ctl_info *mci, int chan, u64 ar) · 46 unmodified lines | |||
| 47 | offset = address & ~PAGE_MASK; | 47 | offset = address & ~PAGE_MASK; |
| 48 | syndrome = (ar & 0x000000001fe00000ul) >> 21; | 48 | syndrome = (ar & 0x000000001fe00000ul) >> 21; |
| 49 | 49 | ||
| 50 | /* TODO: Decoding of the error addresss */ | 50 | /* TODO: Decoding of the error address */ |
| 51 | edac_mc_handle_ce(mci, csrow->first_page + pfn, offset, | 51 | edac_mc_handle_ce(mci, csrow->first_page + pfn, offset, |
| 52 | syndrome, 0, chan, ""); | 52 | syndrome, 0, chan, ""); |
| 53 | } | 53 | } |
| @@ -68,7 +68,7 @@ static void cell_edac_count_ue(struct mem_ctl_info *mci, int chan, u64 ar) · 14 unmodified lines | |||
| 68 | pfn = address >> PAGE_SHIFT; | 68 | pfn = address >> PAGE_SHIFT; |
| 69 | offset = address & ~PAGE_MASK; | 69 | offset = address & ~PAGE_MASK; |
| 70 | 70 | ||
| 71 | /* TODO: Decoding of the error addresss */ | 71 | /* TODO: Decoding of the error address */ |
| 72 | edac_mc_handle_ue(mci, csrow->first_page + pfn, offset, 0, ""); | 72 | edac_mc_handle_ue(mci, csrow->first_page + pfn, offset, 0, ""); |
| 73 | } | 73 | } |
| 74 | 74 | ||
| @@ -258,7 +258,7 @@ enum scrub_type { · 257 unmodified lines | |||
| 258 | * for single channel are 64 bits, for dual channel 128 | 258 | * for single channel are 64 bits, for dual channel 128 |
| 259 | * bits. | 259 | * bits. |
| 260 | * | 260 | * |
| 261 | * Single-Ranked stick: A Single-ranked stick has 1 chip-select row of memmory. | 261 | * Single-Ranked stick: A Single-ranked stick has 1 chip-select row of memory. |
| 262 | * Motherboards commonly drive two chip-select pins to | 262 | * Motherboards commonly drive two chip-select pins to |
| 263 | * a memory stick. A single-ranked stick, will occupy | 263 | * a memory stick. A single-ranked stick, will occupy |
| 264 | * only one of those rows. The other will be unused. | 264 | * only one of those rows. The other will be unused. |
| @@ -873,7 +873,7 @@ ppc4xx_edac_get_mtype(u32 mcopt1) · 872 unmodified lines | |||
| 873 | } | 873 | } |
| 874 | 874 | ||
| 875 | /** | 875 | /** |
| 876 | * ppc4xx_edac_init_csrows - intialize driver instance rows | 876 | * ppc4xx_edac_init_csrows - initialize driver instance rows |
| 877 | * @mci: A pointer to the EDAC memory controller instance | 877 | * @mci: A pointer to the EDAC memory controller instance |
| 878 | * associated with the ibm,sdram-4xx-ddr2 controller for which | 878 | * associated with the ibm,sdram-4xx-ddr2 controller for which |
| 879 | * the csrows (i.e. banks/ranks) are being initialized. | 879 | * the csrows (i.e. banks/ranks) are being initialized. |
| @@ -881,7 +881,7 @@ ppc4xx_edac_get_mtype(u32 mcopt1) · 1 unmodified line | |||
| 881 | * currently set for the controller, from which bank width | 881 | * currently set for the controller, from which bank width |
| 882 | * and memory typ information is derived. | 882 | * and memory typ information is derived. |
| 883 | * | 883 | * |
| 884 | * This routine intializes the virtual "chip select rows" associated | 884 | * This routine initializes the virtual "chip select rows" associated |
| 885 | * with the EDAC memory controller instance. An ibm,sdram-4xx-ddr2 | 885 | * with the EDAC memory controller instance. An ibm,sdram-4xx-ddr2 |
| 886 | * controller bank/rank is mapped to a row. | 886 | * controller bank/rank is mapped to a row. |
| 887 | * | 887 | * |
| @@ -992,7 +992,7 @@ ppc4xx_edac_init_csrows(struct mem_ctl_info *mci, u32 mcopt1) · 104 unmodified lines | |||
| 992 | } | 992 | } |
| 993 | 993 | ||
| 994 | /** | 994 | /** |
| 995 | * ppc4xx_edac_mc_init - intialize driver instance | 995 | * ppc4xx_edac_mc_init - initialize driver instance |
| 996 | * @mci: A pointer to the EDAC memory controller instance being | 996 | * @mci: A pointer to the EDAC memory controller instance being |
| 997 | * initialized. | 997 | * initialized. |
| 998 | * @op: A pointer to the OpenFirmware device tree node associated | 998 | * @op: A pointer to the OpenFirmware device tree node associated |
| @@ -1314,7 +1314,7 @@ typedef struct _GET_ENGINE_CLOCK_PARAMETERS · 1313 unmodified lines | |||
| 1314 | typedef struct _READ_EDID_FROM_HW_I2C_DATA_PARAMETERS | 1314 | typedef struct _READ_EDID_FROM_HW_I2C_DATA_PARAMETERS |
| 1315 | { | 1315 | { |
| 1316 | USHORT usPrescale; //Ratio between Engine clock and I2C clock | 1316 | USHORT usPrescale; //Ratio between Engine clock and I2C clock |
| 1317 | USHORT usVRAMAddress; //Adress in Frame Buffer where to pace raw EDID | 1317 | USHORT usVRAMAddress; //Address in Frame Buffer where to pace raw EDID |
| 1318 | USHORT usStatus; //When use output: lower byte EDID checksum, high byte hardware status | 1318 | USHORT usStatus; //When use output: lower byte EDID checksum, high byte hardware status |
| 1319 | //WHen use input: lower byte as 'byte to read':currently limited to 128byte or 1byte | 1319 | //WHen use input: lower byte as 'byte to read':currently limited to 128byte or 1byte |
| 1320 | UCHAR ucSlaveAddr; //Read from which slave | 1320 | UCHAR ucSlaveAddr; //Read from which slave |
| @@ -434,7 +434,7 @@ static int read_i2c(struct nmk_i2c_dev *dev) · 433 unmodified lines | |||
| 434 | } | 434 | } |
| 435 | 435 | ||
| 436 | if (timeout == 0) { | 436 | if (timeout == 0) { |
| 437 | /* controler has timedout, re-init the h/w */ | 437 | /* controller has timedout, re-init the h/w */ |
| 438 | dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); | 438 | dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); |
| 439 | (void) init_hw(dev); | 439 | (void) init_hw(dev); |
| 440 | status = -ETIMEDOUT; | 440 | status = -ETIMEDOUT; |
| @@ -498,7 +498,7 @@ static int write_i2c(struct nmk_i2c_dev *dev) · 57 unmodified lines | |||
| 498 | } | 498 | } |
| 499 | 499 | ||
| 500 | if (timeout == 0) { | 500 | if (timeout == 0) { |
| 501 | /* controler has timedout, re-init the h/w */ | 501 | /* controller has timedout, re-init the h/w */ |
| 502 | dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); | 502 | dev_err(&dev->pdev->dev, "controller timed out, re-init h/w\n"); |
| 503 | (void) init_hw(dev); | 503 | (void) init_hw(dev); |
| 504 | status = -ETIMEDOUT; | 504 | status = -ETIMEDOUT; |
| @@ -689,7 +689,7 @@ struct t3_swrq { · 688 unmodified lines | |||
| 689 | * A T3 WQ implements both the SQ and RQ. | 689 | * A T3 WQ implements both the SQ and RQ. |
| 690 | */ | 690 | */ |
| 691 | struct t3_wq { | 691 | struct t3_wq { |
| 692 | union t3_wr *queue; /* DMA accessable memory */ | 692 | union t3_wr *queue; /* DMA accessible memory */ |
| 693 | dma_addr_t dma_addr; /* DMA address for HW */ | 693 | dma_addr_t dma_addr; /* DMA address for HW */ |
| 694 | DEFINE_DMA_UNMAP_ADDR(mapping); /* unmap kruft */ | 694 | DEFINE_DMA_UNMAP_ADDR(mapping); /* unmap kruft */ |
| 695 | u32 error; /* 1 once we go to ERROR */ | 695 | u32 error; /* 1 once we go to ERROR */ |
| @@ -314,7 +314,7 @@ MODULE_PARM_DESC(txselect, \ · 313 unmodified lines | |||
| 314 | #define krp_serdesctrl KREG_IBPORT_IDX(IBSerdesCtrl) | 314 | #define krp_serdesctrl KREG_IBPORT_IDX(IBSerdesCtrl) |
| 315 | 315 | ||
| 316 | /* | 316 | /* |
| 317 | * Per-context kernel registers. Acess only with qib_read_kreg_ctxt() | 317 | * Per-context kernel registers. Access only with qib_read_kreg_ctxt() |
| 318 | * or qib_write_kreg_ctxt() | 318 | * or qib_write_kreg_ctxt() |
| 319 | */ | 319 | */ |
| 320 | #define krc_rcvhdraddr KREG_IDX(RcvHdrAddr0) | 320 | #define krc_rcvhdraddr KREG_IDX(RcvHdrAddr0) |
| @@ -610,7 +610,7 @@ config TOUCHSCREEN_USB_ZYTRONIC · 609 unmodified lines | |||
| 610 | 610 | ||
| 611 | config TOUCHSCREEN_USB_ETT_TC45USB | 611 | config TOUCHSCREEN_USB_ETT_TC45USB |
| 612 | default y | 612 | default y |
| 613 | bool "ET&T USB series TC4UM/TC5UH touchscreen controler support" if EMBEDDED | 613 | bool "ET&T USB series TC4UM/TC5UH touchscreen controller support" if EMBEDDED |
| 614 | depends on TOUCHSCREEN_USB_COMPOSITE | 614 | depends on TOUCHSCREEN_USB_COMPOSITE |
| 615 | 615 | ||
| 616 | config TOUCHSCREEN_USB_NEXIO | 616 | config TOUCHSCREEN_USB_NEXIO |
| @@ -2318,7 +2318,7 @@ static int gigaset_probe(struct usb_interface *interface, · 2317 unmodified lines | |||
| 2318 | __func__, le16_to_cpu(udev->descriptor.idVendor), | 2318 | __func__, le16_to_cpu(udev->descriptor.idVendor), |
| 2319 | le16_to_cpu(udev->descriptor.idProduct)); | 2319 | le16_to_cpu(udev->descriptor.idProduct)); |
| 2320 | 2320 | ||
| 2321 | /* allocate memory for our device state and intialize it */ | 2321 | /* allocate memory for our device state and initialize it */ |
| 2322 | cs = gigaset_initcs(driver, BAS_CHANNELS, 0, 0, cidmode, | 2322 | cs = gigaset_initcs(driver, BAS_CHANNELS, 0, 0, cidmode, |
| 2323 | GIGASET_MODULENAME); | 2323 | GIGASET_MODULENAME); |
| 2324 | if (!cs) | 2324 | if (!cs) |
| @@ -2576,7 +2576,7 @@ static int __init bas_gigaset_init(void) · 251 unmodified lines | |||
| 2576 | { | 2576 | { |
| 2577 | int result; | 2577 | int result; |
| 2578 | 2578 | ||
| 2579 | /* allocate memory for our driver state and intialize it */ | 2579 | /* allocate memory for our driver state and initialize it */ |
| 2580 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, | 2580 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, |
| 2581 | GIGASET_MODULENAME, GIGASET_DEVNAME, | 2581 | GIGASET_MODULENAME, GIGASET_DEVNAME, |
| 2582 | &gigops, THIS_MODULE); | 2582 | &gigops, THIS_MODULE); |
| @@ -513,7 +513,7 @@ gigaset_tty_open(struct tty_struct *tty) · 512 unmodified lines | |||
| 513 | return -ENODEV; | 513 | return -ENODEV; |
| 514 | } | 514 | } |
| 515 | 515 | ||
| 516 | /* allocate memory for our device state and intialize it */ | 516 | /* allocate memory for our device state and initialize it */ |
| 517 | cs = gigaset_initcs(driver, 1, 1, 0, cidmode, GIGASET_MODULENAME); | 517 | cs = gigaset_initcs(driver, 1, 1, 0, cidmode, GIGASET_MODULENAME); |
| 518 | if (!cs) | 518 | if (!cs) |
| 519 | goto error; | 519 | goto error; |
| @@ -771,7 +771,7 @@ static int __init ser_gigaset_init(void) · 251 unmodified lines | |||
| 771 | return rc; | 771 | return rc; |
| 772 | } | 772 | } |
| 773 | 773 | ||
| 774 | /* allocate memory for our driver state and intialize it */ | 774 | /* allocate memory for our driver state and initialize it */ |
| 775 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, | 775 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, |
| 776 | GIGASET_MODULENAME, GIGASET_DEVNAME, | 776 | GIGASET_MODULENAME, GIGASET_DEVNAME, |
| 777 | &ops, THIS_MODULE); | 777 | &ops, THIS_MODULE); |
| @@ -695,7 +695,7 @@ static int gigaset_probe(struct usb_interface *interface, · 694 unmodified lines | |||
| 695 | 695 | ||
| 696 | dev_info(&udev->dev, "%s: Device matched ... !\n", __func__); | 696 | dev_info(&udev->dev, "%s: Device matched ... !\n", __func__); |
| 697 | 697 | ||
| 698 | /* allocate memory for our device state and intialize it */ | 698 | /* allocate memory for our device state and initialize it */ |
| 699 | cs = gigaset_initcs(driver, 1, 1, 0, cidmode, GIGASET_MODULENAME); | 699 | cs = gigaset_initcs(driver, 1, 1, 0, cidmode, GIGASET_MODULENAME); |
| 700 | if (!cs) | 700 | if (!cs) |
| 701 | return -ENODEV; | 701 | return -ENODEV; |
| @@ -894,7 +894,7 @@ static int __init usb_gigaset_init(void) · 192 unmodified lines | |||
| 894 | { | 894 | { |
| 895 | int result; | 895 | int result; |
| 896 | 896 | ||
| 897 | /* allocate memory for our driver state and intialize it */ | 897 | /* allocate memory for our driver state and initialize it */ |
| 898 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, | 898 | driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, |
| 899 | GIGASET_MODULENAME, GIGASET_DEVNAME, | 899 | GIGASET_MODULENAME, GIGASET_DEVNAME, |
| 900 | &ops, THIS_MODULE); | 900 | &ops, THIS_MODULE); |
| @@ -29,7 +29,7 @@ struct isac_hw { · 28 unmodified lines | |||
| 29 | u32 type; | 29 | u32 type; |
| 30 | u32 off; /* offset to isac regs */ | 30 | u32 off; /* offset to isac regs */ |
| 31 | char *name; | 31 | char *name; |
| 32 | spinlock_t *hwlock; /* lock HW acccess */ | 32 | spinlock_t *hwlock; /* lock HW access */ |
| 33 | read_reg_func *read_reg; | 33 | read_reg_func *read_reg; |
| 34 | write_reg_func *write_reg; | 34 | write_reg_func *write_reg; |
| 35 | fifo_func *read_fifo; | 35 | fifo_func *read_fifo; |
| @@ -70,7 +70,7 @@ struct ipac_hw { · 34 unmodified lines | |||
| 70 | struct hscx_hw hscx[2]; | 70 | struct hscx_hw hscx[2]; |
| 71 | char *name; | 71 | char *name; |
| 72 | void *hw; | 72 | void *hw; |
| 73 | spinlock_t *hwlock; /* lock HW acccess */ | 73 | spinlock_t *hwlock; /* lock HW access */ |
| 74 | struct module *owner; | 74 | struct module *owner; |
| 75 | u32 type; | 75 | u32 type; |
| 76 | read_reg_func *read_reg; | 76 | read_reg_func *read_reg; |
| @@ -44,7 +44,7 @@ struct isar_ch { · 43 unmodified lines | |||
| 44 | struct isar_hw { | 44 | struct isar_hw { |
| 45 | struct isar_ch ch[2]; | 45 | struct isar_ch ch[2]; |
| 46 | void *hw; | 46 | void *hw; |
| 47 | spinlock_t *hwlock; /* lock HW acccess */ | 47 | spinlock_t *hwlock; /* lock HW access */ |
| 48 | char *name; | 48 | char *name; |
| 49 | struct module *owner; | 49 | struct module *owner; |
| 50 | read_reg_func *read_reg; | 50 | read_reg_func *read_reg; |
| @@ -1427,8 +1427,8 @@ modeisar(struct BCState *bcs, int mode, int bc) · 1426 unmodified lines | |||
| 1427 | &bcs->hw.isar.reg->Flags)) | 1427 | &bcs->hw.isar.reg->Flags)) |
| 1428 | bcs->hw.isar.dpath = 1; | 1428 | bcs->hw.isar.dpath = 1; |
| 1429 | else { | 1429 | else { |
| 1430 | printk(KERN_WARNING"isar modeisar analog funktions only with DP1\n"); | 1430 | printk(KERN_WARNING"isar modeisar analog functions only with DP1\n"); |
| 1431 | debugl1(cs, "isar modeisar analog funktions only with DP1"); | 1431 | debugl1(cs, "isar modeisar analog functions only with DP1"); |
| 1432 | return(1); | 1432 | return(1); |
| 1433 | } | 1433 | } |
| 1434 | break; | 1434 | break; |
| @@ -261,7 +261,7 @@ static u16 ns_to_pulse_width_count(u32 ns, u16 divider) · 260 unmodified lines | |||
| 261 | u32 rem; | 261 | u32 rem; |
| 262 | 262 | ||
| 263 | /* | 263 | /* |
| 264 | * The 2 lsb's of the pulse width timer count are not accessable, hence | 264 | * The 2 lsb's of the pulse width timer count are not accessible, hence |
| 265 | * the (1 << 2) | 265 | * the (1 << 2) |
| 266 | */ | 266 | */ |
| 267 | n = ((u64) ns) * CX25840_IR_REFCLK_FREQ / 1000000; /* millicycles */ | 267 | n = ((u64) ns) * CX25840_IR_REFCLK_FREQ / 1000000; /* millicycles */ |
| @@ -33,7 +33,7 @@ extern spinlock_t vpif_lock; · 32 unmodified lines | |||
| 33 | #define regr(reg) readl((reg) + vpif_base) | 33 | #define regr(reg) readl((reg) + vpif_base) |
| 34 | #define regw(value, reg) writel(value, (reg + vpif_base)) | 34 | #define regw(value, reg) writel(value, (reg + vpif_base)) |
| 35 | 35 | ||
| 36 | /* Register Addresss Offsets */ | 36 | /* Register Address Offsets */ |
| 37 | #define VPIF_PID (0x0000) | 37 | #define VPIF_PID (0x0000) |
| 38 | #define VPIF_CH0_CTRL (0x0004) | 38 | #define VPIF_CH0_CTRL (0x0004) |
| 39 | #define VPIF_CH1_CTRL (0x0008) | 39 | #define VPIF_CH1_CTRL (0x0008) |
| @@ -85,7 +85,7 @@ enum vpss_platform_type { · 84 unmodified lines | |||
| 85 | /* | 85 | /* |
| 86 | * vpss operations. Depends on platform. Not all functions are available | 86 | * vpss operations. Depends on platform. Not all functions are available |
| 87 | * on all platforms. The api, first check if a functio is available before | 87 | * on all platforms. The api, first check if a functio is available before |
| 88 | * invoking it. In the probe, the function ptrs are intialized based on | 88 | * invoking it. In the probe, the function ptrs are initialized based on |
| 89 | * vpss name. vpss name can be "dm355_vpss", "dm644x_vpss" etc. | 89 | * vpss name. vpss name can be "dm355_vpss", "dm644x_vpss" etc. |
| 90 | */ | 90 | */ |
| 91 | struct vpss_hw_ops { | 91 | struct vpss_hw_ops { |
| @@ -1286,7 +1286,7 @@ static int omap_vout_release(struct file *file) · 1285 unmodified lines | |||
| 1286 | videobuf_mmap_free(q); | 1286 | videobuf_mmap_free(q); |
| 1287 | 1287 | ||
| 1288 | /* Even if apply changes fails we should continue | 1288 | /* Even if apply changes fails we should continue |
| 1289 | freeing allocated memeory */ | 1289 | freeing allocated memory */ |
| 1290 | if (vout->streaming) { | 1290 | if (vout->streaming) { |
| 1291 | u32 mask = 0; | 1291 | u32 mask = 0; |
| 1292 | 1292 | ||
| @@ -653,8 +653,8 @@ static irqreturn_t saa7164_irq(int irq, void *dev_id) · 652 unmodified lines | |||
| 653 | goto out; | 653 | goto out; |
| 654 | } | 654 | } |
| 655 | 655 | ||
| 656 | /* Check that the hardware is accessable. If the status bytes are | 656 | /* Check that the hardware is accessible. If the status bytes are |
| 657 | * 0xFF then the device is not accessable, the the IRQ belongs | 657 | * 0xFF then the device is not accessible, the the IRQ belongs |
| 658 | * to another driver. | 658 | * to another driver. |
| 659 | * 4 x u32 interrupt registers. | 659 | * 4 x u32 interrupt registers. |
| 660 | */ | 660 | */ |
| @@ -147,7 +147,7 @@ enum sn9c102_i2c_interface { · 146 unmodified lines | |||
| 147 | 147 | ||
| 148 | struct sn9c102_sensor { | 148 | struct sn9c102_sensor { |
| 149 | char name[32], /* sensor name */ | 149 | char name[32], /* sensor name */ |
| 150 | maintainer[64]; /* name of the mantainer <email> */ | 150 | maintainer[64]; /* name of the maintainer <email> */ |
| 151 | 151 | ||
| 152 | enum sn9c102_bridge supported_bridge; /* supported SN9C1xx bridges */ | 152 | enum sn9c102_bridge supported_bridge; /* supported SN9C1xx bridges */ |
| 153 | 153 | ||
| @@ -95,7 +95,7 @@ struct zoran_params { · 94 unmodified lines | |||
| 95 | 95 | ||
| 96 | int quality; /* Measure for quality of compressed images. | 96 | int quality; /* Measure for quality of compressed images. |
| 97 | * Scales linearly with the size of the compressed images. | 97 | * Scales linearly with the size of the compressed images. |
| 98 | * Must be beetween 0 and 100, 100 is a compression | 98 | * Must be between 0 and 100, 100 is a compression |
| 99 | * ratio of 1:4 */ | 99 | * ratio of 1:4 */ |
| 100 | 100 | ||
| 101 | int odd_even; /* Which field should come first ??? */ | 101 | int odd_even; /* Which field should come first ??? */ |
| @@ -268,7 +268,7 @@ · 267 unmodified lines | |||
| 268 | 268 | ||
| 269 | /* Compatibility Error : IR Disabled */ | 269 | /* Compatibility Error : IR Disabled */ |
| 270 | #define IR_LOGINFO_COMPAT_ERROR_RAID_DISABLED (0x00010030) | 270 | #define IR_LOGINFO_COMPAT_ERROR_RAID_DISABLED (0x00010030) |
| 271 | /* Compatibility Error : Inquiry Comand failed */ | 271 | /* Compatibility Error : Inquiry Command failed */ |
| 272 | #define IR_LOGINFO_COMPAT_ERROR_INQUIRY_FAILED (0x00010031) | 272 | #define IR_LOGINFO_COMPAT_ERROR_INQUIRY_FAILED (0x00010031) |
| 273 | /* Compatibility Error : Device not direct access device */ | 273 | /* Compatibility Error : Device not direct access device */ |
| 274 | #define IR_LOGINFO_COMPAT_ERROR_NOT_DIRECT_ACCESS (0x00010032) | 274 | #define IR_LOGINFO_COMPAT_ERROR_NOT_DIRECT_ACCESS (0x00010032) |
| @@ -7977,7 +7977,7 @@ mpt_spi_log_info(MPT_ADAPTER *ioc, u32 log_info) · 7976 unmodified lines | |||
| 7977 | NULL, /* 2Eh */ | 7977 | NULL, /* 2Eh */ |
| 7978 | NULL, /* 2Fh */ | 7978 | NULL, /* 2Fh */ |
| 7979 | "Compatibility Error: IR Disabled", /* 30h */ | 7979 | "Compatibility Error: IR Disabled", /* 30h */ |
| 7980 | "Compatibility Error: Inquiry Comand Failed", /* 31h */ | 7980 | "Compatibility Error: Inquiry Command Failed", /* 31h */ |
| 7981 | "Compatibility Error: Device not Direct Access " | 7981 | "Compatibility Error: Device not Direct Access " |
| 7982 | "Device ", /* 32h */ | 7982 | "Device ", /* 32h */ |
| 7983 | "Compatibility Error: Removable Device Found", /* 33h */ | 7983 | "Compatibility Error: Removable Device Found", /* 33h */ |
| @@ -1146,7 +1146,7 @@ mptsas_target_reset_queue(MPT_ADAPTER *ioc, · 1145 unmodified lines | |||
| 1146 | * | 1146 | * |
| 1147 | * This function will delete scheduled target reset from the list and | 1147 | * This function will delete scheduled target reset from the list and |
| 1148 | * try to send next target reset. This will be called from completion | 1148 | * try to send next target reset. This will be called from completion |
| 1149 | * context of any Task managment command. | 1149 | * context of any Task management command. |
| 1150 | */ | 1150 | */ |
| 1151 | 1151 | ||
| 1152 | void | 1152 | void |
| @@ -309,7 +309,7 @@ static inline void i2o_block_request_free(struct i2o_block_request *ireq) · 308 unmodified lines | |||
| 309 | * @ireq: I2O block request | 309 | * @ireq: I2O block request |
| 310 | * @mptr: message body pointer | 310 | * @mptr: message body pointer |
| 311 | * | 311 | * |
| 312 | * Builds the SG list and map it to be accessable by the controller. | 312 | * Builds the SG list and map it to be accessible by the controller. |
| 313 | * | 313 | * |
| 314 | * Returns 0 on failure or 1 on success. | 314 | * Returns 0 on failure or 1 on success. |
| 315 | */ | 315 | */ |
| @@ -313,7 +313,7 @@ static int __init charlcd_probe(struct platform_device *pdev) · 312 unmodified lines | |||
| 313 | INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work); | 313 | INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work); |
| 314 | schedule_delayed_work(&lcd->init_work, 0); | 314 | schedule_delayed_work(&lcd->init_work, 0); |
| 315 | 315 | ||
| 316 | dev_info(&pdev->dev, "initalized ARM character LCD at %08x\n", | 316 | dev_info(&pdev->dev, "initialized ARM character LCD at %08x\n", |
| 317 | lcd->phybase); | 317 | lcd->phybase); |
| 318 | 318 | ||
| 319 | return 0; | 319 | return 0; |
| @@ -257,7 +257,7 @@ static u32 get_card_status(struct mmc_card *card, struct request *req) · 256 unmodified lines | |||
| 257 | cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; | 257 | cmd.flags = MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC; |
| 258 | err = mmc_wait_for_cmd(card->host, &cmd, 0); | 258 | err = mmc_wait_for_cmd(card->host, &cmd, 0); |
| 259 | if (err) | 259 | if (err) |
| 260 | printk(KERN_ERR "%s: error %d sending status comand", | 260 | printk(KERN_ERR "%s: error %d sending status command", |
| 261 | req->rq_disk->disk_name, err); | 261 | req->rq_disk->disk_name, err); |
| 262 | return cmd.resp[0]; | 262 | return cmd.resp[0]; |
| 263 | } | 263 | } |
| @@ -462,7 +462,7 @@ config MMC_SH_MMCIF · 461 unmodified lines | |||
| 462 | tristate "SuperH Internal MMCIF support" | 462 | tristate "SuperH Internal MMCIF support" |
| 463 | depends on MMC_BLOCK && (SUPERH || ARCH_SHMOBILE) | 463 | depends on MMC_BLOCK && (SUPERH || ARCH_SHMOBILE) |
| 464 | help | 464 | help |
| 465 | This selects the MMC Host Interface controler (MMCIF). | 465 | This selects the MMC Host Interface controller (MMCIF). |
| 466 | 466 | ||
| 467 | This driver supports MMCIF in sh7724/sh7757/sh7372. | 467 | This driver supports MMCIF in sh7724/sh7757/sh7372. |
| 468 | 468 | ||
| @@ -192,7 +192,7 @@ static inline void SEND_STOP(struct au1xmmc_host *host) · 191 unmodified lines | |||
| 192 | au_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); | 192 | au_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); |
| 193 | au_sync(); | 193 | au_sync(); |
| 194 | 194 | ||
| 195 | /* Send the stop commmand */ | 195 | /* Send the stop command */ |
| 196 | au_writel(STOP_CMD, HOST_CMD(host)); | 196 | au_writel(STOP_CMD, HOST_CMD(host)); |
| 197 | } | 197 | } |
| 198 | 198 | ||
| @@ -446,7 +446,7 @@ static int sdricoh_init_mmc(struct pci_dev *pci_dev, · 445 unmodified lines | |||
| 446 | mmc->max_seg_size = 1024 * 512; | 446 | mmc->max_seg_size = 1024 * 512; |
| 447 | mmc->max_blk_size = 512; | 447 | mmc->max_blk_size = 512; |
| 448 | 448 | ||
| 449 | /* reset the controler */ | 449 | /* reset the controller */ |
| 450 | if (sdricoh_reset(host)) { | 450 | if (sdricoh_reset(host)) { |
| 451 | dev_dbg(dev, "could not reset\n"); | 451 | dev_dbg(dev, "could not reset\n"); |
| 452 | result = -EIO; | 452 | result = -EIO; |
| @@ -478,7 +478,7 @@ static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev) · 25 unmodified lines | |||
| 478 | dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device" | 478 | dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device" |
| 479 | " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]); | 479 | " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]); |
| 480 | 480 | ||
| 481 | /* search pci cardbus bridge that contains the mmc controler */ | 481 | /* search pci cardbus bridge that contains the mmc controller */ |
| 482 | /* the io region is already claimed by yenta_socket... */ | 482 | /* the io region is already claimed by yenta_socket... */ |
| 483 | while ((pci_dev = | 483 | while ((pci_dev = |
| 484 | pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, | 484 | pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, |
| @@ -821,7 +821,7 @@ retry: · 820 unmodified lines | |||
| 821 | * | 821 | * |
| 822 | * Wait for command done. This is a helper function for nand_wait used when | 822 | * Wait for command done. This is a helper function for nand_wait used when |
| 823 | * we are in interrupt context. May happen when in panic and trying to write | 823 | * we are in interrupt context. May happen when in panic and trying to write |
| 824 | * an oops trough mtdoops. | 824 | * an oops through mtdoops. |
| 825 | */ | 825 | */ |
| 826 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, | 826 | static void panic_nand_wait(struct mtd_info *mtd, struct nand_chip *chip, |
| 827 | unsigned long timeo) | 827 | unsigned long timeo) |
| @@ -4947,7 +4947,7 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) · 4946 unmodified lines | |||
| 4947 | memset(&ilt_cli, 0, sizeof(struct ilt_client_info)); | 4947 | memset(&ilt_cli, 0, sizeof(struct ilt_client_info)); |
| 4948 | memset(&ilt, 0, sizeof(struct bnx2x_ilt)); | 4948 | memset(&ilt, 0, sizeof(struct bnx2x_ilt)); |
| 4949 | 4949 | ||
| 4950 | /* initalize dummy TM client */ | 4950 | /* initialize dummy TM client */ |
| 4951 | ilt_cli.start = 0; | 4951 | ilt_cli.start = 0; |
| 4952 | ilt_cli.end = ILT_NUM_PAGE_ENTRIES - 1; | 4952 | ilt_cli.end = ILT_NUM_PAGE_ENTRIES - 1; |
| 4953 | ilt_cli.client_num = ILT_CLIENT_TM; | 4953 | ilt_cli.client_num = ILT_CLIENT_TM; |
| @@ -1604,7 +1604,7 @@ · 1603 unmodified lines | |||
| 1604 | (~misc_registers_sw_timer_cfg_4.sw_timer_cfg_4[1] ) is set */ | 1604 | (~misc_registers_sw_timer_cfg_4.sw_timer_cfg_4[1] ) is set */ |
| 1605 | #define MISC_REG_SW_TIMER_RELOAD_VAL_4 0xa2fc | 1605 | #define MISC_REG_SW_TIMER_RELOAD_VAL_4 0xa2fc |
| 1606 | /* [RW 32] the value of the counter for sw timers1-8. there are 8 addresses | 1606 | /* [RW 32] the value of the counter for sw timers1-8. there are 8 addresses |
| 1607 | in this register. addres 0 - timer 1; address 1 - timer 2, ... address 7 - | 1607 | in this register. address 0 - timer 1; address 1 - timer 2, ... address 7 - |
| 1608 | timer 8 */ | 1608 | timer 8 */ |
| 1609 | #define MISC_REG_SW_TIMER_VAL 0xa5c0 | 1609 | #define MISC_REG_SW_TIMER_VAL 0xa5c0 |
| 1610 | /* [RW 1] Set by the MCP to remember if one or more of the drivers is/are | 1610 | /* [RW 1] Set by the MCP to remember if one or more of the drivers is/are |
| @@ -840,7 +840,7 @@ static int ad_lacpdu_send(struct port *port) · 839 unmodified lines | |||
| 840 | lacpdu_header = (struct lacpdu_header *)skb_put(skb, length); | 840 | lacpdu_header = (struct lacpdu_header *)skb_put(skb, length); |
| 841 | 841 | ||
| 842 | memcpy(lacpdu_header->hdr.h_dest, lacpdu_mcast_addr, ETH_ALEN); | 842 | memcpy(lacpdu_header->hdr.h_dest, lacpdu_mcast_addr, ETH_ALEN); |
| 843 | /* Note: source addres is set to be the member's PERMANENT address, | 843 | /* Note: source address is set to be the member's PERMANENT address, |
| 844 | because we use it to identify loopback lacpdus in receive. */ | 844 | because we use it to identify loopback lacpdus in receive. */ |
| 845 | memcpy(lacpdu_header->hdr.h_source, slave->perm_hwaddr, ETH_ALEN); | 845 | memcpy(lacpdu_header->hdr.h_source, slave->perm_hwaddr, ETH_ALEN); |
| 846 | lacpdu_header->hdr.h_proto = PKT_TYPE_LACPDU; | 846 | lacpdu_header->hdr.h_proto = PKT_TYPE_LACPDU; |
| @@ -881,7 +881,7 @@ static int ad_marker_send(struct port *port, struct bond_marker *marker) · 34 unmodified lines | |||
| 881 | marker_header = (struct bond_marker_header *)skb_put(skb, length); | 881 | marker_header = (struct bond_marker_header *)skb_put(skb, length); |
| 882 | 882 | ||
| 883 | memcpy(marker_header->hdr.h_dest, lacpdu_mcast_addr, ETH_ALEN); | 883 | memcpy(marker_header->hdr.h_dest, lacpdu_mcast_addr, ETH_ALEN); |
| 884 | /* Note: source addres is set to be the member's PERMANENT address, | 884 | /* Note: source address is set to be the member's PERMANENT address, |
| 885 | because we use it to identify loopback MARKERs in receive. */ | 885 | because we use it to identify loopback MARKERs in receive. */ |
| 886 | memcpy(marker_header->hdr.h_source, slave->perm_hwaddr, ETH_ALEN); | 886 | memcpy(marker_header->hdr.h_source, slave->perm_hwaddr, ETH_ALEN); |
| 887 | marker_header->hdr.h_proto = PKT_TYPE_LACPDU; | 887 | marker_header->hdr.h_proto = PKT_TYPE_LACPDU; |
| @@ -1916,7 +1916,7 @@ int bond_3ad_bind_slave(struct slave *slave) · 1028 unmodified lines | |||
| 1916 | return -1; | 1916 | return -1; |
| 1917 | } | 1917 | } |
| 1918 | 1918 | ||
| 1919 | //check that the slave has not been intialized yet. | 1919 | //check that the slave has not been initialized yet. |
| 1920 | if (SLAVE_AD_INFO(slave).port.slave != slave) { | 1920 | if (SLAVE_AD_INFO(slave).port.slave != slave) { |
| 1921 | 1921 | ||
| 1922 | // port initialization | 1922 | // port initialization |
| @@ -556,7 +556,7 @@ struct chelsio_vpd_t { · 555 unmodified lines | |||
| 556 | #define EEPROM_MAX_POLL 4 | 556 | #define EEPROM_MAX_POLL 4 |
| 557 | 557 | ||
| 558 | /* | 558 | /* |
| 559 | * Read SEEPROM. A zero is written to the flag register when the addres is | 559 | * Read SEEPROM. A zero is written to the flag register when the address is |
| 560 | * written to the Control register. The hardware device will set the flag to a | 560 | * written to the Control register. The hardware device will set the flag to a |
| 561 | * one when 4B have been transferred to the Data register. | 561 | * one when 4B have been transferred to the Data register. |
| 562 | */ | 562 | */ |
| @@ -318,7 +318,7 @@ static void mc5_dbgi_mode_disable(const struct mc5 *mc5) · 317 unmodified lines | |||
| 318 | 318 | ||
| 319 | /* | 319 | /* |
| 320 | * Initialization that requires the OS and protocol layers to already | 320 | * Initialization that requires the OS and protocol layers to already |
| 321 | * be intialized goes here. | 321 | * be initialized goes here. |
| 322 | */ | 322 | */ |
| 323 | int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters, | 323 | int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters, |
| 324 | unsigned int nroutes) | 324 | unsigned int nroutes) |
| @@ -607,7 +607,7 @@ struct t3_vpd { · 606 unmodified lines | |||
| 607 | * | 607 | * |
| 608 | * Read a 32-bit word from a location in VPD EEPROM using the card's PCI | 608 | * Read a 32-bit word from a location in VPD EEPROM using the card's PCI |
| 609 | * VPD ROM capability. A zero is written to the flag bit when the | 609 | * VPD ROM capability. A zero is written to the flag bit when the |
| 610 | * addres is written to the control register. The hardware device will | 610 | * address is written to the control register. The hardware device will |
| 611 | * set the flag to 1 when 4 bytes have been read into the data register. | 611 | * set the flag to 1 when 4 bytes have been read into the data register. |
| 612 | */ | 612 | */ |
| 613 | int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data) | 613 | int t3_seeprom_read(struct adapter *adapter, u32 addr, __le32 *data) |
| @@ -41,7 +41,7 @@ struct e1000_hw; · 40 unmodified lines | |||
| 41 | struct e1000_hw_stats; | 41 | struct e1000_hw_stats; |
| 42 | 42 | ||
| 43 | /* Enumerated types specific to the e1000 hardware */ | 43 | /* Enumerated types specific to the e1000 hardware */ |
| 44 | /* Media Access Controlers */ | 44 | /* Media Access Controllers */ |
| 45 | typedef enum { | 45 | typedef enum { |
| 46 | e1000_undefined = 0, | 46 | e1000_undefined = 0, |
| 47 | e1000_82542_rev2_0, | 47 | e1000_82542_rev2_0, |
| @@ -2194,7 +2194,7 @@ static void e1000_set_rx_mode(struct net_device *netdev) · 2193 unmodified lines | |||
| 2194 | * addresses take precedence to avoid disabling unicast filtering | 2194 | * addresses take precedence to avoid disabling unicast filtering |
| 2195 | * when possible. | 2195 | * when possible. |
| 2196 | * | 2196 | * |
| 2197 | * RAR 0 is used for the station MAC adddress | 2197 | * RAR 0 is used for the station MAC address |
| 2198 | * if there are not 14 addresses, go ahead and clear the filters | 2198 | * if there are not 14 addresses, go ahead and clear the filters |
| 2199 | */ | 2199 | */ |
| 2200 | i = 1; | 2200 | i = 1; |
| @@ -300,7 +300,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter) · 299 unmodified lines | |||
| 300 | 300 | ||
| 301 | /* | 301 | /* |
| 302 | * Ensure that the inter-port SWSM.SMBI lock bit is clear before | 302 | * Ensure that the inter-port SWSM.SMBI lock bit is clear before |
| 303 | * first NVM or PHY acess. This should be done for single-port | 303 | * first NVM or PHY access. This should be done for single-port |
| 304 | * devices, and for one port only on dual-port devices so that | 304 | * devices, and for one port only on dual-port devices so that |
| 305 | * for those devices we can still use the SMBI lock to synchronize | 305 | * for those devices we can still use the SMBI lock to synchronize |
| 306 | * inter-port accesses to the PHY & NVM. | 306 | * inter-port accesses to the PHY & NVM. |
| @@ -321,7 +321,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) · 320 unmodified lines | |||
| 321 | } | 321 | } |
| 322 | 322 | ||
| 323 | /* | 323 | /* |
| 324 | * Reset the PHY before any acccess to it. Doing so, ensures that | 324 | * Reset the PHY before any access to it. Doing so, ensures that |
| 325 | * the PHY is in a known good state before we read/write PHY registers. | 325 | * the PHY is in a known good state before we read/write PHY registers. |
| 326 | * The generic reset is sufficient here, because we haven't determined | 326 | * The generic reset is sufficient here, because we haven't determined |
| 327 | * the PHY type yet. | 327 | * the PHY type yet. |
| @@ -2976,7 +2976,7 @@ s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) · 2975 unmodified lines | |||
| 2976 | } | 2976 | } |
| 2977 | 2977 | ||
| 2978 | /** | 2978 | /** |
| 2979 | * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page | 2979 | * e1000_get_phy_addr_for_hv_page - Get PHY address based on page |
| 2980 | * @page: page to be accessed | 2980 | * @page: page to be accessed |
| 2981 | **/ | 2981 | **/ |
| 2982 | static u32 e1000_get_phy_addr_for_hv_page(u32 page) | 2982 | static u32 e1000_get_phy_addr_for_hv_page(u32 page) |
| @@ -1760,7 +1760,7 @@ module_param_array(io, int, NULL, 0); · 1759 unmodified lines | |||
| 1760 | module_param_array(irq, int, NULL, 0); | 1760 | module_param_array(irq, int, NULL, 0); |
| 1761 | module_param_array(mem, int, NULL, 0); | 1761 | module_param_array(mem, int, NULL, 0); |
| 1762 | module_param(autodetect, int, 0); | 1762 | module_param(autodetect, int, 0); |
| 1763 | MODULE_PARM_DESC(io, "EtherExpress Pro/10 I/O base addres(es)"); | 1763 | MODULE_PARM_DESC(io, "EtherExpress Pro/10 I/O base address(es)"); |
| 1764 | MODULE_PARM_DESC(irq, "EtherExpress Pro/10 IRQ number(s)"); | 1764 | MODULE_PARM_DESC(irq, "EtherExpress Pro/10 IRQ number(s)"); |
| 1765 | MODULE_PARM_DESC(mem, "EtherExpress Pro/10 Rx buffer size(es) in kB (3-29)"); | 1765 | MODULE_PARM_DESC(mem, "EtherExpress Pro/10 Rx buffer size(es) in kB (3-29)"); |
| 1766 | MODULE_PARM_DESC(autodetect, "EtherExpress Pro/10 force board(s) detection (0-1)"); | 1766 | MODULE_PARM_DESC(autodetect, "EtherExpress Pro/10 force board(s) detection (0-1)"); |
| @@ -30,7 +30,7 @@ · 29 unmodified lines | |||
| 30 | * or the type-DO IR port. | 30 | * or the type-DO IR port. |
| 31 | * | 31 | * |
| 32 | * IrDA chip set list from Toshiba Computer Engineering Corp. | 32 | * IrDA chip set list from Toshiba Computer Engineering Corp. |
| 33 | * model method maker controler Version | 33 | * model method maker controller Version |
| 34 | * Portege 320CT FIR,SIR Toshiba Oboe(Triangle) | 34 | * Portege 320CT FIR,SIR Toshiba Oboe(Triangle) |
| 35 | * Portege 3010CT FIR,SIR Toshiba Oboe(Sydney) | 35 | * Portege 3010CT FIR,SIR Toshiba Oboe(Sydney) |
| 36 | * Portege 3015CT FIR,SIR Toshiba Oboe(Sydney) | 36 | * Portege 3015CT FIR,SIR Toshiba Oboe(Sydney) |
| @@ -1078,7 +1078,7 @@ s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc) · 1077 unmodified lines | |||
| 1078 | 1078 | ||
| 1079 | /* | 1079 | /* |
| 1080 | * The defaults in the HW for RX PB 1-7 are not zero and so should be | 1080 | * The defaults in the HW for RX PB 1-7 are not zero and so should be |
| 1081 | * intialized to zero for non DCB mode otherwise actual total RX PB | 1081 | * initialized to zero for non DCB mode otherwise actual total RX PB |
| 1082 | * would be bigger than programmed and filter space would run into | 1082 | * would be bigger than programmed and filter space would run into |
| 1083 | * the PB 0 region. | 1083 | * the PB 0 region. |
| 1084 | */ | 1084 | */ |
| @@ -1169,7 +1169,7 @@ s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc) · 84 unmodified lines | |||
| 1169 | 1169 | ||
| 1170 | /* | 1170 | /* |
| 1171 | * The defaults in the HW for RX PB 1-7 are not zero and so should be | 1171 | * The defaults in the HW for RX PB 1-7 are not zero and so should be |
| 1172 | * intialized to zero for non DCB mode otherwise actual total RX PB | 1172 | * initialized to zero for non DCB mode otherwise actual total RX PB |
| 1173 | * would be bigger than programmed and filter space would run into | 1173 | * would be bigger than programmed and filter space would run into |
| 1174 | * the PB 0 region. | 1174 | * the PB 0 region. |
| 1175 | */ | 1175 | */ |
| @@ -238,7 +238,7 @@ static int temac_dma_bd_init(struct net_device *ndev) · 237 unmodified lines | |||
| 238 | goto out; | 238 | goto out; |
| 239 | } | 239 | } |
| 240 | /* allocate the tx and rx ring buffer descriptors. */ | 240 | /* allocate the tx and rx ring buffer descriptors. */ |
| 241 | /* returns a virtual addres and a physical address. */ | 241 | /* returns a virtual address and a physical address. */ |
| 242 | lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent, | 242 | lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent, |
| 243 | sizeof(*lp->tx_bd_v) * TX_BD_NUM, | 243 | sizeof(*lp->tx_bd_v) * TX_BD_NUM, |
| 244 | &lp->tx_bd_p, GFP_KERNEL); | 244 | &lp->tx_bd_p, GFP_KERNEL); |
| @@ -36,7 +36,7 @@ · 35 unmodified lines | |||
| 36 | Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning | 36 | Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning |
| 37 | Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig | 37 | Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig |
| 38 | Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support | 38 | Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support |
| 39 | Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E eqaulizer workaround rule | 39 | Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule |
| 40 | Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 | 40 | Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1 |
| 41 | Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring | 41 | Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring |
| 42 | Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 | 42 | Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4 |
| @@ -12,7 +12,7 @@ · 11 unmodified lines | |||
| 12 | /* | 12 | /* |
| 13 | * RX HW/SW interaction overview | 13 | * RX HW/SW interaction overview |
| 14 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 14 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 15 | * There are 2 types of RX communication channels betwean driver and NIC. | 15 | * There are 2 types of RX communication channels between driver and NIC. |
| 16 | * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming | 16 | * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming |
| 17 | * traffic. This Fifo is filled by SW and is readen by HW. Each descriptor holds | 17 | * traffic. This Fifo is filled by SW and is readen by HW. Each descriptor holds |
| 18 | * info about buffer's location, size and ID. An ID field is used to identify a | 18 | * info about buffer's location, size and ID. An ID field is used to identify a |
| @@ -821,7 +821,7 @@ static void bdx_setmulti(struct net_device *ndev) · 802 unmodified lines | |||
| 821 | } | 821 | } |
| 822 | 822 | ||
| 823 | /* use PMF to accept first MAC_MCST_NUM (15) addresses */ | 823 | /* use PMF to accept first MAC_MCST_NUM (15) addresses */ |
| 824 | /* TBD: sort addreses and write them in ascending order | 824 | /* TBD: sort addresses and write them in ascending order |
| 825 | * into RX_MAC_MCST regs. we skip this phase now and accept ALL | 825 | * into RX_MAC_MCST regs. we skip this phase now and accept ALL |
| 826 | * multicast frames throu IMF */ | 826 | * multicast frames throu IMF */ |
| 827 | /* accept the rest of addresses throu IMF */ | 827 | /* accept the rest of addresses throu IMF */ |
| @@ -1346,7 +1346,7 @@ static void print_rxfd(struct rxf_desc *rxfd) · 518 unmodified lines | |||
| 1346 | /* | 1346 | /* |
| 1347 | * TX HW/SW interaction overview | 1347 | * TX HW/SW interaction overview |
| 1348 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 1348 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 1349 | * There are 2 types of TX communication channels betwean driver and NIC. | 1349 | * There are 2 types of TX communication channels between driver and NIC. |
| 1350 | * 1) TX Free Fifo - TXF - holds ack descriptors for sent packets | 1350 | * 1) TX Free Fifo - TXF - holds ack descriptors for sent packets |
| 1351 | * 2) TX Data Fifo - TXD - holds descriptors of full buffers. | 1351 | * 2) TX Data Fifo - TXD - holds descriptors of full buffers. |
| 1352 | * | 1352 | * |
| @@ -1309,7 +1309,7 @@ static long __tun_chr_ioctl(struct file *file, unsigned int cmd, · 1308 unmodified lines | |||
| 1309 | break; | 1309 | break; |
| 1310 | 1310 | ||
| 1311 | case SIOCGIFHWADDR: | 1311 | case SIOCGIFHWADDR: |
| 1312 | /* Get hw addres */ | 1312 | /* Get hw address */ |
| 1313 | memcpy(ifr.ifr_hwaddr.sa_data, tun->dev->dev_addr, ETH_ALEN); | 1313 | memcpy(ifr.ifr_hwaddr.sa_data, tun->dev->dev_addr, ETH_ALEN); |
| 1314 | ifr.ifr_hwaddr.sa_family = tun->dev->type; | 1314 | ifr.ifr_hwaddr.sa_family = tun->dev->type; |
| 1315 | if (copy_to_user(argp, &ifr, ifreq_len)) | 1315 | if (copy_to_user(argp, &ifr, ifreq_len)) |
| @@ -1695,7 +1695,7 @@ struct vxge_hw_device_stats_sw_err { · 1694 unmodified lines | |||
| 1695 | * struct vxge_hw_device_stats - Contains HW per-device statistics, | 1695 | * struct vxge_hw_device_stats - Contains HW per-device statistics, |
| 1696 | * including hw. | 1696 | * including hw. |
| 1697 | * @devh: HW device handle. | 1697 | * @devh: HW device handle. |
| 1698 | * @dma_addr: DMA addres of the %hw_info. Given to device to fill-in the stats. | 1698 | * @dma_addr: DMA address of the %hw_info. Given to device to fill-in the stats. |
| 1699 | * @hw_info_dmah: DMA handle used to map hw statistics onto the device memory | 1699 | * @hw_info_dmah: DMA handle used to map hw statistics onto the device memory |
| 1700 | * space. | 1700 | * space. |
| 1701 | * @hw_info_dma_acch: One more DMA handle used subsequently to free the | 1701 | * @hw_info_dma_acch: One more DMA handle used subsequently to free the |
| @@ -125,7 +125,7 @@ static u32 dscc4_pci_config_store[16]; · 124 unmodified lines | |||
| 125 | /* Module parameters */ | 125 | /* Module parameters */ |
| 126 | 126 | ||
| 127 | MODULE_AUTHOR("Maintainer: Francois Romieu <romieu@cogenit.fr>"); | 127 | MODULE_AUTHOR("Maintainer: Francois Romieu <romieu@cogenit.fr>"); |
| 128 | MODULE_DESCRIPTION("Siemens PEB20534 PCI Controler"); | 128 | MODULE_DESCRIPTION("Siemens PEB20534 PCI Controller"); |
| 129 | MODULE_LICENSE("GPL"); | 129 | MODULE_LICENSE("GPL"); |
| 130 | module_param(debug, int, 0); | 130 | module_param(debug, int, 0); |
| 131 | MODULE_PARM_DESC(debug,"Enable/disable extra messages"); | 131 | MODULE_PARM_DESC(debug,"Enable/disable extra messages"); |
| @@ -280,7 +280,7 @@ int i2400m_check_mac_addr(struct i2400m *i2400m) · 279 unmodified lines | |||
| 280 | result); | 280 | result); |
| 281 | goto error; | 281 | goto error; |
| 282 | } | 282 | } |
| 283 | /* Extract MAC addresss */ | 283 | /* Extract MAC address */ |
| 284 | ddi = (void *) skb->data; | 284 | ddi = (void *) skb->data; |
| 285 | BUILD_BUG_ON(ETH_ALEN != sizeof(ddi->mac_address)); | 285 | BUILD_BUG_ON(ETH_ALEN != sizeof(ddi->mac_address)); |
| 286 | d_printf(2, dev, "GET DEVICE INFO: mac addr %pM\n", | 286 | d_printf(2, dev, "GET DEVICE INFO: mac addr %pM\n", |
| @@ -698,7 +698,7 @@ enum i2400m_bm_cmd_flags { · 697 unmodified lines | |||
| 698 | * @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot | 698 | * @I2400M_BRI_MAC_REINIT: We need to reinitialize the boot |
| 699 | * rom after reading the MAC address. This is quite a dirty hack, | 699 | * rom after reading the MAC address. This is quite a dirty hack, |
| 700 | * if you ask me -- the device requires the bootrom to be | 700 | * if you ask me -- the device requires the bootrom to be |
| 701 | * intialized after reading the MAC address. | 701 | * initialized after reading the MAC address. |
| 702 | */ | 702 | */ |
| 703 | enum i2400m_bri { | 703 | enum i2400m_bri { |
| 704 | I2400M_BRI_SOFT = 1 << 1, | 704 | I2400M_BRI_SOFT = 1 << 1, |
| @@ -1063,7 +1063,7 @@ · 1062 unmodified lines | |||
| 1063 | /* | 1063 | /* |
| 1064 | * EEPROM command register | 1064 | * EEPROM command register |
| 1065 | */ | 1065 | */ |
| 1066 | #define AR5K_EEPROM_CMD 0x6008 /* Register Addres */ | 1066 | #define AR5K_EEPROM_CMD 0x6008 /* Register Address */ |
| 1067 | #define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */ | 1067 | #define AR5K_EEPROM_CMD_READ 0x00000001 /* EEPROM read */ |
| 1068 | #define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */ | 1068 | #define AR5K_EEPROM_CMD_WRITE 0x00000002 /* EEPROM write */ |
| 1069 | #define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */ | 1069 | #define AR5K_EEPROM_CMD_RESET 0x00000004 /* EEPROM reset */ |
| @@ -1083,7 +1083,7 @@ · 13 unmodified lines | |||
| 1083 | /* | 1083 | /* |
| 1084 | * EEPROM config register | 1084 | * EEPROM config register |
| 1085 | */ | 1085 | */ |
| 1086 | #define AR5K_EEPROM_CFG 0x6010 /* Register Addres */ | 1086 | #define AR5K_EEPROM_CFG 0x6010 /* Register Address */ |
| 1087 | #define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */ | 1087 | #define AR5K_EEPROM_CFG_SIZE 0x00000003 /* Size determination override */ |
| 1088 | #define AR5K_EEPROM_CFG_SIZE_AUTO 0 | 1088 | #define AR5K_EEPROM_CFG_SIZE_AUTO 0 |
| 1089 | #define AR5K_EEPROM_CFG_SIZE_4KBIT 1 | 1089 | #define AR5K_EEPROM_CFG_SIZE_4KBIT 1 |
| @@ -1125,7 +1125,7 @@ · 35 unmodified lines | |||
| 1125 | * Second station id register (Upper 16 bits of MAC address + PCU settings) | 1125 | * Second station id register (Upper 16 bits of MAC address + PCU settings) |
| 1126 | */ | 1126 | */ |
| 1127 | #define AR5K_STA_ID1 0x8004 /* Register Address */ | 1127 | #define AR5K_STA_ID1 0x8004 /* Register Address */ |
| 1128 | #define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC addres */ | 1128 | #define AR5K_STA_ID1_ADDR_U16 0x0000ffff /* Upper 16 bits of MAC address */ |
| 1129 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ | 1129 | #define AR5K_STA_ID1_AP 0x00010000 /* Set AP mode */ |
| 1130 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ | 1130 | #define AR5K_STA_ID1_ADHOC 0x00020000 /* Set Ad-Hoc mode */ |
| 1131 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ | 1131 | #define AR5K_STA_ID1_PWR_SV 0x00040000 /* Power save reporting */ |
| @@ -1919,7 +1919,7 @@ static void b43_hardware_pctl_init_gphy(struct b43_wldev *dev) · 1918 unmodified lines | |||
| 1919 | b43_hf_write(dev, b43_hf_read(dev) | B43_HF_HWPCTL); | 1919 | b43_hf_write(dev, b43_hf_read(dev) | B43_HF_HWPCTL); |
| 1920 | } | 1920 | } |
| 1921 | 1921 | ||
| 1922 | /* Intialize B/G PHY power control */ | 1922 | /* Initialize B/G PHY power control */ |
| 1923 | static void b43_phy_init_pctl(struct b43_wldev *dev) | 1923 | static void b43_phy_init_pctl(struct b43_wldev *dev) |
| 1924 | { | 1924 | { |
| 1925 | struct ssb_bus *bus = dev->dev->bus; | 1925 | struct ssb_bus *bus = dev->dev->bus; |
| @@ -153,7 +153,7 @@ void b43legacy_phy_calibrate(struct b43legacy_wldev *dev) · 152 unmodified lines | |||
| 153 | phy->calibrated = 1; | 153 | phy->calibrated = 1; |
| 154 | } | 154 | } |
| 155 | 155 | ||
| 156 | /* intialize B PHY power control | 156 | /* initialize B PHY power control |
| 157 | * as described in http://bcm-specs.sipsolutions.net/InitPowerControl | 157 | * as described in http://bcm-specs.sipsolutions.net/InitPowerControl |
| 158 | */ | 158 | */ |
| 159 | static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev) | 159 | static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev) |
| @@ -107,7 +107,7 @@ static int iwl_process_add_sta_resp(struct iwl_priv *priv, · 106 unmodified lines | |||
| 107 | /* | 107 | /* |
| 108 | * XXX: The MAC address in the command buffer is often changed from | 108 | * XXX: The MAC address in the command buffer is often changed from |
| 109 | * the original sent to the device. That is, the MAC address | 109 | * the original sent to the device. That is, the MAC address |
| 110 | * written to the command buffer often is not the same MAC adress | 110 | * written to the command buffer often is not the same MAC address |
| 111 | * read from the command buffer when the command returns. This | 111 | * read from the command buffer when the command returns. This |
| 112 | * issue has not yet been resolved and this debugging is left to | 112 | * issue has not yet been resolved and this debugging is left to |
| 113 | * observe the problem. | 113 | * observe the problem. |
| @@ -630,7 +630,7 @@ islpci_alloc_memory(islpci_private *priv) · 629 unmodified lines | |||
| 630 | printk(KERN_DEBUG "islpci_alloc_memory\n"); | 630 | printk(KERN_DEBUG "islpci_alloc_memory\n"); |
| 631 | #endif | 631 | #endif |
| 632 | 632 | ||
| 633 | /* remap the PCI device base address to accessable */ | 633 | /* remap the PCI device base address to accessible */ |
| 634 | if (!(priv->device_base = | 634 | if (!(priv->device_base = |
| 635 | ioremap(pci_resource_start(priv->pdev, 0), | 635 | ioremap(pci_resource_start(priv->pdev, 0), |
| 636 | ISL38XX_PCI_MEM_SIZE))) { | 636 | ISL38XX_PCI_MEM_SIZE))) { |
| @@ -709,7 +709,7 @@ islpci_alloc_memory(islpci_private *priv) · 72 unmodified lines | |||
| 709 | PCI_DMA_FROMDEVICE); | 709 | PCI_DMA_FROMDEVICE); |
| 710 | if (!priv->pci_map_rx_address[counter]) { | 710 | if (!priv->pci_map_rx_address[counter]) { |
| 711 | /* error mapping the buffer to device | 711 | /* error mapping the buffer to device |
| 712 | accessable memory address */ | 712 | accessible memory address */ |
| 713 | printk(KERN_ERR "failed to map skb DMA'able\n"); | 713 | printk(KERN_ERR "failed to map skb DMA'able\n"); |
| 714 | goto out_free; | 714 | goto out_free; |
| 715 | } | 715 | } |
| @@ -773,7 +773,7 @@ islpci_free_memory(islpci_private *priv) · 57 unmodified lines | |||
| 773 | priv->data_low_rx[counter] = NULL; | 773 | priv->data_low_rx[counter] = NULL; |
| 774 | } | 774 | } |
| 775 | 775 | ||
| 776 | /* Free the acces control list and the WPA list */ | 776 | /* Free the access control list and the WPA list */ |
| 777 | prism54_acl_clean(&priv->acl); | 777 | prism54_acl_clean(&priv->acl); |
| 778 | prism54_wpa_bss_ie_clean(priv); | 778 | prism54_wpa_bss_ie_clean(priv); |
| 779 | mgt_clean(priv); | 779 | mgt_clean(priv); |
| @@ -450,7 +450,7 @@ islpci_eth_receive(islpci_private *priv) · 449 unmodified lines | |||
| 450 | MAX_FRAGMENT_SIZE_RX + 2, | 450 | MAX_FRAGMENT_SIZE_RX + 2, |
| 451 | PCI_DMA_FROMDEVICE); | 451 | PCI_DMA_FROMDEVICE); |
| 452 | if (unlikely(!priv->pci_map_rx_address[index])) { | 452 | if (unlikely(!priv->pci_map_rx_address[index])) { |
| 453 | /* error mapping the buffer to device accessable memory address */ | 453 | /* error mapping the buffer to device accessible memory address */ |
| 454 | DEBUG(SHOW_ERROR_MESSAGES, | 454 | DEBUG(SHOW_ERROR_MESSAGES, |
| 455 | "Error mapping DMA address\n"); | 455 | "Error mapping DMA address\n"); |
| 456 | 456 | ||
| @@ -274,7 +274,7 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw, · 273 unmodified lines | |||
| 274 | intf->beacon = entry; | 274 | intf->beacon = entry; |
| 275 | 275 | ||
| 276 | /* | 276 | /* |
| 277 | * The MAC adddress must be configured after the device | 277 | * The MAC address must be configured after the device |
| 278 | * has been initialized. Otherwise the device can reset | 278 | * has been initialized. Otherwise the device can reset |
| 279 | * the MAC registers. | 279 | * the MAC registers. |
| 280 | * The BSSID address must only be configured in AP mode, | 280 | * The BSSID address must only be configured in AP mode, |
| @@ -192,7 +192,7 @@ static inline void wl3501_switch_page(struct wl3501_card *this, u8 page) · 191 unmodified lines | |||
| 192 | } | 192 | } |
| 193 | 193 | ||
| 194 | /* | 194 | /* |
| 195 | * Get Ethernet MAC addresss. | 195 | * Get Ethernet MAC address. |
| 196 | * | 196 | * |
| 197 | * WARNING: We switch to FPAGE0 and switc back again. | 197 | * WARNING: We switch to FPAGE0 and switc back again. |
| 198 | * Making sure there is no other WL function beening called by ISR. | 198 | * Making sure there is no other WL function beening called by ISR. |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | |||
| 9 | #endif | 9 | #endif |
| 10 | 10 | ||
| 11 | /* | 11 | /* |
| 12 | * M32R PC Card Controler | 12 | * M32R PC Card Controller |
| 13 | */ | 13 | */ |
| 14 | #define M32R_PCC0_BASE 0x00ef7000 | 14 | #define M32R_PCC0_BASE 0x00ef7000 |
| 15 | #define M32R_PCC1_BASE 0x00ef7020 | 15 | #define M32R_PCC1_BASE 0x00ef7020 |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | |||
| 5 | #define M32R_MAX_PCC 2 | 5 | #define M32R_MAX_PCC 2 |
| 6 | 6 | ||
| 7 | /* | 7 | /* |
| 8 | * M32R PC Card Controler | 8 | * M32R PC Card Controller |
| 9 | */ | 9 | */ |
| 10 | #define M32R_PCC0_BASE 0x00ef7000 | 10 | #define M32R_PCC0_BASE 0x00ef7000 |
| 11 | #define M32R_PCC1_BASE 0x00ef7020 | 11 | #define M32R_PCC1_BASE 0x00ef7020 |
| @@ -1198,7 +1198,7 @@ static int __init m8xx_probe(struct platform_device *ofdev, · 1197 unmodified lines | |||
| 1198 | out_be32(M8XX_PGCRX(1), | 1198 | out_be32(M8XX_PGCRX(1), |
| 1199 | M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16)); | 1199 | M8XX_PGCRX_CXOE | (mk_int_int_mask(hwirq) << 16)); |
| 1200 | 1200 | ||
| 1201 | /* intialize the fixed memory windows */ | 1201 | /* initialize the fixed memory windows */ |
| 1202 | 1202 | ||
| 1203 | for (i = 0; i < PCMCIA_SOCKETS_NO; i++) { | 1203 | for (i = 0; i < PCMCIA_SOCKETS_NO; i++) { |
| 1204 | for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) { | 1204 | for (m = 0; m < PCMCIA_MEM_WIN_NO; m++) { |
| @@ -7193,7 +7193,7 @@ static struct ibm_struct volume_driver_data = { · 7192 unmodified lines | |||
| 7193 | * TPACPI_FAN_WR_ACPI_FANS (X31/X40/X41) | 7193 | * TPACPI_FAN_WR_ACPI_FANS (X31/X40/X41) |
| 7194 | * | 7194 | * |
| 7195 | * FIRMWARE BUG: on some models, EC 0x2f might not be initialized at | 7195 | * FIRMWARE BUG: on some models, EC 0x2f might not be initialized at |
| 7196 | * boot. Apparently the EC does not intialize it, so unless ACPI DSDT | 7196 | * boot. Apparently the EC does not initialize it, so unless ACPI DSDT |
| 7197 | * does so, its initial value is meaningless (0x07). | 7197 | * does so, its initial value is meaningless (0x07). |
| 7198 | * | 7198 | * |
| 7199 | * For firmware bugs, refer to: | 7199 | * For firmware bugs, refer to: |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * iPAQ h1930/h1940/rx1950 battery controler driver | 2 | * iPAQ h1930/h1940/rx1950 battery controller driver |
| 3 | * Copyright (c) Vasily Khoruzhick | 3 | * Copyright (c) Vasily Khoruzhick |
| 4 | * Based on h1940_battery.c by Arnaud Patard | 4 | * Based on h1940_battery.c by Arnaud Patard |
| 5 | * | 5 | * |
| @@ -427,5 +427,5 @@ static void __exit s3c_adc_bat_exit(void) · 421 unmodified lines | |||
| 427 | module_exit(s3c_adc_bat_exit); | 427 | module_exit(s3c_adc_bat_exit); |
| 428 | 428 | ||
| 429 | MODULE_AUTHOR("Vasily Khoruzhick <anarsoul@gmail.com>"); | 429 | MODULE_AUTHOR("Vasily Khoruzhick <anarsoul@gmail.com>"); |
| 430 | MODULE_DESCRIPTION("iPAQ H1930/H1940/RX1950 battery controler driver"); | 430 | MODULE_DESCRIPTION("iPAQ H1930/H1940/RX1950 battery controller driver"); |
| 431 | MODULE_LICENSE("GPL"); | 431 | MODULE_LICENSE("GPL"); |
| @@ -840,7 +840,7 @@ lcs_notify_lancmd_waiters(struct lcs_card *card, struct lcs_cmd *cmd) · 839 unmodified lines | |||
| 840 | } | 840 | } |
| 841 | 841 | ||
| 842 | /** | 842 | /** |
| 843 | * Emit buffer of a lan comand. | 843 | * Emit buffer of a lan command. |
| 844 | */ | 844 | */ |
| 845 | static void | 845 | static void |
| 846 | lcs_lancmd_timeout(unsigned long data) | 846 | lcs_lancmd_timeout(unsigned long data) |
| @@ -317,7 +317,7 @@ static void zfcp_act_eval_err(struct zfcp_adapter *adapter, u32 table) · 316 unmodified lines | |||
| 317 | 317 | ||
| 318 | /** | 318 | /** |
| 319 | * zfcp_cfdc_port_denied - Process "access denied" for port | 319 | * zfcp_cfdc_port_denied - Process "access denied" for port |
| 320 | * @port: The port where the acces has been denied | 320 | * @port: The port where the access has been denied |
| 321 | * @qual: The FSF status qualifier for the access denied FSF status | 321 | * @qual: The FSF status qualifier for the access denied FSF status |
| 322 | */ | 322 | */ |
| 323 | void zfcp_cfdc_port_denied(struct zfcp_port *port, | 323 | void zfcp_cfdc_port_denied(struct zfcp_port *port, |
| @@ -416,7 +416,7 @@ static u8 orc_load_firmware(struct orc_host * host) · 415 unmodified lines | |||
| 416 | /* Go back and check they match */ | 416 | /* Go back and check they match */ |
| 417 | 417 | ||
| 418 | outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Reset program count 0 */ | 418 | outb(PRGMRST | DOWNLOAD, host->base + ORC_RISCCTL); /* Reset program count 0 */ |
| 419 | bios_addr -= 0x1000; /* Reset the BIOS adddress */ | 419 | bios_addr -= 0x1000; /* Reset the BIOS address */ |
| 420 | for (i = 0, data32_ptr = (u8 *) & data32; /* Check the code */ | 420 | for (i = 0, data32_ptr = (u8 *) & data32; /* Check the code */ |
| 421 | i < 0x1000; /* Firmware code size = 4K */ | 421 | i < 0x1000; /* Firmware code size = 4K */ |
| 422 | i++, bios_addr++) { | 422 | i++, bios_addr++) { |
| @@ -91,7 +91,7 @@ void aac_fib_map_free(struct aac_dev *dev) · 90 unmodified lines | |||
| 91 | * aac_fib_setup - setup the fibs | 91 | * aac_fib_setup - setup the fibs |
| 92 | * @dev: Adapter to set up | 92 | * @dev: Adapter to set up |
| 93 | * | 93 | * |
| 94 | * Allocate the PCI space for the fibs, map it and then intialise the | 94 | * Allocate the PCI space for the fibs, map it and then initialise the |
| 95 | * fib area, the unmapped fib data and also the free list | 95 | * fib area, the unmapped fib data and also the free list |
| 96 | */ | 96 | */ |
| 97 | 97 | ||
| @@ -1178,7 +1178,7 @@ notFound: · 1177 unmodified lines | |||
| 1178 | /* | 1178 | /* |
| 1179 | * Retrieve an SCB by SCBID first searching the disconnected list falling | 1179 | * Retrieve an SCB by SCBID first searching the disconnected list falling |
| 1180 | * back to DMA'ing the SCB down from the host. This routine assumes that | 1180 | * back to DMA'ing the SCB down from the host. This routine assumes that |
| 1181 | * ARG_1 is the SCBID of interrest and that SINDEX is the position in the | 1181 | * ARG_1 is the SCBID of interest and that SINDEX is the position in the |
| 1182 | * disconnected list to start the search from. If SINDEX is SCB_LIST_NULL, | 1182 | * disconnected list to start the search from. If SINDEX is SCB_LIST_NULL, |
| 1183 | * we go directly to the host for the SCB. | 1183 | * we go directly to the host for the SCB. |
| 1184 | */ | 1184 | */ |
| @@ -1689,7 +1689,7 @@ · 1688 unmodified lines | |||
| 1689 | #define PHY_START_CAL 0x01 | 1689 | #define PHY_START_CAL 0x01 |
| 1690 | 1690 | ||
| 1691 | /* | 1691 | /* |
| 1692 | * HST_PCIX2 Registers, Addresss Range: (0x00-0xFC) | 1692 | * HST_PCIX2 Registers, Address Range: (0x00-0xFC) |
| 1693 | */ | 1693 | */ |
| 1694 | #define PCIX_REG_BASE_ADR 0xB8040000 | 1694 | #define PCIX_REG_BASE_ADR 0xB8040000 |
| 1695 | 1695 | ||
| @@ -1802,7 +1802,7 @@ · 106 unmodified lines | |||
| 1802 | #define PCIC_TP_CTRL 0xFC | 1802 | #define PCIC_TP_CTRL 0xFC |
| 1803 | 1803 | ||
| 1804 | /* | 1804 | /* |
| 1805 | * EXSI Registers, Addresss Range: (0x00-0xFC) | 1805 | * EXSI Registers, Address Range: (0x00-0xFC) |
| 1806 | */ | 1806 | */ |
| 1807 | #define EXSI_REG_BASE_ADR REG_BASE_ADDR_EXSI | 1807 | #define EXSI_REG_BASE_ADR REG_BASE_ADDR_EXSI |
| 1808 | 1808 | ||
| @@ -797,7 +797,7 @@ static void asd_init_lseq_mdp(struct asd_ha_struct *asd_ha, int lseq) · 796 unmodified lines | |||
| 797 | int j; | 797 | int j; |
| 798 | /* Start from Page 1 of Mode 0 and 1. */ | 798 | /* Start from Page 1 of Mode 0 and 1. */ |
| 799 | moffs = LSEQ_PAGE_SIZE + i*LSEQ_MODE_SCRATCH_SIZE; | 799 | moffs = LSEQ_PAGE_SIZE + i*LSEQ_MODE_SCRATCH_SIZE; |
| 800 | /* All the fields of page 1 can be intialized to 0. */ | 800 | /* All the fields of page 1 can be initialized to 0. */ |
| 801 | for (j = 0; j < LSEQ_PAGE_SIZE; j += 4) | 801 | for (j = 0; j < LSEQ_PAGE_SIZE; j += 4) |
| 802 | asd_write_reg_dword(asd_ha, LmSCRATCH(lseq)+moffs+j,0); | 802 | asd_write_reg_dword(asd_ha, LmSCRATCH(lseq)+moffs+j,0); |
| 803 | } | 803 | } |
| @@ -938,7 +938,7 @@ static void asd_init_cseq_cio(struct asd_ha_struct *asd_ha) · 134 unmodified lines | |||
| 938 | asd_write_reg_dword(asd_ha, SCBPRO, 0); | 938 | asd_write_reg_dword(asd_ha, SCBPRO, 0); |
| 939 | asd_write_reg_dword(asd_ha, CSEQCON, 0); | 939 | asd_write_reg_dword(asd_ha, CSEQCON, 0); |
| 940 | 940 | ||
| 941 | /* Intialize CSEQ Mode 11 Interrupt Vectors. | 941 | /* Initialize CSEQ Mode 11 Interrupt Vectors. |
| 942 | * The addresses are 16 bit wide and in dword units. | 942 | * The addresses are 16 bit wide and in dword units. |
| 943 | * The values of their macros are in byte units. | 943 | * The values of their macros are in byte units. |
| 944 | * Thus we have to divide by 4. */ | 944 | * Thus we have to divide by 4. */ |
| @@ -961,7 +961,7 @@ static void asd_init_cseq_cio(struct asd_ha_struct *asd_ha) · 16 unmodified lines | |||
| 961 | asd_write_reg_word(asd_ha, CPRGMCNT, cseq_idle_loop); | 961 | asd_write_reg_word(asd_ha, CPRGMCNT, cseq_idle_loop); |
| 962 | 962 | ||
| 963 | for (i = 0; i < 8; i++) { | 963 | for (i = 0; i < 8; i++) { |
| 964 | /* Intialize Mode n Link m Interrupt Enable. */ | 964 | /* Initialize Mode n Link m Interrupt Enable. */ |
| 965 | asd_write_reg_dword(asd_ha, CMnINTEN(i), EN_CMnRSPMBXF); | 965 | asd_write_reg_dword(asd_ha, CMnINTEN(i), EN_CMnRSPMBXF); |
| 966 | /* Initialize Mode n Request Mailbox. */ | 966 | /* Initialize Mode n Request Mailbox. */ |
| 967 | asd_write_reg_dword(asd_ha, CMnREQMBX(i), 0); | 967 | asd_write_reg_dword(asd_ha, CMnREQMBX(i), 0); |
| @@ -2092,7 +2092,7 @@ bfa_ioim_sm_cleanup_qfull(struct bfa_ioim_s *ioim, enum bfa_ioim_event event) · 2091 unmodified lines | |||
| 2092 | 2092 | ||
| 2093 | case BFA_IOIM_SM_ABORT: | 2093 | case BFA_IOIM_SM_ABORT: |
| 2094 | /** | 2094 | /** |
| 2095 | * IO is alraedy being cleaned up implicitly | 2095 | * IO is already being cleaned up implicitly |
| 2096 | */ | 2096 | */ |
| 2097 | ioim->io_cbfn = __bfa_cb_ioim_abort; | 2097 | ioim->io_cbfn = __bfa_cb_ioim_abort; |
| 2098 | break; | 2098 | break; |
| @@ -5742,7 +5742,7 @@ bfa_cb_lps_fdisc_comp(void *bfad, void *uarg, bfa_status_t status) · 5741 unmodified lines | |||
| 5742 | switch (status) { | 5742 | switch (status) { |
| 5743 | case BFA_STATUS_OK: | 5743 | case BFA_STATUS_OK: |
| 5744 | /* | 5744 | /* |
| 5745 | * Initialiaze the V-Port fields | 5745 | * Initialize the V-Port fields |
| 5746 | */ | 5746 | */ |
| 5747 | __vport_fcid(vport) = bfa_lps_get_pid(vport->lps); | 5747 | __vport_fcid(vport) = bfa_lps_get_pid(vport->lps); |
| 5748 | vport->vport_stats.fdisc_accepts++; | 5748 | vport->vport_stats.fdisc_accepts++; |
| @@ -3795,7 +3795,7 @@ static struct DeviceCtlBlk *device_alloc(struct AdapterCtlBlk *acb, · 3794 unmodified lines | |||
| 3795 | * adapter_add_device - Adds the device instance to the adaptor instance. | 3795 | * adapter_add_device - Adds the device instance to the adaptor instance. |
| 3796 | * | 3796 | * |
| 3797 | * @acb: The adapter device to be updated | 3797 | * @acb: The adapter device to be updated |
| 3798 | * @dcb: A newly created and intialised device instance to add. | 3798 | * @dcb: A newly created and initialised device instance to add. |
| 3799 | **/ | 3799 | **/ |
| 3800 | static void adapter_add_device(struct AdapterCtlBlk *acb, | 3800 | static void adapter_add_device(struct AdapterCtlBlk *acb, |
| 3801 | struct DeviceCtlBlk *dcb) | 3801 | struct DeviceCtlBlk *dcb) |
| @@ -4497,7 +4497,7 @@ static void __devinit adapter_init_chip(struct AdapterCtlBlk *acb) · 695 unmodified lines | |||
| 4497 | * init_adapter - Grab the resource for the card, setup the adapter | 4497 | * init_adapter - Grab the resource for the card, setup the adapter |
| 4498 | * information, set the card into a known state, create the various | 4498 | * information, set the card into a known state, create the various |
| 4499 | * tables etc etc. This basically gets all adapter information all up | 4499 | * tables etc etc. This basically gets all adapter information all up |
| 4500 | * to date, intialised and gets the chip in sync with it. | 4500 | * to date, initialised and gets the chip in sync with it. |
| 4501 | * | 4501 | * |
| 4502 | * @host: This hosts adapter structure | 4502 | * @host: This hosts adapter structure |
| 4503 | * @io_port: The base I/O port | 4503 | * @io_port: The base I/O port |
| @@ -4788,7 +4788,7 @@ static void banner_display(void) · 284 unmodified lines | |||
| 4788 | * that it finds in the system. The pci_dev strcuture indicates which | 4788 | * that it finds in the system. The pci_dev strcuture indicates which |
| 4789 | * instance we are being called from. | 4789 | * instance we are being called from. |
| 4790 | * | 4790 | * |
| 4791 | * @dev: The PCI device to intialize. | 4791 | * @dev: The PCI device to initialize. |
| 4792 | * @id: Looks like a pointer to the entry in our pci device table | 4792 | * @id: Looks like a pointer to the entry in our pci device table |
| 4793 | * that was actually matched by the PCI subsystem. | 4793 | * that was actually matched by the PCI subsystem. |
| 4794 | * | 4794 | * |
| @@ -4859,7 +4859,7 @@ fail: · 64 unmodified lines | |||
| 4859 | * dc395x_remove_one - Called to remove a single instance of the | 4859 | * dc395x_remove_one - Called to remove a single instance of the |
| 4860 | * adapter. | 4860 | * adapter. |
| 4861 | * | 4861 | * |
| 4862 | * @dev: The PCI device to intialize. | 4862 | * @dev: The PCI device to initialize. |
| 4863 | **/ | 4863 | **/ |
| 4864 | static void __devexit dc395x_remove_one(struct pci_dev *dev) | 4864 | static void __devexit dc395x_remove_one(struct pci_dev *dev) |
| 4865 | { | 4865 | { |
| @@ -1212,7 +1212,7 @@ static void fc_lun_reset_send(unsigned long data) · 1211 unmodified lines | |||
| 1212 | /** | 1212 | /** |
| 1213 | * fc_lun_reset() - Send a LUN RESET command to a device | 1213 | * fc_lun_reset() - Send a LUN RESET command to a device |
| 1214 | * and wait for the reply | 1214 | * and wait for the reply |
| 1215 | * @lport: The local port to sent the comand on | 1215 | * @lport: The local port to sent the command on |
| 1216 | * @fsp: The FCP packet that identifies the LUN to be reset | 1216 | * @fsp: The FCP packet that identifies the LUN to be reset |
| 1217 | * @id: The SCSI command ID | 1217 | * @id: The SCSI command ID |
| 1218 | * @lun: The LUN ID to be reset | 1218 | * @lun: The LUN ID to be reset |
| @@ -1339,7 +1339,7 @@ lpfc_##attr##_show(struct device *dev, struct device_attribute *attr, \ · 1338 unmodified lines | |||
| 1339 | } | 1339 | } |
| 1340 | 1340 | ||
| 1341 | /** | 1341 | /** |
| 1342 | * lpfc_param_init - Intializes a cfg attribute | 1342 | * lpfc_param_init - Initializes a cfg attribute |
| 1343 | * | 1343 | * |
| 1344 | * Description: | 1344 | * Description: |
| 1345 | * Macro that given an attr e.g. hba_queue_depth expands | 1345 | * Macro that given an attr e.g. hba_queue_depth expands |
| @@ -2614,7 +2614,7 @@ lpfc_mbx_process_link_up(struct lpfc_hba *phba, READ_LA_VAR *la) · 2613 unmodified lines | |||
| 2614 | if (unlikely(!fcf_record)) { | 2614 | if (unlikely(!fcf_record)) { |
| 2615 | lpfc_printf_log(phba, KERN_ERR, | 2615 | lpfc_printf_log(phba, KERN_ERR, |
| 2616 | LOG_MBOX | LOG_SLI, | 2616 | LOG_MBOX | LOG_SLI, |
| 2617 | "2554 Could not allocate memmory for " | 2617 | "2554 Could not allocate memory for " |
| 2618 | "fcf record\n"); | 2618 | "fcf record\n"); |
| 2619 | rc = -ENODEV; | 2619 | rc = -ENODEV; |
| 2620 | goto out; | 2620 | goto out; |
| @@ -9619,7 +9619,7 @@ lpfc_sli4_intr_handler(int irq, void *dev_id) · 9618 unmodified lines | |||
| 9619 | * lpfc_sli4_queue_free - free a queue structure and associated memory | 9619 | * lpfc_sli4_queue_free - free a queue structure and associated memory |
| 9620 | * @queue: The queue structure to free. | 9620 | * @queue: The queue structure to free. |
| 9621 | * | 9621 | * |
| 9622 | * This function frees a queue structure and the DMAable memeory used for | 9622 | * This function frees a queue structure and the DMAable memory used for |
| 9623 | * the host resident queue. This function must be called after destroying the | 9623 | * the host resident queue. This function must be called after destroying the |
| 9624 | * queue on the HBA. | 9624 | * queue on the HBA. |
| 9625 | **/ | 9625 | **/ |
| @@ -13,7 +13,7 @@ · 12 unmodified lines | |||
| 13 | */ | 13 | */ |
| 14 | 14 | ||
| 15 | /* | 15 | /* |
| 16 | * Comand coalescing - This feature allows the driver to be able to combine | 16 | * Command coalescing - This feature allows the driver to be able to combine |
| 17 | * two or more commands and issue as one command in order to boost I/O | 17 | * two or more commands and issue as one command in order to boost I/O |
| 18 | * performance. Useful if the nature of the I/O is sequential. It is not very | 18 | * performance. Useful if the nature of the I/O is sequential. It is not very |
| 19 | * useful for random natured I/Os. | 19 | * useful for random natured I/Os. |
| @@ -603,7 +603,7 @@ static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha) · 602 unmodified lines | |||
| 603 | #endif | 603 | #endif |
| 604 | 604 | ||
| 605 | intx: | 605 | intx: |
| 606 | /* intialize the INT-X interrupt */ | 606 | /* initialize the INT-X interrupt */ |
| 607 | rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME, | 607 | rc = request_irq(pdev->irq, irq_handler, IRQF_SHARED, DRV_NAME, |
| 608 | SHOST_TO_SAS_HA(pm8001_ha->shost)); | 608 | SHOST_TO_SAS_HA(pm8001_ha->shost)); |
| 609 | return rc; | 609 | return rc; |
| @@ -477,7 +477,7 @@ EXPORT_SYMBOL_GPL(scsi_nl_remove_driver); · 476 unmodified lines | |||
| 477 | 477 | ||
| 478 | 478 | ||
| 479 | /** | 479 | /** |
| 480 | * scsi_netlink_init - Called by SCSI subsystem to intialize | 480 | * scsi_netlink_init - Called by SCSI subsystem to initialize |
| 481 | * the SCSI transport netlink interface | 481 | * the SCSI transport netlink interface |
| 482 | * | 482 | * |
| 483 | **/ | 483 | **/ |
| @@ -1864,7 +1864,7 @@ static pci_ers_result_t sym2_io_slot_dump(struct pci_dev *pdev) · 1863 unmodified lines | |||
| 1864 | * | 1864 | * |
| 1865 | * This routine is similar to sym_set_workarounds(), except | 1865 | * This routine is similar to sym_set_workarounds(), except |
| 1866 | * that, at this point, we already know that the device was | 1866 | * that, at this point, we already know that the device was |
| 1867 | * successfully intialized at least once before, and so most | 1867 | * successfully initialized at least once before, and so most |
| 1868 | * of the steps taken there are un-needed here. | 1868 | * of the steps taken there are un-needed here. |
| 1869 | */ | 1869 | */ |
| 1870 | static void sym2_reset_workarounds(struct pci_dev *pdev) | 1870 | static void sym2_reset_workarounds(struct pci_dev *pdev) |
| @@ -341,9 +341,9 @@ static void atmel_spi_next_message(struct spi_master *master) · 340 unmodified lines | |||
| 341 | /* | 341 | /* |
| 342 | * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma: | 342 | * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma: |
| 343 | * - The buffer is either valid for CPU access, else NULL | 343 | * - The buffer is either valid for CPU access, else NULL |
| 344 | * - If the buffer is valid, so is its DMA addresss | 344 | * - If the buffer is valid, so is its DMA address |
| 345 | * | 345 | * |
| 346 | * This driver manages the dma addresss unless message->is_dma_mapped. | 346 | * This driver manages the dma address unless message->is_dma_mapped. |
| 347 | */ | 347 | */ |
| 348 | static int | 348 | static int |
| 349 | atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer) | 349 | atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer) |
| @@ -38,7 +38,7 @@ · 37 unmodified lines | |||
| 38 | 38 | ||
| 39 | 39 | ||
| 40 | /* | 40 | /* |
| 41 | * This supports acccess to SPI devices using normal userspace I/O calls. | 41 | * This supports access to SPI devices using normal userspace I/O calls. |
| 42 | * Note that while traditional UNIX/POSIX I/O semantics are half duplex, | 42 | * Note that while traditional UNIX/POSIX I/O semantics are half duplex, |
| 43 | * and often mask message boundaries, full SPI support requires full duplex | 43 | * and often mask message boundaries, full SPI support requires full duplex |
| 44 | * transfers. There are several kinds of internal message boundaries to | 44 | * transfers. There are several kinds of internal message boundaries to |
| @@ -745,7 +745,7 @@ static void set_out_format(struct saa7146 *saa, int mode) · 744 unmodified lines | |||
| 745 | } | 745 | } |
| 746 | } | 746 | } |
| 747 | 747 | ||
| 748 | /* Intialize bitmangler to map from a byte value to the mangled word that | 748 | /* Initialize bitmangler to map from a byte value to the mangled word that |
| 749 | * must be output to program the Xilinx part through the DEBI port. | 749 | * must be output to program the Xilinx part through the DEBI port. |
| 750 | * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0 | 750 | * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0 |
| 751 | * transfer FPGA code, init IBM chip, transfer IBM microcode | 751 | * transfer FPGA code, init IBM chip, transfer IBM microcode |
| @@ -1316,7 +1316,7 @@ static struct imx_udc_struct controller = { · 1315 unmodified lines | |||
| 1316 | }; | 1316 | }; |
| 1317 | 1317 | ||
| 1318 | /******************************************************************************* | 1318 | /******************************************************************************* |
| 1319 | * USB gadged driver functions | 1319 | * USB gadget driver functions |
| 1320 | ******************************************************************************* | 1320 | ******************************************************************************* |
| 1321 | */ | 1321 | */ |
| 1322 | int usb_gadget_probe_driver(struct usb_gadget_driver *driver, | 1322 | int usb_gadget_probe_driver(struct usb_gadget_driver *driver, |
| @@ -1658,7 +1658,7 @@ static int imx21_hc_reset(struct usb_hcd *hcd) · 1657 unmodified lines | |||
| 1658 | 1658 | ||
| 1659 | spin_lock_irqsave(&imx21->lock, flags); | 1659 | spin_lock_irqsave(&imx21->lock, flags); |
| 1660 | 1660 | ||
| 1661 | /* Reset the Host controler modules */ | 1661 | /* Reset the Host controller modules */ |
| 1662 | writel(USBOTG_RST_RSTCTRL | USBOTG_RST_RSTRH | | 1662 | writel(USBOTG_RST_RSTCTRL | USBOTG_RST_RSTRH | |
| 1663 | USBOTG_RST_RSTHSIE | USBOTG_RST_RSTHC, | 1663 | USBOTG_RST_RSTHSIE | USBOTG_RST_RSTHC, |
| 1664 | imx21->regs + USBOTG_RST_CTRL); | 1664 | imx21->regs + USBOTG_RST_CTRL); |
| @@ -3094,7 +3094,7 @@ static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf) · 3093 unmodified lines | |||
| 3094 | 3094 | ||
| 3095 | /* Some boards (mostly VIA?) report bogus overcurrent indications, | 3095 | /* Some boards (mostly VIA?) report bogus overcurrent indications, |
| 3096 | * causing massive log spam unless we completely ignore them. It | 3096 | * causing massive log spam unless we completely ignore them. It |
| 3097 | * may be relevant that VIA VT8235 controlers, where PORT_POWER is | 3097 | * may be relevant that VIA VT8235 controllers, where PORT_POWER is |
| 3098 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to | 3098 | * always set, seem to clear PORT_OCC and PORT_CSC when writing to |
| 3099 | * PORT_POWER; that's surprising, but maybe within-spec. | 3099 | * PORT_POWER; that's surprising, but maybe within-spec. |
| 3100 | */ | 3100 | */ |
| @@ -717,7 +717,7 @@ static int adu_probe(struct usb_interface *interface, · 716 unmodified lines | |||
| 717 | goto exit; | 717 | goto exit; |
| 718 | } | 718 | } |
| 719 | 719 | ||
| 720 | /* allocate memory for our device state and intialize it */ | 720 | /* allocate memory for our device state and initialize it */ |
| 721 | dev = kzalloc(sizeof(struct adu_device), GFP_KERNEL); | 721 | dev = kzalloc(sizeof(struct adu_device), GFP_KERNEL); |
| 722 | if (dev == NULL) { | 722 | if (dev == NULL) { |
| 723 | dev_err(&interface->dev, "Out of memory\n"); | 723 | dev_err(&interface->dev, "Out of memory\n"); |
| @@ -768,7 +768,7 @@ static int iowarrior_probe(struct usb_interface *interface, · 767 unmodified lines | |||
| 768 | int i; | 768 | int i; |
| 769 | int retval = -ENOMEM; | 769 | int retval = -ENOMEM; |
| 770 | 770 | ||
| 771 | /* allocate memory for our device state and intialize it */ | 771 | /* allocate memory for our device state and initialize it */ |
| 772 | dev = kzalloc(sizeof(struct iowarrior), GFP_KERNEL); | 772 | dev = kzalloc(sizeof(struct iowarrior), GFP_KERNEL); |
| 773 | if (dev == NULL) { | 773 | if (dev == NULL) { |
| 774 | dev_err(&interface->dev, "Out of memory\n"); | 774 | dev_err(&interface->dev, "Out of memory\n"); |
| @@ -642,7 +642,7 @@ static int ld_usb_probe(struct usb_interface *intf, const struct usb_device_id * · 641 unmodified lines | |||
| 642 | int i; | 642 | int i; |
| 643 | int retval = -ENOMEM; | 643 | int retval = -ENOMEM; |
| 644 | 644 | ||
| 645 | /* allocate memory for our device state and intialize it */ | 645 | /* allocate memory for our device state and initialize it */ |
| 646 | 646 | ||
| 647 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | 647 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); |
| 648 | if (dev == NULL) { | 648 | if (dev == NULL) { |
| @@ -1636,7 +1636,7 @@ static inline void __init musb_g_init_endpoints(struct musb *musb) · 1635 unmodified lines | |||
| 1636 | struct musb_hw_ep *hw_ep; | 1636 | struct musb_hw_ep *hw_ep; |
| 1637 | unsigned count = 0; | 1637 | unsigned count = 0; |
| 1638 | 1638 | ||
| 1639 | /* intialize endpoint list just once */ | 1639 | /* initialize endpoint list just once */ |
| 1640 | INIT_LIST_HEAD(&(musb->g.ep_list)); | 1640 | INIT_LIST_HEAD(&(musb->g.ep_list)); |
| 1641 | 1641 | ||
| 1642 | for (epnum = 0, hw_ep = musb->endpoints; | 1642 | for (epnum = 0, hw_ep = musb->endpoints; |
| @@ -1715,7 +1715,7 @@ void musb_gadget_cleanup(struct musb *musb) · 72 unmodified lines | |||
| 1715 | * | 1715 | * |
| 1716 | * -EINVAL something went wrong (not driver) | 1716 | * -EINVAL something went wrong (not driver) |
| 1717 | * -EBUSY another gadget is already using the controller | 1717 | * -EBUSY another gadget is already using the controller |
| 1718 | * -ENOMEM no memeory to perform the operation | 1718 | * -ENOMEM no memory to perform the operation |
| 1719 | * | 1719 | * |
| 1720 | * @param driver the gadget driver | 1720 | * @param driver the gadget driver |
| 1721 | * @param bind the driver's bind function | 1721 | * @param bind the driver's bind function |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | |||
| 49 | * | 49 | * |
| 50 | * USB Stack port number 4 (1 based) | 50 | * USB Stack port number 4 (1 based) |
| 51 | * WUSB code port index 3 (0 based) | 51 | * WUSB code port index 3 (0 based) |
| 52 | * USB Addresss 5 (2 based -- 0 is for default, 1 for root hub) | 52 | * USB Address 5 (2 based -- 0 is for default, 1 for root hub) |
| 53 | * | 53 | * |
| 54 | * Now, because we don't use the concept as default address exactly | 54 | * Now, because we don't use the concept as default address exactly |
| 55 | * like the (wired) USB code does, we need to kind of skip it. So we | 55 | * like the (wired) USB code does, we need to kind of skip it. So we |
| @@ -536,7 +536,7 @@ static int sstfb_set_par(struct fb_info *info) · 535 unmodified lines | |||
| 536 | fbiinit2 = sst_read(FBIINIT2); | 536 | fbiinit2 = sst_read(FBIINIT2); |
| 537 | fbiinit3 = sst_read(FBIINIT3); | 537 | fbiinit3 = sst_read(FBIINIT3); |
| 538 | 538 | ||
| 539 | /* everything is reset. we enable fbiinit2/3 remap : dac acces ok */ | 539 | /* everything is reset. we enable fbiinit2/3 remap : dac access ok */ |
| 540 | pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, | 540 | pci_write_config_dword(sst_dev, PCI_INIT_ENABLE, |
| 541 | PCI_EN_INIT_WR | PCI_REMAP_DAC ); | 541 | PCI_EN_INIT_WR | PCI_REMAP_DAC ); |
| 542 | 542 | ||
| @@ -577,7 +577,7 @@ struct ext4_mount_options { · 576 unmodified lines | |||
| 577 | #endif | 577 | #endif |
| 578 | }; | 578 | }; |
| 579 | 579 | ||
| 580 | /* Max physical block we can addres w/o extents */ | 580 | /* Max physical block we can address w/o extents */ |
| 581 | #define EXT4_MAX_BLOCK_FILE_PHYS 0xFFFFFFFF | 581 | #define EXT4_MAX_BLOCK_FILE_PHYS 0xFFFFFFFF |
| 582 | 582 | ||
| 583 | /* | 583 | /* |
| @@ -2825,14 +2825,14 @@ fix_extent_len: · 2824 unmodified lines | |||
| 2825 | * to an uninitialized extent. | 2825 | * to an uninitialized extent. |
| 2826 | * | 2826 | * |
| 2827 | * Writing to an uninitized extent may result in splitting the uninitialized | 2827 | * Writing to an uninitized extent may result in splitting the uninitialized |
| 2828 | * extent into multiple /intialized unintialized extents (up to three) | 2828 | * extent into multiple /initialized uninitialized extents (up to three) |
| 2829 | * There are three possibilities: | 2829 | * There are three possibilities: |
| 2830 | * a> There is no split required: Entire extent should be uninitialized | 2830 | * a> There is no split required: Entire extent should be uninitialized |
| 2831 | * b> Splits in two extents: Write is happening at either end of the extent | 2831 | * b> Splits in two extents: Write is happening at either end of the extent |
| 2832 | * c> Splits in three extents: Somone is writing in middle of the extent | 2832 | * c> Splits in three extents: Somone is writing in middle of the extent |
| 2833 | * | 2833 | * |
| 2834 | * One of more index blocks maybe needed if the extent tree grow after | 2834 | * One of more index blocks maybe needed if the extent tree grow after |
| 2835 | * the unintialized extent split. To prevent ENOSPC occur at the IO | 2835 | * the uninitialized extent split. To prevent ENOSPC occur at the IO |
| 2836 | * complete, we need to split the uninitialized extent before DIO submit | 2836 | * complete, we need to split the uninitialized extent before DIO submit |
| 2837 | * the IO. The uninitialized extent called at this time will be split | 2837 | * the IO. The uninitialized extent called at this time will be split |
| 2838 | * into three uninitialized extent(at most). After IO complete, the part | 2838 | * into three uninitialized extent(at most). After IO complete, the part |
| @@ -3740,9 +3740,9 @@ retry: · 3739 unmodified lines | |||
| 3740 | * preallocated extents, and those write extend the file, no need to | 3740 | * preallocated extents, and those write extend the file, no need to |
| 3741 | * fall back to buffered IO. | 3741 | * fall back to buffered IO. |
| 3742 | * | 3742 | * |
| 3743 | * For holes, we fallocate those blocks, mark them as unintialized | 3743 | * For holes, we fallocate those blocks, mark them as uninitialized |
| 3744 | * If those blocks were preallocated, we mark sure they are splited, but | 3744 | * If those blocks were preallocated, we mark sure they are splited, but |
| 3745 | * still keep the range to write as unintialized. | 3745 | * still keep the range to write as uninitialized. |
| 3746 | * | 3746 | * |
| 3747 | * The unwrritten extents will be converted to written when DIO is completed. | 3747 | * The unwrritten extents will be converted to written when DIO is completed. |
| 3748 | * For async direct IO, since the IO may still pending when return, we | 3748 | * For async direct IO, since the IO may still pending when return, we |
| @@ -434,7 +434,7 @@ static int ocfs2_read_locked_inode(struct inode *inode, · 433 unmodified lines | |||
| 434 | * #1 and #2 can be simply solved by never taking the lock | 434 | * #1 and #2 can be simply solved by never taking the lock |
| 435 | * here for system files (which are the only type we read | 435 | * here for system files (which are the only type we read |
| 436 | * during mount). It's a heavier approach, but our main | 436 | * during mount). It's a heavier approach, but our main |
| 437 | * concern is user-accesible files anyway. | 437 | * concern is user-accessible files anyway. |
| 438 | * | 438 | * |
| 439 | * #3 works itself out because we'll eventually take the | 439 | * #3 works itself out because we'll eventually take the |
| 440 | * cluster lock before trusting anything anyway. | 440 | * cluster lock before trusting anything anyway. |
| @@ -1916,7 +1916,7 @@ static int ocfs2_claim_suballoc_bits(struct ocfs2_alloc_context *ac, · 1915 unmodified lines | |||
| 1916 | if (res->sr_bg_blkno) { | 1916 | if (res->sr_bg_blkno) { |
| 1917 | /* Attempt to short-circuit the usual search mechanism | 1917 | /* Attempt to short-circuit the usual search mechanism |
| 1918 | * by jumping straight to the most recently used | 1918 | * by jumping straight to the most recently used |
| 1919 | * allocation group. This helps us mantain some | 1919 | * allocation group. This helps us maintain some |
| 1920 | * contiguousness across allocations. */ | 1920 | * contiguousness across allocations. */ |
| 1921 | status = ocfs2_search_one_group(ac, handle, bits_wanted, | 1921 | status = ocfs2_search_one_group(ac, handle, bits_wanted, |
| 1922 | min_bits, res, &bits_left); | 1922 | min_bits, res, &bits_left); |
| @@ -938,7 +938,7 @@ out_reclaim: · 937 unmodified lines | |||
| 938 | * Slab object creation initialisation for the XFS inode. | 938 | * Slab object creation initialisation for the XFS inode. |
| 939 | * This covers only the idempotent fields in the XFS inode; | 939 | * This covers only the idempotent fields in the XFS inode; |
| 940 | * all other fields need to be initialised on allocation | 940 | * all other fields need to be initialised on allocation |
| 941 | * from the slab. This avoids the need to repeatedly intialise | 941 | * from the slab. This avoids the need to repeatedly initialise |
| 942 | * fields in the xfs inode that left in the initialise state | 942 | * fields in the xfs inode that left in the initialise state |
| 943 | * when freeing the inode. | 943 | * when freeing the inode. |
| 944 | */ | 944 | */ |
| @@ -119,7 +119,7 @@ struct acpi_whea_header { · 118 unmodified lines | |||
| 119 | struct acpi_table_bert { | 119 | struct acpi_table_bert { |
| 120 | struct acpi_table_header header; /* Common ACPI table header */ | 120 | struct acpi_table_header header; /* Common ACPI table header */ |
| 121 | u32 region_length; /* Length of the boot error region */ | 121 | u32 region_length; /* Length of the boot error region */ |
| 122 | u64 address; /* Physical addresss of the error region */ | 122 | u64 address; /* Physical address of the error region */ |
| 123 | }; | 123 | }; |
| 124 | 124 | ||
| 125 | /* Boot Error Region (not a subtable, pointed to by Address field above) */ | 125 | /* Boot Error Region (not a subtable, pointed to by Address field above) */ |
| @@ -564,7 +564,7 @@ struct cgroup_iter { · 563 unmodified lines | |||
| 564 | /* | 564 | /* |
| 565 | * To iterate across the tasks in a cgroup: | 565 | * To iterate across the tasks in a cgroup: |
| 566 | * | 566 | * |
| 567 | * 1) call cgroup_iter_start to intialize an iterator | 567 | * 1) call cgroup_iter_start to initialize an iterator |
| 568 | * | 568 | * |
| 569 | * 2) call cgroup_iter_next() to retrieve member tasks until it | 569 | * 2) call cgroup_iter_next() to retrieve member tasks until it |
| 570 | * returns NULL or until you want to end the iteration | 570 | * returns NULL or until you want to end the iteration |
| @@ -273,7 +273,7 @@ struct fw_cdev_event_iso_interrupt { · 272 unmodified lines | |||
| 273 | * @closure: See &fw_cdev_event_common; | 273 | * @closure: See &fw_cdev_event_common; |
| 274 | * set by %FW_CDEV_CREATE_ISO_CONTEXT ioctl | 274 | * set by %FW_CDEV_CREATE_ISO_CONTEXT ioctl |
| 275 | * @type: %FW_CDEV_EVENT_ISO_INTERRUPT_MULTICHANNEL | 275 | * @type: %FW_CDEV_EVENT_ISO_INTERRUPT_MULTICHANNEL |
| 276 | * @completed: Offset into the receive buffer; data before this offest is valid | 276 | * @completed: Offset into the receive buffer; data before this offset is valid |
| 277 | * | 277 | * |
| 278 | * This event is sent in multichannel contexts (context type | 278 | * This event is sent in multichannel contexts (context type |
| 279 | * %FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL) for &fw_cdev_iso_packet buffer | 279 | * %FW_CDEV_ISO_CONTEXT_RECEIVE_MULTICHANNEL) for &fw_cdev_iso_packet buffer |
| @@ -39,7 +39,7 @@ struct mfd_cell { · 38 unmodified lines | |||
| 39 | size_t data_size; | 39 | size_t data_size; |
| 40 | 40 | ||
| 41 | /* | 41 | /* |
| 42 | * This resources can be specified relatievly to the parent device. | 42 | * This resources can be specified relatively to the parent device. |
| 43 | * For accessing device you should use resources from device | 43 | * For accessing device you should use resources from device |
| 44 | */ | 44 | */ |
| 45 | int num_resources; | 45 | int num_resources; |
| @@ -99,8 +99,8 @@ typedef __s32 sctp_assoc_t; · 98 unmodified lines | |||
| 99 | #define SCTP_SOCKOPT_PEELOFF 102 /* peel off association. */ | 99 | #define SCTP_SOCKOPT_PEELOFF 102 /* peel off association. */ |
| 100 | /* Options 104-106 are deprecated and removed. Do not use this space */ | 100 | /* Options 104-106 are deprecated and removed. Do not use this space */ |
| 101 | #define SCTP_SOCKOPT_CONNECTX_OLD 107 /* CONNECTX old requests. */ | 101 | #define SCTP_SOCKOPT_CONNECTX_OLD 107 /* CONNECTX old requests. */ |
| 102 | #define SCTP_GET_PEER_ADDRS 108 /* Get all peer addresss. */ | 102 | #define SCTP_GET_PEER_ADDRS 108 /* Get all peer address. */ |
| 103 | #define SCTP_GET_LOCAL_ADDRS 109 /* Get all local addresss. */ | 103 | #define SCTP_GET_LOCAL_ADDRS 109 /* Get all local address. */ |
| 104 | #define SCTP_SOCKOPT_CONNECTX 110 /* CONNECTX requests. */ | 104 | #define SCTP_SOCKOPT_CONNECTX 110 /* CONNECTX requests. */ |
| 105 | #define SCTP_SOCKOPT_CONNECTX3 111 /* CONNECTX requests (updated) */ | 105 | #define SCTP_SOCKOPT_CONNECTX3 111 /* CONNECTX requests (updated) */ |
| 106 | 106 | ||
| @@ -46,7 +46,7 @@ · 45 unmodified lines | |||
| 46 | */ | 46 | */ |
| 47 | struct fcp_cmnd { | 47 | struct fcp_cmnd { |
| 48 | __u8 fc_lun[8]; /* logical unit number */ | 48 | __u8 fc_lun[8]; /* logical unit number */ |
| 49 | __u8 fc_cmdref; /* commmand reference number */ | 49 | __u8 fc_cmdref; /* command reference number */ |
| 50 | __u8 fc_pri_ta; /* priority and task attribute */ | 50 | __u8 fc_pri_ta; /* priority and task attribute */ |
| 51 | __u8 fc_tm_flags; /* task management flags */ | 51 | __u8 fc_tm_flags; /* task management flags */ |
| 52 | __u8 fc_flags; /* additional len & flags */ | 52 | __u8 fc_flags; /* additional len & flags */ |
| @@ -58,7 +58,7 @@ struct fcp_cmnd { · 5 unmodified lines | |||
| 58 | 58 | ||
| 59 | struct fcp_cmnd32 { | 59 | struct fcp_cmnd32 { |
| 60 | __u8 fc_lun[8]; /* logical unit number */ | 60 | __u8 fc_lun[8]; /* logical unit number */ |
| 61 | __u8 fc_cmdref; /* commmand reference number */ | 61 | __u8 fc_cmdref; /* command reference number */ |
| 62 | __u8 fc_pri_ta; /* priority and task attribute */ | 62 | __u8 fc_pri_ta; /* priority and task attribute */ |
| 63 | __u8 fc_tm_flags; /* task management flags */ | 63 | __u8 fc_tm_flags; /* task management flags */ |
| 64 | __u8 fc_flags; /* additional len & flags */ | 64 | __u8 fc_flags; /* additional len & flags */ |
| @@ -2913,7 +2913,7 @@ static void __init kdb_cmd_init(void) · 2912 unmodified lines | |||
| 2913 | } | 2913 | } |
| 2914 | } | 2914 | } |
| 2915 | 2915 | ||
| 2916 | /* Intialize kdb_printf, breakpoint tables and kdb state */ | 2916 | /* Initialize kdb_printf, breakpoint tables and kdb state */ |
| 2917 | void __init kdb_init(int lvl) | 2917 | void __init kdb_init(int lvl) |
| 2918 | { | 2918 | { |
| 2919 | static int kdb_init_lvl = KDB_NOT_INITIALIZED; | 2919 | static int kdb_init_lvl = KDB_NOT_INITIALIZED; |
| @@ -163,7 +163,7 @@ static int do_kimage_alloc(struct kimage **rimage, unsigned long entry, · 162 unmodified lines | |||
| 163 | * just verifies it is an address we can use. | 163 | * just verifies it is an address we can use. |
| 164 | * | 164 | * |
| 165 | * Since the kernel does everything in page size chunks ensure | 165 | * Since the kernel does everything in page size chunks ensure |
| 166 | * the destination addreses are page aligned. Too many | 166 | * the destination addresses are page aligned. Too many |
| 167 | * special cases crop of when we don't do this. The most | 167 | * special cases crop of when we don't do this. The most |
| 168 | * insidious is getting overlapping destination addresses | 168 | * insidious is getting overlapping destination addresses |
| 169 | * simply because addresses are changed to page size | 169 | * simply because addresses are changed to page size |
| @@ -865,7 +865,7 @@ out_finish: · 864 unmodified lines | |||
| 865 | /** | 865 | /** |
| 866 | * swsusp_read - read the hibernation image. | 866 | * swsusp_read - read the hibernation image. |
| 867 | * @flags_p: flags passed by the "frozen" kernel in the image header should | 867 | * @flags_p: flags passed by the "frozen" kernel in the image header should |
| 868 | * be written into this memeory location | 868 | * be written into this memory location |
| 869 | */ | 869 | */ |
| 870 | 870 | ||
| 871 | int swsusp_read(unsigned int *flags_p) | 871 | int swsusp_read(unsigned int *flags_p) |
| @@ -2568,7 +2568,7 @@ out: · 2567 unmodified lines | |||
| 2568 | * try_to_wake_up_local - try to wake up a local task with rq lock held | 2568 | * try_to_wake_up_local - try to wake up a local task with rq lock held |
| 2569 | * @p: the thread to be awakened | 2569 | * @p: the thread to be awakened |
| 2570 | * | 2570 | * |
| 2571 | * Put @p on the run-queue if it's not alredy there. The caller must | 2571 | * Put @p on the run-queue if it's not already there. The caller must |
| 2572 | * ensure that this_rq() is locked, @p is bound to this_rq() and not | 2572 | * ensure that this_rq() is locked, @p is bound to this_rq() and not |
| 2573 | * the current task. this_rq() stays locked over invocation. | 2573 | * the current task. this_rq() stays locked over invocation. |
| 2574 | */ | 2574 | */ |
| @@ -1193,7 +1193,7 @@ static ssize_t bin_dn_node_address(struct file *file, · 1192 unmodified lines | |||
| 1193 | 1193 | ||
| 1194 | buf[result] = '\0'; | 1194 | buf[result] = '\0'; |
| 1195 | 1195 | ||
| 1196 | /* Convert the decnet addresss to binary */ | 1196 | /* Convert the decnet address to binary */ |
| 1197 | result = -EIO; | 1197 | result = -EIO; |
| 1198 | nodep = strchr(buf, '.') + 1; | 1198 | nodep = strchr(buf, '.') + 1; |
| 1199 | if (!nodep) | 1199 | if (!nodep) |
| @@ -678,7 +678,7 @@ EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale); · 677 unmodified lines | |||
| 678 | int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq) | 678 | int __clocksource_register_scale(struct clocksource *cs, u32 scale, u32 freq) |
| 679 | { | 679 | { |
| 680 | 680 | ||
| 681 | /* Intialize mult/shift and max_idle_ns */ | 681 | /* Initialize mult/shift and max_idle_ns */ |
| 682 | __clocksource_updatefreq_scale(cs, scale, freq); | 682 | __clocksource_updatefreq_scale(cs, scale, freq); |
| 683 | 683 | ||
| 684 | /* Add clocksource to the clcoksource list */ | 684 | /* Add clocksource to the clcoksource list */ |
| @@ -53,7 +53,7 @@ · 52 unmodified lines | |||
| 53 | */ | 53 | */ |
| 54 | 54 | ||
| 55 | /* | 55 | /* |
| 56 | * Function trace entry - function address and parent function addres: | 56 | * Function trace entry - function address and parent function address: |
| 57 | */ | 57 | */ |
| 58 | FTRACE_ENTRY(function, ftrace_entry, | 58 | FTRACE_ENTRY(function, ftrace_entry, |
| 59 | 59 | ||
| @@ -167,7 +167,7 @@ nla_policy_len(const struct nla_policy *p, int n) · 166 unmodified lines | |||
| 167 | * @policy: validation policy | 167 | * @policy: validation policy |
| 168 | * | 168 | * |
| 169 | * Parses a stream of attributes and stores a pointer to each attribute in | 169 | * Parses a stream of attributes and stores a pointer to each attribute in |
| 170 | * the tb array accessable via the attribute type. Attributes with a type | 170 | * the tb array accessible via the attribute type. Attributes with a type |
| 171 | * exceeding maxtype will be silently ignored for backwards compatibility | 171 | * exceeding maxtype will be silently ignored for backwards compatibility |
| 172 | * reasons. policy may be set to NULL if no validation is required. | 172 | * reasons. policy may be set to NULL if no validation is required. |
| 173 | * | 173 | * |
| @@ -60,7 +60,7 @@ int swiotlb_force; · 59 unmodified lines | |||
| 60 | static char *io_tlb_start, *io_tlb_end; | 60 | static char *io_tlb_start, *io_tlb_end; |
| 61 | 61 | ||
| 62 | /* | 62 | /* |
| 63 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | 63 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
| 64 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | 64 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
| 65 | */ | 65 | */ |
| 66 | static unsigned long io_tlb_nslabs; | 66 | static unsigned long io_tlb_nslabs; |
| @@ -258,7 +258,7 @@ static void __maybe_unused pcpu_next_pop(struct pcpu_chunk *chunk, · 257 unmodified lines | |||
| 258 | 258 | ||
| 259 | /* | 259 | /* |
| 260 | * (Un)populated page region iterators. Iterate over (un)populated | 260 | * (Un)populated page region iterators. Iterate over (un)populated |
| 261 | * page regions betwen @start and @end in @chunk. @rs and @re should | 261 | * page regions between @start and @end in @chunk. @rs and @re should |
| 262 | * be integer variables and will be set to start and end page index of | 262 | * be integer variables and will be set to start and end page index of |
| 263 | * the current region. | 263 | * the current region. |
| 264 | */ | 264 | */ |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | |||
| 9 | * | 9 | * |
| 10 | * However, virtual mappings need a page table and TLBs. Many Linux | 10 | * However, virtual mappings need a page table and TLBs. Many Linux |
| 11 | * architectures already map their physical space using 1-1 mappings | 11 | * architectures already map their physical space using 1-1 mappings |
| 12 | * via TLBs. For those arches the virtual memmory map is essentially | 12 | * via TLBs. For those arches the virtual memory map is essentially |
| 13 | * for free if we use the same page size as the 1-1 mappings. In that | 13 | * for free if we use the same page size as the 1-1 mappings. In that |
| 14 | * case the overhead consists of a few additional pages that are | 14 | * case the overhead consists of a few additional pages that are |
| 15 | * allocated to create a view of memory for vmemmap. | 15 | * allocated to create a view of memory for vmemmap. |
| @@ -6096,7 +6096,7 @@ static void __net_exit default_device_exit(struct net *net) · 6095 unmodified lines | |||
| 6096 | static void __net_exit default_device_exit_batch(struct list_head *net_list) | 6096 | static void __net_exit default_device_exit_batch(struct list_head *net_list) |
| 6097 | { | 6097 | { |
| 6098 | /* At exit all network devices most be removed from a network | 6098 | /* At exit all network devices most be removed from a network |
| 6099 | * namespace. Do this in the reverse order of registeration. | 6099 | * namespace. Do this in the reverse order of registration. |
| 6100 | * Do this across as many network namespaces as possible to | 6100 | * Do this across as many network namespaces as possible to |
| 6101 | * improve batching efficiency. | 6101 | * improve batching efficiency. |
| 6102 | */ | 6102 | */ |
| @@ -1112,7 +1112,7 @@ static struct dn_dev *dn_dev_create(struct net_device *dev, int *err) · 1111 unmodified lines | |||
| 1112 | /* | 1112 | /* |
| 1113 | * This processes a device up event. We only start up | 1113 | * This processes a device up event. We only start up |
| 1114 | * the loopback device & ethernet devices with correct | 1114 | * the loopback device & ethernet devices with correct |
| 1115 | * MAC addreses automatically. Others must be started | 1115 | * MAC addresses automatically. Others must be started |
| 1116 | * specifically. | 1116 | * specifically. |
| 1117 | * | 1117 | * |
| 1118 | * FIXME: How should we configure the loopback address ? If we could dispense | 1118 | * FIXME: How should we configure the loopback address ? If we could dispense |
| @@ -1336,7 +1336,7 @@ static inline unsigned int tcp_cwnd_test(struct tcp_sock *tp, · 1335 unmodified lines | |||
| 1336 | return 0; | 1336 | return 0; |
| 1337 | } | 1337 | } |
| 1338 | 1338 | ||
| 1339 | /* Intialize TSO state of a skb. | 1339 | /* Initialize TSO state of a skb. |
| 1340 | * This must be invoked the first time we consider transmitting | 1340 | * This must be invoked the first time we consider transmitting |
| 1341 | * SKB onto the wire. | 1341 | * SKB onto the wire. |
| 1342 | */ | 1342 | */ |
| @@ -946,7 +946,7 @@ static void randomize_choice_values(struct symbol *csym) · 945 unmodified lines | |||
| 946 | int cnt, def; | 946 | int cnt, def; |
| 947 | 947 | ||
| 948 | /* | 948 | /* |
| 949 | * If choice is mod then we may have more items slected | 949 | * If choice is mod then we may have more items selected |
| 950 | * and if no then no-one. | 950 | * and if no then no-one. |
| 951 | * In both cases stop. | 951 | * In both cases stop. |
| 952 | */ | 952 | */ |
| @@ -1614,7 +1614,7 @@ static void section_rel(const char *modname, struct elf_info *elf, · 1613 unmodified lines | |||
| 1614 | * A module includes a number of sections that are discarded | 1614 | * A module includes a number of sections that are discarded |
| 1615 | * either when loaded or when used as built-in. | 1615 | * either when loaded or when used as built-in. |
| 1616 | * For loaded modules all functions marked __init and all data | 1616 | * For loaded modules all functions marked __init and all data |
| 1617 | * marked __initdata will be discarded when the module has been intialized. | 1617 | * marked __initdata will be discarded when the module has been initialized. |
| 1618 | * Likewise for modules used built-in the sections marked __exit | 1618 | * Likewise for modules used built-in the sections marked __exit |
| 1619 | * are discarded because __exit marked function are supposed to be called | 1619 | * are discarded because __exit marked function are supposed to be called |
| 1620 | * only when a module is unloaded which never happens for built-in modules. | 1620 | * only when a module is unloaded which never happens for built-in modules. |
| @@ -27,7 +27,7 @@ · 26 unmodified lines | |||
| 27 | * The format used for transition tables is based on the GNU flex table | 27 | * The format used for transition tables is based on the GNU flex table |
| 28 | * file format (--tables-file option; see Table File Format in the flex | 28 | * file format (--tables-file option; see Table File Format in the flex |
| 29 | * info pages and the flex sources for documentation). The magic number | 29 | * info pages and the flex sources for documentation). The magic number |
| 30 | * used in the header is 0x1B5E783D insted of 0xF13C57B1 though, because | 30 | * used in the header is 0x1B5E783D instead of 0xF13C57B1 though, because |
| 31 | * the YY_ID_CHK (check) and YY_ID_DEF (default) tables are used | 31 | * the YY_ID_CHK (check) and YY_ID_DEF (default) tables are used |
| 32 | * slightly differently (see the apparmor-parser package). | 32 | * slightly differently (see the apparmor-parser package). |
| 33 | */ | 33 | */ |
| @@ -642,7 +642,7 @@ static struct device_attribute card_number_attrs = · 641 unmodified lines | |||
| 642 | * external accesses. Thus, you should call this function at the end | 642 | * external accesses. Thus, you should call this function at the end |
| 643 | * of the initialization of the card. | 643 | * of the initialization of the card. |
| 644 | * | 644 | * |
| 645 | * Returns zero otherwise a negative error code if the registrain failed. | 645 | * Returns zero otherwise a negative error code if the registration failed. |
| 646 | */ | 646 | */ |
| 647 | int snd_card_register(struct snd_card *card) | 647 | int snd_card_register(struct snd_card *card) |
| 648 | { | 648 | { |
| @@ -985,7 +985,7 @@ static int snd_pcm_do_pause(struct snd_pcm_substream *substream, int push) · 984 unmodified lines | |||
| 985 | if (push) | 985 | if (push) |
| 986 | snd_pcm_update_hw_ptr(substream); | 986 | snd_pcm_update_hw_ptr(substream); |
| 987 | /* The jiffies check in snd_pcm_update_hw_ptr*() is done by | 987 | /* The jiffies check in snd_pcm_update_hw_ptr*() is done by |
| 988 | * a delta betwen the current jiffies, this gives a large enough | 988 | * a delta between the current jiffies, this gives a large enough |
| 989 | * delta, effectively to skip the check once. | 989 | * delta, effectively to skip the check once. |
| 990 | */ | 990 | */ |
| 991 | substream->runtime->hw_ptr_jiffies = jiffies - HZ * 1000; | 991 | substream->runtime->hw_ptr_jiffies = jiffies - HZ * 1000; |
| @@ -264,7 +264,7 @@ static int __devinit snd_opl3sa2_detect(struct snd_card *card) · 263 unmodified lines | |||
| 264 | snd_printd("OPL3-SA [0x%lx] detect (1) = 0x%x (0x%x)\n", port, tmp, tmp1); | 264 | snd_printd("OPL3-SA [0x%lx] detect (1) = 0x%x (0x%x)\n", port, tmp, tmp1); |
| 265 | return -ENODEV; | 265 | return -ENODEV; |
| 266 | } | 266 | } |
| 267 | /* try if the MIC register is accesible */ | 267 | /* try if the MIC register is accessible */ |
| 268 | tmp = snd_opl3sa2_read(chip, OPL3SA2_MIC); | 268 | tmp = snd_opl3sa2_read(chip, OPL3SA2_MIC); |
| 269 | snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x8a); | 269 | snd_opl3sa2_write(chip, OPL3SA2_MIC, 0x8a); |
| 270 | if (((tmp1 = snd_opl3sa2_read(chip, OPL3SA2_MIC)) & 0x9f) != 0x8a) { | 270 | if (((tmp1 = snd_opl3sa2_read(chip, OPL3SA2_MIC)) & 0x9f) != 0x8a) { |
| @@ -188,7 +188,7 @@ · 187 unmodified lines | |||
| 188 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ | 188 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ |
| 189 | /* PTR[5:0], Default: 0x0 */ | 189 | /* PTR[5:0], Default: 0x0 */ |
| 190 | #define PLAYBACK_UNKNOWN3 0x03 /* Not used ?? */ | 190 | #define PLAYBACK_UNKNOWN3 0x03 /* Not used ?? */ |
| 191 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */ | 191 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
| 192 | /* DMA[31:0], Default: 0x0 */ | 192 | /* DMA[31:0], Default: 0x0 */ |
| 193 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */ | 193 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */ |
| 194 | /* SIZE[31:16], Default: 0x0 */ | 194 | /* SIZE[31:16], Default: 0x0 */ |
| @@ -114,7 +114,7 @@ MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard."); · 113 unmodified lines | |||
| 114 | */ | 114 | */ |
| 115 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ | 115 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ |
| 116 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ | 116 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ |
| 117 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */ | 117 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
| 118 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ | 118 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ |
| 119 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ | 119 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ |
| 120 | #define PLAYBACK_UNKNOWN1 0x07 | 120 | #define PLAYBACK_UNKNOWN1 0x07 |
| @@ -96,7 +96,7 @@ · 95 unmodified lines | |||
| 96 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ | 96 | #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ |
| 97 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ | 97 | #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ |
| 98 | #define PLAYBACK_UNKNOWN3 0x03 /* Not used */ | 98 | #define PLAYBACK_UNKNOWN3 0x03 /* Not used */ |
| 99 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */ | 99 | #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
| 100 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */ | 100 | #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size. win2000 uses 0x04000000 */ |
| 101 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine buffer position currently in DAC */ | 101 | #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Used with PLAYBACK_LIST_PTR to determine buffer position currently in DAC */ |
| 102 | #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */ | 102 | #define PLAYBACK_FIFO_END_ADDRESS 0x07 /* Playback FIFO end address */ |
| @@ -220,7 +220,7 @@ MODULE_PARM_DESC(joystick, "Enable joystick."); · 219 unmodified lines | |||
| 220 | #define RINGB_EN_2CODEC 0x0020 | 220 | #define RINGB_EN_2CODEC 0x0020 |
| 221 | #define RINGB_SING_BIT_DUAL 0x0040 | 221 | #define RINGB_SING_BIT_DUAL 0x0040 |
| 222 | 222 | ||
| 223 | /* ****Port Adresses**** */ | 223 | /* ****Port Addresses**** */ |
| 224 | 224 | ||
| 225 | /* Write & Read */ | 225 | /* Write & Read */ |
| 226 | #define ESM_INDEX 0x02 | 226 | #define ESM_INDEX 0x02 |
| @@ -487,7 +487,7 @@ struct hdspm { · 486 unmodified lines | |||
| 487 | struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; | 487 | struct snd_kcontrol *playback_mixer_ctls[HDSPM_MAX_CHANNELS]; |
| 488 | /* but input to much, so not used */ | 488 | /* but input to much, so not used */ |
| 489 | struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS]; | 489 | struct snd_kcontrol *input_mixer_ctls[HDSPM_MAX_CHANNELS]; |
| 490 | /* full mixer accessable over mixer ioctl or hwdep-device */ | 490 | /* full mixer accessible over mixer ioctl or hwdep-device */ |
| 491 | struct hdspm_mixer *mixer; | 491 | struct hdspm_mixer *mixer; |
| 492 | 492 | ||
| 493 | }; | 493 | }; |
| @@ -550,7 +550,7 @@ static inline int HDSPM_bit2freq(int n) · 56 unmodified lines | |||
| 550 | return bit2freq_tab[n]; | 550 | return bit2freq_tab[n]; |
| 551 | } | 551 | } |
| 552 | 552 | ||
| 553 | /* Write/read to/from HDSPM with Adresses in Bytes | 553 | /* Write/read to/from HDSPM with Addresses in Bytes |
| 554 | not words but only 32Bit writes are allowed */ | 554 | not words but only 32Bit writes are allowed */ |
| 555 | 555 | ||
| 556 | static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg, | 556 | static inline void hdspm_write(struct hdspm * hdspm, unsigned int reg, |
| @@ -2908,7 +2908,7 @@ static int snd_hdspm_create_controls(struct snd_card *card, struct hdspm * hdspm · 2351 unmodified lines | |||
| 2908 | 2908 | ||
| 2909 | /* Channel playback mixer as default control | 2909 | /* Channel playback mixer as default control |
| 2910 | Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, | 2910 | Note: the whole matrix would be 128*HDSPM_MIXER_CHANNELS Faders, |
| 2911 | thats too * big for any alsamixer they are accesible via special | 2911 | thats too * big for any alsamixer they are accessible via special |
| 2912 | IOCTL on hwdep and the mixer 2dimensional mixer control | 2912 | IOCTL on hwdep and the mixer 2dimensional mixer control |
| 2913 | */ | 2913 | */ |
| 2914 | 2914 | ||
| @@ -1953,7 +1953,7 @@ static int max98088_probe(struct snd_soc_codec *codec) · 1952 unmodified lines | |||
| 1953 | return ret; | 1953 | return ret; |
| 1954 | } | 1954 | } |
| 1955 | 1955 | ||
| 1956 | /* initalize private data */ | 1956 | /* initialize private data */ |
| 1957 | 1957 | ||
| 1958 | max98088->sysclk = (unsigned)-1; | 1958 | max98088->sysclk = (unsigned)-1; |
| 1959 | max98088->eq_textcnt = 0; | 1959 | max98088->eq_textcnt = 0; |
| @@ -61,7 +61,7 @@ static int set_audio_clock_heirachy(struct platform_device *pdev) · 60 unmodified lines | |||
| 61 | goto out3; | 61 | goto out3; |
| 62 | } | 62 | } |
| 63 | 63 | ||
| 64 | /* Set audio clock heirachy for S/PDIF */ | 64 | /* Set audio clock hierarchy for S/PDIF */ |
| 65 | clk_set_parent(mout_epll, fout_epll); | 65 | clk_set_parent(mout_epll, fout_epll); |
| 66 | clk_set_parent(sclk_audio0, mout_epll); | 66 | clk_set_parent(sclk_audio0, mout_epll); |
| 67 | clk_set_parent(sclk_spdif, sclk_audio0); | 67 | clk_set_parent(sclk_spdif, sclk_audio0); |
| @@ -79,7 +79,7 @@ out1: · 11 unmodified lines | |||
| 79 | 79 | ||
| 80 | /* We should haved to set clock directly on this part because of clock | 80 | /* We should haved to set clock directly on this part because of clock |
| 81 | * scheme of Samsudng SoCs did not support to set rates from abstrct | 81 | * scheme of Samsudng SoCs did not support to set rates from abstrct |
| 82 | * clock of it's heirachy. | 82 | * clock of it's hierarchy. |
| 83 | */ | 83 | */ |
| 84 | static int set_audio_clock_rate(unsigned long epll_rate, | 84 | static int set_audio_clock_rate(unsigned long epll_rate, |
| 85 | unsigned long audio_rate) | 85 | unsigned long audio_rate) |
| @@ -197,7 +197,7 @@ static int __init smdk_init(void) · 111 unmodified lines | |||
| 197 | if (ret) | 197 | if (ret) |
| 198 | goto err1; | 198 | goto err1; |
| 199 | 199 | ||
| 200 | /* Set audio clock heirachy manually */ | 200 | /* Set audio clock hierarchy manually */ |
| 201 | ret = set_audio_clock_heirachy(smdk_snd_spdif_device); | 201 | ret = set_audio_clock_heirachy(smdk_snd_spdif_device); |
| 202 | if (ret) | 202 | if (ret) |
| 203 | goto err1; | 203 | goto err1; |