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spi: add SPI_RX_CPHA_FLIP mode bit

Some SPI devices latch MOSI bits on one clock phase, but produce valid MISO bits on the other phase. Add SPI_RX_CPHA_FLIP mode to instruct the controller driver to flip CPHA for Rx (MISO) only transfers.

Baruch Siach committed 4 years ago

Commit b617be31 parent 4bbaa851 file · +2 −1Browse files

Showing the changes to include/uapi (1 of 1 file). Show all

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include/uapi/linux/spi/spi.h+2−1
@@ -27,6 +27,7 @@ · 26 unmodified lines
27#define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */27#define SPI_TX_OCTAL _BITUL(13) /* transmit with 8 wires */
28#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */28#define SPI_RX_OCTAL _BITUL(14) /* receive with 8 wires */
29#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */29#define SPI_3WIRE_HIZ _BITUL(15) /* high impedance turnaround */
30#define SPI_RX_CPHA_FLIP _BITUL(16) /* flip CPHA on Rx only xfer */
30 31
31/*32/*
32 * All the bits defined above should be covered by SPI_MODE_USER_MASK.33 * All the bits defined above should be covered by SPI_MODE_USER_MASK.
@@ -36,6 +37,6 @@ · 3 unmodified lines
36 * These bits must not overlap. A static assert check should make sure of that.37 * These bits must not overlap. A static assert check should make sure of that.
37 * If adding extra bits, make sure to increase the bit index below as well.38 * If adding extra bits, make sure to increase the bit index below as well.
38 */39 */
39#define SPI_MODE_USER_MASK (_BITUL(16) - 1)40#define SPI_MODE_USER_MASK (_BITUL(17) - 1)
40 41
41#endif /* _UAPI_SPI_H */42#endif /* _UAPI_SPI_H */