Add a new .note section containing type, size, offset and flags of every xfeature that is present. This information will be used by debuggers to understand the XSAVE layout of the machine where the core file has been dumped, and to read XSAVE registers, especially during cross-platform debugging. The XSAVE layouts of modern AMD and Intel CPUs differ, especially since Memory Protection Keys and the AVX-512 features have been inculcated into the AMD CPUs. Since AMD never adopted (and hence never left room in the XSAVE layout for) the Intel MPX feature, tools like GDB had assumed a fixed XSAVE layout matching that of Intel (based on the XCR0 mask). Hence, core dumps from AMD CPUs didn't match the known size for the XCR0 mask. This resulted in GDB and other tools not being able to access the values of the AVX-512 and PKRU registers on AMD CPUs. To solve this, an interim solution has been accepted into GDB, and is already a part of GDB 14, see https://sourceware.org/pipermail/gdb-patches/2023-March/198081.html. But it depends on heuristics based on the total XSAVE register set size and the XCR0 mask to infer the layouts of the various register blocks for core dumps, and hence, is not a foolproof mechanism to determine the layout of the XSAVE area. Therefore, add a new core dump note in order to allow GDB/LLDB and other relevant tools to determine the layout of the XSAVE area of the machine where the corefile was dumped. The new core dump note (which is being proposed as a per-process .note section), NT_X86_XSAVE_LAYOUT (0x205) contains an array of structures. Each structure describes an individual extended feature containing offset, size and flags in this format: struct x86_xfeat_component { u32 type; u32 size; u32 offset; u32 flags; }; and in an independent manner, allowing for future extensions without depending on hw arch specifics like CPUID etc. [ bp: Massage commit message, zap trailing whitespace. ]
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| @@ -411,6 +411,7 @@ typedef struct elf64_shdr { · 410 unmodified lines | |||
| 411 | #define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */ | 411 | #define NT_X86_XSTATE 0x202 /* x86 extended state using xsave */ |
| 412 | /* Old binutils treats 0x203 as a CET state */ | 412 | /* Old binutils treats 0x203 as a CET state */ |
| 413 | #define NT_X86_SHSTK 0x204 /* x86 SHSTK state */ | 413 | #define NT_X86_SHSTK 0x204 /* x86 SHSTK state */ |
| 414 | #define NT_X86_XSAVE_LAYOUT 0x205 /* XSAVE layout description */ | ||
| 414 | #define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */ | 415 | #define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */ |
| 415 | #define NT_S390_TIMER 0x301 /* s390 timer register */ | 416 | #define NT_S390_TIMER 0x301 /* s390 timer register */ |
| 416 | #define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */ | 417 | #define NT_S390_TODCMP 0x302 /* s390 TOD clock comparator register */ |