Leverage the commit for ARM by Will Deacon: - 446a5a8b1eb91a6990e5c8fe29f14e7a95b69132 ARM: 6205/1: perf: ensure counter delta is treated as unsigned Hardware performance counters on ARM are 32-bits wide but atomic64_t variables are used to represent counter data in the hw_perf_event structure. The armpmu_event_update function right-shifts a signed 64-bit delta variable and adds the result to the event count. This can lead to shifting in sign-bits if the MSB of the 32-bit counter value is set. This results in perf output such as: Performance counter stats for 'sleep 20': 18446744073460670464 cycles <-- 0xFFFFFFFFF12A6000 7783773 instructions # 0.000 IPC 465 context-switches 161 page-faults 1172393 branches 20.154242147 seconds time elapsed This patch ensures that the delta value is treated as unsigned so that the right shift sets the upper bits to zero.
Unified · Split
| @@ -169,7 +169,7 @@ static void mipspmu_event_update(struct perf_event *event, · 168 unmodified lines | ||
| 169 | 169 | unsigned long flags; |
| 170 | 170 | int shift = 64 - TOTAL_BITS; |
| 171 | 171 | s64 prev_raw_count, new_raw_count; |
| 172 | − s64 delta; | |
| 172 | + u64 delta; | |
| 173 | 173 | |
| 174 | 174 | again: |
| 175 | 175 | prev_raw_count = local64_read(&hwc->prev_count); |