Pull char/misc and other driver subsystem updates from Greg KH: "Here is the big set of char/misc and a number of other driver subsystem updates for 6.9-rc1. Included in here are: - IIO driver updates, loads of new ones and evolution of existing ones - coresight driver updates - const cleanups for many driver subsystems - speakup driver additions - platform remove callback void cleanups - mei driver updates - mhi driver updates - cdx driver updates for MSI interrupt handling - nvmem driver updates - other smaller driver updates and cleanups, full details in the shortlog All of these have been in linux-next for a long time with no reported issue, other than a build warning for the speakup driver" The build warning hits clang and is a gcc (and C23) extension, and is fixed up in the merge. Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/ * tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits) binder: remove redundant variable page_addr uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion uio_pruss: UIO_MEM_DMA_COHERENT conversion cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT uio: introduce UIO_MEM_DMA_COHERENT type cdx: add MSI support for CDX bus pps: use cflags-y instead of EXTRA_CFLAGS speakup: Add /dev/synthu device speakup: Fix 8bit characters from direct synth parport: sunbpp: Convert to platform remove callback returning void parport: amiga: Convert to platform remove callback returning void char: xillybus: Convert to platform remove callback returning void vmw_balloon: change maintainership MAINTAINERS: change the maintainer for hpilo driver char: xilinx_hwicap: Fix NULL vs IS_ERR() bug hpet: remove hpets::hp_clocksource platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH char: xilinx_hwicap: drop casting to void in dev_set_drvdata greybus: move is_gb_* functions out of greybus.h greybus: Remove usage of the deprecated ida_simple_xx() API ...
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| @@ -3,6 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | * Xilinx Zynq MPSoC Firmware layer |
| 4 | 4 | * |
| 5 | 5 | * Copyright (C) 2014-2021 Xilinx |
| 6 | + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. | |
| 6 | 7 | * |
| 7 | 8 | * Michal Simek <michal.simek@amd.com> |
| 8 | 9 | * Davorin Mista <davorin.mista@aggios.com> |
| @@ -171,6 +172,7 @@ enum pm_api_id { · 162 unmodified lines | ||
| 171 | 172 | PM_CLOCK_GETPARENT = 44, |
| 172 | 173 | PM_FPGA_READ = 46, |
| 173 | 174 | PM_SECURE_AES = 47, |
| 175 | + PM_EFUSE_ACCESS = 53, | |
| 174 | 176 | PM_FEATURE_CHECK = 63, |
| 175 | 177 | }; |
| 176 | 178 | |
| @@ -562,6 +564,7 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, · 385 unmodified lines | ||
| 562 | 564 | const u32 qos, |
| 563 | 565 | const enum zynqmp_pm_request_ack ack); |
| 564 | 566 | int zynqmp_pm_aes_engine(const u64 address, u32 *out); |
| 567 | +int zynqmp_pm_efuse_access(const u64 address, u32 *out); | |
| 565 | 568 | int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags); |
| 566 | 569 | int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags); |
| 567 | 570 | int zynqmp_pm_fpga_get_status(u32 *value); |
| @@ -749,6 +752,11 @@ static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out) · 181 unmodified lines | ||
| 749 | 752 | return -ENODEV; |
| 750 | 753 | } |
| 751 | 754 | |
| 755 | +static inline int zynqmp_pm_efuse_access(const u64 address, u32 *out) | |
| 756 | +{ | |
| 757 | + return -ENODEV; | |
| 758 | +} | |
| 759 | + | |
| 752 | 760 | static inline int zynqmp_pm_sha_hash(const u64 address, const u32 size, |
| 753 | 761 | const u32 flags) |
| 754 | 762 | { |