lael-labs/linux

Documentation/ABI/testing/sysfs-bus-cxl+13−2

 		whether it resides in persistent capacity, volatile capacity,
 		or the LSA, is made permanently unavailable by whatever means
 		is appropriate for the media type. This functionality requires
-		the device to be not be actively decoding any HPA ranges.
+		the device to be disabled, that is, not actively decoding any
+		HPA ranges. This permits avoiding explicit global CPU cache
+		management, relying instead for it to be done when a region
+		transitions between software programmed and hardware committed
+		states. If this file is not present, then there is no hardware
+		support for the operation.
 What            /sys/bus/cxl/devices/memX/security/erase
 Description:
 		(WO) Write a boolean 'true' string value to this attribute to
 		secure erase user data by changing the media encryption keys for
-		all user data areas of the device.
+		all user data areas of the device. This functionality requires
+		the device to be disabled, that is, not actively decoding any
+		HPA ranges. This permits avoiding explicit global CPU cache
+		management, relying instead for it to be done when a region
+		transitions between software programmed and hardware committed
+		states. If this file is not present, then there is no hardware
+		support for the operation.
 What:		/sys/bus/cxl/devices/memX/firmware/

Documentation/ABI/testing/sysfs-devices-system-cpu+7−6

 		cpu_capacity: capacity of cpuX.
 What:		/sys/devices/system/cpu/vulnerabilities
+		/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
+		/sys/devices/system/cpu/vulnerabilities/itlb_multihit
+		/sys/devices/system/cpu/vulnerabilities/l1tf
+		/sys/devices/system/cpu/vulnerabilities/mds
 		/sys/devices/system/cpu/vulnerabilities/meltdown
+		/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
+		/sys/devices/system/cpu/vulnerabilities/retbleed
+		/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
 		/sys/devices/system/cpu/vulnerabilities/spectre_v1
 		/sys/devices/system/cpu/vulnerabilities/spectre_v2
-		/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
-		/sys/devices/system/cpu/vulnerabilities/l1tf
-		/sys/devices/system/cpu/vulnerabilities/mds
 		/sys/devices/system/cpu/vulnerabilities/srbds
 		/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
-		/sys/devices/system/cpu/vulnerabilities/itlb_multihit
-		/sys/devices/system/cpu/vulnerabilities/mmio_stale_data
-		/sys/devices/system/cpu/vulnerabilities/retbleed
 Date:		January 2018
 Contact:	Linux kernel mailing list <linux-kernel@vger.kernel.org>
 Description:	Information about CPU vulnerabilities

Documentation/ABI/testing/sysfs-platform-hidma+1−1

@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-*/chid · 1 unmodified line
2	/sys/devices/platform/QCOM8061:*/chid	2	/sys/devices/platform/QCOM8061:*/chid
3	Date: Dec 2015	3	Date: Dec 2015
4	KernelVersion: 4.4	4	KernelVersion: 4.4
5	Contact: "Sinan Kaya <okaya@codeaurora.org>"	5	Contact: "Sinan Kaya <okaya@kernel.org>"
6	Description:	6	Description:
7	Contains the ID of the channel within the HIDMA instance.	7	Contains the ID of the channel within the HIDMA instance.
8	It is used to associate a given HIDMA channel with the	8	It is used to associate a given HIDMA channel with the

Documentation/ABI/testing/sysfs-platform-hidma-mgmt+10−10

@@ -2,7 +2,7 @@ What: /sys/devices/platform/hidma-mgmt/chanops/chan/priority · 1 unmodified line
2	/sys/devices/platform/QCOM8060:/chanops/chan/priority	2	/sys/devices/platform/QCOM8060:/chanops/chan/priority
3	Date: Nov 2015	3	Date: Nov 2015
4	KernelVersion: 4.4	4	KernelVersion: 4.4
5	Contact: "Sinan Kaya <okaya@codeaurora.org>"	5	Contact: "Sinan Kaya <okaya@kernel.org>"
6	Description:	6	Description:
7	Contains either 0 or 1 and indicates if the DMA channel is a	7	Contains either 0 or 1 and indicates if the DMA channel is a
8	low priority (0) or high priority (1) channel.	8	low priority (0) or high priority (1) channel.
@@ -11,7 +11,7 @@ What: /sys/devices/platform/hidma-mgmt/chanops/chan/weight · 2 unmodified lines
11	/sys/devices/platform/QCOM8060:/chanops/chan/weight	11	/sys/devices/platform/QCOM8060:/chanops/chan/weight
12	Date: Nov 2015	12	Date: Nov 2015
13	KernelVersion: 4.4	13	KernelVersion: 4.4
14	Contact: "Sinan Kaya <okaya@codeaurora.org>"	14	Contact: "Sinan Kaya <okaya@kernel.org>"
15	Description:	15	Description:
16	Contains 0..15 and indicates the weight of the channel among	16	Contains 0..15 and indicates the weight of the channel among
17	equal priority channels during round robin scheduling.	17	equal priority channels during round robin scheduling.
@@ -20,7 +20,7 @@ What: /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles · 2 unmodified lines
20	/sys/devices/platform/QCOM8060:*/chreset_timeout_cycles	20	/sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
21	Date: Nov 2015	21	Date: Nov 2015
22	KernelVersion: 4.4	22	KernelVersion: 4.4
23	Contact: "Sinan Kaya <okaya@codeaurora.org>"	23	Contact: "Sinan Kaya <okaya@kernel.org>"
24	Description:	24	Description:
25	Contains the platform specific cycle value to wait after a	25	Contains the platform specific cycle value to wait after a
26	reset command is issued. If the value is chosen too short,	26	reset command is issued. If the value is chosen too short,
@@ -32,7 +32,7 @@ What: /sys/devices/platform/hidma-mgmt*/dma_channels · 5 unmodified lines
32	/sys/devices/platform/QCOM8060:*/dma_channels	32	/sys/devices/platform/QCOM8060:*/dma_channels
33	Date: Nov 2015	33	Date: Nov 2015
34	KernelVersion: 4.4	34	KernelVersion: 4.4
35	Contact: "Sinan Kaya <okaya@codeaurora.org>"	35	Contact: "Sinan Kaya <okaya@kernel.org>"
36	Description:	36	Description:
37	Contains the number of dma channels supported by one instance	37	Contains the number of dma channels supported by one instance
38	of HIDMA hardware. The value may change from chip to chip.	38	of HIDMA hardware. The value may change from chip to chip.
@@ -41,7 +41,7 @@ What: /sys/devices/platform/hidma-mgmt*/hw_version_major · 2 unmodified lines
41	/sys/devices/platform/QCOM8060:*/hw_version_major	41	/sys/devices/platform/QCOM8060:*/hw_version_major
42	Date: Nov 2015	42	Date: Nov 2015
43	KernelVersion: 4.4	43	KernelVersion: 4.4
44	Contact: "Sinan Kaya <okaya@codeaurora.org>"	44	Contact: "Sinan Kaya <okaya@kernel.org>"
45	Description:	45	Description:
46	Version number major for the hardware.	46	Version number major for the hardware.
47		47
@@ -49,7 +49,7 @@ What: /sys/devices/platform/hidma-mgmt*/hw_version_minor · 1 unmodified line
49	/sys/devices/platform/QCOM8060:*/hw_version_minor	49	/sys/devices/platform/QCOM8060:*/hw_version_minor
50	Date: Nov 2015	50	Date: Nov 2015
51	KernelVersion: 4.4	51	KernelVersion: 4.4
52	Contact: "Sinan Kaya <okaya@codeaurora.org>"	52	Contact: "Sinan Kaya <okaya@kernel.org>"
53	Description:	53	Description:
54	Version number minor for the hardware.	54	Version number minor for the hardware.
55		55
@@ -57,7 +57,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_rd_xactions · 1 unmodified line
57	/sys/devices/platform/QCOM8060:*/max_rd_xactions	57	/sys/devices/platform/QCOM8060:*/max_rd_xactions
58	Date: Nov 2015	58	Date: Nov 2015
59	KernelVersion: 4.4	59	KernelVersion: 4.4
60	Contact: "Sinan Kaya <okaya@codeaurora.org>"	60	Contact: "Sinan Kaya <okaya@kernel.org>"
61	Description:	61	Description:
62	Contains a value between 0 and 31. Maximum number of	62	Contains a value between 0 and 31. Maximum number of
63	read transactions that can be issued back to back.	63	read transactions that can be issued back to back.
@@ -69,7 +69,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_read_request · 5 unmodified lines
69	/sys/devices/platform/QCOM8060:*/max_read_request	69	/sys/devices/platform/QCOM8060:*/max_read_request
70	Date: Nov 2015	70	Date: Nov 2015
71	KernelVersion: 4.4	71	KernelVersion: 4.4
72	Contact: "Sinan Kaya <okaya@codeaurora.org>"	72	Contact: "Sinan Kaya <okaya@kernel.org>"
73	Description:	73	Description:
74	Size of each read request. The value needs to be a power	74	Size of each read request. The value needs to be a power
75	of two and can be between 128 and 1024.	75	of two and can be between 128 and 1024.
@@ -78,7 +78,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_wr_xactions · 2 unmodified lines
78	/sys/devices/platform/QCOM8060:*/max_wr_xactions	78	/sys/devices/platform/QCOM8060:*/max_wr_xactions
79	Date: Nov 2015	79	Date: Nov 2015
80	KernelVersion: 4.4	80	KernelVersion: 4.4
81	Contact: "Sinan Kaya <okaya@codeaurora.org>"	81	Contact: "Sinan Kaya <okaya@kernel.org>"
82	Description:	82	Description:
83	Contains a value between 0 and 31. Maximum number of	83	Contains a value between 0 and 31. Maximum number of
84	write transactions that can be issued back to back.	84	write transactions that can be issued back to back.
@@ -91,7 +91,7 @@ What: /sys/devices/platform/hidma-mgmt*/max_write_request · 6 unmodified lines
91	/sys/devices/platform/QCOM8060:*/max_write_request	91	/sys/devices/platform/QCOM8060:*/max_write_request
92	Date: Nov 2015	92	Date: Nov 2015
93	KernelVersion: 4.4	93	KernelVersion: 4.4
94	Contact: "Sinan Kaya <okaya@codeaurora.org>"	94	Contact: "Sinan Kaya <okaya@kernel.org>"
95	Description:	95	Description:
96	Size of each write request. The value needs to be a power	96	Size of each write request. The value needs to be a power
97	of two and can be between 128 and 1024.	97	of two and can be between 128 and 1024.

Documentation/admin-guide/hw-vuln/gather_data_sampling.rst+109−0

@@ -0,0 +1,109 @@
	1	.. SPDX-License-Identifier: GPL-2.0
	2
	3	GDS - Gather Data Sampling
	4	==========================
	5
	6	Gather Data Sampling is a hardware vulnerability which allows unprivileged
	7	speculative access to data which was previously stored in vector registers.
	8
	9	Problem
	10	-------
	11	When a gather instruction performs loads from memory, different data elements
	12	are merged into the destination vector register. However, when a gather
	13	instruction that is transiently executed encounters a fault, stale data from
	14	architectural or internal vector registers may get transiently forwarded to the
	15	destination vector register instead. This will allow a malicious attacker to
	16	infer stale data using typical side channel techniques like cache timing
	17	attacks. GDS is a purely sampling-based attack.
	18
	19	The attacker uses gather instructions to infer the stale vector register data.
	20	The victim does not need to do anything special other than use the vector
	21	registers. The victim does not need to use gather instructions to be
	22	vulnerable.
	23
	24	Because the buffers are shared between Hyper-Threads cross Hyper-Thread attacks
	25	are possible.
	26
	27	Attack scenarios
	28	----------------
	29	Without mitigation, GDS can infer stale data across virtually all
	30	permission boundaries:
	31
	32	Non-enclaves can infer SGX enclave data
	33	Userspace can infer kernel data
	34	Guests can infer data from hosts
	35	Guest can infer guest from other guests
	36	Users can infer data from other users
	37
	38	Because of this, it is important to ensure that the mitigation stays enabled in
	39	lower-privilege contexts like guests and when running outside SGX enclaves.
	40
	41	The hardware enforces the mitigation for SGX. Likewise, VMMs should ensure
	42	that guests are not allowed to disable the GDS mitigation. If a host erred and
	43	allowed this, a guest could theoretically disable GDS mitigation, mount an
	44	attack, and re-enable it.
	45
	46	Mitigation mechanism
	47	--------------------
	48	This issue is mitigated in microcode. The microcode defines the following new
	49	bits:
	50
	51	================================ === ============================
	52	IA32_ARCH_CAPABILITIES[GDS_CTRL] R/O Enumerates GDS vulnerability
	53	and mitigation support.
	54	IA32_ARCH_CAPABILITIES[GDS_NO] R/O Processor is not vulnerable.
	55	IA32_MCU_OPT_CTRL[GDS_MITG_DIS] R/W Disables the mitigation
	56	0 by default.
	57	IA32_MCU_OPT_CTRL[GDS_MITG_LOCK] R/W Locks GDS_MITG_DIS=0. Writes
	58	to GDS_MITG_DIS are ignored
	59	Can't be cleared once set.
	60	================================ === ============================
	61
	62	GDS can also be mitigated on systems that don't have updated microcode by
	63	disabling AVX. This can be done by setting gather_data_sampling="force" or
	64	"clearcpuid=avx" on the kernel command-line.
	65
	66	If used, these options will disable AVX use by turning off XSAVE YMM support.
	67	However, the processor will still enumerate AVX support. Userspace that
	68	does not follow proper AVX enumeration to check both AVX and XSAVE YMM
	69	support will break.
	70
	71	Mitigation control on the kernel command line
	72	---------------------------------------------
	73	The mitigation can be disabled by setting "gather_data_sampling=off" or
	74	"mitigations=off" on the kernel command line. Not specifying either will default
	75	to the mitigation being enabled. Specifying "gather_data_sampling=force" will
	76	use the microcode mitigation when available or disable AVX on affected systems
	77	where the microcode hasn't been updated to include the mitigation.
	78
	79	GDS System Information
	80	------------------------
	81	The kernel provides vulnerability status information through sysfs. For
	82	GDS this can be accessed by the following sysfs file:
	83
	84	/sys/devices/system/cpu/vulnerabilities/gather_data_sampling
	85
	86	The possible values contained in this file are:
	87
	88	============================== =============================================
	89	Not affected Processor not vulnerable.
	90	Vulnerable Processor vulnerable and mitigation disabled.
	91	Vulnerable: No microcode Processor vulnerable and microcode is missing
	92	mitigation.
	93	Mitigation: AVX disabled,
	94	no microcode Processor is vulnerable and microcode is missing
	95	mitigation. AVX disabled as mitigation.
	96	Mitigation: Microcode Processor is vulnerable and mitigation is in
	97	effect.
	98	Mitigation: Microcode (locked) Processor is vulnerable and mitigation is in
	99	effect and cannot be disabled.
	100	Unknown: Dependent on
	101	hypervisor status Running on a virtual guest processor that is
	102	affected but with no way to know if host
	103	processor is mitigated or vulnerable.
	104	============================== =============================================
	105
	106	GDS Default mitigation
	107	----------------------
	108	The updated microcode will enable the mitigation by default. The kernel's
	109	default action is to leave the mitigation enabled.

Documentation/admin-guide/hw-vuln/index.rst+8−6

@@ -13,9 +13,11 @@ are configurable at compile, boot or run time. · 12 unmodified lines
13	l1tf	13	l1tf
14	mds	14	mds
15	tsx_async_abort	15	tsx_async_abort
16	multihit.rst	16	multihit
17	special-register-buffer-data-sampling.rst	17	special-register-buffer-data-sampling
18	core-scheduling.rst	18	core-scheduling
19	l1d_flush.rst	19	l1d_flush
20	processor_mmio_stale_data.rst	20	processor_mmio_stale_data
21	cross-thread-rsb.rst	21	cross-thread-rsb
		22	srso
		23	gather_data_sampling

Documentation/admin-guide/hw-vuln/srso.rst+150−0

@@ -0,0 +1,150 @@
	1	.. SPDX-License-Identifier: GPL-2.0
	2
	3	Speculative Return Stack Overflow (SRSO)
	4	========================================
	5
	6	This is a mitigation for the speculative return stack overflow (SRSO)
	7	vulnerability found on AMD processors. The mechanism is by now the well
	8	known scenario of poisoning CPU functional units - the Branch Target
	9	Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
	10	tricking the elevated privilege domain (the kernel) into leaking
	11	sensitive data.
	12
	13	AMD CPUs predict RET instructions using a Return Address Predictor (aka
	14	Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
	15	CALL instruction (i.e., an instruction predicted to be a CALL but is
	16	not actually a CALL) can create an entry in the RAP which may be used
	17	to predict the target of a subsequent RET instruction.
	18
	19	The specific circumstances that lead to this varies by microarchitecture
	20	but the concern is that an attacker can mis-train the CPU BTB to predict
	21	non-architectural CALL instructions in kernel space and use this to
	22	control the speculative target of a subsequent kernel RET, potentially
	23	leading to information disclosure via a speculative side-channel.
	24
	25	The issue is tracked under CVE-2023-20569.
	26
	27	Affected processors
	28	-------------------
	29
	30	AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
	31	processors have not been investigated.
	32
	33	System information and options
	34	------------------------------
	35
	36	First of all, it is required that the latest microcode be loaded for
	37	mitigations to be effective.
	38
	39	The sysfs file showing SRSO mitigation status is:
	40
	41	/sys/devices/system/cpu/vulnerabilities/spec_rstack_overflow
	42
	43	The possible values in this file are:
	44
	45	* 'Not affected':
	46
	47	The processor is not vulnerable
	48
	49	* 'Vulnerable: no microcode':
	50
	51	The processor is vulnerable, no microcode extending IBPB
	52	functionality to address the vulnerability has been applied.
	53
	54	* 'Mitigation: microcode':
	55
	56	Extended IBPB functionality microcode patch has been applied. It does
	57	not address User->Kernel and Guest->Host transitions protection but it
	58	does address User->User and VM->VM attack vectors.
	59
	60	Note that User->User mitigation is controlled by how the IBPB aspect in
	61	the Spectre v2 mitigation is selected:
	62
	63	* conditional IBPB:
	64
	65	where each process can select whether it needs an IBPB issued
	66	around it PR_SPEC_DISABLE/_ENABLE etc, see :doc:`spectre`
	67
	68	* strict:
	69
	70	i.e., always on - by supplying spectre_v2_user=on on the kernel
	71	command line
	72
	73	(spec_rstack_overflow=microcode)
	74
	75	* 'Mitigation: safe RET':
	76
	77	Software-only mitigation. It complements the extended IBPB microcode
	78	patch functionality by addressing User->Kernel and Guest->Host
	79	transitions protection.
	80
	81	Selected by default or by spec_rstack_overflow=safe-ret
	82
	83	* 'Mitigation: IBPB':
	84
	85	Similar protection as "safe RET" above but employs an IBPB barrier on
	86	privilege domain crossings (User->Kernel, Guest->Host).
	87
	88	(spec_rstack_overflow=ibpb)
	89
	90	* 'Mitigation: IBPB on VMEXIT':
	91
	92	Mitigation addressing the cloud provider scenario - the Guest->Host
	93	transitions only.
	94
	95	(spec_rstack_overflow=ibpb-vmexit)
	96
	97
	98
	99	In order to exploit vulnerability, an attacker needs to:
	100
	101	- gain local access on the machine
	102
	103	- break kASLR
	104
	105	- find gadgets in the running kernel in order to use them in the exploit
	106
	107	- potentially create and pin an additional workload on the sibling
	108	thread, depending on the microarchitecture (not necessary on fam 0x19)
	109
	110	- run the exploit
	111
	112	Considering the performance implications of each mitigation type, the
	113	default one is 'Mitigation: safe RET' which should take care of most
	114	attack vectors, including the local User->Kernel one.
	115
	116	As always, the user is advised to keep her/his system up-to-date by
	117	applying software updates regularly.
	118
	119	The default setting will be reevaluated when needed and especially when
	120	new attack vectors appear.
	121
	122	As one can surmise, 'Mitigation: safe RET' does come at the cost of some
	123	performance depending on the workload. If one trusts her/his userspace
	124	and does not want to suffer the performance impact, one can always
	125	disable the mitigation with spec_rstack_overflow=off.
	126
	127	Similarly, 'Mitigation: IBPB' is another full mitigation type employing
	128	an indrect branch prediction barrier after having applied the required
	129	microcode patch for one's system. This mitigation comes also at
	130	a performance cost.
	131
	132	Mitigation: safe RET
	133	--------------------
	134
	135	The mitigation works by ensuring all RET instructions speculate to
	136	a controlled location, similar to how speculation is controlled in the
	137	retpoline sequence. To accomplish this, the __x86_return_thunk forces
	138	the CPU to mispredict every function return using a 'safe return'
	139	sequence.
	140
	141	To ensure the safety of this mitigation, the kernel must ensure that the
	142	safe return sequence is itself free from attacker interference. In Zen3
	143	and Zen4, this is accomplished by creating a BTB alias between the
	144	untraining function srso_untrain_ret_alias() and the safe return
	145	function srso_safe_ret_alias() which results in evicting a potentially
	146	poisoned BTB entry and using that safe one for all function returns.
	147
	148	In older Zen1 and Zen2, this is accomplished using a reinterpretation
	149	technique similar to Retbleed one: srso_untrain_ret() and
	150	srso_safe_ret().

Documentation/admin-guide/kdump/vmcoreinfo.rst+6−0

@@ -624,3 +624,9 @@ Used to get the correct ranges: · 623 unmodified lines
624	* VMALLOC_START ~ VMALLOC_END : vmalloc() / ioremap() space.	624	* VMALLOC_START ~ VMALLOC_END : vmalloc() / ioremap() space.
625	* VMEMMAP_START ~ VMEMMAP_END : vmemmap space, used for struct page array.	625	* VMEMMAP_START ~ VMEMMAP_END : vmemmap space, used for struct page array.
626	* KERNEL_LINK_ADDR : start address of Kernel link and BPF	626	* KERNEL_LINK_ADDR : start address of Kernel link and BPF
		627
		628	va_kernel_pa_offset
		629	-------------------
		630
		631	Indicates the offset between the kernel virtual and physical mappings.
		632	Used to translate virtual to physical addresses.

Documentation/admin-guide/kernel-parameters.txt+45−13

@@ -1623,6 +1623,26 @@ · 1622 unmodified lines
1623	Format: off \| on	1623	Format: off \| on
1624	default: on	1624	default: on
1625		1625
		1626	gather_data_sampling=
		1627	[X86,INTEL] Control the Gather Data Sampling (GDS)
		1628	mitigation.
		1629
		1630	Gather Data Sampling is a hardware vulnerability which
		1631	allows unprivileged speculative access to data which was
		1632	previously stored in vector registers.
		1633
		1634	This issue is mitigated by default in updated microcode.
		1635	The mitigation may have a performance impact but can be
		1636	disabled. On systems without the microcode mitigation
		1637	disabling AVX serves as a mitigation.
		1638
		1639	force: Disable AVX to mitigate systems without
		1640	microcode mitigation. No effect if the microcode
		1641	mitigation is present. Known to cause crashes in
		1642	userspace with buggy AVX enumeration.
		1643
		1644	off: Disable GDS mitigation.
		1645
1626	gcov_persist= [GCOV] When non-zero (default), profiling data for	1646	gcov_persist= [GCOV] When non-zero (default), profiling data for
1627	kernel modules is saved and remains accessible via	1647	kernel modules is saved and remains accessible via
1628	debugfs, even when the module is unloaded/reloaded.	1648	debugfs, even when the module is unloaded/reloaded.
@@ -3273,24 +3293,25 @@ · 1644 unmodified lines
3273	Disable all optional CPU mitigations. This	3293	Disable all optional CPU mitigations. This
3274	improves system performance, but it may also	3294	improves system performance, but it may also
3275	expose users to several CPU vulnerabilities.	3295	expose users to several CPU vulnerabilities.
3276	Equivalent to: nopti [X86,PPC]	3296	Equivalent to: if nokaslr then kpti=0 [ARM64]
3277	if nokaslr then kpti=0 [ARM64]	3297	gather_data_sampling=off [X86]
3278	nospectre_v1 [X86,PPC]	3298	kvm.nx_huge_pages=off [X86]
3279	nobp=0 [S390]
3280	nospectre_v2 [X86,PPC,S390,ARM64]
3281	spectre_v2_user=off [X86]
3282	spec_store_bypass_disable=off [X86,PPC]
3283	ssbd=force-off [ARM64]
3284	nospectre_bhb [ARM64]
3285	l1tf=off [X86]	3299	l1tf=off [X86]
3286	mds=off [X86]	3300	mds=off [X86]
3287	tsx_async_abort=off [X86]	3301	mmio_stale_data=off [X86]
3288	kvm.nx_huge_pages=off [X86]
3289	srbds=off [X86,INTEL]
3290	no_entry_flush [PPC]	3302	no_entry_flush [PPC]
3291	no_uaccess_flush [PPC]	3303	no_uaccess_flush [PPC]
3292	mmio_stale_data=off [X86]	3304	nobp=0 [S390]
		3305	nopti [X86,PPC]
		3306	nospectre_bhb [ARM64]
		3307	nospectre_v1 [X86,PPC]
		3308	nospectre_v2 [X86,PPC,S390,ARM64]
3293	retbleed=off [X86]	3309	retbleed=off [X86]
		3310	spec_store_bypass_disable=off [X86,PPC]
		3311	spectre_v2_user=off [X86]
		3312	srbds=off [X86,INTEL]
		3313	ssbd=force-off [ARM64]
		3314	tsx_async_abort=off [X86]
3294		3315
3295	Exceptions:	3316	Exceptions:
3296	This does not have any effect on	3317	This does not have any effect on
@@ -5875,6 +5896,17 @@ · 2578 unmodified lines
5875	Not specifying this option is equivalent to	5896	Not specifying this option is equivalent to
5876	spectre_v2_user=auto.	5897	spectre_v2_user=auto.
5877		5898
		5899	spec_rstack_overflow=
		5900	[X86] Control RAS overflow mitigation on AMD Zen CPUs
		5901
		5902	off - Disable mitigation
		5903	microcode - Enable microcode mitigation only
		5904	safe-ret - Enable sw-only safe RET mitigation (default)
		5905	ibpb - Enable mitigation by issuing IBPB on
		5906	kernel entry
		5907	ibpb-vmexit - Issue IBPB only on VMEXIT
		5908	(cloud-specific mitigation)
		5909
5878	spec_store_bypass_disable=	5910	spec_store_bypass_disable=
5879	[HW] Control Speculative Store Bypass (SSB) Disable mitigation	5911	[HW] Control Speculative Store Bypass (SSB) Disable mitigation
5880	(Speculative Store Bypass vulnerability)	5912	(Speculative Store Bypass vulnerability)

Documentation/devicetree/bindings/iio/addac/adi,ad74115.yaml+0−3

     description: Whether to enable burnout current for EXT1.
   adi,ext1-burnout-current-nanoamp:
-    $ref: /schemas/types.yaml#/definitions/uint32
     description:
       Burnout current in nanoamps to be applied to EXT1.
     enum: [0, 50, 500, 1000, 10000]
     description: Whether to enable burnout current for EXT2.
   adi,ext2-burnout-current-nanoamp:
-    $ref: /schemas/types.yaml#/definitions/uint32
     description: Burnout current in nanoamps to be applied to EXT2.
     enum: [0, 50, 500, 1000, 10000]
     default: 0
     description: Whether to enable burnout current for VIOUT.
   adi,viout-burnout-current-nanoamp:
-    $ref: /schemas/types.yaml#/definitions/uint32
     description: Burnout current in nanoamps to be applied to VIOUT.
     enum: [0, 1000, 10000]
     default: 0

Documentation/devicetree/bindings/net/mediatek,net.yaml+1−6

 patternProperties:
   "^mac@[0-1]$":
     type: object
-    additionalProperties: false
+    unevaluatedProperties: false
     allOf:
       - $ref: ethernet-controller.yaml#
     description:
       reg:
         maxItems: 1
-      phy-handle: true
-      phy-mode: true
     required:
       - reg
       - compatible
-      - phy-handle
 required:
   - compatible

Documentation/devicetree/bindings/net/rockchip-dwmac.yaml+8−2

     $ref: /schemas/types.yaml#/definitions/phandle
   tx_delay:
-    description: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
+    description: Delay value for TXD timing.
     $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 0x7F
+    default: 0x30
   rx_delay:
-    description: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
+    description: Delay value for RXD timing.
     $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 0x7F
+    default: 0x10
   phy-supply:
     description: PHY regulator

Documentation/devicetree/bindings/serial/atmel,at91-usart.yaml+3−1

       - enum:
           - atmel,at91rm9200-usart
           - atmel,at91sam9260-usart
-          - microchip,sam9x60-usart
       - items:
           - const: atmel,at91rm9200-dbgu
           - const: atmel,at91rm9200-usart
       - items:
           - const: atmel,at91sam9260-dbgu
           - const: atmel,at91sam9260-usart
+      - items:
+          - const: microchip,sam9x60-usart
+          - const: atmel,at91sam9260-usart
       - items:
           - const: microchip,sam9x60-dbgu
           - const: microchip,sam9x60-usart

Documentation/filesystems/locking.rst+2−3

@@ -551,9 +551,8 @@ mutex or just to use i_size_read() instead. · 550 unmodified lines
551	Note: this does not protect the file->f_pos against concurrent modifications	551	Note: this does not protect the file->f_pos against concurrent modifications
552	since this is something the userspace has to take care about.	552	since this is something the userspace has to take care about.
553		553
554	->iterate() is called with i_rwsem exclusive.	554	->iterate_shared() is called with i_rwsem held for reading, and with the
555		555	file f_pos_lock held exclusively
556	->iterate_shared() is called with i_rwsem at least shared.
557		556
558	->fasync() is responsible for maintaining the FASYNC bit in filp->f_flags.	557	->fasync() is responsible for maintaining the FASYNC bit in filp->f_flags.
559	Most instances call fasync_helper(), which does that maintenance, so it's	558	Most instances call fasync_helper(), which does that maintenance, so it's

Documentation/filesystems/porting.rst+10−15

 **mandatory**
-->readdir() is gone now; switch to ->iterate()
+->readdir() is gone now; switch to ->iterate_shared()
 **mandatory**
 ---
-**recommended**
+**mandatory**
-->iterate_shared() is added; it's a parallel variant of ->iterate().
+->iterate_shared() is added.
 Exclusion on struct file level is still provided (as well as that
 between it and lseek on the same struct file), but if your directory
 has been opened several times, you can get these called in parallel.
 Exclusion between that method and all directory-modifying ones is
 still provided, of course.
-Often enough ->iterate() can serve as ->iterate_shared() without any
+If you have any per-inode or per-dentry in-core data structures modified
-changes - it is a read-only operation, after all.  If you have any
+by ->iterate_shared(), you might need something to serialize the access
-per-inode or per-dentry in-core data structures modified by ->iterate(),
+to them.  If you do dcache pre-seeding, you'll need to switch to
-you might need something to serialize the access to them.  If you
+d_alloc_parallel() for that; look for in-tree examples.
-do dcache pre-seeding, you'll need to switch to d_alloc_parallel() for
-that; look for in-tree examples.
-Old method is only used if the new one is absent; eventually it will
-be removed.  Switch while you still can; the old one won't stay.
 ---
 filldir_t (readdir callbacks) calling conventions have changed.  Instead of
 returning 0 or -E... it returns bool now.  false means "no more" (as -E... used
 to) and true - "keep going" (as 0 in old calling conventions).  Rationale:
-callers never looked at specific -E... values anyway.  ->iterate() and
+callers never looked at specific -E... values anyway. -> iterate_shared()
-->iterate_shared() instance require no changes at all, all filldir_t ones in
+instances require no changes at all, all filldir_t ones in the tree
-the tree converted.
+converted.
 ---

MAINTAINERS+33−40

 ARM/MICROCHIP (ARM64) SoC support
 M:	Conor Dooley <conor@kernel.org>
 M:	Nicolas Ferre <nicolas.ferre@microchip.com>
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 T:	git https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git
 ARM/Microchip (AT91) SoC support
 M:	Nicolas Ferre <nicolas.ferre@microchip.com>
 M:	Alexandre Belloni <alexandre.belloni@bootlin.com>
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 W:	http://www.linux4sam.org
 ATMEL MACB ETHERNET DRIVER
 M:	Nicolas Ferre <nicolas.ferre@microchip.com>
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 S:	Supported
 F:	drivers/net/ethernet/cadence/
 F:	drivers/input/touchscreen/atmel_mxt_ts.c
 ATMEL WIRELESS DRIVER
-M:	Simon Kelley <simon@thekelleys.org.uk>
 L:	linux-wireless@vger.kernel.org
-S:	Maintained
+S:	Orphan
 W:	http://www.thekelleys.org.uk/atmel
 W:	http://atmelwlandriver.sourceforge.net/
 F:	drivers/net/wireless/atmel/atmel*
 B43 WIRELESS DRIVER
 L:	linux-wireless@vger.kernel.org
 L:	b43-dev@lists.infradead.org
-S:	Odd Fixes
+S:	Orphan
 W:	https://wireless.wiki.kernel.org/en/users/Drivers/b43
 F:	drivers/net/wireless/broadcom/b43/
 F:	drivers/net/can/ctucanfd/
 CW1200 WLAN driver
-M:	Solomon Peachy <pizza@shaftnet.org>
+S:	Orphan
-S:	Maintained
 F:	drivers/net/wireless/st/cw1200/
 CX18 VIDEO4LINUX DRIVER
 F:	include/linux/hisi_acc_qm.h
 HISILICON ROCE DRIVER
-M:	Haoyue Xu <xuhaoyue1@hisilicon.com>
 M:	Junxian Huang <huangjunxian6@hisilicon.com>
 L:	linux-rdma@vger.kernel.org
 S:	Maintained
 HYPERBUS SUPPORT
 M:	Vignesh Raghavendra <vigneshr@ti.com>
+R:	Tudor Ambarus <tudor.ambarus@linaro.org>
 L:	linux-mtd@lists.infradead.org
 S:	Supported
 Q:	http://patchwork.ozlabs.org/project/linux-mtd/list/
 MAPLE TREE
 M:	Liam R. Howlett <Liam.Howlett@oracle.com>
+L:	maple-tree@lists.infradead.org
 L:	linux-mm@kvack.org
 S:	Supported
 F:	Documentation/core-api/maple_tree.rst
 F:	drivers/net/ethernet/marvell/mvpp2/
 MARVELL MWIFIEX WIRELESS DRIVER
-M:	Amitkumar Karwar <amitkarwar@gmail.com>
+M:	Brian Norris <briannorris@chromium.org>
-M:	Ganapathi Bhat <ganapathi017@gmail.com>
-M:	Sharvari Harisangam <sharvari.harisangam@nxp.com>
-M:	Xinming Hu <huxinming820@gmail.com>
 L:	linux-wireless@vger.kernel.org
-S:	Maintained
+S:	Odd Fixes
 F:	drivers/net/wireless/marvell/mwifiex/
 MARVELL MWL8K WIRELESS DRIVER
-M:	Lennert Buytenhek <buytenh@wantstofly.org>
 L:	linux-wireless@vger.kernel.org
-S:	Odd Fixes
+S:	Orphan
 F:	drivers/net/wireless/marvell/mwl8k.c
 MARVELL NAND CONTROLLER DRIVER
 F:	drivers/spi/spi-at91-usart.c
 MICROCHIP AUDIO ASOC DRIVERS
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
 S:	Supported
 F:	Documentation/devicetree/bindings/sound/atmel*
 F:	drivers/crypto/atmel-ecc.*
 MICROCHIP EIC DRIVER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 F:	Documentation/devicetree/bindings/interrupt-controller/microchip,sama7g5-eic.yaml
 F:	include/video/atmel_lcdc.h
 MICROCHIP MCP16502 PMIC DRIVER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 F:	Documentation/devicetree/bindings/regulator/mcp16502-regulator.txt
 F:	drivers/mtd/nand/raw/atmel/*
 MICROCHIP OTPC DRIVER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 F:	Documentation/devicetree/bindings/nvmem/microchip,sama7g5-otpc.yaml
 F:	drivers/fpga/microchip-spi.c
 MICROCHIP PWM DRIVER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 L:	linux-pwm@vger.kernel.org
 S:	Supported
 F:	include/dt-bindings/iio/adc/at91-sama5d2_adc.h
 MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 S:	Supported
 F:	Documentation/devicetree/bindings/power/reset/atmel,sama5d2-shdwc.yaml
 F:	drivers/power/reset/at91-sama5d2_shdwc.c
 F:	drivers/spi/spi-atmel.*
 MICROCHIP SSC DRIVER
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Supported
 F:	Documentation/devicetree/bindings/misc/atmel-ssc.txt
 MICROCHIP WILC1000 WIFI DRIVER
 M:	Ajay Singh <ajay.kathat@microchip.com>
-M:	Claudiu Beznea <claudiu.beznea@microchip.com>
+M:	Claudiu Beznea <claudiu.beznea@tuxon.dev>
 L:	linux-wireless@vger.kernel.org
 S:	Supported
 F:	drivers/net/wireless/microchip/wilc1000/
 PCI DRIVER FOR SYNOPSYS DESIGNWARE
 M:	Jingoo Han <jingoohan1@gmail.com>
 M:	Gustavo Pimentel <gustavo.pimentel@synopsys.com>
+M:	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
 L:	linux-pci@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/pci/snps,dw-pcie-ep.yaml
 QUALCOMM ATH12K WIRELESS DRIVER
 M:	Kalle Valo <kvalo@kernel.org>
+M:	Jeff Johnson <quic_jjohnson@quicinc.com>
 L:	ath12k@lists.infradead.org
 S:	Supported
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
 QUALCOMM ATHEROS ATH10K WIRELESS DRIVER
 M:	Kalle Valo <kvalo@kernel.org>
+M:	Jeff Johnson <quic_jjohnson@quicinc.com>
 L:	ath10k@lists.infradead.org
 S:	Supported
 W:	https://wireless.wiki.kernel.org/en/users/Drivers/ath10k
 QUALCOMM ATHEROS ATH11K WIRELESS DRIVER
 M:	Kalle Valo <kvalo@kernel.org>
+M:	Jeff Johnson <quic_jjohnson@quicinc.com>
 L:	ath11k@lists.infradead.org
 S:	Supported
 W:	https://wireless.wiki.kernel.org/en/users/Drivers/ath11k
 F:	drivers/net/wireless/realtek/rtlwifi/
 REALTEK WIRELESS DRIVER (rtw88)
-M:	Yan-Hsuan Chuang <tony0620emma@gmail.com>
+M:	Ping-Ke Shih <pkshih@realtek.com>
 L:	linux-wireless@vger.kernel.org
 S:	Maintained
 F:	drivers/net/wireless/realtek/rtw88/
 L:	linux-wireless@vger.kernel.org
 S:	Orphan
 W:	https://wireless.wiki.kernel.org/
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
 F:	drivers/net/wireless/realtek/rtl818x/rtl8180/
 RTL8187 WIRELESS DRIVER
-M:	Herton Ronaldo Krzesinski <herton@canonical.com>
+M:	Hin-Tak Leung <hintak.leung@gmail.com>
-M:	Hin-Tak Leung <htl10@users.sourceforge.net>
 M:	Larry Finger <Larry.Finger@lwfinger.net>
 L:	linux-wireless@vger.kernel.org
 S:	Maintained
 W:	https://wireless.wiki.kernel.org/
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git
 F:	drivers/net/wireless/realtek/rtl818x/rtl8187/
 RTL8XXXU WIRELESS DRIVER (rtl8xxxu)
 F:	include/linux/*/stm32-*tim*
 STMMAC ETHERNET DRIVER
-M:	Giuseppe Cavallaro <peppe.cavallaro@st.com>
 M:	Alexandre Torgue <alexandre.torgue@foss.st.com>
 M:	Jose Abreu <joabreu@synopsys.com>
 L:	netdev@vger.kernel.org
 F:	drivers/net/ethernet/dec/tulip/
 TUN/TAP driver
-M:	Maxim Krasnyansky <maxk@qti.qualcomm.com>
+M:	Willem de Bruijn <willemdebruijn.kernel@gmail.com>
+M:	Jason Wang <jasowang@redhat.com>
 S:	Maintained
 W:	http://vtun.sourceforge.net/tun
 F:	Documentation/networking/tuntap.rst
 F:	arch/um/os-Linux/drivers/
+F:	drivers/net/tap.c
+F:	drivers/net/tun.c
 TURBOCHANNEL SUBSYSTEM
 M:	"Maciej W. Rozycki" <macro@orcam.me.uk>
 F:	drivers/usb/misc/apple-mfi-fastcharge.c
 USB AR5523 WIRELESS DRIVER
-M:	Pontus Fuchs <pontus.fuchs@gmail.com>
 L:	linux-wireless@vger.kernel.org
-S:	Maintained
+S:	Orphan
 F:	drivers/net/wireless/ath/ar5523/
 USB ATTACHED SCSI
 F:	include/uapi/linux/usb/g_uvc.h
 USB WIRELESS RNDIS DRIVER (rndis_wlan)
-M:	Jussi Kivilinna <jussi.kivilinna@iki.fi>
 L:	linux-wireless@vger.kernel.org
-S:	Maintained
+S:	Orphan
 F:	drivers/net/wireless/legacy/rndis_wlan.c
 USB XHCI DRIVER
 WL3501 WIRELESS PCMCIA CARD DRIVER
 L:	linux-wireless@vger.kernel.org
-S:	Odd fixes
+S:	Orphan
 F:	drivers/net/wireless/legacy/wl3501*
 WMI BINARY MOF DRIVER
 F:	mm/zbud.c
 ZD1211RW WIRELESS DRIVER
-M:	Ulrich Kunitz <kune@deine-taler.de>
 L:	linux-wireless@vger.kernel.org
-L:	zd1211-devs@lists.sourceforge.net (subscribers-only)
+S:	Orphan
-S:	Maintained
-W:	http://zd1211.ath.cx/wiki/DriverRewrite
 F:	drivers/net/wireless/zydas/zd1211rw/
 ZD1301 MEDIA DRIVER

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 6	2	VERSION = 6
3	PATCHLEVEL = 5	3	PATCHLEVEL = 5
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc4	5	EXTRAVERSION = -rc6
6	NAME = Hurr durr I'ma ninja sloth	6	NAME = Hurr durr I'ma ninja sloth
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/alpha/include/asm/processor.h+0−13

@@ -47,12 +47,6 @@ unsigned long __get_wchan(struct task_struct *p); · 46 unmodified lines
47		47
48	#define ARCH_HAS_PREFETCH	48	#define ARCH_HAS_PREFETCH
49	#define ARCH_HAS_PREFETCHW	49	#define ARCH_HAS_PREFETCHW
50	#define ARCH_HAS_SPINLOCK_PREFETCH
51
52	#ifndef CONFIG_SMP
53	/* Nothing to prefetch. */
54	#define spin_lock_prefetch(lock) do { } while (0)
55	#endif
56		50
57	extern inline void prefetch(const void *ptr)	51	extern inline void prefetch(const void *ptr)
58	{	52	{
@@ -64,11 +58,4 @@ extern inline void prefetchw(const void *ptr) · 5 unmodified lines
64	__builtin_prefetch(ptr, 1, 3);	58	__builtin_prefetch(ptr, 1, 3);
65	}	59	}
66		60
67	#ifdef CONFIG_SMP
68	extern inline void spin_lock_prefetch(const void *ptr)
69	{
70	__builtin_prefetch(ptr, 1, 3);
71	}
72	#endif
73
74	#endif /* __ASM_ALPHA_PROCESSOR_H */	61	#endif /* __ASM_ALPHA_PROCESSOR_H */

arch/alpha/kernel/setup.c+1−2

@@ -385,8 +385,7 @@ setup_memory(void *kernel_end) · 384 unmodified lines
385	#endif /* CONFIG_BLK_DEV_INITRD */	385	#endif /* CONFIG_BLK_DEV_INITRD */
386	}	386	}
387		387
388	int __init	388	int page_is_ram(unsigned long pfn)
389	page_is_ram(unsigned long pfn)
390	{	389	{
391	struct memclust_struct * cluster;	390	struct memclust_struct * cluster;
392	struct memdesc_struct * memdesc;	391	struct memdesc_struct * memdesc;

arch/arm/boot/dts/microchip/sam9x60.dtsi+13−13

@@ -172,7 +172,7 @@ · 171 unmodified lines
172	status = "disabled";	172	status = "disabled";
173		173
174	uart4: serial@200 {	174	uart4: serial@200 {
175	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	175	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
176	reg = <0x200 0x200>;	176	reg = <0x200 0x200>;
177	interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;	177	interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
178	dmas = <&dma0	178	dmas = <&dma0
@@ -240,7 +240,7 @@ · 61 unmodified lines
240	status = "disabled";	240	status = "disabled";
241		241
242	uart5: serial@200 {	242	uart5: serial@200 {
243	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	243	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
244	reg = <0x200 0x200>;	244	reg = <0x200 0x200>;
245	atmel,usart-mode = <AT91_USART_MODE_SERIAL>;	245	atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
246	interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;	246	interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
@@ -370,7 +370,7 @@ · 123 unmodified lines
370	status = "disabled";	370	status = "disabled";
371		371
372	uart11: serial@200 {	372	uart11: serial@200 {
373	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	373	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
374	reg = <0x200 0x200>;	374	reg = <0x200 0x200>;
375	interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;	375	interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>;
376	dmas = <&dma0	376	dmas = <&dma0
@@ -419,7 +419,7 @@ · 42 unmodified lines
419	status = "disabled";	419	status = "disabled";
420		420
421	uart12: serial@200 {	421	uart12: serial@200 {
422	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	422	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
423	reg = <0x200 0x200>;	423	reg = <0x200 0x200>;
424	interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;	424	interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
425	dmas = <&dma0	425	dmas = <&dma0
@@ -576,7 +576,7 @@ · 150 unmodified lines
576	status = "disabled";	576	status = "disabled";
577		577
578	uart6: serial@200 {	578	uart6: serial@200 {
579	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	579	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
580	reg = <0x200 0x200>;	580	reg = <0x200 0x200>;
581	interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;	581	interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>;
582	dmas = <&dma0	582	dmas = <&dma0
@@ -625,7 +625,7 @@ · 42 unmodified lines
625	status = "disabled";	625	status = "disabled";
626		626
627	uart7: serial@200 {	627	uart7: serial@200 {
628	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	628	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
629	reg = <0x200 0x200>;	629	reg = <0x200 0x200>;
630	interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;	630	interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>;
631	dmas = <&dma0	631	dmas = <&dma0
@@ -674,7 +674,7 @@ · 42 unmodified lines
674	status = "disabled";	674	status = "disabled";
675		675
676	uart8: serial@200 {	676	uart8: serial@200 {
677	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	677	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
678	reg = <0x200 0x200>;	678	reg = <0x200 0x200>;
679	interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;	679	interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>;
680	dmas = <&dma0	680	dmas = <&dma0
@@ -723,7 +723,7 @@ · 42 unmodified lines
723	status = "disabled";	723	status = "disabled";
724		724
725	uart0: serial@200 {	725	uart0: serial@200 {
726	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	726	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
727	reg = <0x200 0x200>;	727	reg = <0x200 0x200>;
728	interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;	728	interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
729	dmas = <&dma0	729	dmas = <&dma0
@@ -791,7 +791,7 @@ · 61 unmodified lines
791	status = "disabled";	791	status = "disabled";
792		792
793	uart1: serial@200 {	793	uart1: serial@200 {
794	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	794	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
795	reg = <0x200 0x200>;	795	reg = <0x200 0x200>;
796	interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;	796	interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
797	dmas = <&dma0	797	dmas = <&dma0
@@ -859,7 +859,7 @@ · 61 unmodified lines
859	status = "disabled";	859	status = "disabled";
860		860
861	uart2: serial@200 {	861	uart2: serial@200 {
862	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	862	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
863	reg = <0x200 0x200>;	863	reg = <0x200 0x200>;
864	interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;	864	interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
865	dmas = <&dma0	865	dmas = <&dma0
@@ -927,7 +927,7 @@ · 61 unmodified lines
927	status = "disabled";	927	status = "disabled";
928		928
929	uart3: serial@200 {	929	uart3: serial@200 {
930	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	930	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
931	reg = <0x200 0x200>;	931	reg = <0x200 0x200>;
932	interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;	932	interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
933	dmas = <&dma0	933	dmas = <&dma0
@@ -1050,7 +1050,7 @@ · 116 unmodified lines
1050	status = "disabled";	1050	status = "disabled";
1051		1051
1052	uart9: serial@200 {	1052	uart9: serial@200 {
1053	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	1053	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
1054	reg = <0x200 0x200>;	1054	reg = <0x200 0x200>;
1055	interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;	1055	interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>;
1056	dmas = <&dma0	1056	dmas = <&dma0
@@ -1099,7 +1099,7 @@ · 42 unmodified lines
1099	status = "disabled";	1099	status = "disabled";
1100		1100
1101	uart10: serial@200 {	1101	uart10: serial@200 {
1102	compatible = "microchip,sam9x60-dbgu", "microchip,sam9x60-usart", "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";	1102	compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart";
1103	reg = <0x200 0x200>;	1103	reg = <0x200 0x200>;
1104	interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;	1104	interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>;
1105	dmas = <&dma0	1105	dmas = <&dma0

arch/arm/boot/dts/nspire/nspire.dtsi+1−1

@@ -161,7 +161,7 @@ · 160 unmodified lines
161	};	161	};
162		162
163	watchdog: watchdog@90060000 {	163	watchdog: watchdog@90060000 {
164	compatible = "arm,amba-primecell";	164	compatible = "arm,primecell";
165	reg = <0x90060000 0x1000>;	165	reg = <0x90060000 0x1000>;
166	interrupts = <3>;	166	interrupts = <3>;
167	};	167	};

arch/arm/boot/dts/nxp/imx/imx53-sk-imx53.dts+10−0

@@ -60,6 +60,16 @@ · 59 unmodified lines
60	status = "okay";	60	status = "okay";
61	};	61	};
62		62
		63	&cpu0 {
		64	/* CPU rated to 800 MHz, not the default 1.2GHz. */
		65	operating-points = <
		66	/* kHz uV */
		67	166666 850000
		68	400000 900000
		69	800000 1050000
		70	>;
		71	};
		72
63	&ecspi1 {	73	&ecspi1 {
64	pinctrl-names = "default";	74	pinctrl-names = "default";
65	pinctrl-0 = <&pinctrl_ecspi1>;	75	pinctrl-0 = <&pinctrl_ecspi1>;

arch/arm/boot/dts/nxp/imx/imx6sll.dtsi+1−1

@@ -552,7 +552,7 @@ · 551 unmodified lines
552	reg = <0x020ca000 0x1000>;	552	reg = <0x020ca000 0x1000>;
553	interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;	553	interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
554	clocks = <&clks IMX6SLL_CLK_USBPHY2>;	554	clocks = <&clks IMX6SLL_CLK_USBPHY2>;
555	phy-reg_3p0-supply = <&reg_3p0>;	555	phy-3p0-supply = <&reg_3p0>;
556	fsl,anatop = <&anatop>;	556	fsl,anatop = <&anatop>;
557	};	557	};
558		558

arch/arm/mach-pxa/sharpsl_pm.h+0−1

@@ -105,5 +105,4 @@ void sharpsl_pm_led(int val); · 104 unmodified lines
105	#define MAX1111_ACIN_VOLT 6u	105	#define MAX1111_ACIN_VOLT 6u
106	int sharpsl_pm_pxa_read_max1111(int channel);	106	int sharpsl_pm_pxa_read_max1111(int channel);
107		107
108	void corgi_lcd_limit_intensity(int limit);
109	#endif	108	#endif

arch/arm/mach-pxa/spitz_pm.c+1−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/interrupt.h>	15	#include <linux/interrupt.h>
16	#include <linux/platform_device.h>	16	#include <linux/platform_device.h>
17	#include <linux/apm-emulation.h>	17	#include <linux/apm-emulation.h>
		18	#include <linux/spi/corgi_lcd.h>
18		19
19	#include <asm/irq.h>	20	#include <asm/irq.h>
20	#include <asm/mach-types.h>	21	#include <asm/mach-types.h>

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts+1−1

@@ -145,7 +145,7 @@ · 144 unmodified lines
145	status = "okay";	145	status = "okay";
146	clock-frequency = <100000>;	146	clock-frequency = <100000>;
147	i2c-sda-falling-time-ns = <890>; /* hcnt */	147	i2c-sda-falling-time-ns = <890>; /* hcnt */
148	i2c-sdl-falling-time-ns = <890>; /* lcnt */	148	i2c-scl-falling-time-ns = <890>; /* lcnt */
149		149
150	pinctrl-names = "default", "gpio";	150	pinctrl-names = "default", "gpio";
151	pinctrl-0 = <&i2c1_pmx_func>;	151	pinctrl-0 = <&i2c1_pmx_func>;

arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts+1−1

@@ -141,7 +141,7 @@ · 140 unmodified lines
141	status = "okay";	141	status = "okay";
142	clock-frequency = <100000>;	142	clock-frequency = <100000>;
143	i2c-sda-falling-time-ns = <890>; /* hcnt */	143	i2c-sda-falling-time-ns = <890>; /* hcnt */
144	i2c-sdl-falling-time-ns = <890>; /* lcnt */	144	i2c-scl-falling-time-ns = <890>; /* lcnt */
145		145
146	adc@14 {	146	adc@14 {
147	compatible = "lltc,ltc2497";	147	compatible = "lltc,ltc2497";

arch/arm64/boot/dts/arm/vexpress-v2m-rs1.dtsi+0−1

@@ -1 +0,0 @@
1	../../../../arm/boot/dts/vexpress-v2m-rs1.dtsi

arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts+1−1

@@ -141,7 +141,7 @@ · 140 unmodified lines
141	};	141	};
142		142
143	&gpio1 {	143	&gpio1 {
144	gpio-line-names = "nINT_ETHPHY", "LED_RED", "WDOG_INT", "X_RTC_INT",	144	gpio-line-names = "", "LED_RED", "WDOG_INT", "X_RTC_INT",
145	"", "", "", "RESET_ETHPHY",	145	"", "", "", "RESET_ETHPHY",
146	"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",	146	"CAN_nINT", "CAN_EN", "nENABLE_FLATLINK", "",
147	"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";	147	"USB_OTG_VBUS_EN", "", "LED_GREEN", "LED_BLUE";

arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi+2−2

@@ -111,7 +111,7 @@ · 110 unmodified lines
111	};	111	};
112		112
113	&gpio1 {	113	&gpio1 {
114	gpio-line-names = "nINT_ETHPHY", "", "WDOG_INT", "X_RTC_INT",	114	gpio-line-names = "", "", "WDOG_INT", "X_RTC_INT",
115	"", "", "", "RESET_ETHPHY",	115	"", "", "", "RESET_ETHPHY",
116	"", "", "nENABLE_FLATLINK";	116	"", "", "nENABLE_FLATLINK";
117	};	117	};
@@ -210,7 +210,7 @@ · 92 unmodified lines
210	};	210	};
211	};	211	};
212		212
213	reg_vdd_gpu: buck3 {	213	reg_vdd_vpu: buck3 {
214	regulator-always-on;	214	regulator-always-on;
215	regulator-boot-on;	215	regulator-boot-on;
216	regulator-max-microvolt = <1000000>;	216	regulator-max-microvolt = <1000000>;

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts+4−0

 	status = "okay";
 };
+&disp_blk_ctrl {
+	status = "disabled";
+};
 &pgc_mipi {
 	status = "disabled";
 };

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts+4−0

 	status = "okay";
 };
+&disp_blk_ctrl {
+	status = "disabled";
+};
 &pgc_mipi {
 	status = "disabled";
 };

arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi+1−1

@@ -358,7 +358,7 @@ · 357 unmodified lines
358	MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91	358	MX8MN_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
359	MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91	359	MX8MN_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
360	MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f	360	MX8MN_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
361	MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19	361	MX8MN_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x159
362	>;	362	>;
363	};	363	};
364		364

arch/arm64/boot/dts/freescale/imx8mq.dtsi+1−1

@@ -772,7 +772,7 @@ · 771 unmodified lines
772	<&clk IMX8MQ_SYS1_PLL_800M>,	772	<&clk IMX8MQ_SYS1_PLL_800M>,
773	<&clk IMX8MQ_VPU_PLL>;	773	<&clk IMX8MQ_VPU_PLL>;
774	assigned-clock-rates = <600000000>,	774	assigned-clock-rates = <600000000>,
775	<600000000>,	775	<300000000>,
776	<800000000>,	776	<800000000>,
777	<0>;	777	<0>;
778	};	778	};

arch/arm64/boot/dts/renesas/r9a07g044.dtsi+8−8

@@ -223,20 +223,20 @@ · 222 unmodified lines
223	<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,	223	<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
224	<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;	224	<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
225	interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",	225	interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
226	"tgiv0", "tgie0", "tgif0",	226	"tciv0", "tgie0", "tgif0",
227	"tgia1", "tgib1", "tgiv1", "tgiu1",	227	"tgia1", "tgib1", "tciv1", "tciu1",
228	"tgia2", "tgib2", "tgiv2", "tgiu2",	228	"tgia2", "tgib2", "tciv2", "tciu2",
229	"tgia3", "tgib3", "tgic3", "tgid3",	229	"tgia3", "tgib3", "tgic3", "tgid3",
230	"tgiv3",	230	"tciv3",
231	"tgia4", "tgib4", "tgic4", "tgid4",	231	"tgia4", "tgib4", "tgic4", "tgid4",
232	"tgiv4",	232	"tciv4",
233	"tgiu5", "tgiv5", "tgiw5",	233	"tgiu5", "tgiv5", "tgiw5",
234	"tgia6", "tgib6", "tgic6", "tgid6",	234	"tgia6", "tgib6", "tgic6", "tgid6",
235	"tgiv6",	235	"tciv6",
236	"tgia7", "tgib7", "tgic7", "tgid7",	236	"tgia7", "tgib7", "tgic7", "tgid7",
237	"tgiv7",	237	"tciv7",
238	"tgia8", "tgib8", "tgic8", "tgid8",	238	"tgia8", "tgib8", "tgic8", "tgid8",
239	"tgiv8", "tgiu8";	239	"tciv8", "tciu8";
240	clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;	240	clocks = <&cpg CPG_MOD R9A07G044_MTU_X_MCK_MTU3>;
241	power-domains = <&cpg>;	241	power-domains = <&cpg>;
242	resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;	242	resets = <&cpg R9A07G044_MTU_X_PRESET_MTU3>;

arch/arm64/boot/dts/renesas/r9a07g054.dtsi+8−8

@@ -223,20 +223,20 @@ · 222 unmodified lines
223	<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,	223	<GIC_SPI 212 IRQ_TYPE_EDGE_RISING>,
224	<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;	224	<GIC_SPI 213 IRQ_TYPE_EDGE_RISING>;
225	interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",	225	interrupt-names = "tgia0", "tgib0", "tgic0", "tgid0",
226	"tgiv0", "tgie0", "tgif0",	226	"tciv0", "tgie0", "tgif0",
227	"tgia1", "tgib1", "tgiv1", "tgiu1",	227	"tgia1", "tgib1", "tciv1", "tciu1",
228	"tgia2", "tgib2", "tgiv2", "tgiu2",	228	"tgia2", "tgib2", "tciv2", "tciu2",
229	"tgia3", "tgib3", "tgic3", "tgid3",	229	"tgia3", "tgib3", "tgic3", "tgid3",
230	"tgiv3",	230	"tciv3",
231	"tgia4", "tgib4", "tgic4", "tgid4",	231	"tgia4", "tgib4", "tgic4", "tgid4",
232	"tgiv4",	232	"tciv4",
233	"tgiu5", "tgiv5", "tgiw5",	233	"tgiu5", "tgiv5", "tgiw5",
234	"tgia6", "tgib6", "tgic6", "tgid6",	234	"tgia6", "tgib6", "tgic6", "tgid6",
235	"tgiv6",	235	"tciv6",
236	"tgia7", "tgib7", "tgic7", "tgid7",	236	"tgia7", "tgib7", "tgic7", "tgid7",
237	"tgiv7",	237	"tciv7",
238	"tgia8", "tgib8", "tgic8", "tgid8",	238	"tgia8", "tgib8", "tgic8", "tgid8",
239	"tgiv8", "tgiu8";	239	"tciv8", "tciu8";
240	clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;	240	clocks = <&cpg CPG_MOD R9A07G054_MTU_X_MCK_MTU3>;
241	power-domains = <&cpg>;	241	power-domains = <&cpg>;
242	resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;	242	resets = <&cpg R9A07G054_MTU_X_PRESET_MTU3>;

arch/arm64/include/asm/el2_setup.h+29−15

 .Lskip_hcrx_\@:
 .endm
+/* Check if running in host at EL2 mode, i.e., (h)VHE. Jump to fail if not. */
+.macro __check_hvhe fail, tmp
+	mrs	\tmp, hcr_el2
+	and	\tmp, \tmp, #HCR_E2H
+	cbz	\tmp, \fail
+.endm
 /*
  * Allow Non-secure EL1 and EL0 to access physical timer and counter.
  * This is not necessary for VHE, since the host kernel runs in EL2,
  */
 .macro __init_el2_timers
 	mov	x0, #3				// Enable EL1 physical timers
-	mrs	x1, hcr_el2
+	__check_hvhe .LnVHE_\@, x1
-	and	x1, x1, #HCR_E2H
-	cbz	x1, .LnVHE_\@
 	lsl	x0, x0, #10
 .LnVHE_\@:
 	msr	cnthctl_el2, x0
 /* Coprocessor traps */
 .macro __init_el2_cptr
-	mrs	x1, hcr_el2
+	__check_hvhe .LnVHE_\@, x1
-	and	x1, x1, #HCR_E2H
-	cbz	x1, .LnVHE_\@
 	mov	x0, #(CPACR_EL1_FPEN_EL1EN | CPACR_EL1_FPEN_EL0EN)
-	b	.Lset_cptr_\@
+	msr	cpacr_el1, x0
+	b	.Lskip_set_cptr_\@
 .LnVHE_\@:
 	mov	x0, #0x33ff
-.Lset_cptr_\@:
 	msr	cptr_el2, x0			// Disable copro. traps to EL2
+.Lskip_set_cptr_\@:
 .endm
 /* Disable any fine grained traps */
 	check_override id_aa64pfr0, ID_AA64PFR0_EL1_SVE_SHIFT, .Linit_sve_\@, .Lskip_sve_\@, x1, x2
 .Linit_sve_\@:	/* SVE register access */
-	mrs	x0, cptr_el2			// Disable SVE traps
+	__check_hvhe .Lcptr_nvhe_\@, x1
-	mrs	x1, hcr_el2
-	and	x1, x1, #HCR_E2H
-	cbz	x1, .Lcptr_nvhe_\@
-	// VHE case
+	// (h)VHE case
+	mrs	x0, cpacr_el1			// Disable SVE traps
 	orr	x0, x0, #(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)
-	b	.Lset_cptr_\@
+	msr	cpacr_el1, x0
+	b	.Lskip_set_cptr_\@
 .Lcptr_nvhe_\@: // nVHE case
+	mrs	x0, cptr_el2			// Disable SVE traps
 	bic	x0, x0, #CPTR_EL2_TZ
-.Lset_cptr_\@:
 	msr	cptr_el2, x0
+.Lskip_set_cptr_\@:
 	isb
 	mov	x1, #ZCR_ELx_LEN_MASK		// SVE: Enable full vector
 	msr_s	SYS_ZCR_EL2, x1			// length for EL1.
 	check_override id_aa64pfr1, ID_AA64PFR1_EL1_SME_SHIFT, .Linit_sme_\@, .Lskip_sme_\@, x1, x2
 .Linit_sme_\@:	/* SME register access and priority mapping */
+	__check_hvhe .Lcptr_nvhe_sme_\@, x1
+	// (h)VHE case
+	mrs	x0, cpacr_el1			// Disable SME traps
+	orr	x0, x0, #(CPACR_EL1_SMEN_EL0EN | CPACR_EL1_SMEN_EL1EN)
+	msr	cpacr_el1, x0
+	b	.Lskip_set_cptr_sme_\@
+.Lcptr_nvhe_sme_\@: // nVHE case
 	mrs	x0, cptr_el2			// Disable SME traps
 	bic	x0, x0, #CPTR_EL2_TSM
 	msr	cptr_el2, x0
+.Lskip_set_cptr_sme_\@:
 	isb
 	mrs	x1, sctlr_el2

arch/arm64/include/asm/kvm_asm.h+1−1

@@ -278,7 +278,7 @@ asmlinkage void __noreturn hyp_panic_bad_stack(void); · 277 unmodified lines
278	asmlinkage void kvm_unexpected_el2_exception(void);	278	asmlinkage void kvm_unexpected_el2_exception(void);
279	struct kvm_cpu_context;	279	struct kvm_cpu_context;
280	void handle_trap(struct kvm_cpu_context *host_ctxt);	280	void handle_trap(struct kvm_cpu_context *host_ctxt);
281	asmlinkage void __noreturn kvm_host_psci_cpu_entry(bool is_cpu_on);	281	asmlinkage void __noreturn __kvm_host_psci_cpu_entry(bool is_cpu_on);
282	void __noreturn __pkvm_init_finalise(void);	282	void __noreturn __pkvm_init_finalise(void);
283	void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc);	283	void kvm_nvhe_prepare_backtrace(unsigned long fp, unsigned long pc);
284	void kvm_patch_vector_branch(struct alt_instr *alt,	284	void kvm_patch_vector_branch(struct alt_instr *alt,

arch/arm64/include/asm/kvm_emulate.h+17−4

 	return test_bit(feature, vcpu->arch.features);
 }
+static __always_inline void kvm_write_cptr_el2(u64 val)
+{
+	if (has_vhe() || has_hvhe())
+		write_sysreg(val, cpacr_el1);
+	else
+		write_sysreg(val, cptr_el2);
+}
 static __always_inline u64 kvm_get_reset_cptr_el2(struct kvm_vcpu *vcpu)
 {
 	u64 val;
 	if (has_vhe()) {
 		val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN |
 		       CPACR_EL1_ZEN_EL1EN);
+		if (cpus_have_final_cap(ARM64_SME))
+			val |= CPACR_EL1_SMEN_EL1EN;
 	} else if (has_hvhe()) {
 		val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
+		if (!vcpu_has_sve(vcpu) ||
+		    (vcpu->arch.fp_state != FP_STATE_GUEST_OWNED))
+			val |= CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN;
+		if (cpus_have_final_cap(ARM64_SME))
+			val |= CPACR_EL1_SMEN_EL1EN | CPACR_EL1_SMEN_EL0EN;
 	} else {
 		val = CPTR_NVHE_EL2_RES1;
 {
 	u64 val = kvm_get_reset_cptr_el2(vcpu);
-	if (has_vhe() || has_hvhe())
+	kvm_write_cptr_el2(val);
-		write_sysreg(val, cpacr_el1);
-	else
-		write_sysreg(val, cptr_el2);
 }
 #endif /* __ARM64_KVM_EMULATE_H__ */

arch/arm64/include/asm/processor.h+0−8

@@ -359,14 +359,6 @@ static inline void prefetchw(const void *ptr) · 358 unmodified lines
359	asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));	359	asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
360	}	360	}
361		361
362	#define ARCH_HAS_SPINLOCK_PREFETCH
363	static inline void spin_lock_prefetch(const void *ptr)
364	{
365	asm volatile(ARM64_LSE_ATOMIC_INSN(
366	"prfm pstl1strm, %a0",
367	"nop") : : "p" (ptr));
368	}
369
370	extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */	362	extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
371	extern void __init minsigstksz_setup(void);	363	extern void __init minsigstksz_setup(void);
372		364

arch/arm64/kernel/fpsimd.c+5−4

 	void *sst = task->thread.sve_state;
 	struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
-	if (!system_supports_sve())
+	if (!system_supports_sve() && !system_supports_sme())
 		return;
 	vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
 	unsigned int i;
 	__uint128_t const *p;
-	if (!system_supports_sve())
+	if (!system_supports_sve() && !system_supports_sme())
 		return;
 	vl = thread_get_cur_vl(&task->thread);
 	void *sst = task->thread.sve_state;
 	struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state;
-	if (!test_tsk_thread_flag(task, TIF_SVE))
+	if (!test_tsk_thread_flag(task, TIF_SVE) &&
+	    !thread_sm_enabled(&task->thread))
 		return;
 	vq = sve_vq_from_vl(thread_get_cur_vl(&task->thread));
 			 */
 			task->thread.svcr &= ~(SVCR_SM_MASK |
 					       SVCR_ZA_MASK);
-			clear_thread_flag(TIF_SME);
+			clear_tsk_thread_flag(task, TIF_SME);
 			free_sme = true;
 		}
 	}

arch/arm64/kernel/ptrace.c+7−3

 	/*
 	 * Ensure target->thread.sve_state is up to date with target's
 	 * FPSIMD regs, so that a short copyin leaves trailing
-	 * registers unmodified.  Always enable SVE even if going into
+	 * registers unmodified.  Only enable SVE if we are
-	 * streaming mode.
+	 * configuring normal SVE, a system with streaming SVE may not
+	 * have normal SVE.
 	 */
 	fpsimd_sync_to_sve(target);
-	set_tsk_thread_flag(target, TIF_SVE);
+	if (type == ARM64_VEC_SVE)
+		set_tsk_thread_flag(target, TIF_SVE);
 	target->thread.fp_type = FP_STATE_SVE;
 	BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
 	if (ret == 0)
 		target->thread.svcr |= SVCR_ZA_MASK;
+	fpsimd_flush_task_state(target);
 	return ret;
 }

arch/arm64/kvm/arm.c+27−34

 static bool vgic_present, kvm_arm_initialised;
-static DEFINE_PER_CPU(unsigned char, kvm_arm_hardware_enabled);
+static DEFINE_PER_CPU(unsigned char, kvm_hyp_initialized);
 DEFINE_STATIC_KEY_FALSE(userspace_irqchip_in_use);
 bool is_kvm_arm_initialised(void)
 	cpu_hyp_init_features();
 }
-static void _kvm_arch_hardware_enable(void *discard)
+static void cpu_hyp_init(void *discard)
 {
-	if (!__this_cpu_read(kvm_arm_hardware_enabled)) {
+	if (!__this_cpu_read(kvm_hyp_initialized)) {
 		cpu_hyp_reinit();
-		__this_cpu_write(kvm_arm_hardware_enabled, 1);
+		__this_cpu_write(kvm_hyp_initialized, 1);
 	}
 }
-int kvm_arch_hardware_enable(void)
+static void cpu_hyp_uninit(void *discard)
 {
-	int was_enabled;
+	if (__this_cpu_read(kvm_hyp_initialized)) {
+		cpu_hyp_reset();
+		__this_cpu_write(kvm_hyp_initialized, 0);
+	}
+}
+int kvm_arch_hardware_enable(void)
+{
 	/*
 	 * Most calls to this function are made with migration
 	 * disabled, but not with preemption disabled. The former is
 	 */
 	preempt_disable();
-	was_enabled = __this_cpu_read(kvm_arm_hardware_enabled);
+	cpu_hyp_init(NULL);
-	_kvm_arch_hardware_enable(NULL);
-	if (!was_enabled) {
+	kvm_vgic_cpu_up();
-		kvm_vgic_cpu_up();
+	kvm_timer_cpu_up();
-		kvm_timer_cpu_up();
-	}
 	preempt_enable();
 	return 0;
 }
-static void _kvm_arch_hardware_disable(void *discard)
-{
-	if (__this_cpu_read(kvm_arm_hardware_enabled)) {
-		cpu_hyp_reset();
-		__this_cpu_write(kvm_arm_hardware_enabled, 0);
-	}
-}
 void kvm_arch_hardware_disable(void)
 {
-	if (__this_cpu_read(kvm_arm_hardware_enabled)) {
+	kvm_timer_cpu_down();
-		kvm_timer_cpu_down();
+	kvm_vgic_cpu_down();
-		kvm_vgic_cpu_down();
-	}
 	if (!is_protected_kvm_enabled())
-		_kvm_arch_hardware_disable(NULL);
+		cpu_hyp_uninit(NULL);
 }
 #ifdef CONFIG_CPU_PM
 				    void *v)
 {
 	/*
-	 * kvm_arm_hardware_enabled is left with its old value over
+	 * kvm_hyp_initialized is left with its old value over
 	 * PM_ENTER->PM_EXIT. It is used to indicate PM_EXIT should
 	 * re-enable hyp.
 	 */
 	switch (cmd) {
 	case CPU_PM_ENTER:
-		if (__this_cpu_read(kvm_arm_hardware_enabled))
+		if (__this_cpu_read(kvm_hyp_initialized))
 			/*
-			 * don't update kvm_arm_hardware_enabled here
+			 * don't update kvm_hyp_initialized here
-			 * so that the hardware will be re-enabled
+			 * so that the hyp will be re-enabled
 			 * when we resume. See below.
 			 */
 			cpu_hyp_reset();
 		return NOTIFY_OK;
 	case CPU_PM_ENTER_FAILED:
 	case CPU_PM_EXIT:
-		if (__this_cpu_read(kvm_arm_hardware_enabled))
+		if (__this_cpu_read(kvm_hyp_initialized))
-			/* The hardware was enabled before suspend. */
+			/* The hyp was enabled before suspend. */
 			cpu_hyp_reinit();
 		return NOTIFY_OK;
 	/*
 	 * Enable hardware so that subsystem initialisation can access EL2.
 	 */
-	on_each_cpu(_kvm_arch_hardware_enable, NULL, 1);
+	on_each_cpu(cpu_hyp_init, NULL, 1);
 	/*
 	 * Register CPU lower-power notifier
 		hyp_cpu_pm_exit();
 	if (err || !is_protected_kvm_enabled())
-		on_each_cpu(_kvm_arch_hardware_disable, NULL, 1);
+		on_each_cpu(cpu_hyp_uninit, NULL, 1);
 	return err;
 }
 	 * The stub hypercalls are now disabled, so set our local flag to
 	 * prevent a later re-init attempt in kvm_arch_hardware_enable().
 	 */
-	__this_cpu_write(kvm_arm_hardware_enabled, 1);
+	__this_cpu_write(kvm_hyp_initialized, 1);
 	preempt_enable();
 	return ret;

arch/arm64/kvm/hyp/include/hyp/switch.h+1−0

@@ -457,6 +457,7 @@ static bool handle_ampere1_tcr(struct kvm_vcpu *vcpu) · 456 unmodified lines
457	*/	457	*/
458	val &= ~(TCR_HD \| TCR_HA);	458	val &= ~(TCR_HD \| TCR_HA);
459	write_sysreg_el1(val, SYS_TCR);	459	write_sysreg_el1(val, SYS_TCR);
		460	__kvm_skip_instr(vcpu);
460	return true;	461	return true;
461	}	462	}
462		463

arch/arm64/kvm/hyp/nvhe/ffa.c+14−1

@@ -705,7 +705,20 @@ int hyp_ffa_init(void *pages) · 704 unmodified lines
705	if (res.a0 == FFA_RET_NOT_SUPPORTED)	705	if (res.a0 == FFA_RET_NOT_SUPPORTED)
706	return 0;	706	return 0;
707		707
708	if (res.a0 != FFA_VERSION_1_0)	708	/*
		709	* Firmware returns the maximum supported version of the FF-A
		710	* implementation. Check that the returned version is
		711	* backwards-compatible with the hyp according to the rules in DEN0077A
		712	* v1.1 REL0 13.2.1.
		713	*
		714	* Of course, things are never simple when dealing with firmware. v1.1
		715	* broke ABI with v1.0 on several structures, which is itself
		716	* incompatible with the aforementioned versioning scheme. The
		717	* expectation is that v1.x implementations that do not support the v1.0
		718	* ABI return NOT_SUPPORTED rather than a version number, according to
		719	* DEN0077A v1.1 REL0 18.6.4.
		720	*/
		721	if (FFA_MAJOR_VERSION(res.a0) != 1)
709	return -EOPNOTSUPP;	722	return -EOPNOTSUPP;
710		723
711	arm_smccc_1_1_smc(FFA_ID_GET, 0, 0, 0, 0, 0, 0, 0, &res);	724	arm_smccc_1_1_smc(FFA_ID_GET, 0, 0, 0, 0, 0, 0, 0, &res);

arch/arm64/kvm/hyp/nvhe/switch.c+1−1

@@ -63,7 +63,7 @@ static void __activate_traps(struct kvm_vcpu *vcpu) · 62 unmodified lines
63	__activate_traps_fpsimd32(vcpu);	63	__activate_traps_fpsimd32(vcpu);
64	}	64	}
65		65
66	write_sysreg(val, cptr_el2);	66	kvm_write_cptr_el2(val);
67	write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el2);	67	write_sysreg(__this_cpu_read(kvm_hyp_vector), vbar_el2);
68		68
69	if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {	69	if (cpus_have_final_cap(ARM64_WORKAROUND_SPECULATIVE_AT)) {

arch/ia64/include/asm/processor.h+0−3

 #define ARCH_HAS_PREFETCH
 #define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
 #define PREFETCH_STRIDE			L1_CACHE_BYTES
 static inline void
 	ia64_lfetch_excl(ia64_lfhint_none, x);
 }
-#define spin_lock_prefetch(x)	prefetchw(x)
 extern unsigned long boot_option_idle_override;
 enum idle_boot_override {IDLE_NO_OVERRIDE=0, IDLE_HALT, IDLE_FORCE_MWAIT,

arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h+0−2

@@ -58,8 +58,6 @@ · 57 unmodified lines
58		58
59	#define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)	59	#define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
60		60
61	#define ARCH_HAS_SPINLOCK_PREFETCH 1
62	#define spin_lock_prefetch(x) prefetch(x)
63	#define PREFETCH_STRIDE 128	61	#define PREFETCH_STRIDE 128
64		62
65	#ifdef __OCTEON__	63	#ifdef __OCTEON__

arch/parisc/Kconfig.debug+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	#	2	#
3	config LIGHTWEIGHT_SPINLOCK_CHECK	3	config LIGHTWEIGHT_SPINLOCK_CHECK
4	bool "Enable lightweight spinlock checks"	4	bool "Enable lightweight spinlock checks"
5	depends on SMP && !DEBUG_SPINLOCK	5	depends on DEBUG_KERNEL && SMP && !DEBUG_SPINLOCK
6	default y	6	default y
7	help	7	help
8	Add checks with low performance impact to the spinlock functions	8	Add checks with low performance impact to the spinlock functions

arch/parisc/boot/compressed/misc.c+5−5

@@ -117,7 +117,7 @@ char strchr(const char s, int c) · 116 unmodified lines
117	return NULL;	117	return NULL;
118	}	118	}
119		119
120	int puts(const char *s)	120	static int puts(const char *s)
121	{	121	{
122	const char *nuline = s;	122	const char *nuline = s;
123		123
@@ -172,7 +172,7 @@ static int print_num(unsigned long num, int base) · 48 unmodified lines
172	return 0;	172	return 0;
173	}	173	}
174		174
175	int printf(const char *fmt, ...)	175	static int printf(const char *fmt, ...)
176	{	176	{
177	va_list args;	177	va_list args;
178	int i = 0;	178	int i = 0;
@@ -204,13 +204,13 @@ void abort(void) · 25 unmodified lines
204	}	204	}
205		205
206	#undef malloc	206	#undef malloc
207	void *malloc(size_t size)	207	static void *malloc(size_t size)
208	{	208	{
209	return malloc_gzip(size);	209	return malloc_gzip(size);
210	}	210	}
211		211
212	#undef free	212	#undef free
213	void free(void *ptr)	213	static void free(void *ptr)
214	{	214	{
215	return free_gzip(ptr);	215	return free_gzip(ptr);
216	}	216	}
@@ -278,7 +278,7 @@ static void parse_elf(void *output) · 61 unmodified lines
278	free(phdrs);	278	free(phdrs);
279	}	279	}
280		280
281	unsigned long decompress_kernel(unsigned int started_wide,	281	asmlinkage unsigned long __visible decompress_kernel(unsigned int started_wide,
282	unsigned int command_line,	282	unsigned int command_line,
283	const unsigned int rd_start,	283	const unsigned int rd_start,
284	const unsigned int rd_end)	284	const unsigned int rd_end)

arch/parisc/include/asm/dma.h+2−0

@@ -14,6 +14,8 @@ · 13 unmodified lines
14	#define dma_outb outb	14	#define dma_outb outb
15	#define dma_inb inb	15	#define dma_inb inb
16		16
		17	extern unsigned long pcxl_dma_start;
		18
17	/*	19	/*
18	** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up	20	** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
19	** (or rather not merge) DMAs into manageable chunks.	21	** (or rather not merge) DMAs into manageable chunks.

arch/parisc/include/asm/ftrace.h+4−0

 extern unsigned long sys_call_table[];
 extern unsigned long return_address(unsigned int);
+struct ftrace_regs;
+extern void ftrace_function_trampoline(unsigned long parent,
+		unsigned long self_addr, unsigned long org_sp_gr3,
+		struct ftrace_regs *fregs);
 #ifdef CONFIG_DYNAMIC_FTRACE
 extern void ftrace_caller(void);

arch/parisc/include/asm/spinlock.h+0−2

@@ -7,8 +7,6 @@ · 6 unmodified lines
7	#include <asm/processor.h>	7	#include <asm/processor.h>
8	#include <asm/spinlock_types.h>	8	#include <asm/spinlock_types.h>
9		9
10	#define SPINLOCK_BREAK_INSN 0x0000c006 /* break 6,6 */
11
12	static inline void arch_spin_val_check(int lock_val)	10	static inline void arch_spin_val_check(int lock_val)
13	{	11	{
14	if (IS_ENABLED(CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK))	12	if (IS_ENABLED(CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK))

arch/parisc/include/asm/spinlock_types.h+6−0

 #define __ARCH_SPIN_LOCK_UNLOCKED_VAL	0x1a46
+#define SPINLOCK_BREAK_INSN	0x0000c006	/* break 6,6 */
+#ifndef __ASSEMBLY__
 typedef struct {
 #ifdef CONFIG_PA20
 	volatile unsigned int slock;
 	volatile unsigned int	counter;
 } arch_rwlock_t;
+#endif /* __ASSEMBLY__ */
 #define __ARCH_RW_LOCK_UNLOCKED__       0x01000000
 #define __ARCH_RW_LOCK_UNLOCKED         { .lock_mutex = __ARCH_SPIN_LOCK_UNLOCKED, \
 					.counter = __ARCH_RW_LOCK_UNLOCKED__ }

arch/parisc/kernel/firmware.c+4−4

@@ -74,8 +74,8 @@ · 73 unmodified lines
74	static DEFINE_SPINLOCK(pdc_lock);	74	static DEFINE_SPINLOCK(pdc_lock);
75	#endif	75	#endif
76		76
77	unsigned long pdc_result[NUM_PDC_RESULT] __aligned(8);	77	static unsigned long pdc_result[NUM_PDC_RESULT] __aligned(8);
78	unsigned long pdc_result2[NUM_PDC_RESULT] __aligned(8);	78	static unsigned long pdc_result2[NUM_PDC_RESULT] __aligned(8);
79		79
80	#ifdef CONFIG_64BIT	80	#ifdef CONFIG_64BIT
81	#define WIDE_FIRMWARE 0x1	81	#define WIDE_FIRMWARE 0x1
@@ -334,7 +334,7 @@ int __pdc_cpu_rendezvous(void) · 252 unmodified lines
334	/**	334	/**
335	* pdc_cpu_rendezvous_lock - Lock PDC while transitioning to rendezvous state	335	* pdc_cpu_rendezvous_lock - Lock PDC while transitioning to rendezvous state
336	*/	336	*/
337	void pdc_cpu_rendezvous_lock(void)	337	void pdc_cpu_rendezvous_lock(void) __acquires(&pdc_lock)
338	{	338	{
339	spin_lock(&pdc_lock);	339	spin_lock(&pdc_lock);
340	}	340	}
@@ -342,7 +342,7 @@ void pdc_cpu_rendezvous_lock(void) · 1 unmodified line
342	/**	342	/**
343	* pdc_cpu_rendezvous_unlock - Unlock PDC after reaching rendezvous state	343	* pdc_cpu_rendezvous_unlock - Unlock PDC after reaching rendezvous state
344	*/	344	*/
345	void pdc_cpu_rendezvous_unlock(void)	345	void pdc_cpu_rendezvous_unlock(void) __releases(&pdc_lock)
346	{	346	{
347	spin_unlock(&pdc_lock);	347	spin_unlock(&pdc_lock);
348	}	348	}

arch/parisc/kernel/ftrace.c+1−1

@@ -53,7 +53,7 @@ static void __hot prepare_ftrace_return(unsigned long *parent, · 52 unmodified lines
53		53
54	static ftrace_func_t ftrace_func;	54	static ftrace_func_t ftrace_func;
55		55
56	void notrace __hot ftrace_function_trampoline(unsigned long parent,	56	asmlinkage void notrace __hot ftrace_function_trampoline(unsigned long parent,
57	unsigned long self_addr,	57	unsigned long self_addr,
58	unsigned long org_sp_gr3,	58	unsigned long org_sp_gr3,
59	struct ftrace_regs *fregs)	59	struct ftrace_regs *fregs)

arch/parisc/kernel/parisc_ksyms.c+1−6

 #include <linux/module.h>
 #include <linux/kernel.h>
 #include <linux/syscalls.h>
+#include <linux/libgcc.h>
 #include <linux/string.h>
 EXPORT_SYMBOL(memset);
 EXPORT_SYMBOL($$divI_14);
 EXPORT_SYMBOL($$divI_15);
-extern void __ashrdi3(void);
-extern void __ashldi3(void);
-extern void __lshrdi3(void);
-extern void __muldi3(void);
-extern void __ucmpdi2(void);
 EXPORT_SYMBOL(__ashrdi3);
 EXPORT_SYMBOL(__ashldi3);
 EXPORT_SYMBOL(__lshrdi3);

arch/parisc/kernel/pci-dma.c+2−10

 static unsigned long pcxl_used_bytes __read_mostly;
 static unsigned long pcxl_used_pages __read_mostly;
-extern unsigned long pcxl_dma_start; /* Start of pcxl dma mapping area */
+unsigned long pcxl_dma_start __ro_after_init; /* pcxl dma mapping area start */
 static DEFINE_SPINLOCK(pcxl_res_lock);
 static char    *pcxl_res_map;
 static int     pcxl_res_hint;
 	pcxl_res_map = (char *)__get_free_pages(GFP_KERNEL,
 					    get_order(pcxl_res_size));
 	memset(pcxl_res_map, 0, pcxl_res_size);
-	proc_gsc_root = proc_mkdir("gsc", NULL);
+	proc_gsc_root = proc_mkdir("bus/gsc", NULL);
 	if (!proc_gsc_root)
     		printk(KERN_WARNING
 			"pcxl_dma_init: Unable to create gsc /proc dir entry\n");
 	map_uncached_pages(vaddr, size, paddr);
 	*dma_handle = (dma_addr_t) paddr;
-#if 0
-/* This probably isn't needed to support EISA cards.
-** ISA cards will certainly only support 24-bit DMA addressing.
-** Not clear if we can, want, or need to support ISA.
-*/
-	if (!dev || *dev->coherent_dma_mask < 0xffffffff)
-		gfp |= GFP_DMA;
-#endif
 	return (void *)vaddr;
 }

arch/parisc/kernel/pdt.c+1−3

@@ -354,10 +354,8 @@ static int __init pdt_initcall(void) · 353 unmodified lines
354	return -ENODEV;	354	return -ENODEV;
355		355
356	kpdtd_task = kthread_run(pdt_mainloop, NULL, "kpdtd");	356	kpdtd_task = kthread_run(pdt_mainloop, NULL, "kpdtd");
357	if (IS_ERR(kpdtd_task))
358	return PTR_ERR(kpdtd_task);
359		357
360	return 0;	358	return PTR_ERR_OR_ZERO(kpdtd_task);
361	}	359	}
362		360
363	late_initcall(pdt_initcall);	361	late_initcall(pdt_initcall);

arch/parisc/kernel/perf.c+1−1

@@ -57,7 +57,7 @@ struct rdr_tbl_ent { · 56 unmodified lines
57	static int perf_processor_interface __read_mostly = UNKNOWN_INTF;	57	static int perf_processor_interface __read_mostly = UNKNOWN_INTF;
58	static int perf_enabled __read_mostly;	58	static int perf_enabled __read_mostly;
59	static DEFINE_SPINLOCK(perf_lock);	59	static DEFINE_SPINLOCK(perf_lock);
60	struct parisc_device *cpu_device __read_mostly;	60	static struct parisc_device *cpu_device __read_mostly;
61		61
62	/* RDRs to write for PCX-W */	62	/* RDRs to write for PCX-W */
63	static const int perf_rdrs_W[] =	63	static const int perf_rdrs_W[] =

arch/parisc/kernel/processor.c+1−0

@@ -26,6 +26,7 @@ · 25 unmodified lines
26	#include <asm/processor.h>	26	#include <asm/processor.h>
27	#include <asm/page.h>	27	#include <asm/page.h>
28	#include <asm/pdc.h>	28	#include <asm/pdc.h>
		29	#include <asm/smp.h>
29	#include <asm/pdcpat.h>	30	#include <asm/pdcpat.h>
30	#include <asm/irq.h> /* for struct irq_region */	31	#include <asm/irq.h> /* for struct irq_region */
31	#include <asm/parisc-device.h>	32	#include <asm/parisc-device.h>

arch/parisc/kernel/setup.c+0−48

@@ -40,11 +40,6 @@ · 39 unmodified lines
40		40
41	static char __initdata command_line[COMMAND_LINE_SIZE];	41	static char __initdata command_line[COMMAND_LINE_SIZE];
42		42
43	/* Intended for ccio/sba/cpu statistics under /proc/bus/{runway\|gsc} */
44	struct proc_dir_entry * proc_runway_root __read_mostly = NULL;
45	struct proc_dir_entry * proc_gsc_root __read_mostly = NULL;
46	struct proc_dir_entry * proc_mckinley_root __read_mostly = NULL;
47
48	static void __init setup_cmdline(char **cmdline_p)	43	static void __init setup_cmdline(char **cmdline_p)
49	{	44	{
50	extern unsigned int boot_args[];	45	extern unsigned int boot_args[];
@@ -196,48 +191,6 @@ const struct seq_operations cpuinfo_op = { · 145 unmodified lines
196	.show = show_cpuinfo	191	.show = show_cpuinfo
197	};	192	};
198		193
199	static void __init parisc_proc_mkdir(void)
200	{
201	/*
202	** Can't call proc_mkdir() until after proc_root_init() has been
203	** called by start_kernel(). In other words, this code can't
204	** live in arch/.../setup.c because start_parisc() calls
205	** start_kernel().
206	*/
207	switch (boot_cpu_data.cpu_type) {
208	case pcxl:
209	case pcxl2:
210	if (NULL == proc_gsc_root)
211	{
212	proc_gsc_root = proc_mkdir("bus/gsc", NULL);
213	}
214	break;
215	case pcxt_:
216	case pcxu:
217	case pcxu_:
218	case pcxw:
219	case pcxw_:
220	case pcxw2:
221	if (NULL == proc_runway_root)
222	{
223	proc_runway_root = proc_mkdir("bus/runway", NULL);
224	}
225	break;
226	case mako:
227	case mako2:
228	if (NULL == proc_mckinley_root)
229	{
230	proc_mckinley_root = proc_mkdir("bus/mckinley", NULL);
231	}
232	break;
233	default:
234	/* FIXME: this was added to prevent the compiler
235	* complaining about missing pcx, pcxs and pcxt
236	* I'm assuming they have neither gsc nor runway */
237	break;
238	}
239	}
240
241	static struct resource central_bus = {	194	static struct resource central_bus = {
242	.name = "Central Bus",	195	.name = "Central Bus",
243	.start = F_EXTEND(0xfff80000),	196	.start = F_EXTEND(0xfff80000),
@@ -294,7 +247,6 @@ static int __init parisc_init(void) · 50 unmodified lines
294	{	247	{
295	u32 osid = (OS_ID_LINUX << 16);	248	u32 osid = (OS_ID_LINUX << 16);
296		249
297	parisc_proc_mkdir();
298	parisc_init_resources();	250	parisc_init_resources();
299	do_device_inventory(); /* probe for hardware */	251	do_device_inventory(); /* probe for hardware */
300		252

arch/parisc/kernel/signal.c+1−1

@@ -423,7 +423,7 @@ static void check_syscallno_in_delay_branch(struct pt_regs *regs) · 422 unmodified lines
423	regs->gr[31] -= 8; /* delayed branching */	423	regs->gr[31] -= 8; /* delayed branching */
424		424
425	/* Get assembler opcode of code in delay branch */	425	/* Get assembler opcode of code in delay branch */
426	uaddr = (unsigned int *) ((regs->gr[31] & ~3) + 4);	426	uaddr = (u32 __user *) ((regs->gr[31] & ~3) + 4);
427	err = get_user(opcode, uaddr);	427	err = get_user(opcode, uaddr);
428	if (err)	428	if (err)
429	return;	429	return;

arch/parisc/kernel/sys_parisc.c+5−10

 #include <linux/elf-randomize.h>
 /*
- * Construct an artificial page offset for the mapping based on the virtual
+ * Construct an artificial page offset for the mapping based on the physical
  * address of the kernel file mapping variable.
- * If filp is zero the calculated pgoff value aliases the memory of the given
- * address. This is useful for io_uring where the mapping shall alias a kernel
- * address and a userspace adress where both the kernel and the userspace
- * access the same memory region.
  */
-#define GET_FILP_PGOFF(filp, addr)		\
+#define GET_FILP_PGOFF(filp)		\
-	((filp ? (((unsigned long) filp->f_mapping) >> 8)	\
+	(filp ? (((unsigned long) filp->f_mapping) >> 8)	\
-		 & ((SHM_COLOUR-1) >> PAGE_SHIFT) : 0UL)	\
+		 & ((SHM_COLOUR-1) >> PAGE_SHIFT) : 0UL)
-	  + (addr >> PAGE_SHIFT))
 static unsigned long shared_align_offset(unsigned long filp_pgoff,
 					 unsigned long pgoff)
 	do_color_align = 0;
 	if (filp || (flags & MAP_SHARED))
 		do_color_align = 1;
-	filp_pgoff = GET_FILP_PGOFF(filp, addr);
+	filp_pgoff = GET_FILP_PGOFF(filp);
 	if (flags & MAP_FIXED) {
 		/* Even MAP_FIXED mappings must reside within TASK_SIZE */

arch/parisc/kernel/syscall.S+20−3

 #include <asm/assembly.h>
 #include <asm/processor.h>
 #include <asm/cache.h>
+#include <asm/spinlock_types.h>
 #include <linux/linkage.h>
 	stw	\reg1, 0(%sr2,\reg2)
 	.endm
+	/* raise exception if spinlock content is not zero or
+	 * __ARCH_SPIN_LOCK_UNLOCKED_VAL */
+	.macro	spinlock_check spin_val,tmpreg
+#ifdef CONFIG_LIGHTWEIGHT_SPINLOCK_CHECK
+	ldi	__ARCH_SPIN_LOCK_UNLOCKED_VAL, \tmpreg
+	andcm,=	\spin_val, \tmpreg, %r0
+	.word	SPINLOCK_BREAK_INSN
+#endif
+	.endm
 	.text
 	.import syscall_exit,code
 lws_exit_noerror:
 	lws_pagefault_enable	%r1,%r21
-	stw,ma	%r20, 0(%sr2,%r20)
+	ldi	__ARCH_SPIN_LOCK_UNLOCKED_VAL, %r21
+	stw,ma	%r21, 0(%sr2,%r20)
 	ssm	PSW_SM_I, %r0
 	b	lws_exit
 	copy	%r0, %r21
 lws_pagefault:
 	lws_pagefault_enable	%r1,%r21
-	stw,ma	%r20, 0(%sr2,%r20)
+	ldi	__ARCH_SPIN_LOCK_UNLOCKED_VAL, %r21
+	stw,ma	%r21, 0(%sr2,%r20)
 	ssm	PSW_SM_I, %r0
 	ldo	3(%r0),%r28
 	b	lws_exit
 	/* Try to acquire the lock */
 	LDCW	0(%sr2,%r20), %r28
+	spinlock_check	%r28, %r21
 	comclr,<>	%r0, %r28, %r0
 	b,n	lws_wouldblock
 	/* Try to acquire the lock */
 	LDCW	0(%sr2,%r20), %r28
+	spinlock_check	%r28, %r21
 	comclr,<>	%r0, %r28, %r0
 	b,n	lws_wouldblock
 	/* Try to acquire the lock */
 	LDCW	0(%sr2,%r20), %r28
+	spinlock_check	%r28, %r21
 	comclr,<>	%r0, %r28, %r0
 	b,n	lws_wouldblock
 	/* Try to acquire the lock */
 	LDCW	0(%sr2,%r20), %r28
+	spinlock_check	%r28, %r21
 	comclr,<>	%r0, %r28, %r0
 	b,n	lws_wouldblock
 	/* lws locks */
 	.rept 256
 	/* Keep locks aligned at 16-bytes */
-	.word 1
+	.word __ARCH_SPIN_LOCK_UNLOCKED_VAL
 	.word 0
 	.word 0
 	.word 0

arch/parisc/kernel/unaligned.c+10−9

 #include <linux/signal.h>
 #include <linux/ratelimit.h>
 #include <linux/uaccess.h>
+#include <linux/sysctl.h>
 #include <asm/unaligned.h>
 #include <asm/hardirq.h>
 #include <asm/traps.h>
 	: "r19", "r20", "r21", "r22", "r1" );
 #else
     {
-	unsigned long valh=(val>>32),vall=(val&0xffffffffl);
+	unsigned long valh = (val >> 32), vall = (val & 0xffffffffl);
 	__asm__ __volatile__ (
 "	mtsp	%4, %%sr1\n"
 "	zdep	%2, 29, 2, %%r19\n"
 	case OPCODE_LDWA_I:
 	case OPCODE_LDW_S:
 	case OPCODE_LDWA_S:
-		ret = emulate_ldw(regs, R3(regs->iir),0);
+		ret = emulate_ldw(regs, R3(regs->iir), 0);
 		break;
 	case OPCODE_STH:
 	case OPCODE_STW:
 	case OPCODE_STWA:
-		ret = emulate_stw(regs, R2(regs->iir),0);
+		ret = emulate_stw(regs, R2(regs->iir), 0);
 		break;
 #ifdef CONFIG_64BIT
 	case OPCODE_LDDA_I:
 	case OPCODE_LDD_S:
 	case OPCODE_LDDA_S:
-		ret = emulate_ldd(regs, R3(regs->iir),0);
+		ret = emulate_ldd(regs, R3(regs->iir), 0);
 		break;
 	case OPCODE_STD:
 	case OPCODE_STDA:
-		ret = emulate_std(regs, R2(regs->iir),0);
+		ret = emulate_std(regs, R2(regs->iir), 0);
 		break;
 #endif
 	case OPCODE_FLDWS:
 	case OPCODE_FLDWXR:
 	case OPCODE_FLDWSR:
-		ret = emulate_ldw(regs,FR3(regs->iir),1);
+		ret = emulate_ldw(regs, FR3(regs->iir), 1);
 		break;
 	case OPCODE_FLDDX:
 	case OPCODE_FLDDS:
-		ret = emulate_ldd(regs,R3(regs->iir),1);
+		ret = emulate_ldd(regs, R3(regs->iir), 1);
 		break;
 	case OPCODE_FSTWX:
 	case OPCODE_FSTWS:
 	case OPCODE_FSTWXR:
 	case OPCODE_FSTWSR:
-		ret = emulate_stw(regs,FR3(regs->iir),1);
+		ret = emulate_stw(regs, FR3(regs->iir), 1);
 		break;
 	case OPCODE_FSTDX:
 	case OPCODE_FSTDS:
-		ret = emulate_std(regs,R3(regs->iir),1);
+		ret = emulate_std(regs, R3(regs->iir), 1);
 		break;
 	case OPCODE_LDCD_I:

arch/parisc/lib/ucmpdi2.c+2−1

 // SPDX-License-Identifier: GPL-2.0
 #include <linux/module.h>
+#include <linux/libgcc.h>
 union ull_union {
 	unsigned long long ull;
 	} ui;
 };
-int __ucmpdi2(unsigned long long a, unsigned long long b)
+word_type __ucmpdi2(unsigned long long a, unsigned long long b)
 {
 	union ull_union au = {.ull = a};
 	union ull_union bu = {.ull = b};

arch/parisc/mm/fault.c+25−25

@@ -192,31 +192,31 @@ int fixup_exception(struct pt_regs *regs) · 191 unmodified lines
192	* For implementation see handle_interruption() in traps.c	192	* For implementation see handle_interruption() in traps.c
193	*/	193	*/
194	static const char * const trap_description[] = {	194	static const char * const trap_description[] = {
195	[1] "High-priority machine check (HPMC)",	195	[1] = "High-priority machine check (HPMC)",
196	[2] "Power failure interrupt",	196	[2] = "Power failure interrupt",
197	[3] "Recovery counter trap",	197	[3] = "Recovery counter trap",
198	[5] "Low-priority machine check",	198	[5] = "Low-priority machine check",
199	[6] "Instruction TLB miss fault",	199	[6] = "Instruction TLB miss fault",
200	[7] "Instruction access rights / protection trap",	200	[7] = "Instruction access rights / protection trap",
201	[8] "Illegal instruction trap",	201	[8] = "Illegal instruction trap",
202	[9] "Break instruction trap",	202	[9] = "Break instruction trap",
203	[10] "Privileged operation trap",	203	[10] = "Privileged operation trap",
204	[11] "Privileged register trap",	204	[11] = "Privileged register trap",
205	[12] "Overflow trap",	205	[12] = "Overflow trap",
206	[13] "Conditional trap",	206	[13] = "Conditional trap",
207	[14] "FP Assist Exception trap",	207	[14] = "FP Assist Exception trap",
208	[15] "Data TLB miss fault",	208	[15] = "Data TLB miss fault",
209	[16] "Non-access ITLB miss fault",	209	[16] = "Non-access ITLB miss fault",
210	[17] "Non-access DTLB miss fault",	210	[17] = "Non-access DTLB miss fault",
211	[18] "Data memory protection/unaligned access trap",	211	[18] = "Data memory protection/unaligned access trap",
212	[19] "Data memory break trap",	212	[19] = "Data memory break trap",
213	[20] "TLB dirty bit trap",	213	[20] = "TLB dirty bit trap",
214	[21] "Page reference trap",	214	[21] = "Page reference trap",
215	[22] "Assist emulation trap",	215	[22] = "Assist emulation trap",
216	[25] "Taken branch trap",	216	[25] = "Taken branch trap",
217	[26] "Data memory access rights trap",	217	[26] = "Data memory access rights trap",
218	[27] "Data memory protection ID trap",	218	[27] = "Data memory protection ID trap",
219	[28] "Unaligned data reference trap",	219	[28] = "Unaligned data reference trap",
220	};	220	};
221		221
222	const char *trap_name(unsigned long code)	222	const char *trap_name(unsigned long code)

arch/parisc/mm/fixmap.c+0−3

@@ -19,9 +19,6 @@ void notrace set_fixmap(enum fixed_addresses idx, phys_addr_t phys) · 18 unmodified lines
19	pmd_t *pmd = pmd_offset(pud, vaddr);	19	pmd_t *pmd = pmd_offset(pud, vaddr);
20	pte_t *pte;	20	pte_t *pte;
21		21
22	if (pmd_none(*pmd))
23	pte = pte_alloc_kernel(pmd, vaddr);
24
25	pte = pte_offset_kernel(pmd, vaddr);	22	pte = pte_offset_kernel(pmd, vaddr);
26	set_pte_at(&init_mm, vaddr, pte, __mk_pte(phys, PAGE_KERNEL_RWX));	23	set_pte_at(&init_mm, vaddr, pte, __mk_pte(phys, PAGE_KERNEL_RWX));
27	flush_tlb_kernel_range(vaddr, vaddr + PAGE_SIZE);	24	flush_tlb_kernel_range(vaddr, vaddr + PAGE_SIZE);

arch/parisc/mm/init.c+34−4

@@ -523,10 +523,6 @@ void mark_rodata_ro(void) · 522 unmodified lines
523	void *parisc_vmalloc_start __ro_after_init;	523	void *parisc_vmalloc_start __ro_after_init;
524	EXPORT_SYMBOL(parisc_vmalloc_start);	524	EXPORT_SYMBOL(parisc_vmalloc_start);
525		525
526	#ifdef CONFIG_PA11
527	unsigned long pcxl_dma_start __ro_after_init;
528	#endif
529
530	void __init mem_init(void)	526	void __init mem_init(void)
531	{	527	{
532	/* Do sanity checks on IPC (compat) structures */	528	/* Do sanity checks on IPC (compat) structures */
@@ -669,6 +665,39 @@ static void __init gateway_init(void) · 136 unmodified lines
669	PAGE_SIZE, PAGE_GATEWAY, 1);	665	PAGE_SIZE, PAGE_GATEWAY, 1);
670	}	666	}
671		667
		668	static void __init fixmap_init(void)
		669	{
		670	unsigned long addr = FIXMAP_START;
		671	unsigned long end = FIXMAP_START + FIXMAP_SIZE;
		672	pgd_t *pgd = pgd_offset_k(addr);
		673	p4d_t *p4d = p4d_offset(pgd, addr);
		674	pud_t *pud = pud_offset(p4d, addr);
		675	pmd_t *pmd;
		676
		677	BUILD_BUG_ON(FIXMAP_SIZE > PMD_SIZE);
		678
		679	#if CONFIG_PGTABLE_LEVELS == 3
		680	if (pud_none(*pud)) {
		681	pmd = memblock_alloc(PAGE_SIZE << PMD_TABLE_ORDER,
		682	PAGE_SIZE << PMD_TABLE_ORDER);
		683	if (!pmd)
		684	panic("fixmap: pmd allocation failed.\n");
		685	pud_populate(NULL, pud, pmd);
		686	}
		687	#endif
		688
		689	pmd = pmd_offset(pud, addr);
		690	do {
		691	pte_t *pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
		692	if (!pte)
		693	panic("fixmap: pte allocation failed.\n");
		694
		695	pmd_populate_kernel(&init_mm, pmd, pte);
		696
		697	addr += PAGE_SIZE;
		698	} while (addr < end);
		699	}
		700
672	static void __init parisc_bootmem_free(void)	701	static void __init parisc_bootmem_free(void)
673	{	702	{
674	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0, };	703	unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0, };
@@ -683,6 +712,7 @@ void __init paging_init(void) · 8 unmodified lines
683	setup_bootmem();	712	setup_bootmem();
684	pagetable_init();	713	pagetable_init();
685	gateway_init();	714	gateway_init();
		715	fixmap_init();
686	flush_cache_all_local(); /* start with known state */	716	flush_cache_all_local(); /* start with known state */
687	flush_tlb_all_local(NULL);	717	flush_tlb_all_local(NULL);
688		718

arch/parisc/mm/ioremap.c+4−5

  */
 void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
 {
-	void __iomem *addr;
+	uintptr_t addr;
 	struct vm_struct *area;
 	unsigned long offset, last_addr;
 	pgprot_t pgprot;
 	if (!area)
 		return NULL;
-	addr = (void __iomem *) area->addr;
+	addr = (uintptr_t) area->addr;
-	if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size,
+	if (ioremap_page_range(addr, addr + size, phys_addr, pgprot)) {
-			       phys_addr, pgprot)) {
+		vunmap(area->addr);
-		vunmap(addr);
 		return NULL;
 	}

arch/powerpc/include/asm/processor.h+0−3

  */
 #define ARCH_HAS_PREFETCH
 #define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
 static inline void prefetch(const void *x)
 {
 	__asm__ __volatile__ ("dcbtst 0,%0" : : "r" (x));
 }
-#define spin_lock_prefetch(x)	prefetchw(x)
 /* asm stubs */
 extern unsigned long isa300_idle_stop_noloss(unsigned long psscr_val);
 extern unsigned long isa300_idle_stop_mayloss(unsigned long psscr_val);

arch/powerpc/include/asm/word-at-a-time.h+1−1

@@ -34,7 +34,7 @@ static inline long find_zero(unsigned long mask) · 33 unmodified lines
34	return leading_zero_bits >> 3;	34	return leading_zero_bits >> 3;
35	}	35	}
36		36
37	static inline bool has_zero(unsigned long val, unsigned long data, const struct word_at_a_time c)	37	static inline unsigned long has_zero(unsigned long val, unsigned long data, const struct word_at_a_time c)
38	{	38	{
39	unsigned long rhs = val \| c->low_bits;	39	unsigned long rhs = val \| c->low_bits;
40	*data = rhs;	40	*data = rhs;

arch/powerpc/kernel/head_64.S+1−2

@@ -375,8 +375,7 @@ _GLOBAL(generic_secondary_smp_init) · 374 unmodified lines
375	beq 20f	375	beq 20f
376		376
377	/* start the specified thread */	377	/* start the specified thread */
378	LOAD_REG_ADDR(r5, fsl_secondary_thread_init)	378	LOAD_REG_ADDR(r5, DOTSYM(fsl_secondary_thread_init))
379	ld r4, 0(r5)
380	bl book3e_start_thread	379	bl book3e_start_thread
381		380
382	/* stop the current thread */	381	/* stop the current thread */

arch/powerpc/kernel/trace/ftrace_mprofile.S+7−2

  * and then arrange for the ftrace function to be called.
  */
 .macro	ftrace_regs_entry allregs
+	/* Create a minimal stack frame for representing B */
+	PPC_STLU	r1, -STACK_FRAME_MIN_SIZE(r1)
 	/* Create our stack frame + pt_regs */
 	PPC_STLU	r1,-SWITCH_FRAME_SIZE(r1)
 #ifdef CONFIG_PPC64
 	/* Save the original return address in A's stack frame */
-	std	r0, LRSAVE+SWITCH_FRAME_SIZE(r1)
+	std	r0, LRSAVE+SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE(r1)
 	/* Ok to continue? */
 	lbz	r3, PACA_FTRACE_ENABLED(r13)
 	cmpdi	r3, 0
 	mflr	r7
 	/* Save it as pt_regs->nip */
 	PPC_STL	r7, _NIP(r1)
+	/* Also save it in B's stackframe header for proper unwind */
+	PPC_STL	r7, LRSAVE+SWITCH_FRAME_SIZE(r1)
 	/* Save the read LR in pt_regs->link */
 	PPC_STL	r0, _LINK(r1)
 #endif
 	/* Pop our stack frame */
-	addi r1, r1, SWITCH_FRAME_SIZE
+	addi r1, r1, SWITCH_FRAME_SIZE+STACK_FRAME_MIN_SIZE
 #ifdef CONFIG_LIVEPATCH_64
         /* Based on the cmpd above, if the NIP was altered handle livepatch */

arch/powerpc/mm/init_64.c+1−2

@@ -314,8 +314,7 @@ void __ref vmemmap_free(unsigned long start, unsigned long end, · 313 unmodified lines
314	start = ALIGN_DOWN(start, page_size);	314	start = ALIGN_DOWN(start, page_size);
315	if (altmap) {	315	if (altmap) {
316	alt_start = altmap->base_pfn;	316	alt_start = altmap->base_pfn;
317	alt_end = altmap->base_pfn + altmap->reserve +	317	alt_end = altmap->base_pfn + altmap->reserve + altmap->free;
318	altmap->free + altmap->alloc + altmap->align;
319	}	318	}
320		319
321	pr_debug("vmemmap_free %lx...%lx\n", start, end);	320	pr_debug("vmemmap_free %lx...%lx\n", start, end);

arch/powerpc/platforms/85xx/smp.c+1−1

@@ -180,7 +180,7 @@ static void wake_hw_thread(void *info) · 179 unmodified lines
180	unsigned long inia;	180	unsigned long inia;
181	int cpu = (const int )info;	181	int cpu = (const int )info;
182		182
183	inia = (unsigned long )fsl_secondary_thread_init;	183	inia = ppc_function_entry(fsl_secondary_thread_init);
184	book3e_start_thread(cpu_thread_in_core(cpu), inia);	184	book3e_start_thread(cpu_thread_in_core(cpu), inia);
185	}	185	}
186	#endif	186	#endif

arch/powerpc/platforms/powermac/time.c+3−3

 #include <linux/rtc.h>
 #include <linux/of_address.h>
+#include <asm/early_ioremap.h>
 #include <asm/sections.h>
-#include <asm/io.h>
 #include <asm/machdep.h>
 #include <asm/time.h>
 #include <asm/nvram.h>
 		return 0;
 	}
 	of_node_put(vias);
-	via = ioremap(rsrc.start, resource_size(&rsrc));
+	via = early_ioremap(rsrc.start, resource_size(&rsrc));
 	if (via == NULL) {
 		printk(KERN_ERR "Failed to map VIA for timer calibration !\n");
 		return 0;
 	ppc_tb_freq = (dstart - dend) * 100 / 6;
-	iounmap(via);
+	early_iounmap((void *)via, resource_size(&rsrc));
 	return 1;
 }

arch/riscv/include/asm/acpi.h+1−1

@@ -19,7 +19,7 @@ typedef u64 phys_cpuid_t; · 18 unmodified lines
19	#define PHYS_CPUID_INVALID INVALID_HARTID	19	#define PHYS_CPUID_INVALID INVALID_HARTID
20		20
21	/* ACPI table mapping after acpi_permanent_mmap is set */	21	/* ACPI table mapping after acpi_permanent_mmap is set */
22	void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);	22	void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
23	#define acpi_os_ioremap acpi_os_ioremap	23	#define acpi_os_ioremap acpi_os_ioremap
24		24
25	#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */	25	#define acpi_strict 1 /* No out-of-spec workarounds on RISC-V */

arch/riscv/include/asm/cacheflush.h+4−0

@@ -37,6 +37,10 @@ static inline void flush_dcache_page(struct page *page) · 36 unmodified lines
37	#define flush_icache_user_page(vma, pg, addr, len) \	37	#define flush_icache_user_page(vma, pg, addr, len) \
38	flush_icache_mm(vma->vm_mm, 0)	38	flush_icache_mm(vma->vm_mm, 0)
39		39
		40	#ifdef CONFIG_64BIT
		41	#define flush_cache_vmap(start, end) flush_tlb_kernel_range(start, end)
		42	#endif
		43
40	#ifndef CONFIG_SMP	44	#ifndef CONFIG_SMP
41		45
42	#define flush_icache_all() local_flush_icache_all()	46	#define flush_icache_all() local_flush_icache_all()

arch/riscv/include/asm/mmio.h+8−8

arch/riscv/include/asm/pgtable.h+2−0

@@ -188,6 +188,8 @@ extern struct pt_alloc_ops pt_ops __initdata; · 187 unmodified lines
188	#define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP)	188	#define PAGE_KERNEL_IO __pgprot(_PAGE_IOREMAP)
189		189
190	extern pgd_t swapper_pg_dir[];	190	extern pgd_t swapper_pg_dir[];
		191	extern pgd_t trampoline_pg_dir[];
		192	extern pgd_t early_pg_dir[];
191		193
192	#ifdef CONFIG_TRANSPARENT_HUGEPAGE	194	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
193	static inline int pmd_present(pmd_t pmd)	195	static inline int pmd_present(pmd_t pmd)

arch/riscv/include/asm/vmalloc.h+3−1

 #ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+extern bool pgtable_l4_enabled, pgtable_l5_enabled;
 #define IOREMAP_MAX_ORDER (PUD_SHIFT)
 #define arch_vmap_pud_supported arch_vmap_pud_supported
 static inline bool arch_vmap_pud_supported(pgprot_t prot)
 {
-	return true;
+	return pgtable_l4_enabled || pgtable_l5_enabled;
 }
 #define arch_vmap_pmd_supported arch_vmap_pmd_supported

arch/riscv/kernel/acpi.c+2−2

@@ -215,9 +215,9 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size) · 214 unmodified lines
215	early_iounmap(map, size);	215	early_iounmap(map, size);
216	}	216	}
217		217
218	void *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)	218	void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
219	{	219	{
220	return memremap(phys, size, MEMREMAP_WB);	220	return (void __iomem *)memremap(phys, size, MEMREMAP_WB);
221	}	221	}
222		222
223	#ifdef CONFIG_PCI	223	#ifdef CONFIG_PCI

arch/riscv/kernel/cpu.c+5−0

 #include <asm/smp.h>
 #include <asm/pgtable.h>
+bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
+{
+	return phys_id == cpuid_to_hartid_map(cpu);
+}
 /*
  * Returns the hart ID of the given device tree node, or -ENODEV if the node
  * isn't an enabled and valid RISC-V hart node.

arch/riscv/kernel/crash_core.c+2−0

@@ -18,4 +18,6 @@ void arch_crash_save_vmcoreinfo(void) · 17 unmodified lines
18	vmcoreinfo_append_str("NUMBER(MODULES_END)=0x%lx\n", MODULES_END);	18	vmcoreinfo_append_str("NUMBER(MODULES_END)=0x%lx\n", MODULES_END);
19	#endif	19	#endif
20	vmcoreinfo_append_str("NUMBER(KERNEL_LINK_ADDR)=0x%lx\n", KERNEL_LINK_ADDR);	20	vmcoreinfo_append_str("NUMBER(KERNEL_LINK_ADDR)=0x%lx\n", KERNEL_LINK_ADDR);
		21	vmcoreinfo_append_str("NUMBER(va_kernel_pa_offset)=0x%lx\n",
		22	kernel_map.va_kernel_pa_offset);
21	}	23	}

arch/riscv/kernel/elf_kexec.c+2−1

 		kbuf.buffer = initrd;
 		kbuf.bufsz = kbuf.memsz = initrd_len;
 		kbuf.buf_align = PAGE_SIZE;
-		kbuf.top_down = false;
+		kbuf.top_down = true;
 		kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;
 		ret = kexec_add_buffer(&kbuf);
 		if (ret)
 		 * sym, instead of searching the whole relsec.
 		 */
 		case R_RISCV_PCREL_HI20:
+		case R_RISCV_CALL_PLT:
 		case R_RISCV_CALL:
 			*(u64 *)loc = CLEAN_IMM(UITYPE, *(u64 *)loc) |
 				 ENCODE_UJTYPE_IMM(val - addr);

arch/riscv/kernel/smp.c+0−5

 	return -ENOENT;
 }
-bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
-{
-	return phys_id == cpuid_to_hartid_map(cpu);
-}
 static void ipi_stop(void)
 {
 	set_cpu_online(smp_processor_id(), false);

arch/riscv/mm/init.c+11−5

 #include <linux/kfence.h>
 #include <asm/fixmap.h>
-#include <asm/tlbflush.h>
-#include <asm/sections.h>
-#include <asm/soc.h>
 #include <asm/io.h>
-#include <asm/ptdump.h>
 #include <asm/numa.h>
+#include <asm/pgtable.h>
+#include <asm/ptdump.h>
+#include <asm/sections.h>
+#include <asm/soc.h>
+#include <asm/tlbflush.h>
 #include "../kernel/head.h"
 	memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
 	phys_ram_end = memblock_end_of_DRAM();
+	/*
+	 * Make sure we align the start of the memory on a PMD boundary so that
+	 * at worst, we map the linear mapping with PMD mappings.
+	 */
 	if (!IS_ENABLED(CONFIG_XIP_KERNEL))
-		phys_ram_base = memblock_start_of_DRAM();
+		phys_ram_base = memblock_start_of_DRAM() & PMD_MASK;
 	/*
 	 * In 64-bit, any use of __va/__pa before this point is wrong as we

arch/riscv/mm/kasan_init.c+0−1

@@ -22,7 +22,6 @@ · 21 unmodified lines
22	* region is not and then we have to go down to the PUD level.	22	* region is not and then we have to go down to the PUD level.
23	*/	23	*/
24		24
25	extern pgd_t early_pg_dir[PTRS_PER_PGD];
26	pgd_t tmp_pg_dir[PTRS_PER_PGD] __page_aligned_bss;	25	pgd_t tmp_pg_dir[PTRS_PER_PGD] __page_aligned_bss;
27	p4d_t tmp_p4d[PTRS_PER_P4D] __page_aligned_bss;	26	p4d_t tmp_p4d[PTRS_PER_P4D] __page_aligned_bss;
28	pud_t tmp_pud[PTRS_PER_PUD] __page_aligned_bss;	27	pud_t tmp_pud[PTRS_PER_PUD] __page_aligned_bss;

arch/s390/configs/debug_defconfig+6−5

 CONFIG_UNIX_DIAG=m
 CONFIG_XFRM_USER=m
 CONFIG_NET_KEY=m
-CONFIG_NET_TC_SKB_EXT=y
 CONFIG_SMC=m
 CONFIG_SMC_DIAG=m
 CONFIG_INET=y
 CONFIG_NFT_COMPAT=m
 CONFIG_NFT_HASH=m
 CONFIG_NFT_FIB_INET=m
+CONFIG_NETFILTER_XTABLES_COMPAT=y
 CONFIG_NETFILTER_XT_SET=m
 CONFIG_NETFILTER_XT_TARGET_AUDIT=m
 CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
 CONFIG_NET_ACT_SKBEDIT=m
 CONFIG_NET_ACT_CSUM=m
 CONFIG_NET_ACT_GATE=m
+CONFIG_NET_TC_SKB_EXT=y
 CONFIG_DNS_RESOLVER=y
 CONFIG_OPENVSWITCH=m
 CONFIG_VSOCKETS=m
 CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_SAFE=y
+# CONFIG_FW_LOADER is not set
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_WANGXUN is not set
 # CONFIG_NET_VENDOR_LITEX is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 # CONFIG_NET_VENDOR_TI is not set
 # CONFIG_NET_VENDOR_VERTEXCOM is not set
 # CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WANGXUN is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_NET_VENDOR_XILINX is not set
 CONFIG_PPP=m
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_TMPFS_INODE64=y
 CONFIG_HUGETLBFS=y
-CONFIG_CONFIGFS_FS=m
 CONFIG_ECRYPT_FS=m
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 CONFIG_FORTIFY_SOURCE=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_BOOTPARAM=y
-CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_LOCKDOWN_LSM=y
 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y
 CONFIG_SECURITY_LANDLOCK=y
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_RMD160=m
-CONFIG_CRYPTO_SHA3=m
 CONFIG_CRYPTO_SM3_GENERIC=m
 CONFIG_CRYPTO_VMAC=m
 CONFIG_CRYPTO_WP512=m
 CONFIG_SCHED_TRACER=y
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_USER_EVENTS=y
 CONFIG_HIST_TRIGGERS=y
 CONFIG_FTRACE_STARTUP_TEST=y
 # CONFIG_EVENT_TRACE_STARTUP_TEST is not set
 CONFIG_FAIL_IO_TIMEOUT=y
 CONFIG_FAIL_FUTEX=y
 CONFIG_FAULT_INJECTION_DEBUG_FS=y
+CONFIG_FAULT_INJECTION_CONFIGFS=y
 CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
 CONFIG_LKDTM=m
 CONFIG_TEST_MIN_HEAP=y

arch/s390/configs/defconfig+5−4

 CONFIG_UNIX_DIAG=m
 CONFIG_XFRM_USER=m
 CONFIG_NET_KEY=m
-CONFIG_NET_TC_SKB_EXT=y
 CONFIG_SMC=m
 CONFIG_SMC_DIAG=m
 CONFIG_INET=y
 CONFIG_NFT_COMPAT=m
 CONFIG_NFT_HASH=m
 CONFIG_NFT_FIB_INET=m
+CONFIG_NETFILTER_XTABLES_COMPAT=y
 CONFIG_NETFILTER_XT_SET=m
 CONFIG_NETFILTER_XT_TARGET_AUDIT=m
 CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
 CONFIG_NET_ACT_SKBEDIT=m
 CONFIG_NET_ACT_CSUM=m
 CONFIG_NET_ACT_GATE=m
+CONFIG_NET_TC_SKB_EXT=y
 CONFIG_DNS_RESOLVER=y
 CONFIG_OPENVSWITCH=m
 CONFIG_VSOCKETS=m
 CONFIG_UEVENT_HELPER=y
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_SAFE=y
+# CONFIG_FW_LOADER is not set
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
-# CONFIG_NET_VENDOR_WANGXUN is not set
 # CONFIG_NET_VENDOR_LITEX is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 # CONFIG_NET_VENDOR_TI is not set
 # CONFIG_NET_VENDOR_VERTEXCOM is not set
 # CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WANGXUN is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_NET_VENDOR_XILINX is not set
 CONFIG_PPP=m
 CONFIG_SECURITY_NETWORK=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_BOOTPARAM=y
-CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_SECURITY_LOCKDOWN_LSM=y
 CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y
 CONFIG_SECURITY_LANDLOCK=y
 CONFIG_CRYPTO_MD5=y
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_RMD160=m
-CONFIG_CRYPTO_SHA3=m
 CONFIG_CRYPTO_SM3_GENERIC=m
 CONFIG_CRYPTO_VMAC=m
 CONFIG_CRYPTO_WP512=m
 CONFIG_SCHED_TRACER=y
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_USER_EVENTS=y
 CONFIG_HIST_TRIGGERS=y
 CONFIG_SAMPLES=y
 CONFIG_SAMPLE_TRACE_PRINTK=m

arch/s390/configs/zfcpdump_defconfig+0−1

@@ -53,7 +53,6 @@ CONFIG_ZFCP=y · 52 unmodified lines
53	# CONFIG_HVC_IUCV is not set	53	# CONFIG_HVC_IUCV is not set
54	# CONFIG_HW_RANDOM_S390 is not set	54	# CONFIG_HW_RANDOM_S390 is not set
55	# CONFIG_HMC_DRV is not set	55	# CONFIG_HMC_DRV is not set
56	# CONFIG_S390_UV_UAPI is not set
57	# CONFIG_S390_TAPE is not set	56	# CONFIG_S390_TAPE is not set
58	# CONFIG_VMCP is not set	57	# CONFIG_VMCP is not set
59	# CONFIG_MONWRITER is not set	58	# CONFIG_MONWRITER is not set

arch/s390/include/uapi/asm/ptrace.h+2−0

@@ -8,6 +8,8 @@ · 7 unmodified lines
8	#ifndef _UAPI_S390_PTRACE_H	8	#ifndef _UAPI_S390_PTRACE_H
9	#define _UAPI_S390_PTRACE_H	9	#define _UAPI_S390_PTRACE_H
10		10
		11	#include <linux/const.h>
		12
11	/*	13	/*
12	* Offsets in the user_regs_struct. They are used for the ptrace	14	* Offsets in the user_regs_struct. They are used for the ptrace
13	* system call and in entry.S	15	* system call and in entry.S

arch/s390/kernel/sthyi.c+3−3

@@ -459,9 +459,9 @@ static int sthyi_update_cache(u64 *rc) · 458 unmodified lines
459	*	459	*
460	* Fills the destination with system information returned by the STHYI	460	* Fills the destination with system information returned by the STHYI
461	* instruction. The data is generated by emulation or execution of STHYI,	461	* instruction. The data is generated by emulation or execution of STHYI,
462	* if available. The return value is the condition code that would be	462	* if available. The return value is either a negative error value or
463	* returned, the rc parameter is the return code which is passed in	463	* the condition code that would be returned, the rc parameter is the
464	* register R2 + 1.	464	* return code which is passed in register R2 + 1.
465	*/	465	*/
466	int sthyi_fill(void dst, u64 rc)	466	int sthyi_fill(void dst, u64 rc)
467	{	467	{

arch/s390/kvm/intercept.c+6−3

@@ -389,8 +389,8 @@ static int handle_partial_execution(struct kvm_vcpu *vcpu) · 388 unmodified lines
389	*/	389	*/
390	int handle_sthyi(struct kvm_vcpu *vcpu)	390	int handle_sthyi(struct kvm_vcpu *vcpu)
391	{	391	{
392	int reg1, reg2, r = 0;	392	int reg1, reg2, cc = 0, r = 0;
393	u64 code, addr, cc = 0, rc = 0;	393	u64 code, addr, rc = 0;
394	struct sthyi_sctns *sctns = NULL;	394	struct sthyi_sctns *sctns = NULL;
395		395
396	if (!test_kvm_facility(vcpu->kvm, 74))	396	if (!test_kvm_facility(vcpu->kvm, 74))
@@ -421,7 +421,10 @@ int handle_sthyi(struct kvm_vcpu *vcpu) · 24 unmodified lines
421	return -ENOMEM;	421	return -ENOMEM;
422		422
423	cc = sthyi_fill(sctns, &rc);	423	cc = sthyi_fill(sctns, &rc);
424		424	if (cc < 0) {
		425	free_page((unsigned long)sctns);
		426	return cc;
		427	}
425	out:	428	out:
426	if (!cc) {	429	if (!cc) {
427	if (kvm_s390_pv_cpu_is_protected(vcpu)) {	430	if (kvm_s390_pv_cpu_is_protected(vcpu)) {

arch/s390/mm/vmem.c+2−0

@@ -763,6 +763,8 @@ void __init vmem_map_init(void) · 762 unmodified lines
763	if (static_key_enabled(&cpu_has_bear))	763	if (static_key_enabled(&cpu_has_bear))
764	set_memory_nx(0, 1);	764	set_memory_nx(0, 1);
765	set_memory_nx(PAGE_SIZE, 1);	765	set_memory_nx(PAGE_SIZE, 1);
		766	if (debug_pagealloc_enabled())
		767	set_memory_4k(0, ident_map_size >> PAGE_SHIFT);
766		768
767	pr_info("Write protected kernel read-only data: %luk\n",	769	pr_info("Write protected kernel read-only data: %luk\n",
768	(unsigned long)(__end_rodata - _stext) >> 10);	770	(unsigned long)(__end_rodata - _stext) >> 10);

arch/sparc/include/asm/processor_64.h+0−3

  */
 #define ARCH_HAS_PREFETCH
 #define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
 static inline void prefetch(const void *x)
 {
 			     : "r" (x));
 }
-#define spin_lock_prefetch(x)	prefetchw(x)
 #define HAVE_ARCH_PICK_MMAP_LAYOUT
 int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap);

arch/x86/Kconfig+26−0

@@ -2593,6 +2593,13 @@ config CPU_IBRS_ENTRY · 2592 unmodified lines
2593	This mitigates both spectre_v2 and retbleed at great cost to	2593	This mitigates both spectre_v2 and retbleed at great cost to
2594	performance.	2594	performance.
2595		2595
		2596	config CPU_SRSO
		2597	bool "Mitigate speculative RAS overflow on AMD"
		2598	depends on CPU_SUP_AMD && X86_64 && RETHUNK
		2599	default y
		2600	help
		2601	Enable the SRSO mitigation needed on AMD Zen1-4 machines.
		2602
2596	config SLS	2603	config SLS
2597	bool "Mitigate Straight-Line-Speculation"	2604	bool "Mitigate Straight-Line-Speculation"
2598	depends on CC_HAS_SLS && X86_64	2605	depends on CC_HAS_SLS && X86_64
@@ -2603,6 +2610,25 @@ config SLS · 4 unmodified lines
2603	against straight line speculation. The kernel image might be slightly	2610	against straight line speculation. The kernel image might be slightly
2604	larger.	2611	larger.
2605		2612
		2613	config GDS_FORCE_MITIGATION
		2614	bool "Force GDS Mitigation"
		2615	depends on CPU_SUP_INTEL
		2616	default n
		2617	help
		2618	Gather Data Sampling (GDS) is a hardware vulnerability which allows
		2619	unprivileged speculative access to data which was previously stored in
		2620	vector registers.
		2621
		2622	This option is equivalent to setting gather_data_sampling=force on the
		2623	command line. The microcode mitigation is used if present, otherwise
		2624	AVX is disabled as a mitigation. On affected systems that are missing
		2625	the microcode any userspace code that unconditionally uses AVX will
		2626	break with this option set.
		2627
		2628	Setting this option on systems not vulnerable to GDS has no effect.
		2629
		2630	If in doubt, say N.
		2631
2606	endif	2632	endif
2607		2633
2608	config ARCH_HAS_ADD_PAGES	2634	config ARCH_HAS_ADD_PAGES

arch/x86/boot/compressed/idt_64.c+8−1

 	set_idt_entry(X86_TRAP_PF, boot_page_fault);
 #ifdef CONFIG_AMD_MEM_ENCRYPT
-	set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
+	/*
+	 * Clear the second stage #VC handler in case guest types
+	 * needing #VC have not been detected.
+	 */
+	if (sev_status & BIT(1))
+		set_idt_entry(X86_TRAP_VC, boot_stage2_vc);
+	else
+		set_idt_entry(X86_TRAP_VC, NULL);
 #endif
 	load_boot_idt(&boot_idt_desc);

arch/x86/boot/compressed/sev.c+35−2

@@ -404,13 +404,46 @@ void sev_enable(struct boot_params *bp) · 403 unmodified lines
404	if (bp)	404	if (bp)
405	bp->cc_blob_address = 0;	405	bp->cc_blob_address = 0;
406		406
		407	/*
		408	* Do an initial SEV capability check before snp_init() which
		409	* loads the CPUID page and the same checks afterwards are done
		410	* without the hypervisor and are trustworthy.
		411	*
		412	* If the HV fakes SEV support, the guest will crash'n'burn
		413	* which is good enough.
		414	*/
		415
		416	/* Check for the SME/SEV support leaf */
		417	eax = 0x80000000;
		418	ecx = 0;
		419	native_cpuid(&eax, &ebx, &ecx, &edx);
		420	if (eax < 0x8000001f)
		421	return;
		422
		423	/*
		424	* Check for the SME/SEV feature:
		425	* CPUID Fn8000_001F[EAX]
		426	* - Bit 0 - Secure Memory Encryption support
		427	* - Bit 1 - Secure Encrypted Virtualization support
		428	* CPUID Fn8000_001F[EBX]
		429	* - Bits 5:0 - Pagetable bit position used to indicate encryption
		430	*/
		431	eax = 0x8000001f;
		432	ecx = 0;
		433	native_cpuid(&eax, &ebx, &ecx, &edx);
		434	/* Check whether SEV is supported */
		435	if (!(eax & BIT(1)))
		436	return;
		437
407	/*	438	/*
408	* Setup/preliminary detection of SNP. This will be sanity-checked	439	* Setup/preliminary detection of SNP. This will be sanity-checked
409	* against CPUID/MSR values later.	440	* against CPUID/MSR values later.
410	*/	441	*/
411	snp = snp_init(bp);	442	snp = snp_init(bp);
412		443
413	/* Check for the SME/SEV support leaf */	444	/* Now repeat the checks with the SNP CPUID table. */
		445
		446	/* Recheck the SME/SEV support leaf */
414	eax = 0x80000000;	447	eax = 0x80000000;
415	ecx = 0;	448	ecx = 0;
416	native_cpuid(&eax, &ebx, &ecx, &edx);	449	native_cpuid(&eax, &ebx, &ecx, &edx);
@@ -418,7 +451,7 @@ void sev_enable(struct boot_params *bp) · 1 unmodified line
418	return;	451	return;
419		452
420	/*	453	/*
421	* Check for the SME/SEV feature:	454	* Recheck for the SME/SEV feature:
422	* CPUID Fn8000_001F[EAX]	455	* CPUID Fn8000_001F[EAX]
423	* - Bit 0 - Secure Memory Encryption support	456	* - Bit 0 - Secure Memory Encryption support
424	* - Bit 1 - Secure Encrypted Virtualization support	457	* - Bit 1 - Secure Encrypted Virtualization support

arch/x86/entry/vdso/vma.c+2−2

@@ -299,8 +299,8 @@ static unsigned long vdso_addr(unsigned long start, unsigned len) · 298 unmodified lines
299		299
300	/* Round the lowest possible end address up to a PMD boundary. */	300	/* Round the lowest possible end address up to a PMD boundary. */
301	end = (start + len + PMD_SIZE - 1) & PMD_MASK;	301	end = (start + len + PMD_SIZE - 1) & PMD_MASK;
302	if (end >= TASK_SIZE_MAX)	302	if (end >= DEFAULT_MAP_WINDOW)
303	end = TASK_SIZE_MAX;	303	end = DEFAULT_MAP_WINDOW;
304	end -= len;	304	end -= len;
305		305
306	if (end > start) {	306	if (end > start) {

arch/x86/hyperv/hv_apic.c+1−3

 static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector,
 		bool exclude_self)
 {
-	struct hv_send_ipi_ex **arg;
 	struct hv_send_ipi_ex *ipi_arg;
 	unsigned long flags;
 	int nr_bank = 0;
 		return false;
 	local_irq_save(flags);
-	arg = (struct hv_send_ipi_ex **)this_cpu_ptr(hyperv_pcpu_input_arg);
+	ipi_arg = *this_cpu_ptr(hyperv_pcpu_input_arg);
-	ipi_arg = *arg;
 	if (unlikely(!ipi_arg))
 		goto ipi_mask_ex_done;

arch/x86/hyperv/hv_init.c+21−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	#include <asm/apic.h>	14	#include <asm/apic.h>
15	#include <asm/desc.h>	15	#include <asm/desc.h>
16	#include <asm/sev.h>	16	#include <asm/sev.h>
		17	#include <asm/ibt.h>
17	#include <asm/hypervisor.h>	18	#include <asm/hypervisor.h>
18	#include <asm/hyperv-tlfs.h>	19	#include <asm/hyperv-tlfs.h>
19	#include <asm/mshyperv.h>	20	#include <asm/mshyperv.h>
@@ -471,6 +472,26 @@ void __init hyperv_init(void) · 451 unmodified lines
471	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);	472	wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
472	}	473	}
473		474
		475	/*
		476	* Some versions of Hyper-V that provide IBT in guest VMs have a bug
		477	* in that there's no ENDBR64 instruction at the entry to the
		478	* hypercall page. Because hypercalls are invoked via an indirect call
		479	* to the hypercall page, all hypercall attempts fail when IBT is
		480	* enabled, and Linux panics. For such buggy versions, disable IBT.
		481	*
		482	* Fixed versions of Hyper-V always provide ENDBR64 on the hypercall
		483	* page, so if future Linux kernel versions enable IBT for 32-bit
		484	* builds, additional hypercall page hackery will be required here
		485	* to provide an ENDBR32.
		486	*/
		487	#ifdef CONFIG_X86_KERNEL_IBT
		488	if (cpu_feature_enabled(X86_FEATURE_IBT) &&
		489	(u32 )hv_hypercall_pg != gen_endbr()) {
		490	setup_clear_cpu_cap(X86_FEATURE_IBT);
		491	pr_warn("Hyper-V: Disabling IBT because of Hyper-V bug\n");
		492	}
		493	#endif
		494
474	/*	495	/*
475	* hyperv_init() is called before LAPIC is initialized: see	496	* hyperv_init() is called before LAPIC is initialized: see
476	* apic_intr_mode_init() -> x86_platform.apic_post_init() and	497	* apic_intr_mode_init() -> x86_platform.apic_post_init() and

arch/x86/hyperv/hv_vtl.c+4−0

 	x86_init.irqs.pre_vector_init = x86_init_noop;
 	x86_init.timers.timer_init = x86_init_noop;
+	/* Avoid searching for BIOS MP tables */
+	x86_init.mpparse.find_smp_config = x86_init_noop;
+	x86_init.mpparse.get_smp_config = x86_init_uint_noop;
 	x86_platform.get_wallclock = get_rtc_noop;
 	x86_platform.set_wallclock = set_rtc_noop;
 	x86_platform.get_nmi_reason = hv_get_nmi_reason;

arch/x86/hyperv/ivm.c+3−4

@@ -247,7 +247,7 @@ EXPORT_SYMBOL_GPL(hv_ghcb_msr_read); · 246 unmodified lines
247	static int hv_mark_gpa_visibility(u16 count, const u64 pfn[],	247	static int hv_mark_gpa_visibility(u16 count, const u64 pfn[],
248	enum hv_mem_host_visibility visibility)	248	enum hv_mem_host_visibility visibility)
249	{	249	{
250	struct hv_gpa_range_for_visibility *input_pcpu, input;	250	struct hv_gpa_range_for_visibility *input;
251	u16 pages_processed;	251	u16 pages_processed;
252	u64 hv_status;	252	u64 hv_status;
253	unsigned long flags;	253	unsigned long flags;
@@ -263,9 +263,8 @@ static int hv_mark_gpa_visibility(u16 count, const u64 pfn[], · 9 unmodified lines
263	}	263	}
264		264
265	local_irq_save(flags);	265	local_irq_save(flags);
266	input_pcpu = (struct hv_gpa_range_for_visibility **)	266	input = *this_cpu_ptr(hyperv_pcpu_input_arg);
267	this_cpu_ptr(hyperv_pcpu_input_arg);	267
268	input = *input_pcpu;
269	if (unlikely(!input)) {	268	if (unlikely(!input)) {
270	local_irq_restore(flags);	269	local_irq_restore(flags);
271	return -EINVAL;	270	return -EINVAL;

arch/x86/hyperv/mmu.c+2−10

 				   const struct flush_tlb_info *info)
 {
 	int cpu, vcpu, gva_n, max_gvas;
-	struct hv_tlb_flush **flush_pcpu;
 	struct hv_tlb_flush *flush;
 	u64 status;
 	unsigned long flags;
 	local_irq_save(flags);
-	flush_pcpu = (struct hv_tlb_flush **)
+	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
-		     this_cpu_ptr(hyperv_pcpu_input_arg);
-	flush = *flush_pcpu;
 	if (unlikely(!flush)) {
 		local_irq_restore(flags);
 				      const struct flush_tlb_info *info)
 {
 	int nr_bank = 0, max_gvas, gva_n;
-	struct hv_tlb_flush_ex **flush_pcpu;
 	struct hv_tlb_flush_ex *flush;
 	u64 status;
 	if (!(ms_hyperv.hints & HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED))
 		return HV_STATUS_INVALID_PARAMETER;
-	flush_pcpu = (struct hv_tlb_flush_ex **)
+	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
-		     this_cpu_ptr(hyperv_pcpu_input_arg);
-	flush = *flush_pcpu;
 	if (info->mm) {
 		/*

arch/x86/hyperv/nested.c+2−9

 int hyperv_flush_guest_mapping(u64 as)
 {
-	struct hv_guest_mapping_flush **flush_pcpu;
 	struct hv_guest_mapping_flush *flush;
 	u64 status;
 	unsigned long flags;
 	local_irq_save(flags);
-	flush_pcpu = (struct hv_guest_mapping_flush **)
+	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
-		this_cpu_ptr(hyperv_pcpu_input_arg);
-	flush = *flush_pcpu;
 	if (unlikely(!flush)) {
 		local_irq_restore(flags);
 int hyperv_flush_guest_mapping_range(u64 as,
 		hyperv_fill_flush_list_func fill_flush_list_func, void *data)
 {
-	struct hv_guest_mapping_flush_list **flush_pcpu;
 	struct hv_guest_mapping_flush_list *flush;
 	u64 status;
 	unsigned long flags;
 	local_irq_save(flags);
-	flush_pcpu = (struct hv_guest_mapping_flush_list **)
+	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
-		this_cpu_ptr(hyperv_pcpu_input_arg);
-	flush = *flush_pcpu;
 	if (unlikely(!flush)) {
 		local_irq_restore(flags);
 		goto fault;

arch/x86/include/asm/acpi.h+2−0

 #include <asm/mpspec.h>
 #include <asm/x86_init.h>
 #include <asm/cpufeature.h>
+#include <asm/irq_vectors.h>
 #ifdef CONFIG_ACPI_APEI
 # include <asm/pgtable_types.h>
 extern int acpi_use_timer_override;
 extern int acpi_fix_pin2_polarity;
 extern int acpi_disable_cmcff;
+extern bool acpi_int_src_ovr[NR_IRQS_LEGACY];
 extern u8 acpi_sci_flags;
 extern u32 acpi_sci_override_gsi;

arch/x86/include/asm/cpufeatures.h+13−1

  * Defines x86 CPU feature bits
  */
 #define NCAPINTS			21	   /* N 32-bit words worth of info */
-#define NBUGINTS			1	   /* N 32-bit bug flags */
+#define NBUGINTS			2	   /* N 32-bit bug flags */
 /*
  * Note: If the comment begins with a quoted string, that string is used
 #define X86_FEATURE_SMBA		(11*32+21) /* "" Slow Memory Bandwidth Allocation */
 #define X86_FEATURE_BMEC		(11*32+22) /* "" Bandwidth Monitoring Event Configuration */
+#define X86_FEATURE_SRSO		(11*32+24) /* "" AMD BTB untrain RETs */
+#define X86_FEATURE_SRSO_ALIAS		(11*32+25) /* "" AMD BTB untrain RETs through aliasing */
+#define X86_FEATURE_IBPB_ON_VMEXIT	(11*32+26) /* "" Issue an IBPB only on VMEXIT */
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
 #define X86_FEATURE_AUTOIBRS		(20*32+ 8) /* "" Automatic IBRS */
 #define X86_FEATURE_NO_SMM_CTL_MSR	(20*32+ 9) /* "" SMM_CTL MSR is not present */
+#define X86_FEATURE_SBPB		(20*32+27) /* "" Selective Branch Prediction Barrier */
+#define X86_FEATURE_IBPB_BRTYPE		(20*32+28) /* "" MSR_PRED_CMD[IBPB] flushes all branch type predictions */
+#define X86_FEATURE_SRSO_NO		(20*32+29) /* "" CPU is not affected by SRSO */
 /*
  * BUG word(s)
  */
 #define X86_BUG_RETBLEED		X86_BUG(27) /* CPU is affected by RETBleed */
 #define X86_BUG_EIBRS_PBRSB		X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */
 #define X86_BUG_SMT_RSB			X86_BUG(29) /* CPU is vulnerable to Cross-Thread Return Address Predictions */
+#define X86_BUG_GDS			X86_BUG(30) /* CPU is affected by Gather Data Sampling */
+/* BUG word 2 */
+#define X86_BUG_SRSO			X86_BUG(1*32 + 0) /* AMD SRSO bug */
+#define X86_BUG_DIV0			X86_BUG(1*32 + 1) /* AMD DIV0 speculation bug */
 #endif /* _ASM_X86_CPUFEATURES_H */

arch/x86/include/asm/linkage.h+1−1

@@ -21,7 +21,7 @@ · 20 unmodified lines
21	#define FUNCTION_PADDING	21	#define FUNCTION_PADDING
22	#endif	22	#endif
23		23
24	#if (CONFIG_FUNCTION_ALIGNMENT > 8) && !defined(__DISABLE_EXPORTS) && !defined(BULID_VDSO)	24	#if (CONFIG_FUNCTION_ALIGNMENT > 8) && !defined(__DISABLE_EXPORTS) && !defined(BUILD_VDSO)
25	# define __FUNC_ALIGN __ALIGN; FUNCTION_PADDING	25	# define __FUNC_ALIGN __ALIGN; FUNCTION_PADDING
26	#else	26	#else
27	# define __FUNC_ALIGN __ALIGN	27	# define __FUNC_ALIGN __ALIGN

arch/x86/include/asm/mshyperv.h+1−1

@@ -5,7 +5,7 @@ · 4 unmodified lines
5	#include <linux/types.h>	5	#include <linux/types.h>
6	#include <linux/nmi.h>	6	#include <linux/nmi.h>
7	#include <linux/msi.h>	7	#include <linux/msi.h>
8	#include <asm/io.h>	8	#include <linux/io.h>
9	#include <asm/hyperv-tlfs.h>	9	#include <asm/hyperv-tlfs.h>
10	#include <asm/nospec-branch.h>	10	#include <asm/nospec-branch.h>
11	#include <asm/paravirt.h>	11	#include <asm/paravirt.h>

arch/x86/include/asm/msr-index.h+12−0

 #define MSR_IA32_PRED_CMD		0x00000049 /* Prediction Command */
 #define PRED_CMD_IBPB			BIT(0)	   /* Indirect Branch Prediction Barrier */
+#define PRED_CMD_SBPB			BIT(7)	   /* Selective Branch Prediction Barrier */
 #define MSR_PPIN_CTL			0x0000004e
 #define MSR_PPIN			0x0000004f
 						 * Not susceptible to Post-Barrier
 						 * Return Stack Buffer Predictions.
 						 */
+#define ARCH_CAP_GDS_CTRL		BIT(25)	/*
+						 * CPU is vulnerable to Gather
+						 * Data Sampling (GDS) and
+						 * has controls for mitigation.
+						 */
+#define ARCH_CAP_GDS_NO			BIT(26)	/*
+						 * CPU is not vulnerable to Gather
+						 * Data Sampling (GDS).
+						 */
 #define ARCH_CAP_XAPIC_DISABLE		BIT(21)	/*
 						 * IA32_XAPIC_DISABLE_STATUS MSR
 #define RNGDS_MITG_DIS			BIT(0)	/* SRBDS support */
 #define RTM_ALLOW			BIT(1)	/* TSX development mode */
 #define FB_CLEAR_DIS			BIT(3)	/* CPU Fill buffer clear disable */
+#define GDS_MITG_DIS			BIT(4)	/* Disable GDS mitigation */
+#define GDS_MITG_LOCKED			BIT(5)	/* GDS mitigation locked */
 #define MSR_IA32_SYSENTER_CS		0x00000174
 #define MSR_IA32_SYSENTER_ESP		0x00000175

arch/x86/include/asm/nospec-branch.h+18−5

  * eventually turn into it's own annotation.
  */
 .macro VALIDATE_UNRET_END
-#if defined(CONFIG_NOINSTR_VALIDATION) && defined(CONFIG_CPU_UNRET_ENTRY)
+#if defined(CONFIG_NOINSTR_VALIDATION) && \
+	(defined(CONFIG_CPU_UNRET_ENTRY) || defined(CONFIG_CPU_SRSO))
 	ANNOTATE_RETPOLINE_SAFE
 	nop
 #endif
  */
 .macro UNTRAIN_RET
 #if defined(CONFIG_CPU_UNRET_ENTRY) || defined(CONFIG_CPU_IBPB_ENTRY) || \
-	defined(CONFIG_CALL_DEPTH_TRACKING)
+	defined(CONFIG_CALL_DEPTH_TRACKING) || defined(CONFIG_CPU_SRSO)
 	VALIDATE_UNRET_END
 	ALTERNATIVE_3 "",						\
 		      CALL_ZEN_UNTRAIN_RET, X86_FEATURE_UNRET,		\
 		      "call entry_ibpb", X86_FEATURE_ENTRY_IBPB,	\
 		      __stringify(RESET_CALL_DEPTH), X86_FEATURE_CALL_DEPTH
 #endif
+#ifdef CONFIG_CPU_SRSO
+	ALTERNATIVE_2 "", "call srso_untrain_ret", X86_FEATURE_SRSO, \
+			  "call srso_untrain_ret_alias", X86_FEATURE_SRSO_ALIAS
+#endif
 .endm
 .macro UNTRAIN_RET_FROM_CALL
 		      "call entry_ibpb", X86_FEATURE_ENTRY_IBPB,	\
 		      __stringify(RESET_CALL_DEPTH_FROM_CALL), X86_FEATURE_CALL_DEPTH
 #endif
+#ifdef CONFIG_CPU_SRSO
+	ALTERNATIVE_2 "", "call srso_untrain_ret", X86_FEATURE_SRSO, \
+			  "call srso_untrain_ret_alias", X86_FEATURE_SRSO_ALIAS
+#endif
 .endm
 extern void __x86_return_thunk(void);
 extern void zen_untrain_ret(void);
+extern void srso_untrain_ret(void);
+extern void srso_untrain_ret_alias(void);
 extern void entry_ibpb(void);
 #ifdef CONFIG_CALL_THUNKS
 		: "memory");
 }
+extern u64 x86_pred_cmd;
 static inline void indirect_branch_prediction_barrier(void)
 {
-	u64 val = PRED_CMD_IBPB;
+	alternative_msr_write(MSR_IA32_PRED_CMD, x86_pred_cmd, X86_FEATURE_USE_IBPB);
-	alternative_msr_write(MSR_IA32_PRED_CMD, val, X86_FEATURE_USE_IBPB);
 }
 /* The Intel SPEC CTRL MSR base value cache */

arch/x86/include/asm/processor.h+6−6

 #define HAVE_ARCH_PICK_MMAP_LAYOUT 1
 #define ARCH_HAS_PREFETCHW
-#define ARCH_HAS_SPINLOCK_PREFETCH
 #ifdef CONFIG_X86_32
 # define BASE_PREFETCH		""
 			  "m" (*(const char *)x));
 }
-static inline void spin_lock_prefetch(const void *x)
-{
-	prefetchw(x);
-}
 #define TOP_OF_INIT_STACK ((unsigned long)&init_stack + sizeof(init_stack) - \
 			   TOP_OF_KERNEL_STACK_PADDING)
 #ifdef CONFIG_CPU_SUP_AMD
 extern u32 amd_get_nodes_per_socket(void);
 extern u32 amd_get_highest_perf(void);
+extern bool cpu_has_ibpb_brtype_microcode(void);
+extern void amd_clear_divider(void);
 #else
 static inline u32 amd_get_nodes_per_socket(void)	{ return 0; }
 static inline u32 amd_get_highest_perf(void)		{ return 0; }
+static inline bool cpu_has_ibpb_brtype_microcode(void)	{ return false; }
+static inline void amd_clear_divider(void)		{ }
 #endif
 extern unsigned long arch_align_stack(unsigned long sp);
 #define arch_is_platform_page arch_is_platform_page
 #endif
+extern bool gds_ucode_mitigated(void);
 #endif /* _ASM_X86_PROCESSOR_H */

arch/x86/include/asm/segment.h+1−1

@@ -56,7 +56,7 @@ · 55 unmodified lines
56		56
57	#define GDT_ENTRY_INVALID_SEG 0	57	#define GDT_ENTRY_INVALID_SEG 0
58		58
59	#ifdef CONFIG_X86_32	59	#if defined(CONFIG_X86_32) && !defined(BUILD_VDSO32_64)
60	/*	60	/*
61	* The layout of the per-CPU GDT under Linux:	61	* The layout of the per-CPU GDT under Linux:
62	*	62	*

arch/x86/kernel/acpi/boot.c+4−0

 int acpi_ioapic;
 int acpi_strict;
 int acpi_disable_cmcff;
+bool acpi_int_src_ovr[NR_IRQS_LEGACY];
 /* ACPI SCI override configuration */
 u8 acpi_sci_flags __initdata;
 	acpi_table_print_madt_entry(&header->common);
+	if (intsrc->source_irq < NR_IRQS_LEGACY)
+		acpi_int_src_ovr[intsrc->source_irq] = true;
 	if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
 		acpi_sci_ioapic_setup(intsrc->source_irq,
 				      intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,

arch/x86/kernel/cpu/amd.c+39−0

@@ -73,8 +73,13 @@ static const int amd_erratum_1054[] = · 72 unmodified lines
73	static const int amd_zenbleed[] =	73	static const int amd_zenbleed[] =
74	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf),	74	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x30, 0x0, 0x4f, 0xf),
75	AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf),	75	AMD_MODEL_RANGE(0x17, 0x60, 0x0, 0x7f, 0xf),
		76	AMD_MODEL_RANGE(0x17, 0x90, 0x0, 0x91, 0xf),
76	AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf));	77	AMD_MODEL_RANGE(0x17, 0xa0, 0x0, 0xaf, 0xf));
77		78
		79	static const int amd_div0[] =
		80	AMD_LEGACY_ERRATUM(AMD_MODEL_RANGE(0x17, 0x00, 0x0, 0x2f, 0xf),
		81	AMD_MODEL_RANGE(0x17, 0x50, 0x0, 0x5f, 0xf));
		82
78	static bool cpu_has_amd_erratum(struct cpuinfo_x86 cpu, const int erratum)	83	static bool cpu_has_amd_erratum(struct cpuinfo_x86 cpu, const int erratum)
79	{	84	{
80	int osvw_id = *erratum++;	85	int osvw_id = *erratum++;
@@ -1130,6 +1135,11 @@ static void init_amd(struct cpuinfo_x86 *c) · 1049 unmodified lines
1130	WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));	1135	WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));
1131		1136
1132	zenbleed_check(c);	1137	zenbleed_check(c);
		1138
		1139	if (cpu_has_amd_erratum(c, amd_div0)) {
		1140	pr_notice_once("AMD Zen1 DIV0 bug detected. Disable SMT for full protection.\n");
		1141	setup_force_cpu_bug(X86_BUG_DIV0);
		1142	}
1133	}	1143	}
1134		1144
1135	#ifdef CONFIG_X86_32	1145	#ifdef CONFIG_X86_32
@@ -1290,3 +1300,32 @@ void amd_check_microcode(void) · 154 unmodified lines
1290	{	1300	{
1291	on_each_cpu(zenbleed_check_cpu, NULL, 1);	1301	on_each_cpu(zenbleed_check_cpu, NULL, 1);
1292	}	1302	}
		1303
		1304	bool cpu_has_ibpb_brtype_microcode(void)
		1305	{
		1306	switch (boot_cpu_data.x86) {
		1307	/* Zen1/2 IBPB flushes branch type predictions too. */
		1308	case 0x17:
		1309	return boot_cpu_has(X86_FEATURE_AMD_IBPB);
		1310	case 0x19:
		1311	/* Poke the MSR bit on Zen3/4 to check its presence. */
		1312	if (!wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {
		1313	setup_force_cpu_cap(X86_FEATURE_SBPB);
		1314	return true;
		1315	} else {
		1316	return false;
		1317	}
		1318	default:
		1319	return false;
		1320	}
		1321	}
		1322
		1323	/*
		1324	* Issue a DIV 0/1 insn to clear any division data from previous DIV
		1325	* operations.
		1326	*/
		1327	void noinstr amd_clear_divider(void)
		1328	{
		1329	asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0)
		1330	:: "a" (0), "d" (0), "r" (1));
		1331	}

arch/x86/kernel/cpu/bugs.c+337−0

@@ -47,6 +47,8 @@ static void __init taa_select_mitigation(void); · 46 unmodified lines
47	static void __init mmio_select_mitigation(void);	47	static void __init mmio_select_mitigation(void);
48	static void __init srbds_select_mitigation(void);	48	static void __init srbds_select_mitigation(void);
49	static void __init l1d_flush_select_mitigation(void);	49	static void __init l1d_flush_select_mitigation(void);
		50	static void __init srso_select_mitigation(void);
		51	static void __init gds_select_mitigation(void);
50		52
51	/* The base value of the SPEC_CTRL MSR without task-specific bits set */	53	/* The base value of the SPEC_CTRL MSR without task-specific bits set */
52	u64 x86_spec_ctrl_base;	54	u64 x86_spec_ctrl_base;
@@ -56,6 +58,9 @@ EXPORT_SYMBOL_GPL(x86_spec_ctrl_base); · 3 unmodified lines
56	DEFINE_PER_CPU(u64, x86_spec_ctrl_current);	58	DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
57	EXPORT_SYMBOL_GPL(x86_spec_ctrl_current);	59	EXPORT_SYMBOL_GPL(x86_spec_ctrl_current);
58		60
		61	u64 x86_pred_cmd __ro_after_init = PRED_CMD_IBPB;
		62	EXPORT_SYMBOL_GPL(x86_pred_cmd);
		63
59	static DEFINE_MUTEX(spec_ctrl_mutex);	64	static DEFINE_MUTEX(spec_ctrl_mutex);
60		65
61	/* Update SPEC_CTRL MSR and its cached copy unconditionally */	66	/* Update SPEC_CTRL MSR and its cached copy unconditionally */
@@ -160,6 +165,8 @@ void __init cpu_select_mitigations(void) · 98 unmodified lines
160	md_clear_select_mitigation();	165	md_clear_select_mitigation();
161	srbds_select_mitigation();	166	srbds_select_mitigation();
162	l1d_flush_select_mitigation();	167	l1d_flush_select_mitigation();
		168	srso_select_mitigation();
		169	gds_select_mitigation();
163	}	170	}
164		171
165	/*	172	/*
@@ -645,6 +652,149 @@ static int __init l1d_flush_parse_cmdline(char *str) · 479 unmodified lines
645	}	652	}
646	early_param("l1d_flush", l1d_flush_parse_cmdline);	653	early_param("l1d_flush", l1d_flush_parse_cmdline);
647		654
		655	#undef pr_fmt
		656	#define pr_fmt(fmt) "GDS: " fmt
		657
		658	enum gds_mitigations {
		659	GDS_MITIGATION_OFF,
		660	GDS_MITIGATION_UCODE_NEEDED,
		661	GDS_MITIGATION_FORCE,
		662	GDS_MITIGATION_FULL,
		663	GDS_MITIGATION_FULL_LOCKED,
		664	GDS_MITIGATION_HYPERVISOR,
		665	};
		666
		667	#if IS_ENABLED(CONFIG_GDS_FORCE_MITIGATION)
		668	static enum gds_mitigations gds_mitigation __ro_after_init = GDS_MITIGATION_FORCE;
		669	#else
		670	static enum gds_mitigations gds_mitigation __ro_after_init = GDS_MITIGATION_FULL;
		671	#endif
		672
		673	static const char * const gds_strings[] = {
		674	[GDS_MITIGATION_OFF] = "Vulnerable",
		675	[GDS_MITIGATION_UCODE_NEEDED] = "Vulnerable: No microcode",
		676	[GDS_MITIGATION_FORCE] = "Mitigation: AVX disabled, no microcode",
		677	[GDS_MITIGATION_FULL] = "Mitigation: Microcode",
		678	[GDS_MITIGATION_FULL_LOCKED] = "Mitigation: Microcode (locked)",
		679	[GDS_MITIGATION_HYPERVISOR] = "Unknown: Dependent on hypervisor status",
		680	};
		681
		682	bool gds_ucode_mitigated(void)
		683	{
		684	return (gds_mitigation == GDS_MITIGATION_FULL \|\|
		685	gds_mitigation == GDS_MITIGATION_FULL_LOCKED);
		686	}
		687	EXPORT_SYMBOL_GPL(gds_ucode_mitigated);
		688
		689	void update_gds_msr(void)
		690	{
		691	u64 mcu_ctrl_after;
		692	u64 mcu_ctrl;
		693
		694	switch (gds_mitigation) {
		695	case GDS_MITIGATION_OFF:
		696	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
		697	mcu_ctrl \|= GDS_MITG_DIS;
		698	break;
		699	case GDS_MITIGATION_FULL_LOCKED:
		700	/*
		701	* The LOCKED state comes from the boot CPU. APs might not have
		702	* the same state. Make sure the mitigation is enabled on all
		703	* CPUs.
		704	*/
		705	case GDS_MITIGATION_FULL:
		706	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
		707	mcu_ctrl &= ~GDS_MITG_DIS;
		708	break;
		709	case GDS_MITIGATION_FORCE:
		710	case GDS_MITIGATION_UCODE_NEEDED:
		711	case GDS_MITIGATION_HYPERVISOR:
		712	return;
		713	};
		714
		715	wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
		716
		717	/*
		718	* Check to make sure that the WRMSR value was not ignored. Writes to
		719	* GDS_MITG_DIS will be ignored if this processor is locked but the boot
		720	* processor was not.
		721	*/
		722	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl_after);
		723	WARN_ON_ONCE(mcu_ctrl != mcu_ctrl_after);
		724	}
		725
		726	static void __init gds_select_mitigation(void)
		727	{
		728	u64 mcu_ctrl;
		729
		730	if (!boot_cpu_has_bug(X86_BUG_GDS))
		731	return;
		732
		733	if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
		734	gds_mitigation = GDS_MITIGATION_HYPERVISOR;
		735	goto out;
		736	}
		737
		738	if (cpu_mitigations_off())
		739	gds_mitigation = GDS_MITIGATION_OFF;
		740	/* Will verify below that mitigation _can_ be disabled */
		741
		742	/* No microcode */
		743	if (!(x86_read_arch_cap_msr() & ARCH_CAP_GDS_CTRL)) {
		744	if (gds_mitigation == GDS_MITIGATION_FORCE) {
		745	/*
		746	* This only needs to be done on the boot CPU so do it
		747	* here rather than in update_gds_msr()
		748	*/
		749	setup_clear_cpu_cap(X86_FEATURE_AVX);
		750	pr_warn("Microcode update needed! Disabling AVX as mitigation.\n");
		751	} else {
		752	gds_mitigation = GDS_MITIGATION_UCODE_NEEDED;
		753	}
		754	goto out;
		755	}
		756
		757	/* Microcode has mitigation, use it */
		758	if (gds_mitigation == GDS_MITIGATION_FORCE)
		759	gds_mitigation = GDS_MITIGATION_FULL;
		760
		761	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
		762	if (mcu_ctrl & GDS_MITG_LOCKED) {
		763	if (gds_mitigation == GDS_MITIGATION_OFF)
		764	pr_warn("Mitigation locked. Disable failed.\n");
		765
		766	/*
		767	* The mitigation is selected from the boot CPU. All other CPUs
		768	* _should_ have the same state. If the boot CPU isn't locked
		769	* but others are then update_gds_msr() will WARN() of the state
		770	* mismatch. If the boot CPU is locked update_gds_msr() will
		771	* ensure the other CPUs have the mitigation enabled.
		772	*/
		773	gds_mitigation = GDS_MITIGATION_FULL_LOCKED;
		774	}
		775
		776	update_gds_msr();
		777	out:
		778	pr_info("%s\n", gds_strings[gds_mitigation]);
		779	}
		780
		781	static int __init gds_parse_cmdline(char *str)
		782	{
		783	if (!str)
		784	return -EINVAL;
		785
		786	if (!boot_cpu_has_bug(X86_BUG_GDS))
		787	return 0;
		788
		789	if (!strcmp(str, "off"))
		790	gds_mitigation = GDS_MITIGATION_OFF;
		791	else if (!strcmp(str, "force"))
		792	gds_mitigation = GDS_MITIGATION_FORCE;
		793
		794	return 0;
		795	}
		796	early_param("gather_data_sampling", gds_parse_cmdline);
		797
648	#undef pr_fmt	798	#undef pr_fmt
649	#define pr_fmt(fmt) "Spectre V1 : " fmt	799	#define pr_fmt(fmt) "Spectre V1 : " fmt
650		800
@@ -2187,6 +2337,165 @@ static int __init l1tf_cmdline(char *str) · 1536 unmodified lines
2187	}	2337	}
2188	early_param("l1tf", l1tf_cmdline);	2338	early_param("l1tf", l1tf_cmdline);
2189		2339
		2340	#undef pr_fmt
		2341	#define pr_fmt(fmt) "Speculative Return Stack Overflow: " fmt
		2342
		2343	enum srso_mitigation {
		2344	SRSO_MITIGATION_NONE,
		2345	SRSO_MITIGATION_MICROCODE,
		2346	SRSO_MITIGATION_SAFE_RET,
		2347	SRSO_MITIGATION_IBPB,
		2348	SRSO_MITIGATION_IBPB_ON_VMEXIT,
		2349	};
		2350
		2351	enum srso_mitigation_cmd {
		2352	SRSO_CMD_OFF,
		2353	SRSO_CMD_MICROCODE,
		2354	SRSO_CMD_SAFE_RET,
		2355	SRSO_CMD_IBPB,
		2356	SRSO_CMD_IBPB_ON_VMEXIT,
		2357	};
		2358
		2359	static const char * const srso_strings[] = {
		2360	[SRSO_MITIGATION_NONE] = "Vulnerable",
		2361	[SRSO_MITIGATION_MICROCODE] = "Mitigation: microcode",
		2362	[SRSO_MITIGATION_SAFE_RET] = "Mitigation: safe RET",
		2363	[SRSO_MITIGATION_IBPB] = "Mitigation: IBPB",
		2364	[SRSO_MITIGATION_IBPB_ON_VMEXIT] = "Mitigation: IBPB on VMEXIT only"
		2365	};
		2366
		2367	static enum srso_mitigation srso_mitigation __ro_after_init = SRSO_MITIGATION_NONE;
		2368	static enum srso_mitigation_cmd srso_cmd __ro_after_init = SRSO_CMD_SAFE_RET;
		2369
		2370	static int __init srso_parse_cmdline(char *str)
		2371	{
		2372	if (!str)
		2373	return -EINVAL;
		2374
		2375	if (!strcmp(str, "off"))
		2376	srso_cmd = SRSO_CMD_OFF;
		2377	else if (!strcmp(str, "microcode"))
		2378	srso_cmd = SRSO_CMD_MICROCODE;
		2379	else if (!strcmp(str, "safe-ret"))
		2380	srso_cmd = SRSO_CMD_SAFE_RET;
		2381	else if (!strcmp(str, "ibpb"))
		2382	srso_cmd = SRSO_CMD_IBPB;
		2383	else if (!strcmp(str, "ibpb-vmexit"))
		2384	srso_cmd = SRSO_CMD_IBPB_ON_VMEXIT;
		2385	else
		2386	pr_err("Ignoring unknown SRSO option (%s).", str);
		2387
		2388	return 0;
		2389	}
		2390	early_param("spec_rstack_overflow", srso_parse_cmdline);
		2391
		2392	#define SRSO_NOTICE "WARNING: See https://kernel.org/doc/html/latest/admin-guide/hw-vuln/srso.html for mitigation options."
		2393
		2394	static void __init srso_select_mitigation(void)
		2395	{
		2396	bool has_microcode;
		2397
		2398	if (!boot_cpu_has_bug(X86_BUG_SRSO) \|\| cpu_mitigations_off())
		2399	goto pred_cmd;
		2400
		2401	/*
		2402	* The first check is for the kernel running as a guest in order
		2403	* for guests to verify whether IBPB is a viable mitigation.
		2404	*/
		2405	has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) \|\| cpu_has_ibpb_brtype_microcode();
		2406	if (!has_microcode) {
		2407	pr_warn("IBPB-extending microcode not applied!\n");
		2408	pr_warn(SRSO_NOTICE);
		2409	} else {
		2410	/*
		2411	* Enable the synthetic (even if in a real CPUID leaf)
		2412	* flags for guests.
		2413	*/
		2414	setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
		2415
		2416	/*
		2417	* Zen1/2 with SMT off aren't vulnerable after the right
		2418	* IBPB microcode has been applied.
		2419	*/
		2420	if ((boot_cpu_data.x86 < 0x19) &&
		2421	(!cpu_smt_possible() \|\| (cpu_smt_control == CPU_SMT_DISABLED)))
		2422	setup_force_cpu_cap(X86_FEATURE_SRSO_NO);
		2423	}
		2424
		2425	if (retbleed_mitigation == RETBLEED_MITIGATION_IBPB) {
		2426	if (has_microcode) {
		2427	pr_err("Retbleed IBPB mitigation enabled, using same for SRSO\n");
		2428	srso_mitigation = SRSO_MITIGATION_IBPB;
		2429	goto pred_cmd;
		2430	}
		2431	}
		2432
		2433	switch (srso_cmd) {
		2434	case SRSO_CMD_OFF:
		2435	return;
		2436
		2437	case SRSO_CMD_MICROCODE:
		2438	if (has_microcode) {
		2439	srso_mitigation = SRSO_MITIGATION_MICROCODE;
		2440	pr_warn(SRSO_NOTICE);
		2441	}
		2442	break;
		2443
		2444	case SRSO_CMD_SAFE_RET:
		2445	if (IS_ENABLED(CONFIG_CPU_SRSO)) {
		2446	/*
		2447	* Enable the return thunk for generated code
		2448	* like ftrace, static_call, etc.
		2449	*/
		2450	setup_force_cpu_cap(X86_FEATURE_RETHUNK);
		2451
		2452	if (boot_cpu_data.x86 == 0x19)
		2453	setup_force_cpu_cap(X86_FEATURE_SRSO_ALIAS);
		2454	else
		2455	setup_force_cpu_cap(X86_FEATURE_SRSO);
		2456	srso_mitigation = SRSO_MITIGATION_SAFE_RET;
		2457	} else {
		2458	pr_err("WARNING: kernel not compiled with CPU_SRSO.\n");
		2459	goto pred_cmd;
		2460	}
		2461	break;
		2462
		2463	case SRSO_CMD_IBPB:
		2464	if (IS_ENABLED(CONFIG_CPU_IBPB_ENTRY)) {
		2465	if (has_microcode) {
		2466	setup_force_cpu_cap(X86_FEATURE_ENTRY_IBPB);
		2467	srso_mitigation = SRSO_MITIGATION_IBPB;
		2468	}
		2469	} else {
		2470	pr_err("WARNING: kernel not compiled with CPU_IBPB_ENTRY.\n");
		2471	goto pred_cmd;
		2472	}
		2473	break;
		2474
		2475	case SRSO_CMD_IBPB_ON_VMEXIT:
		2476	if (IS_ENABLED(CONFIG_CPU_SRSO)) {
		2477	if (!boot_cpu_has(X86_FEATURE_ENTRY_IBPB) && has_microcode) {
		2478	setup_force_cpu_cap(X86_FEATURE_IBPB_ON_VMEXIT);
		2479	srso_mitigation = SRSO_MITIGATION_IBPB_ON_VMEXIT;
		2480	}
		2481	} else {
		2482	pr_err("WARNING: kernel not compiled with CPU_SRSO.\n");
		2483	goto pred_cmd;
		2484	}
		2485	break;
		2486
		2487	default:
		2488	break;
		2489	}
		2490
		2491	pr_info("%s%s\n", srso_strings[srso_mitigation], (has_microcode ? "" : ", no microcode"));
		2492
		2493	pred_cmd:
		2494	if ((boot_cpu_has(X86_FEATURE_SRSO_NO) \|\| srso_cmd == SRSO_CMD_OFF) &&
		2495	boot_cpu_has(X86_FEATURE_SBPB))
		2496	x86_pred_cmd = PRED_CMD_SBPB;
		2497	}
		2498
2190	#undef pr_fmt	2499	#undef pr_fmt
2191	#define pr_fmt(fmt) fmt	2500	#define pr_fmt(fmt) fmt
2192		2501
@@ -2385,6 +2694,18 @@ static ssize_t retbleed_show_state(char *buf) · 192 unmodified lines
2385	return sysfs_emit(buf, "%s\n", retbleed_strings[retbleed_mitigation]);	2694	return sysfs_emit(buf, "%s\n", retbleed_strings[retbleed_mitigation]);
2386	}	2695	}
2387		2696
		2697	static ssize_t srso_show_state(char *buf)
		2698	{
		2699	return sysfs_emit(buf, "%s%s\n",
		2700	srso_strings[srso_mitigation],
		2701	(cpu_has_ibpb_brtype_microcode() ? "" : ", no microcode"));
		2702	}
		2703
		2704	static ssize_t gds_show_state(char *buf)
		2705	{
		2706	return sysfs_emit(buf, "%s\n", gds_strings[gds_mitigation]);
		2707	}
		2708
2388	static ssize_t cpu_show_common(struct device dev, struct device_attribute attr,	2709	static ssize_t cpu_show_common(struct device dev, struct device_attribute attr,
2389	char *buf, unsigned int bug)	2710	char *buf, unsigned int bug)
2390	{	2711	{
@@ -2434,6 +2755,12 @@ static ssize_t cpu_show_common(struct device dev, struct device_attribute attr · 43 unmodified lines
2434	case X86_BUG_RETBLEED:	2755	case X86_BUG_RETBLEED:
2435	return retbleed_show_state(buf);	2756	return retbleed_show_state(buf);
2436		2757
		2758	case X86_BUG_SRSO:
		2759	return srso_show_state(buf);
		2760
		2761	case X86_BUG_GDS:
		2762	return gds_show_state(buf);
		2763
2437	default:	2764	default:
2438	break;	2765	break;
2439	}	2766	}
@@ -2498,4 +2825,14 @@ ssize_t cpu_show_retbleed(struct device dev, struct device_attribute attr, cha · 58 unmodified lines
2498	{	2825	{
2499	return cpu_show_common(dev, attr, buf, X86_BUG_RETBLEED);	2826	return cpu_show_common(dev, attr, buf, X86_BUG_RETBLEED);
2500	}	2827	}
		2828
		2829	ssize_t cpu_show_spec_rstack_overflow(struct device dev, struct device_attribute attr, char *buf)
		2830	{
		2831	return cpu_show_common(dev, attr, buf, X86_BUG_SRSO);
		2832	}
		2833
		2834	ssize_t cpu_show_gds(struct device dev, struct device_attribute attr, char *buf)
		2835	{
		2836	return cpu_show_common(dev, attr, buf, X86_BUG_GDS);
		2837	}
2501	#endif	2838	#endif

arch/x86/kernel/cpu/common.c+34−10

 #define RETBLEED	BIT(3)
 /* CPU is affected by SMT (cross-thread) return predictions */
 #define SMT_RSB		BIT(4)
+/* CPU is affected by SRSO */
+#define SRSO		BIT(5)
+/* CPU is affected by GDS */
+#define GDS		BIT(6)
 static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = {
 	VULNBL_INTEL_STEPPINGS(IVYBRIDGE,	X86_STEPPING_ANY,		SRBDS),
 	VULNBL_INTEL_STEPPINGS(BROADWELL_X,	X86_STEPPING_ANY,		MMIO),
 	VULNBL_INTEL_STEPPINGS(BROADWELL,	X86_STEPPING_ANY,		SRBDS),
 	VULNBL_INTEL_STEPPINGS(SKYLAKE_L,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),
-	VULNBL_INTEL_STEPPINGS(SKYLAKE_X,	X86_STEPPING_ANY,		MMIO | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(SKYLAKE_X,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),
 	VULNBL_INTEL_STEPPINGS(SKYLAKE,		X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),
-	VULNBL_INTEL_STEPPINGS(KABYLAKE_L,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(KABYLAKE_L,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED | GDS),
-	VULNBL_INTEL_STEPPINGS(KABYLAKE,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(KABYLAKE,	X86_STEPPING_ANY,		SRBDS | MMIO | RETBLEED | GDS),
 	VULNBL_INTEL_STEPPINGS(CANNONLAKE_L,	X86_STEPPING_ANY,		RETBLEED),
-	VULNBL_INTEL_STEPPINGS(ICELAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(ICELAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),
-	VULNBL_INTEL_STEPPINGS(ICELAKE_D,	X86_STEPPING_ANY,		MMIO),
+	VULNBL_INTEL_STEPPINGS(ICELAKE_D,	X86_STEPPING_ANY,		MMIO | GDS),
-	VULNBL_INTEL_STEPPINGS(ICELAKE_X,	X86_STEPPING_ANY,		MMIO),
+	VULNBL_INTEL_STEPPINGS(ICELAKE_X,	X86_STEPPING_ANY,		MMIO | GDS),
-	VULNBL_INTEL_STEPPINGS(COMETLAKE,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(COMETLAKE,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),
 	VULNBL_INTEL_STEPPINGS(COMETLAKE_L,	X86_STEPPINGS(0x0, 0x0),	MMIO | RETBLEED),
-	VULNBL_INTEL_STEPPINGS(COMETLAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(COMETLAKE_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED | GDS),
+	VULNBL_INTEL_STEPPINGS(TIGERLAKE_L,	X86_STEPPING_ANY,		GDS),
+	VULNBL_INTEL_STEPPINGS(TIGERLAKE,	X86_STEPPING_ANY,		GDS),
 	VULNBL_INTEL_STEPPINGS(LAKEFIELD,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS | RETBLEED),
-	VULNBL_INTEL_STEPPINGS(ROCKETLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED),
+	VULNBL_INTEL_STEPPINGS(ROCKETLAKE,	X86_STEPPING_ANY,		MMIO | RETBLEED | GDS),
 	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS),
 	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_D,	X86_STEPPING_ANY,		MMIO),
 	VULNBL_INTEL_STEPPINGS(ATOM_TREMONT_L,	X86_STEPPING_ANY,		MMIO | MMIO_SBDS),
 	VULNBL_AMD(0x15, RETBLEED),
 	VULNBL_AMD(0x16, RETBLEED),
-	VULNBL_AMD(0x17, RETBLEED | SMT_RSB),
+	VULNBL_AMD(0x17, RETBLEED | SMT_RSB | SRSO),
 	VULNBL_HYGON(0x18, RETBLEED | SMT_RSB),
+	VULNBL_AMD(0x19, SRSO),
 	{}
 };
 	if (cpu_matches(cpu_vuln_blacklist, SMT_RSB))
 		setup_force_cpu_bug(X86_BUG_SMT_RSB);
+	if (!cpu_has(c, X86_FEATURE_SRSO_NO)) {
+		if (cpu_matches(cpu_vuln_blacklist, SRSO))
+			setup_force_cpu_bug(X86_BUG_SRSO);
+	}
+	/*
+	 * Check if CPU is vulnerable to GDS. If running in a virtual machine on
+	 * an affected processor, the VMM may have disabled the use of GATHER by
+	 * disabling AVX2. The only way to do this in HW is to clear XCR0[2],
+	 * which means that AVX will be disabled.
+	 */
+	if (cpu_matches(cpu_vuln_blacklist, GDS) && !(ia32_cap & ARCH_CAP_GDS_NO) &&
+	    boot_cpu_has(X86_FEATURE_AVX))
+		setup_force_cpu_bug(X86_BUG_GDS);
 	if (cpu_matches(cpu_vuln_whitelist, NO_MELTDOWN))
 		return;
 	validate_apic_and_package_id(c);
 	x86_spec_ctrl_setup_ap();
 	update_srbds_msr();
+	if (boot_cpu_has_bug(X86_BUG_GDS))
+		update_gds_msr();
 	tsx_ap_init();
 }

arch/x86/kernel/cpu/cpu.h+1−0

@@ -83,6 +83,7 @@ void cpu_select_mitigations(void); · 82 unmodified lines
83		83
84	extern void x86_spec_ctrl_setup_ap(void);	84	extern void x86_spec_ctrl_setup_ap(void);
85	extern void update_srbds_msr(void);	85	extern void update_srbds_msr(void);
		86	extern void update_gds_msr(void);
86		87
87	extern enum spectre_v2_mitigation spectre_v2_enabled;	88	extern enum spectre_v2_mitigation spectre_v2_enabled;
88		89

arch/x86/kernel/traps.c+2−0

@@ -206,6 +206,8 @@ DEFINE_IDTENTRY(exc_divide_error) · 205 unmodified lines
206	{	206	{
207	do_error_trap(regs, 0, "divide error", X86_TRAP_DE, SIGFPE,	207	do_error_trap(regs, 0, "divide error", X86_TRAP_DE, SIGFPE,
208	FPE_INTDIV, error_get_trap_addr(regs));	208	FPE_INTDIV, error_get_trap_addr(regs));
		209
		210	amd_clear_divider();
209	}	211	}
210		212
211	DEFINE_IDTENTRY(exc_overflow)	213	DEFINE_IDTENTRY(exc_overflow)

arch/x86/kernel/vmlinux.lds.S+33−2

@@ -134,13 +134,27 @@ SECTIONS · 133 unmodified lines
134	SOFTIRQENTRY_TEXT	134	SOFTIRQENTRY_TEXT
135	#ifdef CONFIG_RETPOLINE	135	#ifdef CONFIG_RETPOLINE
136	__indirect_thunk_start = .;	136	__indirect_thunk_start = .;
137	(.text.__x86.)	137	*(.text.__x86.indirect_thunk)
		138	*(.text.__x86.return_thunk)
138	__indirect_thunk_end = .;	139	__indirect_thunk_end = .;
139	#endif	140	#endif
140	STATIC_CALL_TEXT	141	STATIC_CALL_TEXT
141		142
142	ALIGN_ENTRY_TEXT_BEGIN	143	ALIGN_ENTRY_TEXT_BEGIN
		144	#ifdef CONFIG_CPU_SRSO
		145	*(.text.__x86.rethunk_untrain)
		146	#endif
		147
143	ENTRY_TEXT	148	ENTRY_TEXT
		149
		150	#ifdef CONFIG_CPU_SRSO
		151	/*
		152	* See the comment above srso_untrain_ret_alias()'s
		153	* definition.
		154	*/
		155	. = srso_untrain_ret_alias \| (1 << 2) \| (1 << 8) \| (1 << 14) \| (1 << 20);
		156	*(.text.__x86.rethunk_safe)
		157	#endif
144	ALIGN_ENTRY_TEXT_END	158	ALIGN_ENTRY_TEXT_END
145	*(.gnu.warning)	159	*(.gnu.warning)
146		160
@@ -509,7 +523,24 @@ INIT_PER_CPU(irq_stack_backing_store); · 362 unmodified lines
509	#endif	523	#endif
510		524
511	#ifdef CONFIG_RETHUNK	525	#ifdef CONFIG_RETHUNK
512	. = ASSERT((__x86_return_thunk & 0x3f) == 0, "__x86_return_thunk not cacheline-aligned");	526	. = ASSERT((__ret & 0x3f) == 0, "__ret not cacheline-aligned");
		527	. = ASSERT((srso_safe_ret & 0x3f) == 0, "srso_safe_ret not cacheline-aligned");
		528	#endif
		529
		530	#ifdef CONFIG_CPU_SRSO
		531	/*
		532	* GNU ld cannot do XOR until 2.41.
		533	* https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=f6f78318fca803c4907fb8d7f6ded8295f1947b1
		534	*
		535	* LLVM lld cannot do XOR until lld-17.
		536	* https://github.com/llvm/llvm-project/commit/fae96104d4378166cbe5c875ef8ed808a356f3fb
		537	*
		538	* Instead do: (A \| B) - (A & B) in order to compute the XOR
		539	* of the two function addresses:
		540	*/
		541	. = ASSERT(((ABSOLUTE(srso_untrain_ret_alias) \| srso_safe_ret_alias) -
		542	(ABSOLUTE(srso_untrain_ret_alias) & srso_safe_ret_alias)) == ((1 << 2) \| (1 << 8) \| (1 << 14) \| (1 << 20)),
		543	"SRSO function pair won't alias");
513	#endif	544	#endif
514		545
515	#endif /* CONFIG_X86_64 */	546	#endif /* CONFIG_X86_64 */

arch/x86/kvm/cpuid.c+3−0

@@ -729,6 +729,9 @@ void kvm_set_cpu_caps(void) · 728 unmodified lines
729	F(NULL_SEL_CLR_BASE) \| F(AUTOIBRS) \| 0 /* PrefetchCtlMsr */	729	F(NULL_SEL_CLR_BASE) \| F(AUTOIBRS) \| 0 /* PrefetchCtlMsr */
730	);	730	);
731		731
		732	if (cpu_feature_enabled(X86_FEATURE_SRSO_NO))
		733	kvm_cpu_cap_set(X86_FEATURE_SRSO_NO);
		734
732	kvm_cpu_cap_init_kvm_defined(CPUID_8000_0022_EAX,	735	kvm_cpu_cap_init_kvm_defined(CPUID_8000_0022_EAX,
733	F(PERFMON_V2)	736	F(PERFMON_V2)
734	);	737	);

arch/x86/kvm/svm/sev.c+61−63

 	 */
 	memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
-	vcpu->arch.regs[VCPU_REGS_RAX] = ghcb_get_rax_if_valid(ghcb);
+	BUILD_BUG_ON(sizeof(svm->sev_es.valid_bitmap) != sizeof(ghcb->save.valid_bitmap));
-	vcpu->arch.regs[VCPU_REGS_RBX] = ghcb_get_rbx_if_valid(ghcb);
+	memcpy(&svm->sev_es.valid_bitmap, &ghcb->save.valid_bitmap, sizeof(ghcb->save.valid_bitmap));
-	vcpu->arch.regs[VCPU_REGS_RCX] = ghcb_get_rcx_if_valid(ghcb);
-	vcpu->arch.regs[VCPU_REGS_RDX] = ghcb_get_rdx_if_valid(ghcb);
-	vcpu->arch.regs[VCPU_REGS_RSI] = ghcb_get_rsi_if_valid(ghcb);
-	svm->vmcb->save.cpl = ghcb_get_cpl_if_valid(ghcb);
+	vcpu->arch.regs[VCPU_REGS_RAX] = kvm_ghcb_get_rax_if_valid(svm, ghcb);
+	vcpu->arch.regs[VCPU_REGS_RBX] = kvm_ghcb_get_rbx_if_valid(svm, ghcb);
+	vcpu->arch.regs[VCPU_REGS_RCX] = kvm_ghcb_get_rcx_if_valid(svm, ghcb);
+	vcpu->arch.regs[VCPU_REGS_RDX] = kvm_ghcb_get_rdx_if_valid(svm, ghcb);
+	vcpu->arch.regs[VCPU_REGS_RSI] = kvm_ghcb_get_rsi_if_valid(svm, ghcb);
-	if (ghcb_xcr0_is_valid(ghcb)) {
+	svm->vmcb->save.cpl = kvm_ghcb_get_cpl_if_valid(svm, ghcb);
+	if (kvm_ghcb_xcr0_is_valid(svm)) {
 		vcpu->arch.xcr0 = ghcb_get_xcr0(ghcb);
 		kvm_update_cpuid_runtime(vcpu);
 	}
 	control->exit_code_hi = upper_32_bits(exit_code);
 	control->exit_info_1 = ghcb_get_sw_exit_info_1(ghcb);
 	control->exit_info_2 = ghcb_get_sw_exit_info_2(ghcb);
+	svm->sev_es.sw_scratch = kvm_ghcb_get_sw_scratch_if_valid(svm, ghcb);
 	/* Clear the valid entries fields */
 	memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
 }
+static u64 kvm_ghcb_get_sw_exit_code(struct vmcb_control_area *control)
+{
+	return (((u64)control->exit_code_hi) << 32) | control->exit_code;
+}
 static int sev_es_validate_vmgexit(struct vcpu_svm *svm)
 {
-	struct kvm_vcpu *vcpu;
+	struct vmcb_control_area *control = &svm->vmcb->control;
-	struct ghcb *ghcb;
+	struct kvm_vcpu *vcpu = &svm->vcpu;
 	u64 exit_code;
 	u64 reason;
-	ghcb = svm->sev_es.ghcb;
 	/*
 	 * Retrieve the exit code now even though it may not be marked valid
 	 * as it could help with debugging.
 	 */
-	exit_code = ghcb_get_sw_exit_code(ghcb);
+	exit_code = kvm_ghcb_get_sw_exit_code(control);
 	/* Only GHCB Usage code 0 is supported */
-	if (ghcb->ghcb_usage) {
+	if (svm->sev_es.ghcb->ghcb_usage) {
 		reason = GHCB_ERR_INVALID_USAGE;
 		goto vmgexit_err;
 	}
 	reason = GHCB_ERR_MISSING_INPUT;
-	if (!ghcb_sw_exit_code_is_valid(ghcb) ||
+	if (!kvm_ghcb_sw_exit_code_is_valid(svm) ||
-	    !ghcb_sw_exit_info_1_is_valid(ghcb) ||
+	    !kvm_ghcb_sw_exit_info_1_is_valid(svm) ||
-	    !ghcb_sw_exit_info_2_is_valid(ghcb))
+	    !kvm_ghcb_sw_exit_info_2_is_valid(svm))
 		goto vmgexit_err;
-	switch (ghcb_get_sw_exit_code(ghcb)) {
+	switch (exit_code) {
 	case SVM_EXIT_READ_DR7:
 		break;
 	case SVM_EXIT_WRITE_DR7:
-		if (!ghcb_rax_is_valid(ghcb))
+		if (!kvm_ghcb_rax_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_EXIT_RDTSC:
 		break;
 	case SVM_EXIT_RDPMC:
-		if (!ghcb_rcx_is_valid(ghcb))
+		if (!kvm_ghcb_rcx_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_EXIT_CPUID:
-		if (!ghcb_rax_is_valid(ghcb) ||
+		if (!kvm_ghcb_rax_is_valid(svm) ||
-		    !ghcb_rcx_is_valid(ghcb))
+		    !kvm_ghcb_rcx_is_valid(svm))
 			goto vmgexit_err;
-		if (ghcb_get_rax(ghcb) == 0xd)
+		if (vcpu->arch.regs[VCPU_REGS_RAX] == 0xd)
-			if (!ghcb_xcr0_is_valid(ghcb))
+			if (!kvm_ghcb_xcr0_is_valid(svm))
 				goto vmgexit_err;
 		break;
 	case SVM_EXIT_INVD:
 		break;
 	case SVM_EXIT_IOIO:
-		if (ghcb_get_sw_exit_info_1(ghcb) & SVM_IOIO_STR_MASK) {
+		if (control->exit_info_1 & SVM_IOIO_STR_MASK) {
-			if (!ghcb_sw_scratch_is_valid(ghcb))
+			if (!kvm_ghcb_sw_scratch_is_valid(svm))
 				goto vmgexit_err;
 		} else {
-			if (!(ghcb_get_sw_exit_info_1(ghcb) & SVM_IOIO_TYPE_MASK))
+			if (!(control->exit_info_1 & SVM_IOIO_TYPE_MASK))
-				if (!ghcb_rax_is_valid(ghcb))
+				if (!kvm_ghcb_rax_is_valid(svm))
 					goto vmgexit_err;
 		}
 		break;
 	case SVM_EXIT_MSR:
-		if (!ghcb_rcx_is_valid(ghcb))
+		if (!kvm_ghcb_rcx_is_valid(svm))
 			goto vmgexit_err;
-		if (ghcb_get_sw_exit_info_1(ghcb)) {
+		if (control->exit_info_1) {
-			if (!ghcb_rax_is_valid(ghcb) ||
+			if (!kvm_ghcb_rax_is_valid(svm) ||
-			    !ghcb_rdx_is_valid(ghcb))
+			    !kvm_ghcb_rdx_is_valid(svm))
 				goto vmgexit_err;
 		}
 		break;
 	case SVM_EXIT_VMMCALL:
-		if (!ghcb_rax_is_valid(ghcb) ||
+		if (!kvm_ghcb_rax_is_valid(svm) ||
-		    !ghcb_cpl_is_valid(ghcb))
+		    !kvm_ghcb_cpl_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_EXIT_RDTSCP:
 	case SVM_EXIT_WBINVD:
 		break;
 	case SVM_EXIT_MONITOR:
-		if (!ghcb_rax_is_valid(ghcb) ||
+		if (!kvm_ghcb_rax_is_valid(svm) ||
-		    !ghcb_rcx_is_valid(ghcb) ||
+		    !kvm_ghcb_rcx_is_valid(svm) ||
-		    !ghcb_rdx_is_valid(ghcb))
+		    !kvm_ghcb_rdx_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_EXIT_MWAIT:
-		if (!ghcb_rax_is_valid(ghcb) ||
+		if (!kvm_ghcb_rax_is_valid(svm) ||
-		    !ghcb_rcx_is_valid(ghcb))
+		    !kvm_ghcb_rcx_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_VMGEXIT_MMIO_READ:
 	case SVM_VMGEXIT_MMIO_WRITE:
-		if (!ghcb_sw_scratch_is_valid(ghcb))
+		if (!kvm_ghcb_sw_scratch_is_valid(svm))
 			goto vmgexit_err;
 		break;
 	case SVM_VMGEXIT_NMI_COMPLETE:
 	return 0;
 vmgexit_err:
-	vcpu = &svm->vcpu;
 	if (reason == GHCB_ERR_INVALID_USAGE) {
 		vcpu_unimpl(vcpu, "vmgexit: ghcb usage %#x is not valid\n",
-			    ghcb->ghcb_usage);
+			    svm->sev_es.ghcb->ghcb_usage);
 	} else if (reason == GHCB_ERR_INVALID_EVENT) {
 		vcpu_unimpl(vcpu, "vmgexit: exit code %#llx is not valid\n",
 			    exit_code);
 		dump_ghcb(svm);
 	}
-	/* Clear the valid entries fields */
+	ghcb_set_sw_exit_info_1(svm->sev_es.ghcb, 2);
-	memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
+	ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, reason);
-	ghcb_set_sw_exit_info_1(ghcb, 2);
-	ghcb_set_sw_exit_info_2(ghcb, reason);
 	/* Resume the guest to "return" the error code. */
 	return 1;
 		 */
 		if (svm->sev_es.ghcb_sa_sync) {
 			kvm_write_guest(svm->vcpu.kvm,
-					ghcb_get_sw_scratch(svm->sev_es.ghcb),
+					svm->sev_es.sw_scratch,
 					svm->sev_es.ghcb_sa,
 					svm->sev_es.ghcb_sa_len);
 			svm->sev_es.ghcb_sa_sync = false;
 static int setup_vmgexit_scratch(struct vcpu_svm *svm, bool sync, u64 len)
 {
 	struct vmcb_control_area *control = &svm->vmcb->control;
-	struct ghcb *ghcb = svm->sev_es.ghcb;
 	u64 ghcb_scratch_beg, ghcb_scratch_end;
 	u64 scratch_gpa_beg, scratch_gpa_end;
 	void *scratch_va;
-	scratch_gpa_beg = ghcb_get_sw_scratch(ghcb);
+	scratch_gpa_beg = svm->sev_es.sw_scratch;
 	if (!scratch_gpa_beg) {
 		pr_err("vmgexit: scratch gpa not provided\n");
 		goto e_scratch;
 	return 0;
 e_scratch:
-	ghcb_set_sw_exit_info_1(ghcb, 2);
+	ghcb_set_sw_exit_info_1(svm->sev_es.ghcb, 2);
-	ghcb_set_sw_exit_info_2(ghcb, GHCB_ERR_INVALID_SCRATCH_AREA);
+	ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, GHCB_ERR_INVALID_SCRATCH_AREA);
 	return 1;
 }
 	struct vcpu_svm *svm = to_svm(vcpu);
 	struct vmcb_control_area *control = &svm->vmcb->control;
 	u64 ghcb_gpa, exit_code;
-	struct ghcb *ghcb;
 	int ret;
 	/* Validate the GHCB */
 	}
 	svm->sev_es.ghcb = svm->sev_es.ghcb_map.hva;
-	ghcb = svm->sev_es.ghcb_map.hva;
-	trace_kvm_vmgexit_enter(vcpu->vcpu_id, ghcb);
+	trace_kvm_vmgexit_enter(vcpu->vcpu_id, svm->sev_es.ghcb);
-	exit_code = ghcb_get_sw_exit_code(ghcb);
+	sev_es_sync_from_ghcb(svm);
 	ret = sev_es_validate_vmgexit(svm);
 	if (ret)
 		return ret;
-	sev_es_sync_from_ghcb(svm);
+	ghcb_set_sw_exit_info_1(svm->sev_es.ghcb, 0);
-	ghcb_set_sw_exit_info_1(ghcb, 0);
+	ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, 0);
-	ghcb_set_sw_exit_info_2(ghcb, 0);
+	exit_code = kvm_ghcb_get_sw_exit_code(control);
 	switch (exit_code) {
 	case SVM_VMGEXIT_MMIO_READ:
 		ret = setup_vmgexit_scratch(svm, true, control->exit_info_2);
 			break;
 		case 1:
 			/* Get AP jump table address */
-			ghcb_set_sw_exit_info_2(ghcb, sev->ap_jump_table);
+			ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, sev->ap_jump_table);
 			break;
 		default:
 			pr_err("svm: vmgexit: unsupported AP jump table request - exit_info_1=%#llx\n",
 			       control->exit_info_1);
-			ghcb_set_sw_exit_info_1(ghcb, 2);
+			ghcb_set_sw_exit_info_1(svm->sev_es.ghcb, 2);
-			ghcb_set_sw_exit_info_2(ghcb, GHCB_ERR_INVALID_INPUT);
+			ghcb_set_sw_exit_info_2(svm->sev_es.ghcb, GHCB_ERR_INVALID_INPUT);
 		}
 		ret = 1;

arch/x86/kvm/svm/svm.c+3−1

@@ -1498,7 +1498,9 @@ static void svm_vcpu_load(struct kvm_vcpu *vcpu, int cpu) · 1497 unmodified lines
1498		1498
1499	if (sd->current_vmcb != svm->vmcb) {	1499	if (sd->current_vmcb != svm->vmcb) {
1500	sd->current_vmcb = svm->vmcb;	1500	sd->current_vmcb = svm->vmcb;
1501	indirect_branch_prediction_barrier();	1501
		1502	if (!cpu_feature_enabled(X86_FEATURE_IBPB_ON_VMEXIT))
		1503	indirect_branch_prediction_barrier();
1502	}	1504	}
1503	if (kvm_vcpu_apicv_active(vcpu))	1505	if (kvm_vcpu_apicv_active(vcpu))
1504	avic_vcpu_load(vcpu, cpu);	1506	avic_vcpu_load(vcpu, cpu);

arch/x86/kvm/svm/svm.h+26−0

@@ -190,10 +190,12 @@ struct vcpu_sev_es_state { · 189 unmodified lines
190	/* SEV-ES support */	190	/* SEV-ES support */
191	struct sev_es_save_area *vmsa;	191	struct sev_es_save_area *vmsa;
192	struct ghcb *ghcb;	192	struct ghcb *ghcb;
		193	u8 valid_bitmap[16];
193	struct kvm_host_map ghcb_map;	194	struct kvm_host_map ghcb_map;
194	bool received_first_sipi;	195	bool received_first_sipi;
195		196
196	/* SEV-ES scratch area support */	197	/* SEV-ES scratch area support */
		198	u64 sw_scratch;
197	void *ghcb_sa;	199	void *ghcb_sa;
198	u32 ghcb_sa_len;	200	u32 ghcb_sa_len;
199	bool ghcb_sa_sync;	201	bool ghcb_sa_sync;
@@ -744,4 +746,28 @@ void sev_es_unmap_ghcb(struct vcpu_svm *svm); · 544 unmodified lines
744	void __svm_sev_es_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted);	746	void __svm_sev_es_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted);
745	void __svm_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted);	747	void __svm_vcpu_run(struct vcpu_svm *svm, bool spec_ctrl_intercepted);
746		748
		749	#define DEFINE_KVM_GHCB_ACCESSORS(field) \
		750	static __always_inline bool kvm_ghcb_##field##_is_valid(const struct vcpu_svm *svm) \
		751	{ \
		752	return test_bit(GHCB_BITMAP_IDX(field), \
		753	(unsigned long *)&svm->sev_es.valid_bitmap); \
		754	} \
		755	\
		756	static __always_inline u64 kvm_ghcb_get_##field##_if_valid(struct vcpu_svm svm, struct ghcb ghcb) \
		757	{ \
		758	return kvm_ghcb_##field##_is_valid(svm) ? ghcb->save.field : 0; \
		759	} \
		760
		761	DEFINE_KVM_GHCB_ACCESSORS(cpl)
		762	DEFINE_KVM_GHCB_ACCESSORS(rax)
		763	DEFINE_KVM_GHCB_ACCESSORS(rcx)
		764	DEFINE_KVM_GHCB_ACCESSORS(rdx)
		765	DEFINE_KVM_GHCB_ACCESSORS(rbx)
		766	DEFINE_KVM_GHCB_ACCESSORS(rsi)
		767	DEFINE_KVM_GHCB_ACCESSORS(sw_exit_code)
		768	DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_1)
		769	DEFINE_KVM_GHCB_ACCESSORS(sw_exit_info_2)
		770	DEFINE_KVM_GHCB_ACCESSORS(sw_scratch)
		771	DEFINE_KVM_GHCB_ACCESSORS(xcr0)
		772
747	#endif	773	#endif

arch/x86/kvm/svm/vmenter.S+3−0

@@ -224,6 +224,9 @@ SYM_FUNC_START(__svm_vcpu_run) · 223 unmodified lines
224	*/	224	*/
225	UNTRAIN_RET	225	UNTRAIN_RET
226		226
		227	/* SRSO */
		228	ALTERNATIVE "", "call entry_ibpb", X86_FEATURE_IBPB_ON_VMEXIT
		229
227	/*	230	/*
228	* Clear all general purpose registers except RSP and RAX to prevent	231	* Clear all general purpose registers except RSP and RAX to prevent
229	* speculative use of the guest's values, even those that are reloaded	232	* speculative use of the guest's values, even those that are reloaded

arch/x86/kvm/x86.c+4−1

 	 ARCH_CAP_SKIP_VMENTRY_L1DFLUSH | ARCH_CAP_SSB_NO | ARCH_CAP_MDS_NO | \
 	 ARCH_CAP_PSCHANGE_MC_NO | ARCH_CAP_TSX_CTRL_MSR | ARCH_CAP_TAA_NO | \
 	 ARCH_CAP_SBDR_SSDP_NO | ARCH_CAP_FBSDP_NO | ARCH_CAP_PSDP_NO | \
-	 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO)
+	 ARCH_CAP_FB_CLEAR | ARCH_CAP_RRSBA | ARCH_CAP_PBRSB_NO | ARCH_CAP_GDS_NO)
 static u64 kvm_get_arch_capabilities(void)
 {
 		 */
 	}
+	if (!boot_cpu_has_bug(X86_BUG_GDS) || gds_ucode_mitigated())
+		data |= ARCH_CAP_GDS_NO;
 	return data;
 }

arch/x86/lib/retpoline.S+79−4

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	#include <asm/unwind_hints.h>	11	#include <asm/unwind_hints.h>
12	#include <asm/percpu.h>	12	#include <asm/percpu.h>
13	#include <asm/frame.h>	13	#include <asm/frame.h>
		14	#include <asm/nops.h>
14		15
15	.section .text.__x86.indirect_thunk	16	.section .text.__x86.indirect_thunk
16		17
@@ -131,6 +132,46 @@ SYM_CODE_END(__x86_indirect_jump_thunk_array) · 114 unmodified lines
131	*/	132	*/
132	#ifdef CONFIG_RETHUNK	133	#ifdef CONFIG_RETHUNK
133		134
		135	/*
		136	* srso_untrain_ret_alias() and srso_safe_ret_alias() are placed at
		137	* special addresses:
		138	*
		139	* - srso_untrain_ret_alias() is 2M aligned
		140	* - srso_safe_ret_alias() is also in the same 2M page but bits 2, 8, 14
		141	* and 20 in its virtual address are set (while those bits in the
		142	* srso_untrain_ret_alias() function are cleared).
		143	*
		144	* This guarantees that those two addresses will alias in the branch
		145	* target buffer of Zen3/4 generations, leading to any potential
		146	* poisoned entries at that BTB slot to get evicted.
		147	*
		148	* As a result, srso_safe_ret_alias() becomes a safe return.
		149	*/
		150	#ifdef CONFIG_CPU_SRSO
		151	.section .text.__x86.rethunk_untrain
		152
		153	SYM_START(srso_untrain_ret_alias, SYM_L_GLOBAL, SYM_A_NONE)
		154	ANNOTATE_NOENDBR
		155	ASM_NOP2
		156	lfence
		157	jmp __x86_return_thunk
		158	SYM_FUNC_END(srso_untrain_ret_alias)
		159	__EXPORT_THUNK(srso_untrain_ret_alias)
		160
		161	.section .text.__x86.rethunk_safe
		162	#endif
		163
		164	/* Needs a definition for the __x86_return_thunk alternative below. */
		165	SYM_START(srso_safe_ret_alias, SYM_L_GLOBAL, SYM_A_NONE)
		166	#ifdef CONFIG_CPU_SRSO
		167	add $8, %_ASM_SP
		168	UNWIND_HINT_FUNC
		169	#endif
		170	ANNOTATE_UNRET_SAFE
		171	ret
		172	int3
		173	SYM_FUNC_END(srso_safe_ret_alias)
		174
134	.section .text.__x86.return_thunk	175	.section .text.__x86.return_thunk
135		176
136	/*	177	/*
@@ -143,7 +184,7 @@ SYM_CODE_END(__x86_indirect_jump_thunk_array) · 6 unmodified lines
143	* from re-poisioning the BTB prediction.	184	* from re-poisioning the BTB prediction.
144	*/	185	*/
145	.align 64	186	.align 64
146	.skip 64 - (__x86_return_thunk - zen_untrain_ret), 0xcc	187	.skip 64 - (__ret - zen_untrain_ret), 0xcc
147	SYM_START(zen_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE)	188	SYM_START(zen_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE)
148	ANNOTATE_NOENDBR	189	ANNOTATE_NOENDBR
149	/*	190	/*
@@ -175,10 +216,10 @@ SYM_START(zen_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE) · 25 unmodified lines
175	* evicted, __x86_return_thunk will suffer Straight Line Speculation	216	* evicted, __x86_return_thunk will suffer Straight Line Speculation
176	* which will be contained safely by the INT3.	217	* which will be contained safely by the INT3.
177	*/	218	*/
178	SYM_INNER_LABEL(__x86_return_thunk, SYM_L_GLOBAL)	219	SYM_INNER_LABEL(__ret, SYM_L_GLOBAL)
179	ret	220	ret
180	int3	221	int3
181	SYM_CODE_END(__x86_return_thunk)	222	SYM_CODE_END(__ret)
182		223
183	/*	224	/*
184	* Ensure the TEST decoding / BTB invalidation is complete.	225	* Ensure the TEST decoding / BTB invalidation is complete.
@@ -189,11 +230,45 @@ SYM_CODE_END(__x86_return_thunk) · 4 unmodified lines
189	* Jump back and execute the RET in the middle of the TEST instruction.	230	* Jump back and execute the RET in the middle of the TEST instruction.
190	* INT3 is for SLS protection.	231	* INT3 is for SLS protection.
191	*/	232	*/
192	jmp __x86_return_thunk	233	jmp __ret
193	int3	234	int3
194	SYM_FUNC_END(zen_untrain_ret)	235	SYM_FUNC_END(zen_untrain_ret)
195	__EXPORT_THUNK(zen_untrain_ret)	236	__EXPORT_THUNK(zen_untrain_ret)
196		237
		238	/*
		239	* SRSO untraining sequence for Zen1/2, similar to zen_untrain_ret()
		240	* above. On kernel entry, srso_untrain_ret() is executed which is a
		241	*
		242	* movabs $0xccccccc308c48348,%rax
		243	*
		244	* and when the return thunk executes the inner label srso_safe_ret()
		245	* later, it is a stack manipulation and a RET which is mispredicted and
		246	* thus a "safe" one to use.
		247	*/
		248	.align 64
		249	.skip 64 - (srso_safe_ret - srso_untrain_ret), 0xcc
		250	SYM_START(srso_untrain_ret, SYM_L_GLOBAL, SYM_A_NONE)
		251	ANNOTATE_NOENDBR
		252	.byte 0x48, 0xb8
		253
		254	SYM_INNER_LABEL(srso_safe_ret, SYM_L_GLOBAL)
		255	add $8, %_ASM_SP
		256	ret
		257	int3
		258	int3
		259	int3
		260	lfence
		261	call srso_safe_ret
		262	int3
		263	SYM_CODE_END(srso_safe_ret)
		264	SYM_FUNC_END(srso_untrain_ret)
		265	__EXPORT_THUNK(srso_untrain_ret)
		266
		267	SYM_FUNC_START(__x86_return_thunk)
		268	ALTERNATIVE_2 "jmp __ret", "call srso_safe_ret", X86_FEATURE_SRSO, \
		269	"call srso_safe_ret_alias", X86_FEATURE_SRSO_ALIAS
		270	int3
		271	SYM_CODE_END(__x86_return_thunk)
197	EXPORT_SYMBOL(__x86_return_thunk)	272	EXPORT_SYMBOL(__x86_return_thunk)
198		273
199	#endif /* CONFIG_RETHUNK */	274	#endif /* CONFIG_RETHUNK */

block/blk-core.c+0−6

 	struct block_device *bdev = bio->bi_bdev;
 	struct request_queue *q = bdev_get_queue(bdev);
 	blk_status_t status = BLK_STS_IOERR;
-	struct blk_plug *plug;
 	might_sleep();
-	plug = blk_mq_plug(bio);
-	if (plug && plug->nowait)
-		bio->bi_opf |= REQ_NOWAIT;
 	/*
 	 * For a REQ_NOWAIT based request, return -EOPNOTSUPP
 	 * if queue does not support NOWAIT.
 	plug->rq_count = 0;
 	plug->multiple_queues = false;
 	plug->has_elevator = false;
-	plug->nowait = false;
 	INIT_LIST_HEAD(&plug->cb_list);
 	/*

block/blk-iocost.c+3−2

 	if (qos[QOS_MIN] > qos[QOS_MAX])
 		goto einval;
-	if (enable) {
+	if (enable && !ioc->enabled) {
 		blk_stat_enable_accounting(disk->queue);
 		blk_queue_flag_set(QUEUE_FLAG_RQ_ALLOC_TIME, disk->queue);
 		ioc->enabled = true;
-	} else {
+	} else if (!enable && ioc->enabled) {
+		blk_stat_disable_accounting(disk->queue);
 		blk_queue_flag_clear(QUEUE_FLAG_RQ_ALLOC_TIME, disk->queue);
 		ioc->enabled = false;
 	}

block/fops.c+4−3

 		task_io_account_write(bio->bi_iter.bi_size);
 	}
+	if (iocb->ki_flags & IOCB_NOWAIT)
+		bio->bi_opf |= REQ_NOWAIT;
 	if (iocb->ki_flags & IOCB_HIPRI) {
-		bio->bi_opf |= REQ_POLLED | REQ_NOWAIT;
+		bio->bi_opf |= REQ_POLLED;
 		submit_bio(bio);
 		WRITE_ONCE(iocb->private, bio);
 	} else {
-		if (iocb->ki_flags & IOCB_NOWAIT)
-			bio->bi_opf |= REQ_NOWAIT;
 		submit_bio(bio);
 	}
 	return -EIOCBQUEUED;

drivers/accel/ivpu/ivpu_gem.c+8−0

 {
 	unsigned int i, npages = bo->base.size >> PAGE_SHIFT;
+	if (ivpu_bo_cache_mode(bo) != DRM_IVPU_BO_CACHED)
+		set_pages_array_wb(bo->pages, bo->base.size >> PAGE_SHIFT);
 	for (i = 0; i < npages; i++)
 		put_page(bo->pages[i]);
 	if (ivpu_bo_cache_mode(bo) != DRM_IVPU_BO_CACHED)
 		drm_clflush_pages(bo->pages, bo->base.size >> PAGE_SHIFT);
+	if (bo->flags & DRM_IVPU_BO_WC)
+		set_pages_array_wc(bo->pages, bo->base.size >> PAGE_SHIFT);
+	else if (bo->flags & DRM_IVPU_BO_UNCACHED)
+		set_pages_array_uc(bo->pages, bo->base.size >> PAGE_SHIFT);
 	prot = ivpu_bo_pgprot(bo, PAGE_KERNEL);
 	bo->kvaddr = vmap(bo->pages, bo->base.size >> PAGE_SHIFT, VM_MAP, prot);
 	if (!bo->kvaddr) {

drivers/acpi/resource.c+64−0

@@ -470,6 +470,45 @@ static const struct dmi_system_id asus_laptop[] = { · 469 unmodified lines
470	{ }	470	{ }
471	};	471	};
472		472
		473	static const struct dmi_system_id tongfang_gm_rg[] = {
		474	{
		475	.ident = "TongFang GMxRGxx/XMG CORE 15 (M22)/TUXEDO Stellaris 15 Gen4 AMD",
		476	.matches = {
		477	DMI_MATCH(DMI_BOARD_NAME, "GMxRGxx"),
		478	},
		479	},
		480	{ }
		481	};
		482
		483	static const struct dmi_system_id maingear_laptop[] = {
		484	{
		485	.ident = "MAINGEAR Vector Pro 2 15",
		486	.matches = {
		487	DMI_MATCH(DMI_SYS_VENDOR, "Micro Electronics Inc"),
		488	DMI_MATCH(DMI_PRODUCT_NAME, "MG-VCP2-15A3070T"),
		489	}
		490	},
		491	{
		492	.ident = "MAINGEAR Vector Pro 2 17",
		493	.matches = {
		494	DMI_MATCH(DMI_SYS_VENDOR, "Micro Electronics Inc"),
		495	DMI_MATCH(DMI_PRODUCT_NAME, "MG-VCP2-17A3070T"),
		496	},
		497	},
		498	{ }
		499	};
		500
		501	static const struct dmi_system_id pcspecialist_laptop[] = {
		502	{
		503	.ident = "PCSpecialist Elimina Pro 16 M",
		504	.matches = {
		505	DMI_MATCH(DMI_SYS_VENDOR, "PCSpecialist"),
		506	DMI_MATCH(DMI_PRODUCT_NAME, "Elimina Pro 16 M"),
		507	},
		508	},
		509	{ }
		510	};
		511
473	static const struct dmi_system_id lg_laptop[] = {	512	static const struct dmi_system_id lg_laptop[] = {
474	{	513	{
475	.ident = "LG Electronics 17U70P",	514	.ident = "LG Electronics 17U70P",
@@ -493,6 +532,9 @@ struct irq_override_cmp { · 17 unmodified lines
493	static const struct irq_override_cmp override_table[] = {	532	static const struct irq_override_cmp override_table[] = {
494	{ medion_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },	533	{ medion_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },
495	{ asus_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },	534	{ asus_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },
		535	{ tongfang_gm_rg, 1, ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_LOW, 1, true },
		536	{ maingear_laptop, 1, ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_LOW, 1, true },
		537	{ pcspecialist_laptop, 1, ACPI_EDGE_SENSITIVE, ACPI_ACTIVE_LOW, 1, true },
496	{ lg_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },	538	{ lg_laptop, 1, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_LOW, 0, false },
497	};	539	};
498		540
@@ -512,6 +554,28 @@ static bool acpi_dev_irq_override(u32 gsi, u8 triggering, u8 polarity, · 13 unmodified lines
512	return entry->override;	554	return entry->override;
513	}	555	}
514		556
		557	#ifdef CONFIG_X86
		558	/*
		559	* Always use the MADT override info, except for the i8042 PS/2 ctrl
		560	* IRQs (1 and 12). For these the DSDT IRQ settings should sometimes
		561	* be used otherwise PS/2 keyboards / mice will not work.
		562	*/
		563	if (gsi != 1 && gsi != 12)
		564	return true;
		565
		566	/* If the override comes from an INT_SRC_OVR MADT entry, honor it. */
		567	if (acpi_int_src_ovr[gsi])
		568	return true;
		569
		570	/*
		571	* IRQ override isn't needed on modern AMD Zen systems and
		572	* this override breaks active low IRQs on AMD Ryzen 6000 and
		573	* newer systems. Skip it.
		574	*/
		575	if (boot_cpu_has(X86_FEATURE_ZEN))
		576	return false;
		577	#endif
		578
515	return true;	579	return true;
516	}	580	}
517		581

drivers/acpi/scan.c+1−0

@@ -1714,6 +1714,7 @@ static bool acpi_device_enumeration_by_parent(struct acpi_device *device) · 1713 unmodified lines
1714	{"BSG1160", },	1714	{"BSG1160", },
1715	{"BSG2150", },	1715	{"BSG2150", },
1716	{"CSC3551", },	1716	{"CSC3551", },
		1717	{"CSC3556", },
1717	{"INT33FE", },	1718	{"INT33FE", },
1718	{"INT3515", },	1719	{"INT3515", },
1719	/* Non-conforming _HID for Cirrus Logic already released */	1720	/* Non-conforming _HID for Cirrus Logic already released */

drivers/android/binder.c+1−0

@@ -6617,6 +6617,7 @@ err_init_binder_device_failed: · 6616 unmodified lines
6617		6617
6618	err_alloc_device_names_failed:	6618	err_alloc_device_names_failed:
6619	debugfs_remove_recursive(binder_debugfs_dir_entry_root);	6619	debugfs_remove_recursive(binder_debugfs_dir_entry_root);
		6620	binder_alloc_shrinker_exit();
6620		6621
6621	return ret;	6622	return ret;
6622	}	6623	}

drivers/android/binder_alloc.c+6−0

 	return ret;
 }
+void binder_alloc_shrinker_exit(void)
+{
+	unregister_shrinker(&binder_shrinker);
+	list_lru_destroy(&binder_alloc_lru);
+}
 /**
  * check_buffer() - verify that buffer/offset is safe to access
  * @alloc: binder_alloc for this proc

drivers/android/binder_alloc.h+1−0

@@ -129,6 +129,7 @@ extern struct binder_buffer binder_alloc_new_buf(struct binder_alloc alloc, · 128 unmodified lines
129	int pid);	129	int pid);
130	extern void binder_alloc_init(struct binder_alloc *alloc);	130	extern void binder_alloc_init(struct binder_alloc *alloc);
131	extern int binder_alloc_shrinker_init(void);	131	extern int binder_alloc_shrinker_init(void);
		132	extern void binder_alloc_shrinker_exit(void);
132	extern void binder_alloc_vma_close(struct binder_alloc *alloc);	133	extern void binder_alloc_vma_close(struct binder_alloc *alloc);
133	extern struct binder_buffer *	134	extern struct binder_buffer *
134	binder_alloc_prepare_to_free(struct binder_alloc *alloc,	135	binder_alloc_prepare_to_free(struct binder_alloc *alloc,

drivers/ata/libata-scsi.c+7−0

 		}
 	} else {
 		sdev->sector_size = ata_id_logical_sector_size(dev->id);
+		/*
+		 * Stop the drive on suspend but do not issue START STOP UNIT
+		 * on resume as this is not necessary and may fail: the device
+		 * will be woken up by ata_port_pm_resume() with a port reset
+		 * and device revalidation.
+		 */
 		sdev->manage_start_stop = 1;
+		sdev->no_start_on_resume = 1;
 	}
 	/*

drivers/base/cpu.c+23−62

@@ -509,73 +509,30 @@ static void __init cpu_dev_register_generic(void) · 508 unmodified lines
509	}	509	}
510		510
511	#ifdef CONFIG_GENERIC_CPU_VULNERABILITIES	511	#ifdef CONFIG_GENERIC_CPU_VULNERABILITIES
512		512	static ssize_t cpu_show_not_affected(struct device *dev,
513	ssize_t __weak cpu_show_meltdown(struct device *dev,
514	struct device_attribute attr, char buf)
515	{
516	return sysfs_emit(buf, "Not affected\n");
517	}
518
519	ssize_t __weak cpu_show_spectre_v1(struct device *dev,
520	struct device_attribute attr, char buf)
521	{
522	return sysfs_emit(buf, "Not affected\n");
523	}
524
525	ssize_t __weak cpu_show_spectre_v2(struct device *dev,
526	struct device_attribute attr, char buf)
527	{
528	return sysfs_emit(buf, "Not affected\n");
529	}
530
531	ssize_t __weak cpu_show_spec_store_bypass(struct device *dev,
532	struct device_attribute attr, char buf)
533	{
534	return sysfs_emit(buf, "Not affected\n");
535	}
536
537	ssize_t __weak cpu_show_l1tf(struct device *dev,
538	struct device_attribute attr, char buf)
539	{
540	return sysfs_emit(buf, "Not affected\n");
541	}
542
543	ssize_t __weak cpu_show_mds(struct device *dev,
544	struct device_attribute attr, char buf)
545	{
546	return sysfs_emit(buf, "Not affected\n");
547	}
548
549	ssize_t __weak cpu_show_tsx_async_abort(struct device *dev,
550	struct device_attribute *attr,
551	char *buf)
552	{
553	return sysfs_emit(buf, "Not affected\n");
554	}
555
556	ssize_t __weak cpu_show_itlb_multihit(struct device *dev,
557	struct device_attribute attr, char buf)
558	{
559	return sysfs_emit(buf, "Not affected\n");
560	}
561
562	ssize_t __weak cpu_show_srbds(struct device *dev,
563	struct device_attribute attr, char buf)	513	struct device_attribute attr, char buf)
564	{	514	{
565	return sysfs_emit(buf, "Not affected\n");	515	return sysfs_emit(buf, "Not affected\n");
566	}	516	}
567		517
568	ssize_t __weak cpu_show_mmio_stale_data(struct device *dev,	518	#define CPU_SHOW_VULN_FALLBACK(func) \
569	struct device_attribute attr, char buf)	519	ssize_t cpu_show_##func(struct device *, \
570	{	520	struct device_attribute , char ) \
571	return sysfs_emit(buf, "Not affected\n");	521	__attribute__((weak, alias("cpu_show_not_affected")))
572	}	522
573		523	CPU_SHOW_VULN_FALLBACK(meltdown);
574	ssize_t __weak cpu_show_retbleed(struct device *dev,	524	CPU_SHOW_VULN_FALLBACK(spectre_v1);
575	struct device_attribute attr, char buf)	525	CPU_SHOW_VULN_FALLBACK(spectre_v2);
576	{	526	CPU_SHOW_VULN_FALLBACK(spec_store_bypass);
577	return sysfs_emit(buf, "Not affected\n");	527	CPU_SHOW_VULN_FALLBACK(l1tf);
578	}	528	CPU_SHOW_VULN_FALLBACK(mds);
		529	CPU_SHOW_VULN_FALLBACK(tsx_async_abort);
		530	CPU_SHOW_VULN_FALLBACK(itlb_multihit);
		531	CPU_SHOW_VULN_FALLBACK(srbds);
		532	CPU_SHOW_VULN_FALLBACK(mmio_stale_data);
		533	CPU_SHOW_VULN_FALLBACK(retbleed);
		534	CPU_SHOW_VULN_FALLBACK(spec_rstack_overflow);
		535	CPU_SHOW_VULN_FALLBACK(gds);
579		536
580	static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);	537	static DEVICE_ATTR(meltdown, 0444, cpu_show_meltdown, NULL);
581	static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);	538	static DEVICE_ATTR(spectre_v1, 0444, cpu_show_spectre_v1, NULL);
@@ -588,6 +545,8 @@ static DEVICE_ATTR(itlb_multihit, 0444, cpu_show_itlb_multihit, NULL); · 6 unmodified lines
588	static DEVICE_ATTR(srbds, 0444, cpu_show_srbds, NULL);	545	static DEVICE_ATTR(srbds, 0444, cpu_show_srbds, NULL);
589	static DEVICE_ATTR(mmio_stale_data, 0444, cpu_show_mmio_stale_data, NULL);	546	static DEVICE_ATTR(mmio_stale_data, 0444, cpu_show_mmio_stale_data, NULL);
590	static DEVICE_ATTR(retbleed, 0444, cpu_show_retbleed, NULL);	547	static DEVICE_ATTR(retbleed, 0444, cpu_show_retbleed, NULL);
		548	static DEVICE_ATTR(spec_rstack_overflow, 0444, cpu_show_spec_rstack_overflow, NULL);
		549	static DEVICE_ATTR(gather_data_sampling, 0444, cpu_show_gds, NULL);
591		550
592	static struct attribute *cpu_root_vulnerabilities_attrs[] = {	551	static struct attribute *cpu_root_vulnerabilities_attrs[] = {
593	&dev_attr_meltdown.attr,	552	&dev_attr_meltdown.attr,
@@ -601,6 +560,8 @@ static struct attribute *cpu_root_vulnerabilities_attrs[] = { · 7 unmodified lines
601	&dev_attr_srbds.attr,	560	&dev_attr_srbds.attr,
602	&dev_attr_mmio_stale_data.attr,	561	&dev_attr_mmio_stale_data.attr,
603	&dev_attr_retbleed.attr,	562	&dev_attr_retbleed.attr,
		563	&dev_attr_spec_rstack_overflow.attr,
		564	&dev_attr_gather_data_sampling.attr,
604	NULL	565	NULL
605	};	566	};
606		567

drivers/block/rbd.c+15−13

 	ret = ceph_cls_lock(osdc, &rbd_dev->header_oid, &rbd_dev->header_oloc,
 			    RBD_LOCK_NAME, CEPH_CLS_LOCK_EXCLUSIVE, cookie,
 			    RBD_LOCK_TAG, "", 0);
-	if (ret)
+	if (ret && ret != -EEXIST)
 		return ret;
 	__rbd_lock(rbd_dev, cookie);
 				 &rbd_dev->header_oloc, RBD_LOCK_NAME,
 				 &lock_type, &lock_tag, &lockers, &num_lockers);
 	if (ret) {
-		rbd_warn(rbd_dev, "failed to retrieve lockers: %d", ret);
+		rbd_warn(rbd_dev, "failed to get header lockers: %d", ret);
 		return ERR_PTR(ret);
 	}
 	ret = ceph_osdc_list_watchers(osdc, &rbd_dev->header_oid,
 				      &rbd_dev->header_oloc, &watchers,
 				      &num_watchers);
-	if (ret)
+	if (ret) {
+		rbd_warn(rbd_dev, "failed to get watchers: %d", ret);
 		return ret;
+	}
 	sscanf(locker->id.cookie, RBD_LOCK_COOKIE_PREFIX " %llu", &cookie);
 	for (i = 0; i < num_watchers; i++) {
 		locker = refreshed_locker = NULL;
 		ret = rbd_lock(rbd_dev);
-		if (ret != -EBUSY)
+		if (!ret)
+			goto out;
+		if (ret != -EBUSY) {
+			rbd_warn(rbd_dev, "failed to lock header: %d", ret);
 			goto out;
+		}
 		/* determine if the current lock holder is still alive */
 		locker = get_lock_owner_info(rbd_dev);
 	ret = rbd_try_lock(rbd_dev);
 	if (ret < 0) {
-		rbd_warn(rbd_dev, "failed to lock header: %d", ret);
+		rbd_warn(rbd_dev, "failed to acquire lock: %d", ret);
-		if (ret == -EBLOCKLISTED)
+		goto out;
-			goto out;
-		ret = 1; /* request lock anyway */
 	}
 	if (ret > 0) {
 		up_write(&rbd_dev->lock_rwsem);
 		cancel_delayed_work_sync(&rbd_dev->lock_dwork);
 		if (!ret)
 			ret = -ETIMEDOUT;
-	}
-	if (ret) {
+		rbd_warn(rbd_dev, "failed to acquire lock: %ld", ret);
-		rbd_warn(rbd_dev, "failed to acquire exclusive lock: %ld", ret);
-		return ret;
 	}
+	if (ret)
+		return ret;
 	/*
 	 * The lock may have been released by now, unless automatic lock

drivers/block/zram/zram_drv.c+20−12

@@ -1870,15 +1870,16 @@ static void zram_bio_discard(struct zram zram, struct bio bio) · 1869 unmodified lines
1870		1870
1871	static void zram_bio_read(struct zram zram, struct bio bio)	1871	static void zram_bio_read(struct zram zram, struct bio bio)
1872	{	1872	{
1873	struct bvec_iter iter;	1873	unsigned long start_time = bio_start_io_acct(bio);
1874	struct bio_vec bv;	1874	struct bvec_iter iter = bio->bi_iter;
1875	unsigned long start_time;
1876		1875
1877	start_time = bio_start_io_acct(bio);	1876	do {
1878	bio_for_each_segment(bv, bio, iter) {
1879	u32 index = iter.bi_sector >> SECTORS_PER_PAGE_SHIFT;	1877	u32 index = iter.bi_sector >> SECTORS_PER_PAGE_SHIFT;
1880	u32 offset = (iter.bi_sector & (SECTORS_PER_PAGE - 1)) <<	1878	u32 offset = (iter.bi_sector & (SECTORS_PER_PAGE - 1)) <<
1881	SECTOR_SHIFT;	1879	SECTOR_SHIFT;
		1880	struct bio_vec bv = bio_iter_iovec(bio, iter);
		1881
		1882	bv.bv_len = min_t(u32, bv.bv_len, PAGE_SIZE - offset);
1882		1883
1883	if (zram_bvec_read(zram, &bv, index, offset, bio) < 0) {	1884	if (zram_bvec_read(zram, &bv, index, offset, bio) < 0) {
1884	atomic64_inc(&zram->stats.failed_reads);	1885	atomic64_inc(&zram->stats.failed_reads);
@@ -1890,22 +1891,26 @@ static void zram_bio_read(struct zram zram, struct bio bio) · 5 unmodified lines
1890	zram_slot_lock(zram, index);	1891	zram_slot_lock(zram, index);
1891	zram_accessed(zram, index);	1892	zram_accessed(zram, index);
1892	zram_slot_unlock(zram, index);	1893	zram_slot_unlock(zram, index);
1893	}	1894
		1895	bio_advance_iter_single(bio, &iter, bv.bv_len);
		1896	} while (iter.bi_size);
		1897
1894	bio_end_io_acct(bio, start_time);	1898	bio_end_io_acct(bio, start_time);
1895	bio_endio(bio);	1899	bio_endio(bio);
1896	}	1900	}
1897		1901
1898	static void zram_bio_write(struct zram zram, struct bio bio)	1902	static void zram_bio_write(struct zram zram, struct bio bio)
1899	{	1903	{
1900	struct bvec_iter iter;	1904	unsigned long start_time = bio_start_io_acct(bio);
1901	struct bio_vec bv;	1905	struct bvec_iter iter = bio->bi_iter;
1902	unsigned long start_time;
1903		1906
1904	start_time = bio_start_io_acct(bio);	1907	do {
1905	bio_for_each_segment(bv, bio, iter) {
1906	u32 index = iter.bi_sector >> SECTORS_PER_PAGE_SHIFT;	1908	u32 index = iter.bi_sector >> SECTORS_PER_PAGE_SHIFT;
1907	u32 offset = (iter.bi_sector & (SECTORS_PER_PAGE - 1)) <<	1909	u32 offset = (iter.bi_sector & (SECTORS_PER_PAGE - 1)) <<
1908	SECTOR_SHIFT;	1910	SECTOR_SHIFT;
		1911	struct bio_vec bv = bio_iter_iovec(bio, iter);
		1912
		1913	bv.bv_len = min_t(u32, bv.bv_len, PAGE_SIZE - offset);
1909		1914
1910	if (zram_bvec_write(zram, &bv, index, offset, bio) < 0) {	1915	if (zram_bvec_write(zram, &bv, index, offset, bio) < 0) {
1911	atomic64_inc(&zram->stats.failed_writes);	1916	atomic64_inc(&zram->stats.failed_writes);
@@ -1916,7 +1921,10 @@ static void zram_bio_write(struct zram zram, struct bio bio) · 4 unmodified lines
1916	zram_slot_lock(zram, index);	1921	zram_slot_lock(zram, index);
1917	zram_accessed(zram, index);	1922	zram_accessed(zram, index);
1918	zram_slot_unlock(zram, index);	1923	zram_slot_unlock(zram, index);
1919	}	1924
		1925	bio_advance_iter_single(bio, &iter, bv.bv_len);
		1926	} while (iter.bi_size);
		1927
1920	bio_end_io_acct(bio, start_time);	1928	bio_end_io_acct(bio, start_time);
1921	bio_endio(bio);	1929	bio_endio(bio);
1922	}	1930	}

drivers/char/tpm/tpm-chip.c+14−69

@@ -510,70 +510,6 @@ static int tpm_add_legacy_sysfs(struct tpm_chip *chip) · 509 unmodified lines
510	return 0;	510	return 0;
511	}	511	}
512		512
513	/*
514	* Some AMD fTPM versions may cause stutter
515	* https://www.amd.com/en/support/kb/faq/pa-410
516	*
517	* Fixes are available in two series of fTPM firmware:
518	* 6.x.y.z series: 6.0.18.6 +
519	* 3.x.y.z series: 3.57.y.5 +
520	*/
521	#ifdef CONFIG_X86
522	static bool tpm_amd_is_rng_defective(struct tpm_chip *chip)
523	{
524	u32 val1, val2;
525	u64 version;
526	int ret;
527
528	if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
529	return false;
530
531	ret = tpm_request_locality(chip);
532	if (ret)
533	return false;
534
535	ret = tpm2_get_tpm_pt(chip, TPM2_PT_MANUFACTURER, &val1, NULL);
536	if (ret)
537	goto release;
538	if (val1 != 0x414D4400U /* AMD */) {
539	ret = -ENODEV;
540	goto release;
541	}
542	ret = tpm2_get_tpm_pt(chip, TPM2_PT_FIRMWARE_VERSION_1, &val1, NULL);
543	if (ret)
544	goto release;
545	ret = tpm2_get_tpm_pt(chip, TPM2_PT_FIRMWARE_VERSION_2, &val2, NULL);
546
547	release:
548	tpm_relinquish_locality(chip);
549
550	if (ret)
551	return false;
552
553	version = ((u64)val1 << 32) \| val2;
554	if ((version >> 48) == 6) {
555	if (version >= 0x0006000000180006ULL)
556	return false;
557	} else if ((version >> 48) == 3) {
558	if (version >= 0x0003005700000005ULL)
559	return false;
560	} else {
561	return false;
562	}
563
564	dev_warn(&chip->dev,
565	"AMD fTPM version 0x%llx causes system stutter; hwrng disabled\n",
566	version);
567
568	return true;
569	}
570	#else
571	static inline bool tpm_amd_is_rng_defective(struct tpm_chip *chip)
572	{
573	return false;
574	}
575	#endif /* CONFIG_X86 */
576
577	static int tpm_hwrng_read(struct hwrng rng, void data, size_t max, bool wait)	513	static int tpm_hwrng_read(struct hwrng rng, void data, size_t max, bool wait)
578	{	514	{
579	struct tpm_chip *chip = container_of(rng, struct tpm_chip, hwrng);	515	struct tpm_chip *chip = container_of(rng, struct tpm_chip, hwrng);
@@ -585,10 +521,20 @@ static int tpm_hwrng_read(struct hwrng rng, void data, size_t max, bool wait) · 5 unmodified lines
585	return tpm_get_random(chip, data, max);	521	return tpm_get_random(chip, data, max);
586	}	522	}
587		523
		524	static bool tpm_is_hwrng_enabled(struct tpm_chip *chip)
		525	{
		526	if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM))
		527	return false;
		528	if (tpm_is_firmware_upgrade(chip))
		529	return false;
		530	if (chip->flags & TPM_CHIP_FLAG_HWRNG_DISABLED)
		531	return false;
		532	return true;
		533	}
		534
588	static int tpm_add_hwrng(struct tpm_chip *chip)	535	static int tpm_add_hwrng(struct tpm_chip *chip)
589	{	536	{
590	if (!IS_ENABLED(CONFIG_HW_RANDOM_TPM) \|\| tpm_is_firmware_upgrade(chip) \|\|	537	if (!tpm_is_hwrng_enabled(chip))
591	tpm_amd_is_rng_defective(chip))
592	return 0;	538	return 0;
593		539
594	snprintf(chip->hwrng_name, sizeof(chip->hwrng_name),	540	snprintf(chip->hwrng_name, sizeof(chip->hwrng_name),
@@ -693,7 +639,7 @@ int tpm_chip_register(struct tpm_chip *chip) · 98 unmodified lines
693	return 0;	639	return 0;
694		640
695	out_hwrng:	641	out_hwrng:
696	if (IS_ENABLED(CONFIG_HW_RANDOM_TPM) && !tpm_is_firmware_upgrade(chip))	642	if (tpm_is_hwrng_enabled(chip))
697	hwrng_unregister(&chip->hwrng);	643	hwrng_unregister(&chip->hwrng);
698	out_ppi:	644	out_ppi:
699	tpm_bios_log_teardown(chip);	645	tpm_bios_log_teardown(chip);
@@ -718,8 +664,7 @@ EXPORT_SYMBOL_GPL(tpm_chip_register); · 18 unmodified lines
718	void tpm_chip_unregister(struct tpm_chip *chip)	664	void tpm_chip_unregister(struct tpm_chip *chip)
719	{	665	{
720	tpm_del_legacy_sysfs(chip);	666	tpm_del_legacy_sysfs(chip);
721	if (IS_ENABLED(CONFIG_HW_RANDOM_TPM) && !tpm_is_firmware_upgrade(chip) &&	667	if (tpm_is_hwrng_enabled(chip))
722	!tpm_amd_is_rng_defective(chip))
723	hwrng_unregister(&chip->hwrng);	668	hwrng_unregister(&chip->hwrng);
724	tpm_bios_log_teardown(chip);	669	tpm_bios_log_teardown(chip);
725	if (chip->flags & TPM_CHIP_FLAG_TPM2 && !tpm_is_firmware_upgrade(chip))	670	if (chip->flags & TPM_CHIP_FLAG_TPM2 && !tpm_is_firmware_upgrade(chip))

drivers/char/tpm/tpm_crb.c+30−0

@@ -463,6 +463,28 @@ static bool crb_req_canceled(struct tpm_chip *chip, u8 status) · 462 unmodified lines
463	return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;	463	return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
464	}	464	}
465		465
		466	static int crb_check_flags(struct tpm_chip *chip)
		467	{
		468	u32 val;
		469	int ret;
		470
		471	ret = crb_request_locality(chip, 0);
		472	if (ret)
		473	return ret;
		474
		475	ret = tpm2_get_tpm_pt(chip, TPM2_PT_MANUFACTURER, &val, NULL);
		476	if (ret)
		477	goto release;
		478
		479	if (val == 0x414D4400U /* AMD */)
		480	chip->flags \|= TPM_CHIP_FLAG_HWRNG_DISABLED;
		481
		482	release:
		483	crb_relinquish_locality(chip, 0);
		484
		485	return ret;
		486	}
		487
466	static const struct tpm_class_ops tpm_crb = {	488	static const struct tpm_class_ops tpm_crb = {
467	.flags = TPM_OPS_AUTO_STARTUP,	489	.flags = TPM_OPS_AUTO_STARTUP,
468	.status = crb_status,	490	.status = crb_status,
@@ -800,6 +822,14 @@ static int crb_acpi_add(struct acpi_device *device) · 331 unmodified lines
800	chip->acpi_dev_handle = device->handle;	822	chip->acpi_dev_handle = device->handle;
801	chip->flags = TPM_CHIP_FLAG_TPM2;	823	chip->flags = TPM_CHIP_FLAG_TPM2;
802		824
		825	rc = tpm_chip_bootstrap(chip);
		826	if (rc)
		827	goto out;
		828
		829	rc = crb_check_flags(chip);
		830	if (rc)
		831	goto out;
		832
803	rc = tpm_chip_register(chip);	833	rc = tpm_chip_register(chip);
804		834
805	out:	835	out:

drivers/char/tpm/tpm_tis.c+18−2

 	tpm_tis_flush(iobase);
 }
-static int interrupts = -1;
+static int interrupts;
 module_param(interrupts, int, 0444);
 MODULE_PARM_DESC(interrupts, "Enable interrupts");
 			DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L590"),
 		},
 	},
+	{
+		.callback = tpm_tis_disable_irq,
+		.ident = "ThinkStation P620",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
+			DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkStation P620"),
+		},
+	},
+	{
+		.callback = tpm_tis_disable_irq,
+		.ident = "TUXEDO InfinityBook S 15/17 Gen7",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "TUXEDO"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "TUXEDO InfinityBook S 15/17 Gen7"),
+		},
+	},
 	{
 		.callback = tpm_tis_disable_irq,
 		.ident = "UPX-TGL",
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "AAEON"),
-			DMI_MATCH(DMI_PRODUCT_VERSION, "UPX-TGL"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "UPX-TGL01"),
 		},
 	},
 	{}

drivers/clk/Kconfig+1−0

@@ -444,6 +444,7 @@ config COMMON_CLK_BD718XX · 443 unmodified lines
444	config COMMON_CLK_FIXED_MMIO	444	config COMMON_CLK_FIXED_MMIO
445	bool "Clock driver for Memory Mapped Fixed values"	445	bool "Clock driver for Memory Mapped Fixed values"
446	depends on COMMON_CLK && OF	446	depends on COMMON_CLK && OF
		447	depends on HAS_IOMEM
447	help	448	help
448	Support for Memory Mapped IO Fixed clocks	449	Support for Memory Mapped IO Fixed clocks
449		450

drivers/clk/imx/clk-imx93.c+1−1

@@ -291,7 +291,7 @@ static int imx93_clocks_probe(struct platform_device *pdev) · 290 unmodified lines
291	anatop_base = devm_of_iomap(dev, np, 0, NULL);	291	anatop_base = devm_of_iomap(dev, np, 0, NULL);
292	of_node_put(np);	292	of_node_put(np);
293	if (WARN_ON(IS_ERR(anatop_base))) {	293	if (WARN_ON(IS_ERR(anatop_base))) {
294	ret = PTR_ERR(base);	294	ret = PTR_ERR(anatop_base);
295	goto unregister_hws;	295	goto unregister_hws;
296	}	296	}
297		297

drivers/clk/mediatek/clk-mt8183.c+27−0

 	"syspll_d5"
 };
+static const char * const sspm_parents[] = {
+	"clk26m",
+	"univpll_d2_d4",
+	"syspll_d2_d2",
+	"univpll_d2_d2",
+	"syspll_d3"
+};
 static const char * const dpi0_parents[] = {
 	"clk26m",
 	"tvdpll_d2",
 	/* CLK_CFG_6 */
 	MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_ATB, "atb_sel",
 		atb_parents, 0xa0, 0xa4, 0xa8, 0, 2, 7, 0x004, 24),
+	MUX_GATE_CLR_SET_UPD_FLAGS(CLK_TOP_MUX_SSPM, "sspm_sel",
+				   sspm_parents, 0xa0, 0xa4, 0xa8, 8, 3, 15, 0x004, 25,
+				   CLK_IS_CRITICAL | CLK_SET_RATE_PARENT),
 	MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_DPI0, "dpi0_sel",
 		dpi0_parents, 0xa0, 0xa4, 0xa8, 16, 4, 23, 0x004, 26),
 	MUX_GATE_CLR_SET_UPD(CLK_TOP_MUX_SCAM, "scam_sel",
 	GATE_MTK(_id, _name, _parent, &infra2_cg_regs, _shift,	\
 		&mtk_clk_gate_ops_setclr)
+#define GATE_INFRA2_FLAGS(_id, _name, _parent, _shift, _flag)	\
+	GATE_MTK_FLAGS(_id, _name, _parent, &infra2_cg_regs, 	\
+		       _shift, &mtk_clk_gate_ops_setclr, _flag)
 #define GATE_INFRA3(_id, _name, _parent, _shift)		\
 	GATE_MTK(_id, _name, _parent, &infra3_cg_regs, _shift,	\
 		&mtk_clk_gate_ops_setclr)
+#define GATE_INFRA3_FLAGS(_id, _name, _parent, _shift, _flag)	\
+	GATE_MTK_FLAGS(_id, _name, _parent, &infra3_cg_regs, 	\
+		       _shift, &mtk_clk_gate_ops_setclr, _flag)
 static const struct mtk_gate infra_clks[] = {
 	/* INFRA0 */
 	GATE_INFRA0(CLK_INFRA_PMIC_TMR, "infra_pmic_tmr", "axi_sel", 0),
 	GATE_INFRA2(CLK_INFRA_UNIPRO_TICK, "infra_unipro_tick", "fufs_sel", 12),
 	GATE_INFRA2(CLK_INFRA_UFS_MP_SAP_BCLK, "infra_ufs_mp_sap_bck", "fufs_sel", 13),
 	GATE_INFRA2(CLK_INFRA_MD32_BCLK, "infra_md32_bclk", "axi_sel", 14),
+	/* infra_sspm is main clock in co-processor, should not be closed in Linux. */
+	GATE_INFRA2_FLAGS(CLK_INFRA_SSPM, "infra_sspm", "sspm_sel", 15, CLK_IS_CRITICAL),
 	GATE_INFRA2(CLK_INFRA_UNIPRO_MBIST, "infra_unipro_mbist", "axi_sel", 16),
+	/* infra_sspm_bus_hclk is main clock in co-processor, should not be closed in Linux. */
+	GATE_INFRA2_FLAGS(CLK_INFRA_SSPM_BUS_HCLK, "infra_sspm_bus_hclk", "axi_sel", 17, CLK_IS_CRITICAL),
 	GATE_INFRA2(CLK_INFRA_I2C5, "infra_i2c5", "i2c_sel", 18),
 	GATE_INFRA2(CLK_INFRA_I2C5_ARBITER, "infra_i2c5_arbiter", "i2c_sel", 19),
 	GATE_INFRA2(CLK_INFRA_I2C5_IMM, "infra_i2c5_imm", "i2c_sel", 20),
 	GATE_INFRA3(CLK_INFRA_MSDC0_SELF, "infra_msdc0_self", "msdc50_0_sel", 0),
 	GATE_INFRA3(CLK_INFRA_MSDC1_SELF, "infra_msdc1_self", "msdc50_0_sel", 1),
 	GATE_INFRA3(CLK_INFRA_MSDC2_SELF, "infra_msdc2_self", "msdc50_0_sel", 2),
+	/* infra_sspm_26m_self is main clock in co-processor, should not be closed in Linux. */
+	GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_26M_SELF, "infra_sspm_26m_self", "f_f26m_ck", 3, CLK_IS_CRITICAL),
+	/* infra_sspm_32k_self is main clock in co-processor, should not be closed in Linux. */
+	GATE_INFRA3_FLAGS(CLK_INFRA_SSPM_32K_SELF, "infra_sspm_32k_self", "f_f26m_ck", 4, CLK_IS_CRITICAL),
 	GATE_INFRA3(CLK_INFRA_UFS_AXI, "infra_ufs_axi", "axi_sel", 5),
 	GATE_INFRA3(CLK_INFRA_I2C6, "infra_i2c6", "i2c_sel", 6),
 	GATE_INFRA3(CLK_INFRA_AP_MSDC0, "infra_ap_msdc0", "msdc50_hclk_sel", 7),

drivers/clk/meson/clk-pll.c+2−2

@@ -367,9 +367,9 @@ static int meson_clk_pll_enable(struct clk_hw *hw) · 366 unmodified lines
367	* 3. enable the lock detect module	367	* 3. enable the lock detect module
368	*/	368	*/
369	if (MESON_PARM_APPLICABLE(&pll->current_en)) {	369	if (MESON_PARM_APPLICABLE(&pll->current_en)) {
370	usleep_range(10, 20);	370	udelay(10);
371	meson_parm_write(clk->map, &pll->current_en, 1);	371	meson_parm_write(clk->map, &pll->current_en, 1);
372	usleep_range(40, 50);	372	udelay(40);
373	}	373	}
374		374
375	if (MESON_PARM_APPLICABLE(&pll->l_detect)) {	375	if (MESON_PARM_APPLICABLE(&pll->l_detect)) {

drivers/counter/Kconfig+7−7

 # Counter devices
 #
-menuconfig COUNTER
-	tristate "Counter support"
-	help
-	  This enables counter device support through the Generic Counter
-	  interface. You only need to enable this, if you also want to enable
-	  one or more of the counter device drivers below.
 config I8254
 	tristate
 	select COUNTER
 	  If built as a module its name will be i8254.
+menuconfig COUNTER
+	tristate "Counter support"
+	help
+	  This enables counter device support through the Generic Counter
+	  interface. You only need to enable this, if you also want to enable
+	  one or more of the counter device drivers below.
 if COUNTER
 config 104_QUAD_8

drivers/cpufreq/amd-pstate.c+5−5

@@ -1012,8 +1012,8 @@ static int amd_pstate_update_status(const char *buf, size_t size) · 1011 unmodified lines
1012	return 0;	1012	return 0;
1013	}	1013	}
1014		1014
1015	static ssize_t show_status(struct kobject *kobj,	1015	static ssize_t status_show(struct device *dev,
1016	struct kobj_attribute attr, char buf)	1016	struct device_attribute attr, char buf)
1017	{	1017	{
1018	ssize_t ret;	1018	ssize_t ret;
1019		1019
@@ -1024,7 +1024,7 @@ static ssize_t show_status(struct kobject *kobj, · 4 unmodified lines
1024	return ret;	1024	return ret;
1025	}	1025	}
1026		1026
1027	static ssize_t store_status(struct kobject a, struct kobj_attribute b,	1027	static ssize_t status_store(struct device a, struct device_attribute b,
1028	const char *buf, size_t count)	1028	const char *buf, size_t count)
1029	{	1029	{
1030	char *p = memchr(buf, '\n', count);	1030	char *p = memchr(buf, '\n', count);
@@ -1043,7 +1043,7 @@ cpufreq_freq_attr_ro(amd_pstate_lowest_nonlinear_freq); · 12 unmodified lines
1043	cpufreq_freq_attr_ro(amd_pstate_highest_perf);	1043	cpufreq_freq_attr_ro(amd_pstate_highest_perf);
1044	cpufreq_freq_attr_rw(energy_performance_preference);	1044	cpufreq_freq_attr_rw(energy_performance_preference);
1045	cpufreq_freq_attr_ro(energy_performance_available_preferences);	1045	cpufreq_freq_attr_ro(energy_performance_available_preferences);
1046	define_one_global_rw(status);	1046	static DEVICE_ATTR_RW(status);
1047		1047
1048	static struct freq_attr *amd_pstate_attr[] = {	1048	static struct freq_attr *amd_pstate_attr[] = {
1049	&amd_pstate_max_freq,	1049	&amd_pstate_max_freq,
@@ -1062,7 +1062,7 @@ static struct freq_attr *amd_pstate_epp_attr[] = { · 12 unmodified lines
1062	};	1062	};
1063		1063
1064	static struct attribute *pstate_global_attributes[] = {	1064	static struct attribute *pstate_global_attributes[] = {
1065	&status.attr,	1065	&dev_attr_status.attr,
1066	NULL	1066	NULL
1067	};	1067	};
1068		1068

drivers/cpuidle/cpuidle-psci-domain.c+13−26

 	}
 }
-static bool psci_pd_try_set_osi_mode(void)
-{
-	int ret;
-	if (!psci_has_osi_support())
-		return false;
-	ret = psci_set_osi_mode(true);
-	if (ret)
-		return false;
-	return true;
-}
 static void psci_cpuidle_domain_sync_state(struct device *dev)
 {
 	/*
 {
 	struct device_node *np = pdev->dev.of_node;
 	struct device_node *node;
-	bool use_osi;
+	bool use_osi = psci_has_osi_support();
 	int ret = 0, pd_count = 0;
 	if (!np)
 		return -ENODEV;
-	/* If OSI mode is supported, let's try to enable it. */
-	use_osi = psci_pd_try_set_osi_mode();
 	/*
 	 * Parse child nodes for the "#power-domain-cells" property and
 	 * initialize a genpd/genpd-of-provider pair when it's found.
 			continue;
 		ret = psci_pd_init(node, use_osi);
-		if (ret)
+		if (ret) {
-			goto put_node;
+			of_node_put(node);
+			goto exit;
+		}
 		pd_count++;
 	}
 	/* Bail out if not using the hierarchical CPU topology. */
 	if (!pd_count)
-		goto no_pd;
+		return 0;
 	/* Link genpd masters/subdomains to model the CPU topology. */
 	ret = dt_idle_pd_init_topology(np);
 	if (ret)
 		goto remove_pd;
+	/* let's try to enable OSI. */
+	ret = psci_set_osi_mode(use_osi);
+	if (ret)
+		goto remove_pd;
 	pr_info("Initialized CPU PM domain topology using %s mode\n",
 		use_osi ? "OSI" : "PC");
 	return 0;
-put_node:
-	of_node_put(node);
 remove_pd:
+	dt_idle_pd_remove_topology(np);
 	psci_pd_remove();
+exit:
 	pr_err("failed to create CPU PM domains ret=%d\n", ret);
-no_pd:
-	if (use_osi)
-		psci_set_osi_mode(false);
 	return ret;
 }

drivers/cpuidle/dt_idle_genpd.c+24−0

@@ -152,6 +152,30 @@ int dt_idle_pd_init_topology(struct device_node *np) · 151 unmodified lines
152	return 0;	152	return 0;
153	}	153	}
154		154
		155	int dt_idle_pd_remove_topology(struct device_node *np)
		156	{
		157	struct device_node *node;
		158	struct of_phandle_args child, parent;
		159	int ret;
		160
		161	for_each_child_of_node(np, node) {
		162	if (of_parse_phandle_with_args(node, "power-domains",
		163	"#power-domain-cells", 0, &parent))
		164	continue;
		165
		166	child.np = node;
		167	child.args_count = 0;
		168	ret = of_genpd_remove_subdomain(&parent, &child);
		169	of_node_put(parent.np);
		170	if (ret) {
		171	of_node_put(node);
		172	return ret;
		173	}
		174	}
		175
		176	return 0;
		177	}
		178
155	struct device dt_idle_attach_cpu(int cpu, const char name)	179	struct device dt_idle_attach_cpu(int cpu, const char name)
156	{	180	{
157	struct device *dev;	181	struct device *dev;

drivers/cpuidle/dt_idle_genpd.h+7−0

 int dt_idle_pd_init_topology(struct device_node *np);
+int dt_idle_pd_remove_topology(struct device_node *np);
 struct device *dt_idle_attach_cpu(int cpu, const char *name);
 void dt_idle_detach_cpu(struct device *dev);
 	return 0;
 }
+static inline int dt_idle_pd_remove_topology(struct device_node *np)
+{
+	return 0;
+}
 static inline struct device *dt_idle_attach_cpu(int cpu, const char *name)
 {
 	return NULL;

drivers/cxl/core/mbox.c+44−1

@@ -121,6 +121,45 @@ static bool cxl_is_security_command(u16 opcode) · 120 unmodified lines
121	return false;	121	return false;
122	}	122	}
123		123
		124	static void cxl_set_security_cmd_enabled(struct cxl_security_state *security,
		125	u16 opcode)
		126	{
		127	switch (opcode) {
		128	case CXL_MBOX_OP_SANITIZE:
		129	set_bit(CXL_SEC_ENABLED_SANITIZE, security->enabled_cmds);
		130	break;
		131	case CXL_MBOX_OP_SECURE_ERASE:
		132	set_bit(CXL_SEC_ENABLED_SECURE_ERASE,
		133	security->enabled_cmds);
		134	break;
		135	case CXL_MBOX_OP_GET_SECURITY_STATE:
		136	set_bit(CXL_SEC_ENABLED_GET_SECURITY_STATE,
		137	security->enabled_cmds);
		138	break;
		139	case CXL_MBOX_OP_SET_PASSPHRASE:
		140	set_bit(CXL_SEC_ENABLED_SET_PASSPHRASE,
		141	security->enabled_cmds);
		142	break;
		143	case CXL_MBOX_OP_DISABLE_PASSPHRASE:
		144	set_bit(CXL_SEC_ENABLED_DISABLE_PASSPHRASE,
		145	security->enabled_cmds);
		146	break;
		147	case CXL_MBOX_OP_UNLOCK:
		148	set_bit(CXL_SEC_ENABLED_UNLOCK, security->enabled_cmds);
		149	break;
		150	case CXL_MBOX_OP_FREEZE_SECURITY:
		151	set_bit(CXL_SEC_ENABLED_FREEZE_SECURITY,
		152	security->enabled_cmds);
		153	break;
		154	case CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE:
		155	set_bit(CXL_SEC_ENABLED_PASSPHRASE_SECURE_ERASE,
		156	security->enabled_cmds);
		157	break;
		158	default:
		159	break;
		160	}
		161	}
		162
124	static bool cxl_is_poison_command(u16 opcode)	163	static bool cxl_is_poison_command(u16 opcode)
125	{	164	{
126	#define CXL_MBOX_OP_POISON_CMDS 0x43	165	#define CXL_MBOX_OP_POISON_CMDS 0x43
@@ -677,7 +716,8 @@ static void cxl_walk_cel(struct cxl_memdev_state mds, size_t size, u8 cel) · 550 unmodified lines
677	u16 opcode = le16_to_cpu(cel_entry[i].opcode);	716	u16 opcode = le16_to_cpu(cel_entry[i].opcode);
678	struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);	717	struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);
679		718
680	if (!cmd && !cxl_is_poison_command(opcode)) {	719	if (!cmd && (!cxl_is_poison_command(opcode) \|\|
		720	!cxl_is_security_command(opcode))) {
681	dev_dbg(dev,	721	dev_dbg(dev,
682	"Opcode 0x%04x unsupported by driver\n", opcode);	722	"Opcode 0x%04x unsupported by driver\n", opcode);
683	continue;	723	continue;
@@ -689,6 +729,9 @@ static void cxl_walk_cel(struct cxl_memdev_state mds, size_t size, u8 cel) · 5 unmodified lines
689	if (cxl_is_poison_command(opcode))	729	if (cxl_is_poison_command(opcode))
690	cxl_set_poison_cmd_enabled(&mds->poison, opcode);	730	cxl_set_poison_cmd_enabled(&mds->poison, opcode);
691		731
		732	if (cxl_is_security_command(opcode))
		733	cxl_set_security_cmd_enabled(&mds->security, opcode);
		734
692	dev_dbg(dev, "Opcode 0x%04x enabled\n", opcode);	735	dev_dbg(dev, "Opcode 0x%04x enabled\n", opcode);
693	}	736	}
694	}	737	}

drivers/cxl/core/memdev.c+19−0

@@ -477,9 +477,28 @@ static struct attribute_group cxl_memdev_pmem_attribute_group = { · 476 unmodified lines
477	.attrs = cxl_memdev_pmem_attributes,	477	.attrs = cxl_memdev_pmem_attributes,
478	};	478	};
479		479
		480	static umode_t cxl_memdev_security_visible(struct kobject *kobj,
		481	struct attribute *a, int n)
		482	{
		483	struct device *dev = kobj_to_dev(kobj);
		484	struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
		485	struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
		486
		487	if (a == &dev_attr_security_sanitize.attr &&
		488	!test_bit(CXL_SEC_ENABLED_SANITIZE, mds->security.enabled_cmds))
		489	return 0;
		490
		491	if (a == &dev_attr_security_erase.attr &&
		492	!test_bit(CXL_SEC_ENABLED_SECURE_ERASE, mds->security.enabled_cmds))
		493	return 0;
		494
		495	return a->mode;
		496	}
		497
480	static struct attribute_group cxl_memdev_security_attribute_group = {	498	static struct attribute_group cxl_memdev_security_attribute_group = {
481	.name = "security",	499	.name = "security",
482	.attrs = cxl_memdev_security_attributes,	500	.attrs = cxl_memdev_security_attributes,
		501	.is_visible = cxl_memdev_security_visible,
483	};	502	};
484		503
485	static const struct attribute_group *cxl_memdev_attribute_groups[] = {	504	static const struct attribute_group *cxl_memdev_attribute_groups[] = {

drivers/cxl/cxlmem.h+16−0

 	CXL_POISON_ENABLED_MAX
 };
+/* Device enabled security commands */
+enum security_cmd_enabled_bits {
+	CXL_SEC_ENABLED_SANITIZE,
+	CXL_SEC_ENABLED_SECURE_ERASE,
+	CXL_SEC_ENABLED_GET_SECURITY_STATE,
+	CXL_SEC_ENABLED_SET_PASSPHRASE,
+	CXL_SEC_ENABLED_DISABLE_PASSPHRASE,
+	CXL_SEC_ENABLED_UNLOCK,
+	CXL_SEC_ENABLED_FREEZE_SECURITY,
+	CXL_SEC_ENABLED_PASSPHRASE_SECURE_ERASE,
+	CXL_SEC_ENABLED_MAX
+};
 /**
  * struct cxl_poison_state - Driver poison state info
  *
  * struct cxl_security_state - Device security state
  *
  * @state: state of last security operation
+ * @enabled_cmds: All security commands enabled in the CEL
  * @poll: polling for sanitization is enabled, device has no mbox irq support
  * @poll_tmo_secs: polling timeout
  * @poll_dwork: polling work item
  */
 struct cxl_security_state {
 	unsigned long state;
+	DECLARE_BITMAP(enabled_cmds, CXL_SEC_ENABLED_MAX);
 	bool poll;
 	int poll_tmo_secs;
 	struct delayed_work poll_dwork;
  * @next_persistent_bytes: persistent capacity change pending device reset
  * @event: event log driver state
  * @poison: poison driver state info
+ * @security: security driver state info
  * @fw: firmware upload / activation state
  * @mbox_send: @dev specific transport for transmitting mailbox commands
  *

drivers/dma/Kconfig+2−0

 config FSL_EDMA
 	tristate "Freescale eDMA engine support"
 	depends on OF
+	depends on HAS_IOMEM
 	select DMA_ENGINE
 	select DMA_VIRTUAL_CHANNELS
 	help
 config INTEL_IDMA64
 	tristate "Intel integrated DMA 64-bit support"
+	depends on HAS_IOMEM
 	select DMA_ENGINE
 	select DMA_VIRTUAL_CHANNELS
 	help

drivers/dma/idxd/device.c+1−3

 	wq->threshold = 0;
 	wq->priority = 0;
 	wq->enqcmds_retries = IDXD_ENQCMDS_RETRIES;
-	clear_bit(WQ_FLAG_DEDICATED, &wq->flags);
+	wq->flags = 0;
-	clear_bit(WQ_FLAG_BLOCK_ON_FAULT, &wq->flags);
-	clear_bit(WQ_FLAG_ATS_DISABLE, &wq->flags);
 	memset(wq->name, 0, WQ_NAME_SIZE);
 	wq->max_xfer_bytes = WQ_DEFAULT_MAX_XFER;
 	idxd_wq_set_max_batch_size(idxd->data->type, wq, WQ_DEFAULT_MAX_BATCH);

drivers/dma/mcf-edma.c+7−6

 		return -EINVAL;
 	}
-	chans = pdata->dma_channels;
+	if (!pdata->dma_channels) {
+		dev_info(&pdev->dev, "setting default channel number to 64");
+		chans = 64;
+	} else {
+		chans = pdata->dma_channels;
+	}
 	len = sizeof(*mcf_edma) + sizeof(*mcf_chan) * chans;
 	mcf_edma = devm_kzalloc(&pdev->dev, len, GFP_KERNEL);
 	if (!mcf_edma)
 	mcf_edma->drvdata = &mcf_data;
 	mcf_edma->big_endian = 1;
-	if (!mcf_edma->n_chans) {
-		dev_info(&pdev->dev, "setting default channel number to 64");
-		mcf_edma->n_chans = 64;
-	}
 	mutex_init(&mcf_edma->fsl_edma_mutex);
 	mcf_edma->membase = devm_platform_ioremap_resource(pdev, 0);

drivers/dma/owl-dma.c+1−1

@@ -192,7 +192,7 @@ struct owl_dma_pchan { · 191 unmodified lines
192	};	192	};
193		193
194	/**	194	/**
195	* struct owl_dma_pchan - Wrapper for DMA ENGINE channel	195	* struct owl_dma_vchan - Wrapper for DMA ENGINE channel
196	* @vc: wrapped virtual channel	196	* @vc: wrapped virtual channel
197	* @pchan: the physical channel utilized by this channel	197	* @pchan: the physical channel utilized by this channel
198	* @txd: active transaction on this channel	198	* @txd: active transaction on this channel

drivers/dma/pl330.c+16−2

 	 * of a channel can be BUSY at any time.
 	 */
 	BUSY,
+	/*
+	 * Pause was called while descriptor was BUSY. Due to hardware
+	 * limitations, only termination is possible for descriptors
+	 * that have been paused.
+	 */
+	PAUSED,
 	/*
 	 * Sitting on the channel work_list but xfer done
 	 * by PL330 core
 	list_for_each_entry(desc, &pch->work_list, node) {
 		/* If already submitted */
-		if (desc->status == BUSY)
+		if (desc->status == BUSY || desc->status == PAUSED)
 			continue;
 		ret = pl330_submit_req(pch->thread, desc);
 {
 	struct dma_pl330_chan *pch = to_pchan(chan);
 	struct pl330_dmac *pl330 = pch->dmac;
+	struct dma_pl330_desc *desc;
 	unsigned long flags;
 	pm_runtime_get_sync(pl330->ddma.dev);
 	_stop(pch->thread);
 	spin_unlock(&pl330->lock);
+	list_for_each_entry(desc, &pch->work_list, node) {
+		if (desc->status == BUSY)
+			desc->status = PAUSED;
+	}
 	spin_unlock_irqrestore(&pch->lock, flags);
 	pm_runtime_mark_last_busy(pl330->ddma.dev);
 	pm_runtime_put_autosuspend(pl330->ddma.dev);
 		else if (running && desc == running)
 			transferred =
 				pl330_get_current_xferred_count(pch, desc);
-		else if (desc->status == BUSY)
+		else if (desc->status == BUSY || desc->status == PAUSED)
 			/*
 			 * Busy but not running means either just enqueued,
 			 * or finished and not yet marked done
 			case DONE:
 				ret = DMA_COMPLETE;
 				break;
+			case PAUSED:
+				ret = DMA_PAUSED;
+				break;
 			case PREP:
 			case BUSY:
 				ret = DMA_IN_PROGRESS;

drivers/dma/xilinx/xdma.c+4−2

 			val |= irq_start << shift;
 			irq_start++;
 			irq_num--;
+			if (!irq_num)
+				break;
 		}
 		/* write IRQ register */
 		ret = request_irq(irq, xdma_channel_isr, 0,
 				  "xdma-c2h-channel", &xdev->c2h_chans[j]);
 		if (ret) {
-			xdma_err(xdev, "H2C channel%d request irq%d failed: %d",
+			xdma_err(xdev, "C2H channel%d request irq%d failed: %d",
 				 j, irq, ret);
 			goto failed_init_c2h;
 		}
 	}
 	reg_base = devm_ioremap_resource(&pdev->dev, res);
-	if (!reg_base) {
+	if (IS_ERR(reg_base)) {
 		xdma_err(xdev, "ioremap failed");
 		goto failed;
 	}

drivers/firmware/arm_scmi/mailbox.c+3−1

 		return -ENOMEM;
 	shmem = of_parse_phandle(cdev->of_node, "shmem", idx);
-	if (!of_device_is_compatible(shmem, "arm,scmi-shmem"))
+	if (!of_device_is_compatible(shmem, "arm,scmi-shmem")) {
+		of_node_put(shmem);
 		return -ENXIO;
+	}
 	ret = of_address_to_resource(shmem, 0, &res);
 	of_node_put(shmem);

drivers/firmware/arm_scmi/raw_mode.c+4−1

 	 * before sending it with a single RAW xfer.
 	 */
 	if (rd->tx_size < rd->tx_req_size) {
-		size_t cnt;
+		ssize_t cnt;
 		cnt = simple_write_to_buffer(rd->tx.buf, rd->tx.len, ppos,
 					     buf, count);
+		if (cnt < 0)
+			return cnt;
 		rd->tx_size += cnt;
 		if (cnt < count)
 			return cnt;

drivers/firmware/arm_scmi/smc.c+14−7

 /**
  * struct scmi_smc - Structure representing a SCMI smc transport
  *
+ * @irq: An optional IRQ for completion
  * @cinfo: SCMI channel info
  * @shmem: Transmit/Receive shared memory area
  * @shmem_lock: Lock to protect access to Tx/Rx shared memory area.
  */
 struct scmi_smc {
+	int irq;
 	struct scmi_chan_info *cinfo;
 	struct scmi_shared_mem __iomem *shmem;
 	/* Protect access to shmem area */
 	struct resource res;
 	struct device_node *np;
 	u32 func_id;
-	int ret, irq;
+	int ret;
 	if (!tx)
 		return -ENODEV;
 		return -ENOMEM;
 	np = of_parse_phandle(cdev->of_node, "shmem", 0);
-	if (!of_device_is_compatible(np, "arm,scmi-shmem"))
+	if (!of_device_is_compatible(np, "arm,scmi-shmem")) {
+		of_node_put(np);
 		return -ENXIO;
+	}
 	ret = of_address_to_resource(np, 0, &res);
 	of_node_put(np);
 	 * completion of a message is signaled by an interrupt rather than by
 	 * the return of the SMC call.
 	 */
-	irq = of_irq_get_byname(cdev->of_node, "a2p");
+	scmi_info->irq = of_irq_get_byname(cdev->of_node, "a2p");
-	if (irq > 0) {
+	if (scmi_info->irq > 0) {
-		ret = devm_request_irq(dev, irq, smc_msg_done_isr,
+		ret = request_irq(scmi_info->irq, smc_msg_done_isr,
-				       IRQF_NO_SUSPEND,
+				  IRQF_NO_SUSPEND, dev_name(dev), scmi_info);
-				       dev_name(dev), scmi_info);
 		if (ret) {
 			dev_err(dev, "failed to setup SCMI smc irq\n");
 			return ret;
 	struct scmi_chan_info *cinfo = p;
 	struct scmi_smc *scmi_info = cinfo->transport_info;
+	/* Ignore any possible further reception on the IRQ path */
+	if (scmi_info->irq > 0)
+		free_irq(scmi_info->irq, scmi_info);
 	cinfo->transport_info = NULL;
 	scmi_info->cinfo = NULL;

drivers/firmware/smccc/soc_id.c+2−3

 static int __init smccc_soc_init(void)
 {
-	struct arm_smccc_res res;
 	int soc_id_rev, soc_id_version;
 	static char soc_id_str[20], soc_id_rev_str[12];
 	static char soc_id_jep106_id_str[12];
 	}
 	if (soc_id_version < 0) {
-		pr_err("ARCH_SOC_ID(0) returned error: %lx\n", res.a0);
+		pr_err("Invalid SoC Version: %x\n", soc_id_version);
 		return -EINVAL;
 	}
 	soc_id_rev = arm_smccc_get_soc_id_revision();
 	if (soc_id_rev < 0) {
-		pr_err("ARCH_SOC_ID(1) returned error: %lx\n", res.a0);
+		pr_err("Invalid SoC Revision: %x\n", soc_id_rev);
 		return -EINVAL;
 	}

drivers/gpio/gpio-sim.c+1−0

@@ -429,6 +429,7 @@ static int gpio_sim_add_bank(struct fwnode_handle swnode, struct device dev) · 428 unmodified lines
429	gc->set_config = gpio_sim_set_config;	429	gc->set_config = gpio_sim_set_config;
430	gc->to_irq = gpio_sim_to_irq;	430	gc->to_irq = gpio_sim_to_irq;
431	gc->free = gpio_sim_free;	431	gc->free = gpio_sim_free;
		432	gc->can_sleep = true;
432		433
433	ret = devm_gpiochip_add_data(dev, gc, chip);	434	ret = devm_gpiochip_add_data(dev, gc, chip);
434	if (ret)	435	if (ret)

drivers/gpio/gpio-ws16c48.c+1−1

@@ -18,7 +18,7 @@ · 17 unmodified lines
18	#include <linux/spinlock.h>	18	#include <linux/spinlock.h>
19	#include <linux/types.h>	19	#include <linux/types.h>
20		20
21	#define WS16C48_EXTENT 10	21	#define WS16C48_EXTENT 11
22	#define MAX_NUM_WS16C48 max_num_isa_dev(WS16C48_EXTENT)	22	#define MAX_NUM_WS16C48 max_num_isa_dev(WS16C48_EXTENT)
23		23
24	static unsigned int base[MAX_NUM_WS16C48];	24	static unsigned int base[MAX_NUM_WS16C48];

drivers/gpu/drm/amd/amdgpu/amdgpu.h+1−0

@@ -1296,6 +1296,7 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, · 1295 unmodified lines
1296	void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);	1296	void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1297	int amdgpu_device_pci_reset(struct amdgpu_device *adev);	1297	int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1298	bool amdgpu_device_need_post(struct amdgpu_device *adev);	1298	bool amdgpu_device_need_post(struct amdgpu_device *adev);
		1299	bool amdgpu_sg_display_supported(struct amdgpu_device *adev);
1299	bool amdgpu_device_pcie_dynamic_switching_supported(void);	1300	bool amdgpu_device_pcie_dynamic_switching_supported(void);
1300	bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);	1301	bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1301	bool amdgpu_device_aspm_support_quirk(void);	1302	bool amdgpu_device_aspm_support_quirk(void);

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+1−1

@@ -295,7 +295,7 @@ static int amdgpu_cs_pass1(struct amdgpu_cs_parser *p, · 294 unmodified lines
295		295
296	if (!p->gang_size) {	296	if (!p->gang_size) {
297	ret = -EINVAL;	297	ret = -EINVAL;
298	goto free_partial_kdata;	298	goto free_all_kdata;
299	}	299	}
300		300
301	for (i = 0; i < p->gang_size; ++i) {	301	for (i = 0; i < p->gang_size; ++i) {

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+26−0

@@ -1458,6 +1458,32 @@ bool amdgpu_device_need_post(struct amdgpu_device *adev) · 1457 unmodified lines
1458	return true;	1458	return true;
1459	}	1459	}
1460		1460
		1461	/*
		1462	* On APUs with >= 64GB white flickering has been observed w/ SG enabled.
		1463	* Disable S/G on such systems until we have a proper fix.
		1464	* https://gitlab.freedesktop.org/drm/amd/-/issues/2354
		1465	* https://gitlab.freedesktop.org/drm/amd/-/issues/2735
		1466	*/
		1467	bool amdgpu_sg_display_supported(struct amdgpu_device *adev)
		1468	{
		1469	switch (amdgpu_sg_display) {
		1470	case -1:
		1471	break;
		1472	case 0:
		1473	return false;
		1474	case 1:
		1475	return true;
		1476	default:
		1477	return false;
		1478	}
		1479	if ((totalram_pages() << (PAGE_SHIFT - 10)) +
		1480	(adev->gmc.real_vram_size / 1024) >= 64000000) {
		1481	DRM_WARN("Disabling S/G due to >=64GB RAM\n");
		1482	return false;
		1483	}
		1484	return true;
		1485	}
		1486
1461	/*	1487	/*
1462	* Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic	1488	* Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic
1463	* speed switching. Until we have confirmation from Intel that a specific host	1489	* speed switching. Until we have confirmation from Intel that a specific host

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+6−2

 	case IP_VERSION(11, 0, 3):
 		if ((adev->gfx.me_fw_version >= 1505) &&
 		    (adev->gfx.pfp_fw_version >= 1600) &&
-		    (adev->gfx.mec_fw_version >= 512))
+		    (adev->gfx.mec_fw_version >= 512)) {
-			adev->gfx.cp_gfx_shadow = true;
+			if (amdgpu_sriov_vf(adev))
+				adev->gfx.cp_gfx_shadow = true;
+			else
+				adev->gfx.cp_gfx_shadow = false;
+		}
 		break;
 	default:
 		adev->gfx.cp_gfx_shadow = false;

drivers/gpu/drm/amd/amdgpu/psp_v13_0.c+8−7

 	int ret;
 	int retry_loop;
+	/* Wait for bootloader to signify that it is ready having bit 31 of
+	 * C2PMSG_35 set to 1. All other bits are expected to be cleared.
+	 * If there is an error in processing command, bits[7:0] will be set.
+	 * This is applicable for PSP v13.0.6 and newer.
+	 */
 	for (retry_loop = 0; retry_loop < 10; retry_loop++) {
-		/* Wait for bootloader to signify that is
+		ret = psp_wait_for(
-		    ready having bit 31 of C2PMSG_35 set to 1 */
+			psp, SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
-		ret = psp_wait_for(psp,
+			0x80000000, 0xffffffff, false);
-				   SOC15_REG_OFFSET(MP0, 0, regMP0_SMN_C2PMSG_35),
-				   0x80000000,
-				   0x80000000,
-				   false);
 		if (ret == 0)
 			return 0;

drivers/gpu/drm/amd/amdkfd/kfd_crat.c+0−4

 	if (ignore_crat)
 		return true;
-#ifndef KFD_SUPPORT_IOMMU_V2
 	ret = true;
-#else
-	ret = false;
-#endif
 	return ret;
 }

drivers/gpu/drm/amd/amdkfd/kfd_device.c+0−13

 		kfd_device_info_set_event_interrupt_class(kfd);
-		/* Raven */
-		if (gc_version == IP_VERSION(9, 1, 0) ||
-		    gc_version == IP_VERSION(9, 2, 2))
-			kfd->device_info.needs_iommu_device = true;
 		if (gc_version < IP_VERSION(11, 0, 0)) {
 			/* Navi2x+, Navi1x+ */
 			if (gc_version == IP_VERSION(10, 3, 6))
 		    asic_type != CHIP_TONGA)
 			kfd->device_info.supports_cwsr = true;
-		if (asic_type == CHIP_KAVERI ||
-		    asic_type == CHIP_CARRIZO)
-			kfd->device_info.needs_iommu_device = true;
 		if (asic_type != CHIP_HAWAII && !vf)
 			kfd->device_info.needs_pci_atomics = true;
 	}
 	uint32_t gfx_target_version = 0;
 	switch (adev->asic_type) {
-#ifdef KFD_SUPPORT_IOMMU_V2
 #ifdef CONFIG_DRM_AMDGPU_CIK
 	case CHIP_KAVERI:
 		gfx_target_version = 70000;
 		if (!vf)
 			f2g = &gfx_v8_kfd2kgd;
 		break;
-#endif
 #ifdef CONFIG_DRM_AMDGPU_CIK
 	case CHIP_HAWAII:
 		gfx_target_version = 70001;
 			gfx_target_version = 90000;
 			f2g = &gfx_v9_kfd2kgd;
 			break;
-#ifdef KFD_SUPPORT_IOMMU_V2
 		/* Raven */
 		case IP_VERSION(9, 1, 0):
 		case IP_VERSION(9, 2, 2):
 			if (!vf)
 				f2g = &gfx_v9_kfd2kgd;
 			break;
-#endif
 		/* Vega12 */
 		case IP_VERSION(9, 2, 1):
 			gfx_target_version = 90004;

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c+1−7

 	}
 	switch (dev->adev->asic_type) {
-	case CHIP_CARRIZO:
-		device_queue_manager_init_vi(&dqm->asic_ops);
-		break;
 	case CHIP_KAVERI:
-		device_queue_manager_init_cik(&dqm->asic_ops);
-		break;
 	case CHIP_HAWAII:
 		device_queue_manager_init_cik_hawaii(&dqm->asic_ops);
 		break;
+	case CHIP_CARRIZO:
 	case CHIP_TONGA:
 	case CHIP_FIJI:
 	case CHIP_POLARIS10:

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+2−3

 		}
 		break;
 	}
-	if (init_data.flags.gpu_vm_support &&
+	if (init_data.flags.gpu_vm_support)
-	    (amdgpu_sg_display == 0))
+		init_data.flags.gpu_vm_support = amdgpu_sg_display_supported(adev);
-		init_data.flags.gpu_vm_support = false;
 	if (init_data.flags.gpu_vm_support)
 		adev->mode_info.gpu_vm_support = true;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+1−1

@@ -1320,7 +1320,7 @@ int compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, · 1319 unmodified lines
1320	if (computed_streams[i])	1320	if (computed_streams[i])
1321	continue;	1321	continue;
1322		1322
1323	if (!res_pool->funcs->remove_stream_from_ctx \|\|	1323	if (res_pool->funcs->remove_stream_from_ctx &&
1324	res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)	1324	res_pool->funcs->remove_stream_from_ctx(stream->ctx->dc, dc_state, stream) != DC_OK)
1325	return -EINVAL;	1325	return -EINVAL;
1326		1326

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+2−1

@@ -777,7 +777,8 @@ void dce110_edp_wait_for_hpd_ready( · 776 unmodified lines
777	dal_gpio_destroy_irq(&hpd);	777	dal_gpio_destroy_irq(&hpd);
778		778
779	/* ensure that the panel is detected */	779	/* ensure that the panel is detected */
780	ASSERT(edp_hpd_high);	780	if (!edp_hpd_high)
		781	DC_LOG_DC("%s: wait timed out!\n", __func__);
781	}	782	}
782		783
783	void dce110_edp_power_control(	784	void dce110_edp_power_control(

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c+5−2

 	int cur_rom_en = 0;
 	if (color_format == CURSOR_MODE_COLOR_PRE_MULTIPLIED_ALPHA ||
-		color_format == CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA)
+		color_format == CURSOR_MODE_COLOR_UN_PRE_MULTIPLIED_ALPHA) {
-		cur_rom_en = 1;
+		if (cursor_attributes->attribute_flags.bits.ENABLE_CURSOR_DEGAMMA) {
+			cur_rom_en = 1;
+		}
+	}
 	REG_UPDATE_3(CURSOR0_CONTROL,
 			CUR0_MODE, color_format,

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+2−2

@@ -1581,9 +1581,9 @@ static int smu_disable_dpms(struct smu_context *smu) · 1580 unmodified lines
1581		1581
1582	/*	1582	/*
1583	* For SMU 13.0.4/11, PMFW will handle the features disablement properly	1583	* For SMU 13.0.4/11, PMFW will handle the features disablement properly
1584	* for gpu reset case. Driver involvement is unnecessary.	1584	* for gpu reset and S0i3 cases. Driver involvement is unnecessary.
1585	*/	1585	*/
1586	if (amdgpu_in_reset(adev)) {	1586	if (amdgpu_in_reset(adev) \|\| adev->in_s0ix) {
1587	switch (adev->ip_versions[MP1_HWIP][0]) {	1587	switch (adev->ip_versions[MP1_HWIP][0]) {
1588	case IP_VERSION(13, 0, 4):	1588	case IP_VERSION(13, 0, 4):
1589	case IP_VERSION(13, 0, 11):	1589	case IP_VERSION(13, 0, 11):

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c+15−5

 	struct smu_13_0_0_powerplay_table *powerplay_table =
 		table_context->power_play_table;
 	struct smu_baco_context *smu_baco = &smu->smu_baco;
+#if 0
 	PPTable_t *pptable = smu->smu_table.driver_pptable;
 	const OverDriveLimits_t * const overdrive_upperlimits =
 				&pptable->SkuTable.OverDriveLimitsBasicMax;
 	const OverDriveLimits_t * const overdrive_lowerlimits =
 				&pptable->SkuTable.OverDriveLimitsMin;
+#endif
 	if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_HARDWAREDC)
 		smu->dc_controlled_by_gpio = true;
 	if (powerplay_table->platform_caps & SMU_13_0_0_PP_PLATFORM_CAP_MACO)
 		smu_baco->maco_support = true;
+	/*
+	 * We are in the transition to a new OD mechanism.
+	 * Disable the OD feature support for SMU13 temporarily.
+	 * TODO: get this reverted when new OD mechanism online
+	 */
+#if 0
 	if (!overdrive_lowerlimits->FeatureCtrlMask ||
 	    !overdrive_upperlimits->FeatureCtrlMask)
 		smu->od_enabled = false;
-	table_context->thermal_controller_type =
-		powerplay_table->thermal_controller_type;
 	/*
 	 * Instead of having its own buffer space and get overdrive_table copied,
 	 * smu->od_settings just points to the actual overdrive_table
 	 */
 	smu->od_settings = &powerplay_table->overdrive_table;
+#else
+	smu->od_enabled = false;
+#endif
+	table_context->thermal_controller_type =
+		powerplay_table->thermal_controller_type;
 	return 0;
 }
 		(OverDriveTableExternal_t *)smu->smu_table.overdrive_table;
 	struct smu_13_0_dpm_table *single_dpm_table;
 	struct smu_13_0_pcie_table *pcie_table;
-	const int link_width[] = {0, 1, 2, 4, 8, 12, 16};
 	uint32_t gen_speed, lane_width;
 	int i, curr_freq, size = 0;
 	int32_t min_value, max_value;
 					(pcie_table->pcie_lane[i] == 6) ? "x16" : "",
 					pcie_table->clk_freq[i],
 					(gen_speed == DECODE_GEN_SPEED(pcie_table->pcie_gen[i])) &&
-					(lane_width == DECODE_LANE_WIDTH(link_width[pcie_table->pcie_lane[i]])) ?
+					(lane_width == DECODE_LANE_WIDTH(pcie_table->pcie_lane[i])) ?
 					"*" : "");
 		break;

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+2−3

@@ -1993,9 +1993,8 @@ static ssize_t smu_v13_0_6_get_gpu_metrics(struct smu_context smu, void *table · 1992 unmodified lines
1993		1993
1994	gpu_metrics->average_socket_power =	1994	gpu_metrics->average_socket_power =
1995	SMUQ10_TO_UINT(metrics->SocketPower);	1995	SMUQ10_TO_UINT(metrics->SocketPower);
1996	/* Energy is reported in 15.625mJ units */	1996	/* Energy counter reported in 15.259uJ (2^-16) units */
1997	gpu_metrics->energy_accumulator =	1997	gpu_metrics->energy_accumulator = metrics->SocketEnergyAcc;
1998	SMUQ10_TO_UINT(metrics->SocketEnergyAcc);
1999		1998
2000	gpu_metrics->current_gfxclk =	1999	gpu_metrics->current_gfxclk =
2001	SMUQ10_TO_UINT(metrics->GfxclkFrequency[xcc0]);	2000	SMUQ10_TO_UINT(metrics->GfxclkFrequency[xcc0]);

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+9−3

 	struct smu_baco_context *smu_baco = &smu->smu_baco;
 	PPTable_t *smc_pptable = table_context->driver_pptable;
 	BoardTable_t *BoardTable = &smc_pptable->BoardTable;
+#if 0
 	const OverDriveLimits_t * const overdrive_upperlimits =
 				&smc_pptable->SkuTable.OverDriveLimitsBasicMax;
 	const OverDriveLimits_t * const overdrive_lowerlimits =
 				&smc_pptable->SkuTable.OverDriveLimitsMin;
+#endif
 	if (powerplay_table->platform_caps & SMU_13_0_7_PP_PLATFORM_CAP_HARDWAREDC)
 		smu->dc_controlled_by_gpio = true;
 	if (smu_baco->platform_support && (BoardTable->HsrEnabled || BoardTable->VddqOffEnabled))
 		smu_baco->maco_support = true;
+#if 0
 	if (!overdrive_lowerlimits->FeatureCtrlMask ||
 	    !overdrive_upperlimits->FeatureCtrlMask)
 		smu->od_enabled = false;
-	table_context->thermal_controller_type =
-		powerplay_table->thermal_controller_type;
 	/*
 	 * Instead of having its own buffer space and get overdrive_table copied,
 	 * smu->od_settings just points to the actual overdrive_table
 	 */
 	smu->od_settings = &powerplay_table->overdrive_table;
+#else
+	smu->od_enabled = false;
+#endif
+	table_context->thermal_controller_type =
+		powerplay_table->thermal_controller_type;
 	return 0;
 }

drivers/gpu/drm/bridge/ite-it6505.c+3−1

 	};
 	int int_status[3], i;
-	if (it6505->enable_drv_hold || pm_runtime_get_if_in_use(dev) <= 0)
+	if (it6505->enable_drv_hold || !it6505->powered)
 		return IRQ_HANDLED;
+	pm_runtime_get_sync(dev);
 	int_status[0] = it6505_read(it6505, INT_STATUS_01);
 	int_status[1] = it6505_read(it6505, INT_STATUS_02);
 	int_status[2] = it6505_read(it6505, INT_STATUS_03);

drivers/gpu/drm/bridge/lontium-lt9611.c+1−3

 	dsi->lanes = 4;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
-			  MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO_NO_HSA |
+			  MIPI_DSI_MODE_VIDEO_HSE;
-			  MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP |
-			  MIPI_DSI_MODE_NO_EOT_PACKET;
 	ret = devm_mipi_dsi_attach(dev, dsi);
 	if (ret < 0) {

drivers/gpu/drm/drm_gem_shmem_helper.c+6−0

 	int ret;
 	if (obj->import_attach) {
+		/* Reset both vm_ops and vm_private_data, so we don't end up with
+		 * vm_ops pointing to our implementation if the dma-buf backend
+		 * doesn't set those fields.
+		 */
 		vma->vm_private_data = NULL;
+		vma->vm_ops = NULL;
 		ret = dma_buf_mmap(obj->dma_buf, vma, 0);
 		/* Drop the reference drm_gem_mmap_obj() acquired.*/

drivers/gpu/drm/i915/gt/gen8_engine_cs.c+92−48

@@ -165,14 +165,60 @@ static u32 preparser_disable(bool state) · 164 unmodified lines
165	return MI_ARB_CHECK \| 1 << 8 \| state;	165	return MI_ARB_CHECK \| 1 << 8 \| state;
166	}	166	}
167		167
168	u32 gen12_emit_aux_table_inv(struct intel_gt gt, u32 *cs, const i915_reg_t inv_reg)	168	static i915_reg_t gen12_get_aux_inv_reg(struct intel_engine_cs *engine)
169	{	169	{
170	u32 gsi_offset = gt->uncore->gsi_offset;	170	switch (engine->id) {
		171	case RCS0:
		172	return GEN12_CCS_AUX_INV;
		173	case BCS0:
		174	return GEN12_BCS0_AUX_INV;
		175	case VCS0:
		176	return GEN12_VD0_AUX_INV;
		177	case VCS2:
		178	return GEN12_VD2_AUX_INV;
		179	case VECS0:
		180	return GEN12_VE0_AUX_INV;
		181	case CCS0:
		182	return GEN12_CCS0_AUX_INV;
		183	default:
		184	return INVALID_MMIO_REG;
		185	}
		186	}
		187
		188	static bool gen12_needs_ccs_aux_inv(struct intel_engine_cs *engine)
		189	{
		190	i915_reg_t reg = gen12_get_aux_inv_reg(engine);
		191
		192	if (IS_PONTEVECCHIO(engine->i915))
		193	return false;
		194
		195	/*
		196	* So far platforms supported by i915 having flat ccs do not require
		197	* AUX invalidation. Check also whether the engine requires it.
		198	*/
		199	return i915_mmio_reg_valid(reg) && !HAS_FLAT_CCS(engine->i915);
		200	}
		201
		202	u32 gen12_emit_aux_table_inv(struct intel_engine_cs engine, u32 *cs)
		203	{
		204	i915_reg_t inv_reg = gen12_get_aux_inv_reg(engine);
		205	u32 gsi_offset = engine->gt->uncore->gsi_offset;
		206
		207	if (!gen12_needs_ccs_aux_inv(engine))
		208	return cs;
171		209
172	*cs++ = MI_LOAD_REGISTER_IMM(1) \| MI_LRI_MMIO_REMAP_EN;	210	*cs++ = MI_LOAD_REGISTER_IMM(1) \| MI_LRI_MMIO_REMAP_EN;
173	*cs++ = i915_mmio_reg_offset(inv_reg) + gsi_offset;	211	*cs++ = i915_mmio_reg_offset(inv_reg) + gsi_offset;
174	*cs++ = AUX_INV;	212	*cs++ = AUX_INV;
175	*cs++ = MI_NOOP;	213
		214	*cs++ = MI_SEMAPHORE_WAIT_TOKEN \|
		215	MI_SEMAPHORE_REGISTER_POLL \|
		216	MI_SEMAPHORE_POLL \|
		217	MI_SEMAPHORE_SAD_EQ_SDD;
		218	*cs++ = 0;
		219	*cs++ = i915_mmio_reg_offset(inv_reg) + gsi_offset;
		220	*cs++ = 0;
		221	*cs++ = 0;
176		222
177	return cs;	223	return cs;
178	}	224	}
@@ -202,8 +248,13 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) · 23 unmodified lines
202	{	248	{
203	struct intel_engine_cs *engine = rq->engine;	249	struct intel_engine_cs *engine = rq->engine;
204		250
205	if (mode & EMIT_FLUSH) {	251	/*
206	u32 flags = 0;	252	* On Aux CCS platforms the invalidation of the Aux
		253	* table requires quiescing memory traffic beforehand
		254	*/
		255	if (mode & EMIT_FLUSH \|\| gen12_needs_ccs_aux_inv(engine)) {
		256	u32 bit_group_0 = 0;
		257	u32 bit_group_1 = 0;
207	int err;	258	int err;
208	u32 *cs;	259	u32 *cs;
209		260
@@ -211,32 +262,40 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) · 1 unmodified line
211	if (err)	262	if (err)
212	return err;	263	return err;
213		264
214	flags \|= PIPE_CONTROL_TILE_CACHE_FLUSH;	265	bit_group_0 \|= PIPE_CONTROL0_HDC_PIPELINE_FLUSH;
215	flags \|= PIPE_CONTROL_FLUSH_L3;	266
216	flags \|= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;	267	/*
217	flags \|= PIPE_CONTROL_DEPTH_CACHE_FLUSH;	268	* When required, in MTL and beyond platforms we
		269	* need to set the CCS_FLUSH bit in the pipe control
		270	*/
		271	if (GRAPHICS_VER_FULL(rq->i915) >= IP_VER(12, 70))
		272	bit_group_0 \|= PIPE_CONTROL_CCS_FLUSH;
		273
		274	bit_group_1 \|= PIPE_CONTROL_TILE_CACHE_FLUSH;
		275	bit_group_1 \|= PIPE_CONTROL_FLUSH_L3;
		276	bit_group_1 \|= PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH;
		277	bit_group_1 \|= PIPE_CONTROL_DEPTH_CACHE_FLUSH;
218	/* Wa_1409600907:tgl,adl-p */	278	/* Wa_1409600907:tgl,adl-p */
219	flags \|= PIPE_CONTROL_DEPTH_STALL;	279	bit_group_1 \|= PIPE_CONTROL_DEPTH_STALL;
220	flags \|= PIPE_CONTROL_DC_FLUSH_ENABLE;	280	bit_group_1 \|= PIPE_CONTROL_DC_FLUSH_ENABLE;
221	flags \|= PIPE_CONTROL_FLUSH_ENABLE;	281	bit_group_1 \|= PIPE_CONTROL_FLUSH_ENABLE;
222		282
223	flags \|= PIPE_CONTROL_STORE_DATA_INDEX;	283	bit_group_1 \|= PIPE_CONTROL_STORE_DATA_INDEX;
224	flags \|= PIPE_CONTROL_QW_WRITE;	284	bit_group_1 \|= PIPE_CONTROL_QW_WRITE;
225		285
226	flags \|= PIPE_CONTROL_CS_STALL;	286	bit_group_1 \|= PIPE_CONTROL_CS_STALL;
227		287
228	if (!HAS_3D_PIPELINE(engine->i915))	288	if (!HAS_3D_PIPELINE(engine->i915))
229	flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS;	289	bit_group_1 &= ~PIPE_CONTROL_3D_ARCH_FLAGS;
230	else if (engine->class == COMPUTE_CLASS)	290	else if (engine->class == COMPUTE_CLASS)
231	flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;	291	bit_group_1 &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
232		292
233	cs = intel_ring_begin(rq, 6);	293	cs = intel_ring_begin(rq, 6);
234	if (IS_ERR(cs))	294	if (IS_ERR(cs))
235	return PTR_ERR(cs);	295	return PTR_ERR(cs);
236		296
237	cs = gen12_emit_pipe_control(cs,	297	cs = gen12_emit_pipe_control(cs, bit_group_0, bit_group_1,
238	PIPE_CONTROL0_HDC_PIPELINE_FLUSH,	298	LRC_PPHWSP_SCRATCH_ADDR);
239	flags, LRC_PPHWSP_SCRATCH_ADDR);
240	intel_ring_advance(rq, cs);	299	intel_ring_advance(rq, cs);
241	}	300	}
242		301
@@ -267,10 +326,9 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) · 24 unmodified lines
267	else if (engine->class == COMPUTE_CLASS)	326	else if (engine->class == COMPUTE_CLASS)
268	flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;	327	flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS;
269		328
270	if (!HAS_FLAT_CCS(rq->engine->i915))	329	count = 8;
271	count = 8 + 4;	330	if (gen12_needs_ccs_aux_inv(rq->engine))
272	else	331	count += 8;
273	count = 8;
274		332
275	cs = intel_ring_begin(rq, count);	333	cs = intel_ring_begin(rq, count);
276	if (IS_ERR(cs))	334	if (IS_ERR(cs))
@@ -285,11 +343,7 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) · 8 unmodified lines
285		343
286	cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);	344	cs = gen8_emit_pipe_control(cs, flags, LRC_PPHWSP_SCRATCH_ADDR);
287		345
288	if (!HAS_FLAT_CCS(rq->engine->i915)) {	346	cs = gen12_emit_aux_table_inv(engine, cs);
289	/* hsdes: 1809175790 */
290	cs = gen12_emit_aux_table_inv(rq->engine->gt,
291	cs, GEN12_GFX_CCS_AUX_NV);
292	}
293		347
294	*cs++ = preparser_disable(false);	348	*cs++ = preparser_disable(false);
295	intel_ring_advance(rq, cs);	349	intel_ring_advance(rq, cs);
@@ -300,21 +354,14 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode) · 4 unmodified lines
300		354
301	int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)	355	int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
302	{	356	{
303	intel_engine_mask_t aux_inv = 0;	357	u32 cmd = 4;
304	u32 cmd, *cs;	358	u32 *cs;
305		359
306	cmd = 4;
307	if (mode & EMIT_INVALIDATE) {	360	if (mode & EMIT_INVALIDATE) {
308	cmd += 2;	361	cmd += 2;
309		362
310	if (!HAS_FLAT_CCS(rq->engine->i915) &&	363	if (gen12_needs_ccs_aux_inv(rq->engine))
311	(rq->engine->class == VIDEO_DECODE_CLASS \|\|	364	cmd += 8;
312	rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
313	aux_inv = rq->engine->mask &
314	~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
315	if (aux_inv)
316	cmd += 4;
317	}
318	}	365	}
319		366
320	cs = intel_ring_begin(rq, cmd);	367	cs = intel_ring_begin(rq, cmd);
@@ -338,6 +385,10 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode) · 17 unmodified lines
338	cmd \|= MI_INVALIDATE_TLB;	385	cmd \|= MI_INVALIDATE_TLB;
339	if (rq->engine->class == VIDEO_DECODE_CLASS)	386	if (rq->engine->class == VIDEO_DECODE_CLASS)
340	cmd \|= MI_INVALIDATE_BSD;	387	cmd \|= MI_INVALIDATE_BSD;
		388
		389	if (gen12_needs_ccs_aux_inv(rq->engine) &&
		390	rq->engine->class == COPY_ENGINE_CLASS)
		391	cmd \|= MI_FLUSH_DW_CCS;
341	}	392	}
342		393
343	*cs++ = cmd;	394	*cs++ = cmd;
@@ -345,14 +396,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode) · 1 unmodified line
345	cs++ = 0; / upper addr */	396	cs++ = 0; / upper addr */
346	cs++ = 0; / value */	397	cs++ = 0; / value */
347		398
348	if (aux_inv) { /* hsdes: 1809175790 */	399	cs = gen12_emit_aux_table_inv(rq->engine, cs);
349	if (rq->engine->class == VIDEO_DECODE_CLASS)
350	cs = gen12_emit_aux_table_inv(rq->engine->gt,
351	cs, GEN12_VD0_AUX_NV);
352	else
353	cs = gen12_emit_aux_table_inv(rq->engine->gt,
354	cs, GEN12_VE0_AUX_NV);
355	}
356		400
357	if (mode & EMIT_INVALIDATE)	401	if (mode & EMIT_INVALIDATE)
358	*cs++ = preparser_disable(false);	402	*cs++ = preparser_disable(false);

drivers/gpu/drm/i915/gt/gen8_engine_cs.h+13−8

 #include "intel_gt_regs.h"
 #include "intel_gpu_commands.h"
+struct intel_engine_cs;
 struct intel_gt;
 struct i915_request;
 u32 *gen11_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs);
 u32 *gen12_emit_fini_breadcrumb_rcs(struct i915_request *rq, u32 *cs);
-u32 *gen12_emit_aux_table_inv(struct intel_gt *gt, u32 *cs, const i915_reg_t inv_reg);
+u32 *gen12_emit_aux_table_inv(struct intel_engine_cs *engine, u32 *cs);
 static inline u32 *
-__gen8_emit_pipe_control(u32 *batch, u32 flags0, u32 flags1, u32 offset)
+__gen8_emit_pipe_control(u32 *batch, u32 bit_group_0,
+			 u32 bit_group_1, u32 offset)
 {
 	memset(batch, 0, 6 * sizeof(u32));
-	batch[0] = GFX_OP_PIPE_CONTROL(6) | flags0;
+	batch[0] = GFX_OP_PIPE_CONTROL(6) | bit_group_0;
-	batch[1] = flags1;
+	batch[1] = bit_group_1;
 	batch[2] = offset;
 	return batch + 6;
 }
-static inline u32 *gen8_emit_pipe_control(u32 *batch, u32 flags, u32 offset)
+static inline u32 *gen8_emit_pipe_control(u32 *batch,
+					  u32 bit_group_1, u32 offset)
 {
-	return __gen8_emit_pipe_control(batch, 0, flags, offset);
+	return __gen8_emit_pipe_control(batch, 0, bit_group_1, offset);
 }
-static inline u32 *gen12_emit_pipe_control(u32 *batch, u32 flags0, u32 flags1, u32 offset)
+static inline u32 *gen12_emit_pipe_control(u32 *batch, u32 bit_group_0,
+					   u32 bit_group_1, u32 offset)
 {
-	return __gen8_emit_pipe_control(batch, flags0, flags1, offset);
+	return __gen8_emit_pipe_control(batch, bit_group_0,
+					bit_group_1, offset);
 }
 static inline u32 *

drivers/gpu/drm/i915/gt/intel_gpu_commands.h+2−0

 #define   MI_SEMAPHORE_TARGET(engine)	((engine)<<15)
 #define MI_SEMAPHORE_WAIT	MI_INSTR(0x1c, 2) /* GEN8+ */
 #define MI_SEMAPHORE_WAIT_TOKEN	MI_INSTR(0x1c, 3) /* GEN12+ */
+#define   MI_SEMAPHORE_REGISTER_POLL	(1 << 16)
 #define   MI_SEMAPHORE_POLL		(1 << 15)
 #define   MI_SEMAPHORE_SAD_GT_SDD	(0 << 12)
 #define   MI_SEMAPHORE_SAD_GTE_SDD	(1 << 12)
 #define   PIPE_CONTROL_QW_WRITE				(1<<14)
 #define   PIPE_CONTROL_POST_SYNC_OP_MASK                (3<<14)
 #define   PIPE_CONTROL_DEPTH_STALL			(1<<13)
+#define   PIPE_CONTROL_CCS_FLUSH			(1<<13) /* MTL+ */
 #define   PIPE_CONTROL_WRITE_FLUSH			(1<<12)
 #define   PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH	(1<<12) /* gen6+ */
 #define   PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE	(1<<11) /* MBZ on ILK */

drivers/gpu/drm/i915/gt/intel_gt_regs.h+8−8

@@ -332,9 +332,11 @@ · 331 unmodified lines
332	#define GEN8_PRIVATE_PAT_HI _MMIO(0x40e0 + 4)	332	#define GEN8_PRIVATE_PAT_HI _MMIO(0x40e0 + 4)
333	#define GEN10_PAT_INDEX(index) _MMIO(0x40e0 + (index) * 4)	333	#define GEN10_PAT_INDEX(index) _MMIO(0x40e0 + (index) * 4)
334	#define BSD_HWS_PGA_GEN7 _MMIO(0x4180)	334	#define BSD_HWS_PGA_GEN7 _MMIO(0x4180)
335	#define GEN12_GFX_CCS_AUX_NV _MMIO(0x4208)	335
336	#define GEN12_VD0_AUX_NV _MMIO(0x4218)	336	#define GEN12_CCS_AUX_INV _MMIO(0x4208)
337	#define GEN12_VD1_AUX_NV _MMIO(0x4228)	337	#define GEN12_VD0_AUX_INV _MMIO(0x4218)
		338	#define GEN12_VE0_AUX_INV _MMIO(0x4238)
		339	#define GEN12_BCS0_AUX_INV _MMIO(0x4248)
338		340
339	#define GEN8_RTCR _MMIO(0x4260)	341	#define GEN8_RTCR _MMIO(0x4260)
340	#define GEN8_M1TCR _MMIO(0x4264)	342	#define GEN8_M1TCR _MMIO(0x4264)
@@ -342,14 +344,12 @@ · 1 unmodified line
342	#define GEN8_BTCR _MMIO(0x426c)	344	#define GEN8_BTCR _MMIO(0x426c)
343	#define GEN8_VTCR _MMIO(0x4270)	345	#define GEN8_VTCR _MMIO(0x4270)
344		346
345	#define GEN12_VD2_AUX_NV _MMIO(0x4298)
346	#define GEN12_VD3_AUX_NV _MMIO(0x42a8)
347	#define GEN12_VE0_AUX_NV _MMIO(0x4238)
348
349	#define BLT_HWS_PGA_GEN7 _MMIO(0x4280)	347	#define BLT_HWS_PGA_GEN7 _MMIO(0x4280)
350		348
351	#define GEN12_VE1_AUX_NV _MMIO(0x42b8)	349	#define GEN12_VD2_AUX_INV _MMIO(0x4298)
		350	#define GEN12_CCS0_AUX_INV _MMIO(0x42c8)
352	#define AUX_INV REG_BIT(0)	351	#define AUX_INV REG_BIT(0)
		352
353	#define VEBOX_HWS_PGA_GEN7 _MMIO(0x4380)	353	#define VEBOX_HWS_PGA_GEN7 _MMIO(0x4380)
354		354
355	#define GEN12_AUX_ERR_DBG _MMIO(0x43f4)	355	#define GEN12_AUX_ERR_DBG _MMIO(0x43f4)

drivers/gpu/drm/i915/gt/intel_lrc.c+2−15

 	    IS_DG2_G11(ce->engine->i915))
 		cs = gen8_emit_pipe_control(cs, PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE, 0);
-	/* hsdes: 1809175790 */
+	cs = gen12_emit_aux_table_inv(ce->engine, cs);
-	if (!HAS_FLAT_CCS(ce->engine->i915))
-		cs = gen12_emit_aux_table_inv(ce->engine->gt,
-					      cs, GEN12_GFX_CCS_AUX_NV);
 	/* Wa_16014892111 */
 	if (IS_MTL_GRAPHICS_STEP(ce->engine->i915, M, STEP_A0, STEP_B0) ||
 						    PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE,
 						    0);
-	/* hsdes: 1809175790 */
+	return gen12_emit_aux_table_inv(ce->engine, cs);
-	if (!HAS_FLAT_CCS(ce->engine->i915)) {
-		if (ce->engine->class == VIDEO_DECODE_CLASS)
-			cs = gen12_emit_aux_table_inv(ce->engine->gt,
-						      cs, GEN12_VD0_AUX_NV);
-		else if (ce->engine->class == VIDEO_ENHANCEMENT_CLASS)
-			cs = gen12_emit_aux_table_inv(ce->engine->gt,
-						      cs, GEN12_VE0_AUX_NV);
-	}
-	return cs;
 }
 static void

drivers/gpu/drm/i915/gvt/edid.c+1−1

@@ -491,7 +491,7 @@ void intel_gvt_i2c_handle_aux_ch_write(struct intel_vgpu *vgpu, · 490 unmodified lines
491	return;	491	return;
492	}	492	}
493		493
494	msg_length = REG_FIELD_GET(DP_AUX_CH_CTL_MESSAGE_SIZE_MASK, reg);	494	msg_length = REG_FIELD_GET(DP_AUX_CH_CTL_MESSAGE_SIZE_MASK, value);
495		495
496	// check the msg in DATA register.	496	// check the msg in DATA register.
497	msg = vgpu_vreg(vgpu, offset + 4);	497	msg = vgpu_vreg(vgpu, offset + 4);

drivers/gpu/drm/i915/i915_active.c+70−29

 		}
 	} while (unlikely(is_barrier(active)));
-	if (!__i915_active_fence_set(active, fence))
+	fence = __i915_active_fence_set(active, fence);
+	if (!fence)
 		__i915_active_acquire(ref);
+	else
+		dma_fence_put(fence);
 out:
 	i915_active_release(ref);
 		return NULL;
 	}
-	rcu_read_lock();
 	prev = __i915_active_fence_set(active, fence);
-	if (prev)
+	if (!prev)
-		prev = dma_fence_get_rcu(prev);
-	else
 		__i915_active_acquire(ref);
-	rcu_read_unlock();
 	return prev;
 }
  *
  * Records the new @fence as the last active fence along its timeline in
  * this active tracker, moving the tracking callbacks from the previous
- * fence onto this one. Returns the previous fence (if not already completed),
+ * fence onto this one. Gets and returns a reference to the previous fence
- * which the caller must ensure is executed before the new fence. To ensure
+ * (if not already completed), which the caller must put after making sure
- * that the order of fences within the timeline of the i915_active_fence is
+ * that it is executed before the new fence. To ensure that the order of
- * understood, it should be locked by the caller.
+ * fences within the timeline of the i915_active_fence is understood, it
+ * should be locked by the caller.
  */
 struct dma_fence *
 __i915_active_fence_set(struct i915_active_fence *active,
 	struct dma_fence *prev;
 	unsigned long flags;
-	if (fence == rcu_access_pointer(active->fence))
+	/*
+	 * In case of fences embedded in i915_requests, their memory is
+	 * SLAB_FAILSAFE_BY_RCU, then it can be reused right after release
+	 * by new requests.  Then, there is a risk of passing back a pointer
+	 * to a new, completely unrelated fence that reuses the same memory
+	 * while tracked under a different active tracker.  Combined with i915
+	 * perf open/close operations that build await dependencies between
+	 * engine kernel context requests and user requests from different
+	 * timelines, this can lead to dependency loops and infinite waits.
+	 *
+	 * As a countermeasure, we try to get a reference to the active->fence
+	 * first, so if we succeed and pass it back to our user then it is not
+	 * released and potentially reused by an unrelated request before the
+	 * user has a chance to set up an await dependency on it.
+	 */
+	prev = i915_active_fence_get(active);
+	if (fence == prev)
 		return fence;
 	GEM_BUG_ON(test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags));
 	 * Consider that we have two threads arriving (A and B), with
 	 * C already resident as the active->fence.
 	 *
-	 * A does the xchg first, and so it sees C or NULL depending
+	 * Both A and B have got a reference to C or NULL, depending on the
-	 * on the timing of the interrupt handler. If it is NULL, the
+	 * timing of the interrupt handler.  Let's assume that if A has got C
-	 * previous fence must have been signaled and we know that
+	 * then it has locked C first (before B).
-	 * we are first on the timeline. If it is still present,
-	 * we acquire the lock on that fence and serialise with the interrupt
-	 * handler, in the process removing it from any future interrupt
-	 * callback. A will then wait on C before executing (if present).
-	 *
-	 * As B is second, it sees A as the previous fence and so waits for
-	 * it to complete its transition and takes over the occupancy for
-	 * itself -- remembering that it needs to wait on A before executing.
 	 *
 	 * Note the strong ordering of the timeline also provides consistent
 	 * nesting rules for the fence->lock; the inner lock is always the
 	 * older lock.
 	 */
 	spin_lock_irqsave(fence->lock, flags);
-	prev = xchg(__active_fence_slot(active), fence);
+	if (prev)
-	if (prev) {
-		GEM_BUG_ON(prev == fence);
 		spin_lock_nested(prev->lock, SINGLE_DEPTH_NESTING);
+	/*
+	 * A does the cmpxchg first, and so it sees C or NULL, as before, or
+	 * something else, depending on the timing of other threads and/or
+	 * interrupt handler.  If not the same as before then A unlocks C if
+	 * applicable and retries, starting from an attempt to get a new
+	 * active->fence.  Meanwhile, B follows the same path as A.
+	 * Once A succeeds with cmpxch, B fails again, retires, gets A from
+	 * active->fence, locks it as soon as A completes, and possibly
+	 * succeeds with cmpxchg.
+	 */
+	while (cmpxchg(__active_fence_slot(active), prev, fence) != prev) {
+		if (prev) {
+			spin_unlock(prev->lock);
+			dma_fence_put(prev);
+		}
+		spin_unlock_irqrestore(fence->lock, flags);
+		prev = i915_active_fence_get(active);
+		GEM_BUG_ON(prev == fence);
+		spin_lock_irqsave(fence->lock, flags);
+		if (prev)
+			spin_lock_nested(prev->lock, SINGLE_DEPTH_NESTING);
+	}
+	/*
+	 * If prev is NULL then the previous fence must have been signaled
+	 * and we know that we are first on the timeline.  If it is still
+	 * present then, having the lock on that fence already acquired, we
+	 * serialise with the interrupt handler, in the process of removing it
+	 * from any future interrupt callback.  A will then wait on C before
+	 * executing (if present).
+	 *
+	 * As B is second, it sees A as the previous fence and so waits for
+	 * it to complete its transition and takes over the occupancy for
+	 * itself -- remembering that it needs to wait on A before executing.
+	 */
+	if (prev) {
 		__list_del_entry(&active->cb.node);
 		spin_unlock(prev->lock); /* serialise with prev->cb_list */
 	}
 	int err = 0;
 	/* Must maintain timeline ordering wrt previous active requests */
-	rcu_read_lock();
 	fence = __i915_active_fence_set(active, &rq->fence);
-	if (fence) /* but the previous fence may not belong to that timeline! */
-		fence = dma_fence_get_rcu(fence);
-	rcu_read_unlock();
 	if (fence) {
 		err = i915_request_await_dma_fence(rq, fence);
 		dma_fence_put(fence);

drivers/gpu/drm/i915/i915_request.c+11−0

 	request_to_parent(rq)->parallel.last_rq = i915_request_get(rq);
+	/*
+	 * Users have to put a reference potentially got by
+	 * __i915_active_fence_set() to the returned request
+	 * when no longer needed
+	 */
 	return to_request(__i915_active_fence_set(&timeline->last_request,
 						  &rq->fence));
 }
 							 0);
 	}
+	/*
+	 * Users have to put the reference to prev potentially got
+	 * by __i915_active_fence_set() when no longer needed
+	 */
 	return prev;
 }
 		prev = __i915_request_ensure_ordering(rq, timeline);
 	else
 		prev = __i915_request_ensure_parallel_ordering(rq, timeline);
+	if (prev)
+		i915_request_put(prev);
 	/*
 	 * Make sure that no request gazumped us - if it was allocated after

drivers/gpu/drm/imx/ipuv3/ipuv3-crtc.c+1−1

@@ -310,7 +310,7 @@ static void ipu_crtc_mode_set_nofb(struct drm_crtc *crtc) · 309 unmodified lines
310	dev_warn(ipu_crtc->dev, "8-pixel align hactive %d -> %d\n",	310	dev_warn(ipu_crtc->dev, "8-pixel align hactive %d -> %d\n",
311	sig_cfg.mode.hactive, new_hactive);	311	sig_cfg.mode.hactive, new_hactive);
312		312
313	sig_cfg.mode.hfront_porch = new_hactive - sig_cfg.mode.hactive;	313	sig_cfg.mode.hfront_porch -= new_hactive - sig_cfg.mode.hactive;
314	sig_cfg.mode.hactive = new_hactive;	314	sig_cfg.mode.hactive = new_hactive;
315	}	315	}
316		316

drivers/gpu/drm/nouveau/nouveau_connector.c+1−1

@@ -967,7 +967,7 @@ nouveau_connector_get_modes(struct drm_connector *connector) · 966 unmodified lines
967	/* Determine display colour depth for everything except LVDS now,	967	/* Determine display colour depth for everything except LVDS now,
968	* DP requires this before mode_valid() is called.	968	* DP requires this before mode_valid() is called.
969	*/	969	*/
970	if (connector->connector_type != DRM_MODE_CONNECTOR_LVDS && nv_connector->native_mode)	970	if (connector->connector_type != DRM_MODE_CONNECTOR_LVDS)
971	nouveau_connector_detect_depth(connector);	971	nouveau_connector_detect_depth(connector);
972		972
973	/* Find the native mode if this is a digital panel, if we didn't	973	/* Find the native mode if this is a digital panel, if we didn't

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c+47−1

@@ -26,6 +26,8 @@ · 25 unmodified lines
26	#include "head.h"	26	#include "head.h"
27	#include "ior.h"	27	#include "ior.h"
28		28
		29	#include <drm/display/drm_dp.h>
		30
29	#include <subdev/bios.h>	31	#include <subdev/bios.h>
30	#include <subdev/bios/init.h>	32	#include <subdev/bios/init.h>
31	#include <subdev/gpio.h>	33	#include <subdev/gpio.h>
@@ -634,6 +636,50 @@ nvkm_dp_enable_supported_link_rates(struct nvkm_outp *outp) · 602 unmodified lines
634	return outp->dp.rates != 0;	636	return outp->dp.rates != 0;
635	}	637	}
636		638
		639	/* XXX: This is a big fat hack, and this is just drm_dp_read_dpcd_caps()
		640	* converted to work inside nvkm. This is a temporary holdover until we start
		641	* passing the drm_dp_aux device through NVKM
		642	*/
		643	static int
		644	nvkm_dp_read_dpcd_caps(struct nvkm_outp *outp)
		645	{
		646	struct nvkm_i2c_aux *aux = outp->dp.aux;
		647	u8 dpcd_ext[DP_RECEIVER_CAP_SIZE];
		648	int ret;
		649
		650	ret = nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dp.dpcd, DP_RECEIVER_CAP_SIZE);
		651	if (ret < 0)
		652	return ret;
		653
		654	/*
		655	* Prior to DP1.3 the bit represented by
		656	* DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT was reserved.
		657	* If it is set DP_DPCD_REV at 0000h could be at a value less than
		658	* the true capability of the panel. The only way to check is to
		659	* then compare 0000h and 2200h.
		660	*/
		661	if (!(outp->dp.dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
		662	DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT))
		663	return 0;
		664
		665	ret = nvkm_rdaux(aux, DP_DP13_DPCD_REV, dpcd_ext, sizeof(dpcd_ext));
		666	if (ret < 0)
		667	return ret;
		668
		669	if (outp->dp.dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {
		670	OUTP_DBG(outp, "Extended DPCD rev less than base DPCD rev (%d > %d)\n",
		671	outp->dp.dpcd[DP_DPCD_REV], dpcd_ext[DP_DPCD_REV]);
		672	return 0;
		673	}
		674
		675	if (!memcmp(outp->dp.dpcd, dpcd_ext, sizeof(dpcd_ext)))
		676	return 0;
		677
		678	memcpy(outp->dp.dpcd, dpcd_ext, sizeof(dpcd_ext));
		679
		680	return 0;
		681	}
		682
637	void	683	void
638	nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr)	684	nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr)
639	{	685	{
@@ -689,7 +735,7 @@ nvkm_dp_enable(struct nvkm_outp *outp, bool auxpwr) · 49 unmodified lines
689	memset(outp->dp.lttpr, 0x00, sizeof(outp->dp.lttpr));	735	memset(outp->dp.lttpr, 0x00, sizeof(outp->dp.lttpr));
690	}	736	}
691		737
692	if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, outp->dp.dpcd, sizeof(outp->dp.dpcd))) {	738	if (!nvkm_dp_read_dpcd_caps(outp)) {
693	const u8 rates[] = { 0x1e, 0x14, 0x0a, 0x06, 0 };	739	const u8 rates[] = { 0x1e, 0x14, 0x0a, 0x06, 0 };
694	const u8 *rate;	740	const u8 *rate;
695	int rate_max;	741	int rate_max;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.h+1−0

@@ -117,6 +117,7 @@ void gk104_grctx_generate_r418800(struct gf100_gr *); · 116 unmodified lines
117		117
118	extern const struct gf100_grctx_func gk110_grctx;	118	extern const struct gf100_grctx_func gk110_grctx;
119	void gk110_grctx_generate_r419eb0(struct gf100_gr *);	119	void gk110_grctx_generate_r419eb0(struct gf100_gr *);
		120	void gk110_grctx_generate_r419f78(struct gf100_gr *);
120		121
121	extern const struct gf100_grctx_func gk110b_grctx;	122	extern const struct gf100_grctx_func gk110b_grctx;
122	extern const struct gf100_grctx_func gk208_grctx;	123	extern const struct gf100_grctx_func gk208_grctx;

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c+3−1

@@ -906,7 +906,9 @@ static void · 905 unmodified lines
906	gk104_grctx_generate_r419f78(struct gf100_gr *gr)	906	gk104_grctx_generate_r419f78(struct gf100_gr *gr)
907	{	907	{
908	struct nvkm_device *device = gr->base.engine.subdev.device;	908	struct nvkm_device *device = gr->base.engine.subdev.device;
909	nvkm_mask(device, 0x419f78, 0x00000001, 0x00000000);	909
		910	/* bit 3 set disables loads in fp helper invocations, we need it enabled */
		911	nvkm_mask(device, 0x419f78, 0x00000009, 0x00000000);
910	}	912	}
911		913
912	void	914	void

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110.c+10−0

 	nvkm_mask(device, 0x419eb0, 0x00001000, 0x00001000);
 }
+void
+gk110_grctx_generate_r419f78(struct gf100_gr *gr)
+{
+	struct nvkm_device *device = gr->base.engine.subdev.device;
+	/* bit 3 set disables loads in fp helper invocations, we need it enabled */
+	nvkm_mask(device, 0x419f78, 0x00000008, 0x00000000);
+}
 const struct gf100_grctx_func
 gk110_grctx = {
 	.main  = gf100_grctx_generate_main,
 	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
 	.r418800 = gk104_grctx_generate_r418800,
 	.r419eb0 = gk110_grctx_generate_r419eb0,
+	.r419f78 = gk110_grctx_generate_r419f78,
 };

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk110b.c+1−0

@@ -103,4 +103,5 @@ gk110b_grctx = { · 102 unmodified lines
103	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,	103	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
104	.r418800 = gk104_grctx_generate_r418800,	104	.r418800 = gk104_grctx_generate_r418800,
105	.r419eb0 = gk110_grctx_generate_r419eb0,	105	.r419eb0 = gk110_grctx_generate_r419eb0,
		106	.r419f78 = gk110_grctx_generate_r419f78,
106	};	107	};

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk208.c+1−0

@@ -568,4 +568,5 @@ gk208_grctx = { · 567 unmodified lines
568	.dist_skip_table = gf117_grctx_generate_dist_skip_table,	568	.dist_skip_table = gf117_grctx_generate_dist_skip_table,
569	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,	569	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
570	.r418800 = gk104_grctx_generate_r418800,	570	.r418800 = gk104_grctx_generate_r418800,
		571	.r419f78 = gk110_grctx_generate_r419f78,
571	};	572	};

drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c+1−0

@@ -988,4 +988,5 @@ gm107_grctx = { · 987 unmodified lines
988	.r406500 = gm107_grctx_generate_r406500,	988	.r406500 = gm107_grctx_generate_r406500,
989	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,	989	.gpc_tpc_nr = gk104_grctx_generate_gpc_tpc_nr,
990	.r419e00 = gm107_grctx_generate_r419e00,	990	.r419e00 = gm107_grctx_generate_r419e00,
		991	.r419f78 = gk110_grctx_generate_r419f78,
991	};	992	};

drivers/gpu/drm/nouveau/nvkm/engine/gr/tu102.c+0−13

@@ -206,19 +206,6 @@ tu102_gr_av_to_init_veid(struct nvkm_blob blob, struct gf100_gr_pack *ppack) · 205 unmodified lines
206	return gk20a_gr_av_to_init_(blob, 64, 0x00100000, ppack);	206	return gk20a_gr_av_to_init_(blob, 64, 0x00100000, ppack);
207	}	207	}
208		208
209	int
210	tu102_gr_load(struct gf100_gr gr, int ver, const struct gf100_gr_fwif fwif)
211	{
212	int ret;
213
214	ret = gm200_gr_load(gr, ver, fwif);
215	if (ret)
216	return ret;
217
218	return gk20a_gr_load_net(gr, "gr/", "sw_veid_bundle_init", ver, tu102_gr_av_to_init_veid,
219	&gr->bundle_veid);
220	}
221
222	static const struct gf100_gr_fwif	209	static const struct gf100_gr_fwif
223	tu102_gr_fwif[] = {	210	tu102_gr_fwif[] = {
224	{ 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },	211	{ 0, gm200_gr_load, &tu102_gr, &gp108_gr_fecs_acr, &gp108_gr_gpccs_acr },

drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c+1−0

@@ -569,6 +569,7 @@ static const struct of_device_id s6d7aa0_of_match[] = { · 568 unmodified lines
569	},	569	},
570	{ /* sentinel */ }	570	{ /* sentinel */ }
571	};	571	};
		572	MODULE_DEVICE_TABLE(of, s6d7aa0_of_match);
572		573
573	static struct mipi_dsi_driver s6d7aa0_driver = {	574	static struct mipi_dsi_driver s6d7aa0_driver = {
574	.probe = s6d7aa0_probe,	575	.probe = s6d7aa0_probe,

drivers/gpu/drm/rockchip/rockchip_drm_vop.c+9−8

 	 * need align with 2 pixel.
 	 */
 	if (fb->format->is_yuv && ((new_plane_state->src.x1 >> 16) % 2)) {
-		DRM_ERROR("Invalid Source: Yuv format not support odd xpos\n");
+		DRM_DEBUG_KMS("Invalid Source: Yuv format not support odd xpos\n");
 		return -EINVAL;
 	}
 	if (fb->format->is_yuv && new_plane_state->rotation & DRM_MODE_REFLECT_Y) {
-		DRM_ERROR("Invalid Source: Yuv format does not support this rotation\n");
+		DRM_DEBUG_KMS("Invalid Source: Yuv format does not support this rotation\n");
 		return -EINVAL;
 	}
 		struct vop *vop = to_vop(crtc);
 		if (!vop->data->afbc) {
-			DRM_ERROR("vop does not support AFBC\n");
+			DRM_DEBUG_KMS("vop does not support AFBC\n");
 			return -EINVAL;
 		}
 			return ret;
 		if (new_plane_state->src.x1 || new_plane_state->src.y1) {
-			DRM_ERROR("AFBC does not support offset display, xpos=%d, ypos=%d, offset=%d\n",
+			DRM_DEBUG_KMS("AFBC does not support offset display, " \
-				  new_plane_state->src.x1,
+				      "xpos=%d, ypos=%d, offset=%d\n",
-				  new_plane_state->src.y1, fb->offsets[0]);
+				      new_plane_state->src.x1, new_plane_state->src.y1,
+				      fb->offsets[0]);
 			return -EINVAL;
 		}
 		if (new_plane_state->rotation && new_plane_state->rotation != DRM_MODE_ROTATE_0) {
-			DRM_ERROR("No rotation support in AFBC, rotation=%d\n",
+			DRM_DEBUG_KMS("No rotation support in AFBC, rotation=%d\n",
-				  new_plane_state->rotation);
+				      new_plane_state->rotation);
 			return -EINVAL;
 		}
 	}

drivers/gpu/drm/ttm/ttm_bo.c+2−1

@@ -519,7 +519,8 @@ static bool ttm_bo_evict_swapout_allowable(struct ttm_buffer_object *bo, · 518 unmodified lines
519		519
520	if (bo->pin_count) {	520	if (bo->pin_count) {
521	*locked = false;	521	*locked = false;
522	*busy = false;	522	if (busy)
		523	*busy = false;
523	return false;	524	return false;
524	}	525	}
525		526

drivers/hv/connection.c+6−7

 	 * Setup the vmbus event connection for channel interrupt
 	 * abstraction stuff
 	 */
-	vmbus_connection.int_page =
+	vmbus_connection.int_page = hv_alloc_hyperv_zeroed_page();
-	(void *)hv_alloc_hyperv_zeroed_page();
 	if (vmbus_connection.int_page == NULL) {
 		ret = -ENOMEM;
 		goto cleanup;
 	 * Setup the monitor notification facility. The 1st page for
 	 * parent->child and the 2nd page for child->parent
 	 */
-	vmbus_connection.monitor_pages[0] = (void *)hv_alloc_hyperv_page();
+	vmbus_connection.monitor_pages[0] = hv_alloc_hyperv_page();
-	vmbus_connection.monitor_pages[1] = (void *)hv_alloc_hyperv_page();
+	vmbus_connection.monitor_pages[1] = hv_alloc_hyperv_page();
 	if ((vmbus_connection.monitor_pages[0] == NULL) ||
 	    (vmbus_connection.monitor_pages[1] == NULL)) {
 		ret = -ENOMEM;
 		destroy_workqueue(vmbus_connection.work_queue);
 	if (vmbus_connection.int_page) {
-		hv_free_hyperv_page((unsigned long)vmbus_connection.int_page);
+		hv_free_hyperv_page(vmbus_connection.int_page);
 		vmbus_connection.int_page = NULL;
 	}
 	set_memory_encrypted((unsigned long)vmbus_connection.monitor_pages[0], 1);
 	set_memory_encrypted((unsigned long)vmbus_connection.monitor_pages[1], 1);
-	hv_free_hyperv_page((unsigned long)vmbus_connection.monitor_pages[0]);
+	hv_free_hyperv_page(vmbus_connection.monitor_pages[0]);
-	hv_free_hyperv_page((unsigned long)vmbus_connection.monitor_pages[1]);
+	hv_free_hyperv_page(vmbus_connection.monitor_pages[1]);
 	vmbus_connection.monitor_pages[0] = NULL;
 	vmbus_connection.monitor_pages[1] = NULL;
 }

drivers/hv/hv_balloon.c+1−1

@@ -1628,7 +1628,7 @@ static int hv_free_page_report(struct page_reporting_dev_info *pr_dev_info, · 1627 unmodified lines
1628	WARN_ON_ONCE(nents > HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES);	1628	WARN_ON_ONCE(nents > HV_MEMORY_HINT_MAX_GPA_PAGE_RANGES);
1629	WARN_ON_ONCE(sgl->length < (HV_HYP_PAGE_SIZE << page_reporting_order));	1629	WARN_ON_ONCE(sgl->length < (HV_HYP_PAGE_SIZE << page_reporting_order));
1630	local_irq_save(flags);	1630	local_irq_save(flags);
1631	hint = (struct hv_memory_hint *)this_cpu_ptr(hyperv_pcpu_input_arg);	1631	hint = *this_cpu_ptr(hyperv_pcpu_input_arg);
1632	if (!hint) {	1632	if (!hint) {
1633	local_irq_restore(flags);	1633	local_irq_restore(flags);
1634	return -ENOSPC;	1634	return -ENOSPC;

drivers/hv/hv_common.c+5−5

@@ -115,12 +115,12 @@ void *hv_alloc_hyperv_zeroed_page(void) · 114 unmodified lines
115	}	115	}
116	EXPORT_SYMBOL_GPL(hv_alloc_hyperv_zeroed_page);	116	EXPORT_SYMBOL_GPL(hv_alloc_hyperv_zeroed_page);
117		117
118	void hv_free_hyperv_page(unsigned long addr)	118	void hv_free_hyperv_page(void *addr)
119	{	119	{
120	if (PAGE_SIZE == HV_HYP_PAGE_SIZE)	120	if (PAGE_SIZE == HV_HYP_PAGE_SIZE)
121	free_page(addr);	121	free_page((unsigned long)addr);
122	else	122	else
123	kfree((void *)addr);	123	kfree(addr);
124	}	124	}
125	EXPORT_SYMBOL_GPL(hv_free_hyperv_page);	125	EXPORT_SYMBOL_GPL(hv_free_hyperv_page);
126		126
@@ -253,7 +253,7 @@ static void hv_kmsg_dump_unregister(void) · 126 unmodified lines
253	atomic_notifier_chain_unregister(&panic_notifier_list,	253	atomic_notifier_chain_unregister(&panic_notifier_list,
254	&hyperv_panic_report_block);	254	&hyperv_panic_report_block);
255		255
256	hv_free_hyperv_page((unsigned long)hv_panic_page);	256	hv_free_hyperv_page(hv_panic_page);
257	hv_panic_page = NULL;	257	hv_panic_page = NULL;
258	}	258	}
259		259
@@ -270,7 +270,7 @@ static void hv_kmsg_dump_register(void) · 10 unmodified lines
270	ret = kmsg_dump_register(&hv_kmsg_dumper);	270	ret = kmsg_dump_register(&hv_kmsg_dumper);
271	if (ret) {	271	if (ret) {
272	pr_err("Hyper-V: kmsg dump register error 0x%x\n", ret);	272	pr_err("Hyper-V: kmsg dump register error 0x%x\n", ret);
273	hv_free_hyperv_page((unsigned long)hv_panic_page);	273	hv_free_hyperv_page(hv_panic_page);
274	hv_panic_page = NULL;	274	hv_panic_page = NULL;
275	}	275	}
276	}	276	}

drivers/hwmon/aquacomputer_d5next.c+36−1

 #include <linux/crc16.h>
 #include <linux/debugfs.h>
+#include <linux/delay.h>
 #include <linux/hid.h>
 #include <linux/hwmon.h>
 #include <linux/jiffies.h>
+#include <linux/ktime.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/seq_file.h>
 #define CTRL_REPORT_ID			0x03
 #define AQUAERO_CTRL_REPORT_ID		0x0b
+#define CTRL_REPORT_DELAY		200	/* ms */
 /* The HID report that the official software always sends
  * after writing values, currently same for all devices
  */
 	int secondary_ctrl_report_size;
 	u8 *secondary_ctrl_report;
+	ktime_t last_ctrl_report_op;
+	int ctrl_report_delay;	/* Delay between two ctrl report operations, in ms */
 	int buffer_size;
 	u8 *buffer;
 	int checksum_start;
 	return 0;
 }
+static void aqc_delay_ctrl_report(struct aqc_data *priv)
+{
+	/*
+	 * If previous read or write is too close to this one, delay the current operation
+	 * to give the device enough time to process the previous one.
+	 */
+	if (priv->ctrl_report_delay) {
+		s64 delta = ktime_ms_delta(ktime_get(), priv->last_ctrl_report_op);
+		if (delta < priv->ctrl_report_delay)
+			msleep(priv->ctrl_report_delay - delta);
+	}
+}
 /* Expects the mutex to be locked */
 static int aqc_get_ctrl_data(struct aqc_data *priv)
 {
 	int ret;
+	aqc_delay_ctrl_report(priv);
 	memset(priv->buffer, 0x00, priv->buffer_size);
 	ret = hid_hw_raw_request(priv->hdev, priv->ctrl_report_id, priv->buffer, priv->buffer_size,
 				 HID_FEATURE_REPORT, HID_REQ_GET_REPORT);
 	if (ret < 0)
 		ret = -ENODATA;
+	priv->last_ctrl_report_op = ktime_get();
 	return ret;
 }
 	int ret;
 	u16 checksum;
+	aqc_delay_ctrl_report(priv);
 	/* Checksum is not needed for Aquaero */
 	if (priv->kind != aquaero) {
 		/* Init and xorout value for CRC-16/USB is 0xffff */
 	ret = hid_hw_raw_request(priv->hdev, priv->ctrl_report_id, priv->buffer, priv->buffer_size,
 				 HID_FEATURE_REPORT, HID_REQ_SET_REPORT);
 	if (ret < 0)
-		return ret;
+		goto record_access_and_ret;
 	/* The official software sends this report after every change, so do it here as well */
 	ret = hid_hw_raw_request(priv->hdev, priv->secondary_ctrl_report_id,
 				 priv->secondary_ctrl_report, priv->secondary_ctrl_report_size,
 				 HID_FEATURE_REPORT, HID_REQ_SET_REPORT);
+record_access_and_ret:
+	priv->last_ctrl_report_op = ktime_get();
 	return ret;
 }
 		priv->buffer_size = AQUAERO_CTRL_REPORT_SIZE;
 		priv->temp_ctrl_offset = AQUAERO_TEMP_CTRL_OFFSET;
+		priv->ctrl_report_delay = CTRL_REPORT_DELAY;
 		priv->temp_label = label_temp_sensors;
 		priv->virtual_temp_label = label_virtual_temp_sensors;
 		priv->temp_ctrl_offset = D5NEXT_TEMP_CTRL_OFFSET;
 		priv->buffer_size = D5NEXT_CTRL_REPORT_SIZE;
+		priv->ctrl_report_delay = CTRL_REPORT_DELAY;
 		priv->power_cycle_count_offset = D5NEXT_POWER_CYCLES;
 		priv->temp_ctrl_offset = OCTO_TEMP_CTRL_OFFSET;
 		priv->buffer_size = OCTO_CTRL_REPORT_SIZE;
+		priv->ctrl_report_delay = CTRL_REPORT_DELAY;
 		priv->power_cycle_count_offset = OCTO_POWER_CYCLES;
 		priv->temp_ctrl_offset = QUADRO_TEMP_CTRL_OFFSET;
 		priv->buffer_size = QUADRO_CTRL_REPORT_SIZE;
+		priv->ctrl_report_delay = CTRL_REPORT_DELAY;
 		priv->flow_pulses_ctrl_offset = QUADRO_FLOW_PULSES_CTRL_OFFSET;
 		priv->power_cycle_count_offset = QUADRO_POWER_CYCLES;

drivers/hwmon/pmbus/bel-pfe.c+8−8

 enum chips {pfe1100, pfe3000};
 /*
- * Disable status check for pfe3000 devices, because some devices report
+ * Disable status check because some devices report communication error
- * communication error (invalid command) for VOUT_MODE command (0x20)
+ * (invalid command) for VOUT_MODE command (0x20) although the correct
- * although correct VOUT_MODE (0x16) is returned: it leads to incorrect
+ * VOUT_MODE (0x16) is returned: it leads to incorrect exponent in linear
- * exponent in linear mode.
+ * mode.
+ * This affects both pfe3000 and pfe1100.
  */
-static struct pmbus_platform_data pfe3000_plat_data = {
+static struct pmbus_platform_data pfe_plat_data = {
 	.flags = PMBUS_SKIP_STATUS_CHECK,
 };
 	int model;
 	model = (int)i2c_match_id(pfe_device_id, client)->driver_data;
+	client->dev.platform_data = &pfe_plat_data;
 	/*
 	 * PFE3000-12-069RA devices may not stay in page 0 during device
 	 * probe which leads to probe failure (read status word failed).
 	 * So let's set the device to page 0 at the beginning.
 	 */
-	if (model == pfe3000) {
+	if (model == pfe3000)
-		client->dev.platform_data = &pfe3000_plat_data;
 		i2c_smbus_write_byte_data(client, PMBUS_PAGE, 0);
-	}
 	return pmbus_do_probe(client, &pfe_driver_info[model]);
 }

drivers/iio/adc/ad7192.c+8−8

 #define AD7192_MODE_STA_MASK	BIT(20) /* Status Register transmission Mask */
 #define AD7192_MODE_CLKSRC(x)	(((x) & 0x3) << 18) /* Clock Source Select */
 #define AD7192_MODE_SINC3	BIT(15) /* SINC3 Filter Select */
-#define AD7192_MODE_ACX		BIT(14) /* AC excitation enable(AD7195 only)*/
 #define AD7192_MODE_ENPAR	BIT(13) /* Parity Enable */
 #define AD7192_MODE_CLKDIV	BIT(12) /* Clock divide by 2 (AD7190/2 only)*/
 #define AD7192_MODE_SCYCLE	BIT(11) /* Single cycle conversion */
 /* Configuration Register Bit Designations (AD7192_REG_CONF) */
 #define AD7192_CONF_CHOP	BIT(23) /* CHOP enable */
+#define AD7192_CONF_ACX		BIT(22) /* AC excitation enable(AD7195 only) */
 #define AD7192_CONF_REFSEL	BIT(20) /* REFIN1/REFIN2 Reference Select */
 #define AD7192_CONF_CHAN(x)	((x) << 8) /* Channel select */
 #define AD7192_CONF_CHAN_MASK	(0x7FF << 8) /* Channel select mask */
 	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 	struct ad7192_state *st = iio_priv(indio_dev);
-	return sysfs_emit(buf, "%d\n", !!(st->mode & AD7192_MODE_ACX));
+	return sysfs_emit(buf, "%d\n", !!(st->conf & AD7192_CONF_ACX));
 }
 static ssize_t ad7192_show_bridge_switch(struct device *dev,
 		ad_sd_write_reg(&st->sd, AD7192_REG_GPOCON, 1, st->gpocon);
 		break;
-	case AD7192_REG_MODE:
+	case AD7192_REG_CONF:
 		if (val)
-			st->mode |= AD7192_MODE_ACX;
+			st->conf |= AD7192_CONF_ACX;
 		else
-			st->mode &= ~AD7192_MODE_ACX;
+			st->conf &= ~AD7192_CONF_ACX;
-		ad_sd_write_reg(&st->sd, AD7192_REG_MODE, 3, st->mode);
+		ad_sd_write_reg(&st->sd, AD7192_REG_CONF, 3, st->conf);
 		break;
 	default:
 		ret = -EINVAL;
 static IIO_DEVICE_ATTR(ac_excitation_en, 0644,
 		       ad7192_show_ac_excitation, ad7192_set,
-		       AD7192_REG_MODE);
+		       AD7192_REG_CONF);
 static struct attribute *ad7192_attributes[] = {
 	&iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr,
 	&iio_dev_attr_bridge_switch_en.dev_attr.attr,
-	&iio_dev_attr_ac_excitation_en.dev_attr.attr,
 	NULL
 };
 static struct attribute *ad7195_attributes[] = {
 	&iio_dev_attr_filter_low_pass_3db_frequency_available.dev_attr.attr,
 	&iio_dev_attr_bridge_switch_en.dev_attr.attr,
+	&iio_dev_attr_ac_excitation_en.dev_attr.attr,
 	NULL
 };

drivers/iio/adc/ina2xx-adc.c+6−3

 enum ina2xx_ids { ina219, ina226 };
 struct ina2xx_config {
+	const char *name;
 	u16 config_default;
 	int calibration_value;
 	int shunt_voltage_lsb;	/* nV */
 static const struct ina2xx_config ina2xx_config[] = {
 	[ina219] = {
+		.name = "ina219",
 		.config_default = INA219_CONFIG_DEFAULT,
 		.calibration_value = 4096,
 		.shunt_voltage_lsb = 10000,
 		.chip_id = ina219,
 	},
 	[ina226] = {
+		.name = "ina226",
 		.config_default = INA226_CONFIG_DEFAULT,
 		.calibration_value = 2048,
 		.shunt_voltage_lsb = 2500,
 	/* Patch the current config register with default. */
 	val = chip->config->config_default;
-	if (id->driver_data == ina226) {
+	if (type == ina226) {
 		ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
 		ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
 		ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
 	}
 	indio_dev->modes = INDIO_DIRECT_MODE;
-	if (id->driver_data == ina226) {
+	if (type == ina226) {
 		indio_dev->channels = ina226_channels;
 		indio_dev->num_channels = ARRAY_SIZE(ina226_channels);
 		indio_dev->info = &ina226_info;
 		indio_dev->num_channels = ARRAY_SIZE(ina219_channels);
 		indio_dev->info = &ina219_info;
 	}
-	indio_dev->name = id->name;
+	indio_dev->name = id ? id->name : chip->config->name;
 	ret = devm_iio_kfifo_buffer_setup(&client->dev, indio_dev,
 					  &ina2xx_setup_ops);

drivers/iio/adc/meson_saradc.c+12−11

 		goto err_vref;
 	}
-	ret = clk_prepare_enable(priv->core_clk);
-	if (ret) {
-		dev_err(dev, "failed to enable core clk\n");
-		goto err_core_clk;
-	}
 	regval = FIELD_PREP(MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, 1);
 	regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG0,
 			   MESON_SAR_ADC_REG0_FIFO_CNT_IRQ_MASK, regval);
 	regmap_update_bits(priv->regmap, MESON_SAR_ADC_REG3,
 			   MESON_SAR_ADC_REG3_ADC_EN, 0);
 	meson_sar_adc_set_bandgap(indio_dev, false);
-	clk_disable_unprepare(priv->core_clk);
-err_core_clk:
 	regulator_disable(priv->vref);
 err_vref:
 	meson_sar_adc_unlock(indio_dev);
 	meson_sar_adc_set_bandgap(indio_dev, false);
-	clk_disable_unprepare(priv->core_clk);
 	regulator_disable(priv->vref);
 	if (!ret)
 	if (IS_ERR(priv->clkin))
 		return dev_err_probe(dev, PTR_ERR(priv->clkin), "failed to get clkin\n");
-	priv->core_clk = devm_clk_get(dev, "core");
+	priv->core_clk = devm_clk_get_enabled(dev, "core");
 	if (IS_ERR(priv->core_clk))
 		return dev_err_probe(dev, PTR_ERR(priv->core_clk), "failed to get core clk\n");
 static int meson_sar_adc_suspend(struct device *dev)
 {
 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
 	meson_sar_adc_hw_disable(indio_dev);
+	clk_disable_unprepare(priv->core_clk);
 	return 0;
 }
 static int meson_sar_adc_resume(struct device *dev)
 {
 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
+	struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
+	int ret;
+	ret = clk_prepare_enable(priv->core_clk);
+	if (ret) {
+		dev_err(dev, "failed to enable core clk\n");
+		return ret;
+	}
 	return meson_sar_adc_hw_enable(indio_dev);
 }

drivers/iio/common/cros_ec_sensors/cros_ec_sensors_core.c+1−1

@@ -253,7 +253,7 @@ int cros_ec_sensors_core_init(struct platform_device *pdev, · 252 unmodified lines
253	platform_set_drvdata(pdev, indio_dev);	253	platform_set_drvdata(pdev, indio_dev);
254		254
255	state->ec = ec->ec_dev;	255	state->ec = ec->ec_dev;
256	state->msg = devm_kzalloc(&pdev->dev,	256	state->msg = devm_kzalloc(&pdev->dev, sizeof(*state->msg) +
257	max((u16)sizeof(struct ec_params_motion_sense),	257	max((u16)sizeof(struct ec_params_motion_sense),
258	state->ec->max_response), GFP_KERNEL);	258	state->ec->max_response), GFP_KERNEL);
259	if (!state->msg)	259	if (!state->msg)

drivers/iio/frequency/admv1013.c+4−1

 static int admv1013_update_mixer_vgate(struct admv1013_state *st)
 {
-	unsigned int vcm, mixer_vgate;
+	unsigned int mixer_vgate;
+	int vcm;
 	vcm = regulator_get_voltage(st->reg);
+	if (vcm < 0)
+		return vcm;
 	if (vcm < 1800000)
 		mixer_vgate = (2389 * vcm / 1000000 + 8100) / 100;

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c+1−1

@@ -2687,7 +2687,7 @@ unknown_format: · 2686 unmodified lines
2687	static int lsm6dsx_get_acpi_mount_matrix(struct device *dev,	2687	static int lsm6dsx_get_acpi_mount_matrix(struct device *dev,
2688	struct iio_mount_matrix *orientation)	2688	struct iio_mount_matrix *orientation)
2689	{	2689	{
2690	return false;	2690	return -EOPNOTSUPP;
2691	}	2691	}
2692		2692
2693	#endif	2693	#endif

drivers/iio/industrialio-core.c+3−2

 int __iio_device_register(struct iio_dev *indio_dev, struct module *this_mod)
 {
 	struct iio_dev_opaque *iio_dev_opaque = to_iio_dev_opaque(indio_dev);
-	struct fwnode_handle *fwnode;
+	struct fwnode_handle *fwnode = NULL;
 	int ret;
 	if (!indio_dev->info)
 	/* If the calling driver did not initialize firmware node, do it here */
 	if (dev_fwnode(&indio_dev->dev))
 		fwnode = dev_fwnode(&indio_dev->dev);
-	else
+	/* The default dummy IIO device has no parent */
+	else if (indio_dev->dev.parent)
 		fwnode = dev_fwnode(indio_dev->dev.parent);
 	device_set_node(&indio_dev->dev, fwnode);

drivers/iio/light/rohm-bu27008.c+19−3

 	.address = BU27008_REG_##data##_LO,					\
 	.scan_index = BU27008_##color,						\
 	.scan_type = {								\
-		.sign = 's',							\
+		.sign = 'u',							\
 		.realbits = 16,							\
 		.storagebits = 16,						\
 		.endianness = IIO_LE,						\
 	for (i = 0; i < data->gts.num_itime; i++) {
 		new_time_sel = data->gts.itime_table[i].sel;
 		ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts,
-					new_time_sel, val, val2 * 1000, gain_sel);
+					new_time_sel, val, val2, gain_sel);
 		if (!ret)
 			break;
 	}
 		goto unlock_out;
 	ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts, time_sel,
-						val, val2 * 1000, &gain_sel);
+						val, val2, &gain_sel);
 	if (ret) {
 		ret = bu27008_try_find_new_time_gain(data, val, val2, &gain_sel);
 		if (ret)
 	return ret;
 }
+static int bu27008_write_raw_get_fmt(struct iio_dev *indio_dev,
+				     struct iio_chan_spec const *chan,
+				     long mask)
+{
+	switch (mask) {
+	case IIO_CHAN_INFO_SCALE:
+		return IIO_VAL_INT_PLUS_NANO;
+	case IIO_CHAN_INFO_INT_TIME:
+		return IIO_VAL_INT_PLUS_MICRO;
+	default:
+		return -EINVAL;
+	}
+}
 static int bu27008_write_raw(struct iio_dev *idev,
 			     struct iio_chan_spec const *chan,
 			     int val, int val2, long mask)
 static const struct iio_info bu27008_info = {
 	.read_raw = &bu27008_read_raw,
 	.write_raw = &bu27008_write_raw,
+	.write_raw_get_fmt = &bu27008_write_raw_get_fmt,
 	.read_avail = &bu27008_read_avail,
 	.update_scan_mode = bu27008_update_scan_mode,
 	.validate_trigger = iio_validate_own_trigger,

drivers/iio/light/rohm-bu27034.c+19−3

 		return -EINVAL;
 	if (chan == BU27034_CHAN_ALS) {
-		if (val == 0 && val2 == 1000)
+		if (val == 0 && val2 == 1000000)
 			return 0;
 		return -EINVAL;
 		goto unlock_out;
 	ret = iio_gts_find_gain_sel_for_scale_using_time(&data->gts, time_sel,
-						val, val2 * 1000, &gain_sel);
+						val, val2, &gain_sel);
 	if (ret) {
 		/*
 		 * Could not support scale with given time. Need to change time.
 			/* Can we provide requested scale with this time? */
 			ret = iio_gts_find_gain_sel_for_scale_using_time(
-				&data->gts, new_time_sel, val, val2 * 1000,
+				&data->gts, new_time_sel, val, val2,
 				&gain_sel);
 			if (ret)
 				continue;
 	}
 }
+static int bu27034_write_raw_get_fmt(struct iio_dev *indio_dev,
+				     struct iio_chan_spec const *chan,
+				     long mask)
+{
+	switch (mask) {
+	case IIO_CHAN_INFO_SCALE:
+		return IIO_VAL_INT_PLUS_NANO;
+	case IIO_CHAN_INFO_INT_TIME:
+		return IIO_VAL_INT_PLUS_MICRO;
+	default:
+		return -EINVAL;
+	}
+}
 static int bu27034_write_raw(struct iio_dev *idev,
 			     struct iio_chan_spec const *chan,
 			     int val, int val2, long mask)
 static const struct iio_info bu27034_info = {
 	.read_raw = &bu27034_read_raw,
 	.write_raw = &bu27034_write_raw,
+	.write_raw_get_fmt = &bu27034_write_raw_get_fmt,
 	.read_avail = &bu27034_read_avail,
 };

drivers/infiniband/core/umem.c+2−1

 	dma_addr_t mask;
 	int i;
+	umem->iova = va = virt;
 	if (umem->is_odp) {
 		unsigned int page_size = BIT(to_ib_umem_odp(umem)->page_shift);
 	 */
 	pgsz_bitmap &= GENMASK(BITS_PER_LONG - 1, PAGE_SHIFT);
-	umem->iova = va = virt;
 	/* The best result is the smallest page size that results in the minimum
 	 * number of required pages. Compute the largest page size that could
 	 * work based on VA address bits that don't change.

drivers/infiniband/hw/bnxt_re/main.c+3−1

 	rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode);
 	if (rc) {
+		bnxt_unregister_dev(rdev->en_dev);
+		clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
 		ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
 		return -EINVAL;
 	}
 	}
 	bnxt_re_setup_cc(rdev, false);
 	ib_unregister_device(&rdev->ibdev);
-	ib_dealloc_device(&rdev->ibdev);
 	bnxt_re_dev_uninit(rdev);
+	ib_dealloc_device(&rdev->ibdev);
 skip_remove:
 	mutex_unlock(&bnxt_re_mutex);
 }

drivers/infiniband/hw/bnxt_re/qplib_res.c+1−0

@@ -819,6 +819,7 @@ static int bnxt_qplib_alloc_dpi_tbl(struct bnxt_qplib_res *res, · 818 unmodified lines
819	}	819	}
820		820
821	memset((u8 *)dpit->tbl, 0xFF, bytes);	821	memset((u8 *)dpit->tbl, 0xFF, bytes);
		822	mutex_init(&res->dpi_tbl_lock);
822	dpit->priv_db = dpit->ucreg.bar_reg + dpit->ucreg.offset;	823	dpit->priv_db = dpit->ucreg.bar_reg + dpit->ucreg.offset;
823		824
824	return 0;	825	return 0;

drivers/infiniband/hw/hfi1/chip.c+1−0

@@ -12307,6 +12307,7 @@ static void free_cntrs(struct hfi1_devdata *dd) · 12306 unmodified lines
12307		12307
12308	if (dd->synth_stats_timer.function)	12308	if (dd->synth_stats_timer.function)
12309	del_timer_sync(&dd->synth_stats_timer);	12309	del_timer_sync(&dd->synth_stats_timer);
		12310	cancel_work_sync(&dd->update_cntr_work);
12310	ppd = (struct hfi1_pportdata *)(dd + 1);	12311	ppd = (struct hfi1_pportdata *)(dd + 1);
12311	for (i = 0; i < dd->num_pports; i++, ppd++) {	12312	for (i = 0; i < dd->num_pports; i++, ppd++) {
12312	kfree(ppd->cntrs);	12313	kfree(ppd->cntrs);

drivers/interconnect/qcom/bcm-voter.c+5−0

 		temp = agg_peak[bucket] * bcm->vote_scale;
 		bcm->vote_y[bucket] = bcm_div(temp, bcm->aux_data.unit);
+		if (bcm->enable_mask && (bcm->vote_x[bucket] || bcm->vote_y[bucket])) {
+			bcm->vote_x[bucket] = 0;
+			bcm->vote_y[bucket] = bcm->enable_mask;
+		}
 	}
 	if (bcm->keepalive && bcm->vote_x[QCOM_ICC_BUCKET_AMC] == 0 &&

drivers/interconnect/qcom/icc-rpmh.h+2−0

  * @vote_x: aggregated threshold values, represents sum_bw when @type is bw bcm
  * @vote_y: aggregated threshold values, represents peak_bw when @type is bw bcm
  * @vote_scale: scaling factor for vote_x and vote_y
+ * @enable_mask: optional mask to send as vote instead of vote_x/vote_y
  * @dirty: flag used to indicate whether the bcm needs to be committed
  * @keepalive: flag used to indicate whether a keepalive is required
  * @aux_data: auxiliary data used when calculating threshold values and
 	u64 vote_x[QCOM_ICC_NUM_BUCKETS];
 	u64 vote_y[QCOM_ICC_NUM_BUCKETS];
 	u64 vote_scale;
+	u32 enable_mask;
 	bool dirty;
 	bool keepalive;
 	struct bcm_db aux_data;

drivers/interconnect/qcom/sa8775p.c+1−0

@@ -1873,6 +1873,7 @@ static struct qcom_icc_node srvc_snoc = { · 1872 unmodified lines
1873		1873
1874	static struct qcom_icc_bcm bcm_acv = {	1874	static struct qcom_icc_bcm bcm_acv = {
1875	.name = "ACV",	1875	.name = "ACV",
		1876	.enable_mask = 0x8,
1876	.num_nodes = 1,	1877	.num_nodes = 1,
1877	.nodes = { &ebi },	1878	.nodes = { &ebi },
1878	};	1879	};

drivers/interconnect/qcom/sm8450.c+9−0

 static struct qcom_icc_bcm bcm_acv = {
 	.name = "ACV",
+	.enable_mask = 0x8,
 	.num_nodes = 1,
 	.nodes = { &ebi },
 };
 static struct qcom_icc_bcm bcm_cn0 = {
 	.name = "CN0",
+	.enable_mask = 0x1,
 	.keepalive = true,
 	.num_nodes = 55,
 	.nodes = { &qnm_gemnoc_cnoc, &qnm_gemnoc_pcie,
 static struct qcom_icc_bcm bcm_co0 = {
 	.name = "CO0",
+	.enable_mask = 0x1,
 	.num_nodes = 2,
 	.nodes = { &qxm_nsp, &qns_nsp_gemnoc },
 };
 static struct qcom_icc_bcm bcm_mm1 = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 12,
 	.nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp,
 		   &qnm_camnoc_sf, &qnm_mdp,
 static struct qcom_icc_bcm bcm_sh1 = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 7,
 	.nodes = { &alm_gpu_tcu, &alm_sys_tcu,
 		   &qnm_nsp_gemnoc, &qnm_pcie,
 static struct qcom_icc_bcm bcm_sn1 = {
 	.name = "SN1",
+	.enable_mask = 0x1,
 	.num_nodes = 4,
 	.nodes = { &qhm_gic, &qxm_pimem,
 		   &xm_gic, &qns_gemnoc_gc },
 static struct qcom_icc_bcm bcm_acv_disp = {
 	.name = "ACV",
+	.enable_mask = 0x1,
 	.num_nodes = 1,
 	.nodes = { &ebi_disp },
 };
 static struct qcom_icc_bcm bcm_mm1_disp = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 3,
 	.nodes = { &qnm_mdp_disp, &qnm_rot_disp,
 		   &qns_mem_noc_sf_disp },
 static struct qcom_icc_bcm bcm_sh1_disp = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 1,
 	.nodes = { &qnm_pcie_disp },
 };

drivers/interconnect/qcom/sm8550.c+17−0

 static struct qcom_icc_bcm bcm_acv = {
 	.name = "ACV",
+	.enable_mask = 0x8,
 	.num_nodes = 1,
 	.nodes = { &ebi },
 };
 static struct qcom_icc_bcm bcm_cn0 = {
 	.name = "CN0",
+	.enable_mask = 0x1,
 	.keepalive = true,
 	.num_nodes = 54,
 	.nodes = { &qsm_cfg, &qhs_ahb2phy0,
 static struct qcom_icc_bcm bcm_co0 = {
 	.name = "CO0",
+	.enable_mask = 0x1,
 	.num_nodes = 2,
 	.nodes = { &qxm_nsp, &qns_nsp_gemnoc },
 };
 static struct qcom_icc_bcm bcm_mm1 = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 8,
 	.nodes = { &qnm_camnoc_hf, &qnm_camnoc_icp,
 		   &qnm_camnoc_sf, &qnm_vapss_hcp,
 static struct qcom_icc_bcm bcm_sh1 = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 13,
 	.nodes = { &alm_gpu_tcu, &alm_sys_tcu,
 		   &chm_apps, &qnm_gpu,
 static struct qcom_icc_bcm bcm_sn1 = {
 	.name = "SN1",
+	.enable_mask = 0x1,
 	.num_nodes = 3,
 	.nodes = { &qhm_gic, &xm_gic,
 		   &qns_gemnoc_gc },
 static struct qcom_icc_bcm bcm_acv_disp = {
 	.name = "ACV",
+	.enable_mask = 0x1,
 	.num_nodes = 1,
 	.nodes = { &ebi_disp },
 };
 static struct qcom_icc_bcm bcm_sh1_disp = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 2,
 	.nodes = { &qnm_mnoc_hf_disp, &qnm_pcie_disp },
 };
 static struct qcom_icc_bcm bcm_acv_cam_ife_0 = {
 	.name = "ACV",
+	.enable_mask = 0x0,
 	.num_nodes = 1,
 	.nodes = { &ebi_cam_ife_0 },
 };
 static struct qcom_icc_bcm bcm_mm1_cam_ife_0 = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 4,
 	.nodes = { &qnm_camnoc_hf_cam_ife_0, &qnm_camnoc_icp_cam_ife_0,
 		   &qnm_camnoc_sf_cam_ife_0, &qns_mem_noc_sf_cam_ife_0 },
 static struct qcom_icc_bcm bcm_sh1_cam_ife_0 = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 3,
 	.nodes = { &qnm_mnoc_hf_cam_ife_0, &qnm_mnoc_sf_cam_ife_0,
 		   &qnm_pcie_cam_ife_0 },
 static struct qcom_icc_bcm bcm_acv_cam_ife_1 = {
 	.name = "ACV",
+	.enable_mask = 0x0,
 	.num_nodes = 1,
 	.nodes = { &ebi_cam_ife_1 },
 };
 static struct qcom_icc_bcm bcm_mm1_cam_ife_1 = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 4,
 	.nodes = { &qnm_camnoc_hf_cam_ife_1, &qnm_camnoc_icp_cam_ife_1,
 		   &qnm_camnoc_sf_cam_ife_1, &qns_mem_noc_sf_cam_ife_1 },
 static struct qcom_icc_bcm bcm_sh1_cam_ife_1 = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 3,
 	.nodes = { &qnm_mnoc_hf_cam_ife_1, &qnm_mnoc_sf_cam_ife_1,
 		   &qnm_pcie_cam_ife_1 },
 static struct qcom_icc_bcm bcm_acv_cam_ife_2 = {
 	.name = "ACV",
+	.enable_mask = 0x0,
 	.num_nodes = 1,
 	.nodes = { &ebi_cam_ife_2 },
 };
 static struct qcom_icc_bcm bcm_mm1_cam_ife_2 = {
 	.name = "MM1",
+	.enable_mask = 0x1,
 	.num_nodes = 4,
 	.nodes = { &qnm_camnoc_hf_cam_ife_2, &qnm_camnoc_icp_cam_ife_2,
 		   &qnm_camnoc_sf_cam_ife_2, &qns_mem_noc_sf_cam_ife_2 },
 static struct qcom_icc_bcm bcm_sh1_cam_ife_2 = {
 	.name = "SH1",
+	.enable_mask = 0x1,
 	.num_nodes = 3,
 	.nodes = { &qnm_mnoc_hf_cam_ife_2, &qnm_mnoc_sf_cam_ife_2,
 		   &qnm_pcie_cam_ife_2 },

drivers/isdn/hardware/mISDN/hfcpci.c+5−5

@@ -839,7 +839,7 @@ hfcpci_fill_fifo(struct bchannel *bch) · 838 unmodified lines
839	z1t = cpu_to_le16(new_z1); / now send data */	839	z1t = cpu_to_le16(new_z1); / now send data */
840	if (bch->tx_idx < bch->tx_skb->len)	840	if (bch->tx_idx < bch->tx_skb->len)
841	return;	841	return;
842	dev_kfree_skb(bch->tx_skb);	842	dev_kfree_skb_any(bch->tx_skb);
843	if (get_next_bframe(bch))	843	if (get_next_bframe(bch))
844	goto next_t_frame;	844	goto next_t_frame;
845	return;	845	return;
@@ -895,7 +895,7 @@ hfcpci_fill_fifo(struct bchannel *bch) · 49 unmodified lines
895	}	895	}
896	bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */	896	bz->za[new_f1].z1 = cpu_to_le16(new_z1); /* for next buffer */
897	bz->f1 = new_f1; /* next frame */	897	bz->f1 = new_f1; /* next frame */
898	dev_kfree_skb(bch->tx_skb);	898	dev_kfree_skb_any(bch->tx_skb);
899	get_next_bframe(bch);	899	get_next_bframe(bch);
900	}	900	}
901		901
@@ -1119,7 +1119,7 @@ tx_birq(struct bchannel *bch) · 217 unmodified lines
1119	if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len)	1119	if (bch->tx_skb && bch->tx_idx < bch->tx_skb->len)
1120	hfcpci_fill_fifo(bch);	1120	hfcpci_fill_fifo(bch);
1121	else {	1121	else {
1122	dev_kfree_skb(bch->tx_skb);	1122	dev_kfree_skb_any(bch->tx_skb);
1123	if (get_next_bframe(bch))	1123	if (get_next_bframe(bch))
1124	hfcpci_fill_fifo(bch);	1124	hfcpci_fill_fifo(bch);
1125	}	1125	}
@@ -2277,7 +2277,7 @@ _hfcpci_softirq(struct device dev, void unused) · 1151 unmodified lines
2277	return 0;	2277	return 0;
2278		2278
2279	if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) {	2279	if (hc->hw.int_m2 & HFCPCI_IRQ_ENABLE) {
2280	spin_lock(&hc->lock);	2280	spin_lock_irq(&hc->lock);
2281	bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1);	2281	bch = Sel_BCS(hc, hc->hw.bswapped ? 2 : 1);
2282	if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */	2282	if (bch && bch->state == ISDN_P_B_RAW) { /* B1 rx&tx */
2283	main_rec_hfcpci(bch);	2283	main_rec_hfcpci(bch);
@@ -2288,7 +2288,7 @@ _hfcpci_softirq(struct device dev, void unused) · 4 unmodified lines
2288	main_rec_hfcpci(bch);	2288	main_rec_hfcpci(bch);
2289	tx_birq(bch);	2289	tx_birq(bch);
2290	}	2290	}
2291	spin_unlock(&hc->lock);	2291	spin_unlock_irq(&hc->lock);
2292	}	2292	}
2293	return 0;	2293	return 0;
2294	}	2294	}

drivers/isdn/mISDN/dsp.h+1−1

@@ -247,7 +247,7 @@ extern void dsp_cmx_hardware(struct dsp_conf conf, struct dsp dsp); · 246 unmodified lines
247	extern int dsp_cmx_conf(struct dsp *dsp, u32 conf_id);	247	extern int dsp_cmx_conf(struct dsp *dsp, u32 conf_id);
248	extern void dsp_cmx_receive(struct dsp dsp, struct sk_buff skb);	248	extern void dsp_cmx_receive(struct dsp dsp, struct sk_buff skb);
249	extern void dsp_cmx_hdlc(struct dsp dsp, struct sk_buff skb);	249	extern void dsp_cmx_hdlc(struct dsp dsp, struct sk_buff skb);
250	extern void dsp_cmx_send(void *arg);	250	extern void dsp_cmx_send(struct timer_list *arg);
251	extern void dsp_cmx_transmit(struct dsp dsp, struct sk_buff skb);	251	extern void dsp_cmx_transmit(struct dsp dsp, struct sk_buff skb);
252	extern int dsp_cmx_del_conf_member(struct dsp *dsp);	252	extern int dsp_cmx_del_conf_member(struct dsp *dsp);
253	extern int dsp_cmx_del_conf(struct dsp_conf *conf);	253	extern int dsp_cmx_del_conf(struct dsp_conf *conf);

drivers/isdn/mISDN/dsp_cmx.c+1−1

@@ -1614,7 +1614,7 @@ static u16 dsp_count; /* last sample count */ · 1613 unmodified lines
1614	static int dsp_count_valid; /* if we have last sample count */	1614	static int dsp_count_valid; /* if we have last sample count */
1615		1615
1616	void	1616	void
1617	dsp_cmx_send(void *arg)	1617	dsp_cmx_send(struct timer_list *arg)
1618	{	1618	{
1619	struct dsp_conf *conf;	1619	struct dsp_conf *conf;
1620	struct dsp_conf_member *member;	1620	struct dsp_conf_member *member;

drivers/isdn/mISDN/dsp_core.c+1−1

@@ -1195,7 +1195,7 @@ static int __init dsp_init(void) · 1194 unmodified lines
1195	}	1195	}
1196		1196
1197	/* set sample timer */	1197	/* set sample timer */
1198	timer_setup(&dsp_spl_tl, (void *)dsp_cmx_send, 0);	1198	timer_setup(&dsp_spl_tl, dsp_cmx_send, 0);
1199	dsp_spl_tl.expires = jiffies + dsp_tics;	1199	dsp_spl_tl.expires = jiffies + dsp_tics;
1200	dsp_spl_jiffies = dsp_spl_tl.expires;	1200	dsp_spl_jiffies = dsp_spl_tl.expires;
1201	add_timer(&dsp_spl_tl);	1201	add_timer(&dsp_spl_tl);

drivers/media/platform/qcom/venus/hfi_cmds.c+2−2

@@ -251,8 +251,8 @@ int pkt_session_unset_buffers(struct hfi_session_release_buffer_pkt *pkt, · 250 unmodified lines
251		251
252	pkt->extradata_size = 0;	252	pkt->extradata_size = 0;
253	pkt->shdr.hdr.size =	253	pkt->shdr.hdr.size =
254	struct_size((struct hfi_session_set_buffers_pkt *)0,	254	struct_size_t(struct hfi_session_set_buffers_pkt,
255	buffer_info, bd->num_buffers);	255	buffer_info, bd->num_buffers);
256	}	256	}
257		257
258	pkt->response_req = bd->response_required;	258	pkt->response_req = bd->response_required;

drivers/memory/tegra/mc.c+37−0

@@ -755,6 +755,43 @@ const char *const tegra_mc_error_names[8] = { · 754 unmodified lines
755	[6] = "SMMU translation error",	755	[6] = "SMMU translation error",
756	};	756	};
757		757
		758	struct icc_node tegra_mc_icc_xlate(struct of_phandle_args spec, void *data)
		759	{
		760	struct tegra_mc *mc = icc_provider_to_tegra_mc(data);
		761	struct icc_node *node;
		762
		763	list_for_each_entry(node, &mc->provider.nodes, node_list) {
		764	if (node->id == spec->args[0])
		765	return node;
		766	}
		767
		768	/*
		769	* If a client driver calls devm_of_icc_get() before the MC driver
		770	* is probed, then return EPROBE_DEFER to the client driver.
		771	*/
		772	return ERR_PTR(-EPROBE_DEFER);
		773	}
		774
		775	static int tegra_mc_icc_get(struct icc_node node, u32 average, u32 *peak)
		776	{
		777	*average = 0;
		778	*peak = 0;
		779
		780	return 0;
		781	}
		782
		783	static int tegra_mc_icc_set(struct icc_node src, struct icc_node dst)
		784	{
		785	return 0;
		786	}
		787
		788	const struct tegra_mc_icc_ops tegra_mc_icc_ops = {
		789	.xlate = tegra_mc_icc_xlate,
		790	.aggregate = icc_std_aggregate,
		791	.get_bw = tegra_mc_icc_get,
		792	.set = tegra_mc_icc_set,
		793	};
		794
758	/*	795	/*
759	* Memory Controller (MC) has few Memory Clients that are issuing memory	796	* Memory Controller (MC) has few Memory Clients that are issuing memory
760	* bandwidth allocation requests to the MC interconnect provider. The MC	797	* bandwidth allocation requests to the MC interconnect provider. The MC

drivers/memory/tegra/tegra194.c+1−0

@@ -1355,6 +1355,7 @@ const struct tegra_mc_soc tegra194_mc_soc = { · 1354 unmodified lines
1355	MC_INT_SECURITY_VIOLATION \| MC_INT_DECERR_EMEM,	1355	MC_INT_SECURITY_VIOLATION \| MC_INT_DECERR_EMEM,
1356	.has_addr_hi_reg = true,	1356	.has_addr_hi_reg = true,
1357	.ops = &tegra186_mc_ops,	1357	.ops = &tegra186_mc_ops,
		1358	.icc_ops = &tegra_mc_icc_ops,
1358	.ch_intmask = 0x00000f00,	1359	.ch_intmask = 0x00000f00,
1359	.global_intstatus_channel_shift = 8,	1360	.global_intstatus_channel_shift = 8,
1360	};	1361	};

drivers/memory/tegra/tegra234.c+3−24

 		return 0;
 	if (!mc->bwmgr_mrq_supported)
-		return -EINVAL;
+		return 0;
 	if (!mc->bpmp) {
 		dev_err(mc->dev, "BPMP reference NULL\n");
 	struct tegra_mc *mc = icc_provider_to_tegra_mc(p);
 	if (!mc->bwmgr_mrq_supported)
-		return -EINVAL;
+		return 0;
 	if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 ||
 	    node->id == TEGRA_ICC_MC_CPU_CLUSTER1 ||
 	return 0;
 }
-static struct icc_node*
-tegra234_mc_of_icc_xlate(struct of_phandle_args *spec, void *data)
-{
-	struct tegra_mc *mc = icc_provider_to_tegra_mc(data);
-	unsigned int cl_id = spec->args[0];
-	struct icc_node *node;
-	list_for_each_entry(node, &mc->provider.nodes, node_list) {
-		if (node->id != cl_id)
-			continue;
-		return node;
-	}
-	/*
-	 * If a client driver calls devm_of_icc_get() before the MC driver
-	 * is probed, then return EPROBE_DEFER to the client driver.
-	 */
-	return ERR_PTR(-EPROBE_DEFER);
-}
 static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *peak)
 {
 	*avg = 0;
 }
 static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = {
-	.xlate = tegra234_mc_of_icc_xlate,
+	.xlate = tegra_mc_icc_xlate,
 	.aggregate = tegra234_mc_icc_aggregate,
 	.get_bw = tegra234_mc_icc_get_init_bw,
 	.set = tegra234_mc_icc_set,

drivers/misc/cardreader/rts5227.c+1−1

@@ -195,7 +195,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) · 194 unmodified lines
195	}	195	}
196	}	196	}
197		197
198	if (option->force_clkreq_0)	198	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
199	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,	199	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,
200	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);	200	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
201	else	201	else

drivers/misc/cardreader/rts5228.c+0−18

@@ -435,17 +435,10 @@ static void rts5228_init_from_cfg(struct rtsx_pcr *pcr) · 434 unmodified lines
435	option->ltr_enabled = false;	435	option->ltr_enabled = false;
436	}	436	}
437	}	437	}
438
439	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
440	\| PM_L1_1_EN \| PM_L1_2_EN))
441	option->force_clkreq_0 = false;
442	else
443	option->force_clkreq_0 = true;
444	}	438	}
445		439
446	static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)	440	static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
447	{	441	{
448	struct rtsx_cr_option *option = &pcr->option;
449		442
450	rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,	443	rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,
451	CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);	444	CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
@@ -476,17 +469,6 @@ static int rts5228_extra_init_hw(struct rtsx_pcr *pcr) · 24 unmodified lines
476	else	469	else
477	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);	470	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
478		471
479	/*
480	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
481	* to drive low, and we forcibly request clock.
482	*/
483	if (option->force_clkreq_0)
484	rtsx_pci_write_register(pcr, PETXCFG,
485	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
486	else
487	rtsx_pci_write_register(pcr, PETXCFG,
488	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
489
490	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);	472	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
491		473
492	if (pcr->rtd3_en) {	474	if (pcr->rtd3_en) {

drivers/misc/cardreader/rts5249.c+1−2

@@ -327,12 +327,11 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) · 326 unmodified lines
327	}	327	}
328	}	328	}
329		329
330
331	/*	330	/*
332	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced	331	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
333	* to drive low, and we forcibly request clock.	332	* to drive low, and we forcibly request clock.
334	*/	333	*/
335	if (option->force_clkreq_0)	334	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)
336	rtsx_pci_write_register(pcr, PETXCFG,	335	rtsx_pci_write_register(pcr, PETXCFG,
337	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);	336	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
338	else	337	else

drivers/misc/cardreader/rts5260.c+0−18

@@ -517,17 +517,10 @@ static void rts5260_init_from_cfg(struct rtsx_pcr *pcr) · 516 unmodified lines
517	option->ltr_enabled = false;	517	option->ltr_enabled = false;
518	}	518	}
519	}	519	}
520
521	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
522	\| PM_L1_1_EN \| PM_L1_2_EN))
523	option->force_clkreq_0 = false;
524	else
525	option->force_clkreq_0 = true;
526	}	520	}
527		521
528	static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)	522	static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
529	{	523	{
530	struct rtsx_cr_option *option = &pcr->option;
531		524
532	/* Set mcu_cnt to 7 to ensure data can be sampled properly */	525	/* Set mcu_cnt to 7 to ensure data can be sampled properly */
533	rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);	526	rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
@@ -546,17 +539,6 @@ static int rts5260_extra_init_hw(struct rtsx_pcr *pcr) · 12 unmodified lines
546		539
547	rts5260_init_hw(pcr);	540	rts5260_init_hw(pcr);
548		541
549	/*
550	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
551	* to drive low, and we forcibly request clock.
552	*/
553	if (option->force_clkreq_0)
554	rtsx_pci_write_register(pcr, PETXCFG,
555	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
556	else
557	rtsx_pci_write_register(pcr, PETXCFG,
558	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
559
560	rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);	542	rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
561		543
562	return 0;	544	return 0;

drivers/misc/cardreader/rts5261.c+0−18

@@ -498,17 +498,10 @@ static void rts5261_init_from_cfg(struct rtsx_pcr *pcr) · 497 unmodified lines
498	option->ltr_enabled = false;	498	option->ltr_enabled = false;
499	}	499	}
500	}	500	}
501
502	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
503	\| PM_L1_1_EN \| PM_L1_2_EN))
504	option->force_clkreq_0 = false;
505	else
506	option->force_clkreq_0 = true;
507	}	501	}
508		502
509	static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)	503	static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
510	{	504	{
511	struct rtsx_cr_option *option = &pcr->option;
512	u32 val;	505	u32 val;
513		506
514	rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,	507	rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
@@ -554,17 +547,6 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr) · 39 unmodified lines
554	else	547	else
555	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);	548	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
556		549
557	/*
558	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
559	* to drive low, and we forcibly request clock.
560	*/
561	if (option->force_clkreq_0)
562	rtsx_pci_write_register(pcr, PETXCFG,
563	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
564	else
565	rtsx_pci_write_register(pcr, PETXCFG,
566	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
567
568	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);	550	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
569		551
570	if (pcr->rtd3_en) {	552	if (pcr->rtd3_en) {

drivers/misc/cardreader/rtsx_pcr.c+4−1

 			return err;
 	}
-	if (pcr->aspm_mode == ASPM_MODE_REG)
+	if (pcr->aspm_mode == ASPM_MODE_REG) {
 		rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30);
+		rtsx_pci_write_register(pcr, PETXCFG,
+				FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
+	}
 	/* No CD interrupt if probing driver with card inserted.
 	 * So we need to initialize pcr->card_exist here.

drivers/misc/tps6594-esm.c+18−1

 #include <linux/mfd/tps6594.h>
+#define TPS6594_DEV_REV_1 0x08
 static irqreturn_t tps6594_esm_isr(int irq, void *dev_id)
 {
 	struct platform_device *pdev = dev_id;
 {
 	struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent);
 	struct device *dev = &pdev->dev;
+	unsigned int rev;
 	int irq;
 	int ret;
 	int i;
-	for (i = 0 ; i < pdev->num_resources ; i++) {
+	/*
+	 * Due to a bug in revision 1 of the PMIC, the GPIO3 used for the
+	 * SoC ESM function is used to power the load switch instead.
+	 * As a consequence, ESM can not be used on those PMIC.
+	 * Check the version and return an error in case of revision 1.
+	 */
+	ret = regmap_read(tps->regmap, TPS6594_REG_DEV_REV, &rev);
+	if (ret)
+		return dev_err_probe(dev, ret,
+				     "Failed to read PMIC revision\n");
+	if (rev == TPS6594_DEV_REV_1)
+		return dev_err_probe(dev, -ENODEV,
+			      "ESM not supported for revision 1 PMIC\n");
+	for (i = 0; i < pdev->num_resources; i++) {
 		irq = platform_get_irq_byname(pdev, pdev->resource[i].name);
 		if (irq < 0)
 			return dev_err_probe(dev, irq, "Failed to get %s irq\n",

drivers/mmc/host/moxart-mmc.c+1−7

 				return;
 			}
 			for (len = 0; len < remain && len < host->fifo_width;) {
-				/* SCR data must be read in big endian. */
+				*sgp = ioread32(host->base + REG_DATA_WINDOW);
-				if (data->mrq->cmd->opcode == SD_APP_SEND_SCR)
-					*sgp = ioread32be(host->base +
-							  REG_DATA_WINDOW);
-				else
-					*sgp = ioread32(host->base +
-							REG_DATA_WINDOW);
 				sgp++;
 				len += 4;
 			}

drivers/mmc/host/sdhci_f_sdh30.c+27−33

 	bool enable_cmd_dat_delay;
 };
+static void *sdhci_f_sdhost_priv(struct sdhci_host *host)
+{
+	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+	return sdhci_pltfm_priv(pltfm_host);
+}
 static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
 {
-	struct f_sdhost_priv *priv = sdhci_priv(host);
+	struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
 	u32 ctrl = 0;
 	usleep_range(2500, 3000);
 static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
 {
-	struct f_sdhost_priv *priv = sdhci_priv(host);
+	struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
 	u32 ctl;
 	if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
 	.set_uhs_signaling = sdhci_set_uhs_signaling,
 };
+static const struct sdhci_pltfm_data sdhci_f_sdh30_pltfm_data = {
+	.ops = &sdhci_f_sdh30_ops,
+	.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC
+		| SDHCI_QUIRK_INVERTED_WRITE_PROTECT,
+	.quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE
+		|  SDHCI_QUIRK2_TUNING_WORK_AROUND,
+};
 static int sdhci_f_sdh30_probe(struct platform_device *pdev)
 {
 	struct sdhci_host *host;
 	struct device *dev = &pdev->dev;
-	int irq, ctrl = 0, ret = 0;
+	int ctrl = 0, ret = 0;
 	struct f_sdhost_priv *priv;
+	struct sdhci_pltfm_host *pltfm_host;
 	u32 reg = 0;
-	irq = platform_get_irq(pdev, 0);
+	host = sdhci_pltfm_init(pdev, &sdhci_f_sdh30_pltfm_data,
-	if (irq < 0)
+				sizeof(struct f_sdhost_priv));
-		return irq;
-	host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
 	if (IS_ERR(host))
 		return PTR_ERR(host);
-	priv = sdhci_priv(host);
+	pltfm_host = sdhci_priv(host);
+	priv = sdhci_pltfm_priv(pltfm_host);
 	priv->dev = dev;
-	host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
-		       SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
-	host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
-			SDHCI_QUIRK2_TUNING_WORK_AROUND;
 	priv->enable_cmd_dat_delay = device_property_read_bool(dev,
 						"fujitsu,cmd-dat-delay-select");
 	if (ret)
 		goto err;
-	platform_set_drvdata(pdev, host);
-	host->hw_name = "f_sdh30";
-	host->ops = &sdhci_f_sdh30_ops;
-	host->irq = irq;
-	host->ioaddr = devm_platform_ioremap_resource(pdev, 0);
-	if (IS_ERR(host->ioaddr)) {
-		ret = PTR_ERR(host->ioaddr);
-		goto err;
-	}
 	if (dev_of_node(dev)) {
 		sdhci_get_of_property(pdev);
 err_clk:
 	clk_disable_unprepare(priv->clk_iface);
 err:
-	sdhci_free_host(host);
+	sdhci_pltfm_free(pdev);
 	return ret;
 }
 static int sdhci_f_sdh30_remove(struct platform_device *pdev)
 {
 	struct sdhci_host *host = platform_get_drvdata(pdev);
-	struct f_sdhost_priv *priv = sdhci_priv(host);
+	struct f_sdhost_priv *priv = sdhci_f_sdhost_priv(host);
-	sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
-			  0xffffffff);
 	reset_control_assert(priv->rst);
 	clk_disable_unprepare(priv->clk);
 	clk_disable_unprepare(priv->clk_iface);
-	sdhci_free_host(host);
+	sdhci_pltfm_unregister(pdev);
-	platform_set_drvdata(pdev, NULL);
 	return 0;
 }

drivers/mtd/nand/raw/fsl_upm.c+1−1

@@ -135,7 +135,7 @@ static int fun_exec_op(struct nand_chip chip, const struct nand_operation op, · 134 unmodified lines
135	unsigned int i;	135	unsigned int i;
136	int ret;	136	int ret;
137		137
138	if (op->cs > NAND_MAX_CHIPS)	138	if (op->cs >= NAND_MAX_CHIPS)
139	return -EINVAL;	139	return -EINVAL;
140		140
141	if (check_only)	141	if (check_only)

drivers/mtd/nand/raw/meson_nand.c+1−2

 	struct meson_nfc *nfc = nand_get_controller_data(nand);
 	struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
 	struct mtd_info *mtd = nand_to_mtd(nand);
-	int nsectors = mtd->writesize / 1024;
 	int raw_writesize;
 	int ret;
 	nand->options |= NAND_NO_SUBPAGE_WRITE;
 	ret = nand_ecc_choose_conf(nand, nfc->data->ecc_caps,
-				   mtd->oobsize - 2 * nsectors);
+				   mtd->oobsize - 2);
 	if (ret) {
 		dev_err(nfc->dev, "failed to ECC init\n");
 		return -EINVAL;

drivers/mtd/nand/raw/omap_elm.c+12−12

@@ -177,17 +177,17 @@ static void elm_load_syndrome(struct elm_info *info, · 176 unmodified lines
177	switch (info->bch_type) {	177	switch (info->bch_type) {
178	case BCH8_ECC:	178	case BCH8_ECC:
179	/* syndrome fragment 0 = ecc[9-12B] */	179	/* syndrome fragment 0 = ecc[9-12B] */
180	val = cpu_to_be32((u32 ) &ecc[9]);	180	val = (__force u32)cpu_to_be32((u32 )&ecc[9]);
181	elm_write_reg(info, offset, val);	181	elm_write_reg(info, offset, val);
182		182
183	/* syndrome fragment 1 = ecc[5-8B] */	183	/* syndrome fragment 1 = ecc[5-8B] */
184	offset += 4;	184	offset += 4;
185	val = cpu_to_be32((u32 ) &ecc[5]);	185	val = (__force u32)cpu_to_be32((u32 )&ecc[5]);
186	elm_write_reg(info, offset, val);	186	elm_write_reg(info, offset, val);
187		187
188	/* syndrome fragment 2 = ecc[1-4B] */	188	/* syndrome fragment 2 = ecc[1-4B] */
189	offset += 4;	189	offset += 4;
190	val = cpu_to_be32((u32 ) &ecc[1]);	190	val = (__force u32)cpu_to_be32((u32 )&ecc[1]);
191	elm_write_reg(info, offset, val);	191	elm_write_reg(info, offset, val);
192		192
193	/* syndrome fragment 3 = ecc[0B] */	193	/* syndrome fragment 3 = ecc[0B] */
@@ -197,35 +197,35 @@ static void elm_load_syndrome(struct elm_info *info, · 3 unmodified lines
197	break;	197	break;
198	case BCH4_ECC:	198	case BCH4_ECC:
199	/* syndrome fragment 0 = ecc[20-52b] bits */	199	/* syndrome fragment 0 = ecc[20-52b] bits */
200	val = (cpu_to_be32((u32 ) &ecc[3]) >> 4) \|	200	val = ((__force u32)cpu_to_be32((u32 )&ecc[3]) >> 4) \|
201	((ecc[2] & 0xf) << 28);	201	((ecc[2] & 0xf) << 28);
202	elm_write_reg(info, offset, val);	202	elm_write_reg(info, offset, val);
203		203
204	/* syndrome fragment 1 = ecc[0-20b] bits */	204	/* syndrome fragment 1 = ecc[0-20b] bits */
205	offset += 4;	205	offset += 4;
206	val = cpu_to_be32((u32 ) &ecc[0]) >> 12;	206	val = (__force u32)cpu_to_be32((u32 )&ecc[0]) >> 12;
207	elm_write_reg(info, offset, val);	207	elm_write_reg(info, offset, val);
208	break;	208	break;
209	case BCH16_ECC:	209	case BCH16_ECC:
210	val = cpu_to_be32((u32 ) &ecc[22]);	210	val = (__force u32)cpu_to_be32((u32 )&ecc[22]);
211	elm_write_reg(info, offset, val);	211	elm_write_reg(info, offset, val);
212	offset += 4;	212	offset += 4;
213	val = cpu_to_be32((u32 ) &ecc[18]);	213	val = (__force u32)cpu_to_be32((u32 )&ecc[18]);
214	elm_write_reg(info, offset, val);	214	elm_write_reg(info, offset, val);
215	offset += 4;	215	offset += 4;
216	val = cpu_to_be32((u32 ) &ecc[14]);	216	val = (__force u32)cpu_to_be32((u32 )&ecc[14]);
217	elm_write_reg(info, offset, val);	217	elm_write_reg(info, offset, val);
218	offset += 4;	218	offset += 4;
219	val = cpu_to_be32((u32 ) &ecc[10]);	219	val = (__force u32)cpu_to_be32((u32 )&ecc[10]);
220	elm_write_reg(info, offset, val);	220	elm_write_reg(info, offset, val);
221	offset += 4;	221	offset += 4;
222	val = cpu_to_be32((u32 ) &ecc[6]);	222	val = (__force u32)cpu_to_be32((u32 )&ecc[6]);
223	elm_write_reg(info, offset, val);	223	elm_write_reg(info, offset, val);
224	offset += 4;	224	offset += 4;
225	val = cpu_to_be32((u32 ) &ecc[2]);	225	val = (__force u32)cpu_to_be32((u32 )&ecc[2]);
226	elm_write_reg(info, offset, val);	226	elm_write_reg(info, offset, val);
227	offset += 4;	227	offset += 4;
228	val = cpu_to_be32((u32 ) &ecc[0]) >> 16;	228	val = (__force u32)cpu_to_be32((u32 )&ecc[0]) >> 16;
229	elm_write_reg(info, offset, val);	229	elm_write_reg(info, offset, val);
230	break;	230	break;
231	default:	231	default:

drivers/mtd/nand/raw/rockchip-nand-controller.c+25−20

 		 *    BBM  OOB1 OOB2 OOB3 |......|  PA0  PA1  PA2  PA3
 		 *
 		 * The rk_nfc_ooblayout_free() function already has reserved
-		 * these 4 bytes with:
+		 * these 4 bytes together with 2 bytes for BBM
+		 * by reducing it's length:
 		 *
-		 * oob_region->offset = NFC_SYS_DATA_SIZE + 2;
+		 * oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
 		 */
 		if (!i)
 			memcpy(rk_nfc_oob_ptr(chip, i),
 	int pages_per_blk = mtd->erasesize / mtd->writesize;
 	int ret = 0, i, boot_rom_mode = 0;
 	dma_addr_t dma_data, dma_oob;
-	u32 reg;
+	u32 tmp;
 	u8 *oob;
 	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
 	 *
 	 *   0xFF 0xFF 0xFF 0xFF | BBM OOB1 OOB2 OOB3 | ...
 	 *
+	 * The code here just swaps the first 4 bytes with the last
+	 * 4 bytes without losing any data.
+	 *
+	 * The chip->oob_poi data layout:
+	 *
+	 *    BBM  OOB1 OOB2 OOB3 |......|  PA0  PA1  PA2  PA3
+	 *
 	 * Configure the ECC algorithm supported by the boot ROM.
 	 */
 	if ((page < (pages_per_blk * rknand->boot_blks)) &&
 	}
 	for (i = 0; i < ecc->steps; i++) {
-		if (!i) {
+		if (!i)
-			reg = 0xFFFFFFFF;
+			oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE;
-		} else {
+		else
 			oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
-			reg = oob[0] | oob[1] << 8 | oob[2] << 16 |
-			      oob[3] << 24;
-		}
-		if (!i && boot_rom_mode)
+		tmp = oob[0] | oob[1] << 8 | oob[2] << 16 | oob[3] << 24;
-			reg = (page & (pages_per_blk - 1)) * 4;
 		if (nfc->cfg->type == NFC_V9)
-			nfc->oob_buf[i] = reg;
+			nfc->oob_buf[i] = tmp;
 		else
-			nfc->oob_buf[i * (oob_step / 4)] = reg;
+			nfc->oob_buf[i * (oob_step / 4)] = tmp;
 	}
 	dma_data = dma_map_single(nfc->dev, (void *)nfc->page_buf,
 		goto timeout_err;
 	}
-	for (i = 1; i < ecc->steps; i++) {
+	for (i = 0; i < ecc->steps; i++) {
-		oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
+		if (!i)
+			oob = chip->oob_poi + (ecc->steps - 1) * NFC_SYS_DATA_SIZE;
+		else
+			oob = chip->oob_poi + (i - 1) * NFC_SYS_DATA_SIZE;
 		if (nfc->cfg->type == NFC_V9)
 			tmp = nfc->oob_buf[i];
 		else
 			tmp = nfc->oob_buf[i * (oob_step / 4)];
 		*oob++ = (u8)tmp;
 		*oob++ = (u8)(tmp >> 8);
 		*oob++ = (u8)(tmp >> 16);
 	if (section)
 		return -ERANGE;
-	/*
-	 * The beginning of the OOB area stores the reserved data for the NFC,
-	 * the size of the reserved data is NFC_SYS_DATA_SIZE bytes.
-	 */
 	oob_region->length = rknand->metadata_size - NFC_SYS_DATA_SIZE - 2;
-	oob_region->offset = NFC_SYS_DATA_SIZE + 2;
+	oob_region->offset = 2;
 	return 0;
 }

drivers/mtd/nand/spi/toshiba.c+2−2

@@ -73,7 +73,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, · 72 unmodified lines
73	{	73	{
74	struct nand_device *nand = spinand_to_nand(spinand);	74	struct nand_device *nand = spinand_to_nand(spinand);
75	u8 mbf = 0;	75	u8 mbf = 0;
76	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);	76	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
77		77
78	switch (status & STATUS_ECC_MASK) {	78	switch (status & STATUS_ECC_MASK) {
79	case STATUS_ECC_NO_BITFLIPS:	79	case STATUS_ECC_NO_BITFLIPS:
@@ -92,7 +92,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand, · 12 unmodified lines
92	if (spi_mem_exec_op(spinand->spimem, &op))	92	if (spi_mem_exec_op(spinand->spimem, &op))
93	return nanddev_get_ecc_conf(nand)->strength;	93	return nanddev_get_ecc_conf(nand)->strength;
94		94
95	mbf >>= 4;	95	mbf = *(spinand->scratchbuf) >> 4;
96		96
97	if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength \|\| !mbf))	97	if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength \|\| !mbf))
98	return nanddev_get_ecc_conf(nand)->strength;	98	return nanddev_get_ecc_conf(nand)->strength;

drivers/mtd/nand/spi/winbond.c+2−2

@@ -108,7 +108,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand, · 107 unmodified lines
108	{	108	{
109	struct nand_device *nand = spinand_to_nand(spinand);	109	struct nand_device *nand = spinand_to_nand(spinand);
110	u8 mbf = 0;	110	u8 mbf = 0;
111	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);	111	struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
112		112
113	switch (status & STATUS_ECC_MASK) {	113	switch (status & STATUS_ECC_MASK) {
114	case STATUS_ECC_NO_BITFLIPS:	114	case STATUS_ECC_NO_BITFLIPS:
@@ -126,7 +126,7 @@ static int w25n02kv_ecc_get_status(struct spinand_device *spinand, · 11 unmodified lines
126	if (spi_mem_exec_op(spinand->spimem, &op))	126	if (spi_mem_exec_op(spinand->spimem, &op))
127	return nanddev_get_ecc_conf(nand)->strength;	127	return nanddev_get_ecc_conf(nand)->strength;
128		128
129	mbf >>= 4;	129	mbf = *(spinand->scratchbuf) >> 4;
130		130
131	if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength \|\| !mbf))	131	if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength \|\| !mbf))
132	return nanddev_get_ecc_conf(nand)->strength;	132	return nanddev_get_ecc_conf(nand)->strength;

drivers/mtd/spi-nor/spansion.c+2−2

@@ -361,7 +361,7 @@ static int cypress_nor_determine_addr_mode_by_sr1(struct spi_nor *nor, · 360 unmodified lines
361	*/	361	*/
362	static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)	362	static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
363	{	363	{
364	struct spi_mem_op op = {};	364	struct spi_mem_op op;
365	u8 addr_mode;	365	u8 addr_mode;
366	int ret;	366	int ret;
367		367
@@ -492,7 +492,7 @@ s25fs256t_post_bfpt_fixup(struct spi_nor *nor, · 124 unmodified lines
492	const struct sfdp_parameter_header *bfpt_header,	492	const struct sfdp_parameter_header *bfpt_header,
493	const struct sfdp_bfpt *bfpt)	493	const struct sfdp_bfpt *bfpt)
494	{	494	{
495	struct spi_mem_op op = {};	495	struct spi_mem_op op;
496	int ret;	496	int ret;
497		497
498	ret = cypress_nor_set_addr_mode_nbytes(nor);	498	ret = cypress_nor_set_addr_mode_nbytes(nor);

drivers/net/bonding/bond_main.c+3−1

@@ -5901,7 +5901,9 @@ void bond_setup(struct net_device *bond_dev) · 5900 unmodified lines
5901		5901
5902	bond_dev->hw_features = BOND_VLAN_FEATURES \|	5902	bond_dev->hw_features = BOND_VLAN_FEATURES \|
5903	NETIF_F_HW_VLAN_CTAG_RX \|	5903	NETIF_F_HW_VLAN_CTAG_RX \|
5904	NETIF_F_HW_VLAN_CTAG_FILTER;	5904	NETIF_F_HW_VLAN_CTAG_FILTER \|
		5905	NETIF_F_HW_VLAN_STAG_RX \|
		5906	NETIF_F_HW_VLAN_STAG_FILTER;
5905		5907
5906	bond_dev->hw_features \|= NETIF_F_GSO_ENCAP_ALL;	5908	bond_dev->hw_features \|= NETIF_F_GSO_ENCAP_ALL;
5907	bond_dev->features \|= bond_dev->hw_features;	5909	bond_dev->features \|= bond_dev->hw_features;

drivers/net/dsa/bcm_sf2.c+6−2

 	if (IS_ERR(priv->clk))
 		return PTR_ERR(priv->clk);
-	clk_prepare_enable(priv->clk);
+	ret = clk_prepare_enable(priv->clk);
+	if (ret)
+		return ret;
 	priv->clk_mdiv = devm_clk_get_optional(&pdev->dev, "sw_switch_mdiv");
 	if (IS_ERR(priv->clk_mdiv)) {
 		goto out_clk;
 	}
-	clk_prepare_enable(priv->clk_mdiv);
+	ret = clk_prepare_enable(priv->clk_mdiv);
+	if (ret)
+		goto out_clk;
 	ret = bcm_sf2_sw_rst(priv);
 	if (ret) {

drivers/net/dsa/microchip/ksz_common.c+15−20

 	regmap_reg_range(0x1030, 0x1030),
 	regmap_reg_range(0x1100, 0x1115),
 	regmap_reg_range(0x111a, 0x111f),
-	regmap_reg_range(0x1122, 0x1127),
+	regmap_reg_range(0x1120, 0x112b),
-	regmap_reg_range(0x112a, 0x112b),
+	regmap_reg_range(0x1134, 0x113b),
-	regmap_reg_range(0x1136, 0x1139),
+	regmap_reg_range(0x113c, 0x113f),
-	regmap_reg_range(0x113e, 0x113f),
 	regmap_reg_range(0x1400, 0x1401),
 	regmap_reg_range(0x1403, 0x1403),
 	regmap_reg_range(0x1410, 0x1417),
 	regmap_reg_range(0x2030, 0x2030),
 	regmap_reg_range(0x2100, 0x2115),
 	regmap_reg_range(0x211a, 0x211f),
-	regmap_reg_range(0x2122, 0x2127),
+	regmap_reg_range(0x2120, 0x212b),
-	regmap_reg_range(0x212a, 0x212b),
+	regmap_reg_range(0x2134, 0x213b),
-	regmap_reg_range(0x2136, 0x2139),
+	regmap_reg_range(0x213c, 0x213f),
-	regmap_reg_range(0x213e, 0x213f),
 	regmap_reg_range(0x2400, 0x2401),
 	regmap_reg_range(0x2403, 0x2403),
 	regmap_reg_range(0x2410, 0x2417),
 	regmap_reg_range(0x3030, 0x3030),
 	regmap_reg_range(0x3100, 0x3115),
 	regmap_reg_range(0x311a, 0x311f),
-	regmap_reg_range(0x3122, 0x3127),
+	regmap_reg_range(0x3120, 0x312b),
-	regmap_reg_range(0x312a, 0x312b),
+	regmap_reg_range(0x3134, 0x313b),
-	regmap_reg_range(0x3136, 0x3139),
+	regmap_reg_range(0x313c, 0x313f),
-	regmap_reg_range(0x313e, 0x313f),
 	regmap_reg_range(0x3400, 0x3401),
 	regmap_reg_range(0x3403, 0x3403),
 	regmap_reg_range(0x3410, 0x3417),
 	regmap_reg_range(0x4030, 0x4030),
 	regmap_reg_range(0x4100, 0x4115),
 	regmap_reg_range(0x411a, 0x411f),
-	regmap_reg_range(0x4122, 0x4127),
+	regmap_reg_range(0x4120, 0x412b),
-	regmap_reg_range(0x412a, 0x412b),
+	regmap_reg_range(0x4134, 0x413b),
-	regmap_reg_range(0x4136, 0x4139),
+	regmap_reg_range(0x413c, 0x413f),
-	regmap_reg_range(0x413e, 0x413f),
 	regmap_reg_range(0x4400, 0x4401),
 	regmap_reg_range(0x4403, 0x4403),
 	regmap_reg_range(0x4410, 0x4417),
 	regmap_reg_range(0x5030, 0x5030),
 	regmap_reg_range(0x5100, 0x5115),
 	regmap_reg_range(0x511a, 0x511f),
-	regmap_reg_range(0x5122, 0x5127),
+	regmap_reg_range(0x5120, 0x512b),
-	regmap_reg_range(0x512a, 0x512b),
+	regmap_reg_range(0x5134, 0x513b),
-	regmap_reg_range(0x5136, 0x5139),
+	regmap_reg_range(0x513c, 0x513f),
-	regmap_reg_range(0x513e, 0x513f),
 	regmap_reg_range(0x5400, 0x5401),
 	regmap_reg_range(0x5403, 0x5403),
 	regmap_reg_range(0x5410, 0x5417),

drivers/net/dsa/ocelot/felix.c+2−0

 	struct felix *felix = ocelot_to_felix(ocelot);
 	struct dsa_port *dp;
+	rtnl_lock();
 	if (felix->tag_proto_ops)
 		felix->tag_proto_ops->teardown(ds);
+	rtnl_unlock();
 	dsa_switch_for_each_available_port(dp, ds)
 		ocelot_deinit_port(ocelot, dp->index);

drivers/net/ethernet/broadcom/bnxt/bnxt.c+51−34

 	return NETDEV_TX_OK;
 }
-static void bnxt_tx_int(struct bnxt *bp, struct bnxt_napi *bnapi, int nr_pkts)
+static void bnxt_tx_int(struct bnxt *bp, struct bnxt_napi *bnapi, int budget)
 {
 	struct bnxt_tx_ring_info *txr = bnapi->tx_ring;
 	struct netdev_queue *txq = netdev_get_tx_queue(bp->dev, txr->txq_index);
 	u16 cons = txr->tx_cons;
 	struct pci_dev *pdev = bp->pdev;
+	int nr_pkts = bnapi->tx_pkts;
 	int i;
 	unsigned int tx_bytes = 0;
 		dev_kfree_skb_any(skb);
 	}
+	bnapi->tx_pkts = 0;
 	WRITE_ONCE(txr->tx_cons, cons);
 	__netif_txq_completed_wake(txq, nr_pkts, tx_bytes,
 static struct page *__bnxt_alloc_rx_page(struct bnxt *bp, dma_addr_t *mapping,
 					 struct bnxt_rx_ring_info *rxr,
+					 unsigned int *offset,
 					 gfp_t gfp)
 {
 	struct device *dev = &bp->pdev->dev;
 	struct page *page;
-	page = page_pool_dev_alloc_pages(rxr->page_pool);
+	if (PAGE_SIZE > BNXT_RX_PAGE_SIZE) {
+		page = page_pool_dev_alloc_frag(rxr->page_pool, offset,
+						BNXT_RX_PAGE_SIZE);
+	} else {
+		page = page_pool_dev_alloc_pages(rxr->page_pool);
+		*offset = 0;
+	}
 	if (!page)
 		return NULL;
-	*mapping = dma_map_page_attrs(dev, page, 0, PAGE_SIZE, bp->rx_dir,
+	*mapping = dma_map_page_attrs(dev, page, *offset, BNXT_RX_PAGE_SIZE,
-				      DMA_ATTR_WEAK_ORDERING);
+				      bp->rx_dir, DMA_ATTR_WEAK_ORDERING);
 	if (dma_mapping_error(dev, *mapping)) {
 		page_pool_recycle_direct(rxr->page_pool, page);
 		return NULL;
 	dma_addr_t mapping;
 	if (BNXT_RX_PAGE_MODE(bp)) {
+		unsigned int offset;
 		struct page *page =
-			__bnxt_alloc_rx_page(bp, &mapping, rxr, gfp);
+			__bnxt_alloc_rx_page(bp, &mapping, rxr, &offset, gfp);
 		if (!page)
 			return -ENOMEM;
 		mapping += bp->rx_dma_offset;
 		rx_buf->data = page;
-		rx_buf->data_ptr = page_address(page) + bp->rx_offset;
+		rx_buf->data_ptr = page_address(page) + offset + bp->rx_offset;
 	} else {
 		u8 *data = __bnxt_alloc_rx_frag(bp, &mapping, gfp);
 	unsigned int offset = 0;
 	if (BNXT_RX_PAGE_MODE(bp)) {
-		page = __bnxt_alloc_rx_page(bp, &mapping, rxr, gfp);
+		page = __bnxt_alloc_rx_page(bp, &mapping, rxr, &offset, gfp);
 		if (!page)
 			return -ENOMEM;
 		return NULL;
 	}
 	dma_addr -= bp->rx_dma_offset;
-	dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, PAGE_SIZE, bp->rx_dir,
+	dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE,
-			     DMA_ATTR_WEAK_ORDERING);
+			     bp->rx_dir, DMA_ATTR_WEAK_ORDERING);
-	skb = build_skb(page_address(page), PAGE_SIZE);
+	skb = build_skb(data_ptr - bp->rx_offset, BNXT_RX_PAGE_SIZE);
 	if (!skb) {
 		page_pool_recycle_direct(rxr->page_pool, page);
 		return NULL;
 	}
 	skb_mark_for_recycle(skb);
-	skb_reserve(skb, bp->rx_dma_offset);
+	skb_reserve(skb, bp->rx_offset);
 	__skb_put(skb, len);
 	return skb;
 		return NULL;
 	}
 	dma_addr -= bp->rx_dma_offset;
-	dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, PAGE_SIZE, bp->rx_dir,
+	dma_unmap_page_attrs(&bp->pdev->dev, dma_addr, BNXT_RX_PAGE_SIZE,
-			     DMA_ATTR_WEAK_ORDERING);
+			     bp->rx_dir, DMA_ATTR_WEAK_ORDERING);
 	if (unlikely(!payload))
 		payload = eth_get_headlen(bp->dev, data_ptr, len);
 	skb_mark_for_recycle(skb);
 	off = (void *)data_ptr - page_address(page);
-	skb_add_rx_frag(skb, 0, page, off, len, PAGE_SIZE);
+	skb_add_rx_frag(skb, 0, page, off, len, BNXT_RX_PAGE_SIZE);
 	memcpy(skb->data - NET_IP_ALIGN, data_ptr - NET_IP_ALIGN,
 	       payload + NET_IP_ALIGN);
 	skb->data_len += total_frag_len;
 	skb->len += total_frag_len;
-	skb->truesize += PAGE_SIZE * agg_bufs;
+	skb->truesize += BNXT_RX_PAGE_SIZE * agg_bufs;
 	return skb;
 }
 	return rx_pkts;
 }
-static void __bnxt_poll_work_done(struct bnxt *bp, struct bnxt_napi *bnapi)
+static void __bnxt_poll_work_done(struct bnxt *bp, struct bnxt_napi *bnapi,
+				  int budget)
 {
-	if (bnapi->tx_pkts) {
+	if (bnapi->tx_pkts)
-		bnapi->tx_int(bp, bnapi, bnapi->tx_pkts);
+		bnapi->tx_int(bp, bnapi, budget);
-		bnapi->tx_pkts = 0;
-	}
 	if ((bnapi->events & BNXT_RX_EVENT) && !(bnapi->in_reset)) {
 		struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
 	 */
 	bnxt_db_cq(bp, &cpr->cp_db, cpr->cp_raw_cons);
-	__bnxt_poll_work_done(bp, bnapi);
+	__bnxt_poll_work_done(bp, bnapi, budget);
 	return rx_pkts;
 }
 }
 static void __bnxt_poll_cqs_done(struct bnxt *bp, struct bnxt_napi *bnapi,
-				 u64 dbr_type)
+				 u64 dbr_type, int budget)
 {
 	struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
 	int i;
 			cpr2->had_work_done = 0;
 		}
 	}
-	__bnxt_poll_work_done(bp, bnapi);
+	__bnxt_poll_work_done(bp, bnapi, budget);
 }
 static int bnxt_poll_p5(struct napi_struct *napi, int budget)
 			if (cpr->has_more_work)
 				break;
-			__bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ_ARMALL);
+			__bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ_ARMALL,
+					     budget);
 			cpr->cp_raw_cons = raw_cons;
 			if (napi_complete_done(napi, work_done))
 				BNXT_DB_NQ_ARM_P5(&cpr->cp_db,
 		}
 		raw_cons = NEXT_RAW_CMP(raw_cons);
 	}
-	__bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ);
+	__bnxt_poll_cqs_done(bp, bnapi, DBR_TYPE_CQ, budget);
 	if (raw_cons != cpr->cp_raw_cons) {
 		cpr->cp_raw_cons = raw_cons;
 		BNXT_DB_NQ_P5(&cpr->cp_db, raw_cons);
 		rx_buf->data = NULL;
 		if (BNXT_RX_PAGE_MODE(bp)) {
 			mapping -= bp->rx_dma_offset;
-			dma_unmap_page_attrs(&pdev->dev, mapping, PAGE_SIZE,
+			dma_unmap_page_attrs(&pdev->dev, mapping,
-					     bp->rx_dir,
+					     BNXT_RX_PAGE_SIZE, bp->rx_dir,
 					     DMA_ATTR_WEAK_ORDERING);
 			page_pool_recycle_direct(rxr->page_pool, data);
 		} else {
 	pp.napi = &rxr->bnapi->napi;
 	pp.dev = &bp->pdev->dev;
 	pp.dma_dir = DMA_BIDIRECTIONAL;
+	if (PAGE_SIZE > BNXT_RX_PAGE_SIZE)
+		pp.flags |= PP_FLAG_PAGE_FRAG;
 	rxr->page_pool = page_pool_create(&pp);
 	if (IS_ERR(rxr->page_pool)) {
  */
 int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode)
 {
+	struct net_device *dev = bp->dev;
 	if (page_mode) {
 		bp->flags &= ~BNXT_FLAG_AGG_RINGS;
 		bp->flags |= BNXT_FLAG_RX_PAGE_MODE;
-		if (bp->dev->mtu > BNXT_MAX_PAGE_MODE_MTU) {
+		if (bp->xdp_prog->aux->xdp_has_frags)
+			dev->max_mtu = min_t(u16, bp->max_mtu, BNXT_MAX_MTU);
+		else
+			dev->max_mtu =
+				min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU);
+		if (dev->mtu > BNXT_MAX_PAGE_MODE_MTU) {
 			bp->flags |= BNXT_FLAG_JUMBO;
 			bp->rx_skb_func = bnxt_rx_multi_page_skb;
-			bp->dev->max_mtu =
-				min_t(u16, bp->max_mtu, BNXT_MAX_MTU);
 		} else {
 			bp->flags |= BNXT_FLAG_NO_AGG_RINGS;
 			bp->rx_skb_func = bnxt_rx_page_skb;
-			bp->dev->max_mtu =
-				min_t(u16, bp->max_mtu, BNXT_MAX_PAGE_MODE_MTU);
 		}
 		bp->rx_dir = DMA_BIDIRECTIONAL;
 		/* Disable LRO or GRO_HW */
-		netdev_update_features(bp->dev);
+		netdev_update_features(dev);
 	} else {
-		bp->dev->max_mtu = bp->max_mtu;
+		dev->max_mtu = bp->max_mtu;
 		bp->flags &= ~BNXT_FLAG_RX_PAGE_MODE;
 		bp->rx_dir = DMA_FROM_DEVICE;
 		bp->rx_skb_func = bnxt_rx_skb;
 			cpr->sw_stats.rx.rx_resets++;
 		bnapi->in_reset = false;
+		bnapi->tx_pkts = 0;
 		if (bnapi->rx_ring) {
 			INIT_WORK(&cpr->dim.work, bnxt_dim_work);
 			cpr->dim.mode = DIM_CQ_PERIOD_MODE_START_FROM_EQE;

drivers/net/ethernet/broadcom/bnxt/bnxt.h+1−1

@@ -1005,7 +1005,7 @@ struct bnxt_napi { · 1004 unmodified lines
1005	struct bnxt_tx_ring_info *tx_ring;	1005	struct bnxt_tx_ring_info *tx_ring;
1006		1006
1007	void (tx_int)(struct bnxt , struct bnxt_napi *,	1007	void (tx_int)(struct bnxt , struct bnxt_napi *,
1008	int);	1008	int budget);
1009	int tx_pkts;	1009	int tx_pkts;
1010	u8 events;	1010	u8 events;
1011		1011

drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c+10−4

 	dma_unmap_len_set(tx_buf, len, 0);
 }
-void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int nr_pkts)
+void bnxt_tx_int_xdp(struct bnxt *bp, struct bnxt_napi *bnapi, int budget)
 {
 	struct bnxt_tx_ring_info *txr = bnapi->tx_ring;
 	struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
 	bool rx_doorbell_needed = false;
+	int nr_pkts = bnapi->tx_pkts;
 	struct bnxt_sw_tx_bd *tx_buf;
 	u16 tx_cons = txr->tx_cons;
 	u16 last_tx_cons = tx_cons;
 	int i, j, frags;
+	if (!budget)
+		return;
 	for (i = 0; i < nr_pkts; i++) {
 		tx_buf = &txr->tx_buf_ring[tx_cons];
 		}
 		tx_cons = NEXT_TX(tx_cons);
 	}
+	bnapi->tx_pkts = 0;
 	WRITE_ONCE(txr->tx_cons, tx_cons);
 	if (rx_doorbell_needed) {
 		tx_buf = &txr->tx_buf_ring[last_tx_cons];
 			u16 cons, u8 *data_ptr, unsigned int len,
 			struct xdp_buff *xdp)
 {
+	u32 buflen = BNXT_RX_PAGE_SIZE;
 	struct bnxt_sw_rx_bd *rx_buf;
-	u32 buflen = PAGE_SIZE;
 	struct pci_dev *pdev;
 	dma_addr_t mapping;
 	u32 offset;
 		rx_buf = &rxr->rx_buf_ring[cons];
 		mapping = rx_buf->mapping - bp->rx_dma_offset;
 		dma_unmap_page_attrs(&pdev->dev, mapping,
-				     PAGE_SIZE, bp->rx_dir,
+				     BNXT_RX_PAGE_SIZE, bp->rx_dir,
 				     DMA_ATTR_WEAK_ORDERING);
 		/* if we are unable to allocate a new buffer, abort and reuse */
 	}
 	xdp_update_skb_shared_info(skb, num_frags,
 				   sinfo->xdp_frags_size,
-				   PAGE_SIZE * sinfo->nr_frags,
+				   BNXT_RX_PAGE_SIZE * sinfo->nr_frags,
 				   xdp_buff_is_frag_pfmemalloc(xdp));
 	return skb;
 }

drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.h+1−1

@@ -16,7 +16,7 @@ struct bnxt_sw_tx_bd bnxt_xmit_bd(struct bnxt bp, · 15 unmodified lines
16	struct bnxt_tx_ring_info *txr,	16	struct bnxt_tx_ring_info *txr,
17	dma_addr_t mapping, u32 len,	17	dma_addr_t mapping, u32 len,
18	struct xdp_buff *xdp);	18	struct xdp_buff *xdp);
19	void bnxt_tx_int_xdp(struct bnxt bp, struct bnxt_napi bnapi, int nr_pkts);	19	void bnxt_tx_int_xdp(struct bnxt bp, struct bnxt_napi bnapi, int budget);
20	bool bnxt_rx_xdp(struct bnxt bp, struct bnxt_rx_ring_info rxr, u16 cons,	20	bool bnxt_rx_xdp(struct bnxt bp, struct bnxt_rx_ring_info rxr, u16 cons,
21	struct xdp_buff xdp, struct page page, u8 *data_ptr,	21	struct xdp_buff xdp, struct page page, u8 *data_ptr,
22	unsigned int len, u8 event);	22	unsigned int len, u8 event);

drivers/net/ethernet/freescale/enetc/enetc_pf.c+71−40

@@ -1186,14 +1186,9 @@ static int enetc_init_port_rss_memory(struct enetc_si *si) · 1185 unmodified lines
1186		1186
1187	static int enetc_pf_register_with_ierb(struct pci_dev *pdev)	1187	static int enetc_pf_register_with_ierb(struct pci_dev *pdev)
1188	{	1188	{
1189	struct device_node *node = pdev->dev.of_node;
1190	struct platform_device *ierb_pdev;	1189	struct platform_device *ierb_pdev;
1191	struct device_node *ierb_node;	1190	struct device_node *ierb_node;
1192		1191
1193	/* Don't register with the IERB if the PF itself is disabled */
1194	if (!node \|\| !of_device_is_available(node))
1195	return 0;
1196
1197	ierb_node = of_find_compatible_node(NULL, NULL,	1192	ierb_node = of_find_compatible_node(NULL, NULL,
1198	"fsl,ls1028a-enetc-ierb");	1193	"fsl,ls1028a-enetc-ierb");
1199	if (!ierb_node \|\| !of_device_is_available(ierb_node))	1194	if (!ierb_node \|\| !of_device_is_available(ierb_node))
@@ -1208,56 +1203,81 @@ static int enetc_pf_register_with_ierb(struct pci_dev *pdev) · 8 unmodified lines
1208	return enetc_ierb_register_pf(ierb_pdev, pdev);	1203	return enetc_ierb_register_pf(ierb_pdev, pdev);
1209	}	1204	}
1210		1205
1211	static int enetc_pf_probe(struct pci_dev *pdev,	1206	static struct enetc_si enetc_psi_create(struct pci_dev pdev)
1212	const struct pci_device_id *ent)
1213	{	1207	{
1214	struct device_node *node = pdev->dev.of_node;
1215	struct enetc_ndev_priv *priv;
1216	struct net_device *ndev;
1217	struct enetc_si *si;	1208	struct enetc_si *si;
1218	struct enetc_pf *pf;
1219	int err;	1209	int err;
1220		1210
1221	err = enetc_pf_register_with_ierb(pdev);	1211	err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(struct enetc_pf));
1222	if (err == -EPROBE_DEFER)	1212	if (err) {
1223	return err;	1213	dev_err_probe(&pdev->dev, err, "PCI probing failed\n");
1224	if (err)	1214	goto out;
1225	dev_warn(&pdev->dev,	1215	}
1226	"Could not register with IERB driver: %pe, please update the device tree\n",
1227	ERR_PTR(err));
1228
1229	err = enetc_pci_probe(pdev, KBUILD_MODNAME, sizeof(*pf));
1230	if (err)
1231	return dev_err_probe(&pdev->dev, err, "PCI probing failed\n");
1232		1216
1233	si = pci_get_drvdata(pdev);	1217	si = pci_get_drvdata(pdev);
1234	if (!si->hw.port \|\| !si->hw.global) {	1218	if (!si->hw.port \|\| !si->hw.global) {
1235	err = -ENODEV;	1219	err = -ENODEV;
1236	dev_err(&pdev->dev, "could not map PF space, probing a VF?\n");	1220	dev_err(&pdev->dev, "could not map PF space, probing a VF?\n");
1237	goto err_map_pf_space;	1221	goto out_pci_remove;
1238	}	1222	}
1239		1223
1240	err = enetc_setup_cbdr(&pdev->dev, &si->hw, ENETC_CBDR_DEFAULT_SIZE,	1224	err = enetc_setup_cbdr(&pdev->dev, &si->hw, ENETC_CBDR_DEFAULT_SIZE,
1241	&si->cbd_ring);	1225	&si->cbd_ring);
1242	if (err)	1226	if (err)
1243	goto err_setup_cbdr;	1227	goto out_pci_remove;
1244		1228
1245	err = enetc_init_port_rfs_memory(si);	1229	err = enetc_init_port_rfs_memory(si);
1246	if (err) {	1230	if (err) {
1247	dev_err(&pdev->dev, "Failed to initialize RFS memory\n");	1231	dev_err(&pdev->dev, "Failed to initialize RFS memory\n");
1248	goto err_init_port_rfs;	1232	goto out_teardown_cbdr;
1249	}	1233	}
1250		1234
1251	err = enetc_init_port_rss_memory(si);	1235	err = enetc_init_port_rss_memory(si);
1252	if (err) {	1236	if (err) {
1253	dev_err(&pdev->dev, "Failed to initialize RSS memory\n");	1237	dev_err(&pdev->dev, "Failed to initialize RSS memory\n");
1254	goto err_init_port_rss;	1238	goto out_teardown_cbdr;
1255	}	1239	}
1256		1240
1257	if (node && !of_device_is_available(node)) {	1241	return si;
1258	dev_info(&pdev->dev, "device is disabled, skipping\n");	1242
1259	err = -ENODEV;	1243	out_teardown_cbdr:
1260	goto err_device_disabled;	1244	enetc_teardown_cbdr(&si->cbd_ring);
		1245	out_pci_remove:
		1246	enetc_pci_remove(pdev);
		1247	out:
		1248	return ERR_PTR(err);
		1249	}
		1250
		1251	static void enetc_psi_destroy(struct pci_dev *pdev)
		1252	{
		1253	struct enetc_si *si = pci_get_drvdata(pdev);
		1254
		1255	enetc_teardown_cbdr(&si->cbd_ring);
		1256	enetc_pci_remove(pdev);
		1257	}
		1258
		1259	static int enetc_pf_probe(struct pci_dev *pdev,
		1260	const struct pci_device_id *ent)
		1261	{
		1262	struct device_node *node = pdev->dev.of_node;
		1263	struct enetc_ndev_priv *priv;
		1264	struct net_device *ndev;
		1265	struct enetc_si *si;
		1266	struct enetc_pf *pf;
		1267	int err;
		1268
		1269	err = enetc_pf_register_with_ierb(pdev);
		1270	if (err == -EPROBE_DEFER)
		1271	return err;
		1272	if (err)
		1273	dev_warn(&pdev->dev,
		1274	"Could not register with IERB driver: %pe, please update the device tree\n",
		1275	ERR_PTR(err));
		1276
		1277	si = enetc_psi_create(pdev);
		1278	if (IS_ERR(si)) {
		1279	err = PTR_ERR(si);
		1280	goto err_psi_create;
1261	}	1281	}
1262		1282
1263	pf = enetc_si_priv(si);	1283	pf = enetc_si_priv(si);
@@ -1339,15 +1359,9 @@ err_alloc_si_res: · 75 unmodified lines
1339	si->ndev = NULL;	1359	si->ndev = NULL;
1340	free_netdev(ndev);	1360	free_netdev(ndev);
1341	err_alloc_netdev:	1361	err_alloc_netdev:
1342	err_init_port_rss:
1343	err_init_port_rfs:
1344	err_device_disabled:
1345	err_setup_mac_addresses:	1362	err_setup_mac_addresses:
1346	enetc_teardown_cbdr(&si->cbd_ring);	1363	enetc_psi_destroy(pdev);
1347	err_setup_cbdr:	1364	err_psi_create:
1348	err_map_pf_space:
1349	enetc_pci_remove(pdev);
1350
1351	return err;	1365	return err;
1352	}	1366	}
1353		1367
@@ -1370,12 +1384,29 @@ static void enetc_pf_remove(struct pci_dev *pdev) · 16 unmodified lines
1370	enetc_free_msix(priv);	1384	enetc_free_msix(priv);
1371		1385
1372	enetc_free_si_resources(priv);	1386	enetc_free_si_resources(priv);
1373	enetc_teardown_cbdr(&si->cbd_ring);
1374		1387
1375	free_netdev(si->ndev);	1388	free_netdev(si->ndev);
1376		1389
1377	enetc_pci_remove(pdev);	1390	enetc_psi_destroy(pdev);
		1391	}
		1392
		1393	static void enetc_fixup_clear_rss_rfs(struct pci_dev *pdev)
		1394	{
		1395	struct device_node *node = pdev->dev.of_node;
		1396	struct enetc_si *si;
		1397
		1398	/* Only apply quirk for disabled functions. For the ones
		1399	* that are enabled, enetc_pf_probe() will apply it.
		1400	*/
		1401	if (node && of_device_is_available(node))
		1402	return;
		1403
		1404	si = enetc_psi_create(pdev);
		1405	if (si)
		1406	enetc_psi_destroy(pdev);
1378	}	1407	}
		1408	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF,
		1409	enetc_fixup_clear_rss_rfs);
1379		1410
1380	static const struct pci_device_id enetc_pf_id_table[] = {	1411	static const struct pci_device_id enetc_pf_id_table[] = {
1381	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) },	1412	{ PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, ENETC_DEV_ID_PF) },

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c+2−2

@@ -464,9 +464,9 @@ static void hns3_dbg_fill_content(char *content, u16 len, · 463 unmodified lines
464	if (result) {	464	if (result) {
465	if (item_len < strlen(result[i]))	465	if (item_len < strlen(result[i]))
466	break;	466	break;
467	strscpy(pos, result[i], strlen(result[i]));	467	memcpy(pos, result[i], strlen(result[i]));
468	} else {	468	} else {
469	strscpy(pos, items[i].name, strlen(items[i].name));	469	memcpy(pos, items[i].name, strlen(items[i].name));
470	}	470	}
471	pos += item_len;	471	pos += item_len;
472	len -= item_len;	472	len -= item_len;

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+13−1

 	if (!if_running)
 		return;
+	if (test_and_set_bit(HNS3_NIC_STATE_DOWN, &priv->state))
+		return;
 	netif_carrier_off(ndev);
 	netif_tx_disable(ndev);
 	if (!if_running)
 		return;
-	hns3_nic_reset_all_ring(priv->ae_handle);
+	if (hns3_nic_resetting(ndev))
+		return;
+	if (!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
+		return;
+	if (hns3_nic_reset_all_ring(priv->ae_handle))
+		return;
+	clear_bit(HNS3_NIC_STATE_DOWN, &priv->state);
 	for (i = 0; i < priv->vector_num; i++)
 		hns3_vector_enable(&priv->tqp_vector[i]);

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c+2−2

@@ -111,9 +111,9 @@ static void hclge_dbg_fill_content(char *content, u16 len, · 110 unmodified lines
111	if (result) {	111	if (result) {
112	if (item_len < strlen(result[i]))	112	if (item_len < strlen(result[i]))
113	break;	113	break;
114	strscpy(pos, result[i], strlen(result[i]));	114	memcpy(pos, result[i], strlen(result[i]));
115	} else {	115	} else {
116	strscpy(pos, items[i].name, strlen(items[i].name));	116	memcpy(pos, items[i].name, strlen(items[i].name));
117	}	117	}
118	pos += item_len;	118	pos += item_len;
119	len -= item_len;	119	len -= item_len;

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+22−7

 static void hclge_sync_promisc_mode(struct hclge_dev *hdev);
 static void hclge_sync_fd_table(struct hclge_dev *hdev);
 static void hclge_update_fec_stats(struct hclge_dev *hdev);
+static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret,
+				      int wait_cnt);
 static struct hnae3_ae_algo ae_algo;
 static void hclge_cfg_mac_mode(struct hclge_dev *hdev, bool enable)
 {
+#define HCLGE_LINK_STATUS_WAIT_CNT  3
 	struct hclge_desc desc;
 	struct hclge_config_mac_mode_cmd *req =
 		(struct hclge_config_mac_mode_cmd *)desc.data;
 	req->txrx_pad_fcs_loop_en = cpu_to_le32(loop_en);
 	ret = hclge_cmd_send(&hdev->hw, &desc, 1);
-	if (ret)
+	if (ret) {
 		dev_err(&hdev->pdev->dev,
 			"mac enable fail, ret =%d.\n", ret);
+		return;
+	}
+	if (!enable)
+		hclge_mac_link_status_wait(hdev, HCLGE_LINK_STATUS_DOWN,
+					   HCLGE_LINK_STATUS_WAIT_CNT);
 }
 static int hclge_config_switch_param(struct hclge_dev *hdev, int vfid,
 	} while (++i < HCLGE_PHY_LINK_STATUS_NUM);
 }
-static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret)
+static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret,
+				      int wait_cnt)
 {
-#define HCLGE_MAC_LINK_STATUS_NUM  100
 	int link_status;
 	int i = 0;
 	int ret;
 			return 0;
 		msleep(HCLGE_LINK_STATUS_MS);
-	} while (++i < HCLGE_MAC_LINK_STATUS_NUM);
+	} while (++i < wait_cnt);
 	return -EBUSY;
 }
 static int hclge_mac_phy_link_status_wait(struct hclge_dev *hdev, bool en,
 					  bool is_phy)
 {
+#define HCLGE_MAC_LINK_STATUS_NUM  100
 	int link_ret;
 	link_ret = en ? HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;
 	if (is_phy)
 		hclge_phy_link_status_wait(hdev, link_ret);
-	return hclge_mac_link_status_wait(hdev, link_ret);
+	return hclge_mac_link_status_wait(hdev, link_ret,
+					  HCLGE_MAC_LINK_STATUS_NUM);
 }
 static int hclge_set_app_loopback(struct hclge_dev *hdev, bool en)
 	u32 rx_pause, tx_pause;
 	u8 flowctl;
-	if (!phydev->link || !phydev->autoneg)
+	if (!phydev->link)
 		return 0;
+	if (!phydev->autoneg)
+		return hclge_mac_pause_setup_hw(hdev);
 	local_advertising = linkmode_adv_to_lcl_adv_t(phydev->advertising);
 	if (phydev->pause)

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c+1−1

@@ -1553,7 +1553,7 @@ static int hclge_bp_setup_hw(struct hclge_dev *hdev, u8 tc) · 1552 unmodified lines
1553	return 0;	1553	return 0;
1554	}	1554	}
1555		1555
1556	static int hclge_mac_pause_setup_hw(struct hclge_dev *hdev)	1556	int hclge_mac_pause_setup_hw(struct hclge_dev *hdev)
1557	{	1557	{
1558	bool tx_en, rx_en;	1558	bool tx_en, rx_en;
1559		1559

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h+1−0

@@ -245,6 +245,7 @@ int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap, · 244 unmodified lines
245	u8 pfc_bitmap);	245	u8 pfc_bitmap);
246	int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx);	246	int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx);
247	int hclge_pause_addr_cfg(struct hclge_dev hdev, const u8 mac_addr);	247	int hclge_pause_addr_cfg(struct hclge_dev hdev, const u8 mac_addr);
		248	int hclge_mac_pause_setup_hw(struct hclge_dev *hdev);
248	void hclge_pfc_rx_stats_get(struct hclge_dev hdev, u64 stats);	249	void hclge_pfc_rx_stats_get(struct hclge_dev hdev, u64 stats);
249	void hclge_pfc_tx_stats_get(struct hclge_dev hdev, u64 stats);	250	void hclge_pfc_tx_stats_get(struct hclge_dev hdev, u64 stats);
250	int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate);	251	int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate);

drivers/net/ethernet/ibm/ibmvnic.c+99−13

@@ -97,6 +97,8 @@ static int pending_scrq(struct ibmvnic_adapter *, · 96 unmodified lines
97	static union sub_crq ibmvnic_next_scrq(struct ibmvnic_adapter ,	97	static union sub_crq ibmvnic_next_scrq(struct ibmvnic_adapter ,
98	struct ibmvnic_sub_crq_queue *);	98	struct ibmvnic_sub_crq_queue *);
99	static int ibmvnic_poll(struct napi_struct *napi, int data);	99	static int ibmvnic_poll(struct napi_struct *napi, int data);
		100	static int reset_sub_crq_queues(struct ibmvnic_adapter *adapter);
		101	static inline void reinit_init_done(struct ibmvnic_adapter *adapter);
100	static void send_query_map(struct ibmvnic_adapter *adapter);	102	static void send_query_map(struct ibmvnic_adapter *adapter);
101	static int send_request_map(struct ibmvnic_adapter *, dma_addr_t, u32, u8);	103	static int send_request_map(struct ibmvnic_adapter *, dma_addr_t, u32, u8);
102	static int send_request_unmap(struct ibmvnic_adapter *, u8);	104	static int send_request_unmap(struct ibmvnic_adapter *, u8);
@@ -114,6 +116,7 @@ static void ibmvnic_tx_scrq_clean_buffer(struct ibmvnic_adapter *adapter, · 11 unmodified lines
114	static void free_long_term_buff(struct ibmvnic_adapter *adapter,	116	static void free_long_term_buff(struct ibmvnic_adapter *adapter,
115	struct ibmvnic_long_term_buff *ltb);	117	struct ibmvnic_long_term_buff *ltb);
116	static void ibmvnic_disable_irqs(struct ibmvnic_adapter *adapter);	118	static void ibmvnic_disable_irqs(struct ibmvnic_adapter *adapter);
		119	static void flush_reset_queue(struct ibmvnic_adapter *adapter);
117		120
118	struct ibmvnic_stat {	121	struct ibmvnic_stat {
119	char name[ETH_GSTRING_LEN];	122	char name[ETH_GSTRING_LEN];
@@ -1505,8 +1508,8 @@ static const char *adapter_state_to_string(enum vnic_state state) · 1385 unmodified lines
1505		1508
1506	static int ibmvnic_login(struct net_device *netdev)	1509	static int ibmvnic_login(struct net_device *netdev)
1507	{	1510	{
		1511	unsigned long flags, timeout = msecs_to_jiffies(20000);
1508	struct ibmvnic_adapter *adapter = netdev_priv(netdev);	1512	struct ibmvnic_adapter *adapter = netdev_priv(netdev);
1509	unsigned long timeout = msecs_to_jiffies(20000);
1510	int retry_count = 0;	1513	int retry_count = 0;
1511	int retries = 10;	1514	int retries = 10;
1512	bool retry;	1515	bool retry;
@@ -1527,11 +1530,9 @@ static int ibmvnic_login(struct net_device *netdev) · 14 unmodified lines
1527		1530
1528	if (!wait_for_completion_timeout(&adapter->init_done,	1531	if (!wait_for_completion_timeout(&adapter->init_done,
1529	timeout)) {	1532	timeout)) {
1530	netdev_warn(netdev, "Login timed out, retrying...\n");	1533	netdev_warn(netdev, "Login timed out\n");
1531	retry = true;	1534	adapter->login_pending = false;
1532	adapter->init_done_rc = 0;	1535	goto partial_reset;
1533	retry_count++;
1534	continue;
1535	}	1536	}
1536		1537
1537	if (adapter->init_done_rc == ABORTED) {	1538	if (adapter->init_done_rc == ABORTED) {
@@ -1573,10 +1574,69 @@ static int ibmvnic_login(struct net_device *netdev) · 35 unmodified lines
1573	"SCRQ irq initialization failed\n");	1574	"SCRQ irq initialization failed\n");
1574	return rc;	1575	return rc;
1575	}	1576	}
		1577	/* Default/timeout error handling, reset and start fresh */
1576	} else if (adapter->init_done_rc) {	1578	} else if (adapter->init_done_rc) {
1577	netdev_warn(netdev, "Adapter login failed, init_done_rc = %d\n",	1579	netdev_warn(netdev, "Adapter login failed, init_done_rc = %d\n",
1578	adapter->init_done_rc);	1580	adapter->init_done_rc);
1579	return -EIO;	1581
		1582	partial_reset:
		1583	/* adapter login failed, so free any CRQs or sub-CRQs
		1584	* and register again before attempting to login again.
		1585	* If we don't do this then the VIOS may think that
		1586	* we are already logged in and reject any subsequent
		1587	* attempts
		1588	*/
		1589	netdev_warn(netdev,
		1590	"Freeing and re-registering CRQs before attempting to login again\n");
		1591	retry = true;
		1592	adapter->init_done_rc = 0;
		1593	release_sub_crqs(adapter, true);
		1594	/* Much of this is similar logic as ibmvnic_probe(),
		1595	* we are essentially re-initializing communication
		1596	* with the server. We really should not run any
		1597	* resets/failovers here because this is already a form
		1598	* of reset and we do not want parallel resets occurring
		1599	*/
		1600	do {
		1601	reinit_init_done(adapter);
		1602	/* Clear any failovers we got in the previous
		1603	* pass since we are re-initializing the CRQ
		1604	*/
		1605	adapter->failover_pending = false;
		1606	release_crq_queue(adapter);
		1607	/* If we don't sleep here then we risk an
		1608	* unnecessary failover event from the VIOS.
		1609	* This is a known VIOS issue caused by a vnic
		1610	* device freeing and registering a CRQ too
		1611	* quickly.
		1612	*/
		1613	msleep(1500);
		1614	/* Avoid any resets, since we are currently
		1615	* resetting.
		1616	*/
		1617	spin_lock_irqsave(&adapter->rwi_lock, flags);
		1618	flush_reset_queue(adapter);
		1619	spin_unlock_irqrestore(&adapter->rwi_lock,
		1620	flags);
		1621
		1622	rc = init_crq_queue(adapter);
		1623	if (rc) {
		1624	netdev_err(netdev, "login recovery: init CRQ failed %d\n",
		1625	rc);
		1626	return -EIO;
		1627	}
		1628
		1629	rc = ibmvnic_reset_init(adapter, false);
		1630	if (rc)
		1631	netdev_err(netdev, "login recovery: Reset init failed %d\n",
		1632	rc);
		1633	/* IBMVNIC_CRQ_INIT will return EAGAIN if it
		1634	* fails, since ibmvnic_reset_init will free
		1635	* irq's in failure, we won't be able to receive
		1636	* new CRQs so we need to keep trying. probe()
		1637	* handles this similarly.
		1638	*/
		1639	} while (rc == -EAGAIN && retry_count++ < retries);
1580	}	1640	}
1581	} while (retry);	1641	} while (retry);
1582		1642
@@ -1588,12 +1648,22 @@ static int ibmvnic_login(struct net_device *netdev) · 5 unmodified lines
1588		1648
1589	static void release_login_buffer(struct ibmvnic_adapter *adapter)	1649	static void release_login_buffer(struct ibmvnic_adapter *adapter)
1590	{	1650	{
		1651	if (!adapter->login_buf)
		1652	return;
		1653
		1654	dma_unmap_single(&adapter->vdev->dev, adapter->login_buf_token,
		1655	adapter->login_buf_sz, DMA_TO_DEVICE);
1591	kfree(adapter->login_buf);	1656	kfree(adapter->login_buf);
1592	adapter->login_buf = NULL;	1657	adapter->login_buf = NULL;
1593	}	1658	}
1594		1659
1595	static void release_login_rsp_buffer(struct ibmvnic_adapter *adapter)	1660	static void release_login_rsp_buffer(struct ibmvnic_adapter *adapter)
1596	{	1661	{
		1662	if (!adapter->login_rsp_buf)
		1663	return;
		1664
		1665	dma_unmap_single(&adapter->vdev->dev, adapter->login_rsp_buf_token,
		1666	adapter->login_rsp_buf_sz, DMA_FROM_DEVICE);
1597	kfree(adapter->login_rsp_buf);	1667	kfree(adapter->login_rsp_buf);
1598	adapter->login_rsp_buf = NULL;	1668	adapter->login_rsp_buf = NULL;
1599	}	1669	}
@@ -4830,11 +4900,14 @@ static int send_login(struct ibmvnic_adapter *adapter) · 3230 unmodified lines
4830	if (rc) {	4900	if (rc) {
4831	adapter->login_pending = false;	4901	adapter->login_pending = false;
4832	netdev_err(adapter->netdev, "Failed to send login, rc=%d\n", rc);	4902	netdev_err(adapter->netdev, "Failed to send login, rc=%d\n", rc);
4833	goto buf_rsp_map_failed;	4903	goto buf_send_failed;
4834	}	4904	}
4835		4905
4836	return 0;	4906	return 0;
4837		4907
		4908	buf_send_failed:
		4909	dma_unmap_single(dev, rsp_buffer_token, rsp_buffer_size,
		4910	DMA_FROM_DEVICE);
4838	buf_rsp_map_failed:	4911	buf_rsp_map_failed:
4839	kfree(login_rsp_buffer);	4912	kfree(login_rsp_buffer);
4840	adapter->login_rsp_buf = NULL;	4913	adapter->login_rsp_buf = NULL;
@@ -5396,6 +5469,7 @@ static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq, · 555 unmodified lines
5396	int num_tx_pools;	5469	int num_tx_pools;
5397	int num_rx_pools;	5470	int num_rx_pools;
5398	u64 *size_array;	5471	u64 *size_array;
		5472	u32 rsp_len;
5399	int i;	5473	int i;
5400		5474
5401	/* CHECK: Test/set of login_pending does not need to be atomic	5475	/* CHECK: Test/set of login_pending does not need to be atomic
@@ -5407,11 +5481,6 @@ static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq, · 5 unmodified lines
5407	}	5481	}
5408	adapter->login_pending = false;	5482	adapter->login_pending = false;
5409		5483
5410	dma_unmap_single(dev, adapter->login_buf_token, adapter->login_buf_sz,
5411	DMA_TO_DEVICE);
5412	dma_unmap_single(dev, adapter->login_rsp_buf_token,
5413	adapter->login_rsp_buf_sz, DMA_FROM_DEVICE);
5414
5415	/* If the number of queues requested can't be allocated by the	5484	/* If the number of queues requested can't be allocated by the
5416	* server, the login response will return with code 1. We will need	5485	* server, the login response will return with code 1. We will need
5417	* to resend the login buffer with fewer queues requested.	5486	* to resend the login buffer with fewer queues requested.
@@ -5447,6 +5516,23 @@ static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq, · 29 unmodified lines
5447	ibmvnic_reset(adapter, VNIC_RESET_FATAL);	5516	ibmvnic_reset(adapter, VNIC_RESET_FATAL);
5448	return -EIO;	5517	return -EIO;
5449	}	5518	}
		5519
		5520	rsp_len = be32_to_cpu(login_rsp->len);
		5521	if (be32_to_cpu(login->login_rsp_len) < rsp_len \|\|
		5522	rsp_len <= be32_to_cpu(login_rsp->off_txsubm_subcrqs) \|\|
		5523	rsp_len <= be32_to_cpu(login_rsp->off_rxadd_subcrqs) \|\|
		5524	rsp_len <= be32_to_cpu(login_rsp->off_rxadd_buff_size) \|\|
		5525	rsp_len <= be32_to_cpu(login_rsp->off_supp_tx_desc)) {
		5526	/* This can happen if a login request times out and there are
		5527	* 2 outstanding login requests sent, the LOGIN_RSP crq
		5528	* could have been for the older login request. So we are
		5529	* parsing the newer response buffer which may be incomplete
		5530	*/
		5531	dev_err(dev, "FATAL: Login rsp offsets/lengths invalid\n");
		5532	ibmvnic_reset(adapter, VNIC_RESET_FATAL);
		5533	return -EIO;
		5534	}
		5535
5450	size_array = (u64 )((u8 )(adapter->login_rsp_buf) +	5536	size_array = (u64 )((u8 )(adapter->login_rsp_buf) +
5451	be32_to_cpu(adapter->login_rsp_buf->off_rxadd_buff_size));	5537	be32_to_cpu(adapter->login_rsp_buf->off_rxadd_buff_size));
5452	/* variable buffer sizes are not supported, so just read the	5538	/* variable buffer sizes are not supported, so just read the

drivers/net/ethernet/intel/iavf/iavf_ethtool.c+4−1

 	if (fsp->flow_type & FLOW_MAC_EXT)
 		return -EINVAL;
+	spin_lock_bh(&adapter->fdir_fltr_lock);
 	if (adapter->fdir_active_fltr >= IAVF_MAX_FDIR_FILTERS) {
+		spin_unlock_bh(&adapter->fdir_fltr_lock);
 		dev_err(&adapter->pdev->dev,
 			"Unable to add Flow Director filter because VF reached the limit of max allowed filters (%u)\n",
 			IAVF_MAX_FDIR_FILTERS);
 		return -ENOSPC;
 	}
-	spin_lock_bh(&adapter->fdir_fltr_lock);
 	if (iavf_find_fdir_fltr_by_loc(adapter, fsp->location)) {
 		dev_err(&adapter->pdev->dev, "Failed to add Flow Director filter, it already exists\n");
 		spin_unlock_bh(&adapter->fdir_fltr_lock);
 	case ETHTOOL_GRXCLSRLCNT:
 		if (!FDIR_FLTR_SUPPORT(adapter))
 			break;
+		spin_lock_bh(&adapter->fdir_fltr_lock);
 		cmd->rule_cnt = adapter->fdir_active_fltr;
+		spin_unlock_bh(&adapter->fdir_fltr_lock);
 		cmd->data = IAVF_MAX_FDIR_FILTERS;
 		ret = 0;
 		break;

drivers/net/ethernet/intel/iavf/iavf_fdir.c+8−3

 bool iavf_fdir_is_dup_fltr(struct iavf_adapter *adapter, struct iavf_fdir_fltr *fltr)
 {
 	struct iavf_fdir_fltr *tmp;
+	bool ret = false;
+	spin_lock_bh(&adapter->fdir_fltr_lock);
 	list_for_each_entry(tmp, &adapter->fdir_list_head, list) {
 		if (tmp->flow_type != fltr->flow_type)
 			continue;
 		    !memcmp(&tmp->ip_data, &fltr->ip_data,
 			    sizeof(fltr->ip_data)) &&
 		    !memcmp(&tmp->ext_data, &fltr->ext_data,
-			    sizeof(fltr->ext_data)))
+			    sizeof(fltr->ext_data))) {
-			return true;
+			ret = true;
+			break;
+		}
 	}
+	spin_unlock_bh(&adapter->fdir_fltr_lock);
-	return false;
+	return ret;
 }
 /**

drivers/net/ethernet/intel/ice/ice_main.c+18−0

@@ -8813,6 +8813,7 @@ ice_setup_tc(struct net_device *netdev, enum tc_setup_type type, · 8812 unmodified lines
8813	{	8813	{
8814	struct ice_netdev_priv *np = netdev_priv(netdev);	8814	struct ice_netdev_priv *np = netdev_priv(netdev);
8815	struct ice_pf *pf = np->vsi->back;	8815	struct ice_pf *pf = np->vsi->back;
		8816	bool locked = false;
8816	int err;	8817	int err;
8817		8818
8818	switch (type) {	8819	switch (type) {
@@ -8822,10 +8823,27 @@ ice_setup_tc(struct net_device *netdev, enum tc_setup_type type, · 3 unmodified lines
8822	ice_setup_tc_block_cb,	8823	ice_setup_tc_block_cb,
8823	np, np, true);	8824	np, np, true);
8824	case TC_SETUP_QDISC_MQPRIO:	8825	case TC_SETUP_QDISC_MQPRIO:
		8826	if (pf->adev) {
		8827	mutex_lock(&pf->adev_mutex);
		8828	device_lock(&pf->adev->dev);
		8829	locked = true;
		8830	if (pf->adev->dev.driver) {
		8831	netdev_err(netdev, "Cannot change qdisc when RDMA is active\n");
		8832	err = -EBUSY;
		8833	goto adev_unlock;
		8834	}
		8835	}
		8836
8825	/* setup traffic classifier for receive side */	8837	/* setup traffic classifier for receive side */
8826	mutex_lock(&pf->tc_mutex);	8838	mutex_lock(&pf->tc_mutex);
8827	err = ice_setup_tc_mqprio_qdisc(netdev, type_data);	8839	err = ice_setup_tc_mqprio_qdisc(netdev, type_data);
8828	mutex_unlock(&pf->tc_mutex);	8840	mutex_unlock(&pf->tc_mutex);
		8841
		8842	adev_unlock:
		8843	if (locked) {
		8844	device_unlock(&pf->adev->dev);
		8845	mutex_unlock(&pf->adev_mutex);
		8846	}
8829	return err;	8847	return err;
8830	default:	8848	default:
8831	return -EOPNOTSUPP;	8849	return -EOPNOTSUPP;

drivers/net/ethernet/intel/igc/igc.h+4−0

 	u32 qbv_config_change_errors;
 	bool qbv_transition;
 	unsigned int qbv_count;
+	/* Access to oper_gate_closed, admin_gate_closed and qbv_transition
+	 * are protected by the qbv_tx_lock.
+	 */
+	spinlock_t qbv_tx_lock;
 	/* OS defined structs */
 	struct pci_dev *pdev;

drivers/net/ethernet/intel/igc/igc_main.c+32−2

 	adapter->nfc_rule_count = 0;
 	spin_lock_init(&adapter->stats64_lock);
+	spin_lock_init(&adapter->qbv_tx_lock);
 	/* Assume MSI-X interrupts, will be checked during IRQ allocation */
 	adapter->flags |= IGC_FLAG_HAS_MSIX;
 	return igc_tsn_offload_apply(adapter);
 }
-static int igc_tsn_clear_schedule(struct igc_adapter *adapter)
+static int igc_qbv_clear_schedule(struct igc_adapter *adapter)
 {
+	unsigned long flags;
 	int i;
 	adapter->base_time = 0;
 	adapter->cycle_time = NSEC_PER_SEC;
 	adapter->taprio_offload_enable = false;
 	adapter->qbv_config_change_errors = 0;
-	adapter->qbv_transition = false;
 	adapter->qbv_count = 0;
 	for (i = 0; i < adapter->num_tx_queues; i++) {
 		ring->start_time = 0;
 		ring->end_time = NSEC_PER_SEC;
 		ring->max_sdu = 0;
+	}
+	spin_lock_irqsave(&adapter->qbv_tx_lock, flags);
+	adapter->qbv_transition = false;
+	for (i = 0; i < adapter->num_tx_queues; i++) {
+		struct igc_ring *ring = adapter->tx_ring[i];
 		ring->oper_gate_closed = false;
 		ring->admin_gate_closed = false;
 	}
+	spin_unlock_irqrestore(&adapter->qbv_tx_lock, flags);
+	return 0;
+}
+static int igc_tsn_clear_schedule(struct igc_adapter *adapter)
+{
+	igc_qbv_clear_schedule(adapter);
 	return 0;
 }
 	struct igc_hw *hw = &adapter->hw;
 	u32 start_time = 0, end_time = 0;
 	struct timespec64 now;
+	unsigned long flags;
 	size_t n;
 	int i;
 		start_time += e->interval;
 	}
+	spin_lock_irqsave(&adapter->qbv_tx_lock, flags);
 	/* Check whether a queue gets configured.
 	 * If not, set the start and end time to be end time.
 	 */
 		}
 	}
+	spin_unlock_irqrestore(&adapter->qbv_tx_lock, flags);
 	for (i = 0; i < adapter->num_tx_queues; i++) {
 		struct igc_ring *ring = adapter->tx_ring[i];
 		struct net_device *dev = adapter->netdev;
 {
 	struct igc_adapter *adapter = container_of(timer, struct igc_adapter,
 						   hrtimer);
+	unsigned long flags;
 	unsigned int i;
+	spin_lock_irqsave(&adapter->qbv_tx_lock, flags);
 	adapter->qbv_transition = true;
 	for (i = 0; i < adapter->num_tx_queues; i++) {
 		struct igc_ring *tx_ring = adapter->tx_ring[i];
 		}
 	}
 	adapter->qbv_transition = false;
+	spin_unlock_irqrestore(&adapter->qbv_tx_lock, flags);
 	return HRTIMER_NORESTART;
 }

drivers/net/ethernet/korina.c+1−2

 	else if (of_get_ethdev_address(pdev->dev.of_node, dev) < 0)
 		eth_hw_addr_random(dev);
-	clk = devm_clk_get_optional(&pdev->dev, "mdioclk");
+	clk = devm_clk_get_optional_enabled(&pdev->dev, "mdioclk");
 	if (IS_ERR(clk))
 		return PTR_ERR(clk);
 	if (clk) {
-		clk_prepare_enable(clk);
 		lp->mii_clock_freq = clk_get_rate(clk);
 	} else {
 		lp->mii_clock_freq = 200000000; /* max possible input clk */

drivers/net/ethernet/marvell/octeon_ep/octep_ctrl_mbox.c+3−0

@@ -98,6 +98,9 @@ int octep_ctrl_mbox_init(struct octep_ctrl_mbox *mbox) · 97 unmodified lines
98	writeq(OCTEP_CTRL_MBOX_STATUS_INIT,	98	writeq(OCTEP_CTRL_MBOX_STATUS_INIT,
99	OCTEP_CTRL_MBOX_INFO_HOST_STATUS(mbox->barmem));	99	OCTEP_CTRL_MBOX_INFO_HOST_STATUS(mbox->barmem));
100		100
		101	mutex_init(&mbox->h2fq_lock);
		102	mutex_init(&mbox->f2hq_lock);
		103
101	mbox->h2fq.sz = readl(OCTEP_CTRL_MBOX_H2FQ_SZ(mbox->barmem));	104	mbox->h2fq.sz = readl(OCTEP_CTRL_MBOX_H2FQ_SZ(mbox->barmem));
102	mbox->h2fq.hw_prod = OCTEP_CTRL_MBOX_H2FQ_PROD(mbox->barmem);	105	mbox->h2fq.hw_prod = OCTEP_CTRL_MBOX_H2FQ_PROD(mbox->barmem);
103	mbox->h2fq.hw_cons = OCTEP_CTRL_MBOX_H2FQ_CONS(mbox->barmem);	106	mbox->h2fq.hw_cons = OCTEP_CTRL_MBOX_H2FQ_CONS(mbox->barmem);

drivers/net/ethernet/marvell/prestera/prestera_pci.c+2−1

@@ -727,7 +727,8 @@ pick_fw_ver: · 726 unmodified lines
727		727
728	err = request_firmware_direct(&fw->bin, fw_path, fw->dev.dev);	728	err = request_firmware_direct(&fw->bin, fw_path, fw->dev.dev);
729	if (err) {	729	if (err) {
730	if (ver_maj == PRESTERA_SUPP_FW_MAJ_VER) {	730	if (ver_maj != PRESTERA_PREV_FW_MAJ_VER \|\|
		731	ver_min != PRESTERA_PREV_FW_MIN_VER) {
731	ver_maj = PRESTERA_PREV_FW_MAJ_VER;	732	ver_maj = PRESTERA_PREV_FW_MAJ_VER;
732	ver_min = PRESTERA_PREV_FW_MIN_VER;	733	ver_min = PRESTERA_PREV_FW_MIN_VER;
733		734

drivers/net/ethernet/marvell/prestera/prestera_router.c+7−7

@@ -166,11 +166,11 @@ prestera_util_neigh2nc_key(struct prestera_switch sw, struct neighbour n, · 165 unmodified lines
166		166
167	static bool __prestera_fi_is_direct(struct fib_info *fi)	167	static bool __prestera_fi_is_direct(struct fib_info *fi)
168	{	168	{
169	struct fib_nh *fib_nh;	169	struct fib_nh_common *fib_nhc;
170		170
171	if (fib_info_num_path(fi) == 1) {	171	if (fib_info_num_path(fi) == 1) {
172	fib_nh = fib_info_nh(fi, 0);	172	fib_nhc = fib_info_nhc(fi, 0);
173	if (fib_nh->fib_nh_gw_family == AF_UNSPEC)	173	if (fib_nhc->nhc_gw_family == AF_UNSPEC)
174	return true;	174	return true;
175	}	175	}
176		176
@@ -261,7 +261,7 @@ static bool · 84 unmodified lines
261	__prestera_util_kern_n_is_reachable_v4(u32 tb_id, __be32 *addr,	261	__prestera_util_kern_n_is_reachable_v4(u32 tb_id, __be32 *addr,
262	struct net_device *dev)	262	struct net_device *dev)
263	{	263	{
264	struct fib_nh *fib_nh;	264	struct fib_nh_common *fib_nhc;
265	struct fib_result res;	265	struct fib_result res;
266	bool reachable;	266	bool reachable;
267		267
@@ -269,8 +269,8 @@ __prestera_util_kern_n_is_reachable_v4(u32 tb_id, __be32 *addr, · 1 unmodified line
269		269
270	if (!prestera_util_kern_get_route(&res, tb_id, addr))	270	if (!prestera_util_kern_get_route(&res, tb_id, addr))
271	if (prestera_fi_is_direct(res.fi)) {	271	if (prestera_fi_is_direct(res.fi)) {
272	fib_nh = fib_info_nh(res.fi, 0);	272	fib_nhc = fib_info_nhc(res.fi, 0);
273	if (dev == fib_nh->fib_nh_dev)	273	if (dev == fib_nhc->nhc_dev)
274	reachable = true;	274	reachable = true;
275	}	275	}
276		276
@@ -324,7 +324,7 @@ prestera_kern_fib_info_nhc(struct fib_notifier_info *info, int n) · 47 unmodified lines
324	if (info->family == AF_INET) {	324	if (info->family == AF_INET) {
325	fen4_info = container_of(info, struct fib_entry_notifier_info,	325	fen4_info = container_of(info, struct fib_entry_notifier_info,
326	info);	326	info);
327	return &fib_info_nh(fen4_info->fi, n)->nh_common;	327	return fib_info_nhc(fen4_info->fi, n);
328	} else if (info->family == AF_INET6) {	328	} else if (info->family == AF_INET6) {
329	fen6_info = container_of(info, struct fib6_entry_notifier_info,	329	fen6_info = container_of(info, struct fib6_entry_notifier_info,
330	info);	330	info);

drivers/net/ethernet/mellanox/mlx5/core/diag/reporter_vnic.c+67−49

@@ -2,6 +2,7 @@ · 1 unmodified line
2	/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */	2	/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. */
3		3
4	#include "reporter_vnic.h"	4	#include "reporter_vnic.h"
		5	#include "en_stats.h"
5	#include "devlink.h"	6	#include "devlink.h"
6		7
7	#define VNIC_ENV_GET64(vnic_env_stats, c) \	8	#define VNIC_ENV_GET64(vnic_env_stats, c) \
@@ -36,55 +37,72 @@ int mlx5_reporter_vnic_diagnose_counters(struct mlx5_core_dev *dev, · 28 unmodified lines
36	if (err)	37	if (err)
37	return err;	38	return err;
38		39
39	err = devlink_fmsg_u64_pair_put(fmsg, "total_error_queues",	40	if (MLX5_CAP_GEN(dev, vnic_env_queue_counters)) {
40	VNIC_ENV_GET64(&vnic, total_error_queues));	41	err = devlink_fmsg_u32_pair_put(fmsg, "total_error_queues",
41	if (err)	42	VNIC_ENV_GET(&vnic, total_error_queues));
42	return err;	43	if (err)
43		44	return err;
44	err = devlink_fmsg_u64_pair_put(fmsg, "send_queue_priority_update_flow",	45
45	VNIC_ENV_GET64(&vnic, send_queue_priority_update_flow));	46	err = devlink_fmsg_u32_pair_put(fmsg, "send_queue_priority_update_flow",
46	if (err)	47	VNIC_ENV_GET(&vnic,
47	return err;	48	send_queue_priority_update_flow));
48		49	if (err)
49	err = devlink_fmsg_u64_pair_put(fmsg, "comp_eq_overrun",	50	return err;
50	VNIC_ENV_GET64(&vnic, comp_eq_overrun));	51	}
51	if (err)	52
52	return err;	53	if (MLX5_CAP_GEN(dev, eq_overrun_count)) {
53		54	err = devlink_fmsg_u32_pair_put(fmsg, "comp_eq_overrun",
54	err = devlink_fmsg_u64_pair_put(fmsg, "async_eq_overrun",	55	VNIC_ENV_GET(&vnic, comp_eq_overrun));
55	VNIC_ENV_GET64(&vnic, async_eq_overrun));	56	if (err)
56	if (err)	57	return err;
57	return err;	58
58		59	err = devlink_fmsg_u32_pair_put(fmsg, "async_eq_overrun",
59	err = devlink_fmsg_u64_pair_put(fmsg, "cq_overrun",	60	VNIC_ENV_GET(&vnic, async_eq_overrun));
60	VNIC_ENV_GET64(&vnic, cq_overrun));	61	if (err)
61	if (err)	62	return err;
62	return err;	63	}
63		64
64	err = devlink_fmsg_u64_pair_put(fmsg, "invalid_command",	65	if (MLX5_CAP_GEN(dev, vnic_env_cq_overrun)) {
65	VNIC_ENV_GET64(&vnic, invalid_command));	66	err = devlink_fmsg_u32_pair_put(fmsg, "cq_overrun",
66	if (err)	67	VNIC_ENV_GET(&vnic, cq_overrun));
67	return err;	68	if (err)
68		69	return err;
69	err = devlink_fmsg_u64_pair_put(fmsg, "quota_exceeded_command",	70	}
70	VNIC_ENV_GET64(&vnic, quota_exceeded_command));	71
71	if (err)	72	if (MLX5_CAP_GEN(dev, invalid_command_count)) {
72	return err;	73	err = devlink_fmsg_u32_pair_put(fmsg, "invalid_command",
73		74	VNIC_ENV_GET(&vnic, invalid_command));
74	err = devlink_fmsg_u64_pair_put(fmsg, "nic_receive_steering_discard",	75	if (err)
75	VNIC_ENV_GET64(&vnic, nic_receive_steering_discard));	76	return err;
76	if (err)	77	}
77	return err;	78
78		79	if (MLX5_CAP_GEN(dev, quota_exceeded_count)) {
79	err = devlink_fmsg_u64_pair_put(fmsg, "generated_pkt_steering_fail",	80	err = devlink_fmsg_u32_pair_put(fmsg, "quota_exceeded_command",
80	VNIC_ENV_GET64(&vnic, generated_pkt_steering_fail));	81	VNIC_ENV_GET(&vnic, quota_exceeded_command));
81	if (err)	82	if (err)
82	return err;	83	return err;
83		84	}
84	err = devlink_fmsg_u64_pair_put(fmsg, "handled_pkt_steering_fail",	85
85	VNIC_ENV_GET64(&vnic, handled_pkt_steering_fail));	86	if (MLX5_CAP_GEN(dev, nic_receive_steering_discard)) {
86	if (err)	87	err = devlink_fmsg_u64_pair_put(fmsg, "nic_receive_steering_discard",
87	return err;	88	VNIC_ENV_GET64(&vnic,
		89	nic_receive_steering_discard));
		90	if (err)
		91	return err;
		92	}
		93
		94	if (MLX5_CAP_GEN(dev, vnic_env_cnt_steering_fail)) {
		95	err = devlink_fmsg_u64_pair_put(fmsg, "generated_pkt_steering_fail",
		96	VNIC_ENV_GET64(&vnic,
		97	generated_pkt_steering_fail));
		98	if (err)
		99	return err;
		100
		101	err = devlink_fmsg_u64_pair_put(fmsg, "handled_pkt_steering_fail",
		102	VNIC_ENV_GET64(&vnic, handled_pkt_steering_fail));
		103	if (err)
		104	return err;
		105	}
88		106
89	err = devlink_fmsg_obj_nest_end(fmsg);	107	err = devlink_fmsg_obj_nest_end(fmsg);
90	if (err)	108	if (err)

drivers/net/ethernet/mellanox/mlx5/core/en/tc_tun_encap.c+4−5

 	int out_index;
 	int err = 0;
-	if (!mlx5e_is_eswitch_flow(flow))
-		return 0;
 	parse_attr = attr->parse_attr;
 	esw_attr = attr->esw_attr;
 	*vf_tun = false;
 		attr = mlx5e_tc_get_encap_attr(flow);
 		esw_attr = attr->esw_attr;
-		if (flow_flag_test(flow, SLOW))
+		if (flow_flag_test(flow, SLOW)) {
 			mlx5e_tc_unoffload_from_slow_path(esw, flow);
-		else
+		} else {
 			mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->attr);
+			mlx5e_tc_unoffload_flow_post_acts(flow);
+		}
 		mlx5e_tc_detach_mod_hdr(priv, flow, attr);
 		attr->modify_hdr = NULL;

drivers/net/ethernet/mellanox/mlx5/core/en/xsk/rx.c+4−1

 	net_prefetch(mxbuf->xdp.data);
 	prog = rcu_dereference(rq->xdp_prog);
-	if (likely(prog && mlx5e_xdp_handle(rq, prog, mxbuf)))
+	if (likely(prog && mlx5e_xdp_handle(rq, prog, mxbuf))) {
+		if (likely(__test_and_clear_bit(MLX5E_RQ_FLAG_XDP_XMIT, rq->flags)))
+			wi->flags |= BIT(MLX5E_WQE_FRAG_SKIP_RELEASE);
 		return NULL; /* page/packet was consumed by XDP */
+	}
 	/* XDP_PASS: copy the data from the UMEM to a new SKB. The frame reuse
 	 * will be handled by mlx5e_free_rx_wqe.

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c+2−2

@@ -808,9 +808,9 @@ static void setup_fte_upper_proto_match(struct mlx5_flow_spec *spec, struct upsp · 807 unmodified lines
808	}	808	}
809		809
810	if (upspec->sport) {	810	if (upspec->sport) {
811	MLX5_SET(fte_match_set_lyr_2_4, spec->match_criteria, udp_dport,	811	MLX5_SET(fte_match_set_lyr_2_4, spec->match_criteria, udp_sport,
812	upspec->sport_mask);	812	upspec->sport_mask);
813	MLX5_SET(fte_match_set_lyr_2_4, spec->match_value, udp_dport, upspec->sport);	813	MLX5_SET(fte_match_set_lyr_2_4, spec->match_value, udp_sport, upspec->sport);
814	}	814	}
815	}	815	}
816		816

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_rxtx.c+3−1

@@ -58,7 +58,9 @@ static int mlx5e_ipsec_remove_trailer(struct sk_buff skb, struct xfrm_state x) · 57 unmodified lines
58		58
59	trailer_len = alen + plen + 2;	59	trailer_len = alen + plen + 2;
60		60
61	pskb_trim(skb, skb->len - trailer_len);	61	ret = pskb_trim(skb, skb->len - trailer_len);
		62	if (unlikely(ret))
		63	return ret;
62	if (skb->protocol == htons(ETH_P_IP)) {	64	if (skb->protocol == htons(ETH_P_IP)) {
63	ipv4hdr->tot_len = htons(ntohs(ipv4hdr->tot_len) - trailer_len);	65	ipv4hdr->tot_len = htons(ntohs(ipv4hdr->tot_len) - trailer_len);
64	ip_send_check(ipv4hdr);	66	ip_send_check(ipv4hdr);

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.c+0−8

 int mlx5e_ktls_init(struct mlx5e_priv *priv)
 {
-	struct mlx5_crypto_dek_pool *dek_pool;
 	struct mlx5e_tls *tls;
 	if (!mlx5e_is_ktls_device(priv->mdev))
 		return -ENOMEM;
 	tls->mdev = priv->mdev;
-	dek_pool = mlx5_crypto_dek_pool_create(priv->mdev, MLX5_ACCEL_OBJ_TLS_KEY);
-	if (IS_ERR(dek_pool)) {
-		kfree(tls);
-		return PTR_ERR(dek_pool);
-	}
-	tls->dek_pool = dek_pool;
 	priv->tls = tls;
 	mlx5e_tls_debugfs_init(tls, priv->dfs_root);
 	debugfs_remove_recursive(tls->debugfs.dfs);
 	tls->debugfs.dfs = NULL;
-	mlx5_crypto_dek_pool_destroy(tls->dek_pool);
 	kfree(priv->tls);
 	priv->tls = NULL;
 }

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c+26−3

 int mlx5e_ktls_init_tx(struct mlx5e_priv *priv)
 {
+	struct mlx5_crypto_dek_pool *dek_pool;
 	struct mlx5e_tls *tls = priv->tls;
+	int err;
+	if (!mlx5e_is_ktls_device(priv->mdev))
+		return 0;
+	/* DEK pool could be used by either or both of TX and RX. But we have to
+	 * put the creation here to avoid syndrome when doing devlink reload.
+	 */
+	dek_pool = mlx5_crypto_dek_pool_create(priv->mdev, MLX5_ACCEL_OBJ_TLS_KEY);
+	if (IS_ERR(dek_pool))
+		return PTR_ERR(dek_pool);
+	tls->dek_pool = dek_pool;
 	if (!mlx5e_is_ktls_tx(priv->mdev))
 		return 0;
 	priv->tls->tx_pool = mlx5e_tls_tx_pool_init(priv->mdev, &priv->tls->sw_stats);
-	if (!priv->tls->tx_pool)
+	if (!priv->tls->tx_pool) {
-		return -ENOMEM;
+		err = -ENOMEM;
+		goto err_tx_pool_init;
+	}
 	mlx5e_tls_tx_debugfs_init(tls, tls->debugfs.dfs);
 	return 0;
+err_tx_pool_init:
+	mlx5_crypto_dek_pool_destroy(dek_pool);
+	return err;
 }
 void mlx5e_ktls_cleanup_tx(struct mlx5e_priv *priv)
 {
 	if (!mlx5e_is_ktls_tx(priv->mdev))
-		return;
+		goto dek_pool_destroy;
 	debugfs_remove_recursive(priv->tls->debugfs.dfs_tx);
 	priv->tls->debugfs.dfs_tx = NULL;
 	mlx5e_tls_tx_pool_cleanup(priv->tls->tx_pool);
 	priv->tls->tx_pool = NULL;
+dek_pool_destroy:
+	if (mlx5e_is_ktls_device(priv->mdev))
+		mlx5_crypto_dek_pool_destroy(priv->tls->dek_pool);
 }

drivers/net/ethernet/mellanox/mlx5/core/en_accel/macsec_fs.c+1−0

@@ -161,6 +161,7 @@ static int macsec_fs_tx_create_crypto_table_groups(struct mlx5e_flow_table *ft) · 160 unmodified lines
161		161
162	if (!in) {	162	if (!in) {
163	kfree(ft->g);	163	kfree(ft->g);
		164	ft->g = NULL;
164	return -ENOMEM;	165	return -ENOMEM;
165	}	166	}
166		167

drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c+10−0

@@ -135,6 +135,16 @@ static void arfs_del_rules(struct mlx5e_flow_steering *fs); · 134 unmodified lines
135		135
136	int mlx5e_arfs_disable(struct mlx5e_flow_steering *fs)	136	int mlx5e_arfs_disable(struct mlx5e_flow_steering *fs)
137	{	137	{
		138	/* Moving to switchdev mode, fs->arfs is freed by mlx5e_nic_profile
		139	* cleanup_rx callback and it is not recreated when
		140	* mlx5e_uplink_rep_profile is loaded as mlx5e_create_flow_steering()
		141	* is not called by the uplink_rep profile init_rx callback. Thus, if
		142	* ntuple is set, moving to switchdev flow will enter this function
		143	* with fs->arfs nullified.
		144	*/
		145	if (!mlx5e_fs_get_arfs(fs))
		146	return 0;
		147
138	arfs_del_rules(fs);	148	arfs_del_rules(fs);
139		149
140	return arfs_disable(fs);	150	return arfs_disable(fs);

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+32−8

 	return err;
 }
-static int mlx5e_rq_to_ready(struct mlx5e_rq *rq, int curr_state)
+static void mlx5e_flush_rq_cq(struct mlx5e_rq *rq)
+{
+	struct mlx5_cqwq *cqwq = &rq->cq.wq;
+	struct mlx5_cqe64 *cqe;
+	if (test_bit(MLX5E_RQ_STATE_MINI_CQE_ENHANCED, &rq->state)) {
+		while ((cqe = mlx5_cqwq_get_cqe_enahnced_comp(cqwq)))
+			mlx5_cqwq_pop(cqwq);
+	} else {
+		while ((cqe = mlx5_cqwq_get_cqe(cqwq)))
+			mlx5_cqwq_pop(cqwq);
+	}
+	mlx5_cqwq_update_db_record(cqwq);
+}
+int mlx5e_flush_rq(struct mlx5e_rq *rq, int curr_state)
 {
 	struct net_device *dev = rq->netdev;
 	int err;
 		netdev_err(dev, "Failed to move rq 0x%x to reset\n", rq->rqn);
 		return err;
 	}
+	mlx5e_free_rx_descs(rq);
+	mlx5e_flush_rq_cq(rq);
 	err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY);
 	if (err) {
 		netdev_err(dev, "Failed to move rq 0x%x to ready\n", rq->rqn);
 	return 0;
 }
-int mlx5e_flush_rq(struct mlx5e_rq *rq, int curr_state)
-{
-	mlx5e_free_rx_descs(rq);
-	return mlx5e_rq_to_ready(rq, curr_state);
-}
 static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd)
 {
 	struct mlx5_core_dev *mdev = rq->mdev;
 static int mlx5e_nic_init(struct mlx5_core_dev *mdev,
 			  struct net_device *netdev)
 {
+	const bool take_rtnl = netdev->reg_state == NETREG_REGISTERED;
 	struct mlx5e_priv *priv = netdev_priv(netdev);
 	struct mlx5e_flow_steering *fs;
 	int err;
 		mlx5_core_err(mdev, "TLS initialization failed, %d\n", err);
 	mlx5e_health_create_reporters(priv);
+	/* If netdev is already registered (e.g. move from uplink to nic profile),
+	 * RTNL lock must be held before triggering netdev notifiers.
+	 */
+	if (take_rtnl)
+		rtnl_lock();
 	/* update XDP supported features */
 	mlx5e_set_xdp_feature(netdev);
+	if (take_rtnl)
+		rtnl_unlock();
 	return 0;
 }

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+9−11

 	err = mlx5e_open_drop_rq(priv, &priv->drop_rq);
 	if (err) {
 		mlx5_core_err(mdev, "open drop rq failed, %d\n", err);
-		return err;
+		goto err_rx_res_free;
 	}
 	err = mlx5e_rx_res_init(priv->rx_res, priv->mdev, 0,
 	mlx5e_rx_res_destroy(priv->rx_res);
 err_close_drop_rq:
 	mlx5e_close_drop_rq(&priv->drop_rq);
+err_rx_res_free:
 	mlx5e_rx_res_free(priv->rx_res);
 	priv->rx_res = NULL;
 err_free_fs:
 		return err;
 	}
+	err = mlx5e_rep_neigh_init(rpriv);
+	if (err)
+		goto err_neigh_init;
 	if (rpriv->rep->vport == MLX5_VPORT_UPLINK) {
 		err = mlx5e_init_uplink_rep_tx(rpriv);
 		if (err)
 	if (rpriv->rep->vport == MLX5_VPORT_UPLINK)
 		mlx5e_cleanup_uplink_rep_tx(rpriv);
 err_init_tx:
+	mlx5e_rep_neigh_cleanup(rpriv);
+err_neigh_init:
 	mlx5e_destroy_tises(priv);
 	return err;
 }
 	if (rpriv->rep->vport == MLX5_VPORT_UPLINK)
 		mlx5e_cleanup_uplink_rep_tx(rpriv);
+	mlx5e_rep_neigh_cleanup(rpriv);
 	mlx5e_destroy_tises(priv);
 }
 static void mlx5e_rep_enable(struct mlx5e_priv *priv)
 {
-	struct mlx5e_rep_priv *rpriv = priv->ppriv;
 	mlx5e_set_netdev_mtu_boundaries(priv);
-	mlx5e_rep_neigh_init(rpriv);
 }
 static void mlx5e_rep_disable(struct mlx5e_priv *priv)
 {
-	struct mlx5e_rep_priv *rpriv = priv->ppriv;
-	mlx5e_rep_neigh_cleanup(rpriv);
 }
 static int mlx5e_update_rep_rx(struct mlx5e_priv *priv)
 static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv)
 {
-	struct mlx5e_rep_priv *rpriv = priv->ppriv;
 	struct net_device *netdev = priv->netdev;
 	struct mlx5_core_dev *mdev = priv->mdev;
 	u16 max_mtu;
 	mlx5_notifier_register(mdev, &priv->events_nb);
 	mlx5e_dcbnl_initialize(priv);
 	mlx5e_dcbnl_init_app(priv);
-	mlx5e_rep_neigh_init(rpriv);
 	mlx5e_rep_bridge_init(priv);
 	netdev->wanted_features |= NETIF_F_HW_TC;
 static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv)
 {
-	struct mlx5e_rep_priv *rpriv = priv->ppriv;
 	struct mlx5_core_dev *mdev = priv->mdev;
 	rtnl_lock();
 	rtnl_unlock();
 	mlx5e_rep_bridge_cleanup(priv);
-	mlx5e_rep_neigh_cleanup(rpriv);
 	mlx5e_dcbnl_delete_app(priv);
 	mlx5_notifier_unregister(mdev, &priv->events_nb);
 	mlx5e_rep_tc_disable(priv);

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+31−11

 	return 0;
 }
+static bool
+has_encap_dests(struct mlx5_flow_attr *attr)
+{
+	struct mlx5_esw_flow_attr *esw_attr = attr->esw_attr;
+	int out_index;
+	for (out_index = 0; out_index < MLX5_MAX_FLOW_FWD_VPORTS; out_index++)
+		if (esw_attr->dests[out_index].flags & MLX5_ESW_DEST_ENCAP)
+			return true;
+	return false;
+}
 static int
 post_process_attr(struct mlx5e_tc_flow *flow,
 		  struct mlx5_flow_attr *attr,
 	if (err)
 		goto err_out;
-	err = mlx5e_tc_tun_encap_dests_set(flow->priv, flow, attr, extack, &vf_tun);
+	if (mlx5e_is_eswitch_flow(flow) && has_encap_dests(attr)) {
-	if (err)
+		err = mlx5e_tc_tun_encap_dests_set(flow->priv, flow, attr, extack, &vf_tun);
-		goto err_out;
+		if (err)
+			goto err_out;
+	}
 	if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) {
 		err = mlx5e_tc_attach_mod_hdr(flow->priv, flow, attr);
 {
 	struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
 	struct mlx5_flow_attr *attr = flow->attr;
-	struct mlx5_esw_flow_attr *esw_attr;
-	esw_attr = attr->esw_attr;
 	mlx5e_put_flow_tunnel_id(flow);
 	remove_unready_flow(flow);
 	mlx5_tc_ct_match_del(get_ct_priv(priv), &flow->attr->ct_attr);
-	if (esw_attr->int_port)
-		mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(priv), esw_attr->int_port);
-	if (esw_attr->dest_int_port)
-		mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(priv), esw_attr->dest_int_port);
 	if (flow_flag_test(flow, L3_TO_L2_DECAP))
 		mlx5e_detach_decap(priv, flow);
 mlx5_free_flow_attr_actions(struct mlx5e_tc_flow *flow, struct mlx5_flow_attr *attr)
 {
 	struct mlx5_core_dev *counter_dev = get_flow_counter_dev(flow);
+	struct mlx5_esw_flow_attr *esw_attr;
 	if (!attr)
 		return;
 		mlx5e_tc_detach_mod_hdr(flow->priv, flow, attr);
 	}
+	if (mlx5e_is_eswitch_flow(flow)) {
+		esw_attr = attr->esw_attr;
+		if (esw_attr->int_port)
+			mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(flow->priv),
+					      esw_attr->int_port);
+		if (esw_attr->dest_int_port)
+			mlx5e_tc_int_port_put(mlx5e_get_int_port_priv(flow->priv),
+					      esw_attr->dest_int_port);
+	}
 	mlx5_tc_ct_delete_flow(get_ct_priv(flow->priv), attr);
 	free_branch_attr(flow, attr->branch_true);

drivers/net/ethernet/mellanox/mlx5/core/esw/bridge_debugfs.c+1−1

@@ -64,7 +64,7 @@ void mlx5_esw_bridge_debugfs_init(struct net_device *br_netdev, struct mlx5_esw_ · 63 unmodified lines
64		64
65	bridge->debugfs_dir = debugfs_create_dir(br_netdev->name,	65	bridge->debugfs_dir = debugfs_create_dir(br_netdev->name,
66	bridge->br_offloads->debugfs_root);	66	bridge->br_offloads->debugfs_root);
67	debugfs_create_file("fdb", 0444, bridge->debugfs_dir, bridge,	67	debugfs_create_file("fdb", 0400, bridge->debugfs_dir, bridge,
68	&mlx5_esw_bridge_debugfs_fops);	68	&mlx5_esw_bridge_debugfs_fops);
69	}	69	}
70		70

drivers/net/ethernet/mellanox/mlx5/core/esw/devlink_port.c+1−1

@@ -60,7 +60,7 @@ static struct devlink_port mlx5_esw_dl_port_alloc(struct mlx5_eswitch esw, u16 · 59 unmodified lines
60	} else if (mlx5_core_is_ec_vf_vport(esw->dev, vport_num)) {	60	} else if (mlx5_core_is_ec_vf_vport(esw->dev, vport_num)) {
61	memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);	61	memcpy(dl_port->attrs.switch_id.id, ppid.id, ppid.id_len);
62	dl_port->attrs.switch_id.id_len = ppid.id_len;	62	dl_port->attrs.switch_id.id_len = ppid.id_len;
63	devlink_port_attrs_pci_vf_set(dl_port, controller_num, pfnum,	63	devlink_port_attrs_pci_vf_set(dl_port, 0, pfnum,
64	vport_num - 1, false);	64	vport_num - 1, false);
65	}	65	}
66	return dl_port;	66	return dl_port;

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+8−9

 	esw_init_chains_offload_flags(esw, &attr.flags);
 	attr.ns = MLX5_FLOW_NAMESPACE_FDB;
-	attr.fs_base_prio = FDB_TC_OFFLOAD;
 	attr.max_grp_num = esw->params.large_group_num;
 	attr.default_ft = miss_fdb;
 	attr.mapping = esw->offloads.reg_c0_obj_pool;
 					 struct mlx5_eswitch *peer_esw,
 					 bool pair)
 {
-	u8 peer_idx = mlx5_get_dev_index(peer_esw->dev);
+	u16 peer_vhca_id = MLX5_CAP_GEN(peer_esw->dev, vhca_id);
+	u16 vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
 	struct mlx5_flow_root_namespace *peer_ns;
-	u8 idx = mlx5_get_dev_index(esw->dev);
 	struct mlx5_flow_root_namespace *ns;
 	int err;
 	ns = esw->dev->priv.steering->fdb_root_ns;
 	if (pair) {
-		err = mlx5_flow_namespace_set_peer(ns, peer_ns, peer_idx);
+		err = mlx5_flow_namespace_set_peer(ns, peer_ns, peer_vhca_id);
 		if (err)
 			return err;
-		err = mlx5_flow_namespace_set_peer(peer_ns, ns, idx);
+		err = mlx5_flow_namespace_set_peer(peer_ns, ns, vhca_id);
 		if (err) {
-			mlx5_flow_namespace_set_peer(ns, NULL, peer_idx);
+			mlx5_flow_namespace_set_peer(ns, NULL, peer_vhca_id);
 			return err;
 		}
 	} else {
-		mlx5_flow_namespace_set_peer(ns, NULL, peer_idx);
+		mlx5_flow_namespace_set_peer(ns, NULL, peer_vhca_id);
-		mlx5_flow_namespace_set_peer(peer_ns, NULL, idx);
+		mlx5_flow_namespace_set_peer(peer_ns, NULL, vhca_id);
 	}
 	return 0;
 	}
 	hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
-	MLX5_SET(cmd_hca_cap_2, hca_caps, migratable, 1);
+	MLX5_SET(cmd_hca_cap_2, hca_caps, migratable, enable);
 	err = mlx5_vport_set_other_func_cap(esw->dev, hca_caps, vport->vport,
 					    MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE2);

drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c+1−1

@@ -140,7 +140,7 @@ static void mlx5_cmd_stub_modify_header_dealloc(struct mlx5_flow_root_namespace · 139 unmodified lines
140		140
141	static int mlx5_cmd_stub_set_peer(struct mlx5_flow_root_namespace *ns,	141	static int mlx5_cmd_stub_set_peer(struct mlx5_flow_root_namespace *ns,
142	struct mlx5_flow_root_namespace *peer_ns,	142	struct mlx5_flow_root_namespace *peer_ns,
143	u8 peer_idx)	143	u16 peer_vhca_id)
144	{	144	{
145	return 0;	145	return 0;
146	}	146	}

drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.h+1−1

@@ -94,7 +94,7 @@ struct mlx5_flow_cmds { · 93 unmodified lines
94		94
95	int (set_peer)(struct mlx5_flow_root_namespace ns,	95	int (set_peer)(struct mlx5_flow_root_namespace ns,
96	struct mlx5_flow_root_namespace *peer_ns,	96	struct mlx5_flow_root_namespace *peer_ns,
97	u8 peer_idx);	97	u16 peer_vhca_id);
98		98
99	int (create_ns)(struct mlx5_flow_root_namespace ns);	99	int (create_ns)(struct mlx5_flow_root_namespace ns);
100	int (destroy_ns)(struct mlx5_flow_root_namespace ns);	100	int (destroy_ns)(struct mlx5_flow_root_namespace ns);

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+85−22

@@ -889,7 +889,7 @@ static struct mlx5_flow_table find_closest_ft_recursive(struct fs_node root, · 888 unmodified lines
889	struct fs_node *iter = list_entry(start, struct fs_node, list);	889	struct fs_node *iter = list_entry(start, struct fs_node, list);
890	struct mlx5_flow_table *ft = NULL;	890	struct mlx5_flow_table *ft = NULL;
891		891
892	if (!root \|\| root->type == FS_TYPE_PRIO_CHAINS)	892	if (!root)
893	return NULL;	893	return NULL;
894		894
895	list_for_each_advance_continue(iter, &root->children, reverse) {	895	list_for_each_advance_continue(iter, &root->children, reverse) {
@@ -905,20 +905,42 @@ static struct mlx5_flow_table find_closest_ft_recursive(struct fs_node root, · 9 unmodified lines
905	return ft;	905	return ft;
906	}	906	}
907		907
908	/* If reverse is false then return the first flow table in next priority of	908	static struct fs_node find_prio_chains_parent(struct fs_node parent,
909	* prio in the tree, else return the last flow table in the previous priority	909	struct fs_node **child)
910	* of prio in the tree.	910	{
		911	struct fs_node *node = NULL;
		912
		913	while (parent && parent->type != FS_TYPE_PRIO_CHAINS) {
		914	node = parent;
		915	parent = parent->parent;
		916	}
		917
		918	if (child)
		919	*child = node;
		920
		921	return parent;
		922	}
		923
		924	/* If reverse is false then return the first flow table next to the passed node
		925	* in the tree, else return the last flow table before the node in the tree.
		926	* If skip is true, skip the flow tables in the same prio_chains prio.
911	*/	927	*/
912	static struct mlx5_flow_table find_closest_ft(struct fs_prio prio, bool reverse)	928	static struct mlx5_flow_table find_closest_ft(struct fs_node node, bool reverse,
		929	bool skip)
913	{	930	{
		931	struct fs_node *prio_chains_parent = NULL;
914	struct mlx5_flow_table *ft = NULL;	932	struct mlx5_flow_table *ft = NULL;
915	struct fs_node *curr_node;	933	struct fs_node *curr_node;
916	struct fs_node *parent;	934	struct fs_node *parent;
917		935
918	parent = prio->node.parent;	936	if (skip)
919	curr_node = &prio->node;	937	prio_chains_parent = find_prio_chains_parent(node, NULL);
		938	parent = node->parent;
		939	curr_node = node;
920	while (!ft && parent) {	940	while (!ft && parent) {
921	ft = find_closest_ft_recursive(parent, &curr_node->list, reverse);	941	if (parent != prio_chains_parent)
		942	ft = find_closest_ft_recursive(parent, &curr_node->list,
		943	reverse);
922	curr_node = parent;	944	curr_node = parent;
923	parent = curr_node->parent;	945	parent = curr_node->parent;
924	}	946	}
@@ -926,15 +948,15 @@ static struct mlx5_flow_table find_closest_ft(struct fs_prio prio, bool revers · 1 unmodified line
926	}	948	}
927		949
928	/* Assuming all the tree is locked by mutex chain lock */	950	/* Assuming all the tree is locked by mutex chain lock */
929	static struct mlx5_flow_table find_next_chained_ft(struct fs_prio prio)	951	static struct mlx5_flow_table find_next_chained_ft(struct fs_node node)
930	{	952	{
931	return find_closest_ft(prio, false);	953	return find_closest_ft(node, false, true);
932	}	954	}
933		955
934	/* Assuming all the tree is locked by mutex chain lock */	956	/* Assuming all the tree is locked by mutex chain lock */
935	static struct mlx5_flow_table find_prev_chained_ft(struct fs_prio prio)	957	static struct mlx5_flow_table find_prev_chained_ft(struct fs_node node)
936	{	958	{
937	return find_closest_ft(prio, true);	959	return find_closest_ft(node, true, true);
938	}	960	}
939		961
940	static struct mlx5_flow_table find_next_fwd_ft(struct mlx5_flow_table ft,	962	static struct mlx5_flow_table find_next_fwd_ft(struct mlx5_flow_table ft,
@@ -946,7 +968,7 @@ static struct mlx5_flow_table find_next_fwd_ft(struct mlx5_flow_table ft, · 5 unmodified lines
946	next_ns = flow_act->action & MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS;	968	next_ns = flow_act->action & MLX5_FLOW_CONTEXT_ACTION_FWD_NEXT_NS;
947	fs_get_obj(prio, next_ns ? ft->ns->node.parent : ft->node.parent);	969	fs_get_obj(prio, next_ns ? ft->ns->node.parent : ft->node.parent);
948		970
949	return find_next_chained_ft(prio);	971	return find_next_chained_ft(&prio->node);
950	}	972	}
951		973
952	static int connect_fts_in_prio(struct mlx5_core_dev *dev,	974	static int connect_fts_in_prio(struct mlx5_core_dev *dev,
@@ -970,21 +992,55 @@ static int connect_fts_in_prio(struct mlx5_core_dev *dev, · 17 unmodified lines
970	return 0;	992	return 0;
971	}	993	}
972		994
		995	static struct mlx5_flow_table find_closet_ft_prio_chains(struct fs_node node,
		996	struct fs_node *parent,
		997	struct fs_node **child,
		998	bool reverse)
		999	{
		1000	struct mlx5_flow_table *ft;
		1001
		1002	ft = find_closest_ft(node, reverse, false);
		1003
		1004	if (ft && parent == find_prio_chains_parent(&ft->node, child))
		1005	return ft;
		1006
		1007	return NULL;
		1008	}
		1009
973	/* Connect flow tables from previous priority of prio to ft */	1010	/* Connect flow tables from previous priority of prio to ft */
974	static int connect_prev_fts(struct mlx5_core_dev *dev,	1011	static int connect_prev_fts(struct mlx5_core_dev *dev,
975	struct mlx5_flow_table *ft,	1012	struct mlx5_flow_table *ft,
976	struct fs_prio *prio)	1013	struct fs_prio *prio)
977	{	1014	{
		1015	struct fs_node prio_parent, parent = NULL, child, node;
978	struct mlx5_flow_table *prev_ft;	1016	struct mlx5_flow_table *prev_ft;
		1017	int err = 0;
		1018
		1019	prio_parent = find_prio_chains_parent(&prio->node, &child);
		1020
		1021	/* return directly if not under the first sub ns of prio_chains prio */
		1022	if (prio_parent && !list_is_first(&child->list, &prio_parent->children))
		1023	return 0;
979		1024
980	prev_ft = find_prev_chained_ft(prio);	1025	prev_ft = find_prev_chained_ft(&prio->node);
981	if (prev_ft) {	1026	while (prev_ft) {
982	struct fs_prio *prev_prio;	1027	struct fs_prio *prev_prio;
983		1028
984	fs_get_obj(prev_prio, prev_ft->node.parent);	1029	fs_get_obj(prev_prio, prev_ft->node.parent);
985	return connect_fts_in_prio(dev, prev_prio, ft);	1030	err = connect_fts_in_prio(dev, prev_prio, ft);
		1031	if (err)
		1032	break;
		1033
		1034	if (!parent) {
		1035	parent = find_prio_chains_parent(&prev_prio->node, &child);
		1036	if (!parent)
		1037	break;
		1038	}
		1039
		1040	node = child;
		1041	prev_ft = find_closet_ft_prio_chains(node, parent, &child, true);
986	}	1042	}
987	return 0;	1043	return err;
988	}	1044	}
989		1045
990	static int update_root_ft_create(struct mlx5_flow_table *ft, struct fs_prio	1046	static int update_root_ft_create(struct mlx5_flow_table *ft, struct fs_prio
@@ -1123,7 +1179,7 @@ static int connect_flow_table(struct mlx5_core_dev *dev, struct mlx5_flow_table · 132 unmodified lines
1123	if (err)	1179	if (err)
1124	return err;	1180	return err;
1125		1181
1126	next_ft = first_ft ? first_ft : find_next_chained_ft(prio);	1182	next_ft = first_ft ? first_ft : find_next_chained_ft(&prio->node);
1127	err = connect_fwd_rules(dev, ft, next_ft);	1183	err = connect_fwd_rules(dev, ft, next_ft);
1128	if (err)	1184	if (err)
1129	return err;	1185	return err;
@@ -1198,7 +1254,7 @@ static struct mlx5_flow_table *__mlx5_create_flow_table(struct mlx5_flow_namespa · 68 unmodified lines
1198		1254
1199	tree_init_node(&ft->node, del_hw_flow_table, del_sw_flow_table);	1255	tree_init_node(&ft->node, del_hw_flow_table, del_sw_flow_table);
1200	next_ft = unmanaged ? ft_attr->next_ft :	1256	next_ft = unmanaged ? ft_attr->next_ft :
1201	find_next_chained_ft(fs_prio);	1257	find_next_chained_ft(&fs_prio->node);
1202	ft->def_miss_action = ns->def_miss_action;	1258	ft->def_miss_action = ns->def_miss_action;
1203	ft->ns = ns;	1259	ft->ns = ns;
1204	err = root->cmds->create_flow_table(root, ft, ft_attr, next_ft);	1260	err = root->cmds->create_flow_table(root, ft, ft_attr, next_ft);
@@ -2195,13 +2251,20 @@ EXPORT_SYMBOL(mlx5_del_flow_rules); · 990 unmodified lines
2195	/* Assuming prio->node.children(flow tables) is sorted by level */	2251	/* Assuming prio->node.children(flow tables) is sorted by level */
2196	static struct mlx5_flow_table find_next_ft(struct mlx5_flow_table ft)	2252	static struct mlx5_flow_table find_next_ft(struct mlx5_flow_table ft)
2197	{	2253	{
		2254	struct fs_node prio_parent, child;
2198	struct fs_prio *prio;	2255	struct fs_prio *prio;
2199		2256
2200	fs_get_obj(prio, ft->node.parent);	2257	fs_get_obj(prio, ft->node.parent);
2201		2258
2202	if (!list_is_last(&ft->node.list, &prio->node.children))	2259	if (!list_is_last(&ft->node.list, &prio->node.children))
2203	return list_next_entry(ft, node.list);	2260	return list_next_entry(ft, node.list);
2204	return find_next_chained_ft(prio);	2261
		2262	prio_parent = find_prio_chains_parent(&prio->node, &child);
		2263
		2264	if (prio_parent && list_is_first(&child->list, &prio_parent->children))
		2265	return find_closest_ft(&prio->node, false, false);
		2266
		2267	return find_next_chained_ft(&prio->node);
2205	}	2268	}
2206		2269
2207	static int update_root_ft_destroy(struct mlx5_flow_table *ft)	2270	static int update_root_ft_destroy(struct mlx5_flow_table *ft)
@@ -3621,7 +3684,7 @@ void mlx5_destroy_match_definer(struct mlx5_core_dev *dev, · 1413 unmodified lines
3621		3684
3622	int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns,	3685	int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns,
3623	struct mlx5_flow_root_namespace *peer_ns,	3686	struct mlx5_flow_root_namespace *peer_ns,
3624	u8 peer_idx)	3687	u16 peer_vhca_id)
3625	{	3688	{
3626	if (peer_ns && ns->mode != peer_ns->mode) {	3689	if (peer_ns && ns->mode != peer_ns->mode) {
3627	mlx5_core_err(ns->dev,	3690	mlx5_core_err(ns->dev,
@@ -3629,7 +3692,7 @@ int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns, · 1 unmodified line
3629	return -EINVAL;	3692	return -EINVAL;
3630	}	3693	}
3631		3694
3632	return ns->cmds->set_peer(ns, peer_ns, peer_idx);	3695	return ns->cmds->set_peer(ns, peer_ns, peer_vhca_id);
3633	}	3696	}
3634		3697
3635	/* This function should be called only at init stage of the namespace.	3698	/* This function should be called only at init stage of the namespace.

drivers/net/ethernet/mellanox/mlx5/core/fs_core.h+1−1

@@ -303,7 +303,7 @@ const struct mlx5_flow_cmds *mlx5_fs_cmd_get_fw_cmds(void); · 302 unmodified lines
303		303
304	int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns,	304	int mlx5_flow_namespace_set_peer(struct mlx5_flow_root_namespace *ns,
305	struct mlx5_flow_root_namespace *peer_ns,	305	struct mlx5_flow_root_namespace *peer_ns,
306	u8 peer_idx);	306	u16 peer_vhca_id);
307		307
308	int mlx5_flow_namespace_set_mode(struct mlx5_flow_namespace *ns,	308	int mlx5_flow_namespace_set_mode(struct mlx5_flow_namespace *ns,
309	enum mlx5_flow_steering_mode mode);	309	enum mlx5_flow_steering_mode mode);

drivers/net/ethernet/mellanox/mlx5/core/lag/port_sel.c+1−1

@@ -574,7 +574,7 @@ static int __mlx5_lag_modify_definers_destinations(struct mlx5_lag *ldev, · 573 unmodified lines
574	for (i = 0; i < ldev->ports; i++) {	574	for (i = 0; i < ldev->ports; i++) {
575	for (j = 0; j < ldev->buckets; j++) {	575	for (j = 0; j < ldev->buckets; j++) {
576	idx = i * ldev->buckets + j;	576	idx = i * ldev->buckets + j;
577	if (ldev->v2p_map[i] == ports[i])	577	if (ldev->v2p_map[idx] == ports[idx])
578	continue;	578	continue;
579		579
580	dest.vport.vhca_id = MLX5_CAP_GEN(ldev->pf[ports[idx] - 1].dev,	580	dest.vport.vhca_id = MLX5_CAP_GEN(ldev->pf[ports[idx] - 1].dev,

drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c+5−0

 	clock = container_of(timer, struct mlx5_clock, timer);
 	mdev = container_of(clock, struct mlx5_core_dev, clock);
+	if (mdev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR)
+		goto out;
 	write_seqlock_irqsave(&clock->lock, flags);
 	timecounter_read(&timer->tc);
 	mlx5_update_clock_info_page(mdev);
 	write_sequnlock_irqrestore(&clock->lock, flags);
+out:
 	schedule_delayed_work(&timer->overflow_work, timer->overflow_period);
 }

drivers/net/ethernet/mellanox/mlx5/core/lib/fs_chains.c+1−1

@@ -178,7 +178,7 @@ mlx5_chains_create_table(struct mlx5_fs_chains *chains, · 177 unmodified lines
178	if (!mlx5_chains_ignore_flow_level_supported(chains) \|\|	178	if (!mlx5_chains_ignore_flow_level_supported(chains) \|\|
179	(chain == 0 && prio == 1 && level == 0)) {	179	(chain == 0 && prio == 1 && level == 0)) {
180	ft_attr.level = chains->fs_base_level;	180	ft_attr.level = chains->fs_base_level;
181	ft_attr.prio = chains->fs_base_prio;	181	ft_attr.prio = chains->fs_base_prio + prio - 1;
182	ns = (chains->ns == MLX5_FLOW_NAMESPACE_FDB) ?	182	ns = (chains->ns == MLX5_FLOW_NAMESPACE_FDB) ?
183	mlx5_get_fdb_sub_ns(chains->dev, chain) :	183	mlx5_get_fdb_sub_ns(chains->dev, chain) :
184	mlx5_get_flow_namespace(chains->dev, chains->ns);	184	mlx5_get_flow_namespace(chains->dev, chains->ns);

drivers/net/ethernet/mellanox/mlx5/core/main.c+2−1

 	if (!test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
 		mlx5_core_warn(dev, "%s: interface is down, NOP\n",
 			       __func__);
+		mlx5_devlink_params_unregister(priv_to_devlink(dev));
 		mlx5_cleanup_once(dev);
 		goto out;
 	}
 	mlx5_enter_error_state(dev, false);
 	mlx5_error_sw_reset(dev);
-	mlx5_unload_one(dev, true);
+	mlx5_unload_one(dev, false);
 	mlx5_drain_health_wq(dev);
 	mlx5_pci_disable_device(dev);

drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h+1−1

@@ -361,7 +361,7 @@ static inline bool mlx5_core_is_ec_vf_vport(const struct mlx5_core_dev *dev, u16 · 360 unmodified lines
361		361
362	static inline int mlx5_vport_to_func_id(const struct mlx5_core_dev *dev, u16 vport, bool ec_vf_func)	362	static inline int mlx5_vport_to_func_id(const struct mlx5_core_dev *dev, u16 vport, bool ec_vf_func)
363	{	363	{
364	return ec_vf_func ? vport - mlx5_core_ec_vf_vport_base(dev)	364	return ec_vf_func ? vport - mlx5_core_ec_vf_vport_base(dev) + 1
365	: vport;	365	: vport;
366	}	366	}
367		367

drivers/net/ethernet/mellanox/mlx5/core/sriov.c+1−2

@@ -285,8 +285,7 @@ static u16 mlx5_get_max_vfs(struct mlx5_core_dev *dev) · 284 unmodified lines
285	host_total_vfs = MLX5_GET(query_esw_functions_out, out,	285	host_total_vfs = MLX5_GET(query_esw_functions_out, out,
286	host_params_context.host_total_vfs);	286	host_params_context.host_total_vfs);
287	kvfree(out);	287	kvfree(out);
288	if (host_total_vfs)	288	return host_total_vfs;
289	return host_total_vfs;
290	}	289	}
291		290
292	done:	291	done:

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_action.c+1−1

@@ -2079,7 +2079,7 @@ mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn, · 2078 unmodified lines
2079		2079
2080	peer_vport = vhca_id_valid && mlx5_core_is_pf(dmn->mdev) &&	2080	peer_vport = vhca_id_valid && mlx5_core_is_pf(dmn->mdev) &&
2081	(vhca_id != dmn->info.caps.gvmi);	2081	(vhca_id != dmn->info.caps.gvmi);
2082	vport_dmn = peer_vport ? dmn->peer_dmn[vhca_id] : dmn;	2082	vport_dmn = peer_vport ? xa_load(&dmn->peer_dmn_xa, vhca_id) : dmn;
2083	if (!vport_dmn) {	2083	if (!vport_dmn) {
2084	mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");	2084	mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n");
2085	return NULL;	2085	return NULL;

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_cmd.c+3−2

 	err = mlx5_cmd_exec(mdev, in, inlen, out, sizeof(out));
 	if (err)
-		return err;
+		goto err_free_in;
 	*reformat_id = MLX5_GET(alloc_packet_reformat_context_out, out, packet_reformat_id);
-	kvfree(in);
+err_free_in:
+	kvfree(in);
 	return err;
 }

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_domain.c+13−6

 	mutex_init(&dmn->info.rx.mutex);
 	mutex_init(&dmn->info.tx.mutex);
 	xa_init(&dmn->definers_xa);
+	xa_init(&dmn->peer_dmn_xa);
 	if (dr_domain_caps_init(mdev, dmn)) {
 		mlx5dr_err(dmn, "Failed init domain, no caps\n");
 uninit_caps:
 	dr_domain_caps_uninit(dmn);
 def_xa_destroy:
+	xa_destroy(&dmn->peer_dmn_xa);
 	xa_destroy(&dmn->definers_xa);
 	kfree(dmn);
 	return NULL;
 	dr_domain_uninit_csum_recalc_fts(dmn);
 	dr_domain_uninit_resources(dmn);
 	dr_domain_caps_uninit(dmn);
+	xa_destroy(&dmn->peer_dmn_xa);
 	xa_destroy(&dmn->definers_xa);
 	mutex_destroy(&dmn->info.tx.mutex);
 	mutex_destroy(&dmn->info.rx.mutex);
 void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn,
 			    struct mlx5dr_domain *peer_dmn,
-			    u8 peer_idx)
+			    u16 peer_vhca_id)
 {
+	struct mlx5dr_domain *peer;
 	mlx5dr_domain_lock(dmn);
-	if (dmn->peer_dmn[peer_idx])
+	peer = xa_load(&dmn->peer_dmn_xa, peer_vhca_id);
-		refcount_dec(&dmn->peer_dmn[peer_idx]->refcount);
+	if (peer)
+		refcount_dec(&peer->refcount);
-	dmn->peer_dmn[peer_idx] = peer_dmn;
+	WARN_ON(xa_err(xa_store(&dmn->peer_dmn_xa, peer_vhca_id, peer_dmn, GFP_KERNEL)));
-	if (dmn->peer_dmn[peer_idx])
+	peer = xa_load(&dmn->peer_dmn_xa, peer_vhca_id);
-		refcount_inc(&dmn->peer_dmn[peer_idx]->refcount);
+	if (peer)
+		refcount_inc(&peer->refcount);
 	mlx5dr_domain_unlock(dmn);
 }

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ptrn.c+1−1

@@ -82,7 +82,7 @@ dr_ptrn_alloc_pattern(struct mlx5dr_ptrn_mgr *mgr, · 81 unmodified lines
82	u32 chunk_size;	82	u32 chunk_size;
83	u32 index;	83	u32 index;
84		84
85	chunk_size = ilog2(num_of_actions);	85	chunk_size = ilog2(roundup_pow_of_two(num_of_actions));
86	/* HW modify action index granularity is at least 64B */	86	/* HW modify action index granularity is at least 64B */
87	chunk_size = max_t(u32, chunk_size, DR_CHUNK_SIZE_8);	87	chunk_size = max_t(u32, chunk_size, DR_CHUNK_SIZE_8);
88		88

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v0.c+4−3

 	struct mlx5dr_domain *dmn = sb->dmn;
 	struct mlx5dr_domain *vport_dmn;
 	u8 *bit_mask = sb->bit_mask;
+	struct mlx5dr_domain *peer;
 	bool source_gvmi_set;
 	DR_STE_SET_TAG(src_gvmi_qp, tag, source_qp, misc, source_sqn);
 	if (sb->vhca_id_valid) {
+		peer = xa_load(&dmn->peer_dmn_xa, id);
 		/* Find port GVMI based on the eswitch_owner_vhca_id */
 		if (id == dmn->info.caps.gvmi)
 			vport_dmn = dmn;
-		else if (id < MLX5_MAX_PORTS && dmn->peer_dmn[id] &&
+		else if (peer && (id == peer->info.caps.gvmi))
-			 (id == dmn->peer_dmn[id]->info.caps.gvmi))
+			vport_dmn = peer;
-			vport_dmn = dmn->peer_dmn[id];
 		else
 			return -EINVAL;

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c+4−3

 	struct mlx5dr_domain *dmn = sb->dmn;
 	struct mlx5dr_domain *vport_dmn;
 	u8 *bit_mask = sb->bit_mask;
+	struct mlx5dr_domain *peer;
 	DR_STE_SET_TAG(src_gvmi_qp_v1, tag, source_qp, misc, source_sqn);
 	if (sb->vhca_id_valid) {
+		peer = xa_load(&dmn->peer_dmn_xa, id);
 		/* Find port GVMI based on the eswitch_owner_vhca_id */
 		if (id == dmn->info.caps.gvmi)
 			vport_dmn = dmn;
-		else if (id < MLX5_MAX_PORTS && dmn->peer_dmn[id] &&
+		else if (peer && (id == peer->info.caps.gvmi))
-			 (id == dmn->peer_dmn[id]->info.caps.gvmi))
+			vport_dmn = peer;
-			vport_dmn = dmn->peer_dmn[id];
 		else
 			return -EINVAL;

drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h+1−1

 };
 struct mlx5dr_domain {
-	struct mlx5dr_domain *peer_dmn[MLX5_MAX_PORTS];
 	struct mlx5_core_dev *mdev;
 	u32 pdn;
 	struct mlx5_uars_page *uar;
 	struct list_head dbg_tbl_list;
 	struct mlx5dr_dbg_dump_info dump_info;
 	struct xarray definers_xa;
+	struct xarray peer_dmn_xa;
 	/* memory management statistics */
 	u32 num_buddies[DR_ICM_TYPE_MAX];
 };

drivers/net/ethernet/mellanox/mlx5/core/steering/fs_dr.c+2−2

@@ -781,14 +781,14 @@ restore_fte: · 780 unmodified lines
781		781
782	static int mlx5_cmd_dr_set_peer(struct mlx5_flow_root_namespace *ns,	782	static int mlx5_cmd_dr_set_peer(struct mlx5_flow_root_namespace *ns,
783	struct mlx5_flow_root_namespace *peer_ns,	783	struct mlx5_flow_root_namespace *peer_ns,
784	u8 peer_idx)	784	u16 peer_vhca_id)
785	{	785	{
786	struct mlx5dr_domain *peer_domain = NULL;	786	struct mlx5dr_domain *peer_domain = NULL;
787		787
788	if (peer_ns)	788	if (peer_ns)
789	peer_domain = peer_ns->fs_dr_domain.dr_domain;	789	peer_domain = peer_ns->fs_dr_domain.dr_domain;
790	mlx5dr_domain_set_peer(ns->fs_dr_domain.dr_domain,	790	mlx5dr_domain_set_peer(ns->fs_dr_domain.dr_domain,
791	peer_domain, peer_idx);	791	peer_domain, peer_vhca_id);
792	return 0;	792	return 0;
793	}	793	}
794		794

drivers/net/ethernet/mellanox/mlx5/core/steering/mlx5dr.h+1−1

@@ -49,7 +49,7 @@ int mlx5dr_domain_sync(struct mlx5dr_domain *domain, u32 flags); · 48 unmodified lines
49		49
50	void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn,	50	void mlx5dr_domain_set_peer(struct mlx5dr_domain *dmn,
51	struct mlx5dr_domain *peer_dmn,	51	struct mlx5dr_domain *peer_dmn,
52	u8 peer_idx);	52	u16 peer_vhca_id);
53		53
54	struct mlx5dr_table *	54	struct mlx5dr_table *
55	mlx5dr_table_create(struct mlx5dr_domain *domain, u32 level, u32 flags,	55	mlx5dr_table_create(struct mlx5dr_domain *domain, u32 level, u32 flags,

drivers/net/ethernet/microsoft/mana/mana_en.c+33−4

@@ -8,6 +8,7 @@ · 7 unmodified lines
8	#include <linux/ethtool.h>	8	#include <linux/ethtool.h>
9	#include <linux/filter.h>	9	#include <linux/filter.h>
10	#include <linux/mm.h>	10	#include <linux/mm.h>
		11	#include <linux/pci.h>
11		12
12	#include <net/checksum.h>	13	#include <net/checksum.h>
13	#include <net/ip6_checksum.h>	14	#include <net/ip6_checksum.h>
@@ -2345,9 +2346,12 @@ int mana_attach(struct net_device *ndev) · 2331 unmodified lines
2345	static int mana_dealloc_queues(struct net_device *ndev)	2346	static int mana_dealloc_queues(struct net_device *ndev)
2346	{	2347	{
2347	struct mana_port_context *apc = netdev_priv(ndev);	2348	struct mana_port_context *apc = netdev_priv(ndev);
		2349	unsigned long timeout = jiffies + 120 * HZ;
2348	struct gdma_dev *gd = apc->ac->gdma_dev;	2350	struct gdma_dev *gd = apc->ac->gdma_dev;
2349	struct mana_txq *txq;	2351	struct mana_txq *txq;
		2352	struct sk_buff *skb;
2350	int i, err;	2353	int i, err;
		2354	u32 tsleep;
2351		2355
2352	if (apc->port_is_up)	2356	if (apc->port_is_up)
2353	return -EINVAL;	2357	return -EINVAL;
@@ -2363,15 +2367,40 @@ static int mana_dealloc_queues(struct net_device *ndev) · 9 unmodified lines
2363	* to false, but it doesn't matter since mana_start_xmit() drops any	2367	* to false, but it doesn't matter since mana_start_xmit() drops any
2364	* new packets due to apc->port_is_up being false.	2368	* new packets due to apc->port_is_up being false.
2365	*	2369	*
2366	* Drain all the in-flight TX packets	2370	* Drain all the in-flight TX packets.
		2371	* A timeout of 120 seconds for all the queues is used.
		2372	* This will break the while loop when h/w is not responding.
		2373	* This value of 120 has been decided here considering max
		2374	* number of queues.
2367	*/	2375	*/
		2376
2368	for (i = 0; i < apc->num_queues; i++) {	2377	for (i = 0; i < apc->num_queues; i++) {
2369	txq = &apc->tx_qp[i].txq;	2378	txq = &apc->tx_qp[i].txq;
2370		2379	tsleep = 1000;
2371	while (atomic_read(&txq->pending_sends) > 0)	2380	while (atomic_read(&txq->pending_sends) > 0 &&
2372	usleep_range(1000, 2000);	2381	time_before(jiffies, timeout)) {
		2382	usleep_range(tsleep, tsleep + 1000);
		2383	tsleep <<= 1;
		2384	}
		2385	if (atomic_read(&txq->pending_sends)) {
		2386	err = pcie_flr(to_pci_dev(gd->gdma_context->dev));
		2387	if (err) {
		2388	netdev_err(ndev, "flr failed %d with %d pkts pending in txq %u\n",
		2389	err, atomic_read(&txq->pending_sends),
		2390	txq->gdma_txq_id);
		2391	}
		2392	break;
		2393	}
2373	}	2394	}
2374		2395
		2396	for (i = 0; i < apc->num_queues; i++) {
		2397	txq = &apc->tx_qp[i].txq;
		2398	while ((skb = skb_dequeue(&txq->pending_skbs))) {
		2399	mana_unmap_skb(skb, apc);
		2400	dev_kfree_skb_any(skb);
		2401	}
		2402	atomic_set(&txq->pending_sends, 0);
		2403	}
2375	/* We're 100% sure the queues can no longer be woken up, because	2404	/* We're 100% sure the queues can no longer be woken up, because
2376	* we're sure now mana_poll_tx_cq() can't be running.	2405	* we're sure now mana_poll_tx_cq() can't be running.
2377	*/	2406	*/

drivers/net/ethernet/pensando/ionic/ionic_lif.c+16−7

 static void ionic_tx_timeout_work(struct work_struct *ws)
 {
 	struct ionic_lif *lif = container_of(ws, struct ionic_lif, tx_timeout_work);
+	int err;
 	if (test_bit(IONIC_LIF_F_FW_RESET, lif->state))
 		return;
 	mutex_lock(&lif->queue_lock);
 	ionic_stop_queues_reconfig(lif);
-	ionic_start_queues_reconfig(lif);
+	err = ionic_start_queues_reconfig(lif);
 	mutex_unlock(&lif->queue_lock);
+	if (err)
+		dev_err(lif->ionic->dev, "%s: Restarting queues failed\n", __func__);
 }
 static void ionic_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 			if (err) {
 				dev_err(lif->ionic->dev,
 					"CMB restore failed: %d\n", err);
-				goto errout;
+				goto err_out;
 			}
 		}
-		ionic_start_queues_reconfig(lif);
+		err = ionic_start_queues_reconfig(lif);
-	} else {
+		if (err) {
-		/* This was detached in ionic_stop_queues_reconfig() */
+			dev_err(lif->ionic->dev,
-		netif_device_attach(lif->netdev);
+				"CMB reconfig failed: %d\n", err);
+			goto err_out;
+		}
 	}
-errout:
+err_out:
+	/* This was detached in ionic_stop_queues_reconfig() */
+	netif_device_attach(lif->netdev);
 	return err;
 }

drivers/net/ethernet/qlogic/qed/qed_dev_api.h+16−0

@@ -193,6 +193,22 @@ void qed_hw_remove(struct qed_dev *cdev); · 192 unmodified lines
193	*/	193	*/
194	struct qed_ptt qed_ptt_acquire(struct qed_hwfn p_hwfn);	194	struct qed_ptt qed_ptt_acquire(struct qed_hwfn p_hwfn);
195		195
		196	/**
		197	* qed_ptt_acquire_context(): Allocate a PTT window honoring the context
		198	* atomicy.
		199	*
		200	* @p_hwfn: HW device data.
		201	* @is_atomic: Hint from the caller - if the func can sleep or not.
		202	*
		203	* Context: The function should not sleep in case is_atomic == true.
		204	* Return: struct qed_ptt.
		205	*
		206	* Should be called at the entry point to the driver
		207	* (at the beginning of an exported function).
		208	*/
		209	struct qed_ptt qed_ptt_acquire_context(struct qed_hwfn p_hwfn,
		210	bool is_atomic);
		211
196	/**	212	/**
197	* qed_ptt_release(): Release PTT Window.	213	* qed_ptt_release(): Release PTT Window.
198	*	214	*

drivers/net/ethernet/qlogic/qed/qed_fcoe.c+14−5

 }
 static int qed_fcoe_get_stats(struct qed_hwfn *p_hwfn,
-			      struct qed_fcoe_stats *p_stats)
+			      struct qed_fcoe_stats *p_stats,
+			      bool is_atomic)
 {
 	struct qed_ptt *p_ptt;
 	memset(p_stats, 0, sizeof(*p_stats));
-	p_ptt = qed_ptt_acquire(p_hwfn);
+	p_ptt = qed_ptt_acquire_context(p_hwfn, is_atomic);
 	if (!p_ptt) {
 		DP_ERR(p_hwfn, "Failed to acquire ptt\n");
 					QED_SPQ_MODE_EBLOCK, NULL);
 }
+static int qed_fcoe_stats_context(struct qed_dev *cdev,
+				  struct qed_fcoe_stats *stats,
+				  bool is_atomic)
+{
+	return qed_fcoe_get_stats(QED_AFFIN_HWFN(cdev), stats, is_atomic);
+}
 static int qed_fcoe_stats(struct qed_dev *cdev, struct qed_fcoe_stats *stats)
 {
-	return qed_fcoe_get_stats(QED_AFFIN_HWFN(cdev), stats);
+	return qed_fcoe_stats_context(cdev, stats, false);
 }
 void qed_get_protocol_stats_fcoe(struct qed_dev *cdev,
-				 struct qed_mcp_fcoe_stats *stats)
+				 struct qed_mcp_fcoe_stats *stats,
+				 bool is_atomic)
 {
 	struct qed_fcoe_stats proto_stats;
 	/* Retrieve FW statistics */
 	memset(&proto_stats, 0, sizeof(proto_stats));
-	if (qed_fcoe_stats(cdev, &proto_stats)) {
+	if (qed_fcoe_stats_context(cdev, &proto_stats, is_atomic)) {
 		DP_VERBOSE(cdev, QED_MSG_STORAGE,
 			   "Failed to collect FCoE statistics\n");
 		return;

drivers/net/ethernet/qlogic/qed/qed_fcoe.h+15−2

 void qed_fcoe_setup(struct qed_hwfn *p_hwfn);
 void qed_fcoe_free(struct qed_hwfn *p_hwfn);
+/**
+ * qed_get_protocol_stats_fcoe(): Fills provided statistics
+ *				  struct with statistics.
+ *
+ * @cdev: Qed dev pointer.
+ * @stats: Points to struct that will be filled with statistics.
+ * @is_atomic: Hint from the caller - if the func can sleep or not.
+ *
+ * Context: The function should not sleep in case is_atomic == true.
+ * Return: Void.
+ */
 void qed_get_protocol_stats_fcoe(struct qed_dev *cdev,
-				 struct qed_mcp_fcoe_stats *stats);
+				 struct qed_mcp_fcoe_stats *stats,
+				 bool is_atomic);
 #else /* CONFIG_QED_FCOE */
 static inline int qed_fcoe_alloc(struct qed_hwfn *p_hwfn)
 {
 static inline void qed_fcoe_free(struct qed_hwfn *p_hwfn) {}
 static inline void qed_get_protocol_stats_fcoe(struct qed_dev *cdev,
-					       struct qed_mcp_fcoe_stats *stats)
+					       struct qed_mcp_fcoe_stats *stats,
+					       bool is_atomic)
 {
 }
 #endif /* CONFIG_QED_FCOE */

drivers/net/ethernet/qlogic/qed/qed_hw.c+22−4

@@ -23,7 +23,10 @@ · 22 unmodified lines
23	#include "qed_reg_addr.h"	23	#include "qed_reg_addr.h"
24	#include "qed_sriov.h"	24	#include "qed_sriov.h"
25		25
26	#define QED_BAR_ACQUIRE_TIMEOUT 1000	26	#define QED_BAR_ACQUIRE_TIMEOUT_USLEEP_CNT 1000
		27	#define QED_BAR_ACQUIRE_TIMEOUT_USLEEP 1000
		28	#define QED_BAR_ACQUIRE_TIMEOUT_UDELAY_CNT 100000
		29	#define QED_BAR_ACQUIRE_TIMEOUT_UDELAY 10
27		30
28	/* Invalid values */	31	/* Invalid values */
29	#define QED_BAR_INVALID_OFFSET (cpu_to_le32(-1))	32	#define QED_BAR_INVALID_OFFSET (cpu_to_le32(-1))
@@ -84,12 +87,22 @@ void qed_ptt_pool_free(struct qed_hwfn *p_hwfn) · 54 unmodified lines
84	}	87	}
85		88
86	struct qed_ptt qed_ptt_acquire(struct qed_hwfn p_hwfn)	89	struct qed_ptt qed_ptt_acquire(struct qed_hwfn p_hwfn)
		90	{
		91	return qed_ptt_acquire_context(p_hwfn, false);
		92	}
		93
		94	struct qed_ptt qed_ptt_acquire_context(struct qed_hwfn p_hwfn, bool is_atomic)
87	{	95	{
88	struct qed_ptt *p_ptt;	96	struct qed_ptt *p_ptt;
89	unsigned int i;	97	unsigned int i, count;
		98
		99	if (is_atomic)
		100	count = QED_BAR_ACQUIRE_TIMEOUT_UDELAY_CNT;
		101	else
		102	count = QED_BAR_ACQUIRE_TIMEOUT_USLEEP_CNT;
90		103
91	/* Take the free PTT from the list */	104	/* Take the free PTT from the list */
92	for (i = 0; i < QED_BAR_ACQUIRE_TIMEOUT; i++) {	105	for (i = 0; i < count; i++) {
93	spin_lock_bh(&p_hwfn->p_ptt_pool->lock);	106	spin_lock_bh(&p_hwfn->p_ptt_pool->lock);
94		107
95	if (!list_empty(&p_hwfn->p_ptt_pool->free_list)) {	108	if (!list_empty(&p_hwfn->p_ptt_pool->free_list)) {
@@ -105,7 +118,12 @@ struct qed_ptt qed_ptt_acquire(struct qed_hwfn p_hwfn) · 9 unmodified lines
105	}	118	}
106		119
107	spin_unlock_bh(&p_hwfn->p_ptt_pool->lock);	120	spin_unlock_bh(&p_hwfn->p_ptt_pool->lock);
108	usleep_range(1000, 2000);	121
		122	if (is_atomic)
		123	udelay(QED_BAR_ACQUIRE_TIMEOUT_UDELAY);
		124	else
		125	usleep_range(QED_BAR_ACQUIRE_TIMEOUT_USLEEP,
		126	QED_BAR_ACQUIRE_TIMEOUT_USLEEP * 2);
109	}	127	}
110		128
111	DP_NOTICE(p_hwfn, "PTT acquire timeout - failed to allocate PTT\n");	129	DP_NOTICE(p_hwfn, "PTT acquire timeout - failed to allocate PTT\n");

drivers/net/ethernet/qlogic/qed/qed_iscsi.c+14−5

 }
 static int qed_iscsi_get_stats(struct qed_hwfn *p_hwfn,
-			       struct qed_iscsi_stats *stats)
+			       struct qed_iscsi_stats *stats,
+			       bool is_atomic)
 {
 	struct qed_ptt *p_ptt;
 	memset(stats, 0, sizeof(*stats));
-	p_ptt = qed_ptt_acquire(p_hwfn);
+	p_ptt = qed_ptt_acquire_context(p_hwfn, is_atomic);
 	if (!p_ptt) {
 		DP_ERR(p_hwfn, "Failed to acquire ptt\n");
 		return -EAGAIN;
 					   QED_SPQ_MODE_EBLOCK, NULL);
 }
+static int qed_iscsi_stats_context(struct qed_dev *cdev,
+				   struct qed_iscsi_stats *stats,
+				   bool is_atomic)
+{
+	return qed_iscsi_get_stats(QED_AFFIN_HWFN(cdev), stats, is_atomic);
+}
 static int qed_iscsi_stats(struct qed_dev *cdev, struct qed_iscsi_stats *stats)
 {
-	return qed_iscsi_get_stats(QED_AFFIN_HWFN(cdev), stats);
+	return qed_iscsi_stats_context(cdev, stats, false);
 }
 static int qed_iscsi_change_mac(struct qed_dev *cdev,
 }
 void qed_get_protocol_stats_iscsi(struct qed_dev *cdev,
-				  struct qed_mcp_iscsi_stats *stats)
+				  struct qed_mcp_iscsi_stats *stats,
+				  bool is_atomic)
 {
 	struct qed_iscsi_stats proto_stats;
 	/* Retrieve FW statistics */
 	memset(&proto_stats, 0, sizeof(proto_stats));
-	if (qed_iscsi_stats(cdev, &proto_stats)) {
+	if (qed_iscsi_stats_context(cdev, &proto_stats, is_atomic)) {
 		DP_VERBOSE(cdev, QED_MSG_STORAGE,
 			   "Failed to collect ISCSI statistics\n");
 		return;

drivers/net/ethernet/qlogic/qed/qed_iscsi.h+6−2

  *
  * @cdev: Qed dev pointer.
  * @stats: Points to struct that will be filled with statistics.
+ * @is_atomic: Hint from the caller - if the func can sleep or not.
  *
+ * Context: The function should not sleep in case is_atomic == true.
  * Return: Void.
  */
 void qed_get_protocol_stats_iscsi(struct qed_dev *cdev,
-				  struct qed_mcp_iscsi_stats *stats);
+				  struct qed_mcp_iscsi_stats *stats,
+				  bool is_atomic);
 #else /* IS_ENABLED(CONFIG_QED_ISCSI) */
 static inline int qed_iscsi_alloc(struct qed_hwfn *p_hwfn)
 {
 static inline void
 qed_get_protocol_stats_iscsi(struct qed_dev *cdev,
-			     struct qed_mcp_iscsi_stats *stats) {}
+			     struct qed_mcp_iscsi_stats *stats,
+			     bool is_atomic) {}
 #endif /* IS_ENABLED(CONFIG_QED_ISCSI) */
 #endif

drivers/net/ethernet/qlogic/qed/qed_l2.c+14−5

 }
 static void _qed_get_vport_stats(struct qed_dev *cdev,
-				 struct qed_eth_stats *stats)
+				 struct qed_eth_stats *stats,
+				 bool is_atomic)
 {
 	u8 fw_vport = 0;
 	int i;
 	for_each_hwfn(cdev, i) {
 		struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
-		struct qed_ptt *p_ptt = IS_PF(cdev) ? qed_ptt_acquire(p_hwfn)
+		struct qed_ptt *p_ptt;
-						    :  NULL;
 		bool b_get_port_stats;
+		p_ptt = IS_PF(cdev) ? qed_ptt_acquire_context(p_hwfn, is_atomic)
+				    : NULL;
 		if (IS_PF(cdev)) {
 			/* The main vport index is relative first */
 			if (qed_fw_vport(p_hwfn, 0, &fw_vport)) {
 }
 void qed_get_vport_stats(struct qed_dev *cdev, struct qed_eth_stats *stats)
+{
+	qed_get_vport_stats_context(cdev, stats, false);
+}
+void qed_get_vport_stats_context(struct qed_dev *cdev,
+				 struct qed_eth_stats *stats,
+				 bool is_atomic)
 {
 	u32 i;
 		return;
 	}
-	_qed_get_vport_stats(cdev, stats);
+	_qed_get_vport_stats(cdev, stats, is_atomic);
 	if (!cdev->reset_stats)
 		return;
 	if (!cdev->reset_stats) {
 		DP_INFO(cdev, "Reset stats not allocated\n");
 	} else {
-		_qed_get_vport_stats(cdev, cdev->reset_stats);
+		_qed_get_vport_stats(cdev, cdev->reset_stats, false);
 		cdev->reset_stats->common.link_change_count = 0;
 	}
 }

drivers/net/ethernet/qlogic/qed/qed_l2.h+24−0

@@ -249,8 +249,32 @@ qed_sp_eth_rx_queues_update(struct qed_hwfn *p_hwfn, · 248 unmodified lines
249	enum spq_mode comp_mode,	249	enum spq_mode comp_mode,
250	struct qed_spq_comp_cb *p_comp_data);	250	struct qed_spq_comp_cb *p_comp_data);
251		251
		252	/**
		253	* qed_get_vport_stats(): Fills provided statistics
		254	* struct with statistics.
		255	*
		256	* @cdev: Qed dev pointer.
		257	* @stats: Points to struct that will be filled with statistics.
		258	*
		259	* Return: Void.
		260	*/
252	void qed_get_vport_stats(struct qed_dev cdev, struct qed_eth_stats stats);	261	void qed_get_vport_stats(struct qed_dev cdev, struct qed_eth_stats stats);
253		262
		263	/**
		264	* qed_get_vport_stats_context(): Fills provided statistics
		265	* struct with statistics.
		266	*
		267	* @cdev: Qed dev pointer.
		268	* @stats: Points to struct that will be filled with statistics.
		269	* @is_atomic: Hint from the caller - if the func can sleep or not.
		270	*
		271	* Context: The function should not sleep in case is_atomic == true.
		272	* Return: Void.
		273	*/
		274	void qed_get_vport_stats_context(struct qed_dev *cdev,
		275	struct qed_eth_stats *stats,
		276	bool is_atomic);
		277
254	void qed_reset_vport_stats(struct qed_dev *cdev);	278	void qed_reset_vport_stats(struct qed_dev *cdev);
255		279
256	/**	280	/**

drivers/net/ethernet/qlogic/qed/qed_main.c+3−3

@@ -3092,7 +3092,7 @@ void qed_get_protocol_stats(struct qed_dev *cdev, · 3091 unmodified lines
3092		3092
3093	switch (type) {	3093	switch (type) {
3094	case QED_MCP_LAN_STATS:	3094	case QED_MCP_LAN_STATS:
3095	qed_get_vport_stats(cdev, &eth_stats);	3095	qed_get_vport_stats_context(cdev, &eth_stats, true);
3096	stats->lan_stats.ucast_rx_pkts =	3096	stats->lan_stats.ucast_rx_pkts =
3097	eth_stats.common.rx_ucast_pkts;	3097	eth_stats.common.rx_ucast_pkts;
3098	stats->lan_stats.ucast_tx_pkts =	3098	stats->lan_stats.ucast_tx_pkts =
@@ -3100,10 +3100,10 @@ void qed_get_protocol_stats(struct qed_dev *cdev, · 1 unmodified line
3100	stats->lan_stats.fcs_err = -1;	3100	stats->lan_stats.fcs_err = -1;
3101	break;	3101	break;
3102	case QED_MCP_FCOE_STATS:	3102	case QED_MCP_FCOE_STATS:
3103	qed_get_protocol_stats_fcoe(cdev, &stats->fcoe_stats);	3103	qed_get_protocol_stats_fcoe(cdev, &stats->fcoe_stats, true);
3104	break;	3104	break;
3105	case QED_MCP_ISCSI_STATS:	3105	case QED_MCP_ISCSI_STATS:
3106	qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats);	3106	qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats, true);
3107	break;	3107	break;
3108	default:	3108	default:
3109	DP_VERBOSE(cdev, QED_MSG_SP,	3109	DP_VERBOSE(cdev, QED_MSG_SP,

drivers/net/ethernet/sfc/falcon/selftest.c+13−10

  */
 struct ef4_loopback_payload {
 	char pad[2]; /* Ensures ip is 4-byte aligned */
-	struct ethhdr header;
+	struct_group_attr(packet, __packed,
-	struct iphdr ip;
+		struct ethhdr header;
-	struct udphdr udp;
+		struct iphdr ip;
-	__be16 iteration;
+		struct udphdr udp;
-	char msg[64];
+		__be16 iteration;
+		char msg[64];
+	);
 } __packed __aligned(4);
-#define EF4_LOOPBACK_PAYLOAD_LEN	(sizeof(struct ef4_loopback_payload) - \
+#define EF4_LOOPBACK_PAYLOAD_LEN	\
-					 offsetof(struct ef4_loopback_payload, \
+		sizeof_field(struct ef4_loopback_payload, packet)
-						  header))
 /* Loopback test source MAC address */
 static const u8 payload_source[ETH_ALEN] __aligned(2) = {
 	payload = &state->payload;
-	memcpy(&received.header, buf_ptr,
+	memcpy(&received.packet, buf_ptr,
 	       min_t(int, pkt_len, EF4_LOOPBACK_PAYLOAD_LEN));
 	received.ip.saddr = payload->ip.saddr;
 	if (state->offload_csum)
 			       buf_ptr, pkt_len, 0);
 		netif_err(efx, drv, efx->net_dev, "expected packet:\n");
 		print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1,
-			       &state->payload.header, EF4_LOOPBACK_PAYLOAD_LEN,
+			       &state->payload.packet, EF4_LOOPBACK_PAYLOAD_LEN,
 			       0);
 	}
 #endif
 		payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2));
 		/* Strip off the leading padding */
 		skb_pull(skb, offsetof(struct ef4_loopback_payload, header));
+		/* Strip off the trailing padding */
+		skb_trim(skb, EF4_LOOPBACK_PAYLOAD_LEN);
 		/* Ensure everything we've written is visible to the
 		 * interrupt handler. */

drivers/net/ethernet/sfc/selftest.c+13−10

  */
 struct efx_loopback_payload {
 	char pad[2]; /* Ensures ip is 4-byte aligned */
-	struct ethhdr header;
+	struct_group_attr(packet, __packed,
-	struct iphdr ip;
+		struct ethhdr header;
-	struct udphdr udp;
+		struct iphdr ip;
-	__be16 iteration;
+		struct udphdr udp;
-	char msg[64];
+		__be16 iteration;
+		char msg[64];
+	);
 } __packed __aligned(4);
-#define EFX_LOOPBACK_PAYLOAD_LEN	(sizeof(struct efx_loopback_payload) - \
+#define EFX_LOOPBACK_PAYLOAD_LEN	\
-					 offsetof(struct efx_loopback_payload, \
+		sizeof_field(struct efx_loopback_payload, packet)
-						  header))
 /* Loopback test source MAC address */
 static const u8 payload_source[ETH_ALEN] __aligned(2) = {
 	payload = &state->payload;
-	memcpy(&received.header, buf_ptr,
+	memcpy(&received.packet, buf_ptr,
 	       min_t(int, pkt_len, EFX_LOOPBACK_PAYLOAD_LEN));
 	received.ip.saddr = payload->ip.saddr;
 	if (state->offload_csum)
 			       buf_ptr, pkt_len, 0);
 		netif_err(efx, drv, efx->net_dev, "expected packet:\n");
 		print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1,
-			       &state->payload.header, EFX_LOOPBACK_PAYLOAD_LEN,
+			       &state->payload.packet, EFX_LOOPBACK_PAYLOAD_LEN,
 			       0);
 	}
 #endif
 		payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2));
 		/* Strip off the leading padding */
 		skb_pull(skb, offsetof(struct efx_loopback_payload, header));
+		/* Strip off the trailing padding */
+		skb_trim(skb, EFX_LOOPBACK_PAYLOAD_LEN);
 		/* Ensure everything we've written is visible to the
 		 * interrupt handler. */

drivers/net/ethernet/sfc/siena/selftest.c+13−10

  */
 struct efx_loopback_payload {
 	char pad[2]; /* Ensures ip is 4-byte aligned */
-	struct ethhdr header;
+	struct_group_attr(packet, __packed,
-	struct iphdr ip;
+		struct ethhdr header;
-	struct udphdr udp;
+		struct iphdr ip;
-	__be16 iteration;
+		struct udphdr udp;
-	char msg[64];
+		__be16 iteration;
+		char msg[64];
+	);
 } __packed __aligned(4);
-#define EFX_LOOPBACK_PAYLOAD_LEN	(sizeof(struct efx_loopback_payload) - \
+#define EFX_LOOPBACK_PAYLOAD_LEN	\
-					 offsetof(struct efx_loopback_payload, \
+		sizeof_field(struct efx_loopback_payload, packet)
-						  header))
 /* Loopback test source MAC address */
 static const u8 payload_source[ETH_ALEN] __aligned(2) = {
 	payload = &state->payload;
-	memcpy(&received.header, buf_ptr,
+	memcpy(&received.packet, buf_ptr,
 	       min_t(int, pkt_len, EFX_LOOPBACK_PAYLOAD_LEN));
 	received.ip.saddr = payload->ip.saddr;
 	if (state->offload_csum)
 			       buf_ptr, pkt_len, 0);
 		netif_err(efx, drv, efx->net_dev, "expected packet:\n");
 		print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 0x10, 1,
-			       &state->payload.header, EFX_LOOPBACK_PAYLOAD_LEN,
+			       &state->payload.packet, EFX_LOOPBACK_PAYLOAD_LEN,
 			       0);
 	}
 #endif
 		payload->ip.saddr = htonl(INADDR_LOOPBACK | (i << 2));
 		/* Strip off the leading padding */
 		skb_pull(skb, offsetof(struct efx_loopback_payload, header));
+		/* Strip off the trailing padding */
+		skb_trim(skb, EFX_LOOPBACK_PAYLOAD_LEN);
 		/* Ensure everything we've written is visible to the
 		 * interrupt handler. */

drivers/net/ethernet/socionext/netsec.c+11−0

@@ -1851,6 +1851,17 @@ static int netsec_of_probe(struct platform_device *pdev, · 1850 unmodified lines
1851	return err;	1851	return err;
1852	}	1852	}
1853		1853
		1854	/*
		1855	* SynQuacer is physically configured with TX and RX delays
		1856	* but the standard firmware claimed otherwise for a long
		1857	* time, ignore it.
		1858	*/
		1859	if (of_machine_is_compatible("socionext,developer-box") &&
		1860	priv->phy_interface != PHY_INTERFACE_MODE_RGMII_ID) {
		1861	dev_warn(&pdev->dev, "Outdated firmware reports incorrect PHY mode, overriding\n");
		1862	priv->phy_interface = PHY_INTERFACE_MODE_RGMII_ID;
		1863	}
		1864
1854	priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);	1865	priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
1855	if (!priv->phy_np) {	1866	if (!priv->phy_np) {
1856	dev_err(&pdev->dev, "missing required property 'phy-handle'\n");	1867	dev_err(&pdev->dev, "missing required property 'phy-handle'\n");

drivers/net/ethernet/stmicro/stmmac/dwmac-tegra.c+2−1

@@ -234,7 +234,8 @@ static int tegra_mgbe_probe(struct platform_device *pdev) · 233 unmodified lines
234	res.addr = mgbe->regs;	234	res.addr = mgbe->regs;
235	res.irq = irq;	235	res.irq = irq;
236		236
237	mgbe->clks = devm_kzalloc(&pdev->dev, sizeof(*mgbe->clks), GFP_KERNEL);	237	mgbe->clks = devm_kcalloc(&pdev->dev, ARRAY_SIZE(mgbe_clks),
		238	sizeof(*mgbe->clks), GFP_KERNEL);
238	if (!mgbe->clks)	239	if (!mgbe->clks)
239	return -ENOMEM;	240	return -ENOMEM;
240		241

drivers/net/ethernet/xilinx/ll_temac_main.c+8−4

 	}
 	/* Error handle returned DMA RX and TX interrupts */
-	if (lp->rx_irq < 0)
+	if (lp->rx_irq <= 0) {
-		return dev_err_probe(&pdev->dev, lp->rx_irq,
+		rc = lp->rx_irq ?: -EINVAL;
+		return dev_err_probe(&pdev->dev, rc,
 				     "could not get DMA RX irq\n");
-	if (lp->tx_irq < 0)
+	}
-		return dev_err_probe(&pdev->dev, lp->tx_irq,
+	if (lp->tx_irq <= 0) {
+		rc = lp->tx_irq ?: -EINVAL;
+		return dev_err_probe(&pdev->dev, rc,
 				     "could not get DMA TX irq\n");
+	}
 	if (temac_np) {
 		/* Retrieve the MAC address */

drivers/net/macsec.c+14−14

@@ -743,7 +743,7 @@ static bool macsec_post_decrypt(struct sk_buff skb, struct macsec_secy secy, u · 742 unmodified lines
743	u64_stats_update_begin(&rxsc_stats->syncp);	743	u64_stats_update_begin(&rxsc_stats->syncp);
744	rxsc_stats->stats.InPktsLate++;	744	rxsc_stats->stats.InPktsLate++;
745	u64_stats_update_end(&rxsc_stats->syncp);	745	u64_stats_update_end(&rxsc_stats->syncp);
746	secy->netdev->stats.rx_dropped++;	746	DEV_STATS_INC(secy->netdev, rx_dropped);
747	return false;	747	return false;
748	}	748	}
749		749
@@ -767,7 +767,7 @@ static bool macsec_post_decrypt(struct sk_buff skb, struct macsec_secy secy, u · 17 unmodified lines
767	rxsc_stats->stats.InPktsNotValid++;	767	rxsc_stats->stats.InPktsNotValid++;
768	u64_stats_update_end(&rxsc_stats->syncp);	768	u64_stats_update_end(&rxsc_stats->syncp);
769	this_cpu_inc(rx_sa->stats->InPktsNotValid);	769	this_cpu_inc(rx_sa->stats->InPktsNotValid);
770	secy->netdev->stats.rx_errors++;	770	DEV_STATS_INC(secy->netdev, rx_errors);
771	return false;	771	return false;
772	}	772	}
773		773
@@ -1069,7 +1069,7 @@ static enum rx_handler_result handle_not_macsec(struct sk_buff *skb) · 295 unmodified lines
1069	u64_stats_update_begin(&secy_stats->syncp);	1069	u64_stats_update_begin(&secy_stats->syncp);
1070	secy_stats->stats.InPktsNoTag++;	1070	secy_stats->stats.InPktsNoTag++;
1071	u64_stats_update_end(&secy_stats->syncp);	1071	u64_stats_update_end(&secy_stats->syncp);
1072	macsec->secy.netdev->stats.rx_dropped++;	1072	DEV_STATS_INC(macsec->secy.netdev, rx_dropped);
1073	continue;	1073	continue;
1074	}	1074	}
1075		1075
@@ -1179,7 +1179,7 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb) · 103 unmodified lines
1179	u64_stats_update_begin(&secy_stats->syncp);	1179	u64_stats_update_begin(&secy_stats->syncp);
1180	secy_stats->stats.InPktsBadTag++;	1180	secy_stats->stats.InPktsBadTag++;
1181	u64_stats_update_end(&secy_stats->syncp);	1181	u64_stats_update_end(&secy_stats->syncp);
1182	secy->netdev->stats.rx_errors++;	1182	DEV_STATS_INC(secy->netdev, rx_errors);
1183	goto drop_nosa;	1183	goto drop_nosa;
1184	}	1184	}
1185		1185
@@ -1196,7 +1196,7 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb) · 10 unmodified lines
1196	u64_stats_update_begin(&rxsc_stats->syncp);	1196	u64_stats_update_begin(&rxsc_stats->syncp);
1197	rxsc_stats->stats.InPktsNotUsingSA++;	1197	rxsc_stats->stats.InPktsNotUsingSA++;
1198	u64_stats_update_end(&rxsc_stats->syncp);	1198	u64_stats_update_end(&rxsc_stats->syncp);
1199	secy->netdev->stats.rx_errors++;	1199	DEV_STATS_INC(secy->netdev, rx_errors);
1200	if (active_rx_sa)	1200	if (active_rx_sa)
1201	this_cpu_inc(active_rx_sa->stats->InPktsNotUsingSA);	1201	this_cpu_inc(active_rx_sa->stats->InPktsNotUsingSA);
1202	goto drop_nosa;	1202	goto drop_nosa;
@@ -1230,7 +1230,7 @@ static rx_handler_result_t macsec_handle_frame(struct sk_buff **pskb) · 27 unmodified lines
1230	u64_stats_update_begin(&rxsc_stats->syncp);	1230	u64_stats_update_begin(&rxsc_stats->syncp);
1231	rxsc_stats->stats.InPktsLate++;	1231	rxsc_stats->stats.InPktsLate++;
1232	u64_stats_update_end(&rxsc_stats->syncp);	1232	u64_stats_update_end(&rxsc_stats->syncp);
1233	macsec->secy.netdev->stats.rx_dropped++;	1233	DEV_STATS_INC(macsec->secy.netdev, rx_dropped);
1234	goto drop;	1234	goto drop;
1235	}	1235	}
1236	}	1236	}
@@ -1271,7 +1271,7 @@ deliver: · 34 unmodified lines
1271	if (ret == NET_RX_SUCCESS)	1271	if (ret == NET_RX_SUCCESS)
1272	count_rx(dev, len);	1272	count_rx(dev, len);
1273	else	1273	else
1274	macsec->secy.netdev->stats.rx_dropped++;	1274	DEV_STATS_INC(macsec->secy.netdev, rx_dropped);
1275		1275
1276	rcu_read_unlock();	1276	rcu_read_unlock();
1277		1277
@@ -1308,7 +1308,7 @@ nosci: · 30 unmodified lines
1308	u64_stats_update_begin(&secy_stats->syncp);	1308	u64_stats_update_begin(&secy_stats->syncp);
1309	secy_stats->stats.InPktsNoSCI++;	1309	secy_stats->stats.InPktsNoSCI++;
1310	u64_stats_update_end(&secy_stats->syncp);	1310	u64_stats_update_end(&secy_stats->syncp);
1311	macsec->secy.netdev->stats.rx_errors++;	1311	DEV_STATS_INC(macsec->secy.netdev, rx_errors);
1312	continue;	1312	continue;
1313	}	1313	}
1314		1314
@@ -1327,7 +1327,7 @@ nosci: · 12 unmodified lines
1327	secy_stats->stats.InPktsUnknownSCI++;	1327	secy_stats->stats.InPktsUnknownSCI++;
1328	u64_stats_update_end(&secy_stats->syncp);	1328	u64_stats_update_end(&secy_stats->syncp);
1329	} else {	1329	} else {
1330	macsec->secy.netdev->stats.rx_dropped++;	1330	DEV_STATS_INC(macsec->secy.netdev, rx_dropped);
1331	}	1331	}
1332	}	1332	}
1333		1333
@@ -3422,7 +3422,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, · 2088 unmodified lines
3422		3422
3423	if (!secy->operational) {	3423	if (!secy->operational) {
3424	kfree_skb(skb);	3424	kfree_skb(skb);
3425	dev->stats.tx_dropped++;	3425	DEV_STATS_INC(dev, tx_dropped);
3426	return NETDEV_TX_OK;	3426	return NETDEV_TX_OK;
3427	}	3427	}
3428		3428
@@ -3430,7 +3430,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, · 1 unmodified line
3430	skb = macsec_encrypt(skb, dev);	3430	skb = macsec_encrypt(skb, dev);
3431	if (IS_ERR(skb)) {	3431	if (IS_ERR(skb)) {
3432	if (PTR_ERR(skb) != -EINPROGRESS)	3432	if (PTR_ERR(skb) != -EINPROGRESS)
3433	dev->stats.tx_dropped++;	3433	DEV_STATS_INC(dev, tx_dropped);
3434	return NETDEV_TX_OK;	3434	return NETDEV_TX_OK;
3435	}	3435	}
3436		3436
@@ -3667,9 +3667,9 @@ static void macsec_get_stats64(struct net_device *dev, · 230 unmodified lines
3667		3667
3668	dev_fetch_sw_netstats(s, dev->tstats);	3668	dev_fetch_sw_netstats(s, dev->tstats);
3669		3669
3670	s->rx_dropped = dev->stats.rx_dropped;	3670	s->rx_dropped = atomic_long_read(&dev->stats.__rx_dropped);
3671	s->tx_dropped = dev->stats.tx_dropped;	3671	s->tx_dropped = atomic_long_read(&dev->stats.__tx_dropped);
3672	s->rx_errors = dev->stats.rx_errors;	3672	s->rx_errors = atomic_long_read(&dev->stats.__rx_errors);
3673	}	3673	}
3674		3674
3675	static int macsec_get_iflink(const struct net_device *dev)	3675	static int macsec_get_iflink(const struct net_device *dev)

drivers/net/phy/at803x.c+25−22

 			phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i],
 				      mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
-		/* Enable WOL function */
+		/* Enable WOL function for 1588 */
-		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL,
+		if (phydev->drv->phy_id == ATH8031_PHY_ID) {
-				0, AT803X_WOL_EN);
+			ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
-		if (ret)
+					     AT803X_PHY_MMD3_WOL_CTRL,
-			return ret;
+					     0, AT803X_WOL_EN);
+			if (ret)
+				return ret;
+		}
 		/* Enable WOL interrupt */
 		ret = phy_modify(phydev, AT803X_INTR_ENABLE, 0, AT803X_INTR_ENABLE_WOL);
 		if (ret)
 			return ret;
 	} else {
-		/* Disable WoL function */
+		/* Disable WoL function for 1588 */
-		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL,
+		if (phydev->drv->phy_id == ATH8031_PHY_ID) {
-				AT803X_WOL_EN, 0);
+			ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
-		if (ret)
+					     AT803X_PHY_MMD3_WOL_CTRL,
-			return ret;
+					     AT803X_WOL_EN, 0);
+			if (ret)
+				return ret;
+		}
 		/* Disable WOL interrupt */
 		ret = phy_modify(phydev, AT803X_INTR_ENABLE, AT803X_INTR_ENABLE_WOL, 0);
 		if (ret)
 	wol->supported = WAKE_MAGIC;
 	wol->wolopts = 0;
-	value = phy_read_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL);
+	value = phy_read(phydev, AT803X_INTR_ENABLE);
 	if (value < 0)
 		return;
-	if (value & AT803X_WOL_EN)
+	if (value & AT803X_INTR_ENABLE_WOL)
 		wol->wolopts |= WAKE_MAGIC;
 }
 	if (phydev->drv->phy_id == ATH8031_PHY_ID) {
 		int ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
 		int mode_cfg;
-		struct ethtool_wolinfo wol = {
-			.wolopts = 0,
-		};
 		if (ccr < 0)
 			return ccr;
 			break;
 		}
-		/* Disable WOL by default */
+		/* Disable WoL in 1588 register which is enabled
-		ret = at803x_set_wol(phydev, &wol);
+		 * by default
-		if (ret < 0) {
+		 */
-			phydev_err(phydev, "failed to disable WOL on probe: %d\n", ret);
+		ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
+				     AT803X_PHY_MMD3_WOL_CTRL,
+				     AT803X_WOL_EN, 0);
+		if (ret)
 			return ret;
-		}
 	}
 	return 0;
 	.flags			= PHY_POLL_CABLE_TEST,
 	.config_init		= at803x_config_init,
 	.link_change_notify	= at803x_link_change_notify,
-	.set_wol		= at803x_set_wol,
-	.get_wol		= at803x_get_wol,
 	.suspend		= at803x_suspend,
 	.resume			= at803x_resume,
 	/* PHY_BASIC_FEATURES */

drivers/net/tap.c+1−1

@@ -534,7 +534,7 @@ static int tap_open(struct inode inode, struct file file) · 533 unmodified lines
534	q->sock.state = SS_CONNECTED;	534	q->sock.state = SS_CONNECTED;
535	q->sock.file = file;	535	q->sock.file = file;
536	q->sock.ops = &tap_socket_ops;	536	q->sock.ops = &tap_socket_ops;
537	sock_init_data_uid(&q->sock, &q->sk, inode->i_uid);	537	sock_init_data_uid(&q->sock, &q->sk, current_fsuid());
538	q->sk.sk_write_space = tap_sock_write_space;	538	q->sk.sk_write_space = tap_sock_write_space;
539	q->sk.sk_destruct = tap_sock_destruct;	539	q->sk.sk_destruct = tap_sock_destruct;
540	q->flags = IFF_VNET_HDR \| IFF_NO_PI \| IFF_TAP;	540	q->flags = IFF_VNET_HDR \| IFF_NO_PI \| IFF_TAP;

drivers/net/tun.c+2−2

@@ -1594,7 +1594,7 @@ static bool tun_can_build_skb(struct tun_struct tun, struct tun_file tfile, · 1593 unmodified lines
1594	if (zerocopy)	1594	if (zerocopy)
1595	return false;	1595	return false;
1596		1596
1597	if (SKB_DATA_ALIGN(len + TUN_RX_PAD) +	1597	if (SKB_DATA_ALIGN(len + TUN_RX_PAD + XDP_PACKET_HEADROOM) +
1598	SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) > PAGE_SIZE)	1598	SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) > PAGE_SIZE)
1599	return false;	1599	return false;
1600		1600
@@ -3469,7 +3469,7 @@ static int tun_chr_open(struct inode inode, struct file file) · 1868 unmodified lines
3469	tfile->socket.file = file;	3469	tfile->socket.file = file;
3470	tfile->socket.ops = &tun_socket_ops;	3470	tfile->socket.ops = &tun_socket_ops;
3471		3471
3472	sock_init_data_uid(&tfile->socket, &tfile->sk, inode->i_uid);	3472	sock_init_data_uid(&tfile->socket, &tfile->sk, current_fsuid());
3473		3473
3474	tfile->sk.sk_write_space = tun_sock_write_space;	3474	tfile->sk.sk_write_space = tun_sock_write_space;
3475	tfile->sk.sk_sndbuf = INT_MAX;	3475	tfile->sk.sk_sndbuf = INT_MAX;

drivers/net/usb/cdc_ether.c+21−0

@@ -618,9 +618,23 @@ static const struct usb_device_id products[] = { · 617 unmodified lines
618	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	618	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
619	\| USB_DEVICE_ID_MATCH_DEVICE,	619	\| USB_DEVICE_ID_MATCH_DEVICE,
620	.idVendor = 0x04DD,	620	.idVendor = 0x04DD,
		621	.idProduct = 0x8005, /* A-300 */
		622	ZAURUS_FAKE_INTERFACE,
		623	.driver_info = 0,
		624	}, {
		625	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		626	\| USB_DEVICE_ID_MATCH_DEVICE,
		627	.idVendor = 0x04DD,
621	.idProduct = 0x8006, /* B-500/SL-5600 */	628	.idProduct = 0x8006, /* B-500/SL-5600 */
622	ZAURUS_MASTER_INTERFACE,	629	ZAURUS_MASTER_INTERFACE,
623	.driver_info = 0,	630	.driver_info = 0,
		631	}, {
		632	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		633	\| USB_DEVICE_ID_MATCH_DEVICE,
		634	.idVendor = 0x04DD,
		635	.idProduct = 0x8006, /* B-500/SL-5600 */
		636	ZAURUS_FAKE_INTERFACE,
		637	.driver_info = 0,
624	}, {	638	}, {
625	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	639	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
626	\| USB_DEVICE_ID_MATCH_DEVICE,	640	\| USB_DEVICE_ID_MATCH_DEVICE,
@@ -628,6 +642,13 @@ static const struct usb_device_id products[] = { · 1 unmodified line
628	.idProduct = 0x8007, /* C-700 */	642	.idProduct = 0x8007, /* C-700 */
629	ZAURUS_MASTER_INTERFACE,	643	ZAURUS_MASTER_INTERFACE,
630	.driver_info = 0,	644	.driver_info = 0,
		645	}, {
		646	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		647	\| USB_DEVICE_ID_MATCH_DEVICE,
		648	.idVendor = 0x04DD,
		649	.idProduct = 0x8007, /* C-700 */
		650	ZAURUS_FAKE_INTERFACE,
		651	.driver_info = 0,
631	}, {	652	}, {
632	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	653	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
633	\| USB_DEVICE_ID_MATCH_DEVICE,	654	\| USB_DEVICE_ID_MATCH_DEVICE,

drivers/net/usb/lan78xx.c+2−5

 	if (!dev)
 		return;
-	set_bit(EVENT_DEV_DISCONNECT, &dev->flags);
 	netif_napi_del(&dev->napi);
 	udev = interface_to_usbdev(intf);
 	unregister_netdev(net);
+	timer_shutdown_sync(&dev->stat_monitor);
+	set_bit(EVENT_DEV_DISCONNECT, &dev->flags);
 	cancel_delayed_work_sync(&dev->wq);
 	phydev = net->phydev;
 	usb_scuttle_anchored_urbs(&dev->deferred);
-	if (timer_pending(&dev->stat_monitor))
-		del_timer_sync(&dev->stat_monitor);
 	lan78xx_unbind(dev, intf);
 	lan78xx_free_tx_resources(dev);

drivers/net/usb/qmi_wwan.c+1−0

@@ -1423,6 +1423,7 @@ static const struct usb_device_id products[] = { · 1422 unmodified lines
1423	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)}, /* Quectel EG91 */	1423	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)}, /* Quectel EG91 */
1424	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0195, 4)}, /* Quectel EG95 */	1424	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0195, 4)}, /* Quectel EG95 */
1425	{QMI_FIXED_INTF(0x2c7c, 0x0296, 4)}, /* Quectel BG96 */	1425	{QMI_FIXED_INTF(0x2c7c, 0x0296, 4)}, /* Quectel BG96 */
		1426	{QMI_QUIRK_SET_DTR(0x2c7c, 0x030e, 4)}, /* Quectel EM05GV2 */
1426	{QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)}, /* Fibocom NL678 series */	1427	{QMI_QUIRK_SET_DTR(0x2cb7, 0x0104, 4)}, /* Fibocom NL678 series */
1427	{QMI_FIXED_INTF(0x0489, 0xe0b4, 0)}, /* Foxconn T77W968 LTE */	1428	{QMI_FIXED_INTF(0x0489, 0xe0b4, 0)}, /* Foxconn T77W968 LTE */
1428	{QMI_FIXED_INTF(0x0489, 0xe0b5, 0)}, /* Foxconn T77W968 LTE with eSIM support*/	1429	{QMI_FIXED_INTF(0x0489, 0xe0b5, 0)}, /* Foxconn T77W968 LTE with eSIM support*/

drivers/net/usb/zaurus.c+21−0

@@ -289,9 +289,23 @@ static const struct usb_device_id products [] = { · 288 unmodified lines
289	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	289	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
290	\| USB_DEVICE_ID_MATCH_DEVICE,	290	\| USB_DEVICE_ID_MATCH_DEVICE,
291	.idVendor = 0x04DD,	291	.idVendor = 0x04DD,
		292	.idProduct = 0x8005, /* A-300 */
		293	ZAURUS_FAKE_INTERFACE,
		294	.driver_info = (unsigned long)&bogus_mdlm_info,
		295	}, {
		296	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		297	\| USB_DEVICE_ID_MATCH_DEVICE,
		298	.idVendor = 0x04DD,
292	.idProduct = 0x8006, /* B-500/SL-5600 */	299	.idProduct = 0x8006, /* B-500/SL-5600 */
293	ZAURUS_MASTER_INTERFACE,	300	ZAURUS_MASTER_INTERFACE,
294	.driver_info = ZAURUS_PXA_INFO,	301	.driver_info = ZAURUS_PXA_INFO,
		302	}, {
		303	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		304	\| USB_DEVICE_ID_MATCH_DEVICE,
		305	.idVendor = 0x04DD,
		306	.idProduct = 0x8006, /* B-500/SL-5600 */
		307	ZAURUS_FAKE_INTERFACE,
		308	.driver_info = (unsigned long)&bogus_mdlm_info,
295	}, {	309	}, {
296	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	310	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
297	\| USB_DEVICE_ID_MATCH_DEVICE,	311	\| USB_DEVICE_ID_MATCH_DEVICE,
@@ -299,6 +313,13 @@ static const struct usb_device_id products [] = { · 1 unmodified line
299	.idProduct = 0x8007, /* C-700 */	313	.idProduct = 0x8007, /* C-700 */
300	ZAURUS_MASTER_INTERFACE,	314	ZAURUS_MASTER_INTERFACE,
301	.driver_info = ZAURUS_PXA_INFO,	315	.driver_info = ZAURUS_PXA_INFO,
		316	}, {
		317	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
		318	\| USB_DEVICE_ID_MATCH_DEVICE,
		319	.idVendor = 0x04DD,
		320	.idProduct = 0x8007, /* C-700 */
		321	ZAURUS_FAKE_INTERFACE,
		322	.driver_info = (unsigned long)&bogus_mdlm_info,
302	}, {	323	}, {
303	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO	324	.match_flags = USB_DEVICE_ID_MATCH_INT_INFO
304	\| USB_DEVICE_ID_MATCH_DEVICE,	325	\| USB_DEVICE_ID_MATCH_DEVICE,

drivers/net/vxlan/vxlan_vnifilter.c+8−3

 	return vninode;
 }
+static void vxlan_vni_free(struct vxlan_vni_node *vninode)
+{
+	free_percpu(vninode->stats);
+	kfree(vninode);
+}
 static int vxlan_vni_add(struct vxlan_dev *vxlan,
 			 struct vxlan_vni_group *vg,
 			 u32 vni, union vxlan_addr *group,
 					    &vninode->vnode,
 					    vxlan_vni_rht_params);
 	if (err) {
-		kfree(vninode);
+		vxlan_vni_free(vninode);
 		return err;
 	}
 	struct vxlan_vni_node *v;
 	v = container_of(rcu, struct vxlan_vni_node, rcu);
-	free_percpu(v->stats);
+	vxlan_vni_free(v);
-	kfree(v);
 }
 static int vxlan_vni_del(struct vxlan_dev *vxlan,

drivers/net/wireguard/allowedips.c+4−4

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	#include "allowedips.h"	6	#include "allowedips.h"
7	#include "peer.h"	7	#include "peer.h"
8		8
9	enum { MAX_ALLOWEDIPS_BITS = 128 };	9	enum { MAX_ALLOWEDIPS_DEPTH = 129 };
10		10
11	static struct kmem_cache *node_cache;	11	static struct kmem_cache *node_cache;
12		12
@@ -42,7 +42,7 @@ static void push_rcu(struct allowedips_node **stack, · 29 unmodified lines
42	struct allowedips_node __rcu p, unsigned int len)	42	struct allowedips_node __rcu p, unsigned int len)
43	{	43	{
44	if (rcu_access_pointer(p)) {	44	if (rcu_access_pointer(p)) {
45	if (WARN_ON(IS_ENABLED(DEBUG) && *len >= MAX_ALLOWEDIPS_BITS))	45	if (WARN_ON(IS_ENABLED(DEBUG) && *len >= MAX_ALLOWEDIPS_DEPTH))
46	return;	46	return;
47	stack[(*len)++] = rcu_dereference_raw(p);	47	stack[(*len)++] = rcu_dereference_raw(p);
48	}	48	}
@@ -55,7 +55,7 @@ static void node_free_rcu(struct rcu_head *rcu) · 6 unmodified lines
55		55
56	static void root_free_rcu(struct rcu_head *rcu)	56	static void root_free_rcu(struct rcu_head *rcu)
57	{	57	{
58	struct allowedips_node node, stack[MAX_ALLOWEDIPS_BITS] = {	58	struct allowedips_node node, stack[MAX_ALLOWEDIPS_DEPTH] = {
59	container_of(rcu, struct allowedips_node, rcu) };	59	container_of(rcu, struct allowedips_node, rcu) };
60	unsigned int len = 1;	60	unsigned int len = 1;
61		61
@@ -68,7 +68,7 @@ static void root_free_rcu(struct rcu_head *rcu) · 6 unmodified lines
68		68
69	static void root_remove_peer_lists(struct allowedips_node *root)	69	static void root_remove_peer_lists(struct allowedips_node *root)
70	{	70	{
71	struct allowedips_node node, stack[MAX_ALLOWEDIPS_BITS] = { root };	71	struct allowedips_node node, stack[MAX_ALLOWEDIPS_DEPTH] = { root };
72	unsigned int len = 1;	72	unsigned int len = 1;
73		73
74	while (len > 0 && (node = stack[--len])) {	74	while (len > 0 && (node = stack[--len])) {

drivers/net/wireguard/selftest/allowedips.c+10−6

@@ -593,16 +593,20 @@ bool __init wg_allowedips_selftest(void) · 592 unmodified lines
593	wg_allowedips_remove_by_peer(&t, a, &mutex);	593	wg_allowedips_remove_by_peer(&t, a, &mutex);
594	test_negative(4, a, 192, 168, 0, 1);	594	test_negative(4, a, 192, 168, 0, 1);
595		595
596	/* These will hit the WARN_ON(len >= MAX_ALLOWEDIPS_BITS) in free_node	596	/* These will hit the WARN_ON(len >= MAX_ALLOWEDIPS_DEPTH) in free_node
597	* if something goes wrong.	597	* if something goes wrong.
598	*/	598	*/
599	for (i = 0; i < MAX_ALLOWEDIPS_BITS; ++i) {	599	for (i = 0; i < 64; ++i) {
600	part = cpu_to_be64(~(1LLU << (i % 64)));	600	part = cpu_to_be64(~0LLU << i);
601	memset(&ip, 0xff, 16);	601	memset(&ip, 0xff, 8);
602	memcpy((u8 )&ip + (i < 64) 8, &part, 8);	602	memcpy((u8 *)&ip + 8, &part, 8);
		603	wg_allowedips_insert_v6(&t, &ip, 128, a, &mutex);
		604	memcpy(&ip, &part, 8);
		605	memset((u8 *)&ip + 8, 0, 8);
603	wg_allowedips_insert_v6(&t, &ip, 128, a, &mutex);	606	wg_allowedips_insert_v6(&t, &ip, 128, a, &mutex);
604	}	607	}
605		608	memset(&ip, 0, 16);
		609	wg_allowedips_insert_v6(&t, &ip, 128, a, &mutex);
606	wg_allowedips_free(&t, &mutex);	610	wg_allowedips_free(&t, &mutex);
607		611
608	wg_allowedips_init(&t);	612	wg_allowedips_init(&t);

drivers/net/wireless/ath/ath11k/ahb.c+0−1

@@ -376,7 +376,6 @@ static void ath11k_ahb_ext_irq_enable(struct ath11k_base *ab) · 375 unmodified lines
376	struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];	376	struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
377		377
378	if (!irq_grp->napi_enabled) {	378	if (!irq_grp->napi_enabled) {
379	dev_set_threaded(&irq_grp->napi_ndev, true);
380	napi_enable(&irq_grp->napi);	379	napi_enable(&irq_grp->napi);
381	irq_grp->napi_enabled = true;	380	irq_grp->napi_enabled = true;
382	}	381	}

drivers/net/wireless/ath/ath11k/pcic.c+0−1

@@ -466,7 +466,6 @@ void ath11k_pcic_ext_irq_enable(struct ath11k_base *ab) · 465 unmodified lines
466	struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];	466	struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i];
467		467
468	if (!irq_grp->napi_enabled) {	468	if (!irq_grp->napi_enabled) {
469	dev_set_threaded(&irq_grp->napi_ndev, true);
470	napi_enable(&irq_grp->napi);	469	napi_enable(&irq_grp->napi);
471	irq_grp->napi_enabled = true;	470	irq_grp->napi_enabled = true;
472	}	471	}

drivers/net/wireless/ath/ath12k/wmi.c+1−2

@@ -2144,8 +2144,7 @@ int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, · 2143 unmodified lines
2144	struct wmi_tlv *tlv;	2144	struct wmi_tlv *tlv;
2145	void *ptr;	2145	void *ptr;
2146	int i, ret, len;	2146	int i, ret, len;
2147	u32 *tmp_ptr;	2147	u32 *tmp_ptr, extraie_len_with_pad = 0;
2148	u8 extraie_len_with_pad = 0;
2149	struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;	2148	struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL;
2150	struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;	2149	struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL;
2151		2150

drivers/net/wireless/ath/ath6kl/Makefile+0−5

 ath6kl_core-y += core.o
 ath6kl_core-y += recovery.o
-# FIXME: temporarily silence -Wdangling-pointer on non W=1+ builds
-ifndef KBUILD_EXTRA_WARN
-CFLAGS_htc_mbox.o += $(call cc-disable-warning, dangling-pointer)
-endif
 ath6kl_core-$(CONFIG_NL80211_TESTMODE) += testmode.o
 ath6kl_core-$(CONFIG_ATH6KL_TRACING) += trace.o

drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c+5−0

 		params_size -= BRCMF_SCAN_PARAMS_V2_FIXED_SIZE;
 		params_size += BRCMF_SCAN_PARAMS_FIXED_SIZE;
 		params_v1 = kzalloc(params_size, GFP_KERNEL);
+		if (!params_v1) {
+			err = -ENOMEM;
+			goto exit_params;
+		}
 		params_v1->version = cpu_to_le32(BRCMF_ESCAN_REQ_VERSION);
 		brcmf_scan_params_v2_to_v1(&params->params_v2_le, &params_v1->params_le);
 		kfree(params);
 			bphy_err(drvr, "error (%d)\n", err);
 	}
+exit_params:
 	kfree(params);
 exit:
 	return err;

drivers/net/wireless/broadcom/brcm80211/brcmfmac/fwil_types.h+6−1

 				 * fixed parameter portion is assumed, otherwise
 				 * ssid in the fixed portion is ignored
 				 */
-	__le16 channel_list[1];	/* list of chanspecs */
+	union {
+		__le16 padding;	/* Reserve space for at least 1 entry for abort
+				 * which uses an on stack brcmf_scan_params_le
+				 */
+		DECLARE_FLEX_ARRAY(__le16, channel_list);	/* chanspecs */
+	};
 };
 struct brcmf_scan_params_v2_le {

drivers/net/wireless/legacy/rayctl.h+1−1

@@ -577,7 +577,7 @@ struct tx_msg { · 576 unmodified lines
577	struct tib_structure tib;	577	struct tib_structure tib;
578	struct phy_header phy;	578	struct phy_header phy;
579	struct mac_header mac;	579	struct mac_header mac;
580	UCHAR var[1];	580	UCHAR var[];
581	};	581	};
582		582
583	/****** ECF Receive Control Structure (RCS) Area at Shared RAM offset 0x0800 */	583	/****** ECF Receive Control Structure (RCS) Area at Shared RAM offset 0x0800 */

drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c+3−3

 	case MT_EE_5GHZ:
 		dev->mphy.cap.has_5ghz = true;
 		break;
-	case MT_EE_2GHZ:
-		dev->mphy.cap.has_2ghz = true;
-		break;
 	case MT_EE_DBDC:
 		dev->dbdc_support = true;
 		fallthrough;
+	case MT_EE_2GHZ:
+		dev->mphy.cap.has_2ghz = true;
+		break;
 	default:
 		dev->mphy.cap.has_2ghz = true;
 		dev->mphy.cap.has_5ghz = true;

drivers/net/wireless/realtek/rtw89/mac.c+1−1

@@ -2524,7 +2524,7 @@ static int cmac_dma_init(struct rtw89_dev *rtwdev, u8 mac_idx) · 2523 unmodified lines
2524	u32 reg;	2524	u32 reg;
2525	int ret;	2525	int ret;
2526		2526
2527	if (chip_id != RTL8852A && chip_id != RTL8852B)	2527	if (chip_id != RTL8852B)
2528	return 0;	2528	return 0;
2529		2529
2530	ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);	2530	ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);

drivers/net/xen-netback/netback.c+10−5

 	struct gnttab_map_grant_ref *gop = queue->tx_map_ops + *map_ops;
 	struct xen_netif_tx_request *txp = first;
-	nr_slots = shinfo->nr_frags + 1;
+	nr_slots = shinfo->nr_frags + frag_overflow + 1;
 	copy_count(skb) = 0;
 	XENVIF_TX_CB(skb)->split_mask = 0;
 		}
 	}
-	for (shinfo->nr_frags = 0; shinfo->nr_frags < nr_slots;
+	for (shinfo->nr_frags = 0; nr_slots > 0 && shinfo->nr_frags < MAX_SKB_FRAGS;
-	     shinfo->nr_frags++, gop++) {
+	     shinfo->nr_frags++, gop++, nr_slots--) {
 		index = pending_index(queue->pending_cons++);
 		pending_idx = queue->pending_ring[index];
 		xenvif_tx_create_map_op(queue, pending_idx, txp,
 			txp++;
 	}
-	if (frag_overflow) {
+	if (nr_slots > 0) {
 		shinfo = skb_shinfo(nskb);
 		frags = shinfo->frags;
-		for (shinfo->nr_frags = 0; shinfo->nr_frags < frag_overflow;
+		for (shinfo->nr_frags = 0; shinfo->nr_frags < nr_slots;
 		     shinfo->nr_frags++, txp++, gop++) {
 			index = pending_index(queue->pending_cons++);
 			pending_idx = queue->pending_ring[index];
 		}
 		skb_shinfo(skb)->frag_list = nskb;
+	} else if (nskb) {
+		/* A frag_list skb was allocated but it is no longer needed
+		 * because enough slots were converted to copy ops above.
+		 */
+		kfree_skb(nskb);
 	}
 	(*copy_ops) = cop - queue->tx_copy_ops;

drivers/nvme/host/core.c+7−3

 	 */
 	nvme_mpath_clear_ctrl_paths(ctrl);
+	/*
+	 * Unquiesce io queues so any pending IO won't hang, especially
+	 * those submitted from scan work
+	 */
+	nvme_unquiesce_io_queues(ctrl);
 	/* prevent racing with ns scanning */
 	flush_work(&ctrl->scan_work);
 	 * removing the namespaces' disks; fail all the queues now to avoid
 	 * potentially having to clean up the failed sync later.
 	 */
-	if (ctrl->state == NVME_CTRL_DEAD) {
+	if (ctrl->state == NVME_CTRL_DEAD)
 		nvme_mark_namespaces_dead(ctrl);
-		nvme_unquiesce_io_queues(ctrl);
-	}
 	/* this is a no-op when called from the controller reset handler */
 	nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);

drivers/nvme/host/ioctl.c+0−2

 	if (!(ioucmd->flags & IORING_URING_CMD_POLLED))
 		return 0;
-	rcu_read_lock();
 	req = READ_ONCE(ioucmd->cookie);
 	if (req && blk_rq_is_poll(req))
 		ret = blk_rq_poll(req, iob, poll_flags);
-	rcu_read_unlock();
 	return ret;
 }
 #ifdef CONFIG_NVME_MULTIPATH

drivers/nvme/host/pci.c+2−1

 	{ PCI_DEVICE(0x1d97, 0x2263),   /* SPCC */
 		.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
 	{ PCI_DEVICE(0x144d, 0xa80b),   /* Samsung PM9B1 256G and 512G */
-		.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
+		.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES |
+				NVME_QUIRK_BOGUS_NID, },
 	{ PCI_DEVICE(0x144d, 0xa809),   /* Samsung MZALQ256HBJD 256G */
 		.driver_data = NVME_QUIRK_DISABLE_WRITE_ZEROES, },
 	{ PCI_DEVICE(0x144d, 0xa802),   /* Samsung SM953 */

drivers/nvme/host/rdma.c+2−1

 		goto out_cleanup_tagset;
 	if (!new) {
+		nvme_start_freeze(&ctrl->ctrl);
 		nvme_unquiesce_io_queues(&ctrl->ctrl);
 		if (!nvme_wait_freeze_timeout(&ctrl->ctrl, NVME_IO_TIMEOUT)) {
 			/*
 			 * to be safe.
 			 */
 			ret = -ENODEV;
+			nvme_unfreeze(&ctrl->ctrl);
 			goto out_wait_freeze_timed_out;
 		}
 		blk_mq_update_nr_hw_queues(ctrl->ctrl.tagset,
 		bool remove)
 {
 	if (ctrl->ctrl.queue_count > 1) {
-		nvme_start_freeze(&ctrl->ctrl);
 		nvme_quiesce_io_queues(&ctrl->ctrl);
 		nvme_sync_io_queues(&ctrl->ctrl);
 		nvme_rdma_stop_io_queues(ctrl);

drivers/nvme/host/tcp.c+2−1

 		goto out_cleanup_connect_q;
 	if (!new) {
+		nvme_start_freeze(ctrl);
 		nvme_unquiesce_io_queues(ctrl);
 		if (!nvme_wait_freeze_timeout(ctrl, NVME_IO_TIMEOUT)) {
 			/*
 			 * to be safe.
 			 */
 			ret = -ENODEV;
+			nvme_unfreeze(ctrl);
 			goto out_wait_freeze_timed_out;
 		}
 		blk_mq_update_nr_hw_queues(ctrl->tagset,
 	if (ctrl->queue_count <= 1)
 		return;
 	nvme_quiesce_admin_queue(ctrl);
-	nvme_start_freeze(ctrl);
 	nvme_quiesce_io_queues(ctrl);
 	nvme_sync_io_queues(ctrl);
 	nvme_tcp_stop_io_queues(ctrl);

drivers/parisc/sba_iommu.c+6−0

 MODULE_PARM_DESC(sba_reserve_agpgart, "Reserve half of IO pdir as AGPGART");
 #endif
+struct proc_dir_entry *proc_runway_root __ro_after_init;
+struct proc_dir_entry *proc_mckinley_root __ro_after_init;
 /************************************
 ** SBA register read and write support
 #ifdef CONFIG_PROC_FS
 	switch (dev->id.hversion) {
 	case PLUTO_MCKINLEY_PORT:
+		if (!proc_mckinley_root)
+			proc_mckinley_root = proc_mkdir("bus/mckinley", NULL);
 		root = proc_mckinley_root;
 		break;
 	case ASTRO_RUNWAY_PORT:
 	case IKE_MERCED_PORT:
 	default:
+		if (!proc_runway_root)
+			proc_runway_root = proc_mkdir("bus/runway", NULL);
 		root = proc_runway_root;
 		break;
 	}

drivers/parport/parport_gsc.c+4−24

 #include <linux/sysctl.h>
 #include <asm/io.h>
-#include <asm/dma.h>
 #include <linux/uaccess.h>
 #include <asm/superio.h>
 /* --- Initialisation code -------------------------------- */
-struct parport *parport_gsc_probe_port(unsigned long base,
+static struct parport *parport_gsc_probe_port(unsigned long base,
 				       unsigned long base_hi, int irq,
-				       int dma, struct parisc_device *padev)
+				       struct parisc_device *padev)
 {
 	struct parport_gsc_private *priv;
 	struct parport_operations *ops;
 	}
 	priv->ctr = 0xc;
 	priv->ctr_writable = 0xff;
-	priv->dma_buf = NULL;
-	priv->dma_handle = 0;
 	p->base = base;
 	p->base_hi = base_hi;
 	p->irq = irq;
-	p->dma = dma;
 	p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
 	p->ops = ops;
 	p->private_data = priv;
 	if (p->irq == PARPORT_IRQ_AUTO) {
 		p->irq = PARPORT_IRQ_NONE;
 	}
-	if (p->irq != PARPORT_IRQ_NONE) {
+	if (p->irq != PARPORT_IRQ_NONE)
 		pr_cont(", irq %d", p->irq);
-		if (p->dma == PARPORT_DMA_AUTO) {
-			p->dma = PARPORT_DMA_NONE;
-		}
-	}
-	if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
-                                           is mandatory (see above) */
-		p->dma = PARPORT_DMA_NONE;
 	pr_cont(" [");
 #define printmode(x)							\
 do {									\
 			pr_warn("%s: irq %d in use, resorting to polled operation\n",
 				p->name, p->irq);
 			p->irq = PARPORT_IRQ_NONE;
-			p->dma = PARPORT_DMA_NONE;
 		}
 	}
 		pr_info("%s: enhanced parport-modes not supported\n", __func__);
 	}
-	p = parport_gsc_probe_port(port, 0, dev->irq,
+	p = parport_gsc_probe_port(port, 0, dev->irq, dev);
-			/* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, dev);
 	if (p)
 		parport_count++;
 	dev_set_drvdata(&dev->dev, p);
 {
 	struct parport *p = dev_get_drvdata(&dev->dev);
 	if (p) {
-		struct parport_gsc_private *priv = p->private_data;
 		struct parport_operations *ops = p->ops;
 		parport_remove_port(p);
-		if (p->dma != PARPORT_DMA_NONE)
-			free_dma(p->dma);
 		if (p->irq != PARPORT_IRQ_NONE)
 			free_irq(p->irq, p);
-		if (priv->dma_buf)
-			dma_free_coherent(&priv->dev->dev, PAGE_SIZE,
-					  priv->dma_buf, priv->dma_handle);
 		kfree (p->private_data);
 		parport_put_port(p);
 		kfree (ops); /* hope no-one cached it */

drivers/parport/parport_gsc.h+0−7

 	int writeIntrThreshold;
 	/* buffer suitable for DMA, if DMA enabled */
-	char *dma_buf;
-	dma_addr_t dma_handle;
 	struct pci_dev *dev;
 };
 extern void parport_gsc_dec_use_count(void);
-extern struct parport *parport_gsc_probe_port(unsigned long base,
-						unsigned long base_hi,
-						int irq, int dma,
-						struct parisc_device *padev);
 #endif	/* __DRIVERS_PARPORT_PARPORT_GSC_H */

drivers/pci/bus.c+3−1

 #include <linux/pci.h>
 #include <linux/errno.h>
 #include <linux/ioport.h>
+#include <linux/of.h>
 #include <linux/proc_fs.h>
 #include <linux/slab.h>
  */
 void pci_bus_add_device(struct pci_dev *dev)
 {
+	struct device_node *dn = dev->dev.of_node;
 	int retval;
 	/*
 	pci_proc_attach_device(dev);
 	pci_bridge_d3_update(dev);
-	dev->match_driver = true;
+	dev->match_driver = !dn || of_device_is_available(dn);
 	retval = device_attach(&dev->dev);
 	if (retval < 0 && retval != -EPROBE_DEFER)
 		pci_warn(dev, "device attach failed (%d)\n", retval);

drivers/pci/controller/Kconfig+0−1

@@ -179,7 +179,6 @@ config PCI_MVEBU · 178 unmodified lines
179	depends on MVEBU_MBUS	179	depends on MVEBU_MBUS
180	depends on ARM	180	depends on ARM
181	depends on OF	181	depends on OF
182	depends on BROKEN
183	select PCI_BRIDGE_EMUL	182	select PCI_BRIDGE_EMUL
184	help	183	help
185	Add support for Marvell EBU PCIe controller. This PCIe controller	184	Add support for Marvell EBU PCIe controller. This PCIe controller

drivers/pci/controller/dwc/pcie-designware-host.c+4−9

 	if (ret)
 		goto err_remove_edma;
-	if (dw_pcie_link_up(pci)) {
+	if (!dw_pcie_link_up(pci)) {
-		dw_pcie_print_link_status(pci);
-	} else {
 		ret = dw_pcie_start_link(pci);
 		if (ret)
 			goto err_remove_edma;
-		if (pci->ops && pci->ops->start_link) {
-			ret = dw_pcie_wait_for_link(pci);
-			if (ret)
-				goto err_stop_link;
-		}
 	}
+	/* Ignore errors, the link may come up later */
+	dw_pcie_wait_for_link(pci);
 	bridge->sysdata = pp;
 	ret = pci_host_probe(bridge);

drivers/pci/controller/dwc/pcie-designware.c+7−13

 	dw_pcie_writel_atu(pci, dir, index, PCIE_ATU_REGION_CTRL2, 0);
 }
-void dw_pcie_print_link_status(struct dw_pcie *pci)
-{
-	u32 offset, val;
-	offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
-	val = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
-	dev_info(pci->dev, "PCIe Gen.%u x%u link up\n",
-		 FIELD_GET(PCI_EXP_LNKSTA_CLS, val),
-		 FIELD_GET(PCI_EXP_LNKSTA_NLW, val));
-}
 int dw_pcie_wait_for_link(struct dw_pcie *pci)
 {
+	u32 offset, val;
 	int retries;
 	/* Check if the link is up or not */
 		return -ETIMEDOUT;
 	}
-	dw_pcie_print_link_status(pci);
+	offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
+	val = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
+	dev_info(pci->dev, "PCIe Gen.%u x%u link up\n",
+		 FIELD_GET(PCI_EXP_LNKSTA_CLS, val),
+		 FIELD_GET(PCI_EXP_LNKSTA_NLW, val));
 	return 0;
 }

drivers/pci/controller/dwc/pcie-designware.h+0−1

@@ -429,7 +429,6 @@ void dw_pcie_setup(struct dw_pcie *pci); · 428 unmodified lines
429	void dw_pcie_iatu_detect(struct dw_pcie *pci);	429	void dw_pcie_iatu_detect(struct dw_pcie *pci);
430	int dw_pcie_edma_detect(struct dw_pcie *pci);	430	int dw_pcie_edma_detect(struct dw_pcie *pci);
431	void dw_pcie_edma_remove(struct dw_pcie *pci);	431	void dw_pcie_edma_remove(struct dw_pcie *pci);
432	void dw_pcie_print_link_status(struct dw_pcie *pci);
433		432
434	static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)	433	static inline void dw_pcie_writel_dbi(struct dw_pcie *pci, u32 reg, u32 val)
435	{	434	{

drivers/pci/hotplug/acpiphp_glue.c+7−1

 				acpiphp_native_scan_bridge(dev);
 		}
 	} else {
+		LIST_HEAD(add_list);
 		int max, pass;
 		acpiphp_rescan_slot(slot);
 				if (pass && dev->subordinate) {
 					check_hotplug_bridge(slot, dev);
 					pcibios_resource_survey_bus(dev->subordinate);
+					if (pci_is_root_bus(bus))
+						__pci_bus_size_bridges(dev->subordinate, &add_list);
 				}
 			}
 		}
-		pci_assign_unassigned_bridge_resources(bus->self);
+		if (pci_is_root_bus(bus))
+			__pci_bus_assign_resources(bus, &add_list, NULL);
+		else
+			pci_assign_unassigned_bridge_resources(bus->self);
 	}
 	acpiphp_sanitize_bus(bus);

drivers/pci/of.c+0−5

 	if (!node)
 		return 0;
-	if (!of_device_is_available(node)) {
-		of_node_put(node);
-		return -ENODEV;
-	}
 	device_set_node(&dev->dev, of_fwnode_handle(node));
 	return 0;
 }

drivers/platform/x86/amd/pmf/sps.c+2−1

@@ -176,7 +176,8 @@ int amd_pmf_get_pprof_modes(struct amd_pmf_dev *pmf) · 175 unmodified lines
176		176
177	int amd_pmf_power_slider_update_event(struct amd_pmf_dev *dev)	177	int amd_pmf_power_slider_update_event(struct amd_pmf_dev *dev)
178	{	178	{
179	u8 mode, flag = 0;	179	u8 flag = 0;
		180	int mode;
180	int src;	181	int src;
181		182
182	mode = amd_pmf_get_pprof_modes(dev);	183	mode = amd_pmf_get_pprof_modes(dev);

drivers/platform/x86/intel/speed_select_if/isst_if_common.c+2−2

@@ -335,8 +335,8 @@ static struct pci_dev *_isst_if_get_pci_dev(int cpu, int bus_no, int dev, int fn · 334 unmodified lines
335		335
336	node = dev_to_node(&_pci_dev->dev);	336	node = dev_to_node(&_pci_dev->dev);
337	if (node == NUMA_NO_NODE) {	337	if (node == NUMA_NO_NODE) {
338	pr_info("Fail to get numa node for CPU:%d bus:%d dev:%d fn:%d\n",	338	pr_info_once("Fail to get numa node for CPU:%d bus:%d dev:%d fn:%d\n",
339	cpu, bus_no, dev, fn);	339	cpu, bus_no, dev, fn);
340	continue;	340	continue;
341	}	341	}
342		342

drivers/platform/x86/lenovo-ymc.c+25−0

@@ -24,6 +24,10 @@ static bool ec_trigger __read_mostly; · 23 unmodified lines
24	module_param(ec_trigger, bool, 0444);	24	module_param(ec_trigger, bool, 0444);
25	MODULE_PARM_DESC(ec_trigger, "Enable EC triggering work-around to force emitting tablet mode events");	25	MODULE_PARM_DESC(ec_trigger, "Enable EC triggering work-around to force emitting tablet mode events");
26		26
		27	static bool force;
		28	module_param(force, bool, 0444);
		29	MODULE_PARM_DESC(force, "Force loading on boards without a convertible DMI chassis-type");
		30
27	static const struct dmi_system_id ec_trigger_quirk_dmi_table[] = {	31	static const struct dmi_system_id ec_trigger_quirk_dmi_table[] = {
28	{	32	{
29	/* Lenovo Yoga 7 14ARB7 */	33	/* Lenovo Yoga 7 14ARB7 */
@@ -35,6 +39,20 @@ static const struct dmi_system_id ec_trigger_quirk_dmi_table[] = { · 5 unmodified lines
35	{ }	39	{ }
36	};	40	};
37		41
		42	static const struct dmi_system_id allowed_chasis_types_dmi_table[] = {
		43	{
		44	.matches = {
		45	DMI_EXACT_MATCH(DMI_CHASSIS_TYPE, "31" /* Convertible */),
		46	},
		47	},
		48	{
		49	.matches = {
		50	DMI_EXACT_MATCH(DMI_CHASSIS_TYPE, "32" /* Detachable */),
		51	},
		52	},
		53	{ }
		54	};
		55
38	struct lenovo_ymc_private {	56	struct lenovo_ymc_private {
39	struct input_dev *input_dev;	57	struct input_dev *input_dev;
40	struct acpi_device *ec_acpi_dev;	58	struct acpi_device *ec_acpi_dev;
@@ -111,6 +129,13 @@ static int lenovo_ymc_probe(struct wmi_device wdev, const void ctx) · 70 unmodified lines
111	struct input_dev *input_dev;	129	struct input_dev *input_dev;
112	int err;	130	int err;
113		131
		132	if (!dmi_check_system(allowed_chasis_types_dmi_table)) {
		133	if (force)
		134	dev_info(&wdev->dev, "Force loading Lenovo YMC support\n");
		135	else
		136	return -ENODEV;
		137	}
		138
114	ec_trigger \|= dmi_check_system(ec_trigger_quirk_dmi_table);	139	ec_trigger \|= dmi_check_system(ec_trigger_quirk_dmi_table);
115		140
116	priv = devm_kzalloc(&wdev->dev, sizeof(*priv), GFP_KERNEL);	141	priv = devm_kzalloc(&wdev->dev, sizeof(*priv), GFP_KERNEL);

drivers/platform/x86/mlx-platform.c+11−12

 #define MLXPLAT_CPLD_LPC_REG_PWM_CONTROL_OFFSET	0x37
 #define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET	0x3a
 #define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET	0x3b
-#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET	0x3c
-#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET	0x3d
-#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET	0x3e
-#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET	0x3f
 #define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET	0x40
 #define MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET	0x41
 #define MLXPLAT_CPLD_LPC_REG_AGGRCO_OFFSET	0x42
 #define MLXPLAT_CPLD_LPC_REG_LC_SD_EVENT_OFFSET	0xaa
 #define MLXPLAT_CPLD_LPC_REG_LC_SD_MASK_OFFSET	0xab
 #define MLXPLAT_CPLD_LPC_REG_LC_PWR_ON		0xb2
+#define MLXPLAT_CPLD_LPC_REG_DBG1_OFFSET	0xb6
+#define MLXPLAT_CPLD_LPC_REG_DBG2_OFFSET	0xb7
+#define MLXPLAT_CPLD_LPC_REG_DBG3_OFFSET	0xb8
+#define MLXPLAT_CPLD_LPC_REG_DBG4_OFFSET	0xb9
 #define MLXPLAT_CPLD_LPC_REG_GP4_RO_OFFSET	0xc2
 #define MLXPLAT_CPLD_LPC_REG_SPI_CHNL_SELECT	0xc3
 #define MLXPLAT_CPLD_LPC_REG_WD_CLEAR_OFFSET	0xc7
 					 MLXPLAT_CPLD_AGGR_MASK_LC_SDWN)
 #define MLXPLAT_CPLD_LOW_AGGR_MASK_LOW	0xc1
 #define MLXPLAT_CPLD_LOW_AGGR_MASK_ASIC2	BIT(2)
-#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT	BIT(4)
+#define MLXPLAT_CPLD_LOW_AGGR_MASK_PWR_BUT	GENMASK(5, 4)
 #define MLXPLAT_CPLD_LOW_AGGR_MASK_I2C	BIT(6)
 #define MLXPLAT_CPLD_PSU_MASK		GENMASK(1, 0)
 #define MLXPLAT_CPLD_PWR_MASK		GENMASK(1, 0)
 #define MLXPLAT_CPLD_GWP_MASK		GENMASK(0, 0)
 #define MLXPLAT_CPLD_EROT_MASK		GENMASK(1, 0)
 #define MLXPLAT_CPLD_PWR_BUTTON_MASK	BIT(0)
-#define MLXPLAT_CPLD_LATCH_RST_MASK	BIT(5)
+#define MLXPLAT_CPLD_LATCH_RST_MASK	BIT(6)
 #define MLXPLAT_CPLD_THERMAL1_PDB_MASK	BIT(3)
 #define MLXPLAT_CPLD_THERMAL2_PDB_MASK	BIT(4)
 #define MLXPLAT_CPLD_INTRUSION_MASK	BIT(6)
 					     u8 action)
 {
 	dev_info(&mlxplat_dev->dev, "System shutdown due to short press of power button");
-	kernel_halt();
+	kernel_power_off();
 	return 0;
 }
 		.reg = MLXPLAT_CPLD_LPC_REG_PWRB_OFFSET,
 		.mask = MLXPLAT_CPLD_PWR_BUTTON_MASK,
 		.count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_pwr_events_items_data),
-		.inversed = 0,
+		.inversed = 1,
 		.health = false,
 	},
 	{
 		.reg = MLXPLAT_CPLD_LPC_REG_BRD_OFFSET,
 		.mask = MLXPLAT_CPLD_L1_CHA_HEALTH_MASK,
 		.count = ARRAY_SIZE(mlxplat_mlxcpld_l1_switch_health_events_items_data),
-		.inversed = 0,
+		.inversed = 1,
 		.health = false,
 		.ind = 8,
 	},
 	{
 		.label = "latch_reset",
 		.reg = MLXPLAT_CPLD_LPC_REG_GP1_OFFSET,
-		.mask = GENMASK(7, 0) & ~BIT(5),
+		.mask = GENMASK(7, 0) & ~BIT(6),
 		.mode = 0200,
 	},
 	{
 		if (priv->pdev_mux[i])
 			platform_device_unregister(priv->pdev_mux[i]);
 	}
-	mlxplat_post_exit();
 }
 static int mlxplat_i2c_main_complition_notify(void *handle, int id)
 		pm_power_off = NULL;
 	mlxplat_pre_exit(priv);
 	mlxplat_i2c_main_exit(priv);
+	mlxplat_post_exit();
 }
 module_exit(mlxplat_exit);

drivers/platform/x86/msi-ec.c+9−9

@@ -27,15 +27,15 @@ · 26 unmodified lines
27	#include <linux/seq_file.h>	27	#include <linux/seq_file.h>
28	#include <linux/string.h>	28	#include <linux/string.h>
29		29
30	static const char *const SM_ECO_NAME = "eco";	30	#define SM_ECO_NAME "eco"
31	static const char *const SM_COMFORT_NAME = "comfort";	31	#define SM_COMFORT_NAME "comfort"
32	static const char *const SM_SPORT_NAME = "sport";	32	#define SM_SPORT_NAME "sport"
33	static const char *const SM_TURBO_NAME = "turbo";	33	#define SM_TURBO_NAME "turbo"
34		34
35	static const char *const FM_AUTO_NAME = "auto";	35	#define FM_AUTO_NAME "auto"
36	static const char *const FM_SILENT_NAME = "silent";	36	#define FM_SILENT_NAME "silent"
37	static const char *const FM_BASIC_NAME = "basic";	37	#define FM_BASIC_NAME "basic"
38	static const char *const FM_ADVANCED_NAME = "advanced";	38	#define FM_ADVANCED_NAME "advanced"
39		39
40	static const char * const ALLOWED_FW_0[] __initconst = {	40	static const char * const ALLOWED_FW_0[] __initconst = {
41	"14C1EMS1.012",	41	"14C1EMS1.012",

drivers/platform/x86/serial-multi-instantiate.c+14−0

@@ -329,6 +329,19 @@ static const struct smi_node cs35l41_hda = { · 328 unmodified lines
329	.bus_type = SMI_AUTO_DETECT,	329	.bus_type = SMI_AUTO_DETECT,
330	};	330	};
331		331
		332	static const struct smi_node cs35l56_hda = {
		333	.instances = {
		334	{ "cs35l56-hda", IRQ_RESOURCE_AUTO, 0 },
		335	{ "cs35l56-hda", IRQ_RESOURCE_AUTO, 0 },
		336	{ "cs35l56-hda", IRQ_RESOURCE_AUTO, 0 },
		337	{ "cs35l56-hda", IRQ_RESOURCE_AUTO, 0 },
		338	/* a 5th entry is an alias address, not a real device */
		339	{ "cs35l56-hda_dummy_dev" },
		340	{}
		341	},
		342	.bus_type = SMI_AUTO_DETECT,
		343	};
		344
332	/*	345	/*
333	* Note new device-ids must also be added to ignore_serial_bus_ids in	346	* Note new device-ids must also be added to ignore_serial_bus_ids in
334	* drivers/acpi/scan.c: acpi_device_enumeration_by_parent().	347	* drivers/acpi/scan.c: acpi_device_enumeration_by_parent().
@@ -337,6 +350,7 @@ static const struct acpi_device_id smi_acpi_ids[] = { · 2 unmodified lines
337	{ "BSG1160", (unsigned long)&bsg1160_data },	350	{ "BSG1160", (unsigned long)&bsg1160_data },
338	{ "BSG2150", (unsigned long)&bsg2150_data },	351	{ "BSG2150", (unsigned long)&bsg2150_data },
339	{ "CSC3551", (unsigned long)&cs35l41_hda },	352	{ "CSC3551", (unsigned long)&cs35l41_hda },
		353	{ "CSC3556", (unsigned long)&cs35l56_hda },
340	{ "INT3515", (unsigned long)&int3515_data },	354	{ "INT3515", (unsigned long)&int3515_data },
341	/* Non-conforming _HID for Cirrus Logic already released */	355	/* Non-conforming _HID for Cirrus Logic already released */
342	{ "CLSA0100", (unsigned long)&cs35l41_hda },	356	{ "CLSA0100", (unsigned long)&cs35l41_hda },

drivers/powercap/intel_rapl_common.c+7−7

@@ -818,7 +818,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd, · 817 unmodified lines
818	return -EINVAL;	818	return -EINVAL;
819		819
820	ra.reg = rd->regs[rpi->id];	820	ra.reg = rd->regs[rpi->id];
821	if (!ra.reg)	821	if (!ra.reg.val)
822	return -EINVAL;	822	return -EINVAL;
823		823
824	/* non-hardware data are collected by the polling thread */	824	/* non-hardware data are collected by the polling thread */
@@ -830,7 +830,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd, · 5 unmodified lines
830	ra.mask = rpi->mask;	830	ra.mask = rpi->mask;
831		831
832	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {	832	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
833	pr_debug("failed to read reg 0x%llx for %s:%s\n", ra.reg, rd->rp->name, rd->name);	833	pr_debug("failed to read reg 0x%llx for %s:%s\n", ra.reg.val, rd->rp->name, rd->name);
834	return -EIO;	834	return -EIO;
835	}	835	}
836		836
@@ -920,7 +920,7 @@ static int rapl_check_unit_core(struct rapl_domain *rd) · 83 unmodified lines
920	ra.mask = ~0;	920	ra.mask = ~0;
921	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {	921	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
922	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",	922	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
923	ra.reg, rd->rp->name, rd->name);	923	ra.reg.val, rd->rp->name, rd->name);
924	return -ENODEV;	924	return -ENODEV;
925	}	925	}
926		926
@@ -948,7 +948,7 @@ static int rapl_check_unit_atom(struct rapl_domain *rd) · 21 unmodified lines
948	ra.mask = ~0;	948	ra.mask = ~0;
949	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {	949	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
950	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",	950	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
951	ra.reg, rd->rp->name, rd->name);	951	ra.reg.val, rd->rp->name, rd->name);
952	return -ENODEV;	952	return -ENODEV;
953	}	953	}
954		954
@@ -1135,7 +1135,7 @@ static int rapl_check_unit_tpmi(struct rapl_domain *rd) · 180 unmodified lines
1135	ra.mask = ~0;	1135	ra.mask = ~0;
1136	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {	1136	if (rd->rp->priv->read_raw(get_rid(rd->rp), &ra)) {
1137	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",	1137	pr_err("Failed to read power unit REG 0x%llx on %s:%s, exit.\n",
1138	ra.reg, rd->rp->name, rd->name);	1138	ra.reg.val, rd->rp->name, rd->name);
1139	return -ENODEV;	1139	return -ENODEV;
1140	}	1140	}
1141		1141
@@ -1411,8 +1411,8 @@ static int rapl_get_domain_unit(struct rapl_domain *rd) · 269 unmodified lines
1411	struct rapl_defaults *defaults = get_defaults(rd->rp);	1411	struct rapl_defaults *defaults = get_defaults(rd->rp);
1412	int ret;	1412	int ret;
1413		1413
1414	if (!rd->regs[RAPL_DOMAIN_REG_UNIT]) {	1414	if (!rd->regs[RAPL_DOMAIN_REG_UNIT].val) {
1415	if (!rd->rp->priv->reg_unit) {	1415	if (!rd->rp->priv->reg_unit.val) {
1416	pr_err("No valid Unit register found\n");	1416	pr_err("No valid Unit register found\n");
1417	return -ENODEV;	1417	return -ENODEV;
1418	}	1418	}

drivers/powercap/intel_rapl_msr.c+25−24

@@ -34,28 +34,32 @@ static struct rapl_if_priv *rapl_msr_priv; · 33 unmodified lines
34		34
35	static struct rapl_if_priv rapl_msr_priv_intel = {	35	static struct rapl_if_priv rapl_msr_priv_intel = {
36	.type = RAPL_IF_MSR,	36	.type = RAPL_IF_MSR,
37	.reg_unit = MSR_RAPL_POWER_UNIT,	37	.reg_unit.msr = MSR_RAPL_POWER_UNIT,
38	.regs[RAPL_DOMAIN_PACKAGE] = {	38	.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PKG_POWER_LIMIT,
39	MSR_PKG_POWER_LIMIT, MSR_PKG_ENERGY_STATUS, MSR_PKG_PERF_STATUS, 0, MSR_PKG_POWER_INFO },	39	.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_PKG_ENERGY_STATUS,
40	.regs[RAPL_DOMAIN_PP0] = {	40	.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PERF].msr = MSR_PKG_PERF_STATUS,
41	MSR_PP0_POWER_LIMIT, MSR_PP0_ENERGY_STATUS, 0, MSR_PP0_POLICY, 0 },	41	.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_INFO].msr = MSR_PKG_POWER_INFO,
42	.regs[RAPL_DOMAIN_PP1] = {	42	.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP0_POWER_LIMIT,
43	MSR_PP1_POWER_LIMIT, MSR_PP1_ENERGY_STATUS, 0, MSR_PP1_POLICY, 0 },	43	.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP0_ENERGY_STATUS,
44	.regs[RAPL_DOMAIN_DRAM] = {	44	.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP0_POLICY,
45	MSR_DRAM_POWER_LIMIT, MSR_DRAM_ENERGY_STATUS, MSR_DRAM_PERF_STATUS, 0, MSR_DRAM_POWER_INFO },	45	.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP1_POWER_LIMIT,
46	.regs[RAPL_DOMAIN_PLATFORM] = {	46	.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP1_ENERGY_STATUS,
47	MSR_PLATFORM_POWER_LIMIT, MSR_PLATFORM_ENERGY_STATUS, 0, 0, 0},	47	.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP1_POLICY,
		48	.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_DRAM_POWER_LIMIT,
		49	.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_STATUS].msr = MSR_DRAM_ENERGY_STATUS,
		50	.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_PERF].msr = MSR_DRAM_PERF_STATUS,
		51	.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_INFO].msr = MSR_DRAM_POWER_INFO,
		52	.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PLATFORM_POWER_LIMIT,
		53	.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS].msr = MSR_PLATFORM_ENERGY_STATUS,
48	.limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2),	54	.limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2),
49	.limits[RAPL_DOMAIN_PLATFORM] = BIT(POWER_LIMIT2),	55	.limits[RAPL_DOMAIN_PLATFORM] = BIT(POWER_LIMIT2),
50	};	56	};
51		57
52	static struct rapl_if_priv rapl_msr_priv_amd = {	58	static struct rapl_if_priv rapl_msr_priv_amd = {
53	.type = RAPL_IF_MSR,	59	.type = RAPL_IF_MSR,
54	.reg_unit = MSR_AMD_RAPL_POWER_UNIT,	60	.reg_unit.msr = MSR_AMD_RAPL_POWER_UNIT,
55	.regs[RAPL_DOMAIN_PACKAGE] = {	61	.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_PKG_ENERGY_STATUS,
56	0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 },	62	.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_CORE_ENERGY_STATUS,
57	.regs[RAPL_DOMAIN_PP0] = {
58	0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 },
59	};	63	};
60		64
61	/* Handles CPU hotplug on multi-socket systems.	65	/* Handles CPU hotplug on multi-socket systems.
@@ -99,10 +103,8 @@ static int rapl_cpu_down_prep(unsigned int cpu) · 37 unmodified lines
99		103
100	static int rapl_msr_read_raw(int cpu, struct reg_action *ra)	104	static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
101	{	105	{
102	u32 msr = (u32)ra->reg;	106	if (rdmsrl_safe_on_cpu(cpu, ra->reg.msr, &ra->value)) {
103		107	pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg.msr, cpu);
104	if (rdmsrl_safe_on_cpu(cpu, msr, &ra->value)) {
105	pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
106	return -EIO;	108	return -EIO;
107	}	109	}
108	ra->value &= ra->mask;	110	ra->value &= ra->mask;
@@ -112,17 +114,16 @@ static int rapl_msr_read_raw(int cpu, struct reg_action *ra) · 3 unmodified lines
112	static void rapl_msr_update_func(void *info)	114	static void rapl_msr_update_func(void *info)
113	{	115	{
114	struct reg_action *ra = info;	116	struct reg_action *ra = info;
115	u32 msr = (u32)ra->reg;
116	u64 val;	117	u64 val;
117		118
118	ra->err = rdmsrl_safe(msr, &val);	119	ra->err = rdmsrl_safe(ra->reg.msr, &val);
119	if (ra->err)	120	if (ra->err)
120	return;	121	return;
121		122
122	val &= ~ra->mask;	123	val &= ~ra->mask;
123	val \|= ra->value;	124	val \|= ra->value;
124		125
125	ra->err = wrmsrl_safe(msr, val);	126	ra->err = wrmsrl_safe(ra->reg.msr, val);
126	}	127	}
127		128
128	static int rapl_msr_write_raw(int cpu, struct reg_action *ra)	129	static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
@@ -171,7 +172,7 @@ static int rapl_msr_probe(struct platform_device *pdev) · 42 unmodified lines
171		172
172	if (id) {	173	if (id) {
173	rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] \|= BIT(POWER_LIMIT4);	174	rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] \|= BIT(POWER_LIMIT4);
174	rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4] =	175	rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4].msr =
175	MSR_VR_CURRENT_CONFIG;	176	MSR_VR_CURRENT_CONFIG;
176	pr_info("PL4 support detected.\n");	177	pr_info("PL4 support detected.\n");
177	}	178	}

drivers/powercap/intel_rapl_tpmi.c+8−9

 static int tpmi_rapl_read_raw(int id, struct reg_action *ra)
 {
-	if (!ra->reg)
+	if (!ra->reg.mmio)
 		return -EINVAL;
-	ra->value = readq((void __iomem *)ra->reg);
+	ra->value = readq(ra->reg.mmio);
 	ra->value &= ra->mask;
 	return 0;
 {
 	u64 val;
-	if (!ra->reg)
+	if (!ra->reg.mmio)
 		return -EINVAL;
-	val = readq((void __iomem *)ra->reg);
+	val = readq(ra->reg.mmio);
 	val &= ~ra->mask;
 	val |= ra->value;
-	writeq(val, (void __iomem *)ra->reg);
+	writeq(val, ra->reg.mmio);
 	return 0;
 }
 	enum tpmi_rapl_register reg_index;
 	enum rapl_domain_reg_id reg_id;
 	int tpmi_domain_size, tpmi_domain_flags;
-	u64 *tpmi_rapl_regs = trp->base + offset;
+	u64 tpmi_domain_header = readq(trp->base + offset);
-	u64 tpmi_domain_header = readq((void __iomem *)tpmi_rapl_regs);
 	/* Domain Parent bits are ignored for now */
 	tpmi_domain_version = tpmi_domain_header & 0xff;
 		return -EINVAL;
 	}
-	if (trp->priv.regs[domain_type][RAPL_DOMAIN_REG_UNIT]) {
+	if (trp->priv.regs[domain_type][RAPL_DOMAIN_REG_UNIT].mmio) {
 		pr_warn(FW_BUG "Duplicate Domain type %d\n", tpmi_domain_type);
 		return -EINVAL;
 	}
 		default:
 			continue;
 		}
-		trp->priv.regs[domain_type][reg_id] = (u64)&tpmi_rapl_regs[reg_index];
+		trp->priv.regs[domain_type][reg_id].mmio = trp->base + offset + reg_index * 8;
 	}
 	return 0;

drivers/s390/net/qeth_core.h+0−1

@@ -716,7 +716,6 @@ struct qeth_card_info { · 715 unmodified lines
716	u16 chid;	716	u16 chid;
717	u8 ids_valid:1; /* cssid,iid,chid */	717	u8 ids_valid:1; /* cssid,iid,chid */
718	u8 dev_addr_is_registered:1;	718	u8 dev_addr_is_registered:1;
719	u8 open_when_online:1;
720	u8 promisc_mode:1;	719	u8 promisc_mode:1;
721	u8 use_v1_blkt:1;	720	u8 use_v1_blkt:1;
722	u8 is_vm_nic:1;	721	u8 is_vm_nic:1;

drivers/s390/net/qeth_core_main.c+0−2

@@ -5373,8 +5373,6 @@ int qeth_set_offline(struct qeth_card card, const struct qeth_discipline disc, · 5372 unmodified lines
5373	qeth_clear_ipacmd_list(card);	5373	qeth_clear_ipacmd_list(card);
5374		5374
5375	rtnl_lock();	5375	rtnl_lock();
5376	card->info.open_when_online = card->dev->flags & IFF_UP;
5377	dev_close(card->dev);
5378	netif_device_detach(card->dev);	5376	netif_device_detach(card->dev);
5379	netif_carrier_off(card->dev);	5377	netif_carrier_off(card->dev);
5380	rtnl_unlock();	5378	rtnl_unlock();

drivers/s390/net/qeth_l2_main.c+6−3

 		qeth_enable_hw_features(dev);
 		qeth_l2_enable_brport_features(card);
-		if (card->info.open_when_online) {
+		if (netif_running(dev)) {
-			card->info.open_when_online = 0;
+			local_bh_disable();
-			dev_open(dev, NULL);
+			napi_schedule(&card->napi);
+			/* kick-start the NAPI softirq: */
+			local_bh_enable();
+			qeth_l2_set_rx_mode(dev);
 		}
 		rtnl_unlock();
 	}

drivers/s390/net/qeth_l3_main.c+5−3

 		netif_device_attach(dev);
 		qeth_enable_hw_features(dev);
-		if (card->info.open_when_online) {
+		if (netif_running(dev)) {
-			card->info.open_when_online = 0;
+			local_bh_disable();
-			dev_open(dev, NULL);
+			napi_schedule(&card->napi);
+			/* kick-start the NAPI softirq: */
+			local_bh_enable();
 		}
 		rtnl_unlock();
 	}

drivers/s390/scsi/zfcp_fc.c+1−5

 	/* re-init to undo drop from zfcp_fc_adisc() */
 	port->d_id = ntoh24(adisc_resp->adisc_port_id);
-	/* port is good, unblock rport without going through erp */
+	/* port is still good, nothing to do */
-	zfcp_scsi_schedule_rport_register(port);
  out:
 	atomic_andnot(ZFCP_STATUS_PORT_LINK_TEST, &port->status);
 	put_device(&port->dev);
 	int retval;
 	set_worker_desc("zadisc%16llx", port->wwpn); /* < WORKER_DESC_LEN=24 */
-	get_device(&port->dev);
-	port->rport_task = RPORT_DEL;
-	zfcp_scsi_rport_work(&port->rport_work);
 	/* only issue one test command at one time per port */
 	if (atomic_read(&port->status) & ZFCP_STATUS_PORT_LINK_TEST)

drivers/scsi/53c700.c+1−1

@@ -1598,7 +1598,7 @@ NCR_700_intr(int irq, void *dev_id) · 1597 unmodified lines
1598	printk("scsi%d (%d:%d) PHASE MISMATCH IN SEND MESSAGE %d remain, return %p[%04x], phase %s\n", host->host_no, pun, lun, count, (void *)temp, temp - hostdata->pScript, sbcl_to_string(NCR_700_readb(host, SBCL_REG)));	1598	printk("scsi%d (%d:%d) PHASE MISMATCH IN SEND MESSAGE %d remain, return %p[%04x], phase %s\n", host->host_no, pun, lun, count, (void *)temp, temp - hostdata->pScript, sbcl_to_string(NCR_700_readb(host, SBCL_REG)));
1599	#endif	1599	#endif
1600	resume_offset = hostdata->pScript + Ent_SendMessagePhaseMismatch;	1600	resume_offset = hostdata->pScript + Ent_SendMessagePhaseMismatch;
1601	} else if(dsp >= to32bit(&slot->pSG[0].ins) &&	1601	} else if (slot && dsp >= to32bit(&slot->pSG[0].ins) &&
1602	dsp <= to32bit(&slot->pSG[NCR_700_SG_SEGMENTS].ins)) {	1602	dsp <= to32bit(&slot->pSG[NCR_700_SG_SEGMENTS].ins)) {
1603	int data_transfer = NCR_700_readl(host, DBC_REG) & 0xffffff;	1603	int data_transfer = NCR_700_readl(host, DBC_REG) & 0xffffff;
1604	int SGcount = (dsp - to32bit(&slot->pSG[0].ins))/sizeof(struct NCR_700_SG_List);	1604	int SGcount = (dsp - to32bit(&slot->pSG[0].ins))/sizeof(struct NCR_700_SG_List);

drivers/scsi/fnic/fnic.h+1−1

@@ -27,7 +27,7 @@ · 26 unmodified lines
27		27
28	#define DRV_NAME "fnic"	28	#define DRV_NAME "fnic"
29	#define DRV_DESCRIPTION "Cisco FCoE HBA Driver"	29	#define DRV_DESCRIPTION "Cisco FCoE HBA Driver"
30	#define DRV_VERSION "1.6.0.54"	30	#define DRV_VERSION "1.6.0.55"
31	#define PFX DRV_NAME ": "	31	#define PFX DRV_NAME ": "
32	#define DFX DRV_NAME "%d: "	32	#define DFX DRV_NAME "%d: "
33		33

drivers/scsi/fnic/fnic_scsi.c+4−2

 				     bool new_sc)
 {
-	int ret = SUCCESS;
+	int ret = 0;
 	struct fnic_pending_aborts_iter_data iter_data = {
 		.fnic = fnic,
 		.lun_dev = lr_sc->device,
 	/* walk again to check, if IOs are still pending in fw */
 	if (fnic_is_abts_pending(fnic, lr_sc))
-		ret = FAILED;
+		ret = 1;
 clean_pending_aborts_end:
+	FNIC_SCSI_DBG(KERN_INFO, fnic->lport->host,
+			"%s: exit status: %d\n", __func__, ret);
 	return ret;
 }

drivers/scsi/lpfc/lpfc_scsi.c+3−17

 	}
 }
-#define LPFC_INVALID_REFTAG ((u32)-1)
 /**
  * lpfc_rampdown_queue_depth - Post RAMP_DOWN_QUEUE event to worker thread
  * @phba: The Hba for which this call is being executed.
 	sgpe = scsi_prot_sglist(sc);
 	lba = scsi_prot_ref_tag(sc);
-	if (lba == LPFC_INVALID_REFTAG)
-		return 0;
 	/* First check if we need to match the LBA */
 	if (phba->lpfc_injerr_lba != LPFC_INJERR_LBA_OFF) {
 	/* extract some info from the scsi command for pde*/
 	reftag = scsi_prot_ref_tag(sc);
-	if (reftag == LPFC_INVALID_REFTAG)
-		goto out;
 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 	rc = lpfc_bg_err_inject(phba, sc, &reftag, NULL, 1);
 	/* extract some info from the scsi command */
 	blksize = scsi_prot_interval(sc);
 	reftag = scsi_prot_ref_tag(sc);
-	if (reftag == LPFC_INVALID_REFTAG)
-		goto out;
 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 	rc = lpfc_bg_err_inject(phba, sc, &reftag, NULL, 1);
 	/* extract some info from the scsi command for pde*/
 	reftag = scsi_prot_ref_tag(sc);
-	if (reftag == LPFC_INVALID_REFTAG)
-		goto out;
 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 	rc = lpfc_bg_err_inject(phba, sc, &reftag, NULL, 1);
 	/* extract some info from the scsi command */
 	blksize = scsi_prot_interval(sc);
 	reftag = scsi_prot_ref_tag(sc);
-	if (reftag == LPFC_INVALID_REFTAG)
-		goto out;
 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
 	rc = lpfc_bg_err_inject(phba, sc, &reftag, NULL, 1);
 		src = (struct scsi_dif_tuple *)sg_virt(sgpe);
 		start_ref_tag = scsi_prot_ref_tag(cmd);
-		if (start_ref_tag == LPFC_INVALID_REFTAG)
-			goto out;
 		start_app_tag = src->app_tag;
 		len = sgpe->length;
 		while (src && protsegcnt) {
 			     scsi_cmnd->sc_data_direction);
 	lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
-			"9084 Cannot setup S/G List for HBA"
+			"9084 Cannot setup S/G List for HBA "
-			"IO segs %d/%d SGL %d SCSI %d: %d %d\n",
+			"IO segs %d/%d SGL %d SCSI %d: %d %d %d\n",
 			lpfc_cmd->seg_cnt, lpfc_cmd->prot_seg_cnt,
 			phba->cfg_total_seg_cnt, phba->cfg_sg_seg_cnt,
-			prot_group_type, num_sge);
+			prot_group_type, num_sge, ret);
 	lpfc_cmd->seg_cnt = 0;
 	lpfc_cmd->prot_seg_cnt = 0;

drivers/scsi/pm8001/pm8001_init.c+2−1

@@ -1181,7 +1181,8 @@ static int pm8001_pci_probe(struct pci_dev *pdev, · 1180 unmodified lines
1181	pm80xx_set_thermal_config(pm8001_ha);	1181	pm80xx_set_thermal_config(pm8001_ha);
1182	}	1182	}
1183		1183
1184	if (pm8001_init_sas_add(pm8001_ha))	1184	rc = pm8001_init_sas_add(pm8001_ha);
		1185	if (rc)
1185	goto err_out_shost;	1186	goto err_out_shost;
1186	/* phy setting support for motherboard controller */	1187	/* phy setting support for motherboard controller */
1187	rc = pm8001_configure_phy_settings(pm8001_ha);	1188	rc = pm8001_configure_phy_settings(pm8001_ha);

drivers/scsi/qedf/qedf_main.c+18−0

 static void qedf_shutdown(struct pci_dev *pdev);
 static void qedf_schedule_recovery_handler(void *dev);
 static void qedf_recovery_handler(struct work_struct *work);
+static int qedf_suspend(struct pci_dev *pdev, pm_message_t state);
 /*
  * Driver module parameters.
 	.probe = qedf_probe,
 	.remove = qedf_remove,
 	.shutdown = qedf_shutdown,
+	.suspend = qedf_suspend,
 };
 static int __qedf_probe(struct pci_dev *pdev, int mode)
 	__qedf_remove(pdev, QEDF_MODE_NORMAL);
 }
+static int qedf_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+	struct qedf_ctx *qedf;
+	if (!pdev) {
+		QEDF_ERR(NULL, "pdev is NULL.\n");
+		return -ENODEV;
+	}
+	qedf = pci_get_drvdata(pdev);
+	QEDF_ERR(&qedf->dbg_ctx, "%s: Device does not support suspend operation\n", __func__);
+	return -EPERM;
+}
 /*
  * Recovery handler code
  */

drivers/scsi/qedi/qedi_main.c+21−2

 static void qedi_recovery_handler(struct work_struct *work);
 static void qedi_schedule_hw_err_handler(void *dev,
 					 enum qed_hw_err_type err_type);
+static int qedi_suspend(struct pci_dev *pdev, pm_message_t state);
 static int qedi_iscsi_event_cb(void *context, u8 fw_event_code, void *fw_handle)
 {
 	struct qedi_percpu_s *p = this_cpu_ptr(&qedi_percpu);
 	struct qedi_work *work, *tmp;
 	struct task_struct *thread;
+	unsigned long flags;
-	spin_lock_bh(&p->p_work_lock);
+	spin_lock_irqsave(&p->p_work_lock, flags);
 	thread = p->iothread;
 	p->iothread = NULL;
 			kfree(work);
 	}
-	spin_unlock_bh(&p->p_work_lock);
+	spin_unlock_irqrestore(&p->p_work_lock, flags);
 	if (thread)
 		kthread_stop(thread);
 	return 0;
 	__qedi_remove(pdev, QEDI_MODE_SHUTDOWN);
 }
+static int qedi_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+	struct qedi_ctx *qedi;
+	if (!pdev) {
+		QEDI_ERR(NULL, "pdev is NULL.\n");
+		return -ENODEV;
+	}
+	qedi = pci_get_drvdata(pdev);
+	QEDI_ERR(&qedi->dbg_ctx, "%s: Device does not support suspend operation\n", __func__);
+	return -EPERM;
+}
 static int __qedi_probe(struct pci_dev *pdev, int mode)
 {
 	struct qedi_ctx *qedi;
 	.remove = qedi_remove,
 	.shutdown = qedi_shutdown,
 	.err_handler = &qedi_err_handler,
+	.suspend = qedi_suspend,
 };
 static int __init qedi_init(void)

drivers/scsi/raid_class.c+1−0

@@ -248,6 +248,7 @@ int raid_component_add(struct raid_template r,struct device raid_dev, · 247 unmodified lines
248	return 0;	248	return 0;
249		249
250	err_out:	250	err_out:
		251	put_device(&rc->dev);
251	list_del(&rc->node);	252	list_del(&rc->node);
252	rd->component_count--;	253	rd->component_count--;
253	put_device(component_dev);	254	put_device(component_dev);

drivers/scsi/scsi_proc.c+17−13

 			       size_t length, loff_t *ppos)
 {
 	int host, channel, id, lun;
-	char *buffer, *p;
+	char *buffer, *end, *p;
 	int err;
 	if (!buf || length > PAGE_SIZE)
 		goto out;
 	err = -EINVAL;
-	if (length < PAGE_SIZE)
+	if (length < PAGE_SIZE) {
-		buffer[length] = '\0';
+		end = buffer + length;
-	else if (buffer[PAGE_SIZE-1])
+		*end = '\0';
-		goto out;
+	} else {
+		end = buffer + PAGE_SIZE - 1;
+		if (*end)
+			goto out;
+	}
 	/*
 	 * Usage: echo "scsi add-single-device 0 1 2 3" >/proc/scsi/scsi
 	if (!strncmp("scsi add-single-device", buffer, 22)) {
 		p = buffer + 23;
-		host = simple_strtoul(p, &p, 0);
+		host    = (p     < end) ? simple_strtoul(p, &p, 0) : 0;
-		channel = simple_strtoul(p + 1, &p, 0);
+		channel = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
-		id = simple_strtoul(p + 1, &p, 0);
+		id      = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
-		lun = simple_strtoul(p + 1, &p, 0);
+		lun     = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
 		err = scsi_add_single_device(host, channel, id, lun);
 	} else if (!strncmp("scsi remove-single-device", buffer, 25)) {
 		p = buffer + 26;
-		host = simple_strtoul(p, &p, 0);
+		host    = (p     < end) ? simple_strtoul(p, &p, 0) : 0;
-		channel = simple_strtoul(p + 1, &p, 0);
+		channel = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
-		id = simple_strtoul(p + 1, &p, 0);
+		id      = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
-		lun = simple_strtoul(p + 1, &p, 0);
+		lun     = (p + 1 < end) ? simple_strtoul(p + 1, &p, 0) : 0;
 		err = scsi_remove_single_device(host, channel, id, lun);
 	}

drivers/scsi/sd.c+6−3

 static int sd_resume(struct device *dev)
 {
 	struct scsi_disk *sdkp = dev_get_drvdata(dev);
-	int ret;
+	int ret = 0;
 	if (!sdkp)	/* E.g.: runtime resume at the start of sd_probe() */
 		return 0;
 	if (!sdkp->device->manage_start_stop)
 		return 0;
-	sd_printk(KERN_NOTICE, sdkp, "Starting disk\n");
+	if (!sdkp->device->no_start_on_resume) {
-	ret = sd_start_stop_device(sdkp, 1);
+		sd_printk(KERN_NOTICE, sdkp, "Starting disk\n");
+		ret = sd_start_stop_device(sdkp, 1);
+	}
 	if (!ret)
 		opal_unlock_from_suspend(sdkp->opal_dev);
 	return ret;

drivers/scsi/snic/snic_disc.c+1−0

@@ -303,6 +303,7 @@ snic_tgt_create(struct snic snic, struct snic_tgt_id tgtid) · 302 unmodified lines
303	"Snic Tgt: device_add, with err = %d\n",	303	"Snic Tgt: device_add, with err = %d\n",
304	ret);	304	ret);
305		305
		306	put_device(&tgt->dev);
306	put_device(&snic->shost->shost_gendev);	307	put_device(&snic->shost->shost_gendev);
307	spin_lock_irqsave(snic->shost->host_lock, flags);	308	spin_lock_irqsave(snic->shost->host_lock, flags);
308	list_del(&tgt->list);	309	list_del(&tgt->list);

drivers/scsi/storvsc_drv.c+4−4

 #define STORVSC_FC_MAX_LUNS_PER_TARGET			255
 #define STORVSC_FC_MAX_TARGETS				128
 #define STORVSC_FC_MAX_CHANNELS				8
+#define STORVSC_FC_MAX_XFER_SIZE			((u32)(512 * 1024))
 #define STORVSC_IDE_MAX_LUNS_PER_TARGET			64
 #define STORVSC_IDE_MAX_TARGETS				1
  */
 static enum scsi_timeout_action storvsc_eh_timed_out(struct scsi_cmnd *scmnd)
 {
-#if IS_ENABLED(CONFIG_SCSI_FC_ATTRS)
-	if (scmnd->device->host->transportt == fc_transport_template)
-		return fc_eh_timed_out(scmnd);
-#endif
 	return SCSI_EH_RESET_TIMER;
 }
 	 * protecting it from any weird value.
 	 */
 	max_xfer_bytes = round_down(stor_device->max_transfer_bytes, HV_HYP_PAGE_SIZE);
+	if (is_fc)
+		max_xfer_bytes = min(max_xfer_bytes, STORVSC_FC_MAX_XFER_SIZE);
 	/* max_hw_sectors_kb */
 	host->max_sectors = max_xfer_bytes >> 9;
 	/*

drivers/soc/imx/imx8mp-blk-ctrl.c+1−1

@@ -164,7 +164,7 @@ static int imx8mp_hsio_blk_ctrl_probe(struct imx8mp_blk_ctrl *bc) · 163 unmodified lines
164	clk_hsio_pll->hw.init = &init;	164	clk_hsio_pll->hw.init = &init;
165		165
166	hw = &clk_hsio_pll->hw;	166	hw = &clk_hsio_pll->hw;
167	ret = devm_clk_hw_register(bc->dev, hw);	167	ret = devm_clk_hw_register(bc->bus_power_dev, hw);
168	if (ret)	168	if (ret)
169	return ret;	169	return ret;
170		170

drivers/thermal/intel/int340x_thermal/processor_thermal_rapl.c+8−8

@@ -57,10 +57,10 @@ static int rapl_mmio_cpu_down_prep(unsigned int cpu) · 56 unmodified lines
57		57
58	static int rapl_mmio_read_raw(int cpu, struct reg_action *ra)	58	static int rapl_mmio_read_raw(int cpu, struct reg_action *ra)
59	{	59	{
60	if (!ra->reg)	60	if (!ra->reg.mmio)
61	return -EINVAL;	61	return -EINVAL;
62		62
63	ra->value = readq((void __iomem *)ra->reg);	63	ra->value = readq(ra->reg.mmio);
64	ra->value &= ra->mask;	64	ra->value &= ra->mask;
65	return 0;	65	return 0;
66	}	66	}
@@ -69,13 +69,13 @@ static int rapl_mmio_write_raw(int cpu, struct reg_action *ra) · 2 unmodified lines
69	{	69	{
70	u64 val;	70	u64 val;
71		71
72	if (!ra->reg)	72	if (!ra->reg.mmio)
73	return -EINVAL;	73	return -EINVAL;
74		74
75	val = readq((void __iomem *)ra->reg);	75	val = readq(ra->reg.mmio);
76	val &= ~ra->mask;	76	val &= ~ra->mask;
77	val \|= ra->value;	77	val \|= ra->value;
78	writeq(val, (void __iomem *)ra->reg);	78	writeq(val, ra->reg.mmio);
79	return 0;	79	return 0;
80	}	80	}
81		81
@@ -92,13 +92,13 @@ int proc_thermal_rapl_add(struct pci_dev pdev, struct proc_thermal_device proc · 10 unmodified lines
92	for (domain = RAPL_DOMAIN_PACKAGE; domain < RAPL_DOMAIN_MAX; domain++) {	92	for (domain = RAPL_DOMAIN_PACKAGE; domain < RAPL_DOMAIN_MAX; domain++) {
93	for (reg = RAPL_DOMAIN_REG_LIMIT; reg < RAPL_DOMAIN_REG_MAX; reg++)	93	for (reg = RAPL_DOMAIN_REG_LIMIT; reg < RAPL_DOMAIN_REG_MAX; reg++)
94	if (rapl_regs->regs[domain][reg])	94	if (rapl_regs->regs[domain][reg])
95	rapl_mmio_priv.regs[domain][reg] =	95	rapl_mmio_priv.regs[domain][reg].mmio =
96	(u64)proc_priv->mmio_base +	96	proc_priv->mmio_base +
97	rapl_regs->regs[domain][reg];	97	rapl_regs->regs[domain][reg];
98	rapl_mmio_priv.limits[domain] = rapl_regs->limits[domain];	98	rapl_mmio_priv.limits[domain] = rapl_regs->limits[domain];
99	}	99	}
100	rapl_mmio_priv.type = RAPL_IF_MMIO;	100	rapl_mmio_priv.type = RAPL_IF_MMIO;
101	rapl_mmio_priv.reg_unit = (u64)proc_priv->mmio_base + rapl_regs->reg_unit;	101	rapl_mmio_priv.reg_unit.mmio = proc_priv->mmio_base + rapl_regs->reg_unit;
102		102
103	rapl_mmio_priv.read_raw = rapl_mmio_read_raw;	103	rapl_mmio_priv.read_raw = rapl_mmio_read_raw;
104	rapl_mmio_priv.write_raw = rapl_mmio_write_raw;	104	rapl_mmio_priv.write_raw = rapl_mmio_write_raw;

drivers/thunderbolt/tb.c+2−0

@@ -1964,6 +1964,8 @@ unlock: · 1963 unmodified lines
1964		1964
1965	pm_runtime_mark_last_busy(&tb->dev);	1965	pm_runtime_mark_last_busy(&tb->dev);
1966	pm_runtime_put_autosuspend(&tb->dev);	1966	pm_runtime_put_autosuspend(&tb->dev);
		1967
		1968	kfree(ev);
1967	}	1969	}
1968		1970
1969	static void tb_queue_dp_bandwidth_request(struct tb *tb, u64 route, u8 port)	1971	static void tb_queue_dp_bandwidth_request(struct tb *tb, u64 route, u8 port)

drivers/thunderbolt/tmu.c+3−1

 		 * uni-directional mode and we don't want to change it's TMU
 		 * mode.
 		 */
-		tb_switch_tmu_rate_write(sw, tmu_rates[TB_SWITCH_TMU_MODE_OFF]);
+		ret = tb_switch_tmu_rate_write(sw, tmu_rates[TB_SWITCH_TMU_MODE_OFF]);
+		if (ret)
+			return ret;
 		tb_port_tmu_time_sync_disable(up);
 		ret = tb_port_tmu_time_sync_disable(down);

drivers/ufs/host/ufs-renesas.c+1−1

@@ -359,7 +359,7 @@ static int ufs_renesas_init(struct ufs_hba *hba) · 358 unmodified lines
359	{	359	{
360	struct ufs_renesas_priv *priv;	360	struct ufs_renesas_priv *priv;
361		361
362	priv = devm_kmalloc(hba->dev, sizeof(*priv), GFP_KERNEL);	362	priv = devm_kzalloc(hba->dev, sizeof(*priv), GFP_KERNEL);
363	if (!priv)	363	if (!priv)
364	return -ENOMEM;	364	return -ENOMEM;
365	ufshcd_set_variant(hba, priv);	365	ufshcd_set_variant(hba, priv);

drivers/usb/common/usb-conn-gpio.c+5−1

 	struct power_supply_desc desc;
 	struct power_supply *charger;
+	bool initial_detection;
 };
 /*
 	dev_dbg(info->dev, "role %s -> %s, gpios: id %d, vbus %d\n",
 		usb_role_string(info->last_role), usb_role_string(role), id, vbus);
-	if (info->last_role == role) {
+	if (!info->initial_detection && info->last_role == role) {
 		dev_warn(info->dev, "repeated role: %s\n", usb_role_string(role));
 		return;
 	}
+	info->initial_detection = false;
 	if (info->last_role == USB_ROLE_HOST && info->vbus)
 		regulator_disable(info->vbus);
 	device_set_wakeup_capable(&pdev->dev, true);
 	/* Perform initial detection */
+	info->initial_detection = true;
 	usb_conn_queue_dwork(info, 0);
 	return 0;

drivers/usb/dwc3/gadget.c+8−1

 	u32 count;
 	if (pm_runtime_suspended(dwc->dev)) {
+		dwc->pending_events = true;
+		/*
+		 * Trigger runtime resume. The get() function will be balanced
+		 * after processing the pending events in dwc3_process_pending
+		 * events().
+		 */
 		pm_runtime_get(dwc->dev);
 		disable_irq_nosync(dwc->irq_gadget);
-		dwc->pending_events = true;
 		return IRQ_HANDLED;
 	}
 {
 	if (dwc->pending_events) {
 		dwc3_interrupt(dwc->irq_gadget, dwc->ev_buf);
+		dwc3_thread_interrupt(dwc->irq_gadget, dwc->ev_buf);
+		pm_runtime_put(dwc->dev);
 		dwc->pending_events = false;
 		enable_irq(dwc->irq_gadget);
 	}

drivers/usb/gadget/udc/core.c+9−0

  * usb_gadget_activate() is called.  For example, user mode components may
  * need to be activated before the system can talk to hosts.
  *
+ * This routine may sleep; it must not be called in interrupt context
+ * (such as from within a gadget driver's disconnect() callback).
+ *
  * Returns zero on success, else negative errno.
  */
 int usb_gadget_deactivate(struct usb_gadget *gadget)
  * This routine activates gadget which was previously deactivated with
  * usb_gadget_deactivate() call. It calls usb_gadget_connect() if needed.
  *
+ * This routine may sleep; it must not be called in interrupt context.
+ *
  * Returns zero on success, else negative errno.
  */
 int usb_gadget_activate(struct usb_gadget *gadget)
 	usb_gadget_disable_async_callbacks(udc);
 	if (gadget->irq)
 		synchronize_irq(gadget->irq);
+	mutex_unlock(&udc->connect_lock);
 	udc->driver->unbind(gadget);
+	mutex_lock(&udc->connect_lock);
 	usb_gadget_udc_stop_locked(udc);
 	mutex_unlock(&udc->connect_lock);

drivers/usb/storage/alauda.c+9−3

 	rc = usb_stor_ctrl_transfer(us, us->recv_ctrl_pipe,
 		command, 0xc0, 0, 1, data, 2);
-	usb_stor_dbg(us, "Media status %02X %02X\n", data[0], data[1]);
+	if (rc == USB_STOR_XFER_GOOD)
+		usb_stor_dbg(us, "Media status %02X %02X\n", data[0], data[1]);
 	return rc;
 }
 static int alauda_check_media(struct us_data *us)
 {
 	struct alauda_info *info = (struct alauda_info *) us->extra;
-	unsigned char status[2];
+	unsigned char *status = us->iobuf;
+	int rc;
-	alauda_get_media_status(us, status);
+	rc = alauda_get_media_status(us, status);
+	if (rc != USB_STOR_XFER_GOOD) {
+		status[0] = 0xF0;	/* Pretend there's no media */
+		status[1] = 0;
+	}
 	/* Check for no media or door open */
 	if ((status[0] & 0x80) || ((status[0] & 0x1F) == 0x10)

drivers/usb/typec/altmodes/displayport.c+17−1

 	enum dp_state state;
 	bool hpd;
+	bool pending_hpd;
 	struct mutex lock; /* device lock */
 	struct work_struct work;
 		dp->state = DP_STATE_EXIT;
 	} else if (!(con & DP_CONF_CURRENTLY(dp->data.conf))) {
 		ret = dp_altmode_configure(dp, con);
-		if (!ret)
+		if (!ret) {
 			dp->state = DP_STATE_CONFIGURE;
+			if (dp->hpd != hpd) {
+				dp->hpd = hpd;
+				dp->pending_hpd = true;
+			}
+		}
 	} else {
 		if (dp->hpd != hpd) {
 			drm_connector_oob_hotplug_event(dp->connector_fwnode);
 {
 	sysfs_notify(&dp->alt->dev.kobj, "displayport", "configuration");
 	sysfs_notify(&dp->alt->dev.kobj, "displayport", "pin_assignment");
+	/*
+	 * If the DFP_D/UFP_D sends a change in HPD when first notifying the
+	 * DisplayPort driver that it is connected, then we wait until
+	 * configuration is complete to signal HPD.
+	 */
+	if (dp->pending_hpd) {
+		drm_connector_oob_hotplug_event(dp->connector_fwnode);
+		sysfs_notify(&dp->alt->dev.kobj, "displayport", "hpd");
+		dp->pending_hpd = false;
+	}
 	return dp_altmode_notify(dp);
 }

drivers/usb/typec/mux/Kconfig+1−0

@@ -29,6 +29,7 @@ config TYPEC_MUX_INTEL_PMC · 28 unmodified lines
29	tristate "Intel PMC mux control"	29	tristate "Intel PMC mux control"
30	depends on ACPI	30	depends on ACPI
31	depends on INTEL_SCU_IPC	31	depends on INTEL_SCU_IPC
		32	select USB_COMMON
32	select USB_ROLE_SWITCH	33	select USB_ROLE_SWITCH
33	help	34	help
34	Driver for USB muxes controlled by Intel PMC FW. Intel PMC FW can	35	Driver for USB muxes controlled by Intel PMC FW. Intel PMC FW can

drivers/usb/typec/mux/nb7vpq904m.c+18−7

 	ret = nb7vpq904m_register_bridge(nb7);
 	if (ret)
-		return ret;
+		goto err_disable_gpio;
 	sw_desc.drvdata = nb7;
 	sw_desc.fwnode = dev->fwnode;
 	sw_desc.set = nb7vpq904m_sw_set;
 	nb7->sw = typec_switch_register(dev, &sw_desc);
-	if (IS_ERR(nb7->sw))
+	if (IS_ERR(nb7->sw)) {
-		return dev_err_probe(dev, PTR_ERR(nb7->sw),
+		ret = dev_err_probe(dev, PTR_ERR(nb7->sw),
-				     "Error registering typec switch\n");
+				    "Error registering typec switch\n");
+		goto err_disable_gpio;
+	}
 	retimer_desc.drvdata = nb7;
 	retimer_desc.fwnode = dev->fwnode;
 	nb7->retimer = typec_retimer_register(dev, &retimer_desc);
 	if (IS_ERR(nb7->retimer)) {
-		typec_switch_unregister(nb7->sw);
+		ret = dev_err_probe(dev, PTR_ERR(nb7->retimer),
-		return dev_err_probe(dev, PTR_ERR(nb7->retimer),
+				    "Error registering typec retimer\n");
-				     "Error registering typec retimer\n");
+		goto err_switch_unregister;
 	}
 	return 0;
+err_switch_unregister:
+	typec_switch_unregister(nb7->sw);
+err_disable_gpio:
+	gpiod_set_value(nb7->enable_gpio, 0);
+	regulator_disable(nb7->vcc_supply);
+	return ret;
 }
 static void nb7vpq904m_remove(struct i2c_client *client)

drivers/usb/typec/tcpm/tcpm.c+7−0

 		/* Do nothing, vbus drop expected */
 		break;
+	case SNK_HARD_RESET_WAIT_VBUS:
+		/* Do nothing, its OK to receive vbus off events */
+		break;
 	default:
 		if (port->pwr_role == TYPEC_SINK && port->attached)
 			tcpm_set_state(port, SNK_UNATTACHED, tcpm_wait_for_discharge(port));
 	case SNK_DEBOUNCED:
 		/*Do nothing, still waiting for VSAFE5V for connect */
 		break;
+	case SNK_HARD_RESET_WAIT_VBUS:
+		/* Do nothing, its OK to receive vbus off events */
+		break;
 	default:
 		if (port->pwr_role == TYPEC_SINK && port->auto_vbus_discharge_enabled)
 			tcpm_set_state(port, SNK_UNATTACHED, 0);

fs/btrfs/block-group.c+15−2

 					   u64 num_bytes)
 {
 	struct btrfs_caching_control *caching_ctl;
+	int progress;
 	caching_ctl = btrfs_get_caching_control(cache);
 	if (!caching_ctl)
 		return;
+	/*
+	 * We've already failed to allocate from this block group, so even if
+	 * there's enough space in the block group it isn't contiguous enough to
+	 * allow for an allocation, so wait for at least the next wakeup tick,
+	 * or for the thing to be done.
+	 */
+	progress = atomic_read(&caching_ctl->progress);
 	wait_event(caching_ctl->wait, btrfs_block_group_done(cache) ||
-		   (cache->free_space_ctl->free_space >= num_bytes));
+		   (progress != atomic_read(&caching_ctl->progress) &&
+		    (cache->free_space_ctl->free_space >= num_bytes)));
 	btrfs_put_caching_control(caching_ctl);
 }
 			if (total_found > CACHING_CTL_WAKE_UP) {
 				total_found = 0;
-				if (wakeup)
+				if (wakeup) {
+					atomic_inc(&caching_ctl->progress);
 					wake_up(&caching_ctl->wait);
+				}
 			}
 		}
 		path->slots[0]++;
 	init_waitqueue_head(&caching_ctl->wait);
 	caching_ctl->block_group = cache;
 	refcount_set(&caching_ctl->count, 2);
+	atomic_set(&caching_ctl->progress, 0);
 	btrfs_init_work(&caching_ctl->work, caching_thread, NULL, NULL);
 	spin_lock(&cache->lock);

fs/btrfs/block-group.h+2−0

@@ -90,6 +90,8 @@ struct btrfs_caching_control { · 89 unmodified lines
90	wait_queue_head_t wait;	90	wait_queue_head_t wait;
91	struct btrfs_work work;	91	struct btrfs_work work;
92	struct btrfs_block_group *block_group;	92	struct btrfs_block_group *block_group;
		93	/* Track progress of caching during allocation. */
		94	atomic_t progress;
93	refcount_t count;	95	refcount_t count;
94	};	96	};
95		97

fs/btrfs/disk-io.c+12−1

 	btrfs_drew_lock_init(&root->snapshot_lock);
 	if (root->root_key.objectid != BTRFS_TREE_LOG_OBJECTID &&
-	    !btrfs_is_data_reloc_root(root)) {
+	    !btrfs_is_data_reloc_root(root) &&
+	    is_fstree(root->root_key.objectid)) {
 		set_bit(BTRFS_ROOT_SHAREABLE, &root->state);
 		btrfs_check_and_init_root_item(&root->root_item);
 	}
 	root = btrfs_get_global_root(fs_info, objectid);
 	if (root)
 		return root;
+	/*
+	 * If we're called for non-subvolume trees, and above function didn't
+	 * find one, do not try to read it from disk.
+	 *
+	 * This is namely for free-space-tree and quota tree, which can change
+	 * at runtime and should only be grabbed from fs_info.
+	 */
+	if (!is_fstree(objectid) && objectid != BTRFS_DATA_RELOC_TREE_OBJECTID)
+		return ERR_PTR(-ENOENT);
 again:
 	root = btrfs_lookup_fs_root(fs_info, objectid);
 	if (root) {

fs/btrfs/extent-tree.c+4−1

 			ret = 0;
 		}
-		if (unlikely(block_group->cached == BTRFS_CACHE_ERROR))
+		if (unlikely(block_group->cached == BTRFS_CACHE_ERROR)) {
+			if (!cache_block_group_error)
+				cache_block_group_error = -EIO;
 			goto loop;
+		}
 		if (!find_free_extent_check_size_class(ffe_ctl, block_group))
 			goto loop;

fs/btrfs/extent_io.c+10−3

 				continue;
 			}
+			if (!folio_test_dirty(folio)) {
+				/* Someone wrote it for us. */
+				folio_unlock(folio);
+				continue;
+			}
 			if (wbc->sync_mode != WB_SYNC_NONE) {
 				if (folio_test_writeback(folio))
 					submit_write_bio(bio_ctrl, 0);
 			}
 			/*
-			 * the filesystem may choose to bump up nr_to_write.
+			 * The filesystem may choose to bump up nr_to_write.
 			 * We have to make sure to honor the new nr_to_write
-			 * at any time
+			 * at any time.
 			 */
-			nr_to_write_done = wbc->nr_to_write <= 0;
+			nr_to_write_done = (wbc->sync_mode == WB_SYNC_NONE &&
+					    wbc->nr_to_write <= 0);
 		}
 		folio_batch_release(&fbatch);
 		cond_resched();

fs/btrfs/inode.c+5−5

 					     clear_bits,
 					     page_ops);
 		start += cur_alloc_size;
-		if (start >= end)
-			return ret;
 	}
 	/*
 	 * space_info's bytes_may_use counter, reserved in
 	 * btrfs_check_data_free_space().
 	 */
-	extent_clear_unlock_delalloc(inode, start, end, locked_page,
+	if (start < end) {
-				     clear_bits | EXTENT_CLEAR_DATA_RESV,
+		clear_bits |= EXTENT_CLEAR_DATA_RESV;
-				     page_ops);
+		extent_clear_unlock_delalloc(inode, start, end, locked_page,
+					     clear_bits, page_ops);
+	}
 	return ret;
 }

fs/btrfs/relocation.c+37−8

@@ -1916,7 +1916,39 @@ again: · 1915 unmodified lines
1916	err = PTR_ERR(root);	1916	err = PTR_ERR(root);
1917	break;	1917	break;
1918	}	1918	}
1919	ASSERT(root->reloc_root == reloc_root);	1919
		1920	if (unlikely(root->reloc_root != reloc_root)) {
		1921	if (root->reloc_root) {
		1922	btrfs_err(fs_info,
		1923	"reloc tree mismatch, root %lld has reloc root key (%lld %u %llu) gen %llu, expect reloc root key (%lld %u %llu) gen %llu",
		1924	root->root_key.objectid,
		1925	root->reloc_root->root_key.objectid,
		1926	root->reloc_root->root_key.type,
		1927	root->reloc_root->root_key.offset,
		1928	btrfs_root_generation(
		1929	&root->reloc_root->root_item),
		1930	reloc_root->root_key.objectid,
		1931	reloc_root->root_key.type,
		1932	reloc_root->root_key.offset,
		1933	btrfs_root_generation(
		1934	&reloc_root->root_item));
		1935	} else {
		1936	btrfs_err(fs_info,
		1937	"reloc tree mismatch, root %lld has no reloc root, expect reloc root key (%lld %u %llu) gen %llu",
		1938	root->root_key.objectid,
		1939	reloc_root->root_key.objectid,
		1940	reloc_root->root_key.type,
		1941	reloc_root->root_key.offset,
		1942	btrfs_root_generation(
		1943	&reloc_root->root_item));
		1944	}
		1945	list_add(&reloc_root->root_list, &reloc_roots);
		1946	btrfs_put_root(root);
		1947	btrfs_abort_transaction(trans, -EUCLEAN);
		1948	if (!err)
		1949	err = -EUCLEAN;
		1950	break;
		1951	}
1920		1952
1921	/*	1953	/*
1922	* set reference count to 1, so btrfs_recover_relocation	1954	* set reference count to 1, so btrfs_recover_relocation
@@ -1989,7 +2021,7 @@ again: · 66 unmodified lines
1989	root = btrfs_get_fs_root(fs_info, reloc_root->root_key.offset,	2021	root = btrfs_get_fs_root(fs_info, reloc_root->root_key.offset,
1990	false);	2022	false);
1991	if (btrfs_root_refs(&reloc_root->root_item) > 0) {	2023	if (btrfs_root_refs(&reloc_root->root_item) > 0) {
1992	if (IS_ERR(root)) {	2024	if (WARN_ON(IS_ERR(root))) {
1993	/*	2025	/*
1994	* For recovery we read the fs roots on mount,	2026	* For recovery we read the fs roots on mount,
1995	* and if we didn't find the root then we marked	2027	* and if we didn't find the root then we marked
@@ -1998,17 +2030,14 @@ again: · 2 unmodified lines
1998	* memory. However there's no reason we can't	2030	* memory. However there's no reason we can't
1999	* handle the error properly here just in case.	2031	* handle the error properly here just in case.
2000	*/	2032	*/
2001	ASSERT(0);
2002	ret = PTR_ERR(root);	2033	ret = PTR_ERR(root);
2003	goto out;	2034	goto out;
2004	}	2035	}
2005	if (root->reloc_root != reloc_root) {	2036	if (WARN_ON(root->reloc_root != reloc_root)) {
2006	/*	2037	/*
2007	* This is actually impossible without something	2038	* This can happen if on-disk metadata has some
2008	* going really wrong (like weird race condition	2039	* corruption, e.g. bad reloc tree key offset.
2009	* or cosmic rays).
2010	*/	2040	*/
2011	ASSERT(0);
2012	ret = -EINVAL;	2041	ret = -EINVAL;
2013	goto out;	2042	goto out;
2014	}	2043	}

fs/btrfs/tree-checker.c+14−0

@@ -446,6 +446,20 @@ static int check_root_key(struct extent_buffer leaf, struct btrfs_key key, · 445 unmodified lines
446	btrfs_item_key_to_cpu(leaf, &item_key, slot);	446	btrfs_item_key_to_cpu(leaf, &item_key, slot);
447	is_root_item = (item_key.type == BTRFS_ROOT_ITEM_KEY);	447	is_root_item = (item_key.type == BTRFS_ROOT_ITEM_KEY);
448		448
		449	/*
		450	* Bad rootid for reloc trees.
		451	*
		452	* Reloc trees are only for subvolume trees, other trees only need
		453	* to be COWed to be relocated.
		454	*/
		455	if (unlikely(is_root_item && key->objectid == BTRFS_TREE_RELOC_OBJECTID &&
		456	!is_fstree(key->offset))) {
		457	generic_err(leaf, slot,
		458	"invalid reloc tree for root %lld, root id is not a subvolume tree",
		459	key->offset);
		460	return -EUCLEAN;
		461	}
		462
449	/* No such tree id */	463	/* No such tree id */
450	if (unlikely(key->objectid == 0)) {	464	if (unlikely(key->objectid == 0)) {
451	if (is_root_item)	465	if (is_root_item)

fs/ceph/dir.c+3−2

 	}
 }
+WRAP_DIR_ITER(ceph_readdir) // FIXME!
 const struct file_operations ceph_dir_fops = {
 	.read = ceph_read_dir,
-	.iterate = ceph_readdir,
+	.iterate_shared = shared_ceph_readdir,
 	.llseek = ceph_dir_llseek,
 	.open = ceph_open,
 	.release = ceph_release,
 };
 const struct file_operations ceph_snapdir_fops = {
-	.iterate = ceph_readdir,
+	.iterate_shared = shared_ceph_readdir,
 	.llseek = ceph_dir_llseek,
 	.open = ceph_open,
 	.release = ceph_release,

fs/ceph/mds_client.c+2−2

@@ -4764,7 +4764,7 @@ static void delayed_work(struct work_struct *work) · 4763 unmodified lines
4764		4764
4765	dout("mdsc delayed_work\n");	4765	dout("mdsc delayed_work\n");
4766		4766
4767	if (mdsc->stopping)	4767	if (mdsc->stopping >= CEPH_MDSC_STOPPING_FLUSHED)
4768	return;	4768	return;
4769		4769
4770	mutex_lock(&mdsc->mutex);	4770	mutex_lock(&mdsc->mutex);
@@ -4943,7 +4943,7 @@ void send_flush_mdlog(struct ceph_mds_session *s) · 172 unmodified lines
4943	void ceph_mdsc_pre_umount(struct ceph_mds_client *mdsc)	4943	void ceph_mdsc_pre_umount(struct ceph_mds_client *mdsc)
4944	{	4944	{
4945	dout("pre_umount\n");	4945	dout("pre_umount\n");
4946	mdsc->stopping = 1;	4946	mdsc->stopping = CEPH_MDSC_STOPPING_BEGIN;
4947		4947
4948	ceph_mdsc_iterate_sessions(mdsc, send_flush_mdlog, true);	4948	ceph_mdsc_iterate_sessions(mdsc, send_flush_mdlog, true);
4949	ceph_mdsc_iterate_sessions(mdsc, lock_unlock_session, false);	4949	ceph_mdsc_iterate_sessions(mdsc, lock_unlock_session, false);

fs/ceph/mds_client.h+5−0

 	int			want;
 };
+enum {
+       CEPH_MDSC_STOPPING_BEGIN = 1,
+       CEPH_MDSC_STOPPING_FLUSHED = 2,
+};
 /*
  * mds client state
  */

fs/ceph/super.c+10−0

@@ -1374,6 +1374,16 @@ static void ceph_kill_sb(struct super_block *s) · 1373 unmodified lines
1374	ceph_mdsc_pre_umount(fsc->mdsc);	1374	ceph_mdsc_pre_umount(fsc->mdsc);
1375	flush_fs_workqueues(fsc);	1375	flush_fs_workqueues(fsc);
1376		1376
		1377	/*
		1378	* Though the kill_anon_super() will finally trigger the
		1379	* sync_filesystem() anyway, we still need to do it here
		1380	* and then bump the stage of shutdown to stop the work
		1381	* queue as earlier as possible.
		1382	*/
		1383	sync_filesystem(s);
		1384
		1385	fsc->mdsc->stopping = CEPH_MDSC_STOPPING_FLUSHED;
		1386
1377	kill_anon_super(s);	1387	kill_anon_super(s);
1378		1388
1379	fsc->client->extra_mon_dispatch = NULL;	1389	fsc->client->extra_mon_dispatch = NULL;

fs/coda/dir.c+7−13

 	cfi = coda_ftoc(coda_file);
 	host_file = cfi->cfi_container;
-	if (host_file->f_op->iterate || host_file->f_op->iterate_shared) {
+	if (host_file->f_op->iterate_shared) {
 		struct inode *host_inode = file_inode(host_file);
 		ret = -ENOENT;
 		if (!IS_DEADDIR(host_inode)) {
-			if (host_file->f_op->iterate_shared) {
+			inode_lock_shared(host_inode);
-				inode_lock_shared(host_inode);
+			ret = host_file->f_op->iterate_shared(host_file, ctx);
-				ret = host_file->f_op->iterate_shared(host_file, ctx);
+			file_accessed(host_file);
-				file_accessed(host_file);
+			inode_unlock_shared(host_inode);
-				inode_unlock_shared(host_inode);
-			} else {
-				inode_lock(host_inode);
-				ret = host_file->f_op->iterate(host_file, ctx);
-				file_accessed(host_file);
-				inode_unlock(host_inode);
-			}
 		}
 		return ret;
 	}
 	.setattr	= coda_setattr,
 };
+WRAP_DIR_ITER(coda_readdir) // FIXME!
 const struct file_operations coda_dir_operations = {
 	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
-	.iterate	= coda_readdir,
+	.iterate_shared	= shared_coda_readdir,
 	.open		= coda_open,
 	.release	= coda_release,
 	.fsync		= coda_fsync,

fs/erofs/super.c+0−2

@@ -889,8 +889,6 @@ static void erofs_kill_sb(struct super_block *sb) · 888 unmodified lines
889	{	889	{
890	struct erofs_sb_info *sbi;	890	struct erofs_sb_info *sbi;
891		891
892	WARN_ON(sb->s_magic != EROFS_SUPER_MAGIC);
893
894	/* pseudo mount for anon inodes */	892	/* pseudo mount for anon inodes */
895	if (sb->s_flags & SB_KERNMOUNT) {	893	if (sb->s_flags & SB_KERNMOUNT) {
896	kill_anon_super(sb);	894	kill_anon_super(sb);

fs/erofs/zdata.c+4−3

@@ -1144,10 +1144,11 @@ static void z_erofs_do_decompressed_bvec(struct z_erofs_decompress_backend *be, · 1143 unmodified lines
1144	struct z_erofs_bvec *bvec)	1144	struct z_erofs_bvec *bvec)
1145	{	1145	{
1146	struct z_erofs_bvec_item *item;	1146	struct z_erofs_bvec_item *item;
		1147	unsigned int pgnr;
1147		1148
1148	if (!((bvec->offset + be->pcl->pageofs_out) & ~PAGE_MASK)) {	1149	if (!((bvec->offset + be->pcl->pageofs_out) & ~PAGE_MASK) &&
1149	unsigned int pgnr;	1150	(bvec->end == PAGE_SIZE \|\|
1150		1151	bvec->offset + bvec->end == be->pcl->length)) {
1151	pgnr = (bvec->offset + be->pcl->pageofs_out) >> PAGE_SHIFT;	1152	pgnr = (bvec->offset + be->pcl->pageofs_out) >> PAGE_SHIFT;
1152	DBG_BUGON(pgnr >= be->nr_pages);	1153	DBG_BUGON(pgnr >= be->nr_pages);
1153	if (!be->decompressed_pages[pgnr]) {	1154	if (!be->decompressed_pages[pgnr]) {

fs/exfat/balloc.c+3−3

@@ -69,7 +69,7 @@ static int exfat_allocate_bitmap(struct super_block *sb, · 68 unmodified lines
69	}	69	}
70	sbi->map_sectors = ((need_map_size - 1) >>	70	sbi->map_sectors = ((need_map_size - 1) >>
71	(sb->s_blocksize_bits)) + 1;	71	(sb->s_blocksize_bits)) + 1;
72	sbi->vol_amap = kmalloc_array(sbi->map_sectors,	72	sbi->vol_amap = kvmalloc_array(sbi->map_sectors,
73	sizeof(struct buffer_head *), GFP_KERNEL);	73	sizeof(struct buffer_head *), GFP_KERNEL);
74	if (!sbi->vol_amap)	74	if (!sbi->vol_amap)
75	return -ENOMEM;	75	return -ENOMEM;
@@ -84,7 +84,7 @@ static int exfat_allocate_bitmap(struct super_block *sb, · 8 unmodified lines
84	while (j < i)	84	while (j < i)
85	brelse(sbi->vol_amap[j++]);	85	brelse(sbi->vol_amap[j++]);
86		86
87	kfree(sbi->vol_amap);	87	kvfree(sbi->vol_amap);
88	sbi->vol_amap = NULL;	88	sbi->vol_amap = NULL;
89	return -EIO;	89	return -EIO;
90	}	90	}
@@ -138,7 +138,7 @@ void exfat_free_bitmap(struct exfat_sb_info *sbi) · 47 unmodified lines
138	for (i = 0; i < sbi->map_sectors; i++)	138	for (i = 0; i < sbi->map_sectors; i++)
139	__brelse(sbi->vol_amap[i]);	139	__brelse(sbi->vol_amap[i]);
140		140
141	kfree(sbi->vol_amap);	141	kvfree(sbi->vol_amap);
142	}	142	}
143		143
144	int exfat_set_bitmap(struct inode *inode, unsigned int clu, bool sync)	144	int exfat_set_bitmap(struct inode *inode, unsigned int clu, bool sync)

fs/exfat/dir.c+21−18

 {
 	int i, err;
 	struct exfat_entry_set_cache es;
+	unsigned int uni_len = 0, len;
 	err = exfat_get_dentry_set(&es, sb, p_dir, entry, ES_ALL_ENTRIES);
 	if (err)
 		if (exfat_get_entry_type(ep) != TYPE_EXTEND)
 			break;
-		exfat_extract_uni_name(ep, uniname);
+		len = exfat_extract_uni_name(ep, uniname);
+		uni_len += len;
+		if (len != EXFAT_FILE_NAME_LEN || uni_len >= MAX_NAME_LENGTH)
+			break;
 		uniname += EXFAT_FILE_NAME_LEN;
 	}
 	exfat_init_namebuf(nb);
 }
-/* skip iterating emit_dots when dir is empty */
+/*
+ * Before calling dir_emit*(), sbi->s_lock should be released
+ * because page fault can occur in dir_emit*().
+ */
 #define ITER_POS_FILLED_DOTS    (2)
 static int exfat_iterate(struct file *file, struct dir_context *ctx)
 {
 	int err = 0, fake_offset = 0;
 	exfat_init_namebuf(nb);
-	mutex_lock(&EXFAT_SB(sb)->s_lock);
 	cpos = ctx->pos;
 	if (!dir_emit_dots(file, ctx))
-		goto unlock;
+		goto out;
 	if (ctx->pos == ITER_POS_FILLED_DOTS) {
 		cpos = 0;
 	/* name buffer should be allocated before use */
 	err = exfat_alloc_namebuf(nb);
 	if (err)
-		goto unlock;
+		goto out;
 get_new:
+	mutex_lock(&EXFAT_SB(sb)->s_lock);
 	if (ei->flags == ALLOC_NO_FAT_CHAIN && cpos >= i_size_read(inode))
 		goto end_of_dir;
 	err = exfat_readdir(inode, &cpos, &de);
 	if (err) {
 		/*
-		 * At least we tried to read a sector.  Move cpos to next sector
+		 * At least we tried to read a sector.
-		 * position (should be aligned).
+		 * Move cpos to next sector position (should be aligned).
 		 */
 		if (err == -EIO) {
 			cpos += 1 << (sb->s_blocksize_bits);
 		inum = iunique(sb, EXFAT_ROOT_INO);
 	}
-	/*
-	 * Before calling dir_emit(), sb_lock should be released.
-	 * Because page fault can occur in dir_emit() when the size
-	 * of buffer given from user is larger than one page size.
-	 */
 	mutex_unlock(&EXFAT_SB(sb)->s_lock);
 	if (!dir_emit(ctx, nb->lfn, strlen(nb->lfn), inum,
 			(de.attr & ATTR_SUBDIR) ? DT_DIR : DT_REG))
-		goto out_unlocked;
+		goto out;
-	mutex_lock(&EXFAT_SB(sb)->s_lock);
 	ctx->pos = cpos;
 	goto get_new;
 	if (!cpos && fake_offset)
 		cpos = ITER_POS_FILLED_DOTS;
 	ctx->pos = cpos;
-unlock:
 	mutex_unlock(&EXFAT_SB(sb)->s_lock);
-out_unlocked:
+out:
 	/*
 	 * To improve performance, free namebuf after unlock sb_lock.
 	 * If namebuf is not allocated, this function do nothing
 	return err;
 }
+WRAP_DIR_ITER(exfat_iterate) // FIXME!
 const struct file_operations exfat_dir_operations = {
 	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
-	.iterate	= exfat_iterate,
+	.iterate_shared	= shared_exfat_iterate,
 	.unlocked_ioctl = exfat_ioctl,
 #ifdef CONFIG_COMPAT
 	.compat_ioctl = exfat_compat_ioctl,
 			if (entry_type == TYPE_EXTEND) {
 				unsigned short entry_uniname[16], unichar;
-				if (step != DIRENT_STEP_NAME) {
+				if (step != DIRENT_STEP_NAME ||
+				    name_len >= MAX_NAME_LENGTH) {
 					step = DIRENT_STEP_FILE;
 					continue;
 				}

fs/exportfs/expfs.c+1−1

@@ -315,7 +315,7 @@ static int get_name(const struct path path, char name, struct dentry *child) · 314 unmodified lines
315	goto out;	315	goto out;
316		316
317	error = -EINVAL;	317	error = -EINVAL;
318	if (!file->f_op->iterate && !file->f_op->iterate_shared)	318	if (!file->f_op->iterate_shared)
319	goto out_close;	319	goto out_close;
320		320
321	buffer.sequence = 0;	321	buffer.sequence = 0;

fs/file.c+17−1

@@ -1036,12 +1036,28 @@ unsigned long __fdget_raw(unsigned int fd) · 1035 unmodified lines
1036	return __fget_light(fd, 0);	1036	return __fget_light(fd, 0);
1037	}	1037	}
1038		1038
		1039	/*
		1040	* Try to avoid f_pos locking. We only need it if the
		1041	* file is marked for FMODE_ATOMIC_POS, and it can be
		1042	* accessed multiple ways.
		1043	*
		1044	* Always do it for directories, because pidfd_getfd()
		1045	* can make a file accessible even if it otherwise would
		1046	* not be, and for directories this is a correctness
		1047	* issue, not a "POSIX requirement".
		1048	*/
		1049	static inline bool file_needs_f_pos_lock(struct file *file)
		1050	{
		1051	return (file->f_mode & FMODE_ATOMIC_POS) &&
		1052	(file_count(file) > 1 \|\| file->f_op->iterate_shared);
		1053	}
		1054
1039	unsigned long __fdget_pos(unsigned int fd)	1055	unsigned long __fdget_pos(unsigned int fd)
1040	{	1056	{
1041	unsigned long v = __fdget(fd);	1057	unsigned long v = __fdget(fd);
1042	struct file file = (struct file )(v & ~3);	1058	struct file file = (struct file )(v & ~3);
1043		1059
1044	if (file && (file->f_mode & FMODE_ATOMIC_POS)) {	1060	if (file && file_needs_f_pos_lock(file)) {
1045	v \|= FDPUT_POS_UNLOCK;	1061	v \|= FDPUT_POS_UNLOCK;
1046	mutex_lock(&file->f_pos_lock);	1062	mutex_lock(&file->f_pos_lock);
1047	}	1063	}

fs/gfs2/file.c+2−2

@@ -1578,7 +1578,7 @@ const struct file_operations gfs2_file_fops = { · 1577 unmodified lines
1578	.fsync = gfs2_fsync,	1578	.fsync = gfs2_fsync,
1579	.lock = gfs2_lock,	1579	.lock = gfs2_lock,
1580	.flock = gfs2_flock,	1580	.flock = gfs2_flock,
1581	.splice_read = filemap_splice_read,	1581	.splice_read = copy_splice_read,
1582	.splice_write = gfs2_file_splice_write,	1582	.splice_write = gfs2_file_splice_write,
1583	.setlease = simple_nosetlease,	1583	.setlease = simple_nosetlease,
1584	.fallocate = gfs2_fallocate,	1584	.fallocate = gfs2_fallocate,
@@ -1609,7 +1609,7 @@ const struct file_operations gfs2_file_fops_nolock = { · 24 unmodified lines
1609	.open = gfs2_open,	1609	.open = gfs2_open,
1610	.release = gfs2_release,	1610	.release = gfs2_release,
1611	.fsync = gfs2_fsync,	1611	.fsync = gfs2_fsync,
1612	.splice_read = filemap_splice_read,	1612	.splice_read = copy_splice_read,
1613	.splice_write = gfs2_file_splice_write,	1613	.splice_write = gfs2_file_splice_write,
1614	.setlease = generic_setlease,	1614	.setlease = generic_setlease,
1615	.fallocate = gfs2_fallocate,	1615	.fallocate = gfs2_fallocate,

fs/gfs2/trans.c+10−4

 {
 	struct gfs2_sbd *sdp = gl->gl_name.ln_sbd;
+	struct super_block *sb = sdp->sd_vfs;
 	struct gfs2_bufdata *bd;
 	struct gfs2_meta_header *mh;
 	struct gfs2_trans *tr = current->journal_info;
+	bool withdraw = false;
 	lock_buffer(bh);
 	if (buffer_pinned(bh)) {
 		       (unsigned long long)bd->bd_bh->b_blocknr);
 		BUG();
 	}
-	if (unlikely(test_bit(SDF_FROZEN, &sdp->sd_flags))) {
-		fs_info(sdp, "GFS2:adding buf while frozen\n");
-		gfs2_assert_withdraw(sdp, 0);
-	}
 	if (unlikely(gfs2_withdrawn(sdp))) {
 		fs_info(sdp, "GFS2:adding buf while withdrawn! 0x%llx\n",
 			(unsigned long long)bd->bd_bh->b_blocknr);
+		goto out_unlock;
+	}
+	if (unlikely(sb->s_writers.frozen == SB_FREEZE_COMPLETE)) {
+		fs_info(sdp, "GFS2:adding buf while frozen\n");
+		withdraw = true;
+		goto out_unlock;
 	}
 	gfs2_pin(sdp, bd->bd_bh);
 	mh->__pad0 = cpu_to_be64(0);
 	tr->tr_num_buf_new++;
 out_unlock:
 	gfs2_log_unlock(sdp);
+	if (withdraw)
+		gfs2_assert_withdraw(sdp, 0);
 out:
 	unlock_buffer(bh);
 }

fs/inode.c+0−3

 #include <linux/fsnotify.h>
 #include <linux/mount.h>
 #include <linux/posix_acl.h>
-#include <linux/prefetch.h>
 #include <linux/buffer_head.h> /* for inode_has_buffers */
 #include <linux/ratelimit.h>
 #include <linux/list_lru.h>
 {
 	struct inode *inode;
-	spin_lock_prefetch(&sb->s_inode_list_lock);
 	inode = new_inode_pseudo(sb);
 	if (inode)
 		inode_sb_list_add(inode);

fs/jfs/namei.c+2−1

 #endif
 };
+WRAP_DIR_ITER(jfs_readdir) // FIXME!
 const struct file_operations jfs_dir_operations = {
 	.read		= generic_read_dir,
-	.iterate	= jfs_readdir,
+	.iterate_shared	= shared_jfs_readdir,
 	.fsync		= jfs_fsync,
 	.unlocked_ioctl = jfs_ioctl,
 	.compat_ioctl	= compat_ptr_ioctl,

fs/nfsd/vfs.c+6−3

 	last_page = page + (offset + sd->len - 1) / PAGE_SIZE;
 	for (page += offset / PAGE_SIZE; page <= last_page; page++) {
 		/*
-		 * Skip page replacement when extending the contents
+		 * Skip page replacement when extending the contents of the
-		 * of the current page.
+		 * current page.  But note that we may get two zero_pages in a
+		 * row from shmem.
 		 */
-		if (page == *(rqstp->rq_next_page - 1))
+		if (page == *(rqstp->rq_next_page - 1) &&
+		    offset_in_page(rqstp->rq_res.page_base +
+				   rqstp->rq_res.page_len))
 			continue;
 		if (unlikely(!svc_rqst_replace_page(rqstp, page)))
 			return -EIO;

fs/nilfs2/inode.c+8−0

 int __nilfs_mark_inode_dirty(struct inode *inode, int flags)
 {
+	struct the_nilfs *nilfs = inode->i_sb->s_fs_info;
 	struct buffer_head *ibh;
 	int err;
+	/*
+	 * Do not dirty inodes after the log writer has been detached
+	 * and its nilfs_root struct has been freed.
+	 */
+	if (unlikely(nilfs_purging(nilfs)))
+		return 0;
 	err = nilfs_load_inode_block(inode, &ibh);
 	if (unlikely(err)) {
 		nilfs_warn(inode->i_sb,

fs/nilfs2/segment.c+2−0

 		nilfs_segctor_destroy(nilfs->ns_writer);
 		nilfs->ns_writer = NULL;
 	}
+	set_nilfs_purging(nilfs);
 	/* Force to free the list of dirty files */
 	spin_lock(&nilfs->ns_inode_lock);
 	up_write(&nilfs->ns_segctor_sem);
 	nilfs_dispose_list(nilfs, &garbage_list, 1);
+	clear_nilfs_purging(nilfs);
 }

fs/nilfs2/the_nilfs.h+2−0

 	THE_NILFS_DISCONTINUED,	/* 'next' pointer chain has broken */
 	THE_NILFS_GC_RUNNING,	/* gc process is running */
 	THE_NILFS_SB_DIRTY,	/* super block is dirty */
+	THE_NILFS_PURGING,	/* disposing dirty files for cleanup */
 };
 /**
 THE_NILFS_FNS(DISCONTINUED, discontinued)
 THE_NILFS_FNS(GC_RUNNING, gc_running)
 THE_NILFS_FNS(SB_DIRTY, sb_dirty)
+THE_NILFS_FNS(PURGING, purging)
 /*
  * Mount option operations

fs/ntfs/dir.c+2−1

 #endif /* NTFS_RW */
+WRAP_DIR_ITER(ntfs_readdir) // FIXME!
 const struct file_operations ntfs_dir_ops = {
 	.llseek		= generic_file_llseek,	/* Seek inside directory. */
 	.read		= generic_read_dir,	/* Return -EISDIR. */
-	.iterate	= ntfs_readdir,		/* Read directory contents. */
+	.iterate_shared	= shared_ntfs_readdir,	/* Read directory contents. */
 #ifdef NTFS_RW
 	.fsync		= ntfs_dir_fsync,	/* Sync a directory to disk. */
 #endif /* NTFS_RW */

fs/ocfs2/file.c+3−2

 	.remap_file_range = ocfs2_remap_file_range,
 };
+WRAP_DIR_ITER(ocfs2_readdir) // FIXME!
 const struct file_operations ocfs2_dops = {
 	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
-	.iterate	= ocfs2_readdir,
+	.iterate_shared	= shared_ocfs2_readdir,
 	.fsync		= ocfs2_sync_file,
 	.release	= ocfs2_dir_release,
 	.open		= ocfs2_dir_open,
 const struct file_operations ocfs2_dops_no_plocks = {
 	.llseek		= generic_file_llseek,
 	.read		= generic_read_dir,
-	.iterate	= ocfs2_readdir,
+	.iterate_shared	= shared_ocfs2_readdir,
 	.fsync		= ocfs2_sync_file,
 	.release	= ocfs2_dir_release,
 	.open		= ocfs2_dir_open,

fs/open.c+1−1

@@ -1322,7 +1322,7 @@ inline int build_open_flags(const struct open_how how, struct open_flags op) · 1321 unmodified lines
1322	lookup_flags \|= LOOKUP_IN_ROOT;	1322	lookup_flags \|= LOOKUP_IN_ROOT;
1323	if (how->resolve & RESOLVE_CACHED) {	1323	if (how->resolve & RESOLVE_CACHED) {
1324	/* Don't bother even trying for create/truncate/tmpfile open */	1324	/* Don't bother even trying for create/truncate/tmpfile open */
1325	if (flags & (O_TRUNC \| O_CREAT \| O_TMPFILE))	1325	if (flags & (O_TRUNC \| O_CREAT \| __O_TMPFILE))
1326	return -EAGAIN;	1326	return -EAGAIN;
1327	lookup_flags \|= LOOKUP_CACHED;	1327	lookup_flags \|= LOOKUP_CACHED;
1328	}	1328	}

fs/overlayfs/readdir.c+2−1

 	return 0;
 }
+WRAP_DIR_ITER(ovl_iterate) // FIXME!
 const struct file_operations ovl_dir_operations = {
 	.read		= generic_read_dir,
 	.open		= ovl_dir_open,
-	.iterate	= ovl_iterate,
+	.iterate_shared	= shared_ovl_iterate,
 	.llseek		= ovl_dir_llseek,
 	.fsync		= ovl_dir_fsync,
 	.release	= ovl_dir_release,

fs/proc/base.c+1−1

@@ -2817,7 +2817,7 @@ static int proc_##LSM##_attr_dir_iterate(struct file *filp, \ · 2816 unmodified lines
2817	\	2817	\
2818	static const struct file_operations proc_##LSM##_attr_dir_ops = { \	2818	static const struct file_operations proc_##LSM##_attr_dir_ops = { \
2819	.read = generic_read_dir, \	2819	.read = generic_read_dir, \
2820	.iterate = proc_##LSM##_attr_dir_iterate, \	2820	.iterate_shared = proc_##LSM##_attr_dir_iterate, \
2821	.llseek = default_llseek, \	2821	.llseek = default_llseek, \
2822	}; \	2822	}; \
2823	\	2823	\

fs/proc/kcore.c+27−3

 static ssize_t read_kcore_iter(struct kiocb *iocb, struct iov_iter *iter)
 {
+	struct file *file = iocb->ki_filp;
+	char *buf = file->private_data;
 	loff_t *fpos = &iocb->ki_pos;
 	size_t phdrs_offset, notes_offset, data_offset;
 	size_t page_offline_frozen = 1;
 		case KCORE_VMEMMAP:
 		case KCORE_TEXT:
 			/*
-			 * We use _copy_to_iter() to bypass usermode hardening
+			 * Sadly we must use a bounce buffer here to be able to
-			 * which would otherwise prevent this operation.
+			 * make use of copy_from_kernel_nofault(), as these
+			 * memory regions might not always be mapped on all
+			 * architectures.
 			 */
-			if (_copy_to_iter((char *)start, tsz, iter) != tsz) {
+			if (copy_from_kernel_nofault(buf, (void *)start, tsz)) {
+				if (iov_iter_zero(tsz, iter) != tsz) {
+					ret = -EFAULT;
+					goto out;
+				}
+			/*
+			 * We know the bounce buffer is safe to copy from, so
+			 * use _copy_to_iter() directly.
+			 */
+			} else if (_copy_to_iter(buf, tsz, iter) != tsz) {
 				ret = -EFAULT;
 				goto out;
 			}
 	if (ret)
 		return ret;
+	filp->private_data = kmalloc(PAGE_SIZE, GFP_KERNEL);
+	if (!filp->private_data)
+		return -ENOMEM;
 	if (kcore_need_update)
 		kcore_update_ram();
 	if (i_size_read(inode) != proc_root_kcore->size) {
 	return 0;
 }
+static int release_kcore(struct inode *inode, struct file *file)
+{
+	kfree(file->private_data);
+	return 0;
+}
 static const struct proc_ops kcore_proc_ops = {
 	.proc_read_iter	= read_kcore_iter,
 	.proc_open	= open_kcore,
+	.proc_release	= release_kcore,
 	.proc_lseek	= default_llseek,
 };

fs/readdir.c+52−16

@@ -24,6 +24,53 @@ · 23 unmodified lines
24		24
25	#include <asm/unaligned.h>	25	#include <asm/unaligned.h>
26		26
		27	/*
		28	* Some filesystems were never converted to '->iterate_shared()'
		29	* and their directory iterators want the inode lock held for
		30	* writing. This wrapper allows for converting from the shared
		31	* semantics to the exclusive inode use.
		32	*/
		33	int wrap_directory_iterator(struct file *file,
		34	struct dir_context *ctx,
		35	int (iter)(struct file , struct dir_context *))
		36	{
		37	struct inode *inode = file_inode(file);
		38	int ret;
		39
		40	/*
		41	* We'd love to have an 'inode_upgrade_trylock()' operation,
		42	* see the comment in mmap_upgrade_trylock() in mm/memory.c.
		43	*
		44	* But considering this is for "filesystems that never got
		45	* converted", it really doesn't matter.
		46	*
		47	* Also note that since we have to return with the lock held
		48	* for reading, we can't use the "killable()" locking here,
		49	* since we do need to get the lock even if we're dying.
		50	*
		51	* We could do the write part killably and then get the read
		52	* lock unconditionally if it mattered, but see above on why
		53	* this does the very simplistic conversion.
		54	*/
		55	up_read(&inode->i_rwsem);
		56	down_write(&inode->i_rwsem);
		57
		58	/*
		59	* Since we dropped the inode lock, we should do the
		60	* DEADDIR test again. See 'iterate_dir()' below.
		61	*
		62	* Note that we don't need to re-do the f_pos games,
		63	* since the file must be locked wrt f_pos anyway.
		64	*/
		65	ret = -ENOENT;
		66	if (!IS_DEADDIR(inode))
		67	ret = iter(file, ctx);
		68
		69	downgrade_write(&inode->i_rwsem);
		70	return ret;
		71	}
		72	EXPORT_SYMBOL(wrap_directory_iterator);
		73
27	/*	74	/*
28	* Note the "unsafe_put_user() semantics: we goto a	75	* Note the "unsafe_put_user() semantics: we goto a
29	* label for errors.	76	* label for errors.
@@ -40,39 +87,28 @@ · 10 unmodified lines
40	int iterate_dir(struct file file, struct dir_context ctx)	87	int iterate_dir(struct file file, struct dir_context ctx)
41	{	88	{
42	struct inode *inode = file_inode(file);	89	struct inode *inode = file_inode(file);
43	bool shared = false;
44	int res = -ENOTDIR;	90	int res = -ENOTDIR;
45	if (file->f_op->iterate_shared)	91
46	shared = true;	92	if (!file->f_op->iterate_shared)
47	else if (!file->f_op->iterate)
48	goto out;	93	goto out;
49		94
50	res = security_file_permission(file, MAY_READ);	95	res = security_file_permission(file, MAY_READ);
51	if (res)	96	if (res)
52	goto out;	97	goto out;
53		98
54	if (shared)	99	res = down_read_killable(&inode->i_rwsem);
55	res = down_read_killable(&inode->i_rwsem);
56	else
57	res = down_write_killable(&inode->i_rwsem);
58	if (res)	100	if (res)
59	goto out;	101	goto out;
60		102
61	res = -ENOENT;	103	res = -ENOENT;
62	if (!IS_DEADDIR(inode)) {	104	if (!IS_DEADDIR(inode)) {
63	ctx->pos = file->f_pos;	105	ctx->pos = file->f_pos;
64	if (shared)	106	res = file->f_op->iterate_shared(file, ctx);
65	res = file->f_op->iterate_shared(file, ctx);
66	else
67	res = file->f_op->iterate(file, ctx);
68	file->f_pos = ctx->pos;	107	file->f_pos = ctx->pos;
69	fsnotify_access(file);	108	fsnotify_access(file);
70	file_accessed(file);	109	file_accessed(file);
71	}	110	}
72	if (shared)	111	inode_unlock_shared(inode);
73	inode_unlock_shared(inode);
74	else
75	inode_unlock(inode);
76	out:	112	out:
77	return res;	113	return res;
78	}	114	}

fs/smb/client/dfs.c+5−1

 		struct dfs_cache_tgt_list tl = DFS_CACHE_TGT_LIST_INIT(tl);
 		rc = dfs_get_referral(mnt_ctx, ref_path + 1, NULL, &tl);
-		if (rc)
+		if (rc) {
+			rc = cifs_mount_get_tcon(mnt_ctx);
+			if (!rc)
+				rc = cifs_is_path_remote(mnt_ctx);
 			break;
+		}
 		tit = dfs_cache_get_tgt_iterator(&tl);
 		if (!tit) {

fs/smb/server/smb2misc.c+5−5

@@ -380,13 +380,13 @@ int ksmbd_smb2_check_message(struct ksmbd_work *work) · 379 unmodified lines
380	}	380	}
381		381
382	if (smb2_req_struct_sizes[command] != pdu->StructureSize2) {	382	if (smb2_req_struct_sizes[command] != pdu->StructureSize2) {
383	if (command == SMB2_OPLOCK_BREAK_HE &&	383	if (!(command == SMB2_OPLOCK_BREAK_HE &&
384	le16_to_cpu(pdu->StructureSize2) != OP_BREAK_STRUCT_SIZE_20 &&	384	(le16_to_cpu(pdu->StructureSize2) == OP_BREAK_STRUCT_SIZE_20 \|\|
385	le16_to_cpu(pdu->StructureSize2) != OP_BREAK_STRUCT_SIZE_21) {	385	le16_to_cpu(pdu->StructureSize2) == OP_BREAK_STRUCT_SIZE_21))) {
386	/* special case for SMB2.1 lease break message */	386	/* special case for SMB2.1 lease break message */
387	ksmbd_debug(SMB,	387	ksmbd_debug(SMB,
388	"Illegal request size %d for oplock break\n",	388	"Illegal request size %u for command %d\n",
389	le16_to_cpu(pdu->StructureSize2));	389	le16_to_cpu(pdu->StructureSize2), command);
390	return 1;	390	return 1;
391	}	391	}
392	}	392	}

fs/smb/server/smb2pdu.c+8−1

 			break;
 		buf_len -= next;
 		eabuf = (struct smb2_ea_info *)((char *)eabuf + next);
-		if (next < (u32)eabuf->EaNameLength + le16_to_cpu(eabuf->EaValueLength))
+		if (buf_len < sizeof(struct smb2_ea_info)) {
+			rc = -EINVAL;
 			break;
+		}
+		if (buf_len < sizeof(struct smb2_ea_info) + eabuf->EaNameLength +
+				le16_to_cpu(eabuf->EaValueLength)) {
+			rc = -EINVAL;
+			break;
+		}
 	} while (next != 0);
 	kfree(attr_name);

fs/vboxsf/dir.c+2−1

 	return 0;
 }
+WRAP_DIR_ITER(vboxsf_dir_iterate) // FIXME!
 const struct file_operations vboxsf_dir_fops = {
 	.open = vboxsf_dir_open,
-	.iterate = vboxsf_dir_iterate,
+	.iterate_shared = shared_vboxsf_dir_iterate,
 	.release = vboxsf_dir_release,
 	.read = generic_read_dir,
 	.llseek = generic_file_llseek,

fs/vboxsf/shfl_hostintf.h+3−3

@@ -68,9 +68,9 @@ struct shfl_string { · 67 unmodified lines
68		68
69	/** UTF-8 or UTF-16 string. Nul terminated. */	69	/** UTF-8 or UTF-16 string. Nul terminated. */
70	union {	70	union {
71	u8 utf8[2];	71	u8 legacy_padding[2];
72	u16 utf16[1];	72	DECLARE_FLEX_ARRAY(u8, utf8);
73	u16 ucs2[1]; /* misnomer, use utf16. */	73	DECLARE_FLEX_ARRAY(u16, utf16);
74	} string;	74	} string;
75	};	75	};
76	VMMDEV_ASSERT_SIZE(shfl_string, 6);	76	VMMDEV_ASSERT_SIZE(shfl_string, 6);

fs/zonefs/file.c+3−108

@@ -341,77 +341,6 @@ static loff_t zonefs_file_llseek(struct file *file, loff_t offset, int whence) · 340 unmodified lines
341	return generic_file_llseek_size(file, offset, whence, isize, isize);	341	return generic_file_llseek_size(file, offset, whence, isize, isize);
342	}	342	}
343		343
344	struct zonefs_zone_append_bio {
345	/* The target inode of the BIO */
346	struct inode *inode;
347
348	/* For sync writes, the target append write offset */
349	u64 append_offset;
350
351	/*
352	* This member must come last, bio_alloc_bioset will allocate enough
353	* bytes for entire zonefs_bio but relies on bio being last.
354	*/
355	struct bio bio;
356	};
357
358	static inline struct zonefs_zone_append_bio *
359	zonefs_zone_append_bio(struct bio *bio)
360	{
361	return container_of(bio, struct zonefs_zone_append_bio, bio);
362	}
363
364	static void zonefs_file_zone_append_dio_bio_end_io(struct bio *bio)
365	{
366	struct zonefs_zone_append_bio *za_bio = zonefs_zone_append_bio(bio);
367	struct zonefs_zone *z = zonefs_inode_zone(za_bio->inode);
368	sector_t za_sector;
369
370	if (bio->bi_status != BLK_STS_OK)
371	goto bio_end;
372
373	/*
374	* If the file zone was written underneath the file system, the zone
375	* append operation can still succedd (if the zone is not full) but
376	* the write append location will not be where we expect it to be.
377	* Check that we wrote where we intended to, that is, at z->z_wpoffset.
378	*/
379	za_sector = z->z_sector + (za_bio->append_offset >> SECTOR_SHIFT);
380	if (bio->bi_iter.bi_sector != za_sector) {
381	zonefs_warn(za_bio->inode->i_sb,
382	"Invalid write sector %llu for zone at %llu\n",
383	bio->bi_iter.bi_sector, z->z_sector);
384	bio->bi_status = BLK_STS_IOERR;
385	}
386
387	bio_end:
388	iomap_dio_bio_end_io(bio);
389	}
390
391	static void zonefs_file_zone_append_dio_submit_io(const struct iomap_iter *iter,
392	struct bio *bio,
393	loff_t file_offset)
394	{
395	struct zonefs_zone_append_bio *za_bio = zonefs_zone_append_bio(bio);
396	struct inode *inode = iter->inode;
397	struct zonefs_zone *z = zonefs_inode_zone(inode);
398
399	/*
400	* Issue a zone append BIO to process sync dio writes. The append
401	* file offset is saved to check the zone append write location
402	* on completion of the BIO.
403	*/
404	za_bio->inode = inode;
405	za_bio->append_offset = file_offset;
406
407	bio->bi_opf &= ~REQ_OP_WRITE;
408	bio->bi_opf \|= REQ_OP_ZONE_APPEND;
409	bio->bi_iter.bi_sector = z->z_sector;
410	bio->bi_end_io = zonefs_file_zone_append_dio_bio_end_io;
411
412	submit_bio(bio);
413	}
414
415	static int zonefs_file_write_dio_end_io(struct kiocb *iocb, ssize_t size,	344	static int zonefs_file_write_dio_end_io(struct kiocb *iocb, ssize_t size,
416	int error, unsigned int flags)	345	int error, unsigned int flags)
417	{	346	{
@@ -442,14 +371,6 @@ static int zonefs_file_write_dio_end_io(struct kiocb *iocb, ssize_t size, · 24 unmodified lines
442	return 0;	371	return 0;
443	}	372	}
444		373
445	static struct bio_set zonefs_zone_append_bio_set;
446
447	static const struct iomap_dio_ops zonefs_zone_append_dio_ops = {
448	.submit_io = zonefs_file_zone_append_dio_submit_io,
449	.end_io = zonefs_file_write_dio_end_io,
450	.bio_set = &zonefs_zone_append_bio_set,
451	};
452
453	static const struct iomap_dio_ops zonefs_write_dio_ops = {	374	static const struct iomap_dio_ops zonefs_write_dio_ops = {
454	.end_io = zonefs_file_write_dio_end_io,	375	.end_io = zonefs_file_write_dio_end_io,
455	};	376	};
@@ -533,9 +454,6 @@ static ssize_t zonefs_file_dio_write(struct kiocb iocb, struct iov_iter from) · 77 unmodified lines
533	struct zonefs_inode_info *zi = ZONEFS_I(inode);	454	struct zonefs_inode_info *zi = ZONEFS_I(inode);
534	struct zonefs_zone *z = zonefs_inode_zone(inode);	455	struct zonefs_zone *z = zonefs_inode_zone(inode);
535	struct super_block *sb = inode->i_sb;	456	struct super_block *sb = inode->i_sb;
536	const struct iomap_dio_ops *dio_ops;
537	bool sync = is_sync_kiocb(iocb);
538	bool append = false;
539	ssize_t ret, count;	457	ssize_t ret, count;
540		458
541	/*	459	/*
@@ -543,7 +461,8 @@ static ssize_t zonefs_file_dio_write(struct kiocb iocb, struct iov_iter from) · 1 unmodified line
543	* as this can cause write reordering (e.g. the first aio gets EAGAIN	461	* as this can cause write reordering (e.g. the first aio gets EAGAIN
544	* on the inode lock but the second goes through but is now unaligned).	462	* on the inode lock but the second goes through but is now unaligned).
545	*/	463	*/
546	if (zonefs_zone_is_seq(z) && !sync && (iocb->ki_flags & IOCB_NOWAIT))	464	if (zonefs_zone_is_seq(z) && !is_sync_kiocb(iocb) &&
		465	(iocb->ki_flags & IOCB_NOWAIT))
547	return -EOPNOTSUPP;	466	return -EOPNOTSUPP;
548		467
549	if (iocb->ki_flags & IOCB_NOWAIT) {	468	if (iocb->ki_flags & IOCB_NOWAIT) {
@@ -573,18 +492,6 @@ static ssize_t zonefs_file_dio_write(struct kiocb iocb, struct iov_iter from) · 23 unmodified lines
573	goto inode_unlock;	492	goto inode_unlock;
574	}	493	}
575	mutex_unlock(&zi->i_truncate_mutex);	494	mutex_unlock(&zi->i_truncate_mutex);
576	append = sync;
577	}
578
579	if (append) {
580	unsigned int max = bdev_max_zone_append_sectors(sb->s_bdev);
581
582	max = ALIGN_DOWN(max << SECTOR_SHIFT, sb->s_blocksize);
583	iov_iter_truncate(from, max);
584
585	dio_ops = &zonefs_zone_append_dio_ops;
586	} else {
587	dio_ops = &zonefs_write_dio_ops;
588	}	495	}
589		496
590	/*	497	/*
@@ -593,7 +500,7 @@ static ssize_t zonefs_file_dio_write(struct kiocb iocb, struct iov_iter from) · 2 unmodified lines
593	* the user can make sense of the error.	500	* the user can make sense of the error.
594	*/	501	*/
595	ret = iomap_dio_rw(iocb, from, &zonefs_write_iomap_ops,	502	ret = iomap_dio_rw(iocb, from, &zonefs_write_iomap_ops,
596	dio_ops, 0, NULL, 0);	503	&zonefs_write_dio_ops, 0, NULL, 0);
597	if (ret == -ENOTBLK)	504	if (ret == -ENOTBLK)
598	ret = -EBUSY;	505	ret = -EBUSY;
599		506
@@ -938,15 +845,3 @@ const struct file_operations zonefs_file_operations = { · 338 unmodified lines
938	.splice_write = iter_file_splice_write,	845	.splice_write = iter_file_splice_write,
939	.iopoll = iocb_bio_iopoll,	846	.iopoll = iocb_bio_iopoll,
940	};	847	};
941
942	int zonefs_file_bioset_init(void)
943	{
944	return bioset_init(&zonefs_zone_append_bio_set, BIO_POOL_SIZE,
945	offsetof(struct zonefs_zone_append_bio, bio),
946	BIOSET_NEED_BVECS);
947	}
948
949	void zonefs_file_bioset_exit(void)
950	{
951	bioset_exit(&zonefs_zone_append_bio_set);
952	}

fs/zonefs/super.c+1−8

 	BUILD_BUG_ON(sizeof(struct zonefs_super) != ZONEFS_SUPER_SIZE);
-	ret = zonefs_file_bioset_init();
-	if (ret)
-		return ret;
 	ret = zonefs_init_inodecache();
 	if (ret)
-		goto destroy_bioset;
+		return ret;
 	ret = zonefs_sysfs_init();
 	if (ret)
 	zonefs_sysfs_exit();
 destroy_inodecache:
 	zonefs_destroy_inodecache();
-destroy_bioset:
-	zonefs_file_bioset_exit();
 	return ret;
 }
 	unregister_filesystem(&zonefs_type);
 	zonefs_sysfs_exit();
 	zonefs_destroy_inodecache();
-	zonefs_file_bioset_exit();
 }
 MODULE_AUTHOR("Damien Le Moal");

fs/zonefs/zonefs.h+0−2

@@ -279,8 +279,6 @@ extern const struct file_operations zonefs_dir_operations; · 278 unmodified lines
279	extern const struct address_space_operations zonefs_file_aops;	279	extern const struct address_space_operations zonefs_file_aops;
280	extern const struct file_operations zonefs_file_operations;	280	extern const struct file_operations zonefs_file_operations;
281	int zonefs_file_truncate(struct inode *inode, loff_t isize);	281	int zonefs_file_truncate(struct inode *inode, loff_t isize);
282	int zonefs_file_bioset_init(void);
283	void zonefs_file_bioset_exit(void);
284		282
285	/* In sysfs.c */	283	/* In sysfs.c */
286	int zonefs_sysfs_register(struct super_block *sb);	284	int zonefs_sysfs_register(struct super_block *sb);

include/asm-generic/mshyperv.h+1−1

@@ -190,7 +190,7 @@ int hv_common_cpu_die(unsigned int cpu); · 189 unmodified lines
190		190
191	void *hv_alloc_hyperv_page(void);	191	void *hv_alloc_hyperv_page(void);
192	void *hv_alloc_hyperv_zeroed_page(void);	192	void *hv_alloc_hyperv_zeroed_page(void);
193	void hv_free_hyperv_page(unsigned long addr);	193	void hv_free_hyperv_page(void *addr);
194		194
195	/**	195	/**
196	* hv_cpu_number_to_vp_number() - Map CPU to VP.	196	* hv_cpu_number_to_vp_number() - Map CPU to VP.

include/asm-generic/word-at-a-time.h+1−1

@@ -38,7 +38,7 @@ static inline long find_zero(unsigned long mask) · 37 unmodified lines
38	return (mask >> 8) ? byte : byte + 1;	38	return (mask >> 8) ? byte : byte + 1;
39	}	39	}
40		40
41	static inline bool has_zero(unsigned long val, unsigned long data, const struct word_at_a_time c)	41	static inline unsigned long has_zero(unsigned long val, unsigned long data, const struct word_at_a_time c)
42	{	42	{
43	unsigned long rhs = val \| c->low_bits;	43	unsigned long rhs = val \| c->low_bits;
44	*data = rhs;	44	*data = rhs;

include/linux/bio.h+1−1

@@ -791,7 +791,7 @@ static inline int bio_integrity_add_page(struct bio bio, struct page page, · 790 unmodified lines
791	static inline void bio_set_polled(struct bio bio, struct kiocb kiocb)	791	static inline void bio_set_polled(struct bio bio, struct kiocb kiocb)
792	{	792	{
793	bio->bi_opf \|= REQ_POLLED;	793	bio->bi_opf \|= REQ_POLLED;
794	if (!is_sync_kiocb(kiocb))	794	if (kiocb->ki_flags & IOCB_NOWAIT)
795	bio->bi_opf \|= REQ_NOWAIT;	795	bio->bi_opf \|= REQ_NOWAIT;
796	}	796	}
797		797

include/linux/blkdev.h+0−1

@@ -969,7 +969,6 @@ struct blk_plug { · 968 unmodified lines
969		969
970	bool multiple_queues;	970	bool multiple_queues;
971	bool has_elevator;	971	bool has_elevator;
972	bool nowait;
973		972
974	struct list_head cb_list; /* md requires an unplug callback */	973	struct list_head cb_list; /* md requires an unplug callback */
975	};	974	};

include/linux/cpu.h+4−0

 					char *buf);
 extern ssize_t cpu_show_retbleed(struct device *dev,
 				 struct device_attribute *attr, char *buf);
+extern ssize_t cpu_show_spec_rstack_overflow(struct device *dev,
+					     struct device_attribute *attr, char *buf);
+extern ssize_t cpu_show_gds(struct device *dev,
+			    struct device_attribute *attr, char *buf);
 extern __printf(4, 5)
 struct device *cpu_device_create(struct device *parent, void *drvdata,

include/linux/cpumask.h+6−2

 /**
  * cpumask_first_and - return the first cpu from *srcp1 & *srcp2
- * @src1p: the first input
+ * @srcp1: the first input
- * @src2p: the second input
+ * @srcp2: the second input
  *
  * Returns >= nr_cpu_ids if no cpus set in both.  See also cpumask_next_and().
  */
 /**
  * cpumap_print_list_to_buf  - copies the cpumask into the buffer as
  *	comma-separated list of cpus
+ * @buf: the buffer to copy into
+ * @mask: the cpumask to copy
+ * @off: in the string from which we are copying, we copy to @buf
+ * @count: the maximum number of bytes to print
  *
  * Everything is same with the above cpumap_print_bitmask_to_buf()
  * except the print format.

include/linux/fs.h+7−1

 	ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
 	int (*iopoll)(struct kiocb *kiocb, struct io_comp_batch *,
 			unsigned int flags);
-	int (*iterate) (struct file *, struct dir_context *);
 	int (*iterate_shared) (struct file *, struct dir_context *);
 	__poll_t (*poll) (struct file *, struct poll_table_struct *);
 	long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
 				unsigned int poll_flags);
 } __randomize_layout;
+/* Wrap a directory iterator that needs exclusive inode access */
+int wrap_directory_iterator(struct file *, struct dir_context *,
+			    int (*) (struct file *, struct dir_context *));
+#define WRAP_DIR_ITER(x) \
+	static int shared_##x(struct file *file , struct dir_context *ctx) \
+	{ return wrap_directory_iterator(file, ctx, x); }
 struct inode_operations {
 	struct dentry * (*lookup) (struct inode *,struct dentry *, unsigned int);
 	const char * (*get_link) (struct dentry *, struct inode *, struct delayed_call *);

include/linux/hyperv.h+0−3

@@ -1239,9 +1239,6 @@ extern int vmbus_recvpacket_raw(struct vmbus_channel *channel, · 1238 unmodified lines
1239	u32 *buffer_actual_len,	1239	u32 *buffer_actual_len,
1240	u64 *requestid);	1240	u64 *requestid);
1241		1241
1242
1243	extern void vmbus_ontimer(unsigned long data);
1244
1245	/* Base driver object */	1242	/* Base driver object */
1246	struct hv_driver {	1243	struct hv_driver {
1247	const char *name;	1244	const char *name;

include/linux/intel_rapl.h+10−4

 #define RAPL_DOMAIN_NAME_LENGTH 16
+union rapl_reg {
+	void __iomem *mmio;
+	u32 msr;
+	u64 val;
+};
 struct rapl_domain {
 	char name[RAPL_DOMAIN_NAME_LENGTH];
 	enum rapl_domain_type id;
-	u64 regs[RAPL_DOMAIN_REG_MAX];
+	union rapl_reg regs[RAPL_DOMAIN_REG_MAX];
 	struct powercap_zone power_zone;
 	struct rapl_domain_data rdd;
 	struct rapl_power_limit rpl[NR_POWER_LIMITS];
 };
 struct reg_action {
-	u64 reg;
+	union rapl_reg reg;
 	u64 mask;
 	u64 value;
 	int err;
 	enum rapl_if_type type;
 	struct powercap_control_type *control_type;
 	enum cpuhp_state pcap_rapl_online;
-	u64 reg_unit;
+	union rapl_reg reg_unit;
-	u64 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
+	union rapl_reg regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX];
 	int limits[RAPL_DOMAIN_MAX];
 	int (*read_raw)(int id, struct reg_action *ra);
 	int (*write_raw)(int id, struct reg_action *ra);

include/linux/prefetch.h+1−6

 	prefetch() should be defined by the architecture, if not, the
 	#define below provides a no-op define.
-	There are 3 prefetch() macros:
+	There are 2 prefetch() macros:
 	prefetch(x)  	- prefetches the cacheline at "x" for read
 	prefetchw(x)	- prefetches the cacheline at "x" for write
-	spin_lock_prefetch(x) - prefetches the spinlock *x for taking
 	there is also PREFETCH_STRIDE which is the architecure-preferred
 	"lookahead" size for prefetching streamed operations.
 #define prefetchw(x) __builtin_prefetch(x,1)
 #endif
-#ifndef ARCH_HAS_SPINLOCK_PREFETCH
-#define spin_lock_prefetch(x) prefetchw(x)
-#endif
 #ifndef PREFETCH_STRIDE
 #define PREFETCH_STRIDE (4*L1_CACHE_BYTES)
 #endif

include/linux/skmsg.h+1−0

@@ -62,6 +62,7 @@ struct sk_psock_progs { · 61 unmodified lines
62		62
63	enum sk_psock_state_bits {	63	enum sk_psock_state_bits {
64	SK_PSOCK_TX_ENABLED,	64	SK_PSOCK_TX_ENABLED,
		65	SK_PSOCK_RX_STRP_ENABLED,
65	};	66	};
66		67
67	struct sk_psock_link {	68	struct sk_psock_link {

include/linux/spi/corgi_lcd.h+2−0

@@ -15,4 +15,6 @@ struct corgi_lcd_platform_data { · 14 unmodified lines
15	void (*kick_battery)(void);	15	void (*kick_battery)(void);
16	};	16	};
17		17
		18	void corgi_lcd_limit_intensity(int limit);
		19
18	#endif /* __LINUX_SPI_CORGI_LCD_H */	20	#endif /* __LINUX_SPI_CORGI_LCD_H */

include/linux/spi/spi-mem.h+4−0

 		u8 nbytes;
 		u8 buswidth;
 		u8 dtr : 1;
+		u8 __pad : 7;
 		u16 opcode;
 	} cmd;
 		u8 nbytes;
 		u8 buswidth;
 		u8 dtr : 1;
+		u8 __pad : 7;
 		u64 val;
 	} addr;
 		u8 nbytes;
 		u8 buswidth;
 		u8 dtr : 1;
+		u8 __pad : 7;
 	} dummy;
 	struct {
 		u8 buswidth;
 		u8 dtr : 1;
 		u8 ecc : 1;
+		u8 __pad : 6;
 		enum spi_mem_data_dir dir;
 		unsigned int nbytes;
 		union {

include/linux/tpm.h+1−0

@@ -283,6 +283,7 @@ enum tpm_chip_flags { · 282 unmodified lines
283	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),	283	TPM_CHIP_FLAG_FIRMWARE_POWER_MANAGED = BIT(6),
284	TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),	284	TPM_CHIP_FLAG_FIRMWARE_UPGRADE = BIT(7),
285	TPM_CHIP_FLAG_SUSPENDED = BIT(8),	285	TPM_CHIP_FLAG_SUSPENDED = BIT(8),
		286	TPM_CHIP_FLAG_HWRNG_DISABLED = BIT(9),
286	};	287	};
287		288
288	#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)	289	#define to_tpm_chip(d) container_of(d, struct tpm_chip, dev)

include/net/cfg80211.h+3−0

@@ -562,6 +562,9 @@ ieee80211_get_sband_iftype_data(const struct ieee80211_supported_band *sband, · 561 unmodified lines
562	if (WARN_ON(iftype >= NL80211_IFTYPE_MAX))	562	if (WARN_ON(iftype >= NL80211_IFTYPE_MAX))
563	return NULL;	563	return NULL;
564		564
		565	if (iftype == NL80211_IFTYPE_AP_VLAN)
		566	iftype = NL80211_IFTYPE_AP;
		567
565	for (i = 0; i < sband->n_iftype_data; i++) {	568	for (i = 0; i < sband->n_iftype_data; i++) {
566	const struct ieee80211_sband_iftype_data *data =	569	const struct ieee80211_sband_iftype_data *data =
567	&sband->iftype_data[i];	570	&sband->iftype_data[i];

include/net/gro.h+43−0

@@ -452,6 +452,49 @@ static inline void gro_normal_one(struct napi_struct napi, struct sk_buff skb, · 451 unmodified lines
452	gro_normal_list(napi);	452	gro_normal_list(napi);
453	}	453	}
454		454
		455	/* This function is the alternative of 'inet_iif' and 'inet_sdif'
		456	* functions in case we can not rely on fields of IPCB.
		457	*
		458	* The caller must verify skb_valid_dst(skb) is false and skb->dev is initialized.
		459	* The caller must hold the RCU read lock.
		460	*/
		461	static inline void inet_get_iif_sdif(const struct sk_buff skb, int iif, int *sdif)
		462	{
		463	*iif = inet_iif(skb) ?: skb->dev->ifindex;
		464	*sdif = 0;
		465
		466	#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
		467	if (netif_is_l3_slave(skb->dev)) {
		468	struct net_device *master = netdev_master_upper_dev_get_rcu(skb->dev);
		469
		470	sdif = iif;
		471	*iif = master ? master->ifindex : 0;
		472	}
		473	#endif
		474	}
		475
		476	/* This function is the alternative of 'inet6_iif' and 'inet6_sdif'
		477	* functions in case we can not rely on fields of IP6CB.
		478	*
		479	* The caller must verify skb_valid_dst(skb) is false and skb->dev is initialized.
		480	* The caller must hold the RCU read lock.
		481	*/
		482	static inline void inet6_get_iif_sdif(const struct sk_buff skb, int iif, int *sdif)
		483	{
		484	/* using skb->dev->ifindex because skb_dst(skb) is not initialized */
		485	*iif = skb->dev->ifindex;
		486	*sdif = 0;
		487
		488	#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
		489	if (netif_is_l3_slave(skb->dev)) {
		490	struct net_device *master = netdev_master_upper_dev_get_rcu(skb->dev);
		491
		492	sdif = iif;
		493	*iif = master ? master->ifindex : 0;
		494	}
		495	#endif
		496	}
		497
455	extern struct list_head offload_base;	498	extern struct list_head offload_base;
456		499
457	#endif /* _NET_IPV6_GRO_H */	500	#endif /* _NET_IPV6_GRO_H */

include/net/inet_sock.h+4−3

@@ -107,11 +107,12 @@ static inline struct inet_request_sock inet_rsk(const struct request_sock sk) · 106 unmodified lines
107		107
108	static inline u32 inet_request_mark(const struct sock sk, struct sk_buff skb)	108	static inline u32 inet_request_mark(const struct sock sk, struct sk_buff skb)
109	{	109	{
110	if (!sk->sk_mark &&	110	u32 mark = READ_ONCE(sk->sk_mark);
111	READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_fwmark_accept))	111
		112	if (!mark && READ_ONCE(sock_net(sk)->ipv4.sysctl_tcp_fwmark_accept))
112	return skb->mark;	113	return skb->mark;
113		114
114	return sk->sk_mark;	115	return mark;
115	}	116	}
116		117
117	static inline int inet_request_bound_dev_if(const struct sock *sk,	118	static inline int inet_request_bound_dev_if(const struct sock *sk,

include/net/ip.h+1−1

@@ -93,7 +93,7 @@ static inline void ipcm_init_sk(struct ipcm_cookie *ipcm, · 92 unmodified lines
93	{	93	{
94	ipcm_init(ipcm);	94	ipcm_init(ipcm);
95		95
96	ipcm->sockc.mark = inet->sk.sk_mark;	96	ipcm->sockc.mark = READ_ONCE(inet->sk.sk_mark);
97	ipcm->sockc.tsflags = inet->sk.sk_tsflags;	97	ipcm->sockc.tsflags = inet->sk.sk_tsflags;
98	ipcm->oif = READ_ONCE(inet->sk.sk_bound_dev_if);	98	ipcm->oif = READ_ONCE(inet->sk.sk_bound_dev_if);
99	ipcm->addr = inet->inet_saddr;	99	ipcm->addr = inet->inet_saddr;

include/net/netfilter/nf_tables.h+45−75

  *
  *	@list: table set list node
  *	@bindings: list of set bindings
+ *	@refs: internal refcounting for async set destruction
  *	@table: table this set belongs to
  *	@net: netnamespace this set belongs to
  * 	@name: name of the set
 struct nft_set {
 	struct list_head		list;
 	struct list_head		bindings;
+	refcount_t			refs;
 	struct nft_table		*table;
 	possible_net_t			net;
 	char				*name;
 	struct list_head		pending_update;
 	/* runtime data below here */
 	const struct nft_set_ops	*ops ____cacheline_aligned;
-	u16				flags:14,
+	u16				flags:13,
+					dead:1,
 					genmask:2;
 	u8				klen;
 	u8				dlen;
 struct nft_set_ext *nft_set_catchall_lookup(const struct net *net,
 					    const struct nft_set *set);
-void *nft_set_catchall_gc(const struct nft_set *set);
 static inline unsigned long nft_set_gc_interval(const struct nft_set *set)
 {
 void nf_tables_set_elem_destroy(const struct nft_ctx *ctx,
 				const struct nft_set *set, void *elem);
-/**
- *	struct nft_set_gc_batch_head - nf_tables set garbage collection batch
- *
- *	@rcu: rcu head
- *	@set: set the elements belong to
- *	@cnt: count of elements
- */
-struct nft_set_gc_batch_head {
-	struct rcu_head			rcu;
-	const struct nft_set		*set;
-	unsigned int			cnt;
-};
-#define NFT_SET_GC_BATCH_SIZE	((PAGE_SIZE -				  \
-				  sizeof(struct nft_set_gc_batch_head)) / \
-				 sizeof(void *))
-/**
- *	struct nft_set_gc_batch - nf_tables set garbage collection batch
- *
- * 	@head: GC batch head
- * 	@elems: garbage collection elements
- */
-struct nft_set_gc_batch {
-	struct nft_set_gc_batch_head	head;
-	void				*elems[NFT_SET_GC_BATCH_SIZE];
-};
-struct nft_set_gc_batch *nft_set_gc_batch_alloc(const struct nft_set *set,
-						gfp_t gfp);
-void nft_set_gc_batch_release(struct rcu_head *rcu);
-static inline void nft_set_gc_batch_complete(struct nft_set_gc_batch *gcb)
-{
-	if (gcb != NULL)
-		call_rcu(&gcb->head.rcu, nft_set_gc_batch_release);
-}
-static inline struct nft_set_gc_batch *
-nft_set_gc_batch_check(const struct nft_set *set, struct nft_set_gc_batch *gcb,
-		       gfp_t gfp)
-{
-	if (gcb != NULL) {
-		if (gcb->head.cnt + 1 < ARRAY_SIZE(gcb->elems))
-			return gcb;
-		nft_set_gc_batch_complete(gcb);
-	}
-	return nft_set_gc_batch_alloc(set, gfp);
-}
-static inline void nft_set_gc_batch_add(struct nft_set_gc_batch *gcb,
-					void *elem)
-{
-	gcb->elems[gcb->head.cnt++] = elem;
-}
 struct nft_expr_ops;
 /**
  *	struct nft_expr_type - nf_tables expression type
 #endif /* IS_ENABLED(CONFIG_NF_TABLES) */
-/*
+#define NFT_SET_ELEM_DEAD_MASK	(1 << 2)
- * We use a free bit in the genmask field to indicate the element
- * is busy, meaning it is currently being processed either by
- * the netlink API or GC.
- *
- * Even though the genmask is only a single byte wide, this works
- * because the extension structure if fully constant once initialized,
- * so there are no non-atomic write accesses unless it is already
- * marked busy.
- */
-#define NFT_SET_ELEM_BUSY_MASK	(1 << 2)
 #if defined(__LITTLE_ENDIAN_BITFIELD)
-#define NFT_SET_ELEM_BUSY_BIT	2
+#define NFT_SET_ELEM_DEAD_BIT	2
 #elif defined(__BIG_ENDIAN_BITFIELD)
-#define NFT_SET_ELEM_BUSY_BIT	(BITS_PER_LONG - BITS_PER_BYTE + 2)
+#define NFT_SET_ELEM_DEAD_BIT	(BITS_PER_LONG - BITS_PER_BYTE + 2)
 #else
 #error
 #endif
-static inline int nft_set_elem_mark_busy(struct nft_set_ext *ext)
+static inline void nft_set_elem_dead(struct nft_set_ext *ext)
 {
 	unsigned long *word = (unsigned long *)ext;
 	BUILD_BUG_ON(offsetof(struct nft_set_ext, genmask) != 0);
-	return test_and_set_bit(NFT_SET_ELEM_BUSY_BIT, word);
+	set_bit(NFT_SET_ELEM_DEAD_BIT, word);
 }
-static inline void nft_set_elem_clear_busy(struct nft_set_ext *ext)
+static inline int nft_set_elem_is_dead(const struct nft_set_ext *ext)
 {
 	unsigned long *word = (unsigned long *)ext;
-	clear_bit(NFT_SET_ELEM_BUSY_BIT, word);
+	BUILD_BUG_ON(offsetof(struct nft_set_ext, genmask) != 0);
+	return test_bit(NFT_SET_ELEM_DEAD_BIT, word);
 }
 /**
 #define nft_trans_flowtable_flags(trans)	\
 	(((struct nft_trans_flowtable *)trans->data)->flags)
+#define NFT_TRANS_GC_BATCHCOUNT	256
+struct nft_trans_gc {
+	struct list_head	list;
+	struct net		*net;
+	struct nft_set		*set;
+	u32			seq;
+	u8			count;
+	void			*priv[NFT_TRANS_GC_BATCHCOUNT];
+	struct rcu_head		rcu;
+};
+struct nft_trans_gc *nft_trans_gc_alloc(struct nft_set *set,
+					unsigned int gc_seq, gfp_t gfp);
+void nft_trans_gc_destroy(struct nft_trans_gc *trans);
+struct nft_trans_gc *nft_trans_gc_queue_async(struct nft_trans_gc *gc,
+					      unsigned int gc_seq, gfp_t gfp);
+void nft_trans_gc_queue_async_done(struct nft_trans_gc *gc);
+struct nft_trans_gc *nft_trans_gc_queue_sync(struct nft_trans_gc *gc, gfp_t gfp);
+void nft_trans_gc_queue_sync_done(struct nft_trans_gc *trans);
+void nft_trans_gc_elem_add(struct nft_trans_gc *gc, void *priv);
+struct nft_trans_gc *nft_trans_gc_catchall(struct nft_trans_gc *gc,
+					   unsigned int gc_seq);
+void nft_setelem_data_deactivate(const struct net *net,
+				 const struct nft_set *set,
+				 struct nft_set_elem *elem);
 int __init nft_chain_filter_init(void);
 void nft_chain_filter_fini(void);
 	struct mutex		commit_mutex;
 	u64			table_handle;
 	unsigned int		base_seq;
+	unsigned int		gc_seq;
 };
 extern unsigned int nf_tables_net_id;

include/net/route.h+2−2

@@ -168,7 +168,7 @@ static inline struct rtable ip_route_output_ports(struct net net, struct flowi · 167 unmodified lines
168	__be16 dport, __be16 sport,	168	__be16 dport, __be16 sport,
169	__u8 proto, __u8 tos, int oif)	169	__u8 proto, __u8 tos, int oif)
170	{	170	{
171	flowi4_init_output(fl4, oif, sk ? sk->sk_mark : 0, tos,	171	flowi4_init_output(fl4, oif, sk ? READ_ONCE(sk->sk_mark) : 0, tos,
172	RT_SCOPE_UNIVERSE, proto,	172	RT_SCOPE_UNIVERSE, proto,
173	sk ? inet_sk_flowi_flags(sk) : 0,	173	sk ? inet_sk_flowi_flags(sk) : 0,
174	daddr, saddr, dport, sport, sock_net_uid(net, sk));	174	daddr, saddr, dport, sport, sock_net_uid(net, sk));
@@ -301,7 +301,7 @@ static inline void ip_route_connect_init(struct flowi4 *fl4, __be32 dst, · 126 unmodified lines
301	if (inet_sk(sk)->transparent)	301	if (inet_sk(sk)->transparent)
302	flow_flags \|= FLOWI_FLAG_ANYSRC;	302	flow_flags \|= FLOWI_FLAG_ANYSRC;
303		303
304	flowi4_init_output(fl4, oif, sk->sk_mark, ip_sock_rt_tos(sk),	304	flowi4_init_output(fl4, oif, READ_ONCE(sk->sk_mark), ip_sock_rt_tos(sk),
305	ip_sock_rt_scope(sk), protocol, flow_flags, dst,	305	ip_sock_rt_scope(sk), protocol, flow_flags, dst,
306	src, dport, sport, sk->sk_uid);	306	src, dport, sport, sk->sk_uid);
307	}	307	}

include/net/vxlan.h+2−2

@@ -556,12 +556,12 @@ static inline void vxlan_flag_attr_error(int attrtype, · 555 unmodified lines
556	}	556	}
557		557
558	static inline bool vxlan_fdb_nh_path_select(struct nexthop *nh,	558	static inline bool vxlan_fdb_nh_path_select(struct nexthop *nh,
559	int hash,	559	u32 hash,
560	struct vxlan_rdst *rdst)	560	struct vxlan_rdst *rdst)
561	{	561	{
562	struct fib_nh_common *nhc;	562	struct fib_nh_common *nhc;
563		563
564	nhc = nexthop_path_fdb_result(nh, hash);	564	nhc = nexthop_path_fdb_result(nh, hash >> 1);
565	if (unlikely(!nhc))	565	if (unlikely(!nhc))
566	return false;	566	return false;
567		567

include/scsi/scsi_device.h+1−0

@@ -194,6 +194,7 @@ struct scsi_device { · 193 unmodified lines
194	unsigned no_start_on_add:1; /* do not issue start on add */	194	unsigned no_start_on_add:1; /* do not issue start on add */
195	unsigned allow_restart:1; /* issue START_UNIT in error handler */	195	unsigned allow_restart:1; /* issue START_UNIT in error handler */
196	unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */	196	unsigned manage_start_stop:1; /* Let HLD (sd) manage start/stop */
		197	unsigned no_start_on_resume:1; /* Do not issue START_STOP_UNIT on resume */
197	unsigned start_stop_pwr_cond:1; /* Set power cond. in START_STOP_UNIT */	198	unsigned start_stop_pwr_cond:1; /* Set power cond. in START_STOP_UNIT */
198	unsigned no_uld_attach:1; /* disable connecting to upper level drivers */	199	unsigned no_uld_attach:1; /* disable connecting to upper level drivers */
199	unsigned select_no_atn:1;	200	unsigned select_no_atn:1;

include/soc/tegra/mc.h+3−0

@@ -175,6 +175,9 @@ struct tegra_mc_icc_ops { · 174 unmodified lines
175	int (get_bw)(struct icc_node node, u32 avg, u32 peak);	175	int (get_bw)(struct icc_node node, u32 avg, u32 peak);
176	};	176	};
177		177
		178	struct icc_node tegra_mc_icc_xlate(struct of_phandle_args spec, void *data);
		179	extern const struct tegra_mc_icc_ops tegra_mc_icc_ops;
		180
178	struct tegra_mc_ops {	181	struct tegra_mc_ops {
179	/*	182	/*
180	* @probe: Callback to set up SoC-specific bits of the memory controller. This is called	183	* @probe: Callback to set up SoC-specific bits of the memory controller. This is called

include/trace/events/tcp.h+4−1

 		__field(const void *, skaddr)
 		__field(__u16, sport)
 		__field(__u16, dport)
+		__field(__u16, family)
 		__array(__u8, saddr, 4)
 		__array(__u8, daddr, 4)
 		__array(__u8, saddr_v6, 16)
 		__entry->sport = ntohs(inet->inet_sport);
 		__entry->dport = ntohs(inet->inet_dport);
+		__entry->family = sk->sk_family;
 		p32 = (__be32 *) __entry->saddr;
 		*p32 = inet->inet_saddr;
 		__entry->cong_state = ca_state;
 	),
-	TP_printk("sport=%hu dport=%hu saddr=%pI4 daddr=%pI4 saddrv6=%pI6c daddrv6=%pI6c cong_state=%u",
+	TP_printk("family=%s sport=%hu dport=%hu saddr=%pI4 daddr=%pI4 saddrv6=%pI6c daddrv6=%pI6c cong_state=%u",
+		  show_family_name(__entry->family),
 		  __entry->sport, __entry->dport,
 		  __entry->saddr, __entry->daddr,
 		  __entry->saddr_v6, __entry->daddr_v6,

include/uapi/linux/pkt_cls.h+3−1

 	TCA_FLOWER_KEY_CFM_OPT_UNSPEC,
 	TCA_FLOWER_KEY_CFM_MD_LEVEL,
 	TCA_FLOWER_KEY_CFM_OPCODE,
-	TCA_FLOWER_KEY_CFM_OPT_MAX,
+	__TCA_FLOWER_KEY_CFM_OPT_MAX,
 };
+#define TCA_FLOWER_KEY_CFM_OPT_MAX (__TCA_FLOWER_KEY_CFM_OPT_MAX - 1)
 #define TCA_FLOWER_MASK_FLAGS_RANGE	(1 << 0) /* Range-based match */
 /* Match-all classifier */

io_uring/io_uring.c+3−0

 	 * - use the kernel virtual address of the shared io_uring context
 	 *   (instead of the userspace-provided address, which has to be 0UL
 	 *   anyway).
+	 * - use the same pgoff which the get_unmapped_area() uses to
+	 *   calculate the page colouring.
 	 * For architectures without such aliasing requirements, the
 	 * architecture will return any suitable mapping because addr is 0.
 	 */
 	pgoff = 0;	/* has been translated to ptr above */
 #ifdef SHM_COLOUR
 	addr = (uintptr_t) ptr;
+	pgoff = addr >> PAGE_SHIFT;
 #else
 	addr = 0UL;
 #endif

io_uring/openclose.c+4−2

 {
 	/*
 	 * Don't bother trying for O_TRUNC, O_CREAT, or O_TMPFILE open,
-	 * it'll always -EAGAIN
+	 * it'll always -EAGAIN. Note that we test for __O_TMPFILE because
+	 * O_TMPFILE includes O_DIRECTORY, which isn't a flag we need to force
+	 * async for.
 	 */
-	return open->how.flags & (O_TRUNC | O_CREAT | O_TMPFILE);
+	return open->how.flags & (O_TRUNC | O_CREAT | __O_TMPFILE);
 }
 static int __io_openat_prep(struct io_kiocb *req, const struct io_uring_sqe *sqe)

kernel/bpf/cpumap.c+21−14

 #include <linux/sched.h>
 #include <linux/workqueue.h>
 #include <linux/kthread.h>
+#include <linux/completion.h>
 #include <trace/events/xdp.h>
 #include <linux/btf_ids.h>
 	struct rcu_head rcu;
 	struct work_struct kthread_stop_wq;
+	struct completion kthread_running;
 };
 struct bpf_cpu_map {
 	 * invoked cpu_map_kthread_stop(). Catch any broken behaviour
 	 * gracefully and warn once.
 	 */
-	struct xdp_frame *xdpf;
+	void *ptr;
-	while ((xdpf = ptr_ring_consume(ring)))
+	while ((ptr = ptr_ring_consume(ring))) {
-		if (WARN_ON_ONCE(xdpf))
+		WARN_ON_ONCE(1);
-			xdp_return_frame(xdpf);
+		if (unlikely(__ptr_test_bit(0, &ptr))) {
+			__ptr_clear_bit(0, &ptr);
+			kfree_skb(ptr);
+			continue;
+		}
+		xdp_return_frame(ptr);
+	}
 }
 static void put_cpu_map_entry(struct bpf_cpu_map_entry *rcpu)
 static void cpu_map_kthread_stop(struct work_struct *work)
 {
 	struct bpf_cpu_map_entry *rcpu;
-	int err;
 	rcpu = container_of(work, struct bpf_cpu_map_entry, kthread_stop_wq);
 	rcu_barrier();
 	/* kthread_stop will wake_up_process and wait for it to complete */
-	err = kthread_stop(rcpu->kthread);
+	kthread_stop(rcpu->kthread);
-	if (err) {
-		/* kthread_stop may be called before cpu_map_kthread_run
-		 * is executed, so we need to release the memory related
-		 * to rcpu.
-		 */
-		put_cpu_map_entry(rcpu);
-	}
 }
 static void cpu_map_bpf_prog_run_skb(struct bpf_cpu_map_entry *rcpu,
 	return nframes;
 }
 static int cpu_map_kthread_run(void *data)
 {
 	struct bpf_cpu_map_entry *rcpu = data;
+	complete(&rcpu->kthread_running);
 	set_current_state(TASK_INTERRUPTIBLE);
 	/* When kthread gives stop order, then rcpu have been disconnected
 		goto free_ptr_ring;
 	/* Setup kthread */
+	init_completion(&rcpu->kthread_running);
 	rcpu->kthread = kthread_create_on_node(cpu_map_kthread_run, rcpu, numa,
 					       "cpumap/%d/map:%d", cpu,
 					       map->id);
 	kthread_bind(rcpu->kthread, cpu);
 	wake_up_process(rcpu->kthread);
+	/* Make sure kthread has been running, so kthread_stop() will not
+	 * stop the kthread prematurely and all pending frames or skbs
+	 * will be handled by the kthread before kthread_stop() returns.
+	 */
+	wait_for_completion(&rcpu->kthread_running);
 	return rcpu;
 free_prog:

kernel/power/hibernate.c+1−1

@@ -1166,7 +1166,7 @@ static ssize_t resume_store(struct kobject kobj, struct kobj_attribute attr, · 1165 unmodified lines
1166	int error;	1166	int error;
1167		1167
1168	if (!hibernation_available())	1168	if (!hibernation_available())
1169	return 0;	1169	return n;
1170		1170
1171	if (len && buf[len-1] == '\n')	1171	if (len && buf[len-1] == '\n')
1172	len--;	1172	len--;

kernel/trace/bpf_trace.c+12−5

 BPF_CALL_5(bpf_perf_event_output, struct pt_regs *, regs, struct bpf_map *, map,
 	   u64, flags, void *, data, u64, size)
 {
-	struct bpf_trace_sample_data *sds = this_cpu_ptr(&bpf_trace_sds);
+	struct bpf_trace_sample_data *sds;
-	int nest_level = this_cpu_inc_return(bpf_trace_nest_level);
 	struct perf_raw_record raw = {
 		.frag = {
 			.size = size,
 		},
 	};
 	struct perf_sample_data *sd;
-	int err;
+	int nest_level, err;
+	preempt_disable();
+	sds = this_cpu_ptr(&bpf_trace_sds);
+	nest_level = this_cpu_inc_return(bpf_trace_nest_level);
 	if (WARN_ON_ONCE(nest_level > ARRAY_SIZE(sds->sds))) {
 		err = -EBUSY;
 	perf_sample_save_raw_data(sd, &raw);
 	err = __bpf_perf_event_output(regs, map, flags, sd);
 out:
 	this_cpu_dec(bpf_trace_nest_level);
+	preempt_enable();
 	return err;
 }
 u64 bpf_event_output(struct bpf_map *map, u64 flags, void *meta, u64 meta_size,
 		     void *ctx, u64 ctx_size, bpf_ctx_copy_t ctx_copy)
 {
-	int nest_level = this_cpu_inc_return(bpf_event_output_nest_level);
 	struct perf_raw_frag frag = {
 		.copy		= ctx_copy,
 		.size		= ctx_size,
 	};
 	struct perf_sample_data *sd;
 	struct pt_regs *regs;
+	int nest_level;
 	u64 ret;
+	preempt_disable();
+	nest_level = this_cpu_inc_return(bpf_event_output_nest_level);
 	if (WARN_ON_ONCE(nest_level > ARRAY_SIZE(bpf_misc_sds.sds))) {
 		ret = -EBUSY;
 		goto out;
 	ret = __bpf_perf_event_output(regs, map, flags, sd);
 out:
 	this_cpu_dec(bpf_event_output_nest_level);
+	preempt_enable();
 	return ret;
 }

kernel/workqueue.c+42−1

@@ -52,6 +52,7 @@ · 51 unmodified lines
52	#include <linux/sched/debug.h>	52	#include <linux/sched/debug.h>
53	#include <linux/nmi.h>	53	#include <linux/nmi.h>
54	#include <linux/kvm_para.h>	54	#include <linux/kvm_para.h>
		55	#include <linux/delay.h>
55		56
56	#include "workqueue_internal.h"	57	#include "workqueue_internal.h"
57		58
@@ -338,8 +339,10 @@ static cpumask_var_t *wq_numa_possible_cpumask; · 280 unmodified lines
338	* Per-cpu work items which run for longer than the following threshold are	339	* Per-cpu work items which run for longer than the following threshold are
339	* automatically considered CPU intensive and excluded from concurrency	340	* automatically considered CPU intensive and excluded from concurrency
340	* management to prevent them from noticeably delaying other per-cpu work items.	341	* management to prevent them from noticeably delaying other per-cpu work items.
		342	* ULONG_MAX indicates that the user hasn't overridden it with a boot parameter.
		343	* The actual value is initialized in wq_cpu_intensive_thresh_init().
341	*/	344	*/
342	static unsigned long wq_cpu_intensive_thresh_us = 10000;	345	static unsigned long wq_cpu_intensive_thresh_us = ULONG_MAX;
343	module_param_named(cpu_intensive_thresh_us, wq_cpu_intensive_thresh_us, ulong, 0644);	346	module_param_named(cpu_intensive_thresh_us, wq_cpu_intensive_thresh_us, ulong, 0644);
344		347
345	static bool wq_disable_numa;	348	static bool wq_disable_numa;
@@ -6513,6 +6516,42 @@ void __init workqueue_init_early(void) · 6167 unmodified lines
6513	!system_freezable_power_efficient_wq);	6516	!system_freezable_power_efficient_wq);
6514	}	6517	}
6515		6518
		6519	static void __init wq_cpu_intensive_thresh_init(void)
		6520	{
		6521	unsigned long thresh;
		6522	unsigned long bogo;
		6523
		6524	/* if the user set it to a specific value, keep it */
		6525	if (wq_cpu_intensive_thresh_us != ULONG_MAX)
		6526	return;
		6527
		6528	/*
		6529	* The default of 10ms is derived from the fact that most modern (as of
		6530	* 2023) processors can do a lot in 10ms and that it's just below what
		6531	* most consider human-perceivable. However, the kernel also runs on a
		6532	* lot slower CPUs including microcontrollers where the threshold is way
		6533	* too low.
		6534	*
		6535	* Let's scale up the threshold upto 1 second if BogoMips is below 4000.
		6536	* This is by no means accurate but it doesn't have to be. The mechanism
		6537	* is still useful even when the threshold is fully scaled up. Also, as
		6538	* the reports would usually be applicable to everyone, some machines
		6539	* operating on longer thresholds won't significantly diminish their
		6540	* usefulness.
		6541	*/
		6542	thresh = 10 * USEC_PER_MSEC;
		6543
		6544	/* see init/calibrate.c for lpj -> BogoMIPS calculation */
		6545	bogo = max_t(unsigned long, loops_per_jiffy / 500000 * HZ, 1);
		6546	if (bogo < 4000)
		6547	thresh = min_t(unsigned long, thresh * 4000 / bogo, USEC_PER_SEC);
		6548
		6549	pr_debug("wq_cpu_intensive_thresh: lpj=%lu BogoMIPS=%lu thresh_us=%lu\n",
		6550	loops_per_jiffy, bogo, thresh);
		6551
		6552	wq_cpu_intensive_thresh_us = thresh;
		6553	}
		6554
6516	/**	6555	/**
6517	* workqueue_init - bring workqueue subsystem fully online	6556	* workqueue_init - bring workqueue subsystem fully online
6518	*	6557	*
@@ -6528,6 +6567,8 @@ void __init workqueue_init(void) · 9 unmodified lines
6528	struct worker_pool *pool;	6567	struct worker_pool *pool;
6529	int cpu, bkt;	6568	int cpu, bkt;
6530		6569
		6570	wq_cpu_intensive_thresh_init();
		6571
6531	/*	6572	/*
6532	* It'd be simpler to initialize NUMA in workqueue_init_early() but	6573	* It'd be simpler to initialize NUMA in workqueue_init_early() but
6533	* CPU to node mapping may not be available that early on some	6574	* CPU to node mapping may not be available that early on some

lib/Kconfig.debug+1−1

@@ -1200,7 +1200,7 @@ config WQ_CPU_INTENSIVE_REPORT · 1199 unmodified lines
1200	help	1200	help
1201	Say Y here to enable reporting of concurrency-managed per-cpu work	1201	Say Y here to enable reporting of concurrency-managed per-cpu work
1202	items that hog CPUs for longer than	1202	items that hog CPUs for longer than
1203	workqueue.cpu_intensive_threshold_us. Workqueue automatically	1203	workqueue.cpu_intensive_thresh_us. Workqueue automatically
1204	detects and excludes them from concurrency management to prevent	1204	detects and excludes them from concurrency management to prevent
1205	them from stalling other per-cpu work items. Occassional	1205	them from stalling other per-cpu work items. Occassional
1206	triggering may not necessarily indicate a problem. Repeated	1206	triggering may not necessarily indicate a problem. Repeated

lib/Makefile+6−0

 obj-$(CONFIG_TEST_DYNAMIC_DEBUG) += test_dynamic_debug.o
 obj-$(CONFIG_TEST_PRINTF) += test_printf.o
 obj-$(CONFIG_TEST_SCANF) += test_scanf.o
 obj-$(CONFIG_TEST_BITMAP) += test_bitmap.o
+ifeq ($(CONFIG_CC_IS_CLANG)$(CONFIG_KASAN),yy)
+# FIXME: Clang breaks test_bitmap_const_eval when KASAN and GCOV are enabled
+GCOV_PROFILE_test_bitmap.o := n
+endif
 obj-$(CONFIG_TEST_UUID) += test_uuid.o
 obj-$(CONFIG_TEST_XARRAY) += test_xarray.o
 obj-$(CONFIG_TEST_MAPLE_TREE) += test_maple_tree.o

lib/cpumask.c+4−1

  * alloc_cpumask_var_node - allocate a struct cpumask on a given node
  * @mask: pointer to cpumask_var_t where the cpumask is returned
  * @flags: GFP_ flags
+ * @node: memory node from which to allocate or %NUMA_NO_NODE
  *
  * Only defined when CONFIG_CPUMASK_OFFSTACK=y, otherwise is
  * a nop returning a constant 1 (in <linux/cpumask.h>)
 static DEFINE_PER_CPU(int, distribute_cpu_mask_prev);
 /**
- * cpumask_any_and_distribute - Return an arbitrary cpu within srcp1 & srcp2.
+ * cpumask_any_and_distribute - Return an arbitrary cpu within src1p & src2p.
+ * @src1p: first &cpumask for intersection
+ * @src2p: second &cpumask for intersection
  *
  * Iterated calls using the same srcp1 and srcp2 will be distributed within
  * their intersection.

lib/scatterlist.c+1−1

@@ -1148,7 +1148,7 @@ static ssize_t extract_user_to_sg(struct iov_iter *iter, · 1147 unmodified lines
1148		1148
1149	failed:	1149	failed:
1150	while (sgtable->nents > sgtable->orig_nents)	1150	while (sgtable->nents > sgtable->orig_nents)
1151	put_page(sg_page(&sgtable->sgl[--sgtable->nents]));	1151	unpin_user_page(sg_page(&sgtable->sgl[--sgtable->nents]));
1152	return res;	1152	return res;
1153	}	1153	}
1154		1154

lib/test_bitmap.c+4−4

 	}
 }
+/*
+ * FIXME: Clang breaks compile-time evaluations when KASAN and GCOV are enabled.
+ * To workaround it, GCOV is force-disabled in Makefile for this configuration.
+ */
 static void __init test_bitmap_const_eval(void)
 {
 	DECLARE_BITMAP(bitmap, BITS_PER_LONG);
 	 * the compiler is fixed.
 	 */
 	bitmap_clear(bitmap, 0, BITS_PER_LONG);
-#if defined(__s390__) && defined(__clang__)
-	if (!const_test_bit(7, bitmap))
-#else
 	if (!test_bit(7, bitmap))
-#endif
 		bitmap_set(bitmap, 5, 2);
 	/* Equals to `unsigned long bitopvar = BIT(20)` */

mm/compaction.c+5−3

 		/*
 		 * Check if the pageblock has already been marked skipped.
-		 * Only the aligned PFN is checked as the caller isolates
+		 * Only the first PFN is checked as the caller isolates
 		 * COMPACT_CLUSTER_MAX at a time so the second call must
 		 * not falsely conclude that the block should be skipped.
 		 */
-		if (!valid_page && pageblock_aligned(low_pfn)) {
+		if (!valid_page && (pageblock_aligned(low_pfn) ||
+				    low_pfn == cc->zone->zone_start_pfn)) {
 			if (!isolation_suitable(cc, page)) {
 				low_pfn = end_pfn;
 				folio = NULL;
 		 * before making it "skip" so other compaction instances do
 		 * not scan the same block.
 		 */
-		if (pageblock_aligned(low_pfn) &&
+		if ((pageblock_aligned(low_pfn) ||
+		     low_pfn == cc->zone->zone_start_pfn) &&
 		    !fast_find_block && !isolation_suitable(cc, page))
 			continue;

mm/damon/core.c+1−0

@@ -273,6 +273,7 @@ struct damos_filter *damos_new_filter(enum damos_filter_type type, · 272 unmodified lines
273	return NULL;	273	return NULL;
274	filter->type = type;	274	filter->type = type;
275	filter->matching = matching;	275	filter->matching = matching;
		276	INIT_LIST_HEAD(&filter->list);
276	return filter;	277	return filter;
277	}	278	}
278		279

mm/hugetlb.c+51−24

@@ -1579,9 +1579,37 @@ static inline void destroy_compound_gigantic_folio(struct folio *folio, · 1578 unmodified lines
1579	unsigned int order) { }	1579	unsigned int order) { }
1580	#endif	1580	#endif
1581		1581
		1582	static inline void __clear_hugetlb_destructor(struct hstate *h,
		1583	struct folio *folio)
		1584	{
		1585	lockdep_assert_held(&hugetlb_lock);
		1586
		1587	/*
		1588	* Very subtle
		1589	*
		1590	* For non-gigantic pages set the destructor to the normal compound
		1591	* page dtor. This is needed in case someone takes an additional
		1592	* temporary ref to the page, and freeing is delayed until they drop
		1593	* their reference.
		1594	*
		1595	* For gigantic pages set the destructor to the null dtor. This
		1596	* destructor will never be called. Before freeing the gigantic
		1597	* page destroy_compound_gigantic_folio will turn the folio into a
		1598	* simple group of pages. After this the destructor does not
		1599	* apply.
		1600	*
		1601	*/
		1602	if (hstate_is_gigantic(h))
		1603	folio_set_compound_dtor(folio, NULL_COMPOUND_DTOR);
		1604	else
		1605	folio_set_compound_dtor(folio, COMPOUND_PAGE_DTOR);
		1606	}
		1607
1582	/*	1608	/*
1583	* Remove hugetlb folio from lists, and update dtor so that the folio appears	1609	* Remove hugetlb folio from lists.
1584	* as just a compound page.	1610	* If vmemmap exists for the folio, update dtor so that the folio appears
		1611	* as just a compound page. Otherwise, wait until after allocating vmemmap
		1612	* to update dtor.
1585	*	1613	*
1586	* A reference is held on the folio, except in the case of demote.	1614	* A reference is held on the folio, except in the case of demote.
1587	*	1615	*
@@ -1612,31 +1640,19 @@ static void __remove_hugetlb_folio(struct hstate h, struct folio folio, · 24 unmodified lines
1612	}	1640	}
1613		1641
1614	/*	1642	/*
1615	* Very subtle	1643	* We can only clear the hugetlb destructor after allocating vmemmap
1616	*	1644	* pages. Otherwise, someone (memory error handling) may try to write
1617	* For non-gigantic pages set the destructor to the normal compound	1645	* to tail struct pages.
1618	* page dtor. This is needed in case someone takes an additional	1646	*/
1619	* temporary ref to the page, and freeing is delayed until they drop	1647	if (!folio_test_hugetlb_vmemmap_optimized(folio))
1620	* their reference.	1648	__clear_hugetlb_destructor(h, folio);
1621	*	1649
1622	* For gigantic pages set the destructor to the null dtor. This	1650	/*
1623	* destructor will never be called. Before freeing the gigantic	1651	* In the case of demote we do not ref count the page as it will soon
1624	* page destroy_compound_gigantic_folio will turn the folio into a	1652	* be turned into a page of smaller size.
1625	* simple group of pages. After this the destructor does not
1626	* apply.
1627	*
1628	* This handles the case where more than one ref is held when and
1629	* after update_and_free_hugetlb_folio is called.
1630	*
1631	* In the case of demote we do not ref count the page as it will soon
1632	* be turned into a page of smaller size.
1633	*/	1653	*/
1634	if (!demote)	1654	if (!demote)
1635	folio_ref_unfreeze(folio, 1);	1655	folio_ref_unfreeze(folio, 1);
1636	if (hstate_is_gigantic(h))
1637	folio_set_compound_dtor(folio, NULL_COMPOUND_DTOR);
1638	else
1639	folio_set_compound_dtor(folio, COMPOUND_PAGE_DTOR);
1640		1656
1641	h->nr_huge_pages--;	1657	h->nr_huge_pages--;
1642	h->nr_huge_pages_node[nid]--;	1658	h->nr_huge_pages_node[nid]--;
@@ -1705,6 +1721,7 @@ static void __update_and_free_hugetlb_folio(struct hstate *h, · 62 unmodified lines
1705	{	1721	{
1706	int i;	1722	int i;
1707	struct page *subpage;	1723	struct page *subpage;
		1724	bool clear_dtor = folio_test_hugetlb_vmemmap_optimized(folio);
1708		1725
1709	if (hstate_is_gigantic(h) && !gigantic_page_runtime_supported())	1726	if (hstate_is_gigantic(h) && !gigantic_page_runtime_supported())
1710	return;	1727	return;
@@ -1735,6 +1752,16 @@ static void __update_and_free_hugetlb_folio(struct hstate *h, · 24 unmodified lines
1735	if (unlikely(folio_test_hwpoison(folio)))	1752	if (unlikely(folio_test_hwpoison(folio)))
1736	folio_clear_hugetlb_hwpoison(folio);	1753	folio_clear_hugetlb_hwpoison(folio);
1737		1754
		1755	/*
		1756	* If vmemmap pages were allocated above, then we need to clear the
		1757	* hugetlb destructor under the hugetlb lock.
		1758	*/
		1759	if (clear_dtor) {
		1760	spin_lock_irq(&hugetlb_lock);
		1761	__clear_hugetlb_destructor(h, folio);
		1762	spin_unlock_irq(&hugetlb_lock);
		1763	}
		1764
1738	for (i = 0; i < pages_per_huge_page(h); i++) {	1765	for (i = 0; i < pages_per_huge_page(h); i++) {
1739	subpage = folio_page(folio, i);	1766	subpage = folio_page(folio, i);
1740	subpage->flags &= ~(1 << PG_locked \| 1 << PG_error \|	1767	subpage->flags &= ~(1 << PG_locked \| 1 << PG_error \|

mm/ksm.c+2−0

@@ -2784,6 +2784,8 @@ struct page ksm_might_need_to_copy(struct page page, · 2783 unmodified lines
2784	anon_vma->root == vma->anon_vma->root) {	2784	anon_vma->root == vma->anon_vma->root) {
2785	return page; /* still no need to copy it */	2785	return page; /* still no need to copy it */
2786	}	2786	}
		2787	if (PageHWPoison(page))
		2788	return ERR_PTR(-EHWPOISON);
2787	if (!PageUptodate(page))	2789	if (!PageUptodate(page))
2788	return page; /* let do_swap_page report the error */	2790	return page; /* let do_swap_page report the error */
2789		2791

mm/memory-failure.c+16−13

 {
 	struct folio *folio;
 	struct page *p;
-	int ret = -EBUSY;
+	int ret = -EBUSY, ghp;
 	unsigned long count = 1;
 	bool huge = false;
 	static DEFINE_RATELIMIT_STATE(unpoison_rs, DEFAULT_RATELIMIT_INTERVAL,
 		goto unlock_mutex;
 	}
+	if (folio_test_slab(folio) || PageTable(&folio->page) || folio_test_reserved(folio))
+		goto unlock_mutex;
+	/*
+	 * Note that folio->_mapcount is overloaded in SLAB, so the simple test
+	 * in folio_mapped() has to be done after folio_test_slab() is checked.
+	 */
 	if (folio_mapped(folio)) {
 		unpoison_pr_info("Unpoison: Someone maps the hwpoison page %#lx\n",
 				 pfn, &unpoison_rs);
 		goto unlock_mutex;
 	}
-	if (folio_test_slab(folio) || PageTable(&folio->page) || folio_test_reserved(folio))
+	ghp = get_hwpoison_page(p, MF_UNPOISON);
-		goto unlock_mutex;
+	if (!ghp) {
-	ret = get_hwpoison_page(p, MF_UNPOISON);
-	if (!ret) {
 		if (PageHuge(p)) {
 			huge = true;
 			count = folio_free_raw_hwp(folio, false);
-			if (count == 0) {
+			if (count == 0)
-				ret = -EBUSY;
 				goto unlock_mutex;
-			}
 		}
 		ret = folio_test_clear_hwpoison(folio) ? 0 : -EBUSY;
-	} else if (ret < 0) {
+	} else if (ghp < 0) {
-		if (ret == -EHWPOISON) {
+		if (ghp == -EHWPOISON) {
 			ret = put_page_back_buddy(p) ? 0 : -EBUSY;
-		} else
+		} else {
+			ret = ghp;
 			unpoison_pr_info("Unpoison: failed to grab page %#lx\n",
 					 pfn, &unpoison_rs);
+		}
 	} else {
 		if (PageHuge(p)) {
 			huge = true;
 			count = folio_free_raw_hwp(folio, false);
 			if (count == 0) {
-				ret = -EBUSY;
 				folio_put(folio);
 				goto unlock_mutex;
 			}

mm/memory.c+3−0

@@ -5705,6 +5705,9 @@ int __access_remote_vm(struct mm_struct mm, unsigned long addr, void buf, · 5704 unmodified lines
5705	if (mmap_read_lock_killable(mm))	5705	if (mmap_read_lock_killable(mm))
5706	return 0;	5706	return 0;
5707		5707
		5708	/* Untag the address before looking up the VMA */
		5709	addr = untagged_addr_remote(mm, addr);
		5710
5708	/* Avoid triggering the temporary warning in __get_user_pages */	5711	/* Avoid triggering the temporary warning in __get_user_pages */
5709	if (!vma_lookup(mm, addr) && !expand_stack(mm, addr))	5712	if (!vma_lookup(mm, addr) && !expand_stack(mm, addr))
5710	return 0;	5713	return 0;

mm/swapfile.c+4−4

@@ -1746,7 +1746,7 @@ static int unuse_pte(struct vm_area_struct vma, pmd_t pmd, · 1745 unmodified lines
1746	struct page *swapcache;	1746	struct page *swapcache;
1747	spinlock_t *ptl;	1747	spinlock_t *ptl;
1748	pte_t *pte, new_pte, old_pte;	1748	pte_t *pte, new_pte, old_pte;
1749	bool hwposioned = false;	1749	bool hwpoisoned = PageHWPoison(page);
1750	int ret = 1;	1750	int ret = 1;
1751		1751
1752	swapcache = page;	1752	swapcache = page;
@@ -1754,7 +1754,7 @@ static int unuse_pte(struct vm_area_struct vma, pmd_t pmd, · 1 unmodified line
1754	if (unlikely(!page))	1754	if (unlikely(!page))
1755	return -ENOMEM;	1755	return -ENOMEM;
1756	else if (unlikely(PTR_ERR(page) == -EHWPOISON))	1756	else if (unlikely(PTR_ERR(page) == -EHWPOISON))
1757	hwposioned = true;	1757	hwpoisoned = true;
1758		1758
1759	pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);	1759	pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
1760	if (unlikely(!pte \|\| !pte_same_as_swp(ptep_get(pte),	1760	if (unlikely(!pte \|\| !pte_same_as_swp(ptep_get(pte),
@@ -1765,11 +1765,11 @@ static int unuse_pte(struct vm_area_struct vma, pmd_t pmd, · 4 unmodified lines
1765		1765
1766	old_pte = ptep_get(pte);	1766	old_pte = ptep_get(pte);
1767		1767
1768	if (unlikely(hwposioned \|\| !PageUptodate(page))) {	1768	if (unlikely(hwpoisoned \|\| !PageUptodate(page))) {
1769	swp_entry_t swp_entry;	1769	swp_entry_t swp_entry;
1770		1770
1771	dec_mm_counter(vma->vm_mm, MM_SWAPENTS);	1771	dec_mm_counter(vma->vm_mm, MM_SWAPENTS);
1772	if (hwposioned) {	1772	if (hwpoisoned) {
1773	swp_entry = make_hwpoison_entry(swapcache);	1773	swp_entry = make_hwpoison_entry(swapcache);
1774	page = swapcache;	1774	page = swapcache;
1775	} else {	1775	} else {

mm/zsmalloc.c+9−5

 static bool zs_page_isolate(struct page *page, isolate_mode_t mode)
 {
+	struct zs_pool *pool;
 	struct zspage *zspage;
 	/*
 	VM_BUG_ON_PAGE(PageIsolated(page), page);
 	zspage = get_zspage(page);
-	migrate_write_lock(zspage);
+	pool = zspage->pool;
+	spin_lock(&pool->lock);
 	inc_zspage_isolation(zspage);
-	migrate_write_unlock(zspage);
+	spin_unlock(&pool->lock);
 	return true;
 }
 	kunmap_atomic(s_addr);
 	replace_sub_page(class, zspage, newpage, page);
+	dec_zspage_isolation(zspage);
 	/*
 	 * Since we complete the data copy and set up new zspage structure,
 	 * it's okay to release the pool's lock.
 	 */
 	spin_unlock(&pool->lock);
-	dec_zspage_isolation(zspage);
 	migrate_write_unlock(zspage);
 	get_page(newpage);
 static void zs_page_putback(struct page *page)
 {
+	struct zs_pool *pool;
 	struct zspage *zspage;
 	VM_BUG_ON_PAGE(!PageIsolated(page), page);
 	zspage = get_zspage(page);
-	migrate_write_lock(zspage);
+	pool = zspage->pool;
+	spin_lock(&pool->lock);
 	dec_zspage_isolation(zspage);
-	migrate_write_unlock(zspage);
+	spin_unlock(&pool->lock);
 }
 static const struct movable_operations zsmalloc_mops = {

net/8021q/vlan.c+1−2

@@ -384,8 +384,7 @@ static int vlan_device_event(struct notifier_block *unused, unsigned long event, · 383 unmodified lines
384	dev->name);	384	dev->name);
385	vlan_vid_add(dev, htons(ETH_P_8021Q), 0);	385	vlan_vid_add(dev, htons(ETH_P_8021Q), 0);
386	}	386	}
387	if (event == NETDEV_DOWN &&	387	if (event == NETDEV_DOWN)
388	(dev->features & NETIF_F_HW_VLAN_CTAG_FILTER))
389	vlan_vid_del(dev, htons(ETH_P_8021Q), 0);	388	vlan_vid_del(dev, htons(ETH_P_8021Q), 0);
390		389
391	vlan_info = rtnl_dereference(dev->vlan_info);	390	vlan_info = rtnl_dereference(dev->vlan_info);

net/can/raw.c+1−1

@@ -865,7 +865,7 @@ static int raw_sendmsg(struct socket sock, struct msghdr msg, size_t size) · 864 unmodified lines
865		865
866	skb->dev = dev;	866	skb->dev = dev;
867	skb->priority = sk->sk_priority;	867	skb->priority = sk->sk_priority;
868	skb->mark = sk->sk_mark;	868	skb->mark = READ_ONCE(sk->sk_mark);
869	skb->tstamp = sockc.transmit_time;	869	skb->tstamp = sockc.transmit_time;
870		870
871	skb_setup_tx_timestamp(skb, sockc.tsflags);	871	skb_setup_tx_timestamp(skb, sockc.tsflags);

net/ceph/osd_client.c+14−6

 	int ret;
 	dout("%s lreq %p linger_id %llu\n", __func__, lreq, lreq->linger_id);
-	ret = wait_for_completion_interruptible(&lreq->reg_commit_wait);
+	ret = wait_for_completion_killable(&lreq->reg_commit_wait);
 	return ret ?: lreq->reg_commit_error;
 }
-static int linger_notify_finish_wait(struct ceph_osd_linger_request *lreq)
+static int linger_notify_finish_wait(struct ceph_osd_linger_request *lreq,
+				     unsigned long timeout)
 {
-	int ret;
+	long left;
 	dout("%s lreq %p linger_id %llu\n", __func__, lreq, lreq->linger_id);
-	ret = wait_for_completion_interruptible(&lreq->notify_finish_wait);
+	left = wait_for_completion_killable_timeout(&lreq->notify_finish_wait,
-	return ret ?: lreq->notify_finish_error;
+						ceph_timeout_jiffies(timeout));
+	if (left <= 0)
+		left = left ?: -ETIMEDOUT;
+	else
+		left = lreq->notify_finish_error; /* completed */
+	return left;
 }
 /*
 	linger_submit(lreq);
 	ret = linger_reg_commit_wait(lreq);
 	if (!ret)
-		ret = linger_notify_finish_wait(lreq);
+		ret = linger_notify_finish_wait(lreq,
+				 msecs_to_jiffies(2 * timeout * MSEC_PER_SEC));
 	else
 		dout("lreq %p failed to initiate notify %d\n", lreq, ret);

net/core/bpf_sk_storage.c+4−1

 		return ERR_PTR(-EPERM);
 	nla_for_each_nested(nla, nla_stgs, rem) {
-		if (nla_type(nla) == SK_DIAG_BPF_STORAGE_REQ_MAP_FD)
+		if (nla_type(nla) == SK_DIAG_BPF_STORAGE_REQ_MAP_FD) {
+			if (nla_len(nla) != sizeof(u32))
+				return ERR_PTR(-EINVAL);
 			nr_maps++;
+		}
 	}
 	diag = kzalloc(struct_size(diag, maps, nr_maps), GFP_KERNEL);

net/core/filter.c+0−6

 	if (unlikely(data_end > data_hard_end))
 		return -EINVAL;
-	/* ALL drivers MUST init xdp->frame_sz, chicken check below */
-	if (unlikely(xdp->frame_sz > PAGE_SIZE)) {
-		WARN_ONCE(1, "Too BIG xdp->frame_sz = %d\n", xdp->frame_sz);
-		return -EINVAL;
-	}
 	if (unlikely(data_end < xdp->data + ETH_HLEN))
 		return -EINVAL;

net/core/rtnetlink.c+6−2

 	br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
 	if (br_spec) {
 		nla_for_each_nested(attr, br_spec, rem) {
-			if (nla_type(attr) == IFLA_BRIDGE_FLAGS) {
+			if (nla_type(attr) == IFLA_BRIDGE_FLAGS && !have_flags) {
 				if (nla_len(attr) < sizeof(flags))
 					return -EINVAL;
 				have_flags = true;
 				flags = nla_get_u16(attr);
-				break;
+			}
+			if (nla_type(attr) == IFLA_BRIDGE_MODE) {
+				if (nla_len(attr) < sizeof(u16))
+					return -EINVAL;
 			}
 		}
 	}

net/core/skmsg.c+8−2

 int sk_psock_init_strp(struct sock *sk, struct sk_psock *psock)
 {
+	int ret;
 	static const struct strp_callbacks cb = {
 		.rcv_msg	= sk_psock_strp_read,
 		.read_sock_done	= sk_psock_strp_read_done,
 		.parse_msg	= sk_psock_strp_parse,
 	};
-	return strp_init(&psock->strp, sk, &cb);
+	ret = strp_init(&psock->strp, sk, &cb);
+	if (!ret)
+		sk_psock_set_state(psock, SK_PSOCK_RX_STRP_ENABLED);
+	return ret;
 }
 void sk_psock_start_strp(struct sock *sk, struct sk_psock *psock)
 static void sk_psock_done_strp(struct sk_psock *psock)
 {
 	/* Parser has been stopped */
-	if (psock->progs.stream_parser)
+	if (sk_psock_test_state(psock, SK_PSOCK_RX_STRP_ENABLED))
 		strp_done(&psock->strp);
 }
 #else

net/core/sock.c+41−30

 {
 	struct __kernel_sock_timeval tv;
 	int err = sock_copy_user_timeval(&tv, optval, optlen, old_timeval);
+	long val;
 	if (err)
 		return err;
 	if (tv.tv_sec < 0) {
 		static int warned __read_mostly;
-		*timeo_p = 0;
+		WRITE_ONCE(*timeo_p, 0);
 		if (warned < 10 && net_ratelimit()) {
 			warned++;
 			pr_info("%s: `%s' (pid %d) tries to set negative timeout\n",
 		}
 		return 0;
 	}
-	*timeo_p = MAX_SCHEDULE_TIMEOUT;
+	val = MAX_SCHEDULE_TIMEOUT;
-	if (tv.tv_sec == 0 && tv.tv_usec == 0)
+	if ((tv.tv_sec || tv.tv_usec) &&
-		return 0;
+	    (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT / HZ - 1)))
-	if (tv.tv_sec < (MAX_SCHEDULE_TIMEOUT / HZ - 1))
+		val = tv.tv_sec * HZ + DIV_ROUND_UP((unsigned long)tv.tv_usec,
-		*timeo_p = tv.tv_sec * HZ + DIV_ROUND_UP((unsigned long)tv.tv_usec, USEC_PER_SEC / HZ);
+						    USEC_PER_SEC / HZ);
+	WRITE_ONCE(*timeo_p, val);
 	return 0;
 }
 void sock_set_priority(struct sock *sk, u32 priority)
 {
 	lock_sock(sk);
-	sk->sk_priority = priority;
+	WRITE_ONCE(sk->sk_priority, priority);
 	release_sock(sk);
 }
 EXPORT_SYMBOL(sock_set_priority);
 {
 	lock_sock(sk);
 	if (secs && secs < MAX_SCHEDULE_TIMEOUT / HZ - 1)
-		sk->sk_sndtimeo = secs * HZ;
+		WRITE_ONCE(sk->sk_sndtimeo, secs * HZ);
 	else
-		sk->sk_sndtimeo = MAX_SCHEDULE_TIMEOUT;
+		WRITE_ONCE(sk->sk_sndtimeo, MAX_SCHEDULE_TIMEOUT);
 	release_sock(sk);
 }
 EXPORT_SYMBOL(sock_set_sndtimeo);
 static void __sock_set_mark(struct sock *sk, u32 val)
 {
 	if (val != sk->sk_mark) {
-		sk->sk_mark = val;
+		WRITE_ONCE(sk->sk_mark, val);
 		sk_dst_reset(sk);
 	}
 }
 	bytes = round_down(bytes, PAGE_SIZE);
 	WARN_ON(bytes > sk->sk_reserved_mem);
-	sk->sk_reserved_mem -= bytes;
+	WRITE_ONCE(sk->sk_reserved_mem, sk->sk_reserved_mem - bytes);
 	sk_mem_reclaim(sk);
 }
 	}
 	sk->sk_forward_alloc += pages << PAGE_SHIFT;
-	sk->sk_reserved_mem += pages << PAGE_SHIFT;
+	WRITE_ONCE(sk->sk_reserved_mem,
+		   sk->sk_reserved_mem + (pages << PAGE_SHIFT));
 	return 0;
 }
 		if ((val >= 0 && val <= 6) ||
 		    sockopt_ns_capable(sock_net(sk)->user_ns, CAP_NET_RAW) ||
 		    sockopt_ns_capable(sock_net(sk)->user_ns, CAP_NET_ADMIN))
-			sk->sk_priority = val;
+			WRITE_ONCE(sk->sk_priority, val);
 		else
 			ret = -EPERM;
 		break;
 			cmpxchg(&sk->sk_pacing_status,
 				SK_PACING_NONE,
 				SK_PACING_NEEDED);
-		sk->sk_max_pacing_rate = ulval;
+		/* Pairs with READ_ONCE() from sk_getsockopt() */
+		WRITE_ONCE(sk->sk_max_pacing_rate, ulval);
 		sk->sk_pacing_rate = min(sk->sk_pacing_rate, ulval);
 		break;
 		}
 		}
 		if ((u8)val == SOCK_TXREHASH_DEFAULT)
 			val = READ_ONCE(sock_net(sk)->core.sysctl_txrehash);
-		/* Paired with READ_ONCE() in tcp_rtx_synack() */
+		/* Paired with READ_ONCE() in tcp_rtx_synack()
+		 * and sk_getsockopt().
+		 */
 		WRITE_ONCE(sk->sk_txrehash, (u8)val);
 		break;
 		break;
 	case SO_SNDBUF:
-		v.val = sk->sk_sndbuf;
+		v.val = READ_ONCE(sk->sk_sndbuf);
 		break;
 	case SO_RCVBUF:
-		v.val = sk->sk_rcvbuf;
+		v.val = READ_ONCE(sk->sk_rcvbuf);
 		break;
 	case SO_REUSEADDR:
 		break;
 	case SO_PRIORITY:
-		v.val = sk->sk_priority;
+		v.val = READ_ONCE(sk->sk_priority);
 		break;
 	case SO_LINGER:
 	case SO_RCVTIMEO_OLD:
 	case SO_RCVTIMEO_NEW:
-		lv = sock_get_timeout(sk->sk_rcvtimeo, &v, SO_RCVTIMEO_OLD == optname);
+		lv = sock_get_timeout(READ_ONCE(sk->sk_rcvtimeo), &v,
+				      SO_RCVTIMEO_OLD == optname);
 		break;
 	case SO_SNDTIMEO_OLD:
 	case SO_SNDTIMEO_NEW:
-		lv = sock_get_timeout(sk->sk_sndtimeo, &v, SO_SNDTIMEO_OLD == optname);
+		lv = sock_get_timeout(READ_ONCE(sk->sk_sndtimeo), &v,
+				      SO_SNDTIMEO_OLD == optname);
 		break;
 	case SO_RCVLOWAT:
-		v.val = sk->sk_rcvlowat;
+		v.val = READ_ONCE(sk->sk_rcvlowat);
 		break;
 	case SO_SNDLOWAT:
 		spin_unlock(&sk->sk_peer_lock);
 		if (!peer_pid)
-			return -ESRCH;
+			return -ENODATA;
 		pidfd = pidfd_prepare(peer_pid, 0, &pidfd_file);
 		put_pid(peer_pid);
 							 optval, optlen, len);
 	case SO_MARK:
-		v.val = sk->sk_mark;
+		v.val = READ_ONCE(sk->sk_mark);
 		break;
 	case SO_RCVMARK:
 		if (!sock->ops->set_peek_off)
 			return -EOPNOTSUPP;
-		v.val = sk->sk_peek_off;
+		v.val = READ_ONCE(sk->sk_peek_off);
 		break;
 	case SO_NOFCS:
 		v.val = sock_flag(sk, SOCK_NOFCS);
 #ifdef CONFIG_NET_RX_BUSY_POLL
 	case SO_BUSY_POLL:
-		v.val = sk->sk_ll_usec;
+		v.val = READ_ONCE(sk->sk_ll_usec);
 		break;
 	case SO_PREFER_BUSY_POLL:
 		v.val = READ_ONCE(sk->sk_prefer_busy_poll);
 #endif
 	case SO_MAX_PACING_RATE:
+		/* The READ_ONCE() pair with the WRITE_ONCE() in sk_setsockopt() */
 		if (sizeof(v.ulval) != sizeof(v.val) && len >= sizeof(v.ulval)) {
 			lv = sizeof(v.ulval);
-			v.ulval = sk->sk_max_pacing_rate;
+			v.ulval = READ_ONCE(sk->sk_max_pacing_rate);
 		} else {
 			/* 32bit version */
-			v.val = min_t(unsigned long, sk->sk_max_pacing_rate, ~0U);
+			v.val = min_t(unsigned long, ~0U,
+				      READ_ONCE(sk->sk_max_pacing_rate));
 		}
 		break;
 		break;
 	case SO_RESERVE_MEM:
-		v.val = sk->sk_reserved_mem;
+		v.val = READ_ONCE(sk->sk_reserved_mem);
 		break;
 	case SO_TXREHASH:
-		v.val = sk->sk_txrehash;
+		/* Paired with WRITE_ONCE() in sk_setsockopt() */
+		v.val = READ_ONCE(sk->sk_txrehash);
 		break;
 	default:
 int sk_set_peek_off(struct sock *sk, int val)
 {
-	sk->sk_peek_off = val;
+	WRITE_ONCE(sk->sk_peek_off, val);
 	return 0;
 }
 EXPORT_SYMBOL_GPL(sk_set_peek_off);

net/core/sock_map.c+5−7

@@ -115,7 +115,6 @@ static void sock_map_sk_acquire(struct sock *sk) · 114 unmodified lines
115	__acquires(&sk->sk_lock.slock)	115	__acquires(&sk->sk_lock.slock)
116	{	116	{
117	lock_sock(sk);	117	lock_sock(sk);
118	preempt_disable();
119	rcu_read_lock();	118	rcu_read_lock();
120	}	119	}
121		120
@@ -123,7 +122,6 @@ static void sock_map_sk_release(struct sock *sk) · 1 unmodified line
123	__releases(&sk->sk_lock.slock)	122	__releases(&sk->sk_lock.slock)
124	{	123	{
125	rcu_read_unlock();	124	rcu_read_unlock();
126	preempt_enable();
127	release_sock(sk);	125	release_sock(sk);
128	}	126	}
129		127
@@ -148,13 +146,13 @@ static void sock_map_del_link(struct sock *sk, · 18 unmodified lines
148	list_for_each_entry_safe(link, tmp, &psock->link, list) {	146	list_for_each_entry_safe(link, tmp, &psock->link, list) {
149	if (link->link_raw == link_raw) {	147	if (link->link_raw == link_raw) {
150	struct bpf_map *map = link->map;	148	struct bpf_map *map = link->map;
151	struct bpf_stab *stab = container_of(map, struct bpf_stab,	149	struct sk_psock_progs *progs = sock_map_progs(map);
152	map);	150
153	if (psock->saved_data_ready && stab->progs.stream_parser)	151	if (psock->saved_data_ready && progs->stream_parser)
154	strp_stop = true;	152	strp_stop = true;
155	if (psock->saved_data_ready && stab->progs.stream_verdict)	153	if (psock->saved_data_ready && progs->stream_verdict)
156	verdict_stop = true;	154	verdict_stop = true;
157	if (psock->saved_data_ready && stab->progs.skb_verdict)	155	if (psock->saved_data_ready && progs->skb_verdict)
158	verdict_stop = true;	156	verdict_stop = true;
159	list_del(&link->list);	157	list_del(&link->list);
160	sk_psock_free_link(link);	158	sk_psock_free_link(link);

net/dcb/dcbnl.c+1−1

@@ -980,7 +980,7 @@ static int dcbnl_bcn_setcfg(struct net_device netdev, struct nlmsghdr nlh, · 979 unmodified lines
980	return -EOPNOTSUPP;	980	return -EOPNOTSUPP;
981		981
982	ret = nla_parse_nested_deprecated(data, DCB_BCN_ATTR_MAX,	982	ret = nla_parse_nested_deprecated(data, DCB_BCN_ATTR_MAX,
983	tb[DCB_ATTR_BCN], dcbnl_pfc_up_nest,	983	tb[DCB_ATTR_BCN], dcbnl_bcn_nest,
984	NULL);	984	NULL);
985	if (ret)	985	if (ret)
986	return ret;	986	return ret;

net/dccp/ipv6.c+2−2

@@ -238,8 +238,8 @@ static int dccp_v6_send_response(const struct sock sk, struct request_sock req · 237 unmodified lines
238	opt = ireq->ipv6_opt;	238	opt = ireq->ipv6_opt;
239	if (!opt)	239	if (!opt)
240	opt = rcu_dereference(np->opt);	240	opt = rcu_dereference(np->opt);
241	err = ip6_xmit(sk, skb, &fl6, sk->sk_mark, opt, np->tclass,	241	err = ip6_xmit(sk, skb, &fl6, READ_ONCE(sk->sk_mark), opt,
242	sk->sk_priority);	242	np->tclass, sk->sk_priority);
243	rcu_read_unlock();	243	rcu_read_unlock();
244	err = net_xmit_eval(err);	244	err = net_xmit_eval(err);
245	}	245	}

net/dccp/output.c+1−1

@@ -187,7 +187,7 @@ unsigned int dccp_sync_mss(struct sock *sk, u32 pmtu) · 186 unmodified lines
187		187
188	/* And store cached results */	188	/* And store cached results */
189	icsk->icsk_pmtu_cookie = pmtu;	189	icsk->icsk_pmtu_cookie = pmtu;
190	dp->dccps_mss_cache = cur_mps;	190	WRITE_ONCE(dp->dccps_mss_cache, cur_mps);
191		191
192	return cur_mps;	192	return cur_mps;
193	}	193	}

net/dccp/proto.c+8−2

 		return dccp_getsockopt_service(sk, len,
 					       (__be32 __user *)optval, optlen);
 	case DCCP_SOCKOPT_GET_CUR_MPS:
-		val = dp->dccps_mss_cache;
+		val = READ_ONCE(dp->dccps_mss_cache);
 		break;
 	case DCCP_SOCKOPT_AVAILABLE_CCIDS:
 		return ccid_getsockopt_builtin_ccids(sk, len, optval, optlen);
 	trace_dccp_probe(sk, len);
-	if (len > dp->dccps_mss_cache)
+	if (len > READ_ONCE(dp->dccps_mss_cache))
 		return -EMSGSIZE;
 	lock_sock(sk);
 		goto out_discard;
 	}
+	/* We need to check dccps_mss_cache after socket is locked. */
+	if (len > dp->dccps_mss_cache) {
+		rc = -EMSGSIZE;
+		goto out_discard;
+	}
 	skb_reserve(skb, sk->sk_prot->max_header);
 	rc = memcpy_from_msg(skb_put(skb, len), msg, len);
 	if (rc != 0)

net/dsa/port.c+8−1

 	    ds->ops->phylink_mac_an_restart)
 		dp->pl_config.legacy_pre_march2020 = true;
-	if (ds->ops->phylink_get_caps)
+	if (ds->ops->phylink_get_caps) {
 		ds->ops->phylink_get_caps(ds, dp->index, &dp->pl_config);
+	} else {
+		/* For legacy drivers */
+		__set_bit(PHY_INTERFACE_MODE_INTERNAL,
+			  dp->pl_config.supported_interfaces);
+		__set_bit(PHY_INTERFACE_MODE_GMII,
+			  dp->pl_config.supported_interfaces);
+	}
 	pl = phylink_create(&dp->pl_config, of_fwnode_handle(dp->dn),
 			    mode, &dsa_port_phylink_mac_ops);

net/ipv4/inet_diag.c+2−2

@@ -150,7 +150,7 @@ int inet_diag_msg_attrs_fill(struct sock sk, struct sk_buff skb, · 149 unmodified lines
150	}	150	}
151	#endif	151	#endif
152		152
153	if (net_admin && nla_put_u32(skb, INET_DIAG_MARK, sk->sk_mark))	153	if (net_admin && nla_put_u32(skb, INET_DIAG_MARK, READ_ONCE(sk->sk_mark)))
154	goto errout;	154	goto errout;
155		155
156	if (ext & (1 << (INET_DIAG_CLASS_ID - 1)) \|\|	156	if (ext & (1 << (INET_DIAG_CLASS_ID - 1)) \|\|
@@ -799,7 +799,7 @@ int inet_diag_bc_sk(const struct nlattr bc, struct sock sk) · 642 unmodified lines
799	entry.ifindex = sk->sk_bound_dev_if;	799	entry.ifindex = sk->sk_bound_dev_if;
800	entry.userlocks = sk_fullsock(sk) ? sk->sk_userlocks : 0;	800	entry.userlocks = sk_fullsock(sk) ? sk->sk_userlocks : 0;
801	if (sk_fullsock(sk))	801	if (sk_fullsock(sk))
802	entry.mark = sk->sk_mark;	802	entry.mark = READ_ONCE(sk->sk_mark);
803	else if (sk->sk_state == TCP_NEW_SYN_RECV)	803	else if (sk->sk_state == TCP_NEW_SYN_RECV)
804	entry.mark = inet_rsk(inet_reqsk(sk))->ir_mark;	804	entry.mark = inet_rsk(inet_reqsk(sk))->ir_mark;
805	else if (sk->sk_state == TCP_TIME_WAIT)	805	else if (sk->sk_state == TCP_TIME_WAIT)

net/ipv4/ip_output.c+13−4

 		ip_options_build(skb, &opt->opt, daddr, rt);
 	}
-	skb->priority = sk->sk_priority;
+	skb->priority = READ_ONCE(sk->sk_priority);
 	if (!skb->mark)
-		skb->mark = sk->sk_mark;
+		skb->mark = READ_ONCE(sk->sk_mark);
 	/* Send it out. */
 	return ip_local_out(net, skb->sk, skb);
 			     skb_shinfo(skb)->gso_segs ?: 1);
 	/* TODO : should we use skb->sk here instead of sk ? */
-	skb->priority = sk->sk_priority;
+	skb->priority = READ_ONCE(sk->sk_priority);
-	skb->mark = sk->sk_mark;
+	skb->mark = READ_ONCE(sk->sk_mark);
 	res = ip_local_out(net, sk, skb);
 	rcu_read_unlock();
 			}
 			copy = datalen - transhdrlen - fraggap - pagedlen;
+			/* [!] NOTE: copy will be negative if pagedlen>0
+			 * because then the equation reduces to -fraggap.
+			 */
 			if (copy > 0 && getfrag(from, data + transhdrlen, offset, copy, fraggap, skb) < 0) {
 				err = -EFAULT;
 				kfree_skb(skb);
 				goto error;
+			} else if (flags & MSG_SPLICE_PAGES) {
+				copy = 0;
 			}
 			offset += copy;
 		} else if (flags & MSG_SPLICE_PAGES) {
 			struct msghdr *msg = from;
+			err = -EIO;
+			if (WARN_ON_ONCE(copy > msg->msg_iter.count))
+				goto error;
 			err = skb_splice_from_iter(skb, &msg->msg_iter, copy,
 						   sk->sk_allocation);
 			if (err < 0)

net/ipv4/ip_sockglue.c+1−1

@@ -592,7 +592,7 @@ void __ip_sock_set_tos(struct sock *sk, int val) · 591 unmodified lines
592	}	592	}
593	if (inet_sk(sk)->tos != val) {	593	if (inet_sk(sk)->tos != val) {
594	inet_sk(sk)->tos = val;	594	inet_sk(sk)->tos = val;
595	sk->sk_priority = rt_tos2priority(val);	595	WRITE_ONCE(sk->sk_priority, rt_tos2priority(val));
596	sk_dst_reset(sk);	596	sk_dst_reset(sk);
597	}	597	}
598	}	598	}

net/ipv4/ip_tunnel_core.c+1−1

@@ -224,7 +224,7 @@ static int iptunnel_pmtud_build_icmp(struct sk_buff *skb, int mtu) · 223 unmodified lines
224	.un.frag.__unused = 0,	224	.un.frag.__unused = 0,
225	.un.frag.mtu = htons(mtu),	225	.un.frag.mtu = htons(mtu),
226	};	226	};
227	icmph->checksum = ip_compute_csum(icmph, len);	227	icmph->checksum = csum_fold(skb_checksum(skb, 0, len, 0));
228	skb_reset_transport_header(skb);	228	skb_reset_transport_header(skb);
229		229
230	niph = skb_push(skb, sizeof(*niph));	230	niph = skb_push(skb, sizeof(*niph));

net/ipv4/nexthop.c+7−21

 				     &rtm_dump_nexthop_cb, &filter);
 	if (err < 0) {
 		if (likely(skb->len))
-			goto out;
+			err = skb->len;
-		goto out_err;
 	}
-out:
-	err = skb->len;
-out_err:
 	cb->seq = net->nexthop.seq;
 	nl_dump_check_consistent(cb, nlmsg_hdr(skb));
 	return err;
 		    dd->filter.res_bucket_nh_id != nhge->nh->id)
 			continue;
+		dd->ctx->bucket_index = bucket_index;
 		err = nh_fill_res_bucket(skb, nh, bucket, bucket_index,
 					 RTM_NEWNEXTHOPBUCKET, portid,
 					 cb->nlh->nlmsg_seq, NLM_F_MULTI,
 					 cb->extack);
-		if (err < 0) {
+		if (err)
-			if (likely(skb->len))
+			return err;
-				goto out;
-			goto out_err;
-		}
 	}
 	dd->ctx->done_nh_idx = dd->ctx->nh.idx + 1;
-	bucket_index = 0;
+	dd->ctx->bucket_index = 0;
-out:
+	return 0;
-	err = skb->len;
-out_err:
-	dd->ctx->bucket_index = bucket_index;
-	return err;
 }
 static int rtm_dump_nexthop_bucket_cb(struct sk_buff *skb,
 	if (err < 0) {
 		if (likely(skb->len))
-			goto out;
+			err = skb->len;
-		goto out_err;
 	}
-out:
-	err = skb->len;
-out_err:
 	cb->seq = net->nexthop.seq;
 	nl_dump_check_consistent(cb, nlmsg_hdr(skb));
 	return err;

net/ipv4/raw.c+1−1

@@ -348,7 +348,7 @@ static int raw_send_hdrinc(struct sock sk, struct flowi4 fl4, · 347 unmodified lines
348	goto error;	348	goto error;
349	skb_reserve(skb, hlen);	349	skb_reserve(skb, hlen);
350		350
351	skb->priority = sk->sk_priority;	351	skb->priority = READ_ONCE(sk->sk_priority);
352	skb->mark = sockc->mark;	352	skb->mark = sockc->mark;
353	skb->tstamp = sockc->transmit_time;	353	skb->tstamp = sockc->transmit_time;
354	skb_dst_set(skb, &rt->dst);	354	skb_dst_set(skb, &rt->dst);

net/ipv4/route.c+2−2

@@ -518,7 +518,7 @@ static void __build_flow_key(const struct net net, struct flowi4 fl4, · 517 unmodified lines
518	const struct inet_sock *inet = inet_sk(sk);	518	const struct inet_sock *inet = inet_sk(sk);
519		519
520	oif = sk->sk_bound_dev_if;	520	oif = sk->sk_bound_dev_if;
521	mark = sk->sk_mark;	521	mark = READ_ONCE(sk->sk_mark);
522	tos = ip_sock_rt_tos(sk);	522	tos = ip_sock_rt_tos(sk);
523	scope = ip_sock_rt_scope(sk);	523	scope = ip_sock_rt_scope(sk);
524	prot = inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol;	524	prot = inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol;
@@ -552,7 +552,7 @@ static void build_sk_flow_key(struct flowi4 fl4, const struct sock sk) · 27 unmodified lines
552	inet_opt = rcu_dereference(inet->inet_opt);	552	inet_opt = rcu_dereference(inet->inet_opt);
553	if (inet_opt && inet_opt->opt.srr)	553	if (inet_opt && inet_opt->opt.srr)
554	daddr = inet_opt->opt.faddr;	554	daddr = inet_opt->opt.faddr;
555	flowi4_init_output(fl4, sk->sk_bound_dev_if, sk->sk_mark,	555	flowi4_init_output(fl4, sk->sk_bound_dev_if, READ_ONCE(sk->sk_mark),
556	ip_sock_rt_tos(sk) & IPTOS_RT_MASK,	556	ip_sock_rt_tos(sk) & IPTOS_RT_MASK,
557	ip_sock_rt_scope(sk),	557	ip_sock_rt_scope(sk),
558	inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol,	558	inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol,

net/ipv4/tcp_ipv4.c+2−2

@@ -931,9 +931,9 @@ static void tcp_v4_send_ack(const struct sock *sk, · 930 unmodified lines
931	ctl_sk = this_cpu_read(ipv4_tcp_sk);	931	ctl_sk = this_cpu_read(ipv4_tcp_sk);
932	sock_net_set(ctl_sk, net);	932	sock_net_set(ctl_sk, net);
933	ctl_sk->sk_mark = (sk->sk_state == TCP_TIME_WAIT) ?	933	ctl_sk->sk_mark = (sk->sk_state == TCP_TIME_WAIT) ?
934	inet_twsk(sk)->tw_mark : sk->sk_mark;	934	inet_twsk(sk)->tw_mark : READ_ONCE(sk->sk_mark);
935	ctl_sk->sk_priority = (sk->sk_state == TCP_TIME_WAIT) ?	935	ctl_sk->sk_priority = (sk->sk_state == TCP_TIME_WAIT) ?
936	inet_twsk(sk)->tw_priority : sk->sk_priority;	936	inet_twsk(sk)->tw_priority : READ_ONCE(sk->sk_priority);
937	transmit_time = tcp_transmit_time(sk);	937	transmit_time = tcp_transmit_time(sk);
938	ip_send_unicast_reply(ctl_sk,	938	ip_send_unicast_reply(ctl_sk,
939	skb, &TCP_SKB_CB(skb)->header.h4.opt,	939	skb, &TCP_SKB_CB(skb)->header.h4.opt,

net/ipv4/tcp_metrics.c+44−26

 struct tcp_metrics_block {
 	struct tcp_metrics_block __rcu	*tcpm_next;
-	possible_net_t			tcpm_net;
+	struct net			*tcpm_net;
 	struct inetpeer_addr		tcpm_saddr;
 	struct inetpeer_addr		tcpm_daddr;
 	unsigned long			tcpm_stamp;
 	struct rcu_head			rcu_head;
 };
-static inline struct net *tm_net(struct tcp_metrics_block *tm)
+static inline struct net *tm_net(const struct tcp_metrics_block *tm)
 {
-	return read_pnet(&tm->tcpm_net);
+	/* Paired with the WRITE_ONCE() in tcpm_new() */
+	return READ_ONCE(tm->tcpm_net);
 }
 static bool tcp_metric_locked(struct tcp_metrics_block *tm,
 			      enum tcp_metric_index idx)
 {
-	return tm->tcpm_lock & (1 << idx);
+	/* Paired with WRITE_ONCE() in tcpm_suck_dst() */
+	return READ_ONCE(tm->tcpm_lock) & (1 << idx);
 }
-static u32 tcp_metric_get(struct tcp_metrics_block *tm,
+static u32 tcp_metric_get(const struct tcp_metrics_block *tm,
 			  enum tcp_metric_index idx)
 {
-	return tm->tcpm_vals[idx];
+	/* Paired with WRITE_ONCE() in tcp_metric_set() */
+	return READ_ONCE(tm->tcpm_vals[idx]);
 }
 static void tcp_metric_set(struct tcp_metrics_block *tm,
 			   enum tcp_metric_index idx,
 			   u32 val)
 {
-	tm->tcpm_vals[idx] = val;
+	/* Paired with READ_ONCE() in tcp_metric_get() */
+	WRITE_ONCE(tm->tcpm_vals[idx], val);
 }
 static bool addr_same(const struct inetpeer_addr *a,
 		      const struct inetpeer_addr *b)
 {
-	return inetpeer_addr_cmp(a, b) == 0;
+	return (a->family == b->family) && !inetpeer_addr_cmp(a, b);
 }
 struct tcpm_hash_bucket {
 static unsigned int		tcp_metrics_hash_log __read_mostly;
 static DEFINE_SPINLOCK(tcp_metrics_lock);
+static DEFINE_SEQLOCK(fastopen_seqlock);
 static void tcpm_suck_dst(struct tcp_metrics_block *tm,
 			  const struct dst_entry *dst,
 	u32 msval;
 	u32 val;
-	tm->tcpm_stamp = jiffies;
+	WRITE_ONCE(tm->tcpm_stamp, jiffies);
 	val = 0;
 	if (dst_metric_locked(dst, RTAX_RTT))
 		val |= 1 << TCP_METRIC_CWND;
 	if (dst_metric_locked(dst, RTAX_REORDERING))
 		val |= 1 << TCP_METRIC_REORDERING;
-	tm->tcpm_lock = val;
+	/* Paired with READ_ONCE() in tcp_metric_locked() */
+	WRITE_ONCE(tm->tcpm_lock, val);
 	msval = dst_metric_raw(dst, RTAX_RTT);
-	tm->tcpm_vals[TCP_METRIC_RTT] = msval * USEC_PER_MSEC;
+	tcp_metric_set(tm, TCP_METRIC_RTT, msval * USEC_PER_MSEC);
 	msval = dst_metric_raw(dst, RTAX_RTTVAR);
-	tm->tcpm_vals[TCP_METRIC_RTTVAR] = msval * USEC_PER_MSEC;
+	tcp_metric_set(tm, TCP_METRIC_RTTVAR, msval * USEC_PER_MSEC);
-	tm->tcpm_vals[TCP_METRIC_SSTHRESH] = dst_metric_raw(dst, RTAX_SSTHRESH);
+	tcp_metric_set(tm, TCP_METRIC_SSTHRESH,
-	tm->tcpm_vals[TCP_METRIC_CWND] = dst_metric_raw(dst, RTAX_CWND);
+		       dst_metric_raw(dst, RTAX_SSTHRESH));
-	tm->tcpm_vals[TCP_METRIC_REORDERING] = dst_metric_raw(dst, RTAX_REORDERING);
+	tcp_metric_set(tm, TCP_METRIC_CWND,
+		       dst_metric_raw(dst, RTAX_CWND));
+	tcp_metric_set(tm, TCP_METRIC_REORDERING,
+		       dst_metric_raw(dst, RTAX_REORDERING));
 	if (fastopen_clear) {
+		write_seqlock(&fastopen_seqlock);
 		tm->tcpm_fastopen.mss = 0;
 		tm->tcpm_fastopen.syn_loss = 0;
 		tm->tcpm_fastopen.try_exp = 0;
 		tm->tcpm_fastopen.cookie.exp = false;
 		tm->tcpm_fastopen.cookie.len = 0;
+		write_sequnlock(&fastopen_seqlock);
 	}
 }
 #define TCP_METRICS_TIMEOUT		(60 * 60 * HZ)
-static void tcpm_check_stamp(struct tcp_metrics_block *tm, struct dst_entry *dst)
+static void tcpm_check_stamp(struct tcp_metrics_block *tm,
+			     const struct dst_entry *dst)
 {
-	if (tm && unlikely(time_after(jiffies, tm->tcpm_stamp + TCP_METRICS_TIMEOUT)))
+	unsigned long limit;
+	if (!tm)
+		return;
+	limit = READ_ONCE(tm->tcpm_stamp) + TCP_METRICS_TIMEOUT;
+	if (unlikely(time_after(jiffies, limit)))
 		tcpm_suck_dst(tm, dst, false);
 }
 		oldest = deref_locked(tcp_metrics_hash[hash].chain);
 		for (tm = deref_locked(oldest->tcpm_next); tm;
 		     tm = deref_locked(tm->tcpm_next)) {
-			if (time_before(tm->tcpm_stamp, oldest->tcpm_stamp))
+			if (time_before(READ_ONCE(tm->tcpm_stamp),
+					READ_ONCE(oldest->tcpm_stamp)))
 				oldest = tm;
 		}
 		tm = oldest;
 	} else {
-		tm = kmalloc(sizeof(*tm), GFP_ATOMIC);
+		tm = kzalloc(sizeof(*tm), GFP_ATOMIC);
 		if (!tm)
 			goto out_unlock;
 	}
-	write_pnet(&tm->tcpm_net, net);
+	/* Paired with the READ_ONCE() in tm_net() */
+	WRITE_ONCE(tm->tcpm_net, net);
 	tm->tcpm_saddr = *saddr;
 	tm->tcpm_daddr = *daddr;
-	tcpm_suck_dst(tm, dst, true);
+	tcpm_suck_dst(tm, dst, reclaim);
 	if (likely(!reclaim)) {
 		tm->tcpm_next = tcp_metrics_hash[hash].chain;
 					       tp->reordering);
 		}
 	}
-	tm->tcpm_stamp = jiffies;
+	WRITE_ONCE(tm->tcpm_stamp, jiffies);
 out_unlock:
 	rcu_read_unlock();
 }
 	return ret;
 }
-static DEFINE_SEQLOCK(fastopen_seqlock);
 void tcp_fastopen_cache_get(struct sock *sk, u16 *mss,
 			    struct tcp_fastopen_cookie *cookie)
 {
 	}
 	if (nla_put_msecs(msg, TCP_METRICS_ATTR_AGE,
-			  jiffies - tm->tcpm_stamp,
+			  jiffies - READ_ONCE(tm->tcpm_stamp),
 			  TCP_METRICS_ATTR_PAD) < 0)
 		goto nla_put_failure;
 		if (!nest)
 			goto nla_put_failure;
 		for (i = 0; i < TCP_METRIC_MAX_KERNEL + 1; i++) {
-			u32 val = tm->tcpm_vals[i];
+			u32 val = tcp_metric_get(tm, i);
 			if (!val)
 				continue;

net/ipv4/udp.c+6−2

 #include <net/sock_reuseport.h>
 #include <net/addrconf.h>
 #include <net/udp_tunnel.h>
+#include <net/gro.h>
 #if IS_ENABLED(CONFIG_IPV6)
 #include <net/ipv6_stubs.h>
 #endif
 {
 	const struct iphdr *iph = ip_hdr(skb);
 	struct net *net = dev_net(skb->dev);
+	int iif, sdif;
+	inet_get_iif_sdif(skb, &iif, &sdif);
 	return __udp4_lib_lookup(net, iph->saddr, sport,
-				 iph->daddr, dport, inet_iif(skb),
+				 iph->daddr, dport, iif,
-				 inet_sdif(skb), net->ipv4.udp_table, NULL);
+				 sdif, net->ipv4.udp_table, NULL);
 }
 /* Must be called under rcu_read_lock().

net/ipv4/udp_offload.c+5−2

 {
 	const struct iphdr *iph = skb_gro_network_header(skb);
 	struct net *net = dev_net(skb->dev);
+	int iif, sdif;
+	inet_get_iif_sdif(skb, &iif, &sdif);
 	return __udp4_lib_lookup(net, iph->saddr, sport,
-				 iph->daddr, dport, inet_iif(skb),
+				 iph->daddr, dport, iif,
-				 inet_sdif(skb), net->ipv4.udp_table, NULL);
+				 sdif, net->ipv4.udp_table, NULL);
 }
 INDIRECT_CALLABLE_SCOPE

net/ipv6/ip6mr.c+1−1

@@ -1073,7 +1073,7 @@ static int ip6mr_cache_report(const struct mr_table mrt, struct sk_buff pkt, · 1072 unmodified lines
1073	And all this only to mangle msg->im6_msgtype and	1073	And all this only to mangle msg->im6_msgtype and
1074	to set msg->im6_mbz to "mbz" :-)	1074	to set msg->im6_mbz to "mbz" :-)
1075	*/	1075	*/
1076	skb_push(skb, -skb_network_offset(pkt));	1076	__skb_pull(skb, skb_network_offset(pkt));
1077		1077
1078	skb_push(skb, sizeof(*msg));	1078	skb_push(skb, sizeof(*msg));
1079	skb_reset_transport_header(skb);	1079	skb_reset_transport_header(skb);

net/ipv6/ndisc.c+2−1

 static inline int ndisc_is_useropt(const struct net_device *dev,
 				   struct nd_opt_hdr *opt)
 {
-	return opt->nd_opt_type == ND_OPT_RDNSS ||
+	return opt->nd_opt_type == ND_OPT_PREFIX_INFO ||
+		opt->nd_opt_type == ND_OPT_RDNSS ||
 		opt->nd_opt_type == ND_OPT_DNSSL ||
 		opt->nd_opt_type == ND_OPT_CAPTIVE_PORTAL ||
 		opt->nd_opt_type == ND_OPT_PREF64 ||

net/ipv6/ping.c+1−1

@@ -120,7 +120,7 @@ static int ping_v6_sendmsg(struct sock sk, struct msghdr msg, size_t len) · 119 unmodified lines
120		120
121	ipcm6_init_sk(&ipc6, np);	121	ipcm6_init_sk(&ipc6, np);
122	ipc6.sockc.tsflags = sk->sk_tsflags;	122	ipc6.sockc.tsflags = sk->sk_tsflags;
123	ipc6.sockc.mark = sk->sk_mark;	123	ipc6.sockc.mark = READ_ONCE(sk->sk_mark);
124		124
125	fl6.flowi6_oif = oif;	125	fl6.flowi6_oif = oif;
126		126

net/ipv6/raw.c+3−3

@@ -614,7 +614,7 @@ static int rawv6_send_hdrinc(struct sock sk, struct msghdr msg, int length, · 613 unmodified lines
614	skb_reserve(skb, hlen);	614	skb_reserve(skb, hlen);
615		615
616	skb->protocol = htons(ETH_P_IPV6);	616	skb->protocol = htons(ETH_P_IPV6);
617	skb->priority = sk->sk_priority;	617	skb->priority = READ_ONCE(sk->sk_priority);
618	skb->mark = sockc->mark;	618	skb->mark = sockc->mark;
619	skb->tstamp = sockc->transmit_time;	619	skb->tstamp = sockc->transmit_time;
620		620
@@ -774,12 +774,12 @@ static int rawv6_sendmsg(struct sock sk, struct msghdr msg, size_t len) · 153 unmodified lines
774	*/	774	*/
775	memset(&fl6, 0, sizeof(fl6));	775	memset(&fl6, 0, sizeof(fl6));
776		776
777	fl6.flowi6_mark = sk->sk_mark;	777	fl6.flowi6_mark = READ_ONCE(sk->sk_mark);
778	fl6.flowi6_uid = sk->sk_uid;	778	fl6.flowi6_uid = sk->sk_uid;
779		779
780	ipcm6_init(&ipc6);	780	ipcm6_init(&ipc6);
781	ipc6.sockc.tsflags = sk->sk_tsflags;	781	ipc6.sockc.tsflags = sk->sk_tsflags;
782	ipc6.sockc.mark = sk->sk_mark;	782	ipc6.sockc.mark = fl6.flowi6_mark;
783		783
784	if (sin6) {	784	if (sin6) {
785	if (addr_len < SIN6_LEN_RFC2133)	785	if (addr_len < SIN6_LEN_RFC2133)

net/ipv6/route.c+4−3

 	if (!oif && skb->dev)
 		oif = l3mdev_master_ifindex(skb->dev);
-	ip6_update_pmtu(skb, sock_net(sk), mtu, oif, sk->sk_mark, sk->sk_uid);
+	ip6_update_pmtu(skb, sock_net(sk), mtu, oif, READ_ONCE(sk->sk_mark),
+			sk->sk_uid);
 	dst = __sk_dst_get(sk);
 	if (!dst || !dst->obsolete ||
 void ip6_sk_redirect(struct sk_buff *skb, struct sock *sk)
 {
-	ip6_redirect(skb, sock_net(sk), sk->sk_bound_dev_if, sk->sk_mark,
+	ip6_redirect(skb, sock_net(sk), sk->sk_bound_dev_if,
-		     sk->sk_uid);
+		     READ_ONCE(sk->sk_mark), sk->sk_uid);
 }
 EXPORT_SYMBOL_GPL(ip6_sk_redirect);

net/ipv6/tcp_ipv6.c+5−4

 		opt = ireq->ipv6_opt;
 		if (!opt)
 			opt = rcu_dereference(np->opt);
-		err = ip6_xmit(sk, skb, fl6, skb->mark ? : sk->sk_mark, opt,
+		err = ip6_xmit(sk, skb, fl6, skb->mark ? : READ_ONCE(sk->sk_mark),
-			       tclass, sk->sk_priority);
+			       opt, tclass, sk->sk_priority);
 		rcu_read_unlock();
 		err = net_xmit_eval(err);
 	}
 		if (sk->sk_state == TCP_TIME_WAIT)
 			mark = inet_twsk(sk)->tw_mark;
 		else
-			mark = sk->sk_mark;
+			mark = READ_ONCE(sk->sk_mark);
 		skb_set_delivery_time(buff, tcp_transmit_time(sk), true);
 	}
 	if (txhash) {
 			tcp_time_stamp_raw() + tcp_rsk(req)->ts_off,
 			READ_ONCE(req->ts_recent), sk->sk_bound_dev_if,
 			tcp_v6_md5_do_lookup(sk, &ipv6_hdr(skb)->saddr, l3index),
-			ipv6_get_dsfield(ipv6_hdr(skb)), 0, sk->sk_priority,
+			ipv6_get_dsfield(ipv6_hdr(skb)), 0,
+			READ_ONCE(sk->sk_priority),
 			READ_ONCE(tcp_rsk(req)->txhash));
 }

net/ipv6/udp.c+8−4

 #include <net/inet6_hashtables.h>
 #include <net/busy_poll.h>
 #include <net/sock_reuseport.h>
+#include <net/gro.h>
 #include <linux/proc_fs.h>
 #include <linux/seq_file.h>
 {
 	const struct ipv6hdr *iph = ipv6_hdr(skb);
 	struct net *net = dev_net(skb->dev);
+	int iif, sdif;
+	inet6_get_iif_sdif(skb, &iif, &sdif);
 	return __udp6_lib_lookup(net, &iph->saddr, sport,
-				 &iph->daddr, dport, inet6_iif(skb),
+				 &iph->daddr, dport, iif,
-				 inet6_sdif(skb), net->ipv4.udp_table, NULL);
+				 sdif, net->ipv4.udp_table, NULL);
 }
 /* Must be called under rcu_read_lock().
 	if (type == NDISC_REDIRECT) {
 		if (tunnel) {
 			ip6_redirect(skb, sock_net(sk), inet6_iif(skb),
-				     sk->sk_mark, sk->sk_uid);
+				     READ_ONCE(sk->sk_mark), sk->sk_uid);
 		} else {
 			ip6_sk_redirect(skb, sk);
 		}
 	ipcm6_init(&ipc6);
 	ipc6.gso_size = READ_ONCE(up->gso_size);
 	ipc6.sockc.tsflags = sk->sk_tsflags;
-	ipc6.sockc.mark = sk->sk_mark;
+	ipc6.sockc.mark = READ_ONCE(sk->sk_mark);
 	/* destination address check */
 	if (sin6) {

net/ipv6/udp_offload.c+5−2

 {
 	const struct ipv6hdr *iph = skb_gro_network_header(skb);
 	struct net *net = dev_net(skb->dev);
+	int iif, sdif;
+	inet6_get_iif_sdif(skb, &iif, &sdif);
 	return __udp6_lib_lookup(net, &iph->saddr, sport,
-				 &iph->daddr, dport, inet6_iif(skb),
+				 &iph->daddr, dport, iif,
-				 inet6_sdif(skb), net->ipv4.udp_table, NULL);
+				 sdif, net->ipv4.udp_table, NULL);
 }
 INDIRECT_CALLABLE_SCOPE

net/l2tp/l2tp_ip6.c+1−1

@@ -519,7 +519,7 @@ static int l2tp_ip6_sendmsg(struct sock sk, struct msghdr msg, size_t len) · 518 unmodified lines
519	/* Get and verify the address */	519	/* Get and verify the address */
520	memset(&fl6, 0, sizeof(fl6));	520	memset(&fl6, 0, sizeof(fl6));
521		521
522	fl6.flowi6_mark = sk->sk_mark;	522	fl6.flowi6_mark = READ_ONCE(sk->sk_mark);
523	fl6.flowi6_uid = sk->sk_uid;	523	fl6.flowi6_uid = sk->sk_uid;
524		524
525	ipcm6_init(&ipc6);	525	ipcm6_init(&ipc6);

net/mptcp/protocol.c+2−2

@@ -2335,7 +2335,7 @@ static void __mptcp_close_ssk(struct sock sk, struct sock ssk, · 2334 unmodified lines
2335		2335
2336	lock_sock_nested(ssk, SINGLE_DEPTH_NESTING);	2336	lock_sock_nested(ssk, SINGLE_DEPTH_NESTING);
2337		2337
2338	if (flags & MPTCP_CF_FASTCLOSE) {	2338	if ((flags & MPTCP_CF_FASTCLOSE) && !__mptcp_check_fallback(msk)) {
2339	/* be sure to force the tcp_disconnect() path,	2339	/* be sure to force the tcp_disconnect() path,
2340	* to generate the egress reset	2340	* to generate the egress reset
2341	*/	2341	*/
@@ -3328,7 +3328,7 @@ static void mptcp_release_cb(struct sock *sk) · 986 unmodified lines
3328		3328
3329	if (__test_and_clear_bit(MPTCP_CLEAN_UNA, &msk->cb_flags))	3329	if (__test_and_clear_bit(MPTCP_CLEAN_UNA, &msk->cb_flags))
3330	__mptcp_clean_una_wakeup(sk);	3330	__mptcp_clean_una_wakeup(sk);
3331	if (unlikely(&msk->cb_flags)) {	3331	if (unlikely(msk->cb_flags)) {
3332	/* be sure to set the current sk state before tacking actions	3332	/* be sure to set the current sk state before tacking actions
3333	* depending on sk_state, that is processing MPTCP_ERROR_REPORT	3333	* depending on sk_state, that is processing MPTCP_ERROR_REPORT
3334	*/	3334	*/

net/mptcp/protocol.h+0−1

@@ -325,7 +325,6 @@ struct mptcp_sock { · 324 unmodified lines
325	u32 subflow_id;	325	u32 subflow_id;
326	u32 setsockopt_seq;	326	u32 setsockopt_seq;
327	char ca_name[TCP_CA_NAME_MAX];	327	char ca_name[TCP_CA_NAME_MAX];
328	struct mptcp_sock *dl_next;
329	};	328	};
330		329
331	#define mptcp_data_lock(sk) spin_lock_bh(&(sk)->sk_lock.slock)	330	#define mptcp_data_lock(sk) spin_lock_bh(&(sk)->sk_lock.slock)

net/mptcp/sockopt.c+1−1

@@ -103,7 +103,7 @@ static void mptcp_sol_socket_sync_intval(struct mptcp_sock *msk, int optname, in · 102 unmodified lines
103	break;	103	break;
104	case SO_MARK:	104	case SO_MARK:
105	if (READ_ONCE(ssk->sk_mark) != sk->sk_mark) {	105	if (READ_ONCE(ssk->sk_mark) != sk->sk_mark) {
106	ssk->sk_mark = sk->sk_mark;	106	WRITE_ONCE(ssk->sk_mark, sk->sk_mark);
107	sk_dst_reset(ssk);	107	sk_dst_reset(ssk);
108	}	108	}
109	break;	109	break;

net/mptcp/subflow.c+29−29

 void mptcp_subflow_queue_clean(struct sock *listener_sk, struct sock *listener_ssk)
 {
 	struct request_sock_queue *queue = &inet_csk(listener_ssk)->icsk_accept_queue;
-	struct mptcp_sock *msk, *next, *head = NULL;
+	struct request_sock *req, *head, *tail;
-	struct request_sock *req;
+	struct mptcp_subflow_context *subflow;
-	struct sock *sk;
+	struct sock *sk, *ssk;
-	/* build a list of all unaccepted mptcp sockets */
+	/* Due to lock dependencies no relevant lock can be acquired under rskq_lock.
+	 * Splice the req list, so that accept() can not reach the pending ssk after
+	 * the listener socket is released below.
+	 */
 	spin_lock_bh(&queue->rskq_lock);
-	for (req = queue->rskq_accept_head; req; req = req->dl_next) {
+	head = queue->rskq_accept_head;
-		struct mptcp_subflow_context *subflow;
+	tail = queue->rskq_accept_tail;
-		struct sock *ssk = req->sk;
+	queue->rskq_accept_head = NULL;
+	queue->rskq_accept_tail = NULL;
+	spin_unlock_bh(&queue->rskq_lock);
+	if (!head)
+		return;
+	/* can't acquire the msk socket lock under the subflow one,
+	 * or will cause ABBA deadlock
+	 */
+	release_sock(listener_ssk);
+	for (req = head; req; req = req->dl_next) {
+		ssk = req->sk;
 		if (!sk_is_mptcp(ssk))
 			continue;
 		if (!subflow || !subflow->conn)
 			continue;
-		/* skip if already in list */
 		sk = subflow->conn;
-		msk = mptcp_sk(sk);
-		if (msk->dl_next || msk == head)
-			continue;
 		sock_hold(sk);
-		msk->dl_next = head;
-		head = msk;
-	}
-	spin_unlock_bh(&queue->rskq_lock);
-	if (!head)
-		return;
-	/* can't acquire the msk socket lock under the subflow one,
-	 * or will cause ABBA deadlock
-	 */
-	release_sock(listener_ssk);
-	for (msk = head; msk; msk = next) {
-		sk = (struct sock *)msk;
 		lock_sock_nested(sk, SINGLE_DEPTH_NESTING);
-		next = msk->dl_next;
-		msk->dl_next = NULL;
 		__mptcp_unaccepted_force_close(sk);
 		release_sock(sk);
 	/* we are still under the listener msk socket lock */
 	lock_sock_nested(listener_ssk, SINGLE_DEPTH_NESTING);
+	/* restore the listener queue, to let the TCP code clean it up */
+	spin_lock_bh(&queue->rskq_lock);
+	WARN_ON_ONCE(queue->rskq_accept_head);
+	queue->rskq_accept_head = head;
+	queue->rskq_accept_tail = tail;
+	spin_unlock_bh(&queue->rskq_lock);
 }
 static int subflow_ulp_init(struct sock *sk)

net/netfilter/nf_tables_api.c+244−63

@@ -31,7 +31,9 @@ static LIST_HEAD(nf_tables_expressions); · 30 unmodified lines
31	static LIST_HEAD(nf_tables_objects);	31	static LIST_HEAD(nf_tables_objects);
32	static LIST_HEAD(nf_tables_flowtables);	32	static LIST_HEAD(nf_tables_flowtables);
33	static LIST_HEAD(nf_tables_destroy_list);	33	static LIST_HEAD(nf_tables_destroy_list);
		34	static LIST_HEAD(nf_tables_gc_list);
34	static DEFINE_SPINLOCK(nf_tables_destroy_list_lock);	35	static DEFINE_SPINLOCK(nf_tables_destroy_list_lock);
		36	static DEFINE_SPINLOCK(nf_tables_gc_list_lock);
35		37
36	enum {	38	enum {
37	NFT_VALIDATE_SKIP = 0,	39	NFT_VALIDATE_SKIP = 0,
@@ -120,6 +122,9 @@ static void nft_validate_state_update(struct nft_table *table, u8 new_validate_s · 82 unmodified lines
120	static void nf_tables_trans_destroy_work(struct work_struct *w);	122	static void nf_tables_trans_destroy_work(struct work_struct *w);
121	static DECLARE_WORK(trans_destroy_work, nf_tables_trans_destroy_work);	123	static DECLARE_WORK(trans_destroy_work, nf_tables_trans_destroy_work);
122		124
		125	static void nft_trans_gc_work(struct work_struct *work);
		126	static DECLARE_WORK(trans_gc_work, nft_trans_gc_work);
		127
123	static void nft_ctx_init(struct nft_ctx *ctx,	128	static void nft_ctx_init(struct nft_ctx *ctx,
124	struct net *net,	129	struct net *net,
125	const struct sk_buff *skb,	130	const struct sk_buff *skb,
@@ -582,10 +587,6 @@ static int nft_trans_set_add(const struct nft_ctx *ctx, int msg_type, · 456 unmodified lines
582	return __nft_trans_set_add(ctx, msg_type, set, NULL);	587	return __nft_trans_set_add(ctx, msg_type, set, NULL);
583	}	588	}
584		589
585	static void nft_setelem_data_deactivate(const struct net *net,
586	const struct nft_set *set,
587	struct nft_set_elem *elem);
588
589	static int nft_mapelem_deactivate(const struct nft_ctx *ctx,	590	static int nft_mapelem_deactivate(const struct nft_ctx *ctx,
590	struct nft_set *set,	591	struct nft_set *set,
591	const struct nft_set_iter *iter,	592	const struct nft_set_iter *iter,
@@ -5055,6 +5056,7 @@ static int nf_tables_newset(struct sk_buff skb, const struct nfnl_info info, · 4463 unmodified lines
5055		5056
5056	INIT_LIST_HEAD(&set->bindings);	5057	INIT_LIST_HEAD(&set->bindings);
5057	INIT_LIST_HEAD(&set->catchall_list);	5058	INIT_LIST_HEAD(&set->catchall_list);
		5059	refcount_set(&set->refs, 1);
5058	set->table = table;	5060	set->table = table;
5059	write_pnet(&set->net, net);	5061	write_pnet(&set->net, net);
5060	set->ops = ops;	5062	set->ops = ops;
@@ -5122,6 +5124,14 @@ static void nft_set_catchall_destroy(const struct nft_ctx *ctx, · 61 unmodified lines
5122	}	5124	}
5123	}	5125	}
5124		5126
		5127	static void nft_set_put(struct nft_set *set)
		5128	{
		5129	if (refcount_dec_and_test(&set->refs)) {
		5130	kfree(set->name);
		5131	kvfree(set);
		5132	}
		5133	}
		5134
5125	static void nft_set_destroy(const struct nft_ctx ctx, struct nft_set set)	5135	static void nft_set_destroy(const struct nft_ctx ctx, struct nft_set set)
5126	{	5136	{
5127	int i;	5137	int i;
@@ -5134,8 +5144,7 @@ static void nft_set_destroy(const struct nft_ctx ctx, struct nft_set set) · 6 unmodified lines
5134		5144
5135	set->ops->destroy(ctx, set);	5145	set->ops->destroy(ctx, set);
5136	nft_set_catchall_destroy(ctx, set);	5146	nft_set_catchall_destroy(ctx, set);
5137	kfree(set->name);	5147	nft_set_put(set);
5138	kvfree(set);
5139	}	5148	}
5140		5149
5141	static int nf_tables_delset(struct sk_buff skb, const struct nfnl_info info,	5150	static int nf_tables_delset(struct sk_buff skb, const struct nfnl_info info,
@@ -5602,8 +5611,12 @@ static int nf_tables_dump_setelem(const struct nft_ctx *ctx, · 460 unmodified lines
5602	const struct nft_set_iter *iter,	5611	const struct nft_set_iter *iter,
5603	struct nft_set_elem *elem)	5612	struct nft_set_elem *elem)
5604	{	5613	{
		5614	const struct nft_set_ext *ext = nft_set_elem_ext(set, elem->priv);
5605	struct nft_set_dump_args *args;	5615	struct nft_set_dump_args *args;
5606		5616
		5617	if (nft_set_elem_expired(ext))
		5618	return 0;
		5619
5607	args = container_of(iter, struct nft_set_dump_args, iter);	5620	args = container_of(iter, struct nft_set_dump_args, iter);
5608	return nf_tables_fill_setelem(args->skb, set, elem, args->reset);	5621	return nf_tables_fill_setelem(args->skb, set, elem, args->reset);
5609	}	5622	}
@@ -6274,7 +6287,8 @@ struct nft_set_ext nft_set_catchall_lookup(const struct net net, · 664 unmodified lines
6274	list_for_each_entry_rcu(catchall, &set->catchall_list, list) {	6287	list_for_each_entry_rcu(catchall, &set->catchall_list, list) {
6275	ext = nft_set_elem_ext(set, catchall->elem);	6288	ext = nft_set_elem_ext(set, catchall->elem);
6276	if (nft_set_elem_active(ext, genmask) &&	6289	if (nft_set_elem_active(ext, genmask) &&
6277	!nft_set_elem_expired(ext))	6290	!nft_set_elem_expired(ext) &&
		6291	!nft_set_elem_is_dead(ext))
6278	return ext;	6292	return ext;
6279	}	6293	}
6280		6294
@@ -6282,29 +6296,6 @@ struct nft_set_ext nft_set_catchall_lookup(const struct net net, · 1 unmodified line
6282	}	6296	}
6283	EXPORT_SYMBOL_GPL(nft_set_catchall_lookup);	6297	EXPORT_SYMBOL_GPL(nft_set_catchall_lookup);
6284		6298
6285	void nft_set_catchall_gc(const struct nft_set set)
6286	{
6287	struct nft_set_elem_catchall catchall, next;
6288	struct nft_set_ext *ext;
6289	void *elem = NULL;
6290
6291	list_for_each_entry_safe(catchall, next, &set->catchall_list, list) {
6292	ext = nft_set_elem_ext(set, catchall->elem);
6293
6294	if (!nft_set_elem_expired(ext) \|\|
6295	nft_set_elem_mark_busy(ext))
6296	continue;
6297
6298	elem = catchall->elem;
6299	list_del_rcu(&catchall->list);
6300	kfree_rcu(catchall, rcu);
6301	break;
6302	}
6303
6304	return elem;
6305	}
6306	EXPORT_SYMBOL_GPL(nft_set_catchall_gc);
6307
6308	static int nft_setelem_catchall_insert(const struct net *net,	6299	static int nft_setelem_catchall_insert(const struct net *net,
6309	struct nft_set *set,	6300	struct nft_set *set,
6310	const struct nft_set_elem *elem,	6301	const struct nft_set_elem *elem,
@@ -6366,7 +6357,6 @@ static void nft_setelem_activate(struct net net, struct nft_set set, · 55 unmodified lines
6366		6357
6367	if (nft_setelem_is_catchall(set, elem)) {	6358	if (nft_setelem_is_catchall(set, elem)) {
6368	nft_set_elem_change_active(net, set, ext);	6359	nft_set_elem_change_active(net, set, ext);
6369	nft_set_elem_clear_busy(ext);
6370	} else {	6360	} else {
6371	set->ops->activate(net, set, elem);	6361	set->ops->activate(net, set, elem);
6372	}	6362	}
@@ -6381,8 +6371,7 @@ static int nft_setelem_catchall_deactivate(const struct net *net, · 8 unmodified lines
6381		6371
6382	list_for_each_entry(catchall, &set->catchall_list, list) {	6372	list_for_each_entry(catchall, &set->catchall_list, list) {
6383	ext = nft_set_elem_ext(set, catchall->elem);	6373	ext = nft_set_elem_ext(set, catchall->elem);
6384	if (!nft_is_active(net, ext) \|\|	6374	if (!nft_is_active(net, ext))
6385	nft_set_elem_mark_busy(ext))
6386	continue;	6375	continue;
6387		6376
6388	kfree(elem->priv);	6377	kfree(elem->priv);
@@ -6777,7 +6766,7 @@ static int nft_add_set_elem(struct nft_ctx ctx, struct nft_set set, · 388 unmodified lines
6777	goto err_elem_free;	6766	goto err_elem_free;
6778	}	6767	}
6779		6768
6780	ext->genmask = nft_genmask_cur(ctx->net) \| NFT_SET_ELEM_BUSY_MASK;	6769	ext->genmask = nft_genmask_cur(ctx->net);
6781		6770
6782	err = nft_setelem_insert(ctx->net, set, &elem, &ext2, flags);	6771	err = nft_setelem_insert(ctx->net, set, &elem, &ext2, flags);
6783	if (err) {	6772	if (err) {
@@ -6929,9 +6918,9 @@ static void nft_setelem_data_activate(const struct net *net, · 145 unmodified lines
6929	nft_use_inc_restore(&(*nft_set_ext_obj(ext))->use);	6918	nft_use_inc_restore(&(*nft_set_ext_obj(ext))->use);
6930	}	6919	}
6931		6920
6932	static void nft_setelem_data_deactivate(const struct net *net,	6921	void nft_setelem_data_deactivate(const struct net *net,
6933	const struct nft_set *set,	6922	const struct nft_set *set,
6934	struct nft_set_elem *elem)	6923	struct nft_set_elem *elem)
6935	{	6924	{
6936	const struct nft_set_ext *ext = nft_set_elem_ext(set, elem->priv);	6925	const struct nft_set_ext *ext = nft_set_elem_ext(set, elem->priv);
6937		6926
@@ -7095,8 +7084,7 @@ static int nft_set_catchall_flush(const struct nft_ctx *ctx, · 157 unmodified lines
7095		7084
7096	list_for_each_entry_rcu(catchall, &set->catchall_list, list) {	7085	list_for_each_entry_rcu(catchall, &set->catchall_list, list) {
7097	ext = nft_set_elem_ext(set, catchall->elem);	7086	ext = nft_set_elem_ext(set, catchall->elem);
7098	if (!nft_set_elem_active(ext, genmask) \|\|	7087	if (!nft_set_elem_active(ext, genmask))
7099	nft_set_elem_mark_busy(ext))
7100	continue;	7088	continue;
7101		7089
7102	elem.priv = catchall->elem;	7090	elem.priv = catchall->elem;
@@ -7170,29 +7158,6 @@ static int nf_tables_delsetelem(struct sk_buff *skb, · 67 unmodified lines
7170	return err;	7158	return err;
7171	}	7159	}
7172		7160
7173	void nft_set_gc_batch_release(struct rcu_head *rcu)
7174	{
7175	struct nft_set_gc_batch *gcb;
7176	unsigned int i;
7177
7178	gcb = container_of(rcu, struct nft_set_gc_batch, head.rcu);
7179	for (i = 0; i < gcb->head.cnt; i++)
7180	nft_set_elem_destroy(gcb->head.set, gcb->elems[i], true);
7181	kfree(gcb);
7182	}
7183
7184	struct nft_set_gc_batch nft_set_gc_batch_alloc(const struct nft_set set,
7185	gfp_t gfp)
7186	{
7187	struct nft_set_gc_batch *gcb;
7188
7189	gcb = kzalloc(sizeof(*gcb), gfp);
7190	if (gcb == NULL)
7191	return gcb;
7192	gcb->head.set = set;
7193	return gcb;
7194	}
7195
7196	/*	7161	/*
7197	* Stateful objects	7162	* Stateful objects
7198	*/	7163	*/
@@ -9414,6 +9379,207 @@ void nft_chain_del(struct nft_chain *chain) · 2215 unmodified lines
9414	list_del_rcu(&chain->list);	9379	list_del_rcu(&chain->list);
9415	}	9380	}
9416		9381
		9382	static void nft_trans_gc_setelem_remove(struct nft_ctx *ctx,
		9383	struct nft_trans_gc *trans)
		9384	{
		9385	void **priv = trans->priv;
		9386	unsigned int i;
		9387
		9388	for (i = 0; i < trans->count; i++) {
		9389	struct nft_set_elem elem = {
		9390	.priv = priv[i],
		9391	};
		9392
		9393	nft_setelem_data_deactivate(ctx->net, trans->set, &elem);
		9394	nft_setelem_remove(ctx->net, trans->set, &elem);
		9395	}
		9396	}
		9397
		9398	void nft_trans_gc_destroy(struct nft_trans_gc *trans)
		9399	{
		9400	nft_set_put(trans->set);
		9401	put_net(trans->net);
		9402	kfree(trans);
		9403	}
		9404
		9405	static void nft_trans_gc_trans_free(struct rcu_head *rcu)
		9406	{
		9407	struct nft_set_elem elem = {};
		9408	struct nft_trans_gc *trans;
		9409	struct nft_ctx ctx = {};
		9410	unsigned int i;
		9411
		9412	trans = container_of(rcu, struct nft_trans_gc, rcu);
		9413	ctx.net = read_pnet(&trans->set->net);
		9414
		9415	for (i = 0; i < trans->count; i++) {
		9416	elem.priv = trans->priv[i];
		9417	if (!nft_setelem_is_catchall(trans->set, &elem))
		9418	atomic_dec(&trans->set->nelems);
		9419
		9420	nf_tables_set_elem_destroy(&ctx, trans->set, elem.priv);
		9421	}
		9422
		9423	nft_trans_gc_destroy(trans);
		9424	}
		9425
		9426	static bool nft_trans_gc_work_done(struct nft_trans_gc *trans)
		9427	{
		9428	struct nftables_pernet *nft_net;
		9429	struct nft_ctx ctx = {};
		9430
		9431	nft_net = nft_pernet(trans->net);
		9432
		9433	mutex_lock(&nft_net->commit_mutex);
		9434
		9435	/* Check for race with transaction, otherwise this batch refers to
		9436	* stale objects that might not be there anymore. Skip transaction if
		9437	* set has been destroyed from control plane transaction in case gc
		9438	* worker loses race.
		9439	*/
		9440	if (READ_ONCE(nft_net->gc_seq) != trans->seq \|\| trans->set->dead) {
		9441	mutex_unlock(&nft_net->commit_mutex);
		9442	return false;
		9443	}
		9444
		9445	ctx.net = trans->net;
		9446	ctx.table = trans->set->table;
		9447
		9448	nft_trans_gc_setelem_remove(&ctx, trans);
		9449	mutex_unlock(&nft_net->commit_mutex);
		9450
		9451	return true;
		9452	}
		9453
		9454	static void nft_trans_gc_work(struct work_struct *work)
		9455	{
		9456	struct nft_trans_gc trans, next;
		9457	LIST_HEAD(trans_gc_list);
		9458
		9459	spin_lock(&nf_tables_destroy_list_lock);
		9460	list_splice_init(&nf_tables_gc_list, &trans_gc_list);
		9461	spin_unlock(&nf_tables_destroy_list_lock);
		9462
		9463	list_for_each_entry_safe(trans, next, &trans_gc_list, list) {
		9464	list_del(&trans->list);
		9465	if (!nft_trans_gc_work_done(trans)) {
		9466	nft_trans_gc_destroy(trans);
		9467	continue;
		9468	}
		9469	call_rcu(&trans->rcu, nft_trans_gc_trans_free);
		9470	}
		9471	}
		9472
		9473	struct nft_trans_gc nft_trans_gc_alloc(struct nft_set set,
		9474	unsigned int gc_seq, gfp_t gfp)
		9475	{
		9476	struct net *net = read_pnet(&set->net);
		9477	struct nft_trans_gc *trans;
		9478
		9479	trans = kzalloc(sizeof(*trans), gfp);
		9480	if (!trans)
		9481	return NULL;
		9482
		9483	refcount_inc(&set->refs);
		9484	trans->set = set;
		9485	trans->net = get_net(net);
		9486	trans->seq = gc_seq;
		9487
		9488	return trans;
		9489	}
		9490
		9491	void nft_trans_gc_elem_add(struct nft_trans_gc trans, void priv)
		9492	{
		9493	trans->priv[trans->count++] = priv;
		9494	}
		9495
		9496	static void nft_trans_gc_queue_work(struct nft_trans_gc *trans)
		9497	{
		9498	spin_lock(&nf_tables_gc_list_lock);
		9499	list_add_tail(&trans->list, &nf_tables_gc_list);
		9500	spin_unlock(&nf_tables_gc_list_lock);
		9501
		9502	schedule_work(&trans_gc_work);
		9503	}
		9504
		9505	static int nft_trans_gc_space(struct nft_trans_gc *trans)
		9506	{
		9507	return NFT_TRANS_GC_BATCHCOUNT - trans->count;
		9508	}
		9509
		9510	struct nft_trans_gc nft_trans_gc_queue_async(struct nft_trans_gc gc,
		9511	unsigned int gc_seq, gfp_t gfp)
		9512	{
		9513	if (nft_trans_gc_space(gc))
		9514	return gc;
		9515
		9516	nft_trans_gc_queue_work(gc);
		9517
		9518	return nft_trans_gc_alloc(gc->set, gc_seq, gfp);
		9519	}
		9520
		9521	void nft_trans_gc_queue_async_done(struct nft_trans_gc *trans)
		9522	{
		9523	if (trans->count == 0) {
		9524	nft_trans_gc_destroy(trans);
		9525	return;
		9526	}
		9527
		9528	nft_trans_gc_queue_work(trans);
		9529	}
		9530
		9531	struct nft_trans_gc nft_trans_gc_queue_sync(struct nft_trans_gc gc, gfp_t gfp)
		9532	{
		9533	if (WARN_ON_ONCE(!lockdep_commit_lock_is_held(gc->net)))
		9534	return NULL;
		9535
		9536	if (nft_trans_gc_space(gc))
		9537	return gc;
		9538
		9539	call_rcu(&gc->rcu, nft_trans_gc_trans_free);
		9540
		9541	return nft_trans_gc_alloc(gc->set, 0, gfp);
		9542	}
		9543
		9544	void nft_trans_gc_queue_sync_done(struct nft_trans_gc *trans)
		9545	{
		9546	WARN_ON_ONCE(!lockdep_commit_lock_is_held(trans->net));
		9547
		9548	if (trans->count == 0) {
		9549	nft_trans_gc_destroy(trans);
		9550	return;
		9551	}
		9552
		9553	call_rcu(&trans->rcu, nft_trans_gc_trans_free);
		9554	}
		9555
		9556	struct nft_trans_gc nft_trans_gc_catchall(struct nft_trans_gc gc,
		9557	unsigned int gc_seq)
		9558	{
		9559	struct nft_set_elem_catchall *catchall;
		9560	const struct nft_set *set = gc->set;
		9561	struct nft_set_ext *ext;
		9562
		9563	list_for_each_entry_rcu(catchall, &set->catchall_list, list) {
		9564	ext = nft_set_elem_ext(set, catchall->elem);
		9565
		9566	if (!nft_set_elem_expired(ext))
		9567	continue;
		9568	if (nft_set_elem_is_dead(ext))
		9569	goto dead_elem;
		9570
		9571	nft_set_elem_dead(ext);
		9572	dead_elem:
		9573	gc = nft_trans_gc_queue_async(gc, gc_seq, GFP_ATOMIC);
		9574	if (!gc)
		9575	return NULL;
		9576
		9577	nft_trans_gc_elem_add(gc, catchall->elem);
		9578	}
		9579
		9580	return gc;
		9581	}
		9582
9417	static void nf_tables_module_autoload_cleanup(struct net *net)	9583	static void nf_tables_module_autoload_cleanup(struct net *net)
9418	{	9584	{
9419	struct nftables_pernet *nft_net = nft_pernet(net);	9585	struct nftables_pernet *nft_net = nft_pernet(net);
@@ -9576,11 +9742,11 @@ static int nf_tables_commit(struct net net, struct sk_buff skb) · 156 unmodified lines
9576	{	9742	{
9577	struct nftables_pernet *nft_net = nft_pernet(net);	9743	struct nftables_pernet *nft_net = nft_pernet(net);
9578	struct nft_trans trans, next;	9744	struct nft_trans trans, next;
		9745	unsigned int base_seq, gc_seq;
9579	LIST_HEAD(set_update_list);	9746	LIST_HEAD(set_update_list);
9580	struct nft_trans_elem *te;	9747	struct nft_trans_elem *te;
9581	struct nft_chain *chain;	9748	struct nft_chain *chain;
9582	struct nft_table *table;	9749	struct nft_table *table;
9583	unsigned int base_seq;
9584	LIST_HEAD(adl);	9750	LIST_HEAD(adl);
9585	int err;	9751	int err;
9586		9752
@@ -9657,6 +9823,10 @@ static int nf_tables_commit(struct net net, struct sk_buff skb) · 70 unmodified lines
9657		9823
9658	WRITE_ONCE(nft_net->base_seq, base_seq);	9824	WRITE_ONCE(nft_net->base_seq, base_seq);
9659		9825
		9826	/* Bump gc counter, it becomes odd, this is the busy mark. */
		9827	gc_seq = READ_ONCE(nft_net->gc_seq);
		9828	WRITE_ONCE(nft_net->gc_seq, ++gc_seq);
		9829
9660	/* step 3. Start new generation, rules_gen_X now in use. */	9830	/* step 3. Start new generation, rules_gen_X now in use. */
9661	net->nft.gencursor = nft_gencursor_next(net);	9831	net->nft.gencursor = nft_gencursor_next(net);
9662		9832
@@ -9764,6 +9934,7 @@ static int nf_tables_commit(struct net net, struct sk_buff skb) · 101 unmodified lines
9764	break;	9934	break;
9765	case NFT_MSG_DELSET:	9935	case NFT_MSG_DELSET:
9766	case NFT_MSG_DESTROYSET:	9936	case NFT_MSG_DESTROYSET:
		9937	nft_trans_set(trans)->dead = 1;
9767	list_del_rcu(&nft_trans_set(trans)->list);	9938	list_del_rcu(&nft_trans_set(trans)->list);
9768	nf_tables_set_notify(&trans->ctx, nft_trans_set(trans),	9939	nf_tables_set_notify(&trans->ctx, nft_trans_set(trans),
9769	trans->msg_type, GFP_KERNEL);	9940	trans->msg_type, GFP_KERNEL);
@@ -9866,6 +10037,8 @@ static int nf_tables_commit(struct net net, struct sk_buff skb) · 96 unmodified lines
9866	nft_commit_notify(net, NETLINK_CB(skb).portid);	10037	nft_commit_notify(net, NETLINK_CB(skb).portid);
9867	nf_tables_gen_notify(net, skb, NFT_MSG_NEWGEN);	10038	nf_tables_gen_notify(net, skb, NFT_MSG_NEWGEN);
9868	nf_tables_commit_audit_log(&adl, nft_net->base_seq);	10039	nf_tables_commit_audit_log(&adl, nft_net->base_seq);
		10040
		10041	WRITE_ONCE(nft_net->gc_seq, ++gc_seq);
9869	nf_tables_commit_release(net);	10042	nf_tables_commit_release(net);
9870		10043
9871	return 0;	10044	return 0;
@@ -10915,6 +11088,7 @@ static int __net_init nf_tables_init_net(struct net *net) · 1043 unmodified lines
10915	INIT_LIST_HEAD(&nft_net->notify_list);	11088	INIT_LIST_HEAD(&nft_net->notify_list);
10916	mutex_init(&nft_net->commit_mutex);	11089	mutex_init(&nft_net->commit_mutex);
10917	nft_net->base_seq = 1;	11090	nft_net->base_seq = 1;
		11091	nft_net->gc_seq = 0;
10918		11092
10919	return 0;	11093	return 0;
10920	}	11094	}
@@ -10943,10 +11117,16 @@ static void __net_exit nf_tables_exit_net(struct net *net) · 22 unmodified lines
10943	WARN_ON_ONCE(!list_empty(&nft_net->notify_list));	11117	WARN_ON_ONCE(!list_empty(&nft_net->notify_list));
10944	}	11118	}
10945		11119
		11120	static void nf_tables_exit_batch(struct list_head *net_exit_list)
		11121	{
		11122	flush_work(&trans_gc_work);
		11123	}
		11124
10946	static struct pernet_operations nf_tables_net_ops = {	11125	static struct pernet_operations nf_tables_net_ops = {
10947	.init = nf_tables_init_net,	11126	.init = nf_tables_init_net,
10948	.pre_exit = nf_tables_pre_exit_net,	11127	.pre_exit = nf_tables_pre_exit_net,
10949	.exit = nf_tables_exit_net,	11128	.exit = nf_tables_exit_net,
		11129	.exit_batch = nf_tables_exit_batch,
10950	.id = &nf_tables_net_id,	11130	.id = &nf_tables_net_id,
10951	.size = sizeof(struct nftables_pernet),	11131	.size = sizeof(struct nftables_pernet),
10952	};	11132	};
@@ -11018,6 +11198,7 @@ static void __exit nf_tables_module_exit(void) · 65 unmodified lines
11018	nft_chain_filter_fini();	11198	nft_chain_filter_fini();
11019	nft_chain_route_fini();	11199	nft_chain_route_fini();
11020	unregister_pernet_subsys(&nf_tables_net_ops);	11200	unregister_pernet_subsys(&nf_tables_net_ops);
		11201	cancel_work_sync(&trans_gc_work);
11021	cancel_work_sync(&trans_destroy_work);	11202	cancel_work_sync(&trans_destroy_work);
11022	rcu_barrier();	11203	rcu_barrier();
11023	rhltable_destroy(&nft_objname_ht);	11204	rhltable_destroy(&nft_objname_ht);

net/netfilter/nft_set_hash.c+52−33

@@ -59,6 +59,8 @@ static inline int nft_rhash_cmp(struct rhashtable_compare_arg *arg, · 58 unmodified lines
59		59
60	if (memcmp(nft_set_ext_key(&he->ext), x->key, x->set->klen))	60	if (memcmp(nft_set_ext_key(&he->ext), x->key, x->set->klen))
61	return 1;	61	return 1;
		62	if (nft_set_elem_is_dead(&he->ext))
		63	return 1;
62	if (nft_set_elem_expired(&he->ext))	64	if (nft_set_elem_expired(&he->ext))
63	return 1;	65	return 1;
64	if (!nft_set_elem_active(&he->ext, x->genmask))	66	if (!nft_set_elem_active(&he->ext, x->genmask))
@@ -188,7 +190,6 @@ static void nft_rhash_activate(const struct net net, const struct nft_set set, · 123 unmodified lines
188	struct nft_rhash_elem *he = elem->priv;	190	struct nft_rhash_elem *he = elem->priv;
189		191
190	nft_set_elem_change_active(net, set, &he->ext);	192	nft_set_elem_change_active(net, set, &he->ext);
191	nft_set_elem_clear_busy(&he->ext);
192	}	193	}
193		194
194	static bool nft_rhash_flush(const struct net *net,	195	static bool nft_rhash_flush(const struct net *net,
@@ -196,12 +197,9 @@ static bool nft_rhash_flush(const struct net *net, · 1 unmodified line
196	{	197	{
197	struct nft_rhash_elem *he = priv;	198	struct nft_rhash_elem *he = priv;
198		199
199	if (!nft_set_elem_mark_busy(&he->ext) \|\|	200	nft_set_elem_change_active(net, set, &he->ext);
200	!nft_is_active(net, &he->ext)) {	201
201	nft_set_elem_change_active(net, set, &he->ext);	202	return true;
202	return true;
203	}
204	return false;
205	}	203	}
206		204
207	static void nft_rhash_deactivate(const struct net net,	205	static void nft_rhash_deactivate(const struct net net,
@@ -218,9 +216,8 @@ static void nft_rhash_deactivate(const struct net net, · 10 unmodified lines
218		216
219	rcu_read_lock();	217	rcu_read_lock();
220	he = rhashtable_lookup(&priv->ht, &arg, nft_rhash_params);	218	he = rhashtable_lookup(&priv->ht, &arg, nft_rhash_params);
221	if (he != NULL &&	219	if (he)
222	!nft_rhash_flush(net, set, he))	220	nft_set_elem_change_active(net, set, &he->ext);
223	he = NULL;
224		221
225	rcu_read_unlock();	222	rcu_read_unlock();
226		223
@@ -252,7 +249,9 @@ static bool nft_rhash_delete(const struct nft_set *set, · 25 unmodified lines
252	if (he == NULL)	249	if (he == NULL)
253	return false;	250	return false;
254		251
255	return rhashtable_remove_fast(&priv->ht, &he->node, nft_rhash_params) == 0;	252	nft_set_elem_dead(&he->ext);
		253
		254	return true;
256	}	255	}
257		256
258	static void nft_rhash_walk(const struct nft_ctx ctx, struct nft_set set,	257	static void nft_rhash_walk(const struct nft_ctx ctx, struct nft_set set,
@@ -278,8 +277,6 @@ static void nft_rhash_walk(const struct nft_ctx ctx, struct nft_set set, · 19 unmodified lines
278		277
279	if (iter->count < iter->skip)	278	if (iter->count < iter->skip)
280	goto cont;	279	goto cont;
281	if (nft_set_elem_expired(&he->ext))
282	goto cont;
283	if (!nft_set_elem_active(&he->ext, iter->genmask))	280	if (!nft_set_elem_active(&he->ext, iter->genmask))
284	goto cont;	281	goto cont;
285		282
@@ -314,25 +311,48 @@ static bool nft_rhash_expr_needs_gc_run(const struct nft_set *set, · 28 unmodified lines
314		311
315	static void nft_rhash_gc(struct work_struct *work)	312	static void nft_rhash_gc(struct work_struct *work)
316	{	313	{
		314	struct nftables_pernet *nft_net;
317	struct nft_set *set;	315	struct nft_set *set;
318	struct nft_rhash_elem *he;	316	struct nft_rhash_elem *he;
319	struct nft_rhash *priv;	317	struct nft_rhash *priv;
320	struct nft_set_gc_batch *gcb = NULL;
321	struct rhashtable_iter hti;	318	struct rhashtable_iter hti;
		319	struct nft_trans_gc *gc;
		320	struct net *net;
		321	u32 gc_seq;
322		322
323	priv = container_of(work, struct nft_rhash, gc_work.work);	323	priv = container_of(work, struct nft_rhash, gc_work.work);
324	set = nft_set_container_of(priv);	324	set = nft_set_container_of(priv);
		325	net = read_pnet(&set->net);
		326	nft_net = nft_pernet(net);
		327	gc_seq = READ_ONCE(nft_net->gc_seq);
		328
		329	gc = nft_trans_gc_alloc(set, gc_seq, GFP_KERNEL);
		330	if (!gc)
		331	goto done;
325		332
326	rhashtable_walk_enter(&priv->ht, &hti);	333	rhashtable_walk_enter(&priv->ht, &hti);
327	rhashtable_walk_start(&hti);	334	rhashtable_walk_start(&hti);
328		335
329	while ((he = rhashtable_walk_next(&hti))) {	336	while ((he = rhashtable_walk_next(&hti))) {
330	if (IS_ERR(he)) {	337	if (IS_ERR(he)) {
331	if (PTR_ERR(he) != -EAGAIN)	338	if (PTR_ERR(he) != -EAGAIN) {
332	break;	339	nft_trans_gc_destroy(gc);
		340	gc = NULL;
		341	goto try_later;
		342	}
333	continue;	343	continue;
334	}	344	}
335		345
		346	/* Ruleset has been updated, try later. */
		347	if (READ_ONCE(nft_net->gc_seq) != gc_seq) {
		348	nft_trans_gc_destroy(gc);
		349	gc = NULL;
		350	goto try_later;
		351	}
		352
		353	if (nft_set_elem_is_dead(&he->ext))
		354	goto dead_elem;
		355
336	if (nft_set_ext_exists(&he->ext, NFT_SET_EXT_EXPRESSIONS) &&	356	if (nft_set_ext_exists(&he->ext, NFT_SET_EXT_EXPRESSIONS) &&
337	nft_rhash_expr_needs_gc_run(set, &he->ext))	357	nft_rhash_expr_needs_gc_run(set, &he->ext))
338	goto needs_gc_run;	358	goto needs_gc_run;
@@ -340,26 +360,26 @@ static void nft_rhash_gc(struct work_struct *work) · 1 unmodified line
340	if (!nft_set_elem_expired(&he->ext))	360	if (!nft_set_elem_expired(&he->ext))
341	continue;	361	continue;
342	needs_gc_run:	362	needs_gc_run:
343	if (nft_set_elem_mark_busy(&he->ext))	363	nft_set_elem_dead(&he->ext);
344	continue;	364	dead_elem:
		365	gc = nft_trans_gc_queue_async(gc, gc_seq, GFP_ATOMIC);
		366	if (!gc)
		367	goto try_later;
345		368
346	gcb = nft_set_gc_batch_check(set, gcb, GFP_ATOMIC);	369	nft_trans_gc_elem_add(gc, he);
347	if (gcb == NULL)
348	break;
349	rhashtable_remove_fast(&priv->ht, &he->node, nft_rhash_params);
350	atomic_dec(&set->nelems);
351	nft_set_gc_batch_add(gcb, he);
352	}	370	}
		371
		372	gc = nft_trans_gc_catchall(gc, gc_seq);
		373
		374	try_later:
		375	/* catchall list iteration requires rcu read side lock. */
353	rhashtable_walk_stop(&hti);	376	rhashtable_walk_stop(&hti);
354	rhashtable_walk_exit(&hti);	377	rhashtable_walk_exit(&hti);
355		378
356	he = nft_set_catchall_gc(set);	379	if (gc)
357	if (he) {	380	nft_trans_gc_queue_async_done(gc);
358	gcb = nft_set_gc_batch_check(set, gcb, GFP_ATOMIC);	381
359	if (gcb)	382	done:
360	nft_set_gc_batch_add(gcb, he);
361	}
362	nft_set_gc_batch_complete(gcb);
363	queue_delayed_work(system_power_efficient_wq, &priv->gc_work,	383	queue_delayed_work(system_power_efficient_wq, &priv->gc_work,
364	nft_set_gc_interval(set));	384	nft_set_gc_interval(set));
365	}	385	}
@@ -394,7 +414,7 @@ static int nft_rhash_init(const struct nft_set *set, · 28 unmodified lines
394	return err;	414	return err;
395		415
396	INIT_DEFERRABLE_WORK(&priv->gc_work, nft_rhash_gc);	416	INIT_DEFERRABLE_WORK(&priv->gc_work, nft_rhash_gc);
397	if (set->flags & NFT_SET_TIMEOUT)	417	if (set->flags & (NFT_SET_TIMEOUT \| NFT_SET_EVAL))
398	nft_rhash_gc_init(set);	418	nft_rhash_gc_init(set);
399		419
400	return 0;	420	return 0;
@@ -422,7 +442,6 @@ static void nft_rhash_destroy(const struct nft_ctx *ctx, · 21 unmodified lines
422	};	442	};
423		443
424	cancel_delayed_work_sync(&priv->gc_work);	444	cancel_delayed_work_sync(&priv->gc_work);
425	rcu_barrier();
426	rhashtable_free_and_destroy(&priv->ht, nft_rhash_elem_destroy,	445	rhashtable_free_and_destroy(&priv->ht, nft_rhash_elem_destroy,
427	(void *)&rhash_ctx);	446	(void *)&rhash_ctx);
428	}	447	}

net/netfilter/nft_set_pipapo.c+48−18

@@ -566,8 +566,7 @@ next_match: · 565 unmodified lines
566	goto out;	566	goto out;
567		567
568	if (last) {	568	if (last) {
569	if (nft_set_elem_expired(&f->mt[b].e->ext) \|\|	569	if ((genmask &&
570	(genmask &&
571	!nft_set_elem_active(&f->mt[b].e->ext, genmask)))	570	!nft_set_elem_active(&f->mt[b].e->ext, genmask)))
572	goto next_match;	571	goto next_match;
573		572
@@ -601,8 +600,17 @@ out: · 27 unmodified lines
601	static void nft_pipapo_get(const struct net net, const struct nft_set *set,	600	static void nft_pipapo_get(const struct net net, const struct nft_set *set,
602	const struct nft_set_elem *elem, unsigned int flags)	601	const struct nft_set_elem *elem, unsigned int flags)
603	{	602	{
604	return pipapo_get(net, set, (const u8 *)elem->key.val.data,	603	struct nft_pipapo_elem *ret;
605	nft_genmask_cur(net));	604
		605	ret = pipapo_get(net, set, (const u8 *)elem->key.val.data,
		606	nft_genmask_cur(net));
		607	if (IS_ERR(ret))
		608	return ret;
		609
		610	if (nft_set_elem_expired(&ret->ext))
		611	return ERR_PTR(-ENOENT);
		612
		613	return ret;
606	}	614	}
607		615
608	/**	616	/**
@@ -1528,16 +1536,34 @@ static void pipapo_drop(struct nft_pipapo_match *m, · 919 unmodified lines
1528	}	1536	}
1529	}	1537	}
1530		1538
		1539	static void nft_pipapo_gc_deactivate(struct net net, struct nft_set set,
		1540	struct nft_pipapo_elem *e)
		1541
		1542	{
		1543	struct nft_set_elem elem = {
		1544	.priv = e,
		1545	};
		1546
		1547	nft_setelem_data_deactivate(net, set, &elem);
		1548	}
		1549
1531	/**	1550	/**
1532	* pipapo_gc() - Drop expired entries from set, destroy start and end elements	1551	* pipapo_gc() - Drop expired entries from set, destroy start and end elements
1533	* @set: nftables API set representation	1552	* @set: nftables API set representation
1534	* @m: Matching data	1553	* @m: Matching data
1535	*/	1554	*/
1536	static void pipapo_gc(const struct nft_set set, struct nft_pipapo_match m)	1555	static void pipapo_gc(const struct nft_set _set, struct nft_pipapo_match m)
1537	{	1556	{
		1557	struct nft_set set = (struct nft_set ) _set;
1538	struct nft_pipapo *priv = nft_set_priv(set);	1558	struct nft_pipapo *priv = nft_set_priv(set);
		1559	struct net *net = read_pnet(&set->net);
1539	int rules_f0, first_rule = 0;	1560	int rules_f0, first_rule = 0;
1540	struct nft_pipapo_elem *e;	1561	struct nft_pipapo_elem *e;
		1562	struct nft_trans_gc *gc;
		1563
		1564	gc = nft_trans_gc_alloc(set, 0, GFP_KERNEL);
		1565	if (!gc)
		1566	return;
1541		1567
1542	while ((rules_f0 = pipapo_rules_same_key(m->f, first_rule))) {	1568	while ((rules_f0 = pipapo_rules_same_key(m->f, first_rule))) {
1543	union nft_pipapo_map_bucket rulemap[NFT_PIPAPO_MAX_FIELDS];	1569	union nft_pipapo_map_bucket rulemap[NFT_PIPAPO_MAX_FIELDS];
@@ -1561,13 +1587,20 @@ static void pipapo_gc(const struct nft_set set, struct nft_pipapo_match m) · 17 unmodified lines
1561	f--;	1587	f--;
1562	i--;	1588	i--;
1563	e = f->mt[rulemap[i].to].e;	1589	e = f->mt[rulemap[i].to].e;
1564	if (nft_set_elem_expired(&e->ext) &&	1590
1565	!nft_set_elem_mark_busy(&e->ext)) {	1591	/* synchronous gc never fails, there is no need to set on
		1592	* NFT_SET_ELEM_DEAD_BIT.
		1593	*/
		1594	if (nft_set_elem_expired(&e->ext)) {
1566	priv->dirty = true;	1595	priv->dirty = true;
1567	pipapo_drop(m, rulemap);
1568		1596
1569	rcu_barrier();	1597	gc = nft_trans_gc_queue_sync(gc, GFP_ATOMIC);
1570	nft_set_elem_destroy(set, e, true);	1598	if (!gc)
		1599	break;
		1600
		1601	nft_pipapo_gc_deactivate(net, set, e);
		1602	pipapo_drop(m, rulemap);
		1603	nft_trans_gc_elem_add(gc, e);
1571		1604
1572	/* And check again current first rule, which is now the	1605	/* And check again current first rule, which is now the
1573	* first we haven't checked.	1606	* first we haven't checked.
@@ -1577,11 +1610,11 @@ static void pipapo_gc(const struct nft_set set, struct nft_pipapo_match m) · 3 unmodified lines
1577	}	1610	}
1578	}	1611	}
1579		1612
1580	e = nft_set_catchall_gc(set);	1613	gc = nft_trans_gc_catchall(gc, 0);
1581	if (e)	1614	if (gc) {
1582	nft_set_elem_destroy(set, e, true);	1615	nft_trans_gc_queue_sync_done(gc);
1583		1616	priv->last_gc = jiffies;
1584	priv->last_gc = jiffies;	1617	}
1585	}	1618	}
1586		1619
1587	/**	1620	/**
@@ -1706,7 +1739,6 @@ static void nft_pipapo_activate(const struct net *net, · 118 unmodified lines
1706	return;	1739	return;
1707		1740
1708	nft_set_elem_change_active(net, set, &e->ext);	1741	nft_set_elem_change_active(net, set, &e->ext);
1709	nft_set_elem_clear_busy(&e->ext);
1710	}	1742	}
1711		1743
1712	/**	1744	/**
@@ -2005,8 +2037,6 @@ static void nft_pipapo_walk(const struct nft_ctx ctx, struct nft_set set, · 292 unmodified lines
2005	goto cont;	2037	goto cont;
2006		2038
2007	e = f->mt[r].e;	2039	e = f->mt[r].e;
2008	if (nft_set_elem_expired(&e->ext))
2009	goto cont;
2010		2040
2011	elem.priv = e;	2041	elem.priv = e;
2012		2042

net/netfilter/nft_set_rbtree.c+87−59

@@ -46,6 +46,12 @@ static int nft_rbtree_cmp(const struct nft_set *set, · 45 unmodified lines
46	set->klen);	46	set->klen);
47	}	47	}
48		48
		49	static bool nft_rbtree_elem_expired(const struct nft_rbtree_elem *rbe)
		50	{
		51	return nft_set_elem_expired(&rbe->ext) \|\|
		52	nft_set_elem_is_dead(&rbe->ext);
		53	}
		54
49	static bool __nft_rbtree_lookup(const struct net net, const struct nft_set set,	55	static bool __nft_rbtree_lookup(const struct net net, const struct nft_set set,
50	const u32 key, const struct nft_set_ext *ext,	56	const u32 key, const struct nft_set_ext *ext,
51	unsigned int seq)	57	unsigned int seq)
@@ -80,7 +86,7 @@ static bool __nft_rbtree_lookup(const struct net net, const struct nft_set set · 28 unmodified lines
80	continue;	86	continue;
81	}	87	}
82		88
83	if (nft_set_elem_expired(&rbe->ext))	89	if (nft_rbtree_elem_expired(rbe))
84	return false;	90	return false;
85		91
86	if (nft_rbtree_interval_end(rbe)) {	92	if (nft_rbtree_interval_end(rbe)) {
@@ -98,7 +104,7 @@ static bool __nft_rbtree_lookup(const struct net net, const struct nft_set set · 11 unmodified lines
98		104
99	if (set->flags & NFT_SET_INTERVAL && interval != NULL &&	105	if (set->flags & NFT_SET_INTERVAL && interval != NULL &&
100	nft_set_elem_active(&interval->ext, genmask) &&	106	nft_set_elem_active(&interval->ext, genmask) &&
101	!nft_set_elem_expired(&interval->ext) &&	107	!nft_rbtree_elem_expired(interval) &&
102	nft_rbtree_interval_start(interval)) {	108	nft_rbtree_interval_start(interval)) {
103	*ext = &interval->ext;	109	*ext = &interval->ext;
104	return true;	110	return true;
@@ -215,6 +221,18 @@ static void nft_rbtree_get(const struct net net, const struct nft_set *set, · 110 unmodified lines
215	return rbe;	221	return rbe;
216	}	222	}
217		223
		224	static void nft_rbtree_gc_remove(struct net net, struct nft_set set,
		225	struct nft_rbtree *priv,
		226	struct nft_rbtree_elem *rbe)
		227	{
		228	struct nft_set_elem elem = {
		229	.priv = rbe,
		230	};
		231
		232	nft_setelem_data_deactivate(net, set, &elem);
		233	rb_erase(&rbe->node, &priv->root);
		234	}
		235
218	static int nft_rbtree_gc_elem(const struct nft_set *__set,	236	static int nft_rbtree_gc_elem(const struct nft_set *__set,
219	struct nft_rbtree *priv,	237	struct nft_rbtree *priv,
220	struct nft_rbtree_elem *rbe,	238	struct nft_rbtree_elem *rbe,
@@ -222,11 +240,12 @@ static int nft_rbtree_gc_elem(const struct nft_set *__set, · 1 unmodified line
222	{	240	{
223	struct nft_set set = (struct nft_set )__set;	241	struct nft_set set = (struct nft_set )__set;
224	struct rb_node *prev = rb_prev(&rbe->node);	242	struct rb_node *prev = rb_prev(&rbe->node);
		243	struct net *net = read_pnet(&set->net);
225	struct nft_rbtree_elem *rbe_prev;	244	struct nft_rbtree_elem *rbe_prev;
226	struct nft_set_gc_batch *gcb;	245	struct nft_trans_gc *gc;
227		246
228	gcb = nft_set_gc_batch_check(set, NULL, GFP_ATOMIC);	247	gc = nft_trans_gc_alloc(set, 0, GFP_ATOMIC);
229	if (!gcb)	248	if (!gc)
230	return -ENOMEM;	249	return -ENOMEM;
231		250
232	/* search for end interval coming before this element.	251	/* search for end interval coming before this element.
@@ -244,17 +263,28 @@ static int nft_rbtree_gc_elem(const struct nft_set *__set, · 11 unmodified lines
244		263
245	if (prev) {	264	if (prev) {
246	rbe_prev = rb_entry(prev, struct nft_rbtree_elem, node);	265	rbe_prev = rb_entry(prev, struct nft_rbtree_elem, node);
		266	nft_rbtree_gc_remove(net, set, priv, rbe_prev);
247		267
248	rb_erase(&rbe_prev->node, &priv->root);	268	/* There is always room in this trans gc for this element,
249	atomic_dec(&set->nelems);	269	* memory allocation never actually happens, hence, the warning
250	nft_set_gc_batch_add(gcb, rbe_prev);	270	* splat in such case. No need to set NFT_SET_ELEM_DEAD_BIT,
		271	* this is synchronous gc which never fails.
		272	*/
		273	gc = nft_trans_gc_queue_sync(gc, GFP_ATOMIC);
		274	if (WARN_ON_ONCE(!gc))
		275	return -ENOMEM;
		276
		277	nft_trans_gc_elem_add(gc, rbe_prev);
251	}	278	}
252		279
253	rb_erase(&rbe->node, &priv->root);	280	nft_rbtree_gc_remove(net, set, priv, rbe);
254	atomic_dec(&set->nelems);	281	gc = nft_trans_gc_queue_sync(gc, GFP_ATOMIC);
		282	if (WARN_ON_ONCE(!gc))
		283	return -ENOMEM;
		284
		285	nft_trans_gc_elem_add(gc, rbe);
255		286
256	nft_set_gc_batch_add(gcb, rbe);	287	nft_trans_gc_queue_sync_done(gc);
257	nft_set_gc_batch_complete(gcb);
258		288
259	return 0;	289	return 0;
260	}	290	}
@@ -482,7 +512,6 @@ static void nft_rbtree_activate(const struct net *net, · 221 unmodified lines
482	struct nft_rbtree_elem *rbe = elem->priv;	512	struct nft_rbtree_elem *rbe = elem->priv;
483		513
484	nft_set_elem_change_active(net, set, &rbe->ext);	514	nft_set_elem_change_active(net, set, &rbe->ext);
485	nft_set_elem_clear_busy(&rbe->ext);
486	}	515	}
487		516
488	static bool nft_rbtree_flush(const struct net *net,	517	static bool nft_rbtree_flush(const struct net *net,
@@ -490,12 +519,9 @@ static bool nft_rbtree_flush(const struct net *net, · 1 unmodified line
490	{	519	{
491	struct nft_rbtree_elem *rbe = priv;	520	struct nft_rbtree_elem *rbe = priv;
492		521
493	if (!nft_set_elem_mark_busy(&rbe->ext) \|\|	522	nft_set_elem_change_active(net, set, &rbe->ext);
494	!nft_is_active(net, &rbe->ext)) {	523
495	nft_set_elem_change_active(net, set, &rbe->ext);	524	return true;
496	return true;
497	}
498	return false;
499	}	525	}
500		526
501	static void nft_rbtree_deactivate(const struct net net,	527	static void nft_rbtree_deactivate(const struct net net,
@@ -552,8 +578,6 @@ static void nft_rbtree_walk(const struct nft_ctx *ctx, · 50 unmodified lines
552		578
553	if (iter->count < iter->skip)	579	if (iter->count < iter->skip)
554	goto cont;	580	goto cont;
555	if (nft_set_elem_expired(&rbe->ext))
556	goto cont;
557	if (!nft_set_elem_active(&rbe->ext, iter->genmask))	581	if (!nft_set_elem_active(&rbe->ext, iter->genmask))
558	goto cont;	582	goto cont;
559		583
@@ -572,26 +596,40 @@ cont: · 12 unmodified lines
572		596
573	static void nft_rbtree_gc(struct work_struct *work)	597	static void nft_rbtree_gc(struct work_struct *work)
574	{	598	{
575	struct nft_rbtree_elem rbe, rbe_end = NULL, *rbe_prev = NULL;	599	struct nft_rbtree_elem rbe, rbe_end = NULL;
576	struct nft_set_gc_batch *gcb = NULL;	600	struct nftables_pernet *nft_net;
577	struct nft_rbtree *priv;	601	struct nft_rbtree *priv;
		602	struct nft_trans_gc *gc;
578	struct rb_node *node;	603	struct rb_node *node;
579	struct nft_set *set;	604	struct nft_set *set;
		605	unsigned int gc_seq;
580	struct net *net;	606	struct net *net;
581	u8 genmask;
582		607
583	priv = container_of(work, struct nft_rbtree, gc_work.work);	608	priv = container_of(work, struct nft_rbtree, gc_work.work);
584	set = nft_set_container_of(priv);	609	set = nft_set_container_of(priv);
585	net = read_pnet(&set->net);	610	net = read_pnet(&set->net);
586	genmask = nft_genmask_cur(net);	611	nft_net = nft_pernet(net);
		612	gc_seq = READ_ONCE(nft_net->gc_seq);
		613
		614	gc = nft_trans_gc_alloc(set, gc_seq, GFP_KERNEL);
		615	if (!gc)
		616	goto done;
587		617
588	write_lock_bh(&priv->lock);	618	write_lock_bh(&priv->lock);
589	write_seqcount_begin(&priv->count);	619	write_seqcount_begin(&priv->count);
590	for (node = rb_first(&priv->root); node != NULL; node = rb_next(node)) {	620	for (node = rb_first(&priv->root); node != NULL; node = rb_next(node)) {
		621
		622	/* Ruleset has been updated, try later. */
		623	if (READ_ONCE(nft_net->gc_seq) != gc_seq) {
		624	nft_trans_gc_destroy(gc);
		625	gc = NULL;
		626	goto try_later;
		627	}
		628
591	rbe = rb_entry(node, struct nft_rbtree_elem, node);	629	rbe = rb_entry(node, struct nft_rbtree_elem, node);
592		630
593	if (!nft_set_elem_active(&rbe->ext, genmask))	631	if (nft_set_elem_is_dead(&rbe->ext))
594	continue;	632	goto dead_elem;
595		633
596	/* elements are reversed in the rbtree for historical reasons,	634	/* elements are reversed in the rbtree for historical reasons,
597	* from highest to lowest value, that is why end element is	635	* from highest to lowest value, that is why end element is
@@ -604,46 +642,36 @@ static void nft_rbtree_gc(struct work_struct *work) · 6 unmodified lines
604	if (!nft_set_elem_expired(&rbe->ext))	642	if (!nft_set_elem_expired(&rbe->ext))
605	continue;	643	continue;
606		644
607	if (nft_set_elem_mark_busy(&rbe->ext)) {	645	nft_set_elem_dead(&rbe->ext);
608	rbe_end = NULL;	646
		647	if (!rbe_end)
609	continue;	648	continue;
610	}
611		649
612	if (rbe_prev) {	650	nft_set_elem_dead(&rbe_end->ext);
613	rb_erase(&rbe_prev->node, &priv->root);
614	rbe_prev = NULL;
615	}
616	gcb = nft_set_gc_batch_check(set, gcb, GFP_ATOMIC);
617	if (!gcb)
618	break;
619		651
620	atomic_dec(&set->nelems);	652	gc = nft_trans_gc_queue_async(gc, gc_seq, GFP_ATOMIC);
621	nft_set_gc_batch_add(gcb, rbe);	653	if (!gc)
622	rbe_prev = rbe;	654	goto try_later;
623		655
624	if (rbe_end) {	656	nft_trans_gc_elem_add(gc, rbe_end);
625	atomic_dec(&set->nelems);	657	rbe_end = NULL;
626	nft_set_gc_batch_add(gcb, rbe_end);	658	dead_elem:
627	rb_erase(&rbe_end->node, &priv->root);	659	gc = nft_trans_gc_queue_async(gc, gc_seq, GFP_ATOMIC);
628	rbe_end = NULL;	660	if (!gc)
629	}	661	goto try_later;
630	node = rb_next(node);	662
631	if (!node)	663	nft_trans_gc_elem_add(gc, rbe);
632	break;
633	}	664	}
634	if (rbe_prev)	665
635	rb_erase(&rbe_prev->node, &priv->root);	666	gc = nft_trans_gc_catchall(gc, gc_seq);
		667
		668	try_later:
636	write_seqcount_end(&priv->count);	669	write_seqcount_end(&priv->count);
637	write_unlock_bh(&priv->lock);	670	write_unlock_bh(&priv->lock);
638		671
639	rbe = nft_set_catchall_gc(set);	672	if (gc)
640	if (rbe) {	673	nft_trans_gc_queue_async_done(gc);
641	gcb = nft_set_gc_batch_check(set, gcb, GFP_ATOMIC);	674	done:
642	if (gcb)
643	nft_set_gc_batch_add(gcb, rbe);
644	}
645	nft_set_gc_batch_complete(gcb);
646
647	queue_delayed_work(system_power_efficient_wq, &priv->gc_work,	675	queue_delayed_work(system_power_efficient_wq, &priv->gc_work,
648	nft_set_gc_interval(set));	676	nft_set_gc_interval(set));
649	}	677	}

net/netfilter/nft_socket.c+1−1

@@ -107,7 +107,7 @@ static void nft_socket_eval(const struct nft_expr *expr, · 106 unmodified lines
107	break;	107	break;
108	case NFT_SOCKET_MARK:	108	case NFT_SOCKET_MARK:
109	if (sk_fullsock(sk)) {	109	if (sk_fullsock(sk)) {
110	*dest = sk->sk_mark;	110	*dest = READ_ONCE(sk->sk_mark);
111	} else {	111	} else {
112	regs->verdict.code = NFT_BREAK;	112	regs->verdict.code = NFT_BREAK;
113	return;	113	return;

net/netfilter/xt_socket.c+2−2

@@ -77,7 +77,7 @@ socket_match(const struct sk_buff skb, struct xt_action_param par, · 76 unmodified lines
77		77
78	if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard &&	78	if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard &&
79	transparent && sk_fullsock(sk))	79	transparent && sk_fullsock(sk))
80	pskb->mark = sk->sk_mark;	80	pskb->mark = READ_ONCE(sk->sk_mark);
81		81
82	if (sk != skb->sk)	82	if (sk != skb->sk)
83	sock_gen_put(sk);	83	sock_gen_put(sk);
@@ -138,7 +138,7 @@ socket_mt6_v1_v2_v3(const struct sk_buff skb, struct xt_action_param par) · 54 unmodified lines
138		138
139	if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard &&	139	if (info->flags & XT_SOCKET_RESTORESKMARK && !wildcard &&
140	transparent && sk_fullsock(sk))	140	transparent && sk_fullsock(sk))
141	pskb->mark = sk->sk_mark;	141	pskb->mark = READ_ONCE(sk->sk_mark);
142		142
143	if (sk != skb->sk)	143	if (sk != skb->sk)
144	sock_gen_put(sk);	144	sock_gen_put(sk);

net/packet/af_packet.c+16−12

 {
 	union tpacket_uhdr h;
+	/* WRITE_ONCE() are paired with READ_ONCE() in __packet_get_status */
 	h.raw = frame;
 	switch (po->tp_version) {
 	case TPACKET_V1:
-		h.h1->tp_status = status;
+		WRITE_ONCE(h.h1->tp_status, status);
 		flush_dcache_page(pgv_to_page(&h.h1->tp_status));
 		break;
 	case TPACKET_V2:
-		h.h2->tp_status = status;
+		WRITE_ONCE(h.h2->tp_status, status);
 		flush_dcache_page(pgv_to_page(&h.h2->tp_status));
 		break;
 	case TPACKET_V3:
-		h.h3->tp_status = status;
+		WRITE_ONCE(h.h3->tp_status, status);
 		flush_dcache_page(pgv_to_page(&h.h3->tp_status));
 		break;
 	default:
 	smp_rmb();
+	/* READ_ONCE() are paired with WRITE_ONCE() in __packet_set_status */
 	h.raw = frame;
 	switch (po->tp_version) {
 	case TPACKET_V1:
 		flush_dcache_page(pgv_to_page(&h.h1->tp_status));
-		return h.h1->tp_status;
+		return READ_ONCE(h.h1->tp_status);
 	case TPACKET_V2:
 		flush_dcache_page(pgv_to_page(&h.h2->tp_status));
-		return h.h2->tp_status;
+		return READ_ONCE(h.h2->tp_status);
 	case TPACKET_V3:
 		flush_dcache_page(pgv_to_page(&h.h3->tp_status));
-		return h.h3->tp_status;
+		return READ_ONCE(h.h3->tp_status);
 	default:
 		WARN(1, "TPACKET version not supported.\n");
 		BUG();
 	skb->protocol = proto;
 	skb->dev = dev;
-	skb->priority = sk->sk_priority;
+	skb->priority = READ_ONCE(sk->sk_priority);
-	skb->mark = sk->sk_mark;
+	skb->mark = READ_ONCE(sk->sk_mark);
 	skb->tstamp = sockc.transmit_time;
 	skb_setup_tx_timestamp(skb, sockc.tsflags);
 	skb->protocol = proto;
 	skb->dev = dev;
-	skb->priority = po->sk.sk_priority;
+	skb->priority = READ_ONCE(po->sk.sk_priority);
-	skb->mark = po->sk.sk_mark;
+	skb->mark = READ_ONCE(po->sk.sk_mark);
 	skb->tstamp = sockc->transmit_time;
 	skb_setup_tx_timestamp(skb, sockc->tsflags);
 	skb_zcopy_set_nouarg(skb, ph.raw);
 		goto out_unlock;
 	sockcm_init(&sockc, sk);
-	sockc.mark = sk->sk_mark;
+	sockc.mark = READ_ONCE(sk->sk_mark);
 	if (msg->msg_controllen) {
 		err = sock_cmsg_send(sk, msg, &sockc);
 		if (unlikely(err))
 	skb->protocol = proto;
 	skb->dev = dev;
-	skb->priority = sk->sk_priority;
+	skb->priority = READ_ONCE(sk->sk_priority);
 	skb->mark = sockc.mark;
 	skb->tstamp = sockc.transmit_time;

net/sched/cls_flower.c+3−2

 	[TCA_FLOWER_KEY_MPLS_OPT_LSE_LABEL]    = { .type = NLA_U32 },
 };
-static const struct nla_policy cfm_opt_policy[TCA_FLOWER_KEY_CFM_OPT_MAX] = {
+static const struct nla_policy
+cfm_opt_policy[TCA_FLOWER_KEY_CFM_OPT_MAX + 1] = {
 	[TCA_FLOWER_KEY_CFM_MD_LEVEL]	= NLA_POLICY_MAX(NLA_U8,
 						FLOW_DIS_CFM_MDL_MAX),
 	[TCA_FLOWER_KEY_CFM_OPCODE]	= { .type = NLA_U8 },
 			  struct fl_flow_key *mask,
 			  struct netlink_ext_ack *extack)
 {
-	struct nlattr *nla_cfm_opt[TCA_FLOWER_KEY_CFM_OPT_MAX];
+	struct nlattr *nla_cfm_opt[TCA_FLOWER_KEY_CFM_OPT_MAX + 1];
 	int err;
 	if (!tb[TCA_FLOWER_KEY_CFM])

net/sched/cls_fw.c+0−1

@@ -267,7 +267,6 @@ static int fw_change(struct net net, struct sk_buff in_skb, · 266 unmodified lines
267	return -ENOBUFS;	267	return -ENOBUFS;
268		268
269	fnew->id = f->id;	269	fnew->id = f->id;
270	fnew->res = f->res;
271	fnew->ifindex = f->ifindex;	270	fnew->ifindex = f->ifindex;
272	fnew->tp = f->tp;	271	fnew->tp = f->tp;
273		272

net/sched/cls_route.c+0−1

@@ -513,7 +513,6 @@ static int route4_change(struct net net, struct sk_buff in_skb, · 512 unmodified lines
513	if (fold) {	513	if (fold) {
514	f->id = fold->id;	514	f->id = fold->id;
515	f->iif = fold->iif;	515	f->iif = fold->iif;
516	f->res = fold->res;
517	f->handle = fold->handle;	516	f->handle = fold->handle;
518		517
519	f->tp = fold->tp;	518	f->tp = fold->tp;

net/sched/cls_u32.c+50−7

@@ -826,7 +826,6 @@ static struct tc_u_knode u32_init_knode(struct net net, struct tcf_proto *tp, · 825 unmodified lines
826		826
827	new->ifindex = n->ifindex;	827	new->ifindex = n->ifindex;
828	new->fshift = n->fshift;	828	new->fshift = n->fshift;
829	new->res = n->res;
830	new->flags = n->flags;	829	new->flags = n->flags;
831	RCU_INIT_POINTER(new->ht_down, ht);	830	RCU_INIT_POINTER(new->ht_down, ht);
832		831
@@ -1024,18 +1023,62 @@ static int u32_change(struct net net, struct sk_buff in_skb, · 191 unmodified lines
1024	return -EINVAL;	1023	return -EINVAL;
1025	}	1024	}
1026		1025
		1026	/* At this point, we need to derive the new handle that will be used to
		1027	* uniquely map the identity of this table match entry. The
		1028	* identity of the entry that we need to construct is 32 bits made of:
		1029	* htid(12b):bucketid(8b):node/entryid(12b)
		1030	*
		1031	* At this point _we have the table(ht)_ in which we will insert this
		1032	* entry. We carry the table's id in variable "htid".
		1033	* Note that earlier code picked the ht selection either by a) the user
		1034	* providing the htid specified via TCA_U32_HASH attribute or b) when
		1035	* no such attribute is passed then the root ht, is default to at ID
		1036	* 0x[800][00][000]. Rule: the root table has a single bucket with ID 0.
		1037	* If OTOH the user passed us the htid, they may also pass a bucketid of
		1038	* choice. 0 is fine. For example a user htid is 0x[600][01][000] it is
		1039	* indicating hash bucketid of 1. Rule: the entry/node ID _cannot_ be
		1040	* passed via the htid, so even if it was non-zero it will be ignored.
		1041	*
		1042	* We may also have a handle, if the user passed one. The handle also
		1043	* carries the same addressing of htid(12b):bucketid(8b):node/entryid(12b).
		1044	* Rule: the bucketid on the handle is ignored even if one was passed;
		1045	* rather the value on "htid" is always assumed to be the bucketid.
		1046	*/
1027	if (handle) {	1047	if (handle) {
		1048	/* Rule: The htid from handle and tableid from htid must match */
1028	if (TC_U32_HTID(handle) && TC_U32_HTID(handle ^ htid)) {	1049	if (TC_U32_HTID(handle) && TC_U32_HTID(handle ^ htid)) {
1029	NL_SET_ERR_MSG_MOD(extack, "Handle specified hash table address mismatch");	1050	NL_SET_ERR_MSG_MOD(extack, "Handle specified hash table address mismatch");
1030	return -EINVAL;	1051	return -EINVAL;
1031	}	1052	}
1032	handle = htid \| TC_U32_NODE(handle);	1053	/* Ok, so far we have a valid htid(12b):bucketid(8b) but we
1033	err = idr_alloc_u32(&ht->handle_idr, NULL, &handle, handle,	1054	* need to finalize the table entry identification with the last
1034	GFP_KERNEL);	1055	* part - the node/entryid(12b)). Rule: Nodeid _cannot be 0_ for
1035	if (err)	1056	* entries. Rule: nodeid of 0 is reserved only for tables(see
1036	return err;	1057	* earlier code which processes TC_U32_DIVISOR attribute).
1037	} else	1058	* Rule: The nodeid can only be derived from the handle (and not
		1059	* htid).
		1060	* Rule: if the handle specified zero for the node id example
		1061	* 0x60000000, then pick a new nodeid from the pool of IDs
		1062	* this hash table has been allocating from.
		1063	* If OTOH it is specified (i.e for example the user passed a
		1064	* handle such as 0x60000123), then we use it generate our final
		1065	* handle which is used to uniquely identify the match entry.
		1066	*/
		1067	if (!TC_U32_NODE(handle)) {
		1068	handle = gen_new_kid(ht, htid);
		1069	} else {
		1070	handle = htid \| TC_U32_NODE(handle);
		1071	err = idr_alloc_u32(&ht->handle_idr, NULL, &handle,
		1072	handle, GFP_KERNEL);
		1073	if (err)
		1074	return err;
		1075	}
		1076	} else {
		1077	/* The user did not give us a handle; lets just generate one
		1078	* from the table's pool of nodeids.
		1079	*/
1038	handle = gen_new_kid(ht, htid);	1080	handle = gen_new_kid(ht, htid);
		1081	}
1039		1082
1040	if (tb[TCA_U32_SEL] == NULL) {	1083	if (tb[TCA_U32_SEL] == NULL) {
1041	NL_SET_ERR_MSG_MOD(extack, "Selector not specified");	1084	NL_SET_ERR_MSG_MOD(extack, "Selector not specified");

net/sched/em_meta.c+2−2

@@ -568,7 +568,7 @@ META_COLLECTOR(int_sk_rcvtimeo) · 567 unmodified lines
568	*err = -1;	568	*err = -1;
569	return;	569	return;
570	}	570	}
571	dst->value = sk->sk_rcvtimeo / HZ;	571	dst->value = READ_ONCE(sk->sk_rcvtimeo) / HZ;
572	}	572	}
573		573
574	META_COLLECTOR(int_sk_sndtimeo)	574	META_COLLECTOR(int_sk_sndtimeo)
@@ -579,7 +579,7 @@ META_COLLECTOR(int_sk_sndtimeo) · 4 unmodified lines
579	*err = -1;	579	*err = -1;
580	return;	580	return;
581	}	581	}
582	dst->value = sk->sk_sndtimeo / HZ;	582	dst->value = READ_ONCE(sk->sk_sndtimeo) / HZ;
583	}	583	}
584		584
585	META_COLLECTOR(int_sk_sendmsg_off)	585	META_COLLECTOR(int_sk_sendmsg_off)

net/sched/sch_taprio.c+13−2

 							      TC_FP_PREEMPTIBLE),
 };
+static struct netlink_range_validation_signed taprio_cycle_time_range = {
+	.min = 0,
+	.max = INT_MAX,
+};
 static const struct nla_policy taprio_policy[TCA_TAPRIO_ATTR_MAX + 1] = {
 	[TCA_TAPRIO_ATTR_PRIOMAP]	       = {
 		.len = sizeof(struct tc_mqprio_qopt)
 	[TCA_TAPRIO_ATTR_SCHED_BASE_TIME]            = { .type = NLA_S64 },
 	[TCA_TAPRIO_ATTR_SCHED_SINGLE_ENTRY]         = { .type = NLA_NESTED },
 	[TCA_TAPRIO_ATTR_SCHED_CLOCKID]              = { .type = NLA_S32 },
-	[TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME]           = { .type = NLA_S64 },
+	[TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME]           =
+		NLA_POLICY_FULL_RANGE_SIGNED(NLA_S64, &taprio_cycle_time_range),
 	[TCA_TAPRIO_ATTR_SCHED_CYCLE_TIME_EXTENSION] = { .type = NLA_S64 },
 	[TCA_TAPRIO_ATTR_FLAGS]                      = { .type = NLA_U32 },
 	[TCA_TAPRIO_ATTR_TXTIME_DELAY]		     = { .type = NLA_U32 },
 			return -EINVAL;
 		}
+		if (cycle < 0 || cycle > INT_MAX) {
+			NL_SET_ERR_MSG(extack, "'cycle_time' is too big");
+			return -EINVAL;
+		}
 		new->cycle_time = cycle;
 	}
 			 struct sched_gate_list *sched, ktime_t base)
 {
 	struct sched_entry *entry;
-	u32 interval = 0;
+	u64 interval = 0;
 	list_for_each_entry(entry, &sched->entries, list) {
 		entry->next_txtime = ktime_add_ns(base, interval);

net/smc/af_smc.c+54−25

@@ -378,8 +378,8 @@ static struct sock smc_sock_alloc(struct net net, struct socket *sock, · 377 unmodified lines
378	sk->sk_state = SMC_INIT;	378	sk->sk_state = SMC_INIT;
379	sk->sk_destruct = smc_destruct;	379	sk->sk_destruct = smc_destruct;
380	sk->sk_protocol = protocol;	380	sk->sk_protocol = protocol;
381	WRITE_ONCE(sk->sk_sndbuf, READ_ONCE(net->smc.sysctl_wmem));	381	WRITE_ONCE(sk->sk_sndbuf, 2 * READ_ONCE(net->smc.sysctl_wmem));
382	WRITE_ONCE(sk->sk_rcvbuf, READ_ONCE(net->smc.sysctl_rmem));	382	WRITE_ONCE(sk->sk_rcvbuf, 2 * READ_ONCE(net->smc.sysctl_rmem));
383	smc = smc_sk(sk);	383	smc = smc_sk(sk);
384	INIT_WORK(&smc->tcp_listen_work, smc_tcp_listen_work);	384	INIT_WORK(&smc->tcp_listen_work, smc_tcp_listen_work);
385	INIT_WORK(&smc->connect_work, smc_connect_work);	385	INIT_WORK(&smc->connect_work, smc_connect_work);
@@ -436,24 +436,9 @@ out: · 50 unmodified lines
436	return rc;	436	return rc;
437	}	437	}
438		438
439	static void smc_copy_sock_settings(struct sock nsk, struct sock osk,	439	/* copy only relevant settings and flags of SOL_SOCKET level from smc to
440	unsigned long mask)	440	* clc socket (since smc is not called for these options from net/core)
441	{	441	*/
442	/* options we don't get control via setsockopt for */
443	nsk->sk_type = osk->sk_type;
444	nsk->sk_sndbuf = osk->sk_sndbuf;
445	nsk->sk_rcvbuf = osk->sk_rcvbuf;
446	nsk->sk_sndtimeo = osk->sk_sndtimeo;
447	nsk->sk_rcvtimeo = osk->sk_rcvtimeo;
448	nsk->sk_mark = osk->sk_mark;
449	nsk->sk_priority = osk->sk_priority;
450	nsk->sk_rcvlowat = osk->sk_rcvlowat;
451	nsk->sk_bound_dev_if = osk->sk_bound_dev_if;
452	nsk->sk_err = osk->sk_err;
453
454	nsk->sk_flags &= ~mask;
455	nsk->sk_flags \|= osk->sk_flags & mask;
456	}
457		442
458	#define SK_FLAGS_SMC_TO_CLC ((1UL << SOCK_URGINLINE) \| \	443	#define SK_FLAGS_SMC_TO_CLC ((1UL << SOCK_URGINLINE) \| \
459	(1UL << SOCK_KEEPOPEN) \| \	444	(1UL << SOCK_KEEPOPEN) \| \
@@ -470,9 +455,55 @@ static void smc_copy_sock_settings(struct sock nsk, struct sock osk, · 10 unmodified lines
470	(1UL << SOCK_NOFCS) \| \	455	(1UL << SOCK_NOFCS) \| \
471	(1UL << SOCK_FILTER_LOCKED) \| \	456	(1UL << SOCK_FILTER_LOCKED) \| \
472	(1UL << SOCK_TSTAMP_NEW))	457	(1UL << SOCK_TSTAMP_NEW))
473	/* copy only relevant settings and flags of SOL_SOCKET level from smc to	458
474	* clc socket (since smc is not called for these options from net/core)	459	/* if set, use value set by setsockopt() - else use IPv4 or SMC sysctl value */
475	*/	460	static void smc_adjust_sock_bufsizes(struct sock nsk, struct sock osk,
		461	unsigned long mask)
		462	{
		463	struct net *nnet = sock_net(nsk);
		464
		465	nsk->sk_userlocks = osk->sk_userlocks;
		466	if (osk->sk_userlocks & SOCK_SNDBUF_LOCK) {
		467	nsk->sk_sndbuf = osk->sk_sndbuf;
		468	} else {
		469	if (mask == SK_FLAGS_SMC_TO_CLC)
		470	WRITE_ONCE(nsk->sk_sndbuf,
		471	READ_ONCE(nnet->ipv4.sysctl_tcp_wmem[1]));
		472	else
		473	WRITE_ONCE(nsk->sk_sndbuf,
		474	2 * READ_ONCE(nnet->smc.sysctl_wmem));
		475	}
		476	if (osk->sk_userlocks & SOCK_RCVBUF_LOCK) {
		477	nsk->sk_rcvbuf = osk->sk_rcvbuf;
		478	} else {
		479	if (mask == SK_FLAGS_SMC_TO_CLC)
		480	WRITE_ONCE(nsk->sk_rcvbuf,
		481	READ_ONCE(nnet->ipv4.sysctl_tcp_rmem[1]));
		482	else
		483	WRITE_ONCE(nsk->sk_rcvbuf,
		484	2 * READ_ONCE(nnet->smc.sysctl_rmem));
		485	}
		486	}
		487
		488	static void smc_copy_sock_settings(struct sock nsk, struct sock osk,
		489	unsigned long mask)
		490	{
		491	/* options we don't get control via setsockopt for */
		492	nsk->sk_type = osk->sk_type;
		493	nsk->sk_sndtimeo = osk->sk_sndtimeo;
		494	nsk->sk_rcvtimeo = osk->sk_rcvtimeo;
		495	nsk->sk_mark = READ_ONCE(osk->sk_mark);
		496	nsk->sk_priority = osk->sk_priority;
		497	nsk->sk_rcvlowat = osk->sk_rcvlowat;
		498	nsk->sk_bound_dev_if = osk->sk_bound_dev_if;
		499	nsk->sk_err = osk->sk_err;
		500
		501	nsk->sk_flags &= ~mask;
		502	nsk->sk_flags \|= osk->sk_flags & mask;
		503
		504	smc_adjust_sock_bufsizes(nsk, osk, mask);
		505	}
		506
476	static void smc_copy_sock_settings_to_clc(struct smc_sock *smc)	507	static void smc_copy_sock_settings_to_clc(struct smc_sock *smc)
477	{	508	{
478	smc_copy_sock_settings(smc->clcsock->sk, &smc->sk, SK_FLAGS_SMC_TO_CLC);	509	smc_copy_sock_settings(smc->clcsock->sk, &smc->sk, SK_FLAGS_SMC_TO_CLC);
@@ -2479,8 +2510,6 @@ static void smc_tcp_listen_work(struct work_struct *work) · 2000 unmodified lines
2479	sock_hold(lsk); /* sock_put in smc_listen_work */	2510	sock_hold(lsk); /* sock_put in smc_listen_work */
2480	INIT_WORK(&new_smc->smc_listen_work, smc_listen_work);	2511	INIT_WORK(&new_smc->smc_listen_work, smc_listen_work);
2481	smc_copy_sock_settings_to_smc(new_smc);	2512	smc_copy_sock_settings_to_smc(new_smc);
2482	new_smc->sk.sk_sndbuf = lsmc->sk.sk_sndbuf;
2483	new_smc->sk.sk_rcvbuf = lsmc->sk.sk_rcvbuf;
2484	sock_hold(&new_smc->sk); /* sock_put in passive closing */	2513	sock_hold(&new_smc->sk); /* sock_put in passive closing */
2485	if (!queue_work(smc_hs_wq, &new_smc->smc_listen_work))	2514	if (!queue_work(smc_hs_wq, &new_smc->smc_listen_work))
2486	sock_put(&new_smc->sk);	2515	sock_put(&new_smc->sk);

net/smc/smc.h+1−1

@@ -161,7 +161,7 @@ struct smc_connection { · 160 unmodified lines
161		161
162	struct smc_buf_desc sndbuf_desc; / send buffer descriptor */	162	struct smc_buf_desc sndbuf_desc; / send buffer descriptor */
163	struct smc_buf_desc rmb_desc; / RMBE descriptor */	163	struct smc_buf_desc rmb_desc; / RMBE descriptor */
164	int rmbe_size_short;/* compressed notation */	164	int rmbe_size_comp; /* compressed notation */
165	int rmbe_update_limit;	165	int rmbe_update_limit;
166	/* lower limit for consumer	166	/* lower limit for consumer
167	* cursor update	167	* cursor update

net/smc/smc_clc.c+2−2

@@ -1007,7 +1007,7 @@ static int smc_clc_send_confirm_accept(struct smc_sock *smc, · 1006 unmodified lines
1007	clc->d0.gid =	1007	clc->d0.gid =
1008	conn->lgr->smcd->ops->get_local_gid(conn->lgr->smcd);	1008	conn->lgr->smcd->ops->get_local_gid(conn->lgr->smcd);
1009	clc->d0.token = conn->rmb_desc->token;	1009	clc->d0.token = conn->rmb_desc->token;
1010	clc->d0.dmbe_size = conn->rmbe_size_short;	1010	clc->d0.dmbe_size = conn->rmbe_size_comp;
1011	clc->d0.dmbe_idx = 0;	1011	clc->d0.dmbe_idx = 0;
1012	memcpy(&clc->d0.linkid, conn->lgr->id, SMC_LGR_ID_SIZE);	1012	memcpy(&clc->d0.linkid, conn->lgr->id, SMC_LGR_ID_SIZE);
1013	if (version == SMC_V1) {	1013	if (version == SMC_V1) {
@@ -1050,7 +1050,7 @@ static int smc_clc_send_confirm_accept(struct smc_sock *smc, · 36 unmodified lines
1050	clc->r0.qp_mtu = min(link->path_mtu, link->peer_mtu);	1050	clc->r0.qp_mtu = min(link->path_mtu, link->peer_mtu);
1051	break;	1051	break;
1052	}	1052	}
1053	clc->r0.rmbe_size = conn->rmbe_size_short;	1053	clc->r0.rmbe_size = conn->rmbe_size_comp;
1054	clc->r0.rmb_dma_addr = conn->rmb_desc->is_vm ?	1054	clc->r0.rmb_dma_addr = conn->rmb_desc->is_vm ?
1055	cpu_to_be64((uintptr_t)conn->rmb_desc->cpu_addr) :	1055	cpu_to_be64((uintptr_t)conn->rmb_desc->cpu_addr) :
1056	cpu_to_be64((u64)sg_dma_address	1056	cpu_to_be64((u64)sg_dma_address

net/smc/smc_core.c+12−13

 	struct smc_connection *conn = &smc->conn;
 	struct smc_link_group *lgr = conn->lgr;
 	struct list_head *buf_list;
-	int bufsize, bufsize_short;
+	int bufsize, bufsize_comp;
 	struct rw_semaphore *lock;	/* lock buffer list */
 	bool is_dgraded = false;
-	int sk_buf_size;
 	if (is_rmb)
 		/* use socket recv buffer size (w/o overhead) as start value */
-		sk_buf_size = smc->sk.sk_rcvbuf;
+		bufsize = smc->sk.sk_rcvbuf / 2;
 	else
 		/* use socket send buffer size (w/o overhead) as start value */
-		sk_buf_size = smc->sk.sk_sndbuf;
+		bufsize = smc->sk.sk_sndbuf / 2;
-	for (bufsize_short = smc_compress_bufsize(sk_buf_size, is_smcd, is_rmb);
+	for (bufsize_comp = smc_compress_bufsize(bufsize, is_smcd, is_rmb);
-	     bufsize_short >= 0; bufsize_short--) {
+	     bufsize_comp >= 0; bufsize_comp--) {
 		if (is_rmb) {
 			lock = &lgr->rmbs_lock;
-			buf_list = &lgr->rmbs[bufsize_short];
+			buf_list = &lgr->rmbs[bufsize_comp];
 		} else {
 			lock = &lgr->sndbufs_lock;
-			buf_list = &lgr->sndbufs[bufsize_short];
+			buf_list = &lgr->sndbufs[bufsize_comp];
 		}
-		bufsize = smc_uncompress_bufsize(bufsize_short);
+		bufsize = smc_uncompress_bufsize(bufsize_comp);
 		/* check for reusable slot in the link group */
-		buf_desc = smc_buf_get_slot(bufsize_short, lock, buf_list);
+		buf_desc = smc_buf_get_slot(bufsize_comp, lock, buf_list);
 		if (buf_desc) {
 			buf_desc->is_dma_need_sync = 0;
 			SMC_STAT_RMB_SIZE(smc, is_smcd, is_rmb, bufsize);
 	if (is_rmb) {
 		conn->rmb_desc = buf_desc;
-		conn->rmbe_size_short = bufsize_short;
+		conn->rmbe_size_comp = bufsize_comp;
-		smc->sk.sk_rcvbuf = bufsize;
+		smc->sk.sk_rcvbuf = bufsize * 2;
 		atomic_set(&conn->bytes_to_rcv, 0);
 		conn->rmbe_update_limit =
 			smc_rmb_wnd_update_limit(buf_desc->len);
 			smc_ism_set_conn(conn); /* map RMB/smcd_dev to conn */
 	} else {
 		conn->sndbuf_desc = buf_desc;
-		smc->sk.sk_sndbuf = bufsize;
+		smc->sk.sk_sndbuf = bufsize * 2;
 		atomic_set(&conn->sndbuf_space, bufsize);
 	}
 	return 0;

net/smc/smc_sysctl.c+8−2

 static int min_sndbuf = SMC_BUF_MIN_SIZE;
 static int min_rcvbuf = SMC_BUF_MIN_SIZE;
+static int max_sndbuf = INT_MAX / 2;
+static int max_rcvbuf = INT_MAX / 2;
+static const int net_smc_wmem_init = (64 * 1024);
+static const int net_smc_rmem_init = (64 * 1024);
 static struct ctl_table smc_table[] = {
 	{
 		.mode		= 0644,
 		.proc_handler	= proc_dointvec_minmax,
 		.extra1		= &min_sndbuf,
+		.extra2		= &max_sndbuf,
 	},
 	{
 		.procname	= "rmem",
 		.mode		= 0644,
 		.proc_handler	= proc_dointvec_minmax,
 		.extra1		= &min_rcvbuf,
+		.extra2		= &max_rcvbuf,
 	},
 	{  }
 };
 	net->smc.sysctl_autocorking_size = SMC_AUTOCORKING_DEFAULT_SIZE;
 	net->smc.sysctl_smcr_buf_type = SMCR_PHYS_CONT_BUFS;
 	net->smc.sysctl_smcr_testlink_time = SMC_LLC_TESTLINK_DEFAULT_TIME;
-	WRITE_ONCE(net->smc.sysctl_wmem, READ_ONCE(net->ipv4.sysctl_tcp_wmem[1]));
+	WRITE_ONCE(net->smc.sysctl_wmem, net_smc_wmem_init);
-	WRITE_ONCE(net->smc.sysctl_rmem, READ_ONCE(net->ipv4.sysctl_tcp_rmem[1]));
+	WRITE_ONCE(net->smc.sysctl_rmem, net_smc_rmem_init);
 	return 0;

net/tls/tls_device.c+33−31

 static LIST_HEAD(tls_device_down_list);
 static DEFINE_SPINLOCK(tls_device_lock);
+static struct page *dummy_page;
 static void tls_device_free_ctx(struct tls_context *ctx)
 {
 	if (ctx->tx_conf == TLS_HW) {
 	return tls_push_sg(sk, ctx, offload_ctx->sg_tx_data, 0, flags);
 }
-static int tls_device_record_close(struct sock *sk,
+static void tls_device_record_close(struct sock *sk,
-				   struct tls_context *ctx,
+				    struct tls_context *ctx,
-				   struct tls_record_info *record,
+				    struct tls_record_info *record,
-				   struct page_frag *pfrag,
+				    struct page_frag *pfrag,
-				   unsigned char record_type)
+				    unsigned char record_type)
 {
 	struct tls_prot_info *prot = &ctx->prot_info;
-	int ret;
+	struct page_frag dummy_tag_frag;
 	/* append tag
 	 * device will fill in the tag, we just need to append a placeholder
 	 * use socket memory to improve coalescing (re-using a single buffer
 	 * increases frag count)
-	 * if we can't allocate memory now, steal some back from data
+	 * if we can't allocate memory now use the dummy page
 	 */
-	if (likely(skb_page_frag_refill(prot->tag_size, pfrag,
+	if (unlikely(pfrag->size - pfrag->offset < prot->tag_size) &&
-					sk->sk_allocation))) {
+	    !skb_page_frag_refill(prot->tag_size, pfrag, sk->sk_allocation)) {
-		ret = 0;
+		dummy_tag_frag.page = dummy_page;
-		tls_append_frag(record, pfrag, prot->tag_size);
+		dummy_tag_frag.offset = 0;
-	} else {
+		pfrag = &dummy_tag_frag;
-		ret = prot->tag_size;
-		if (record->len <= prot->overhead_size)
-			return -ENOMEM;
 	}
+	tls_append_frag(record, pfrag, prot->tag_size);
 	/* fill prepend */
 	tls_fill_prepend(ctx, skb_frag_address(&record->frags[0]),
 			 record->len - prot->overhead_size,
 			 record_type);
-	return ret;
 }
 static int tls_create_new_record(struct tls_offload_context_tx *offload_ctx,
 		if (done || record->len >= max_open_record_len ||
 		    (record->num_frags >= MAX_SKB_FRAGS - 1)) {
-			rc = tls_device_record_close(sk, tls_ctx, record,
+			tls_device_record_close(sk, tls_ctx, record,
-						     pfrag, record_type);
+						pfrag, record_type);
-			if (rc) {
-				if (rc > 0) {
-					size += rc;
-				} else {
-					size = orig_size;
-					destroy_record(record);
-					ctx->open_record = NULL;
-					break;
-				}
-			}
 			rc = tls_push_record(sk,
 					     tls_ctx,
 {
 	int err;
-	destruct_wq = alloc_workqueue("ktls_device_destruct", 0, 0);
+	dummy_page = alloc_page(GFP_KERNEL);
-	if (!destruct_wq)
+	if (!dummy_page)
 		return -ENOMEM;
+	destruct_wq = alloc_workqueue("ktls_device_destruct", 0, 0);
+	if (!destruct_wq) {
+		err = -ENOMEM;
+		goto err_free_dummy;
+	}
 	err = register_netdevice_notifier(&tls_dev_notifier);
 	if (err)
-		destroy_workqueue(destruct_wq);
+		goto err_destroy_wq;
+	return 0;
+err_destroy_wq:
+	destroy_workqueue(destruct_wq);
+err_free_dummy:
+	put_page(dummy_page);
 	return err;
 }
 	unregister_netdevice_notifier(&tls_dev_notifier);
 	destroy_workqueue(destruct_wq);
 	clean_acked_data_flush();
+	put_page(dummy_page);
 }

net/tls/tls_main.c+0−3

@@ -139,9 +139,6 @@ int tls_push_sg(struct sock *sk, · 138 unmodified lines
139		139
140	ctx->splicing_pages = true;	140	ctx->splicing_pages = true;
141	while (1) {	141	while (1) {
142	if (sg_is_last(sg))
143	msg.msg_flags = flags;
144
145	/* is sending application-limited? */	142	/* is sending application-limited? */
146	tcp_rate_check_app_limited(sk);	143	tcp_rate_check_app_limited(sk);
147	p = sg_page(sg);	144	p = sg_page(sg);

net/unix/af_unix.c+1−1

@@ -790,7 +790,7 @@ static int unix_set_peek_off(struct sock *sk, int val) · 789 unmodified lines
790	if (mutex_lock_interruptible(&u->iolock))	790	if (mutex_lock_interruptible(&u->iolock))
791	return -EINTR;	791	return -EINTR;
792		792
793	sk->sk_peek_off = val;	793	WRITE_ONCE(sk->sk_peek_off, val);
794	mutex_unlock(&u->iolock);	794	mutex_unlock(&u->iolock);
795		795
796	return 0;	796	return 0;

net/wireless/nl80211.c+4−1

 	if (!wiphy->mbssid_max_interfaces)
 		return ERR_PTR(-EINVAL);
-	nla_for_each_nested(nl_elems, attrs, rem_elems)
+	nla_for_each_nested(nl_elems, attrs, rem_elems) {
+		if (num_elems >= 255)
+			return ERR_PTR(-EINVAL);
 		num_elems++;
+	}
 	elems = kzalloc(struct_size(elems, elem, num_elems), GFP_KERNEL);
 	if (!elems)

net/wireless/scan.c+1−1

@@ -657,7 +657,7 @@ static int cfg80211_parse_colocated_ap(const struct cfg80211_bss_ies *ies, · 656 unmodified lines
657		657
658	ret = cfg80211_calc_short_ssid(ies, &ssid_elem, &s_ssid_tmp);	658	ret = cfg80211_calc_short_ssid(ies, &ssid_elem, &s_ssid_tmp);
659	if (ret)	659	if (ret)
660	return ret;	660	return 0;
661		661
662	for_each_element_id(elem, WLAN_EID_REDUCED_NEIGHBOR_REPORT,	662	for_each_element_id(elem, WLAN_EID_REDUCED_NEIGHBOR_REPORT,
663	ies->data, ies->len) {	663	ies->data, ies->len) {

net/xdp/xsk.c+2−1

 	skb->dev = dev;
 	skb->priority = xs->sk.sk_priority;
-	skb->mark = xs->sk.sk_mark;
+	skb->mark = READ_ONCE(xs->sk.sk_mark);
 	skb_shinfo(skb)->destructor_arg = (void *)(long)desc->addr;
 	skb->destructor = xsk_destruct_skb;
 				err = xp_alloc_tx_descs(xs->pool, xs);
 				if (err) {
 					xp_put_pool(xs->pool);
+					xs->pool = NULL;
 					sockfd_put(sock);
 					goto out_unlock;
 				}

net/xfrm/xfrm_policy.c+1−1

@@ -2250,7 +2250,7 @@ static struct xfrm_policy xfrm_sk_policy_lookup(const struct sock sk, int dir, · 2249 unmodified lines
2250		2250
2251	match = xfrm_selector_match(&pol->selector, fl, family);	2251	match = xfrm_selector_match(&pol->selector, fl, family);
2252	if (match) {	2252	if (match) {
2253	if ((sk->sk_mark & pol->mark.m) != pol->mark.v \|\|	2253	if ((READ_ONCE(sk->sk_mark) & pol->mark.m) != pol->mark.v \|\|
2254	pol->if_id != if_id) {	2254	pol->if_id != if_id) {
2255	pol = NULL;	2255	pol = NULL;
2256	goto out;	2256	goto out;

rust/Makefile+1−1

@@ -257,7 +257,7 @@ bindgen_skip_c_flags := -mno-fp-ret-in-387 -mpreferred-stack-boundary=% \ · 256 unmodified lines
257	-fno-partial-inlining -fplugin-arg-arm_ssp_per_task_plugin-% \	257	-fno-partial-inlining -fplugin-arg-arm_ssp_per_task_plugin-% \
258	-fno-reorder-blocks -fno-allow-store-data-races -fasan-shadow-offset=% \	258	-fno-reorder-blocks -fno-allow-store-data-races -fasan-shadow-offset=% \
259	-fzero-call-used-regs=% -fno-stack-clash-protection \	259	-fzero-call-used-regs=% -fno-stack-clash-protection \
260	-fno-inline-functions-called-once \	260	-fno-inline-functions-called-once -fsanitize=bounds-strict \
261	--param=% --param asan-%	261	--param=% --param asan-%
262		262
263	# Derived from `scripts/Makefile.clang`.	263	# Derived from `scripts/Makefile.clang`.

rust/bindings/bindings_helper.h+1−0

@@ -13,5 +13,6 @@ · 12 unmodified lines
13	#include <linux/sched.h>	13	#include <linux/sched.h>
14		14
15	/* `bindgen` gets confused at certain things. */	15	/* `bindgen` gets confused at certain things. */
		16	const size_t BINDINGS_ARCH_SLAB_MINALIGN = ARCH_SLAB_MINALIGN;
16	const gfp_t BINDINGS_GFP_KERNEL = GFP_KERNEL;	17	const gfp_t BINDINGS_GFP_KERNEL = GFP_KERNEL;
17	const gfp_t BINDINGS___GFP_ZERO = __GFP_ZERO;	18	const gfp_t BINDINGS___GFP_ZERO = __GFP_ZERO;

rust/kernel/allocator.rs+59−15

@@ -9,6 +9,36 @@ use crate::bindings; · 8 unmodified lines
9		9
10	struct KernelAllocator;	10	struct KernelAllocator;
11		11
		12	/// Calls `krealloc` with a proper size to alloc a new object aligned to `new_layout`'s alignment.
		13	///
		14	/// # Safety
		15	///
		16	/// - `ptr` can be either null or a pointer which has been allocated by this allocator.
		17	/// - `new_layout` must have a non-zero size.
		18	unsafe fn krealloc_aligned(ptr: mut u8, new_layout: Layout, flags: bindings::gfp_t) -> mut u8 {
		19	// Customized layouts from `Layout::from_size_align()` can have size < align, so pad first.
		20	let layout = new_layout.pad_to_align();
		21
		22	let mut size = layout.size();
		23
		24	if layout.align() > bindings::BINDINGS_ARCH_SLAB_MINALIGN {
		25	// The alignment requirement exceeds the slab guarantee, thus try to enlarge the size
		26	// to use the "power-of-two" size/alignment guarantee (see comments in `kmalloc()` for
		27	// more information).
		28	//
		29	// Note that `layout.size()` (after padding) is guaranteed to be a multiple of
		30	// `layout.align()`, so `next_power_of_two` gives enough alignment guarantee.
		31	size = size.next_power_of_two();
		32	}
		33
		34	// SAFETY:
		35	// - `ptr` is either null or a pointer returned from a previous `k{re}alloc()` by the
		36	// function safety requirement.
		37	// - `size` is greater than 0 since it's either a `layout.size()` (which cannot be zero
		38	// according to the function safety requirement) or a result from `next_power_of_two()`.
		39	unsafe { bindings::krealloc(ptr as const core::ffi::c_void, size, flags) as mut u8 }
		40	}
		41
12	unsafe impl GlobalAlloc for KernelAllocator {	42	unsafe impl GlobalAlloc for KernelAllocator {
13	unsafe fn alloc(&self, layout: Layout) -> *mut u8 {	43	unsafe fn alloc(&self, layout: Layout) -> *mut u8 {
14	// `krealloc()` is used instead of `kmalloc()` because the latter is	44	// `krealloc()` is used instead of `kmalloc()` because the latter is
@@ -30,10 +60,20 @@ static ALLOCATOR: KernelAllocator = KernelAllocator; · 15 unmodified lines
30	// to extract the object file that has them from the archive. For the moment,	60	// to extract the object file that has them from the archive. For the moment,
31	// let's generate them ourselves instead.	61	// let's generate them ourselves instead.
32	//	62	//
		63	// Note: Although these are safe functions, they are called by the compiler
		64	// with parameters that obey the same `GlobalAlloc` function safety
		65	// requirements: size and align should form a valid layout, and size is
		66	// greater than 0.
		67	//
33	// Note that `#[no_mangle]` implies exported too, nowadays.	68	// Note that `#[no_mangle]` implies exported too, nowadays.
34	#[no_mangle]	69	#[no_mangle]
35	fn __rust_alloc(size: usize, _align: usize) -> *mut u8 {	70	fn __rust_alloc(size: usize, align: usize) -> *mut u8 {
36	unsafe { bindings::krealloc(core::ptr::null(), size, bindings::GFP_KERNEL) as *mut u8 }	71	// SAFETY: See assumption above.
		72	let layout = unsafe { Layout::from_size_align_unchecked(size, align) };
		73
		74	// SAFETY: `ptr::null_mut()` is null, per assumption above the size of `layout` is greater
		75	// than 0.
		76	unsafe { krealloc_aligned(ptr::null_mut(), layout, bindings::GFP_KERNEL) }
37	}	77	}
38		78
39	#[no_mangle]	79	#[no_mangle]
@@ -42,23 +82,27 @@ fn __rust_dealloc(ptr: *mut u8, _size: usize, _align: usize) { · 2 unmodified lines
42	}	82	}
43		83
44	#[no_mangle]	84	#[no_mangle]
45	fn __rust_realloc(ptr: mut u8, _old_size: usize, _align: usize, new_size: usize) -> mut u8 {	85	fn __rust_realloc(ptr: mut u8, _old_size: usize, align: usize, new_size: usize) -> mut u8 {
46	unsafe {	86	// SAFETY: See assumption above.
47	bindings::krealloc(	87	let new_layout = unsafe { Layout::from_size_align_unchecked(new_size, align) };
48	ptr as *const core::ffi::c_void,	88
49	new_size,	89	// SAFETY: Per assumption above, `ptr` is allocated by `__rust_*` before, and the size of
50	bindings::GFP_KERNEL,	90	// `new_layout` is greater than 0.
51	) as *mut u8	91	unsafe { krealloc_aligned(ptr, new_layout, bindings::GFP_KERNEL) }
52	}
53	}	92	}
54		93
55	#[no_mangle]	94	#[no_mangle]
56	fn __rust_alloc_zeroed(size: usize, _align: usize) -> *mut u8 {	95	fn __rust_alloc_zeroed(size: usize, align: usize) -> *mut u8 {
		96	// SAFETY: See assumption above.
		97	let layout = unsafe { Layout::from_size_align_unchecked(size, align) };
		98
		99	// SAFETY: `ptr::null_mut()` is null, per assumption above the size of `layout` is greater
		100	// than 0.
57	unsafe {	101	unsafe {
58	bindings::krealloc(	102	krealloc_aligned(
59	core::ptr::null(),	103	ptr::null_mut(),
60	size,	104	layout,
61	bindings::GFP_KERNEL \| bindings::__GFP_ZERO,	105	bindings::GFP_KERNEL \| bindings::__GFP_ZERO,
62	) as *mut u8	106	)
63	}	107	}
64	}	108	}

rust/kernel/sync/arc.rs+1−2

@@ -243,8 +243,7 @@ impl<T: 'static> ForeignOwnable for Arc<T> { · 242 unmodified lines
243	let inner = NonNull::new(ptr as *mut ArcInner<T>).unwrap();	243	let inner = NonNull::new(ptr as *mut ArcInner<T>).unwrap();
244		244
245	// SAFETY: The safety requirements of `from_foreign` ensure that the object remains alive	245	// SAFETY: The safety requirements of `from_foreign` ensure that the object remains alive
246	// for the lifetime of the returned value. Additionally, the safety requirements of	246	// for the lifetime of the returned value.
247	// `ForeignOwnable::borrow_mut` ensure that no new mutable references are created.
248	unsafe { ArcBorrow::new(inner) }	247	unsafe { ArcBorrow::new(inner) }
249	}	248	}
250		249

rust/kernel/types.rs+2−20

@@ -35,34 +35,16 @@ pub trait ForeignOwnable: Sized { · 34 unmodified lines
35	///	35	///
36	/// `ptr` must have been returned by a previous call to [`ForeignOwnable::into_foreign`] for	36	/// `ptr` must have been returned by a previous call to [`ForeignOwnable::into_foreign`] for
37	/// which a previous matching [`ForeignOwnable::from_foreign`] hasn't been called yet.	37	/// which a previous matching [`ForeignOwnable::from_foreign`] hasn't been called yet.
38	/// Additionally, all instances (if any) of values returned by [`ForeignOwnable::borrow_mut`]
39	/// for this object must have been dropped.
40	unsafe fn borrow<'a>(ptr: *const core::ffi::c_void) -> Self::Borrowed<'a>;	38	unsafe fn borrow<'a>(ptr: *const core::ffi::c_void) -> Self::Borrowed<'a>;
41		39
42	/// Mutably borrows a foreign-owned object.
43	///
44	/// # Safety
45	///
46	/// `ptr` must have been returned by a previous call to [`ForeignOwnable::into_foreign`] for
47	/// which a previous matching [`ForeignOwnable::from_foreign`] hasn't been called yet.
48	/// Additionally, all instances (if any) of values returned by [`ForeignOwnable::borrow`] and
49	/// [`ForeignOwnable::borrow_mut`] for this object must have been dropped.
50	unsafe fn borrow_mut(ptr: *const core::ffi::c_void) -> ScopeGuard<Self, fn(Self)> {
51	// SAFETY: The safety requirements ensure that `ptr` came from a previous call to
52	// `into_foreign`.
53	ScopeGuard::new_with_data(unsafe { Self::from_foreign(ptr) }, \|d\| {
54	d.into_foreign();
55	})
56	}
57
58	/// Converts a foreign-owned object back to a Rust-owned one.	40	/// Converts a foreign-owned object back to a Rust-owned one.
59	///	41	///
60	/// # Safety	42	/// # Safety
61	///	43	///
62	/// `ptr` must have been returned by a previous call to [`ForeignOwnable::into_foreign`] for	44	/// `ptr` must have been returned by a previous call to [`ForeignOwnable::into_foreign`] for
63	/// which a previous matching [`ForeignOwnable::from_foreign`] hasn't been called yet.	45	/// which a previous matching [`ForeignOwnable::from_foreign`] hasn't been called yet.
64	/// Additionally, all instances (if any) of values returned by [`ForeignOwnable::borrow`] and	46	/// Additionally, all instances (if any) of values returned by [`ForeignOwnable::borrow`] for
65	/// [`ForeignOwnable::borrow_mut`] for this object must have been dropped.	47	/// this object must have been dropped.
66	unsafe fn from_foreign(ptr: *const core::ffi::c_void) -> Self;	48	unsafe fn from_foreign(ptr: *const core::ffi::c_void) -> Self;
67	}	49	}
68		50

scripts/kallsyms.c+1−0

@@ -129,6 +129,7 @@ static struct sym_entry read_symbol(FILE in, char *buf, size_t buf_len) · 128 unmodified lines
129	ssize_t readlen;	129	ssize_t readlen;
130	struct sym_entry *sym;	130	struct sym_entry *sym;
131		131
		132	errno = 0;
132	readlen = getline(buf, buf_len, in);	133	readlen = getline(buf, buf_len, in);
133	if (readlen < 0) {	134	if (readlen < 0) {
134	if (errno) {	135	if (errno) {

security/keys/sysctl.c+1−1

@@ -9,7 +9,7 @@ · 8 unmodified lines
9	#include <linux/sysctl.h>	9	#include <linux/sysctl.h>
10	#include "internal.h"	10	#include "internal.h"
11		11
12	struct ctl_table key_sysctls[] = {	12	static struct ctl_table key_sysctls[] = {
13	{	13	{
14	.procname = "maxkeys",	14	.procname = "maxkeys",
15	.data = &key_quota_maxkeys,	15	.data = &key_quota_maxkeys,

tools/arch/x86/include/asm/cpufeatures.h+1−1

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	* Defines x86 CPU feature bits	14	* Defines x86 CPU feature bits
15	*/	15	*/
16	#define NCAPINTS 21 /* N 32-bit words worth of info */	16	#define NCAPINTS 21 /* N 32-bit words worth of info */
17	#define NBUGINTS 1 /* N 32-bit bug flags */	17	#define NBUGINTS 2 /* N 32-bit bug flags */
18		18
19	/*	19	/*
20	* Note: If the comment begins with a quoted string, that string is used	20	* Note: If the comment begins with a quoted string, that string is used

tools/arch/x86/include/asm/msr-index.h+1−0

@@ -545,6 +545,7 @@ · 544 unmodified lines
545	#define MSR_AMD64_DE_CFG 0xc0011029	545	#define MSR_AMD64_DE_CFG 0xc0011029
546	#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1	546	#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1
547	#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT)	547	#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT)
		548	#define MSR_AMD64_DE_CFG_ZEN2_FP_BACKUP_FIX_BIT 9
548		549
549	#define MSR_AMD64_BU_CFG2 0xc001102a	550	#define MSR_AMD64_BU_CFG2 0xc001102a
550	#define MSR_AMD64_IBSFETCHCTL 0xc0011030	551	#define MSR_AMD64_IBSFETCHCTL 0xc0011030

tools/counter/Makefile+2−1

@@ -40,7 +40,8 @@ $(OUTPUT)counter_example: $(COUNTER_EXAMPLE) · 39 unmodified lines
40	clean:	40	clean:
41	rm -f $(ALL_PROGRAMS)	41	rm -f $(ALL_PROGRAMS)
42	rm -rf $(OUTPUT)include/linux/counter.h	42	rm -rf $(OUTPUT)include/linux/counter.h
43	rmdir -p $(OUTPUT)include/linux	43	rm -df $(OUTPUT)include/linux
		44	rm -df $(OUTPUT)include
44	find $(or $(OUTPUT),.) -name '.o' -delete -o -name '\..d' -delete	45	find $(or $(OUTPUT),.) -name '.o' -delete -o -name '\..d' -delete
45		46
46	install: $(ALL_PROGRAMS)	47	install: $(ALL_PROGRAMS)

tools/hv/vmbus_testing+2−2

@@ -164,7 +164,7 @@ def recursive_file_lookup(path, file_map): · 163 unmodified lines
164	def get_all_devices_test_status(file_map):	164	def get_all_devices_test_status(file_map):
165		165
166	for device in file_map:	166	for device in file_map:
167	if (get_test_state(locate_state(device, file_map)) is 1):	167	if (get_test_state(locate_state(device, file_map)) == 1):
168	print("Testing = ON for: {}"	168	print("Testing = ON for: {}"
169	.format(device.split("/")[5]))	169	.format(device.split("/")[5]))
170	else:	170	else:
@@ -203,7 +203,7 @@ def write_test_files(path, value): · 32 unmodified lines
203	def set_test_state(state_path, state_value, quiet):	203	def set_test_state(state_path, state_value, quiet):
204		204
205	write_test_files(state_path, state_value)	205	write_test_files(state_path, state_value)
206	if (get_test_state(state_path) is 1):	206	if (get_test_state(state_path) == 1):
207	if (not quiet):	207	if (not quiet):
208	print("Testing = ON for device: {}"	208	print("Testing = ON for device: {}"
209	.format(state_path.split("/")[5]))	209	.format(state_path.split("/")[5]))

tools/objtool/arch/x86/decode.c+4−1

@@ -824,5 +824,8 @@ bool arch_is_retpoline(struct symbol *sym) · 823 unmodified lines
824		824
825	bool arch_is_rethunk(struct symbol *sym)	825	bool arch_is_rethunk(struct symbol *sym)
826	{	826	{
827	return !strcmp(sym->name, "__x86_return_thunk");	827	return !strcmp(sym->name, "__x86_return_thunk") \|\|
		828	!strcmp(sym->name, "srso_untrain_ret") \|\|
		829	!strcmp(sym->name, "srso_safe_ret") \|\|
		830	!strcmp(sym->name, "__ret");
828	}	831	}

tools/perf/arch/arm64/util/pmu.c+4−3

 		perf_pmu__pathname_scnprintf(path, sizeof(path),
 					     pmu->name, "caps/slots");
 		/*
-		 * The value of slots is not greater than 32 bits, but sysfs__read_int
+		 * The value of slots is not greater than 32 bits, but
-		 * can't read value with 0x prefix, so use sysfs__read_ull instead.
+		 * filename__read_int can't read value with 0x prefix,
+		 * so use filename__read_ull instead.
 		 */
-		sysfs__read_ull(path, &slots);
+		filename__read_ull(path, &slots);
 	}
 	return slots ? (double)slots : NAN;

tools/perf/arch/powerpc/util/skip-callchain-idx.c+4−0

 	if (!chain || chain->nr < 3)
 		return skip_slot;
+	addr_location__init(&al);
 	ip = chain->ips[1];
 	thread__find_symbol(thread, PERF_RECORD_MISC_USER, ip, &al);
 	if (!dso) {
 		pr_debug("%" PRIx64 " dso is NULL\n", ip);
+		addr_location__exit(&al);
 		return skip_slot;
 	}
 		 */
 		skip_slot = 3;
 	}
+	addr_location__exit(&al);
 	return skip_slot;
 }

tools/perf/tests/parse-events.c+11−1

 	return !!perf_pmus__find("cpu");
 }
+static bool test__pmu_cpu_event_valid(void)
+{
+	struct perf_pmu *pmu = perf_pmus__find("cpu");
+	if (!pmu)
+		return false;
+	return perf_pmu__has_format(pmu, "event");
+}
 static bool test__intel_pt_valid(void)
 {
 	return !!perf_pmus__find("intel_pt");
 	},
 	{
 		.name  = "cpu/name='COMPLEX_CYCLES_NAME:orig=cycles,desc=chip-clock-ticks',period=0x1,event=0x2/ukp",
-		.valid = test__pmu_cpu_valid,
+		.valid = test__pmu_cpu_event_valid,
 		.check = test__checkevent_complex_name,
 		/* 3 */
 	},

tools/perf/tests/shell/test_uprobe_from_different_cu.sh+7−1

 set -e
+# skip if there's no gcc
+if ! [ -x "$(command -v gcc)" ]; then
+        echo "failed: no gcc compiler"
+        exit 2
+fi
 temp_dir=$(mktemp -d /tmp/perf-uprobe-different-cu-sh.XXXXXXXXXX)
 cleanup()
 	trap - EXIT TERM INT
 	if [[ "${temp_dir}" =~ ^/tmp/perf-uprobe-different-cu-sh.*$ ]]; then
 		echo "--- Cleaning up ---"
-		perf probe -x ${temp_dir}/testfile -d foo
+		perf probe -x ${temp_dir}/testfile -d foo || true
 		rm -f "${temp_dir}/"*
 		rmdir "${temp_dir}"
 	fi

tools/perf/util/machine.c+0−5

 static void __machine__remove_thread(struct machine *machine, struct thread_rb_node *nd,
 				     struct thread *th, bool lock);
-static int append_inlines(struct callchain_cursor *cursor, struct map_symbol *ms, u64 ip);
 static struct dso *machine__kernel_dso(struct machine *machine)
 {
 	ms.maps = maps__get(al.maps);
 	ms.map = map__get(al.map);
 	ms.sym = al.sym;
-	if (!branch && append_inlines(cursor, &ms, ip) == 0)
-		goto out;
 	srcline = callchain_srcline(&ms, al.addr);
 	err = callchain_cursor_append(cursor, ip, &ms,
 				      branch, flags, nr_loop_iter,

tools/perf/util/parse-events.c+36−22

 	return lhs->core.idx - rhs->core.idx;
 }
-static int evlist__cmp(void *state, const struct list_head *l, const struct list_head *r)
+static int evlist__cmp(void *_fg_idx, const struct list_head *l, const struct list_head *r)
 {
 	const struct perf_evsel *lhs_core = container_of(l, struct perf_evsel, node);
 	const struct evsel *lhs = container_of(lhs_core, struct evsel, core);
 	const struct perf_evsel *rhs_core = container_of(r, struct perf_evsel, node);
 	const struct evsel *rhs = container_of(rhs_core, struct evsel, core);
-	int *leader_idx = state;
+	int *force_grouped_idx = _fg_idx;
-	int lhs_leader_idx = *leader_idx, rhs_leader_idx = *leader_idx, ret;
+	int lhs_sort_idx, rhs_sort_idx, ret;
 	const char *lhs_pmu_name, *rhs_pmu_name;
-	bool lhs_has_group = false, rhs_has_group = false;
+	bool lhs_has_group, rhs_has_group;
 	/*
 	 * First sort by grouping/leader. Read the leader idx only if the evsel
 	 */
 	if (lhs_core->leader != lhs_core || lhs_core->nr_members > 1) {
 		lhs_has_group = true;
-		lhs_leader_idx = lhs_core->leader->idx;
+		lhs_sort_idx = lhs_core->leader->idx;
+	} else {
+		lhs_has_group = false;
+		lhs_sort_idx = *force_grouped_idx != -1 && arch_evsel__must_be_in_group(lhs)
+			? *force_grouped_idx
+			: lhs_core->idx;
 	}
 	if (rhs_core->leader != rhs_core || rhs_core->nr_members > 1) {
 		rhs_has_group = true;
-		rhs_leader_idx = rhs_core->leader->idx;
+		rhs_sort_idx = rhs_core->leader->idx;
+	} else {
+		rhs_has_group = false;
+		rhs_sort_idx = *force_grouped_idx != -1 && arch_evsel__must_be_in_group(rhs)
+			? *force_grouped_idx
+			: rhs_core->idx;
 	}
-	if (lhs_leader_idx != rhs_leader_idx)
+	if (lhs_sort_idx != rhs_sort_idx)
-		return lhs_leader_idx - rhs_leader_idx;
+		return lhs_sort_idx - rhs_sort_idx;
 	/* Group by PMU if there is a group. Groups can't span PMUs. */
 	if (lhs_has_group && rhs_has_group) {
 static int parse_events__sort_events_and_fix_groups(struct list_head *list)
 {
-	int idx = 0, unsorted_idx = -1;
+	int idx = 0, force_grouped_idx = -1;
 	struct evsel *pos, *cur_leader = NULL;
 	struct perf_evsel *cur_leaders_grp = NULL;
-	bool idx_changed = false;
+	bool idx_changed = false, cur_leader_force_grouped = false;
 	int orig_num_leaders = 0, num_leaders = 0;
 	int ret;
 		 */
 		pos->core.idx = idx++;
-		if (unsorted_idx == -1 && pos == pos_leader && pos->core.nr_members < 2)
+		/* Remember an index to sort all forced grouped events together to. */
-			unsorted_idx = pos->core.idx;
+		if (force_grouped_idx == -1 && pos == pos_leader && pos->core.nr_members < 2 &&
+		    arch_evsel__must_be_in_group(pos))
+			force_grouped_idx = pos->core.idx;
 	}
 	/* Sort events. */
-	list_sort(&unsorted_idx, list, evlist__cmp);
+	list_sort(&force_grouped_idx, list, evlist__cmp);
 	/*
 	 * Recompute groups, splitting for PMUs and adding groups for events
 	list_for_each_entry(pos, list, core.node) {
 		const struct evsel *pos_leader = evsel__leader(pos);
 		const char *pos_pmu_name = pos->group_pmu_name;
-		const char *cur_leader_pmu_name, *pos_leader_pmu_name;
+		const char *cur_leader_pmu_name;
-		bool force_grouped = arch_evsel__must_be_in_group(pos);
+		bool pos_force_grouped = force_grouped_idx != -1 &&
+			arch_evsel__must_be_in_group(pos);
 		/* Reset index and nr_members. */
 		if (pos->core.idx != idx)
 			cur_leader = pos;
 		cur_leader_pmu_name = cur_leader->group_pmu_name;
-		if ((cur_leaders_grp != pos->core.leader && !force_grouped) ||
+		if ((cur_leaders_grp != pos->core.leader &&
+		     (!pos_force_grouped || !cur_leader_force_grouped)) ||
 		    strcmp(cur_leader_pmu_name, pos_pmu_name)) {
 			/* Event is for a different group/PMU than last. */
 			cur_leader = pos;
 			 * group.
 			 */
 			cur_leaders_grp = pos->core.leader;
-		}
-		pos_leader_pmu_name = pos_leader->group_pmu_name;
-		if (strcmp(pos_leader_pmu_name, pos_pmu_name) || force_grouped) {
 			/*
-			 * Event's PMU differs from its leader's. Groups can't
+			 * Avoid forcing events into groups with events that
-			 * span PMUs, so update leader from the group/PMU
+			 * don't need to be in the group.
-			 * tracker.
 			 */
+			cur_leader_force_grouped = pos_force_grouped;
+		}
+		if (pos_leader != cur_leader) {
+			/* The leader changed so update it. */
 			evsel__set_leader(pos, cur_leader);
 		}
 	}

tools/perf/util/pmu.c+11−0

@@ -1440,6 +1440,17 @@ void perf_pmu__del_formats(struct list_head *formats) · 1439 unmodified lines
1440	}	1440	}
1441	}	1441	}
1442		1442
		1443	bool perf_pmu__has_format(const struct perf_pmu pmu, const char name)
		1444	{
		1445	struct perf_pmu_format *format;
		1446
		1447	list_for_each_entry(format, &pmu->format, list) {
		1448	if (!strcmp(format->name, name))
		1449	return true;
		1450	}
		1451	return false;
		1452	}
		1453
1443	bool is_pmu_core(const char *name)	1454	bool is_pmu_core(const char *name)
1444	{	1455	{
1445	return !strcmp(name, "cpu") \|\| !strcmp(name, "cpum_cf") \|\| is_sysfs_pmu_core(name);	1456	return !strcmp(name, "cpu") \|\| !strcmp(name, "cpum_cf") \|\| is_sysfs_pmu_core(name);

tools/perf/util/pmu.h+1−0

@@ -234,6 +234,7 @@ int perf_pmu__new_format(struct list_head list, char name, · 233 unmodified lines
234	void perf_pmu__set_format(unsigned long *bits, long from, long to);	234	void perf_pmu__set_format(unsigned long *bits, long from, long to);
235	int perf_pmu__format_parse(int dirfd, struct list_head *head);	235	int perf_pmu__format_parse(int dirfd, struct list_head *head);
236	void perf_pmu__del_formats(struct list_head *formats);	236	void perf_pmu__del_formats(struct list_head *formats);
		237	bool perf_pmu__has_format(const struct perf_pmu pmu, const char name);
237		238
238	bool is_pmu_core(const char *name);	239	bool is_pmu_core(const char *name);
239	bool perf_pmu__supports_legacy_cache(const struct perf_pmu *pmu);	240	bool perf_pmu__supports_legacy_cache(const struct perf_pmu *pmu);

tools/perf/util/pmus.c+7−9

 	}
 	closedir(dir);
-	if (core_only) {
+	if (list_empty(&core_pmus)) {
-		if (!list_empty(&core_pmus))
+		if (!perf_pmu__create_placeholder_core_pmu(&core_pmus))
-			read_sysfs_core_pmus = true;
+			pr_err("Failure to set up any core PMUs\n");
-		else {
+	}
-			if (perf_pmu__create_placeholder_core_pmu(&core_pmus))
+	if (!list_empty(&core_pmus)) {
-				read_sysfs_core_pmus = true;
-		}
-	} else {
 		read_sysfs_core_pmus = true;
-		read_sysfs_all_pmus = true;
+		if (!core_only)
+			read_sysfs_all_pmus = true;
 	}
 }

tools/perf/util/stat-display.c+5−0

 	 */
 	if (config->aggr_mode == AGGR_THREAD && config->system_wide)
 		return true;
+	/* Tool events have the software PMU but are only gathered on 1. */
+	if (evsel__is_tool(counter))
+		return true;
 	/*
 	 * Skip value 0 when it's an uncore event and the given aggr id
 	 * does not belong to the PMU cpumask.

tools/testing/radix-tree/regression1.c+1−1

@@ -177,7 +177,7 @@ void regression1_test(void) · 176 unmodified lines
177	nr_threads = 2;	177	nr_threads = 2;
178	pthread_barrier_init(&worker_barrier, NULL, nr_threads);	178	pthread_barrier_init(&worker_barrier, NULL, nr_threads);
179		179
180	threads = malloc(nr_threads * sizeof(pthread_t *));	180	threads = malloc(nr_threads * sizeof(*threads));
181		181
182	for (i = 0; i < nr_threads; i++) {	182	for (i = 0; i < nr_threads; i++) {
183	arg = i;	183	arg = i;

tools/testing/selftests/bpf/prog_tests/sockmap_listen.c+73−1

@@ -869,6 +869,77 @@ static void test_msg_redir_to_listening(struct test_sockmap_listen *skel, · 868 unmodified lines
869	xbpf_prog_detach2(verdict, sock_map, BPF_SK_MSG_VERDICT);	869	xbpf_prog_detach2(verdict, sock_map, BPF_SK_MSG_VERDICT);
870	}	870	}
871		871
		872	static void redir_partial(int family, int sotype, int sock_map, int parser_map)
		873	{
		874	int s, c0, c1, p0, p1;
		875	int err, n, key, value;
		876	char buf[] = "abc";
		877
		878	key = 0;
		879	value = sizeof(buf) - 1;
		880	err = xbpf_map_update_elem(parser_map, &key, &value, 0);
		881	if (err)
		882	return;
		883
		884	s = socket_loopback(family, sotype \| SOCK_NONBLOCK);
		885	if (s < 0)
		886	goto clean_parser_map;
		887
		888	err = create_socket_pairs(s, family, sotype, &c0, &c1, &p0, &p1);
		889	if (err)
		890	goto close_srv;
		891
		892	err = add_to_sockmap(sock_map, p0, p1);
		893	if (err)
		894	goto close;
		895
		896	n = xsend(c1, buf, sizeof(buf), 0);
		897	if (n < sizeof(buf))
		898	FAIL("incomplete write");
		899
		900	n = xrecv_nonblock(c0, buf, sizeof(buf), 0);
		901	if (n != sizeof(buf) - 1)
		902	FAIL("expect %zu, received %d", sizeof(buf) - 1, n);
		903
		904	close:
		905	xclose(c0);
		906	xclose(p0);
		907	xclose(c1);
		908	xclose(p1);
		909	close_srv:
		910	xclose(s);
		911
		912	clean_parser_map:
		913	key = 0;
		914	value = 0;
		915	xbpf_map_update_elem(parser_map, &key, &value, 0);
		916	}
		917
		918	static void test_skb_redir_partial(struct test_sockmap_listen *skel,
		919	struct bpf_map *inner_map, int family,
		920	int sotype)
		921	{
		922	int verdict = bpf_program__fd(skel->progs.prog_stream_verdict);
		923	int parser = bpf_program__fd(skel->progs.prog_stream_parser);
		924	int parser_map = bpf_map__fd(skel->maps.parser_map);
		925	int sock_map = bpf_map__fd(inner_map);
		926	int err;
		927
		928	err = xbpf_prog_attach(parser, sock_map, BPF_SK_SKB_STREAM_PARSER, 0);
		929	if (err)
		930	return;
		931
		932	err = xbpf_prog_attach(verdict, sock_map, BPF_SK_SKB_STREAM_VERDICT, 0);
		933	if (err)
		934	goto detach;
		935
		936	redir_partial(family, sotype, sock_map, parser_map);
		937
		938	xbpf_prog_detach2(verdict, sock_map, BPF_SK_SKB_STREAM_VERDICT);
		939	detach:
		940	xbpf_prog_detach2(parser, sock_map, BPF_SK_SKB_STREAM_PARSER);
		941	}
		942
872	static void test_reuseport_select_listening(int family, int sotype,	943	static void test_reuseport_select_listening(int family, int sotype,
873	int sock_map, int verd_map,	944	int sock_map, int verd_map,
874	int reuseport_prog)	945	int reuseport_prog)
@@ -1243,6 +1314,7 @@ static void test_redir(struct test_sockmap_listen skel, struct bpf_map map, · 368 unmodified lines
1243	} tests[] = {	1314	} tests[] = {
1244	TEST(test_skb_redir_to_connected),	1315	TEST(test_skb_redir_to_connected),
1245	TEST(test_skb_redir_to_listening),	1316	TEST(test_skb_redir_to_listening),
		1317	TEST(test_skb_redir_partial),
1246	TEST(test_msg_redir_to_connected),	1318	TEST(test_msg_redir_to_connected),
1247	TEST(test_msg_redir_to_listening),	1319	TEST(test_msg_redir_to_listening),
1248	};	1320	};
@@ -1432,7 +1504,7 @@ static void vsock_unix_redir_connectible(int sock_mapfd, int verd_mapfd, · 183 unmodified lines
1432	if (n < 1)	1504	if (n < 1)
1433	goto out;	1505	goto out;
1434		1506
1435	n = recv(mode == REDIR_INGRESS ? u0 : u1, &b, sizeof(b), MSG_DONTWAIT);	1507	n = xrecv_nonblock(mode == REDIR_INGRESS ? u0 : u1, &b, sizeof(b), 0);
1436	if (n < 0)	1508	if (n < 0)
1437	FAIL("%s: recv() err, errno=%d", log_prefix, errno);	1509	FAIL("%s: recv() err, errno=%d", log_prefix, errno);
1438	if (n == 0)	1510	if (n == 0)

tools/testing/selftests/bpf/progs/test_sockmap_listen.c+14−0

@@ -28,12 +28,26 @@ struct { · 27 unmodified lines
28	__type(value, unsigned int);	28	__type(value, unsigned int);
29	} verdict_map SEC(".maps");	29	} verdict_map SEC(".maps");
30		30
		31	struct {
		32	__uint(type, BPF_MAP_TYPE_ARRAY);
		33	__uint(max_entries, 1);
		34	__type(key, int);
		35	__type(value, int);
		36	} parser_map SEC(".maps");
		37
31	bool test_sockmap = false; /* toggled by user-space */	38	bool test_sockmap = false; /* toggled by user-space */
32	bool test_ingress = false; /* toggled by user-space */	39	bool test_ingress = false; /* toggled by user-space */
33		40
34	SEC("sk_skb/stream_parser")	41	SEC("sk_skb/stream_parser")
35	int prog_stream_parser(struct __sk_buff *skb)	42	int prog_stream_parser(struct __sk_buff *skb)
36	{	43	{
		44	int *value;
		45	__u32 key = 0;
		46
		47	value = bpf_map_lookup_elem(&parser_map, &key);
		48	if (value && *value)
		49	return *value;
		50
37	return skb->len;	51	return skb->len;
38	}	52	}
39		53

tools/testing/selftests/cgroup/test_kmem.c+4−0

@@ -70,6 +70,10 @@ static int test_kmem_basic(const char *root) · 69 unmodified lines
70	goto cleanup;	70	goto cleanup;
71		71
72	cg_write(cg, "memory.high", "1M");	72	cg_write(cg, "memory.high", "1M");
		73
		74	/* wait for RCU freeing */
		75	sleep(1);
		76
73	slab1 = cg_read_key_long(cg, "memory.stat", "slab ");	77	slab1 = cg_read_key_long(cg, "memory.stat", "slab ");
74	if (slab1 <= 0)	78	if (slab1 <= 0)
75	goto cleanup;	79	goto cleanup;

tools/testing/selftests/mm/ksm_tests.c+1−0

@@ -831,6 +831,7 @@ int main(int argc, char *argv[]) · 830 unmodified lines
831	printf("Size must be greater than 0\n");	831	printf("Size must be greater than 0\n");
832	return KSFT_FAIL;	832	return KSFT_FAIL;
833	}	833	}
		834	break;
834	case 't':	835	case 't':
835	{	836	{
836	int tmp = atoi(optarg);	837	int tmp = atoi(optarg);

tools/testing/selftests/net/fib_nexthops.sh+10−0

 	run_cmd "$IP link set dev lo up"
+	# Dump should not loop endlessly when maximum nexthop ID is configured.
+	run_cmd "$IP nexthop add id $((2**32-1)) blackhole"
+	run_cmd "timeout 5 $IP nexthop"
+	log_test $? 0 "Maximum nexthop ID dump"
 	#
 	# groups
 	#
 	run_cmd "$IP nexthop bucket list fdb"
 	log_test $? 255 "Dump all nexthop buckets with invalid 'fdb' keyword"
+	# Dump should not loop endlessly when maximum nexthop ID is configured.
+	run_cmd "$IP nexthop add id $((2**32-1)) group 1/2 type resilient buckets 4"
+	run_cmd "timeout 5 $IP nexthop bucket"
+	log_test $? 0 "Maximum nexthop ID dump"
 	#
 	# resilient nexthop buckets get requests
 	#

tools/testing/selftests/net/forwarding/bridge_mdb.sh+33−26

 		grep -q "permanent"
 	check_err $? "Entry not added as \"permanent\" when should"
 	bridge -d -s mdb show dev br0 vid 10 | grep "$grp_key" | \
-		grep -q "0.00"
+		grep -q " 0.00"
 	check_err $? "\"permanent\" entry has a pending group timer"
 	bridge mdb del dev br0 port $swp1 $grp_key vid 10
 		grep -q "temp"
 	check_err $? "Entry not added as \"temp\" when should"
 	bridge -d -s mdb show dev br0 vid 10 | grep "$grp_key" | \
-		grep -q "0.00"
+		grep -q " 0.00"
 	check_fail $? "\"temp\" entry has an unpending group timer"
 	bridge mdb del dev br0 port $swp1 $grp_key vid 10
 		grep -q "permanent"
 	check_err $? "Entry not marked as \"permanent\" after replace"
 	bridge -d -s mdb show dev br0 vid 10 | grep "$grp_key" | \
-		grep -q "0.00"
+		grep -q " 0.00"
 	check_err $? "Entry has a pending group timer after replace"
 	bridge mdb replace dev br0 port $swp1 $grp_key vid 10 temp
 		grep -q "temp"
 	check_err $? "Entry not marked as \"temp\" after replace"
 	bridge -d -s mdb show dev br0 vid 10 | grep "$grp_key" | \
-		grep -q "0.00"

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tools/testing/selftests/net/forwarding/bridge_mdb_max.sh+15−4

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tools/testing/selftests/net/forwarding/ethtool.sh+2−0

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tools/testing/selftests/net/forwarding/ethtool_extended_state.sh+2−0

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tools/testing/selftests/net/forwarding/ethtool_mm.sh+13−5

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tools/testing/selftests/net/forwarding/hw_stats_l3_gre.sh+2−0

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tools/testing/selftests/net/forwarding/ip6_forward_instats_vrf.sh+2−0

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tools/testing/selftests/net/forwarding/lib.sh+17−0

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tools/testing/selftests/net/forwarding/settings+1−0

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tools/testing/selftests/net/forwarding/tc_actions.sh+4−2

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tools/testing/selftests/net/forwarding/tc_flower.sh+4−4

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tools/testing/selftests/net/forwarding/tc_flower_l2_miss.sh+8−5

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tools/testing/selftests/net/forwarding/tc_tunnel_key.sh+6−3

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tools/testing/selftests/net/mptcp/mptcp_join.sh+4−2

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tools/testing/selftests/net/pmtu.sh+35−0

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tools/testing/selftests/net/so_incoming_cpu.c+1−1

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tools/testing/selftests/riscv/vector/vstate_exec_nolibc.c+0−2

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tools/testing/selftests/rseq/Makefile+3−1

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tools/testing/selftests/rseq/rseq.c+2−0

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tools/testing/selftests/tc-testing/tc-tests/qdiscs/taprio.json+25−0

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tools/testing/vsock/Makefile+1−1

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Merge 6.5-rc6 into usb-next

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@@ -101,9 +101,9 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) · 100 unmodified lines
101	* Relaxed I/O memory access primitives. These follow the Device memory	101	* Relaxed I/O memory access primitives. These follow the Device memory
102	* ordering rules but do not guarantee any ordering relative to Normal memory	102	* ordering rules but do not guarantee any ordering relative to Normal memory
103	* accesses. These are defined to order the indicated access (either a read or	103	* accesses. These are defined to order the indicated access (either a read or
104	* write) with all other I/O memory accesses. Since the platform specification	104	* write) with all other I/O memory accesses to the same peripheral. Since the
105	* defines that all I/O regions are strongly ordered on channel 2, no explicit	105	* platform specification defines that all I/O regions are strongly ordered on
106	* fences are required to enforce this ordering.	106	* channel 0, no explicit fences are required to enforce this ordering.
107	*/	107	*/
108	/* FIXME: These are now the same as asm-generic */	108	/* FIXME: These are now the same as asm-generic */
109	#define __io_rbr() do {} while (0)	109	#define __io_rbr() do {} while (0)
@@ -125,14 +125,14 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) · 15 unmodified lines
125	#endif	125	#endif
126		126
127	/*	127	/*
128	* I/O memory access primitives. Reads are ordered relative to any	128	* I/O memory access primitives. Reads are ordered relative to any following
129	* following Normal memory access. Writes are ordered relative to any prior	129	* Normal memory read and delay() loop. Writes are ordered relative to any
130	* Normal memory access. The memory barriers here are necessary as RISC-V	130	* prior Normal memory write. The memory barriers here are necessary as RISC-V
131	* doesn't define any ordering between the memory space and the I/O space.	131	* doesn't define any ordering between the memory space and the I/O space.
132	*/	132	*/
133	#define __io_br() do {} while (0)	133	#define __io_br() do {} while (0)
134	#define __io_ar(v) __asm__ __volatile__ ("fence i,r" : : : "memory")	134	#define __io_ar(v) ({ __asm__ __volatile__ ("fence i,ir" : : : "memory"); })
135	#define __io_bw() __asm__ __volatile__ ("fence w,o" : : : "memory")	135	#define __io_bw() ({ __asm__ __volatile__ ("fence w,o" : : : "memory"); })
136	#define __io_aw() mmiowb_set_pending()	136	#define __io_aw() mmiowb_set_pending()
137		137
138	#define readb(c) ({ u8 __v; __io_br(); __v = readb_cpu(c); __io_ar(__v); __v; })	138	#define readb(c) ({ u8 __v; __io_br(); __v = readb_cpu(c); __io_ar(__v); __v; })