History

Merge git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull MIPS fixes from Ralf Baechle: - MIPS didn't define the new ioremap_uc. Defined it as an alias for ioremap_uncached. - Replace workaround for MIPS16 build issue with a correct one. * git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Define ioremap_uc MIPS: UAPI: Ignore __arch_swab{16,32,64} when using MIPS16 Revert "MIPS: UAPI: Fix unrecognized opcode WSBH/DSBH/DSHD when using MIPS16."

Linus Torvalds committed 11 years ago

Commit bbecce82 parents 1d8a12d da11f982 files · +8 −12Browse files

Unified · Split

2 files
  1. arch/mips/include/asm/io.h +1 −0
  2. arch/mips/include/uapi/asm/swab.h +7 −12
arch/mips/include/asm/io.h+1−0
@@ -256,6 +256,7 @@ static inline void __iomem * __ioremap_mode(phys_addr_t offset, unsigned long si · 255 unmodified lines
256 */256 */
257#define ioremap_nocache(offset, size) \257#define ioremap_nocache(offset, size) \
258 __ioremap_mode((offset), (size), _CACHE_UNCACHED)258 __ioremap_mode((offset), (size), _CACHE_UNCACHED)
259#define ioremap_uc ioremap_nocache
259 260
260/*261/*
261 * ioremap_cachable - map bus memory into CPU space262 * ioremap_cachable - map bus memory into CPU space
arch/mips/include/uapi/asm/swab.h+7−12
@@ -13,16 +13,15 @@ · 12 unmodified lines
13 13
14#define __SWAB_64_THRU_32__14#define __SWAB_64_THRU_32__
15 15
16#if (defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \16#if !defined(__mips16) && \
17 defined(_MIPS_ARCH_LOONGSON3A)17 ((defined(__mips_isa_rev) && (__mips_isa_rev >= 2)) || \
18 defined(_MIPS_ARCH_LOONGSON3A))
18 19
19static inline __attribute__((nomips16)) __attribute_const__20static inline __attribute_const__ __u16 __arch_swab16(__u16 x)
20 __u16 __arch_swab16(__u16 x)
21{21{
22 __asm__(22 __asm__(
23 " .set push \n"23 " .set push \n"
24 " .set arch=mips32r2 \n"24 " .set arch=mips32r2 \n"
25 " .set nomips16 \n"
26 " wsbh %0, %1 \n"25 " wsbh %0, %1 \n"
27 " .set pop \n"26 " .set pop \n"
28 : "=r" (x)27 : "=r" (x)
@@ -32,13 +31,11 @@ static inline __attribute__((nomips16)) __attribute_const__ · 3 unmodified lines
32}31}
33#define __arch_swab16 __arch_swab1632#define __arch_swab16 __arch_swab16
34 33
35static inline __attribute__((nomips16)) __attribute_const__34static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
36 __u32 __arch_swab32(__u32 x)
37{35{
38 __asm__(36 __asm__(
39 " .set push \n"37 " .set push \n"
40 " .set arch=mips32r2 \n"38 " .set arch=mips32r2 \n"
41 " .set nomips16 \n"
42 " wsbh %0, %1 \n"39 " wsbh %0, %1 \n"
43 " rotr %0, %0, 16 \n"40 " rotr %0, %0, 16 \n"
44 " .set pop \n"41 " .set pop \n"
@@ -54,13 +51,11 @@ static inline __attribute__((nomips16)) __attribute_const__ · 9 unmodified lines
54 * 64-bit kernel on r2 CPUs.51 * 64-bit kernel on r2 CPUs.
55 */52 */
56#ifdef __mips6453#ifdef __mips64
57static inline __attribute__((nomips16)) __attribute_const__54static inline __attribute_const__ __u64 __arch_swab64(__u64 x)
58 __u64 __arch_swab64(__u64 x)
59{55{
60 __asm__(56 __asm__(
61 " .set push \n"57 " .set push \n"
62 " .set arch=mips64r2 \n"58 " .set arch=mips64r2 \n"
63 " .set nomips16 \n"
64 " dsbh %0, %1 \n"59 " dsbh %0, %1 \n"
65 " dshd %0, %0 \n"60 " dshd %0, %0 \n"
66 " .set pop \n"61 " .set pop \n"
@@ -71,5 +66,5 @@ static inline __attribute__((nomips16)) __attribute_const__ · 4 unmodified lines
71}66}
72#define __arch_swab64 __arch_swab6467#define __arch_swab64 __arch_swab64
73#endif /* __mips64 */68#endif /* __mips64 */
74#endif /* MIPS R2 or newer or Loongson 3A */69#endif /* (not __mips16) and (MIPS R2 or newer or Loongson 3A) */
75#endif /* _ASM_SWAB_H */70#endif /* _ASM_SWAB_H */