igt likes to inject GPU hangs into its command streams. However, as we expect these hangs, we don't actually want them recorded in the dmesg output or stored in the i915_error_state (usually). To accommodate this allow userspace to set a flag on the context that any hang emanating from that context will not be recorded. We still do the error capture (otherwise how do we find the guilty context and know its intent?) as part of the reason for random GPU hang injection is to exercise the race conditions between the error capture and normal execution. v2: Split out the request->ringbuf error capture changes. v3: Move the flag defines next to the intel_context->flags definition
Unified · Split
| @@ -475,6 +475,7 @@ struct drm_i915_error_state { · 474 unmodified lines | ||
| 475 | 475 | struct timeval time; |
| 476 | 476 | |
| 477 | 477 | char error_msg[128]; |
| 478 | + bool simulated; | |
| 478 | 479 | int iommu; |
| 479 | 480 | u32 reset_count; |
| 480 | 481 | u32 suspend_count; |
| @@ -875,9 +876,10 @@ struct i915_gem_context { · 394 unmodified lines | ||
| 875 | 876 | |
| 876 | 877 | /* Unique identifier for this context, used by the hw for tracking */ |
| 877 | 878 | unsigned long flags; |
| 879 | +#define CONTEXT_NO_ZEROMAP BIT(0) | |
| 880 | +#define CONTEXT_NO_ERROR_CAPTURE BIT(1) | |
| 878 | 881 | unsigned hw_id; |
| 879 | 882 | u32 user_handle; |
| 880 | −#define CONTEXT_NO_ZEROMAP (1<<0) | |
| 881 | 883 | |
| 882 | 884 | u32 ggtt_alignment; |
| 883 | 885 | |
| @@ -1026,6 +1026,9 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data, · 1025 unmodified lines | ||
| 1026 | 1026 | else |
| 1027 | 1027 | args->value = to_i915(dev)->ggtt.base.total; |
| 1028 | 1028 | break; |
| 1029 | + case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE: | |
| 1030 | + args->value = !!(ctx->flags & CONTEXT_NO_ERROR_CAPTURE); | |
| 1031 | + break; | |
| 1029 | 1032 | default: |
| 1030 | 1033 | ret = -EINVAL; |
| 1031 | 1034 | break; |
| @@ -1071,6 +1074,16 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data, · 39 unmodified lines | ||
| 1071 | 1074 | ctx->flags |= args->value ? CONTEXT_NO_ZEROMAP : 0; |
| 1072 | 1075 | } |
| 1073 | 1076 | break; |
| 1077 | + case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE: | |
| 1078 | + if (args->size) { | |
| 1079 | + ret = -EINVAL; | |
| 1080 | + } else { | |
| 1081 | + if (args->value) | |
| 1082 | + ctx->flags |= CONTEXT_NO_ERROR_CAPTURE; | |
| 1083 | + else | |
| 1084 | + ctx->flags &= ~CONTEXT_NO_ERROR_CAPTURE; | |
| 1085 | + } | |
| 1086 | + break; | |
| 1074 | 1087 | default: |
| 1075 | 1088 | ret = -EINVAL; |
| 1076 | 1089 | break; |
| @@ -1093,9 +1093,8 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv, · 1092 unmodified lines | ||
| 1093 | 1093 | struct i915_address_space *vm; |
| 1094 | 1094 | struct intel_ringbuffer *rb; |
| 1095 | 1095 | |
| 1096 | − vm = request->ctx && request->ctx->ppgtt ? | |
| 1097 | − &request->ctx->ppgtt->base : | |
| 1098 | − &ggtt->base; | |
| 1096 | + vm = request->ctx->ppgtt ? | |
| 1097 | + &request->ctx->ppgtt->base : &ggtt->base; | |
| 1099 | 1098 | |
| 1100 | 1099 | /* We need to copy these to an anonymous buffer |
| 1101 | 1100 | * as the simplest method to avoid being overwritten |
| @@ -1123,6 +1122,9 @@ static void i915_gem_record_rings(struct drm_i915_private *dev_priv, · 21 unmodified lines | ||
| 1123 | 1122 | rcu_read_unlock(); |
| 1124 | 1123 | } |
| 1125 | 1124 | |
| 1125 | + error->simulated |= | |
| 1126 | + request->ctx->flags & CONTEXT_NO_ERROR_CAPTURE; | |
| 1127 | + | |
| 1126 | 1128 | rb = request->ringbuf; |
| 1127 | 1129 | error->ring[i].cpu_ring_head = rb->head; |
| 1128 | 1130 | error->ring[i].cpu_ring_tail = rb->tail; |
| @@ -1422,12 +1424,14 @@ void i915_capture_error_state(struct drm_i915_private *dev_priv, · 293 unmodified lines | ||
| 1422 | 1424 | i915_error_capture_msg(dev_priv, error, engine_mask, error_msg); |
| 1423 | 1425 | DRM_INFO("%s\n", error->error_msg); |
| 1424 | 1426 | |
| 1425 | − spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); | |
| 1426 | − if (dev_priv->gpu_error.first_error == NULL) { | |
| 1427 | − dev_priv->gpu_error.first_error = error; | |
| 1428 | − error = NULL; | |
| 1427 | + if (!error->simulated) { | |
| 1428 | + spin_lock_irqsave(&dev_priv->gpu_error.lock, flags); | |
| 1429 | + if (!dev_priv->gpu_error.first_error) { | |
| 1430 | + dev_priv->gpu_error.first_error = error; | |
| 1431 | + error = NULL; | |
| 1432 | + } | |
| 1433 | + spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); | |
| 1429 | 1434 | } |
| 1430 | − spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags); | |
| 1431 | 1435 | |
| 1432 | 1436 | if (error) { |
| 1433 | 1437 | i915_error_state_free(&error->ref); |
| @@ -1173,6 +1173,7 @@ struct drm_i915_gem_context_param { · 1172 unmodified lines | ||
| 1173 | 1173 | #define I915_CONTEXT_PARAM_BAN_PERIOD 0x1 |
| 1174 | 1174 | #define I915_CONTEXT_PARAM_NO_ZEROMAP 0x2 |
| 1175 | 1175 | #define I915_CONTEXT_PARAM_GTT_SIZE 0x3 |
| 1176 | +#define I915_CONTEXT_PARAM_NO_ERROR_CAPTURE 0x4 | |
| 1176 | 1177 | __u64 value; |
| 1177 | 1178 | }; |
| 1178 | 1179 | |