Now that 4.19-rc1 is cut, backmerge it into -misc-next.
Unified · Split
| @@ -382,7 +382,7 @@ IncludeIsMainRegex: '(Test)?$' · 381 unmodified lines | |||
| 382 | IndentCaseLabels: false | 382 | IndentCaseLabels: false |
| 383 | #IndentPPDirectives: None # Unknown to clang-format-5.0 | 383 | #IndentPPDirectives: None # Unknown to clang-format-5.0 |
| 384 | IndentWidth: 8 | 384 | IndentWidth: 8 |
| 385 | IndentWrappedFunctionNames: true | 385 | IndentWrappedFunctionNames: false |
| 386 | JavaScriptQuotes: Leave | 386 | JavaScriptQuotes: Leave |
| 387 | JavaScriptWrapImports: true | 387 | JavaScriptWrapImports: true |
| 388 | KeepEmptyLinesAtTheStartOfBlocks: false | 388 | KeepEmptyLinesAtTheStartOfBlocks: false |
| @@ -31,6 +31,8 @@ Arnaud Patard <arnaud.patard@rtp-net.org> · 30 unmodified lines | |||
| 31 | Arnd Bergmann <arnd@arndb.de> | 31 | Arnd Bergmann <arnd@arndb.de> |
| 32 | Axel Dyks <xl@xlsigned.net> | 32 | Axel Dyks <xl@xlsigned.net> |
| 33 | Axel Lin <axel.lin@gmail.com> | 33 | Axel Lin <axel.lin@gmail.com> |
| 34 | Bart Van Assche <bvanassche@acm.org> <bart.vanassche@wdc.com> | ||
| 35 | Bart Van Assche <bvanassche@acm.org> <bart.vanassche@sandisk.com> | ||
| 34 | Ben Gardner <bgardner@wabtec.com> | 36 | Ben Gardner <bgardner@wabtec.com> |
| 35 | Ben M Cahill <ben.m.cahill@intel.com> | 37 | Ben M Cahill <ben.m.cahill@intel.com> |
| 36 | Björn Steinbrink <B.Steinbrink@gmx.de> | 38 | Björn Steinbrink <B.Steinbrink@gmx.de> |
| @@ -81,6 +83,9 @@ Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com> · 44 unmodified lines | |||
| 81 | <javier@osg.samsung.com> <javier.martinez@collabora.co.uk> | 83 | <javier@osg.samsung.com> <javier.martinez@collabora.co.uk> |
| 82 | Jean Tourrilhes <jt@hpl.hp.com> | 84 | Jean Tourrilhes <jt@hpl.hp.com> |
| 83 | Jeff Garzik <jgarzik@pretzel.yyz.us> | 85 | Jeff Garzik <jgarzik@pretzel.yyz.us> |
| 86 | Jeff Layton <jlayton@kernel.org> <jlayton@redhat.com> | ||
| 87 | Jeff Layton <jlayton@kernel.org> <jlayton@poochiereds.net> | ||
| 88 | Jeff Layton <jlayton@kernel.org> <jlayton@primarydata.com> | ||
| 84 | Jens Axboe <axboe@suse.de> | 89 | Jens Axboe <axboe@suse.de> |
| 85 | Jens Osterkamp <Jens.Osterkamp@de.ibm.com> | 90 | Jens Osterkamp <Jens.Osterkamp@de.ibm.com> |
| 86 | Johan Hovold <johan@kernel.org> <jhovold@gmail.com> | 91 | Johan Hovold <johan@kernel.org> <jhovold@gmail.com> |
| @@ -154,6 +159,7 @@ Ralf Wildenhues <Ralf.Wildenhues@gmx.de> · 67 unmodified lines | |||
| 154 | Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net> | 159 | Randy Dunlap <rdunlap@infradead.org> <rdunlap@xenotime.net> |
| 155 | Rémi Denis-Courmont <rdenis@simphalempin.com> | 160 | Rémi Denis-Courmont <rdenis@simphalempin.com> |
| 156 | Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> | 161 | Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> |
| 162 | Ross Zwisler <zwisler@kernel.org> <ross.zwisler@linux.intel.com> | ||
| 157 | Rudolf Marek <R.Marek@sh.cvut.cz> | 163 | Rudolf Marek <R.Marek@sh.cvut.cz> |
| 158 | Rui Saraiva <rmps@joel.ist.utl.pt> | 164 | Rui Saraiva <rmps@joel.ist.utl.pt> |
| 159 | Sachin P Sant <ssant@in.ibm.com> | 165 | Sachin P Sant <ssant@in.ibm.com> |
| @@ -2571,6 +2571,11 @@ S: Helstorfer Str. 7 · 2570 unmodified lines | |||
| 2571 | S: D-30625 Hannover | 2571 | S: D-30625 Hannover |
| 2572 | S: Germany | 2572 | S: Germany |
| 2573 | 2573 | ||
| 2574 | N: Ron Minnich | ||
| 2575 | E: rminnich@sandia.gov | ||
| 2576 | E: rminnich@gmail.com | ||
| 2577 | D: 9p filesystem development | ||
| 2578 | |||
| 2574 | N: Corey Minyard | 2579 | N: Corey Minyard |
| 2575 | E: minyard@wf-rch.cirr.com | 2580 | E: minyard@wf-rch.cirr.com |
| 2576 | E: minyard@mvista.com | 2581 | E: minyard@mvista.com |
| @@ -0,0 +1,48 @@ | |||
| 1 | These files are deprecated and will be removed. The same files are available | ||
| 2 | under /sys/bus/typec (see Documentation/ABI/testing/sysfs-bus-typec). | ||
| 3 | |||
| 4 | What: /sys/class/typec/<port|partner|cable>/<dev>/svid | ||
| 5 | Date: April 2017 | ||
| 6 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 7 | Description: | ||
| 8 | The SVID (Standard or Vendor ID) assigned by USB-IF for this | ||
| 9 | alternate mode. | ||
| 10 | |||
| 11 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/ | ||
| 12 | Date: April 2017 | ||
| 13 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 14 | Description: | ||
| 15 | Every supported mode will have its own directory. The name of | ||
| 16 | a mode will be "mode<index>" (for example mode1), where <index> | ||
| 17 | is the actual index to the mode VDO returned by Discover Modes | ||
| 18 | USB power delivery command. | ||
| 19 | |||
| 20 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/description | ||
| 21 | Date: April 2017 | ||
| 22 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 23 | Description: | ||
| 24 | Shows description of the mode. The description is optional for | ||
| 25 | the drivers, just like with the Billboard Devices. | ||
| 26 | |||
| 27 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/vdo | ||
| 28 | Date: April 2017 | ||
| 29 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 30 | Description: | ||
| 31 | Shows the VDO in hexadecimal returned by Discover Modes command | ||
| 32 | for this mode. | ||
| 33 | |||
| 34 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/active | ||
| 35 | Date: April 2017 | ||
| 36 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 37 | Description: | ||
| 38 | Shows if the mode is active or not. The attribute can be used | ||
| 39 | for entering/exiting the mode with partners and cable plugs, and | ||
| 40 | with the port alternate modes it can be used for disabling | ||
| 41 | support for specific alternate modes. Entering/exiting modes is | ||
| 42 | supported as synchronous operation so write(2) to the attribute | ||
| 43 | does not return until the enter/exit mode operation has | ||
| 44 | finished. The attribute is notified when the mode is | ||
| 45 | entered/exited so poll(2) on the attribute wakes up. | ||
| 46 | Entering/exiting a mode will also generate uevent KOBJ_CHANGE. | ||
| 47 | |||
| 48 | Valid values: yes, no | ||
| @@ -42,6 +42,13 @@ Contact: K. Y. Srinivasan <kys@microsoft.com> · 41 unmodified lines | |||
| 42 | Description: The 16 bit vendor ID of the device | 42 | Description: The 16 bit vendor ID of the device |
| 43 | Users: tools/hv/lsvmbus and user level RDMA libraries | 43 | Users: tools/hv/lsvmbus and user level RDMA libraries |
| 44 | 44 | ||
| 45 | What: /sys/bus/vmbus/devices/<UUID>/numa_node | ||
| 46 | Date: Jul 2018 | ||
| 47 | KernelVersion: 4.19 | ||
| 48 | Contact: Stephen Hemminger <sthemmin@microsoft.com> | ||
| 49 | Description: This NUMA node to which the VMBUS device is | ||
| 50 | attached, or -1 if the node is unknown. | ||
| 51 | |||
| 45 | What: /sys/bus/vmbus/devices/<UUID>/channels/<N> | 52 | What: /sys/bus/vmbus/devices/<UUID>/channels/<N> |
| 46 | Date: September. 2017 | 53 | Date: September. 2017 |
| 47 | KernelVersion: 4.14 | 54 | KernelVersion: 4.14 |
| @@ -11,7 +11,7 @@ KernelVersion: v2.6.22 · 10 unmodified lines | |||
| 11 | Contact: linux-wireless@vger.kernel.org, | 11 | Contact: linux-wireless@vger.kernel.org, |
| 12 | Description: The rfkill class subsystem folder. | 12 | Description: The rfkill class subsystem folder. |
| 13 | Each registered rfkill driver is represented by an rfkillX | 13 | Each registered rfkill driver is represented by an rfkillX |
| 14 | subfolder (X being an integer > 0). | 14 | subfolder (X being an integer >= 0). |
| 15 | 15 | ||
| 16 | 16 | ||
| 17 | What: /sys/class/rfkill/rfkill[0-9]+/name | 17 | What: /sys/class/rfkill/rfkill[0-9]+/name |
| @@ -48,8 +48,8 @@ Contact: linux-wireless@vger.kernel.org · 30 unmodified lines | |||
| 48 | Description: Current state of the transmitter. | 48 | Description: Current state of the transmitter. |
| 49 | This file was scheduled to be removed in 2014, but due to its | 49 | This file was scheduled to be removed in 2014, but due to its |
| 50 | large number of users it will be sticking around for a bit | 50 | large number of users it will be sticking around for a bit |
| 51 | longer. Despite it being marked as stabe, the newer "hard" and | 51 | longer. Despite it being marked as stable, the newer "hard" and |
| 52 | "soft" interfaces should be preffered, since it is not possible | 52 | "soft" interfaces should be preferred, since it is not possible |
| 53 | to express the 'soft and hard block' state of the rfkill driver | 53 | to express the 'soft and hard block' state of the rfkill driver |
| 54 | through this interface. There will likely be another attempt to | 54 | through this interface. There will likely be another attempt to |
| 55 | remove it in the future. | 55 | remove it in the future. |
| @@ -0,0 +1,78 @@ | |||
| 1 | What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/ | ||
| 2 | asic_health | ||
| 3 | |||
| 4 | Date: June 2018 | ||
| 5 | KernelVersion: 4.19 | ||
| 6 | Contact: Vadim Pasternak <vadimpmellanox.com> | ||
| 7 | Description: This file shows ASIC health status. The possible values are: | ||
| 8 | 0 - health failed, 2 - health OK, 3 - ASIC in booting state. | ||
| 9 | |||
| 10 | The files are read only. | ||
| 11 | |||
| 12 | What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/ | ||
| 13 | cpld1_version | ||
| 14 | cpld2_version | ||
| 15 | |||
| 16 | Date: June 2018 | ||
| 17 | KernelVersion: 4.19 | ||
| 18 | Contact: Vadim Pasternak <vadimpmellanox.com> | ||
| 19 | Description: These files show with which CPLD versions have been burned | ||
| 20 | on carrier and switch boards. | ||
| 21 | |||
| 22 | The files are read only. | ||
| 23 | |||
| 24 | What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/select_iio | ||
| 25 | Date: June 2018 | ||
| 26 | KernelVersion: 4.19 | ||
| 27 | Contact: Vadim Pasternak <vadimpmellanox.com> | ||
| 28 | Description: This file allows iio devices selection. | ||
| 29 | |||
| 30 | Attribute select_iio can be written with 0 or with 1. It | ||
| 31 | selects which one of iio devices can be accessed. | ||
| 32 | |||
| 33 | The file is read/write. | ||
| 34 | |||
| 35 | What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu1_on | ||
| 36 | /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/psu2_on | ||
| 37 | /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_cycle | ||
| 38 | /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/pwr_down | ||
| 39 | Date: June 2018 | ||
| 40 | KernelVersion: 4.19 | ||
| 41 | Contact: Vadim Pasternak <vadimpmellanox.com> | ||
| 42 | Description: These files allow asserting system power cycling, switching | ||
| 43 | power supply units on and off and system's main power domain | ||
| 44 | shutdown. | ||
| 45 | Expected behavior: | ||
| 46 | When pwr_cycle is written 1: auxiliary power domain will go | ||
| 47 | down and after short period (about 1 second) up. | ||
| 48 | When psu1_on or psu2_on is written 1, related unit will be | ||
| 49 | disconnected from the power source, when written 0 - connected. | ||
| 50 | If both are written 1 - power supplies main power domain will | ||
| 51 | go down. | ||
| 52 | When pwr_down is written 1, system's main power domain will go | ||
| 53 | down. | ||
| 54 | |||
| 55 | The files are write only. | ||
| 56 | |||
| 57 | What: /sys/devices/platform/mlxplat/mlxreg-io/hwmon/hwmon*/ | ||
| 58 | reset_aux_pwr_or_ref | ||
| 59 | reset_asic_thermal | ||
| 60 | reset_hotswap_or_halt | ||
| 61 | reset_hotswap_or_wd | ||
| 62 | reset_fw_reset | ||
| 63 | reset_long_pb | ||
| 64 | reset_main_pwr_fail | ||
| 65 | reset_short_pb | ||
| 66 | reset_sw_reset | ||
| 67 | Date: June 2018 | ||
| 68 | KernelVersion: 4.19 | ||
| 69 | Contact: Vadim Pasternak <vadimpmellanox.com> | ||
| 70 | Description: These files show the system reset cause, as following: power | ||
| 71 | auxiliary outage or power refresh, ASIC thermal shutdown, halt, | ||
| 72 | hotswap, watchdog, firmware reset, long press power button, | ||
| 73 | short press power button, software reset. Value 1 in file means | ||
| 74 | this is reset cause, 0 - otherwise. Only one of the above | ||
| 75 | causes could be 1 at the same time, representing only last | ||
| 76 | reset cause. | ||
| 77 | |||
| 78 | The files are read only. | ||
| @@ -263,3 +263,8 @@ Description: Specific streaming header descriptors · 262 unmodified lines | |||
| 263 | is connected | 263 | is connected |
| 264 | bmInfo - capabilities of this video streaming | 264 | bmInfo - capabilities of this video streaming |
| 265 | interface | 265 | interface |
| 266 | |||
| 267 | What: /sys/class/udc/udc.name/device/gadget/video4linux/video.name/function_name | ||
| 268 | Date: May 2018 | ||
| 269 | KernelVersion: 4.19 | ||
| 270 | Description: UVC configfs function instance name | ||
| @@ -13,10 +13,11 @@ Contact: linuxppc-dev@lists.ozlabs.org · 12 unmodified lines | |||
| 13 | Description: Write an integer containing the size in bytes of the memory | 13 | Description: Write an integer containing the size in bytes of the memory |
| 14 | you want removed from each NUMA node to this file - it must be | 14 | you want removed from each NUMA node to this file - it must be |
| 15 | aligned to the memblock size. This amount of RAM will be removed | 15 | aligned to the memblock size. This amount of RAM will be removed |
| 16 | from the kernel mappings and the following debugfs files will be | 16 | from each NUMA node in the kernel mappings and the following |
| 17 | created. This can only be successfully done once per boot. Once | 17 | debugfs files will be created. Once memory is successfully |
| 18 | memory is successfully removed from each node, the following | 18 | removed from each node, the following files are created. To |
| 19 | files are created. | 19 | re-add memory to the kernel, echo 0 into this file (it will be |
| 20 | automatically onlined). | ||
| 20 | 21 | ||
| 21 | What: /sys/kernel/debug/powerpc/memtrace/<node-id> | 22 | What: /sys/kernel/debug/powerpc/memtrace/<node-id> |
| 22 | Date: Aug 2017 | 23 | Date: Aug 2017 |
| @@ -5,6 +5,7 @@ Description: · 4 unmodified lines | |||
| 5 | The /proc/diskstats file displays the I/O statistics | 5 | The /proc/diskstats file displays the I/O statistics |
| 6 | of block devices. Each line contains the following 14 | 6 | of block devices. Each line contains the following 14 |
| 7 | fields: | 7 | fields: |
| 8 | |||
| 8 | 1 - major number | 9 | 1 - major number |
| 9 | 2 - minor mumber | 10 | 2 - minor mumber |
| 10 | 3 - device name | 11 | 3 - device name |
| @@ -19,4 +20,13 @@ Description: · 8 unmodified lines | |||
| 19 | 12 - I/Os currently in progress | 20 | 12 - I/Os currently in progress |
| 20 | 13 - time spent doing I/Os (ms) | 21 | 13 - time spent doing I/Os (ms) |
| 21 | 14 - weighted time spent doing I/Os (ms) | 22 | 14 - weighted time spent doing I/Os (ms) |
| 23 | |||
| 24 | Kernel 4.18+ appends four more fields for discard | ||
| 25 | tracking putting the total at 18: | ||
| 26 | |||
| 27 | 15 - discards completed successfully | ||
| 28 | 16 - discards merged | ||
| 29 | 17 - sectors discarded | ||
| 30 | 18 - time spent discarding | ||
| 31 | |||
| 22 | For more details refer to Documentation/iostats.txt | 32 | For more details refer to Documentation/iostats.txt |
| @@ -83,3 +83,11 @@ KernelVersion: 4.7 · 82 unmodified lines | |||
| 83 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | 83 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> |
| 84 | Description: (R) Indicates the capabilities of the Coresight TMC. | 84 | Description: (R) Indicates the capabilities of the Coresight TMC. |
| 85 | The value is read directly from the DEVID register, 0xFC8, | 85 | The value is read directly from the DEVID register, 0xFC8, |
| 86 | |||
| 87 | What: /sys/bus/coresight/devices/<memory_map>.tmc/buffer_size | ||
| 88 | Date: December 2018 | ||
| 89 | KernelVersion: 4.19 | ||
| 90 | Contact: Mathieu Poirier <mathieu.poirier@linaro.org> | ||
| 91 | Description: (RW) Size of the trace buffer for TMC-ETR when used in SYSFS | ||
| 92 | mode. Writable only for TMC-ETR configurations. The value | ||
| 93 | should be aligned to the kernel pagesize. | ||
| @@ -197,6 +197,18 @@ Description: · 196 unmodified lines | |||
| 197 | Angle of rotation. Units after application of scale and offset | 197 | Angle of rotation. Units after application of scale and offset |
| 198 | are radians. | 198 | are radians. |
| 199 | 199 | ||
| 200 | What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_x_raw | ||
| 201 | What: /sys/bus/iio/devices/iio:deviceX/in_positionrelative_y_raw | ||
| 202 | KernelVersion: 4.18 | ||
| 203 | Contact: linux-iio@vger.kernel.org | ||
| 204 | Description: | ||
| 205 | Relative position in direction x or y on a pad (may be | ||
| 206 | arbitrarily assigned but should match other such assignments on | ||
| 207 | device). | ||
| 208 | Units after application of scale and offset are milli percents | ||
| 209 | from the pad's size in both directions. Should be calibrated by | ||
| 210 | the consumer. | ||
| 211 | |||
| 200 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_raw | 212 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_raw |
| 201 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_raw | 213 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_raw |
| 202 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_raw | 214 | What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_raw |
| @@ -1295,13 +1307,16 @@ What: /sys/.../iio:deviceX/in_intensityY_raw · 1092 unmodified lines | |||
| 1295 | What: /sys/.../iio:deviceX/in_intensityY_ir_raw | 1307 | What: /sys/.../iio:deviceX/in_intensityY_ir_raw |
| 1296 | What: /sys/.../iio:deviceX/in_intensityY_both_raw | 1308 | What: /sys/.../iio:deviceX/in_intensityY_both_raw |
| 1297 | What: /sys/.../iio:deviceX/in_intensityY_uv_raw | 1309 | What: /sys/.../iio:deviceX/in_intensityY_uv_raw |
| 1310 | What: /sys/.../iio:deviceX/in_intensityY_duv_raw | ||
| 1298 | KernelVersion: 3.4 | 1311 | KernelVersion: 3.4 |
| 1299 | Contact: linux-iio@vger.kernel.org | 1312 | Contact: linux-iio@vger.kernel.org |
| 1300 | Description: | 1313 | Description: |
| 1301 | Unit-less light intensity. Modifiers both and ir indicate | 1314 | Unit-less light intensity. Modifiers both and ir indicate |
| 1302 | that measurements contain visible and infrared light | 1315 | that measurements contain visible and infrared light |
| 1303 | components or just infrared light, respectively. Modifier uv indicates | 1316 | components or just infrared light, respectively. Modifier |
| 1304 | that measurements contain ultraviolet light components. | 1317 | uv indicates that measurements contain ultraviolet light |
| 1318 | components. Modifier duv indicates that measurements | ||
| 1319 | contain deep ultraviolet light components. | ||
| 1305 | 1320 | ||
| 1306 | What: /sys/.../iio:deviceX/in_uvindex_input | 1321 | What: /sys/.../iio:deviceX/in_uvindex_input |
| 1307 | KernelVersion: 4.6 | 1322 | KernelVersion: 4.6 |
| @@ -1663,3 +1678,10 @@ KernelVersion: 4.12 · 355 unmodified lines | |||
| 1663 | Contact: linux-iio@vger.kernel.org | 1678 | Contact: linux-iio@vger.kernel.org |
| 1664 | Description: | 1679 | Description: |
| 1665 | Raw counter device counters direction for channel Y. | 1680 | Raw counter device counters direction for channel Y. |
| 1681 | |||
| 1682 | What: /sys/bus/iio/devices/iio:deviceX/in_phaseY_raw | ||
| 1683 | KernelVersion: 4.18 | ||
| 1684 | Contact: linux-iio@vger.kernel.org | ||
| 1685 | Description: | ||
| 1686 | Raw (unscaled) phase difference reading from channel Y | ||
| 1687 | that can be processed to radians. | ||
| @@ -0,0 +1,47 @@ | |||
| 1 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_agc_gain | ||
| 2 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_agc_gain_bias | ||
| 3 | KernelVersion: 4.18 | ||
| 4 | Contact: linux-iio@vger.kernel.org | ||
| 5 | Description: | ||
| 6 | This sensor has an automatic gain control (agc) loop | ||
| 7 | which sets the analog signal levels at an optimum | ||
| 8 | level by controlling programmable gain amplifiers. The | ||
| 9 | criteria for optimal gain is determined by the sensor. | ||
| 10 | |||
| 11 | Return the actual gain value as an integer in [0; 65536] | ||
| 12 | range when read from. | ||
| 13 | |||
| 14 | The agc gain read when measuring crosstalk shall be | ||
| 15 | written into in_proximity0_agc_gain_bias. | ||
| 16 | |||
| 17 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calib_phase_temp_a | ||
| 18 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calib_phase_temp_b | ||
| 19 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calib_phase_light_a | ||
| 20 | What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calib_phase_light_b | ||
| 21 | KernelVersion: 4.18 | ||
| 22 | Contact: linux-iio@vger.kernel.org | ||
| 23 | Description: | ||
| 24 | The sensor is able to perform correction of distance | ||
| 25 | measurements due to changing temperature and ambient | ||
| 26 | light conditions. It can be programmed to correct for | ||
| 27 | a second order error polynomial. | ||
| 28 | |||
| 29 | Phase data has to be collected when temperature and | ||
| 30 | ambient light are modulated independently. | ||
| 31 | |||
| 32 | Then a least squares curve fit to a second order | ||
| 33 | polynomial has to be generated from the data. The | ||
| 34 | resultant curves have the form ax^2 + bx + c. | ||
| 35 | |||
| 36 | From those two curves, a and b coefficients shall be | ||
| 37 | stored in in_proximity0_calib_phase_temp_a and | ||
| 38 | in_proximity0_calib_phase_temp_b for temperature and | ||
| 39 | in in_proximity0_calib_phase_light_a and | ||
| 40 | in_proximity0_calib_phase_light_b for ambient light. | ||
| 41 | |||
| 42 | Those values must be integer in [0; 8355840] range. | ||
| 43 | |||
| 44 | Finally, the c constant is set by the sensor | ||
| 45 | internally. | ||
| 46 | |||
| 47 | The value stored in sensor is displayed when read from. | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | What: /sys/bus/iio/devices/iio:deviceX/in_intensity_ir_small_raw | ||
| 2 | KernelVersion: 4.18 | ||
| 3 | Contact: linux-iio@vger.kernel.org | ||
| 4 | Description: | ||
| 5 | Unit-less infrared intensity. The intensity is measured from 1 | ||
| 6 | dark photodiode. "small" indicate the surface area capturing | ||
| 7 | infrared. | ||
| 8 | |||
| 9 | What: /sys/bus/iio/devices/iio:deviceX/in_intensity_ir_large_raw | ||
| 10 | KernelVersion: 4.18 | ||
| 11 | Contact: linux-iio@vger.kernel.org | ||
| 12 | Description: | ||
| 13 | Unit-less infrared intensity. The intensity is measured from 4 | ||
| 14 | dark photodiodes. "large" indicate the surface area capturing | ||
| 15 | infrared. | ||
| 16 | |||
| 17 | What: /sys/bus/iio/devices/iio:deviceX/in_intensity_large_raw | ||
| 18 | KernelVersion: 4.18 | ||
| 19 | Contact: linux-iio@vger.kernel.org | ||
| 20 | Description: | ||
| 21 | Unit-less light intensity with more diodes. | ||
| 22 | |||
| @@ -0,0 +1,122 @@ | |||
| 1 | ========================== | ||
| 2 | PCIe Device AER statistics | ||
| 3 | ========================== | ||
| 4 | These attributes show up under all the devices that are AER capable. These | ||
| 5 | statistical counters indicate the errors "as seen/reported by the device". | ||
| 6 | Note that this may mean that if an endpoint is causing problems, the AER | ||
| 7 | counters may increment at its link partner (e.g. root port) because the | ||
| 8 | errors may be "seen" / reported by the link partner and not the | ||
| 9 | problematic endpoint itself (which may report all counters as 0 as it never | ||
| 10 | saw any problems). | ||
| 11 | |||
| 12 | Where: /sys/bus/pci/devices/<dev>/aer_dev_correctable | ||
| 13 | Date: July 2018 | ||
| 14 | Kernel Version: 4.19.0 | ||
| 15 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 16 | Description: List of correctable errors seen and reported by this | ||
| 17 | PCI device using ERR_COR. Note that since multiple errors may | ||
| 18 | be reported using a single ERR_COR message, thus | ||
| 19 | TOTAL_ERR_COR at the end of the file may not match the actual | ||
| 20 | total of all the errors in the file. Sample output: | ||
| 21 | ------------------------------------------------------------------------- | ||
| 22 | localhost /sys/devices/pci0000:00/0000:00:1c.0 # cat aer_dev_correctable | ||
| 23 | Receiver Error 2 | ||
| 24 | Bad TLP 0 | ||
| 25 | Bad DLLP 0 | ||
| 26 | RELAY_NUM Rollover 0 | ||
| 27 | Replay Timer Timeout 0 | ||
| 28 | Advisory Non-Fatal 0 | ||
| 29 | Corrected Internal Error 0 | ||
| 30 | Header Log Overflow 0 | ||
| 31 | TOTAL_ERR_COR 2 | ||
| 32 | ------------------------------------------------------------------------- | ||
| 33 | |||
| 34 | Where: /sys/bus/pci/devices/<dev>/aer_dev_fatal | ||
| 35 | Date: July 2018 | ||
| 36 | Kernel Version: 4.19.0 | ||
| 37 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 38 | Description: List of uncorrectable fatal errors seen and reported by this | ||
| 39 | PCI device using ERR_FATAL. Note that since multiple errors may | ||
| 40 | be reported using a single ERR_FATAL message, thus | ||
| 41 | TOTAL_ERR_FATAL at the end of the file may not match the actual | ||
| 42 | total of all the errors in the file. Sample output: | ||
| 43 | ------------------------------------------------------------------------- | ||
| 44 | localhost /sys/devices/pci0000:00/0000:00:1c.0 # cat aer_dev_fatal | ||
| 45 | Undefined 0 | ||
| 46 | Data Link Protocol 0 | ||
| 47 | Surprise Down Error 0 | ||
| 48 | Poisoned TLP 0 | ||
| 49 | Flow Control Protocol 0 | ||
| 50 | Completion Timeout 0 | ||
| 51 | Completer Abort 0 | ||
| 52 | Unexpected Completion 0 | ||
| 53 | Receiver Overflow 0 | ||
| 54 | Malformed TLP 0 | ||
| 55 | ECRC 0 | ||
| 56 | Unsupported Request 0 | ||
| 57 | ACS Violation 0 | ||
| 58 | Uncorrectable Internal Error 0 | ||
| 59 | MC Blocked TLP 0 | ||
| 60 | AtomicOp Egress Blocked 0 | ||
| 61 | TLP Prefix Blocked Error 0 | ||
| 62 | TOTAL_ERR_FATAL 0 | ||
| 63 | ------------------------------------------------------------------------- | ||
| 64 | |||
| 65 | Where: /sys/bus/pci/devices/<dev>/aer_dev_nonfatal | ||
| 66 | Date: July 2018 | ||
| 67 | Kernel Version: 4.19.0 | ||
| 68 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 69 | Description: List of uncorrectable nonfatal errors seen and reported by this | ||
| 70 | PCI device using ERR_NONFATAL. Note that since multiple errors | ||
| 71 | may be reported using a single ERR_FATAL message, thus | ||
| 72 | TOTAL_ERR_NONFATAL at the end of the file may not match the | ||
| 73 | actual total of all the errors in the file. Sample output: | ||
| 74 | ------------------------------------------------------------------------- | ||
| 75 | localhost /sys/devices/pci0000:00/0000:00:1c.0 # cat aer_dev_nonfatal | ||
| 76 | Undefined 0 | ||
| 77 | Data Link Protocol 0 | ||
| 78 | Surprise Down Error 0 | ||
| 79 | Poisoned TLP 0 | ||
| 80 | Flow Control Protocol 0 | ||
| 81 | Completion Timeout 0 | ||
| 82 | Completer Abort 0 | ||
| 83 | Unexpected Completion 0 | ||
| 84 | Receiver Overflow 0 | ||
| 85 | Malformed TLP 0 | ||
| 86 | ECRC 0 | ||
| 87 | Unsupported Request 0 | ||
| 88 | ACS Violation 0 | ||
| 89 | Uncorrectable Internal Error 0 | ||
| 90 | MC Blocked TLP 0 | ||
| 91 | AtomicOp Egress Blocked 0 | ||
| 92 | TLP Prefix Blocked Error 0 | ||
| 93 | TOTAL_ERR_NONFATAL 0 | ||
| 94 | ------------------------------------------------------------------------- | ||
| 95 | |||
| 96 | ============================ | ||
| 97 | PCIe Rootport AER statistics | ||
| 98 | ============================ | ||
| 99 | These attributes show up under only the rootports (or root complex event | ||
| 100 | collectors) that are AER capable. These indicate the number of error messages as | ||
| 101 | "reported to" the rootport. Please note that the rootports also transmit | ||
| 102 | (internally) the ERR_* messages for errors seen by the internal rootport PCI | ||
| 103 | device, so these counters include them and are thus cumulative of all the error | ||
| 104 | messages on the PCI hierarchy originating at that root port. | ||
| 105 | |||
| 106 | Where: /sys/bus/pci/devices/<dev>/aer_stats/aer_rootport_total_err_cor | ||
| 107 | Date: July 2018 | ||
| 108 | Kernel Version: 4.19.0 | ||
| 109 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 110 | Description: Total number of ERR_COR messages reported to rootport. | ||
| 111 | |||
| 112 | Where: /sys/bus/pci/devices/<dev>/aer_stats/aer_rootport_total_err_fatal | ||
| 113 | Date: July 2018 | ||
| 114 | Kernel Version: 4.19.0 | ||
| 115 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 116 | Description: Total number of ERR_FATAL messages reported to rootport. | ||
| 117 | |||
| 118 | Where: /sys/bus/pci/devices/<dev>/aer_stats/aer_rootport_total_err_nonfatal | ||
| 119 | Date: July 2018 | ||
| 120 | Kernel Version: 4.19.0 | ||
| 121 | Contact: linux-pci@vger.kernel.org, rajatja@google.com | ||
| 122 | Description: Total number of ERR_NONFATAL messages reported to rootport. | ||
| @@ -0,0 +1,51 @@ | |||
| 1 | What: /sys/bus/typec/devices/.../active | ||
| 2 | Date: July 2018 | ||
| 3 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 4 | Description: | ||
| 5 | Shows if the mode is active or not. The attribute can be used | ||
| 6 | for entering/exiting the mode. Entering/exiting modes is | ||
| 7 | supported as synchronous operation so write(2) to the attribute | ||
| 8 | does not return until the enter/exit mode operation has | ||
| 9 | finished. The attribute is notified when the mode is | ||
| 10 | entered/exited so poll(2) on the attribute wakes up. | ||
| 11 | Entering/exiting a mode will also generate uevent KOBJ_CHANGE. | ||
| 12 | |||
| 13 | Valid values are boolean. | ||
| 14 | |||
| 15 | What: /sys/bus/typec/devices/.../description | ||
| 16 | Date: July 2018 | ||
| 17 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 18 | Description: | ||
| 19 | Shows description of the mode. The description is optional for | ||
| 20 | the drivers, just like with the Billboard Devices. | ||
| 21 | |||
| 22 | What: /sys/bus/typec/devices/.../mode | ||
| 23 | Date: July 2018 | ||
| 24 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 25 | Description: | ||
| 26 | The index number of the mode returned by Discover Modes USB | ||
| 27 | Power Delivery command. Depending on the alternate mode, the | ||
| 28 | mode index may be significant. | ||
| 29 | |||
| 30 | With some alternate modes (SVIDs), the mode index is assigned | ||
| 31 | for specific functionality in the specification for that | ||
| 32 | alternate mode. | ||
| 33 | |||
| 34 | With other alternate modes, the mode index values are not | ||
| 35 | assigned, and can not be therefore used for identification. When | ||
| 36 | the mode index is not assigned, identifying the alternate mode | ||
| 37 | must be done with either mode VDO or the description. | ||
| 38 | |||
| 39 | What: /sys/bus/typec/devices/.../svid | ||
| 40 | Date: July 2018 | ||
| 41 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 42 | Description: | ||
| 43 | The Standard or Vendor ID (SVID) assigned by USB-IF for this | ||
| 44 | alternate mode. | ||
| 45 | |||
| 46 | What: /sys/bus/typec/devices/.../vdo | ||
| 47 | Date: July 2018 | ||
| 48 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 49 | Description: | ||
| 50 | Shows the VDO in hexadecimal returned by Discover Modes command | ||
| 51 | for this mode. | ||
| @@ -35,3 +35,27 @@ Description: Read fpga manager state as a string. · 34 unmodified lines | |||
| 35 | * write complete = Doing post programming steps | 35 | * write complete = Doing post programming steps |
| 36 | * write complete error = Error while doing post programming | 36 | * write complete error = Error while doing post programming |
| 37 | * operating = FPGA is programmed and operating | 37 | * operating = FPGA is programmed and operating |
| 38 | |||
| 39 | What: /sys/class/fpga_manager/<fpga>/status | ||
| 40 | Date: June 2018 | ||
| 41 | KernelVersion: 4.19 | ||
| 42 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 43 | Description: Read fpga manager status as a string. | ||
| 44 | If FPGA programming operation fails, it could be caused by crc | ||
| 45 | error or incompatible bitstream image. The intent of this | ||
| 46 | interface is to provide more detailed information for FPGA | ||
| 47 | programming errors to userspace. This is a list of strings for | ||
| 48 | the supported status. | ||
| 49 | |||
| 50 | * reconfig operation error - invalid operations detected by | ||
| 51 | reconfiguration hardware. | ||
| 52 | e.g. start reconfiguration | ||
| 53 | with errors not cleared | ||
| 54 | * reconfig CRC error - CRC error detected by | ||
| 55 | reconfiguration hardware. | ||
| 56 | * reconfig incompatible image - reconfiguration image is | ||
| 57 | incompatible with hardware | ||
| 58 | * reconfig IP protocol error - protocol errors detected by | ||
| 59 | reconfiguration hardware | ||
| 60 | * reconfig fifo overflow error - FIFO overflow detected by | ||
| 61 | reconfiguration hardware | ||
| @@ -0,0 +1,9 @@ | |||
| 1 | What: /sys/class/fpga_region/<region>/compat_id | ||
| 2 | Date: June 2018 | ||
| 3 | KernelVersion: 4.19 | ||
| 4 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 5 | Description: FPGA region id for compatibility check, e.g. compatibility | ||
| 6 | of the FPGA reconfiguration hardware and image. This value | ||
| 7 | is defined or calculated by the layer that is creating the | ||
| 8 | FPGA region. This interface returns the compat_id value or | ||
| 9 | just error code -ENOENT in case compat_id is not used. | ||
| @@ -0,0 +1,15 @@ | |||
| 1 | What: /sys/class/gnss/gnssN/type | ||
| 2 | Date: May 2018 | ||
| 3 | KernelVersion: 4.18 | ||
| 4 | Contact: Johan Hovold <johan@kernel.org> | ||
| 5 | Description: | ||
| 6 | The GNSS receiver type. The currently identified types reflect | ||
| 7 | the protocol(s) supported by the receiver: | ||
| 8 | |||
| 9 | "NMEA" NMEA 0183 | ||
| 10 | "SiRF" SiRF Binary | ||
| 11 | "UBX" UBX | ||
| 12 | |||
| 13 | Note that also non-"NMEA" type receivers typically support a | ||
| 14 | subset of NMEA 0183 with vendor extensions (e.g. to allow | ||
| 15 | switching to a vendor protocol). | ||
| @@ -54,3 +54,14 @@ Description: Configure tx queue limit · 53 unmodified lines | |||
| 54 | 54 | ||
| 55 | Set maximal number of pending writes | 55 | Set maximal number of pending writes |
| 56 | per opened session. | 56 | per opened session. |
| 57 | |||
| 58 | What: /sys/class/mei/meiN/fw_ver | ||
| 59 | Date: May 2018 | ||
| 60 | KernelVersion: 4.18 | ||
| 61 | Contact: Tomas Winkler <tomas.winkler@intel.com> | ||
| 62 | Description: Display the ME firmware version. | ||
| 63 | |||
| 64 | The version of the platform ME firmware is in format: | ||
| 65 | <platform>:<major>.<minor>.<milestone>.<build_no>. | ||
| 66 | There can be up to three such blocks for different | ||
| 67 | FW components. | ||
| @@ -42,6 +42,17 @@ Description: · 41 unmodified lines | |||
| 42 | network device transmit queue. Possible vaules depend on the | 42 | network device transmit queue. Possible vaules depend on the |
| 43 | number of available CPU(s) in the system. | 43 | number of available CPU(s) in the system. |
| 44 | 44 | ||
| 45 | What: /sys/class/<iface>/queues/tx-<queue>/xps_rxqs | ||
| 46 | Date: June 2018 | ||
| 47 | KernelVersion: 4.18.0 | ||
| 48 | Contact: netdev@vger.kernel.org | ||
| 49 | Description: | ||
| 50 | Mask of the receive queue(s) currently enabled to participate | ||
| 51 | into the Transmit Packet Steering packet processing flow for this | ||
| 52 | network device transmit queue. Possible values depend on the | ||
| 53 | number of available receive queue(s) in the network device. | ||
| 54 | Default is disabled. | ||
| 55 | |||
| 45 | What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time | 56 | What: /sys/class/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time |
| 46 | Date: November 2011 | 57 | Date: November 2011 |
| 47 | KernelVersion: 3.3 | 58 | KernelVersion: 3.3 |
| @@ -222,70 +222,12 @@ Description: · 221 unmodified lines | |||
| 222 | available. The value can be polled. | 222 | available. The value can be polled. |
| 223 | 223 | ||
| 224 | 224 | ||
| 225 | Alternate Mode devices. | 225 | USB Type-C port alternate mode devices. |
| 226 | 226 | ||
| 227 | The alternate modes will have Standard or Vendor ID (SVID) assigned by USB-IF. | 227 | What: /sys/class/typec/<port>/<alt mode>/supported_roles |
| 228 | The ports, partners and cable plugs can have alternate modes. A supported SVID | ||
| 229 | will consist of a set of modes. Every SVID a port/partner/plug supports will | ||
| 230 | have a device created for it, and every supported mode for a supported SVID will | ||
| 231 | have its own directory under that device. Below <dev> refers to the device for | ||
| 232 | the alternate mode. | ||
| 233 | |||
| 234 | What: /sys/class/typec/<port|partner|cable>/<dev>/svid | ||
| 235 | Date: April 2017 | ||
| 236 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 237 | Description: | ||
| 238 | The SVID (Standard or Vendor ID) assigned by USB-IF for this | ||
| 239 | alternate mode. | ||
| 240 | |||
| 241 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/ | ||
| 242 | Date: April 2017 | ||
| 243 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 244 | Description: | ||
| 245 | Every supported mode will have its own directory. The name of | ||
| 246 | a mode will be "mode<index>" (for example mode1), where <index> | ||
| 247 | is the actual index to the mode VDO returned by Discover Modes | ||
| 248 | USB power delivery command. | ||
| 249 | |||
| 250 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/description | ||
| 251 | Date: April 2017 | ||
| 252 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 253 | Description: | ||
| 254 | Shows description of the mode. The description is optional for | ||
| 255 | the drivers, just like with the Billboard Devices. | ||
| 256 | |||
| 257 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/vdo | ||
| 258 | Date: April 2017 | ||
| 259 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 260 | Description: | ||
| 261 | Shows the VDO in hexadecimal returned by Discover Modes command | ||
| 262 | for this mode. | ||
| 263 | |||
| 264 | What: /sys/class/typec/<port|partner|cable>/<dev>/mode<index>/active | ||
| 265 | Date: April 2017 | ||
| 266 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 267 | Description: | ||
| 268 | Shows if the mode is active or not. The attribute can be used | ||
| 269 | for entering/exiting the mode with partners and cable plugs, and | ||
| 270 | with the port alternate modes it can be used for disabling | ||
| 271 | support for specific alternate modes. Entering/exiting modes is | ||
| 272 | supported as synchronous operation so write(2) to the attribute | ||
| 273 | does not return until the enter/exit mode operation has | ||
| 274 | finished. The attribute is notified when the mode is | ||
| 275 | entered/exited so poll(2) on the attribute wakes up. | ||
| 276 | Entering/exiting a mode will also generate uevent KOBJ_CHANGE. | ||
| 277 | |||
| 278 | Valid values: yes, no | ||
| 279 | |||
| 280 | What: /sys/class/typec/<port>/<dev>/mode<index>/supported_roles | ||
| 281 | Date: April 2017 | 228 | Date: April 2017 |
| 282 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | 229 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> |
| 283 | Description: | 230 | Description: |
| 284 | Space separated list of the supported roles. | 231 | Space separated list of the supported roles. |
| 285 | 232 | ||
| 286 | This attribute is available for the devices describing the | ||
| 287 | alternate modes a port supports, and it will not be exposed with | ||
| 288 | the devices presenting the alternate modes the partners or cable | ||
| 289 | plugs support. | ||
| 290 | |||
| 291 | Valid values: source, sink | 233 | Valid values: source, sink |
| @@ -476,6 +476,7 @@ What: /sys/devices/system/cpu/vulnerabilities · 475 unmodified lines | |||
| 476 | /sys/devices/system/cpu/vulnerabilities/spectre_v1 | 476 | /sys/devices/system/cpu/vulnerabilities/spectre_v1 |
| 477 | /sys/devices/system/cpu/vulnerabilities/spectre_v2 | 477 | /sys/devices/system/cpu/vulnerabilities/spectre_v2 |
| 478 | /sys/devices/system/cpu/vulnerabilities/spec_store_bypass | 478 | /sys/devices/system/cpu/vulnerabilities/spec_store_bypass |
| 479 | /sys/devices/system/cpu/vulnerabilities/l1tf | ||
| 479 | Date: January 2018 | 480 | Date: January 2018 |
| 480 | Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> | 481 | Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> |
| 481 | Description: Information about CPU vulnerabilities | 482 | Description: Information about CPU vulnerabilities |
| @@ -487,3 +488,26 @@ Description: Information about CPU vulnerabilities · 5 unmodified lines | |||
| 487 | "Not affected" CPU is not affected by the vulnerability | 488 | "Not affected" CPU is not affected by the vulnerability |
| 488 | "Vulnerable" CPU is affected and no mitigation in effect | 489 | "Vulnerable" CPU is affected and no mitigation in effect |
| 489 | "Mitigation: $M" CPU is affected and mitigation $M is in effect | 490 | "Mitigation: $M" CPU is affected and mitigation $M is in effect |
| 491 | |||
| 492 | Details about the l1tf file can be found in | ||
| 493 | Documentation/admin-guide/l1tf.rst | ||
| 494 | |||
| 495 | What: /sys/devices/system/cpu/smt | ||
| 496 | /sys/devices/system/cpu/smt/active | ||
| 497 | /sys/devices/system/cpu/smt/control | ||
| 498 | Date: June 2018 | ||
| 499 | Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org> | ||
| 500 | Description: Control Symetric Multi Threading (SMT) | ||
| 501 | |||
| 502 | active: Tells whether SMT is active (enabled and siblings online) | ||
| 503 | |||
| 504 | control: Read/write interface to control SMT. Possible | ||
| 505 | values: | ||
| 506 | |||
| 507 | "on" SMT is enabled | ||
| 508 | "off" SMT is disabled | ||
| 509 | "forceoff" SMT is force disabled. Cannot be changed. | ||
| 510 | "notsupported" SMT is not supported by the CPU | ||
| 511 | |||
| 512 | If control status is "forceoff" or "notsupported" writes | ||
| 513 | are rejected. | ||
| @@ -0,0 +1,27 @@ | |||
| 1 | What: /sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode | ||
| 2 | Date: Jul 2018 | ||
| 3 | KernelVersion: 4.19 | ||
| 4 | Contact: Geert Uytterhoeven <geert+renesas@glider.be> | ||
| 5 | Description: Read/write the current state of DDR Backup Mode, which controls | ||
| 6 | if DDR power rails will be kept powered during system suspend. | ||
| 7 | ("on"/"1" = enabled, "off"/"0" = disabled). | ||
| 8 | Two types of power switches (or control signals) can be used: | ||
| 9 | A. With a momentary power switch (or pulse signal), DDR | ||
| 10 | Backup Mode is enabled by default when available, as the | ||
| 11 | PMIC will be configured only during system suspend. | ||
| 12 | B. With a toggle power switch (or level signal), the | ||
| 13 | following steps must be followed exactly: | ||
| 14 | 1. Configure PMIC for backup mode, to change the role of | ||
| 15 | the accessory power switch from a power switch to a | ||
| 16 | wake-up switch, | ||
| 17 | 2. Switch accessory power switch off, to prepare for | ||
| 18 | system suspend, which is a manual step not controlled | ||
| 19 | by software, | ||
| 20 | 3. Suspend system, | ||
| 21 | 4. Switch accessory power switch on, to resume the | ||
| 22 | system. | ||
| 23 | DDR Backup Mode must be explicitly enabled by the user, | ||
| 24 | to invoke step 1. | ||
| 25 | See also Documentation/devicetree/bindings/mfd/bd9571mwv.txt. | ||
| 26 | Users: User space applications for embedded boards equipped with a | ||
| 27 | BD9571MWV PMIC. | ||
| @@ -0,0 +1,49 @@ | |||
| 1 | What: /sys/bus/typec/devices/.../displayport/configuration | ||
| 2 | Date: July 2018 | ||
| 3 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 4 | Description: | ||
| 5 | Shows the current DisplayPort configuration for the connector. | ||
| 6 | Valid values are USB, source and sink. Source means DisplayPort | ||
| 7 | source, and sink means DisplayPort sink. | ||
| 8 | |||
| 9 | All supported configurations are listed as space separated list | ||
| 10 | with the active one wrapped in square brackets. | ||
| 11 | |||
| 12 | Source example: | ||
| 13 | |||
| 14 | USB [source] sink | ||
| 15 | |||
| 16 | The configuration can be changed by writing to the file | ||
| 17 | |||
| 18 | Note. USB configuration does not equal to Exit Mode. It is | ||
| 19 | separate configuration defined in VESA DisplayPort Alt Mode on | ||
| 20 | USB Type-C Standard. Functionally it equals to the situation | ||
| 21 | where the mode has been exited (to exit the mode, see | ||
| 22 | Documentation/ABI/testing/sysfs-bus-typec, and use file | ||
| 23 | /sys/bus/typec/devices/.../active). | ||
| 24 | |||
| 25 | What: /sys/bus/typec/devices/.../displayport/pin_assignment | ||
| 26 | Date: July 2018 | ||
| 27 | Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com> | ||
| 28 | Description: | ||
| 29 | VESA DisplayPort Alt Mode on USB Type-C Standard defines six | ||
| 30 | different pin assignments for USB Type-C connector that are | ||
| 31 | labeled A, B, C, D, E, and F. The supported pin assignments are | ||
| 32 | listed as space separated list with the active one wrapped in | ||
| 33 | square brackets. | ||
| 34 | |||
| 35 | Example: | ||
| 36 | |||
| 37 | C [D] | ||
| 38 | |||
| 39 | Pin assignment can be changed by writing to the file. It is | ||
| 40 | possible to set pin assignment before configuration has been | ||
| 41 | set, but the assignment will not be active before the | ||
| 42 | connector is actually configured. | ||
| 43 | |||
| 44 | Note. As of VESA DisplayPort Alt Mode on USB Type-C Standard | ||
| 45 | version 1.0b, pin assignments A, B, and F are deprecated. Only | ||
| 46 | pin assignment D can now carry simultaneously one channel of | ||
| 47 | USB SuperSpeed protocol. From user perspective pin assignments C | ||
| 48 | and E are equal, where all channels on the connector are used | ||
| 49 | for carrying DisplayPort protocol (allowing higher resolutions). | ||
| @@ -51,6 +51,14 @@ Description: · 50 unmodified lines | |||
| 51 | Controls the dirty page count condition for the in-place-update | 51 | Controls the dirty page count condition for the in-place-update |
| 52 | policies. | 52 | policies. |
| 53 | 53 | ||
| 54 | What: /sys/fs/f2fs/<disk>/min_seq_blocks | ||
| 55 | Date: August 2018 | ||
| 56 | Contact: "Jaegeuk Kim" <jaegeuk@kernel.org> | ||
| 57 | Description: | ||
| 58 | Controls the dirty page count condition for batched sequential | ||
| 59 | writes in ->writepages. | ||
| 60 | |||
| 61 | |||
| 54 | What: /sys/fs/f2fs/<disk>/min_hot_blocks | 62 | What: /sys/fs/f2fs/<disk>/min_hot_blocks |
| 55 | Date: March 2017 | 63 | Date: March 2017 |
| 56 | Contact: "Jaegeuk Kim" <jaegeuk@kernel.org> | 64 | Contact: "Jaegeuk Kim" <jaegeuk@kernel.org> |
| @@ -0,0 +1,23 @@ | |||
| 1 | What: /sys/bus/platform/devices/dfl-fme.0/ports_num | ||
| 2 | Date: June 2018 | ||
| 3 | KernelVersion: 4.19 | ||
| 4 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 5 | Description: Read-only. One DFL FPGA device may have more than 1 | ||
| 6 | port/Accelerator Function Unit (AFU). It returns the | ||
| 7 | number of ports on the FPGA device when read it. | ||
| 8 | |||
| 9 | What: /sys/bus/platform/devices/dfl-fme.0/bitstream_id | ||
| 10 | Date: June 2018 | ||
| 11 | KernelVersion: 4.19 | ||
| 12 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 13 | Description: Read-only. It returns Bitstream (static FPGA region) | ||
| 14 | identifier number, which includes the detailed version | ||
| 15 | and other information of this static FPGA region. | ||
| 16 | |||
| 17 | What: /sys/bus/platform/devices/dfl-fme.0/bitstream_metadata | ||
| 18 | Date: June 2018 | ||
| 19 | KernelVersion: 4.19 | ||
| 20 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 21 | Description: Read-only. It returns Bitstream (static FPGA region) meta | ||
| 22 | data, which includes the synthesis date, seed and other | ||
| 23 | information of this static FPGA region. | ||
| @@ -0,0 +1,16 @@ | |||
| 1 | What: /sys/bus/platform/devices/dfl-port.0/id | ||
| 2 | Date: June 2018 | ||
| 3 | KernelVersion: 4.19 | ||
| 4 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 5 | Description: Read-only. It returns id of this port. One DFL FPGA device | ||
| 6 | may have more than one port. Userspace could use this id to | ||
| 7 | distinguish different ports under same FPGA device. | ||
| 8 | |||
| 9 | What: /sys/bus/platform/devices/dfl-port.0/afu_id | ||
| 10 | Date: June 2018 | ||
| 11 | KernelVersion: 4.19 | ||
| 12 | Contact: Wu Hao <hao.wu@intel.com> | ||
| 13 | Description: Read-only. User can program different PR bitstreams to FPGA | ||
| 14 | Accelerator Function Unit (AFU) for different functions. It | ||
| 15 | returns uuid which could be used to identify which PR bitstream | ||
| 16 | is programmed in this AFU. | ||
| @@ -1,5 +1,7 @@ | |||
| 1 | 00-INDEX | 1 | 00-INDEX |
| 2 | - this file | 2 | - this file |
| 3 | acpi-info.txt | ||
| 4 | - info on how PCI host bridges are represented in ACPI | ||
| 3 | MSI-HOWTO.txt | 5 | MSI-HOWTO.txt |
| 4 | - the Message Signaled Interrupts (MSI) Driver Guide HOWTO and FAQ. | 6 | - the Message Signaled Interrupts (MSI) Driver Guide HOWTO and FAQ. |
| 5 | PCIEBUS-HOWTO.txt | 7 | PCIEBUS-HOWTO.txt |
| @@ -0,0 +1,187 @@ | |||
| 1 | ACPI considerations for PCI host bridges | ||
| 2 | |||
| 3 | The general rule is that the ACPI namespace should describe everything the | ||
| 4 | OS might use unless there's another way for the OS to find it [1, 2]. | ||
| 5 | |||
| 6 | For example, there's no standard hardware mechanism for enumerating PCI | ||
| 7 | host bridges, so the ACPI namespace must describe each host bridge, the | ||
| 8 | method for accessing PCI config space below it, the address space windows | ||
| 9 | the host bridge forwards to PCI (using _CRS), and the routing of legacy | ||
| 10 | INTx interrupts (using _PRT). | ||
| 11 | |||
| 12 | PCI devices, which are below the host bridge, generally do not need to be | ||
| 13 | described via ACPI. The OS can discover them via the standard PCI | ||
| 14 | enumeration mechanism, using config accesses to discover and identify | ||
| 15 | devices and read and size their BARs. However, ACPI may describe PCI | ||
| 16 | devices if it provides power management or hotplug functionality for them | ||
| 17 | or if the device has INTx interrupts connected by platform interrupt | ||
| 18 | controllers and a _PRT is needed to describe those connections. | ||
| 19 | |||
| 20 | ACPI resource description is done via _CRS objects of devices in the ACPI | ||
| 21 | namespace [2]. The _CRS is like a generalized PCI BAR: the OS can read | ||
| 22 | _CRS and figure out what resource is being consumed even if it doesn't have | ||
| 23 | a driver for the device [3]. That's important because it means an old OS | ||
| 24 | can work correctly even on a system with new devices unknown to the OS. | ||
| 25 | The new devices might not do anything, but the OS can at least make sure no | ||
| 26 | resources conflict with them. | ||
| 27 | |||
| 28 | Static tables like MCFG, HPET, ECDT, etc., are *not* mechanisms for | ||
| 29 | reserving address space. The static tables are for things the OS needs to | ||
| 30 | know early in boot, before it can parse the ACPI namespace. If a new table | ||
| 31 | is defined, an old OS needs to operate correctly even though it ignores the | ||
| 32 | table. _CRS allows that because it is generic and understood by the old | ||
| 33 | OS; a static table does not. | ||
| 34 | |||
| 35 | If the OS is expected to manage a non-discoverable device described via | ||
| 36 | ACPI, that device will have a specific _HID/_CID that tells the OS what | ||
| 37 | driver to bind to it, and the _CRS tells the OS and the driver where the | ||
| 38 | device's registers are. | ||
| 39 | |||
| 40 | PCI host bridges are PNP0A03 or PNP0A08 devices. Their _CRS should | ||
| 41 | describe all the address space they consume. This includes all the windows | ||
| 42 | they forward down to the PCI bus, as well as registers of the host bridge | ||
| 43 | itself that are not forwarded to PCI. The host bridge registers include | ||
| 44 | things like secondary/subordinate bus registers that determine the bus | ||
| 45 | range below the bridge, window registers that describe the apertures, etc. | ||
| 46 | These are all device-specific, non-architected things, so the only way a | ||
| 47 | PNP0A03/PNP0A08 driver can manage them is via _PRS/_CRS/_SRS, which contain | ||
| 48 | the device-specific details. The host bridge registers also include ECAM | ||
| 49 | space, since it is consumed by the host bridge. | ||
| 50 | |||
| 51 | ACPI defines a Consumer/Producer bit to distinguish the bridge registers | ||
| 52 | ("Consumer") from the bridge apertures ("Producer") [4, 5], but early | ||
| 53 | BIOSes didn't use that bit correctly. The result is that the current ACPI | ||
| 54 | spec defines Consumer/Producer only for the Extended Address Space | ||
| 55 | descriptors; the bit should be ignored in the older QWord/DWord/Word | ||
| 56 | Address Space descriptors. Consequently, OSes have to assume all | ||
| 57 | QWord/DWord/Word descriptors are windows. | ||
| 58 | |||
| 59 | Prior to the addition of Extended Address Space descriptors, the failure of | ||
| 60 | Consumer/Producer meant there was no way to describe bridge registers in | ||
| 61 | the PNP0A03/PNP0A08 device itself. The workaround was to describe the | ||
| 62 | bridge registers (including ECAM space) in PNP0C02 catch-all devices [6]. | ||
| 63 | With the exception of ECAM, the bridge register space is device-specific | ||
| 64 | anyway, so the generic PNP0A03/PNP0A08 driver (pci_root.c) has no need to | ||
| 65 | know about it. | ||
| 66 | |||
| 67 | New architectures should be able to use "Consumer" Extended Address Space | ||
| 68 | descriptors in the PNP0A03 device for bridge registers, including ECAM, | ||
| 69 | although a strict interpretation of [6] might prohibit this. Old x86 and | ||
| 70 | ia64 kernels assume all address space descriptors, including "Consumer" | ||
| 71 | Extended Address Space ones, are windows, so it would not be safe to | ||
| 72 | describe bridge registers this way on those architectures. | ||
| 73 | |||
| 74 | PNP0C02 "motherboard" devices are basically a catch-all. There's no | ||
| 75 | programming model for them other than "don't use these resources for | ||
| 76 | anything else." So a PNP0C02 _CRS should claim any address space that is | ||
| 77 | (1) not claimed by _CRS under any other device object in the ACPI namespace | ||
| 78 | and (2) should not be assigned by the OS to something else. | ||
| 79 | |||
| 80 | The PCIe spec requires the Enhanced Configuration Access Method (ECAM) | ||
| 81 | unless there's a standard firmware interface for config access, e.g., the | ||
| 82 | ia64 SAL interface [7]. A host bridge consumes ECAM memory address space | ||
| 83 | and converts memory accesses into PCI configuration accesses. The spec | ||
| 84 | defines the ECAM address space layout and functionality; only the base of | ||
| 85 | the address space is device-specific. An ACPI OS learns the base address | ||
| 86 | from either the static MCFG table or a _CBA method in the PNP0A03 device. | ||
| 87 | |||
| 88 | The MCFG table must describe the ECAM space of non-hot pluggable host | ||
| 89 | bridges [8]. Since MCFG is a static table and can't be updated by hotplug, | ||
| 90 | a _CBA method in the PNP0A03 device describes the ECAM space of a | ||
| 91 | hot-pluggable host bridge [9]. Note that for both MCFG and _CBA, the base | ||
| 92 | address always corresponds to bus 0, even if the bus range below the bridge | ||
| 93 | (which is reported via _CRS) doesn't start at 0. | ||
| 94 | |||
| 95 | |||
| 96 | [1] ACPI 6.2, sec 6.1: | ||
| 97 | For any device that is on a non-enumerable type of bus (for example, an | ||
| 98 | ISA bus), OSPM enumerates the devices' identifier(s) and the ACPI | ||
| 99 | system firmware must supply an _HID object ... for each device to | ||
| 100 | enable OSPM to do that. | ||
| 101 | |||
| 102 | [2] ACPI 6.2, sec 3.7: | ||
| 103 | The OS enumerates motherboard devices simply by reading through the | ||
| 104 | ACPI Namespace looking for devices with hardware IDs. | ||
| 105 | |||
| 106 | Each device enumerated by ACPI includes ACPI-defined objects in the | ||
| 107 | ACPI Namespace that report the hardware resources the device could | ||
| 108 | occupy [_PRS], an object that reports the resources that are currently | ||
| 109 | used by the device [_CRS], and objects for configuring those resources | ||
| 110 | [_SRS]. The information is used by the Plug and Play OS (OSPM) to | ||
| 111 | configure the devices. | ||
| 112 | |||
| 113 | [3] ACPI 6.2, sec 6.2: | ||
| 114 | OSPM uses device configuration objects to configure hardware resources | ||
| 115 | for devices enumerated via ACPI. Device configuration objects provide | ||
| 116 | information about current and possible resource requirements, the | ||
| 117 | relationship between shared resources, and methods for configuring | ||
| 118 | hardware resources. | ||
| 119 | |||
| 120 | When OSPM enumerates a device, it calls _PRS to determine the resource | ||
| 121 | requirements of the device. It may also call _CRS to find the current | ||
| 122 | resource settings for the device. Using this information, the Plug and | ||
| 123 | Play system determines what resources the device should consume and | ||
| 124 | sets those resources by calling the device’s _SRS control method. | ||
| 125 | |||
| 126 | In ACPI, devices can consume resources (for example, legacy keyboards), | ||
| 127 | provide resources (for example, a proprietary PCI bridge), or do both. | ||
| 128 | Unless otherwise specified, resources for a device are assumed to be | ||
| 129 | taken from the nearest matching resource above the device in the device | ||
| 130 | hierarchy. | ||
| 131 | |||
| 132 | [4] ACPI 6.2, sec 6.4.3.5.1, 2, 3, 4: | ||
| 133 | QWord/DWord/Word Address Space Descriptor (.1, .2, .3) | ||
| 134 | General Flags: Bit [0] Ignored | ||
| 135 | |||
| 136 | Extended Address Space Descriptor (.4) | ||
| 137 | General Flags: Bit [0] Consumer/Producer: | ||
| 138 | 1–This device consumes this resource | ||
| 139 | 0–This device produces and consumes this resource | ||
| 140 | |||
| 141 | [5] ACPI 6.2, sec 19.6.43: | ||
| 142 | ResourceUsage specifies whether the Memory range is consumed by | ||
| 143 | this device (ResourceConsumer) or passed on to child devices | ||
| 144 | (ResourceProducer). If nothing is specified, then | ||
| 145 | ResourceConsumer is assumed. | ||
| 146 | |||
| 147 | [6] PCI Firmware 3.2, sec 4.1.2: | ||
| 148 | If the operating system does not natively comprehend reserving the | ||
| 149 | MMCFG region, the MMCFG region must be reserved by firmware. The | ||
| 150 | address range reported in the MCFG table or by _CBA method (see Section | ||
| 151 | 4.1.3) must be reserved by declaring a motherboard resource. For most | ||
| 152 | systems, the motherboard resource would appear at the root of the ACPI | ||
| 153 | namespace (under \_SB) in a node with a _HID of EISAID (PNP0C02), and | ||
| 154 | the resources in this case should not be claimed in the root PCI bus’s | ||
| 155 | _CRS. The resources can optionally be returned in Int15 E820 or | ||
| 156 | EFIGetMemoryMap as reserved memory but must always be reported through | ||
| 157 | ACPI as a motherboard resource. | ||
| 158 | |||
| 159 | [7] PCI Express 4.0, sec 7.2.2: | ||
| 160 | For systems that are PC-compatible, or that do not implement a | ||
| 161 | processor-architecture-specific firmware interface standard that allows | ||
| 162 | access to the Configuration Space, the ECAM is required as defined in | ||
| 163 | this section. | ||
| 164 | |||
| 165 | [8] PCI Firmware 3.2, sec 4.1.2: | ||
| 166 | The MCFG table is an ACPI table that is used to communicate the base | ||
| 167 | addresses corresponding to the non-hot removable PCI Segment Groups | ||
| 168 | range within a PCI Segment Group available to the operating system at | ||
| 169 | boot. This is required for the PC-compatible systems. | ||
| 170 | |||
| 171 | The MCFG table is only used to communicate the base addresses | ||
| 172 | corresponding to the PCI Segment Groups available to the system at | ||
| 173 | boot. | ||
| 174 | |||
| 175 | [9] PCI Firmware 3.2, sec 4.1.3: | ||
| 176 | The _CBA (Memory mapped Configuration Base Address) control method is | ||
| 177 | an optional ACPI object that returns the 64-bit memory mapped | ||
| 178 | configuration base address for the hot plug capable host bridge. The | ||
| 179 | base address returned by _CBA is processor-relative address. The _CBA | ||
| 180 | control method evaluates to an Integer. | ||
| 181 | |||
| 182 | This control method appears under a host bridge object. When the _CBA | ||
| 183 | method appears under an active host bridge object, the operating system | ||
| 184 | evaluates this structure to identify the memory mapped configuration | ||
| 185 | base address corresponding to the PCI Segment Group for the bus number | ||
| 186 | range specified in _CRS method. An ACPI name space object that contains | ||
| 187 | the _CBA method must also contain a corresponding _SEG method. | ||
| @@ -15,3 +15,5 @@ subsys_id : don't care · 14 unmodified lines | |||
| 15 | interrupt_pin : Should be 1 - INTA, 2 - INTB, 3 - INTC, 4 -INTD | 15 | interrupt_pin : Should be 1 - INTA, 2 - INTB, 3 - INTC, 4 -INTD |
| 16 | msi_interrupts : Should be 1 to 32 depending on the number of MSI interrupts | 16 | msi_interrupts : Should be 1 to 32 depending on the number of MSI interrupts |
| 17 | to test | 17 | to test |
| 18 | msix_interrupts : Should be 1 to 2048 depending on the number of MSI-X | ||
| 19 | interrupts to test | ||
| @@ -44,7 +44,7 @@ by the PCI controller driver. · 43 unmodified lines | |||
| 44 | * clear_bar: ops to reset the BAR | 44 | * clear_bar: ops to reset the BAR |
| 45 | * alloc_addr_space: ops to allocate in PCI controller address space | 45 | * alloc_addr_space: ops to allocate in PCI controller address space |
| 46 | * free_addr_space: ops to free the allocated address space | 46 | * free_addr_space: ops to free the allocated address space |
| 47 | * raise_irq: ops to raise a legacy or MSI interrupt | 47 | * raise_irq: ops to raise a legacy, MSI or MSI-X interrupt |
| 48 | * start: ops to start the PCI link | 48 | * start: ops to start the PCI link |
| 49 | * stop: ops to stop the PCI link | 49 | * stop: ops to stop the PCI link |
| 50 | 50 | ||
| @@ -96,7 +96,7 @@ by the PCI endpoint function driver. · 45 unmodified lines | |||
| 96 | *) pci_epc_raise_irq() | 96 | *) pci_epc_raise_irq() |
| 97 | 97 | ||
| 98 | The PCI endpoint function driver should use pci_epc_raise_irq() to raise | 98 | The PCI endpoint function driver should use pci_epc_raise_irq() to raise |
| 99 | Legacy Interrupt or MSI Interrupt. | 99 | Legacy Interrupt, MSI or MSI-X Interrupt. |
| 100 | 100 | ||
| 101 | *) pci_epc_mem_alloc_addr() | 101 | *) pci_epc_mem_alloc_addr() |
| 102 | 102 | ||
| @@ -20,6 +20,8 @@ The PCI endpoint test device has the following registers: · 19 unmodified lines | |||
| 20 | 5) PCI_ENDPOINT_TEST_DST_ADDR | 20 | 5) PCI_ENDPOINT_TEST_DST_ADDR |
| 21 | 6) PCI_ENDPOINT_TEST_SIZE | 21 | 6) PCI_ENDPOINT_TEST_SIZE |
| 22 | 7) PCI_ENDPOINT_TEST_CHECKSUM | 22 | 7) PCI_ENDPOINT_TEST_CHECKSUM |
| 23 | 8) PCI_ENDPOINT_TEST_IRQ_TYPE | ||
| 24 | 9) PCI_ENDPOINT_TEST_IRQ_NUMBER | ||
| 23 | 25 | ||
| 24 | *) PCI_ENDPOINT_TEST_MAGIC | 26 | *) PCI_ENDPOINT_TEST_MAGIC |
| 25 | 27 | ||
| @@ -34,10 +36,10 @@ that the endpoint device must perform. · 8 unmodified lines | |||
| 34 | Bitfield Description: | 36 | Bitfield Description: |
| 35 | Bit 0 : raise legacy IRQ | 37 | Bit 0 : raise legacy IRQ |
| 36 | Bit 1 : raise MSI IRQ | 38 | Bit 1 : raise MSI IRQ |
| 37 | Bit 2 - 7 : MSI interrupt number | 39 | Bit 2 : raise MSI-X IRQ |
| 38 | Bit 8 : read command (read data from RC buffer) | 40 | Bit 3 : read command (read data from RC buffer) |
| 39 | Bit 9 : write command (write data to RC buffer) | 41 | Bit 4 : write command (write data to RC buffer) |
| 40 | Bit 10 : copy command (copy data from one RC buffer to another | 42 | Bit 5 : copy command (copy data from one RC buffer to another |
| 41 | RC buffer) | 43 | RC buffer) |
| 42 | 44 | ||
| 43 | *) PCI_ENDPOINT_TEST_STATUS | 45 | *) PCI_ENDPOINT_TEST_STATUS |
| @@ -64,3 +66,22 @@ COPY/READ command. · 20 unmodified lines | |||
| 64 | 66 | ||
| 65 | This register contains the destination address (RC buffer address) for | 67 | This register contains the destination address (RC buffer address) for |
| 66 | the COPY/WRITE command. | 68 | the COPY/WRITE command. |
| 69 | |||
| 70 | *) PCI_ENDPOINT_TEST_IRQ_TYPE | ||
| 71 | |||
| 72 | This register contains the interrupt type (Legacy/MSI) triggered | ||
| 73 | for the READ/WRITE/COPY and raise IRQ (Legacy/MSI) commands. | ||
| 74 | |||
| 75 | Possible types: | ||
| 76 | - Legacy : 0 | ||
| 77 | - MSI : 1 | ||
| 78 | - MSI-X : 2 | ||
| 79 | |||
| 80 | *) PCI_ENDPOINT_TEST_IRQ_NUMBER | ||
| 81 | |||
| 82 | This register contains the triggered ID interrupt. | ||
| 83 | |||
| 84 | Admissible values: | ||
| 85 | - Legacy : 0 | ||
| 86 | - MSI : [1 .. 32] | ||
| 87 | - MSI-X : [1 .. 2048] | ||
| @@ -45,9 +45,9 @@ The PCI endpoint framework populates the directory with the following · 44 unmodified lines | |||
| 45 | configurable fields. | 45 | configurable fields. |
| 46 | 46 | ||
| 47 | # ls functions/pci_epf_test/func1 | 47 | # ls functions/pci_epf_test/func1 |
| 48 | baseclass_code interrupt_pin revid subsys_vendor_id | 48 | baseclass_code interrupt_pin progif_code subsys_id |
| 49 | cache_line_size msi_interrupts subclass_code vendorid | 49 | cache_line_size msi_interrupts revid subsys_vendorid |
| 50 | deviceid progif_code subsys_id | 50 | deviceid msix_interrupts subclass_code vendorid |
| 51 | 51 | ||
| 52 | The PCI endpoint function driver populates these entries with default values | 52 | The PCI endpoint function driver populates these entries with default values |
| 53 | when the device is bound to the driver. The pci-epf-test driver populates | 53 | when the device is bound to the driver. The pci-epf-test driver populates |
| @@ -67,6 +67,7 @@ device, the following commands can be used. · 13 unmodified lines | |||
| 67 | # echo 0x104c > functions/pci_epf_test/func1/vendorid | 67 | # echo 0x104c > functions/pci_epf_test/func1/vendorid |
| 68 | # echo 0xb500 > functions/pci_epf_test/func1/deviceid | 68 | # echo 0xb500 > functions/pci_epf_test/func1/deviceid |
| 69 | # echo 16 > functions/pci_epf_test/func1/msi_interrupts | 69 | # echo 16 > functions/pci_epf_test/func1/msi_interrupts |
| 70 | # echo 8 > functions/pci_epf_test/func1/msix_interrupts | ||
| 70 | 71 | ||
| 71 | 1.5 Binding pci-epf-test Device to EP Controller | 72 | 1.5 Binding pci-epf-test Device to EP Controller |
| 72 | 73 | ||
| @@ -120,7 +121,9 @@ following commands. · 47 unmodified lines | |||
| 120 | 121 | ||
| 121 | Interrupt tests | 122 | Interrupt tests |
| 122 | 123 | ||
| 124 | SET IRQ TYPE TO LEGACY: OKAY | ||
| 123 | LEGACY IRQ: NOT OKAY | 125 | LEGACY IRQ: NOT OKAY |
| 126 | SET IRQ TYPE TO MSI: OKAY | ||
| 124 | MSI1: OKAY | 127 | MSI1: OKAY |
| 125 | MSI2: OKAY | 128 | MSI2: OKAY |
| 126 | MSI3: OKAY | 129 | MSI3: OKAY |
| @@ -153,9 +156,30 @@ following commands. · 26 unmodified lines | |||
| 153 | MSI30: NOT OKAY | 156 | MSI30: NOT OKAY |
| 154 | MSI31: NOT OKAY | 157 | MSI31: NOT OKAY |
| 155 | MSI32: NOT OKAY | 158 | MSI32: NOT OKAY |
| 159 | SET IRQ TYPE TO MSI-X: OKAY | ||
| 160 | MSI-X1: OKAY | ||
| 161 | MSI-X2: OKAY | ||
| 162 | MSI-X3: OKAY | ||
| 163 | MSI-X4: OKAY | ||
| 164 | MSI-X5: OKAY | ||
| 165 | MSI-X6: OKAY | ||
| 166 | MSI-X7: OKAY | ||
| 167 | MSI-X8: OKAY | ||
| 168 | MSI-X9: NOT OKAY | ||
| 169 | MSI-X10: NOT OKAY | ||
| 170 | MSI-X11: NOT OKAY | ||
| 171 | MSI-X12: NOT OKAY | ||
| 172 | MSI-X13: NOT OKAY | ||
| 173 | MSI-X14: NOT OKAY | ||
| 174 | MSI-X15: NOT OKAY | ||
| 175 | MSI-X16: NOT OKAY | ||
| 176 | [...] | ||
| 177 | MSI-X2047: NOT OKAY | ||
| 178 | MSI-X2048: NOT OKAY | ||
| 156 | 179 | ||
| 157 | Read Tests | 180 | Read Tests |
| 158 | 181 | ||
| 182 | SET IRQ TYPE TO MSI: OKAY | ||
| 159 | READ ( 1 bytes): OKAY | 183 | READ ( 1 bytes): OKAY |
| 160 | READ ( 1024 bytes): OKAY | 184 | READ ( 1024 bytes): OKAY |
| 161 | READ ( 1025 bytes): OKAY | 185 | READ ( 1025 bytes): OKAY |
| @@ -73,6 +73,11 @@ In the example, 'Requester ID' means the ID of the device who sends · 72 unmodified lines | |||
| 73 | the error message to root port. Pls. refer to pci express specs for | 73 | the error message to root port. Pls. refer to pci express specs for |
| 74 | other fields. | 74 | other fields. |
| 75 | 75 | ||
| 76 | 2.4 AER Statistics / Counters | ||
| 77 | |||
| 78 | When PCIe AER errors are captured, the counters / statistics are also exposed | ||
| 79 | in the form of sysfs attributes which are documented at | ||
| 80 | Documentation/ABI/testing/sysfs-bus-pci-devices-aer_stats | ||
| 76 | 81 | ||
| 77 | 3. Developer Guide | 82 | 3. Developer Guide |
| 78 | 83 | ||
| @@ -380,31 +380,26 @@ and therefore need no protection. · 379 unmodified lines | |||
| 380 | as follows: | 380 | as follows: |
| 381 | 381 | ||
| 382 | <pre> | 382 | <pre> |
| 383 | 1 unsigned long gpnum; | 383 | 1 unsigned long gp_seq; |
| 384 | 2 unsigned long completed; | ||
| 385 | </pre> | 384 | </pre> |
| 386 | 385 | ||
| 387 | <p>RCU grace periods are numbered, and | 386 | <p>RCU grace periods are numbered, and |
| 388 | the <tt>->gpnum</tt> field contains the number of the grace | 387 | the <tt>->gp_seq</tt> field contains the current grace-period |
| 389 | period that started most recently. | 388 | sequence number. |
| 390 | The <tt>->completed</tt> field contains the number of the | 389 | The bottom two bits are the state of the current grace period, |
| 391 | grace period that completed most recently. | 390 | which can be zero for not yet started or one for in progress. |
| 392 | If the two fields are equal, the RCU grace period that most recently | 391 | In other words, if the bottom two bits of <tt>->gp_seq</tt> are |
| 393 | started has already completed, and therefore the corresponding | 392 | zero, the corresponding flavor of RCU is idle. |
| 394 | flavor of RCU is idle. | 393 | Any other value in the bottom two bits indicates that something is broken. |
| 395 | If <tt>->gpnum</tt> is one greater than <tt>->completed</tt>, | 394 | This field is protected by the root <tt>rcu_node</tt> structure's |
| 396 | then <tt>->gpnum</tt> gives the number of the current RCU | ||
| 397 | grace period, which has not yet completed. | ||
| 398 | Any other combination of values indicates that something is broken. | ||
| 399 | These two fields are protected by the root <tt>rcu_node</tt>'s | ||
| 400 | <tt>->lock</tt> field. | 395 | <tt>->lock</tt> field. |
| 401 | 396 | ||
| 402 | </p><p>There are <tt>->gpnum</tt> and <tt>->completed</tt> fields | 397 | </p><p>There are <tt>->gp_seq</tt> fields |
| 403 | in the <tt>rcu_node</tt> and <tt>rcu_data</tt> structures | 398 | in the <tt>rcu_node</tt> and <tt>rcu_data</tt> structures |
| 404 | as well. | 399 | as well. |
| 405 | The fields in the <tt>rcu_state</tt> structure represent the | 400 | The fields in the <tt>rcu_state</tt> structure represent the |
| 406 | most current values, and those of the other structures are compared | 401 | most current value, and those of the other structures are compared |
| 407 | in order to detect the start of a new grace period in a distributed | 402 | in order to detect the beginnings and ends of grace periods in a distributed |
| 408 | fashion. | 403 | fashion. |
| 409 | The values flow from <tt>rcu_state</tt> to <tt>rcu_node</tt> | 404 | The values flow from <tt>rcu_state</tt> to <tt>rcu_node</tt> |
| 410 | (down the tree from the root to the leaves) to <tt>rcu_data</tt>. | 405 | (down the tree from the root to the leaves) to <tt>rcu_data</tt>. |
| @@ -512,27 +507,47 @@ than to be heisenbugged out of existence. · 101 unmodified lines | |||
| 512 | as follows: | 507 | as follows: |
| 513 | 508 | ||
| 514 | <pre> | 509 | <pre> |
| 515 | 1 unsigned long gpnum; | 510 | 1 unsigned long gp_seq; |
| 516 | 2 unsigned long completed; | 511 | 2 unsigned long gp_seq_needed; |
| 517 | </pre> | 512 | </pre> |
| 518 | 513 | ||
| 519 | <p>These fields are the counterparts of the fields of the same name in | 514 | <p>The <tt>rcu_node</tt> structures' <tt>->gp_seq</tt> fields are |
| 520 | the <tt>rcu_state</tt> structure. | 515 | the counterparts of the field of the same name in the <tt>rcu_state</tt> |
| 521 | They each may lag up to one behind their <tt>rcu_state</tt> | 516 | structure. |
| 522 | counterparts. | 517 | They each may lag up to one step behind their <tt>rcu_state</tt> |
| 523 | If a given <tt>rcu_node</tt> structure's <tt>->gpnum</tt> and | 518 | counterpart. |
| 524 | <tt>->complete</tt> fields are equal, then this <tt>rcu_node</tt> | 519 | If the bottom two bits of a given <tt>rcu_node</tt> structure's |
| 520 | <tt>->gp_seq</tt> field is zero, then this <tt>rcu_node</tt> | ||
| 525 | structure believes that RCU is idle. | 521 | structure believes that RCU is idle. |
| 526 | Otherwise, as with the <tt>rcu_state</tt> structure, | 522 | </p><p>The <tt>>gp_seq</tt> field of each <tt>rcu_node</tt> |
| 527 | the <tt>->gpnum</tt> field will be one greater than the | 523 | structure is updated at the beginning and the end |
| 528 | <tt>->complete</tt> fields, with <tt>->gpnum</tt> | 524 | of each grace period. |
| 529 | indicating which grace period this <tt>rcu_node</tt> believes | 525 | |
| 530 | is still being waited for. | 526 | <p>The <tt>->gp_seq_needed</tt> fields record the |
| 527 | furthest-in-the-future grace period request seen by the corresponding | ||
| 528 | <tt>rcu_node</tt> structure. The request is considered fulfilled when | ||
| 529 | the value of the <tt>->gp_seq</tt> field equals or exceeds that of | ||
| 530 | the <tt>->gp_seq_needed</tt> field. | ||
| 531 | 531 | ||
| 532 | </p><p>The <tt>>gpnum</tt> field of each <tt>rcu_node</tt> | 532 | <table> |
| 533 | structure is updated at the beginning | 533 | <tr><th> </th></tr> |
| 534 | of each grace period, and the <tt>->completed</tt> fields are | 534 | <tr><th align="left">Quick Quiz:</th></tr> |
| 535 | updated at the end of each grace period. | 535 | <tr><td> |
| 536 | Suppose that this <tt>rcu_node</tt> structure doesn't see | ||
| 537 | a request for a very long time. | ||
| 538 | Won't wrapping of the <tt>->gp_seq</tt> field cause | ||
| 539 | problems? | ||
| 540 | </td></tr> | ||
| 541 | <tr><th align="left">Answer:</th></tr> | ||
| 542 | <tr><td bgcolor="#ffffff"><font color="ffffff"> | ||
| 543 | No, because if the <tt>->gp_seq_needed</tt> field lags behind the | ||
| 544 | <tt>->gp_seq</tt> field, the <tt>->gp_seq_needed</tt> field | ||
| 545 | will be updated at the end of the grace period. | ||
| 546 | Modulo-arithmetic comparisons therefore will always get the | ||
| 547 | correct answer, even with wrapping. | ||
| 548 | </font></td></tr> | ||
| 549 | <tr><td> </td></tr> | ||
| 550 | </table> | ||
| 536 | 551 | ||
| 537 | <h5>Quiescent-State Tracking</h5> | 552 | <h5>Quiescent-State Tracking</h5> |
| 538 | 553 | ||
| @@ -626,9 +641,8 @@ normal and expedited grace periods, respectively. · 87 unmodified lines | |||
| 626 | </ol> | 641 | </ol> |
| 627 | 642 | ||
| 628 | <p><font color="ffffff">So the locking is absolutely required in | 643 | <p><font color="ffffff">So the locking is absolutely required in |
| 629 | order to coordinate | 644 | order to coordinate clearing of the bits with updating of the |
| 630 | clearing of the bits with the grace-period numbers in | 645 | grace-period sequence number in <tt>->gp_seq</tt>. |
| 631 | <tt>->gpnum</tt> and <tt>->completed</tt>. | ||
| 632 | </font></td></tr> | 646 | </font></td></tr> |
| 633 | <tr><td> </td></tr> | 647 | <tr><td> </td></tr> |
| 634 | </table> | 648 | </table> |
| @@ -1038,15 +1052,15 @@ out any <tt>rcu_data</tt> structure for which this flag is not set. · 403 unmodified lines | |||
| 1038 | as follows: | 1052 | as follows: |
| 1039 | 1053 | ||
| 1040 | <pre> | 1054 | <pre> |
| 1041 | 1 unsigned long completed; | 1055 | 1 unsigned long gp_seq; |
| 1042 | 2 unsigned long gpnum; | 1056 | 2 unsigned long gp_seq_needed; |
| 1043 | 3 bool cpu_no_qs; | 1057 | 3 bool cpu_no_qs; |
| 1044 | 4 bool core_needs_qs; | 1058 | 4 bool core_needs_qs; |
| 1045 | 5 bool gpwrap; | 1059 | 5 bool gpwrap; |
| 1046 | 6 unsigned long rcu_qs_ctr_snap; | 1060 | 6 unsigned long rcu_qs_ctr_snap; |
| 1047 | </pre> | 1061 | </pre> |
| 1048 | 1062 | ||
| 1049 | <p>The <tt>completed</tt> and <tt>gpnum</tt> | 1063 | <p>The <tt>->gp_seq</tt> and <tt>->gp_seq_needed</tt> |
| 1050 | fields are the counterparts of the fields of the same name | 1064 | fields are the counterparts of the fields of the same name |
| 1051 | in the <tt>rcu_state</tt> and <tt>rcu_node</tt> structures. | 1065 | in the <tt>rcu_state</tt> and <tt>rcu_node</tt> structures. |
| 1052 | They may each lag up to one behind their <tt>rcu_node</tt> | 1066 | They may each lag up to one behind their <tt>rcu_node</tt> |
| @@ -1054,15 +1068,9 @@ counterparts, but in <tt>CONFIG_NO_HZ_IDLE</tt> and · 1 unmodified line | |||
| 1054 | <tt>CONFIG_NO_HZ_FULL</tt> kernels can lag | 1068 | <tt>CONFIG_NO_HZ_FULL</tt> kernels can lag |
| 1055 | arbitrarily far behind for CPUs in dyntick-idle mode (but these counters | 1069 | arbitrarily far behind for CPUs in dyntick-idle mode (but these counters |
| 1056 | will catch up upon exit from dyntick-idle mode). | 1070 | will catch up upon exit from dyntick-idle mode). |
| 1057 | If a given <tt>rcu_data</tt> structure's <tt>->gpnum</tt> and | 1071 | If the lower two bits of a given <tt>rcu_data</tt> structure's |
| 1058 | <tt>->complete</tt> fields are equal, then this <tt>rcu_data</tt> | 1072 | <tt>->gp_seq</tt> are zero, then this <tt>rcu_data</tt> |
| 1059 | structure believes that RCU is idle. | 1073 | structure believes that RCU is idle. |
| 1060 | Otherwise, as with the <tt>rcu_state</tt> and <tt>rcu_node</tt> | ||
| 1061 | structure, | ||
| 1062 | the <tt>->gpnum</tt> field will be one greater than the | ||
| 1063 | <tt>->complete</tt> fields, with <tt>->gpnum</tt> | ||
| 1064 | indicating which grace period this <tt>rcu_data</tt> believes | ||
| 1065 | is still being waited for. | ||
| 1066 | 1074 | ||
| 1067 | <table> | 1075 | <table> |
| 1068 | <tr><th> </th></tr> | 1076 | <tr><th> </th></tr> |
| @@ -1070,13 +1078,13 @@ is still being waited for. · 1 unmodified line | |||
| 1070 | <tr><td> | 1078 | <tr><td> |
| 1071 | All this replication of the grace period numbers can only cause | 1079 | All this replication of the grace period numbers can only cause |
| 1072 | massive confusion. | 1080 | massive confusion. |
| 1073 | Why not just keep a global pair of counters and be done with it??? | 1081 | Why not just keep a global sequence number and be done with it??? |
| 1074 | </td></tr> | 1082 | </td></tr> |
| 1075 | <tr><th align="left">Answer:</th></tr> | 1083 | <tr><th align="left">Answer:</th></tr> |
| 1076 | <tr><td bgcolor="#ffffff"><font color="ffffff"> | 1084 | <tr><td bgcolor="#ffffff"><font color="ffffff"> |
| 1077 | Because if there was only a single global pair of grace-period | 1085 | Because if there was only a single global sequence |
| 1078 | numbers, there would need to be a single global lock to allow | 1086 | numbers, there would need to be a single global lock to allow |
| 1079 | safely accessing and updating them. | 1087 | safely accessing and updating it. |
| 1080 | And if we are not going to have a single global lock, we need | 1088 | And if we are not going to have a single global lock, we need |
| 1081 | to carefully manage the numbers on a per-node basis. | 1089 | to carefully manage the numbers on a per-node basis. |
| 1082 | Recall from the answer to a previous Quick Quiz that the consequences | 1090 | Recall from the answer to a previous Quick Quiz that the consequences |
| @@ -1091,8 +1099,8 @@ CPU has not yet passed through a quiescent state, · 8 unmodified lines | |||
| 1091 | while the <tt>->core_needs_qs</tt> flag indicates that the | 1099 | while the <tt>->core_needs_qs</tt> flag indicates that the |
| 1092 | RCU core needs a quiescent state from the corresponding CPU. | 1100 | RCU core needs a quiescent state from the corresponding CPU. |
| 1093 | The <tt>->gpwrap</tt> field indicates that the corresponding | 1101 | The <tt>->gpwrap</tt> field indicates that the corresponding |
| 1094 | CPU has remained idle for so long that the <tt>completed</tt> | 1102 | CPU has remained idle for so long that the |
| 1095 | and <tt>gpnum</tt> counters are in danger of overflow, which | 1103 | <tt>gp_seq</tt> counter is in danger of overflow, which |
| 1096 | will cause the CPU to disregard the values of its counters on | 1104 | will cause the CPU to disregard the values of its counters on |
| 1097 | its next exit from idle. | 1105 | its next exit from idle. |
| 1098 | Finally, the <tt>rcu_qs_ctr_snap</tt> field is used to detect | 1106 | Finally, the <tt>rcu_qs_ctr_snap</tt> field is used to detect |
| @@ -1130,10 +1138,10 @@ The CPU advances the callbacks in its <tt>rcu_data</tt> structure · 31 unmodified lines | |||
| 1130 | whenever it notices that another RCU grace period has completed. | 1138 | whenever it notices that another RCU grace period has completed. |
| 1131 | The CPU detects the completion of an RCU grace period by noticing | 1139 | The CPU detects the completion of an RCU grace period by noticing |
| 1132 | that the value of its <tt>rcu_data</tt> structure's | 1140 | that the value of its <tt>rcu_data</tt> structure's |
| 1133 | <tt>->completed</tt> field differs from that of its leaf | 1141 | <tt>->gp_seq</tt> field differs from that of its leaf |
| 1134 | <tt>rcu_node</tt> structure. | 1142 | <tt>rcu_node</tt> structure. |
| 1135 | Recall that each <tt>rcu_node</tt> structure's | 1143 | Recall that each <tt>rcu_node</tt> structure's |
| 1136 | <tt>->completed</tt> field is updated at the end of each | 1144 | <tt>->gp_seq</tt> field is updated at the beginnings and ends of each |
| 1137 | grace period. | 1145 | grace period. |
| 1138 | 1146 | ||
| 1139 | <p> | 1147 | <p> |
| @@ -357,7 +357,7 @@ parts, starting in this section with the various phases of · 356 unmodified lines | |||
| 357 | grace-period initialization. | 357 | grace-period initialization. |
| 358 | 358 | ||
| 359 | <p>The first ordering-related grace-period initialization action is to | 359 | <p>The first ordering-related grace-period initialization action is to |
| 360 | increment the <tt>rcu_state</tt> structure's <tt>->gpnum</tt> | 360 | advance the <tt>rcu_state</tt> structure's <tt>->gp_seq</tt> |
| 361 | grace-period-number counter, as shown below: | 361 | grace-period-number counter, as shown below: |
| 362 | 362 | ||
| 363 | </p><p><img src="TreeRCU-gp-init-1.svg" alt="TreeRCU-gp-init-1.svg" width="75%"> | 363 | </p><p><img src="TreeRCU-gp-init-1.svg" alt="TreeRCU-gp-init-1.svg" width="75%"> |
| @@ -388,7 +388,7 @@ its last CPU and if the next <tt>rcu_node</tt> structure has no online CPUs). · 24 unmodified lines | |||
| 388 | 388 | ||
| 389 | <p>The final <tt>rcu_gp_init()</tt> pass through the <tt>rcu_node</tt> | 389 | <p>The final <tt>rcu_gp_init()</tt> pass through the <tt>rcu_node</tt> |
| 390 | tree traverses breadth-first, setting each <tt>rcu_node</tt> structure's | 390 | tree traverses breadth-first, setting each <tt>rcu_node</tt> structure's |
| 391 | <tt>->gpnum</tt> field to the newly incremented value from the | 391 | <tt>->gp_seq</tt> field to the newly advanced value from the |
| 392 | <tt>rcu_state</tt> structure, as shown in the following diagram. | 392 | <tt>rcu_state</tt> structure, as shown in the following diagram. |
| 393 | 393 | ||
| 394 | </p><p><img src="TreeRCU-gp-init-3.svg" alt="TreeRCU-gp-init-1.svg" width="75%"> | 394 | </p><p><img src="TreeRCU-gp-init-3.svg" alt="TreeRCU-gp-init-1.svg" width="75%"> |
| @@ -398,9 +398,9 @@ tree traverses breadth-first, setting each <tt>rcu_node</tt> structure's · 3 unmodified lines | |||
| 398 | to notice that a new grace period has started, as described in the next | 398 | to notice that a new grace period has started, as described in the next |
| 399 | section. | 399 | section. |
| 400 | But because the grace-period kthread started the grace period at the | 400 | But because the grace-period kthread started the grace period at the |
| 401 | root (with the increment of the <tt>rcu_state</tt> structure's | 401 | root (with the advancing of the <tt>rcu_state</tt> structure's |
| 402 | <tt>->gpnum</tt> field) before setting each leaf <tt>rcu_node</tt> | 402 | <tt>->gp_seq</tt> field) before setting each leaf <tt>rcu_node</tt> |
| 403 | structure's <tt>->gpnum</tt> field, each CPU's observation of | 403 | structure's <tt>->gp_seq</tt> field, each CPU's observation of |
| 404 | the start of the grace period will happen after the actual start | 404 | the start of the grace period will happen after the actual start |
| 405 | of the grace period. | 405 | of the grace period. |
| 406 | 406 | ||
| @@ -466,7 +466,7 @@ section that the grace period must wait on. · 59 unmodified lines | |||
| 466 | <tr><td> | 466 | <tr><td> |
| 467 | But a RCU read-side critical section might have started | 467 | But a RCU read-side critical section might have started |
| 468 | after the beginning of the grace period | 468 | after the beginning of the grace period |
| 469 | (the <tt>->gpnum++</tt> from earlier), so why should | 469 | (the advancing of <tt>->gp_seq</tt> from earlier), so why should |
| 470 | the grace period wait on such a critical section? | 470 | the grace period wait on such a critical section? |
| 471 | </td></tr> | 471 | </td></tr> |
| 472 | <tr><th align="left">Answer:</th></tr> | 472 | <tr><th align="left">Answer:</th></tr> |
| @@ -609,10 +609,8 @@ states outstanding from other CPUs. · 136 unmodified lines | |||
| 609 | <h4><a name="Grace-Period Cleanup">Grace-Period Cleanup</a></h4> | 609 | <h4><a name="Grace-Period Cleanup">Grace-Period Cleanup</a></h4> |
| 610 | 610 | ||
| 611 | <p>Grace-period cleanup first scans the <tt>rcu_node</tt> tree | 611 | <p>Grace-period cleanup first scans the <tt>rcu_node</tt> tree |
| 612 | breadth-first setting all the <tt>->completed</tt> fields equal | 612 | breadth-first advancing all the <tt>->gp_seq</tt> fields, then it |
| 613 | to the number of the newly completed grace period, then it sets | 613 | advances the <tt>rcu_state</tt> structure's <tt>->gp_seq</tt> field. |
| 614 | the <tt>rcu_state</tt> structure's <tt>->completed</tt> field, | ||
| 615 | again to the number of the newly completed grace period. | ||
| 616 | The ordering effects are shown below: | 614 | The ordering effects are shown below: |
| 617 | 615 | ||
| 618 | </p><p><img src="TreeRCU-gp-cleanup.svg" alt="TreeRCU-gp-cleanup.svg" width="75%"> | 616 | </p><p><img src="TreeRCU-gp-cleanup.svg" alt="TreeRCU-gp-cleanup.svg" width="75%"> |
| @@ -634,7 +632,7 @@ grace-period cleanup is complete, the next grace period can begin. · 15 unmodified lines | |||
| 634 | CPU has reported its quiescent state, but it may be some | 632 | CPU has reported its quiescent state, but it may be some |
| 635 | milliseconds before RCU becomes aware of this. | 633 | milliseconds before RCU becomes aware of this. |
| 636 | The latest reasonable candidate is once the <tt>rcu_state</tt> | 634 | The latest reasonable candidate is once the <tt>rcu_state</tt> |
| 637 | structure's <tt>->completed</tt> field has been updated, | 635 | structure's <tt>->gp_seq</tt> field has been updated, |
| 638 | but it is quite possible that some CPUs have already completed | 636 | but it is quite possible that some CPUs have already completed |
| 639 | phase two of their updates by that time. | 637 | phase two of their updates by that time. |
| 640 | In short, if you are going to work with RCU, you need to | 638 | In short, if you are going to work with RCU, you need to |
| @@ -647,7 +645,7 @@ grace-period cleanup is complete, the next grace period can begin. · 6 unmodified lines | |||
| 647 | <h4><a name="Callback Invocation">Callback Invocation</a></h4> | 645 | <h4><a name="Callback Invocation">Callback Invocation</a></h4> |
| 648 | 646 | ||
| 649 | <p>Once a given CPU's leaf <tt>rcu_node</tt> structure's | 647 | <p>Once a given CPU's leaf <tt>rcu_node</tt> structure's |
| 650 | <tt>->completed</tt> field has been updated, that CPU can begin | 648 | <tt>->gp_seq</tt> field has been updated, that CPU can begin |
| 651 | invoking its RCU callbacks that were waiting for this grace period | 649 | invoking its RCU callbacks that were waiting for this grace period |
| 652 | to end. | 650 | to end. |
| 653 | These callbacks are identified by <tt>rcu_advance_cbs()</tt>, | 651 | These callbacks are identified by <tt>rcu_advance_cbs()</tt>, |
| @@ -384,11 +384,11 @@ · 383 unmodified lines | |||
| 384 | inkscape:window-height="1144" | 384 | inkscape:window-height="1144" |
| 385 | id="namedview208" | 385 | id="namedview208" |
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| 394 | fit-margin-top="5" | 394 | fit-margin-top="5" |
| @@ -417,13 +417,15 @@ · 22 unmodified lines | |||
| 417 | id="g3188"> | 417 | id="g3188"> |
| 418 | <text | 418 | <text |
| 419 | xml:space="preserve" | 419 | xml:space="preserve" |
| 420 | x="3199.1516" | 420 | x="3145.9592" |
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| 425 | id="text202" | 425 | id="text202" |
| 426 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">->completed = ->gpnum</text> | 426 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier"><tspan |
| 427 | style="font-size:172.87567139px" | ||
| 428 | id="tspan3143">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
| 427 | <g | 429 | <g |
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| @@ -502,13 +504,15 @@ · 72 unmodified lines | |||
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| 503 | <text | 505 | <text |
| 504 | xml:space="preserve" | 506 | xml:space="preserve" |
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| 511 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | 513 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan |
| 514 | style="font-size:172.87567139px" | ||
| 515 | id="tspan3166-5">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
| 512 | </g> | 516 | </g> |
| 513 | <g | 517 | <g |
| 514 | style="fill:none;stroke-width:0.025in" | 518 | style="fill:none;stroke-width:0.025in" |
| @@ -547,15 +551,6 @@ · 32 unmodified lines | |||
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| 558 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | ||
| 559 | <path | 554 | <path |
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| 610 | <text | ||
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| 617 | id="tspan3166-0">rcu_seq_end(&rsp->gp_seq)</tspan></text> | ||
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| 859 | style="font-size:172.87567139px" | ||
| 860 | id="tspan3166-93">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| @@ -887,13 +886,15 @@ · 22 unmodified lines | |||
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| 888 | <text | 887 | <text |
| 889 | xml:space="preserve" | 888 | xml:space="preserve" |
| 890 | x="5327.3057" | 889 | x="5274.1133" |
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| 896 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | 895 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan |
| 896 | style="font-size:172.87567139px" | ||
| 897 | id="tspan3166">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| @@ -972,13 +973,15 @@ · 72 unmodified lines | |||
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| 981 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | 982 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan |
| 983 | style="font-size:172.87567139px" | ||
| 984 | id="tspan3166-9">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| @@ -1019,13 +1022,15 @@ · 34 unmodified lines | |||
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| 1028 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | 1031 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan |
| 1032 | style="font-size:172.87567139px" | ||
| 1033 | id="tspan3166-56">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
| 1029 | </g> | 1034 | </g> |
| 1030 | <path | 1035 | <path |
| 1031 | style="fill:none;stroke:#000000;stroke-width:13.29812908px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" | 1036 | style="fill:none;stroke:#000000;stroke-width:13.29812908px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" |
| @@ -1059,15 +1064,6 @@ · 27 unmodified lines | |||
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| 1061 | sodipodi:nodetypes="cc" /> | 1066 | sodipodi:nodetypes="cc" /> |
| 1062 | <text | ||
| 1063 | xml:space="preserve" | ||
| 1064 | x="7318.9653" | ||
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| 1070 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | ||
| 1071 | <g | 1067 | <g |
| 1072 | style="fill:none;stroke-width:0.025in" | 1068 | style="fill:none;stroke-width:0.025in" |
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| @@ -1123,4 +1119,15 @@ · 49 unmodified lines | |||
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| 1123 | xml:space="preserve" | ||
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| 1132 | id="tspan3166-2">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| @@ -272,13 +272,13 @@ · 271 unmodified lines | |||
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| 274 | showgrid="true" | 274 | showgrid="true" |
| 275 | inkscape:zoom="0.70710678" | 275 | inkscape:zoom="2.6330492" |
| 276 | inkscape:cx="617.89019" | 276 | inkscape:cx="524.82797" |
| 277 | inkscape:cy="636.57143" | 277 | inkscape:cy="519.31194" |
| 278 | inkscape:window-x="697" | 278 | inkscape:window-x="79" |
| 279 | inkscape:window-y="28" | 279 | inkscape:window-y="28" |
| 280 | inkscape:window-maximized="0" | 280 | inkscape:window-maximized="0" |
| 281 | inkscape:current-layer="svg2" | 281 | inkscape:current-layer="g3188" |
| 282 | fit-margin-top="5" | 282 | fit-margin-top="5" |
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| @@ -305,13 +305,15 @@ · 20 unmodified lines | |||
| 305 | id="g3188"> | 305 | id="g3188"> |
| 306 | <text | 306 | <text |
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| 308 | x="3305.5364" | 308 | x="3119.363" |
| 309 | y="13255.592" | 309 | y="13255.592" |
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| 314 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">rsp->gpnum++</text> | 314 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier"><tspan |
| 315 | style="font-size:172.87567139px" | ||
| 316 | id="tspan3071">rcu_seq_start(rsp->gp_seq)</tspan></text> | ||
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| @@ -19,7 +19,7 @@ · 18 unmodified lines | |||
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| @@ -257,18 +257,22 @@ · 231 unmodified lines | |||
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| 267 | inkscape:current-layer="svg2" | 267 | inkscape:current-layer="g3153" |
| 268 | fit-margin-top="5" | 268 | fit-margin-top="5" |
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| @@ -281,13 +285,13 @@ · 6 unmodified lines | |||
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| 282 | <text | 286 | <text |
| 283 | xml:space="preserve" | 287 | xml:space="preserve" |
| 284 | x="3305.5364" | 288 | x="3145.9592" |
| 285 | y="13255.592" | 289 | y="13255.592" |
| 286 | font-style="normal" | 290 | font-style="normal" |
| 287 | font-weight="bold" | 291 | font-weight="bold" |
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| 290 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">->gpnum = rsp->gpnum</text> | 294 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 291 | <g | 295 | <g |
| 292 | id="g3107" | 296 | id="g3107" |
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| @@ -366,13 +370,13 @@ · 72 unmodified lines | |||
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| 367 | <text | 371 | <text |
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| 370 | y="15407.104" | 374 | y="15407.032" |
| 371 | font-style="normal" | 375 | font-style="normal" |
| 372 | font-weight="bold" | 376 | font-weight="bold" |
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| 375 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 379 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
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| 377 | <g | 381 | <g |
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| @@ -413,13 +417,13 @@ · 34 unmodified lines | |||
| 413 | id="tspan3104-6-5-6-0">Leaf</tspan></text> | 417 | id="tspan3104-6-5-6-0">Leaf</tspan></text> |
| 414 | <text | 418 | <text |
| 415 | xml:space="preserve" | 419 | xml:space="preserve" |
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| 417 | y="17640.934" | 421 | y="17670.572" |
| 418 | font-style="normal" | 422 | font-style="normal" |
| 419 | font-weight="bold" | 423 | font-weight="bold" |
| 420 | font-size="192" | 424 | font-size="192" |
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| 422 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 426 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
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| 424 | <g | 428 | <g |
| 425 | transform="translate(-1642.5375,-11610.962)" | 429 | transform="translate(-1642.5375,-11610.962)" |
| @@ -448,13 +452,13 @@ · 22 unmodified lines | |||
| 448 | </g> | 452 | </g> |
| 449 | <text | 453 | <text |
| 450 | xml:space="preserve" | 454 | xml:space="preserve" |
| 451 | x="5378.4146" | 455 | x="5258.0688" |
| 452 | y="15436.927" | 456 | y="15412.313" |
| 453 | font-style="normal" | 457 | font-style="normal" |
| 454 | font-weight="bold" | 458 | font-weight="bold" |
| 455 | font-size="192" | 459 | font-size="192" |
| 456 | id="text202-3" | 460 | id="text202-3" |
| 457 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 461 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 458 | </g> | 462 | </g> |
| 459 | <g | 463 | <g |
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| @@ -533,13 +537,13 @@ · 72 unmodified lines | |||
| 533 | id="tspan3104-6-5-6-0-92">Leaf</tspan></text> | 537 | id="tspan3104-6-5-6-0-92">Leaf</tspan></text> |
| 534 | <text | 538 | <text |
| 535 | xml:space="preserve" | 539 | xml:space="preserve" |
| 536 | x="7520.1294" | 540 | x="7405.2607" |
| 537 | y="17673.639" | 541 | y="17670.572" |
| 538 | font-style="normal" | 542 | font-style="normal" |
| 539 | font-weight="bold" | 543 | font-weight="bold" |
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| 542 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 546 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 543 | </g> | 547 | </g> |
| 544 | <g | 548 | <g |
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| @@ -580,13 +584,13 @@ · 34 unmodified lines | |||
| 580 | id="tspan3104-6-5-6-0-1">Leaf</tspan></text> | 584 | id="tspan3104-6-5-6-0-1">Leaf</tspan></text> |
| 581 | <text | 585 | <text |
| 582 | xml:space="preserve" | 586 | xml:space="preserve" |
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| 585 | font-style="normal" | 589 | font-style="normal" |
| 586 | font-weight="bold" | 590 | font-weight="bold" |
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| 589 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 593 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 590 | </g> | 594 | </g> |
| 591 | <path | 595 | <path |
| 592 | style="fill:none;stroke:#000000;stroke-width:13.29812908px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" | 596 | style="fill:none;stroke:#000000;stroke-width:13.29812908px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" |
| @@ -622,11 +626,11 @@ · 29 unmodified lines | |||
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| 628 | font-weight="bold" | 632 | font-weight="bold" |
| 629 | font-size="192" | 633 | font-size="192" |
| 630 | id="text202-62" | 634 | id="text202-62" |
| 631 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 635 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 632 | </svg> | 636 | </svg> |
| @@ -1070,13 +1070,13 @@ · 1069 unmodified lines | |||
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| 1072 | showgrid="true" | 1072 | showgrid="true" |
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| 1075 | inkscape:cy="483.3047" | 1075 | inkscape:cy="5052.4242" |
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| 1077 | inkscape:window-y="28" | 1077 | inkscape:window-y="24" |
| 1078 | inkscape:window-maximized="0" | 1078 | inkscape:window-maximized="0" |
| 1079 | inkscape:current-layer="svg2" | 1079 | inkscape:current-layer="g4" |
| 1080 | fit-margin-top="5" | 1080 | fit-margin-top="5" |
| 1081 | fit-margin-right="5" | 1081 | fit-margin-right="5" |
| 1082 | fit-margin-left="5" | 1082 | fit-margin-left="5" |
| @@ -1543,15 +1543,6 @@ · 460 unmodified lines | |||
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| 1546 | <text | ||
| 1547 | xml:space="preserve" | ||
| 1548 | x="3305.5364" | ||
| 1549 | y="13255.592" | ||
| 1550 | font-style="normal" | ||
| 1551 | font-weight="bold" | ||
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| 1554 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">rsp->gpnum++</text> | ||
| 1555 | <g | 1546 | <g |
| 1556 | id="g3107-62" | 1547 | id="g3107-62" |
| 1557 | transform="translate(947.90548,11584.029)"> | 1548 | transform="translate(947.90548,11584.029)"> |
| @@ -1584,6 +1575,17 @@ · 26 unmodified lines | |||
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| 1586 | id="tspan3104-6-5-7">Root</tspan></text> | 1577 | id="tspan3104-6-5-7">Root</tspan></text> |
| 1578 | <text | ||
| 1579 | xml:space="preserve" | ||
| 1580 | x="3137.9988" | ||
| 1581 | y="13271.316" | ||
| 1582 | font-style="normal" | ||
| 1583 | font-weight="bold" | ||
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| 1586 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan | ||
| 1587 | style="font-size:172.87567139px" | ||
| 1588 | id="tspan3071">rcu_seq_start(rsp->gp_seq)</tspan></text> | ||
| 1587 | </g> | 1589 | </g> |
| 1588 | <rect | 1590 | <rect |
| 1589 | ry="0" | 1591 | ry="0" |
| @@ -2318,15 +2320,6 @@ · 728 unmodified lines | |||
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| 2320 | id="g3188-6"> | 2322 | id="g3188-6"> |
| 2321 | <text | ||
| 2322 | xml:space="preserve" | ||
| 2323 | x="3305.5364" | ||
| 2324 | y="13255.592" | ||
| 2325 | font-style="normal" | ||
| 2326 | font-weight="bold" | ||
| 2327 | font-size="192" | ||
| 2328 | id="text202-1" | ||
| 2329 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">->gpnum = rsp->gpnum</text> | ||
| 2330 | <g | 2323 | <g |
| 2331 | id="g3107-5" | 2324 | id="g3107-5" |
| 2332 | transform="translate(947.90548,11584.029)"> | 2325 | transform="translate(947.90548,11584.029)"> |
| @@ -2359,6 +2352,15 @@ · 26 unmodified lines | |||
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| 2361 | id="tspan3104-6-5-1">Root</tspan></text> | 2354 | id="tspan3104-6-5-1">Root</tspan></text> |
| 2355 | <text | ||
| 2356 | xml:space="preserve" | ||
| 2357 | x="3147.9268" | ||
| 2358 | y="13240.524" | ||
| 2359 | font-style="normal" | ||
| 2360 | font-weight="bold" | ||
| 2361 | font-size="192" | ||
| 2362 | id="text202-1" | ||
| 2363 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> | ||
| 2362 | </g> | 2364 | </g> |
| 2363 | <g | 2365 | <g |
| 2364 | style="fill:none;stroke-width:0.025in" | 2366 | style="fill:none;stroke-width:0.025in" |
| @@ -2387,13 +2389,13 @@ · 22 unmodified lines | |||
| 2387 | </g> | 2389 | </g> |
| 2388 | <text | 2390 | <text |
| 2389 | xml:space="preserve" | 2391 | xml:space="preserve" |
| 2390 | x="5392.3345" | 2392 | x="5263.1094" |
| 2391 | y="15407.104" | 2393 | y="15411.646" |
| 2392 | font-style="normal" | 2394 | font-style="normal" |
| 2393 | font-weight="bold" | 2395 | font-weight="bold" |
| 2394 | font-size="192" | 2396 | font-size="192" |
| 2395 | id="text202-6-7" | 2397 | id="text202-92" |
| 2396 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 2398 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 2397 | </g> | 2399 | </g> |
| 2398 | <g | 2400 | <g |
| 2399 | style="fill:none;stroke-width:0.025in" | 2401 | style="fill:none;stroke-width:0.025in" |
| @@ -2434,13 +2436,13 @@ · 34 unmodified lines | |||
| 2434 | id="tspan3104-6-5-6-0-94">Leaf</tspan></text> | 2436 | id="tspan3104-6-5-6-0-94">Leaf</tspan></text> |
| 2435 | <text | 2437 | <text |
| 2436 | xml:space="preserve" | 2438 | xml:space="preserve" |
| 2437 | x="7536.4883" | 2439 | x="7417.4053" |
| 2438 | y="17640.934" | 2440 | y="17655.502" |
| 2439 | font-style="normal" | 2441 | font-style="normal" |
| 2440 | font-weight="bold" | 2442 | font-weight="bold" |
| 2441 | font-size="192" | 2443 | font-size="192" |
| 2442 | id="text202-9" | 2444 | id="text202-759" |
| 2443 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 2445 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 2444 | </g> | 2446 | </g> |
| 2445 | <g | 2447 | <g |
| 2446 | transform="translate(-2353.8462,17224.992)" | 2448 | transform="translate(-2353.8462,17224.992)" |
| @@ -2469,13 +2471,13 @@ · 22 unmodified lines | |||
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| 2470 | <text | 2472 | <text |
| 2471 | xml:space="preserve" | 2473 | xml:space="preserve" |
| 2472 | x="5378.4146" | 2474 | x="5246.1548" |
| 2473 | y="15436.927" | 2475 | y="15411.648" |
| 2474 | font-style="normal" | 2476 | font-style="normal" |
| 2475 | font-weight="bold" | 2477 | font-weight="bold" |
| 2476 | font-size="192" | 2478 | font-size="192" |
| 2477 | id="text202-3" | 2479 | id="text202-87" |
| 2478 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 2480 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 2479 | </g> | 2481 | </g> |
| 2480 | <g | 2482 | <g |
| 2481 | transform="translate(-863.02613,17188.625)" | 2483 | transform="translate(-863.02613,17188.625)" |
| @@ -2554,13 +2556,13 @@ · 72 unmodified lines | |||
| 2554 | id="tspan3104-6-5-6-0-92-6">Leaf</tspan></text> | 2556 | id="tspan3104-6-5-6-0-92-6">Leaf</tspan></text> |
| 2555 | <text | 2557 | <text |
| 2556 | xml:space="preserve" | 2558 | xml:space="preserve" |
| 2557 | x="7520.1294" | 2559 | x="7433.8257" |
| 2558 | y="17673.639" | 2560 | y="17682.098" |
| 2559 | font-style="normal" | 2561 | font-style="normal" |
| 2560 | font-weight="bold" | 2562 | font-weight="bold" |
| 2561 | font-size="192" | 2563 | font-size="192" |
| 2562 | id="text202-35" | 2564 | id="text202-2" |
| 2563 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 2565 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 2564 | </g> | 2566 | </g> |
| 2565 | <g | 2567 | <g |
| 2566 | transform="translate(-7528.5085,17188.625)" | 2568 | transform="translate(-7528.5085,17188.625)" |
| @@ -2601,13 +2603,13 @@ · 34 unmodified lines | |||
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| 2602 | <text | 2604 | <text |
| 2603 | xml:space="preserve" | 2605 | xml:space="preserve" |
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| 2609 | id="text202-75-1" | 2611 | id="text202-0" |
| 2610 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | 2612 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gp_seq = rsp->gp_seq</text> |
| 2611 | </g> | 2613 | </g> |
| 2612 | <path | 2614 | <path |
| 2613 | style="fill:none;stroke:#000000;stroke-width:13.29812813px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" | 2615 | style="fill:none;stroke:#000000;stroke-width:13.29812813px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1;marker-end:url(#Arrow2Lend)" |
| @@ -2641,15 +2643,6 @@ · 27 unmodified lines | |||
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| 2643 | sodipodi:nodetypes="cc" /> | 2645 | sodipodi:nodetypes="cc" /> |
| 2644 | <text | ||
| 2645 | xml:space="preserve" | ||
| 2646 | x="6659.5469" | ||
| 2647 | y="34833.551" | ||
| 2648 | font-style="normal" | ||
| 2649 | font-weight="bold" | ||
| 2650 | font-size="192" | ||
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| 2652 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->gpnum = rsp->gpnum</text> | ||
| 2653 | <path | 2646 | <path |
| 2654 | sodipodi:nodetypes="ccc" | 2647 | sodipodi:nodetypes="ccc" |
| 2655 | inkscape:connector-curvature="0" | 2648 | inkscape:connector-curvature="0" |
| @@ -3844,7 +3837,7 @@ · 1188 unmodified lines | |||
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| 3847 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">rdp->gpnum</text> | 3840 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">rdp->gp_seq</text> |
| 3848 | <text | 3841 | <text |
| 3849 | xml:space="preserve" | 3842 | xml:space="preserve" |
| 3850 | x="5035.4155" | 3843 | x="5035.4155" |
| @@ -4284,15 +4277,6 @@ · 433 unmodified lines | |||
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| 4286 | id="g3188-7"> | 4279 | id="g3188-7"> |
| 4287 | <text | ||
| 4288 | xml:space="preserve" | ||
| 4289 | x="3199.1516" | ||
| 4290 | y="13255.592" | ||
| 4291 | font-style="normal" | ||
| 4292 | font-weight="bold" | ||
| 4293 | font-size="192" | ||
| 4294 | id="text202-82" | ||
| 4295 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;font-family:Courier">->completed = ->gpnum</text> | ||
| 4296 | <g | 4280 | <g |
| 4297 | id="g3107-53" | 4281 | id="g3107-53" |
| 4298 | transform="translate(947.90548,11584.029)"> | 4282 | transform="translate(947.90548,11584.029)"> |
| @@ -4325,6 +4309,17 @@ · 26 unmodified lines | |||
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| 4327 | id="tspan3104-6-5-19">Root</tspan></text> | 4311 | id="tspan3104-6-5-19">Root</tspan></text> |
| 4312 | <text | ||
| 4313 | xml:space="preserve" | ||
| 4314 | x="3175.896" | ||
| 4315 | y="13240.11" | ||
| 4316 | font-style="normal" | ||
| 4317 | font-weight="bold" | ||
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| 4320 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan | ||
| 4321 | style="font-size:172.87567139px" | ||
| 4322 | id="tspan3166">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| 4330 | ry="0" | 4325 | ry="0" |
| @@ -4371,13 +4366,15 @@ · 40 unmodified lines | |||
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| 4372 | <text | 4367 | <text |
| 4373 | xml:space="preserve" | 4368 | xml:space="preserve" |
| 4374 | x="5324.5371" | 4369 | x="5264.4829" |
| 4375 | y="15414.598" | 4370 | y="15411.231" |
| 4376 | font-style="normal" | 4371 | font-style="normal" |
| 4377 | font-weight="bold" | 4372 | font-weight="bold" |
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| 4380 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | 4375 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier"><tspan |
| 4376 | style="font-size:172.87567139px" | ||
| 4377 | id="tspan3166-5">rcu_seq_end(&rnp->gp_seq)</tspan></text> | ||
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| 4382 | <g | 4379 | <g |
| 4383 | style="fill:none;stroke-width:0.025in" | 4380 | style="fill:none;stroke-width:0.025in" |
| @@ -4412,30 +4409,12 @@ · 28 unmodified lines | |||
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| 4414 | id="tspan3104-6-5-6-0-4">Leaf</tspan></text> | 4411 | id="tspan3104-6-5-6-0-4">Leaf</tspan></text> |
| 4415 | <text | ||
| 4416 | xml:space="preserve" | ||
| 4417 | x="10084.225" | ||
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| 4420 | font-weight="bold" | ||
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| 4423 | style="font-size:192px;font-style:normal;font-weight:bold;text-anchor:start;fill:#000000;stroke-width:0.025in;font-family:Courier">->completed = ->gpnum</text> | ||
| 4424 | <path | 4412 | <path |
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| @@ -300,13 +300,13 @@ · 299 unmodified lines | |||
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| 714 | <text | 714 | <text |
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| @@ -172,7 +172,7 @@ it will print a message similar to the following: · 171 unmodified lines | |||
| 172 | INFO: rcu_sched detected stalls on CPUs/tasks: | 172 | INFO: rcu_sched detected stalls on CPUs/tasks: |
| 173 | 2-...: (3 GPs behind) idle=06c/0/0 softirq=1453/1455 fqs=0 | 173 | 2-...: (3 GPs behind) idle=06c/0/0 softirq=1453/1455 fqs=0 |
| 174 | 16-...: (0 ticks this GP) idle=81c/0/0 softirq=764/764 fqs=0 | 174 | 16-...: (0 ticks this GP) idle=81c/0/0 softirq=764/764 fqs=0 |
| 175 | (detected by 32, t=2603 jiffies, g=7073, c=7072, q=625) | 175 | (detected by 32, t=2603 jiffies, g=7075, q=625) |
| 176 | 176 | ||
| 177 | This message indicates that CPU 32 detected that CPUs 2 and 16 were both | 177 | This message indicates that CPU 32 detected that CPUs 2 and 16 were both |
| 178 | causing stalls, and that the stall was affecting RCU-sched. This message | 178 | causing stalls, and that the stall was affecting RCU-sched. This message |
| @@ -215,11 +215,10 @@ CPU since the last time that this CPU noted the beginning of a grace · 36 unmodified lines | |||
| 215 | period. | 215 | period. |
| 216 | 216 | ||
| 217 | The "detected by" line indicates which CPU detected the stall (in this | 217 | The "detected by" line indicates which CPU detected the stall (in this |
| 218 | case, CPU 32), how many jiffies have elapsed since the start of the | 218 | case, CPU 32), how many jiffies have elapsed since the start of the grace |
| 219 | grace period (in this case 2603), the number of the last grace period | 219 | period (in this case 2603), the grace-period sequence number (7075), and |
| 220 | to start and to complete (7073 and 7072, respectively), and an estimate | 220 | an estimate of the total number of RCU callbacks queued across all CPUs |
| 221 | of the total number of RCU callbacks queued across all CPUs (625 in | 221 | (625 in this case). |
| 222 | this case). | ||
| 223 | 222 | ||
| 224 | In kernels with CONFIG_RCU_FAST_NO_HZ, more information is printed | 223 | In kernels with CONFIG_RCU_FAST_NO_HZ, more information is printed |
| 225 | for each CPU: | 224 | for each CPU: |
| @@ -266,15 +265,16 @@ If the relevant grace-period kthread has been unable to run prior to · 40 unmodified lines | |||
| 266 | the stall warning, as was the case in the "All QSes seen" line above, | 265 | the stall warning, as was the case in the "All QSes seen" line above, |
| 267 | the following additional line is printed: | 266 | the following additional line is printed: |
| 268 | 267 | ||
| 269 | kthread starved for 23807 jiffies! g7073 c7072 f0x0 RCU_GP_WAIT_FQS(3) ->state=0x1 | 268 | kthread starved for 23807 jiffies! g7075 f0x0 RCU_GP_WAIT_FQS(3) ->state=0x1 ->cpu=5 |
| 270 | 269 | ||
| 271 | Starving the grace-period kthreads of CPU time can of course result | 270 | Starving the grace-period kthreads of CPU time can of course result |
| 272 | in RCU CPU stall warnings even when all CPUs and tasks have passed | 271 | in RCU CPU stall warnings even when all CPUs and tasks have passed |
| 273 | through the required quiescent states. The "g" and "c" numbers flag the | 272 | through the required quiescent states. The "g" number shows the current |
| 274 | number of the last grace period started and completed, respectively, | 273 | grace-period sequence number, the "f" precedes the ->gp_flags command |
| 275 | the "f" precedes the ->gp_flags command to the grace-period kthread, | 274 | to the grace-period kthread, the "RCU_GP_WAIT_FQS" indicates that the |
| 276 | the "RCU_GP_WAIT_FQS" indicates that the kthread is waiting for a short | 275 | kthread is waiting for a short timeout, the "state" precedes value of the |
| 277 | timeout, and the "state" precedes value of the task_struct ->state field. | 276 | task_struct ->state field, and the "cpu" indicates that the grace-period |
| 277 | kthread last ran on CPU 5. | ||
| 278 | 278 | ||
| 279 | 279 | ||
| 280 | Multiple Warnings From One Stall | 280 | Multiple Warnings From One Stall |
| @@ -588,6 +588,7 @@ It is extremely simple: · 587 unmodified lines | |||
| 588 | void synchronize_rcu(void) | 588 | void synchronize_rcu(void) |
| 589 | { | 589 | { |
| 590 | write_lock(&rcu_gp_mutex); | 590 | write_lock(&rcu_gp_mutex); |
| 591 | smp_mb__after_spinlock(); | ||
| 591 | write_unlock(&rcu_gp_mutex); | 592 | write_unlock(&rcu_gp_mutex); |
| 592 | } | 593 | } |
| 593 | 594 | ||
| @@ -609,12 +610,15 @@ don't forget about them when submitting patches making use of RCU!] · 15 unmodified lines | |||
| 609 | 610 | ||
| 610 | The rcu_read_lock() and rcu_read_unlock() primitive read-acquire | 611 | The rcu_read_lock() and rcu_read_unlock() primitive read-acquire |
| 611 | and release a global reader-writer lock. The synchronize_rcu() | 612 | and release a global reader-writer lock. The synchronize_rcu() |
| 612 | primitive write-acquires this same lock, then immediately releases | 613 | primitive write-acquires this same lock, then releases it. This means |
| 613 | it. This means that once synchronize_rcu() exits, all RCU read-side | 614 | that once synchronize_rcu() exits, all RCU read-side critical sections |
| 614 | critical sections that were in progress before synchronize_rcu() was | 615 | that were in progress before synchronize_rcu() was called are guaranteed |
| 615 | called are guaranteed to have completed -- there is no way that | 616 | to have completed -- there is no way that synchronize_rcu() would have |
| 616 | synchronize_rcu() would have been able to write-acquire the lock | 617 | been able to write-acquire the lock otherwise. The smp_mb__after_spinlock() |
| 617 | otherwise. | 618 | promotes synchronize_rcu() to a full memory barrier in compliance with |
| 619 | the "Memory-Barrier Guarantees" listed in: | ||
| 620 | |||
| 621 | Documentation/RCU/Design/Requirements/Requirements.html. | ||
| 618 | 622 | ||
| 619 | It is possible to nest rcu_read_lock(), since reader-writer locks may | 623 | It is possible to nest rcu_read_lock(), since reader-writer locks may |
| 620 | be recursively acquired. Note also that rcu_read_lock() is immune | 624 | be recursively acquired. Note also that rcu_read_lock() is immune |
| @@ -816,11 +820,13 @@ RCU list traversal: · 195 unmodified lines | |||
| 816 | list_next_rcu | 820 | list_next_rcu |
| 817 | list_for_each_entry_rcu | 821 | list_for_each_entry_rcu |
| 818 | list_for_each_entry_continue_rcu | 822 | list_for_each_entry_continue_rcu |
| 823 | list_for_each_entry_from_rcu | ||
| 819 | hlist_first_rcu | 824 | hlist_first_rcu |
| 820 | hlist_next_rcu | 825 | hlist_next_rcu |
| 821 | hlist_pprev_rcu | 826 | hlist_pprev_rcu |
| 822 | hlist_for_each_entry_rcu | 827 | hlist_for_each_entry_rcu |
| 823 | hlist_for_each_entry_rcu_bh | 828 | hlist_for_each_entry_rcu_bh |
| 829 | hlist_for_each_entry_from_rcu | ||
| 824 | hlist_for_each_entry_continue_rcu | 830 | hlist_for_each_entry_continue_rcu |
| 825 | hlist_for_each_entry_continue_rcu_bh | 831 | hlist_for_each_entry_continue_rcu_bh |
| 826 | hlist_nulls_first_rcu | 832 | hlist_nulls_first_rcu |
| @@ -0,0 +1,89 @@ | |||
| 1 | Copyright (C) 2018 Intel Corporation | ||
| 2 | Author: Sakari Ailus <sakari.ailus@linux.intel.com> | ||
| 3 | |||
| 4 | |||
| 5 | Referencing hierarchical data nodes | ||
| 6 | ----------------------------------- | ||
| 7 | |||
| 8 | ACPI in general allows referring to device objects in the tree only. | ||
| 9 | Hierarchical data extension nodes may not be referred to directly, hence this | ||
| 10 | document defines a scheme to implement such references. | ||
| 11 | |||
| 12 | A reference consist of the device object name followed by one or more | ||
| 13 | hierarchical data extension [1] keys. Specifically, the hierarchical data | ||
| 14 | extension node which is referred to by the key shall lie directly under the | ||
| 15 | parent object i.e. either the device object or another hierarchical data | ||
| 16 | extension node. | ||
| 17 | |||
| 18 | The keys in the hierarchical data nodes shall consist of the name of the node, | ||
| 19 | "@" character and the number of the node in hexadecimal notation (without pre- | ||
| 20 | or postfixes). The same ACPI object shall include the _DSD property extension | ||
| 21 | with a property "reg" that shall have the same numerical value as the number of | ||
| 22 | the node. | ||
| 23 | |||
| 24 | In case a hierarchical data extensions node has no numerical value, then the | ||
| 25 | "reg" property shall be omitted from the ACPI object's _DSD properties and the | ||
| 26 | "@" character and the number shall be omitted from the hierarchical data | ||
| 27 | extension key. | ||
| 28 | |||
| 29 | |||
| 30 | Example | ||
| 31 | ------- | ||
| 32 | |||
| 33 | In the ASL snippet below, the "reference" _DSD property [2] contains a | ||
| 34 | device object reference to DEV0 and under that device object, a | ||
| 35 | hierarchical data extension key "node@1" referring to the NOD1 object | ||
| 36 | and lastly, a hierarchical data extension key "anothernode" referring to | ||
| 37 | the ANOD object which is also the final target node of the reference. | ||
| 38 | |||
| 39 | Device (DEV0) | ||
| 40 | { | ||
| 41 | Name (_DSD, Package () { | ||
| 42 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | ||
| 43 | Package () { | ||
| 44 | Package () { "node@0", NOD0 }, | ||
| 45 | Package () { "node@1", NOD1 }, | ||
| 46 | } | ||
| 47 | }) | ||
| 48 | Name (NOD0, Package() { | ||
| 49 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | ||
| 50 | Package () { | ||
| 51 | Package () { "random-property", 3 }, | ||
| 52 | } | ||
| 53 | }) | ||
| 54 | Name (NOD1, Package() { | ||
| 55 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | ||
| 56 | Package () { | ||
| 57 | Package () { "anothernode", ANOD }, | ||
| 58 | } | ||
| 59 | }) | ||
| 60 | Name (ANOD, Package() { | ||
| 61 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | ||
| 62 | Package () { | ||
| 63 | Package () { "random-property", 0 }, | ||
| 64 | } | ||
| 65 | }) | ||
| 66 | } | ||
| 67 | |||
| 68 | Device (DEV1) | ||
| 69 | { | ||
| 70 | Name (_DSD, Package () { | ||
| 71 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | ||
| 72 | Package () { | ||
| 73 | Package () { "reference", ^DEV0, "node@1", "anothernode" }, | ||
| 74 | } | ||
| 75 | }) | ||
| 76 | } | ||
| 77 | |||
| 78 | Please also see a graph example in graph.txt . | ||
| 79 | |||
| 80 | References | ||
| 81 | ---------- | ||
| 82 | |||
| 83 | [1] Hierarchical Data Extension UUID For _DSD. | ||
| 84 | <URL:http://www.uefi.org/sites/default/files/resources/_DSD-hierarchical-data-extension-UUID-v1.1.pdf>, | ||
| 85 | referenced 2018-07-17. | ||
| 86 | |||
| 87 | [2] Device Properties UUID For _DSD. | ||
| 88 | <URL:http://www.uefi.org/sites/default/files/resources/_DSD-device-properties-UUID.pdf>, | ||
| 89 | referenced 2016-10-04. | ||
| @@ -36,29 +36,41 @@ The port and endpoint concepts are very similar to those in Devicetree · 35 unmodified lines | |||
| 36 | [3]. A port represents an interface in a device, and an endpoint | 36 | [3]. A port represents an interface in a device, and an endpoint |
| 37 | represents a connection to that interface. | 37 | represents a connection to that interface. |
| 38 | 38 | ||
| 39 | All port nodes are located under the device's "_DSD" node in the | 39 | All port nodes are located under the device's "_DSD" node in the hierarchical |
| 40 | hierarchical data extension tree. The property extension related to | 40 | data extension tree. The data extension related to each port node must begin |
| 41 | each port node must contain the key "port" and an integer value which | 41 | with "port" and must be followed by the "@" character and the number of the port |
| 42 | is the number of the port. The object it refers to should be called "PRTX", | 42 | as its key. The target object it refers to should be called "PRTX", where "X" is |
| 43 | where "X" is the number of the port. | 43 | the number of the port. An example of such a package would be: |
| 44 | 44 | ||
| 45 | Further on, endpoints are located under the individual port nodes. The | 45 | Package() { "port@4", PRT4 } |
| 46 | first hierarchical data extension package list entry of the endpoint | 46 | |
| 47 | nodes must begin with "endpoint" and must be followed by the number | 47 | Further on, endpoints are located under the port nodes. The hierarchical |
| 48 | of the endpoint. The object it refers to should be called "EPXY", where | 48 | data extension key of the endpoint nodes must begin with |
| 49 | "X" is the number of the port and "Y" is the number of the endpoint. | 49 | "endpoint" and must be followed by the "@" character and the number of the |
| 50 | 50 | endpoint. The object it refers to should be called "EPXY", where "X" is the | |
| 51 | Each port node contains a property extension key "port", the value of | 51 | number of the port and "Y" is the number of the endpoint. An example of such a |
| 52 | which is the number of the port node. The each endpoint is similarly numbered | 52 | package would be: |
| 53 | with a property extension key "endpoint". Port numbers must be unique within a | 53 | |
| 54 | device and endpoint numbers must be unique within a port. | 54 | Package() { "endpoint@0", EP40 } |
| 55 | |||
| 56 | Each port node contains a property extension key "port", the value of which is | ||
| 57 | the number of the port. Each endpoint is similarly numbered with a property | ||
| 58 | extension key "reg", the value of which is the number of the endpoint. Port | ||
| 59 | numbers must be unique within a device and endpoint numbers must be unique | ||
| 60 | within a port. If a device object may only has a single port, then the number | ||
| 61 | of that port shall be zero. Similarly, if a port may only have a single | ||
| 62 | endpoint, the number of that endpoint shall be zero. | ||
| 55 | 63 | ||
| 56 | The endpoint reference uses property extension with "remote-endpoint" property | 64 | The endpoint reference uses property extension with "remote-endpoint" property |
| 57 | name followed by a reference in the same package. Such references consist of the | 65 | name followed by a reference in the same package. Such references consist of the |
| 58 | the remote device reference, number of the port in the device and finally the | 66 | the remote device reference, the first package entry of the port data extension |
| 59 | number of the endpoint in that port. Individual references thus appear as: | 67 | reference under the device and finally the first package entry of the endpoint |
| 68 | data extension reference under the port. Individual references thus appear as: | ||
| 60 | 69 | ||
| 61 | Package() { device, port_number, endpoint_number } | 70 | Package() { device, "port@X", "endpoint@Y" } |
| 71 | |||
| 72 | In the above example, "X" is the number of the port and "Y" is the number of the | ||
| 73 | endpoint. | ||
| 62 | 74 | ||
| 63 | The references to endpoints must be always done both ways, to the | 75 | The references to endpoints must be always done both ways, to the |
| 64 | remote endpoint and back from the referred remote endpoint node. | 76 | remote endpoint and back from the referred remote endpoint node. |
| @@ -76,24 +88,24 @@ A simple example of this is show below: · 11 unmodified lines | |||
| 76 | }, | 88 | }, |
| 77 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | 89 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), |
| 78 | Package () { | 90 | Package () { |
| 79 | Package () { "port0", "PRT0" }, | 91 | Package () { "port@0", PRT0 }, |
| 80 | } | 92 | } |
| 81 | }) | 93 | }) |
| 82 | Name (PRT0, Package() { | 94 | Name (PRT0, Package() { |
| 83 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | 95 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), |
| 84 | Package () { | 96 | Package () { |
| 85 | Package () { "port", 0 }, | 97 | Package () { "reg", 0 }, |
| 86 | }, | 98 | }, |
| 87 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | 99 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), |
| 88 | Package () { | 100 | Package () { |
| 89 | Package () { "endpoint0", "EP00" }, | 101 | Package () { "endpoint@0", EP00 }, |
| 90 | } | 102 | } |
| 91 | }) | 103 | }) |
| 92 | Name (EP00, Package() { | 104 | Name (EP00, Package() { |
| 93 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | 105 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), |
| 94 | Package () { | 106 | Package () { |
| 95 | Package () { "endpoint", 0 }, | 107 | Package () { "reg", 0 }, |
| 96 | Package () { "remote-endpoint", Package() { \_SB.PCI0.ISP, 4, 0 } }, | 108 | Package () { "remote-endpoint", Package() { \_SB.PCI0.ISP, "port@4", "endpoint@0" } }, |
| 97 | } | 109 | } |
| 98 | }) | 110 | }) |
| 99 | } | 111 | } |
| @@ -106,26 +118,26 @@ A simple example of this is show below: · 6 unmodified lines | |||
| 106 | Name (_DSD, Package () { | 118 | Name (_DSD, Package () { |
| 107 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | 119 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), |
| 108 | Package () { | 120 | Package () { |
| 109 | Package () { "port4", "PRT4" }, | 121 | Package () { "port@4", PRT4 }, |
| 110 | } | 122 | } |
| 111 | }) | 123 | }) |
| 112 | 124 | ||
| 113 | Name (PRT4, Package() { | 125 | Name (PRT4, Package() { |
| 114 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | 126 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), |
| 115 | Package () { | 127 | Package () { |
| 116 | Package () { "port", 4 }, /* CSI-2 port number */ | 128 | Package () { "reg", 4 }, /* CSI-2 port number */ |
| 117 | }, | 129 | }, |
| 118 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), | 130 | ToUUID("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), |
| 119 | Package () { | 131 | Package () { |
| 120 | Package () { "endpoint0", "EP40" }, | 132 | Package () { "endpoint@0", EP40 }, |
| 121 | } | 133 | } |
| 122 | }) | 134 | }) |
| 123 | 135 | ||
| 124 | Name (EP40, Package() { | 136 | Name (EP40, Package() { |
| 125 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), | 137 | ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), |
| 126 | Package () { | 138 | Package () { |
| 127 | Package () { "endpoint", 0 }, | 139 | Package () { "reg", 0 }, |
| 128 | Package () { "remote-endpoint", Package () { \_SB.PCI0.I2C2.CAM0, 0, 0 } }, | 140 | Package () { "remote-endpoint", Package () { \_SB.PCI0.I2C2.CAM0, "port@0", "endpoint@0" } }, |
| 129 | } | 141 | } |
| 130 | }) | 142 | }) |
| 131 | } | 143 | } |
| @@ -151,7 +163,7 @@ References · 19 unmodified lines | |||
| 151 | referenced 2016-10-04. | 163 | referenced 2016-10-04. |
| 152 | 164 | ||
| 153 | [5] Hierarchical Data Extension UUID For _DSD. | 165 | [5] Hierarchical Data Extension UUID For _DSD. |
| 154 | <URL:http://www.uefi.org/sites/default/files/resources/_DSD-hierarchical-data-extension-UUID-v1.pdf>, | 166 | <URL:http://www.uefi.org/sites/default/files/resources/_DSD-hierarchical-data-extension-UUID-v1.1.pdf>, |
| 155 | referenced 2016-10-04. | 167 | referenced 2016-10-04. |
| 156 | 168 | ||
| 157 | [6] Advanced Configuration and Power Interface Specification. | 169 | [6] Advanced Configuration and Power Interface Specification. |
| @@ -1,3 +1,5 @@ | |||
| 1 | .. _readme: | ||
| 2 | |||
| 1 | Linux kernel release 4.x <http://kernel.org/> | 3 | Linux kernel release 4.x <http://kernel.org/> |
| 2 | ============================================= | 4 | ============================================= |
| 3 | 5 | ||
| @@ -51,6 +51,9 @@ v1 is available under Documentation/cgroup-v1/. · 50 unmodified lines | |||
| 51 | 5-3. IO | 51 | 5-3. IO |
| 52 | 5-3-1. IO Interface Files | 52 | 5-3-1. IO Interface Files |
| 53 | 5-3-2. Writeback | 53 | 5-3-2. Writeback |
| 54 | 5-3-3. IO Latency | ||
| 55 | 5-3-3-1. How IO Latency Throttling Works | ||
| 56 | 5-3-3-2. IO Latency Interface Files | ||
| 54 | 5-4. PID | 57 | 5-4. PID |
| 55 | 5-4-1. PID Interface Files | 58 | 5-4-1. PID Interface Files |
| 56 | 5-5. Device | 59 | 5-5. Device |
| @@ -1069,6 +1072,24 @@ PAGE_SIZE multiple when read back. · 1012 unmodified lines | |||
| 1069 | high limit is used and monitored properly, this limit's | 1072 | high limit is used and monitored properly, this limit's |
| 1070 | utility is limited to providing the final safety net. | 1073 | utility is limited to providing the final safety net. |
| 1071 | 1074 | ||
| 1075 | memory.oom.group | ||
| 1076 | A read-write single value file which exists on non-root | ||
| 1077 | cgroups. The default value is "0". | ||
| 1078 | |||
| 1079 | Determines whether the cgroup should be treated as | ||
| 1080 | an indivisible workload by the OOM killer. If set, | ||
| 1081 | all tasks belonging to the cgroup or to its descendants | ||
| 1082 | (if the memory cgroup is not a leaf cgroup) are killed | ||
| 1083 | together or not at all. This can be used to avoid | ||
| 1084 | partial kills to guarantee workload integrity. | ||
| 1085 | |||
| 1086 | Tasks with the OOM protection (oom_score_adj set to -1000) | ||
| 1087 | are treated as an exception and are never killed. | ||
| 1088 | |||
| 1089 | If the OOM killer is invoked in a cgroup, it's not going | ||
| 1090 | to kill any tasks outside of this cgroup, regardless | ||
| 1091 | memory.oom.group values of ancestor cgroups. | ||
| 1092 | |||
| 1072 | memory.events | 1093 | memory.events |
| 1073 | A read-only flat-keyed file which exists on non-root cgroups. | 1094 | A read-only flat-keyed file which exists on non-root cgroups. |
| 1074 | The following entries are defined. Unless specified | 1095 | The following entries are defined. Unless specified |
| @@ -1314,17 +1335,19 @@ IO Interface Files · 239 unmodified lines | |||
| 1314 | Lines are keyed by $MAJ:$MIN device numbers and not ordered. | 1335 | Lines are keyed by $MAJ:$MIN device numbers and not ordered. |
| 1315 | The following nested keys are defined. | 1336 | The following nested keys are defined. |
| 1316 | 1337 | ||
| 1317 | ====== =================== | 1338 | ====== ===================== |
| 1318 | rbytes Bytes read | 1339 | rbytes Bytes read |
| 1319 | wbytes Bytes written | 1340 | wbytes Bytes written |
| 1320 | rios Number of read IOs | 1341 | rios Number of read IOs |
| 1321 | wios Number of write IOs | 1342 | wios Number of write IOs |
| 1322 | ====== =================== | 1343 | dbytes Bytes discarded |
| 1344 | dios Number of discard IOs | ||
| 1345 | ====== ===================== | ||
| 1323 | 1346 | ||
| 1324 | An example read output follows: | 1347 | An example read output follows: |
| 1325 | 1348 | ||
| 1326 | 8:16 rbytes=1459200 wbytes=314773504 rios=192 wios=353 | 1349 | 8:16 rbytes=1459200 wbytes=314773504 rios=192 wios=353 dbytes=0 dios=0 |
| 1327 | 8:0 rbytes=90430464 wbytes=299008000 rios=8950 wios=1252 | 1350 | 8:0 rbytes=90430464 wbytes=299008000 rios=8950 wios=1252 dbytes=50331648 dios=3021 |
| 1328 | 1351 | ||
| 1329 | io.weight | 1352 | io.weight |
| 1330 | A read-write flat-keyed file which exists on non-root cgroups. | 1353 | A read-write flat-keyed file which exists on non-root cgroups. |
| @@ -1446,6 +1469,85 @@ writeback as follows. · 115 unmodified lines | |||
| 1446 | vm.dirty[_background]_ratio. | 1469 | vm.dirty[_background]_ratio. |
| 1447 | 1470 | ||
| 1448 | 1471 | ||
| 1472 | IO Latency | ||
| 1473 | ~~~~~~~~~~ | ||
| 1474 | |||
| 1475 | This is a cgroup v2 controller for IO workload protection. You provide a group | ||
| 1476 | with a latency target, and if the average latency exceeds that target the | ||
| 1477 | controller will throttle any peers that have a lower latency target than the | ||
| 1478 | protected workload. | ||
| 1479 | |||
| 1480 | The limits are only applied at the peer level in the hierarchy. This means that | ||
| 1481 | in the diagram below, only groups A, B, and C will influence each other, and | ||
| 1482 | groups D and F will influence each other. Group G will influence nobody. | ||
| 1483 | |||
| 1484 | [root] | ||
| 1485 | / | \ | ||
| 1486 | A B C | ||
| 1487 | / \ | | ||
| 1488 | D F G | ||
| 1489 | |||
| 1490 | |||
| 1491 | So the ideal way to configure this is to set io.latency in groups A, B, and C. | ||
| 1492 | Generally you do not want to set a value lower than the latency your device | ||
| 1493 | supports. Experiment to find the value that works best for your workload. | ||
| 1494 | Start at higher than the expected latency for your device and watch the | ||
| 1495 | avg_lat value in io.stat for your workload group to get an idea of the | ||
| 1496 | latency you see during normal operation. Use the avg_lat value as a basis for | ||
| 1497 | your real setting, setting at 10-15% higher than the value in io.stat. | ||
| 1498 | |||
| 1499 | How IO Latency Throttling Works | ||
| 1500 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 1501 | |||
| 1502 | io.latency is work conserving; so as long as everybody is meeting their latency | ||
| 1503 | target the controller doesn't do anything. Once a group starts missing its | ||
| 1504 | target it begins throttling any peer group that has a higher target than itself. | ||
| 1505 | This throttling takes 2 forms: | ||
| 1506 | |||
| 1507 | - Queue depth throttling. This is the number of outstanding IO's a group is | ||
| 1508 | allowed to have. We will clamp down relatively quickly, starting at no limit | ||
| 1509 | and going all the way down to 1 IO at a time. | ||
| 1510 | |||
| 1511 | - Artificial delay induction. There are certain types of IO that cannot be | ||
| 1512 | throttled without possibly adversely affecting higher priority groups. This | ||
| 1513 | includes swapping and metadata IO. These types of IO are allowed to occur | ||
| 1514 | normally, however they are "charged" to the originating group. If the | ||
| 1515 | originating group is being throttled you will see the use_delay and delay | ||
| 1516 | fields in io.stat increase. The delay value is how many microseconds that are | ||
| 1517 | being added to any process that runs in this group. Because this number can | ||
| 1518 | grow quite large if there is a lot of swapping or metadata IO occurring we | ||
| 1519 | limit the individual delay events to 1 second at a time. | ||
| 1520 | |||
| 1521 | Once the victimized group starts meeting its latency target again it will start | ||
| 1522 | unthrottling any peer groups that were throttled previously. If the victimized | ||
| 1523 | group simply stops doing IO the global counter will unthrottle appropriately. | ||
| 1524 | |||
| 1525 | IO Latency Interface Files | ||
| 1526 | ~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 1527 | |||
| 1528 | io.latency | ||
| 1529 | This takes a similar format as the other controllers. | ||
| 1530 | |||
| 1531 | "MAJOR:MINOR target=<target time in microseconds" | ||
| 1532 | |||
| 1533 | io.stat | ||
| 1534 | If the controller is enabled you will see extra stats in io.stat in | ||
| 1535 | addition to the normal ones. | ||
| 1536 | |||
| 1537 | depth | ||
| 1538 | This is the current queue depth for the group. | ||
| 1539 | |||
| 1540 | avg_lat | ||
| 1541 | This is an exponential moving average with a decay rate of 1/exp | ||
| 1542 | bound by the sampling interval. The decay rate interval can be | ||
| 1543 | calculated by multiplying the win value in io.stat by the | ||
| 1544 | corresponding number of samples based on the win value. | ||
| 1545 | |||
| 1546 | win | ||
| 1547 | The sampling window size in milliseconds. This is the minimum | ||
| 1548 | duration of time between evaluation events. Windows only elapse | ||
| 1549 | with IO activity. Idle periods extend the most recent window. | ||
| 1550 | |||
| 1449 | PID | 1551 | PID |
| 1450 | --- | 1552 | --- |
| 1451 | 1553 | ||
| @@ -173,14 +173,18 @@ · 172 unmodified lines | |||
| 173 | they are redirected through the parport multiplex layer. | 173 | they are redirected through the parport multiplex layer. |
| 174 | 174 | ||
| 175 | 7 char Virtual console capture devices | 175 | 7 char Virtual console capture devices |
| 176 | 0 = /dev/vcs Current vc text contents | 176 | 0 = /dev/vcs Current vc text (glyph) contents |
| 177 | 1 = /dev/vcs1 tty1 text contents | 177 | 1 = /dev/vcs1 tty1 text (glyph) contents |
| 178 | ... | 178 | ... |
| 179 | 63 = /dev/vcs63 tty63 text contents | 179 | 63 = /dev/vcs63 tty63 text (glyph) contents |
| 180 | 128 = /dev/vcsa Current vc text/attribute contents | 180 | 64 = /dev/vcsu Current vc text (unicode) contents |
| 181 | 129 = /dev/vcsa1 tty1 text/attribute contents | 181 | 65 = /dev/vcsu1 tty1 text (unicode) contents |
| 182 | ... | 182 | ... |
| 183 | 191 = /dev/vcsa63 tty63 text/attribute contents | 183 | 127 = /dev/vcsu63 tty63 text (unicode) contents |
| 184 | 128 = /dev/vcsa Current vc text/attribute (glyph) contents | ||
| 185 | 129 = /dev/vcsa1 tty1 text/attribute (glyph) contents | ||
| 186 | ... | ||
| 187 | 191 = /dev/vcsa63 tty63 text/attribute (glyph) contents | ||
| 184 | 188 | ||
| 185 | NOTE: These devices permit both read and write access. | 189 | NOTE: These devices permit both read and write access. |
| 186 | 190 | ||
| @@ -17,6 +17,15 @@ etc. · 16 unmodified lines | |||
| 17 | kernel-parameters | 17 | kernel-parameters |
| 18 | devices | 18 | devices |
| 19 | 19 | ||
| 20 | This section describes CPU vulnerabilities and provides an overview of the | ||
| 21 | possible mitigations along with guidance for selecting mitigations if they | ||
| 22 | are configurable at compile, boot or run time. | ||
| 23 | |||
| 24 | .. toctree:: | ||
| 25 | :maxdepth: 1 | ||
| 26 | |||
| 27 | l1tf | ||
| 28 | |||
| 20 | Here is a set of documents aimed at users who are trying to track down | 29 | Here is a set of documents aimed at users who are trying to track down |
| 21 | problems and bugs in particular. | 30 | problems and bugs in particular. |
| 22 | 31 | ||
| @@ -748,6 +748,14 @@ · 747 unmodified lines | |||
| 748 | 748 | ||
| 749 | debug [KNL] Enable kernel debugging (events log level). | 749 | debug [KNL] Enable kernel debugging (events log level). |
| 750 | 750 | ||
| 751 | debug_boot_weak_hash | ||
| 752 | [KNL] Enable printing [hashed] pointers early in the | ||
| 753 | boot sequence. If enabled, we use a weak hash instead | ||
| 754 | of siphash to hash pointers. Use this option if you are | ||
| 755 | seeing instances of '(___ptrval___)') and need to see a | ||
| 756 | value (hashed pointer) instead. Cryptographically | ||
| 757 | insecure, please do not use on production kernels. | ||
| 758 | |||
| 751 | debug_locks_verbose= | 759 | debug_locks_verbose= |
| 752 | [KNL] verbose self-tests | 760 | [KNL] verbose self-tests |
| 753 | Format=<0|1> | 761 | Format=<0|1> |
| @@ -804,6 +812,15 @@ · 50 unmodified lines | |||
| 804 | Defaults to the default architecture's huge page size | 812 | Defaults to the default architecture's huge page size |
| 805 | if not specified. | 813 | if not specified. |
| 806 | 814 | ||
| 815 | deferred_probe_timeout= | ||
| 816 | [KNL] Debugging option to set a timeout in seconds for | ||
| 817 | deferred probe to give up waiting on dependencies to | ||
| 818 | probe. Only specific dependencies (subsystems or | ||
| 819 | drivers) that have opted in will be ignored. A timeout of 0 | ||
| 820 | will timeout at the end of initcalls. This option will also | ||
| 821 | dump out devices still on the deferred probe list after | ||
| 822 | retrying. | ||
| 823 | |||
| 807 | dhash_entries= [KNL] | 824 | dhash_entries= [KNL] |
| 808 | Set number of hash buckets for dentry cache. | 825 | Set number of hash buckets for dentry cache. |
| 809 | 826 | ||
| @@ -816,6 +833,17 @@ · 6 unmodified lines | |||
| 816 | disable= [IPV6] | 833 | disable= [IPV6] |
| 817 | See Documentation/networking/ipv6.txt. | 834 | See Documentation/networking/ipv6.txt. |
| 818 | 835 | ||
| 836 | hardened_usercopy= | ||
| 837 | [KNL] Under CONFIG_HARDENED_USERCOPY, whether | ||
| 838 | hardening is enabled for this boot. Hardened | ||
| 839 | usercopy checking is used to protect the kernel | ||
| 840 | from reading or writing beyond known memory | ||
| 841 | allocation boundaries as a proactive defense | ||
| 842 | against bounds-checking flaws in the kernel's | ||
| 843 | copy_to_user()/copy_from_user() interface. | ||
| 844 | on Perform hardened usercopy checks (default). | ||
| 845 | off Disable hardened usercopy checks. | ||
| 846 | |||
| 819 | disable_radix [PPC] | 847 | disable_radix [PPC] |
| 820 | Disable RADIX MMU mode on POWER9 | 848 | Disable RADIX MMU mode on POWER9 |
| 821 | 849 | ||
| @@ -1716,7 +1744,8 @@ · 894 unmodified lines | |||
| 1716 | merge | 1744 | merge |
| 1717 | nomerge | 1745 | nomerge |
| 1718 | soft | 1746 | soft |
| 1719 | pt [x86, IA-64] | 1747 | pt [x86] |
| 1748 | nopt [x86] | ||
| 1720 | nobypass [PPC/POWERNV] | 1749 | nobypass [PPC/POWERNV] |
| 1721 | Disable IOMMU bypass, using IOMMU for PCI devices. | 1750 | Disable IOMMU bypass, using IOMMU for PCI devices. |
| 1722 | 1751 | ||
| @@ -1967,10 +1996,84 @@ · 244 unmodified lines | |||
| 1967 | (virtualized real and unpaged mode) on capable | 1996 | (virtualized real and unpaged mode) on capable |
| 1968 | Intel chips. Default is 1 (enabled) | 1997 | Intel chips. Default is 1 (enabled) |
| 1969 | 1998 | ||
| 1999 | kvm-intel.vmentry_l1d_flush=[KVM,Intel] Mitigation for L1 Terminal Fault | ||
| 2000 | CVE-2018-3620. | ||
| 2001 | |||
| 2002 | Valid arguments: never, cond, always | ||
| 2003 | |||
| 2004 | always: L1D cache flush on every VMENTER. | ||
| 2005 | cond: Flush L1D on VMENTER only when the code between | ||
| 2006 | VMEXIT and VMENTER can leak host memory. | ||
| 2007 | never: Disables the mitigation | ||
| 2008 | |||
| 2009 | Default is cond (do L1 cache flush in specific instances) | ||
| 2010 | |||
| 1970 | kvm-intel.vpid= [KVM,Intel] Disable Virtual Processor Identification | 2011 | kvm-intel.vpid= [KVM,Intel] Disable Virtual Processor Identification |
| 1971 | feature (tagged TLBs) on capable Intel chips. | 2012 | feature (tagged TLBs) on capable Intel chips. |
| 1972 | Default is 1 (enabled) | 2013 | Default is 1 (enabled) |
| 1973 | 2014 | ||
| 2015 | l1tf= [X86] Control mitigation of the L1TF vulnerability on | ||
| 2016 | affected CPUs | ||
| 2017 | |||
| 2018 | The kernel PTE inversion protection is unconditionally | ||
| 2019 | enabled and cannot be disabled. | ||
| 2020 | |||
| 2021 | full | ||
| 2022 | Provides all available mitigations for the | ||
| 2023 | L1TF vulnerability. Disables SMT and | ||
| 2024 | enables all mitigations in the | ||
| 2025 | hypervisors, i.e. unconditional L1D flush. | ||
| 2026 | |||
| 2027 | SMT control and L1D flush control via the | ||
| 2028 | sysfs interface is still possible after | ||
| 2029 | boot. Hypervisors will issue a warning | ||
| 2030 | when the first VM is started in a | ||
| 2031 | potentially insecure configuration, | ||
| 2032 | i.e. SMT enabled or L1D flush disabled. | ||
| 2033 | |||
| 2034 | full,force | ||
| 2035 | Same as 'full', but disables SMT and L1D | ||
| 2036 | flush runtime control. Implies the | ||
| 2037 | 'nosmt=force' command line option. | ||
| 2038 | (i.e. sysfs control of SMT is disabled.) | ||
| 2039 | |||
| 2040 | flush | ||
| 2041 | Leaves SMT enabled and enables the default | ||
| 2042 | hypervisor mitigation, i.e. conditional | ||
| 2043 | L1D flush. | ||
| 2044 | |||
| 2045 | SMT control and L1D flush control via the | ||
| 2046 | sysfs interface is still possible after | ||
| 2047 | boot. Hypervisors will issue a warning | ||
| 2048 | when the first VM is started in a | ||
| 2049 | potentially insecure configuration, | ||
| 2050 | i.e. SMT enabled or L1D flush disabled. | ||
| 2051 | |||
| 2052 | flush,nosmt | ||
| 2053 | |||
| 2054 | Disables SMT and enables the default | ||
| 2055 | hypervisor mitigation. | ||
| 2056 | |||
| 2057 | SMT control and L1D flush control via the | ||
| 2058 | sysfs interface is still possible after | ||
| 2059 | boot. Hypervisors will issue a warning | ||
| 2060 | when the first VM is started in a | ||
| 2061 | potentially insecure configuration, | ||
| 2062 | i.e. SMT enabled or L1D flush disabled. | ||
| 2063 | |||
| 2064 | flush,nowarn | ||
| 2065 | Same as 'flush', but hypervisors will not | ||
| 2066 | warn when a VM is started in a potentially | ||
| 2067 | insecure configuration. | ||
| 2068 | |||
| 2069 | off | ||
| 2070 | Disables hypervisor mitigations and doesn't | ||
| 2071 | emit any warnings. | ||
| 2072 | |||
| 2073 | Default is 'flush'. | ||
| 2074 | |||
| 2075 | For details see: Documentation/admin-guide/l1tf.rst | ||
| 2076 | |||
| 1974 | l2cr= [PPC] | 2077 | l2cr= [PPC] |
| 1975 | 2078 | ||
| 1976 | l3cr= [PPC] | 2079 | l3cr= [PPC] |
| @@ -2687,6 +2790,14 @@ · 710 unmodified lines | |||
| 2687 | nosmt [KNL,S390] Disable symmetric multithreading (SMT). | 2790 | nosmt [KNL,S390] Disable symmetric multithreading (SMT). |
| 2688 | Equivalent to smt=1. | 2791 | Equivalent to smt=1. |
| 2689 | 2792 | ||
| 2793 | [KNL,x86] Disable symmetric multithreading (SMT). | ||
| 2794 | nosmt=force: Force disable SMT, cannot be undone | ||
| 2795 | via the sysfs control file. | ||
| 2796 | |||
| 2797 | nospectre_v1 [PPC] Disable mitigations for Spectre Variant 1 (bounds | ||
| 2798 | check bypass). With this option data leaks are possible | ||
| 2799 | in the system. | ||
| 2800 | |||
| 2690 | nospectre_v2 [X86] Disable all mitigations for the Spectre variant 2 | 2801 | nospectre_v2 [X86] Disable all mitigations for the Spectre variant 2 |
| 2691 | (indirect branch prediction) vulnerability. System may | 2802 | (indirect branch prediction) vulnerability. System may |
| 2692 | allow data leaks with this option, which is equivalent | 2803 | allow data leaks with this option, which is equivalent |
| @@ -2835,8 +2946,6 @@ · 142 unmodified lines | |||
| 2835 | 2946 | ||
| 2836 | nosync [HW,M68K] Disables sync negotiation for all devices. | 2947 | nosync [HW,M68K] Disables sync negotiation for all devices. |
| 2837 | 2948 | ||
| 2838 | notsc [BUGS=X86-32] Disable Time Stamp Counter | ||
| 2839 | |||
| 2840 | nowatchdog [KNL] Disable both lockup detectors, i.e. | 2949 | nowatchdog [KNL] Disable both lockup detectors, i.e. |
| 2841 | soft-lockup and NMI watchdog (hard-lockup). | 2950 | soft-lockup and NMI watchdog (hard-lockup). |
| 2842 | 2951 | ||
| @@ -2933,8 +3042,9 @@ · 90 unmodified lines | |||
| 2933 | on: enable the feature | 3042 | on: enable the feature |
| 2934 | 3043 | ||
| 2935 | page_poison= [KNL] Boot-time parameter changing the state of | 3044 | page_poison= [KNL] Boot-time parameter changing the state of |
| 2936 | poisoning on the buddy allocator. | 3045 | poisoning on the buddy allocator, available with |
| 2937 | off: turn off poisoning | 3046 | CONFIG_PAGE_POISONING=y. |
| 3047 | off: turn off poisoning (default) | ||
| 2938 | on: turn on poisoning | 3048 | on: turn on poisoning |
| 2939 | 3049 | ||
| 2940 | panic= [KNL] Kernel behaviour on panic: delay <timeout> | 3050 | panic= [KNL] Kernel behaviour on panic: delay <timeout> |
| @@ -2994,8 +3104,31 @@ · 53 unmodified lines | |||
| 2994 | See header of drivers/block/paride/pcd.c. | 3104 | See header of drivers/block/paride/pcd.c. |
| 2995 | See also Documentation/blockdev/paride.txt. | 3105 | See also Documentation/blockdev/paride.txt. |
| 2996 | 3106 | ||
| 2997 | pci=option[,option...] [PCI] various PCI subsystem options: | 3107 | pci=option[,option...] [PCI] various PCI subsystem options. |
| 2998 | earlydump [X86] dump PCI config space before the kernel | 3108 | |
| 3109 | Some options herein operate on a specific device | ||
| 3110 | or a set of devices (<pci_dev>). These are | ||
| 3111 | specified in one of the following formats: | ||
| 3112 | |||
| 3113 | [<domain>:]<bus>:<dev>.<func>[/<dev>.<func>]* | ||
| 3114 | pci:<vendor>:<device>[:<subvendor>:<subdevice>] | ||
| 3115 | |||
| 3116 | Note: the first format specifies a PCI | ||
| 3117 | bus/device/function address which may change | ||
| 3118 | if new hardware is inserted, if motherboard | ||
| 3119 | firmware changes, or due to changes caused | ||
| 3120 | by other kernel parameters. If the | ||
| 3121 | domain is left unspecified, it is | ||
| 3122 | taken to be zero. Optionally, a path | ||
| 3123 | to a device through multiple device/function | ||
| 3124 | addresses can be specified after the base | ||
| 3125 | address (this is more robust against | ||
| 3126 | renumbering issues). The second format | ||
| 3127 | selects devices using IDs from the | ||
| 3128 | configuration space which may match multiple | ||
| 3129 | devices in the system. | ||
| 3130 | |||
| 3131 | earlydump dump PCI config space before the kernel | ||
| 2999 | changes anything | 3132 | changes anything |
| 3000 | off [X86] don't probe for the PCI bus | 3133 | off [X86] don't probe for the PCI bus |
| 3001 | bios [X86-32] force use of PCI BIOS, don't access | 3134 | bios [X86-32] force use of PCI BIOS, don't access |
| @@ -3123,11 +3256,10 @@ · 121 unmodified lines | |||
| 3123 | window. The default value is 64 megabytes. | 3256 | window. The default value is 64 megabytes. |
| 3124 | resource_alignment= | 3257 | resource_alignment= |
| 3125 | Format: | 3258 | Format: |
| 3126 | [<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...] | 3259 | [<order of align>@]<pci_dev>[; ...] |
| 3127 | [<order of align>@]pci:<vendor>:<device>\ | ||
| 3128 | [:<subvendor>:<subdevice>][; ...] | ||
| 3129 | Specifies alignment and device to reassign | 3260 | Specifies alignment and device to reassign |
| 3130 | aligned memory resources. | 3261 | aligned memory resources. How to |
| 3262 | specify the device is described above. | ||
| 3131 | If <order of align> is not specified, | 3263 | If <order of align> is not specified, |
| 3132 | PAGE_SIZE is used as alignment. | 3264 | PAGE_SIZE is used as alignment. |
| 3133 | PCI-PCI bridge can be specified, if resource | 3265 | PCI-PCI bridge can be specified, if resource |
| @@ -3170,6 +3302,15 @@ · 36 unmodified lines | |||
| 3170 | Adding the window is slightly risky (it may | 3302 | Adding the window is slightly risky (it may |
| 3171 | conflict with unreported devices), so this | 3303 | conflict with unreported devices), so this |
| 3172 | taints the kernel. | 3304 | taints the kernel. |
| 3305 | disable_acs_redir=<pci_dev>[; ...] | ||
| 3306 | Specify one or more PCI devices (in the format | ||
| 3307 | specified above) separated by semicolons. | ||
| 3308 | Each device specified will have the PCI ACS | ||
| 3309 | redirect capabilities forced off which will | ||
| 3310 | allow P2P traffic between devices through | ||
| 3311 | bridges without forcing it upstream. Note: | ||
| 3312 | this removes isolation between devices and | ||
| 3313 | may put more devices in an IOMMU group. | ||
| 3173 | 3314 | ||
| 3174 | pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power | 3315 | pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power |
| 3175 | Management. | 3316 | Management. |
| @@ -3632,8 +3773,8 @@ · 456 unmodified lines | |||
| 3632 | Set time (s) after boot for CPU-hotplug testing. | 3773 | Set time (s) after boot for CPU-hotplug testing. |
| 3633 | 3774 | ||
| 3634 | rcutorture.onoff_interval= [KNL] | 3775 | rcutorture.onoff_interval= [KNL] |
| 3635 | Set time (s) between CPU-hotplug operations, or | 3776 | Set time (jiffies) between CPU-hotplug operations, |
| 3636 | zero to disable CPU-hotplug testing. | 3777 | or zero to disable CPU-hotplug testing. |
| 3637 | 3778 | ||
| 3638 | rcutorture.shuffle_interval= [KNL] | 3779 | rcutorture.shuffle_interval= [KNL] |
| 3639 | Set task-shuffle interval (s). Shuffling tasks | 3780 | Set task-shuffle interval (s). Shuffling tasks |
| @@ -4060,6 +4201,8 @@ · 420 unmodified lines | |||
| 4060 | This parameter controls whether the Speculative Store | 4201 | This parameter controls whether the Speculative Store |
| 4061 | Bypass optimization is used. | 4202 | Bypass optimization is used. |
| 4062 | 4203 | ||
| 4204 | On x86 the options are: | ||
| 4205 | |||
| 4063 | on - Unconditionally disable Speculative Store Bypass | 4206 | on - Unconditionally disable Speculative Store Bypass |
| 4064 | off - Unconditionally enable Speculative Store Bypass | 4207 | off - Unconditionally enable Speculative Store Bypass |
| 4065 | auto - Kernel detects whether the CPU model contains an | 4208 | auto - Kernel detects whether the CPU model contains an |
| @@ -4075,12 +4218,20 @@ · 9 unmodified lines | |||
| 4075 | seccomp - Same as "prctl" above, but all seccomp threads | 4218 | seccomp - Same as "prctl" above, but all seccomp threads |
| 4076 | will disable SSB unless they explicitly opt out. | 4219 | will disable SSB unless they explicitly opt out. |
| 4077 | 4220 | ||
| 4078 | Not specifying this option is equivalent to | ||
| 4079 | spec_store_bypass_disable=auto. | ||
| 4080 | |||
| 4081 | Default mitigations: | 4221 | Default mitigations: |
| 4082 | X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl" | 4222 | X86: If CONFIG_SECCOMP=y "seccomp", otherwise "prctl" |
| 4083 | 4223 | ||
| 4224 | On powerpc the options are: | ||
| 4225 | |||
| 4226 | on,auto - On Power8 and Power9 insert a store-forwarding | ||
| 4227 | barrier on kernel entry and exit. On Power7 | ||
| 4228 | perform a software flush on kernel entry and | ||
| 4229 | exit. | ||
| 4230 | off - No action. | ||
| 4231 | |||
| 4232 | Not specifying this option is equivalent to | ||
| 4233 | spec_store_bypass_disable=auto. | ||
| 4234 | |||
| 4084 | spia_io_base= [HW,MTD] | 4235 | spia_io_base= [HW,MTD] |
| 4085 | spia_fio_base= | 4236 | spia_fio_base= |
| 4086 | spia_pedr= | 4237 | spia_pedr= |
| @@ -4846,3 +4997,8 @@ · 759 unmodified lines | |||
| 4846 | xirc2ps_cs= [NET,PCMCIA] | 4997 | xirc2ps_cs= [NET,PCMCIA] |
| 4847 | Format: | 4998 | Format: |
| 4848 | <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] | 4999 | <irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]] |
| 5000 | |||
| 5001 | xhci-hcd.quirks [USB,KNL] | ||
| 5002 | A hex value specifying bitmask with supplemental xhci | ||
| 5003 | host controller quirks. Meaning of each bit can be | ||
| 5004 | consulted in header drivers/usb/host/xhci.h. | ||
| @@ -0,0 +1,610 @@ | |||
| 1 | L1TF - L1 Terminal Fault | ||
| 2 | ======================== | ||
| 3 | |||
| 4 | L1 Terminal Fault is a hardware vulnerability which allows unprivileged | ||
| 5 | speculative access to data which is available in the Level 1 Data Cache | ||
| 6 | when the page table entry controlling the virtual address, which is used | ||
| 7 | for the access, has the Present bit cleared or other reserved bits set. | ||
| 8 | |||
| 9 | Affected processors | ||
| 10 | ------------------- | ||
| 11 | |||
| 12 | This vulnerability affects a wide range of Intel processors. The | ||
| 13 | vulnerability is not present on: | ||
| 14 | |||
| 15 | - Processors from AMD, Centaur and other non Intel vendors | ||
| 16 | |||
| 17 | - Older processor models, where the CPU family is < 6 | ||
| 18 | |||
| 19 | - A range of Intel ATOM processors (Cedarview, Cloverview, Lincroft, | ||
| 20 | Penwell, Pineview, Silvermont, Airmont, Merrifield) | ||
| 21 | |||
| 22 | - The Intel XEON PHI family | ||
| 23 | |||
| 24 | - Intel processors which have the ARCH_CAP_RDCL_NO bit set in the | ||
| 25 | IA32_ARCH_CAPABILITIES MSR. If the bit is set the CPU is not affected | ||
| 26 | by the Meltdown vulnerability either. These CPUs should become | ||
| 27 | available by end of 2018. | ||
| 28 | |||
| 29 | Whether a processor is affected or not can be read out from the L1TF | ||
| 30 | vulnerability file in sysfs. See :ref:`l1tf_sys_info`. | ||
| 31 | |||
| 32 | Related CVEs | ||
| 33 | ------------ | ||
| 34 | |||
| 35 | The following CVE entries are related to the L1TF vulnerability: | ||
| 36 | |||
| 37 | ============= ================= ============================== | ||
| 38 | CVE-2018-3615 L1 Terminal Fault SGX related aspects | ||
| 39 | CVE-2018-3620 L1 Terminal Fault OS, SMM related aspects | ||
| 40 | CVE-2018-3646 L1 Terminal Fault Virtualization related aspects | ||
| 41 | ============= ================= ============================== | ||
| 42 | |||
| 43 | Problem | ||
| 44 | ------- | ||
| 45 | |||
| 46 | If an instruction accesses a virtual address for which the relevant page | ||
| 47 | table entry (PTE) has the Present bit cleared or other reserved bits set, | ||
| 48 | then speculative execution ignores the invalid PTE and loads the referenced | ||
| 49 | data if it is present in the Level 1 Data Cache, as if the page referenced | ||
| 50 | by the address bits in the PTE was still present and accessible. | ||
| 51 | |||
| 52 | While this is a purely speculative mechanism and the instruction will raise | ||
| 53 | a page fault when it is retired eventually, the pure act of loading the | ||
| 54 | data and making it available to other speculative instructions opens up the | ||
| 55 | opportunity for side channel attacks to unprivileged malicious code, | ||
| 56 | similar to the Meltdown attack. | ||
| 57 | |||
| 58 | While Meltdown breaks the user space to kernel space protection, L1TF | ||
| 59 | allows to attack any physical memory address in the system and the attack | ||
| 60 | works across all protection domains. It allows an attack of SGX and also | ||
| 61 | works from inside virtual machines because the speculation bypasses the | ||
| 62 | extended page table (EPT) protection mechanism. | ||
| 63 | |||
| 64 | |||
| 65 | Attack scenarios | ||
| 66 | ---------------- | ||
| 67 | |||
| 68 | 1. Malicious user space | ||
| 69 | ^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 70 | |||
| 71 | Operating Systems store arbitrary information in the address bits of a | ||
| 72 | PTE which is marked non present. This allows a malicious user space | ||
| 73 | application to attack the physical memory to which these PTEs resolve. | ||
| 74 | In some cases user-space can maliciously influence the information | ||
| 75 | encoded in the address bits of the PTE, thus making attacks more | ||
| 76 | deterministic and more practical. | ||
| 77 | |||
| 78 | The Linux kernel contains a mitigation for this attack vector, PTE | ||
| 79 | inversion, which is permanently enabled and has no performance | ||
| 80 | impact. The kernel ensures that the address bits of PTEs, which are not | ||
| 81 | marked present, never point to cacheable physical memory space. | ||
| 82 | |||
| 83 | A system with an up to date kernel is protected against attacks from | ||
| 84 | malicious user space applications. | ||
| 85 | |||
| 86 | 2. Malicious guest in a virtual machine | ||
| 87 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 88 | |||
| 89 | The fact that L1TF breaks all domain protections allows malicious guest | ||
| 90 | OSes, which can control the PTEs directly, and malicious guest user | ||
| 91 | space applications, which run on an unprotected guest kernel lacking the | ||
| 92 | PTE inversion mitigation for L1TF, to attack physical host memory. | ||
| 93 | |||
| 94 | A special aspect of L1TF in the context of virtualization is symmetric | ||
| 95 | multi threading (SMT). The Intel implementation of SMT is called | ||
| 96 | HyperThreading. The fact that Hyperthreads on the affected processors | ||
| 97 | share the L1 Data Cache (L1D) is important for this. As the flaw allows | ||
| 98 | only to attack data which is present in L1D, a malicious guest running | ||
| 99 | on one Hyperthread can attack the data which is brought into the L1D by | ||
| 100 | the context which runs on the sibling Hyperthread of the same physical | ||
| 101 | core. This context can be host OS, host user space or a different guest. | ||
| 102 | |||
| 103 | If the processor does not support Extended Page Tables, the attack is | ||
| 104 | only possible, when the hypervisor does not sanitize the content of the | ||
| 105 | effective (shadow) page tables. | ||
| 106 | |||
| 107 | While solutions exist to mitigate these attack vectors fully, these | ||
| 108 | mitigations are not enabled by default in the Linux kernel because they | ||
| 109 | can affect performance significantly. The kernel provides several | ||
| 110 | mechanisms which can be utilized to address the problem depending on the | ||
| 111 | deployment scenario. The mitigations, their protection scope and impact | ||
| 112 | are described in the next sections. | ||
| 113 | |||
| 114 | The default mitigations and the rationale for choosing them are explained | ||
| 115 | at the end of this document. See :ref:`default_mitigations`. | ||
| 116 | |||
| 117 | .. _l1tf_sys_info: | ||
| 118 | |||
| 119 | L1TF system information | ||
| 120 | ----------------------- | ||
| 121 | |||
| 122 | The Linux kernel provides a sysfs interface to enumerate the current L1TF | ||
| 123 | status of the system: whether the system is vulnerable, and which | ||
| 124 | mitigations are active. The relevant sysfs file is: | ||
| 125 | |||
| 126 | /sys/devices/system/cpu/vulnerabilities/l1tf | ||
| 127 | |||
| 128 | The possible values in this file are: | ||
| 129 | |||
| 130 | =========================== =============================== | ||
| 131 | 'Not affected' The processor is not vulnerable | ||
| 132 | 'Mitigation: PTE Inversion' The host protection is active | ||
| 133 | =========================== =============================== | ||
| 134 | |||
| 135 | If KVM/VMX is enabled and the processor is vulnerable then the following | ||
| 136 | information is appended to the 'Mitigation: PTE Inversion' part: | ||
| 137 | |||
| 138 | - SMT status: | ||
| 139 | |||
| 140 | ===================== ================ | ||
| 141 | 'VMX: SMT vulnerable' SMT is enabled | ||
| 142 | 'VMX: SMT disabled' SMT is disabled | ||
| 143 | ===================== ================ | ||
| 144 | |||
| 145 | - L1D Flush mode: | ||
| 146 | |||
| 147 | ================================ ==================================== | ||
| 148 | 'L1D vulnerable' L1D flushing is disabled | ||
| 149 | |||
| 150 | 'L1D conditional cache flushes' L1D flush is conditionally enabled | ||
| 151 | |||
| 152 | 'L1D cache flushes' L1D flush is unconditionally enabled | ||
| 153 | ================================ ==================================== | ||
| 154 | |||
| 155 | The resulting grade of protection is discussed in the following sections. | ||
| 156 | |||
| 157 | |||
| 158 | Host mitigation mechanism | ||
| 159 | ------------------------- | ||
| 160 | |||
| 161 | The kernel is unconditionally protected against L1TF attacks from malicious | ||
| 162 | user space running on the host. | ||
| 163 | |||
| 164 | |||
| 165 | Guest mitigation mechanisms | ||
| 166 | --------------------------- | ||
| 167 | |||
| 168 | .. _l1d_flush: | ||
| 169 | |||
| 170 | 1. L1D flush on VMENTER | ||
| 171 | ^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 172 | |||
| 173 | To make sure that a guest cannot attack data which is present in the L1D | ||
| 174 | the hypervisor flushes the L1D before entering the guest. | ||
| 175 | |||
| 176 | Flushing the L1D evicts not only the data which should not be accessed | ||
| 177 | by a potentially malicious guest, it also flushes the guest | ||
| 178 | data. Flushing the L1D has a performance impact as the processor has to | ||
| 179 | bring the flushed guest data back into the L1D. Depending on the | ||
| 180 | frequency of VMEXIT/VMENTER and the type of computations in the guest | ||
| 181 | performance degradation in the range of 1% to 50% has been observed. For | ||
| 182 | scenarios where guest VMEXIT/VMENTER are rare the performance impact is | ||
| 183 | minimal. Virtio and mechanisms like posted interrupts are designed to | ||
| 184 | confine the VMEXITs to a bare minimum, but specific configurations and | ||
| 185 | application scenarios might still suffer from a high VMEXIT rate. | ||
| 186 | |||
| 187 | The kernel provides two L1D flush modes: | ||
| 188 | - conditional ('cond') | ||
| 189 | - unconditional ('always') | ||
| 190 | |||
| 191 | The conditional mode avoids L1D flushing after VMEXITs which execute | ||
| 192 | only audited code paths before the corresponding VMENTER. These code | ||
| 193 | paths have been verified that they cannot expose secrets or other | ||
| 194 | interesting data to an attacker, but they can leak information about the | ||
| 195 | address space layout of the hypervisor. | ||
| 196 | |||
| 197 | Unconditional mode flushes L1D on all VMENTER invocations and provides | ||
| 198 | maximum protection. It has a higher overhead than the conditional | ||
| 199 | mode. The overhead cannot be quantified correctly as it depends on the | ||
| 200 | workload scenario and the resulting number of VMEXITs. | ||
| 201 | |||
| 202 | The general recommendation is to enable L1D flush on VMENTER. The kernel | ||
| 203 | defaults to conditional mode on affected processors. | ||
| 204 | |||
| 205 | **Note**, that L1D flush does not prevent the SMT problem because the | ||
| 206 | sibling thread will also bring back its data into the L1D which makes it | ||
| 207 | attackable again. | ||
| 208 | |||
| 209 | L1D flush can be controlled by the administrator via the kernel command | ||
| 210 | line and sysfs control files. See :ref:`mitigation_control_command_line` | ||
| 211 | and :ref:`mitigation_control_kvm`. | ||
| 212 | |||
| 213 | .. _guest_confinement: | ||
| 214 | |||
| 215 | 2. Guest VCPU confinement to dedicated physical cores | ||
| 216 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 217 | |||
| 218 | To address the SMT problem, it is possible to make a guest or a group of | ||
| 219 | guests affine to one or more physical cores. The proper mechanism for | ||
| 220 | that is to utilize exclusive cpusets to ensure that no other guest or | ||
| 221 | host tasks can run on these cores. | ||
| 222 | |||
| 223 | If only a single guest or related guests run on sibling SMT threads on | ||
| 224 | the same physical core then they can only attack their own memory and | ||
| 225 | restricted parts of the host memory. | ||
| 226 | |||
| 227 | Host memory is attackable, when one of the sibling SMT threads runs in | ||
| 228 | host OS (hypervisor) context and the other in guest context. The amount | ||
| 229 | of valuable information from the host OS context depends on the context | ||
| 230 | which the host OS executes, i.e. interrupts, soft interrupts and kernel | ||
| 231 | threads. The amount of valuable data from these contexts cannot be | ||
| 232 | declared as non-interesting for an attacker without deep inspection of | ||
| 233 | the code. | ||
| 234 | |||
| 235 | **Note**, that assigning guests to a fixed set of physical cores affects | ||
| 236 | the ability of the scheduler to do load balancing and might have | ||
| 237 | negative effects on CPU utilization depending on the hosting | ||
| 238 | scenario. Disabling SMT might be a viable alternative for particular | ||
| 239 | scenarios. | ||
| 240 | |||
| 241 | For further information about confining guests to a single or to a group | ||
| 242 | of cores consult the cpusets documentation: | ||
| 243 | |||
| 244 | https://www.kernel.org/doc/Documentation/cgroup-v1/cpusets.txt | ||
| 245 | |||
| 246 | .. _interrupt_isolation: | ||
| 247 | |||
| 248 | 3. Interrupt affinity | ||
| 249 | ^^^^^^^^^^^^^^^^^^^^^ | ||
| 250 | |||
| 251 | Interrupts can be made affine to logical CPUs. This is not universally | ||
| 252 | true because there are types of interrupts which are truly per CPU | ||
| 253 | interrupts, e.g. the local timer interrupt. Aside of that multi queue | ||
| 254 | devices affine their interrupts to single CPUs or groups of CPUs per | ||
| 255 | queue without allowing the administrator to control the affinities. | ||
| 256 | |||
| 257 | Moving the interrupts, which can be affinity controlled, away from CPUs | ||
| 258 | which run untrusted guests, reduces the attack vector space. | ||
| 259 | |||
| 260 | Whether the interrupts with are affine to CPUs, which run untrusted | ||
| 261 | guests, provide interesting data for an attacker depends on the system | ||
| 262 | configuration and the scenarios which run on the system. While for some | ||
| 263 | of the interrupts it can be assumed that they won't expose interesting | ||
| 264 | information beyond exposing hints about the host OS memory layout, there | ||
| 265 | is no way to make general assumptions. | ||
| 266 | |||
| 267 | Interrupt affinity can be controlled by the administrator via the | ||
| 268 | /proc/irq/$NR/smp_affinity[_list] files. Limited documentation is | ||
| 269 | available at: | ||
| 270 | |||
| 271 | https://www.kernel.org/doc/Documentation/IRQ-affinity.txt | ||
| 272 | |||
| 273 | .. _smt_control: | ||
| 274 | |||
| 275 | 4. SMT control | ||
| 276 | ^^^^^^^^^^^^^^ | ||
| 277 | |||
| 278 | To prevent the SMT issues of L1TF it might be necessary to disable SMT | ||
| 279 | completely. Disabling SMT can have a significant performance impact, but | ||
| 280 | the impact depends on the hosting scenario and the type of workloads. | ||
| 281 | The impact of disabling SMT needs also to be weighted against the impact | ||
| 282 | of other mitigation solutions like confining guests to dedicated cores. | ||
| 283 | |||
| 284 | The kernel provides a sysfs interface to retrieve the status of SMT and | ||
| 285 | to control it. It also provides a kernel command line interface to | ||
| 286 | control SMT. | ||
| 287 | |||
| 288 | The kernel command line interface consists of the following options: | ||
| 289 | |||
| 290 | =========== ========================================================== | ||
| 291 | nosmt Affects the bring up of the secondary CPUs during boot. The | ||
| 292 | kernel tries to bring all present CPUs online during the | ||
| 293 | boot process. "nosmt" makes sure that from each physical | ||
| 294 | core only one - the so called primary (hyper) thread is | ||
| 295 | activated. Due to a design flaw of Intel processors related | ||
| 296 | to Machine Check Exceptions the non primary siblings have | ||
| 297 | to be brought up at least partially and are then shut down | ||
| 298 | again. "nosmt" can be undone via the sysfs interface. | ||
| 299 | |||
| 300 | nosmt=force Has the same effect as "nosmt" but it does not allow to | ||
| 301 | undo the SMT disable via the sysfs interface. | ||
| 302 | =========== ========================================================== | ||
| 303 | |||
| 304 | The sysfs interface provides two files: | ||
| 305 | |||
| 306 | - /sys/devices/system/cpu/smt/control | ||
| 307 | - /sys/devices/system/cpu/smt/active | ||
| 308 | |||
| 309 | /sys/devices/system/cpu/smt/control: | ||
| 310 | |||
| 311 | This file allows to read out the SMT control state and provides the | ||
| 312 | ability to disable or (re)enable SMT. The possible states are: | ||
| 313 | |||
| 314 | ============== =================================================== | ||
| 315 | on SMT is supported by the CPU and enabled. All | ||
| 316 | logical CPUs can be onlined and offlined without | ||
| 317 | restrictions. | ||
| 318 | |||
| 319 | off SMT is supported by the CPU and disabled. Only | ||
| 320 | the so called primary SMT threads can be onlined | ||
| 321 | and offlined without restrictions. An attempt to | ||
| 322 | online a non-primary sibling is rejected | ||
| 323 | |||
| 324 | forceoff Same as 'off' but the state cannot be controlled. | ||
| 325 | Attempts to write to the control file are rejected. | ||
| 326 | |||
| 327 | notsupported The processor does not support SMT. It's therefore | ||
| 328 | not affected by the SMT implications of L1TF. | ||
| 329 | Attempts to write to the control file are rejected. | ||
| 330 | ============== =================================================== | ||
| 331 | |||
| 332 | The possible states which can be written into this file to control SMT | ||
| 333 | state are: | ||
| 334 | |||
| 335 | - on | ||
| 336 | - off | ||
| 337 | - forceoff | ||
| 338 | |||
| 339 | /sys/devices/system/cpu/smt/active: | ||
| 340 | |||
| 341 | This file reports whether SMT is enabled and active, i.e. if on any | ||
| 342 | physical core two or more sibling threads are online. | ||
| 343 | |||
| 344 | SMT control is also possible at boot time via the l1tf kernel command | ||
| 345 | line parameter in combination with L1D flush control. See | ||
| 346 | :ref:`mitigation_control_command_line`. | ||
| 347 | |||
| 348 | 5. Disabling EPT | ||
| 349 | ^^^^^^^^^^^^^^^^ | ||
| 350 | |||
| 351 | Disabling EPT for virtual machines provides full mitigation for L1TF even | ||
| 352 | with SMT enabled, because the effective page tables for guests are | ||
| 353 | managed and sanitized by the hypervisor. Though disabling EPT has a | ||
| 354 | significant performance impact especially when the Meltdown mitigation | ||
| 355 | KPTI is enabled. | ||
| 356 | |||
| 357 | EPT can be disabled in the hypervisor via the 'kvm-intel.ept' parameter. | ||
| 358 | |||
| 359 | There is ongoing research and development for new mitigation mechanisms to | ||
| 360 | address the performance impact of disabling SMT or EPT. | ||
| 361 | |||
| 362 | .. _mitigation_control_command_line: | ||
| 363 | |||
| 364 | Mitigation control on the kernel command line | ||
| 365 | --------------------------------------------- | ||
| 366 | |||
| 367 | The kernel command line allows to control the L1TF mitigations at boot | ||
| 368 | time with the option "l1tf=". The valid arguments for this option are: | ||
| 369 | |||
| 370 | ============ ============================================================= | ||
| 371 | full Provides all available mitigations for the L1TF | ||
| 372 | vulnerability. Disables SMT and enables all mitigations in | ||
| 373 | the hypervisors, i.e. unconditional L1D flushing | ||
| 374 | |||
| 375 | SMT control and L1D flush control via the sysfs interface | ||
| 376 | is still possible after boot. Hypervisors will issue a | ||
| 377 | warning when the first VM is started in a potentially | ||
| 378 | insecure configuration, i.e. SMT enabled or L1D flush | ||
| 379 | disabled. | ||
| 380 | |||
| 381 | full,force Same as 'full', but disables SMT and L1D flush runtime | ||
| 382 | control. Implies the 'nosmt=force' command line option. | ||
| 383 | (i.e. sysfs control of SMT is disabled.) | ||
| 384 | |||
| 385 | flush Leaves SMT enabled and enables the default hypervisor | ||
| 386 | mitigation, i.e. conditional L1D flushing | ||
| 387 | |||
| 388 | SMT control and L1D flush control via the sysfs interface | ||
| 389 | is still possible after boot. Hypervisors will issue a | ||
| 390 | warning when the first VM is started in a potentially | ||
| 391 | insecure configuration, i.e. SMT enabled or L1D flush | ||
| 392 | disabled. | ||
| 393 | |||
| 394 | flush,nosmt Disables SMT and enables the default hypervisor mitigation, | ||
| 395 | i.e. conditional L1D flushing. | ||
| 396 | |||
| 397 | SMT control and L1D flush control via the sysfs interface | ||
| 398 | is still possible after boot. Hypervisors will issue a | ||
| 399 | warning when the first VM is started in a potentially | ||
| 400 | insecure configuration, i.e. SMT enabled or L1D flush | ||
| 401 | disabled. | ||
| 402 | |||
| 403 | flush,nowarn Same as 'flush', but hypervisors will not warn when a VM is | ||
| 404 | started in a potentially insecure configuration. | ||
| 405 | |||
| 406 | off Disables hypervisor mitigations and doesn't emit any | ||
| 407 | warnings. | ||
| 408 | ============ ============================================================= | ||
| 409 | |||
| 410 | The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`. | ||
| 411 | |||
| 412 | |||
| 413 | .. _mitigation_control_kvm: | ||
| 414 | |||
| 415 | Mitigation control for KVM - module parameter | ||
| 416 | ------------------------------------------------------------- | ||
| 417 | |||
| 418 | The KVM hypervisor mitigation mechanism, flushing the L1D cache when | ||
| 419 | entering a guest, can be controlled with a module parameter. | ||
| 420 | |||
| 421 | The option/parameter is "kvm-intel.vmentry_l1d_flush=". It takes the | ||
| 422 | following arguments: | ||
| 423 | |||
| 424 | ============ ============================================================== | ||
| 425 | always L1D cache flush on every VMENTER. | ||
| 426 | |||
| 427 | cond Flush L1D on VMENTER only when the code between VMEXIT and | ||
| 428 | VMENTER can leak host memory which is considered | ||
| 429 | interesting for an attacker. This still can leak host memory | ||
| 430 | which allows e.g. to determine the hosts address space layout. | ||
| 431 | |||
| 432 | never Disables the mitigation | ||
| 433 | ============ ============================================================== | ||
| 434 | |||
| 435 | The parameter can be provided on the kernel command line, as a module | ||
| 436 | parameter when loading the modules and at runtime modified via the sysfs | ||
| 437 | file: | ||
| 438 | |||
| 439 | /sys/module/kvm_intel/parameters/vmentry_l1d_flush | ||
| 440 | |||
| 441 | The default is 'cond'. If 'l1tf=full,force' is given on the kernel command | ||
| 442 | line, then 'always' is enforced and the kvm-intel.vmentry_l1d_flush | ||
| 443 | module parameter is ignored and writes to the sysfs file are rejected. | ||
| 444 | |||
| 445 | |||
| 446 | Mitigation selection guide | ||
| 447 | -------------------------- | ||
| 448 | |||
| 449 | 1. No virtualization in use | ||
| 450 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 451 | |||
| 452 | The system is protected by the kernel unconditionally and no further | ||
| 453 | action is required. | ||
| 454 | |||
| 455 | 2. Virtualization with trusted guests | ||
| 456 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 457 | |||
| 458 | If the guest comes from a trusted source and the guest OS kernel is | ||
| 459 | guaranteed to have the L1TF mitigations in place the system is fully | ||
| 460 | protected against L1TF and no further action is required. | ||
| 461 | |||
| 462 | To avoid the overhead of the default L1D flushing on VMENTER the | ||
| 463 | administrator can disable the flushing via the kernel command line and | ||
| 464 | sysfs control files. See :ref:`mitigation_control_command_line` and | ||
| 465 | :ref:`mitigation_control_kvm`. | ||
| 466 | |||
| 467 | |||
| 468 | 3. Virtualization with untrusted guests | ||
| 469 | ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | ||
| 470 | |||
| 471 | 3.1. SMT not supported or disabled | ||
| 472 | """""""""""""""""""""""""""""""""" | ||
| 473 | |||
| 474 | If SMT is not supported by the processor or disabled in the BIOS or by | ||
| 475 | the kernel, it's only required to enforce L1D flushing on VMENTER. | ||
| 476 | |||
| 477 | Conditional L1D flushing is the default behaviour and can be tuned. See | ||
| 478 | :ref:`mitigation_control_command_line` and :ref:`mitigation_control_kvm`. | ||
| 479 | |||
| 480 | 3.2. EPT not supported or disabled | ||
| 481 | """""""""""""""""""""""""""""""""" | ||
| 482 | |||
| 483 | If EPT is not supported by the processor or disabled in the hypervisor, | ||
| 484 | the system is fully protected. SMT can stay enabled and L1D flushing on | ||
| 485 | VMENTER is not required. | ||
| 486 | |||
| 487 | EPT can be disabled in the hypervisor via the 'kvm-intel.ept' parameter. | ||
| 488 | |||
| 489 | 3.3. SMT and EPT supported and active | ||
| 490 | """"""""""""""""""""""""""""""""""""" | ||
| 491 | |||
| 492 | If SMT and EPT are supported and active then various degrees of | ||
| 493 | mitigations can be employed: | ||
| 494 | |||
| 495 | - L1D flushing on VMENTER: | ||
| 496 | |||
| 497 | L1D flushing on VMENTER is the minimal protection requirement, but it | ||
| 498 | is only potent in combination with other mitigation methods. | ||
| 499 | |||
| 500 | Conditional L1D flushing is the default behaviour and can be tuned. See | ||
| 501 | :ref:`mitigation_control_command_line` and :ref:`mitigation_control_kvm`. | ||
| 502 | |||
| 503 | - Guest confinement: | ||
| 504 | |||
| 505 | Confinement of guests to a single or a group of physical cores which | ||
| 506 | are not running any other processes, can reduce the attack surface | ||
| 507 | significantly, but interrupts, soft interrupts and kernel threads can | ||
| 508 | still expose valuable data to a potential attacker. See | ||
| 509 | :ref:`guest_confinement`. | ||
| 510 | |||
| 511 | - Interrupt isolation: | ||
| 512 | |||
| 513 | Isolating the guest CPUs from interrupts can reduce the attack surface | ||
| 514 | further, but still allows a malicious guest to explore a limited amount | ||
| 515 | of host physical memory. This can at least be used to gain knowledge | ||
| 516 | about the host address space layout. The interrupts which have a fixed | ||
| 517 | affinity to the CPUs which run the untrusted guests can depending on | ||
| 518 | the scenario still trigger soft interrupts and schedule kernel threads | ||
| 519 | which might expose valuable information. See | ||
| 520 | :ref:`interrupt_isolation`. | ||
| 521 | |||
| 522 | The above three mitigation methods combined can provide protection to a | ||
| 523 | certain degree, but the risk of the remaining attack surface has to be | ||
| 524 | carefully analyzed. For full protection the following methods are | ||
| 525 | available: | ||
| 526 | |||
| 527 | - Disabling SMT: | ||
| 528 | |||
| 529 | Disabling SMT and enforcing the L1D flushing provides the maximum | ||
| 530 | amount of protection. This mitigation is not depending on any of the | ||
| 531 | above mitigation methods. | ||
| 532 | |||
| 533 | SMT control and L1D flushing can be tuned by the command line | ||
| 534 | parameters 'nosmt', 'l1tf', 'kvm-intel.vmentry_l1d_flush' and at run | ||
| 535 | time with the matching sysfs control files. See :ref:`smt_control`, | ||
| 536 | :ref:`mitigation_control_command_line` and | ||
| 537 | :ref:`mitigation_control_kvm`. | ||
| 538 | |||
| 539 | - Disabling EPT: | ||
| 540 | |||
| 541 | Disabling EPT provides the maximum amount of protection as well. It is | ||
| 542 | not depending on any of the above mitigation methods. SMT can stay | ||
| 543 | enabled and L1D flushing is not required, but the performance impact is | ||
| 544 | significant. | ||
| 545 | |||
| 546 | EPT can be disabled in the hypervisor via the 'kvm-intel.ept' | ||
| 547 | parameter. | ||
| 548 | |||
| 549 | 3.4. Nested virtual machines | ||
| 550 | """""""""""""""""""""""""""" | ||
| 551 | |||
| 552 | When nested virtualization is in use, three operating systems are involved: | ||
| 553 | the bare metal hypervisor, the nested hypervisor and the nested virtual | ||
| 554 | machine. VMENTER operations from the nested hypervisor into the nested | ||
| 555 | guest will always be processed by the bare metal hypervisor. If KVM is the | ||
| 556 | bare metal hypervisor it wiil: | ||
| 557 | |||
| 558 | - Flush the L1D cache on every switch from the nested hypervisor to the | ||
| 559 | nested virtual machine, so that the nested hypervisor's secrets are not | ||
| 560 | exposed to the nested virtual machine; | ||
| 561 | |||
| 562 | - Flush the L1D cache on every switch from the nested virtual machine to | ||
| 563 | the nested hypervisor; this is a complex operation, and flushing the L1D | ||
| 564 | cache avoids that the bare metal hypervisor's secrets are exposed to the | ||
| 565 | nested virtual machine; | ||
| 566 | |||
| 567 | - Instruct the nested hypervisor to not perform any L1D cache flush. This | ||
| 568 | is an optimization to avoid double L1D flushing. | ||
| 569 | |||
| 570 | |||
| 571 | .. _default_mitigations: | ||
| 572 | |||
| 573 | Default mitigations | ||
| 574 | ------------------- | ||
| 575 | |||
| 576 | The kernel default mitigations for vulnerable processors are: | ||
| 577 | |||
| 578 | - PTE inversion to protect against malicious user space. This is done | ||
| 579 | unconditionally and cannot be controlled. | ||
| 580 | |||
| 581 | - L1D conditional flushing on VMENTER when EPT is enabled for | ||
| 582 | a guest. | ||
| 583 | |||
| 584 | The kernel does not by default enforce the disabling of SMT, which leaves | ||
| 585 | SMT systems vulnerable when running untrusted guests with EPT enabled. | ||
| 586 | |||
| 587 | The rationale for this choice is: | ||
| 588 | |||
| 589 | - Force disabling SMT can break existing setups, especially with | ||
| 590 | unattended updates. | ||
| 591 | |||
| 592 | - If regular users run untrusted guests on their machine, then L1TF is | ||
| 593 | just an add on to other malware which might be embedded in an untrusted | ||
| 594 | guest, e.g. spam-bots or attacks on the local network. | ||
| 595 | |||
| 596 | There is no technical way to prevent a user from running untrusted code | ||
| 597 | on their machines blindly. | ||
| 598 | |||
| 599 | - It's technically extremely unlikely and from today's knowledge even | ||
| 600 | impossible that L1TF can be exploited via the most popular attack | ||
| 601 | mechanisms like JavaScript because these mechanisms have no way to | ||
| 602 | control PTEs. If this would be possible and not other mitigation would | ||
| 603 | be possible, then the default might be different. | ||
| 604 | |||
| 605 | - The administrators of cloud and hosting setups have to carefully | ||
| 606 | analyze the risk for their scenarios and make the appropriate | ||
| 607 | mitigation choices, which might even vary across their deployed | ||
| 608 | machines and also result in other changes of their overall setup. | ||
| 609 | There is no way for the kernel to provide a sensible default for this | ||
| 610 | kind of scenarios. | ||
| @@ -65,6 +65,11 @@ workload one should: · 64 unmodified lines | |||
| 65 | are not reclaimable, he or she can filter them out using | 65 | are not reclaimable, he or she can filter them out using |
| 66 | ``/proc/kpageflags``. | 66 | ``/proc/kpageflags``. |
| 67 | 67 | ||
| 68 | The page-types tool in the tools/vm directory can be used to assist in this. | ||
| 69 | If the tool is run initially with the appropriate option, it will mark all the | ||
| 70 | queried pages as idle. Subsequent runs of the tool can then show which pages have | ||
| 71 | their idle flag cleared in the interim. | ||
| 72 | |||
| 68 | See :ref:`Documentation/admin-guide/mm/pagemap.rst <pagemap>` for more | 73 | See :ref:`Documentation/admin-guide/mm/pagemap.rst <pagemap>` for more |
| 69 | information about ``/proc/pid/pagemap``, ``/proc/kpageflags``, and | 74 | information about ``/proc/pid/pagemap``, ``/proc/kpageflags``, and |
| 70 | ``/proc/kpagecgroup``. | 75 | ``/proc/kpagecgroup``. |
| @@ -44,6 +44,9 @@ There are four components to pagemap: · 43 unmodified lines | |||
| 44 | * ``/proc/kpagecount``. This file contains a 64-bit count of the number of | 44 | * ``/proc/kpagecount``. This file contains a 64-bit count of the number of |
| 45 | times each page is mapped, indexed by PFN. | 45 | times each page is mapped, indexed by PFN. |
| 46 | 46 | ||
| 47 | The page-types tool in the tools/vm directory can be used to query the | ||
| 48 | number of times a page is mapped. | ||
| 49 | |||
| 47 | * ``/proc/kpageflags``. This file contains a 64-bit set of flags for each | 50 | * ``/proc/kpageflags``. This file contains a 64-bit set of flags for each |
| 48 | page, indexed by PFN. | 51 | page, indexed by PFN. |
| 49 | 52 | ||
| @@ -85,3 +85,10 @@ shared_tags=[0/1]: Default: 0 · 84 unmodified lines | |||
| 85 | 0: Tag set is not shared. | 85 | 0: Tag set is not shared. |
| 86 | 1: Tag set shared between devices for blk-mq. Only makes sense with | 86 | 1: Tag set shared between devices for blk-mq. Only makes sense with |
| 87 | nr_devices > 1, otherwise there's no tag set to share. | 87 | nr_devices > 1, otherwise there's no tag set to share. |
| 88 | |||
| 89 | zoned=[0/1]: Default: 0 | ||
| 90 | 0: Block device is exposed as a random-access block device. | ||
| 91 | 1: Block device is exposed as a host-managed zoned block device. | ||
| 92 | |||
| 93 | zone_size=[MB]: Default: 256 | ||
| 94 | Per zone size when exposed as a zoned block device. Must be a power of two. | ||
| @@ -31,28 +31,32 @@ write ticks milliseconds total wait time for write requests · 30 unmodified lines | |||
| 31 | in_flight requests number of I/Os currently in flight | 31 | in_flight requests number of I/Os currently in flight |
| 32 | io_ticks milliseconds total time this block device has been active | 32 | io_ticks milliseconds total time this block device has been active |
| 33 | time_in_queue milliseconds total wait time for all requests | 33 | time_in_queue milliseconds total wait time for all requests |
| 34 | discard I/Os requests number of discard I/Os processed | ||
| 35 | discard merges requests number of discard I/Os merged with in-queue I/O | ||
| 36 | discard sectors sectors number of sectors discarded | ||
| 37 | discard ticks milliseconds total wait time for discard requests | ||
| 34 | 38 | ||
| 35 | read I/Os, write I/Os | 39 | read I/Os, write I/Os, discard I/0s |
| 36 | ===================== | 40 | =================================== |
| 37 | 41 | ||
| 38 | These values increment when an I/O request completes. | 42 | These values increment when an I/O request completes. |
| 39 | 43 | ||
| 40 | read merges, write merges | 44 | read merges, write merges, discard merges |
| 41 | ========================= | 45 | ========================================= |
| 42 | 46 | ||
| 43 | These values increment when an I/O request is merged with an | 47 | These values increment when an I/O request is merged with an |
| 44 | already-queued I/O request. | 48 | already-queued I/O request. |
| 45 | 49 | ||
| 46 | read sectors, write sectors | 50 | read sectors, write sectors, discard_sectors |
| 47 | =========================== | 51 | ============================================ |
| 48 | 52 | ||
| 49 | These values count the number of sectors read from or written to this | 53 | These values count the number of sectors read from, written to, or |
| 50 | block device. The "sectors" in question are the standard UNIX 512-byte | 54 | discarded from this block device. The "sectors" in question are the |
| 51 | sectors, not any device- or filesystem-specific block size. The | 55 | standard UNIX 512-byte sectors, not any device- or filesystem-specific |
| 52 | counters are incremented when the I/O completes. | 56 | block size. The counters are incremented when the I/O completes. |
| 53 | 57 | ||
| 54 | read ticks, write ticks | 58 | read ticks, write ticks, discard ticks |
| 55 | ======================= | 59 | ====================================== |
| 56 | 60 | ||
| 57 | These values count the number of milliseconds that I/O requests have | 61 | These values count the number of milliseconds that I/O requests have |
| 58 | waited on this block device. If there are multiple I/O requests waiting, | 62 | waited on this block device. If there are multiple I/O requests waiting, |
| @@ -106,9 +106,9 @@ into the bpf-next tree will make their way into net-next tree. net and · 105 unmodified lines | |||
| 106 | net-next are both run by David S. Miller. From there, they will go | 106 | net-next are both run by David S. Miller. From there, they will go |
| 107 | into the kernel mainline tree run by Linus Torvalds. To read up on the | 107 | into the kernel mainline tree run by Linus Torvalds. To read up on the |
| 108 | process of net and net-next being merged into the mainline tree, see | 108 | process of net and net-next being merged into the mainline tree, see |
| 109 | the `netdev FAQ`_ under: | 109 | the :ref:`netdev-FAQ` |
| 110 | |||
| 110 | 111 | ||
| 111 | `Documentation/networking/netdev-FAQ.txt`_ | ||
| 112 | 112 | ||
| 113 | Occasionally, to prevent merge conflicts, we might send pull requests | 113 | Occasionally, to prevent merge conflicts, we might send pull requests |
| 114 | to other trees (e.g. tracing) with a small subset of the patches, but | 114 | to other trees (e.g. tracing) with a small subset of the patches, but |
| @@ -125,8 +125,8 @@ request):: · 10 unmodified lines | |||
| 125 | Q: How do I indicate which tree (bpf vs. bpf-next) my patch should be applied to? | 125 | Q: How do I indicate which tree (bpf vs. bpf-next) my patch should be applied to? |
| 126 | --------------------------------------------------------------------------------- | 126 | --------------------------------------------------------------------------------- |
| 127 | 127 | ||
| 128 | A: The process is the very same as described in the `netdev FAQ`_, so | 128 | A: The process is the very same as described in the :ref:`netdev-FAQ`, |
| 129 | please read up on it. The subject line must indicate whether the | 129 | so please read up on it. The subject line must indicate whether the |
| 130 | patch is a fix or rather "next-like" content in order to let the | 130 | patch is a fix or rather "next-like" content in order to let the |
| 131 | maintainers know whether it is targeted at bpf or bpf-next. | 131 | maintainers know whether it is targeted at bpf or bpf-next. |
| 132 | 132 | ||
| @@ -184,7 +184,7 @@ ii) run extensive BPF test suite and · 51 unmodified lines | |||
| 184 | Once the BPF pull request was accepted by David S. Miller, then | 184 | Once the BPF pull request was accepted by David S. Miller, then |
| 185 | the patches end up in net or net-next tree, respectively, and | 185 | the patches end up in net or net-next tree, respectively, and |
| 186 | make their way from there further into mainline. Again, see the | 186 | make their way from there further into mainline. Again, see the |
| 187 | `netdev FAQ`_ for additional information e.g. on how often they are | 187 | :ref:`netdev-FAQ` for additional information e.g. on how often they are |
| 188 | merged to mainline. | 188 | merged to mainline. |
| 189 | 189 | ||
| 190 | Q: How long do I need to wait for feedback on my BPF patches? | 190 | Q: How long do I need to wait for feedback on my BPF patches? |
| @@ -208,7 +208,7 @@ Q: Are patches applied to bpf-next when the merge window is open? · 17 unmodified lines | |||
| 208 | ----------------------------------------------------------------- | 208 | ----------------------------------------------------------------- |
| 209 | A: For the time when the merge window is open, bpf-next will not be | 209 | A: For the time when the merge window is open, bpf-next will not be |
| 210 | processed. This is roughly analogous to net-next patch processing, | 210 | processed. This is roughly analogous to net-next patch processing, |
| 211 | so feel free to read up on the `netdev FAQ`_ about further details. | 211 | so feel free to read up on the :ref:`netdev-FAQ` about further details. |
| 212 | 212 | ||
| 213 | During those two weeks of merge window, we might ask you to resend | 213 | During those two weeks of merge window, we might ask you to resend |
| 214 | your patch series once bpf-next is open again. Once Linus released | 214 | your patch series once bpf-next is open again. Once Linus released |
| @@ -372,7 +372,7 @@ netdev kernel mailing list in Cc and ask for the fix to be queued up: · 157 unmodified lines | |||
| 372 | netdev@vger.kernel.org | 372 | netdev@vger.kernel.org |
| 373 | 373 | ||
| 374 | The process in general is the same as on netdev itself, see also the | 374 | The process in general is the same as on netdev itself, see also the |
| 375 | `netdev FAQ`_ document. | 375 | :ref:`netdev-FAQ`. |
| 376 | 376 | ||
| 377 | Q: Do you also backport to kernels not currently maintained as stable? | 377 | Q: Do you also backport to kernels not currently maintained as stable? |
| 378 | ---------------------------------------------------------------------- | 378 | ---------------------------------------------------------------------- |
| @@ -388,9 +388,7 @@ Q: The BPF patch I am about to submit needs to go to stable as well · 9 unmodified lines | |||
| 388 | What should I do? | 388 | What should I do? |
| 389 | 389 | ||
| 390 | A: The same rules apply as with netdev patch submissions in general, see | 390 | A: The same rules apply as with netdev patch submissions in general, see |
| 391 | `netdev FAQ`_ under: | 391 | the :ref:`netdev-FAQ`. |
| 392 | |||
| 393 | `Documentation/networking/netdev-FAQ.txt`_ | ||
| 394 | 392 | ||
| 395 | Never add "``Cc: stable@vger.kernel.org``" to the patch description, but | 393 | Never add "``Cc: stable@vger.kernel.org``" to the patch description, but |
| 396 | ask the BPF maintainers to queue the patches instead. This can be done | 394 | ask the BPF maintainers to queue the patches instead. This can be done |
| @@ -630,8 +628,7 @@ when: · 233 unmodified lines | |||
| 630 | .. Links | 628 | .. Links |
| 631 | .. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/ | 629 | .. _Documentation/process/: https://www.kernel.org/doc/html/latest/process/ |
| 632 | .. _MAINTAINERS: ../../MAINTAINERS | 630 | .. _MAINTAINERS: ../../MAINTAINERS |
| 633 | .. _Documentation/networking/netdev-FAQ.txt: ../networking/netdev-FAQ.txt | 631 | .. _netdev-FAQ: ../networking/netdev-FAQ.rst |
| 634 | .. _netdev FAQ: ../networking/netdev-FAQ.txt | ||
| 635 | .. _samples/bpf/: ../../samples/bpf/ | 632 | .. _samples/bpf/: ../../samples/bpf/ |
| 636 | .. _selftests: ../../tools/testing/selftests/bpf/ | 633 | .. _selftests: ../../tools/testing/selftests/bpf/ |
| 637 | .. _Documentation/dev-tools/kselftest.rst: | 634 | .. _Documentation/dev-tools/kselftest.rst: |
| @@ -1,5 +1,5 @@ | |||
| 1 | ================= | 1 | ================= |
| 2 | BPF documentation | 2 | BPF Documentation |
| 3 | ================= | 3 | ================= |
| 4 | 4 | ||
| 5 | This directory contains documentation for the BPF (Berkeley Packet | 5 | This directory contains documentation for the BPF (Berkeley Packet |
| @@ -22,14 +22,14 @@ Frequently asked questions (FAQ) · 16 unmodified lines | |||
| 22 | 22 | ||
| 23 | Two sets of Questions and Answers (Q&A) are maintained. | 23 | Two sets of Questions and Answers (Q&A) are maintained. |
| 24 | 24 | ||
| 25 | * QA for common questions about BPF see: bpf_design_QA_ | 25 | .. toctree:: |
| 26 | :maxdepth: 1 | ||
| 26 | 27 | ||
| 27 | * QA for developers interacting with BPF subsystem: bpf_devel_QA_ | 28 | bpf_design_QA |
| 29 | bpf_devel_QA | ||
| 28 | 30 | ||
| 29 | 31 | ||
| 30 | .. Links: | 32 | .. Links: |
| 31 | .. _bpf_design_QA: bpf_design_QA.rst | ||
| 32 | .. _bpf_devel_QA: bpf_devel_QA.rst | ||
| 33 | .. _Documentation/networking/filter.txt: ../networking/filter.txt | 33 | .. _Documentation/networking/filter.txt: ../networking/filter.txt |
| 34 | .. _man-pages: https://www.kernel.org/doc/man-pages/ | 34 | .. _man-pages: https://www.kernel.org/doc/man-pages/ |
| 35 | .. _bpf(2): http://man7.org/linux/man-pages/man2/bpf.2.html | 35 | .. _bpf(2): http://man7.org/linux/man-pages/man2/bpf.2.html |
| @@ -34,7 +34,7 @@ needs_sphinx = '1.3' · 33 unmodified lines | |||
| 34 | # Add any Sphinx extension module names here, as strings. They can be | 34 | # Add any Sphinx extension module names here, as strings. They can be |
| 35 | # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom | 35 | # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom |
| 36 | # ones. | 36 | # ones. |
| 37 | extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain', 'kfigure'] | 37 | extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain', 'kfigure', 'sphinx.ext.ifconfig'] |
| 38 | 38 | ||
| 39 | # The name of the math extension changed on Sphinx 1.4 | 39 | # The name of the math extension changed on Sphinx 1.4 |
| 40 | if major == 1 and minor > 3: | 40 | if major == 1 and minor > 3: |
| @@ -1,7 +1,7 @@ | |||
| 1 | Console Drivers | 1 | Console Drivers |
| 2 | =============== | 2 | =============== |
| 3 | 3 | ||
| 4 | The linux kernel has 2 general types of console drivers. The first type is | 4 | The Linux kernel has 2 general types of console drivers. The first type is |
| 5 | assigned by the kernel to all the virtual consoles during the boot process. | 5 | assigned by the kernel to all the virtual consoles during the boot process. |
| 6 | This type will be called 'system driver', and only one system driver is allowed | 6 | This type will be called 'system driver', and only one system driver is allowed |
| 7 | to exist. The system driver is persistent and it can never be unloaded, though | 7 | to exist. The system driver is persistent and it can never be unloaded, though |
| @@ -17,10 +17,11 @@ of driver occupying the consoles.) They can only take over the console that is · 9 unmodified lines | |||
| 17 | occupied by the system driver. In the same token, if the modular driver is | 17 | occupied by the system driver. In the same token, if the modular driver is |
| 18 | released by the console, the system driver will take over. | 18 | released by the console, the system driver will take over. |
| 19 | 19 | ||
| 20 | Modular drivers, from the programmer's point of view, has to call: | 20 | Modular drivers, from the programmer's point of view, have to call: |
| 21 | 21 | ||
| 22 | do_take_over_console() - load and bind driver to console layer | 22 | do_take_over_console() - load and bind driver to console layer |
| 23 | give_up_console() - unload driver, it will only work if driver is fully unbond | 23 | give_up_console() - unload driver; it will only work if driver |
| 24 | is fully unbound | ||
| 24 | 25 | ||
| 25 | In newer kernels, the following are also available: | 26 | In newer kernels, the following are also available: |
| 26 | 27 | ||
| @@ -56,7 +57,7 @@ What do these files signify? · 29 unmodified lines | |||
| 56 | cat /sys/class/vtconsole/vtcon0/name | 57 | cat /sys/class/vtconsole/vtcon0/name |
| 57 | (S) VGA+ | 58 | (S) VGA+ |
| 58 | 59 | ||
| 59 | '(S)' stands for a (S)ystem driver, ie, it cannot be directly | 60 | '(S)' stands for a (S)ystem driver, i.e., it cannot be directly |
| 60 | commanded to bind or unbind | 61 | commanded to bind or unbind |
| 61 | 62 | ||
| 62 | 'VGA+' is the name of the driver | 63 | 'VGA+' is the name of the driver |
| @@ -89,7 +90,7 @@ driver, make changes, recompile, reload and rebind the driver without any need · 26 unmodified lines | |||
| 89 | for rebooting the kernel. For regular users who may want to switch from | 90 | for rebooting the kernel. For regular users who may want to switch from |
| 90 | framebuffer console to VGA console and vice versa, this feature also makes | 91 | framebuffer console to VGA console and vice versa, this feature also makes |
| 91 | this possible. (NOTE NOTE NOTE: Please read fbcon.txt under Documentation/fb | 92 | this possible. (NOTE NOTE NOTE: Please read fbcon.txt under Documentation/fb |
| 92 | for more details). | 93 | for more details.) |
| 93 | 94 | ||
| 94 | Notes for developers: | 95 | Notes for developers: |
| 95 | ===================== | 96 | ===================== |
| @@ -110,8 +111,8 @@ In order for binding to and unbinding from the console to properly work, · 14 unmodified lines | |||
| 110 | console drivers must follow these guidelines: | 111 | console drivers must follow these guidelines: |
| 111 | 112 | ||
| 112 | 1. All drivers, except system drivers, must call either do_register_con_driver() | 113 | 1. All drivers, except system drivers, must call either do_register_con_driver() |
| 113 | or do_take_over_console(). do_register_con_driver() will just add the driver to | 114 | or do_take_over_console(). do_register_con_driver() will just add the driver |
| 114 | the console's internal list. It won't take over the | 115 | to the console's internal list. It won't take over the |
| 115 | console. do_take_over_console(), as it name implies, will also take over (or | 116 | console. do_take_over_console(), as it name implies, will also take over (or |
| 116 | bind to) the console. | 117 | bind to) the console. |
| 117 | 118 | ||
| @@ -29,7 +29,7 @@ updated by one CPU, local_t is probably more appropriate. Please see · 28 unmodified lines | |||
| 29 | local_t. | 29 | local_t. |
| 30 | 30 | ||
| 31 | The first operations to implement for atomic_t's are the initializers and | 31 | The first operations to implement for atomic_t's are the initializers and |
| 32 | plain reads. :: | 32 | plain writes. :: |
| 33 | 33 | ||
| 34 | #define ATOMIC_INIT(i) { (i) } | 34 | #define ATOMIC_INIT(i) { (i) } |
| 35 | #define atomic_set(v, i) ((v)->counter = (i)) | 35 | #define atomic_set(v, i) ((v)->counter = (i)) |
| @@ -0,0 +1,92 @@ | |||
| 1 | =========================== | ||
| 2 | Boot time memory management | ||
| 3 | =========================== | ||
| 4 | |||
| 5 | Early system initialization cannot use "normal" memory management | ||
| 6 | simply because it is not set up yet. But there is still need to | ||
| 7 | allocate memory for various data structures, for instance for the | ||
| 8 | physical page allocator. To address this, a specialized allocator | ||
| 9 | called the :ref:`Boot Memory Allocator <bootmem>`, or bootmem, was | ||
| 10 | introduced. Several years later PowerPC developers added a "Logical | ||
| 11 | Memory Blocks" allocator, which was later adopted by other | ||
| 12 | architectures and renamed to :ref:`memblock <memblock>`. There is also | ||
| 13 | a compatibility layer called `nobootmem` that translates bootmem | ||
| 14 | allocation interfaces to memblock calls. | ||
| 15 | |||
| 16 | The selection of the early allocator is done using | ||
| 17 | ``CONFIG_NO_BOOTMEM`` and ``CONFIG_HAVE_MEMBLOCK`` kernel | ||
| 18 | configuration options. These options are enabled or disabled | ||
| 19 | statically by the architectures' Kconfig files. | ||
| 20 | |||
| 21 | * Architectures that rely only on bootmem select | ||
| 22 | ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=n``. | ||
| 23 | * The users of memblock with the nobootmem compatibility layer set | ||
| 24 | ``CONFIG_NO_BOOTMEM=y && CONFIG_HAVE_MEMBLOCK=y``. | ||
| 25 | * And for those that use both memblock and bootmem the configuration | ||
| 26 | includes ``CONFIG_NO_BOOTMEM=n && CONFIG_HAVE_MEMBLOCK=y``. | ||
| 27 | |||
| 28 | Whichever allocator is used, it is the responsibility of the | ||
| 29 | architecture specific initialization to set it up in | ||
| 30 | :c:func:`setup_arch` and tear it down in :c:func:`mem_init` functions. | ||
| 31 | |||
| 32 | Once the early memory management is available it offers a variety of | ||
| 33 | functions and macros for memory allocations. The allocation request | ||
| 34 | may be directed to the first (and probably the only) node or to a | ||
| 35 | particular node in a NUMA system. There are API variants that panic | ||
| 36 | when an allocation fails and those that don't. And more recent and | ||
| 37 | advanced memblock even allows controlling its own behaviour. | ||
| 38 | |||
| 39 | .. _bootmem: | ||
| 40 | |||
| 41 | Bootmem | ||
| 42 | ======= | ||
| 43 | |||
| 44 | (mostly stolen from Mel Gorman's "Understanding the Linux Virtual | ||
| 45 | Memory Manager" `book`_) | ||
| 46 | |||
| 47 | .. _book: https://www.kernel.org/doc/gorman/ | ||
| 48 | |||
| 49 | .. kernel-doc:: mm/bootmem.c | ||
| 50 | :doc: bootmem overview | ||
| 51 | |||
| 52 | .. _memblock: | ||
| 53 | |||
| 54 | Memblock | ||
| 55 | ======== | ||
| 56 | |||
| 57 | .. kernel-doc:: mm/memblock.c | ||
| 58 | :doc: memblock overview | ||
| 59 | |||
| 60 | |||
| 61 | Functions and structures | ||
| 62 | ======================== | ||
| 63 | |||
| 64 | Common API | ||
| 65 | ---------- | ||
| 66 | |||
| 67 | The functions that are described in this section are available | ||
| 68 | regardless of what early memory manager is enabled. | ||
| 69 | |||
| 70 | .. kernel-doc:: mm/nobootmem.c | ||
| 71 | |||
| 72 | Bootmem specific API | ||
| 73 | -------------------- | ||
| 74 | |||
| 75 | These interfaces available only with bootmem, i.e when ``CONFIG_NO_BOOTMEM=n`` | ||
| 76 | |||
| 77 | .. kernel-doc:: include/linux/bootmem.h | ||
| 78 | .. kernel-doc:: mm/bootmem.c | ||
| 79 | :nodocs: | ||
| 80 | |||
| 81 | Memblock specific API | ||
| 82 | --------------------- | ||
| 83 | |||
| 84 | Here is the description of memblock data structures, functions and | ||
| 85 | macros. Some of them are actually internal, but since they are | ||
| 86 | documented it would be silly to omit them. Besides, reading the | ||
| 87 | descriptions for the internal functions can help to understand what | ||
| 88 | really happens under the hood. | ||
| 89 | |||
| 90 | .. kernel-doc:: include/linux/memblock.h | ||
| 91 | .. kernel-doc:: mm/memblock.c | ||
| 92 | :nodocs: | ||
| @@ -76,4 +76,6 @@ Functions and structures · 75 unmodified lines | |||
| 76 | ======================== | 76 | ======================== |
| 77 | 77 | ||
| 78 | .. kernel-doc:: include/linux/idr.h | 78 | .. kernel-doc:: include/linux/idr.h |
| 79 | :functions: | ||
| 79 | .. kernel-doc:: lib/idr.c | 80 | .. kernel-doc:: lib/idr.c |
| 81 | :functions: | ||
| @@ -27,7 +27,10 @@ Core utilities · 26 unmodified lines | |||
| 27 | errseq | 27 | errseq |
| 28 | printk-formats | 28 | printk-formats |
| 29 | circular-buffers | 29 | circular-buffers |
| 30 | mm-api | ||
| 30 | gfp_mask-from-fs-io | 31 | gfp_mask-from-fs-io |
| 32 | timekeeping | ||
| 33 | boot-time-mm | ||
| 31 | 34 | ||
| 32 | Interfaces for kernel debugging | 35 | Interfaces for kernel debugging |
| 33 | =============================== | 36 | =============================== |
| @@ -39,6 +39,10 @@ String Manipulation · 38 unmodified lines | |||
| 39 | .. kernel-doc:: lib/string.c | 39 | .. kernel-doc:: lib/string.c |
| 40 | :export: | 40 | :export: |
| 41 | 41 | ||
| 42 | .. kernel-doc:: mm/util.c | ||
| 43 | :functions: kstrdup kstrdup_const kstrndup kmemdup kmemdup_nul memdup_user | ||
| 44 | vmemdup_user strndup_user memdup_user_nul | ||
| 45 | |||
| 42 | Basic Kernel Library Functions | 46 | Basic Kernel Library Functions |
| 43 | ============================== | 47 | ============================== |
| 44 | 48 | ||
| @@ -155,60 +159,6 @@ UUID/GUID · 110 unmodified lines | |||
| 155 | .. kernel-doc:: lib/uuid.c | 159 | .. kernel-doc:: lib/uuid.c |
| 156 | :export: | 160 | :export: |
| 157 | 161 | ||
| 158 | Memory Management in Linux | ||
| 159 | ========================== | ||
| 160 | |||
| 161 | The Slab Cache | ||
| 162 | -------------- | ||
| 163 | |||
| 164 | .. kernel-doc:: include/linux/slab.h | ||
| 165 | :internal: | ||
| 166 | |||
| 167 | .. kernel-doc:: mm/slab.c | ||
| 168 | :export: | ||
| 169 | |||
| 170 | .. kernel-doc:: mm/util.c | ||
| 171 | :export: | ||
| 172 | |||
| 173 | User Space Memory Access | ||
| 174 | ------------------------ | ||
| 175 | |||
| 176 | .. kernel-doc:: arch/x86/include/asm/uaccess.h | ||
| 177 | :internal: | ||
| 178 | |||
| 179 | .. kernel-doc:: arch/x86/lib/usercopy_32.c | ||
| 180 | :export: | ||
| 181 | |||
| 182 | More Memory Management Functions | ||
| 183 | -------------------------------- | ||
| 184 | |||
| 185 | .. kernel-doc:: mm/readahead.c | ||
| 186 | :export: | ||
| 187 | |||
| 188 | .. kernel-doc:: mm/filemap.c | ||
| 189 | :export: | ||
| 190 | |||
| 191 | .. kernel-doc:: mm/memory.c | ||
| 192 | :export: | ||
| 193 | |||
| 194 | .. kernel-doc:: mm/vmalloc.c | ||
| 195 | :export: | ||
| 196 | |||
| 197 | .. kernel-doc:: mm/page_alloc.c | ||
| 198 | :internal: | ||
| 199 | |||
| 200 | .. kernel-doc:: mm/mempool.c | ||
| 201 | :export: | ||
| 202 | |||
| 203 | .. kernel-doc:: mm/dmapool.c | ||
| 204 | :export: | ||
| 205 | |||
| 206 | .. kernel-doc:: mm/page-writeback.c | ||
| 207 | :export: | ||
| 208 | |||
| 209 | .. kernel-doc:: mm/truncate.c | ||
| 210 | :export: | ||
| 211 | |||
| 212 | Kernel IPC facilities | 162 | Kernel IPC facilities |
| 213 | ===================== | 163 | ===================== |
| 214 | 164 | ||
| @@ -437,4 +387,3 @@ Read-Copy Update (RCU) · 222 unmodified lines | |||
| 437 | .. kernel-doc:: include/linux/rcu_sync.h | 387 | .. kernel-doc:: include/linux/rcu_sync.h |
| 438 | 388 | ||
| 439 | .. kernel-doc:: kernel/rcu/sync.c | 389 | .. kernel-doc:: kernel/rcu/sync.c |
| 440 | |||
| @@ -0,0 +1,78 @@ | |||
| 1 | ====================== | ||
| 2 | Memory Management APIs | ||
| 3 | ====================== | ||
| 4 | |||
| 5 | User Space Memory Access | ||
| 6 | ======================== | ||
| 7 | |||
| 8 | .. kernel-doc:: arch/x86/include/asm/uaccess.h | ||
| 9 | :internal: | ||
| 10 | |||
| 11 | .. kernel-doc:: arch/x86/lib/usercopy_32.c | ||
| 12 | :export: | ||
| 13 | |||
| 14 | .. kernel-doc:: mm/util.c | ||
| 15 | :functions: get_user_pages_fast | ||
| 16 | |||
| 17 | Memory Allocation Controls | ||
| 18 | ========================== | ||
| 19 | |||
| 20 | Functions which need to allocate memory often use GFP flags to express | ||
| 21 | how that memory should be allocated. The GFP acronym stands for "get | ||
| 22 | free pages", the underlying memory allocation function. Not every GFP | ||
| 23 | flag is allowed to every function which may allocate memory. Most | ||
| 24 | users will want to use a plain ``GFP_KERNEL``. | ||
| 25 | |||
| 26 | .. kernel-doc:: include/linux/gfp.h | ||
| 27 | :doc: Page mobility and placement hints | ||
| 28 | |||
| 29 | .. kernel-doc:: include/linux/gfp.h | ||
| 30 | :doc: Watermark modifiers | ||
| 31 | |||
| 32 | .. kernel-doc:: include/linux/gfp.h | ||
| 33 | :doc: Reclaim modifiers | ||
| 34 | |||
| 35 | .. kernel-doc:: include/linux/gfp.h | ||
| 36 | :doc: Common combinations | ||
| 37 | |||
| 38 | The Slab Cache | ||
| 39 | ============== | ||
| 40 | |||
| 41 | .. kernel-doc:: include/linux/slab.h | ||
| 42 | :internal: | ||
| 43 | |||
| 44 | .. kernel-doc:: mm/slab.c | ||
| 45 | :export: | ||
| 46 | |||
| 47 | .. kernel-doc:: mm/util.c | ||
| 48 | :functions: kfree_const kvmalloc_node kvfree | ||
| 49 | |||
| 50 | More Memory Management Functions | ||
| 51 | ================================ | ||
| 52 | |||
| 53 | .. kernel-doc:: mm/readahead.c | ||
| 54 | :export: | ||
| 55 | |||
| 56 | .. kernel-doc:: mm/filemap.c | ||
| 57 | :export: | ||
| 58 | |||
| 59 | .. kernel-doc:: mm/memory.c | ||
| 60 | :export: | ||
| 61 | |||
| 62 | .. kernel-doc:: mm/vmalloc.c | ||
| 63 | :export: | ||
| 64 | |||
| 65 | .. kernel-doc:: mm/page_alloc.c | ||
| 66 | :internal: | ||
| 67 | |||
| 68 | .. kernel-doc:: mm/mempool.c | ||
| 69 | :export: | ||
| 70 | |||
| 71 | .. kernel-doc:: mm/dmapool.c | ||
| 72 | :export: | ||
| 73 | |||
| 74 | .. kernel-doc:: mm/page-writeback.c | ||
| 75 | :export: | ||
| 76 | |||
| 77 | .. kernel-doc:: mm/truncate.c | ||
| 78 | :export: | ||
| @@ -0,0 +1,185 @@ | |||
| 1 | ktime accessors | ||
| 2 | =============== | ||
| 3 | |||
| 4 | Device drivers can read the current time using ktime_get() and the many | ||
| 5 | related functions declared in linux/timekeeping.h. As a rule of thumb, | ||
| 6 | using an accessor with a shorter name is preferred over one with a longer | ||
| 7 | name if both are equally fit for a particular use case. | ||
| 8 | |||
| 9 | Basic ktime_t based interfaces | ||
| 10 | ------------------------------ | ||
| 11 | |||
| 12 | The recommended simplest form returns an opaque ktime_t, with variants | ||
| 13 | that return time for different clock references: | ||
| 14 | |||
| 15 | |||
| 16 | .. c:function:: ktime_t ktime_get( void ) | ||
| 17 | |||
| 18 | CLOCK_MONOTONIC | ||
| 19 | |||
| 20 | Useful for reliable timestamps and measuring short time intervals | ||
| 21 | accurately. Starts at system boot time but stops during suspend. | ||
| 22 | |||
| 23 | .. c:function:: ktime_t ktime_get_boottime( void ) | ||
| 24 | |||
| 25 | CLOCK_BOOTTIME | ||
| 26 | |||
| 27 | Like ktime_get(), but does not stop when suspended. This can be | ||
| 28 | used e.g. for key expiration times that need to be synchronized | ||
| 29 | with other machines across a suspend operation. | ||
| 30 | |||
| 31 | .. c:function:: ktime_t ktime_get_real( void ) | ||
| 32 | |||
| 33 | CLOCK_REALTIME | ||
| 34 | |||
| 35 | Returns the time in relative to the UNIX epoch starting in 1970 | ||
| 36 | using the Coordinated Universal Time (UTC), same as gettimeofday() | ||
| 37 | user space. This is used for all timestamps that need to | ||
| 38 | persist across a reboot, like inode times, but should be avoided | ||
| 39 | for internal uses, since it can jump backwards due to a leap | ||
| 40 | second update, NTP adjustment settimeofday() operation from user | ||
| 41 | space. | ||
| 42 | |||
| 43 | .. c:function:: ktime_t ktime_get_clocktai( void ) | ||
| 44 | |||
| 45 | CLOCK_TAI | ||
| 46 | |||
| 47 | Like ktime_get_real(), but uses the International Atomic Time (TAI) | ||
| 48 | reference instead of UTC to avoid jumping on leap second updates. | ||
| 49 | This is rarely useful in the kernel. | ||
| 50 | |||
| 51 | .. c:function:: ktime_t ktime_get_raw( void ) | ||
| 52 | |||
| 53 | CLOCK_MONOTONIC_RAW | ||
| 54 | |||
| 55 | Like ktime_get(), but runs at the same rate as the hardware | ||
| 56 | clocksource without (NTP) adjustments for clock drift. This is | ||
| 57 | also rarely needed in the kernel. | ||
| 58 | |||
| 59 | nanosecond, timespec64, and second output | ||
| 60 | ----------------------------------------- | ||
| 61 | |||
| 62 | For all of the above, there are variants that return the time in a | ||
| 63 | different format depending on what is required by the user: | ||
| 64 | |||
| 65 | .. c:function:: u64 ktime_get_ns( void ) | ||
| 66 | u64 ktime_get_boottime_ns( void ) | ||
| 67 | u64 ktime_get_real_ns( void ) | ||
| 68 | u64 ktime_get_tai_ns( void ) | ||
| 69 | u64 ktime_get_raw_ns( void ) | ||
| 70 | |||
| 71 | Same as the plain ktime_get functions, but returning a u64 number | ||
| 72 | of nanoseconds in the respective time reference, which may be | ||
| 73 | more convenient for some callers. | ||
| 74 | |||
| 75 | .. c:function:: void ktime_get_ts64( struct timespec64 * ) | ||
| 76 | void ktime_get_boottime_ts64( struct timespec64 * ) | ||
| 77 | void ktime_get_real_ts64( struct timespec64 * ) | ||
| 78 | void ktime_get_clocktai_ts64( struct timespec64 * ) | ||
| 79 | void ktime_get_raw_ts64( struct timespec64 * ) | ||
| 80 | |||
| 81 | Same above, but returns the time in a 'struct timespec64', split | ||
| 82 | into seconds and nanoseconds. This can avoid an extra division | ||
| 83 | when printing the time, or when passing it into an external | ||
| 84 | interface that expects a 'timespec' or 'timeval' structure. | ||
| 85 | |||
| 86 | .. c:function:: time64_t ktime_get_seconds( void ) | ||
| 87 | time64_t ktime_get_boottime_seconds( void ) | ||
| 88 | time64_t ktime_get_real_seconds( void ) | ||
| 89 | time64_t ktime_get_clocktai_seconds( void ) | ||
| 90 | time64_t ktime_get_raw_seconds( void ) | ||
| 91 | |||
| 92 | Return a coarse-grained version of the time as a scalar | ||
| 93 | time64_t. This avoids accessing the clock hardware and rounds | ||
| 94 | down the seconds to the full seconds of the last timer tick | ||
| 95 | using the respective reference. | ||
| 96 | |||
| 97 | Coarse and fast_ns access | ||
| 98 | ------------------------- | ||
| 99 | |||
| 100 | Some additional variants exist for more specialized cases: | ||
| 101 | |||
| 102 | .. c:function:: ktime_t ktime_get_coarse_boottime( void ) | ||
| 103 | ktime_t ktime_get_coarse_real( void ) | ||
| 104 | ktime_t ktime_get_coarse_clocktai( void ) | ||
| 105 | ktime_t ktime_get_coarse_raw( void ) | ||
| 106 | |||
| 107 | .. c:function:: void ktime_get_coarse_ts64( struct timespec64 * ) | ||
| 108 | void ktime_get_coarse_boottime_ts64( struct timespec64 * ) | ||
| 109 | void ktime_get_coarse_real_ts64( struct timespec64 * ) | ||
| 110 | void ktime_get_coarse_clocktai_ts64( struct timespec64 * ) | ||
| 111 | void ktime_get_coarse_raw_ts64( struct timespec64 * ) | ||
| 112 | |||
| 113 | These are quicker than the non-coarse versions, but less accurate, | ||
| 114 | corresponding to CLOCK_MONONOTNIC_COARSE and CLOCK_REALTIME_COARSE | ||
| 115 | in user space, along with the equivalent boottime/tai/raw | ||
| 116 | timebase not available in user space. | ||
| 117 | |||
| 118 | The time returned here corresponds to the last timer tick, which | ||
| 119 | may be as much as 10ms in the past (for CONFIG_HZ=100), same as | ||
| 120 | reading the 'jiffies' variable. These are only useful when called | ||
| 121 | in a fast path and one still expects better than second accuracy, | ||
| 122 | but can't easily use 'jiffies', e.g. for inode timestamps. | ||
| 123 | Skipping the hardware clock access saves around 100 CPU cycles | ||
| 124 | on most modern machines with a reliable cycle counter, but | ||
| 125 | up to several microseconds on older hardware with an external | ||
| 126 | clocksource. | ||
| 127 | |||
| 128 | .. c:function:: u64 ktime_get_mono_fast_ns( void ) | ||
| 129 | u64 ktime_get_raw_fast_ns( void ) | ||
| 130 | u64 ktime_get_boot_fast_ns( void ) | ||
| 131 | u64 ktime_get_real_fast_ns( void ) | ||
| 132 | |||
| 133 | These variants are safe to call from any context, including from | ||
| 134 | a non-maskable interrupt (NMI) during a timekeeper update, and | ||
| 135 | while we are entering suspend with the clocksource powered down. | ||
| 136 | This is useful in some tracing or debugging code as well as | ||
| 137 | machine check reporting, but most drivers should never call them, | ||
| 138 | since the time is allowed to jump under certain conditions. | ||
| 139 | |||
| 140 | Deprecated time interfaces | ||
| 141 | -------------------------- | ||
| 142 | |||
| 143 | Older kernels used some other interfaces that are now being phased out | ||
| 144 | but may appear in third-party drivers being ported here. In particular, | ||
| 145 | all interfaces returning a 'struct timeval' or 'struct timespec' have | ||
| 146 | been replaced because the tv_sec member overflows in year 2038 on 32-bit | ||
| 147 | architectures. These are the recommended replacements: | ||
| 148 | |||
| 149 | .. c:function:: void ktime_get_ts( struct timespec * ) | ||
| 150 | |||
| 151 | Use ktime_get() or ktime_get_ts64() instead. | ||
| 152 | |||
| 153 | .. c:function:: struct timeval do_gettimeofday( void ) | ||
| 154 | struct timespec getnstimeofday( void ) | ||
| 155 | struct timespec64 getnstimeofday64( void ) | ||
| 156 | void ktime_get_real_ts( struct timespec * ) | ||
| 157 | |||
| 158 | ktime_get_real_ts64() is a direct replacement, but consider using | ||
| 159 | monotonic time (ktime_get_ts64()) and/or a ktime_t based interface | ||
| 160 | (ktime_get()/ktime_get_real()). | ||
| 161 | |||
| 162 | .. c:function:: struct timespec current_kernel_time( void ) | ||
| 163 | struct timespec64 current_kernel_time64( void ) | ||
| 164 | struct timespec get_monotonic_coarse( void ) | ||
| 165 | struct timespec64 get_monotonic_coarse64( void ) | ||
| 166 | |||
| 167 | These are replaced by ktime_get_coarse_real_ts64() and | ||
| 168 | ktime_get_coarse_ts64(). However, A lot of code that wants | ||
| 169 | coarse-grained times can use the simple 'jiffies' instead, while | ||
| 170 | some drivers may actually want the higher resolution accessors | ||
| 171 | these days. | ||
| 172 | |||
| 173 | .. c:function:: struct timespec getrawmonotonic( void ) | ||
| 174 | struct timespec64 getrawmonotonic64( void ) | ||
| 175 | struct timespec timekeeping_clocktai( void ) | ||
| 176 | struct timespec64 timekeeping_clocktai64( void ) | ||
| 177 | struct timespec get_monotonic_boottime( void ) | ||
| 178 | struct timespec64 get_monotonic_boottime64( void ) | ||
| 179 | |||
| 180 | These are replaced by ktime_get_raw()/ktime_get_raw_ts64(), | ||
| 181 | ktime_get_clocktai()/ktime_get_clocktai_ts64() as well | ||
| 182 | as ktime_get_boottime()/ktime_get_boottime_ts64(). | ||
| 183 | However, if the particular choice of clock source is not | ||
| 184 | important for the user, consider converting to | ||
| 185 | ktime_get()/ktime_get_ts64() instead for consistency. | ||
| @@ -162,7 +162,7 @@ Code Example For Use of Operational State Memory With SHASH · 161 unmodified lines | |||
| 162 | char *hash_alg_name = "sha1-padlock-nano"; | 162 | char *hash_alg_name = "sha1-padlock-nano"; |
| 163 | int ret; | 163 | int ret; |
| 164 | 164 | ||
| 165 | alg = crypto_alloc_shash(hash_alg_name, CRYPTO_ALG_TYPE_SHASH, 0); | 165 | alg = crypto_alloc_shash(hash_alg_name, 0, 0); |
| 166 | if (IS_ERR(alg)) { | 166 | if (IS_ERR(alg)) { |
| 167 | pr_info("can't alloc alg %s\n", hash_alg_name); | 167 | pr_info("can't alloc alg %s\n", hash_alg_name); |
| 168 | return PTR_ERR(alg); | 168 | return PTR_ERR(alg); |
| @@ -156,6 +156,11 @@ Contributing new tests (details) · 155 unmodified lines | |||
| 156 | installed by the distro on the system should be the primary focus to be able | 156 | installed by the distro on the system should be the primary focus to be able |
| 157 | to find regressions. | 157 | to find regressions. |
| 158 | 158 | ||
| 159 | * If a test needs specific kernel config options enabled, add a config file in | ||
| 160 | the test directory to enable them. | ||
| 161 | |||
| 162 | e.g: tools/testing/selftests/android/ion/config | ||
| 163 | |||
| 159 | Test Harness | 164 | Test Harness |
| 160 | ============ | 165 | ============ |
| 161 | 166 | ||
| @@ -5,7 +5,8 @@ Device-Mapper's "delay" target delays reads and/or writes · 4 unmodified lines | |||
| 5 | and maps them to different devices. | 5 | and maps them to different devices. |
| 6 | 6 | ||
| 7 | Parameters: | 7 | Parameters: |
| 8 | <device> <offset> <delay> [<write_device> <write_offset> <write_delay>] | 8 | <device> <offset> <delay> [<write_device> <write_offset> <write_delay> |
| 9 | [<flush_device> <flush_offset> <flush_delay>]] | ||
| 9 | 10 | ||
| 10 | With separate write parameters, the first set is only used for reads. | 11 | With separate write parameters, the first set is only used for reads. |
| 11 | Offsets are specified in sectors. | 12 | Offsets are specified in sectors. |
| @@ -113,6 +113,10 @@ internal_hash:algorithm(:key) (the key is optional) · 112 unmodified lines | |||
| 113 | from an upper layer target, such as dm-crypt. The upper layer | 113 | from an upper layer target, such as dm-crypt. The upper layer |
| 114 | target should check the validity of the integrity tags. | 114 | target should check the validity of the integrity tags. |
| 115 | 115 | ||
| 116 | recalculate | ||
| 117 | Recalculate the integrity tags automatically. It is only valid | ||
| 118 | when using internal hash. | ||
| 119 | |||
| 116 | journal_crypt:algorithm(:key) (the key is optional) | 120 | journal_crypt:algorithm(:key) (the key is optional) |
| 117 | Encrypt the journal using given algorithm to make sure that the | 121 | Encrypt the journal using given algorithm to make sure that the |
| 118 | attacker can't read the journal. You can use a block cipher here | 122 | attacker can't read the journal. You can use a block cipher here |
| @@ -28,17 +28,18 @@ administrator some freedom, for example to: · 27 unmodified lines | |||
| 28 | Status | 28 | Status |
| 29 | ====== | 29 | ====== |
| 30 | 30 | ||
| 31 | These targets are very much still in the EXPERIMENTAL state. Please | 31 | These targets are considered safe for production use. But different use |
| 32 | do not yet rely on them in production. But do experiment and offer us | 32 | cases will have different performance characteristics, for example due |
| 33 | feedback. Different use cases will have different performance | 33 | to fragmentation of the data volume. |
| 34 | characteristics, for example due to fragmentation of the data volume. | ||
| 35 | 34 | ||
| 36 | If you find this software is not performing as expected please mail | 35 | If you find this software is not performing as expected please mail |
| 37 | dm-devel@redhat.com with details and we'll try our best to improve | 36 | dm-devel@redhat.com with details and we'll try our best to improve |
| 38 | things for you. | 37 | things for you. |
| 39 | 38 | ||
| 40 | Userspace tools for checking and repairing the metadata are under | 39 | Userspace tools for checking and repairing the metadata have been fully |
| 41 | development. | 40 | developed and are available as 'thin_check' and 'thin_repair'. The name |
| 41 | of the package that provides these utilities varies by distribution (on | ||
| 42 | a Red Hat distribution it is named 'device-mapper-persistent-data'). | ||
| 42 | 43 | ||
| 43 | Cookbook | 44 | Cookbook |
| 44 | ======== | 45 | ======== |
| @@ -280,7 +281,7 @@ ii) Status · 235 unmodified lines | |||
| 280 | <transaction id> <used metadata blocks>/<total metadata blocks> | 281 | <transaction id> <used metadata blocks>/<total metadata blocks> |
| 281 | <used data blocks>/<total data blocks> <held metadata root> | 282 | <used data blocks>/<total data blocks> <held metadata root> |
| 282 | ro|rw|out_of_data_space [no_]discard_passdown [error|queue]_if_no_space | 283 | ro|rw|out_of_data_space [no_]discard_passdown [error|queue]_if_no_space |
| 283 | needs_check|- | 284 | needs_check|- metadata_low_watermark |
| 284 | 285 | ||
| 285 | transaction id: | 286 | transaction id: |
| 286 | A 64-bit number used by userspace to help synchronise with metadata | 287 | A 64-bit number used by userspace to help synchronise with metadata |
| @@ -327,6 +328,11 @@ ii) Status · 40 unmodified lines | |||
| 327 | thin-pool can be made fully operational again. '-' indicates | 328 | thin-pool can be made fully operational again. '-' indicates |
| 328 | needs_check is not set. | 329 | needs_check is not set. |
| 329 | 330 | ||
| 331 | metadata_low_watermark: | ||
| 332 | Value of metadata low watermark in blocks. The kernel sets this | ||
| 333 | value internally but userspace needs to know this value to | ||
| 334 | determine if an event was caused by crossing this threshold. | ||
| 335 | |||
| 330 | iii) Messages | 336 | iii) Messages |
| 331 | 337 | ||
| 332 | create_thin <dev id> | 338 | create_thin <dev id> |
| @@ -15,6 +15,8 @@ Constructor parameters: · 14 unmodified lines | |||
| 15 | size) | 15 | size) |
| 16 | 5. the number of optional parameters (the parameters with an argument | 16 | 5. the number of optional parameters (the parameters with an argument |
| 17 | count as two) | 17 | count as two) |
| 18 | start_sector n (default: 0) | ||
| 19 | offset from the start of cache device in 512-byte sectors | ||
| 18 | high_watermark n (default: 50) | 20 | high_watermark n (default: 50) |
| 19 | start writeback when the number of used blocks reach this | 21 | start writeback when the number of used blocks reach this |
| 20 | watermark | 22 | watermark |
| @@ -1,7 +0,0 @@ | |||
| 1 | Adapteva Platforms Device Tree Bindings | ||
| 2 | --------------------------------------- | ||
| 3 | |||
| 4 | Parallella board | ||
| 5 | |||
| 6 | Required root node properties: | ||
| 7 | - compatible = "adapteva,parallella"; | ||
| @@ -41,6 +41,14 @@ Boards with the Amlogic Meson GXL S905D SoC shall have the following properties: · 40 unmodified lines | |||
| 41 | Required root node property: | 41 | Required root node property: |
| 42 | compatible: "amlogic,s905d", "amlogic,meson-gxl"; | 42 | compatible: "amlogic,s905d", "amlogic,meson-gxl"; |
| 43 | 43 | ||
| 44 | Boards with the Amlogic Meson GXL S805X SoC shall have the following properties: | ||
| 45 | Required root node property: | ||
| 46 | compatible: "amlogic,s805x", "amlogic,meson-gxl"; | ||
| 47 | |||
| 48 | Boards with the Amlogic Meson GXL S905W SoC shall have the following properties: | ||
| 49 | Required root node property: | ||
| 50 | compatible: "amlogic,s905w", "amlogic,meson-gxl"; | ||
| 51 | |||
| 44 | Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: | 52 | Boards with the Amlogic Meson GXM S912 SoC shall have the following properties: |
| 45 | Required root node property: | 53 | Required root node property: |
| 46 | compatible: "amlogic,s912", "amlogic,meson-gxm"; | 54 | compatible: "amlogic,s912", "amlogic,meson-gxm"; |
| @@ -79,6 +87,11 @@ Board compatible values (alphabetically, grouped by SoC): · 32 unmodified lines | |||
| 79 | - "amlogic,p230" (Meson gxl s905d) | 87 | - "amlogic,p230" (Meson gxl s905d) |
| 80 | - "amlogic,p231" (Meson gxl s905d) | 88 | - "amlogic,p231" (Meson gxl s905d) |
| 81 | 89 | ||
| 90 | - "amlogic,p241" (Meson gxl s805x) | ||
| 91 | |||
| 92 | - "amlogic,p281" (Meson gxl s905w) | ||
| 93 | - "oranth,tx3-mini" (Meson gxl s905w) | ||
| 94 | |||
| 82 | - "amlogic,q200" (Meson gxm s912) | 95 | - "amlogic,q200" (Meson gxm s912) |
| 83 | - "amlogic,q201" (Meson gxm s912) | 96 | - "amlogic,q201" (Meson gxm s912) |
| 84 | - "khadas,vim2" (Meson gxm s912) | 97 | - "khadas,vim2" (Meson gxm s912) |
| @@ -1,14 +0,0 @@ | |||
| 1 | * Power Management Controller (PMC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "atmel,<chip>-pmc". | ||
| 5 | <chip> can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12, | ||
| 6 | at91sam9x5, sama5d3 | ||
| 7 | |||
| 8 | - reg: Should contain PMC registers location and length | ||
| 9 | |||
| 10 | Examples: | ||
| 11 | pmc: pmc@fffffc00 { | ||
| 12 | compatible = "atmel,at91rm9200-pmc"; | ||
| 13 | reg = <0xfffffc00 0x100>; | ||
| 14 | }; | ||
| @@ -189,7 +189,11 @@ Power-Down (SRPD), among other things. · 188 unmodified lines | |||
| 189 | 189 | ||
| 190 | Required properties: | 190 | Required properties: |
| 191 | - compatible : should contain one of these | 191 | - compatible : should contain one of these |
| 192 | "brcm,brcmstb-memc-ddr-rev-b.2.1" | ||
| 192 | "brcm,brcmstb-memc-ddr-rev-b.2.2" | 193 | "brcm,brcmstb-memc-ddr-rev-b.2.2" |
| 194 | "brcm,brcmstb-memc-ddr-rev-b.2.3" | ||
| 195 | "brcm,brcmstb-memc-ddr-rev-b.3.0" | ||
| 196 | "brcm,brcmstb-memc-ddr-rev-b.3.1" | ||
| 193 | "brcm,brcmstb-memc-ddr" | 197 | "brcm,brcmstb-memc-ddr" |
| 194 | - reg : the MEMC DDR register range | 198 | - reg : the MEMC DDR register range |
| 195 | 199 | ||
| @@ -39,6 +39,8 @@ its hardware characteristcs. · 38 unmodified lines | |||
| 39 | 39 | ||
| 40 | - System Trace Macrocell: | 40 | - System Trace Macrocell: |
| 41 | "arm,coresight-stm", "arm,primecell"; [1] | 41 | "arm,coresight-stm", "arm,primecell"; [1] |
| 42 | - Coresight Address Translation Unit (CATU) | ||
| 43 | "arm,coresight-catu", "arm,primecell"; | ||
| 42 | 44 | ||
| 43 | * reg: physical base address and length of the register | 45 | * reg: physical base address and length of the register |
| 44 | set(s) of the component. | 46 | set(s) of the component. |
| @@ -84,8 +86,15 @@ its hardware characteristcs. · 39 unmodified lines | |||
| 84 | * Optional property for TMC: | 86 | * Optional property for TMC: |
| 85 | 87 | ||
| 86 | * arm,buffer-size: size of contiguous buffer space for TMC ETR | 88 | * arm,buffer-size: size of contiguous buffer space for TMC ETR |
| 87 | (embedded trace router) | 89 | (embedded trace router). This property is obsolete. The buffer size |
| 90 | can be configured dynamically via buffer_size property in sysfs. | ||
| 88 | 91 | ||
| 92 | * arm,scatter-gather: boolean. Indicates that the TMC-ETR can safely | ||
| 93 | use the SG mode on this system. | ||
| 94 | |||
| 95 | * Optional property for CATU : | ||
| 96 | * interrupts : Exactly one SPI may be listed for reporting the address | ||
| 97 | error | ||
| 89 | 98 | ||
| 90 | Example: | 99 | Example: |
| 91 | 100 | ||
| @@ -118,6 +127,35 @@ Example: · 26 unmodified lines | |||
| 118 | }; | 127 | }; |
| 119 | }; | 128 | }; |
| 120 | 129 | ||
| 130 | etr@20070000 { | ||
| 131 | compatible = "arm,coresight-tmc", "arm,primecell"; | ||
| 132 | reg = <0 0x20070000 0 0x1000>; | ||
| 133 | |||
| 134 | clocks = <&oscclk6a>; | ||
| 135 | clock-names = "apb_pclk"; | ||
| 136 | ports { | ||
| 137 | #address-cells = <1>; | ||
| 138 | #size-cells = <0>; | ||
| 139 | |||
| 140 | /* input port */ | ||
| 141 | port@0 { | ||
| 142 | reg = <0>; | ||
| 143 | etr_in_port: endpoint { | ||
| 144 | slave-mode; | ||
| 145 | remote-endpoint = <&replicator2_out_port0>; | ||
| 146 | }; | ||
| 147 | }; | ||
| 148 | |||
| 149 | /* CATU link represented by output port */ | ||
| 150 | port@1 { | ||
| 151 | reg = <1>; | ||
| 152 | etr_out_port: endpoint { | ||
| 153 | remote-endpoint = <&catu_in_port>; | ||
| 154 | }; | ||
| 155 | }; | ||
| 156 | }; | ||
| 157 | }; | ||
| 158 | |||
| 121 | 2. Links | 159 | 2. Links |
| 122 | replicator { | 160 | replicator { |
| 123 | /* non-configurable replicators don't show up on the | 161 | /* non-configurable replicators don't show up on the |
| @@ -247,5 +285,23 @@ Example: · 123 unmodified lines | |||
| 247 | }; | 285 | }; |
| 248 | }; | 286 | }; |
| 249 | 287 | ||
| 288 | 5. CATU | ||
| 289 | |||
| 290 | catu@207e0000 { | ||
| 291 | compatible = "arm,coresight-catu", "arm,primecell"; | ||
| 292 | reg = <0 0x207e0000 0 0x1000>; | ||
| 293 | |||
| 294 | clocks = <&oscclk6a>; | ||
| 295 | clock-names = "apb_pclk"; | ||
| 296 | |||
| 297 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; | ||
| 298 | port { | ||
| 299 | catu_in_port: endpoint { | ||
| 300 | slave-mode; | ||
| 301 | remote-endpoint = <&etr_out_port>; | ||
| 302 | }; | ||
| 303 | }; | ||
| 304 | }; | ||
| 305 | |||
| 250 | [1]. There is currently two version of STM: STM32 and STM500. Both | 306 | [1]. There is currently two version of STM: STM32 and STM500. Both |
| 251 | have the same HW interface and as such don't need an explicit binding name. | 307 | have the same HW interface and as such don't need an explicit binding name. |
| @@ -94,7 +94,7 @@ cpus { · 93 unmodified lines | |||
| 94 | }; | 94 | }; |
| 95 | 95 | ||
| 96 | idle-states { | 96 | idle-states { |
| 97 | entry-method = "arm,psci"; | 97 | entry-method = "psci"; |
| 98 | 98 | ||
| 99 | CPU_SLEEP_0: cpu-sleep-0 { | 99 | CPU_SLEEP_0: cpu-sleep-0 { |
| 100 | compatible = "arm,idle-state"; | 100 | compatible = "arm,idle-state"; |
| @@ -183,6 +183,7 @@ described below. · 182 unmodified lines | |||
| 183 | "marvell,sheeva-v5" | 183 | "marvell,sheeva-v5" |
| 184 | "nvidia,tegra132-denver" | 184 | "nvidia,tegra132-denver" |
| 185 | "nvidia,tegra186-denver" | 185 | "nvidia,tegra186-denver" |
| 186 | "nvidia,tegra194-carmel" | ||
| 186 | "qcom,krait" | 187 | "qcom,krait" |
| 187 | "qcom,kryo" | 188 | "qcom,kryo" |
| 188 | "qcom,kryo385" | 189 | "qcom,kryo385" |
| @@ -219,6 +220,7 @@ described below. · 30 unmodified lines | |||
| 219 | "qcom,kpss-acc-v1" | 220 | "qcom,kpss-acc-v1" |
| 220 | "qcom,kpss-acc-v2" | 221 | "qcom,kpss-acc-v2" |
| 221 | "renesas,apmu" | 222 | "renesas,apmu" |
| 223 | "renesas,r9a06g032-smp" | ||
| 222 | "rockchip,rk3036-smp" | 224 | "rockchip,rk3036-smp" |
| 223 | "rockchip,rk3066-smp" | 225 | "rockchip,rk3066-smp" |
| 224 | "ste,dbx500-smp" | 226 | "ste,dbx500-smp" |
| @@ -18,9 +18,6 @@ Required properties: · 17 unmodified lines | |||
| 18 | assignment of the interrupt router is required. | 18 | assignment of the interrupt router is required. |
| 19 | Flags get passed only when using GIC as parent. Flags | 19 | Flags get passed only when using GIC as parent. Flags |
| 20 | encoding as documented by the GIC bindings. | 20 | encoding as documented by the GIC bindings. |
| 21 | - interrupt-parent: Should be the phandle for the interrupt controller of | ||
| 22 | the CPU the device tree is intended to be used on. This | ||
| 23 | is either the node of the GIC or NVIC controller. | ||
| 24 | 21 | ||
| 25 | Example: | 22 | Example: |
| 26 | mscm_ir: interrupt-controller@40001800 { | 23 | mscm_ir: interrupt-controller@40001800 { |
| @@ -0,0 +1,12 @@ | |||
| 1 | * Freescale Multi Master Multi Memory Interface (M4IF) module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "fsl,imx51-m4if" | ||
| 5 | - reg : Address and length of the register set for the device | ||
| 6 | |||
| 7 | Example: | ||
| 8 | |||
| 9 | m4if: m4if@83fd8000 { | ||
| 10 | compatible = "fsl,imx51-m4if"; | ||
| 11 | reg = <0x83fd8000 0x1000>; | ||
| 12 | }; | ||
| @@ -0,0 +1,12 @@ | |||
| 1 | * Freescale Tigerp platform module | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be "fsl,imx51-tigerp" | ||
| 5 | - reg : Address and length of the register set for the device | ||
| 6 | |||
| 7 | Example: | ||
| 8 | |||
| 9 | tigerp: tigerp@83fa0000 { | ||
| 10 | compatible = "fsl,imx51-tigerp"; | ||
| 11 | reg = <0x83fa0000 0x28>; | ||
| 12 | }; | ||
| @@ -53,6 +53,10 @@ i.MX6 Quad SABRE Automotive Board · 52 unmodified lines | |||
| 53 | Required root node properties: | 53 | Required root node properties: |
| 54 | - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; | 54 | - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; |
| 55 | 55 | ||
| 56 | i.MX6SLL EVK board | ||
| 57 | Required root node properties: | ||
| 58 | - compatible = "fsl,imx6sll-evk", "fsl,imx6sll"; | ||
| 59 | |||
| 56 | Generic i.MX boards | 60 | Generic i.MX boards |
| 57 | ------------------- | 61 | ------------------- |
| 58 | 62 | ||
| @@ -237,8 +237,8 @@ processor idle states, defined as device tree nodes, are listed. · 236 unmodified lines | |||
| 237 | Value type: <stringlist> | 237 | Value type: <stringlist> |
| 238 | Usage and definition depend on ARM architecture version. | 238 | Usage and definition depend on ARM architecture version. |
| 239 | # On ARM v8 64-bit this property is required and must | 239 | # On ARM v8 64-bit this property is required and must |
| 240 | be one of: | 240 | be: |
| 241 | - "psci" (see bindings in [2]) | 241 | - "psci" |
| 242 | # On ARM 32-bit systems this property is optional | 242 | # On ARM 32-bit systems this property is optional |
| 243 | 243 | ||
| 244 | The nodes describing the idle states (state) can only be defined within the | 244 | The nodes describing the idle states (state) can only be defined within the |
| @@ -1,8 +0,0 @@ | |||
| 1 | * Insignal's Exynos4210 based Origen evaluation board | ||
| 2 | |||
| 3 | Origen low-cost evaluation board is based on Samsung's Exynos4210 SoC. | ||
| 4 | |||
| 5 | Required root node properties: | ||
| 6 | - compatible = should be one or more of the following. | ||
| 7 | (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board. | ||
| 8 | (b) "samsung,exynos4210" - for boards based on Exynos4210 SoC. | ||
| @@ -2,14 +2,17 @@ Marvell Armada AP806 System Controller · 1 unmodified line | |||
| 2 | ====================================== | 2 | ====================================== |
| 3 | 3 | ||
| 4 | The AP806 is one of the two core HW blocks of the Marvell Armada 7K/8K | 4 | The AP806 is one of the two core HW blocks of the Marvell Armada 7K/8K |
| 5 | SoCs. It contains a system controller, which provides a number | 5 | SoCs. It contains system controllers, which provide several registers |
| 6 | registers giving access to numerous features: clocks, pin-muxing and | 6 | giving access to numerous features: clocks, pin-muxing and many other |
| 7 | many other SoC configuration items. This DT binding allows to describe | 7 | SoC configuration items. This DT binding allows to describe these |
| 8 | this system controller. | 8 | system controllers. |
| 9 | 9 | ||
| 10 | For the top level node: | 10 | For the top level node: |
| 11 | - compatible: must be: "syscon", "simple-mfd"; | 11 | - compatible: must be: "syscon", "simple-mfd"; |
| 12 | - reg: register area of the AP806 system controller | 12 | - reg: register area of the AP806 system controller |
| 13 | |||
| 14 | SYSTEM CONTROLLER 0 | ||
| 15 | =================== | ||
| 13 | 16 | ||
| 14 | Clocks: | 17 | Clocks: |
| 15 | ------- | 18 | ------- |
| @@ -98,3 +101,38 @@ ap_syscon: system-controller@6f4000 { · 82 unmodified lines | |||
| 98 | gpio-ranges = <&ap_pinctrl 0 0 19>; | 101 | gpio-ranges = <&ap_pinctrl 0 0 19>; |
| 99 | }; | 102 | }; |
| 100 | }; | 103 | }; |
| 104 | |||
| 105 | SYSTEM CONTROLLER 1 | ||
| 106 | =================== | ||
| 107 | |||
| 108 | Thermal: | ||
| 109 | -------- | ||
| 110 | |||
| 111 | For common binding part and usage, refer to | ||
| 112 | Documentation/devicetree/bindings/thermal/thermal.txt | ||
| 113 | |||
| 114 | The thermal IP can probe the temperature all around the processor. It | ||
| 115 | may feature several channels, each of them wired to one sensor. | ||
| 116 | |||
| 117 | Required properties: | ||
| 118 | - compatible: must be one of: | ||
| 119 | * marvell,armada-ap806-thermal | ||
| 120 | - reg: register range associated with the thermal functions. | ||
| 121 | |||
| 122 | Optional properties: | ||
| 123 | - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer | ||
| 124 | to this IP and represents the channel ID. There is one sensor per | ||
| 125 | channel. O refers to the thermal IP internal channel, while positive | ||
| 126 | IDs refer to each CPU. | ||
| 127 | |||
| 128 | Example: | ||
| 129 | ap_syscon1: system-controller@6f8000 { | ||
| 130 | compatible = "syscon", "simple-mfd"; | ||
| 131 | reg = <0x6f8000 0x1000>; | ||
| 132 | |||
| 133 | ap_thermal: thermal-sensor@80 { | ||
| 134 | compatible = "marvell,armada-ap806-thermal"; | ||
| 135 | reg = <0x80 0x10>; | ||
| 136 | #thermal-sensor-cells = <1>; | ||
| 137 | }; | ||
| 138 | }; | ||
| @@ -33,3 +33,18 @@ nb_pm: syscon@14000 { · 32 unmodified lines | |||
| 33 | compatible = "marvell,armada-3700-nb-pm", "syscon"; | 33 | compatible = "marvell,armada-3700-nb-pm", "syscon"; |
| 34 | reg = <0x14000 0x60>; | 34 | reg = <0x14000 0x60>; |
| 35 | } | 35 | } |
| 36 | |||
| 37 | AVS | ||
| 38 | --- | ||
| 39 | |||
| 40 | For AVS an other component is needed: | ||
| 41 | |||
| 42 | Required properties: | ||
| 43 | - compatible : should contain "marvell,armada-3700-avs", "syscon"; | ||
| 44 | - reg : the register start and length for the AVS | ||
| 45 | |||
| 46 | Example: | ||
| 47 | avs: avs@11500 { | ||
| 48 | compatible = "marvell,armada-3700-avs", "syscon"; | ||
| 49 | reg = <0x11500 0x40>; | ||
| 50 | } | ||
| @@ -1,15 +1,18 @@ | |||
| 1 | Marvell Armada CP110 System Controller 0 | 1 | Marvell Armada CP110 System Controller |
| 2 | ======================================== | 2 | ====================================== |
| 3 | 3 | ||
| 4 | The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K | 4 | The CP110 is one of the two core HW blocks of the Marvell Armada 7K/8K |
| 5 | SoCs. It contains two sets of system control registers, System | 5 | SoCs. It contains system controllers, which provide several registers |
| 6 | Controller 0 and System Controller 1. This Device Tree binding allows | 6 | giving access to numerous features: clocks, pin-muxing and many other |
| 7 | to describe the first system controller, which provides registers to | 7 | SoC configuration items. This DT binding allows to describe these |
| 8 | configure various aspects of the SoC. | 8 | system controllers. |
| 9 | 9 | ||
| 10 | For the top level node: | 10 | For the top level node: |
| 11 | - compatible: must be: "syscon", "simple-mfd"; | 11 | - compatible: must be: "syscon", "simple-mfd"; |
| 12 | - reg: register area of the CP110 system controller 0 | 12 | - reg: register area of the CP110 system controller |
| 13 | |||
| 14 | SYSTEM CONTROLLER 0 | ||
| 15 | =================== | ||
| 13 | 16 | ||
| 14 | Clocks: | 17 | Clocks: |
| 15 | ------- | 18 | ------- |
| @@ -163,26 +166,60 @@ Required properties: · 147 unmodified lines | |||
| 163 | 166 | ||
| 164 | Example: | 167 | Example: |
| 165 | 168 | ||
| 166 | cpm_syscon0: system-controller@440000 { | 169 | CP110_LABEL(syscon0): system-controller@440000 { |
| 167 | compatible = "syscon", "simple-mfd"; | 170 | compatible = "syscon", "simple-mfd"; |
| 168 | reg = <0x440000 0x1000>; | 171 | reg = <0x440000 0x1000>; |
| 169 | 172 | ||
| 170 | cpm_clk: clock { | 173 | CP110_LABEL(clk): clock { |
| 171 | compatible = "marvell,cp110-clock"; | 174 | compatible = "marvell,cp110-clock"; |
| 172 | #clock-cells = <2>; | 175 | #clock-cells = <2>; |
| 173 | }; | 176 | }; |
| 174 | 177 | ||
| 175 | cpm_pinctrl: pinctrl { | 178 | CP110_LABEL(pinctrl): pinctrl { |
| 176 | compatible = "marvell,armada-8k-cpm-pinctrl"; | 179 | compatible = "marvell,armada-8k-cpm-pinctrl"; |
| 177 | }; | 180 | }; |
| 178 | 181 | ||
| 179 | cpm_gpio1: gpio@100 { | 182 | CP110_LABEL(gpio1): gpio@100 { |
| 180 | compatible = "marvell,armada-8k-gpio"; | 183 | compatible = "marvell,armada-8k-gpio"; |
| 181 | offset = <0x100>; | 184 | offset = <0x100>; |
| 182 | ngpios = <32>; | 185 | ngpios = <32>; |
| 183 | gpio-controller; | 186 | gpio-controller; |
| 184 | #gpio-cells = <2>; | 187 | #gpio-cells = <2>; |
| 185 | gpio-ranges = <&cpm_pinctrl 0 0 32>; | 188 | gpio-ranges = <&CP110_LABEL(pinctrl) 0 0 32>; |
| 186 | }; | 189 | }; |
| 187 | 190 | ||
| 188 | }; | 191 | }; |
| 192 | |||
| 193 | SYSTEM CONTROLLER 1 | ||
| 194 | =================== | ||
| 195 | |||
| 196 | Thermal: | ||
| 197 | -------- | ||
| 198 | |||
| 199 | The thermal IP can probe the temperature all around the processor. It | ||
| 200 | may feature several channels, each of them wired to one sensor. | ||
| 201 | |||
| 202 | For common binding part and usage, refer to | ||
| 203 | Documentation/devicetree/bindings/thermal/thermal.txt | ||
| 204 | |||
| 205 | Required properties: | ||
| 206 | - compatible: must be one of: | ||
| 207 | * marvell,armada-cp110-thermal | ||
| 208 | - reg: register range associated with the thermal functions. | ||
| 209 | |||
| 210 | Optional properties: | ||
| 211 | - #thermal-sensor-cells: shall be <1> when thermal-zones subnodes refer | ||
| 212 | to this IP and represents the channel ID. There is one sensor per | ||
| 213 | channel. O refers to the thermal IP internal channel. | ||
| 214 | |||
| 215 | Example: | ||
| 216 | CP110_LABEL(syscon1): system-controller@6f8000 { | ||
| 217 | compatible = "syscon", "simple-mfd"; | ||
| 218 | reg = <0x6f8000 0x1000>; | ||
| 219 | |||
| 220 | CP110_LABEL(thermal): thermal-sensor@70 { | ||
| 221 | compatible = "marvell,armada-cp110-thermal"; | ||
| 222 | reg = <0x70 0x10>; | ||
| 223 | #thermal-sensor-cells = <1>; | ||
| 224 | }; | ||
| 225 | }; | ||
| @@ -11,6 +11,7 @@ compatible: Must contain one of · 10 unmodified lines | |||
| 11 | "mediatek,mt6589" | 11 | "mediatek,mt6589" |
| 12 | "mediatek,mt6592" | 12 | "mediatek,mt6592" |
| 13 | "mediatek,mt6755" | 13 | "mediatek,mt6755" |
| 14 | "mediatek,mt6765" | ||
| 14 | "mediatek,mt6795" | 15 | "mediatek,mt6795" |
| 15 | "mediatek,mt6797" | 16 | "mediatek,mt6797" |
| 16 | "mediatek,mt7622" | 17 | "mediatek,mt7622" |
| @@ -41,12 +42,18 @@ Supported boards: · 24 unmodified lines | |||
| 41 | - Evaluation phone for MT6755(Helio P10): | 42 | - Evaluation phone for MT6755(Helio P10): |
| 42 | Required root node properties: | 43 | Required root node properties: |
| 43 | - compatible = "mediatek,mt6755-evb", "mediatek,mt6755"; | 44 | - compatible = "mediatek,mt6755-evb", "mediatek,mt6755"; |
| 45 | - Evaluation board for MT6765(Helio P22): | ||
| 46 | Required root node properties: | ||
| 47 | - compatible = "mediatek,mt6765-evb", "mediatek,mt6765"; | ||
| 44 | - Evaluation board for MT6795(Helio X10): | 48 | - Evaluation board for MT6795(Helio X10): |
| 45 | Required root node properties: | 49 | Required root node properties: |
| 46 | - compatible = "mediatek,mt6795-evb", "mediatek,mt6795"; | 50 | - compatible = "mediatek,mt6795-evb", "mediatek,mt6795"; |
| 47 | - Evaluation board for MT6797(Helio X20): | 51 | - Evaluation board for MT6797(Helio X20): |
| 48 | Required root node properties: | 52 | Required root node properties: |
| 49 | - compatible = "mediatek,mt6797-evb", "mediatek,mt6797"; | 53 | - compatible = "mediatek,mt6797-evb", "mediatek,mt6797"; |
| 54 | - Mediatek X20 Development Board: | ||
| 55 | Required root node properties: | ||
| 56 | - compatible = "archermind,mt6797-x20-dev", "mediatek,mt6797"; | ||
| 50 | - Reference board variant 1 for MT7622: | 57 | - Reference board variant 1 for MT7622: |
| 51 | Required root node properties: | 58 | Required root node properties: |
| 52 | - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; | 59 | - compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; |
| @@ -59,9 +66,6 @@ Supported boards: · 6 unmodified lines | |||
| 59 | - Reference board for MT7623n with eMMC: | 66 | - Reference board for MT7623n with eMMC: |
| 60 | Required root node properties: | 67 | Required root node properties: |
| 61 | - compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623"; | 68 | - compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623"; |
| 62 | - Reference board for MT7623n with NAND: | ||
| 63 | Required root node properties: | ||
| 64 | - compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623"; | ||
| 65 | - Bananapi BPI-R2 board: | 69 | - Bananapi BPI-R2 board: |
| 66 | - compatible = "bananapi,bpi-r2", "mediatek,mt7623"; | 70 | - compatible = "bananapi,bpi-r2", "mediatek,mt7623"; |
| 67 | - MTK mt8127 tablet moose EVB: | 71 | - MTK mt8127 tablet moose EVB: |
| @@ -0,0 +1,26 @@ | |||
| 1 | == Introduction== | ||
| 2 | |||
| 3 | LLCC (Last Level Cache Controller) provides last level of cache memory in SOC, | ||
| 4 | that can be shared by multiple clients. Clients here are different cores in the | ||
| 5 | SOC, the idea is to minimize the local caches at the clients and migrate to | ||
| 6 | common pool of memory. Cache memory is divided into partitions called slices | ||
| 7 | which are assigned to clients. Clients can query the slice details, activate | ||
| 8 | and deactivate them. | ||
| 9 | |||
| 10 | Properties: | ||
| 11 | - compatible: | ||
| 12 | Usage: required | ||
| 13 | Value type: <string> | ||
| 14 | Definition: must be "qcom,sdm845-llcc" | ||
| 15 | |||
| 16 | - reg: | ||
| 17 | Usage: required | ||
| 18 | Value Type: <prop-encoded-array> | ||
| 19 | Definition: Start address and the the size of the register region. | ||
| 20 | |||
| 21 | Example: | ||
| 22 | |||
| 23 | cache-controller@1100000 { | ||
| 24 | compatible = "qcom,sdm845-llcc"; | ||
| 25 | reg = <0x1100000 0x250000>; | ||
| 26 | }; | ||
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | - compatible : Should be "ti,irq-crossbar" | 10 | - compatible : Should be "ti,irq-crossbar" |
| 11 | - reg: Base address and the size of the crossbar registers. | 11 | - reg: Base address and the size of the crossbar registers. |
| 12 | - interrupt-controller: indicates that this block is an interrupt controller. | 12 | - interrupt-controller: indicates that this block is an interrupt controller. |
| 13 | - interrupt-parent: the interrupt controller this block is connected to. | ||
| 14 | - ti,max-irqs: Total number of irqs available at the parent interrupt controller. | 13 | - ti,max-irqs: Total number of irqs available at the parent interrupt controller. |
| 15 | - ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed. | 14 | - ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed. |
| 16 | - ti,reg-size: Size of a individual register in bytes. Every individual | 15 | - ti,reg-size: Size of a individual register in bytes. Every individual |
| @@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines | |||
| 7 | Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus | 7 | Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus |
| 8 | Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus | 8 | Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus |
| 9 | Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus | 9 | Should be "ti,omap4-l4-cfg" for OMAP4 family l4 cfg bus |
| 10 | Should be "ti,omap4-l4-per" for OMAP4 family l4 per bus | ||
| 10 | Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus | 11 | Should be "ti,omap4-l4-wkup" for OMAP4 family l4 wkup bus |
| 11 | Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus | 12 | Should be "ti,omap5-l4-cfg" for OMAP5 family l4 cfg bus |
| 12 | Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus | 13 | Should be "ti,omap5-l4-wkup" for OMAP5 family l4 wkup bus |
| @@ -15,11 +16,21 @@ Required properties: · 2 unmodified lines | |||
| 15 | Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus | 16 | Should be "ti,am3-l4-wkup" for AM33xx family l4 wkup bus |
| 16 | Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus | 17 | Should be "ti,am4-l4-wkup" for AM43xx family l4 wkup bus |
| 17 | - ranges : contains the IO map range for the bus | 18 | - ranges : contains the IO map range for the bus |
| 19 | - reg : registers link agent and interconnect agent and access protection | ||
| 20 | - reg-names : "la" for link agent, "ia0" to "ia3" for one to three | ||
| 21 | interconnect agent instances, "ap" for access if it exists | ||
| 18 | 22 | ||
| 19 | Examples: | 23 | Examples: |
| 20 | 24 | ||
| 21 | l4: l4@48000000 { | 25 | l4: interconnect@48000000 { |
| 22 | compatible "ti,omap2-l4", "simple-bus"; | 26 | compatible "ti,omap4-l4-per", "simple-bus"; |
| 27 | reg = <0x48000000 0x800>, | ||
| 28 | <0x48000800 0x800>, | ||
| 29 | <0x48001000 0x400>, | ||
| 30 | <0x48001400 0x400>, | ||
| 31 | <0x48001800 0x400>, | ||
| 32 | <0x48001c00 0x400>; | ||
| 33 | reg-names = "ap", "la", "ia0", "ia1", "ia2", "ia3"; | ||
| 23 | #address-cells = <1>; | 34 | #address-cells = <1>; |
| 24 | #size-cells = <1>; | 35 | #size-cells = <1>; |
| 25 | ranges = <0 0x48000000 0x100000>; | 36 | ranges = <0 0x48000000 0x100000>; |
| @@ -1,5 +1,10 @@ | |||
| 1 | Rockchip platforms device tree bindings | 1 | Rockchip platforms device tree bindings |
| 2 | --------------------------------------- | 2 | --------------------------------------- |
| 3 | |||
| 4 | - 96boards RK3399 Ficus (ROCK960 Enterprise Edition) | ||
| 5 | Required root node properties: | ||
| 6 | - compatible = "vamrs,ficus", "rockchip,rk3399"; | ||
| 7 | |||
| 3 | - Amarula Vyasa RK3288 board | 8 | - Amarula Vyasa RK3288 board |
| 4 | Required root node properties: | 9 | Required root node properties: |
| 5 | - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; | 10 | - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; |
| @@ -66,6 +71,15 @@ Rockchip platforms device tree bindings · 60 unmodified lines | |||
| 66 | Required root node properties: | 71 | Required root node properties: |
| 67 | - compatible = "geekbuying,geekbox", "rockchip,rk3368"; | 72 | - compatible = "geekbuying,geekbox", "rockchip,rk3368"; |
| 68 | 73 | ||
| 74 | - Google Bob (Asus Chromebook Flip C101PA): | ||
| 75 | Required root node properties: | ||
| 76 | compatible = "google,bob-rev13", "google,bob-rev12", | ||
| 77 | "google,bob-rev11", "google,bob-rev10", | ||
| 78 | "google,bob-rev9", "google,bob-rev8", | ||
| 79 | "google,bob-rev7", "google,bob-rev6", | ||
| 80 | "google,bob-rev5", "google,bob-rev4", | ||
| 81 | "google,bob", "google,gru", "rockchip,rk3399"; | ||
| 82 | |||
| 69 | - Google Brain (dev-board): | 83 | - Google Brain (dev-board): |
| 70 | Required root node properties: | 84 | Required root node properties: |
| 71 | - compatible = "google,veyron-brain-rev0", "google,veyron-brain", | 85 | - compatible = "google,veyron-brain-rev0", "google,veyron-brain", |
| @@ -40,9 +40,6 @@ following properties: · 39 unmodified lines | |||
| 40 | - #interrupt-cells: must be identical to the that of the parent interrupt | 40 | - #interrupt-cells: must be identical to the that of the parent interrupt |
| 41 | controller. | 41 | controller. |
| 42 | 42 | ||
| 43 | - interrupt-parent: a phandle indicating which interrupt controller | ||
| 44 | this PMU signals interrupts to. | ||
| 45 | |||
| 46 | 43 | ||
| 47 | Optional nodes: | 44 | Optional nodes: |
| 48 | 45 | ||
| @@ -1,7 +1,10 @@ | |||
| 1 | * Samsung's Exynos SoC based boards | 1 | * Samsung's Exynos and S5P SoC based boards |
| 2 | 2 | ||
| 3 | Required root node properties: | 3 | Required root node properties: |
| 4 | - compatible = should be one or more of the following. | 4 | - compatible = should be one or more of the following. |
| 5 | - "samsung,aries" - for S5PV210-based Samsung Aries board. | ||
| 6 | - "samsung,fascinate4g" - for S5PV210-based Samsung Galaxy S Fascinate 4G (SGH-T959P) board. | ||
| 7 | - "samsung,galaxys" - for S5PV210-based Samsung Galaxy S (i9000) board. | ||
| 5 | - "samsung,artik5" - for Exynos3250-based Samsung ARTIK5 module. | 8 | - "samsung,artik5" - for Exynos3250-based Samsung ARTIK5 module. |
| 6 | - "samsung,artik5-eval" - for Exynos3250-based Samsung ARTIK5 eval board. | 9 | - "samsung,artik5-eval" - for Exynos3250-based Samsung ARTIK5 eval board. |
| 7 | - "samsung,monk" - for Exynos3250-based Samsung Simband board. | 10 | - "samsung,monk" - for Exynos3250-based Samsung Simband board. |
| @@ -66,7 +69,7 @@ Required root node properties: · 58 unmodified lines | |||
| 66 | - "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale | 69 | - "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale |
| 67 | Octa board. | 70 | Octa board. |
| 68 | - "insignal,origen" - for Exynos4210-based Insignal Origen board. | 71 | - "insignal,origen" - for Exynos4210-based Insignal Origen board. |
| 69 | - "insignal,origen4412 - for Exynos4412-based Insignal Origen board. | 72 | - "insignal,origen4412" - for Exynos4412-based Insignal Origen board. |
| 70 | 73 | ||
| 71 | 74 | ||
| 72 | Optional nodes: | 75 | Optional nodes: |
| @@ -51,7 +51,8 @@ SoCs: · 50 unmodified lines | |||
| 51 | compatible = "renesas,r8a77990" | 51 | compatible = "renesas,r8a77990" |
| 52 | - R-Car D3 (R8A77995) | 52 | - R-Car D3 (R8A77995) |
| 53 | compatible = "renesas,r8a77995" | 53 | compatible = "renesas,r8a77995" |
| 54 | 54 | - RZ/N1D (R9A06G032) | |
| 55 | compatible = "renesas,r9a06g032" | ||
| 55 | 56 | ||
| 56 | Boards: | 57 | Boards: |
| 57 | 58 | ||
| @@ -112,6 +113,8 @@ Boards: · 54 unmodified lines | |||
| 112 | compatible = "renesas,porter", "renesas,r8a7791" | 113 | compatible = "renesas,porter", "renesas,r8a7791" |
| 113 | - RSKRZA1 (YR0K77210C000BE) | 114 | - RSKRZA1 (YR0K77210C000BE) |
| 114 | compatible = "renesas,rskrza1", "renesas,r7s72100" | 115 | compatible = "renesas,rskrza1", "renesas,r7s72100" |
| 116 | - RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) | ||
| 117 | compatible = "renesas,rzn1d400-db", "renesas,r9a06g032" | ||
| 115 | - Salvator-X (RTP0RC7795SIPB0010S) | 118 | - Salvator-X (RTP0RC7795SIPB0010S) |
| 116 | compatible = "renesas,salvator-x", "renesas,r8a7795" | 119 | compatible = "renesas,salvator-x", "renesas,r8a7795" |
| 117 | - Salvator-X (RTP0RC7796SIPB0011S) | 120 | - Salvator-X (RTP0RC7796SIPB0011S) |
| @@ -0,0 +1,23 @@ | |||
| 1 | Texas Instruments K3 Multicore SoC architecture device tree bindings | ||
| 2 | -------------------------------------------------------------------- | ||
| 3 | |||
| 4 | Platforms based on Texas Instruments K3 Multicore SoC architecture | ||
| 5 | shall follow the following scheme: | ||
| 6 | |||
| 7 | SoCs | ||
| 8 | ---- | ||
| 9 | |||
| 10 | Each device tree root node must specify which exact SoC in K3 Multicore SoC | ||
| 11 | architecture it uses, using one of the following compatible values: | ||
| 12 | |||
| 13 | - AM654 | ||
| 14 | compatible = "ti,am654"; | ||
| 15 | |||
| 16 | Boards | ||
| 17 | ------ | ||
| 18 | |||
| 19 | In addition, each device tree root node must specify which one or more | ||
| 20 | of the following board-specific compatible values: | ||
| 21 | |||
| 22 | - AM654 EVM | ||
| 23 | compatible = "ti,am654-evm", "ti,am654"; | ||
| @@ -8,18 +8,38 @@ Required root node properties: · 7 unmodified lines | |||
| 8 | 8 | ||
| 9 | Additional compatible strings: | 9 | Additional compatible strings: |
| 10 | 10 | ||
| 11 | - Xilinx internal board cc108 | 11 | - Adapteva Parallella board |
| 12 | "adapteva,parallella" | ||
| 13 | |||
| 14 | - Avnet MicroZed board | ||
| 15 | "avnet,zynq-microzed" | ||
| 16 | "xlnx,zynq-microzed" | ||
| 17 | |||
| 18 | - Avnet ZedBoard board | ||
| 19 | "avnet,zynq-zed" | ||
| 20 | "xlnx,zynq-zed" | ||
| 21 | |||
| 22 | - Digilent Zybo board | ||
| 23 | "digilent,zynq-zybo" | ||
| 24 | |||
| 25 | - Digilent Zybo Z7 board | ||
| 26 | "digilent,zynq-zybo-z7" | ||
| 27 | |||
| 28 | - Xilinx CC108 internal board | ||
| 12 | "xlnx,zynq-cc108" | 29 | "xlnx,zynq-cc108" |
| 13 | 30 | ||
| 14 | - Xilinx internal board zc770 with different FMC cards | 31 | - Xilinx ZC702 internal board |
| 32 | "xlnx,zynq-zc702" | ||
| 33 | |||
| 34 | - Xilinx ZC706 internal board | ||
| 35 | "xlnx,zynq-zc706" | ||
| 36 | |||
| 37 | - Xilinx ZC770 internal board, with different FMC cards | ||
| 15 | "xlnx,zynq-zc770-xm010" | 38 | "xlnx,zynq-zc770-xm010" |
| 16 | "xlnx,zynq-zc770-xm011" | 39 | "xlnx,zynq-zc770-xm011" |
| 17 | "xlnx,zynq-zc770-xm012" | 40 | "xlnx,zynq-zc770-xm012" |
| 18 | "xlnx,zynq-zc770-xm013" | 41 | "xlnx,zynq-zc770-xm013" |
| 19 | 42 | ||
| 20 | - Digilent Zybo Z7 board | ||
| 21 | "digilent,zynq-zybo-z7" | ||
| 22 | |||
| 23 | --------------------------------------------------------------- | 43 | --------------------------------------------------------------- |
| 24 | 44 | ||
| 25 | Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings | 45 | Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings |
| @@ -17,7 +17,6 @@ Required properties: · 16 unmodified lines | |||
| 17 | - "marvell,armada-380-ahci" | 17 | - "marvell,armada-380-ahci" |
| 18 | - "marvell,armada-3700-ahci" | 18 | - "marvell,armada-3700-ahci" |
| 19 | - "snps,dwc-ahci" | 19 | - "snps,dwc-ahci" |
| 20 | - "snps,exynos5440-ahci" | ||
| 21 | - "snps,spear-ahci" | 20 | - "snps,spear-ahci" |
| 22 | - "generic-ahci" | 21 | - "generic-ahci" |
| 23 | - interrupts : <interrupt mapping for SATA IRQ> | 22 | - interrupts : <interrupt mapping for SATA IRQ> |
| @@ -30,6 +29,7 @@ compatible: · 6 unmodified lines | |||
| 30 | Optional properties: | 29 | Optional properties: |
| 31 | - dma-coherent : Present if dma operations are coherent | 30 | - dma-coherent : Present if dma operations are coherent |
| 32 | - clocks : a list of phandle + clock specifier pairs | 31 | - clocks : a list of phandle + clock specifier pairs |
| 32 | - resets : a list of phandle + reset specifier pairs | ||
| 33 | - target-supply : regulator for SATA target power | 33 | - target-supply : regulator for SATA target power |
| 34 | - phys : reference to the SATA PHY node | 34 | - phys : reference to the SATA PHY node |
| 35 | - phy-names : must be "sata-phy" | 35 | - phy-names : must be "sata-phy" |
| @@ -16,7 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | 4 for controller @ 0x1b000 | 16 | 4 for controller @ 0x1b000 |
| 17 | 17 | ||
| 18 | Optional properties: | 18 | Optional properties: |
| 19 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 20 | - reg : <registers mapping> | 19 | - reg : <registers mapping> |
| 21 | 20 | ||
| 22 | Example: | 21 | Example: |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "arasan,cf-spear1340" | 4 | - compatible: "arasan,cf-spear1340" |
| 5 | - reg: Address range of the CF registers | 5 | - reg: Address range of the CF registers |
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupt: Should contain the CF interrupt number | 6 | - interrupt: Should contain the CF interrupt number |
| 9 | - clock-frequency: Interface clock rate, in Hz, one of | 7 | - clock-frequency: Interface clock rate, in Hz, one of |
| 10 | 25000000 | 8 | 25000000 |
| @@ -8,6 +8,7 @@ Required properties: · 7 unmodified lines | |||
| 8 | - "renesas,sata-r8a7791" for R-Car M2-W | 8 | - "renesas,sata-r8a7791" for R-Car M2-W |
| 9 | - "renesas,sata-r8a7793" for R-Car M2-N | 9 | - "renesas,sata-r8a7793" for R-Car M2-N |
| 10 | - "renesas,sata-r8a7795" for R-Car H3 | 10 | - "renesas,sata-r8a7795" for R-Car H3 |
| 11 | - "renesas,sata-r8a77965" for R-Car M3-N | ||
| 11 | - "renesas,rcar-gen2-sata" for a generic R-Car Gen2 compatible device | 12 | - "renesas,rcar-gen2-sata" for a generic R-Car Gen2 compatible device |
| 12 | - "renesas,rcar-gen3-sata" for a generic R-Car Gen3 compatible device | 13 | - "renesas,rcar-gen3-sata" for a generic R-Car Gen3 compatible device |
| 13 | - "renesas,rcar-sata" is deprecated | 14 | - "renesas,rcar-sata" is deprecated |
| @@ -29,7 +29,6 @@ Required properties: · 28 unmodified lines | |||
| 29 | - reg: should contain the address and the length of the FPGA register set. | 29 | - reg: should contain the address and the length of the FPGA register set. |
| 30 | 30 | ||
| 31 | Optional properties: | 31 | Optional properties: |
| 32 | - interrupt-parent: should specify phandle for the interrupt controller. | ||
| 33 | - interrupts: should specify event (wakeup) IRQ. | 32 | - interrupts: should specify event (wakeup) IRQ. |
| 34 | 33 | ||
| 35 | Example (P1022DS): | 34 | Example (P1022DS): |
| @@ -9,8 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips | 9 | "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips |
| 10 | "brcm,bcm7038-gisb-arb" for 130nm chips | 10 | "brcm,bcm7038-gisb-arb" for 130nm chips |
| 11 | - reg: specifies the base physical address and size of the registers | 11 | - reg: specifies the base physical address and size of the registers |
| 12 | - interrupt-parent: specifies the phandle to the parent interrupt controller | ||
| 13 | this arbiter gets interrupt line from | ||
| 14 | - interrupts: specifies the two interrupts (timeout and TEA) to be used from | 12 | - interrupts: specifies the two interrupts (timeout and TEA) to be used from |
| 15 | the parent interrupt controller | 13 | the parent interrupt controller |
| 16 | 14 | ||
| @@ -0,0 +1,37 @@ | |||
| 1 | Device tree bindings for Allwinner A64 DE2 bus | ||
| 2 | |||
| 3 | The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C) | ||
| 4 | to be claimed for enabling the access. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | |||
| 8 | - compatible: Should contain "allwinner,sun50i-a64-de2" | ||
| 9 | - reg: A resource specifier for the register space | ||
| 10 | - #address-cells: Must be set to 1 | ||
| 11 | - #size-cells: Must be set to 1 | ||
| 12 | - ranges: Must be set up to map the address space inside the | ||
| 13 | DE2, for the sub-blocks of DE2. | ||
| 14 | - allwinner,sram: the SRAM that needs to be claimed | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | de2@1000000 { | ||
| 19 | compatible = "allwinner,sun50i-a64-de2"; | ||
| 20 | reg = <0x1000000 0x400000>; | ||
| 21 | allwinner,sram = <&de2_sram 1>; | ||
| 22 | #address-cells = <1>; | ||
| 23 | #size-cells = <1>; | ||
| 24 | ranges = <0 0x1000000 0x400000>; | ||
| 25 | |||
| 26 | display_clocks: clock@0 { | ||
| 27 | compatible = "allwinner,sun50i-a64-de2-clk"; | ||
| 28 | reg = <0x0 0x100000>; | ||
| 29 | clocks = <&ccu CLK_DE>, | ||
| 30 | <&ccu CLK_BUS_DE>; | ||
| 31 | clock-names = "mod", | ||
| 32 | "bus"; | ||
| 33 | resets = <&ccu RST_BUS_DE>; | ||
| 34 | #clock-cells = <1>; | ||
| 35 | #reset-cells = <1>; | ||
| 36 | }; | ||
| 37 | }; | ||
| @@ -36,6 +36,7 @@ Required standard properties: · 35 unmodified lines | |||
| 36 | "ti,sysc-omap-aes" | 36 | "ti,sysc-omap-aes" |
| 37 | "ti,sysc-mcasp" | 37 | "ti,sysc-mcasp" |
| 38 | "ti,sysc-usb-host-fs" | 38 | "ti,sysc-usb-host-fs" |
| 39 | "ti,sysc-dra7-mcan" | ||
| 39 | 40 | ||
| 40 | - reg shall have register areas implemented for the interconnect | 41 | - reg shall have register areas implemented for the interconnect |
| 41 | target module in question such as revision, sysc and syss | 42 | target module in question such as revision, sysc and syss |
| @@ -1,12 +1,14 @@ | |||
| 1 | * Actions S900 Clock Management Unit (CMU) | 1 | * Actions Semi Owl Clock Management Unit (CMU) |
| 2 | 2 | ||
| 3 | The Actions S900 clock management unit generates and supplies clock to various | 3 | The Actions Semi Owl Clock Management Unit generates and supplies clock |
| 4 | controllers within the SoC. The clock binding described here is applicable to | 4 | to various controllers within the SoC. The clock binding described here is |
| 5 | S900 SoC. | 5 | applicable to S900 and S700 SoC's. |
| 6 | 6 | ||
| 7 | Required Properties: | 7 | Required Properties: |
| 8 | 8 | ||
| 9 | - compatible: should be "actions,s900-cmu" | 9 | - compatible: should be one of the following, |
| 10 | "actions,s900-cmu" | ||
| 11 | "actions,s700-cmu" | ||
| 10 | - reg: physical base address of the controller and length of memory mapped | 12 | - reg: physical base address of the controller and length of memory mapped |
| 11 | region. | 13 | region. |
| 12 | - clocks: Reference to the parent clocks ("hosc", "losc") | 14 | - clocks: Reference to the parent clocks ("hosc", "losc") |
| @@ -15,16 +17,16 @@ Required Properties: · 2 unmodified lines | |||
| 15 | Each clock is assigned an identifier, and client nodes can use this identifier | 17 | Each clock is assigned an identifier, and client nodes can use this identifier |
| 16 | to specify the clock which they consume. | 18 | to specify the clock which they consume. |
| 17 | 19 | ||
| 18 | All available clocks are defined as preprocessor macros in | 20 | All available clocks are defined as preprocessor macros in corresponding |
| 19 | dt-bindings/clock/actions,s900-cmu.h header and can be used in device | 21 | dt-bindings/clock/actions,s900-cmu.h or actions,s700-cmu.h header and can be |
| 20 | tree sources. | 22 | used in device tree sources. |
| 21 | 23 | ||
| 22 | External clocks: | 24 | External clocks: |
| 23 | 25 | ||
| 24 | The hosc clock used as input for the plls is generated outside the SoC. It is | 26 | The hosc clock used as input for the plls is generated outside the SoC. It is |
| 25 | expected that it is defined using standard clock bindings as "hosc". | 27 | expected that it is defined using standard clock bindings as "hosc". |
| 26 | 28 | ||
| 27 | Actions S900 CMU also requires one more clock: | 29 | Actions Semi S900 CMU also requires one more clock: |
| 28 | - "losc" - internal low frequency oscillator | 30 | - "losc" - internal low frequency oscillator |
| 29 | 31 | ||
| 30 | Example: Clock Management Unit node: | 32 | Example: Clock Management Unit node: |
| @@ -0,0 +1,56 @@ | |||
| 1 | * Amlogic AXG Audio Clock Controllers | ||
| 2 | |||
| 3 | The Amlogic AXG audio clock controller generates and supplies clock to the | ||
| 4 | other elements of the audio subsystem, such as fifos, i2s, spdif and pdm | ||
| 5 | devices. | ||
| 6 | |||
| 7 | Required Properties: | ||
| 8 | |||
| 9 | - compatible : should be "amlogic,axg-audio-clkc" for the A113X and A113D | ||
| 10 | - reg : physical base address of the clock controller and length of | ||
| 11 | memory mapped region. | ||
| 12 | - clocks : a list of phandle + clock-specifier pairs for the clocks listed | ||
| 13 | in clock-names. | ||
| 14 | - clock-names : must contain the following: | ||
| 15 | * "pclk" - Main peripheral bus clock | ||
| 16 | may contain the following: | ||
| 17 | * "mst_in[0-7]" - 8 input plls to generate clock signals | ||
| 18 | * "slv_sclk[0-9]" - 10 slave bit clocks provided by external | ||
| 19 | components. | ||
| 20 | * "slv_lrclk[0-9]" - 10 slave sample clocks provided by external | ||
| 21 | components. | ||
| 22 | - resets : phandle of the internal reset line | ||
| 23 | - #clock-cells : should be 1. | ||
| 24 | |||
| 25 | Each clock is assigned an identifier and client nodes can use this identifier | ||
| 26 | to specify the clock which they consume. All available clocks are defined as | ||
| 27 | preprocessor macros in the dt-bindings/clock/axg-audio-clkc.h header and can be | ||
| 28 | used in device tree sources. | ||
| 29 | |||
| 30 | Example: | ||
| 31 | |||
| 32 | clkc_audio: clock-controller@0 { | ||
| 33 | compatible = "amlogic,axg-audio-clkc"; | ||
| 34 | reg = <0x0 0x0 0x0 0xb4>; | ||
| 35 | #clock-cells = <1>; | ||
| 36 | |||
| 37 | clocks = <&clkc CLKID_AUDIO>, | ||
| 38 | <&clkc CLKID_MPLL0>, | ||
| 39 | <&clkc CLKID_MPLL1>, | ||
| 40 | <&clkc CLKID_MPLL2>, | ||
| 41 | <&clkc CLKID_MPLL3>, | ||
| 42 | <&clkc CLKID_HIFI_PLL>, | ||
| 43 | <&clkc CLKID_FCLK_DIV3>, | ||
| 44 | <&clkc CLKID_FCLK_DIV4>, | ||
| 45 | <&clkc CLKID_GP0_PLL>; | ||
| 46 | clock-names = "pclk", | ||
| 47 | "mst_in0", | ||
| 48 | "mst_in1", | ||
| 49 | "mst_in2", | ||
| 50 | "mst_in3", | ||
| 51 | "mst_in4", | ||
| 52 | "mst_in5", | ||
| 53 | "mst_in6", | ||
| 54 | "mst_in7"; | ||
| 55 | resets = <&reset RESET_AUDIO>; | ||
| 56 | }; | ||
| @@ -17,14 +17,13 @@ Required properties: · 16 unmodified lines | |||
| 17 | "atmel,at91sam9x5-clk-slow-rc-osc": | 17 | "atmel,at91sam9x5-clk-slow-rc-osc": |
| 18 | at91 internal slow RC oscillator | 18 | at91 internal slow RC oscillator |
| 19 | 19 | ||
| 20 | "atmel,at91rm9200-pmc" or | 20 | "atmel,<chip>-pmc": |
| 21 | "atmel,at91sam9g45-pmc" or | ||
| 22 | "atmel,at91sam9n12-pmc" or | ||
| 23 | "atmel,at91sam9x5-pmc" or | ||
| 24 | "atmel,sama5d3-pmc": | ||
| 25 | at91 PMC (Power Management Controller) | 21 | at91 PMC (Power Management Controller) |
| 26 | All at91 specific clocks (clocks defined below) must be child | 22 | All at91 specific clocks (clocks defined below) must be child |
| 27 | node of the PMC node. | 23 | node of the PMC node. |
| 24 | <chip> can be: at91rm9200, at91sam9260, at91sam9261, | ||
| 25 | at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9x5, | ||
| 26 | sama5d2, sama5d3 or sama5d4. | ||
| 28 | 27 | ||
| 29 | "atmel,at91sam9x5-clk-slow" (under sckc node) | 28 | "atmel,at91sam9x5-clk-slow" (under sckc node) |
| 30 | or | 29 | or |
| @@ -91,6 +90,9 @@ Required properties: · 60 unmodified lines | |||
| 91 | at91 audio pll output on AUDIOPLLCLK that feeds the PMC | 90 | at91 audio pll output on AUDIOPLLCLK that feeds the PMC |
| 92 | and can be used by peripheral clock or generic clock | 91 | and can be used by peripheral clock or generic clock |
| 93 | 92 | ||
| 93 | "atmel,sama5d2-clk-i2s-mux" (under pmc node): | ||
| 94 | at91 I2S clock source selection | ||
| 95 | |||
| 94 | Required properties for SCKC node: | 96 | Required properties for SCKC node: |
| 95 | - reg : defines the IO memory reserved for the SCKC. | 97 | - reg : defines the IO memory reserved for the SCKC. |
| 96 | - #size-cells : shall be 0 (reg is used to encode clk id). | 98 | - #size-cells : shall be 0 (reg is used to encode clk id). |
| @@ -180,7 +182,6 @@ For example: · 83 unmodified lines | |||
| 180 | }; | 182 | }; |
| 181 | 183 | ||
| 182 | Required properties for main clock internal RC oscillator: | 184 | Required properties for main clock internal RC oscillator: |
| 183 | - interrupt-parent : must reference the PMC node. | ||
| 184 | - interrupts : shall be set to "<0>". | 185 | - interrupts : shall be set to "<0>". |
| 185 | - clock-frequency : define the internal RC oscillator frequency. | 186 | - clock-frequency : define the internal RC oscillator frequency. |
| 186 | 187 | ||
| @@ -197,7 +198,6 @@ For example: · 10 unmodified lines | |||
| 197 | }; | 198 | }; |
| 198 | 199 | ||
| 199 | Required properties for main clock oscillator: | 200 | Required properties for main clock oscillator: |
| 200 | - interrupt-parent : must reference the PMC node. | ||
| 201 | - interrupts : shall be set to "<0>". | 201 | - interrupts : shall be set to "<0>". |
| 202 | - #clock-cells : from common clock binding; shall be set to 0. | 202 | - #clock-cells : from common clock binding; shall be set to 0. |
| 203 | - clocks : shall encode the main osc source clk sources (see atmel datasheet). | 203 | - clocks : shall encode the main osc source clk sources (see atmel datasheet). |
| @@ -218,7 +218,6 @@ For example: · 14 unmodified lines | |||
| 218 | }; | 218 | }; |
| 219 | 219 | ||
| 220 | Required properties for main clock: | 220 | Required properties for main clock: |
| 221 | - interrupt-parent : must reference the PMC node. | ||
| 222 | - interrupts : shall be set to "<0>". | 221 | - interrupts : shall be set to "<0>". |
| 223 | - #clock-cells : from common clock binding; shall be set to 0. | 222 | - #clock-cells : from common clock binding; shall be set to 0. |
| 224 | - clocks : shall encode the main clk sources (see atmel datasheet). | 223 | - clocks : shall encode the main clk sources (see atmel datasheet). |
| @@ -233,7 +232,6 @@ For example: · 8 unmodified lines | |||
| 233 | }; | 232 | }; |
| 234 | 233 | ||
| 235 | Required properties for master clock: | 234 | Required properties for master clock: |
| 236 | - interrupt-parent : must reference the PMC node. | ||
| 237 | - interrupts : shall be set to "<3>". | 235 | - interrupts : shall be set to "<3>". |
| 238 | - #clock-cells : from common clock binding; shall be set to 0. | 236 | - #clock-cells : from common clock binding; shall be set to 0. |
| 239 | - clocks : shall be the master clock sources (see atmel datasheet) phandles. | 237 | - clocks : shall be the master clock sources (see atmel datasheet) phandles. |
| @@ -292,7 +290,6 @@ For example: · 52 unmodified lines | |||
| 292 | 290 | ||
| 293 | 291 | ||
| 294 | Required properties for pll clocks: | 292 | Required properties for pll clocks: |
| 295 | - interrupt-parent : must reference the PMC node. | ||
| 296 | - interrupts : shall be set to "<1>". | 293 | - interrupts : shall be set to "<1>". |
| 297 | - #clock-cells : from common clock binding; shall be set to 0. | 294 | - #clock-cells : from common clock binding; shall be set to 0. |
| 298 | - clocks : shall be the main clock phandle. | 295 | - clocks : shall be the main clock phandle. |
| @@ -348,7 +345,6 @@ For example: · 49 unmodified lines | |||
| 348 | }; | 345 | }; |
| 349 | 346 | ||
| 350 | Required properties for programmable clocks: | 347 | Required properties for programmable clocks: |
| 351 | - interrupt-parent : must reference the PMC node. | ||
| 352 | - #size-cells : shall be 0 (reg is used to encode clk id). | 348 | - #size-cells : shall be 0 (reg is used to encode clk id). |
| 353 | - #address-cells : shall be 1 (reg is used to encode clk id). | 349 | - #address-cells : shall be 1 (reg is used to encode clk id). |
| 354 | - clocks : shall be the programmable clock source phandles. | 350 | - clocks : shall be the programmable clock source phandles. |
| @@ -451,7 +447,6 @@ For example: · 96 unmodified lines | |||
| 451 | 447 | ||
| 452 | 448 | ||
| 453 | Required properties for utmi clock: | 449 | Required properties for utmi clock: |
| 454 | - interrupt-parent : must reference the PMC node. | ||
| 455 | - interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>". | 450 | - interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>". |
| 456 | - #clock-cells : from common clock binding; shall be set to 0. | 451 | - #clock-cells : from common clock binding; shall be set to 0. |
| 457 | - clocks : shall be the main clock source phandle. | 452 | - clocks : shall be the main clock source phandle. |
| @@ -507,3 +502,35 @@ For example: · 49 unmodified lines | |||
| 507 | atmel,clk-output-range = <0 83000000>; | 502 | atmel,clk-output-range = <0 83000000>; |
| 508 | }; | 503 | }; |
| 509 | }; | 504 | }; |
| 505 | |||
| 506 | Required properties for I2S mux clocks: | ||
| 507 | - #size-cells : shall be 0 (reg is used to encode I2S bus id). | ||
| 508 | - #address-cells : shall be 1 (reg is used to encode I2S bus id). | ||
| 509 | - name: device tree node describing a specific mux clock. | ||
| 510 | * #clock-cells : from common clock binding; shall be set to 0. | ||
| 511 | * clocks : shall be the mux clock parent phandles; shall be 2 phandles: | ||
| 512 | peripheral and generated clock; the first phandle shall belong to the | ||
| 513 | peripheral clock and the second one shall belong to the generated | ||
| 514 | clock; "clock-indices" property can be user to specify | ||
| 515 | the correct order. | ||
| 516 | * reg: I2S bus id of the corresponding mux clock. | ||
| 517 | e.g. reg = <0>; for i2s0, reg = <1>; for i2s1 | ||
| 518 | |||
| 519 | For example: | ||
| 520 | i2s_clkmux { | ||
| 521 | compatible = "atmel,sama5d2-clk-i2s-mux"; | ||
| 522 | #address-cells = <1>; | ||
| 523 | #size-cells = <0>; | ||
| 524 | |||
| 525 | i2s0muxck: i2s0_muxclk { | ||
| 526 | clocks = <&i2s0_clk>, <&i2s0_gclk>; | ||
| 527 | #clock-cells = <0>; | ||
| 528 | reg = <0>; | ||
| 529 | }; | ||
| 530 | |||
| 531 | i2s1muxck: i2s1_muxclk { | ||
| 532 | clocks = <&i2s1_clk>, <&i2s1_gclk>; | ||
| 533 | #clock-cells = <0>; | ||
| 534 | reg = <1>; | ||
| 535 | }; | ||
| 536 | }; | ||
| @@ -1,28 +0,0 @@ | |||
| 1 | * Samsung Exynos5440 Clock Controller | ||
| 2 | |||
| 3 | The Exynos5440 clock controller generates and supplies clock to various | ||
| 4 | controllers within the Exynos5440 SoC. | ||
| 5 | |||
| 6 | Required Properties: | ||
| 7 | |||
| 8 | - compatible: should be "samsung,exynos5440-clock". | ||
| 9 | |||
| 10 | - reg: physical base address of the controller and length of memory mapped | ||
| 11 | region. | ||
| 12 | |||
| 13 | - #clock-cells: should be 1. | ||
| 14 | |||
| 15 | Each clock is assigned an identifier and client nodes can use this identifier | ||
| 16 | to specify the clock which they consume. | ||
| 17 | |||
| 18 | All available clocks are defined as preprocessor macros in | ||
| 19 | dt-bindings/clock/exynos5440.h header and can be used in device | ||
| 20 | tree sources. | ||
| 21 | |||
| 22 | Example: An example of a clock controller node is listed below. | ||
| 23 | |||
| 24 | clock: clock-controller@10010000 { | ||
| 25 | compatible = "samsung,exynos5440-clock"; | ||
| 26 | reg = <0x160000 0x10000>; | ||
| 27 | #clock-cells = <1>; | ||
| 28 | }; | ||
| @@ -0,0 +1,59 @@ | |||
| 1 | Devicetree bindings for Maxim MAX9485 Programmable Audio Clock Generator | ||
| 2 | |||
| 3 | This device exposes 4 clocks in total: | ||
| 4 | |||
| 5 | - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz | ||
| 6 | - MAX9485_CLKOUT: A PLL that can be configured to 16 different discrete | ||
| 7 | frequencies | ||
| 8 | - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT | ||
| 9 | |||
| 10 | MAX9485_CLKOUT[1,2] are children of MAX9485_CLKOUT which upchain all rate set | ||
| 11 | requests. | ||
| 12 | |||
| 13 | Required properties: | ||
| 14 | - compatible: "maxim,max9485" | ||
| 15 | - clocks: Input clock, must provice 27.000 MHz | ||
| 16 | - clock-names: Must be set to "xclk" | ||
| 17 | - #clock-cells: From common clock binding; shall be set to 1 | ||
| 18 | |||
| 19 | Optional properties: | ||
| 20 | - reset-gpios: GPIO descriptor connected to the #RESET input pin | ||
| 21 | - vdd-supply: A regulator node for Vdd | ||
| 22 | - clock-output-names: Name of output clocks, as defined in common clock | ||
| 23 | bindings | ||
| 24 | |||
| 25 | If not explicitly set, the output names are "mclkout", "clkout", "clkout1" | ||
| 26 | and "clkout2". | ||
| 27 | |||
| 28 | Clocks are defined as preprocessor macros in the dt-binding header. | ||
| 29 | |||
| 30 | Example: | ||
| 31 | |||
| 32 | #include <dt-bindings/clock/maxim,max9485.h> | ||
| 33 | |||
| 34 | xo-27mhz: xo-27mhz { | ||
| 35 | compatible = "fixed-clock"; | ||
| 36 | #clock-cells = <0>; | ||
| 37 | clock-frequency = <27000000>; | ||
| 38 | }; | ||
| 39 | |||
| 40 | &i2c0 { | ||
| 41 | max9485: audio-clock@63 { | ||
| 42 | reg = <0x63>; | ||
| 43 | compatible = "maxim,max9485"; | ||
| 44 | clock-names = "xclk"; | ||
| 45 | clocks = <&xo-27mhz>; | ||
| 46 | reset-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; | ||
| 47 | vdd-supply = <&3v3-reg>; | ||
| 48 | #clock-cells = <1>; | ||
| 49 | }; | ||
| 50 | }; | ||
| 51 | |||
| 52 | // Clock consumer node | ||
| 53 | |||
| 54 | foo@0 { | ||
| 55 | compatible = "bar,foo"; | ||
| 56 | /* ... */ | ||
| 57 | clock-names = "foo-input-clk"; | ||
| 58 | clocks = <&max9485 MAX9485_CLKOUT1>; | ||
| 59 | }; | ||
| @@ -0,0 +1,19 @@ | |||
| 1 | Qualcomm Technologies, Inc. Display Clock Controller Binding | ||
| 2 | ------------------------------------------------------------ | ||
| 3 | |||
| 4 | Required properties : | ||
| 5 | |||
| 6 | - compatible : shall contain "qcom,sdm845-dispcc" | ||
| 7 | - reg : shall contain base register location and length. | ||
| 8 | - #clock-cells : from common clock binding, shall contain 1. | ||
| 9 | - #reset-cells : from common reset binding, shall contain 1. | ||
| 10 | - #power-domain-cells : from generic power domain binding, shall contain 1. | ||
| 11 | |||
| 12 | Example: | ||
| 13 | dispcc: clock-controller@af00000 { | ||
| 14 | compatible = "qcom,sdm845-dispcc"; | ||
| 15 | reg = <0xaf00000 0x100000>; | ||
| 16 | #clock-cells = <1>; | ||
| 17 | #reset-cells = <1>; | ||
| 18 | #power-domain-cells = <1>; | ||
| 19 | }; | ||
| @@ -0,0 +1,43 @@ | |||
| 1 | * Renesas R9A06G032 SYSCTRL | ||
| 2 | |||
| 3 | Required Properties: | ||
| 4 | |||
| 5 | - compatible: Must be: | ||
| 6 | - "renesas,r9a06g032-sysctrl" | ||
| 7 | - reg: Base address and length of the SYSCTRL IO block. | ||
| 8 | - #clock-cells: Must be 1 | ||
| 9 | - clocks: References to the parent clocks: | ||
| 10 | - external 40mhz crystal. | ||
| 11 | - external (optional) 32.768khz | ||
| 12 | - external (optional) jtag input | ||
| 13 | - external (optional) RGMII_REFCLK | ||
| 14 | - clock-names: Must be: | ||
| 15 | clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; | ||
| 16 | |||
| 17 | Examples | ||
| 18 | -------- | ||
| 19 | |||
| 20 | - SYSCTRL node: | ||
| 21 | |||
| 22 | sysctrl: system-controller@4000c000 { | ||
| 23 | compatible = "renesas,r9a06g032-sysctrl"; | ||
| 24 | reg = <0x4000c000 0x1000>; | ||
| 25 | #clock-cells = <1>; | ||
| 26 | |||
| 27 | clocks = <&ext_mclk>, <&ext_rtc_clk>, | ||
| 28 | <&ext_jtag_clk>, <&ext_rgmii_ref>; | ||
| 29 | clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext"; | ||
| 30 | }; | ||
| 31 | |||
| 32 | - Other nodes can use the clocks provided by SYSCTRL as in: | ||
| 33 | |||
| 34 | #include <dt-bindings/clock/r9a06g032-sysctrl.h> | ||
| 35 | uart0: serial@40060000 { | ||
| 36 | compatible = "snps,dw-apb-uart"; | ||
| 37 | reg = <0x40060000 0x400>; | ||
| 38 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; | ||
| 39 | reg-shift = <2>; | ||
| 40 | reg-io-width = <4>; | ||
| 41 | clocks = <&sysctrl R9A06G032_CLK_UART0>; | ||
| 42 | clock-names = "baudclk"; | ||
| 43 | }; | ||
| @@ -0,0 +1,65 @@ | |||
| 1 | * Rockchip PX30 Clock and Reset Unit | ||
| 2 | |||
| 3 | The PX30 clock controller generates and supplies clock to various | ||
| 4 | controllers within the SoC and also implements a reset controller for SoC | ||
| 5 | peripherals. | ||
| 6 | |||
| 7 | Required Properties: | ||
| 8 | |||
| 9 | - compatible: PMU for CRU should be "rockchip,px30-pmu-cru" | ||
| 10 | - compatible: CRU should be "rockchip,px30-cru" | ||
| 11 | - reg: physical base address of the controller and length of memory mapped | ||
| 12 | region. | ||
| 13 | - #clock-cells: should be 1. | ||
| 14 | - #reset-cells: should be 1. | ||
| 15 | |||
| 16 | Optional Properties: | ||
| 17 | |||
| 18 | - rockchip,grf: phandle to the syscon managing the "general register files" | ||
| 19 | If missing, pll rates are not changeable, due to the missing pll lock status. | ||
| 20 | |||
| 21 | Each clock is assigned an identifier and client nodes can use this identifier | ||
| 22 | to specify the clock which they consume. All available clocks are defined as | ||
| 23 | preprocessor macros in the dt-bindings/clock/px30-cru.h headers and can be | ||
| 24 | used in device tree sources. Similar macros exist for the reset sources in | ||
| 25 | these files. | ||
| 26 | |||
| 27 | External clocks: | ||
| 28 | |||
| 29 | There are several clocks that are generated outside the SoC. It is expected | ||
| 30 | that they are defined using standard clock bindings with following | ||
| 31 | clock-output-names: | ||
| 32 | - "xin24m" - crystal input - required, | ||
| 33 | - "xin32k" - rtc clock - optional, | ||
| 34 | - "i2sx_clkin" - external I2S clock - optional, | ||
| 35 | - "gmac_clkin" - external GMAC clock - optional | ||
| 36 | |||
| 37 | Example: Clock controller node: | ||
| 38 | |||
| 39 | pmucru: clock-controller@ff2bc000 { | ||
| 40 | compatible = "rockchip,px30-pmucru"; | ||
| 41 | reg = <0x0 0xff2bc000 0x0 0x1000>; | ||
| 42 | #clock-cells = <1>; | ||
| 43 | #reset-cells = <1>; | ||
| 44 | }; | ||
| 45 | |||
| 46 | cru: clock-controller@ff2b0000 { | ||
| 47 | compatible = "rockchip,px30-cru"; | ||
| 48 | reg = <0x0 0xff2b0000 0x0 0x1000>; | ||
| 49 | rockchip,grf = <&grf>; | ||
| 50 | #clock-cells = <1>; | ||
| 51 | #reset-cells = <1>; | ||
| 52 | }; | ||
| 53 | |||
| 54 | Example: UART controller node that consumes the clock generated by the clock | ||
| 55 | controller: | ||
| 56 | |||
| 57 | uart0: serial@ff030000 { | ||
| 58 | compatible = "rockchip,px30-uart", "snps,dw-apb-uart"; | ||
| 59 | reg = <0x0 0xff030000 0x0 0x100>; | ||
| 60 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | ||
| 61 | clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>; | ||
| 62 | clock-names = "baudclk", "apb_pclk"; | ||
| 63 | reg-shift = <2>; | ||
| 64 | reg-io-width = <4>; | ||
| 65 | }; | ||
| @@ -6,6 +6,7 @@ Required properties : · 5 unmodified lines | |||
| 6 | - "allwinner,sun8i-a83t-de2-clk" | 6 | - "allwinner,sun8i-a83t-de2-clk" |
| 7 | - "allwinner,sun8i-h3-de2-clk" | 7 | - "allwinner,sun8i-h3-de2-clk" |
| 8 | - "allwinner,sun8i-v3s-de2-clk" | 8 | - "allwinner,sun8i-v3s-de2-clk" |
| 9 | - "allwinner,sun50i-a64-de2-clk" | ||
| 9 | - "allwinner,sun50i-h5-de2-clk" | 10 | - "allwinner,sun50i-h5-de2-clk" |
| 10 | 11 | ||
| 11 | - reg: Must contain the registers base address and length | 12 | - reg: Must contain the registers base address and length |
| @@ -15,6 +15,33 @@ Optional properties: · 14 unmodified lines | |||
| 15 | - type: size of the connector, should be specified in case of USB-A, USB-B | 15 | - type: size of the connector, should be specified in case of USB-A, USB-B |
| 16 | non-fullsize connectors: "mini", "micro". | 16 | non-fullsize connectors: "mini", "micro". |
| 17 | 17 | ||
| 18 | Optional properties for usb-c-connector: | ||
| 19 | - power-role: should be one of "source", "sink" or "dual"(DRP) if typec | ||
| 20 | connector has power support. | ||
| 21 | - try-power-role: preferred power role if "dual"(DRP) can support Try.SNK | ||
| 22 | or Try.SRC, should be "sink" for Try.SNK or "source" for Try.SRC. | ||
| 23 | - data-role: should be one of "host", "device", "dual"(DRD) if typec | ||
| 24 | connector supports USB data. | ||
| 25 | |||
| 26 | Required properties for usb-c-connector with power delivery support: | ||
| 27 | - source-pdos: An array of u32 with each entry providing supported power | ||
| 28 | source data object(PDO), the detailed bit definitions of PDO can be found | ||
| 29 | in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.2 | ||
| 30 | Source_Capabilities Message, the order of each entry(PDO) should follow | ||
| 31 | the PD spec chapter 6.4.1. Required for power source and power dual role. | ||
| 32 | User can specify the source PDO array via PDO_FIXED/BATT/VAR() defined in | ||
| 33 | dt-bindings/usb/pd.h. | ||
| 34 | - sink-pdos: An array of u32 with each entry providing supported power | ||
| 35 | sink data object(PDO), the detailed bit definitions of PDO can be found | ||
| 36 | in "Universal Serial Bus Power Delivery Specification" chapter 6.4.1.3 | ||
| 37 | Sink Capabilities Message, the order of each entry(PDO) should follow | ||
| 38 | the PD spec chapter 6.4.1. Required for power sink and power dual role. | ||
| 39 | User can specify the sink PDO array via PDO_FIXED/BATT/VAR() defined in | ||
| 40 | dt-bindings/usb/pd.h. | ||
| 41 | - op-sink-microwatt: Sink required operating power in microwatt, if source | ||
| 42 | can't offer the power, Capability Mismatch is set. Required for power | ||
| 43 | sink and power dual role. | ||
| 44 | |||
| 18 | Required nodes: | 45 | Required nodes: |
| 19 | - any data bus to the connector should be modeled using the OF graph bindings | 46 | - any data bus to the connector should be modeled using the OF graph bindings |
| 20 | specified in bindings/graph.txt, unless the bus is between parent node and | 47 | specified in bindings/graph.txt, unless the bus is between parent node and |
| @@ -73,3 +100,20 @@ ccic: s2mm005@33 { · 52 unmodified lines | |||
| 73 | }; | 100 | }; |
| 74 | }; | 101 | }; |
| 75 | }; | 102 | }; |
| 103 | |||
| 104 | 3. USB-C connector attached to a typec port controller(ptn5110), which has | ||
| 105 | power delivery support and enables drp. | ||
| 106 | |||
| 107 | typec: ptn5110@50 { | ||
| 108 | ... | ||
| 109 | usb_con: connector { | ||
| 110 | compatible = "usb-c-connector"; | ||
| 111 | label = "USB-C"; | ||
| 112 | power-role = "dual"; | ||
| 113 | try-power-role = "sink"; | ||
| 114 | source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; | ||
| 115 | sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) | ||
| 116 | PDO_VAR(5000, 12000, 2000)>; | ||
| 117 | op-sink-microwatt = <10000000>; | ||
| 118 | }; | ||
| 119 | }; | ||
| @@ -29,8 +29,6 @@ Required properties: · 28 unmodified lines | |||
| 29 | - reg: Specifies base physical address and size of the registers. | 29 | - reg: Specifies base physical address and size of the registers. |
| 30 | - interrupts: The interrupt that the AVS CPU will use to interrupt the host | 30 | - interrupts: The interrupt that the AVS CPU will use to interrupt the host |
| 31 | when a command completed. | 31 | when a command completed. |
| 32 | - interrupt-parent: The interrupt controller the above interrupt is routed | ||
| 33 | through. | ||
| 34 | - interrupt-names: The name of the interrupt used to interrupt the host. | 32 | - interrupt-names: The name of the interrupt used to interrupt the host. |
| 35 | 33 | ||
| 36 | Optional properties: | 34 | Optional properties: |
| @@ -1,28 +0,0 @@ | |||
| 1 | |||
| 2 | Exynos5440 cpufreq driver | ||
| 3 | ------------------- | ||
| 4 | |||
| 5 | Exynos5440 SoC cpufreq driver for CPU frequency scaling. | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - interrupts: Interrupt to know the completion of cpu frequency change. | ||
| 9 | - operating-points: Table of frequencies and voltage CPU could be transitioned into, | ||
| 10 | in the decreasing order. Frequency should be in KHz units and voltage | ||
| 11 | should be in microvolts. | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | - clock-latency: Clock monitor latency in microsecond. | ||
| 15 | |||
| 16 | All the required listed above must be defined under node cpufreq. | ||
| 17 | |||
| 18 | Example: | ||
| 19 | -------- | ||
| 20 | cpufreq@160000 { | ||
| 21 | compatible = "samsung,exynos5440-cpufreq"; | ||
| 22 | reg = <0x160000 0x1000>; | ||
| 23 | interrupts = <0 57 0>; | ||
| 24 | operating-points = < | ||
| 25 | 1000000 975000 | ||
| 26 | 800000 925000>; | ||
| 27 | clock-latency = <100000>; | ||
| 28 | }; | ||
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "amd,ccp-seattle-v1a" | 4 | - compatible: Should be "amd,ccp-seattle-v1a" |
| 5 | - reg: Address and length of the register set for the device | 5 | - reg: Address and length of the register set for the device |
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupts: Should contain the CCP interrupt | 6 | - interrupts: Should contain the CCP interrupt |
| 9 | 7 | ||
| 10 | Optional properties: | 8 | Optional properties: |
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - interrupts: Interrupt number for the device. | 7 | - interrupts: Interrupt number for the device. |
| 8 | 8 | ||
| 9 | Optional properties: | 9 | Optional properties: |
| 10 | - interrupt-parent: The phandle for the interrupt controller that services | ||
| 11 | interrupts for this device. | ||
| 12 | - clocks: Reference to the crypto engine clock. | 10 | - clocks: Reference to the crypto engine clock. |
| 13 | - dma-coherent: Present if dma operations are coherent. | 11 | - dma-coherent: Present if dma operations are coherent. |
| 14 | 12 | ||
| @@ -50,11 +50,6 @@ remaining bits are reserved for future SEC EUs. · 49 unmodified lines | |||
| 50 | 50 | ||
| 51 | ..and so on and so forth. | 51 | ..and so on and so forth. |
| 52 | 52 | ||
| 53 | Optional properties: | ||
| 54 | |||
| 55 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 56 | services interrupts for this device. | ||
| 57 | |||
| 58 | Example: | 53 | Example: |
| 59 | 54 | ||
| 60 | /* MPC8548E */ | 55 | /* MPC8548E */ |
| @@ -99,13 +99,6 @@ PROPERTIES · 98 unmodified lines | |||
| 99 | of the specifier is defined by the binding document | 99 | of the specifier is defined by the binding document |
| 100 | describing the node's interrupt parent. | 100 | describing the node's interrupt parent. |
| 101 | 101 | ||
| 102 | - interrupt-parent | ||
| 103 | Usage: (required if interrupt property is defined) | ||
| 104 | Value type: <phandle> | ||
| 105 | Definition: A single <phandle> value that points | ||
| 106 | to the interrupt parent to which the child domain | ||
| 107 | is being mapped. | ||
| 108 | |||
| 109 | - clocks | 102 | - clocks |
| 110 | Usage: required if SEC 4.0 requires explicit enablement of clocks | 103 | Usage: required if SEC 4.0 requires explicit enablement of clocks |
| 111 | Value type: <prop_encoded-array> | 104 | Value type: <prop_encoded-array> |
| @@ -199,13 +192,6 @@ Job Ring (JR) Node · 87 unmodified lines | |||
| 199 | of the specifier is defined by the binding document | 192 | of the specifier is defined by the binding document |
| 200 | describing the node's interrupt parent. | 193 | describing the node's interrupt parent. |
| 201 | 194 | ||
| 202 | - interrupt-parent | ||
| 203 | Usage: (required if interrupt property is defined) | ||
| 204 | Value type: <phandle> | ||
| 205 | Definition: A single <phandle> value that points | ||
| 206 | to the interrupt parent to which the child domain | ||
| 207 | is being mapped. | ||
| 208 | |||
| 209 | EXAMPLE | 195 | EXAMPLE |
| 210 | jr@1000 { | 196 | jr@1000 { |
| 211 | compatible = "fsl,sec-v4.0-job-ring"; | 197 | compatible = "fsl,sec-v4.0-job-ring"; |
| @@ -370,13 +356,6 @@ Secure Non-Volatile Storage (SNVS) Node · 158 unmodified lines | |||
| 370 | of the specifier is defined by the binding document | 356 | of the specifier is defined by the binding document |
| 371 | describing the node's interrupt parent. | 357 | describing the node's interrupt parent. |
| 372 | 358 | ||
| 373 | - interrupt-parent | ||
| 374 | Usage: (required if interrupt property is defined) | ||
| 375 | Value type: <phandle> | ||
| 376 | Definition: A single <phandle> value that points | ||
| 377 | to the interrupt parent to which the child domain | ||
| 378 | is being mapped. | ||
| 379 | |||
| 380 | EXAMPLE | 359 | EXAMPLE |
| 381 | sec_mon@314000 { | 360 | sec_mon@314000 { |
| 382 | compatible = "fsl,sec-v4.0-mon", "syscon"; | 361 | compatible = "fsl,sec-v4.0-mon", "syscon"; |
| @@ -0,0 +1,67 @@ | |||
| 1 | * Hisilicon hip07 Security Accelerator (SEC) | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Must contain one of | ||
| 5 | - "hisilicon,hip06-sec" | ||
| 6 | - "hisilicon,hip07-sec" | ||
| 7 | - reg: Memory addresses and lengths of the memory regions through which | ||
| 8 | this device is controlled. | ||
| 9 | Region 0 has registers to control the backend processing engines. | ||
| 10 | Region 1 has registers for functionality common to all queues. | ||
| 11 | Regions 2-18 have registers for the 16 individual queues which are isolated | ||
| 12 | both in hardware and within the driver. | ||
| 13 | - interrupts: Interrupt specifiers. | ||
| 14 | Refer to interrupt-controller/interrupts.txt for generic interrupt client node | ||
| 15 | bindings. | ||
| 16 | Interrupt 0 is for the SEC unit error queue. | ||
| 17 | Interrupt 2N + 1 is the completion interrupt for queue N. | ||
| 18 | Interrupt 2N + 2 is the error interrupt for queue N. | ||
| 19 | - dma-coherent: The driver assumes coherent dma is possible. | ||
| 20 | |||
| 21 | Optional properties: | ||
| 22 | - iommus: The SEC units are behind smmu-v3 iommus. | ||
| 23 | Refer to iommu/arm,smmu-v3.txt for more information. | ||
| 24 | |||
| 25 | Example: | ||
| 26 | |||
| 27 | p1_sec_a: crypto@400,d2000000 { | ||
| 28 | compatible = "hisilicon,hip07-sec"; | ||
| 29 | reg = <0x400 0xd0000000 0x0 0x10000 | ||
| 30 | 0x400 0xd2000000 0x0 0x10000 | ||
| 31 | 0x400 0xd2010000 0x0 0x10000 | ||
| 32 | 0x400 0xd2020000 0x0 0x10000 | ||
| 33 | 0x400 0xd2030000 0x0 0x10000 | ||
| 34 | 0x400 0xd2040000 0x0 0x10000 | ||
| 35 | 0x400 0xd2050000 0x0 0x10000 | ||
| 36 | 0x400 0xd2060000 0x0 0x10000 | ||
| 37 | 0x400 0xd2070000 0x0 0x10000 | ||
| 38 | 0x400 0xd2080000 0x0 0x10000 | ||
| 39 | 0x400 0xd2090000 0x0 0x10000 | ||
| 40 | 0x400 0xd20a0000 0x0 0x10000 | ||
| 41 | 0x400 0xd20b0000 0x0 0x10000 | ||
| 42 | 0x400 0xd20c0000 0x0 0x10000 | ||
| 43 | 0x400 0xd20d0000 0x0 0x10000 | ||
| 44 | 0x400 0xd20e0000 0x0 0x10000 | ||
| 45 | 0x400 0xd20f0000 0x0 0x10000 | ||
| 46 | 0x400 0xd2100000 0x0 0x10000>; | ||
| 47 | interrupt-parent = <&p1_mbigen_sec_a>; | ||
| 48 | iommus = <&p1_smmu_alg_a 0x600>; | ||
| 49 | dma-coherent; | ||
| 50 | interrupts = <576 4>, | ||
| 51 | <577 1>, <578 4>, | ||
| 52 | <579 1>, <580 4>, | ||
| 53 | <581 1>, <582 4>, | ||
| 54 | <583 1>, <584 4>, | ||
| 55 | <585 1>, <586 4>, | ||
| 56 | <587 1>, <588 4>, | ||
| 57 | <589 1>, <590 4>, | ||
| 58 | <591 1>, <592 4>, | ||
| 59 | <593 1>, <594 4>, | ||
| 60 | <595 1>, <596 4>, | ||
| 61 | <597 1>, <598 4>, | ||
| 62 | <599 1>, <600 4>, | ||
| 63 | <601 1>, <602 4>, | ||
| 64 | <603 1>, <604 4>, | ||
| 65 | <605 1>, <606 4>, | ||
| 66 | <607 1>, <608 4>; | ||
| 67 | }; | ||
| @@ -1,8 +1,9 @@ | |||
| 1 | Inside Secure SafeXcel cryptographic engine | 1 | Inside Secure SafeXcel cryptographic engine |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "inside-secure,safexcel-eip197" or | 4 | - compatible: Should be "inside-secure,safexcel-eip197b", |
| 5 | "inside-secure,safexcel-eip97". | 5 | "inside-secure,safexcel-eip197d" or |
| 6 | "inside-secure,safexcel-eip97ies". | ||
| 6 | - reg: Base physical address of the engine and length of memory mapped region. | 7 | - reg: Base physical address of the engine and length of memory mapped region. |
| 7 | - interrupts: Interrupt numbers for the rings and engine. | 8 | - interrupts: Interrupt numbers for the rings and engine. |
| 8 | - interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". | 9 | - interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem". |
| @@ -14,10 +15,18 @@ Optional properties: · 5 unmodified lines | |||
| 14 | name must be "core" for the first clock and "reg" for | 15 | name must be "core" for the first clock and "reg" for |
| 15 | the second one. | 16 | the second one. |
| 16 | 17 | ||
| 18 | Backward compatibility: | ||
| 19 | Two compatibles are kept for backward compatibility, but shouldn't be used for | ||
| 20 | new submissions: | ||
| 21 | - "inside-secure,safexcel-eip197" is equivalent to | ||
| 22 | "inside-secure,safexcel-eip197b". | ||
| 23 | - "inside-secure,safexcel-eip97" is equivalent to | ||
| 24 | "inside-secure,safexcel-eip97ies". | ||
| 25 | |||
| 17 | Example: | 26 | Example: |
| 18 | 27 | ||
| 19 | crypto: crypto@800000 { | 28 | crypto: crypto@800000 { |
| 20 | compatible = "inside-secure,safexcel-eip197"; | 29 | compatible = "inside-secure,safexcel-eip197b"; |
| 21 | reg = <0x800000 0x200000>; | 30 | reg = <0x800000 0x200000>; |
| 22 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, | 31 | interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, |
| 23 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | 32 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine | 7 | - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine |
| 8 | "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. | 8 | "picochip,spacc-l2" for the femtocell layer 2 ciphering engine. |
| 9 | - reg : Offset and length of the register set for this device | 9 | - reg : Offset and length of the register set for this device |
| 10 | - interrupt-parent : The interrupt controller that controls the SPAcc | ||
| 11 | interrupt. | ||
| 12 | - interrupts : The interrupt line from the SPAcc. | 10 | - interrupts : The interrupt line from the SPAcc. |
| 13 | - ref-clock : The input clock that drives the SPAcc. | 11 | - ref-clock : The input clock that drives the SPAcc. |
| 14 | 12 | ||
| @@ -2,7 +2,9 @@ Qualcomm MSM pseudo random number generator. · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | 4 | ||
| 5 | - compatible : should be "qcom,prng" | 5 | - compatible : should be "qcom,prng" for 8916 etc |
| 6 | : should be "qcom,prng-ee" for 8996 and later using EE | ||
| 7 | (Execution Environment) slice of prng | ||
| 6 | - reg : specifies base physical address and size of the registers map | 8 | - reg : specifies base physical address and size of the registers map |
| 7 | - clocks : phandle to clock-controller plus clock-specifier pair | 9 | - clocks : phandle to clock-controller plus clock-specifier pair |
| 8 | - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block | 10 | - clock-names : "core" clocks all registers, FIFO and circuits in PRNG IP block |
| @@ -1,14 +1,10 @@ | |||
| 1 | * Rockchip rk3399 DMC(Dynamic Memory Controller) device | 1 | * Rockchip rk3399 DMC (Dynamic Memory Controller) device |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Must be "rockchip,rk3399-dmc". | 4 | - compatible: Must be "rockchip,rk3399-dmc". |
| 5 | - devfreq-events: Node to get DDR loading, Refer to | 5 | - devfreq-events: Node to get DDR loading, Refer to |
| 6 | Documentation/devicetree/bindings/devfreq/ | 6 | Documentation/devicetree/bindings/devfreq/event/ |
| 7 | rockchip-dfi.txt | 7 | rockchip-dfi.txt |
| 8 | - interrupts: The interrupt number to the CPU. The interrupt | ||
| 9 | specifier format depends on the interrupt controller. | ||
| 10 | It should be DCF interrupts, when DDR dvfs finish, | ||
| 11 | it will happen. | ||
| 12 | - clocks: Phandles for clock specified in "clock-names" property | 8 | - clocks: Phandles for clock specified in "clock-names" property |
| 13 | - clock-names : The name of clock used by the DFI, must be | 9 | - clock-names : The name of clock used by the DFI, must be |
| 14 | "pclk_ddr_mon"; | 10 | "pclk_ddr_mon"; |
| @@ -17,139 +13,148 @@ Required properties: · 2 unmodified lines | |||
| 17 | - center-supply: DMC supply node. | 13 | - center-supply: DMC supply node. |
| 18 | - status: Marks the node enabled/disabled. | 14 | - status: Marks the node enabled/disabled. |
| 19 | 15 | ||
| 20 | Following properties are ddr timing: | 16 | Optional properties: |
| 21 | 17 | - interrupts: The CPU interrupt number. The interrupt specifier | |
| 22 | - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/ddr.h, | 18 | format depends on the interrupt controller. |
| 23 | it select ddr3 cl-trp-trcd type, default value | 19 | It should be a DCF interrupt. When DDR DVFS finishes |
| 24 | "DDR3_DEFAULT".it must selected according to | 20 | a DCF interrupt is triggered. |
| 25 | "Speed Bin" in ddr3 datasheet, DO NOT use | 21 | |
| 26 | smaller "Speed Bin" than ddr3 exactly is. | 22 | Following properties relate to DDR timing: |
| 27 | 23 | ||
| 28 | - rockchip,pd_idle : Config the PD_IDLE value, defined the power-down | 24 | - rockchip,dram_speed_bin : Value reference include/dt-bindings/clock/rk3399-ddr.h, |
| 29 | idle period, memories are places into power-down | 25 | it selects the DDR3 cl-trp-trcd type. It must be |
| 30 | mode if bus is idle for PD_IDLE DFI clocks. | 26 | set according to "Speed Bin" in DDR3 datasheet, |
| 31 | 27 | DO NOT use a smaller "Speed Bin" than specified | |
| 32 | - rockchip,sr_idle : Configure the SR_IDLE value, defined the | 28 | for the DDR3 being used. |
| 33 | selfrefresh idle period, memories are places | 29 | |
| 34 | into self-refresh mode if bus is idle for | 30 | - rockchip,pd_idle : Configure the PD_IDLE value. Defines the |
| 35 | SR_IDLE*1024 DFI clocks (DFI clocks freq is | 31 | power-down idle period in which memories are |
| 36 | half of dram's clocks), defaule value is "0". | 32 | placed into power-down mode if bus is idle |
| 37 | 33 | for PD_IDLE DFI clock cycles. | |
| 38 | - rockchip,sr_mc_gate_idle : Defined the self-refresh with memory and | 34 | |
| 39 | controller clock gating idle period, memories | 35 | - rockchip,sr_idle : Configure the SR_IDLE value. Defines the |
| 40 | are places into self-refresh mode and memory | 36 | self-refresh idle period in which memories are |
| 41 | controller clock arg gating if bus is idle for | 37 | placed into self-refresh mode if bus is idle |
| 42 | sr_mc_gate_idle*1024 DFI clocks. | 38 | for SR_IDLE * 1024 DFI clock cycles (DFI |
| 43 | 39 | clocks freq is half of DRAM clock), default | |
| 44 | - rockchip,srpd_lite_idle : Defined the self-refresh power down idle | 40 | value is "0". |
| 45 | period, memories are places into self-refresh | 41 | |
| 46 | power down mode if bus is idle for | 42 | - rockchip,sr_mc_gate_idle : Defines the memory self-refresh and controller |
| 47 | srpd_lite_idle*1024 DFI clocks. This parameter | 43 | clock gating idle period. Memories are placed |
| 48 | is for LPDDR4 only. | 44 | into self-refresh mode and memory controller |
| 49 | 45 | clock arg gating started if bus is idle for | |
| 50 | - rockchip,standby_idle : Defined the standby idle period, memories are | 46 | sr_mc_gate_idle*1024 DFI clock cycles. |
| 51 | places into self-refresh than controller, pi, | 47 | |
| 52 | phy and dram clock will gating if bus is idle | 48 | - rockchip,srpd_lite_idle : Defines the self-refresh power down idle |
| 53 | for standby_idle * DFI clocks. | 49 | period in which memories are placed into |
| 54 | 50 | self-refresh power down mode if bus is idle | |
| 55 | - rockchip,dram_dll_disb_freq : It's defined the DDR3 dll bypass frequency in | 51 | for srpd_lite_idle * 1024 DFI clock cycles. |
| 56 | MHz, when ddr freq less than DRAM_DLL_DISB_FREQ, | 52 | This parameter is for LPDDR4 only. |
| 57 | ddr3 dll will bypssed note: if dll was bypassed, | 53 | |
| 58 | the odt also stop working. | 54 | - rockchip,standby_idle : Defines the standby idle period in which |
| 59 | 55 | memories are placed into self-refresh mode. | |
| 60 | - rockchip,phy_dll_disb_freq : Defined the PHY dll bypass frequency in | 56 | The controller, pi, PHY and DRAM clock will |
| 61 | MHz (Mega Hz), when ddr freq less than | 57 | be gated if bus is idle for standby_idle * DFI |
| 62 | DRAM_DLL_DISB_FREQ, phy dll will bypssed. | 58 | clock cycles. |
| 63 | note: phy dll and phy odt are independent. | 59 | |
| 64 | 60 | - rockchip,dram_dll_dis_freq : Defines the DDR3 DLL bypass frequency in MHz. | |
| 65 | - rockchip,ddr3_odt_disb_freq : When dram type is DDR3, this parameter defined | 61 | When DDR frequency is less than DRAM_DLL_DISB_FREQ, |
| 66 | the odt disable frequency in MHz (Mega Hz), | 62 | DDR3 DLL will be bypassed. Note: if DLL was bypassed, |
| 67 | when ddr frequency less then ddr3_odt_disb_freq, | 63 | the odt will also stop working. |
| 68 | the odt on dram side and controller side are | 64 | |
| 65 | - rockchip,phy_dll_dis_freq : Defines the PHY dll bypass frequency in | ||
| 66 | MHz (Mega Hz). When DDR frequency is less than | ||
| 67 | DRAM_DLL_DISB_FREQ, PHY DLL will be bypassed. | ||
| 68 | Note: PHY DLL and PHY ODT are independent. | ||
| 69 | |||
| 70 | - rockchip,ddr3_odt_dis_freq : When the DRAM type is DDR3, this parameter defines | ||
| 71 | the ODT disable frequency in MHz (Mega Hz). | ||
| 72 | when the DDR frequency is less then ddr3_odt_dis_freq, | ||
| 73 | the ODT on the DRAM side and controller side are | ||
| 69 | both disabled. | 74 | both disabled. |
| 70 | 75 | ||
| 71 | - rockchip,ddr3_drv : When dram type is DDR3, this parameter define | 76 | - rockchip,ddr3_drv : When the DRAM type is DDR3, this parameter defines |
| 72 | the dram side driver stength in ohm, default | 77 | the DRAM side driver strength in ohms. Default |
| 73 | value is DDR3_DS_40ohm. | 78 | value is DDR3_DS_40ohm. |
| 74 | 79 | ||
| 75 | - rockchip,ddr3_odt : When dram type is DDR3, this parameter define | 80 | - rockchip,ddr3_odt : When the DRAM type is DDR3, this parameter defines |
| 76 | the dram side ODT stength in ohm, default value | 81 | the DRAM side ODT strength in ohms. Default value |
| 77 | is DDR3_ODT_120ohm. | 82 | is DDR3_ODT_120ohm. |
| 78 | 83 | ||
| 79 | - rockchip,phy_ddr3_ca_drv : When dram type is DDR3, this parameter define | 84 | - rockchip,phy_ddr3_ca_drv : When the DRAM type is DDR3, this parameter defines |
| 80 | the phy side CA line(incluing command line, | 85 | the phy side CA line (incluing command line, |
| 81 | address line and clock line) driver strength. | 86 | address line and clock line) driver strength. |
| 82 | Default value is PHY_DRV_ODT_40. | 87 | Default value is PHY_DRV_ODT_40. |
| 83 | 88 | ||
| 84 | - rockchip,phy_ddr3_dq_drv : When dram type is DDR3, this parameter define | 89 | - rockchip,phy_ddr3_dq_drv : When the DRAM type is DDR3, this parameter defines |
| 85 | the phy side DQ line(incluing DQS/DQ/DM line) | 90 | the PHY side DQ line (including DQS/DQ/DM line) |
| 86 | driver strength. default value is PHY_DRV_ODT_40. | 91 | driver strength. Default value is PHY_DRV_ODT_40. |
| 87 | 92 | ||
| 88 | - rockchip,phy_ddr3_odt : When dram type is DDR3, this parameter define the | 93 | - rockchip,phy_ddr3_odt : When the DRAM type is DDR3, this parameter defines |
| 89 | phy side odt strength, default value is | 94 | the PHY side ODT strength. Default value is |
| 90 | PHY_DRV_ODT_240. | 95 | PHY_DRV_ODT_240. |
| 91 | 96 | ||
| 92 | - rockchip,lpddr3_odt_disb_freq : When dram type is LPDDR3, this parameter defined | 97 | - rockchip,lpddr3_odt_dis_freq : When the DRAM type is LPDDR3, this parameter defines |
| 93 | then odt disable frequency in MHz (Mega Hz), | 98 | then ODT disable frequency in MHz (Mega Hz). |
| 94 | when ddr frequency less then ddr3_odt_disb_freq, | 99 | When DDR frequency is less then ddr3_odt_dis_freq, |
| 95 | the odt on dram side and controller side are | 100 | the ODT on the DRAM side and controller side are |
| 96 | both disabled. | 101 | both disabled. |
| 97 | 102 | ||
| 98 | - rockchip,lpddr3_drv : When dram type is LPDDR3, this parameter define | 103 | - rockchip,lpddr3_drv : When the DRAM type is LPDDR3, this parameter defines |
| 99 | the dram side driver stength in ohm, default | 104 | the DRAM side driver strength in ohms. Default |
| 100 | value is LP3_DS_34ohm. | 105 | value is LP3_DS_34ohm. |
| 101 | 106 | ||
| 102 | - rockchip,lpddr3_odt : When dram type is LPDDR3, this parameter define | 107 | - rockchip,lpddr3_odt : When the DRAM type is LPDDR3, this parameter defines |
| 103 | the dram side ODT stength in ohm, default value | 108 | the DRAM side ODT strength in ohms. Default value |
| 104 | is LP3_ODT_240ohm. | 109 | is LP3_ODT_240ohm. |
| 105 | 110 | ||
| 106 | - rockchip,phy_lpddr3_ca_drv : When dram type is LPDDR3, this parameter define | 111 | - rockchip,phy_lpddr3_ca_drv : When the DRAM type is LPDDR3, this parameter defines |
| 107 | the phy side CA line(incluing command line, | 112 | the PHY side CA line (including command line, |
| 108 | address line and clock line) driver strength. | 113 | address line and clock line) driver strength. |
| 109 | default value is PHY_DRV_ODT_40. | 114 | Default value is PHY_DRV_ODT_40. |
| 110 | 115 | ||
| 111 | - rockchip,phy_lpddr3_dq_drv : When dram type is LPDDR3, this parameter define | 116 | - rockchip,phy_lpddr3_dq_drv : When the DRAM type is LPDDR3, this parameter defines |
| 112 | the phy side DQ line(incluing DQS/DQ/DM line) | 117 | the PHY side DQ line (including DQS/DQ/DM line) |
| 113 | driver strength. default value is | 118 | driver strength. Default value is |
| 114 | PHY_DRV_ODT_40. | 119 | PHY_DRV_ODT_40. |
| 115 | 120 | ||
| 116 | - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define | 121 | - rockchip,phy_lpddr3_odt : When dram type is LPDDR3, this parameter define |
| 117 | the phy side odt strength, default value is | 122 | the phy side odt strength, default value is |
| 118 | PHY_DRV_ODT_240. | 123 | PHY_DRV_ODT_240. |
| 119 | 124 | ||
| 120 | - rockchip,lpddr4_odt_disb_freq : When dram type is LPDDR4, this parameter | 125 | - rockchip,lpddr4_odt_dis_freq : When the DRAM type is LPDDR4, this parameter |
| 121 | defined the odt disable frequency in | 126 | defines the ODT disable frequency in |
| 122 | MHz (Mega Hz), when ddr frequency less then | 127 | MHz (Mega Hz). When the DDR frequency is less then |
| 123 | ddr3_odt_disb_freq, the odt on dram side and | 128 | ddr3_odt_dis_freq, the ODT on the DRAM side and |
| 124 | controller side are both disabled. | 129 | controller side are both disabled. |
| 125 | 130 | ||
| 126 | - rockchip,lpddr4_drv : When dram type is LPDDR4, this parameter define | 131 | - rockchip,lpddr4_drv : When the DRAM type is LPDDR4, this parameter defines |
| 127 | the dram side driver stength in ohm, default | 132 | the DRAM side driver strength in ohms. Default |
| 128 | value is LP4_PDDS_60ohm. | 133 | value is LP4_PDDS_60ohm. |
| 129 | 134 | ||
| 130 | - rockchip,lpddr4_dq_odt : When dram type is LPDDR4, this parameter define | 135 | - rockchip,lpddr4_dq_odt : When the DRAM type is LPDDR4, this parameter defines |
| 131 | the dram side ODT on dqs/dq line stength in ohm, | 136 | the DRAM side ODT on DQS/DQ line strength in ohms. |
| 132 | default value is LP4_DQ_ODT_40ohm. | 137 | Default value is LP4_DQ_ODT_40ohm. |
| 133 | 138 | ||
| 134 | - rockchip,lpddr4_ca_odt : When dram type is LPDDR4, this parameter define | 139 | - rockchip,lpddr4_ca_odt : When the DRAM type is LPDDR4, this parameter defines |
| 135 | the dram side ODT on ca line stength in ohm, | 140 | the DRAM side ODT on CA line strength in ohms. |
| 136 | default value is LP4_CA_ODT_40ohm. | 141 | Default value is LP4_CA_ODT_40ohm. |
| 137 | 142 | ||
| 138 | - rockchip,phy_lpddr4_ca_drv : When dram type is LPDDR4, this parameter define | 143 | - rockchip,phy_lpddr4_ca_drv : When the DRAM type is LPDDR4, this parameter defines |
| 139 | the phy side CA line(incluing command address | 144 | the PHY side CA line (including command address |
| 140 | line) driver strength. default value is | 145 | line) driver strength. Default value is |
| 141 | PHY_DRV_ODT_40. | 146 | PHY_DRV_ODT_40. |
| 142 | 147 | ||
| 143 | - rockchip,phy_lpddr4_ck_cs_drv : When dram type is LPDDR4, this parameter define | 148 | - rockchip,phy_lpddr4_ck_cs_drv : When the DRAM type is LPDDR4, this parameter defines |
| 144 | the phy side clock line and cs line driver | 149 | the PHY side clock line and CS line driver |
| 145 | strength. default value is PHY_DRV_ODT_80. | 150 | strength. Default value is PHY_DRV_ODT_80. |
| 146 | 151 | ||
| 147 | - rockchip,phy_lpddr4_dq_drv : When dram type is LPDDR4, this parameter define | 152 | - rockchip,phy_lpddr4_dq_drv : When the DRAM type is LPDDR4, this parameter defines |
| 148 | the phy side DQ line(incluing DQS/DQ/DM line) | 153 | the PHY side DQ line (including DQS/DQ/DM line) |
| 149 | driver strength. default value is PHY_DRV_ODT_80. | 154 | driver strength. Default value is PHY_DRV_ODT_80. |
| 150 | 155 | ||
| 151 | - rockchip,phy_lpddr4_odt : When dram type is LPDDR4, this parameter define | 156 | - rockchip,phy_lpddr4_odt : When the DRAM type is LPDDR4, this parameter defines |
| 152 | the phy side odt strength, default value is | 157 | the PHY side ODT strength. Default value is |
| 153 | PHY_DRV_ODT_60. | 158 | PHY_DRV_ODT_60. |
| 154 | 159 | ||
| 155 | Example: | 160 | Example: |
| @@ -15,8 +15,6 @@ Required properties for dp-controller: · 14 unmodified lines | |||
| 15 | from common clock binding: handle to dp clock. | 15 | from common clock binding: handle to dp clock. |
| 16 | -clock-names: | 16 | -clock-names: |
| 17 | from common clock binding: Shall be "dp". | 17 | from common clock binding: Shall be "dp". |
| 18 | -interrupt-parent: | ||
| 19 | phandle to Interrupt combiner node. | ||
| 20 | -phys: | 18 | -phys: |
| 21 | from general PHY binding: the phandle for the PHY device. | 19 | from general PHY binding: the phandle for the PHY device. |
| 22 | -phy-names: | 20 | -phy-names: |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | 8 | ||
| 9 | - compatible : "analogix,anx7814" | 9 | - compatible : "analogix,anx7814" |
| 10 | - reg : I2C address of the device | 10 | - reg : I2C address of the device |
| 11 | - interrupt-parent : Should be the phandle of the interrupt controller | ||
| 12 | that services interrupts for this device | ||
| 13 | - interrupts : Should contain the INTP interrupt | 11 | - interrupts : Should contain the INTP interrupt |
| 14 | - hpd-gpios : Which GPIO to use for hpd | 12 | - hpd-gpios : Which GPIO to use for hpd |
| 15 | - pd-gpios : Which GPIO to use for power down | 13 | - pd-gpios : Which GPIO to use for power down |
| @@ -19,8 +19,6 @@ hardware are EDID, HPD, and interrupts. · 18 unmodified lines | |||
| 19 | stdp4028-ge-b850v3-fw required properties: | 19 | stdp4028-ge-b850v3-fw required properties: |
| 20 | - compatible : "megachips,stdp4028-ge-b850v3-fw" | 20 | - compatible : "megachips,stdp4028-ge-b850v3-fw" |
| 21 | - reg : I2C bus address | 21 | - reg : I2C bus address |
| 22 | - interrupt-parent : phandle of the interrupt controller that services | ||
| 23 | interrupts to the device | ||
| 24 | - interrupts : one interrupt should be described here, as in | 22 | - interrupts : one interrupt should be described here, as in |
| 25 | <0 IRQ_TYPE_LEVEL_HIGH> | 23 | <0 IRQ_TYPE_LEVEL_HIGH> |
| 26 | - ports : One input port(reg = <0>) and one output port(reg = <1>) | 24 | - ports : One input port(reg = <0>) and one output port(reg = <1>) |
| @@ -5,8 +5,8 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: i2c address of the bridge | 5 | - reg: i2c address of the bridge |
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupts-extended or interrupt-parent + interrupts: describe | 8 | - interrupts: describe the interrupt line used to inform the host |
| 9 | the interrupt line used to inform the host about hotplug events. | 9 | about hotplug events. |
| 10 | - reset-gpios: OF device-tree gpio specification for RST_N pin. | 10 | - reset-gpios: OF device-tree gpio specification for RST_N pin. |
| 11 | 11 | ||
| 12 | Optional subnodes: | 12 | Optional subnodes: |
| @@ -7,7 +7,7 @@ Required properties: · 6 unmodified lines | |||
| 7 | - iovcc18-supply : I/O Supply Voltage (1.8V) | 7 | - iovcc18-supply : I/O Supply Voltage (1.8V) |
| 8 | - avcc12-supply : TMDS Analog Supply Voltage (1.2V) | 8 | - avcc12-supply : TMDS Analog Supply Voltage (1.2V) |
| 9 | - cvcc12-supply : Digital Core Supply Voltage (1.2V) | 9 | - cvcc12-supply : Digital Core Supply Voltage (1.2V) |
| 10 | - interrupts, interrupt-parent: interrupt specifier of INT pin | 10 | - interrupts: interrupt specifier of INT pin |
| 11 | - reset-gpios: gpio specifier of RESET pin (active low) | 11 | - reset-gpios: gpio specifier of RESET pin (active low) |
| 12 | - video interfaces: Device node can contain two video interface port | 12 | - video interfaces: Device node can contain two video interface port |
| 13 | nodes for HDMI encoder and connector according to [1]. | 13 | nodes for HDMI encoder and connector according to [1]. |
| @@ -5,7 +5,7 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: i2c address of the bridge | 5 | - reg: i2c address of the bridge |
| 6 | - cvcc10-supply: Digital Core Supply Voltage (1.0V) | 6 | - cvcc10-supply: Digital Core Supply Voltage (1.0V) |
| 7 | - iovcc18-supply: I/O Supply Voltage (1.8V) | 7 | - iovcc18-supply: I/O Supply Voltage (1.8V) |
| 8 | - interrupts, interrupt-parent: interrupt specifier of INT pin | 8 | - interrupts: interrupt specifier of INT pin |
| 9 | - reset-gpios: gpio specifier of RESET pin | 9 | - reset-gpios: gpio specifier of RESET pin |
| 10 | - clocks, clock-names: specification and name of "xtal" clock | 10 | - clocks, clock-names: specification and name of "xtal" clock |
| 11 | - video interfaces: Device node can contain video interface port | 11 | - video interfaces: Device node can contain video interface port |
| @@ -9,9 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | - reg: physical base address and length of the DECON registers set. | 10 | - reg: physical base address and length of the DECON registers set. |
| 11 | 11 | ||
| 12 | - interrupt-parent: should be the phandle of the decon controller's | ||
| 13 | parent interrupt controller. | ||
| 14 | |||
| 15 | - interrupts: should contain a list of all DECON IP block interrupts in the | 12 | - interrupts: should contain a list of all DECON IP block interrupts in the |
| 16 | order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier | 13 | order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier |
| 17 | format depends on the interrupt controller used. | 14 | format depends on the interrupt controller used. |
| @@ -25,8 +25,6 @@ Required properties for dp-controller: · 24 unmodified lines | |||
| 25 | from common clock binding: handle to dp clock. | 25 | from common clock binding: handle to dp clock. |
| 26 | -clock-names: | 26 | -clock-names: |
| 27 | from common clock binding: Shall be "dp". | 27 | from common clock binding: Shall be "dp". |
| 28 | -interrupt-parent: | ||
| 29 | phandle to Interrupt combiner node. | ||
| 30 | -phys: | 28 | -phys: |
| 31 | from general PHY binding: the phandle for the PHY device. | 29 | from general PHY binding: the phandle for the PHY device. |
| 32 | -phy-names: | 30 | -phy-names: |
| @@ -16,9 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | 16 | ||
| 17 | - reg: physical base address and length of the FIMD registers set. | 17 | - reg: physical base address and length of the FIMD registers set. |
| 18 | 18 | ||
| 19 | - interrupt-parent: should be the phandle of the fimd controller's | ||
| 20 | parent interrupt controller. | ||
| 21 | |||
| 22 | - interrupts: should contain a list of all FIMD IP block interrupts in the | 19 | - interrupts: should contain a list of all FIMD IP block interrupts in the |
| 23 | order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier | 20 | order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier |
| 24 | format depends on the interrupt controller used. | 21 | format depends on the interrupt controller used. |
| @@ -4,8 +4,6 @@ Holtek ht16k33 RAM mapping 16*8 LED controller driver with keyscan · 3 unmodified lines | |||
| 4 | Required properties: | 4 | Required properties: |
| 5 | - compatible: "holtek,ht16k33" | 5 | - compatible: "holtek,ht16k33" |
| 6 | - reg: I2C slave address of the chip. | 6 | - reg: I2C slave address of the chip. |
| 7 | - interrupt-parent: A phandle pointing to the interrupt controller | ||
| 8 | serving the interrupt for this chip. | ||
| 9 | - interrupts: Interrupt specification for the key pressed interrupt. | 7 | - interrupts: Interrupt specification for the key pressed interrupt. |
| 10 | - refresh-rate-hz: Display update interval in HZ. | 8 | - refresh-rate-hz: Display update interval in HZ. |
| 11 | - debounce-delay-ms: Debouncing interval time in milliseconds. | 9 | - debounce-delay-ms: Debouncing interval time in milliseconds. |
| @@ -10,6 +10,9 @@ Required properties: · 9 unmodified lines | |||
| 10 | - interrupts : framebuffer controller interrupt. | 10 | - interrupts : framebuffer controller interrupt. |
| 11 | - clocks: phandle to input clocks | 11 | - clocks: phandle to input clocks |
| 12 | 12 | ||
| 13 | Optional properties: | ||
| 14 | - lcd-supply: A phandle to a power regulator that controls the LCD voltage. | ||
| 15 | |||
| 13 | Required nodes: | 16 | Required nodes: |
| 14 | - port: connection to the LCD panel (see video-interfaces.txt) | 17 | - port: connection to the LCD panel (see video-interfaces.txt) |
| 15 | This node must have its properties bus-width and remote-endpoint set. | 18 | This node must have its properties bus-width and remote-endpoint set. |
| @@ -0,0 +1,17 @@ | |||
| 1 | PXA3xx GCU Controller | ||
| 2 | --------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible : "marvell,pxa300-gcu" | ||
| 6 | - reg : should contain the register range (address and length). | ||
| 7 | - interrupts : Controller interrupt. | ||
| 8 | - clocks: phandle to the PXA specific input clock. | ||
| 9 | |||
| 10 | Example for PXA300: | ||
| 11 | |||
| 12 | display-controller@54000000 { | ||
| 13 | compatible = "marvell,pxa300-gcu"; | ||
| 14 | reg = <0x54000000 0x1000>; | ||
| 15 | interrupts = <39>; | ||
| 16 | clocks = <&clks CLK_PXA300_GCU>; | ||
| 17 | }; | ||
| @@ -40,7 +40,7 @@ Required properties (all function blocks): · 39 unmodified lines | |||
| 40 | "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt | 40 | "mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt |
| 41 | "mediatek,<chip>-disp-mutex" - display mutex | 41 | "mediatek,<chip>-disp-mutex" - display mutex |
| 42 | "mediatek,<chip>-disp-od" - overdrive | 42 | "mediatek,<chip>-disp-od" - overdrive |
| 43 | the supported chips are mt2701 and mt8173. | 43 | the supported chips are mt2701, mt2712 and mt8173. |
| 44 | - reg: Physical base address and length of the function block register space | 44 | - reg: Physical base address and length of the function block register space |
| 45 | - interrupts: The interrupt signal from the function block (required, except for | 45 | - interrupts: The interrupt signal from the function block (required, except for |
| 46 | merge and split function blocks). | 46 | merge and split function blocks). |
| @@ -0,0 +1,131 @@ | |||
| 1 | Qualcomm Technologies, Inc. DPU KMS | ||
| 2 | |||
| 3 | Description: | ||
| 4 | |||
| 5 | Device tree bindings for MSM Mobile Display Subsytem(MDSS) that encapsulates | ||
| 6 | sub-blocks like DPU display controller, DSI and DP interfaces etc. | ||
| 7 | The DPU display controller is found in SDM845 SoC. | ||
| 8 | |||
| 9 | MDSS: | ||
| 10 | Required properties: | ||
| 11 | - compatible: "qcom,sdm845-mdss" | ||
| 12 | - reg: physical base address and length of contoller's registers. | ||
| 13 | - reg-names: register region names. The following region is required: | ||
| 14 | * "mdss" | ||
| 15 | - power-domains: a power domain consumer specifier according to | ||
| 16 | Documentation/devicetree/bindings/power/power_domain.txt | ||
| 17 | - clocks: list of clock specifiers for clocks needed by the device. | ||
| 18 | - clock-names: device clock names, must be in same order as clocks property. | ||
| 19 | The following clocks are required: | ||
| 20 | * "iface" | ||
| 21 | * "bus" | ||
| 22 | * "core" | ||
| 23 | - interrupts: interrupt signal from MDSS. | ||
| 24 | - interrupt-controller: identifies the node as an interrupt controller. | ||
| 25 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | ||
| 26 | source, should be 1. | ||
| 27 | - iommus: phandle of iommu device node. | ||
| 28 | - #address-cells: number of address cells for the MDSS children. Should be 1. | ||
| 29 | - #size-cells: Should be 1. | ||
| 30 | - ranges: parent bus address space is the same as the child bus address space. | ||
| 31 | |||
| 32 | Optional properties: | ||
| 33 | - assigned-clocks: list of clock specifiers for clocks needing rate assignment | ||
| 34 | - assigned-clock-rates: list of clock frequencies sorted in the same order as | ||
| 35 | the assigned-clocks property. | ||
| 36 | |||
| 37 | MDP: | ||
| 38 | Required properties: | ||
| 39 | - compatible: "qcom,sdm845-dpu" | ||
| 40 | - reg: physical base address and length of controller's registers. | ||
| 41 | - reg-names : register region names. The following region is required: | ||
| 42 | * "mdp" | ||
| 43 | * "vbif" | ||
| 44 | - clocks: list of clock specifiers for clocks needed by the device. | ||
| 45 | - clock-names: device clock names, must be in same order as clocks property. | ||
| 46 | The following clocks are required. | ||
| 47 | * "bus" | ||
| 48 | * "iface" | ||
| 49 | * "core" | ||
| 50 | * "vsync" | ||
| 51 | - interrupts: interrupt line from DPU to MDSS. | ||
| 52 | - ports: contains the list of output ports from DPU device. These ports connect | ||
| 53 | to interfaces that are external to the DPU hardware, such as DSI, DP etc. | ||
| 54 | |||
| 55 | Each output port contains an endpoint that describes how it is connected to an | ||
| 56 | external interface. These are described by the standard properties documented | ||
| 57 | here: | ||
| 58 | Documentation/devicetree/bindings/graph.txt | ||
| 59 | Documentation/devicetree/bindings/media/video-interfaces.txt | ||
| 60 | |||
| 61 | Port 0 -> DPU_INTF1 (DSI1) | ||
| 62 | Port 1 -> DPU_INTF2 (DSI2) | ||
| 63 | |||
| 64 | Optional properties: | ||
| 65 | - assigned-clocks: list of clock specifiers for clocks needing rate assignment | ||
| 66 | - assigned-clock-rates: list of clock frequencies sorted in the same order as | ||
| 67 | the assigned-clocks property. | ||
| 68 | |||
| 69 | Example: | ||
| 70 | |||
| 71 | mdss: mdss@ae00000 { | ||
| 72 | compatible = "qcom,sdm845-mdss"; | ||
| 73 | reg = <0xae00000 0x1000>; | ||
| 74 | reg-names = "mdss"; | ||
| 75 | |||
| 76 | power-domains = <&clock_dispcc 0>; | ||
| 77 | |||
| 78 | clocks = <&gcc GCC_DISP_AHB_CLK>, <&gcc GCC_DISP_AXI_CLK>, | ||
| 79 | <&clock_dispcc DISP_CC_MDSS_MDP_CLK>; | ||
| 80 | clock-names = "iface", "bus", "core"; | ||
| 81 | |||
| 82 | assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>; | ||
| 83 | assigned-clock-rates = <300000000>; | ||
| 84 | |||
| 85 | interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; | ||
| 86 | interrupt-controller; | ||
| 87 | #interrupt-cells = <1>; | ||
| 88 | |||
| 89 | iommus = <&apps_iommu 0>; | ||
| 90 | |||
| 91 | #address-cells = <2>; | ||
| 92 | #size-cells = <1>; | ||
| 93 | ranges = <0 0 0xae00000 0xb2008>; | ||
| 94 | |||
| 95 | mdss_mdp: mdp@ae01000 { | ||
| 96 | compatible = "qcom,sdm845-dpu"; | ||
| 97 | reg = <0 0x1000 0x8f000>, <0 0xb0000 0x2008>; | ||
| 98 | reg-names = "mdp", "vbif"; | ||
| 99 | |||
| 100 | clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, | ||
| 101 | <&clock_dispcc DISP_CC_MDSS_AXI_CLK>, | ||
| 102 | <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, | ||
| 103 | <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; | ||
| 104 | clock-names = "iface", "bus", "core", "vsync"; | ||
| 105 | |||
| 106 | assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, | ||
| 107 | <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>; | ||
| 108 | assigned-clock-rates = <0 0 300000000 19200000>; | ||
| 109 | |||
| 110 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; | ||
| 111 | |||
| 112 | ports { | ||
| 113 | #address-cells = <1>; | ||
| 114 | #size-cells = <0>; | ||
| 115 | |||
| 116 | port@0 { | ||
| 117 | reg = <0>; | ||
| 118 | dpu_intf1_out: endpoint { | ||
| 119 | remote-endpoint = <&dsi0_in>; | ||
| 120 | }; | ||
| 121 | }; | ||
| 122 | |||
| 123 | port@1 { | ||
| 124 | reg = <1>; | ||
| 125 | dpu_intf2_out: endpoint { | ||
| 126 | remote-endpoint = <&dsi1_in>; | ||
| 127 | }; | ||
| 128 | }; | ||
| 129 | }; | ||
| 130 | }; | ||
| 131 | }; | ||
| @@ -43,8 +43,6 @@ Optional properties: · 42 unmodified lines | |||
| 43 | the master link of the 2-DSI panel. | 43 | the master link of the 2-DSI panel. |
| 44 | - qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is | 44 | - qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is |
| 45 | driving a 2-DSI panel whose 2 links need receive command simultaneously. | 45 | driving a 2-DSI panel whose 2 links need receive command simultaneously. |
| 46 | - interrupt-parent: phandle to the MDP block if the interrupt signal is routed | ||
| 47 | through MDP block | ||
| 48 | - pinctrl-names: the pin control state names; should contain "default" | 46 | - pinctrl-names: the pin control state names; should contain "default" |
| 49 | - pinctrl-0: the default pinctrl state (active) | 47 | - pinctrl-0: the default pinctrl state (active) |
| 50 | - pinctrl-n: the "sleep" pinctrl state | 48 | - pinctrl-n: the "sleep" pinctrl state |
| @@ -121,6 +119,20 @@ Required properties: · 70 unmodified lines | |||
| 121 | Optional properties: | 119 | Optional properties: |
| 122 | - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY | 120 | - qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY |
| 123 | regulator is wanted. | 121 | regulator is wanted. |
| 122 | - qcom,mdss-mdp-transfer-time-us: Specifies the dsi transfer time for command mode | ||
| 123 | panels in microseconds. Driver uses this number to adjust | ||
| 124 | the clock rate according to the expected transfer time. | ||
| 125 | Increasing this value would slow down the mdp processing | ||
| 126 | and can result in slower performance. | ||
| 127 | Decreasing this value can speed up the mdp processing, | ||
| 128 | but this can also impact power consumption. | ||
| 129 | As a rule this time should not be higher than the time | ||
| 130 | that would be expected with the processing at the | ||
| 131 | dsi link rate since anyways this would be the maximum | ||
| 132 | transfer time that could be achieved. | ||
| 133 | If ping pong split is enabled, this time should not be higher | ||
| 134 | than two times the dsi link rate time. | ||
| 135 | If the property is not specified, then the default value is 14000 us. | ||
| 124 | 136 | ||
| 125 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt | 137 | [1] Documentation/devicetree/bindings/clock/clock-bindings.txt |
| 126 | [2] Documentation/devicetree/bindings/graph.txt | 138 | [2] Documentation/devicetree/bindings/graph.txt |
| @@ -171,6 +183,8 @@ Example: · 44 unmodified lines | |||
| 171 | qcom,master-dsi; | 183 | qcom,master-dsi; |
| 172 | qcom,sync-dual-dsi; | 184 | qcom,sync-dual-dsi; |
| 173 | 185 | ||
| 186 | qcom,mdss-mdp-transfer-time-us = <12000>; | ||
| 187 | |||
| 174 | pinctrl-names = "default", "sleep"; | 188 | pinctrl-names = "default", "sleep"; |
| 175 | pinctrl-0 = <&dsi_active>; | 189 | pinctrl-0 = <&dsi_active>; |
| 176 | pinctrl-1 = <&dsi_suspend>; | 190 | pinctrl-1 = <&dsi_suspend>; |
| @@ -25,10 +25,6 @@ Required properties: · 24 unmodified lines | |||
| 25 | - panel-hpd-gpios: GPIO pin used for eDP hpd. | 25 | - panel-hpd-gpios: GPIO pin used for eDP hpd. |
| 26 | 26 | ||
| 27 | 27 | ||
| 28 | Optional properties: | ||
| 29 | - interrupt-parent: phandle to the MDP block if the interrupt signal is routed | ||
| 30 | through MDP block | ||
| 31 | |||
| 32 | Example: | 28 | Example: |
| 33 | mdss_edp: qcom,mdss_edp@fd923400 { | 29 | mdss_edp: qcom,mdss_edp@fd923400 { |
| 34 | compatible = "qcom,mdss-edp"; | 30 | compatible = "qcom,mdss-edp"; |
| @@ -41,8 +41,6 @@ Required properties: · 40 unmodified lines | |||
| 41 | - reg-names: The names of register regions. The following regions are required: | 41 | - reg-names: The names of register regions. The following regions are required: |
| 42 | * "mdp_phys" | 42 | * "mdp_phys" |
| 43 | - interrupts: Interrupt line from MDP5 to MDSS interrupt controller. | 43 | - interrupts: Interrupt line from MDP5 to MDSS interrupt controller. |
| 44 | - interrupt-parent: phandle to the MDSS block | ||
| 45 | through MDP block | ||
| 46 | - clocks: device clocks. See ../clocks/clock-bindings.txt for details. | 44 | - clocks: device clocks. See ../clocks/clock-bindings.txt for details. |
| 47 | - clock-names: the following clocks are required. | 45 | - clock-names: the following clocks are required. |
| 48 | - * "bus" | 46 | - * "bus" |
| @@ -19,7 +19,6 @@ Required Properties: · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | - reg: the memory-mapped I/O registers base address and length | 20 | - reg: the memory-mapped I/O registers base address and length |
| 21 | 21 | ||
| 22 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 23 | - interrupts: Interrupt specifiers for the DU interrupts. | 22 | - interrupts: Interrupt specifiers for the DU interrupts. |
| 24 | 23 | ||
| 25 | - clocks: A list of phandles + clock-specifier pairs, one for each entry in | 24 | - clocks: A list of phandles + clock-specifier pairs, one for each entry in |
| @@ -9,8 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | - First entry: System Configuration register | 9 | - First entry: System Configuration register |
| 10 | - Second entry: IO space (Display Controller register) | 10 | - Second entry: IO space (Display Controller register) |
| 11 | - interrupts : SMI interrupt to the cpu should be described here. | 11 | - interrupts : SMI interrupt to the cpu should be described here. |
| 12 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 13 | services interrupts for this device. | ||
| 14 | 12 | ||
| 15 | Optional properties: | 13 | Optional properties: |
| 16 | - mode : select a video mode: | 14 | - mode : select a video mode: |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg: base address and size of the LCDC device | 8 | - reg: base address and size of the LCDC device |
| 9 | 9 | ||
| 10 | Recommended properties: | 10 | Recommended properties: |
| 11 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 12 | services interrupts for this device. | ||
| 13 | - ti,hwmods: Name of the hwmod associated to the LCDC | 11 | - ti,hwmods: Name of the hwmod associated to the LCDC |
| 14 | 12 | ||
| 15 | Optional properties: | 13 | Optional properties: |
| @@ -36,7 +34,7 @@ Optional nodes: · 20 unmodified lines | |||
| 36 | 34 | ||
| 37 | - port/ports: to describe a connection to an external encoder. The | 35 | - port/ports: to describe a connection to an external encoder. The |
| 38 | binding follows Documentation/devicetree/bindings/graph.txt and | 36 | binding follows Documentation/devicetree/bindings/graph.txt and |
| 39 | suppors a single port with a single endpoint. | 37 | supports a single port with a single endpoint. |
| 40 | 38 | ||
| 41 | - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and | 39 | - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and |
| 42 | Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting | 40 | Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - compatible: Should be "ingenic,jz4780-dma" | 5 | - compatible: Should be "ingenic,jz4780-dma" |
| 6 | - reg: Should contain the DMA controller registers location and length. | 6 | - reg: Should contain the DMA controller registers location and length. |
| 7 | - interrupts: Should contain the interrupt specifier of the DMA controller. | 7 | - interrupts: Should contain the interrupt specifier of the DMA controller. |
| 8 | - interrupt-parent: Should be the phandle of the interrupt controller that | ||
| 9 | - clocks: Should contain a clock specifier for the JZ4780 PDMA clock. | 8 | - clocks: Should contain a clock specifier for the JZ4780 PDMA clock. |
| 10 | - #dma-cells: Must be <2>. Number of integer cells in the dmas property of | 9 | - #dma-cells: Must be <2>. Number of integer cells in the dmas property of |
| 11 | DMA clients (see below). | 10 | DMA clients (see below). |
| @@ -8,7 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg: Should contain DMA registers location and length. This should be | 8 | - reg: Should contain DMA registers location and length. This should be |
| 9 | a single entry that includes all of the per-channel registers in one | 9 | a single entry that includes all of the per-channel registers in one |
| 10 | contiguous bank. | 10 | contiguous bank. |
| 11 | - interrupt-parent: Phandle to the interrupt parent controller. | ||
| 12 | - interrupts: Should contain all of the per-channel DMA interrupts in | 11 | - interrupts: Should contain all of the per-channel DMA interrupts in |
| 13 | ascending order with respect to the DMA channel index. | 12 | ascending order with respect to the DMA channel index. |
| 14 | - clocks: Must contain one entry for the ADMA module clock | 13 | - clocks: Must contain one entry for the ADMA module clock |
| @@ -0,0 +1,47 @@ | |||
| 1 | * Actions Semi Owl SoCs DMA controller | ||
| 2 | |||
| 3 | This binding follows the generic DMA bindings defined in dma.txt. | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - compatible: Should be "actions,s900-dma". | ||
| 7 | - reg: Should contain DMA registers location and length. | ||
| 8 | - interrupts: Should contain 4 interrupts shared by all channel. | ||
| 9 | - #dma-cells: Must be <1>. Used to represent the number of integer | ||
| 10 | cells in the dmas property of client device. | ||
| 11 | - dma-channels: Physical channels supported. | ||
| 12 | - dma-requests: Number of DMA request signals supported by the controller. | ||
| 13 | Refer to Documentation/devicetree/bindings/dma/dma.txt | ||
| 14 | - clocks: Phandle and Specifier of the clock feeding the DMA controller. | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | Controller: | ||
| 19 | dma: dma-controller@e0260000 { | ||
| 20 | compatible = "actions,s900-dma"; | ||
| 21 | reg = <0x0 0xe0260000 0x0 0x1000>; | ||
| 22 | interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | ||
| 23 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, | ||
| 24 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, | ||
| 25 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; | ||
| 26 | #dma-cells = <1>; | ||
| 27 | dma-channels = <12>; | ||
| 28 | dma-requests = <46>; | ||
| 29 | clocks = <&clock CLK_DMAC>; | ||
| 30 | }; | ||
| 31 | |||
| 32 | Client: | ||
| 33 | |||
| 34 | DMA clients connected to the Actions Semi Owl SoCs DMA controller must | ||
| 35 | use the format described in the dma.txt file, using a two-cell specifier | ||
| 36 | for each channel. | ||
| 37 | |||
| 38 | The two cells in order are: | ||
| 39 | 1. A phandle pointing to the DMA controller. | ||
| 40 | 2. The channel id. | ||
| 41 | |||
| 42 | uart5: serial@e012a000 { | ||
| 43 | ... | ||
| 44 | dma-names = "tx", "rx"; | ||
| 45 | dmas = <&dma 26>, <&dma 27>; | ||
| 46 | ... | ||
| 47 | }; | ||
| @@ -29,6 +29,7 @@ Required Properties: · 28 unmodified lines | |||
| 29 | - "renesas,dmac-r8a77965" (R-Car M3-N) | 29 | - "renesas,dmac-r8a77965" (R-Car M3-N) |
| 30 | - "renesas,dmac-r8a77970" (R-Car V3M) | 30 | - "renesas,dmac-r8a77970" (R-Car V3M) |
| 31 | - "renesas,dmac-r8a77980" (R-Car V3H) | 31 | - "renesas,dmac-r8a77980" (R-Car V3H) |
| 32 | - "renesas,dmac-r8a77990" (R-Car E3) | ||
| 32 | - "renesas,dmac-r8a77995" (R-Car D3) | 33 | - "renesas,dmac-r8a77995" (R-Car D3) |
| 33 | 34 | ||
| 34 | - reg: base address and length of the registers block for the DMAC | 35 | - reg: base address and length of the registers block for the DMAC |
| @@ -5,8 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: Address range of the DMAC registers. This should include | 5 | - reg: Address range of the DMAC registers. This should include |
| 6 | all of the per-channel registers. | 6 | all of the per-channel registers. |
| 7 | - interrupt: Should contain the DMAC interrupt number. | 7 | - interrupt: Should contain the DMAC interrupt number. |
| 8 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 9 | that services interrupts for this device. | ||
| 10 | - dma-channels: Number of channels supported by hardware. | 8 | - dma-channels: Number of channels supported by hardware. |
| 11 | - snps,dma-masters: Number of AXI masters supported by the hardware. | 9 | - snps,dma-masters: Number of AXI masters supported by the hardware. |
| 12 | - snps,data-width: Maximum AXI data width supported by hardware. | 10 | - snps,data-width: Maximum AXI data width supported by hardware. |
| @@ -23,8 +23,6 @@ Deprecated properties: · 22 unmodified lines | |||
| 23 | 23 | ||
| 24 | 24 | ||
| 25 | Optional properties: | 25 | Optional properties: |
| 26 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 27 | that services interrupts for this device | ||
| 28 | - is_private: The device channels should be marked as private and not for by the | 26 | - is_private: The device channels should be marked as private and not for by the |
| 29 | general purpose DMA channel allocator. False if not passed. | 27 | general purpose DMA channel allocator. False if not passed. |
| 30 | - multi-block: Multi block transfers supported by hardware. Array property with | 28 | - multi-block: Multi block transfers supported by hardware. Array property with |
| @@ -201,7 +201,6 @@ Required properties: · 200 unmodified lines | |||
| 201 | - #dma-cells: Should be set to <1> | 201 | - #dma-cells: Should be set to <1> |
| 202 | Clients should use a single channel number per DMA request. | 202 | Clients should use a single channel number per DMA request. |
| 203 | - reg: Memory map for accessing module | 203 | - reg: Memory map for accessing module |
| 204 | - interrupt-parent: Interrupt controller the interrupt is routed through | ||
| 205 | - interrupts: Exactly 3 interrupts need to be specified in the order: | 204 | - interrupts: Exactly 3 interrupts need to be specified in the order: |
| 206 | 1. Transfer completion interrupt. | 205 | 1. Transfer completion interrupt. |
| 207 | 2. Memory protection interrupt. | 206 | 2. Memory protection interrupt. |
| @@ -66,6 +66,8 @@ Optional child node properties: · 65 unmodified lines | |||
| 66 | Optional child node properties for VDMA: | 66 | Optional child node properties for VDMA: |
| 67 | - xlnx,genlock-mode: Tells Genlock synchronization is | 67 | - xlnx,genlock-mode: Tells Genlock synchronization is |
| 68 | enabled/disabled in hardware. | 68 | enabled/disabled in hardware. |
| 69 | - xlnx,enable-vert-flip: Tells vertical flip is | ||
| 70 | enabled/disabled in hardware(S2MM path). | ||
| 69 | Optional child node properties for AXI DMA: | 71 | Optional child node properties for AXI DMA: |
| 70 | -dma-channels: Number of dma channels in child node. | 72 | -dma-channels: Number of dma channels in child node. |
| 71 | 73 | ||
| @@ -5,7 +5,6 @@ control and rate control support for slave/peripheral dma access. · 4 unmodified lines | |||
| 5 | Required properties: | 5 | Required properties: |
| 6 | - compatible : Should be "xlnx,zynqmp-dma-1.0" | 6 | - compatible : Should be "xlnx,zynqmp-dma-1.0" |
| 7 | - reg : Memory map for gdma/adma module access. | 7 | - reg : Memory map for gdma/adma module access. |
| 8 | - interrupt-parent : Interrupt controller the interrupt is routed through | ||
| 9 | - interrupts : Should contain DMA channel interrupt. | 8 | - interrupts : Should contain DMA channel interrupt. |
| 10 | - xlnx,bus-width : Axi buswidth in bits. Should contain 128 or 64 | 9 | - xlnx,bus-width : Axi buswidth in bits. Should contain 128 or 64 |
| 11 | - clock-names : List of input clocks "clk_main", "clk_apb" | 10 | - clock-names : List of input clocks "clk_main", "clk_apb" |
| @@ -72,6 +72,8 @@ Optional properties: · 71 unmodified lines | |||
| 72 | 72 | ||
| 73 | - wp-gpios: GPIO to which the write-protect pin of the chip is connected. | 73 | - wp-gpios: GPIO to which the write-protect pin of the chip is connected. |
| 74 | 74 | ||
| 75 | - address-width: number of address bits (one of 8, 16). | ||
| 76 | |||
| 75 | Example: | 77 | Example: |
| 76 | 78 | ||
| 77 | eeprom@52 { | 79 | eeprom@52 { |
| @@ -11,8 +11,6 @@ for USB D-/D+ switching. · 10 unmodified lines | |||
| 11 | Required properties: | 11 | Required properties: |
| 12 | - compatible: Should be "richtek,rt8973a-muic" | 12 | - compatible: Should be "richtek,rt8973a-muic" |
| 13 | - reg: Specifies the I2C slave address of the MUIC block. It should be 0x14 | 13 | - reg: Specifies the I2C slave address of the MUIC block. It should be 0x14 |
| 14 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 15 | the interrupts from rt8973a are delivered to. | ||
| 16 | - interrupts: Interrupt specifiers for detection interrupt sources. | 14 | - interrupts: Interrupt specifiers for detection interrupt sources. |
| 17 | 15 | ||
| 18 | Example: | 16 | Example: |
| @@ -9,8 +9,6 @@ the host controller using an I2C interface. · 8 unmodified lines | |||
| 9 | Required properties: | 9 | Required properties: |
| 10 | - compatible: Should be "siliconmitus,sm5502-muic" | 10 | - compatible: Should be "siliconmitus,sm5502-muic" |
| 11 | - reg: Specifies the I2C slave address of the MUIC block. It should be 0x25 | 11 | - reg: Specifies the I2C slave address of the MUIC block. It should be 0x25 |
| 12 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 13 | the interrupts from sm5502 are delivered to. | ||
| 14 | - interrupts: Interrupt specifiers for detection interrupt sources. | 12 | - interrupts: Interrupt specifiers for detection interrupt sources. |
| 15 | 13 | ||
| 16 | Example: | 14 | Example: |
| @@ -0,0 +1,36 @@ | |||
| 1 | Device-tree bindings for ColdFire offloaded gpio-based FSI master driver | ||
| 2 | ------------------------------------------------------------------------ | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible = | ||
| 6 | "aspeed,ast2400-cf-fsi-master" for an AST2400 based system | ||
| 7 | or | ||
| 8 | "aspeed,ast2500-cf-fsi-master" for an AST2500 based system | ||
| 9 | |||
| 10 | - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock | ||
| 11 | - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal | ||
| 12 | - enable-gpios = <gpio-descriptor>; : GPIO for enable signal | ||
| 13 | - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable | ||
| 14 | - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other | ||
| 15 | functions (eg, external FSI masters) | ||
| 16 | - memory-region = <phandle>; : Reference to the reserved memory for | ||
| 17 | the ColdFire. Must be 2M aligned on | ||
| 18 | AST2400 and 1M aligned on AST2500 | ||
| 19 | - aspeed,sram = <phandle>; : Reference to the SRAM node. | ||
| 20 | - aspeed,cvic = <phandle>; : Reference to the CVIC node. | ||
| 21 | |||
| 22 | Examples: | ||
| 23 | |||
| 24 | fsi-master { | ||
| 25 | compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master"; | ||
| 26 | |||
| 27 | clock-gpios = <&gpio 0>; | ||
| 28 | data-gpios = <&gpio 1>; | ||
| 29 | enable-gpios = <&gpio 2>; | ||
| 30 | trans-gpios = <&gpio 3>; | ||
| 31 | mux-gpios = <&gpio 4>; | ||
| 32 | |||
| 33 | memory-region = <&coldfire_memory>; | ||
| 34 | aspeed,sram = <&sram>; | ||
| 35 | aspeed,cvic = <&cvic>; | ||
| 36 | } | ||
| @@ -83,6 +83,10 @@ addresses and sizes in the slave address space: · 82 unmodified lines | |||
| 83 | #address-cells = <1>; | 83 | #address-cells = <1>; |
| 84 | #size-cells = <1>; | 84 | #size-cells = <1>; |
| 85 | 85 | ||
| 86 | Optionally, a slave can provide a global unique chip ID which is used to | ||
| 87 | identify the physical location of the chip in a system specific way | ||
| 88 | |||
| 89 | chip-id = <0>; | ||
| 86 | 90 | ||
| 87 | FSI engines (devices) | 91 | FSI engines (devices) |
| 88 | --------------------- | 92 | --------------------- |
| @@ -125,6 +129,7 @@ device tree if no extra platform information is required. · 36 unmodified lines | |||
| 125 | reg = <0 0>; | 129 | reg = <0 0>; |
| 126 | #address-cells = <1>; | 130 | #address-cells = <1>; |
| 127 | #size-cells = <1>; | 131 | #size-cells = <1>; |
| 132 | chip-id = <0>; | ||
| 128 | 133 | ||
| 129 | /* FSI engine at 0xc00, using a single page. In this example, | 134 | /* FSI engine at 0xc00, using a single page. In this example, |
| 130 | * it's an I2C master controller, so subnodes describe the | 135 | * it's an I2C master controller, so subnodes describe the |
| @@ -0,0 +1,36 @@ | |||
| 1 | GNSS Receiver DT binding | ||
| 2 | |||
| 3 | This documents the binding structure and common properties for GNSS receiver | ||
| 4 | devices. | ||
| 5 | |||
| 6 | A GNSS receiver node is a node named "gnss" and typically resides on a serial | ||
| 7 | bus (e.g. UART, I2C or SPI). | ||
| 8 | |||
| 9 | Please refer to the following documents for generic properties: | ||
| 10 | |||
| 11 | Documentation/devicetree/bindings/serial/slave-device.txt | ||
| 12 | Documentation/devicetree/bindings/spi/spi-bus.txt | ||
| 13 | |||
| 14 | Required properties: | ||
| 15 | |||
| 16 | - compatible : A string reflecting the vendor and specific device the node | ||
| 17 | represents | ||
| 18 | |||
| 19 | Optional properties: | ||
| 20 | - enable-gpios : GPIO used to enable the device | ||
| 21 | - timepulse-gpios : Time pulse GPIO | ||
| 22 | |||
| 23 | Example: | ||
| 24 | |||
| 25 | serial@1234 { | ||
| 26 | compatible = "ns16550a"; | ||
| 27 | |||
| 28 | gnss { | ||
| 29 | compatible = "u-blox,neo-8"; | ||
| 30 | |||
| 31 | vcc-supply = <&gnss_reg>; | ||
| 32 | timepulse-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; | ||
| 33 | |||
| 34 | current-speed = <4800>; | ||
| 35 | }; | ||
| 36 | }; | ||
| @@ -0,0 +1,45 @@ | |||
| 1 | SiRFstar-based GNSS Receiver DT binding | ||
| 2 | |||
| 3 | SiRFstar chipsets are used in GNSS-receiver modules produced by several | ||
| 4 | vendors and can use UART, SPI or I2C interfaces. | ||
| 5 | |||
| 6 | Please see Documentation/devicetree/bindings/gnss/gnss.txt for generic | ||
| 7 | properties. | ||
| 8 | |||
| 9 | Required properties: | ||
| 10 | |||
| 11 | - compatible : Must be one of | ||
| 12 | |||
| 13 | "fastrax,uc430" | ||
| 14 | "linx,r4" | ||
| 15 | "wi2wi,w2sg0008i" | ||
| 16 | "wi2wi,w2sg0084i" | ||
| 17 | |||
| 18 | - vcc-supply : Main voltage regulator (pin name: 3V3_IN, VCC, VDD) | ||
| 19 | |||
| 20 | Required properties (I2C): | ||
| 21 | - reg : I2C slave address | ||
| 22 | |||
| 23 | Required properties (SPI): | ||
| 24 | - reg : SPI chip select address | ||
| 25 | |||
| 26 | Optional properties: | ||
| 27 | |||
| 28 | - sirf,onoff-gpios : GPIO used to power on and off device (pin name: ON_OFF) | ||
| 29 | - sirf,wakeup-gpios : GPIO used to determine device power state | ||
| 30 | (pin name: RFPWRUP, WAKEUP) | ||
| 31 | - timepulse-gpios : Time pulse GPIO (pin name: 1PPS, TM) | ||
| 32 | |||
| 33 | Example: | ||
| 34 | |||
| 35 | serial@1234 { | ||
| 36 | compatible = "ns16550a"; | ||
| 37 | |||
| 38 | gnss { | ||
| 39 | compatible = "wi2wi,w2sg0084i"; | ||
| 40 | |||
| 41 | vcc-supply = <&gnss_reg>; | ||
| 42 | sirf,onoff-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; | ||
| 43 | sirf,wakeup-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>; | ||
| 44 | }; | ||
| 45 | }; | ||
| @@ -0,0 +1,44 @@ | |||
| 1 | u-blox GNSS Receiver DT binding | ||
| 2 | |||
| 3 | The u-blox GNSS receivers can use UART, DDC (I2C), SPI and USB interfaces. | ||
| 4 | |||
| 5 | Please see Documentation/devicetree/bindings/gnss/gnss.txt for generic | ||
| 6 | properties. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | |||
| 10 | - compatible : Must be one of | ||
| 11 | |||
| 12 | "u-blox,neo-8" | ||
| 13 | "u-blox,neo-m8" | ||
| 14 | |||
| 15 | - vcc-supply : Main voltage regulator | ||
| 16 | |||
| 17 | Required properties (DDC): | ||
| 18 | - reg : DDC (I2C) slave address | ||
| 19 | |||
| 20 | Required properties (SPI): | ||
| 21 | - reg : SPI chip select address | ||
| 22 | |||
| 23 | Required properties (USB): | ||
| 24 | - reg : Number of the USB hub port or the USB host-controller port | ||
| 25 | to which this device is attached | ||
| 26 | |||
| 27 | Optional properties: | ||
| 28 | |||
| 29 | - timepulse-gpios : Time pulse GPIO | ||
| 30 | - u-blox,extint-gpios : GPIO connected to the "external interrupt" input pin | ||
| 31 | - v-bckp-supply : Backup voltage regulator | ||
| 32 | |||
| 33 | Example: | ||
| 34 | |||
| 35 | serial@1234 { | ||
| 36 | compatible = "ns16550a"; | ||
| 37 | |||
| 38 | gnss { | ||
| 39 | compatible = "u-blox,neo-8"; | ||
| 40 | |||
| 41 | v-bckp-supply = <&gnss_v_bckp_reg>; | ||
| 42 | vcc-supply = <&gnss_vcc_reg>; | ||
| 43 | }; | ||
| 44 | }; | ||
| @@ -25,8 +25,6 @@ Required properties: · 24 unmodified lines | |||
| 25 | - #gpio-cells: Should be two. The first cell is the pin number | 25 | - #gpio-cells: Should be two. The first cell is the pin number |
| 26 | and the second cell is used to specify optional | 26 | and the second cell is used to specify optional |
| 27 | parameters (currently unused). | 27 | parameters (currently unused). |
| 28 | - interrupt-parent: Phandle for the interrupt controller that | ||
| 29 | services interrupts for this device. | ||
| 30 | - interrupts: Interrupt mapping for GPIO IRQ. | 28 | - interrupts: Interrupt mapping for GPIO IRQ. |
| 31 | - gpio-controller: Marks the port as GPIO controller. | 29 | - gpio-controller: Marks the port as GPIO controller. |
| 32 | 30 | ||
| @@ -14,7 +14,6 @@ Optional Properties: · 13 unmodified lines | |||
| 14 | - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges. | 14 | - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges. |
| 15 | - interrupts: Defines the interrupt line connecting this GPIO controller to | 15 | - interrupts: Defines the interrupt line connecting this GPIO controller to |
| 16 | its parent interrupt controller. | 16 | its parent interrupt controller. |
| 17 | - interrupt-parent: Defines the parent interrupt controller. | ||
| 18 | 17 | ||
| 19 | GPIO ranges are specified as described in | 18 | GPIO ranges are specified as described in |
| 20 | Documentation/devicetree/bindings/gpio/gpio.txt | 19 | Documentation/devicetree/bindings/gpio/gpio.txt |
| @@ -30,9 +30,6 @@ Optional properties: · 29 unmodified lines | |||
| 30 | - interrupts: | 30 | - interrupts: |
| 31 | The interrupt shared by all GPIO lines for this controller. | 31 | The interrupt shared by all GPIO lines for this controller. |
| 32 | 32 | ||
| 33 | - interrupt-parent: | ||
| 34 | phandle of the parent interrupt controller | ||
| 35 | |||
| 36 | - interrupts-extended: | 33 | - interrupts-extended: |
| 37 | Alternate form of specifying interrupts and parents that allows for | 34 | Alternate form of specifying interrupts and parents that allows for |
| 38 | multiple parents. This takes precedence over 'interrupts' and | 35 | multiple parents. This takes precedence over 'interrupts' and |
| @@ -19,6 +19,9 @@ Required properties: · 18 unmodified lines | |||
| 19 | 4 = active high level-sensitive. | 19 | 4 = active high level-sensitive. |
| 20 | 8 = active low level-sensitive. | 20 | 8 = active low level-sensitive. |
| 21 | 21 | ||
| 22 | Optional properties: | ||
| 23 | - clocks: the clock for clocking the GPIO silicon | ||
| 24 | |||
| 22 | Example: | 25 | Example: |
| 23 | 26 | ||
| 24 | gpio0: gpio@73f84000 { | 27 | gpio0: gpio@73f84000 { |
| @@ -3,7 +3,6 @@ Avionic Design N-bit GPIO expander bindings · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: should be "ad,gpio-adnp" | 4 | - compatible: should be "ad,gpio-adnp" |
| 5 | - reg: The I2C slave address for this device. | 5 | - reg: The I2C slave address for this device. |
| 6 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 7 | - interrupts: Interrupt specifier for the controllers interrupt. | 6 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 8 | - #gpio-cells: Should be 2. The first cell is the GPIO number and the | 7 | - #gpio-cells: Should be 2. The first cell is the GPIO number and the |
| 9 | second cell is used to specify optional parameters: | 8 | second cell is used to specify optional parameters: |
| @@ -17,7 +17,6 @@ Required properties: · 16 unmodified lines | |||
| 17 | 17 | ||
| 18 | Optional properties: | 18 | Optional properties: |
| 19 | 19 | ||
| 20 | - interrupt-parent : The parent interrupt controller, optional if inherited | ||
| 21 | - clocks : A phandle to the clock to use for debounce timings | 20 | - clocks : A phandle to the clock to use for debounce timings |
| 22 | 21 | ||
| 23 | The gpio and interrupt properties are further described in their respective | 22 | The gpio and interrupt properties are further described in their respective |
| @@ -12,7 +12,6 @@ Required properties: · 11 unmodified lines | |||
| 12 | - ngpios: Should be set to the number of GPIOs available on the SoC. | 12 | - ngpios: Should be set to the number of GPIOs available on the SoC. |
| 13 | 13 | ||
| 14 | Optional properties: | 14 | Optional properties: |
| 15 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 16 | - interrupts: Interrupt specifier for the controllers interrupt. | 15 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 17 | - interrupt-controller : Identifies the node as an interrupt controller | 16 | - interrupt-controller : Identifies the node as an interrupt controller |
| 18 | - #interrupt-cells : Specifies the number of cells needed to encode interrupt | 17 | - #interrupt-cells : Specifies the number of cells needed to encode interrupt |
| @@ -15,8 +15,6 @@ Required Properties: · 14 unmodified lines | |||
| 15 | - first cell is the pin number | 15 | - first cell is the pin number |
| 16 | - second cell is used to specify optional parameters (unused) | 16 | - second cell is used to specify optional parameters (unused) |
| 17 | 17 | ||
| 18 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 19 | |||
| 20 | - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are | 18 | - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are |
| 21 | supported at a time. | 19 | supported at a time. |
| 22 | 20 | ||
| @@ -30,7 +30,6 @@ Optional properties: · 29 unmodified lines | |||
| 30 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. | 30 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. |
| 31 | - first cell is the pin number | 31 | - first cell is the pin number |
| 32 | - second cell is used to specify flags | 32 | - second cell is used to specify flags |
| 33 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 34 | - interrupts: Interrupt specifier for the controllers interrupt. | 33 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 35 | 34 | ||
| 36 | Please refer to gpio.txt in this directory for details of the common GPIO | 35 | Please refer to gpio.txt in this directory for details of the common GPIO |
| @@ -37,6 +37,7 @@ Required properties: · 36 unmodified lines | |||
| 37 | - #interrupt-cells: if to be used as interrupt expander. | 37 | - #interrupt-cells: if to be used as interrupt expander. |
| 38 | 38 | ||
| 39 | Optional properties: | 39 | Optional properties: |
| 40 | - interrupts: interrupt specifier for the device's interrupt output. | ||
| 40 | - reset-gpios: GPIO specification for the RESET input. This is an | 41 | - reset-gpios: GPIO specification for the RESET input. This is an |
| 41 | active low signal to the PCA953x. | 42 | active low signal to the PCA953x. |
| 42 | - vcc-supply: power supply regulator. | 43 | - vcc-supply: power supply regulator. |
| @@ -49,6 +50,8 @@ Example: · 6 unmodified lines | |||
| 49 | reg = <0x20>; | 50 | reg = <0x20>; |
| 50 | pinctrl-names = "default"; | 51 | pinctrl-names = "default"; |
| 51 | pinctrl-0 = <&pinctrl_pca9505>; | 52 | pinctrl-0 = <&pinctrl_pca9505>; |
| 53 | gpio-controller; | ||
| 54 | #gpio-cells = <2>; | ||
| 52 | interrupt-parent = <&gpio3>; | 55 | interrupt-parent = <&gpio3>; |
| 53 | interrupts = <23 IRQ_TYPE_LEVEL_LOW>; | 56 | interrupts = <23 IRQ_TYPE_LEVEL_LOW>; |
| 54 | }; | 57 | }; |
| @@ -49,7 +49,6 @@ Optional Properties: · 48 unmodified lines | |||
| 49 | 49 | ||
| 50 | - interrupt-controller: Identifies the node as an interrupt controller. | 50 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 51 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. | 51 | - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. |
| 52 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 53 | - interrupts: Interrupt specifier for the controllers interrupt. | 52 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 54 | 53 | ||
| 55 | 54 | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - gpio-controller: Marks the device node as a GPIO controller. | 6 | - gpio-controller: Marks the device node as a GPIO controller. |
| 7 | - #gpio-cells: Should be 2. The first cell is the pin number and the second | 7 | - #gpio-cells: Should be 2. The first cell is the pin number and the second |
| 8 | cell is used to specify optional parameters. | 8 | cell is used to specify optional parameters. |
| 9 | - interrupt-parent: Specifies the parent interrupt controller. | ||
| 10 | - interrupt-controller: Marks the device node as an interrupt controller. | 9 | - interrupt-controller: Marks the device node as an interrupt controller. |
| 11 | - #interrupt-cells: Should be 2. The first cell defines the interrupt number. | 10 | - #interrupt-cells: Should be 2. The first cell defines the interrupt number. |
| 12 | The second cell bits[3:0] is used to specify trigger type as follows: | 11 | The second cell bits[3:0] is used to specify trigger type as follows: |
| @@ -26,7 +26,6 @@ Required properties: · 25 unmodified lines | |||
| 26 | 1 = active low | 26 | 1 = active low |
| 27 | - gpio-controller: Marks the device node as a GPIO controller. | 27 | - gpio-controller: Marks the device node as a GPIO controller. |
| 28 | - interrupts: The EXT_INT_0 parent interrupt resource must be listed first. | 28 | - interrupts: The EXT_INT_0 parent interrupt resource must be listed first. |
| 29 | - interrupt-parent: Phandle of the parent interrupt controller. | ||
| 30 | - interrupt-cells: Should be two. | 29 | - interrupt-cells: Should be two. |
| 31 | - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N. | 30 | - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N. |
| 32 | - second cell is used to specify flags. | 31 | - second cell is used to specify flags. |
| @@ -14,8 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | 14 | ||
| 15 | Optional properties: | 15 | Optional properties: |
| 16 | - interrupts : Interrupt mapping for GPIO IRQ. | 16 | - interrupts : Interrupt mapping for GPIO IRQ. |
| 17 | - interrupt-parent : Phandle for the interrupt controller that | ||
| 18 | services interrupts for this device. | ||
| 19 | - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input | 17 | - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input |
| 20 | - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 | 18 | - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 |
| 21 | - xlnx,gpio-width : gpio width | 19 | - xlnx,gpio-width : gpio width |
| @@ -30,7 +30,6 @@ Required properties: · 29 unmodified lines | |||
| 30 | 4 = active high level-sensitive. | 30 | 4 = active high level-sensitive. |
| 31 | 8 = active low level-sensitive. | 31 | 8 = active low level-sensitive. |
| 32 | - interrupts: Interrupt number for this device. | 32 | - interrupts: Interrupt number for this device. |
| 33 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 34 | - interrupt-controller: Identifies the node as an interrupt controller. | 33 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 35 | 34 | ||
| 36 | Example: | 35 | Example: |
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | - gpio-controller : Marks the device node as a GPIO controller. | 11 | - gpio-controller : Marks the device node as a GPIO controller. |
| 12 | - interrupts : Interrupt specifier (see interrupt bindings for | 12 | - interrupts : Interrupt specifier (see interrupt bindings for |
| 13 | details) | 13 | details) |
| 14 | - interrupt-parent : Must be core interrupt controller | ||
| 15 | - interrupt-controller : Marks the device node as an interrupt controller. | 14 | - interrupt-controller : Marks the device node as an interrupt controller. |
| 16 | - #interrupt-cells : Should be 2. The first cell is the GPIO number. | 15 | - #interrupt-cells : Should be 2. The first cell is the GPIO number. |
| 17 | The second cell bits[3:0] is used to specify trigger type and level flags: | 16 | The second cell bits[3:0] is used to specify trigger type and level flags: |
| @@ -0,0 +1,35 @@ | |||
| 1 | Mediatek MT7621 SoC GPIO controller bindings | ||
| 2 | |||
| 3 | The IP core used inside these SoCs has 3 banks of 32 GPIOs each. | ||
| 4 | The registers of all the banks are interwoven inside one single IO range. | ||
| 5 | We load one GPIO controller instance per bank. Also the GPIO controller can receive | ||
| 6 | interrupts on any of the GPIOs, either edge or level. It then interrupts the CPU | ||
| 7 | using GIC INT12. | ||
| 8 | |||
| 9 | Required properties for the top level node: | ||
| 10 | - #gpio-cells : Should be two. The first cell is the GPIO pin number and the | ||
| 11 | second cell specifies GPIO flags, as defined in <dt-bindings/gpio/gpio.h>. | ||
| 12 | Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. | ||
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode an | ||
| 14 | interrupt. Should be 2. The first cell defines the interrupt number, | ||
| 15 | the second encodes the triger flags encoded as described in | ||
| 16 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | ||
| 17 | - compatible: | ||
| 18 | - "mediatek,mt7621-gpio" for Mediatek controllers | ||
| 19 | - reg : Physical base address and length of the controller's registers | ||
| 20 | - interrupt-parent : phandle of the parent interrupt controller. | ||
| 21 | - interrupts : Interrupt specifier for the controllers interrupt. | ||
| 22 | - interrupt-controller : Mark the device node as an interrupt controller. | ||
| 23 | - gpio-controller : Marks the device node as a GPIO controller. | ||
| 24 | |||
| 25 | Example: | ||
| 26 | gpio@600 { | ||
| 27 | #gpio-cells = <2>; | ||
| 28 | #interrupt-cells = <2>; | ||
| 29 | compatible = "mediatek,mt7621-gpio"; | ||
| 30 | gpio-controller; | ||
| 31 | interrupt-controller; | ||
| 32 | reg = <0x600 0x100>; | ||
| 33 | interrupt-parent = <&gic>; | ||
| 34 | interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>; | ||
| 35 | }; | ||
| @@ -1,7 +1,7 @@ | |||
| 1 | Nintendo Wii (Hollywood) GPIO controller | 1 | Nintendo Wii (Hollywood) GPIO controller |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "nintendo,hollywood-gpio | 4 | - compatible: "nintendo,hollywood-gpio" |
| 5 | - reg: Physical base address and length of the controller's registers. | 5 | - reg: Physical base address and length of the controller's registers. |
| 6 | - gpio-controller: Marks the device node as a GPIO controller. | 6 | - gpio-controller: Marks the device node as a GPIO controller. |
| 7 | - #gpio-cells: Should be <2>. The first cell is the pin number and the | 7 | - #gpio-cells: Should be <2>. The first cell is the pin number and the |
| @@ -14,7 +14,6 @@ Optional properties: · 6 unmodified lines | |||
| 14 | - #interrupt-cells: Should be two. | 14 | - #interrupt-cells: Should be two. |
| 15 | - interrupts: Interrupt specifier for the controller's Broadway (PowerPC) | 15 | - interrupts: Interrupt specifier for the controller's Broadway (PowerPC) |
| 16 | interrupt. | 16 | interrupt. |
| 17 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 18 | 17 | ||
| 19 | Example: | 18 | Example: |
| 20 | 19 | ||
| @@ -68,6 +68,8 @@ Required properties: · 67 unmodified lines | |||
| 68 | One of: | 68 | One of: |
| 69 | - "nvidia,tegra186-gpio". | 69 | - "nvidia,tegra186-gpio". |
| 70 | - "nvidia,tegra186-gpio-aon". | 70 | - "nvidia,tegra186-gpio-aon". |
| 71 | - "nvidia,tegra194-gpio". | ||
| 72 | - "nvidia,tegra194-gpio-aon". | ||
| 71 | - reg-names | 73 | - reg-names |
| 72 | Array of strings. | 74 | Array of strings. |
| 73 | Contains a list of names for the register spaces described by the reg | 75 | Contains a list of names for the register spaces described by the reg |
| @@ -91,6 +93,8 @@ Required properties: · 17 unmodified lines | |||
| 91 | depending on compatible value: | 93 | depending on compatible value: |
| 92 | - "nvidia,tegra186-gpio": 6 entries. | 94 | - "nvidia,tegra186-gpio": 6 entries. |
| 93 | - "nvidia,tegra186-gpio-aon": 1 entry. | 95 | - "nvidia,tegra186-gpio-aon": 1 entry. |
| 96 | - "nvidia,tegra194-gpio": 6 entries. | ||
| 97 | - "nvidia,tegra194-gpio-aon": 1 entry. | ||
| 94 | - gpio-controller | 98 | - gpio-controller |
| 95 | Boolean. | 99 | Boolean. |
| 96 | Marks the device node as a GPIO controller/provider. | 100 | Marks the device node as a GPIO controller/provider. |
| @@ -17,6 +17,7 @@ Required Properties: · 16 unmodified lines | |||
| 17 | - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller. | 17 | - "renesas,gpio-r8a7796": for R8A7796 (R-Car M3-W) compatible GPIO controller. |
| 18 | - "renesas,gpio-r8a77965": for R8A77965 (R-Car M3-N) compatible GPIO controller. | 18 | - "renesas,gpio-r8a77965": for R8A77965 (R-Car M3-N) compatible GPIO controller. |
| 19 | - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller. | 19 | - "renesas,gpio-r8a77970": for R8A77970 (R-Car V3M) compatible GPIO controller. |
| 20 | - "renesas,gpio-r8a77980": for R8A77980 (R-Car V3H) compatible GPIO controller. | ||
| 20 | - "renesas,gpio-r8a77990": for R8A77990 (R-Car E3) compatible GPIO controller. | 21 | - "renesas,gpio-r8a77990": for R8A77990 (R-Car E3) compatible GPIO controller. |
| 21 | - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller. | 22 | - "renesas,gpio-r8a77995": for R8A77995 (R-Car D3) compatible GPIO controller. |
| 22 | - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller. | 23 | - "renesas,rcar-gen1-gpio": for a generic R-Car Gen1 GPIO controller. |
| @@ -31,7 +32,6 @@ Required Properties: · 8 unmodified lines | |||
| 31 | - reg: Base address and length of each memory resource used by the GPIO | 32 | - reg: Base address and length of each memory resource used by the GPIO |
| 32 | controller hardware module. | 33 | controller hardware module. |
| 33 | 34 | ||
| 34 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 35 | - interrupts: Interrupt specifier for the controllers interrupt. | 35 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 36 | 36 | ||
| 37 | - gpio-controller: Marks the device node as a gpio controller. | 37 | - gpio-controller: Marks the device node as a gpio controller. |
| @@ -0,0 +1,32 @@ | |||
| 1 | Rockchip RK3328 GRF (General Register Files) GPIO controller. | ||
| 2 | |||
| 3 | In Rockchip RK3328, the output only GPIO_MUTE pin, originally for codec mute | ||
| 4 | control, can also be used for general purpose. It is manipulated by the | ||
| 5 | GRF_SOC_CON10 register in GRF. Aside from the GPIO_MUTE pin, the HDMI pins can | ||
| 6 | also be set in the same way. | ||
| 7 | |||
| 8 | Currently this GPIO controller only supports the mute pin. If needed in the | ||
| 9 | future, the HDMI pins support can also be added. | ||
| 10 | |||
| 11 | Required properties: | ||
| 12 | - compatible: Should contain "rockchip,rk3328-grf-gpio". | ||
| 13 | - gpio-controller: Marks the device node as a gpio controller. | ||
| 14 | - #gpio-cells: Should be 2. The first cell is the pin number and | ||
| 15 | the second cell is used to specify the gpio polarity: | ||
| 16 | 0 = Active high, | ||
| 17 | 1 = Active low. | ||
| 18 | |||
| 19 | Example: | ||
| 20 | |||
| 21 | grf: syscon@ff100000 { | ||
| 22 | compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; | ||
| 23 | |||
| 24 | grf_gpio: grf-gpio { | ||
| 25 | compatible = "rockchip,rk3328-grf-gpio"; | ||
| 26 | gpio-controller; | ||
| 27 | #gpio-cells = <2>; | ||
| 28 | }; | ||
| 29 | }; | ||
| 30 | |||
| 31 | Note: The grf_gpio node should be declared as the child of the GRF (General | ||
| 32 | Register File) node. The GPIO_MUTE pin is referred to as <&grf_gpio 0>. | ||
| @@ -25,7 +25,6 @@ controller. · 24 unmodified lines | |||
| 25 | interrupt. Shall be set to 2. The first cell defines the interrupt number, | 25 | interrupt. Shall be set to 2. The first cell defines the interrupt number, |
| 26 | the second encodes the triger flags encoded as described in | 26 | the second encodes the triger flags encoded as described in |
| 27 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 27 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 28 | - interrupt-parent : The parent interrupt controller. | ||
| 29 | - interrupts : The interrupts to the parent controller raised when GPIOs | 28 | - interrupts : The interrupts to the parent controller raised when GPIOs |
| 30 | generate the interrupts. If the controller provides one combined interrupt | 29 | generate the interrupts. If the controller provides one combined interrupt |
| 31 | for all GPIOs, specify a single interrupt. If the controller provides one | 30 | for all GPIOs, specify a single interrupt. If the controller provides one |
| @@ -33,7 +33,6 @@ Required Port sub-node properties: · 32 unmodified lines | |||
| 33 | - reg-names: Contains the values "tx" and "rx" (in this order). | 33 | - reg-names: Contains the values "tx" and "rx" (in this order). |
| 34 | - reg: Contains a matching register specifier for each entry | 34 | - reg: Contains a matching register specifier for each entry |
| 35 | in reg-names. | 35 | in reg-names. |
| 36 | - interrupt-parent Should be a phandle for the interrupt controller | ||
| 37 | - interrupts: Should contain interrupt specifiers for mpu interrupts | 36 | - interrupts: Should contain interrupt specifiers for mpu interrupts |
| 38 | 0 and 1 (in this order). | 37 | 0 and 1 (in this order). |
| 39 | - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE | 38 | - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE |
| @@ -0,0 +1,84 @@ | |||
| 1 | Nuvoton NPCM7xx PWM and Fan Tacho controller device | ||
| 2 | |||
| 3 | The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) | ||
| 4 | controller outputs and 16 Fan tachometer controller inputs. | ||
| 5 | |||
| 6 | Required properties for pwm-fan node | ||
| 7 | - #address-cells : should be 1. | ||
| 8 | - #size-cells : should be 0. | ||
| 9 | - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. | ||
| 10 | - reg : specifies physical base address and size of the registers. | ||
| 11 | - reg-names : must contain: | ||
| 12 | * "pwm" for the PWM registers. | ||
| 13 | * "fan" for the Fan registers. | ||
| 14 | - clocks : phandle of reference clocks. | ||
| 15 | - clock-names : must contain | ||
| 16 | * "pwm" for PWM controller operating clock. | ||
| 17 | * "fan" for Fan controller operating clock. | ||
| 18 | - interrupts : contain the Fan interrupts with flags for falling edge. | ||
| 19 | - pinctrl-names : a pinctrl state named "default" must be defined. | ||
| 20 | - pinctrl-0 : phandle referencing pin configuration of the PWM and Fan | ||
| 21 | controller ports. | ||
| 22 | |||
| 23 | fan subnode format: | ||
| 24 | =================== | ||
| 25 | Under fan subnode can be upto 8 child nodes, each child node representing a fan. | ||
| 26 | Each fan subnode must have one PWM channel and atleast one Fan tach channel. | ||
| 27 | |||
| 28 | For PWM channel can be configured cooling-levels to create cooling device. | ||
| 29 | Cooling device could be bound to a thermal zone for the thermal control. | ||
| 30 | |||
| 31 | Required properties for each child node: | ||
| 32 | - reg : specify the PWM output channel. | ||
| 33 | integer value in the range 0 through 7, that represent | ||
| 34 | the PWM channel number that used. | ||
| 35 | |||
| 36 | - fan-tach-ch : specify the Fan tach input channel. | ||
| 37 | integer value in the range 0 through 15, that represent | ||
| 38 | the fan tach channel number that used. | ||
| 39 | |||
| 40 | At least one Fan tach input channel is required | ||
| 41 | |||
| 42 | Optional property for each child node: | ||
| 43 | - cooling-levels: PWM duty cycle values in a range from 0 to 255 | ||
| 44 | which correspond to thermal cooling states. | ||
| 45 | |||
| 46 | Examples: | ||
| 47 | |||
| 48 | pwm_fan:pwm-fan-controller@103000 { | ||
| 49 | #address-cells = <1>; | ||
| 50 | #size-cells = <0>; | ||
| 51 | compatible = "nuvoton,npcm750-pwm-fan"; | ||
| 52 | reg = <0x103000 0x2000>, | ||
| 53 | <0x180000 0x8000>; | ||
| 54 | reg-names = "pwm", "fan"; | ||
| 55 | clocks = <&clk NPCM7XX_CLK_APB3>, | ||
| 56 | <&clk NPCM7XX_CLK_APB4>; | ||
| 57 | clock-names = "pwm","fan"; | ||
| 58 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, | ||
| 59 | <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, | ||
| 60 | <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, | ||
| 61 | <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, | ||
| 62 | <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, | ||
| 63 | <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, | ||
| 64 | <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, | ||
| 65 | <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | ||
| 66 | pinctrl-names = "default"; | ||
| 67 | pinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins | ||
| 68 | &fanin0_pins &fanin1_pins &fanin2_pins | ||
| 69 | &fanin3_pins &fanin4_pins>; | ||
| 70 | fan@0 { | ||
| 71 | reg = <0x00>; | ||
| 72 | fan-tach-ch = /bits/ 8 <0x00 0x01>; | ||
| 73 | cooling-levels = <127 255>; | ||
| 74 | }; | ||
| 75 | fan@1 { | ||
| 76 | reg = <0x01>; | ||
| 77 | fan-tach-ch = /bits/ 8 <0x02 0x03>; | ||
| 78 | }; | ||
| 79 | fan@2 { | ||
| 80 | reg = <0x02>; | ||
| 81 | fan-tach-ch = /bits/ 8 <0x04>; | ||
| 82 | }; | ||
| 83 | |||
| 84 | }; | ||
| @@ -11,9 +11,6 @@ Required Properties: · 10 unmodified lines | |||
| 11 | - resets : phandle to reset controller with the reset number in | 11 | - resets : phandle to reset controller with the reset number in |
| 12 | the second cell | 12 | the second cell |
| 13 | - interrupts : interrupt number | 13 | - interrupts : interrupt number |
| 14 | - interrupt-parent : interrupt controller for bus, should reference a | ||
| 15 | aspeed,ast2400-i2c-ic or aspeed,ast2500-i2c-ic | ||
| 16 | interrupt controller | ||
| 17 | 14 | ||
| 18 | Optional Properties: | 15 | Optional Properties: |
| 19 | - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not | 16 | - bus-frequency : frequency of the bus clock in Hz defaults to 100 kHz when not |
| @@ -10,8 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Optional properties : | 11 | Optional properties : |
| 12 | 12 | ||
| 13 | - interrupt-parent: specifies the phandle to the parent interrupt controller | ||
| 14 | this one is cascaded from | ||
| 15 | - interrupts: specifies the interrupt number, the irq line to be used | 13 | - interrupts: specifies the interrupt number, the irq line to be used |
| 16 | - interrupt-names: Interrupt name string | 14 | - interrupt-names: Interrupt name string |
| 17 | 15 | ||
| @@ -0,0 +1,40 @@ | |||
| 1 | Device-tree bindings for FSI-attached I2C master and busses | ||
| 2 | ----------------------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible = "ibm,i2c-fsi"; | ||
| 6 | - reg = < address size >; : The FSI CFAM address and address | ||
| 7 | space size. | ||
| 8 | - #address-cells = <1>; : Number of address cells in child | ||
| 9 | nodes. | ||
| 10 | - #size-cells = <0>; : Number of size cells in child nodes. | ||
| 11 | - child nodes : Nodes to describe busses off the I2C | ||
| 12 | master. | ||
| 13 | |||
| 14 | Child node required properties: | ||
| 15 | - reg = < port number > : The port number on the I2C master. | ||
| 16 | |||
| 17 | Child node optional properties: | ||
| 18 | - child nodes : Nodes to describe devices on the I2C | ||
| 19 | bus. | ||
| 20 | |||
| 21 | Examples: | ||
| 22 | |||
| 23 | i2c@1800 { | ||
| 24 | compatible = "ibm,i2c-fsi"; | ||
| 25 | reg = < 0x1800 0x400 >; | ||
| 26 | #address-cells = <1>; | ||
| 27 | #size-cells = <0>; | ||
| 28 | |||
| 29 | i2c-bus@0 { | ||
| 30 | reg = <0>; | ||
| 31 | }; | ||
| 32 | |||
| 33 | i2c-bus@1 { | ||
| 34 | reg = <1>; | ||
| 35 | |||
| 36 | eeprom@50 { | ||
| 37 | compatible = "vendor,dev-name"; | ||
| 38 | }; | ||
| 39 | }; | ||
| 40 | }; | ||
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc | 5 | - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc |
| 6 | - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc | 6 | - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc |
| 7 | - reg : address and length of the lpi2c master registers | 7 | - reg : address and length of the lpi2c master registers |
| 8 | - interrupt-parent : core interrupt controller | ||
| 9 | - interrupts : lpi2c interrupt | 8 | - interrupts : lpi2c interrupt |
| 10 | - clocks : lpi2c clock specifier | 9 | - clocks : lpi2c clock specifier |
| 11 | 10 | ||
| @@ -11,10 +11,6 @@ Recommended properties: · 10 unmodified lines | |||
| 11 | - pinctrl-names: should be "default"; | 11 | - pinctrl-names: should be "default"; |
| 12 | - pinctrl-0: phandle to pinctrl function | 12 | - pinctrl-0: phandle to pinctrl function |
| 13 | 13 | ||
| 14 | Optional properties: | ||
| 15 | - interrupt-parent: Should be the phandle of the interrupt controller that | ||
| 16 | delivers interrupts to the I2C block. | ||
| 17 | |||
| 18 | Example | 14 | Example |
| 19 | 15 | ||
| 20 | / { | 16 | / { |
| @@ -15,8 +15,6 @@ Recommended properties : · 14 unmodified lines | |||
| 15 | information for the interrupt. This should be encoded based on | 15 | information for the interrupt. This should be encoded based on |
| 16 | the information in section 2) depending on the type of interrupt | 16 | the information in section 2) depending on the type of interrupt |
| 17 | controller you have. | 17 | controller you have. |
| 18 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 19 | services interrupts for this device. | ||
| 20 | - fsl,preserve-clocking : boolean; if defined, the clock settings | 18 | - fsl,preserve-clocking : boolean; if defined, the clock settings |
| 21 | from the bootloader are preserved (not touched). | 19 | from the bootloader are preserved (not touched). |
| 22 | - clock-frequency : desired I2C bus clock frequency in Hz. | 20 | - clock-frequency : desired I2C bus clock frequency in Hz. |
| @@ -28,8 +28,6 @@ Optional Properties: · 27 unmodified lines | |||
| 28 | - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all | 28 | - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all |
| 29 | children in idle state. This is necessary for example, if there are several | 29 | children in idle state. This is necessary for example, if there are several |
| 30 | multiplexers on the bus and the devices behind them use same I2C addresses. | 30 | multiplexers on the bus and the devices behind them use same I2C addresses. |
| 31 | - interrupt-parent: Phandle for the interrupt controller that services | ||
| 32 | interrupts for this device. | ||
| 33 | - interrupts: Interrupt mapping for IRQ. | 31 | - interrupts: Interrupt mapping for IRQ. |
| 34 | - interrupt-controller: Marks the device node as an interrupt controller. | 32 | - interrupt-controller: Marks the device node as an interrupt controller. |
| 35 | - #interrupt-cells : Should be two. | 33 | - #interrupt-cells : Should be two. |
| @@ -0,0 +1,27 @@ | |||
| 1 | Actions Semiconductor Owl I2C controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : Should be "actions,s900-i2c". | ||
| 6 | - reg : Offset and length of the register set for the device. | ||
| 7 | - #address-cells : Should be 1. | ||
| 8 | - #size-cells : Should be 0. | ||
| 9 | - interrupts : A single interrupt specifier. | ||
| 10 | - clocks : Phandle of the clock feeding the I2C controller. | ||
| 11 | |||
| 12 | Optional properties: | ||
| 13 | |||
| 14 | - clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and | ||
| 15 | Fast modes are supported, possible values are 100000 and | ||
| 16 | 400000. | ||
| 17 | Examples: | ||
| 18 | |||
| 19 | i2c0: i2c@e0170000 { | ||
| 20 | compatible = "actions,s900-i2c"; | ||
| 21 | reg = <0 0xe0170000 0 0x1000>; | ||
| 22 | #address-cells = <1>; | ||
| 23 | #size-cells = <0>; | ||
| 24 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; | ||
| 25 | clocks = <&clock CLK_I2C0>; | ||
| 26 | clock-frequency = <100000>; | ||
| 27 | }; | ||
| @@ -12,8 +12,6 @@ Required properties : · 11 unmodified lines | |||
| 12 | 12 | ||
| 13 | Optional properties | 13 | Optional properties |
| 14 | - interrupts : the interrupt number | 14 | - interrupts : the interrupt number |
| 15 | - interrupt-parent : the phandle for the interrupt controller. | ||
| 16 | If an interrupt is not specified polling will be used. | ||
| 17 | - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line | 15 | - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line |
| 18 | is active low, it should be marked GPIO_ACTIVE_LOW. | 16 | is active low, it should be marked GPIO_ACTIVE_LOW. |
| 19 | - clock-frequency : I2C bus frequency. | 17 | - clock-frequency : I2C bus frequency. |
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - interrupts: configure one interrupt line | 7 | - interrupts: configure one interrupt line |
| 8 | - #address-cells: always 1 (for i2c addresses) | 8 | - #address-cells: always 1 (for i2c addresses) |
| 9 | - #size-cells: always 0 | 9 | - #size-cells: always 0 |
| 10 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 11 | services interrupts for this device. | ||
| 12 | 10 | ||
| 13 | Optional properties: | 11 | Optional properties: |
| 14 | 12 | ||
| @@ -12,9 +12,6 @@ Required properties : · 11 unmodified lines | |||
| 12 | Recommended properties : | 12 | Recommended properties : |
| 13 | 13 | ||
| 14 | - interrupts : the interrupt number | 14 | - interrupts : the interrupt number |
| 15 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 16 | services interrupts for this device. If the parent is the default | ||
| 17 | interrupt controller in device tree, it could be ignored. | ||
| 18 | - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling | 15 | - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling |
| 19 | status register of i2c controller instead. | 16 | status register of i2c controller instead. |
| 20 | - mrvl,i2c-fast-mode : Enable fast mode of i2c controller. | 17 | - mrvl,i2c-fast-mode : Enable fast mode of i2c controller. |
| @@ -4,6 +4,7 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: | 4 | - compatible: |
| 5 | "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC. | 5 | "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC. |
| 6 | "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC. | 6 | "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC. |
| 7 | "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC. | ||
| 7 | "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC. | 8 | "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC. |
| 8 | "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC. | 9 | "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC. |
| 9 | "renesas,i2c-r8a7790" if the device is a part of a R8A7790 SoC. | 10 | "renesas,i2c-r8a7790" if the device is a part of a R8A7790 SoC. |
| @@ -16,11 +17,13 @@ Required properties: · 6 unmodified lines | |||
| 16 | "renesas,i2c-r8a77965" if the device is a part of a R8A77965 SoC. | 17 | "renesas,i2c-r8a77965" if the device is a part of a R8A77965 SoC. |
| 17 | "renesas,i2c-r8a77970" if the device is a part of a R8A77970 SoC. | 18 | "renesas,i2c-r8a77970" if the device is a part of a R8A77970 SoC. |
| 18 | "renesas,i2c-r8a77980" if the device is a part of a R8A77980 SoC. | 19 | "renesas,i2c-r8a77980" if the device is a part of a R8A77980 SoC. |
| 20 | "renesas,i2c-r8a77990" if the device is a part of a R8A77990 SoC. | ||
| 19 | "renesas,i2c-r8a77995" if the device is a part of a R8A77995 SoC. | 21 | "renesas,i2c-r8a77995" if the device is a part of a R8A77995 SoC. |
| 20 | "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device. | 22 | "renesas,rcar-gen1-i2c" for a generic R-Car Gen1 compatible device. |
| 21 | "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible | 23 | "renesas,rcar-gen2-i2c" for a generic R-Car Gen2 or RZ/G1 compatible |
| 22 | device. | 24 | device. |
| 23 | "renesas,rcar-gen3-i2c" for a generic R-Car Gen3 compatible device. | 25 | "renesas,rcar-gen3-i2c" for a generic R-Car Gen3 or RZ/G2 compatible |
| 26 | device. | ||
| 24 | "renesas,i2c-rcar" (deprecated) | 27 | "renesas,i2c-rcar" (deprecated) |
| 25 | 28 | ||
| 26 | When compatible with the generic version, nodes must list the | 29 | When compatible with the generic version, nodes must list the |
| @@ -6,6 +6,7 @@ Required properties: · 5 unmodified lines | |||
| 6 | - "renesas,iic-r8a7740" (R-Mobile A1) | 6 | - "renesas,iic-r8a7740" (R-Mobile A1) |
| 7 | - "renesas,iic-r8a7743" (RZ/G1M) | 7 | - "renesas,iic-r8a7743" (RZ/G1M) |
| 8 | - "renesas,iic-r8a7745" (RZ/G1E) | 8 | - "renesas,iic-r8a7745" (RZ/G1E) |
| 9 | - "renesas,iic-r8a774a1" (RZ/G2M) | ||
| 9 | - "renesas,iic-r8a7790" (R-Car H2) | 10 | - "renesas,iic-r8a7790" (R-Car H2) |
| 10 | - "renesas,iic-r8a7791" (R-Car M2-W) | 11 | - "renesas,iic-r8a7791" (R-Car M2-W) |
| 11 | - "renesas,iic-r8a7792" (R-Car V2H) | 12 | - "renesas,iic-r8a7792" (R-Car V2H) |
| @@ -17,7 +18,8 @@ Required properties: · 5 unmodified lines | |||
| 17 | - "renesas,iic-sh73a0" (SH-Mobile AG5) | 18 | - "renesas,iic-sh73a0" (SH-Mobile AG5) |
| 18 | - "renesas,rcar-gen2-iic" (generic R-Car Gen2 or RZ/G1 | 19 | - "renesas,rcar-gen2-iic" (generic R-Car Gen2 or RZ/G1 |
| 19 | compatible device) | 20 | compatible device) |
| 20 | - "renesas,rcar-gen3-iic" (generic R-Car Gen3 compatible device) | 21 | - "renesas,rcar-gen3-iic" (generic R-Car Gen3 or RZ/G2 |
| 22 | compatible device) | ||
| 21 | - "renesas,rmobile-iic" (generic device) | 23 | - "renesas,rmobile-iic" (generic device) |
| 22 | 24 | ||
| 23 | When compatible with a generic R-Car version, nodes | 25 | When compatible with a generic R-Car version, nodes |
| @@ -1,9 +1,12 @@ | |||
| 1 | Analog Devices ADXL345 3-Axis, +/-(2g/4g/8g/16g) Digital Accelerometer | 1 | Analog Devices ADXL345/ADXL375 3-Axis Digital Accelerometers |
| 2 | 2 | ||
| 3 | http://www.analog.com/en/products/mems/accelerometers/adxl345.html | 3 | http://www.analog.com/en/products/mems/accelerometers/adxl345.html |
| 4 | http://www.analog.com/en/products/sensors-mems/accelerometers/adxl375.html | ||
| 4 | 5 | ||
| 5 | Required properties: | 6 | Required properties: |
| 6 | - compatible : should be "adi,adxl345" | 7 | - compatible : should be one of |
| 8 | "adi,adxl345" | ||
| 9 | "adi,adxl375" | ||
| 7 | - reg : the I2C address or SPI chip select number of the sensor | 10 | - reg : the I2C address or SPI chip select number of the sensor |
| 8 | 11 | ||
| 9 | Required properties for SPI bus usage: | 12 | Required properties for SPI bus usage: |
| @@ -11,8 +14,6 @@ Required properties for SPI bus usage: · 1 unmodified line | |||
| 11 | - spi-cpol and spi-cpha : must be defined for adxl345 to enable SPI mode 3 | 14 | - spi-cpol and spi-cpha : must be defined for adxl345 to enable SPI mode 3 |
| 12 | 15 | ||
| 13 | Optional properties: | 16 | Optional properties: |
| 14 | - interrupt-parent : phandle to the parent interrupt controller as documented | ||
| 15 | in Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | ||
| 16 | - interrupts: interrupt mapping for IRQ as documented in | 17 | - interrupts: interrupt mapping for IRQ as documented in |
| 17 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 18 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 18 | 19 | ||
| @@ -10,8 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | 12 | ||
| 13 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 14 | |||
| 15 | - interrupts : interrupt mapping for GPIO IRQ, it should by configured with | 13 | - interrupts : interrupt mapping for GPIO IRQ, it should by configured with |
| 16 | flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING | 14 | flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING |
| 17 | For the bma250 the first interrupt listed must be the one | 15 | For the bma250 the first interrupt listed must be the one |
| @@ -15,8 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | 15 | ||
| 16 | Optional properties: | 16 | Optional properties: |
| 17 | 17 | ||
| 18 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 19 | |||
| 20 | - interrupts: interrupt mapping for GPIO IRQ | 18 | - interrupts: interrupt mapping for GPIO IRQ |
| 21 | 19 | ||
| 22 | - interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's | 20 | - interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's |
| @@ -4,6 +4,7 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: depending on the SoC this should be one of: | 4 | - compatible: depending on the SoC this should be one of: |
| 5 | - "amlogic,meson8-saradc" for Meson8 | 5 | - "amlogic,meson8-saradc" for Meson8 |
| 6 | - "amlogic,meson8b-saradc" for Meson8b | 6 | - "amlogic,meson8b-saradc" for Meson8b |
| 7 | - "amlogic,meson8m2-saradc" for Meson8m2 | ||
| 7 | - "amlogic,meson-gxbb-saradc" for GXBB | 8 | - "amlogic,meson-gxbb-saradc" for GXBB |
| 8 | - "amlogic,meson-gxl-saradc" for GXL | 9 | - "amlogic,meson-gxl-saradc" for GXL |
| 9 | - "amlogic,meson-gxm-saradc" for GXM | 10 | - "amlogic,meson-gxm-saradc" for GXM |
| @@ -21,6 +21,14 @@ Optional properties: · 20 unmodified lines | |||
| 21 | - dmas: Phandle to dma channel for the ADC. | 21 | - dmas: Phandle to dma channel for the ADC. |
| 22 | - dma-names: Must be "rx" when dmas property is being used. | 22 | - dma-names: Must be "rx" when dmas property is being used. |
| 23 | See ../../dma/dma.txt for details. | 23 | See ../../dma/dma.txt for details. |
| 24 | - #io-channel-cells: in case consumer drivers are attached, this must be 1. | ||
| 25 | See <Documentation/devicetree/bindings/iio/iio-bindings.txt> for details. | ||
| 26 | |||
| 27 | Properties for consumer drivers: | ||
| 28 | - Consumer drivers can be connected to this producer device, as specified | ||
| 29 | in <Documentation/devicetree/bindings/iio/iio-bindings.txt> | ||
| 30 | - Channels exposed are specified in: | ||
| 31 | <dt-bindings/iio/adc/at91-sama5d2_adc.txt> | ||
| 24 | 32 | ||
| 25 | Example: | 33 | Example: |
| 26 | 34 | ||
| @@ -38,4 +46,5 @@ adc: adc@fc030000 { · 11 unmodified lines | |||
| 38 | atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; | 46 | atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>; |
| 39 | dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; | 47 | dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>; |
| 40 | dma-names = "rx"; | 48 | dma-names = "rx"; |
| 49 | #io-channel-cells = <1>; | ||
| 41 | } | 50 | } |
| @@ -8,11 +8,17 @@ Required properties: · 7 unmodified lines | |||
| 8 | See Documentation/devicetree/bindings/gpio/gpio.txt | 8 | See Documentation/devicetree/bindings/gpio/gpio.txt |
| 9 | - avdd-supply: Definition of the regulator used as analog supply | 9 | - avdd-supply: Definition of the regulator used as analog supply |
| 10 | 10 | ||
| 11 | Optional properties: | ||
| 12 | - clock-frequency: Frequency of PD_SCK in Hz | ||
| 13 | Minimum value allowed is 10 kHz because of maximum | ||
| 14 | high time of 50 microseconds. | ||
| 15 | |||
| 11 | Example: | 16 | Example: |
| 12 | weight@0 { | 17 | weight { |
| 13 | compatible = "avia,hx711"; | 18 | compatible = "avia,hx711"; |
| 14 | sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; | 19 | sck-gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>; |
| 15 | dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; | 20 | dout-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; |
| 16 | avdd-suppy = <&avdd>; | 21 | avdd-suppy = <&avdd>; |
| 22 | clock-frequency = <100000>; | ||
| 17 | }; | 23 | }; |
| 18 | 24 | ||
| @@ -2,7 +2,6 @@ Motorola CPCAP PMIC ADC binding · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc" | 4 | - compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc" |
| 5 | - interrupt-parent: The interrupt controller | ||
| 6 | - interrupts: The interrupt number for the ADC device | 5 | - interrupts: The interrupt number for the ADC device |
| 7 | - interrupt-names: Should be "adcdone" | 6 | - interrupt-names: Should be "adcdone" |
| 8 | - #io-channel-cells: Number of cells in an IIO specifier | 7 | - #io-channel-cells: Number of cells in an IIO specifier |
| @@ -8,7 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg: Should be the register range of the module. | 8 | - reg: Should be the register range of the module. |
| 9 | - interrupts: Should be the interrupt number of the module. | 9 | - interrupts: Should be the interrupt number of the module. |
| 10 | Typically this is <1>. | 10 | Typically this is <1>. |
| 11 | - interrupt-parent: phandle to the tsadc module of the i.MX25. | ||
| 12 | - #address-cells: Should be <1> (setting for the subnodes) | 11 | - #address-cells: Should be <1> (setting for the subnodes) |
| 13 | - #size-cells: Should be <0> (setting for the subnodes) | 12 | - #size-cells: Should be <0> (setting for the subnodes) |
| 14 | 13 | ||
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031" | 4 | - compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031" |
| 5 | - reg: SPI chip select number for the device | 5 | - reg: SPI chip select number for the device |
| 6 | - interrupt-parent: phandle to the parent interrupt controller | ||
| 7 | see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | ||
| 8 | - interrupts: IRQ line for the ADC | 6 | - interrupts: IRQ line for the ADC |
| 9 | see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 7 | see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 10 | 8 | ||
| @@ -7,7 +7,7 @@ Required properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | Example node: | 8 | Example node: |
| 9 | 9 | ||
| 10 | ads1202: adc@0 { | 10 | ads1202: adc { |
| 11 | compatible = "sd-modulator"; | 11 | compatible = "sd-modulator"; |
| 12 | #io-channel-cells = <0>; | 12 | #io-channel-cells = <0>; |
| 13 | }; | 13 | }; |
| @@ -0,0 +1,36 @@ | |||
| 1 | Spreadtrum SC27XX series PMICs ADC binding | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be one of the following. | ||
| 5 | "sprd,sc2720-adc" | ||
| 6 | "sprd,sc2721-adc" | ||
| 7 | "sprd,sc2723-adc" | ||
| 8 | "sprd,sc2730-adc" | ||
| 9 | "sprd,sc2731-adc" | ||
| 10 | - reg: The address offset of ADC controller. | ||
| 11 | - interrupt-parent: The interrupt controller. | ||
| 12 | - interrupts: The interrupt number for the ADC device. | ||
| 13 | - #io-channel-cells: Number of cells in an IIO specifier. | ||
| 14 | - hwlocks: Reference to a phandle of a hwlock provider node. | ||
| 15 | |||
| 16 | Example: | ||
| 17 | |||
| 18 | sc2731_pmic: pmic@0 { | ||
| 19 | compatible = "sprd,sc2731"; | ||
| 20 | reg = <0>; | ||
| 21 | spi-max-frequency = <26000000>; | ||
| 22 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | ||
| 23 | interrupt-controller; | ||
| 24 | #interrupt-cells = <2>; | ||
| 25 | #address-cells = <1>; | ||
| 26 | #size-cells = <0>; | ||
| 27 | |||
| 28 | pmic_adc: adc@480 { | ||
| 29 | compatible = "sprd,sc2731-adc"; | ||
| 30 | reg = <0x480>; | ||
| 31 | interrupt-parent = <&sc2731_pmic>; | ||
| 32 | interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; | ||
| 33 | #io-channel-cells = <1>; | ||
| 34 | hwlocks = <&hwlock 4>; | ||
| 35 | }; | ||
| 36 | }; | ||
| @@ -60,7 +60,6 @@ Required properties: · 59 unmodified lines | |||
| 60 | - reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). | 60 | - reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). |
| 61 | - clocks: Input clock private to this ADC instance. It's required only on | 61 | - clocks: Input clock private to this ADC instance. It's required only on |
| 62 | stm32f4, that has per instance clock input for registers access. | 62 | stm32f4, that has per instance clock input for registers access. |
| 63 | - interrupt-parent: Phandle to the parent interrupt controller. | ||
| 64 | - interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or | 63 | - interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or |
| 65 | 2 for adc@200). | 64 | 2 for adc@200). |
| 66 | - st,adc-channels: List of single-ended channels muxed for this ADC. | 65 | - st,adc-channels: List of single-ended channels muxed for this ADC. |
| @@ -22,7 +22,6 @@ Required properties: · 21 unmodified lines | |||
| 22 | clock to the AXI bus interface of the core. | 22 | clock to the AXI bus interface of the core. |
| 23 | 23 | ||
| 24 | Optional properties: | 24 | Optional properties: |
| 25 | - interrupt-parent: phandle to the parent interrupt controller | ||
| 26 | - xlnx,external-mux: | 25 | - xlnx,external-mux: |
| 27 | * "none": No external multiplexer is used, this is the default | 26 | * "none": No external multiplexer is used, this is the default |
| 28 | if the property is omitted. | 27 | if the property is omitted. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | - compatible: must be "atlas,ec-sm" | 7 | - compatible: must be "atlas,ec-sm" |
| 8 | - reg: the I2C address of the sensor | 8 | - reg: the I2C address of the sensor |
| 9 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 10 | - interrupts: the sole interrupt generated by the device | 9 | - interrupts: the sole interrupt generated by the device |
| 11 | 10 | ||
| 12 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 11 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | - compatible: must be "atlas,orp-sm" | 7 | - compatible: must be "atlas,orp-sm" |
| 8 | - reg: the I2C address of the sensor | 8 | - reg: the I2C address of the sensor |
| 9 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 10 | - interrupts: the sole interrupt generated by the device | 9 | - interrupts: the sole interrupt generated by the device |
| 11 | 10 | ||
| 12 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 11 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | - compatible: must be "atlas,ph-sm" | 7 | - compatible: must be "atlas,ph-sm" |
| 8 | - reg: the I2C address of the sensor | 8 | - reg: the I2C address of the sensor |
| 9 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 10 | - interrupts: the sole interrupt generated by the device | 9 | - interrupts: the sole interrupt generated by the device |
| 11 | 10 | ||
| 12 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 11 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -0,0 +1,78 @@ | |||
| 1 | Analog Devices AD5758 DAC device driver | ||
| 2 | |||
| 3 | Required properties for the AD5758: | ||
| 4 | - compatible: Must be "adi,ad5758" | ||
| 5 | - reg: SPI chip select number for the device | ||
| 6 | - spi-max-frequency: Max SPI frequency to use (< 50000000) | ||
| 7 | - spi-cpha: is the only mode that is supported | ||
| 8 | |||
| 9 | Required properties: | ||
| 10 | |||
| 11 | - adi,dc-dc-mode: Mode of operation of the dc-to-dc converter | ||
| 12 | Dynamic Power Control (DPC) | ||
| 13 | In this mode, the AD5758 circuitry senses the output | ||
| 14 | voltage and dynamically regulates the supply voltage, | ||
| 15 | VDPC+, to meet compliance requirements plus an optimized | ||
| 16 | headroom voltage for the output buffer. | ||
| 17 | |||
| 18 | Programmable Power Control (PPC) | ||
| 19 | In this mode, the VDPC+ voltage is user-programmable to | ||
| 20 | a fixed level that needs to accommodate the maximum output | ||
| 21 | load required. | ||
| 22 | |||
| 23 | The output of the DAC core is either converted to a | ||
| 24 | current or voltage output at the VIOUT pin. Only one mode | ||
| 25 | can be enabled at any one time. | ||
| 26 | |||
| 27 | The following values are currently supported: | ||
| 28 | * 1: DPC current mode | ||
| 29 | * 2: DPC voltage mode | ||
| 30 | * 3: PPC current mode | ||
| 31 | |||
| 32 | Depending on the selected output mode (voltage or current) one of the | ||
| 33 | two properties must | ||
| 34 | be present: | ||
| 35 | |||
| 36 | - adi,range-microvolt: Voltage output range | ||
| 37 | The array of voltage output ranges must contain two fields: | ||
| 38 | * <0 5000000>: 0 V to 5 V voltage range | ||
| 39 | * <0 10000000>: 0 V to 10 V voltage range | ||
| 40 | * <(-5000000) 5000000>: ±5 V voltage range | ||
| 41 | * <(-10000000) 10000000>: ±10 V voltage range | ||
| 42 | - adi,range-microamp: Current output range | ||
| 43 | The array of current output ranges must contain two fields: | ||
| 44 | * <0 20000>: 0 mA to 20 mA current range | ||
| 45 | * <0 24000>: 0 mA to 24 mA current range | ||
| 46 | * <4 24000>: 4 mA to 20 mA current range | ||
| 47 | * <(-20000) 20000>: ±20 mA current range | ||
| 48 | * <(-24000) 24000>: ±24 mA current range | ||
| 49 | * <(-1000) 22000>: −1 mA to +22 mA current range | ||
| 50 | |||
| 51 | Optional properties: | ||
| 52 | |||
| 53 | - adi,dc-dc-ilim-microamp: The dc-to-dc converter current limit | ||
| 54 | The following values are currently supported [uA]: | ||
| 55 | * 150000 | ||
| 56 | * 200000 | ||
| 57 | * 250000 | ||
| 58 | * 300000 | ||
| 59 | * 350000 | ||
| 60 | * 400000 | ||
| 61 | |||
| 62 | - adi,slew-time-us: The time it takes for the output to reach the | ||
| 63 | full scale [uS] | ||
| 64 | The supported range is between 133us up to 1023984375us | ||
| 65 | |||
| 66 | AD5758 Example: | ||
| 67 | |||
| 68 | dac@0 { | ||
| 69 | compatible = "adi,ad5758"; | ||
| 70 | reg = <0>; | ||
| 71 | spi-max-frequency = <1000000>; | ||
| 72 | spi-cpha; | ||
| 73 | |||
| 74 | adi,dc-dc-mode = <2>; | ||
| 75 | adi,range-microvolt = <0 10000000>; | ||
| 76 | adi,dc-dc-ilim-microamp = <200000>; | ||
| 77 | adi,slew-time-us = <125000>; | ||
| 78 | }; | ||
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg : the I2C address of the sensor | 5 | - reg : the I2C address of the sensor |
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 9 | - interrupts : interrupt mapping for the trigger interrupt from the | 8 | - interrupts : interrupt mapping for the trigger interrupt from the |
| 10 | internal oscillator. The following IRQ modes are supported: | 9 | internal oscillator. The following IRQ modes are supported: |
| 11 | IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and | 10 | IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible : Should be "ti,afe4403". | 4 | - compatible : Should be "ti,afe4403". |
| 5 | - reg : SPI chip select address of device. | 5 | - reg : SPI chip select address of device. |
| 6 | - tx-supply : Regulator supply to transmitting LEDs. | 6 | - tx-supply : Regulator supply to transmitting LEDs. |
| 7 | - interrupt-parent : Phandle to he parent interrupt controller. | ||
| 8 | - interrupts : The interrupt line the device ADC_RDY pin is | 7 | - interrupts : The interrupt line the device ADC_RDY pin is |
| 9 | connected to. For details refer to, | 8 | connected to. For details refer to, |
| 10 | ../../interrupt-controller/interrupts.txt. | 9 | ../../interrupt-controller/interrupts.txt. |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible : Should be "ti,afe4404". | 4 | - compatible : Should be "ti,afe4404". |
| 5 | - reg : I2C address of the device. | 5 | - reg : I2C address of the device. |
| 6 | - tx-supply : Regulator supply to transmitting LEDs. | 6 | - tx-supply : Regulator supply to transmitting LEDs. |
| 7 | - interrupt-parent : Phandle to he parent interrupt controller. | ||
| 8 | - interrupts : The interrupt line the device ADC_RDY pin is | 7 | - interrupts : The interrupt line the device ADC_RDY pin is |
| 9 | connected to. For details refer to, | 8 | connected to. For details refer to, |
| 10 | ../interrupt-controller/interrupts.txt. | 9 | ../interrupt-controller/interrupts.txt. |
| @@ -5,7 +5,6 @@ Maxim MAX30100 heart rate and pulse oximeter sensor · 4 unmodified lines | |||
| 5 | Required properties: | 5 | Required properties: |
| 6 | - compatible: must be "maxim,max30100" | 6 | - compatible: must be "maxim,max30100" |
| 7 | - reg: the I2C address of the sensor | 7 | - reg: the I2C address of the sensor |
| 8 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 9 | - interrupts: the sole interrupt generated by the device | 8 | - interrupts: the sole interrupt generated by the device |
| 10 | 9 | ||
| 11 | Refer to interrupt-controller/interrupts.txt for generic | 10 | Refer to interrupt-controller/interrupts.txt for generic |
| @@ -7,7 +7,6 @@ Maxim MAX30105 optical particle-sensing module · 6 unmodified lines | |||
| 7 | Required properties: | 7 | Required properties: |
| 8 | - compatible: must be "maxim,max30102" or "maxim,max30105" | 8 | - compatible: must be "maxim,max30102" or "maxim,max30105" |
| 9 | - reg: the I2C address of the sensor | 9 | - reg: the I2C address of the sensor |
| 10 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 11 | - interrupts: the sole interrupt generated by the device | 10 | - interrupts: the sole interrupt generated by the device |
| 12 | 11 | ||
| 13 | Refer to interrupt-controller/interrupts.txt for generic | 12 | Refer to interrupt-controller/interrupts.txt for generic |
| @@ -13,7 +13,6 @@ Optional properties: · 12 unmodified lines | |||
| 13 | when it is not active, whereas a pull-up one is needed when interrupt | 13 | when it is not active, whereas a pull-up one is needed when interrupt |
| 14 | line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. | 14 | line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. |
| 15 | Refer to pinctrl/pinctrl-bindings.txt for the property description. | 15 | Refer to pinctrl/pinctrl-bindings.txt for the property description. |
| 16 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 17 | - interrupts: interrupt mapping for IRQ. It should be configured with | 16 | - interrupts: interrupt mapping for IRQ. It should be configured with |
| 18 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or | 17 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or |
| 19 | IRQ_TYPE_EDGE_FALLING. | 18 | IRQ_TYPE_EDGE_FALLING. |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | - spi-max-frequency : set maximum clock frequency (only for SPI) | 9 | - spi-max-frequency : set maximum clock frequency (only for SPI) |
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | - interrupt-parent : should be the phandle of the interrupt controller | ||
| 13 | - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW | 12 | - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW |
| 14 | - interrupt-names : set to "INT1" if INT1 pin should be used as interrupt | 13 | - interrupt-names : set to "INT1" if INT1 pin should be used as interrupt |
| 15 | input, set to "INT2" if INT2 pin should be used instead | 14 | input, set to "INT2" if INT2 pin should be used instead |
| @@ -6,12 +6,12 @@ Required properties: · 5 unmodified lines | |||
| 6 | - compatible : should be one of | 6 | - compatible : should be one of |
| 7 | "invensense,mpu6050" | 7 | "invensense,mpu6050" |
| 8 | "invensense,mpu6500" | 8 | "invensense,mpu6500" |
| 9 | "invensense,mpu6515" | ||
| 9 | "invensense,mpu9150" | 10 | "invensense,mpu9150" |
| 10 | "invensense,mpu9250" | 11 | "invensense,mpu9250" |
| 11 | "invensense,mpu9255" | 12 | "invensense,mpu9255" |
| 12 | "invensense,icm20608" | 13 | "invensense,icm20608" |
| 13 | - reg : the I2C address of the sensor | 14 | - reg : the I2C address of the sensor |
| 14 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 15 | - interrupts: interrupt mapping for IRQ. It should be configured with flags | 15 | - interrupts: interrupt mapping for IRQ. It should be configured with flags |
| 16 | IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or | 16 | IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or |
| 17 | IRQ_TYPE_EDGE_FALLING. | 17 | IRQ_TYPE_EDGE_FALLING. |
| @@ -20,7 +20,6 @@ Optional properties: · 19 unmodified lines | |||
| 20 | IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line | 20 | IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line |
| 21 | when it is not active, whereas a pull-up one is needed when interrupt | 21 | when it is not active, whereas a pull-up one is needed when interrupt |
| 22 | line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. | 22 | line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING. |
| 23 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 24 | - interrupts: interrupt mapping for IRQ. It should be configured with | 23 | - interrupts: interrupt mapping for IRQ. It should be configured with |
| 25 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or | 24 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or |
| 26 | IRQ_TYPE_EDGE_FALLING. | 25 | IRQ_TYPE_EDGE_FALLING. |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | Optional properties: | 10 | Optional properties: |
| 11 | 11 | ||
| 12 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 13 | - interrupts : interrupt mapping for GPIO IRQ | 12 | - interrupts : interrupt mapping for GPIO IRQ |
| 14 | 13 | ||
| 15 | Example: | 14 | Example: |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | - compatible: must be "avago,apds9960" | 7 | - compatible: must be "avago,apds9960" |
| 8 | - reg: the I2c address of the sensor | 8 | - reg: the I2c address of the sensor |
| 9 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 10 | - interrupts : the sole interrupt generated by the device | 9 | - interrupts : the sole interrupt generated by the device |
| 11 | 10 | ||
| 12 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 11 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | 12 | ||
| 13 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 14 | - interrupts: the sole interrupt generated by the device | 13 | - interrupts: the sole interrupt generated by the device |
| 15 | 14 | ||
| 16 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 15 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -0,0 +1,13 @@ | |||
| 1 | * ISL29501 Time-of-flight sensor. | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible : should be "renesas,isl29501" | ||
| 6 | - reg : the I2C address of the sensor | ||
| 7 | |||
| 8 | Example: | ||
| 9 | |||
| 10 | isl29501@57 { | ||
| 11 | compatible = "renesas,isl29501"; | ||
| 12 | reg = <0x57>; | ||
| 13 | }; | ||
| @@ -13,7 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | - reg: the I2C address of the sensor | 13 | - reg: the I2C address of the sensor |
| 14 | 14 | ||
| 15 | Optional properties: | 15 | Optional properties: |
| 16 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 17 | - interrupts: interrupt mapping for GPIO IRQ (configure for falling edge) | 16 | - interrupts: interrupt mapping for GPIO IRQ (configure for falling edge) |
| 18 | 17 | ||
| 19 | Example: | 18 | Example: |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | 12 | ||
| 13 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 14 | - interrupts: the sole interrupt generated by the device | 13 | - interrupts: the sole interrupt generated by the device |
| 15 | 14 | ||
| 16 | Refer to interrupt-controller/interrupts.txt for generic interrupt client | 15 | Refer to interrupt-controller/interrupts.txt for generic interrupt client |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: i2c address of the sensor / spi cs line | 5 | - reg: i2c address of the sensor / spi cs line |
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 9 | - interrupts: interrupt mapping for IRQ. It should be configured with | 8 | - interrupts: interrupt mapping for IRQ. It should be configured with |
| 10 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or | 9 | flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or |
| 11 | IRQ_TYPE_EDGE_FALLING. | 10 | IRQ_TYPE_EDGE_FALLING. |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | Optional properties: | 10 | Optional properties: |
| 11 | 11 | ||
| 12 | - interrupt-parent : phandle to the parent interrupt controller | ||
| 13 | - interrupts : interrupt mapping for GPIO IRQ | 12 | - interrupts : interrupt mapping for GPIO IRQ |
| 14 | 13 | ||
| 15 | Example: | 14 | Example: |
| @@ -8,11 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | "bosch,bme280" | 8 | "bosch,bme280" |
| 9 | 9 | ||
| 10 | Optional properties: | 10 | Optional properties: |
| 11 | - chip-id: configurable chip id for non-default chip revisions | ||
| 12 | - temp-measurement-period: temperature measurement period (milliseconds) | ||
| 13 | - default-oversampling: default oversampling value to be used at startup, | ||
| 14 | value range is 0-3 with rising sensitivity. | ||
| 15 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 16 | - interrupts: interrupt mapping for IRQ | 11 | - interrupts: interrupt mapping for IRQ |
| 17 | - reset-gpios: a GPIO line handling reset of the sensor: as the line is | 12 | - reset-gpios: a GPIO line handling reset of the sensor: as the line is |
| 18 | active low, it should be marked GPIO_ACTIVE_LOW (see gpio/gpio.txt) | 13 | active low, it should be marked GPIO_ACTIVE_LOW (see gpio/gpio.txt) |
| @@ -24,9 +19,6 @@ Example: · 5 unmodified lines | |||
| 24 | pressure@77 { | 19 | pressure@77 { |
| 25 | compatible = "bosch,bmp085"; | 20 | compatible = "bosch,bmp085"; |
| 26 | reg = <0x77>; | 21 | reg = <0x77>; |
| 27 | chip-id = <10>; | ||
| 28 | temp-measurement-period = <100>; | ||
| 29 | default-oversampling = <2>; | ||
| 30 | interrupt-parent = <&gpio0>; | 22 | interrupt-parent = <&gpio0>; |
| 31 | interrupts = <25 IRQ_TYPE_EDGE_RISING>; | 23 | interrupts = <25 IRQ_TYPE_EDGE_RISING>; |
| 32 | reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; | 24 | reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>; |
| @@ -15,8 +15,6 @@ Optional properties: · 14 unmodified lines | |||
| 15 | power to the sensor | 15 | power to the sensor |
| 16 | - vdd-supply: an optional regulator that needs to be on to provide VDD | 16 | - vdd-supply: an optional regulator that needs to be on to provide VDD |
| 17 | power to the sensor | 17 | power to the sensor |
| 18 | - interrupt-parent: phandle to the parent interrupt controller as documented in | ||
| 19 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | ||
| 20 | - interrupts: interrupt mapping for IRQ as documented in | 18 | - interrupts: interrupt mapping for IRQ as documented in |
| 21 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 19 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 22 | 20 | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - spi-max-frequency: specifies maximum SPI clock frequency | 6 | - spi-max-frequency: specifies maximum SPI clock frequency |
| 7 | - spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI | 7 | - spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI |
| 8 | slave node bindings. | 8 | slave node bindings. |
| 9 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 10 | - interrupts : the sole interrupt generated by the device | 9 | - interrupts : the sole interrupt generated by the device |
| 11 | 10 | ||
| 12 | Refer to interrupt-controller/interrupts.txt for generic | 11 | Refer to interrupt-controller/interrupts.txt for generic |
| @@ -3,7 +3,6 @@ Semtech's SX9500 capacitive proximity button device driver · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "semtech,sx9500" | 4 | - compatible: must be "semtech,sx9500" |
| 5 | - reg: i2c address where to find the device | 5 | - reg: i2c address where to find the device |
| 6 | - interrupt-parent : should be the phandle for the interrupt controller | ||
| 7 | - interrupts : the sole interrupt generated by the device | 6 | - interrupts : the sole interrupt generated by the device |
| 8 | 7 | ||
| 9 | Refer to interrupt-controller/interrupts.txt for generic | 8 | Refer to interrupt-controller/interrupts.txt for generic |
| @@ -6,7 +6,6 @@ of a virtual sensor device. · 5 unmodified lines | |||
| 6 | Required properties: | 6 | Required properties: |
| 7 | - compatible: "samsung,sensorhub-rinato" or "samsung,sensorhub-thermostat" | 7 | - compatible: "samsung,sensorhub-rinato" or "samsung,sensorhub-thermostat" |
| 8 | - spi-max-frequency: max SPI clock frequency | 8 | - spi-max-frequency: max SPI clock frequency |
| 9 | - interrupt-parent: interrupt parent | ||
| 10 | - interrupts: communication interrupt | 9 | - interrupts: communication interrupt |
| 11 | - ap-mcu-gpios: [out] ap to sensorhub line - used during communication | 10 | - ap-mcu-gpios: [out] ap to sensorhub line - used during communication |
| 12 | - mcu-ap-gpios: [in] sensorhub to ap - used during communication | 11 | - mcu-ap-gpios: [in] sensorhub to ap - used during communication |
| @@ -20,8 +20,6 @@ Required properties: · 19 unmodified lines | |||
| 20 | 20 | ||
| 21 | Optional properties: | 21 | Optional properties: |
| 22 | 22 | ||
| 23 | - interrupt-parent: should be the phandle for the interrupt controller | ||
| 24 | |||
| 25 | - interrupts: interrupt mapping for GPIO IRQ (level active low) | 23 | - interrupts: interrupt mapping for GPIO IRQ (level active low) |
| 26 | 24 | ||
| 27 | Example: | 25 | Example: |
| @@ -19,7 +19,6 @@ representing a dsaf device. · 18 unmodified lines | |||
| 19 | - #size-cells: must be 2 | 19 | - #size-cells: must be 2 |
| 20 | Optional properties: | 20 | Optional properties: |
| 21 | - dma-coherent: Present if DMA operations are coherent. | 21 | - dma-coherent: Present if DMA operations are coherent. |
| 22 | - interrupt-parent: the interrupt parent of this device. | ||
| 23 | - interrupts: should contain 32 completion event irq,1 async event irq | 22 | - interrupts: should contain 32 completion event irq,1 async event irq |
| 24 | and 1 event overflow irq. | 23 | and 1 event overflow irq. |
| 25 | - interrupt-names:should be one of 34 irqs for roce device | 24 | - interrupt-names:should be one of 34 irqs for roce device |
| @@ -3,8 +3,6 @@ Cypress I2C Touchpad · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "cypress,cyapa". | 4 | - compatible: must be "cypress,cyapa". |
| 5 | - reg: I2C address of the chip. | 5 | - reg: I2C address of the chip. |
| 6 | - interrupt-parent: a phandle for the interrupt controller (see interrupt | ||
| 7 | binding[0]). | ||
| 8 | - interrupts: interrupt to which the chip is connected (see interrupt | 6 | - interrupts: interrupt to which the chip is connected (see interrupt |
| 9 | binding[0]). | 7 | binding[0]). |
| 10 | 8 | ||
| @@ -3,8 +3,6 @@ Samsung tm2-touchkey · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "cypress,tm2-touchkey" | 4 | - compatible: must be "cypress,tm2-touchkey" |
| 5 | - reg: I2C address of the chip. | 5 | - reg: I2C address of the chip. |
| 6 | - interrupt-parent: a phandle for the interrupt controller (see interrupt | ||
| 7 | binding[0]). | ||
| 8 | - interrupts: interrupt to which the chip is connected (see interrupt | 6 | - interrupts: interrupt to which the chip is connected (see interrupt |
| 9 | binding[0]). | 7 | binding[0]). |
| 10 | - vcc-supply : internal regulator output. 1.8V | 8 | - vcc-supply : internal regulator output. 1.8V |
| @@ -7,8 +7,6 @@ This module provides a simple power button event via two interrupts. · 6 unmodified lines | |||
| 7 | Required properties: | 7 | Required properties: |
| 8 | - compatible: should be one of the following | 8 | - compatible: should be one of the following |
| 9 | - "ettus,e3x0-button": For devices such as the NI Ettus Research USRP E3x0 | 9 | - "ettus,e3x0-button": For devices such as the NI Ettus Research USRP E3x0 |
| 10 | - interrupt-parent: | ||
| 11 | - a phandle to the interrupt controller that it is attached to. | ||
| 12 | - interrupts: should be one of the following | 10 | - interrupts: should be one of the following |
| 13 | - <0 30 1>, <0 31 1>: For devices such as the NI Ettus Research USRP E3x0 | 11 | - <0 30 1>, <0 31 1>: For devices such as the NI Ettus Research USRP E3x0 |
| 14 | - interrupt-names: should be one of the following | 12 | - interrupt-names: should be one of the following |
| @@ -3,8 +3,6 @@ Elantech I2C Touchpad · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "elan,ekth3000". | 4 | - compatible: must be "elan,ekth3000". |
| 5 | - reg: I2C address of the chip. | 5 | - reg: I2C address of the chip. |
| 6 | - interrupt-parent: a phandle for the interrupt controller (see interrupt | ||
| 7 | binding[0]). | ||
| 8 | - interrupts: interrupt to which the chip is connected (see interrupt | 6 | - interrupts: interrupt to which the chip is connected (see interrupt |
| 9 | binding[0]). | 7 | binding[0]). |
| 10 | 8 | ||
| @@ -3,8 +3,6 @@ Elantech I2C Touchscreen · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "elan,ekth3500". | 4 | - compatible: must be "elan,ekth3500". |
| 5 | - reg: I2C address of the chip. | 5 | - reg: I2C address of the chip. |
| 6 | - interrupt-parent: a phandle for the interrupt controller (see interrupt | ||
| 7 | binding[0]). | ||
| 8 | - interrupts: interrupt to which the chip is connected (see interrupt | 6 | - interrupts: interrupt to which the chip is connected (see interrupt |
| 9 | binding[0]). | 7 | binding[0]). |
| 10 | 8 | ||
| @@ -14,7 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | - compatible: must be "hid-over-i2c" | 14 | - compatible: must be "hid-over-i2c" |
| 15 | - reg: i2c slave address | 15 | - reg: i2c slave address |
| 16 | - hid-descr-addr: HID descriptor address | 16 | - hid-descr-addr: HID descriptor address |
| 17 | - interrupt-parent: the phandle for the interrupt controller | ||
| 18 | - interrupts: interrupt line | 17 | - interrupts: interrupt line |
| 19 | 18 | ||
| 20 | Additional optional properties: | 19 | Additional optional properties: |
| @@ -26,7 +25,8 @@ device-specific compatible properties, which should be used in addition to the · 5 unmodified lines | |||
| 26 | 25 | ||
| 27 | - compatible: | 26 | - compatible: |
| 28 | * "wacom,w9013" (Wacom W9013 digitizer). Supports: | 27 | * "wacom,w9013" (Wacom W9013 digitizer). Supports: |
| 29 | - vdd-supply | 28 | - vdd-supply (3.3V) |
| 29 | - vddl-supply (1.8V) | ||
| 30 | - post-power-on-delay-ms | 30 | - post-power-on-delay-ms |
| 31 | 31 | ||
| 32 | - vdd-supply: phandle of the regulator that provides the supply voltage. | 32 | - vdd-supply: phandle of the regulator that provides the supply voltage. |
| @@ -0,0 +1,8 @@ | |||
| 1 | General Keys Properties: | ||
| 2 | |||
| 3 | Optional properties for Keys: | ||
| 4 | - power-off-time-sec: Duration in seconds which the key should be kept | ||
| 5 | pressed for device to power off automatically. Device with key pressed | ||
| 6 | shutdown feature can specify this property. | ||
| 7 | - linux,keycodes: Specifies the numeric keycode values to be used for | ||
| 8 | reporting key presses. | ||
| @@ -7,6 +7,7 @@ PROPERTIES · 6 unmodified lines | |||
| 7 | Value type: <string> | 7 | Value type: <string> |
| 8 | Definition: must be one of: | 8 | Definition: must be one of: |
| 9 | "qcom,pm8941-pwrkey" | 9 | "qcom,pm8941-pwrkey" |
| 10 | "qcom,pm8941-resin" | ||
| 10 | 11 | ||
| 11 | - reg: | 12 | - reg: |
| 12 | Usage: required | 13 | Usage: required |
| @@ -32,6 +33,14 @@ PROPERTIES · 19 unmodified lines | |||
| 32 | Definition: presence of this property indicates that the KPDPWR_N pin | 33 | Definition: presence of this property indicates that the KPDPWR_N pin |
| 33 | should be configured for pull up. | 34 | should be configured for pull up. |
| 34 | 35 | ||
| 36 | - linux,code: | ||
| 37 | Usage: optional | ||
| 38 | Value type: <u32> | ||
| 39 | Definition: The input key-code associated with the power key. | ||
| 40 | Use the linux event codes defined in | ||
| 41 | include/dt-bindings/input/linux-event-codes.h | ||
| 42 | When property is omitted KEY_POWER is assumed. | ||
| 43 | |||
| 35 | EXAMPLE | 44 | EXAMPLE |
| 36 | 45 | ||
| 37 | pwrkey@800 { | 46 | pwrkey@800 { |
| @@ -40,4 +49,5 @@ EXAMPLE · 2 unmodified lines | |||
| 40 | interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; | 49 | interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; |
| 41 | debounce = <15625>; | 50 | debounce = <15625>; |
| 42 | bias-pull-up; | 51 | bias-pull-up; |
| 52 | linux,code = <KEY_POWER>; | ||
| 43 | }; | 53 | }; |
| @@ -3,7 +3,6 @@ Raydium I2C touchscreen · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "raydium,rm32380" | 4 | - compatible: must be "raydium,rm32380" |
| 5 | - reg: The I2C address of the device | 5 | - reg: The I2C address of the device |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: interrupt to which the chip is connected | 6 | - interrupts: interrupt to which the chip is connected |
| 8 | See ../interrupt-controller/interrupts.txt | 7 | See ../interrupt-controller/interrupts.txt |
| 9 | Optional properties: | 8 | Optional properties: |
| @@ -16,7 +16,6 @@ Required Properties: · 15 unmodified lines | |||
| 16 | 16 | ||
| 17 | Optional Properties: | 17 | Optional Properties: |
| 18 | - interrupts: interrupt which the rmi device is connected to. | 18 | - interrupts: interrupt which the rmi device is connected to. |
| 19 | - interrupt-parent: The interrupt controller. | ||
| 20 | See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 19 | See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 21 | 20 | ||
| 22 | - syna,reset-delay-ms: The number of milliseconds to wait after resetting the | 21 | - syna,reset-delay-ms: The number of milliseconds to wait after resetting the |
| @@ -16,7 +16,6 @@ Required Properties: · 15 unmodified lines | |||
| 16 | 16 | ||
| 17 | Optional Properties: | 17 | Optional Properties: |
| 18 | - interrupts: interrupt which the rmi device is connected to. | 18 | - interrupts: interrupt which the rmi device is connected to. |
| 19 | - interrupt-parent: The interrupt controller. | ||
| 20 | See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 19 | See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 21 | 20 | ||
| 22 | - spi-rx-delay-us: microsecond delay after a read transfer. | 21 | - spi-rx-delay-us: microsecond delay after a read transfer. |
| @@ -9,7 +9,6 @@ This module provides a simple power button event via an Interrupt. · 8 unmodified lines | |||
| 9 | Required properties: | 9 | Required properties: |
| 10 | - compatible: should be one of the following | 10 | - compatible: should be one of the following |
| 11 | - "ti,palmas-pwrbutton": For Palmas compatible power on button | 11 | - "ti,palmas-pwrbutton": For Palmas compatible power on button |
| 12 | - interrupt-parent: Parent interrupt device, must be handle of palmas node. | ||
| 13 | - interrupts: Interrupt number of power button submodule on device. | 12 | - interrupts: Interrupt number of power button submodule on device. |
| 14 | 13 | ||
| 15 | Optional Properties: | 14 | Optional Properties: |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | for I2C slave, use "adi,ad7879-1" | 5 | for I2C slave, use "adi,ad7879-1" |
| 6 | - reg : SPI chipselect/I2C slave address | 6 | - reg : SPI chipselect/I2C slave address |
| 7 | See spi-bus.txt for more SPI slave properties | 7 | See spi-bus.txt for more SPI slave properties |
| 8 | - interrupt-parent : the phandle for the interrupt controller | ||
| 9 | - interrupts : touch controller interrupt | 8 | - interrupts : touch controller interrupt |
| 10 | - touchscreen-max-pressure : maximum reported pressure | 9 | - touchscreen-max-pressure : maximum reported pressure |
| 11 | - adi,resistance-plate-x : total resistance of X-plate (for pressure | 10 | - adi,resistance-plate-x : total resistance of X-plate (for pressure |
| @@ -18,7 +18,6 @@ Additional required properties: · 17 unmodified lines | |||
| 18 | "ti,ads7846" | 18 | "ti,ads7846" |
| 19 | "ti,ads7873" | 19 | "ti,ads7873" |
| 20 | 20 | ||
| 21 | interrupt-parent | ||
| 22 | interrupts An interrupt node describing the IRQ line the chip's | 21 | interrupts An interrupt node describing the IRQ line the chip's |
| 23 | !PENIRQ pin is connected to. | 22 | !PENIRQ pin is connected to. |
| 24 | vcc-supply A regulator node for the supply voltage. | 23 | vcc-supply A regulator node for the supply voltage. |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "microchip,ar1021-i2c" | 4 | - compatible : "microchip,ar1021-i2c" |
| 5 | - reg : I2C slave address | 5 | - reg : I2C slave address |
| 6 | - interrupt-parent : the phandle for the interrupt controller | ||
| 7 | - interrupts : touch controller interrupt | 6 | - interrupts : touch controller interrupt |
| 8 | 7 | ||
| 9 | Example: | 8 | Example: |
| @@ -0,0 +1,35 @@ | |||
| 1 | * Rohm BU21029 Touch Screen Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : must be "rohm,bu21029" | ||
| 5 | - reg : i2c device address of the chip (0x40 or 0x41) | ||
| 6 | - interrupt-parent : the phandle for the gpio controller | ||
| 7 | - interrupts : (gpio) interrupt to which the chip is connected | ||
| 8 | - rohm,x-plate-ohms : x-plate resistance in Ohm | ||
| 9 | |||
| 10 | Optional properties: | ||
| 11 | - reset-gpios : gpio pin to reset the chip (active low) | ||
| 12 | - touchscreen-size-x : horizontal resolution of touchscreen (in pixels) | ||
| 13 | - touchscreen-size-y : vertical resolution of touchscreen (in pixels) | ||
| 14 | - touchscreen-max-pressure: maximum pressure value | ||
| 15 | - vdd-supply : power supply for the controller | ||
| 16 | |||
| 17 | Example: | ||
| 18 | |||
| 19 | &i2c1 { | ||
| 20 | /* ... */ | ||
| 21 | |||
| 22 | bu21029: bu21029@40 { | ||
| 23 | compatible = "rohm,bu21029"; | ||
| 24 | reg = <0x40>; | ||
| 25 | interrupt-parent = <&gpio1>; | ||
| 26 | interrupts = <4 IRQ_TYPE_EDGE_FALLING>; | ||
| 27 | reset-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; | ||
| 28 | rohm,x-plate-ohms = <600>; | ||
| 29 | touchscreen-size-x = <800>; | ||
| 30 | touchscreen-size-y = <480>; | ||
| 31 | touchscreen-max-pressure = <4095>; | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* ... */ | ||
| 35 | }; | ||
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "chipone,icn8318" | 4 | - compatible : "chipone,icn8318" |
| 5 | - reg : I2C slave address of the chip (0x40) | 5 | - reg : I2C slave address of the chip (0x40) |
| 6 | - interrupt-parent : a phandle pointing to the interrupt controller | ||
| 7 | serving the interrupt for this chip | ||
| 8 | - interrupts : interrupt specification for the icn8318 interrupt | 6 | - interrupts : interrupt specification for the icn8318 interrupt |
| 9 | - wake-gpios : GPIO specification for the WAKE input | 7 | - wake-gpios : GPIO specification for the WAKE input |
| 10 | - touchscreen-size-x : horizontal resolution of touchscreen (in pixels) | 8 | - touchscreen-size-x : horizontal resolution of touchscreen (in pixels) |
| @@ -7,7 +7,6 @@ Required Properties: · 6 unmodified lines | |||
| 7 | - xm-gpios: FET gate driver for input of X- | 7 | - xm-gpios: FET gate driver for input of X- |
| 8 | - yp-gpios: FET gate driver for input of Y+ | 8 | - yp-gpios: FET gate driver for input of Y+ |
| 9 | - ym-gpios: FET gate driver for input of Y- | 9 | - ym-gpios: FET gate driver for input of Y- |
| 10 | - interrupt-parent: phandle for the interrupt controller | ||
| 11 | - interrupts: pen irq interrupt for touch detection | 10 | - interrupts: pen irq interrupt for touch detection |
| 12 | - pinctrl-names: "idle", "default", "gpios" | 11 | - pinctrl-names: "idle", "default", "gpios" |
| 13 | - pinctrl-0: pinctrl node for pen/touch detection state pinmux | 12 | - pinctrl-0: pinctrl node for pen/touch detection state pinmux |
| @@ -4,8 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible : must be "cypress,cyttsp-i2c" or "cypress,cyttsp-spi" | 4 | - compatible : must be "cypress,cyttsp-i2c" or "cypress,cyttsp-spi" |
| 5 | - reg : Device I2C address or SPI chip select number | 5 | - reg : Device I2C address or SPI chip select number |
| 6 | - spi-max-frequency : Maximum SPI clocking speed of the device (for cyttsp-spi) | 6 | - spi-max-frequency : Maximum SPI clocking speed of the device (for cyttsp-spi) |
| 7 | - interrupt-parent : the phandle for the gpio controller | ||
| 8 | (see interrupt binding[0]). | ||
| 9 | - interrupts : (gpio) interrupt to which the chip is connected | 7 | - interrupts : (gpio) interrupt to which the chip is connected |
| 10 | (see interrupt binding[0]). | 8 | (see interrupt binding[0]). |
| 11 | - bootloader-key : the 8-byte bootloader key that is required to switch | 9 | - bootloader-key : the 8-byte bootloader key that is required to switch |
| @@ -22,8 +22,6 @@ Required properties: · 21 unmodified lines | |||
| 22 | or: "focaltech,ft6236" | 22 | or: "focaltech,ft6236" |
| 23 | 23 | ||
| 24 | - reg: I2C slave address of the chip (0x38) | 24 | - reg: I2C slave address of the chip (0x38) |
| 25 | - interrupt-parent: a phandle pointing to the interrupt controller | ||
| 26 | serving the interrupt for this chip | ||
| 27 | - interrupts: interrupt specification for the touchdetect | 25 | - interrupts: interrupt specification for the touchdetect |
| 28 | interrupt | 26 | interrupt |
| 29 | 27 | ||
| @@ -0,0 +1,30 @@ | |||
| 1 | Bindings for EETI touchscreen controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: should be "eeti,exc3000-i2c" | ||
| 5 | - reg: I2C address of the chip. Should be set to <0xa> | ||
| 6 | - interrupts: interrupt to which the chip is connected | ||
| 7 | |||
| 8 | Optional properties: | ||
| 9 | - attn-gpios: A handle to a GPIO to check whether interrupt is still | ||
| 10 | latched. This is necessary for platforms that lack | ||
| 11 | support for level-triggered IRQs. | ||
| 12 | |||
| 13 | The following optional properties described in touchscreen.txt are | ||
| 14 | also supported: | ||
| 15 | |||
| 16 | - touchscreen-inverted-x | ||
| 17 | - touchscreen-inverted-y | ||
| 18 | - touchscreen-swapped-x-y | ||
| 19 | |||
| 20 | Example: | ||
| 21 | |||
| 22 | i2c-master { | ||
| 23 | touchscreen@a { | ||
| 24 | compatible = "eeti,exc3000-i2c"; | ||
| 25 | reg = <0xa>; | ||
| 26 | interrupt-parent = <&gpio>; | ||
| 27 | interrupts = <123 IRQ_TYPE_EDGE_RISING>; | ||
| 28 | attn-gpios = <&gpio 123 GPIO_ACTIVE_HIGH>; | ||
| 29 | }; | ||
| 30 | }; | ||
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "eeti,egalax_ts" | 4 | - compatible: must be "eeti,egalax_ts" |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: touch controller interrupt | 6 | - interrupts: touch controller interrupt |
| 8 | - wakeup-gpios: the gpio pin to be used for waking up the controller | 7 | - wakeup-gpios: the gpio pin to be used for waking up the controller |
| 9 | and also used as irq pin | 8 | and also used as irq pin |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "elan,ektf2127" | 4 | - compatible : "elan,ektf2127" |
| 5 | - reg : I2C slave address of the chip (0x40) | 5 | - reg : I2C slave address of the chip (0x40) |
| 6 | - interrupt-parent : a phandle pointing to the interrupt controller | ||
| 7 | serving the interrupt for this chip | ||
| 8 | - interrupts : interrupt specification for the ektf2127 interrupt | 6 | - interrupts : interrupt specification for the ektf2127 interrupt |
| 9 | - power-gpios : GPIO specification for the pin connected to the | 7 | - power-gpios : GPIO specification for the pin connected to the |
| 10 | ektf2127's wake input. This needs to be driven high | 8 | ektf2127's wake input. This needs to be driven high |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "eeti,exc3000" | 4 | - compatible: must be "eeti,exc3000" |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: touch controller interrupt | 6 | - interrupts: touch controller interrupt |
| 8 | - touchscreen-size-x: See touchscreen.txt | 7 | - touchscreen-size-x: See touchscreen.txt |
| 9 | - touchscreen-size-y: See touchscreen.txt | 8 | - touchscreen-size-y: See touchscreen.txt |
| @@ -8,7 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg: Memory range of the device. | 8 | - reg: Memory range of the device. |
| 9 | - interrupts: Should be the interrupt number associated with this module within | 9 | - interrupts: Should be the interrupt number associated with this module within |
| 10 | the tscadc unit (<0>). | 10 | the tscadc unit (<0>). |
| 11 | - interrupt-parent: Should be a phandle to the tscadc unit. | ||
| 12 | - fsl,wires: Should be '<4>' or '<5>' | 11 | - fsl,wires: Should be '<4>' or '<5>' |
| 13 | 12 | ||
| 14 | Optional properties: | 13 | Optional properties: |
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | or "goodix,gt928" | 11 | or "goodix,gt928" |
| 12 | or "goodix,gt967" | 12 | or "goodix,gt967" |
| 13 | - reg : I2C address of the chip. Should be 0x5d or 0x14 | 13 | - reg : I2C address of the chip. Should be 0x5d or 0x14 |
| 14 | - interrupt-parent : Interrupt controller to which the chip is connected | ||
| 15 | - interrupts : Interrupt to which the chip is connected | 14 | - interrupts : Interrupt to which the chip is connected |
| 16 | 15 | ||
| 17 | Optional properties: | 16 | Optional properties: |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : must be "hideep,hideep-ts" | 4 | - compatible : must be "hideep,hideep-ts" |
| 5 | - reg : I2C slave address, (e.g. 0x6C). | 5 | - reg : I2C slave address, (e.g. 0x6C). |
| 6 | - interrupt-parent : Interrupt controller to which the chip is connected. | ||
| 7 | - interrupts : Interrupt to which the chip is connected. | 6 | - interrupts : Interrupt to which the chip is connected. |
| 8 | 7 | ||
| 9 | Optional properties: | 8 | Optional properties: |
| @@ -32,7 +31,7 @@ i2c@00000000 { · 22 unmodified lines | |||
| 32 | reg = <0x6c>; | 31 | reg = <0x6c>; |
| 33 | interrupt-parent = <&gpx1>; | 32 | interrupt-parent = <&gpx1>; |
| 34 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; | 33 | interrupts = <2 IRQ_TYPE_LEVEL_LOW>; |
| 35 | vdd-supply = <&ldo15_reg>"; | 34 | vdd-supply = <&ldo15_reg>; |
| 36 | vid-supply = <&ldo18_reg>; | 35 | vid-supply = <&ldo18_reg>; |
| 37 | reset-gpios = <&gpx1 5 0>; | 36 | reset-gpios = <&gpx1 5 0>; |
| 38 | touchscreen-size-x = <1080>; | 37 | touchscreen-size-x = <1080>; |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "maxim,max11801" | 4 | - compatible: must be "maxim,max11801" |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: touch controller interrupt | 6 | - interrupts: touch controller interrupt |
| 8 | 7 | ||
| 9 | Example: | 8 | Example: |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "melfas,mip4_ts" | 4 | - compatible: must be "melfas,mip4_ts" |
| 5 | - reg: I2C slave address of the chip (0x48 or 0x34) | 5 | - reg: I2C slave address of the chip (0x48 or 0x34) |
| 6 | - interrupt-parent: interrupt controller to which the chip is connected | ||
| 7 | - interrupts: interrupt to which the chip is connected | 6 | - interrupts: interrupt to which the chip is connected |
| 8 | 7 | ||
| 9 | Optional properties: | 8 | Optional properties: |
| @@ -0,0 +1,30 @@ | |||
| 1 | Generic resistive touchscreen ADC | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible: must be "resistive-adc-touch" | ||
| 6 | The device must be connected to an ADC device that provides channels for | ||
| 7 | position measurement and optional pressure. | ||
| 8 | Refer to ../iio/iio-bindings.txt for details | ||
| 9 | - iio-channels: must have at least two channels connected to an ADC device. | ||
| 10 | These should correspond to the channels exposed by the ADC device and should | ||
| 11 | have the right index as the ADC device registers them. These channels | ||
| 12 | represent the relative position on the "x" and "y" axes. | ||
| 13 | - iio-channel-names: must have all the channels' names. Mandatory channels | ||
| 14 | are "x" and "y". | ||
| 15 | |||
| 16 | Optional properties: | ||
| 17 | - iio-channels: The third channel named "pressure" is optional and can be | ||
| 18 | used if the ADC device also measures pressure besides position. | ||
| 19 | If this channel is missing, pressure will be ignored and the touchscreen | ||
| 20 | will only report position. | ||
| 21 | - iio-channel-names: optional channel named "pressure". | ||
| 22 | |||
| 23 | Example: | ||
| 24 | |||
| 25 | resistive_touch: resistive_touch { | ||
| 26 | compatible = "resistive-adc-touch"; | ||
| 27 | touchscreen-min-pressure = <50000>; | ||
| 28 | io-channels = <&adc 24>, <&adc 25>, <&adc 26>; | ||
| 29 | io-channel-names = "x", "y", "pressure"; | ||
| 30 | }; | ||
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : must be "samsung,s6sy761" | 4 | - compatible : must be "samsung,s6sy761" |
| 5 | - reg : I2C slave address, (e.g. 0x48) | 5 | - reg : I2C slave address, (e.g. 0x48) |
| 6 | - interrupt-parent : the phandle to the interrupt controller which provides | ||
| 7 | the interrupt | ||
| 8 | - interrupts : interrupt specification | 6 | - interrupts : interrupt specification |
| 9 | - avdd-supply : analogic power supply | 7 | - avdd-supply : analogic power supply |
| 10 | - vdd-supply : power supply | 8 | - vdd-supply : power supply |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | "silead,gsl3675" | 8 | "silead,gsl3675" |
| 9 | "silead,gsl3692" | 9 | "silead,gsl3692" |
| 10 | - reg : I2C slave address of the chip (0x40) | 10 | - reg : I2C slave address of the chip (0x40) |
| 11 | - interrupt-parent : a phandle pointing to the interrupt controller | ||
| 12 | serving the interrupt for this chip | ||
| 13 | - interrupts : interrupt specification for the gsl1680 interrupt | 11 | - interrupts : interrupt specification for the gsl1680 interrupt |
| 14 | - power-gpios : Specification for the pin connected to the gsl1680's | 12 | - power-gpios : Specification for the pin connected to the gsl1680's |
| 15 | shutdown input. This needs to be driven high to take the | 13 | shutdown input. This needs to be driven high to take the |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "sis,9200-ts" | 4 | - compatible: must be "sis,9200-ts" |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | (see interrupt binding [0]) | ||
| 8 | - interrupts: touch controller interrupt (see interrupt | 6 | - interrupts: touch controller interrupt (see interrupt |
| 9 | binding [0]) | 7 | binding [0]) |
| 10 | 8 | ||
| @@ -10,8 +10,6 @@ coordinates. · 9 unmodified lines | |||
| 10 | Required properties: | 10 | Required properties: |
| 11 | - compatible : must be "st,stmfts" | 11 | - compatible : must be "st,stmfts" |
| 12 | - reg : I2C slave address, (e.g. 0x49) | 12 | - reg : I2C slave address, (e.g. 0x49) |
| 13 | - interrupt-parent : the phandle to the interrupt controller which provides | ||
| 14 | the interrupt | ||
| 15 | - interrupts : interrupt specification | 13 | - interrupts : interrupt specification |
| 16 | - avdd-supply : analogic power supply | 14 | - avdd-supply : analogic power supply |
| 17 | - vdd-supply : power supply | 15 | - vdd-supply : power supply |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "semtech,sx8654" | 4 | - compatible: must be "semtech,sx8654" |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: touch controller interrupt | 6 | - interrupts: touch controller interrupt |
| 8 | 7 | ||
| 9 | Example: | 8 | Example: |
| @@ -7,6 +7,9 @@ Optional properties for Touchscreens: · 6 unmodified lines | |||
| 7 | (in pixels) | 7 | (in pixels) |
| 8 | - touchscreen-max-pressure : maximum reported pressure (arbitrary range | 8 | - touchscreen-max-pressure : maximum reported pressure (arbitrary range |
| 9 | dependent on the controller) | 9 | dependent on the controller) |
| 10 | - touchscreen-min-pressure : minimum pressure on the touchscreen to be | ||
| 11 | achieved in order for the touchscreen | ||
| 12 | driver to report a touch event. | ||
| 10 | - touchscreen-fuzz-x : horizontal noise value of the absolute input | 13 | - touchscreen-fuzz-x : horizontal noise value of the absolute input |
| 11 | device (in pixels) | 14 | device (in pixels) |
| 12 | - touchscreen-fuzz-y : vertical noise value of the absolute input | 15 | - touchscreen-fuzz-y : vertical noise value of the absolute input |
| @@ -9,8 +9,6 @@ Optional properties: · 8 unmodified lines | |||
| 9 | - gpios: the interrupt gpio the chip is connected to (trough the penirq pin). | 9 | - gpios: the interrupt gpio the chip is connected to (trough the penirq pin). |
| 10 | The penirq pin goes to low when the panel is touched. | 10 | The penirq pin goes to low when the panel is touched. |
| 11 | (see GPIO binding[1] for more details). | 11 | (see GPIO binding[1] for more details). |
| 12 | - interrupt-parent: the phandle for the gpio controller | ||
| 13 | (see interrupt binding[0]). | ||
| 14 | - interrupts: (gpio) interrupt to which the chip is connected | 12 | - interrupts: (gpio) interrupt to which the chip is connected |
| 15 | (see interrupt binding[0]). | 13 | (see interrupt binding[0]). |
| 16 | - ti,max-rt: maximum pressure. | 14 | - ti,max-rt: maximum pressure. |
| @@ -3,8 +3,6 @@ Zeitec ZET6223 I2C touchscreen controller · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "zeitec,zet6223" | 4 | - compatible : "zeitec,zet6223" |
| 5 | - reg : I2C slave address of the chip (0x76) | 5 | - reg : I2C slave address of the chip (0x76) |
| 6 | - interrupt-parent : a phandle pointing to the interrupt controller | ||
| 7 | serving the interrupt for this chip | ||
| 8 | - interrupts : interrupt specification for the zet6223 interrupt | 6 | - interrupts : interrupt specification for the zet6223 interrupt |
| 9 | 7 | ||
| 10 | Optional properties: | 8 | Optional properties: |
| @@ -13,7 +13,6 @@ Required properties · 12 unmodified lines | |||
| 13 | - interrupt-congroller: Identifies the node as an interrupt controller. | 13 | - interrupt-congroller: Identifies the node as an interrupt controller. |
| 14 | - #interrupt cells: Specifies the number of cells used to encode an interrupt | 14 | - #interrupt cells: Specifies the number of cells used to encode an interrupt |
| 15 | source connected to this controller. The value shall be 2. | 15 | source connected to this controller. The value shall be 2. |
| 16 | - interrupt-parent: Specifies the parent interrupt controller. | ||
| 17 | - interrupts: Specifies the list of interrupt lines which are handled by | 16 | - interrupts: Specifies the list of interrupt lines which are handled by |
| 18 | the interrupt controller in the parent controller's notation. Interrupts | 17 | the interrupt controller in the parent controller's notation. Interrupts |
| 19 | are mapped one-to-one to parent interrupts. | 18 | are mapped one-to-one to parent interrupts. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | - compatible: should be "al,alpine-msix" | 7 | - compatible: should be "al,alpine-msix" |
| 8 | - reg: physical base address and size of the registers | 8 | - reg: physical base address and size of the registers |
| 9 | - interrupt-parent: specifies the parent interrupt controller. | ||
| 10 | - interrupt-controller: identifies the node as an interrupt controller | 9 | - interrupt-controller: identifies the node as an interrupt controller |
| 11 | - msi-controller: identifies the node as an PCI Message Signaled Interrupt | 10 | - msi-controller: identifies the node as an PCI Message Signaled Interrupt |
| 12 | controller | 11 | controller |
| @@ -13,7 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode an | 13 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 14 | interrupt source. The value shall be 2. The first cell is the IRQ number, the | 14 | interrupt source. The value shall be 2. The first cell is the IRQ number, the |
| 15 | second cell the trigger type as defined in interrupt.txt in this directory. | 15 | second cell the trigger type as defined in interrupt.txt in this directory. |
| 16 | - interrupt-parent: Specifies the parent interrupt controller. | ||
| 17 | - interrupts: Specifies the interrupt line (NMI) which is handled by | 16 | - interrupts: Specifies the interrupt line (NMI) which is handled by |
| 18 | the interrupt controller in the parent controller's notation. This value | 17 | the interrupt controller in the parent controller's notation. This value |
| 19 | shall be the NMI. | 18 | shall be the NMI. |
| @@ -15,9 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or | 15 | "amlogic,meson-gxbb-gpio-intc" for GXBB SoCs (S905) or |
| 16 | "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) | 16 | "amlogic,meson-gxl-gpio-intc" for GXL SoCs (S905X, S912) |
| 17 | "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X) | 17 | "amlogic,meson-axg-gpio-intc" for AXG SoCs (A113D, A113X) |
| 18 | - interrupt-parent : a phandle to the GIC the interrupts are routed to. | ||
| 19 | Usually this is provided at the root level of the device tree as it is | ||
| 20 | common to most of the SoC. | ||
| 21 | - reg : Specifies base physical address and size of the registers. | 18 | - reg : Specifies base physical address and size of the registers. |
| 22 | - interrupt-controller : Identifies the node as an interrupt controller. | 19 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 23 | - #interrupt-cells : Specifies the number of cells needed to encode an | 20 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "atmel,<chip>-aic" | 4 | - compatible: Should be "atmel,<chip>-aic" |
| 5 | <chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4" | 5 | <chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4" |
| 6 | - interrupt-controller: Identifies the node as an interrupt controller. | 6 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 7 | - interrupt-parent: For single AIC system, it is an empty property. | ||
| 8 | - #interrupt-cells: The number of cells to define the interrupts. It should be 3. | 7 | - #interrupt-cells: The number of cells to define the interrupts. It should be 3. |
| 9 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). | 8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). |
| 10 | The second cell is used to specify flags: | 9 | The second cell is used to specify flags: |
| @@ -27,7 +26,6 @@ Examples: · 16 unmodified lines | |||
| 27 | aic: interrupt-controller@fffff000 { | 26 | aic: interrupt-controller@fffff000 { |
| 28 | compatible = "atmel,at91rm9200-aic"; | 27 | compatible = "atmel,at91rm9200-aic"; |
| 29 | interrupt-controller; | 28 | interrupt-controller; |
| 30 | interrupt-parent; | ||
| 31 | #interrupt-cells = <3>; | 29 | #interrupt-cells = <3>; |
| 32 | reg = <0xfffff000 0x200>; | 30 | reg = <0xfffff000 0x200>; |
| 33 | }; | 31 | }; |
| @@ -26,8 +26,6 @@ Required properties: · 25 unmodified lines | |||
| 26 | are 0..7 for bank 0, and 0..31 for bank 1. | 26 | are 0..7 for bank 0, and 0..31 for bank 1. |
| 27 | 27 | ||
| 28 | Additional required properties for brcm,bcm2836-armctrl-ic: | 28 | Additional required properties for brcm,bcm2836-armctrl-ic: |
| 29 | - interrupt-parent : Specifies the parent interrupt controller when this | ||
| 30 | controller is the second level. | ||
| 31 | - interrupts : Specifies the interrupt on the parent for this interrupt | 29 | - interrupts : Specifies the interrupt on the parent for this interrupt |
| 32 | controller to handle. | 30 | controller to handle. |
| 33 | 31 | ||
| @@ -18,8 +18,6 @@ Required properties: · 17 unmodified lines | |||
| 18 | - interrupt-controller: identifies the node as an interrupt controller | 18 | - interrupt-controller: identifies the node as an interrupt controller |
| 19 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | 19 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt |
| 20 | source, should be 1. | 20 | source, should be 1. |
| 21 | - interrupt-parent: specifies the phandle to the parent interrupt controller | ||
| 22 | this one is cascaded from | ||
| 23 | - interrupts: specifies the interrupt line in the interrupt-parent controller | 21 | - interrupts: specifies the interrupt line in the interrupt-parent controller |
| 24 | node, valid values depend on the type of parent interrupt controller | 22 | node, valid values depend on the type of parent interrupt controller |
| 25 | 23 | ||
| @@ -29,8 +29,6 @@ Required properties: · 28 unmodified lines | |||
| 29 | - interrupt-controller: identifies the node as an interrupt controller | 29 | - interrupt-controller: identifies the node as an interrupt controller |
| 30 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | 30 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt |
| 31 | source, should be 1. | 31 | source, should be 1. |
| 32 | - interrupt-parent: specifies the phandle to the parent interrupt controller(s) | ||
| 33 | this one is cascaded from | ||
| 34 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller | 32 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller |
| 35 | node; valid values depend on the type of parent interrupt controller | 33 | node; valid values depend on the type of parent interrupt controller |
| 36 | 34 | ||
| @@ -28,8 +28,6 @@ Required properties: · 27 unmodified lines | |||
| 28 | - interrupt-controller: identifies the node as an interrupt controller | 28 | - interrupt-controller: identifies the node as an interrupt controller |
| 29 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | 29 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt |
| 30 | source, should be 1. | 30 | source, should be 1. |
| 31 | - interrupt-parent: specifies the phandle to the parent interrupt controller(s) | ||
| 32 | this one is cascaded from | ||
| 33 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller | 31 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller |
| 34 | node; valid values depend on the type of parent interrupt controller | 32 | node; valid values depend on the type of parent interrupt controller |
| 35 | 33 | ||
| @@ -56,8 +56,6 @@ Required properties: · 55 unmodified lines | |||
| 56 | - interrupt-controller: identifies the node as an interrupt controller | 56 | - interrupt-controller: identifies the node as an interrupt controller |
| 57 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | 57 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt |
| 58 | source, should be 1. | 58 | source, should be 1. |
| 59 | - interrupt-parent: specifies the phandle to the parent interrupt controller | ||
| 60 | this one is cascaded from | ||
| 61 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller | 59 | - interrupts: specifies the interrupt line(s) in the interrupt-parent controller |
| 62 | node, valid values depend on the type of parent interrupt controller | 60 | node, valid values depend on the type of parent interrupt controller |
| 63 | - brcm,int-map-mask: 32-bits bit mask describing how many and which interrupts | 61 | - brcm,int-map-mask: 32-bits bit mask describing how many and which interrupts |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - interrupt-controller: identifies the node as an interrupt controller | 8 | - interrupt-controller: identifies the node as an interrupt controller |
| 9 | - #interrupt-cells: specifies the number of cells needed to encode an | 9 | - #interrupt-cells: specifies the number of cells needed to encode an |
| 10 | interrupt source. Should be 1. | 10 | interrupt source. Should be 1. |
| 11 | - interrupt-parent: specifies the phandle to the parent interrupt controller | ||
| 12 | this controller is cacaded from | ||
| 13 | - interrupts: specifies the interrupt line in the interrupt-parent irq space | 11 | - interrupts: specifies the interrupt line in the interrupt-parent irq space |
| 14 | to be used for cascading | 12 | to be used for cascading |
| 15 | 13 | ||
| @@ -13,9 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | - reg: physical base address of the controller and length of memory mapped. | 13 | - reg: physical base address of the controller and length of memory mapped. |
| 14 | - interrupts: an interrupt to the parent interrupt controller. | 14 | - interrupts: an interrupt to the parent interrupt controller. |
| 15 | 15 | ||
| 16 | Optional properties: | ||
| 17 | - interrupt-parent: the phandle to the parent interrupt controller. | ||
| 18 | |||
| 19 | This interrupt controller hardware is a second level interrupt controller that | 16 | This interrupt controller hardware is a second level interrupt controller that |
| 20 | is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based | 17 | is hooked to a parent interrupt controller: e.g: ARM GIC for ARM-based |
| 21 | platforms. If interrupt-parent is not provided, the default parent interrupt | 18 | platforms. If interrupt-parent is not provided, the default parent interrupt |
| @@ -68,8 +68,6 @@ Examples: · 67 unmodified lines | |||
| 68 | 68 | ||
| 69 | Devices connect to mbigen required properties: | 69 | Devices connect to mbigen required properties: |
| 70 | ---------------------------------------------------- | 70 | ---------------------------------------------------- |
| 71 | -interrupt-parent: Specifies the mbigen device node which device connected. | ||
| 72 | |||
| 73 | -interrupts:Specifies the interrupt source. | 71 | -interrupts:Specifies the interrupt source. |
| 74 | For the specific information of each cell in this property,please refer to | 72 | For the specific information of each cell in this property,please refer to |
| 75 | the "interrupt-cells" description mentioned above. | 73 | the "interrupt-cells" description mentioned above. |
| @@ -4,6 +4,7 @@ Required properties: · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | - compatible : should be "ingenic,<socname>-intc". Valid strings are: | 5 | - compatible : should be "ingenic,<socname>-intc". Valid strings are: |
| 6 | ingenic,jz4740-intc | 6 | ingenic,jz4740-intc |
| 7 | ingenic,jz4725b-intc | ||
| 7 | ingenic,jz4770-intc | 8 | ingenic,jz4770-intc |
| 8 | ingenic,jz4775-intc | 9 | ingenic,jz4775-intc |
| 9 | ingenic,jz4780-intc | 10 | ingenic,jz4780-intc |
| @@ -11,7 +12,6 @@ Required properties: · 1 unmodified line | |||
| 11 | - interrupt-controller : Identifies the node as an interrupt controller | 12 | - interrupt-controller : Identifies the node as an interrupt controller |
| 12 | - #interrupt-cells : Specifies the number of cells needed to encode an | 13 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 13 | interrupt source. The value shall be 1. | 14 | interrupt source. The value shall be 1. |
| 14 | - interrupt-parent : phandle of the CPU interrupt controller. | ||
| 15 | - interrupts : Specifies the CPU interrupt the controller is connected to. | 15 | - interrupts : Specifies the CPU interrupt the controller is connected to. |
| 16 | 16 | ||
| 17 | Example: | 17 | Example: |
| @@ -26,8 +26,6 @@ Required properties: · 25 unmodified lines | |||
| 26 | See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt | 26 | See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt |
| 27 | for details about the GIC Device Tree binding. | 27 | for details about the GIC Device Tree binding. |
| 28 | 28 | ||
| 29 | - interrupt-parent : Reference to the parent interrupt controller. | ||
| 30 | |||
| 31 | Example: | 29 | Example: |
| 32 | 30 | ||
| 33 | odmi: odmi@300000 { | 31 | odmi: odmi@300000 { |
| @@ -16,8 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | and "mediatek,cirq" as a fallback. | 16 | and "mediatek,cirq" as a fallback. |
| 17 | - interrupt-controller : Identifies the node as an interrupt controller. | 17 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 18 | - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. | 18 | - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. |
| 19 | - interrupt-parent: phandle of irq parent for cirq. The parent must | ||
| 20 | use the same interrupt-cells format as GIC. | ||
| 21 | - reg: Physical base address of the cirq registers and length of memory | 19 | - reg: Physical base address of the cirq registers and length of memory |
| 22 | mapped region. | 20 | mapped region. |
| 23 | - mediatek,ext-irq-range: Identifies external irq number range in different | 21 | - mediatek,ext-irq-range: Identifies external irq number range in different |
| @@ -11,6 +11,7 @@ Required properties: · 10 unmodified lines | |||
| 11 | "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 | 11 | "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622 |
| 12 | "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 | 12 | "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795 |
| 13 | "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 | 13 | "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797 |
| 14 | "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765 | ||
| 14 | "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 | 15 | "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755 |
| 15 | "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 | 16 | "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592 |
| 16 | "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589 | 17 | "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589 |
| @@ -21,8 +22,6 @@ Required properties: · 4 unmodified lines | |||
| 21 | "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 | 22 | "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701 |
| 22 | - interrupt-controller : Identifies the node as an interrupt controller | 23 | - interrupt-controller : Identifies the node as an interrupt controller |
| 23 | - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. | 24 | - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt. |
| 24 | - interrupt-parent: phandle of irq parent for sysirq. The parent must | ||
| 25 | use the same interrupt-cells format as GIC. | ||
| 26 | - reg: Physical base address of the intpol registers and length of memory | 25 | - reg: Physical base address of the intpol registers and length of memory |
| 27 | mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others | 26 | mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others |
| 28 | need 1. | 27 | need 1. |
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - interrupt-controller : Identifies the node as an interrupt controller | 7 | - interrupt-controller : Identifies the node as an interrupt controller |
| 8 | - #interrupt-cells : Specifies the number of cells needed to encode an | 8 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 9 | interrupt source. The value shall be 1. | 9 | interrupt source. The value shall be 1. |
| 10 | - interrupt-parent : phandle of the CPU interrupt controller. | ||
| 11 | - interrupts : Specifies the CPU interrupt the controller is connected to. | 10 | - interrupts : Specifies the CPU interrupt the controller is connected to. |
| 12 | 11 | ||
| 13 | Example: | 12 | Example: |
| @@ -15,12 +15,10 @@ Required properties: · 14 unmodified lines | |||
| 15 | include "nvidia,tegra30-ictlr". | 15 | include "nvidia,tegra30-ictlr". |
| 16 | - reg : Specifies base physical address and size of the registers. | 16 | - reg : Specifies base physical address and size of the registers. |
| 17 | Each controller must be described separately (Tegra20 has 4 of them, | 17 | Each controller must be described separately (Tegra20 has 4 of them, |
| 18 | whereas Tegra30 and later have 5" | 18 | whereas Tegra30 and later have 5). |
| 19 | - interrupt-controller : Identifies the node as an interrupt controller. | 19 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 20 | - #interrupt-cells : Specifies the number of cells needed to encode an | 20 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 21 | interrupt source. The value must be 3. | 21 | interrupt source. The value must be 3. |
| 22 | - interrupt-parent : a phandle to the GIC these interrupts are routed | ||
| 23 | to. | ||
| 24 | 22 | ||
| 25 | Notes: | 23 | Notes: |
| 26 | 24 | ||
| @@ -14,8 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | Reset value is IRQ_TYPE_LEVEL_LOW. | 14 | Reset value is IRQ_TYPE_LEVEL_LOW. |
| 15 | 15 | ||
| 16 | Optional properties: | 16 | Optional properties: |
| 17 | - interrupt-parent: empty for MIC interrupt controller, link to parent | ||
| 18 | MIC interrupt controller for SIC1 and SIC2 | ||
| 19 | - interrupts: empty for MIC interrupt controller, cascaded MIC | 17 | - interrupts: empty for MIC interrupt controller, cascaded MIC |
| 20 | hardware interrupts for SIC1 and SIC2 | 18 | hardware interrupts for SIC1 and SIC2 |
| 21 | 19 | ||
| @@ -7,7 +7,6 @@ Required Properties: · 6 unmodified lines | |||
| 7 | - compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or | 7 | - compatible: has to be "qca,<soctype>-cpu-intc", "qca,ar7100-misc-intc" or |
| 8 | "qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc" | 8 | "qca,<soctype>-cpu-intc", "qca,ar7240-misc-intc" |
| 9 | - reg: Base address and size of the controllers memory area | 9 | - reg: Base address and size of the controllers memory area |
| 10 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 11 | - interrupts: Interrupt specifier for the controllers interrupt. | 10 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 12 | - interrupt-controller : Identifies the node as an interrupt controller | 11 | - interrupt-controller : Identifies the node as an interrupt controller |
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode interrupt | 12 | - #interrupt-cells : Specifies the number of cells needed to encode interrupt |
| @@ -35,12 +35,6 @@ Properties: · 34 unmodified lines | |||
| 35 | interrupt. | 35 | interrupt. |
| 36 | The second element is the trigger type. | 36 | The second element is the trigger type. |
| 37 | 37 | ||
| 38 | - interrupt-parent: | ||
| 39 | Usage: required | ||
| 40 | Value type: <phandle> | ||
| 41 | Definition: Specifies the interrupt parent necessary for hierarchical | ||
| 42 | domain to operate. | ||
| 43 | |||
| 44 | - interrupt-controller: | 38 | - interrupt-controller: |
| 45 | Usage: required | 39 | Usage: required |
| 46 | Value type: <bool> | 40 | Value type: <bool> |
| @@ -7,15 +7,18 @@ Required properties: · 6 unmodified lines | |||
| 7 | - "renesas,irqc-r8a73a4" (R-Mobile APE6) | 7 | - "renesas,irqc-r8a73a4" (R-Mobile APE6) |
| 8 | - "renesas,irqc-r8a7743" (RZ/G1M) | 8 | - "renesas,irqc-r8a7743" (RZ/G1M) |
| 9 | - "renesas,irqc-r8a7745" (RZ/G1E) | 9 | - "renesas,irqc-r8a7745" (RZ/G1E) |
| 10 | - "renesas,irqc-r8a77470" (RZ/G1C) | ||
| 10 | - "renesas,irqc-r8a7790" (R-Car H2) | 11 | - "renesas,irqc-r8a7790" (R-Car H2) |
| 11 | - "renesas,irqc-r8a7791" (R-Car M2-W) | 12 | - "renesas,irqc-r8a7791" (R-Car M2-W) |
| 12 | - "renesas,irqc-r8a7792" (R-Car V2H) | 13 | - "renesas,irqc-r8a7792" (R-Car V2H) |
| 13 | - "renesas,irqc-r8a7793" (R-Car M2-N) | 14 | - "renesas,irqc-r8a7793" (R-Car M2-N) |
| 14 | - "renesas,irqc-r8a7794" (R-Car E2) | 15 | - "renesas,irqc-r8a7794" (R-Car E2) |
| 16 | - "renesas,intc-ex-r8a774a1" (RZ/G2M) | ||
| 15 | - "renesas,intc-ex-r8a7795" (R-Car H3) | 17 | - "renesas,intc-ex-r8a7795" (R-Car H3) |
| 16 | - "renesas,intc-ex-r8a7796" (R-Car M3-W) | 18 | - "renesas,intc-ex-r8a7796" (R-Car M3-W) |
| 17 | - "renesas,intc-ex-r8a77965" (R-Car M3-N) | 19 | - "renesas,intc-ex-r8a77965" (R-Car M3-N) |
| 18 | - "renesas,intc-ex-r8a77970" (R-Car V3M) | 20 | - "renesas,intc-ex-r8a77970" (R-Car V3M) |
| 21 | - "renesas,intc-ex-r8a77980" (R-Car V3H) | ||
| 19 | - "renesas,intc-ex-r8a77995" (R-Car D3) | 22 | - "renesas,intc-ex-r8a77995" (R-Car D3) |
| 20 | - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in | 23 | - #interrupt-cells: has to be <2>: an interrupt index and flags, as defined in |
| 21 | interrupts.txt in this directory | 24 | interrupts.txt in this directory |
| @@ -0,0 +1,44 @@ | |||
| 1 | RISC-V Hart-Level Interrupt Controller (HLIC) | ||
| 2 | --------------------------------------------- | ||
| 3 | |||
| 4 | RISC-V cores include Control Status Registers (CSRs) which are local to each | ||
| 5 | CPU core (HART in RISC-V terminology) and can be read or written by software. | ||
| 6 | Some of these CSRs are used to control local interrupts connected to the core. | ||
| 7 | Every interrupt is ultimately routed through a hart's HLIC before it | ||
| 8 | interrupts that hart. | ||
| 9 | |||
| 10 | The RISC-V supervisor ISA manual specifies three interrupt sources that are | ||
| 11 | attached to every HLIC: software interrupts, the timer interrupt, and external | ||
| 12 | interrupts. Software interrupts are used to send IPIs between cores. The | ||
| 13 | timer interrupt comes from an architecturally mandated real-time timer that is | ||
| 14 | controller via Supervisor Binary Interface (SBI) calls and CSR reads. External | ||
| 15 | interrupts connect all other device interrupts to the HLIC, which are routed | ||
| 16 | via the platform-level interrupt controller (PLIC). | ||
| 17 | |||
| 18 | All RISC-V systems that conform to the supervisor ISA specification are | ||
| 19 | required to have a HLIC with these three interrupt sources present. Since the | ||
| 20 | interrupt map is defined by the ISA it's not listed in the HLIC's device tree | ||
| 21 | entry, though external interrupt controllers (like the PLIC, for example) will | ||
| 22 | need to define how their interrupts map to the relevant HLICs. This means | ||
| 23 | a PLIC interrupt property will typically list the HLICs for all present HARTs | ||
| 24 | in the system. | ||
| 25 | |||
| 26 | Required properties: | ||
| 27 | - compatible : "riscv,cpu-intc" | ||
| 28 | - #interrupt-cells : should be <1> | ||
| 29 | - interrupt-controller : Identifies the node as an interrupt controller | ||
| 30 | |||
| 31 | Furthermore, this interrupt-controller MUST be embedded inside the cpu | ||
| 32 | definition of the hart whose CSRs control these local interrupts. | ||
| 33 | |||
| 34 | An example device tree entry for a HLIC is show below. | ||
| 35 | |||
| 36 | cpu1: cpu@1 { | ||
| 37 | compatible = "riscv"; | ||
| 38 | ... | ||
| 39 | cpu1-intc: interrupt-controller { | ||
| 40 | #interrupt-cells = <1>; | ||
| 41 | compatible = "riscv,cpu-intc", "sifive,fu540-c000-cpu-intc"; | ||
| 42 | interrupt-controller; | ||
| 43 | }; | ||
| 44 | }; | ||
| @@ -32,8 +32,6 @@ Optional properties: · 31 unmodified lines | |||
| 32 | - samsung,combiner-nr: The number of interrupt combiners supported. If this | 32 | - samsung,combiner-nr: The number of interrupt combiners supported. If this |
| 33 | property is not specified, the default number of combiners is assumed | 33 | property is not specified, the default number of combiners is assumed |
| 34 | to be 16. | 34 | to be 16. |
| 35 | - interrupt-parent: pHandle of the parent interrupt controller, if not | ||
| 36 | inherited from the parent node. | ||
| 37 | 35 | ||
| 38 | 36 | ||
| 39 | Example: | 37 | Example: |
| @@ -0,0 +1,58 @@ | |||
| 1 | SiFive Platform-Level Interrupt Controller (PLIC) | ||
| 2 | ------------------------------------------------- | ||
| 3 | |||
| 4 | SiFive SOCs include an implementation of the Platform-Level Interrupt Controller | ||
| 5 | (PLIC) high-level specification in the RISC-V Privileged Architecture | ||
| 6 | specification. The PLIC connects all external interrupts in the system to all | ||
| 7 | hart contexts in the system, via the external interrupt source in each hart. | ||
| 8 | |||
| 9 | A hart context is a privilege mode in a hardware execution thread. For example, | ||
| 10 | in an 4 core system with 2-way SMT, you have 8 harts and probably at least two | ||
| 11 | privilege modes per hart; machine mode and supervisor mode. | ||
| 12 | |||
| 13 | Each interrupt can be enabled on per-context basis. Any context can claim | ||
| 14 | a pending enabled interrupt and then release it once it has been handled. | ||
| 15 | |||
| 16 | Each interrupt has a configurable priority. Higher priority interrupts are | ||
| 17 | serviced first. Each context can specify a priority threshold. Interrupts | ||
| 18 | with priority below this threshold will not cause the PLIC to raise its | ||
| 19 | interrupt line leading to the context. | ||
| 20 | |||
| 21 | While the PLIC supports both edge-triggered and level-triggered interrupts, | ||
| 22 | interrupt handlers are oblivious to this distinction and therefore it is not | ||
| 23 | specified in the PLIC device-tree binding. | ||
| 24 | |||
| 25 | While the RISC-V ISA doesn't specify a memory layout for the PLIC, the | ||
| 26 | "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that | ||
| 27 | contains a specific memory layout, which is documented in chapter 8 of the | ||
| 28 | SiFive U5 Coreplex Series Manual <https://static.dev.sifive.com/U54-MC-RVCoreIP.pdf>. | ||
| 29 | |||
| 30 | Required properties: | ||
| 31 | - compatible : "sifive,plic-1.0.0" and a string identifying the actual | ||
| 32 | detailed implementation in case that specific bugs need to be worked around. | ||
| 33 | - #address-cells : should be <0> or more. | ||
| 34 | - #interrupt-cells : should be <1> or more. | ||
| 35 | - interrupt-controller : Identifies the node as an interrupt controller. | ||
| 36 | - reg : Should contain 1 register range (address and length). | ||
| 37 | - interrupts-extended : Specifies which contexts are connected to the PLIC, | ||
| 38 | with "-1" specifying that a context is not present. Each node pointed | ||
| 39 | to should be a riscv,cpu-intc node, which has a riscv node as parent. | ||
| 40 | - riscv,ndev: Specifies how many external interrupts are supported by | ||
| 41 | this controller. | ||
| 42 | |||
| 43 | Example: | ||
| 44 | |||
| 45 | plic: interrupt-controller@c000000 { | ||
| 46 | #address-cells = <0>; | ||
| 47 | #interrupt-cells = <1>; | ||
| 48 | compatible = "sifive,plic-1.0.0", "sifive,fu540-c000-plic"; | ||
| 49 | interrupt-controller; | ||
| 50 | interrupts-extended = < | ||
| 51 | &cpu0-intc 11 | ||
| 52 | &cpu1-intc 11 &cpu1-intc 9 | ||
| 53 | &cpu2-intc 11 &cpu2-intc 9 | ||
| 54 | &cpu3-intc 11 &cpu3-intc 9 | ||
| 55 | &cpu4-intc 11 &cpu4-intc 9>; | ||
| 56 | reg = <0xc000000 0x4000000>; | ||
| 57 | riscv,ndev = <10>; | ||
| 58 | }; | ||
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: should be "sigma,smp8642-intc" | 4 | - compatible: should be "sigma,smp8642-intc" |
| 5 | - reg: physical address of MMIO region | 5 | - reg: physical address of MMIO region |
| 6 | - ranges: address space mapping of child nodes | 6 | - ranges: address space mapping of child nodes |
| 7 | - interrupt-parent: phandle of parent interrupt controller | ||
| 8 | - interrupt-controller: boolean | 7 | - interrupt-controller: boolean |
| 9 | - #address-cells: should be <1> | 8 | - #address-cells: should be <1> |
| 10 | - #size-cells: should be <1> | 9 | - #size-cells: should be <1> |
| @@ -7,7 +7,6 @@ Properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | - compatible: "snps,archs-idu-intc" | 8 | - compatible: "snps,archs-idu-intc" |
| 9 | - interrupt-controller: This is an interrupt controller. | 9 | - interrupt-controller: This is an interrupt controller. |
| 10 | - interrupt-parent: <reference to parent core intc> | ||
| 11 | - #interrupt-cells: Must be <1>. | 10 | - #interrupt-cells: Must be <1>. |
| 12 | 11 | ||
| 13 | Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N | 12 | Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N |
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | - interrupt-controller: identifies the node as an interrupt controller | 11 | - interrupt-controller: identifies the node as an interrupt controller |
| 12 | - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 | 12 | - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 |
| 13 | - interrupts: interrupt reference to primary interrupt controller | 13 | - interrupts: interrupt reference to primary interrupt controller |
| 14 | - interrupt-parent: (optional) reference specific primary interrupt controller | ||
| 15 | 14 | ||
| 16 | The interrupt sources map to the corresponding bits in the interrupt | 15 | The interrupt sources map to the corresponding bits in the interrupt |
| 17 | registers, i.e. | 16 | registers, i.e. |
| @@ -12,7 +12,6 @@ Required properties: · 11 unmodified lines | |||
| 12 | - interrupt-controller : Identifies the node as an interrupt controller. | 12 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode an | 13 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 14 | interrupt source. The value must be 3. | 14 | interrupt source. The value must be 3. |
| 15 | - interrupt-parent : phandle of the GIC these interrupts are routed to. | ||
| 16 | - socionext,spi-base : The SPI number of the first SPI of the 32 adjacent | 15 | - socionext,spi-base : The SPI number of the first SPI of the 32 adjacent |
| 17 | ones the EXIU forwards its interrups to. | 16 | ones the EXIU forwards its interrups to. |
| 18 | 17 | ||
| @@ -31,10 +31,6 @@ Required properties: · 30 unmodified lines | |||
| 31 | parent) is equal to number of groups. The format of the interrupt | 31 | parent) is equal to number of groups. The format of the interrupt |
| 32 | specifier depends in the interrupt parent controller. | 32 | specifier depends in the interrupt parent controller. |
| 33 | 33 | ||
| 34 | Optional properties: | ||
| 35 | - interrupt-parent: pHandle of the parent interrupt controller, if not | ||
| 36 | inherited from the parent node. | ||
| 37 | |||
| 38 | Example: | 34 | Example: |
| 39 | 35 | ||
| 40 | The following is an example from the SPEAr320 SoC dtsi file. | 36 | The following is an example from the SPEAr320 SoC dtsi file. |
| @@ -12,7 +12,7 @@ Required properties: · 11 unmodified lines | |||
| 12 | specifier, shall be 2 | 12 | specifier, shall be 2 |
| 13 | - interrupts: interrupts references to primary interrupt controller | 13 | - interrupts: interrupts references to primary interrupt controller |
| 14 | (only needed for exti controller with multiple exti under | 14 | (only needed for exti controller with multiple exti under |
| 15 | same parent interrupt: st,stm32-exti and st,stm32h7-exti") | 15 | same parent interrupt: st,stm32-exti and st,stm32h7-exti) |
| 16 | 16 | ||
| 17 | Example: | 17 | Example: |
| 18 | 18 | ||
| @@ -11,6 +11,4 @@ Required properties: · 10 unmodified lines | |||
| 11 | region | 11 | region |
| 12 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt | 12 | - #interrupt-cells: specifies the number of cells needed to encode an interrupt |
| 13 | source, should be 1. | 13 | source, should be 1. |
| 14 | - interrupt-parent: phandle to the parent interrupt controller this one is | ||
| 15 | cascaded from | ||
| 16 | - interrupts: specifies the interrupt line in the interrupt-parent controller | 14 | - interrupts: specifies the interrupt line in the interrupt-parent controller |
| @@ -46,7 +46,6 @@ C6X Interrupt Chips · 45 unmodified lines | |||
| 46 | - interrupt-controller | 46 | - interrupt-controller |
| 47 | - #interrupt-cells: <1> | 47 | - #interrupt-cells: <1> |
| 48 | - reg: base address and size of register area | 48 | - reg: base address and size of register area |
| 49 | - interrupt-parent: must be core interrupt controller | ||
| 50 | - interrupts: This should have four cells; one for each interrupt combiner. | 49 | - interrupts: This should have four cells; one for each interrupt combiner. |
| 51 | The cells contain the core priority interrupt to which the | 50 | The cells contain the core priority interrupt to which the |
| 52 | corresponding combiner output is wired. | 51 | corresponding combiner output is wired. |
| @@ -12,8 +12,6 @@ Required properties: · 11 unmodified lines | |||
| 12 | - interrupt-controller : Identifies the node as an interrupt controller. | 12 | - interrupt-controller : Identifies the node as an interrupt controller. |
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode an | 13 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 14 | interrupt source. The value must be 3. | 14 | interrupt source. The value must be 3. |
| 15 | - interrupt-parent : a phandle to the GIC these interrupts are routed | ||
| 16 | to. | ||
| 17 | 15 | ||
| 18 | Notes: | 16 | Notes: |
| 19 | 17 | ||
| @@ -40,6 +40,7 @@ video decode local arbiter, all these ports are according to the video HW. · 39 unmodified lines | |||
| 40 | Required properties: | 40 | Required properties: |
| 41 | - compatible : must be one of the following string: | 41 | - compatible : must be one of the following string: |
| 42 | "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. | 42 | "mediatek,mt2701-m4u" for mt2701 which uses generation one m4u HW. |
| 43 | "mediatek,mt2712-m4u" for mt2712 which uses generation two m4u HW. | ||
| 43 | "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. | 44 | "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. |
| 44 | - reg : m4u register base and size. | 45 | - reg : m4u register base and size. |
| 45 | - interrupts : the interrupt of m4u. | 46 | - interrupts : the interrupt of m4u. |
| @@ -50,8 +51,9 @@ Required properties: · 4 unmodified lines | |||
| 50 | according to the local arbiter index, like larb0, larb1, larb2... | 51 | according to the local arbiter index, like larb0, larb1, larb2... |
| 51 | - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. | 52 | - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. |
| 52 | Specifies the mtk_m4u_id as defined in | 53 | Specifies the mtk_m4u_id as defined in |
| 53 | dt-binding/memory/mt2701-larb-port.h for mt2701 and | 54 | dt-binding/memory/mt2701-larb-port.h for mt2701, |
| 54 | dt-binding/memory/mt8173-larb-port.h for mt8173 | 55 | dt-binding/memory/mt2712-larb-port.h for mt2712, and |
| 56 | dt-binding/memory/mt8173-larb-port.h for mt8173. | ||
| 55 | 57 | ||
| 56 | Example: | 58 | Example: |
| 57 | iommu: iommu@10205000 { | 59 | iommu: iommu@10205000 { |
| @@ -19,7 +19,10 @@ Required Properties: · 18 unmodified lines | |||
| 19 | - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU. | 19 | - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU. |
| 20 | - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU. | 20 | - "renesas,ipmmu-r8a7795" for the R8A7795 (R-Car H3) IPMMU. |
| 21 | - "renesas,ipmmu-r8a7796" for the R8A7796 (R-Car M3-W) IPMMU. | 21 | - "renesas,ipmmu-r8a7796" for the R8A7796 (R-Car M3-W) IPMMU. |
| 22 | - "renesas,ipmmu-r8a77965" for the R8A77965 (R-Car M3-N) IPMMU. | ||
| 22 | - "renesas,ipmmu-r8a77970" for the R8A77970 (R-Car V3M) IPMMU. | 23 | - "renesas,ipmmu-r8a77970" for the R8A77970 (R-Car V3M) IPMMU. |
| 24 | - "renesas,ipmmu-r8a77980" for the R8A77980 (R-Car V3H) IPMMU. | ||
| 25 | - "renesas,ipmmu-r8a77990" for the R8A77990 (R-Car E3) IPMMU. | ||
| 23 | - "renesas,ipmmu-r8a77995" for the R8A77995 (R-Car D3) IPMMU. | 26 | - "renesas,ipmmu-r8a77995" for the R8A77995 (R-Car D3) IPMMU. |
| 24 | - "renesas,ipmmu-vmsa" for generic R-Car Gen2 or RZ/G1 VMSA-compatible | 27 | - "renesas,ipmmu-vmsa" for generic R-Car Gen2 or RZ/G1 VMSA-compatible |
| 25 | IPMMU. | 28 | IPMMU. |
| @@ -31,7 +31,6 @@ Required properties: · 30 unmodified lines | |||
| 31 | - compatible: Should be "samsung,exynos-sysmmu" | 31 | - compatible: Should be "samsung,exynos-sysmmu" |
| 32 | - reg: A tuple of base address and size of System MMU registers. | 32 | - reg: A tuple of base address and size of System MMU registers. |
| 33 | - #iommu-cells: Should be <0>. | 33 | - #iommu-cells: Should be <0>. |
| 34 | - interrupt-parent: The phandle of the interrupt controller of System MMU | ||
| 35 | - interrupts: An interrupt specifier for interrupt signal of System MMU, | 34 | - interrupts: An interrupt specifier for interrupt signal of System MMU, |
| 36 | according to the format defined by a particular interrupt | 35 | according to the format defined by a particular interrupt |
| 37 | controller. | 36 | controller. |
| @@ -3,13 +3,6 @@ pwm-backlight bindings · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "pwm-backlight" | 4 | - compatible: "pwm-backlight" |
| 5 | - pwms: OF device-tree PWM specification (see PWM binding[0]) | 5 | - pwms: OF device-tree PWM specification (see PWM binding[0]) |
| 6 | - brightness-levels: Array of distinct brightness levels. Typically these | ||
| 7 | are in the range from 0 to 255, but any range starting at 0 will do. | ||
| 8 | The actual brightness level (PWM duty cycle) will be interpolated | ||
| 9 | from these values. 0 means a 0% duty cycle (darkest/off), while the | ||
| 10 | last value in the array represents a 100% duty cycle (brightest). | ||
| 11 | - default-brightness-level: the default brightness level (index into the | ||
| 12 | array defined by the "brightness-levels" property) | ||
| 13 | - power-supply: regulator for supply voltage | 6 | - power-supply: regulator for supply voltage |
| 14 | 7 | ||
| 15 | Optional properties: | 8 | Optional properties: |
| @@ -21,6 +14,19 @@ Optional properties: · 5 unmodified lines | |||
| 21 | and enabling the backlight using GPIO. | 14 | and enabling the backlight using GPIO. |
| 22 | - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO | 15 | - pwm-off-delay-ms: Delay in ms between disabling the backlight using GPIO |
| 23 | and setting PWM value to 0. | 16 | and setting PWM value to 0. |
| 17 | - brightness-levels: Array of distinct brightness levels. Typically these | ||
| 18 | are in the range from 0 to 255, but any range starting at | ||
| 19 | 0 will do. The actual brightness level (PWM duty cycle) | ||
| 20 | will be interpolated from these values. 0 means a 0% duty | ||
| 21 | cycle (darkest/off), while the last value in the array | ||
| 22 | represents a 100% duty cycle (brightest). | ||
| 23 | - default-brightness-level: The default brightness level (index into the | ||
| 24 | array defined by the "brightness-levels" property). | ||
| 25 | - num-interpolated-steps: Number of interpolated steps between each value | ||
| 26 | of brightness-levels table. This way a high | ||
| 27 | resolution pwm duty cycle can be used without | ||
| 28 | having to list out every possible value in the | ||
| 29 | brightness-level array. | ||
| 24 | 30 | ||
| 25 | [0]: Documentation/devicetree/bindings/pwm/pwm.txt | 31 | [0]: Documentation/devicetree/bindings/pwm/pwm.txt |
| 26 | [1]: Documentation/devicetree/bindings/gpio/gpio.txt | 32 | [1]: Documentation/devicetree/bindings/gpio/gpio.txt |
| @@ -39,3 +45,17 @@ Example: · 12 unmodified lines | |||
| 39 | post-pwm-on-delay-ms = <10>; | 45 | post-pwm-on-delay-ms = <10>; |
| 40 | pwm-off-delay-ms = <10>; | 46 | pwm-off-delay-ms = <10>; |
| 41 | }; | 47 | }; |
| 48 | |||
| 49 | Example using num-interpolation-steps: | ||
| 50 | |||
| 51 | backlight { | ||
| 52 | compatible = "pwm-backlight"; | ||
| 53 | pwms = <&pwm 0 5000000>; | ||
| 54 | |||
| 55 | brightness-levels = <0 2048 4096 8192 16384 65535>; | ||
| 56 | num-interpolated-steps = <2048>; | ||
| 57 | default-brightness-level = <4096>; | ||
| 58 | |||
| 59 | power-supply = <&vdd_bl_reg>; | ||
| 60 | enable-gpios = <&gpio 58 0>; | ||
| 61 | }; | ||
| @@ -31,7 +31,7 @@ Optional properties for child nodes: · 30 unmodified lines | |||
| 31 | "backlight" - LED will act as a back-light, controlled by the framebuffer | 31 | "backlight" - LED will act as a back-light, controlled by the framebuffer |
| 32 | system | 32 | system |
| 33 | "default-on" - LED will turn on (but for leds-gpio see "default-state" | 33 | "default-on" - LED will turn on (but for leds-gpio see "default-state" |
| 34 | property in Documentation/devicetree/bindings/gpio/led.txt) | 34 | property in Documentation/devicetree/bindings/leds/leds-gpio.txt) |
| 35 | "heartbeat" - LED "double" flashes at a load average based rate | 35 | "heartbeat" - LED "double" flashes at a load average based rate |
| 36 | "disk-activity" - LED indicates disk activity | 36 | "disk-activity" - LED indicates disk activity |
| 37 | "ide-disk" - LED indicates IDE disk activity (deprecated), | 37 | "ide-disk" - LED indicates IDE disk activity (deprecated), |
| @@ -20,7 +20,10 @@ Optional properties: · 19 unmodified lines | |||
| 20 | - vled-supply : LED supply | 20 | - vled-supply : LED supply |
| 21 | 21 | ||
| 22 | Required child properties: | 22 | Required child properties: |
| 23 | - reg : 0 | 23 | - reg : 0 - Will enable all LED sync paths |
| 24 | 1 - Will enable the LED1 sync | ||
| 25 | 2 - Will enable the LED2 sync | ||
| 26 | 3 - Will enable the LED3 sync (LM36923 only) | ||
| 24 | 27 | ||
| 25 | Optional child properties: | 28 | Optional child properties: |
| 26 | - label : see Documentation/devicetree/bindings/leds/common.txt | 29 | - label : see Documentation/devicetree/bindings/leds/common.txt |
| @@ -0,0 +1,32 @@ | |||
| 1 | Bindings for Linear Technologies LT3593 LED controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be "lltc,lt3593". | ||
| 5 | - lltc,ctrl-gpios: A handle to the GPIO that is connected to the 'CTRL' | ||
| 6 | pin of the chip. | ||
| 7 | |||
| 8 | The hardware supports only one LED. The properties of this LED are | ||
| 9 | configured in a sub-node in the device node. | ||
| 10 | |||
| 11 | Optional sub-node properties: | ||
| 12 | - label: A label for the LED. If none is given, the LED will be | ||
| 13 | named "lt3595::". | ||
| 14 | - linux,default-trigger: The default trigger for the LED. | ||
| 15 | See Documentation/devicetree/bindings/leds/common.txt | ||
| 16 | - default-state: The initial state of the LED. | ||
| 17 | See Documentation/devicetree/bindings/leds/common.txt | ||
| 18 | |||
| 19 | If multiple chips of this type are found in a design, each one needs to | ||
| 20 | be handled by its own device node. | ||
| 21 | |||
| 22 | Example: | ||
| 23 | |||
| 24 | led-controller { | ||
| 25 | compatible = "lltc,lt3593"; | ||
| 26 | lltc,ctrl-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; | ||
| 27 | |||
| 28 | led { | ||
| 29 | label = "white:backlight"; | ||
| 30 | default-state = "on"; | ||
| 31 | }; | ||
| 32 | }; | ||
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | of cells required for the mailbox specifier. Should be 1. | 9 | of cells required for the mailbox specifier. Should be 1. |
| 10 | 10 | ||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | - interrupt-parent : interrupt source phandle. | ||
| 13 | - interrupts : interrupt number. The interrupt specifier format | 12 | - interrupts : interrupt number. The interrupt specifier format |
| 14 | depends on the interrupt controller parent. | 13 | depends on the interrupt controller parent. |
| 15 | 14 | ||
| @@ -0,0 +1,54 @@ | |||
| 1 | NXP i.MX Messaging Unit (MU) | ||
| 2 | -------------------------------------------------------------------- | ||
| 3 | |||
| 4 | The Messaging Unit module enables two processors within the SoC to | ||
| 5 | communicate and coordinate by passing messages (e.g. data, status | ||
| 6 | and control) through the MU interface. The MU also provides the ability | ||
| 7 | for one processor to signal the other processor using interrupts. | ||
| 8 | |||
| 9 | Because the MU manages the messaging between processors, the MU uses | ||
| 10 | different clocks (from each side of the different peripheral buses). | ||
| 11 | Therefore, the MU must synchronize the accesses from one side to the | ||
| 12 | other. The MU accomplishes synchronization using two sets of matching | ||
| 13 | registers (Processor A-facing, Processor B-facing). | ||
| 14 | |||
| 15 | Messaging Unit Device Node: | ||
| 16 | ============================= | ||
| 17 | |||
| 18 | Required properties: | ||
| 19 | ------------------- | ||
| 20 | - compatible : should be "fsl,<chip>-mu", the supported chips include | ||
| 21 | imx6sx, imx7s, imx8qxp, imx8qm. | ||
| 22 | The "fsl,imx6sx-mu" compatible is seen as generic and should | ||
| 23 | be included together with SoC specific compatible. | ||
| 24 | - reg : Should contain the registers location and length | ||
| 25 | - interrupts : Interrupt number. The interrupt specifier format depends | ||
| 26 | on the interrupt controller parent. | ||
| 27 | - #mbox-cells: Must be 2. | ||
| 28 | <&phandle type channel> | ||
| 29 | phandle : Label name of controller | ||
| 30 | type : Channel type | ||
| 31 | channel : Channel number | ||
| 32 | |||
| 33 | This MU support 4 type of unidirectional channels, each type | ||
| 34 | has 4 channels. A total of 16 channels. Following types are | ||
| 35 | supported: | ||
| 36 | 0 - TX channel with 32bit transmit register and IRQ transmit | ||
| 37 | acknowledgment support. | ||
| 38 | 1 - RX channel with 32bit receive register and IRQ support | ||
| 39 | 2 - TX doorbell channel. Without own register and no ACK support. | ||
| 40 | 3 - RX doorbell channel. | ||
| 41 | |||
| 42 | Optional properties: | ||
| 43 | ------------------- | ||
| 44 | - clocks : phandle to the input clock. | ||
| 45 | - fsl,mu-side-b : Should be set for side B MU. | ||
| 46 | |||
| 47 | Examples: | ||
| 48 | -------- | ||
| 49 | lsio_mu0: mailbox@5d1b0000 { | ||
| 50 | compatible = "fsl,imx8qxp-mu"; | ||
| 51 | reg = <0x0 0x5d1b0000 0x0 0x10000>; | ||
| 52 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; | ||
| 53 | #mbox-cells = <2>; | ||
| 54 | }; | ||
| @@ -0,0 +1,57 @@ | |||
| 1 | MediaTek GCE | ||
| 2 | =============== | ||
| 3 | |||
| 4 | The Global Command Engine (GCE) is used to help read/write registers with | ||
| 5 | critical time limitation, such as updating display configuration during the | ||
| 6 | vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. | ||
| 7 | |||
| 8 | CMDQ driver uses mailbox framework for communication. Please refer to | ||
| 9 | mailbox.txt for generic information about mailbox device-tree bindings. | ||
| 10 | |||
| 11 | Required properties: | ||
| 12 | - compatible: Must be "mediatek,mt8173-gce" | ||
| 13 | - reg: Address range of the GCE unit | ||
| 14 | - interrupts: The interrupt signal from the GCE block | ||
| 15 | - clock: Clocks according to the common clock binding | ||
| 16 | - clock-names: Must be "gce" to stand for GCE clock | ||
| 17 | - #mbox-cells: Should be 3. | ||
| 18 | <&phandle channel priority atomic_exec> | ||
| 19 | phandle: Label name of a gce node. | ||
| 20 | channel: Channel of mailbox. Be equal to the thread id of GCE. | ||
| 21 | priority: Priority of GCE thread. | ||
| 22 | atomic_exec: GCE processing continuous packets of commands in atomic | ||
| 23 | way. | ||
| 24 | |||
| 25 | Required properties for a client device: | ||
| 26 | - mboxes: Client use mailbox to communicate with GCE, it should have this | ||
| 27 | property and list of phandle, mailbox specifiers. | ||
| 28 | - mediatek,gce-subsys: u32, specify the sub-system id which is corresponding | ||
| 29 | to the register address. | ||
| 30 | |||
| 31 | Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'. Such as | ||
| 32 | sub-system ids, thread priority, event ids. | ||
| 33 | |||
| 34 | Example: | ||
| 35 | |||
| 36 | gce: gce@10212000 { | ||
| 37 | compatible = "mediatek,mt8173-gce"; | ||
| 38 | reg = <0 0x10212000 0 0x1000>; | ||
| 39 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>; | ||
| 40 | clocks = <&infracfg CLK_INFRA_GCE>; | ||
| 41 | clock-names = "gce"; | ||
| 42 | thread-num = CMDQ_THR_MAX_COUNT; | ||
| 43 | #mbox-cells = <3>; | ||
| 44 | }; | ||
| 45 | |||
| 46 | Example for a client device: | ||
| 47 | |||
| 48 | mmsys: clock-controller@14000000 { | ||
| 49 | compatible = "mediatek,mt8173-mmsys"; | ||
| 50 | mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>, | ||
| 51 | <&gce 1 CMDQ_THR_PRIO_LOWEST 1>; | ||
| 52 | mediatek,gce-subsys = <SUBSYS_1400XXXX>; | ||
| 53 | mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF | ||
| 54 | CMDQ_EVENT_MUTEX1_STREAM_EOF>; | ||
| 55 | |||
| 56 | ... | ||
| 57 | }; | ||
| @@ -0,0 +1,50 @@ | |||
| 1 | Texas Instruments' Secure Proxy | ||
| 2 | ======================================== | ||
| 3 | |||
| 4 | The Texas Instruments' secure proxy is a mailbox controller that has | ||
| 5 | configurable queues selectable at SoC(System on Chip) integration. The | ||
| 6 | Message manager is broken up into different address regions that are | ||
| 7 | called "threads" or "proxies" - each instance is unidirectional and is | ||
| 8 | instantiated at SoC integration level by system controller to indicate | ||
| 9 | receive or transmit path. | ||
| 10 | |||
| 11 | Message Manager Device Node: | ||
| 12 | =========================== | ||
| 13 | Required properties: | ||
| 14 | -------------------- | ||
| 15 | - compatible: Shall be "ti,am654-secure-proxy" | ||
| 16 | - reg-names target_data - Map the proxy data region | ||
| 17 | rt - Map the realtime status region | ||
| 18 | scfg - Map the configuration region | ||
| 19 | - reg: Contains the register map per reg-names. | ||
| 20 | - #mbox-cells Shall be 1 and shall refer to the transfer path | ||
| 21 | called thread. | ||
| 22 | - interrupt-names: Contains interrupt names matching the rx transfer path | ||
| 23 | for a given SoC. Receive interrupts shall be of the | ||
| 24 | format: "rx_<PID>". | ||
| 25 | - interrupts: Contains the interrupt information corresponding to | ||
| 26 | interrupt-names property. | ||
| 27 | |||
| 28 | Example(AM654): | ||
| 29 | ------------ | ||
| 30 | |||
| 31 | secure_proxy: mailbox@32c00000 { | ||
| 32 | compatible = "ti,am654-secure-proxy"; | ||
| 33 | #mbox-cells = <1>; | ||
| 34 | reg-names = "target_data", "rt", "scfg"; | ||
| 35 | reg = <0x0 0x32c00000 0x0 0x100000>, | ||
| 36 | <0x0 0x32400000 0x0 0x100000>, | ||
| 37 | <0x0 0x32800000 0x0 0x100000>; | ||
| 38 | interrupt-names = "rx_011"; | ||
| 39 | interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; | ||
| 40 | }; | ||
| 41 | |||
| 42 | dmsc: dmsc { | ||
| 43 | [...] | ||
| 44 | mbox-names = "rx", "tx"; | ||
| 45 | # RX Thread ID is 11 | ||
| 46 | # TX Thread ID is 13 | ||
| 47 | mboxes= <&secure_proxy 11>, | ||
| 48 | <&secure_proxy 13>; | ||
| 49 | [...] | ||
| 50 | }; | ||
| @@ -4,8 +4,8 @@ The HDMI CEC GPIO module supports CEC implementations where the CEC line · 3 unmodified lines | |||
| 4 | is hooked up to a pull-up GPIO line and - optionally - the HPD line is | 4 | is hooked up to a pull-up GPIO line and - optionally - the HPD line is |
| 5 | hooked up to another GPIO line. | 5 | hooked up to another GPIO line. |
| 6 | 6 | ||
| 7 | Please note: the maximum voltage for the CEC line is 3.63V, for the HPD | 7 | Please note: the maximum voltage for the CEC line is 3.63V, for the HPD and |
| 8 | line it is 5.3V. So you may need some sort of level conversion circuitry | 8 | 5V lines it is 5.3V. So you may need some sort of level conversion circuitry |
| 9 | when connecting them to a GPIO line. | 9 | when connecting them to a GPIO line. |
| 10 | 10 | ||
| 11 | Required properties: | 11 | Required properties: |
| @@ -19,18 +19,24 @@ following property is also required: · 7 unmodified lines | |||
| 19 | - hdmi-phandle - phandle to the HDMI controller, see also cec.txt. | 19 | - hdmi-phandle - phandle to the HDMI controller, see also cec.txt. |
| 20 | 20 | ||
| 21 | If the CEC line is not associated with an HDMI receiver/transmitter, then | 21 | If the CEC line is not associated with an HDMI receiver/transmitter, then |
| 22 | the following property is optional: | 22 | the following property is optional and can be used for debugging HPD changes: |
| 23 | 23 | ||
| 24 | - hpd-gpios: gpio that the HPD line is connected to. | 24 | - hpd-gpios: gpio that the HPD line is connected to. |
| 25 | 25 | ||
| 26 | This property is optional and can be used for debugging changes on the 5V line: | ||
| 27 | |||
| 28 | - v5-gpios: gpio that the 5V line is connected to. | ||
| 29 | |||
| 26 | Example for the Raspberry Pi 3 where the CEC line is connected to | 30 | Example for the Raspberry Pi 3 where the CEC line is connected to |
| 27 | pin 26 aka BCM7 aka CE1 on the GPIO pin header and the HPD line is | 31 | pin 26 aka BCM7 aka CE1 on the GPIO pin header, the HPD line is |
| 28 | connected to pin 11 aka BCM17 (some level shifter is needed for this!): | 32 | connected to pin 11 aka BCM17 and the 5V line is connected to pin |
| 33 | 15 aka BCM22 (some level shifter is needed for the HPD and 5V lines!): | ||
| 29 | 34 | ||
| 30 | #include <dt-bindings/gpio/gpio.h> | 35 | #include <dt-bindings/gpio/gpio.h> |
| 31 | 36 | ||
| 32 | cec-gpio { | 37 | cec-gpio { |
| 33 | compatible = "cec-gpio"; | 38 | compatible = "cec-gpio"; |
| 34 | cec-gpios = <&gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; | 39 | cec-gpios = <&gpio 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; |
| 35 | hpd-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; | 40 | hpd-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; |
| 41 | v5-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; | ||
| 36 | }; | 42 | }; |
| @@ -0,0 +1,8 @@ | |||
| 1 | Asahi Kasei Microdevices AK7375 voice coil lens driver | ||
| 2 | |||
| 3 | AK7375 is a camera voice coil lens. | ||
| 4 | |||
| 5 | Mandatory properties: | ||
| 6 | |||
| 7 | - compatible: "asahi-kasei,ak7375" | ||
| 8 | - reg: I2C slave address | ||
| @@ -0,0 +1,46 @@ | |||
| 1 | * Aptina MT9V111 CMOS sensor | ||
| 2 | ---------------------------- | ||
| 3 | |||
| 4 | The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core | ||
| 5 | based on Aptina MT9V011 sensor and an integrated Image Flow Processor (IFP). | ||
| 6 | |||
| 7 | The sensor has an active pixel array of 640x480 pixels and can output a number | ||
| 8 | of image resolution and formats controllable through a simple two-wires | ||
| 9 | interface. | ||
| 10 | |||
| 11 | Required properties: | ||
| 12 | -------------------- | ||
| 13 | |||
| 14 | - compatible: shall be "aptina,mt9v111". | ||
| 15 | - clocks: reference to the system clock input provider. | ||
| 16 | |||
| 17 | Optional properties: | ||
| 18 | -------------------- | ||
| 19 | |||
| 20 | - enable-gpios: output enable signal, pin name "OE#". Active low. | ||
| 21 | - standby-gpios: low power state control signal, pin name "STANDBY". | ||
| 22 | Active high. | ||
| 23 | - reset-gpios: chip reset signal, pin name "RESET#". Active low. | ||
| 24 | |||
| 25 | The device node must contain one 'port' child node with one 'endpoint' child | ||
| 26 | sub-node for its digital output video port, in accordance with the video | ||
| 27 | interface bindings defined in: | ||
| 28 | Documentation/devicetree/bindings/media/video-interfaces.txt | ||
| 29 | |||
| 30 | Example: | ||
| 31 | -------- | ||
| 32 | |||
| 33 | &i2c1 { | ||
| 34 | camera@48 { | ||
| 35 | compatible = "aptina,mt9v111"; | ||
| 36 | reg = <0x48>; | ||
| 37 | |||
| 38 | clocks = <&camera_clk>; | ||
| 39 | |||
| 40 | port { | ||
| 41 | mt9v111_out: endpoint { | ||
| 42 | remote-endpoint = <&ceu_in>; | ||
| 43 | }; | ||
| 44 | }; | ||
| 45 | }; | ||
| 46 | }; | ||
| @@ -0,0 +1,9 @@ | |||
| 1 | Dongwoon Anatech DW9807 voice coil lens driver | ||
| 2 | |||
| 3 | DW9807 is a 10-bit DAC with current sink capability. It is intended for | ||
| 4 | controlling voice coil lenses. | ||
| 5 | |||
| 6 | Mandatory properties: | ||
| 7 | |||
| 8 | - compatible: "dongwoon,dw9807-vcm" | ||
| 9 | - reg: I2C slave address | ||
| @@ -29,6 +29,9 @@ Optional properties · 28 unmodified lines | |||
| 29 | - reset-gpios: XSHUTDOWN GPIO | 29 | - reset-gpios: XSHUTDOWN GPIO |
| 30 | - flash-leds: See ../video-interfaces.txt | 30 | - flash-leds: See ../video-interfaces.txt |
| 31 | - lens-focus: See ../video-interfaces.txt | 31 | - lens-focus: See ../video-interfaces.txt |
| 32 | - rotation: Integer property; valid values are 0 (sensor mounted upright) | ||
| 33 | and 180 (sensor mounted upside down). See | ||
| 34 | ../video-interfaces.txt . | ||
| 32 | 35 | ||
| 33 | 36 | ||
| 34 | Endpoint node mandatory properties | 37 | Endpoint node mandatory properties |
| @@ -0,0 +1,46 @@ | |||
| 1 | * Omnivision OV2680 MIPI CSI-2 sensor | ||
| 2 | |||
| 3 | Required Properties: | ||
| 4 | - compatible: should be "ovti,ov2680". | ||
| 5 | - clocks: reference to the xvclk input clock. | ||
| 6 | - clock-names: should be "xvclk". | ||
| 7 | - DOVDD-supply: Digital I/O voltage supply. | ||
| 8 | - DVDD-supply: Digital core voltage supply. | ||
| 9 | - AVDD-supply: Analog voltage supply. | ||
| 10 | |||
| 11 | Optional Properties: | ||
| 12 | - reset-gpios: reference to the GPIO connected to the powerdown/reset pin, | ||
| 13 | if any. This is an active low signal to the OV2680. | ||
| 14 | |||
| 15 | The device node must contain one 'port' child node for its digital output | ||
| 16 | video port, and this port must have a single endpoint in accordance with | ||
| 17 | the video interface bindings defined in | ||
| 18 | Documentation/devicetree/bindings/media/video-interfaces.txt. | ||
| 19 | |||
| 20 | Endpoint node required properties for CSI-2 connection are: | ||
| 21 | - remote-endpoint: a phandle to the bus receiver's endpoint node. | ||
| 22 | - clock-lanes: should be set to <0> (clock lane on hardware lane 0). | ||
| 23 | - data-lanes: should be set to <1> (one CSI-2 lane supported). | ||
| 24 | |||
| 25 | Example: | ||
| 26 | |||
| 27 | &i2c2 { | ||
| 28 | ov2680: camera-sensor@36 { | ||
| 29 | compatible = "ovti,ov2680"; | ||
| 30 | reg = <0x36>; | ||
| 31 | clocks = <&osc>; | ||
| 32 | clock-names = "xvclk"; | ||
| 33 | reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; | ||
| 34 | DOVDD-supply = <&sw2_reg>; | ||
| 35 | DVDD-supply = <&sw2_reg>; | ||
| 36 | AVDD-supply = <®_peri_3p15v>; | ||
| 37 | |||
| 38 | port { | ||
| 39 | ov2680_to_mipi: endpoint { | ||
| 40 | remote-endpoint = <&mipi_from_sensor>; | ||
| 41 | clock-lanes = <0>; | ||
| 42 | data-lanes = <1>; | ||
| 43 | }; | ||
| 44 | }; | ||
| 45 | }; | ||
| 46 | }; | ||
| @@ -13,6 +13,10 @@ Optional Properties: · 12 unmodified lines | |||
| 13 | This is an active low signal to the OV5640. | 13 | This is an active low signal to the OV5640. |
| 14 | - powerdown-gpios: reference to the GPIO connected to the powerdown pin, | 14 | - powerdown-gpios: reference to the GPIO connected to the powerdown pin, |
| 15 | if any. This is an active high signal to the OV5640. | 15 | if any. This is an active high signal to the OV5640. |
| 16 | - rotation: as defined in | ||
| 17 | Documentation/devicetree/bindings/media/video-interfaces.txt, | ||
| 18 | valid values are 0 (sensor mounted upright) and 180 (sensor | ||
| 19 | mounted upside down). | ||
| 16 | 20 | ||
| 17 | The device node must contain one 'port' child node for its digital output | 21 | The device node must contain one 'port' child node for its digital output |
| 18 | video port, in accordance with the video interface bindings defined in | 22 | video port, in accordance with the video interface bindings defined in |
| @@ -51,6 +55,7 @@ Examples: · 32 unmodified lines | |||
| 51 | DVDD-supply = <&vgen2_reg>; /* 1.5v */ | 55 | DVDD-supply = <&vgen2_reg>; /* 1.5v */ |
| 52 | powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; | 56 | powerdown-gpios = <&gpio1 19 GPIO_ACTIVE_HIGH>; |
| 53 | reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; | 57 | reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; |
| 58 | rotation = <180>; | ||
| 54 | 59 | ||
| 55 | port { | 60 | port { |
| 56 | /* MIPI CSI-2 bus endpoint */ | 61 | /* MIPI CSI-2 bus endpoint */ |
| @@ -12,7 +12,7 @@ Required Properties: · 11 unmodified lines | |||
| 12 | Optional Properties: | 12 | Optional Properties: |
| 13 | 13 | ||
| 14 | - reset-gpios: gpio phandle GPIO connected to the reset pin | 14 | - reset-gpios: gpio phandle GPIO connected to the reset pin |
| 15 | - interrupts, interrupt-parent: GPIO connected to the interrupt pin | 15 | - interrupts: GPIO connected to the interrupt pin |
| 16 | - data-lanes: should be <1 2 3 4> for four-lane operation, | 16 | - data-lanes: should be <1 2 3 4> for four-lane operation, |
| 17 | or <1 2> for two-lane operation | 17 | or <1 2> for two-lane operation |
| 18 | - clock-lanes: should be <0> | 18 | - clock-lanes: should be <0> |
| @@ -27,9 +27,15 @@ Required properties: · 26 unmodified lines | |||
| 27 | - sxe | 27 | - sxe |
| 28 | - clocks : Must include the following entries: | 28 | - clocks : Must include the following entries: |
| 29 | - vde | 29 | - vde |
| 30 | - resets : Must include the following entries: | 30 | - resets : Must contain an entry for each entry in reset-names. |
| 31 | - reset-names : Should include the following entries: | ||
| 31 | - vde | 32 | - vde |
| 32 | 33 | ||
| 34 | Optional properties: | ||
| 35 | - resets : Must contain an entry for each entry in reset-names. | ||
| 36 | - reset-names : Must include the following entries: | ||
| 37 | - mc | ||
| 38 | |||
| 33 | Example: | 39 | Example: |
| 34 | 40 | ||
| 35 | video-codec@6001a000 { | 41 | video-codec@6001a000 { |
| @@ -51,5 +57,6 @@ video-codec@6001a000 { · 15 unmodified lines | |||
| 51 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */ | 57 | <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */ |
| 52 | interrupt-names = "sync-token", "bsev", "sxe"; | 58 | interrupt-names = "sync-token", "bsev", "sxe"; |
| 53 | clocks = <&tegra_car TEGRA20_CLK_VDE>; | 59 | clocks = <&tegra_car TEGRA20_CLK_VDE>; |
| 54 | resets = <&tegra_car 61>; | 60 | reset-names = "vde", "mc"; |
| 61 | resets = <&tegra_car 61>, <&mc TEGRA20_MC_RESET_VDE>; | ||
| 55 | }; | 62 | }; |
| @@ -5,8 +5,9 @@ Qualcomm Camera Subsystem · 4 unmodified lines | |||
| 5 | - compatible: | 5 | - compatible: |
| 6 | Usage: required | 6 | Usage: required |
| 7 | Value type: <stringlist> | 7 | Value type: <stringlist> |
| 8 | Definition: Should contain: | 8 | Definition: Should contain one of: |
| 9 | - "qcom,msm8916-camss" | 9 | - "qcom,msm8916-camss" |
| 10 | - "qcom,msm8996-camss" | ||
| 10 | - reg: | 11 | - reg: |
| 11 | Usage: required | 12 | Usage: required |
| 12 | Value type: <prop-encoded-array> | 13 | Value type: <prop-encoded-array> |
| @@ -19,11 +20,16 @@ Qualcomm Camera Subsystem · 6 unmodified lines | |||
| 19 | - "csiphy0_clk_mux" | 20 | - "csiphy0_clk_mux" |
| 20 | - "csiphy1" | 21 | - "csiphy1" |
| 21 | - "csiphy1_clk_mux" | 22 | - "csiphy1_clk_mux" |
| 23 | - "csiphy2" (8996 only) | ||
| 24 | - "csiphy2_clk_mux" (8996 only) | ||
| 22 | - "csid0" | 25 | - "csid0" |
| 23 | - "csid1" | 26 | - "csid1" |
| 27 | - "csid2" (8996 only) | ||
| 28 | - "csid3" (8996 only) | ||
| 24 | - "ispif" | 29 | - "ispif" |
| 25 | - "csi_clk_mux" | 30 | - "csi_clk_mux" |
| 26 | - "vfe0" | 31 | - "vfe0" |
| 32 | - "vfe1" (8996 only) | ||
| 27 | - interrupts: | 33 | - interrupts: |
| 28 | Usage: required | 34 | Usage: required |
| 29 | Value type: <prop-encoded-array> | 35 | Value type: <prop-encoded-array> |
| @@ -34,10 +40,14 @@ Qualcomm Camera Subsystem · 4 unmodified lines | |||
| 34 | Definition: Should contain the following entries: | 40 | Definition: Should contain the following entries: |
| 35 | - "csiphy0" | 41 | - "csiphy0" |
| 36 | - "csiphy1" | 42 | - "csiphy1" |
| 43 | - "csiphy2" (8996 only) | ||
| 37 | - "csid0" | 44 | - "csid0" |
| 38 | - "csid1" | 45 | - "csid1" |
| 46 | - "csid2" (8996 only) | ||
| 47 | - "csid3" (8996 only) | ||
| 39 | - "ispif" | 48 | - "ispif" |
| 40 | - "vfe0" | 49 | - "vfe0" |
| 50 | - "vfe1" (8996 only) | ||
| 41 | - power-domains: | 51 | - power-domains: |
| 42 | Usage: required | 52 | Usage: required |
| 43 | Value type: <prop-encoded-array> | 53 | Value type: <prop-encoded-array> |
| @@ -53,25 +63,42 @@ Qualcomm Camera Subsystem · 9 unmodified lines | |||
| 53 | Usage: required | 63 | Usage: required |
| 54 | Value type: <stringlist> | 64 | Value type: <stringlist> |
| 55 | Definition: Should contain the following entries: | 65 | Definition: Should contain the following entries: |
| 56 | - "camss_top_ahb" | 66 | - "top_ahb" |
| 57 | - "ispif_ahb" | 67 | - "ispif_ahb" |
| 58 | - "csiphy0_timer" | 68 | - "csiphy0_timer" |
| 59 | - "csiphy1_timer" | 69 | - "csiphy1_timer" |
| 60 | - "csi0_ahb" | 70 | - "csiphy2_timer" (8996 only) |
| 61 | - "csi0" | 71 | - "csi0_ahb" |
| 62 | - "csi0_phy" | 72 | - "csi0" |
| 63 | - "csi0_pix" | 73 | - "csi0_phy" |
| 64 | - "csi0_rdi" | 74 | - "csi0_pix" |
| 65 | - "csi1_ahb" | 75 | - "csi0_rdi" |
| 66 | - "csi1" | 76 | - "csi1_ahb" |
| 67 | - "csi1_phy" | 77 | - "csi1" |
| 68 | - "csi1_pix" | 78 | - "csi1_phy" |
| 69 | - "csi1_rdi" | 79 | - "csi1_pix" |
| 70 | - "camss_ahb" | 80 | - "csi1_rdi" |
| 71 | - "camss_vfe_vfe" | 81 | - "csi2_ahb" (8996 only) |
| 72 | - "camss_csi_vfe" | 82 | - "csi2" (8996 only) |
| 73 | - "iface" | 83 | - "csi2_phy" (8996 only) |
| 74 | - "bus" | 84 | - "csi2_pix" (8996 only) |
| 85 | - "csi2_rdi" (8996 only) | ||
| 86 | - "csi3_ahb" (8996 only) | ||
| 87 | - "csi3" (8996 only) | ||
| 88 | - "csi3_phy" (8996 only) | ||
| 89 | - "csi3_pix" (8996 only) | ||
| 90 | - "csi3_rdi" (8996 only) | ||
| 91 | - "ahb" | ||
| 92 | - "vfe0" | ||
| 93 | - "csi_vfe0" | ||
| 94 | - "vfe0_ahb", (8996 only) | ||
| 95 | - "vfe0_stream", (8996 only) | ||
| 96 | - "vfe1", (8996 only) | ||
| 97 | - "csi_vfe1", (8996 only) | ||
| 98 | - "vfe1_ahb", (8996 only) | ||
| 99 | - "vfe1_stream", (8996 only) | ||
| 100 | - "vfe_ahb" | ||
| 101 | - "vfe_axi" | ||
| 75 | - vdda-supply: | 102 | - vdda-supply: |
| 76 | Usage: required | 103 | Usage: required |
| 77 | Value type: <phandle> | 104 | Value type: <phandle> |
| @@ -90,22 +117,27 @@ Qualcomm Camera Subsystem · 12 unmodified lines | |||
| 90 | - reg: | 117 | - reg: |
| 91 | Usage: required | 118 | Usage: required |
| 92 | Value type: <u32> | 119 | Value type: <u32> |
| 93 | Definition: Selects CSI2 PHY interface - PHY0 or PHY1. | 120 | Definition: Selects CSI2 PHY interface - PHY0, PHY1 |
| 121 | or PHY2 (8996 only) | ||
| 94 | Endpoint node properties: | 122 | Endpoint node properties: |
| 95 | - clock-lanes: | 123 | - clock-lanes: |
| 96 | Usage: required | 124 | Usage: required |
| 97 | Value type: <u32> | 125 | Value type: <u32> |
| 98 | Definition: The physical clock lane index. The value | 126 | Definition: The physical clock lane index. On 8916 |
| 99 | must always be <1> as the physical clock | 127 | the value must always be <1> as the physical |
| 100 | lane is lane 1. | 128 | clock lane is lane 1. On 8996 the value must |
| 129 | always be <7> as the hardware supports D-PHY | ||
| 130 | and C-PHY, indexes are in a common set and | ||
| 131 | D-PHY physical clock lane is labeled as 7. | ||
| 101 | - data-lanes: | 132 | - data-lanes: |
| 102 | Usage: required | 133 | Usage: required |
| 103 | Value type: <prop-encoded-array> | 134 | Value type: <prop-encoded-array> |
| 104 | Definition: An array of physical data lanes indexes. | 135 | Definition: An array of physical data lanes indexes. |
| 105 | Position of an entry determines the logical | 136 | Position of an entry determines the logical |
| 106 | lane number, while the value of an entry | 137 | lane number, while the value of an entry |
| 107 | indicates physical lane index. Lane swapping | 138 | indicates physical lane index. Lane swapping |
| 108 | is supported. | 139 | is supported. Physical lane indexes for |
| 140 | 8916: 0, 2, 3, 4; for 8996: 0, 1, 2, 3. | ||
| 109 | 141 | ||
| 110 | * An Example | 142 | * An Example |
| 111 | 143 | ||
| @@ -161,25 +193,25 @@ Qualcomm Camera Subsystem · 49 unmodified lines | |||
| 161 | <&gcc GCC_CAMSS_CSI_VFE0_CLK>, | 193 | <&gcc GCC_CAMSS_CSI_VFE0_CLK>, |
| 162 | <&gcc GCC_CAMSS_VFE_AHB_CLK>, | 194 | <&gcc GCC_CAMSS_VFE_AHB_CLK>, |
| 163 | <&gcc GCC_CAMSS_VFE_AXI_CLK>; | 195 | <&gcc GCC_CAMSS_VFE_AXI_CLK>; |
| 164 | clock-names = "camss_top_ahb", | 196 | clock-names = "top_ahb", |
| 165 | "ispif_ahb", | 197 | "ispif_ahb", |
| 166 | "csiphy0_timer", | 198 | "csiphy0_timer", |
| 167 | "csiphy1_timer", | 199 | "csiphy1_timer", |
| 168 | "csi0_ahb", | 200 | "csi0_ahb", |
| 169 | "csi0", | 201 | "csi0", |
| 170 | "csi0_phy", | 202 | "csi0_phy", |
| 171 | "csi0_pix", | 203 | "csi0_pix", |
| 172 | "csi0_rdi", | 204 | "csi0_rdi", |
| 173 | "csi1_ahb", | 205 | "csi1_ahb", |
| 174 | "csi1", | 206 | "csi1", |
| 175 | "csi1_phy", | 207 | "csi1_phy", |
| 176 | "csi1_pix", | 208 | "csi1_pix", |
| 177 | "csi1_rdi", | 209 | "csi1_rdi", |
| 178 | "camss_ahb", | 210 | "ahb", |
| 179 | "camss_vfe_vfe", | 211 | "vfe0", |
| 180 | "camss_csi_vfe", | 212 | "csi_vfe0", |
| 181 | "iface", | 213 | "vfe_ahb", |
| 182 | "bus"; | 214 | "vfe_axi"; |
| 183 | vdda-supply = <&pm8916_l2>; | 215 | vdda-supply = <&pm8916_l2>; |
| 184 | iommus = <&apps_iommu 3>; | 216 | iommus = <&apps_iommu 3>; |
| 185 | ports { | 217 | ports { |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | |||
| 6 | Definition: Value should contain one of: | 6 | Definition: Value should contain one of: |
| 7 | - "qcom,msm8916-venus" | 7 | - "qcom,msm8916-venus" |
| 8 | - "qcom,msm8996-venus" | 8 | - "qcom,msm8996-venus" |
| 9 | - "qcom,sdm845-venus" | ||
| 9 | - reg: | 10 | - reg: |
| 10 | Usage: required | 11 | Usage: required |
| 11 | Value type: <prop-encoded-array> | 12 | Value type: <prop-encoded-array> |
| @@ -21,7 +21,9 @@ on Gen3 platforms to a CSI-2 receiver. · 20 unmodified lines | |||
| 21 | - "renesas,vin-r8a7794" for the R8A7794 device | 21 | - "renesas,vin-r8a7794" for the R8A7794 device |
| 22 | - "renesas,vin-r8a7795" for the R8A7795 device | 22 | - "renesas,vin-r8a7795" for the R8A7795 device |
| 23 | - "renesas,vin-r8a7796" for the R8A7796 device | 23 | - "renesas,vin-r8a7796" for the R8A7796 device |
| 24 | - "renesas,vin-r8a77965" for the R8A77965 device | ||
| 24 | - "renesas,vin-r8a77970" for the R8A77970 device | 25 | - "renesas,vin-r8a77970" for the R8A77970 device |
| 26 | - "renesas,vin-r8a77995" for the R8A77995 device | ||
| 25 | - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible | 27 | - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible |
| 26 | device. | 28 | device. |
| 27 | 29 | ||
| @@ -37,30 +39,51 @@ Additionally, an alias named vinX will need to be created to specify · 9 unmodified lines | |||
| 37 | which video input device this is. | 39 | which video input device this is. |
| 38 | 40 | ||
| 39 | The per-board settings Gen2 platforms: | 41 | The per-board settings Gen2 platforms: |
| 40 | - port sub-node describing a single endpoint connected to the vin | 42 | |
| 41 | as described in video-interfaces.txt[1]. Only the first one will | 43 | - port - sub-node describing a single endpoint connected to the VIN |
| 42 | be considered as each vin interface has one input port. | 44 | from external SoC pins as described in video-interfaces.txt[1]. |
| 45 | Only the first one will be considered as each vin interface has one | ||
| 46 | input port. | ||
| 47 | |||
| 48 | - Optional properties for endpoint nodes: | ||
| 49 | - hsync-active: see [1] for description. Default is active high. | ||
| 50 | - vsync-active: see [1] for description. Default is active high. | ||
| 51 | If both HSYNC and VSYNC polarities are not specified, embedded | ||
| 52 | synchronization is selected. | ||
| 53 | - field-active-even: see [1] for description. Default is active high. | ||
| 54 | - bus-width: see [1] for description. The selected bus width depends on | ||
| 55 | the SoC type and selected input image format. | ||
| 56 | Valid values are: 8, 10, 12, 16, 24 and 32. | ||
| 57 | - data-shift: see [1] for description. Valid values are 0 and 8. | ||
| 58 | - data-enable-active: polarity of CLKENB signal, see [1] for | ||
| 59 | description. Default is active high. | ||
| 43 | 60 | ||
| 44 | The per-board settings Gen3 platforms: | 61 | The per-board settings Gen3 platforms: |
| 45 | 62 | ||
| 46 | Gen3 platforms can support both a single connected parallel input source | 63 | Gen3 platforms can support both a single connected parallel input source |
| 47 | from external SoC pins (port0) and/or multiple parallel input sources | 64 | from external SoC pins (port@0) and/or multiple parallel input sources |
| 48 | from local SoC CSI-2 receivers (port1) depending on SoC. | 65 | from local SoC CSI-2 receivers (port@1) depending on SoC. |
| 49 | 66 | ||
| 50 | - renesas,id - ID number of the VIN, VINx in the documentation. | 67 | - renesas,id - ID number of the VIN, VINx in the documentation. |
| 51 | - ports | 68 | - ports |
| 52 | - port 0 - sub-node describing a single endpoint connected to the VIN | 69 | - port@0 - sub-node describing a single endpoint connected to the VIN |
| 53 | from external SoC pins described in video-interfaces.txt[1]. | 70 | from external SoC pins as described in video-interfaces.txt[1]. |
| 54 | Describing more then one endpoint in port 0 is invalid. Only VIN | 71 | Describing more than one endpoint in port@0 is invalid. Only VIN |
| 55 | instances that are connected to external pins should have port 0. | 72 | instances that are connected to external pins should have port@0. |
| 56 | - port 1 - sub-nodes describing one or more endpoints connected to | 73 | |
| 74 | Endpoint nodes of port@0 support the optional properties listed in | ||
| 75 | the Gen2 per-board settings description. | ||
| 76 | |||
| 77 | - port@1 - sub-nodes describing one or more endpoints connected to | ||
| 57 | the VIN from local SoC CSI-2 receivers. The endpoint numbers must | 78 | the VIN from local SoC CSI-2 receivers. The endpoint numbers must |
| 58 | use the following schema. | 79 | use the following schema. |
| 59 | 80 | ||
| 60 | - Endpoint 0 - sub-node describing the endpoint connected to CSI20 | 81 | - endpoint@0 - sub-node describing the endpoint connected to CSI20 |
| 61 | - Endpoint 1 - sub-node describing the endpoint connected to CSI21 | 82 | - endpoint@1 - sub-node describing the endpoint connected to CSI21 |
| 62 | - Endpoint 2 - sub-node describing the endpoint connected to CSI40 | 83 | - endpoint@2 - sub-node describing the endpoint connected to CSI40 |
| 63 | - Endpoint 3 - sub-node describing the endpoint connected to CSI41 | 84 | - endpoint@3 - sub-node describing the endpoint connected to CSI41 |
| 85 | |||
| 86 | Endpoint nodes of port@1 do not support any optional endpoint property. | ||
| 64 | 87 | ||
| 65 | Device node example for Gen2 platforms | 88 | Device node example for Gen2 platforms |
| 66 | -------------------------------------- | 89 | -------------------------------------- |
| @@ -107,9 +130,6 @@ Board setup example for Gen2 platforms (vin1 composite video input) · 40 unmodified lines | |||
| 107 | status = "okay"; | 130 | status = "okay"; |
| 108 | 131 | ||
| 109 | port { | 132 | port { |
| 110 | #address-cells = <1>; | ||
| 111 | #size-cells = <0>; | ||
| 112 | |||
| 113 | vin1ep0: endpoint { | 133 | vin1ep0: endpoint { |
| 114 | remote-endpoint = <&adv7180>; | 134 | remote-endpoint = <&adv7180>; |
| 115 | bus-width = <8>; | 135 | bus-width = <8>; |
| @@ -2,7 +2,6 @@ Bindings, specific for the sh_mobile_ceu_camera.c driver: · 1 unmodified line | |||
| 2 | - compatible: Should be "renesas,sh-mobile-ceu" | 2 | - compatible: Should be "renesas,sh-mobile-ceu" |
| 3 | - reg: register base and size | 3 | - reg: register base and size |
| 4 | - interrupts: the interrupt number | 4 | - interrupts: the interrupt number |
| 5 | - interrupt-parent: the interrupt controller | ||
| 6 | - renesas,max-width: maximum image width, supported on this SoC | 5 | - renesas,max-width: maximum image width, supported on this SoC |
| 7 | - renesas,max-height: maximum image height, supported on this SoC | 6 | - renesas,max-height: maximum image height, supported on this SoC |
| 8 | 7 | ||
| @@ -85,6 +85,10 @@ Optional properties · 84 unmodified lines | |||
| 85 | 85 | ||
| 86 | - lens-focus: A phandle to the node of the focus lens controller. | 86 | - lens-focus: A phandle to the node of the focus lens controller. |
| 87 | 87 | ||
| 88 | - rotation: The device, typically an image sensor, is not mounted upright, | ||
| 89 | but a number of degrees counter clockwise. Typical values are 0 and 180 | ||
| 90 | (upside down). | ||
| 91 | |||
| 88 | 92 | ||
| 89 | Optional endpoint properties | 93 | Optional endpoint properties |
| 90 | ---------------------------- | 94 | ---------------------------- |
| @@ -109,6 +113,8 @@ Optional endpoint properties · 18 unmodified lines | |||
| 109 | Note, that if HSYNC and VSYNC polarities are not specified, embedded | 113 | Note, that if HSYNC and VSYNC polarities are not specified, embedded |
| 110 | synchronization may be required, where supported. | 114 | synchronization may be required, where supported. |
| 111 | - data-active: similar to HSYNC and VSYNC, specifies data line polarity. | 115 | - data-active: similar to HSYNC and VSYNC, specifies data line polarity. |
| 116 | - data-enable-active: similar to HSYNC and VSYNC, specifies the data enable | ||
| 117 | signal polarity. | ||
| 112 | - field-even-active: field signal level during the even field data transmission. | 118 | - field-even-active: field signal level during the even field data transmission. |
| 113 | - pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock | 119 | - pclk-sample: sample data on rising (1) or falling (0) edge of the pixel clock |
| 114 | signal. | 120 | signal. |
| @@ -2,8 +2,9 @@ SMI (Smart Multimedia Interface) Common · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | The hardware block diagram please check bindings/iommu/mediatek,iommu.txt | 3 | The hardware block diagram please check bindings/iommu/mediatek,iommu.txt |
| 4 | 4 | ||
| 5 | Mediatek SMI have two generations of HW architecture, mt8173 uses the second | 5 | Mediatek SMI have two generations of HW architecture, mt2712 and mt8173 use |
| 6 | generation of SMI HW while mt2701 uses the first generation HW of SMI. | 6 | the second generation of SMI HW while mt2701 uses the first generation HW of |
| 7 | SMI. | ||
| 7 | 8 | ||
| 8 | There's slight differences between the two SMI, for generation 2, the | 9 | There's slight differences between the two SMI, for generation 2, the |
| 9 | register which control the iommu port is at each larb's register base. But | 10 | register which control the iommu port is at each larb's register base. But |
| @@ -15,6 +16,7 @@ not needed for SMI generation 2. · 5 unmodified lines | |||
| 15 | Required properties: | 16 | Required properties: |
| 16 | - compatible : must be one of : | 17 | - compatible : must be one of : |
| 17 | "mediatek,mt2701-smi-common" | 18 | "mediatek,mt2701-smi-common" |
| 19 | "mediatek,mt2712-smi-common" | ||
| 18 | "mediatek,mt8173-smi-common" | 20 | "mediatek,mt8173-smi-common" |
| 19 | - reg : the register and size of the SMI block. | 21 | - reg : the register and size of the SMI block. |
| 20 | - power-domains : a phandle to the power domain of this local arbiter. | 22 | - power-domains : a phandle to the power domain of this local arbiter. |
| @@ -4,8 +4,9 @@ The hardware block diagram please check bindings/iommu/mediatek,iommu.txt · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | Required properties: | 5 | Required properties: |
| 6 | - compatible : must be one of : | 6 | - compatible : must be one of : |
| 7 | "mediatek,mt8173-smi-larb" | ||
| 8 | "mediatek,mt2701-smi-larb" | 7 | "mediatek,mt2701-smi-larb" |
| 8 | "mediatek,mt2712-smi-larb" | ||
| 9 | "mediatek,mt8173-smi-larb" | ||
| 9 | - reg : the register and size of this local arbiter. | 10 | - reg : the register and size of this local arbiter. |
| 10 | - mediatek,smi : a phandle to the smi_common node. | 11 | - mediatek,smi : a phandle to the smi_common node. |
| 11 | - power-domains : a phandle to the power domain of this local arbiter. | 12 | - power-domains : a phandle to the power domain of this local arbiter. |
| @@ -15,7 +16,7 @@ Required properties: · 3 unmodified lines | |||
| 15 | the register. | 16 | the register. |
| 16 | - "smi" : It's the clock for transfer data and command. | 17 | - "smi" : It's the clock for transfer data and command. |
| 17 | 18 | ||
| 18 | Required property for mt2701: | 19 | Required property for mt2701 and mt2712: |
| 19 | - mediatek,larb-id :the hardware id of this larb. | 20 | - mediatek,larb-id :the hardware id of this larb. |
| 20 | 21 | ||
| 21 | Example: | 22 | Example: |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | - sub-nodes: | 10 | - sub-nodes: |
| 11 | - codec | 11 | - codec |
| 12 | - compatible: "x-powers,ac100-codec" | 12 | - compatible: "x-powers,ac100-codec" |
| 13 | - interrupt-parent: The parent interrupt controller | ||
| 14 | - interrupts: SoC NMI / GPIO interrupt connected to the | 13 | - interrupts: SoC NMI / GPIO interrupt connected to the |
| 15 | IRQ_AUDIO pin | 14 | IRQ_AUDIO pin |
| 16 | - #clock-cells: Shall be 0 | 15 | - #clock-cells: Shall be 0 |
| @@ -20,9 +19,6 @@ Required properties: · 3 unmodified lines | |||
| 20 | 19 | ||
| 21 | - rtc | 20 | - rtc |
| 22 | - compatible: "x-powers,ac100-rtc" | 21 | - compatible: "x-powers,ac100-rtc" |
| 23 | - interrupt-parent: The parent interrupt controller | ||
| 24 | - interrupts: SoC NMI / GPIO interrupt connected to the | ||
| 25 | IRQ_RTC pin | ||
| 26 | - clocks: A phandle to the codec's "4M_adda" clock | 22 | - clocks: A phandle to the codec's "4M_adda" clock |
| 27 | - #clock-cells: Shall be 1 | 23 | - #clock-cells: Shall be 1 |
| 28 | - clock-output-names: "cko1_rtc", "cko2_rtc", "cko3_rtc" | 24 | - clock-output-names: "cko1_rtc", "cko2_rtc", "cko3_rtc" |
| @@ -5,7 +5,6 @@ Required parent device properties: · 4 unmodified lines | |||
| 5 | - spi-max-frequency : Maximum SPI frequency. | 5 | - spi-max-frequency : Maximum SPI frequency. |
| 6 | - reg : The SPI Chip Select address for the Arria10 | 6 | - reg : The SPI Chip Select address for the Arria10 |
| 7 | System Resource chip | 7 | System Resource chip |
| 8 | - interrupt-parent : The parent interrupt controller. | ||
| 9 | - interrupts : The interrupt line the device is connected to. | 8 | - interrupts : The interrupt line the device is connected to. |
| 10 | - interrupt-controller : Marks the device node as an interrupt controller. | 9 | - interrupt-controller : Marks the device node as an interrupt controller. |
| 11 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. | 10 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. |
| @@ -22,7 +22,6 @@ Required properties: · 21 unmodified lines | |||
| 22 | connected to. | 22 | connected to. |
| 23 | - interrupt-controller : Arizona class devices contain interrupt controllers | 23 | - interrupt-controller : Arizona class devices contain interrupt controllers |
| 24 | and may provide interrupt services to other devices. | 24 | and may provide interrupt services to other devices. |
| 25 | - interrupt-parent : The parent interrupt controller. | ||
| 26 | - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. | 25 | - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. |
| 27 | The first cell is the IRQ number. | 26 | The first cell is the IRQ number. |
| 28 | The second cell is the flags, encoded as the trigger masks from | 27 | The second cell is the flags, encoded as the trigger masks from |
| @@ -20,6 +20,8 @@ Optional properties: · 19 unmodified lines | |||
| 20 | - ams,enable-internal-i2c-pullup: Boolean property, to enable internal pullup on | 20 | - ams,enable-internal-i2c-pullup: Boolean property, to enable internal pullup on |
| 21 | i2c scl/sda pins. Missing this will disable internal pullup on i2c | 21 | i2c scl/sda pins. Missing this will disable internal pullup on i2c |
| 22 | scl/sda lines. | 22 | scl/sda lines. |
| 23 | - ams,enable-ac-ok-power-on: Boolean property, to enable exit out of power off | ||
| 24 | mode with AC_OK pin (pin enabled in power off mode). | ||
| 23 | 25 | ||
| 24 | Optional submodule and their properties: | 26 | Optional submodule and their properties: |
| 25 | ======================================= | 27 | ======================================= |
| @@ -28,7 +28,6 @@ Required properties: · 27 unmodified lines | |||
| 28 | * "x-powers,axp809" | 28 | * "x-powers,axp809" |
| 29 | * "x-powers,axp813" | 29 | * "x-powers,axp813" |
| 30 | - reg: The I2C slave address or RSB hardware address for the AXP chip | 30 | - reg: The I2C slave address or RSB hardware address for the AXP chip |
| 31 | - interrupt-parent: The parent interrupt controller | ||
| 32 | - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin | 31 | - interrupts: SoC NMI / GPIO interrupt connected to the PMIC's IRQ pin |
| 33 | - interrupt-controller: The PMIC has its own internal IRQs | 32 | - interrupt-controller: The PMIC has its own internal IRQs |
| 34 | - #interrupt-cells: Should be set to 1 | 33 | - #interrupt-cells: Should be set to 1 |
| @@ -45,8 +44,11 @@ Optional properties: · 10 unmodified lines | |||
| 45 | board is driving OTG VBus or not. | 44 | board is driving OTG VBus or not. |
| 46 | (axp221 / axp223 / axp803/ axp813 only) | 45 | (axp221 / axp223 / axp803/ axp813 only) |
| 47 | 46 | ||
| 48 | - x-powers,master-mode: Boolean (axp806 only). Set this when the PMIC is | 47 | - x-powers,self-working-mode and |
| 49 | wired for master mode. The default is slave mode. | 48 | x-powers,master-mode: Boolean (axp806 only). Set either of these when the |
| 49 | PMIC is wired for self-working mode or master mode. | ||
| 50 | If neither is set then slave mode is assumed. | ||
| 51 | This corresponds to how the MODESET pin is wired. | ||
| 50 | 52 | ||
| 51 | - <input>-supply: a phandle to the regulator supply node. May be omitted if | 53 | - <input>-supply: a phandle to the regulator supply node. May be omitted if |
| 52 | inputs are unregulated, such as using the IPSOUT output | 54 | inputs are unregulated, such as using the IPSOUT output |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : Should be "rohm,bd9571mwv". | 4 | - compatible : Should be "rohm,bd9571mwv". |
| 5 | - reg : I2C slave address. | 5 | - reg : I2C slave address. |
| 6 | - interrupt-parent : Phandle to the parent interrupt controller. | ||
| 7 | - interrupts : The interrupt line the device is connected to. | 6 | - interrupts : The interrupt line the device is connected to. |
| 8 | - interrupt-controller : Marks the device node as an interrupt controller. | 7 | - interrupt-controller : Marks the device node as an interrupt controller. |
| 9 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. | 8 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | - interrupts: the main IRQ line to signal the collected IRQs | 10 | - interrupts: the main IRQ line to signal the collected IRQs |
| 11 | - #interrupt-cells : is 2 and their usage is compliant to the 2 cells variant | 11 | - #interrupt-cells : is 2 and their usage is compliant to the 2 cells variant |
| 12 | of Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 12 | of Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 13 | - interrupt-parent: the parent IRQ ctrl the main IRQ is connected to | ||
| 14 | - reg: access on the parent local bus (chip select, offset in chip select, size) | 13 | - reg: access on the parent local bus (chip select, offset in chip select, size) |
| 15 | 14 | ||
| 16 | Example: | 15 | Example: |
| @@ -22,8 +22,6 @@ Documentation/devicetree/bindings/sound/da9055.txt · 21 unmodified lines | |||
| 22 | Required properties: | 22 | Required properties: |
| 23 | - compatible : Should be "dlg,da9055-pmic" | 23 | - compatible : Should be "dlg,da9055-pmic" |
| 24 | - reg: Specifies the I2C slave address (defaults to 0x5a but can be modified) | 24 | - reg: Specifies the I2C slave address (defaults to 0x5a but can be modified) |
| 25 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 26 | the IRQs from da9055 are delivered to. | ||
| 27 | - interrupts: IRQ line info for da9055 chip. | 25 | - interrupts: IRQ line info for da9055 chip. |
| 28 | - interrupt-controller: da9055 has internal IRQs (has own IRQ domain). | 26 | - interrupt-controller: da9055 has internal IRQs (has own IRQ domain). |
| 29 | - #interrupt-cells: Should be 1, is the local IRQ number for da9055. | 27 | - #interrupt-cells: Should be 1, is the local IRQ number for da9055. |
| @@ -32,8 +32,6 @@ Required properties: · 31 unmodified lines | |||
| 32 | "dlg,da9061" for DA9061 | 32 | "dlg,da9061" for DA9061 |
| 33 | - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be | 33 | - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be |
| 34 | modified to match the chip's OTP settings). | 34 | modified to match the chip's OTP settings). |
| 35 | - interrupt-parent : Specifies the reference to the interrupt controller for | ||
| 36 | the DA9062 or DA9061. | ||
| 37 | - interrupts : IRQ line information. | 35 | - interrupts : IRQ line information. |
| 38 | - interrupt-controller | 36 | - interrupt-controller |
| 39 | 37 | ||
| @@ -16,8 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | - compatible : Should be "dlg,da9063" or "dlg,da9063l" | 16 | - compatible : Should be "dlg,da9063" or "dlg,da9063l" |
| 17 | - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be | 17 | - reg : Specifies the I2C slave address (this defaults to 0x58 but it can be |
| 18 | modified to match the chip's OTP settings). | 18 | modified to match the chip's OTP settings). |
| 19 | - interrupt-parent : Specifies the reference to the interrupt controller for | ||
| 20 | the DA9063. | ||
| 21 | - interrupts : IRQ line information. | 19 | - interrupts : IRQ line information. |
| 22 | - interrupt-controller | 20 | - interrupt-controller |
| 23 | 21 | ||
| @@ -13,8 +13,6 @@ da9150-fg : Battery Fuel-Gauge · 12 unmodified lines | |||
| 13 | Required properties: | 13 | Required properties: |
| 14 | - compatible : Should be "dlg,da9150" | 14 | - compatible : Should be "dlg,da9150" |
| 15 | - reg: Specifies the I2C slave address | 15 | - reg: Specifies the I2C slave address |
| 16 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 17 | the IRQs from da9150 are delivered to. | ||
| 18 | - interrupts: IRQ line info for da9150 chip. | 16 | - interrupts: IRQ line info for da9150 chip. |
| 19 | - interrupt-controller: da9150 has internal IRQs (own IRQ domain). | 17 | - interrupt-controller: da9150 has internal IRQs (own IRQ domain). |
| 20 | (See ../interrupt-controller/interrupts.txt for | 18 | (See ../interrupt-controller/interrupts.txt for |
| @@ -0,0 +1,102 @@ | |||
| 1 | Cirrus Logic Madera class audio codecs Multi-Functional Device | ||
| 2 | |||
| 3 | These devices are audio SoCs with extensive digital capabilities and a range | ||
| 4 | of analogue I/O. | ||
| 5 | |||
| 6 | See also the child driver bindings in: | ||
| 7 | bindings/pinctrl/cirrus,madera-pinctrl.txt | ||
| 8 | bindings/regulator/arizona-regulator.txt | ||
| 9 | bindings/sound/madera.txt | ||
| 10 | |||
| 11 | Required properties: | ||
| 12 | |||
| 13 | - compatible : One of the following chip-specific strings: | ||
| 14 | "cirrus,cs47l35" | ||
| 15 | "cirrus,cs47l85" | ||
| 16 | "cirrus,cs47l90" | ||
| 17 | "cirrus,cs47l91" | ||
| 18 | "cirrus,wm1840" | ||
| 19 | |||
| 20 | - reg : I2C slave address when connected using I2C, chip select number when | ||
| 21 | using SPI. | ||
| 22 | |||
| 23 | - DCVDD-supply : Power supply for the device as defined in | ||
| 24 | bindings/regulator/regulator.txt | ||
| 25 | Mandatory on CS47L35, CS47L90, CS47L91 | ||
| 26 | Optional on CS47L85, WM1840 | ||
| 27 | |||
| 28 | - AVDD-supply, DBVDD1-supply, DBVDD2-supply, CPVDD1-supply, CPVDD2-supply : | ||
| 29 | Power supplies for the device | ||
| 30 | |||
| 31 | - DBVDD3-supply, DBVDD4-supply : Power supplies for the device | ||
| 32 | (CS47L85, CS47L90, CS47L91, WM1840) | ||
| 33 | |||
| 34 | - SPKVDDL-supply, SPKVDDR-supply : Power supplies for the device | ||
| 35 | (CS47L85, WM1840) | ||
| 36 | |||
| 37 | - SPKVDD-supply : Power supply for the device | ||
| 38 | (CS47L35) | ||
| 39 | |||
| 40 | - interrupt-controller : Indicates that this device is an interrupt controller | ||
| 41 | |||
| 42 | - #interrupt-cells: the number of cells to describe an IRQ, must be 2. | ||
| 43 | The first cell is the IRQ number. | ||
| 44 | The second cell is the flags, encoded as the trigger masks from | ||
| 45 | bindings/interrupt-controller/interrupts.txt | ||
| 46 | |||
| 47 | - gpio-controller : Indicates this device is a GPIO controller. | ||
| 48 | |||
| 49 | - #gpio-cells : Must be 2. The first cell is the pin number. The second cell | ||
| 50 | is reserved for future use and must be zero | ||
| 51 | |||
| 52 | - interrupt-parent : The parent interrupt controller. | ||
| 53 | |||
| 54 | - interrupts : The interrupt line the /IRQ signal for the device is | ||
| 55 | connected to. | ||
| 56 | |||
| 57 | Optional properties: | ||
| 58 | |||
| 59 | - MICVDD-supply : Power supply, only need to be specified if | ||
| 60 | powered externally | ||
| 61 | |||
| 62 | - reset-gpios : One entry specifying the GPIO controlling /RESET. | ||
| 63 | As defined in bindings/gpio.txt. | ||
| 64 | Although optional, it is strongly recommended to use a hardware reset | ||
| 65 | |||
| 66 | - MICBIASx : Initial data for the MICBIAS regulators, as covered in | ||
| 67 | Documentation/devicetree/bindings/regulator/regulator.txt. | ||
| 68 | One for each MICBIAS generator (MICBIAS1, MICBIAS2, ...) | ||
| 69 | (all codecs) | ||
| 70 | |||
| 71 | One for each output pin (MICBIAS1A, MIBCIAS1B, MICBIAS2A, ...) | ||
| 72 | (all except CS47L85, WM1840) | ||
| 73 | |||
| 74 | The following following additional property is supported for the generator | ||
| 75 | nodes: | ||
| 76 | - cirrus,ext-cap : Set to 1 if the MICBIAS has external decoupling | ||
| 77 | capacitors attached. | ||
| 78 | |||
| 79 | Optional child nodes: | ||
| 80 | micvdd : Node containing initialization data for the micvdd regulator | ||
| 81 | See bindings/regulator/arizona-regulator.txt | ||
| 82 | |||
| 83 | ldo1 : Node containing initialization data for the LDO1 regulator | ||
| 84 | See bindings/regulator/arizona-regulator.txt | ||
| 85 | (cs47l85, wm1840) | ||
| 86 | |||
| 87 | Example: | ||
| 88 | |||
| 89 | cs47l85@0 { | ||
| 90 | compatible = "cirrus,cs47l85"; | ||
| 91 | reg = <0>; | ||
| 92 | |||
| 93 | reset-gpios = <&gpio 0>; | ||
| 94 | |||
| 95 | interrupt-controller; | ||
| 96 | #interrupt-cells = <2>; | ||
| 97 | interrupts = <&host_irq1>; | ||
| 98 | interrupt-parent = <&gic>; | ||
| 99 | |||
| 100 | gpio-controller; | ||
| 101 | #gpio-cells = <2>; | ||
| 102 | }; | ||
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | - compatible : Must be "maxim,max14577" or "maxim,max77836". | 11 | - compatible : Must be "maxim,max14577" or "maxim,max77836". |
| 12 | - reg : I2C slave address for the max14577 chip (0x25 for max14577/max77836) | 12 | - reg : I2C slave address for the max14577 chip (0x25 for max14577/max77836) |
| 13 | - interrupts : IRQ line for the chip. | 13 | - interrupts : IRQ line for the chip. |
| 14 | - interrupt-parent : The parent interrupt controller. | ||
| 15 | 14 | ||
| 16 | 15 | ||
| 17 | Required nodes: | 16 | Required nodes: |
| @@ -15,7 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | - compatible : Must be "maxim,max77686"; | 15 | - compatible : Must be "maxim,max77686"; |
| 16 | - reg : Specifies the i2c slave address of PMIC block. | 16 | - reg : Specifies the i2c slave address of PMIC block. |
| 17 | - interrupts : This i2c device has an IRQ line connected to the main SoC. | 17 | - interrupts : This i2c device has an IRQ line connected to the main SoC. |
| 18 | - interrupt-parent : The parent interrupt controller. | ||
| 19 | 18 | ||
| 20 | Example: | 19 | Example: |
| 21 | 20 | ||
| @@ -14,7 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | - compatible : Must be "maxim,max77693". | 14 | - compatible : Must be "maxim,max77693". |
| 15 | - reg : Specifies the i2c slave address of PMIC block. | 15 | - reg : Specifies the i2c slave address of PMIC block. |
| 16 | - interrupts : This i2c device has an IRQ line connected to the main SoC. | 16 | - interrupts : This i2c device has an IRQ line connected to the main SoC. |
| 17 | - interrupt-parent : The parent interrupt controller. | ||
| 18 | 17 | ||
| 19 | Optional properties: | 18 | Optional properties: |
| 20 | - regulators : The regulators of max77693 have to be instantiated under subnode | 19 | - regulators : The regulators of max77693 have to be instantiated under subnode |
| @@ -14,7 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | - compatible : Must be "maxim,max77802" | 14 | - compatible : Must be "maxim,max77802" |
| 15 | - reg : Specifies the I2C slave address of PMIC block. | 15 | - reg : Specifies the I2C slave address of PMIC block. |
| 16 | - interrupts : I2C device IRQ line connected to the main SoC. | 16 | - interrupts : I2C device IRQ line connected to the main SoC. |
| 17 | - interrupt-parent : The parent interrupt controller. | ||
| 18 | 17 | ||
| 19 | Example: | 18 | Example: |
| 20 | 19 | ||
| @@ -20,8 +20,6 @@ Required properties: · 19 unmodified lines | |||
| 20 | - reg: Specifies the i2c slave address of the pmic block. It should be 0x66. | 20 | - reg: Specifies the i2c slave address of the pmic block. It should be 0x66. |
| 21 | 21 | ||
| 22 | Optional properties: | 22 | Optional properties: |
| 23 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 24 | the interrupts from MAX8998 are routed to. | ||
| 25 | - interrupts: Interrupt specifiers for two interrupt sources. | 23 | - interrupts: Interrupt specifiers for two interrupt sources. |
| 26 | - First interrupt specifier is for main interrupt. | 24 | - First interrupt specifier is for main interrupt. |
| 27 | - Second interrupt specifier is for power-on/-off interrupt. | 25 | - Second interrupt specifier is for power-on/-off interrupt. |
| @@ -3,7 +3,6 @@ Motorola CPCAP PMIC device tree binding · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : One or both of "motorola,cpcap" or "ste,6556002" | 4 | - compatible : One or both of "motorola,cpcap" or "ste,6556002" |
| 5 | - reg : SPI chip select | 5 | - reg : SPI chip select |
| 6 | - interrupt-parent : The parent interrupt controller | ||
| 7 | - interrupts : The interrupt line the device is connected to | 6 | - interrupts : The interrupt line the device is connected to |
| 8 | - interrupt-controller : Marks the device node as an interrupt controller | 7 | - interrupt-controller : Marks the device node as an interrupt controller |
| 9 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2 | 8 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2 |
| @@ -25,7 +25,6 @@ and also the generic series names · 24 unmodified lines | |||
| 25 | The first cell is the IRQ number. | 25 | The first cell is the IRQ number. |
| 26 | The second cell is the flags, encoded as the trigger masks from | 26 | The second cell is the flags, encoded as the trigger masks from |
| 27 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 27 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 28 | - interrupt-parent : The parent interrupt controller. | ||
| 29 | 28 | ||
| 30 | Optional properties: | 29 | Optional properties: |
| 31 | ti,mux-padX : set the pad register X (1-2) to the correct muxing for the | 30 | ti,mux-padX : set the pad register X (1-2) to the correct muxing for the |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | - compatible: "nokia,retu" or "nokia,tahvo" | 9 | - compatible: "nokia,retu" or "nokia,tahvo" |
| 10 | - reg: Specifies the CBUS slave address of the ASIC chip | 10 | - reg: Specifies the CBUS slave address of the ASIC chip |
| 11 | - interrupts: The interrupt line the device is connected to | 11 | - interrupts: The interrupt line the device is connected to |
| 12 | - interrupt-parent: The parent interrupt controller | ||
| 13 | 12 | ||
| 14 | Example: | 13 | Example: |
| 15 | 14 | ||
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | - compatible: "rockchip,rk808" | 10 | - compatible: "rockchip,rk808" |
| 11 | - compatible: "rockchip,rk818" | 11 | - compatible: "rockchip,rk818" |
| 12 | - reg: I2C slave address | 12 | - reg: I2C slave address |
| 13 | - interrupt-parent: The parent interrupt controller. | ||
| 14 | - interrupts: the interrupt outputs of the controller. | 13 | - interrupts: the interrupt outputs of the controller. |
| 15 | - #clock-cells: from common clock binding; shall be set to 1 (multiple clock | 14 | - #clock-cells: from common clock binding; shall be set to 1 (multiple clock |
| 16 | outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. | 15 | outputs). See <dt-bindings/clock/rockchip,rk808.h> for clock IDs. |
| @@ -0,0 +1,62 @@ | |||
| 1 | * ROHM BD71837 Power Management Integrated Circuit bindings | ||
| 2 | |||
| 3 | BD71837MWV is a programmable Power Management IC for powering single-core, | ||
| 4 | dual-core, and quad-core SoCs such as NXP-i.MX 8M. It is optimized for | ||
| 5 | low BOM cost and compact solution footprint. It integrates 8 Buck | ||
| 6 | egulators and 7 LDOs to provide all the power rails required by the SoC and | ||
| 7 | the commonly used peripherals. | ||
| 8 | |||
| 9 | Datasheet for PMIC is available at: | ||
| 10 | https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e | ||
| 11 | |||
| 12 | Required properties: | ||
| 13 | - compatible : Should be "rohm,bd71837". | ||
| 14 | - reg : I2C slave address. | ||
| 15 | - interrupt-parent : Phandle to the parent interrupt controller. | ||
| 16 | - interrupts : The interrupt line the device is connected to. | ||
| 17 | - clocks : The parent clock connected to PMIC. If this is missing | ||
| 18 | 32768 KHz clock is assumed. | ||
| 19 | - #clock-cells : Should be 0. | ||
| 20 | - regulators: : List of child nodes that specify the regulators. | ||
| 21 | Please see ../regulator/rohm,bd71837-regulator.txt | ||
| 22 | |||
| 23 | Optional properties: | ||
| 24 | - clock-output-names : Should contain name for output clock. | ||
| 25 | |||
| 26 | Example: | ||
| 27 | |||
| 28 | /* external oscillator node */ | ||
| 29 | osc: oscillator { | ||
| 30 | compatible = "fixed-clock"; | ||
| 31 | #clock-cells = <1>; | ||
| 32 | clock-frequency = <32768>; | ||
| 33 | clock-output-names = "osc"; | ||
| 34 | }; | ||
| 35 | |||
| 36 | pmic: pmic@4b { | ||
| 37 | compatible = "rohm,bd71837"; | ||
| 38 | reg = <0x4b>; | ||
| 39 | interrupt-parent = <&gpio1>; | ||
| 40 | interrupts = <29 GPIO_ACTIVE_LOW>; | ||
| 41 | interrupt-names = "irq"; | ||
| 42 | #clock-cells = <0>; | ||
| 43 | clocks = <&osc 0>; | ||
| 44 | clock-output-names = "bd71837-32k-out"; | ||
| 45 | |||
| 46 | regulators { | ||
| 47 | buck1: BUCK1 { | ||
| 48 | regulator-name = "buck1"; | ||
| 49 | regulator-min-microvolt = <700000>; | ||
| 50 | regulator-max-microvolt = <1300000>; | ||
| 51 | regulator-boot-on; | ||
| 52 | regulator-ramp-delay = <1250>; | ||
| 53 | }; | ||
| 54 | }; | ||
| 55 | }; | ||
| 56 | |||
| 57 | /* Clock consumer node */ | ||
| 58 | rtc@0 { | ||
| 59 | compatible = "company,my-rtc"; | ||
| 60 | clock-names = "my-clock"; | ||
| 61 | clocks = <&pmic>; | ||
| 62 | }; | ||
| @@ -31,8 +31,6 @@ Required properties: · 30 unmodified lines | |||
| 31 | - reg: Specifies the I2C slave address of the pmic block. It should be 0x66. | 31 | - reg: Specifies the I2C slave address of the pmic block. It should be 0x66. |
| 32 | 32 | ||
| 33 | Optional properties: | 33 | Optional properties: |
| 34 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 35 | the interrupts from s2mps11 are delivered to. | ||
| 36 | - interrupts: Interrupt specifiers for interrupt sources. | 34 | - interrupts: Interrupt specifiers for interrupt sources. |
| 37 | - samsung,s2mps11-wrstbi-ground: Indicates that WRSTBI pin of PMIC is pulled | 35 | - samsung,s2mps11-wrstbi-ground: Indicates that WRSTBI pin of PMIC is pulled |
| 38 | down. When the system is suspended it will always go down thus triggerring | 36 | down. When the system is suspended it will always go down thus triggerring |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | Optional properties: | 10 | Optional properties: |
| 11 | - interrupts : The interrupt outputs from the controller | 11 | - interrupts : The interrupt outputs from the controller |
| 12 | - interrupt-controller : Marks the device node as an interrupt controller | 12 | - interrupt-controller : Marks the device node as an interrupt controller |
| 13 | - interrupt-parent : Specifies which IRQ controller we're connected to | ||
| 14 | - wakeup-source : Marks the input device as wakable | 13 | - wakeup-source : Marks the input device as wakable |
| 15 | - st,autosleep-timeout : Valid entries (ms); 4, 16, 32, 64, 128, 256, 512 and 1024 | 14 | - st,autosleep-timeout : Valid entries (ms); 4, 16, 32, 64, 128, 256, 512 and 1024 |
| 16 | - irq-gpio : If present, which GPIO to use for event IRQ | 15 | - irq-gpio : If present, which GPIO to use for event IRQ |
| @@ -15,7 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | - compatible : must be "toshiba,tc35890", "toshiba,tc35892", "toshiba,tc35893", | 15 | - compatible : must be "toshiba,tc35890", "toshiba,tc35892", "toshiba,tc35893", |
| 16 | "toshiba,tc35894", "toshiba,tc35895" or "toshiba,tc35896" | 16 | "toshiba,tc35894", "toshiba,tc35895" or "toshiba,tc35896" |
| 17 | - reg : I2C address of the device | 17 | - reg : I2C address of the device |
| 18 | - interrupt-parent : specifies which IRQ controller we're connected to | ||
| 19 | - interrupts : the interrupt on the parent the controller is connected to | 18 | - interrupts : the interrupt on the parent the controller is connected to |
| 20 | - interrupt-controller : marks the device node as an interrupt controller | 19 | - interrupt-controller : marks the device node as an interrupt controller |
| 21 | - #interrupt-cells : should be <1>, the first cell is the IRQ offset on this | 20 | - #interrupt-cells : should be <1>, the first cell is the IRQ offset on this |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : Should be "ti,tps65086". | 4 | - compatible : Should be "ti,tps65086". |
| 5 | - reg : I2C slave address. | 5 | - reg : I2C slave address. |
| 6 | - interrupt-parent : Phandle to the parent interrupt controller. | ||
| 7 | - interrupts : The interrupt line the device is connected to. | 6 | - interrupts : The interrupt line the device is connected to. |
| 8 | - interrupt-controller : Marks the device node as an interrupt controller. | 7 | - interrupt-controller : Marks the device node as an interrupt controller. |
| 9 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. | 8 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. |
| @@ -22,7 +22,7 @@ Required properties: · 21 unmodified lines | |||
| 22 | The valid regulator-compatible values are: | 22 | The valid regulator-compatible values are: |
| 23 | tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1, | 23 | tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1, |
| 24 | vaux2, vaux33, vmmc, vbb | 24 | vaux2, vaux33, vmmc, vbb |
| 25 | tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5, | 25 | tps65911: vrtc, vio, vdd1, vdd2, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5, |
| 26 | ldo6, ldo7, ldo8 | 26 | ldo6, ldo7, ldo8 |
| 27 | 27 | ||
| 28 | - xxx-supply: Input voltage supply regulator. | 28 | - xxx-supply: Input voltage supply regulator. |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : Should be "ti,tps65912". | 4 | - compatible : Should be "ti,tps65912". |
| 5 | - reg : Slave address or chip select number (I2C / SPI). | 5 | - reg : Slave address or chip select number (I2C / SPI). |
| 6 | - interrupt-parent : The parent interrupt controller. | ||
| 7 | - interrupts : The interrupt line the device is connected to. | 6 | - interrupts : The interrupt line the device is connected to. |
| 8 | - interrupt-controller : Marks the device node as an interrupt controller. | 7 | - interrupt-controller : Marks the device node as an interrupt controller. |
| 9 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. | 8 | - #interrupt-cells : The number of cells to describe an IRQ, should be 2. |
| @@ -16,7 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | - interrupt-controller : Since the twl support several interrupts internally, | 16 | - interrupt-controller : Since the twl support several interrupts internally, |
| 17 | it is considered as an interrupt controller cascaded to the SoC one. | 17 | it is considered as an interrupt controller cascaded to the SoC one. |
| 18 | - #interrupt-cells = <1>; | 18 | - #interrupt-cells = <1>; |
| 19 | - interrupt-parent : The parent interrupt controller. | ||
| 20 | 19 | ||
| 21 | Optional node: | 20 | Optional node: |
| 22 | - Child nodes contain in the twl. The twl family is made of several variants | 21 | - Child nodes contain in the twl. The twl family is made of several variants |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | - compatible : "ti,twl6040" for twl6040, "ti,twl6041" for twl6041 | 9 | - compatible : "ti,twl6040" for twl6040, "ti,twl6041" for twl6041 |
| 10 | - reg: must be 0x4b for i2c address | 10 | - reg: must be 0x4b for i2c address |
| 11 | - interrupts: twl6040 has one interrupt line connecteded to the main SoC | 11 | - interrupts: twl6040 has one interrupt line connecteded to the main SoC |
| 12 | - interrupt-parent: The parent interrupt controller | ||
| 13 | - gpio-controller: | 12 | - gpio-controller: |
| 14 | - #gpio-cells = <1>: twl6040 provides GPO lines. | 13 | - #gpio-cells = <1>: twl6040 provides GPO lines. |
| 15 | - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM | 14 | - #clock-cells = <0>; twl6040 is a provider of pdmclk which is used by McPDM |
| @@ -22,7 +22,6 @@ Required properties: · 21 unmodified lines | |||
| 22 | 22 | ||
| 23 | - interrupts : The interrupt line the IRQ signal for the device is | 23 | - interrupts : The interrupt line the IRQ signal for the device is |
| 24 | connected to. | 24 | connected to. |
| 25 | - interrupt-parent : The parent interrupt controller. | ||
| 26 | 25 | ||
| 27 | - interrupt-controller : wm831x devices contain interrupt controllers and | 26 | - interrupt-controller : wm831x devices contain interrupt controllers and |
| 28 | may provide interrupt services to other devices. | 27 | may provide interrupt services to other devices. |
| @@ -152,7 +152,7 @@ Required properties: · 151 unmodified lines | |||
| 152 | - compatible : should contain one of: | 152 | - compatible : should contain one of: |
| 153 | "brcm,bcm7425-timers" | 153 | "brcm,bcm7425-timers" |
| 154 | "brcm,bcm7429-timers" | 154 | "brcm,bcm7429-timers" |
| 155 | "brcm,bcm7435-timers and | 155 | "brcm,bcm7435-timers" and |
| 156 | "brcm,brcmstb-timers" | 156 | "brcm,brcmstb-timers" |
| 157 | - reg : the timers register range | 157 | - reg : the timers register range |
| 158 | - interrupts : the interrupt line for this timer block | 158 | - interrupts : the interrupt line for this timer block |
| @@ -13,8 +13,6 @@ Properties: · 12 unmodified lines | |||
| 13 | - cavium,max-bits: The index (zero based) of the highest numbered bit | 13 | - cavium,max-bits: The index (zero based) of the highest numbered bit |
| 14 | in the CIB block. | 14 | in the CIB block. |
| 15 | 15 | ||
| 16 | - interrupt-parent: Always the CIU on the SoC. | ||
| 17 | |||
| 18 | - interrupts: The CIU line to which the CIB block is connected. | 16 | - interrupts: The CIU line to which the CIB block is connected. |
| 19 | 17 | ||
| 20 | - #interrupt-cells: Must be <2>. The first cell is the bit within the | 18 | - #interrupt-cells: Must be <2>. The first cell is the bit within the |
| @@ -0,0 +1,35 @@ | |||
| 1 | * ASPEED AST2400 and AST2500 coprocessor interrupt controller | ||
| 2 | |||
| 3 | This file describes the bindings for the interrupt controller present | ||
| 4 | in the AST2400 and AST2500 BMC SoCs which provides interrupt to the | ||
| 5 | ColdFire coprocessor. | ||
| 6 | |||
| 7 | It is not a normal interrupt controller and it would be rather | ||
| 8 | inconvenient to create an interrupt tree for it as it somewhat shares | ||
| 9 | some of the same sources as the main ARM interrupt controller but with | ||
| 10 | different numbers. | ||
| 11 | |||
| 12 | The AST2500 supports a SW generated interrupt | ||
| 13 | |||
| 14 | Required properties: | ||
| 15 | - reg: address and length of the register for the device. | ||
| 16 | - compatible: "aspeed,cvic" and one of: | ||
| 17 | "aspeed,ast2400-cvic" | ||
| 18 | or | ||
| 19 | "aspeed,ast2500-cvic" | ||
| 20 | |||
| 21 | - valid-sources: One cell, bitmap of supported sources for the implementation | ||
| 22 | |||
| 23 | Optional properties; | ||
| 24 | - copro-sw-interrupts: List of interrupt numbers that can be used as | ||
| 25 | SW interrupts from the ARM to the coprocessor. | ||
| 26 | (AST2500 only) | ||
| 27 | |||
| 28 | Example: | ||
| 29 | |||
| 30 | cvic: copro-interrupt-controller@1e6c2000 { | ||
| 31 | compatible = "aspeed,ast2500-cvic"; | ||
| 32 | valid-sources = <0xffffffff>; | ||
| 33 | copro-sw-interrupts = <1>; | ||
| 34 | reg = <0x1e6c2000 0x80>; | ||
| 35 | }; | ||
| @@ -19,8 +19,6 @@ Required Properties: · 18 unmodified lines | |||
| 19 | - clocks: From clock bindings: Handles to clock inputs. | 19 | - clocks: From clock bindings: Handles to clock inputs. |
| 20 | - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb" | 20 | - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb" |
| 21 | - interrupts: Interrupt specifier | 21 | - interrupts: Interrupt specifier |
| 22 | - interrupt-parent: Phandle for the interrupt controller that services | ||
| 23 | interrupts for this device. | ||
| 24 | 22 | ||
| 25 | Required Properties for "arasan,sdhci-5.1": | 23 | Required Properties for "arasan,sdhci-5.1": |
| 26 | - phys: From PHY bindings: Phandle for the Generic PHY for arasan. | 24 | - phys: From PHY bindings: Phandle for the Generic PHY for arasan. |
| @@ -39,6 +37,8 @@ Optional Properties: · 12 unmodified lines | |||
| 39 | - xlnx,fails-without-test-cd: when present, the controller doesn't work when | 37 | - xlnx,fails-without-test-cd: when present, the controller doesn't work when |
| 40 | the CD line is not connected properly, and the line is not connected | 38 | the CD line is not connected properly, and the line is not connected |
| 41 | properly. Test mode can be used to force the controller to function. | 39 | properly. Test mode can be used to force the controller to function. |
| 40 | - xlnx,int-clock-stable-broken: when present, the controller always reports | ||
| 41 | that the internal clock is stable even when it is not. | ||
| 42 | 42 | ||
| 43 | Example: | 43 | Example: |
| 44 | sdhci@e0100000 { | 44 | sdhci@e0100000 { |
| @@ -21,7 +21,6 @@ Required properties: · 20 unmodified lines | |||
| 21 | "fsl,ls1043a-esdhc" | 21 | "fsl,ls1043a-esdhc" |
| 22 | "fsl,ls1046a-esdhc" | 22 | "fsl,ls1046a-esdhc" |
| 23 | "fsl,ls2080a-esdhc" | 23 | "fsl,ls2080a-esdhc" |
| 24 | - interrupt-parent : interrupt source phandle. | ||
| 25 | - clock-frequency : specifies eSDHC base clock frequency. | 24 | - clock-frequency : specifies eSDHC base clock frequency. |
| 26 | 25 | ||
| 27 | Optional properties: | 26 | Optional properties: |
| @@ -13,8 +13,6 @@ Optional properties: · 12 unmodified lines | |||
| 13 | - gpios : may specify GPIOs in this order: Card-Detect GPIO, | 13 | - gpios : may specify GPIOs in this order: Card-Detect GPIO, |
| 14 | Write-Protect GPIO. Note that this does not follow the | 14 | Write-Protect GPIO. Note that this does not follow the |
| 15 | binding from mmc.txt, for historical reasons. | 15 | binding from mmc.txt, for historical reasons. |
| 16 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 17 | services interrupts for this device. | ||
| 18 | 16 | ||
| 19 | Example: | 17 | Example: |
| 20 | 18 | ||
| @@ -8,10 +8,9 @@ Required properties: · 7 unmodified lines | |||
| 8 | 8 | ||
| 9 | Optional properties: | 9 | Optional properties: |
| 10 | - marvell,detect-delay-ms: sets the detection delay timeout in ms. | 10 | - marvell,detect-delay-ms: sets the detection delay timeout in ms. |
| 11 | - marvell,gpio-power: GPIO spec for the card power enable pin | ||
| 12 | 11 | ||
| 13 | This file documents differences between the core properties in mmc.txt | 12 | In addition to the properties described in this docuent, the details |
| 14 | and the properties used by the pxa-mmc driver. | 13 | described in mmc.txt are supported. |
| 15 | 14 | ||
| 16 | Examples: | 15 | Examples: |
| 17 | 16 | ||
| @@ -19,6 +18,7 @@ mmc0: mmc@41100000 { · 1 unmodified line | |||
| 19 | compatible = "marvell,pxa-mmc"; | 18 | compatible = "marvell,pxa-mmc"; |
| 20 | reg = <0x41100000 0x1000>; | 19 | reg = <0x41100000 0x1000>; |
| 21 | interrupts = <23>; | 20 | interrupts = <23>; |
| 21 | vmmc-supply = <&mmc_regulator>; | ||
| 22 | cd-gpios = <&gpio 23 0>; | 22 | cd-gpios = <&gpio 23 0>; |
| 23 | wp-gpios = <&gpio 24 0>; | 23 | wp-gpios = <&gpio 24 0>; |
| 24 | }; | 24 | }; |
| @@ -14,6 +14,7 @@ Required Properties: · 13 unmodified lines | |||
| 14 | before RK3288 | 14 | before RK3288 |
| 15 | - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 | 15 | - "rockchip,rk3288-dw-mshc": for Rockchip RK3288 |
| 16 | - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108 | 16 | - "rockchip,rv1108-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RV1108 |
| 17 | - "rockchip,px30-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip PX30 | ||
| 17 | - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 | 18 | - "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036 |
| 18 | - "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x | 19 | - "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK322x |
| 19 | - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328 | 20 | - "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3328 |
| @@ -4,7 +4,12 @@ This file documents differences between the core properties in mmc.txt · 3 unmodified lines | |||
| 4 | and the properties used by the sdhci-msm driver. | 4 | and the properties used by the sdhci-msm driver. |
| 5 | 5 | ||
| 6 | Required properties: | 6 | Required properties: |
| 7 | - compatible: Should contain "qcom,sdhci-msm-v4". | 7 | - compatible: Should contain: |
| 8 | "qcom,sdhci-msm-v4" for sdcc versions less than 5.0 | ||
| 9 | "qcom,sdhci-msm-v5" for sdcc versions >= 5.0 | ||
| 10 | For SDCC version 5.0.0, MCI registers are removed from SDCC | ||
| 11 | interface and some registers are moved to HC. New compatible | ||
| 12 | string is added to support this change - "qcom,sdhci-msm-v5". | ||
| 8 | - reg: Base address and length of the register in the following order: | 13 | - reg: Base address and length of the register in the following order: |
| 9 | - Host controller register map (required) | 14 | - Host controller register map (required) |
| 10 | - SD Core register map (required) | 15 | - SD Core register map (required) |
| @@ -0,0 +1,20 @@ | |||
| 1 | * Synopsys DesignWare Cores Mobile Storage Host Controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: should be one of the following: | ||
| 5 | "snps,dwcmshc-sdhci" | ||
| 6 | - reg: offset and length of the register set for the device. | ||
| 7 | - interrupts: a single interrupt specifier. | ||
| 8 | - clocks: Array of clocks required for SDHCI; requires at least one for | ||
| 9 | core clock. | ||
| 10 | - clock-names: Array of names corresponding to clocks property; shall be | ||
| 11 | "core" for core clock and "bus" for optional bus clock. | ||
| 12 | |||
| 13 | Example: | ||
| 14 | sdhci2: sdhci@aa0000 { | ||
| 15 | compatible = "snps,dwcmshc-sdhci"; | ||
| 16 | reg = <0xaa0000 0x1000>; | ||
| 17 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; | ||
| 18 | clocks = <&emmcclk>; | ||
| 19 | bus-width = <8>; | ||
| 20 | } | ||
| @@ -16,6 +16,8 @@ Required properties: · 15 unmodified lines | |||
| 16 | * "allwinner,sun9i-a80-mmc" | 16 | * "allwinner,sun9i-a80-mmc" |
| 17 | * "allwinner,sun50i-a64-emmc" | 17 | * "allwinner,sun50i-a64-emmc" |
| 18 | * "allwinner,sun50i-a64-mmc" | 18 | * "allwinner,sun50i-a64-mmc" |
| 19 | * "allwinner,sun50i-h6-emmc", "allwinner.sun50i-a64-emmc" | ||
| 20 | * "allwinner,sun50i-h6-mmc", "allwinner.sun50i-a64-mmc" | ||
| 19 | - reg : mmc controller base registers | 21 | - reg : mmc controller base registers |
| 20 | - clocks : a list with 4 phandle + clock specifier pairs | 22 | - clocks : a list with 4 phandle + clock specifier pairs |
| 21 | - clock-names : must contain "ahb", "mmc", "output" and "sample" | 23 | - clock-names : must contain "ahb", "mmc", "output" and "sample" |
| @@ -28,6 +28,7 @@ Required properties: · 27 unmodified lines | |||
| 28 | "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC | 28 | "renesas,sdhi-r8a7796" - SDHI IP on R8A7796 SoC |
| 29 | "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC | 29 | "renesas,sdhi-r8a77965" - SDHI IP on R8A77965 SoC |
| 30 | "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC | 30 | "renesas,sdhi-r8a77980" - SDHI IP on R8A77980 SoC |
| 31 | "renesas,sdhi-r8a77990" - SDHI IP on R8A77990 SoC | ||
| 31 | "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC | 32 | "renesas,sdhi-r8a77995" - SDHI IP on R8A77995 SoC |
| 32 | "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller | 33 | "renesas,sdhi-shmobile" - a generic sh-mobile SDHI controller |
| 33 | "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller | 34 | "renesas,rcar-gen1-sdhi" - a generic R-Car Gen1 SDHI controller |
| @@ -42,7 +42,6 @@ Required properties: · 41 unmodified lines | |||
| 42 | May be "nand", if the SoC has the individual NAND | 42 | May be "nand", if the SoC has the individual NAND |
| 43 | interrupts multiplexed behind another custom piece of | 43 | interrupts multiplexed behind another custom piece of |
| 44 | hardware | 44 | hardware |
| 45 | - interrupt-parent : See standard interrupt bindings | ||
| 46 | - #address-cells : <1> - subnodes give the chip-select number | 45 | - #address-cells : <1> - subnodes give the chip-select number |
| 47 | - #size-cells : <0> | 46 | - #size-cells : <0> |
| 48 | 47 | ||
| @@ -8,6 +8,9 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg : should contain registers location and length for data and reg. | 8 | - reg : should contain registers location and length for data and reg. |
| 9 | - reg-names: Should contain the reg names "nand_data" and "denali_reg" | 9 | - reg-names: Should contain the reg names "nand_data" and "denali_reg" |
| 10 | - interrupts : The interrupt number. | 10 | - interrupts : The interrupt number. |
| 11 | - clocks: should contain phandle of the controller core clock, the bus | ||
| 12 | interface clock, and the ECC circuit clock. | ||
| 13 | - clock-names: should contain "nand", "nand_x", "ecc" | ||
| 11 | 14 | ||
| 12 | Optional properties: | 15 | Optional properties: |
| 13 | - nand-ecc-step-size: see nand.txt for details. If present, the value must be | 16 | - nand-ecc-step-size: see nand.txt for details. If present, the value must be |
| @@ -31,5 +34,7 @@ nand: nand@ff900000 { · 17 unmodified lines | |||
| 31 | compatible = "altr,socfpga-denali-nand"; | 34 | compatible = "altr,socfpga-denali-nand"; |
| 32 | reg = <0xff900000 0x20>, <0xffb80000 0x1000>; | 35 | reg = <0xff900000 0x20>, <0xffb80000 0x1000>; |
| 33 | reg-names = "nand_data", "denali_reg"; | 36 | reg-names = "nand_data", "denali_reg"; |
| 37 | clocks = <&nand_clk>, <&nand_x_clk>, <&nand_ecc_clk>; | ||
| 38 | clock-names = "nand", "nand_x", "ecc"; | ||
| 34 | interrupts = <0 144 4>; | 39 | interrupts = <0 144 4>; |
| 35 | }; | 40 | }; |
| @@ -16,7 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | - compatible: "ti,omap2-nand" | 16 | - compatible: "ti,omap2-nand" |
| 17 | - reg: range id (CS number), base offset and length of the | 17 | - reg: range id (CS number), base offset and length of the |
| 18 | NAND I/O space | 18 | NAND I/O space |
| 19 | - interrupt-parent: must point to gpmc node | ||
| 20 | - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount. | 19 | - interrupts: Two interrupt specifiers, one for fifoevent, one for termcount. |
| 21 | 20 | ||
| 22 | Optional properties: | 21 | Optional properties: |
| @@ -69,6 +69,15 @@ Optional properties: · 68 unmodified lines | |||
| 69 | all chips and support for it can not be detected at runtime. | 69 | all chips and support for it can not be detected at runtime. |
| 70 | Refer to your chips' datasheet to check if this is supported | 70 | Refer to your chips' datasheet to check if this is supported |
| 71 | by your chip. | 71 | by your chip. |
| 72 | - broken-flash-reset : Some flash devices utilize stateful addressing modes | ||
| 73 | (e.g., for 32-bit addressing) which need to be managed | ||
| 74 | carefully by a system. Because these sorts of flash don't | ||
| 75 | have a standardized software reset command, and because some | ||
| 76 | systems don't toggle the flash RESET# pin upon system reset | ||
| 77 | (if the pin even exists at all), there are systems which | ||
| 78 | cannot reboot properly if the flash is left in the "wrong" | ||
| 79 | state. This boolean flag can be used on such systems, to | ||
| 80 | denote the absence of a reliable reset mechanism. | ||
| 72 | 81 | ||
| 73 | Example: | 82 | Example: |
| 74 | 83 | ||
| @@ -25,7 +25,7 @@ Optional NAND chip properties: · 24 unmodified lines | |||
| 25 | Deprecated values: | 25 | Deprecated values: |
| 26 | "soft_bch": use "soft" and nand-ecc-algo instead | 26 | "soft_bch": use "soft" and nand-ecc-algo instead |
| 27 | - nand-ecc-algo: string, algorithm of NAND ECC. | 27 | - nand-ecc-algo: string, algorithm of NAND ECC. |
| 28 | Supported values are: "hamming", "bch". | 28 | Valid values are: "hamming", "bch", "rs". |
| 29 | - nand-bus-width : 8 or 16 bus width if not present 8 | 29 | - nand-bus-width : 8 or 16 bus width if not present 8 |
| 30 | - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false | 30 | - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false |
| 31 | 31 | ||
| @@ -43,6 +43,10 @@ Optional NAND chip properties: · 11 unmodified lines | |||
| 43 | This is particularly useful when only the in-band area is | 43 | This is particularly useful when only the in-band area is |
| 44 | used by the upper layers, and you want to make your NAND | 44 | used by the upper layers, and you want to make your NAND |
| 45 | as reliable as possible. | 45 | as reliable as possible. |
| 46 | - nand-is-boot-medium: Whether the NAND chip is a boot medium. Drivers might use | ||
| 47 | this information to select ECC algorithms supported by | ||
| 48 | the boot ROM or similar restrictions. | ||
| 49 | |||
| 46 | - nand-rb: shall contain the native Ready/Busy ids. | 50 | - nand-rb: shall contain the native Ready/Busy ids. |
| 47 | 51 | ||
| 48 | The ECC strength and ECC step size properties define the correction capability | 52 | The ECC strength and ECC step size properties define the correction capability |
| @@ -0,0 +1,64 @@ | |||
| 1 | NVIDIA Tegra NAND Flash controller | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Must be one of: | ||
| 5 | - "nvidia,tegra20-nand" | ||
| 6 | - reg: MMIO address range | ||
| 7 | - interrupts: interrupt output of the NFC controller | ||
| 8 | - clocks: Must contain an entry for each entry in clock-names. | ||
| 9 | See ../clocks/clock-bindings.txt for details. | ||
| 10 | - clock-names: Must include the following entries: | ||
| 11 | - nand | ||
| 12 | - resets: Must contain an entry for each entry in reset-names. | ||
| 13 | See ../reset/reset.txt for details. | ||
| 14 | - reset-names: Must include the following entries: | ||
| 15 | - nand | ||
| 16 | |||
| 17 | Optional children nodes: | ||
| 18 | Individual NAND chips are children of the NAND controller node. Currently | ||
| 19 | only one NAND chip supported. | ||
| 20 | |||
| 21 | Required children node properties: | ||
| 22 | - reg: An integer ranging from 1 to 6 representing the CS line to use. | ||
| 23 | |||
| 24 | Optional children node properties: | ||
| 25 | - nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only | ||
| 26 | "hw" is supported. | ||
| 27 | - nand-ecc-algo: string, algorithm of NAND ECC. | ||
| 28 | Supported values with "hw" ECC mode are: "rs", "bch". | ||
| 29 | - nand-bus-width : See nand.txt | ||
| 30 | - nand-on-flash-bbt: See nand.txt | ||
| 31 | - nand-ecc-strength: integer representing the number of bits to correct | ||
| 32 | per ECC step (always 512). Supported strength using HW ECC | ||
| 33 | modes are: | ||
| 34 | - RS: 4, 6, 8 | ||
| 35 | - BCH: 4, 8, 14, 16 | ||
| 36 | - nand-ecc-maximize: See nand.txt | ||
| 37 | - nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM | ||
| 38 | are chosen. | ||
| 39 | - wp-gpios: GPIO specifier for the write protect pin. | ||
| 40 | |||
| 41 | Optional child node of NAND chip nodes: | ||
| 42 | Partitions: see partition.txt | ||
| 43 | |||
| 44 | Example: | ||
| 45 | nand-controller@70008000 { | ||
| 46 | compatible = "nvidia,tegra20-nand"; | ||
| 47 | reg = <0x70008000 0x100>; | ||
| 48 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; | ||
| 49 | clocks = <&tegra_car TEGRA20_CLK_NDFLASH>; | ||
| 50 | clock-names = "nand"; | ||
| 51 | resets = <&tegra_car 13>; | ||
| 52 | reset-names = "nand"; | ||
| 53 | |||
| 54 | nand@0 { | ||
| 55 | reg = <0>; | ||
| 56 | #address-cells = <1>; | ||
| 57 | #size-cells = <1>; | ||
| 58 | nand-bus-width = <8>; | ||
| 59 | nand-on-flash-bbt; | ||
| 60 | nand-ecc-algo = "bch"; | ||
| 61 | nand-ecc-strength = <8>; | ||
| 62 | wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>; | ||
| 63 | }; | ||
| 64 | }; | ||
| @@ -14,6 +14,13 @@ method is used for a given flash device. To describe the method there should be · 13 unmodified lines | |||
| 14 | a subnode of the flash device that is named 'partitions'. It must have a | 14 | a subnode of the flash device that is named 'partitions'. It must have a |
| 15 | 'compatible' property, which is used to identify the method to use. | 15 | 'compatible' property, which is used to identify the method to use. |
| 16 | 16 | ||
| 17 | When a single partition is represented with a DT node (it depends on a used | ||
| 18 | format) it may also be described using above rules ('compatible' and optionally | ||
| 19 | some extra properties / subnodes). It allows describing more complex, | ||
| 20 | hierarchical (multi-level) layouts and should be used if there is some | ||
| 21 | significant relation between partitions or some partition internally uses | ||
| 22 | another partitioning method. | ||
| 23 | |||
| 17 | Available bindings are listed in the "partitions" subdirectory. | 24 | Available bindings are listed in the "partitions" subdirectory. |
| 18 | 25 | ||
| 19 | 26 | ||
| @@ -109,3 +116,42 @@ flash@2 { · 89 unmodified lines | |||
| 109 | }; | 116 | }; |
| 110 | }; | 117 | }; |
| 111 | }; | 118 | }; |
| 119 | |||
| 120 | flash@3 { | ||
| 121 | partitions { | ||
| 122 | compatible = "fixed-partitions"; | ||
| 123 | #address-cells = <1>; | ||
| 124 | #size-cells = <1>; | ||
| 125 | |||
| 126 | partition@0 { | ||
| 127 | label = "bootloader"; | ||
| 128 | reg = <0x000000 0x100000>; | ||
| 129 | read-only; | ||
| 130 | }; | ||
| 131 | |||
| 132 | firmware@100000 { | ||
| 133 | label = "firmware"; | ||
| 134 | reg = <0x100000 0xe00000>; | ||
| 135 | compatible = "brcm,trx"; | ||
| 136 | }; | ||
| 137 | |||
| 138 | calibration@f00000 { | ||
| 139 | label = "calibration"; | ||
| 140 | reg = <0xf00000 0x100000>; | ||
| 141 | compatible = "fixed-partitions"; | ||
| 142 | ranges = <0 0xf00000 0x100000>; | ||
| 143 | #address-cells = <1>; | ||
| 144 | #size-cells = <1>; | ||
| 145 | |||
| 146 | partition@0 { | ||
| 147 | label = "wifi0"; | ||
| 148 | reg = <0x000000 0x080000>; | ||
| 149 | }; | ||
| 150 | |||
| 151 | partition@80000 { | ||
| 152 | label = "wifi1"; | ||
| 153 | reg = <0x080000 0x080000>; | ||
| 154 | }; | ||
| 155 | }; | ||
| 156 | }; | ||
| 157 | }; | ||
| @@ -0,0 +1,37 @@ | |||
| 1 | Broadcom TRX Container Partition | ||
| 2 | ================================ | ||
| 3 | |||
| 4 | TRX is Broadcom's official firmware format for the BCM947xx boards. It's used by | ||
| 5 | most of the vendors building devices based on Broadcom's BCM47xx SoCs and is | ||
| 6 | supported by the CFE bootloader. | ||
| 7 | |||
| 8 | Design of the TRX format is very minimalistic. Its header contains | ||
| 9 | identification fields, CRC32 checksum and the locations of embedded partitions. | ||
| 10 | Its purpose is to store a few partitions in a format that can be distributed as | ||
| 11 | a standalone file and written in a flash memory. | ||
| 12 | |||
| 13 | Container can hold up to 4 partitions. The first partition has to contain a | ||
| 14 | device executable binary (e.g. a kernel) as it's what the CFE bootloader starts | ||
| 15 | executing. Other partitions can be used for operating system purposes. This is | ||
| 16 | useful for systems that keep kernel and rootfs separated. | ||
| 17 | |||
| 18 | TRX doesn't enforce any strict partition boundaries or size limits. All | ||
| 19 | partitions have to be less than the 4GiB max size limit. | ||
| 20 | |||
| 21 | There are two existing/known TRX variants: | ||
| 22 | 1) v1 which contains 3 partitions | ||
| 23 | 2) v2 which contains 4 partitions | ||
| 24 | |||
| 25 | There aren't separated compatible bindings for them as version can be trivialy | ||
| 26 | detected by a software parsing TRX header. | ||
| 27 | |||
| 28 | Required properties: | ||
| 29 | - compatible : (required) must be "brcm,trx" | ||
| 30 | |||
| 31 | Example: | ||
| 32 | |||
| 33 | flash@0 { | ||
| 34 | partitions { | ||
| 35 | compatible = "brcm,trx"; | ||
| 36 | }; | ||
| 37 | }; | ||
| @@ -45,11 +45,12 @@ Required properties: · 44 unmodified lines | |||
| 45 | number (e.g., 0, 1, 2, etc.) | 45 | number (e.g., 0, 1, 2, etc.) |
| 46 | - #address-cells: see partition.txt | 46 | - #address-cells: see partition.txt |
| 47 | - #size-cells: see partition.txt | 47 | - #size-cells: see partition.txt |
| 48 | - nand-ecc-strength: see nand.txt | ||
| 49 | - nand-ecc-step-size: must be 512. see nand.txt for more details. | ||
| 50 | 48 | ||
| 51 | Optional properties: | 49 | Optional properties: |
| 52 | - nand-bus-width: see nand.txt | 50 | - nand-bus-width: see nand.txt |
| 51 | - nand-ecc-strength: see nand.txt. If not specified, then ECC strength will | ||
| 52 | be used according to chip requirement and available | ||
| 53 | OOB size. | ||
| 53 | 54 | ||
| 54 | Each nandcs device node may optionally contain a 'partitions' sub-node, which | 55 | Each nandcs device node may optionally contain a 'partitions' sub-node, which |
| 55 | further contains sub-nodes describing the flash partition mapping. See | 56 | further contains sub-nodes describing the flash partition mapping. See |
| @@ -77,7 +78,6 @@ nand-controller@1ac00000 { · 21 unmodified lines | |||
| 77 | reg = <0>; | 78 | reg = <0>; |
| 78 | 79 | ||
| 79 | nand-ecc-strength = <4>; | 80 | nand-ecc-strength = <4>; |
| 80 | nand-ecc-step-size = <512>; | ||
| 81 | nand-bus-width = <8>; | 81 | nand-bus-width = <8>; |
| 82 | 82 | ||
| 83 | partitions { | 83 | partitions { |
| @@ -117,7 +117,6 @@ nand-controller@79b0000 { · 33 unmodified lines | |||
| 117 | nand@0 { | 117 | nand@0 { |
| 118 | reg = <0>; | 118 | reg = <0>; |
| 119 | nand-ecc-strength = <4>; | 119 | nand-ecc-strength = <4>; |
| 120 | nand-ecc-step-size = <512>; | ||
| 121 | nand-bus-width = <8>; | 120 | nand-bus-width = <8>; |
| 122 | 121 | ||
| 123 | partitions { | 122 | partitions { |
| @@ -5,8 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg : Address range of the mtd chip | 5 | - reg : Address range of the mtd chip |
| 6 | - #address-cells, #size-cells : Must be present if the device has sub-nodes | 6 | - #address-cells, #size-cells : Must be present if the device has sub-nodes |
| 7 | representing partitions. | 7 | representing partitions. |
| 8 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 9 | that services interrupts for this device | ||
| 10 | - interrupts: Should contain the STMMAC interrupts | 8 | - interrupts: Should contain the STMMAC interrupts |
| 11 | - clock-rate : Functional clock rate of SMI in Hz | 9 | - clock-rate : Functional clock rate of SMI in Hz |
| 12 | 10 | ||
| @@ -0,0 +1,5 @@ | |||
| 1 | SPI NAND flash | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: should be "spi-nand" | ||
| 5 | - reg: should encode the chip-select line used to access the NAND chip | ||
| @@ -0,0 +1,48 @@ | |||
| 1 | Bindings for Analog Devices ADGS1408/1409 8:1/Dual 4:1 Mux | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : Should be one of | ||
| 5 | * "adi,adgs1408" | ||
| 6 | * "adi,adgs1409" | ||
| 7 | * Standard mux-controller bindings as described in mux-controller.txt | ||
| 8 | |||
| 9 | Optional properties for ADGS1408/1409: | ||
| 10 | - gpio-controller : if present, #gpio-cells is required. | ||
| 11 | - #gpio-cells : should be <2> | ||
| 12 | - First cell is the GPO line number, i.e. 0 to 3 | ||
| 13 | for ADGS1408 and 0 to 4 for ADGS1409 | ||
| 14 | - Second cell is used to specify active high (0) | ||
| 15 | or active low (1) | ||
| 16 | |||
| 17 | Optional properties: | ||
| 18 | - idle-state : if present, the state that the mux controller will have | ||
| 19 | when idle. The special state MUX_IDLE_AS_IS is the default and | ||
| 20 | MUX_IDLE_DISCONNECT is also supported. | ||
| 21 | |||
| 22 | States 0 through 7 correspond to signals S1 through S8 in the datasheet. | ||
| 23 | For ADGS1409 only states 0 to 3 are available. | ||
| 24 | |||
| 25 | Example: | ||
| 26 | |||
| 27 | /* | ||
| 28 | * One mux controller. | ||
| 29 | * Mux state set to idle as is (no idle-state declared) | ||
| 30 | */ | ||
| 31 | &spi0 { | ||
| 32 | mux: mux-controller@0 { | ||
| 33 | compatible = "adi,adgs1408"; | ||
| 34 | reg = <0>; | ||
| 35 | spi-max-frequency = <1000000>; | ||
| 36 | #mux-control-cells = <0>; | ||
| 37 | }; | ||
| 38 | } | ||
| 39 | |||
| 40 | adc-mux { | ||
| 41 | compatible = "io-channel-mux"; | ||
| 42 | io-channels = <&adc 1>; | ||
| 43 | io-channel-names = "parent"; | ||
| 44 | mux-controls = <&mux>; | ||
| 45 | |||
| 46 | channels = "out_a0", "out_a1", "test0", "test1", | ||
| 47 | "out_b0", "out_b1", "testb0", "testb1"; | ||
| 48 | }; | ||
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - SerDes Rx/Tx registers | 8 | - SerDes Rx/Tx registers |
| 9 | - SerDes integration registers (1/2) | 9 | - SerDes integration registers (1/2) |
| 10 | - SerDes integration registers (2/2) | 10 | - SerDes integration registers (2/2) |
| 11 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 12 | that services interrupts for this device | ||
| 13 | - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt | 11 | - interrupts: Should contain the amd-xgbe interrupt(s). The first interrupt |
| 14 | listed is required and is the general device interrupt. If the optional | 12 | listed is required and is the general device interrupt. If the optional |
| 15 | amd,per-channel-interrupt property is specified, then one additional | 13 | amd,per-channel-interrupt property is specified, then one additional |
| @@ -13,14 +13,17 @@ MDIO multiplexer node: · 12 unmodified lines | |||
| 13 | Every non-ethernet PHY requires a compatible so that it could be probed based | 13 | Every non-ethernet PHY requires a compatible so that it could be probed based |
| 14 | on this compatible string. | 14 | on this compatible string. |
| 15 | 15 | ||
| 16 | Optional properties: | ||
| 17 | - clocks: phandle of the core clock which drives the mdio block. | ||
| 18 | |||
| 16 | Additional information regarding generic multiplexer properties can be found | 19 | Additional information regarding generic multiplexer properties can be found |
| 17 | at- Documentation/devicetree/bindings/net/mdio-mux.txt | 20 | at- Documentation/devicetree/bindings/net/mdio-mux.txt |
| 18 | 21 | ||
| 19 | 22 | ||
| 20 | for example: | 23 | for example: |
| 21 | mdio_mux_iproc: mdio-mux@6602023c { | 24 | mdio_mux_iproc: mdio-mux@66020000 { |
| 22 | compatible = "brcm,mdio-mux-iproc"; | 25 | compatible = "brcm,mdio-mux-iproc"; |
| 23 | reg = <0x6602023c 0x14>; | 26 | reg = <0x66020000 0x250>; |
| 24 | #address-cells = <1>; | 27 | #address-cells = <1>; |
| 25 | #size-cells = <0>; | 28 | #size-cells = <0>; |
| 26 | 29 | ||
| @@ -15,7 +15,6 @@ Documentation/devicetree/bindings/net/marvell-bt-8xxx.txt · 14 unmodified lines | |||
| 15 | 15 | ||
| 16 | Optional properties: | 16 | Optional properties: |
| 17 | 17 | ||
| 18 | - interrupt-parent: phandle of the parent interrupt controller | ||
| 19 | - interrupt-names: (see below) | 18 | - interrupt-names: (see below) |
| 20 | - interrupts : The interrupt specified by the name "wakeup" is the interrupt | 19 | - interrupts : The interrupt specified by the name "wakeup" is the interrupt |
| 21 | that shall be used for out-of-band wake-on-bt. Driver will | 20 | that shall be used for out-of-band wake-on-bt. Driver will |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - "holt,hi3110" for HI-3110 | 5 | - "holt,hi3110" for HI-3110 |
| 6 | - reg: SPI chip select. | 6 | - reg: SPI chip select. |
| 7 | - clocks: The clock feeding the CAN controller. | 7 | - clocks: The clock feeding the CAN controller. |
| 8 | - interrupt-parent: The parent interrupt controller. | ||
| 9 | - interrupts: Should contain IRQ line for the CAN controller. | 8 | - interrupts: Should contain IRQ line for the CAN controller. |
| 10 | 9 | ||
| 11 | Optional properties: | 10 | Optional properties: |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - "microchip,mcp2515" for MCP2515. | 6 | - "microchip,mcp2515" for MCP2515. |
| 7 | - reg: SPI chip select. | 7 | - reg: SPI chip select. |
| 8 | - clocks: The clock feeding the CAN controller. | 8 | - clocks: The clock feeding the CAN controller. |
| 9 | - interrupt-parent: The parent interrupt controller. | ||
| 10 | - interrupts: Should contain IRQ line for the CAN controller. | 9 | - interrupts: Should contain IRQ line for the CAN controller. |
| 11 | 10 | ||
| 12 | Optional properties: | 11 | Optional properties: |
| @@ -2,20 +2,25 @@ Xilinx Axi CAN/Zynq CANPS controller Device Tree Bindings · 1 unmodified line | |||
| 2 | --------------------------------------------------------- | 2 | --------------------------------------------------------- |
| 3 | 3 | ||
| 4 | Required properties: | 4 | Required properties: |
| 5 | - compatible : Should be "xlnx,zynq-can-1.0" for Zynq CAN | 5 | - compatible : Should be: |
| 6 | controllers and "xlnx,axi-can-1.00.a" for Axi CAN | 6 | - "xlnx,zynq-can-1.0" for Zynq CAN controllers |
| 7 | controllers. | 7 | - "xlnx,axi-can-1.00.a" for Axi CAN controllers |
| 8 | - reg : Physical base address and size of the Axi CAN/Zynq | 8 | - "xlnx,canfd-1.0" for CAN FD controllers |
| 9 | CANPS registers map. | 9 | - reg : Physical base address and size of the controller |
| 10 | registers map. | ||
| 10 | - interrupts : Property with a value describing the interrupt | 11 | - interrupts : Property with a value describing the interrupt |
| 11 | number. | 12 | number. |
| 12 | - interrupt-parent : Must be core interrupt controller | 13 | - clock-names : List of input clock names |
| 13 | - clock-names : List of input clock names - "can_clk", "pclk" | 14 | - "can_clk", "pclk" (For CANPS), |
| 14 | (For CANPS), "can_clk" , "s_axi_aclk"(For AXI CAN) | 15 | - "can_clk", "s_axi_aclk" (For AXI CAN and CAN FD). |
| 15 | (See clock bindings for details). | 16 | (See clock bindings for details). |
| 16 | - clocks : Clock phandles (see clock bindings for details). | 17 | - clocks : Clock phandles (see clock bindings for details). |
| 17 | - tx-fifo-depth : Can Tx fifo depth. | 18 | - tx-fifo-depth : Can Tx fifo depth (Zynq, Axi CAN). |
| 18 | - rx-fifo-depth : Can Rx fifo depth. | 19 | - rx-fifo-depth : Can Rx fifo depth (Zynq, Axi CAN, CAN FD in |
| 20 | sequential Rx mode). | ||
| 21 | - tx-mailbox-count : Can Tx mailbox buffer count (CAN FD). | ||
| 22 | - rx-mailbox-count : Can Rx mailbox buffer count (CAN FD in mailbox Rx | ||
| 23 | mode). | ||
| 19 | 24 | ||
| 20 | 25 | ||
| 21 | Example: | 26 | Example: |
| @@ -42,3 +47,14 @@ For Axi CAN Dts file: · 20 unmodified lines | |||
| 42 | tx-fifo-depth = <0x40>; | 47 | tx-fifo-depth = <0x40>; |
| 43 | rx-fifo-depth = <0x40>; | 48 | rx-fifo-depth = <0x40>; |
| 44 | }; | 49 | }; |
| 50 | For CAN FD Dts file: | ||
| 51 | canfd_0: canfd@40000000 { | ||
| 52 | compatible = "xlnx,canfd-1.0"; | ||
| 53 | clocks = <&clkc 0>, <&clkc 1>; | ||
| 54 | clock-names = "can_clk", "s_axi_aclk"; | ||
| 55 | reg = <0x40000000 0x2000>; | ||
| 56 | interrupt-parent = <&intc>; | ||
| 57 | interrupts = <0 59 1>; | ||
| 58 | tx-mailbox-count = <0x20>; | ||
| 59 | rx-fifo-depth = <0x20>; | ||
| 60 | }; | ||
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | registers map | 11 | registers map |
| 12 | - interrupts : property with a value describing the interrupt | 12 | - interrupts : property with a value describing the interrupt |
| 13 | number | 13 | number |
| 14 | - interrupt-parent : The parent interrupt controller | ||
| 15 | - cpdma_channels : Specifies number of channels in CPDMA | 14 | - cpdma_channels : Specifies number of channels in CPDMA |
| 16 | - ale_entries : Specifies No of entries ALE can hold | 15 | - ale_entries : Specifies No of entries ALE can hold |
| 17 | - bd_ram_size : Specifies internal descriptor RAM size | 16 | - bd_ram_size : Specifies internal descriptor RAM size |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg : physical addresses and sizes of registers, must contain 2 entries: | 5 | - reg : physical addresses and sizes of registers, must contain 2 entries: |
| 6 | first entry : address register, | 6 | first entry : address register, |
| 7 | second entry : data register. | 7 | second entry : data register. |
| 8 | - interrupt-parent : interrupt controller to which the device is connected | ||
| 9 | - interrupts : interrupt specifier specific to interrupt controller | 8 | - interrupts : interrupt specifier specific to interrupt controller |
| 10 | 9 | ||
| 11 | Optional properties: | 10 | Optional properties: |
| @@ -24,6 +24,14 @@ Required properties: · 23 unmodified lines | |||
| 24 | "brcm,bcm53018-srab" | 24 | "brcm,bcm53018-srab" |
| 25 | "brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string | 25 | "brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string |
| 26 | 26 | ||
| 27 | For the BCM5831X/BCM1140x SoCs with an integrated switch, must be one of: | ||
| 28 | "brcm,bcm11404-srab" | ||
| 29 | "brcm,bcm11407-srab" | ||
| 30 | "brcm,bcm11409-srab" | ||
| 31 | "brcm,bcm58310-srab" | ||
| 32 | "brcm,bcm58311-srab" | ||
| 33 | "brcm,bcm58313-srab" and the mandatory "brcm,omega-srab" string | ||
| 34 | |||
| 27 | For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of: | 35 | For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of: |
| 28 | "brcm,bcm58522-srab" | 36 | "brcm,bcm58522-srab" |
| 29 | "brcm,bcm58523-srab" | 37 | "brcm,bcm58523-srab" |
| @@ -4,7 +4,9 @@ Microchip KSZ Series Ethernet switches · 3 unmodified lines | |||
| 4 | Required properties: | 4 | Required properties: |
| 5 | 5 | ||
| 6 | - compatible: For external switch chips, compatible string must be exactly one | 6 | - compatible: For external switch chips, compatible string must be exactly one |
| 7 | of: "microchip,ksz9477" | 7 | of the following: |
| 8 | - "microchip,ksz9477" | ||
| 9 | - "microchip,ksz9897" | ||
| 8 | 10 | ||
| 9 | See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional | 11 | See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional |
| 10 | required and optional properties. | 12 | required and optional properties. |
| @@ -30,7 +30,6 @@ Required properties: · 29 unmodified lines | |||
| 30 | Optional properties: | 30 | Optional properties: |
| 31 | 31 | ||
| 32 | - reset-gpios : Should be a gpio specifier for a reset line | 32 | - reset-gpios : Should be a gpio specifier for a reset line |
| 33 | - interrupt-parent : Parent interrupt controller | ||
| 34 | - interrupts : Interrupt from the switch | 33 | - interrupts : Interrupt from the switch |
| 35 | - interrupt-controller : Indicates the switch is itself an interrupt | 34 | - interrupt-controller : Indicates the switch is itself an interrupt |
| 36 | controller. This is used for the PHY interrupts. | 35 | controller. This is used for the PHY interrupts. |
| @@ -0,0 +1,153 @@ | |||
| 1 | Realtek SMI-based Switches | ||
| 2 | ========================== | ||
| 3 | |||
| 4 | The SMI "Simple Management Interface" is a two-wire protocol using | ||
| 5 | bit-banged GPIO that while it reuses the MDIO lines MCK and MDIO does | ||
| 6 | not use the MDIO protocol. This binding defines how to specify the | ||
| 7 | SMI-based Realtek devices. | ||
| 8 | |||
| 9 | Required properties: | ||
| 10 | |||
| 11 | - compatible: must be exactly one of: | ||
| 12 | "realtek,rtl8366" | ||
| 13 | "realtek,rtl8366rb" (4+1 ports) | ||
| 14 | "realtek,rtl8366s" (4+1 ports) | ||
| 15 | "realtek,rtl8367" | ||
| 16 | "realtek,rtl8367b" | ||
| 17 | "realtek,rtl8368s" (8 port) | ||
| 18 | "realtek,rtl8369" | ||
| 19 | "realtek,rtl8370" (8 port) | ||
| 20 | |||
| 21 | Required properties: | ||
| 22 | - mdc-gpios: GPIO line for the MDC clock line. | ||
| 23 | - mdio-gpios: GPIO line for the MDIO data line. | ||
| 24 | - reset-gpios: GPIO line for the reset signal. | ||
| 25 | |||
| 26 | Optional properties: | ||
| 27 | - realtek,disable-leds: if the LED drivers are not used in the | ||
| 28 | hardware design this will disable them so they are not turned on | ||
| 29 | and wasting power. | ||
| 30 | |||
| 31 | Required subnodes: | ||
| 32 | |||
| 33 | - interrupt-controller | ||
| 34 | |||
| 35 | This defines an interrupt controller with an IRQ line (typically | ||
| 36 | a GPIO) that will demultiplex and handle the interrupt from the single | ||
| 37 | interrupt line coming out of one of the SMI-based chips. It most | ||
| 38 | importantly provides link up/down interrupts to the PHY blocks inside | ||
| 39 | the ASIC. | ||
| 40 | |||
| 41 | Required properties of interrupt-controller: | ||
| 42 | |||
| 43 | - interrupt: parent interrupt, see interrupt-controller/interrupts.txt | ||
| 44 | - interrupt-controller: see interrupt-controller/interrupts.txt | ||
| 45 | - #address-cells: should be <0> | ||
| 46 | - #interrupt-cells: should be <1> | ||
| 47 | |||
| 48 | - mdio | ||
| 49 | |||
| 50 | This defines the internal MDIO bus of the SMI device, mostly for the | ||
| 51 | purpose of being able to hook the interrupts to the right PHY and | ||
| 52 | the right PHY to the corresponding port. | ||
| 53 | |||
| 54 | Required properties of mdio: | ||
| 55 | |||
| 56 | - compatible: should be set to "realtek,smi-mdio" for all SMI devices | ||
| 57 | |||
| 58 | See net/mdio.txt for additional MDIO bus properties. | ||
| 59 | |||
| 60 | See net/dsa/dsa.txt for a list of additional required and optional properties | ||
| 61 | and subnodes of DSA switches. | ||
| 62 | |||
| 63 | Examples: | ||
| 64 | |||
| 65 | switch { | ||
| 66 | compatible = "realtek,rtl8366rb"; | ||
| 67 | /* 22 = MDIO (has input reads), 21 = MDC (clock, output only) */ | ||
| 68 | mdc-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; | ||
| 69 | mdio-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>; | ||
| 70 | reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; | ||
| 71 | |||
| 72 | switch_intc: interrupt-controller { | ||
| 73 | /* GPIO 15 provides the interrupt */ | ||
| 74 | interrupt-parent = <&gpio0>; | ||
| 75 | interrupts = <15 IRQ_TYPE_LEVEL_LOW>; | ||
| 76 | interrupt-controller; | ||
| 77 | #address-cells = <0>; | ||
| 78 | #interrupt-cells = <1>; | ||
| 79 | }; | ||
| 80 | |||
| 81 | ports { | ||
| 82 | #address-cells = <1>; | ||
| 83 | #size-cells = <0>; | ||
| 84 | reg = <0>; | ||
| 85 | port@0 { | ||
| 86 | reg = <0>; | ||
| 87 | label = "lan0"; | ||
| 88 | phy-handle = <&phy0>; | ||
| 89 | }; | ||
| 90 | port@1 { | ||
| 91 | reg = <1>; | ||
| 92 | label = "lan1"; | ||
| 93 | phy-handle = <&phy1>; | ||
| 94 | }; | ||
| 95 | port@2 { | ||
| 96 | reg = <2>; | ||
| 97 | label = "lan2"; | ||
| 98 | phy-handle = <&phy2>; | ||
| 99 | }; | ||
| 100 | port@3 { | ||
| 101 | reg = <3>; | ||
| 102 | label = "lan3"; | ||
| 103 | phy-handle = <&phy3>; | ||
| 104 | }; | ||
| 105 | port@4 { | ||
| 106 | reg = <4>; | ||
| 107 | label = "wan"; | ||
| 108 | phy-handle = <&phy4>; | ||
| 109 | }; | ||
| 110 | port@5 { | ||
| 111 | reg = <5>; | ||
| 112 | label = "cpu"; | ||
| 113 | ethernet = <&gmac0>; | ||
| 114 | phy-mode = "rgmii"; | ||
| 115 | fixed-link { | ||
| 116 | speed = <1000>; | ||
| 117 | full-duplex; | ||
| 118 | }; | ||
| 119 | }; | ||
| 120 | }; | ||
| 121 | |||
| 122 | mdio { | ||
| 123 | compatible = "realtek,smi-mdio", "dsa-mdio"; | ||
| 124 | #address-cells = <1>; | ||
| 125 | #size-cells = <0>; | ||
| 126 | |||
| 127 | phy0: phy@0 { | ||
| 128 | reg = <0>; | ||
| 129 | interrupt-parent = <&switch_intc>; | ||
| 130 | interrupts = <0>; | ||
| 131 | }; | ||
| 132 | phy1: phy@1 { | ||
| 133 | reg = <1>; | ||
| 134 | interrupt-parent = <&switch_intc>; | ||
| 135 | interrupts = <1>; | ||
| 136 | }; | ||
| 137 | phy2: phy@2 { | ||
| 138 | reg = <2>; | ||
| 139 | interrupt-parent = <&switch_intc>; | ||
| 140 | interrupts = <2>; | ||
| 141 | }; | ||
| 142 | phy3: phy@3 { | ||
| 143 | reg = <3>; | ||
| 144 | interrupt-parent = <&switch_intc>; | ||
| 145 | interrupts = <3>; | ||
| 146 | }; | ||
| 147 | phy4: phy@4 { | ||
| 148 | reg = <4>; | ||
| 149 | interrupt-parent = <&switch_intc>; | ||
| 150 | interrupts = <12>; | ||
| 151 | }; | ||
| 152 | }; | ||
| 153 | }; | ||
| @@ -0,0 +1,81 @@ | |||
| 1 | Vitesse VSC73xx Switches | ||
| 2 | ======================== | ||
| 3 | |||
| 4 | This defines device tree bindings for the Vitesse VSC73xx switch chips. | ||
| 5 | The Vitesse company has been acquired by Microsemi and Microsemi in turn | ||
| 6 | acquired by Microchip but retains this vendor branding. | ||
| 7 | |||
| 8 | The currently supported switch chips are: | ||
| 9 | Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch | ||
| 10 | Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch | ||
| 11 | Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch | ||
| 12 | Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch | ||
| 13 | |||
| 14 | The device tree node is an SPI device so it must reside inside a SPI bus | ||
| 15 | device tree node, see spi/spi-bus.txt | ||
| 16 | |||
| 17 | Required properties: | ||
| 18 | |||
| 19 | - compatible: must be exactly one of: | ||
| 20 | "vitesse,vsc7385" | ||
| 21 | "vitesse,vsc7388" | ||
| 22 | "vitesse,vsc7395" | ||
| 23 | "vitesse,vsc7398" | ||
| 24 | - gpio-controller: indicates that this switch is also a GPIO controller, | ||
| 25 | see gpio/gpio.txt | ||
| 26 | - #gpio-cells: this must be set to <2> and indicates that we are a twocell | ||
| 27 | GPIO controller, see gpio/gpio.txt | ||
| 28 | |||
| 29 | Optional properties: | ||
| 30 | |||
| 31 | - reset-gpios: a handle to a GPIO line that can issue reset of the chip. | ||
| 32 | It should be tagged as active low. | ||
| 33 | |||
| 34 | Required subnodes: | ||
| 35 | |||
| 36 | See net/dsa/dsa.txt for a list of additional required and optional properties | ||
| 37 | and subnodes of DSA switches. | ||
| 38 | |||
| 39 | Examples: | ||
| 40 | |||
| 41 | switch@0 { | ||
| 42 | compatible = "vitesse,vsc7395"; | ||
| 43 | reg = <0>; | ||
| 44 | /* Specified for 2.5 MHz or below */ | ||
| 45 | spi-max-frequency = <2500000>; | ||
| 46 | gpio-controller; | ||
| 47 | #gpio-cells = <2>; | ||
| 48 | |||
| 49 | ports { | ||
| 50 | #address-cells = <1>; | ||
| 51 | #size-cells = <0>; | ||
| 52 | |||
| 53 | port@0 { | ||
| 54 | reg = <0>; | ||
| 55 | label = "lan1"; | ||
| 56 | }; | ||
| 57 | port@1 { | ||
| 58 | reg = <1>; | ||
| 59 | label = "lan2"; | ||
| 60 | }; | ||
| 61 | port@2 { | ||
| 62 | reg = <2>; | ||
| 63 | label = "lan3"; | ||
| 64 | }; | ||
| 65 | port@3 { | ||
| 66 | reg = <3>; | ||
| 67 | label = "lan4"; | ||
| 68 | }; | ||
| 69 | vsc: port@6 { | ||
| 70 | reg = <6>; | ||
| 71 | label = "cpu"; | ||
| 72 | ethernet = <&gmac1>; | ||
| 73 | phy-mode = "rgmii"; | ||
| 74 | fixed-link { | ||
| 75 | speed = <1000>; | ||
| 76 | full-duplex; | ||
| 77 | pause; | ||
| 78 | }; | ||
| 79 | }; | ||
| 80 | }; | ||
| 81 | }; | ||
| @@ -19,8 +19,6 @@ Required properties: · 18 unmodified lines | |||
| 19 | - reset-names: must be "stmmaceth" | 19 | - reset-names: must be "stmmaceth" |
| 20 | - phy-mode: See ethernet.txt | 20 | - phy-mode: See ethernet.txt |
| 21 | - phy-handle: See ethernet.txt | 21 | - phy-handle: See ethernet.txt |
| 22 | - #address-cells: shall be 1 | ||
| 23 | - #size-cells: shall be 0 | ||
| 24 | - syscon: A phandle to the device containing the EMAC or GMAC clock register | 22 | - syscon: A phandle to the device containing the EMAC or GMAC clock register |
| 25 | 23 | ||
| 26 | Optional properties: | 24 | Optional properties: |
| @@ -86,8 +84,6 @@ emac: ethernet@1c0b000 { · 59 unmodified lines | |||
| 86 | reset-names = "stmmaceth"; | 84 | reset-names = "stmmaceth"; |
| 87 | clocks = <&ccu CLK_BUS_EMAC>; | 85 | clocks = <&ccu CLK_BUS_EMAC>; |
| 88 | clock-names = "stmmaceth"; | 86 | clock-names = "stmmaceth"; |
| 89 | #address-cells = <1>; | ||
| 90 | #size-cells = <0>; | ||
| 91 | 87 | ||
| 92 | phy-handle = <&int_mii_phy>; | 88 | phy-handle = <&int_mii_phy>; |
| 93 | phy-mode = "mii"; | 89 | phy-mode = "mii"; |
| @@ -137,8 +133,6 @@ emac: ethernet@1c0b000 { · 43 unmodified lines | |||
| 137 | reset-names = "stmmaceth"; | 133 | reset-names = "stmmaceth"; |
| 138 | clocks = <&ccu CLK_BUS_EMAC>; | 134 | clocks = <&ccu CLK_BUS_EMAC>; |
| 139 | clock-names = "stmmaceth"; | 135 | clock-names = "stmmaceth"; |
| 140 | #address-cells = <1>; | ||
| 141 | #size-cells = <0>; | ||
| 142 | 136 | ||
| 143 | phy-handle = <&ext_rgmii_phy>; | 137 | phy-handle = <&ext_rgmii_phy>; |
| 144 | phy-mode = "rgmii"; | 138 | phy-mode = "rgmii"; |
| @@ -191,8 +185,6 @@ emac: ethernet@1c0b000 { · 46 unmodified lines | |||
| 191 | reset-names = "stmmaceth"; | 185 | reset-names = "stmmaceth"; |
| 192 | clocks = <&ccu CLK_BUS_EMAC>; | 186 | clocks = <&ccu CLK_BUS_EMAC>; |
| 193 | clock-names = "stmmaceth"; | 187 | clock-names = "stmmaceth"; |
| 194 | #address-cells = <1>; | ||
| 195 | #size-cells = <0>; | ||
| 196 | 188 | ||
| 197 | phy-handle = <&ext_rgmii_phy>; | 189 | phy-handle = <&ext_rgmii_phy>; |
| 198 | phy-mode = "rgmii"; | 190 | phy-mode = "rgmii"; |
| @@ -238,7 +238,7 @@ PROPERTIES · 237 unmodified lines | |||
| 238 | Must include one of the following: | 238 | Must include one of the following: |
| 239 | - "fsl,fman-dtsec" for dTSEC MAC | 239 | - "fsl,fman-dtsec" for dTSEC MAC |
| 240 | - "fsl,fman-xgec" for XGEC MAC | 240 | - "fsl,fman-xgec" for XGEC MAC |
| 241 | - "fsl,fman-memac for mEMAC MAC | 241 | - "fsl,fman-memac" for mEMAC MAC |
| 242 | 242 | ||
| 243 | - cell-index | 243 | - cell-index |
| 244 | Usage: required | 244 | Usage: required |
| @@ -356,30 +356,7 @@ ethernet@e0000 { · 111 unmodified lines | |||
| 356 | ============================================================================ | 356 | ============================================================================ |
| 357 | FMan IEEE 1588 Node | 357 | FMan IEEE 1588 Node |
| 358 | 358 | ||
| 359 | DESCRIPTION | 359 | Refer to Documentation/devicetree/bindings/ptp/ptp-qoriq.txt |
| 360 | |||
| 361 | The FMan interface to support IEEE 1588 | ||
| 362 | |||
| 363 | |||
| 364 | PROPERTIES | ||
| 365 | |||
| 366 | - compatible | ||
| 367 | Usage: required | ||
| 368 | Value type: <stringlist> | ||
| 369 | Definition: A standard property. | ||
| 370 | Must include "fsl,fman-ptp-timer". | ||
| 371 | |||
| 372 | - reg | ||
| 373 | Usage: required | ||
| 374 | Value type: <prop-encoded-array> | ||
| 375 | Definition: A standard property. | ||
| 376 | |||
| 377 | EXAMPLE | ||
| 378 | |||
| 379 | ptp-timer@fe000 { | ||
| 380 | compatible = "fsl,fman-ptp-timer"; | ||
| 381 | reg = <0xfe000 0x1000>; | ||
| 382 | }; | ||
| 383 | 360 | ||
| 384 | ============================================================================= | 361 | ============================================================================= |
| 385 | FMan MDIO Node | 362 | FMan MDIO Node |
| @@ -9,7 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | "6port-16rss", | 9 | "6port-16rss", |
| 10 | "6port-16vf", | 10 | "6port-16vf", |
| 11 | "single-port". | 11 | "single-port". |
| 12 | - interrupt-parent: the interrupt parent of this device. | ||
| 13 | - interrupts: should contain the DSA Fabric and rcb interrupt. | 12 | - interrupts: should contain the DSA Fabric and rcb interrupt. |
| 14 | - reg: specifies base physical address(es) and size of the device registers. | 13 | - reg: specifies base physical address(es) and size of the device registers. |
| 15 | The first region is external interface control register base and size(optional, | 14 | The first region is external interface control register base and size(optional, |
| @@ -18,7 +18,6 @@ · 17 unmodified lines | |||
| 18 | "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", | 18 | "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", |
| 19 | "ibm,emac4" | 19 | "ibm,emac4" |
| 20 | - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> | 20 | - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> |
| 21 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 22 | - reg : <registers mapping> | 21 | - reg : <registers mapping> |
| 23 | - local-mac-address : 6 bytes, MAC address | 22 | - local-mac-address : 6 bytes, MAC address |
| 24 | - mal-device : phandle of the associated McMAL node | 23 | - mal-device : phandle of the associated McMAL node |
| @@ -22,7 +22,6 @@ Optional properties: · 21 unmodified lines | |||
| 22 | - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host | 22 | - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host |
| 23 | platform. The value will be configured to firmware. This | 23 | platform. The value will be configured to firmware. This |
| 24 | is needed to work chip's sleep feature as expected (u16). | 24 | is needed to work chip's sleep feature as expected (u16). |
| 25 | - interrupt-parent: phandle of the parent interrupt controller | ||
| 26 | - interrupt-names: Used only for USB based devices (See below) | 25 | - interrupt-names: Used only for USB based devices (See below) |
| 27 | - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the | 26 | - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the |
| 28 | driver will use the first interrupt specified in the interrupt | 27 | driver will use the first interrupt specified in the interrupt |
| @@ -6,8 +6,6 @@ The mediatek gigabit switch can be found on Mediatek SoCs (mt7620, mt7621). · 5 unmodified lines | |||
| 6 | Required properties: | 6 | Required properties: |
| 7 | - compatible: Should be "mediatek,mt7620-gsw" or "mediatek,mt7621-gsw" | 7 | - compatible: Should be "mediatek,mt7620-gsw" or "mediatek,mt7621-gsw" |
| 8 | - reg: Address and length of the register set for the device | 8 | - reg: Address and length of the register set for the device |
| 9 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 10 | that services interrupts for this device | ||
| 11 | - interrupts: Should contain the gigabit switches interrupt | 9 | - interrupts: Should contain the gigabit switches interrupt |
| 12 | - resets: Should contain the gigabit switches resets | 10 | - resets: Should contain the gigabit switches resets |
| 13 | - reset-names: Should contain the reset names "gsw" | 11 | - reset-names: Should contain the reset names "gsw" |
| @@ -0,0 +1,35 @@ | |||
| 1 | MediaTek SoC built-in Bluetooth Devices | ||
| 2 | ================================== | ||
| 3 | |||
| 4 | This device is a serial attached device to BTIF device and thus it must be a | ||
| 5 | child node of the serial node with BTIF. The dt-bindings details for BTIF | ||
| 6 | device can be known via Documentation/devicetree/bindings/serial/8250.txt. | ||
| 7 | |||
| 8 | Required properties: | ||
| 9 | |||
| 10 | - compatible: Must be | ||
| 11 | "mediatek,mt7622-bluetooth": for MT7622 SoC | ||
| 12 | - clocks: Should be the clock specifiers corresponding to the entry in | ||
| 13 | clock-names property. | ||
| 14 | - clock-names: Should contain "ref" entries. | ||
| 15 | - power-domains: Phandle to the power domain that the device is part of | ||
| 16 | |||
| 17 | Example: | ||
| 18 | |||
| 19 | btif: serial@1100c000 { | ||
| 20 | compatible = "mediatek,mt7622-btif", | ||
| 21 | "mediatek,mtk-btif"; | ||
| 22 | reg = <0 0x1100c000 0 0x1000>; | ||
| 23 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_LOW>; | ||
| 24 | clocks = <&pericfg CLK_PERI_BTIF_PD>; | ||
| 25 | clock-names = "main"; | ||
| 26 | reg-shift = <2>; | ||
| 27 | reg-io-width = <4>; | ||
| 28 | |||
| 29 | bluetooth { | ||
| 30 | compatible = "mediatek,mt7622-bluetooth"; | ||
| 31 | power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>; | ||
| 32 | clocks = <&clk25m>; | ||
| 33 | clock-names = "ref"; | ||
| 34 | }; | ||
| 35 | }; | ||
| @@ -30,9 +30,6 @@ Required properties: · 29 unmodified lines | |||
| 30 | - mediatek,pctl: phandle to the syscon node that handles the ports slew rate | 30 | - mediatek,pctl: phandle to the syscon node that handles the ports slew rate |
| 31 | and driver current: only for MT2701 and MT7623 SoC | 31 | and driver current: only for MT2701 and MT7623 SoC |
| 32 | 32 | ||
| 33 | Optional properties: | ||
| 34 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 35 | that services interrupts for this device | ||
| 36 | * Ethernet MAC node | 33 | * Ethernet MAC node |
| 37 | 34 | ||
| 38 | Required properties: | 35 | Required properties: |
| @@ -8,9 +8,6 @@ the SPI master node. · 7 unmodified lines | |||
| 8 | Required properties: | 8 | Required properties: |
| 9 | - compatible: Should be "microchip,enc28j60" | 9 | - compatible: Should be "microchip,enc28j60" |
| 10 | - reg: Specify the SPI chip select the ENC28J60 is wired to | 10 | - reg: Specify the SPI chip select the ENC28J60 is wired to |
| 11 | - interrupt-parent: Specify the phandle of the source interrupt, see interrupt | ||
| 12 | binding documentation for details. Usually this is the GPIO bank | ||
| 13 | the interrupt line is wired to. | ||
| 14 | - interrupts: Specify the interrupt index within the interrupt controller (referred | 11 | - interrupts: Specify the interrupt index within the interrupt controller (referred |
| 15 | to above in interrupt-parent) and interrupt type. The ENC28J60 natively | 12 | to above in interrupt-parent) and interrupt type. The ENC28J60 natively |
| 16 | generates falling edge interrupts, however, additional board logic | 13 | generates falling edge interrupts, however, additional board logic |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "nxp,nxp-nci-i2c". | 4 | - compatible: Should be "nxp,nxp-nci-i2c". |
| 5 | - clock-frequency: I²C work frequency. | 5 | - clock-frequency: I²C work frequency. |
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 8 | - interrupts: GPIO interrupt to which the chip is connected | 7 | - interrupts: GPIO interrupt to which the chip is connected |
| 9 | - enable-gpios: Output GPIO pin used for enabling/disabling the chip | 8 | - enable-gpios: Output GPIO pin used for enabling/disabling the chip |
| 10 | - firmware-gpios: Output GPIO pin used to enter firmware download mode | 9 | - firmware-gpios: Output GPIO pin used to enter firmware download mode |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "nxp,pn532-i2c" or "nxp,pn533-i2c". | 4 | - compatible: Should be "nxp,pn532-i2c" or "nxp,pn533-i2c". |
| 5 | - clock-frequency: I²C work frequency. | 5 | - clock-frequency: I²C work frequency. |
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 8 | - interrupts: GPIO interrupt to which the chip is connected | 7 | - interrupts: GPIO interrupt to which the chip is connected |
| 9 | 8 | ||
| 10 | Optional SoC Specific Properties: | 9 | Optional SoC Specific Properties: |
| @@ -2,9 +2,8 @@ · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "nxp,pn544-i2c". | 4 | - compatible: Should be "nxp,pn544-i2c". |
| 5 | - clock-frequency: I�C work frequency. | 5 | - clock-frequency: I²C work frequency. |
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 8 | - interrupts: GPIO interrupt to which the chip is connected | 7 | - interrupts: GPIO interrupt to which the chip is connected |
| 9 | - enable-gpios: Output GPIO pin used for enabling/disabling the PN544 | 8 | - enable-gpios: Output GPIO pin used for enabling/disabling the PN544 |
| 10 | - firmware-gpios: Output GPIO pin used to enter firmware download mode | 9 | - firmware-gpios: Output GPIO pin used to enter firmware download mode |
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "samsung,s3fwrn5-i2c". | 4 | - compatible: Should be "samsung,s3fwrn5-i2c". |
| 5 | - reg: address on the bus | 5 | - reg: address on the bus |
| 6 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 7 | - interrupts: GPIO interrupt to which the chip is connected | 6 | - interrupts: GPIO interrupt to which the chip is connected |
| 8 | - s3fwrn5,en-gpios: Output GPIO pin used for enabling/disabling the chip | 7 | - s3fwrn5,en-gpios: Output GPIO pin used for enabling/disabling the chip |
| 9 | - s3fwrn5,fw-gpios: Output GPIO pin used to enter firmware mode and | 8 | - s3fwrn5,fw-gpios: Output GPIO pin used to enter firmware mode and |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "st,st21nfcb-i2c" or "st,st21nfcc-i2c". | 4 | - compatible: Should be "st,st21nfcb-i2c" or "st,st21nfcc-i2c". |
| 5 | - clock-frequency: I²C work frequency. | 5 | - clock-frequency: I²C work frequency. |
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 8 | - interrupts: GPIO interrupt to which the chip is connected | 7 | - interrupts: GPIO interrupt to which the chip is connected |
| 9 | - reset-gpios: Output GPIO pin used to reset the ST21NFCB | 8 | - reset-gpios: Output GPIO pin used to reset the ST21NFCB |
| 10 | 9 | ||
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "st,st21nfcb-spi" | 4 | - compatible: Should be "st,st21nfcb-spi" |
| 5 | - spi-max-frequency: Maximum SPI frequency (<= 4000000). | 5 | - spi-max-frequency: Maximum SPI frequency (<= 4000000). |
| 6 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 7 | - interrupts: GPIO interrupt to which the chip is connected | 6 | - interrupts: GPIO interrupt to which the chip is connected |
| 8 | - reset-gpios: Output GPIO pin used to reset the ST21NFCB | 7 | - reset-gpios: Output GPIO pin used to reset the ST21NFCB |
| 9 | 8 | ||
| @@ -4,8 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "st,st21nfca-i2c". | 4 | - compatible: Should be "st,st21nfca-i2c". |
| 5 | - clock-frequency: I²C work frequency. | 5 | - clock-frequency: I²C work frequency. |
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 8 | - interrupts: GPIO interrupt to which the chip is connected | ||
| 9 | - enable-gpios: Output GPIO pin used for enabling/disabling the ST21NFCA | 7 | - enable-gpios: Output GPIO pin used for enabling/disabling the ST21NFCA |
| 10 | 8 | ||
| 11 | Optional SoC Specific Properties: | 9 | Optional SoC Specific Properties: |
| @@ -17,9 +17,6 @@ Required properties: · 16 unmodified lines | |||
| 17 | 17 | ||
| 18 | - enable-gpio: GPIO line to enable ST95HF transceiver. | 18 | - enable-gpio: GPIO line to enable ST95HF transceiver. |
| 19 | 19 | ||
| 20 | - interrupt-parent : Standard way to specify the controller to which | ||
| 21 | ST95HF transceiver's interrupt is routed. | ||
| 22 | |||
| 23 | - interrupts : Standard way to define ST95HF transceiver's out | 20 | - interrupts : Standard way to define ST95HF transceiver's out |
| 24 | interrupt. | 21 | interrupt. |
| 25 | 22 | ||
| @@ -3,7 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "ti,trf7970a". | 4 | - compatible: Should be "ti,trf7970a". |
| 5 | - spi-max-frequency: Maximum SPI frequency (<= 2000000). | 5 | - spi-max-frequency: Maximum SPI frequency (<= 2000000). |
| 6 | - interrupt-parent: phandle of parent interrupt handler. | ||
| 7 | - interrupts: A single interrupt specifier. | 6 | - interrupts: A single interrupt specifier. |
| 8 | - ti,enable-gpios: One or two GPIO entries used for 'EN' and 'EN2' pins on the | 7 | - ti,enable-gpios: One or two GPIO entries used for 'EN' and 'EN2' pins on the |
| 9 | TRF7970A. EN2 is optional. | 8 | TRF7970A. EN2 is optional. |
| @@ -3,8 +3,6 @@ PHY nodes · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | 4 | ||
| 5 | - interrupts : interrupt specifier for the sole interrupt. | 5 | - interrupts : interrupt specifier for the sole interrupt. |
| 6 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 7 | services interrupts for this device. | ||
| 8 | - reg : The ID number for the phy, usually a small integer | 6 | - reg : The ID number for the phy, usually a small integer |
| 9 | 7 | ||
| 10 | Optional Properties: | 8 | Optional Properties: |
| @@ -19,7 +19,6 @@ Required properties: · 18 unmodified lines | |||
| 19 | - spi-cpol : Must be set | 19 | - spi-cpol : Must be set |
| 20 | 20 | ||
| 21 | Optional properties: | 21 | Optional properties: |
| 22 | - interrupt-parent : Specify the pHandle of the source interrupt | ||
| 23 | - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at. | 22 | - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at. |
| 24 | Numbers smaller than 1000000 or greater than 16000000 | 23 | Numbers smaller than 1000000 or greater than 16000000 |
| 25 | are invalid. Missing the property will set the SPI | 24 | are invalid. Missing the property will set the SPI |
| @@ -10,12 +10,25 @@ device the slave device is attached to. · 9 unmodified lines | |||
| 10 | Required properties: | 10 | Required properties: |
| 11 | - compatible: should contain one of the following: | 11 | - compatible: should contain one of the following: |
| 12 | * "qcom,qca6174-bt" | 12 | * "qcom,qca6174-bt" |
| 13 | * "qcom,wcn3990-bt" | ||
| 14 | |||
| 15 | Optional properties for compatible string qcom,qca6174-bt: | ||
| 13 | 16 | ||
| 14 | Optional properties: | ||
| 15 | - enable-gpios: gpio specifier used to enable chip | 17 | - enable-gpios: gpio specifier used to enable chip |
| 16 | - clocks: clock provided to the controller (SUSCLK_32KHZ) | 18 | - clocks: clock provided to the controller (SUSCLK_32KHZ) |
| 17 | 19 | ||
| 18 | Example: | 20 | Required properties for compatible string qcom,wcn3990-bt: |
| 21 | |||
| 22 | - vddio-supply: VDD_IO supply regulator handle. | ||
| 23 | - vddxo-supply: VDD_XO supply regulator handle. | ||
| 24 | - vddrf-supply: VDD_RF supply regulator handle. | ||
| 25 | - vddch0-supply: VDD_CH0 supply regulator handle. | ||
| 26 | |||
| 27 | Optional properties for compatible string qcom,wcn3990-bt: | ||
| 28 | |||
| 29 | - max-speed: see Documentation/devicetree/bindings/serial/slave-device.txt | ||
| 30 | |||
| 31 | Examples: | ||
| 19 | 32 | ||
| 20 | serial@7570000 { | 33 | serial@7570000 { |
| 21 | label = "BT-UART"; | 34 | label = "BT-UART"; |
| @@ -28,3 +41,15 @@ serial@7570000 { · 6 unmodified lines | |||
| 28 | clocks = <&divclk4>; | 41 | clocks = <&divclk4>; |
| 29 | }; | 42 | }; |
| 30 | }; | 43 | }; |
| 44 | |||
| 45 | serial@898000 { | ||
| 46 | bluetooth { | ||
| 47 | compatible = "qcom,wcn3990-bt"; | ||
| 48 | |||
| 49 | vddio-supply = <&vreg_s4a_1p8>; | ||
| 50 | vddxo-supply = <&vreg_l7a_1p8>; | ||
| 51 | vddrf-supply = <&vreg_l17a_1p3>; | ||
| 52 | vddch0-supply = <&vreg_l25a_3p3>; | ||
| 53 | max-speed = <3200000>; | ||
| 54 | }; | ||
| 55 | }; | ||
| @@ -14,8 +14,6 @@ Required properties: · 13 unmodified lines | |||
| 14 | "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth", | 14 | "ralink,rt3050-eth", "ralink,rt3883-eth", "ralink,rt5350-eth", |
| 15 | "mediatek,mt7620-eth", "mediatek,mt7621-eth" | 15 | "mediatek,mt7620-eth", "mediatek,mt7621-eth" |
| 16 | - reg: Address and length of the register set for the device | 16 | - reg: Address and length of the register set for the device |
| 17 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 18 | that services interrupts for this device | ||
| 19 | - interrupts: Should contain the frame engines interrupt | 17 | - interrupts: Should contain the frame engines interrupt |
| 20 | - resets: Should contain the frame engines resets | 18 | - resets: Should contain the frame engines resets |
| 21 | - reset-names: Should contain the reset names "fe". If a switch is present | 19 | - reset-names: Should contain the reset names "fe". If a switch is present |
| @@ -7,8 +7,6 @@ SoCs (RT3x5x, RT5350, MT76x8). · 6 unmodified lines | |||
| 7 | Required properties: | 7 | Required properties: |
| 8 | - compatible: Should be "ralink,rt3050-esw" | 8 | - compatible: Should be "ralink,rt3050-esw" |
| 9 | - reg: Address and length of the register set for the device | 9 | - reg: Address and length of the register set for the device |
| 10 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 11 | that services interrupts for this device | ||
| 12 | - interrupts: Should contain the embedded switches interrupt | 10 | - interrupts: Should contain the embedded switches interrupt |
| 13 | - resets: Should contain the embedded switches resets | 11 | - resets: Should contain the embedded switches resets |
| 14 | - reset-names: Should contain the reset names "esw" | 12 | - reset-names: Should contain the reset names "esw" |
| @@ -16,6 +16,7 @@ Required properties: · 15 unmodified lines | |||
| 16 | - "renesas,etheravb-rcar-gen2" as a fallback for the above | 16 | - "renesas,etheravb-rcar-gen2" as a fallback for the above |
| 17 | R-Car Gen2 and RZ/G1 devices. | 17 | R-Car Gen2 and RZ/G1 devices. |
| 18 | 18 | ||
| 19 | - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC. | ||
| 19 | - "renesas,etheravb-r8a7795" for the R8A7795 SoC. | 20 | - "renesas,etheravb-r8a7795" for the R8A7795 SoC. |
| 20 | - "renesas,etheravb-r8a7796" for the R8A7796 SoC. | 21 | - "renesas,etheravb-r8a7796" for the R8A7796 SoC. |
| 21 | - "renesas,etheravb-r8a77965" for the R8A77965 SoC. | 22 | - "renesas,etheravb-r8a77965" for the R8A77965 SoC. |
| @@ -24,7 +25,7 @@ Required properties: · 2 unmodified lines | |||
| 24 | - "renesas,etheravb-r8a77990" for the R8A77990 SoC. | 25 | - "renesas,etheravb-r8a77990" for the R8A77990 SoC. |
| 25 | - "renesas,etheravb-r8a77995" for the R8A77995 SoC. | 26 | - "renesas,etheravb-r8a77995" for the R8A77995 SoC. |
| 26 | - "renesas,etheravb-rcar-gen3" as a fallback for the above | 27 | - "renesas,etheravb-rcar-gen3" as a fallback for the above |
| 27 | R-Car Gen3 devices. | 28 | R-Car Gen3 and RZ/G2 devices. |
| 28 | 29 | ||
| 29 | When compatible with the generic version, nodes must list the | 30 | When compatible with the generic version, nodes must list the |
| 30 | SoC-specific version corresponding to the platform first followed by | 31 | SoC-specific version corresponding to the platform first followed by |
| @@ -47,8 +48,6 @@ Required properties: · 16 unmodified lines | |||
| 47 | - pinctrl-0: phandle, referring to a default pin configuration node. | 48 | - pinctrl-0: phandle, referring to a default pin configuration node. |
| 48 | 49 | ||
| 49 | Optional properties: | 50 | Optional properties: |
| 50 | - interrupt-parent: the phandle for the interrupt controller that services | ||
| 51 | interrupts for this device. | ||
| 52 | - interrupt-names: A list of interrupt names. | 51 | - interrupt-names: A list of interrupt names. |
| 53 | For the R-Car Gen 3 SoCs this property is mandatory; | 52 | For the R-Car Gen 3 SoCs this property is mandatory; |
| 54 | it should include one entry per channel, named "ch%u", | 53 | it should include one entry per channel, named "ch%u", |
| @@ -4,6 +4,7 @@ The device node has following properties. · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | Required properties: | 5 | Required properties: |
| 6 | - compatible: should be "rockchip,<name>-gamc" | 6 | - compatible: should be "rockchip,<name>-gamc" |
| 7 | "rockchip,px30-gmac": found on PX30 SoCs | ||
| 7 | "rockchip,rk3128-gmac": found on RK312x SoCs | 8 | "rockchip,rk3128-gmac": found on RK312x SoCs |
| 8 | "rockchip,rk3228-gmac": found on RK322x SoCs | 9 | "rockchip,rk3228-gmac": found on RK322x SoCs |
| 9 | "rockchip,rk3288-gmac": found on RK3288 SoCs | 10 | "rockchip,rk3288-gmac": found on RK3288 SoCs |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "samsung,sxgbe-v2.0a" | 4 | - compatible: Should be "samsung,sxgbe-v2.0a" |
| 5 | - reg: Address and length of the register set for the device | 5 | - reg: Address and length of the register set for the device |
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupts: Should contain the SXGBE interrupts | 6 | - interrupts: Should contain the SXGBE interrupts |
| 9 | These interrupts are ordered by fixed and follows variable | 7 | These interrupts are ordered by fixed and follows variable |
| 10 | trasmit DMA interrupts, receive DMA interrupts and lpi interrupt. | 8 | trasmit DMA interrupts, receive DMA interrupts and lpi interrupt. |
| @@ -35,8 +35,6 @@ Required properties: · 34 unmodified lines | |||
| 35 | - pinctrl-0: phandle, referring to a default pin configuration node. | 35 | - pinctrl-0: phandle, referring to a default pin configuration node. |
| 36 | 36 | ||
| 37 | Optional properties: | 37 | Optional properties: |
| 38 | - interrupt-parent: the phandle for the interrupt controller that services | ||
| 39 | interrupts for this device. | ||
| 40 | - pinctrl-names: pin configuration state name ("default"). | 38 | - pinctrl-names: pin configuration state name ("default"). |
| 41 | - renesas,no-ether-link: boolean, specify when a board does not provide a proper | 39 | - renesas,no-ether-link: boolean, specify when a board does not provide a proper |
| 42 | Ether LINK signal. | 40 | Ether LINK signal. |
| @@ -83,8 +83,6 @@ Required properties: · 82 unmodified lines | |||
| 83 | - "snps,dwc-qos-ethernet-4.10" (deprecated): | 83 | - "snps,dwc-qos-ethernet-4.10" (deprecated): |
| 84 | - "phy_ref_clk" | 84 | - "phy_ref_clk" |
| 85 | - "apb_clk" | 85 | - "apb_clk" |
| 86 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 87 | that services interrupts for this device | ||
| 88 | - interrupts: Should contain the core's combined interrupt signal | 86 | - interrupts: Should contain the core's combined interrupt signal |
| 89 | - phy-mode: See ethernet.txt file in the same directory | 87 | - phy-mode: See ethernet.txt file in the same directory |
| 90 | - resets: Phandle and reset specifiers for each entry in reset-names, in the | 88 | - resets: Phandle and reset specifiers for each entry in reset-names, in the |
| @@ -1,11 +1,10 @@ | |||
| 1 | * STMicroelectronics 10/100/1000 Ethernet driver (GMAC) | 1 | * STMicroelectronics 10/100/1000/2500/10000 Ethernet (GMAC/XGMAC) |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" | 4 | - compatible: Should be "snps,dwmac-<ip_version>", "snps,dwmac" or |
| 5 | "snps,dwxgmac-<ip_version>", "snps,dwxgmac". | ||
| 5 | For backwards compatibility: "st,spear600-gmac" is also supported. | 6 | For backwards compatibility: "st,spear600-gmac" is also supported. |
| 6 | - reg: Address and length of the register set for the device | 7 | - reg: Address and length of the register set for the device |
| 7 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 8 | that services interrupts for this device | ||
| 9 | - interrupts: Should contain the STMMAC interrupts | 8 | - interrupts: Should contain the STMMAC interrupts |
| 10 | - interrupt-names: Should contain a list of interrupt names corresponding to | 9 | - interrupt-names: Should contain a list of interrupt names corresponding to |
| 11 | the interrupts in the interrupts property, if available. | 10 | the interrupts in the interrupts property, if available. |
| @@ -11,8 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | Optional properties: | 11 | Optional properties: |
| 12 | - brcm,drive-strength : drive strength used for SDIO pins on device in mA | 12 | - brcm,drive-strength : drive strength used for SDIO pins on device in mA |
| 13 | (default = 6). | 13 | (default = 6). |
| 14 | - interrupt-parent : the phandle for the interrupt controller to which the | ||
| 15 | device interrupts are connected. | ||
| 16 | - interrupts : specifies attributes for the out-of-band interrupt (host-wake). | 14 | - interrupts : specifies attributes for the out-of-band interrupt (host-wake). |
| 17 | When not specified the device will use in-band SDIO interrupts. | 15 | When not specified the device will use in-band SDIO interrupts. |
| 18 | - interrupt-names : name of the out-of-band interrupt, which must be set | 16 | - interrupt-names : name of the out-of-band interrupt, which must be set |
| @@ -29,7 +29,6 @@ Optional properties: · 28 unmodified lines | |||
| 29 | - marvell,wakeup-pin : a wakeup pin number of wifi chip which will be configured | 29 | - marvell,wakeup-pin : a wakeup pin number of wifi chip which will be configured |
| 30 | to firmware. Firmware will wakeup the host using this pin | 30 | to firmware. Firmware will wakeup the host using this pin |
| 31 | during suspend/resume. | 31 | during suspend/resume. |
| 32 | - interrupt-parent: phandle of the parent interrupt controller | ||
| 33 | - interrupts : interrupt pin number to the cpu. driver will request an irq based on | 32 | - interrupts : interrupt pin number to the cpu. driver will request an irq based on |
| 34 | this interrupt number. during system suspend, the irq will be enabled | 33 | this interrupt number. during system suspend, the irq will be enabled |
| 35 | so that the wifi chip can wakeup host platform under certain condition. | 34 | so that the wifi chip can wakeup host platform under certain condition. |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg : Chip select address of device | 8 | - reg : Chip select address of device |
| 9 | - spi-max-frequency : Maximum SPI clocking speed of device in Hz | 9 | - spi-max-frequency : Maximum SPI clocking speed of device in Hz |
| 10 | - interrupts : Should contain interrupt line | 10 | - interrupts : Should contain interrupt line |
| 11 | - interrupt-parent : Should be the phandle for the interrupt controller | ||
| 12 | that services interrupts for this device | ||
| 13 | - vio-supply : phandle to regulator providing VIO | 11 | - vio-supply : phandle to regulator providing VIO |
| 14 | - ti,power-gpio : GPIO connected to chip's PMEN pin | 12 | - ti,power-gpio : GPIO connected to chip's PMEN pin |
| 15 | 13 | ||
| @@ -17,9 +17,7 @@ Required properties: · 16 unmodified lines | |||
| 17 | * "ti,wl1837" | 17 | * "ti,wl1837" |
| 18 | - reg : Chip select address of device | 18 | - reg : Chip select address of device |
| 19 | - spi-max-frequency : Maximum SPI clocking speed of device in Hz | 19 | - spi-max-frequency : Maximum SPI clocking speed of device in Hz |
| 20 | - interrupt-parent, interrupts : | 20 | - interrupts : Should contain parameters for 1 interrupt line. |
| 21 | Should contain parameters for 1 interrupt line. | ||
| 22 | Interrupt parameters: parent, line number, type. | ||
| 23 | - vwlan-supply : Point the node of the regulator that powers/enable the | 21 | - vwlan-supply : Point the node of the regulator that powers/enable the |
| 24 | wl12xx/wl18xx chip | 22 | wl12xx/wl18xx chip |
| 25 | 23 | ||
| @@ -20,8 +20,6 @@ Required properties: · 19 unmodified lines | |||
| 20 | - interrupts : specifies attributes for the out-of-band interrupt. | 20 | - interrupts : specifies attributes for the out-of-band interrupt. |
| 21 | 21 | ||
| 22 | Optional properties: | 22 | Optional properties: |
| 23 | - interrupt-parent : the phandle for the interrupt controller to which the | ||
| 24 | device interrupts are connected. | ||
| 25 | - ref-clock-frequency : ref clock frequency in Hz | 23 | - ref-clock-frequency : ref clock frequency in Hz |
| 26 | - tcxo-clock-frequency : tcxo clock frequency in Hz | 24 | - tcxo-clock-frequency : tcxo clock frequency in Hz |
| 27 | 25 | ||
| @@ -1,7 +1,7 @@ | |||
| 1 | Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings | 1 | Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings |
| 2 | 2 | ||
| 3 | This binding represents the on-chip eFuse OTP controller found on | 3 | This binding represents the on-chip eFuse OTP controller found on |
| 4 | i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX and i.MX6UL SoCs. | 4 | i.MX6Q/D, i.MX6DL/S, i.MX6SL, i.MX6SX, i.MX6UL and i.MX6SLL SoCs. |
| 5 | 5 | ||
| 6 | Required properties: | 6 | Required properties: |
| 7 | - compatible: should be one of | 7 | - compatible: should be one of |
| @@ -10,6 +10,7 @@ Required properties: · 2 unmodified lines | |||
| 10 | "fsl,imx6sx-ocotp" (i.MX6SX), | 10 | "fsl,imx6sx-ocotp" (i.MX6SX), |
| 11 | "fsl,imx6ul-ocotp" (i.MX6UL), | 11 | "fsl,imx6ul-ocotp" (i.MX6UL), |
| 12 | "fsl,imx7d-ocotp" (i.MX7D/S), | 12 | "fsl,imx7d-ocotp" (i.MX7D/S), |
| 13 | "fsl,imx6sll-ocotp" (i.MX6SLL), | ||
| 13 | followed by "syscon". | 14 | followed by "syscon". |
| 14 | - #address-cells : Should be 1 | 15 | - #address-cells : Should be 1 |
| 15 | - #size-cells : Should be 1 | 16 | - #size-cells : Should be 1 |
| @@ -0,0 +1,52 @@ | |||
| 1 | = Spreadtrum SC27XX PMIC eFuse device tree bindings = | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: Should be one of the following. | ||
| 5 | "sprd,sc2720-efuse" | ||
| 6 | "sprd,sc2721-efuse" | ||
| 7 | "sprd,sc2723-efuse" | ||
| 8 | "sprd,sc2730-efuse" | ||
| 9 | "sprd,sc2731-efuse" | ||
| 10 | - reg: Specify the address offset of efuse controller. | ||
| 11 | - hwlocks: Reference to a phandle of a hwlock provider node. | ||
| 12 | |||
| 13 | = Data cells = | ||
| 14 | Are child nodes of eFuse, bindings of which as described in | ||
| 15 | bindings/nvmem/nvmem.txt | ||
| 16 | |||
| 17 | Example: | ||
| 18 | |||
| 19 | sc2731_pmic: pmic@0 { | ||
| 20 | compatible = "sprd,sc2731"; | ||
| 21 | reg = <0>; | ||
| 22 | spi-max-frequency = <26000000>; | ||
| 23 | interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; | ||
| 24 | interrupt-controller; | ||
| 25 | #interrupt-cells = <2>; | ||
| 26 | #address-cells = <1>; | ||
| 27 | #size-cells = <0>; | ||
| 28 | |||
| 29 | efuse@380 { | ||
| 30 | compatible = "sprd,sc2731-efuse"; | ||
| 31 | reg = <0x380>; | ||
| 32 | #address-cells = <1>; | ||
| 33 | #size-cells = <1>; | ||
| 34 | hwlocks = <&hwlock 12>; | ||
| 35 | |||
| 36 | /* Data cells */ | ||
| 37 | thermal_calib: calib@10 { | ||
| 38 | reg = <0x10 0x2>; | ||
| 39 | }; | ||
| 40 | }; | ||
| 41 | }; | ||
| 42 | |||
| 43 | = Data consumers = | ||
| 44 | Are device nodes which consume nvmem data cells. | ||
| 45 | |||
| 46 | Example: | ||
| 47 | |||
| 48 | thermal { | ||
| 49 | ... | ||
| 50 | nvmem-cells = <&thermal_calib>; | ||
| 51 | nvmem-cell-names = "calibration"; | ||
| 52 | }; | ||
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - reg-names: must include the following entries: | 7 | - reg-names: must include the following entries: |
| 8 | "csr": CSR registers | 8 | "csr": CSR registers |
| 9 | "vector_slave": vectors slave port region | 9 | "vector_slave": vectors slave port region |
| 10 | - interrupt-parent: interrupt source phandle. | ||
| 11 | - interrupts: specifies the interrupt source of the parent interrupt | 10 | - interrupts: specifies the interrupt source of the parent interrupt |
| 12 | controller. The format of the interrupt specifier depends on the | 11 | controller. The format of the interrupt specifier depends on the |
| 13 | parent interrupt controller. | 12 | parent interrupt controller. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg-names: must include the following entries: | 6 | - reg-names: must include the following entries: |
| 7 | "Txs": TX slave port region | 7 | "Txs": TX slave port region |
| 8 | "Cra": Control register access region | 8 | "Cra": Control register access region |
| 9 | - interrupt-parent: interrupt source phandle. | ||
| 10 | - interrupts: specifies the interrupt source of the parent interrupt | 9 | - interrupts: specifies the interrupt source of the parent interrupt |
| 11 | controller. The format of the interrupt specifier depends | 10 | controller. The format of the interrupt specifier depends |
| 12 | on the parent interrupt controller. | 11 | on the parent interrupt controller. |
| @@ -65,7 +65,6 @@ When the iProc event queue based MSI is used, one needs to define the · 64 unmodified lines | |||
| 65 | following properties in the MSI device node: | 65 | following properties in the MSI device node: |
| 66 | - compatible: Must be "brcm,iproc-msi" | 66 | - compatible: Must be "brcm,iproc-msi" |
| 67 | - msi-controller: claims itself as an MSI controller | 67 | - msi-controller: claims itself as an MSI controller |
| 68 | - interrupt-parent: Link to its parent interrupt device | ||
| 69 | - interrupts: List of interrupt IDs from its parent interrupt device | 68 | - interrupts: List of interrupt IDs from its parent interrupt device |
| 70 | 69 | ||
| 71 | Optional properties: | 70 | Optional properties: |
| @@ -9,6 +9,9 @@ Required properties: · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | Optional properties: | 10 | Optional properties: |
| 11 | - max-functions: Maximum number of functions that can be configured (default 1). | 11 | - max-functions: Maximum number of functions that can be configured (default 1). |
| 12 | - phys: From PHY bindings: List of Generic PHY phandles. One per lane if more | ||
| 13 | than one in the list. If only one PHY listed it must manage all lanes. | ||
| 14 | - phy-names: List of names to identify the PHY. | ||
| 12 | 15 | ||
| 13 | Example: | 16 | Example: |
| 14 | 17 | ||
| @@ -19,4 +22,6 @@ pcie@fc000000 { · 4 unmodified lines | |||
| 19 | reg-names = "reg", "mem"; | 22 | reg-names = "reg", "mem"; |
| 20 | cdns,max-outbound-regions = <16>; | 23 | cdns,max-outbound-regions = <16>; |
| 21 | max-functions = /bits/ 8 <8>; | 24 | max-functions = /bits/ 8 <8>; |
| 25 | phys = <&ep_phy0 &ep_phy1>; | ||
| 26 | phy-names = "pcie-lane0","pcie-lane1"; | ||
| 22 | }; | 27 | }; |
| @@ -24,6 +24,9 @@ Optional properties: · 23 unmodified lines | |||
| 24 | translations (default 32) | 24 | translations (default 32) |
| 25 | - vendor-id: The PCI vendor ID (16 bits, default is design dependent) | 25 | - vendor-id: The PCI vendor ID (16 bits, default is design dependent) |
| 26 | - device-id: The PCI device ID (16 bits, default is design dependent) | 26 | - device-id: The PCI device ID (16 bits, default is design dependent) |
| 27 | - phys: From PHY bindings: List of Generic PHY phandles. One per lane if more | ||
| 28 | than one in the list. If only one PHY listed it must manage all lanes. | ||
| 29 | - phy-names: List of names to identify the PHY. | ||
| 27 | 30 | ||
| 28 | Example: | 31 | Example: |
| 29 | 32 | ||
| @@ -57,4 +60,7 @@ pcie@fb000000 { · 27 unmodified lines | |||
| 57 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; | 60 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
| 58 | 61 | ||
| 59 | msi-parent = <&its_pci>; | 62 | msi-parent = <&its_pci>; |
| 63 | |||
| 64 | phys = <&pcie_phy0>; | ||
| 65 | phy-names = "pcie-phy"; | ||
| 60 | }; | 66 | }; |
| @@ -41,7 +41,6 @@ Mandatory subnodes: · 40 unmodified lines | |||
| 41 | - For "faraday,ftpci100" a node representing the interrupt-controller inside the | 41 | - For "faraday,ftpci100" a node representing the interrupt-controller inside the |
| 42 | host bridge is mandatory. It has the following mandatory properties: | 42 | host bridge is mandatory. It has the following mandatory properties: |
| 43 | - interrupt: see interrupt-controller/interrupts.txt | 43 | - interrupt: see interrupt-controller/interrupts.txt |
| 44 | - interrupt-parent: see interrupt-controller/interrupts.txt | ||
| 45 | - interrupt-controller: see interrupt-controller/interrupts.txt | 44 | - interrupt-controller: see interrupt-controller/interrupts.txt |
| 46 | - #address-cells: set to <0> | 45 | - #address-cells: set to <0> |
| 47 | - #interrupt-cells: set to <1> | 46 | - #interrupt-cells: set to <1> |
| @@ -26,9 +26,6 @@ Required properties: · 25 unmodified lines | |||
| 26 | - interrupt-controller: identifies the node as an interrupt controller | 26 | - interrupt-controller: identifies the node as an interrupt controller |
| 27 | - #interrupt-cells: specifies the number of cells needed to encode an | 27 | - #interrupt-cells: specifies the number of cells needed to encode an |
| 28 | interrupt source. The value must be 1. | 28 | interrupt source. The value must be 1. |
| 29 | - interrupt-parent : phandle to the interrupt controller that | ||
| 30 | it is attached to, it should be set to gic to point to | ||
| 31 | ARM's Generic Interrupt Controller node in system DT. | ||
| 32 | - interrupts: The interrupt line of the PCIe controller | 29 | - interrupts: The interrupt line of the PCIe controller |
| 33 | last cell of this field is set to 4 to | 30 | last cell of this field is set to 4 to |
| 34 | denote it as IRQ_TYPE_LEVEL_HIGH type interrupt. | 31 | denote it as IRQ_TYPE_LEVEL_HIGH type interrupt. |
| @@ -17,7 +17,6 @@ reg: index 1 is the base address and length of DW application registers. · 16 unmodified lines | |||
| 17 | 17 | ||
| 18 | pcie_msi_intc : Interrupt controller device node for MSI IRQ chip | 18 | pcie_msi_intc : Interrupt controller device node for MSI IRQ chip |
| 19 | interrupt-cells: should be set to 1 | 19 | interrupt-cells: should be set to 1 |
| 20 | interrupt-parent: Parent interrupt controller phandle | ||
| 21 | interrupts: GIC interrupt lines connected to PCI MSI interrupt lines | 20 | interrupts: GIC interrupt lines connected to PCI MSI interrupt lines |
| 22 | 21 | ||
| 23 | Example: | 22 | Example: |
| @@ -37,8 +36,6 @@ pcie_msi_intc : Interrupt controller device node for MSI IRQ chip · 13 unmodified lines | |||
| 37 | 36 | ||
| 38 | pcie_intc: Interrupt controller device node for Legacy IRQ chip | 37 | pcie_intc: Interrupt controller device node for Legacy IRQ chip |
| 39 | interrupt-cells: should be set to 1 | 38 | interrupt-cells: should be set to 1 |
| 40 | interrupt-parent: Parent interrupt controller phandle | ||
| 41 | interrupts: GIC interrupt lines connected to PCI Legacy interrupt lines | ||
| 42 | 39 | ||
| 43 | Example: | 40 | Example: |
| 44 | pcie_intc: legacy-interrupt-controller { | 41 | pcie_intc: legacy-interrupt-controller { |
| @@ -41,9 +41,6 @@ · 40 unmodified lines | |||
| 41 | - #interrupt-cells: specifies the number of cells needed to encode an | 41 | - #interrupt-cells: specifies the number of cells needed to encode an |
| 42 | interrupt source. The value must be 1. | 42 | interrupt source. The value must be 1. |
| 43 | 43 | ||
| 44 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 45 | services interrupts for this device. | ||
| 46 | |||
| 47 | - interrupts: specifies the interrupt source of the parent interrupt | 44 | - interrupts: specifies the interrupt source of the parent interrupt |
| 48 | controller. The format of the interrupt specifier depends on the | 45 | controller. The format of the interrupt specifier depends on the |
| 49 | parent interrupt controller. | 46 | parent interrupt controller. |
| @@ -0,0 +1,41 @@ | |||
| 1 | Broadcom Stingray PCIe PHY | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: must be "brcm,sr-pcie-phy" | ||
| 5 | - reg: base address and length of the PCIe SS register space | ||
| 6 | - brcm,sr-cdru: phandle to the CDRU syscon node | ||
| 7 | - brcm,sr-mhb: phandle to the MHB syscon node | ||
| 8 | - #phy-cells: Must be 1, denotes the PHY index | ||
| 9 | |||
| 10 | For PAXB based root complex, one can have a configuration of up to 8 PHYs | ||
| 11 | PHY index goes from 0 to 7 | ||
| 12 | |||
| 13 | For the internal PAXC based root complex, PHY index is always 8 | ||
| 14 | |||
| 15 | Example: | ||
| 16 | mhb: syscon@60401000 { | ||
| 17 | compatible = "brcm,sr-mhb", "syscon"; | ||
| 18 | reg = <0 0x60401000 0 0x38c>; | ||
| 19 | }; | ||
| 20 | |||
| 21 | cdru: syscon@6641d000 { | ||
| 22 | compatible = "brcm,sr-cdru", "syscon"; | ||
| 23 | reg = <0 0x6641d000 0 0x400>; | ||
| 24 | }; | ||
| 25 | |||
| 26 | pcie_phy: phy@40000000 { | ||
| 27 | compatible = "brcm,sr-pcie-phy"; | ||
| 28 | reg = <0 0x40000000 0 0x800>; | ||
| 29 | brcm,sr-cdru = <&cdru>; | ||
| 30 | brcm,sr-mhb = <&mhb>; | ||
| 31 | #phy-cells = <1>; | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* users of the PCIe PHY */ | ||
| 35 | |||
| 36 | pcie0: pcie@48000000 { | ||
| 37 | ... | ||
| 38 | ... | ||
| 39 | phys = <&pcie_phy 0>; | ||
| 40 | phy-names = "pcie-phy"; | ||
| 41 | }; | ||
| @@ -3,7 +3,7 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "qca,ar7100-usb-phy" | 4 | - compatible: "qca,ar7100-usb-phy" |
| 5 | - #phys-cells: should be 0 | 5 | - #phys-cells: should be 0 |
| 6 | - reset-names: "usb-phy"[, "usb-suspend-override"] | 6 | - reset-names: "phy"[, "suspend-override"] |
| 7 | - resets: references to the reset controllers | 7 | - resets: references to the reset controllers |
| 8 | 8 | ||
| 9 | Example: | 9 | Example: |
| @@ -11,7 +11,7 @@ Example: · 1 unmodified line | |||
| 11 | usb-phy { | 11 | usb-phy { |
| 12 | compatible = "qca,ar7100-usb-phy"; | 12 | compatible = "qca,ar7100-usb-phy"; |
| 13 | 13 | ||
| 14 | reset-names = "usb-phy", "usb-suspend-override"; | 14 | reset-names = "phy", "suspend-override"; |
| 15 | resets = <&rst 4>, <&rst 3>; | 15 | resets = <&rst 4>, <&rst 3>; |
| 16 | 16 | ||
| 17 | #phy-cells = <0>; | 17 | #phy-cells = <0>; |
| @@ -47,6 +47,12 @@ Required properties (port (child) node): · 46 unmodified lines | |||
| 47 | - PHY_TYPE_PCIE | 47 | - PHY_TYPE_PCIE |
| 48 | - PHY_TYPE_SATA | 48 | - PHY_TYPE_SATA |
| 49 | 49 | ||
| 50 | Optional properties (PHY_TYPE_USB2 port (child) node): | ||
| 51 | - mediatek,eye-src : u32, the value of slew rate calibrate | ||
| 52 | - mediatek,eye-vrt : u32, the selection of VRT reference voltage | ||
| 53 | - mediatek,eye-term : u32, the selection of HS_TX TERM reference voltage | ||
| 54 | - mediatek,bc12 : bool, enable BC12 of u2phy if support it | ||
| 55 | |||
| 50 | Example: | 56 | Example: |
| 51 | 57 | ||
| 52 | u3phy: usb-phy@11290000 { | 58 | u3phy: usb-phy@11290000 { |
| @@ -12,7 +12,14 @@ Required properties: · 11 unmodified lines | |||
| 12 | "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, | 12 | "qcom,sdm845-qmp-usb3-phy" for USB3 QMP V3 phy on sdm845, |
| 13 | "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845. | 13 | "qcom,sdm845-qmp-usb3-uni-phy" for USB3 QMP V3 UNI phy on sdm845. |
| 14 | 14 | ||
| 15 | - reg: offset and length of register set for PHY's common serdes block. | 15 | - reg: |
| 16 | - For "qcom,sdm845-qmp-usb3-phy": | ||
| 17 | - index 0: address and length of register set for PHY's common serdes | ||
| 18 | block. | ||
| 19 | - named register "dp_com" (using reg-names): address and length of the | ||
| 20 | DP_COM control block. | ||
| 21 | - For all others: | ||
| 22 | - offset and length of register set for PHY's common serdes block. | ||
| 16 | 23 | ||
| 17 | - #clock-cells: must be 1 | 24 | - #clock-cells: must be 1 |
| 18 | - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe | 25 | - Phy pll outputs a bunch of clocks for Tx, Rx and Pipe |
| @@ -60,7 +67,10 @@ Required nodes: · 41 unmodified lines | |||
| 60 | 67 | ||
| 61 | Required properties for child node: | 68 | Required properties for child node: |
| 62 | - reg: list of offset and length pairs of register sets for PHY blocks - | 69 | - reg: list of offset and length pairs of register sets for PHY blocks - |
| 63 | tx, rx and pcs. | 70 | - index 0: tx |
| 71 | - index 1: rx | ||
| 72 | - index 2: pcs | ||
| 73 | - index 3: pcs_misc (optional) | ||
| 64 | 74 | ||
| 65 | - #phy-cells: must be 0 | 75 | - #phy-cells: must be 0 |
| 66 | 76 | ||
| @@ -0,0 +1,24 @@ | |||
| 1 | * Renesas R-Car generation 3 PCIe PHY | ||
| 2 | |||
| 3 | This file provides information on what the device node for the R-Car | ||
| 4 | generation 3 PCIe PHY contains. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "renesas,r8a77980-pcie-phy" if the device is a part of the | ||
| 8 | R8A77980 SoC. | ||
| 9 | - reg: offset and length of the register block. | ||
| 10 | - clocks: clock phandle and specifier pair. | ||
| 11 | - power-domains: power domain phandle and specifier pair. | ||
| 12 | - resets: reset phandle and specifier pair. | ||
| 13 | - #phy-cells: see phy-bindings.txt in the same directory, must be <0>. | ||
| 14 | |||
| 15 | Example (R-Car V3H): | ||
| 16 | |||
| 17 | pcie-phy@e65d0000 { | ||
| 18 | compatible = "renesas,r8a77980-pcie-phy"; | ||
| 19 | reg = <0 0xe65d0000 0 0x8000>; | ||
| 20 | #phy-cells = <0>; | ||
| 21 | clocks = <&cpg CPG_MOD 319>; | ||
| 22 | power-domains = <&sysc 32>; | ||
| 23 | resets = <&cpg 319>; | ||
| 24 | }; | ||
| @@ -10,6 +10,8 @@ Required properties: · 9 unmodified lines | |||
| 10 | SoC. | 10 | SoC. |
| 11 | "renesas,usb2-phy-r8a77965" if the device is a part of an | 11 | "renesas,usb2-phy-r8a77965" if the device is a part of an |
| 12 | R8A77965 SoC. | 12 | R8A77965 SoC. |
| 13 | "renesas,usb2-phy-r8a77990" if the device is a part of an | ||
| 14 | R8A77990 SoC. | ||
| 13 | "renesas,usb2-phy-r8a77995" if the device is a part of an | 15 | "renesas,usb2-phy-r8a77995" if the device is a part of an |
| 14 | R8A77995 SoC. | 16 | R8A77995 SoC. |
| 15 | "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device. | 17 | "renesas,rcar-gen3-usb2-phy" for a generic R-Car Gen3 compatible device. |
| @@ -19,6 +19,10 @@ Required Properties: · 18 unmodified lines | |||
| 19 | defines the interrupt number, the second encodes | 19 | defines the interrupt number, the second encodes |
| 20 | the trigger flags described in | 20 | the trigger flags described in |
| 21 | bindings/interrupt-controller/interrupts.txt | 21 | bindings/interrupt-controller/interrupts.txt |
| 22 | - interrupts: The interrupt outputs from the controller. There is one GPIO | ||
| 23 | interrupt per GPIO bank. The number of interrupts listed depends | ||
| 24 | on the number of GPIO banks on the SoC. The interrupts must be | ||
| 25 | ordered by bank, starting with bank 0. | ||
| 22 | 26 | ||
| 23 | Please refer to pinctrl-bindings.txt in this directory for details of the | 27 | Please refer to pinctrl-bindings.txt in this directory for details of the |
| 24 | common pinctrl bindings used by client devices, including the meaning of the | 28 | common pinctrl bindings used by client devices, including the meaning of the |
| @@ -180,6 +184,12 @@ Example: · 155 unmodified lines | |||
| 180 | #gpio-cells = <2>; | 184 | #gpio-cells = <2>; |
| 181 | interrupt-controller; | 185 | interrupt-controller; |
| 182 | #interrupt-cells = <2>; | 186 | #interrupt-cells = <2>; |
| 187 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, | ||
| 188 | <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, | ||
| 189 | <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, | ||
| 190 | <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, | ||
| 191 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, | ||
| 192 | <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | ||
| 183 | 193 | ||
| 184 | uart2-default: uart2-default { | 194 | uart2-default: uart2-default { |
| 185 | pinmux { | 195 | pinmux { |
| @@ -36,6 +36,8 @@ Optional properties: · 35 unmodified lines | |||
| 36 | - GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable, | 36 | - GENERIC_PINCONFIG: generic pinconfig options to use, bias-disable, |
| 37 | bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable, | 37 | bias-pull-down, bias-pull-up, drive-open-drain, input-schmitt-enable, |
| 38 | input-debounce, output-low, output-high. | 38 | input-debounce, output-low, output-high. |
| 39 | - atmel,drive-strength: 0 or 1 for low drive, 2 for medium drive and 3 for | ||
| 40 | high drive. The default value is low drive. | ||
| 39 | 41 | ||
| 40 | Example: | 42 | Example: |
| 41 | 43 | ||
| @@ -66,6 +68,7 @@ Example: · 24 unmodified lines | |||
| 66 | pinmux = <PIN_PB0>, | 68 | pinmux = <PIN_PB0>, |
| 67 | <PIN_PB5>; | 69 | <PIN_PB5>; |
| 68 | bias-pull-up; | 70 | bias-pull-up; |
| 71 | atmel,drive-strength = <ATMEL_PIO_DRVSTR_ME>; | ||
| 69 | }; | 72 | }; |
| 70 | 73 | ||
| 71 | pinctrl_sdmmc1_default: sdmmc1_default { | 74 | pinctrl_sdmmc1_default: sdmmc1_default { |
| @@ -23,7 +23,8 @@ Required properties: · 22 unmodified lines | |||
| 23 | "marvell,berlin2q-system-pinctrl", | 23 | "marvell,berlin2q-system-pinctrl", |
| 24 | "marvell,berlin4ct-avio-pinctrl", | 24 | "marvell,berlin4ct-avio-pinctrl", |
| 25 | "marvell,berlin4ct-soc-pinctrl", | 25 | "marvell,berlin4ct-soc-pinctrl", |
| 26 | "marvell,berlin4ct-system-pinctrl" | 26 | "marvell,berlin4ct-system-pinctrl", |
| 27 | "syna,as370-soc-pinctrl" | ||
| 27 | 28 | ||
| 28 | Required subnode-properties: | 29 | Required subnode-properties: |
| 29 | - groups: a list of strings describing the group names. | 30 | - groups: a list of strings describing the group names. |
| @@ -0,0 +1,99 @@ | |||
| 1 | Cirrus Logic Madera class audio codecs pinctrl driver | ||
| 2 | |||
| 3 | The Cirrus Logic Madera codecs provide a number of GPIO functions for | ||
| 4 | interfacing to external hardware and to provide logic outputs to other devices. | ||
| 5 | Certain groups of GPIO pins also have an alternate function, normally as an | ||
| 6 | audio interface. | ||
| 7 | |||
| 8 | The set of available GPIOs, functions and alternate function groups differs | ||
| 9 | between codecs so refer to the datasheet for the codec for further information | ||
| 10 | on what is supported on that device. | ||
| 11 | |||
| 12 | The properties for this driver exist within the parent MFD driver node. | ||
| 13 | |||
| 14 | See also | ||
| 15 | the core bindings for the parent MFD driver: | ||
| 16 | Documentation/devicetree/bindings/mfd/madera.txt | ||
| 17 | |||
| 18 | the generic pinmix bindings: | ||
| 19 | Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | ||
| 20 | |||
| 21 | Required properties of parent mfd node: | ||
| 22 | - pinctrl-names : must be "default" | ||
| 23 | - pinctrl-0 : a phandle to the node containing the subnodes containing default | ||
| 24 | configurations | ||
| 25 | |||
| 26 | Required subnodes: | ||
| 27 | One subnode is required to contain the default settings. It contains an | ||
| 28 | arbitrary number of configuration subnodes, one for each group or pin | ||
| 29 | configuration you want to apply as a default. | ||
| 30 | |||
| 31 | Required properties of configuration subnodes: | ||
| 32 | - groups : name of one pin group to configure. One of: | ||
| 33 | aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2, | ||
| 34 | dmic4, dmic5, dmic6, | ||
| 35 | gpio1, gpio2, ..., gpio40 | ||
| 36 | The gpioN groups select the single pin of this name for configuration | ||
| 37 | |||
| 38 | Optional properties of configuration subnodes: | ||
| 39 | Any configuration option not explicitly listed in the dts will be left at | ||
| 40 | chip default setting. | ||
| 41 | |||
| 42 | - function : name of function to assign to this group. One of: | ||
| 43 | aif1, aif2, aif3, aif4, mif1, mif2, mif3, pdmspk1, pdmspk2, | ||
| 44 | dmic3, dmic4, dmic5, dmic6, | ||
| 45 | io, dsp-gpio, irq1, irq2, | ||
| 46 | fll1-clk, fll1-lock, fll2-clk, fll2-lock, fll3-clk, fll3-lock, | ||
| 47 | fllao-clk, fllao-lock, | ||
| 48 | opclk, opclk-async, pwm1, pwm2, spdif, | ||
| 49 | asrc1-in1-lock, asrc1-in2-lock, asrc2-in1-lock, asrc2-in2-lock, | ||
| 50 | spkl-short-circuit, spkr-short-circuit, spk-shutdown, | ||
| 51 | spk-overheat-shutdown, spk-overheat-warn, | ||
| 52 | timer1-sts, timer2-sts, timer3-sts, timer4-sts, timer5-sts, timer6-sts, | ||
| 53 | timer7-sts, timer8-sts, | ||
| 54 | log1-fifo-ne, log2-fifo-ne, log3-fifo-ne, log4-fifo-ne, log5-fifo-ne, | ||
| 55 | log6-fifo-ne, log7-fifo-ne, log8-fifo-ne, | ||
| 56 | |||
| 57 | - bias-disable : disable pull-up and pull-down | ||
| 58 | - bias-bus-hold : enable buskeeper | ||
| 59 | - bias-pull-up : output is pulled-up | ||
| 60 | - bias-pull-down : output is pulled-down | ||
| 61 | - drive-push-pull : CMOS output | ||
| 62 | - drive-open-drain : open-drain output | ||
| 63 | - drive-strength : drive strength in mA. Valid values are 4 or 8 | ||
| 64 | - input-schmitt-enable : enable schmitt-trigger mode | ||
| 65 | - input-schmitt-disable : disable schmitt-trigger mode | ||
| 66 | - input-debounce : A value of 0 disables debounce, a value !=0 enables | ||
| 67 | debounce | ||
| 68 | - output-low : set the pin to output mode with low level | ||
| 69 | - output-high : set the pin to output mode with high level | ||
| 70 | |||
| 71 | Example: | ||
| 72 | |||
| 73 | cs47l85@0 { | ||
| 74 | compatible = "cirrus,cs47l85"; | ||
| 75 | |||
| 76 | pinctrl-names = "default"; | ||
| 77 | pinctrl-0 = <&cs47l85_defaults>; | ||
| 78 | |||
| 79 | cs47l85_defaults: cs47l85-gpio-defaults { | ||
| 80 | aif1 { | ||
| 81 | groups = "aif1"; | ||
| 82 | function = "aif1"; | ||
| 83 | bias-bus-hold; | ||
| 84 | }; | ||
| 85 | |||
| 86 | aif2 { | ||
| 87 | groups = "aif2"; | ||
| 88 | function = "aif2"; | ||
| 89 | bias-bus-hold; | ||
| 90 | }; | ||
| 91 | |||
| 92 | opclk { | ||
| 93 | groups = "gpio1"; | ||
| 94 | function = "opclk"; | ||
| 95 | bias-pull-up; | ||
| 96 | drive-strength = <8>; | ||
| 97 | }; | ||
| 98 | }; | ||
| 99 | }; | ||
| @@ -0,0 +1,36 @@ | |||
| 1 | * Freescale IMX8MQ IOMUX Controller | ||
| 2 | |||
| 3 | Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory | ||
| 4 | for common binding part and usage. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: "fsl,imx8mq-iomuxc" | ||
| 8 | - reg: should contain the base physical address and size of the iomuxc | ||
| 9 | registers. | ||
| 10 | |||
| 11 | Required properties in sub-nodes: | ||
| 12 | - fsl,pins: each entry consists of 6 integers and represents the mux and config | ||
| 13 | setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val | ||
| 14 | input_val> are specified using a PIN_FUNC_ID macro, which can be found in | ||
| 15 | imx8mq-pinfunc.h under device tree source folder. The last integer CONFIG is | ||
| 16 | the pad setting value like pull-up on this pin. Please refer to i.MX8M Quad | ||
| 17 | Reference Manual for detailed CONFIG settings. | ||
| 18 | |||
| 19 | Examples: | ||
| 20 | |||
| 21 | &uart1 { | ||
| 22 | pinctrl-names = "default"; | ||
| 23 | pinctrl-0 = <&pinctrl_uart1>; | ||
| 24 | }; | ||
| 25 | |||
| 26 | iomuxc: pinctrl@30330000 { | ||
| 27 | compatible = "fsl,imx8mq-iomuxc"; | ||
| 28 | reg = <0x0 0x30330000 0x0 0x10000>; | ||
| 29 | |||
| 30 | pinctrl_uart1: uart1grp { | ||
| 31 | fsl,pins = < | ||
| 32 | MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 | ||
| 33 | MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 | ||
| 34 | >; | ||
| 35 | }; | ||
| 36 | }; | ||
| @@ -17,7 +17,7 @@ Tegra124 adds the following optional properties for pin configuration subnodes. · 16 unmodified lines | |||
| 17 | The macros for options are defined in the | 17 | The macros for options are defined in the |
| 18 | include/dt-binding/pinctrl/pinctrl-tegra.h. | 18 | include/dt-binding/pinctrl/pinctrl-tegra.h. |
| 19 | - nvidia,enable-input: Integer. Enable the pin's input path. | 19 | - nvidia,enable-input: Integer. Enable the pin's input path. |
| 20 | enable :TEGRA_PIN_ENABLE0 and | 20 | enable :TEGRA_PIN_ENABLE and |
| 21 | disable or output only: TEGRA_PIN_DISABLE. | 21 | disable or output only: TEGRA_PIN_DISABLE. |
| 22 | - nvidia,open-drain: Integer. | 22 | - nvidia,open-drain: Integer. |
| 23 | enable: TEGRA_PIN_ENABLE. | 23 | enable: TEGRA_PIN_ENABLE. |
| @@ -44,7 +44,7 @@ Optional subnode-properties: · 43 unmodified lines | |||
| 44 | - nvidia,tristate: Integer. | 44 | - nvidia,tristate: Integer. |
| 45 | 0: drive, 1: tristate. | 45 | 0: drive, 1: tristate. |
| 46 | - nvidia,enable-input: Integer. Enable the pin's input path. | 46 | - nvidia,enable-input: Integer. Enable the pin's input path. |
| 47 | enable :TEGRA_PIN_ENABLE0 and | 47 | enable :TEGRA_PIN_ENABLE and |
| 48 | disable or output only: TEGRA_PIN_DISABLE. | 48 | disable or output only: TEGRA_PIN_DISABLE. |
| 49 | - nvidia,open-drain: Integer. | 49 | - nvidia,open-drain: Integer. |
| 50 | enable: TEGRA_PIN_ENABLE. | 50 | enable: TEGRA_PIN_ENABLE. |
| @@ -103,6 +103,12 @@ Optional properties: · 102 unmodified lines | |||
| 103 | #pinctrl-cells: Number of pin control cells in addition to the index within the | 103 | #pinctrl-cells: Number of pin control cells in addition to the index within the |
| 104 | pin controller device instance | 104 | pin controller device instance |
| 105 | 105 | ||
| 106 | pinctrl-use-default: Boolean. Indicates that the OS can use the boot default | ||
| 107 | pin configuration. This allows using an OS that does not have a | ||
| 108 | driver for the pin controller. This property can be set either | ||
| 109 | globally for the pin controller or in child nodes for individual | ||
| 110 | pin group control. | ||
| 111 | |||
| 106 | Pin controller devices should contain the pin configuration nodes that client | 112 | Pin controller devices should contain the pin configuration nodes that client |
| 107 | devices reference. | 113 | devices reference. |
| 108 | 114 | ||
| @@ -16,8 +16,6 @@ If the property interrupt-controller is defined, following property is required · 15 unmodified lines | |||
| 16 | - reg-names: A string describing the "reg" entries. Must contain "eint". | 16 | - reg-names: A string describing the "reg" entries. Must contain "eint". |
| 17 | - interrupts : The interrupt output from the controller. | 17 | - interrupts : The interrupt output from the controller. |
| 18 | - #interrupt-cells: Should be two. | 18 | - #interrupt-cells: Should be two. |
| 19 | - interrupt-parent: Phandle of the interrupt parent to which the external | ||
| 20 | GPIO interrupts are forwarded to. | ||
| 21 | 19 | ||
| 22 | Please refer to pinctrl-bindings.txt in this directory for details of the | 20 | Please refer to pinctrl-bindings.txt in this directory for details of the |
| 23 | common pinctrl bindings used by client devices, including the meaning of the | 21 | common pinctrl bindings used by client devices, including the meaning of the |
| @@ -25,8 +25,6 @@ Required properties: · 24 unmodified lines | |||
| 25 | - gpio-controller: Marks the device as a GPIO controller. | 25 | - gpio-controller: Marks the device as a GPIO controller. |
| 26 | 26 | ||
| 27 | Optional properties : | 27 | Optional properties : |
| 28 | - interrupt-parent: phandle of the parent interrupt controller. | ||
| 29 | |||
| 30 | - interrupts: Interrupt specifier for the controllers interrupt. | 28 | - interrupts: Interrupt specifier for the controllers interrupt. |
| 31 | 29 | ||
| 32 | - interrupt-controller: Marks the device as a interrupt controller. | 30 | - interrupt-controller: Marks the device as a interrupt controller. |
| @@ -10,6 +10,11 @@ Required properties: · 9 unmodified lines | |||
| 10 | - #gpio-cells : Should be two. | 10 | - #gpio-cells : Should be two. |
| 11 | The first cell is the gpio pin number and the | 11 | The first cell is the gpio pin number and the |
| 12 | second cell is used for optional parameters. | 12 | second cell is used for optional parameters. |
| 13 | - gpio-ranges: see ../gpio/gpio.txt | ||
| 14 | |||
| 15 | Optional properties: | ||
| 16 | |||
| 17 | - gpio-reserved-ranges: see ../gpio/gpio.txt | ||
| 13 | 18 | ||
| 14 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 19 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 15 | a general description of GPIO and interrupt bindings. | 20 | a general description of GPIO and interrupt bindings. |
| @@ -67,6 +72,7 @@ Example: · 51 unmodified lines | |||
| 67 | 72 | ||
| 68 | pinctrl-names = "default"; | 73 | pinctrl-names = "default"; |
| 69 | pinctrl-0 = <&gsbi5_uart_default>; | 74 | pinctrl-0 = <&gsbi5_uart_default>; |
| 75 | gpio-ranges = <&msmgpio 0 0 90>; | ||
| 70 | 76 | ||
| 71 | gsbi5_uart_default: gsbi5_uart_default { | 77 | gsbi5_uart_default: gsbi5_uart_default { |
| 72 | mux { | 78 | mux { |
| @@ -40,6 +40,14 @@ MSM8960 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -154,6 +162,7 @@ Example: · 108 unmodified lines | |||
| 154 | 162 | ||
| 155 | gpio-controller; | 163 | gpio-controller; |
| 156 | #gpio-cells = <2>; | 164 | #gpio-cells = <2>; |
| 165 | gpio-ranges = <&tlmm 0 0 147>; | ||
| 157 | interrupt-controller; | 166 | interrupt-controller; |
| 158 | #interrupt-cells = <2>; | 167 | #interrupt-cells = <2>; |
| 159 | interrupts = <0 208 0>; | 168 | interrupts = <0 208 0>; |
| @@ -13,6 +13,11 @@ Required properties: · 12 unmodified lines | |||
| 13 | - #gpio-cells : Should be two. | 13 | - #gpio-cells : Should be two. |
| 14 | The first cell is the gpio pin number and the | 14 | The first cell is the gpio pin number and the |
| 15 | second cell is used for optional parameters. | 15 | second cell is used for optional parameters. |
| 16 | - gpio-ranges: see ../gpio/gpio.txt | ||
| 17 | |||
| 18 | Optional properties: | ||
| 19 | |||
| 20 | - gpio-reserved-ranges: see ../gpio/gpio.txt | ||
| 16 | 21 | ||
| 17 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 22 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 18 | a general description of GPIO and interrupt bindings. | 23 | a general description of GPIO and interrupt bindings. |
| @@ -64,6 +69,7 @@ Example: · 45 unmodified lines | |||
| 64 | 69 | ||
| 65 | gpio-controller; | 70 | gpio-controller; |
| 66 | #gpio-cells = <2>; | 71 | #gpio-cells = <2>; |
| 72 | gpio-ranges = <&tlmm 0 0 100>; | ||
| 67 | interrupt-controller; | 73 | interrupt-controller; |
| 68 | #interrupt-cells = <2>; | 74 | #interrupt-cells = <2>; |
| 69 | interrupts = <0 208 0>; | 75 | interrupts = <0 208 0>; |
| @@ -10,6 +10,11 @@ Required properties: · 9 unmodified lines | |||
| 10 | - #gpio-cells : Should be two. | 10 | - #gpio-cells : Should be two. |
| 11 | The first cell is the gpio pin number and the | 11 | The first cell is the gpio pin number and the |
| 12 | second cell is used for optional parameters. | 12 | second cell is used for optional parameters. |
| 13 | - gpio-ranges: see ../gpio/gpio.txt | ||
| 14 | |||
| 15 | Optional properties: | ||
| 16 | |||
| 17 | - gpio-reserved-ranges: see ../gpio/gpio.txt | ||
| 13 | 18 | ||
| 14 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 19 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 15 | a general description of GPIO and interrupt bindings. | 20 | a general description of GPIO and interrupt bindings. |
| @@ -67,6 +72,7 @@ Example: · 51 unmodified lines | |||
| 67 | 72 | ||
| 68 | gpio-controller; | 73 | gpio-controller; |
| 69 | #gpio-cells = <2>; | 74 | #gpio-cells = <2>; |
| 75 | gpio-ranges = <&pinmux 0 0 69>; | ||
| 70 | interrupt-controller; | 76 | interrupt-controller; |
| 71 | #interrupt-cells = <2>; | 77 | #interrupt-cells = <2>; |
| 72 | interrupts = <0 32 0x4>; | 78 | interrupts = <0 32 0x4>; |
| @@ -40,6 +40,14 @@ IPQ8074 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -148,6 +156,7 @@ Example: · 102 unmodified lines | |||
| 148 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | 156 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; |
| 149 | gpio-controller; | 157 | gpio-controller; |
| 150 | #gpio-cells = <2>; | 158 | #gpio-cells = <2>; |
| 159 | gpio-ranges = <&tlmm 0 0 70>; | ||
| 151 | interrupt-controller; | 160 | interrupt-controller; |
| 152 | #interrupt-cells = <2>; | 161 | #interrupt-cells = <2>; |
| 153 | 162 | ||
| @@ -40,6 +40,14 @@ MDM9615 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -127,6 +135,7 @@ Example: · 81 unmodified lines | |||
| 127 | 135 | ||
| 128 | gpio-controller; | 136 | gpio-controller; |
| 129 | #gpio-cells = <2>; | 137 | #gpio-cells = <2>; |
| 138 | gpio-ranges = <&msmgpio 0 0 88>; | ||
| 130 | interrupt-controller; | 139 | interrupt-controller; |
| 131 | #interrupt-cells = <2>; | 140 | #interrupt-cells = <2>; |
| 132 | interrupts = <0 16 0x4>; | 141 | interrupts = <0 16 0x4>; |
| @@ -10,6 +10,11 @@ Required properties: · 9 unmodified lines | |||
| 10 | - #gpio-cells : Should be two. | 10 | - #gpio-cells : Should be two. |
| 11 | The first cell is the gpio pin number and the | 11 | The first cell is the gpio pin number and the |
| 12 | second cell is used for optional parameters. | 12 | second cell is used for optional parameters. |
| 13 | - gpio-ranges: see ../gpio/gpio.txt | ||
| 14 | |||
| 15 | Optional properties: | ||
| 16 | |||
| 17 | - gpio-reserved-ranges: see ../gpio/gpio.txt | ||
| 13 | 18 | ||
| 14 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 19 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 15 | a general description of GPIO and interrupt bindings. | 20 | a general description of GPIO and interrupt bindings. |
| @@ -62,6 +67,7 @@ Example: · 46 unmodified lines | |||
| 62 | 67 | ||
| 63 | gpio-controller; | 68 | gpio-controller; |
| 64 | #gpio-cells = <2>; | 69 | #gpio-cells = <2>; |
| 70 | gpio-ranges = <&msmgpio 0 0 173>; | ||
| 65 | interrupt-controller; | 71 | interrupt-controller; |
| 66 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
| 67 | interrupts = <0 16 0x4>; | 73 | interrupts = <0 16 0x4>; |
| @@ -40,6 +40,14 @@ MSM8916 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -162,6 +170,7 @@ Example: · 116 unmodified lines | |||
| 162 | interrupts = <0 208 0>; | 170 | interrupts = <0 208 0>; |
| 163 | gpio-controller; | 171 | gpio-controller; |
| 164 | #gpio-cells = <2>; | 172 | #gpio-cells = <2>; |
| 173 | gpio-ranges = <&tlmm 0 0 122>; | ||
| 165 | interrupt-controller; | 174 | interrupt-controller; |
| 166 | #interrupt-cells = <2>; | 175 | #interrupt-cells = <2>; |
| 167 | 176 | ||
| @@ -40,6 +40,14 @@ MSM8960 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -156,6 +164,7 @@ Example: · 110 unmodified lines | |||
| 156 | 164 | ||
| 157 | gpio-controller; | 165 | gpio-controller; |
| 158 | #gpio-cells = <2>; | 166 | #gpio-cells = <2>; |
| 167 | gpio-ranges = <&msmgpio 0 0 152>; | ||
| 159 | interrupt-controller; | 168 | interrupt-controller; |
| 160 | #interrupt-cells = <2>; | 169 | #interrupt-cells = <2>; |
| 161 | interrupts = <0 16 0x4>; | 170 | interrupts = <0 16 0x4>; |
| @@ -10,6 +10,11 @@ Required properties: · 9 unmodified lines | |||
| 10 | - #gpio-cells : Should be two. | 10 | - #gpio-cells : Should be two. |
| 11 | The first cell is the gpio pin number and the | 11 | The first cell is the gpio pin number and the |
| 12 | second cell is used for optional parameters. | 12 | second cell is used for optional parameters. |
| 13 | - gpio-ranges: see ../gpio/gpio.txt | ||
| 14 | |||
| 15 | Optional properties: | ||
| 16 | |||
| 17 | - gpio-reserved-ranges: see ../gpio/gpio.txt | ||
| 13 | 18 | ||
| 14 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 19 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 15 | a general description of GPIO and interrupt bindings. | 20 | a general description of GPIO and interrupt bindings. |
| @@ -87,6 +92,7 @@ Example: · 71 unmodified lines | |||
| 87 | 92 | ||
| 88 | gpio-controller; | 93 | gpio-controller; |
| 89 | #gpio-cells = <2>; | 94 | #gpio-cells = <2>; |
| 95 | gpio-ranges = <&msmgpio 0 0 146>; | ||
| 90 | interrupt-controller; | 96 | interrupt-controller; |
| 91 | #interrupt-cells = <2>; | 97 | #interrupt-cells = <2>; |
| 92 | interrupts = <0 208 0>; | 98 | interrupts = <0 208 0>; |
| @@ -42,6 +42,14 @@ MSM8994 platform. · 41 unmodified lines | |||
| 42 | Definition: must be 2. Specifying the pin number and flags, as defined | 42 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 43 | in <dt-bindings/gpio/gpio.h> | 43 | in <dt-bindings/gpio/gpio.h> |
| 44 | 44 | ||
| 45 | - gpio-ranges: | ||
| 46 | Usage: required | ||
| 47 | Definition: see ../gpio/gpio.txt | ||
| 48 | |||
| 49 | - gpio-reserved-ranges: | ||
| 50 | Usage: optional | ||
| 51 | Definition: see ../gpio/gpio.txt | ||
| 52 | |||
| 45 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 53 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 46 | a general description of GPIO and interrupt bindings. | 54 | a general description of GPIO and interrupt bindings. |
| 47 | 55 | ||
| @@ -160,6 +168,7 @@ Example: · 112 unmodified lines | |||
| 160 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; | 168 | interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; |
| 161 | gpio-controller; | 169 | gpio-controller; |
| 162 | #gpio-cells = <2>; | 170 | #gpio-cells = <2>; |
| 171 | gpio-ranges = <&msmgpio 0 0 146>; | ||
| 163 | interrupt-controller; | 172 | interrupt-controller; |
| 164 | #interrupt-cells = <2>; | 173 | #interrupt-cells = <2>; |
| 165 | 174 | ||
| @@ -40,6 +40,14 @@ MSM8996 platform. · 39 unmodified lines | |||
| 40 | Definition: must be 2. Specifying the pin number and flags, as defined | 40 | Definition: must be 2. Specifying the pin number and flags, as defined |
| 41 | in <dt-bindings/gpio/gpio.h> | 41 | in <dt-bindings/gpio/gpio.h> |
| 42 | 42 | ||
| 43 | - gpio-ranges: | ||
| 44 | Usage: required | ||
| 45 | Definition: see ../gpio/gpio.txt | ||
| 46 | |||
| 47 | - gpio-reserved-ranges: | ||
| 48 | Usage: optional | ||
| 49 | Definition: see ../gpio/gpio.txt | ||
| 50 | |||
| 43 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for | 51 | Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for |
| 44 | a general description of GPIO and interrupt bindings. | 52 | a general description of GPIO and interrupt bindings. |
| 45 | 53 | ||
| @@ -180,6 +188,7 @@ Example: · 134 unmodified lines | |||
| 180 | reg = <0x01010000 0x300000>; | 188 | reg = <0x01010000 0x300000>; |
| 181 | interrupts = <0 208 0>; | 189 | interrupts = <0 208 0>; |
| 182 | gpio-controller; | 190 | gpio-controller; |
| 191 | gpio-ranges = <&tlmm 0 0 150>; | ||
| 183 | #gpio-cells = <2>; | 192 | #gpio-cells = <2>; |
| 184 | interrupt-controller; | 193 | interrupt-controller; |
| 185 | #interrupt-cells = <2>; | 194 | #interrupt-cells = <2>; |
| @@ -7,6 +7,7 @@ PMIC's from Qualcomm. · 6 unmodified lines | |||
| 7 | Usage: required | 7 | Usage: required |
| 8 | Value type: <string> | 8 | Value type: <string> |
| 9 | Definition: must be one of: | 9 | Definition: must be one of: |
| 10 | "qcom,pm8005-gpio" | ||
| 10 | "qcom,pm8018-gpio" | 11 | "qcom,pm8018-gpio" |
| 11 | "qcom,pm8038-gpio" | 12 | "qcom,pm8038-gpio" |
| 12 | "qcom,pm8058-gpio" | 13 | "qcom,pm8058-gpio" |
| @@ -15,7 +16,7 @@ PMIC's from Qualcomm. · 2 unmodified lines | |||
| 15 | "qcom,pm8921-gpio" | 16 | "qcom,pm8921-gpio" |
| 16 | "qcom,pm8941-gpio" | 17 | "qcom,pm8941-gpio" |
| 17 | "qcom,pm8994-gpio" | 18 | "qcom,pm8994-gpio" |
| 18 | "qcom,pmi8994-gpio" | 19 | "qcom,pm8998-gpio" |
| 19 | "qcom,pma8084-gpio" | 20 | "qcom,pma8084-gpio" |
| 20 | "qcom,pmi8994-gpio" | 21 | "qcom,pmi8994-gpio" |
| 21 | 22 | ||
| @@ -78,6 +79,7 @@ to specify in a pin configuration subnode: · 56 unmodified lines | |||
| 78 | Value type: <string-array> | 79 | Value type: <string-array> |
| 79 | Definition: List of gpio pins affected by the properties specified in | 80 | Definition: List of gpio pins affected by the properties specified in |
| 80 | this subnode. Valid pins are: | 81 | this subnode. Valid pins are: |
| 82 | gpio1-gpio4 for pm8005 | ||
| 81 | gpio1-gpio6 for pm8018 | 83 | gpio1-gpio6 for pm8018 |
| 82 | gpio1-gpio12 for pm8038 | 84 | gpio1-gpio12 for pm8038 |
| 83 | gpio1-gpio40 for pm8058 | 85 | gpio1-gpio40 for pm8058 |
| @@ -86,7 +88,7 @@ to specify in a pin configuration subnode: · 2 unmodified lines | |||
| 86 | gpio1-gpio44 for pm8921 | 88 | gpio1-gpio44 for pm8921 |
| 87 | gpio1-gpio36 for pm8941 | 89 | gpio1-gpio36 for pm8941 |
| 88 | gpio1-gpio22 for pm8994 | 90 | gpio1-gpio22 for pm8994 |
| 89 | gpio1-gpio10 for pmi8994 | 91 | gpio1-gpio26 for pm8998 |
| 90 | gpio1-gpio22 for pma8084 | 92 | gpio1-gpio22 for pma8084 |
| 91 | gpio1-gpio10 for pmi8994 | 93 | gpio1-gpio10 for pmi8994 |
| 92 | 94 | ||
| @@ -124,8 +124,6 @@ used as system wakeup events. · 123 unmodified lines | |||
| 124 | A. External GPIO Interrupts: For supporting external gpio interrupts, the | 124 | A. External GPIO Interrupts: For supporting external gpio interrupts, the |
| 125 | following properties should be specified in the pin-controller device node. | 125 | following properties should be specified in the pin-controller device node. |
| 126 | 126 | ||
| 127 | - interrupt-parent: phandle of the interrupt parent to which the external | ||
| 128 | GPIO interrupts are forwarded to. | ||
| 129 | - interrupts: interrupt specifier for the controller. The format and value of | 127 | - interrupts: interrupt specifier for the controller. The format and value of |
| 130 | the interrupt specifier depends on the interrupt parent for the controller. | 128 | the interrupt specifier depends on the interrupt parent for the controller. |
| 131 | 129 | ||
| @@ -145,8 +143,13 @@ A. External GPIO Interrupts: For supporting external gpio interrupts, the · 13 unmodified lines | |||
| 145 | 143 | ||
| 146 | B. External Wakeup Interrupts: For supporting external wakeup interrupts, a | 144 | B. External Wakeup Interrupts: For supporting external wakeup interrupts, a |
| 147 | child node representing the external wakeup interrupt controller should be | 145 | child node representing the external wakeup interrupt controller should be |
| 148 | included in the pin-controller device node. This child node should include | 146 | included in the pin-controller device node. |
| 149 | the following properties. | 147 | |
| 148 | Only one pin-controller device node can include external wakeup interrupts | ||
| 149 | child node (in other words, only one External Wakeup Interrupts | ||
| 150 | pin-controller is supported). | ||
| 151 | |||
| 152 | This child node should include following properties: | ||
| 150 | 153 | ||
| 151 | - compatible: identifies the type of the external wakeup interrupt controller | 154 | - compatible: identifies the type of the external wakeup interrupt controller |
| 152 | The possible values are: | 155 | The possible values are: |
| @@ -156,12 +159,12 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a · 3 unmodified lines | |||
| 156 | found on Samsung S3C2412 and S3C2413 SoCs, | 159 | found on Samsung S3C2412 and S3C2413 SoCs, |
| 157 | - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller | 160 | - samsung,s3c64xx-wakeup-eint: represents wakeup interrupt controller |
| 158 | found on Samsung S3C64xx SoCs, | 161 | found on Samsung S3C64xx SoCs, |
| 162 | - samsung,s5pv210-wakeup-eint: represents wakeup interrupt controller | ||
| 163 | found on Samsung S5Pv210 SoCs, | ||
| 159 | - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller | 164 | - samsung,exynos4210-wakeup-eint: represents wakeup interrupt controller |
| 160 | found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs. | 165 | found on Samsung Exynos4210 and S5PC110/S5PV210 SoCs. |
| 161 | - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller | 166 | - samsung,exynos7-wakeup-eint: represents wakeup interrupt controller |
| 162 | found on Samsung Exynos7 SoC. | 167 | found on Samsung Exynos7 SoC. |
| 163 | - interrupt-parent: phandle of the interrupt parent to which the external | ||
| 164 | wakeup interrupts are forwarded to. | ||
| 165 | - interrupts: interrupt used by multiplexed wakeup interrupts. | 168 | - interrupts: interrupt used by multiplexed wakeup interrupts. |
| 166 | 169 | ||
| 167 | In addition, following properties must be present in node of every bank | 170 | In addition, following properties must be present in node of every bank |
| @@ -181,8 +184,6 @@ B. External Wakeup Interrupts: For supporting external wakeup interrupts, a · 13 unmodified lines | |||
| 181 | Node of every bank of pins supporting direct wake-up interrupts (without | 184 | Node of every bank of pins supporting direct wake-up interrupts (without |
| 182 | multiplexing) must contain following properties: | 185 | multiplexing) must contain following properties: |
| 183 | 186 | ||
| 184 | - interrupt-parent: phandle of the interrupt parent to which the external | ||
| 185 | wakeup interrupts are forwarded to. | ||
| 186 | - interrupts: interrupts of the interrupt parent which are used for external | 187 | - interrupts: interrupts of the interrupt parent which are used for external |
| 187 | wakeup interrupts from pins of the bank, must contain interrupts for all | 188 | wakeup interrupts from pins of the bank, must contain interrupts for all |
| 188 | pins of the bank. | 189 | pins of the bank. |
| @@ -37,11 +37,10 @@ Required properties: · 36 unmodified lines | |||
| 37 | 37 | ||
| 38 | Optional properties: | 38 | Optional properties: |
| 39 | - reset: : Reference to the reset controller | 39 | - reset: : Reference to the reset controller |
| 40 | - interrupt-parent: phandle of the interrupt parent to which the external | 40 | - st,syscfg: Should be phandle/offset/mask. |
| 41 | GPIO interrupts are forwarded to. | 41 | -The phandle to the syscon node which includes IRQ mux selection register. |
| 42 | - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node | 42 | -The offset of the IRQ mux selection register |
| 43 | which includes IRQ mux selection register, and the offset of the IRQ mux | 43 | -The field mask of IRQ mux, needed if different of 0xf. |
| 44 | selection register. | ||
| 45 | - gpio-ranges: Define a dedicated mapping between a pin-controller and | 44 | - gpio-ranges: Define a dedicated mapping between a pin-controller and |
| 46 | a gpio controller. Format is <&phandle a b c> with: | 45 | a gpio controller. Format is <&phandle a b c> with: |
| 47 | -(phandle): phandle of pin-controller. | 46 | -(phandle): phandle of pin-controller. |
| @@ -55,6 +54,8 @@ Optional properties: · 7 unmodified lines | |||
| 55 | NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller | 54 | NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller |
| 56 | have to use a "gpio-ranges" entry. | 55 | have to use a "gpio-ranges" entry. |
| 57 | More details in Documentation/devicetree/bindings/gpio/gpio.txt. | 56 | More details in Documentation/devicetree/bindings/gpio/gpio.txt. |
| 57 | - st,bank-ioport: should correspond to the EXTI IOport selection (EXTI line | ||
| 58 | used to select GPIOs as interrupts). | ||
| 58 | 59 | ||
| 59 | Example 1: | 60 | Example 1: |
| 60 | #include <dt-bindings/pinctrl/stm32f429-pinfunc.h> | 61 | #include <dt-bindings/pinctrl/stm32f429-pinfunc.h> |
| @@ -114,18 +114,26 @@ Required properties: · 113 unmodified lines | |||
| 114 | - power-domains : A list of PM domain specifiers, as defined by bindings of | 114 | - power-domains : A list of PM domain specifiers, as defined by bindings of |
| 115 | the power controller that is the PM domain provider. | 115 | the power controller that is the PM domain provider. |
| 116 | 116 | ||
| 117 | Optional properties: | ||
| 118 | - power-domain-names : A list of power domain name strings sorted in the same | ||
| 119 | order as the power-domains property. Consumers drivers will use | ||
| 120 | power-domain-names to match power domains with power-domains | ||
| 121 | specifiers. | ||
| 122 | |||
| 117 | Example: | 123 | Example: |
| 118 | 124 | ||
| 119 | leaky-device@12350000 { | 125 | leaky-device@12350000 { |
| 120 | compatible = "foo,i-leak-current"; | 126 | compatible = "foo,i-leak-current"; |
| 121 | reg = <0x12350000 0x1000>; | 127 | reg = <0x12350000 0x1000>; |
| 122 | power-domains = <&power 0>; | 128 | power-domains = <&power 0>; |
| 129 | power-domain-names = "io"; | ||
| 123 | }; | 130 | }; |
| 124 | 131 | ||
| 125 | leaky-device@12351000 { | 132 | leaky-device@12351000 { |
| 126 | compatible = "foo,i-leak-current"; | 133 | compatible = "foo,i-leak-current"; |
| 127 | reg = <0x12351000 0x1000>; | 134 | reg = <0x12351000 0x1000>; |
| 128 | power-domains = <&power 0>, <&power 1> ; | 135 | power-domains = <&power 0>, <&power 1> ; |
| 136 | power-domain-names = "io", "clk"; | ||
| 129 | }; | 137 | }; |
| 130 | 138 | ||
| 131 | The first example above defines a typical PM domain consumer device, which is | 139 | The first example above defines a typical PM domain consumer device, which is |
| @@ -133,7 +141,7 @@ located inside a PM domain with index 0 of a power controller represented by a · 1 unmodified line | |||
| 133 | node with the label "power". | 141 | node with the label "power". |
| 134 | In the second example the consumer device are partitioned across two PM domains, | 142 | In the second example the consumer device are partitioned across two PM domains, |
| 135 | the first with index 0 and the second with index 1, of a power controller that | 143 | the first with index 0 and the second with index 1, of a power controller that |
| 136 | is represented by a node with the label "power. | 144 | is represented by a node with the label "power". |
| 137 | 145 | ||
| 138 | Optional properties: | 146 | Optional properties: |
| 139 | - required-opps: This contains phandle to an OPP node in another device's OPP | 147 | - required-opps: This contains phandle to an OPP node in another device's OPP |
| @@ -0,0 +1,45 @@ | |||
| 1 | Qualcomm PON Device | ||
| 2 | |||
| 3 | The Power On device for Qualcomm PM8xxx is MFD supporting pwrkey | ||
| 4 | and resin along with the Android reboot-mode. | ||
| 5 | |||
| 6 | This DT node has pwrkey and resin as sub nodes. | ||
| 7 | |||
| 8 | Required Properties: | ||
| 9 | -compatible: "qcom,pm8916-pon" | ||
| 10 | -reg: Specifies the physical address of the pon register | ||
| 11 | |||
| 12 | Optional subnode: | ||
| 13 | -pwrkey: Specifies the subnode pwrkey and should follow the | ||
| 14 | qcom,pm8941-pwrkey.txt description. | ||
| 15 | -resin: Specifies the subnode resin and should follow the | ||
| 16 | qcom,pm8xxx-pwrkey.txt description. | ||
| 17 | |||
| 18 | The rest of the properties should follow the generic reboot-mode description | ||
| 19 | found in reboot-mode.txt | ||
| 20 | |||
| 21 | Example: | ||
| 22 | |||
| 23 | pon@800 { | ||
| 24 | compatible = "qcom,pm8916-pon"; | ||
| 25 | |||
| 26 | reg = <0x800>; | ||
| 27 | mode-bootloader = <0x2>; | ||
| 28 | mode-recovery = <0x1>; | ||
| 29 | |||
| 30 | pwrkey { | ||
| 31 | compatible = "qcom,pm8941-pwrkey"; | ||
| 32 | interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>; | ||
| 33 | debounce = <15625>; | ||
| 34 | bias-pull-up; | ||
| 35 | linux,code = <KEY_POWER>; | ||
| 36 | }; | ||
| 37 | |||
| 38 | resin { | ||
| 39 | compatible = "qcom,pm8941-resin"; | ||
| 40 | interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; | ||
| 41 | debounce = <15625>; | ||
| 42 | bias-pull-up; | ||
| 43 | linux,code = <KEY_VOLUMEDOWN>; | ||
| 44 | }; | ||
| 45 | }; | ||
| @@ -9,8 +9,6 @@ Required properties: · 8 unmodified lines | |||
| 9 | - interrupts: <a b> where a is the interrupt number and b is a | 9 | - interrupts: <a b> where a is the interrupt number and b is a |
| 10 | field that represents an encoding of the sense and level | 10 | field that represents an encoding of the sense and level |
| 11 | information for the interrupt. | 11 | information for the interrupt. |
| 12 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 13 | services interrupts for this device. | ||
| 14 | 12 | ||
| 15 | Optional properties: | 13 | Optional properties: |
| 16 | - active-semi,input-voltage-threshold-microvolt: unit: mV; | 14 | - active-semi,input-voltage-threshold-microvolt: unit: mV; |
| @@ -6,8 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | * "ti,bq24251" | 6 | * "ti,bq24251" |
| 7 | * "ti,bq24257" | 7 | * "ti,bq24257" |
| 8 | - reg: integer, i2c address of the device. | 8 | - reg: integer, i2c address of the device. |
| 9 | - interrupt-parent: Should be the phandle for the interrupt controller. Use in | ||
| 10 | conjunction with "interrupts". | ||
| 11 | - interrupts: Interrupt mapping for GPIO IRQ (configure for both edges). Use in | 9 | - interrupts: Interrupt mapping for GPIO IRQ (configure for both edges). Use in |
| 12 | conjunction with "interrupt-parent". | 10 | conjunction with "interrupt-parent". |
| 13 | - ti,battery-regulation-voltage: integer, maximum charging voltage in uV. | 11 | - ti,battery-regulation-voltage: integer, maximum charging voltage in uV. |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: I2C slave address 27h | 5 | - reg: I2C slave address 27h |
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupt-parent: interrupt controller node (see interrupt binding[0]) | ||
| 9 | - interrupts: interrupt specifier (see interrupt binding[0]) | 8 | - interrupts: interrupt specifier (see interrupt binding[0]) |
| 10 | - debounce-ms: interrupt debounce time. (u32) | 9 | - debounce-ms: interrupt debounce time. (u32) |
| 11 | 10 | ||
| @@ -0,0 +1,26 @@ | |||
| 1 | Devicetree bindings for Maxim DS2760 | ||
| 2 | ==================================== | ||
| 3 | |||
| 4 | The ds2760 is a w1 slave device and must hence have its sub-node in DT | ||
| 5 | under a w1 bus master node. | ||
| 6 | |||
| 7 | The device exposes a power supply, so the details described in | ||
| 8 | Documentation/devicetree/bindings/power/supply/power_supply.txt apply. | ||
| 9 | |||
| 10 | Required properties: | ||
| 11 | - compatible: must be "maxim,ds2760" | ||
| 12 | |||
| 13 | Optional properties: | ||
| 14 | - power-supplies: Refers to one or more power supplies connected to | ||
| 15 | this battery. | ||
| 16 | - maxim,pmod-enabled: This boolean property enables the DS2760 to enter | ||
| 17 | sleep mode when the DQ line goes low for greater | ||
| 18 | than 2 seconds and leave sleep Mode when the DQ | ||
| 19 | line goes high. | ||
| 20 | - maxim,cache-time-ms: Time im milliseconds to cache the data for. When | ||
| 21 | this time expires, the values are read again from | ||
| 22 | the hardware. Defaults to 1000. | ||
| 23 | - rated-capacity-microamp-hours: | ||
| 24 | The rated capacity of the battery, in mAh. | ||
| 25 | If not specified, the value stored in the | ||
| 26 | non-volatile chip memory is used. | ||
| @@ -3,7 +3,6 @@ Maxim MAX14656 / AL32 USB Charger Detector · 2 unmodified lines | |||
| 3 | Required properties : | 3 | Required properties : |
| 4 | - compatible : "maxim,max14656"; | 4 | - compatible : "maxim,max14656"; |
| 5 | - reg: i2c slave address | 5 | - reg: i2c slave address |
| 6 | - interrupt-parent: the phandle for the interrupt controller | ||
| 7 | - interrupts: interrupt line | 6 | - interrupts: interrupt line |
| 8 | 7 | ||
| 9 | Example: | 8 | Example: |
| @@ -4,8 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: it should contain one of the following: | 4 | - compatible: it should contain one of the following: |
| 5 | "richtek,rt9455". | 5 | "richtek,rt9455". |
| 6 | - reg: integer, i2c address of the device. | 6 | - reg: integer, i2c address of the device. |
| 7 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 8 | services interrupts for this device. | ||
| 9 | - interrupts: interrupt mapping for GPIO IRQ, it should be | 7 | - interrupts: interrupt mapping for GPIO IRQ, it should be |
| 10 | configured with IRQ_TYPE_LEVEL_LOW flag. | 8 | configured with IRQ_TYPE_LEVEL_LOW flag. |
| 11 | - richtek,output-charge-current: integer, output current from the charger to the | 9 | - richtek,output-charge-current: integer, output current from the charger to the |
| @@ -2,7 +2,11 @@ SBS sbs-battery · 1 unmodified line | |||
| 2 | ~~~~~~~~~~ | 2 | ~~~~~~~~~~ |
| 3 | 3 | ||
| 4 | Required properties : | 4 | Required properties : |
| 5 | - compatible : "sbs,sbs-battery" | 5 | - compatible: "<vendor>,<part-number>", "sbs,sbs-battery" as fallback. The |
| 6 | part number compatible string might be used in order to take care of | ||
| 7 | vendor specific registers. | ||
| 8 | Known <vendor>,<part-number>: | ||
| 9 | ti,bq20z75 | ||
| 6 | 10 | ||
| 7 | Optional properties : | 11 | Optional properties : |
| 8 | - sbs,i2c-retry-count : The number of times to retry i2c transactions on i2c | 12 | - sbs,i2c-retry-count : The number of times to retry i2c transactions on i2c |
| @@ -14,9 +18,9 @@ Optional properties : · 5 unmodified lines | |||
| 14 | 18 | ||
| 15 | Example: | 19 | Example: |
| 16 | 20 | ||
| 17 | bq20z75@b { | 21 | battery@b { |
| 18 | compatible = "sbs,sbs-battery"; | 22 | compatible = "ti,bq20z75", "sbs,sbs-battery"; |
| 19 | reg = < 0xb >; | 23 | reg = <0xb>; |
| 20 | sbs,i2c-retry-count = <2>; | 24 | sbs,i2c-retry-count = <2>; |
| 21 | sbs,poll-retry-count = <10>; | 25 | sbs,poll-retry-count = <10>; |
| 22 | sbs,battery-detect-gpios = <&gpio-controller 122 1>; | 26 | sbs,battery-detect-gpios = <&gpio-controller 122 1>; |
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | specific registers. | 7 | specific registers. |
| 8 | 8 | ||
| 9 | Optional properties: | 9 | Optional properties: |
| 10 | - interrupt-parent: Should be the phandle for the interrupt controller. Use in | ||
| 11 | conjunction with "interrupts". | ||
| 12 | - interrupts: Interrupt mapping for GPIO IRQ. Use in conjunction with | 10 | - interrupts: Interrupt mapping for GPIO IRQ. Use in conjunction with |
| 13 | "interrupt-parent". If an interrupt is not provided the driver will switch | 11 | "interrupt-parent". If an interrupt is not provided the driver will switch |
| 14 | automatically to polling. | 12 | automatically to polling. |
| @@ -19,7 +19,6 @@ The IBM Akebono board is a development board for the PPC476GTR SoC. · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | - compatible : should be "ibm,476gtr-sdhci","generic-sdhci". | 20 | - compatible : should be "ibm,476gtr-sdhci","generic-sdhci". |
| 21 | - reg : should contain the SDHCI registers location and length. | 21 | - reg : should contain the SDHCI registers location and length. |
| 22 | - interrupt-parent : a phandle for the interrupt controller. | ||
| 23 | - interrupts : should contain the SDHCI interrupt. | 22 | - interrupts : should contain the SDHCI interrupt. |
| 24 | 23 | ||
| 25 | 1.b) The Advanced Host Controller Interface (AHCI) SATA node | 24 | 1.b) The Advanced Host Controller Interface (AHCI) SATA node |
| @@ -30,7 +29,6 @@ The IBM Akebono board is a development board for the PPC476GTR SoC. · 4 unmodified lines | |||
| 30 | 29 | ||
| 31 | - compatible : should be "ibm,476gtr-ahci". | 30 | - compatible : should be "ibm,476gtr-ahci". |
| 32 | - reg : should contain the AHCI registers location and length. | 31 | - reg : should contain the AHCI registers location and length. |
| 33 | - interrupt-parent : a phandle for the interrupt controller. | ||
| 34 | - interrupts : should contain the AHCI interrupt. | 32 | - interrupts : should contain the AHCI interrupt. |
| 35 | 33 | ||
| 36 | 1.c) The FPGA node | 34 | 1.c) The FPGA node |
| @@ -13,7 +13,6 @@ device tree entries: · 12 unmodified lines | |||
| 13 | Require properties: | 13 | Require properties: |
| 14 | - compatible : "ibm,476gtr-hsta-msi", "ibm,hsta-msi" | 14 | - compatible : "ibm,476gtr-hsta-msi", "ibm,hsta-msi" |
| 15 | - reg : register mapping for the HSTA MSI space | 15 | - reg : register mapping for the HSTA MSI space |
| 16 | - interrupt-parent : parent controller for mapping interrupts | ||
| 17 | - interrupts : ordered interrupt mapping for each MSI in the register | 16 | - interrupts : ordered interrupt mapping for each MSI in the register |
| 18 | space. The first interrupt should be associated with a | 17 | space. The first interrupt should be associated with a |
| 19 | register offset of 0x00, the second to 0x10, etc. | 18 | register offset of 0x00, the second to 0x10, etc. |
| @@ -38,7 +38,6 @@ DMA devices. · 37 unmodified lines | |||
| 38 | 2 sources: DMAx CS FIFO Needs Service IRQ (on UIC0) | 38 | 2 sources: DMAx CS FIFO Needs Service IRQ (on UIC0) |
| 39 | and DMA Error IRQ (on UIC1). The latter is common | 39 | and DMA Error IRQ (on UIC1). The latter is common |
| 40 | for both DMA engines>. | 40 | for both DMA engines>. |
| 41 | - interrupt-parent : needed for interrupt mapping | ||
| 42 | 41 | ||
| 43 | Example: | 42 | Example: |
| 44 | 43 | ||
| @@ -65,7 +64,6 @@ DMA devices. · 20 unmodified lines | |||
| 65 | - compatible : "amcc,xor-accelerator"; | 64 | - compatible : "amcc,xor-accelerator"; |
| 66 | - reg : <registers mapping> | 65 | - reg : <registers mapping> |
| 67 | - interrupts : <interrupt mapping for XOR interrupt source> | 66 | - interrupts : <interrupt mapping for XOR interrupt source> |
| 68 | - interrupt-parent : for interrupt mapping | ||
| 69 | 67 | ||
| 70 | Example: | 68 | Example: |
| 71 | 69 | ||
| @@ -84,13 +84,6 @@ PROPERTIES · 83 unmodified lines | |||
| 84 | 84 | ||
| 85 | Interrupt numbers are listed in order (perfmon, event0, event1). | 85 | Interrupt numbers are listed in order (perfmon, event0, event1). |
| 86 | 86 | ||
| 87 | - interrupt-parent | ||
| 88 | Usage: required | ||
| 89 | Value type: <phandle> | ||
| 90 | Definition: A single <phandle> value that points | ||
| 91 | to the interrupt parent to which the child domain | ||
| 92 | is being mapped. Value must be "&mpic" | ||
| 93 | |||
| 94 | - reg | 87 | - reg |
| 95 | Usage: required | 88 | Usage: required |
| 96 | Value type: <prop-encoded-array> | 89 | Value type: <prop-encoded-array> |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - reg : should contain at least address and length of the DIU register | 8 | - reg : should contain at least address and length of the DIU register |
| 9 | set. | 9 | set. |
| 10 | - interrupts : one DIU interrupt should be described here. | 10 | - interrupts : one DIU interrupt should be described here. |
| 11 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 12 | services interrupts for this device. | ||
| 13 | 11 | ||
| 14 | Optional properties: | 12 | Optional properties: |
| 15 | - edid : verbatim EDID data block describing attached display. | 13 | - edid : verbatim EDID data block describing attached display. |
| @@ -13,7 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | DMA channels and the address space of the DMA controller | 13 | DMA channels and the address space of the DMA controller |
| 14 | - cell-index : controller index. 0 for controller @ 0x8100 | 14 | - cell-index : controller index. 0 for controller @ 0x8100 |
| 15 | - interrupts : interrupt specifier for DMA IRQ | 15 | - interrupts : interrupt specifier for DMA IRQ |
| 16 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 17 | 16 | ||
| 18 | - DMA channel nodes: | 17 | - DMA channel nodes: |
| 19 | - compatible : must include "fsl,elo-dma-channel" | 18 | - compatible : must include "fsl,elo-dma-channel" |
| @@ -25,7 +24,6 @@ Optional properties: · 5 unmodified lines | |||
| 25 | - interrupts : interrupt specifier for DMA channel IRQ | 24 | - interrupts : interrupt specifier for DMA channel IRQ |
| 26 | (on 83xx this is expected to be identical to | 25 | (on 83xx this is expected to be identical to |
| 27 | the interrupts property of the parent node) | 26 | the interrupts property of the parent node) |
| 28 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 29 | 27 | ||
| 30 | Example: | 28 | Example: |
| 31 | dma@82a8 { | 29 | dma@82a8 { |
| @@ -88,7 +86,6 @@ Required properties: · 56 unmodified lines | |||
| 88 | - cell-index : DMA channel index starts at 0. | 86 | - cell-index : DMA channel index starts at 0. |
| 89 | - reg : DMA channel specific registers | 87 | - reg : DMA channel specific registers |
| 90 | - interrupts : interrupt specifier for DMA channel IRQ | 88 | - interrupts : interrupt specifier for DMA channel IRQ |
| 91 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 92 | 89 | ||
| 93 | Example: | 90 | Example: |
| 94 | dma@21300 { | 91 | dma@21300 { |
| @@ -146,7 +143,6 @@ Required properties: · 51 unmodified lines | |||
| 146 | - compatible : must include "fsl,eloplus-dma-channel" | 143 | - compatible : must include "fsl,eloplus-dma-channel" |
| 147 | - reg : DMA channel specific registers | 144 | - reg : DMA channel specific registers |
| 148 | - interrupts : interrupt specifier for DMA channel IRQ | 145 | - interrupts : interrupt specifier for DMA channel IRQ |
| 149 | - interrupt-parent : optional, if needed for interrupt mapping | ||
| 150 | 146 | ||
| 151 | Example: | 147 | Example: |
| 152 | dma@100300 { | 148 | dma@100300 { |
| @@ -57,8 +57,4 @@ PROPERTIES · 56 unmodified lines | |||
| 57 | Usage: required | 57 | Usage: required |
| 58 | Value type: <prop-encoded-array> | 58 | Value type: <prop-encoded-array> |
| 59 | 59 | ||
| 60 | - interrupt-parent | ||
| 61 | Usage: required | ||
| 62 | Value type: <phandle> | ||
| 63 | |||
| 64 | ===================================================================== | 60 | ===================================================================== |
| @@ -57,8 +57,4 @@ PROPERTIES · 56 unmodified lines | |||
| 57 | Usage: required | 57 | Usage: required |
| 58 | Value type: <prop-encoded-array> | 58 | Value type: <prop-encoded-array> |
| 59 | 59 | ||
| 60 | - interrupt-parent | ||
| 61 | Usage: required | ||
| 62 | Value type: <phandle> | ||
| 63 | |||
| 64 | ===================================================================== | 60 | ===================================================================== |
| @@ -18,8 +18,6 @@ Required properties : · 17 unmodified lines | |||
| 18 | - interrupts : <a b> where a is the interrupt number of the | 18 | - interrupts : <a b> where a is the interrupt number of the |
| 19 | PSC FIFO Controller and b is a field that represents an | 19 | PSC FIFO Controller and b is a field that represents an |
| 20 | encoding of the sense and level information for the interrupt. | 20 | encoding of the sense and level information for the interrupt. |
| 21 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 22 | services interrupts for this device. | ||
| 23 | 21 | ||
| 24 | Recommended properties : | 22 | Recommended properties : |
| 25 | - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) | 23 | - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) |
| @@ -45,8 +43,6 @@ Required properties : · 19 unmodified lines | |||
| 45 | - interrupts : <a b> where a is the interrupt number of the | 43 | - interrupts : <a b> where a is the interrupt number of the |
| 46 | PSC FIFO Controller and b is a field that represents an | 44 | PSC FIFO Controller and b is a field that represents an |
| 47 | encoding of the sense and level information for the interrupt. | 45 | encoding of the sense and level information for the interrupt. |
| 48 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 49 | services interrupts for this device. | ||
| 50 | 46 | ||
| 51 | Recommended properties : | 47 | Recommended properties : |
| 52 | - clocks : specifies the clock needed to operate the fifo controller | 48 | - clocks : specifies the clock needed to operate the fifo controller |
| @@ -21,11 +21,6 @@ Required properties: · 20 unmodified lines | |||
| 21 | be set as edge sensitive. If msi-available-ranges is present, only | 21 | be set as edge sensitive. If msi-available-ranges is present, only |
| 22 | the interrupts that correspond to available ranges shall be present. | 22 | the interrupts that correspond to available ranges shall be present. |
| 23 | 23 | ||
| 24 | - interrupt-parent: the phandle for the interrupt controller | ||
| 25 | that services interrupts for this device. for 83xx cpu, the interrupts | ||
| 26 | are routed to IPIC, and for 85xx/86xx cpu the interrupts are routed | ||
| 27 | to MPIC. | ||
| 28 | |||
| 29 | Optional properties: | 24 | Optional properties: |
| 30 | - msi-available-ranges: use <start count> style section to define which | 25 | - msi-available-ranges: use <start count> style section to define which |
| 31 | msi interrupt can be used in the 256 msi interrupts. This property is | 26 | msi interrupt can be used in the 256 msi interrupts. This property is |
| @@ -32,8 +32,6 @@ Optional properties: · 31 unmodified lines | |||
| 32 | A standard property. It represents the CCSR registers of | 32 | A standard property. It represents the CCSR registers of |
| 33 | all child PAMUs combined. Include it to provide support | 33 | all child PAMUs combined. Include it to provide support |
| 34 | for legacy drivers. | 34 | for legacy drivers. |
| 35 | - interrupt-parent : <phandle> | ||
| 36 | Phandle to interrupt controller | ||
| 37 | - fsl,portid-mapping : <u32> | 35 | - fsl,portid-mapping : <u32> |
| 38 | The Coherency Subdomain ID Port Mapping Registers and | 36 | The Coherency Subdomain ID Port Mapping Registers and |
| 39 | Snoop ID Port Mapping registers, which are part of the | 37 | Snoop ID Port Mapping registers, which are part of the |
| @@ -148,7 +148,6 @@ Nintendo Wii device tree · 147 unmodified lines | |||
| 148 | - reg : should contain the controller registers location and length | 148 | - reg : should contain the controller registers location and length |
| 149 | - interrupt-controller | 149 | - interrupt-controller |
| 150 | - interrupts : should contain the cascade interrupt of the "flipper" pic | 150 | - interrupts : should contain the cascade interrupt of the "flipper" pic |
| 151 | - interrupt-parent: should contain the phandle of the "flipper" pic | ||
| 152 | 151 | ||
| 153 | 1.l) The General Purpose I/O (GPIO) controller node | 152 | 1.l) The General Purpose I/O (GPIO) controller node |
| 154 | 153 | ||
| @@ -2,7 +2,8 @@ · 1 unmodified line | |||
| 2 | 2 | ||
| 3 | General Properties: | 3 | General Properties: |
| 4 | 4 | ||
| 5 | - compatible Should be "fsl,etsec-ptp" | 5 | - compatible Should be "fsl,etsec-ptp" for eTSEC |
| 6 | Should be "fsl,fman-ptp-timer" for DPAA FMan | ||
| 6 | - reg Offset and length of the register set for the device | 7 | - reg Offset and length of the register set for the device |
| 7 | - interrupts There should be at least two interrupts. Some devices | 8 | - interrupts There should be at least two interrupts. Some devices |
| 8 | have as many as four PTP related interrupts. | 9 | have as many as four PTP related interrupts. |
| @@ -43,14 +44,22 @@ Clock Properties: · 34 unmodified lines | |||
| 43 | value, which will be directly written in those bits, that is why, | 44 | value, which will be directly written in those bits, that is why, |
| 44 | according to reference manual, the next clock sources can be used: | 45 | according to reference manual, the next clock sources can be used: |
| 45 | 46 | ||
| 47 | For eTSEC, | ||
| 46 | <0> - external high precision timer reference clock (TSEC_TMR_CLK | 48 | <0> - external high precision timer reference clock (TSEC_TMR_CLK |
| 47 | input is used for this purpose); | 49 | input is used for this purpose); |
| 48 | <1> - eTSEC system clock; | 50 | <1> - eTSEC system clock; |
| 49 | <2> - eTSEC1 transmit clock; | 51 | <2> - eTSEC1 transmit clock; |
| 50 | <3> - RTC clock input. | 52 | <3> - RTC clock input. |
| 51 | 53 | ||
| 52 | When this attribute is not used, eTSEC system clock will serve as | 54 | For DPAA FMan, |
| 53 | IEEE 1588 timer reference clock. | 55 | <0> - external high precision timer reference clock (TMR_1588_CLK) |
| 56 | <1> - MAC system clock (1/2 FMan clock) | ||
| 57 | <2> - reserved | ||
| 58 | <3> - RTC clock oscillator | ||
| 59 | |||
| 60 | When this attribute is not used, the IEEE 1588 timer reference clock | ||
| 61 | will use the eTSEC system clock (for Gianfar) or the MAC system | ||
| 62 | clock (for DPAA). | ||
| 54 | 63 | ||
| 55 | Example: | 64 | Example: |
| 56 | 65 | ||
| @@ -16,7 +16,10 @@ modes in device tree. · 15 unmodified lines | |||
| 16 | 16 | ||
| 17 | 17 | ||
| 18 | Required properties: | 18 | Required properties: |
| 19 | - compatible: Should be "fsl,vf610-ftm-pwm". | 19 | - compatible : should be "fsl,<soc>-ftm-pwm" and one of the following |
| 20 | compatible strings: | ||
| 21 | - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610 | ||
| 22 | - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM | ||
| 20 | - reg: Physical base address and length of the controller's registers | 23 | - reg: Physical base address and length of the controller's registers |
| 21 | - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of | 24 | - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of |
| 22 | the cells format. | 25 | the cells format. |
| @@ -5,11 +5,13 @@ Required properties: · 4 unmodified lines | |||
| 5 | - "mediatek,mt2712-pwm": found on mt2712 SoC. | 5 | - "mediatek,mt2712-pwm": found on mt2712 SoC. |
| 6 | - "mediatek,mt7622-pwm": found on mt7622 SoC. | 6 | - "mediatek,mt7622-pwm": found on mt7622 SoC. |
| 7 | - "mediatek,mt7623-pwm": found on mt7623 SoC. | 7 | - "mediatek,mt7623-pwm": found on mt7623 SoC. |
| 8 | - "mediatek,mt7628-pwm": found on mt7628 SoC. | ||
| 8 | - reg: physical base address and length of the controller's registers. | 9 | - reg: physical base address and length of the controller's registers. |
| 9 | - #pwm-cells: must be 2. See pwm.txt in this directory for a description of | 10 | - #pwm-cells: must be 2. See pwm.txt in this directory for a description of |
| 10 | the cell format. | 11 | the cell format. |
| 11 | - clocks: phandle and clock specifier of the PWM reference clock. | 12 | - clocks: phandle and clock specifier of the PWM reference clock. |
| 12 | - clock-names: must contain the following: | 13 | - clock-names: must contain the following, except for MT7628 which |
| 14 | has no clocks | ||
| 13 | - "top": the top clock generator | 15 | - "top": the top clock generator |
| 14 | - "main": clock used by the PWM core | 16 | - "main": clock used by the PWM core |
| 15 | - "pwm1-8": the eight per PWM clocks for mt2712 | 17 | - "pwm1-8": the eight per PWM clocks for mt2712 |
| @@ -12,6 +12,7 @@ Required Properties: · 11 unmodified lines | |||
| 12 | - "renesas,pwm-r8a7795": for R-Car H3 | 12 | - "renesas,pwm-r8a7795": for R-Car H3 |
| 13 | - "renesas,pwm-r8a7796": for R-Car M3-W | 13 | - "renesas,pwm-r8a7796": for R-Car M3-W |
| 14 | - "renesas,pwm-r8a77965": for R-Car M3-N | 14 | - "renesas,pwm-r8a77965": for R-Car M3-N |
| 15 | - "renesas,pwm-r8a77990": for R-Car E3 | ||
| 15 | - "renesas,pwm-r8a77995": for R-Car D3 | 16 | - "renesas,pwm-r8a77995": for R-Car D3 |
| 16 | - reg: base address and length of the registers block for the PWM. | 17 | - reg: base address and length of the registers block for the PWM. |
| 17 | - #pwm-cells: should be 2. See pwm.txt in this directory for a description of | 18 | - #pwm-cells: should be 2. See pwm.txt in this directory for a description of |
| @@ -5,6 +5,7 @@ Requires node properties: · 4 unmodified lines | |||
| 5 | - "compatible" value one of: | 5 | - "compatible" value one of: |
| 6 | "motorola,cpcap-regulator" | 6 | "motorola,cpcap-regulator" |
| 7 | "motorola,mapphone-cpcap-regulator" | 7 | "motorola,mapphone-cpcap-regulator" |
| 8 | "motorola,xoom-cpcap-regulator" | ||
| 8 | 9 | ||
| 9 | Required regulator properties: | 10 | Required regulator properties: |
| 10 | - "regulator-name" | 11 | - "regulator-name" |
| @@ -32,8 +32,6 @@ Required properties: · 31 unmodified lines | |||
| 32 | 'max8997,pmic-buck[1/2/5]-dvs-voltage' should be specified. | 32 | 'max8997,pmic-buck[1/2/5]-dvs-voltage' should be specified. |
| 33 | 33 | ||
| 34 | Optional properties: | 34 | Optional properties: |
| 35 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 36 | the interrupts from max8997 are delivered to. | ||
| 37 | - interrupts: Interrupt specifiers for two interrupt sources. | 35 | - interrupts: Interrupt specifiers for two interrupt sources. |
| 38 | - First interrupt specifier is for 'irq1' interrupt. | 36 | - First interrupt specifier is for 'irq1' interrupt. |
| 39 | - Second interrupt specifier is for 'alert' interrupt. | 37 | - Second interrupt specifier is for 'alert' interrupt. |
| @@ -18,7 +18,6 @@ Required properties: · 17 unmodified lines | |||
| 18 | ti,tps659038-pmic | 18 | ti,tps659038-pmic |
| 19 | and also the generic series names | 19 | and also the generic series names |
| 20 | ti,palmas-pmic | 20 | ti,palmas-pmic |
| 21 | - interrupt-parent : The parent interrupt controller which is palmas. | ||
| 22 | - interrupts : The interrupt number and the type which can be looked up here: | 21 | - interrupts : The interrupt number and the type which can be looked up here: |
| 23 | arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h | 22 | arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h |
| 24 | - interrupts-name: The names of the individual interrupts. | 23 | - interrupts-name: The names of the individual interrupts. |
| @@ -1,9 +1,18 @@ | |||
| 1 | PFUZE100 family of regulators | 1 | PFUZE100 family of regulators |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: "fsl,pfuze100", "fsl,pfuze200", "fsl,pfuze3000" | 4 | - compatible: "fsl,pfuze100", "fsl,pfuze200", "fsl,pfuze3000", "fsl,pfuze3001" |
| 5 | - reg: I2C slave address | 5 | - reg: I2C slave address |
| 6 | 6 | ||
| 7 | Optional properties: | ||
| 8 | - fsl,pfuze-support-disable-sw: Boolean, if present disable all unused switch | ||
| 9 | regulators to save power consumption. Attention, ensure that all important | ||
| 10 | regulators (e.g. DDR ref, DDR supply) has set the "regulator-always-on" | ||
| 11 | property. If not present, the switched regualtors are always on and can't be | ||
| 12 | disabled. This binding is a workaround to keep backward compatibility with | ||
| 13 | old dtb's which rely on the fact that the switched regulators are always on | ||
| 14 | and don't mark them explicit as "regulator-always-on". | ||
| 15 | |||
| 7 | Required child node: | 16 | Required child node: |
| 8 | - regulators: This is the list of child nodes that specify the regulator | 17 | - regulators: This is the list of child nodes that specify the regulator |
| 9 | initialization data for defined regulators. Please refer to below doc | 18 | initialization data for defined regulators. Please refer to below doc |
| @@ -16,6 +25,8 @@ Required child node: · 6 unmodified lines | |||
| 16 | sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6,coin | 25 | sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6,coin |
| 17 | --PFUZE3000 | 26 | --PFUZE3000 |
| 18 | sw1a,sw1b,sw2,sw3,swbst,vsnvs,vrefddr,vldo1,vldo2,vccsd,v33,vldo3,vldo4 | 27 | sw1a,sw1b,sw2,sw3,swbst,vsnvs,vrefddr,vldo1,vldo2,vccsd,v33,vldo3,vldo4 |
| 28 | --PFUZE3001 | ||
| 29 | sw1,sw2,sw3,vsnvs,vldo1,vldo2,vccsd,v33,vldo3,vldo4 | ||
| 19 | 30 | ||
| 20 | Each regulator is defined using the standard binding for regulators. | 31 | Each regulator is defined using the standard binding for regulators. |
| 21 | 32 | ||
| @@ -303,3 +314,76 @@ Example 3: PFUZE3000 · 281 unmodified lines | |||
| 303 | }; | 314 | }; |
| 304 | }; | 315 | }; |
| 305 | }; | 316 | }; |
| 317 | |||
| 318 | Example 4: PFUZE 3001 | ||
| 319 | |||
| 320 | pfuze3001: pmic@8 { | ||
| 321 | compatible = "fsl,pfuze3001"; | ||
| 322 | reg = <0x08>; | ||
| 323 | |||
| 324 | regulators { | ||
| 325 | sw1_reg: sw1 { | ||
| 326 | regulator-min-microvolt = <700000>; | ||
| 327 | regulator-max-microvolt = <3300000>; | ||
| 328 | regulator-boot-on; | ||
| 329 | regulator-always-on; | ||
| 330 | }; | ||
| 331 | |||
| 332 | sw2_reg: sw2 { | ||
| 333 | regulator-min-microvolt = <1500000>; | ||
| 334 | regulator-max-microvolt = <3300000>; | ||
| 335 | regulator-boot-on; | ||
| 336 | regulator-always-on; | ||
| 337 | }; | ||
| 338 | |||
| 339 | sw3_reg: sw3 { | ||
| 340 | regulator-min-microvolt = <900000>; | ||
| 341 | regulator-max-microvolt = <1650000>; | ||
| 342 | regulator-boot-on; | ||
| 343 | regulator-always-on; | ||
| 344 | }; | ||
| 345 | |||
| 346 | snvs_reg: vsnvs { | ||
| 347 | regulator-min-microvolt = <1000000>; | ||
| 348 | regulator-max-microvolt = <3000000>; | ||
| 349 | regulator-boot-on; | ||
| 350 | regulator-always-on; | ||
| 351 | }; | ||
| 352 | |||
| 353 | vgen1_reg: vldo1 { | ||
| 354 | regulator-min-microvolt = <1800000>; | ||
| 355 | regulator-max-microvolt = <3300000>; | ||
| 356 | regulator-always-on; | ||
| 357 | }; | ||
| 358 | |||
| 359 | vgen2_reg: vldo2 { | ||
| 360 | regulator-min-microvolt = <800000>; | ||
| 361 | regulator-max-microvolt = <1550000>; | ||
| 362 | regulator-always-on; | ||
| 363 | }; | ||
| 364 | |||
| 365 | vgen3_reg: vccsd { | ||
| 366 | regulator-min-microvolt = <2850000>; | ||
| 367 | regulator-max-microvolt = <3300000>; | ||
| 368 | regulator-always-on; | ||
| 369 | }; | ||
| 370 | |||
| 371 | vgen4_reg: v33 { | ||
| 372 | regulator-min-microvolt = <2850000>; | ||
| 373 | regulator-max-microvolt = <3300000>; | ||
| 374 | regulator-always-on; | ||
| 375 | }; | ||
| 376 | |||
| 377 | vgen5_reg: vldo3 { | ||
| 378 | regulator-min-microvolt = <1800000>; | ||
| 379 | regulator-max-microvolt = <3300000>; | ||
| 380 | regulator-always-on; | ||
| 381 | }; | ||
| 382 | |||
| 383 | vgen6_reg: vldo4 { | ||
| 384 | regulator-min-microvolt = <1800000>; | ||
| 385 | regulator-max-microvolt = <3300000>; | ||
| 386 | regulator-always-on; | ||
| 387 | }; | ||
| 388 | }; | ||
| 389 | }; | ||
| @@ -0,0 +1,160 @@ | |||
| 1 | Qualcomm Technologies, Inc. RPMh Regulators | ||
| 2 | |||
| 3 | rpmh-regulator devices support PMIC regulator management via the Voltage | ||
| 4 | Regulator Manager (VRM) and Oscillator Buffer (XOB) RPMh accelerators. The APPS | ||
| 5 | processor communicates with these hardware blocks via a Resource State | ||
| 6 | Coordinator (RSC) using command packets. The VRM allows changing three | ||
| 7 | parameters for a given regulator: enable state, output voltage, and operating | ||
| 8 | mode. The XOB allows changing only a single parameter for a given regulator: | ||
| 9 | its enable state. Despite its name, the XOB is capable of controlling the | ||
| 10 | enable state of any PMIC peripheral. It is used for clock buffers, low-voltage | ||
| 11 | switches, and LDO/SMPS regulators which have a fixed voltage and mode. | ||
| 12 | |||
| 13 | ======================= | ||
| 14 | Required Node Structure | ||
| 15 | ======================= | ||
| 16 | |||
| 17 | RPMh regulators must be described in two levels of device nodes. The first | ||
| 18 | level describes the PMIC containing the regulators and must reside within an | ||
| 19 | RPMh device node. The second level describes each regulator within the PMIC | ||
| 20 | which is to be used on the board. Each of these regulators maps to a single | ||
| 21 | RPMh resource. | ||
| 22 | |||
| 23 | The names used for regulator nodes must match those supported by a given PMIC. | ||
| 24 | Supported regulator node names: | ||
| 25 | PM8998: smps1 - smps13, ldo1 - ldo28, lvs1 - lvs2 | ||
| 26 | PMI8998: bob | ||
| 27 | PM8005: smps1 - smps4 | ||
| 28 | |||
| 29 | ======================== | ||
| 30 | First Level Nodes - PMIC | ||
| 31 | ======================== | ||
| 32 | |||
| 33 | - compatible | ||
| 34 | Usage: required | ||
| 35 | Value type: <string> | ||
| 36 | Definition: Must be one of: "qcom,pm8998-rpmh-regulators", | ||
| 37 | "qcom,pmi8998-rpmh-regulators" or | ||
| 38 | "qcom,pm8005-rpmh-regulators". | ||
| 39 | |||
| 40 | - qcom,pmic-id | ||
| 41 | Usage: required | ||
| 42 | Value type: <string> | ||
| 43 | Definition: RPMh resource name suffix used for the regulators found on | ||
| 44 | this PMIC. Typical values: "a", "b", "c", "d", "e", "f". | ||
| 45 | |||
| 46 | - vdd-s1-supply | ||
| 47 | - vdd-s2-supply | ||
| 48 | - vdd-s3-supply | ||
| 49 | - vdd-s4-supply | ||
| 50 | Usage: optional (PM8998 and PM8005 only) | ||
| 51 | Value type: <phandle> | ||
| 52 | Definition: phandle of the parent supply regulator of one or more of the | ||
| 53 | regulators for this PMIC. | ||
| 54 | |||
| 55 | - vdd-s5-supply | ||
| 56 | - vdd-s6-supply | ||
| 57 | - vdd-s7-supply | ||
| 58 | - vdd-s8-supply | ||
| 59 | - vdd-s9-supply | ||
| 60 | - vdd-s10-supply | ||
| 61 | - vdd-s11-supply | ||
| 62 | - vdd-s12-supply | ||
| 63 | - vdd-s13-supply | ||
| 64 | - vdd-l1-l27-supply | ||
| 65 | - vdd-l2-l8-l17-supply | ||
| 66 | - vdd-l3-l11-supply | ||
| 67 | - vdd-l4-l5-supply | ||
| 68 | - vdd-l6-supply | ||
| 69 | - vdd-l7-l12-l14-l15-supply | ||
| 70 | - vdd-l9-supply | ||
| 71 | - vdd-l10-l23-l25-supply | ||
| 72 | - vdd-l13-l19-l21-supply | ||
| 73 | - vdd-l16-l28-supply | ||
| 74 | - vdd-l18-l22-supply | ||
| 75 | - vdd-l20-l24-supply | ||
| 76 | - vdd-l26-supply | ||
| 77 | - vin-lvs-1-2-supply | ||
| 78 | Usage: optional (PM8998 only) | ||
| 79 | Value type: <phandle> | ||
| 80 | Definition: phandle of the parent supply regulator of one or more of the | ||
| 81 | regulators for this PMIC. | ||
| 82 | |||
| 83 | - vdd-bob-supply | ||
| 84 | Usage: optional (PMI8998 only) | ||
| 85 | Value type: <phandle> | ||
| 86 | Definition: BOB regulator parent supply phandle | ||
| 87 | |||
| 88 | =============================== | ||
| 89 | Second Level Nodes - Regulators | ||
| 90 | =============================== | ||
| 91 | |||
| 92 | - qcom,always-wait-for-ack | ||
| 93 | Usage: optional | ||
| 94 | Value type: <empty> | ||
| 95 | Definition: Boolean flag which indicates that the application processor | ||
| 96 | must wait for an ACK or a NACK from RPMh for every request | ||
| 97 | sent for this regulator including those which are for a | ||
| 98 | strictly lower power state. | ||
| 99 | |||
| 100 | Other properties defined in Documentation/devicetree/bindings/regulator.txt | ||
| 101 | may also be used. regulator-initial-mode and regulator-allowed-modes may be | ||
| 102 | specified for VRM regulators using mode values from | ||
| 103 | include/dt-bindings/regulator/qcom,rpmh-regulator.h. regulator-allow-bypass | ||
| 104 | may be specified for BOB type regulators managed via VRM. | ||
| 105 | regulator-allow-set-load may be specified for LDO type regulators managed via | ||
| 106 | VRM. | ||
| 107 | |||
| 108 | ======== | ||
| 109 | Examples | ||
| 110 | ======== | ||
| 111 | |||
| 112 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> | ||
| 113 | |||
| 114 | &apps_rsc { | ||
| 115 | pm8998-rpmh-regulators { | ||
| 116 | compatible = "qcom,pm8998-rpmh-regulators"; | ||
| 117 | qcom,pmic-id = "a"; | ||
| 118 | |||
| 119 | vdd-l7-l12-l14-l15-supply = <&pm8998_s5>; | ||
| 120 | |||
| 121 | smps2 { | ||
| 122 | regulator-min-microvolt = <1100000>; | ||
| 123 | regulator-max-microvolt = <1100000>; | ||
| 124 | }; | ||
| 125 | |||
| 126 | pm8998_s5: smps5 { | ||
| 127 | regulator-min-microvolt = <1904000>; | ||
| 128 | regulator-max-microvolt = <2040000>; | ||
| 129 | }; | ||
| 130 | |||
| 131 | ldo7 { | ||
| 132 | regulator-min-microvolt = <1800000>; | ||
| 133 | regulator-max-microvolt = <1800000>; | ||
| 134 | regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; | ||
| 135 | regulator-allowed-modes = | ||
| 136 | <RPMH_REGULATOR_MODE_LPM | ||
| 137 | RPMH_REGULATOR_MODE_HPM>; | ||
| 138 | regulator-allow-set-load; | ||
| 139 | }; | ||
| 140 | |||
| 141 | lvs1 { | ||
| 142 | regulator-min-microvolt = <1800000>; | ||
| 143 | regulator-max-microvolt = <1800000>; | ||
| 144 | }; | ||
| 145 | }; | ||
| 146 | |||
| 147 | pmi8998-rpmh-regulators { | ||
| 148 | compatible = "qcom,pmi8998-rpmh-regulators"; | ||
| 149 | qcom,pmic-id = "b"; | ||
| 150 | |||
| 151 | bob { | ||
| 152 | regulator-min-microvolt = <3312000>; | ||
| 153 | regulator-max-microvolt = <3600000>; | ||
| 154 | regulator-allowed-modes = | ||
| 155 | <RPMH_REGULATOR_MODE_AUTO | ||
| 156 | RPMH_REGULATOR_MODE_HPM>; | ||
| 157 | regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; | ||
| 158 | }; | ||
| 159 | }; | ||
| 160 | }; | ||
| @@ -1,13 +1,5 @@ | |||
| 1 | ROHM BD71837 Power Management Integrated Circuit (PMIC) regulator bindings | 1 | ROHM BD71837 Power Management Integrated Circuit (PMIC) regulator bindings |
| 2 | 2 | ||
| 3 | BD71837MWV is a programmable Power Management | ||
| 4 | IC (PMIC) for powering single-core, dual-core, and | ||
| 5 | quad-core SoC’s such as NXP-i.MX 8M. It is optimized | ||
| 6 | for low BOM cost and compact solution footprint. It | ||
| 7 | integrates 8 Buck regulators and 7 LDO’s to provide all | ||
| 8 | the power rails required by the SoC and the commonly | ||
| 9 | used peripherals. | ||
| 10 | |||
| 11 | Required properties: | 3 | Required properties: |
| 12 | - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ..., "ldo7" | 4 | - regulator-name: should be "buck1", ..., "buck8" and "ldo1", ..., "ldo7" |
| 13 | 5 | ||
| @@ -16,7 +16,7 @@ Required properties: · 15 unmodified lines | |||
| 16 | Optional properties: | 16 | Optional properties: |
| 17 | - ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3. | 17 | - ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3. |
| 18 | If DCDCs are externally controlled then this property should be there. | 18 | If DCDCs are externally controlled then this property should be there. |
| 19 | - "dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3. | 19 | - dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3. |
| 20 | If DCDCs are externally controlled and if it is from GPIO then GPIO | 20 | If DCDCs are externally controlled and if it is from GPIO then GPIO |
| 21 | number should be provided. If it is externally controlled and no GPIO | 21 | number should be provided. If it is externally controlled and no GPIO |
| 22 | entry then driver will just configure this rails as external control | 22 | entry then driver will just configure this rails as external control |
| @@ -0,0 +1,57 @@ | |||
| 1 | Socionext UniPhier Regulator Controller | ||
| 2 | |||
| 3 | This describes the devicetree bindings for regulator controller implemented | ||
| 4 | on Socionext UniPhier SoCs. | ||
| 5 | |||
| 6 | USB3 Controller | ||
| 7 | --------------- | ||
| 8 | |||
| 9 | This regulator controls VBUS and belongs to USB3 glue layer. Before using | ||
| 10 | the regulator, it is necessary to control the clocks and resets to enable | ||
| 11 | this layer. These clocks and resets should be described in each property. | ||
| 12 | |||
| 13 | Required properties: | ||
| 14 | - compatible: Should be | ||
| 15 | "socionext,uniphier-pro4-usb3-regulator" - for Pro4 SoC | ||
| 16 | "socionext,uniphier-pxs2-usb3-regulator" - for PXs2 SoC | ||
| 17 | "socionext,uniphier-ld20-usb3-regulator" - for LD20 SoC | ||
| 18 | "socionext,uniphier-pxs3-usb3-regulator" - for PXs3 SoC | ||
| 19 | - reg: Specifies offset and length of the register set for the device. | ||
| 20 | - clocks: A list of phandles to the clock gate for USB3 glue layer. | ||
| 21 | According to the clock-names, appropriate clocks are required. | ||
| 22 | - clock-names: Should contain | ||
| 23 | "gio", "link" - for Pro4 SoC | ||
| 24 | "link" - for others | ||
| 25 | - resets: A list of phandles to the reset control for USB3 glue layer. | ||
| 26 | According to the reset-names, appropriate resets are required. | ||
| 27 | - reset-names: Should contain | ||
| 28 | "gio", "link" - for Pro4 SoC | ||
| 29 | "link" - for others | ||
| 30 | |||
| 31 | See Documentation/devicetree/bindings/regulator/regulator.txt | ||
| 32 | for more details about the regulator properties. | ||
| 33 | |||
| 34 | Example: | ||
| 35 | |||
| 36 | usb-glue@65b00000 { | ||
| 37 | compatible = "socionext,uniphier-ld20-dwc3-glue", | ||
| 38 | "simple-mfd"; | ||
| 39 | #address-cells = <1>; | ||
| 40 | #size-cells = <1>; | ||
| 41 | ranges = <0 0x65b00000 0x400>; | ||
| 42 | |||
| 43 | usb_vbus0: regulators@100 { | ||
| 44 | compatible = "socionext,uniphier-ld20-usb3-regulator"; | ||
| 45 | reg = <0x100 0x10>; | ||
| 46 | clock-names = "link"; | ||
| 47 | clocks = <&sys_clk 14>; | ||
| 48 | reset-names = "link"; | ||
| 49 | resets = <&sys_rst 14>; | ||
| 50 | }; | ||
| 51 | |||
| 52 | phy { | ||
| 53 | ... | ||
| 54 | phy-supply = <&usb_vbus0>; | ||
| 55 | }; | ||
| 56 | ... | ||
| 57 | }; | ||
| @@ -8,6 +8,7 @@ on the Qualcomm Hexagon core. · 7 unmodified lines | |||
| 8 | Value type: <string> | 8 | Value type: <string> |
| 9 | Definition: must be one of: | 9 | Definition: must be one of: |
| 10 | "qcom,q6v5-pil", | 10 | "qcom,q6v5-pil", |
| 11 | "qcom,ipq8074-wcss-pil" | ||
| 11 | "qcom,msm8916-mss-pil", | 12 | "qcom,msm8916-mss-pil", |
| 12 | "qcom,msm8974-mss-pil" | 13 | "qcom,msm8974-mss-pil" |
| 13 | "qcom,msm8996-mss-pil" | 14 | "qcom,msm8996-mss-pil" |
| @@ -50,11 +51,15 @@ on the Qualcomm Hexagon core. · 36 unmodified lines | |||
| 50 | Usage: required | 51 | Usage: required |
| 51 | Value type: <phandle> | 52 | Value type: <phandle> |
| 52 | Definition: reference to the reset-controller for the modem sub-system | 53 | Definition: reference to the reset-controller for the modem sub-system |
| 54 | reference to the list of 3 reset-controllers for the | ||
| 55 | wcss sub-system | ||
| 53 | 56 | ||
| 54 | - reset-names: | 57 | - reset-names: |
| 55 | Usage: required | 58 | Usage: required |
| 56 | Value type: <stringlist> | 59 | Value type: <stringlist> |
| 57 | Definition: must be "mss_restart" | 60 | Definition: must be "mss_restart" for the modem sub-system |
| 61 | Definition: must be "wcss_aon_reset", "wcss_reset", "wcss_q6_reset" | ||
| 62 | for the wcss syb-system | ||
| 58 | 63 | ||
| 59 | - cx-supply: | 64 | - cx-supply: |
| 60 | - mss-supply: | 65 | - mss-supply: |
| @@ -45,12 +45,6 @@ The following are the mandatory properties: · 44 unmodified lines | |||
| 45 | per the bindings in | 45 | per the bindings in |
| 46 | Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt | 46 | Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt |
| 47 | 47 | ||
| 48 | Optional properties: | ||
| 49 | -------------------- | ||
| 50 | - interrupt-parent: phandle to the interrupt controller node. This property | ||
| 51 | is needed if the device node hierarchy doesn't have an | ||
| 52 | interrupt controller. | ||
| 53 | |||
| 54 | 48 | ||
| 55 | Example: | 49 | Example: |
| 56 | -------- | 50 | -------- |
| @@ -51,12 +51,6 @@ The following are the mandatory properties: · 50 unmodified lines | |||
| 51 | Documentation/devicetree/bindings/reset/ti,sci-reset.txt | 51 | Documentation/devicetree/bindings/reset/ti,sci-reset.txt |
| 52 | for 66AK2G SoCs | 52 | for 66AK2G SoCs |
| 53 | 53 | ||
| 54 | - interrupt-parent: Should contain a phandle to the Keystone 2 IRQ controller | ||
| 55 | IP node that is used by the ARM CorePac processor to | ||
| 56 | receive interrupts from the DSP remote processors. See | ||
| 57 | Documentation/devicetree/bindings/interrupt-controller/ti,keystone-irq.txt | ||
| 58 | for details. | ||
| 59 | |||
| 60 | - interrupts: Should contain an entry for each value in 'interrupt-names'. | 54 | - interrupts: Should contain an entry for each value in 'interrupt-names'. |
| 61 | Each entry should have the interrupt source number used by | 55 | Each entry should have the interrupt source number used by |
| 62 | the remote processor to the host processor. The values should | 56 | the remote processor to the host processor. The values should |
| @@ -49,7 +49,7 @@ compatible (optional) - standard definition · 48 unmodified lines | |||
| 49 | - may contain the following strings: | 49 | - may contain the following strings: |
| 50 | - shared-dma-pool: This indicates a region of memory meant to be | 50 | - shared-dma-pool: This indicates a region of memory meant to be |
| 51 | used as a shared pool of DMA buffers for a set of devices. It can | 51 | used as a shared pool of DMA buffers for a set of devices. It can |
| 52 | be used by an operating system to instanciate the necessary pool | 52 | be used by an operating system to instantiate the necessary pool |
| 53 | management subsystem if necessary. | 53 | management subsystem if necessary. |
| 54 | - vendor specific string in the form <vendor>,[<device>-]<usage> | 54 | - vendor specific string in the form <vendor>,[<device>-]<usage> |
| 55 | no-map (optional) - empty property | 55 | no-map (optional) - empty property |
| @@ -0,0 +1,21 @@ | |||
| 1 | * Amlogic audio memory arbiter controller | ||
| 2 | |||
| 3 | The Amlogic Audio ARB is a simple device which enables or | ||
| 4 | disables the access of Audio FIFOs to DDR on AXG based SoC. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible: 'amlogic,meson-axg-audio-arb' | ||
| 8 | - reg: physical base address of the controller and length of memory | ||
| 9 | mapped region. | ||
| 10 | - clocks: phandle to the fifo peripheral clock provided by the audio | ||
| 11 | clock controller. | ||
| 12 | - #reset-cells: must be 1. | ||
| 13 | |||
| 14 | Example on the A113 SoC: | ||
| 15 | |||
| 16 | arb: reset-controller@280 { | ||
| 17 | compatible = "amlogic,meson-axg-audio-arb"; | ||
| 18 | reg = <0x0 0x280 0x0 0x4>; | ||
| 19 | #reset-cells = <1>; | ||
| 20 | clocks = <&clkc_audio AUD_CLKID_DDR_ARB>; | ||
| 21 | }; | ||
| @@ -0,0 +1,52 @@ | |||
| 1 | Qualcomm AOSS Reset Controller | ||
| 2 | ====================================== | ||
| 3 | |||
| 4 | This binding describes a reset-controller found on AOSS-CC (always on subsystem) | ||
| 5 | for Qualcomm SDM845 SoCs. | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - compatible: | ||
| 9 | Usage: required | ||
| 10 | Value type: <string> | ||
| 11 | Definition: must be: | ||
| 12 | "qcom,sdm845-aoss-cc" | ||
| 13 | |||
| 14 | - reg: | ||
| 15 | Usage: required | ||
| 16 | Value type: <prop-encoded-array> | ||
| 17 | Definition: must specify the base address and size of the register | ||
| 18 | space. | ||
| 19 | |||
| 20 | - #reset-cells: | ||
| 21 | Usage: required | ||
| 22 | Value type: <uint> | ||
| 23 | Definition: must be 1; cell entry represents the reset index. | ||
| 24 | |||
| 25 | Example: | ||
| 26 | |||
| 27 | aoss_reset: reset-controller@c2a0000 { | ||
| 28 | compatible = "qcom,sdm845-aoss-cc"; | ||
| 29 | reg = <0xc2a0000 0x31000>; | ||
| 30 | #reset-cells = <1>; | ||
| 31 | }; | ||
| 32 | |||
| 33 | Specifying reset lines connected to IP modules | ||
| 34 | ============================================== | ||
| 35 | |||
| 36 | Device nodes that need access to reset lines should | ||
| 37 | specify them as a reset phandle in their corresponding node as | ||
| 38 | specified in reset.txt. | ||
| 39 | |||
| 40 | For list of all valid reset indicies see | ||
| 41 | <dt-bindings/reset/qcom,sdm845-aoss.h> | ||
| 42 | |||
| 43 | Example: | ||
| 44 | |||
| 45 | modem-pil@4080000 { | ||
| 46 | ... | ||
| 47 | |||
| 48 | resets = <&aoss_reset AOSS_CC_MSS_RESTART>; | ||
| 49 | reset-names = "mss_restart"; | ||
| 50 | |||
| 51 | ... | ||
| 52 | }; | ||
| @@ -15,7 +15,7 @@ Please refer to reset.txt in this directory for common reset · 14 unmodified lines | |||
| 15 | controller binding usage. | 15 | controller binding usage. |
| 16 | 16 | ||
| 17 | Required properties: | 17 | Required properties: |
| 18 | - compatible: Should be st,stih407-softreset"; | 18 | - compatible: Should be "st,stih407-softreset"; |
| 19 | - #reset-cells: 1, see below | 19 | - #reset-cells: 1, see below |
| 20 | 20 | ||
| 21 | example: | 21 | example: |
| @@ -118,3 +118,59 @@ Example: · 117 unmodified lines | |||
| 118 | 118 | ||
| 119 | other nodes ... | 119 | other nodes ... |
| 120 | }; | 120 | }; |
| 121 | |||
| 122 | |||
| 123 | USB3 core reset | ||
| 124 | --------------- | ||
| 125 | |||
| 126 | USB3 core reset belongs to USB3 glue layer. Before using the core reset, | ||
| 127 | it is necessary to control the clocks and resets to enable this layer. | ||
| 128 | These clocks and resets should be described in each property. | ||
| 129 | |||
| 130 | Required properties: | ||
| 131 | - compatible: Should be | ||
| 132 | "socionext,uniphier-pro4-usb3-reset" - for Pro4 SoC | ||
| 133 | "socionext,uniphier-pxs2-usb3-reset" - for PXs2 SoC | ||
| 134 | "socionext,uniphier-ld20-usb3-reset" - for LD20 SoC | ||
| 135 | "socionext,uniphier-pxs3-usb3-reset" - for PXs3 SoC | ||
| 136 | - #reset-cells: Should be 1. | ||
| 137 | - reg: Specifies offset and length of the register set for the device. | ||
| 138 | - clocks: A list of phandles to the clock gate for USB3 glue layer. | ||
| 139 | According to the clock-names, appropriate clocks are required. | ||
| 140 | - clock-names: Should contain | ||
| 141 | "gio", "link" - for Pro4 SoC | ||
| 142 | "link" - for others | ||
| 143 | - resets: A list of phandles to the reset control for USB3 glue layer. | ||
| 144 | According to the reset-names, appropriate resets are required. | ||
| 145 | - reset-names: Should contain | ||
| 146 | "gio", "link" - for Pro4 SoC | ||
| 147 | "link" - for others | ||
| 148 | |||
| 149 | Example: | ||
| 150 | |||
| 151 | usb-glue@65b00000 { | ||
| 152 | compatible = "socionext,uniphier-ld20-dwc3-glue", | ||
| 153 | "simple-mfd"; | ||
| 154 | #address-cells = <1>; | ||
| 155 | #size-cells = <1>; | ||
| 156 | ranges = <0 0x65b00000 0x400>; | ||
| 157 | |||
| 158 | usb_rst: reset@0 { | ||
| 159 | compatible = "socionext,uniphier-ld20-usb3-reset"; | ||
| 160 | reg = <0x0 0x4>; | ||
| 161 | #reset-cells = <1>; | ||
| 162 | clock-names = "link"; | ||
| 163 | clocks = <&sys_clk 14>; | ||
| 164 | reset-names = "link"; | ||
| 165 | resets = <&sys_rst 14>; | ||
| 166 | }; | ||
| 167 | |||
| 168 | regulator { | ||
| 169 | ... | ||
| 170 | }; | ||
| 171 | |||
| 172 | phy { | ||
| 173 | ... | ||
| 174 | }; | ||
| 175 | ... | ||
| 176 | }; | ||
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - compatible : should contain "brcm,brcmstb-waketimer" | 7 | - compatible : should contain "brcm,brcmstb-waketimer" |
| 8 | - reg : the register start and length for the WKTMR block | 8 | - reg : the register start and length for the WKTMR block |
| 9 | - interrupts : The TIMER interrupt | 9 | - interrupts : The TIMER interrupt |
| 10 | - interrupt-parent: The phandle to the Always-On (AON) Power Management (PM) L2 | ||
| 11 | interrupt controller node | ||
| 12 | - clocks : The phandle to the UPG fixed clock (27Mhz domain) | 10 | - clocks : The phandle to the UPG fixed clock (27Mhz domain) |
| 13 | 11 | ||
| 14 | Example: | 12 | Example: |
| @@ -25,9 +25,6 @@ Optional properties: · 24 unmodified lines | |||
| 25 | - "wakeup-source": mark the chip as a wakeup source, independently of | 25 | - "wakeup-source": mark the chip as a wakeup source, independently of |
| 26 | the availability of an IRQ line connected to the SoC. | 26 | the availability of an IRQ line connected to the SoC. |
| 27 | 27 | ||
| 28 | - "interrupt-parent", "interrupts": for passing the interrupt line | ||
| 29 | of the SoC connected to IRQ#2 of the RTC chip. | ||
| 30 | |||
| 31 | 28 | ||
| 32 | Example isl12057 node without IRQ#2 pin connected (no alarm support): | 29 | Example isl12057 node without IRQ#2 pin connected (no alarm support): |
| 33 | 30 | ||
| @@ -0,0 +1,29 @@ | |||
| 1 | Intersil ISL1219 I2C RTC/Alarm chip with event in | ||
| 2 | |||
| 3 | ISL1219 has additional pins EVIN and #EVDET for tamper detection. | ||
| 4 | |||
| 5 | Required properties supported by the device: | ||
| 6 | |||
| 7 | - "compatible": must be "isil,isl1219" | ||
| 8 | - "reg": I2C bus address of the device | ||
| 9 | |||
| 10 | Optional properties: | ||
| 11 | |||
| 12 | - "interrupt-names": list which may contains "irq" and "evdet" | ||
| 13 | - "interrupts": list of interrupts for "irq" and "evdet" | ||
| 14 | - "isil,ev-evienb": if present EV.EVIENB bit is set to the specified | ||
| 15 | value for proper operation. | ||
| 16 | |||
| 17 | |||
| 18 | Example isl1219 node with #IRQ pin connected to SoC gpio1 pin12 | ||
| 19 | and #EVDET pin connected to SoC gpio2 pin 24: | ||
| 20 | |||
| 21 | isl1219: rtc@68 { | ||
| 22 | compatible = "isil,isl1219"; | ||
| 23 | reg = <0x68>; | ||
| 24 | interrupt-names = "irq", "evdet"; | ||
| 25 | interrupts-extended = <&gpio1 12 IRQ_TYPE_EDGE_FALLING>, | ||
| 26 | <&gpio2 24 IRQ_TYPE_EDGE_FALLING>; | ||
| 27 | isil,ev-evienb = <1>; | ||
| 28 | }; | ||
| 29 | |||
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | Optional properties: | 8 | Optional properties: |
| 9 | - interrupts : should contain interrupt. | 9 | - interrupts : should contain interrupt. |
| 10 | - interrupt-parent : interrupt source phandle. | ||
| 11 | - ctrl-reg : Contains the initial value of the control register also | 10 | - ctrl-reg : Contains the initial value of the control register also |
| 12 | called "Register B". | 11 | called "Register B". |
| 13 | - freq-reg : Contains the initial value of the frequency register also | 12 | - freq-reg : Contains the initial value of the frequency register also |
| @@ -13,6 +13,7 @@ Required properties: · 12 unmodified lines | |||
| 13 | "maxim,ds3231", | 13 | "maxim,ds3231", |
| 14 | "st,m41t0", | 14 | "st,m41t0", |
| 15 | "st,m41t00", | 15 | "st,m41t00", |
| 16 | "st,m41t11", | ||
| 16 | "microchip,mcp7940x", | 17 | "microchip,mcp7940x", |
| 17 | "microchip,mcp7941x", | 18 | "microchip,mcp7941x", |
| 18 | "pericom,pt7c4338", | 19 | "pericom,pt7c4338", |
| @@ -21,7 +22,6 @@ Required properties: · 2 unmodified lines | |||
| 21 | - reg: I2C bus address of the device | 22 | - reg: I2C bus address of the device |
| 22 | 23 | ||
| 23 | Optional properties: | 24 | Optional properties: |
| 24 | - interrupt-parent: phandle for the interrupt controller. | ||
| 25 | - interrupts: rtc alarm interrupt. | 25 | - interrupts: rtc alarm interrupt. |
| 26 | - clock-output-names: From common clock binding to override the default output | 26 | - clock-output-names: From common clock binding to override the default output |
| 27 | clock name | 27 | clock name |
| @@ -16,7 +16,6 @@ Required properties: · 15 unmodified lines | |||
| 16 | - reg: I2C bus address of the device | 16 | - reg: I2C bus address of the device |
| 17 | 17 | ||
| 18 | Optional properties: | 18 | Optional properties: |
| 19 | - interrupt-parent: phandle for the interrupt controller. | ||
| 20 | - interrupts: rtc alarm interrupt. | 19 | - interrupts: rtc alarm interrupt. |
| 21 | - clock-output-names: From common clock binding to override the default output | 20 | - clock-output-names: From common clock binding to override the default output |
| 22 | clock name | 21 | clock name |
| @@ -11,7 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family. | 11 | - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family. |
| 12 | - reg: Address range of rtc register set | 12 | - reg: Address range of rtc register set |
| 13 | - interrupts: rtc timer, alarm interrupts in order | 13 | - interrupts: rtc timer, alarm interrupts in order |
| 14 | - interrupt-parent: phandle for the interrupt controller | ||
| 15 | 14 | ||
| 16 | Optional properties: | 15 | Optional properties: |
| 17 | - system-power-controller: whether the rtc is controlling the system power | 16 | - system-power-controller: whether the rtc is controlling the system power |
| @@ -3,7 +3,6 @@ Palmas RTC controller bindings · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: | 4 | - compatible: |
| 5 | - "ti,palmas-rtc" for palma series of the RTC controller | 5 | - "ti,palmas-rtc" for palma series of the RTC controller |
| 6 | - interrupt-parent: Parent interrupt device, must be handle of palmas node. | ||
| 7 | - interrupts: Interrupt number of RTC submodule on device. | 6 | - interrupts: Interrupt number of RTC submodule on device. |
| 8 | 7 | ||
| 9 | Optional properties: | 8 | Optional properties: |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "st,spear600-rtc" | 4 | - compatible : "st,spear600-rtc" |
| 5 | - reg : Address range of the rtc registers | 5 | - reg : Address range of the rtc registers |
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupt: Should contain the rtc interrupt number | 6 | - interrupt: Should contain the rtc interrupt number |
| 9 | 7 | ||
| 10 | Example: | 8 | Example: |
| @@ -3,7 +3,6 @@ Spreadtrum SC27xx Real Time Clock · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: should be "sprd,sc2731-rtc". | 4 | - compatible: should be "sprd,sc2731-rtc". |
| 5 | - reg: address offset of rtc register. | 5 | - reg: address offset of rtc register. |
| 6 | - interrupt-parent: phandle for the interrupt controller. | ||
| 7 | - interrupts: rtc alarm interrupt. | 6 | - interrupts: rtc alarm interrupt. |
| 8 | 7 | ||
| 9 | Example: | 8 | Example: |
| @@ -13,8 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | It is required on stm32(h7/mp1). | 13 | It is required on stm32(h7/mp1). |
| 14 | - clock-names: must be "rtc_ck" and "pclk". | 14 | - clock-names: must be "rtc_ck" and "pclk". |
| 15 | It is required on stm32(h7/mp1). | 15 | It is required on stm32(h7/mp1). |
| 16 | - interrupt-parent: phandle for the interrupt controller. | ||
| 17 | It is required on stm32(f4/f7/h7). | ||
| 18 | - interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required | 16 | - interrupts: rtc alarm interrupt. On stm32mp1, a second interrupt is required |
| 19 | for rtc alarm wakeup interrupt. | 17 | for rtc alarm wakeup interrupt. |
| 20 | - st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to | 18 | - st,syscfg: phandle/offset/mask triplet. The phandle to pwrcfg used to |
| @@ -3,7 +3,6 @@ ST-Ericsson COH 901 331 Real Time Clock · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: must be "stericsson,coh901331" | 4 | - compatible: must be "stericsson,coh901331" |
| 5 | - reg: address range of rtc register set. | 5 | - reg: address range of rtc register set. |
| 6 | - interrupt-parent: phandle for the interrupt controller. | ||
| 7 | - interrupts: rtc alarm interrupt. | 6 | - interrupts: rtc alarm interrupt. |
| 8 | - clocks: phandle to the rtc clock source | 7 | - clocks: phandle to the rtc clock source |
| 9 | 8 | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg: address on the bus | 6 | - reg: address on the bus |
| 7 | 7 | ||
| 8 | Optional ST33ZP24 Properties: | 8 | Optional ST33ZP24 Properties: |
| 9 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 10 | - interrupts: GPIO interrupt to which the chip is connected | 9 | - interrupts: GPIO interrupt to which the chip is connected |
| 11 | - lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. | 10 | - lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. |
| 12 | If set, power must be present when the platform is going into sleep/hibernate mode. | 11 | If set, power must be present when the platform is going into sleep/hibernate mode. |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - spi-max-frequency: Maximum SPI frequency (<= 10000000). | 5 | - spi-max-frequency: Maximum SPI frequency (<= 10000000). |
| 6 | 6 | ||
| 7 | Optional ST33ZP24 Properties: | 7 | Optional ST33ZP24 Properties: |
| 8 | - interrupt-parent: phandle for the interrupt gpio controller | ||
| 9 | - interrupts: GPIO interrupt to which the chip is connected | 8 | - interrupts: GPIO interrupt to which the chip is connected |
| 10 | - lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. | 9 | - lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. |
| 11 | If set, power must be present when the platform is going into sleep/hibernate mode. | 10 | If set, power must be present when the platform is going into sleep/hibernate mode. |
| @@ -13,7 +13,7 @@ Required properties: · 12 unmodified lines | |||
| 13 | "tcg,tpm-tis-mmio". Valid chip strings are: | 13 | "tcg,tpm-tis-mmio". Valid chip strings are: |
| 14 | * "atmel,at97sc3204" | 14 | * "atmel,at97sc3204" |
| 15 | - reg: The location of the MMIO registers, should be at least 0x5000 bytes | 15 | - reg: The location of the MMIO registers, should be at least 0x5000 bytes |
| 16 | - interrupt-parent/interrupts: An optional interrupt indicating command completion. | 16 | - interrupts: An optional interrupt indicating command completion. |
| 17 | 17 | ||
| 18 | Example: | 18 | Example: |
| 19 | 19 | ||
| @@ -9,7 +9,11 @@ Optional properties: · 8 unmodified lines | |||
| 9 | - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works | 9 | - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works |
| 10 | in DCE mode by default. | 10 | in DCE mode by default. |
| 11 | - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, | 11 | - rs485-rts-delay, rs485-rts-active-low, rs485-rx-during-tx, |
| 12 | linux,rs485-enabled-at-boot-time: see rs485.txt | 12 | linux,rs485-enabled-at-boot-time: see rs485.txt. Note that for RS485 |
| 13 | you must enable either the "uart-has-rtscts" or the "rts-gpios" | ||
| 14 | properties. In case you use "uart-has-rtscts" the signal that controls | ||
| 15 | the transceiver is actually CTS_B, not RTS_B. CTS_B is always output, | ||
| 16 | and RTS_B is input, regardless of dte-mode. | ||
| 13 | 17 | ||
| 14 | Please check Documentation/devicetree/bindings/serial/serial.txt | 18 | Please check Documentation/devicetree/bindings/serial/serial.txt |
| 15 | for the complete list of generic properties. | 19 | for the complete list of generic properties. |
| @@ -7,8 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - "maxim,max3109" for Maxim MAX3109, | 7 | - "maxim,max3109" for Maxim MAX3109, |
| 8 | - "maxim,max14830" for Maxim MAX14830. | 8 | - "maxim,max14830" for Maxim MAX14830. |
| 9 | - reg: SPI chip select number. | 9 | - reg: SPI chip select number. |
| 10 | - interrupt-parent: The phandle for the interrupt controller that | ||
| 11 | services interrupts for this IC. | ||
| 12 | - interrupts: Specifies the interrupt source of the parent interrupt | 10 | - interrupts: Specifies the interrupt source of the parent interrupt |
| 13 | controller. The format of the interrupt specifier depends on the | 11 | controller. The format of the interrupt specifier depends on the |
| 14 | parent interrupt controller. | 12 | parent interrupt controller. |
| @@ -8,6 +8,7 @@ Required properties: · 7 unmodified lines | |||
| 8 | * "mediatek,mt6582-uart" for MT6582 compatible UARTS | 8 | * "mediatek,mt6582-uart" for MT6582 compatible UARTS |
| 9 | * "mediatek,mt6589-uart" for MT6589 compatible UARTS | 9 | * "mediatek,mt6589-uart" for MT6589 compatible UARTS |
| 10 | * "mediatek,mt6755-uart" for MT6755 compatible UARTS | 10 | * "mediatek,mt6755-uart" for MT6755 compatible UARTS |
| 11 | * "mediatek,mt6765-uart" for MT6765 compatible UARTS | ||
| 11 | * "mediatek,mt6795-uart" for MT6795 compatible UARTS | 12 | * "mediatek,mt6795-uart" for MT6795 compatible UARTS |
| 12 | * "mediatek,mt6797-uart" for MT6797 compatible UARTS | 13 | * "mediatek,mt6797-uart" for MT6797 compatible UARTS |
| 13 | * "mediatek,mt7622-uart" for MT7622 compatible UARTS | 14 | * "mediatek,mt7622-uart" for MT7622 compatible UARTS |
| @@ -10,8 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | - "nxp,sc16is760" for NXP SC16IS760, | 10 | - "nxp,sc16is760" for NXP SC16IS760, |
| 11 | - "nxp,sc16is762" for NXP SC16IS762. | 11 | - "nxp,sc16is762" for NXP SC16IS762. |
| 12 | - reg: I2C address of the SC16IS7xx device. | 12 | - reg: I2C address of the SC16IS7xx device. |
| 13 | - interrupt-parent: The phandle for the interrupt controller that | ||
| 14 | services interrupts for this IC. | ||
| 15 | - interrupts: Should contain the UART interrupt | 13 | - interrupts: Should contain the UART interrupt |
| 16 | - clocks: Reference to the IC source clock. | 14 | - clocks: Reference to the IC source clock. |
| 17 | 15 | ||
| @@ -44,8 +42,6 @@ Required properties: · 26 unmodified lines | |||
| 44 | - "nxp,sc16is760" for NXP SC16IS760, | 42 | - "nxp,sc16is760" for NXP SC16IS760, |
| 45 | - "nxp,sc16is762" for NXP SC16IS762. | 43 | - "nxp,sc16is762" for NXP SC16IS762. |
| 46 | - reg: SPI chip select number. | 44 | - reg: SPI chip select number. |
| 47 | - interrupt-parent: The phandle for the interrupt controller that | ||
| 48 | services interrupts for this IC. | ||
| 49 | - interrupts: Specifies the interrupt source of the parent interrupt | 45 | - interrupts: Specifies the interrupt source of the parent interrupt |
| 50 | controller. The format of the interrupt specifier depends on the | 46 | controller. The format of the interrupt specifier depends on the |
| 51 | parent interrupt controller. | 47 | parent interrupt controller. |
| @@ -1,6 +1,7 @@ | |||
| 1 | OMAP UART controller | 1 | OMAP UART controller |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : should be "ti,am654-uart" for AM654 controllers | ||
| 4 | - compatible : should be "ti,omap2-uart" for OMAP2 controllers | 5 | - compatible : should be "ti,omap2-uart" for OMAP2 controllers |
| 5 | - compatible : should be "ti,omap3-uart" for OMAP3 controllers | 6 | - compatible : should be "ti,omap3-uart" for OMAP3 controllers |
| 6 | - compatible : should be "ti,omap4-uart" for OMAP4 controllers | 7 | - compatible : should be "ti,omap4-uart" for OMAP4 controllers |
| @@ -7,9 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - reg: Specifies the physical base address of the controller and | 7 | - reg: Specifies the physical base address of the controller and |
| 8 | the length of the memory mapped region. | 8 | the length of the memory mapped region. |
| 9 | 9 | ||
| 10 | - interrupt-parent: The phandle for the interrupt controller that | ||
| 11 | services interrupts for this device. | ||
| 12 | |||
| 13 | - interrupts: Specifies the interrupt source of the parent interrupt | 10 | - interrupts: Specifies the interrupt source of the parent interrupt |
| 14 | controller. The format of the interrupt specifier depends on the | 11 | controller. The format of the interrupt specifier depends on the |
| 15 | parent interrupt controller. | 12 | parent interrupt controller. |
| @@ -0,0 +1,10 @@ | |||
| 1 | Renesas RZ/N1 UART | ||
| 2 | |||
| 3 | This controller is based on the Synopsys DesignWare ABP UART and inherits all | ||
| 4 | properties defined in snps-dw-apb-uart.txt except for the compatible property. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : The device specific string followed by the generic RZ/N1 string. | ||
| 8 | Therefore it must be one of: | ||
| 9 | "renesas,r9a06g032-uart", "renesas,rzn1-uart" | ||
| 10 | "renesas,r9a06g033-uart", "renesas,rzn1-uart" | ||
| @@ -5,6 +5,7 @@ Required properties: · 4 unmodified lines | |||
| 5 | - compatible: Must contain one or more of the following: | 5 | - compatible: Must contain one or more of the following: |
| 6 | 6 | ||
| 7 | - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART. | 7 | - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART. |
| 8 | - "renesas,scif-r7s9210" for R7S9210 (RZ/A2) SCIF compatible UART. | ||
| 8 | - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. | 9 | - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART. |
| 9 | - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. | 10 | - "renesas,scifb-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFB compatible UART. |
| 10 | - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. | 11 | - "renesas,scifa-r8a7740" for R8A7740 (R-Mobile A1) SCIFA compatible UART. |
| @@ -72,7 +73,21 @@ Required properties: · 61 unmodified lines | |||
| 72 | family-specific and/or generic versions. | 73 | family-specific and/or generic versions. |
| 73 | 74 | ||
| 74 | - reg: Base address and length of the I/O registers used by the UART. | 75 | - reg: Base address and length of the I/O registers used by the UART. |
| 75 | - interrupts: Must contain an interrupt-specifier for the SCIx interrupt. | 76 | - interrupts: Must contain one or more interrupt-specifiers for the SCIx. |
| 77 | If a single interrupt is expressed, then all events are | ||
| 78 | multiplexed into this single interrupt. | ||
| 79 | |||
| 80 | If multiple interrupts are provided by the hardware, the order | ||
| 81 | in which the interrupts are listed must match order below. Note | ||
| 82 | that some HW interrupt events may be muxed together resulting | ||
| 83 | in duplicate entries. | ||
| 84 | The interrupt order is as follows: | ||
| 85 | 1. Error (ERI) | ||
| 86 | 2. Receive buffer full (RXI) | ||
| 87 | 3. Transmit buffer empty (TXI) | ||
| 88 | 4. Break (BRI) | ||
| 89 | 5. Data Ready (DRI) | ||
| 90 | 6. Transmit End (TEI) | ||
| 76 | 91 | ||
| 77 | - clocks: Must contain a phandle and clock-specifier pair for each entry | 92 | - clocks: Must contain a phandle and clock-specifier pair for each entry |
| 78 | in clock-names. | 93 | in clock-names. |
| @@ -89,7 +104,7 @@ Required properties: · 10 unmodified lines | |||
| 89 | - "scif_clk" for the optional external clock source for the frequency | 104 | - "scif_clk" for the optional external clock source for the frequency |
| 90 | divider (SCIF_CLK). | 105 | divider (SCIF_CLK). |
| 91 | 106 | ||
| 92 | Note: Each enabled SCIx UART should have an alias correctly numbered in the | 107 | Note: Each enabled SCIx UART may have an optional "serialN" alias in the |
| 93 | "aliases" node. | 108 | "aliases" node. |
| 94 | 109 | ||
| 95 | Optional properties: | 110 | Optional properties: |
| @@ -0,0 +1,23 @@ | |||
| 1 | Xilinx Axi Uartlite controller Device Tree Bindings | ||
| 2 | --------------------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible : Can be either of | ||
| 6 | "xlnx,xps-uartlite-1.00.a" | ||
| 7 | "xlnx,opb-uartlite-1.00.b" | ||
| 8 | - reg : Physical base address and size of the Axi Uartlite | ||
| 9 | registers map. | ||
| 10 | - interrupts : Should contain the UART controller interrupt. | ||
| 11 | |||
| 12 | Optional properties: | ||
| 13 | - port-number : Set Uart port number | ||
| 14 | - clock-names : Should be "s_axi_aclk" | ||
| 15 | - clocks : Input clock specifier. Refer to common clock bindings. | ||
| 16 | |||
| 17 | Example: | ||
| 18 | serial@800c0000 { | ||
| 19 | compatible = "xlnx,xps-uartlite-1.00.a"; | ||
| 20 | reg = <0x0 0x800c0000 0x10000>; | ||
| 21 | interrupts = <0x0 0x6e 0x1>; | ||
| 22 | port-number = <0>; | ||
| 23 | }; | ||
| @@ -0,0 +1,84 @@ | |||
| 1 | Qualcomm SLIMBus Non Generic Device (NGD) Controller binding | ||
| 2 | |||
| 3 | SLIMBus NGD controller is a light-weight driver responsible for communicating | ||
| 4 | with SLIMBus slaves directly over the bus using messaging interface and | ||
| 5 | communicating with master component residing on ADSP for bandwidth and | ||
| 6 | data-channel management | ||
| 7 | |||
| 8 | Please refer to slimbus/bus.txt for details of the common SLIMBus bindings. | ||
| 9 | |||
| 10 | - compatible: | ||
| 11 | Usage: required | ||
| 12 | Value type: <stringlist> | ||
| 13 | Definition: must be "qcom,slim-ngd-v<MAJOR>.<MINOR>.<STEP>" | ||
| 14 | must be one of the following. | ||
| 15 | "qcom,slim-ngd-v1.5.0" for MSM8996 | ||
| 16 | "qcom,slim-ngd-v2.1.0" for SDM845 | ||
| 17 | |||
| 18 | - reg: | ||
| 19 | Usage: required | ||
| 20 | Value type: <prop-encoded-array> | ||
| 21 | Definition: must specify the base address and size of the controller | ||
| 22 | register space. | ||
| 23 | - dmas | ||
| 24 | Usage: required | ||
| 25 | Value type: <array of phandles> | ||
| 26 | Definition: List of rx and tx dma channels | ||
| 27 | |||
| 28 | - dma-names | ||
| 29 | Usage: required | ||
| 30 | Value type: <stringlist> | ||
| 31 | Definition: must be "rx" and "tx". | ||
| 32 | |||
| 33 | - interrupts: | ||
| 34 | Usage: required | ||
| 35 | Value type: <prop-encoded-array> | ||
| 36 | Definition: must list controller IRQ. | ||
| 37 | |||
| 38 | #address-cells | ||
| 39 | Usage: required | ||
| 40 | Value type: <u32> | ||
| 41 | Definition: Should be 1, reflecting the instance id of ngd. | ||
| 42 | |||
| 43 | #size-cells | ||
| 44 | Usage: required | ||
| 45 | Value type: <u32> | ||
| 46 | Definition: Should be 0 | ||
| 47 | |||
| 48 | = NGD Devices | ||
| 49 | Each subnode represents an instance of NGD, must contain the following | ||
| 50 | properties: | ||
| 51 | |||
| 52 | - reg: | ||
| 53 | Usage: required | ||
| 54 | Value type: <u32> | ||
| 55 | Definition: Should be instance id of ngd. | ||
| 56 | |||
| 57 | #address-cells | ||
| 58 | Usage: required | ||
| 59 | Refer to slimbus/bus.txt for details of the common SLIMBus bindings. | ||
| 60 | |||
| 61 | #size-cells | ||
| 62 | Usage: required | ||
| 63 | Refer to slimbus/bus.txt for details of the common SLIMBus bindings. | ||
| 64 | |||
| 65 | = EXAMPLE | ||
| 66 | |||
| 67 | slim@91c0000 { | ||
| 68 | compatible = "qcom,slim-ngd-v1.5.0"; | ||
| 69 | reg = <0x91c0000 0x2c000>; | ||
| 70 | interrupts = <0 163 0>; | ||
| 71 | dmas = <&slimbam 3>, <&slimbam 4>; | ||
| 72 | dma-names = "rx", "tx"; | ||
| 73 | #address-cells = <1>; | ||
| 74 | #size-cells = <0>; | ||
| 75 | ngd@1 { | ||
| 76 | reg = <1>; | ||
| 77 | #address-cells = <1>; | ||
| 78 | #size-cells = <1>; | ||
| 79 | codec@1 { | ||
| 80 | compatible = "slim217,1a0"; | ||
| 81 | reg = <1 0>; | ||
| 82 | }; | ||
| 83 | }; | ||
| 84 | }; | ||
| @@ -21,7 +21,6 @@ Optional properties: · 20 unmodified lines | |||
| 21 | one as described by the fsl,cpm1-gpio-irq-mask property. There should be as | 21 | one as described by the fsl,cpm1-gpio-irq-mask property. There should be as |
| 22 | many interrupts as number of ones in the mask property. The first interrupt in | 22 | many interrupts as number of ones in the mask property. The first interrupt in |
| 23 | the list corresponds to the most significant bit of the mask. | 23 | the list corresponds to the most significant bit of the mask. |
| 24 | - interrupt-parent : Parent for the above interrupt property. | ||
| 25 | 24 | ||
| 26 | Example of four SOC GPIO banks defined as gpio-controller nodes: | 25 | Example of four SOC GPIO banks defined as gpio-controller nodes: |
| 27 | 26 | ||
| @@ -11,8 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | information for the interrupt. This should be encoded based on | 11 | information for the interrupt. This should be encoded based on |
| 12 | the information in section 2) depending on the type of interrupt | 12 | the information in section 2) depending on the type of interrupt |
| 13 | controller you have. | 13 | controller you have. |
| 14 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 15 | services interrupts for this device. | ||
| 16 | - pio-handle : The phandle for the Parallel I/O port configuration. | 14 | - pio-handle : The phandle for the Parallel I/O port configuration. |
| 17 | - port-number : for UART drivers, the port number to use, between 0 and 3. | 15 | - port-number : for UART drivers, the port number to use, between 0 and 3. |
| 18 | This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0. | 16 | This usually corresponds to the /dev/ttyQE device, e.g. <0> = /dev/ttyQE0. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | length, the next two two cells should contain PRAM location and | 6 | length, the next two two cells should contain PRAM location and |
| 7 | length. | 7 | length. |
| 8 | - interrupts : should contain USB interrupt. | 8 | - interrupts : should contain USB interrupt. |
| 9 | - interrupt-parent : interrupt source phandle. | ||
| 10 | - fsl,fullspeed-clock : specifies the full speed USB clock source: | 9 | - fsl,fullspeed-clock : specifies the full speed USB clock source: |
| 11 | "none": clock source is disabled | 10 | "none": clock source is disabled |
| 12 | "brg1" through "brg16": clock source is BRG1-BRG16, respectively | 11 | "brg1" through "brg16": clock source is BRG1-BRG16, respectively |
| @@ -19,6 +19,7 @@ IP Pairing · 18 unmodified lines | |||
| 19 | Required properties in pwrap device node. | 19 | Required properties in pwrap device node. |
| 20 | - compatible: | 20 | - compatible: |
| 21 | "mediatek,mt2701-pwrap" for MT2701/7623 SoCs | 21 | "mediatek,mt2701-pwrap" for MT2701/7623 SoCs |
| 22 | "mediatek,mt6797-pwrap" for MT6797 SoCs | ||
| 22 | "mediatek,mt7622-pwrap" for MT7622 SoCs | 23 | "mediatek,mt7622-pwrap" for MT7622 SoCs |
| 23 | "mediatek,mt8135-pwrap" for MT8135 SoCs | 24 | "mediatek,mt8135-pwrap" for MT8135 SoCs |
| 24 | "mediatek,mt8173-pwrap" for MT8173 SoCs | 25 | "mediatek,mt8173-pwrap" for MT8173 SoCs |
| @@ -39,14 +39,14 @@ Required properties: · 38 unmodified lines | |||
| 39 | 39 | ||
| 40 | Optional property: | 40 | Optional property: |
| 41 | - clock-frequency: Desired I2C bus clock frequency in Hz. | 41 | - clock-frequency: Desired I2C bus clock frequency in Hz. |
| 42 | When missing default to 400000Hz. | 42 | When missing default to 100000Hz. |
| 43 | 43 | ||
| 44 | Child nodes should conform to I2C bus binding as described in i2c.txt. | 44 | Child nodes should conform to I2C bus binding as described in i2c.txt. |
| 45 | 45 | ||
| 46 | Qualcomm Technologies Inc. GENI Serial Engine based UART Controller | 46 | Qualcomm Technologies Inc. GENI Serial Engine based UART Controller |
| 47 | 47 | ||
| 48 | Required properties: | 48 | Required properties: |
| 49 | - compatible: Must be "qcom,geni-debug-uart". | 49 | - compatible: Must be "qcom,geni-debug-uart" or "qcom,geni-uart". |
| 50 | - reg: Must contain UART register location and length. | 50 | - reg: Must contain UART register location and length. |
| 51 | - interrupts: Must contain UART core interrupts. | 51 | - interrupts: Must contain UART core interrupts. |
| 52 | - clock-names: Must contain "se". | 52 | - clock-names: Must contain "se". |
| @@ -10,6 +10,11 @@ edge. · 9 unmodified lines | |||
| 10 | Value type: <stringlist> | 10 | Value type: <stringlist> |
| 11 | Definition: must be "qcom,glink-rpm" | 11 | Definition: must be "qcom,glink-rpm" |
| 12 | 12 | ||
| 13 | - label: | ||
| 14 | Usage: optional | ||
| 15 | Value type: <string> | ||
| 16 | Definition: should specify the subsystem name this edge corresponds to. | ||
| 17 | |||
| 13 | - interrupts: | 18 | - interrupts: |
| 14 | Usage: required | 19 | Usage: required |
| 15 | Value type: <prop-encoded-array> | 20 | Value type: <prop-encoded-array> |
| @@ -0,0 +1,137 @@ | |||
| 1 | RPMH RSC: | ||
| 2 | ------------ | ||
| 3 | |||
| 4 | Resource Power Manager Hardened (RPMH) is the mechanism for communicating with | ||
| 5 | the hardened resource accelerators on Qualcomm SoCs. Requests to the resources | ||
| 6 | can be written to the Trigger Command Set (TCS) registers and using a (addr, | ||
| 7 | val) pair and triggered. Messages in the TCS are then sent in sequence over an | ||
| 8 | internal bus. | ||
| 9 | |||
| 10 | The hardware block (Direct Resource Voter or DRV) is a part of the h/w entity | ||
| 11 | (Resource State Coordinator a.k.a RSC) that can handle multiple sleep and | ||
| 12 | active/wake resource requests. Multiple such DRVs can exist in a SoC and can | ||
| 13 | be written to from Linux. The structure of each DRV follows the same template | ||
| 14 | with a few variations that are captured by the properties here. | ||
| 15 | |||
| 16 | A TCS may be triggered from Linux or triggered by the F/W after all the CPUs | ||
| 17 | have powered off to facilitate idle power saving. TCS could be classified as - | ||
| 18 | |||
| 19 | ACTIVE /* Triggered by Linux */ | ||
| 20 | SLEEP /* Triggered by F/W */ | ||
| 21 | WAKE /* Triggered by F/W */ | ||
| 22 | CONTROL /* Triggered by F/W */ | ||
| 23 | |||
| 24 | The order in which they are described in the DT, should match the hardware | ||
| 25 | configuration. | ||
| 26 | |||
| 27 | Requests can be made for the state of a resource, when the subsystem is active | ||
| 28 | or idle. When all subsystems like Modem, GPU, CPU are idle, the resource state | ||
| 29 | will be an aggregate of the sleep votes from each of those subsystems. Clients | ||
| 30 | may request a sleep value for their shared resources in addition to the active | ||
| 31 | mode requests. | ||
| 32 | |||
| 33 | Properties: | ||
| 34 | |||
| 35 | - compatible: | ||
| 36 | Usage: required | ||
| 37 | Value type: <string> | ||
| 38 | Definition: Should be "qcom,rpmh-rsc". | ||
| 39 | |||
| 40 | - reg: | ||
| 41 | Usage: required | ||
| 42 | Value type: <prop-encoded-array> | ||
| 43 | Definition: The first register specifies the base address of the | ||
| 44 | DRV(s). The number of DRVs in the dependent on the RSC. | ||
| 45 | The tcs-offset specifies the start address of the | ||
| 46 | TCS in the DRVs. | ||
| 47 | |||
| 48 | - reg-names: | ||
| 49 | Usage: required | ||
| 50 | Value type: <string> | ||
| 51 | Definition: Maps the register specified in the reg property. Must be | ||
| 52 | "drv-0", "drv-1", "drv-2" etc and "tcs-offset". The | ||
| 53 | |||
| 54 | - interrupts: | ||
| 55 | Usage: required | ||
| 56 | Value type: <prop-encoded-interrupt> | ||
| 57 | Definition: The interrupt that trips when a message complete/response | ||
| 58 | is received for this DRV from the accelerators. | ||
| 59 | |||
| 60 | - qcom,drv-id: | ||
| 61 | Usage: required | ||
| 62 | Value type: <u32> | ||
| 63 | Definition: The id of the DRV in the RSC block that will be used by | ||
| 64 | this controller. | ||
| 65 | |||
| 66 | - qcom,tcs-config: | ||
| 67 | Usage: required | ||
| 68 | Value type: <prop-encoded-array> | ||
| 69 | Definition: The tuple defining the configuration of TCS. | ||
| 70 | Must have 2 cells which describe each TCS type. | ||
| 71 | <type number_of_tcs>. | ||
| 72 | The order of the TCS must match the hardware | ||
| 73 | configuration. | ||
| 74 | - Cell #1 (TCS Type): TCS types to be specified - | ||
| 75 | ACTIVE_TCS | ||
| 76 | SLEEP_TCS | ||
| 77 | WAKE_TCS | ||
| 78 | CONTROL_TCS | ||
| 79 | - Cell #2 (Number of TCS): <u32> | ||
| 80 | |||
| 81 | - label: | ||
| 82 | Usage: optional | ||
| 83 | Value type: <string> | ||
| 84 | Definition: Name for the RSC. The name would be used in trace logs. | ||
| 85 | |||
| 86 | Drivers that want to use the RSC to communicate with RPMH must specify their | ||
| 87 | bindings as child nodes of the RSC controllers they wish to communicate with. | ||
| 88 | |||
| 89 | Example 1: | ||
| 90 | |||
| 91 | For a TCS whose RSC base address is is 0x179C0000 and is at a DRV id of 2, the | ||
| 92 | register offsets for DRV2 start at 0D00, the register calculations are like | ||
| 93 | this - | ||
| 94 | DRV0: 0x179C0000 | ||
| 95 | DRV2: 0x179C0000 + 0x10000 = 0x179D0000 | ||
| 96 | DRV2: 0x179C0000 + 0x10000 * 2 = 0x179E0000 | ||
| 97 | TCS-OFFSET: 0xD00 | ||
| 98 | |||
| 99 | apps_rsc: rsc@179c0000 { | ||
| 100 | label = "apps_rsc"; | ||
| 101 | compatible = "qcom,rpmh-rsc"; | ||
| 102 | reg = <0x179c0000 0x10000>, | ||
| 103 | <0x179d0000 0x10000>, | ||
| 104 | <0x179e0000 0x10000>; | ||
| 105 | reg-names = "drv-0", "drv-1", "drv-2"; | ||
| 106 | interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, | ||
| 107 | <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, | ||
| 108 | <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; | ||
| 109 | qcom,tcs-offset = <0xd00>; | ||
| 110 | qcom,drv-id = <2>; | ||
| 111 | qcom,tcs-config = <ACTIVE_TCS 2>, | ||
| 112 | <SLEEP_TCS 3>, | ||
| 113 | <WAKE_TCS 3>, | ||
| 114 | <CONTROL_TCS 1>; | ||
| 115 | }; | ||
| 116 | |||
| 117 | Example 2: | ||
| 118 | |||
| 119 | For a TCS whose RSC base address is 0xAF20000 and is at DRV id of 0, the | ||
| 120 | register offsets for DRV0 start at 01C00, the register calculations are like | ||
| 121 | this - | ||
| 122 | DRV0: 0xAF20000 | ||
| 123 | TCS-OFFSET: 0x1C00 | ||
| 124 | |||
| 125 | disp_rsc: rsc@af20000 { | ||
| 126 | label = "disp_rsc"; | ||
| 127 | compatible = "qcom,rpmh-rsc"; | ||
| 128 | reg = <0xaf20000 0x10000>; | ||
| 129 | reg-names = "drv-0"; | ||
| 130 | interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; | ||
| 131 | qcom,tcs-offset = <0x1c00>; | ||
| 132 | qcom,drv-id = <0>; | ||
| 133 | qcom,tcs-config = <ACTIVE_TCS 0>, | ||
| 134 | <SLEEP_TCS 1>, | ||
| 135 | <WAKE_TCS 1>, | ||
| 136 | <CONTROL_TCS 0>; | ||
| 137 | }; | ||
| @@ -0,0 +1,32 @@ | |||
| 1 | Generic AC97 Device Properties | ||
| 2 | |||
| 3 | This documents describes the devicetree bindings for an ac97 controller child | ||
| 4 | node describing ac97 codecs. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | -compatible : Must be "ac97,vendor_id1,vendor_id2 | ||
| 8 | The ids shall be the 4 characters hexadecimal encoding, such as | ||
| 9 | given by "%04x" formatting of printf | ||
| 10 | -reg : Must be the ac97 codec number, between 0 and 3 | ||
| 11 | |||
| 12 | Example: | ||
| 13 | ac97: sound@40500000 { | ||
| 14 | compatible = "marvell,pxa270-ac97"; | ||
| 15 | reg = < 0x40500000 0x1000 >; | ||
| 16 | interrupts = <14>; | ||
| 17 | reset-gpios = <&gpio 95 GPIO_ACTIVE_HIGH>; | ||
| 18 | #sound-dai-cells = <1>; | ||
| 19 | pinctrl-names = "default"; | ||
| 20 | pinctrl-0 = < &pinctrl_ac97_default >; | ||
| 21 | clocks = <&clks CLK_AC97>, <&clks CLK_AC97CONF>; | ||
| 22 | clock-names = "AC97CLK", "AC97CONFCLK"; | ||
| 23 | |||
| 24 | #address-cells = <1>; | ||
| 25 | #size-cells = <0>; | ||
| 26 | audio-codec@0 { | ||
| 27 | reg = <0>; | ||
| 28 | compatible = "ac97,574d,4c13"; | ||
| 29 | clocks = <&fixed_wm9713_clock>; | ||
| 30 | clock-names = "ac97_clk"; | ||
| 31 | } | ||
| 32 | }; | ||
| @@ -0,0 +1,23 @@ | |||
| 1 | * Amlogic Audio FIFO controllers | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: 'amlogic,axg-toddr' or | ||
| 5 | 'amlogic,axg-frddr' | ||
| 6 | - reg: physical base address of the controller and length of memory | ||
| 7 | mapped region. | ||
| 8 | - interrupts: interrupt specifier for the fifo. | ||
| 9 | - clocks: phandle to the fifo peripheral clock provided by the audio | ||
| 10 | clock controller. | ||
| 11 | - resets: phandle to memory ARB line provided by the arb reset controller. | ||
| 12 | - #sound-dai-cells: must be 0. | ||
| 13 | |||
| 14 | Example of FRDDR A on the A113 SoC: | ||
| 15 | |||
| 16 | frddr_a: audio-controller@1c0 { | ||
| 17 | compatible = "amlogic,axg-frddr"; | ||
| 18 | reg = <0x0 0x1c0 0x0 0x1c>; | ||
| 19 | #sound-dai-cells = <0>; | ||
| 20 | interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; | ||
| 21 | clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; | ||
| 22 | resets = <&arb AXG_ARB_FRDDR_A>; | ||
| 23 | }; | ||
| @@ -0,0 +1,124 @@ | |||
| 1 | Amlogic AXG sound card: | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | |||
| 5 | - compatible: "amlogic,axg-sound-card" | ||
| 6 | - model : User specified audio sound card name, one string | ||
| 7 | |||
| 8 | Optional properties: | ||
| 9 | |||
| 10 | - audio-aux-devs : List of phandles pointing to auxiliary devices | ||
| 11 | - audio-widgets : Please refer to widgets.txt. | ||
| 12 | - audio-routing : A list of the connections between audio components. | ||
| 13 | |||
| 14 | Subnodes: | ||
| 15 | |||
| 16 | - dai-link: Container for dai-link level properties and the CODEC | ||
| 17 | sub-nodes. There should be at least one (and probably more) | ||
| 18 | subnode of this type. | ||
| 19 | |||
| 20 | Required dai-link properties: | ||
| 21 | |||
| 22 | - sound-dai: phandle and port of the CPU DAI. | ||
| 23 | |||
| 24 | Required TDM Backend dai-link properties: | ||
| 25 | - dai-format : CPU/CODEC common audio format | ||
| 26 | |||
| 27 | Optional TDM Backend dai-link properties: | ||
| 28 | - dai-tdm-slot-rx-mask-{0,1,2,3}: Receive direction slot masks | ||
| 29 | - dai-tdm-slot-tx-mask-{0,1,2,3}: Transmit direction slot masks | ||
| 30 | When omitted, mask is assumed to have to no | ||
| 31 | slots. A valid must have at one slot, so at | ||
| 32 | least one these mask should be provided with | ||
| 33 | an enabled slot. | ||
| 34 | - dai-tdm-slot-num : Please refer to tdm-slot.txt. | ||
| 35 | If omitted, slot number is set to accommodate the largest | ||
| 36 | mask provided. | ||
| 37 | - dai-tdm-slot-width : Please refer to tdm-slot.txt. default to 32 if omitted. | ||
| 38 | - mclk-fs : Multiplication factor between stream rate and mclk | ||
| 39 | |||
| 40 | Backend dai-link subnodes: | ||
| 41 | |||
| 42 | - codec: dai-link representing backend links should have at least one subnode. | ||
| 43 | One subnode for each codec of the dai-link. | ||
| 44 | dai-link representing frontend links have no codec, therefore have no | ||
| 45 | subnodes | ||
| 46 | |||
| 47 | Required codec subnodes properties: | ||
| 48 | |||
| 49 | - sound-dai: phandle and port of the CODEC DAI. | ||
| 50 | |||
| 51 | Optional codec subnodes properties: | ||
| 52 | |||
| 53 | - dai-tdm-slot-tx-mask : Please refer to tdm-slot.txt. | ||
| 54 | - dai-tdm-slot-rx-mask : Please refer to tdm-slot.txt. | ||
| 55 | |||
| 56 | Example: | ||
| 57 | |||
| 58 | sound { | ||
| 59 | compatible = "amlogic,axg-sound-card"; | ||
| 60 | model = "AXG-S420"; | ||
| 61 | audio-aux-devs = <&tdmin_a>, <&tdmout_c>; | ||
| 62 | audio-widgets = "Line", "Lineout", | ||
| 63 | "Line", "Linein", | ||
| 64 | "Speaker", "Speaker1 Left", | ||
| 65 | "Speaker", "Speaker1 Right"; | ||
| 66 | "Speaker", "Speaker2 Left", | ||
| 67 | "Speaker", "Speaker2 Right"; | ||
| 68 | audio-routing = "TDMOUT_C IN 0", "FRDDR_A OUT 2", | ||
| 69 | "SPDIFOUT IN 0", "FRDDR_A OUT 3", | ||
| 70 | "TDM_C Playback", "TDMOUT_C OUT", | ||
| 71 | "TDMIN_A IN 2", "TDM_C Capture", | ||
| 72 | "TDMIN_A IN 5", "TDM_C Loopback", | ||
| 73 | "TODDR_A IN 0", "TDMIN_A OUT", | ||
| 74 | "Lineout", "Lineout AOUTL", | ||
| 75 | "Lineout", "Lineout AOUTR", | ||
| 76 | "Speaker1 Left", "SPK1 OUT_A", | ||
| 77 | "Speaker2 Left", "SPK2 OUT_A", | ||
| 78 | "Speaker1 Right", "SPK1 OUT_B", | ||
| 79 | "Speaker2 Right", "SPK2 OUT_B", | ||
| 80 | "Linein AINL", "Linein", | ||
| 81 | "Linein AINR", "Linein"; | ||
| 82 | |||
| 83 | dai-link@0 { | ||
| 84 | sound-dai = <&frddr_a>; | ||
| 85 | }; | ||
| 86 | |||
| 87 | dai-link@1 { | ||
| 88 | sound-dai = <&toddr_a>; | ||
| 89 | }; | ||
| 90 | |||
| 91 | dai-link@2 { | ||
| 92 | sound-dai = <&tdmif_c>; | ||
| 93 | dai-format = "i2s"; | ||
| 94 | dai-tdm-slot-tx-mask-2 = <1 1>; | ||
| 95 | dai-tdm-slot-tx-mask-3 = <1 1>; | ||
| 96 | dai-tdm-slot-rx-mask-1 = <1 1>; | ||
| 97 | mclk-fs = <256>; | ||
| 98 | |||
| 99 | codec@0 { | ||
| 100 | sound-dai = <&lineout>; | ||
| 101 | }; | ||
| 102 | |||
| 103 | codec@1 { | ||
| 104 | sound-dai = <&speaker_amp1>; | ||
| 105 | }; | ||
| 106 | |||
| 107 | codec@2 { | ||
| 108 | sound-dai = <&speaker_amp2>; | ||
| 109 | }; | ||
| 110 | |||
| 111 | codec@3 { | ||
| 112 | sound-dai = <&linein>; | ||
| 113 | }; | ||
| 114 | |||
| 115 | }; | ||
| 116 | |||
| 117 | dai-link@3 { | ||
| 118 | sound-dai = <&spdifout>; | ||
| 119 | |||
| 120 | codec { | ||
| 121 | sound-dai = <&spdif_dit>; | ||
| 122 | }; | ||
| 123 | }; | ||
| 124 | }; | ||
| @@ -0,0 +1,20 @@ | |||
| 1 | * Amlogic Audio SPDIF Output | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: 'amlogic,axg-spdifout' | ||
| 5 | - clocks: list of clock phandle, one for each entry clock-names. | ||
| 6 | - clock-names: should contain the following: | ||
| 7 | * "pclk" : peripheral clock. | ||
| 8 | * "mclk" : master clock | ||
| 9 | - #sound-dai-cells: must be 0. | ||
| 10 | |||
| 11 | Example on the A113 SoC: | ||
| 12 | |||
| 13 | spdifout: audio-controller@480 { | ||
| 14 | compatible = "amlogic,axg-spdifout"; | ||
| 15 | reg = <0x0 0x480 0x0 0x50>; | ||
| 16 | #sound-dai-cells = <0>; | ||
| 17 | clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>, | ||
| 18 | <&clkc_audio AUD_CLKID_SPDIFOUT_CLK>; | ||
| 19 | clock-names = "pclk", "mclk"; | ||
| 20 | }; | ||
| @@ -0,0 +1,28 @@ | |||
| 1 | * Amlogic Audio TDM formatters | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: 'amlogic,axg-tdmin' or | ||
| 5 | 'amlogic,axg-tdmout' | ||
| 6 | - reg: physical base address of the controller and length of memory | ||
| 7 | mapped region. | ||
| 8 | - clocks: list of clock phandle, one for each entry clock-names. | ||
| 9 | - clock-names: should contain the following: | ||
| 10 | * "pclk" : peripheral clock. | ||
| 11 | * "sclk" : bit clock. | ||
| 12 | * "sclk_sel" : bit clock input multiplexer. | ||
| 13 | * "lrclk" : sample clock | ||
| 14 | * "lrclk_sel": sample clock input multiplexer | ||
| 15 | |||
| 16 | Example of TDMOUT_A on the A113 SoC: | ||
| 17 | |||
| 18 | tdmout_a: audio-controller@500 { | ||
| 19 | compatible = "amlogic,axg-tdmout"; | ||
| 20 | reg = <0x0 0x500 0x0 0x40>; | ||
| 21 | clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, | ||
| 22 | <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, | ||
| 23 | <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, | ||
| 24 | <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>, | ||
| 25 | <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>; | ||
| 26 | clock-names = "pclk", "sclk", "sclk_sel", | ||
| 27 | "lrclk", "lrclk_sel"; | ||
| 28 | }; | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | * Amlogic Audio TDM Interfaces | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible: 'amlogic,axg-tdm-iface' | ||
| 5 | - clocks: list of clock phandle, one for each entry clock-names. | ||
| 6 | - clock-names: should contain the following: | ||
| 7 | * "sclk" : bit clock. | ||
| 8 | * "lrclk": sample clock | ||
| 9 | * "mclk" : master clock | ||
| 10 | -> optional if the interface is in clock slave mode. | ||
| 11 | - #sound-dai-cells: must be 0. | ||
| 12 | |||
| 13 | Example of TDM_A on the A113 SoC: | ||
| 14 | |||
| 15 | tdmif_a: audio-controller@0 { | ||
| 16 | compatible = "amlogic,axg-tdm-iface"; | ||
| 17 | #sound-dai-cells = <0>; | ||
| 18 | clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>, | ||
| 19 | <&clkc_audio AUD_CLKID_MST_A_SCLK>, | ||
| 20 | <&clkc_audio AUD_CLKID_MST_A_LRCLK>; | ||
| 21 | clock-names = "mclk", "sclk", "lrclk"; | ||
| 22 | }; | ||
| @@ -15,7 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | - clock-names: Should be one of each entry matching the clocks phandles list: | 15 | - clock-names: Should be one of each entry matching the clocks phandles list: |
| 16 | - "pclk" (peripheral clock) Required. | 16 | - "pclk" (peripheral clock) Required. |
| 17 | - "gclk" (generated clock) Optional (1). | 17 | - "gclk" (generated clock) Optional (1). |
| 18 | - "aclk" (Audio PLL clock) Optional (1). | ||
| 19 | - "muxclk" (I2S mux clock) Optional (1). | 18 | - "muxclk" (I2S mux clock) Optional (1). |
| 20 | 19 | ||
| 21 | Optional properties: | 20 | Optional properties: |
| @@ -23,9 +22,9 @@ Optional properties: · 1 unmodified line | |||
| 23 | - princtrl-names: Should contain only one value - "default". | 22 | - princtrl-names: Should contain only one value - "default". |
| 24 | 23 | ||
| 25 | 24 | ||
| 26 | (1) : Only the peripheral clock is required. The generated clock, the Audio | 25 | (1) : Only the peripheral clock is required. The generated clock and the I2S |
| 27 | PLL clock adn the I2S mux clock are optional and should only be set | 26 | mux clock are optional and should only be set together, when Master Mode |
| 28 | together, when Master Mode is required. | 27 | is required. |
| 29 | 28 | ||
| 30 | Example: | 29 | Example: |
| 31 | 30 | ||
| @@ -40,8 +39,8 @@ Example: · 8 unmodified lines | |||
| 40 | (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | | 39 | (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | |
| 41 | AT91_XDMAC_DT_PERID(32))>; | 40 | AT91_XDMAC_DT_PERID(32))>; |
| 42 | dma-names = "tx", "rx"; | 41 | dma-names = "tx", "rx"; |
| 43 | clocks = <&i2s0_clk>, <&i2s0_gclk>, <&audio_pll_pmc>, <&i2s0muxck>; | 42 | clocks = <&i2s0_clk>, <&i2s0_gclk>, <&i2s0muxck>; |
| 44 | clock-names = "pclk", "gclk", "aclk", "muxclk"; | 43 | clock-names = "pclk", "gclk", "muxclk"; |
| 45 | pinctrl-names = "default"; | 44 | pinctrl-names = "default"; |
| 46 | pinctrl-0 = <&pinctrl_i2s0_default>; | 45 | pinctrl-0 = <&pinctrl_i2s0_default>; |
| 47 | }; | 46 | }; |
| @@ -18,6 +18,8 @@ Below are same as Simple-Card. · 17 unmodified lines | |||
| 18 | - bitclock-inversion | 18 | - bitclock-inversion |
| 19 | - frame-inversion | 19 | - frame-inversion |
| 20 | - mclk-fs | 20 | - mclk-fs |
| 21 | - hp-det-gpio | ||
| 22 | - mic-det-gpio | ||
| 21 | - dai-tdm-slot-num | 23 | - dai-tdm-slot-num |
| 22 | - dai-tdm-slot-width | 24 | - dai-tdm-slot-width |
| 23 | - clocks / system-clock-frequency | 25 | - clocks / system-clock-frequency |
| @@ -14,8 +14,6 @@ Optional properties: · 13 unmodified lines | |||
| 14 | 14 | ||
| 15 | - reset-gpios : gpio used to reset the amplifier | 15 | - reset-gpios : gpio used to reset the amplifier |
| 16 | 16 | ||
| 17 | - interrupt-parent : Specifies the phandle of the interrupt controller to | ||
| 18 | which the IRQs from CS35L33 are delivered to. | ||
| 19 | - interrupts : IRQ line info CS35L33. | 17 | - interrupts : IRQ line info CS35L33. |
| 20 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 18 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 21 | for further information relating to interrupt properties) | 19 | for further information relating to interrupt properties) |
| @@ -21,8 +21,6 @@ Optional properties: · 20 unmodified lines | |||
| 21 | 21 | ||
| 22 | - reset-gpios: GPIO used to reset the amplifier. | 22 | - reset-gpios: GPIO used to reset the amplifier. |
| 23 | 23 | ||
| 24 | - interrupt-parent : Specifies the phandle of the interrupt controller to | ||
| 25 | which the IRQs from CS35L34 are delivered to. | ||
| 26 | - interrupts : IRQ line info CS35L34. | 24 | - interrupts : IRQ line info CS35L34. |
| 27 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 25 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 28 | for further information relating to interrupt properties) | 26 | for further information relating to interrupt properties) |
| @@ -10,8 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | as covered in | 10 | as covered in |
| 11 | Documentation/devicetree/bindings/regulator/regulator.txt. | 11 | Documentation/devicetree/bindings/regulator/regulator.txt. |
| 12 | 12 | ||
| 13 | - interrupt-parent : Specifies the phandle of the interrupt controller to | ||
| 14 | which the IRQs from CS35L35 are delivered to. | ||
| 15 | - interrupts : IRQ line info CS35L35. | 13 | - interrupts : IRQ line info CS35L35. |
| 16 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 14 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 17 | for further information relating to interrupt properties) | 15 | for further information relating to interrupt properties) |
| @@ -15,9 +15,6 @@ Optional properties: · 14 unmodified lines | |||
| 15 | - reset-gpios : a GPIO spec for the reset pin. If specified, it will be | 15 | - reset-gpios : a GPIO spec for the reset pin. If specified, it will be |
| 16 | deasserted before communication to the codec starts. | 16 | deasserted before communication to the codec starts. |
| 17 | 17 | ||
| 18 | - interrupt-parent : Specifies the phandle of the interrupt controller to | ||
| 19 | which the IRQs from CS42L42 are delivered to. | ||
| 20 | |||
| 21 | - interrupts : IRQ line info CS42L42. | 18 | - interrupts : IRQ line info CS42L42. |
| 22 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 19 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 23 | for further information relating to interrupt properties) | 20 | for further information relating to interrupt properties) |
| @@ -107,4 +104,4 @@ cs42l42: cs42l42@48 { · 83 unmodified lines | |||
| 107 | cirrus,btn-det-event-dbnce = <10>; | 104 | cirrus,btn-det-event-dbnce = <10>; |
| 108 | cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>; | 105 | cirrus,bias-lvls = <0x0F 0x08 0x04 0x01>; |
| 109 | cirrus,hs-bias-ramp-rate = <0x02>; | 106 | cirrus,hs-bias-ramp-rate = <0x02>; |
| 110 | }; | 107 | }; |
| @@ -15,8 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | information relating to regulators) | 15 | information relating to regulators) |
| 16 | 16 | ||
| 17 | Optional properties: | 17 | Optional properties: |
| 18 | - interrupt-parent: Specifies the phandle of the interrupt controller to which | ||
| 19 | the IRQs from DA7218 are delivered to. | ||
| 20 | - interrupts: IRQ line info for DA7218 chip. | 18 | - interrupts: IRQ line info for DA7218 chip. |
| 21 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for | 19 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for |
| 22 | further information relating to interrupt properties) | 20 | further information relating to interrupt properties) |
| @@ -8,8 +8,6 @@ Required properties: · 7 unmodified lines | |||
| 8 | - compatible : Should be "dlg,da7219" | 8 | - compatible : Should be "dlg,da7219" |
| 9 | - reg: Specifies the I2C slave address | 9 | - reg: Specifies the I2C slave address |
| 10 | 10 | ||
| 11 | - interrupt-parent : Specifies the phandle of the interrupt controller to which | ||
| 12 | the IRQs from DA7219 are delivered to. | ||
| 13 | - interrupts : IRQ line info for DA7219. | 11 | - interrupts : IRQ line info for DA7219. |
| 14 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for | 12 | (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt for |
| 15 | further information relating to interrupt properties) | 13 | further information relating to interrupt properties) |
| @@ -1,12 +0,0 @@ | |||
| 1 | DIO2125 Audio Driver | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "dioo,dio2125" | ||
| 5 | - enable-gpios : the gpio connected to the enable pin of the dio2125 | ||
| 6 | |||
| 7 | Example: | ||
| 8 | |||
| 9 | amp: analog-amplifier { | ||
| 10 | compatible = "dioo,dio2125"; | ||
| 11 | enable-gpios = <&gpio GPIOH_3 0>; | ||
| 12 | }; | ||
| @@ -1,10 +1,15 @@ | |||
| 1 | ES7134 i2s DA converter | 1 | ES7134 i2s DA converter |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "everest,es7134" or "everest,es7144" | 4 | - compatible : "everest,es7134" or |
| 5 | "everest,es7144" or | ||
| 6 | "everest,es7154" | ||
| 7 | - VDD-supply : regulator phandle for the VDD supply | ||
| 8 | - PVDD-supply: regulator phandle for the PVDD supply for the es7154 | ||
| 5 | 9 | ||
| 6 | Example: | 10 | Example: |
| 7 | 11 | ||
| 8 | i2s_codec: external-codec { | 12 | i2s_codec: external-codec { |
| 9 | compatible = "everest,es7134"; | 13 | compatible = "everest,es7134"; |
| 14 | VDD-supply = <&vcc_5v>; | ||
| 10 | }; | 15 | }; |
| @@ -0,0 +1,28 @@ | |||
| 1 | ES7241 i2s AD converter | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "everest,es7241" | ||
| 5 | - VDDP-supply: regulator phandle for the VDDA supply | ||
| 6 | - VDDA-supply: regulator phandle for the VDDP supply | ||
| 7 | - VDDD-supply: regulator phandle for the VDDD supply | ||
| 8 | |||
| 9 | Optional properties: | ||
| 10 | - reset-gpios: gpio connected to the reset pin | ||
| 11 | - m0-gpios : gpio connected to the m0 pin | ||
| 12 | - m1-gpios : gpio connected to the m1 pin | ||
| 13 | - everest,sdout-pull-down: | ||
| 14 | Format used by the serial interface is controlled by pulling | ||
| 15 | the sdout. If the sdout is pulled down, leftj format is used. | ||
| 16 | If this property is not provided, sdout is assumed to pulled | ||
| 17 | up and i2s format is used | ||
| 18 | |||
| 19 | Example: | ||
| 20 | |||
| 21 | linein: audio-codec@2 { | ||
| 22 | #sound-dai-cells = <0>; | ||
| 23 | compatible = "everest,es7241"; | ||
| 24 | VDDA-supply = <&vcc_3v3>; | ||
| 25 | VDDP-supply = <&vcc_3v3>; | ||
| 26 | VDDD-supply = <&vcc_3v3>; | ||
| 27 | reset-gpios = <&gpio GPIOH_42>; | ||
| 28 | }; | ||
| @@ -18,8 +18,6 @@ Required properties: · 17 unmodified lines | |||
| 18 | encoded based on the information in section 2) | 18 | encoded based on the information in section 2) |
| 19 | depending on the type of interrupt controller you | 19 | depending on the type of interrupt controller you |
| 20 | have. | 20 | have. |
| 21 | - interrupt-parent: The phandle for the interrupt controller that | ||
| 22 | services interrupts for this device. | ||
| 23 | - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. | 21 | - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs. |
| 24 | This number is the maximum allowed value for SFCSR[TFWM0]. | 22 | This number is the maximum allowed value for SFCSR[TFWM0]. |
| 25 | - clocks: "ipg" - Required clock for the SSI unit | 23 | - clocks: "ipg" - Required clock for the SSI unit |
| @@ -0,0 +1,27 @@ | |||
| 1 | Marvell PXA2xx audio complex | ||
| 2 | |||
| 3 | This descriptions matches the AC97 controller found in pxa2xx and pxa3xx series. | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - compatible: should be one of the following: | ||
| 7 | "marvell,pxa250-ac97" | ||
| 8 | "marvell,pxa270-ac97" | ||
| 9 | "marvell,pxa300-ac97" | ||
| 10 | - reg: device MMIO address space | ||
| 11 | - interrupts: single interrupt generated by AC97 IP | ||
| 12 | - clocks: input clock of the AC97 IP, refer to clock-bindings.txt | ||
| 13 | |||
| 14 | Optional properties: | ||
| 15 | - pinctrl-names, pinctrl-0: refer to pinctrl-bindings.txt | ||
| 16 | - reset-gpios: gpio used for AC97 reset, refer to gpio.txt | ||
| 17 | |||
| 18 | Example: | ||
| 19 | ac97: sound@40500000 { | ||
| 20 | compatible = "marvell,pxa250-ac97"; | ||
| 21 | reg = < 0x40500000 0x1000 >; | ||
| 22 | interrupts = <14>; | ||
| 23 | reset-gpios = <&gpio 113 GPIO_ACTIVE_HIGH>; | ||
| 24 | #sound-dai-cells = <1>; | ||
| 25 | pinctrl-names = "default"; | ||
| 26 | pinctrl-0 = < &pmux_ac97_default >; | ||
| 27 | }; | ||
| @@ -5,24 +5,30 @@ Required properties: · 4 unmodified lines | |||
| 5 | compatible Must be "mrvl,pxa-ssp-dai" | 5 | compatible Must be "mrvl,pxa-ssp-dai" |
| 6 | port A phandle reference to a PXA ssp upstream device | 6 | port A phandle reference to a PXA ssp upstream device |
| 7 | 7 | ||
| 8 | Optional properties: | ||
| 9 | |||
| 10 | clock-names | ||
| 11 | clocks Through "clock-names" and "clocks", external clocks | ||
| 12 | can be configured. If a clock names "extclk" exists, | ||
| 13 | it will be set to the mclk rate of the audio stream | ||
| 14 | and be used as clock provider of the DAI. | ||
| 15 | |||
| 8 | Example: | 16 | Example: |
| 9 | 17 | ||
| 10 | /* upstream device */ | 18 | /* upstream device */ |
| 11 | 19 | ||
| 12 | ssp0: ssp@41000000 { | 20 | ssp1: ssp@41000000 { |
| 13 | compatible = "mrvl,pxa3xx-ssp"; | 21 | compatible = "mrvl,pxa3xx-ssp"; |
| 14 | reg = <0x41000000 0x40>; | 22 | reg = <0x41000000 0x40>; |
| 15 | interrupts = <24>; | 23 | interrupts = <24>; |
| 16 | clock-names = "pxa27x-ssp.0"; | 24 | clock-names = "pxa27x-ssp.0"; |
| 17 | dmas = <&dma 13 | ||
| 18 | &dma 14>; | ||
| 19 | dma-names = "rx", "tx"; | ||
| 20 | }; | 25 | }; |
| 21 | 26 | ||
| 22 | /* DAI as user */ | 27 | /* DAI as user */ |
| 23 | 28 | ||
| 24 | ssp_dai0: ssp_dai@0 { | 29 | ssp_dai0: ssp_dai@0 { |
| 25 | compatible = "mrvl,pxa-ssp-dai"; | 30 | compatible = "mrvl,pxa-ssp-dai"; |
| 26 | port = <&ssp0>; | 31 | port = <&ssp1>; |
| 32 | #sound-dai-cells = <0>; | ||
| 27 | }; | 33 | }; |
| 28 | 34 | ||
| @@ -1,15 +0,0 @@ | |||
| 1 | DT bindings for ARM PXA2xx PCM platform driver | ||
| 2 | |||
| 3 | This is just a dummy driver that registers the PXA ASoC platform driver. | ||
| 4 | It does not have any resources assigned. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | |||
| 8 | - compatible 'mrvl,pxa-pcm-audio' | ||
| 9 | |||
| 10 | Example: | ||
| 11 | |||
| 12 | pxa_pcm_audio: snd_soc_pxa_audio { | ||
| 13 | compatible = "mrvl,pxa-pcm-audio"; | ||
| 14 | }; | ||
| 15 | |||
| @@ -0,0 +1,24 @@ | |||
| 1 | Name prefix: | ||
| 2 | |||
| 3 | Card implementing the routing property define the connection between | ||
| 4 | audio components as list of string pair. Component using the same | ||
| 5 | sink/source names may use the name prefix property to prepend the | ||
| 6 | name of their sinks/sources with the provided string. | ||
| 7 | |||
| 8 | Optional name prefix property: | ||
| 9 | - sound-name-prefix : string using as prefix for the sink/source names of | ||
| 10 | the component. | ||
| 11 | |||
| 12 | Example: Two instances of the same component. | ||
| 13 | |||
| 14 | amp0: analog-amplifier@0 { | ||
| 15 | compatible = "simple-audio-amplifier"; | ||
| 16 | enable-gpios = <&gpio GPIOH_3 0>; | ||
| 17 | sound-name-prefix = "FRONT"; | ||
| 18 | }; | ||
| 19 | |||
| 20 | amp1: analog-amplifier@1 { | ||
| 21 | compatible = "simple-audio-amplifier"; | ||
| 22 | enable-gpios = <&gpio GPIOH_4 0>; | ||
| 23 | sound-name-prefix = "BACK"; | ||
| 24 | }; | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | <MPU access base address, size>, | 6 | <MPU access base address, size>, |
| 7 | <L3 interconnect address, size>; | 7 | <L3 interconnect address, size>; |
| 8 | - interrupts: Interrupt number for DMIC | 8 | - interrupts: Interrupt number for DMIC |
| 9 | - interrupt-parent: The parent interrupt controller | ||
| 10 | - ti,hwmods: Name of the hwmod associated with OMAP dmic IP | 9 | - ti,hwmods: Name of the hwmod associated with OMAP dmic IP |
| 11 | 10 | ||
| 12 | Example: | 11 | Example: |
| @@ -15,7 +15,6 @@ Required properties: · 14 unmodified lines | |||
| 15 | <TX irq>, | 15 | <TX irq>, |
| 16 | <RX irq>; | 16 | <RX irq>; |
| 17 | - interrupt-names: Array of strings associated with the interrupt numbers | 17 | - interrupt-names: Array of strings associated with the interrupt numbers |
| 18 | - interrupt-parent: The parent interrupt controller | ||
| 19 | - ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC) | 18 | - ti,buffer-size: Size of the FIFO on the port (OMAP2430 and newer SoC) |
| 20 | - ti,hwmods: Name of the hwmod associated to the McBSP port | 19 | - ti,hwmods: Name of the hwmod associated to the McBSP port |
| 21 | 20 | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | <MPU access base address, size>, | 6 | <MPU access base address, size>, |
| 7 | <L3 interconnect address, size>; | 7 | <L3 interconnect address, size>; |
| 8 | - interrupts: Interrupt number for McPDM | 8 | - interrupts: Interrupt number for McPDM |
| 9 | - interrupt-parent: The parent interrupt controller | ||
| 10 | - ti,hwmods: Name of the hwmod associated to the McPDM | 9 | - ti,hwmods: Name of the hwmod associated to the McPDM |
| 11 | 10 | ||
| 12 | Example: | 11 | Example: |
| @@ -30,7 +30,7 @@ Required properties: · 29 unmodified lines | |||
| 30 | 30 | ||
| 31 | Board connectors: | 31 | Board connectors: |
| 32 | * Headset Mic | 32 | * Headset Mic |
| 33 | * Secondary Mic", | 33 | * Secondary Mic |
| 34 | * DMIC | 34 | * DMIC |
| 35 | * Ext Spk | 35 | * Ext Spk |
| 36 | 36 | ||
| @@ -7,7 +7,7 @@ This binding describes the APQ8096 sound card, which uses qdsp for audio. · 6 unmodified lines | |||
| 7 | Value type: <stringlist> | 7 | Value type: <stringlist> |
| 8 | Definition: must be "qcom,apq8096-sndcard" | 8 | Definition: must be "qcom,apq8096-sndcard" |
| 9 | 9 | ||
| 10 | - qcom,audio-routing: | 10 | - audio-routing: |
| 11 | Usage: Optional | 11 | Usage: Optional |
| 12 | Value type: <stringlist> | 12 | Value type: <stringlist> |
| 13 | Definition: A list of the connections between audio components. | 13 | Definition: A list of the connections between audio components. |
| @@ -35,7 +35,7 @@ This binding describes the APQ8096 sound card, which uses qdsp for audio. · 21 unmodified lines | |||
| 35 | "Digital Mic3" | 35 | "Digital Mic3" |
| 36 | 36 | ||
| 37 | Audio pins and MicBias on WCD9335 Codec: | 37 | Audio pins and MicBias on WCD9335 Codec: |
| 38 | "MIC_BIAS1 | 38 | "MIC_BIAS1" |
| 39 | "MIC_BIAS2" | 39 | "MIC_BIAS2" |
| 40 | "MIC_BIAS3" | 40 | "MIC_BIAS3" |
| 41 | "MIC_BIAS4" | 41 | "MIC_BIAS4" |
| @@ -49,6 +49,12 @@ This binding describes the APQ8096 sound card, which uses qdsp for audio. · 7 unmodified lines | |||
| 49 | "DMIC1" | 49 | "DMIC1" |
| 50 | "DMIC2" | 50 | "DMIC2" |
| 51 | "DMIC3" | 51 | "DMIC3" |
| 52 | |||
| 53 | - model: | ||
| 54 | Usage: required | ||
| 55 | Value type: <stringlist> | ||
| 56 | Definition: The user-visible name of this sound card. | ||
| 57 | |||
| 52 | = dailinks | 58 | = dailinks |
| 53 | Each subnode of sndcard represents either a dailink, and subnodes of each | 59 | Each subnode of sndcard represents either a dailink, and subnodes of each |
| 54 | dailinks would be cpu/codec/platform dais. | 60 | dailinks would be cpu/codec/platform dais. |
| @@ -79,11 +85,16 @@ dailinks would be cpu/codec/platform dais. · 24 unmodified lines | |||
| 79 | Value type: <phandle with arguments> | 85 | Value type: <phandle with arguments> |
| 80 | Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node. | 86 | Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node. |
| 81 | 87 | ||
| 88 | Obsolete: | ||
| 89 | qcom,model: String for soundcard name (Use model instead) | ||
| 90 | qcom,audio-routing: A list of the connections between audio components. | ||
| 91 | (Use audio-routing instead) | ||
| 92 | |||
| 82 | Example: | 93 | Example: |
| 83 | 94 | ||
| 84 | audio { | 95 | audio { |
| 85 | compatible = "qcom,apq8096-sndcard"; | 96 | compatible = "qcom,apq8096-sndcard"; |
| 86 | qcom,model = "DB820c"; | 97 | model = "DB820c"; |
| 87 | 98 | ||
| 88 | mm1-dai-link { | 99 | mm1-dai-link { |
| 89 | link-name = "MultiMedia1"; | 100 | link-name = "MultiMedia1"; |
| @@ -7,7 +7,6 @@ Bindings for codec Analog IP which is integrated in pmic pm8916, · 6 unmodified lines | |||
| 7 | Required properties | 7 | Required properties |
| 8 | - compatible = "qcom,pm8916-wcd-analog-codec"; | 8 | - compatible = "qcom,pm8916-wcd-analog-codec"; |
| 9 | - reg: represents the slave base address provided to the peripheral. | 9 | - reg: represents the slave base address provided to the peripheral. |
| 10 | - interrupt-parent : The parent interrupt controller. | ||
| 11 | - interrupts: List of interrupts in given SPMI peripheral. | 10 | - interrupts: List of interrupts in given SPMI peripheral. |
| 12 | - interrupt-names: Names specified to above list of interrupts in same | 11 | - interrupt-names: Names specified to above list of interrupts in same |
| 13 | order. List of supported interrupt names are: | 12 | order. List of supported interrupt names are: |
| @@ -18,6 +18,11 @@ used by the apr service device. · 17 unmodified lines | |||
| 18 | = ADM routing | 18 | = ADM routing |
| 19 | "routing" subnode of the ADM node represents adm routing specific configuration | 19 | "routing" subnode of the ADM node represents adm routing specific configuration |
| 20 | 20 | ||
| 21 | - compatible: | ||
| 22 | Usage: required | ||
| 23 | Value type: <stringlist> | ||
| 24 | Definition: must be "qcom,q6adm-routing". | ||
| 25 | |||
| 21 | - #sound-dai-cells | 26 | - #sound-dai-cells |
| 22 | Usage: required | 27 | Usage: required |
| 23 | Value type: <u32> | 28 | Value type: <u32> |
| @@ -28,6 +33,7 @@ q6adm@8 { · 4 unmodified lines | |||
| 28 | compatible = "qcom,q6adm"; | 33 | compatible = "qcom,q6adm"; |
| 29 | reg = <APR_SVC_ADM>; | 34 | reg = <APR_SVC_ADM>; |
| 30 | q6routing: routing { | 35 | q6routing: routing { |
| 36 | compatible = "qcom,q6adm-routing"; | ||
| 31 | #sound-dai-cells = <0>; | 37 | #sound-dai-cells = <0>; |
| 32 | }; | 38 | }; |
| 33 | }; | 39 | }; |
| @@ -17,6 +17,11 @@ used by all apr services. Must contain the following properties. · 16 unmodified lines | |||
| 17 | subnode of "dais" representing board specific dai setup. | 17 | subnode of "dais" representing board specific dai setup. |
| 18 | "dais" node should have following properties followed by dai children. | 18 | "dais" node should have following properties followed by dai children. |
| 19 | 19 | ||
| 20 | - compatible: | ||
| 21 | Usage: required | ||
| 22 | Value type: <stringlist> | ||
| 23 | Definition: must be "qcom,q6afe-dais" | ||
| 24 | |||
| 20 | - #sound-dai-cells | 25 | - #sound-dai-cells |
| 21 | Usage: required | 26 | Usage: required |
| 22 | Value type: <u32> | 27 | Value type: <u32> |
| @@ -100,6 +105,7 @@ q6afe@4 { · 77 unmodified lines | |||
| 100 | reg = <APR_SVC_AFE>; | 105 | reg = <APR_SVC_AFE>; |
| 101 | 106 | ||
| 102 | dais { | 107 | dais { |
| 108 | compatible = "qcom,q6afe-dais"; | ||
| 103 | #sound-dai-cells = <1>; | 109 | #sound-dai-cells = <1>; |
| 104 | #address-cells = <1>; | 110 | #address-cells = <1>; |
| 105 | #size-cells = <0>; | 111 | #size-cells = <0>; |
| @@ -17,6 +17,11 @@ used by the apr service device. · 16 unmodified lines | |||
| 17 | = ASM DAIs (Digial Audio Interface) | 17 | = ASM DAIs (Digial Audio Interface) |
| 18 | "dais" subnode of the ASM node represents dai specific configuration | 18 | "dais" subnode of the ASM node represents dai specific configuration |
| 19 | 19 | ||
| 20 | - compatible: | ||
| 21 | Usage: required | ||
| 22 | Value type: <stringlist> | ||
| 23 | Definition: must be "qcom,q6asm-dais". | ||
| 24 | |||
| 20 | - #sound-dai-cells | 25 | - #sound-dai-cells |
| 21 | Usage: required | 26 | Usage: required |
| 22 | Value type: <u32> | 27 | Value type: <u32> |
| @@ -28,6 +33,7 @@ q6asm@7 { · 5 unmodified lines | |||
| 28 | compatible = "qcom,q6asm"; | 33 | compatible = "qcom,q6asm"; |
| 29 | reg = <APR_SVC_ASM>; | 34 | reg = <APR_SVC_ASM>; |
| 30 | q6asmdai: dais { | 35 | q6asmdai: dais { |
| 36 | compatible = "qcom,q6asm-dais"; | ||
| 31 | #sound-dai-cells = <1>; | 37 | #sound-dai-cells = <1>; |
| 32 | }; | 38 | }; |
| 33 | }; | 39 | }; |
| @@ -0,0 +1,80 @@ | |||
| 1 | * Qualcomm Technologies Inc. SDM845 ASoC sound card driver | ||
| 2 | |||
| 3 | This binding describes the SDM845 sound card, which uses qdsp for audio. | ||
| 4 | |||
| 5 | - compatible: | ||
| 6 | Usage: required | ||
| 7 | Value type: <stringlist> | ||
| 8 | Definition: must be "qcom,sdm845-sndcard" | ||
| 9 | |||
| 10 | - audio-routing: | ||
| 11 | Usage: Optional | ||
| 12 | Value type: <stringlist> | ||
| 13 | Definition: A list of the connections between audio components. | ||
| 14 | Each entry is a pair of strings, the first being the | ||
| 15 | connection's sink, the second being the connection's | ||
| 16 | source. Valid names could be power supplies, MicBias | ||
| 17 | of codec and the jacks on the board. | ||
| 18 | |||
| 19 | - model: | ||
| 20 | Usage: required | ||
| 21 | Value type: <stringlist> | ||
| 22 | Definition: The user-visible name of this sound card. | ||
| 23 | |||
| 24 | = dailinks | ||
| 25 | Each subnode of sndcard represents either a dailink, and subnodes of each | ||
| 26 | dailinks would be cpu/codec/platform dais. | ||
| 27 | |||
| 28 | - link-name: | ||
| 29 | Usage: required | ||
| 30 | Value type: <string> | ||
| 31 | Definition: User friendly name for dai link | ||
| 32 | |||
| 33 | = CPU, PLATFORM, CODEC dais subnodes | ||
| 34 | - cpu: | ||
| 35 | Usage: required | ||
| 36 | Value type: <subnode> | ||
| 37 | Definition: cpu dai sub-node | ||
| 38 | |||
| 39 | - codec: | ||
| 40 | Usage: required | ||
| 41 | Value type: <subnode> | ||
| 42 | Definition: codec dai sub-node | ||
| 43 | |||
| 44 | - platform: | ||
| 45 | Usage: Optional | ||
| 46 | Value type: <subnode> | ||
| 47 | Definition: platform dai sub-node | ||
| 48 | |||
| 49 | - sound-dai: | ||
| 50 | Usage: required | ||
| 51 | Value type: <phandle> | ||
| 52 | Definition: dai phandle/s and port of CPU/CODEC/PLATFORM node. | ||
| 53 | |||
| 54 | Example: | ||
| 55 | |||
| 56 | audio { | ||
| 57 | compatible = "qcom,sdm845-sndcard"; | ||
| 58 | model = "sdm845-snd-card"; | ||
| 59 | pinctrl-names = "default", "sleep"; | ||
| 60 | pinctrl-0 = <&pri_mi2s_active &pri_mi2s_ws_active>; | ||
| 61 | pinctrl-1 = <&pri_mi2s_sleep &pri_mi2s_ws_sleep>; | ||
| 62 | |||
| 63 | mm1-dai-link { | ||
| 64 | link-name = "MultiMedia1"; | ||
| 65 | cpu { | ||
| 66 | sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; | ||
| 67 | }; | ||
| 68 | }; | ||
| 69 | |||
| 70 | pri-mi2s-dai-link { | ||
| 71 | link-name = "PRI MI2S Playback"; | ||
| 72 | cpu { | ||
| 73 | sound-dai = <&q6afedai PRIMARY_MI2S_RX>; | ||
| 74 | }; | ||
| 75 | |||
| 76 | platform { | ||
| 77 | sound-dai = <&q6routing>; | ||
| 78 | }; | ||
| 79 | }; | ||
| 80 | }; | ||
| @@ -0,0 +1,123 @@ | |||
| 1 | QCOM WCD9335 Codec | ||
| 2 | |||
| 3 | Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC, supports | ||
| 4 | Qualcomm Technologies, Inc. (QTI) multimedia solutions, including | ||
| 5 | the MSM8996, MSM8976, and MSM8956 chipsets. It has in-built | ||
| 6 | Soundwire controller, interrupt mux. It supports both I2S/I2C and | ||
| 7 | SLIMbus audio interfaces. | ||
| 8 | |||
| 9 | Required properties with SLIMbus Interface: | ||
| 10 | |||
| 11 | - compatible: | ||
| 12 | Usage: required | ||
| 13 | Value type: <stringlist> | ||
| 14 | Definition: For SLIMbus interface it should be "slimMID,PID", | ||
| 15 | textual representation of Manufacturer ID, Product Code, | ||
| 16 | shall be in lower case hexadecimal with leading zeroes | ||
| 17 | suppressed. Refer to slimbus/bus.txt for details. | ||
| 18 | Should be: | ||
| 19 | "slim217,1a0" for MSM8996 and APQ8096 SoCs with SLIMbus. | ||
| 20 | |||
| 21 | - reg | ||
| 22 | Usage: required | ||
| 23 | Value type: <u32 u32> | ||
| 24 | Definition: Should be ('Device index', 'Instance ID') | ||
| 25 | |||
| 26 | - interrupts | ||
| 27 | Usage: required | ||
| 28 | Value type: <prop-encoded-array> | ||
| 29 | Definition: Interrupts via WCD INTR1 and INTR2 pins | ||
| 30 | |||
| 31 | - interrupt-names: | ||
| 32 | Usage: required | ||
| 33 | Value type: <String array> | ||
| 34 | Definition: Interrupt names of WCD INTR1 and INTR2 | ||
| 35 | Should be: "intr1", "intr2" | ||
| 36 | |||
| 37 | - reset-gpio: | ||
| 38 | Usage: required | ||
| 39 | Value type: <String Array> | ||
| 40 | Definition: Reset gpio line | ||
| 41 | |||
| 42 | - qcom,ifd: | ||
| 43 | Usage: required | ||
| 44 | Value type: <phandle> | ||
| 45 | Definition: SLIM interface device | ||
| 46 | |||
| 47 | - clocks: | ||
| 48 | Usage: required | ||
| 49 | Value type: <prop-encoded-array> | ||
| 50 | Definition: See clock-bindings.txt section "consumers". List of | ||
| 51 | three clock specifiers for mclk, mclk2 and slimbus clock. | ||
| 52 | |||
| 53 | - clock-names: | ||
| 54 | Usage: required | ||
| 55 | Value type: <string> | ||
| 56 | Definition: Must contain "mclk", "mclk2" and "slimbus" strings. | ||
| 57 | |||
| 58 | - vdd-buck-supply: | ||
| 59 | Usage: required | ||
| 60 | Value type: <phandle> | ||
| 61 | Definition: Should contain a reference to the 1.8V buck supply | ||
| 62 | |||
| 63 | - vdd-buck-sido-supply: | ||
| 64 | Usage: required | ||
| 65 | Value type: <phandle> | ||
| 66 | Definition: Should contain a reference to the 1.8V SIDO buck supply | ||
| 67 | |||
| 68 | - vdd-rx-supply: | ||
| 69 | Usage: required | ||
| 70 | Value type: <phandle> | ||
| 71 | Definition: Should contain a reference to the 1.8V rx supply | ||
| 72 | |||
| 73 | - vdd-tx-supply: | ||
| 74 | Usage: required | ||
| 75 | Value type: <phandle> | ||
| 76 | Definition: Should contain a reference to the 1.8V tx supply | ||
| 77 | |||
| 78 | - vdd-vbat-supply: | ||
| 79 | Usage: Optional | ||
| 80 | Value type: <phandle> | ||
| 81 | Definition: Should contain a reference to the vbat supply | ||
| 82 | |||
| 83 | - vdd-micbias-supply: | ||
| 84 | Usage: required | ||
| 85 | Value type: <phandle> | ||
| 86 | Definition: Should contain a reference to the micbias supply | ||
| 87 | |||
| 88 | - vdd-io-supply: | ||
| 89 | Usage: required | ||
| 90 | Value type: <phandle> | ||
| 91 | Definition: Should contain a reference to the 1.8V io supply | ||
| 92 | |||
| 93 | - interrupt-controller: | ||
| 94 | Usage: required | ||
| 95 | Definition: Indicating that this is a interrupt controller | ||
| 96 | |||
| 97 | - #interrupt-cells: | ||
| 98 | Usage: required | ||
| 99 | Value type: <int> | ||
| 100 | Definition: should be 1 | ||
| 101 | |||
| 102 | #sound-dai-cells | ||
| 103 | Usage: required | ||
| 104 | Value type: <u32> | ||
| 105 | Definition: Must be 1 | ||
| 106 | |||
| 107 | codec@1{ | ||
| 108 | compatible = "slim217,1a0"; | ||
| 109 | reg = <1 0>; | ||
| 110 | interrupts = <&msmgpio 54 IRQ_TYPE_LEVEL_HIGH>; | ||
| 111 | interrupt-names = "intr2" | ||
| 112 | reset-gpio = <&msmgpio 64 0>; | ||
| 113 | qcom,ifd = <&wc9335_ifd>; | ||
| 114 | clock-names = "mclk", "native"; | ||
| 115 | clocks = <&rpmcc RPM_SMD_DIV_CLK1>, | ||
| 116 | <&rpmcc RPM_SMD_BB_CLK1>; | ||
| 117 | vdd-buck-supply = <&pm8994_s4>; | ||
| 118 | vdd-rx-supply = <&pm8994_s4>; | ||
| 119 | vdd-buck-sido-supply = <&pm8994_s4>; | ||
| 120 | vdd-tx-supply = <&pm8994_s4>; | ||
| 121 | vdd-io-supply = <&pm8994_s4>; | ||
| 122 | #sound-dai-cells = <1>; | ||
| 123 | } | ||
| @@ -352,6 +352,7 @@ Required properties: · 351 unmodified lines | |||
| 352 | - "renesas,rcar_sound-r8a7794" (R-Car E2) | 352 | - "renesas,rcar_sound-r8a7794" (R-Car E2) |
| 353 | - "renesas,rcar_sound-r8a7795" (R-Car H3) | 353 | - "renesas,rcar_sound-r8a7795" (R-Car H3) |
| 354 | - "renesas,rcar_sound-r8a7796" (R-Car M3-W) | 354 | - "renesas,rcar_sound-r8a7796" (R-Car M3-W) |
| 355 | - "renesas,rcar_sound-r8a77965" (R-Car M3-N) | ||
| 355 | - reg : Should contain the register physical address. | 356 | - reg : Should contain the register physical address. |
| 356 | required register is | 357 | required register is |
| 357 | SRU/ADG/SSI if generation1 | 358 | SRU/ADG/SSI if generation1 |
| @@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | - compatible: should be one of the following: | 8 | - compatible: should be one of the following: |
| 9 | - "rockchip,rk3066-i2s": for rk3066 | 9 | - "rockchip,rk3066-i2s": for rk3066 |
| 10 | - "rockchip,px30-i2s", "rockchip,rk3066-i2s": for px30 | ||
| 10 | - "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036 | 11 | - "rockchip,rk3036-i2s", "rockchip,rk3066-i2s": for rk3036 |
| 11 | - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188 | 12 | - "rockchip,rk3188-i2s", "rockchip,rk3066-i2s": for rk3188 |
| 12 | - "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228 | 13 | - "rockchip,rk3228-i2s", "rockchip,rk3066-i2s": for rk3228 |
| @@ -14,7 +14,6 @@ Optional properties: · 13 unmodified lines | |||
| 14 | - clocks: The phandle of the master clock to the CODEC | 14 | - clocks: The phandle of the master clock to the CODEC |
| 15 | - clock-names: Should be "mclk" | 15 | - clock-names: Should be "mclk" |
| 16 | 16 | ||
| 17 | - interrupt-parent: The phandle for the interrupt controller. | ||
| 18 | - interrupts: The interrupt number to the cpu. The interrupt specifier format | 17 | - interrupts: The interrupt number to the cpu. The interrupt specifier format |
| 19 | depends on the interrupt controller. | 18 | depends on the interrupt controller. |
| 20 | 19 | ||
| @@ -0,0 +1,50 @@ | |||
| 1 | RT5682 audio CODEC | ||
| 2 | |||
| 3 | This device supports I2C only. | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | |||
| 7 | - compatible : "realtek,rt5682" or "realtek,rt5682i" | ||
| 8 | |||
| 9 | - reg : The I2C address of the device. | ||
| 10 | |||
| 11 | Optional properties: | ||
| 12 | |||
| 13 | - interrupts : The CODEC's interrupt output. | ||
| 14 | |||
| 15 | - realtek,dmic1-data-pin | ||
| 16 | 0: dmic1 is not used | ||
| 17 | 1: using GPIO2 pin as dmic1 data pin | ||
| 18 | 2: using GPIO5 pin as dmic1 data pin | ||
| 19 | |||
| 20 | - realtek,dmic1-clk-pin | ||
| 21 | 0: using GPIO1 pin as dmic1 clock pin | ||
| 22 | 1: using GPIO3 pin as dmic1 clock pin | ||
| 23 | |||
| 24 | - realtek,jd-src | ||
| 25 | 0: No JD is used | ||
| 26 | 1: using JD1 as JD source | ||
| 27 | |||
| 28 | - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin. | ||
| 29 | |||
| 30 | Pins on the device (for linking into audio routes) for RT5682: | ||
| 31 | |||
| 32 | * DMIC L1 | ||
| 33 | * DMIC R1 | ||
| 34 | * IN1P | ||
| 35 | * HPOL | ||
| 36 | * HPOR | ||
| 37 | |||
| 38 | Example: | ||
| 39 | |||
| 40 | rt5682 { | ||
| 41 | compatible = "realtek,rt5682i"; | ||
| 42 | reg = <0x1a>; | ||
| 43 | interrupt-parent = <&gpio>; | ||
| 44 | interrupts = <TEGRA_GPIO(U, 6) GPIO_ACTIVE_HIGH>; | ||
| 45 | realtek,ldo1-en-gpios = | ||
| 46 | <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_HIGH>; | ||
| 47 | realtek,dmic1-data-pin = <1>; | ||
| 48 | realtek,dmic1-clk-pin = <1>; | ||
| 49 | realtek,jd-src = <1>; | ||
| 50 | }; | ||
| @@ -17,7 +17,7 @@ Optional properties: · 16 unmodified lines | |||
| 17 | 17 | ||
| 18 | - VDDD-supply : the regulator provider of VDDD | 18 | - VDDD-supply : the regulator provider of VDDD |
| 19 | 19 | ||
| 20 | - micbias-resistor-k-ohms : the bias resistor to be used in kOmhs | 20 | - micbias-resistor-k-ohms : the bias resistor to be used in kOhms |
| 21 | The resistor can take values of 2k, 4k or 8k. | 21 | The resistor can take values of 2k, 4k or 8k. |
| 22 | If set to 0 it will be off. | 22 | If set to 0 it will be off. |
| 23 | If this node is not mentioned or if the value is unknown, then | 23 | If this node is not mentioned or if the value is unknown, then |
| @@ -0,0 +1,12 @@ | |||
| 1 | Simple Amplifier Audio Driver | ||
| 2 | |||
| 3 | Required properties: | ||
| 4 | - compatible : "dioo,dio2125" or "simple-audio-amplifier" | ||
| 5 | - enable-gpios : the gpio connected to the enable pin of the simple amplifier | ||
| 6 | |||
| 7 | Example: | ||
| 8 | |||
| 9 | amp: analog-amplifier { | ||
| 10 | compatible = "simple-audio-amplifier"; | ||
| 11 | enable-gpios = <&gpio GPIOH_3 0>; | ||
| 12 | }; | ||
| @@ -7,6 +7,7 @@ powerdown (optional). · 6 unmodified lines | |||
| 7 | Required properties: | 7 | Required properties: |
| 8 | 8 | ||
| 9 | - compatible: should be one of the following: | 9 | - compatible: should be one of the following: |
| 10 | - "ti,tas5707" | ||
| 10 | - "ti,tas5711", | 11 | - "ti,tas5711", |
| 11 | - "ti,tas5717", | 12 | - "ti,tas5717", |
| 12 | - "ti,tas5719", | 13 | - "ti,tas5719", |
| @@ -10,7 +10,6 @@ Required properties: · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | - compatible: Should contain "ti,ts3a227e". | 11 | - compatible: Should contain "ti,ts3a227e". |
| 12 | - reg: The i2c address. Should contain <0x3b>. | 12 | - reg: The i2c address. Should contain <0x3b>. |
| 13 | - interrupt-parent: The parent interrupt controller | ||
| 14 | - interrupts: Interrupt number for /INT pin from the 227e | 13 | - interrupts: Interrupt number for /INT pin from the 227e |
| 15 | 14 | ||
| 16 | Optional properies: | 15 | Optional properies: |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupts : The interrupt output from the device. | 8 | - interrupts : The interrupt output from the device. |
| 9 | - interrupt-parent : The parent interrupt controller. | ||
| 10 | - <name>-supply : Phandle to the regulator <name> supply | 9 | - <name>-supply : Phandle to the regulator <name> supply |
| 11 | 10 | ||
| 12 | Example: | 11 | Example: |
| @@ -26,7 +26,6 @@ Optional properties: · 25 unmodified lines | |||
| 26 | - interrupt-controller : These devices contain interrupt controllers | 26 | - interrupt-controller : These devices contain interrupt controllers |
| 27 | and may provide interrupt services to other devices if they have an | 27 | and may provide interrupt services to other devices if they have an |
| 28 | interrupt line connected. | 28 | interrupt line connected. |
| 29 | - interrupt-parent : The parent interrupt controller. | ||
| 30 | - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. | 29 | - #interrupt-cells: the number of cells to describe an IRQ, this should be 2. |
| 31 | The first cell is the IRQ number. | 30 | The first cell is the IRQ number. |
| 32 | The second cell is the flags, encoded as the trigger masks from | 31 | The second cell is the flags, encoded as the trigger masks from |
| @@ -57,6 +56,12 @@ Optional properties: · 24 unmodified lines | |||
| 57 | 56 | ||
| 58 | - wlf,ldoena-always-driven : If present LDOENA is always driven. | 57 | - wlf,ldoena-always-driven : If present LDOENA is always driven. |
| 59 | 58 | ||
| 59 | - wlf,spkmode-pu : If present enable the internal pull-up resistor on | ||
| 60 | the SPKMODE pin. | ||
| 61 | |||
| 62 | - wlf,csnaddr-pd : If present enable the internal pull-down resistor on | ||
| 63 | the CS/ADDR pin. | ||
| 64 | |||
| 60 | Example: | 65 | Example: |
| 61 | 66 | ||
| 62 | wm8994: codec@1a { | 67 | wm8994: codec@1a { |
| @@ -12,8 +12,6 @@ Required properties: · 11 unmodified lines | |||
| 12 | information for the interrupt. This should be encoded based on | 12 | information for the interrupt. This should be encoded based on |
| 13 | the information in section 2) depending on the type of interrupt | 13 | the information in section 2) depending on the type of interrupt |
| 14 | controller you have. | 14 | controller you have. |
| 15 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 16 | services interrupts for this device. | ||
| 17 | - clock-frequency : input clock frequency to non FSL_SOC cores | 15 | - clock-frequency : input clock frequency to non FSL_SOC cores |
| 18 | 16 | ||
| 19 | Optional properties: | 17 | Optional properties: |
| @@ -6,8 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - "renesas,hspi-r8a7778" (R-Car M1) | 6 | - "renesas,hspi-r8a7778" (R-Car M1) |
| 7 | - "renesas,hspi-r8a7779" (R-Car H1) | 7 | - "renesas,hspi-r8a7779" (R-Car H1) |
| 8 | - reg : Offset and length of the register set for the device | 8 | - reg : Offset and length of the register set for the device |
| 9 | - interrupt-parent : The phandle for the interrupt controller that | ||
| 10 | services interrupts for this device | ||
| 11 | - interrupts : Interrupt specifier | 9 | - interrupts : Interrupt specifier |
| 12 | - #address-cells : Must be <1> | 10 | - #address-cells : Must be <1> |
| 13 | - #size-cells : Must be <0> | 11 | - #size-cells : Must be <0> |
| @@ -29,8 +29,6 @@ Required properties: · 28 unmodified lines | |||
| 29 | If two register sets are present, the first is to be | 29 | If two register sets are present, the first is to be |
| 30 | used by the CPU, and the second is to be used by the | 30 | used by the CPU, and the second is to be used by the |
| 31 | DMA engine. | 31 | DMA engine. |
| 32 | - interrupt-parent : The phandle for the interrupt controller that | ||
| 33 | services interrupts for this device | ||
| 34 | - interrupts : Interrupt specifier | 32 | - interrupts : Interrupt specifier |
| 35 | - #address-cells : Must be <1> | 33 | - #address-cells : Must be <1> |
| 36 | - #size-cells : Must be <0> | 34 | - #size-cells : Must be <0> |
| @@ -1,8 +1,10 @@ | |||
| 1 | Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. | 1 | Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface. |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : "snps,dw-apb-ssi" | 4 | - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or |
| 5 | - reg : The register base for the controller. | 5 | "jaguar2" |
| 6 | - reg : The register base for the controller. For "mscc,<soc>-spi", a second | ||
| 7 | register set is required (named ICPU_CFG:SPI_MST) | ||
| 6 | - interrupts : One interrupt, used by the controller. | 8 | - interrupts : One interrupt, used by the controller. |
| 7 | - #address-cells : <1>, as required by generic SPI binding. | 9 | - #address-cells : <1>, as required by generic SPI binding. |
| 8 | - #size-cells : <0>, also as required by generic SPI binding. | 10 | - #size-cells : <0>, also as required by generic SPI binding. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg : Physical base address and size of SPI registers map. | 6 | - reg : Physical base address and size of SPI registers map. |
| 7 | - interrupts : Property with a value describing the interrupt | 7 | - interrupts : Property with a value describing the interrupt |
| 8 | number. | 8 | number. |
| 9 | - interrupt-parent : Must be core interrupt controller | ||
| 10 | - clock-names : List of input clock names - "ref_clk", "pclk" | 9 | - clock-names : List of input clock names - "ref_clk", "pclk" |
| 11 | (See clock bindings for details). | 10 | (See clock bindings for details). |
| 12 | - clocks : Clock phandles (see clock bindings for details). | 11 | - clocks : Clock phandles (see clock bindings for details). |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible : | 4 | - compatible : |
| 5 | - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc | 5 | - "fsl,imx7ulp-spi" for LPSPI compatible with the one integrated on i.MX7ULP soc |
| 6 | - reg : address and length of the lpspi master registers | 6 | - reg : address and length of the lpspi master registers |
| 7 | - interrupt-parent : core interrupt controller | ||
| 8 | - interrupts : lpspi interrupt | 7 | - interrupts : lpspi interrupt |
| 9 | - clocks : lpspi clock specifier | 8 | - clocks : lpspi clock specifier |
| 10 | 9 | ||
| @@ -7,6 +7,7 @@ Required Properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | - compatible: should be one of the following. | 8 | - compatible: should be one of the following. |
| 9 | "rockchip,rv1108-spi" for rv1108 SoCs. | 9 | "rockchip,rv1108-spi" for rv1108 SoCs. |
| 10 | "rockchip,px30-spi", "rockchip,rk3066-spi" for px30 SoCs. | ||
| 10 | "rockchip,rk3036-spi" for rk3036 SoCS. | 11 | "rockchip,rk3036-spi" for rk3036 SoCS. |
| 11 | "rockchip,rk3066-spi" for rk3066 SoCs. | 12 | "rockchip,rk3066-spi" for rk3066 SoCs. |
| 12 | "rockchip,rk3188-spi" for rk3188 SoCs. | 13 | "rockchip,rk3188-spi" for rk3188 SoCs. |
| @@ -28,8 +28,6 @@ Required properties: · 27 unmodified lines | |||
| 28 | - "rx" for SPRI, | 28 | - "rx" for SPRI, |
| 29 | - "tx" to SPTI, | 29 | - "tx" to SPTI, |
| 30 | - "mux" for a single muxed interrupt. | 30 | - "mux" for a single muxed interrupt. |
| 31 | - interrupt-parent : The phandle for the interrupt controller that | ||
| 32 | services interrupts for this device. | ||
| 33 | - num-cs : Number of chip selects. Some RSPI cores have more than 1. | 31 | - num-cs : Number of chip selects. Some RSPI cores have more than 1. |
| 34 | - #address-cells : Must be <1> | 32 | - #address-cells : Must be <1> |
| 35 | - #size-cells : Must be <0> | 33 | - #size-cells : Must be <0> |
| @@ -0,0 +1,22 @@ | |||
| 1 | Socionext UniPhier SPI controller driver | ||
| 2 | |||
| 3 | UniPhier SoCs have SCSSI which supports SPI single channel. | ||
| 4 | |||
| 5 | Required properties: | ||
| 6 | - compatible: should be "socionext,uniphier-scssi" | ||
| 7 | - reg: address and length of the spi master registers | ||
| 8 | - #address-cells: must be <1>, see spi-bus.txt | ||
| 9 | - #size-cells: must be <0>, see spi-bus.txt | ||
| 10 | - clocks: A phandle to the clock for the device. | ||
| 11 | - resets: A phandle to the reset control for the device. | ||
| 12 | |||
| 13 | Example: | ||
| 14 | |||
| 15 | spi0: spi@54006000 { | ||
| 16 | compatible = "socionext,uniphier-scssi"; | ||
| 17 | reg = <0x54006000 0x100>; | ||
| 18 | #address-cells = <1>; | ||
| 19 | #size-cells = <0>; | ||
| 20 | clocks = <&peri_clk 11>; | ||
| 21 | resets = <&peri_rst 11>; | ||
| 22 | }; | ||
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg : Physical base address and size of SPI registers map. | 6 | - reg : Physical base address and size of SPI registers map. |
| 7 | - interrupts : Property with a value describing the interrupt | 7 | - interrupts : Property with a value describing the interrupt |
| 8 | number. | 8 | number. |
| 9 | - interrupt-parent : Must be core interrupt controller | ||
| 10 | 9 | ||
| 11 | Optional properties: | 10 | Optional properties: |
| 12 | - xlnx,num-ss-bits : Number of chip selects used. | 11 | - xlnx,num-ss-bits : Number of chip selects used. |
| @@ -13,7 +13,6 @@ Required properties: · 12 unmodified lines | |||
| 13 | - reg : Should contain register location and length. | 13 | - reg : Should contain register location and length. |
| 14 | - clocks : Phandle of the spi clock | 14 | - clocks : Phandle of the spi clock |
| 15 | - interrupts : Interrupt number used by this controller. | 15 | - interrupts : Interrupt number used by this controller. |
| 16 | - interrupt-parent : Phandle of the parent interrupt controller. | ||
| 17 | 16 | ||
| 18 | SPI slave nodes must be children of the SPI master node and can contain | 17 | SPI slave nodes must be children of the SPI master node and can contain |
| 19 | properties described in Documentation/devicetree/bindings/spi/spi-bus.txt. | 18 | properties described in Documentation/devicetree/bindings/spi/spi-bus.txt. |
| @@ -6,7 +6,6 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg : Physical base address and size of GQSPI registers map. | 6 | - reg : Physical base address and size of GQSPI registers map. |
| 7 | - interrupts : Property with a value describing the interrupt | 7 | - interrupts : Property with a value describing the interrupt |
| 8 | number. | 8 | number. |
| 9 | - interrupt-parent : Must be core interrupt controller. | ||
| 10 | - clock-names : List of input clock names - "ref_clk", "pclk" | 9 | - clock-names : List of input clock names - "ref_clk", "pclk" |
| 11 | (See clock bindings for details). | 10 | (See clock bindings for details). |
| 12 | - clocks : Clock phandles (see clock bindings for details). | 11 | - clocks : Clock phandles (see clock bindings for details). |
| @@ -50,6 +50,8 @@ Optional properties in the area nodes: · 49 unmodified lines | |||
| 50 | manipulation of the page attributes. | 50 | manipulation of the page attributes. |
| 51 | - label : the name for the reserved partition, if omitted, the label | 51 | - label : the name for the reserved partition, if omitted, the label |
| 52 | is taken from the node name excluding the unit address. | 52 | is taken from the node name excluding the unit address. |
| 53 | - clocks : a list of phandle and clock specifier pair that controls the | ||
| 54 | single SRAM clock. | ||
| 53 | 55 | ||
| 54 | Example: | 56 | Example: |
| 55 | 57 | ||
| @@ -10,8 +10,14 @@ Controller Node · 9 unmodified lines | |||
| 10 | 10 | ||
| 11 | Required properties: | 11 | Required properties: |
| 12 | - compatible : should be: | 12 | - compatible : should be: |
| 13 | - "allwinner,sun4i-a10-sram-controller" | 13 | - "allwinner,sun4i-a10-sram-controller" (deprecated) |
| 14 | - "allwinner,sun50i-a64-sram-controller" | 14 | - "allwinner,sun4i-a10-system-control" |
| 15 | - "allwinner,sun5i-a13-system-control" | ||
| 16 | - "allwinner,sun7i-a20-system-control", "allwinner,sun4i-a10-system-control" | ||
| 17 | - "allwinner,sun8i-a23-system-control" | ||
| 18 | - "allwinner,sun8i-h3-system-control" | ||
| 19 | - "allwinner,sun50i-a64-sram-controller" (deprecated) | ||
| 20 | - "allwinner,sun50i-a64-system-control" | ||
| 15 | - reg : sram controller register offset + length | 21 | - reg : sram controller register offset + length |
| 16 | 22 | ||
| 17 | SRAM nodes | 23 | SRAM nodes |
| @@ -26,8 +32,25 @@ once again the representation described in the mmio-sram binding. · 8 unmodified lines | |||
| 26 | 32 | ||
| 27 | The valid sections compatible for A10 are: | 33 | The valid sections compatible for A10 are: |
| 28 | - allwinner,sun4i-a10-sram-a3-a4 | 34 | - allwinner,sun4i-a10-sram-a3-a4 |
| 35 | - allwinner,sun4i-a10-sram-c1 | ||
| 29 | - allwinner,sun4i-a10-sram-d | 36 | - allwinner,sun4i-a10-sram-d |
| 30 | 37 | ||
| 38 | The valid sections compatible for A13 are: | ||
| 39 | - allwinner,sun5i-a13-sram-a3-a4, allwinner,sun4i-a10-sram-a3-a4 | ||
| 40 | - allwinner,sun5i-a13-sram-c1, allwinner,sun4i-a10-sram-c1 | ||
| 41 | - allwinner,sun5i-a13-sram-d, allwinner,sun4i-a10-sram-d | ||
| 42 | |||
| 43 | The valid sections compatible for A20 are: | ||
| 44 | - allwinner,sun7i-a20-sram-a3-a4, allwinner,sun4i-a10-sram-a3-a4 | ||
| 45 | - allwinner,sun7i-a20-sram-c1, allwinner,sun4i-a10-sram-c1 | ||
| 46 | - allwinner,sun7i-a20-sram-d, allwinner,sun4i-a10-sram-d | ||
| 47 | |||
| 48 | The valid sections compatible for A23/A33 are: | ||
| 49 | - allwinner,sun8i-a23-sram-c1, allwinner,sun4i-a10-sram-c1 | ||
| 50 | |||
| 51 | The valid sections compatible for H3 are: | ||
| 52 | - allwinner,sun8i-h3-sram-c1, allwinner,sun4i-a10-sram-c1 | ||
| 53 | |||
| 31 | The valid sections compatible for A64 are: | 54 | The valid sections compatible for A64 are: |
| 32 | - allwinner,sun50i-a64-sram-c | 55 | - allwinner,sun50i-a64-sram-c |
| 33 | 56 | ||
| @@ -47,8 +70,8 @@ This valid values for this argument are: · 13 unmodified lines | |||
| 47 | 70 | ||
| 48 | Example | 71 | Example |
| 49 | ------- | 72 | ------- |
| 50 | sram-controller@1c00000 { | 73 | system-control@1c00000 { |
| 51 | compatible = "allwinner,sun4i-a10-sram-controller"; | 74 | compatible = "allwinner,sun4i-a10-system-control"; |
| 52 | reg = <0x01c00000 0x30>; | 75 | reg = <0x01c00000 0x30>; |
| 53 | #address-cells = <1>; | 76 | #address-cells = <1>; |
| 54 | #size-cells = <1>; | 77 | #size-cells = <1>; |
| @@ -3,8 +3,6 @@ · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "st,spear600-adc" | 4 | - compatible: Should be "st,spear600-adc" |
| 5 | - reg: Address and length of the register set for the device | 5 | - reg: Address and length of the register set for the device |
| 6 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 7 | that services interrupts for this device | ||
| 8 | - interrupts: Should contain the ADC interrupt | 6 | - interrupts: Should contain the ADC interrupt |
| 9 | - sampling-frequency: Default sampling frequency | 7 | - sampling-frequency: Default sampling frequency |
| 10 | 8 | ||
| @@ -10,6 +10,11 @@ Required properties: · 9 unmodified lines | |||
| 10 | * marvell,armada-ap806-thermal | 10 | * marvell,armada-ap806-thermal |
| 11 | * marvell,armada-cp110-thermal | 11 | * marvell,armada-cp110-thermal |
| 12 | 12 | ||
| 13 | Note: these bindings are deprecated for AP806/CP110 and should instead | ||
| 14 | follow the rules described in: | ||
| 15 | Documentation/devicetree/bindings/arm/marvell/ap806-system-controller.txt | ||
| 16 | Documentation/devicetree/bindings/arm/marvell/cp110-system-controller.txt | ||
| 17 | |||
| 13 | - reg: Device's register space. | 18 | - reg: Device's register space. |
| 14 | Two entries are expected, see the examples below. The first one points | 19 | Two entries are expected, see the examples below. The first one points |
| 15 | to the status register (4B). The second one points to the control | 20 | to the status register (4B). The second one points to the control |
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | - reg: address range for the AVS TMON registers | 7 | - reg: address range for the AVS TMON registers |
| 8 | - interrupts: temperature monitor interrupt, for high/low threshold triggers | 8 | - interrupts: temperature monitor interrupt, for high/low threshold triggers |
| 9 | - interrupt-names: should be "tmon" | 9 | - interrupt-names: should be "tmon" |
| 10 | - interrupt-parent: the parent interrupt controller | ||
| 11 | 10 | ||
| 12 | Example: | 11 | Example: |
| 13 | 12 | ||
| @@ -13,7 +13,6 @@ · 12 unmodified lines | |||
| 13 | Exynos5420 (Must pass triminfo base and triminfo clock) | 13 | Exynos5420 (Must pass triminfo base and triminfo clock) |
| 14 | "samsung,exynos5433-tmu" | 14 | "samsung,exynos5433-tmu" |
| 15 | "samsung,exynos7-tmu" | 15 | "samsung,exynos7-tmu" |
| 16 | - interrupt-parent : The phandle for the interrupt controller | ||
| 17 | - reg : Address range of the thermal registers. For soc's which has multiple | 16 | - reg : Address range of the thermal registers. For soc's which has multiple |
| 18 | instances of TMU and some registers are shared across all TMU's like | 17 | instances of TMU and some registers are shared across all TMU's like |
| 19 | interrupt related then 2 set of register has to supplied. First set | 18 | interrupt related then 2 set of register has to supplied. First set |
| @@ -1,18 +1,28 @@ | |||
| 1 | * QCOM SoC Temperature Sensor (TSENS) | 1 | * QCOM SoC Temperature Sensor (TSENS) |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : | 4 | - compatible: |
| 5 | - "qcom,msm8916-tsens" : For 8916 Family of SoCs | 5 | Must be one of the following: |
| 6 | - "qcom,msm8974-tsens" : For 8974 Family of SoCs | 6 | - "qcom,msm8916-tsens" (MSM8916) |
| 7 | - "qcom,msm8996-tsens" : For 8996 Family of SoCs | 7 | - "qcom,msm8974-tsens" (MSM8974) |
| 8 | - "qcom,msm8996-tsens" (MSM8996) | ||
| 9 | - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) | ||
| 10 | - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) | ||
| 11 | The generic "qcom,tsens-v2" property must be used as a fallback for any SoC | ||
| 12 | with version 2 of the TSENS IP. MSM8996 is the only exception because the | ||
| 13 | generic property did not exist when support was added. | ||
| 14 | |||
| 15 | - reg: Address range of the thermal registers. | ||
| 16 | New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM | ||
| 17 | register spaces separately, with order being TM before SROT. | ||
| 18 | See Example 2, below. | ||
| 8 | 19 | ||
| 9 | - reg: Address range of the thermal registers | ||
| 10 | - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. | 20 | - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. |
| 11 | - #qcom,sensors: Number of sensors in tsens block | 21 | - #qcom,sensors: Number of sensors in tsens block |
| 12 | - Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify | 22 | - Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify |
| 13 | nvmem cells | 23 | nvmem cells |
| 14 | 24 | ||
| 15 | Example: | 25 | Example 1 (legacy support before a fallback tsens-v2 property was introduced): |
| 16 | tsens: thermal-sensor@900000 { | 26 | tsens: thermal-sensor@900000 { |
| 17 | compatible = "qcom,msm8916-tsens"; | 27 | compatible = "qcom,msm8916-tsens"; |
| 18 | reg = <0x4a8000 0x2000>; | 28 | reg = <0x4a8000 0x2000>; |
| @@ -20,3 +30,12 @@ tsens: thermal-sensor@900000 { · 1 unmodified line | |||
| 20 | nvmem-cell-names = "caldata", "calsel"; | 30 | nvmem-cell-names = "caldata", "calsel"; |
| 21 | #thermal-sensor-cells = <1>; | 31 | #thermal-sensor-cells = <1>; |
| 22 | }; | 32 | }; |
| 33 | |||
| 34 | Example 2 (for any platform containing v2 of the TSENS IP): | ||
| 35 | tsens0: thermal-sensor@c263000 { | ||
| 36 | compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; | ||
| 37 | reg = <0xc263000 0x1ff>, /* TM */ | ||
| 38 | <0xc222000 0x1ff>; /* SROT */ | ||
| 39 | #qcom,sensors = <13>; | ||
| 40 | #thermal-sensor-cells = <1>; | ||
| 41 | }; | ||
| @@ -97,8 +97,8 @@ get assigned to trip points of the zone. The cooling devices are expected · 96 unmodified lines | |||
| 97 | to be loaded in the target system. | 97 | to be loaded in the target system. |
| 98 | 98 | ||
| 99 | Required properties: | 99 | Required properties: |
| 100 | - cooling-device: A phandle of a cooling device with its specifier, | 100 | - cooling-device: A list of phandles of cooling devices with their specifiers, |
| 101 | Type: phandle + referring to which cooling device is used in this | 101 | Type: phandle + referring to which cooling devices are used in this |
| 102 | cooling specifier binding. In the cooling specifier, the first cell | 102 | cooling specifier binding. In the cooling specifier, the first cell |
| 103 | is the minimum cooling state and the second cell | 103 | is the minimum cooling state and the second cell |
| 104 | is the maximum cooling state used in this map. | 104 | is the maximum cooling state used in this map. |
| @@ -276,12 +276,7 @@ thermal-zones { · 171 unmodified lines | |||
| 276 | }; | 276 | }; |
| 277 | map1 { | 277 | map1 { |
| 278 | trip = <&cpu_alert1>; | 278 | trip = <&cpu_alert1>; |
| 279 | cooling-device = <&fan0 5 THERMAL_NO_LIMIT>; | 279 | cooling-device = <&fan0 5 THERMAL_NO_LIMIT>, <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| 280 | }; | ||
| 281 | map2 { | ||
| 282 | trip = <&cpu_alert1>; | ||
| 283 | cooling-device = | ||
| 284 | <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; | ||
| 285 | }; | 280 | }; |
| 286 | }; | 281 | }; |
| 287 | }; | 282 | }; |
| @@ -4,7 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | 4 | ||
| 5 | - compatible : should be "altr,timer-1.0" | 5 | - compatible : should be "altr,timer-1.0" |
| 6 | - reg : Specifies base physical address and size of the registers. | 6 | - reg : Specifies base physical address and size of the registers. |
| 7 | - interrupt-parent: phandle of the interrupt controller | ||
| 8 | - interrupts : Should contain the timer interrupt number | 7 | - interrupts : Should contain the timer interrupt number |
| 9 | - clock-frequency : The frequency of the clock that drives the counter, in Hz. | 8 | - clock-frequency : The frequency of the clock that drives the counter, in Hz. |
| 10 | 9 | ||
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs | 7 | "fsl,<chip>-cpm2-gtm", "fsl,cpm2-gtm", "fsl,gtm" for CPM2 GTMs |
| 8 | - reg : should contain gtm registers location and length (0x40). | 8 | - reg : should contain gtm registers location and length (0x40). |
| 9 | - interrupts : should contain four interrupts. | 9 | - interrupts : should contain four interrupts. |
| 10 | - interrupt-parent : interrupt source phandle. | ||
| 11 | - clock-frequency : specifies the frequency driving the timer. | 10 | - clock-frequency : specifies the frequency driving the timer. |
| 12 | 11 | ||
| 13 | Example: | 12 | Example: |
| @@ -3,7 +3,6 @@ Marvell Orion SoC timer · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: shall be "marvell,orion-timer" | 4 | - compatible: shall be "marvell,orion-timer" |
| 5 | - reg: base address of the timer register starting with TIMERS CONTROL register | 5 | - reg: base address of the timer register starting with TIMERS CONTROL register |
| 6 | - interrupt-parent: phandle of the bridge interrupt controller | ||
| 7 | - interrupts: should contain the interrupts for Timer0 and Timer1 | 6 | - interrupts: should contain the interrupts for Timer0 and Timer1 |
| 8 | - clocks: phandle of timer reference clock (tclk) | 7 | - clocks: phandle of timer reference clock (tclk) |
| 9 | 8 | ||
| @@ -1,19 +1,25 @@ | |||
| 1 | Mediatek MT6577, MT6572 and MT6589 Timers | 1 | Mediatek Timers |
| 2 | --------------------------------------- | 2 | --------------- |
| 3 | |||
| 4 | Mediatek SoCs have two different timers on different platforms, | ||
| 5 | - GPT (General Purpose Timer) | ||
| 6 | - SYST (System Timer) | ||
| 7 | |||
| 8 | The proper timer will be selected automatically by driver. | ||
| 3 | 9 | ||
| 4 | Required properties: | 10 | Required properties: |
| 5 | - compatible should contain: | 11 | - compatible should contain: |
| 6 | * "mediatek,mt2701-timer" for MT2701 compatible timers | 12 | * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT) |
| 7 | * "mediatek,mt6580-timer" for MT6580 compatible timers | 13 | * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT) |
| 8 | * "mediatek,mt6589-timer" for MT6589 compatible timers | 14 | * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT) |
| 9 | * "mediatek,mt7623-timer" for MT7623 compatible timers | 15 | * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT) |
| 10 | * "mediatek,mt8127-timer" for MT8127 compatible timers | 16 | * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT) |
| 11 | * "mediatek,mt8135-timer" for MT8135 compatible timers | 17 | * "mediatek,mt8135-timer" for MT8135 compatible timers (GPT) |
| 12 | * "mediatek,mt8173-timer" for MT8173 compatible timers | 18 | * "mediatek,mt8173-timer" for MT8173 compatible timers (GPT) |
| 13 | * "mediatek,mt6577-timer" for MT6577 and all above compatible timers | 19 | * "mediatek,mt6577-timer" for MT6577 and all above compatible timers (GPT) |
| 14 | - reg: Should contain location and length for timers register. | 20 | * "mediatek,mt6765-timer" for MT6765 compatible timers (SYST) |
| 15 | - clocks: Clocks driving the timer hardware. This list should include two | 21 | - reg: Should contain location and length for timer register. |
| 16 | clocks. The order is system clock and as second clock the RTC clock. | 22 | - clocks: Should contain system clock. |
| 17 | 23 | ||
| 18 | Examples: | 24 | Examples: |
| 19 | 25 | ||
| @@ -21,5 +27,5 @@ Examples: · 1 unmodified line | |||
| 21 | compatible = "mediatek,mt6577-timer"; | 27 | compatible = "mediatek,mt6577-timer"; |
| 22 | reg = <0x10008000 0x80>; | 28 | reg = <0x10008000 0x80>; |
| 23 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>; | 29 | interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>; |
| 24 | clocks = <&system_clk>, <&rtc_clk>; | 30 | clocks = <&system_clk>; |
| 25 | }; | 31 | }; |
| @@ -12,10 +12,6 @@ Required properties: · 11 unmodified lines | |||
| 12 | (16 for ARCHS cores, 3 for ARC700 cores) | 12 | (16 for ARCHS cores, 3 for ARC700 cores) |
| 13 | - clocks : phandle to the source clock | 13 | - clocks : phandle to the source clock |
| 14 | 14 | ||
| 15 | Optional properties: | ||
| 16 | |||
| 17 | - interrupt-parent : phandle to parent intc | ||
| 18 | |||
| 19 | Example: | 15 | Example: |
| 20 | 16 | ||
| 21 | timer0 { | 17 | timer0 { |
| @@ -5,8 +5,6 @@ · 4 unmodified lines | |||
| 5 | - compatible : Should be: | 5 | - compatible : Should be: |
| 6 | "st,spear-timer" | 6 | "st,spear-timer" |
| 7 | - reg: Address range of the timer registers | 7 | - reg: Address range of the timer registers |
| 8 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 9 | that services interrupts for this device | ||
| 10 | - interrupt: Should contain the timer interrupt number | 8 | - interrupt: Should contain the timer interrupt number |
| 11 | 9 | ||
| 12 | Example: | 10 | Example: |
| @@ -7,7 +7,6 @@ Required properties: · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | - compatible: must be "ti,c64x+timer64" | 8 | - compatible: must be "ti,c64x+timer64" |
| 9 | - reg: base address and size of register region | 9 | - reg: base address and size of register region |
| 10 | - interrupt-parent: interrupt controller | ||
| 11 | - interrupts: interrupt id | 10 | - interrupts: interrupt id |
| 12 | 11 | ||
| 13 | Optional properties: | 12 | Optional properties: |
| @@ -0,0 +1,37 @@ | |||
| 1 | * Device tree bindings for Texas Instruments DaVinci timer | ||
| 2 | |||
| 3 | This document provides bindings for the 64-bit timer in the DaVinci | ||
| 4 | architecture devices. The timer can be configured as a general-purpose 64-bit | ||
| 5 | timer, dual general-purpose 32-bit timers. When configured as dual 32-bit | ||
| 6 | timers, each half can operate in conjunction (chain mode) or independently | ||
| 7 | (unchained mode) of each other. | ||
| 8 | |||
| 9 | The timer is a free running up-counter and can generate interrupts when the | ||
| 10 | counter reaches preset counter values. | ||
| 11 | |||
| 12 | Also see ../watchdog/davinci-wdt.txt for timers that are configurable as | ||
| 13 | watchdog timers. | ||
| 14 | |||
| 15 | Required properties: | ||
| 16 | |||
| 17 | - compatible : should be "ti,da830-timer". | ||
| 18 | - reg : specifies base physical address and count of the registers. | ||
| 19 | - interrupts : interrupts generated by the timer. | ||
| 20 | - interrupt-names: should be "tint12", "tint34", "cmpint0", "cmpint1", | ||
| 21 | "cmpint2", "cmpint3", "cmpint4", "cmpint5", "cmpint6", | ||
| 22 | "cmpint7" ("cmpintX" may be omitted if not present in the | ||
| 23 | hardware). | ||
| 24 | - clocks : the clock feeding the timer clock. | ||
| 25 | |||
| 26 | Example: | ||
| 27 | |||
| 28 | clocksource: timer@20000 { | ||
| 29 | compatible = "ti,da830-timer"; | ||
| 30 | reg = <0x20000 0x1000>; | ||
| 31 | interrupts = <21>, <22>, <74>, <75>, <76>, <77>, <78>, <79>, | ||
| 32 | <80>, <81>; | ||
| 33 | interrupt-names = "tint12", "tint34", "cmpint0", "cmpint1", | ||
| 34 | "cmpint2", "cmpint3", "cmpint4", "cmpint5", | ||
| 35 | "cmpint6", "cmpint7"; | ||
| 36 | clocks = <&pll0_auxclk>; | ||
| 37 | }; | ||
| @@ -0,0 +1,41 @@ | |||
| 1 | * Hisilicon Universal Flash Storage (UFS) Host Controller | ||
| 2 | |||
| 3 | UFS nodes are defined to describe on-chip UFS hardware macro. | ||
| 4 | Each UFS Host Controller should have its own node. | ||
| 5 | |||
| 6 | Required properties: | ||
| 7 | - compatible : compatible list, contains one of the following - | ||
| 8 | "hisilicon,hi3660-ufs", "jedec,ufs-1.1" for hisi ufs | ||
| 9 | host controller present on Hi36xx chipset. | ||
| 10 | - reg : should contain UFS register address space & UFS SYS CTRL register address, | ||
| 11 | - interrupt-parent : interrupt device | ||
| 12 | - interrupts : interrupt number | ||
| 13 | - clocks : List of phandle and clock specifier pairs | ||
| 14 | - clock-names : List of clock input name strings sorted in the same | ||
| 15 | order as the clocks property. "ref_clk", "phy_clk" is optional | ||
| 16 | - freq-table-hz : Array of <min max> operating frequencies stored in the same | ||
| 17 | order as the clocks property. If this property is not | ||
| 18 | defined or a value in the array is "0" then it is assumed | ||
| 19 | that the frequency is set by the parent clock or a | ||
| 20 | fixed rate clock source. | ||
| 21 | - resets : describe reset node register | ||
| 22 | - reset-names : reset node register, the "rst" corresponds to reset the whole UFS IP. | ||
| 23 | |||
| 24 | Example: | ||
| 25 | |||
| 26 | ufs: ufs@ff3b0000 { | ||
| 27 | compatible = "hisilicon,hi3660-ufs", "jedec,ufs-1.1"; | ||
| 28 | /* 0: HCI standard */ | ||
| 29 | /* 1: UFS SYS CTRL */ | ||
| 30 | reg = <0x0 0xff3b0000 0x0 0x1000>, | ||
| 31 | <0x0 0xff3b1000 0x0 0x1000>; | ||
| 32 | interrupt-parent = <&gic>; | ||
| 33 | interrupts = <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>; | ||
| 34 | clocks = <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, | ||
| 35 | <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; | ||
| 36 | clock-names = "ref_clk", "phy_clk"; | ||
| 37 | freq-table-hz = <0 0>, <0 0>; | ||
| 38 | /* offset: 0x84; bit: 12 */ | ||
| 39 | resets = <&crg_rst 0x84 12>; | ||
| 40 | reset-names = "rst"; | ||
| 41 | }; | ||
| @@ -41,6 +41,8 @@ Optional properties: · 40 unmodified lines | |||
| 41 | -lanes-per-direction : number of lanes available per direction - either 1 or 2. | 41 | -lanes-per-direction : number of lanes available per direction - either 1 or 2. |
| 42 | Note that it is assume same number of lanes is used both | 42 | Note that it is assume same number of lanes is used both |
| 43 | directions at once. If not specified, default is 2 lanes per direction. | 43 | directions at once. If not specified, default is 2 lanes per direction. |
| 44 | - resets : reset node register | ||
| 45 | - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. | ||
| 44 | 46 | ||
| 45 | Note: If above properties are not defined it can be assumed that the supply | 47 | Note: If above properties are not defined it can be assumed that the supply |
| 46 | regulators or clocks are always on. | 48 | regulators or clocks are always on. |
| @@ -61,9 +63,11 @@ Example: · 14 unmodified lines | |||
| 61 | vccq-max-microamp = 200000; | 63 | vccq-max-microamp = 200000; |
| 62 | vccq2-max-microamp = 200000; | 64 | vccq2-max-microamp = 200000; |
| 63 | 65 | ||
| 64 | clocks = <&core 0>, <&ref 0>, <&iface 0>; | 66 | clocks = <&core 0>, <&ref 0>, <&phy 0>, <&iface 0>; |
| 65 | clock-names = "core_clk", "ref_clk", "iface_clk"; | 67 | clock-names = "core_clk", "ref_clk", "phy_clk", "iface_clk"; |
| 66 | freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; | 68 | freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>; |
| 69 | resets = <&reset 0 1>; | ||
| 70 | reset-names = "rst"; | ||
| 67 | phys = <&ufsphy1>; | 71 | phys = <&ufsphy1>; |
| 68 | phy-names = "ufsphy"; | 72 | phy-names = "ufsphy"; |
| 69 | }; | 73 | }; |
| @@ -96,6 +96,11 @@ Optional properties: · 95 unmodified lines | |||
| 96 | enable periodic ESS TX threshold. | 96 | enable periodic ESS TX threshold. |
| 97 | 97 | ||
| 98 | - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated. | 98 | - <DEPRECATED> tx-fifo-resize: determines if the FIFO *has* to be reallocated. |
| 99 | - snps,incr-burst-type-adjustment: Value for INCR burst type of GSBUSCFG0 | ||
| 100 | register, undefined length INCR burst type enable and INCRx type. | ||
| 101 | When just one value, which means INCRX burst mode enabled. When | ||
| 102 | more than one value, which means undefined length INCR burst type | ||
| 103 | enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256. | ||
| 99 | 104 | ||
| 100 | - in addition all properties from usb-xhci.txt from the current directory are | 105 | - in addition all properties from usb-xhci.txt from the current directory are |
| 101 | supported as well | 106 | supported as well |
| @@ -108,4 +113,5 @@ dwc3@4a030000 { · 6 unmodified lines | |||
| 108 | reg = <0x4a030000 0xcfff>; | 113 | reg = <0x4a030000 0xcfff>; |
| 109 | interrupts = <0 92 4> | 114 | interrupts = <0 92 4> |
| 110 | usb-phy = <&usb2_phy>, <&usb3,phy>; | 115 | usb-phy = <&usb2_phy>, <&usb3,phy>; |
| 116 | snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; | ||
| 111 | }; | 117 | }; |
| @@ -33,8 +33,6 @@ Recommended properties : · 32 unmodified lines | |||
| 33 | information for the interrupt. This should be encoded based on | 33 | information for the interrupt. This should be encoded based on |
| 34 | the information in section 2) depending on the type of interrupt | 34 | the information in section 2) depending on the type of interrupt |
| 35 | controller you have. | 35 | controller you have. |
| 36 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 37 | services interrupts for this device. | ||
| 38 | 36 | ||
| 39 | Optional properties : | 37 | Optional properties : |
| 40 | - fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the | 38 | - fsl,invert-drvvbus : boolean; for MPC5121 USB0 only. Indicates the |
| @@ -11,9 +11,6 @@ Required properties: · 10 unmodified lines | |||
| 11 | The driver configures MAX3421E for active low level triggered interrupts, | 11 | The driver configures MAX3421E for active low level triggered interrupts, |
| 12 | configure your interrupt line accordingly. | 12 | configure your interrupt line accordingly. |
| 13 | 13 | ||
| 14 | Optional property: | ||
| 15 | - interrupt-parent: the phandle to the associated interrupt controller. | ||
| 16 | |||
| 17 | Example: | 14 | Example: |
| 18 | 15 | ||
| 19 | usb@0 { | 16 | usb@0 { |
| @@ -0,0 +1,18 @@ | |||
| 1 | Nuvoton NPCM7XX SoC USB controllers: | ||
| 2 | ----------------------------- | ||
| 3 | |||
| 4 | EHCI: | ||
| 5 | ----- | ||
| 6 | |||
| 7 | Required properties: | ||
| 8 | - compatible: "nuvoton,npcm750-ehci" | ||
| 9 | - interrupts: Should contain the EHCI interrupt | ||
| 10 | - reg: Physical address and length of the register set for the device | ||
| 11 | |||
| 12 | Example: | ||
| 13 | |||
| 14 | ehci1: usb@f0806000 { | ||
| 15 | compatible = "nuvoton,npcm750-ehci"; | ||
| 16 | reg = <0xf0806000 0x1000>; | ||
| 17 | interrupts = <0 61 4>; | ||
| 18 | }; | ||
| @@ -3,8 +3,6 @@ Richtek RT1711H TypeC PD Controller. · 2 unmodified lines | |||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible : Must be "richtek,rt1711h". | 4 | - compatible : Must be "richtek,rt1711h". |
| 5 | - reg : Must be 0x4e, it's slave address of RT1711H. | 5 | - reg : Must be 0x4e, it's slave address of RT1711H. |
| 6 | - interrupt-parent : the phandle for the interrupt controller that | ||
| 7 | provides interrupts for this device. | ||
| 8 | - interrupts : <a b> where a is the interrupt number and b represents an | 6 | - interrupts : <a b> where a is the interrupt number and b represents an |
| 9 | encoding of the sense and level information for the interrupt. | 7 | encoding of the sense and level information for the interrupt. |
| 10 | 8 | ||
| @@ -16,7 +16,8 @@ A child node must exist to represent the core DWC3 IP block. The name of · 15 unmodified lines | |||
| 16 | the node is not important. The content of the node is defined in dwc3.txt. | 16 | the node is not important. The content of the node is defined in dwc3.txt. |
| 17 | 17 | ||
| 18 | Phy documentation is provided in the following places: | 18 | Phy documentation is provided in the following places: |
| 19 | Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt | 19 | Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt - USB2.0 PHY |
| 20 | Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY | ||
| 20 | 21 | ||
| 21 | Example device nodes: | 22 | Example device nodes: |
| 22 | 23 | ||
| @@ -14,8 +14,6 @@ Binding details · 13 unmodified lines | |||
| 14 | Required properties: | 14 | Required properties: |
| 15 | - compatible: "samsung,s3c6400-hsotg" should be used for all currently | 15 | - compatible: "samsung,s3c6400-hsotg" should be used for all currently |
| 16 | supported SoC, | 16 | supported SoC, |
| 17 | - interrupt-parent: phandle for the interrupt controller to which the | ||
| 18 | interrupt signal of the HSOTG block is routed, | ||
| 19 | - interrupts: specifier of interrupt signal of interrupt controller, | 17 | - interrupts: specifier of interrupt signal of interrupt controller, |
| 20 | according to bindings of interrupt controller, | 18 | according to bindings of interrupt controller, |
| 21 | - clocks: contains an array of clock specifiers: | 19 | - clocks: contains an array of clock specifiers: |
| @@ -6,8 +6,6 @@ EHCI: · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | Required properties: | 7 | Required properties: |
| 8 | - compatible: "st,spear600-ehci" | 8 | - compatible: "st,spear600-ehci" |
| 9 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 10 | that services interrupts for this device | ||
| 11 | - interrupts: Should contain the EHCI interrupt | 9 | - interrupts: Should contain the EHCI interrupt |
| 12 | 10 | ||
| 13 | Example: | 11 | Example: |
| @@ -25,8 +23,6 @@ OHCI: · 11 unmodified lines | |||
| 25 | 23 | ||
| 26 | Required properties: | 24 | Required properties: |
| 27 | - compatible: "st,spear600-ohci" | 25 | - compatible: "st,spear600-ohci" |
| 28 | - interrupt-parent: Should be the phandle for the interrupt controller | ||
| 29 | that services interrupts for this device | ||
| 30 | - interrupts: Should contain the OHCI interrupt | 26 | - interrupts: Should contain the OHCI interrupt |
| 31 | 27 | ||
| 32 | Example: | 28 | Example: |
| @@ -0,0 +1,49 @@ | |||
| 1 | TCPCI(Typec port cotroller interface) binding | ||
| 2 | --------------------------------------------- | ||
| 3 | |||
| 4 | Required properties: | ||
| 5 | - compatible: should be set one of following: | ||
| 6 | - "nxp,ptn5110" for NXP USB PD TCPC PHY IC ptn5110. | ||
| 7 | |||
| 8 | - reg: the i2c slave address of typec port controller device. | ||
| 9 | - interrupt-parent: the phandle to the interrupt controller which provides | ||
| 10 | the interrupt. | ||
| 11 | - interrupts: interrupt specification for tcpci alert. | ||
| 12 | |||
| 13 | Required sub-node: | ||
| 14 | - connector: The "usb-c-connector" attached to the tcpci chip, the bindings | ||
| 15 | of connector node are specified in | ||
| 16 | Documentation/devicetree/bindings/connector/usb-connector.txt | ||
| 17 | |||
| 18 | Example: | ||
| 19 | |||
| 20 | ptn5110@50 { | ||
| 21 | compatible = "nxp,ptn5110"; | ||
| 22 | reg = <0x50>; | ||
| 23 | interrupt-parent = <&gpio3>; | ||
| 24 | interrupts = <3 IRQ_TYPE_LEVEL_LOW>; | ||
| 25 | |||
| 26 | usb_con: connector { | ||
| 27 | compatible = "usb-c-connector"; | ||
| 28 | label = "USB-C"; | ||
| 29 | data-role = "dual"; | ||
| 30 | power-role = "dual"; | ||
| 31 | try-power-role = "sink"; | ||
| 32 | source-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM)>; | ||
| 33 | sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_USB_COMM) | ||
| 34 | PDO_VAR(5000, 12000, 2000)>; | ||
| 35 | op-sink-microwatt = <10000000>; | ||
| 36 | |||
| 37 | ports { | ||
| 38 | #address-cells = <1>; | ||
| 39 | #size-cells = <0>; | ||
| 40 | |||
| 41 | port@1 { | ||
| 42 | reg = <1>; | ||
| 43 | usb_con_ss: endpoint { | ||
| 44 | remote-endpoint = <&usb3_data_ss>; | ||
| 45 | }; | ||
| 46 | }; | ||
| 47 | }; | ||
| 48 | }; | ||
| 49 | }; | ||
| @@ -14,6 +14,7 @@ Required properties: · 13 unmodified lines | |||
| 14 | - "renesas,xhci-r8a7795" for r8a7795 SoC | 14 | - "renesas,xhci-r8a7795" for r8a7795 SoC |
| 15 | - "renesas,xhci-r8a7796" for r8a7796 SoC | 15 | - "renesas,xhci-r8a7796" for r8a7796 SoC |
| 16 | - "renesas,xhci-r8a77965" for r8a77965 SoC | 16 | - "renesas,xhci-r8a77965" for r8a77965 SoC |
| 17 | - "renesas,xhci-r8a77990" for r8a77990 SoC | ||
| 17 | - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible | 18 | - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible |
| 18 | device | 19 | device |
| 19 | - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device | 20 | - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 compatible device |
| @@ -42,6 +42,7 @@ arrow Arrow Electronics · 41 unmodified lines | |||
| 42 | artesyn Artesyn Embedded Technologies Inc. | 42 | artesyn Artesyn Embedded Technologies Inc. |
| 43 | asahi-kasei Asahi Kasei Corp. | 43 | asahi-kasei Asahi Kasei Corp. |
| 44 | aspeed ASPEED Technology Inc. | 44 | aspeed ASPEED Technology Inc. |
| 45 | asus AsusTek Computer Inc. | ||
| 45 | atlas Atlas Scientific LLC | 46 | atlas Atlas Scientific LLC |
| 46 | atmel Atmel Corporation | 47 | atmel Atmel Corporation |
| 47 | auo AU Optronics Corporation | 48 | auo AU Optronics Corporation |
| @@ -54,6 +55,7 @@ axentia Axentia Technologies AB · 6 unmodified lines | |||
| 54 | axis Axis Communications AB | 55 | axis Axis Communications AB |
| 55 | bananapi BIPAI KEJI LIMITED | 56 | bananapi BIPAI KEJI LIMITED |
| 56 | bhf Beckhoff Automation GmbH & Co. KG | 57 | bhf Beckhoff Automation GmbH & Co. KG |
| 58 | bitmain Bitmain Technologies | ||
| 57 | boe BOE Technology Group Co., Ltd. | 59 | boe BOE Technology Group Co., Ltd. |
| 58 | bosch Bosch Sensortec GmbH | 60 | bosch Bosch Sensortec GmbH |
| 59 | boundary Boundary Devices Inc. | 61 | boundary Boundary Devices Inc. |
| @@ -127,6 +129,7 @@ excito Excito · 67 unmodified lines | |||
| 127 | ezchip EZchip Semiconductor | 129 | ezchip EZchip Semiconductor |
| 128 | fairphone Fairphone B.V. | 130 | fairphone Fairphone B.V. |
| 129 | faraday Faraday Technology Corporation | 131 | faraday Faraday Technology Corporation |
| 132 | fastrax Fastrax Oy | ||
| 130 | fcs Fairchild Semiconductor | 133 | fcs Fairchild Semiconductor |
| 131 | firefly Firefly | 134 | firefly Firefly |
| 132 | focaltech FocalTech Systems Co.,Ltd | 135 | focaltech FocalTech Systems Co.,Ltd |
| @@ -139,6 +142,7 @@ geekbuying GeekBuying · 6 unmodified lines | |||
| 139 | gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 142 | gef GE Fanuc Intelligent Platforms Embedded Systems, Inc. |
| 140 | GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. | 143 | GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc. |
| 141 | geniatech Geniatech, Inc. | 144 | geniatech Geniatech, Inc. |
| 145 | giantec Giantec Semiconductor, Inc. | ||
| 142 | giantplus Giantplus Technology Co., Ltd. | 146 | giantplus Giantplus Technology Co., Ltd. |
| 143 | globalscale Globalscale Technologies, Inc. | 147 | globalscale Globalscale Technologies, Inc. |
| 144 | gmt Global Mixed-mode Technology, Inc. | 148 | gmt Global Mixed-mode Technology, Inc. |
| @@ -197,6 +201,7 @@ koe Kaohsiung Opto-Electronics Inc. · 52 unmodified lines | |||
| 197 | kosagi Sutajio Ko-Usagi PTE Ltd. | 201 | kosagi Sutajio Ko-Usagi PTE Ltd. |
| 198 | kyo Kyocera Corporation | 202 | kyo Kyocera Corporation |
| 199 | lacie LaCie | 203 | lacie LaCie |
| 204 | laird Laird PLC | ||
| 200 | lantiq Lantiq Semiconductor | 205 | lantiq Lantiq Semiconductor |
| 201 | lattice Lattice Semiconductor | 206 | lattice Lattice Semiconductor |
| 202 | lego LEGO Systems A/S | 207 | lego LEGO Systems A/S |
| @@ -207,6 +212,7 @@ licheepi Lichee Pi · 4 unmodified lines | |||
| 207 | linaro Linaro Limited | 212 | linaro Linaro Limited |
| 208 | linksys Belkin International, Inc. (Linksys) | 213 | linksys Belkin International, Inc. (Linksys) |
| 209 | linux Linux-specific binding | 214 | linux Linux-specific binding |
| 215 | linx Linx Technologies | ||
| 210 | lltc Linear Technology Corporation | 216 | lltc Linear Technology Corporation |
| 211 | logicpd Logic PD, Inc. | 217 | logicpd Logic PD, Inc. |
| 212 | lsi LSI Corp. (LSI Logic) | 218 | lsi LSI Corp. (LSI Logic) |
| @@ -275,6 +281,7 @@ opalkelly Opal Kelly Incorporated · 62 unmodified lines | |||
| 275 | opencores OpenCores.org | 281 | opencores OpenCores.org |
| 276 | openrisc OpenRISC.io | 282 | openrisc OpenRISC.io |
| 277 | option Option NV | 283 | option Option NV |
| 284 | oranth Shenzhen Oranth Technology Co., Ltd. | ||
| 278 | ORCL Oracle Corporation | 285 | ORCL Oracle Corporation |
| 279 | orisetech Orise Technology | 286 | orisetech Orise Technology |
| 280 | ortustech Ortus Technology Co., Ltd. | 287 | ortustech Ortus Technology Co., Ltd. |
| @@ -318,6 +325,7 @@ rohm ROHM Semiconductor Co., Ltd · 37 unmodified lines | |||
| 318 | roofull Shenzhen Roofull Technology Co, Ltd | 325 | roofull Shenzhen Roofull Technology Co, Ltd |
| 319 | samsung Samsung Semiconductor | 326 | samsung Samsung Semiconductor |
| 320 | samtec Samtec/Softing company | 327 | samtec Samtec/Softing company |
| 328 | sancloud Sancloud Ltd | ||
| 321 | sandisk Sandisk Corporation | 329 | sandisk Sandisk Corporation |
| 322 | sbs Smart Battery System | 330 | sbs Smart Battery System |
| 323 | schindler Schindler | 331 | schindler Schindler |
| @@ -388,6 +396,7 @@ tronsmart Tronsmart · 64 unmodified lines | |||
| 388 | truly Truly Semiconductors Limited | 396 | truly Truly Semiconductors Limited |
| 389 | tsd Theobroma Systems Design und Consulting GmbH | 397 | tsd Theobroma Systems Design und Consulting GmbH |
| 390 | tyan Tyan Computer Corporation | 398 | tyan Tyan Computer Corporation |
| 399 | u-blox u-blox | ||
| 391 | ucrobotics uCRobotics | 400 | ucrobotics uCRobotics |
| 392 | ubnt Ubiquiti Networks | 401 | ubnt Ubiquiti Networks |
| 393 | udoo Udoo | 402 | udoo Udoo |
| @@ -396,9 +405,11 @@ upisemi uPI Semiconductor Corp. · 2 unmodified lines | |||
| 396 | urt United Radiant Technology Corporation | 405 | urt United Radiant Technology Corporation |
| 397 | usi Universal Scientific Industrial Co., Ltd. | 406 | usi Universal Scientific Industrial Co., Ltd. |
| 398 | v3 V3 Semiconductor | 407 | v3 V3 Semiconductor |
| 408 | vamrs Vamrs Ltd. | ||
| 399 | variscite Variscite Ltd. | 409 | variscite Variscite Ltd. |
| 400 | via VIA Technologies, Inc. | 410 | via VIA Technologies, Inc. |
| 401 | virtio Virtual I/O Device Specification, developed by the OASIS consortium | 411 | virtio Virtual I/O Device Specification, developed by the OASIS consortium |
| 412 | vitesse Vitesse Semiconductor Corporation | ||
| 402 | vivante Vivante Corporation | 413 | vivante Vivante Corporation |
| 403 | vocore VoCore Studio | 414 | vocore VoCore Studio |
| 404 | voipac Voipac Technologies s.r.o. | 415 | voipac Voipac Technologies s.r.o. |
| @@ -416,6 +427,7 @@ xes Extreme Engineering Solutions (X-ES) · 11 unmodified lines | |||
| 416 | xillybus Xillybus Ltd. | 427 | xillybus Xillybus Ltd. |
| 417 | xlnx Xilinx | 428 | xlnx Xilinx |
| 418 | xunlong Shenzhen Xunlong Software CO.,Limited | 429 | xunlong Shenzhen Xunlong Software CO.,Limited |
| 430 | ysoft Y Soft Corporation a.s. | ||
| 419 | zarlink Zarlink Semiconductor | 431 | zarlink Zarlink Semiconductor |
| 420 | zeitec ZEITEC Semiconductor Co., LTD. | 432 | zeitec ZEITEC Semiconductor Co., LTD. |
| 421 | zidoo Shenzhen Zidoo Technology Co., Ltd. | 433 | zidoo Shenzhen Zidoo Technology Co., Ltd. |
| @@ -13,10 +13,15 @@ Optional properties: · 12 unmodified lines | |||
| 13 | - linux,open-drain: if specified, the data pin is considered in | 13 | - linux,open-drain: if specified, the data pin is considered in |
| 14 | open-drain mode. | 14 | open-drain mode. |
| 15 | 15 | ||
| 16 | Also refer to the generic w1.txt document. | ||
| 17 | |||
| 16 | Examples: | 18 | Examples: |
| 17 | 19 | ||
| 18 | onewire@0 { | 20 | onewire { |
| 19 | compatible = "w1-gpio"; | 21 | compatible = "w1-gpio"; |
| 20 | gpios = <&gpio 126 0>, <&gpio 105 0>; | 22 | gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; |
| 21 | }; | ||
| 22 | 23 | ||
| 24 | battery { | ||
| 25 | // ... | ||
| 26 | }; | ||
| 27 | }; | ||
| @@ -0,0 +1,25 @@ | |||
| 1 | Generic devicetree bindings for onewire (w1) busses | ||
| 2 | =================================================== | ||
| 3 | |||
| 4 | Onewire busses are described through nodes of their master bus controller. | ||
| 5 | Slave devices are listed as sub-nodes of such master devices. For now, only | ||
| 6 | one slave is allowed per bus master. | ||
| 7 | |||
| 8 | |||
| 9 | Example: | ||
| 10 | |||
| 11 | charger: charger { | ||
| 12 | compatible = "gpio-charger"; | ||
| 13 | charger-type = "mains"; | ||
| 14 | gpios = <&gpio 1 GPIO_ACTIVE_LOW>; | ||
| 15 | }; | ||
| 16 | |||
| 17 | onewire { | ||
| 18 | compatible = "w1-gpio"; | ||
| 19 | gpios = <&gpio 100 0>, <&gpio 101 0>; | ||
| 20 | |||
| 21 | battery { | ||
| 22 | compatible = "maxim,ds2760"; | ||
| 23 | power-supplies = <&charger>; | ||
| 24 | }; | ||
| 25 | }; | ||
| @@ -1,17 +1,32 @@ | |||
| 1 | ARM AMBA Primecell SP805 Watchdog | 1 | ARM AMBA Primecell SP805 Watchdog |
| 2 | 2 | ||
| 3 | SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that | ||
| 4 | can be used to identify the peripheral type, vendor, and revision. | ||
| 5 | This value can be used for driver matching. | ||
| 6 | |||
| 7 | As SP805 WDT is a primecell IP, it follows the base bindings specified in | ||
| 8 | 'arm/primecell.txt' | ||
| 9 | |||
| 3 | Required properties: | 10 | Required properties: |
| 4 | - compatible: Should be "arm,sp805" & "arm,primecell" | 11 | - compatible: Should be "arm,sp805" & "arm,primecell" |
| 5 | - reg: Should contain location and length for watchdog timer register. | 12 | - reg: Should contain location and length for watchdog timer register |
| 6 | - interrupts: Should contain the list of watchdog timer interrupts. | 13 | - clocks: Clocks driving the watchdog timer hardware. This list should be |
| 7 | - clocks: clocks driving the watchdog timer hardware. This list should be 2 | 14 | 2 clocks. With 2 clocks, the order is wdog_clk, apb_pclk |
| 8 | clocks. With 2 clocks, the order is wdogclk clock, apb_pclk. | 15 | wdog_clk can be equal to or be a sub-multiple of the apb_pclk |
| 16 | frequency | ||
| 17 | - clock-names: Shall be "wdog_clk" for first clock and "apb_pclk" for the | ||
| 18 | second one | ||
| 19 | |||
| 20 | Optional properties: | ||
| 21 | - interrupts: Should specify WDT interrupt number | ||
| 22 | - timeout-sec: Should specify default WDT timeout in seconds. If unset, the | ||
| 23 | default timeout is determined by the driver | ||
| 9 | 24 | ||
| 10 | Example: | 25 | Example: |
| 11 | watchdog@66090000 { | 26 | watchdog@66090000 { |
| 12 | compatible = "arm,sp805", "arm,primecell"; | 27 | compatible = "arm,sp805", "arm,primecell"; |
| 13 | reg = <0x66090000 0x1000>; | 28 | reg = <0x66090000 0x1000>; |
| 14 | interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; | 29 | interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; |
| 15 | clocks = <&apb_pclk>,<&apb_pclk>; | 30 | clocks = <&wdt_clk>, <&apb_pclk>; |
| 16 | clock-names = "wdogclk", "apb_pclk"; | 31 | clock-names = "wdog_clk", "apb_pclk"; |
| 17 | }; | 32 | }; |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - compatible : Should be "cdns,wdt-r1p2". | 5 | - compatible : Should be "cdns,wdt-r1p2". |
| 6 | - clocks : This is pclk (APB clock). | 6 | - clocks : This is pclk (APB clock). |
| 7 | - interrupts : This is wd_irq - watchdog timeout interrupt. | 7 | - interrupts : This is wd_irq - watchdog timeout interrupt. |
| 8 | - interrupt-parent : Must be core interrupt controller. | ||
| 9 | 8 | ||
| 10 | Optional properties | 9 | Optional properties |
| 11 | - reset-on-timeout : If this property exists, then a reset is done | 10 | - reset-on-timeout : If this property exists, then a reset is done |
| @@ -16,6 +16,7 @@ Required properties: · 15 unmodified lines | |||
| 16 | - "renesas,r8a7796-wdt" (R-Car M3-W) | 16 | - "renesas,r8a7796-wdt" (R-Car M3-W) |
| 17 | - "renesas,r8a77965-wdt" (R-Car M3-N) | 17 | - "renesas,r8a77965-wdt" (R-Car M3-N) |
| 18 | - "renesas,r8a77970-wdt" (R-Car V3M) | 18 | - "renesas,r8a77970-wdt" (R-Car V3M) |
| 19 | - "renesas,r8a77990-wdt" (R-Car E3) | ||
| 19 | - "renesas,r8a77995-wdt" (R-Car D3) | 20 | - "renesas,r8a77995-wdt" (R-Car D3) |
| 20 | - "renesas,r7s72100-wdt" (RZ/A1) | 21 | - "renesas,r7s72100-wdt" (RZ/A1) |
| 21 | The generic compatible string must be: | 22 | The generic compatible string must be: |
| @@ -5,7 +5,6 @@ Required properties: · 4 unmodified lines | |||
| 5 | - reg: physical base address of the controller and length of the register range | 5 | - reg: physical base address of the controller and length of the register range |
| 6 | 6 | ||
| 7 | Optional properties: | 7 | Optional properties: |
| 8 | - interrupt-parent: phandle to the INTC device node | ||
| 9 | - interrupts: Specify the INTC interrupt number | 8 | - interrupts: Specify the INTC interrupt number |
| 10 | 9 | ||
| 11 | Example: | 10 | Example: |
| @@ -1,31 +0,0 @@ | |||
| 1 | * ARM SP805 Watchdog Timer (WDT) Controller | ||
| 2 | |||
| 3 | SP805 WDT is a ARM Primecell Peripheral and has a standard-id register that | ||
| 4 | can be used to identify the peripheral type, vendor, and revision. | ||
| 5 | This value can be used for driver matching. | ||
| 6 | |||
| 7 | As SP805 WDT is a primecell IP, it follows the base bindings specified in | ||
| 8 | 'arm/primecell.txt' | ||
| 9 | |||
| 10 | Required properties: | ||
| 11 | - compatible : Should be "arm,sp805-wdt", "arm,primecell" | ||
| 12 | - reg : Base address and size of the watchdog timer registers. | ||
| 13 | - clocks : From common clock binding. | ||
| 14 | First clock is PCLK and the second is WDOGCLK. | ||
| 15 | WDOGCLK can be equal to or be a sub-multiple of the PCLK frequency. | ||
| 16 | - clock-names : From common clock binding. | ||
| 17 | Shall be "apb_pclk" for first clock and "wdog_clk" for the | ||
| 18 | second one. | ||
| 19 | |||
| 20 | Optional properties: | ||
| 21 | - interrupts : Should specify WDT interrupt number. | ||
| 22 | |||
| 23 | Examples: | ||
| 24 | |||
| 25 | cluster1_core0_watchdog: wdt@c000000 { | ||
| 26 | compatible = "arm,sp805-wdt", "arm,primecell"; | ||
| 27 | reg = <0x0 0xc000000 0x0 0x1000>; | ||
| 28 | clocks = <&clockgen 4 3>, <&clockgen 4 3>; | ||
| 29 | clock-names = "apb_pclk", "wdog_clk"; | ||
| 30 | }; | ||
| 31 | |||
| @@ -2,9 +2,15 @@ STM32 Independent WatchDoG (IWDG) · 1 unmodified line | |||
| 2 | --------------------------------- | 2 | --------------------------------- |
| 3 | 3 | ||
| 4 | Required properties: | 4 | Required properties: |
| 5 | - compatible: "st,stm32-iwdg" | 5 | - compatible: Should be either: |
| 6 | - reg: physical base address and length of the registers set for the device | 6 | - "st,stm32-iwdg" |
| 7 | - clocks: must contain a single entry describing the clock input | 7 | - "st,stm32mp1-iwdg" |
| 8 | - reg: Physical base address and length of the registers set for the device | ||
| 9 | - clocks: Reference to the clock entry lsi. Additional pclk clock entry | ||
| 10 | is required only for st,stm32mp1-iwdg. | ||
| 11 | - clock-names: Name of the clocks used. | ||
| 12 | "lsi" for st,stm32-iwdg | ||
| 13 | "lsi", "pclk" for st,stm32mp1-iwdg | ||
| 8 | 14 | ||
| 9 | Optional Properties: | 15 | Optional Properties: |
| 10 | - timeout-sec: Watchdog timeout value in seconds. | 16 | - timeout-sec: Watchdog timeout value in seconds. |
| @@ -15,5 +21,6 @@ iwdg: watchdog@40003000 { · 4 unmodified lines | |||
| 15 | compatible = "st,stm32-iwdg"; | 21 | compatible = "st,stm32-iwdg"; |
| 16 | reg = <0x40003000 0x400>; | 22 | reg = <0x40003000 0x400>; |
| 17 | clocks = <&clk_lsi>; | 23 | clocks = <&clk_lsi>; |
| 24 | clock-names = "lsi"; | ||
| 18 | timeout-sec = <32>; | 25 | timeout-sec = <32>; |
| 19 | }; | 26 | }; |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | |||
| 49 | followed by an older IP core version which implements the same | 49 | followed by an older IP core version which implements the same |
| 50 | interface or any other device with the same interface. | 50 | interface or any other device with the same interface. |
| 51 | 51 | ||
| 52 | 'reg', 'interrupt-parent' and 'interrupts' are all optional properties. | 52 | 'reg' and 'interrupts' are all optional properties. |
| 53 | 53 | ||
| 54 | For example, the following block from system.mhs: | 54 | For example, the following block from system.mhs: |
| 55 | 55 | ||
| @@ -4,8 +4,6 @@ Required properties: · 3 unmodified lines | |||
| 4 | - compatible: Should be "xillybus,xillybus-1.00.a" | 4 | - compatible: Should be "xillybus,xillybus-1.00.a" |
| 5 | - reg: Address and length of the register set for the device | 5 | - reg: Address and length of the register set for the device |
| 6 | - interrupts: Contains one interrupt node, typically consisting of three cells. | 6 | - interrupts: Contains one interrupt node, typically consisting of three cells. |
| 7 | - interrupt-parent: the phandle for the interrupt controller that | ||
| 8 | services interrupts for this device. | ||
| 9 | 7 | ||
| 10 | Optional properties: | 8 | Optional properties: |
| 11 | - dma-coherent: Present if DMA operations are coherent | 9 | - dma-coherent: Present if DMA operations are coherent |
| @@ -2,15 +2,14 @@ Device Tree Dynamic Resolver Notes · 1 unmodified line | |||
| 2 | ---------------------------------- | 2 | ---------------------------------- |
| 3 | 3 | ||
| 4 | This document describes the implementation of the in-kernel | 4 | This document describes the implementation of the in-kernel |
| 5 | Device Tree resolver, residing in drivers/of/resolver.c and is a | 5 | Device Tree resolver, residing in drivers/of/resolver.c |
| 6 | companion document to Documentation/devicetree/dt-object-internal.txt[1] | ||
| 7 | 6 | ||
| 8 | How the resolver works | 7 | How the resolver works |
| 9 | ---------------------- | 8 | ---------------------- |
| 10 | 9 | ||
| 11 | The resolver is given as an input an arbitrary tree compiled with the | 10 | The resolver is given as an input an arbitrary tree compiled with the |
| 12 | proper dtc option and having a /plugin/ tag. This generates the | 11 | proper dtc option and having a /plugin/ tag. This generates the |
| 13 | appropriate __fixups__ & __local_fixups__ nodes as described in [1]. | 12 | appropriate __fixups__ & __local_fixups__ nodes. |
| 14 | 13 | ||
| 15 | In sequence the resolver works by the following steps: | 14 | In sequence the resolver works by the following steps: |
| 16 | 15 | ||
| @@ -488,14 +488,19 @@ doc: *title* · 487 unmodified lines | |||
| 488 | .. kernel-doc:: drivers/gpu/drm/i915/intel_audio.c | 488 | .. kernel-doc:: drivers/gpu/drm/i915/intel_audio.c |
| 489 | :doc: High Definition Audio over HDMI and Display Port | 489 | :doc: High Definition Audio over HDMI and Display Port |
| 490 | 490 | ||
| 491 | functions: *function* *[...]* | 491 | functions: *[ function ...]* |
| 492 | Include documentation for each *function* in *source*. | 492 | Include documentation for each *function* in *source*. |
| 493 | If no *function* if specified, the documentaion for all functions | ||
| 494 | and types in the *source* will be included. | ||
| 493 | 495 | ||
| 494 | Example:: | 496 | Examples:: |
| 495 | 497 | ||
| 496 | .. kernel-doc:: lib/bitmap.c | 498 | .. kernel-doc:: lib/bitmap.c |
| 497 | :functions: bitmap_parselist bitmap_parselist_user | 499 | :functions: bitmap_parselist bitmap_parselist_user |
| 498 | 500 | ||
| 501 | .. kernel-doc:: lib/idr.c | ||
| 502 | :functions: | ||
| 503 | |||
| 499 | Without options, the kernel-doc directive includes all documentation comments | 504 | Without options, the kernel-doc directive includes all documentation comments |
| 500 | from the source file. | 505 | from the source file. |
| 501 | 506 | ||
| @@ -32,7 +32,7 @@ SYNOPSIS · 31 unmodified lines | |||
| 32 | 32 | ||
| 33 | \ **parse_headers.pl**\ [<options>] <C_FILE> <OUT_FILE> [<EXCEPTIONS_FILE>] | 33 | \ **parse_headers.pl**\ [<options>] <C_FILE> <OUT_FILE> [<EXCEPTIONS_FILE>] |
| 34 | 34 | ||
| 35 | Where <options> can be: --debug, --help or --man. | 35 | Where <options> can be: --debug, --help or --usage. |
| 36 | 36 | ||
| 37 | 37 | ||
| 38 | OPTIONS | 38 | OPTIONS |
| @@ -133,7 +133,7 @@ For both statements, \ **type**\ can be either one of the following: · 94 unmodified lines | |||
| 133 | 133 | ||
| 134 | \ **symbol**\ | 134 | \ **symbol**\ |
| 135 | 135 | ||
| 136 | The ignore or replace statement will apply to the name of enum statements | 136 | The ignore or replace statement will apply to the name of enum value |
| 137 | at C_FILE. | 137 | at C_FILE. |
| 138 | 138 | ||
| 139 | For replace statements, \ **new_value**\ will automatically use :c:type: | 139 | For replace statements, \ **new_value**\ will automatically use :c:type: |
| @@ -28,7 +28,7 @@ The ReST markups currently used by the Documentation/ files are meant to be · 27 unmodified lines | |||
| 28 | built with ``Sphinx`` version 1.3 or upper. If you're desiring to build | 28 | built with ``Sphinx`` version 1.3 or upper. If you're desiring to build |
| 29 | PDF outputs, it is recommended to use version 1.4.6 or upper. | 29 | PDF outputs, it is recommended to use version 1.4.6 or upper. |
| 30 | 30 | ||
| 31 | There's a script that checks for the Spinx requirements. Please see | 31 | There's a script that checks for the Sphinx requirements. Please see |
| 32 | :ref:`sphinx-pre-install` for further details. | 32 | :ref:`sphinx-pre-install` for further details. |
| 33 | 33 | ||
| 34 | Most distributions are shipped with Sphinx, but its toolchain is fragile, | 34 | Most distributions are shipped with Sphinx, but its toolchain is fragile, |
| @@ -81,10 +81,14 @@ integration is desired. · 80 unmodified lines | |||
| 81 | Two other flags are specifically targeted at use cases where the device | 81 | Two other flags are specifically targeted at use cases where the device |
| 82 | link is added from the consumer's ``->probe`` callback: ``DL_FLAG_RPM_ACTIVE`` | 82 | link is added from the consumer's ``->probe`` callback: ``DL_FLAG_RPM_ACTIVE`` |
| 83 | can be specified to runtime resume the supplier upon addition of the | 83 | can be specified to runtime resume the supplier upon addition of the |
| 84 | device link. ``DL_FLAG_AUTOREMOVE`` causes the device link to be automatically | 84 | device link. ``DL_FLAG_AUTOREMOVE_CONSUMER`` causes the device link to be |
| 85 | purged when the consumer fails to probe or later unbinds. This obviates | 85 | automatically purged when the consumer fails to probe or later unbinds. |
| 86 | the need to explicitly delete the link in the ``->remove`` callback or in | 86 | This obviates the need to explicitly delete the link in the ``->remove`` |
| 87 | the error path of the ``->probe`` callback. | 87 | callback or in the error path of the ``->probe`` callback. |
| 88 | |||
| 89 | Similarly, when the device link is added from supplier's ``->probe`` callback, | ||
| 90 | ``DL_FLAG_AUTOREMOVE_SUPPLIER`` causes the device link to be automatically | ||
| 91 | purged when the supplier fails to probe or later unbinds. | ||
| 88 | 92 | ||
| 89 | Limitations | 93 | Limitations |
| 90 | =========== | 94 | =========== |
| @@ -92,7 +92,7 @@ the loading file. · 91 unmodified lines | |||
| 92 | 92 | ||
| 93 | The firmware device used to help load firmware using sysfs is only created if | 93 | The firmware device used to help load firmware using sysfs is only created if |
| 94 | direct firmware loading fails and if the fallback mechanism is enabled for your | 94 | direct firmware loading fails and if the fallback mechanism is enabled for your |
| 95 | firmware request, this is set up with fw_load_from_user_helper(). It is | 95 | firmware request, this is set up with :c:func:`firmware_fallback_sysfs`. It is |
| 96 | important to re-iterate that no device is created if a direct filesystem lookup | 96 | important to re-iterate that no device is created if a direct filesystem lookup |
| 97 | succeeded. | 97 | succeeded. |
| 98 | 98 | ||
| @@ -108,6 +108,11 @@ firmware_data_read() and firmware_loading_show() are just provided for the · 9 unmodified lines | |||
| 108 | test_firmware driver for testing, they are not called in normal use or | 108 | test_firmware driver for testing, they are not called in normal use or |
| 109 | expected to be used regularly by userspace. | 109 | expected to be used regularly by userspace. |
| 110 | 110 | ||
| 111 | firmware_fallback_sysfs | ||
| 112 | ----------------------- | ||
| 113 | .. kernel-doc:: drivers/base/firmware_loader/fallback.c | ||
| 114 | :functions: firmware_fallback_sysfs | ||
| 115 | |||
| 111 | Firmware kobject uevent fallback mechanism | 116 | Firmware kobject uevent fallback mechanism |
| 112 | ========================================== | 117 | ========================================== |
| 113 | 118 | ||
| @@ -83,7 +83,7 @@ The programming sequence is:: · 82 unmodified lines | |||
| 83 | 3. .write_complete | 83 | 3. .write_complete |
| 84 | 84 | ||
| 85 | The .write_init function will prepare the FPGA to receive the image data. The | 85 | The .write_init function will prepare the FPGA to receive the image data. The |
| 86 | buffer passed into .write_init will be atmost .initial_header_size bytes long, | 86 | buffer passed into .write_init will be at most .initial_header_size bytes long; |
| 87 | if the whole bitstream is not immediately available then the core code will | 87 | if the whole bitstream is not immediately available then the core code will |
| 88 | buffer up at least this much before starting. | 88 | buffer up at least this much before starting. |
| 89 | 89 | ||
| @@ -98,9 +98,9 @@ scatter list. This interface is suitable for drivers which use DMA. · 8 unmodified lines | |||
| 98 | The .write_complete function is called after all the image has been written | 98 | The .write_complete function is called after all the image has been written |
| 99 | to put the FPGA into operating mode. | 99 | to put the FPGA into operating mode. |
| 100 | 100 | ||
| 101 | The ops include a .state function which will read the hardware FPGA manager and | 101 | The ops include a .state function which will determine the state the FPGA is in |
| 102 | return a code of type enum fpga_mgr_states. It doesn't result in a change in | 102 | and return a code of type enum fpga_mgr_states. It doesn't result in a change |
| 103 | hardware state. | 103 | in state. |
| 104 | 104 | ||
| 105 | How to write an image buffer to a supported FPGA | 105 | How to write an image buffer to a supported FPGA |
| 106 | ------------------------------------------------ | 106 | ------------------------------------------------ |
| @@ -181,8 +181,8 @@ API for implementing a new FPGA Manager driver · 74 unmodified lines | |||
| 181 | .. kernel-doc:: drivers/fpga/fpga-mgr.c | 181 | .. kernel-doc:: drivers/fpga/fpga-mgr.c |
| 182 | :functions: fpga_mgr_unregister | 182 | :functions: fpga_mgr_unregister |
| 183 | 183 | ||
| 184 | API for programming a FPGA | 184 | API for programming an FPGA |
| 185 | -------------------------- | 185 | --------------------------- |
| 186 | 186 | ||
| 187 | .. kernel-doc:: include/linux/fpga/fpga-mgr.h | 187 | .. kernel-doc:: include/linux/fpga/fpga-mgr.h |
| 188 | :functions: fpga_image_info | 188 | :functions: fpga_image_info |
| @@ -4,7 +4,7 @@ FPGA Region · 3 unmodified lines | |||
| 4 | Overview | 4 | Overview |
| 5 | -------- | 5 | -------- |
| 6 | 6 | ||
| 7 | This document is meant to be an brief overview of the FPGA region API usage. A | 7 | This document is meant to be a brief overview of the FPGA region API usage. A |
| 8 | more conceptual look at regions can be found in the Device Tree binding | 8 | more conceptual look at regions can be found in the Device Tree binding |
| 9 | document [#f1]_. | 9 | document [#f1]_. |
| 10 | 10 | ||
| @@ -31,11 +31,11 @@ fpga_image_info including: · 20 unmodified lines | |||
| 31 | * pointers to the image as either a scatter-gather buffer, a contiguous | 31 | * pointers to the image as either a scatter-gather buffer, a contiguous |
| 32 | buffer, or the name of firmware file | 32 | buffer, or the name of firmware file |
| 33 | 33 | ||
| 34 | * flags indicating specifics such as whether the image if for partial | 34 | * flags indicating specifics such as whether the image is for partial |
| 35 | reconfiguration. | 35 | reconfiguration. |
| 36 | 36 | ||
| 37 | How to program a FPGA using a region | 37 | How to program an FPGA using a region |
| 38 | ------------------------------------ | 38 | ------------------------------------- |
| 39 | 39 | ||
| 40 | First, allocate the info struct:: | 40 | First, allocate the info struct:: |
| 41 | 41 | ||
| @@ -77,8 +77,8 @@ An example of usage can be seen in the probe function of [#f2]_. · 35 unmodified lines | |||
| 77 | .. [#f1] ../devicetree/bindings/fpga/fpga-region.txt | 77 | .. [#f1] ../devicetree/bindings/fpga/fpga-region.txt |
| 78 | .. [#f2] ../../drivers/fpga/of-fpga-region.c | 78 | .. [#f2] ../../drivers/fpga/of-fpga-region.c |
| 79 | 79 | ||
| 80 | API to program a FGPA | 80 | API to program an FPGA |
| 81 | --------------------- | 81 | ---------------------- |
| 82 | 82 | ||
| 83 | .. kernel-doc:: drivers/fpga/fpga-region.c | 83 | .. kernel-doc:: drivers/fpga/fpga-region.c |
| 84 | :functions: fpga_region_program_fpga | 84 | :functions: fpga_region_program_fpga |
| @@ -12,18 +12,18 @@ Linux. Some of the core intentions of the FPGA subsystems are: · 11 unmodified lines | |||
| 12 | 12 | ||
| 13 | * Code should not be shared between upper and lower layers. This | 13 | * Code should not be shared between upper and lower layers. This |
| 14 | should go without saying. If that seems necessary, there's probably | 14 | should go without saying. If that seems necessary, there's probably |
| 15 | framework functionality that that can be added that will benefit | 15 | framework functionality that can be added that will benefit |
| 16 | other users. Write the linux-fpga mailing list and maintainers and | 16 | other users. Write the linux-fpga mailing list and maintainers and |
| 17 | seek out a solution that expands the framework for broad reuse. | 17 | seek out a solution that expands the framework for broad reuse. |
| 18 | 18 | ||
| 19 | * Generally, when adding code, think of the future. Plan for re-use. | 19 | * Generally, when adding code, think of the future. Plan for reuse. |
| 20 | 20 | ||
| 21 | The framework in the kernel is divided into: | 21 | The framework in the kernel is divided into: |
| 22 | 22 | ||
| 23 | FPGA Manager | 23 | FPGA Manager |
| 24 | ------------ | 24 | ------------ |
| 25 | 25 | ||
| 26 | If you are adding a new FPGA or a new method of programming a FPGA, | 26 | If you are adding a new FPGA or a new method of programming an FPGA, |
| 27 | this is the subsystem for you. Low level FPGA manager drivers contain | 27 | this is the subsystem for you. Low level FPGA manager drivers contain |
| 28 | the knowledge of how to program a specific device. This subsystem | 28 | the knowledge of how to program a specific device. This subsystem |
| 29 | includes the framework in fpga-mgr.c and the low level drivers that | 29 | includes the framework in fpga-mgr.c and the low level drivers that |
| @@ -32,10 +32,10 @@ are registered with it. · 2 unmodified lines | |||
| 32 | FPGA Bridge | 32 | FPGA Bridge |
| 33 | ----------- | 33 | ----------- |
| 34 | 34 | ||
| 35 | FPGA Bridges prevent spurious signals from going out of a FPGA or a | 35 | FPGA Bridges prevent spurious signals from going out of an FPGA or a |
| 36 | region of a FPGA during programming. They are disabled before | 36 | region of an FPGA during programming. They are disabled before |
| 37 | programming begins and re-enabled afterwards. An FPGA bridge may be | 37 | programming begins and re-enabled afterwards. An FPGA bridge may be |
| 38 | actual hard hardware that gates a bus to a cpu or a soft ("freeze") | 38 | actual hard hardware that gates a bus to a CPU or a soft ("freeze") |
| 39 | bridge in FPGA fabric that surrounds a partial reconfiguration region | 39 | bridge in FPGA fabric that surrounds a partial reconfiguration region |
| 40 | of an FPGA. This subsystem includes fpga-bridge.c and the low level | 40 | of an FPGA. This subsystem includes fpga-bridge.c and the low level |
| 41 | drivers that are registered with it. | 41 | drivers that are registered with it. |
| @@ -44,7 +44,7 @@ FPGA Region · 2 unmodified lines | |||
| 44 | ----------- | 44 | ----------- |
| 45 | 45 | ||
| 46 | If you are adding a new interface to the FPGA framework, add it on top | 46 | If you are adding a new interface to the FPGA framework, add it on top |
| 47 | of a FPGA region to allow the most reuse of your interface. | 47 | of an FPGA region to allow the most reuse of your interface. |
| 48 | 48 | ||
| 49 | The FPGA Region framework (fpga-region.c) associates managers and | 49 | The FPGA Region framework (fpga-region.c) associates managers and |
| 50 | bridges as reconfigurable regions. A region may refer to the whole | 50 | bridges as reconfigurable regions. A region may refer to the whole |
| @@ -118,8 +118,7 @@ PIO data read/write · 117 unmodified lines | |||
| 118 | All bmdma-style drivers must implement this hook. This is the low-level | 118 | All bmdma-style drivers must implement this hook. This is the low-level |
| 119 | operation that actually copies the data bytes during a PIO data | 119 | operation that actually copies the data bytes during a PIO data |
| 120 | transfer. Typically the driver will choose one of | 120 | transfer. Typically the driver will choose one of |
| 121 | :c:func:`ata_sff_data_xfer_noirq`, :c:func:`ata_sff_data_xfer`, or | 121 | :c:func:`ata_sff_data_xfer`, or :c:func:`ata_sff_data_xfer32`. |
| 122 | :c:func:`ata_sff_data_xfer32`. | ||
| 123 | 122 | ||
| 124 | ATA command execute | 123 | ATA command execute |
| 125 | ~~~~~~~~~~~~~~~~~~~ | 124 | ~~~~~~~~~~~~~~~~~~~ |
| @@ -374,7 +374,7 @@ The nand driver supports three different types of hardware ECC. · 373 unmodified lines | |||
| 374 | 374 | ||
| 375 | - NAND_ECC_HW8_512 | 375 | - NAND_ECC_HW8_512 |
| 376 | 376 | ||
| 377 | Hardware ECC generator providing 6 bytes ECC per 512 byte. | 377 | Hardware ECC generator providing 8 bytes ECC per 512 byte. |
| 378 | 378 | ||
| 379 | If your hardware generator has a different functionality add it at the | 379 | If your hardware generator has a different functionality add it at the |
| 380 | appropriate place in nand_base.c | 380 | appropriate place in nand_base.c |
| @@ -889,7 +889,7 @@ Use these constants to select the ECC algorithm:: · 508 unmodified lines | |||
| 889 | #define NAND_ECC_HW3_512 3 | 889 | #define NAND_ECC_HW3_512 3 |
| 890 | /* Hardware ECC 6 byte ECC per 512 Byte data */ | 890 | /* Hardware ECC 6 byte ECC per 512 Byte data */ |
| 891 | #define NAND_ECC_HW6_512 4 | 891 | #define NAND_ECC_HW6_512 4 |
| 892 | /* Hardware ECC 6 byte ECC per 512 Byte data */ | 892 | /* Hardware ECC 8 byte ECC per 512 Byte data */ |
| 893 | #define NAND_ECC_HW8_512 6 | 893 | #define NAND_ECC_HW8_512 6 |
| 894 | 894 | ||
| 895 | 895 | ||
| @@ -125,3 +125,8 @@ Messaging APIs: · 124 unmodified lines | |||
| 125 | ~~~~~~~~~~~~~~~ | 125 | ~~~~~~~~~~~~~~~ |
| 126 | .. kernel-doc:: drivers/slimbus/messaging.c | 126 | .. kernel-doc:: drivers/slimbus/messaging.c |
| 127 | :export: | 127 | :export: |
| 128 | |||
| 129 | Streaming APIs: | ||
| 130 | ~~~~~~~~~~~~~~~ | ||
| 131 | .. kernel-doc:: drivers/slimbus/stream.c | ||
| 132 | :export: | ||
| @@ -0,0 +1,136 @@ | |||
| 1 | |||
| 2 | API for USB Type-C Alternate Mode drivers | ||
| 3 | ========================================= | ||
| 4 | |||
| 5 | Introduction | ||
| 6 | ------------ | ||
| 7 | |||
| 8 | Alternate modes require communication with the partner using Vendor Defined | ||
| 9 | Messages (VDM) as defined in USB Type-C and USB Power Delivery Specifications. | ||
| 10 | The communication is SVID (Standard or Vendor ID) specific, i.e. specific for | ||
| 11 | every alternate mode, so every alternate mode will need a custom driver. | ||
| 12 | |||
| 13 | USB Type-C bus allows binding a driver to the discovered partner alternate | ||
| 14 | modes by using the SVID and the mode number. | ||
| 15 | |||
| 16 | USB Type-C Connector Class provides a device for every alternate mode a port | ||
| 17 | supports, and separate device for every alternate mode the partner supports. | ||
| 18 | The drivers for the alternate modes are bound to the partner alternate mode | ||
| 19 | devices, and the port alternate mode devices must be handled by the port | ||
| 20 | drivers. | ||
| 21 | |||
| 22 | When a new partner alternate mode device is registered, it is linked to the | ||
| 23 | alternate mode device of the port that the partner is attached to, that has | ||
| 24 | matching SVID and mode. Communication between the port driver and alternate mode | ||
| 25 | driver will happen using the same API. | ||
| 26 | |||
| 27 | The port alternate mode devices are used as a proxy between the partner and the | ||
| 28 | alternate mode drivers, so the port drivers are only expected to pass the SVID | ||
| 29 | specific commands from the alternate mode drivers to the partner, and from the | ||
| 30 | partners to the alternate mode drivers. No direct SVID specific communication is | ||
| 31 | needed from the port drivers, but the port drivers need to provide the operation | ||
| 32 | callbacks for the port alternate mode devices, just like the alternate mode | ||
| 33 | drivers need to provide them for the partner alternate mode devices. | ||
| 34 | |||
| 35 | Usage: | ||
| 36 | ------ | ||
| 37 | |||
| 38 | General | ||
| 39 | ~~~~~~~ | ||
| 40 | |||
| 41 | By default, the alternate mode drivers are responsible for entering the mode. | ||
| 42 | It is also possible to leave the decision about entering the mode to the user | ||
| 43 | space (See Documentation/ABI/testing/sysfs-class-typec). Port drivers should not | ||
| 44 | enter any modes on their own. | ||
| 45 | |||
| 46 | ``->vdm`` is the most important callback in the operation callbacks vector. It | ||
| 47 | will be used to deliver all the SVID specific commands from the partner to the | ||
| 48 | alternate mode driver, and vice versa in case of port drivers. The drivers send | ||
| 49 | the SVID specific commands to each other using :c:func:`typec_altmode_vmd()`. | ||
| 50 | |||
| 51 | If the communication with the partner using the SVID specific commands results | ||
| 52 | in need to reconfigure the pins on the connector, the alternate mode driver | ||
| 53 | needs to notify the bus using :c:func:`typec_altmode_notify()`. The driver | ||
| 54 | passes the negotiated SVID specific pin configuration value to the function as | ||
| 55 | parameter. The bus driver will then configure the mux behind the connector using | ||
| 56 | that value as the state value for the mux, and also call blocking notification | ||
| 57 | chain to notify the external drivers about the state of the connector that need | ||
| 58 | to know it. | ||
| 59 | |||
| 60 | NOTE: The SVID specific pin configuration values must always start from | ||
| 61 | ``TYPEC_STATE_MODAL``. USB Type-C specification defines two default states for | ||
| 62 | the connector: ``TYPEC_STATE_USB`` and ``TYPEC_STATE_SAFE``. These values are | ||
| 63 | reserved by the bus as the first possible values for the state. When the | ||
| 64 | alternate mode is entered, the bus will put the connector into | ||
| 65 | ``TYPEC_STATE_SAFE`` before sending Enter or Exit Mode command as defined in USB | ||
| 66 | Type-C Specification, and also put the connector back to ``TYPEC_STATE_USB`` | ||
| 67 | after the mode has been exited. | ||
| 68 | |||
| 69 | An example of working definitions for SVID specific pin configurations would | ||
| 70 | look like this: | ||
| 71 | |||
| 72 | enum { | ||
| 73 | ALTMODEX_CONF_A = TYPEC_STATE_MODAL, | ||
| 74 | ALTMODEX_CONF_B, | ||
| 75 | ... | ||
| 76 | }; | ||
| 77 | |||
| 78 | Helper macro ``TYPEC_MODAL_STATE()`` can also be used: | ||
| 79 | |||
| 80 | #define ALTMODEX_CONF_A = TYPEC_MODAL_STATE(0); | ||
| 81 | #define ALTMODEX_CONF_B = TYPEC_MODAL_STATE(1); | ||
| 82 | |||
| 83 | Notification chain | ||
| 84 | ~~~~~~~~~~~~~~~~~~ | ||
| 85 | |||
| 86 | The drivers for the components that the alternate modes are designed for need to | ||
| 87 | get details regarding the results of the negotiation with the partner, and the | ||
| 88 | pin configuration of the connector. In case of DisplayPort alternate mode for | ||
| 89 | example, the GPU drivers will need to know those details. In case of | ||
| 90 | Thunderbolt alternate mode, the thunderbolt drivers will need to know them, and | ||
| 91 | so on. | ||
| 92 | |||
| 93 | The notification chain is designed for this purpose. The drivers can register | ||
| 94 | notifiers with :c:func:`typec_altmode_register_notifier()`. | ||
| 95 | |||
| 96 | Cable plug alternate modes | ||
| 97 | ~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 98 | |||
| 99 | The alternate mode drivers are not bound to cable plug alternate mode devices, | ||
| 100 | only to the partner alternate mode devices. If the alternate mode supports, or | ||
| 101 | requires, a cable that responds to SOP Prime, and optionally SOP Double Prime | ||
| 102 | messages, the driver for that alternate mode must request handle to the cable | ||
| 103 | plug alternate modes using :c:func:`typec_altmode_get_plug()`, and take over | ||
| 104 | their control. | ||
| 105 | |||
| 106 | Driver API | ||
| 107 | ---------- | ||
| 108 | |||
| 109 | Alternate mode driver registering/unregistering | ||
| 110 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 111 | |||
| 112 | .. kernel-doc:: drivers/usb/typec/bus.c | ||
| 113 | :functions: typec_altmode_register_driver typec_altmode_unregister_driver | ||
| 114 | |||
| 115 | Alternate mode driver operations | ||
| 116 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 117 | |||
| 118 | .. kernel-doc:: drivers/usb/typec/bus.c | ||
| 119 | :functions: typec_altmode_enter typec_altmode_exit typec_altmode_attention typec_altmode_vdm typec_altmode_notify | ||
| 120 | |||
| 121 | API for the port drivers | ||
| 122 | ~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 123 | |||
| 124 | .. kernel-doc:: drivers/usb/typec/bus.c | ||
| 125 | :functions: typec_match_altmode | ||
| 126 | |||
| 127 | Cable Plug operations | ||
| 128 | ~~~~~~~~~~~~~~~~~~~~~ | ||
| 129 | |||
| 130 | .. kernel-doc:: drivers/usb/typec/bus.c | ||
| 131 | :functions: typec_altmode_get_plug typec_altmode_put_plug | ||
| 132 | |||
| 133 | Notifications | ||
| 134 | ~~~~~~~~~~~~~ | ||
| 135 | .. kernel-doc:: drivers/usb/typec/class.c | ||
| 136 | :functions: typec_altmode_register_notifier typec_altmode_unregister_notifier | ||
| @@ -240,6 +240,7 @@ CLOCK · 239 unmodified lines | |||
| 240 | devm_of_clk_add_hw_provider() | 240 | devm_of_clk_add_hw_provider() |
| 241 | 241 | ||
| 242 | DMA | 242 | DMA |
| 243 | dmaenginem_async_device_register() | ||
| 243 | dmam_alloc_coherent() | 244 | dmam_alloc_coherent() |
| 244 | dmam_alloc_attrs() | 245 | dmam_alloc_attrs() |
| 245 | dmam_declare_coherent_memory() | 246 | dmam_declare_coherent_memory() |
| @@ -66,17 +66,17 @@ early userspace image can be built by an unprivileged user. · 65 unmodified lines | |||
| 66 | 66 | ||
| 67 | As a technical note, when directories and files are specified, the | 67 | As a technical note, when directories and files are specified, the |
| 68 | entire CONFIG_INITRAMFS_SOURCE is passed to | 68 | entire CONFIG_INITRAMFS_SOURCE is passed to |
| 69 | scripts/gen_initramfs_list.sh. This means that CONFIG_INITRAMFS_SOURCE | 69 | usr/gen_initramfs_list.sh. This means that CONFIG_INITRAMFS_SOURCE |
| 70 | can really be interpreted as any legal argument to | 70 | can really be interpreted as any legal argument to |
| 71 | gen_initramfs_list.sh. If a directory is specified as an argument then | 71 | gen_initramfs_list.sh. If a directory is specified as an argument then |
| 72 | the contents are scanned, uid/gid translation is performed, and | 72 | the contents are scanned, uid/gid translation is performed, and |
| 73 | usr/gen_init_cpio file directives are output. If a directory is | 73 | usr/gen_init_cpio file directives are output. If a directory is |
| 74 | specified as an argument to scripts/gen_initramfs_list.sh then the | 74 | specified as an argument to usr/gen_initramfs_list.sh then the |
| 75 | contents of the file are simply copied to the output. All of the output | 75 | contents of the file are simply copied to the output. All of the output |
| 76 | directives from directory scanning and file contents copying are | 76 | directives from directory scanning and file contents copying are |
| 77 | processed by usr/gen_init_cpio. | 77 | processed by usr/gen_init_cpio. |
| 78 | 78 | ||
| 79 | See also 'scripts/gen_initramfs_list.sh -h'. | 79 | See also 'usr/gen_initramfs_list.sh -h'. |
| 80 | 80 | ||
| 81 | Where's this all leading? | 81 | Where's this all leading? |
| 82 | ========================= | 82 | ========================= |
| @@ -18,9 +18,10 @@ made available by the underlying graphics card are also possible. · 17 unmodified lines | |||
| 18 | A. Configuration | 18 | A. Configuration |
| 19 | 19 | ||
| 20 | The framebuffer console can be enabled by using your favorite kernel | 20 | The framebuffer console can be enabled by using your favorite kernel |
| 21 | configuration tool. It is under Device Drivers->Graphics Support->Support for | 21 | configuration tool. It is under Device Drivers->Graphics Support->Frame |
| 22 | framebuffer devices->Framebuffer Console Support. Select 'y' to compile | 22 | buffer Devices->Console display driver support->Framebuffer Console Support. |
| 23 | support statically, or 'm' for module support. The module will be fbcon. | 23 | Select 'y' to compile support statically or 'm' for module support. The |
| 24 | module will be fbcon. | ||
| 24 | 25 | ||
| 25 | In order for fbcon to activate, at least one framebuffer driver is | 26 | In order for fbcon to activate, at least one framebuffer driver is |
| 26 | required, so choose from any of the numerous drivers available. For x86 | 27 | required, so choose from any of the numerous drivers available. For x86 |
| @@ -29,10 +30,10 @@ always be available. However, using a chipset-specific driver will give you · 2 unmodified lines | |||
| 29 | more speed and features, such as the ability to change the video mode | 30 | more speed and features, such as the ability to change the video mode |
| 30 | dynamically. | 31 | dynamically. |
| 31 | 32 | ||
| 32 | To display the penguin logo, choose any logo available in Logo | 33 | To display the penguin logo, choose any logo available in Graphics |
| 33 | Configuration->Boot up logo. | 34 | support->Bootup logo. |
| 34 | 35 | ||
| 35 | Also, you will need to select at least one compiled-in fonts, but if | 36 | Also, you will need to select at least one compiled-in font, but if |
| 36 | you don't do anything, the kernel configuration tool will select one for you, | 37 | you don't do anything, the kernel configuration tool will select one for you, |
| 37 | usually an 8x16 font. | 38 | usually an 8x16 font. |
| 38 | 39 | ||
| @@ -135,16 +136,16 @@ C. Boot options · 96 unmodified lines | |||
| 135 | 136 | ||
| 136 | The angle can be changed anytime afterwards by 'echoing' the same | 137 | The angle can be changed anytime afterwards by 'echoing' the same |
| 137 | numbers to any one of the 2 attributes found in | 138 | numbers to any one of the 2 attributes found in |
| 138 | /sys/class/graphics/fbcon | 139 | /sys/class/graphics/fbcon: |
| 139 | 140 | ||
| 140 | rotate - rotate the display of the active console | 141 | rotate - rotate the display of the active console |
| 141 | rotate_all - rotate the display of all consoles | 142 | rotate_all - rotate the display of all consoles |
| 142 | 143 | ||
| 143 | Console rotation will only become available if Console Rotation | 144 | Console rotation will only become available if Framebuffer Console |
| 144 | Support is compiled in your kernel. | 145 | Rotation support is compiled in your kernel. |
| 145 | 146 | ||
| 146 | NOTE: This is purely console rotation. Any other applications that | 147 | NOTE: This is purely console rotation. Any other applications that |
| 147 | use the framebuffer will remain at their 'normal'orientation. | 148 | use the framebuffer will remain at their 'normal' orientation. |
| 148 | Actually, the underlying fb driver is totally ignorant of console | 149 | Actually, the underlying fb driver is totally ignorant of console |
| 149 | rotation. | 150 | rotation. |
| 150 | 151 | ||
| @@ -164,7 +165,7 @@ C. Boot options · 13 unmodified lines | |||
| 164 | 165 | ||
| 165 | C. Attaching, Detaching and Unloading | 166 | C. Attaching, Detaching and Unloading |
| 166 | 167 | ||
| 167 | Before going on how to attach, detach and unload the framebuffer console, an | 168 | Before going on to how to attach, detach and unload the framebuffer console, an |
| 168 | illustration of the dependencies may help. | 169 | illustration of the dependencies may help. |
| 169 | 170 | ||
| 170 | The console layer, as with most subsystems, needs a driver that interfaces with | 171 | The console layer, as with most subsystems, needs a driver that interfaces with |
| @@ -182,7 +183,7 @@ because fbcon is an intermediate layer between the console and the drivers: · 11 unmodified lines | |||
| 182 | 183 | ||
| 183 | console ---> fbcon ---> fbdev drivers ---> hardware | 184 | console ---> fbcon ---> fbdev drivers ---> hardware |
| 184 | 185 | ||
| 185 | The fbdev drivers cannot be unloaded if it's bound to fbcon, and fbcon cannot | 186 | The fbdev drivers cannot be unloaded if bound to fbcon, and fbcon cannot |
| 186 | be unloaded if it's bound to the console layer. | 187 | be unloaded if it's bound to the console layer. |
| 187 | 188 | ||
| 188 | So to unload the fbdev drivers, one must first unbind fbcon from the console, | 189 | So to unload the fbdev drivers, one must first unbind fbcon from the console, |
| @@ -232,7 +233,7 @@ restored properly. The following is one of the several methods that you can do: · 43 unmodified lines | |||
| 232 | echo 0 > /sys/class/vtconsole/vtcon1/bind | 233 | echo 0 > /sys/class/vtconsole/vtcon1/bind |
| 233 | 234 | ||
| 234 | 6. That's it, you're back to VGA mode. And if you compiled fbcon as a module, | 235 | 6. That's it, you're back to VGA mode. And if you compiled fbcon as a module, |
| 235 | you can unload it by 'rmmod fbcon' | 236 | you can unload it by 'rmmod fbcon'. |
| 236 | 237 | ||
| 237 | 7. To reattach fbcon: | 238 | 7. To reattach fbcon: |
| 238 | 239 | ||
| @@ -290,7 +291,7 @@ Samples: · 51 unmodified lines | |||
| 290 | ======== | 291 | ======== |
| 291 | 292 | ||
| 292 | Here are 2 sample bash scripts that you can use to bind or unbind the | 293 | Here are 2 sample bash scripts that you can use to bind or unbind the |
| 293 | framebuffer console driver if you are in an X86 box: | 294 | framebuffer console driver if you are on an X86 box: |
| 294 | 295 | ||
| 295 | --------------------------------------------------------------------------- | 296 | --------------------------------------------------------------------------- |
| 296 | #!/bin/bash | 297 | #!/bin/bash |
| @@ -5,10 +5,10 @@ · 4 unmodified lines | |||
| 5 | # | 5 | # |
| 6 | # Architecture requirements | 6 | # Architecture requirements |
| 7 | # | 7 | # |
| 8 | # * arm64 | 8 | # * arm/arm64 |
| 9 | # | 9 | # |
| 10 | # Rely on eret context synchronization when returning from IPI handler, and | 10 | # Rely on implicit context synchronization as a result of exception return |
| 11 | # when returning to user-space. | 11 | # when returning from IPI handler, and when returning to user-space. |
| 12 | # | 12 | # |
| 13 | # * x86 | 13 | # * x86 |
| 14 | # | 14 | # |
| @@ -31,7 +31,7 @@ · 16 unmodified lines | |||
| 31 | ----------------------- | 31 | ----------------------- |
| 32 | | alpha: | TODO | | 32 | | alpha: | TODO | |
| 33 | | arc: | TODO | | 33 | | arc: | TODO | |
| 34 | | arm: | TODO | | 34 | | arm: | ok | |
| 35 | | arm64: | ok | | 35 | | arm64: | ok | |
| 36 | | c6x: | TODO | | 36 | | c6x: | TODO | |
| 37 | | h8300: | TODO | | 37 | | h8300: | TODO | |
| @@ -21,8 +21,7 @@ prototypes: · 20 unmodified lines | |||
| 21 | char *(*d_dname)((struct dentry *dentry, char *buffer, int buflen); | 21 | char *(*d_dname)((struct dentry *dentry, char *buffer, int buflen); |
| 22 | struct vfsmount *(*d_automount)(struct path *path); | 22 | struct vfsmount *(*d_automount)(struct path *path); |
| 23 | int (*d_manage)(const struct path *, bool); | 23 | int (*d_manage)(const struct path *, bool); |
| 24 | struct dentry *(*d_real)(struct dentry *, const struct inode *, | 24 | struct dentry *(*d_real)(struct dentry *, const struct inode *); |
| 25 | unsigned int, unsigned int); | ||
| 26 | 25 | ||
| 27 | locking rules: | 26 | locking rules: |
| 28 | rename_lock ->d_lock may block rcu-walk | 27 | rename_lock ->d_lock may block rcu-walk |
| @@ -64,7 +63,7 @@ prototypes: · 35 unmodified lines | |||
| 64 | void (*update_time)(struct inode *, struct timespec *, int); | 63 | void (*update_time)(struct inode *, struct timespec *, int); |
| 65 | int (*atomic_open)(struct inode *, struct dentry *, | 64 | int (*atomic_open)(struct inode *, struct dentry *, |
| 66 | struct file *, unsigned open_flag, | 65 | struct file *, unsigned open_flag, |
| 67 | umode_t create_mode, int *opened); | 66 | umode_t create_mode); |
| 68 | int (*tmpfile) (struct inode *, struct dentry *, umode_t); | 67 | int (*tmpfile) (struct inode *, struct dentry *, umode_t); |
| 69 | 68 | ||
| 70 | locking rules: | 69 | locking rules: |
| @@ -532,9 +531,9 @@ More details about quota locking can be found in fs/dquot.c. · 461 unmodified lines | |||
| 532 | prototypes: | 531 | prototypes: |
| 533 | void (*open)(struct vm_area_struct*); | 532 | void (*open)(struct vm_area_struct*); |
| 534 | void (*close)(struct vm_area_struct*); | 533 | void (*close)(struct vm_area_struct*); |
| 535 | int (*fault)(struct vm_area_struct*, struct vm_fault *); | 534 | vm_fault_t (*fault)(struct vm_area_struct*, struct vm_fault *); |
| 536 | int (*page_mkwrite)(struct vm_area_struct *, struct vm_fault *); | 535 | vm_fault_t (*page_mkwrite)(struct vm_area_struct *, struct vm_fault *); |
| 537 | int (*pfn_mkwrite)(struct vm_area_struct *, struct vm_fault *); | 536 | vm_fault_t (*pfn_mkwrite)(struct vm_area_struct *, struct vm_fault *); |
| 538 | int (*access)(struct vm_area_struct *, unsigned long, void*, int, int); | 537 | int (*access)(struct vm_area_struct *, unsigned long, void*, int, int); |
| 539 | 538 | ||
| 540 | locking rules: | 539 | locking rules: |
| @@ -1,1068 +1,4 @@ | |||
| 1 | See https://wiki.samba.org/index.php/LinuxCIFSKernel for | 1 | See https://wiki.samba.org/index.php/LinuxCIFSKernel for summary |
| 2 | more current information. | 2 | information (that may be easier to read than parsing the output of |
| 3 | 3 | "git log fs/cifs") about fixes/improvements to CIFS/SMB2/SMB3 support (changes | |
| 4 | Version 1.62 | 4 | to cifs.ko module) by kernel version (and cifs internal module version). |
| 5 | ------------ | ||
| 6 | Add sockopt=TCP_NODELAY mount option. EA (xattr) routines hardened | ||
| 7 | to more strictly handle corrupt frames. | ||
| 8 | |||
| 9 | Version 1.61 | ||
| 10 | ------------ | ||
| 11 | Fix append problem to Samba servers (files opened with O_APPEND could | ||
| 12 | have duplicated data). Fix oops in cifs_lookup. Workaround problem | ||
| 13 | mounting to OS/400 Netserve. Fix oops in cifs_get_tcp_session. | ||
| 14 | Disable use of server inode numbers when server only | ||
| 15 | partially supports them (e.g. for one server querying inode numbers on | ||
| 16 | FindFirst fails but QPathInfo queries works). Fix oops with dfs in | ||
| 17 | cifs_put_smb_ses. Fix mmap to work on directio mounts (needed | ||
| 18 | for OpenOffice when on forcedirectio mount e.g.) | ||
| 19 | |||
| 20 | Version 1.60 | ||
| 21 | ------------- | ||
| 22 | Fix memory leak in reconnect. Fix oops in DFS mount error path. | ||
| 23 | Set s_maxbytes to smaller (the max that vfs can handle) so that | ||
| 24 | sendfile will now work over cifs mounts again. Add noforcegid | ||
| 25 | and noforceuid mount parameters. Fix small mem leak when using | ||
| 26 | ntlmv2. Fix 2nd mount to same server but with different port to | ||
| 27 | be allowed (rather than reusing the 1st port) - only when the | ||
| 28 | user explicitly overrides the port on the 2nd mount. | ||
| 29 | |||
| 30 | Version 1.59 | ||
| 31 | ------------ | ||
| 32 | Client uses server inode numbers (which are persistent) rather than | ||
| 33 | client generated ones by default (mount option "serverino" turned | ||
| 34 | on by default if server supports it). Add forceuid and forcegid | ||
| 35 | mount options (so that when negotiating unix extensions specifying | ||
| 36 | which uid mounted does not immediately force the server's reported | ||
| 37 | uids to be overridden). Add support for scope mount parm. Improve | ||
| 38 | hard link detection to use same inode for both. Do not set | ||
| 39 | read-only dos attribute on directories (for chmod) since Windows | ||
| 40 | explorer special cases this attribute bit for directories for | ||
| 41 | a different purpose. | ||
| 42 | |||
| 43 | Version 1.58 | ||
| 44 | ------------ | ||
| 45 | Guard against buffer overruns in various UCS-2 to UTF-8 string conversions | ||
| 46 | when the UTF-8 string is composed of unusually long (more than 4 byte) converted | ||
| 47 | characters. Add support for mounting root of a share which redirects immediately | ||
| 48 | to DFS target. Convert string conversion functions from Unicode to more | ||
| 49 | accurately mark string length before allocating memory (which may help the | ||
| 50 | rare cases where a UTF-8 string is much larger than the UCS2 string that | ||
| 51 | we converted from). Fix endianness of the vcnum field used during | ||
| 52 | session setup to distinguish multiple mounts to same server from different | ||
| 53 | userids. Raw NTLMSSP fixed (it requires /proc/fs/cifs/experimental | ||
| 54 | flag to be set to 2, and mount must enable krb5 to turn on extended security). | ||
| 55 | Performance of file create to Samba improved (posix create on lookup | ||
| 56 | removes 1 of 2 network requests sent on file create) | ||
| 57 | |||
| 58 | Version 1.57 | ||
| 59 | ------------ | ||
| 60 | Improve support for multiple security contexts to the same server. We | ||
| 61 | used to use the same "vcnumber" for all connections which could cause | ||
| 62 | the server to treat subsequent connections, especially those that | ||
| 63 | are authenticated as guest, as reconnections, invalidating the earlier | ||
| 64 | user's smb session. This fix allows cifs to mount multiple times to the | ||
| 65 | same server with different userids without risking invalidating earlier | ||
| 66 | established security contexts. fsync now sends SMB Flush operation | ||
| 67 | to better ensure that we wait for server to write all of the data to | ||
| 68 | server disk (not just write it over the network). Add new mount | ||
| 69 | parameter to allow user to disable sending the (slow) SMB flush on | ||
| 70 | fsync if desired (fsync still flushes all cached write data to the server). | ||
| 71 | Posix file open support added (turned off after one attempt if server | ||
| 72 | fails to support it properly, as with Samba server versions prior to 3.3.2) | ||
| 73 | Fix "redzone overwritten" bug in cifs_put_tcon (CIFSTcon may allocate too | ||
| 74 | little memory for the "nativeFileSystem" field returned by the server | ||
| 75 | during mount). Endian convert inode numbers if necessary (makes it easier | ||
| 76 | to compare inode numbers on network files from big endian systems). | ||
| 77 | |||
| 78 | Version 1.56 | ||
| 79 | ------------ | ||
| 80 | Add "forcemandatorylock" mount option to allow user to use mandatory | ||
| 81 | rather than posix (advisory) byte range locks, even though server would | ||
| 82 | support posix byte range locks. Fix query of root inode when prefixpath | ||
| 83 | specified and user does not have access to query information about the | ||
| 84 | top of the share. Fix problem in 2.6.28 resolving DFS paths to | ||
| 85 | Samba servers (worked to Windows). Fix rmdir so that pending search | ||
| 86 | (readdir) requests do not get invalid results which include the now | ||
| 87 | removed directory. Fix oops in cifs_dfs_ref.c when prefixpath is not reachable | ||
| 88 | when using DFS. Add better file create support to servers which support | ||
| 89 | the CIFS POSIX protocol extensions (this adds support for new flags | ||
| 90 | on create, and improves semantics for write of locked ranges). | ||
| 91 | |||
| 92 | Version 1.55 | ||
| 93 | ------------ | ||
| 94 | Various fixes to make delete of open files behavior more predictable | ||
| 95 | (when delete of an open file fails we mark the file as "delete-on-close" | ||
| 96 | in a way that more servers accept, but only if we can first rename the | ||
| 97 | file to a temporary name). Add experimental support for more safely | ||
| 98 | handling fcntl(F_SETLEASE). Convert cifs to using blocking tcp | ||
| 99 | sends, and also let tcp autotune the socket send and receive buffers. | ||
| 100 | This reduces the number of EAGAIN errors returned by TCP/IP in | ||
| 101 | high stress workloads (and the number of retries on socket writes | ||
| 102 | when sending large SMBWriteX requests). Fix case in which a portion of | ||
| 103 | data can in some cases not get written to the file on the server before the | ||
| 104 | file is closed. Fix DFS parsing to properly handle path consumed field, | ||
| 105 | and to handle certain codepage conversions better. Fix mount and | ||
| 106 | umount race that can cause oops in mount or umount or reconnect. | ||
| 107 | |||
| 108 | Version 1.54 | ||
| 109 | ------------ | ||
| 110 | Fix premature write failure on congested networks (we would give up | ||
| 111 | on EAGAIN from the socket too quickly on large writes). | ||
| 112 | Cifs_mkdir and cifs_create now respect the setgid bit on parent dir. | ||
| 113 | Fix endian problems in acl (mode from/to cifs acl) on bigendian | ||
| 114 | architectures. Fix problems with preserving timestamps on copying open | ||
| 115 | files (e.g. "cp -a") to Windows servers. For mkdir and create honor setgid bit | ||
| 116 | on parent directory when server supports Unix Extensions but not POSIX | ||
| 117 | create. Update cifs.upcall version to handle new Kerberos sec flags | ||
| 118 | (this requires update of cifs.upcall program from Samba). Fix memory leak | ||
| 119 | on dns_upcall (resolving DFS referralls). Fix plain text password | ||
| 120 | authentication (requires setting SecurityFlags to 0x30030 to enable | ||
| 121 | lanman and plain text though). Fix writes to be at correct offset when | ||
| 122 | file is open with O_APPEND and file is on a directio (forcediretio) mount. | ||
| 123 | Fix bug in rewinding readdir directory searches. Add nodfs mount option. | ||
| 124 | |||
| 125 | Version 1.53 | ||
| 126 | ------------ | ||
| 127 | DFS support added (Microsoft Distributed File System client support needed | ||
| 128 | for referrals which enable a hierarchical name space among servers). | ||
| 129 | Disable temporary caching of mode bits to servers which do not support | ||
| 130 | storing of mode (e.g. Windows servers, when client mounts without cifsacl | ||
| 131 | mount option) and add new "dynperm" mount option to enable temporary caching | ||
| 132 | of mode (enable old behavior). Fix hang on mount caused when server crashes | ||
| 133 | tcp session during negotiate protocol. | ||
| 134 | |||
| 135 | Version 1.52 | ||
| 136 | ------------ | ||
| 137 | Fix oops on second mount to server when null auth is used. | ||
| 138 | Enable experimental Kerberos support. Return writebehind errors on flush | ||
| 139 | and sync so that events like out of disk space get reported properly on | ||
| 140 | cached files. Fix setxattr failure to certain Samba versions. Fix mount | ||
| 141 | of second share to disconnected server session (autoreconnect on this). | ||
| 142 | Add ability to modify cifs acls for handling chmod (when mounted with | ||
| 143 | cifsacl flag). Fix prefixpath path separator so we can handle mounts | ||
| 144 | with prefixpaths longer than one directory (one path component) when | ||
| 145 | mounted to Windows servers. Fix slow file open when cifsacl | ||
| 146 | enabled. Fix memory leak in FindNext when the SMB call returns -EBADF. | ||
| 147 | |||
| 148 | |||
| 149 | Version 1.51 | ||
| 150 | ------------ | ||
| 151 | Fix memory leak in statfs when mounted to very old servers (e.g. | ||
| 152 | Windows 9x). Add new feature "POSIX open" which allows servers | ||
| 153 | which support the current POSIX Extensions to provide better semantics | ||
| 154 | (e.g. delete for open files opened with posix open). Take into | ||
| 155 | account umask on posix mkdir not just older style mkdir. Add | ||
| 156 | ability to mount to IPC$ share (which allows CIFS named pipes to be | ||
| 157 | opened, read and written as if they were files). When 1st tree | ||
| 158 | connect fails (e.g. due to signing negotiation failure) fix | ||
| 159 | leak that causes cifsd not to stop and rmmod to fail to cleanup | ||
| 160 | cifs_request_buffers pool. Fix problem with POSIX Open/Mkdir on | ||
| 161 | bigendian architectures. Fix possible memory corruption when | ||
| 162 | EAGAIN returned on kern_recvmsg. Return better error if server | ||
| 163 | requires packet signing but client has disabled it. When mounted | ||
| 164 | with cifsacl mount option - mode bits are approximated based | ||
| 165 | on the contents of the ACL of the file or directory. When cifs | ||
| 166 | mount helper is missing convert make sure that UNC name | ||
| 167 | has backslash (not forward slash) between ip address of server | ||
| 168 | and the share name. | ||
| 169 | |||
| 170 | Version 1.50 | ||
| 171 | ------------ | ||
| 172 | Fix NTLMv2 signing. NFS server mounted over cifs works (if cifs mount is | ||
| 173 | done with "serverino" mount option). Add support for POSIX Unlink | ||
| 174 | (helps with certain sharing violation cases when server such as | ||
| 175 | Samba supports newer POSIX CIFS Protocol Extensions). Add "nounix" | ||
| 176 | mount option to allow disabling the CIFS Unix Extensions for just | ||
| 177 | that mount. Fix hang on spinlock in find_writable_file (race when | ||
| 178 | reopening file after session crash). Byte range unlock request to | ||
| 179 | windows server could unlock more bytes (on server copy of file) | ||
| 180 | than intended if start of unlock request is well before start of | ||
| 181 | a previous byte range lock that we issued. | ||
| 182 | |||
| 183 | Version 1.49 | ||
| 184 | ------------ | ||
| 185 | IPv6 support. Enable ipv6 addresses to be passed on mount (put the ipv6 | ||
| 186 | address after the "ip=" mount option, at least until mount.cifs is fixed to | ||
| 187 | handle DNS host to ipv6 name translation). Accept override of uid or gid | ||
| 188 | on mount even when Unix Extensions are negotiated (it used to be ignored | ||
| 189 | when Unix Extensions were ignored). This allows users to override the | ||
| 190 | default uid and gid for files when they are certain that the uids or | ||
| 191 | gids on the server do not match those of the client. Make "sec=none" | ||
| 192 | mount override username (so that null user connection is attempted) | ||
| 193 | to match what documentation said. Support for very large reads, over 127K, | ||
| 194 | available to some newer servers (such as Samba 3.0.26 and later but | ||
| 195 | note that it also requires setting CIFSMaxBufSize at module install | ||
| 196 | time to a larger value which may hurt performance in some cases). | ||
| 197 | Make sign option force signing (or fail if server does not support it). | ||
| 198 | |||
| 199 | Version 1.48 | ||
| 200 | ------------ | ||
| 201 | Fix mtime bouncing around from local idea of last write times to remote time. | ||
| 202 | Fix hang (in i_size_read) when simultaneous size update of same remote file | ||
| 203 | on smp system corrupts sequence number. Do not reread unnecessarily partial page | ||
| 204 | (which we are about to overwrite anyway) when writing out file opened rw. | ||
| 205 | When DOS attribute of file on non-Unix server's file changes on the server side | ||
| 206 | from read-only back to read-write, reflect this change in default file mode | ||
| 207 | (we had been leaving a file's mode read-only until the inode were reloaded). | ||
| 208 | Allow setting of attribute back to ATTR_NORMAL (removing readonly dos attribute | ||
| 209 | when archive dos attribute not set and we are changing mode back to writeable | ||
| 210 | on server which does not support the Unix Extensions). Remove read only dos | ||
| 211 | attribute on chmod when adding any write permission (ie on any of | ||
| 212 | user/group/other (not all of user/group/other ie 0222) when | ||
| 213 | mounted to windows. Add support for POSIX MkDir (slight performance | ||
| 214 | enhancement and eliminates the network race between the mkdir and set | ||
| 215 | path info of the mode). | ||
| 216 | |||
| 217 | |||
| 218 | Version 1.47 | ||
| 219 | ------------ | ||
| 220 | Fix oops in list_del during mount caused by unaligned string. | ||
| 221 | Fix file corruption which could occur on some large file | ||
| 222 | copies caused by writepages page i/o completion bug. | ||
| 223 | Seek to SEEK_END forces check for update of file size for non-cached | ||
| 224 | files. Allow file size to be updated on remote extend of locally open, | ||
| 225 | non-cached file. Fix reconnect to newer Samba servers (or other servers | ||
| 226 | which support the CIFS Unix/POSIX extensions) so that we again tell the | ||
| 227 | server the Unix/POSIX cifs capabilities which we support (SetFSInfo). | ||
| 228 | Add experimental support for new POSIX Open/Mkdir (which returns | ||
| 229 | stat information on the open, and allows setting the mode). | ||
| 230 | |||
| 231 | Version 1.46 | ||
| 232 | ------------ | ||
| 233 | Support deep tree mounts. Better support OS/2, Win9x (DOS) time stamps. | ||
| 234 | Allow null user to be specified on mount ("username="). Do not return | ||
| 235 | EINVAL on readdir when filldir fails due to overwritten blocksize | ||
| 236 | (fixes FC problem). Return error in rename 2nd attempt retry (ie report | ||
| 237 | if rename by handle also fails, after rename by path fails, we were | ||
| 238 | not reporting whether the retry worked or not). Fix NTLMv2 to | ||
| 239 | work to Windows servers (mount with option "sec=ntlmv2"). | ||
| 240 | |||
| 241 | Version 1.45 | ||
| 242 | ------------ | ||
| 243 | Do not time out lockw calls when using posix extensions. Do not | ||
| 244 | time out requests if server still responding reasonably fast | ||
| 245 | on requests on other threads. Improve POSIX locking emulation, | ||
| 246 | (lock cancel now works, and unlock of merged range works even | ||
| 247 | to Windows servers now). Fix oops on mount to lanman servers | ||
| 248 | (win9x, os/2 etc.) when null password. Do not send listxattr | ||
| 249 | (SMB to query all EAs) if nouser_xattr specified. Fix SE Linux | ||
| 250 | problem (instantiate inodes/dentries in right order for readdir). | ||
| 251 | |||
| 252 | Version 1.44 | ||
| 253 | ------------ | ||
| 254 | Rewritten sessionsetup support, including support for legacy SMB | ||
| 255 | session setup needed for OS/2 and older servers such as Windows 95 and 98. | ||
| 256 | Fix oops on ls to OS/2 servers. Add support for level 1 FindFirst | ||
| 257 | so we can do search (ls etc.) to OS/2. Do not send NTCreateX | ||
| 258 | or recent levels of FindFirst unless server says it supports NT SMBs | ||
| 259 | (instead use legacy equivalents from LANMAN dialect). Fix to allow | ||
| 260 | NTLMv2 authentication support (now can use stronger password hashing | ||
| 261 | on mount if corresponding /proc/fs/cifs/SecurityFlags is set (0x4004). | ||
| 262 | Allow override of global cifs security flags on mount via "sec=" option(s). | ||
| 263 | |||
| 264 | Version 1.43 | ||
| 265 | ------------ | ||
| 266 | POSIX locking to servers which support CIFS POSIX Extensions | ||
| 267 | (disabled by default controlled by proc/fs/cifs/Experimental). | ||
| 268 | Handle conversion of long share names (especially Asian languages) | ||
| 269 | to Unicode during mount. Fix memory leak in sess struct on reconnect. | ||
| 270 | Fix rare oops after acpi suspend. Fix O_TRUNC opens to overwrite on | ||
| 271 | cifs open which helps rare case when setpathinfo fails or server does | ||
| 272 | not support it. | ||
| 273 | |||
| 274 | Version 1.42 | ||
| 275 | ------------ | ||
| 276 | Fix slow oplock break when mounted to different servers at the same time and | ||
| 277 | the tids match and we try to find matching fid on wrong server. Fix read | ||
| 278 | looping when signing required by server (2.6.16 kernel only). Fix readdir | ||
| 279 | vs. rename race which could cause each to hang. Return . and .. even | ||
| 280 | if server does not. Allow searches to skip first three entries and | ||
| 281 | begin at any location. Fix oops in find_writeable_file. | ||
| 282 | |||
| 283 | Version 1.41 | ||
| 284 | ------------ | ||
| 285 | Fix NTLMv2 security (can be enabled in /proc/fs/cifs) so customers can | ||
| 286 | configure stronger authentication. Fix sfu symlinks so they can | ||
| 287 | be followed (not just recognized). Fix wraparound of bcc on | ||
| 288 | read responses when buffer size over 64K and also fix wrap of | ||
| 289 | max smb buffer size when CIFSMaxBufSize over 64K. Fix oops in | ||
| 290 | cifs_user_read and cifs_readpages (when EAGAIN on send of smb | ||
| 291 | on socket is returned over and over). Add POSIX (advisory) byte range | ||
| 292 | locking support (requires server with newest CIFS UNIX Extensions | ||
| 293 | to the protocol implemented). Slow down negprot slightly in port 139 | ||
| 294 | RFC1001 case to give session_init time on buggy servers. | ||
| 295 | |||
| 296 | Version 1.40 | ||
| 297 | ------------ | ||
| 298 | Use fsuid (fsgid) more consistently instead of uid (gid). Improve performance | ||
| 299 | of readpages by eliminating one extra memcpy. Allow update of file size | ||
| 300 | from remote server even if file is open for write as long as mount is | ||
| 301 | directio. Recognize share mode security and send NTLM encrypted password | ||
| 302 | on tree connect if share mode negotiated. | ||
| 303 | |||
| 304 | Version 1.39 | ||
| 305 | ------------ | ||
| 306 | Defer close of a file handle slightly if pending writes depend on that handle | ||
| 307 | (this reduces the EBADF bad file handle errors that can be logged under heavy | ||
| 308 | stress on writes). Modify cifs Kconfig options to expose CONFIG_CIFS_STATS2 | ||
| 309 | Fix SFU style symlinks and mknod needed for servers which do not support the | ||
| 310 | CIFS Unix Extensions. Fix setfacl/getfacl on bigendian. Timeout negative | ||
| 311 | dentries so files that the client sees as deleted but that later get created | ||
| 312 | on the server will be recognized. Add client side permission check on setattr. | ||
| 313 | Timeout stuck requests better (where server has never responded or sent corrupt | ||
| 314 | responses) | ||
| 315 | |||
| 316 | Version 1.38 | ||
| 317 | ------------ | ||
| 318 | Fix tcp socket retransmission timeouts (e.g. on ENOSPACE from the socket) | ||
| 319 | to be smaller at first (but increasing) so large write performance performance | ||
| 320 | over GigE is better. Do not hang thread on illegal byte range lock response | ||
| 321 | from Windows (Windows can send an RFC1001 size which does not match smb size) by | ||
| 322 | allowing an SMBs TCP length to be up to a few bytes longer than it should be. | ||
| 323 | wsize and rsize can now be larger than negotiated buffer size if server | ||
| 324 | supports large readx/writex, even when directio mount flag not specified. | ||
| 325 | Write size will in many cases now be 16K instead of 4K which greatly helps | ||
| 326 | file copy performance on lightly loaded networks. Fix oops in dnotify | ||
| 327 | when experimental config flag enabled. Make cifsFYI more granular. | ||
| 328 | |||
| 329 | Version 1.37 | ||
| 330 | ------------ | ||
| 331 | Fix readdir caching when unlink removes file in current search buffer, | ||
| 332 | and this is followed by a rewind search to just before the deleted entry. | ||
| 333 | Do not attempt to set ctime unless atime and/or mtime change requested | ||
| 334 | (most servers throw it away anyway). Fix length check of received smbs | ||
| 335 | to be more accurate. Fix big endian problem with mapchars mount option, | ||
| 336 | and with a field returned by statfs. | ||
| 337 | |||
| 338 | Version 1.36 | ||
| 339 | ------------ | ||
| 340 | Add support for mounting to older pre-CIFS servers such as Windows9x and ME. | ||
| 341 | For these older servers, add option for passing netbios name of server in | ||
| 342 | on mount (servernetbiosname). Add suspend support for power management, to | ||
| 343 | avoid cifsd thread preventing software suspend from working. | ||
| 344 | Add mount option for disabling the default behavior of sending byte range lock | ||
| 345 | requests to the server (necessary for certain applications which break with | ||
| 346 | mandatory lock behavior such as Evolution), and also mount option for | ||
| 347 | requesting case insensitive matching for path based requests (requesting | ||
| 348 | case sensitive is the default). | ||
| 349 | |||
| 350 | Version 1.35 | ||
| 351 | ------------ | ||
| 352 | Add writepage performance improvements. Fix path name conversions | ||
| 353 | for long filenames on mounts which were done with "mapchars" mount option | ||
| 354 | specified. Ensure multiplex ids do not collide. Fix case in which | ||
| 355 | rmmod can oops if done soon after last unmount. Fix truncated | ||
| 356 | search (readdir) output when resume filename was a long filename. | ||
| 357 | Fix filename conversion when mapchars mount option was specified and | ||
| 358 | filename was a long filename. | ||
| 359 | |||
| 360 | Version 1.34 | ||
| 361 | ------------ | ||
| 362 | Fix error mapping of the TOO_MANY_LINKS (hardlinks) case. | ||
| 363 | Do not oops if root user kills cifs oplock kernel thread or | ||
| 364 | kills the cifsd thread (NB: killing the cifs kernel threads is not | ||
| 365 | recommended, unmount and rmmod cifs will kill them when they are | ||
| 366 | no longer needed). Fix readdir to ASCII servers (ie older servers | ||
| 367 | which do not support Unicode) and also require asterisk. | ||
| 368 | Fix out of memory case in which data could be written one page | ||
| 369 | off in the page cache. | ||
| 370 | |||
| 371 | Version 1.33 | ||
| 372 | ------------ | ||
| 373 | Fix caching problem, in which readdir of directory containing a file | ||
| 374 | which was cached could cause the file's time stamp to be updated | ||
| 375 | without invalidating the readahead data (so we could get stale | ||
| 376 | file data on the client for that file even as the server copy changed). | ||
| 377 | Cleanup response processing so cifsd can not loop when abnormally | ||
| 378 | terminated. | ||
| 379 | |||
| 380 | |||
| 381 | Version 1.32 | ||
| 382 | ------------ | ||
| 383 | Fix oops in ls when Transact2 FindFirst (or FindNext) returns more than one | ||
| 384 | transact response for an SMB request and search entry split across two frames. | ||
| 385 | Add support for lsattr (getting ext2/ext3/reiserfs attr flags from the server) | ||
| 386 | as new protocol extensions. Do not send Get/Set calls for POSIX ACLs | ||
| 387 | unless server explicitly claims to support them in CIFS Unix extensions | ||
| 388 | POSIX ACL capability bit. Fix packet signing when multiuser mounting with | ||
| 389 | different users from the same client to the same server. Fix oops in | ||
| 390 | cifs_close. Add mount option for remapping reserved characters in | ||
| 391 | filenames (also allow recognizing files with created by SFU which have any | ||
| 392 | of these seven reserved characters, except backslash, to be recognized). | ||
| 393 | Fix invalid transact2 message (we were sometimes trying to interpret | ||
| 394 | oplock breaks as SMB responses). Add ioctl for checking that the | ||
| 395 | current uid matches the uid of the mounter (needed by umount.cifs). | ||
| 396 | Reduce the number of large buffer allocations in cifs response processing | ||
| 397 | (significantly reduces memory pressure under heavy stress with multiple | ||
| 398 | processes accessing the same server at the same time). | ||
| 399 | |||
| 400 | Version 1.31 | ||
| 401 | ------------ | ||
| 402 | Fix updates of DOS attributes and time fields so that files on NT4 servers | ||
| 403 | do not get marked delete on close. Display sizes of cifs buffer pools in | ||
| 404 | cifs stats. Fix oops in unmount when cifsd thread being killed by | ||
| 405 | shutdown. Add generic readv/writev and aio support. Report inode numbers | ||
| 406 | consistently in readdir and lookup (when serverino mount option is | ||
| 407 | specified use the inode number that the server reports - for both lookup | ||
| 408 | and readdir, otherwise by default the locally generated inode number is used | ||
| 409 | for inodes created in either path since servers are not always able to | ||
| 410 | provide unique inode numbers when exporting multiple volumes from under one | ||
| 411 | sharename). | ||
| 412 | |||
| 413 | Version 1.30 | ||
| 414 | ------------ | ||
| 415 | Allow new nouser_xattr mount parm to disable xattr support for user namespace. | ||
| 416 | Do not flag user_xattr mount parm in dmesg. Retry failures setting file time | ||
| 417 | (mostly affects NT4 servers) by retry with handle based network operation. | ||
| 418 | Add new POSIX Query FS Info for returning statfs info more accurately. | ||
| 419 | Handle passwords with multiple commas in them. | ||
| 420 | |||
| 421 | Version 1.29 | ||
| 422 | ------------ | ||
| 423 | Fix default mode in sysfs of cifs module parms. Remove old readdir routine. | ||
| 424 | Fix capabilities flags for large readx so as to allow reads larger than 64K. | ||
| 425 | |||
| 426 | Version 1.28 | ||
| 427 | ------------ | ||
| 428 | Add module init parm for large SMB buffer size (to allow it to be changed | ||
| 429 | from its default of 16K) which is especially useful for large file copy | ||
| 430 | when mounting with the directio mount option. Fix oops after | ||
| 431 | returning from mount when experimental ExtendedSecurity enabled and | ||
| 432 | SpnegoNegotiated returning invalid error. Fix case to retry better when | ||
| 433 | peek returns from 1 to 3 bytes on socket which should have more data. | ||
| 434 | Fixed path based calls (such as cifs lookup) to handle path names | ||
| 435 | longer than 530 (now can handle PATH_MAX). Fix pass through authentication | ||
| 436 | from Samba server to DC (Samba required dummy LM password). | ||
| 437 | |||
| 438 | Version 1.27 | ||
| 439 | ------------ | ||
| 440 | Turn off DNOTIFY (directory change notification support) by default | ||
| 441 | (unless built with the experimental flag) to fix hang with KDE | ||
| 442 | file browser. Fix DNOTIFY flag mappings. Fix hang (in wait_event | ||
| 443 | waiting on an SMB response) in SendReceive when session dies but | ||
| 444 | reconnects quickly from another task. Add module init parms for | ||
| 445 | minimum number of large and small network buffers in the buffer pools, | ||
| 446 | and for the maximum number of simultaneous requests. | ||
| 447 | |||
| 448 | Version 1.26 | ||
| 449 | ------------ | ||
| 450 | Add setfacl support to allow setting of ACLs remotely to Samba 3.10 and later | ||
| 451 | and other POSIX CIFS compliant servers. Fix error mapping for getfacl | ||
| 452 | to EOPNOTSUPP when server does not support posix acls on the wire. Fix | ||
| 453 | improperly zeroed buffer in CIFS Unix extensions set times call. | ||
| 454 | |||
| 455 | Version 1.25 | ||
| 456 | ------------ | ||
| 457 | Fix internationalization problem in cifs readdir with filenames that map to | ||
| 458 | longer UTF-8 strings than the string on the wire was in Unicode. Add workaround | ||
| 459 | for readdir to netapp servers. Fix search rewind (seek into readdir to return | ||
| 460 | non-consecutive entries). Do not do readdir when server negotiates | ||
| 461 | buffer size to small to fit filename. Add support for reading POSIX ACLs from | ||
| 462 | the server (add also acl and noacl mount options). | ||
| 463 | |||
| 464 | Version 1.24 | ||
| 465 | ------------ | ||
| 466 | Optionally allow using server side inode numbers, rather than client generated | ||
| 467 | ones by specifying mount option "serverino" - this is required for some apps | ||
| 468 | to work which double check hardlinked files and have persistent inode numbers. | ||
| 469 | |||
| 470 | Version 1.23 | ||
| 471 | ------------ | ||
| 472 | Multiple bigendian fixes. On little endian systems (for reconnect after | ||
| 473 | network failure) fix tcp session reconnect code so we do not try first | ||
| 474 | to reconnect on reverse of port 445. Treat reparse points (NTFS junctions) | ||
| 475 | as directories rather than symlinks because we can do follow link on them. | ||
| 476 | |||
| 477 | Version 1.22 | ||
| 478 | ------------ | ||
| 479 | Add config option to enable XATTR (extended attribute) support, mapping | ||
| 480 | xattr names in the "user." namespace space to SMB/CIFS EAs. Lots of | ||
| 481 | minor fixes pointed out by the Stanford SWAT checker (mostly missing | ||
| 482 | or out of order NULL pointer checks in little used error paths). | ||
| 483 | |||
| 484 | Version 1.21 | ||
| 485 | ------------ | ||
| 486 | Add new mount parm to control whether mode check (generic_permission) is done | ||
| 487 | on the client. If Unix extensions are enabled and the uids on the client | ||
| 488 | and server do not match, client permission checks are meaningless on | ||
| 489 | server uids that do not exist on the client (this does not affect the | ||
| 490 | normal ACL check which occurs on the server). Fix default uid | ||
| 491 | on mknod to match create and mkdir. Add optional mount parm to allow | ||
| 492 | override of the default uid behavior (in which the server sets the uid | ||
| 493 | and gid of newly created files). Normally for network filesystem mounts | ||
| 494 | user want the server to set the uid/gid on newly created files (rather than | ||
| 495 | using uid of the client processes you would in a local filesystem). | ||
| 496 | |||
| 497 | Version 1.20 | ||
| 498 | ------------ | ||
| 499 | Make transaction counts more consistent. Merge /proc/fs/cifs/SimultaneousOps | ||
| 500 | info into /proc/fs/cifs/DebugData. Fix oops in rare oops in readdir | ||
| 501 | (in build_wildcard_path_from_dentry). Fix mknod to pass type field | ||
| 502 | (block/char/fifo) properly. Remove spurious mount warning log entry when | ||
| 503 | credentials passed as mount argument. Set major/minor device number in | ||
| 504 | inode for block and char devices when unix extensions enabled. | ||
| 505 | |||
| 506 | Version 1.19 | ||
| 507 | ------------ | ||
| 508 | Fix /proc/fs/cifs/Stats and DebugData display to handle larger | ||
| 509 | amounts of return data. Properly limit requests to MAX_REQ (50 | ||
| 510 | is the usual maximum active multiplex SMB/CIFS requests per server). | ||
| 511 | Do not kill cifsd (and thus hurt the other SMB session) when more than one | ||
| 512 | session to the same server (but with different userids) exists and one | ||
| 513 | of the two user's smb sessions is being removed while leaving the other. | ||
| 514 | Do not loop reconnecting in cifsd demultiplex thread when admin | ||
| 515 | kills the thread without going through unmount. | ||
| 516 | |||
| 517 | Version 1.18 | ||
| 518 | ------------ | ||
| 519 | Do not rename hardlinked files (since that should be a noop). Flush | ||
| 520 | cached write behind data when reopening a file after session abend, | ||
| 521 | except when already in write. Grab per socket sem during reconnect | ||
| 522 | to avoid oops in sendmsg if overlapping with reconnect. Do not | ||
| 523 | reset cached inode file size on readdir for files open for write on | ||
| 524 | client. | ||
| 525 | |||
| 526 | |||
| 527 | Version 1.17 | ||
| 528 | ------------ | ||
| 529 | Update number of blocks in file so du command is happier (in Linux a fake | ||
| 530 | blocksize of 512 is required for calculating number of blocks in inode). | ||
| 531 | Fix prepare write of partial pages to read in data from server if possible. | ||
| 532 | Fix race on tcpStatus field between unmount and reconnection code, causing | ||
| 533 | cifsd process sometimes to hang around forever. Improve out of memory | ||
| 534 | checks in cifs_filldir | ||
| 535 | |||
| 536 | Version 1.16 | ||
| 537 | ------------ | ||
| 538 | Fix incorrect file size in file handle based setattr on big endian hardware. | ||
| 539 | Fix oops in build_path_from_dentry when out of memory. Add checks for invalid | ||
| 540 | and closing file structs in writepage/partialpagewrite. Add statistics | ||
| 541 | for each mounted share (new menuconfig option). Fix endianness problem in | ||
| 542 | volume information displayed in /proc/fs/cifs/DebugData (only affects | ||
| 543 | affects big endian architectures). Prevent renames while constructing | ||
| 544 | path names for open, mkdir and rmdir. | ||
| 545 | |||
| 546 | Version 1.15 | ||
| 547 | ------------ | ||
| 548 | Change to mempools for alloc smb request buffers and multiplex structs | ||
| 549 | to better handle low memory problems (and potential deadlocks). | ||
| 550 | |||
| 551 | Version 1.14 | ||
| 552 | ------------ | ||
| 553 | Fix incomplete listings of large directories on Samba servers when Unix | ||
| 554 | extensions enabled. Fix oops when smb_buffer can not be allocated. Fix | ||
| 555 | rename deadlock when writing out dirty pages at same time. | ||
| 556 | |||
| 557 | Version 1.13 | ||
| 558 | ------------ | ||
| 559 | Fix open of files in which O_CREATE can cause the mode to change in | ||
| 560 | some cases. Fix case in which retry of write overlaps file close. | ||
| 561 | Fix PPC64 build error. Reduce excessive stack usage in smb password | ||
| 562 | hashing. Fix overwrite of Linux user's view of file mode to Windows servers. | ||
| 563 | |||
| 564 | Version 1.12 | ||
| 565 | ------------ | ||
| 566 | Fixes for large file copy, signal handling, socket retry, buffer | ||
| 567 | allocation and low memory situations. | ||
| 568 | |||
| 569 | Version 1.11 | ||
| 570 | ------------ | ||
| 571 | Better port 139 support to Windows servers (RFC1001/RFC1002 Session_Initialize) | ||
| 572 | also now allowing support for specifying client netbiosname. NT4 support added. | ||
| 573 | |||
| 574 | Version 1.10 | ||
| 575 | ------------ | ||
| 576 | Fix reconnection (and certain failed mounts) to properly wake up the | ||
| 577 | blocked users thread so it does not seem hung (in some cases was blocked | ||
| 578 | until the cifs receive timeout expired). Fix spurious error logging | ||
| 579 | to kernel log when application with open network files killed. | ||
| 580 | |||
| 581 | Version 1.09 | ||
| 582 | ------------ | ||
| 583 | Fix /proc/fs module unload warning message (that could be logged | ||
| 584 | to the kernel log). Fix intermittent failure in connectathon | ||
| 585 | test7 (hardlink count not immediately refreshed in case in which | ||
| 586 | inode metadata can be incorrectly kept cached when time near zero) | ||
| 587 | |||
| 588 | Version 1.08 | ||
| 589 | ------------ | ||
| 590 | Allow file_mode and dir_mode (specified at mount time) to be enforced | ||
| 591 | locally (the server already enforced its own ACLs too) for servers | ||
| 592 | that do not report the correct mode (do not support the | ||
| 593 | CIFS Unix Extensions). | ||
| 594 | |||
| 595 | Version 1.07 | ||
| 596 | ------------ | ||
| 597 | Fix some small memory leaks in some unmount error paths. Fix major leak | ||
| 598 | of cache pages in readpages causing multiple read oriented stress | ||
| 599 | testcases (including fsx, and even large file copy) to fail over time. | ||
| 600 | |||
| 601 | Version 1.06 | ||
| 602 | ------------ | ||
| 603 | Send NTCreateX with ATTR_POSIX if Linux/Unix extensions negotiated with server. | ||
| 604 | This allows files that differ only in case and improves performance of file | ||
| 605 | creation and file open to such servers. Fix semaphore conflict which causes | ||
| 606 | slow delete of open file to Samba (which unfortunately can cause an oplock | ||
| 607 | break to self while vfs_unlink held i_sem) which can hang for 20 seconds. | ||
| 608 | |||
| 609 | Version 1.05 | ||
| 610 | ------------ | ||
| 611 | fixes to cifs_readpages for fsx test case | ||
| 612 | |||
| 613 | Version 1.04 | ||
| 614 | ------------ | ||
| 615 | Fix caching data integrity bug when extending file size especially when no | ||
| 616 | oplock on file. Fix spurious logging of valid already parsed mount options | ||
| 617 | that are parsed outside of the cifs vfs such as nosuid. | ||
| 618 | |||
| 619 | |||
| 620 | Version 1.03 | ||
| 621 | ------------ | ||
| 622 | Connect to server when port number override not specified, and tcp port | ||
| 623 | unitialized. Reset search to restart at correct file when kernel routine | ||
| 624 | filldir returns error during large directory searches (readdir). | ||
| 625 | |||
| 626 | Version 1.02 | ||
| 627 | ------------ | ||
| 628 | Fix caching problem when files opened by multiple clients in which | ||
| 629 | page cache could contain stale data, and write through did | ||
| 630 | not occur often enough while file was still open when read ahead | ||
| 631 | (read oplock) not allowed. Treat "sep=" when first mount option | ||
| 632 | as an override of comma as the default separator between mount | ||
| 633 | options. | ||
| 634 | |||
| 635 | Version 1.01 | ||
| 636 | ------------ | ||
| 637 | Allow passwords longer than 16 bytes. Allow null password string. | ||
| 638 | |||
| 639 | Version 1.00 | ||
| 640 | ------------ | ||
| 641 | Gracefully clean up failed mounts when attempting to mount to servers such as | ||
| 642 | Windows 98 that terminate tcp sessions during protocol negotiation. Handle | ||
| 643 | embedded commas in mount parsing of passwords. | ||
| 644 | |||
| 645 | Version 0.99 | ||
| 646 | ------------ | ||
| 647 | Invalidate local inode cached pages on oplock break and when last file | ||
| 648 | instance is closed so that the client does not continue using stale local | ||
| 649 | copy rather than later modified server copy of file. Do not reconnect | ||
| 650 | when server drops the tcp session prematurely before negotiate | ||
| 651 | protocol response. Fix oops in reopen_file when dentry freed. Allow | ||
| 652 | the support for CIFS Unix Extensions to be disabled via proc interface. | ||
| 653 | |||
| 654 | Version 0.98 | ||
| 655 | ------------ | ||
| 656 | Fix hang in commit_write during reconnection of open files under heavy load. | ||
| 657 | Fix unload_nls oops in a mount failure path. Serialize writes to same socket | ||
| 658 | which also fixes any possible races when cifs signatures are enabled in SMBs | ||
| 659 | being sent out of signature sequence number order. | ||
| 660 | |||
| 661 | Version 0.97 | ||
| 662 | ------------ | ||
| 663 | Fix byte range locking bug (endian problem) causing bad offset and | ||
| 664 | length. | ||
| 665 | |||
| 666 | Version 0.96 | ||
| 667 | ------------ | ||
| 668 | Fix oops (in send_sig) caused by CIFS unmount code trying to | ||
| 669 | wake up the demultiplex thread after it had exited. Do not log | ||
| 670 | error on harmless oplock release of closed handle. | ||
| 671 | |||
| 672 | Version 0.95 | ||
| 673 | ------------ | ||
| 674 | Fix unsafe global variable usage and password hash failure on gcc 3.3.1 | ||
| 675 | Fix problem reconnecting secondary mounts to same server after session | ||
| 676 | failure. Fix invalid dentry - race in mkdir when directory gets created | ||
| 677 | by another client between the lookup and mkdir. | ||
| 678 | |||
| 679 | Version 0.94 | ||
| 680 | ------------ | ||
| 681 | Fix to list processing in reopen_files. Fix reconnection when server hung | ||
| 682 | but tcpip session still alive. Set proper timeout on socket read. | ||
| 683 | |||
| 684 | Version 0.93 | ||
| 685 | ------------ | ||
| 686 | Add missing mount options including iocharset. SMP fixes in write and open. | ||
| 687 | Fix errors in reconnecting after TCP session failure. Fix module unloading | ||
| 688 | of default nls codepage | ||
| 689 | |||
| 690 | Version 0.92 | ||
| 691 | ------------ | ||
| 692 | Active smb transactions should never go negative (fix double FreeXid). Fix | ||
| 693 | list processing in file routines. Check return code on kmalloc in open. | ||
| 694 | Fix spinlock usage for SMP. | ||
| 695 | |||
| 696 | Version 0.91 | ||
| 697 | ------------ | ||
| 698 | Fix oops in reopen_files when invalid dentry. drop dentry on server rename | ||
| 699 | and on revalidate errors. Fix cases where pid is now tgid. Fix return code | ||
| 700 | on create hard link when server does not support them. | ||
| 701 | |||
| 702 | Version 0.90 | ||
| 703 | ------------ | ||
| 704 | Fix scheduling while atomic error in getting inode info on newly created file. | ||
| 705 | Fix truncate of existing files opened with O_CREAT but not O_TRUNC set. | ||
| 706 | |||
| 707 | Version 0.89 | ||
| 708 | ------------ | ||
| 709 | Fix oops on write to dead tcp session. Remove error log write for case when file open | ||
| 710 | O_CREAT but not O_EXCL | ||
| 711 | |||
| 712 | Version 0.88 | ||
| 713 | ------------ | ||
| 714 | Fix non-POSIX behavior on rename of open file and delete of open file by taking | ||
| 715 | advantage of trans2 SetFileInfo rename facility if available on target server. | ||
| 716 | Retry on ENOSPC and EAGAIN socket errors. | ||
| 717 | |||
| 718 | Version 0.87 | ||
| 719 | ------------ | ||
| 720 | Fix oops on big endian readdir. Set blksize to be even power of two (2**blkbits) to fix | ||
| 721 | allocation size miscalculation. After oplock token lost do not read through | ||
| 722 | cache. | ||
| 723 | |||
| 724 | Version 0.86 | ||
| 725 | ------------ | ||
| 726 | Fix oops on empty file readahead. Fix for file size handling for locally cached files. | ||
| 727 | |||
| 728 | Version 0.85 | ||
| 729 | ------------ | ||
| 730 | Fix oops in mkdir when server fails to return inode info. Fix oops in reopen_files | ||
| 731 | during auto reconnection to server after server recovered from failure. | ||
| 732 | |||
| 733 | Version 0.84 | ||
| 734 | ------------ | ||
| 735 | Finish support for Linux 2.5 open/create changes, which removes the | ||
| 736 | redundant NTCreate/QPathInfo/close that was sent during file create. | ||
| 737 | Enable oplock by default. Enable packet signing by default (needed to | ||
| 738 | access many recent Windows servers) | ||
| 739 | |||
| 740 | Version 0.83 | ||
| 741 | ------------ | ||
| 742 | Fix oops when mounting to long server names caused by inverted parms to kmalloc. | ||
| 743 | Fix MultiuserMount (/proc/fs/cifs configuration setting) so that when enabled | ||
| 744 | we will choose a cifs user session (smb uid) that better matches the local | ||
| 745 | uid if a) the mount uid does not match the current uid and b) we have another | ||
| 746 | session to the same server (ip address) for a different mount which | ||
| 747 | matches the current local uid. | ||
| 748 | |||
| 749 | Version 0.82 | ||
| 750 | ------------ | ||
| 751 | Add support for mknod of block or character devices. Fix oplock | ||
| 752 | code (distributed caching) to properly send response to oplock | ||
| 753 | break from server. | ||
| 754 | |||
| 755 | Version 0.81 | ||
| 756 | ------------ | ||
| 757 | Finish up CIFS packet digital signing for the default | ||
| 758 | NTLM security case. This should help Windows 2003 | ||
| 759 | network interoperability since it is common for | ||
| 760 | packet signing to be required now. Fix statfs (stat -f) | ||
| 761 | which recently started returning errors due to | ||
| 762 | invalid value (-1 instead of 0) being set in the | ||
| 763 | struct kstatfs f_ffiles field. | ||
| 764 | |||
| 765 | Version 0.80 | ||
| 766 | ----------- | ||
| 767 | Fix oops on stopping oplock thread when removing cifs when | ||
| 768 | built as module. | ||
| 769 | |||
| 770 | Version 0.79 | ||
| 771 | ------------ | ||
| 772 | Fix mount options for ro (readonly), uid, gid and file and directory mode. | ||
| 773 | |||
| 774 | Version 0.78 | ||
| 775 | ------------ | ||
| 776 | Fix errors displayed on failed mounts to be more understandable. | ||
| 777 | Fixed various incorrect or misleading smb to posix error code mappings. | ||
| 778 | |||
| 779 | Version 0.77 | ||
| 780 | ------------ | ||
| 781 | Fix display of NTFS DFS junctions to display as symlinks. | ||
| 782 | They are the network equivalent. Fix oops in | ||
| 783 | cifs_partialpagewrite caused by missing spinlock protection | ||
| 784 | of openfile linked list. Allow writebehind caching errors to | ||
| 785 | be returned to the application at file close. | ||
| 786 | |||
| 787 | Version 0.76 | ||
| 788 | ------------ | ||
| 789 | Clean up options displayed in /proc/mounts by show_options to | ||
| 790 | be more consistent with other filesystems. | ||
| 791 | |||
| 792 | Version 0.75 | ||
| 793 | ------------ | ||
| 794 | Fix delete of readonly file to Windows servers. Reflect | ||
| 795 | presence or absence of read only dos attribute in mode | ||
| 796 | bits for servers that do not support CIFS Unix extensions. | ||
| 797 | Fix shortened results on readdir of large directories to | ||
| 798 | servers supporting CIFS Unix extensions (caused by | ||
| 799 | incorrect resume key). | ||
| 800 | |||
| 801 | Version 0.74 | ||
| 802 | ------------ | ||
| 803 | Fix truncate bug (set file size) that could cause hangs e.g. running fsx | ||
| 804 | |||
| 805 | Version 0.73 | ||
| 806 | ------------ | ||
| 807 | unload nls if mount fails. | ||
| 808 | |||
| 809 | Version 0.72 | ||
| 810 | ------------ | ||
| 811 | Add resume key support to search (readdir) code to workaround | ||
| 812 | Windows bug. Add /proc/fs/cifs/LookupCacheEnable which | ||
| 813 | allows disabling caching of attribute information for | ||
| 814 | lookups. | ||
| 815 | |||
| 816 | Version 0.71 | ||
| 817 | ------------ | ||
| 818 | Add more oplock handling (distributed caching code). Remove | ||
| 819 | dead code. Remove excessive stack space utilization from | ||
| 820 | symlink routines. | ||
| 821 | |||
| 822 | Version 0.70 | ||
| 823 | ------------ | ||
| 824 | Fix oops in get dfs referral (triggered when null path sent in to | ||
| 825 | mount). Add support for overriding rsize at mount time. | ||
| 826 | |||
| 827 | Version 0.69 | ||
| 828 | ------------ | ||
| 829 | Fix buffer overrun in readdir which caused intermittent kernel oopses. | ||
| 830 | Fix writepage code to release kmap on write data. Allow "-ip=" new | ||
| 831 | mount option to be passed in on parameter distinct from the first part | ||
| 832 | (server name portion of) the UNC name. Allow override of the | ||
| 833 | tcp port of the target server via new mount option "-port=" | ||
| 834 | |||
| 835 | Version 0.68 | ||
| 836 | ------------ | ||
| 837 | Fix search handle leak on rewind. Fix setuid and gid so that they are | ||
| 838 | reflected in the local inode immediately. Cleanup of whitespace | ||
| 839 | to make 2.4 and 2.5 versions more consistent. | ||
| 840 | |||
| 841 | |||
| 842 | Version 0.67 | ||
| 843 | ------------ | ||
| 844 | Fix signal sending so that captive thread (cifsd) exits on umount | ||
| 845 | (which was causing the warning in kmem_cache_free of the request buffers | ||
| 846 | at rmmod time). This had broken as a sideeffect of the recent global | ||
| 847 | kernel change to daemonize. Fix memory leak in readdir code which | ||
| 848 | showed up in "ls -R" (and applications that did search rewinding). | ||
| 849 | |||
| 850 | Version 0.66 | ||
| 851 | ------------ | ||
| 852 | Reconnect tids and fids after session reconnection (still do not | ||
| 853 | reconnect byte range locks though). Fix problem caching | ||
| 854 | lookup information for directory inodes, improving performance, | ||
| 855 | especially in deep directory trees. Fix various build warnings. | ||
| 856 | |||
| 857 | Version 0.65 | ||
| 858 | ------------ | ||
| 859 | Finish fixes to commit write for caching/readahead consistency. fsx | ||
| 860 | now works to Samba servers. Fix oops caused when readahead | ||
| 861 | was interrupted by a signal. | ||
| 862 | |||
| 863 | Version 0.64 | ||
| 864 | ------------ | ||
| 865 | Fix data corruption (in partial page after truncate) that caused fsx to | ||
| 866 | fail to Windows servers. Cleaned up some extraneous error logging in | ||
| 867 | common error paths. Add generic sendfile support. | ||
| 868 | |||
| 869 | Version 0.63 | ||
| 870 | ------------ | ||
| 871 | Fix memory leak in AllocMidQEntry. | ||
| 872 | Finish reconnection logic, so connection with server can be dropped | ||
| 873 | (or server rebooted) and the cifs client will reconnect. | ||
| 874 | |||
| 875 | Version 0.62 | ||
| 876 | ------------ | ||
| 877 | Fix temporary socket leak when bad userid or password specified | ||
| 878 | (or other SMBSessSetup failure). Increase maximum buffer size to slightly | ||
| 879 | over 16K to allow negotiation of up to Samba and Windows server default read | ||
| 880 | sizes. Add support for readpages | ||
| 881 | |||
| 882 | Version 0.61 | ||
| 883 | ------------ | ||
| 884 | Fix oops when username not passed in on mount. Extensive fixes and improvements | ||
| 885 | to error logging (strip redundant newlines, change debug macros to ensure newline | ||
| 886 | passed in and to be more consistent). Fix writepage wrong file handle problem, | ||
| 887 | a readonly file handle could be incorrectly used to attempt to write out | ||
| 888 | file updates through the page cache to multiply open files. This could cause | ||
| 889 | the iozone benchmark to fail on the fwrite test. Fix bug mounting two different | ||
| 890 | shares to the same Windows server when using different usernames | ||
| 891 | (doing this to Samba servers worked but Windows was rejecting it) - now it is | ||
| 892 | possible to use different userids when connecting to the same server from a | ||
| 893 | Linux client. Fix oops when treeDisconnect called during unmount on | ||
| 894 | previously freed socket. | ||
| 895 | |||
| 896 | Version 0.60 | ||
| 897 | ------------ | ||
| 898 | Fix oops in readpages caused by not setting address space operations in inode in | ||
| 899 | rare code path. | ||
| 900 | |||
| 901 | Version 0.59 | ||
| 902 | ------------ | ||
| 903 | Includes support for deleting of open files and renaming over existing files (per POSIX | ||
| 904 | requirement). Add readlink support for Windows junction points (directory symlinks). | ||
| 905 | |||
| 906 | Version 0.58 | ||
| 907 | ------------ | ||
| 908 | Changed read and write to go through pagecache. Added additional address space operations. | ||
| 909 | Memory mapped operations now working. | ||
| 910 | |||
| 911 | Version 0.57 | ||
| 912 | ------------ | ||
| 913 | Added writepage code for additional memory mapping support. Fixed leak in xids causing | ||
| 914 | the simultaneous operations counter (/proc/fs/cifs/SimultaneousOps) to increase on | ||
| 915 | every stat call. Additional formatting cleanup. | ||
| 916 | |||
| 917 | Version 0.56 | ||
| 918 | ------------ | ||
| 919 | Fix bigendian bug in order of time conversion. Merge 2.5 to 2.4 version. Formatting cleanup. | ||
| 920 | |||
| 921 | Version 0.55 | ||
| 922 | ------------ | ||
| 923 | Fixes from Zwane Mwaikambo for adding missing return code checking in a few places. | ||
| 924 | Also included a modified version of his fix to protect global list manipulation of | ||
| 925 | the smb session and tree connection and mid related global variables. | ||
| 926 | |||
| 927 | Version 0.54 | ||
| 928 | ------------ | ||
| 929 | Fix problem with captive thread hanging around at unmount time. Adjust to 2.5.42-pre | ||
| 930 | changes to superblock layout. Remove wasteful allocation of smb buffers (now the send | ||
| 931 | buffer is reused for responses). Add more oplock handling. Additional minor cleanup. | ||
| 932 | |||
| 933 | Version 0.53 | ||
| 934 | ------------ | ||
| 935 | More stylistic updates to better match kernel style. Add additional statistics | ||
| 936 | for filesystem which can be viewed via /proc/fs/cifs. Add more pieces of NTLMv2 | ||
| 937 | and CIFS Packet Signing enablement. | ||
| 938 | |||
| 939 | Version 0.52 | ||
| 940 | ------------ | ||
| 941 | Replace call to sleep_on with safer wait_on_event. | ||
| 942 | Make stylistic changes to better match kernel style recommendations. | ||
| 943 | Remove most typedef usage (except for the PDUs themselves). | ||
| 944 | |||
| 945 | Version 0.51 | ||
| 946 | ------------ | ||
| 947 | Update mount so the -unc mount option is no longer required (the ip address can be specified | ||
| 948 | in a UNC style device name. Implementation of readpage/writepage started. | ||
| 949 | |||
| 950 | Version 0.50 | ||
| 951 | ------------ | ||
| 952 | Fix intermittent problem with incorrect smb header checking on badly | ||
| 953 | fragmented tcp responses | ||
| 954 | |||
| 955 | Version 0.49 | ||
| 956 | ------------ | ||
| 957 | Fixes to setting of allocation size and file size. | ||
| 958 | |||
| 959 | Version 0.48 | ||
| 960 | ------------ | ||
| 961 | Various 2.5.38 fixes. Now works on 2.5.38 | ||
| 962 | |||
| 963 | Version 0.47 | ||
| 964 | ------------ | ||
| 965 | Prepare for 2.5 kernel merge. Remove ifdefs. | ||
| 966 | |||
| 967 | Version 0.46 | ||
| 968 | ------------ | ||
| 969 | Socket buffer management fixes. Fix dual free. | ||
| 970 | |||
| 971 | Version 0.45 | ||
| 972 | ------------ | ||
| 973 | Various big endian fixes for hardlinks and symlinks and also for dfs. | ||
| 974 | |||
| 975 | Version 0.44 | ||
| 976 | ------------ | ||
| 977 | Various big endian fixes for servers with Unix extensions such as Samba | ||
| 978 | |||
| 979 | Version 0.43 | ||
| 980 | ------------ | ||
| 981 | Various FindNext fixes for incorrect filenames on large directory searches on big endian | ||
| 982 | clients. basic posix file i/o tests now work on big endian machines, not just le | ||
| 983 | |||
| 984 | Version 0.42 | ||
| 985 | ------------ | ||
| 986 | SessionSetup and NegotiateProtocol now work from Big Endian machines. | ||
| 987 | Various Big Endian fixes found during testing on the Linux on 390. Various fixes for compatibility with older | ||
| 988 | versions of 2.4 kernel (now builds and works again on kernels at least as early as 2.4.7). | ||
| 989 | |||
| 990 | Version 0.41 | ||
| 991 | ------------ | ||
| 992 | Various minor fixes for Connectathon Posix "basic" file i/o test suite. Directory caching fixed so hardlinked | ||
| 993 | files now return the correct number of links on fstat as they are repeatedly linked and unlinked. | ||
| 994 | |||
| 995 | Version 0.40 | ||
| 996 | ------------ | ||
| 997 | Implemented "Raw" (i.e. not encapsulated in SPNEGO) NTLMSSP (i.e. the Security Provider Interface used to negotiate | ||
| 998 | session advanced session authentication). Raw NTLMSSP is preferred by Windows 2000 Professional and Windows XP. | ||
| 999 | Began implementing support for SPNEGO encapsulation of NTLMSSP based session authentication blobs | ||
| 1000 | (which is the mechanism preferred by Windows 2000 server in the absence of Kerberos). | ||
| 1001 | |||
| 1002 | Version 0.38 | ||
| 1003 | ------------ | ||
| 1004 | Introduced optional mount helper utility mount.cifs and made coreq changes to cifs vfs to enable | ||
| 1005 | it. Fixed a few bugs in the DFS code (e.g. bcc two bytes too short and incorrect uid in PDU). | ||
| 1006 | |||
| 1007 | Version 0.37 | ||
| 1008 | ------------ | ||
| 1009 | Rewrote much of connection and mount/unmount logic to handle bugs with | ||
| 1010 | multiple uses to same share, multiple users to same server etc. | ||
| 1011 | |||
| 1012 | Version 0.36 | ||
| 1013 | ------------ | ||
| 1014 | Fixed major problem with dentry corruption (missing call to dput) | ||
| 1015 | |||
| 1016 | Version 0.35 | ||
| 1017 | ------------ | ||
| 1018 | Rewrite of readdir code to fix bug. Various fixes for bigendian machines. | ||
| 1019 | Begin adding oplock support. Multiusermount and oplockEnabled flags added to /proc/fs/cifs | ||
| 1020 | although corresponding function not fully implemented in the vfs yet | ||
| 1021 | |||
| 1022 | Version 0.34 | ||
| 1023 | ------------ | ||
| 1024 | Fixed dentry caching bug, misc. cleanup | ||
| 1025 | |||
| 1026 | Version 0.33 | ||
| 1027 | ------------ | ||
| 1028 | Fixed 2.5 support to handle build and configure changes as well as misc. 2.5 changes. Now can build | ||
| 1029 | on current 2.5 beta version (2.5.24) of the Linux kernel as well as on 2.4 Linux kernels. | ||
| 1030 | Support for STATUS codes (newer 32 bit NT error codes) added. DFS support begun to be added. | ||
| 1031 | |||
| 1032 | Version 0.32 | ||
| 1033 | ------------ | ||
| 1034 | Unix extensions (symlink, readlink, hardlink, chmod and some chgrp and chown) implemented | ||
| 1035 | and tested against Samba 2.2.5 | ||
| 1036 | |||
| 1037 | |||
| 1038 | Version 0.31 | ||
| 1039 | ------------ | ||
| 1040 | 1) Fixed lockrange to be correct (it was one byte too short) | ||
| 1041 | |||
| 1042 | 2) Fixed GETLK (i.e. the fcntl call to test a range of bytes in a file to see if locked) to correctly | ||
| 1043 | show range as locked when there is a conflict with an existing lock. | ||
| 1044 | |||
| 1045 | 3) default file perms are now 2767 (indicating support for mandatory locks) instead of 777 for directories | ||
| 1046 | in most cases. Eventually will offer optional ability to query server for the correct perms. | ||
| 1047 | |||
| 1048 | 3) Fixed eventual trap when mounting twice to different shares on the same server when the first succeeded | ||
| 1049 | but the second one was invalid and failed (the second one was incorrectly disconnecting the tcp and smb | ||
| 1050 | session) | ||
| 1051 | |||
| 1052 | 4) Fixed error logging of valid mount options | ||
| 1053 | |||
| 1054 | 5) Removed logging of password field. | ||
| 1055 | |||
| 1056 | 6) Moved negotiate, treeDisconnect and uloggoffX (only tConx and SessSetup remain in connect.c) to cifssmb.c | ||
| 1057 | and cleaned them up and made them more consistent with other cifs functions. | ||
| 1058 | |||
| 1059 | 7) Server support for Unix extensions is now fully detected and FindFirst is implemented both ways | ||
| 1060 | (with or without Unix extensions) but FindNext and QueryPathInfo with the Unix extensions are not completed, | ||
| 1061 | nor is the symlink support using the Unix extensions | ||
| 1062 | |||
| 1063 | 8) Started adding the readlink and follow_link code | ||
| 1064 | |||
| 1065 | Version 0.3 | ||
| 1066 | ----------- | ||
| 1067 | Initial drop | ||
| 1068 | |||
| @@ -603,8 +603,7 @@ DebugData Displays information about active CIFS sessions and · 602 unmodified lines | |||
| 603 | shares, features enabled as well as the cifs.ko | 603 | shares, features enabled as well as the cifs.ko |
| 604 | version. | 604 | version. |
| 605 | Stats Lists summary resource usage information as well as per | 605 | Stats Lists summary resource usage information as well as per |
| 606 | share statistics, if CONFIG_CIFS_STATS in enabled | 606 | share statistics. |
| 607 | in the kernel configuration. | ||
| 608 | 607 | ||
| 609 | Configuration pseudo-files: | 608 | Configuration pseudo-files: |
| 610 | SecurityFlags Flags which control security negotiation and | 609 | SecurityFlags Flags which control security negotiation and |
| @@ -687,23 +686,22 @@ cifsFYI functions as a bit mask. Setting it to 1 enables additional kernel · 76 unmodified lines | |||
| 687 | logging of various informational messages. 2 enables logging of non-zero | 686 | logging of various informational messages. 2 enables logging of non-zero |
| 688 | SMB return codes while 4 enables logging of requests that take longer | 687 | SMB return codes while 4 enables logging of requests that take longer |
| 689 | than one second to complete (except for byte range lock requests). | 688 | than one second to complete (except for byte range lock requests). |
| 690 | Setting it to 4 requires defining CONFIG_CIFS_STATS2 manually in the | 689 | Setting it to 4 requires CONFIG_CIFS_STATS2 to be set in kernel configuration |
| 691 | source code (typically by setting it in the beginning of cifsglob.h), | 690 | (.config). Setting it to seven enables all three. Finally, tracing |
| 692 | and setting it to seven enables all three. Finally, tracing | ||
| 693 | the start of smb requests and responses can be enabled via: | 691 | the start of smb requests and responses can be enabled via: |
| 694 | 692 | ||
| 695 | echo 1 > /proc/fs/cifs/traceSMB | 693 | echo 1 > /proc/fs/cifs/traceSMB |
| 696 | 694 | ||
| 697 | Per share (per client mount) statistics are available in /proc/fs/cifs/Stats | 695 | Per share (per client mount) statistics are available in /proc/fs/cifs/Stats. |
| 698 | if the kernel was configured with cifs statistics enabled. The statistics | 696 | Additional information is available if CONFIG_CIFS_STATS2 is enabled in the |
| 699 | represent the number of successful (ie non-zero return code from the server) | 697 | kernel configuration (.config). The statistics returned include counters which |
| 700 | SMB responses to some of the more common commands (open, delete, mkdir etc.). | 698 | represent the number of attempted and failed (ie non-zero return code from the |
| 699 | server) SMB3 (or cifs) requests grouped by request type (read, write, close etc.). | ||
| 701 | Also recorded is the total bytes read and bytes written to the server for | 700 | Also recorded is the total bytes read and bytes written to the server for |
| 702 | that share. Note that due to client caching effects this can be less than the | 701 | that share. Note that due to client caching effects this can be less than the |
| 703 | number of bytes read and written by the application running on the client. | 702 | number of bytes read and written by the application running on the client. |
| 704 | The statistics for the number of total SMBs and oplock breaks are different in | 703 | Statistics can be reset to zero by "echo 0 > /proc/fs/cifs/Stats" which may be |
| 705 | that they represent all for that share, not just those for which the server | 704 | useful if comparing performance of two different scenarios. |
| 706 | returned success. | ||
| 707 | 705 | ||
| 708 | Also note that "cat /proc/fs/cifs/DebugData" will display information about | 706 | Also note that "cat /proc/fs/cifs/DebugData" will display information about |
| 709 | the active sessions and the shares that are mounted. | 707 | the active sessions and the shares that are mounted. |
| @@ -1,6 +1,8 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 1 | 2 | ||
| 2 | Ext4 Filesystem | 3 | ======================== |
| 3 | =============== | 4 | General Information |
| 5 | ======================== | ||
| 4 | 6 | ||
| 5 | Ext4 is an advanced level of the ext3 filesystem which incorporates | 7 | Ext4 is an advanced level of the ext3 filesystem which incorporates |
| 6 | scalability and reliability enhancements for supporting large filesystems | 8 | scalability and reliability enhancements for supporting large filesystems |
| @@ -11,37 +13,30 @@ Mailing list: linux-ext4@vger.kernel.org · 4 unmodified lines | |||
| 11 | Web site: http://ext4.wiki.kernel.org | 13 | Web site: http://ext4.wiki.kernel.org |
| 12 | 14 | ||
| 13 | 15 | ||
| 14 | 1. Quick usage instructions: | 16 | Quick usage instructions |
| 15 | =========================== | 17 | ======================== |
| 16 | 18 | ||
| 17 | Note: More extensive information for getting started with ext4 can be | 19 | Note: More extensive information for getting started with ext4 can be |
| 18 | found at the ext4 wiki site at the URL: | 20 | found at the ext4 wiki site at the URL: |
| 19 | http://ext4.wiki.kernel.org/index.php/Ext4_Howto | 21 | http://ext4.wiki.kernel.org/index.php/Ext4_Howto |
| 20 | 22 | ||
| 21 | - Compile and install the latest version of e2fsprogs (as of this | 23 | - The latest version of e2fsprogs can be found at: |
| 22 | writing version 1.41.3) from: | 24 | |
| 25 | https://www.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs/ | ||
| 23 | 26 | ||
| 24 | http://sourceforge.net/project/showfiles.php?group_id=2406 | ||
| 25 | |||
| 26 | or | 27 | or |
| 27 | 28 | ||
| 28 | https://www.kernel.org/pub/linux/kernel/people/tytso/e2fsprogs/ | 29 | http://sourceforge.net/project/showfiles.php?group_id=2406 |
| 29 | 30 | ||
| 30 | or grab the latest git repository from: | 31 | or grab the latest git repository from: |
| 31 | 32 | ||
| 32 | git://git.kernel.org/pub/scm/fs/ext2/e2fsprogs.git | 33 | https://git.kernel.org/pub/scm/fs/ext2/e2fsprogs.git |
| 33 | |||
| 34 | - Note that it is highly important to install the mke2fs.conf file | ||
| 35 | that comes with the e2fsprogs 1.41.x sources in /etc/mke2fs.conf. If | ||
| 36 | you have edited the /etc/mke2fs.conf file installed on your system, | ||
| 37 | you will need to merge your changes with the version from e2fsprogs | ||
| 38 | 1.41.x. | ||
| 39 | 34 | ||
| 40 | - Create a new filesystem using the ext4 filesystem type: | 35 | - Create a new filesystem using the ext4 filesystem type: |
| 41 | 36 | ||
| 42 | # mke2fs -t ext4 /dev/hda1 | 37 | # mke2fs -t ext4 /dev/hda1 |
| 43 | 38 | ||
| 44 | Or to configure an existing ext3 filesystem to support extents: | 39 | Or to configure an existing ext3 filesystem to support extents: |
| 45 | 40 | ||
| 46 | # tune2fs -O extents /dev/hda1 | 41 | # tune2fs -O extents /dev/hda1 |
| 47 | 42 | ||
| @@ -50,10 +45,6 @@ Note: More extensive information for getting started with ext4 can be · 2 unmodified lines | |||
| 50 | 45 | ||
| 51 | # tune2fs -I 256 /dev/hda1 | 46 | # tune2fs -I 256 /dev/hda1 |
| 52 | 47 | ||
| 53 | (Note: we currently do not have tools to convert an ext4 | ||
| 54 | filesystem back to ext3; so please do not do try this on production | ||
| 55 | filesystems.) | ||
| 56 | |||
| 57 | - Mounting: | 48 | - Mounting: |
| 58 | 49 | ||
| 59 | # mount -t ext4 /dev/hda1 /wherever | 50 | # mount -t ext4 /dev/hda1 /wherever |
| @@ -75,10 +66,11 @@ Note: More extensive information for getting started with ext4 can be · 15 unmodified lines | |||
| 75 | the filesystem with a large journal can also be helpful for | 66 | the filesystem with a large journal can also be helpful for |
| 76 | metadata-intensive workloads. | 67 | metadata-intensive workloads. |
| 77 | 68 | ||
| 78 | 2. Features | 69 | Features |
| 79 | =========== | 70 | ======== |
| 80 | 71 | ||
| 81 | 2.1 Currently available | 72 | Currently Available |
| 73 | ------------------- | ||
| 82 | 74 | ||
| 83 | * ability to use filesystems > 16TB (e2fsprogs support not available yet) | 75 | * ability to use filesystems > 16TB (e2fsprogs support not available yet) |
| 84 | * extent format reduces metadata overhead (RAM, IO for access, transactions) | 76 | * extent format reduces metadata overhead (RAM, IO for access, transactions) |
| @@ -103,31 +95,15 @@ Note: More extensive information for getting started with ext4 can be · 18 unmodified lines | |||
| 103 | [1] Filesystems with a block size of 1k may see a limit imposed by the | 95 | [1] Filesystems with a block size of 1k may see a limit imposed by the |
| 104 | directory hash tree having a maximum depth of two. | 96 | directory hash tree having a maximum depth of two. |
| 105 | 97 | ||
| 106 | 2.2 Candidate features for future inclusion | 98 | Options |
| 107 | 99 | ======= | |
| 108 | * online defrag (patches available but not well tested) | ||
| 109 | * reduced mke2fs time via lazy itable initialization in conjunction with | ||
| 110 | the uninit_bg feature (capability to do this is available in e2fsprogs | ||
| 111 | but a kernel thread to do lazy zeroing of unused inode table blocks | ||
| 112 | after filesystem is first mounted is required for safety) | ||
| 113 | |||
| 114 | There are several others under discussion, whether they all make it in is | ||
| 115 | partly a function of how much time everyone has to work on them. Features like | ||
| 116 | metadata checksumming have been discussed and planned for a bit but no patches | ||
| 117 | exist yet so I'm not sure they're in the near-term roadmap. | ||
| 118 | |||
| 119 | The big performance win will come with mballoc, delalloc and flex_bg | ||
| 120 | grouping of bitmaps and inode tables. Some test results available here: | ||
| 121 | |||
| 122 | - http://www.bullopensource.org/ext4/20080818-ffsb/ffsb-write-2.6.27-rc1.html | ||
| 123 | - http://www.bullopensource.org/ext4/20080818-ffsb/ffsb-readwrite-2.6.27-rc1.html | ||
| 124 | |||
| 125 | 3. Options | ||
| 126 | ========== | ||
| 127 | 100 | ||
| 128 | When mounting an ext4 filesystem, the following option are accepted: | 101 | When mounting an ext4 filesystem, the following option are accepted: |
| 129 | (*) == default | 102 | (*) == default |
| 130 | 103 | ||
| 104 | ======================= ======================================================= | ||
| 105 | Mount Option Description | ||
| 106 | ======================= ======================================================= | ||
| 131 | ro Mount filesystem read only. Note that ext4 will | 107 | ro Mount filesystem read only. Note that ext4 will |
| 132 | replay the journal (and thus write to the | 108 | replay the journal (and thus write to the |
| 133 | partition) even when mounted "read only". The | 109 | partition) even when mounted "read only". The |
| @@ -387,33 +363,38 @@ i_version Enable 64-bit inode version support. This option is · 253 unmodified lines | |||
| 387 | dax Use direct access (no page cache). See | 363 | dax Use direct access (no page cache). See |
| 388 | Documentation/filesystems/dax.txt. Note that | 364 | Documentation/filesystems/dax.txt. Note that |
| 389 | this option is incompatible with data=journal. | 365 | this option is incompatible with data=journal. |
| 366 | ======================= ======================================================= | ||
| 390 | 367 | ||
| 391 | Data Mode | 368 | Data Mode |
| 392 | ========= | 369 | ========= |
| 393 | There are 3 different data modes: | 370 | There are 3 different data modes: |
| 394 | 371 | ||
| 395 | * writeback mode | 372 | * writeback mode |
| 396 | In data=writeback mode, ext4 does not journal data at all. This mode provides | 373 | |
| 397 | a similar level of journaling as that of XFS, JFS, and ReiserFS in its default | 374 | In data=writeback mode, ext4 does not journal data at all. This mode provides |
| 398 | mode - metadata journaling. A crash+recovery can cause incorrect data to | 375 | a similar level of journaling as that of XFS, JFS, and ReiserFS in its default |
| 399 | appear in files which were written shortly before the crash. This mode will | 376 | mode - metadata journaling. A crash+recovery can cause incorrect data to |
| 400 | typically provide the best ext4 performance. | 377 | appear in files which were written shortly before the crash. This mode will |
| 378 | typically provide the best ext4 performance. | ||
| 401 | 379 | ||
| 402 | * ordered mode | 380 | * ordered mode |
| 403 | In data=ordered mode, ext4 only officially journals metadata, but it logically | 381 | |
| 404 | groups metadata information related to data changes with the data blocks into a | 382 | In data=ordered mode, ext4 only officially journals metadata, but it logically |
| 405 | single unit called a transaction. When it's time to write the new metadata | 383 | groups metadata information related to data changes with the data blocks into |
| 406 | out to disk, the associated data blocks are written first. In general, | 384 | a single unit called a transaction. When it's time to write the new metadata |
| 407 | this mode performs slightly slower than writeback but significantly faster than journal mode. | 385 | out to disk, the associated data blocks are written first. In general, this |
| 386 | mode performs slightly slower than writeback but significantly faster than | ||
| 387 | journal mode. | ||
| 408 | 388 | ||
| 409 | * journal mode | 389 | * journal mode |
| 410 | data=journal mode provides full data and metadata journaling. All new data is | 390 | |
| 411 | written to the journal first, and then to its final location. | 391 | data=journal mode provides full data and metadata journaling. All new data is |
| 412 | In the event of a crash, the journal can be replayed, bringing both data and | 392 | written to the journal first, and then to its final location. In the event of |
| 413 | metadata into a consistent state. This mode is the slowest except when data | 393 | a crash, the journal can be replayed, bringing both data and metadata into a |
| 414 | needs to be read from and written to disk at the same time where it | 394 | consistent state. This mode is the slowest except when data needs to be read |
| 415 | outperforms all others modes. Enabling this mode will disable delayed | 395 | from and written to disk at the same time where it outperforms all others |
| 416 | allocation and O_DIRECT support. | 396 | modes. Enabling this mode will disable delayed allocation and O_DIRECT |
| 397 | support. | ||
| 417 | 398 | ||
| 418 | /proc entries | 399 | /proc entries |
| 419 | ============= | 400 | ============= |
| @@ -425,10 +406,12 @@ Information about mounted ext4 file systems can be found in · 5 unmodified lines | |||
| 425 | in table below. | 406 | in table below. |
| 426 | 407 | ||
| 427 | Files in /proc/fs/ext4/<devname> | 408 | Files in /proc/fs/ext4/<devname> |
| 428 | .............................................................................. | 409 | |
| 410 | ================ ======= | ||
| 429 | File Content | 411 | File Content |
| 412 | ================ ======= | ||
| 430 | mb_groups details of multiblock allocator buddy cache of free blocks | 413 | mb_groups details of multiblock allocator buddy cache of free blocks |
| 431 | .............................................................................. | 414 | ================ ======= |
| 432 | 415 | ||
| 433 | /sys entries | 416 | /sys entries |
| 434 | ============ | 417 | ============ |
| @@ -439,28 +422,30 @@ Information about mounted ext4 file systems can be found in · 4 unmodified lines | |||
| 439 | /sys/fs/ext4/dm-0). The files in each per-device directory are shown | 422 | /sys/fs/ext4/dm-0). The files in each per-device directory are shown |
| 440 | in table below. | 423 | in table below. |
| 441 | 424 | ||
| 442 | Files in /sys/fs/ext4/<devname> | 425 | Files in /sys/fs/ext4/<devname>: |
| 426 | |||
| 443 | (see also Documentation/ABI/testing/sysfs-fs-ext4) | 427 | (see also Documentation/ABI/testing/sysfs-fs-ext4) |
| 444 | .............................................................................. | ||
| 445 | File Content | ||
| 446 | 428 | ||
| 429 | ============================= ================================================= | ||
| 430 | File Content | ||
| 431 | ============================= ================================================= | ||
| 447 | delayed_allocation_blocks This file is read-only and shows the number of | 432 | delayed_allocation_blocks This file is read-only and shows the number of |
| 448 | blocks that are dirty in the page cache, but | 433 | blocks that are dirty in the page cache, but |
| 449 | which do not have their location in the | 434 | which do not have their location in the |
| 450 | filesystem allocated yet. | 435 | filesystem allocated yet. |
| 451 | 436 | ||
| 452 | inode_goal Tuning parameter which (if non-zero) controls | 437 | inode_goal Tuning parameter which (if non-zero) controls |
| 453 | the goal inode used by the inode allocator in | 438 | the goal inode used by the inode allocator in |
| 454 | preference to all other allocation heuristics. | 439 | preference to all other allocation heuristics. |
| 455 | This is intended for debugging use only, and | 440 | This is intended for debugging use only, and |
| 456 | should be 0 on production systems. | 441 | should be 0 on production systems. |
| 457 | 442 | ||
| 458 | inode_readahead_blks Tuning parameter which controls the maximum | 443 | inode_readahead_blks Tuning parameter which controls the maximum |
| 459 | number of inode table blocks that ext4's inode | 444 | number of inode table blocks that ext4's inode |
| 460 | table readahead algorithm will pre-read into | 445 | table readahead algorithm will pre-read into |
| 461 | the buffer cache | 446 | the buffer cache |
| 462 | 447 | ||
| 463 | lifetime_write_kbytes This file is read-only and shows the number of | 448 | lifetime_write_kbytes This file is read-only and shows the number of |
| 464 | kilobytes of data that have been written to this | 449 | kilobytes of data that have been written to this |
| 465 | filesystem since it was created. | 450 | filesystem since it was created. |
| 466 | 451 | ||
| @@ -508,7 +493,7 @@ Files in /sys/fs/ext4/<devname> · 41 unmodified lines | |||
| 508 | in the file system. If there is not enough space | 493 | in the file system. If there is not enough space |
| 509 | for the reserved space when mounting the file | 494 | for the reserved space when mounting the file |
| 510 | mount will _not_ fail. | 495 | mount will _not_ fail. |
| 511 | .............................................................................. | 496 | ============================= ================================================= |
| 512 | 497 | ||
| 513 | Ioctls | 498 | Ioctls |
| 514 | ====== | 499 | ====== |
| @@ -518,8 +503,10 @@ through the system call interfaces. The list of all Ext4 specific ioctls are · 3 unmodified lines | |||
| 518 | shown in the table below. | 503 | shown in the table below. |
| 519 | 504 | ||
| 520 | Table of Ext4 specific ioctls | 505 | Table of Ext4 specific ioctls |
| 521 | .............................................................................. | 506 | |
| 522 | Ioctl Description | 507 | ============================= ================================================= |
| 508 | Ioctl Description | ||
| 509 | ============================= ================================================= | ||
| 523 | EXT4_IOC_GETFLAGS Get additional attributes associated with inode. | 510 | EXT4_IOC_GETFLAGS Get additional attributes associated with inode. |
| 524 | The ioctl argument is an integer bitfield, with | 511 | The ioctl argument is an integer bitfield, with |
| 525 | bit values described in ext4.h. This ioctl is an | 512 | bit values described in ext4.h. This ioctl is an |
| @@ -610,8 +597,7 @@ Table of Ext4 specific ioctls · 84 unmodified lines | |||
| 610 | normal user by accident. | 597 | normal user by accident. |
| 611 | The data blocks of the previous boot loader | 598 | The data blocks of the previous boot loader |
| 612 | will be associated with the given inode. | 599 | will be associated with the given inode. |
| 613 | 600 | ============================= ================================================= | |
| 614 | .............................................................................. | ||
| 615 | 601 | ||
| 616 | References | 602 | References |
| 617 | ========== | 603 | ========== |
| @@ -0,0 +1,17 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | =============== | ||
| 4 | ext4 Filesystem | ||
| 5 | =============== | ||
| 6 | |||
| 7 | General usage and on-disk artifacts writen by ext4. More documentation may | ||
| 8 | be ported from the wiki as time permits. This should be considered the | ||
| 9 | canonical source of information as the details here have been reviewed by | ||
| 10 | the ext4 community. | ||
| 11 | |||
| 12 | .. toctree:: | ||
| 13 | :maxdepth: 5 | ||
| 14 | :numbered: | ||
| 15 | |||
| 16 | ext4 | ||
| 17 | ondisk/index | ||
| @@ -0,0 +1,44 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | About this Book | ||
| 4 | =============== | ||
| 5 | |||
| 6 | This document attempts to describe the on-disk format for ext4 | ||
| 7 | filesystems. The same general ideas should apply to ext2/3 filesystems | ||
| 8 | as well, though they do not support all the features that ext4 supports, | ||
| 9 | and the fields will be shorter. | ||
| 10 | |||
| 11 | **NOTE**: This is a work in progress, based on notes that the author | ||
| 12 | (djwong) made while picking apart a filesystem by hand. The data | ||
| 13 | structure definitions should be current as of Linux 4.18 and | ||
| 14 | e2fsprogs-1.44. All comments and corrections are welcome, since there is | ||
| 15 | undoubtedly plenty of lore that might not be reflected in freshly | ||
| 16 | created demonstration filesystems. | ||
| 17 | |||
| 18 | License | ||
| 19 | ------- | ||
| 20 | This book is licensed under the terms of the GNU Public License, v2. | ||
| 21 | |||
| 22 | Terminology | ||
| 23 | ----------- | ||
| 24 | |||
| 25 | ext4 divides a storage device into an array of logical blocks both to | ||
| 26 | reduce bookkeeping overhead and to increase throughput by forcing larger | ||
| 27 | transfer sizes. Generally, the block size will be 4KiB (the same size as | ||
| 28 | pages on x86 and the block layer's default block size), though the | ||
| 29 | actual size is calculated as 2 ^ (10 + ``sb.s_log_block_size``) bytes. | ||
| 30 | Throughout this document, disk locations are given in terms of these | ||
| 31 | logical blocks, not raw LBAs, and not 1024-byte blocks. For the sake of | ||
| 32 | convenience, the logical block size will be referred to as | ||
| 33 | ``$block_size`` throughout the rest of the document. | ||
| 34 | |||
| 35 | When referenced in ``preformatted text`` blocks, ``sb`` refers to fields | ||
| 36 | in the super block, and ``inode`` refers to fields in an inode table | ||
| 37 | entry. | ||
| 38 | |||
| 39 | Other References | ||
| 40 | ---------------- | ||
| 41 | |||
| 42 | Also see http://www.nongnu.org/ext2-doc/ for quite a collection of | ||
| 43 | information about ext2/3. Here's another old reference: | ||
| 44 | http://wiki.osdev.org/Ext2 | ||
| @@ -0,0 +1,56 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Block and Inode Allocation Policy | ||
| 4 | --------------------------------- | ||
| 5 | |||
| 6 | ext4 recognizes (better than ext3, anyway) that data locality is | ||
| 7 | generally a desirably quality of a filesystem. On a spinning disk, | ||
| 8 | keeping related blocks near each other reduces the amount of movement | ||
| 9 | that the head actuator and disk must perform to access a data block, | ||
| 10 | thus speeding up disk IO. On an SSD there of course are no moving parts, | ||
| 11 | but locality can increase the size of each transfer request while | ||
| 12 | reducing the total number of requests. This locality may also have the | ||
| 13 | effect of concentrating writes on a single erase block, which can speed | ||
| 14 | up file rewrites significantly. Therefore, it is useful to reduce | ||
| 15 | fragmentation whenever possible. | ||
| 16 | |||
| 17 | The first tool that ext4 uses to combat fragmentation is the multi-block | ||
| 18 | allocator. When a file is first created, the block allocator | ||
| 19 | speculatively allocates 8KiB of disk space to the file on the assumption | ||
| 20 | that the space will get written soon. When the file is closed, the | ||
| 21 | unused speculative allocations are of course freed, but if the | ||
| 22 | speculation is correct (typically the case for full writes of small | ||
| 23 | files) then the file data gets written out in a single multi-block | ||
| 24 | extent. A second related trick that ext4 uses is delayed allocation. | ||
| 25 | Under this scheme, when a file needs more blocks to absorb file writes, | ||
| 26 | the filesystem defers deciding the exact placement on the disk until all | ||
| 27 | the dirty buffers are being written out to disk. By not committing to a | ||
| 28 | particular placement until it's absolutely necessary (the commit timeout | ||
| 29 | is hit, or sync() is called, or the kernel runs out of memory), the hope | ||
| 30 | is that the filesystem can make better location decisions. | ||
| 31 | |||
| 32 | The third trick that ext4 (and ext3) uses is that it tries to keep a | ||
| 33 | file's data blocks in the same block group as its inode. This cuts down | ||
| 34 | on the seek penalty when the filesystem first has to read a file's inode | ||
| 35 | to learn where the file's data blocks live and then seek over to the | ||
| 36 | file's data blocks to begin I/O operations. | ||
| 37 | |||
| 38 | The fourth trick is that all the inodes in a directory are placed in the | ||
| 39 | same block group as the directory, when feasible. The working assumption | ||
| 40 | here is that all the files in a directory might be related, therefore it | ||
| 41 | is useful to try to keep them all together. | ||
| 42 | |||
| 43 | The fifth trick is that the disk volume is cut up into 128MB block | ||
| 44 | groups; these mini-containers are used as outlined above to try to | ||
| 45 | maintain data locality. However, there is a deliberate quirk -- when a | ||
| 46 | directory is created in the root directory, the inode allocator scans | ||
| 47 | the block groups and puts that directory into the least heavily loaded | ||
| 48 | block group that it can find. This encourages directories to spread out | ||
| 49 | over a disk; as the top-level directory/file blobs fill up one block | ||
| 50 | group, the allocators simply move on to the next block group. Allegedly | ||
| 51 | this scheme evens out the loading on the block groups, though the author | ||
| 52 | suspects that the directories which are so unlucky as to land towards | ||
| 53 | the end of a spinning drive get a raw deal performance-wise. | ||
| 54 | |||
| 55 | Of course if all of these mechanisms fail, one can always use e4defrag | ||
| 56 | to defragment files. | ||
| @@ -0,0 +1,191 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Extended Attributes | ||
| 4 | ------------------- | ||
| 5 | |||
| 6 | Extended attributes (xattrs) are typically stored in a separate data | ||
| 7 | block on the disk and referenced from inodes via ``inode.i_file_acl*``. | ||
| 8 | The first use of extended attributes seems to have been for storing file | ||
| 9 | ACLs and other security data (selinux). With the ``user_xattr`` mount | ||
| 10 | option it is possible for users to store extended attributes so long as | ||
| 11 | all attribute names begin with “user”; this restriction seems to have | ||
| 12 | disappeared as of Linux 3.0. | ||
| 13 | |||
| 14 | There are two places where extended attributes can be found. The first | ||
| 15 | place is between the end of each inode entry and the beginning of the | ||
| 16 | next inode entry. For example, if inode.i\_extra\_isize = 28 and | ||
| 17 | sb.inode\_size = 256, then there are 256 - (128 + 28) = 100 bytes | ||
| 18 | available for in-inode extended attribute storage. The second place | ||
| 19 | where extended attributes can be found is in the block pointed to by | ||
| 20 | ``inode.i_file_acl``. As of Linux 3.11, it is not possible for this | ||
| 21 | block to contain a pointer to a second extended attribute block (or even | ||
| 22 | the remaining blocks of a cluster). In theory it is possible for each | ||
| 23 | attribute's value to be stored in a separate data block, though as of | ||
| 24 | Linux 3.11 the code does not permit this. | ||
| 25 | |||
| 26 | Keys are generally assumed to be ASCIIZ strings, whereas values can be | ||
| 27 | strings or binary data. | ||
| 28 | |||
| 29 | Extended attributes, when stored after the inode, have a header | ||
| 30 | ``ext4_xattr_ibody_header`` that is 4 bytes long: | ||
| 31 | |||
| 32 | .. list-table:: | ||
| 33 | :widths: 1 1 1 77 | ||
| 34 | :header-rows: 1 | ||
| 35 | |||
| 36 | * - Offset | ||
| 37 | - Type | ||
| 38 | - Name | ||
| 39 | - Description | ||
| 40 | * - 0x0 | ||
| 41 | - \_\_le32 | ||
| 42 | - h\_magic | ||
| 43 | - Magic number for identification, 0xEA020000. This value is set by the | ||
| 44 | Linux driver, though e2fsprogs doesn't seem to check it(?) | ||
| 45 | |||
| 46 | The beginning of an extended attribute block is in | ||
| 47 | ``struct ext4_xattr_header``, which is 32 bytes long: | ||
| 48 | |||
| 49 | .. list-table:: | ||
| 50 | :widths: 1 1 1 77 | ||
| 51 | :header-rows: 1 | ||
| 52 | |||
| 53 | * - Offset | ||
| 54 | - Type | ||
| 55 | - Name | ||
| 56 | - Description | ||
| 57 | * - 0x0 | ||
| 58 | - \_\_le32 | ||
| 59 | - h\_magic | ||
| 60 | - Magic number for identification, 0xEA020000. | ||
| 61 | * - 0x4 | ||
| 62 | - \_\_le32 | ||
| 63 | - h\_refcount | ||
| 64 | - Reference count. | ||
| 65 | * - 0x8 | ||
| 66 | - \_\_le32 | ||
| 67 | - h\_blocks | ||
| 68 | - Number of disk blocks used. | ||
| 69 | * - 0xC | ||
| 70 | - \_\_le32 | ||
| 71 | - h\_hash | ||
| 72 | - Hash value of all attributes. | ||
| 73 | * - 0x10 | ||
| 74 | - \_\_le32 | ||
| 75 | - h\_checksum | ||
| 76 | - Checksum of the extended attribute block. | ||
| 77 | * - 0x14 | ||
| 78 | - \_\_u32 | ||
| 79 | - h\_reserved[2] | ||
| 80 | - Zero. | ||
| 81 | |||
| 82 | The checksum is calculated against the FS UUID, the 64-bit block number | ||
| 83 | of the extended attribute block, and the entire block (header + | ||
| 84 | entries). | ||
| 85 | |||
| 86 | Following the ``struct ext4_xattr_header`` or | ||
| 87 | ``struct ext4_xattr_ibody_header`` is an array of | ||
| 88 | ``struct ext4_xattr_entry``; each of these entries is at least 16 bytes | ||
| 89 | long. When stored in an external block, the ``struct ext4_xattr_entry`` | ||
| 90 | entries must be stored in sorted order. The sort order is | ||
| 91 | ``e_name_index``, then ``e_name_len``, and finally ``e_name``. | ||
| 92 | Attributes stored inside an inode do not need be stored in sorted order. | ||
| 93 | |||
| 94 | .. list-table:: | ||
| 95 | :widths: 1 1 1 77 | ||
| 96 | :header-rows: 1 | ||
| 97 | |||
| 98 | * - Offset | ||
| 99 | - Type | ||
| 100 | - Name | ||
| 101 | - Description | ||
| 102 | * - 0x0 | ||
| 103 | - \_\_u8 | ||
| 104 | - e\_name\_len | ||
| 105 | - Length of name. | ||
| 106 | * - 0x1 | ||
| 107 | - \_\_u8 | ||
| 108 | - e\_name\_index | ||
| 109 | - Attribute name index. There is a discussion of this below. | ||
| 110 | * - 0x2 | ||
| 111 | - \_\_le16 | ||
| 112 | - e\_value\_offs | ||
| 113 | - Location of this attribute's value on the disk block where it is stored. | ||
| 114 | Multiple attributes can share the same value. For an inode attribute | ||
| 115 | this value is relative to the start of the first entry; for a block this | ||
| 116 | value is relative to the start of the block (i.e. the header). | ||
| 117 | * - 0x4 | ||
| 118 | - \_\_le32 | ||
| 119 | - e\_value\_inum | ||
| 120 | - The inode where the value is stored. Zero indicates the value is in the | ||
| 121 | same block as this entry. This field is only used if the | ||
| 122 | INCOMPAT\_EA\_INODE feature is enabled. | ||
| 123 | * - 0x8 | ||
| 124 | - \_\_le32 | ||
| 125 | - e\_value\_size | ||
| 126 | - Length of attribute value. | ||
| 127 | * - 0xC | ||
| 128 | - \_\_le32 | ||
| 129 | - e\_hash | ||
| 130 | - Hash value of attribute name and attribute value. The kernel doesn't | ||
| 131 | update the hash for in-inode attributes, so for that case this value | ||
| 132 | must be zero, because e2fsck validates any non-zero hash regardless of | ||
| 133 | where the xattr lives. | ||
| 134 | * - 0x10 | ||
| 135 | - char | ||
| 136 | - e\_name[e\_name\_len] | ||
| 137 | - Attribute name. Does not include trailing NULL. | ||
| 138 | |||
| 139 | Attribute values can follow the end of the entry table. There appears to | ||
| 140 | be a requirement that they be aligned to 4-byte boundaries. The values | ||
| 141 | are stored starting at the end of the block and grow towards the | ||
| 142 | xattr\_header/xattr\_entry table. When the two collide, the overflow is | ||
| 143 | put into a separate disk block. If the disk block fills up, the | ||
| 144 | filesystem returns -ENOSPC. | ||
| 145 | |||
| 146 | The first four fields of the ``ext4_xattr_entry`` are set to zero to | ||
| 147 | mark the end of the key list. | ||
| 148 | |||
| 149 | Attribute Name Indices | ||
| 150 | ~~~~~~~~~~~~~~~~~~~~~~ | ||
| 151 | |||
| 152 | Logically speaking, extended attributes are a series of key=value pairs. | ||
| 153 | The keys are assumed to be NULL-terminated strings. To reduce the amount | ||
| 154 | of on-disk space that the keys consume, the beginning of the key string | ||
| 155 | is matched against the attribute name index. If a match is found, the | ||
| 156 | attribute name index field is set, and matching string is removed from | ||
| 157 | the key name. Here is a map of name index values to key prefixes: | ||
| 158 | |||
| 159 | .. list-table:: | ||
| 160 | :widths: 1 79 | ||
| 161 | :header-rows: 1 | ||
| 162 | |||
| 163 | * - Name Index | ||
| 164 | - Key Prefix | ||
| 165 | * - 0 | ||
| 166 | - (no prefix) | ||
| 167 | * - 1 | ||
| 168 | - “user.” | ||
| 169 | * - 2 | ||
| 170 | - “system.posix\_acl\_access” | ||
| 171 | * - 3 | ||
| 172 | - “system.posix\_acl\_default” | ||
| 173 | * - 4 | ||
| 174 | - “trusted.” | ||
| 175 | * - 6 | ||
| 176 | - “security.” | ||
| 177 | * - 7 | ||
| 178 | - “system.” (inline\_data only?) | ||
| 179 | * - 8 | ||
| 180 | - “system.richacl” (SuSE kernels only?) | ||
| 181 | |||
| 182 | For example, if the attribute key is “user.fubar”, the attribute name | ||
| 183 | index is set to 1 and the “fubar” name is recorded on disk. | ||
| 184 | |||
| 185 | POSIX ACLs | ||
| 186 | ~~~~~~~~~~ | ||
| 187 | |||
| 188 | POSIX ACLs are stored in a reduced version of the Linux kernel (and | ||
| 189 | libacl's) internal ACL format. The key difference is that the version | ||
| 190 | number is different (1) and the ``e_id`` field is only stored for named | ||
| 191 | user and group ACLs. | ||
| @@ -0,0 +1,22 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Bigalloc | ||
| 4 | -------- | ||
| 5 | |||
| 6 | At the moment, the default size of a block is 4KiB, which is a commonly | ||
| 7 | supported page size on most MMU-capable hardware. This is fortunate, as | ||
| 8 | ext4 code is not prepared to handle the case where the block size | ||
| 9 | exceeds the page size. However, for a filesystem of mostly huge files, | ||
| 10 | it is desirable to be able to allocate disk blocks in units of multiple | ||
| 11 | blocks to reduce both fragmentation and metadata overhead. The | ||
| 12 | `bigalloc <Bigalloc>`__ feature provides exactly this ability. The | ||
| 13 | administrator can set a block cluster size at mkfs time (which is stored | ||
| 14 | in the s\_log\_cluster\_size field in the superblock); from then on, the | ||
| 15 | block bitmaps track clusters, not individual blocks. This means that | ||
| 16 | block groups can be several gigabytes in size (instead of just 128MiB); | ||
| 17 | however, the minimum allocation unit becomes a cluster, not a block, | ||
| 18 | even for directories. TaoBao had a patchset to extend the “use units of | ||
| 19 | clusters instead of blocks” to the extent tree, though it is not clear | ||
| 20 | where those patches went-- they eventually morphed into “extent tree v2” | ||
| 21 | but that code has not landed as of May 2015. | ||
| 22 | |||
| @@ -0,0 +1,28 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Block and inode Bitmaps | ||
| 4 | ----------------------- | ||
| 5 | |||
| 6 | The data block bitmap tracks the usage of data blocks within the block | ||
| 7 | group. | ||
| 8 | |||
| 9 | The inode bitmap records which entries in the inode table are in use. | ||
| 10 | |||
| 11 | As with most bitmaps, one bit represents the usage status of one data | ||
| 12 | block or inode table entry. This implies a block group size of 8 \* | ||
| 13 | number\_of\_bytes\_in\_a\_logical\_block. | ||
| 14 | |||
| 15 | NOTE: If ``BLOCK_UNINIT`` is set for a given block group, various parts | ||
| 16 | of the kernel and e2fsprogs code pretends that the block bitmap contains | ||
| 17 | zeros (i.e. all blocks in the group are free). However, it is not | ||
| 18 | necessarily the case that no blocks are in use -- if ``meta_bg`` is set, | ||
| 19 | the bitmaps and group descriptor live inside the group. Unfortunately, | ||
| 20 | ext2fs\_test\_block\_bitmap2() will return '0' for those locations, | ||
| 21 | which produces confusing debugfs output. | ||
| 22 | |||
| 23 | Inode Table | ||
| 24 | ----------- | ||
| 25 | Inode tables are statically allocated at mkfs time. Each block group | ||
| 26 | descriptor points to the start of the table, and the superblock records | ||
| 27 | the number of inodes per group. See the section on inodes for more | ||
| 28 | information. | ||
| @@ -0,0 +1,135 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Layout | ||
| 4 | ------ | ||
| 5 | |||
| 6 | The layout of a standard block group is approximately as follows (each | ||
| 7 | of these fields is discussed in a separate section below): | ||
| 8 | |||
| 9 | .. list-table:: | ||
| 10 | :widths: 1 1 1 1 1 1 1 1 | ||
| 11 | :header-rows: 1 | ||
| 12 | |||
| 13 | * - Group 0 Padding | ||
| 14 | - ext4 Super Block | ||
| 15 | - Group Descriptors | ||
| 16 | - Reserved GDT Blocks | ||
| 17 | - Data Block Bitmap | ||
| 18 | - inode Bitmap | ||
| 19 | - inode Table | ||
| 20 | - Data Blocks | ||
| 21 | * - 1024 bytes | ||
| 22 | - 1 block | ||
| 23 | - many blocks | ||
| 24 | - many blocks | ||
| 25 | - 1 block | ||
| 26 | - 1 block | ||
| 27 | - many blocks | ||
| 28 | - many more blocks | ||
| 29 | |||
| 30 | For the special case of block group 0, the first 1024 bytes are unused, | ||
| 31 | to allow for the installation of x86 boot sectors and other oddities. | ||
| 32 | The superblock will start at offset 1024 bytes, whichever block that | ||
| 33 | happens to be (usually 0). However, if for some reason the block size = | ||
| 34 | 1024, then block 0 is marked in use and the superblock goes in block 1. | ||
| 35 | For all other block groups, there is no padding. | ||
| 36 | |||
| 37 | The ext4 driver primarily works with the superblock and the group | ||
| 38 | descriptors that are found in block group 0. Redundant copies of the | ||
| 39 | superblock and group descriptors are written to some of the block groups | ||
| 40 | across the disk in case the beginning of the disk gets trashed, though | ||
| 41 | not all block groups necessarily host a redundant copy (see following | ||
| 42 | paragraph for more details). If the group does not have a redundant | ||
| 43 | copy, the block group begins with the data block bitmap. Note also that | ||
| 44 | when the filesystem is freshly formatted, mkfs will allocate “reserve | ||
| 45 | GDT block” space after the block group descriptors and before the start | ||
| 46 | of the block bitmaps to allow for future expansion of the filesystem. By | ||
| 47 | default, a filesystem is allowed to increase in size by a factor of | ||
| 48 | 1024x over the original filesystem size. | ||
| 49 | |||
| 50 | The location of the inode table is given by ``grp.bg_inode_table_*``. It | ||
| 51 | is continuous range of blocks large enough to contain | ||
| 52 | ``sb.s_inodes_per_group * sb.s_inode_size`` bytes. | ||
| 53 | |||
| 54 | As for the ordering of items in a block group, it is generally | ||
| 55 | established that the super block and the group descriptor table, if | ||
| 56 | present, will be at the beginning of the block group. The bitmaps and | ||
| 57 | the inode table can be anywhere, and it is quite possible for the | ||
| 58 | bitmaps to come after the inode table, or for both to be in different | ||
| 59 | groups (flex\_bg). Leftover space is used for file data blocks, indirect | ||
| 60 | block maps, extent tree blocks, and extended attributes. | ||
| 61 | |||
| 62 | Flexible Block Groups | ||
| 63 | --------------------- | ||
| 64 | |||
| 65 | Starting in ext4, there is a new feature called flexible block groups | ||
| 66 | (flex\_bg). In a flex\_bg, several block groups are tied together as one | ||
| 67 | logical block group; the bitmap spaces and the inode table space in the | ||
| 68 | first block group of the flex\_bg are expanded to include the bitmaps | ||
| 69 | and inode tables of all other block groups in the flex\_bg. For example, | ||
| 70 | if the flex\_bg size is 4, then group 0 will contain (in order) the | ||
| 71 | superblock, group descriptors, data block bitmaps for groups 0-3, inode | ||
| 72 | bitmaps for groups 0-3, inode tables for groups 0-3, and the remaining | ||
| 73 | space in group 0 is for file data. The effect of this is to group the | ||
| 74 | block metadata close together for faster loading, and to enable large | ||
| 75 | files to be continuous on disk. Backup copies of the superblock and | ||
| 76 | group descriptors are always at the beginning of block groups, even if | ||
| 77 | flex\_bg is enabled. The number of block groups that make up a flex\_bg | ||
| 78 | is given by 2 ^ ``sb.s_log_groups_per_flex``. | ||
| 79 | |||
| 80 | Meta Block Groups | ||
| 81 | ----------------- | ||
| 82 | |||
| 83 | Without the option META\_BG, for safety concerns, all block group | ||
| 84 | descriptors copies are kept in the first block group. Given the default | ||
| 85 | 128MiB(2^27 bytes) block group size and 64-byte group descriptors, ext4 | ||
| 86 | can have at most 2^27/64 = 2^21 block groups. This limits the entire | ||
| 87 | filesystem size to 2^21 ∗ 2^27 = 2^48bytes or 256TiB. | ||
| 88 | |||
| 89 | The solution to this problem is to use the metablock group feature | ||
| 90 | (META\_BG), which is already in ext3 for all 2.6 releases. With the | ||
| 91 | META\_BG feature, ext4 filesystems are partitioned into many metablock | ||
| 92 | groups. Each metablock group is a cluster of block groups whose group | ||
| 93 | descriptor structures can be stored in a single disk block. For ext4 | ||
| 94 | filesystems with 4 KB block size, a single metablock group partition | ||
| 95 | includes 64 block groups, or 8 GiB of disk space. The metablock group | ||
| 96 | feature moves the location of the group descriptors from the congested | ||
| 97 | first block group of the whole filesystem into the first group of each | ||
| 98 | metablock group itself. The backups are in the second and last group of | ||
| 99 | each metablock group. This increases the 2^21 maximum block groups limit | ||
| 100 | to the hard limit 2^32, allowing support for a 512PiB filesystem. | ||
| 101 | |||
| 102 | The change in the filesystem format replaces the current scheme where | ||
| 103 | the superblock is followed by a variable-length set of block group | ||
| 104 | descriptors. Instead, the superblock and a single block group descriptor | ||
| 105 | block is placed at the beginning of the first, second, and last block | ||
| 106 | groups in a meta-block group. A meta-block group is a collection of | ||
| 107 | block groups which can be described by a single block group descriptor | ||
| 108 | block. Since the size of the block group descriptor structure is 32 | ||
| 109 | bytes, a meta-block group contains 32 block groups for filesystems with | ||
| 110 | a 1KB block size, and 128 block groups for filesystems with a 4KB | ||
| 111 | blocksize. Filesystems can either be created using this new block group | ||
| 112 | descriptor layout, or existing filesystems can be resized on-line, and | ||
| 113 | the field s\_first\_meta\_bg in the superblock will indicate the first | ||
| 114 | block group using this new layout. | ||
| 115 | |||
| 116 | Please see an important note about ``BLOCK_UNINIT`` in the section about | ||
| 117 | block and inode bitmaps. | ||
| 118 | |||
| 119 | Lazy Block Group Initialization | ||
| 120 | ------------------------------- | ||
| 121 | |||
| 122 | A new feature for ext4 are three block group descriptor flags that | ||
| 123 | enable mkfs to skip initializing other parts of the block group | ||
| 124 | metadata. Specifically, the INODE\_UNINIT and BLOCK\_UNINIT flags mean | ||
| 125 | that the inode and block bitmaps for that group can be calculated and | ||
| 126 | therefore the on-disk bitmap blocks are not initialized. This is | ||
| 127 | generally the case for an empty block group or a block group containing | ||
| 128 | only fixed-location block group metadata. The INODE\_ZEROED flag means | ||
| 129 | that the inode table has been initialized; mkfs will unset this flag and | ||
| 130 | rely on the kernel to initialize the inode tables in the background. | ||
| 131 | |||
| 132 | By not writing zeroes to the bitmaps and inode table, mkfs time is | ||
| 133 | reduced considerably. Note the feature flag is RO\_COMPAT\_GDT\_CSUM, | ||
| 134 | but the dumpe2fs output prints this as “uninit\_bg”. They are the same | ||
| 135 | thing. | ||
| @@ -0,0 +1,49 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ||
| 4 | | i.i\_block Offset | Where It Points | | ||
| 5 | +=====================+==============================================================================================================================================================================================================================+ | ||
| 6 | | 0 to 11 | Direct map to file blocks 0 to 11. | | ||
| 7 | +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ||
| 8 | | 12 | Indirect block: (file blocks 12 to (``$block_size`` / 4) + 11, or 12 to 1035 if 4KiB blocks) | | ||
| 9 | | | | | ||
| 10 | | | +------------------------------+--------------------------------------------------------------------+ | | ||
| 11 | | | | Indirect Block Offset | Where It Points | | | ||
| 12 | | | +==============================+====================================================================+ | | ||
| 13 | | | | 0 to (``$block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | | ||
| 14 | | | +------------------------------+--------------------------------------------------------------------+ | | ||
| 15 | +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ||
| 16 | | 13 | Double-indirect block: (file blocks ``$block_size``/4 + 12 to (``$block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 11, or 1036 to 1049611 if 4KiB blocks) | | ||
| 17 | | | | | ||
| 18 | | | +--------------------------------+---------------------------------------------------------------------------------------------------------+ | | ||
| 19 | | | | Double Indirect Block Offset | Where It Points | | | ||
| 20 | | | +================================+=========================================================================================================+ | | ||
| 21 | | | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) | | | ||
| 22 | | | | | | | | ||
| 23 | | | | | +------------------------------+--------------------------------------------------------------------+ | | | ||
| 24 | | | | | | Indirect Block Offset | Where It Points | | | | ||
| 25 | | | | | +==============================+====================================================================+ | | | ||
| 26 | | | | | | 0 to (``$block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | | | ||
| 27 | | | | | +------------------------------+--------------------------------------------------------------------+ | | | ||
| 28 | | | +--------------------------------+---------------------------------------------------------------------------------------------------------+ | | ||
| 29 | +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ||
| 30 | | 14 | Triple-indirect block: (file blocks (``$block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 12 to (``$block_size`` / 4) ^ 3 + (``$block_size`` / 4) ^ 2 + (``$block_size`` / 4) + 12, or 1049612 to 1074791436 if 4KiB blocks) | | ||
| 31 | | | | | ||
| 32 | | | +--------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+ | | ||
| 33 | | | | Triple Indirect Block Offset | Where It Points | | | ||
| 34 | | | +================================+================================================================================================================================================+ | | ||
| 35 | | | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) double indirect blocks (1024 if 4KiB blocks) | | | ||
| 36 | | | | | | | | ||
| 37 | | | | | +--------------------------------+---------------------------------------------------------------------------------------------------------+ | | | ||
| 38 | | | | | | Double Indirect Block Offset | Where It Points | | | | ||
| 39 | | | | | +================================+=========================================================================================================+ | | | ||
| 40 | | | | | | 0 to (``$block_size`` / 4) | Map to (``$block_size`` / 4) indirect blocks (1024 if 4KiB blocks) | | | | ||
| 41 | | | | | | | | | | | ||
| 42 | | | | | | | +------------------------------+--------------------------------------------------------------------+ | | | | ||
| 43 | | | | | | | | Indirect Block Offset | Where It Points | | | | | ||
| 44 | | | | | | | +==============================+====================================================================+ | | | | ||
| 45 | | | | | | | | 0 to (``$block_size`` / 4) | Direct map to (``$block_size`` / 4) blocks (1024 if 4KiB blocks) | | | | | ||
| 46 | | | | | | | +------------------------------+--------------------------------------------------------------------+ | | | | ||
| 47 | | | | | +--------------------------------+---------------------------------------------------------------------------------------------------------+ | | | ||
| 48 | | | +--------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+ | | ||
| 49 | +---------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ | ||
| @@ -0,0 +1,142 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Blocks | ||
| 4 | ------ | ||
| 5 | |||
| 6 | ext4 allocates storage space in units of “blocks”. A block is a group of | ||
| 7 | sectors between 1KiB and 64KiB, and the number of sectors must be an | ||
| 8 | integral power of 2. Blocks are in turn grouped into larger units called | ||
| 9 | block groups. Block size is specified at mkfs time and typically is | ||
| 10 | 4KiB. You may experience mounting problems if block size is greater than | ||
| 11 | page size (i.e. 64KiB blocks on a i386 which only has 4KiB memory | ||
| 12 | pages). By default a filesystem can contain 2^32 blocks; if the '64bit' | ||
| 13 | feature is enabled, then a filesystem can have 2^64 blocks. | ||
| 14 | |||
| 15 | For 32-bit filesystems, limits are as follows: | ||
| 16 | |||
| 17 | .. list-table:: | ||
| 18 | :widths: 1 1 1 1 1 | ||
| 19 | :header-rows: 1 | ||
| 20 | |||
| 21 | * - Item | ||
| 22 | - 1KiB | ||
| 23 | - 2KiB | ||
| 24 | - 4KiB | ||
| 25 | - 64KiB | ||
| 26 | * - Blocks | ||
| 27 | - 2^32 | ||
| 28 | - 2^32 | ||
| 29 | - 2^32 | ||
| 30 | - 2^32 | ||
| 31 | * - Inodes | ||
| 32 | - 2^32 | ||
| 33 | - 2^32 | ||
| 34 | - 2^32 | ||
| 35 | - 2^32 | ||
| 36 | * - File System Size | ||
| 37 | - 4TiB | ||
| 38 | - 8TiB | ||
| 39 | - 16TiB | ||
| 40 | - 256PiB | ||
| 41 | * - Blocks Per Block Group | ||
| 42 | - 8,192 | ||
| 43 | - 16,384 | ||
| 44 | - 32,768 | ||
| 45 | - 524,288 | ||
| 46 | * - Inodes Per Block Group | ||
| 47 | - 8,192 | ||
| 48 | - 16,384 | ||
| 49 | - 32,768 | ||
| 50 | - 524,288 | ||
| 51 | * - Block Group Size | ||
| 52 | - 8MiB | ||
| 53 | - 32MiB | ||
| 54 | - 128MiB | ||
| 55 | - 32GiB | ||
| 56 | * - Blocks Per File, Extents | ||
| 57 | - 2^32 | ||
| 58 | - 2^32 | ||
| 59 | - 2^32 | ||
| 60 | - 2^32 | ||
| 61 | * - Blocks Per File, Block Maps | ||
| 62 | - 16,843,020 | ||
| 63 | - 134,480,396 | ||
| 64 | - 1,074,791,436 | ||
| 65 | - 4,398,314,962,956 (really 2^32 due to field size limitations) | ||
| 66 | * - File Size, Extents | ||
| 67 | - 4TiB | ||
| 68 | - 8TiB | ||
| 69 | - 16TiB | ||
| 70 | - 256TiB | ||
| 71 | * - File Size, Block Maps | ||
| 72 | - 16GiB | ||
| 73 | - 256GiB | ||
| 74 | - 4TiB | ||
| 75 | - 256TiB | ||
| 76 | |||
| 77 | For 64-bit filesystems, limits are as follows: | ||
| 78 | |||
| 79 | .. list-table:: | ||
| 80 | :widths: 1 1 1 1 1 | ||
| 81 | :header-rows: 1 | ||
| 82 | |||
| 83 | * - Item | ||
| 84 | - 1KiB | ||
| 85 | - 2KiB | ||
| 86 | - 4KiB | ||
| 87 | - 64KiB | ||
| 88 | * - Blocks | ||
| 89 | - 2^64 | ||
| 90 | - 2^64 | ||
| 91 | - 2^64 | ||
| 92 | - 2^64 | ||
| 93 | * - Inodes | ||
| 94 | - 2^32 | ||
| 95 | - 2^32 | ||
| 96 | - 2^32 | ||
| 97 | - 2^32 | ||
| 98 | * - File System Size | ||
| 99 | - 16ZiB | ||
| 100 | - 32ZiB | ||
| 101 | - 64ZiB | ||
| 102 | - 1YiB | ||
| 103 | * - Blocks Per Block Group | ||
| 104 | - 8,192 | ||
| 105 | - 16,384 | ||
| 106 | - 32,768 | ||
| 107 | - 524,288 | ||
| 108 | * - Inodes Per Block Group | ||
| 109 | - 8,192 | ||
| 110 | - 16,384 | ||
| 111 | - 32,768 | ||
| 112 | - 524,288 | ||
| 113 | * - Block Group Size | ||
| 114 | - 8MiB | ||
| 115 | - 32MiB | ||
| 116 | - 128MiB | ||
| 117 | - 32GiB | ||
| 118 | * - Blocks Per File, Extents | ||
| 119 | - 2^32 | ||
| 120 | - 2^32 | ||
| 121 | - 2^32 | ||
| 122 | - 2^32 | ||
| 123 | * - Blocks Per File, Block Maps | ||
| 124 | - 16,843,020 | ||
| 125 | - 134,480,396 | ||
| 126 | - 1,074,791,436 | ||
| 127 | - 4,398,314,962,956 (really 2^32 due to field size limitations) | ||
| 128 | * - File Size, Extents | ||
| 129 | - 4TiB | ||
| 130 | - 8TiB | ||
| 131 | - 16TiB | ||
| 132 | - 256TiB | ||
| 133 | * - File Size, Block Maps | ||
| 134 | - 16GiB | ||
| 135 | - 256GiB | ||
| 136 | - 4TiB | ||
| 137 | - 256TiB | ||
| 138 | |||
| 139 | Note: Files not using extents (i.e. files using block maps) must be | ||
| 140 | placed within the first 2^32 blocks of a filesystem. Files with extents | ||
| 141 | must be placed within the first 2^48 blocks of a filesystem. It's not | ||
| 142 | clear what happens with larger filesystems. | ||
| @@ -0,0 +1,73 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Checksums | ||
| 4 | --------- | ||
| 5 | |||
| 6 | Starting in early 2012, metadata checksums were added to all major ext4 | ||
| 7 | and jbd2 data structures. The associated feature flag is metadata\_csum. | ||
| 8 | The desired checksum algorithm is indicated in the superblock, though as | ||
| 9 | of October 2012 the only supported algorithm is crc32c. Some data | ||
| 10 | structures did not have space to fit a full 32-bit checksum, so only the | ||
| 11 | lower 16 bits are stored. Enabling the 64bit feature increases the data | ||
| 12 | structure size so that full 32-bit checksums can be stored for many data | ||
| 13 | structures. However, existing 32-bit filesystems cannot be extended to | ||
| 14 | enable 64bit mode, at least not without the experimental resize2fs | ||
| 15 | patches to do so. | ||
| 16 | |||
| 17 | Existing filesystems can have checksumming added by running | ||
| 18 | ``tune2fs -O metadata_csum`` against the underlying device. If tune2fs | ||
| 19 | encounters directory blocks that lack sufficient empty space to add a | ||
| 20 | checksum, it will request that you run ``e2fsck -D`` to have the | ||
| 21 | directories rebuilt with checksums. This has the added benefit of | ||
| 22 | removing slack space from the directory files and rebalancing the htree | ||
| 23 | indexes. If you \_ignore\_ this step, your directories will not be | ||
| 24 | protected by a checksum! | ||
| 25 | |||
| 26 | The following table describes the data elements that go into each type | ||
| 27 | of checksum. The checksum function is whatever the superblock describes | ||
| 28 | (crc32c as of October 2013) unless noted otherwise. | ||
| 29 | |||
| 30 | .. list-table:: | ||
| 31 | :widths: 1 1 4 | ||
| 32 | :header-rows: 1 | ||
| 33 | |||
| 34 | * - Metadata | ||
| 35 | - Length | ||
| 36 | - Ingredients | ||
| 37 | * - Superblock | ||
| 38 | - \_\_le32 | ||
| 39 | - The entire superblock up to the checksum field. The UUID lives inside | ||
| 40 | the superblock. | ||
| 41 | * - MMP | ||
| 42 | - \_\_le32 | ||
| 43 | - UUID + the entire MMP block up to the checksum field. | ||
| 44 | * - Extended Attributes | ||
| 45 | - \_\_le32 | ||
| 46 | - UUID + the entire extended attribute block. The checksum field is set to | ||
| 47 | zero. | ||
| 48 | * - Directory Entries | ||
| 49 | - \_\_le32 | ||
| 50 | - UUID + inode number + inode generation + the directory block up to the | ||
| 51 | fake entry enclosing the checksum field. | ||
| 52 | * - HTREE Nodes | ||
| 53 | - \_\_le32 | ||
| 54 | - UUID + inode number + inode generation + all valid extents + HTREE tail. | ||
| 55 | The checksum field is set to zero. | ||
| 56 | * - Extents | ||
| 57 | - \_\_le32 | ||
| 58 | - UUID + inode number + inode generation + the entire extent block up to | ||
| 59 | the checksum field. | ||
| 60 | * - Bitmaps | ||
| 61 | - \_\_le32 or \_\_le16 | ||
| 62 | - UUID + the entire bitmap. Checksums are stored in the group descriptor, | ||
| 63 | and truncated if the group descriptor size is 32 bytes (i.e. ^64bit) | ||
| 64 | * - Inodes | ||
| 65 | - \_\_le32 | ||
| 66 | - UUID + inode number + inode generation + the entire inode. The checksum | ||
| 67 | field is set to zero. Each inode has its own checksum. | ||
| 68 | * - Group Descriptors | ||
| 69 | - \_\_le16 | ||
| 70 | - If metadata\_csum, then UUID + group number + the entire descriptor; | ||
| 71 | else if gdt\_csum, then crc16(UUID + group number + the entire | ||
| 72 | descriptor). In all cases, only the lower 16 bits are stored. | ||
| 73 | |||
| @@ -0,0 +1,426 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Directory Entries | ||
| 4 | ----------------- | ||
| 5 | |||
| 6 | In an ext4 filesystem, a directory is more or less a flat file that maps | ||
| 7 | an arbitrary byte string (usually ASCII) to an inode number on the | ||
| 8 | filesystem. There can be many directory entries across the filesystem | ||
| 9 | that reference the same inode number--these are known as hard links, and | ||
| 10 | that is why hard links cannot reference files on other filesystems. As | ||
| 11 | such, directory entries are found by reading the data block(s) | ||
| 12 | associated with a directory file for the particular directory entry that | ||
| 13 | is desired. | ||
| 14 | |||
| 15 | Linear (Classic) Directories | ||
| 16 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 17 | |||
| 18 | By default, each directory lists its entries in an “almost-linear” | ||
| 19 | array. I write “almost” because it's not a linear array in the memory | ||
| 20 | sense because directory entries are not split across filesystem blocks. | ||
| 21 | Therefore, it is more accurate to say that a directory is a series of | ||
| 22 | data blocks and that each block contains a linear array of directory | ||
| 23 | entries. The end of each per-block array is signified by reaching the | ||
| 24 | end of the block; the last entry in the block has a record length that | ||
| 25 | takes it all the way to the end of the block. The end of the entire | ||
| 26 | directory is of course signified by reaching the end of the file. Unused | ||
| 27 | directory entries are signified by inode = 0. By default the filesystem | ||
| 28 | uses ``struct ext4_dir_entry_2`` for directory entries unless the | ||
| 29 | “filetype” feature flag is not set, in which case it uses | ||
| 30 | ``struct ext4_dir_entry``. | ||
| 31 | |||
| 32 | The original directory entry format is ``struct ext4_dir_entry``, which | ||
| 33 | is at most 263 bytes long, though on disk you'll need to reference | ||
| 34 | ``dirent.rec_len`` to know for sure. | ||
| 35 | |||
| 36 | .. list-table:: | ||
| 37 | :widths: 1 1 1 77 | ||
| 38 | :header-rows: 1 | ||
| 39 | |||
| 40 | * - Offset | ||
| 41 | - Size | ||
| 42 | - Name | ||
| 43 | - Description | ||
| 44 | * - 0x0 | ||
| 45 | - \_\_le32 | ||
| 46 | - inode | ||
| 47 | - Number of the inode that this directory entry points to. | ||
| 48 | * - 0x4 | ||
| 49 | - \_\_le16 | ||
| 50 | - rec\_len | ||
| 51 | - Length of this directory entry. Must be a multiple of 4. | ||
| 52 | * - 0x6 | ||
| 53 | - \_\_le16 | ||
| 54 | - name\_len | ||
| 55 | - Length of the file name. | ||
| 56 | * - 0x8 | ||
| 57 | - char | ||
| 58 | - name[EXT4\_NAME\_LEN] | ||
| 59 | - File name. | ||
| 60 | |||
| 61 | Since file names cannot be longer than 255 bytes, the new directory | ||
| 62 | entry format shortens the rec\_len field and uses the space for a file | ||
| 63 | type flag, probably to avoid having to load every inode during directory | ||
| 64 | tree traversal. This format is ``ext4_dir_entry_2``, which is at most | ||
| 65 | 263 bytes long, though on disk you'll need to reference | ||
| 66 | ``dirent.rec_len`` to know for sure. | ||
| 67 | |||
| 68 | .. list-table:: | ||
| 69 | :widths: 1 1 1 77 | ||
| 70 | :header-rows: 1 | ||
| 71 | |||
| 72 | * - Offset | ||
| 73 | - Size | ||
| 74 | - Name | ||
| 75 | - Description | ||
| 76 | * - 0x0 | ||
| 77 | - \_\_le32 | ||
| 78 | - inode | ||
| 79 | - Number of the inode that this directory entry points to. | ||
| 80 | * - 0x4 | ||
| 81 | - \_\_le16 | ||
| 82 | - rec\_len | ||
| 83 | - Length of this directory entry. | ||
| 84 | * - 0x6 | ||
| 85 | - \_\_u8 | ||
| 86 | - name\_len | ||
| 87 | - Length of the file name. | ||
| 88 | * - 0x7 | ||
| 89 | - \_\_u8 | ||
| 90 | - file\_type | ||
| 91 | - File type code, see ftype_ table below. | ||
| 92 | * - 0x8 | ||
| 93 | - char | ||
| 94 | - name[EXT4\_NAME\_LEN] | ||
| 95 | - File name. | ||
| 96 | |||
| 97 | .. _ftype: | ||
| 98 | |||
| 99 | The directory file type is one of the following values: | ||
| 100 | |||
| 101 | .. list-table:: | ||
| 102 | :widths: 1 79 | ||
| 103 | :header-rows: 1 | ||
| 104 | |||
| 105 | * - Value | ||
| 106 | - Description | ||
| 107 | * - 0x0 | ||
| 108 | - Unknown. | ||
| 109 | * - 0x1 | ||
| 110 | - Regular file. | ||
| 111 | * - 0x2 | ||
| 112 | - Directory. | ||
| 113 | * - 0x3 | ||
| 114 | - Character device file. | ||
| 115 | * - 0x4 | ||
| 116 | - Block device file. | ||
| 117 | * - 0x5 | ||
| 118 | - FIFO. | ||
| 119 | * - 0x6 | ||
| 120 | - Socket. | ||
| 121 | * - 0x7 | ||
| 122 | - Symbolic link. | ||
| 123 | |||
| 124 | In order to add checksums to these classic directory blocks, a phony | ||
| 125 | ``struct ext4_dir_entry`` is placed at the end of each leaf block to | ||
| 126 | hold the checksum. The directory entry is 12 bytes long. The inode | ||
| 127 | number and name\_len fields are set to zero to fool old software into | ||
| 128 | ignoring an apparently empty directory entry, and the checksum is stored | ||
| 129 | in the place where the name normally goes. The structure is | ||
| 130 | ``struct ext4_dir_entry_tail``: | ||
| 131 | |||
| 132 | .. list-table:: | ||
| 133 | :widths: 1 1 1 77 | ||
| 134 | :header-rows: 1 | ||
| 135 | |||
| 136 | * - Offset | ||
| 137 | - Size | ||
| 138 | - Name | ||
| 139 | - Description | ||
| 140 | * - 0x0 | ||
| 141 | - \_\_le32 | ||
| 142 | - det\_reserved\_zero1 | ||
| 143 | - Inode number, which must be zero. | ||
| 144 | * - 0x4 | ||
| 145 | - \_\_le16 | ||
| 146 | - det\_rec\_len | ||
| 147 | - Length of this directory entry, which must be 12. | ||
| 148 | * - 0x6 | ||
| 149 | - \_\_u8 | ||
| 150 | - det\_reserved\_zero2 | ||
| 151 | - Length of the file name, which must be zero. | ||
| 152 | * - 0x7 | ||
| 153 | - \_\_u8 | ||
| 154 | - det\_reserved\_ft | ||
| 155 | - File type, which must be 0xDE. | ||
| 156 | * - 0x8 | ||
| 157 | - \_\_le32 | ||
| 158 | - det\_checksum | ||
| 159 | - Directory leaf block checksum. | ||
| 160 | |||
| 161 | The leaf directory block checksum is calculated against the FS UUID, the | ||
| 162 | directory's inode number, the directory's inode generation number, and | ||
| 163 | the entire directory entry block up to (but not including) the fake | ||
| 164 | directory entry. | ||
| 165 | |||
| 166 | Hash Tree Directories | ||
| 167 | ~~~~~~~~~~~~~~~~~~~~~ | ||
| 168 | |||
| 169 | A linear array of directory entries isn't great for performance, so a | ||
| 170 | new feature was added to ext3 to provide a faster (but peculiar) | ||
| 171 | balanced tree keyed off a hash of the directory entry name. If the | ||
| 172 | EXT4\_INDEX\_FL (0x1000) flag is set in the inode, this directory uses a | ||
| 173 | hashed btree (htree) to organize and find directory entries. For | ||
| 174 | backwards read-only compatibility with ext2, this tree is actually | ||
| 175 | hidden inside the directory file, masquerading as “empty” directory data | ||
| 176 | blocks! It was stated previously that the end of the linear directory | ||
| 177 | entry table was signified with an entry pointing to inode 0; this is | ||
| 178 | (ab)used to fool the old linear-scan algorithm into thinking that the | ||
| 179 | rest of the directory block is empty so that it moves on. | ||
| 180 | |||
| 181 | The root of the tree always lives in the first data block of the | ||
| 182 | directory. By ext2 custom, the '.' and '..' entries must appear at the | ||
| 183 | beginning of this first block, so they are put here as two | ||
| 184 | ``struct ext4_dir_entry_2``\ s and not stored in the tree. The rest of | ||
| 185 | the root node contains metadata about the tree and finally a hash->block | ||
| 186 | map to find nodes that are lower in the htree. If | ||
| 187 | ``dx_root.info.indirect_levels`` is non-zero then the htree has two | ||
| 188 | levels; the data block pointed to by the root node's map is an interior | ||
| 189 | node, which is indexed by a minor hash. Interior nodes in this tree | ||
| 190 | contains a zeroed out ``struct ext4_dir_entry_2`` followed by a | ||
| 191 | minor\_hash->block map to find leafe nodes. Leaf nodes contain a linear | ||
| 192 | array of all ``struct ext4_dir_entry_2``; all of these entries | ||
| 193 | (presumably) hash to the same value. If there is an overflow, the | ||
| 194 | entries simply overflow into the next leaf node, and the | ||
| 195 | least-significant bit of the hash (in the interior node map) that gets | ||
| 196 | us to this next leaf node is set. | ||
| 197 | |||
| 198 | To traverse the directory as a htree, the code calculates the hash of | ||
| 199 | the desired file name and uses it to find the corresponding block | ||
| 200 | number. If the tree is flat, the block is a linear array of directory | ||
| 201 | entries that can be searched; otherwise, the minor hash of the file name | ||
| 202 | is computed and used against this second block to find the corresponding | ||
| 203 | third block number. That third block number will be a linear array of | ||
| 204 | directory entries. | ||
| 205 | |||
| 206 | To traverse the directory as a linear array (such as the old code does), | ||
| 207 | the code simply reads every data block in the directory. The blocks used | ||
| 208 | for the htree will appear to have no entries (aside from '.' and '..') | ||
| 209 | and so only the leaf nodes will appear to have any interesting content. | ||
| 210 | |||
| 211 | The root of the htree is in ``struct dx_root``, which is the full length | ||
| 212 | of a data block: | ||
| 213 | |||
| 214 | .. list-table:: | ||
| 215 | :widths: 1 1 1 77 | ||
| 216 | :header-rows: 1 | ||
| 217 | |||
| 218 | * - Offset | ||
| 219 | - Type | ||
| 220 | - Name | ||
| 221 | - Description | ||
| 222 | * - 0x0 | ||
| 223 | - \_\_le32 | ||
| 224 | - dot.inode | ||
| 225 | - inode number of this directory. | ||
| 226 | * - 0x4 | ||
| 227 | - \_\_le16 | ||
| 228 | - dot.rec\_len | ||
| 229 | - Length of this record, 12. | ||
| 230 | * - 0x6 | ||
| 231 | - u8 | ||
| 232 | - dot.name\_len | ||
| 233 | - Length of the name, 1. | ||
| 234 | * - 0x7 | ||
| 235 | - u8 | ||
| 236 | - dot.file\_type | ||
| 237 | - File type of this entry, 0x2 (directory) (if the feature flag is set). | ||
| 238 | * - 0x8 | ||
| 239 | - char | ||
| 240 | - dot.name[4] | ||
| 241 | - “.\\0\\0\\0” | ||
| 242 | * - 0xC | ||
| 243 | - \_\_le32 | ||
| 244 | - dotdot.inode | ||
| 245 | - inode number of parent directory. | ||
| 246 | * - 0x10 | ||
| 247 | - \_\_le16 | ||
| 248 | - dotdot.rec\_len | ||
| 249 | - block\_size - 12. The record length is long enough to cover all htree | ||
| 250 | data. | ||
| 251 | * - 0x12 | ||
| 252 | - u8 | ||
| 253 | - dotdot.name\_len | ||
| 254 | - Length of the name, 2. | ||
| 255 | * - 0x13 | ||
| 256 | - u8 | ||
| 257 | - dotdot.file\_type | ||
| 258 | - File type of this entry, 0x2 (directory) (if the feature flag is set). | ||
| 259 | * - 0x14 | ||
| 260 | - char | ||
| 261 | - dotdot\_name[4] | ||
| 262 | - “..\\0\\0” | ||
| 263 | * - 0x18 | ||
| 264 | - \_\_le32 | ||
| 265 | - struct dx\_root\_info.reserved\_zero | ||
| 266 | - Zero. | ||
| 267 | * - 0x1C | ||
| 268 | - u8 | ||
| 269 | - struct dx\_root\_info.hash\_version | ||
| 270 | - Hash type, see dirhash_ table below. | ||
| 271 | * - 0x1D | ||
| 272 | - u8 | ||
| 273 | - struct dx\_root\_info.info\_length | ||
| 274 | - Length of the tree information, 0x8. | ||
| 275 | * - 0x1E | ||
| 276 | - u8 | ||
| 277 | - struct dx\_root\_info.indirect\_levels | ||
| 278 | - Depth of the htree. Cannot be larger than 3 if the INCOMPAT\_LARGEDIR | ||
| 279 | feature is set; cannot be larger than 2 otherwise. | ||
| 280 | * - 0x1F | ||
| 281 | - u8 | ||
| 282 | - struct dx\_root\_info.unused\_flags | ||
| 283 | - | ||
| 284 | * - 0x20 | ||
| 285 | - \_\_le16 | ||
| 286 | - limit | ||
| 287 | - Maximum number of dx\_entries that can follow this header, plus 1 for | ||
| 288 | the header itself. | ||
| 289 | * - 0x22 | ||
| 290 | - \_\_le16 | ||
| 291 | - count | ||
| 292 | - Actual number of dx\_entries that follow this header, plus 1 for the | ||
| 293 | header itself. | ||
| 294 | * - 0x24 | ||
| 295 | - \_\_le32 | ||
| 296 | - block | ||
| 297 | - The block number (within the directory file) that goes with hash=0. | ||
| 298 | * - 0x28 | ||
| 299 | - struct dx\_entry | ||
| 300 | - entries[0] | ||
| 301 | - As many 8-byte ``struct dx_entry`` as fits in the rest of the data block. | ||
| 302 | |||
| 303 | .. _dirhash: | ||
| 304 | |||
| 305 | The directory hash is one of the following values: | ||
| 306 | |||
| 307 | .. list-table:: | ||
| 308 | :widths: 1 79 | ||
| 309 | :header-rows: 1 | ||
| 310 | |||
| 311 | * - Value | ||
| 312 | - Description | ||
| 313 | * - 0x0 | ||
| 314 | - Legacy. | ||
| 315 | * - 0x1 | ||
| 316 | - Half MD4. | ||
| 317 | * - 0x2 | ||
| 318 | - Tea. | ||
| 319 | * - 0x3 | ||
| 320 | - Legacy, unsigned. | ||
| 321 | * - 0x4 | ||
| 322 | - Half MD4, unsigned. | ||
| 323 | * - 0x5 | ||
| 324 | - Tea, unsigned. | ||
| 325 | |||
| 326 | Interior nodes of an htree are recorded as ``struct dx_node``, which is | ||
| 327 | also the full length of a data block: | ||
| 328 | |||
| 329 | .. list-table:: | ||
| 330 | :widths: 1 1 1 77 | ||
| 331 | :header-rows: 1 | ||
| 332 | |||
| 333 | * - Offset | ||
| 334 | - Type | ||
| 335 | - Name | ||
| 336 | - Description | ||
| 337 | * - 0x0 | ||
| 338 | - \_\_le32 | ||
| 339 | - fake.inode | ||
| 340 | - Zero, to make it look like this entry is not in use. | ||
| 341 | * - 0x4 | ||
| 342 | - \_\_le16 | ||
| 343 | - fake.rec\_len | ||
| 344 | - The size of the block, in order to hide all of the dx\_node data. | ||
| 345 | * - 0x6 | ||
| 346 | - u8 | ||
| 347 | - name\_len | ||
| 348 | - Zero. There is no name for this “unused” directory entry. | ||
| 349 | * - 0x7 | ||
| 350 | - u8 | ||
| 351 | - file\_type | ||
| 352 | - Zero. There is no file type for this “unused” directory entry. | ||
| 353 | * - 0x8 | ||
| 354 | - \_\_le16 | ||
| 355 | - limit | ||
| 356 | - Maximum number of dx\_entries that can follow this header, plus 1 for | ||
| 357 | the header itself. | ||
| 358 | * - 0xA | ||
| 359 | - \_\_le16 | ||
| 360 | - count | ||
| 361 | - Actual number of dx\_entries that follow this header, plus 1 for the | ||
| 362 | header itself. | ||
| 363 | * - 0xE | ||
| 364 | - \_\_le32 | ||
| 365 | - block | ||
| 366 | - The block number (within the directory file) that goes with the lowest | ||
| 367 | hash value of this block. This value is stored in the parent block. | ||
| 368 | * - 0x12 | ||
| 369 | - struct dx\_entry | ||
| 370 | - entries[0] | ||
| 371 | - As many 8-byte ``struct dx_entry`` as fits in the rest of the data block. | ||
| 372 | |||
| 373 | The hash maps that exist in both ``struct dx_root`` and | ||
| 374 | ``struct dx_node`` are recorded as ``struct dx_entry``, which is 8 bytes | ||
| 375 | long: | ||
| 376 | |||
| 377 | .. list-table:: | ||
| 378 | :widths: 1 1 1 77 | ||
| 379 | :header-rows: 1 | ||
| 380 | |||
| 381 | * - Offset | ||
| 382 | - Type | ||
| 383 | - Name | ||
| 384 | - Description | ||
| 385 | * - 0x0 | ||
| 386 | - \_\_le32 | ||
| 387 | - hash | ||
| 388 | - Hash code. | ||
| 389 | * - 0x4 | ||
| 390 | - \_\_le32 | ||
| 391 | - block | ||
| 392 | - Block number (within the directory file, not filesystem blocks) of the | ||
| 393 | next node in the htree. | ||
| 394 | |||
| 395 | (If you think this is all quite clever and peculiar, so does the | ||
| 396 | author.) | ||
| 397 | |||
| 398 | If metadata checksums are enabled, the last 8 bytes of the directory | ||
| 399 | block (precisely the length of one dx\_entry) are used to store a | ||
| 400 | ``struct dx_tail``, which contains the checksum. The ``limit`` and | ||
| 401 | ``count`` entries in the dx\_root/dx\_node structures are adjusted as | ||
| 402 | necessary to fit the dx\_tail into the block. If there is no space for | ||
| 403 | the dx\_tail, the user is notified to run e2fsck -D to rebuild the | ||
| 404 | directory index (which will ensure that there's space for the checksum. | ||
| 405 | The dx\_tail structure is 8 bytes long and looks like this: | ||
| 406 | |||
| 407 | .. list-table:: | ||
| 408 | :widths: 1 1 1 77 | ||
| 409 | :header-rows: 1 | ||
| 410 | |||
| 411 | * - Offset | ||
| 412 | - Type | ||
| 413 | - Name | ||
| 414 | - Description | ||
| 415 | * - 0x0 | ||
| 416 | - u32 | ||
| 417 | - dt\_reserved | ||
| 418 | - Zero. | ||
| 419 | * - 0x4 | ||
| 420 | - \_\_le32 | ||
| 421 | - dt\_checksum | ||
| 422 | - Checksum of the htree directory block. | ||
| 423 | |||
| 424 | The checksum is calculated against the FS UUID, the htree index header | ||
| 425 | (dx\_root or dx\_node), all of the htree indices (dx\_entry) that are in | ||
| 426 | use, and the tail block (dx\_tail). | ||
| @@ -0,0 +1,12 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Dynamic Structures | ||
| 4 | ================== | ||
| 5 | |||
| 6 | Dynamic metadata are created on the fly when files and blocks are | ||
| 7 | allocated to files. | ||
| 8 | |||
| 9 | .. include:: inodes.rst | ||
| 10 | .. include:: ifork.rst | ||
| 11 | .. include:: directory.rst | ||
| 12 | .. include:: attributes.rst | ||
| @@ -0,0 +1,18 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Large Extended Attribute Values | ||
| 4 | ------------------------------- | ||
| 5 | |||
| 6 | To enable ext4 to store extended attribute values that do not fit in the | ||
| 7 | inode or in the single extended attribute block attached to an inode, | ||
| 8 | the EA\_INODE feature allows us to store the value in the data blocks of | ||
| 9 | a regular file inode. This “EA inode” is linked only from the extended | ||
| 10 | attribute name index and must not appear in a directory entry. The | ||
| 11 | inode's i\_atime field is used to store a checksum of the xattr value; | ||
| 12 | and i\_ctime/i\_version store a 64-bit reference count, which enables | ||
| 13 | sharing of large xattr values between multiple owning inodes. For | ||
| 14 | backward compatibility with older versions of this feature, the | ||
| 15 | i\_mtime/i\_generation *may* store a back-reference to the inode number | ||
| 16 | and i\_generation of the **one** owning inode (in cases where the EA | ||
| 17 | inode is not referenced by multiple inodes) to verify that the EA inode | ||
| 18 | is the correct one being accessed. | ||
| @@ -0,0 +1,13 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Global Structures | ||
| 4 | ================= | ||
| 5 | |||
| 6 | The filesystem is sharded into a number of block groups, each of which | ||
| 7 | have static metadata at fixed locations. | ||
| 8 | |||
| 9 | .. include:: super.rst | ||
| 10 | .. include:: group_descr.rst | ||
| 11 | .. include:: bitmaps.rst | ||
| 12 | .. include:: mmp.rst | ||
| 13 | .. include:: journal.rst | ||
| @@ -0,0 +1,170 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Block Group Descriptors | ||
| 4 | ----------------------- | ||
| 5 | |||
| 6 | Each block group on the filesystem has one of these descriptors | ||
| 7 | associated with it. As noted in the Layout section above, the group | ||
| 8 | descriptors (if present) are the second item in the block group. The | ||
| 9 | standard configuration is for each block group to contain a full copy of | ||
| 10 | the block group descriptor table unless the sparse\_super feature flag | ||
| 11 | is set. | ||
| 12 | |||
| 13 | Notice how the group descriptor records the location of both bitmaps and | ||
| 14 | the inode table (i.e. they can float). This means that within a block | ||
| 15 | group, the only data structures with fixed locations are the superblock | ||
| 16 | and the group descriptor table. The flex\_bg mechanism uses this | ||
| 17 | property to group several block groups into a flex group and lay out all | ||
| 18 | of the groups' bitmaps and inode tables into one long run in the first | ||
| 19 | group of the flex group. | ||
| 20 | |||
| 21 | If the meta\_bg feature flag is set, then several block groups are | ||
| 22 | grouped together into a meta group. Note that in the meta\_bg case, | ||
| 23 | however, the first and last two block groups within the larger meta | ||
| 24 | group contain only group descriptors for the groups inside the meta | ||
| 25 | group. | ||
| 26 | |||
| 27 | flex\_bg and meta\_bg do not appear to be mutually exclusive features. | ||
| 28 | |||
| 29 | In ext2, ext3, and ext4 (when the 64bit feature is not enabled), the | ||
| 30 | block group descriptor was only 32 bytes long and therefore ends at | ||
| 31 | bg\_checksum. On an ext4 filesystem with the 64bit feature enabled, the | ||
| 32 | block group descriptor expands to at least the 64 bytes described below; | ||
| 33 | the size is stored in the superblock. | ||
| 34 | |||
| 35 | If gdt\_csum is set and metadata\_csum is not set, the block group | ||
| 36 | checksum is the crc16 of the FS UUID, the group number, and the group | ||
| 37 | descriptor structure. If metadata\_csum is set, then the block group | ||
| 38 | checksum is the lower 16 bits of the checksum of the FS UUID, the group | ||
| 39 | number, and the group descriptor structure. Both block and inode bitmap | ||
| 40 | checksums are calculated against the FS UUID, the group number, and the | ||
| 41 | entire bitmap. | ||
| 42 | |||
| 43 | The block group descriptor is laid out in ``struct ext4_group_desc``. | ||
| 44 | |||
| 45 | .. list-table:: | ||
| 46 | :widths: 1 1 1 77 | ||
| 47 | :header-rows: 1 | ||
| 48 | |||
| 49 | * - Offset | ||
| 50 | - Size | ||
| 51 | - Name | ||
| 52 | - Description | ||
| 53 | * - 0x0 | ||
| 54 | - \_\_le32 | ||
| 55 | - bg\_block\_bitmap\_lo | ||
| 56 | - Lower 32-bits of location of block bitmap. | ||
| 57 | * - 0x4 | ||
| 58 | - \_\_le32 | ||
| 59 | - bg\_inode\_bitmap\_lo | ||
| 60 | - Lower 32-bits of location of inode bitmap. | ||
| 61 | * - 0x8 | ||
| 62 | - \_\_le32 | ||
| 63 | - bg\_inode\_table\_lo | ||
| 64 | - Lower 32-bits of location of inode table. | ||
| 65 | * - 0xC | ||
| 66 | - \_\_le16 | ||
| 67 | - bg\_free\_blocks\_count\_lo | ||
| 68 | - Lower 16-bits of free block count. | ||
| 69 | * - 0xE | ||
| 70 | - \_\_le16 | ||
| 71 | - bg\_free\_inodes\_count\_lo | ||
| 72 | - Lower 16-bits of free inode count. | ||
| 73 | * - 0x10 | ||
| 74 | - \_\_le16 | ||
| 75 | - bg\_used\_dirs\_count\_lo | ||
| 76 | - Lower 16-bits of directory count. | ||
| 77 | * - 0x12 | ||
| 78 | - \_\_le16 | ||
| 79 | - bg\_flags | ||
| 80 | - Block group flags. See the bgflags_ table below. | ||
| 81 | * - 0x14 | ||
| 82 | - \_\_le32 | ||
| 83 | - bg\_exclude\_bitmap\_lo | ||
| 84 | - Lower 32-bits of location of snapshot exclusion bitmap. | ||
| 85 | * - 0x18 | ||
| 86 | - \_\_le16 | ||
| 87 | - bg\_block\_bitmap\_csum\_lo | ||
| 88 | - Lower 16-bits of the block bitmap checksum. | ||
| 89 | * - 0x1A | ||
| 90 | - \_\_le16 | ||
| 91 | - bg\_inode\_bitmap\_csum\_lo | ||
| 92 | - Lower 16-bits of the inode bitmap checksum. | ||
| 93 | * - 0x1C | ||
| 94 | - \_\_le16 | ||
| 95 | - bg\_itable\_unused\_lo | ||
| 96 | - Lower 16-bits of unused inode count. If set, we needn't scan past the | ||
| 97 | ``(sb.s_inodes_per_group - gdt.bg_itable_unused)``\ th entry in the | ||
| 98 | inode table for this group. | ||
| 99 | * - 0x1E | ||
| 100 | - \_\_le16 | ||
| 101 | - bg\_checksum | ||
| 102 | - Group descriptor checksum; crc16(sb\_uuid+group+desc) if the | ||
| 103 | RO\_COMPAT\_GDT\_CSUM feature is set, or crc32c(sb\_uuid+group\_desc) & | ||
| 104 | 0xFFFF if the RO\_COMPAT\_METADATA\_CSUM feature is set. | ||
| 105 | * - | ||
| 106 | - | ||
| 107 | - | ||
| 108 | - These fields only exist if the 64bit feature is enabled and s_desc_size | ||
| 109 | > 32. | ||
| 110 | * - 0x20 | ||
| 111 | - \_\_le32 | ||
| 112 | - bg\_block\_bitmap\_hi | ||
| 113 | - Upper 32-bits of location of block bitmap. | ||
| 114 | * - 0x24 | ||
| 115 | - \_\_le32 | ||
| 116 | - bg\_inode\_bitmap\_hi | ||
| 117 | - Upper 32-bits of location of inodes bitmap. | ||
| 118 | * - 0x28 | ||
| 119 | - \_\_le32 | ||
| 120 | - bg\_inode\_table\_hi | ||
| 121 | - Upper 32-bits of location of inodes table. | ||
| 122 | * - 0x2C | ||
| 123 | - \_\_le16 | ||
| 124 | - bg\_free\_blocks\_count\_hi | ||
| 125 | - Upper 16-bits of free block count. | ||
| 126 | * - 0x2E | ||
| 127 | - \_\_le16 | ||
| 128 | - bg\_free\_inodes\_count\_hi | ||
| 129 | - Upper 16-bits of free inode count. | ||
| 130 | * - 0x30 | ||
| 131 | - \_\_le16 | ||
| 132 | - bg\_used\_dirs\_count\_hi | ||
| 133 | - Upper 16-bits of directory count. | ||
| 134 | * - 0x32 | ||
| 135 | - \_\_le16 | ||
| 136 | - bg\_itable\_unused\_hi | ||
| 137 | - Upper 16-bits of unused inode count. | ||
| 138 | * - 0x34 | ||
| 139 | - \_\_le32 | ||
| 140 | - bg\_exclude\_bitmap\_hi | ||
| 141 | - Upper 32-bits of location of snapshot exclusion bitmap. | ||
| 142 | * - 0x38 | ||
| 143 | - \_\_le16 | ||
| 144 | - bg\_block\_bitmap\_csum\_hi | ||
| 145 | - Upper 16-bits of the block bitmap checksum. | ||
| 146 | * - 0x3A | ||
| 147 | - \_\_le16 | ||
| 148 | - bg\_inode\_bitmap\_csum\_hi | ||
| 149 | - Upper 16-bits of the inode bitmap checksum. | ||
| 150 | * - 0x3C | ||
| 151 | - \_\_u32 | ||
| 152 | - bg\_reserved | ||
| 153 | - Padding to 64 bytes. | ||
| 154 | |||
| 155 | .. _bgflags: | ||
| 156 | |||
| 157 | Block group flags can be any combination of the following: | ||
| 158 | |||
| 159 | .. list-table:: | ||
| 160 | :widths: 1 79 | ||
| 161 | :header-rows: 1 | ||
| 162 | |||
| 163 | * - Value | ||
| 164 | - Description | ||
| 165 | * - 0x1 | ||
| 166 | - inode table and bitmap are not initialized (EXT4\_BG\_INODE\_UNINIT). | ||
| 167 | * - 0x2 | ||
| 168 | - block bitmap is not initialized (EXT4\_BG\_BLOCK\_UNINIT). | ||
| 169 | * - 0x4 | ||
| 170 | - inode table is zeroed (EXT4\_BG\_INODE\_ZEROED). | ||
| @@ -0,0 +1,194 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | The Contents of inode.i\_block | ||
| 4 | ------------------------------ | ||
| 5 | |||
| 6 | Depending on the type of file an inode describes, the 60 bytes of | ||
| 7 | storage in ``inode.i_block`` can be used in different ways. In general, | ||
| 8 | regular files and directories will use it for file block indexing | ||
| 9 | information, and special files will use it for special purposes. | ||
| 10 | |||
| 11 | Symbolic Links | ||
| 12 | ~~~~~~~~~~~~~~ | ||
| 13 | |||
| 14 | The target of a symbolic link will be stored in this field if the target | ||
| 15 | string is less than 60 bytes long. Otherwise, either extents or block | ||
| 16 | maps will be used to allocate data blocks to store the link target. | ||
| 17 | |||
| 18 | Direct/Indirect Block Addressing | ||
| 19 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | ||
| 20 | |||
| 21 | In ext2/3, file block numbers were mapped to logical block numbers by | ||
| 22 | means of an (up to) three level 1-1 block map. To find the logical block | ||
| 23 | that stores a particular file block, the code would navigate through | ||
| 24 | this increasingly complicated structure. Notice that there is neither a | ||
| 25 | magic number nor a checksum to provide any level of confidence that the | ||
| 26 | block isn't full of garbage. | ||
| 27 | |||
| 28 | .. ifconfig:: builder != 'latex' | ||
| 29 | |||
| 30 | .. include:: blockmap.rst | ||
| 31 | |||
| 32 | .. ifconfig:: builder == 'latex' | ||
| 33 | |||
| 34 | [Table omitted because LaTeX doesn't support nested tables.] | ||
| 35 | |||
| 36 | Note that with this block mapping scheme, it is necessary to fill out a | ||
| 37 | lot of mapping data even for a large contiguous file! This inefficiency | ||
| 38 | led to the creation of the extent mapping scheme, discussed below. | ||
| 39 | |||
| 40 | Notice also that a file using this mapping scheme cannot be placed | ||
| 41 | higher than 2^32 blocks. | ||
| 42 | |||
| 43 | Extent Tree | ||
| 44 | ~~~~~~~~~~~ | ||
| 45 | |||
| 46 | In ext4, the file to logical block map has been replaced with an extent | ||
| 47 | tree. Under the old scheme, allocating a contiguous run of 1,000 blocks | ||
| 48 | requires an indirect block to map all 1,000 entries; with extents, the | ||
| 49 | mapping is reduced to a single ``struct ext4_extent`` with | ||
| 50 | ``ee_len = 1000``. If flex\_bg is enabled, it is possible to allocate | ||
| 51 | very large files with a single extent, at a considerable reduction in | ||
| 52 | metadata block use, and some improvement in disk efficiency. The inode | ||
| 53 | must have the extents flag (0x80000) flag set for this feature to be in | ||
| 54 | use. | ||
| 55 | |||
| 56 | Extents are arranged as a tree. Each node of the tree begins with a | ||
| 57 | ``struct ext4_extent_header``. If the node is an interior node | ||
| 58 | (``eh.eh_depth`` > 0), the header is followed by ``eh.eh_entries`` | ||
| 59 | instances of ``struct ext4_extent_idx``; each of these index entries | ||
| 60 | points to a block containing more nodes in the extent tree. If the node | ||
| 61 | is a leaf node (``eh.eh_depth == 0``), then the header is followed by | ||
| 62 | ``eh.eh_entries`` instances of ``struct ext4_extent``; these instances | ||
| 63 | point to the file's data blocks. The root node of the extent tree is | ||
| 64 | stored in ``inode.i_block``, which allows for the first four extents to | ||
| 65 | be recorded without the use of extra metadata blocks. | ||
| 66 | |||
| 67 | The extent tree header is recorded in ``struct ext4_extent_header``, | ||
| 68 | which is 12 bytes long: | ||
| 69 | |||
| 70 | .. list-table:: | ||
| 71 | :widths: 1 1 1 77 | ||
| 72 | :header-rows: 1 | ||
| 73 | |||
| 74 | * - Offset | ||
| 75 | - Size | ||
| 76 | - Name | ||
| 77 | - Description | ||
| 78 | * - 0x0 | ||
| 79 | - \_\_le16 | ||
| 80 | - eh\_magic | ||
| 81 | - Magic number, 0xF30A. | ||
| 82 | * - 0x2 | ||
| 83 | - \_\_le16 | ||
| 84 | - eh\_entries | ||
| 85 | - Number of valid entries following the header. | ||
| 86 | * - 0x4 | ||
| 87 | - \_\_le16 | ||
| 88 | - eh\_max | ||
| 89 | - Maximum number of entries that could follow the header. | ||
| 90 | * - 0x6 | ||
| 91 | - \_\_le16 | ||
| 92 | - eh\_depth | ||
| 93 | - Depth of this extent node in the extent tree. 0 = this extent node | ||
| 94 | points to data blocks; otherwise, this extent node points to other | ||
| 95 | extent nodes. The extent tree can be at most 5 levels deep: a logical | ||
| 96 | block number can be at most ``2^32``, and the smallest ``n`` that | ||
| 97 | satisfies ``4*(((blocksize - 12)/12)^n) >= 2^32`` is 5. | ||
| 98 | * - 0x8 | ||
| 99 | - \_\_le32 | ||
| 100 | - eh\_generation | ||
| 101 | - Generation of the tree. (Used by Lustre, but not standard ext4). | ||
| 102 | |||
| 103 | Internal nodes of the extent tree, also known as index nodes, are | ||
| 104 | recorded as ``struct ext4_extent_idx``, and are 12 bytes long: | ||
| 105 | |||
| 106 | .. list-table:: | ||
| 107 | :widths: 1 1 1 77 | ||
| 108 | :header-rows: 1 | ||
| 109 | |||
| 110 | * - Offset | ||
| 111 | - Size | ||
| 112 | - Name | ||
| 113 | - Description | ||
| 114 | * - 0x0 | ||
| 115 | - \_\_le32 | ||
| 116 | - ei\_block | ||
| 117 | - This index node covers file blocks from 'block' onward. | ||
| 118 | * - 0x4 | ||
| 119 | - \_\_le32 | ||
| 120 | - ei\_leaf\_lo | ||
| 121 | - Lower 32-bits of the block number of the extent node that is the next | ||
| 122 | level lower in the tree. The tree node pointed to can be either another | ||
| 123 | internal node or a leaf node, described below. | ||
| 124 | * - 0x8 | ||
| 125 | - \_\_le16 | ||
| 126 | - ei\_leaf\_hi | ||
| 127 | - Upper 16-bits of the previous field. | ||
| 128 | * - 0xA | ||
| 129 | - \_\_u16 | ||
| 130 | - ei\_unused | ||
| 131 | - | ||
| 132 | |||
| 133 | Leaf nodes of the extent tree are recorded as ``struct ext4_extent``, | ||
| 134 | and are also 12 bytes long: | ||
| 135 | |||
| 136 | .. list-table:: | ||
| 137 | :widths: 1 1 1 77 | ||
| 138 | :header-rows: 1 | ||
| 139 | |||
| 140 | * - Offset | ||
| 141 | - Size | ||
| 142 | - Name | ||
| 143 | - Description | ||
| 144 | * - 0x0 | ||
| 145 | - \_\_le32 | ||
| 146 | - ee\_block | ||
| 147 | - First file block number that this extent covers. | ||
| 148 | * - 0x4 | ||
| 149 | - \_\_le16 | ||
| 150 | - ee\_len | ||
| 151 | - Number of blocks covered by extent. If the value of this field is <= | ||
| 152 | 32768, the extent is initialized. If the value of the field is > 32768, | ||
| 153 | the extent is uninitialized and the actual extent length is ``ee_len`` - | ||
| 154 | 32768. Therefore, the maximum length of a initialized extent is 32768 | ||
| 155 | blocks, and the maximum length of an uninitialized extent is 32767. | ||
| 156 | * - 0x6 | ||
| 157 | - \_\_le16 | ||
| 158 | - ee\_start\_hi | ||
| 159 | - Upper 16-bits of the block number to which this extent points. | ||
| 160 | * - 0x8 | ||
| 161 | - \_\_le32 | ||
| 162 | - ee\_start\_lo | ||
| 163 | - Lower 32-bits of the block number to which this extent points. | ||
| 164 | |||
| 165 | Prior to the introduction of metadata checksums, the extent header + | ||
| 166 | extent entries always left at least 4 bytes of unallocated space at the | ||
| 167 | end of each extent tree data block (because (2^x % 12) >= 4). Therefore, | ||
| 168 | the 32-bit checksum is inserted into this space. The 4 extents in the | ||
| 169 | inode do not need checksumming, since the inode is already checksummed. | ||
| 170 | The checksum is calculated against the FS UUID, the inode number, the | ||
| 171 | inode generation, and the entire extent block leading up to (but not | ||
| 172 | including) the checksum itself. | ||
| 173 | |||
| 174 | ``struct ext4_extent_tail`` is 4 bytes long: | ||
| 175 | |||
| 176 | .. list-table:: | ||
| 177 | :widths: 1 1 1 77 | ||
| 178 | :header-rows: 1 | ||
| 179 | |||
| 180 | * - Offset | ||
| 181 | - Size | ||
| 182 | - Name | ||
| 183 | - Description | ||
| 184 | * - 0x0 | ||
| 185 | - \_\_le32 | ||
| 186 | - eb\_checksum | ||
| 187 | - Checksum of the extent block, crc32c(uuid+inum+igeneration+extentblock) | ||
| 188 | |||
| 189 | Inline Data | ||
| 190 | ~~~~~~~~~~~ | ||
| 191 | |||
| 192 | If the inline data feature is enabled for the filesystem and the flag is | ||
| 193 | set for the inode, it is possible that the first 60 bytes of the file | ||
| 194 | data are stored here. | ||
| @@ -0,0 +1,9 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | ============================== | ||
| 4 | Data Structures and Algorithms | ||
| 5 | ============================== | ||
| 6 | .. include:: about.rst | ||
| 7 | .. include:: overview.rst | ||
| 8 | .. include:: globals.rst | ||
| 9 | .. include:: dynamic.rst | ||
| @@ -0,0 +1,37 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Inline Data | ||
| 4 | ----------- | ||
| 5 | |||
| 6 | The inline data feature was designed to handle the case that a file's | ||
| 7 | data is so tiny that it readily fits inside the inode, which | ||
| 8 | (theoretically) reduces disk block consumption and reduces seeks. If the | ||
| 9 | file is smaller than 60 bytes, then the data are stored inline in | ||
| 10 | ``inode.i_block``. If the rest of the file would fit inside the extended | ||
| 11 | attribute space, then it might be found as an extended attribute | ||
| 12 | “system.data” within the inode body (“ibody EA”). This of course | ||
| 13 | constrains the amount of extended attributes one can attach to an inode. | ||
| 14 | If the data size increases beyond i\_block + ibody EA, a regular block | ||
| 15 | is allocated and the contents moved to that block. | ||
| 16 | |||
| 17 | Pending a change to compact the extended attribute key used to store | ||
| 18 | inline data, one ought to be able to store 160 bytes of data in a | ||
| 19 | 256-byte inode (as of June 2015, when i\_extra\_isize is 28). Prior to | ||
| 20 | that, the limit was 156 bytes due to inefficient use of inode space. | ||
| 21 | |||
| 22 | The inline data feature requires the presence of an extended attribute | ||
| 23 | for “system.data”, even if the attribute value is zero length. | ||
| 24 | |||
| 25 | Inline Directories | ||
| 26 | ~~~~~~~~~~~~~~~~~~ | ||
| 27 | |||
| 28 | The first four bytes of i\_block are the inode number of the parent | ||
| 29 | directory. Following that is a 56-byte space for an array of directory | ||
| 30 | entries; see ``struct ext4_dir_entry``. If there is a “system.data” | ||
| 31 | attribute in the inode body, the EA value is an array of | ||
| 32 | ``struct ext4_dir_entry`` as well. Note that for inline directories, the | ||
| 33 | i\_block and EA space are treated as separate dirent blocks; directory | ||
| 34 | entries cannot span the two. | ||
| 35 | |||
| 36 | Inline directory entries are not checksummed, as the inode checksum | ||
| 37 | should protect all inline data contents. | ||
| @@ -0,0 +1,575 @@ | |||
| 1 | .. SPDX-License-Identifier: GPL-2.0 | ||
| 2 | |||
| 3 | Index Nodes | ||
| 4 | ----------- | ||
| 5 | |||
| 6 | In a regular UNIX filesystem, the inode stores all the metadata | ||
| 7 | pertaining to the file (time stamps, block maps, extended attributes, | ||
| 8 | etc), not the directory entry. To find the information associated with a | ||
| 9 | file, one must traverse the directory files to find the directory entry | ||
| 10 | associated with a file, then load the inode to find the metadata for | ||
| 11 | that file. ext4 appears to cheat (for performance reasons) a little bit | ||
| 12 | by storing a copy of the file type (normally stored in the inode) in the | ||
| 13 | directory entry. (Compare all this to FAT, which stores all the file | ||
| 14 | information directly in the directory entry, but does not support hard | ||
| 15 | links and is in general more seek-happy than ext4 due to its simpler | ||
| 16 | block allocator and extensive use of linked lists.) | ||
| 17 | |||
| 18 | The inode table is a linear array of ``struct ext4_inode``. The table is | ||
| 19 | sized to have enough blocks to store at least | ||
| 20 | ``sb.s_inode_size * sb.s_inodes_per_group`` bytes. The number of the | ||
| 21 | block group containing an inode can be calculated as | ||
| 22 | ``(inode_number - 1) / sb.s_inodes_per_group``, and the offset into the | ||
| 23 | group's table is ``(inode_number - 1) % sb.s_inodes_per_group``. There | ||
| 24 | is no inode 0. | ||
| 25 | |||
| 26 | The inode checksum is calculated against the FS UUID, the inode number, | ||
| 27 | and the inode structure itself. | ||
| 28 | |||
| 29 | The inode table entry is laid out in ``struct ext4_inode``. | ||
| 30 | |||
| 31 | .. list-table:: | ||
| 32 | :widths: 1 1 1 77 | ||
| 33 | :header-rows: 1 | ||
| 34 | |||
| 35 | * - Offset | ||
| 36 | - Size | ||
| 37 | - Name | ||
| 38 | - Description | ||
| 39 | * - 0x0 | ||
| 40 | - \_\_le16 | ||
| 41 | - i\_mode | ||
| 42 | - File mode. See the table i_mode_ below. | ||
| 43 | * - 0x2 | ||
| 44 | - \_\_le16 | ||
| 45 | - i\_uid | ||
| 46 | - Lower 16-bits of Owner UID. | ||
| 47 | * - 0x4 | ||
| 48 | - \_\_le32 | ||
| 49 | - i\_size\_lo | ||
| 50 | - Lower 32-bits of size in bytes. | ||
| 51 | * - 0x8 | ||
| 52 | - \_\_le32 | ||
| 53 | - i\_atime | ||
| 54 | - Last access time, in seconds since the epoch. However, if the EA\_INODE | ||
| 55 | inode flag is set, this inode stores an extended attribute value and | ||
| 56 | this field contains the checksum of the value. | ||
| 57 | * - 0xC | ||
| 58 | - \_\_le32 | ||
| 59 | - i\_ctime | ||
| 60 | - Last inode change time, in seconds since the epoch. However, if the | ||
| 61 | EA\_INODE inode flag is set, this inode stores an extended attribute | ||
| 62 | value and this field contains the lower 32 bits of the attribute value's | ||
| 63 | reference count. | ||
| 64 | * - 0x10 | ||
| 65 | - \_\_le32 | ||
| 66 | - i\_mtime | ||
| 67 | - Last data modification time, in seconds since the epoch. However, if the | ||
| 68 | EA\_INODE inode flag is set, this inode stores an extended attribute | ||
| 69 | value and this field contains the number of the inode that owns the | ||
| 70 | extended attribute. | ||
| 71 | * - 0x14 | ||
| 72 | - \_\_le32 | ||
| 73 | - i\_dtime | ||
| 74 | - Deletion Time, in seconds since the epoch. | ||
| 75 | * - 0x18 | ||
| 76 | - \_\_le16 | ||
| 77 | - i\_gid | ||
| 78 | - Lower 16-bits of GID. | ||
| 79 | * - 0x1A | ||
| 80 | - \_\_le16 | ||
| 81 | - i\_links\_count | ||
| 82 | - Hard link count. Normally, ext4 does not permit an inode to have more | ||
| 83 | than 65,000 hard links. This applies to files as well as directories, | ||
| 84 | which means that there cannot be more than 64,998 subdirectories in a | ||
| 85 | directory (each subdirectory's '..' entry counts as a hard link, as does | ||
| 86 | the '.' entry in the directory itself). With the DIR\_NLINK feature | ||
| 87 | enabled, ext4 supports more than 64,998 subdirectories by setting this | ||
| 88 | field to 1 to indicate that the number of hard links is not known. | ||
| 89 | * - 0x1C | ||
| 90 | - \_\_le32 | ||
| 91 | - i\_blocks\_lo | ||
| 92 | - Lower 32-bits of “block” count. If the huge\_file feature flag is not | ||
| 93 | set on the filesystem, the file consumes ``i_blocks_lo`` 512-byte blocks | ||
| 94 | on disk. If huge\_file is set and EXT4\_HUGE\_FILE\_FL is NOT set in | ||
| 95 | ``inode.i_flags``, then the file consumes ``i_blocks_lo + (i_blocks_hi | ||
| 96 | << 32)`` 512-byte blocks on disk. If huge\_file is set and | ||
| 97 | EXT4\_HUGE\_FILE\_FL IS set in ``inode.i_flags``, then this file | ||
| 98 | consumes (``i_blocks_lo + i_blocks_hi`` << 32) filesystem blocks on | ||
| 99 | disk. | ||
| 100 | * - 0x20 | ||
| 101 | - \_\_le32 | ||
| 102 | - i\_flags | ||
| 103 | - Inode flags. See the table i_flags_ below. | ||
| 104 | * - 0x24 | ||
| 105 | - 4 bytes | ||
| 106 | - i\_osd1 | ||
| 107 | - See the table i_osd1_ for more details. | ||
| 108 | * - 0x28 | ||
| 109 | - 60 bytes | ||
| 110 | - i\_block[EXT4\_N\_BLOCKS=15] | ||
| 111 | - Block map or extent tree. See the section “The Contents of inode.i\_block”. | ||
| 112 | * - 0x64 | ||
| 113 | - \_\_le32 | ||
| 114 | - i\_generation | ||
| 115 | - File version (for NFS). | ||
| 116 | * - 0x68 | ||
| 117 | - \_\_le32 | ||
| 118 | - i\_file\_acl\_lo | ||
| 119 | - Lower 32-bits of extended attribute block. ACLs are of course one of | ||
| 120 | many possible extended attributes; I think the name of this field is a | ||
| 121 | result of the first use of extended attributes being for ACLs. | ||
| 122 | * - 0x6C | ||
| 123 | - \_\_le32 | ||
| 124 | - i\_size\_high / i\_dir\_acl | ||
| 125 | - Upper 32-bits of file/directory size. In ext2/3 this field was named | ||
| 126 | i\_dir\_acl, though it was usually set to zero and never used. | ||
| 127 | * - 0x70 | ||
| 128 | - \_\_le32 | ||
| 129 | - i\_obso\_faddr | ||
| 130 | - (Obsolete) fragment address. | ||
| 131 | * - 0x74 | ||
| 132 | - 12 bytes | ||
| 133 | - i\_osd2 | ||
| 134 | - See the table i_osd2_ for more details. | ||
| 135 | * - 0x80 | ||
| 136 | - \_\_le16 | ||
| 137 | - i\_extra\_isize | ||
| 138 | - Size of this inode - 128. Alternately, the size of the extended inode | ||
| 139 | fields beyond the original ext2 inode, including this field. | ||
| 140 | * - 0x82 | ||
| 141 | - \_\_le16 | ||
| 142 | - i\_checksum\_hi | ||
| 143 | - Upper 16-bits of the inode checksum. | ||
| 144 | * - 0x84 | ||
| 145 | - \_\_le32 | ||
| 146 | - i\_ctime\_extra | ||
| 147 | - Extra change time bits. This provides sub-second precision. See Inode | ||
| 148 | Timestamps section. | ||
| 149 | * - 0x88 | ||
| 150 | - \_\_le32 | ||
| 151 | - i\_mtime\_extra | ||
| 152 | - Extra modification time bits. This provides sub-second precision. | ||
| 153 | * - 0x8C | ||
| 154 | - \_\_le32 | ||
| 155 | - i\_atime\_extra | ||
| 156 | - Extra access time bits. This provides sub-second precision. | ||
| 157 | * - 0x90 | ||
| 158 | - \_\_le32 | ||
| 159 | - i\_crtime | ||
| 160 | - File creation time, in seconds since the epoch. | ||
| 161 | * - 0x94 | ||
| 162 | - \_\_le32 | ||
| 163 | - i\_crtime\_extra | ||
| 164 | - Extra file creation time bits. This provides sub-second precision. | ||
| 165 | * - 0x98 | ||
| 166 | - \_\_le32 | ||
| 167 | - i\_version\_hi | ||
| 168 | - Upper 32-bits for version number. | ||
| 169 | * - 0x9C | ||
| 170 | - \_\_le32 | ||
| 171 | - i\_projid | ||
| 172 | - Project ID. | ||
| 173 | |||
| 174 | .. _i_mode: | ||
| 175 | |||
| 176 | The ``i_mode`` value is a combination of the following flags: | ||
| 177 | |||
| 178 | .. list-table:: | ||
| 179 | :widths: 1 79 | ||
| 180 | :header-rows: 1 | ||
| 181 | |||
| 182 | * - Value | ||
| 183 | - Description | ||
| 184 | * - 0x1 | ||
| 185 | - S\_IXOTH (Others may execute) | ||
| 186 | * - 0x2 | ||
| 187 | - S\_IWOTH (Others may write) | ||
| 188 | * - 0x4 | ||
| 189 | - S\_IROTH (Others may read) | ||
| 190 | * - 0x8 | ||
| 191 | - S\_IXGRP (Group members may execute) | ||
| 192 | * - 0x10 | ||
| 193 | - S\_IWGRP (Group members may write) | ||
| 194 | * - 0x20 | ||
| 195 | - S\_IRGRP (Group members may read) | ||
| 196 | * - 0x40 | ||
| 197 | - S\_IXUSR (Owner may execute) | ||
| 198 | * - 0x80 | ||
| 199 | - S\_IWUSR (Owner may write) | ||
| 200 | * - 0x100 | ||
| 201 | - S\_IRUSR (Owner may read) | ||
| 202 | * - 0x200 | ||
| 203 | - S\_ISVTX (Sticky bit) | ||
| 204 | * - 0x400 | ||
| 205 | - S\_ISGID (Set GID) | ||
| 206 | * - 0x800 | ||
| 207 | - S\_ISUID (Set UID) | ||
| 208 | * - | ||
| 209 | - These are mutually-exclusive file types: | ||
| 210 | * - 0x1000 | ||
| 211 | - S\_IFIFO (FIFO) | ||
| 212 | * - 0x2000 | ||
| 213 | - S\_IFCHR (Character device) | ||
| 214 | * - 0x4000 | ||
| 215 | - S\_IFDIR (Directory) | ||
| 216 | * - 0x6000 | ||
| 217 | - S\_IFBLK (Block device) | ||
| 218 | * - 0x8000 | ||
| 219 | - S\_IFREG (Regular file) | ||
| 220 | * - 0xA000 | ||
| 221 | - S\_IFLNK (Symbolic link) | ||
| 222 | * - 0xC000 | ||
| 223 | - S\_IFSOCK (Socket) | ||
| 224 | |||
| 225 | .. _i_flags: | ||
| 226 | |||
| 227 | The ``i_flags`` field is a combination of these values: | ||
| 228 | |||
| 229 | .. list-table:: | ||
| 230 | :widths: 1 79 | ||
| 231 | :header-rows: 1 | ||
| 232 | |||
| 233 | * - Value | ||
| 234 | - Description | ||
| 235 | * - 0x1 | ||
| 236 | - This file requires secure deletion (EXT4\_SECRM\_FL). (not implemented) | ||
| 237 | * - 0x2 | ||
| 238 | - This file should be preserved, should undeletion be desired | ||
| 239 | (EXT4\_UNRM\_FL). (not implemented) | ||
| 240 | * - 0x4 | ||
| 241 | - File is compressed (EXT4\_COMPR\_FL). (not really implemented) | ||
| 242 | * - 0x8 | ||
| 243 | - All writes to the file must be synchronous (EXT4\_SYNC\_FL). | ||
| 244 | * - 0x10 | ||
| 245 | - File is immutable (EXT4\_IMMUTABLE\_FL). | ||
| 246 | * - 0x20 | ||
| 247 | - File can only be appended (EXT4\_APPEND\_FL). | ||
| 248 | * - 0x40 | ||
| 249 | - The dump(1) utility should not dump this file (EXT4\_NODUMP\_FL). | ||
| 250 | * - 0x80 | ||
| 251 | - Do not update access time (EXT4\_NOATIME\_FL). | ||
| 252 | * - 0x100 | ||
| 253 | - Dirty compressed file (EXT4\_DIRTY\_FL). (not used) | ||
| 254 | * - 0x200 | ||
| 255 | - File has one or more compressed clusters (EXT4\_COMPRBLK\_FL). (not used) | ||
| 256 | * - 0x400 | ||
| 257 | - Do not compress file (EXT4\_NOCOMPR\_FL). (not used) | ||
| 258 | * - 0x800 | ||
| 259 | - Encrypted inode (EXT4\_ENCRYPT\_FL). This bit value previously was | ||
| 260 | EXT4\_ECOMPR\_FL (compression error), which was never used. | ||
| 261 | * - 0x1000 | ||
| 262 | - Directory has hashed indexes (EXT4\_INDEX\_FL). | ||
| 263 | * - 0x2000 | ||
| 264 | - AFS magic directory (EXT4\_IMAGIC\_FL). | ||
| 265 | * - 0x4000 | ||
| 266 | - File data must always be written through the journal | ||
| 267 | (EXT4\_JOURNAL\_DATA\_FL). | ||
| 268 | * - 0x8000 | ||
| 269 | - File tail should not be merged (EXT4\_NOTAIL\_FL). (not used by ext4) | ||
| 270 | * - 0x10000 | ||
| 271 | - All directory entry data should be written synchronously (see | ||
| 272 | ``dirsync``) (EXT4\_DIRSYNC\_FL). | ||
| 273 | * - 0x20000 | ||
| 274 | - Top of directory hierarchy (EXT4\_TOPDIR\_FL). | ||
| 275 | * - 0x40000 | ||
| 276 | - This is a huge file (EXT4\_HUGE\_FILE\_FL). | ||
| 277 | * - 0x80000 | ||
| 278 | - Inode uses extents (EXT4\_EXTENTS\_FL). | ||
| 279 | * - 0x200000 | ||
| 280 | - Inode stores a large extended attribute value in its data blocks | ||
| 281 | (EXT4\_EA\_INODE\_FL). | ||
| 282 | * - 0x400000 | ||
| 283 | - This file has blocks allocated past EOF (EXT4\_EOFBLOCKS\_FL). | ||
| 284 | (deprecated) | ||
| 285 | * - 0x01000000 | ||
| 286 | - Inode is a snapshot (``EXT4_SNAPFILE_FL``). (not in mainline) | ||
| 287 | * - 0x04000000 | ||
| 288 | - Snapshot is being deleted (``EXT4_SNAPFILE_DELETED_FL``). (not in | ||
| 289 | mainline) | ||
| 290 | * - 0x08000000 | ||
| 291 | - Snapshot shrink has completed (``EXT4_SNAPFILE_SHRUNK_FL``). (not in | ||
| 292 | mainline) | ||
| 293 | * - 0x10000000 | ||
| 294 | - Inode has inline data (EXT4\_INLINE\_DATA\_FL). | ||
| 295 | * - 0x20000000 | ||
| 296 | - Create children with the same project ID (EXT4\_PROJINHERIT\_FL). | ||
| 297 | * - 0x80000000 | ||
| 298 | - Reserved for ext4 library (EXT4\_RESERVED\_FL). | ||
| 299 | * - | ||
| 300 | - Aggregate flags: | ||
| 301 | * - 0x4BDFFF | ||
| 302 | - User-visible flags. | ||
| 303 | * - 0x4B80FF | ||
| 304 | - User-modifiable flags. Note that while EXT4\_JOURNAL\_DATA\_FL and | ||
| 305 | EXT4\_EXTENTS\_FL can be set with setattr, they are not in the kernel's | ||
| 306 | EXT4\_FL\_USER\_MODIFIABLE mask, since it needs to handle the setting of | ||
| 307 | these flags in a special manner and they are masked out of the set of | ||
| 308 | flags that are saved directly to i\_flags. | ||
| 309 | |||
| 310 | .. _i_osd1: | ||
| 311 | |||
| 312 | The ``osd1`` field has multiple meanings depending on the creator: | ||
| 313 | |||
| 314 | Linux: | ||
| 315 | |||
| 316 | .. list-table:: | ||
| 317 | :widths: 1 1 1 77 | ||
| 318 | :header-rows: 1 | ||
| 319 | |||
| 320 | * - Offset | ||
| 321 | - Size | ||
| 322 | - Name | ||
| 323 | - Description | ||
| 324 | * - 0x0 | ||
| 325 | - \_\_le32 | ||
| 326 | - l\_i\_version | ||
| 327 | - Inode version. However, if the EA\_INODE inode flag is set, this inode | ||
| 328 | stores an extended attribute value and this field contains the upper 32 | ||
| 329 | bits of the attribute value's reference count. | ||
| 330 | |||
| 331 | Hurd: | ||
| 332 | |||
| 333 | .. list-table:: | ||
| 334 | :widths: 1 1 1 77 | ||
| 335 | :header-rows: 1 | ||
| 336 | |||
| 337 | * - Offset | ||
| 338 | - Size | ||
| 339 | - Name | ||
| 340 | - Description | ||
| 341 | * - 0x0 | ||
| 342 | - \_\_le32 | ||
| 343 | - h\_i\_translator | ||
| 344 | - ?? | ||
| 345 | |||
| 346 | Masix: | ||
| 347 | |||
| 348 | .. list-table:: | ||
| 349 | :widths: 1 1 1 77 | ||
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