Merge tag 'drm-misc-next-fixes-2023-08-24' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

Short summary of fixes pull: * gpuva: Cleanups * kunit: Documentation fixes * nouveau: * UAPI: Avoid implicit NO_PREFETCH flag * Scheduler fixes * Fix remap * ttm: Fix type conversion in tests Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 3 years ago

Commit bc609f42 parents 38f8873 cdf410010 files · +68 −19Browse files

Unified · Split

10 files

drivers/gpu/drm/drm_gpuva_mgr.c +4 −6
drivers/gpu/drm/nouveau/nouveau_dma.c +5 −2
drivers/gpu/drm/nouveau/nouveau_dma.h +6 −2
drivers/gpu/drm/nouveau/nouveau_exec.c +16 −3
drivers/gpu/drm/nouveau/nouveau_gem.c +4 −2
drivers/gpu/drm/nouveau/nouveau_sched.c +22 −0
drivers/gpu/drm/nouveau/nouveau_uvmm.c +1 −0
drivers/gpu/drm/tests/drm_kunit_helpers.c +1 −1
drivers/gpu/drm/ttm/tests/ttm_pool_test.c +2 −2
include/uapi/drm/nouveau_drm.h +7 −1

drivers/gpu/drm/drm_gpuva_mgr.c+4−6

 		   u64 req_addr, u64 req_range,
 		   struct drm_gem_object *req_obj, u64 req_offset)
 {
-	struct drm_gpuva *va, *next, *prev = NULL;
+	struct drm_gpuva *va, *next;
 	u64 req_end = req_addr + req_range;
 	int ret;
 				ret = op_unmap_cb(ops, priv, va, merge);
 				if (ret)
 					return ret;
-				goto next;
+				continue;
 			}
 			if (end > req_end) {
 				ret = op_remap_cb(ops, priv, &p, NULL, &u);
 				if (ret)
 					return ret;
-				goto next;
+				continue;
 			}
 			if (end > req_end) {
 				ret = op_unmap_cb(ops, priv, va, merge);
 				if (ret)
 					return ret;
-				goto next;
+				continue;
 			}
 			if (end > req_end) {
 				break;
 			}
 		}
-next:
-		prev = va;
 	}
 	return op_map_cb(ops, priv,

drivers/gpu/drm/nouveau/nouveau_dma.c+5−2

 }
 void
-nv50_dma_push(struct nouveau_channel *chan, u64 offset, int length)
+nv50_dma_push(struct nouveau_channel *chan, u64 offset, u32 length,
+	      bool no_prefetch)
 {
 	struct nvif_user *user = &chan->drm->client.device.user;
 	struct nouveau_bo *pb = chan->push.buffer;
 	int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base;
 	BUG_ON(chan->dma.ib_free < 1);
+	WARN_ON(length > NV50_DMA_PUSH_MAX_LENGTH);
 	nouveau_bo_wr32(pb, ip++, lower_32_bits(offset));
-	nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8);
+	nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8 |
+			(no_prefetch ? (1 << 31) : 0));
 	chan->dma.ib_put = (chan->dma.ib_put + 1) & chan->dma.ib_max;

drivers/gpu/drm/nouveau/nouveau_dma.h+6−2

 #include "nouveau_chan.h"
 int nouveau_dma_wait(struct nouveau_channel *, int slots, int size);
-void nv50_dma_push(struct nouveau_channel *, u64 addr, int length);
+void nv50_dma_push(struct nouveau_channel *, u64 addr, u32 length,
+		   bool no_prefetch);
 /*
  * There's a hw race condition where you can't jump to your PUT offset,
  */
 #define NOUVEAU_DMA_SKIPS (128 / 4)
+/* Maximum push buffer size. */
+#define NV50_DMA_PUSH_MAX_LENGTH 0x7fffff
 /* Object handles - for stuff that's doesn't use handle == oclass. */
 enum {
 	NvDmaFB		= 0x80000002,
 	if (chan->dma.ib_max) {
 		nv50_dma_push(chan, chan->push.addr + (chan->dma.put << 2),
-			      (chan->dma.cur - chan->dma.put) << 2);
+			      (chan->dma.cur - chan->dma.put) << 2, false);
 	} else {
 		WRITE_PUT(chan->dma.cur);
 	}

drivers/gpu/drm/nouveau/nouveau_exec.c+16−3

 	}
 	for (i = 0; i < exec_job->push.count; i++) {
-		nv50_dma_push(chan, exec_job->push.s[i].va,
+		struct drm_nouveau_exec_push *p = &exec_job->push.s[i];
-			      exec_job->push.s[i].va_len);
+		bool no_prefetch = p->flags & DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH;
+		nv50_dma_push(chan, p->va, p->va_len, no_prefetch);
 	}
 	ret = nouveau_fence_emit(fence, chan);
 {
 	struct nouveau_exec_job *job;
 	struct nouveau_job_args args = {};
-	int ret;
+	int i, ret;
+	for (i = 0; i < __args->push.count; i++) {
+		struct drm_nouveau_exec_push *p = &__args->push.s[i];
+		if (unlikely(p->va_len > NV50_DMA_PUSH_MAX_LENGTH)) {
+			NV_PRINTK(err, nouveau_cli(__args->file_priv),
+				  "pushbuf size exceeds limit: 0x%x max 0x%x\n",
+				  p->va_len, NV50_DMA_PUSH_MAX_LENGTH);
+			return -EINVAL;
+		}
+	}
 	job = *pjob = kzalloc(sizeof(*job), GFP_KERNEL);
 	if (!job)

drivers/gpu/drm/nouveau/nouveau_gem.c+4−2

 		for (i = 0; i < req->nr_push; i++) {
 			struct nouveau_vma *vma = (void *)(unsigned long)
 				bo[push[i].bo_index].user_priv;
+			u64 addr = vma->addr + push[i].offset;
+			u32 length = push[i].length & ~NOUVEAU_GEM_PUSHBUF_NO_PREFETCH;
+			bool no_prefetch = push[i].length & NOUVEAU_GEM_PUSHBUF_NO_PREFETCH;
-			nv50_dma_push(chan, vma->addr + push[i].offset,
+			nv50_dma_push(chan, addr, length, no_prefetch);
-				      push[i].length);
 		}
 	} else
 	if (drm->client.device.info.chipset >= 0x25) {

drivers/gpu/drm/nouveau/nouveau_sched.c+22−0

@@ -292,6 +292,28 @@ nouveau_job_submit(struct nouveau_job *job) · 291 unmodified lines
292	if (job->sync)	292	if (job->sync)
293	done_fence = dma_fence_get(job->done_fence);	293	done_fence = dma_fence_get(job->done_fence);
294		294
		295	/* If a sched job depends on a dma-fence from a job from the same GPU
		296	* scheduler instance, but a different scheduler entity, the GPU
		297	* scheduler does only wait for the particular job to be scheduled,
		298	* rather than for the job to fully complete. This is due to the GPU
		299	* scheduler assuming that there is a scheduler instance per ring.
		300	* However, the current implementation, in order to avoid arbitrary
		301	* amounts of kthreads, has a single scheduler instance while scheduler
		302	* entities represent rings.
		303	*
		304	* As a workaround, set the DRM_SCHED_FENCE_DONT_PIPELINE for all
		305	* out-fences in order to force the scheduler to wait for full job
		306	* completion for dependent jobs from different entities and same
		307	* scheduler instance.
		308	*
		309	* There is some work in progress [1] to address the issues of firmware
		310	* schedulers; once it is in-tree the scheduler topology in Nouveau
		311	* should be re-worked accordingly.
		312	*
		313	* [1] https://lore.kernel.org/dri-devel/20230801205103.627779-1-matthew.brost@intel.com/
		314	*/
		315	set_bit(DRM_SCHED_FENCE_DONT_PIPELINE, &job->done_fence->flags);
		316
295	if (job->ops->armed_submit)	317	if (job->ops->armed_submit)
296	job->ops->armed_submit(job);	318	job->ops->armed_submit(job);
297		319

drivers/gpu/drm/nouveau/nouveau_uvmm.c+1−0

@@ -639,6 +639,7 @@ nouveau_uvmm_sm_prepare(struct nouveau_uvmm *uvmm, · 638 unmodified lines
639	struct drm_gpuva *va = r->unmap->va;	639	struct drm_gpuva *va = r->unmap->va;
640	struct uvmm_map_args remap_args = {	640	struct uvmm_map_args remap_args = {
641	.kind = uvma_from_va(va)->kind,	641	.kind = uvma_from_va(va)->kind,
		642	.region = uvma_from_va(va)->region,
642	};	643	};
643	u64 ustart = va->va.addr;	644	u64 ustart = va->va.addr;
644	u64 urange = va->va.range;	645	u64 urange = va->va.range;

drivers/gpu/drm/tests/drm_kunit_helpers.c+1−1

@@ -156,7 +156,7 @@ static void action_drm_release_context(void *ptr) · 155 unmodified lines
156	}	156	}
157		157
158	/**	158	/**
159	* drm_kunit_helper_context_alloc - Allocates an acquire context	159	* drm_kunit_helper_acquire_ctx_alloc - Allocates an acquire context
160	* @test: The test context object	160	* @test: The test context object
161	*	161	*
162	* Allocates and initializes a modeset acquire context.	162	* Allocates and initializes a modeset acquire context.

drivers/gpu/drm/ttm/tests/ttm_pool_test.c+2−2

@@ -228,8 +228,8 @@ static void ttm_pool_alloc_basic_dma_addr(struct kunit *test) · 227 unmodified lines
228	dma1 = tt->dma_address[0];	228	dma1 = tt->dma_address[0];
229	dma2 = tt->dma_address[tt->num_pages - 1];	229	dma2 = tt->dma_address[tt->num_pages - 1];
230		230
231	KUNIT_ASSERT_NOT_NULL(test, (void *)dma1);	231	KUNIT_ASSERT_NOT_NULL(test, (void *)(uintptr_t)dma1);
232	KUNIT_ASSERT_NOT_NULL(test, (void *)dma2);	232	KUNIT_ASSERT_NOT_NULL(test, (void *)(uintptr_t)dma2);
233		233
234	ttm_pool_free(pool, tt);	234	ttm_pool_free(pool, tt);
235	ttm_tt_fini(tt);	235	ttm_tt_fini(tt);

include/uapi/drm/nouveau_drm.h+7−1

 	__u32 pad;
 	__u64 offset;
 	__u64 length;
+#define NOUVEAU_GEM_PUSHBUF_NO_PREFETCH (1 << 23)
 };
 struct drm_nouveau_gem_pushbuf {
 	/**
 	 * @va_len: the length of the push buffer mapping
 	 */
-	__u64 va_len;
+	__u32 va_len;
+	/**
+	 * @flags: the flags for this push buffer mapping
+	 */
+	__u32 flags;
+#define DRM_NOUVEAU_EXEC_PUSH_NO_PREFETCH 0x1
 };
 /**

Merge tag 'drm-misc-next-fixes-2023-08-24' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

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