Cross-merge bpf fixes after downstream PR (bpf-6.14-rc4). Minor conflict: kernel/bpf/btf.c Adjacent changes: kernel/bpf/arena.c kernel/bpf/btf.c kernel/bpf/syscall.c kernel/bpf/verifier.c mm/memory.c
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| @@ -411,13 +411,20 @@ struct drm_amdgpu_gem_userptr { · 410 unmodified lines | |||
| 411 | /* GFX12 and later: */ | 411 | /* GFX12 and later: */ |
| 412 | #define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT 0 | 412 | #define AMDGPU_TILING_GFX12_SWIZZLE_MODE_SHIFT 0 |
| 413 | #define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK 0x7 | 413 | #define AMDGPU_TILING_GFX12_SWIZZLE_MODE_MASK 0x7 |
| 414 | /* These are DCC recompression setting for memory management: */ | 414 | /* These are DCC recompression settings for memory management: */ |
| 415 | #define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3 | 415 | #define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3 |
| 416 | #define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */ | 416 | #define AMDGPU_TILING_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */ |
| 417 | #define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT 5 | 417 | #define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_SHIFT 5 |
| 418 | #define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK 0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */ | 418 | #define AMDGPU_TILING_GFX12_DCC_NUMBER_TYPE_MASK 0x7 /* CB_COLOR0_INFO.NUMBER_TYPE */ |
| 419 | #define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT 8 | 419 | #define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_SHIFT 8 |
| 420 | #define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK 0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */ | 420 | #define AMDGPU_TILING_GFX12_DCC_DATA_FORMAT_MASK 0x3f /* [0:4]:CB_COLOR0_INFO.FORMAT, [5]:MM */ |
| 421 | /* When clearing the buffer or moving it from VRAM to GTT, don't compress and set DCC metadata | ||
| 422 | * to uncompressed. Set when parts of an allocation bypass DCC and read raw data. */ | ||
| 423 | #define AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE_SHIFT 14 | ||
| 424 | #define AMDGPU_TILING_GFX12_DCC_WRITE_COMPRESS_DISABLE_MASK 0x1 | ||
| 425 | /* bit gap */ | ||
| 426 | #define AMDGPU_TILING_GFX12_SCANOUT_SHIFT 63 | ||
| 427 | #define AMDGPU_TILING_GFX12_SCANOUT_MASK 0x1 | ||
| 421 | 428 | ||
| 422 | /* Set/Get helpers for tiling flags. */ | 429 | /* Set/Get helpers for tiling flags. */ |
| 423 | #define AMDGPU_TILING_SET(field, value) \ | 430 | #define AMDGPU_TILING_SET(field, value) \ |
| @@ -682,6 +682,7 @@ enum ethtool_link_ext_substate_module { · 681 unmodified lines | |||
| 682 | * @ETH_SS_STATS_ETH_CTRL: names of IEEE 802.3 MAC Control statistics | 682 | * @ETH_SS_STATS_ETH_CTRL: names of IEEE 802.3 MAC Control statistics |
| 683 | * @ETH_SS_STATS_RMON: names of RMON statistics | 683 | * @ETH_SS_STATS_RMON: names of RMON statistics |
| 684 | * @ETH_SS_STATS_PHY: names of PHY(dev) statistics | 684 | * @ETH_SS_STATS_PHY: names of PHY(dev) statistics |
| 685 | * @ETH_SS_TS_FLAGS: hardware timestamping flags | ||
| 685 | * | 686 | * |
| 686 | * @ETH_SS_COUNT: number of defined string sets | 687 | * @ETH_SS_COUNT: number of defined string sets |
| 687 | */ | 688 | */ |
| @@ -708,6 +709,7 @@ enum ethtool_stringset { · 20 unmodified lines | |||
| 708 | ETH_SS_STATS_ETH_CTRL, | 709 | ETH_SS_STATS_ETH_CTRL, |
| 709 | ETH_SS_STATS_RMON, | 710 | ETH_SS_STATS_RMON, |
| 710 | ETH_SS_STATS_PHY, | 711 | ETH_SS_STATS_PHY, |
| 712 | ETH_SS_TS_FLAGS, | ||
| 711 | 713 | ||
| 712 | /* add new constants above here */ | 714 | /* add new constants above here */ |
| 713 | ETH_SS_COUNT | 715 | ETH_SS_COUNT |
| @@ -34,7 +34,7 @@ · 33 unmodified lines | |||
| 34 | */ | 34 | */ |
| 35 | 35 | ||
| 36 | 36 | ||
| 37 | #define TASKSTATS_VERSION 14 | 37 | #define TASKSTATS_VERSION 15 |
| 38 | #define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN | 38 | #define TS_COMM_LEN 32 /* should be >= TASK_COMM_LEN |
| 39 | * in linux/sched.h */ | 39 | * in linux/sched.h */ |
| 40 | 40 | ||
| @@ -30,7 +30,6 @@ enum thermal_genl_attr { · 29 unmodified lines | |||
| 30 | THERMAL_GENL_ATTR_TZ, | 30 | THERMAL_GENL_ATTR_TZ, |
| 31 | THERMAL_GENL_ATTR_TZ_ID, | 31 | THERMAL_GENL_ATTR_TZ_ID, |
| 32 | THERMAL_GENL_ATTR_TZ_TEMP, | 32 | THERMAL_GENL_ATTR_TZ_TEMP, |
| 33 | THERMAL_GENL_ATTR_TZ_PREV_TEMP, | ||
| 34 | THERMAL_GENL_ATTR_TZ_TRIP, | 33 | THERMAL_GENL_ATTR_TZ_TRIP, |
| 35 | THERMAL_GENL_ATTR_TZ_TRIP_ID, | 34 | THERMAL_GENL_ATTR_TZ_TRIP_ID, |
| 36 | THERMAL_GENL_ATTR_TZ_TRIP_TYPE, | 35 | THERMAL_GENL_ATTR_TZ_TRIP_TYPE, |
| @@ -54,6 +53,7 @@ enum thermal_genl_attr { · 17 unmodified lines | |||
| 54 | THERMAL_GENL_ATTR_THRESHOLD, | 53 | THERMAL_GENL_ATTR_THRESHOLD, |
| 55 | THERMAL_GENL_ATTR_THRESHOLD_TEMP, | 54 | THERMAL_GENL_ATTR_THRESHOLD_TEMP, |
| 56 | THERMAL_GENL_ATTR_THRESHOLD_DIRECTION, | 55 | THERMAL_GENL_ATTR_THRESHOLD_DIRECTION, |
| 56 | THERMAL_GENL_ATTR_TZ_PREV_TEMP, | ||
| 57 | __THERMAL_GENL_ATTR_MAX, | 57 | __THERMAL_GENL_ATTR_MAX, |
| 58 | }; | 58 | }; |
| 59 | #define THERMAL_GENL_ATTR_MAX (__THERMAL_GENL_ATTR_MAX - 1) | 59 | #define THERMAL_GENL_ATTR_MAX (__THERMAL_GENL_ATTR_MAX - 1) |
| @@ -25,7 +25,7 @@ struct virtio_snd_config { · 24 unmodified lines | |||
| 25 | __le32 streams; | 25 | __le32 streams; |
| 26 | /* # of available channel maps */ | 26 | /* # of available channel maps */ |
| 27 | __le32 chmaps; | 27 | __le32 chmaps; |
| 28 | /* # of available control elements */ | 28 | /* # of available control elements (if VIRTIO_SND_F_CTLS) */ |
| 29 | __le32 controls; | 29 | __le32 controls; |
| 30 | }; | 30 | }; |
| 31 | 31 | ||