The downstream implementation of ahci_brcm.c did contain clock management recovery, but until recently, did that outside of the libahci_platform helpers and this was unintentionally stripped out while forward porting the patch upstream. Add the missing clock management during recovery and sleep for 10 milliseconds per the design team recommendations to ensure the SATA PHY controller and AFE have been fully quiesced.
Unified · Split
| @@ -274,6 +274,13 @@ static unsigned int brcm_ahci_read_id(struct ata_device *dev, · 273 unmodified lines | ||
| 274 | 274 | /* Perform the SATA PHY reset sequence */ |
| 275 | 275 | brcm_sata_phy_disable(priv, ap->port_no); |
| 276 | 276 | |
| 277 | + /* Reset the SATA clock */ | |
| 278 | + ahci_platform_disable_clks(hpriv); | |
| 279 | + msleep(10); | |
| 280 | + | |
| 281 | + ahci_platform_enable_clks(hpriv); | |
| 282 | + msleep(10); | |
| 283 | + | |
| 277 | 284 | /* Bring the PHY back on */ |
| 278 | 285 | brcm_sata_phy_enable(priv, ap->port_no); |
| 279 | 286 | |