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drm/i915: Expand I915_PARAM_HAS_SCHEDULER into a capability bitmask

In the next few patches, we wish to enable different features for the scheduler, some which may subtlety change ABI (e.g. allow requests to be reordered under different circumstances). So we need to make sure userspace is cognizant of the changes (if they care), by which we employ the usual method of a GETPARAM. We already have an I915_PARAM_HAS_SCHEDULER (which notes the existing ability to reorder requests to avoid bubbles), and now we wish to extend that to be a bitmask to describe the different capabilities implemented.

Chris Wilson committed 9 years ago

Commit bf64e0b1 parent 1f181222 files · +11 −3Browse files

Unified · Split

2 files
  1. drivers/gpu/drm/i915/i915_drv.c +3 −2
  2. include/uapi/drm/i915_drm.h +8 −1
drivers/gpu/drm/i915/i915_drv.c+3−2
@@ -367,8 +367,9 @@ static int i915_getparam(struct drm_device *dev, void *data, · 366 unmodified lines
367367 value = i915_gem_mmap_gtt_version();
368368 break;
369369 case I915_PARAM_HAS_SCHEDULER:
370− value = dev_priv->engine[RCS] &&
371− dev_priv->engine[RCS]->schedule;
370+ value = 0;
371+ if (dev_priv->engine[RCS] && dev_priv->engine[RCS]->schedule)
372+ value |= I915_SCHEDULER_CAP_ENABLED;
372373 break;
373374 case I915_PARAM_MMAP_VERSION:
374375 /* Remember to bump this if the version changes! */
include/uapi/drm/i915_drm.h+8−1
@@ -397,10 +397,17 @@ typedef struct drm_i915_irq_wait { · 396 unmodified lines
397397 #define I915_PARAM_MIN_EU_IN_POOL 39
398398 #define I915_PARAM_MMAP_GTT_VERSION 40
399399
400−/* Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
400+/*
401+ * Query whether DRM_I915_GEM_EXECBUFFER2 supports user defined execution
401402 * priorities and the driver will attempt to execute batches in priority order.
403+ * The param returns a capability bitmask, nonzero implies that the scheduler
404+ * is enabled, with different features present according to the mask.
402405 */
403406 #define I915_PARAM_HAS_SCHEDULER 41
407+#define I915_SCHEDULER_CAP_ENABLED (1ul << 0)
408+#define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
409+#define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
410+
404411 #define I915_PARAM_HUC_STATUS 42
405412
406413 /* Query whether DRM_I915_GEM_EXECBUFFER2 supports the ability to opt-out of

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