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powerpc/dma: Fallback to dma_ops when persistent memory present

So far we have been using huge DMA windows to map all the RAM available. The RAM is normally mapped to the VM address space contiguously, and there is always a reasonable upper limit for possible future hot plugged RAM which makes it easy to map all RAM via IOMMU. Now there is persistent memory ("ibm,pmemory" in the FDT) which (unlike normal RAM) can map anywhere in the VM space beyond the maximum RAM size and since it can be used for DMA, it requires extending the huge window up to MAX_PHYSMEM_BITS which requires hypervisor support for: 1. huge TCE tables; 2. multilevel TCE tables; 3. huge IOMMU pages. Certain hypervisors cannot do either so the only option left is restricting the huge DMA window to include only RAM and fallback to the default DMA window for persistent memory. This defines arch_dma_map_direct/etc to allow generic DMA code perform additional checks on whether direct DMA is still possible. This checks if the system has persistent memory. If it does not, the DMA bypass mode is selected, i.e. * dev->bus_dma_limit = 0 * dev->dma_ops_bypass = true <- this avoid calling dma_ops for mapping. If there is such memory, this creates identity mapping only for RAM and sets the dev->bus_dma_limit to let the generic code decide whether to call into the direct DMA or the indirect DMA ops. This should not change the existing behaviour when no persistent memory as dev->dma_ops_bypass is expected to be set.

Alexey Kardashevskiy committed 6 years ago

Commit bf6e2d51 parent 8d8d53c3 files · +111 −12Browse files

Unified · Split

3 files
  1. arch/powerpc/Kconfig +1 −0
  2. arch/powerpc/kernel/dma-iommu.c +69 −2
  3. arch/powerpc/platforms/pseries/iommu.c +41 −10
arch/powerpc/Kconfig+1−0
@@ -159,6 +159,7 @@ config PPC · 158 unmodified lines
159 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN159 select DCACHE_WORD_ACCESS if PPC64 && CPU_LITTLE_ENDIAN
160 select DMA_OPS if PPC64160 select DMA_OPS if PPC64
161 select DMA_OPS_BYPASS if PPC64161 select DMA_OPS_BYPASS if PPC64
162 select ARCH_HAS_DMA_MAP_DIRECT if PPC64 && PPC_PSERIES
162 select DYNAMIC_FTRACE if FUNCTION_TRACER163 select DYNAMIC_FTRACE if FUNCTION_TRACER
163 select EDAC_ATOMIC_SCRUB164 select EDAC_ATOMIC_SCRUB
164 select EDAC_SUPPORT165 select EDAC_SUPPORT
arch/powerpc/kernel/dma-iommu.c+69−2
@@ -10,6 +10,63 @@ · 9 unmodified lines
10#include <linux/pci.h>10#include <linux/pci.h>
11#include <asm/iommu.h>11#include <asm/iommu.h>
12 12
13#ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT
14#define can_map_direct(dev, addr) \
15 ((dev)->bus_dma_limit >= phys_to_dma((dev), (addr)))
16
17bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr)
18{
19 if (likely(!dev->bus_dma_limit))
20 return false;
21
22 return can_map_direct(dev, addr);
23}
24
25#define is_direct_handle(dev, h) ((h) >= (dev)->archdata.dma_offset)
26
27bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle)
28{
29 if (likely(!dev->bus_dma_limit))
30 return false;
31
32 return is_direct_handle(dev, dma_handle);
33}
34
35bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg,
36 int nents)
37{
38 struct scatterlist *s;
39 int i;
40
41 if (likely(!dev->bus_dma_limit))
42 return false;
43
44 for_each_sg(sg, s, nents, i) {
45 if (!can_map_direct(dev, sg_phys(s) + s->offset + s->length))
46 return false;
47 }
48
49 return true;
50}
51
52bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg,
53 int nents)
54{
55 struct scatterlist *s;
56 int i;
57
58 if (likely(!dev->bus_dma_limit))
59 return false;
60
61 for_each_sg(sg, s, nents, i) {
62 if (!is_direct_handle(dev, s->dma_address + s->length))
63 return false;
64 }
65
66 return true;
67}
68#endif /* CONFIG_ARCH_HAS_DMA_MAP_DIRECT */
69
13/*70/*
14 * Generic iommu implementation71 * Generic iommu implementation
15 */72 */
@@ -90,8 +147,18 @@ int dma_iommu_dma_supported(struct device *dev, u64 mask) · 74 unmodified lines
90 struct iommu_table *tbl = get_iommu_table_base(dev);147 struct iommu_table *tbl = get_iommu_table_base(dev);
91 148
92 if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {149 if (dev_is_pci(dev) && dma_iommu_bypass_supported(dev, mask)) {
93 dev->dma_ops_bypass = true;150 /*
94 dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");151 * dma_iommu_bypass_supported() sets dma_max when there is
152 * 1:1 mapping but it is somehow limited.
153 * ibm,pmemory is one example.
154 */
155 dev->dma_ops_bypass = dev->bus_dma_limit == 0;
156 if (!dev->dma_ops_bypass)
157 dev_warn(dev,
158 "iommu: 64-bit OK but direct DMA is limited by %llx\n",
159 dev->bus_dma_limit);
160 else
161 dev_dbg(dev, "iommu: 64-bit OK, using fixed ops\n");
95 return 1;162 return 1;
96 }163 }
97 164
arch/powerpc/platforms/pseries/iommu.c+41−10
@@ -839,7 +839,7 @@ static void remove_ddw(struct device_node *np, bool remove_prop) · 838 unmodified lines
839 np, ret);839 np, ret);
840}840}
841 841
842static u64 find_existing_ddw(struct device_node *pdn)842static u64 find_existing_ddw(struct device_node *pdn, int *window_shift)
843{843{
844 struct direct_window *window;844 struct direct_window *window;
845 const struct dynamic_dma_window_prop *direct64;845 const struct dynamic_dma_window_prop *direct64;
@@ -851,6 +851,7 @@ static u64 find_existing_ddw(struct device_node *pdn) · 5 unmodified lines
851 if (window->device == pdn) {851 if (window->device == pdn) {
852 direct64 = window->prop;852 direct64 = window->prop;
853 dma_addr = be64_to_cpu(direct64->dma_base);853 dma_addr = be64_to_cpu(direct64->dma_base);
854 *window_shift = be32_to_cpu(direct64->window_shift);
854 break;855 break;
855 }856 }
856 }857 }
@@ -1111,11 +1112,12 @@ static void reset_dma_window(struct pci_dev *dev, struct device_node *par_dn) · 254 unmodified lines
1111 */1112 */
1112static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)1113static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
1113{1114{
1114 int len, ret;1115 int len = 0, ret;
1116 int max_ram_len = order_base_2(ddw_memory_hotplug_max());
1115 struct ddw_query_response query;1117 struct ddw_query_response query;
1116 struct ddw_create_response create;1118 struct ddw_create_response create;
1117 int page_shift;1119 int page_shift;
1118 u64 dma_addr, max_addr;1120 u64 dma_addr;
1119 struct device_node *dn;1121 struct device_node *dn;
1120 u32 ddw_avail[DDW_APPLICABLE_SIZE];1122 u32 ddw_avail[DDW_APPLICABLE_SIZE];
1121 struct direct_window *window;1123 struct direct_window *window;
@@ -1123,10 +1125,15 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn) · 1 unmodified line
1123 struct dynamic_dma_window_prop *ddwprop;1125 struct dynamic_dma_window_prop *ddwprop;
1124 struct failed_ddw_pdn *fpdn;1126 struct failed_ddw_pdn *fpdn;
1125 bool default_win_removed = false;1127 bool default_win_removed = false;
1128 bool pmem_present;
1129
1130 dn = of_find_node_by_type(NULL, "ibm,pmemory");
1131 pmem_present = dn != NULL;
1132 of_node_put(dn);
1126 1133
1127 mutex_lock(&direct_window_init_mutex);1134 mutex_lock(&direct_window_init_mutex);
1128 1135
1129 dma_addr = find_existing_ddw(pdn);1136 dma_addr = find_existing_ddw(pdn, &len);
1130 if (dma_addr != 0)1137 if (dma_addr != 0)
1131 goto out_unlock;1138 goto out_unlock;
1132 1139
@@ -1212,14 +1219,29 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn) · 79 unmodified lines
1212 }1219 }
1213 /* verify the window * number of ptes will map the partition */1220 /* verify the window * number of ptes will map the partition */
1214 /* check largest block * page size > max memory hotplug addr */1221 /* check largest block * page size > max memory hotplug addr */
1215 max_addr = ddw_memory_hotplug_max();1222 /*
1216 if (query.largest_available_block < (max_addr >> page_shift)) {1223 * The "ibm,pmemory" can appear anywhere in the address space.
1217 dev_dbg(&dev->dev, "can't map partition max 0x%llx with %llu "1224 * Assuming it is still backed by page structs, try MAX_PHYSMEM_BITS
1218 "%llu-sized pages\n", max_addr, query.largest_available_block,1225 * for the upper limit and fallback to max RAM otherwise but this
1219 1ULL << page_shift);1226 * disables device::dma_ops_bypass.
1227 */
1228 len = max_ram_len;
1229 if (pmem_present) {
1230 if (query.largest_available_block >=
1231 (1ULL << (MAX_PHYSMEM_BITS - page_shift)))
1232 len = MAX_PHYSMEM_BITS - page_shift;
1233 else
1234 dev_info(&dev->dev, "Skipping ibm,pmemory");
1235 }
1236
1237 if (query.largest_available_block < (1ULL << (len - page_shift))) {
1238 dev_dbg(&dev->dev,
1239 "can't map partition max 0x%llx with %llu %llu-sized pages\n",
1240 1ULL << len,
1241 query.largest_available_block,
1242 1ULL << page_shift);
1220 goto out_failed;1243 goto out_failed;
1221 }1244 }
1222 len = order_base_2(max_addr);
1223 win64 = kzalloc(sizeof(struct property), GFP_KERNEL);1245 win64 = kzalloc(sizeof(struct property), GFP_KERNEL);
1224 if (!win64) {1246 if (!win64) {
1225 dev_info(&dev->dev,1247 dev_info(&dev->dev,
@@ -1299,6 +1321,15 @@ out_failed: · 73 unmodified lines
1299 1321
1300out_unlock:1322out_unlock:
1301 mutex_unlock(&direct_window_init_mutex);1323 mutex_unlock(&direct_window_init_mutex);
1324
1325 /*
1326 * If we have persistent memory and the window size is only as big
1327 * as RAM, then we failed to create a window to cover persistent
1328 * memory and need to set the DMA limit.
1329 */
1330 if (pmem_present && dma_addr && (len == max_ram_len))
1331 dev->dev.bus_dma_limit = dma_addr + (1ULL << len);
1332
1302 return dma_addr;1333 return dma_addr;
1303}1334}
1304 1335

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