Expose whether or not we support the PMU software tracking in our scheduler capabilities, so userspace can query at runtime. v2: Use I915_SCHEDULER_CAP_ENGINE_BUSY_STATS for a less ambiguous capability name.
Unified · Split
| @@ -688,9 +688,10 @@ void intel_engines_set_scheduler_caps(struct drm_i915_private *i915) · 687 unmodified lines | ||
| 688 | 688 | u8 engine; |
| 689 | 689 | u8 sched; |
| 690 | 690 | } map[] = { |
| 691 | −#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) } | |
| 692 | − MAP(PREEMPTION, PREEMPTION), | |
| 693 | − MAP(SEMAPHORES, SEMAPHORES), | |
| 691 | +#define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) } | |
| 692 | + MAP(HAS_PREEMPTION, PREEMPTION), | |
| 693 | + MAP(HAS_SEMAPHORES, SEMAPHORES), | |
| 694 | + MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS), | |
| 694 | 695 | #undef MAP |
| 695 | 696 | }; |
| 696 | 697 | struct intel_engine_cs *engine; |
| @@ -102,10 +102,8 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active) · 101 unmodified lines | ||
| 102 | 102 | /* |
| 103 | 103 | * Also there is software busyness tracking available we do not |
| 104 | 104 | * need the timer for I915_SAMPLE_BUSY counter. |
| 105 | − * | |
| 106 | − * Use RCS as proxy for all engines. | |
| 107 | 105 | */ |
| 108 | − else if (intel_engine_supports_stats(i915->engine[RCS0])) | |
| 106 | + else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) | |
| 109 | 107 | enable &= ~BIT(I915_SAMPLE_BUSY); |
| 110 | 108 | |
| 111 | 109 | /* |
| @@ -521,6 +521,7 @@ typedef struct drm_i915_irq_wait { · 520 unmodified lines | ||
| 521 | 521 | #define I915_SCHEDULER_CAP_PRIORITY (1ul << 1) |
| 522 | 522 | #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2) |
| 523 | 523 | #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3) |
| 524 | +#define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4) | |
| 524 | 525 | |
| 525 | 526 | #define I915_PARAM_HUC_STATUS 42 |
| 526 | 527 | |