| @@ -10,6 +10,8 @@ · 9 unmodified lines |
| 10 | 10 | #ifndef __HDA_TPLG_INTERFACE_H__ |
| 11 | 11 | #define __HDA_TPLG_INTERFACE_H__ |
| 12 | 12 | |
| 13 | +#include <linux/types.h> |
| 14 | + |
| 13 | 15 | /* |
| 14 | 16 | * Default types range from 0~12. type can range from 0 to 0xff |
| 15 | 17 | * SST types start at higher to avoid any overlapping in future |
| @@ -143,10 +145,10 @@ enum skl_module_param_type { · 127 unmodified lines |
| 143 | 145 | }; |
| 144 | 146 | |
| 145 | 147 | struct skl_dfw_algo_data { |
| 146 | | − u32 set_params:2; |
| 147 | | − u32 rsvd:30; |
| 148 | | − u32 param_id; |
| 149 | | − u32 max; |
| 148 | + __u32 set_params:2; |
| 149 | + __u32 rsvd:30; |
| 150 | + __u32 param_id; |
| 151 | + __u32 max; |
| 150 | 152 | char params[0]; |
| 151 | 153 | } __packed; |
| 152 | 154 | |
| @@ -163,68 +165,68 @@ enum skl_tuple_type { · 10 unmodified lines |
| 163 | 165 | /* v4 configuration data */ |
| 164 | 166 | |
| 165 | 167 | struct skl_dfw_v4_module_pin { |
| 166 | | − u16 module_id; |
| 167 | | − u16 instance_id; |
| 168 | + __u16 module_id; |
| 169 | + __u16 instance_id; |
| 168 | 170 | } __packed; |
| 169 | 171 | |
| 170 | 172 | struct skl_dfw_v4_module_fmt { |
| 171 | | − u32 channels; |
| 172 | | − u32 freq; |
| 173 | | − u32 bit_depth; |
| 174 | | − u32 valid_bit_depth; |
| 175 | | − u32 ch_cfg; |
| 176 | | − u32 interleaving_style; |
| 177 | | − u32 sample_type; |
| 178 | | − u32 ch_map; |
| 173 | + __u32 channels; |
| 174 | + __u32 freq; |
| 175 | + __u32 bit_depth; |
| 176 | + __u32 valid_bit_depth; |
| 177 | + __u32 ch_cfg; |
| 178 | + __u32 interleaving_style; |
| 179 | + __u32 sample_type; |
| 180 | + __u32 ch_map; |
| 179 | 181 | } __packed; |
| 180 | 182 | |
| 181 | 183 | struct skl_dfw_v4_module_caps { |
| 182 | | − u32 set_params:2; |
| 183 | | − u32 rsvd:30; |
| 184 | | − u32 param_id; |
| 185 | | − u32 caps_size; |
| 186 | | − u32 caps[HDA_SST_CFG_MAX]; |
| 184 | + __u32 set_params:2; |
| 185 | + __u32 rsvd:30; |
| 186 | + __u32 param_id; |
| 187 | + __u32 caps_size; |
| 188 | + __u32 caps[HDA_SST_CFG_MAX]; |
| 187 | 189 | } __packed; |
| 188 | 190 | |
| 189 | 191 | struct skl_dfw_v4_pipe { |
| 190 | | − u8 pipe_id; |
| 191 | | − u8 pipe_priority; |
| 192 | | − u16 conn_type:4; |
| 193 | | − u16 rsvd:4; |
| 194 | | − u16 memory_pages:8; |
| 192 | + __u8 pipe_id; |
| 193 | + __u8 pipe_priority; |
| 194 | + __u16 conn_type:4; |
| 195 | + __u16 rsvd:4; |
| 196 | + __u16 memory_pages:8; |
| 195 | 197 | } __packed; |
| 196 | 198 | |
| 197 | 199 | struct skl_dfw_v4_module { |
| 198 | 200 | char uuid[SKL_UUID_STR_SZ]; |
| 199 | 201 | |
| 200 | | − u16 module_id; |
| 201 | | − u16 instance_id; |
| 202 | | − u32 max_mcps; |
| 203 | | − u32 mem_pages; |
| 204 | | − u32 obs; |
| 205 | | − u32 ibs; |
| 206 | | − u32 vbus_id; |
| 207 | | − |
| 208 | | − u32 max_in_queue:8; |
| 209 | | − u32 max_out_queue:8; |
| 210 | | − u32 time_slot:8; |
| 211 | | − u32 core_id:4; |
| 212 | | − u32 rsvd1:4; |
| 213 | | − |
| 214 | | − u32 module_type:8; |
| 215 | | − u32 conn_type:4; |
| 216 | | − u32 dev_type:4; |
| 217 | | − u32 hw_conn_type:4; |
| 218 | | − u32 rsvd2:12; |
| 219 | | − |
| 220 | | − u32 params_fixup:8; |
| 221 | | − u32 converter:8; |
| 222 | | − u32 input_pin_type:1; |
| 223 | | − u32 output_pin_type:1; |
| 224 | | − u32 is_dynamic_in_pin:1; |
| 225 | | − u32 is_dynamic_out_pin:1; |
| 226 | | − u32 is_loadable:1; |
| 227 | | − u32 rsvd3:11; |
| 202 | + __u16 module_id; |
| 203 | + __u16 instance_id; |
| 204 | + __u32 max_mcps; |
| 205 | + __u32 mem_pages; |
| 206 | + __u32 obs; |
| 207 | + __u32 ibs; |
| 208 | + __u32 vbus_id; |
| 209 | + |
| 210 | + __u32 max_in_queue:8; |
| 211 | + __u32 max_out_queue:8; |
| 212 | + __u32 time_slot:8; |
| 213 | + __u32 core_id:4; |
| 214 | + __u32 rsvd1:4; |
| 215 | + |
| 216 | + __u32 module_type:8; |
| 217 | + __u32 conn_type:4; |
| 218 | + __u32 dev_type:4; |
| 219 | + __u32 hw_conn_type:4; |
| 220 | + __u32 rsvd2:12; |
| 221 | + |
| 222 | + __u32 params_fixup:8; |
| 223 | + __u32 converter:8; |
| 224 | + __u32 input_pin_type:1; |
| 225 | + __u32 output_pin_type:1; |
| 226 | + __u32 is_dynamic_in_pin:1; |
| 227 | + __u32 is_dynamic_out_pin:1; |
| 228 | + __u32 is_loadable:1; |
| 229 | + __u32 rsvd3:11; |
| 228 | 230 | |
| 229 | 231 | struct skl_dfw_v4_pipe pipe; |
| 230 | 232 | struct skl_dfw_v4_module_fmt in_fmt[MAX_IN_QUEUE]; |