lael-labs/linux

Documentation/ABI/stable/sysfs-devices-system-xen_memory+9−0

@@ -75,3 +75,12 @@ Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> · 74 unmodified lines
75	Description:	75	Description:
76	Amount (in KiB) of low (or normal) memory in the	76	Amount (in KiB) of low (or normal) memory in the
77	balloon.	77	balloon.
		78
		79	What: /sys/devices/system/xen_memory/xen_memory0/scrub_pages
		80	Date: September 2018
		81	KernelVersion: 4.20
		82	Contact: xen-devel@lists.xenproject.org
		83	Description:
		84	Control scrubbing pages before returning them to Xen for others domains
		85	use. Can be set with xen_scrub_pages cmdline
		86	parameter. Default value controlled with CONFIG_XEN_SCRUB_PAGES_DEFAULT.

Documentation/admin-guide/kernel-parameters.txt+12−0

 	ramdisk_size=	[RAM] Sizes of RAM disks in kilobytes
 			See Documentation/blockdev/ramdisk.txt.
+	random.trust_cpu={on,off}
+			[KNL] Enable or disable trusting the use of the
+			CPU's random number generator (if available) to
+			fully seed the kernel's CRNG. Default is controlled
+			by CONFIG_RANDOM_TRUST_CPU.
 	ras=option[,option,...]	[KNL] RAS-specific options
 		cec_disable	[X86]
 			Disables the PV optimizations forcing the HVM guest to
 			run as generic HVM guest with no PV drivers.
+	xen_scrub_pages=	[XEN]
+			Boolean option to control scrubbing pages before giving them back
+			to Xen, for use by other domains. Can be also changed at runtime
+			with /sys/devices/system/xen_memory/xen_memory0/scrub_pages.
+			Default value controlled with CONFIG_XEN_SCRUB_PAGES_DEFAULT.
 	xirc2ps_cs=	[NET,PCMCIA]
 			Format:
 			<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]

Documentation/device-mapper/dm-raid.txt+4−0

@@ -348,3 +348,7 @@ Version History · 347 unmodified lines
348	1.13.1 Fix deadlock caused by early md_stop_writes(). Also fix size an	348	1.13.1 Fix deadlock caused by early md_stop_writes(). Also fix size an
349	state races.	349	state races.
350	1.13.2 Fix raid redundancy validation and avoid keeping raid set frozen	350	1.13.2 Fix raid redundancy validation and avoid keeping raid set frozen
		351	1.14.0 Fix reshape race on small devices. Fix stripe adding reshape
		352	deadlock/potential data corruption. Update superblock when
		353	specific devices are requested via rebuild. Fix RAID leg
		354	rebuild errors.

Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt+1−2

 Required properties:
 - compatible :
   - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
-  - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc
 - reg : address and length of the lpi2c master registers
 - interrupts : lpi2c interrupt
 - clocks : lpi2c clock specifier
 Examples:
 lpi2c7: lpi2c7@40a50000 {
-	compatible = "fsl,imx8dv-lpi2c";
+	compatible = "fsl,imx7ulp-lpi2c";
 	reg = <0x40A50000 0x10000>;
 	interrupt-parent = <&intc>;
 	interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/input/gpio-keys.txt+1−1

@@ -1,4 +1,4 @@
1	Device-Tree bindings for input/gpio_keys.c keyboard driver	1	Device-Tree bindings for input/keyboard/gpio_keys.c keyboard driver
2		2
3	Required properties:	3	Required properties:
4	- compatible = "gpio-keys";	4	- compatible = "gpio-keys";

Documentation/devicetree/bindings/net/macb.txt+1−0

@@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines
10	Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on	10	Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
11	the Cadence GEM, or the generic form: "cdns,gem".	11	the Cadence GEM, or the generic form: "cdns,gem".
12	Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.	12	Use "atmel,sama5d2-gem" for the GEM IP (10/100) available on Atmel sama5d2 SoCs.
		13	Use "atmel,sama5d3-macb" for the 10/100Mbit IP available on Atmel sama5d3 SoCs.
13	Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.	14	Use "atmel,sama5d3-gem" for the Gigabit IP available on Atmel sama5d3 SoCs.
14	Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.	15	Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs.
15	Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.	16	Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.

Documentation/filesystems/vfs.txt+19−2

 ----------------------
 This describes how the VFS can manipulate an open file. As of kernel
-4.1, the following members are defined:
+4.18, the following members are defined:
 struct file_operations {
 	struct module *owner;
 	ssize_t (*read_iter) (struct kiocb *, struct iov_iter *);
 	ssize_t (*write_iter) (struct kiocb *, struct iov_iter *);
 	int (*iterate) (struct file *, struct dir_context *);
+	int (*iterate_shared) (struct file *, struct dir_context *);
 	__poll_t (*poll) (struct file *, struct poll_table_struct *);
 	long (*unlocked_ioctl) (struct file *, unsigned int, unsigned long);
 	long (*compat_ioctl) (struct file *, unsigned int, unsigned long);
 	int (*mmap) (struct file *, struct vm_area_struct *);
-	int (*mremap)(struct file *, struct vm_area_struct *);
 	int (*open) (struct inode *, struct file *);
 	int (*flush) (struct file *, fl_owner_t id);
 	int (*release) (struct inode *, struct file *);
 #ifndef CONFIG_MMU
 	unsigned (*mmap_capabilities)(struct file *);
 #endif
+	ssize_t (*copy_file_range)(struct file *, loff_t, struct file *, loff_t, size_t, unsigned int);
+	int (*clone_file_range)(struct file *, loff_t, struct file *, loff_t, u64);
+	int (*dedupe_file_range)(struct file *, loff_t, struct file *, loff_t, u64);
+	int (*fadvise)(struct file *, loff_t, loff_t, int);
 };
 Again, all methods are called without any locks being held, unless
   iterate: called when the VFS needs to read the directory contents
+  iterate_shared: called when the VFS needs to read the directory contents
+	when filesystem supports concurrent dir iterators
   poll: called by the VFS when a process wants to check if there is
 	activity on this file and (optionally) go to sleep until there
 	is activity. Called by the select(2) and poll(2) system calls
   fallocate: called by the VFS to preallocate blocks or punch a hole.
+  copy_file_range: called by the copy_file_range(2) system call.
+  clone_file_range: called by the ioctl(2) system call for FICLONERANGE and
+	FICLONE commands.
+  dedupe_file_range: called by the ioctl(2) system call for FIDEDUPERANGE
+	command.
+  fadvise: possibly called by the fadvise64() system call.
 Note that the file operations are implemented by the specific
 filesystem in which the inode resides. When opening a device node
 (character or block special) most filesystems will call special

Documentation/media/uapi/dvb/video_function_calls.rst+0−1

@@ -33,4 +33,3 @@ Video Function Calls · 32 unmodified lines
33	video-clear-buffer	33	video-clear-buffer
34	video-set-streamtype	34	video-set-streamtype
35	video-set-format	35	video-set-format
36	video-set-attributes

Documentation/process/changes.rst+1−1

@@ -86,7 +86,7 @@ pkg-config · 85 unmodified lines
86		86
87	The build system, as of 4.18, requires pkg-config to check for installed	87	The build system, as of 4.18, requires pkg-config to check for installed
88	kconfig tools and to determine flags settings for use in	88	kconfig tools and to determine flags settings for use in
89	'make {menu,n,g,x}config'. Previously pkg-config was being used but not	89	'make {g,x}config'. Previously pkg-config was being used but not
90	verified or documented.	90	verified or documented.
91		91
92	Flex	92	Flex

Documentation/process/code-of-conduct.rst+81−0

@@ -0,0 +1,81 @@
	1	Contributor Covenant Code of Conduct
	2	++++++++++++++++++++++++++++++++++++
	3
	4	Our Pledge
	5	==========
	6
	7	In the interest of fostering an open and welcoming environment, we as
	8	contributors and maintainers pledge to making participation in our project and
	9	our community a harassment-free experience for everyone, regardless of age, body
	10	size, disability, ethnicity, sex characteristics, gender identity and
	11	expression, level of experience, education, socio-economic status, nationality,
	12	personal appearance, race, religion, or sexual identity and orientation.
	13
	14	Our Standards
	15	=============
	16
	17	Examples of behavior that contributes to creating a positive environment
	18	include:
	19
	20	* Using welcoming and inclusive language
	21	* Being respectful of differing viewpoints and experiences
	22	* Gracefully accepting constructive criticism
	23	* Focusing on what is best for the community
	24	* Showing empathy towards other community members
	25
	26
	27	Examples of unacceptable behavior by participants include:
	28
	29	* The use of sexualized language or imagery and unwelcome sexual attention or
	30	advances
	31	* Trolling, insulting/derogatory comments, and personal or political attacks
	32	* Public or private harassment
	33	* Publishing others’ private information, such as a physical or electronic
	34	address, without explicit permission
	35	* Other conduct which could reasonably be considered inappropriate in a
	36	professional setting
	37
	38
	39	Our Responsibilities
	40	====================
	41
	42	Maintainers are responsible for clarifying the standards of acceptable behavior
	43	and are expected to take appropriate and fair corrective action in response to
	44	any instances of unacceptable behavior.
	45
	46	Maintainers have the right and responsibility to remove, edit, or reject
	47	comments, commits, code, wiki edits, issues, and other contributions that are
	48	not aligned to this Code of Conduct, or to ban temporarily or permanently any
	49	contributor for other behaviors that they deem inappropriate, threatening,
	50	offensive, or harmful.
	51
	52	Scope
	53	=====
	54
	55	This Code of Conduct applies both within project spaces and in public spaces
	56	when an individual is representing the project or its community. Examples of
	57	representing a project or community include using an official project e-mail
	58	address, posting via an official social media account, or acting as an appointed
	59	representative at an online or offline event. Representation of a project may be
	60	further defined and clarified by project maintainers.
	61
	62	Enforcement
	63	===========
	64
	65	Instances of abusive, harassing, or otherwise unacceptable behavior may be
	66	reported by contacting the Technical Advisory Board (TAB) at
	67	<tab@lists.linux-foundation.org>. All complaints will be reviewed and
	68	investigated and will result in a response that is deemed necessary and
	69	appropriate to the circumstances. The TAB is obligated to maintain
	70	confidentiality with regard to the reporter of an incident. Further details of
	71	specific enforcement policies may be posted separately.
	72
	73	Maintainers who do not follow or enforce the Code of Conduct in good faith may
	74	face temporary or permanent repercussions as determined by other members of the
	75	project’s leadership.
	76
	77	Attribution
	78	===========
	79
	80	This Code of Conduct is adapted from the Contributor Covenant, version 1.4,
	81	available at https://www.contributor-covenant.org/version/1/4/code-of-conduct.html

Documentation/process/code-of-conflict.rst+0−28

@@ -1,28 +0,0 @@
1	Code of Conflict
2	----------------
3
4	The Linux kernel development effort is a very personal process compared
5	to "traditional" ways of developing software. Your code and ideas
6	behind it will be carefully reviewed, often resulting in critique and
7	criticism. The review will almost always require improvements to the
8	code before it can be included in the kernel. Know that this happens
9	because everyone involved wants to see the best possible solution for
10	the overall success of Linux. This development process has been proven
11	to create the most robust operating system kernel ever, and we do not
12	want to do anything to cause the quality of submission and eventual
13	result to ever decrease.
14
15	If however, anyone feels personally abused, threatened, or otherwise
16	uncomfortable due to this process, that is not acceptable. If so,
17	please contact the Linux Foundation's Technical Advisory Board at
18	<tab@lists.linux-foundation.org>, or the individual members, and they
19	will work to resolve the issue to the best of their ability. For more
20	information on who is on the Technical Advisory Board and what their
21	role is, please see:
22
23	- http://www.linuxfoundation.org/projects/linux/tab
24
25	As a reviewer of code, please strive to keep things civil and focused on
26	the technical issues involved. We are all humans, and frustrations can
27	be high on both sides of the process. Try to keep in mind the immortal
28	words of Bill and Ted, "Be excellent to each other."

Documentation/process/index.rst+1−1

@@ -20,7 +20,7 @@ Below are the essential guides that every developer should read. · 19 unmodified lines
20	:maxdepth: 1	20	:maxdepth: 1
21		21
22	howto	22	howto
23	code-of-conflict	23	code-of-conduct
24	development-process	24	development-process
25	submitting-patches	25	submitting-patches
26	coding-style	26	coding-style

Documentation/virtual/kvm/api.txt+11−1

@@ -4510,7 +4510,8 @@ Do not enable KVM_FEATURE_PV_UNHALT if you disable HLT exits. · 4509 unmodified lines
4510	Architectures: s390	4510	Architectures: s390
4511	Parameters: none	4511	Parameters: none
4512	Returns: 0 on success, -EINVAL if hpage module parameter was not set	4512	Returns: 0 on success, -EINVAL if hpage module parameter was not set
4513	or cmma is enabled	4513	or cmma is enabled, or the VM has the KVM_VM_S390_UCONTROL
		4514	flag set
4514		4515
4515	With this capability the KVM support for memory backing with 1m pages	4516	With this capability the KVM support for memory backing with 1m pages
4516	through hugetlbfs can be enabled for a VM. After the capability is	4517	through hugetlbfs can be enabled for a VM. After the capability is
@@ -4521,6 +4522,15 @@ hpage module parameter is not set to 1, -EINVAL is returned. · 4 unmodified lines
4521	While it is generally possible to create a huge page backed VM without	4522	While it is generally possible to create a huge page backed VM without
4522	this capability, the VM will not be able to run.	4523	this capability, the VM will not be able to run.
4523		4524
		4525	7.14 KVM_CAP_MSR_PLATFORM_INFO
		4526
		4527	Architectures: x86
		4528	Parameters: args[0] whether feature should be enabled or not
		4529
		4530	With this capability, a guest may read the MSR_PLATFORM_INFO MSR. Otherwise,
		4531	a #GP would be raised when the guest tries to access. Currently, this
		4532	capability does not enable write permissions of this MSR for the guest.
		4533
4524	8. Other capabilities.	4534	8. Other capabilities.
4525	----------------------	4535	----------------------
4526		4536

Documentation/x86/earlyprintk.txt+15−10

 ( If your system does not list a debug port capability then you probably
   won't be able to use the USB debug key. )
- b.) You also need a Netchip USB debug cable/key:
+ b.) You also need a NetChip USB debug cable/key:
         http://www.plxtech.com/products/NET2000/NET20DC/default.asp
-     This is a small blue plastic connector with two USB connections,
+     This is a small blue plastic connector with two USB connections;
      it draws power from its USB connections.
  c.) You need a second client/console system with a high speed USB 2.0
      port.
- d.) The Netchip device must be plugged directly into the physical
+ d.) The NetChip device must be plugged directly into the physical
      debug port on the "host/target" system.  You cannot use a USB hub in
      between the physical debug port and the "host/target" system.
      The EHCI debug controller is bound to a specific physical USB
-     port and the Netchip device will only work as an early printk
+     port and the NetChip device will only work as an early printk
      device in this port.  The EHCI host controllers are electrically
      wired such that the EHCI debug controller is hooked up to the
-     first physical and there is no way to change this via software.
+     first physical port and there is no way to change this via software.
      You can find the physical port through experimentation by trying
      each physical port on the system and rebooting.  Or you can try
      and use lsusb or look at the kernel info messages emitted by the
      to the hardware vendor, because there is no reason not to wire
      this port into one of the physically accessible ports.
- e.) It is also important to note, that many versions of the Netchip
+ e.) It is also important to note, that many versions of the NetChip
      device require the "client/console" system to be plugged into the
-     right and side of the device (with the product logo facing up and
+     right hand side of the device (with the product logo facing up and
      readable left to right).  The reason being is that the 5 volt
      power supply is taken from only one side of the device and it
      must be the side that does not get rebooted.
       CONFIG_EARLY_PRINTK_DBGP=y
     And you need to add the boot command line: "earlyprintk=dbgp".
     (If you are using Grub, append it to the 'kernel' line in
-     /etc/grub.conf)
+     /etc/grub.conf.  If you are using Grub2 on a BIOS firmware system,
+     append it to the 'linux' line in /boot/grub2/grub.cfg. If you are
+     using Grub2 on an EFI firmware system, append it to the 'linux'
+     or 'linuxefi' line in /boot/grub2/grub.cfg or
+     /boot/efi/EFI/<distro>/grub.cfg.)
     On systems with more than one EHCI debug controller you must
     specify the correct EHCI debug controller number.  The ordering
     comes from the PCI bus enumeration of the EHCI controllers.  The
-    default with no number argument is "0" the first EHCI debug
+    default with no number argument is "0" or the first EHCI debug
     controller.  To use the second EHCI debug controller, you would
     use the command line: "earlyprintk=dbgp1"
     see the raw output.
  c.) On Nvidia Southbridge based systems: the kernel will try to probe
-     and find out which port has debug device connected.
+     and find out which port has a debug device connected.
 3. Testing that it works fine:

MAINTAINERS+48−15

 F:	drivers/i2c/busses/i2c-cadence.c
 F:	drivers/mmc/host/sdhci-of-arasan.c
 F:	drivers/edac/synopsys_edac.c
+F:	drivers/i2c/busses/i2c-xiic.c
 ARM64 PORT (AARCH64 ARCHITECTURE)
 M:	Catalin Marinas <catalin.marinas@arm.com>
 FBTFT Framebuffer drivers
 M:	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
+L:	dri-devel@lists.freedesktop.org
+L:	linux-fbdev@vger.kernel.org
 S:	Maintained
 F:	drivers/staging/fbtft/
 GASKET DRIVER FRAMEWORK
 M:	Rob Springer <rspringer@google.com>
-M:	John Joseph <jnjoseph@google.com>
+M:	Todd Poynor <toddpoynor@google.com>
 M:	Ben Chan <benchan@chromium.org>
 S:	Maintained
 F:	drivers/staging/gasket/
 F:	drivers/crypto/vmx/ghash*
 F:	drivers/crypto/vmx/ppc-xlate.pl
+IBM Power PCI Hotplug Driver for RPA-compliant PPC64 platform
+M:	Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
+L:	linux-pci@vger.kernel.org
+L:	linuxppc-dev@lists.ozlabs.org
+S:	Supported
+F:	drivers/pci/hotplug/rpaphp*
+IBM Power IO DLPAR Driver for RPA-compliant PPC64 platform
+M:	Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
+L:	linux-pci@vger.kernel.org
+L:	linuxppc-dev@lists.ozlabs.org
+S:	Supported
+F:	drivers/pci/hotplug/rpadlpar*
 IBM ServeRAID RAID DRIVER
 S:	Orphan
 F:	drivers/scsi/ips.*
 F:	Documentation/devicetree/bindings/ata/
 LIBLOCKDEP
-M:	Sasha Levin <alexander.levin@verizon.com>
+M:	Sasha Levin <alexander.levin@microsoft.com>
 S:	Maintained
 F:	tools/lib/lockdep/
 S:	Maintained
 F:	drivers/media/dvb-frontends/mn88473*
-PCI DRIVER FOR MOBIVEIL PCIE IP
-M:	Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
-L:	linux-pci@vger.kernel.org
-S:	Supported
-F:	Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
-F:	drivers/pci/controller/pcie-mobiveil.c
 MODULE SUPPORT
 M:	Jessica Yu <jeyu@kernel.org>
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/jeyu/linux.git modules-next
 M:	Ksenija Stanojevic <ksenija.stanojevic@gmail.com>
 S:	Odd Fixes
 F:	Documentation/auxdisplay/lcd-panel-cgram.txt
-F:	drivers/misc/panel.c
+F:	drivers/auxdisplay/panel.c
 PARALLEL PORT SUBSYSTEM
 M:	Sudip Mukherjee <sudipm.mukherjee@gmail.com>
 F:	include/linux/switchtec.h
 F:	drivers/ntb/hw/mscc/
+PCI DRIVER FOR MOBIVEIL PCIE IP
+M:	Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in>
+L:	linux-pci@vger.kernel.org
+S:	Supported
+F:	Documentation/devicetree/bindings/pci/mobiveil-pcie.txt
+F:	drivers/pci/controller/pcie-mobiveil.c
 PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
 M:	Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 M:	Jason Cooper <jason@lakedaemon.net>
 PCI DRIVER FOR SYNOPSYS DESIGNWARE
 M:	Jingoo Han <jingoohan1@gmail.com>
-M:	Joao Pinto <Joao.Pinto@synopsys.com>
+M:	Gustavo Pimentel <gustavo.pimentel@synopsys.com>
 L:	linux-pci@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/pci/designware-pcie.txt
 PCI ENHANCED ERROR HANDLING (EEH) FOR POWERPC
 M:	Russell Currey <ruscur@russell.cc>
+M:	Sam Bobroff <sbobroff@linux.ibm.com>
+M:	Oliver O'Halloran <oohall@gmail.com>
 L:	linuxppc-dev@lists.ozlabs.org
 S:	Supported
+F:	Documentation/PCI/pci-error-recovery.txt
+F:	drivers/pci/pcie/aer.c
+F:	drivers/pci/pcie/dpc.c
+F:	drivers/pci/pcie/err.c
 F:	Documentation/powerpc/eeh-pci-error-recovery.txt
 F:	arch/powerpc/kernel/eeh*.c
 F:	arch/powerpc/platforms/*/eeh*.c
 F:	drivers/platform/x86/peaq-wmi.c
 PER-CPU MEMORY ALLOCATOR
+M:	Dennis Zhou <dennis@kernel.org>
 M:	Tejun Heo <tj@kernel.org>
 M:	Christoph Lameter <cl@linux.com>
-M:	Dennis Zhou <dennisszhou@gmail.com>
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/dennis/percpu.git
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu.git
 S:	Maintained
 F:	include/linux/percpu*.h
 F:	mm/percpu*.c
 RDT - RESOURCE ALLOCATION
 M:	Fenghua Yu <fenghua.yu@intel.com>
+M:	Reinette Chatre <reinette.chatre@intel.com>
 L:	linux-kernel@vger.kernel.org
 S:	Supported
 F:	arch/x86/kernel/cpu/intel_rdt*
 F:	Documentation/devicetree/bindings/i2c/i2c-synquacer.txt
 SOCIONEXT UNIPHIER SOUND DRIVER
-M:	Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
 L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
-S:	Maintained
+S:	Orphan
 F:	sound/soc/uniphier/
 SOEKRIS NET48XX LED SUPPORT
 X86 ARCHITECTURE (32-BIT AND 64-BIT)
 M:	Thomas Gleixner <tglx@linutronix.de>
 M:	Ingo Molnar <mingo@redhat.com>
+M:	Borislav Petkov <bp@alien8.de>
 R:	"H. Peter Anvin" <hpa@zytor.com>
 M:	x86@kernel.org
 L:	linux-kernel@vger.kernel.org
 S:	Maintained
 F:	arch/x86/kernel/cpu/microcode/*
+X86 MM
+M:	Dave Hansen <dave.hansen@linux.intel.com>
+M:	Andy Lutomirski <luto@kernel.org>
+M:	Peter Zijlstra <peterz@infradead.org>
+L:	linux-kernel@vger.kernel.org
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/mm
+S:	Maintained
+F:	arch/x86/mm/
 X86 PLATFORM DRIVERS
 M:	Darren Hart <dvhart@infradead.org>
 M:	Andy Shevchenko <andy@infradead.org>

Makefile+7−17

 VERSION = 4
 PATCHLEVEL = 19
 SUBLEVEL = 0
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc6
 NAME = Merciless Moray
 # *DOCUMENTATION*
 KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION)
 export VERSION PATCHLEVEL SUBLEVEL KERNELRELEASE KERNELVERSION
-# SUBARCH tells the usermode build what the underlying arch is.  That is set
+include scripts/subarch.include
-# first, and if a usermode build is happening, the "ARCH=um" on the command
-# line overrides the setting of ARCH below.  If a native build is happening,
-# then ARCH is assigned, getting whatever value it gets normally, and
-# SUBARCH is subsequently ignored.
-SUBARCH := $(shell uname -m | sed -e s/i.86/x86/ -e s/x86_64/x86/ \
-				  -e s/sun4u/sparc64/ \
-				  -e s/arm.*/arm/ -e s/sa110/arm/ \
-				  -e s/s390x/s390/ -e s/parisc64/parisc/ \
-				  -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
-				  -e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ \
-				  -e s/riscv.*/riscv/)
 # Cross compiling and selecting different set of gcc/bin-utils
 # ---------------------------------------------------------------------------
 	$(call cc-disable-warning,maybe-uninitialized,)
 export CFLAGS_GCOV
+# The arch Makefiles can override CC_FLAGS_FTRACE. We may also append it later.
+ifdef CONFIG_FUNCTION_TRACER
+  CC_FLAGS_FTRACE := -pg
+endif
 # The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default
 # values of the respective KBUILD_* variables
 ARCH_CPPFLAGS :=
 endif
 ifdef CONFIG_FUNCTION_TRACER
-ifndef CC_FLAGS_FTRACE
-CC_FLAGS_FTRACE := -pg
-endif
 ifdef CONFIG_FTRACE_MCOUNT_RECORD
   # gcc 5 supports generating the mcount tables directly
   ifeq ($(call cc-option-yn,-mrecord-mcount),y)

arch/arc/Kconfig+5−5

 config ARC
 	def_bool y
 	select ARC_TIMERS
+	select ARCH_HAS_PTE_SPECIAL
 	select ARCH_HAS_SYNC_DMA_FOR_CPU
 	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
 	select ARCH_HAS_SG_CHAIN
 	select GENERIC_SMP_IDLE_THREAD
 	select HAVE_ARCH_KGDB
 	select HAVE_ARCH_TRACEHOOK
+	select HAVE_DEBUG_STACKOVERFLOW
 	select HAVE_FUTEX_CMPXCHG if FUTEX
+	select HAVE_GENERIC_DMA_COHERENT
 	select HAVE_IOREMAP_PROT
+	select HAVE_KERNEL_GZIP
+	select HAVE_KERNEL_LZMA
 	select HAVE_KPROBES
 	select HAVE_KRETPROBES
 	select HAVE_MEMBLOCK
 	select OF_EARLY_FLATTREE
 	select OF_RESERVED_MEM
 	select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING
-	select HAVE_DEBUG_STACKOVERFLOW
-	select HAVE_GENERIC_DMA_COHERENT
-	select HAVE_KERNEL_GZIP
-	select HAVE_KERNEL_LZMA
-	select ARCH_HAS_PTE_SPECIAL
 config ARCH_HAS_CACHE_LINE_SIZE
 	def_bool y

arch/arc/Makefile+1−9

 LINUXINCLUDE	+=  -include ${src}/arch/arc/include/asm/current.h
 endif
-upto_gcc44    :=  $(call cc-ifversion, -le, 0404, y)
+cflags-y				+= -fsection-anchors
-atleast_gcc44 :=  $(call cc-ifversion, -ge, 0404, y)
-cflags-$(atleast_gcc44)			+= -fsection-anchors
 cflags-$(CONFIG_ARC_HAS_LLSC)		+= -mlock
 cflags-$(CONFIG_ARC_HAS_SWAPE)		+= -mswape
 cflags-$(CONFIG_CPU_BIG_ENDIAN)		+= -mbig-endian
 ldflags-$(CONFIG_CPU_BIG_ENDIAN)	+= -EB
-# STAR 9000518362: (fixed with binutils shipping with gcc 4.8)
-# arc-linux-uclibc-ld (buildroot) or arceb-elf32-ld (EZChip) don't accept
-# --build-id w/o "-marclinux". Default arc-elf32-ld is OK
-ldflags-$(upto_gcc44)			+= -marclinux
 LIBGCC	:= $(shell $(CC) $(cflags-y) --print-libgcc-file-name)
 # Modules with short calls might break for calls into builtin-kernel

arch/arc/boot/dts/axc003.dtsi+26−0

@@ -93,6 +93,32 @@ · 92 unmodified lines
93	};	93	};
94	};	94	};
95		95
		96	/*
		97	* Mark DMA peripherals connected via IOC port as dma-coherent. We do
		98	* it via overlay because peripherals defined in axs10x_mb.dtsi are
		99	* used for both AXS101 and AXS103 boards and only AXS103 has IOC (so
		100	* only AXS103 board has HW-coherent DMA peripherals)
		101	* We don't need to mark pgu@17000 as dma-coherent because it uses
		102	* external DMA buffer located outside of IOC aperture.
		103	*/
		104	axs10x_mb {
		105	ethernet@0x18000 {
		106	dma-coherent;
		107	};
		108
		109	ehci@0x40000 {
		110	dma-coherent;
		111	};
		112
		113	ohci@0x60000 {
		114	dma-coherent;
		115	};
		116
		117	mmc@0x15000 {
		118	dma-coherent;
		119	};
		120	};
		121
96	/*	122	/*
97	* The DW APB ICTL intc on MB is connected to CPU intc via a	123	* The DW APB ICTL intc on MB is connected to CPU intc via a
98	* DT "invisible" DW APB GPIO block, configured to simply pass thru	124	* DT "invisible" DW APB GPIO block, configured to simply pass thru

arch/arc/boot/dts/axc003_idu.dtsi+26−0

@@ -100,6 +100,32 @@ · 99 unmodified lines
100	};	100	};
101	};	101	};
102		102
		103	/*
		104	* Mark DMA peripherals connected via IOC port as dma-coherent. We do
		105	* it via overlay because peripherals defined in axs10x_mb.dtsi are
		106	* used for both AXS101 and AXS103 boards and only AXS103 has IOC (so
		107	* only AXS103 board has HW-coherent DMA peripherals)
		108	* We don't need to mark pgu@17000 as dma-coherent because it uses
		109	* external DMA buffer located outside of IOC aperture.
		110	*/
		111	axs10x_mb {
		112	ethernet@0x18000 {
		113	dma-coherent;
		114	};
		115
		116	ehci@0x40000 {
		117	dma-coherent;
		118	};
		119
		120	ohci@0x60000 {
		121	dma-coherent;
		122	};
		123
		124	mmc@0x15000 {
		125	dma-coherent;
		126	};
		127	};
		128
103	/*	129	/*
104	* This INTC is actually connected to DW APB GPIO	130	* This INTC is actually connected to DW APB GPIO
105	* which acts as a wire between MB INTC and CPU INTC.	131	* which acts as a wire between MB INTC and CPU INTC.

arch/arc/boot/dts/axs10x_mb.dtsi+6−1

  */
 / {
+	aliases {
+		ethernet = &gmac;
+	};
 	axs10x_mb {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 			};
 		};
-		ethernet@0x18000 {
+		gmac: ethernet@0x18000 {
 			#interrupt-cells = <1>;
 			compatible = "snps,dwmac";
 			reg = < 0x18000 0x2000 >;
 			max-speed = <100>;
 			resets = <&creg_rst 5>;
 			reset-names = "stmmaceth";
+			mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
 		};
 		ehci@0x40000 {

arch/arc/boot/dts/hsdk.dts+10−1

 		bootargs = "earlycon=uart8250,mmio32,0xf0005000,115200n8 console=ttyS0,115200n8 debug print-fatal-signals=1";
 	};
+	aliases {
+		ethernet = &gmac;
+	};
 	cpus {
 		#address-cells = <1>;
 		#size-cells = <0>;
 			#clock-cells = <0>;
 		};
-		ethernet@8000 {
+		gmac: ethernet@8000 {
 			#interrupt-cells = <1>;
 			compatible = "snps,dwmac";
 			reg = <0x8000 0x2000>;
 			phy-handle = <&phy0>;
 			resets = <&cgu_rst HSDK_ETH_RESET>;
 			reset-names = "stmmaceth";
+			mac-address = [00 00 00 00 00 00]; /* Filled in by U-Boot */
+			dma-coherent;
 			mdio {
 				#address-cells = <1>;
 			compatible = "snps,hsdk-v1.0-ohci", "generic-ohci";
 			reg = <0x60000 0x100>;
 			interrupts = <15>;
+			dma-coherent;
 		};
 		ehci@40000 {
 			compatible = "snps,hsdk-v1.0-ehci", "generic-ehci";
 			reg = <0x40000 0x100>;
 			interrupts = <15>;
+			dma-coherent;
 		};
 		mmc@a000 {
 			clock-names = "biu", "ciu";
 			interrupts = <12>;
 			bus-width = <4>;
+			dma-coherent;
 		};
 	};

arch/arc/configs/axs101_defconfig+0−3

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
-# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 CONFIG_MOUSE_SERIAL=y
 CONFIG_MOUSE_SYNAPTICS_USB=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y

arch/arc/configs/axs103_defconfig+0−3

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
-# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 CONFIG_MOUSE_SERIAL=y
 CONFIG_MOUSE_SYNAPTICS_USB=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y

arch/arc/configs/axs103_smp_defconfig+0−3

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
-# CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 CONFIG_MOUSE_SERIAL=y
 CONFIG_MOUSE_SYNAPTICS_USB=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y

arch/arc/configs/haps_hs_defconfig+0−2

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/haps_hs_smp_defconfig+0−2

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/hsdk_defconfig+0−1

@@ -1,4 +1,3 @@
1	CONFIG_DEFAULT_HOSTNAME="ARCLinux"
2	CONFIG_SYSVIPC=y	1	CONFIG_SYSVIPC=y
3	# CONFIG_CROSS_MEMORY_ATTACH is not set	2	# CONFIG_CROSS_MEMORY_ATTACH is not set
4	CONFIG_NO_HZ_IDLE=y	3	CONFIG_NO_HZ_IDLE=y

arch/arc/configs/nps_defconfig+0−1

@@ -59,7 +59,6 @@ CONFIG_NETCONSOLE=y · 58 unmodified lines
59	# CONFIG_INPUT_MOUSE is not set	59	# CONFIG_INPUT_MOUSE is not set
60	# CONFIG_SERIO is not set	60	# CONFIG_SERIO is not set
61	# CONFIG_LEGACY_PTYS is not set	61	# CONFIG_LEGACY_PTYS is not set
62	# CONFIG_DEVKMEM is not set
63	CONFIG_SERIAL_8250=y	62	CONFIG_SERIAL_8250=y
64	CONFIG_SERIAL_8250_CONSOLE=y	63	CONFIG_SERIAL_8250_CONSOLE=y
65	CONFIG_SERIAL_8250_NR_UARTS=1	64	CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/nsim_700_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_ARC=y
 CONFIG_SERIAL_ARC_CONSOLE=y
 # CONFIG_HW_RANDOM is not set

arch/arc/configs/nsim_hs_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_ARC=y
 CONFIG_SERIAL_ARC_CONSOLE=y
 # CONFIG_HW_RANDOM is not set

arch/arc/configs/nsim_hs_smp_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_ARC=y
 CONFIG_SERIAL_ARC_CONSOLE=y
 # CONFIG_HW_RANDOM is not set

arch/arc/configs/nsimosci_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/nsimosci_hs_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/nsimosci_hs_smp_defconfig+0−2

-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/tb10x_defconfig+0−1

@@ -57,7 +57,6 @@ CONFIG_STMMAC_ETH=y · 56 unmodified lines
57	# CONFIG_SERIO is not set	57	# CONFIG_SERIO is not set
58	# CONFIG_VT is not set	58	# CONFIG_VT is not set
59	# CONFIG_LEGACY_PTYS is not set	59	# CONFIG_LEGACY_PTYS is not set
60	# CONFIG_DEVKMEM is not set
61	CONFIG_SERIAL_8250=y	60	CONFIG_SERIAL_8250=y
62	CONFIG_SERIAL_8250_CONSOLE=y	61	CONFIG_SERIAL_8250_CONSOLE=y
63	CONFIG_SERIAL_8250_NR_UARTS=1	62	CONFIG_SERIAL_8250_NR_UARTS=1

arch/arc/configs/vdk_hs38_defconfig+0−2

 # CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_DEFAULT_HOSTNAME="ARCLinux"
 # CONFIG_CROSS_MEMORY_ATTACH is not set
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_MOUSE_PS2_TOUCHKIT=y
 CONFIG_SERIO_ARC_PS2=y
 # CONFIG_LEGACY_PTYS is not set
-# CONFIG_DEVKMEM is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_DW=y

arch/arc/configs/vdk_hs38_smp_defconfig+0−1

@@ -1,5 +1,4 @@
1	# CONFIG_LOCALVERSION_AUTO is not set	1	# CONFIG_LOCALVERSION_AUTO is not set
2	CONFIG_DEFAULT_HOSTNAME="ARCLinux"
3	# CONFIG_CROSS_MEMORY_ATTACH is not set	2	# CONFIG_CROSS_MEMORY_ATTACH is not set
4	CONFIG_HIGH_RES_TIMERS=y	3	CONFIG_HIGH_RES_TIMERS=y
5	CONFIG_IKCONFIG=y	4	CONFIG_IKCONFIG=y

arch/arc/include/asm/atomic.h+1−1

@@ -84,7 +84,7 @@ static inline int atomic_fetch_##op(int i, atomic_t *v) \ · 83 unmodified lines
84	"1: llock %[orig], [%[ctr]] \n" \	84	"1: llock %[orig], [%[ctr]] \n" \
85	" " #asm_op " %[val], %[orig], %[i] \n" \	85	" " #asm_op " %[val], %[orig], %[i] \n" \
86	" scond %[val], [%[ctr]] \n" \	86	" scond %[val], [%[ctr]] \n" \
87	" \n" \	87	" bnz 1b \n" \
88	: [val] "=&r" (val), \	88	: [val] "=&r" (val), \
89	[orig] "=&r" (orig) \	89	[orig] "=&r" (orig) \
90	: [ctr] "r" (&v->counter), \	90	: [ctr] "r" (&v->counter), \

arch/arc/include/asm/dma-mapping.h+13−0

@@ -0,0 +1,13 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2	// (C) 2018 Synopsys, Inc. (www.synopsys.com)
	3
	4	#ifndef ASM_ARC_DMA_MAPPING_H
	5	#define ASM_ARC_DMA_MAPPING_H
	6
	7	#include <asm-generic/dma-mapping.h>
	8
	9	void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
	10	const struct iommu_ops *iommu, bool coherent);
	11	#define arch_setup_dma_ops arch_setup_dma_ops
	12
	13	#endif

arch/arc/kernel/troubleshoot.c+4−9

 static void show_faulting_vma(unsigned long address, char *buf)
 {
 	struct vm_area_struct *vma;
-	struct inode *inode;
-	unsigned long ino = 0;
-	dev_t dev = 0;
 	char *nm = buf;
 	struct mm_struct *active_mm = current->active_mm;
 	 * if the container VMA is not found
 	 */
 	if (vma && (vma->vm_start <= address)) {
-		struct file *file = vma->vm_file;
+		if (vma->vm_file) {
-		if (file) {
+			nm = file_path(vma->vm_file, buf, PAGE_SIZE - 1);
-			nm = file_path(file, buf, PAGE_SIZE - 1);
+			if (IS_ERR(nm))
-			inode = file_inode(vma->vm_file);
+				nm = "?";
-			dev = inode->i_sb->s_dev;
-			ino = inode->i_ino;
 		}
 		pr_info("    @off 0x%lx in [%s]\n"
 			"    VMA: 0x%08lx to 0x%08lx\n",

arch/arc/mm/cache.c+21−15

 	n += scnprintf(buf + n, len - n, "Peripherals\t: %#lx%s%s\n",
 		       perip_base,
-		       IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency "));
+		       IS_AVAIL3(ioc_exists, ioc_enable, ", IO-Coherency (per-device) "));
 	return buf;
 }
 	slc_op(start, sz, OP_FLUSH);
 }
-/*
- * DMA ops for systems with IOC
- * IOC hardware snoops all DMA traffic keeping the caches consistent with
- * memory - eliding need for any explicit cache maintenance of DMA buffers
- */
-static void __dma_cache_wback_inv_ioc(phys_addr_t start, unsigned long sz) {}
-static void __dma_cache_inv_ioc(phys_addr_t start, unsigned long sz) {}
-static void __dma_cache_wback_ioc(phys_addr_t start, unsigned long sz) {}
 /*
  * Exported DMA API
  */
 {
 	unsigned int ioc_base, mem_sz;
+	/*
+	 * As for today we don't support both IOC and ZONE_HIGHMEM enabled
+	 * simultaneously. This happens because as of today IOC aperture covers
+	 * only ZONE_NORMAL (low mem) and any dma transactions outside this
+	 * region won't be HW coherent.
+	 * If we want to use both IOC and ZONE_HIGHMEM we can use
+	 * bounce_buffer to handle dma transactions to HIGHMEM.
+	 * Also it is possible to modify dma_direct cache ops or increase IOC
+	 * aperture size if we are planning to use HIGHMEM without PAE.
+	 */
+	if (IS_ENABLED(CONFIG_HIGHMEM))
+		panic("IOC and HIGHMEM can't be used simultaneously");
 	/* Flush + invalidate + disable L1 dcache */
 	__dc_disable();
 	if (is_isa_arcv2() && ioc_enable)
 		arc_ioc_setup();
-	if (is_isa_arcv2() && ioc_enable) {
+	if (is_isa_arcv2() && l2_line_sz && slc_enable) {
-		__dma_cache_wback_inv = __dma_cache_wback_inv_ioc;
-		__dma_cache_inv = __dma_cache_inv_ioc;
-		__dma_cache_wback = __dma_cache_wback_ioc;
-	} else if (is_isa_arcv2() && l2_line_sz && slc_enable) {
 		__dma_cache_wback_inv = __dma_cache_wback_inv_slc;
 		__dma_cache_inv = __dma_cache_inv_slc;
 		__dma_cache_wback = __dma_cache_wback_slc;
 		__dma_cache_inv = __dma_cache_inv_l1;
 		__dma_cache_wback = __dma_cache_wback_l1;
 	}
+	/*
+	 * In case of IOC (say IOC+SLC case), pointers above could still be set
+	 * but end up not being relevant as the first function in chain is not
+	 * called at all for @dma_direct_ops
+	 *     arch_sync_dma_for_cpu() -> dma_cache_*() -> __dma_cache_*()
+	 */
 }
 void __ref arc_cache_init(void)

arch/arc/mm/dma.c+41−41

  * published by the Free Software Foundation.
  */
-/*
- * DMA Coherent API Notes
- *
- * I/O is inherently non-coherent on ARC. So a coherent DMA buffer is
- * implemented by accessing it using a kernel virtual address, with
- * Cache bit off in the TLB entry.
- *
- * The default DMA address == Phy address which is 0x8000_0000 based.
- */
 #include <linux/dma-noncoherent.h>
 #include <asm/cache.h>
 #include <asm/cacheflush.h>
+/*
+ * ARCH specific callbacks for generic noncoherent DMA ops (dma/noncoherent.c)
+ *  - hardware IOC not available (or "dma-coherent" not set for device in DT)
+ *  - But still handle both coherent and non-coherent requests from caller
+ *
+ * For DMA coherent hardware (IOC) generic code suffices
+ */
 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
 		gfp_t gfp, unsigned long attrs)
 {
 	struct page *page;
 	phys_addr_t paddr;
 	void *kvaddr;
-	int need_coh = 1, need_kvaddr = 0;
+	bool need_coh = !(attrs & DMA_ATTR_NON_CONSISTENT);
-	page = alloc_pages(gfp, order);
-	if (!page)
-		return NULL;
 	/*
-	 * IOC relies on all data (even coherent DMA data) being in cache
+	 * __GFP_HIGHMEM flag is cleared by upper layer functions
-	 * Thus allocate normal cached memory
+	 * (in include/linux/dma-mapping.h) so we should never get a
-	 *
+	 * __GFP_HIGHMEM here.
-	 * The gains with IOC are two pronged:
-	 *   -For streaming data, elides need for cache maintenance, saving
-	 *    cycles in flush code, and bus bandwidth as all the lines of a
-	 *    buffer need to be flushed out to memory
-	 *   -For coherent data, Read/Write to buffers terminate early in cache
-	 *   (vs. always going to memory - thus are faster)
 	 */
-	if ((is_isa_arcv2() && ioc_enable) ||
+	BUG_ON(gfp & __GFP_HIGHMEM);
-	    (attrs & DMA_ATTR_NON_CONSISTENT))
-		need_coh = 0;
-	/*
+	page = alloc_pages(gfp, order);
-	 * - A coherent buffer needs MMU mapping to enforce non-cachability
+	if (!page)
-	 * - A highmem page needs a virtual handle (hence MMU mapping)
+		return NULL;
-	 *   independent of cachability
-	 */
-	if (PageHighMem(page) || need_coh)
-		need_kvaddr = 1;
 	/* This is linear addr (0x8000_0000 based) */
 	paddr = page_to_phys(page);
 	*dma_handle = paddr;
-	/* This is kernel Virtual address (0x7000_0000 based) */
+	/*
-	if (need_kvaddr) {
+	 * A coherent buffer needs MMU mapping to enforce non-cachability.
+	 * kvaddr is kernel Virtual address (0x7000_0000 based).
+	 */
+	if (need_coh) {
 		kvaddr = ioremap_nocache(paddr, size);
 		if (kvaddr == NULL) {
 			__free_pages(page, order);
 {
 	phys_addr_t paddr = dma_handle;
 	struct page *page = virt_to_page(paddr);
-	int is_non_coh = 1;
-	is_non_coh = (attrs & DMA_ATTR_NON_CONSISTENT) ||
-			(is_isa_arcv2() && ioc_enable);
-	if (PageHighMem(page) || !is_non_coh)
+	if (!(attrs & DMA_ATTR_NON_CONSISTENT))
 		iounmap((void __force __iomem *)vaddr);
 	__free_pages(page, get_order(size));
 		break;
 	}
 }
+/*
+ * Plug in coherent or noncoherent dma ops
+ */
+void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
+			const struct iommu_ops *iommu, bool coherent)
+{
+	/*
+	 * IOC hardware snoops all DMA traffic keeping the caches consistent
+	 * with memory - eliding need for any explicit cache maintenance of
+	 * DMA buffers - so we can use dma_direct cache ops.
+	 */
+	if (is_isa_arcv2() && ioc_enable && coherent) {
+		set_dma_ops(dev, &dma_direct_ops);
+		dev_info(dev, "use dma_direct_ops cache ops\n");
+	} else {
+		set_dma_ops(dev, &dma_noncoherent_ops);
+		dev_info(dev, "use dma_noncoherent_ops cache ops\n");
+	}
+}

arch/arm/boot/dts/sama5d3_emac.dtsi+1−1

@@ -41,7 +41,7 @@ · 40 unmodified lines
41	};	41	};
42		42
43	macb1: ethernet@f802c000 {	43	macb1: ethernet@f802c000 {
44	compatible = "cdns,at91sam9260-macb", "cdns,macb";	44	compatible = "atmel,sama5d3-macb", "cdns,at91sam9260-macb", "cdns,macb";
45	reg = <0xf802c000 0x100>;	45	reg = <0xf802c000 0x100>;
46	interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;	46	interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
47	pinctrl-names = "default";	47	pinctrl-names = "default";

arch/arm/include/asm/kvm_host.h+0−1

@@ -223,7 +223,6 @@ int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu, · 222 unmodified lines
223	struct kvm_vcpu_events *events);	223	struct kvm_vcpu_events *events);
224		224
225	#define KVM_ARCH_WANT_MMU_NOTIFIER	225	#define KVM_ARCH_WANT_MMU_NOTIFIER
226	int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
227	int kvm_unmap_hva_range(struct kvm *kvm,	226	int kvm_unmap_hva_range(struct kvm *kvm,
228	unsigned long start, unsigned long end);	227	unsigned long start, unsigned long end);
229	void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);	228	void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts+2−0

 	pinctrl-0 = <&mmc0_pins>;
 	vmmc-supply = <&reg_cldo1>;
 	cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
 	status = "okay";
 };
 	vqmmc-supply = <&reg_bldo2>;
 	non-removable;
 	cap-mmc-hw-reset;
+	bus-width = <8>;
 	status = "okay";
 };

arch/arm64/include/asm/jump_label.h+2−2

@@ -28,7 +28,7 @@ · 27 unmodified lines
28		28
29	static __always_inline bool arch_static_branch(struct static_key *key, bool branch)	29	static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
30	{	30	{
31	asm goto("1: nop\n\t"	31	asm_volatile_goto("1: nop\n\t"
32	".pushsection __jump_table, \"aw\"\n\t"	32	".pushsection __jump_table, \"aw\"\n\t"
33	".align 3\n\t"	33	".align 3\n\t"
34	".quad 1b, %l[l_yes], %c0\n\t"	34	".quad 1b, %l[l_yes], %c0\n\t"
@@ -42,7 +42,7 @@ l_yes: · 7 unmodified lines
42		42
43	static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)	43	static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch)
44	{	44	{
45	asm goto("1: b %l[l_yes]\n\t"	45	asm_volatile_goto("1: b %l[l_yes]\n\t"
46	".pushsection __jump_table, \"aw\"\n\t"	46	".pushsection __jump_table, \"aw\"\n\t"
47	".align 3\n\t"	47	".align 3\n\t"
48	".quad 1b, %l[l_yes], %c0\n\t"	48	".quad 1b, %l[l_yes], %c0\n\t"

arch/arm64/include/asm/kvm_host.h+1−3

 	u64    vmid_gen;
 	u32    vmid;
-	/* 1-level 2nd stage table and lock */
+	/* 1-level 2nd stage table, protected by kvm->mmu_lock */
-	spinlock_t pgd_lock;
 	pgd_t *pgd;
 	/* VTTBR value associated with above pgd and vmid */
 			      struct kvm_vcpu_events *events);
 #define KVM_ARCH_WANT_MMU_NOTIFIER
-int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
 int kvm_unmap_hva_range(struct kvm *kvm,
 			unsigned long start, unsigned long end);
 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

arch/arm64/kernel/Makefile+1−0

@@ -54,6 +54,7 @@ arm64-obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o \ · 53 unmodified lines
54	arm64-obj-$(CONFIG_ARM64_RELOC_TEST) += arm64-reloc-test.o	54	arm64-obj-$(CONFIG_ARM64_RELOC_TEST) += arm64-reloc-test.o
55	arm64-reloc-test-y := reloc_test_core.o reloc_test_syms.o	55	arm64-reloc-test-y := reloc_test_core.o reloc_test_syms.o
56	arm64-obj-$(CONFIG_CRASH_DUMP) += crash_dump.o	56	arm64-obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
		57	arm64-obj-$(CONFIG_CRASH_CORE) += crash_core.o
57	arm64-obj-$(CONFIG_ARM_SDE_INTERFACE) += sdei.o	58	arm64-obj-$(CONFIG_ARM_SDE_INTERFACE) += sdei.o
58	arm64-obj-$(CONFIG_ARM64_SSBD) += ssbd.o	59	arm64-obj-$(CONFIG_ARM64_SSBD) += ssbd.o
59		60

arch/arm64/kernel/crash_core.c+19−0

@@ -0,0 +1,19 @@
	1	// SPDX-License-Identifier: GPL-2.0
	2	/*
	3	* Copyright (C) Linaro.
	4	* Copyright (C) Huawei Futurewei Technologies.
	5	*/
	6
	7	#include <linux/crash_core.h>
	8	#include <asm/memory.h>
	9
	10	void arch_crash_save_vmcoreinfo(void)
	11	{
	12	VMCOREINFO_NUMBER(VA_BITS);
	13	/* Please note VMCOREINFO_NUMBER() uses "%d", not "%x" */
	14	vmcoreinfo_append_str("NUMBER(kimage_voffset)=0x%llx\n",
	15	kimage_voffset);
	16	vmcoreinfo_append_str("NUMBER(PHYS_OFFSET)=0x%llx\n",
	17	PHYS_OFFSET);
	18	vmcoreinfo_append_str("KERNELOFFSET=%lx\n", kaslr_offset());
	19	}

arch/arm64/kernel/machine_kexec.c+0−11

@@ -358,14 +358,3 @@ void crash_free_reserved_phys_range(unsigned long begin, unsigned long end) · 357 unmodified lines
358	}	358	}
359	}	359	}
360	#endif /* CONFIG_HIBERNATION */	360	#endif /* CONFIG_HIBERNATION */
361
362	void arch_crash_save_vmcoreinfo(void)
363	{
364	VMCOREINFO_NUMBER(VA_BITS);
365	/* Please note VMCOREINFO_NUMBER() uses "%d", not "%x" */
366	vmcoreinfo_append_str("NUMBER(kimage_voffset)=0x%llx\n",
367	kimage_voffset);
368	vmcoreinfo_append_str("NUMBER(PHYS_OFFSET)=0x%llx\n",
369	PHYS_OFFSET);
370	vmcoreinfo_append_str("KERNELOFFSET=%lx\n", kaslr_offset());
371	}

arch/arm64/kvm/hyp/switch.c+6−3

 	val = read_sysreg(cpacr_el1);
 	val |= CPACR_EL1_TTA;
 	val &= ~CPACR_EL1_ZEN;
-	if (!update_fp_enabled(vcpu))
+	if (!update_fp_enabled(vcpu)) {
 		val &= ~CPACR_EL1_FPEN;
+		__activate_traps_fpsimd32(vcpu);
+	}
 	write_sysreg(val, cpacr_el1);
 	val = CPTR_EL2_DEFAULT;
 	val |= CPTR_EL2_TTA | CPTR_EL2_TZ;
-	if (!update_fp_enabled(vcpu))
+	if (!update_fp_enabled(vcpu)) {
 		val |= CPTR_EL2_TFP;
+		__activate_traps_fpsimd32(vcpu);
+	}
 	write_sysreg(val, cptr_el2);
 }
 	if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE))
 		write_sysreg_s(vcpu->arch.vsesr_el2, SYS_VSESR_EL2);
-	__activate_traps_fpsimd32(vcpu);
 	if (has_vhe())
 		activate_traps_vhe(vcpu);
 	else

arch/arm64/mm/mmu.c+6−4

 	pmd = READ_ONCE(*pmdp);
-	/* No-op for empty entry and WARN_ON for valid entry */
+	if (!pmd_present(pmd))
-	if (!pmd_present(pmd) || !pmd_table(pmd)) {
+		return 1;
+	if (!pmd_table(pmd)) {
 		VM_WARN_ON(!pmd_table(pmd));
 		return 1;
 	}
 	pud = READ_ONCE(*pudp);
-	/* No-op for empty entry and WARN_ON for valid entry */
+	if (!pud_present(pud))
-	if (!pud_present(pud) || !pud_table(pud)) {
+		return 1;
+	if (!pud_table(pud)) {
 		VM_WARN_ON(!pud_table(pud));
 		return 1;
 	}

arch/hexagon/include/asm/bitops.h+2−2

@@ -211,7 +211,7 @@ static inline long ffz(int x) · 210 unmodified lines
211	* This is defined the same way as ffs.	211	* This is defined the same way as ffs.
212	* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.	212	* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
213	*/	213	*/
214	static inline long fls(int x)	214	static inline int fls(int x)
215	{	215	{
216	int r;	216	int r;
217		217
@@ -232,7 +232,7 @@ static inline long fls(int x) · 14 unmodified lines
232	* the libc and compiler builtin ffs routines, therefore	232	* the libc and compiler builtin ffs routines, therefore
233	* differs in spirit from the above ffz (man ffs).	233	* differs in spirit from the above ffz (man ffs).
234	*/	234	*/
235	static inline long ffs(int x)	235	static inline int ffs(int x)
236	{	236	{
237	int r;	237	int r;
238		238

arch/hexagon/kernel/dma.c+1−1

@@ -60,7 +60,7 @@ static void hexagon_dma_alloc_coherent(struct device dev, size_t size, · 59 unmodified lines
60	panic("Can't create %s() memory pool!", __func__);	60	panic("Can't create %s() memory pool!", __func__);
61	else	61	else
62	gen_pool_add(coherent_pool,	62	gen_pool_add(coherent_pool,
63	pfn_to_virt(max_low_pfn),	63	(unsigned long)pfn_to_virt(max_low_pfn),
64	hexagon_coherent_pool_size, -1);	64	hexagon_coherent_pool_size, -1);
65	}	65	}
66		66

arch/m68k/mm/mcfmmu.c+1−1

@@ -172,7 +172,7 @@ void __init cf_bootmem_alloc(void) · 171 unmodified lines
172	high_memory = (void *)_ramend;	172	high_memory = (void *)_ramend;
173		173
174	/* Reserve kernel text/data/bss */	174	/* Reserve kernel text/data/bss */
175	memblock_reserve(memstart, memstart - _rambase);	175	memblock_reserve(_rambase, memstart - _rambase);
176		176
177	m68k_virt_to_node_shift = fls(_ramend - 1) - 6;	177	m68k_virt_to_node_shift = fls(_ramend - 1) - 6;
178	module_fixup(NULL, __start_fixup, __stop_fixup);	178	module_fixup(NULL, __start_fixup, __stop_fixup);

arch/mips/include/asm/kvm_host.h+0−1

@@ -931,7 +931,6 @@ enum kvm_mips_fault_result kvm_trap_emul_gva_fault(struct kvm_vcpu *vcpu, · 930 unmodified lines
931	bool write);	931	bool write);
932		932
933	#define KVM_ARCH_WANT_MMU_NOTIFIER	933	#define KVM_ARCH_WANT_MMU_NOTIFIER
934	int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
935	int kvm_unmap_hva_range(struct kvm *kvm,	934	int kvm_unmap_hva_range(struct kvm *kvm,
936	unsigned long start, unsigned long end);	935	unsigned long start, unsigned long end);
937	void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);	936	void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);

arch/mips/include/asm/mach-lantiq/xway/xway_dma.h+1−0

@@ -40,6 +40,7 @@ struct ltq_dma_channel { · 39 unmodified lines
40	int desc; /* the current descriptor */	40	int desc; /* the current descriptor */
41	struct ltq_dma_desc desc_base; / the descriptor base */	41	struct ltq_dma_desc desc_base; / the descriptor base */
42	int phys; /* physical addr */	42	int phys; /* physical addr */
		43	struct device *dev;
43	};	44	};
44		45
45	enum {	46	enum {

arch/mips/kernel/vdso.c+20−0

 #include <linux/err.h>
 #include <linux/init.h>
 #include <linux/ioport.h>
+#include <linux/kernel.h>
 #include <linux/mm.h>
 #include <linux/sched.h>
 #include <linux/slab.h>
 #include <asm/abi.h>
 #include <asm/mips-cps.h>
+#include <asm/page.h>
 #include <asm/vdso.h>
 /* Kernel-provided data used by the VDSO. */
 	vvar_size = gic_size + PAGE_SIZE;
 	size = vvar_size + image->size;
+	/*
+	 * Find a region that's large enough for us to perform the
+	 * colour-matching alignment below.
+	 */
+	if (cpu_has_dc_aliases)
+		size += shm_align_mask + 1;
 	base = get_unmapped_area(NULL, 0, size, 0, 0);
 	if (IS_ERR_VALUE(base)) {
 		ret = base;
 		goto out;
 	}
+	/*
+	 * If we suffer from dcache aliasing, ensure that the VDSO data page
+	 * mapping is coloured the same as the kernel's mapping of that memory.
+	 * This ensures that when the kernel updates the VDSO data userland
+	 * will observe it without requiring cache invalidations.
+	 */
+	if (cpu_has_dc_aliases) {
+		base = __ALIGN_MASK(base, shm_align_mask);
+		base += ((unsigned long)&vdso_data - gic_size) & shm_align_mask;
+	}
 	data_addr = base + gic_size;
 	vdso_addr = data_addr + PAGE_SIZE;

arch/mips/kvm/mmu.c+0−10

@@ -512,16 +512,6 @@ static int kvm_unmap_hva_handler(struct kvm *kvm, gfn_t gfn, gfn_t gfn_end, · 511 unmodified lines
512	return 1;	512	return 1;
513	}	513	}
514		514
515	int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
516	{
517	unsigned long end = hva + PAGE_SIZE;
518
519	handle_hva_to_gpa(kvm, hva, end, &kvm_unmap_hva_handler, NULL);
520
521	kvm_mips_callbacks->flush_shadow_all(kvm);
522	return 0;
523	}
524
525	int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)	515	int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
526	{	516	{
527	handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);	517	handle_hva_to_gpa(kvm, start, end, &kvm_unmap_hva_handler, NULL);

arch/mips/lantiq/xway/dma.c+2−2

@@ -130,7 +130,7 @@ ltq_dma_alloc(struct ltq_dma_channel *ch) · 129 unmodified lines
130	unsigned long flags;	130	unsigned long flags;
131		131
132	ch->desc = 0;	132	ch->desc = 0;
133	ch->desc_base = dma_zalloc_coherent(NULL,	133	ch->desc_base = dma_zalloc_coherent(ch->dev,
134	LTQ_DESC_NUM * LTQ_DESC_SIZE,	134	LTQ_DESC_NUM * LTQ_DESC_SIZE,
135	&ch->phys, GFP_ATOMIC);	135	&ch->phys, GFP_ATOMIC);
136		136
@@ -182,7 +182,7 @@ ltq_dma_free(struct ltq_dma_channel *ch) · 45 unmodified lines
182	if (!ch->desc_base)	182	if (!ch->desc_base)
183	return;	183	return;
184	ltq_dma_close(ch);	184	ltq_dma_close(ch);
185	dma_free_coherent(NULL, LTQ_DESC_NUM * LTQ_DESC_SIZE,	185	dma_free_coherent(ch->dev, LTQ_DESC_NUM * LTQ_DESC_SIZE,
186	ch->desc_base, ch->phys);	186	ch->desc_base, ch->phys);
187	}	187	}
188	EXPORT_SYMBOL_GPL(ltq_dma_free);	188	EXPORT_SYMBOL_GPL(ltq_dma_free);

arch/powerpc/include/asm/book3s/64/pgtable.h+0−1

@@ -1051,7 +1051,6 @@ static inline void vmemmap_remove_mapping(unsigned long start, · 1050 unmodified lines
1051	return hash__vmemmap_remove_mapping(start, page_size);	1051	return hash__vmemmap_remove_mapping(start, page_size);
1052	}	1052	}
1053	#endif	1053	#endif
1054	struct page *realmode_pfn_to_page(unsigned long pfn);
1055		1054
1056	static inline pte_t pmd_pte(pmd_t pmd)	1055	static inline pte_t pmd_pte(pmd_t pmd)
1057	{	1056	{

arch/powerpc/include/asm/iommu.h+0−2

 extern int __init tce_iommu_bus_notifier_init(void);
 extern long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry,
 		unsigned long *hpa, enum dma_data_direction *direction);
-extern long iommu_tce_xchg_rm(struct iommu_table *tbl, unsigned long entry,
-		unsigned long *hpa, enum dma_data_direction *direction);
 #else
 static inline void iommu_register_group(struct iommu_table_group *table_group,
 					int pci_domain_number,

arch/powerpc/include/asm/mmu_context.h+1−0

@@ -38,6 +38,7 @@ extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, · 37 unmodified lines
38	unsigned long ua, unsigned int pageshift, unsigned long *hpa);	38	unsigned long ua, unsigned int pageshift, unsigned long *hpa);
39	extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,	39	extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
40	unsigned long ua, unsigned int pageshift, unsigned long *hpa);	40	unsigned long ua, unsigned int pageshift, unsigned long *hpa);
		41	extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua);
41	extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);	42	extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
42	extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);	43	extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
43	#endif	44	#endif

arch/powerpc/include/asm/setup.h+1−0

@@ -9,6 +9,7 @@ extern void ppc_printk_progress(char *s, unsigned short hex); · 8 unmodified lines
9		9
10	extern unsigned int rtas_data;	10	extern unsigned int rtas_data;
11	extern unsigned long long memory_limit;	11	extern unsigned long long memory_limit;
		12	extern bool init_mem_is_free;
12	extern unsigned long klimit;	13	extern unsigned long klimit;
13	extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);	14	extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
14		15

arch/powerpc/kernel/exceptions-64s.S+2−2

 #ifdef CONFIG_PPC_DENORMALISATION
 	mfspr	r10,SPRN_HSRR1
-	mfspr	r11,SPRN_HSRR0		/* save HSRR0 */
 	andis.	r10,r10,(HSRR1_DENORM)@h /* denorm? */
-	addi	r11,r11,-4		/* HSRR0 is next instruction */
 	bne+	denorm_assist
 #endif
  */
 	XVCPSGNDP32(32)
 denorm_done:
+	mfspr	r11,SPRN_HSRR0
+	subi	r11,r11,4
 	mtspr	SPRN_HSRR0,r11
 	mtcrf	0x80,r9
 	ld	r9,PACA_EXGEN+EX_R9(r13)

arch/powerpc/kernel/iommu.c+0−25

@@ -1013,31 +1013,6 @@ long iommu_tce_xchg(struct iommu_table *tbl, unsigned long entry, · 1012 unmodified lines
1013	}	1013	}
1014	EXPORT_SYMBOL_GPL(iommu_tce_xchg);	1014	EXPORT_SYMBOL_GPL(iommu_tce_xchg);
1015		1015
1016	#ifdef CONFIG_PPC_BOOK3S_64
1017	long iommu_tce_xchg_rm(struct iommu_table *tbl, unsigned long entry,
1018	unsigned long hpa, enum dma_data_direction direction)
1019	{
1020	long ret;
1021
1022	ret = tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
1023
1024	if (!ret && ((*direction == DMA_FROM_DEVICE) \|\|
1025	(*direction == DMA_BIDIRECTIONAL))) {
1026	struct page pg = realmode_pfn_to_page(hpa >> PAGE_SHIFT);
1027
1028	if (likely(pg)) {
1029	SetPageDirty(pg);
1030	} else {
1031	tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
1032	ret = -EFAULT;
1033	}
1034	}
1035
1036	return ret;
1037	}
1038	EXPORT_SYMBOL_GPL(iommu_tce_xchg_rm);
1039	#endif
1040
1041	int iommu_take_ownership(struct iommu_table *tbl)	1016	int iommu_take_ownership(struct iommu_table *tbl)
1042	{	1017	{
1043	unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;	1018	unsigned long flags, i, sz = (tbl->it_size + 7) >> 3;

arch/powerpc/kernel/tm.S+17−3

 	std	r1, PACATMSCRATCH(r13)
 	ld	r1, PACAR1(r13)
-	/* Store the PPR in r11 and reset to decent value */
 	std	r11, GPR11(r1)			/* Temporary stash */
+	/*
+	 * Move the saved user r1 to the kernel stack in case PACATMSCRATCH is
+	 * clobbered by an exception once we turn on MSR_RI below.
+	 */
+	ld	r11, PACATMSCRATCH(r13)
+	std	r11, GPR1(r1)
+	/*
+	 * Store r13 away so we can free up the scratch SPR for the SLB fault
+	 * handler (needed once we start accessing the thread_struct).
+	 */
+	GET_SCRATCH0(r11)
+	std	r11, GPR13(r1)
 	/* Reset MSR RI so we can take SLB faults again */
 	li	r11, MSR_RI
 	mtmsrd	r11, 1
+	/* Store the PPR in r11 and reset to decent value */
 	mfspr	r11, SPRN_PPR
 	HMT_MEDIUM
 	SAVE_GPR(8, r7)				/* user r8 */
 	SAVE_GPR(9, r7)				/* user r9 */
 	SAVE_GPR(10, r7)			/* user r10 */
-	ld	r3, PACATMSCRATCH(r13)		/* user r1 */
+	ld	r3, GPR1(r1)			/* user r1 */
 	ld	r4, GPR7(r1)			/* user r7 */
 	ld	r5, GPR11(r1)			/* user r11 */
 	ld	r6, GPR12(r1)			/* user r12 */
-	GET_SCRATCH0(8)				/* user r13 */
+	ld	r8, GPR13(r1)			/* user r13 */
 	std	r3, GPR1(r7)
 	std	r4, GPR7(r7)
 	std	r5, GPR11(r7)

arch/powerpc/kvm/book3s_64_mmu_hv.c+1−1

@@ -358,7 +358,7 @@ static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, · 357 unmodified lines
358	unsigned long pp, key;	358	unsigned long pp, key;
359	unsigned long v, orig_v, gr;	359	unsigned long v, orig_v, gr;
360	__be64 *hptep;	360	__be64 *hptep;
361	int index;	361	long int index;
362	int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);	362	int virtmode = vcpu->arch.shregs.msr & (data ? MSR_DR : MSR_IR);
363		363
364	if (kvm_is_radix(vcpu->kvm))	364	if (kvm_is_radix(vcpu->kvm))

arch/powerpc/kvm/book3s_64_mmu_radix.c+40−57

@@ -525,8 +525,8 @@ int kvmppc_book3s_radix_page_fault(struct kvm_run run, struct kvm_vcpu vcpu, · 524 unmodified lines
525	unsigned long ea, unsigned long dsisr)	525	unsigned long ea, unsigned long dsisr)
526	{	526	{
527	struct kvm *kvm = vcpu->kvm;	527	struct kvm *kvm = vcpu->kvm;
528	unsigned long mmu_seq, pte_size;	528	unsigned long mmu_seq;
529	unsigned long gpa, gfn, hva, pfn;	529	unsigned long gpa, gfn, hva;
530	struct kvm_memory_slot *memslot;	530	struct kvm_memory_slot *memslot;
531	struct page *page = NULL;	531	struct page *page = NULL;
532	long ret;	532	long ret;
@@ -623,9 +623,10 @@ int kvmppc_book3s_radix_page_fault(struct kvm_run run, struct kvm_vcpu vcpu, · 90 unmodified lines
623	*/	623	*/
624	hva = gfn_to_hva_memslot(memslot, gfn);	624	hva = gfn_to_hva_memslot(memslot, gfn);
625	if (upgrade_p && __get_user_pages_fast(hva, 1, 1, &page) == 1) {	625	if (upgrade_p && __get_user_pages_fast(hva, 1, 1, &page) == 1) {
626	pfn = page_to_pfn(page);
627	upgrade_write = true;	626	upgrade_write = true;
628	} else {	627	} else {
		628	unsigned long pfn;
		629
629	/* Call KVM generic code to do the slow-path check */	630	/* Call KVM generic code to do the slow-path check */
630	pfn = __gfn_to_pfn_memslot(memslot, gfn, false, NULL,	631	pfn = __gfn_to_pfn_memslot(memslot, gfn, false, NULL,
631	writing, upgrade_p);	632	writing, upgrade_p);
@@ -639,63 +640,45 @@ int kvmppc_book3s_radix_page_fault(struct kvm_run run, struct kvm_vcpu vcpu, · 7 unmodified lines
639	}	640	}
640	}	641	}
641		642
642	/* See if we can insert a 1GB or 2MB large PTE here */
643	level = 0;
644	if (page && PageCompound(page)) {
645	pte_size = PAGE_SIZE << compound_order(compound_head(page));
646	if (pte_size >= PUD_SIZE &&
647	(gpa & (PUD_SIZE - PAGE_SIZE)) ==
648	(hva & (PUD_SIZE - PAGE_SIZE))) {
649	level = 2;
650	pfn &= ~((PUD_SIZE >> PAGE_SHIFT) - 1);
651	} else if (pte_size >= PMD_SIZE &&
652	(gpa & (PMD_SIZE - PAGE_SIZE)) ==
653	(hva & (PMD_SIZE - PAGE_SIZE))) {
654	level = 1;
655	pfn &= ~((PMD_SIZE >> PAGE_SHIFT) - 1);
656	}
657	}
658
659	/*	643	/*
660	* Compute the PTE value that we need to insert.	644	* Read the PTE from the process' radix tree and use that
		645	* so we get the shift and attribute bits.
661	*/	646	*/
662	if (page) {	647	local_irq_disable();
663	pgflags = _PAGE_READ \| _PAGE_EXEC \| _PAGE_PRESENT \| _PAGE_PTE \|	648	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);
664	_PAGE_ACCESSED;	649	pte = *ptep;
665	if (writing \|\| upgrade_write)	650	local_irq_enable();
666	pgflags \|= _PAGE_WRITE \| _PAGE_DIRTY;	651
667	pte = pfn_pte(pfn, __pgprot(pgflags));	652	/* Get pte level from shift/size */
		653	if (shift == PUD_SHIFT &&
		654	(gpa & (PUD_SIZE - PAGE_SIZE)) ==
		655	(hva & (PUD_SIZE - PAGE_SIZE))) {
		656	level = 2;
		657	} else if (shift == PMD_SHIFT &&
		658	(gpa & (PMD_SIZE - PAGE_SIZE)) ==
		659	(hva & (PMD_SIZE - PAGE_SIZE))) {
		660	level = 1;
668	} else {	661	} else {
669	/*	662	level = 0;
670	* Read the PTE from the process' radix tree and use that	663	if (shift > PAGE_SHIFT) {
671	* so we get the attribute bits.	664	/*
672	*/	665	* If the pte maps more than one page, bring over
673	local_irq_disable();	666	* bits from the virtual address to get the real
674	ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift);	667	* address of the specific single page we want.
675	pte = *ptep;	668	*/
676	local_irq_enable();	669	unsigned long rpnmask = (1ul << shift) - PAGE_SIZE;
677	if (shift == PUD_SHIFT &&	670	pte = __pte(pte_val(pte) \| (hva & rpnmask));
678	(gpa & (PUD_SIZE - PAGE_SIZE)) ==
679	(hva & (PUD_SIZE - PAGE_SIZE))) {
680	level = 2;
681	} else if (shift == PMD_SHIFT &&
682	(gpa & (PMD_SIZE - PAGE_SIZE)) ==
683	(hva & (PMD_SIZE - PAGE_SIZE))) {
684	level = 1;
685	} else if (shift && shift != PAGE_SHIFT) {
686	/* Adjust PFN */
687	unsigned long mask = (1ul << shift) - PAGE_SIZE;
688	pte = __pte(pte_val(pte) \| (hva & mask));
689	}
690	pte = __pte(pte_val(pte) \| _PAGE_EXEC \| _PAGE_ACCESSED);
691	if (writing \|\| upgrade_write) {
692	if (pte_val(pte) & _PAGE_WRITE)
693	pte = __pte(pte_val(pte) \| _PAGE_DIRTY);
694	} else {
695	pte = __pte(pte_val(pte) & ~(_PAGE_WRITE \| _PAGE_DIRTY));
696	}	671	}
697	}	672	}
698		673
		674	pte = __pte(pte_val(pte) \| _PAGE_EXEC \| _PAGE_ACCESSED);
		675	if (writing \|\| upgrade_write) {
		676	if (pte_val(pte) & _PAGE_WRITE)
		677	pte = __pte(pte_val(pte) \| _PAGE_DIRTY);
		678	} else {
		679	pte = __pte(pte_val(pte) & ~(_PAGE_WRITE \| _PAGE_DIRTY));
		680	}
		681
699	/* Allocate space in the tree and write the PTE */	682	/* Allocate space in the tree and write the PTE */
700	ret = kvmppc_create_pte(kvm, pte, gpa, level, mmu_seq);	683	ret = kvmppc_create_pte(kvm, pte, gpa, level, mmu_seq);
701		684
@@ -725,10 +708,10 @@ int kvm_unmap_radix(struct kvm kvm, struct kvm_memory_slot memslot, · 23 unmodified lines
725	gpa, shift);	708	gpa, shift);
726	kvmppc_radix_tlbie_page(kvm, gpa, shift);	709	kvmppc_radix_tlbie_page(kvm, gpa, shift);
727	if ((old & _PAGE_DIRTY) && memslot->dirty_bitmap) {	710	if ((old & _PAGE_DIRTY) && memslot->dirty_bitmap) {
728	unsigned long npages = 1;	711	unsigned long psize = PAGE_SIZE;
729	if (shift)	712	if (shift)
730	npages = 1ul << (shift - PAGE_SHIFT);	713	psize = 1ul << shift;
731	kvmppc_update_dirty_map(memslot, gfn, npages);	714	kvmppc_update_dirty_map(memslot, gfn, psize);
732	}	715	}
733	}	716	}
734	return 0;	717	return 0;

arch/powerpc/kvm/book3s_64_vio_hv.c+31−8

 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_ua);
 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
-static void kvmppc_rm_clear_tce(struct iommu_table *tbl, unsigned long entry)
+static long iommu_tce_xchg_rm(struct mm_struct *mm, struct iommu_table *tbl,
+		unsigned long entry, unsigned long *hpa,
+		enum dma_data_direction *direction)
+{
+	long ret;
+	ret = tbl->it_ops->exchange_rm(tbl, entry, hpa, direction);
+	if (!ret && ((*direction == DMA_FROM_DEVICE) ||
+				(*direction == DMA_BIDIRECTIONAL))) {
+		__be64 *pua = IOMMU_TABLE_USERSPACE_ENTRY_RM(tbl, entry);
+		/*
+		 * kvmppc_rm_tce_iommu_do_map() updates the UA cache after
+		 * calling this so we still get here a valid UA.
+		 */
+		if (pua && *pua)
+			mm_iommu_ua_mark_dirty_rm(mm, be64_to_cpu(*pua));
+	}
+	return ret;
+}
+static void kvmppc_rm_clear_tce(struct kvm *kvm, struct iommu_table *tbl,
+		unsigned long entry)
 {
 	unsigned long hpa = 0;
 	enum dma_data_direction dir = DMA_NONE;
-	iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
+	iommu_tce_xchg_rm(kvm->mm, tbl, entry, &hpa, &dir);
 }
 static long kvmppc_rm_tce_iommu_mapped_dec(struct kvm *kvm,
 	unsigned long hpa = 0;
 	long ret;
-	if (iommu_tce_xchg_rm(tbl, entry, &hpa, &dir))
+	if (iommu_tce_xchg_rm(kvm->mm, tbl, entry, &hpa, &dir))
 		/*
 		 * real mode xchg can fail if struct page crosses
 		 * a page boundary
 	ret = kvmppc_rm_tce_iommu_mapped_dec(kvm, tbl, entry);
 	if (ret)
-		iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
+		iommu_tce_xchg_rm(kvm->mm, tbl, entry, &hpa, &dir);
 	return ret;
 }
 	if (WARN_ON_ONCE_RM(mm_iommu_mapped_inc(mem)))
 		return H_CLOSED;
-	ret = iommu_tce_xchg_rm(tbl, entry, &hpa, &dir);
+	ret = iommu_tce_xchg_rm(kvm->mm, tbl, entry, &hpa, &dir);
 	if (ret) {
 		mm_iommu_mapped_dec(mem);
 		/*
 			return ret;
 		WARN_ON_ONCE_RM(1);
-		kvmppc_rm_clear_tce(stit->tbl, entry);
+		kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
 	}
 	kvmppc_tce_put(stt, entry, tce);
 				goto unlock_exit;
 			WARN_ON_ONCE_RM(1);
-			kvmppc_rm_clear_tce(stit->tbl, entry);
+			kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
 		}
 		kvmppc_tce_put(stt, entry + i, tce);
 				return ret;
 			WARN_ON_ONCE_RM(1);
-			kvmppc_rm_clear_tce(stit->tbl, entry);
+			kvmppc_rm_clear_tce(vcpu->kvm, stit->tbl, entry);
 		}
 	}

arch/powerpc/lib/checksum_64.S+3−0

 	addc	r0, r8, r9
 	ld	r10, 0(r4)
 	ld	r11, 8(r4)
+#ifdef CONFIG_CPU_LITTLE_ENDIAN
+	rotldi	r5, r5, 8
+#endif
 	adde	r0, r0, r10
 	add	r5, r5, r7
 	adde	r0, r0, r11

arch/powerpc/lib/code-patching.c+6−0

 {
 	int err;
+	/* Make sure we aren't patching a freed init section */
+	if (init_mem_is_free && init_section_contains(exec_addr, 4)) {
+		pr_debug("Skipping init section patching addr: 0x%px\n", exec_addr);
+		return 0;
+	}
 	__put_user_size(instr, patch_addr, 4, err);
 	if (err)
 		return err;

arch/powerpc/mm/init_64.c+0−49

@@ -308,55 +308,6 @@ void register_page_bootmem_memmap(unsigned long section_nr, · 307 unmodified lines
308	{	308	{
309	}	309	}
310		310
311	/*
312	* We do not have access to the sparsemem vmemmap, so we fallback to
313	* walking the list of sparsemem blocks which we already maintain for
314	* the sake of crashdump. In the long run, we might want to maintain
315	* a tree if performance of that linear walk becomes a problem.
316	*
317	* realmode_pfn_to_page functions can fail due to:
318	* 1) As real sparsemem blocks do not lay in RAM continously (they
319	* are in virtual address space which is not available in the real mode),
320	* the requested page struct can be split between blocks so get_page/put_page
321	* may fail.
322	* 2) When huge pages are used, the get_page/put_page API will fail
323	* in real mode as the linked addresses in the page struct are virtual
324	* too.
325	*/
326	struct page *realmode_pfn_to_page(unsigned long pfn)
327	{
328	struct vmemmap_backing *vmem_back;
329	struct page *page;
330	unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift;
331	unsigned long pg_va = (unsigned long) pfn_to_page(pfn);
332
333	for (vmem_back = vmemmap_list; vmem_back; vmem_back = vmem_back->list) {
334	if (pg_va < vmem_back->virt_addr)
335	continue;
336
337	/* After vmemmap_list entry free is possible, need check all */
338	if ((pg_va + sizeof(struct page)) <=
339	(vmem_back->virt_addr + page_size)) {
340	page = (struct page *) (vmem_back->phys + pg_va -
341	vmem_back->virt_addr);
342	return page;
343	}
344	}
345
346	/* Probably that page struct is split between real pages */
347	return NULL;
348	}
349	EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
350
351	#else
352
353	struct page *realmode_pfn_to_page(unsigned long pfn)
354	{
355	struct page *page = pfn_to_page(pfn);
356	return page;
357	}
358	EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
359
360	#endif /* CONFIG_SPARSEMEM_VMEMMAP */	311	#endif /* CONFIG_SPARSEMEM_VMEMMAP */
361		312
362	#ifdef CONFIG_PPC_BOOK3S_64	313	#ifdef CONFIG_PPC_BOOK3S_64

arch/powerpc/mm/mem.c+2−0

 #endif
 unsigned long long memory_limit;
+bool init_mem_is_free;
 #ifdef CONFIG_HIGHMEM
 pte_t *kmap_pte;
 {
 	ppc_md.progress = ppc_printk_progress;
 	mark_initmem_nx();
+	init_mem_is_free = true;
 	free_initmem_default(POISON_FREE_INITMEM);
 }

arch/powerpc/mm/mmu_context_iommu.c+30−4

@@ -18,11 +18,15 @@ · 17 unmodified lines
18	#include <linux/migrate.h>	18	#include <linux/migrate.h>
19	#include <linux/hugetlb.h>	19	#include <linux/hugetlb.h>
20	#include <linux/swap.h>	20	#include <linux/swap.h>
		21	#include <linux/sizes.h>
21	#include <asm/mmu_context.h>	22	#include <asm/mmu_context.h>
22	#include <asm/pte-walk.h>	23	#include <asm/pte-walk.h>
23		24
24	static DEFINE_MUTEX(mem_list_mutex);	25	static DEFINE_MUTEX(mem_list_mutex);
25		26
		27	#define MM_IOMMU_TABLE_GROUP_PAGE_DIRTY 0x1
		28	#define MM_IOMMU_TABLE_GROUP_PAGE_MASK ~(SZ_4K - 1)
		29
26	struct mm_iommu_table_group_mem_t {	30	struct mm_iommu_table_group_mem_t {
27	struct list_head next;	31	struct list_head next;
28	struct rcu_head rcu;	32	struct rcu_head rcu;
@@ -263,6 +267,9 @@ static void mm_iommu_unpin(struct mm_iommu_table_group_mem_t *mem) · 234 unmodified lines
263	if (!page)	267	if (!page)
264	continue;	268	continue;
265		269
		270	if (mem->hpas[i] & MM_IOMMU_TABLE_GROUP_PAGE_DIRTY)
		271	SetPageDirty(page);
		272
266	put_page(page);	273	put_page(page);
267	mem->hpas[i] = 0;	274	mem->hpas[i] = 0;
268	}	275	}
@@ -360,7 +367,6 @@ struct mm_iommu_table_group_mem_t mm_iommu_lookup_rm(struct mm_struct mm, · 91 unmodified lines
360		367
361	return ret;	368	return ret;
362	}	369	}
363	EXPORT_SYMBOL_GPL(mm_iommu_lookup_rm);
364		370
365	struct mm_iommu_table_group_mem_t mm_iommu_find(struct mm_struct mm,	371	struct mm_iommu_table_group_mem_t mm_iommu_find(struct mm_struct mm,
366	unsigned long ua, unsigned long entries)	372	unsigned long ua, unsigned long entries)
@@ -390,7 +396,7 @@ long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, · 23 unmodified lines
390	if (pageshift > mem->pageshift)	396	if (pageshift > mem->pageshift)
391	return -EFAULT;	397	return -EFAULT;
392		398
393	hpa = va \| (ua & ~PAGE_MASK);	399	hpa = (va & MM_IOMMU_TABLE_GROUP_PAGE_MASK) \| (ua & ~PAGE_MASK);
394		400
395	return 0;	401	return 0;
396	}	402	}
@@ -413,11 +419,31 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem, · 16 unmodified lines
413	if (!pa)	419	if (!pa)
414	return -EFAULT;	420	return -EFAULT;
415		421
416	hpa = pa \| (ua & ~PAGE_MASK);	422	hpa = (pa & MM_IOMMU_TABLE_GROUP_PAGE_MASK) \| (ua & ~PAGE_MASK);
417		423
418	return 0;	424	return 0;
419	}	425	}
420	EXPORT_SYMBOL_GPL(mm_iommu_ua_to_hpa_rm);	426
		427	extern void mm_iommu_ua_mark_dirty_rm(struct mm_struct *mm, unsigned long ua)
		428	{
		429	struct mm_iommu_table_group_mem_t *mem;
		430	long entry;
		431	void *va;
		432	unsigned long *pa;
		433
		434	mem = mm_iommu_lookup_rm(mm, ua, PAGE_SIZE);
		435	if (!mem)
		436	return;
		437
		438	entry = (ua - mem->ua) >> PAGE_SHIFT;
		439	va = &mem->hpas[entry];
		440
		441	pa = (void *) vmalloc_to_phys(va);
		442	if (!pa)
		443	return;
		444
		445	*pa \|= MM_IOMMU_TABLE_GROUP_PAGE_DIRTY;
		446	}
421		447
422	long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem)	448	long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem)
423	{	449	{

arch/powerpc/mm/numa.c+5−2

 	int new_nid;
 	/* Use associativity from first thread for all siblings */
-	vphn_get_associativity(cpu, associativity);
+	if (vphn_get_associativity(cpu, associativity))
+		return cpu_to_node(cpu);
 	new_nid = associativity_to_nid(associativity);
 	if (new_nid < 0 || !node_possible(new_nid))
 		new_nid = first_online_node;
 static void reset_topology_timer(void)
 {
-	mod_timer(&topology_timer, jiffies + topology_timer_secs * HZ);
+	if (vphn_enabled)
+		mod_timer(&topology_timer, jiffies + topology_timer_secs * HZ);
 }
 #ifdef CONFIG_SMP

arch/powerpc/mm/pkeys.c+1−1

@@ -45,7 +45,7 @@ static void scan_pkey_feature(void) · 44 unmodified lines
45	* Since any pkey can be used for data or execute, we will just treat	45	* Since any pkey can be used for data or execute, we will just treat
46	* all keys as equal and track them as one entity.	46	* all keys as equal and track them as one entity.
47	*/	47	*/
48	pkeys_total = be32_to_cpu(vals[0]);	48	pkeys_total = vals[0];
49	pkeys_devtree_defined = true;	49	pkeys_devtree_defined = true;
50	}	50	}
51		51

arch/powerpc/platforms/powernv/pci-ioda-tce.c+1−1

@@ -276,7 +276,7 @@ long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset, · 275 unmodified lines
276	level_shift = entries_shift + 3;	276	level_shift = entries_shift + 3;
277	level_shift = max_t(unsigned int, level_shift, PAGE_SHIFT);	277	level_shift = max_t(unsigned int, level_shift, PAGE_SHIFT);
278		278
279	if ((level_shift - 3) * levels + page_shift >= 60)	279	if ((level_shift - 3) * levels + page_shift >= 55)
280	return -EINVAL;	280	return -EINVAL;
281		281
282	/* Allocate TCE table */	282	/* Allocate TCE table */

arch/riscv/include/asm/asm-prototypes.h+7−0

@@ -0,0 +1,7 @@
	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	#ifndef _ASM_RISCV_PROTOTYPES_H
	3
	4	#include <linux/ftrace.h>
	5	#include <asm-generic/asm-prototypes.h>
	6
	7	#endif /* _ASM_RISCV_PROTOTYPES_H */

arch/riscv/kernel/setup.c+0−7

 #ifdef CONFIG_BLK_DEV_INITRD
 static void __init setup_initrd(void)
 {
-	extern char __initramfs_start[];
-	extern unsigned long __initramfs_size;
 	unsigned long size;
-	if (__initramfs_size > 0) {
-		initrd_start = (unsigned long)(&__initramfs_start);
-		initrd_end = initrd_start + __initramfs_size;
-	}
 	if (initrd_start >= initrd_end) {
 		printk(KERN_INFO "initrd not found or empty");
 		goto disable;

arch/s390/crypto/paes_s390.c+1−1

@@ -208,7 +208,7 @@ static int cbc_paes_crypt(struct blkcipher_desc *desc, unsigned long modifier, · 207 unmodified lines
208	walk->dst.virt.addr, walk->src.virt.addr, n);	208	walk->dst.virt.addr, walk->src.virt.addr, n);
209	if (k)	209	if (k)
210	ret = blkcipher_walk_done(desc, walk, nbytes - k);	210	ret = blkcipher_walk_done(desc, walk, nbytes - k);
211	if (n < k) {	211	if (k < n) {
212	if (__cbc_paes_set_key(ctx) != 0)	212	if (__cbc_paes_set_key(ctx) != 0)
213	return blkcipher_walk_done(desc, walk, -EIO);	213	return blkcipher_walk_done(desc, walk, -EIO);
214	memcpy(param.key, ctx->pk.protkey, MAXPROTKEYSIZE);	214	memcpy(param.key, ctx->pk.protkey, MAXPROTKEYSIZE);

arch/s390/include/asm/mmu.h+7−1

 	unsigned long asce;
 	unsigned long asce_limit;
 	unsigned long vdso_base;
-	/* The mmu context allocates 4K page tables. */
+	/*
+	 * The following bitfields need a down_write on the mm
+	 * semaphore when they are written to. As they are only
+	 * written once, they can be read without a lock.
+	 *
+	 * The mmu context allocates 4K page tables.
+	 */
 	unsigned int alloc_pgste:1;
 	/* The mmu context uses extended page tables. */
 	unsigned int has_pgste:1;

arch/s390/kvm/kvm-s390.c+4−2

 		break;
 	case KVM_CAP_S390_HPAGE_1M:
 		r = 0;
-		if (hpage)
+		if (hpage && !kvm_is_ucontrol(kvm))
 			r = 1;
 		break;
 	case KVM_CAP_S390_MEM_OP:
 		mutex_lock(&kvm->lock);
 		if (kvm->created_vcpus)
 			r = -EBUSY;
-		else if (!hpage || kvm->arch.use_cmma)
+		else if (!hpage || kvm->arch.use_cmma || kvm_is_ucontrol(kvm))
 			r = -EINVAL;
 		else {
 			r = 0;
+			down_write(&kvm->mm->mmap_sem);
 			kvm->mm->context.allow_gmap_hpage_1m = 1;
+			up_write(&kvm->mm->mmap_sem);
 			/*
 			 * We might have to create fake 4k page
 			 * tables. To avoid that the hardware works on

arch/s390/kvm/priv.c+18−12

@@ -280,9 +280,11 @@ retry: · 279 unmodified lines
280	goto retry;	280	goto retry;
281	}	281	}
282	}	282	}
283	if (rc)
284	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
285	up_read(&current->mm->mmap_sem);	283	up_read(&current->mm->mmap_sem);
		284	if (rc == -EFAULT)
		285	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
		286	if (rc < 0)
		287	return rc;
286	vcpu->run->s.regs.gprs[reg1] &= ~0xff;	288	vcpu->run->s.regs.gprs[reg1] &= ~0xff;
287	vcpu->run->s.regs.gprs[reg1] \|= key;	289	vcpu->run->s.regs.gprs[reg1] \|= key;
288	return 0;	290	return 0;
@@ -324,9 +326,11 @@ retry: · 35 unmodified lines
324	goto retry;	326	goto retry;
325	}	327	}
326	}	328	}
327	if (rc < 0)
328	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
329	up_read(&current->mm->mmap_sem);	329	up_read(&current->mm->mmap_sem);
		330	if (rc == -EFAULT)
		331	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
		332	if (rc < 0)
		333	return rc;
330	kvm_s390_set_psw_cc(vcpu, rc);	334	kvm_s390_set_psw_cc(vcpu, rc);
331	return 0;	335	return 0;
332	}	336	}
@@ -390,12 +394,12 @@ static int handle_sske(struct kvm_vcpu *vcpu) · 57 unmodified lines
390	FAULT_FLAG_WRITE, &unlocked);	394	FAULT_FLAG_WRITE, &unlocked);
391	rc = !rc ? -EAGAIN : rc;	395	rc = !rc ? -EAGAIN : rc;
392	}	396	}
		397	up_read(&current->mm->mmap_sem);
393	if (rc == -EFAULT)	398	if (rc == -EFAULT)
394	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);	399	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
395		400	if (rc < 0)
396	up_read(&current->mm->mmap_sem);	401	return rc;
397	if (rc >= 0)	402	start += PAGE_SIZE;
398	start += PAGE_SIZE;
399	}	403	}
400		404
401	if (m3 & (SSKE_MC \| SSKE_MR)) {	405	if (m3 & (SSKE_MC \| SSKE_MR)) {
@@ -1002,13 +1006,15 @@ static int handle_pfmf(struct kvm_vcpu *vcpu) · 600 unmodified lines
1002	FAULT_FLAG_WRITE, &unlocked);	1006	FAULT_FLAG_WRITE, &unlocked);
1003	rc = !rc ? -EAGAIN : rc;	1007	rc = !rc ? -EAGAIN : rc;
1004	}	1008	}
		1009	up_read(&current->mm->mmap_sem);
1005	if (rc == -EFAULT)	1010	if (rc == -EFAULT)
1006	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);	1011	return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1007		1012	if (rc == -EAGAIN)
1008	up_read(&current->mm->mmap_sem);	1013	continue;
1009	if (rc >= 0)	1014	if (rc < 0)
1010	start += PAGE_SIZE;	1015	return rc;
1011	}	1016	}
		1017	start += PAGE_SIZE;
1012	}	1018	}
1013	if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {	1019	if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
1014	if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {	1020	if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {

arch/s390/kvm/vsie.c+2−1

@@ -173,7 +173,8 @@ static int shadow_crycb(struct kvm_vcpu vcpu, struct vsie_page vsie_page) · 172 unmodified lines
173	return set_validity_icpt(scb_s, 0x0039U);	173	return set_validity_icpt(scb_s, 0x0039U);
174		174
175	/* copy only the wrapping keys */	175	/* copy only the wrapping keys */
176	if (read_guest_real(vcpu, crycb_addr + 72, &vsie_page->crycb, 56))	176	if (read_guest_real(vcpu, crycb_addr + 72,
		177	vsie_page->crycb.dea_wrapping_key_mask, 56))
177	return set_validity_icpt(scb_s, 0x0035U);	178	return set_validity_icpt(scb_s, 0x0035U);
178		179
179	scb_s->ecb3 \|= ecb3_flags;	180	scb_s->ecb3 \|= ecb3_flags;

arch/s390/mm/gmap.c+3−1

 		vmaddr |= gaddr & ~PMD_MASK;
 		/* Find vma in the parent mm */
 		vma = find_vma(gmap->mm, vmaddr);
+		if (!vma)
+			continue;
 		/*
 		 * We do not discard pages that are backed by
 		 * hugetlbfs, so we don't have to refault them.
 		 */
-		if (vma && is_vm_hugetlb_page(vma))
+		if (is_vm_hugetlb_page(vma))
 			continue;
 		size = min(to - gaddr, PMD_SIZE - (gaddr & ~PMD_MASK));
 		zap_page_range(vma, vmaddr, size);

arch/x86/boot/compressed/mem_encrypt.S+0−19

 	push	%ebx
 	push	%ecx
 	push	%edx
-	push	%edi
-	/*
-	 * RIP-relative addressing is needed to access the encryption bit
-	 * variable. Since we are running in 32-bit mode we need this call/pop
-	 * sequence to get the proper relative addressing.
-	 */
-	call	1f
-1:	popl	%edi
-	subl	$1b, %edi
-	movl	enc_bit(%edi), %eax
-	cmpl	$0, %eax
-	jge	.Lsev_exit
 	/* Check if running under a hypervisor */
 	movl	$1, %eax
 	movl	%ebx, %eax
 	andl	$0x3f, %eax		/* Return the encryption bit location */
-	movl	%eax, enc_bit(%edi)
 	jmp	.Lsev_exit
 .Lno_sev:
 	xor	%eax, %eax
-	movl	%eax, enc_bit(%edi)
 .Lsev_exit:
-	pop	%edi
 	pop	%edx
 	pop	%ecx
 	pop	%ebx
 ENDPROC(set_sev_encryption_mask)
 	.data
-enc_bit:
-	.int	0xffffffff
 #ifdef CONFIG_AMD_MEM_ENCRYPT
 	.balign	8

arch/x86/crypto/aegis128-aesni-glue.c+0−1

@@ -379,7 +379,6 @@ static int __init crypto_aegis128_aesni_module_init(void) · 378 unmodified lines
379	{	379	{
380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|	380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
381	!boot_cpu_has(X86_FEATURE_AES) \|\|	381	!boot_cpu_has(X86_FEATURE_AES) \|\|
382	!boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
383	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))	382	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
384	return -ENODEV;	383	return -ENODEV;
385		384

arch/x86/crypto/aegis128l-aesni-glue.c+0−1

@@ -379,7 +379,6 @@ static int __init crypto_aegis128l_aesni_module_init(void) · 378 unmodified lines
379	{	379	{
380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|	380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
381	!boot_cpu_has(X86_FEATURE_AES) \|\|	381	!boot_cpu_has(X86_FEATURE_AES) \|\|
382	!boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
383	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))	382	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
384	return -ENODEV;	383	return -ENODEV;
385		384

arch/x86/crypto/aegis256-aesni-glue.c+0−1

@@ -379,7 +379,6 @@ static int __init crypto_aegis256_aesni_module_init(void) · 378 unmodified lines
379	{	379	{
380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|	380	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
381	!boot_cpu_has(X86_FEATURE_AES) \|\|	381	!boot_cpu_has(X86_FEATURE_AES) \|\|
382	!boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
383	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))	382	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
384	return -ENODEV;	383	return -ENODEV;
385		384

arch/x86/crypto/morus1280-sse2-glue.c+0−1

@@ -40,7 +40,6 @@ MORUS1280_DECLARE_ALGS(sse2, "morus1280-sse2", 350); · 39 unmodified lines
40	static int __init crypto_morus1280_sse2_module_init(void)	40	static int __init crypto_morus1280_sse2_module_init(void)
41	{	41	{
42	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|	42	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
43	!boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
44	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))	43	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
45	return -ENODEV;	44	return -ENODEV;
46		45

arch/x86/crypto/morus640-sse2-glue.c+0−1

@@ -40,7 +40,6 @@ MORUS640_DECLARE_ALGS(sse2, "morus640-sse2", 400); · 39 unmodified lines
40	static int __init crypto_morus640_sse2_module_init(void)	40	static int __init crypto_morus640_sse2_module_init(void)
41	{	41	{
42	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|	42	if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
43	!boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
44	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))	43	!cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
45	return -ENODEV;	44	return -ENODEV;
46		45

arch/x86/events/intel/lbr.c+4−0

@@ -1272,4 +1272,8 @@ void intel_pmu_lbr_init_knl(void) · 1271 unmodified lines
1272		1272
1273	x86_pmu.lbr_sel_mask = LBR_SEL_MASK;	1273	x86_pmu.lbr_sel_mask = LBR_SEL_MASK;
1274	x86_pmu.lbr_sel_map = snb_lbr_sel_map;	1274	x86_pmu.lbr_sel_map = snb_lbr_sel_map;
		1275
		1276	/* Knights Landing does have MISPREDICT bit */
		1277	if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_LIP)
		1278	x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS;
1275	}	1279	}

arch/x86/hyperv/hv_apic.c+4−4

@@ -95,8 +95,8 @@ static void hv_apic_eoi_write(u32 reg, u32 val) · 94 unmodified lines
95	*/	95	*/
96	static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector)	96	static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector)
97	{	97	{
98	struct ipi_arg_ex **arg;	98	struct hv_send_ipi_ex **arg;
99	struct ipi_arg_ex *ipi_arg;	99	struct hv_send_ipi_ex *ipi_arg;
100	unsigned long flags;	100	unsigned long flags;
101	int nr_bank = 0;	101	int nr_bank = 0;
102	int ret = 1;	102	int ret = 1;
@@ -105,7 +105,7 @@ static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector) · 2 unmodified lines
105	return false;	105	return false;
106		106
107	local_irq_save(flags);	107	local_irq_save(flags);
108	arg = (struct ipi_arg_ex **)this_cpu_ptr(hyperv_pcpu_input_arg);	108	arg = (struct hv_send_ipi_ex **)this_cpu_ptr(hyperv_pcpu_input_arg);
109		109
110	ipi_arg = *arg;	110	ipi_arg = *arg;
111	if (unlikely(!ipi_arg))	111	if (unlikely(!ipi_arg))
@@ -135,7 +135,7 @@ ipi_mask_ex_done: · 23 unmodified lines
135	static bool __send_ipi_mask(const struct cpumask *mask, int vector)	135	static bool __send_ipi_mask(const struct cpumask *mask, int vector)
136	{	136	{
137	int cur_cpu, vcpu;	137	int cur_cpu, vcpu;
138	struct ipi_arg_non_ex ipi_arg;	138	struct hv_send_ipi ipi_arg;
139	int ret = 1;	139	int ret = 1;
140		140
141	trace_hyperv_send_ipi_mask(mask, vector);	141	trace_hyperv_send_ipi_mask(mask, vector);

arch/x86/include/asm/atomic.h+6−6

  * true if the result is zero, or false for all
  * other cases.
  */
-#define arch_atomic_sub_and_test arch_atomic_sub_and_test
 static __always_inline bool arch_atomic_sub_and_test(int i, atomic_t *v)
 {
 	GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", e);
 }
+#define arch_atomic_sub_and_test arch_atomic_sub_and_test
 /**
  * arch_atomic_inc - increment atomic variable
  *
  * Atomically increments @v by 1.
  */
-#define arch_atomic_inc arch_atomic_inc
 static __always_inline void arch_atomic_inc(atomic_t *v)
 {
 	asm volatile(LOCK_PREFIX "incl %0"
 		     : "+m" (v->counter));
 }
+#define arch_atomic_inc arch_atomic_inc
 /**
  * arch_atomic_dec - decrement atomic variable
  *
  * Atomically decrements @v by 1.
  */
-#define arch_atomic_dec arch_atomic_dec
 static __always_inline void arch_atomic_dec(atomic_t *v)
 {
 	asm volatile(LOCK_PREFIX "decl %0"
 		     : "+m" (v->counter));
 }
+#define arch_atomic_dec arch_atomic_dec
 /**
  * arch_atomic_dec_and_test - decrement and test
  * returns true if the result is 0, or false for all other
  * cases.
  */
-#define arch_atomic_dec_and_test arch_atomic_dec_and_test
 static __always_inline bool arch_atomic_dec_and_test(atomic_t *v)
 {
 	GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", e);
 }
+#define arch_atomic_dec_and_test arch_atomic_dec_and_test
 /**
  * arch_atomic_inc_and_test - increment and test
  * and returns true if the result is zero, or false for all
  * other cases.
  */
-#define arch_atomic_inc_and_test arch_atomic_inc_and_test
 static __always_inline bool arch_atomic_inc_and_test(atomic_t *v)
 {
 	GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, "%0", e);
 }
+#define arch_atomic_inc_and_test arch_atomic_inc_and_test
 /**
  * arch_atomic_add_negative - add and test if negative
  * if the result is negative, or false when
  * result is greater than or equal to zero.
  */
-#define arch_atomic_add_negative arch_atomic_add_negative
 static __always_inline bool arch_atomic_add_negative(int i, atomic_t *v)
 {
 	GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", s);
 }
+#define arch_atomic_add_negative arch_atomic_add_negative
 /**
  * arch_atomic_add_return - add integer and return

arch/x86/include/asm/atomic64_32.h+4−4

  *
  * Atomically increments @v by 1.
  */
-#define arch_atomic64_inc arch_atomic64_inc
 static inline void arch_atomic64_inc(atomic64_t *v)
 {
 	__alternative_atomic64(inc, inc_return, /* no output */,
 			       "S" (v) : "memory", "eax", "ecx", "edx");
 }
+#define arch_atomic64_inc arch_atomic64_inc
 /**
  * arch_atomic64_dec - decrement atomic64 variable
  *
  * Atomically decrements @v by 1.
  */
-#define arch_atomic64_dec arch_atomic64_dec
 static inline void arch_atomic64_dec(atomic64_t *v)
 {
 	__alternative_atomic64(dec, dec_return, /* no output */,
 			       "S" (v) : "memory", "eax", "ecx", "edx");
 }
+#define arch_atomic64_dec arch_atomic64_dec
 /**
  * arch_atomic64_add_unless - add unless the number is a given value
 	return (int)a;
 }
-#define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero
 static inline int arch_atomic64_inc_not_zero(atomic64_t *v)
 {
 	int r;
 			     "S" (v) : "ecx", "edx", "memory");
 	return r;
 }
+#define arch_atomic64_inc_not_zero arch_atomic64_inc_not_zero
-#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
 static inline long long arch_atomic64_dec_if_positive(atomic64_t *v)
 {
 	long long r;
 			     "S" (v) : "ecx", "memory");
 	return r;
 }
+#define arch_atomic64_dec_if_positive arch_atomic64_dec_if_positive
 #undef alternative_atomic64
 #undef __alternative_atomic64

arch/x86/include/asm/atomic64_64.h+6−6

  * true if the result is zero, or false for all
  * other cases.
  */
-#define arch_atomic64_sub_and_test arch_atomic64_sub_and_test
 static inline bool arch_atomic64_sub_and_test(long i, atomic64_t *v)
 {
 	GEN_BINARY_RMWcc(LOCK_PREFIX "subq", v->counter, "er", i, "%0", e);
 }
+#define arch_atomic64_sub_and_test arch_atomic64_sub_and_test
 /**
  * arch_atomic64_inc - increment atomic64 variable
  *
  * Atomically increments @v by 1.
  */
-#define arch_atomic64_inc arch_atomic64_inc
 static __always_inline void arch_atomic64_inc(atomic64_t *v)
 {
 	asm volatile(LOCK_PREFIX "incq %0"
 		     : "=m" (v->counter)
 		     : "m" (v->counter));
 }
+#define arch_atomic64_inc arch_atomic64_inc
 /**
  * arch_atomic64_dec - decrement atomic64 variable
  *
  * Atomically decrements @v by 1.
  */
-#define arch_atomic64_dec arch_atomic64_dec
 static __always_inline void arch_atomic64_dec(atomic64_t *v)
 {
 	asm volatile(LOCK_PREFIX "decq %0"
 		     : "=m" (v->counter)
 		     : "m" (v->counter));
 }
+#define arch_atomic64_dec arch_atomic64_dec
 /**
  * arch_atomic64_dec_and_test - decrement and test
  * returns true if the result is 0, or false for all other
  * cases.
  */
-#define arch_atomic64_dec_and_test arch_atomic64_dec_and_test
 static inline bool arch_atomic64_dec_and_test(atomic64_t *v)
 {
 	GEN_UNARY_RMWcc(LOCK_PREFIX "decq", v->counter, "%0", e);
 }
+#define arch_atomic64_dec_and_test arch_atomic64_dec_and_test
 /**
  * arch_atomic64_inc_and_test - increment and test
  * and returns true if the result is zero, or false for all
  * other cases.
  */
-#define arch_atomic64_inc_and_test arch_atomic64_inc_and_test
 static inline bool arch_atomic64_inc_and_test(atomic64_t *v)
 {
 	GEN_UNARY_RMWcc(LOCK_PREFIX "incq", v->counter, "%0", e);
 }
+#define arch_atomic64_inc_and_test arch_atomic64_inc_and_test
 /**
  * arch_atomic64_add_negative - add and test if negative
  * if the result is negative, or false when
  * result is greater than or equal to zero.
  */
-#define arch_atomic64_add_negative arch_atomic64_add_negative
 static inline bool arch_atomic64_add_negative(long i, atomic64_t *v)
 {
 	GEN_BINARY_RMWcc(LOCK_PREFIX "addq", v->counter, "er", i, "%0", s);
 }
+#define arch_atomic64_add_negative arch_atomic64_add_negative
 /**
  * arch_atomic64_add_return - add and return

arch/x86/include/asm/fixmap.h+10−0

@@ -14,6 +14,16 @@ · 13 unmodified lines
14	#ifndef _ASM_X86_FIXMAP_H	14	#ifndef _ASM_X86_FIXMAP_H
15	#define _ASM_X86_FIXMAP_H	15	#define _ASM_X86_FIXMAP_H
16		16
		17	/*
		18	* Exposed to assembly code for setting up initial page tables. Cannot be
		19	* calculated in assembly code (fixmap entries are an enum), but is sanity
		20	* checked in the actual fixmap C code to make sure that the fixmap is
		21	* covered fully.
		22	*/
		23	#define FIXMAP_PMD_NUM 2
		24	/* fixmap starts downwards from the 507th entry in level2_fixmap_pgt */
		25	#define FIXMAP_PMD_TOP 507
		26
17	#ifndef __ASSEMBLY__	27	#ifndef __ASSEMBLY__
18	#include <linux/kernel.h>	28	#include <linux/kernel.h>
19	#include <asm/acpi.h>	29	#include <asm/acpi.h>

arch/x86/include/asm/hyperv-tlfs.h+9−7

 #define HV_STIMER_AUTOENABLE		(1ULL << 3)
 #define HV_STIMER_SINT(config)		(__u8)(((config) >> 16) & 0x0F)
-struct ipi_arg_non_ex {
-	u32 vector;
-	u32 reserved;
-	u64 cpu_mask;
-};
 struct hv_vpset {
 	u64 format;
 	u64 valid_bank_mask;
 	u64 bank_contents[];
 };
-struct ipi_arg_ex {
+/* HvCallSendSyntheticClusterIpi hypercall */
+struct hv_send_ipi {
+	u32 vector;
+	u32 reserved;
+	u64 cpu_mask;
+};
+/* HvCallSendSyntheticClusterIpiEx hypercall */
+struct hv_send_ipi_ex {
 	u32 vector;
 	u32 reserved;
 	struct hv_vpset vp_set;

arch/x86/include/asm/kdebug.h+11−1

 	DIE_NMIUNKNOWN,
 };
+enum show_regs_mode {
+	SHOW_REGS_SHORT,
+	/*
+	 * For when userspace crashed, but we don't think it's our fault, and
+	 * therefore don't print kernel registers.
+	 */
+	SHOW_REGS_USER,
+	SHOW_REGS_ALL
+};
 extern void die(const char *, struct pt_regs *,long);
 extern int __must_check __die(const char *, struct pt_regs *, long);
 extern void show_stack_regs(struct pt_regs *regs);
-extern void __show_regs(struct pt_regs *regs, int all);
+extern void __show_regs(struct pt_regs *regs, enum show_regs_mode);
 extern void show_iret_regs(struct pt_regs *regs);
 extern unsigned long oops_begin(void);
 extern void oops_end(unsigned long, struct pt_regs *, int signr);

arch/x86/include/asm/kvm_host.h+12−15

 	bool x2apic_format;
 	bool x2apic_broadcast_quirk_disabled;
+	bool guest_can_read_msr_platform_info;
 };
 struct kvm_vm_stat {
 	void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
 	void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
 	void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
+	bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
 	void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
 	void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
 	void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
 	bool (*umip_emulated)(void);
 	int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
+	void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
 	void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
 #define EMULTYPE_NO_DECODE	    (1 << 0)
 #define EMULTYPE_TRAP_UD	    (1 << 1)
 #define EMULTYPE_SKIP		    (1 << 2)
-#define EMULTYPE_RETRY		    (1 << 3)
+#define EMULTYPE_ALLOW_RETRY	    (1 << 3)
-#define EMULTYPE_NO_REEXECUTE	    (1 << 4)
+#define EMULTYPE_NO_UD_ON_FAIL	    (1 << 4)
-#define EMULTYPE_NO_UD_ON_FAIL	    (1 << 5)
+#define EMULTYPE_VMWARE		    (1 << 5)
-#define EMULTYPE_VMWARE		    (1 << 6)
+int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type);
-int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
+int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
-			    int emulation_type, void *insn, int insn_len);
+					void *insn, int insn_len);
-static inline int emulate_instruction(struct kvm_vcpu *vcpu,
-			int emulation_type)
-{
-	return x86_emulate_instruction(vcpu, 0,
-			emulation_type | EMULTYPE_NO_REEXECUTE, NULL, 0);
-}
 void kvm_enable_efer_bits(u64);
 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer);
 	____kvm_handle_fault_on_reboot(insn, "")
 #define KVM_ARCH_WANT_MMU_NOTIFIER
-int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end);
 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
-    		    unsigned long ipi_bitmap_high, int min,
+		    unsigned long ipi_bitmap_high, u32 min,
 		    unsigned long icr, int op_64_bit);
 u64 kvm_get_arch_capabilities(void);
 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
+void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
 int kvm_is_in_guest(void);

arch/x86/include/asm/mem_encrypt.h+7−0

 /* Architecture __weak replacement functions */
 void __init mem_encrypt_init(void);
+void __init mem_encrypt_free_decrypted_mem(void);
 bool sme_active(void);
 bool sev_active(void);
+#define __bss_decrypted __attribute__((__section__(".bss..decrypted")))
 #else	/* !CONFIG_AMD_MEM_ENCRYPT */
 #define sme_me_mask	0ULL
 static inline int __init
 early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0; }
+#define __bss_decrypted
 #endif	/* CONFIG_AMD_MEM_ENCRYPT */
 /*
 #define __sme_pa(x)		(__pa(x) | sme_me_mask)
 #define __sme_pa_nodebug(x)	(__pa_nodebug(x) | sme_me_mask)
+extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[];
 #endif	/* __ASSEMBLY__ */
 #endif	/* __X86_MEM_ENCRYPT_H__ */

arch/x86/include/asm/pgtable-2level.h+0−9

 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
 {
-#ifdef CONFIG_PAGE_TABLE_ISOLATION
-	pmd.pud.p4d.pgd = pti_set_user_pgtbl(&pmdp->pud.p4d.pgd, pmd.pud.p4d.pgd);
-#endif
 	*pmdp = pmd;
 }
 #ifdef CONFIG_SMP
 static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
 {
-#ifdef CONFIG_PAGE_TABLE_ISOLATION
-	pti_set_user_pgtbl(&xp->pud.p4d.pgd, __pgd(0));
-#endif
 	return __pmd(xchg((pmdval_t *)xp, 0));
 }
 #else
 #ifdef CONFIG_SMP
 static inline pud_t native_pudp_get_and_clear(pud_t *xp)
 {
-#ifdef CONFIG_PAGE_TABLE_ISOLATION
-	pti_set_user_pgtbl(&xp->p4d.pgd, __pgd(0));
-#endif
 	return __pud(xchg((pudval_t *)xp, 0));
 }
 #else

arch/x86/include/asm/pgtable.h+1−1

@@ -1195,7 +1195,7 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma, · 1194 unmodified lines
1195	return xchg(pmdp, pmd);	1195	return xchg(pmdp, pmd);
1196	} else {	1196	} else {
1197	pmd_t old = *pmdp;	1197	pmd_t old = *pmdp;
1198	*pmdp = pmd;	1198	WRITE_ONCE(*pmdp, pmd);
1199	return old;	1199	return old;
1200	}	1200	}
1201	}	1201	}

arch/x86/include/asm/pgtable_64.h+12−11

 #include <asm/processor.h>
 #include <linux/bitops.h>
 #include <linux/threads.h>
+#include <asm/fixmap.h>
 extern p4d_t level4_kernel_pgt[512];
 extern p4d_t level4_ident_pgt[512];
 extern pmd_t level2_kernel_pgt[512];
 extern pmd_t level2_fixmap_pgt[512];
 extern pmd_t level2_ident_pgt[512];
-extern pte_t level1_fixmap_pgt[512];
+extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM];
 extern pgd_t init_top_pgt[];
 #define swapper_pg_dir init_top_pgt
 void set_pte_vaddr_p4d(p4d_t *p4d_page, unsigned long vaddr, pte_t new_pte);
 void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte);
-static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
+static inline void native_set_pte(pte_t *ptep, pte_t pte)
-				    pte_t *ptep)
 {
-	*ptep = native_make_pte(0);
+	WRITE_ONCE(*ptep, pte);
 }
-static inline void native_set_pte(pte_t *ptep, pte_t pte)
+static inline void native_pte_clear(struct mm_struct *mm, unsigned long addr,
+				    pte_t *ptep)
 {
-	*ptep = pte;
+	native_set_pte(ptep, native_make_pte(0));
 }
 static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
 static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
 {
-	*pmdp = pmd;
+	WRITE_ONCE(*pmdp, pmd);
 }
 static inline void native_pmd_clear(pmd_t *pmd)
 static inline void native_set_pud(pud_t *pudp, pud_t pud)
 {
-	*pudp = pud;
+	WRITE_ONCE(*pudp, pud);
 }
 static inline void native_pud_clear(pud_t *pud)
 	pgd_t pgd;
 	if (pgtable_l5_enabled() || !IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION)) {
-		*p4dp = p4d;
+		WRITE_ONCE(*p4dp, p4d);
 		return;
 	}
 	pgd = native_make_pgd(native_p4d_val(p4d));
 	pgd = pti_set_user_pgtbl((pgd_t *)p4dp, pgd);
-	*p4dp = native_make_p4d(native_pgd_val(pgd));
+	WRITE_ONCE(*p4dp, native_make_p4d(native_pgd_val(pgd)));
 }
 static inline void native_p4d_clear(p4d_t *p4d)
 static inline void native_set_pgd(pgd_t *pgdp, pgd_t pgd)
 {
-	*pgdp = pti_set_user_pgtbl(pgdp, pgd);
+	WRITE_ONCE(*pgdp, pti_set_user_pgtbl(pgdp, pgd));
 }
 static inline void native_pgd_clear(pgd_t *pgd)

arch/x86/include/uapi/asm/kvm.h+1−0

@@ -377,6 +377,7 @@ struct kvm_sync_regs { · 376 unmodified lines
377		377
378	#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)	378	#define KVM_X86_QUIRK_LINT0_REENABLED (1 << 0)
379	#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)	379	#define KVM_X86_QUIRK_CD_NW_CLEARED (1 << 1)
		380	#define KVM_X86_QUIRK_LAPIC_MMIO_HOLE (1 << 2)
380		381
381	#define KVM_STATE_NESTED_GUEST_MODE 0x00000001	382	#define KVM_STATE_NESTED_GUEST_MODE 0x00000001
382	#define KVM_STATE_NESTED_RUN_PENDING 0x00000002	383	#define KVM_STATE_NESTED_RUN_PENDING 0x00000002

arch/x86/kernel/apic/vector.c+1−1

@@ -413,7 +413,7 @@ static int activate_managed(struct irq_data *irqd) · 412 unmodified lines
413	if (WARN_ON_ONCE(cpumask_empty(vector_searchmask))) {	413	if (WARN_ON_ONCE(cpumask_empty(vector_searchmask))) {
414	/* Something in the core code broke! Survive gracefully */	414	/* Something in the core code broke! Survive gracefully */
415	pr_err("Managed startup for irq %u, but no CPU\n", irqd->irq);	415	pr_err("Managed startup for irq %u, but no CPU\n", irqd->irq);
416	return EINVAL;	416	return -EINVAL;
417	}	417	}
418		418
419	ret = assign_managed_vector(irqd, vector_searchmask);	419	ret = assign_managed_vector(irqd, vector_searchmask);

arch/x86/kernel/apm_32.c+2−0

 	return 0;
 }
+#ifdef CONFIG_PROC_FS
 static int proc_apm_show(struct seq_file *m, void *v)
 {
 	unsigned short	bx;
 		   units);
 	return 0;
 }
+#endif
 static int apm(void *unused)
 {

arch/x86/kernel/cpu/intel_rdt.h+13−4

 		e <= QOS_L3_MBM_LOCAL_EVENT_ID);
 }
+struct rdt_parse_data {
+	struct rdtgroup		*rdtgrp;
+	char			*buf;
+};
 /**
  * struct rdt_resource - attributes of an RDT resource
  * @rid:		The index of the resource
 	struct rdt_cache	cache;
 	struct rdt_membw	membw;
 	const char		*format_str;
-	int (*parse_ctrlval)	(void *data, struct rdt_resource *r,
+	int (*parse_ctrlval)(struct rdt_parse_data *data,
-				 struct rdt_domain *d);
+			     struct rdt_resource *r,
+			     struct rdt_domain *d);
 	struct list_head	evt_list;
 	int			num_rmid;
 	unsigned int		mon_scale;
 	unsigned long		fflags;
 };
-int parse_cbm(void *_data, struct rdt_resource *r, struct rdt_domain *d);
+int parse_cbm(struct rdt_parse_data *data, struct rdt_resource *r,
-int parse_bw(void *_buf, struct rdt_resource *r,  struct rdt_domain *d);
+	      struct rdt_domain *d);
+int parse_bw(struct rdt_parse_data *data, struct rdt_resource *r,
+	     struct rdt_domain *d);
 extern struct mutex rdtgroup_mutex;
 void rdtgroup_pseudo_lock_remove(struct rdtgroup *rdtgrp);
 struct rdt_domain *get_domain_from_cpu(int cpu, struct rdt_resource *r);
 int update_domains(struct rdt_resource *r, int closid);
+int closids_supported(void);
 void closid_free(int closid);
 int alloc_rmid(void);
 void free_rmid(u32 rmid);

arch/x86/kernel/cpu/intel_rdt_ctrlmondata.c+14−13

 	return true;
 }
-int parse_bw(void *_buf, struct rdt_resource *r, struct rdt_domain *d)
+int parse_bw(struct rdt_parse_data *data, struct rdt_resource *r,
+	     struct rdt_domain *d)
 {
-	unsigned long data;
+	unsigned long bw_val;
-	char *buf = _buf;
 	if (d->have_new_ctrl) {
 		rdt_last_cmd_printf("duplicate domain %d\n", d->id);
 		return -EINVAL;
 	}
-	if (!bw_validate(buf, &data, r))
+	if (!bw_validate(data->buf, &bw_val, r))
 		return -EINVAL;
-	d->new_ctrl = data;
+	d->new_ctrl = bw_val;
 	d->have_new_ctrl = true;
 	return 0;
 	return true;
 }
-struct rdt_cbm_parse_data {
-	struct rdtgroup		*rdtgrp;
-	char			*buf;
-};
 /*
  * Read one cache bit mask (hex). Check that it is valid for the current
  * resource type.
  */
-int parse_cbm(void *_data, struct rdt_resource *r, struct rdt_domain *d)
+int parse_cbm(struct rdt_parse_data *data, struct rdt_resource *r,
+	      struct rdt_domain *d)
 {
-	struct rdt_cbm_parse_data *data = _data;
 	struct rdtgroup *rdtgrp = data->rdtgrp;
 	u32 cbm_val;
 static int parse_line(char *line, struct rdt_resource *r,
 		      struct rdtgroup *rdtgrp)
 {
-	struct rdt_cbm_parse_data data;
+	struct rdt_parse_data data;
 	char *dom = NULL, *id;
 	struct rdt_domain *d;
 	unsigned long dom_id;
+	if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP &&
+	    r->rid == RDT_RESOURCE_MBA) {
+		rdt_last_cmd_puts("Cannot pseudo-lock MBA resource\n");
+		return -EINVAL;
+	}
 next:
 	if (!line || line[0] == '\0')
 		return 0;

arch/x86/kernel/cpu/intel_rdt_rdtgroup.c+44−9

  *   limited as the number of resources grows.
  */
 static int closid_free_map;
+static int closid_free_map_len;
+int closids_supported(void)
+{
+	return closid_free_map_len;
+}
 static void closid_init(void)
 {
 	/* CLOSID 0 is always reserved for the default group */
 	closid_free_map &= ~1;
+	closid_free_map_len = rdt_min_closid;
 }
 static int closid_alloc(void)
 		sw_shareable = 0;
 		exclusive = 0;
 		seq_printf(seq, "%d=", dom->id);
-		for (i = 0; i < r->num_closid; i++, ctrl++) {
+		for (i = 0; i < closids_supported(); i++, ctrl++) {
 			if (!closid_allocated(i))
 				continue;
 			mode = rdtgroup_mode_by_closid(i);
 	/* Check for overlap with other resource groups */
 	ctrl = d->ctrl_val;
-	for (i = 0; i < r->num_closid; i++, ctrl++) {
+	for (i = 0; i < closids_supported(); i++, ctrl++) {
 		ctrl_b = (unsigned long *)ctrl;
 		mode = rdtgroup_mode_by_closid(i);
 		if (closid_allocated(i) && i != closid &&
 {
 	int closid = rdtgrp->closid;
 	struct rdt_resource *r;
+	bool has_cache = false;
 	struct rdt_domain *d;
 	for_each_alloc_enabled_rdt_resource(r) {
+		if (r->rid == RDT_RESOURCE_MBA)
+			continue;
+		has_cache = true;
 		list_for_each_entry(d, &r->domains, list) {
 			if (rdtgroup_cbm_overlaps(r, d, d->ctrl_val[closid],
-						  rdtgrp->closid, false))
+						  rdtgrp->closid, false)) {
+				rdt_last_cmd_puts("schemata overlaps\n");
 				return false;
+			}
 		}
 	}
+	if (!has_cache) {
+		rdt_last_cmd_puts("cannot be exclusive without CAT/CDP\n");
+		return false;
+	}
 	return true;
 }
 		rdtgrp->mode = RDT_MODE_SHAREABLE;
 	} else if (!strcmp(buf, "exclusive")) {
 		if (!rdtgroup_mode_test_exclusive(rdtgrp)) {
-			rdt_last_cmd_printf("schemata overlaps\n");
 			ret = -EINVAL;
 			goto out;
 		}
 	struct rdt_resource *r;
 	struct rdt_domain *d;
 	unsigned int size;
-	bool sep = false;
+	bool sep;
-	u32 cbm;
+	u32 ctrl;
 	rdtgrp = rdtgroup_kn_lock_live(of->kn);
 	if (!rdtgrp) {
 	}
 	for_each_alloc_enabled_rdt_resource(r) {
+		sep = false;
 		seq_printf(s, "%*s:", max_name_width, r->name);
 		list_for_each_entry(d, &r->domains, list) {
 			if (sep)
 			if (rdtgrp->mode == RDT_MODE_PSEUDO_LOCKSETUP) {
 				size = 0;
 			} else {
-				cbm = d->ctrl_val[rdtgrp->closid];
+				ctrl = (!is_mba_sc(r) ?
-				size = rdtgroup_cbm_to_size(r, d, cbm);
+						d->ctrl_val[rdtgrp->closid] :
+						d->mbps_val[rdtgrp->closid]);
+				if (r->rid == RDT_RESOURCE_MBA)
+					size = ctrl;
+				else
+					size = rdtgroup_cbm_to_size(r, d, ctrl);
 			}
 			seq_printf(s, "%d=%u", d->id, size);
 			sep = true;
 	u32 *ctrl;
 	for_each_alloc_enabled_rdt_resource(r) {
+		/*
+		 * Only initialize default allocations for CBM cache
+		 * resources
+		 */
+		if (r->rid == RDT_RESOURCE_MBA)
+			continue;
 		list_for_each_entry(d, &r->domains, list) {
 			d->have_new_ctrl = false;
 			d->new_ctrl = r->cache.shareable_bits;
 			used_b = r->cache.shareable_bits;
 			ctrl = d->ctrl_val;
-			for (i = 0; i < r->num_closid; i++, ctrl++) {
+			for (i = 0; i < closids_supported(); i++, ctrl++) {
 				if (closid_allocated(i) && i != closid) {
 					mode = rdtgroup_mode_by_closid(i);
 					if (mode == RDT_MODE_PSEUDO_LOCKSETUP)
 	}
 	for_each_alloc_enabled_rdt_resource(r) {
+		/*
+		 * Only initialize default allocations for CBM cache
+		 * resources
+		 */
+		if (r->rid == RDT_RESOURCE_MBA)
+			continue;
 		ret = update_domains(r, rdtgrp->closid);
 		if (ret < 0) {
 			rdt_last_cmd_puts("failed to initialize allocations\n");

arch/x86/kernel/cpu/microcode/amd.c+16−8

 	struct microcode_amd *mc_amd;
 	struct ucode_cpu_info *uci;
 	struct ucode_patch *p;
+	enum ucode_state ret;
 	u32 rev, dummy;
 	BUG_ON(raw_smp_processor_id() != cpu);
 	/* need to apply patch? */
 	if (rev >= mc_amd->hdr.patch_id) {
-		c->microcode = rev;
+		ret = UCODE_OK;
-		uci->cpu_sig.rev = rev;
+		goto out;
-		return UCODE_OK;
 	}
 	if (__apply_microcode_amd(mc_amd)) {
 			cpu, mc_amd->hdr.patch_id);
 		return UCODE_ERROR;
 	}
-	pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
-		mc_amd->hdr.patch_id);
-	uci->cpu_sig.rev = mc_amd->hdr.patch_id;
+	rev = mc_amd->hdr.patch_id;
-	c->microcode = mc_amd->hdr.patch_id;
+	ret = UCODE_UPDATED;
+	pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
-	return UCODE_UPDATED;
+out:
+	uci->cpu_sig.rev = rev;
+	c->microcode	 = rev;
+	/* Update boot_cpu_data's revision too, if we're on the BSP: */
+	if (c->cpu_index == boot_cpu_data.cpu_index)
+		boot_cpu_data.microcode = rev;
+	return ret;
 }
 static int install_equiv_cpu_table(const u8 *buf)

arch/x86/kernel/cpu/microcode/intel.c+12−5

 	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 	struct cpuinfo_x86 *c = &cpu_data(cpu);
 	struct microcode_intel *mc;
+	enum ucode_state ret;
 	static int prev_rev;
 	u32 rev;
 	 */
 	rev = intel_get_microcode_revision();
 	if (rev >= mc->hdr.rev) {
-		uci->cpu_sig.rev = rev;
+		ret = UCODE_OK;
-		c->microcode = rev;
+		goto out;
-		return UCODE_OK;
 	}
 	/*
 		prev_rev = rev;
 	}
+	ret = UCODE_UPDATED;
+out:
 	uci->cpu_sig.rev = rev;
-	c->microcode = rev;
+	c->microcode	 = rev;
+	/* Update boot_cpu_data's revision too, if we're on the BSP: */
+	if (c->cpu_index == boot_cpu_data.cpu_index)
+		boot_cpu_data.microcode = rev;
-	return UCODE_UPDATED;
+	return ret;
 }
 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,

arch/x86/kernel/dumpstack.c+3−8

 	 * they can be printed in the right context.
 	 */
 	if (!partial && on_stack(info, regs, sizeof(*regs))) {
-		__show_regs(regs, 0);
+		__show_regs(regs, SHOW_REGS_SHORT);
 	} else if (partial && on_stack(info, (void *)regs + IRET_FRAME_OFFSET,
 				       IRET_FRAME_SIZE)) {
 	oops_exit();
 	/* Executive summary in case the oops scrolled away */
-	__show_regs(&exec_summary_regs, true);
+	__show_regs(&exec_summary_regs, SHOW_REGS_ALL);
 	if (!signr)
 		return;
 void show_regs(struct pt_regs *regs)
 {
-	bool all = true;
 	show_regs_print_info(KERN_DEFAULT);
-	if (IS_ENABLED(CONFIG_X86_32))
+	__show_regs(regs, user_mode(regs) ? SHOW_REGS_USER : SHOW_REGS_ALL);
-		all = !user_mode(regs);
-	__show_regs(regs, all);
 	/*
 	 * When in-kernel, we also print out the stack at the time of the fault..

arch/x86/kernel/eisa.c+8−2

 #include <linux/eisa.h>
 #include <linux/io.h>
+#include <xen/xen.h>
 static __init int eisa_bus_probe(void)
 {
-	void __iomem *p = ioremap(0x0FFFD9, 4);
+	void __iomem *p;
+	if (xen_pv_domain() && !xen_initial_domain())
+		return 0;
-	if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
+	p = ioremap(0x0FFFD9, 4);
+	if (p && readl(p) == 'E' + ('I' << 8) + ('S' << 16) + ('A' << 24))
 		EISA_bus = 1;
 	iounmap(p);
 	return 0;

arch/x86/kernel/head64.c+19−1

 #include <asm/bootparam_utils.h>
 #include <asm/microcode.h>
 #include <asm/kasan.h>
+#include <asm/fixmap.h>
 /*
  * Manage page tables very early on.
 unsigned long __head __startup_64(unsigned long physaddr,
 				  struct boot_params *bp)
 {
+	unsigned long vaddr, vaddr_end;
 	unsigned long load_delta, *p;
 	unsigned long pgtable_flags;
 	pgdval_t *pgd;
 	pud[511] += load_delta;
 	pmd = fixup_pointer(level2_fixmap_pgt, physaddr);
-	pmd[506] += load_delta;
+	for (i = FIXMAP_PMD_TOP; i > FIXMAP_PMD_TOP - FIXMAP_PMD_NUM; i--)
+		pmd[i] += load_delta;
 	/*
 	 * Set up the identity mapping for the switchover.  These
 	/* Encrypt the kernel and related (if SME is active) */
 	sme_encrypt_kernel(bp);
+	/*
+	 * Clear the memory encryption mask from the .bss..decrypted section.
+	 * The bss section will be memset to zero later in the initialization so
+	 * there is no need to zero it after changing the memory encryption
+	 * attribute.
+	 */
+	if (mem_encrypt_active()) {
+		vaddr = (unsigned long)__start_bss_decrypted;
+		vaddr_end = (unsigned long)__end_bss_decrypted;
+		for (; vaddr < vaddr_end; vaddr += PMD_SIZE) {
+			i = pmd_index(vaddr);
+			pmd[i] -= sme_get_me_mask();
+		}
+	}
 	/*
 	 * Return the SME encryption mask (if SME is active) to be used as a
 	 * modifier for the initial pgdir entry programmed into CR3.

arch/x86/kernel/head_64.S+12−4

 #include "../entry/calling.h"
 #include <asm/export.h>
 #include <asm/nospec-branch.h>
+#include <asm/fixmap.h>
 #ifdef CONFIG_PARAVIRT
 #include <asm/asm-offsets.h>
 		KERNEL_IMAGE_SIZE/PMD_SIZE)
 NEXT_PAGE(level2_fixmap_pgt)
-	.fill	506,8,0
+	.fill	(512 - 4 - FIXMAP_PMD_NUM),8,0
-	.quad	level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
+	pgtno = 0
-	/* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
+	.rept (FIXMAP_PMD_NUM)
-	.fill	5,8,0
+	.quad level1_fixmap_pgt + (pgtno << PAGE_SHIFT) - __START_KERNEL_map \
+		+ _PAGE_TABLE_NOENC;
+	pgtno = pgtno + 1
+	.endr
+	/* 6 MB reserved space + a 2MB hole */
+	.fill	4,8,0
 NEXT_PAGE(level1_fixmap_pgt)
+	.rept (FIXMAP_PMD_NUM)
 	.fill	512,8,0
+	.endr
 #undef PMDS

arch/x86/kernel/kvmclock.c+49−3

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#include <linux/sched/clock.h>	28	#include <linux/sched/clock.h>
29	#include <linux/mm.h>	29	#include <linux/mm.h>
30	#include <linux/slab.h>	30	#include <linux/slab.h>
		31	#include <linux/set_memory.h>
31		32
32	#include <asm/hypervisor.h>	33	#include <asm/hypervisor.h>
33	#include <asm/mem_encrypt.h>	34	#include <asm/mem_encrypt.h>
@@ -61,9 +62,10 @@ early_param("no-kvmclock-vsyscall", parse_no_kvmclock_vsyscall); · 27 unmodified lines
61	(PAGE_SIZE / sizeof(struct pvclock_vsyscall_time_info))	62	(PAGE_SIZE / sizeof(struct pvclock_vsyscall_time_info))
62		63
63	static struct pvclock_vsyscall_time_info	64	static struct pvclock_vsyscall_time_info
64	hv_clock_boot[HVC_BOOT_ARRAY_SIZE] __aligned(PAGE_SIZE);	65	hv_clock_boot[HVC_BOOT_ARRAY_SIZE] __bss_decrypted __aligned(PAGE_SIZE);
65	static struct pvclock_wall_clock wall_clock;	66	static struct pvclock_wall_clock wall_clock __bss_decrypted;
66	static DEFINE_PER_CPU(struct pvclock_vsyscall_time_info *, hv_clock_per_cpu);	67	static DEFINE_PER_CPU(struct pvclock_vsyscall_time_info *, hv_clock_per_cpu);
		68	static struct pvclock_vsyscall_time_info *hvclock_mem;
67		69
68	static inline struct pvclock_vcpu_time_info *this_cpu_pvti(void)	70	static inline struct pvclock_vcpu_time_info *this_cpu_pvti(void)
69	{	71	{
@@ -236,6 +238,45 @@ static void kvm_shutdown(void) · 166 unmodified lines
236	native_machine_shutdown();	238	native_machine_shutdown();
237	}	239	}
238		240
		241	static void __init kvmclock_init_mem(void)
		242	{
		243	unsigned long ncpus;
		244	unsigned int order;
		245	struct page *p;
		246	int r;
		247
		248	if (HVC_BOOT_ARRAY_SIZE >= num_possible_cpus())
		249	return;
		250
		251	ncpus = num_possible_cpus() - HVC_BOOT_ARRAY_SIZE;
		252	order = get_order(ncpus * sizeof(*hvclock_mem));
		253
		254	p = alloc_pages(GFP_KERNEL, order);
		255	if (!p) {
		256	pr_warn("%s: failed to alloc %d pages", __func__, (1U << order));
		257	return;
		258	}
		259
		260	hvclock_mem = page_address(p);
		261
		262	/*
		263	* hvclock is shared between the guest and the hypervisor, must
		264	* be mapped decrypted.
		265	*/
		266	if (sev_active()) {
		267	r = set_memory_decrypted((unsigned long) hvclock_mem,
		268	1UL << order);
		269	if (r) {
		270	__free_pages(p, order);
		271	hvclock_mem = NULL;
		272	pr_warn("kvmclock: set_memory_decrypted() failed. Disabling\n");
		273	return;
		274	}
		275	}
		276
		277	memset(hvclock_mem, 0, PAGE_SIZE << order);
		278	}
		279
239	static int __init kvm_setup_vsyscall_timeinfo(void)	280	static int __init kvm_setup_vsyscall_timeinfo(void)
240	{	281	{
241	#ifdef CONFIG_X86_64	282	#ifdef CONFIG_X86_64
@@ -250,6 +291,9 @@ static int __init kvm_setup_vsyscall_timeinfo(void) · 8 unmodified lines
250		291
251	kvm_clock.archdata.vclock_mode = VCLOCK_PVCLOCK;	292	kvm_clock.archdata.vclock_mode = VCLOCK_PVCLOCK;
252	#endif	293	#endif
		294
		295	kvmclock_init_mem();
		296
253	return 0;	297	return 0;
254	}	298	}
255	early_initcall(kvm_setup_vsyscall_timeinfo);	299	early_initcall(kvm_setup_vsyscall_timeinfo);
@@ -269,8 +313,10 @@ static int kvmclock_setup_percpu(unsigned int cpu) · 13 unmodified lines
269	/* Use the static page for the first CPUs, allocate otherwise */	313	/* Use the static page for the first CPUs, allocate otherwise */
270	if (cpu < HVC_BOOT_ARRAY_SIZE)	314	if (cpu < HVC_BOOT_ARRAY_SIZE)
271	p = &hv_clock_boot[cpu];	315	p = &hv_clock_boot[cpu];
		316	else if (hvclock_mem)
		317	p = hvclock_mem + cpu - HVC_BOOT_ARRAY_SIZE;
272	else	318	else
273	p = kzalloc(sizeof(*p), GFP_KERNEL);	319	return -ENOMEM;
274		320
275	per_cpu(hv_clock_per_cpu, cpu) = p;	321	per_cpu(hv_clock_per_cpu, cpu) = p;
276	return p ? 0 : -ENOMEM;	322	return p ? 0 : -ENOMEM;

arch/x86/kernel/paravirt.c+2−2

@@ -91,7 +91,7 @@ unsigned paravirt_patch_call(void *insnbuf, · 90 unmodified lines
91		91
92	if (len < 5) {	92	if (len < 5) {
93	#ifdef CONFIG_RETPOLINE	93	#ifdef CONFIG_RETPOLINE
94	WARN_ONCE("Failing to patch indirect CALL in %ps\n", (void *)addr);	94	WARN_ONCE(1, "Failing to patch indirect CALL in %ps\n", (void *)addr);
95	#endif	95	#endif
96	return len; /* call too long for patch site */	96	return len; /* call too long for patch site */
97	}	97	}
@@ -111,7 +111,7 @@ unsigned paravirt_patch_jmp(void insnbuf, const void target, · 13 unmodified lines
111		111
112	if (len < 5) {	112	if (len < 5) {
113	#ifdef CONFIG_RETPOLINE	113	#ifdef CONFIG_RETPOLINE
114	WARN_ONCE("Failing to patch indirect JMP in %ps\n", (void *)addr);	114	WARN_ONCE(1, "Failing to patch indirect JMP in %ps\n", (void *)addr);
115	#endif	115	#endif
116	return len; /* call too long for patch site */	116	return len; /* call too long for patch site */
117	}	117	}

arch/x86/kernel/process_32.c+2−2

@@ -59,7 +59,7 @@ · 58 unmodified lines
59	#include <asm/intel_rdt_sched.h>	59	#include <asm/intel_rdt_sched.h>
60	#include <asm/proto.h>	60	#include <asm/proto.h>
61		61
62	void __show_regs(struct pt_regs *regs, int all)	62	void __show_regs(struct pt_regs *regs, enum show_regs_mode mode)
63	{	63	{
64	unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;	64	unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
65	unsigned long d0, d1, d2, d3, d6, d7;	65	unsigned long d0, d1, d2, d3, d6, d7;
@@ -85,7 +85,7 @@ void __show_regs(struct pt_regs *regs, int all) · 19 unmodified lines
85	printk(KERN_DEFAULT "DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n",	85	printk(KERN_DEFAULT "DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n",
86	(u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss, regs->flags);	86	(u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, ss, regs->flags);
87		87
88	if (!all)	88	if (mode != SHOW_REGS_ALL)
89	return;	89	return;
90		90
91	cr0 = read_cr0();	91	cr0 = read_cr0();

arch/x86/kernel/process_64.c+10−2

 __visible DEFINE_PER_CPU(unsigned long, rsp_scratch);
 /* Prints also some state that isn't saved in the pt_regs */
-void __show_regs(struct pt_regs *regs, int all)
+void __show_regs(struct pt_regs *regs, enum show_regs_mode mode)
 {
 	unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs;
 	unsigned long d0, d1, d2, d3, d6, d7;
 	printk(KERN_DEFAULT "R13: %016lx R14: %016lx R15: %016lx\n",
 	       regs->r13, regs->r14, regs->r15);
-	if (!all)
+	if (mode == SHOW_REGS_SHORT)
 		return;
+	if (mode == SHOW_REGS_USER) {
+		rdmsrl(MSR_FS_BASE, fs);
+		rdmsrl(MSR_KERNEL_GS_BASE, shadowgs);
+		printk(KERN_DEFAULT "FS:  %016lx GS:  %016lx\n",
+		       fs, shadowgs);
+		return;
+	}
 	asm("movl %%ds,%0" : "=r" (ds));
 	asm("movl %%cs,%0" : "=r" (cs));
 	asm("movl %%es,%0" : "=r" (es));

arch/x86/kernel/topology.c+3−1

 	/*
 	 * Currently CPU0 is only hotpluggable on Intel platforms. Other
 	 * vendors can add hotplug support later.
+	 * Xen PV guests don't support CPU0 hotplug at all.
 	 */
-	if (c->x86_vendor != X86_VENDOR_INTEL)
+	if (c->x86_vendor != X86_VENDOR_INTEL ||
+	    boot_cpu_has(X86_FEATURE_XENPV))
 		cpu0_hotpluggable = 0;
 	/*

arch/x86/kernel/tsc.c+1−1

@@ -1415,7 +1415,7 @@ static bool __init determine_cpu_tsc_frequencies(bool early) · 1414 unmodified lines
1415		1415
1416	static unsigned long __init get_loops_per_jiffy(void)	1416	static unsigned long __init get_loops_per_jiffy(void)
1417	{	1417	{
1418	unsigned long lpj = tsc_khz * KHZ;	1418	u64 lpj = (u64)tsc_khz * KHZ;
1419		1419
1420	do_div(lpj, HZ);	1420	do_div(lpj, HZ);
1421	return lpj;	1421	return lpj;

arch/x86/kernel/vmlinux.lds.S+19−0

@@ -65,6 +65,23 @@ jiffies_64 = jiffies; · 64 unmodified lines
65	#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);	65	#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
66	#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);	66	#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
67		67
		68	/*
		69	* This section contains data which will be mapped as decrypted. Memory
		70	* encryption operates on a page basis. Make this section PMD-aligned
		71	* to avoid splitting the pages while mapping the section early.
		72	*
		73	* Note: We use a separate section so that only this section gets
		74	* decrypted to avoid exposing more than we wish.
		75	*/
		76	#define BSS_DECRYPTED \
		77	. = ALIGN(PMD_SIZE); \
		78	__start_bss_decrypted = .; \
		79	*(.bss..decrypted); \
		80	. = ALIGN(PAGE_SIZE); \
		81	__start_bss_decrypted_unused = .; \
		82	. = ALIGN(PMD_SIZE); \
		83	__end_bss_decrypted = .; \
		84
68	#else	85	#else
69		86
70	#define X86_ALIGN_RODATA_BEGIN	87	#define X86_ALIGN_RODATA_BEGIN
@@ -74,6 +91,7 @@ jiffies_64 = jiffies; · 3 unmodified lines
74		91
75	#define ALIGN_ENTRY_TEXT_BEGIN	92	#define ALIGN_ENTRY_TEXT_BEGIN
76	#define ALIGN_ENTRY_TEXT_END	93	#define ALIGN_ENTRY_TEXT_END
		94	#define BSS_DECRYPTED
77		95
78	#endif	96	#endif
79		97
@@ -355,6 +373,7 @@ SECTIONS · 275 unmodified lines
355	__bss_start = .;	373	__bss_start = .;
356	*(.bss..page_aligned)	374	*(.bss..page_aligned)
357	*(.bss)	375	*(.bss)
		376	BSS_DECRYPTED
358	. = ALIGN(PAGE_SIZE);	377	. = ALIGN(PAGE_SIZE);
359	__bss_stop = .;	378	__bss_stop = .;
360	}	379	}

arch/x86/kvm/lapic.c+39−10

@@ -548,7 +548,7 @@ int kvm_apic_set_irq(struct kvm_vcpu vcpu, struct kvm_lapic_irq irq, · 547 unmodified lines
548	}	548	}
549		549
550	int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,	550	int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
551	unsigned long ipi_bitmap_high, int min,	551	unsigned long ipi_bitmap_high, u32 min,
552	unsigned long icr, int op_64_bit)	552	unsigned long icr, int op_64_bit)
553	{	553	{
554	int i;	554	int i;
@@ -571,18 +571,31 @@ int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low, · 16 unmodified lines
571	rcu_read_lock();	571	rcu_read_lock();
572	map = rcu_dereference(kvm->arch.apic_map);	572	map = rcu_dereference(kvm->arch.apic_map);
573		573
		574	if (min > map->max_apic_id)
		575	goto out;
574	/* Bits above cluster_size are masked in the caller. */	576	/* Bits above cluster_size are masked in the caller. */
575	for_each_set_bit(i, &ipi_bitmap_low, BITS_PER_LONG) {	577	for_each_set_bit(i, &ipi_bitmap_low,
576	vcpu = map->phys_map[min + i]->vcpu;	578	min((u32)BITS_PER_LONG, (map->max_apic_id - min + 1))) {
577	count += kvm_apic_set_irq(vcpu, &irq, NULL);	579	if (map->phys_map[min + i]) {
		580	vcpu = map->phys_map[min + i]->vcpu;
		581	count += kvm_apic_set_irq(vcpu, &irq, NULL);
		582	}
578	}	583	}
579		584
580	min += cluster_size;	585	min += cluster_size;
581	for_each_set_bit(i, &ipi_bitmap_high, BITS_PER_LONG) {	586
582	vcpu = map->phys_map[min + i]->vcpu;	587	if (min > map->max_apic_id)
583	count += kvm_apic_set_irq(vcpu, &irq, NULL);	588	goto out;
		589
		590	for_each_set_bit(i, &ipi_bitmap_high,
		591	min((u32)BITS_PER_LONG, (map->max_apic_id - min + 1))) {
		592	if (map->phys_map[min + i]) {
		593	vcpu = map->phys_map[min + i]->vcpu;
		594	count += kvm_apic_set_irq(vcpu, &irq, NULL);
		595	}
584	}	596	}
585		597
		598	out:
586	rcu_read_unlock();	599	rcu_read_unlock();
587	return count;	600	return count;
588	}	601	}
@@ -1331,9 +1344,8 @@ EXPORT_SYMBOL_GPL(kvm_lapic_reg_read); · 742 unmodified lines
1331		1344
1332	static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr)	1345	static int apic_mmio_in_range(struct kvm_lapic *apic, gpa_t addr)
1333	{	1346	{
1334	return kvm_apic_hw_enabled(apic) &&	1347	return addr >= apic->base_address &&
1335	addr >= apic->base_address &&	1348	addr < apic->base_address + LAPIC_MMIO_LENGTH;
1336	addr < apic->base_address + LAPIC_MMIO_LENGTH;
1337	}	1349	}
1338		1350
1339	static int apic_mmio_read(struct kvm_vcpu vcpu, struct kvm_io_device this,	1351	static int apic_mmio_read(struct kvm_vcpu vcpu, struct kvm_io_device this,
@@ -1345,6 +1357,15 @@ static int apic_mmio_read(struct kvm_vcpu vcpu, struct kvm_io_device this, · 5 unmodified lines
1345	if (!apic_mmio_in_range(apic, address))	1357	if (!apic_mmio_in_range(apic, address))
1346	return -EOPNOTSUPP;	1358	return -EOPNOTSUPP;
1347		1359
		1360	if (!kvm_apic_hw_enabled(apic) \|\| apic_x2apic_mode(apic)) {
		1361	if (!kvm_check_has_quirk(vcpu->kvm,
		1362	KVM_X86_QUIRK_LAPIC_MMIO_HOLE))
		1363	return -EOPNOTSUPP;
		1364
		1365	memset(data, 0xff, len);
		1366	return 0;
		1367	}
		1368
1348	kvm_lapic_reg_read(apic, offset, len, data);	1369	kvm_lapic_reg_read(apic, offset, len, data);
1349		1370
1350	return 0;	1371	return 0;
@@ -1904,6 +1925,14 @@ static int apic_mmio_write(struct kvm_vcpu vcpu, struct kvm_io_device this, · 553 unmodified lines
1904	if (!apic_mmio_in_range(apic, address))	1925	if (!apic_mmio_in_range(apic, address))
1905	return -EOPNOTSUPP;	1926	return -EOPNOTSUPP;
1906		1927
		1928	if (!kvm_apic_hw_enabled(apic) \|\| apic_x2apic_mode(apic)) {
		1929	if (!kvm_check_has_quirk(vcpu->kvm,
		1930	KVM_X86_QUIRK_LAPIC_MMIO_HOLE))
		1931	return -EOPNOTSUPP;
		1932
		1933	return 0;
		1934	}
		1935
1907	/*	1936	/*
1908	* APIC register must be aligned on 128-bits boundary.	1937	* APIC register must be aligned on 128-bits boundary.
1909	* 32/64/128 bits registers must be accessed thru 32 bits.	1938	* 32/64/128 bits registers must be accessed thru 32 bits.

arch/x86/kvm/mmu.c+22−13

 {
 	/*
 	 * Make sure the write to vcpu->mode is not reordered in front of
-	 * reads to sptes.  If it does, kvm_commit_zap_page() can see us
+	 * reads to sptes.  If it does, kvm_mmu_commit_zap_page() can see us
 	 * OUTSIDE_GUEST_MODE and proceed to free the shadow page table.
 	 */
 	smp_store_release(&vcpu->mode, OUTSIDE_GUEST_MODE);
 	return kvm_handle_hva_range(kvm, hva, hva + 1, data, handler);
 }
-int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
-{
-	return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
-}
 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
 {
 	return kvm_handle_hva_range(kvm, start, end, 0, kvm_unmap_rmapp);
 int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u64 error_code,
 		       void *insn, int insn_len)
 {
-	int r, emulation_type = EMULTYPE_RETRY;
+	int r, emulation_type = 0;
 	enum emulation_result er;
 	bool direct = vcpu->arch.mmu.direct_map;
 	r = RET_PF_INVALID;
 	if (unlikely(error_code & PFERR_RSVD_MASK)) {
 		r = handle_mmio_page_fault(vcpu, cr2, direct);
-		if (r == RET_PF_EMULATE) {
+		if (r == RET_PF_EMULATE)
-			emulation_type = 0;
 			goto emulate;
-		}
 	}
 	if (r == RET_PF_INVALID) {
 		return 1;
 	}
-	if (mmio_info_in_cache(vcpu, cr2, direct))
+	/*
-		emulation_type = 0;
+	 * vcpu->arch.mmu.page_fault returned RET_PF_EMULATE, but we can still
+	 * optimistically try to just unprotect the page and let the processor
+	 * re-execute the instruction that caused the page fault.  Do not allow
+	 * retrying MMIO emulation, as it's not only pointless but could also
+	 * cause us to enter an infinite loop because the processor will keep
+	 * faulting on the non-existent MMIO address.  Retrying an instruction
+	 * from a nested guest is also pointless and dangerous as we are only
+	 * explicitly shadowing L1's page tables, i.e. unprotecting something
+	 * for L1 isn't going to magically fix whatever issue cause L2 to fail.
+	 */
+	if (!mmio_info_in_cache(vcpu, cr2, direct) && !is_guest_mode(vcpu))
+		emulation_type = EMULTYPE_ALLOW_RETRY;
 emulate:
 	/*
 	 * On AMD platforms, under certain conditions insn_len may be zero on #NPF.
 {
 	MMU_WARN_ON(VALID_PAGE(vcpu->arch.mmu.root_hpa));
-	kvm_init_mmu(vcpu, true);
+	/*
+	 * kvm_mmu_setup() is called only on vCPU initialization.
+	 * Therefore, no need to reset mmu roots as they are not yet
+	 * initialized.
+	 */
+	kvm_init_mmu(vcpu, false);
 }
 static void kvm_mmu_invalidate_zap_pages_in_memslot(struct kvm *kvm,

arch/x86/kvm/svm.c+13−13

 	}
 	if (!svm->next_rip) {
-		if (emulate_instruction(vcpu, EMULTYPE_SKIP) !=
+		if (kvm_emulate_instruction(vcpu, EMULTYPE_SKIP) !=
 				EMULATE_DONE)
 			printk(KERN_DEBUG "%s: NOP\n", __func__);
 		return;
 	min_sev_asid = cpuid_edx(0x8000001F);
 	/* Initialize SEV ASID bitmap */
-	sev_asid_bitmap = kcalloc(BITS_TO_LONGS(max_sev_asid),
+	sev_asid_bitmap = bitmap_zalloc(max_sev_asid, GFP_KERNEL);
-				sizeof(unsigned long), GFP_KERNEL);
 	if (!sev_asid_bitmap)
 		return 1;
 	int cpu;
 	if (svm_sev_enabled())
-		kfree(sev_asid_bitmap);
+		bitmap_free(sev_asid_bitmap);
 	for_each_possible_cpu(cpu)
 		svm_cpu_uninit(cpu);
 	WARN_ON_ONCE(!enable_vmware_backdoor);
-	er = emulate_instruction(vcpu,
+	er = kvm_emulate_instruction(vcpu,
 		EMULTYPE_VMWARE | EMULTYPE_NO_UD_ON_FAIL);
 	if (er == EMULATE_USER_EXIT)
 		return 0;
 	string = (io_info & SVM_IOIO_STR_MASK) != 0;
 	in = (io_info & SVM_IOIO_TYPE_MASK) != 0;
 	if (string)
-		return emulate_instruction(vcpu, 0) == EMULATE_DONE;
+		return kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE;
 	port = io_info >> 16;
 	size = (io_info & SVM_IOIO_SIZE_MASK) >> SVM_IOIO_SIZE_SHIFT;
 static int invlpg_interception(struct vcpu_svm *svm)
 {
 	if (!static_cpu_has(X86_FEATURE_DECODEASSISTS))
-		return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;
+		return kvm_emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;
 	kvm_mmu_invlpg(&svm->vcpu, svm->vmcb->control.exit_info_1);
 	return kvm_skip_emulated_instruction(&svm->vcpu);
 static int emulate_on_interception(struct vcpu_svm *svm)
 {
-	return emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;
+	return kvm_emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE;
 }
 static int rsm_interception(struct vcpu_svm *svm)
 {
-	return x86_emulate_instruction(&svm->vcpu, 0, 0,
+	return kvm_emulate_instruction_from_buffer(&svm->vcpu,
-				       rsm_ins_bytes, 2) == EMULATE_DONE;
+					rsm_ins_bytes, 2) == EMULATE_DONE;
 }
 static int rdpmc_interception(struct vcpu_svm *svm)
 		ret = avic_unaccel_trap_write(svm);
 	} else {
 		/* Handling Fault */
-		ret = (emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE);
+		ret = (kvm_emulate_instruction(&svm->vcpu, 0) == EMULATE_DONE);
 	}
 	return ret;
 static int sev_dbg_crypt(struct kvm *kvm, struct kvm_sev_cmd *argp, bool dec)
 {
 	unsigned long vaddr, vaddr_end, next_vaddr;
-	unsigned long dst_vaddr, dst_vaddr_end;
+	unsigned long dst_vaddr;
 	struct page **src_p, **dst_p;
 	struct kvm_sev_dbg debug;
 	unsigned long n;
 	size = debug.len;
 	vaddr_end = vaddr + size;
 	dst_vaddr = debug.dst_uaddr;
-	dst_vaddr_end = dst_vaddr + size;
 	for (; vaddr < vaddr_end; vaddr = next_vaddr) {
 		int len, s_off, d_off;
 	.check_intercept = svm_check_intercept,
 	.handle_external_intr = svm_handle_external_intr,
+	.request_immediate_exit = __kvm_request_immediate_exit,
 	.sched_in = svm_sched_in,
 	.pmu_ops = &amd_pmu_ops,

arch/x86/kvm/vmx.c+131−50

@@ -397,6 +397,7 @@ struct loaded_vmcs { · 396 unmodified lines
397	int cpu;	397	int cpu;
398	bool launched;	398	bool launched;
399	bool nmi_known_unmasked;	399	bool nmi_known_unmasked;
		400	bool hv_timer_armed;
400	/* Support for vnmi-less CPUs */	401	/* Support for vnmi-less CPUs */
401	int soft_vnmi_blocked;	402	int soft_vnmi_blocked;
402	ktime_t entry_time;	403	ktime_t entry_time;
@@ -1019,6 +1020,8 @@ struct vcpu_vmx { · 616 unmodified lines
1019	int ple_window;	1020	int ple_window;
1020	bool ple_window_dirty;	1021	bool ple_window_dirty;
1021		1022
		1023	bool req_immediate_exit;
		1024
1022	/* Support for PML */	1025	/* Support for PML */
1023	#define PML_ENTITY_NUM 512	1026	#define PML_ENTITY_NUM 512
1024	struct page *pml_pg;	1027	struct page *pml_pg;
@@ -2864,6 +2867,8 @@ static void vmx_prepare_switch_to_guest(struct kvm_vcpu *vcpu) · 1839 unmodified lines
2864	u16 fs_sel, gs_sel;	2867	u16 fs_sel, gs_sel;
2865	int i;	2868	int i;
2866		2869
		2870	vmx->req_immediate_exit = false;
		2871
2867	if (vmx->loaded_cpu_state)	2872	if (vmx->loaded_cpu_state)
2868	return;	2873	return;
2869		2874
@@ -5393,9 +5398,10 @@ static int vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) · 2523 unmodified lines
5393	* To use VMXON (and later other VMX instructions), a guest	5398	* To use VMXON (and later other VMX instructions), a guest
5394	* must first be able to turn on cr4.VMXE (see handle_vmon()).	5399	* must first be able to turn on cr4.VMXE (see handle_vmon()).
5395	* So basically the check on whether to allow nested VMX	5400	* So basically the check on whether to allow nested VMX
5396	* is here.	5401	* is here. We operate under the default treatment of SMM,
		5402	* so VMX cannot be enabled under SMM.
5397	*/	5403	*/
5398	if (!nested_vmx_allowed(vcpu))	5404	if (!nested_vmx_allowed(vcpu) \|\| is_smm(vcpu))
5399	return 1;	5405	return 1;
5400	}	5406	}
5401		5407
@@ -6183,6 +6189,27 @@ static void vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu) · 781 unmodified lines
6183	nested_mark_vmcs12_pages_dirty(vcpu);	6189	nested_mark_vmcs12_pages_dirty(vcpu);
6184	}	6190	}
6185		6191
		6192	static bool vmx_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
		6193	{
		6194	struct vcpu_vmx *vmx = to_vmx(vcpu);
		6195	void *vapic_page;
		6196	u32 vppr;
		6197	int rvi;
		6198
		6199	if (WARN_ON_ONCE(!is_guest_mode(vcpu)) \|\|
		6200	!nested_cpu_has_vid(get_vmcs12(vcpu)) \|\|
		6201	WARN_ON_ONCE(!vmx->nested.virtual_apic_page))
		6202	return false;
		6203
		6204	rvi = vmcs_read16(GUEST_INTR_STATUS) & 0xff;
		6205
		6206	vapic_page = kmap(vmx->nested.virtual_apic_page);
		6207	vppr = ((u32 )(vapic_page + APIC_PROCPRI));
		6208	kunmap(vmx->nested.virtual_apic_page);
		6209
		6210	return ((rvi & 0xf0) > (vppr & 0xf0));
		6211	}
		6212
6186	static inline bool kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,	6213	static inline bool kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu,
6187	bool nested)	6214	bool nested)
6188	{	6215	{
@@ -6983,7 +7010,7 @@ static int handle_rmode_exception(struct kvm_vcpu *vcpu, · 794 unmodified lines
6983	* Cause the #SS fault with 0 error code in VM86 mode.	7010	* Cause the #SS fault with 0 error code in VM86 mode.
6984	*/	7011	*/
6985	if (((vec == GP_VECTOR) \|\| (vec == SS_VECTOR)) && err_code == 0) {	7012	if (((vec == GP_VECTOR) \|\| (vec == SS_VECTOR)) && err_code == 0) {
6986	if (emulate_instruction(vcpu, 0) == EMULATE_DONE) {	7013	if (kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE) {
6987	if (vcpu->arch.halt_request) {	7014	if (vcpu->arch.halt_request) {
6988	vcpu->arch.halt_request = 0;	7015	vcpu->arch.halt_request = 0;
6989	return kvm_vcpu_halt(vcpu);	7016	return kvm_vcpu_halt(vcpu);
@@ -7054,7 +7081,7 @@ static int handle_exception(struct kvm_vcpu *vcpu) · 64 unmodified lines
7054		7081
7055	if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) {	7082	if (!vmx->rmode.vm86_active && is_gp_fault(intr_info)) {
7056	WARN_ON_ONCE(!enable_vmware_backdoor);	7083	WARN_ON_ONCE(!enable_vmware_backdoor);
7057	er = emulate_instruction(vcpu,	7084	er = kvm_emulate_instruction(vcpu,
7058	EMULTYPE_VMWARE \| EMULTYPE_NO_UD_ON_FAIL);	7085	EMULTYPE_VMWARE \| EMULTYPE_NO_UD_ON_FAIL);
7059	if (er == EMULATE_USER_EXIT)	7086	if (er == EMULATE_USER_EXIT)
7060	return 0;	7087	return 0;
@@ -7157,7 +7184,7 @@ static int handle_io(struct kvm_vcpu *vcpu) · 96 unmodified lines
7157	++vcpu->stat.io_exits;	7184	++vcpu->stat.io_exits;
7158		7185
7159	if (string)	7186	if (string)
7160	return emulate_instruction(vcpu, 0) == EMULATE_DONE;	7187	return kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE;
7161		7188
7162	port = exit_qualification >> 16;	7189	port = exit_qualification >> 16;
7163	size = (exit_qualification & 7) + 1;	7190	size = (exit_qualification & 7) + 1;
@@ -7231,7 +7258,7 @@ static int handle_set_cr4(struct kvm_vcpu *vcpu, unsigned long val) · 67 unmodified lines
7231	static int handle_desc(struct kvm_vcpu *vcpu)	7258	static int handle_desc(struct kvm_vcpu *vcpu)
7232	{	7259	{
7233	WARN_ON(!(vcpu->arch.cr4 & X86_CR4_UMIP));	7260	WARN_ON(!(vcpu->arch.cr4 & X86_CR4_UMIP));
7234	return emulate_instruction(vcpu, 0) == EMULATE_DONE;	7261	return kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE;
7235	}	7262	}
7236		7263
7237	static int handle_cr(struct kvm_vcpu *vcpu)	7264	static int handle_cr(struct kvm_vcpu *vcpu)
@@ -7480,7 +7507,7 @@ static int handle_vmcall(struct kvm_vcpu *vcpu) · 242 unmodified lines
7480		7507
7481	static int handle_invd(struct kvm_vcpu *vcpu)	7508	static int handle_invd(struct kvm_vcpu *vcpu)
7482	{	7509	{
7483	return emulate_instruction(vcpu, 0) == EMULATE_DONE;	7510	return kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE;
7484	}	7511	}
7485		7512
7486	static int handle_invlpg(struct kvm_vcpu *vcpu)	7513	static int handle_invlpg(struct kvm_vcpu *vcpu)
@@ -7547,7 +7574,7 @@ static int handle_apic_access(struct kvm_vcpu *vcpu) · 60 unmodified lines
7547	return kvm_skip_emulated_instruction(vcpu);	7574	return kvm_skip_emulated_instruction(vcpu);
7548	}	7575	}
7549	}	7576	}
7550	return emulate_instruction(vcpu, 0) == EMULATE_DONE;	7577	return kvm_emulate_instruction(vcpu, 0) == EMULATE_DONE;
7551	}	7578	}
7552		7579
7553	static int handle_apic_eoi_induced(struct kvm_vcpu *vcpu)	7580	static int handle_apic_eoi_induced(struct kvm_vcpu *vcpu)
@@ -7704,8 +7731,8 @@ static int handle_ept_misconfig(struct kvm_vcpu *vcpu) · 150 unmodified lines
7704	if (!static_cpu_has(X86_FEATURE_HYPERVISOR))	7731	if (!static_cpu_has(X86_FEATURE_HYPERVISOR))
7705	return kvm_skip_emulated_instruction(vcpu);	7732	return kvm_skip_emulated_instruction(vcpu);
7706	else	7733	else
7707	return x86_emulate_instruction(vcpu, gpa, EMULTYPE_SKIP,	7734	return kvm_emulate_instruction(vcpu, EMULTYPE_SKIP) ==
7708	NULL, 0) == EMULATE_DONE;	7735	EMULATE_DONE;
7709	}	7736	}
7710		7737
7711	return kvm_mmu_page_fault(vcpu, gpa, PFERR_RSVD_MASK, NULL, 0);	7738	return kvm_mmu_page_fault(vcpu, gpa, PFERR_RSVD_MASK, NULL, 0);
@@ -7748,7 +7775,7 @@ static int handle_invalid_guest_state(struct kvm_vcpu *vcpu) · 36 unmodified lines
7748	if (kvm_test_request(KVM_REQ_EVENT, vcpu))	7775	if (kvm_test_request(KVM_REQ_EVENT, vcpu))
7749	return 1;	7776	return 1;
7750		7777
7751	err = emulate_instruction(vcpu, 0);	7778	err = kvm_emulate_instruction(vcpu, 0);
7752		7779
7753	if (err == EMULATE_USER_EXIT) {	7780	if (err == EMULATE_USER_EXIT) {
7754	++vcpu->stat.mmio_exits;	7781	++vcpu->stat.mmio_exits;
@@ -7966,6 +7993,9 @@ static __init int hardware_setup(void) · 211 unmodified lines
7966	kvm_x86_ops->enable_log_dirty_pt_masked = NULL;	7993	kvm_x86_ops->enable_log_dirty_pt_masked = NULL;
7967	}	7994	}
7968		7995
		7996	if (!cpu_has_vmx_preemption_timer())
		7997	kvm_x86_ops->request_immediate_exit = __kvm_request_immediate_exit;
		7998
7969	if (cpu_has_vmx_preemption_timer() && enable_preemption_timer) {	7999	if (cpu_has_vmx_preemption_timer() && enable_preemption_timer) {
7970	u64 vmx_msr;	8000	u64 vmx_msr;
7971		8001
@@ -9208,7 +9238,8 @@ static int handle_pml_full(struct kvm_vcpu *vcpu) · 1236 unmodified lines
9208		9238
9209	static int handle_preemption_timer(struct kvm_vcpu *vcpu)	9239	static int handle_preemption_timer(struct kvm_vcpu *vcpu)
9210	{	9240	{
9211	kvm_lapic_expired_hv_timer(vcpu);	9241	if (!to_vmx(vcpu)->req_immediate_exit)
		9242	kvm_lapic_expired_hv_timer(vcpu);
9212	return 1;	9243	return 1;
9213	}	9244	}
9214		9245
@@ -10595,24 +10626,43 @@ static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx) · 1380 unmodified lines
10595	msrs[i].host, false);	10626	msrs[i].host, false);
10596	}	10627	}
10597		10628
10598	static void vmx_arm_hv_timer(struct kvm_vcpu *vcpu)	10629	static void vmx_arm_hv_timer(struct vcpu_vmx *vmx, u32 val)
		10630	{
		10631	vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, val);
		10632	if (!vmx->loaded_vmcs->hv_timer_armed)
		10633	vmcs_set_bits(PIN_BASED_VM_EXEC_CONTROL,
		10634	PIN_BASED_VMX_PREEMPTION_TIMER);
		10635	vmx->loaded_vmcs->hv_timer_armed = true;
		10636	}
		10637
		10638	static void vmx_update_hv_timer(struct kvm_vcpu *vcpu)
10599	{	10639	{
10600	struct vcpu_vmx *vmx = to_vmx(vcpu);	10640	struct vcpu_vmx *vmx = to_vmx(vcpu);
10601	u64 tscl;	10641	u64 tscl;
10602	u32 delta_tsc;	10642	u32 delta_tsc;
10603		10643
10604	if (vmx->hv_deadline_tsc == -1)	10644	if (vmx->req_immediate_exit) {
		10645	vmx_arm_hv_timer(vmx, 0);
10605	return;	10646	return;
		10647	}
10606		10648
10607	tscl = rdtsc();	10649	if (vmx->hv_deadline_tsc != -1) {
10608	if (vmx->hv_deadline_tsc > tscl)	10650	tscl = rdtsc();
10609	/* sure to be 32 bit only because checked on set_hv_timer */	10651	if (vmx->hv_deadline_tsc > tscl)
10610	delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >>	10652	/* set_hv_timer ensures the delta fits in 32-bits */
10611	cpu_preemption_timer_multi);	10653	delta_tsc = (u32)((vmx->hv_deadline_tsc - tscl) >>
10612	else	10654	cpu_preemption_timer_multi);
10613	delta_tsc = 0;	10655	else
		10656	delta_tsc = 0;
		10657
		10658	vmx_arm_hv_timer(vmx, delta_tsc);
		10659	return;
		10660	}
10614		10661
10615	vmcs_write32(VMX_PREEMPTION_TIMER_VALUE, delta_tsc);	10662	if (vmx->loaded_vmcs->hv_timer_armed)
		10663	vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL,
		10664	PIN_BASED_VMX_PREEMPTION_TIMER);
		10665	vmx->loaded_vmcs->hv_timer_armed = false;
10616	}	10666	}
10617		10667
10618	static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)	10668	static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
@@ -10672,7 +10722,7 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu) · 53 unmodified lines
10672		10722
10673	atomic_switch_perf_msrs(vmx);	10723	atomic_switch_perf_msrs(vmx);
10674		10724
10675	vmx_arm_hv_timer(vcpu);	10725	vmx_update_hv_timer(vcpu);
10676		10726
10677	/*	10727	/*
10678	* If this vCPU has touched SPEC_CTRL, restore the guest's value if	10728	* If this vCPU has touched SPEC_CTRL, restore the guest's value if
@@ -11427,16 +11477,18 @@ static void vmx_start_preemption_timer(struct kvm_vcpu *vcpu) · 748 unmodified lines
11427	u64 preemption_timeout = get_vmcs12(vcpu)->vmx_preemption_timer_value;	11477	u64 preemption_timeout = get_vmcs12(vcpu)->vmx_preemption_timer_value;
11428	struct vcpu_vmx *vmx = to_vmx(vcpu);	11478	struct vcpu_vmx *vmx = to_vmx(vcpu);
11429		11479
11430	if (vcpu->arch.virtual_tsc_khz == 0)	11480	/*
11431	return;	11481	* A timer value of zero is architecturally guaranteed to cause
11432		11482	* a VMExit prior to executing any instructions in the guest.
11433	/* Make sure short timeouts reliably trigger an immediate vmexit.	11483	*/
11434	* hrtimer_start does not guarantee this. */	11484	if (preemption_timeout == 0) {
11435	if (preemption_timeout <= 1) {
11436	vmx_preemption_timer_fn(&vmx->nested.preemption_timer);	11485	vmx_preemption_timer_fn(&vmx->nested.preemption_timer);
11437	return;	11486	return;
11438	}	11487	}
11439		11488
		11489	if (vcpu->arch.virtual_tsc_khz == 0)
		11490	return;
		11491
11440	preemption_timeout <<= VMX_MISC_EMULATED_PREEMPTION_TIMER_RATE;	11492	preemption_timeout <<= VMX_MISC_EMULATED_PREEMPTION_TIMER_RATE;
11441	preemption_timeout *= 1000000;	11493	preemption_timeout *= 1000000;
11442	do_div(preemption_timeout, vcpu->arch.virtual_tsc_khz);	11494	do_div(preemption_timeout, vcpu->arch.virtual_tsc_khz);
@@ -11646,11 +11698,15 @@ static int nested_vmx_check_apicv_controls(struct kvm_vcpu *vcpu, · 203 unmodified lines
11646	* bits 15:8 should be zero in posted_intr_nv,	11698	* bits 15:8 should be zero in posted_intr_nv,
11647	* the descriptor address has been already checked	11699	* the descriptor address has been already checked
11648	* in nested_get_vmcs12_pages.	11700	* in nested_get_vmcs12_pages.
		11701	*
		11702	* bits 5:0 of posted_intr_desc_addr should be zero.
11649	*/	11703	*/
11650	if (nested_cpu_has_posted_intr(vmcs12) &&	11704	if (nested_cpu_has_posted_intr(vmcs12) &&
11651	(!nested_cpu_has_vid(vmcs12) \|\|	11705	(!nested_cpu_has_vid(vmcs12) \|\|
11652	!nested_exit_intr_ack_set(vcpu) \|\|	11706	!nested_exit_intr_ack_set(vcpu) \|\|
11653	vmcs12->posted_intr_nv & 0xff00))	11707	(vmcs12->posted_intr_nv & 0xff00) \|\|
		11708	(vmcs12->posted_intr_desc_addr & 0x3f) \|\|
		11709	(!page_address_valid(vcpu, vmcs12->posted_intr_desc_addr))))
11654	return -EINVAL;	11710	return -EINVAL;
11655		11711
11656	/* tpr shadow is needed by all apicv features. */	11712	/* tpr shadow is needed by all apicv features. */
@@ -12076,11 +12132,10 @@ static int prepare_vmcs02(struct kvm_vcpu vcpu, struct vmcs12 vmcs12, · 419 unmodified lines
12076		12132
12077	exec_control = vmcs12->pin_based_vm_exec_control;	12133	exec_control = vmcs12->pin_based_vm_exec_control;
12078		12134
12079	/* Preemption timer setting is only taken from vmcs01. */	12135	/* Preemption timer setting is computed directly in vmx_vcpu_run. */
12080	exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER;
12081	exec_control \|= vmcs_config.pin_based_exec_ctrl;	12136	exec_control \|= vmcs_config.pin_based_exec_ctrl;
12082	if (vmx->hv_deadline_tsc == -1)	12137	exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER;
12083	exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER;	12138	vmx->loaded_vmcs->hv_timer_armed = false;
12084		12139
12085	/* Posted interrupts setting is only taken from vmcs12. */	12140	/* Posted interrupts setting is only taken from vmcs12. */
12086	if (nested_cpu_has_posted_intr(vmcs12)) {	12141	if (nested_cpu_has_posted_intr(vmcs12)) {
@@ -12318,6 +12373,9 @@ static int check_vmentry_prereqs(struct kvm_vcpu vcpu, struct vmcs12 vmcs12) · 231 unmodified lines
12318	vmcs12->guest_activity_state != GUEST_ACTIVITY_HLT)	12373	vmcs12->guest_activity_state != GUEST_ACTIVITY_HLT)
12319	return VMXERR_ENTRY_INVALID_CONTROL_FIELD;	12374	return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
12320		12375
		12376	if (nested_cpu_has_vpid(vmcs12) && !vmcs12->virtual_processor_id)
		12377	return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
		12378
12321	if (nested_vmx_check_io_bitmap_controls(vcpu, vmcs12))	12379	if (nested_vmx_check_io_bitmap_controls(vcpu, vmcs12))
12322	return VMXERR_ENTRY_INVALID_CONTROL_FIELD;	12380	return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
12323		12381
@@ -12537,8 +12595,11 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu vcpu, u32 exit_qual) · 213 unmodified lines
12537	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);	12595	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
12538	bool from_vmentry = !!exit_qual;	12596	bool from_vmentry = !!exit_qual;
12539	u32 dummy_exit_qual;	12597	u32 dummy_exit_qual;
		12598	u32 vmcs01_cpu_exec_ctrl;
12540	int r = 0;	12599	int r = 0;
12541		12600
		12601	vmcs01_cpu_exec_ctrl = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
		12602
12542	enter_guest_mode(vcpu);	12603	enter_guest_mode(vcpu);
12543		12604
12544	if (!(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS))	12605	if (!(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS))
@@ -12574,6 +12635,25 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu vcpu, u32 exit_qual) · 29 unmodified lines
12574	kvm_make_request(KVM_REQ_GET_VMCS12_PAGES, vcpu);	12635	kvm_make_request(KVM_REQ_GET_VMCS12_PAGES, vcpu);
12575	}	12636	}
12576		12637
		12638	/*
		12639	* If L1 had a pending IRQ/NMI until it executed
		12640	* VMLAUNCH/VMRESUME which wasn't delivered because it was
		12641	* disallowed (e.g. interrupts disabled), L0 needs to
		12642	* evaluate if this pending event should cause an exit from L2
		12643	* to L1 or delivered directly to L2 (e.g. In case L1 don't
		12644	* intercept EXTERNAL_INTERRUPT).
		12645	*
		12646	* Usually this would be handled by L0 requesting a
		12647	* IRQ/NMI window by setting VMCS accordingly. However,
		12648	* this setting was done on VMCS01 and now VMCS02 is active
		12649	* instead. Thus, we force L0 to perform pending event
		12650	* evaluation by requesting a KVM_REQ_EVENT.
		12651	*/
		12652	if (vmcs01_cpu_exec_ctrl &
		12653	(CPU_BASED_VIRTUAL_INTR_PENDING \| CPU_BASED_VIRTUAL_NMI_PENDING)) {
		12654	kvm_make_request(KVM_REQ_EVENT, vcpu);
		12655	}
		12656
12577	/*	12657	/*
12578	* Note no nested_vmx_succeed or nested_vmx_fail here. At this point	12658	* Note no nested_vmx_succeed or nested_vmx_fail here. At this point
12579	* we are no longer running L1, and VMLAUNCH/VMRESUME has not yet	12659	* we are no longer running L1, and VMLAUNCH/VMRESUME has not yet
@@ -12841,6 +12921,11 @@ static int vmx_check_nested_events(struct kvm_vcpu *vcpu, bool external_intr) · 261 unmodified lines
12841	return 0;	12921	return 0;
12842	}	12922	}
12843		12923
		12924	static void vmx_request_immediate_exit(struct kvm_vcpu *vcpu)
		12925	{
		12926	to_vmx(vcpu)->req_immediate_exit = true;
		12927	}
		12928
12844	static u32 vmx_get_preemption_timer_value(struct kvm_vcpu *vcpu)	12929	static u32 vmx_get_preemption_timer_value(struct kvm_vcpu *vcpu)
12845	{	12930	{
12846	ktime_t remaining =	12931	ktime_t remaining =
@@ -13231,12 +13316,7 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason, · 384 unmodified lines
13231	vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.host.nr);	13316	vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, vmx->msr_autoload.host.nr);
13232	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.guest.nr);	13317	vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, vmx->msr_autoload.guest.nr);
13233	vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset);	13318	vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset);
13234	if (vmx->hv_deadline_tsc == -1)	13319
13235	vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL,
13236	PIN_BASED_VMX_PREEMPTION_TIMER);
13237	else
13238	vmcs_set_bits(PIN_BASED_VM_EXEC_CONTROL,
13239	PIN_BASED_VMX_PREEMPTION_TIMER);
13240	if (kvm_has_tsc_control)	13320	if (kvm_has_tsc_control)
13241	decache_tsc_multiplier(vmx);	13321	decache_tsc_multiplier(vmx);
13242		13322
@@ -13440,18 +13520,12 @@ static int vmx_set_hv_timer(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc) · 197 unmodified lines
13440	return -ERANGE;	13520	return -ERANGE;
13441		13521
13442	vmx->hv_deadline_tsc = tscl + delta_tsc;	13522	vmx->hv_deadline_tsc = tscl + delta_tsc;
13443	vmcs_set_bits(PIN_BASED_VM_EXEC_CONTROL,
13444	PIN_BASED_VMX_PREEMPTION_TIMER);
13445
13446	return delta_tsc == 0;	13523	return delta_tsc == 0;
13447	}	13524	}
13448		13525
13449	static void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu)	13526	static void vmx_cancel_hv_timer(struct kvm_vcpu *vcpu)
13450	{	13527	{
13451	struct vcpu_vmx *vmx = to_vmx(vcpu);	13528	to_vmx(vcpu)->hv_deadline_tsc = -1;
13452	vmx->hv_deadline_tsc = -1;
13453	vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL,
13454	PIN_BASED_VMX_PREEMPTION_TIMER);
13455	}	13529	}
13456	#endif	13530	#endif
13457		13531
@@ -13932,6 +14006,14 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 474 unmodified lines
13932	~(KVM_STATE_NESTED_SMM_GUEST_MODE \| KVM_STATE_NESTED_SMM_VMXON))	14006	~(KVM_STATE_NESTED_SMM_GUEST_MODE \| KVM_STATE_NESTED_SMM_VMXON))
13933	return -EINVAL;	14007	return -EINVAL;
13934		14008
		14009	/*
		14010	* SMM temporarily disables VMX, so we cannot be in guest mode,
		14011	* nor can VMLAUNCH/VMRESUME be pending. Outside SMM, SMM flags
		14012	* must be zero.
		14013	*/
		14014	if (is_smm(vcpu) ? kvm_state->flags : kvm_state->vmx.smm.flags)
		14015	return -EINVAL;
		14016
13935	if ((kvm_state->vmx.smm.flags & KVM_STATE_NESTED_SMM_GUEST_MODE) &&	14017	if ((kvm_state->vmx.smm.flags & KVM_STATE_NESTED_SMM_GUEST_MODE) &&
13936	!(kvm_state->vmx.smm.flags & KVM_STATE_NESTED_SMM_VMXON))	14018	!(kvm_state->vmx.smm.flags & KVM_STATE_NESTED_SMM_VMXON))
13937	return -EINVAL;	14019	return -EINVAL;
@@ -13988,9 +14070,6 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 50 unmodified lines
13988	check_vmentry_postreqs(vcpu, vmcs12, &exit_qual))	14070	check_vmentry_postreqs(vcpu, vmcs12, &exit_qual))
13989	return -EINVAL;	14071	return -EINVAL;
13990		14072
13991	if (kvm_state->flags & KVM_STATE_NESTED_RUN_PENDING)
13992	vmx->nested.nested_run_pending = 1;
13993
13994	vmx->nested.dirty_vmcs12 = true;	14073	vmx->nested.dirty_vmcs12 = true;
13995	ret = enter_vmx_non_root_mode(vcpu, NULL);	14074	ret = enter_vmx_non_root_mode(vcpu, NULL);
13996	if (ret)	14075	if (ret)
@@ -14078,6 +14157,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = { · 81 unmodified lines
14078	.apicv_post_state_restore = vmx_apicv_post_state_restore,	14157	.apicv_post_state_restore = vmx_apicv_post_state_restore,
14079	.hwapic_irr_update = vmx_hwapic_irr_update,	14158	.hwapic_irr_update = vmx_hwapic_irr_update,
14080	.hwapic_isr_update = vmx_hwapic_isr_update,	14159	.hwapic_isr_update = vmx_hwapic_isr_update,
		14160	.guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
14081	.sync_pir_to_irr = vmx_sync_pir_to_irr,	14161	.sync_pir_to_irr = vmx_sync_pir_to_irr,
14082	.deliver_posted_interrupt = vmx_deliver_posted_interrupt,	14162	.deliver_posted_interrupt = vmx_deliver_posted_interrupt,
14083		14163
@@ -14111,6 +14191,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = { · 27 unmodified lines
14111	.umip_emulated = vmx_umip_emulated,	14191	.umip_emulated = vmx_umip_emulated,
14112		14192
14113	.check_nested_events = vmx_check_nested_events,	14193	.check_nested_events = vmx_check_nested_events,
		14194	.request_immediate_exit = vmx_request_immediate_exit,
14114		14195
14115	.sched_in = vmx_sched_in,	14196	.sched_in = vmx_sched_in,
14116		14197

arch/x86/kvm/x86.c+88−41

@@ -628,7 +628,7 @@ bool pdptrs_changed(struct kvm_vcpu *vcpu) · 627 unmodified lines
628	gfn_t gfn;	628	gfn_t gfn;
629	int r;	629	int r;
630		630
631	if (is_long_mode(vcpu) \|\| !is_pae(vcpu))	631	if (is_long_mode(vcpu) \|\| !is_pae(vcpu) \|\| !is_paging(vcpu))
632	return false;	632	return false;
633		633
634	if (!test_bit(VCPU_EXREG_PDPTR,	634	if (!test_bit(VCPU_EXREG_PDPTR,
@@ -2537,7 +2537,6 @@ int kvm_set_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 1902 unmodified lines
2537	break;	2537	break;
2538	case MSR_PLATFORM_INFO:	2538	case MSR_PLATFORM_INFO:
2539	if (!msr_info->host_initiated \|\|	2539	if (!msr_info->host_initiated \|\|
2540	data & ~MSR_PLATFORM_INFO_CPUID_FAULT \|\|
2541	(!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&	2540	(!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2542	cpuid_fault_enabled(vcpu)))	2541	cpuid_fault_enabled(vcpu)))
2543	return 1;	2542	return 1;
@@ -2780,6 +2779,9 @@ int kvm_get_msr_common(struct kvm_vcpu vcpu, struct msr_data msr_info) · 236 unmodified lines
2780	msr_info->data = vcpu->arch.osvw.status;	2779	msr_info->data = vcpu->arch.osvw.status;
2781	break;	2780	break;
2782	case MSR_PLATFORM_INFO:	2781	case MSR_PLATFORM_INFO:
		2782	if (!msr_info->host_initiated &&
		2783	!vcpu->kvm->arch.guest_can_read_msr_platform_info)
		2784	return 1;
2783	msr_info->data = vcpu->arch.msr_platform_info;	2785	msr_info->data = vcpu->arch.msr_platform_info;
2784	break;	2786	break;
2785	case MSR_MISC_FEATURES_ENABLES:	2787	case MSR_MISC_FEATURES_ENABLES:
@@ -2927,6 +2929,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 141 unmodified lines
2927	case KVM_CAP_SPLIT_IRQCHIP:	2929	case KVM_CAP_SPLIT_IRQCHIP:
2928	case KVM_CAP_IMMEDIATE_EXIT:	2930	case KVM_CAP_IMMEDIATE_EXIT:
2929	case KVM_CAP_GET_MSR_FEATURES:	2931	case KVM_CAP_GET_MSR_FEATURES:
		2932	case KVM_CAP_MSR_PLATFORM_INFO:
2930	r = 1;	2933	r = 1;
2931	break;	2934	break;
2932	case KVM_CAP_SYNC_REGS:	2935	case KVM_CAP_SYNC_REGS:
@@ -4007,19 +4010,23 @@ long kvm_arch_vcpu_ioctl(struct file *filp, · 1074 unmodified lines
4007	break;	4010	break;
4008		4011
4009	BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));	4012	BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
		4013	r = -EFAULT;
4010	if (get_user(user_data_size, &user_kvm_nested_state->size))	4014	if (get_user(user_data_size, &user_kvm_nested_state->size))
4011	return -EFAULT;	4015	break;
4012		4016
4013	r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,	4017	r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4014	user_data_size);	4018	user_data_size);
4015	if (r < 0)	4019	if (r < 0)
4016	return r;	4020	break;
4017		4021
4018	if (r > user_data_size) {	4022	if (r > user_data_size) {
4019	if (put_user(r, &user_kvm_nested_state->size))	4023	if (put_user(r, &user_kvm_nested_state->size))
4020	return -EFAULT;	4024	r = -EFAULT;
4021	return -E2BIG;	4025	else
		4026	r = -E2BIG;
		4027	break;
4022	}	4028	}
		4029
4023	r = 0;	4030	r = 0;
4024	break;	4031	break;
4025	}	4032	}
@@ -4031,19 +4038,21 @@ long kvm_arch_vcpu_ioctl(struct file *filp, · 5 unmodified lines
4031	if (!kvm_x86_ops->set_nested_state)	4038	if (!kvm_x86_ops->set_nested_state)
4032	break;	4039	break;
4033		4040
		4041	r = -EFAULT;
4034	if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))	4042	if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4035	return -EFAULT;	4043	break;
4036		4044
		4045	r = -EINVAL;
4037	if (kvm_state.size < sizeof(kvm_state))	4046	if (kvm_state.size < sizeof(kvm_state))
4038	return -EINVAL;	4047	break;
4039		4048
4040	if (kvm_state.flags &	4049	if (kvm_state.flags &
4041	~(KVM_STATE_NESTED_RUN_PENDING \| KVM_STATE_NESTED_GUEST_MODE))	4050	~(KVM_STATE_NESTED_RUN_PENDING \| KVM_STATE_NESTED_GUEST_MODE))
4042	return -EINVAL;	4051	break;
4043		4052
4044	/* nested_run_pending implies guest_mode. */	4053	/* nested_run_pending implies guest_mode. */
4045	if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)	4054	if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)
4046	return -EINVAL;	4055	break;
4047		4056
4048	r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);	4057	r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4049	break;	4058	break;
@@ -4350,6 +4359,10 @@ split_irqchip_unlock: · 300 unmodified lines
4350	kvm->arch.pause_in_guest = true;	4359	kvm->arch.pause_in_guest = true;
4351	r = 0;	4360	r = 0;
4352	break;	4361	break;
		4362	case KVM_CAP_MSR_PLATFORM_INFO:
		4363	kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
		4364	r = 0;
		4365	break;
4353	default:	4366	default:
4354	r = -EINVAL;	4367	r = -EINVAL;
4355	break;	4368	break;
@@ -4987,7 +5000,7 @@ int handle_ud(struct kvm_vcpu *vcpu) · 631 unmodified lines
4987	emul_type = 0;	5000	emul_type = 0;
4988	}	5001	}
4989		5002
4990	er = emulate_instruction(vcpu, emul_type);	5003	er = kvm_emulate_instruction(vcpu, emul_type);
4991	if (er == EMULATE_USER_EXIT)	5004	if (er == EMULATE_USER_EXIT)
4992	return 0;	5005	return 0;
4993	if (er != EMULATE_DONE)	5006	if (er != EMULATE_DONE)
@@ -5870,7 +5883,10 @@ static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2, · 876 unmodified lines
5870	gpa_t gpa = cr2;	5883	gpa_t gpa = cr2;
5871	kvm_pfn_t pfn;	5884	kvm_pfn_t pfn;
5872		5885
5873	if (emulation_type & EMULTYPE_NO_REEXECUTE)	5886	if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
		5887	return false;
		5888
		5889	if (WARN_ON_ONCE(is_guest_mode(vcpu)))
5874	return false;	5890	return false;
5875		5891
5876	if (!vcpu->arch.mmu.direct_map) {	5892	if (!vcpu->arch.mmu.direct_map) {
@@ -5958,7 +5974,10 @@ static bool retry_instruction(struct x86_emulate_ctxt *ctxt, · 81 unmodified lines
5958	*/	5974	*/
5959	vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;	5975	vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5960		5976
5961	if (!(emulation_type & EMULTYPE_RETRY))	5977	if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
		5978	return false;
		5979
		5980	if (WARN_ON_ONCE(is_guest_mode(vcpu)))
5962	return false;	5981	return false;
5963		5982
5964	if (x86_page_table_writing_insn(ctxt))	5983	if (x86_page_table_writing_insn(ctxt))
@@ -6276,7 +6295,19 @@ restart: · 311 unmodified lines
6276		6295
6277	return r;	6296	return r;
6278	}	6297	}
6279	EXPORT_SYMBOL_GPL(x86_emulate_instruction);	6298
		6299	int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
		6300	{
		6301	return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
		6302	}
		6303	EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
		6304
		6305	int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
		6306	void *insn, int insn_len)
		6307	{
		6308	return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
		6309	}
		6310	EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6280		6311
6281	static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,	6312	static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6282	unsigned short port)	6313	unsigned short port)
@@ -7343,6 +7374,12 @@ void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu) · 1060 unmodified lines
7343	}	7374	}
7344	EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);	7375	EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7345		7376
		7377	void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
		7378	{
		7379	smp_send_reschedule(vcpu->cpu);
		7380	}
		7381	EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
		7382
7346	/*	7383	/*
7347	* Returns 1 to let vcpu_run() continue the guest execution loop without	7384	* Returns 1 to let vcpu_run() continue the guest execution loop without
7348	* exiting to the userspace. Otherwise, the value will be returned to the	7385	* exiting to the userspace. Otherwise, the value will be returned to the
@@ -7547,7 +7584,7 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) · 198 unmodified lines
7547		7584
7548	if (req_immediate_exit) {	7585	if (req_immediate_exit) {
7549	kvm_make_request(KVM_REQ_EVENT, vcpu);	7586	kvm_make_request(KVM_REQ_EVENT, vcpu);
7550	smp_send_reschedule(vcpu->cpu);	7587	kvm_x86_ops->request_immediate_exit(vcpu);
7551	}	7588	}
7552		7589
7553	trace_kvm_entry(vcpu->vcpu_id);	7590	trace_kvm_entry(vcpu->vcpu_id);
@@ -7734,7 +7771,7 @@ static inline int complete_emulated_io(struct kvm_vcpu *vcpu) · 180 unmodified lines
7734	{	7771	{
7735	int r;	7772	int r;
7736	vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);	7773	vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7737	r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);	7774	r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7738	srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);	7775	srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7739	if (r != EMULATE_DONE)	7776	if (r != EMULATE_DONE)
7740	return 0;	7777	return 0;
@@ -7811,6 +7848,29 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu) · 70 unmodified lines
7811	return 0;	7848	return 0;
7812	}	7849	}
7813		7850
		7851	/* Swap (qemu) user FPU context for the guest FPU context. */
		7852	static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
		7853	{
		7854	preempt_disable();
		7855	copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
		7856	/* PKRU is separately restored in kvm_x86_ops->run. */
		7857	__copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
		7858	~XFEATURE_MASK_PKRU);
		7859	preempt_enable();
		7860	trace_kvm_fpu(1);
		7861	}
		7862
		7863	/* When vcpu_run ends, restore user space FPU context. */
		7864	static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
		7865	{
		7866	preempt_disable();
		7867	copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
		7868	copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
		7869	preempt_enable();
		7870	++vcpu->stat.fpu_reload;
		7871	trace_kvm_fpu(0);
		7872	}
		7873
7814	int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu vcpu, struct kvm_run kvm_run)	7874	int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu vcpu, struct kvm_run kvm_run)
7815	{	7875	{
7816	int r;	7876	int r;
@@ -8159,7 +8219,7 @@ static int __set_sregs(struct kvm_vcpu vcpu, struct kvm_sregs sregs) · 342 unmodified lines
8159	kvm_update_cpuid(vcpu);	8219	kvm_update_cpuid(vcpu);
8160		8220
8161	idx = srcu_read_lock(&vcpu->kvm->srcu);	8221	idx = srcu_read_lock(&vcpu->kvm->srcu);
8162	if (!is_long_mode(vcpu) && is_pae(vcpu)) {	8222	if (!is_long_mode(vcpu) && is_pae(vcpu) && is_paging(vcpu)) {
8163	load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));	8223	load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8164	mmu_reset_needed = 1;	8224	mmu_reset_needed = 1;
8165	}	8225	}
@@ -8388,29 +8448,6 @@ static void fx_init(struct kvm_vcpu *vcpu) · 222 unmodified lines
8388	vcpu->arch.cr0 \|= X86_CR0_ET;	8448	vcpu->arch.cr0 \|= X86_CR0_ET;
8389	}	8449	}
8390		8450
8391	/* Swap (qemu) user FPU context for the guest FPU context. */
8392	void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8393	{
8394	preempt_disable();
8395	copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8396	/* PKRU is separately restored in kvm_x86_ops->run. */
8397	__copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8398	~XFEATURE_MASK_PKRU);
8399	preempt_enable();
8400	trace_kvm_fpu(1);
8401	}
8402
8403	/* When vcpu_run ends, restore user space FPU context. */
8404	void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8405	{
8406	preempt_disable();
8407	copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8408	copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8409	preempt_enable();
8410	++vcpu->stat.fpu_reload;
8411	trace_kvm_fpu(0);
8412	}
8413
8414	void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)	8451	void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8415	{	8452	{
8416	void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;	8453	void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
@@ -8834,6 +8871,8 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 417 unmodified lines
8834	kvm->arch.kvmclock_offset = -ktime_get_boot_ns();	8871	kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8835	pvclock_update_vm_gtod_copy(kvm);	8872	pvclock_update_vm_gtod_copy(kvm);
8836		8873
		8874	kvm->arch.guest_can_read_msr_platform_info = true;
		8875
8837	INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);	8876	INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8838	INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);	8877	INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8839		8878
@@ -9182,6 +9221,13 @@ void kvm_arch_flush_shadow_memslot(struct kvm *kvm, · 342 unmodified lines
9182	kvm_page_track_flush_slot(kvm, slot);	9221	kvm_page_track_flush_slot(kvm, slot);
9183	}	9222	}
9184		9223
		9224	static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
		9225	{
		9226	return (is_guest_mode(vcpu) &&
		9227	kvm_x86_ops->guest_apic_has_interrupt &&
		9228	kvm_x86_ops->guest_apic_has_interrupt(vcpu));
		9229	}
		9230
9185	static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)	9231	static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9186	{	9232	{
9187	if (!list_empty_careful(&vcpu->async_pf.done))	9233	if (!list_empty_careful(&vcpu->async_pf.done))
@@ -9206,7 +9252,8 @@ static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu) · 18 unmodified lines
9206	return true;	9252	return true;
9207		9253
9208	if (kvm_arch_interrupt_allowed(vcpu) &&	9254	if (kvm_arch_interrupt_allowed(vcpu) &&
9209	kvm_cpu_has_interrupt(vcpu))	9255	(kvm_cpu_has_interrupt(vcpu) \|\|
		9256	kvm_guest_apic_has_interrupt(vcpu)))
9210	return true;	9257	return true;
9211		9258
9212	if (kvm_hv_has_stimer_pending(vcpu))	9259	if (kvm_hv_has_stimer_pending(vcpu))

arch/x86/kvm/x86.h+2−0

@@ -274,6 +274,8 @@ int kvm_mtrr_get_msr(struct kvm_vcpu vcpu, u32 msr, u64 pdata); · 273 unmodified lines
274	bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,	274	bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
275	int page_num);	275	int page_num);
276	bool kvm_vector_hashing_enabled(void);	276	bool kvm_vector_hashing_enabled(void);
		277	int x86_emulate_instruction(struct kvm_vcpu *vcpu, unsigned long cr2,
		278	int emulation_type, void *insn, int insn_len);
277		279
278	#define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP \| XFEATURE_MASK_SSE \	280	#define KVM_SUPPORTED_XCR0 (XFEATURE_MASK_FP \| XFEATURE_MASK_SSE \
279	\| XFEATURE_MASK_YMM \| XFEATURE_MASK_BNDREGS \	281	\| XFEATURE_MASK_YMM \| XFEATURE_MASK_BNDREGS \

arch/x86/mm/init.c+4−0

 		set_memory_np_noalias(begin_ul, len_pages);
 }
+void __weak mem_encrypt_free_decrypted_mem(void) { }
 void __ref free_initmem(void)
 {
 	e820__reallocate_tables();
+	mem_encrypt_free_decrypted_mem();
 	free_kernel_image_pages(&__init_begin, &__init_end);
 }

arch/x86/mm/mem_encrypt.c+24−0

@@ -348,6 +348,30 @@ bool sev_active(void) · 347 unmodified lines
348	EXPORT_SYMBOL(sev_active);	348	EXPORT_SYMBOL(sev_active);
349		349
350	/* Architecture __weak replacement functions */	350	/* Architecture __weak replacement functions */
		351	void __init mem_encrypt_free_decrypted_mem(void)
		352	{
		353	unsigned long vaddr, vaddr_end, npages;
		354	int r;
		355
		356	vaddr = (unsigned long)__start_bss_decrypted_unused;
		357	vaddr_end = (unsigned long)__end_bss_decrypted;
		358	npages = (vaddr_end - vaddr) >> PAGE_SHIFT;
		359
		360	/*
		361	* The unused memory range was mapped decrypted, change the encryption
		362	* attribute from decrypted to encrypted before freeing it.
		363	*/
		364	if (mem_encrypt_active()) {
		365	r = set_memory_encrypted(vaddr, npages);
		366	if (r) {
		367	pr_warn("failed to free unused decrypted pages\n");
		368	return;
		369	}
		370	}
		371
		372	free_init_pages("unused decrypted", vaddr, vaddr_end);
		373	}
		374
351	void __init mem_encrypt_init(void)	375	void __init mem_encrypt_init(void)
352	{	376	{
353	if (!sme_me_mask)	377	if (!sme_me_mask)

arch/x86/mm/pgtable.c+13−4

 	if (pgd_val(pgd) != 0) {
 		pmd_t *pmd = (pmd_t *)pgd_page_vaddr(pgd);
-		*pgdp = native_make_pgd(0);
+		pgd_clear(pgdp);
 		paravirt_release_pmd(pgd_val(pgd) >> PAGE_SHIFT);
 		pmd_free(mm, pmd);
 	int changed = !pte_same(*ptep, entry);
 	if (changed && dirty)
-		*ptep = entry;
+		set_pte(ptep, entry);
 	return changed;
 }
 	VM_BUG_ON(address & ~HPAGE_PMD_MASK);
 	if (changed && dirty) {
-		*pmdp = entry;
+		set_pmd(pmdp, entry);
 		/*
 		 * We had a write-protection fault here and changed the pmd
 		 * to to more permissive. No need to flush the TLB for that,
 	VM_BUG_ON(address & ~HPAGE_PUD_MASK);
 	if (changed && dirty) {
-		*pudp = entry;
+		set_pud(pudp, entry);
 		/*
 		 * We had a write-protection fault here and changed the pud
 		 * to to more permissive. No need to flush the TLB for that,
 {
 	unsigned long address = __fix_to_virt(idx);
+#ifdef CONFIG_X86_64
+       /*
+	* Ensure that the static initial page tables are covering the
+	* fixmap completely.
+	*/
+	BUILD_BUG_ON(__end_of_permanent_fixed_addresses >
+		     (FIXMAP_PMD_NUM * PTRS_PER_PTE));
+#endif
 	if (idx >= __end_of_fixed_addresses) {
 		BUG();
 		return;

arch/x86/platform/efi/efi_32.c+1−2

 void __init efi_call_phys_epilog(pgd_t *save_pgd)
 {
+	load_fixmap_gdt(0);
 	load_cr3(save_pgd);
 	__flush_tlb_all();
-	load_fixmap_gdt(0);
 }
 void __init efi_runtime_update_mappings(void)

arch/x86/xen/mmu_pv.c+6−2

@@ -1907,7 +1907,7 @@ void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) · 1906 unmodified lines
1907	/* L3_k[511] -> level2_fixmap_pgt */	1907	/* L3_k[511] -> level2_fixmap_pgt */
1908	convert_pfn_mfn(level3_kernel_pgt);	1908	convert_pfn_mfn(level3_kernel_pgt);
1909		1909
1910	/* L3_k[511][506] -> level1_fixmap_pgt */	1910	/* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
1911	convert_pfn_mfn(level2_fixmap_pgt);	1911	convert_pfn_mfn(level2_fixmap_pgt);
1912		1912
1913	/* We get [511][511] and have Xen's version of level2_kernel_pgt */	1913	/* We get [511][511] and have Xen's version of level2_kernel_pgt */
@@ -1952,7 +1952,11 @@ void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) · 38 unmodified lines
1952	set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);	1952	set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1953	set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);	1953	set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1954	set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);	1954	set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1955	set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);	1955
		1956	for (i = 0; i < FIXMAP_PMD_NUM; i++) {
		1957	set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
		1958	PAGE_KERNEL_RO);
		1959	}
1956		1960
1957	/* Pin down new L4 */	1961	/* Pin down new L4 */
1958	pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,	1962	pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,

arch/x86/xen/pmu.c+1−1

@@ -479,7 +479,7 @@ static void xen_convert_regs(const struct xen_pmu_regs *xen_regs, · 478 unmodified lines
479	irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id)	479	irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id)
480	{	480	{
481	int err, ret = IRQ_NONE;	481	int err, ret = IRQ_NONE;
482	struct pt_regs regs;	482	struct pt_regs regs = {0};
483	const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();	483	const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
484	uint8_t xenpmu_flags = get_xenpmu_flags();	484	uint8_t xenpmu_flags = get_xenpmu_flags();
485		485

arch/xtensa/Kconfig+1−0

@@ -4,6 +4,7 @@ config ZONE_DMA · 3 unmodified lines
4		4
5	config XTENSA	5	config XTENSA
6	def_bool y	6	def_bool y
		7	select ARCH_HAS_SG_CHAIN
7	select ARCH_HAS_SYNC_DMA_FOR_CPU	8	select ARCH_HAS_SYNC_DMA_FOR_CPU
8	select ARCH_HAS_SYNC_DMA_FOR_DEVICE	9	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9	select ARCH_NO_COHERENT_DMA_MMAP if !MMU	10	select ARCH_NO_COHERENT_DMA_MMAP if !MMU

arch/xtensa/Makefile+0−4

 vardirs := $(patsubst %,arch/xtensa/variants/%/,$(variant-y))
 plfdirs := $(patsubst %,arch/xtensa/platforms/%/,$(platform-y))
-ifeq ($(KBUILD_SRC),)
-KBUILD_CPPFLAGS += $(patsubst %,-I%include,$(vardirs) $(plfdirs))
-else
 KBUILD_CPPFLAGS += $(patsubst %,-I$(srctree)/%include,$(vardirs) $(plfdirs))
-endif
 KBUILD_DEFCONFIG := iss_defconfig

arch/xtensa/platforms/iss/setup.c+15−10

 void __init platform_setup(char **p_cmdline)
 {
+	static void *argv[COMMAND_LINE_SIZE / sizeof(void *)] __initdata;
+	static char cmdline[COMMAND_LINE_SIZE] __initdata;
 	int argc = simc_argc();
 	int argv_size = simc_argv_size();
 	if (argc > 1) {
-		void **argv = alloc_bootmem(argv_size);
+		if (argv_size > sizeof(argv)) {
-		char *cmdline = alloc_bootmem(argv_size);
+			pr_err("%s: command line too long: argv_size = %d\n",
-		int i;
+			       __func__, argv_size);
+		} else {
+			int i;
-		cmdline[0] = 0;
+			cmdline[0] = 0;
-		simc_argv((void *)argv);
+			simc_argv((void *)argv);
-		for (i = 1; i < argc; ++i) {
+			for (i = 1; i < argc; ++i) {
-			if (i > 1)
+				if (i > 1)
-				strcat(cmdline, " ");
+					strcat(cmdline, " ");
-			strcat(cmdline, argv[i]);
+				strcat(cmdline, argv[i]);
+			}
+			*p_cmdline = cmdline;
 		}
-		*p_cmdline = cmdline;
 	}
 	atomic_notifier_chain_register(&panic_notifier_list, &iss_panic_block);

block/bio.c+1−1

@@ -1685,7 +1685,7 @@ void generic_end_io_acct(struct request_queue *q, int req_op, · 1684 unmodified lines
1685	const int sgrp = op_stat_group(req_op);	1685	const int sgrp = op_stat_group(req_op);
1686	int cpu = part_stat_lock();	1686	int cpu = part_stat_lock();
1687		1687
1688	part_stat_add(cpu, part, ticks[sgrp], duration);	1688	part_stat_add(cpu, part, nsecs[sgrp], jiffies_to_nsecs(duration));
1689	part_round_stats(q, cpu, part);	1689	part_round_stats(q, cpu, part);
1690	part_dec_in_flight(q, part, op_is_write(req_op));	1690	part_dec_in_flight(q, part, op_is_write(req_op));
1691		1691

block/blk-cgroup.c+3−1

 	for (i = 0; i < BLKCG_MAX_POLS; i++)
 		if (!blkcg_policy[i])
 			break;
-	if (i >= BLKCG_MAX_POLS)
+	if (i >= BLKCG_MAX_POLS) {
+		pr_warn("blkcg_policy_register: BLKCG_MAX_POLS too small\n");
 		goto err_unlock;
+	}
 	/* Make sure cpd/pd_alloc_fn and cpd/pd_free_fn in pairs */
 	if ((!pol->cpd_alloc_fn ^ !pol->cpd_free_fn) ||

block/blk-core.c+1−3

 	 * containing request is enough.
 	 */
 	if (blk_do_io_stat(req) && !(req->rq_flags & RQF_FLUSH_SEQ)) {
-		unsigned long duration;
 		const int sgrp = op_stat_group(req_op(req));
 		struct hd_struct *part;
 		int cpu;
-		duration = nsecs_to_jiffies(now - req->start_time_ns);
 		cpu = part_stat_lock();
 		part = req->part;
 		part_stat_inc(cpu, part, ios[sgrp]);
-		part_stat_add(cpu, part, ticks[sgrp], duration);
+		part_stat_add(cpu, part, nsecs[sgrp], now - req->start_time_ns);
 		part_round_stats(req->q, cpu, part);
 		part_dec_in_flight(req->q, part, rq_data_dir(req));

block/blk-mq-tag.c+2−5

 	 * synchronize_rcu() to ensure this function left the critical section
 	 * below.
 	 */
-	rcu_read_lock();
+	if (!percpu_ref_tryget(&q->q_usage_counter))
-	if (percpu_ref_is_zero(&q->q_usage_counter)) {
-		rcu_read_unlock();
 		return;
-	}
 	queue_for_each_hw_ctx(q, hctx, i) {
 		struct blk_mq_tags *tags = hctx->tags;
 			bt_for_each(hctx, &tags->breserved_tags, fn, priv, true);
 		bt_for_each(hctx, &tags->bitmap_tags, fn, priv, false);
 	}
-	rcu_read_unlock();
+	blk_queue_exit(q);
 }
 static int bt_alloc(struct sbitmap_queue *bt, unsigned int depth,

block/blk-mq.c+2−2

@@ -1631,7 +1631,7 @@ void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule) · 1630 unmodified lines
1631	BUG_ON(!rq->q);	1631	BUG_ON(!rq->q);
1632	if (rq->mq_ctx != this_ctx) {	1632	if (rq->mq_ctx != this_ctx) {
1633	if (this_ctx) {	1633	if (this_ctx) {
1634	trace_block_unplug(this_q, depth, from_schedule);	1634	trace_block_unplug(this_q, depth, !from_schedule);
1635	blk_mq_sched_insert_requests(this_q, this_ctx,	1635	blk_mq_sched_insert_requests(this_q, this_ctx,
1636	&ctx_list,	1636	&ctx_list,
1637	from_schedule);	1637	from_schedule);
@@ -1651,7 +1651,7 @@ void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule) · 13 unmodified lines
1651	* on 'ctx_list'. Do those.	1651	* on 'ctx_list'. Do those.
1652	*/	1652	*/
1653	if (this_ctx) {	1653	if (this_ctx) {
1654	trace_block_unplug(this_q, depth, from_schedule);	1654	trace_block_unplug(this_q, depth, !from_schedule);
1655	blk_mq_sched_insert_requests(this_q, this_ctx, &ctx_list,	1655	blk_mq_sched_insert_requests(this_q, this_ctx, &ctx_list,
1656	from_schedule);	1656	from_schedule);
1657	}	1657	}

block/elevator.c+1−1

@@ -589,7 +589,7 @@ void elv_drain_elevator(struct request_queue *q) · 588 unmodified lines
589		589
590	while (e->type->ops.sq.elevator_dispatch_fn(q, 1))	590	while (e->type->ops.sq.elevator_dispatch_fn(q, 1))
591	;	591	;
592	if (q->nr_sorted && printed++ < 10) {	592	if (q->nr_sorted && !blk_queue_is_zoned(q) && printed++ < 10 ) {
593	printk(KERN_ERR "%s: forced dispatching is broken "	593	printk(KERN_ERR "%s: forced dispatching is broken "
594	"(nr_sorted=%u), please report this\n",	594	"(nr_sorted=%u), please report this\n",
595	q->elevator->type->elevator_name, q->nr_sorted);	595	q->elevator->type->elevator_name, q->nr_sorted);

block/genhd.c+3−3

block/partition-generic.c+3−3

drivers/acpi/acpi_lpss.c+1−1

@@ -879,7 +879,7 @@ static void acpi_lpss_dismiss(struct device *dev) · 878 unmodified lines
879	#define LPSS_GPIODEF0_DMA_LLP BIT(13)	879	#define LPSS_GPIODEF0_DMA_LLP BIT(13)
880		880
881	static DEFINE_MUTEX(lpss_iosf_mutex);	881	static DEFINE_MUTEX(lpss_iosf_mutex);
882	static bool lpss_iosf_d3_entered;	882	static bool lpss_iosf_d3_entered = true;
883		883
884	static void lpss_iosf_enter_d3_state(void)	884	static void lpss_iosf_enter_d3_state(void)
885	{	885	{

drivers/acpi/bus.c+7−6

 #include <linux/delay.h>
 #ifdef CONFIG_X86
 #include <asm/mpspec.h>
+#include <linux/dmi.h>
 #endif
 #include <linux/acpi_iort.h>
 #include <linux/pci.h>
 #include <acpi/apei.h>
-#include <linux/dmi.h>
 #include <linux/suspend.h>
 #include "internal.h"
 	},
 	{}
 };
-#else
-static const struct dmi_system_id dsdt_dmi_table[] __initconst = {
-	{}
-};
 #endif
 /* --------------------------------------------------------------------------
 	acpi_permanent_mmap = true;
+#ifdef CONFIG_X86
 	/*
 	 * If the machine falls into the DMI check table,
-	 * DSDT will be copied to memory
+	 * DSDT will be copied to memory.
+	 * Note that calling dmi_check_system() here on other architectures
+	 * would not be OK because only x86 initializes dmi early enough.
+	 * Thankfully only x86 systems need such quirks for now.
 	 */
 	dmi_check_system(dsdt_dmi_table);
+#endif
 	status = acpi_reallocate_root_table();
 	if (ACPI_FAILURE(status)) {

drivers/android/binder_alloc.c+35−8

 	return vma ? -ENOMEM : -ESRCH;
 }
+static inline void binder_alloc_set_vma(struct binder_alloc *alloc,
+		struct vm_area_struct *vma)
+{
+	if (vma)
+		alloc->vma_vm_mm = vma->vm_mm;
+	/*
+	 * If we see alloc->vma is not NULL, buffer data structures set up
+	 * completely. Look at smp_rmb side binder_alloc_get_vma.
+	 * We also want to guarantee new alloc->vma_vm_mm is always visible
+	 * if alloc->vma is set.
+	 */
+	smp_wmb();
+	alloc->vma = vma;
+}
+static inline struct vm_area_struct *binder_alloc_get_vma(
+		struct binder_alloc *alloc)
+{
+	struct vm_area_struct *vma = NULL;
+	if (alloc->vma) {
+		/* Look at description in binder_alloc_set_vma */
+		smp_rmb();
+		vma = alloc->vma;
+	}
+	return vma;
+}
 static struct binder_buffer *binder_alloc_new_buf_locked(
 				struct binder_alloc *alloc,
 				size_t data_size,
 	size_t size, data_offsets_size;
 	int ret;
-	if (alloc->vma == NULL) {
+	if (!binder_alloc_get_vma(alloc)) {
 		binder_alloc_debug(BINDER_DEBUG_USER_ERROR,
 				   "%d: binder_alloc_buf, no vma\n",
 				   alloc->pid);
 	buffer->free = 1;
 	binder_insert_free_buffer(alloc, buffer);
 	alloc->free_async_space = alloc->buffer_size / 2;
-	barrier();
+	binder_alloc_set_vma(alloc, vma);
-	alloc->vma = vma;
-	alloc->vma_vm_mm = vma->vm_mm;
 	mmgrab(alloc->vma_vm_mm);
 	return 0;
 	int buffers, page_count;
 	struct binder_buffer *buffer;
-	BUG_ON(alloc->vma);
 	buffers = 0;
 	mutex_lock(&alloc->mutex);
+	BUG_ON(alloc->vma);
 	while ((n = rb_first(&alloc->allocated_buffers))) {
 		buffer = rb_entry(n, struct binder_buffer, rb_node);
  */
 void binder_alloc_vma_close(struct binder_alloc *alloc)
 {
-	WRITE_ONCE(alloc->vma, NULL);
+	binder_alloc_set_vma(alloc, NULL);
 }
 /**
 	index = page - alloc->pages;
 	page_addr = (uintptr_t)alloc->buffer + index * PAGE_SIZE;
-	vma = alloc->vma;
+	vma = binder_alloc_get_vma(alloc);
 	if (vma) {
 		if (!mmget_not_zero(alloc->vma_vm_mm))
 			goto err_mmget;

drivers/ata/libata-core.c+12−2

@@ -5359,10 +5359,20 @@ void ata_qc_complete(struct ata_queued_cmd *qc) · 5358 unmodified lines
5359	*/	5359	*/
5360	int ata_qc_complete_multiple(struct ata_port *ap, u64 qc_active)	5360	int ata_qc_complete_multiple(struct ata_port *ap, u64 qc_active)
5361	{	5361	{
		5362	u64 done_mask, ap_qc_active = ap->qc_active;
5362	int nr_done = 0;	5363	int nr_done = 0;
5363	u64 done_mask;
5364		5364
5365	done_mask = ap->qc_active ^ qc_active;	5365	/*
		5366	* If the internal tag is set on ap->qc_active, then we care about
		5367	* bit0 on the passed in qc_active mask. Move that bit up to match
		5368	* the internal tag.
		5369	*/
		5370	if (ap_qc_active & (1ULL << ATA_TAG_INTERNAL)) {
		5371	qc_active \|= (qc_active & 0x01) << ATA_TAG_INTERNAL;
		5372	qc_active ^= qc_active & 0x01;
		5373	}
		5374
		5375	done_mask = ap_qc_active ^ qc_active;
5366		5376
5367	if (unlikely(done_mask & qc_active)) {	5377	if (unlikely(done_mask & qc_active)) {
5368	ata_port_err(ap, "illegal qc_active transition (%08llx->%08llx)\n",	5378	ata_port_err(ap, "illegal qc_active transition (%08llx->%08llx)\n",

drivers/base/firmware_loader/main.c+18−12

 static int alloc_lookup_fw_priv(const char *fw_name,
 				struct firmware_cache *fwc,
 				struct fw_priv **fw_priv, void *dbuf,
-				size_t size)
+				size_t size, enum fw_opt opt_flags)
 {
 	struct fw_priv *tmp;
 	spin_lock(&fwc->lock);
-	tmp = __lookup_fw_priv(fw_name);
+	if (!(opt_flags & FW_OPT_NOCACHE)) {
-	if (tmp) {
+		tmp = __lookup_fw_priv(fw_name);
-		kref_get(&tmp->ref);
+		if (tmp) {
-		spin_unlock(&fwc->lock);
+			kref_get(&tmp->ref);
-		*fw_priv = tmp;
+			spin_unlock(&fwc->lock);
-		pr_debug("batched request - sharing the same struct fw_priv and lookup for multiple requests\n");
+			*fw_priv = tmp;
-		return 1;
+			pr_debug("batched request - sharing the same struct fw_priv and lookup for multiple requests\n");
+			return 1;
+		}
 	}
 	tmp = __allocate_fw_priv(fw_name, fwc, dbuf, size);
-	if (tmp)
+	if (tmp && !(opt_flags & FW_OPT_NOCACHE))
 		list_add(&tmp->list, &fwc->head);
 	spin_unlock(&fwc->lock);
  */
 static int
 _request_firmware_prepare(struct firmware **firmware_p, const char *name,
-			  struct device *device, void *dbuf, size_t size)
+			  struct device *device, void *dbuf, size_t size,
+			  enum fw_opt opt_flags)
 {
 	struct firmware *firmware;
 	struct fw_priv *fw_priv;
 		return 0; /* assigned */
 	}
-	ret = alloc_lookup_fw_priv(name, &fw_cache, &fw_priv, dbuf, size);
+	ret = alloc_lookup_fw_priv(name, &fw_cache, &fw_priv, dbuf, size,
+				  opt_flags);
 	/*
 	 * bind with 'priv' now to avoid warning in failure path
 		goto out;
 	}
-	ret = _request_firmware_prepare(&fw, name, device, buf, size);
+	ret = _request_firmware_prepare(&fw, name, device, buf, size,
+					opt_flags);
 	if (ret <= 0) /* error or already assigned */
 		goto out;

drivers/block/floppy.c+3−0

 					  (struct floppy_struct **)&outparam);
 		if (ret)
 			return ret;
+		memcpy(&inparam.g, outparam,
+				offsetof(struct floppy_struct, name));
+		outparam = &inparam.g;
 		break;
 	case FDMSGON:
 		UDP->flags |= FTD_MSG;

drivers/block/null_blk.h+10−7

 #ifdef CONFIG_BLK_DEV_ZONED
 int null_zone_init(struct nullb_device *dev);
 void null_zone_exit(struct nullb_device *dev);
-blk_status_t null_zone_report(struct nullb *nullb,
+blk_status_t null_zone_report(struct nullb *nullb, struct bio *bio);
-					    struct nullb_cmd *cmd);
+void null_zone_write(struct nullb_cmd *cmd, sector_t sector,
-void null_zone_write(struct nullb_cmd *cmd);
+			unsigned int nr_sectors);
-void null_zone_reset(struct nullb_cmd *cmd);
+void null_zone_reset(struct nullb_cmd *cmd, sector_t sector);
 #else
 static inline int null_zone_init(struct nullb_device *dev)
 {
 }
 static inline void null_zone_exit(struct nullb_device *dev) {}
 static inline blk_status_t null_zone_report(struct nullb *nullb,
-					    struct nullb_cmd *cmd)
+					    struct bio *bio)
 {
 	return BLK_STS_NOTSUPP;
 }
-static inline void null_zone_write(struct nullb_cmd *cmd) {}
+static inline void null_zone_write(struct nullb_cmd *cmd, sector_t sector,
-static inline void null_zone_reset(struct nullb_cmd *cmd) {}
+				   unsigned int nr_sectors)
+{
+}
+static inline void null_zone_reset(struct nullb_cmd *cmd, sector_t sector) {}
 #endif /* CONFIG_BLK_DEV_ZONED */
 #endif /* __NULL_BLK_H */

drivers/block/null_blk_main.c+38−7

@@ -1157,16 +1157,33 @@ static void null_restart_queue_async(struct nullb *nullb) · 1156 unmodified lines
1157	}	1157	}
1158	}	1158	}
1159		1159
		1160	static bool cmd_report_zone(struct nullb nullb, struct nullb_cmd cmd)
		1161	{
		1162	struct nullb_device *dev = cmd->nq->dev;
		1163
		1164	if (dev->queue_mode == NULL_Q_BIO) {
		1165	if (bio_op(cmd->bio) == REQ_OP_ZONE_REPORT) {
		1166	cmd->error = null_zone_report(nullb, cmd->bio);
		1167	return true;
		1168	}
		1169	} else {
		1170	if (req_op(cmd->rq) == REQ_OP_ZONE_REPORT) {
		1171	cmd->error = null_zone_report(nullb, cmd->rq->bio);
		1172	return true;
		1173	}
		1174	}
		1175
		1176	return false;
		1177	}
		1178
1160	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd)	1179	static blk_status_t null_handle_cmd(struct nullb_cmd *cmd)
1161	{	1180	{
1162	struct nullb_device *dev = cmd->nq->dev;	1181	struct nullb_device *dev = cmd->nq->dev;
1163	struct nullb *nullb = dev->nullb;	1182	struct nullb *nullb = dev->nullb;
1164	int err = 0;	1183	int err = 0;
1165		1184
1166	if (req_op(cmd->rq) == REQ_OP_ZONE_REPORT) {	1185	if (cmd_report_zone(nullb, cmd))
1167	cmd->error = null_zone_report(nullb, cmd);
1168	goto out;	1186	goto out;
1169	}
1170		1187
1171	if (test_bit(NULLB_DEV_FL_THROTTLED, &dev->flags)) {	1188	if (test_bit(NULLB_DEV_FL_THROTTLED, &dev->flags)) {
1172	struct request *rq = cmd->rq;	1189	struct request *rq = cmd->rq;
@@ -1234,10 +1251,24 @@ static blk_status_t null_handle_cmd(struct nullb_cmd *cmd) · 61 unmodified lines
1234	cmd->error = errno_to_blk_status(err);	1251	cmd->error = errno_to_blk_status(err);
1235		1252
1236	if (!cmd->error && dev->zoned) {	1253	if (!cmd->error && dev->zoned) {
1237	if (req_op(cmd->rq) == REQ_OP_WRITE)	1254	sector_t sector;
1238	null_zone_write(cmd);	1255	unsigned int nr_sectors;
1239	else if (req_op(cmd->rq) == REQ_OP_ZONE_RESET)	1256	int op;
1240	null_zone_reset(cmd);	1257
		1258	if (dev->queue_mode == NULL_Q_BIO) {
		1259	op = bio_op(cmd->bio);
		1260	sector = cmd->bio->bi_iter.bi_sector;
		1261	nr_sectors = cmd->bio->bi_iter.bi_size >> 9;
		1262	} else {
		1263	op = req_op(cmd->rq);
		1264	sector = blk_rq_pos(cmd->rq);
		1265	nr_sectors = blk_rq_sectors(cmd->rq);
		1266	}
		1267
		1268	if (op == REQ_OP_WRITE)
		1269	null_zone_write(cmd, sector, nr_sectors);
		1270	else if (op == REQ_OP_ZONE_RESET)
		1271	null_zone_reset(cmd, sector);
1241	}	1272	}
1242	out:	1273	out:
1243	/* Complete IO by inline, softirq or timer */	1274	/* Complete IO by inline, softirq or timer */

drivers/block/null_blk_zoned.c+14−20

@@ -48,8 +48,8 @@ void null_zone_exit(struct nullb_device *dev) · 47 unmodified lines
48	kvfree(dev->zones);	48	kvfree(dev->zones);
49	}	49	}
50		50
51	static void null_zone_fill_rq(struct nullb_device dev, struct request rq,	51	static void null_zone_fill_bio(struct nullb_device dev, struct bio bio,
52	unsigned int zno, unsigned int nr_zones)	52	unsigned int zno, unsigned int nr_zones)
53	{	53	{
54	struct blk_zone_report_hdr *hdr = NULL;	54	struct blk_zone_report_hdr *hdr = NULL;
55	struct bio_vec bvec;	55	struct bio_vec bvec;
@@ -57,7 +57,7 @@ static void null_zone_fill_rq(struct nullb_device dev, struct request rq, · 1 unmodified line
57	void *addr;	57	void *addr;
58	unsigned int zones_to_cpy;	58	unsigned int zones_to_cpy;
59		59
60	bio_for_each_segment(bvec, rq->bio, iter) {	60	bio_for_each_segment(bvec, bio, iter) {
61	addr = kmap_atomic(bvec.bv_page);	61	addr = kmap_atomic(bvec.bv_page);
62		62
63	zones_to_cpy = bvec.bv_len / sizeof(struct blk_zone);	63	zones_to_cpy = bvec.bv_len / sizeof(struct blk_zone);
@@ -84,29 +84,24 @@ static void null_zone_fill_rq(struct nullb_device dev, struct request rq, · 20 unmodified lines
84	}	84	}
85	}	85	}
86		86
87	blk_status_t null_zone_report(struct nullb *nullb,	87	blk_status_t null_zone_report(struct nullb nullb, struct bio bio)
88	struct nullb_cmd *cmd)
89	{	88	{
90	struct nullb_device *dev = nullb->dev;	89	struct nullb_device *dev = nullb->dev;
91	struct request *rq = cmd->rq;	90	unsigned int zno = null_zone_no(dev, bio->bi_iter.bi_sector);
92	unsigned int zno = null_zone_no(dev, blk_rq_pos(rq));
93	unsigned int nr_zones = dev->nr_zones - zno;	91	unsigned int nr_zones = dev->nr_zones - zno;
94	unsigned int max_zones = (blk_rq_bytes(rq) /	92	unsigned int max_zones;
95	sizeof(struct blk_zone)) - 1;
96		93
		94	max_zones = (bio->bi_iter.bi_size / sizeof(struct blk_zone)) - 1;
97	nr_zones = min_t(unsigned int, nr_zones, max_zones);	95	nr_zones = min_t(unsigned int, nr_zones, max_zones);
98		96	null_zone_fill_bio(nullb->dev, bio, zno, nr_zones);
99	null_zone_fill_rq(nullb->dev, rq, zno, nr_zones);
100		97
101	return BLK_STS_OK;	98	return BLK_STS_OK;
102	}	99	}
103		100
104	void null_zone_write(struct nullb_cmd *cmd)	101	void null_zone_write(struct nullb_cmd *cmd, sector_t sector,
		102	unsigned int nr_sectors)
105	{	103	{
106	struct nullb_device *dev = cmd->nq->dev;	104	struct nullb_device *dev = cmd->nq->dev;
107	struct request *rq = cmd->rq;
108	sector_t sector = blk_rq_pos(rq);
109	unsigned int rq_sectors = blk_rq_sectors(rq);
110	unsigned int zno = null_zone_no(dev, sector);	105	unsigned int zno = null_zone_no(dev, sector);
111	struct blk_zone *zone = &dev->zones[zno];	106	struct blk_zone *zone = &dev->zones[zno];
112		107
@@ -118,7 +113,7 @@ void null_zone_write(struct nullb_cmd *cmd) · 5 unmodified lines
118	case BLK_ZONE_COND_EMPTY:	113	case BLK_ZONE_COND_EMPTY:
119	case BLK_ZONE_COND_IMP_OPEN:	114	case BLK_ZONE_COND_IMP_OPEN:
120	/* Writes must be at the write pointer position */	115	/* Writes must be at the write pointer position */
121	if (blk_rq_pos(rq) != zone->wp) {	116	if (sector != zone->wp) {
122	cmd->error = BLK_STS_IOERR;	117	cmd->error = BLK_STS_IOERR;
123	break;	118	break;
124	}	119	}
@@ -126,7 +121,7 @@ void null_zone_write(struct nullb_cmd *cmd) · 1 unmodified line
126	if (zone->cond == BLK_ZONE_COND_EMPTY)	121	if (zone->cond == BLK_ZONE_COND_EMPTY)
127	zone->cond = BLK_ZONE_COND_IMP_OPEN;	122	zone->cond = BLK_ZONE_COND_IMP_OPEN;
128		123
129	zone->wp += rq_sectors;	124	zone->wp += nr_sectors;
130	if (zone->wp == zone->start + zone->len)	125	if (zone->wp == zone->start + zone->len)
131	zone->cond = BLK_ZONE_COND_FULL;	126	zone->cond = BLK_ZONE_COND_FULL;
132	break;	127	break;
@@ -137,11 +132,10 @@ void null_zone_write(struct nullb_cmd *cmd) · 4 unmodified lines
137	}	132	}
138	}	133	}
139		134
140	void null_zone_reset(struct nullb_cmd *cmd)	135	void null_zone_reset(struct nullb_cmd *cmd, sector_t sector)
141	{	136	{
142	struct nullb_device *dev = cmd->nq->dev;	137	struct nullb_device *dev = cmd->nq->dev;
143	struct request *rq = cmd->rq;	138	unsigned int zno = null_zone_no(dev, sector);
144	unsigned int zno = null_zone_no(dev, blk_rq_pos(rq));
145	struct blk_zone *zone = &dev->zones[zno];	139	struct blk_zone *zone = &dev->zones[zno];
146		140
147	zone->cond = BLK_ZONE_COND_EMPTY;	141	zone->cond = BLK_ZONE_COND_EMPTY;

drivers/block/rbd.c+178−57

@@ -4207,11 +4207,13 @@ static ssize_t rbd_parent_show(struct device *dev, · 4206 unmodified lines
4207		4207
4208	count += sprintf(&buf[count], "%s"	4208	count += sprintf(&buf[count], "%s"
4209	"pool_id %llu\npool_name %s\n"	4209	"pool_id %llu\npool_name %s\n"
		4210	"pool_ns %s\n"
4210	"image_id %s\nimage_name %s\n"	4211	"image_id %s\nimage_name %s\n"
4211	"snap_id %llu\nsnap_name %s\n"	4212	"snap_id %llu\nsnap_name %s\n"
4212	"overlap %llu\n",	4213	"overlap %llu\n",
4213	!count ? "" : "\n", /* first? */	4214	!count ? "" : "\n", /* first? */
4214	spec->pool_id, spec->pool_name,	4215	spec->pool_id, spec->pool_name,
		4216	spec->pool_ns ?: "",
4215	spec->image_id, spec->image_name ?: "(unknown)",	4217	spec->image_id, spec->image_name ?: "(unknown)",
4216	spec->snap_id, spec->snap_name,	4218	spec->snap_id, spec->snap_name,
4217	rbd_dev->parent_overlap);	4219	rbd_dev->parent_overlap);
@@ -4584,47 +4586,177 @@ static int rbd_dev_v2_features(struct rbd_device *rbd_dev) · 366 unmodified lines
4584	&rbd_dev->header.features);	4586	&rbd_dev->header.features);
4585	}	4587	}
4586		4588
		4589	struct parent_image_info {
		4590	u64 pool_id;
		4591	const char *pool_ns;
		4592	const char *image_id;
		4593	u64 snap_id;
		4594
		4595	bool has_overlap;
		4596	u64 overlap;
		4597	};
		4598
		4599	/*
		4600	* The caller is responsible for @pii.
		4601	*/
		4602	static int decode_parent_image_spec(void *p, void end,
		4603	struct parent_image_info *pii)
		4604	{
		4605	u8 struct_v;
		4606	u32 struct_len;
		4607	int ret;
		4608
		4609	ret = ceph_start_decoding(p, end, 1, "ParentImageSpec",
		4610	&struct_v, &struct_len);
		4611	if (ret)
		4612	return ret;
		4613
		4614	ceph_decode_64_safe(p, end, pii->pool_id, e_inval);
		4615	pii->pool_ns = ceph_extract_encoded_string(p, end, NULL, GFP_KERNEL);
		4616	if (IS_ERR(pii->pool_ns)) {
		4617	ret = PTR_ERR(pii->pool_ns);
		4618	pii->pool_ns = NULL;
		4619	return ret;
		4620	}
		4621	pii->image_id = ceph_extract_encoded_string(p, end, NULL, GFP_KERNEL);
		4622	if (IS_ERR(pii->image_id)) {
		4623	ret = PTR_ERR(pii->image_id);
		4624	pii->image_id = NULL;
		4625	return ret;
		4626	}
		4627	ceph_decode_64_safe(p, end, pii->snap_id, e_inval);
		4628	return 0;
		4629
		4630	e_inval:
		4631	return -EINVAL;
		4632	}
		4633
		4634	static int __get_parent_info(struct rbd_device *rbd_dev,
		4635	struct page *req_page,
		4636	struct page *reply_page,
		4637	struct parent_image_info *pii)
		4638	{
		4639	struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
		4640	size_t reply_len = PAGE_SIZE;
		4641	void p, end;
		4642	int ret;
		4643
		4644	ret = ceph_osdc_call(osdc, &rbd_dev->header_oid, &rbd_dev->header_oloc,
		4645	"rbd", "parent_get", CEPH_OSD_FLAG_READ,
		4646	req_page, sizeof(u64), reply_page, &reply_len);
		4647	if (ret)
		4648	return ret == -EOPNOTSUPP ? 1 : ret;
		4649
		4650	p = page_address(reply_page);
		4651	end = p + reply_len;
		4652	ret = decode_parent_image_spec(&p, end, pii);
		4653	if (ret)
		4654	return ret;
		4655
		4656	ret = ceph_osdc_call(osdc, &rbd_dev->header_oid, &rbd_dev->header_oloc,
		4657	"rbd", "parent_overlap_get", CEPH_OSD_FLAG_READ,
		4658	req_page, sizeof(u64), reply_page, &reply_len);
		4659	if (ret)
		4660	return ret;
		4661
		4662	p = page_address(reply_page);
		4663	end = p + reply_len;
		4664	ceph_decode_8_safe(&p, end, pii->has_overlap, e_inval);
		4665	if (pii->has_overlap)
		4666	ceph_decode_64_safe(&p, end, pii->overlap, e_inval);
		4667
		4668	return 0;
		4669
		4670	e_inval:
		4671	return -EINVAL;
		4672	}
		4673
		4674	/*
		4675	* The caller is responsible for @pii.
		4676	*/
		4677	static int __get_parent_info_legacy(struct rbd_device *rbd_dev,
		4678	struct page *req_page,
		4679	struct page *reply_page,
		4680	struct parent_image_info *pii)
		4681	{
		4682	struct ceph_osd_client *osdc = &rbd_dev->rbd_client->client->osdc;
		4683	size_t reply_len = PAGE_SIZE;
		4684	void p, end;
		4685	int ret;
		4686
		4687	ret = ceph_osdc_call(osdc, &rbd_dev->header_oid, &rbd_dev->header_oloc,
		4688	"rbd", "get_parent", CEPH_OSD_FLAG_READ,
		4689	req_page, sizeof(u64), reply_page, &reply_len);
		4690	if (ret)
		4691	return ret;
		4692
		4693	p = page_address(reply_page);
		4694	end = p + reply_len;
		4695	ceph_decode_64_safe(&p, end, pii->pool_id, e_inval);
		4696	pii->image_id = ceph_extract_encoded_string(&p, end, NULL, GFP_KERNEL);
		4697	if (IS_ERR(pii->image_id)) {
		4698	ret = PTR_ERR(pii->image_id);
		4699	pii->image_id = NULL;
		4700	return ret;
		4701	}
		4702	ceph_decode_64_safe(&p, end, pii->snap_id, e_inval);
		4703	pii->has_overlap = true;
		4704	ceph_decode_64_safe(&p, end, pii->overlap, e_inval);
		4705
		4706	return 0;
		4707
		4708	e_inval:
		4709	return -EINVAL;
		4710	}
		4711
		4712	static int get_parent_info(struct rbd_device *rbd_dev,
		4713	struct parent_image_info *pii)
		4714	{
		4715	struct page req_page, reply_page;
		4716	void *p;
		4717	int ret;
		4718
		4719	req_page = alloc_page(GFP_KERNEL);
		4720	if (!req_page)
		4721	return -ENOMEM;
		4722
		4723	reply_page = alloc_page(GFP_KERNEL);
		4724	if (!reply_page) {
		4725	__free_page(req_page);
		4726	return -ENOMEM;
		4727	}
		4728
		4729	p = page_address(req_page);
		4730	ceph_encode_64(&p, rbd_dev->spec->snap_id);
		4731	ret = __get_parent_info(rbd_dev, req_page, reply_page, pii);
		4732	if (ret > 0)
		4733	ret = __get_parent_info_legacy(rbd_dev, req_page, reply_page,
		4734	pii);
		4735
		4736	__free_page(req_page);
		4737	__free_page(reply_page);
		4738	return ret;
		4739	}
		4740
4587	static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev)	4741	static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev)
4588	{	4742	{
4589	struct rbd_spec *parent_spec;	4743	struct rbd_spec *parent_spec;
4590	size_t size;	4744	struct parent_image_info pii = { 0 };
4591	void *reply_buf = NULL;
4592	__le64 snapid;
4593	void *p;
4594	void *end;
4595	u64 pool_id;
4596	char *image_id;
4597	u64 snap_id;
4598	u64 overlap;
4599	int ret;	4745	int ret;
4600		4746
4601	parent_spec = rbd_spec_alloc();	4747	parent_spec = rbd_spec_alloc();
4602	if (!parent_spec)	4748	if (!parent_spec)
4603	return -ENOMEM;	4749	return -ENOMEM;
4604		4750
4605	size = sizeof (__le64) + /* pool_id */	4751	ret = get_parent_info(rbd_dev, &pii);
4606	sizeof (__le32) + RBD_IMAGE_ID_LEN_MAX + /* image_id */	4752	if (ret)
4607	sizeof (__le64) + /* snap_id */
4608	sizeof (__le64); /* overlap */
4609	reply_buf = kmalloc(size, GFP_KERNEL);
4610	if (!reply_buf) {
4611	ret = -ENOMEM;
4612	goto out_err;	4753	goto out_err;
4613	}
4614		4754
4615	snapid = cpu_to_le64(rbd_dev->spec->snap_id);	4755	dout("%s pool_id %llu pool_ns %s image_id %s snap_id %llu has_overlap %d overlap %llu\n",
4616	ret = rbd_obj_method_sync(rbd_dev, &rbd_dev->header_oid,	4756	__func__, pii.pool_id, pii.pool_ns, pii.image_id, pii.snap_id,
4617	&rbd_dev->header_oloc, "get_parent",	4757	pii.has_overlap, pii.overlap);
4618	&snapid, sizeof(snapid), reply_buf, size);
4619	dout("%s: rbd_obj_method_sync returned %d\n", __func__, ret);
4620	if (ret < 0)
4621	goto out_err;
4622		4758
4623	p = reply_buf;	4759	if (pii.pool_id == CEPH_NOPOOL \|\| !pii.has_overlap) {
4624	end = reply_buf + ret;
4625	ret = -ERANGE;
4626	ceph_decode_64_safe(&p, end, pool_id, out_err);
4627	if (pool_id == CEPH_NOPOOL) {
4628	/*	4760	/*
4629	* Either the parent never existed, or we have	4761	* Either the parent never existed, or we have
4630	* record of it but the image got flattened so it no	4762	* record of it but the image got flattened so it no
@@ -4633,6 +4765,10 @@ static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev) · 2 unmodified lines
4633	* overlap to 0. The effect of this is that all new	4765	* overlap to 0. The effect of this is that all new
4634	* requests will be treated as if the image had no	4766	* requests will be treated as if the image had no
4635	* parent.	4767	* parent.
		4768	*
		4769	* If !pii.has_overlap, the parent image spec is not
		4770	* applicable. It's there to avoid duplication in each
		4771	* snapshot record.
4636	*/	4772	*/
4637	if (rbd_dev->parent_overlap) {	4773	if (rbd_dev->parent_overlap) {
4638	rbd_dev->parent_overlap = 0;	4774	rbd_dev->parent_overlap = 0;
@@ -4647,51 +4783,36 @@ static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev) · 8 unmodified lines
4647	/* The ceph file layout needs to fit pool id in 32 bits */	4783	/* The ceph file layout needs to fit pool id in 32 bits */
4648		4784
4649	ret = -EIO;	4785	ret = -EIO;
4650	if (pool_id > (u64)U32_MAX) {	4786	if (pii.pool_id > (u64)U32_MAX) {
4651	rbd_warn(NULL, "parent pool id too large (%llu > %u)",	4787	rbd_warn(NULL, "parent pool id too large (%llu > %u)",
4652	(unsigned long long)pool_id, U32_MAX);	4788	(unsigned long long)pii.pool_id, U32_MAX);
4653	goto out_err;	4789	goto out_err;
4654	}	4790	}
4655		4791
4656	image_id = ceph_extract_encoded_string(&p, end, NULL, GFP_KERNEL);
4657	if (IS_ERR(image_id)) {
4658	ret = PTR_ERR(image_id);
4659	goto out_err;
4660	}
4661	ceph_decode_64_safe(&p, end, snap_id, out_err);
4662	ceph_decode_64_safe(&p, end, overlap, out_err);
4663
4664	/*	4792	/*
4665	* The parent won't change (except when the clone is	4793	* The parent won't change (except when the clone is
4666	* flattened, already handled that). So we only need to	4794	* flattened, already handled that). So we only need to
4667	* record the parent spec we have not already done so.	4795	* record the parent spec we have not already done so.
4668	*/	4796	*/
4669	if (!rbd_dev->parent_spec) {	4797	if (!rbd_dev->parent_spec) {
4670	parent_spec->pool_id = pool_id;	4798	parent_spec->pool_id = pii.pool_id;
4671	parent_spec->image_id = image_id;	4799	if (pii.pool_ns && *pii.pool_ns) {
4672	parent_spec->snap_id = snap_id;	4800	parent_spec->pool_ns = pii.pool_ns;
4673		4801	pii.pool_ns = NULL;
4674	/* TODO: support cloning across namespaces */
4675	if (rbd_dev->spec->pool_ns) {
4676	parent_spec->pool_ns = kstrdup(rbd_dev->spec->pool_ns,
4677	GFP_KERNEL);
4678	if (!parent_spec->pool_ns) {
4679	ret = -ENOMEM;
4680	goto out_err;
4681	}
4682	}	4802	}
		4803	parent_spec->image_id = pii.image_id;
		4804	pii.image_id = NULL;
		4805	parent_spec->snap_id = pii.snap_id;
4683		4806
4684	rbd_dev->parent_spec = parent_spec;	4807	rbd_dev->parent_spec = parent_spec;
4685	parent_spec = NULL; /* rbd_dev now owns this */	4808	parent_spec = NULL; /* rbd_dev now owns this */
4686	} else {
4687	kfree(image_id);
4688	}	4809	}
4689		4810
4690	/*	4811	/*
4691	* We always update the parent overlap. If it's zero we issue	4812	* We always update the parent overlap. If it's zero we issue
4692	* a warning, as we will proceed as if there was no parent.	4813	* a warning, as we will proceed as if there was no parent.
4693	*/	4814	*/
4694	if (!overlap) {	4815	if (!pii.overlap) {
4695	if (parent_spec) {	4816	if (parent_spec) {
4696	/* refresh, careful to warn just once */	4817	/* refresh, careful to warn just once */
4697	if (rbd_dev->parent_overlap)	4818	if (rbd_dev->parent_overlap)
@@ -4702,14 +4823,14 @@ static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev) · 4 unmodified lines
4702	rbd_warn(rbd_dev, "clone is standalone (overlap 0)");	4823	rbd_warn(rbd_dev, "clone is standalone (overlap 0)");
4703	}	4824	}
4704	}	4825	}
4705	rbd_dev->parent_overlap = overlap;	4826	rbd_dev->parent_overlap = pii.overlap;
4706		4827
4707	out:	4828	out:
4708	ret = 0;	4829	ret = 0;
4709	out_err:	4830	out_err:
4710	kfree(reply_buf);	4831	kfree(pii.pool_ns);
		4832	kfree(pii.image_id);
4711	rbd_spec_put(parent_spec);	4833	rbd_spec_put(parent_spec);
4712
4713	return ret;	4834	return ret;
4714	}	4835	}
4715		4836

drivers/block/xen-blkfront.c+2−2

@@ -2670,8 +2670,8 @@ static void purge_persistent_grants(struct blkfront_info *info) · 2669 unmodified lines
2670	list_del(&gnt_list_entry->node);	2670	list_del(&gnt_list_entry->node);
2671	gnttab_end_foreign_access(gnt_list_entry->gref, 0, 0UL);	2671	gnttab_end_foreign_access(gnt_list_entry->gref, 0, 0UL);
2672	rinfo->persistent_gnts_c--;	2672	rinfo->persistent_gnts_c--;
2673	__free_page(gnt_list_entry->page);	2673	gnt_list_entry->gref = GRANT_INVALID_REF;
2674	kfree(gnt_list_entry);	2674	list_add_tail(&gnt_list_entry->node, &rinfo->grants);
2675	}	2675	}
2676		2676
2677	spin_unlock_irqrestore(&rinfo->ring_lock, flags);	2677	spin_unlock_irqrestore(&rinfo->ring_lock, flags);

drivers/bluetooth/hci_ldisc.c+2−0

@@ -543,6 +543,8 @@ static void hci_uart_tty_close(struct tty_struct *tty) · 542 unmodified lines
543	}	543	}
544	clear_bit(HCI_UART_PROTO_SET, &hu->flags);	544	clear_bit(HCI_UART_PROTO_SET, &hu->flags);
545		545
		546	percpu_free_rwsem(&hu->proto_lock);
		547
546	kfree(hu);	548	kfree(hu);
547	}	549	}
548		550

drivers/char/Kconfig+2−2

@@ -566,5 +566,5 @@ config RANDOM_TRUST_CPU · 565 unmodified lines
566	that CPU manufacturer (perhaps with the insistence or mandate	566	that CPU manufacturer (perhaps with the insistence or mandate
567	of a Nation State's intelligence or law enforcement agencies)	567	of a Nation State's intelligence or law enforcement agencies)
568	has not installed a hidden back door to compromise the CPU's	568	has not installed a hidden back door to compromise the CPU's
569	random number generation facilities.	569	random number generation facilities. This can also be configured
570		570	at boot with "random.trust_cpu=on/off".

drivers/char/ipmi/ipmi_bt_sm.c+48−44

 	BT_STATE_RESET3,
 	BT_STATE_RESTART,
 	BT_STATE_PRINTME,
-	BT_STATE_CAPABILITIES_BEGIN,
-	BT_STATE_CAPABILITIES_END,
 	BT_STATE_LONG_BUSY	/* BT doesn't get hosed :-) */
 };
 	int		error_retries;	/* end of "common" fields */
 	int		nonzero_status;	/* hung BMCs stay all 0 */
 	enum bt_states	complete;	/* to divert the state machine */
-	int		BT_CAP_outreqs;
 	long		BT_CAP_req2rsp;
 	int		BT_CAP_retries;	/* Recommended retries */
 };
 	case BT_STATE_RESET3:		return("RESET3");
 	case BT_STATE_RESTART:		return("RESTART");
 	case BT_STATE_LONG_BUSY:	return("LONG_BUSY");
-	case BT_STATE_CAPABILITIES_BEGIN: return("CAP_BEGIN");
-	case BT_STATE_CAPABILITIES_END:	return("CAP_END");
 	}
 	return("BAD STATE");
 }
 	bt->complete = BT_STATE_IDLE;	/* end here */
 	bt->BT_CAP_req2rsp = BT_NORMAL_TIMEOUT * USEC_PER_SEC;
 	bt->BT_CAP_retries = BT_NORMAL_RETRY_LIMIT;
-	/* BT_CAP_outreqs == zero is a flag to read BT Capabilities */
 	return 3; /* We claim 3 bytes of space; ought to check SPMI table */
 }
 static enum si_sm_result bt_event(struct si_sm_data *bt, long time)
 {
-	unsigned char status, BT_CAP[8];
+	unsigned char status;
 	static enum bt_states last_printed = BT_STATE_PRINTME;
 	int i;
 		if (status & BT_H_BUSY)		/* clear a leftover H_BUSY */
 			BT_CONTROL(BT_H_BUSY);
-		bt->timeout = bt->BT_CAP_req2rsp;
-		/* Read BT capabilities if it hasn't been done yet */
-		if (!bt->BT_CAP_outreqs)
-			BT_STATE_CHANGE(BT_STATE_CAPABILITIES_BEGIN,
-					SI_SM_CALL_WITHOUT_DELAY);
 		BT_SI_SM_RETURN(SI_SM_IDLE);
 	case BT_STATE_XACTION_START:
 		BT_STATE_CHANGE(BT_STATE_XACTION_START,
 				SI_SM_CALL_WITH_DELAY);
-	/*
-	 * Get BT Capabilities, using timing of upper level state machine.
-	 * Set outreqs to prevent infinite loop on timeout.
-	 */
-	case BT_STATE_CAPABILITIES_BEGIN:
-		bt->BT_CAP_outreqs = 1;
-		{
-			unsigned char GetBT_CAP[] = { 0x18, 0x36 };
-			bt->state = BT_STATE_IDLE;
-			bt_start_transaction(bt, GetBT_CAP, sizeof(GetBT_CAP));
-		}
-		bt->complete = BT_STATE_CAPABILITIES_END;
-		BT_STATE_CHANGE(BT_STATE_XACTION_START,
-				SI_SM_CALL_WITH_DELAY);
-	case BT_STATE_CAPABILITIES_END:
-		i = bt_get_result(bt, BT_CAP, sizeof(BT_CAP));
-		bt_init_data(bt, bt->io);
-		if ((i == 8) && !BT_CAP[2]) {
-			bt->BT_CAP_outreqs = BT_CAP[3];
-			bt->BT_CAP_req2rsp = BT_CAP[6] * USEC_PER_SEC;
-			bt->BT_CAP_retries = BT_CAP[7];
-		} else
-			printk(KERN_WARNING "IPMI BT: using default values\n");
-		if (!bt->BT_CAP_outreqs)
-			bt->BT_CAP_outreqs = 1;
-		printk(KERN_WARNING "IPMI BT: req2rsp=%ld secs retries=%d\n",
-			bt->BT_CAP_req2rsp / USEC_PER_SEC, bt->BT_CAP_retries);
-		bt->timeout = bt->BT_CAP_req2rsp;
-		return SI_SM_CALL_WITHOUT_DELAY;
 	default:	/* should never occur */
 		return error_recovery(bt,
 				      status,
 static int bt_detect(struct si_sm_data *bt)
 {
+	unsigned char GetBT_CAP[] = { 0x18, 0x36 };
+	unsigned char BT_CAP[8];
+	enum si_sm_result smi_result;
+	int rv;
 	/*
 	 * It's impossible for the BT status and interrupt registers to be
 	 * all 1's, (assuming a properly functioning, self-initialized BMC)
 	if ((BT_STATUS == 0xFF) && (BT_INTMASK_R == 0xFF))
 		return 1;
 	reset_flags(bt);
+	/*
+	 * Try getting the BT capabilities here.
+	 */
+	rv = bt_start_transaction(bt, GetBT_CAP, sizeof(GetBT_CAP));
+	if (rv) {
+		dev_warn(bt->io->dev,
+			 "Can't start capabilities transaction: %d\n", rv);
+		goto out_no_bt_cap;
+	}
+	smi_result = SI_SM_CALL_WITHOUT_DELAY;
+	for (;;) {
+		if (smi_result == SI_SM_CALL_WITH_DELAY ||
+		    smi_result == SI_SM_CALL_WITH_TICK_DELAY) {
+			schedule_timeout_uninterruptible(1);
+			smi_result = bt_event(bt, jiffies_to_usecs(1));
+		} else if (smi_result == SI_SM_CALL_WITHOUT_DELAY) {
+			smi_result = bt_event(bt, 0);
+		} else
+			break;
+	}
+	rv = bt_get_result(bt, BT_CAP, sizeof(BT_CAP));
+	bt_init_data(bt, bt->io);
+	if (rv < 8) {
+		dev_warn(bt->io->dev, "bt cap response too short: %d\n", rv);
+		goto out_no_bt_cap;
+	}
+	if (BT_CAP[2]) {
+		dev_warn(bt->io->dev, "Error fetching bt cap: %x\n", BT_CAP[2]);
+out_no_bt_cap:
+		dev_warn(bt->io->dev, "using default values\n");
+	} else {
+		bt->BT_CAP_req2rsp = BT_CAP[6] * USEC_PER_SEC;
+		bt->BT_CAP_retries = BT_CAP[7];
+	}
+	dev_info(bt->io->dev, "req2rsp=%ld secs retries=%d\n",
+		 bt->BT_CAP_req2rsp / USEC_PER_SEC, bt->BT_CAP_retries);
 	return 0;
 }

drivers/char/ipmi/ipmi_msghandler.c+30−23

@@ -3381,39 +3381,45 @@ int ipmi_register_smi(const struct ipmi_smi_handlers *handlers, · 3380 unmodified lines
3381		3381
3382	rv = handlers->start_processing(send_info, intf);	3382	rv = handlers->start_processing(send_info, intf);
3383	if (rv)	3383	if (rv)
3384	goto out;	3384	goto out_err;
3385		3385
3386	rv = __bmc_get_device_id(intf, NULL, &id, NULL, NULL, i);	3386	rv = __bmc_get_device_id(intf, NULL, &id, NULL, NULL, i);
3387	if (rv) {	3387	if (rv) {
3388	dev_err(si_dev, "Unable to get the device id: %d\n", rv);	3388	dev_err(si_dev, "Unable to get the device id: %d\n", rv);
3389	goto out;	3389	goto out_err_started;
3390	}	3390	}
3391		3391
3392	mutex_lock(&intf->bmc_reg_mutex);	3392	mutex_lock(&intf->bmc_reg_mutex);
3393	rv = __scan_channels(intf, &id);	3393	rv = __scan_channels(intf, &id);
3394	mutex_unlock(&intf->bmc_reg_mutex);	3394	mutex_unlock(&intf->bmc_reg_mutex);
		3395	if (rv)
		3396	goto out_err_bmc_reg;
3395		3397
3396	out:	3398	/*
3397	if (rv) {	3399	* Keep memory order straight for RCU readers. Make
3398	ipmi_bmc_unregister(intf);	3400	* sure everything else is committed to memory before
3399	list_del_rcu(&intf->link);	3401	* setting intf_num to mark the interface valid.
3400	mutex_unlock(&ipmi_interfaces_mutex);	3402	*/
3401	synchronize_srcu(&ipmi_interfaces_srcu);	3403	smp_wmb();
3402	cleanup_srcu_struct(&intf->users_srcu);	3404	intf->intf_num = i;
3403	kref_put(&intf->refcount, intf_free);	3405	mutex_unlock(&ipmi_interfaces_mutex);
3404	} else {
3405	/*
3406	* Keep memory order straight for RCU readers. Make
3407	* sure everything else is committed to memory before
3408	* setting intf_num to mark the interface valid.
3409	*/
3410	smp_wmb();
3411	intf->intf_num = i;
3412	mutex_unlock(&ipmi_interfaces_mutex);
3413		3406
3414	/* After this point the interface is legal to use. */	3407	/* After this point the interface is legal to use. */
3415	call_smi_watchers(i, intf->si_dev);	3408	call_smi_watchers(i, intf->si_dev);
3416	}	3409
		3410	return 0;
		3411
		3412	out_err_bmc_reg:
		3413	ipmi_bmc_unregister(intf);
		3414	out_err_started:
		3415	if (intf->handlers->shutdown)
		3416	intf->handlers->shutdown(intf->send_info);
		3417	out_err:
		3418	list_del_rcu(&intf->link);
		3419	mutex_unlock(&ipmi_interfaces_mutex);
		3420	synchronize_srcu(&ipmi_interfaces_srcu);
		3421	cleanup_srcu_struct(&intf->users_srcu);
		3422	kref_put(&intf->refcount, intf_free);
3417		3423
3418	return rv;	3424	return rv;
3419	}	3425	}
@@ -3504,7 +3510,8 @@ void ipmi_unregister_smi(struct ipmi_smi *intf) · 84 unmodified lines
3504	}	3510	}
3505	srcu_read_unlock(&intf->users_srcu, index);	3511	srcu_read_unlock(&intf->users_srcu, index);
3506		3512
3507	intf->handlers->shutdown(intf->send_info);	3513	if (intf->handlers->shutdown)
		3514	intf->handlers->shutdown(intf->send_info);
3508		3515
3509	cleanup_smi_msgs(intf);	3516	cleanup_smi_msgs(intf);
3510		3517

drivers/char/ipmi/ipmi_si_intf.c+4−13

 		 si_to_str[new_smi->io.si_type]);
 	WARN_ON(new_smi->io.dev->init_name != NULL);
-	kfree(init_name);
-	return 0;
-out_err:
-	if (new_smi->intf) {
-		ipmi_unregister_smi(new_smi->intf);
-		new_smi->intf = NULL;
-	}
+ out_err:
 	kfree(init_name);
 	return rv;
 }
 	kfree(smi_info->si_sm);
 	smi_info->si_sm = NULL;
+	smi_info->intf = NULL;
 }
 /*
 	list_del(&smi_info->link);
-	if (smi_info->intf) {
+	if (smi_info->intf)
 		ipmi_unregister_smi(smi_info->intf);
-		smi_info->intf = NULL;
-	}
 	if (smi_info->pdev) {
 		if (smi_info->pdev_registered)

drivers/char/ipmi/ipmi_ssif.c+11−21

@@ -181,6 +181,8 @@ struct ssif_addr_info { · 180 unmodified lines
181	struct device *dev;	181	struct device *dev;
182	struct i2c_client *client;	182	struct i2c_client *client;
183		183
		184	struct i2c_client *added_client;
		185
184	struct mutex clients_mutex;	186	struct mutex clients_mutex;
185	struct list_head clients;	187	struct list_head clients;
186		188
@@ -1214,18 +1216,11 @@ static void shutdown_ssif(void *send_info) · 1027 unmodified lines
1214	complete(&ssif_info->wake_thread);	1216	complete(&ssif_info->wake_thread);
1215	kthread_stop(ssif_info->thread);	1217	kthread_stop(ssif_info->thread);
1216	}	1218	}
1217
1218	/*
1219	* No message can be outstanding now, we have removed the
1220	* upper layer and it permitted us to do so.
1221	*/
1222	kfree(ssif_info);
1223	}	1219	}
1224		1220
1225	static int ssif_remove(struct i2c_client *client)	1221	static int ssif_remove(struct i2c_client *client)
1226	{	1222	{
1227	struct ssif_info *ssif_info = i2c_get_clientdata(client);	1223	struct ssif_info *ssif_info = i2c_get_clientdata(client);
1228	struct ipmi_smi *intf;
1229	struct ssif_addr_info *addr_info;	1224	struct ssif_addr_info *addr_info;
1230		1225
1231	if (!ssif_info)	1226	if (!ssif_info)
@@ -1235,9 +1230,7 @@ static int ssif_remove(struct i2c_client *client) · 3 unmodified lines
1235	* After this point, we won't deliver anything asychronously	1230	* After this point, we won't deliver anything asychronously
1236	* to the message handler. We can unregister ourself.	1231	* to the message handler. We can unregister ourself.
1237	*/	1232	*/
1238	intf = ssif_info->intf;	1233	ipmi_unregister_smi(ssif_info->intf);
1239	ssif_info->intf = NULL;
1240	ipmi_unregister_smi(intf);
1241		1234
1242	list_for_each_entry(addr_info, &ssif_infos, link) {	1235	list_for_each_entry(addr_info, &ssif_infos, link) {
1243	if (addr_info->client == client) {	1236	if (addr_info->client == client) {
@@ -1246,6 +1239,8 @@ static int ssif_remove(struct i2c_client *client) · 2 unmodified lines
1246	}	1239	}
1247	}	1240	}
1248		1241
		1242	kfree(ssif_info);
		1243
1249	return 0;	1244	return 0;
1250	}	1245	}
1251		1246
@@ -1648,15 +1643,9 @@ static int ssif_probe(struct i2c_client client, const struct i2c_device_id id) · 396 unmodified lines
1648		1643
1649	out:	1644	out:
1650	if (rv) {	1645	if (rv) {
1651	/*	1646	if (addr_info)
1652	* Note that if addr_info->client is assigned, we	1647	addr_info->client = NULL;
1653	* leave it. The i2c client hangs around even if we	1648
1654	* return a failure here, and the failure here is not
1655	* propagated back to the i2c code. This seems to be
1656	* design intent, strange as it may be. But if we
1657	* don't leave it, ssif_platform_remove will not remove
1658	* the client like it should.
1659	*/
1660	dev_err(&client->dev, "Unable to start IPMI SSIF: %d\n", rv);	1649	dev_err(&client->dev, "Unable to start IPMI SSIF: %d\n", rv);
1661	kfree(ssif_info);	1650	kfree(ssif_info);
1662	}	1651	}
@@ -1676,7 +1665,8 @@ static int ssif_adapter_handler(struct device adev, void opaque) · 13 unmodified lines
1676	if (adev->type != &i2c_adapter_type)	1665	if (adev->type != &i2c_adapter_type)
1677	return 0;	1666	return 0;
1678		1667
1679	i2c_new_device(to_i2c_adapter(adev), &addr_info->binfo);	1668	addr_info->added_client = i2c_new_device(to_i2c_adapter(adev),
		1669	&addr_info->binfo);
1680		1670
1681	if (!addr_info->adapter_name)	1671	if (!addr_info->adapter_name)
1682	return 1; /* Only try the first I2C adapter by default. */	1672	return 1; /* Only try the first I2C adapter by default. */
@@ -1849,7 +1839,7 @@ static int ssif_platform_remove(struct platform_device *dev) · 166 unmodified lines
1849	return 0;	1839	return 0;
1850		1840
1851	mutex_lock(&ssif_infos_mutex);	1841	mutex_lock(&ssif_infos_mutex);
1852	i2c_unregister_device(addr_info->client);	1842	i2c_unregister_device(addr_info->added_client);
1853		1843
1854	list_del(&addr_info->link);	1844	list_del(&addr_info->link);
1855	kfree(addr_info);	1845	kfree(addr_info);

drivers/char/ipmi/kcs_bmc.c+4−3

 #include "kcs_bmc.h"
+#define DEVICE_NAME "ipmi-kcs"
 #define KCS_MSG_BUFSIZ    1000
 #define KCS_ZERO_DATA     0
 	if (!kcs_bmc)
 		return NULL;
-	dev_set_name(dev, "ipmi-kcs%u", channel);
 	spin_lock_init(&kcs_bmc->lock);
 	kcs_bmc->channel = channel;
 		return NULL;
 	kcs_bmc->miscdev.minor = MISC_DYNAMIC_MINOR;
-	kcs_bmc->miscdev.name = dev_name(dev);
+	kcs_bmc->miscdev.name = devm_kasprintf(dev, GFP_KERNEL, "%s%u",
+					       DEVICE_NAME, channel);
 	kcs_bmc->miscdev.fops = &kcs_bmc_fops;
 	return kcs_bmc;

drivers/char/random.c+8−3

 static void invalidate_batched_entropy(void);
+static bool trust_cpu __ro_after_init = IS_ENABLED(CONFIG_RANDOM_TRUST_CPU);
+static int __init parse_trust_cpu(char *arg)
+{
+	return kstrtobool(arg, &trust_cpu);
+}
+early_param("random.trust_cpu", parse_trust_cpu);
 static void crng_initialize(struct crng_state *crng)
 {
 	int		i;
 		}
 		crng->state[i] ^= rv;
 	}
-#ifdef CONFIG_RANDOM_TRUST_CPU
+	if (trust_cpu && arch_init) {
-	if (arch_init) {
 		crng_init = 2;
 		pr_notice("random: crng done (trusting CPU's manufacturer)\n");
 	}
-#endif
 	crng->init_time = jiffies - CRNG_RESEED_INTERVAL - 1;
 }

drivers/clk/x86/clk-pmc-atom.c+11−7

 	u8 nparents;
 	struct clk_plt *clks[PMC_CLK_NUM];
 	struct clk_lookup *mclk_lookup;
+	struct clk_lookup *ether_clk_lookup;
 };
 /* Return an index in parent table */
 	pclk->reg = base + PMC_CLK_CTL_OFFSET + id * PMC_CLK_CTL_SIZE;
 	spin_lock_init(&pclk->lock);
-	/*
-	 * If the clock was already enabled by the firmware mark it as critical
-	 * to avoid it being gated by the clock framework if no driver owns it.
-	 */
-	if (plt_clk_is_enabled(&pclk->hw))
-		init.flags |= CLK_IS_CRITICAL;
 	ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
 	if (ret) {
 		pclk = ERR_PTR(ret);
 		goto err_unreg_clk_plt;
 	}
+	data->ether_clk_lookup = clkdev_hw_create(&data->clks[4]->hw,
+						  "ether_clk", NULL);
+	if (!data->ether_clk_lookup) {
+		err = -ENOMEM;
+		goto err_drop_mclk;
+	}
 	plt_clk_free_parent_names_loop(parent_names, data->nparents);
 	platform_set_drvdata(pdev, data);
 	return 0;
+err_drop_mclk:
+	clkdev_drop(data->mclk_lookup);
 err_unreg_clk_plt:
 	plt_clk_unregister_loop(data, i);
 	plt_clk_unregister_parents(data);
 	data = platform_get_drvdata(pdev);
+	clkdev_drop(data->ether_clk_lookup);
 	clkdev_drop(data->mclk_lookup);
 	plt_clk_unregister_loop(data, PMC_CLK_NUM);
 	plt_clk_unregister_parents(data);

drivers/clocksource/timer-atmel-pit.c+14−6

 	data->base = of_iomap(node, 0);
 	if (!data->base) {
 		pr_err("Could not map PIT address\n");
-		return -ENXIO;
+		ret = -ENXIO;
+		goto exit;
 	}
 	data->mck = of_clk_get(node, 0);
 	if (IS_ERR(data->mck)) {
 		pr_err("Unable to get mck clk\n");
-		return PTR_ERR(data->mck);
+		ret = PTR_ERR(data->mck);
+		goto exit;
 	}
 	ret = clk_prepare_enable(data->mck);
 	if (ret) {
 		pr_err("Unable to enable mck\n");
-		return ret;
+		goto exit;
 	}
 	/* Get the interrupts property */
 	data->irq = irq_of_parse_and_map(node, 0);
 	if (!data->irq) {
 		pr_err("Unable to get IRQ from DT\n");
-		return -EINVAL;
+		ret = -EINVAL;
+		goto exit;
 	}
 	/*
 	ret = clocksource_register_hz(&data->clksrc, pit_rate);
 	if (ret) {
 		pr_err("Failed to register clocksource\n");
-		return ret;
+		goto exit;
 	}
 	/* Set up irq handler */
 			  "at91_tick", data);
 	if (ret) {
 		pr_err("Unable to setup IRQ\n");
-		return ret;
+		clocksource_unregister(&data->clksrc);
+		goto exit;
 	}
 	/* Set up and register clockevents */
 	clockevents_register_device(&data->clkevt);
 	return 0;
+exit:
+	kfree(data);
+	return ret;
 }
 TIMER_OF_DECLARE(at91sam926x_pit, "atmel,at91sam9260-pit",
 		       at91sam926x_pit_dt_init);

drivers/clocksource/timer-fttmr010.c+11−7

@@ -130,13 +130,17 @@ static int fttmr010_timer_set_next_event(unsigned long cycles, · 129 unmodified lines
130	cr &= ~fttmr010->t1_enable_val;	130	cr &= ~fttmr010->t1_enable_val;
131	writel(cr, fttmr010->base + TIMER_CR);	131	writel(cr, fttmr010->base + TIMER_CR);
132		132
133	/* Setup the match register forward/backward in time */	133	if (fttmr010->count_down) {
134	cr = readl(fttmr010->base + TIMER1_COUNT);	134	/*
135	if (fttmr010->count_down)	135	* ASPEED Timer Controller will load TIMER1_LOAD register
136	cr -= cycles;	136	* into TIMER1_COUNT register when the timer is re-enabled.
137	else	137	*/
138	cr += cycles;	138	writel(cycles, fttmr010->base + TIMER1_LOAD);
139	writel(cr, fttmr010->base + TIMER1_MATCH1);	139	} else {
		140	/* Setup the match register forward in time */
		141	cr = readl(fttmr010->base + TIMER1_COUNT);
		142	writel(cr + cycles, fttmr010->base + TIMER1_MATCH1);
		143	}
140		144
141	/* Start */	145	/* Start */
142	cr = readl(fttmr010->base + TIMER_CR);	146	cr = readl(fttmr010->base + TIMER_CR);

drivers/clocksource/timer-ti-32k.c+3−0

@@ -97,6 +97,9 @@ static int __init ti_32k_timer_init(struct device_node *np) · 96 unmodified lines
97	return -ENXIO;	97	return -ENXIO;
98	}	98	}
99		99
		100	if (!of_machine_is_compatible("ti,am43"))
		101	ti_32k_timer.cs.flags \|= CLOCK_SOURCE_SUSPEND_NONSTOP;
		102
100	ti_32k_timer.counter = ti_32k_timer.base;	103	ti_32k_timer.counter = ti_32k_timer.base;
101		104
102	/*	105	/*

drivers/cpufreq/qcom-cpufreq-kryo.c+2−2

@@ -44,7 +44,7 @@ enum _msm8996_version { · 43 unmodified lines
44		44
45	struct platform_device cpufreq_dt_pdev, kryo_cpufreq_pdev;	45	struct platform_device cpufreq_dt_pdev, kryo_cpufreq_pdev;
46		46
47	static enum _msm8996_version __init qcom_cpufreq_kryo_get_msm_id(void)	47	static enum _msm8996_version qcom_cpufreq_kryo_get_msm_id(void)
48	{	48	{
49	size_t len;	49	size_t len;
50	u32 *msm_id;	50	u32 *msm_id;
@@ -222,7 +222,7 @@ static int __init qcom_cpufreq_kryo_init(void) · 171 unmodified lines
222	}	222	}
223	module_init(qcom_cpufreq_kryo_init);	223	module_init(qcom_cpufreq_kryo_init);
224		224
225	static void __init qcom_cpufreq_kryo_exit(void)	225	static void __exit qcom_cpufreq_kryo_exit(void)
226	{	226	{
227	platform_device_unregister(kryo_cpufreq_pdev);	227	platform_device_unregister(kryo_cpufreq_pdev);
228	platform_driver_unregister(&qcom_cpufreq_kryo_driver);	228	platform_driver_unregister(&qcom_cpufreq_kryo_driver);

drivers/crypto/ccp/psp-dev.c+41−5

 static struct sev_misc_dev *misc_dev;
 static struct psp_device *psp_master;
+static int psp_cmd_timeout = 100;
+module_param(psp_cmd_timeout, int, 0644);
+MODULE_PARM_DESC(psp_cmd_timeout, " default timeout value, in seconds, for PSP commands");
+static int psp_probe_timeout = 5;
+module_param(psp_probe_timeout, int, 0644);
+MODULE_PARM_DESC(psp_probe_timeout, " default timeout value, in seconds, during PSP device probe");
+static bool psp_dead;
+static int psp_timeout;
 static struct psp_device *psp_alloc_struct(struct sp_device *sp)
 {
 	struct device *dev = sp->dev;
 	return IRQ_HANDLED;
 }
-static void sev_wait_cmd_ioc(struct psp_device *psp, unsigned int *reg)
+static int sev_wait_cmd_ioc(struct psp_device *psp,
+			    unsigned int *reg, unsigned int timeout)
 {
-	wait_event(psp->sev_int_queue, psp->sev_int_rcvd);
+	int ret;
+	ret = wait_event_timeout(psp->sev_int_queue,
+			psp->sev_int_rcvd, timeout * HZ);
+	if (!ret)
+		return -ETIMEDOUT;
 	*reg = ioread32(psp->io_regs + psp->vdata->cmdresp_reg);
+	return 0;
 }
 static int sev_cmd_buffer_len(int cmd)
 	if (!psp)
 		return -ENODEV;
+	if (psp_dead)
+		return -EBUSY;
 	/* Get the physical address of the command buffer */
 	phys_lsb = data ? lower_32_bits(__psp_pa(data)) : 0;
 	phys_msb = data ? upper_32_bits(__psp_pa(data)) : 0;
-	dev_dbg(psp->dev, "sev command id %#x buffer 0x%08x%08x\n",
+	dev_dbg(psp->dev, "sev command id %#x buffer 0x%08x%08x timeout %us\n",
-		cmd, phys_msb, phys_lsb);
+		cmd, phys_msb, phys_lsb, psp_timeout);
 	print_hex_dump_debug("(in):  ", DUMP_PREFIX_OFFSET, 16, 2, data,
 			     sev_cmd_buffer_len(cmd), false);
 	iowrite32(reg, psp->io_regs + psp->vdata->cmdresp_reg);
 	/* wait for command completion */
-	sev_wait_cmd_ioc(psp, &reg);
+	ret = sev_wait_cmd_ioc(psp, &reg, psp_timeout);
+	if (ret) {
+		if (psp_ret)
+			*psp_ret = 0;
+		dev_err(psp->dev, "sev command %#x timed out, disabling PSP \n", cmd);
+		psp_dead = true;
+		return ret;
+	}
+	psp_timeout = psp_cmd_timeout;
 	if (psp_ret)
 		*psp_ret = reg & PSP_CMDRESP_ERR_MASK;
 	psp_master = sp->psp_data;
+	psp_timeout = psp_probe_timeout;
 	if (sev_get_api_version())
 		goto err;

drivers/dax/device.c+6−0

 	return current->mm->get_unmapped_area(filp, addr, len, pgoff, flags);
 }
+static const struct address_space_operations dev_dax_aops = {
+	.set_page_dirty		= noop_set_page_dirty,
+	.invalidatepage		= noop_invalidatepage,
+};
 static int dax_open(struct inode *inode, struct file *filp)
 {
 	struct dax_device *dax_dev = inode_dax(inode);
 	dev_dbg(&dev_dax->dev, "trace\n");
 	inode->i_mapping = __dax_inode->i_mapping;
 	inode->i_mapping->host = __dax_inode;
+	inode->i_mapping->a_ops = &dev_dax_aops;
 	filp->f_mapping = inode->i_mapping;
 	filp->f_wb_err = filemap_sample_wb_err(filp->f_mapping);
 	filp->private_data = dev_dax;

drivers/dma/mic_x100_dma.c+1−3

 	int ret;
 	struct device *dev = &mbdev->dev;
-	mic_dma_dev = kzalloc(sizeof(*mic_dma_dev), GFP_KERNEL);
+	mic_dma_dev = devm_kzalloc(dev, sizeof(*mic_dma_dev), GFP_KERNEL);
 	if (!mic_dma_dev) {
 		ret = -ENOMEM;
 		goto alloc_error;
 reg_error:
 	mic_dma_uninit(mic_dma_dev);
 init_error:
-	kfree(mic_dma_dev);
 	mic_dma_dev = NULL;
 alloc_error:
 	dev_err(dev, "Error at %s %d ret=%d\n", __func__, __LINE__, ret);
 static void mic_dma_dev_unreg(struct mic_dma_device *mic_dma_dev)
 {
 	mic_dma_uninit(mic_dma_dev);
-	kfree(mic_dma_dev);
 }
 /* DEBUGFS CODE */

drivers/firmware/arm_scmi/perf.c+7−1

 					le32_to_cpu(attr->sustained_freq_khz);
 		dom_info->sustained_perf_level =
 					le32_to_cpu(attr->sustained_perf_level);
-		dom_info->mult_factor =	(dom_info->sustained_freq_khz * 1000) /
+		if (!dom_info->sustained_freq_khz ||
+		    !dom_info->sustained_perf_level)
+			/* CPUFreq converts to kHz, hence default 1000 */
+			dom_info->mult_factor =	1000;
+		else
+			dom_info->mult_factor =
+					(dom_info->sustained_freq_khz * 1000) /
 					dom_info->sustained_perf_level;
 		memcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE);
 	}

drivers/firmware/efi/Kconfig+6−3

 config EFI_ARMSTUB_DTB_LOADER
 	bool "Enable the DTB loader"
 	depends on EFI_ARMSTUB
+	default y
 	help
 	  Select this config option to add support for the dtb= command
 	  line parameter, allowing a device tree blob to be loaded into
 	  memory from the EFI System Partition by the stub.
-	  The device tree is typically provided by the platform or by
+	  If the device tree is provided by the platform or by
-	  the bootloader, so this option is mostly for development
+	  the bootloader this option may not be needed.
-	  purposes only.
+	  But, for various development reasons and to maintain existing
+	  functionality for bootloaders that do not have such support
+	  this option is necessary.
 config EFI_BOOTLOADER_CONTROL
 	tristate "EFI Bootloader Control"

drivers/fpga/dfl-fme-pr.c+1−1

@@ -420,7 +420,7 @@ static int pr_mgmt_init(struct platform_device *pdev, · 419 unmodified lines
420	/* Create region for each port */	420	/* Create region for each port */
421	fme_region = dfl_fme_create_region(pdata, mgr,	421	fme_region = dfl_fme_create_region(pdata, mgr,
422	fme_br->br, i);	422	fme_br->br, i);
423	if (!fme_region) {	423	if (IS_ERR(fme_region)) {
424	ret = PTR_ERR(fme_region);	424	ret = PTR_ERR(fme_region);
425	goto destroy_region;	425	goto destroy_region;
426	}	426	}

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+5−1

 int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
 			void **mem_obj, uint64_t *gpu_addr,
-			void **cpu_ptr)
+			void **cpu_ptr, bool mqd_gfx9)
 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 	struct amdgpu_bo *bo = NULL;
 	bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC;
 	bp.type = ttm_bo_type_kernel;
 	bp.resv = NULL;
+	if (mqd_gfx9)
+		bp.flags |= AMDGPU_GEM_CREATE_MQD_GFX9;
 	r = amdgpu_bo_create(adev, &bp, &bo);
 	if (r) {
 		dev_err(adev->dev,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h+1−1

@@ -136,7 +136,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd); · 135 unmodified lines
136	/* Shared API */	136	/* Shared API */
137	int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,	137	int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
138	void *mem_obj, uint64_t gpu_addr,	138	void *mem_obj, uint64_t gpu_addr,
139	void **cpu_ptr);	139	void **cpu_ptr, bool mqd_gfx9);
140	void free_gtt_mem(struct kgd_dev kgd, void mem_obj);	140	void free_gtt_mem(struct kgd_dev kgd, void mem_obj);
141	void get_local_mem_info(struct kgd_dev *kgd,	141	void get_local_mem_info(struct kgd_dev *kgd,
142	struct kfd_local_mem_info *mem_info);	142	struct kfd_local_mem_info *mem_info);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c+1−1

@@ -685,7 +685,7 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev kgd, void mqd, · 684 unmodified lines
685		685
686	while (true) {	686	while (true) {
687	temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS);	687	temp = RREG32(sdma_base_addr + mmSDMA0_RLC0_CONTEXT_STATUS);
688	if (temp & SDMA0_STATUS_REG__RB_CMD_IDLE__SHIFT)	688	if (temp & SDMA0_RLC0_CONTEXT_STATUS__IDLE_MASK)
689	break;	689	break;
690	if (time_after(jiffies, end_jiffies))	690	if (time_after(jiffies, end_jiffies))
691	return -ETIME;	691	return -ETIME;

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c+8−6

@@ -367,12 +367,14 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device, · 366 unmodified lines
367	break;	367	break;
368	case CHIP_POLARIS10:	368	case CHIP_POLARIS10:
369	if (type == CGS_UCODE_ID_SMU) {	369	if (type == CGS_UCODE_ID_SMU) {
370	if ((adev->pdev->device == 0x67df) &&	370	if (((adev->pdev->device == 0x67df) &&
371	((adev->pdev->revision == 0xe0) \|\|	371	((adev->pdev->revision == 0xe0) \|\|
372	(adev->pdev->revision == 0xe3) \|\|	372	(adev->pdev->revision == 0xe3) \|\|
373	(adev->pdev->revision == 0xe4) \|\|	373	(adev->pdev->revision == 0xe4) \|\|
374	(adev->pdev->revision == 0xe5) \|\|	374	(adev->pdev->revision == 0xe5) \|\|
375	(adev->pdev->revision == 0xe7) \|\|	375	(adev->pdev->revision == 0xe7) \|\|
		376	(adev->pdev->revision == 0xef))) \|\|
		377	((adev->pdev->device == 0x6fdf) &&
376	(adev->pdev->revision == 0xef))) {	378	(adev->pdev->revision == 0xef))) {
377	info->is_kicker = true;	379	info->is_kicker = true;
378	strcpy(fw_name, "amdgpu/polaris10_k_smc.bin");	380	strcpy(fw_name, "amdgpu/polaris10_k_smc.bin");

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+16−9

 {
 	struct drm_gem_object *gobj;
 	unsigned long size;
+	int r;
 	gobj = drm_gem_object_lookup(p->filp, data->handle);
 	if (gobj == NULL)
 	p->uf_entry.tv.shared = true;
 	p->uf_entry.user_pages = NULL;
-	size = amdgpu_bo_size(p->uf_entry.robj);
-	if (size != PAGE_SIZE || (data->offset + 8) > size)
-		return -EINVAL;
-	*offset = data->offset;
 	drm_gem_object_put_unlocked(gobj);
+	size = amdgpu_bo_size(p->uf_entry.robj);
+	if (size != PAGE_SIZE || (data->offset + 8) > size) {
+		r = -EINVAL;
+		goto error_unref;
+	}
 	if (amdgpu_ttm_tt_get_usermm(p->uf_entry.robj->tbo.ttm)) {
-		amdgpu_bo_unref(&p->uf_entry.robj);
+		r = -EINVAL;
-		return -EINVAL;
+		goto error_unref;
 	}
+	*offset = data->offset;
 	return 0;
+error_unref:
+	amdgpu_bo_unref(&p->uf_entry.robj);
+	return r;
 }
 static int amdgpu_cs_bo_handles_chunk(struct amdgpu_cs_parser *p,
 error_abort:
 	dma_fence_put(&job->base.s_fence->finished);
 	job->base.s_fence = NULL;
+	amdgpu_mn_unlock(p->mn);
 error_unlock:
 	amdgpu_job_free(job);
-	amdgpu_mn_unlock(p->mn);
 	return r;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+1−1

 	static enum amd_ip_block_type ip_order[] = {
 		AMD_IP_BLOCK_TYPE_GMC,
 		AMD_IP_BLOCK_TYPE_COMMON,
+		AMD_IP_BLOCK_TYPE_PSP,
 		AMD_IP_BLOCK_TYPE_IH,
 	};
 	static enum amd_ip_block_type ip_order[] = {
 		AMD_IP_BLOCK_TYPE_SMC,
-		AMD_IP_BLOCK_TYPE_PSP,
 		AMD_IP_BLOCK_TYPE_DCE,
 		AMD_IP_BLOCK_TYPE_GFX,
 		AMD_IP_BLOCK_TYPE_SDMA,

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+1−0

@@ -740,6 +740,7 @@ static const struct pci_device_id pciidlist[] = { · 739 unmodified lines
740	{0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},	740	{0x1002, 0x67CA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
741	{0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},	741	{0x1002, 0x67CC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
742	{0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},	742	{0x1002, 0x67CF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
		743	{0x1002, 0x6FDF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS10},
743	/* Polaris12 */	744	/* Polaris12 */
744	{0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},	745	{0x1002, 0x6980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},
745	{0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},	746	{0x1002, 0x6981, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_POLARIS12},

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c+2−1

 {
 	int i;
+	cancel_delayed_work_sync(&adev->vce.idle_work);
 	if (adev->vce.vcpu_bo == NULL)
 		return 0;
 	if (i == AMDGPU_MAX_VCE_HANDLES)
 		return 0;
-	cancel_delayed_work_sync(&adev->vce.idle_work);
 	/* TODO: suspending running encoding sessions isn't supported */
 	return -EINVAL;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c+2−2

 	unsigned size;
 	void *ptr;
+	cancel_delayed_work_sync(&adev->vcn.idle_work);
 	if (adev->vcn.vcpu_bo == NULL)
 		return 0;
-	cancel_delayed_work_sync(&adev->vcn.idle_work);
 	size = amdgpu_bo_size(adev->vcn.vcpu_bo);
 	ptr = adev->vcn.cpu_addr;

drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c+5−2

 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
+	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CHICKEN_BITS, 0xfe931f07, 0x02831f07),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_GFX_IB_CNTL, 0x800f0100, 0x00000100),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
 	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_RLC1_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
-	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_PAGE, 0x000003ff, 0x000003c0)
+	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_PAGE, 0x000003ff, 0x000003c0),
+	SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_UTCL1_WATERMK, 0xfc000000, 0x00000000)
 };
 static const struct soc15_reg_golden golden_settings_sdma_vg10[] = {
 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100),
 	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
-	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0)
+	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE, 0x000003ff, 0x000003c0),
+	SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000)
 };
 static const struct soc15_reg_golden golden_settings_sdma_4_2[] =

drivers/gpu/drm/amd/amdkfd/kfd_device.c+2−1

@@ -457,7 +457,8 @@ bool kgd2kfd_device_init(struct kfd_dev *kfd, · 456 unmodified lines
457		457
458	if (kfd->kfd2kgd->init_gtt_mem_allocation(	458	if (kfd->kfd2kgd->init_gtt_mem_allocation(
459	kfd->kgd, size, &kfd->gtt_mem,	459	kfd->kgd, size, &kfd->gtt_mem,
460	&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr)){	460	&kfd->gtt_start_gpu_addr, &kfd->gtt_start_cpu_ptr,
		461	false)) {
461	dev_err(kfd_device, "Could not allocate %d bytes\n", size);	462	dev_err(kfd_device, "Could not allocate %d bytes\n", size);
462	goto out;	463	goto out;
463	}	464	}

drivers/gpu/drm/amd/amdkfd/kfd_iommu.c+12−1

@@ -62,9 +62,20 @@ int kfd_iommu_device_init(struct kfd_dev *kfd) · 61 unmodified lines
62	struct amd_iommu_device_info iommu_info;	62	struct amd_iommu_device_info iommu_info;
63	unsigned int pasid_limit;	63	unsigned int pasid_limit;
64	int err;	64	int err;
		65	struct kfd_topology_device *top_dev;
65		66
66	if (!kfd->device_info->needs_iommu_device)	67	top_dev = kfd_topology_device_by_id(kfd->id);
		68
		69	/*
		70	* Overwrite ATS capability according to needs_iommu_device to fix
		71	* potential missing corresponding bit in CRAT of BIOS.
		72	*/
		73	if (!kfd->device_info->needs_iommu_device) {
		74	top_dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
67	return 0;	75	return 0;
		76	}
		77
		78	top_dev->node_props.capability \|= HSA_CAP_ATS_PRESENT;
68		79
69	iommu_info.flags = 0;	80	iommu_info.flags = 0;
70	err = amd_iommu_device_info(kfd->pdev, &iommu_info);	81	err = amd_iommu_device_info(kfd->pdev, &iommu_info);

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c+1−1

@@ -88,7 +88,7 @@ static int init_mqd(struct mqd_manager mm, void *mqd, · 87 unmodified lines
88	ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),	88	ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),
89	&((*mqd_mem_obj)->gtt_mem),	89	&((*mqd_mem_obj)->gtt_mem),
90	&((*mqd_mem_obj)->gpu_addr),	90	&((*mqd_mem_obj)->gpu_addr),
91	(void )&((mqd_mem_obj)->cpu_ptr));	91	(void )&((mqd_mem_obj)->cpu_ptr), true);
92	} else	92	} else
93	retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd),	93	retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd),
94	mqd_mem_obj);	94	mqd_mem_obj);

drivers/gpu/drm/amd/amdkfd/kfd_priv.h+1−0

@@ -806,6 +806,7 @@ int kfd_topology_add_device(struct kfd_dev *gpu); · 805 unmodified lines
806	int kfd_topology_remove_device(struct kfd_dev *gpu);	806	int kfd_topology_remove_device(struct kfd_dev *gpu);
807	struct kfd_topology_device *kfd_topology_device_by_proximity_domain(	807	struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
808	uint32_t proximity_domain);	808	uint32_t proximity_domain);
		809	struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id);
809	struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);	810	struct kfd_dev *kfd_device_by_id(uint32_t gpu_id);
810	struct kfd_dev kfd_device_by_pci_dev(const struct pci_dev pdev);	811	struct kfd_dev kfd_device_by_pci_dev(const struct pci_dev pdev);
811	int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);	812	int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_dev **kdev);

drivers/gpu/drm/amd/amdkfd/kfd_topology.c+16−5

 	return device;
 }
-struct kfd_dev *kfd_device_by_id(uint32_t gpu_id)
+struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id)
 {
-	struct kfd_topology_device *top_dev;
+	struct kfd_topology_device *top_dev = NULL;
-	struct kfd_dev *device = NULL;
+	struct kfd_topology_device *ret = NULL;
 	down_read(&topology_lock);
 	list_for_each_entry(top_dev, &topology_device_list, list)
 		if (top_dev->gpu_id == gpu_id) {
-			device = top_dev->gpu;
+			ret = top_dev;
 			break;
 		}
 	up_read(&topology_lock);
-	return device;
+	return ret;
+}
+struct kfd_dev *kfd_device_by_id(uint32_t gpu_id)
+{
+	struct kfd_topology_device *top_dev;
+	top_dev = kfd_topology_device_by_id(gpu_id);
+	if (!top_dev)
+		return NULL;
+	return top_dev->gpu;
 }
 struct kfd_dev *kfd_device_by_pci_dev(const struct pci_dev *pdev)

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+134−5

@@ -641,6 +641,87 @@ amdgpu_dm_find_first_crtc_matching_connector(struct drm_atomic_state *state, · 640 unmodified lines
641	return NULL;	641	return NULL;
642	}	642	}
643		643
		644	static void emulated_link_detect(struct dc_link *link)
		645	{
		646	struct dc_sink_init_data sink_init_data = { 0 };
		647	struct display_sink_capability sink_caps = { 0 };
		648	enum dc_edid_status edid_status;
		649	struct dc_context *dc_ctx = link->ctx;
		650	struct dc_sink *sink = NULL;
		651	struct dc_sink *prev_sink = NULL;
		652
		653	link->type = dc_connection_none;
		654	prev_sink = link->local_sink;
		655
		656	if (prev_sink != NULL)
		657	dc_sink_retain(prev_sink);
		658
		659	switch (link->connector_signal) {
		660	case SIGNAL_TYPE_HDMI_TYPE_A: {
		661	sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
		662	sink_caps.signal = SIGNAL_TYPE_HDMI_TYPE_A;
		663	break;
		664	}
		665
		666	case SIGNAL_TYPE_DVI_SINGLE_LINK: {
		667	sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
		668	sink_caps.signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
		669	break;
		670	}
		671
		672	case SIGNAL_TYPE_DVI_DUAL_LINK: {
		673	sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
		674	sink_caps.signal = SIGNAL_TYPE_DVI_DUAL_LINK;
		675	break;
		676	}
		677
		678	case SIGNAL_TYPE_LVDS: {
		679	sink_caps.transaction_type = DDC_TRANSACTION_TYPE_I2C;
		680	sink_caps.signal = SIGNAL_TYPE_LVDS;
		681	break;
		682	}
		683
		684	case SIGNAL_TYPE_EDP: {
		685	sink_caps.transaction_type =
		686	DDC_TRANSACTION_TYPE_I2C_OVER_AUX;
		687	sink_caps.signal = SIGNAL_TYPE_EDP;
		688	break;
		689	}
		690
		691	case SIGNAL_TYPE_DISPLAY_PORT: {
		692	sink_caps.transaction_type =
		693	DDC_TRANSACTION_TYPE_I2C_OVER_AUX;
		694	sink_caps.signal = SIGNAL_TYPE_VIRTUAL;
		695	break;
		696	}
		697
		698	default:
		699	DC_ERROR("Invalid connector type! signal:%d\n",
		700	link->connector_signal);
		701	return;
		702	}
		703
		704	sink_init_data.link = link;
		705	sink_init_data.sink_signal = sink_caps.signal;
		706
		707	sink = dc_sink_create(&sink_init_data);
		708	if (!sink) {
		709	DC_ERROR("Failed to create sink!\n");
		710	return;
		711	}
		712
		713	link->local_sink = sink;
		714
		715	edid_status = dm_helpers_read_local_edid(
		716	link->ctx,
		717	link,
		718	sink);
		719
		720	if (edid_status != EDID_OK)
		721	DC_ERROR("Failed to read EDID");
		722
		723	}
		724
644	static int dm_resume(void *handle)	725	static int dm_resume(void *handle)
645	{	726	{
646	struct amdgpu_device *adev = handle;	727	struct amdgpu_device *adev = handle;
@@ -654,6 +735,7 @@ static int dm_resume(void *handle) · 7 unmodified lines
654	struct drm_plane *plane;	735	struct drm_plane *plane;
655	struct drm_plane_state *new_plane_state;	736	struct drm_plane_state *new_plane_state;
656	struct dm_plane_state *dm_new_plane_state;	737	struct dm_plane_state *dm_new_plane_state;
		738	enum dc_connection_type new_connection_type = dc_connection_none;
657	int ret;	739	int ret;
658	int i;	740	int i;
659		741
@@ -684,7 +766,13 @@ static int dm_resume(void *handle) · 24 unmodified lines
684	continue;	766	continue;
685		767
686	mutex_lock(&aconnector->hpd_lock);	768	mutex_lock(&aconnector->hpd_lock);
687	dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);	769	if (!dc_link_detect_sink(aconnector->dc_link, &new_connection_type))
		770	DRM_ERROR("KMS: Failed to detect connector\n");
		771
		772	if (aconnector->base.force && new_connection_type == dc_connection_none)
		773	emulated_link_detect(aconnector->dc_link);
		774	else
		775	dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
688		776
689	if (aconnector->fake_enable && aconnector->dc_link->local_sink)	777	if (aconnector->fake_enable && aconnector->dc_link->local_sink)
690	aconnector->fake_enable = false;	778	aconnector->fake_enable = false;
@@ -922,6 +1010,7 @@ static void handle_hpd_irq(void *param) · 231 unmodified lines
922	struct amdgpu_dm_connector aconnector = (struct amdgpu_dm_connector )param;	1010	struct amdgpu_dm_connector aconnector = (struct amdgpu_dm_connector )param;
923	struct drm_connector *connector = &aconnector->base;	1011	struct drm_connector *connector = &aconnector->base;
924	struct drm_device *dev = connector->dev;	1012	struct drm_device *dev = connector->dev;
		1013	enum dc_connection_type new_connection_type = dc_connection_none;
925		1014
926	/* In case of failure or MST no need to update connector status or notify the OS	1015	/* In case of failure or MST no need to update connector status or notify the OS
927	* since (for MST case) MST does this in it's own context.	1016	* since (for MST case) MST does this in it's own context.
@@ -931,7 +1020,21 @@ static void handle_hpd_irq(void *param) · 3 unmodified lines
931	if (aconnector->fake_enable)	1020	if (aconnector->fake_enable)
932	aconnector->fake_enable = false;	1021	aconnector->fake_enable = false;
933		1022
934	if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {	1023	if (!dc_link_detect_sink(aconnector->dc_link, &new_connection_type))
		1024	DRM_ERROR("KMS: Failed to detect connector\n");
		1025
		1026	if (aconnector->base.force && new_connection_type == dc_connection_none) {
		1027	emulated_link_detect(aconnector->dc_link);
		1028
		1029
		1030	drm_modeset_lock_all(dev);
		1031	dm_restore_drm_connector_state(dev, connector);
		1032	drm_modeset_unlock_all(dev);
		1033
		1034	if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
		1035	drm_kms_helper_hotplug_event(dev);
		1036
		1037	} else if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {
935	amdgpu_dm_update_connector_after_detect(aconnector);	1038	amdgpu_dm_update_connector_after_detect(aconnector);
936		1039
937		1040
@@ -1031,6 +1134,7 @@ static void handle_hpd_rx_irq(void *param) · 93 unmodified lines
1031	struct drm_device *dev = connector->dev;	1134	struct drm_device *dev = connector->dev;
1032	struct dc_link *dc_link = aconnector->dc_link;	1135	struct dc_link *dc_link = aconnector->dc_link;
1033	bool is_mst_root_connector = aconnector->mst_mgr.mst_state;	1136	bool is_mst_root_connector = aconnector->mst_mgr.mst_state;
		1137	enum dc_connection_type new_connection_type = dc_connection_none;
1034		1138
1035	/* TODO:Temporary add mutex to protect hpd interrupt not have a gpio	1139	/* TODO:Temporary add mutex to protect hpd interrupt not have a gpio
1036	* conflict, after implement i2c helper, this mutex should be	1140	* conflict, after implement i2c helper, this mutex should be
@@ -1042,7 +1146,24 @@ static void handle_hpd_rx_irq(void *param) · 5 unmodified lines
1042	if (dc_link_handle_hpd_rx_irq(dc_link, NULL, NULL) &&	1146	if (dc_link_handle_hpd_rx_irq(dc_link, NULL, NULL) &&
1043	!is_mst_root_connector) {	1147	!is_mst_root_connector) {
1044	/* Downstream Port status changed. */	1148	/* Downstream Port status changed. */
1045	if (dc_link_detect(dc_link, DETECT_REASON_HPDRX)) {	1149	if (!dc_link_detect_sink(dc_link, &new_connection_type))
		1150	DRM_ERROR("KMS: Failed to detect connector\n");
		1151
		1152	if (aconnector->base.force && new_connection_type == dc_connection_none) {
		1153	emulated_link_detect(dc_link);
		1154
		1155	if (aconnector->fake_enable)
		1156	aconnector->fake_enable = false;
		1157
		1158	amdgpu_dm_update_connector_after_detect(aconnector);
		1159
		1160
		1161	drm_modeset_lock_all(dev);
		1162	dm_restore_drm_connector_state(dev, connector);
		1163	drm_modeset_unlock_all(dev);
		1164
		1165	drm_kms_helper_hotplug_event(dev);
		1166	} else if (dc_link_detect(dc_link, DETECT_REASON_HPDRX)) {
1046		1167
1047	if (aconnector->fake_enable)	1168	if (aconnector->fake_enable)
1048	aconnector->fake_enable = false;	1169	aconnector->fake_enable = false;
@@ -1433,6 +1554,7 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) · 384 unmodified lines
1433	struct amdgpu_mode_info *mode_info = &adev->mode_info;	1554	struct amdgpu_mode_info *mode_info = &adev->mode_info;
1434	uint32_t link_cnt;	1555	uint32_t link_cnt;
1435	int32_t total_overlay_planes, total_primary_planes;	1556	int32_t total_overlay_planes, total_primary_planes;
		1557	enum dc_connection_type new_connection_type = dc_connection_none;
1436		1558
1437	link_cnt = dm->dc->caps.max_links;	1559	link_cnt = dm->dc->caps.max_links;
1438	if (amdgpu_dm_mode_config_init(dm->adev)) {	1560	if (amdgpu_dm_mode_config_init(dm->adev)) {
@@ -1499,7 +1621,14 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) · 60 unmodified lines
1499		1621
1500	link = dc_get_link_at_index(dm->dc, i);	1622	link = dc_get_link_at_index(dm->dc, i);
1501		1623
1502	if (dc_link_detect(link, DETECT_REASON_BOOT)) {	1624	if (!dc_link_detect_sink(link, &new_connection_type))
		1625	DRM_ERROR("KMS: Failed to detect connector\n");
		1626
		1627	if (aconnector->base.force && new_connection_type == dc_connection_none) {
		1628	emulated_link_detect(link);
		1629	amdgpu_dm_update_connector_after_detect(aconnector);
		1630
		1631	} else if (dc_link_detect(link, DETECT_REASON_BOOT)) {
1503	amdgpu_dm_update_connector_after_detect(aconnector);	1632	amdgpu_dm_update_connector_after_detect(aconnector);
1504	register_backlight_device(dm, link);	1633	register_backlight_device(dm, link);
1505	}	1634	}
@@ -2494,7 +2623,7 @@ create_stream_for_sink(struct amdgpu_dm_connector *aconnector, · 988 unmodified lines
2494	if (dm_state && dm_state->freesync_capable)	2623	if (dm_state && dm_state->freesync_capable)
2495	stream->ignore_msa_timing_param = true;	2624	stream->ignore_msa_timing_param = true;
2496	finish:	2625	finish:
2497	if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL)	2626	if (sink && sink->sink_signal == SIGNAL_TYPE_VIRTUAL && aconnector->base.force != DRM_FORCE_ON)
2498	dc_sink_release(sink);	2627	dc_sink_release(sink);
2499		2628
2500	return stream;	2629	return stream;

drivers/gpu/drm/amd/display/dc/core/dc_link.c+2−2

@@ -195,7 +195,7 @@ static bool program_hpd_filter( · 194 unmodified lines
195	return result;	195	return result;
196	}	196	}
197		197
198	static bool detect_sink(struct dc_link link, enum dc_connection_type type)	198	bool dc_link_detect_sink(struct dc_link link, enum dc_connection_type type)
199	{	199	{
200	uint32_t is_hpd_high = 0;	200	uint32_t is_hpd_high = 0;
201	struct gpio *hpd_pin;	201	struct gpio *hpd_pin;
@@ -604,7 +604,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason) · 402 unmodified lines
604	if (link->connector_signal == SIGNAL_TYPE_VIRTUAL)	604	if (link->connector_signal == SIGNAL_TYPE_VIRTUAL)
605	return false;	605	return false;
606		606
607	if (false == detect_sink(link, &new_connection_type)) {	607	if (false == dc_link_detect_sink(link, &new_connection_type)) {
608	BREAK_TO_DEBUGGER();	608	BREAK_TO_DEBUGGER();
609	return false;	609	return false;
610	}	610	}

drivers/gpu/drm/amd/display/dc/dc_link.h+1−0

@@ -215,6 +215,7 @@ void dc_link_enable_hpd_filter(struct dc_link *link, bool enable); · 214 unmodified lines
215		215
216	bool dc_link_is_dp_sink_present(struct dc_link *link);	216	bool dc_link_is_dp_sink_present(struct dc_link *link);
217		217
		218	bool dc_link_detect_sink(struct dc_link link, enum dc_connection_type type);
218	/*	219	/*
219	* DPCD access interfaces	220	* DPCD access interfaces
220	*/	221	*/

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+1−1

@@ -2560,7 +2560,7 @@ static void pplib_apply_display_requirements( · 2559 unmodified lines
2560	dc->prev_display_config = *pp_display_cfg;	2560	dc->prev_display_config = *pp_display_cfg;
2561	}	2561	}
2562		2562
2563	void dce110_set_bandwidth(	2563	static void dce110_set_bandwidth(
2564	struct dc *dc,	2564	struct dc *dc,
2565	struct dc_state *context,	2565	struct dc_state *context,
2566	bool decrease_allowed)	2566	bool decrease_allowed)

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.h+0−5

 	const struct dc_state *context,
 	struct dm_pp_display_configuration *pp_display_cfg);
-void dce110_set_bandwidth(
-		struct dc *dc,
-		struct dc_state *context,
-		bool decrease_allowed);
 uint32_t dce110_get_min_vblank_time_us(const struct dc_state *context);
 void dp_receiver_power_ctrl(struct dc_link *link, bool on);

drivers/gpu/drm/amd/display/dc/dce120/dce120_hw_sequencer.c+0−12

@@ -244,17 +244,6 @@ static void dce120_update_dchub( · 243 unmodified lines
244	dh_data->dchub_info_valid = false;	244	dh_data->dchub_info_valid = false;
245	}	245	}
246		246
247	static void dce120_set_bandwidth(
248	struct dc *dc,
249	struct dc_state *context,
250	bool decrease_allowed)
251	{
252	if (context->stream_count <= 0)
253	return;
254
255	dce110_set_bandwidth(dc, context, decrease_allowed);
256	}
257
258	void dce120_hw_sequencer_construct(struct dc *dc)	247	void dce120_hw_sequencer_construct(struct dc *dc)
259	{	248	{
260	/* All registers used by dce11.2 match those in dce11 in offset and	249	/* All registers used by dce11.2 match those in dce11 in offset and
@@ -263,6 +252,5 @@ void dce120_hw_sequencer_construct(struct dc *dc) · 2 unmodified lines
263	dce110_hw_sequencer_construct(dc);	252	dce110_hw_sequencer_construct(dc);
264	dc->hwss.enable_display_power_gating = dce120_enable_display_power_gating;	253	dc->hwss.enable_display_power_gating = dce120_enable_display_power_gating;
265	dc->hwss.update_dchub = dce120_update_dchub;	254	dc->hwss.update_dchub = dce120_update_dchub;
266	dc->hwss.set_bandwidth = dce120_set_bandwidth;
267	}	255	}
268		256

drivers/gpu/drm/amd/include/kgd_kfd_interface.h+1−1

@@ -292,7 +292,7 @@ struct tile_config { · 291 unmodified lines
292	struct kfd2kgd_calls {	292	struct kfd2kgd_calls {
293	int (init_gtt_mem_allocation)(struct kgd_dev kgd, size_t size,	293	int (init_gtt_mem_allocation)(struct kgd_dev kgd, size_t size,
294	void *mem_obj, uint64_t gpu_addr,	294	void *mem_obj, uint64_t gpu_addr,
295	void **cpu_ptr);	295	void **cpu_ptr, bool mqd_gfx9);
296		296
297	void (free_gtt_mem)(struct kgd_dev kgd, void *mem_obj);	297	void (free_gtt_mem)(struct kgd_dev kgd, void *mem_obj);
298		298

drivers/gpu/drm/arm/malidp_drv.c+1−0

@@ -754,6 +754,7 @@ static int malidp_bind(struct device *dev) · 753 unmodified lines
754	drm->irq_enabled = true;	754	drm->irq_enabled = true;
755		755
756	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);	756	ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
		757	drm_crtc_vblank_reset(&malidp->crtc);
757	if (ret < 0) {	758	if (ret < 0) {
758	DRM_ERROR("failed to initialise vblank\n");	759	DRM_ERROR("failed to initialise vblank\n");
759	goto vblank_fail;	760	goto vblank_fail;

drivers/gpu/drm/arm/malidp_hw.c+23−2

 static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev,
 				     dma_addr_t *addrs, s32 *pitches,
-				     int num_planes, u16 w, u16 h, u32 fmt_id)
+				     int num_planes, u16 w, u16 h, u32 fmt_id,
+				     const s16 *rgb2yuv_coeffs)
 {
 	u32 base = MALIDP500_SE_MEMWRITE_BASE;
 	u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);
 	malidp_hw_write(hwdev, MALIDP_DE_H_ACTIVE(w) | MALIDP_DE_V_ACTIVE(h),
 			MALIDP500_SE_MEMWRITE_OUT_SIZE);
+	if (rgb2yuv_coeffs) {
+		int i;
+		for (i = 0; i < MALIDP_COLORADJ_NUM_COEFFS; i++) {
+			malidp_hw_write(hwdev, rgb2yuv_coeffs[i],
+					MALIDP500_SE_RGB_YUV_COEFFS + i * 4);
+		}
+	}
 	malidp_hw_setbits(hwdev, MALIDP_SE_MEMWRITE_EN, MALIDP500_SE_CONTROL);
 	return 0;
 static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev,
 				     dma_addr_t *addrs, s32 *pitches,
-				     int num_planes, u16 w, u16 h, u32 fmt_id)
+				     int num_planes, u16 w, u16 h, u32 fmt_id,
+				     const s16 *rgb2yuv_coeffs)
 {
 	u32 base = MALIDP550_SE_MEMWRITE_BASE;
 	u32 de_base = malidp_get_block_base(hwdev, MALIDP_DE_BLOCK);
 	malidp_hw_setbits(hwdev, MALIDP550_SE_MEMWRITE_ONESHOT | MALIDP_SE_MEMWRITE_EN,
 			  MALIDP550_SE_CONTROL);
+	if (rgb2yuv_coeffs) {
+		int i;
+		for (i = 0; i < MALIDP_COLORADJ_NUM_COEFFS; i++) {
+			malidp_hw_write(hwdev, rgb2yuv_coeffs[i],
+					MALIDP550_SE_RGB_YUV_COEFFS + i * 4);
+		}
+	}
 	return 0;
 }

drivers/gpu/drm/arm/malidp_hw.h+2−1

@@ -191,7 +191,8 @@ struct malidp_hw { · 190 unmodified lines
191	* @param fmt_id - internal format ID of output buffer	191	* @param fmt_id - internal format ID of output buffer
192	*/	192	*/
193	int (enable_memwrite)(struct malidp_hw_device hwdev, dma_addr_t *addrs,	193	int (enable_memwrite)(struct malidp_hw_device hwdev, dma_addr_t *addrs,
194	s32 *pitches, int num_planes, u16 w, u16 h, u32 fmt_id);	194	s32 *pitches, int num_planes, u16 w, u16 h, u32 fmt_id,
		195	const s16 *rgb2yuv_coeffs);
195		196
196	/*	197	/*
197	* Disable the writing to memory of the next frame's content.	198	* Disable the writing to memory of the next frame's content.

drivers/gpu/drm/arm/malidp_mw.c+21−4

 	s32 pitches[2];
 	u8 format;
 	u8 n_planes;
+	bool rgb2yuv_initialized;
+	const s16 *rgb2yuv_coeffs;
 };
 static int malidp_mw_connector_get_modes(struct drm_connector *connector)
 static struct drm_connector_state *
 malidp_mw_connector_duplicate_state(struct drm_connector *connector)
 {
-	struct malidp_mw_connector_state *mw_state;
+	struct malidp_mw_connector_state *mw_state, *mw_current_state;
 	if (WARN_ON(!connector->state))
 		return NULL;
 	if (!mw_state)
 		return NULL;
-	/* No need to preserve any of our driver-local data */
+	mw_current_state = to_mw_state(connector->state);
+	mw_state->rgb2yuv_coeffs = mw_current_state->rgb2yuv_coeffs;
+	mw_state->rgb2yuv_initialized = mw_current_state->rgb2yuv_initialized;
 	__drm_atomic_helper_connector_duplicate_state(connector, &mw_state->base);
 	return &mw_state->base;
 	.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 };
+static const s16 rgb2yuv_coeffs_bt709_limited[MALIDP_COLORADJ_NUM_COEFFS] = {
+	47,  157,   16,
+	-26,  -87,  112,
+	112, -102,  -10,
+	16,  128,  128
+};
 static int
 malidp_mw_encoder_atomic_check(struct drm_encoder *encoder,
 			       struct drm_crtc_state *crtc_state,
 	}
 	mw_state->n_planes = n_planes;
+	if (fb->format->is_yuv)
+		mw_state->rgb2yuv_coeffs = rgb2yuv_coeffs_bt709_limited;
 	return 0;
 }
 		drm_writeback_queue_job(mw_conn, conn_state->writeback_job);
 		conn_state->writeback_job = NULL;
 		hwdev->hw->enable_memwrite(hwdev, mw_state->addrs,
 					   mw_state->pitches, mw_state->n_planes,
-					   fb->width, fb->height, mw_state->format);
+					   fb->width, fb->height, mw_state->format,
+					   !mw_state->rgb2yuv_initialized ?
+					   mw_state->rgb2yuv_coeffs : NULL);
+		mw_state->rgb2yuv_initialized = !!mw_state->rgb2yuv_coeffs;
 	} else {
 		DRM_DEV_DEBUG_DRIVER(drm->dev, "Disable memwrite\n");
 		hwdev->hw->disable_memwrite(hwdev);

drivers/gpu/drm/arm/malidp_regs.h+2−0

 #define MALIDP500_SE_BASE		0x00c00
 #define MALIDP500_SE_CONTROL		0x00c0c
 #define MALIDP500_SE_MEMWRITE_OUT_SIZE	0x00c2c
+#define MALIDP500_SE_RGB_YUV_COEFFS	0x00C74
 #define MALIDP500_SE_MEMWRITE_BASE	0x00e00
 #define MALIDP500_DC_IRQ_BASE		0x00f00
 #define MALIDP500_CONFIG_VALID		0x00f00
 #define MALIDP550_SE_CONTROL		0x08010
 #define   MALIDP550_SE_MEMWRITE_ONESHOT	(1 << 7)
 #define MALIDP550_SE_MEMWRITE_OUT_SIZE	0x08030
+#define MALIDP550_SE_RGB_YUV_COEFFS	0x08078
 #define MALIDP550_SE_MEMWRITE_BASE	0x08100
 #define MALIDP550_DC_BASE		0x0c000
 #define MALIDP550_DC_CONTROL		0x0c010

drivers/gpu/drm/drm_atomic.c+1−1

@@ -2067,7 +2067,7 @@ static void __drm_state_dump(struct drm_device dev, struct drm_printer p, · 2066 unmodified lines
2067	struct drm_connector *connector;	2067	struct drm_connector *connector;
2068	struct drm_connector_list_iter conn_iter;	2068	struct drm_connector_list_iter conn_iter;
2069		2069
2070	if (!drm_core_check_feature(dev, DRIVER_ATOMIC))	2070	if (!drm_drv_uses_atomic_modeset(dev))
2071	return;	2071	return;
2072		2072
2073	list_for_each_entry(plane, &config->plane_list, head) {	2073	list_for_each_entry(plane, &config->plane_list, head) {

drivers/gpu/drm/drm_debugfs.c+1−1

@@ -151,7 +151,7 @@ int drm_debugfs_init(struct drm_minor *minor, int minor_id, · 150 unmodified lines
151	return ret;	151	return ret;
152	}	152	}
153		153
154	if (drm_core_check_feature(dev, DRIVER_ATOMIC)) {	154	if (drm_drv_uses_atomic_modeset(dev)) {
155	ret = drm_atomic_debugfs_init(minor);	155	ret = drm_atomic_debugfs_init(minor);
156	if (ret) {	156	if (ret) {
157	DRM_ERROR("Failed to create atomic debugfs files\n");	157	DRM_ERROR("Failed to create atomic debugfs files\n");

drivers/gpu/drm/drm_fb_helper.c+0−3

 {
 	int c, o;
 	struct drm_connector *connector;
-	const struct drm_connector_helper_funcs *connector_funcs;
 	int my_score, best_score, score;
 	struct drm_fb_helper_crtc **crtcs, *crtc;
 	struct drm_fb_helper_connector *fb_helper_conn;
 	if (drm_has_preferred_mode(fb_helper_conn, width, height))
 		my_score++;
-	connector_funcs = connector->helper_private;
 	/*
 	 * select a crtc for this connector and then attempt to configure
 	 * remaining connectors

drivers/gpu/drm/drm_panel.c+0−10

 #include <linux/err.h>
 #include <linux/module.h>
-#include <drm/drm_device.h>
 #include <drm/drm_crtc.h>
 #include <drm/drm_panel.h>
 	if (panel->connector)
 		return -EBUSY;
-	panel->link = device_link_add(connector->dev->dev, panel->dev, 0);
-	if (!panel->link) {
-		dev_err(panel->dev, "failed to link panel to %s\n",
-			dev_name(connector->dev->dev));
-		return -EINVAL;
-	}
 	panel->connector = connector;
 	panel->drm = connector->dev;
  */
 int drm_panel_detach(struct drm_panel *panel)
 {
-	device_link_del(panel->link);
 	panel->connector = NULL;
 	panel->drm = NULL;

drivers/gpu/drm/drm_syncobj.c+5−0

 {
 	int ret;
+	WARN_ON(*fence);
 	*fence = drm_syncobj_fence_get(syncobj);
 	if (*fence)
 		return 1;
 	if (flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT) {
 		for (i = 0; i < count; ++i) {
+			if (entries[i].fence)
+				continue;
 			drm_syncobj_fence_get_or_add_callback(syncobjs[i],
 							      &entries[i].fence,
 							      &entries[i].syncobj_cb,

drivers/gpu/drm/etnaviv/etnaviv_drv.c+21−6

@@ -592,8 +592,6 @@ static int etnaviv_pdev_probe(struct platform_device *pdev) · 591 unmodified lines
592	struct device *dev = &pdev->dev;	592	struct device *dev = &pdev->dev;
593	struct component_match *match = NULL;	593	struct component_match *match = NULL;
594		594
595	dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
596
597	if (!dev->platform_data) {	595	if (!dev->platform_data) {
598	struct device_node *core_node;	596	struct device_node *core_node;
599		597
@@ -655,13 +653,30 @@ static int __init etnaviv_init(void) · 55 unmodified lines
655	for_each_compatible_node(np, NULL, "vivante,gc") {	653	for_each_compatible_node(np, NULL, "vivante,gc") {
656	if (!of_device_is_available(np))	654	if (!of_device_is_available(np))
657	continue;	655	continue;
658	pdev = platform_device_register_simple("etnaviv", -1,	656
659	NULL, 0);	657	pdev = platform_device_alloc("etnaviv", -1);
660	if (IS_ERR(pdev)) {	658	if (!pdev) {
661	ret = PTR_ERR(pdev);	659	ret = -ENOMEM;
		660	of_node_put(np);
		661	goto unregister_platform_driver;
		662	}
		663	pdev->dev.coherent_dma_mask = DMA_BIT_MASK(40);
		664	pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
		665
		666	/*
		667	* Apply the same DMA configuration to the virtual etnaviv
		668	* device as the GPU we found. This assumes that all Vivante
		669	* GPUs in the system share the same DMA constraints.
		670	*/
		671	of_dma_configure(&pdev->dev, np, true);
		672
		673	ret = platform_device_add(pdev);
		674	if (ret) {
		675	platform_device_put(pdev);
662	of_node_put(np);	676	of_node_put(np);
663	goto unregister_platform_driver;	677	goto unregister_platform_driver;
664	}	678	}
		679
665	etnaviv_drm = pdev;	680	etnaviv_drm = pdev;
666	of_node_put(np);	681	of_node_put(np);
667	break;	682	break;

drivers/gpu/drm/i915/gvt/dmabuf.c+26−7

@@ -170,20 +170,22 @@ static struct drm_i915_gem_object vgpu_create_gem(struct drm_device dev, · 169 unmodified lines
170	unsigned int tiling_mode = 0;	170	unsigned int tiling_mode = 0;
171	unsigned int stride = 0;	171	unsigned int stride = 0;
172		172
173	switch (info->drm_format_mod << 10) {	173	switch (info->drm_format_mod) {
174	case PLANE_CTL_TILED_LINEAR:	174	case DRM_FORMAT_MOD_LINEAR:
175	tiling_mode = I915_TILING_NONE;	175	tiling_mode = I915_TILING_NONE;
176	break;	176	break;
177	case PLANE_CTL_TILED_X:	177	case I915_FORMAT_MOD_X_TILED:
178	tiling_mode = I915_TILING_X;	178	tiling_mode = I915_TILING_X;
179	stride = info->stride;	179	stride = info->stride;
180	break;	180	break;
181	case PLANE_CTL_TILED_Y:	181	case I915_FORMAT_MOD_Y_TILED:
		182	case I915_FORMAT_MOD_Yf_TILED:
182	tiling_mode = I915_TILING_Y;	183	tiling_mode = I915_TILING_Y;
183	stride = info->stride;	184	stride = info->stride;
184	break;	185	break;
185	default:	186	default:
186	gvt_dbg_core("not supported tiling mode\n");	187	gvt_dbg_core("invalid drm_format_mod %llx for tiling\n",
		188	info->drm_format_mod);
187	}	189	}
188	obj->tiling_and_stride = tiling_mode \| stride;	190	obj->tiling_and_stride = tiling_mode \| stride;
189	} else {	191	} else {
@@ -222,9 +224,26 @@ static int vgpu_get_plane_info(struct drm_device *dev, · 32 unmodified lines
222	info->height = p.height;	224	info->height = p.height;
223	info->stride = p.stride;	225	info->stride = p.stride;
224	info->drm_format = p.drm_format;	226	info->drm_format = p.drm_format;
225	info->drm_format_mod = p.tiled;	227
		228	switch (p.tiled) {
		229	case PLANE_CTL_TILED_LINEAR:
		230	info->drm_format_mod = DRM_FORMAT_MOD_LINEAR;
		231	break;
		232	case PLANE_CTL_TILED_X:
		233	info->drm_format_mod = I915_FORMAT_MOD_X_TILED;
		234	break;
		235	case PLANE_CTL_TILED_Y:
		236	info->drm_format_mod = I915_FORMAT_MOD_Y_TILED;
		237	break;
		238	case PLANE_CTL_TILED_YF:
		239	info->drm_format_mod = I915_FORMAT_MOD_Yf_TILED;
		240	break;
		241	default:
		242	gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
		243	}
		244
226	info->size = (((p.stride * p.height * p.bpp) / 8) +	245	info->size = (((p.stride * p.height * p.bpp) / 8) +
227	(PAGE_SIZE - 1)) >> PAGE_SHIFT;	246	(PAGE_SIZE - 1)) >> PAGE_SHIFT;
228	} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {	247	} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
229	ret = intel_vgpu_decode_cursor_plane(vgpu, &c);	248	ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
230	if (ret)	249	if (ret)

drivers/gpu/drm/i915/gvt/fb_decoder.c+2−3

 	if (IS_SKYLAKE(dev_priv)
 		|| IS_KABYLAKE(dev_priv)
 		|| IS_BROXTON(dev_priv)) {
-		plane->tiled = (val & PLANE_CTL_TILED_MASK) >>
+		plane->tiled = val & PLANE_CTL_TILED_MASK;
-		_PLANE_CTL_TILED_SHIFT;
 		fmt = skl_format_to_drm(
 			val & PLANE_CTL_FORMAT_MASK,
 			val & PLANE_CTL_ORDER_RGBX,
 		return  -EINVAL;
 	}
-	plane->stride = intel_vgpu_get_stride(vgpu, pipe, (plane->tiled << 10),
+	plane->stride = intel_vgpu_get_stride(vgpu, pipe, plane->tiled,
 		(IS_SKYLAKE(dev_priv)
 		|| IS_KABYLAKE(dev_priv)
 		|| IS_BROXTON(dev_priv)) ?

drivers/gpu/drm/i915/gvt/fb_decoder.h+1−1

@@ -101,7 +101,7 @@ struct intel_gvt; · 100 unmodified lines
101	/* color space conversion and gamma correction are not included */	101	/* color space conversion and gamma correction are not included */
102	struct intel_vgpu_primary_plane_format {	102	struct intel_vgpu_primary_plane_format {
103	u8 enabled; /* plane is enabled */	103	u8 enabled; /* plane is enabled */
104	u8 tiled; /* X-tiled */	104	u32 tiled; /* tiling mode: linear, X-tiled, Y tiled, etc */
105	u8 bpp; /* bits per pixel */	105	u8 bpp; /* bits per pixel */
106	u32 hw_format; /* format field in the PRI_CTL register */	106	u32 hw_format; /* format field in the PRI_CTL register */
107	u32 drm_format; /* format in DRM definition */	107	u32 drm_format; /* format in DRM definition */

drivers/gpu/drm/i915/gvt/handlers.c+28−6

 	return 0;
 }
+static int gen9_dbuf_ctl_mmio_write(struct intel_vgpu *vgpu,
+		unsigned int offset, void *p_data, unsigned int bytes)
+{
+	write_vreg(vgpu, offset, p_data, bytes);
+	if (vgpu_vreg(vgpu, offset) & DBUF_POWER_REQUEST)
+		vgpu_vreg(vgpu, offset) |= DBUF_POWER_STATE;
+	else
+		vgpu_vreg(vgpu, offset) &= ~DBUF_POWER_STATE;
+	return 0;
+}
 static int fpga_dbg_mmio_write(struct intel_vgpu *vgpu,
 	unsigned int offset, void *p_data, unsigned int bytes)
 {
 	u32 v = *(u32 *)p_data;
 	u32 data = v & COMMON_RESET_DIS ? BXT_PHY_LANE_ENABLED : 0;
-	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_A) = data;
+	switch (offset) {
-	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_B) = data;
+	case _PHY_CTL_FAMILY_EDP:
-	vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_C) = data;
+		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_A) = data;
+		break;
+	case _PHY_CTL_FAMILY_DDI:
+		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_B) = data;
+		vgpu_vreg(vgpu, _BXT_PHY_CTL_DDI_C) = data;
+		break;
+	}
 	vgpu_vreg(vgpu, offset) = v;
 	MMIO_DH(HSW_PWR_WELL_CTL_DRIVER(SKL_DISP_PW_MISC_IO), D_SKL_PLUS, NULL,
 		skl_power_well_ctl_write);
+	MMIO_DH(DBUF_CTL, D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write);
 	MMIO_D(_MMIO(0xa210), D_SKL_PLUS);
 	MMIO_D(GEN9_MEDIA_PG_IDLE_HYSTERESIS, D_SKL_PLUS);
 	MMIO_D(GEN9_RENDER_PG_IDLE_HYSTERESIS, D_SKL_PLUS);
 		NULL, gen9_trtte_write);
 	MMIO_DH(_MMIO(0x4dfc), D_SKL_PLUS, NULL, gen9_trtt_chicken_write);
-	MMIO_D(_MMIO(0x45008), D_SKL_PLUS);
 	MMIO_D(_MMIO(0x46430), D_SKL_PLUS);
 	MMIO_D(_MMIO(0x46520), D_SKL_PLUS);
 	MMIO_D(_MMIO(0x44500), D_SKL_PLUS);
 	MMIO_DFH(GEN9_CSFE_CHICKEN1_RCS, D_SKL_PLUS, F_CMD_ACCESS, NULL, NULL);
 	MMIO_DFH(GEN8_HDC_CHICKEN1, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
-		NULL, NULL);
+		 NULL, NULL);
+	MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
+		 NULL, NULL);
 	MMIO_D(_MMIO(0x4ab8), D_KBL);
 	MMIO_D(_MMIO(0x2248), D_KBL | D_SKL);
 	MMIO_D(BXT_DSI_PLL_ENABLE, D_BXT);
 	MMIO_D(GEN9_CLKGATE_DIS_0, D_BXT);
+	MMIO_D(GEN9_CLKGATE_DIS_4, D_BXT);
 	MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_A), D_BXT);
 	MMIO_D(HSW_TVIDEO_DIP_GCP(TRANSCODER_B), D_BXT);

drivers/gpu/drm/i915/gvt/kvmgt.c+14−3

 #include <linux/device.h>
 #include <linux/mm.h>
 #include <linux/mmu_context.h>
+#include <linux/sched/mm.h>
 #include <linux/types.h>
 #include <linux/list.h>
 #include <linux/rbtree.h>
 	info = (struct kvmgt_guest_info *)handle;
 	kvm = info->kvm;
-	if (kthread)
+	if (kthread) {
+		if (!mmget_not_zero(kvm->mm))
+			return -EFAULT;
 		use_mm(kvm->mm);
+	}
 	idx = srcu_read_lock(&kvm->srcu);
 	ret = write ? kvm_write_guest(kvm, gpa, buf, len) :
 		      kvm_read_guest(kvm, gpa, buf, len);
 	srcu_read_unlock(&kvm->srcu, idx);
-	if (kthread)
+	if (kthread) {
 		unuse_mm(kvm->mm);
+		mmput(kvm->mm);
+	}
 	return ret;
 }
 {
 	struct kvmgt_guest_info *info;
 	struct kvm *kvm;
+	int idx;
+	bool ret;
 	if (!handle_valid(handle))
 		return false;
 	info = (struct kvmgt_guest_info *)handle;
 	kvm = info->kvm;
-	return kvm_is_visible_gfn(kvm, gfn);
+	idx = srcu_read_lock(&kvm->srcu);
+	ret = kvm_is_visible_gfn(kvm, gfn);
+	srcu_read_unlock(&kvm->srcu, idx);
+	return ret;
 }
 struct intel_gvt_mpt kvmgt_mpt = {

drivers/gpu/drm/i915/gvt/mmio.c+28−0

@@ -244,6 +244,34 @@ void intel_vgpu_reset_mmio(struct intel_vgpu *vgpu, bool dmlr) · 243 unmodified lines
244		244
245	/* set the bit 0:2(Core C-State ) to C0 */	245	/* set the bit 0:2(Core C-State ) to C0 */
246	vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0;	246	vgpu_vreg_t(vgpu, GEN6_GT_CORE_STATUS) = 0;
		247
		248	if (IS_BROXTON(vgpu->gvt->dev_priv)) {
		249	vgpu_vreg_t(vgpu, BXT_P_CR_GT_DISP_PWRON) &=
		250	~(BIT(0) \| BIT(1));
		251	vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY0)) &=
		252	~PHY_POWER_GOOD;
		253	vgpu_vreg_t(vgpu, BXT_PORT_CL1CM_DW0(DPIO_PHY1)) &=
		254	~PHY_POWER_GOOD;
		255	vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY0)) &=
		256	~BIT(30);
		257	vgpu_vreg_t(vgpu, BXT_PHY_CTL_FAMILY(DPIO_PHY1)) &=
		258	~BIT(30);
		259	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) &=
		260	~BXT_PHY_LANE_ENABLED;
		261	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_A)) \|=
		262	BXT_PHY_CMNLANE_POWERDOWN_ACK \|
		263	BXT_PHY_LANE_POWERDOWN_ACK;
		264	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) &=
		265	~BXT_PHY_LANE_ENABLED;
		266	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_B)) \|=
		267	BXT_PHY_CMNLANE_POWERDOWN_ACK \|
		268	BXT_PHY_LANE_POWERDOWN_ACK;
		269	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) &=
		270	~BXT_PHY_LANE_ENABLED;
		271	vgpu_vreg_t(vgpu, BXT_PHY_CTL(PORT_C)) \|=
		272	BXT_PHY_CMNLANE_POWERDOWN_ACK \|
		273	BXT_PHY_LANE_POWERDOWN_ACK;
		274	}
247	} else {	275	} else {
248	#define GVT_GEN8_MMIO_RESET_OFFSET (0x44200)	276	#define GVT_GEN8_MMIO_RESET_OFFSET (0x44200)
249	/* only reset the engine related, so starting with 0x44200	277	/* only reset the engine related, so starting with 0x44200

drivers/gpu/drm/i915/gvt/mmio_context.c+0−2

 	 * performace for batch mmio read/write, so we need
 	 * handle forcewake mannually.
 	 */
-	intel_runtime_pm_get(dev_priv);
 	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 	switch_mmio(pre, next, ring_id);
 	intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
-	intel_runtime_pm_put(dev_priv);
 }
 /**

drivers/gpu/drm/i915/gvt/opregion.c+9−11

 #define DEVICE_TYPE_EFP3   0x20
 #define DEVICE_TYPE_EFP4   0x10
-#define DEV_SIZE	38
 struct opregion_header {
 	u8 signature[16];
 	u32 size;
 	u16 size; /* data size */
 } __packed;
+/* For supporting windows guest with opregion, here hardcode the emulated
+ * bdb header version as '186', and the corresponding child_device_config
+ * length should be '33' but not '38'.
+ */
 struct efp_child_device_config {
 	u16 handle;
 	u16 device_type;
 	u8 mipi_bridge_type; /* 171 */
 	u16 device_class_ext;
 	u8 dvo_function;
-	u8 dp_usb_type_c:1; /* 195 */
-	u8 skip6:7;
-	u8 dp_usb_type_c_2x_gpio_index; /* 195 */
-	u16 dp_usb_type_c_2x_gpio_pin; /* 195 */
-	u8 iboost_dp:4; /* 196 */
-	u8 iboost_hdmi:4; /* 196 */
 } __packed;
 struct vbt {
 	v->header.bdb_offset = offsetof(struct vbt, bdb_header);
 	strcpy(&v->bdb_header.signature[0], "BIOS_DATA_BLOCK");
-	v->bdb_header.version = 186; /* child_dev_size = 38 */
+	v->bdb_header.version = 186; /* child_dev_size = 33 */
 	v->bdb_header.header_size = sizeof(v->bdb_header);
 	v->bdb_header.bdb_size = sizeof(struct vbt) - sizeof(struct vbt_header)
 	/* child device */
 	num_child = 4; /* each port has one child */
+	v->general_definitions.child_dev_size =
+		sizeof(struct efp_child_device_config);
 	v->general_definitions_header.id = BDB_GENERAL_DEFINITIONS;
 	/* size will include child devices */
 	v->general_definitions_header.size =
-		sizeof(struct bdb_general_definitions) + num_child * DEV_SIZE;
+		sizeof(struct bdb_general_definitions) +
-	v->general_definitions.child_dev_size = DEV_SIZE;
+			num_child * v->general_definitions.child_dev_size;
 	/* portA */
 	v->child0.handle = DEVICE_TYPE_EFP1;

drivers/gpu/drm/i915/gvt/sched_policy.c+30−7

@@ -47,11 +47,15 @@ static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu) · 46 unmodified lines
47	return false;	47	return false;
48	}	48	}
49		49
		50	/* We give 2 seconds higher prio for vGPU during start */
		51	#define GVT_SCHED_VGPU_PRI_TIME 2
		52
50	struct vgpu_sched_data {	53	struct vgpu_sched_data {
51	struct list_head lru_list;	54	struct list_head lru_list;
52	struct intel_vgpu *vgpu;	55	struct intel_vgpu *vgpu;
53	bool active;	56	bool active;
54		57	bool pri_sched;
		58	ktime_t pri_time;
55	ktime_t sched_in_time;	59	ktime_t sched_in_time;
56	ktime_t sched_time;	60	ktime_t sched_time;
57	ktime_t left_ts;	61	ktime_t left_ts;
@@ -183,6 +187,14 @@ static struct intel_vgpu find_busy_vgpu(struct gvt_sched_data sched_data) · 125 unmodified lines
183	if (!vgpu_has_pending_workload(vgpu_data->vgpu))	187	if (!vgpu_has_pending_workload(vgpu_data->vgpu))
184	continue;	188	continue;
185		189
		190	if (vgpu_data->pri_sched) {
		191	if (ktime_before(ktime_get(), vgpu_data->pri_time)) {
		192	vgpu = vgpu_data->vgpu;
		193	break;
		194	} else
		195	vgpu_data->pri_sched = false;
		196	}
		197
186	/* Return the vGPU only if it has time slice left */	198	/* Return the vGPU only if it has time slice left */
187	if (vgpu_data->left_ts > 0) {	199	if (vgpu_data->left_ts > 0) {
188	vgpu = vgpu_data->vgpu;	200	vgpu = vgpu_data->vgpu;
@@ -202,6 +214,7 @@ static void tbs_sched_func(struct gvt_sched_data *sched_data) · 13 unmodified lines
202	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;	214	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
203	struct vgpu_sched_data *vgpu_data;	215	struct vgpu_sched_data *vgpu_data;
204	struct intel_vgpu *vgpu = NULL;	216	struct intel_vgpu *vgpu = NULL;
		217
205	/* no active vgpu or has already had a target */	218	/* no active vgpu or has already had a target */
206	if (list_empty(&sched_data->lru_runq_head) \|\| scheduler->next_vgpu)	219	if (list_empty(&sched_data->lru_runq_head) \|\| scheduler->next_vgpu)
207	goto out;	220	goto out;
@@ -209,12 +222,13 @@ static void tbs_sched_func(struct gvt_sched_data *sched_data) · 1 unmodified line
209	vgpu = find_busy_vgpu(sched_data);	222	vgpu = find_busy_vgpu(sched_data);
210	if (vgpu) {	223	if (vgpu) {
211	scheduler->next_vgpu = vgpu;	224	scheduler->next_vgpu = vgpu;
212
213	/* Move the last used vGPU to the tail of lru_list */
214	vgpu_data = vgpu->sched_data;	225	vgpu_data = vgpu->sched_data;
215	list_del_init(&vgpu_data->lru_list);	226	if (!vgpu_data->pri_sched) {
216	list_add_tail(&vgpu_data->lru_list,	227	/* Move the last used vGPU to the tail of lru_list */
217	&sched_data->lru_runq_head);	228	list_del_init(&vgpu_data->lru_list);
		229	list_add_tail(&vgpu_data->lru_list,
		230	&sched_data->lru_runq_head);
		231	}
218	} else {	232	} else {
219	scheduler->next_vgpu = gvt->idle_vgpu;	233	scheduler->next_vgpu = gvt->idle_vgpu;
220	}	234	}
@@ -328,11 +342,17 @@ static void tbs_sched_start_schedule(struct intel_vgpu *vgpu) · 107 unmodified lines
328	{	342	{
329	struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;	343	struct gvt_sched_data *sched_data = vgpu->gvt->scheduler.sched_data;
330	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;	344	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
		345	ktime_t now;
331		346
332	if (!list_empty(&vgpu_data->lru_list))	347	if (!list_empty(&vgpu_data->lru_list))
333	return;	348	return;
334		349
335	list_add_tail(&vgpu_data->lru_list, &sched_data->lru_runq_head);	350	now = ktime_get();
		351	vgpu_data->pri_time = ktime_add(now,
		352	ktime_set(GVT_SCHED_VGPU_PRI_TIME, 0));
		353	vgpu_data->pri_sched = true;
		354
		355	list_add(&vgpu_data->lru_list, &sched_data->lru_runq_head);
336		356
337	if (!hrtimer_active(&sched_data->timer))	357	if (!hrtimer_active(&sched_data->timer))
338	hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),	358	hrtimer_start(&sched_data->timer, ktime_add_ns(ktime_get(),
@@ -426,6 +446,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) · 87 unmodified lines
426	&vgpu->gvt->scheduler;	446	&vgpu->gvt->scheduler;
427	int ring_id;	447	int ring_id;
428	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;	448	struct vgpu_sched_data *vgpu_data = vgpu->sched_data;
		449	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
429		450
430	if (!vgpu_data->active)	451	if (!vgpu_data->active)
431	return;	452	return;
@@ -444,6 +465,7 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) · 12 unmodified lines
444	scheduler->current_vgpu = NULL;	465	scheduler->current_vgpu = NULL;
445	}	466	}
446		467
		468	intel_runtime_pm_get(dev_priv);
447	spin_lock_bh(&scheduler->mmio_context_lock);	469	spin_lock_bh(&scheduler->mmio_context_lock);
448	for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {	470	for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
449	if (scheduler->engine_owner[ring_id] == vgpu) {	471	if (scheduler->engine_owner[ring_id] == vgpu) {
@@ -452,5 +474,6 @@ void intel_vgpu_stop_schedule(struct intel_vgpu *vgpu) · 2 unmodified lines
452	}	474	}
453	}	475	}
454	spin_unlock_bh(&scheduler->mmio_context_lock);	476	spin_unlock_bh(&scheduler->mmio_context_lock);
		477	intel_runtime_pm_put(dev_priv);
455	mutex_unlock(&vgpu->gvt->sched_lock);	478	mutex_unlock(&vgpu->gvt->sched_lock);
456	}	479	}

drivers/gpu/drm/i915/gvt/vgpu.c+1−0

@@ -281,6 +281,7 @@ void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu) · 280 unmodified lines
281	intel_vgpu_clean_submission(vgpu);	281	intel_vgpu_clean_submission(vgpu);
282	intel_vgpu_clean_display(vgpu);	282	intel_vgpu_clean_display(vgpu);
283	intel_vgpu_clean_opregion(vgpu);	283	intel_vgpu_clean_opregion(vgpu);
		284	intel_vgpu_reset_ggtt(vgpu, true);
284	intel_vgpu_clean_gtt(vgpu);	285	intel_vgpu_clean_gtt(vgpu);
285	intel_gvt_hypervisor_detach_vgpu(vgpu);	286	intel_gvt_hypervisor_detach_vgpu(vgpu);
286	intel_vgpu_free_resource(vgpu);	287	intel_vgpu_free_resource(vgpu);

drivers/gpu/drm/i915/i915_reg.h+2−2

drivers/gpu/drm/i915/intel_ddi.c+9−8

@@ -2708,7 +2708,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, · 2707 unmodified lines
2708	if (port != PORT_A \|\| INTEL_GEN(dev_priv) >= 9)	2708	if (port != PORT_A \|\| INTEL_GEN(dev_priv) >= 9)
2709	intel_dp_stop_link_train(intel_dp);	2709	intel_dp_stop_link_train(intel_dp);
2710		2710
2711	intel_ddi_enable_pipe_clock(crtc_state);	2711	if (!is_mst)
		2712	intel_ddi_enable_pipe_clock(crtc_state);
2712	}	2713	}
2713		2714
2714	static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,	2715	static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
@@ -2810,14 +2811,14 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder, · 95 unmodified lines
2810	bool is_mst = intel_crtc_has_type(old_crtc_state,	2811	bool is_mst = intel_crtc_has_type(old_crtc_state,
2811	INTEL_OUTPUT_DP_MST);	2812	INTEL_OUTPUT_DP_MST);
2812		2813
2813	intel_ddi_disable_pipe_clock(old_crtc_state);	2814	if (!is_mst) {
2814		2815	intel_ddi_disable_pipe_clock(old_crtc_state);
2815	/*	2816	/*
2816	* Power down sink before disabling the port, otherwise we end	2817	* Power down sink before disabling the port, otherwise we end
2817	* up getting interrupts from the sink on detecting link loss.	2818	* up getting interrupts from the sink on detecting link loss.
2818	*/	2819	*/
2819	if (!is_mst)
2820	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);	2820	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
		2821	}
2821		2822
2822	intel_disable_ddi_buf(encoder);	2823	intel_disable_ddi_buf(encoder);
2823		2824

drivers/gpu/drm/i915/intel_display.c+6−2

 		mutex_lock(&dev_priv->pcu_lock);
 		WARN_ON(sandybridge_pcode_write(dev_priv, DISPLAY_IPS_CONTROL, 0));
 		mutex_unlock(&dev_priv->pcu_lock);
-		/* wait for pcode to finish disabling IPS, which may take up to 42ms */
+		/*
+		 * Wait for PCODE to finish disabling IPS. The BSpec specified
+		 * 42ms timeout value leads to occasional timeouts so use 100ms
+		 * instead.
+		 */
 		if (intel_wait_for_register(dev_priv,
 					    IPS_CTL, IPS_ENABLE, 0,
-					    42))
+					    100))
 			DRM_ERROR("Timed out waiting for IPS disable\n");
 	} else {
 		I915_WRITE(IPS_CTL, 0);

drivers/gpu/drm/i915/intel_dp.c+19−14

 	return !drm_dp_channel_eq_ok(link_status, intel_dp->lane_count);
 }
-/*
- * If display is now connected check links status,
- * there has been known issues of link loss triggering
- * long pulse.
- *
- * Some sinks (eg. ASUS PB287Q) seem to perform some
- * weird HPD ping pong during modesets. So we can apparently
- * end up with HPD going low during a modeset, and then
- * going back up soon after. And once that happens we must
- * retrain the link to get a picture. That's in case no
- * userspace component reacted to intermittent HPD dip.
- */
 int intel_dp_retrain_link(struct intel_encoder *encoder,
 			  struct drm_modeset_acquire_ctx *ctx)
 {
 }
 static int
-intel_dp_long_pulse(struct intel_connector *connector)
+intel_dp_long_pulse(struct intel_connector *connector,
+		    struct drm_modeset_acquire_ctx *ctx)
 {
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_dp *intel_dp = intel_attached_dp(&connector->base);
 		 */
 		status = connector_status_disconnected;
 		goto out;
+	} else {
+		/*
+		 * If display is now connected check links status,
+		 * there has been known issues of link loss triggering
+		 * long pulse.
+		 *
+		 * Some sinks (eg. ASUS PB287Q) seem to perform some
+		 * weird HPD ping pong during modesets. So we can apparently
+		 * end up with HPD going low during a modeset, and then
+		 * going back up soon after. And once that happens we must
+		 * retrain the link to get a picture. That's in case no
+		 * userspace component reacted to intermittent HPD dip.
+		 */
+		struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+		intel_dp_retrain_link(encoder, ctx);
 	}
 	/*
 				return ret;
 		}
-		status = intel_dp_long_pulse(intel_dp->attached_connector);
+		status = intel_dp_long_pulse(intel_dp->attached_connector, ctx);
 	}
 	intel_dp->detect_done = false;

drivers/gpu/drm/i915/intel_dp_mst.c+4−0

 	struct intel_connector *connector =
 		to_intel_connector(old_conn_state->connector);
+	intel_ddi_disable_pipe_clock(old_crtc_state);
 	/* this can fail */
 	drm_dp_check_act_status(&intel_dp->mst_mgr);
 	/* and this can also fail */
 	I915_WRITE(DP_TP_STATUS(port), temp);
 	ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
+	intel_ddi_enable_pipe_clock(pipe_config);
 }
 static void intel_mst_enable_dp(struct intel_encoder *encoder,

drivers/gpu/drm/i915/intel_overlay.c+75−153

@@ -181,8 +181,9 @@ struct intel_overlay { · 180 unmodified lines
181	u32 brightness, contrast, saturation;	181	u32 brightness, contrast, saturation;
182	u32 old_xscale, old_yscale;	182	u32 old_xscale, old_yscale;
183	/* register access */	183	/* register access */
184	u32 flip_addr;
185	struct drm_i915_gem_object *reg_bo;	184	struct drm_i915_gem_object *reg_bo;
		185	struct overlay_registers __iomem *regs;
		186	u32 flip_addr;
186	/* flip handling */	187	/* flip handling */
187	struct i915_gem_active last_flip;	188	struct i915_gem_active last_flip;
188	};	189	};
@@ -210,29 +211,6 @@ static void i830_overlay_clock_gating(struct drm_i915_private *dev_priv, · 21 unmodified lines
210	PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);	211	PCI_DEVFN(0, 0), I830_CLOCK_GATE, val);
211	}	212	}
212		213
213	static struct overlay_registers __iomem *
214	intel_overlay_map_regs(struct intel_overlay *overlay)
215	{
216	struct drm_i915_private *dev_priv = overlay->i915;
217	struct overlay_registers __iomem *regs;
218
219	if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
220	regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr;
221	else
222	regs = io_mapping_map_wc(&dev_priv->ggtt.iomap,
223	overlay->flip_addr,
224	PAGE_SIZE);
225
226	return regs;
227	}
228
229	static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
230	struct overlay_registers __iomem *regs)
231	{
232	if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
233	io_mapping_unmap(regs);
234	}
235
236	static void intel_overlay_submit_request(struct intel_overlay *overlay,	214	static void intel_overlay_submit_request(struct intel_overlay *overlay,
237	struct i915_request *rq,	215	struct i915_request *rq,
238	i915_gem_retire_fn retire)	216	i915_gem_retire_fn retire)
@@ -784,13 +762,13 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, · 545 unmodified lines
784	struct drm_i915_gem_object *new_bo,	762	struct drm_i915_gem_object *new_bo,
785	struct put_image_params *params)	763	struct put_image_params *params)
786	{	764	{
787	int ret, tmp_width;	765	struct overlay_registers __iomem *regs = overlay->regs;
788	struct overlay_registers __iomem *regs;
789	bool scale_changed = false;
790	struct drm_i915_private *dev_priv = overlay->i915;	766	struct drm_i915_private *dev_priv = overlay->i915;
791	u32 swidth, swidthsw, sheight, ostride;	767	u32 swidth, swidthsw, sheight, ostride;
792	enum pipe pipe = overlay->crtc->pipe;	768	enum pipe pipe = overlay->crtc->pipe;
		769	bool scale_changed = false;
793	struct i915_vma *vma;	770	struct i915_vma *vma;
		771	int ret, tmp_width;
794		772
795	lockdep_assert_held(&dev_priv->drm.struct_mutex);	773	lockdep_assert_held(&dev_priv->drm.struct_mutex);
796	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));	774	WARN_ON(!drm_modeset_is_locked(&dev_priv->drm.mode_config.connection_mutex));
@@ -815,30 +793,19 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, · 18 unmodified lines
815		793
816	if (!overlay->active) {	794	if (!overlay->active) {
817	u32 oconfig;	795	u32 oconfig;
818	regs = intel_overlay_map_regs(overlay);	796
819	if (!regs) {
820	ret = -ENOMEM;
821	goto out_unpin;
822	}
823	oconfig = OCONF_CC_OUT_8BIT;	797	oconfig = OCONF_CC_OUT_8BIT;
824	if (IS_GEN4(dev_priv))	798	if (IS_GEN4(dev_priv))
825	oconfig \|= OCONF_CSC_MODE_BT709;	799	oconfig \|= OCONF_CSC_MODE_BT709;
826	oconfig \|= pipe == 0 ?	800	oconfig \|= pipe == 0 ?
827	OCONF_PIPE_A : OCONF_PIPE_B;	801	OCONF_PIPE_A : OCONF_PIPE_B;
828	iowrite32(oconfig, &regs->OCONFIG);	802	iowrite32(oconfig, &regs->OCONFIG);
829	intel_overlay_unmap_regs(overlay, regs);
830		803
831	ret = intel_overlay_on(overlay);	804	ret = intel_overlay_on(overlay);
832	if (ret != 0)	805	if (ret != 0)
833	goto out_unpin;	806	goto out_unpin;
834	}	807	}
835		808
836	regs = intel_overlay_map_regs(overlay);
837	if (!regs) {
838	ret = -ENOMEM;
839	goto out_unpin;
840	}
841
842	iowrite32((params->dst_y << 16) \| params->dst_x, &regs->DWINPOS);	809	iowrite32((params->dst_y << 16) \| params->dst_x, &regs->DWINPOS);
843	iowrite32((params->dst_h << 16) \| params->dst_w, &regs->DWINSZ);	810	iowrite32((params->dst_h << 16) \| params->dst_w, &regs->DWINSZ);
844		811
@@ -882,8 +849,6 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, · 37 unmodified lines
882		849
883	iowrite32(overlay_cmd_reg(params), &regs->OCMD);	850	iowrite32(overlay_cmd_reg(params), &regs->OCMD);
884		851
885	intel_overlay_unmap_regs(overlay, regs);
886
887	ret = intel_overlay_continue(overlay, vma, scale_changed);	852	ret = intel_overlay_continue(overlay, vma, scale_changed);
888	if (ret)	853	if (ret)
889	goto out_unpin;	854	goto out_unpin;
@@ -901,7 +866,6 @@ out_pin_section: · 11 unmodified lines
901	int intel_overlay_switch_off(struct intel_overlay *overlay)	866	int intel_overlay_switch_off(struct intel_overlay *overlay)
902	{	867	{
903	struct drm_i915_private *dev_priv = overlay->i915;	868	struct drm_i915_private *dev_priv = overlay->i915;
904	struct overlay_registers __iomem *regs;
905	int ret;	869	int ret;
906		870
907	lockdep_assert_held(&dev_priv->drm.struct_mutex);	871	lockdep_assert_held(&dev_priv->drm.struct_mutex);
@@ -918,9 +882,7 @@ int intel_overlay_switch_off(struct intel_overlay *overlay) · 10 unmodified lines
918	if (ret != 0)	882	if (ret != 0)
919	return ret;	883	return ret;
920		884
921	regs = intel_overlay_map_regs(overlay);	885	iowrite32(0, &overlay->regs->OCMD);
922	iowrite32(0, &regs->OCMD);
923	intel_overlay_unmap_regs(overlay, regs);
924		886
925	return intel_overlay_off(overlay);	887	return intel_overlay_off(overlay);
926	}	888	}
@@ -1305,7 +1267,6 @@ int intel_overlay_attrs_ioctl(struct drm_device dev, void data, · 378 unmodified lines
1305	struct drm_intel_overlay_attrs *attrs = data;	1267	struct drm_intel_overlay_attrs *attrs = data;
1306	struct drm_i915_private *dev_priv = to_i915(dev);	1268	struct drm_i915_private *dev_priv = to_i915(dev);
1307	struct intel_overlay *overlay;	1269	struct intel_overlay *overlay;
1308	struct overlay_registers __iomem *regs;
1309	int ret;	1270	int ret;
1310		1271
1311	overlay = dev_priv->overlay;	1272	overlay = dev_priv->overlay;
@@ -1345,15 +1306,7 @@ int intel_overlay_attrs_ioctl(struct drm_device dev, void data, · 33 unmodified lines
1345	overlay->contrast = attrs->contrast;	1306	overlay->contrast = attrs->contrast;
1346	overlay->saturation = attrs->saturation;	1307	overlay->saturation = attrs->saturation;
1347		1308
1348	regs = intel_overlay_map_regs(overlay);	1309	update_reg_attrs(overlay, overlay->regs);
1349	if (!regs) {
1350	ret = -ENOMEM;
1351	goto out_unlock;
1352	}
1353
1354	update_reg_attrs(overlay, regs);
1355
1356	intel_overlay_unmap_regs(overlay, regs);
1357		1310
1358	if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {	1311	if (attrs->flags & I915_OVERLAY_UPDATE_GAMMA) {
1359	if (IS_GEN2(dev_priv))	1312	if (IS_GEN2(dev_priv))
@@ -1386,12 +1339,47 @@ out_unlock: · 26 unmodified lines
1386	return ret;	1339	return ret;
1387	}	1340	}
1388		1341
		1342	static int get_registers(struct intel_overlay *overlay, bool use_phys)
		1343	{
		1344	struct drm_i915_gem_object *obj;
		1345	struct i915_vma *vma;
		1346	int err;
		1347
		1348	obj = i915_gem_object_create_stolen(overlay->i915, PAGE_SIZE);
		1349	if (obj == NULL)
		1350	obj = i915_gem_object_create_internal(overlay->i915, PAGE_SIZE);
		1351	if (IS_ERR(obj))
		1352	return PTR_ERR(obj);
		1353
		1354	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
		1355	if (IS_ERR(vma)) {
		1356	err = PTR_ERR(vma);
		1357	goto err_put_bo;
		1358	}
		1359
		1360	if (use_phys)
		1361	overlay->flip_addr = sg_dma_address(obj->mm.pages->sgl);
		1362	else
		1363	overlay->flip_addr = i915_ggtt_offset(vma);
		1364	overlay->regs = i915_vma_pin_iomap(vma);
		1365	i915_vma_unpin(vma);
		1366
		1367	if (IS_ERR(overlay->regs)) {
		1368	err = PTR_ERR(overlay->regs);
		1369	goto err_put_bo;
		1370	}
		1371
		1372	overlay->reg_bo = obj;
		1373	return 0;
		1374
		1375	err_put_bo:
		1376	i915_gem_object_put(obj);
		1377	return err;
		1378	}
		1379
1389	void intel_setup_overlay(struct drm_i915_private *dev_priv)	1380	void intel_setup_overlay(struct drm_i915_private *dev_priv)
1390	{	1381	{
1391	struct intel_overlay *overlay;	1382	struct intel_overlay *overlay;
1392	struct drm_i915_gem_object *reg_bo;
1393	struct overlay_registers __iomem *regs;
1394	struct i915_vma *vma = NULL;
1395	int ret;	1383	int ret;
1396		1384
1397	if (!HAS_OVERLAY(dev_priv))	1385	if (!HAS_OVERLAY(dev_priv))
@@ -1401,46 +1389,8 @@ void intel_setup_overlay(struct drm_i915_private *dev_priv) · 3 unmodified lines
1401	if (!overlay)	1389	if (!overlay)
1402	return;	1390	return;
1403		1391
1404	mutex_lock(&dev_priv->drm.struct_mutex);
1405	if (WARN_ON(dev_priv->overlay))
1406	goto out_free;
1407
1408	overlay->i915 = dev_priv;	1392	overlay->i915 = dev_priv;
1409		1393
1410	reg_bo = NULL;
1411	if (!OVERLAY_NEEDS_PHYSICAL(dev_priv))
1412	reg_bo = i915_gem_object_create_stolen(dev_priv, PAGE_SIZE);
1413	if (reg_bo == NULL)
1414	reg_bo = i915_gem_object_create(dev_priv, PAGE_SIZE);
1415	if (IS_ERR(reg_bo))
1416	goto out_free;
1417	overlay->reg_bo = reg_bo;
1418
1419	if (OVERLAY_NEEDS_PHYSICAL(dev_priv)) {
1420	ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE);
1421	if (ret) {
1422	DRM_ERROR("failed to attach phys overlay regs\n");
1423	goto out_free_bo;
1424	}
1425	overlay->flip_addr = reg_bo->phys_handle->busaddr;
1426	} else {
1427	vma = i915_gem_object_ggtt_pin(reg_bo, NULL,
1428	0, PAGE_SIZE, PIN_MAPPABLE);
1429	if (IS_ERR(vma)) {
1430	DRM_ERROR("failed to pin overlay register bo\n");
1431	ret = PTR_ERR(vma);
1432	goto out_free_bo;
1433	}
1434	overlay->flip_addr = i915_ggtt_offset(vma);
1435
1436	ret = i915_gem_object_set_to_gtt_domain(reg_bo, true);
1437	if (ret) {
1438	DRM_ERROR("failed to move overlay register bo into the GTT\n");
1439	goto out_unpin_bo;
1440	}
1441	}
1442
1443	/* init all values */
1444	overlay->color_key = 0x0101fe;	1394	overlay->color_key = 0x0101fe;
1445	overlay->color_key_enabled = true;	1395	overlay->color_key_enabled = true;
1446	overlay->brightness = -19;	1396	overlay->brightness = -19;
@@ -1449,44 +1399,51 @@ void intel_setup_overlay(struct drm_i915_private *dev_priv) · 2 unmodified lines
1449		1399
1450	init_request_active(&overlay->last_flip, NULL);	1400	init_request_active(&overlay->last_flip, NULL);
1451		1401
1452	regs = intel_overlay_map_regs(overlay);	1402	mutex_lock(&dev_priv->drm.struct_mutex);
1453	if (!regs)	1403
1454	goto out_unpin_bo;	1404	ret = get_registers(overlay, OVERLAY_NEEDS_PHYSICAL(dev_priv));
		1405	if (ret)
		1406	goto out_free;
		1407
		1408	ret = i915_gem_object_set_to_gtt_domain(overlay->reg_bo, true);
		1409	if (ret)
		1410	goto out_reg_bo;
1455		1411
1456	memset_io(regs, 0, sizeof(struct overlay_registers));	1412	mutex_unlock(&dev_priv->drm.struct_mutex);
1457	update_polyphase_filter(regs);
1458	update_reg_attrs(overlay, regs);
1459		1413
1460	intel_overlay_unmap_regs(overlay, regs);	1414	memset_io(overlay->regs, 0, sizeof(struct overlay_registers));
		1415	update_polyphase_filter(overlay->regs);
		1416	update_reg_attrs(overlay, overlay->regs);
1461		1417
1462	dev_priv->overlay = overlay;	1418	dev_priv->overlay = overlay;
1463	mutex_unlock(&dev_priv->drm.struct_mutex);	1419	DRM_INFO("Initialized overlay support.\n");
1464	DRM_INFO("initialized overlay support\n");
1465	return;	1420	return;
1466		1421
1467	out_unpin_bo:	1422	out_reg_bo:
1468	if (vma)	1423	i915_gem_object_put(overlay->reg_bo);
1469	i915_vma_unpin(vma);
1470	out_free_bo:
1471	i915_gem_object_put(reg_bo);
1472	out_free:	1424	out_free:
1473	mutex_unlock(&dev_priv->drm.struct_mutex);	1425	mutex_unlock(&dev_priv->drm.struct_mutex);
1474	kfree(overlay);	1426	kfree(overlay);
1475	return;
1476	}	1427	}
1477		1428
1478	void intel_cleanup_overlay(struct drm_i915_private *dev_priv)	1429	void intel_cleanup_overlay(struct drm_i915_private *dev_priv)
1479	{	1430	{
1480	if (!dev_priv->overlay)	1431	struct intel_overlay *overlay;
		1432
		1433	overlay = fetch_and_zero(&dev_priv->overlay);
		1434	if (!overlay)
1481	return;	1435	return;
1482		1436
1483	/* The bo's should be free'd by the generic code already.	1437	/*
		1438	* The bo's should be free'd by the generic code already.
1484	* Furthermore modesetting teardown happens beforehand so the	1439	* Furthermore modesetting teardown happens beforehand so the
1485	* hardware should be off already */	1440	* hardware should be off already.
1486	WARN_ON(dev_priv->overlay->active);	1441	*/
		1442	WARN_ON(overlay->active);
		1443
		1444	i915_gem_object_put(overlay->reg_bo);
1487		1445
1488	i915_gem_object_put(dev_priv->overlay->reg_bo);	1446	kfree(overlay);
1489	kfree(dev_priv->overlay);
1490	}	1447	}
1491		1448
1492	#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)	1449	#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
@@ -1498,37 +1455,11 @@ struct intel_overlay_error_state { · 5 unmodified lines
1498	u32 isr;	1455	u32 isr;
1499	};	1456	};
1500		1457
1501	static struct overlay_registers __iomem *
1502	intel_overlay_map_regs_atomic(struct intel_overlay *overlay)
1503	{
1504	struct drm_i915_private *dev_priv = overlay->i915;
1505	struct overlay_registers __iomem *regs;
1506
1507	if (OVERLAY_NEEDS_PHYSICAL(dev_priv))
1508	/* Cast to make sparse happy, but it's wc memory anyway, so
1509	* equivalent to the wc io mapping on X86. */
1510	regs = (struct overlay_registers __iomem *)
1511	overlay->reg_bo->phys_handle->vaddr;
1512	else
1513	regs = io_mapping_map_atomic_wc(&dev_priv->ggtt.iomap,
1514	overlay->flip_addr);
1515
1516	return regs;
1517	}
1518
1519	static void intel_overlay_unmap_regs_atomic(struct intel_overlay *overlay,
1520	struct overlay_registers __iomem *regs)
1521	{
1522	if (!OVERLAY_NEEDS_PHYSICAL(overlay->i915))
1523	io_mapping_unmap_atomic(regs);
1524	}
1525
1526	struct intel_overlay_error_state *	1458	struct intel_overlay_error_state *
1527	intel_overlay_capture_error_state(struct drm_i915_private *dev_priv)	1459	intel_overlay_capture_error_state(struct drm_i915_private *dev_priv)
1528	{	1460	{
1529	struct intel_overlay *overlay = dev_priv->overlay;	1461	struct intel_overlay *overlay = dev_priv->overlay;
1530	struct intel_overlay_error_state *error;	1462	struct intel_overlay_error_state *error;
1531	struct overlay_registers __iomem *regs;
1532		1463
1533	if (!overlay \|\| !overlay->active)	1464	if (!overlay \|\| !overlay->active)
1534	return NULL;	1465	return NULL;
@@ -1541,18 +1472,9 @@ intel_overlay_capture_error_state(struct drm_i915_private *dev_priv) · 6 unmodified lines
1541	error->isr = I915_READ(ISR);	1472	error->isr = I915_READ(ISR);
1542	error->base = overlay->flip_addr;	1473	error->base = overlay->flip_addr;
1543		1474
1544	regs = intel_overlay_map_regs_atomic(overlay);	1475	memcpy_fromio(&error->regs, overlay->regs, sizeof(error->regs));
1545	if (!regs)
1546	goto err;
1547
1548	memcpy_fromio(&error->regs, regs, sizeof(struct overlay_registers));
1549	intel_overlay_unmap_regs_atomic(overlay, regs);
1550		1476
1551	return error;	1477	return error;
1552
1553	err:
1554	kfree(error);
1555	return NULL;
1556	}	1478	}
1557		1479
1558	void	1480	void

drivers/gpu/drm/nouveau/dispnv50/disp.c+49−18

@@ -1123,17 +1123,21 @@ nv50_mstm_enable(struct nv50_mstm *mstm, u8 dpcd, int state) · 1122 unmodified lines
1123	int ret;	1123	int ret;
1124		1124
1125	if (dpcd >= 0x12) {	1125	if (dpcd >= 0x12) {
1126	ret = drm_dp_dpcd_readb(mstm->mgr.aux, DP_MSTM_CTRL, &dpcd);	1126	/* Even if we're enabling MST, start with disabling the
		1127	* branching unit to clear any sink-side MST topology state
		1128	* that wasn't set by us
		1129	*/
		1130	ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, 0);
1127	if (ret < 0)	1131	if (ret < 0)
1128	return ret;	1132	return ret;
1129		1133
1130	dpcd &= ~DP_MST_EN;	1134	if (state) {
1131	if (state)	1135	/* Now, start initializing */
1132	dpcd \|= DP_MST_EN;	1136	ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL,
1133		1137	DP_MST_EN);
1134	ret = drm_dp_dpcd_writeb(mstm->mgr.aux, DP_MSTM_CTRL, dpcd);	1138	if (ret < 0)
1135	if (ret < 0)	1139	return ret;
1136	return ret;	1140	}
1137	}	1141	}
1138		1142
1139	return nvif_mthd(disp, 0, &args, sizeof(args));	1143	return nvif_mthd(disp, 0, &args, sizeof(args));
@@ -1142,31 +1146,58 @@ nv50_mstm_enable(struct nv50_mstm *mstm, u8 dpcd, int state) · 2 unmodified lines
1142	int	1146	int
1143	nv50_mstm_detect(struct nv50_mstm *mstm, u8 dpcd[8], int allow)	1147	nv50_mstm_detect(struct nv50_mstm *mstm, u8 dpcd[8], int allow)
1144	{	1148	{
1145	int ret, state = 0;	1149	struct drm_dp_aux *aux;
		1150	int ret;
		1151	bool old_state, new_state;
		1152	u8 mstm_ctrl;
1146		1153
1147	if (!mstm)	1154	if (!mstm)
1148	return 0;	1155	return 0;
1149		1156
1150	if (dpcd[0] >= 0x12) {	1157	mutex_lock(&mstm->mgr.lock);
1151	ret = drm_dp_dpcd_readb(mstm->mgr.aux, DP_MSTM_CAP, &dpcd[1]);	1158
		1159	old_state = mstm->mgr.mst_state;
		1160	new_state = old_state;
		1161	aux = mstm->mgr.aux;
		1162
		1163	if (old_state) {
		1164	/* Just check that the MST hub is still as we expect it */
		1165	ret = drm_dp_dpcd_readb(aux, DP_MSTM_CTRL, &mstm_ctrl);
		1166	if (ret < 0 \|\| !(mstm_ctrl & DP_MST_EN)) {
		1167	DRM_DEBUG_KMS("Hub gone, disabling MST topology\n");
		1168	new_state = false;
		1169	}
		1170	} else if (dpcd[0] >= 0x12) {
		1171	ret = drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &dpcd[1]);
1152	if (ret < 0)	1172	if (ret < 0)
1153	return ret;	1173	goto probe_error;
1154		1174
1155	if (!(dpcd[1] & DP_MST_CAP))	1175	if (!(dpcd[1] & DP_MST_CAP))
1156	dpcd[0] = 0x11;	1176	dpcd[0] = 0x11;
1157	else	1177	else
1158	state = allow;	1178	new_state = allow;
		1179	}
		1180
		1181	if (new_state == old_state) {
		1182	mutex_unlock(&mstm->mgr.lock);
		1183	return new_state;
1159	}	1184	}
1160		1185
1161	ret = nv50_mstm_enable(mstm, dpcd[0], state);	1186	ret = nv50_mstm_enable(mstm, dpcd[0], new_state);
1162	if (ret)	1187	if (ret)
1163	return ret;	1188	goto probe_error;
		1189
		1190	mutex_unlock(&mstm->mgr.lock);
1164		1191
1165	ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, state);	1192	ret = drm_dp_mst_topology_mgr_set_mst(&mstm->mgr, new_state);
1166	if (ret)	1193	if (ret)
1167	return nv50_mstm_enable(mstm, dpcd[0], 0);	1194	return nv50_mstm_enable(mstm, dpcd[0], 0);
1168		1195
1169	return mstm->mgr.mst_state;	1196	return new_state;
		1197
		1198	probe_error:
		1199	mutex_unlock(&mstm->mgr.lock);
		1200	return ret;
1170	}	1201	}
1171		1202
1172	static void	1203	static void
@@ -2074,7 +2105,7 @@ nv50_disp_atomic_state_alloc(struct drm_device *dev) · 901 unmodified lines
2074	static const struct drm_mode_config_funcs	2105	static const struct drm_mode_config_funcs
2075	nv50_disp_func = {	2106	nv50_disp_func = {
2076	.fb_create = nouveau_user_framebuffer_create,	2107	.fb_create = nouveau_user_framebuffer_create,
2077	.output_poll_changed = drm_fb_helper_output_poll_changed,	2108	.output_poll_changed = nouveau_fbcon_output_poll_changed,
2078	.atomic_check = nv50_disp_atomic_check,	2109	.atomic_check = nv50_disp_atomic_check,
2079	.atomic_commit = nv50_disp_atomic_commit,	2110	.atomic_commit = nv50_disp_atomic_commit,
2080	.atomic_state_alloc = nv50_disp_atomic_state_alloc,	2111	.atomic_state_alloc = nv50_disp_atomic_state_alloc,

drivers/gpu/drm/nouveau/nouveau_connector.c+60−50

@@ -409,59 +409,45 @@ static struct nouveau_encoder * · 408 unmodified lines
409	nouveau_connector_ddc_detect(struct drm_connector *connector)	409	nouveau_connector_ddc_detect(struct drm_connector *connector)
410	{	410	{
411	struct drm_device *dev = connector->dev;	411	struct drm_device *dev = connector->dev;
412	struct nouveau_connector *nv_connector = nouveau_connector(connector);	412	struct nouveau_encoder nv_encoder = NULL, found = NULL;
413	struct nouveau_drm *drm = nouveau_drm(dev);
414	struct nvkm_gpio *gpio = nvxx_gpio(&drm->client.device);
415	struct nouveau_encoder *nv_encoder = NULL;
416	struct drm_encoder *encoder;	413	struct drm_encoder *encoder;
417	int i, panel = -ENODEV;	414	int i, ret;
418		415	bool switcheroo_ddc = false;
419	/* eDP panels need powering on by us (if the VBIOS doesn't default it
420	* to on) before doing any AUX channel transactions. LVDS panel power
421	* is handled by the SOR itself, and not required for LVDS DDC.
422	*/
423	if (nv_connector->type == DCB_CONNECTOR_eDP) {
424	panel = nvkm_gpio_get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff);
425	if (panel == 0) {
426	nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
427	msleep(300);
428	}
429	}
430		416
431	drm_connector_for_each_possible_encoder(connector, encoder, i) {	417	drm_connector_for_each_possible_encoder(connector, encoder, i) {
432	nv_encoder = nouveau_encoder(encoder);	418	nv_encoder = nouveau_encoder(encoder);
433		419
434	if (nv_encoder->dcb->type == DCB_OUTPUT_DP) {	420	switch (nv_encoder->dcb->type) {
435	int ret = nouveau_dp_detect(nv_encoder);	421	case DCB_OUTPUT_DP:
		422	ret = nouveau_dp_detect(nv_encoder);
436	if (ret == NOUVEAU_DP_MST)	423	if (ret == NOUVEAU_DP_MST)
437	return NULL;	424	return NULL;
438	if (ret == NOUVEAU_DP_SST)	425	else if (ret == NOUVEAU_DP_SST)
439	break;	426	found = nv_encoder;
440	} else	427
441	if ((vga_switcheroo_handler_flags() &	428	break;
442	VGA_SWITCHEROO_CAN_SWITCH_DDC) &&	429	case DCB_OUTPUT_LVDS:
443	nv_encoder->dcb->type == DCB_OUTPUT_LVDS &&	430	switcheroo_ddc = !!(vga_switcheroo_handler_flags() &
444	nv_encoder->i2c) {	431	VGA_SWITCHEROO_CAN_SWITCH_DDC);
445	int ret;	432	/* fall-through */
446	vga_switcheroo_lock_ddc(dev->pdev);	433	default:
447	ret = nvkm_probe_i2c(nv_encoder->i2c, 0x50);	434	if (!nv_encoder->i2c)
448	vga_switcheroo_unlock_ddc(dev->pdev);
449	if (ret)
450	break;	435	break;
451	} else	436
452	if (nv_encoder->i2c) {	437	if (switcheroo_ddc)
		438	vga_switcheroo_lock_ddc(dev->pdev);
453	if (nvkm_probe_i2c(nv_encoder->i2c, 0x50))	439	if (nvkm_probe_i2c(nv_encoder->i2c, 0x50))
454	break;	440	found = nv_encoder;
		441	if (switcheroo_ddc)
		442	vga_switcheroo_unlock_ddc(dev->pdev);
		443
		444	break;
455	}	445	}
		446	if (found)
		447	break;
456	}	448	}
457		449
458	/* eDP panel not detected, restore panel power GPIO to previous	450	return found;
459	* state to avoid confusing the SOR for other output types.
460	*/
461	if (!nv_encoder && panel == 0)
462	nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, panel);
463
464	return nv_encoder;
465	}	451	}
466		452
467	static struct nouveau_encoder *	453	static struct nouveau_encoder *
@@ -555,12 +541,16 @@ nouveau_connector_detect(struct drm_connector *connector, bool force) · 87 unmodified lines
555	nv_connector->edid = NULL;	541	nv_connector->edid = NULL;
556	}	542	}
557		543
558	/* Outputs are only polled while runtime active, so acquiring a	544	/* Outputs are only polled while runtime active, so resuming the
559	* runtime PM ref here is unnecessary (and would deadlock upon	545	* device here is unnecessary (and would deadlock upon runtime suspend
560	* runtime suspend because it waits for polling to finish).	546	* because it waits for polling to finish). We do however, want to
		547	* prevent the autosuspend timer from elapsing during this operation
		548	* if possible.
561	*/	549	*/
562	if (!drm_kms_helper_is_poll_worker()) {	550	if (drm_kms_helper_is_poll_worker()) {
563	ret = pm_runtime_get_sync(connector->dev->dev);	551	pm_runtime_get_noresume(dev->dev);
		552	} else {
		553	ret = pm_runtime_get_sync(dev->dev);
564	if (ret < 0 && ret != -EACCES)	554	if (ret < 0 && ret != -EACCES)
565	return conn_status;	555	return conn_status;
566	}	556	}
@@ -638,10 +628,8 @@ detect_analog: · 71 unmodified lines
638		628
639	out:	629	out:
640		630
641	if (!drm_kms_helper_is_poll_worker()) {	631	pm_runtime_mark_last_busy(dev->dev);
642	pm_runtime_mark_last_busy(connector->dev->dev);	632	pm_runtime_put_autosuspend(dev->dev);
643	pm_runtime_put_autosuspend(connector->dev->dev);
644	}
645		633
646	return conn_status;	634	return conn_status;
647	}	635	}
@@ -1105,6 +1093,26 @@ nouveau_connector_hotplug(struct nvif_notify *notify) · 457 unmodified lines
1105	const struct nvif_notify_conn_rep_v0 *rep = notify->data;	1093	const struct nvif_notify_conn_rep_v0 *rep = notify->data;
1106	const char *name = connector->name;	1094	const char *name = connector->name;
1107	struct nouveau_encoder *nv_encoder;	1095	struct nouveau_encoder *nv_encoder;
		1096	int ret;
		1097
		1098	ret = pm_runtime_get(drm->dev->dev);
		1099	if (ret == 0) {
		1100	/* We can't block here if there's a pending PM request
		1101	* running, as we'll deadlock nouveau_display_fini() when it
		1102	* calls nvif_put() on our nvif_notify struct. So, simply
		1103	* defer the hotplug event until the device finishes resuming
		1104	*/
		1105	NV_DEBUG(drm, "Deferring HPD on %s until runtime resume\n",
		1106	name);
		1107	schedule_work(&drm->hpd_work);
		1108
		1109	pm_runtime_put_noidle(drm->dev->dev);
		1110	return NVIF_NOTIFY_KEEP;
		1111	} else if (ret != 1 && ret != -EACCES) {
		1112	NV_WARN(drm, "HPD on %s dropped due to RPM failure: %d\n",
		1113	name, ret);
		1114	return NVIF_NOTIFY_DROP;
		1115	}
1108		1116
1109	if (rep->mask & NVIF_NOTIFY_CONN_V0_IRQ) {	1117	if (rep->mask & NVIF_NOTIFY_CONN_V0_IRQ) {
1110	NV_DEBUG(drm, "service %s\n", name);	1118	NV_DEBUG(drm, "service %s\n", name);
@@ -1122,6 +1130,8 @@ nouveau_connector_hotplug(struct nvif_notify *notify) · 11 unmodified lines
1122	drm_helper_hpd_irq_event(connector->dev);	1130	drm_helper_hpd_irq_event(connector->dev);
1123	}	1131	}
1124		1132
		1133	pm_runtime_mark_last_busy(drm->dev->dev);
		1134	pm_runtime_put_autosuspend(drm->dev->dev);
1125	return NVIF_NOTIFY_KEEP;	1135	return NVIF_NOTIFY_KEEP;
1126	}	1136	}
1127		1137

drivers/gpu/drm/nouveau/nouveau_display.c+32−12

 static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
 	.fb_create = nouveau_user_framebuffer_create,
-	.output_poll_changed = drm_fb_helper_output_poll_changed,
+	.output_poll_changed = nouveau_fbcon_output_poll_changed,
 };
 	pm_runtime_get_sync(drm->dev->dev);
 	drm_helper_hpd_irq_event(drm->dev);
-	/* enable polling for external displays */
-	drm_kms_helper_poll_enable(drm->dev);
 	pm_runtime_mark_last_busy(drm->dev->dev);
 	pm_runtime_put_sync(drm->dev->dev);
 {
 	struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb);
 	struct acpi_bus_event *info = data;
+	int ret;
 	if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) {
 		if (info->type == ACPI_VIDEO_NOTIFY_PROBE) {
-			/*
+			ret = pm_runtime_get(drm->dev->dev);
-			 * This may be the only indication we receive of a
+			if (ret == 1 || ret == -EACCES) {
-			 * connector hotplug on a runtime suspended GPU,
+				/* If the GPU is already awake, or in a state
-			 * schedule hpd_work to check.
+				 * where we can't wake it up, it can handle
-			 */
+				 * it's own hotplug events.
-			schedule_work(&drm->hpd_work);
+				 */
+				pm_runtime_put_autosuspend(drm->dev->dev);
+			} else if (ret == 0) {
+				/* This may be the only indication we receive
+				 * of a connector hotplug on a runtime
+				 * suspended GPU, schedule hpd_work to check.
+				 */
+				NV_DEBUG(drm, "ACPI requested connector reprobe\n");
+				schedule_work(&drm->hpd_work);
+				pm_runtime_put_noidle(drm->dev->dev);
+			} else {
+				NV_WARN(drm, "Dropped ACPI reprobe event due to RPM error: %d\n",
+					ret);
+			}
 			/* acpi-video should not generate keypresses for this */
 			return NOTIFY_BAD;
 	if (ret)
 		return ret;
+	/* enable connector detection and polling for connectors without HPD
+	 * support
+	 */
+	drm_kms_helper_poll_enable(dev);
 	/* enable hotplug interrupts */
 	drm_connector_list_iter_begin(dev, &conn_iter);
 	nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
 }
 void
-nouveau_display_fini(struct drm_device *dev, bool suspend)
+nouveau_display_fini(struct drm_device *dev, bool suspend, bool runtime)
 {
 	struct nouveau_display *disp = nouveau_display(dev);
 	struct nouveau_drm *drm = nouveau_drm(dev);
 	}
 	drm_connector_list_iter_end(&conn_iter);
+	if (!runtime)
+		cancel_work_sync(&drm->hpd_work);
 	drm_kms_helper_poll_disable(dev);
 	disp->fini(dev);
 }
 			}
 		}
-		nouveau_display_fini(dev, true);
+		nouveau_display_fini(dev, true, runtime);
 		return 0;
 	}
-	nouveau_display_fini(dev, true);
+	nouveau_display_fini(dev, true, runtime);
 	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
 		struct nouveau_framebuffer *nouveau_fb;

drivers/gpu/drm/nouveau/nouveau_display.h+1−1

@@ -62,7 +62,7 @@ nouveau_display(struct drm_device *dev) · 61 unmodified lines
62	int nouveau_display_create(struct drm_device *dev);	62	int nouveau_display_create(struct drm_device *dev);
63	void nouveau_display_destroy(struct drm_device *dev);	63	void nouveau_display_destroy(struct drm_device *dev);
64	int nouveau_display_init(struct drm_device *dev);	64	int nouveau_display_init(struct drm_device *dev);
65	void nouveau_display_fini(struct drm_device *dev, bool suspend);	65	void nouveau_display_fini(struct drm_device *dev, bool suspend, bool runtime);
66	int nouveau_display_suspend(struct drm_device *dev, bool runtime);	66	int nouveau_display_suspend(struct drm_device *dev, bool runtime);
67	void nouveau_display_resume(struct drm_device *dev, bool runtime);	67	void nouveau_display_resume(struct drm_device *dev, bool runtime);
68	int nouveau_display_vblank_enable(struct drm_device *, unsigned int);	68	int nouveau_display_vblank_enable(struct drm_device *, unsigned int);

drivers/gpu/drm/nouveau/nouveau_drm.c+9−12

 		mutex_unlock(&drm->master.lock);
 	}
 	if (ret) {
-		NV_ERROR(drm, "Client allocation failed: %d\n", ret);
+		NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
 		goto done;
 	}
 			       }, sizeof(struct nv_device_v0),
 			       &cli->device);
 	if (ret) {
-		NV_ERROR(drm, "Device allocation failed: %d\n", ret);
+		NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
 		goto done;
 	}
 	ret = nvif_mclass(&cli->device.object, mmus);
 	if (ret < 0) {
-		NV_ERROR(drm, "No supported MMU class\n");
+		NV_PRINTK(err, cli, "No supported MMU class\n");
 		goto done;
 	}
 	ret = nvif_mmu_init(&cli->device.object, mmus[ret].oclass, &cli->mmu);
 	if (ret) {
-		NV_ERROR(drm, "MMU allocation failed: %d\n", ret);
+		NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
 		goto done;
 	}
 	ret = nvif_mclass(&cli->mmu.object, vmms);
 	if (ret < 0) {
-		NV_ERROR(drm, "No supported VMM class\n");
+		NV_PRINTK(err, cli, "No supported VMM class\n");
 		goto done;
 	}
 	ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
 	if (ret) {
-		NV_ERROR(drm, "VMM allocation failed: %d\n", ret);
+		NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
 		goto done;
 	}
 	ret = nvif_mclass(&cli->mmu.object, mems);
 	if (ret < 0) {
-		NV_ERROR(drm, "No supported MEM class\n");
+		NV_PRINTK(err, cli, "No supported MEM class\n");
 		goto done;
 	}
 		pm_runtime_allow(dev->dev);
 		pm_runtime_mark_last_busy(dev->dev);
 		pm_runtime_put(dev->dev);
-	} else {
-		/* enable polling for external displays */
-		drm_kms_helper_poll_enable(dev);
 	}
 	return 0;
 fail_dispinit:
 	nouveau_debugfs_fini(drm);
 	if (dev->mode_config.num_crtc)
-		nouveau_display_fini(dev, false);
+		nouveau_display_fini(dev, false, false);
 	nouveau_display_destroy(dev);
 	nouveau_bios_takedown(dev);
 		return -EBUSY;
 	}
-	drm_kms_helper_poll_disable(drm_dev);
 	nouveau_switcheroo_optimus_dsm();
 	ret = nouveau_do_suspend(drm_dev, true);
 	pci_save_state(pdev);

drivers/gpu/drm/nouveau/nouveau_fbcon.c+57−0

@@ -466,6 +466,7 @@ nouveau_fbcon_set_suspend_work(struct work_struct *work) · 465 unmodified lines
466	console_unlock();	466	console_unlock();
467		467
468	if (state == FBINFO_STATE_RUNNING) {	468	if (state == FBINFO_STATE_RUNNING) {
		469	nouveau_fbcon_hotplug_resume(drm->fbcon);
469	pm_runtime_mark_last_busy(drm->dev->dev);	470	pm_runtime_mark_last_busy(drm->dev->dev);
470	pm_runtime_put_sync(drm->dev->dev);	471	pm_runtime_put_sync(drm->dev->dev);
471	}	472	}
@@ -487,6 +488,61 @@ nouveau_fbcon_set_suspend(struct drm_device *dev, int state) · 15 unmodified lines
487	schedule_work(&drm->fbcon_work);	488	schedule_work(&drm->fbcon_work);
488	}	489	}
489		490
		491	void
		492	nouveau_fbcon_output_poll_changed(struct drm_device *dev)
		493	{
		494	struct nouveau_drm *drm = nouveau_drm(dev);
		495	struct nouveau_fbdev *fbcon = drm->fbcon;
		496	int ret;
		497
		498	if (!fbcon)
		499	return;
		500
		501	mutex_lock(&fbcon->hotplug_lock);
		502
		503	ret = pm_runtime_get(dev->dev);
		504	if (ret == 1 \|\| ret == -EACCES) {
		505	drm_fb_helper_hotplug_event(&fbcon->helper);
		506
		507	pm_runtime_mark_last_busy(dev->dev);
		508	pm_runtime_put_autosuspend(dev->dev);
		509	} else if (ret == 0) {
		510	/* If the GPU was already in the process of suspending before
		511	* this event happened, then we can't block here as we'll
		512	* deadlock the runtime pmops since they wait for us to
		513	* finish. So, just defer this event for when we runtime
		514	* resume again. It will be handled by fbcon_work.
		515	*/
		516	NV_DEBUG(drm, "fbcon HPD event deferred until runtime resume\n");
		517	fbcon->hotplug_waiting = true;
		518	pm_runtime_put_noidle(drm->dev->dev);
		519	} else {
		520	DRM_WARN("fbcon HPD event lost due to RPM failure: %d\n",
		521	ret);
		522	}
		523
		524	mutex_unlock(&fbcon->hotplug_lock);
		525	}
		526
		527	void
		528	nouveau_fbcon_hotplug_resume(struct nouveau_fbdev *fbcon)
		529	{
		530	struct nouveau_drm *drm;
		531
		532	if (!fbcon)
		533	return;
		534	drm = nouveau_drm(fbcon->helper.dev);
		535
		536	mutex_lock(&fbcon->hotplug_lock);
		537	if (fbcon->hotplug_waiting) {
		538	fbcon->hotplug_waiting = false;
		539
		540	NV_DEBUG(drm, "Handling deferred fbcon HPD events\n");
		541	drm_fb_helper_hotplug_event(&fbcon->helper);
		542	}
		543	mutex_unlock(&fbcon->hotplug_lock);
		544	}
		545
490	int	546	int
491	nouveau_fbcon_init(struct drm_device *dev)	547	nouveau_fbcon_init(struct drm_device *dev)
492	{	548	{
@@ -505,6 +561,7 @@ nouveau_fbcon_init(struct drm_device *dev) · 12 unmodified lines
505		561
506	drm->fbcon = fbcon;	562	drm->fbcon = fbcon;
507	INIT_WORK(&drm->fbcon_work, nouveau_fbcon_set_suspend_work);	563	INIT_WORK(&drm->fbcon_work, nouveau_fbcon_set_suspend_work);
		564	mutex_init(&fbcon->hotplug_lock);
508		565
509	drm_fb_helper_prepare(dev, &fbcon->helper, &nouveau_fbcon_helper_funcs);	566	drm_fb_helper_prepare(dev, &fbcon->helper, &nouveau_fbcon_helper_funcs);
510		567

drivers/gpu/drm/nouveau/nouveau_fbcon.h+5−0

 	struct nvif_object gdi;
 	struct nvif_object blit;
 	struct nvif_object twod;
+	struct mutex hotplug_lock;
+	bool hotplug_waiting;
 };
 void nouveau_fbcon_restore(void);
 void nouveau_fbcon_accel_save_disable(struct drm_device *dev);
 void nouveau_fbcon_accel_restore(struct drm_device *dev);
+void nouveau_fbcon_output_poll_changed(struct drm_device *dev);
+void nouveau_fbcon_hotplug_resume(struct nouveau_fbdev *fbcon);
 extern int nouveau_nofbaccel;
 #endif /* __NV50_FBCON_H__ */

drivers/gpu/drm/nouveau/nouveau_vga.c+0−2

 		pr_err("VGA switcheroo: switched nouveau on\n");
 		dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
 		nouveau_pmops_resume(&pdev->dev);
-		drm_kms_helper_poll_enable(dev);
 		dev->switch_power_state = DRM_SWITCH_POWER_ON;
 	} else {
 		pr_err("VGA switcheroo: switched nouveau off\n");
 		dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
-		drm_kms_helper_poll_disable(dev);
 		nouveau_switcheroo_optimus_dsm();
 		nouveau_pmops_suspend(&pdev->dev);
 		dev->switch_power_state = DRM_SWITCH_POWER_OFF;

drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c+14−0

@@ -275,6 +275,7 @@ nvkm_disp_oneinit(struct nvkm_engine *engine) · 274 unmodified lines
275	struct nvkm_outp outp, outt, *pair;	275	struct nvkm_outp outp, outt, *pair;
276	struct nvkm_conn *conn;	276	struct nvkm_conn *conn;
277	struct nvkm_head *head;	277	struct nvkm_head *head;
		278	struct nvkm_ior *ior;
278	struct nvbios_connE connE;	279	struct nvbios_connE connE;
279	struct dcb_output dcbE;	280	struct dcb_output dcbE;
280	u8 hpd = 0, ver, hdr;	281	u8 hpd = 0, ver, hdr;
@@ -399,6 +400,19 @@ nvkm_disp_oneinit(struct nvkm_engine *engine) · 118 unmodified lines
399	return ret;	400	return ret;
400	}	401	}
401		402
		403	/* Enforce identity-mapped SOR assignment for panels, which have
		404	* certain bits (ie. backlight controls) wired to a specific SOR.
		405	*/
		406	list_for_each_entry(outp, &disp->outp, head) {
		407	if (outp->conn->info.type == DCB_CONNECTOR_LVDS \|\|
		408	outp->conn->info.type == DCB_CONNECTOR_eDP) {
		409	ior = nvkm_ior_find(disp, SOR, ffs(outp->info.or) - 1);
		410	if (!WARN_ON(!ior))
		411	ior->identity = true;
		412	outp->identity = true;
		413	}
		414	}
		415
402	i = 0;	416	i = 0;
403	list_for_each_entry(head, &disp->head, head)	417	list_for_each_entry(head, &disp->head, head)
404	i = max(i, head->id + 1);	418	i = max(i, head->id + 1);

drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c+46−8

@@ -28,6 +28,7 @@ · 27 unmodified lines
28		28
29	#include <subdev/bios.h>	29	#include <subdev/bios.h>
30	#include <subdev/bios/init.h>	30	#include <subdev/bios/init.h>
		31	#include <subdev/gpio.h>
31	#include <subdev/i2c.h>	32	#include <subdev/i2c.h>
32		33
33	#include <nvif/event.h>	34	#include <nvif/event.h>
@@ -412,14 +413,10 @@ nvkm_dp_train(struct nvkm_dp *dp, u32 dataKBps) · 378 unmodified lines
412	}	413	}
413		414
414	static void	415	static void
415	nvkm_dp_release(struct nvkm_outp outp, struct nvkm_ior ior)	416	nvkm_dp_disable(struct nvkm_outp outp, struct nvkm_ior ior)
416	{	417	{
417	struct nvkm_dp *dp = nvkm_dp(outp);	418	struct nvkm_dp *dp = nvkm_dp(outp);
418		419
419	/* Prevent link from being retrained if sink sends an IRQ. */
420	atomic_set(&dp->lt.done, 0);
421	ior->dp.nr = 0;
422
423	/* Execute DisableLT script from DP Info Table. */	420	/* Execute DisableLT script from DP Info Table. */
424	nvbios_init(&ior->disp->engine.subdev, dp->info.script[4],	421	nvbios_init(&ior->disp->engine.subdev, dp->info.script[4],
425	init.outp = &dp->outp.info;	422	init.outp = &dp->outp.info;
@@ -428,6 +425,16 @@ nvkm_dp_release(struct nvkm_outp outp, struct nvkm_ior ior) · 2 unmodified lines
428	);	425	);
429	}	426	}
430		427
		428	static void
		429	nvkm_dp_release(struct nvkm_outp *outp)
		430	{
		431	struct nvkm_dp *dp = nvkm_dp(outp);
		432
		433	/* Prevent link from being retrained if sink sends an IRQ. */
		434	atomic_set(&dp->lt.done, 0);
		435	dp->outp.ior->dp.nr = 0;
		436	}
		437
431	static int	438	static int
432	nvkm_dp_acquire(struct nvkm_outp *outp)	439	nvkm_dp_acquire(struct nvkm_outp *outp)
433	{	440	{
@@ -491,7 +498,7 @@ done: · 57 unmodified lines
491	return ret;	498	return ret;
492	}	499	}
493		500
494	static void	501	static bool
495	nvkm_dp_enable(struct nvkm_dp *dp, bool enable)	502	nvkm_dp_enable(struct nvkm_dp *dp, bool enable)
496	{	503	{
497	struct nvkm_i2c_aux *aux = dp->aux;	504	struct nvkm_i2c_aux *aux = dp->aux;
@@ -505,7 +512,7 @@ nvkm_dp_enable(struct nvkm_dp *dp, bool enable) · 7 unmodified lines
505		512
506	if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd,	513	if (!nvkm_rdaux(aux, DPCD_RC00_DPCD_REV, dp->dpcd,
507	sizeof(dp->dpcd)))	514	sizeof(dp->dpcd)))
508	return;	515	return true;
509	}	516	}
510		517
511	if (dp->present) {	518	if (dp->present) {
@@ -515,6 +522,7 @@ nvkm_dp_enable(struct nvkm_dp *dp, bool enable) · 3 unmodified lines
515	}	522	}
516		523
517	atomic_set(&dp->lt.done, 0);	524	atomic_set(&dp->lt.done, 0);
		525	return false;
518	}	526	}
519		527
520	static int	528	static int
@@ -555,9 +563,38 @@ nvkm_dp_fini(struct nvkm_outp *outp) · 34 unmodified lines
555	static void	563	static void
556	nvkm_dp_init(struct nvkm_outp *outp)	564	nvkm_dp_init(struct nvkm_outp *outp)
557	{	565	{
		566	struct nvkm_gpio *gpio = outp->disp->engine.subdev.device->gpio;
558	struct nvkm_dp *dp = nvkm_dp(outp);	567	struct nvkm_dp *dp = nvkm_dp(outp);
		568
559	nvkm_notify_put(&dp->outp.conn->hpd);	569	nvkm_notify_put(&dp->outp.conn->hpd);
560	nvkm_dp_enable(dp, true);	570
		571	/* eDP panels need powering on by us (if the VBIOS doesn't default it
		572	* to on) before doing any AUX channel transactions. LVDS panel power
		573	* is handled by the SOR itself, and not required for LVDS DDC.
		574	*/
		575	if (dp->outp.conn->info.type == DCB_CONNECTOR_eDP) {
		576	int power = nvkm_gpio_get(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff);
		577	if (power == 0)
		578	nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 1);
		579
		580	/* We delay here unconditionally, even if already powered,
		581	* because some laptop panels having a significant resume
		582	* delay before the panel begins responding.
		583	*
		584	* This is likely a bit of a hack, but no better idea for
		585	* handling this at the moment.
		586	*/
		587	msleep(300);
		588
		589	/* If the eDP panel can't be detected, we need to restore
		590	* the panel power GPIO to avoid breaking another output.
		591	*/
		592	if (!nvkm_dp_enable(dp, true) && power == 0)
		593	nvkm_gpio_set(gpio, 0, DCB_GPIO_PANEL_POWER, 0xff, 0);
		594	} else {
		595	nvkm_dp_enable(dp, true);
		596	}
		597
561	nvkm_notify_get(&dp->hpd);	598	nvkm_notify_get(&dp->hpd);
562	}	599	}
563		600
@@ -576,6 +613,7 @@ nvkm_dp_func = { · 12 unmodified lines
576	.fini = nvkm_dp_fini,	613	.fini = nvkm_dp_fini,
577	.acquire = nvkm_dp_acquire,	614	.acquire = nvkm_dp_acquire,
578	.release = nvkm_dp_release,	615	.release = nvkm_dp_release,
		616	.disable = nvkm_dp_disable,
579	};	617	};
580		618
581	static int	619	static int

drivers/gpu/drm/nouveau/nvkm/engine/disp/ior.h+1−0

@@ -16,6 +16,7 @@ struct nvkm_ior { · 15 unmodified lines
16	char name[8];	16	char name[8];
17		17
18	struct list_head head;	18	struct list_head head;
		19	bool identity;
19		20
20	struct nvkm_ior_state {	21	struct nvkm_ior_state {
21	struct nvkm_outp *outp;	22	struct nvkm_outp *outp;

drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c+3−3

@@ -501,11 +501,11 @@ nv50_disp_super_2_0(struct nv50_disp disp, struct nvkm_head head) · 500 unmodified lines
501	nv50_disp_super_ied_off(head, ior, 2);	501	nv50_disp_super_ied_off(head, ior, 2);
502		502
503	/* If we're shutting down the OR's only active head, execute	503	/* If we're shutting down the OR's only active head, execute
504	* the output path's release function.	504	* the output path's disable function.
505	*/	505	*/
506	if (ior->arm.head == (1 << head->id)) {	506	if (ior->arm.head == (1 << head->id)) {
507	if ((outp = ior->arm.outp) && outp->func->release)	507	if ((outp = ior->arm.outp) && outp->func->disable)
508	outp->func->release(outp, ior);	508	outp->func->disable(outp, ior);
509	}	509	}
510	}	510	}
511		511

drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.c+14−4

 	if (ior) {
 		outp->acquired &= ~user;
 		if (!outp->acquired) {
+			if (outp->func->release && outp->ior)
+				outp->func->release(outp);
 			outp->ior->asy.outp = NULL;
 			outp->ior = NULL;
 		}
 	if (proto == UNKNOWN)
 		return -ENOSYS;
+	/* Deal with panels requiring identity-mapped SOR assignment. */
+	if (outp->identity) {
+		ior = nvkm_ior_find(outp->disp, SOR, ffs(outp->info.or) - 1);
+		if (WARN_ON(!ior))
+			return -ENOSPC;
+		return nvkm_outp_acquire_ior(outp, user, ior);
+	}
 	/* First preference is to reuse the OR that is currently armed
 	 * on HW, if any, in order to prevent unnecessary switching.
 	 */
 	list_for_each_entry(ior, &outp->disp->ior, head) {
-		if (!ior->asy.outp && ior->arm.outp == outp)
+		if (!ior->identity && !ior->asy.outp && ior->arm.outp == outp)
 			return nvkm_outp_acquire_ior(outp, user, ior);
 	}
 	/* Failing that, a completely unused OR is the next best thing. */
 	list_for_each_entry(ior, &outp->disp->ior, head) {
-		if (!ior->asy.outp && ior->type == type && !ior->arm.outp &&
+		if (!ior->identity &&
+		    !ior->asy.outp && ior->type == type && !ior->arm.outp &&
 		    (ior->func->route.set || ior->id == __ffs(outp->info.or)))
 			return nvkm_outp_acquire_ior(outp, user, ior);
 	}
 	 * but will be released during the next modeset.
 	 */
 	list_for_each_entry(ior, &outp->disp->ior, head) {
-		if (!ior->asy.outp && ior->type == type &&
+		if (!ior->identity && !ior->asy.outp && ior->type == type &&
 		    (ior->func->route.set || ior->id == __ffs(outp->info.or)))
 			return nvkm_outp_acquire_ior(outp, user, ior);
 	}
 	outp->index = index;
 	outp->info = *dcbE;
 	outp->i2c = nvkm_i2c_bus_find(i2c, dcbE->i2c_index);
-	outp->or = ffs(outp->info.or) - 1;
 	OUTP_DBG(outp, "type %02x loc %d or %d link %d con %x "
 		       "edid %x bus %d head %x",

drivers/gpu/drm/nouveau/nvkm/engine/disp/outp.h+3−2

 	struct dcb_output info;
 	struct nvkm_i2c_bus *i2c;
-	int or;
 	struct list_head head;
 	struct nvkm_conn *conn;
+	bool identity;
 	/* Assembly state. */
 #define NVKM_OUTP_PRIV 1
 	void (*init)(struct nvkm_outp *);
 	void (*fini)(struct nvkm_outp *);
 	int (*acquire)(struct nvkm_outp *);
-	void (*release)(struct nvkm_outp *, struct nvkm_ior *);
+	void (*release)(struct nvkm_outp *);
+	void (*disable)(struct nvkm_outp *, struct nvkm_ior *);
 };
 #define OUTP_MSG(o,l,f,a...) do {                                              \

drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm200.c+13−11

 	struct nvkm_bios *bios = subdev->device->bios;
 	struct nvbios_pmuR pmu;
-	if (!nvbios_pmuRm(bios, type, &pmu)) {
+	if (!nvbios_pmuRm(bios, type, &pmu))
-		nvkm_error(subdev, "VBIOS PMU fuc %02x not found\n", type);
 		return -EINVAL;
-	}
 	if (!post)
 		return 0;
 		return -EINVAL;
 	}
+	/* Upload DEVINIT application from VBIOS onto PMU. */
 	ret = pmu_load(init, 0x04, post, &exec, &args);
-	if (ret)
+	if (ret) {
+		nvkm_error(subdev, "VBIOS PMU/DEVINIT not found\n");
 		return ret;
+	}
-	/* upload first chunk of init data */
+	/* Upload tables required by opcodes in boot scripts. */
 	if (post) {
-		// devinit tables
 		u32 pmu = pmu_args(init, args + 0x08, 0x08);
 		u32 img = nvbios_rd16(bios, bit_I.offset + 0x14);
 		u32 len = nvbios_rd16(bios, bit_I.offset + 0x16);
 		pmu_data(init, pmu, img, len);
 	}
-	/* upload second chunk of init data */
+	/* Upload boot scripts. */
 	if (post) {
-		// devinit boot scripts
 		u32 pmu = pmu_args(init, args + 0x08, 0x10);
 		u32 img = nvbios_rd16(bios, bit_I.offset + 0x18);
 		u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a);
 		pmu_data(init, pmu, img, len);
 	}
-	/* execute init tables */
+	/* Execute DEVINIT. */
 	if (post) {
 		nvkm_wr32(device, 0x10a040, 0x00005000);
 		pmu_exec(init, exec);
 			return -ETIMEDOUT;
 	}
-	/* load and execute some other ucode image (bios therm?) */
+	/* Optional: Execute PRE_OS application on PMU, which should at
-	return pmu_load(init, 0x01, post, NULL, NULL);
+	 * least take care of fans until a full PMU has been loaded.
+	 */
+	pmu_load(init, 0x01, post, NULL, NULL);
+	return 0;
 }
 static const struct nvkm_devinit_func

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c+1−1

@@ -1423,7 +1423,7 @@ nvkm_vmm_get(struct nvkm_vmm vmm, u8 page, u64 size, struct nvkm_vma *pvma) · 1422 unmodified lines
1423	void	1423	void
1424	nvkm_vmm_part(struct nvkm_vmm vmm, struct nvkm_memory inst)	1424	nvkm_vmm_part(struct nvkm_vmm vmm, struct nvkm_memory inst)
1425	{	1425	{
1426	if (vmm->func->part && inst) {	1426	if (inst && vmm->func->part) {
1427	mutex_lock(&vmm->mutex);	1427	mutex_lock(&vmm->mutex);
1428	vmm->func->part(vmm, inst);	1428	vmm->func->part(vmm, inst);
1429	mutex_unlock(&vmm->mutex);	1429	mutex_unlock(&vmm->mutex);

drivers/gpu/drm/pl111/pl111_vexpress.c+2−1

@@ -111,7 +111,8 @@ static int vexpress_muxfpga_probe(struct platform_device *pdev) · 110 unmodified lines
111	}	111	}
112		112
113	static const struct of_device_id vexpress_muxfpga_match[] = {	113	static const struct of_device_id vexpress_muxfpga_match[] = {
114	{ .compatible = "arm,vexpress-muxfpga", }	114	{ .compatible = "arm,vexpress-muxfpga", },
		115	{}
115	};	116	};
116		117
117	static struct platform_driver vexpress_muxfpga_driver = {	118	static struct platform_driver vexpress_muxfpga_driver = {

drivers/gpu/drm/sun4i/sun4i_drv.c+0−1

@@ -418,7 +418,6 @@ static const struct of_device_id sun4i_drv_of_table[] = { · 417 unmodified lines
418	{ .compatible = "allwinner,sun8i-a33-display-engine" },	418	{ .compatible = "allwinner,sun8i-a33-display-engine" },
419	{ .compatible = "allwinner,sun8i-a83t-display-engine" },	419	{ .compatible = "allwinner,sun8i-a83t-display-engine" },
420	{ .compatible = "allwinner,sun8i-h3-display-engine" },	420	{ .compatible = "allwinner,sun8i-h3-display-engine" },
421	{ .compatible = "allwinner,sun8i-r40-display-engine" },
422	{ .compatible = "allwinner,sun8i-v3s-display-engine" },	421	{ .compatible = "allwinner,sun8i-v3s-display-engine" },
423	{ .compatible = "allwinner,sun9i-a80-display-engine" },	422	{ .compatible = "allwinner,sun9i-a80-display-engine" },
424	{ }	423	{ }

drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c+0−1

@@ -398,7 +398,6 @@ static struct regmap_config sun8i_hdmi_phy_regmap_config = { · 397 unmodified lines
398		398
399	static const struct sun8i_hdmi_phy_variant sun50i_a64_hdmi_phy = {	399	static const struct sun8i_hdmi_phy_variant sun50i_a64_hdmi_phy = {
400	.has_phy_clk = true,	400	.has_phy_clk = true,
401	.has_second_pll = true,
402	.phy_init = &sun8i_hdmi_phy_init_h3,	401	.phy_init = &sun8i_hdmi_phy_init_h3,
403	.phy_disable = &sun8i_hdmi_phy_disable_h3,	402	.phy_disable = &sun8i_hdmi_phy_disable_h3,
404	.phy_config = &sun8i_hdmi_phy_config_h3,	403	.phy_config = &sun8i_hdmi_phy_config_h3,

drivers/gpu/drm/sun4i/sun8i_mixer.c+0−24

@@ -545,22 +545,6 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { · 544 unmodified lines
545	.vi_num = 1,	545	.vi_num = 1,
546	};	546	};
547		547
548	static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = {
549	.ccsc = 0,
550	.mod_rate = 297000000,
551	.scaler_mask = 0xf,
552	.ui_num = 3,
553	.vi_num = 1,
554	};
555
556	static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = {
557	.ccsc = 1,
558	.mod_rate = 297000000,
559	.scaler_mask = 0x3,
560	.ui_num = 1,
561	.vi_num = 1,
562	};
563
564	static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {	548	static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = {
565	.vi_num = 2,	549	.vi_num = 2,
566	.ui_num = 1,	550	.ui_num = 1,
@@ -582,14 +566,6 @@ static const struct of_device_id sun8i_mixer_of_table[] = { · 15 unmodified lines
582	.compatible = "allwinner,sun8i-h3-de2-mixer-0",	566	.compatible = "allwinner,sun8i-h3-de2-mixer-0",
583	.data = &sun8i_h3_mixer0_cfg,	567	.data = &sun8i_h3_mixer0_cfg,
584	},	568	},
585	{
586	.compatible = "allwinner,sun8i-r40-de2-mixer-0",
587	.data = &sun8i_r40_mixer0_cfg,
588	},
589	{
590	.compatible = "allwinner,sun8i-r40-de2-mixer-1",
591	.data = &sun8i_r40_mixer1_cfg,
592	},
593	{	569	{
594	.compatible = "allwinner,sun8i-v3s-de2-mixer",	570	.compatible = "allwinner,sun8i-v3s-de2-mixer",
595	.data = &sun8i_v3s_mixer_cfg,	571	.data = &sun8i_v3s_mixer_cfg,

drivers/gpu/drm/sun4i/sun8i_tcon_top.c+0−1

@@ -253,7 +253,6 @@ static int sun8i_tcon_top_remove(struct platform_device *pdev) · 252 unmodified lines
253		253
254	/* sun4i_drv uses this list to check if a device node is a TCON TOP */	254	/* sun4i_drv uses this list to check if a device node is a TCON TOP */
255	const struct of_device_id sun8i_tcon_top_of_table[] = {	255	const struct of_device_id sun8i_tcon_top_of_table[] = {
256	{ .compatible = "allwinner,sun8i-r40-tcon-top" },
257	{ /* sentinel */ }	256	{ /* sentinel */ }
258	};	257	};
259	MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);	258	MODULE_DEVICE_TABLE(of, sun8i_tcon_top_of_table);

drivers/gpu/drm/udl/udl_fb.c+5−3

 {
 	drm_fb_helper_unregister_fbi(&ufbdev->helper);
 	drm_fb_helper_fini(&ufbdev->helper);
-	drm_framebuffer_unregister_private(&ufbdev->ufb.base);
+	if (ufbdev->ufb.obj) {
-	drm_framebuffer_cleanup(&ufbdev->ufb.base);
+		drm_framebuffer_unregister_private(&ufbdev->ufb.base);
-	drm_gem_object_put_unlocked(&ufbdev->ufb.obj->base);
+		drm_framebuffer_cleanup(&ufbdev->ufb.base);
+		drm_gem_object_put_unlocked(&ufbdev->ufb.obj->base);
+	}
 }
 int udl_fbdev_init(struct drm_device *dev)

drivers/gpu/drm/vc4/vc4_plane.c+12−13

 	vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
 						       vc4_state->crtc_h);
+	vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
+			       vc4_state->y_scaling[0] == VC4_SCALING_NONE);
 	if (num_planes > 1) {
 		vc4_state->is_yuv = true;
 			vc4_get_scaling_mode(vc4_state->src_h[1],
 					     vc4_state->crtc_h);
-		/* YUV conversion requires that scaling be enabled,
+		/* YUV conversion requires that horizontal scaling be enabled,
-		 * even on a plane that's otherwise 1:1.  Choose TPZ
+		 * even on a plane that's otherwise 1:1. Looks like only PPF
-		 * for simplicity.
+		 * works in that case, so let's pick that one.
 		 */
-		if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
+		if (vc4_state->is_unity)
-			vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
+			vc4_state->x_scaling[0] = VC4_SCALING_PPF;
-		if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
-			vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
 	} else {
 		vc4_state->x_scaling[1] = VC4_SCALING_NONE;
 		vc4_state->y_scaling[1] = VC4_SCALING_NONE;
 	}
-	vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
-			       vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
-			       vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
-			       vc4_state->y_scaling[1] == VC4_SCALING_NONE);
 	/* No configuring scaling on the cursor plane, since it gets
 	   non-vblank-synced updates, and scaling requires requires
 	   LBM changes which have to be vblank-synced.
 		vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
 	}
-	if (!vc4_state->is_unity) {
+	if (vc4_state->x_scaling[0] != VC4_SCALING_NONE ||
+	    vc4_state->x_scaling[1] != VC4_SCALING_NONE ||
+	    vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
+	    vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
 		/* LBM Base Address. */
 		if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
 		    vc4_state->y_scaling[1] != VC4_SCALING_NONE) {

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+1−1

@@ -3729,7 +3729,7 @@ int vmw_validate_single_buffer(struct vmw_private *dev_priv, · 3728 unmodified lines
3729	{	3729	{
3730	struct vmw_buffer_object *vbo =	3730	struct vmw_buffer_object *vbo =
3731	container_of(bo, struct vmw_buffer_object, base);	3731	container_of(bo, struct vmw_buffer_object, base);
3732	struct ttm_operation_ctx ctx = { interruptible, true };	3732	struct ttm_operation_ctx ctx = { interruptible, false };
3733	int ret;	3733	int ret;
3734		3734
3735	if (vbo->pin_count > 0)	3735	if (vbo->pin_count > 0)

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c+30−12

 					struct drm_rect *rects)
 {
 	struct vmw_private *dev_priv = vmw_priv(dev);
-	struct drm_mode_config *mode_config = &dev->mode_config;
 	struct drm_rect bounding_box = {0};
 	u64 total_pixels = 0, pixel_mem, bb_mem;
 	int i;
 	for (i = 0; i < num_rects; i++) {
 		/*
-		 * Currently this check is limiting the topology within max
+		 * For STDU only individual screen (screen target) is limited by
-		 * texture/screentarget size. This should change in future when
+		 * SCREENTARGET_MAX_WIDTH/HEIGHT registers.
-		 * user-space support multiple fb with topology.
 		 */
-		if (rects[i].x1 < 0 ||  rects[i].y1 < 0 ||
+		if (dev_priv->active_display_unit == vmw_du_screen_target &&
-		    rects[i].x2 > mode_config->max_width ||
+		    (drm_rect_width(&rects[i]) > dev_priv->stdu_max_width ||
-		    rects[i].y2 > mode_config->max_height) {
+		     drm_rect_height(&rects[i]) > dev_priv->stdu_max_height)) {
-			DRM_ERROR("Invalid GUI layout.\n");
+			DRM_ERROR("Screen size not supported.\n");
 			return -EINVAL;
 		}
 		struct drm_connector_state *conn_state;
 		struct vmw_connector_state *vmw_conn_state;
-		if (!new_crtc_state->enable && old_crtc_state->enable) {
+		if (!new_crtc_state->enable) {
 			rects[i].x1 = 0;
 			rects[i].y1 = 0;
 			rects[i].x2 = 0;
 	if (dev_priv->assume_16bpp)
 		assumed_bpp = 2;
+	max_width  = min(max_width,  dev_priv->texture_max_width);
+	max_height = min(max_height, dev_priv->texture_max_height);
+	/*
+	 * For STDU extra limit for a mode on SVGA_REG_SCREENTARGET_MAX_WIDTH/
+	 * HEIGHT registers.
+	 */
 	if (dev_priv->active_display_unit == vmw_du_screen_target) {
 		max_width  = min(max_width,  dev_priv->stdu_max_width);
-		max_width  = min(max_width,  dev_priv->texture_max_width);
 		max_height = min(max_height, dev_priv->stdu_max_height);
-		max_height = min(max_height, dev_priv->texture_max_height);
 	}
 	/* Add preferred mode */
 				struct drm_file *file_priv)
 {
 	struct vmw_private *dev_priv = vmw_priv(dev);
+	struct drm_mode_config *mode_config = &dev->mode_config;
 	struct drm_vmw_update_layout_arg *arg =
 		(struct drm_vmw_update_layout_arg *)data;
 	void __user *user_rects;
 		drm_rects[i].y1 = curr_rect.y;
 		drm_rects[i].x2 = curr_rect.x + curr_rect.w;
 		drm_rects[i].y2 = curr_rect.y + curr_rect.h;
+		/*
+		 * Currently this check is limiting the topology within
+		 * mode_config->max (which actually is max texture size
+		 * supported by virtual device). This limit is here to address
+		 * window managers that create a big framebuffer for whole
+		 * topology.
+		 */
+		if (drm_rects[i].x1 < 0 ||  drm_rects[i].y1 < 0 ||
+		    drm_rects[i].x2 > mode_config->max_width ||
+		    drm_rects[i].y2 > mode_config->max_height) {
+			DRM_ERROR("Invalid GUI layout.\n");
+			ret = -EINVAL;
+			goto out_free;
+		}
 	}
 	ret = vmw_kms_check_display_memory(dev, arg->num_outputs, drm_rects);

drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c+0−25

@@ -1600,31 +1600,6 @@ int vmw_kms_stdu_init_display(struct vmw_private *dev_priv) · 1599 unmodified lines
1600		1600
1601	dev_priv->active_display_unit = vmw_du_screen_target;	1601	dev_priv->active_display_unit = vmw_du_screen_target;
1602		1602
1603	if (dev_priv->capabilities & SVGA_CAP_3D) {
1604	/*
1605	* For 3D VMs, display (scanout) buffer size is the smaller of
1606	* max texture and max STDU
1607	*/
1608	uint32_t max_width, max_height;
1609
1610	max_width = min(dev_priv->texture_max_width,
1611	dev_priv->stdu_max_width);
1612	max_height = min(dev_priv->texture_max_height,
1613	dev_priv->stdu_max_height);
1614
1615	dev->mode_config.max_width = max_width;
1616	dev->mode_config.max_height = max_height;
1617	} else {
1618	/*
1619	* Given various display aspect ratios, there's no way to
1620	* estimate these using prim_bb_mem. So just set these to
1621	* something arbitrarily large and we will reject any layout
1622	* that doesn't fit prim_bb_mem later
1623	*/
1624	dev->mode_config.max_width = 8192;
1625	dev->mode_config.max_height = 8192;
1626	}
1627
1628	vmw_kms_create_implicit_placement_property(dev_priv, false);	1603	vmw_kms_create_implicit_placement_property(dev_priv, false);
1629		1604
1630	for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {	1605	for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i) {

drivers/gpu/drm/vmwgfx/vmwgfx_surface.c+14−10

 	*srf_out = NULL;
 	if (for_scanout) {
-		uint32_t max_width, max_height;
 		if (!svga3dsurface_is_screen_target_format(format)) {
 			DRM_ERROR("Invalid Screen Target surface format.");
 			return -EINVAL;
 		}
-		max_width = min(dev_priv->texture_max_width,
+		if (size.width > dev_priv->texture_max_width ||
-				dev_priv->stdu_max_width);
+		    size.height > dev_priv->texture_max_height) {
-		max_height = min(dev_priv->texture_max_height,
-				 dev_priv->stdu_max_height);
-		if (size.width > max_width || size.height > max_height) {
 			DRM_ERROR("%ux%u\n, exceeds max surface size %ux%u",
 				  size.width, size.height,
-				  max_width, max_height);
+				  dev_priv->texture_max_width,
+				  dev_priv->texture_max_height);
 			return -EINVAL;
 		}
 	} else {
 	if (srf->flags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT)
 		srf->res.backup_size += sizeof(SVGA3dDXSOState);
+	/*
+	 * Don't set SVGA3D_SURFACE_SCREENTARGET flag for a scanout surface with
+	 * size greater than STDU max width/height. This is really a workaround
+	 * to support creation of big framebuffer requested by some user-space
+	 * for whole topology. That big framebuffer won't really be used for
+	 * binding with screen target as during prepare_fb a separate surface is
+	 * created so it's safe to ignore SVGA3D_SURFACE_SCREENTARGET flag.
+	 */
 	if (dev_priv->active_display_unit == vmw_du_screen_target &&
-	    for_scanout)
+	    for_scanout && size.width <= dev_priv->stdu_max_width &&
+	    size.height <= dev_priv->stdu_max_height)
 		srf->flags |= SVGA3D_SURFACE_SCREENTARGET;
 	/*

drivers/gpu/vga/vga_switcheroo.c+2−0

@@ -215,6 +215,8 @@ static void vga_switcheroo_enable(void) · 214 unmodified lines
215	return;	215	return;
216		216
217	client->id = ret \| ID_BIT_AUDIO;	217	client->id = ret \| ID_BIT_AUDIO;
		218	if (client->ops->gpu_bound)
		219	client->ops->gpu_bound(client->pdev, ret);
218	}	220	}
219		221
220	vga_switcheroo_debugfs_init(&vgasr_priv);	222	vga_switcheroo_debugfs_init(&vgasr_priv);

drivers/hid/hid-apple.c+8−1

 		struct hid_field *field, struct hid_usage *usage,
 		unsigned long **bit, int *max)
 {
-	if (usage->hid == (HID_UP_CUSTOM | 0x0003)) {
+	if (usage->hid == (HID_UP_CUSTOM | 0x0003) ||
+			usage->hid == (HID_UP_MSVENDOR | 0x0003)) {
 		/* The fn key on Apple USB keyboards */
 		set_bit(EV_REP, hi->input->evbit);
 		hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN);
 		.driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI),
 		.driver_data = APPLE_HAS_FN },
+	{ HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI),
+		.driver_data = APPLE_HAS_FN },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI),
+		.driver_data = APPLE_HAS_FN },
+	{ HID_BLUETOOTH_DEVICE(BT_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI),
+		.driver_data = APPLE_HAS_FN },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ANSI),
 		.driver_data = APPLE_HAS_FN },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING_ISO),

drivers/hid/hid-core.c+4−1

 	parser = vzalloc(sizeof(struct hid_parser));
 	if (!parser) {
 		ret = -ENOMEM;
-		goto err;
+		goto alloc_err;
 	}
 	parser->device = device;
 				hid_err(device, "unbalanced delimiter at end of report description\n");
 				goto err;
 			}
+			kfree(parser->collection_stack);
 			vfree(parser);
 			device->status |= HID_STAT_PARSED;
 			return 0;
 	hid_err(device, "item fetching failed at offset %d\n", (int)(end - start));
 err:
+	kfree(parser->collection_stack);
+alloc_err:
 	vfree(parser);
 	hid_close_report(device);
 	return ret;

drivers/hid/hid-ids.h+3−3

 #define USB_DEVICE_ID_ANTON_TOUCH_PAD	0x3101
 #define USB_VENDOR_ID_APPLE		0x05ac
+#define BT_VENDOR_ID_APPLE		0x004c
 #define USB_DEVICE_ID_APPLE_MIGHTYMOUSE	0x0304
 #define USB_DEVICE_ID_APPLE_MAGICMOUSE	0x030d
 #define USB_DEVICE_ID_APPLE_MAGICTRACKPAD	0x030e
 #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO   0x0256
 #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_JIS   0x0257
 #define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_ANSI   0x0267
+#define USB_DEVICE_ID_APPLE_MAGIC_KEYBOARD_NUMPAD_ANSI   0x026c
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI	0x0290
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO	0x0291
 #define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS	0x0292
 #define I2C_VENDOR_ID_HANTICK		0x0911
 #define I2C_PRODUCT_ID_HANTICK_5288	0x5288
-#define I2C_VENDOR_ID_RAYD		0x2386
-#define I2C_PRODUCT_ID_RAYD_3118	0x3118
 #define USB_VENDOR_ID_HANWANG		0x0b57
 #define USB_DEVICE_ID_HANWANG_TABLET_FIRST	0x5000
 #define USB_DEVICE_ID_HANWANG_TABLET_LAST	0x8fff
 #define USB_DEVICE_ID_SAITEK_RUMBLEPAD	0xff17
 #define USB_DEVICE_ID_SAITEK_PS1000	0x0621
 #define USB_DEVICE_ID_SAITEK_RAT7_OLD	0x0ccb
+#define USB_DEVICE_ID_SAITEK_RAT7_CONTAGION	0x0ccd
 #define USB_DEVICE_ID_SAITEK_RAT7	0x0cd7
 #define USB_DEVICE_ID_SAITEK_RAT9	0x0cfa
 #define USB_DEVICE_ID_SAITEK_MMO7	0x0cd0

drivers/hid/hid-input.c+3−2

 	input_dev->dev.parent = &hid->dev;
 	hidinput->input = input_dev;
+	hidinput->application = application;
 	list_add_tail(&hidinput->list, &hid->inputs);
 	INIT_LIST_HEAD(&hidinput->reports);
 	struct hid_input *hidinput;
 	list_for_each_entry(hidinput, &hid->inputs, list) {
-		if (hidinput->report &&
+		if (hidinput->application == report->application)
-		    hidinput->report->application == report->application)
 			return hidinput;
 	}
 			input_unregister_device(hidinput->input);
 		else
 			input_free_device(hidinput->input);
+		kfree(hidinput->name);
 		kfree(hidinput);
 	}

drivers/hid/hid-multitouch.c+17−2

 				     struct hid_usage *usage,
 				     enum latency_mode latency,
 				     bool surface_switch,
-				     bool button_switch)
+				     bool button_switch,
+				     bool *inputmode_found)
 {
 	struct mt_device *td = hid_get_drvdata(hdev);
 	struct mt_class *cls = &td->mtclass;
 	switch (usage->hid) {
 	case HID_DG_INPUTMODE:
+		/*
+		 * Some elan panels wrongly declare 2 input mode features,
+		 * and silently ignore when we set the value in the second
+		 * field. Skip the second feature and hope for the best.
+		 */
+		if (*inputmode_found)
+			return false;
 		if (cls->quirks & MT_QUIRK_FORCE_GET_FEATURE) {
 			report_len = hid_report_len(report);
 			buf = hid_alloc_report_buf(report, GFP_KERNEL);
 		}
 		field->value[index] = td->inputmode_value;
+		*inputmode_found = true;
 		return true;
 	case HID_DG_CONTACTMAX:
 	struct hid_usage *usage;
 	int i, j;
 	bool update_report;
+	bool inputmode_found = false;
 	rep_enum = &hdev->report_enum[HID_FEATURE_REPORT];
 	list_for_each_entry(rep, &rep_enum->report_list, list) {
 							     usage,
 							     latency,
 							     surface_switch,
-							     button_switch))
+							     button_switch,
+							     &inputmode_found))
 					update_report = true;
 			}
 		}
 	 */
 	hdev->quirks |= HID_QUIRK_INPUT_PER_APP;
+	if (id->group != HID_GROUP_MULTITOUCH_WIN_8)
+		hdev->quirks |= HID_QUIRK_MULTI_INPUT;
 	timer_setup(&td->release_timer, mt_expired_timeout, 0);
 	ret = hid_parse(hdev);

drivers/hid/hid-saitek.c+2−0

 		.driver_data = SAITEK_RELEASE_MODE_RAT7 },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7),
 		.driver_data = SAITEK_RELEASE_MODE_RAT7 },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7_CONTAGION),
+		.driver_data = SAITEK_RELEASE_MODE_RAT7 },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT9),
 		.driver_data = SAITEK_RELEASE_MODE_RAT7 },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9),

drivers/hid/hid-sensor-hub.c+23−0

@@ -579,6 +579,28 @@ void sensor_hub_device_close(struct hid_sensor_hub_device *hsdev) · 578 unmodified lines
579	}	579	}
580	EXPORT_SYMBOL_GPL(sensor_hub_device_close);	580	EXPORT_SYMBOL_GPL(sensor_hub_device_close);
581		581
		582	static __u8 sensor_hub_report_fixup(struct hid_device hdev, __u8 *rdesc,
		583	unsigned int *rsize)
		584	{
		585	/*
		586	* Checks if the report descriptor of Thinkpad Helix 2 has a logical
		587	* minimum for magnetic flux axis greater than the maximum.
		588	*/
		589	if (hdev->product == USB_DEVICE_ID_TEXAS_INSTRUMENTS_LENOVO_YOGA &&
		590	*rsize == 2558 && rdesc[913] == 0x17 && rdesc[914] == 0x40 &&
		591	rdesc[915] == 0x81 && rdesc[916] == 0x08 &&
		592	rdesc[917] == 0x00 && rdesc[918] == 0x27 &&
		593	rdesc[921] == 0x07 && rdesc[922] == 0x00) {
		594	/* Sets negative logical minimum for mag x, y and z */
		595	rdesc[914] = rdesc[935] = rdesc[956] = 0xc0;
		596	rdesc[915] = rdesc[936] = rdesc[957] = 0x7e;
		597	rdesc[916] = rdesc[937] = rdesc[958] = 0xf7;
		598	rdesc[917] = rdesc[938] = rdesc[959] = 0xff;
		599	}
		600
		601	return rdesc;
		602	}
		603
582	static int sensor_hub_probe(struct hid_device *hdev,	604	static int sensor_hub_probe(struct hid_device *hdev,
583	const struct hid_device_id *id)	605	const struct hid_device_id *id)
584	{	606	{
@@ -743,6 +765,7 @@ static struct hid_driver sensor_hub_driver = { · 158 unmodified lines
743	.probe = sensor_hub_probe,	765	.probe = sensor_hub_probe,
744	.remove = sensor_hub_remove,	766	.remove = sensor_hub_remove,
745	.raw_event = sensor_hub_raw_event,	767	.raw_event = sensor_hub_raw_event,
		768	.report_fixup = sensor_hub_report_fixup,
746	#ifdef CONFIG_PM	769	#ifdef CONFIG_PM
747	.suspend = sensor_hub_suspend,	770	.suspend = sensor_hub_suspend,
748	.resume = sensor_hub_resume,	771	.resume = sensor_hub_resume,

drivers/hid/i2c-hid/i2c-hid.c+7−4

@@ -170,8 +170,6 @@ static const struct i2c_hid_quirks { · 169 unmodified lines
170	I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },	170	I2C_HID_QUIRK_SET_PWR_WAKEUP_DEV },
171	{ I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288,	171	{ I2C_VENDOR_ID_HANTICK, I2C_PRODUCT_ID_HANTICK_5288,
172	I2C_HID_QUIRK_NO_IRQ_AFTER_RESET },	172	I2C_HID_QUIRK_NO_IRQ_AFTER_RESET },
173	{ I2C_VENDOR_ID_RAYD, I2C_PRODUCT_ID_RAYD_3118,
174	I2C_HID_QUIRK_RESEND_REPORT_DESCR },
175	{ USB_VENDOR_ID_SIS_TOUCH, USB_DEVICE_ID_SIS10FB_TOUCH,	173	{ USB_VENDOR_ID_SIS_TOUCH, USB_DEVICE_ID_SIS10FB_TOUCH,
176	I2C_HID_QUIRK_RESEND_REPORT_DESCR },	174	I2C_HID_QUIRK_RESEND_REPORT_DESCR },
177	{ 0, 0 }	175	{ 0, 0 }
@@ -1235,11 +1233,16 @@ static int i2c_hid_resume(struct device *dev) · 1057 unmodified lines
1235	pm_runtime_enable(dev);	1233	pm_runtime_enable(dev);
1236		1234
1237	enable_irq(client->irq);	1235	enable_irq(client->irq);
1238	ret = i2c_hid_hwreset(client);	1236
		1237	/* Instead of resetting device, simply powers the device on. This
		1238	* solves "incomplete reports" on Raydium devices 2386:3118 and
		1239	* 2386:4B33
		1240	*/
		1241	ret = i2c_hid_set_power(client, I2C_HID_PWR_ON);
1239	if (ret)	1242	if (ret)
1240	return ret;	1243	return ret;
1241		1244
1242	/* RAYDIUM device (2386:3118) need to re-send report descr cmd	1245	/* Some devices need to re-send report descr cmd
1243	* after resume, after this it will be back normal.	1246	* after resume, after this it will be back normal.
1244	* otherwise it issues too many incomplete reports.	1247	* otherwise it issues too many incomplete reports.
1245	*/	1248	*/

drivers/hid/intel-ish-hid/ipc/hw-ish.h+1−0

@@ -29,6 +29,7 @@ · 28 unmodified lines
29	#define CNL_Ax_DEVICE_ID 0x9DFC	29	#define CNL_Ax_DEVICE_ID 0x9DFC
30	#define GLK_Ax_DEVICE_ID 0x31A2	30	#define GLK_Ax_DEVICE_ID 0x31A2
31	#define CNL_H_DEVICE_ID 0xA37C	31	#define CNL_H_DEVICE_ID 0xA37C
		32	#define SPT_H_DEVICE_ID 0xA135
32		33
33	#define REVISION_ID_CHT_A0 0x6	34	#define REVISION_ID_CHT_A0 0x6
34	#define REVISION_ID_CHT_Ax_SI 0x0	35	#define REVISION_ID_CHT_Ax_SI 0x0

drivers/hid/intel-ish-hid/ipc/pci-ish.c+1−0

@@ -38,6 +38,7 @@ static const struct pci_device_id ish_pci_tbl[] = { · 37 unmodified lines
38	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)},	38	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)},
39	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)},	39	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)},
40	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)},	40	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)},
		41	{PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)},
41	{0, }	42	{0, }
42	};	43	};
43	MODULE_DEVICE_TABLE(pci, ish_pci_tbl);	44	MODULE_DEVICE_TABLE(pci, ish_pci_tbl);

drivers/hv/vmbus_drv.c+3−0

@@ -1291,6 +1291,9 @@ static ssize_t vmbus_chan_attr_show(struct kobject *kobj, · 1290 unmodified lines
1291	if (!attribute->show)	1291	if (!attribute->show)
1292	return -EIO;	1292	return -EIO;
1293		1293
		1294	if (chan->state != CHANNEL_OPENED_STATE)
		1295	return -EINVAL;
		1296
1294	return attribute->show(chan, buf);	1297	return attribute->show(chan, buf);
1295	}	1298	}
1296		1299

drivers/hwmon/nct6775.c+49−23

@@ -207,8 +207,6 @@ superio_exit(int ioreg) · 206 unmodified lines
207		207
208	#define NUM_FAN 7	208	#define NUM_FAN 7
209		209
210	#define TEMP_SOURCE_VIRTUAL 0x1f
211
212	/* Common and NCT6775 specific data */	210	/* Common and NCT6775 specific data */
213		211
214	/* Voltage min/max registers for nr=7..14 are in bank 5 */	212	/* Voltage min/max registers for nr=7..14 are in bank 5 */
@@ -299,8 +297,9 @@ static const u16 NCT6775_REG_PWM_READ[] = { · 84 unmodified lines
299		297
300	static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };	298	static const u16 NCT6775_REG_FAN[] = { 0x630, 0x632, 0x634, 0x636, 0x638 };
301	static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };	299	static const u16 NCT6775_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d };
302	static const u16 NCT6775_REG_FAN_PULSES[] = { 0x641, 0x642, 0x643, 0x644, 0 };	300	static const u16 NCT6775_REG_FAN_PULSES[NUM_FAN] = {
303	static const u16 NCT6775_FAN_PULSE_SHIFT[] = { 0, 0, 0, 0, 0, 0 };	301	0x641, 0x642, 0x643, 0x644 };
		302	static const u16 NCT6775_FAN_PULSE_SHIFT[NUM_FAN] = { };
304		303
305	static const u16 NCT6775_REG_TEMP[] = {	304	static const u16 NCT6775_REG_TEMP[] = {
306	0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };	305	0x27, 0x150, 0x250, 0x62b, 0x62c, 0x62d };
@@ -373,6 +372,7 @@ static const char *const nct6775_temp_label[] = { · 66 unmodified lines
373	};	372	};
374		373
375	#define NCT6775_TEMP_MASK 0x001ffffe	374	#define NCT6775_TEMP_MASK 0x001ffffe
		375	#define NCT6775_VIRT_TEMP_MASK 0x00000000
376		376
377	static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {	377	static const u16 NCT6775_REG_TEMP_ALTERNATE[32] = {
378	[13] = 0x661,	378	[13] = 0x661,
@@ -425,8 +425,8 @@ static const u8 NCT6776_PWM_MODE_MASK[] = { 0x01, 0, 0, 0, 0, 0 }; · 46 unmodified lines
425		425
426	static const u16 NCT6776_REG_FAN_MIN[] = {	426	static const u16 NCT6776_REG_FAN_MIN[] = {
427	0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };	427	0x63a, 0x63c, 0x63e, 0x640, 0x642, 0x64a, 0x64c };
428	static const u16 NCT6776_REG_FAN_PULSES[] = {	428	static const u16 NCT6776_REG_FAN_PULSES[NUM_FAN] = {
429	0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0 };	429	0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
430		430
431	static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {	431	static const u16 NCT6776_REG_WEIGHT_DUTY_BASE[] = {
432	0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };	432	0x13e, 0x23e, 0x33e, 0x83e, 0x93e, 0xa3e };
@@ -461,6 +461,7 @@ static const char *const nct6776_temp_label[] = { · 28 unmodified lines
461	};	461	};
462		462
463	#define NCT6776_TEMP_MASK 0x007ffffe	463	#define NCT6776_TEMP_MASK 0x007ffffe
		464	#define NCT6776_VIRT_TEMP_MASK 0x00000000
464		465
465	static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {	466	static const u16 NCT6776_REG_TEMP_ALTERNATE[32] = {
466	[14] = 0x401,	467	[14] = 0x401,
@@ -501,9 +502,9 @@ static const s8 NCT6779_BEEP_BITS[] = { · 34 unmodified lines
501	30, 31 }; /* intrusion0, intrusion1 */	502	30, 31 }; /* intrusion0, intrusion1 */
502		503
503	static const u16 NCT6779_REG_FAN[] = {	504	static const u16 NCT6779_REG_FAN[] = {
504	0x4b0, 0x4b2, 0x4b4, 0x4b6, 0x4b8, 0x4ba, 0x660 };	505	0x4c0, 0x4c2, 0x4c4, 0x4c6, 0x4c8, 0x4ca, 0x4ce };
505	static const u16 NCT6779_REG_FAN_PULSES[] = {	506	static const u16 NCT6779_REG_FAN_PULSES[NUM_FAN] = {
506	0x644, 0x645, 0x646, 0x647, 0x648, 0x649, 0 };	507	0x644, 0x645, 0x646, 0x647, 0x648, 0x649 };
507		508
508	static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {	509	static const u16 NCT6779_REG_CRITICAL_PWM_ENABLE[] = {
509	0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };	510	0x136, 0x236, 0x336, 0x836, 0x936, 0xa36, 0xb36 };
@@ -559,7 +560,9 @@ static const char *const nct6779_temp_label[] = { · 49 unmodified lines
559	};	560	};
560		561
561	#define NCT6779_TEMP_MASK 0x07ffff7e	562	#define NCT6779_TEMP_MASK 0x07ffff7e
		563	#define NCT6779_VIRT_TEMP_MASK 0x00000000
562	#define NCT6791_TEMP_MASK 0x87ffff7e	564	#define NCT6791_TEMP_MASK 0x87ffff7e
		565	#define NCT6791_VIRT_TEMP_MASK 0x80000000
563		566
564	static const u16 NCT6779_REG_TEMP_ALTERNATE[32]	567	static const u16 NCT6779_REG_TEMP_ALTERNATE[32]
565	= { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,	568	= { 0x490, 0x491, 0x492, 0x493, 0x494, 0x495, 0, 0,
@@ -638,6 +641,7 @@ static const char *const nct6792_temp_label[] = { · 72 unmodified lines
638	};	641	};
639		642
640	#define NCT6792_TEMP_MASK 0x9fffff7e	643	#define NCT6792_TEMP_MASK 0x9fffff7e
		644	#define NCT6792_VIRT_TEMP_MASK 0x80000000
641		645
642	static const char *const nct6793_temp_label[] = {	646	static const char *const nct6793_temp_label[] = {
643	"",	647	"",
@@ -675,6 +679,7 @@ static const char *const nct6793_temp_label[] = { · 31 unmodified lines
675	};	679	};
676		680
677	#define NCT6793_TEMP_MASK 0xbfff037e	681	#define NCT6793_TEMP_MASK 0xbfff037e
		682	#define NCT6793_VIRT_TEMP_MASK 0x80000000
678		683
679	static const char *const nct6795_temp_label[] = {	684	static const char *const nct6795_temp_label[] = {
680	"",	685	"",
@@ -712,6 +717,7 @@ static const char *const nct6795_temp_label[] = { · 31 unmodified lines
712	};	717	};
713		718
714	#define NCT6795_TEMP_MASK 0xbfffff7e	719	#define NCT6795_TEMP_MASK 0xbfffff7e
		720	#define NCT6795_VIRT_TEMP_MASK 0x80000000
715		721
716	static const char *const nct6796_temp_label[] = {	722	static const char *const nct6796_temp_label[] = {
717	"",	723	"",
@@ -724,8 +730,8 @@ static const char *const nct6796_temp_label[] = { · 6 unmodified lines
724	"AUXTIN4",	730	"AUXTIN4",
725	"SMBUSMASTER 0",	731	"SMBUSMASTER 0",
726	"SMBUSMASTER 1",	732	"SMBUSMASTER 1",
727	"",	733	"Virtual_TEMP",
728	"",	734	"Virtual_TEMP",
729	"",	735	"",
730	"",	736	"",
731	"",	737	"",
@@ -748,7 +754,8 @@ static const char *const nct6796_temp_label[] = { · 16 unmodified lines
748	"Virtual_TEMP"	754	"Virtual_TEMP"
749	};	755	};
750		756
751	#define NCT6796_TEMP_MASK 0xbfff03fe	757	#define NCT6796_TEMP_MASK 0xbfff0ffe
		758	#define NCT6796_VIRT_TEMP_MASK 0x80000c00
752		759
753	/* NCT6102D/NCT6106D specific data */	760	/* NCT6102D/NCT6106D specific data */
754		761
@@ -779,8 +786,8 @@ static const u16 NCT6106_REG_TEMP_CONFIG[] = { · 24 unmodified lines
779		786
780	static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };	787	static const u16 NCT6106_REG_FAN[] = { 0x20, 0x22, 0x24 };
781	static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };	788	static const u16 NCT6106_REG_FAN_MIN[] = { 0xe0, 0xe2, 0xe4 };
782	static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6, 0, 0 };	789	static const u16 NCT6106_REG_FAN_PULSES[] = { 0xf6, 0xf6, 0xf6 };
783	static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4, 0, 0 };	790	static const u16 NCT6106_FAN_PULSE_SHIFT[] = { 0, 2, 4 };
784		791
785	static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };	792	static const u8 NCT6106_REG_PWM_MODE[] = { 0xf3, 0xf3, 0xf3 };
786	static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };	793	static const u8 NCT6106_PWM_MODE_MASK[] = { 0x01, 0x02, 0x04 };
@@ -917,6 +924,11 @@ static unsigned int fan_from_reg16(u16 reg, unsigned int divreg) · 130 unmodified lines
917	return 1350000U / (reg << divreg);	924	return 1350000U / (reg << divreg);
918	}	925	}
919		926
		927	static unsigned int fan_from_reg_rpm(u16 reg, unsigned int divreg)
		928	{
		929	return reg;
		930	}
		931
920	static u16 fan_to_reg(u32 fan, unsigned int divreg)	932	static u16 fan_to_reg(u32 fan, unsigned int divreg)
921	{	933	{
922	if (!fan)	934	if (!fan)
@@ -969,6 +981,7 @@ struct nct6775_data { · 46 unmodified lines
969	u16 reg_temp_config[NUM_TEMP];	981	u16 reg_temp_config[NUM_TEMP];
970	const char * const *temp_label;	982	const char * const *temp_label;
971	u32 temp_mask;	983	u32 temp_mask;
		984	u32 virt_temp_mask;
972		985
973	u16 REG_CONFIG;	986	u16 REG_CONFIG;
974	u16 REG_VBAT;	987	u16 REG_VBAT;
@@ -1276,11 +1289,11 @@ static bool is_word_sized(struct nct6775_data *data, u16 reg) · 301 unmodified lines
1276	case nct6795:	1289	case nct6795:
1277	case nct6796:	1290	case nct6796:
1278	return reg == 0x150 \|\| reg == 0x153 \|\| reg == 0x155 \|\|	1291	return reg == 0x150 \|\| reg == 0x153 \|\| reg == 0x155 \|\|
1279	((reg & 0xfff0) == 0x4b0 && (reg & 0x000f) < 0x0b) \|\|	1292	(reg & 0xfff0) == 0x4c0 \|\|
1280	reg == 0x402 \|\|	1293	reg == 0x402 \|\|
1281	reg == 0x63a \|\| reg == 0x63c \|\| reg == 0x63e \|\|	1294	reg == 0x63a \|\| reg == 0x63c \|\| reg == 0x63e \|\|
1282	reg == 0x640 \|\| reg == 0x642 \|\| reg == 0x64a \|\|	1295	reg == 0x640 \|\| reg == 0x642 \|\| reg == 0x64a \|\|
1283	reg == 0x64c \|\| reg == 0x660 \|\|	1296	reg == 0x64c \|\|
1284	reg == 0x73 \|\| reg == 0x75 \|\| reg == 0x77 \|\| reg == 0x79 \|\|	1297	reg == 0x73 \|\| reg == 0x75 \|\| reg == 0x77 \|\| reg == 0x79 \|\|
1285	reg == 0x7b \|\| reg == 0x7d;	1298	reg == 0x7b \|\| reg == 0x7d;
1286	}	1299	}
@@ -1558,7 +1571,7 @@ static void nct6775_update_pwm(struct device *dev) · 271 unmodified lines
1558	reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);	1571	reg = nct6775_read_value(data, data->REG_WEIGHT_TEMP_SEL[i]);
1559	data->pwm_weight_temp_sel[i] = reg & 0x1f;	1572	data->pwm_weight_temp_sel[i] = reg & 0x1f;
1560	/* If weight is disabled, report weight source as 0 */	1573	/* If weight is disabled, report weight source as 0 */
1561	if (j == 1 && !(reg & 0x80))	1574	if (!(reg & 0x80))
1562	data->pwm_weight_temp_sel[i] = 0;	1575	data->pwm_weight_temp_sel[i] = 0;
1563		1576
1564	/* Weight temp data */	1577	/* Weight temp data */
@@ -1682,9 +1695,13 @@ static struct nct6775_data nct6775_update_device(struct device dev) · 117 unmodified lines
1682	if (data->has_fan_min & BIT(i))	1695	if (data->has_fan_min & BIT(i))
1683	data->fan_min[i] = nct6775_read_value(data,	1696	data->fan_min[i] = nct6775_read_value(data,
1684	data->REG_FAN_MIN[i]);	1697	data->REG_FAN_MIN[i]);
1685	data->fan_pulses[i] =	1698
1686	(nct6775_read_value(data, data->REG_FAN_PULSES[i])	1699	if (data->REG_FAN_PULSES[i]) {
1687	>> data->FAN_PULSE_SHIFT[i]) & 0x03;	1700	data->fan_pulses[i] =
		1701	(nct6775_read_value(data,
		1702	data->REG_FAN_PULSES[i])
		1703	>> data->FAN_PULSE_SHIFT[i]) & 0x03;
		1704	}
1688		1705
1689	nct6775_select_fan_div(dev, data, i, reg);	1706	nct6775_select_fan_div(dev, data, i, reg);
1690	}	1707	}
@@ -3639,6 +3656,7 @@ static int nct6775_probe(struct platform_device *pdev) · 1948 unmodified lines
3639		3656
3640	data->temp_label = nct6776_temp_label;	3657	data->temp_label = nct6776_temp_label;
3641	data->temp_mask = NCT6776_TEMP_MASK;	3658	data->temp_mask = NCT6776_TEMP_MASK;
		3659	data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3642		3660
3643	data->REG_VBAT = NCT6106_REG_VBAT;	3661	data->REG_VBAT = NCT6106_REG_VBAT;
3644	data->REG_DIODE = NCT6106_REG_DIODE;	3662	data->REG_DIODE = NCT6106_REG_DIODE;
@@ -3717,6 +3735,7 @@ static int nct6775_probe(struct platform_device *pdev) · 72 unmodified lines
3717		3735
3718	data->temp_label = nct6775_temp_label;	3736	data->temp_label = nct6775_temp_label;
3719	data->temp_mask = NCT6775_TEMP_MASK;	3737	data->temp_mask = NCT6775_TEMP_MASK;
		3738	data->virt_temp_mask = NCT6775_VIRT_TEMP_MASK;
3720		3739
3721	data->REG_CONFIG = NCT6775_REG_CONFIG;	3740	data->REG_CONFIG = NCT6775_REG_CONFIG;
3722	data->REG_VBAT = NCT6775_REG_VBAT;	3741	data->REG_VBAT = NCT6775_REG_VBAT;
@@ -3789,6 +3808,7 @@ static int nct6775_probe(struct platform_device *pdev) · 66 unmodified lines
3789		3808
3790	data->temp_label = nct6776_temp_label;	3809	data->temp_label = nct6776_temp_label;
3791	data->temp_mask = NCT6776_TEMP_MASK;	3810	data->temp_mask = NCT6776_TEMP_MASK;
		3811	data->virt_temp_mask = NCT6776_VIRT_TEMP_MASK;
3792		3812
3793	data->REG_CONFIG = NCT6775_REG_CONFIG;	3813	data->REG_CONFIG = NCT6775_REG_CONFIG;
3794	data->REG_VBAT = NCT6775_REG_VBAT;	3814	data->REG_VBAT = NCT6775_REG_VBAT;
@@ -3853,7 +3873,7 @@ static int nct6775_probe(struct platform_device *pdev) · 58 unmodified lines
3853	data->ALARM_BITS = NCT6779_ALARM_BITS;	3873	data->ALARM_BITS = NCT6779_ALARM_BITS;
3854	data->BEEP_BITS = NCT6779_BEEP_BITS;	3874	data->BEEP_BITS = NCT6779_BEEP_BITS;
3855		3875
3856	data->fan_from_reg = fan_from_reg13;	3876	data->fan_from_reg = fan_from_reg_rpm;
3857	data->fan_from_reg_min = fan_from_reg13;	3877	data->fan_from_reg_min = fan_from_reg13;
3858	data->target_temp_mask = 0xff;	3878	data->target_temp_mask = 0xff;
3859	data->tolerance_mask = 0x07;	3879	data->tolerance_mask = 0x07;
@@ -3861,6 +3881,7 @@ static int nct6775_probe(struct platform_device *pdev) · 1 unmodified line
3861		3881
3862	data->temp_label = nct6779_temp_label;	3882	data->temp_label = nct6779_temp_label;
3863	data->temp_mask = NCT6779_TEMP_MASK;	3883	data->temp_mask = NCT6779_TEMP_MASK;
		3884	data->virt_temp_mask = NCT6779_VIRT_TEMP_MASK;
3864		3885
3865	data->REG_CONFIG = NCT6775_REG_CONFIG;	3886	data->REG_CONFIG = NCT6775_REG_CONFIG;
3866	data->REG_VBAT = NCT6775_REG_VBAT;	3887	data->REG_VBAT = NCT6775_REG_VBAT;
@@ -3933,7 +3954,7 @@ static int nct6775_probe(struct platform_device *pdev) · 66 unmodified lines
3933	data->ALARM_BITS = NCT6791_ALARM_BITS;	3954	data->ALARM_BITS = NCT6791_ALARM_BITS;
3934	data->BEEP_BITS = NCT6779_BEEP_BITS;	3955	data->BEEP_BITS = NCT6779_BEEP_BITS;
3935		3956
3936	data->fan_from_reg = fan_from_reg13;	3957	data->fan_from_reg = fan_from_reg_rpm;
3937	data->fan_from_reg_min = fan_from_reg13;	3958	data->fan_from_reg_min = fan_from_reg13;
3938	data->target_temp_mask = 0xff;	3959	data->target_temp_mask = 0xff;
3939	data->tolerance_mask = 0x07;	3960	data->tolerance_mask = 0x07;
@@ -3944,22 +3965,27 @@ static int nct6775_probe(struct platform_device *pdev) · 4 unmodified lines
3944	case nct6791:	3965	case nct6791:
3945	data->temp_label = nct6779_temp_label;	3966	data->temp_label = nct6779_temp_label;
3946	data->temp_mask = NCT6791_TEMP_MASK;	3967	data->temp_mask = NCT6791_TEMP_MASK;
		3968	data->virt_temp_mask = NCT6791_VIRT_TEMP_MASK;
3947	break;	3969	break;
3948	case nct6792:	3970	case nct6792:
3949	data->temp_label = nct6792_temp_label;	3971	data->temp_label = nct6792_temp_label;
3950	data->temp_mask = NCT6792_TEMP_MASK;	3972	data->temp_mask = NCT6792_TEMP_MASK;
		3973	data->virt_temp_mask = NCT6792_VIRT_TEMP_MASK;
3951	break;	3974	break;
3952	case nct6793:	3975	case nct6793:
3953	data->temp_label = nct6793_temp_label;	3976	data->temp_label = nct6793_temp_label;
3954	data->temp_mask = NCT6793_TEMP_MASK;	3977	data->temp_mask = NCT6793_TEMP_MASK;
		3978	data->virt_temp_mask = NCT6793_VIRT_TEMP_MASK;
3955	break;	3979	break;
3956	case nct6795:	3980	case nct6795:
3957	data->temp_label = nct6795_temp_label;	3981	data->temp_label = nct6795_temp_label;
3958	data->temp_mask = NCT6795_TEMP_MASK;	3982	data->temp_mask = NCT6795_TEMP_MASK;
		3983	data->virt_temp_mask = NCT6795_VIRT_TEMP_MASK;
3959	break;	3984	break;
3960	case nct6796:	3985	case nct6796:
3961	data->temp_label = nct6796_temp_label;	3986	data->temp_label = nct6796_temp_label;
3962	data->temp_mask = NCT6796_TEMP_MASK;	3987	data->temp_mask = NCT6796_TEMP_MASK;
		3988	data->virt_temp_mask = NCT6796_VIRT_TEMP_MASK;
3963	break;	3989	break;
3964	}	3990	}
3965		3991
@@ -4143,7 +4169,7 @@ static int nct6775_probe(struct platform_device *pdev) · 177 unmodified lines
4143	* for each fan reflects a different temperature, and there	4169	* for each fan reflects a different temperature, and there
4144	* are no duplicates.	4170	* are no duplicates.
4145	*/	4171	*/
4146	if (src != TEMP_SOURCE_VIRTUAL) {	4172	if (!(data->virt_temp_mask & BIT(src))) {
4147	if (mask & BIT(src))	4173	if (mask & BIT(src))
4148	continue;	4174	continue;
4149	mask \|= BIT(src);	4175	mask \|= BIT(src);

drivers/hwmon/raspberrypi-hwmon.c+1−0

@@ -164,3 +164,4 @@ module_platform_driver(rpi_hwmon_driver); · 163 unmodified lines
164	MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");	164	MODULE_AUTHOR("Stefan Wahren <stefan.wahren@i2se.com>");
165	MODULE_DESCRIPTION("Raspberry Pi voltage sensor driver");	165	MODULE_DESCRIPTION("Raspberry Pi voltage sensor driver");
166	MODULE_LICENSE("GPL v2");	166	MODULE_LICENSE("GPL v2");
		167	MODULE_ALIAS("platform:raspberrypi-hwmon");

drivers/hwtracing/intel_th/core.c+13−3

 			th->thdev[i] = NULL;
 		}
-		th->num_thdevs = lowest;
+		if (lowest >= 0)
+			th->num_thdevs = lowest;
 	}
 	if (thdrv->attr_group)
 				.flags	= IORESOURCE_MEM,
 			},
 			{
-				.start	= TH_MMIO_SW,
+				.start	= 1, /* use resource[1] */
 				.end	= 0,
 				.flags	= IORESOURCE_MEM,
 			},
 	struct intel_th_device *thdev;
 	struct resource res[3];
 	unsigned int req = 0;
+	bool is64bit = false;
 	int r, err;
 	thdev = intel_th_device_alloc(th, subdev->type, subdev->name,
 	thdev->drvdata = th->drvdata;
+	for (r = 0; r < th->num_resources; r++)
+		if (th->resource[r].flags & IORESOURCE_MEM_64) {
+			is64bit = true;
+			break;
+		}
 	memcpy(res, subdev->res,
 	       sizeof(struct resource) * subdev->nres);
 	for (r = 0; r < subdev->nres; r++) {
 		struct resource *devres = th->resource;
-		int bar = TH_MMIO_CONFIG;
+		int bar = 0; /* cut subdevices' MMIO from resource[0] */
 		/*
 		 * Take .end == 0 to mean 'take the whole bar',
 		 */
 		if (!res[r].end && res[r].flags == IORESOURCE_MEM) {
 			bar = res[r].start;
+			if (is64bit)
+				bar *= 2;
 			res[r].start = 0;
 			res[r].end = resource_size(&devres[bar]) - 1;
 		}

drivers/hwtracing/intel_th/pci.c+5−0

 		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x18e1),
 		.driver_data = (kernel_ulong_t)&intel_th_2x,
 	},
+	{
+		/* Ice Lake PCH */
+		PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x34a6),
+		.driver_data = (kernel_ulong_t)&intel_th_2x,
+	},
 	{ 0 },
 };

drivers/i2c/busses/i2c-i801.c+6−1

 #define SBREG_BAR		0x10
 #define SBREG_SMBCTRL		0xc6000c
+#define SBREG_SMBCTRL_DNV	0xcf000c
 /* Host status bits for SMBPCISTS */
 #define SMBPCISTS_INTS		BIT(3)
 	spin_unlock(&p2sb_spinlock);
 	res = &tco_res[ICH_RES_MEM_OFF];
-	res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
+	if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
+	else
+		res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
 	res->end = res->start + 3;
 	res->flags = IORESOURCE_MEM;

drivers/i2c/busses/i2c-imx-lpi2c.c+0−1

@@ -538,7 +538,6 @@ static const struct i2c_algorithm lpi2c_imx_algo = { · 537 unmodified lines
538		538
539	static const struct of_device_id lpi2c_imx_of_match[] = {	539	static const struct of_device_id lpi2c_imx_of_match[] = {
540	{ .compatible = "fsl,imx7ulp-lpi2c" },	540	{ .compatible = "fsl,imx7ulp-lpi2c" },
541	{ .compatible = "fsl,imx8dv-lpi2c" },
542	{ },	541	{ },
543	};	542	};
544	MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match);	543	MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match);

drivers/i2c/busses/i2c-uniphier-f.c+2−5

 		return ret;
 	for (msg = msgs; msg < emsg; msg++) {
-		/* If next message is read, skip the stop condition */
+		/* Emit STOP if it is the last message or I2C_M_STOP is set. */
-		bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD);
+		bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
-		/* but, force it if I2C_M_STOP is set */
-		if (msg->flags & I2C_M_STOP)
-			stop = true;
 		ret = uniphier_fi2c_master_xfer_one(adap, msg, stop);
 		if (ret)

drivers/i2c/busses/i2c-uniphier.c+2−5

 		return ret;
 	for (msg = msgs; msg < emsg; msg++) {
-		/* If next message is read, skip the stop condition */
+		/* Emit STOP if it is the last message or I2C_M_STOP is set. */
-		bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD);
+		bool stop = (msg + 1 == emsg) || (msg->flags & I2C_M_STOP);
-		/* but, force it if I2C_M_STOP is set */
-		if (msg->flags & I2C_M_STOP)
-			stop = true;
 		ret = uniphier_i2c_master_xfer_one(adap, msg, stop);
 		if (ret)

drivers/i2c/busses/i2c-xiic.c+4−0

 {
 	u8 rx_watermark;
 	struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg;
+	unsigned long flags;
 	/* Clear and enable Rx full interrupt. */
 	xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK);
 		rx_watermark = IIC_RX_FIFO_DEPTH;
 	xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1);
+	local_irq_save(flags);
 	if (!(msg->flags & I2C_M_NOSTART))
 		/* write the address */
 		xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
 	xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
 		msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0));
+	local_irq_restore(flags);
 	if (i2c->nmsgs == 1)
 		/* very last, enable bus not busy as well */
 		xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_buffer.c+6−7

 int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, u16 watermark)
 {
-	u16 fifo_watermark = ~0, cur_watermark, sip = 0, fifo_th_mask;
+	u16 fifo_watermark = ~0, cur_watermark, fifo_th_mask;
 	struct st_lsm6dsx_hw *hw = sensor->hw;
 	struct st_lsm6dsx_sensor *cur_sensor;
 	int i, err, data;
 	__le16 wdata;
+	if (!hw->sip)
+		return 0;
 	for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
 		cur_sensor = iio_priv(hw->iio_devs[i]);
 						       : cur_sensor->watermark;
 		fifo_watermark = min_t(u16, fifo_watermark, cur_watermark);
-		sip += cur_sensor->sip;
 	}
-	if (!sip)
+	fifo_watermark = max_t(u16, fifo_watermark, hw->sip);
-		return 0;
+	fifo_watermark = (fifo_watermark / hw->sip) * hw->sip;
-	fifo_watermark = max_t(u16, fifo_watermark, sip);
-	fifo_watermark = (fifo_watermark / sip) * sip;
 	fifo_watermark = fifo_watermark * hw->settings->fifo_ops.th_wl;
 	err = regmap_read(hw->regmap, hw->settings->fifo_ops.fifo_th.addr + 1,

drivers/iio/temperature/maxim_thermocouple.c+0−1

@@ -258,7 +258,6 @@ static int maxim_thermocouple_remove(struct spi_device *spi) · 257 unmodified lines
258	static const struct spi_device_id maxim_thermocouple_id[] = {	258	static const struct spi_device_id maxim_thermocouple_id[] = {
259	{"max6675", MAX6675},	259	{"max6675", MAX6675},
260	{"max31855", MAX31855},	260	{"max31855", MAX31855},
261	{"max31856", MAX31855},
262	{},	261	{},
263	};	262	};
264	MODULE_DEVICE_TABLE(spi, maxim_thermocouple_id);	263	MODULE_DEVICE_TABLE(spi, maxim_thermocouple_id);

drivers/infiniband/core/cache.c+34−34

 	return 0;
 }
+/**
+ * del_gid - Delete GID table entry
+ *
+ * @ib_dev:	IB device whose GID entry to be deleted
+ * @port:	Port number of the IB device
+ * @table:	GID table of the IB device for a port
+ * @ix:		GID entry index to delete
+ *
+ */
+static void del_gid(struct ib_device *ib_dev, u8 port,
+		    struct ib_gid_table *table, int ix)
+{
+	struct ib_gid_table_entry *entry;
+	lockdep_assert_held(&table->lock);
+	pr_debug("%s device=%s port=%d index=%d gid %pI6\n", __func__,
+		 ib_dev->name, port, ix,
+		 table->data_vec[ix]->attr.gid.raw);
+	write_lock_irq(&table->rwlock);
+	entry = table->data_vec[ix];
+	entry->state = GID_TABLE_ENTRY_PENDING_DEL;
+	/*
+	 * For non RoCE protocol, GID entry slot is ready to use.
+	 */
+	if (!rdma_protocol_roce(ib_dev, port))
+		table->data_vec[ix] = NULL;
+	write_unlock_irq(&table->rwlock);
+	put_gid_entry_locked(entry);
+}
 /**
  * add_modify_gid - Add or modify GID table entry
  *
 	 * this index.
 	 */
 	if (is_gid_entry_valid(table->data_vec[attr->index]))
-		put_gid_entry(table->data_vec[attr->index]);
+		del_gid(attr->device, attr->port_num, table, attr->index);
 	/*
 	 * Some HCA's report multiple GID entries with only one valid GID, and
 	return ret;
 }
-/**
- * del_gid - Delete GID table entry
- *
- * @ib_dev:	IB device whose GID entry to be deleted
- * @port:	Port number of the IB device
- * @table:	GID table of the IB device for a port
- * @ix:		GID entry index to delete
- *
- */
-static void del_gid(struct ib_device *ib_dev, u8 port,
-		    struct ib_gid_table *table, int ix)
-{
-	struct ib_gid_table_entry *entry;
-	lockdep_assert_held(&table->lock);
-	pr_debug("%s device=%s port=%d index=%d gid %pI6\n", __func__,
-		 ib_dev->name, port, ix,
-		 table->data_vec[ix]->attr.gid.raw);
-	write_lock_irq(&table->rwlock);
-	entry = table->data_vec[ix];
-	entry->state = GID_TABLE_ENTRY_PENDING_DEL;
-	/*
-	 * For non RoCE protocol, GID entry slot is ready to use.
-	 */
-	if (!rdma_protocol_roce(ib_dev, port))
-		table->data_vec[ix] = NULL;
-	write_unlock_irq(&table->rwlock);
-	put_gid_entry_locked(entry);
-}
 /* rwlock should be read locked, or lock should be held */
 static int find_gid(struct ib_gid_table *table, const union ib_gid *gid,
 		    const struct ib_gid_attr *val, bool default_gid,

drivers/infiniband/core/cma.c+7−5

@@ -724,6 +724,7 @@ static int cma_resolve_ib_dev(struct rdma_id_private *id_priv) · 723 unmodified lines
724	dgid = (union ib_gid *) &addr->sib_addr;	724	dgid = (union ib_gid *) &addr->sib_addr;
725	pkey = ntohs(addr->sib_pkey);	725	pkey = ntohs(addr->sib_pkey);
726		726
		727	mutex_lock(&lock);
727	list_for_each_entry(cur_dev, &dev_list, list) {	728	list_for_each_entry(cur_dev, &dev_list, list) {
728	for (p = 1; p <= cur_dev->device->phys_port_cnt; ++p) {	729	for (p = 1; p <= cur_dev->device->phys_port_cnt; ++p) {
729	if (!rdma_cap_af_ib(cur_dev->device, p))	730	if (!rdma_cap_af_ib(cur_dev->device, p))
@@ -750,18 +751,19 @@ static int cma_resolve_ib_dev(struct rdma_id_private *id_priv) · 20 unmodified lines
750	cma_dev = cur_dev;	751	cma_dev = cur_dev;
751	sgid = gid;	752	sgid = gid;
752	id_priv->id.port_num = p;	753	id_priv->id.port_num = p;
		754	goto found;
753	}	755	}
754	}	756	}
755	}	757	}
756	}	758	}
757		759	mutex_unlock(&lock);
758	if (!cma_dev)	760	return -ENODEV;
759	return -ENODEV;
760		761
761	found:	762	found:
762	cma_attach_to_dev(id_priv, cma_dev);	763	cma_attach_to_dev(id_priv, cma_dev);
763	addr = (struct sockaddr_ib *) cma_src_addr(id_priv);	764	mutex_unlock(&lock);
764	memcpy(&addr->sib_addr, &sgid, sizeof sgid);	765	addr = (struct sockaddr_ib *)cma_src_addr(id_priv);
		766	memcpy(&addr->sib_addr, &sgid, sizeof(sgid));
765	cma_translate_ib(addr, &id_priv->id.route.addr.dev_addr);	767	cma_translate_ib(addr, &id_priv->id.route.addr.dev_addr);
766	return 0;	768	return 0;
767	}	769	}

drivers/infiniband/core/rdma_core.c+2−0

 		WARN_ON(uverbs_try_lock_object(obj, UVERBS_LOOKUP_WRITE));
 		if (!uverbs_destroy_uobject(obj, reason))
 			ret = 0;
+		else
+			atomic_set(&obj->usecnt, 0);
 	}
 	return ret;
 }

drivers/infiniband/core/ucma.c+8−0

 static DEFINE_IDR(ctx_idr);
 static DEFINE_IDR(multicast_idr);
+static const struct file_operations ucma_fops;
 static inline struct ucma_context *_ucma_find_context(int id,
 						      struct ucma_file *file)
 {
 	f = fdget(cmd.fd);
 	if (!f.file)
 		return -ENOENT;
+	if (f.file->f_op != &ucma_fops) {
+		ret = -EINVAL;
+		goto file_put;
+	}
 	/* Validate current fd and prevent destruction of id. */
 	ctx = ucma_get_ctx(f.file->private_data, cmd.id);
 		mutex_lock(&mut);
 		if (!ctx->closing) {
 			mutex_unlock(&mut);
+			ucma_put_ctx(ctx);
+			wait_for_completion(&ctx->comp);
 			/* rdma_destroy_id ensures that no event handlers are
 			 * inflight for that id before releasing it.
 			 */

drivers/infiniband/core/uverbs_cmd.c+45−23

@@ -2027,33 +2027,55 @@ static int modify_qp(struct ib_uverbs_file *file, · 2026 unmodified lines
2027		2027
2028	if ((cmd->base.attr_mask & IB_QP_CUR_STATE &&	2028	if ((cmd->base.attr_mask & IB_QP_CUR_STATE &&
2029	cmd->base.cur_qp_state > IB_QPS_ERR) \|\|	2029	cmd->base.cur_qp_state > IB_QPS_ERR) \|\|
2030	cmd->base.qp_state > IB_QPS_ERR) {	2030	(cmd->base.attr_mask & IB_QP_STATE &&
		2031	cmd->base.qp_state > IB_QPS_ERR)) {
2031	ret = -EINVAL;	2032	ret = -EINVAL;
2032	goto release_qp;	2033	goto release_qp;
2033	}	2034	}
2034		2035
2035	attr->qp_state = cmd->base.qp_state;	2036	if (cmd->base.attr_mask & IB_QP_STATE)
2036	attr->cur_qp_state = cmd->base.cur_qp_state;	2037	attr->qp_state = cmd->base.qp_state;
2037	attr->path_mtu = cmd->base.path_mtu;	2038	if (cmd->base.attr_mask & IB_QP_CUR_STATE)
2038	attr->path_mig_state = cmd->base.path_mig_state;	2039	attr->cur_qp_state = cmd->base.cur_qp_state;
2039	attr->qkey = cmd->base.qkey;	2040	if (cmd->base.attr_mask & IB_QP_PATH_MTU)
2040	attr->rq_psn = cmd->base.rq_psn;	2041	attr->path_mtu = cmd->base.path_mtu;
2041	attr->sq_psn = cmd->base.sq_psn;	2042	if (cmd->base.attr_mask & IB_QP_PATH_MIG_STATE)
2042	attr->dest_qp_num = cmd->base.dest_qp_num;	2043	attr->path_mig_state = cmd->base.path_mig_state;
2043	attr->qp_access_flags = cmd->base.qp_access_flags;	2044	if (cmd->base.attr_mask & IB_QP_QKEY)
2044	attr->pkey_index = cmd->base.pkey_index;	2045	attr->qkey = cmd->base.qkey;
2045	attr->alt_pkey_index = cmd->base.alt_pkey_index;	2046	if (cmd->base.attr_mask & IB_QP_RQ_PSN)
2046	attr->en_sqd_async_notify = cmd->base.en_sqd_async_notify;	2047	attr->rq_psn = cmd->base.rq_psn;
2047	attr->max_rd_atomic = cmd->base.max_rd_atomic;	2048	if (cmd->base.attr_mask & IB_QP_SQ_PSN)
2048	attr->max_dest_rd_atomic = cmd->base.max_dest_rd_atomic;	2049	attr->sq_psn = cmd->base.sq_psn;
2049	attr->min_rnr_timer = cmd->base.min_rnr_timer;	2050	if (cmd->base.attr_mask & IB_QP_DEST_QPN)
2050	attr->port_num = cmd->base.port_num;	2051	attr->dest_qp_num = cmd->base.dest_qp_num;
2051	attr->timeout = cmd->base.timeout;	2052	if (cmd->base.attr_mask & IB_QP_ACCESS_FLAGS)
2052	attr->retry_cnt = cmd->base.retry_cnt;	2053	attr->qp_access_flags = cmd->base.qp_access_flags;
2053	attr->rnr_retry = cmd->base.rnr_retry;	2054	if (cmd->base.attr_mask & IB_QP_PKEY_INDEX)
2054	attr->alt_port_num = cmd->base.alt_port_num;	2055	attr->pkey_index = cmd->base.pkey_index;
2055	attr->alt_timeout = cmd->base.alt_timeout;	2056	if (cmd->base.attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY)
2056	attr->rate_limit = cmd->rate_limit;	2057	attr->en_sqd_async_notify = cmd->base.en_sqd_async_notify;
		2058	if (cmd->base.attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
		2059	attr->max_rd_atomic = cmd->base.max_rd_atomic;
		2060	if (cmd->base.attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
		2061	attr->max_dest_rd_atomic = cmd->base.max_dest_rd_atomic;
		2062	if (cmd->base.attr_mask & IB_QP_MIN_RNR_TIMER)
		2063	attr->min_rnr_timer = cmd->base.min_rnr_timer;
		2064	if (cmd->base.attr_mask & IB_QP_PORT)
		2065	attr->port_num = cmd->base.port_num;
		2066	if (cmd->base.attr_mask & IB_QP_TIMEOUT)
		2067	attr->timeout = cmd->base.timeout;
		2068	if (cmd->base.attr_mask & IB_QP_RETRY_CNT)
		2069	attr->retry_cnt = cmd->base.retry_cnt;
		2070	if (cmd->base.attr_mask & IB_QP_RNR_RETRY)
		2071	attr->rnr_retry = cmd->base.rnr_retry;
		2072	if (cmd->base.attr_mask & IB_QP_ALT_PATH) {
		2073	attr->alt_port_num = cmd->base.alt_port_num;
		2074	attr->alt_timeout = cmd->base.alt_timeout;
		2075	attr->alt_pkey_index = cmd->base.alt_pkey_index;
		2076	}
		2077	if (cmd->base.attr_mask & IB_QP_RATE_LIMIT)
		2078	attr->rate_limit = cmd->rate_limit;
2057		2079
2058	if (cmd->base.attr_mask & IB_QP_AV)	2080	if (cmd->base.attr_mask & IB_QP_AV)
2059	copy_ah_attr_from_uverbs(qp->device, &attr->ah_attr,	2081	copy_ah_attr_from_uverbs(qp->device, &attr->ah_attr,

drivers/infiniband/core/uverbs_main.c+3−3

 			list_del(&entry->obj_list);
 		kfree(entry);
 	}
+	file->ev_queue.is_closed = 1;
 	spin_unlock_irq(&file->ev_queue.lock);
 	uverbs_close_fd(filp);
 	uverbs_dev->num_comp_vectors = device->num_comp_vectors;
 	if (ib_uverbs_create_uapi(device, uverbs_dev))
-		goto err;
+		goto err_uapi;
 	cdev_init(&uverbs_dev->cdev, NULL);
 	uverbs_dev->cdev.owner = THIS_MODULE;
 err_class:
 	device_destroy(uverbs_class, uverbs_dev->cdev.dev);
 err_cdev:
 	cdev_del(&uverbs_dev->cdev);
+err_uapi:
 	clear_bit(devnum, dev_map);
 err:
 	if (atomic_dec_and_test(&uverbs_dev->refcount))
 		ib_uverbs_comp_dev(uverbs_dev);

drivers/infiniband/core/uverbs_uapi.c+1−0

@@ -248,6 +248,7 @@ void uverbs_destroy_api(struct uverbs_api *uapi) · 247 unmodified lines
248	kfree(rcu_dereference_protected(*slot, true));	248	kfree(rcu_dereference_protected(*slot, true));
249	radix_tree_iter_delete(&uapi->radix, &iter, slot);	249	radix_tree_iter_delete(&uapi->radix, &iter, slot);
250	}	250	}
		251	kfree(uapi);
251	}	252	}
252		253
253	struct uverbs_api *uverbs_alloc_api(	254	struct uverbs_api *uverbs_alloc_api(

drivers/infiniband/hw/bnxt_re/ib_verbs.c+2−0

 				"Failed to destroy Shadow QP");
 			return rc;
 		}
+		bnxt_qplib_free_qp_res(&rdev->qplib_res,
+				       &rdev->qp1_sqp->qplib_qp);
 		mutex_lock(&rdev->qp_lock);
 		list_del(&rdev->qp1_sqp->list);
 		atomic_dec(&rdev->qp_count);

drivers/infiniband/hw/bnxt_re/main.c+38−55

 /* Mutex to protect the list of bnxt_re devices added */
 static DEFINE_MUTEX(bnxt_re_dev_lock);
 static struct workqueue_struct *bnxt_re_wq;
-static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait);
+static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev);
 /* SR-IOV helper functions */
 	if (!rdev)
 		return;
-	bnxt_re_ib_unreg(rdev, false);
+	bnxt_re_ib_unreg(rdev);
 }
 static void bnxt_re_stop_irq(void *handle)
 /* Driver registration routines used to let the networking driver (bnxt_en)
  * to know that the RoCE driver is now installed
  */
-static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait)
+static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev)
 {
 	struct bnxt_en_dev *en_dev;
 	int rc;
 		return -EINVAL;
 	en_dev = rdev->en_dev;
-	/* Acquire rtnl lock if it is not invokded from netdev event */
-	if (lock_wait)
-		rtnl_lock();
 	rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev,
 						    BNXT_ROCE_ULP);
-	if (lock_wait)
-		rtnl_unlock();
 	return rc;
 }
 	en_dev = rdev->en_dev;
-	rtnl_lock();
 	rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP,
 						  &bnxt_re_ulp_ops, rdev);
-	rtnl_unlock();
 	return rc;
 }
-static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait)
+static int bnxt_re_free_msix(struct bnxt_re_dev *rdev)
 {
 	struct bnxt_en_dev *en_dev;
 	int rc;
 	en_dev = rdev->en_dev;
-	if (lock_wait)
-		rtnl_lock();
 	rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP);
-	if (lock_wait)
-		rtnl_unlock();
 	return rc;
 }
 	num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus());
-	rtnl_lock();
 	num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP,
 							 rdev->msix_entries,
 							 num_msix_want);
 	}
 	rdev->num_msix = num_msix_got;
 done:
-	rtnl_unlock();
 	return rc;
 }
 	fw_msg->timeout = timeout;
 }
-static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id,
+static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id)
-				 bool lock_wait)
 {
 	struct bnxt_en_dev *en_dev = rdev->en_dev;
 	struct hwrm_ring_free_input req = {0};
 	struct hwrm_ring_free_output resp;
 	struct bnxt_fw_msg fw_msg;
-	bool do_unlock = false;
 	int rc = -EINVAL;
 	if (!en_dev)
 		return rc;
 	memset(&fw_msg, 0, sizeof(fw_msg));
-	if (lock_wait) {
-		rtnl_lock();
-		do_unlock = true;
-	}
 	bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1);
 	req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL;
 	if (rc)
 		dev_err(rdev_to_dev(rdev),
 			"Failed to free HW ring:%d :%#x", req.ring_id, rc);
-	if (do_unlock)
-		rtnl_unlock();
 	return rc;
 }
 		return rc;
 	memset(&fw_msg, 0, sizeof(fw_msg));
-	rtnl_lock();
 	bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1);
 	req.enables = 0;
 	req.page_tbl_addr =  cpu_to_le64(dma_arr[0]);
 	if (!rc)
 		*fw_ring_id = le16_to_cpu(resp.ring_id);
-	rtnl_unlock();
 	return rc;
 }
 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev,
-				      u32 fw_stats_ctx_id, bool lock_wait)
+				      u32 fw_stats_ctx_id)
 {
 	struct bnxt_en_dev *en_dev = rdev->en_dev;
 	struct hwrm_stat_ctx_free_input req = {0};
 	struct bnxt_fw_msg fw_msg;
-	bool do_unlock = false;
 	int rc = -EINVAL;
 	if (!en_dev)
 		return rc;
 	memset(&fw_msg, 0, sizeof(fw_msg));
-	if (lock_wait) {
-		rtnl_lock();
-		do_unlock = true;
-	}
 	bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1);
 	req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id);
 		dev_err(rdev_to_dev(rdev),
 			"Failed to free HW stats context %#x", rc);
-	if (do_unlock)
-		rtnl_unlock();
 	return rc;
 }
 		return rc;
 	memset(&fw_msg, 0, sizeof(fw_msg));
-	rtnl_lock();
 	bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1);
 	req.update_period_ms = cpu_to_le32(1000);
 	if (!rc)
 		*fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id);
-	rtnl_unlock();
 	return rc;
 }
 	return rc;
 }
-static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev, bool lock_wait)
+static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev)
 {
 	int i;
 	for (i = 0; i < rdev->num_msix - 1; i++) {
-		bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, lock_wait);
+		bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id);
 		bnxt_qplib_free_nq(&rdev->nq[i]);
 	}
 }
-static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait)
+static void bnxt_re_free_res(struct bnxt_re_dev *rdev)
 {
-	bnxt_re_free_nq_res(rdev, lock_wait);
+	bnxt_re_free_nq_res(rdev);
 	if (rdev->qplib_res.dpi_tbl.max) {
 		bnxt_qplib_dealloc_dpi(&rdev->qplib_res,
 	return 0;
 }
-static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait)
+static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev)
 {
 	int i, rc;
 		cancel_delayed_work(&rdev->worker);
 	bnxt_re_cleanup_res(rdev);
-	bnxt_re_free_res(rdev, lock_wait);
+	bnxt_re_free_res(rdev);
 	if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) {
 		rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw);
 		if (rc)
 			dev_warn(rdev_to_dev(rdev),
 				 "Failed to deinitialize RCFW: %#x", rc);
-		bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id,
+		bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
-					   lock_wait);
 		bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
 		bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
-		bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait);
+		bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id);
 		bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
 	}
 	if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) {
-		rc = bnxt_re_free_msix(rdev, lock_wait);
+		rc = bnxt_re_free_msix(rdev);
 		if (rc)
 			dev_warn(rdev_to_dev(rdev),
 				 "Failed to free MSI-X vectors: %#x", rc);
 	}
 	if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) {
-		rc = bnxt_re_unregister_netdev(rdev, lock_wait);
+		rc = bnxt_re_unregister_netdev(rdev);
 		if (rc)
 			dev_warn(rdev_to_dev(rdev),
 				 "Failed to unregister with netdev: %#x", rc);
 {
 	int i, j, rc;
+	bool locked;
+	/* Acquire rtnl lock through out this function */
+	rtnl_lock();
+	locked = true;
 	/* Registered a new RoCE device instance to netdev */
 	rc = bnxt_re_register_netdev(rdev);
 	if (rc) {
 		schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000));
 	}
+	rtnl_unlock();
+	locked = false;
 	/* Register ib dev */
 	rc = bnxt_re_register_ib(rdev);
 	if (rc) {
 		pr_err("Failed to register with IB: %#x\n", rc);
 		goto fail;
 	}
+	set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
 	dev_info(rdev_to_dev(rdev), "Device registered successfully");
 	for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) {
 		rc = device_create_file(&rdev->ibdev.dev,
 			goto fail;
 		}
 	}
-	set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags);
 	ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed,
 			 &rdev->active_width);
 	set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags);
 	return 0;
 free_sctx:
-	bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true);
+	bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id);
 free_ctx:
 	bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx);
 disable_rcfw:
 	bnxt_qplib_disable_rcfw_channel(&rdev->rcfw);
 free_ring:
-	bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true);
+	bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id);
 free_rcfw:
 	bnxt_qplib_free_rcfw_channel(&rdev->rcfw);
 fail:
-	bnxt_re_ib_unreg(rdev, true);
+	if (!locked)
+		rtnl_lock();
+	bnxt_re_ib_unreg(rdev);
+	rtnl_unlock();
 	return rc;
 }
 		 */
 		if (atomic_read(&rdev->sched_count) > 0)
 			goto exit;
-		bnxt_re_ib_unreg(rdev, false);
+		bnxt_re_ib_unreg(rdev);
 		bnxt_re_remove_one(rdev);
 		bnxt_re_dev_unreg(rdev);
 		break;
 		 */
 		flush_workqueue(bnxt_re_wq);
 		bnxt_re_dev_stop(rdev);
-		bnxt_re_ib_unreg(rdev, true);
+		/* Acquire the rtnl_lock as the L2 resources are freed here */
+		rtnl_lock();
+		bnxt_re_ib_unreg(rdev);
+		rtnl_unlock();
 		bnxt_re_remove_one(rdev);
 		bnxt_re_dev_unreg(rdev);
 	}

drivers/infiniband/hw/bnxt_re/qplib_fp.c+1−1

@@ -196,7 +196,7 @@ static int bnxt_qplib_alloc_qp_hdr_buf(struct bnxt_qplib_res *res, · 195 unmodified lines
196	struct bnxt_qplib_qp *qp)	196	struct bnxt_qplib_qp *qp)
197	{	197	{
198	struct bnxt_qplib_q *rq = &qp->rq;	198	struct bnxt_qplib_q *rq = &qp->rq;
199	struct bnxt_qplib_q *sq = &qp->rq;	199	struct bnxt_qplib_q *sq = &qp->sq;
200	int rc = 0;	200	int rc = 0;
201		201
202	if (qp->sq_hdr_buf_size && sq->hwq.max_elements) {	202	if (qp->sq_hdr_buf_size && sq->hwq.max_elements) {

drivers/infiniband/hw/cxgb4/qp.c+6−0

 	schp = to_c4iw_cq(qhp->ibqp.send_cq);
 	if (qhp->ibqp.uobject) {
+		/* for user qps, qhp->wq.flushed is protected by qhp->mutex */
+		if (qhp->wq.flushed)
+			return;
+		qhp->wq.flushed = 1;
 		t4_set_wq_in_error(&qhp->wq, 0);
 		t4_set_cq_in_error(&rchp->cq);
 		spin_lock_irqsave(&rchp->comp_handler_lock, flag);

drivers/infiniband/hw/hfi1/chip.c+5−1

 	struct hfi1_devdata *dd = ppd->dd;
 	struct send_context *sc;
 	int i;
+	int sc_flags;
 	if (flags & FREEZE_SELF)
 		write_csr(dd, CCE_CTRL, CCE_CTRL_SPC_FREEZE_SMASK);
 	/* notify all SDMA engines that they are going into a freeze */
 	sdma_freeze_notify(dd, !!(flags & FREEZE_LINK_DOWN));
+	sc_flags = SCF_FROZEN | SCF_HALTED | (flags & FREEZE_LINK_DOWN ?
+					      SCF_LINK_DOWN : 0);
 	/* do halt pre-handling on all enabled send contexts */
 	for (i = 0; i < dd->num_send_contexts; i++) {
 		sc = dd->send_contexts[i].sc;
 		if (sc && (sc->flags & SCF_ENABLED))
-			sc_stop(sc, SCF_FROZEN | SCF_HALTED);
+			sc_stop(sc, sc_flags);
 	}
 	/* Send context are frozen. Notify user space */
 		add_rcvctrl(dd, RCV_CTRL_RCV_PORT_ENABLE_SMASK);
 		handle_linkup_change(dd, 1);
+		pio_kernel_linkup(dd);
 		/*
 		 * After link up, a new link width will have been set.

drivers/infiniband/hw/hfi1/pcie.c+4−7

 		}
 	/*
-	 * A secondary bus reset (SBR) issues a hot reset to our device.
+	 * This is an end around to do an SBR during probe time. A new API needs
-	 * The following routine does a 1s wait after the reset is dropped
+	 * to be implemented to have cleaner interface but this fixes the
-	 * per PCI Trhfa (recovery time).  PCIe 3.0 section 6.6.1 -
+	 * current brokenness
-	 * Conventional Reset, paragraph 3, line 35 also says that a 1s
-	 * delay after a reset is required.  Per spec requirements,
-	 * the link is either working or not after that point.
 	 */
-	return pci_reset_bus(dev);
+	return pci_bridge_secondary_bus_reset(dev->bus->self);
 }
 /*

drivers/infiniband/hw/hfi1/pio.c+41−10

 	unsigned long flags;
 	int write = 1;	/* write sendctrl back */
 	int flush = 0;	/* re-read sendctrl to make sure it is flushed */
+	int i;
 	spin_lock_irqsave(&dd->sendctrl_lock, flags);
 		reg |= SEND_CTRL_SEND_ENABLE_SMASK;
 	/* Fall through */
 	case PSC_DATA_VL_ENABLE:
+		mask = 0;
+		for (i = 0; i < ARRAY_SIZE(dd->vld); i++)
+			if (!dd->vld[i].mtu)
+				mask |= BIT_ULL(i);
 		/* Disallow sending on VLs not enabled */
-		mask = (((~0ull) << num_vls) & SEND_CTRL_UNSUPPORTED_VL_MASK) <<
+		mask = (mask & SEND_CTRL_UNSUPPORTED_VL_MASK) <<
-				SEND_CTRL_UNSUPPORTED_VL_SHIFT;
+			SEND_CTRL_UNSUPPORTED_VL_SHIFT;
 		reg = (reg & ~SEND_CTRL_UNSUPPORTED_VL_SMASK) | mask;
 		break;
 	case PSC_GLOBAL_DISABLE:
 void sc_disable(struct send_context *sc)
 {
 	u64 reg;
-	unsigned long flags;
 	struct pio_buf *pbuf;
 	if (!sc)
 		return;
 	/* do all steps, even if already disabled */
-	spin_lock_irqsave(&sc->alloc_lock, flags);
+	spin_lock_irq(&sc->alloc_lock);
 	reg = read_kctxt_csr(sc->dd, sc->hw_context, SC(CTRL));
 	reg &= ~SC(CTRL_CTXT_ENABLE_SMASK);
 	sc->flags &= ~SCF_ENABLED;
 	sc_wait_for_packet_egress(sc, 1);
 	write_kctxt_csr(sc->dd, sc->hw_context, SC(CTRL), reg);
-	spin_unlock_irqrestore(&sc->alloc_lock, flags);
 	/*
 	 * Flush any waiters.  Once the context is disabled,
 	 * proceed with the flush.
 	 */
 	udelay(1);
-	spin_lock_irqsave(&sc->release_lock, flags);
+	spin_lock(&sc->release_lock);
 	if (sc->sr) {	/* this context has a shadow ring */
 		while (sc->sr_tail != sc->sr_head) {
 			pbuf = &sc->sr[sc->sr_tail].pbuf;
 				sc->sr_tail = 0;
 		}
 	}
-	spin_unlock_irqrestore(&sc->release_lock, flags);
+	spin_unlock(&sc->release_lock);
+	spin_unlock_irq(&sc->alloc_lock);
 }
 /* return SendEgressCtxtStatus.PacketOccupancy */
 		sc = dd->send_contexts[i].sc;
 		if (!sc || !(sc->flags & SCF_FROZEN) || sc->type == SC_USER)
 			continue;
+		if (sc->flags & SCF_LINK_DOWN)
+			continue;
 		sc_enable(sc);	/* will clear the sc frozen flag */
 	}
 }
+/**
+ * pio_kernel_linkup() - Re-enable send contexts after linkup event
+ * @dd: valid devive data
+ *
+ * When the link goes down, the freeze path is taken.  However, a link down
+ * event is different from a freeze because if the send context is re-enabled
+ * whowever is sending data will start sending data again, which will hang
+ * any QP that is sending data.
+ *
+ * The freeze path now looks at the type of event that occurs and takes this
+ * path for link down event.
+ */
+void pio_kernel_linkup(struct hfi1_devdata *dd)
+{
+	struct send_context *sc;
+	int i;
+	for (i = 0; i < dd->num_send_contexts; i++) {
+		sc = dd->send_contexts[i].sc;
+		if (!sc || !(sc->flags & SCF_LINK_DOWN) || sc->type == SC_USER)
+			continue;
+		sc_enable(sc);	/* will clear the sc link down flag */
+	}
+}
 /*
  * Wait for the SendPioInitCtxt.PioInitInProgress bit to clear.
  * Returns:
 {
 	unsigned long flags;
-	/* mark the context */
-	sc->flags |= flag;
 	/* stop buffer allocations */
 	spin_lock_irqsave(&sc->alloc_lock, flags);
+	/* mark the context */
+	sc->flags |= flag;
 	sc->flags &= ~SCF_ENABLED;
 	spin_unlock_irqrestore(&sc->alloc_lock, flags);
 	wake_up(&sc->halt_wait);

drivers/infiniband/hw/hfi1/pio.h+2−0

 #define SCF_IN_FREE 0x02
 #define SCF_HALTED  0x04
 #define SCF_FROZEN  0x08
+#define SCF_LINK_DOWN 0x10
 struct send_context_info {
 	struct send_context *sc;	/* allocated working context */
 void pio_reset_all(struct hfi1_devdata *dd);
 void pio_freeze(struct hfi1_devdata *dd);
 void pio_kernel_unfreeze(struct hfi1_devdata *dd);
+void pio_kernel_linkup(struct hfi1_devdata *dd);
 /* global PIO send control operations */
 #define PSC_GLOBAL_ENABLE 0

drivers/infiniband/hw/hfi1/user_sdma.c+1−1

@@ -828,7 +828,7 @@ static int user_sdma_send_pkts(struct user_sdma_request *req, unsigned maxpkts) · 827 unmodified lines
828	if (READ_ONCE(iovec->offset) == iovec->iov.iov_len) {	828	if (READ_ONCE(iovec->offset) == iovec->iov.iov_len) {
829	if (++req->iov_idx == req->data_iovs) {	829	if (++req->iov_idx == req->data_iovs) {
830	ret = -EFAULT;	830	ret = -EFAULT;
831	goto free_txreq;	831	goto free_tx;
832	}	832	}
833	iovec = &req->iovs[req->iov_idx];	833	iovec = &req->iovs[req->iov_idx];
834	WARN_ON(iovec->offset);	834	WARN_ON(iovec->offset);

drivers/infiniband/hw/hfi1/verbs.c+7−1

 	struct hfi1_pportdata *ppd;
 	struct hfi1_devdata *dd;
 	u8 sc5;
+	u8 sl;
 	if (hfi1_check_mcast(rdma_ah_get_dlid(ah_attr)) &&
 	    !(rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH))
 	/* test the mapping for validity */
 	ibp = to_iport(ibdev, rdma_ah_get_port_num(ah_attr));
 	ppd = ppd_from_ibp(ibp);
-	sc5 = ibp->sl_to_sc[rdma_ah_get_sl(ah_attr)];
 	dd = dd_from_ppd(ppd);
+	sl = rdma_ah_get_sl(ah_attr);
+	if (sl >= ARRAY_SIZE(ibp->sl_to_sc))
+		return -EINVAL;
+	sc5 = ibp->sl_to_sc[sl];
 	if (sc_to_vlt(dd, sc5) > num_vls && sc_to_vlt(dd, sc5) != 0xf)
 		return -EINVAL;
 	return 0;

drivers/infiniband/hw/mlx4/main.c+5−3

 	props->page_size_cap	   = dev->dev->caps.page_size_cap;
 	props->max_qp		   = dev->dev->quotas.qp;
 	props->max_qp_wr	   = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
-	props->max_send_sge	   = dev->dev->caps.max_sq_sg;
+	props->max_send_sge =
-	props->max_recv_sge	   = dev->dev->caps.max_rq_sg;
+		min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
-	props->max_sge_rd	   = MLX4_MAX_SGE_RD;
+	props->max_recv_sge =
+		min(dev->dev->caps.max_sq_sg, dev->dev->caps.max_rq_sg);
+	props->max_sge_rd = MLX4_MAX_SGE_RD;
 	props->max_cq		   = dev->dev->quotas.cq;
 	props->max_cqe		   = dev->dev->caps.max_cqes;
 	props->max_mr		   = dev->dev->quotas.mpt;

drivers/infiniband/hw/mlx5/devx.c+4−1

 		attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE);
 	struct mlx5_ib_ucontext *c = to_mucontext(uobj->context);
 	struct mlx5_ib_dev *dev = to_mdev(c->ibucontext.device);
+	u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)];
 	struct devx_obj *obj;
 	int err;
 	err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len);
 	if (err)
-		goto obj_free;
+		goto obj_destroy;
 	return 0;
+obj_destroy:
+	mlx5_cmd_exec(obj->mdev, obj->dinbox, obj->dinlen, out, sizeof(out));
 obj_free:
 	kfree(obj);
 	return err;

drivers/infiniband/ulp/ipoib/ipoib_cm.c+2−0

 	skb_queue_head_init(&skqueue);
+	netif_tx_lock_bh(p->dev);
 	spin_lock_irq(&priv->lock);
 	set_bit(IPOIB_FLAG_OPER_UP, &p->flags);
 	if (p->neigh)
 		while ((skb = __skb_dequeue(&p->neigh->queue)))
 			__skb_queue_tail(&skqueue, skb);
 	spin_unlock_irq(&priv->lock);
+	netif_tx_unlock_bh(p->dev);
 	while ((skb = __skb_dequeue(&skqueue))) {
 		skb->dev = p->dev;

drivers/infiniband/ulp/srp/ib_srp.c+3−3

@@ -2951,7 +2951,7 @@ static int srp_reset_device(struct scsi_cmnd *scmnd) · 2950 unmodified lines
2951	{	2951	{
2952	struct srp_target_port *target = host_to_target(scmnd->device->host);	2952	struct srp_target_port *target = host_to_target(scmnd->device->host);
2953	struct srp_rdma_ch *ch;	2953	struct srp_rdma_ch *ch;
2954	int i;	2954	int i, j;
2955	u8 status;	2955	u8 status;
2956		2956
2957	shost_printk(KERN_ERR, target->scsi_host, "SRP reset_device called\n");	2957	shost_printk(KERN_ERR, target->scsi_host, "SRP reset_device called\n");
@@ -2965,8 +2965,8 @@ static int srp_reset_device(struct scsi_cmnd *scmnd) · 7 unmodified lines
2965		2965
2966	for (i = 0; i < target->ch_count; i++) {	2966	for (i = 0; i < target->ch_count; i++) {
2967	ch = &target->ch[i];	2967	ch = &target->ch[i];
2968	for (i = 0; i < target->req_ring_size; ++i) {	2968	for (j = 0; j < target->req_ring_size; ++j) {
2969	struct srp_request *req = &ch->req_ring[i];	2969	struct srp_request *req = &ch->req_ring[j];
2970		2970
2971	srp_finish_req(ch, req, scmnd->device, DID_RESET << 16);	2971	srp_finish_req(ch, req, scmnd->device, DID_RESET << 16);
2972	}	2972	}

drivers/input/keyboard/atakbd.c+28−46

  */
-static unsigned char atakbd_keycode[0x72] = {	/* American layout */
+static unsigned char atakbd_keycode[0x73] = {	/* American layout */
-	[0]	 = KEY_GRAVE,
 	[1]	 = KEY_ESC,
 	[2]	 = KEY_1,
 	[3]	 = KEY_2,
 	[38]	 = KEY_L,
 	[39]	 = KEY_SEMICOLON,
 	[40]	 = KEY_APOSTROPHE,
-	[41]	 = KEY_BACKSLASH,	/* FIXME, '#' */
+	[41]	 = KEY_GRAVE,
 	[42]	 = KEY_LEFTSHIFT,
-	[43]	 = KEY_GRAVE,		/* FIXME: '~' */
+	[43]	 = KEY_BACKSLASH,
 	[44]	 = KEY_Z,
 	[45]	 = KEY_X,
 	[46]	 = KEY_C,
 	[66]	 = KEY_F8,
 	[67]	 = KEY_F9,
 	[68]	 = KEY_F10,
-	[69]	 = KEY_ESC,
+	[71]	 = KEY_HOME,
-	[70]	 = KEY_DELETE,
+	[72]	 = KEY_UP,
-	[71]	 = KEY_KP7,
-	[72]	 = KEY_KP8,
-	[73]	 = KEY_KP9,
 	[74]	 = KEY_KPMINUS,
-	[75]	 = KEY_KP4,
+	[75]	 = KEY_LEFT,
-	[76]	 = KEY_KP5,
+	[77]	 = KEY_RIGHT,
-	[77]	 = KEY_KP6,
 	[78]	 = KEY_KPPLUS,
-	[79]	 = KEY_KP1,
+	[80]	 = KEY_DOWN,
-	[80]	 = KEY_KP2,
+	[82]	 = KEY_INSERT,
-	[81]	 = KEY_KP3,
+	[83]	 = KEY_DELETE,
-	[82]	 = KEY_KP0,
-	[83]	 = KEY_KPDOT,
-	[90]	 = KEY_KPLEFTPAREN,
-	[91]	 = KEY_KPRIGHTPAREN,
-	[92]	 = KEY_KPASTERISK,	/* FIXME */
-	[93]	 = KEY_KPASTERISK,
-	[94]	 = KEY_KPPLUS,
-	[95]	 = KEY_HELP,
 	[96]	 = KEY_102ND,
-	[97]	 = KEY_KPASTERISK,	/* FIXME */
+	[97]	 = KEY_UNDO,
-	[98]	 = KEY_KPSLASH,
+	[98]	 = KEY_HELP,
 	[99]	 = KEY_KPLEFTPAREN,
 	[100]	 = KEY_KPRIGHTPAREN,
 	[101]	 = KEY_KPSLASH,
 	[102]	 = KEY_KPASTERISK,
-	[103]	 = KEY_UP,
+	[103]	 = KEY_KP7,
-	[104]	 = KEY_KPASTERISK,	/* FIXME */
+	[104]	 = KEY_KP8,
-	[105]	 = KEY_LEFT,
+	[105]	 = KEY_KP9,
-	[106]	 = KEY_RIGHT,
+	[106]	 = KEY_KP4,
-	[107]	 = KEY_KPASTERISK,	/* FIXME */
+	[107]	 = KEY_KP5,
-	[108]	 = KEY_DOWN,
+	[108]	 = KEY_KP6,
-	[109]	 = KEY_KPASTERISK,	/* FIXME */
+	[109]	 = KEY_KP1,
-	[110]	 = KEY_KPASTERISK,	/* FIXME */
+	[110]	 = KEY_KP2,
-	[111]	 = KEY_KPASTERISK,	/* FIXME */
+	[111]	 = KEY_KP3,
-	[112]	 = KEY_KPASTERISK,	/* FIXME */
+	[112]	 = KEY_KP0,
-	[113]	 = KEY_KPASTERISK	/* FIXME */
+	[113]	 = KEY_KPDOT,
+	[114]	 = KEY_KPENTER,
 };
 static struct input_dev *atakbd_dev;
 static void atakbd_interrupt(unsigned char scancode, char down)
 {
-	if (scancode < 0x72) {		/* scancodes < 0xf2 are keys */
+	if (scancode < 0x73) {		/* scancodes < 0xf3 are keys */
 		// report raw events here?
 		scancode = atakbd_keycode[scancode];
-		if (scancode == KEY_CAPSLOCK) {	/* CapsLock is a toggle switch key on Amiga */
+		input_report_key(atakbd_dev, scancode, down);
-			input_report_key(atakbd_dev, scancode, 1);
+		input_sync(atakbd_dev);
-			input_report_key(atakbd_dev, scancode, 0);
+	} else				/* scancodes >= 0xf3 are mouse data, most likely */
-			input_sync(atakbd_dev);
-		} else {
-			input_report_key(atakbd_dev, scancode, down);
-			input_sync(atakbd_dev);
-		}
-	} else				/* scancodes >= 0xf2 are mouse data, most likely */
 		printk(KERN_INFO "atakbd: unhandled scancode %x\n", scancode);
 	return;

drivers/input/misc/uinput.c+1−1

@@ -410,7 +410,7 @@ static int uinput_validate_absinfo(struct input_dev *dev, unsigned int code, · 409 unmodified lines
410	min = abs->minimum;	410	min = abs->minimum;
411	max = abs->maximum;	411	max = abs->maximum;
412		412
413	if ((min != 0 \|\| max != 0) && max <= min) {	413	if ((min != 0 \|\| max != 0) && max < min) {
414	printk(KERN_DEBUG	414	printk(KERN_DEBUG
415	"%s: invalid abs[%02x] min:%d max:%d\n",	415	"%s: invalid abs[%02x] min:%d max:%d\n",
416	UINPUT_NAME, code, min, max);	416	UINPUT_NAME, code, min, max);

drivers/input/mouse/elantech.c+2−0

@@ -1178,6 +1178,8 @@ static const struct dmi_system_id elantech_dmi_has_middle_button[] = { · 1177 unmodified lines
1178	static const char * const middle_button_pnp_ids[] = {	1178	static const char * const middle_button_pnp_ids[] = {
1179	"LEN2131", /* ThinkPad P52 w/ NFC */	1179	"LEN2131", /* ThinkPad P52 w/ NFC */
1180	"LEN2132", /* ThinkPad P52 */	1180	"LEN2132", /* ThinkPad P52 */
		1181	"LEN2133", /* ThinkPad P72 w/ NFC */
		1182	"LEN2134", /* ThinkPad P72 */
1181	NULL	1183	NULL
1182	};	1184	};
1183		1185

drivers/input/touchscreen/egalax_ts.c+6−0

 	struct i2c_client *client = to_i2c_client(dev);
 	int ret;
+	if (device_may_wakeup(dev))
+		return enable_irq_wake(client->irq);
 	ret = i2c_master_send(client, suspend_cmd, MAX_I2C_DATA_LEN);
 	return ret > 0 ? 0 : ret;
 }
 {
 	struct i2c_client *client = to_i2c_client(dev);
+	if (device_may_wakeup(dev))
+		return disable_irq_wake(client->irq);
 	return egalax_wake_up_device(client);
 }

drivers/iommu/amd_iommu.c+6−0

 	/* The callers make sure that get_device_id() does not fail here */
 	devid = get_device_id(dev);
+	/* For ACPI HID devices, we simply return the devid as such */
+	if (!dev_is_pci(dev))
+		return devid;
 	ivrs_alias = amd_iommu_alias_table[devid];
 	pci_for_each_dma_alias(pdev, __last_alias, &pci_alias);
 	if (ivrs_alias == pci_alias)

drivers/iommu/intel-iommu.c+3−3

@@ -2540,9 +2540,9 @@ static struct dmar_domain dmar_insert_one_dev_info(struct intel_iommu iommu, · 2539 unmodified lines
2540	if (dev && dev_is_pci(dev) && info->pasid_supported) {	2540	if (dev && dev_is_pci(dev) && info->pasid_supported) {
2541	ret = intel_pasid_alloc_table(dev);	2541	ret = intel_pasid_alloc_table(dev);
2542	if (ret) {	2542	if (ret) {
2543	__dmar_remove_one_dev_info(info);	2543	pr_warn("No pasid table for %s, pasid disabled\n",
2544	spin_unlock_irqrestore(&device_domain_lock, flags);	2544	dev_name(dev));
2545	return NULL;	2545	info->pasid_supported = 0;
2546	}	2546	}
2547	}	2547	}
2548	spin_unlock_irqrestore(&device_domain_lock, flags);	2548	spin_unlock_irqrestore(&device_domain_lock, flags);

drivers/iommu/intel-pasid.h+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	#define __INTEL_PASID_H	11	#define __INTEL_PASID_H
12		12
13	#define PASID_MIN 0x1	13	#define PASID_MIN 0x1
14	#define PASID_MAX 0x100000	14	#define PASID_MAX 0x20000
15		15
16	struct pasid_entry {	16	struct pasid_entry {
17	u64 val;	17	u64 val;

drivers/iommu/rockchip-iommu.c+6−0

 static void rk_iommu_shutdown(struct platform_device *pdev)
 {
+	struct rk_iommu *iommu = platform_get_drvdata(pdev);
+	int i = 0, irq;
+	while ((irq = platform_get_irq(pdev, i++)) != -ENXIO)
+		devm_free_irq(iommu->dev, irq, iommu);
 	pm_runtime_force_suspend(&pdev->dev);
 }

drivers/irqchip/irq-gic-v3-its.c+3−1

  * The consequence of the above is that allocation is cost is low, but
  * freeing is expensive. We assumes that freeing rarely occurs.
  */
+#define ITS_MAX_LPI_NRBITS	16 /* 64K LPIs */
 static DEFINE_MUTEX(lpi_range_lock);
 static LIST_HEAD(lpi_range_list);
 {
 	phys_addr_t paddr;
-	lpi_id_bits = GICD_TYPER_ID_BITS(gic_rdists->gicd_typer);
+	lpi_id_bits = min_t(u32, GICD_TYPER_ID_BITS(gic_rdists->gicd_typer),
+				ITS_MAX_LPI_NRBITS);
 	gic_rdists->prop_page = its_allocate_prop_table(GFP_NOWAIT);
 	if (!gic_rdists->prop_page) {
 		pr_err("Failed to allocate PROPBASE\n");

drivers/md/bcache/bcache.h+1−0

@@ -965,6 +965,7 @@ void bch_prio_write(struct cache *ca); · 964 unmodified lines
965	void bch_write_bdev_super(struct cached_dev dc, struct closure parent);	965	void bch_write_bdev_super(struct cached_dev dc, struct closure parent);
966		966
967	extern struct workqueue_struct *bcache_wq;	967	extern struct workqueue_struct *bcache_wq;
		968	extern struct workqueue_struct *bch_journal_wq;
968	extern struct mutex bch_register_lock;	969	extern struct mutex bch_register_lock;
969	extern struct list_head bch_cache_sets;	970	extern struct list_head bch_cache_sets;
970		971

drivers/md/bcache/journal.c+3−3

@@ -485,7 +485,7 @@ static void do_journal_discard(struct cache *ca) · 484 unmodified lines
485		485
486	closure_get(&ca->set->cl);	486	closure_get(&ca->set->cl);
487	INIT_WORK(&ja->discard_work, journal_discard_work);	487	INIT_WORK(&ja->discard_work, journal_discard_work);
488	schedule_work(&ja->discard_work);	488	queue_work(bch_journal_wq, &ja->discard_work);
489	}	489	}
490	}	490	}
491		491
@@ -592,7 +592,7 @@ static void journal_write_done(struct closure *cl) · 100 unmodified lines
592	: &j->w[0];	592	: &j->w[0];
593		593
594	__closure_wake_up(&w->wait);	594	__closure_wake_up(&w->wait);
595	continue_at_nobarrier(cl, journal_write, system_wq);	595	continue_at_nobarrier(cl, journal_write, bch_journal_wq);
596	}	596	}
597		597
598	static void journal_write_unlock(struct closure *cl)	598	static void journal_write_unlock(struct closure *cl)
@@ -627,7 +627,7 @@ static void journal_write_unlocked(struct closure *cl) · 28 unmodified lines
627	spin_unlock(&c->journal.lock);	627	spin_unlock(&c->journal.lock);
628		628
629	btree_flush_write(c);	629	btree_flush_write(c);
630	continue_at(cl, journal_write, system_wq);	630	continue_at(cl, journal_write, bch_journal_wq);
631	return;	631	return;
632	}	632	}
633		633

drivers/md/bcache/super.c+8−0

 static DEFINE_IDA(bcache_device_idx);
 static wait_queue_head_t unregister_wait;
 struct workqueue_struct *bcache_wq;
+struct workqueue_struct *bch_journal_wq;
 #define BTREE_MAX_PAGES		(256 * 1024 / PAGE_SIZE)
 /* limitation of partitions number on single bcache device */
 		kobject_put(bcache_kobj);
 	if (bcache_wq)
 		destroy_workqueue(bcache_wq);
+	if (bch_journal_wq)
+		destroy_workqueue(bch_journal_wq);
 	if (bcache_major)
 		unregister_blkdev(bcache_major, "bcache");
 	unregister_reboot_notifier(&reboot);
 	if (!bcache_wq)
 		goto err;
+	bch_journal_wq = alloc_workqueue("bch_journal", WQ_MEM_RECLAIM, 0);
+	if (!bch_journal_wq)
+		goto err;
 	bcache_kobj = kobject_create_and_add("bcache", fs_kobj);
 	if (!bcache_kobj)
 		goto err;

drivers/md/dm-crypt.c+5−5

@@ -332,7 +332,7 @@ static int crypt_iv_essiv_init(struct crypt_config *cc) · 331 unmodified lines
332	int err;	332	int err;
333		333
334	desc->tfm = essiv->hash_tfm;	334	desc->tfm = essiv->hash_tfm;
335	desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;	335	desc->flags = 0;
336		336
337	err = crypto_shash_digest(desc, cc->key, cc->key_size, essiv->salt);	337	err = crypto_shash_digest(desc, cc->key, cc->key_size, essiv->salt);
338	shash_desc_zero(desc);	338	shash_desc_zero(desc);
@@ -606,7 +606,7 @@ static int crypt_iv_lmk_one(struct crypt_config cc, u8 iv, · 267 unmodified lines
606	int i, r;	606	int i, r;
607		607
608	desc->tfm = lmk->hash_tfm;	608	desc->tfm = lmk->hash_tfm;
609	desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;	609	desc->flags = 0;
610		610
611	r = crypto_shash_init(desc);	611	r = crypto_shash_init(desc);
612	if (r)	612	if (r)
@@ -768,7 +768,7 @@ static int crypt_iv_tcw_whitening(struct crypt_config *cc, · 155 unmodified lines
768		768
769	/* calculate crc32 for every 32bit part and xor it */	769	/* calculate crc32 for every 32bit part and xor it */
770	desc->tfm = tcw->crc32_tfm;	770	desc->tfm = tcw->crc32_tfm;
771	desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;	771	desc->flags = 0;
772	for (i = 0; i < 4; i++) {	772	for (i = 0; i < 4; i++) {
773	r = crypto_shash_init(desc);	773	r = crypto_shash_init(desc);
774	if (r)	774	if (r)
@@ -1251,7 +1251,7 @@ static void crypt_alloc_req_skcipher(struct crypt_config *cc, · 476 unmodified lines
1251	* requests if driver request queue is full.	1251	* requests if driver request queue is full.
1252	*/	1252	*/
1253	skcipher_request_set_callback(ctx->r.req,	1253	skcipher_request_set_callback(ctx->r.req,
1254	CRYPTO_TFM_REQ_MAY_BACKLOG \| CRYPTO_TFM_REQ_MAY_SLEEP,	1254	CRYPTO_TFM_REQ_MAY_BACKLOG,
1255	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req));	1255	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req));
1256	}	1256	}
1257		1257
@@ -1268,7 +1268,7 @@ static void crypt_alloc_req_aead(struct crypt_config *cc, · 10 unmodified lines
1268	* requests if driver request queue is full.	1268	* requests if driver request queue is full.
1269	*/	1269	*/
1270	aead_request_set_callback(ctx->r.req_aead,	1270	aead_request_set_callback(ctx->r.req_aead,
1271	CRYPTO_TFM_REQ_MAY_BACKLOG \| CRYPTO_TFM_REQ_MAY_SLEEP,	1271	CRYPTO_TFM_REQ_MAY_BACKLOG,
1272	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req_aead));	1272	kcryptd_async_done, dmreq_of_req(cc, ctx->r.req_aead));
1273	}	1273	}
1274		1274

drivers/md/dm-integrity.c+2−2

@@ -532,7 +532,7 @@ static void section_mac(struct dm_integrity_c *ic, unsigned section, __u8 result · 531 unmodified lines
532	unsigned j, size;	532	unsigned j, size;
533		533
534	desc->tfm = ic->journal_mac;	534	desc->tfm = ic->journal_mac;
535	desc->flags = CRYPTO_TFM_REQ_MAY_SLEEP;	535	desc->flags = 0;
536		536
537	r = crypto_shash_init(desc);	537	r = crypto_shash_init(desc);
538	if (unlikely(r)) {	538	if (unlikely(r)) {
@@ -676,7 +676,7 @@ static void complete_journal_encrypt(struct crypto_async_request *req, int err) · 137 unmodified lines
676	static bool do_crypt(bool encrypt, struct skcipher_request req, struct journal_completion comp)	676	static bool do_crypt(bool encrypt, struct skcipher_request req, struct journal_completion comp)
677	{	677	{
678	int r;	678	int r;
679	skcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG \| CRYPTO_TFM_REQ_MAY_SLEEP,	679	skcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
680	complete_journal_encrypt, comp);	680	complete_journal_encrypt, comp);
681	if (likely(encrypt))	681	if (likely(encrypt))
682	r = crypto_skcipher_encrypt(req);	682	r = crypto_skcipher_encrypt(req);

drivers/md/dm-raid.c+61−93

@@ -1,6 +1,6 @@
1	/*	1	/*
2	* Copyright (C) 2010-2011 Neil Brown	2	* Copyright (C) 2010-2011 Neil Brown
3	* Copyright (C) 2010-2017 Red Hat, Inc. All rights reserved.	3	* Copyright (C) 2010-2018 Red Hat, Inc. All rights reserved.
4	*	4	*
5	* This file is released under the GPL.	5	* This file is released under the GPL.
6	*/	6	*/
@@ -29,9 +29,6 @@ · 22 unmodified lines
29	*/	29	*/
30	#define MIN_RAID456_JOURNAL_SPACE (4*2048)	30	#define MIN_RAID456_JOURNAL_SPACE (4*2048)
31		31
32	/* Global list of all raid sets */
33	static LIST_HEAD(raid_sets);
34
35	static bool devices_handle_discard_safely = false;	32	static bool devices_handle_discard_safely = false;
36		33
37	/*	34	/*
@@ -227,7 +224,6 @@ struct rs_layout { · 189 unmodified lines
227		224
228	struct raid_set {	225	struct raid_set {
229	struct dm_target *ti;	226	struct dm_target *ti;
230	struct list_head list;
231		227
232	uint32_t stripe_cache_entries;	228	uint32_t stripe_cache_entries;
233	unsigned long ctr_flags;	229	unsigned long ctr_flags;
@@ -273,19 +269,6 @@ static void rs_config_restore(struct raid_set rs, struct rs_layout l) · 39 unmodified lines
273	mddev->new_chunk_sectors = l->new_chunk_sectors;	269	mddev->new_chunk_sectors = l->new_chunk_sectors;
274	}	270	}
275		271
276	/* Find any raid_set in active slot for @rs on global list */
277	static struct raid_set rs_find_active(struct raid_set rs)
278	{
279	struct raid_set *r;
280	struct mapped_device *md = dm_table_get_md(rs->ti->table);
281
282	list_for_each_entry(r, &raid_sets, list)
283	if (r != rs && dm_table_get_md(r->ti->table) == md)
284	return r;
285
286	return NULL;
287	}
288
289	/* raid10 algorithms (i.e. formats) */	272	/* raid10 algorithms (i.e. formats) */
290	#define ALGORITHM_RAID10_DEFAULT 0	273	#define ALGORITHM_RAID10_DEFAULT 0
291	#define ALGORITHM_RAID10_NEAR 1	274	#define ALGORITHM_RAID10_NEAR 1
@@ -764,7 +747,6 @@ static struct raid_set raid_set_alloc(struct dm_target ti, struct raid_type *r · 472 unmodified lines
764		747
765	mddev_init(&rs->md);	748	mddev_init(&rs->md);
766		749
767	INIT_LIST_HEAD(&rs->list);
768	rs->raid_disks = raid_devs;	750	rs->raid_disks = raid_devs;
769	rs->delta_disks = 0;	751	rs->delta_disks = 0;
770		752
@@ -782,9 +764,6 @@ static struct raid_set raid_set_alloc(struct dm_target ti, struct raid_type *r · 11 unmodified lines
782	for (i = 0; i < raid_devs; i++)	764	for (i = 0; i < raid_devs; i++)
783	md_rdev_init(&rs->dev[i].rdev);	765	md_rdev_init(&rs->dev[i].rdev);
784		766
785	/* Add @rs to global list. */
786	list_add(&rs->list, &raid_sets);
787
788	/*	767	/*
789	* Remaining items to be initialized by further RAID params:	768	* Remaining items to be initialized by further RAID params:
790	* rs->md.persistent	769	* rs->md.persistent
@@ -797,7 +776,7 @@ static struct raid_set raid_set_alloc(struct dm_target ti, struct raid_type *r · 6 unmodified lines
797	return rs;	776	return rs;
798	}	777	}
799		778
800	/* Free all @rs allocations and remove it from global list. */	779	/* Free all @rs allocations */
801	static void raid_set_free(struct raid_set *rs)	780	static void raid_set_free(struct raid_set *rs)
802	{	781	{
803	int i;	782	int i;
@@ -815,8 +794,6 @@ static void raid_set_free(struct raid_set *rs) · 11 unmodified lines
815	dm_put_device(rs->ti, rs->dev[i].data_dev);	794	dm_put_device(rs->ti, rs->dev[i].data_dev);
816	}	795	}
817		796
818	list_del(&rs->list);
819
820	kfree(rs);	797	kfree(rs);
821	}	798	}
822		799
@@ -2649,7 +2626,7 @@ static int rs_adjust_data_offsets(struct raid_set *rs) · 1826 unmodified lines
2649	return 0;	2626	return 0;
2650	}	2627	}
2651		2628
2652	/* HM FIXME: get InSync raid_dev? */	2629	/* HM FIXME: get In_Sync raid_dev? */
2653	rdev = &rs->dev[0].rdev;	2630	rdev = &rs->dev[0].rdev;
2654		2631
2655	if (rs->delta_disks < 0) {	2632	if (rs->delta_disks < 0) {
@@ -3149,6 +3126,11 @@ static int raid_ctr(struct dm_target ti, unsigned int argc, char *argv) · 493 unmodified lines
3149	set_bit(RT_FLAG_UPDATE_SBS, &rs->runtime_flags);	3126	set_bit(RT_FLAG_UPDATE_SBS, &rs->runtime_flags);
3150	rs_set_new(rs);	3127	rs_set_new(rs);
3151	} else if (rs_is_recovering(rs)) {	3128	} else if (rs_is_recovering(rs)) {
		3129	/* Rebuild particular devices */
		3130	if (test_bit(__CTR_FLAG_REBUILD, &rs->ctr_flags)) {
		3131	set_bit(RT_FLAG_UPDATE_SBS, &rs->runtime_flags);
		3132	rs_setup_recovery(rs, MaxSector);
		3133	}
3152	/* A recovering raid set may be resized */	3134	/* A recovering raid set may be resized */
3153	; /* skip setup rs */	3135	; /* skip setup rs */
3154	} else if (rs_is_reshaping(rs)) {	3136	} else if (rs_is_reshaping(rs)) {
@@ -3242,6 +3224,8 @@ static int raid_ctr(struct dm_target ti, unsigned int argc, char *argv) · 87 unmodified lines
3242	/* Start raid set read-only and assumed clean to change in raid_resume() */	3224	/* Start raid set read-only and assumed clean to change in raid_resume() */
3243	rs->md.ro = 1;	3225	rs->md.ro = 1;
3244	rs->md.in_sync = 1;	3226	rs->md.in_sync = 1;
		3227
		3228	/* Keep array frozen */
3245	set_bit(MD_RECOVERY_FROZEN, &rs->md.recovery);	3229	set_bit(MD_RECOVERY_FROZEN, &rs->md.recovery);
3246		3230
3247	/* Has to be held on running the array */	3231	/* Has to be held on running the array */
@@ -3265,7 +3249,7 @@ static int raid_ctr(struct dm_target ti, unsigned int argc, char *argv) · 17 unmodified lines
3265	rs->callbacks.congested_fn = raid_is_congested;	3249	rs->callbacks.congested_fn = raid_is_congested;
3266	dm_table_add_target_callbacks(ti->table, &rs->callbacks);	3250	dm_table_add_target_callbacks(ti->table, &rs->callbacks);
3267		3251
3268	/* If raid4/5/6 journal mode explictely requested (only possible with journal dev) -> set it */	3252	/* If raid4/5/6 journal mode explicitly requested (only possible with journal dev) -> set it */
3269	if (test_bit(__CTR_FLAG_JOURNAL_MODE, &rs->ctr_flags)) {	3253	if (test_bit(__CTR_FLAG_JOURNAL_MODE, &rs->ctr_flags)) {
3270	r = r5c_journal_mode_set(&rs->md, rs->journal_dev.mode);	3254	r = r5c_journal_mode_set(&rs->md, rs->journal_dev.mode);
3271	if (r) {	3255	if (r) {
@@ -3350,32 +3334,53 @@ static int raid_map(struct dm_target ti, struct bio bio) · 78 unmodified lines
3350	return DM_MAPIO_SUBMITTED;	3334	return DM_MAPIO_SUBMITTED;
3351	}	3335	}
3352		3336
3353	/* Return string describing the current sync action of @mddev */	3337	/* Return sync state string for @state */
3354	static const char decipher_sync_action(struct mddev mddev, unsigned long recovery)	3338	enum sync_state { st_frozen, st_reshape, st_resync, st_check, st_repair, st_recover, st_idle };
		3339	static const char *sync_str(enum sync_state state)
		3340	{
		3341	/* Has to be in above sync_state order! */
		3342	static const char *sync_strs[] = {
		3343	"frozen",
		3344	"reshape",
		3345	"resync",
		3346	"check",
		3347	"repair",
		3348	"recover",
		3349	"idle"
		3350	};
		3351
		3352	return __within_range(state, 0, ARRAY_SIZE(sync_strs) - 1) ? sync_strs[state] : "undef";
		3353	};
		3354
		3355	/* Return enum sync_state for @mddev derived from @recovery flags */
		3356	static const enum sync_state decipher_sync_action(struct mddev *mddev, unsigned long recovery)
3355	{	3357	{
3356	if (test_bit(MD_RECOVERY_FROZEN, &recovery))	3358	if (test_bit(MD_RECOVERY_FROZEN, &recovery))
3357	return "frozen";	3359	return st_frozen;
3358		3360
3359	/* The MD sync thread can be done with io but still be running */	3361	/* The MD sync thread can be done with io or be interrupted but still be running */
3360	if (!test_bit(MD_RECOVERY_DONE, &recovery) &&	3362	if (!test_bit(MD_RECOVERY_DONE, &recovery) &&
3361	(test_bit(MD_RECOVERY_RUNNING, &recovery) \|\|	3363	(test_bit(MD_RECOVERY_RUNNING, &recovery) \|\|
3362	(!mddev->ro && test_bit(MD_RECOVERY_NEEDED, &recovery)))) {	3364	(!mddev->ro && test_bit(MD_RECOVERY_NEEDED, &recovery)))) {
3363	if (test_bit(MD_RECOVERY_RESHAPE, &recovery))	3365	if (test_bit(MD_RECOVERY_RESHAPE, &recovery))
3364	return "reshape";	3366	return st_reshape;
3365		3367
3366	if (test_bit(MD_RECOVERY_SYNC, &recovery)) {	3368	if (test_bit(MD_RECOVERY_SYNC, &recovery)) {
3367	if (!test_bit(MD_RECOVERY_REQUESTED, &recovery))	3369	if (!test_bit(MD_RECOVERY_REQUESTED, &recovery))
3368	return "resync";	3370	return st_resync;
3369	else if (test_bit(MD_RECOVERY_CHECK, &recovery))	3371	if (test_bit(MD_RECOVERY_CHECK, &recovery))
3370	return "check";	3372	return st_check;
3371	return "repair";	3373	return st_repair;
3372	}	3374	}
3373		3375
3374	if (test_bit(MD_RECOVERY_RECOVER, &recovery))	3376	if (test_bit(MD_RECOVERY_RECOVER, &recovery))
3375	return "recover";	3377	return st_recover;
		3378
		3379	if (mddev->reshape_position != MaxSector)
		3380	return st_reshape;
3376	}	3381	}
3377		3382
3378	return "idle";	3383	return st_idle;
3379	}	3384	}
3380		3385
3381	/*	3386	/*
@@ -3409,6 +3414,7 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, · 27 unmodified lines
3409	sector_t resync_max_sectors)	3414	sector_t resync_max_sectors)
3410	{	3415	{
3411	sector_t r;	3416	sector_t r;
		3417	enum sync_state state;
3412	struct mddev *mddev = &rs->md;	3418	struct mddev *mddev = &rs->md;
3413		3419
3414	clear_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);	3420	clear_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);
@@ -3419,20 +3425,14 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, · 4 unmodified lines
3419	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);	3425	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);
3420		3426
3421	} else {	3427	} else {
3422	if (!test_bit(__CTR_FLAG_NOSYNC, &rs->ctr_flags) &&	3428	state = decipher_sync_action(mddev, recovery);
3423	!test_bit(MD_RECOVERY_INTR, &recovery) &&	3429
3424	(test_bit(MD_RECOVERY_NEEDED, &recovery) \|\|	3430	if (state == st_idle && !test_bit(MD_RECOVERY_INTR, &recovery))
3425	test_bit(MD_RECOVERY_RESHAPE, &recovery) \|\|
3426	test_bit(MD_RECOVERY_RUNNING, &recovery)))
3427	r = mddev->curr_resync_completed;
3428	else
3429	r = mddev->recovery_cp;	3431	r = mddev->recovery_cp;
		3432	else
		3433	r = mddev->curr_resync_completed;
3430		3434
3431	if (r >= resync_max_sectors &&	3435	if (state == st_idle && r >= resync_max_sectors) {
3432	(!test_bit(MD_RECOVERY_REQUESTED, &recovery) \|\|
3433	(!test_bit(MD_RECOVERY_FROZEN, &recovery) &&
3434	!test_bit(MD_RECOVERY_NEEDED, &recovery) &&
3435	!test_bit(MD_RECOVERY_RUNNING, &recovery)))) {
3436	/*	3436	/*
3437	* Sync complete.	3437	* Sync complete.
3438	*/	3438	*/
@@ -3440,24 +3440,20 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, · 1 unmodified line
3440	if (test_bit(MD_RECOVERY_RECOVER, &recovery))	3440	if (test_bit(MD_RECOVERY_RECOVER, &recovery))
3441	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);	3441	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);
3442		3442
3443	} else if (test_bit(MD_RECOVERY_RECOVER, &recovery)) {	3443	} else if (state == st_recover)
3444	/*	3444	/*
3445	* In case we are recovering, the array is not in sync	3445	* In case we are recovering, the array is not in sync
3446	* and health chars should show the recovering legs.	3446	* and health chars should show the recovering legs.
3447	*/	3447	*/
3448	;	3448	;
3449		3449	else if (state == st_resync)
3450	} else if (test_bit(MD_RECOVERY_SYNC, &recovery) &&
3451	!test_bit(MD_RECOVERY_REQUESTED, &recovery)) {
3452	/*	3450	/*
3453	* If "resync" is occurring, the raid set	3451	* If "resync" is occurring, the raid set
3454	* is or may be out of sync hence the health	3452	* is or may be out of sync hence the health
3455	* characters shall be 'a'.	3453	* characters shall be 'a'.
3456	*/	3454	*/
3457	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);	3455	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);
3458		3456	else if (state == st_reshape)
3459	} else if (test_bit(MD_RECOVERY_RESHAPE, &recovery) &&
3460	!test_bit(MD_RECOVERY_REQUESTED, &recovery)) {
3461	/*	3457	/*
3462	* If "reshape" is occurring, the raid set	3458	* If "reshape" is occurring, the raid set
3463	* is or may be out of sync hence the health	3459	* is or may be out of sync hence the health
@@ -3465,7 +3461,7 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, · 1 unmodified line
3465	*/	3461	*/
3466	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);	3462	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);
3467		3463
3468	} else if (test_bit(MD_RECOVERY_REQUESTED, &recovery)) {	3464	else if (state == st_check \|\| state == st_repair)
3469	/*	3465	/*
3470	* If "check" or "repair" is occurring, the raid set has	3466	* If "check" or "repair" is occurring, the raid set has
3471	* undergone an initial sync and the health characters	3467	* undergone an initial sync and the health characters
@@ -3473,12 +3469,12 @@ static sector_t rs_get_progress(struct raid_set *rs, unsigned long recovery, · 1 unmodified line
3473	*/	3469	*/
3474	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);	3470	set_bit(RT_FLAG_RS_IN_SYNC, &rs->runtime_flags);
3475		3471
3476	} else {	3472	else {
3477	struct md_rdev *rdev;	3473	struct md_rdev *rdev;
3478		3474
3479	/*	3475	/*
3480	* We are idle and recovery is needed, prevent 'A' chars race	3476	* We are idle and recovery is needed, prevent 'A' chars race
3481	* caused by components still set to in-sync by constrcuctor.	3477	* caused by components still set to in-sync by constructor.
3482	*/	3478	*/
3483	if (test_bit(MD_RECOVERY_NEEDED, &recovery))	3479	if (test_bit(MD_RECOVERY_NEEDED, &recovery))
3484	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);	3480	set_bit(RT_FLAG_RS_RESYNCING, &rs->runtime_flags);
@@ -3542,7 +3538,7 @@ static void raid_status(struct dm_target *ti, status_type_t type, · 57 unmodified lines
3542	progress = rs_get_progress(rs, recovery, resync_max_sectors);	3538	progress = rs_get_progress(rs, recovery, resync_max_sectors);
3543	resync_mismatches = (mddev->last_sync_action && !strcasecmp(mddev->last_sync_action, "check")) ?	3539	resync_mismatches = (mddev->last_sync_action && !strcasecmp(mddev->last_sync_action, "check")) ?
3544	atomic64_read(&mddev->resync_mismatches) : 0;	3540	atomic64_read(&mddev->resync_mismatches) : 0;
3545	sync_action = decipher_sync_action(&rs->md, recovery);	3541	sync_action = sync_str(decipher_sync_action(&rs->md, recovery));
3546		3542
3547	/* HM FIXME: do we want another state char for raid0? It shows 'D'/'A'/'-' now */	3543	/* HM FIXME: do we want another state char for raid0? It shows 'D'/'A'/'-' now */
3548	for (i = 0; i < rs->raid_disks; i++)	3544	for (i = 0; i < rs->raid_disks; i++)
@@ -3892,14 +3888,13 @@ static int rs_start_reshape(struct raid_set *rs) · 343 unmodified lines
3892	struct mddev *mddev = &rs->md;	3888	struct mddev *mddev = &rs->md;
3893	struct md_personality *pers = mddev->pers;	3889	struct md_personality *pers = mddev->pers;
3894		3890
		3891	/* Don't allow the sync thread to work until the table gets reloaded. */
		3892	set_bit(MD_RECOVERY_WAIT, &mddev->recovery);
		3893
3895	r = rs_setup_reshape(rs);	3894	r = rs_setup_reshape(rs);
3896	if (r)	3895	if (r)
3897	return r;	3896	return r;
3898		3897
3899	/* Need to be resumed to be able to start reshape, recovery is frozen until raid_resume() though */
3900	if (test_and_clear_bit(RT_FLAG_RS_SUSPENDED, &rs->runtime_flags))
3901	mddev_resume(mddev);
3902
3903	/*	3898	/*
3904	* Check any reshape constraints enforced by the personalility	3899	* Check any reshape constraints enforced by the personalility
3905	*	3900	*
@@ -3923,10 +3918,6 @@ static int rs_start_reshape(struct raid_set *rs) · 17 unmodified lines
3923	}	3918	}
3924	}	3919	}
3925		3920
3926	/* Suspend because a resume will happen in raid_resume() */
3927	set_bit(RT_FLAG_RS_SUSPENDED, &rs->runtime_flags);
3928	mddev_suspend(mddev);
3929
3930	/*	3921	/*
3931	* Now reshape got set up, update superblocks to	3922	* Now reshape got set up, update superblocks to
3932	* reflect the fact so that a table reload will	3923	* reflect the fact so that a table reload will
@@ -3947,29 +3938,6 @@ static int raid_preresume(struct dm_target *ti) · 14 unmodified lines
3947	if (test_and_set_bit(RT_FLAG_RS_PRERESUMED, &rs->runtime_flags))	3938	if (test_and_set_bit(RT_FLAG_RS_PRERESUMED, &rs->runtime_flags))
3948	return 0;	3939	return 0;
3949		3940
3950	if (!test_bit(__CTR_FLAG_REBUILD, &rs->ctr_flags)) {
3951	struct raid_set *rs_active = rs_find_active(rs);
3952
3953	if (rs_active) {
3954	/*
3955	* In case no rebuilds have been requested
3956	* and an active table slot exists, copy
3957	* current resynchonization completed and
3958	* reshape position pointers across from
3959	* suspended raid set in the active slot.
3960	*
3961	* This resumes the new mapping at current
3962	* offsets to continue recover/reshape without
3963	* necessarily redoing a raid set partially or
3964	* causing data corruption in case of a reshape.
3965	*/
3966	if (rs_active->md.curr_resync_completed != MaxSector)
3967	mddev->curr_resync_completed = rs_active->md.curr_resync_completed;
3968	if (rs_active->md.reshape_position != MaxSector)
3969	mddev->reshape_position = rs_active->md.reshape_position;
3970	}
3971	}
3972
3973	/*	3941	/*
3974	* The superblocks need to be updated on disk if the	3942	* The superblocks need to be updated on disk if the
3975	* array is new or new devices got added (thus zeroed	3943	* array is new or new devices got added (thus zeroed
@@ -4046,7 +4014,7 @@ static void raid_resume(struct dm_target *ti) · 70 unmodified lines
4046		4014
4047	static struct target_type raid_target = {	4015	static struct target_type raid_target = {
4048	.name = "raid",	4016	.name = "raid",
4049	.version = {1, 13, 2},	4017	.version = {1, 14, 0},
4050	.module = THIS_MODULE,	4018	.module = THIS_MODULE,
4051	.ctr = raid_ctr,	4019	.ctr = raid_ctr,
4052	.dtr = raid_dtr,	4020	.dtr = raid_dtr,

drivers/md/dm-thin-metadata.c+35−1

@@ -188,6 +188,12 @@ struct dm_pool_metadata { · 187 unmodified lines
188	unsigned long flags;	188	unsigned long flags;
189	sector_t data_block_size;	189	sector_t data_block_size;
190		190
		191	/*
		192	* We reserve a section of the metadata for commit overhead.
		193	* All reported space does not include this.
		194	*/
		195	dm_block_t metadata_reserve;
		196
191	/*	197	/*
192	* Set if a transaction has to be aborted but the attempt to roll back	198	* Set if a transaction has to be aborted but the attempt to roll back
193	* to the previous (good) transaction failed. The only pool metadata	199	* to the previous (good) transaction failed. The only pool metadata
@@ -816,6 +822,22 @@ static int __commit_transaction(struct dm_pool_metadata *pmd) · 622 unmodified lines
816	return dm_tm_commit(pmd->tm, sblock);	822	return dm_tm_commit(pmd->tm, sblock);
817	}	823	}
818		824
		825	static void __set_metadata_reserve(struct dm_pool_metadata *pmd)
		826	{
		827	int r;
		828	dm_block_t total;
		829	dm_block_t max_blocks = 4096; /* 16M */
		830
		831	r = dm_sm_get_nr_blocks(pmd->metadata_sm, &total);
		832	if (r) {
		833	DMERR("could not get size of metadata device");
		834	pmd->metadata_reserve = max_blocks;
		835	} else {
		836	sector_div(total, 10);
		837	pmd->metadata_reserve = min(max_blocks, total);
		838	}
		839	}
		840
819	struct dm_pool_metadata dm_pool_metadata_open(struct block_device bdev,	841	struct dm_pool_metadata dm_pool_metadata_open(struct block_device bdev,
820	sector_t data_block_size,	842	sector_t data_block_size,
821	bool format_device)	843	bool format_device)
@@ -849,6 +871,8 @@ struct dm_pool_metadata dm_pool_metadata_open(struct block_device bdev, · 27 unmodified lines
849	return ERR_PTR(r);	871	return ERR_PTR(r);
850	}	872	}
851		873
		874	__set_metadata_reserve(pmd);
		875
852	return pmd;	876	return pmd;
853	}	877	}
854		878
@@ -1820,6 +1844,13 @@ int dm_pool_get_free_metadata_block_count(struct dm_pool_metadata *pmd, · 965 unmodified lines
1820	down_read(&pmd->root_lock);	1844	down_read(&pmd->root_lock);
1821	if (!pmd->fail_io)	1845	if (!pmd->fail_io)
1822	r = dm_sm_get_nr_free(pmd->metadata_sm, result);	1846	r = dm_sm_get_nr_free(pmd->metadata_sm, result);
		1847
		1848	if (!r) {
		1849	if (*result < pmd->metadata_reserve)
		1850	*result = 0;
		1851	else
		1852	*result -= pmd->metadata_reserve;
		1853	}
1823	up_read(&pmd->root_lock);	1854	up_read(&pmd->root_lock);
1824		1855
1825	return r;	1856	return r;
@@ -1932,8 +1963,11 @@ int dm_pool_resize_metadata_dev(struct dm_pool_metadata *pmd, dm_block_t new_cou · 106 unmodified lines
1932	int r = -EINVAL;	1963	int r = -EINVAL;
1933		1964
1934	down_write(&pmd->root_lock);	1965	down_write(&pmd->root_lock);
1935	if (!pmd->fail_io)	1966	if (!pmd->fail_io) {
1936	r = __resize_space_map(pmd->metadata_sm, new_count);	1967	r = __resize_space_map(pmd->metadata_sm, new_count);
		1968	if (!r)
		1969	__set_metadata_reserve(pmd);
		1970	}
1937	up_write(&pmd->root_lock);	1971	up_write(&pmd->root_lock);
1938		1972
1939	return r;	1973	return r;

drivers/md/dm-thin.c+65−8

 enum pool_mode {
 	PM_WRITE,		/* metadata may be changed */
 	PM_OUT_OF_DATA_SPACE,	/* metadata may be changed, though data may not be allocated */
+	/*
+	 * Like READ_ONLY, except may switch back to WRITE on metadata resize. Reported as READ_ONLY.
+	 */
+	PM_OUT_OF_METADATA_SPACE,
 	PM_READ_ONLY,		/* metadata may not be changed */
 	PM_FAIL,		/* all I/O fails */
 };
 static void requeue_bios(struct pool *pool);
-static void check_for_space(struct pool *pool)
+static bool is_read_only_pool_mode(enum pool_mode mode)
+{
+	return (mode == PM_OUT_OF_METADATA_SPACE || mode == PM_READ_ONLY);
+}
+static bool is_read_only(struct pool *pool)
+{
+	return is_read_only_pool_mode(get_pool_mode(pool));
+}
+static void check_for_metadata_space(struct pool *pool)
+{
+	int r;
+	const char *ooms_reason = NULL;
+	dm_block_t nr_free;
+	r = dm_pool_get_free_metadata_block_count(pool->pmd, &nr_free);
+	if (r)
+		ooms_reason = "Could not get free metadata blocks";
+	else if (!nr_free)
+		ooms_reason = "No free metadata blocks";
+	if (ooms_reason && !is_read_only(pool)) {
+		DMERR("%s", ooms_reason);
+		set_pool_mode(pool, PM_OUT_OF_METADATA_SPACE);
+	}
+}
+static void check_for_data_space(struct pool *pool)
 {
 	int r;
 	dm_block_t nr_free;
 {
 	int r;
-	if (get_pool_mode(pool) >= PM_READ_ONLY)
+	if (get_pool_mode(pool) >= PM_OUT_OF_METADATA_SPACE)
 		return -EINVAL;
 	r = dm_pool_commit_metadata(pool->pmd);
 	if (r)
 		metadata_operation_failed(pool, "dm_pool_commit_metadata", r);
-	else
+	else {
-		check_for_space(pool);
+		check_for_metadata_space(pool);
+		check_for_data_space(pool);
+	}
 	return r;
 }
 		return r;
 	}
+	r = dm_pool_get_free_metadata_block_count(pool->pmd, &free_blocks);
+	if (r) {
+		metadata_operation_failed(pool, "dm_pool_get_free_metadata_block_count", r);
+		return r;
+	}
+	if (!free_blocks) {
+		/* Let's commit before we use up the metadata reserve. */
+		r = commit(pool);
+		if (r)
+			return r;
+	}
 	return 0;
 }
 	case PM_OUT_OF_DATA_SPACE:
 		return pool->pf.error_if_no_space ? BLK_STS_NOSPC : 0;
+	case PM_OUT_OF_METADATA_SPACE:
 	case PM_READ_ONLY:
 	case PM_FAIL:
 		return BLK_STS_IOERR;
 		error_retry_list(pool);
 		break;
+	case PM_OUT_OF_METADATA_SPACE:
 	case PM_READ_ONLY:
-		if (old_mode != new_mode)
+		if (!is_read_only_pool_mode(old_mode))
 			notify_of_pool_mode_change(pool, "read-only");
 		dm_pool_metadata_read_only(pool->pmd);
 		pool->process_bio = process_bio_read_only;
 		DMINFO("%s: growing the metadata device from %llu to %llu blocks",
 		       dm_device_name(pool->pool_md),
 		       sb_metadata_dev_size, metadata_dev_size);
+		if (get_pool_mode(pool) == PM_OUT_OF_METADATA_SPACE)
+			set_pool_mode(pool, PM_WRITE);
 		r = dm_pool_resize_metadata_dev(pool->pmd, metadata_dev_size);
 		if (r) {
 			metadata_operation_failed(pool, "dm_pool_resize_metadata_dev", r);
 	struct pool_c *pt = ti->private;
 	struct pool *pool = pt->pool;
-	if (get_pool_mode(pool) >= PM_READ_ONLY) {
+	if (get_pool_mode(pool) >= PM_OUT_OF_METADATA_SPACE) {
 		DMERR("%s: unable to service pool target messages in READ_ONLY or FAIL mode",
 		      dm_device_name(pool->pool_md));
 		return -EOPNOTSUPP;
 	dm_block_t nr_blocks_data;
 	dm_block_t nr_blocks_metadata;
 	dm_block_t held_root;
+	enum pool_mode mode;
 	char buf[BDEVNAME_SIZE];
 	char buf2[BDEVNAME_SIZE];
 	struct pool_c *pt = ti->private;
 		else
 			DMEMIT("- ");
-		if (pool->pf.mode == PM_OUT_OF_DATA_SPACE)
+		mode = get_pool_mode(pool);
+		if (mode == PM_OUT_OF_DATA_SPACE)
 			DMEMIT("out_of_data_space ");
-		else if (pool->pf.mode == PM_READ_ONLY)
+		else if (is_read_only_pool_mode(mode))
 			DMEMIT("ro ");
 		else
 			DMEMIT("rw ");

drivers/md/dm-verity-target.c+20−4

@@ -99,10 +99,26 @@ static int verity_hash_update(struct dm_verity v, struct ahash_request req, · 98 unmodified lines
99	{	99	{
100	struct scatterlist sg;	100	struct scatterlist sg;
101		101
102	sg_init_one(&sg, data, len);	102	if (likely(!is_vmalloc_addr(data))) {
103	ahash_request_set_crypt(req, &sg, NULL, len);	103	sg_init_one(&sg, data, len);
104		104	ahash_request_set_crypt(req, &sg, NULL, len);
105	return crypto_wait_req(crypto_ahash_update(req), wait);	105	return crypto_wait_req(crypto_ahash_update(req), wait);
		106	} else {
		107	do {
		108	int r;
		109	size_t this_step = min_t(size_t, len, PAGE_SIZE - offset_in_page(data));
		110	flush_kernel_vmap_range((void *)data, this_step);
		111	sg_init_table(&sg, 1);
		112	sg_set_page(&sg, vmalloc_to_page(data), this_step, offset_in_page(data));
		113	ahash_request_set_crypt(req, &sg, NULL, this_step);
		114	r = crypto_wait_req(crypto_ahash_update(req), wait);
		115	if (unlikely(r))
		116	return r;
		117	data += this_step;
		118	len -= this_step;
		119	} while (len);
		120	return 0;
		121	}
106	}	122	}
107		123
108	/*	124	/*

drivers/md/md-cluster.c+5−5

 static int resync_finish(struct mddev *mddev)
 {
 	struct md_cluster_info *cinfo = mddev->cluster_info;
+	int ret = 0;
 	clear_bit(MD_RESYNCING_REMOTE, &mddev->recovery);
-	dlm_unlock_sync(cinfo->resync_lockres);
 	/*
 	 * If resync thread is interrupted so we can't say resync is finished,
 	 * another node will launch resync thread to continue.
 	 */
-	if (test_bit(MD_CLOSING, &mddev->flags))
+	if (!test_bit(MD_CLOSING, &mddev->flags))
-		return 0;
+		ret = resync_info_update(mddev, 0, 0);
-	else
+	dlm_unlock_sync(cinfo->resync_lockres);
-		return resync_info_update(mddev, 0, 0);
+	return ret;
 }
 static int area_resyncing(struct mddev *mddev, int direction,

drivers/md/raid10.c+4−1

 		allow_barrier(conf);
 	}
+	raise_barrier(conf, 0);
 read_more:
 	/* Now schedule reads for blocks from sector_nr to last */
 	r10_bio = raid10_alloc_init_r10buf(conf);
 	r10_bio->state = 0;
-	raise_barrier(conf, sectors_done != 0);
+	raise_barrier(conf, 1);
 	atomic_set(&r10_bio->remaining, 0);
 	r10_bio->mddev = mddev;
 	r10_bio->sector = sector_nr;
 	if (sector_nr <= last)
 		goto read_more;
+	lower_barrier(conf);
 	/* Now that we have done the whole section we can
 	 * update reshape_progress
 	 */

drivers/md/raid5-log.h+5−0

 extern void ppl_quiesce(struct r5conf *conf, int quiesce);
 extern int ppl_handle_flush_request(struct r5l_log *log, struct bio *bio);
+static inline bool raid5_has_log(struct r5conf *conf)
+{
+	return test_bit(MD_HAS_JOURNAL, &conf->mddev->flags);
+}
 static inline bool raid5_has_ppl(struct r5conf *conf)
 {
 	return test_bit(MD_HAS_PPL, &conf->mddev->flags);

drivers/md/raid5.c+3−3

@@ -733,7 +733,7 @@ static bool stripe_can_batch(struct stripe_head *sh) · 732 unmodified lines
733	{	733	{
734	struct r5conf *conf = sh->raid_conf;	734	struct r5conf *conf = sh->raid_conf;
735		735
736	if (conf->log \|\| raid5_has_ppl(conf))	736	if (raid5_has_log(conf) \|\| raid5_has_ppl(conf))
737	return false;	737	return false;
738	return test_bit(STRIPE_BATCH_READY, &sh->state) &&	738	return test_bit(STRIPE_BATCH_READY, &sh->state) &&
739	!test_bit(STRIPE_BITMAP_PENDING, &sh->state) &&	739	!test_bit(STRIPE_BITMAP_PENDING, &sh->state) &&
@@ -7737,7 +7737,7 @@ static int raid5_resize(struct mddev *mddev, sector_t sectors) · 6997 unmodified lines
7737	sector_t newsize;	7737	sector_t newsize;
7738	struct r5conf *conf = mddev->private;	7738	struct r5conf *conf = mddev->private;
7739		7739
7740	if (conf->log \|\| raid5_has_ppl(conf))	7740	if (raid5_has_log(conf) \|\| raid5_has_ppl(conf))
7741	return -EINVAL;	7741	return -EINVAL;
7742	sectors &= ~((sector_t)conf->chunk_sectors - 1);	7742	sectors &= ~((sector_t)conf->chunk_sectors - 1);
7743	newsize = raid5_size(mddev, sectors, mddev->raid_disks);	7743	newsize = raid5_size(mddev, sectors, mddev->raid_disks);
@@ -7788,7 +7788,7 @@ static int check_reshape(struct mddev *mddev) · 44 unmodified lines
7788	{	7788	{
7789	struct r5conf *conf = mddev->private;	7789	struct r5conf *conf = mddev->private;
7790		7790
7791	if (conf->log \|\| raid5_has_ppl(conf))	7791	if (raid5_has_log(conf) \|\| raid5_has_ppl(conf))
7792	return -EINVAL;	7792	return -EINVAL;
7793	if (mddev->delta_disks == 0 &&	7793	if (mddev->delta_disks == 0 &&
7794	mddev->new_layout == mddev->layout &&	7794	mddev->new_layout == mddev->layout &&

drivers/media/i2c/mt9v111.c+13−28

 					      V4L2_CID_AUTO_WHITE_BALANCE,
 					      0, 1, 1,
 					      V4L2_WHITE_BALANCE_AUTO);
-	if (IS_ERR_OR_NULL(mt9v111->auto_awb)) {
-		ret = PTR_ERR(mt9v111->auto_awb);
-		goto error_free_ctrls;
-	}
 	mt9v111->auto_exp = v4l2_ctrl_new_std_menu(&mt9v111->ctrls,
 						   &mt9v111_ctrl_ops,
 						   V4L2_CID_EXPOSURE_AUTO,
 						   V4L2_EXPOSURE_MANUAL,
 						   0, V4L2_EXPOSURE_AUTO);
-	if (IS_ERR_OR_NULL(mt9v111->auto_exp)) {
-		ret = PTR_ERR(mt9v111->auto_exp);
-		goto error_free_ctrls;
-	}
-	/* Initialize timings */
 	mt9v111->hblank = v4l2_ctrl_new_std(&mt9v111->ctrls, &mt9v111_ctrl_ops,
 					    V4L2_CID_HBLANK,
 					    MT9V111_CORE_R05_MIN_HBLANK,
 					    MT9V111_CORE_R05_MAX_HBLANK, 1,
 					    MT9V111_CORE_R05_DEF_HBLANK);
-	if (IS_ERR_OR_NULL(mt9v111->hblank)) {
-		ret = PTR_ERR(mt9v111->hblank);
-		goto error_free_ctrls;
-	}
 	mt9v111->vblank = v4l2_ctrl_new_std(&mt9v111->ctrls, &mt9v111_ctrl_ops,
 					    V4L2_CID_VBLANK,
 					    MT9V111_CORE_R06_MIN_VBLANK,
 					    MT9V111_CORE_R06_MAX_VBLANK, 1,
 					    MT9V111_CORE_R06_DEF_VBLANK);
-	if (IS_ERR_OR_NULL(mt9v111->vblank)) {
-		ret = PTR_ERR(mt9v111->vblank);
-		goto error_free_ctrls;
-	}
 	/* PIXEL_RATE is fixed: just expose it to user space. */
 	v4l2_ctrl_new_std(&mt9v111->ctrls, &mt9v111_ctrl_ops,
 			  DIV_ROUND_CLOSEST(mt9v111->sysclk, 2), 1,
 			  DIV_ROUND_CLOSEST(mt9v111->sysclk, 2));
+	if (mt9v111->ctrls.error) {
+		ret = mt9v111->ctrls.error;
+		goto error_free_ctrls;
+	}
 	mt9v111->sd.ctrl_handler = &mt9v111->ctrls;
 	/* Start with default configuration: 640x480 UYVY. */
 	mt9v111->pad.flags	= MEDIA_PAD_FL_SOURCE;
 	ret = media_entity_pads_init(&mt9v111->sd.entity, 1, &mt9v111->pad);
 	if (ret)
-		goto error_free_ctrls;
+		goto error_free_entity;
 #endif
 	ret = mt9v111_chip_probe(mt9v111);
 	if (ret)
-		goto error_free_ctrls;
+		goto error_free_entity;
 	ret = v4l2_async_register_subdev(&mt9v111->sd);
 	if (ret)
-		goto error_free_ctrls;
+		goto error_free_entity;
 	return 0;
-error_free_ctrls:
+error_free_entity:
-	v4l2_ctrl_handler_free(&mt9v111->ctrls);
 #if IS_ENABLED(CONFIG_MEDIA_CONTROLLER)
 	media_entity_cleanup(&mt9v111->sd.entity);
 #endif
+error_free_ctrls:
+	v4l2_ctrl_handler_free(&mt9v111->ctrls);
 	mutex_destroy(&mt9v111->pwr_mutex);
 	mutex_destroy(&mt9v111->stream_mutex);
 	v4l2_async_unregister_subdev(sd);
-	v4l2_ctrl_handler_free(&mt9v111->ctrls);
 #if IS_ENABLED(CONFIG_MEDIA_CONTROLLER)
 	media_entity_cleanup(&sd->entity);
 #endif
+	v4l2_ctrl_handler_free(&mt9v111->ctrls);
 	mutex_destroy(&mt9v111->pwr_mutex);
 	mutex_destroy(&mt9v111->stream_mutex);

drivers/media/platform/Kconfig+2−0

 	depends on MFD_CROS_EC
 	select CEC_CORE
 	select CEC_NOTIFIER
+	select CHROME_PLATFORMS
+	select CROS_EC_PROTO
 	---help---
 	  If you say yes here you will get support for the
 	  ChromeOS Embedded Controller's CEC.

drivers/media/platform/qcom/camss/camss-csid.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	#include <linux/clk.h>	10	#include <linux/clk.h>
11	#include <linux/completion.h>	11	#include <linux/completion.h>
12	#include <linux/interrupt.h>	12	#include <linux/interrupt.h>
		13	#include <linux/io.h>
13	#include <linux/kernel.h>	14	#include <linux/kernel.h>
14	#include <linux/of.h>	15	#include <linux/of.h>
15	#include <linux/platform_device.h>	16	#include <linux/platform_device.h>

drivers/media/platform/qcom/camss/camss-csiphy-2ph-1-0.c+1−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12		12
13	#include <linux/delay.h>	13	#include <linux/delay.h>
14	#include <linux/interrupt.h>	14	#include <linux/interrupt.h>
		15	#include <linux/io.h>
15		16
16	#define CAMSS_CSI_PHY_LNn_CFG2(n) (0x004 + 0x40 * (n))	17	#define CAMSS_CSI_PHY_LNn_CFG2(n) (0x004 + 0x40 * (n))
17	#define CAMSS_CSI_PHY_LNn_CFG3(n) (0x008 + 0x40 * (n))	18	#define CAMSS_CSI_PHY_LNn_CFG3(n) (0x008 + 0x40 * (n))

drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c+1−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12		12
13	#include <linux/delay.h>	13	#include <linux/delay.h>
14	#include <linux/interrupt.h>	14	#include <linux/interrupt.h>
		15	#include <linux/io.h>
15		16
16	#define CSIPHY_3PH_LNn_CFG1(n) (0x000 + 0x100 * (n))	17	#define CSIPHY_3PH_LNn_CFG1(n) (0x000 + 0x100 * (n))
17	#define CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG (BIT(7) \| BIT(6))	18	#define CSIPHY_3PH_LNn_CFG1_SWI_REC_DLY_PRG (BIT(7) \| BIT(6))

drivers/media/platform/qcom/camss/camss-csiphy.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	#include <linux/clk.h>	10	#include <linux/clk.h>
11	#include <linux/delay.h>	11	#include <linux/delay.h>
12	#include <linux/interrupt.h>	12	#include <linux/interrupt.h>
		13	#include <linux/io.h>
13	#include <linux/kernel.h>	14	#include <linux/kernel.h>
14	#include <linux/of.h>	15	#include <linux/of.h>
15	#include <linux/platform_device.h>	16	#include <linux/platform_device.h>

drivers/media/platform/qcom/camss/camss-ispif.c+3−2

 #include <linux/clk.h>
 #include <linux/completion.h>
 #include <linux/interrupt.h>
+#include <linux/io.h>
 #include <linux/iopoll.h>
 #include <linux/kernel.h>
 #include <linux/mutex.h>
 	else
 		return -EINVAL;
-	ispif->line = kcalloc(ispif->line_num, sizeof(*ispif->line),
+	ispif->line = devm_kcalloc(dev, ispif->line_num, sizeof(*ispif->line),
-			      GFP_KERNEL);
+				   GFP_KERNEL);
 	if (!ispif->line)
 		return -ENOMEM;

drivers/media/platform/qcom/camss/camss-vfe-4-1.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	*/	9	*/
10		10
11	#include <linux/interrupt.h>	11	#include <linux/interrupt.h>
		12	#include <linux/io.h>
12	#include <linux/iopoll.h>	13	#include <linux/iopoll.h>
13		14
14	#include "camss-vfe.h"	15	#include "camss-vfe.h"

drivers/media/platform/qcom/camss/camss-vfe-4-7.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	*/	9	*/
10		10
11	#include <linux/interrupt.h>	11	#include <linux/interrupt.h>
		12	#include <linux/io.h>
12	#include <linux/iopoll.h>	13	#include <linux/iopoll.h>
13		14
14	#include "camss-vfe.h"	15	#include "camss-vfe.h"

drivers/media/platform/qcom/camss/camss.c+8−7

 		return -EINVAL;
 	}
-	camss->csiphy = kcalloc(camss->csiphy_num, sizeof(*camss->csiphy),
+	camss->csiphy = devm_kcalloc(dev, camss->csiphy_num,
-				GFP_KERNEL);
+				     sizeof(*camss->csiphy), GFP_KERNEL);
 	if (!camss->csiphy)
 		return -ENOMEM;
-	camss->csid = kcalloc(camss->csid_num, sizeof(*camss->csid),
+	camss->csid = devm_kcalloc(dev, camss->csid_num, sizeof(*camss->csid),
-			      GFP_KERNEL);
+				   GFP_KERNEL);
 	if (!camss->csid)
 		return -ENOMEM;
-	camss->vfe = kcalloc(camss->vfe_num, sizeof(*camss->vfe), GFP_KERNEL);
+	camss->vfe = devm_kcalloc(dev, camss->vfe_num, sizeof(*camss->vfe),
+				  GFP_KERNEL);
 	if (!camss->vfe)
 		return -ENOMEM;
 MODULE_DEVICE_TABLE(of, camss_dt_match);
-static int camss_runtime_suspend(struct device *dev)
+static int __maybe_unused camss_runtime_suspend(struct device *dev)
 {
 	return 0;
 }
-static int camss_runtime_resume(struct device *dev)
+static int __maybe_unused camss_runtime_resume(struct device *dev)
 {
 	return 0;
 }

drivers/media/usb/dvb-usb-v2/af9035.c+4−2

 			if (msg[0].addr == state->af9033_i2c_addr[1])
 				reg |= 0x100000;
-			ret = af9035_wr_regs(d, reg, &msg[0].buf[3],
+			ret = (msg[0].len >= 3) ? af9035_wr_regs(d, reg,
-					msg[0].len - 3);
+							         &msg[0].buf[3],
+							         msg[0].len - 3)
+					        : -EOPNOTSUPP;
 		} else {
 			/* I2C write */
 			u8 buf[MAX_XFER_SIZE];

drivers/memory/ti-aemif.c+1−1

@@ -411,7 +411,7 @@ static int aemif_probe(struct platform_device *pdev) · 410 unmodified lines
411	if (ret < 0)	411	if (ret < 0)
412	goto error;	412	goto error;
413	}	413	}
414	} else {	414	} else if (pdata) {
415	for (i = 0; i < pdata->num_sub_devices; i++) {	415	for (i = 0; i < pdata->num_sub_devices; i++) {
416	pdata->sub_devices[i].dev.parent = dev;	416	pdata->sub_devices[i].dev.parent = dev;
417	ret = platform_device_register(&pdata->sub_devices[i]);	417	ret = platform_device_register(&pdata->sub_devices[i]);

drivers/mfd/omap-usb-host.c+6−5

 }
 static const struct of_device_id usbhs_child_match_table[] = {
-	{ .compatible = "ti,omap-ehci", },
+	{ .compatible = "ti,ehci-omap", },
-	{ .compatible = "ti,omap-ohci", },
+	{ .compatible = "ti,ohci-omap3", },
 	{ }
 };
 		.pm		= &usbhsomap_dev_pm_ops,
 		.of_match_table = usbhs_omap_dt_ids,
 	},
+	.probe		= usbhs_omap_probe,
 	.remove		= usbhs_omap_remove,
 };
 MODULE_LICENSE("GPL v2");
 MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
-static int __init omap_usbhs_drvinit(void)
+static int omap_usbhs_drvinit(void)
 {
-	return platform_driver_probe(&usbhs_omap_driver, usbhs_omap_probe);
+	return platform_driver_register(&usbhs_omap_driver);
 }
 /*
  */
 fs_initcall_sync(omap_usbhs_drvinit);
-static void __exit omap_usbhs_drvexit(void)
+static void omap_usbhs_drvexit(void)
 {
 	platform_driver_unregister(&usbhs_omap_driver);
 }

drivers/misc/hmc6352.c+2−0

 #include <linux/err.h>
 #include <linux/delay.h>
 #include <linux/sysfs.h>
+#include <linux/nospec.h>
 static DEFINE_MUTEX(compass_mutex);
 		return ret;
 	if (val >= strlen(map))
 		return -EINVAL;
+	val = array_index_nospec(val, strlen(map));
 	mutex_lock(&compass_mutex);
 	ret = compass_command(c, map[val]);
 	mutex_unlock(&compass_mutex);

drivers/misc/ibmvmc.c+1−1

@@ -2131,7 +2131,7 @@ static int ibmvmc_init_crq_queue(struct crq_server_adapter *adapter) · 2130 unmodified lines
2131	retrc = plpar_hcall_norets(H_REG_CRQ,	2131	retrc = plpar_hcall_norets(H_REG_CRQ,
2132	vdev->unit_address,	2132	vdev->unit_address,
2133	queue->msg_token, PAGE_SIZE);	2133	queue->msg_token, PAGE_SIZE);
2134	retrc = rc;	2134	rc = retrc;
2135		2135
2136	if (rc == H_RESOURCE)	2136	if (rc == H_RESOURCE)
2137	rc = ibmvmc_reset_crq_queue(adapter);	2137	rc = ibmvmc_reset_crq_queue(adapter);

drivers/misc/mei/bus.c+5−7

@@ -521,17 +521,15 @@ int mei_cldev_enable(struct mei_cl_device *cldev) · 520 unmodified lines
521		521
522	cl = cldev->cl;	522	cl = cldev->cl;
523		523
		524	mutex_lock(&bus->device_lock);
524	if (cl->state == MEI_FILE_UNINITIALIZED) {	525	if (cl->state == MEI_FILE_UNINITIALIZED) {
525	mutex_lock(&bus->device_lock);
526	ret = mei_cl_link(cl);	526	ret = mei_cl_link(cl);
527	mutex_unlock(&bus->device_lock);
528	if (ret)	527	if (ret)
529	return ret;	528	goto out;
530	/* update pointers */	529	/* update pointers */
531	cl->cldev = cldev;	530	cl->cldev = cldev;
532	}	531	}
533		532
534	mutex_lock(&bus->device_lock);
535	if (mei_cl_is_connected(cl)) {	533	if (mei_cl_is_connected(cl)) {
536	ret = 0;	534	ret = 0;
537	goto out;	535	goto out;
@@ -616,9 +614,8 @@ int mei_cldev_disable(struct mei_cl_device *cldev) · 78 unmodified lines
616	if (err < 0)	614	if (err < 0)
617	dev_err(bus->dev, "Could not disconnect from the ME client\n");	615	dev_err(bus->dev, "Could not disconnect from the ME client\n");
618		616
619	out:
620	mei_cl_bus_module_put(cldev);	617	mei_cl_bus_module_put(cldev);
621		618	out:
622	/* Flush queues and remove any pending read */	619	/* Flush queues and remove any pending read */
623	mei_cl_flush_queues(cl, NULL);	620	mei_cl_flush_queues(cl, NULL);
624	mei_cl_unlink(cl);	621	mei_cl_unlink(cl);
@@ -876,12 +873,13 @@ static void mei_cl_bus_dev_release(struct device *dev) · 251 unmodified lines
876		873
877	mei_me_cl_put(cldev->me_cl);	874	mei_me_cl_put(cldev->me_cl);
878	mei_dev_bus_put(cldev->bus);	875	mei_dev_bus_put(cldev->bus);
		876	mei_cl_unlink(cldev->cl);
879	kfree(cldev->cl);	877	kfree(cldev->cl);
880	kfree(cldev);	878	kfree(cldev);
881	}	879	}
882		880
883	static const struct device_type mei_cl_device_type = {	881	static const struct device_type mei_cl_device_type = {
884	.release = mei_cl_bus_dev_release,	882	.release = mei_cl_bus_dev_release,
885	};	883	};
886		884
887	/**	885	/**

drivers/misc/mei/client.c+1−1

@@ -1767,7 +1767,7 @@ out: · 1766 unmodified lines
1767	}	1767	}
1768	}	1768	}
1769		1769
1770	rets = buf->size;	1770	rets = len;
1771	err:	1771	err:
1772	cl_dbg(dev, cl, "rpm: autosuspend\n");	1772	cl_dbg(dev, cl, "rpm: autosuspend\n");
1773	pm_runtime_mark_last_busy(dev->dev);	1773	pm_runtime_mark_last_busy(dev->dev);

drivers/misc/mei/hbm.c+6−3

 		props_res = (struct hbm_props_response *)mei_msg;
-		if (props_res->status) {
+		if (props_res->status == MEI_HBMS_CLIENT_NOT_FOUND) {
+			dev_dbg(dev->dev, "hbm: properties response: %d CLIENT_NOT_FOUND\n",
+				props_res->me_addr);
+		} else if (props_res->status) {
 			dev_err(dev->dev, "hbm: properties response: wrong status = %d %s\n",
 				props_res->status,
 				mei_hbm_status_str(props_res->status));
 			return -EPROTO;
+		} else {
+			mei_hbm_me_cl_add(dev, props_res);
 		}
-		mei_hbm_me_cl_add(dev, props_res);
 		/* request property for the next client */
 		if (mei_hbm_prop_req(dev, props_res->me_addr + 1))
 			return -EIO;

drivers/mmc/host/meson-mx-sdio.c+6−2

 static struct platform_device *meson_mx_mmc_slot_pdev(struct device *parent)
 {
 	struct device_node *slot_node;
+	struct platform_device *pdev;
 	/*
 	 * TODO: the MMC core framework currently does not support
 	 * controllers with multiple slots properly. So we only register
 	 * the first slot for now
 	 */
-	slot_node = of_find_compatible_node(parent->of_node, NULL, "mmc-slot");
+	slot_node = of_get_compatible_child(parent->of_node, "mmc-slot");
 	if (!slot_node) {
 		dev_warn(parent, "no 'mmc-slot' sub-node found\n");
 		return ERR_PTR(-ENOENT);
 	}
-	return of_platform_device_create(slot_node, NULL, parent);
+	pdev = of_platform_device_create(slot_node, NULL, parent);
+	of_node_put(slot_node);
+	return pdev;
 }
 static int meson_mx_mmc_add_host(struct meson_mx_mmc_host *host)

drivers/mmc/host/omap_hsmmc.c+1−0

@@ -2177,6 +2177,7 @@ static int omap_hsmmc_remove(struct platform_device *pdev) · 2176 unmodified lines
2177	dma_release_channel(host->tx_chan);	2177	dma_release_channel(host->tx_chan);
2178	dma_release_channel(host->rx_chan);	2178	dma_release_channel(host->rx_chan);
2179		2179
		2180	dev_pm_clear_wake_irq(host->dev);
2180	pm_runtime_dont_use_autosuspend(host->dev);	2181	pm_runtime_dont_use_autosuspend(host->dev);
2181	pm_runtime_put_sync(host->dev);	2182	pm_runtime_put_sync(host->dev);
2182	pm_runtime_disable(host->dev);	2183	pm_runtime_disable(host->dev);

drivers/mtd/devices/m25p80.c+23−3

 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(code, 1),
 					  SPI_MEM_OP_NO_ADDR,
 					  SPI_MEM_OP_NO_DUMMY,
-					  SPI_MEM_OP_DATA_IN(len, val, 1));
+					  SPI_MEM_OP_DATA_IN(len, NULL, 1));
+	void *scratchbuf;
 	int ret;
+	scratchbuf = kmalloc(len, GFP_KERNEL);
+	if (!scratchbuf)
+		return -ENOMEM;
+	op.data.buf.in = scratchbuf;
 	ret = spi_mem_exec_op(flash->spimem, &op);
 	if (ret < 0)
 		dev_err(&flash->spimem->spi->dev, "error %d reading %x\n", ret,
 			code);
+	else
+		memcpy(val, scratchbuf, len);
+	kfree(scratchbuf);
 	return ret;
 }
 	struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 1),
 					  SPI_MEM_OP_NO_ADDR,
 					  SPI_MEM_OP_NO_DUMMY,
-					  SPI_MEM_OP_DATA_OUT(len, buf, 1));
+					  SPI_MEM_OP_DATA_OUT(len, NULL, 1));
+	void *scratchbuf;
+	int ret;
-	return spi_mem_exec_op(flash->spimem, &op);
+	scratchbuf = kmemdup(buf, len, GFP_KERNEL);
+	if (!scratchbuf)
+		return -ENOMEM;
+	op.data.buf.out = scratchbuf;
+	ret = spi_mem_exec_op(flash->spimem, &op);
+	kfree(scratchbuf);
+	return ret;
 }
 static ssize_t m25p80_write(struct spi_nor *nor, loff_t to, size_t len,

drivers/mtd/mtdpart.c+4−1

 	int ret, err = 0;
 	np = mtd_get_of_node(master);
-	if (!mtd_is_partition(master))
+	if (mtd_is_partition(master))
+		of_node_get(np);
+	else
 		np = of_get_child_by_name(np, "partitions");
 	of_property_for_each_string(np, "compatible", prop, compat) {
 		parser = mtd_part_get_compatible_parser(compat);
 		if (!parser)

drivers/mtd/nand/raw/denali.c+6−0

 	}
 	iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE);
+	/*
+	 * The ->setup_dma() hook kicks DMA by using the data/command
+	 * interface, which belongs to a different AXI port from the
+	 * register interface.  Read back the register to avoid a race.
+	 */
+	ioread32(denali->reg + DMA_ENABLE);
 	denali_reset_irq(denali);
 	denali->setup_dma(denali, dma_addr, page, write);

drivers/mtd/nand/raw/marvell_nand.c+3−1

 	for (op_id = 0; op_id < subop->ninstrs; op_id++) {
 		unsigned int offset, naddrs;
 		const u8 *addrs;
-		int len = nand_subop_get_data_len(subop, op_id);
+		int len;
 		instr = &subop->instrs[op_id];
 				nfc_op->ndcb[0] |=
 					NDCB0_CMD_XTYPE(XTYPE_MONOLITHIC_RW) |
 					NDCB0_LEN_OVRD;
+				len = nand_subop_get_data_len(subop, op_id);
 				nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);
 			}
 			nfc_op->data_delay_ns = instr->delay_ns;
 				nfc_op->ndcb[0] |=
 					NDCB0_CMD_XTYPE(XTYPE_MONOLITHIC_RW) |
 					NDCB0_LEN_OVRD;
+				len = nand_subop_get_data_len(subop, op_id);
 				nfc_op->ndcb[3] |= round_up(len, FIFO_DEPTH);
 			}
 			nfc_op->data_delay_ns = instr->delay_ns;

drivers/net/appletalk/ipddp.c+6−2

                 case SIOCFINDIPDDPRT:
 			spin_lock_bh(&ipddp_route_lock);
 			rp = __ipddp_find_route(&rcp);
-			if (rp)
+			if (rp) {
-				memcpy(&rcp2, rp, sizeof(rcp2));
+				memset(&rcp2, 0, sizeof(rcp2));
+				rcp2.ip    = rp->ip;
+				rcp2.at    = rp->at;
+				rcp2.flags = rp->flags;
+			}
 			spin_unlock_bh(&ipddp_route_lock);
 			if (rp) {

drivers/net/bonding/bond_main.c+2−9

 	struct slave *slave = NULL;
 	struct list_head *iter;
 	struct ad_info ad_info;
-	struct netpoll_info *ni;
-	const struct net_device_ops *ops;
 	if (BOND_MODE(bond) == BOND_MODE_8023AD)
 		if (bond_3ad_get_active_agg_info(bond, &ad_info))
 			return;
 	bond_for_each_slave_rcu(bond, slave, iter) {
-		ops = slave->dev->netdev_ops;
+		if (!bond_slave_is_up(slave))
-		if (!bond_slave_is_up(slave) || !ops->ndo_poll_controller)
 			continue;
 		if (BOND_MODE(bond) == BOND_MODE_8023AD) {
 				continue;
 		}
-		ni = rcu_dereference_bh(slave->dev->npinfo);
+		netpoll_poll_dev(slave->dev);
-		if (down_trylock(&ni->dev_lock))
-			continue;
-		ops->ndo_poll_controller(slave->dev);
-		up(&ni->dev_lock);
 	}
 }

drivers/net/dsa/mv88e6xxx/global1.h+1−1

@@ -128,7 +128,7 @@ · 127 unmodified lines
128	#define MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION 0x7000	128	#define MV88E6XXX_G1_ATU_OP_GET_CLR_VIOLATION 0x7000
129	#define MV88E6XXX_G1_ATU_OP_AGE_OUT_VIOLATION BIT(7)	129	#define MV88E6XXX_G1_ATU_OP_AGE_OUT_VIOLATION BIT(7)
130	#define MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION BIT(6)	130	#define MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION BIT(6)
131	#define MV88E6XXX_G1_ATU_OP_MISS_VIOLTATION BIT(5)	131	#define MV88E6XXX_G1_ATU_OP_MISS_VIOLATION BIT(5)
132	#define MV88E6XXX_G1_ATU_OP_FULL_VIOLATION BIT(4)	132	#define MV88E6XXX_G1_ATU_OP_FULL_VIOLATION BIT(4)
133		133
134	/* Offset 0x0C: ATU Data Register */	134	/* Offset 0x0C: ATU Data Register */

drivers/net/dsa/mv88e6xxx/global1_atu.c+1−1

@@ -349,7 +349,7 @@ static irqreturn_t mv88e6xxx_g1_atu_prob_irq_thread_fn(int irq, void *dev_id) · 348 unmodified lines
349	chip->ports[entry.portvec].atu_member_violation++;	349	chip->ports[entry.portvec].atu_member_violation++;
350	}	350	}
351		351
352	if (val & MV88E6XXX_G1_ATU_OP_MEMBER_VIOLATION) {	352	if (val & MV88E6XXX_G1_ATU_OP_MISS_VIOLATION) {
353	dev_err_ratelimited(chip->dev,	353	dev_err_ratelimited(chip->dev,
354	"ATU miss violation for %pM portvec %x\n",	354	"ATU miss violation for %pM portvec %x\n",
355	entry.mac, entry.portvec);	355	entry.mac, entry.portvec);

drivers/net/ethernet/amazon/ena/ena_com.c+11−13

 	cqe = &admin_queue->cq.entries[head_masked];
 	/* Go over all the completions */
-	while ((cqe->acq_common_descriptor.flags &
+	while ((READ_ONCE(cqe->acq_common_descriptor.flags) &
 			ENA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK) == phase) {
 		/* Do not read the rest of the completion entry before the
 		 * phase bit was validated
 		 */
-		rmb();
+		dma_rmb();
 		ena_com_handle_single_admin_completion(admin_queue, cqe);
 		head_masked++;
 	mmio_read_reg |= mmio_read->seq_num &
 			ENA_REGS_MMIO_REG_READ_REQ_ID_MASK;
-	/* make sure read_resp->req_id get updated before the hw can write
+	writel(mmio_read_reg, ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
-	 * there
-	 */
-	wmb();
-	writel_relaxed(mmio_read_reg,
-		       ena_dev->reg_bar + ENA_REGS_MMIO_REG_READ_OFF);
-	mmiowb();
 	for (i = 0; i < timeout; i++) {
-		if (read_resp->req_id == mmio_read->seq_num)
+		if (READ_ONCE(read_resp->req_id) == mmio_read->seq_num)
 			break;
 		udelay(1);
 	aenq_common = &aenq_e->aenq_common_desc;
 	/* Go over all the events */
-	while ((aenq_common->flags & ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) ==
+	while ((READ_ONCE(aenq_common->flags) &
-	       phase) {
+		ENA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK) == phase) {
+		/* Make sure the phase bit (ownership) is as expected before
+		 * reading the rest of the descriptor.
+		 */
+		dma_rmb();
 		pr_debug("AENQ! Group[%x] Syndrom[%x] timestamp: [%llus]\n",
 			 aenq_common->group, aenq_common->syndrom,
 			 (u64)aenq_common->timestamp_low +

drivers/net/ethernet/amazon/ena/ena_eth_com.c+6−0

 	if (desc_phase != expected_phase)
 		return NULL;
+	/* Make sure we read the rest of the descriptor after the phase bit
+	 * has been read
+	 */
+	dma_rmb();
 	return cdesc;
 }
 	if (cdesc_phase != expected_phase)
 		return -EAGAIN;
+	dma_rmb();
 	if (unlikely(cdesc->req_id >= io_cq->q_depth)) {
 		pr_err("Invalid req id %d\n", cdesc->req_id);
 		return -EINVAL;

drivers/net/ethernet/amazon/ena/ena_eth_com.h+2−6

 	return io_sq->q_depth - 1 - cnt;
 }
-static inline int ena_com_write_sq_doorbell(struct ena_com_io_sq *io_sq,
+static inline int ena_com_write_sq_doorbell(struct ena_com_io_sq *io_sq)
-					    bool relaxed)
 {
 	u16 tail;
 	pr_debug("write submission queue doorbell for queue: %d tail: %d\n",
 		 io_sq->qid, tail);
-	if (relaxed)
+	writel(tail, io_sq->db_addr);
-		writel_relaxed(tail, io_sq->db_addr);
-	else
-		writel(tail, io_sq->db_addr);
 	return 0;
 }

drivers/net/ethernet/amazon/ena/ena_netdev.c+37−45

 static int ena_rss_init_default(struct ena_adapter *adapter);
 static void check_for_admin_com_state(struct ena_adapter *adapter);
-static void ena_destroy_device(struct ena_adapter *adapter);
+static void ena_destroy_device(struct ena_adapter *adapter, bool graceful);
 static int ena_restore_device(struct ena_adapter *adapter);
 static void ena_tx_timeout(struct net_device *dev)
 		return -ENOMEM;
 	}
-	dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE,
+	dma = dma_map_page(rx_ring->dev, page, 0, ENA_PAGE_SIZE,
 			   DMA_FROM_DEVICE);
 	if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
 		u64_stats_update_begin(&rx_ring->syncp);
 	rx_info->page_offset = 0;
 	ena_buf = &rx_info->ena_buf;
 	ena_buf->paddr = dma;
-	ena_buf->len = PAGE_SIZE;
+	ena_buf->len = ENA_PAGE_SIZE;
 	return 0;
 }
 		return;
 	}
-	dma_unmap_page(rx_ring->dev, ena_buf->paddr, PAGE_SIZE,
+	dma_unmap_page(rx_ring->dev, ena_buf->paddr, ENA_PAGE_SIZE,
 		       DMA_FROM_DEVICE);
 	__free_page(page);
 			    rx_ring->qid, i, num);
 	}
-	if (likely(i)) {
+	/* ena_com_write_sq_doorbell issues a wmb() */
-		/* Add memory barrier to make sure the desc were written before
+	if (likely(i))
-		 * issue a doorbell
+		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
-		 */
-		wmb();
-		ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq, true);
-		mmiowb();
-	}
 	rx_ring->next_to_use = next_to_use;
 	do {
 		dma_unmap_page(rx_ring->dev,
 			       dma_unmap_addr(&rx_info->ena_buf, paddr),
-			       PAGE_SIZE, DMA_FROM_DEVICE);
+			       ENA_PAGE_SIZE, DMA_FROM_DEVICE);
 		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
-				rx_info->page_offset, len, PAGE_SIZE);
+				rx_info->page_offset, len, ENA_PAGE_SIZE);
 		netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
 			  "rx skb updated. len %d. data_len %d\n",
 			  "Destroy failure, restarting device\n");
 		ena_dump_stats_to_dmesg(adapter);
 		/* rtnl lock already obtained in dev_ioctl() layer */
-		ena_destroy_device(adapter);
+		ena_destroy_device(adapter, false);
 		ena_restore_device(adapter);
 	}
 	tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
 		tx_ring->ring_size);
-	/* This WMB is aimed to:
-	 * 1 - perform smp barrier before reading next_to_completion
-	 * 2 - make sure the desc were written before trigger DB
-	 */
-	wmb();
 	/* stop the queue when no more space available, the packet can have up
 	 * to sgl_size + 2. one for the meta descriptor and one for header
 	 * (if the header is larger than tx_max_header_size).
 		 * stop the queue but meanwhile clean_tx_irq updates
 		 * next_to_completion and terminates.
 		 * The queue will remain stopped forever.
-		 * To solve this issue this function perform rmb, check
+		 * To solve this issue add a mb() to make sure that
-		 * the wakeup condition and wake up the queue if needed.
+		 * netif_tx_stop_queue() write is vissible before checking if
+		 * there is additional space in the queue.
 		 */
-		smp_rmb();
+		smp_mb();
 		if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq)
 				> ENA_TX_WAKEUP_THRESH) {
 	}
 	if (netif_xmit_stopped(txq) || !skb->xmit_more) {
-		/* trigger the dma engine */
+		/* trigger the dma engine. ena_com_write_sq_doorbell()
-		ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq, false);
+		 * has a mb
+		 */
+		ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
 		u64_stats_update_begin(&tx_ring->syncp);
 		tx_ring->tx_stats.doorbells++;
 		u64_stats_update_end(&tx_ring->syncp);
 	return rc;
 }
-static void ena_destroy_device(struct ena_adapter *adapter)
+static void ena_destroy_device(struct ena_adapter *adapter, bool graceful)
 {
 	struct net_device *netdev = adapter->netdev;
 	struct ena_com_dev *ena_dev = adapter->ena_dev;
 	bool dev_up;
+	if (!test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
+		return;
 	netif_carrier_off(netdev);
 	del_timer_sync(&adapter->timer_service);
 	dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
 	adapter->dev_up_before_reset = dev_up;
-	ena_com_set_admin_running_state(ena_dev, false);
+	if (!graceful)
+		ena_com_set_admin_running_state(ena_dev, false);
 	if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
 		ena_down(adapter);
 	adapter->reset_reason = ENA_REGS_RESET_NORMAL;
 	clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
+	clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
 }
 static int ena_restore_device(struct ena_adapter *adapter)
 		}
 	}
+	set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
 	mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
 	dev_err(&pdev->dev, "Device reset completed successfully\n");
 		return;
 	}
 	rtnl_lock();
-	ena_destroy_device(adapter);
+	ena_destroy_device(adapter, false);
 	ena_restore_device(adapter);
 	rtnl_unlock();
 }
 		netdev->rx_cpu_rmap = NULL;
 	}
 #endif /* CONFIG_RFS_ACCEL */
-	unregister_netdev(netdev);
 	del_timer_sync(&adapter->timer_service);
 	cancel_work_sync(&adapter->reset_task);
-	/* Reset the device only if the device is running. */
+	unregister_netdev(netdev);
-	if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
-		ena_com_dev_reset(ena_dev, adapter->reset_reason);
-	ena_free_mgmnt_irq(adapter);
+	/* If the device is running then we want to make sure the device will be
+	 * reset to make sure no more events will be issued by the device.
+	 */
+	if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
+		set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
-	ena_disable_msix(adapter);
+	rtnl_lock();
+	ena_destroy_device(adapter, true);
+	rtnl_unlock();
 	free_netdev(netdev);
-	ena_com_mmio_reg_read_request_destroy(ena_dev);
-	ena_com_abort_admin_commands(ena_dev);
-	ena_com_wait_for_abort_completion(ena_dev);
-	ena_com_admin_destroy(ena_dev);
 	ena_com_rss_destroy(ena_dev);
 	ena_com_delete_debug_area(ena_dev);
 			"ignoring device reset request as the device is being suspended\n");
 		clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
 	}
-	ena_destroy_device(adapter);
+	ena_destroy_device(adapter, true);
 	rtnl_unlock();
 	return 0;
 }

drivers/net/ethernet/amazon/ena/ena_netdev.h+11−0

@@ -355,4 +355,15 @@ void ena_dump_stats_to_buf(struct ena_adapter adapter, u8 buf); · 354 unmodified lines
355		355
356	int ena_get_sset_count(struct net_device *netdev, int sset);	356	int ena_get_sset_count(struct net_device *netdev, int sset);
357		357
		358	/* The ENA buffer length fields is 16 bit long. So when PAGE_SIZE == 64kB the
		359	* driver passas 0.
		360	* Since the max packet size the ENA handles is ~9kB limit the buffer length to
		361	* 16kB.
		362	*/
		363	#if PAGE_SIZE > SZ_16K
		364	#define ENA_PAGE_SIZE SZ_16K
		365	#else
		366	#define ENA_PAGE_SIZE PAGE_SIZE
		367	#endif
		368
358	#endif /* !(ENA_H) */	369	#endif /* !(ENA_H) */

drivers/net/ethernet/apple/bmac.c+2−2

@@ -154,7 +154,7 @@ static irqreturn_t bmac_txdma_intr(int irq, void *dev_id); · 153 unmodified lines
154	static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id);	154	static irqreturn_t bmac_rxdma_intr(int irq, void *dev_id);
155	static void bmac_set_timeout(struct net_device *dev);	155	static void bmac_set_timeout(struct net_device *dev);
156	static void bmac_tx_timeout(struct timer_list *t);	156	static void bmac_tx_timeout(struct timer_list *t);
157	static int bmac_output(struct sk_buff skb, struct net_device dev);	157	static netdev_tx_t bmac_output(struct sk_buff skb, struct net_device dev);
158	static void bmac_start(struct net_device *dev);	158	static void bmac_start(struct net_device *dev);
159		159
160	#define DBDMA_SET(x) ( ((x) \| (x) << 16) )	160	#define DBDMA_SET(x) ( ((x) \| (x) << 16) )
@@ -1456,7 +1456,7 @@ bmac_start(struct net_device *dev) · 1295 unmodified lines
1456	spin_unlock_irqrestore(&bp->lock, flags);	1456	spin_unlock_irqrestore(&bp->lock, flags);
1457	}	1457	}
1458		1458
1459	static int	1459	static netdev_tx_t
1460	bmac_output(struct sk_buff skb, struct net_device dev)	1460	bmac_output(struct sk_buff skb, struct net_device dev)
1461	{	1461	{
1462	struct bmac_data *bp = netdev_priv(dev);	1462	struct bmac_data *bp = netdev_priv(dev);

drivers/net/ethernet/apple/mace.c+2−2

@@ -78,7 +78,7 @@ struct mace_data { · 77 unmodified lines
78		78
79	static int mace_open(struct net_device *dev);	79	static int mace_open(struct net_device *dev);
80	static int mace_close(struct net_device *dev);	80	static int mace_close(struct net_device *dev);
81	static int mace_xmit_start(struct sk_buff skb, struct net_device dev);	81	static netdev_tx_t mace_xmit_start(struct sk_buff skb, struct net_device dev);
82	static void mace_set_multicast(struct net_device *dev);	82	static void mace_set_multicast(struct net_device *dev);
83	static void mace_reset(struct net_device *dev);	83	static void mace_reset(struct net_device *dev);
84	static int mace_set_address(struct net_device dev, void addr);	84	static int mace_set_address(struct net_device dev, void addr);
@@ -525,7 +525,7 @@ static inline void mace_set_timeout(struct net_device *dev) · 440 unmodified lines
525	mp->timeout_active = 1;	525	mp->timeout_active = 1;
526	}	526	}
527		527
528	static int mace_xmit_start(struct sk_buff skb, struct net_device dev)	528	static netdev_tx_t mace_xmit_start(struct sk_buff skb, struct net_device dev)
529	{	529	{
530	struct mace_data *mp = netdev_priv(dev);	530	struct mace_data *mp = netdev_priv(dev);
531	volatile struct dbdma_regs __iomem *td = mp->tx_dma;	531	volatile struct dbdma_regs __iomem *td = mp->tx_dma;

drivers/net/ethernet/apple/macmace.c+2−2

@@ -89,7 +89,7 @@ struct mace_frame { · 88 unmodified lines
89		89
90	static int mace_open(struct net_device *dev);	90	static int mace_open(struct net_device *dev);
91	static int mace_close(struct net_device *dev);	91	static int mace_close(struct net_device *dev);
92	static int mace_xmit_start(struct sk_buff skb, struct net_device dev);	92	static netdev_tx_t mace_xmit_start(struct sk_buff skb, struct net_device dev);
93	static void mace_set_multicast(struct net_device *dev);	93	static void mace_set_multicast(struct net_device *dev);
94	static int mace_set_address(struct net_device dev, void addr);	94	static int mace_set_address(struct net_device dev, void addr);
95	static void mace_reset(struct net_device *dev);	95	static void mace_reset(struct net_device *dev);
@@ -444,7 +444,7 @@ static int mace_close(struct net_device *dev) · 348 unmodified lines
444	* Transmit a frame	444	* Transmit a frame
445	*/	445	*/
446		446
447	static int mace_xmit_start(struct sk_buff skb, struct net_device dev)	447	static netdev_tx_t mace_xmit_start(struct sk_buff skb, struct net_device dev)
448	{	448	{
449	struct mace_data *mp = netdev_priv(dev);	449	struct mace_data *mp = netdev_priv(dev);
450	unsigned long flags;	450	unsigned long flags;

drivers/net/ethernet/aquantia/atlantic/aq_ring.c+18−14

@@ -225,9 +225,10 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 224 unmodified lines
225	}	225	}
226		226
227	/* for single fragment packets use build_skb() */	227	/* for single fragment packets use build_skb() */
228	if (buff->is_eop) {	228	if (buff->is_eop &&
		229	buff->len <= AQ_CFG_RX_FRAME_MAX - AQ_SKB_ALIGN) {
229	skb = build_skb(page_address(buff->page),	230	skb = build_skb(page_address(buff->page),
230	buff->len + AQ_SKB_ALIGN);	231	AQ_CFG_RX_FRAME_MAX);
231	if (unlikely(!skb)) {	232	if (unlikely(!skb)) {
232	err = -ENOMEM;	233	err = -ENOMEM;
233	goto err_exit;	234	goto err_exit;
@@ -247,18 +248,21 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 13 unmodified lines
247	buff->len - ETH_HLEN,	248	buff->len - ETH_HLEN,
248	SKB_TRUESIZE(buff->len - ETH_HLEN));	249	SKB_TRUESIZE(buff->len - ETH_HLEN));
249		250
250	for (i = 1U, next_ = buff->next,	251	if (!buff->is_eop) {
251	buff_ = &self->buff_ring[next_]; true;	252	for (i = 1U, next_ = buff->next,
252	next_ = buff_->next,	253	buff_ = &self->buff_ring[next_];
253	buff_ = &self->buff_ring[next_], ++i) {	254	true; next_ = buff_->next,
254	skb_add_rx_frag(skb, i, buff_->page, 0,	255	buff_ = &self->buff_ring[next_], ++i) {
255	buff_->len,	256	skb_add_rx_frag(skb, i,
256	SKB_TRUESIZE(buff->len -	257	buff_->page, 0,
257	ETH_HLEN));	258	buff_->len,
258	buff_->is_cleaned = 1;	259	SKB_TRUESIZE(buff->len -
259		260	ETH_HLEN));
260	if (buff_->is_eop)	261	buff_->is_cleaned = 1;
261	break;	262
		263	if (buff_->is_eop)
		264	break;
		265	}
262	}	266	}
263	}	267	}
264		268

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+0−16

@@ -12894,19 +12894,6 @@ static int bnx2x_ioctl(struct net_device dev, struct ifreq ifr, int cmd) · 12893 unmodified lines
12894	}	12894	}
12895	}	12895	}
12896		12896
12897	#ifdef CONFIG_NET_POLL_CONTROLLER
12898	static void poll_bnx2x(struct net_device *dev)
12899	{
12900	struct bnx2x *bp = netdev_priv(dev);
12901	int i;
12902
12903	for_each_eth_queue(bp, i) {
12904	struct bnx2x_fastpath *fp = &bp->fp[i];
12905	napi_schedule(&bnx2x_fp(bp, fp->index, napi));
12906	}
12907	}
12908	#endif
12909
12910	static int bnx2x_validate_addr(struct net_device *dev)	12897	static int bnx2x_validate_addr(struct net_device *dev)
12911	{	12898	{
12912	struct bnx2x *bp = netdev_priv(dev);	12899	struct bnx2x *bp = netdev_priv(dev);
@@ -13113,9 +13100,6 @@ static const struct net_device_ops bnx2x_netdev_ops = { · 200 unmodified lines
13113	.ndo_tx_timeout = bnx2x_tx_timeout,	13100	.ndo_tx_timeout = bnx2x_tx_timeout,
13114	.ndo_vlan_rx_add_vid = bnx2x_vlan_rx_add_vid,	13101	.ndo_vlan_rx_add_vid = bnx2x_vlan_rx_add_vid,
13115	.ndo_vlan_rx_kill_vid = bnx2x_vlan_rx_kill_vid,	13102	.ndo_vlan_rx_kill_vid = bnx2x_vlan_rx_kill_vid,
13116	#ifdef CONFIG_NET_POLL_CONTROLLER
13117	.ndo_poll_controller = poll_bnx2x,
13118	#endif
13119	.ndo_setup_tc = __bnx2x_setup_tc,	13103	.ndo_setup_tc = __bnx2x_setup_tc,
13120	#ifdef CONFIG_BNX2X_SRIOV	13104	#ifdef CONFIG_BNX2X_SRIOV
13121	.ndo_set_vf_mac = bnx2x_set_vf_mac,	13105	.ndo_set_vf_mac = bnx2x_set_vf_mac,

drivers/net/ethernet/broadcom/bnxt/bnxt.c+7−20

 	bnxt_queue_sp_work(bp);
 }
-#ifdef CONFIG_NET_POLL_CONTROLLER
-static void bnxt_poll_controller(struct net_device *dev)
-{
-	struct bnxt *bp = netdev_priv(dev);
-	int i;
-	/* Only process tx rings/combined rings in netpoll mode. */
-	for (i = 0; i < bp->tx_nr_rings; i++) {
-		struct bnxt_tx_ring_info *txr = &bp->tx_ring[i];
-		napi_schedule(&txr->bnapi->napi);
-	}
-}
-#endif
 static void bnxt_timer(struct timer_list *t)
 {
 	struct bnxt *bp = from_timer(bp, t, timer);
 	if (ether_addr_equal(addr->sa_data, dev->dev_addr))
 		return 0;
-	rc = bnxt_approve_mac(bp, addr->sa_data);
+	rc = bnxt_approve_mac(bp, addr->sa_data, true);
 	if (rc)
 		return rc;
 	.ndo_set_vf_link_state	= bnxt_set_vf_link_state,
 	.ndo_set_vf_spoofchk	= bnxt_set_vf_spoofchk,
 	.ndo_set_vf_trust	= bnxt_set_vf_trust,
-#endif
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	.ndo_poll_controller	= bnxt_poll_controller,
 #endif
 	.ndo_setup_tc           = bnxt_setup_tc,
 #ifdef CONFIG_RFS_ACCEL
 	} else {
 #ifdef CONFIG_BNXT_SRIOV
 		struct bnxt_vf_info *vf = &bp->vf;
+		bool strict_approval = true;
 		if (is_valid_ether_addr(vf->mac_addr)) {
 			/* overwrite netdev dev_addr with admin VF MAC */
 			memcpy(bp->dev->dev_addr, vf->mac_addr, ETH_ALEN);
+			/* Older PF driver or firmware may not approve this
+			 * correctly.
+			 */
+			strict_approval = false;
 		} else {
 			eth_hw_addr_random(bp->dev);
 		}
-		rc = bnxt_approve_mac(bp, bp->dev->dev_addr);
+		rc = bnxt_approve_mac(bp, bp->dev->dev_addr, strict_approval);
 #endif
 	}
 	return rc;

drivers/net/ethernet/broadcom/bnxt/bnxt_devlink.c+3−0

@@ -46,6 +46,9 @@ static int bnxt_hwrm_nvm_req(struct bnxt bp, u32 param_id, void msg, · 45 unmodified lines
46	}	46	}
47	}	47	}
48		48
		49	if (i == ARRAY_SIZE(nvm_params))
		50	return -EOPNOTSUPP;
		51
49	if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)	52	if (nvm_param.dir_type == BNXT_NVM_PORT_CFG)
50	idx = bp->pf.port_id;	53	idx = bp->pf.port_id;
51	else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)	54	else if (nvm_param.dir_type == BNXT_NVM_FUNC_CFG)

drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.c+5−4

 	mutex_unlock(&bp->hwrm_cmd_lock);
 }
-int bnxt_approve_mac(struct bnxt *bp, u8 *mac)
+int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
 {
 	struct hwrm_func_vf_cfg_input req = {0};
 	int rc = 0;
 	memcpy(req.dflt_mac_addr, mac, ETH_ALEN);
 	rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
 mac_done:
-	if (rc) {
+	if (rc && strict) {
 		rc = -EADDRNOTAVAIL;
 		netdev_warn(bp->dev, "VF MAC address %pM not approved by the PF\n",
 			    mac);
+		return rc;
 	}
-	return rc;
+	return 0;
 }
 #else
 {
 }
-int bnxt_approve_mac(struct bnxt *bp, u8 *mac)
+int bnxt_approve_mac(struct bnxt *bp, u8 *mac, bool strict)
 {
 	return 0;
 }

drivers/net/ethernet/broadcom/bnxt/bnxt_sriov.h+1−1

@@ -39,5 +39,5 @@ int bnxt_sriov_configure(struct pci_dev *pdev, int num_vfs); · 38 unmodified lines
39	void bnxt_sriov_disable(struct bnxt *);	39	void bnxt_sriov_disable(struct bnxt *);
40	void bnxt_hwrm_exec_fwd_req(struct bnxt *);	40	void bnxt_hwrm_exec_fwd_req(struct bnxt *);
41	void bnxt_update_vf_mac(struct bnxt *);	41	void bnxt_update_vf_mac(struct bnxt *);
42	int bnxt_approve_mac(struct bnxt , u8 );	42	int bnxt_approve_mac(struct bnxt , u8 , bool);
43	#endif	43	#endif

drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c+14−6

 	return 0;
 }
-static void bnxt_tc_parse_vlan(struct bnxt *bp,
+static int bnxt_tc_parse_vlan(struct bnxt *bp,
-			       struct bnxt_tc_actions *actions,
+			      struct bnxt_tc_actions *actions,
-			       const struct tc_action *tc_act)
+			      const struct tc_action *tc_act)
 {
-	if (tcf_vlan_action(tc_act) == TCA_VLAN_ACT_POP) {
+	switch (tcf_vlan_action(tc_act)) {
+	case TCA_VLAN_ACT_POP:
 		actions->flags |= BNXT_TC_ACTION_FLAG_POP_VLAN;
-	} else if (tcf_vlan_action(tc_act) == TCA_VLAN_ACT_PUSH) {
+		break;
+	case TCA_VLAN_ACT_PUSH:
 		actions->flags |= BNXT_TC_ACTION_FLAG_PUSH_VLAN;
 		actions->push_vlan_tci = htons(tcf_vlan_push_vid(tc_act));
 		actions->push_vlan_tpid = tcf_vlan_push_proto(tc_act);
+		break;
+	default:
+		return -EOPNOTSUPP;
 	}
+	return 0;
 }
 static int bnxt_tc_parse_tunnel_set(struct bnxt *bp,
 		/* Push/pop VLAN */
 		if (is_tcf_vlan(tc_act)) {
-			bnxt_tc_parse_vlan(bp, actions, tc_act);
+			rc = bnxt_tc_parse_vlan(bp, actions, tc_act);
+			if (rc)
+				return rc;
 			continue;
 		}

drivers/net/ethernet/cadence/macb_main.c+8−0

 	.init = macb_init,
 };
+static const struct macb_config sama5d3macb_config = {
+	.caps = MACB_CAPS_SG_DISABLED
+	      | MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII,
+	.clk_init = macb_clk_init,
+	.init = macb_init,
+};
 static const struct macb_config pc302gem_config = {
 	.caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
 	.dma_burst_length = 16,
 	{ .compatible = "cdns,gem", .data = &pc302gem_config },
 	{ .compatible = "atmel,sama5d2-gem", .data = &sama5d2_config },
 	{ .compatible = "atmel,sama5d3-gem", .data = &sama5d3_config },
+	{ .compatible = "atmel,sama5d3-macb", .data = &sama5d3macb_config },
 	{ .compatible = "atmel,sama5d4-gem", .data = &sama5d4_config },
 	{ .compatible = "cdns,at91rm9200-emac", .data = &emac_config },
 	{ .compatible = "cdns,emac", .data = &emac_config },

drivers/net/ethernet/chelsio/cxgb4/t4_msg.h+0−1

@@ -753,7 +753,6 @@ struct cpl_abort_req_rss { · 752 unmodified lines
753	};	753	};
754		754
755	struct cpl_abort_req_rss6 {	755	struct cpl_abort_req_rss6 {
756	WR_HDR;
757	union opcode_tid ot;	756	union opcode_tid ot;
758	__be32 srqidx_status;	757	__be32 srqidx_status;
759	};	758	};

drivers/net/ethernet/cirrus/ep93xx_eth.c+1−1

@@ -332,7 +332,7 @@ static int ep93xx_poll(struct napi_struct *napi, int budget) · 331 unmodified lines
332	return rx;	332	return rx;
333	}	333	}
334		334
335	static int ep93xx_xmit(struct sk_buff skb, struct net_device dev)	335	static netdev_tx_t ep93xx_xmit(struct sk_buff skb, struct net_device dev)
336	{	336	{
337	struct ep93xx_priv *ep = netdev_priv(dev);	337	struct ep93xx_priv *ep = netdev_priv(dev);
338	struct ep93xx_tdesc *txd;	338	struct ep93xx_tdesc *txd;

drivers/net/ethernet/cirrus/mac89x0.c+2−2

@@ -113,7 +113,7 @@ struct net_local { · 112 unmodified lines
113		113
114	/* Index to functions, as function prototypes. */	114	/* Index to functions, as function prototypes. */
115	static int net_open(struct net_device *dev);	115	static int net_open(struct net_device *dev);
116	static int net_send_packet(struct sk_buff skb, struct net_device dev);	116	static netdev_tx_t net_send_packet(struct sk_buff skb, struct net_device dev);
117	static irqreturn_t net_interrupt(int irq, void *dev_id);	117	static irqreturn_t net_interrupt(int irq, void *dev_id);
118	static void set_multicast_list(struct net_device *dev);	118	static void set_multicast_list(struct net_device *dev);
119	static void net_rx(struct net_device *dev);	119	static void net_rx(struct net_device *dev);
@@ -324,7 +324,7 @@ net_open(struct net_device *dev) · 204 unmodified lines
324	return 0;	324	return 0;
325	}	325	}
326		326
327	static int	327	static netdev_tx_t
328	net_send_packet(struct sk_buff skb, struct net_device dev)	328	net_send_packet(struct sk_buff skb, struct net_device dev)
329	{	329	{
330	struct net_local *lp = netdev_priv(dev);	330	struct net_local *lp = netdev_priv(dev);

drivers/net/ethernet/emulex/benet/be_cmds.c+1−1

@@ -4500,7 +4500,7 @@ int be_cmd_get_profile_config(struct be_adapter *adapter, · 4499 unmodified lines
4500	port_res->max_vfs += le16_to_cpu(pcie->num_vfs);	4500	port_res->max_vfs += le16_to_cpu(pcie->num_vfs);
4501	}	4501	}
4502	}	4502	}
4503	return status;	4503	goto err;
4504	}	4504	}
4505		4505
4506	pcie = be_get_pcie_desc(resp->func_param, desc_count,	4506	pcie = be_get_pcie_desc(resp->func_param, desc_count,

drivers/net/ethernet/hp/hp100.c+1−1

@@ -2634,7 +2634,7 @@ static int hp100_login_to_vg_hub(struct net_device *dev, u_short force_relogin) · 2633 unmodified lines
2634	/* Wait for link to drop */	2634	/* Wait for link to drop */
2635	time = jiffies + (HZ / 10);	2635	time = jiffies + (HZ / 10);
2636	do {	2636	do {
2637	if (~(hp100_inb(VG_LAN_CFG_1) & HP100_LINK_UP_ST))	2637	if (!(hp100_inb(VG_LAN_CFG_1) & HP100_LINK_UP_ST))
2638	break;	2638	break;
2639	if (!in_interrupt())	2639	if (!in_interrupt())
2640	schedule_timeout_interruptible(1);	2640	schedule_timeout_interruptible(1);

drivers/net/ethernet/i825xx/ether1.c+3−2

 #define RX_AREA_END	0x0fc00
 static int ether1_open(struct net_device *dev);
-static int ether1_sendpacket(struct sk_buff *skb, struct net_device *dev);
+static netdev_tx_t ether1_sendpacket(struct sk_buff *skb,
+				     struct net_device *dev);
 static irqreturn_t ether1_interrupt(int irq, void *dev_id);
 static int ether1_close(struct net_device *dev);
 static void ether1_setmulticastlist(struct net_device *dev);
 	netif_wake_queue(dev);
 }
-static int
+static netdev_tx_t
 ether1_sendpacket (struct sk_buff *skb, struct net_device *dev)
 {
 	int tmp, tst, nopaddr, txaddr, tbdaddr, dataddr;

drivers/net/ethernet/i825xx/lib82596.c+2−2

@@ -347,7 +347,7 @@ static const char init_setup[] = · 346 unmodified lines
347	0x7f /* multi IA / };	347	0x7f /* multi IA / };
348		348
349	static int i596_open(struct net_device *dev);	349	static int i596_open(struct net_device *dev);
350	static int i596_start_xmit(struct sk_buff skb, struct net_device dev);	350	static netdev_tx_t i596_start_xmit(struct sk_buff skb, struct net_device dev);
351	static irqreturn_t i596_interrupt(int irq, void *dev_id);	351	static irqreturn_t i596_interrupt(int irq, void *dev_id);
352	static int i596_close(struct net_device *dev);	352	static int i596_close(struct net_device *dev);
353	static void i596_add_cmd(struct net_device dev, struct i596_cmd cmd);	353	static void i596_add_cmd(struct net_device dev, struct i596_cmd cmd);
@@ -966,7 +966,7 @@ static void i596_tx_timeout (struct net_device *dev) · 612 unmodified lines
966	}	966	}
967		967
968		968
969	static int i596_start_xmit(struct sk_buff skb, struct net_device dev)	969	static netdev_tx_t i596_start_xmit(struct sk_buff skb, struct net_device dev)
970	{	970	{
971	struct i596_private *lp = netdev_priv(dev);	971	struct i596_private *lp = netdev_priv(dev);
972	struct tx_cmd *tx_cmd;	972	struct tx_cmd *tx_cmd;

drivers/net/ethernet/i825xx/sun3_82586.c+4−2

 static irqreturn_t sun3_82586_interrupt(int irq,void *dev_id);
 static int     sun3_82586_open(struct net_device *dev);
 static int     sun3_82586_close(struct net_device *dev);
-static int     sun3_82586_send_packet(struct sk_buff *,struct net_device *);
+static netdev_tx_t     sun3_82586_send_packet(struct sk_buff *,
+					      struct net_device *);
 static struct  net_device_stats *sun3_82586_get_stats(struct net_device *dev);
 static void    set_multicast_list(struct net_device *dev);
 static void    sun3_82586_timeout(struct net_device *dev);
  * send frame
  */
-static int sun3_82586_send_packet(struct sk_buff *skb, struct net_device *dev)
+static netdev_tx_t
+sun3_82586_send_packet(struct sk_buff *skb, struct net_device *dev)
 {
 	int len,i;
 #ifndef NO_NOPCOMMANDS

drivers/net/ethernet/ibm/emac/core.c+10−5

@@ -2677,12 +2677,17 @@ static int emac_init_phy(struct emac_instance *dev) · 2676 unmodified lines
2677	if (of_phy_is_fixed_link(np)) {	2677	if (of_phy_is_fixed_link(np)) {
2678	int res = emac_dt_mdio_probe(dev);	2678	int res = emac_dt_mdio_probe(dev);
2679		2679
2680	if (!res) {	2680	if (res)
2681	res = of_phy_register_fixed_link(np);	2681	return res;
2682	if (res)	2682
2683	mdiobus_unregister(dev->mii_bus);	2683	res = of_phy_register_fixed_link(np);
		2684	dev->phy_dev = of_phy_find_device(np);
		2685	if (res \|\| !dev->phy_dev) {
		2686	mdiobus_unregister(dev->mii_bus);
		2687	return res ? res : -EINVAL;
2684	}	2688	}
2685	return res;	2689	emac_adjust_link(dev->ndev);
		2690	put_device(&dev->phy_dev->mdio.dev);
2686	}	2691	}
2687	return 0;	2692	return 0;
2688	}	2693	}

drivers/net/ethernet/intel/fm10k/fm10k.h+0−3

 void fm10k_service_event_schedule(struct fm10k_intfc *interface);
 void fm10k_macvlan_schedule(struct fm10k_intfc *interface);
 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
-#ifdef CONFIG_NET_POLL_CONTROLLER
-void fm10k_netpoll(struct net_device *netdev);
-#endif
 /* Netdev */
 struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info);

drivers/net/ethernet/intel/fm10k/fm10k_netdev.c+0−3

 	.ndo_udp_tunnel_del	= fm10k_udp_tunnel_del,
 	.ndo_dfwd_add_station	= fm10k_dfwd_add_station,
 	.ndo_dfwd_del_station	= fm10k_dfwd_del_station,
-#ifdef CONFIG_NET_POLL_CONTROLLER
-	.ndo_poll_controller	= fm10k_netpoll,
-#endif
 	.ndo_features_check	= fm10k_features_check,
 };

drivers/net/ethernet/intel/fm10k/fm10k_pci.c+0−22

@@ -1210,28 +1210,6 @@ static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data) · 1209 unmodified lines
1210	return IRQ_HANDLED;	1210	return IRQ_HANDLED;
1211	}	1211	}
1212		1212
1213	#ifdef CONFIG_NET_POLL_CONTROLLER
1214	/**
1215	* fm10k_netpoll - A Polling 'interrupt' handler
1216	* @netdev: network interface device structure
1217	*
1218	* This is used by netconsole to send skbs without having to re-enable
1219	* interrupts. It's not called while the normal interrupt routine is executing.
1220	**/
1221	void fm10k_netpoll(struct net_device *netdev)
1222	{
1223	struct fm10k_intfc *interface = netdev_priv(netdev);
1224	int i;
1225
1226	/* if interface is down do nothing */
1227	if (test_bit(__FM10K_DOWN, interface->state))
1228	return;
1229
1230	for (i = 0; i < interface->num_q_vectors; i++)
1231	fm10k_msix_clean_rings(0, interface->q_vector[i]);
1232	}
1233
1234	#endif
1235	#define FM10K_ERR_MSG(type) case (type): error = #type; break	1213	#define FM10K_ERR_MSG(type) case (type): error = #type; break
1236	static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,	1214	static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
1237	struct fm10k_fault *fault)	1215	struct fm10k_fault *fault)

drivers/net/ethernet/intel/i40evf/i40evf_main.c+0−26

@@ -396,29 +396,6 @@ static void i40evf_map_rings_to_vectors(struct i40evf_adapter *adapter) · 395 unmodified lines
396	adapter->aq_required \|= I40EVF_FLAG_AQ_MAP_VECTORS;	396	adapter->aq_required \|= I40EVF_FLAG_AQ_MAP_VECTORS;
397	}	397	}
398		398
399	#ifdef CONFIG_NET_POLL_CONTROLLER
400	/**
401	* i40evf_netpoll - A Polling 'interrupt' handler
402	* @netdev: network interface device structure
403	*
404	* This is used by netconsole to send skbs without having to re-enable
405	* interrupts. It's not called while the normal interrupt routine is executing.
406	**/
407	static void i40evf_netpoll(struct net_device *netdev)
408	{
409	struct i40evf_adapter *adapter = netdev_priv(netdev);
410	int q_vectors = adapter->num_msix_vectors - NONQ_VECS;
411	int i;
412
413	/* if interface is down do nothing */
414	if (test_bit(__I40E_VSI_DOWN, adapter->vsi.state))
415	return;
416
417	for (i = 0; i < q_vectors; i++)
418	i40evf_msix_clean_rings(0, &adapter->q_vectors[i]);
419	}
420
421	#endif
422	/**	399	/**
423	* i40evf_irq_affinity_notify - Callback for affinity changes	400	* i40evf_irq_affinity_notify - Callback for affinity changes
424	* @notify: context as to what irq was changed	401	* @notify: context as to what irq was changed
@@ -3229,9 +3206,6 @@ static const struct net_device_ops i40evf_netdev_ops = { · 2804 unmodified lines
3229	.ndo_features_check = i40evf_features_check,	3206	.ndo_features_check = i40evf_features_check,
3230	.ndo_fix_features = i40evf_fix_features,	3207	.ndo_fix_features = i40evf_fix_features,
3231	.ndo_set_features = i40evf_set_features,	3208	.ndo_set_features = i40evf_set_features,
3232	#ifdef CONFIG_NET_POLL_CONTROLLER
3233	.ndo_poll_controller = i40evf_netpoll,
3234	#endif
3235	.ndo_setup_tc = i40evf_setup_tc,	3209	.ndo_setup_tc = i40evf_setup_tc,
3236	};	3210	};
3237		3211

drivers/net/ethernet/intel/ice/ice_main.c+0−27

@@ -4806,30 +4806,6 @@ void ice_get_stats64(struct net_device netdev, struct rtnl_link_stats64 stats) · 4805 unmodified lines
4806	stats->rx_length_errors = vsi_stats->rx_length_errors;	4806	stats->rx_length_errors = vsi_stats->rx_length_errors;
4807	}	4807	}
4808		4808
4809	#ifdef CONFIG_NET_POLL_CONTROLLER
4810	/**
4811	* ice_netpoll - polling "interrupt" handler
4812	* @netdev: network interface device structure
4813	*
4814	* Used by netconsole to send skbs without having to re-enable interrupts.
4815	* This is not called in the normal interrupt path.
4816	*/
4817	static void ice_netpoll(struct net_device *netdev)
4818	{
4819	struct ice_netdev_priv *np = netdev_priv(netdev);
4820	struct ice_vsi *vsi = np->vsi;
4821	struct ice_pf *pf = vsi->back;
4822	int i;
4823
4824	if (test_bit(__ICE_DOWN, vsi->state) \|\|
4825	!test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
4826	return;
4827
4828	for (i = 0; i < vsi->num_q_vectors; i++)
4829	ice_msix_clean_rings(0, vsi->q_vectors[i]);
4830	}
4831	#endif /* CONFIG_NET_POLL_CONTROLLER */
4832
4833	/**	4809	/**
4834	* ice_napi_disable_all - Disable NAPI for all q_vectors in the VSI	4810	* ice_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4835	* @vsi: VSI having NAPI disabled	4811	* @vsi: VSI having NAPI disabled
@@ -5497,9 +5473,6 @@ static const struct net_device_ops ice_netdev_ops = { · 661 unmodified lines
5497	.ndo_validate_addr = eth_validate_addr,	5473	.ndo_validate_addr = eth_validate_addr,
5498	.ndo_change_mtu = ice_change_mtu,	5474	.ndo_change_mtu = ice_change_mtu,
5499	.ndo_get_stats64 = ice_get_stats64,	5475	.ndo_get_stats64 = ice_get_stats64,
5500	#ifdef CONFIG_NET_POLL_CONTROLLER
5501	.ndo_poll_controller = ice_netpoll,
5502	#endif /* CONFIG_NET_POLL_CONTROLLER */
5503	.ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,	5476	.ndo_vlan_rx_add_vid = ice_vlan_rx_add_vid,
5504	.ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,	5477	.ndo_vlan_rx_kill_vid = ice_vlan_rx_kill_vid,
5505	.ndo_set_features = ice_set_features,	5478	.ndo_set_features = ice_set_features,

drivers/net/ethernet/intel/igb/igb_main.c+0−30

@@ -205,10 +205,6 @@ static struct notifier_block dca_notifier = { · 204 unmodified lines
205	.priority = 0	205	.priority = 0
206	};	206	};
207	#endif	207	#endif
208	#ifdef CONFIG_NET_POLL_CONTROLLER
209	/* for netdump / net console */
210	static void igb_netpoll(struct net_device *);
211	#endif
212	#ifdef CONFIG_PCI_IOV	208	#ifdef CONFIG_PCI_IOV
213	static unsigned int max_vfs;	209	static unsigned int max_vfs;
214	module_param(max_vfs, uint, 0);	210	module_param(max_vfs, uint, 0);
@@ -2881,9 +2877,6 @@ static const struct net_device_ops igb_netdev_ops = { · 2666 unmodified lines
2881	.ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,	2877	.ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2882	.ndo_set_vf_trust = igb_ndo_set_vf_trust,	2878	.ndo_set_vf_trust = igb_ndo_set_vf_trust,
2883	.ndo_get_vf_config = igb_ndo_get_vf_config,	2879	.ndo_get_vf_config = igb_ndo_get_vf_config,
2884	#ifdef CONFIG_NET_POLL_CONTROLLER
2885	.ndo_poll_controller = igb_netpoll,
2886	#endif
2887	.ndo_fix_features = igb_fix_features,	2880	.ndo_fix_features = igb_fix_features,
2888	.ndo_set_features = igb_set_features,	2881	.ndo_set_features = igb_set_features,
2889	.ndo_fdb_add = igb_ndo_fdb_add,	2882	.ndo_fdb_add = igb_ndo_fdb_add,
@@ -9053,29 +9046,6 @@ static int igb_pci_sriov_configure(struct pci_dev *dev, int num_vfs) · 6163 unmodified lines
9053	return 0;	9046	return 0;
9054	}	9047	}
9055		9048
9056	#ifdef CONFIG_NET_POLL_CONTROLLER
9057	/* Polling 'interrupt' - used by things like netconsole to send skbs
9058	* without having to re-enable interrupts. It's not called while
9059	* the interrupt routine is executing.
9060	*/
9061	static void igb_netpoll(struct net_device *netdev)
9062	{
9063	struct igb_adapter *adapter = netdev_priv(netdev);
9064	struct e1000_hw *hw = &adapter->hw;
9065	struct igb_q_vector *q_vector;
9066	int i;
9067
9068	for (i = 0; i < adapter->num_q_vectors; i++) {
9069	q_vector = adapter->q_vector[i];
9070	if (adapter->flags & IGB_FLAG_HAS_MSIX)
9071	wr32(E1000_EIMC, q_vector->eims_value);
9072	else
9073	igb_irq_disable(adapter);
9074	napi_schedule(&q_vector->napi);
9075	}
9076	}
9077	#endif /* CONFIG_NET_POLL_CONTROLLER */
9078
9079	/**	9049	/**
9080	* igb_io_error_detected - called when PCI error is detected	9050	* igb_io_error_detected - called when PCI error is detected
9081	* @pdev: Pointer to PCI device	9051	* @pdev: Pointer to PCI device

drivers/net/ethernet/intel/ixgb/ixgb_main.c+0−25

@@ -81,11 +81,6 @@ static int ixgb_vlan_rx_kill_vid(struct net_device *netdev, · 80 unmodified lines
81	__be16 proto, u16 vid);	81	__be16 proto, u16 vid);
82	static void ixgb_restore_vlan(struct ixgb_adapter *adapter);	82	static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
83		83
84	#ifdef CONFIG_NET_POLL_CONTROLLER
85	/* for netdump / net console */
86	static void ixgb_netpoll(struct net_device *dev);
87	#endif
88
89	static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,	84	static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
90	enum pci_channel_state state);	85	enum pci_channel_state state);
91	static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);	86	static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
@@ -348,9 +343,6 @@ static const struct net_device_ops ixgb_netdev_ops = { · 256 unmodified lines
348	.ndo_tx_timeout = ixgb_tx_timeout,	343	.ndo_tx_timeout = ixgb_tx_timeout,
349	.ndo_vlan_rx_add_vid = ixgb_vlan_rx_add_vid,	344	.ndo_vlan_rx_add_vid = ixgb_vlan_rx_add_vid,
350	.ndo_vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid,	345	.ndo_vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid,
351	#ifdef CONFIG_NET_POLL_CONTROLLER
352	.ndo_poll_controller = ixgb_netpoll,
353	#endif
354	.ndo_fix_features = ixgb_fix_features,	346	.ndo_fix_features = ixgb_fix_features,
355	.ndo_set_features = ixgb_set_features,	347	.ndo_set_features = ixgb_set_features,
356	};	348	};
@@ -2195,23 +2187,6 @@ ixgb_restore_vlan(struct ixgb_adapter *adapter) · 1838 unmodified lines
2195	ixgb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);	2187	ixgb_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2196	}	2188	}
2197		2189
2198	#ifdef CONFIG_NET_POLL_CONTROLLER
2199	/*
2200	* Polling 'interrupt' - used by things like netconsole to send skbs
2201	* without having to re-enable interrupts. It's not called while
2202	* the interrupt routine is executing.
2203	*/
2204
2205	static void ixgb_netpoll(struct net_device *dev)
2206	{
2207	struct ixgb_adapter *adapter = netdev_priv(dev);
2208
2209	disable_irq(adapter->pdev->irq);
2210	ixgb_intr(adapter->pdev->irq, dev);
2211	enable_irq(adapter->pdev->irq);
2212	}
2213	#endif
2214
2215	/**	2190	/**
2216	* ixgb_io_error_detected - called when PCI error is detected	2191	* ixgb_io_error_detected - called when PCI error is detected
2217	* @pdev: pointer to pci device with error	2192	* @pdev: pointer to pci device with error

drivers/net/ethernet/intel/ixgbe/ixgbe_main.c+0−25

@@ -8768,28 +8768,6 @@ static int ixgbe_del_sanmac_netdev(struct net_device *dev) · 8767 unmodified lines
8768	return err;	8768	return err;
8769	}	8769	}
8770		8770
8771	#ifdef CONFIG_NET_POLL_CONTROLLER
8772	/*
8773	* Polling 'interrupt' - used by things like netconsole to send skbs
8774	* without having to re-enable interrupts. It's not called while
8775	* the interrupt routine is executing.
8776	*/
8777	static void ixgbe_netpoll(struct net_device *netdev)
8778	{
8779	struct ixgbe_adapter *adapter = netdev_priv(netdev);
8780	int i;
8781
8782	/* if interface is down do nothing */
8783	if (test_bit(__IXGBE_DOWN, &adapter->state))
8784	return;
8785
8786	/* loop through and schedule all active queues */
8787	for (i = 0; i < adapter->num_q_vectors; i++)
8788	ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
8789	}
8790
8791	#endif
8792
8793	static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,	8771	static void ixgbe_get_ring_stats64(struct rtnl_link_stats64 *stats,
8794	struct ixgbe_ring *ring)	8772	struct ixgbe_ring *ring)
8795	{	8773	{
@@ -10251,9 +10229,6 @@ static const struct net_device_ops ixgbe_netdev_ops = { · 1455 unmodified lines
10251	.ndo_get_vf_config = ixgbe_ndo_get_vf_config,	10229	.ndo_get_vf_config = ixgbe_ndo_get_vf_config,
10252	.ndo_get_stats64 = ixgbe_get_stats64,	10230	.ndo_get_stats64 = ixgbe_get_stats64,
10253	.ndo_setup_tc = __ixgbe_setup_tc,	10231	.ndo_setup_tc = __ixgbe_setup_tc,
10254	#ifdef CONFIG_NET_POLL_CONTROLLER
10255	.ndo_poll_controller = ixgbe_netpoll,
10256	#endif
10257	#ifdef IXGBE_FCOE	10232	#ifdef IXGBE_FCOE
10258	.ndo_select_queue = ixgbe_select_queue,	10233	.ndo_select_queue = ixgbe_select_queue,
10259	.ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,	10234	.ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,

drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c+0−21

@@ -4233,24 +4233,6 @@ static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu) · 4232 unmodified lines
4233	return 0;	4233	return 0;
4234	}	4234	}
4235		4235
4236	#ifdef CONFIG_NET_POLL_CONTROLLER
4237	/* Polling 'interrupt' - used by things like netconsole to send skbs
4238	* without having to re-enable interrupts. It's not called while
4239	* the interrupt routine is executing.
4240	*/
4241	static void ixgbevf_netpoll(struct net_device *netdev)
4242	{
4243	struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4244	int i;
4245
4246	/* if interface is down do nothing */
4247	if (test_bit(__IXGBEVF_DOWN, &adapter->state))
4248	return;
4249	for (i = 0; i < adapter->num_rx_queues; i++)
4250	ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
4251	}
4252	#endif /* CONFIG_NET_POLL_CONTROLLER */
4253
4254	static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)	4236	static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
4255	{	4237	{
4256	struct net_device *netdev = pci_get_drvdata(pdev);	4238	struct net_device *netdev = pci_get_drvdata(pdev);
@@ -4482,9 +4464,6 @@ static const struct net_device_ops ixgbevf_netdev_ops = { · 225 unmodified lines
4482	.ndo_tx_timeout = ixgbevf_tx_timeout,	4464	.ndo_tx_timeout = ixgbevf_tx_timeout,
4483	.ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,	4465	.ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
4484	.ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,	4466	.ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
4485	#ifdef CONFIG_NET_POLL_CONTROLLER
4486	.ndo_poll_controller = ixgbevf_netpoll,
4487	#endif
4488	.ndo_features_check = ixgbevf_features_check,	4467	.ndo_features_check = ixgbevf_features_check,
4489	.ndo_bpf = ixgbevf_xdp,	4468	.ndo_bpf = ixgbevf_xdp,
4490	};	4469	};

drivers/net/ethernet/lantiq_etop.c+1−0

@@ -274,6 +274,7 @@ ltq_etop_hw_init(struct net_device *dev) · 273 unmodified lines
274	struct ltq_etop_chan *ch = &priv->ch[i];	274	struct ltq_etop_chan *ch = &priv->ch[i];
275		275
276	ch->idx = ch->dma.nr = i;	276	ch->idx = ch->dma.nr = i;
		277	ch->dma.dev = &priv->pdev->dev;
277		278
278	if (IS_TX(i)) {	279	if (IS_TX(i)) {
279	ltq_dma_alloc_tx(&ch->dma);	280	ltq_dma_alloc_tx(&ch->dma);

drivers/net/ethernet/marvell/mvneta.c+6−7

 		if (!data || !(rx_desc->buf_phys_addr))
 			continue;
-		dma_unmap_single(pp->dev->dev.parent, rx_desc->buf_phys_addr,
+		dma_unmap_page(pp->dev->dev.parent, rx_desc->buf_phys_addr,
-				 MVNETA_RX_BUF_SIZE(pp->pkt_size), DMA_FROM_DEVICE);
+			       PAGE_SIZE, DMA_FROM_DEVICE);
 		__free_page(data);
 	}
 }
 				skb_add_rx_frag(rxq->skb, frag_num, page,
 						frag_offset, frag_size,
 						PAGE_SIZE);
-				dma_unmap_single(dev->dev.parent, phys_addr,
+				dma_unmap_page(dev->dev.parent, phys_addr,
-						 PAGE_SIZE, DMA_FROM_DEVICE);
+					       PAGE_SIZE, DMA_FROM_DEVICE);
 				rxq->left_size -= frag_size;
 			}
 		} else {
 						frag_offset, frag_size,
 						PAGE_SIZE);
-				dma_unmap_single(dev->dev.parent, phys_addr,
+				dma_unmap_page(dev->dev.parent, phys_addr,
-						 PAGE_SIZE,
+					       PAGE_SIZE, DMA_FROM_DEVICE);
-						 DMA_FROM_DEVICE);
 				rxq->left_size -= frag_size;
 			}

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+12−19

  */
 static void mvpp2_mac_config(struct net_device *dev, unsigned int mode,
 			     const struct phylink_link_state *state);
+static void mvpp2_mac_link_up(struct net_device *dev, unsigned int mode,
+			      phy_interface_t interface, struct phy_device *phy);
 /* Queue modes */
 #define MVPP2_QDIST_SINGLE_MODE	0
 				   cause_rx_tx & ~MVPP2_CAUSE_MISC_SUM_MASK);
 	}
-	cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
+	if (port->has_tx_irqs) {
-	if (cause_tx) {
+		cause_tx = cause_rx_tx & MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_MASK;
-		cause_tx >>= MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_OFFSET;
+		if (cause_tx) {
-		mvpp2_tx_done(port, cause_tx, qv->sw_thread_id);
+			cause_tx >>= MVPP2_CAUSE_TXQ_OCCUP_DESC_ALL_OFFSET;
+			mvpp2_tx_done(port, cause_tx, qv->sw_thread_id);
+		}
 	}
 	/* Process RX packets */
 		mvpp22_mode_reconfigure(port);
 	if (port->phylink) {
+		netif_carrier_off(port->dev);
 		phylink_start(port->phylink);
 	} else {
 		/* Phylink isn't used as of now for ACPI, so the MAC has to be
 		 */
 		struct phylink_link_state state = {
 			.interface = port->phy_interface,
-			.link = 1,
 		};
 		mvpp2_mac_config(port->dev, MLO_AN_INBAND, &state);
+		mvpp2_mac_link_up(port->dev, MLO_AN_INBAND, port->phy_interface,
+				  NULL);
 	}
 	netif_tx_start_all_queues(port->dev);
 		return;
 	}
-	netif_tx_stop_all_queues(port->dev);
-	if (!port->has_phy)
-		netif_carrier_off(port->dev);
 	/* Make sure the port is disabled when reconfiguring the mode */
 	mvpp2_port_disable(port);
 	if (port->priv->hw_version == MVPP21 && port->flags & MVPP2_F_LOOPBACK)
 		mvpp2_port_loopback_set(port, state);
-	/* If the port already was up, make sure it's still in the same state */
+	mvpp2_port_enable(port);
-	if (state->link || !port->has_phy) {
-		mvpp2_port_enable(port);
-		mvpp2_egress_enable(port);
-		mvpp2_ingress_enable(port);
-		if (!port->has_phy)
-			netif_carrier_on(dev);
-		netif_tx_wake_all_queues(dev);
-	}
 }
 static void mvpp2_mac_link_up(struct net_device *dev, unsigned int mode,

drivers/net/ethernet/mellanox/mlx4/en_netdev.c+0−20

@@ -1286,20 +1286,6 @@ out: · 1285 unmodified lines
1286	mutex_unlock(&mdev->state_lock);	1286	mutex_unlock(&mdev->state_lock);
1287	}	1287	}
1288		1288
1289	#ifdef CONFIG_NET_POLL_CONTROLLER
1290	static void mlx4_en_netpoll(struct net_device *dev)
1291	{
1292	struct mlx4_en_priv *priv = netdev_priv(dev);
1293	struct mlx4_en_cq *cq;
1294	int i;
1295
1296	for (i = 0; i < priv->tx_ring_num[TX]; i++) {
1297	cq = priv->tx_cq[TX][i];
1298	napi_schedule(&cq->napi);
1299	}
1300	}
1301	#endif
1302
1303	static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)	1289	static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1304	{	1290	{
1305	u64 reg_id;	1291	u64 reg_id;
@@ -2946,9 +2932,6 @@ static const struct net_device_ops mlx4_netdev_ops = { · 1640 unmodified lines
2946	.ndo_tx_timeout = mlx4_en_tx_timeout,	2932	.ndo_tx_timeout = mlx4_en_tx_timeout,
2947	.ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,	2933	.ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2948	.ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,	2934	.ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2949	#ifdef CONFIG_NET_POLL_CONTROLLER
2950	.ndo_poll_controller = mlx4_en_netpoll,
2951	#endif
2952	.ndo_set_features = mlx4_en_set_features,	2935	.ndo_set_features = mlx4_en_set_features,
2953	.ndo_fix_features = mlx4_en_fix_features,	2936	.ndo_fix_features = mlx4_en_fix_features,
2954	.ndo_setup_tc = __mlx4_en_setup_tc,	2937	.ndo_setup_tc = __mlx4_en_setup_tc,
@@ -2983,9 +2966,6 @@ static const struct net_device_ops mlx4_netdev_ops_master = { · 28 unmodified lines
2983	.ndo_set_vf_link_state = mlx4_en_set_vf_link_state,	2966	.ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2984	.ndo_get_vf_stats = mlx4_en_get_vf_stats,	2967	.ndo_get_vf_stats = mlx4_en_get_vf_stats,
2985	.ndo_get_vf_config = mlx4_en_get_vf_config,	2968	.ndo_get_vf_config = mlx4_en_get_vf_config,
2986	#ifdef CONFIG_NET_POLL_CONTROLLER
2987	.ndo_poll_controller = mlx4_en_netpoll,
2988	#endif
2989	.ndo_set_features = mlx4_en_set_features,	2969	.ndo_set_features = mlx4_en_set_features,
2990	.ndo_fix_features = mlx4_en_fix_features,	2970	.ndo_fix_features = mlx4_en_fix_features,
2991	.ndo_setup_tc = __mlx4_en_setup_tc,	2971	.ndo_setup_tc = __mlx4_en_setup_tc,

drivers/net/ethernet/mellanox/mlx4/eq.c+2−1

@@ -240,7 +240,8 @@ static void mlx4_set_eq_affinity_hint(struct mlx4_priv *priv, int vec) · 239 unmodified lines
240	struct mlx4_dev *dev = &priv->dev;	240	struct mlx4_dev *dev = &priv->dev;
241	struct mlx4_eq *eq = &priv->eq_table.eq[vec];	241	struct mlx4_eq *eq = &priv->eq_table.eq[vec];
242		242
243	if (!eq->affinity_mask \|\| cpumask_empty(eq->affinity_mask))	243	if (!cpumask_available(eq->affinity_mask) \|\|
		244	cpumask_empty(eq->affinity_mask))
244	return;	245	return;
245		246
246	hint_err = irq_set_affinity_hint(eq->irq, eq->affinity_mask);	247	hint_err = irq_set_affinity_hint(eq->irq, eq->affinity_mask);

drivers/net/ethernet/mellanox/mlx5/core/cmd.c+1−1

@@ -206,7 +206,7 @@ static void poll_timeout(struct mlx5_cmd_work_ent *ent) · 205 unmodified lines
206	u8 own;	206	u8 own;
207		207
208	do {	208	do {
209	own = ent->lay->status_own;	209	own = READ_ONCE(ent->lay->status_own);
210	if (!(own & CMD_OWNER_HW)) {	210	if (!(own & CMD_OWNER_HW)) {
211	ent->ret = 0;	211	ent->ret = 0;
212	return;	212	return;

drivers/net/ethernet/mellanox/mlx5/core/dev.c+14−8

 	delayed_event_start(priv);
 	dev_ctx->context = intf->add(dev);
-	set_bit(MLX5_INTERFACE_ADDED, &dev_ctx->state);
-	if (intf->attach)
-		set_bit(MLX5_INTERFACE_ATTACHED, &dev_ctx->state);
 	if (dev_ctx->context) {
+		set_bit(MLX5_INTERFACE_ADDED, &dev_ctx->state);
+		if (intf->attach)
+			set_bit(MLX5_INTERFACE_ATTACHED, &dev_ctx->state);
 		spin_lock_irq(&priv->ctx_lock);
 		list_add_tail(&dev_ctx->list, &priv->ctx_list);
 	if (intf->attach) {
 		if (test_bit(MLX5_INTERFACE_ATTACHED, &dev_ctx->state))
 			goto out;
-		intf->attach(dev, dev_ctx->context);
+		if (intf->attach(dev, dev_ctx->context))
+			goto out;
 		set_bit(MLX5_INTERFACE_ATTACHED, &dev_ctx->state);
 	} else {
 		if (test_bit(MLX5_INTERFACE_ADDED, &dev_ctx->state))
 			goto out;
 		dev_ctx->context = intf->add(dev);
+		if (!dev_ctx->context)
+			goto out;
 		set_bit(MLX5_INTERFACE_ADDED, &dev_ctx->state);
 	}
 		}
 }
-static u16 mlx5_gen_pci_id(struct mlx5_core_dev *dev)
+static u32 mlx5_gen_pci_id(struct mlx5_core_dev *dev)
 {
-	return (u16)((dev->pdev->bus->number << 8) |
+	return (u32)((pci_domain_nr(dev->pdev->bus) << 16) |
+		     (dev->pdev->bus->number << 8) |
 		     PCI_SLOT(dev->pdev->devfn));
 }
 /* Must be called with intf_mutex held */
 struct mlx5_core_dev *mlx5_get_next_phys_dev(struct mlx5_core_dev *dev)
 {
-	u16 pci_id = mlx5_gen_pci_id(dev);
+	u32 pci_id = mlx5_gen_pci_id(dev);
 	struct mlx5_core_dev *res = NULL;
 	struct mlx5_core_dev *tmp_dev;
 	struct mlx5_priv *priv;

drivers/net/ethernet/mellanox/mlx5/core/en_accel/tls.c+2−1

 void mlx5e_tls_build_netdev(struct mlx5e_priv *priv)
 {
-	u32 caps = mlx5_accel_tls_device_caps(priv->mdev);
 	struct net_device *netdev = priv->netdev;
+	u32 caps;
 	if (!mlx5_accel_is_tls_device(priv->mdev))
 		return;
+	caps = mlx5_accel_tls_device_caps(priv->mdev);
 	if (caps & MLX5_ACCEL_TLS_TX) {
 		netdev->features          |= NETIF_F_HW_TLS_TX;
 		netdev->hw_features       |= NETIF_F_HW_TLS_TX;

drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c+1−1

@@ -191,7 +191,7 @@ set_udp(void headers_c, void headers_v, __be16 psrc_m, __be16 psrc_v, · 190 unmodified lines
191	{	191	{
192	if (psrc_m) {	192	if (psrc_m) {
193	MLX5E_FTE_SET(headers_c, udp_sport, 0xffff);	193	MLX5E_FTE_SET(headers_c, udp_sport, 0xffff);
194	MLX5E_FTE_SET(headers_c, udp_sport, ntohs(psrc_v));	194	MLX5E_FTE_SET(headers_v, udp_sport, ntohs(psrc_v));
195	}	195	}
196		196
197	if (pdst_m) {	197	if (pdst_m) {

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+0−19

@@ -4315,22 +4315,6 @@ static int mlx5e_xdp(struct net_device dev, struct netdev_bpf xdp) · 4314 unmodified lines
4315	}	4315	}
4316	}	4316	}
4317		4317
4318	#ifdef CONFIG_NET_POLL_CONTROLLER
4319	/* Fake "interrupt" called by netpoll (eg netconsole) to send skbs without
4320	* reenabling interrupts.
4321	*/
4322	static void mlx5e_netpoll(struct net_device *dev)
4323	{
4324	struct mlx5e_priv *priv = netdev_priv(dev);
4325	struct mlx5e_channels *chs = &priv->channels;
4326
4327	int i;
4328
4329	for (i = 0; i < chs->num; i++)
4330	napi_schedule(&chs->c[i]->napi);
4331	}
4332	#endif
4333
4334	static const struct net_device_ops mlx5e_netdev_ops = {	4318	static const struct net_device_ops mlx5e_netdev_ops = {
4335	.ndo_open = mlx5e_open,	4319	.ndo_open = mlx5e_open,
4336	.ndo_stop = mlx5e_close,	4320	.ndo_stop = mlx5e_close,
@@ -4356,9 +4340,6 @@ static const struct net_device_ops mlx5e_netdev_ops = { · 19 unmodified lines
4356	#ifdef CONFIG_MLX5_EN_ARFS	4340	#ifdef CONFIG_MLX5_EN_ARFS
4357	.ndo_rx_flow_steer = mlx5e_rx_flow_steer,	4341	.ndo_rx_flow_steer = mlx5e_rx_flow_steer,
4358	#endif	4342	#endif
4359	#ifdef CONFIG_NET_POLL_CONTROLLER
4360	.ndo_poll_controller = mlx5e_netpoll,
4361	#endif
4362	#ifdef CONFIG_MLX5_ESWITCH	4343	#ifdef CONFIG_MLX5_ESWITCH
4363	/* SRIOV E-Switch NDOs */	4344	/* SRIOV E-Switch NDOs */
4364	.ndo_set_vf_mac = mlx5e_set_vf_mac,	4345	.ndo_set_vf_mac = mlx5e_set_vf_mac,

drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+1−0

@@ -663,6 +663,7 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw, int nvports) · 662 unmodified lines
663	if (err)	663	if (err)
664	goto miss_rule_err;	664	goto miss_rule_err;
665		665
		666	kvfree(flow_group_in);
666	return 0;	667	return 0;
667		668
668	miss_rule_err:	669	miss_rule_err:

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+39−37

 	return version;
 }
+static struct fs_fte *
+lookup_fte_locked(struct mlx5_flow_group *g,
+		  u32 *match_value,
+		  bool take_write)
+{
+	struct fs_fte *fte_tmp;
+	if (take_write)
+		nested_down_write_ref_node(&g->node, FS_LOCK_PARENT);
+	else
+		nested_down_read_ref_node(&g->node, FS_LOCK_PARENT);
+	fte_tmp = rhashtable_lookup_fast(&g->ftes_hash, match_value,
+					 rhash_fte);
+	if (!fte_tmp || !tree_get_node(&fte_tmp->node)) {
+		fte_tmp = NULL;
+		goto out;
+	}
+	nested_down_write_ref_node(&fte_tmp->node, FS_LOCK_CHILD);
+out:
+	if (take_write)
+		up_write_ref_node(&g->node);
+	else
+		up_read_ref_node(&g->node);
+	return fte_tmp;
+}
 static struct mlx5_flow_handle *
 try_add_to_existing_fg(struct mlx5_flow_table *ft,
 		       struct list_head *match_head,
 	if (IS_ERR(fte))
 		return  ERR_PTR(-ENOMEM);
-	list_for_each_entry(iter, match_head, list) {
-		nested_down_read_ref_node(&iter->g->node, FS_LOCK_PARENT);
-	}
 search_again_locked:
 	version = matched_fgs_get_version(match_head);
 	/* Try to find a fg that already contains a matching fte */
 		struct fs_fte *fte_tmp;
 		g = iter->g;
-		fte_tmp = rhashtable_lookup_fast(&g->ftes_hash, spec->match_value,
+		fte_tmp = lookup_fte_locked(g, spec->match_value, take_write);
-						 rhash_fte);
+		if (!fte_tmp)
-		if (!fte_tmp || !tree_get_node(&fte_tmp->node))
 			continue;
-		nested_down_write_ref_node(&fte_tmp->node, FS_LOCK_CHILD);
-		if (!take_write) {
-			list_for_each_entry(iter, match_head, list)
-				up_read_ref_node(&iter->g->node);
-		} else {
-			list_for_each_entry(iter, match_head, list)
-				up_write_ref_node(&iter->g->node);
-		}
 		rule = add_rule_fg(g, spec->match_value,
 				   flow_act, dest, dest_num, fte_tmp);
 		up_write_ref_node(&fte_tmp->node);
 		return rule;
 	}
-	/* No group with matching fte found. Try to add a new fte to any
-	 * matching fg.
-	 */
-	if (!take_write) {
-		list_for_each_entry(iter, match_head, list)
-			up_read_ref_node(&iter->g->node);
-		list_for_each_entry(iter, match_head, list)
-			nested_down_write_ref_node(&iter->g->node,
-						   FS_LOCK_PARENT);
-		take_write = true;
-	}
 	/* Check the ft version, for case that new flow group
 	 * was added while the fgs weren't locked
 	 */
 	/* Check the fgs version, for case the new FTE with the
 	 * same values was added while the fgs weren't locked
 	 */
-	if (version != matched_fgs_get_version(match_head))
+	if (version != matched_fgs_get_version(match_head)) {
+		take_write = true;
 		goto search_again_locked;
+	}
 	list_for_each_entry(iter, match_head, list) {
 		g = iter->g;
 		if (!g->node.active)
 			continue;
+		nested_down_write_ref_node(&g->node, FS_LOCK_PARENT);
 		err = insert_fte(g, fte);
 		if (err) {
+			up_write_ref_node(&g->node);
 			if (err == -ENOSPC)
 				continue;
-			list_for_each_entry(iter, match_head, list)
-				up_write_ref_node(&iter->g->node);
 			kmem_cache_free(steering->ftes_cache, fte);
 			return ERR_PTR(err);
 		}
 		nested_down_write_ref_node(&fte->node, FS_LOCK_CHILD);
-		list_for_each_entry(iter, match_head, list)
+		up_write_ref_node(&g->node);
-			up_write_ref_node(&iter->g->node);
 		rule = add_rule_fg(g, spec->match_value,
 				   flow_act, dest, dest_num, fte);
 		up_write_ref_node(&fte->node);
 	}
 	rule = ERR_PTR(-ENOENT);
 out:
-	list_for_each_entry(iter, match_head, list)
-		up_write_ref_node(&iter->g->node);
 	kmem_cache_free(steering->ftes_cache, fte);
 	return rule;
 }
 	if (err) {
 		if (take_write)
 			up_write_ref_node(&ft->node);
+		else
+			up_read_ref_node(&ft->node);
 		return ERR_PTR(err);
 	}

drivers/net/ethernet/mellanox/mlx5/core/health.c+9−1

 	add_timer(&health->timer);
 }
-void mlx5_stop_health_poll(struct mlx5_core_dev *dev)
+void mlx5_stop_health_poll(struct mlx5_core_dev *dev, bool disable_health)
 {
 	struct mlx5_core_health *health = &dev->priv.health;
+	unsigned long flags;
+	if (disable_health) {
+		spin_lock_irqsave(&health->wq_lock, flags);
+		set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags);
+		set_bit(MLX5_DROP_NEW_RECOVERY_WORK, &health->flags);
+		spin_unlock_irqrestore(&health->wq_lock, flags);
+	}
 	del_timer_sync(&health->timer);
 }

drivers/net/ethernet/mellanox/mlx5/core/main.c+7−5

 	priv->numa_node = dev_to_node(&dev->pdev->dev);
 	priv->dbg_root = debugfs_create_dir(dev_name(&pdev->dev), mlx5_debugfs_root);
-	if (!priv->dbg_root)
+	if (!priv->dbg_root) {
+		dev_err(&pdev->dev, "Cannot create debugfs dir, aborting\n");
 		return -ENOMEM;
+	}
 	err = mlx5_pci_enable_device(dev);
 	if (err) {
 	pci_clear_master(dev->pdev);
 	release_bar(dev->pdev);
 	mlx5_pci_disable_device(dev);
-	debugfs_remove(priv->dbg_root);
+	debugfs_remove_recursive(priv->dbg_root);
 }
 static int mlx5_init_once(struct mlx5_core_dev *dev, struct mlx5_priv *priv)
 		mlx5_cleanup_once(dev);
 err_stop_poll:
-	mlx5_stop_health_poll(dev);
+	mlx5_stop_health_poll(dev, boot);
 	if (mlx5_cmd_teardown_hca(dev)) {
 		dev_err(&dev->pdev->dev, "tear_down_hca failed, skip cleanup\n");
 		goto out_err;
 	mlx5_free_irq_vectors(dev);
 	if (cleanup)
 		mlx5_cleanup_once(dev);
-	mlx5_stop_health_poll(dev);
+	mlx5_stop_health_poll(dev, cleanup);
 	err = mlx5_cmd_teardown_hca(dev);
 	if (err) {
 		dev_err(&dev->pdev->dev, "tear_down_hca failed, skip cleanup\n");
 	 * with the HCA, so the health polll is no longer needed.
 	 */
 	mlx5_drain_health_wq(dev);
-	mlx5_stop_health_poll(dev);
+	mlx5_stop_health_poll(dev, false);
 	ret = mlx5_cmd_force_teardown_hca(dev);
 	if (ret) {

drivers/net/ethernet/mellanox/mlx5/core/transobj.c+1−1

@@ -509,7 +509,7 @@ static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn, · 508 unmodified lines
509		509
510	sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx);	510	sqc = MLX5_ADDR_OF(modify_sq_in, in, ctx);
511		511
512	if (next_state == MLX5_RQC_STATE_RDY) {	512	if (next_state == MLX5_SQC_STATE_RDY) {
513	MLX5_SET(sqc, sqc, hairpin_peer_rq, peer_rq);	513	MLX5_SET(sqc, sqc, hairpin_peer_rq, peer_rq);
514	MLX5_SET(sqc, sqc, hairpin_peer_vhca, peer_vhca);	514	MLX5_SET(sqc, sqc, hairpin_peer_vhca, peer_vhca);
515	}	515	}

drivers/net/ethernet/mellanox/mlx5/core/wq.c+3−3

@@ -39,9 +39,9 @@ u32 mlx5_wq_cyc_get_size(struct mlx5_wq_cyc *wq) · 38 unmodified lines
39	return (u32)wq->fbc.sz_m1 + 1;	39	return (u32)wq->fbc.sz_m1 + 1;
40	}	40	}
41		41
42	u32 mlx5_wq_cyc_get_frag_size(struct mlx5_wq_cyc *wq)	42	u16 mlx5_wq_cyc_get_frag_size(struct mlx5_wq_cyc *wq)
43	{	43	{
44	return (u32)wq->fbc.frag_sz_m1 + 1;	44	return wq->fbc.frag_sz_m1 + 1;
45	}	45	}
46		46
47	u32 mlx5_cqwq_get_size(struct mlx5_cqwq *wq)	47	u32 mlx5_cqwq_get_size(struct mlx5_cqwq *wq)
@@ -138,7 +138,7 @@ int mlx5_wq_qp_create(struct mlx5_core_dev mdev, struct mlx5_wq_param param, · 90 unmodified lines
138	void qpc, struct mlx5_wq_qp wq,	138	void qpc, struct mlx5_wq_qp wq,
139	struct mlx5_wq_ctrl *wq_ctrl)	139	struct mlx5_wq_ctrl *wq_ctrl)
140	{	140	{
141	u32 sq_strides_offset;	141	u16 sq_strides_offset;
142	u32 rq_pg_remainder;	142	u32 rq_pg_remainder;
143	int err;	143	int err;
144		144

drivers/net/ethernet/mellanox/mlx5/core/wq.h+1−1

@@ -80,7 +80,7 @@ int mlx5_wq_cyc_create(struct mlx5_core_dev mdev, struct mlx5_wq_param param, · 79 unmodified lines
80	void wqc, struct mlx5_wq_cyc wq,	80	void wqc, struct mlx5_wq_cyc wq,
81	struct mlx5_wq_ctrl *wq_ctrl);	81	struct mlx5_wq_ctrl *wq_ctrl);
82	u32 mlx5_wq_cyc_get_size(struct mlx5_wq_cyc *wq);	82	u32 mlx5_wq_cyc_get_size(struct mlx5_wq_cyc *wq);
83	u32 mlx5_wq_cyc_get_frag_size(struct mlx5_wq_cyc *wq);	83	u16 mlx5_wq_cyc_get_frag_size(struct mlx5_wq_cyc *wq);
84		84
85	int mlx5_wq_qp_create(struct mlx5_core_dev mdev, struct mlx5_wq_param param,	85	int mlx5_wq_qp_create(struct mlx5_core_dev mdev, struct mlx5_wq_param param,
86	void qpc, struct mlx5_wq_qp wq,	86	void qpc, struct mlx5_wq_qp wq,

drivers/net/ethernet/mellanox/mlxsw/spectrum.c+2−2

@@ -44,8 +44,8 @@ · 43 unmodified lines
44	#define MLXSW_SP_FWREV_MINOR_TO_BRANCH(minor) ((minor) / 100)	44	#define MLXSW_SP_FWREV_MINOR_TO_BRANCH(minor) ((minor) / 100)
45		45
46	#define MLXSW_SP1_FWREV_MAJOR 13	46	#define MLXSW_SP1_FWREV_MAJOR 13
47	#define MLXSW_SP1_FWREV_MINOR 1702	47	#define MLXSW_SP1_FWREV_MINOR 1703
48	#define MLXSW_SP1_FWREV_SUBMINOR 6	48	#define MLXSW_SP1_FWREV_SUBMINOR 4
49	#define MLXSW_SP1_FWREV_CAN_RESET_MINOR 1702	49	#define MLXSW_SP1_FWREV_CAN_RESET_MINOR 1702
50		50
51	static const struct mlxsw_fw_rev mlxsw_sp1_fw_rev = {	51	static const struct mlxsw_fw_rev mlxsw_sp1_fw_rev = {

drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c+8−8

@@ -337,14 +337,14 @@ static const struct mlxsw_sp_sb_cm mlxsw_sp_sb_cms_egress[] = { · 336 unmodified lines
337	MLXSW_SP_SB_CM(1500, 9, 0),	337	MLXSW_SP_SB_CM(1500, 9, 0),
338	MLXSW_SP_SB_CM(1500, 9, 0),	338	MLXSW_SP_SB_CM(1500, 9, 0),
339	MLXSW_SP_SB_CM(1500, 9, 0),	339	MLXSW_SP_SB_CM(1500, 9, 0),
340	MLXSW_SP_SB_CM(0, 0, 0),	340	MLXSW_SP_SB_CM(0, 140000, 15),
341	MLXSW_SP_SB_CM(0, 0, 0),	341	MLXSW_SP_SB_CM(0, 140000, 15),
342	MLXSW_SP_SB_CM(0, 0, 0),	342	MLXSW_SP_SB_CM(0, 140000, 15),
343	MLXSW_SP_SB_CM(0, 0, 0),	343	MLXSW_SP_SB_CM(0, 140000, 15),
344	MLXSW_SP_SB_CM(0, 0, 0),	344	MLXSW_SP_SB_CM(0, 140000, 15),
345	MLXSW_SP_SB_CM(0, 0, 0),	345	MLXSW_SP_SB_CM(0, 140000, 15),
346	MLXSW_SP_SB_CM(0, 0, 0),	346	MLXSW_SP_SB_CM(0, 140000, 15),
347	MLXSW_SP_SB_CM(0, 0, 0),	347	MLXSW_SP_SB_CM(0, 140000, 15),
348	MLXSW_SP_SB_CM(1, 0xff, 0),	348	MLXSW_SP_SB_CM(1, 0xff, 0),
349	};	349	};
350		350

drivers/net/ethernet/microchip/lan743x_main.c+3−3

@@ -2850,7 +2850,7 @@ static void lan743x_pcidev_shutdown(struct pci_dev *pdev) · 2849 unmodified lines
2850	lan743x_hardware_cleanup(adapter);	2850	lan743x_hardware_cleanup(adapter);
2851	}	2851	}
2852		2852
2853	#ifdef CONFIG_PM	2853	#ifdef CONFIG_PM_SLEEP
2854	static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)	2854	static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
2855	{	2855	{
2856	return bitrev16(crc16(0xFFFF, buf, len));	2856	return bitrev16(crc16(0xFFFF, buf, len));
@@ -3016,7 +3016,7 @@ static int lan743x_pm_resume(struct device *dev) · 159 unmodified lines
3016	static const struct dev_pm_ops lan743x_pm_ops = {	3016	static const struct dev_pm_ops lan743x_pm_ops = {
3017	SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)	3017	SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
3018	};	3018	};
3019	#endif /CONFIG_PM /	3019	#endif /* CONFIG_PM_SLEEP */
3020		3020
3021	static const struct pci_device_id lan743x_pcidev_tbl[] = {	3021	static const struct pci_device_id lan743x_pcidev_tbl[] = {
3022	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },	3022	{ PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
@@ -3028,7 +3028,7 @@ static struct pci_driver lan743x_pcidev_driver = { · 5 unmodified lines
3028	.id_table = lan743x_pcidev_tbl,	3028	.id_table = lan743x_pcidev_tbl,
3029	.probe = lan743x_pcidev_probe,	3029	.probe = lan743x_pcidev_probe,
3030	.remove = lan743x_pcidev_remove,	3030	.remove = lan743x_pcidev_remove,
3031	#ifdef CONFIG_PM	3031	#ifdef CONFIG_PM_SLEEP
3032	.driver.pm = &lan743x_pm_ops,	3032	.driver.pm = &lan743x_pm_ops,
3033	#endif	3033	#endif
3034	.shutdown = lan743x_pcidev_shutdown,	3034	.shutdown = lan743x_pcidev_shutdown,

drivers/net/ethernet/mscc/ocelot_board.c+9−3

 		struct sk_buff *skb;
 		struct net_device *dev;
 		u32 *buf;
-		int sz, len;
+		int sz, len, buf_len;
 		u32 ifh[4];
 		u32 val;
 		struct frame_info info;
 			err = -ENOMEM;
 			break;
 		}
-		buf = (u32 *)skb_put(skb, info.len);
+		buf_len = info.len - ETH_FCS_LEN;
+		buf = (u32 *)skb_put(skb, buf_len);
 		len = 0;
 		do {
 			sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
 			*buf++ = val;
 			len += sz;
-		} while ((sz == 4) && (len < info.len));
+		} while (len < buf_len);
+		/* Read the FCS and discard it */
+		sz = ocelot_rx_frame_word(ocelot, grp, false, &val);
+		/* Update the statistics if part of the FCS was read before */
+		len -= ETH_FCS_LEN - sz;
 		if (sz < 0) {
 			err = sz;

drivers/net/ethernet/netronome/nfp/flower/action.c+6−0

 #define NFP_FL_TUNNEL_CSUM			cpu_to_be16(0x01)
 #define NFP_FL_TUNNEL_KEY			cpu_to_be16(0x04)
 #define NFP_FL_TUNNEL_GENEVE_OPT		cpu_to_be16(0x0800)
+#define NFP_FL_SUPPORTED_TUNNEL_INFO_FLAGS	IP_TUNNEL_INFO_TX
 #define NFP_FL_SUPPORTED_IPV4_UDP_TUN_FLAGS	(NFP_FL_TUNNEL_CSUM | \
 						 NFP_FL_TUNNEL_KEY | \
 						 NFP_FL_TUNNEL_GENEVE_OPT)
 		nfp_fl_push_vlan(psh_v, a);
 		*a_len += sizeof(struct nfp_fl_push_vlan);
 	} else if (is_tcf_tunnel_set(a)) {
+		struct ip_tunnel_info *ip_tun = tcf_tunnel_info(a);
 		struct nfp_repr *repr = netdev_priv(netdev);
 		*tun_type = nfp_fl_get_tun_from_act_l4_port(repr->app, a);
 		if (*tun_type == NFP_FL_TUNNEL_NONE)
 			return -EOPNOTSUPP;
+		if (ip_tun->mode & ~NFP_FL_SUPPORTED_TUNNEL_INFO_FLAGS)
+			return -EOPNOTSUPP;
 		/* Pre-tunnel action is required for tunnel encap.
 		 * This checks for next hop entries on NFP.
 		 * If none, the packet falls back before applying other actions.

drivers/net/ethernet/netronome/nfp/flower/main.h+1−0

@@ -70,6 +70,7 @@ struct nfp_app; · 69 unmodified lines
70	#define NFP_FL_FEATS_GENEVE BIT(0)	70	#define NFP_FL_FEATS_GENEVE BIT(0)
71	#define NFP_FL_NBI_MTU_SETTING BIT(1)	71	#define NFP_FL_NBI_MTU_SETTING BIT(1)
72	#define NFP_FL_FEATS_GENEVE_OPT BIT(2)	72	#define NFP_FL_FEATS_GENEVE_OPT BIT(2)
		73	#define NFP_FL_FEATS_VLAN_PCP BIT(3)
73	#define NFP_FL_FEATS_LAG BIT(31)	74	#define NFP_FL_FEATS_LAG BIT(31)
74		75
75	struct nfp_fl_mask_id {	76	struct nfp_fl_mask_id {

drivers/net/ethernet/netronome/nfp/flower/match.c+1−1

@@ -56,7 +56,7 @@ nfp_flower_compile_meta_tci(struct nfp_flower_meta_tci *frame, · 55 unmodified lines
56	FLOW_DISSECTOR_KEY_VLAN,	56	FLOW_DISSECTOR_KEY_VLAN,
57	target);	57	target);
58	/* Populate the tci field. */	58	/* Populate the tci field. */
59	if (flow_vlan->vlan_id) {	59	if (flow_vlan->vlan_id \|\| flow_vlan->vlan_priority) {
60	tmp_tci = FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,	60	tmp_tci = FIELD_PREP(NFP_FLOWER_MASK_VLAN_PRIO,
61	flow_vlan->vlan_priority) \|	61	flow_vlan->vlan_priority) \|
62	FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,	62	FIELD_PREP(NFP_FLOWER_MASK_VLAN_VID,

drivers/net/ethernet/netronome/nfp/flower/offload.c+11−0

@@ -192,6 +192,17 @@ nfp_flower_calculate_key_layers(struct nfp_app *app, · 191 unmodified lines
192	key_size += sizeof(struct nfp_flower_mac_mpls);	192	key_size += sizeof(struct nfp_flower_mac_mpls);
193	}	193	}
194		194
		195	if (dissector_uses_key(flow->dissector, FLOW_DISSECTOR_KEY_VLAN)) {
		196	struct flow_dissector_key_vlan *flow_vlan;
		197
		198	flow_vlan = skb_flow_dissector_target(flow->dissector,
		199	FLOW_DISSECTOR_KEY_VLAN,
		200	flow->mask);
		201	if (!(priv->flower_ext_feats & NFP_FL_FEATS_VLAN_PCP) &&
		202	flow_vlan->vlan_priority)
		203	return -EOPNOTSUPP;
		204	}
		205
195	if (dissector_uses_key(flow->dissector,	206	if (dissector_uses_key(flow->dissector,
196	FLOW_DISSECTOR_KEY_ENC_CONTROL)) {	207	FLOW_DISSECTOR_KEY_ENC_CONTROL)) {
197	struct flow_dissector_key_ipv4_addrs *mask_ipv4 = NULL;	208	struct flow_dissector_key_ipv4_addrs *mask_ipv4 = NULL;

drivers/net/ethernet/netronome/nfp/nfp_net_common.c+0−18

@@ -3146,21 +3146,6 @@ nfp_net_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid) · 3145 unmodified lines
3146	return nfp_net_reconfig_mbox(nn, NFP_NET_CFG_MBOX_CMD_CTAG_FILTER_KILL);	3146	return nfp_net_reconfig_mbox(nn, NFP_NET_CFG_MBOX_CMD_CTAG_FILTER_KILL);
3147	}	3147	}
3148		3148
3149	#ifdef CONFIG_NET_POLL_CONTROLLER
3150	static void nfp_net_netpoll(struct net_device *netdev)
3151	{
3152	struct nfp_net *nn = netdev_priv(netdev);
3153	int i;
3154
3155	/* nfp_net's NAPIs are statically allocated so even if there is a race
3156	* with reconfig path this will simply try to schedule some disabled
3157	* NAPI instances.
3158	*/
3159	for (i = 0; i < nn->dp.num_stack_tx_rings; i++)
3160	napi_schedule_irqoff(&nn->r_vecs[i].napi);
3161	}
3162	#endif
3163
3164	static void nfp_net_stat64(struct net_device *netdev,	3149	static void nfp_net_stat64(struct net_device *netdev,
3165	struct rtnl_link_stats64 *stats)	3150	struct rtnl_link_stats64 *stats)
3166	{	3151	{
@@ -3519,9 +3504,6 @@ const struct net_device_ops nfp_net_netdev_ops = { · 352 unmodified lines
3519	.ndo_get_stats64 = nfp_net_stat64,	3504	.ndo_get_stats64 = nfp_net_stat64,
3520	.ndo_vlan_rx_add_vid = nfp_net_vlan_rx_add_vid,	3505	.ndo_vlan_rx_add_vid = nfp_net_vlan_rx_add_vid,
3521	.ndo_vlan_rx_kill_vid = nfp_net_vlan_rx_kill_vid,	3506	.ndo_vlan_rx_kill_vid = nfp_net_vlan_rx_kill_vid,
3522	#ifdef CONFIG_NET_POLL_CONTROLLER
3523	.ndo_poll_controller = nfp_net_netpoll,
3524	#endif
3525	.ndo_set_vf_mac = nfp_app_set_vf_mac,	3507	.ndo_set_vf_mac = nfp_app_set_vf_mac,
3526	.ndo_set_vf_vlan = nfp_app_set_vf_vlan,	3508	.ndo_set_vf_vlan = nfp_app_set_vf_vlan,
3527	.ndo_set_vf_spoofchk = nfp_app_set_vf_spoofchk,	3509	.ndo_set_vf_spoofchk = nfp_app_set_vf_spoofchk,

drivers/net/ethernet/qlogic/qed/qed_dcbx.c+28−17

 static void
 qed_dcbx_set_params(struct qed_dcbx_results *p_data,
-		    struct qed_hw_info *p_info,
+		    struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
-		    bool enable,
+		    bool enable, u8 prio, u8 tc,
-		    u8 prio,
-		    u8 tc,
 		    enum dcbx_protocol_type type,
 		    enum qed_pci_personality personality)
 {
 	else
 		p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
+	/* Do not add vlan tag 0 when DCB is enabled and port in UFP/OV mode */
+	if ((test_bit(QED_MF_8021Q_TAGGING, &p_hwfn->cdev->mf_bits) ||
+	     test_bit(QED_MF_8021AD_TAGGING, &p_hwfn->cdev->mf_bits)))
+		p_data->arr[type].dont_add_vlan0 = true;
 	/* QM reconf data */
-	if (p_info->personality == personality)
+	if (p_hwfn->hw_info.personality == personality)
-		qed_hw_info_set_offload_tc(p_info, tc);
+		qed_hw_info_set_offload_tc(&p_hwfn->hw_info, tc);
+	/* Configure dcbx vlan priority in doorbell block for roce EDPM */
+	if (test_bit(QED_MF_UFP_SPECIFIC, &p_hwfn->cdev->mf_bits) &&
+	    type == DCBX_PROTOCOL_ROCE) {
+		qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
+		qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_PCP_BB_K2, prio << 1);
+	}
 }
 /* Update app protocol data and hw_info fields with the TLV info */
 static void
 qed_dcbx_update_app_info(struct qed_dcbx_results *p_data,
-			 struct qed_hwfn *p_hwfn,
+			 struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
-			 bool enable,
+			 bool enable, u8 prio, u8 tc,
-			 u8 prio, u8 tc, enum dcbx_protocol_type type)
+			 enum dcbx_protocol_type type)
 {
-	struct qed_hw_info *p_info = &p_hwfn->hw_info;
 	enum qed_pci_personality personality;
 	enum dcbx_protocol_type id;
 	int i;
 		personality = qed_dcbx_app_update[i].personality;
-		qed_dcbx_set_params(p_data, p_info, enable,
+		qed_dcbx_set_params(p_data, p_hwfn, p_ptt, enable,
 				    prio, tc, type, personality);
 	}
 }
  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  */
 static int
-qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn,
+qed_dcbx_process_tlv(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
 		     struct qed_dcbx_results *p_data,
 		     struct dcbx_app_priority_entry *p_tbl,
 		     u32 pri_tc_tbl, int count, u8 dcbx_version)
 				enable = true;
 			}
-			qed_dcbx_update_app_info(p_data, p_hwfn, enable,
+			qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,
 						 priority, tc, type);
 		}
 	}
 			continue;
 		enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
-		qed_dcbx_update_app_info(p_data, p_hwfn, enable,
+		qed_dcbx_update_app_info(p_data, p_hwfn, p_ptt, enable,
 					 priority, tc, type);
 	}
 /* Parse app TLV's to update TC information in hw_info structure for
  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
  */
-static int qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn)
+static int
+qed_dcbx_process_mib_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 {
 	struct dcbx_app_priority_feature *p_app;
 	struct dcbx_app_priority_entry *p_tbl;
 	p_info = &p_hwfn->hw_info;
 	num_entries = QED_MFW_GET_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
-	rc = qed_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
+	rc = qed_dcbx_process_tlv(p_hwfn, p_ptt, &data, p_tbl, pri_tc_tbl,
 				  num_entries, dcbx_version);
 	if (rc)
 		return rc;
 		return rc;
 	if (type == QED_DCBX_OPERATIONAL_MIB) {
-		rc = qed_dcbx_process_mib_info(p_hwfn);
+		rc = qed_dcbx_process_mib_info(p_hwfn, p_ptt);
 		if (!rc) {
 			/* reconfigure tcs of QM queues according
 			 * to negotiation results
 	p_data->dcb_enable_flag = p_src->arr[type].enable;
 	p_data->dcb_priority = p_src->arr[type].priority;
 	p_data->dcb_tc = p_src->arr[type].tc;
+	p_data->dcb_dont_add_vlan0 = p_src->arr[type].dont_add_vlan0;
 }
 /* Set pf update ramrod command params */

drivers/net/ethernet/qlogic/qed/qed_dcbx.h+1−0

@@ -55,6 +55,7 @@ struct qed_dcbx_app_data { · 54 unmodified lines
55	u8 update; /* Update indication */	55	u8 update; /* Update indication */
56	u8 priority; /* Priority */	56	u8 priority; /* Priority */
57	u8 tc; /* Traffic Class */	57	u8 tc; /* Traffic Class */
		58	bool dont_add_vlan0; /* Do not insert a vlan tag with id 0 */
58	};	59	};
59		60
60	#define QED_DCBX_VERSION_DISABLED 0	61	#define QED_DCBX_VERSION_DISABLED 0

drivers/net/ethernet/qlogic/qed/qed_dev.c+14−1

 int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params)
 {
 	struct qed_load_req_params load_req_params;
-	u32 load_code, param, drv_mb_param;
+	u32 load_code, resp, param, drv_mb_param;
 	bool b_default_mtu = true;
 	struct qed_hwfn *p_hwfn;
 	int rc = 0, mfw_rc, i;
 	if (IS_PF(cdev)) {
 		p_hwfn = QED_LEADING_HWFN(cdev);
+		/* Get pre-negotiated values for stag, bandwidth etc. */
+		DP_VERBOSE(p_hwfn,
+			   QED_MSG_SPQ,
+			   "Sending GET_OEM_UPDATES command to trigger stag/bandwidth attention handling\n");
+		drv_mb_param = 1 << DRV_MB_PARAM_DUMMY_OEM_UPDATES_OFFSET;
+		rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
+				 DRV_MSG_CODE_GET_OEM_UPDATES,
+				 drv_mb_param, &resp, &param);
+		if (rc)
+			DP_NOTICE(p_hwfn,
+				  "Failed to send GET_OEM_UPDATES attention request\n");
 		drv_mb_param = STORM_FW_VERSION;
 		rc = qed_mcp_cmd(p_hwfn, p_hwfn->p_main_ptt,
 				 DRV_MSG_CODE_OV_UPDATE_STORM_FW_VER,

drivers/net/ethernet/qlogic/qed/qed_hsi.h+4−0

 #define DRV_MSG_SET_RESOURCE_VALUE_MSG		0x35000000
 #define DRV_MSG_CODE_OV_UPDATE_WOL              0x38000000
 #define DRV_MSG_CODE_OV_UPDATE_ESWITCH_MODE     0x39000000
+#define DRV_MSG_CODE_GET_OEM_UPDATES            0x41000000
 #define DRV_MSG_CODE_BW_UPDATE_ACK		0x32000000
 #define DRV_MSG_CODE_NIG_DRAIN			0x30000000
 #define DRV_MB_PARAM_ESWITCH_MODE_VEB	0x1
 #define DRV_MB_PARAM_ESWITCH_MODE_VEPA	0x2
+#define DRV_MB_PARAM_DUMMY_OEM_UPDATES_MASK	0x1
+#define DRV_MB_PARAM_DUMMY_OEM_UPDATES_OFFSET	0
 #define DRV_MB_PARAM_SET_LED_MODE_OPER		0x0
 #define DRV_MB_PARAM_SET_LED_MODE_ON		0x1
 #define DRV_MB_PARAM_SET_LED_MODE_OFF		0x2

drivers/net/ethernet/qlogic/qed/qed_mcp.c+20−4

@@ -1581,13 +1581,29 @@ static void qed_mcp_update_stag(struct qed_hwfn p_hwfn, struct qed_ptt p_ptt) · 1580 unmodified lines
1581	p_hwfn->mcp_info->func_info.ovlan = (u16)shmem_info.ovlan_stag &	1581	p_hwfn->mcp_info->func_info.ovlan = (u16)shmem_info.ovlan_stag &
1582	FUNC_MF_CFG_OV_STAG_MASK;	1582	FUNC_MF_CFG_OV_STAG_MASK;
1583	p_hwfn->hw_info.ovlan = p_hwfn->mcp_info->func_info.ovlan;	1583	p_hwfn->hw_info.ovlan = p_hwfn->mcp_info->func_info.ovlan;
1584	if ((p_hwfn->hw_info.hw_mode & BIT(MODE_MF_SD)) &&	1584	if (test_bit(QED_MF_OVLAN_CLSS, &p_hwfn->cdev->mf_bits)) {
1585	(p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET)) {	1585	if (p_hwfn->hw_info.ovlan != QED_MCP_VLAN_UNSET) {
1586	qed_wr(p_hwfn, p_ptt,	1586	qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE,
1587	NIG_REG_LLH_FUNC_TAG_VALUE, p_hwfn->hw_info.ovlan);	1587	p_hwfn->hw_info.ovlan);
		1588	qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 1);
		1589
		1590	/* Configure DB to add external vlan to EDPM packets */
		1591	qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 1);
		1592	qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2,
		1593	p_hwfn->hw_info.ovlan);
		1594	} else {
		1595	qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_EN, 0);
		1596	qed_wr(p_hwfn, p_ptt, NIG_REG_LLH_FUNC_TAG_VALUE, 0);
		1597	qed_wr(p_hwfn, p_ptt, DORQ_REG_TAG1_OVRD_MODE, 0);
		1598	qed_wr(p_hwfn, p_ptt, DORQ_REG_PF_EXT_VID_BB_K2, 0);
		1599	}
		1600
1588	qed_sp_pf_update_stag(p_hwfn);	1601	qed_sp_pf_update_stag(p_hwfn);
1589	}	1602	}
1590		1603
		1604	DP_VERBOSE(p_hwfn, QED_MSG_SP, "ovlan = %d hw_mode = 0x%x\n",
		1605	p_hwfn->mcp_info->func_info.ovlan, p_hwfn->hw_info.hw_mode);
		1606
1591	/* Acknowledge the MFW */	1607	/* Acknowledge the MFW */
1592	qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_S_TAG_UPDATE_ACK, 0,	1608	qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_S_TAG_UPDATE_ACK, 0,
1593	&resp, &param);	1609	&resp, &param);

drivers/net/ethernet/qlogic/qed/qed_reg_addr.h+6−0

 	0x00c000UL
 #define  DORQ_REG_IFEN \
 	0x100040UL
+#define DORQ_REG_TAG1_OVRD_MODE \
+	0x1008b4UL
+#define DORQ_REG_PF_PCP_BB_K2 \
+	0x1008c4UL
+#define DORQ_REG_PF_EXT_VID_BB_K2 \
+	0x1008c8UL
 #define DORQ_REG_DB_DROP_REASON \
 	0x100a2cUL
 #define DORQ_REG_DB_DROP_DETAILS \

drivers/net/ethernet/qualcomm/qca_7k.c+36−40

 {
 	__be16 rx_data;
 	__be16 tx_data;
-	struct spi_transfer *transfer;
+	struct spi_transfer transfer[2];
-	struct spi_message *msg;
+	struct spi_message msg;
 	int ret;
+	memset(transfer, 0, sizeof(transfer));
+	spi_message_init(&msg);
 	tx_data = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_INTERNAL | reg);
+	*result = 0;
+	transfer[0].tx_buf = &tx_data;
+	transfer[0].len = QCASPI_CMD_LEN;
+	transfer[1].rx_buf = &rx_data;
+	transfer[1].len = QCASPI_CMD_LEN;
+	spi_message_add_tail(&transfer[0], &msg);
 	if (qca->legacy_mode) {
-		msg = &qca->spi_msg1;
+		spi_sync(qca->spi_dev, &msg);
-		transfer = &qca->spi_xfer1;
+		spi_message_init(&msg);
-		transfer->tx_buf = &tx_data;
-		transfer->rx_buf = NULL;
-		transfer->len = QCASPI_CMD_LEN;
-		spi_sync(qca->spi_dev, msg);
-	} else {
-		msg = &qca->spi_msg2;
-		transfer = &qca->spi_xfer2[0];
-		transfer->tx_buf = &tx_data;
-		transfer->rx_buf = NULL;
-		transfer->len = QCASPI_CMD_LEN;
-		transfer = &qca->spi_xfer2[1];
 	}
-	transfer->tx_buf = NULL;
+	spi_message_add_tail(&transfer[1], &msg);
-	transfer->rx_buf = &rx_data;
+	ret = spi_sync(qca->spi_dev, &msg);
-	transfer->len = QCASPI_CMD_LEN;
-	ret = spi_sync(qca->spi_dev, msg);
 	if (!ret)
-		ret = msg->status;
+		ret = msg.status;
 	if (ret)
 		qcaspi_spi_error(qca);
 qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value)
 {
 	__be16 tx_data[2];
-	struct spi_transfer *transfer;
+	struct spi_transfer transfer[2];
-	struct spi_message *msg;
+	struct spi_message msg;
 	int ret;
+	memset(&transfer, 0, sizeof(transfer));
+	spi_message_init(&msg);
 	tx_data[0] = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_INTERNAL | reg);
 	tx_data[1] = cpu_to_be16(value);
+	transfer[0].tx_buf = &tx_data[0];
+	transfer[0].len = QCASPI_CMD_LEN;
+	transfer[1].tx_buf = &tx_data[1];
+	transfer[1].len = QCASPI_CMD_LEN;
+	spi_message_add_tail(&transfer[0], &msg);
 	if (qca->legacy_mode) {
-		msg = &qca->spi_msg1;
+		spi_sync(qca->spi_dev, &msg);
-		transfer = &qca->spi_xfer1;
+		spi_message_init(&msg);
-		transfer->tx_buf = &tx_data[0];
-		transfer->rx_buf = NULL;
-		transfer->len = QCASPI_CMD_LEN;
-		spi_sync(qca->spi_dev, msg);
-	} else {
-		msg = &qca->spi_msg2;
-		transfer = &qca->spi_xfer2[0];
-		transfer->tx_buf = &tx_data[0];
-		transfer->rx_buf = NULL;
-		transfer->len = QCASPI_CMD_LEN;
-		transfer = &qca->spi_xfer2[1];
 	}
-	transfer->tx_buf = &tx_data[1];
+	spi_message_add_tail(&transfer[1], &msg);
-	transfer->rx_buf = NULL;
+	ret = spi_sync(qca->spi_dev, &msg);
-	transfer->len = QCASPI_CMD_LEN;
-	ret = spi_sync(qca->spi_dev, msg);
 	if (!ret)
-		ret = msg->status;
+		ret = msg.status;
 	if (ret)
 		qcaspi_spi_error(qca);

drivers/net/ethernet/qualcomm/qca_spi.c+57−53

@@ -99,22 +99,24 @@ static u32 · 98 unmodified lines
99	qcaspi_write_burst(struct qcaspi qca, u8 src, u32 len)	99	qcaspi_write_burst(struct qcaspi qca, u8 src, u32 len)
100	{	100	{
101	__be16 cmd;	101	__be16 cmd;
102	struct spi_message *msg = &qca->spi_msg2;	102	struct spi_message msg;
103	struct spi_transfer *transfer = &qca->spi_xfer2[0];	103	struct spi_transfer transfer[2];
104	int ret;	104	int ret;
105		105
		106	memset(&transfer, 0, sizeof(transfer));
		107	spi_message_init(&msg);
		108
106	cmd = cpu_to_be16(QCA7K_SPI_WRITE \| QCA7K_SPI_EXTERNAL);	109	cmd = cpu_to_be16(QCA7K_SPI_WRITE \| QCA7K_SPI_EXTERNAL);
107	transfer->tx_buf = &cmd;	110	transfer[0].tx_buf = &cmd;
108	transfer->rx_buf = NULL;	111	transfer[0].len = QCASPI_CMD_LEN;
109	transfer->len = QCASPI_CMD_LEN;	112	transfer[1].tx_buf = src;
110	transfer = &qca->spi_xfer2[1];	113	transfer[1].len = len;
111	transfer->tx_buf = src;
112	transfer->rx_buf = NULL;
113	transfer->len = len;
114		114
115	ret = spi_sync(qca->spi_dev, msg);	115	spi_message_add_tail(&transfer[0], &msg);
		116	spi_message_add_tail(&transfer[1], &msg);
		117	ret = spi_sync(qca->spi_dev, &msg);
116		118
117	if (ret \|\| (msg->actual_length != QCASPI_CMD_LEN + len)) {	119	if (ret \|\| (msg.actual_length != QCASPI_CMD_LEN + len)) {
118	qcaspi_spi_error(qca);	120	qcaspi_spi_error(qca);
119	return 0;	121	return 0;
120	}	122	}
@@ -125,17 +127,20 @@ qcaspi_write_burst(struct qcaspi qca, u8 src, u32 len) · 4 unmodified lines
125	static u32	127	static u32
126	qcaspi_write_legacy(struct qcaspi qca, u8 src, u32 len)	128	qcaspi_write_legacy(struct qcaspi qca, u8 src, u32 len)
127	{	129	{
128	struct spi_message *msg = &qca->spi_msg1;	130	struct spi_message msg;
129	struct spi_transfer *transfer = &qca->spi_xfer1;	131	struct spi_transfer transfer;
130	int ret;	132	int ret;
131		133
132	transfer->tx_buf = src;	134	memset(&transfer, 0, sizeof(transfer));
133	transfer->rx_buf = NULL;	135	spi_message_init(&msg);
134	transfer->len = len;	136
		137	transfer.tx_buf = src;
		138	transfer.len = len;
135		139
136	ret = spi_sync(qca->spi_dev, msg);	140	spi_message_add_tail(&transfer, &msg);
		141	ret = spi_sync(qca->spi_dev, &msg);
137		142
138	if (ret \|\| (msg->actual_length != len)) {	143	if (ret \|\| (msg.actual_length != len)) {
139	qcaspi_spi_error(qca);	144	qcaspi_spi_error(qca);
140	return 0;	145	return 0;
141	}	146	}
@@ -146,23 +151,25 @@ qcaspi_write_legacy(struct qcaspi qca, u8 src, u32 len) · 4 unmodified lines
146	static u32	151	static u32
147	qcaspi_read_burst(struct qcaspi qca, u8 dst, u32 len)	152	qcaspi_read_burst(struct qcaspi qca, u8 dst, u32 len)
148	{	153	{
149	struct spi_message *msg = &qca->spi_msg2;	154	struct spi_message msg;
150	__be16 cmd;	155	__be16 cmd;
151	struct spi_transfer *transfer = &qca->spi_xfer2[0];	156	struct spi_transfer transfer[2];
152	int ret;	157	int ret;
153		158
		159	memset(&transfer, 0, sizeof(transfer));
		160	spi_message_init(&msg);
		161
154	cmd = cpu_to_be16(QCA7K_SPI_READ \| QCA7K_SPI_EXTERNAL);	162	cmd = cpu_to_be16(QCA7K_SPI_READ \| QCA7K_SPI_EXTERNAL);
155	transfer->tx_buf = &cmd;	163	transfer[0].tx_buf = &cmd;
156	transfer->rx_buf = NULL;	164	transfer[0].len = QCASPI_CMD_LEN;
157	transfer->len = QCASPI_CMD_LEN;	165	transfer[1].rx_buf = dst;
158	transfer = &qca->spi_xfer2[1];	166	transfer[1].len = len;
159	transfer->tx_buf = NULL;
160	transfer->rx_buf = dst;
161	transfer->len = len;
162		167
163	ret = spi_sync(qca->spi_dev, msg);	168	spi_message_add_tail(&transfer[0], &msg);
		169	spi_message_add_tail(&transfer[1], &msg);
		170	ret = spi_sync(qca->spi_dev, &msg);
164		171
165	if (ret \|\| (msg->actual_length != QCASPI_CMD_LEN + len)) {	172	if (ret \|\| (msg.actual_length != QCASPI_CMD_LEN + len)) {
166	qcaspi_spi_error(qca);	173	qcaspi_spi_error(qca);
167	return 0;	174	return 0;
168	}	175	}
@@ -173,17 +180,20 @@ qcaspi_read_burst(struct qcaspi qca, u8 dst, u32 len) · 4 unmodified lines
173	static u32	180	static u32
174	qcaspi_read_legacy(struct qcaspi qca, u8 dst, u32 len)	181	qcaspi_read_legacy(struct qcaspi qca, u8 dst, u32 len)
175	{	182	{
176	struct spi_message *msg = &qca->spi_msg1;	183	struct spi_message msg;
177	struct spi_transfer *transfer = &qca->spi_xfer1;	184	struct spi_transfer transfer;
178	int ret;	185	int ret;
179		186
180	transfer->tx_buf = NULL;	187	memset(&transfer, 0, sizeof(transfer));
181	transfer->rx_buf = dst;	188	spi_message_init(&msg);
182	transfer->len = len;
183		189
184	ret = spi_sync(qca->spi_dev, msg);	190	transfer.rx_buf = dst;
		191	transfer.len = len;
185		192
186	if (ret \|\| (msg->actual_length != len)) {	193	spi_message_add_tail(&transfer, &msg);
		194	ret = spi_sync(qca->spi_dev, &msg);
		195
		196	if (ret \|\| (msg.actual_length != len)) {
187	qcaspi_spi_error(qca);	197	qcaspi_spi_error(qca);
188	return 0;	198	return 0;
189	}	199	}
@@ -195,19 +205,23 @@ static int · 5 unmodified lines
195	qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)	205	qcaspi_tx_cmd(struct qcaspi *qca, u16 cmd)
196	{	206	{
197	__be16 tx_data;	207	__be16 tx_data;
198	struct spi_message *msg = &qca->spi_msg1;	208	struct spi_message msg;
199	struct spi_transfer *transfer = &qca->spi_xfer1;	209	struct spi_transfer transfer;
200	int ret;	210	int ret;
201		211
		212	memset(&transfer, 0, sizeof(transfer));
		213
		214	spi_message_init(&msg);
		215
202	tx_data = cpu_to_be16(cmd);	216	tx_data = cpu_to_be16(cmd);
203	transfer->len = sizeof(tx_data);	217	transfer.len = sizeof(cmd);
204	transfer->tx_buf = &tx_data;	218	transfer.tx_buf = &tx_data;
205	transfer->rx_buf = NULL;	219	spi_message_add_tail(&transfer, &msg);
206		220
207	ret = spi_sync(qca->spi_dev, msg);	221	ret = spi_sync(qca->spi_dev, &msg);
208		222
209	if (!ret)	223	if (!ret)
210	ret = msg->status;	224	ret = msg.status;
211		225
212	if (ret)	226	if (ret)
213	qcaspi_spi_error(qca);	227	qcaspi_spi_error(qca);
@@ -835,16 +849,6 @@ qcaspi_netdev_setup(struct net_device *dev) · 621 unmodified lines
835	qca = netdev_priv(dev);	849	qca = netdev_priv(dev);
836	memset(qca, 0, sizeof(struct qcaspi));	850	memset(qca, 0, sizeof(struct qcaspi));
837		851
838	memset(&qca->spi_xfer1, 0, sizeof(struct spi_transfer));
839	memset(&qca->spi_xfer2, 0, sizeof(struct spi_transfer) * 2);
840
841	spi_message_init(&qca->spi_msg1);
842	spi_message_add_tail(&qca->spi_xfer1, &qca->spi_msg1);
843
844	spi_message_init(&qca->spi_msg2);
845	spi_message_add_tail(&qca->spi_xfer2[0], &qca->spi_msg2);
846	spi_message_add_tail(&qca->spi_xfer2[1], &qca->spi_msg2);
847
848	memset(&qca->txr, 0, sizeof(qca->txr));	852	memset(&qca->txr, 0, sizeof(qca->txr));
849	qca->txr.count = TX_RING_MAX_LEN;	853	qca->txr.count = TX_RING_MAX_LEN;
850	}	854	}

drivers/net/ethernet/qualcomm/qca_spi.h+0−5

 	struct tx_ring txr;
 	struct qcaspi_stats stats;
-	struct spi_message spi_msg1;
-	struct spi_message spi_msg2;
-	struct spi_transfer spi_xfer1;
-	struct spi_transfer spi_xfer2[2];
 	u8 *rx_buffer;
 	u32 buffer_size;
 	u8 sync;

drivers/net/ethernet/realtek/r8169.c+55−5

 #include <linux/pci.h>
 #include <linux/netdevice.h>
 #include <linux/etherdevice.h>
+#include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/ethtool.h>
 #include <linux/phy.h>
 };
 enum rtl_flag {
-	RTL_FLAG_TASK_ENABLED,
+	RTL_FLAG_TASK_ENABLED = 0,
 	RTL_FLAG_TASK_SLOW_PENDING,
 	RTL_FLAG_TASK_RESET_PENDING,
 	RTL_FLAG_MAX
 	u16 event_slow;
 	const struct rtl_coalesce_info *coalesce_info;
+	struct clk *clk;
 	struct mdio_ops {
 		void (*write)(struct rtl8169_private *, int, int);
 	phy_speed_up(dev->phydev);
 	genphy_soft_reset(dev->phydev);
+	/* It was reported that chip version 33 ends up with 10MBit/Half on a
+	 * 1GBit link after resuming from S3. For whatever reason the PHY on
+	 * this chip doesn't properly start a renegotiation when soft-reset.
+	 * Explicitly requesting a renegotiation fixes this.
+	 */
+	if (tp->mac_version == RTL_GIGA_MAC_VER_33 &&
+	    dev->phydev->autoneg == AUTONEG_ENABLE)
+		phy_restart_aneg(dev->phydev);
 }
 static void rtl_rar_set(struct rtl8169_private *tp, u8 *addr)
 	rtl_set_rx_max_size(tp);
 	rtl_set_rx_tx_desc_registers(tp);
-	rtl_set_tx_config_registers(tp);
 	RTL_W8(tp, Cfg9346, Cfg9346_Lock);
 	/* Initially a 10 us delay. Turned it into a PCI commit. - FR */
 	RTL_R8(tp, IntrMask);
 	RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb);
 	rtl_init_rxcfg(tp);
+	rtl_set_tx_config_registers(tp);
 	rtl_set_rx_mode(tp->dev);
 	/* no early-rx interrupts */
 static void rtl_hw_aspm_clkreq_enable(struct rtl8169_private *tp, bool enable)
 {
 	if (enable) {
-		RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
 		RTL_W8(tp, Config5, RTL_R8(tp, Config5) | ASPM_en);
+		RTL_W8(tp, Config2, RTL_R8(tp, Config2) | ClkReqEn);
 	} else {
 		RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~ClkReqEn);
 		RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~ASPM_en);
 	}
+	udelay(10);
 }
 static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
 static void rtl_hw_start_8106(struct rtl8169_private *tp)
 {
+	rtl_hw_aspm_clkreq_enable(tp, false);
 	/* Force LAN exit from ASPM if Rx/Tx are not idle */
 	RTL_W32(tp, FuncEvent, RTL_R32(tp, FuncEvent) | 0x002800);
 	RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~PFM_EN);
 	rtl_pcie_state_l2l3_enable(tp, false);
+	rtl_hw_aspm_clkreq_enable(tp, true);
 }
 static void rtl_hw_start_8101(struct rtl8169_private *tp)
 	rtl8169_update_counters(tp);
 	rtl_lock_work(tp);
-	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
+	/* Clear all task flags */
+	bitmap_zero(tp->wk.flags, RTL_FLAG_MAX);
 	rtl8169_down(dev);
 	rtl_unlock_work(tp);
 	rtl_lock_work(tp);
 	napi_disable(&tp->napi);
-	clear_bit(RTL_FLAG_TASK_ENABLED, tp->wk.flags);
+	/* Clear all task flags */
+	bitmap_zero(tp->wk.flags, RTL_FLAG_MAX);
 	rtl_unlock_work(tp);
 	rtl_pll_power_down(tp);
 	}
 }
+static void rtl_disable_clk(void *data)
+{
+	clk_disable_unprepare(data);
+}
 static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
 	const struct rtl_cfg_info *cfg = rtl_cfg_infos + ent->driver_data;
 	tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT);
 	tp->supports_gmii = cfg->has_gmii;
+	/* Get the *optional* external "ether_clk" used on some boards */
+	tp->clk = devm_clk_get(&pdev->dev, "ether_clk");
+	if (IS_ERR(tp->clk)) {
+		rc = PTR_ERR(tp->clk);
+		if (rc == -ENOENT) {
+			/* clk-core allows NULL (for suspend / resume) */
+			tp->clk = NULL;
+		} else if (rc == -EPROBE_DEFER) {
+			return rc;
+		} else {
+			dev_err(&pdev->dev, "failed to get clk: %d\n", rc);
+			return rc;
+		}
+	} else {
+		rc = clk_prepare_enable(tp->clk);
+		if (rc) {
+			dev_err(&pdev->dev, "failed to enable clk: %d\n", rc);
+			return rc;
+		}
+		rc = devm_add_action_or_reset(&pdev->dev, rtl_disable_clk,
+					      tp->clk);
+		if (rc)
+			return rc;
+	}
 	/* enable device (incl. PCI PM wakeup and hotplug setup) */
 	rc = pcim_enable_device(pdev);
 	if (rc < 0) {

drivers/net/ethernet/renesas/Kconfig+1−0

@@ -1,3 +1,4 @@
		1	# SPDX-License-Identifier: GPL-2.0
1	#	2	#
2	# Renesas device configuration	3	# Renesas device configuration
3	#	4	#

drivers/net/ethernet/renesas/Makefile+1−0

@@ -1,3 +1,4 @@
		1	# SPDX-License-Identifier: GPL-2.0
1	#	2	#
2	# Makefile for the Renesas device drivers.	3	# Makefile for the Renesas device drivers.
3	#	4	#

drivers/net/ethernet/renesas/ravb.h+5−0

 	EIS_CULF1	= 0x00000080,
 	EIS_TFFF	= 0x00000100,
 	EIS_QFS		= 0x00010000,
+	EIS_RESERVED	= (GENMASK(31, 17) | GENMASK(15, 11)),
 };
 /* RIC0 */
 	RIS0_FRF15	= 0x00008000,
 	RIS0_FRF16	= 0x00010000,
 	RIS0_FRF17	= 0x00020000,
+	RIS0_RESERVED	= GENMASK(31, 18),
 };
 /* RIC1 */
 	RIS2_QFF16	= 0x00010000,
 	RIS2_QFF17	= 0x00020000,
 	RIS2_RFFF	= 0x80000000,
+	RIS2_RESERVED	= GENMASK(30, 18),
 };
 /* TIC */
 	TIS_FTF1	= 0x00000002,	/* Undocumented? */
 	TIS_TFUF	= 0x00000100,
 	TIS_TFWF	= 0x00000200,
+	TIS_RESERVED	= (GENMASK(31, 20) | GENMASK(15, 12) | GENMASK(7, 4))
 };
 /* ISS */
 enum GIS_BIT {
 	GIS_PTCF	= 0x00000001,	/* Undocumented? */
 	GIS_PTMF	= 0x00000004,
+	GIS_RESERVED	= GENMASK(15, 10),
 };
 /* GIE (R-Car Gen3 only) */

drivers/net/ethernet/renesas/ravb_main.c+6−5

 	u32 eis, ris2;
 	eis = ravb_read(ndev, EIS);
-	ravb_write(ndev, ~EIS_QFS, EIS);
+	ravb_write(ndev, ~(EIS_QFS | EIS_RESERVED), EIS);
 	if (eis & EIS_QFS) {
 		ris2 = ravb_read(ndev, RIS2);
-		ravb_write(ndev, ~(RIS2_QFF0 | RIS2_RFFF), RIS2);
+		ravb_write(ndev, ~(RIS2_QFF0 | RIS2_RFFF | RIS2_RESERVED),
+			   RIS2);
 		/* Receive Descriptor Empty int */
 		if (ris2 & RIS2_QFF0)
 	u32 tis = ravb_read(ndev, TIS);
 	if (tis & TIS_TFUF) {
-		ravb_write(ndev, ~TIS_TFUF, TIS);
+		ravb_write(ndev, ~(TIS_TFUF | TIS_RESERVED), TIS);
 		ravb_get_tx_tstamp(ndev);
 		return true;
 	}
 		/* Processing RX Descriptor Ring */
 		if (ris0 & mask) {
 			/* Clear RX interrupt */
-			ravb_write(ndev, ~mask, RIS0);
+			ravb_write(ndev, ~(mask | RIS0_RESERVED), RIS0);
 			if (ravb_rx(ndev, &quota, q))
 				goto out;
 		}
 		if (tis & mask) {
 			spin_lock_irqsave(&priv->lock, flags);
 			/* Clear TX interrupt */
-			ravb_write(ndev, ~mask, TIS);
+			ravb_write(ndev, ~(mask | TIS_RESERVED), TIS);
 			ravb_tx_free(ndev, q, true);
 			netif_wake_subqueue(ndev, q);
 			mmiowb();

drivers/net/ethernet/renesas/ravb_ptp.c+2−6

+// SPDX-License-Identifier: GPL-2.0+
 /* PTP 1588 clock using the Renesas Ethernet AVB
  *
  * Copyright (C) 2013-2015 Renesas Electronics Corporation
  * Copyright (C) 2015 Renesas Solutions Corp.
  * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>
- *
- *  This program is free software; you can redistribute it and/or modify
- *  it under the terms of the GNU General Public License as published by
- *  the Free Software Foundation; either version 2 of the License, or
- *  (at your option) any later version.
  */
 #include "ravb.h"
 		}
 	}
-	ravb_write(ndev, ~gis, GIS);
+	ravb_write(ndev, ~(gis | GIS_RESERVED), GIS);
 }
 void ravb_ptp_init(struct net_device *ndev, struct platform_device *pdev)

drivers/net/ethernet/seeq/ether3.c+3−2

 static int	ether3_rx(struct net_device *dev, unsigned int maxcnt);
 static void	ether3_tx(struct net_device *dev);
 static int	ether3_open (struct net_device *dev);
-static int	ether3_sendpacket (struct sk_buff *skb, struct net_device *dev);
+static netdev_tx_t	ether3_sendpacket(struct sk_buff *skb,
+					  struct net_device *dev);
 static irqreturn_t ether3_interrupt (int irq, void *dev_id);
 static int	ether3_close (struct net_device *dev);
 static void	ether3_setmulticastlist (struct net_device *dev);
 /*
  * Transmit a packet
  */
-static int
+static netdev_tx_t
 ether3_sendpacket(struct sk_buff *skb, struct net_device *dev)
 {
 	unsigned long flags;

drivers/net/ethernet/seeq/sgiseeq.c+2−1

@@ -578,7 +578,8 @@ static inline int sgiseeq_reset(struct net_device *dev) · 577 unmodified lines
578	return 0;	578	return 0;
579	}	579	}
580		580
581	static int sgiseeq_start_xmit(struct sk_buff skb, struct net_device dev)	581	static netdev_tx_t
		582	sgiseeq_start_xmit(struct sk_buff skb, struct net_device dev)
582	{	583	{
583	struct sgiseeq_private *sp = netdev_priv(dev);	584	struct sgiseeq_private *sp = netdev_priv(dev);
584	struct hpc3_ethregs *hregs = sp->hregs;	585	struct hpc3_ethregs *hregs = sp->hregs;

drivers/net/ethernet/sgi/ioc3-eth.c+2−2

@@ -99,7 +99,7 @@ struct ioc3_private { · 98 unmodified lines
99		99
100	static int ioc3_ioctl(struct net_device dev, struct ifreq rq, int cmd);	100	static int ioc3_ioctl(struct net_device dev, struct ifreq rq, int cmd);
101	static void ioc3_set_multicast_list(struct net_device *dev);	101	static void ioc3_set_multicast_list(struct net_device *dev);
102	static int ioc3_start_xmit(struct sk_buff skb, struct net_device dev);	102	static netdev_tx_t ioc3_start_xmit(struct sk_buff skb, struct net_device dev);
103	static void ioc3_timeout(struct net_device *dev);	103	static void ioc3_timeout(struct net_device *dev);
104	static inline unsigned int ioc3_hash(const unsigned char *addr);	104	static inline unsigned int ioc3_hash(const unsigned char *addr);
105	static inline void ioc3_stop(struct ioc3_private *ip);	105	static inline void ioc3_stop(struct ioc3_private *ip);
@@ -1390,7 +1390,7 @@ static struct pci_driver ioc3_driver = { · 1284 unmodified lines
1390	.remove = ioc3_remove_one,	1390	.remove = ioc3_remove_one,
1391	};	1391	};
1392		1392
1393	static int ioc3_start_xmit(struct sk_buff skb, struct net_device dev)	1393	static netdev_tx_t ioc3_start_xmit(struct sk_buff skb, struct net_device dev)
1394	{	1394	{
1395	unsigned long data;	1395	unsigned long data;
1396	struct ioc3_private *ip = netdev_priv(dev);	1396	struct ioc3_private *ip = netdev_priv(dev);

drivers/net/ethernet/sgi/meth.c+1−1

@@ -697,7 +697,7 @@ static void meth_add_to_tx_ring(struct meth_private priv, struct sk_buff skb) · 696 unmodified lines
697	/*	697	/*
698	* Transmit a packet (called by the kernel)	698	* Transmit a packet (called by the kernel)
699	*/	699	*/
700	static int meth_tx(struct sk_buff skb, struct net_device dev)	700	static netdev_tx_t meth_tx(struct sk_buff skb, struct net_device dev)
701	{	701	{
702	struct meth_private *priv = netdev_priv(dev);	702	struct meth_private *priv = netdev_priv(dev);
703	unsigned long flags;	703	unsigned long flags;

drivers/net/ethernet/stmicro/stmmac/common.h+2−2

@@ -258,10 +258,10 @@ struct stmmac_safety_stats { · 257 unmodified lines
258	#define MAX_DMA_RIWT 0xff	258	#define MAX_DMA_RIWT 0xff
259	#define MIN_DMA_RIWT 0x20	259	#define MIN_DMA_RIWT 0x20
260	/* Tx coalesce parameters */	260	/* Tx coalesce parameters */
261	#define STMMAC_COAL_TX_TIMER 40000	261	#define STMMAC_COAL_TX_TIMER 1000
262	#define STMMAC_MAX_COAL_TX_TICK 100000	262	#define STMMAC_MAX_COAL_TX_TICK 100000
263	#define STMMAC_TX_MAX_FRAMES 256	263	#define STMMAC_TX_MAX_FRAMES 256
264	#define STMMAC_TX_FRAMES 64	264	#define STMMAC_TX_FRAMES 25
265		265
266	/* Packets types */	266	/* Packets types */
267	enum packets_types {	267	enum packets_types {

drivers/net/ethernet/stmicro/stmmac/stmmac.h+12−2

 /* Frequently used values are kept adjacent for cache effect */
 struct stmmac_tx_queue {
+	u32 tx_count_frames;
+	struct timer_list txtimer;
 	u32 queue_index;
 	struct stmmac_priv *priv_data;
 	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
 	u32 rx_zeroc_thresh;
 	dma_addr_t dma_rx_phy;
 	u32 rx_tail_addr;
+};
+struct stmmac_channel {
 	struct napi_struct napi ____cacheline_aligned_in_smp;
+	struct stmmac_priv *priv_data;
+	u32 index;
+	int has_rx;
+	int has_tx;
 };
 struct stmmac_tc_entry {
 struct stmmac_priv {
 	/* Frequently used values are kept adjacent for cache effect */
-	u32 tx_count_frames;
 	u32 tx_coal_frames;
 	u32 tx_coal_timer;
 	int tx_coalesce;
 	int hwts_tx_en;
 	bool tx_path_in_lpi_mode;
-	struct timer_list txtimer;
 	bool tso;
 	unsigned int dma_buf_sz;
 	/* TX Queue */
 	struct stmmac_tx_queue tx_queue[MTL_MAX_TX_QUEUES];
+	/* Generic channel for NAPI */
+	struct stmmac_channel channel[STMMAC_CH_MAX];
 	bool oldlink;
 	int speed;
 	int oldduplex;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+134−104

@@ -148,12 +148,14 @@ static void stmmac_verify_args(void) · 147 unmodified lines
148	static void stmmac_disable_all_queues(struct stmmac_priv *priv)	148	static void stmmac_disable_all_queues(struct stmmac_priv *priv)
149	{	149	{
150	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;	150	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;
		151	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;
		152	u32 maxq = max(rx_queues_cnt, tx_queues_cnt);
151	u32 queue;	153	u32 queue;
152		154
153	for (queue = 0; queue < rx_queues_cnt; queue++) {	155	for (queue = 0; queue < maxq; queue++) {
154	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];	156	struct stmmac_channel *ch = &priv->channel[queue];
155		157
156	napi_disable(&rx_q->napi);	158	napi_disable(&ch->napi);
157	}	159	}
158	}	160	}
159		161
@@ -164,12 +166,14 @@ static void stmmac_disable_all_queues(struct stmmac_priv *priv) · 4 unmodified lines
164	static void stmmac_enable_all_queues(struct stmmac_priv *priv)	166	static void stmmac_enable_all_queues(struct stmmac_priv *priv)
165	{	167	{
166	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;	168	u32 rx_queues_cnt = priv->plat->rx_queues_to_use;
		169	u32 tx_queues_cnt = priv->plat->tx_queues_to_use;
		170	u32 maxq = max(rx_queues_cnt, tx_queues_cnt);
167	u32 queue;	171	u32 queue;
168		172
169	for (queue = 0; queue < rx_queues_cnt; queue++) {	173	for (queue = 0; queue < maxq; queue++) {
170	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];	174	struct stmmac_channel *ch = &priv->channel[queue];
171		175
172	napi_enable(&rx_q->napi);	176	napi_enable(&ch->napi);
173	}	177	}
174	}	178	}
175		179
@@ -1843,18 +1847,18 @@ static void stmmac_dma_operation_mode(struct stmmac_priv *priv) · 1667 unmodified lines
1843	* @queue: TX queue index	1847	* @queue: TX queue index
1844	* Description: it reclaims the transmit resources after transmission completes.	1848	* Description: it reclaims the transmit resources after transmission completes.
1845	*/	1849	*/
1846	static void stmmac_tx_clean(struct stmmac_priv *priv, u32 queue)	1850	static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue)
1847	{	1851	{
1848	struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];	1852	struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
1849	unsigned int bytes_compl = 0, pkts_compl = 0;	1853	unsigned int bytes_compl = 0, pkts_compl = 0;
1850	unsigned int entry;	1854	unsigned int entry, count = 0;
1851		1855
1852	netif_tx_lock(priv->dev);	1856	__netif_tx_lock_bh(netdev_get_tx_queue(priv->dev, queue));
1853		1857
1854	priv->xstats.tx_clean++;	1858	priv->xstats.tx_clean++;
1855		1859
1856	entry = tx_q->dirty_tx;	1860	entry = tx_q->dirty_tx;
1857	while (entry != tx_q->cur_tx) {	1861	while ((entry != tx_q->cur_tx) && (count < budget)) {
1858	struct sk_buff *skb = tx_q->tx_skbuff[entry];	1862	struct sk_buff *skb = tx_q->tx_skbuff[entry];
1859	struct dma_desc *p;	1863	struct dma_desc *p;
1860	int status;	1864	int status;
@@ -1870,6 +1874,8 @@ static void stmmac_tx_clean(struct stmmac_priv *priv, u32 queue) · 9 unmodified lines
1870	if (unlikely(status & tx_dma_own))	1874	if (unlikely(status & tx_dma_own))
1871	break;	1875	break;
1872		1876
		1877	count++;
		1878
1873	/* Make sure descriptor fields are read after reading	1879	/* Make sure descriptor fields are read after reading
1874	* the own bit.	1880	* the own bit.
1875	*/	1881	*/
@@ -1937,7 +1943,10 @@ static void stmmac_tx_clean(struct stmmac_priv *priv, u32 queue) · 61 unmodified lines
1937	stmmac_enable_eee_mode(priv);	1943	stmmac_enable_eee_mode(priv);
1938	mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));	1944	mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(eee_timer));
1939	}	1945	}
1940	netif_tx_unlock(priv->dev);	1946
		1947	__netif_tx_unlock_bh(netdev_get_tx_queue(priv->dev, queue));
		1948
		1949	return count;
1941	}	1950	}
1942		1951
1943	/**	1952	/**
@@ -2020,6 +2029,33 @@ static bool stmmac_safety_feat_interrupt(struct stmmac_priv *priv) · 76 unmodified lines
2020	return false;	2029	return false;
2021	}	2030	}
2022		2031
		2032	static int stmmac_napi_check(struct stmmac_priv *priv, u32 chan)
		2033	{
		2034	int status = stmmac_dma_interrupt_status(priv, priv->ioaddr,
		2035	&priv->xstats, chan);
		2036	struct stmmac_channel *ch = &priv->channel[chan];
		2037	bool needs_work = false;
		2038
		2039	if ((status & handle_rx) && ch->has_rx) {
		2040	needs_work = true;
		2041	} else {
		2042	status &= ~handle_rx;
		2043	}
		2044
		2045	if ((status & handle_tx) && ch->has_tx) {
		2046	needs_work = true;
		2047	} else {
		2048	status &= ~handle_tx;
		2049	}
		2050
		2051	if (needs_work && napi_schedule_prep(&ch->napi)) {
		2052	stmmac_disable_dma_irq(priv, priv->ioaddr, chan);
		2053	__napi_schedule(&ch->napi);
		2054	}
		2055
		2056	return status;
		2057	}
		2058
2023	/**	2059	/**
2024	* stmmac_dma_interrupt - DMA ISR	2060	* stmmac_dma_interrupt - DMA ISR
2025	* @priv: driver private structure	2061	* @priv: driver private structure
@@ -2034,57 +2070,14 @@ static void stmmac_dma_interrupt(struct stmmac_priv *priv) · 8 unmodified lines
2034	u32 channels_to_check = tx_channel_count > rx_channel_count ?	2070	u32 channels_to_check = tx_channel_count > rx_channel_count ?
2035	tx_channel_count : rx_channel_count;	2071	tx_channel_count : rx_channel_count;
2036	u32 chan;	2072	u32 chan;
2037	bool poll_scheduled = false;
2038	int status[max_t(u32, MTL_MAX_TX_QUEUES, MTL_MAX_RX_QUEUES)];	2073	int status[max_t(u32, MTL_MAX_TX_QUEUES, MTL_MAX_RX_QUEUES)];
2039		2074
2040	/* Make sure we never check beyond our status buffer. */	2075	/* Make sure we never check beyond our status buffer. */
2041	if (WARN_ON_ONCE(channels_to_check > ARRAY_SIZE(status)))	2076	if (WARN_ON_ONCE(channels_to_check > ARRAY_SIZE(status)))
2042	channels_to_check = ARRAY_SIZE(status);	2077	channels_to_check = ARRAY_SIZE(status);
2043		2078
2044	/* Each DMA channel can be used for rx and tx simultaneously, yet
2045	* napi_struct is embedded in struct stmmac_rx_queue rather than in a
2046	* stmmac_channel struct.
2047	* Because of this, stmmac_poll currently checks (and possibly wakes)
2048	* all tx queues rather than just a single tx queue.
2049	*/
2050	for (chan = 0; chan < channels_to_check; chan++)	2079	for (chan = 0; chan < channels_to_check; chan++)
2051	status[chan] = stmmac_dma_interrupt_status(priv, priv->ioaddr,	2080	status[chan] = stmmac_napi_check(priv, chan);
2052	&priv->xstats, chan);
2053
2054	for (chan = 0; chan < rx_channel_count; chan++) {
2055	if (likely(status[chan] & handle_rx)) {
2056	struct stmmac_rx_queue *rx_q = &priv->rx_queue[chan];
2057
2058	if (likely(napi_schedule_prep(&rx_q->napi))) {
2059	stmmac_disable_dma_irq(priv, priv->ioaddr, chan);
2060	__napi_schedule(&rx_q->napi);
2061	poll_scheduled = true;
2062	}
2063	}
2064	}
2065
2066	/* If we scheduled poll, we already know that tx queues will be checked.
2067	* If we didn't schedule poll, see if any DMA channel (used by tx) has a
2068	* completed transmission, if so, call stmmac_poll (once).
2069	*/
2070	if (!poll_scheduled) {
2071	for (chan = 0; chan < tx_channel_count; chan++) {
2072	if (status[chan] & handle_tx) {
2073	/* It doesn't matter what rx queue we choose
2074	* here. We use 0 since it always exists.
2075	*/
2076	struct stmmac_rx_queue *rx_q =
2077	&priv->rx_queue[0];
2078
2079	if (likely(napi_schedule_prep(&rx_q->napi))) {
2080	stmmac_disable_dma_irq(priv,
2081	priv->ioaddr, chan);
2082	__napi_schedule(&rx_q->napi);
2083	}
2084	break;
2085	}
2086	}
2087	}
2088		2081
2089	for (chan = 0; chan < tx_channel_count; chan++) {	2082	for (chan = 0; chan < tx_channel_count; chan++) {
2090	if (unlikely(status[chan] & tx_hard_error_bump_tc)) {	2083	if (unlikely(status[chan] & tx_hard_error_bump_tc)) {
@@ -2220,8 +2213,7 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) · 129 unmodified lines
2220	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,	2213	stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
2221	tx_q->dma_tx_phy, chan);	2214	tx_q->dma_tx_phy, chan);
2222		2215
2223	tx_q->tx_tail_addr = tx_q->dma_tx_phy +	2216	tx_q->tx_tail_addr = tx_q->dma_tx_phy;
2224	(DMA_TX_SIZE * sizeof(struct dma_desc));
2225	stmmac_set_tx_tail_ptr(priv, priv->ioaddr,	2217	stmmac_set_tx_tail_ptr(priv, priv->ioaddr,
2226	tx_q->tx_tail_addr, chan);	2218	tx_q->tx_tail_addr, chan);
2227	}	2219	}
@@ -2233,6 +2225,13 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) · 5 unmodified lines
2233	return ret;	2225	return ret;
2234	}	2226	}
2235		2227
		2228	static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue)
		2229	{
		2230	struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
		2231
		2232	mod_timer(&tx_q->txtimer, STMMAC_COAL_TIMER(priv->tx_coal_timer));
		2233	}
		2234
2236	/**	2235	/**
2237	* stmmac_tx_timer - mitigation sw timer for tx.	2236	* stmmac_tx_timer - mitigation sw timer for tx.
2238	* @data: data pointer	2237	* @data: data pointer
@@ -2241,13 +2240,14 @@ static int stmmac_init_dma_engine(struct stmmac_priv *priv) · 2 unmodified lines
2241	*/	2240	*/
2242	static void stmmac_tx_timer(struct timer_list *t)	2241	static void stmmac_tx_timer(struct timer_list *t)
2243	{	2242	{
2244	struct stmmac_priv *priv = from_timer(priv, t, txtimer);	2243	struct stmmac_tx_queue *tx_q = from_timer(tx_q, t, txtimer);
2245	u32 tx_queues_count = priv->plat->tx_queues_to_use;	2244	struct stmmac_priv *priv = tx_q->priv_data;
2246	u32 queue;	2245	struct stmmac_channel *ch;
		2246
		2247	ch = &priv->channel[tx_q->queue_index];
2247		2248
2248	/* let's scan all the tx queues */	2249	if (likely(napi_schedule_prep(&ch->napi)))
2249	for (queue = 0; queue < tx_queues_count; queue++)	2250	__napi_schedule(&ch->napi);
2250	stmmac_tx_clean(priv, queue);
2251	}	2251	}
2252		2252
2253	/**	2253	/**
@@ -2260,11 +2260,17 @@ static void stmmac_tx_timer(struct timer_list *t) · 6 unmodified lines
2260	*/	2260	*/
2261	static void stmmac_init_tx_coalesce(struct stmmac_priv *priv)	2261	static void stmmac_init_tx_coalesce(struct stmmac_priv *priv)
2262	{	2262	{
		2263	u32 tx_channel_count = priv->plat->tx_queues_to_use;
		2264	u32 chan;
		2265
2263	priv->tx_coal_frames = STMMAC_TX_FRAMES;	2266	priv->tx_coal_frames = STMMAC_TX_FRAMES;
2264	priv->tx_coal_timer = STMMAC_COAL_TX_TIMER;	2267	priv->tx_coal_timer = STMMAC_COAL_TX_TIMER;
2265	timer_setup(&priv->txtimer, stmmac_tx_timer, 0);	2268
2266	priv->txtimer.expires = STMMAC_COAL_TIMER(priv->tx_coal_timer);	2269	for (chan = 0; chan < tx_channel_count; chan++) {
2267	add_timer(&priv->txtimer);	2270	struct stmmac_tx_queue *tx_q = &priv->tx_queue[chan];
		2271
		2272	timer_setup(&tx_q->txtimer, stmmac_tx_timer, 0);
		2273	}
2268	}	2274	}
2269		2275
2270	static void stmmac_set_rings_length(struct stmmac_priv *priv)	2276	static void stmmac_set_rings_length(struct stmmac_priv *priv)
@@ -2592,6 +2598,7 @@ static void stmmac_hw_teardown(struct net_device *dev) · 321 unmodified lines
2592	static int stmmac_open(struct net_device *dev)	2598	static int stmmac_open(struct net_device *dev)
2593	{	2599	{
2594	struct stmmac_priv *priv = netdev_priv(dev);	2600	struct stmmac_priv *priv = netdev_priv(dev);
		2601	u32 chan;
2595	int ret;	2602	int ret;
2596		2603
2597	stmmac_check_ether_addr(priv);	2604	stmmac_check_ether_addr(priv);
@@ -2688,7 +2695,9 @@ irq_error: · 90 unmodified lines
2688	if (dev->phydev)	2695	if (dev->phydev)
2689	phy_stop(dev->phydev);	2696	phy_stop(dev->phydev);
2690		2697
2691	del_timer_sync(&priv->txtimer);	2698	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
		2699	del_timer_sync(&priv->tx_queue[chan].txtimer);
		2700
2692	stmmac_hw_teardown(dev);	2701	stmmac_hw_teardown(dev);
2693	init_error:	2702	init_error:
2694	free_dma_desc_resources(priv);	2703	free_dma_desc_resources(priv);
@@ -2708,6 +2717,7 @@ dma_desc_error: · 13 unmodified lines
2708	static int stmmac_release(struct net_device *dev)	2717	static int stmmac_release(struct net_device *dev)
2709	{	2718	{
2710	struct stmmac_priv *priv = netdev_priv(dev);	2719	struct stmmac_priv *priv = netdev_priv(dev);
		2720	u32 chan;
2711		2721
2712	if (priv->eee_enabled)	2722	if (priv->eee_enabled)
2713	del_timer_sync(&priv->eee_ctrl_timer);	2723	del_timer_sync(&priv->eee_ctrl_timer);
@@ -2722,7 +2732,8 @@ static int stmmac_release(struct net_device *dev) · 8 unmodified lines
2722		2732
2723	stmmac_disable_all_queues(priv);	2733	stmmac_disable_all_queues(priv);
2724		2734
2725	del_timer_sync(&priv->txtimer);	2735	for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
		2736	del_timer_sync(&priv->tx_queue[chan].txtimer);
2726		2737
2727	/* Free the IRQ lines */	2738	/* Free the IRQ lines */
2728	free_irq(dev->irq, dev);	2739	free_irq(dev->irq, dev);
@@ -2936,14 +2947,13 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff skb, struct net_device dev) · 207 unmodified lines
2936	priv->xstats.tx_tso_nfrags += nfrags;	2947	priv->xstats.tx_tso_nfrags += nfrags;
2937		2948
2938	/* Manage tx mitigation */	2949	/* Manage tx mitigation */
2939	priv->tx_count_frames += nfrags + 1;	2950	tx_q->tx_count_frames += nfrags + 1;
2940	if (likely(priv->tx_coal_frames > priv->tx_count_frames)) {	2951	if (priv->tx_coal_frames <= tx_q->tx_count_frames) {
2941	mod_timer(&priv->txtimer,
2942	STMMAC_COAL_TIMER(priv->tx_coal_timer));
2943	} else {
2944	priv->tx_count_frames = 0;
2945	stmmac_set_tx_ic(priv, desc);	2952	stmmac_set_tx_ic(priv, desc);
2946	priv->xstats.tx_set_ic_bit++;	2953	priv->xstats.tx_set_ic_bit++;
		2954	tx_q->tx_count_frames = 0;
		2955	} else {
		2956	stmmac_tx_timer_arm(priv, queue);
2947	}	2957	}
2948		2958
2949	skb_tx_timestamp(skb);	2959	skb_tx_timestamp(skb);
@@ -2992,6 +3002,7 @@ static netdev_tx_t stmmac_tso_xmit(struct sk_buff skb, struct net_device dev) · 42 unmodified lines
2992		3002
2993	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len);	3003	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len);
2994		3004
		3005	tx_q->tx_tail_addr = tx_q->dma_tx_phy + (tx_q->cur_tx * sizeof(*desc));
2995	stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);	3006	stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);
2996		3007
2997	return NETDEV_TX_OK;	3008	return NETDEV_TX_OK;
@@ -3146,14 +3157,13 @@ static netdev_tx_t stmmac_xmit(struct sk_buff skb, struct net_device dev) · 148 unmodified lines
3146	* This approach takes care about the fragments: desc is the first	3157	* This approach takes care about the fragments: desc is the first
3147	* element in case of no SG.	3158	* element in case of no SG.
3148	*/	3159	*/
3149	priv->tx_count_frames += nfrags + 1;	3160	tx_q->tx_count_frames += nfrags + 1;
3150	if (likely(priv->tx_coal_frames > priv->tx_count_frames)) {	3161	if (priv->tx_coal_frames <= tx_q->tx_count_frames) {
3151	mod_timer(&priv->txtimer,
3152	STMMAC_COAL_TIMER(priv->tx_coal_timer));
3153	} else {
3154	priv->tx_count_frames = 0;
3155	stmmac_set_tx_ic(priv, desc);	3162	stmmac_set_tx_ic(priv, desc);
3156	priv->xstats.tx_set_ic_bit++;	3163	priv->xstats.tx_set_ic_bit++;
		3164	tx_q->tx_count_frames = 0;
		3165	} else {
		3166	stmmac_tx_timer_arm(priv, queue);
3157	}	3167	}
3158		3168
3159	skb_tx_timestamp(skb);	3169	skb_tx_timestamp(skb);
@@ -3199,6 +3209,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff skb, struct net_device dev) · 39 unmodified lines
3199	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len);	3209	netdev_tx_sent_queue(netdev_get_tx_queue(dev, queue), skb->len);
3200		3210
3201	stmmac_enable_dma_transmission(priv, priv->ioaddr);	3211	stmmac_enable_dma_transmission(priv, priv->ioaddr);
		3212
		3213	tx_q->tx_tail_addr = tx_q->dma_tx_phy + (tx_q->cur_tx * sizeof(*desc));
3202	stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);	3214	stmmac_set_tx_tail_ptr(priv, priv->ioaddr, tx_q->tx_tail_addr, queue);
3203		3215
3204	return NETDEV_TX_OK;	3216	return NETDEV_TX_OK;
@@ -3319,6 +3331,7 @@ static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue) · 114 unmodified lines
3319	static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)	3331	static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
3320	{	3332	{
3321	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];	3333	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
		3334	struct stmmac_channel *ch = &priv->channel[queue];
3322	unsigned int entry = rx_q->cur_rx;	3335	unsigned int entry = rx_q->cur_rx;
3323	int coe = priv->hw->rx_csum;	3336	int coe = priv->hw->rx_csum;
3324	unsigned int next_entry;	3337	unsigned int next_entry;
@@ -3491,7 +3504,7 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) · 166 unmodified lines
3491	else	3504	else
3492	skb->ip_summed = CHECKSUM_UNNECESSARY;	3505	skb->ip_summed = CHECKSUM_UNNECESSARY;
3493		3506
3494	napi_gro_receive(&rx_q->napi, skb);	3507	napi_gro_receive(&ch->napi, skb);
3495		3508
3496	priv->dev->stats.rx_packets++;	3509	priv->dev->stats.rx_packets++;
3497	priv->dev->stats.rx_bytes += frame_len;	3510	priv->dev->stats.rx_bytes += frame_len;
@@ -3514,27 +3527,33 @@ static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue) · 16 unmodified lines
3514	* Description :	3527	* Description :
3515	* To look at the incoming frames and clear the tx resources.	3528	* To look at the incoming frames and clear the tx resources.
3516	*/	3529	*/
3517	static int stmmac_poll(struct napi_struct *napi, int budget)	3530	static int stmmac_napi_poll(struct napi_struct *napi, int budget)
3518	{	3531	{
3519	struct stmmac_rx_queue *rx_q =	3532	struct stmmac_channel *ch =
3520	container_of(napi, struct stmmac_rx_queue, napi);	3533	container_of(napi, struct stmmac_channel, napi);
3521	struct stmmac_priv *priv = rx_q->priv_data;	3534	struct stmmac_priv *priv = ch->priv_data;
3522	u32 tx_count = priv->plat->tx_queues_to_use;	3535	int work_done = 0, work_rem = budget;
3523	u32 chan = rx_q->queue_index;	3536	u32 chan = ch->index;
3524	int work_done = 0;
3525	u32 queue;
3526		3537
3527	priv->xstats.napi_poll++;	3538	priv->xstats.napi_poll++;
3528		3539
3529	/* check all the queues */	3540	if (ch->has_tx) {
3530	for (queue = 0; queue < tx_count; queue++)	3541	int done = stmmac_tx_clean(priv, work_rem, chan);
3531	stmmac_tx_clean(priv, queue);
3532		3542
3533	work_done = stmmac_rx(priv, budget, rx_q->queue_index);	3543	work_done += done;
3534	if (work_done < budget) {	3544	work_rem -= done;
3535	napi_complete_done(napi, work_done);	3545	}
3536	stmmac_enable_dma_irq(priv, priv->ioaddr, chan);	3546
		3547	if (ch->has_rx) {
		3548	int done = stmmac_rx(priv, work_rem, chan);
		3549
		3550	work_done += done;
		3551	work_rem -= done;
3537	}	3552	}
		3553
		3554	if (work_done < budget && napi_complete_done(napi, work_done))
		3555	stmmac_enable_dma_irq(priv, priv->ioaddr, chan);
		3556
3538	return work_done;	3557	return work_done;
3539	}	3558	}
3540		3559
@@ -4198,8 +4217,8 @@ int stmmac_dvr_probe(struct device *device, · 657 unmodified lines
4198	{	4217	{
4199	struct net_device *ndev = NULL;	4218	struct net_device *ndev = NULL;
4200	struct stmmac_priv *priv;	4219	struct stmmac_priv *priv;
		4220	u32 queue, maxq;
4201	int ret = 0;	4221	int ret = 0;
4202	u32 queue;
4203		4222
4204	ndev = alloc_etherdev_mqs(sizeof(struct stmmac_priv),	4223	ndev = alloc_etherdev_mqs(sizeof(struct stmmac_priv),
4205	MTL_MAX_TX_QUEUES,	4224	MTL_MAX_TX_QUEUES,
@@ -4322,11 +4341,22 @@ int stmmac_dvr_probe(struct device *device, · 116 unmodified lines
4322	"Enable RX Mitigation via HW Watchdog Timer\n");	4341	"Enable RX Mitigation via HW Watchdog Timer\n");
4323	}	4342	}
4324		4343
4325	for (queue = 0; queue < priv->plat->rx_queues_to_use; queue++) {	4344	/* Setup channels NAPI */
4326	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];	4345	maxq = max(priv->plat->rx_queues_to_use, priv->plat->tx_queues_to_use);
4327		4346
4328	netif_napi_add(ndev, &rx_q->napi, stmmac_poll,	4347	for (queue = 0; queue < maxq; queue++) {
4329	(8 * priv->plat->rx_queues_to_use));	4348	struct stmmac_channel *ch = &priv->channel[queue];
		4349
		4350	ch->priv_data = priv;
		4351	ch->index = queue;
		4352
		4353	if (queue < priv->plat->rx_queues_to_use)
		4354	ch->has_rx = true;
		4355	if (queue < priv->plat->tx_queues_to_use)
		4356	ch->has_tx = true;
		4357
		4358	netif_napi_add(ndev, &ch->napi, stmmac_napi_poll,
		4359	NAPI_POLL_WEIGHT);
4330	}	4360	}
4331		4361
4332	mutex_init(&priv->lock);	4362	mutex_init(&priv->lock);
@@ -4372,10 +4402,10 @@ error_netdev_register: · 39 unmodified lines
4372	priv->hw->pcs != STMMAC_PCS_RTBI)	4402	priv->hw->pcs != STMMAC_PCS_RTBI)
4373	stmmac_mdio_unregister(ndev);	4403	stmmac_mdio_unregister(ndev);
4374	error_mdio_register:	4404	error_mdio_register:
4375	for (queue = 0; queue < priv->plat->rx_queues_to_use; queue++) {	4405	for (queue = 0; queue < maxq; queue++) {
4376	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];	4406	struct stmmac_channel *ch = &priv->channel[queue];
4377		4407
4378	netif_napi_del(&rx_q->napi);	4408	netif_napi_del(&ch->napi);
4379	}	4409	}
4380	error_hw_init:	4410	error_hw_init:
4381	destroy_workqueue(priv->wq);	4411	destroy_workqueue(priv->wq);

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c+2−3

  * Description:
  * This function validates the number of Unicast address entries supported
  * by a particular Synopsys 10/100/1000 controller. The Synopsys controller
- * supports 1, 32, 64, or 128 Unicast filter entries for it's Unicast filter
+ * supports 1..32, 64, or 128 Unicast filter entries for it's Unicast filter
  * logic. This function validates a valid, supported configuration is
  * selected, and defaults to 1 Unicast address if an unsupported
  * configuration is selected.
 	int x = ucast_entries;
 	switch (x) {
-	case 1:
+	case 1 ... 32:
-	case 32:
 	case 64:
 	case 128:
 		break;

drivers/net/ethernet/ti/Kconfig+1−0

@@ -41,6 +41,7 @@ config TI_DAVINCI_MDIO · 40 unmodified lines
41	config TI_DAVINCI_CPDMA	41	config TI_DAVINCI_CPDMA
42	tristate "TI DaVinci CPDMA Support"	42	tristate "TI DaVinci CPDMA Support"
43	depends on ARCH_DAVINCI \|\| ARCH_OMAP2PLUS \|\| COMPILE_TEST	43	depends on ARCH_DAVINCI \|\| ARCH_OMAP2PLUS \|\| COMPILE_TEST
		44	select GENERIC_ALLOCATOR
44	---help---	45	---help---
45	This driver supports TI's DaVinci CPDMA dma engine.	46	This driver supports TI's DaVinci CPDMA dma engine.
46		47

drivers/net/ethernet/wiznet/w5100.c+1−1

@@ -835,7 +835,7 @@ static void w5100_tx_work(struct work_struct *work) · 834 unmodified lines
835	w5100_tx_skb(priv->ndev, skb);	835	w5100_tx_skb(priv->ndev, skb);
836	}	836	}
837		837
838	static int w5100_start_tx(struct sk_buff skb, struct net_device ndev)	838	static netdev_tx_t w5100_start_tx(struct sk_buff skb, struct net_device ndev)
839	{	839	{
840	struct w5100_priv *priv = netdev_priv(ndev);	840	struct w5100_priv *priv = netdev_priv(ndev);
841		841

drivers/net/ethernet/wiznet/w5300.c+1−1

@@ -365,7 +365,7 @@ static void w5300_tx_timeout(struct net_device *ndev) · 364 unmodified lines
365	netif_wake_queue(ndev);	365	netif_wake_queue(ndev);
366	}	366	}
367		367
368	static int w5300_start_tx(struct sk_buff skb, struct net_device ndev)	368	static netdev_tx_t w5300_start_tx(struct sk_buff skb, struct net_device ndev)
369	{	369	{
370	struct w5300_priv *priv = netdev_priv(ndev);	370	struct w5300_priv *priv = netdev_priv(ndev);
371		371

drivers/net/hyperv/netvsc.c+3−0

@@ -1203,6 +1203,9 @@ static void netvsc_send_vf(struct net_device *ndev, · 1202 unmodified lines
1203		1203
1204	net_device_ctx->vf_alloc = nvmsg->msg.v4_msg.vf_assoc.allocated;	1204	net_device_ctx->vf_alloc = nvmsg->msg.v4_msg.vf_assoc.allocated;
1205	net_device_ctx->vf_serial = nvmsg->msg.v4_msg.vf_assoc.serial;	1205	net_device_ctx->vf_serial = nvmsg->msg.v4_msg.vf_assoc.serial;
		1206	netdev_info(ndev, "VF slot %u %s\n",
		1207	net_device_ctx->vf_serial,
		1208	net_device_ctx->vf_alloc ? "added" : "removed");
1206	}	1209	}
1207		1210
1208	static void netvsc_receive_inband(struct net_device *ndev,	1211	static void netvsc_receive_inband(struct net_device *ndev,

drivers/net/hyperv/netvsc_drv.c+36−31

@@ -1894,20 +1894,6 @@ out_unlock: · 1893 unmodified lines
1894	rtnl_unlock();	1894	rtnl_unlock();
1895	}	1895	}
1896		1896
1897	static struct net_device get_netvsc_bymac(const u8 mac)
1898	{
1899	struct net_device_context *ndev_ctx;
1900
1901	list_for_each_entry(ndev_ctx, &netvsc_dev_list, list) {
1902	struct net_device *dev = hv_get_drvdata(ndev_ctx->device_ctx);
1903
1904	if (ether_addr_equal(mac, dev->perm_addr))
1905	return dev;
1906	}
1907
1908	return NULL;
1909	}
1910
1911	static struct net_device get_netvsc_byref(struct net_device vf_netdev)	1897	static struct net_device get_netvsc_byref(struct net_device vf_netdev)
1912	{	1898	{
1913	struct net_device_context *net_device_ctx;	1899	struct net_device_context *net_device_ctx;
@@ -2036,26 +2022,48 @@ static void netvsc_vf_setup(struct work_struct *w) · 122 unmodified lines
2036	rtnl_unlock();	2022	rtnl_unlock();
2037	}	2023	}
2038		2024
		2025	/* Find netvsc by VMBus serial number.
		2026	* The PCI hyperv controller records the serial number as the slot.
		2027	*/
		2028	static struct net_device get_netvsc_byslot(const struct net_device vf_netdev)
		2029	{
		2030	struct device *parent = vf_netdev->dev.parent;
		2031	struct net_device_context *ndev_ctx;
		2032	struct pci_dev *pdev;
		2033
		2034	if (!parent \|\| !dev_is_pci(parent))
		2035	return NULL; /* not a PCI device */
		2036
		2037	pdev = to_pci_dev(parent);
		2038	if (!pdev->slot) {
		2039	netdev_notice(vf_netdev, "no PCI slot information\n");
		2040	return NULL;
		2041	}
		2042
		2043	list_for_each_entry(ndev_ctx, &netvsc_dev_list, list) {
		2044	if (!ndev_ctx->vf_alloc)
		2045	continue;
		2046
		2047	if (ndev_ctx->vf_serial == pdev->slot->number)
		2048	return hv_get_drvdata(ndev_ctx->device_ctx);
		2049	}
		2050
		2051	netdev_notice(vf_netdev,
		2052	"no netdev found for slot %u\n", pdev->slot->number);
		2053	return NULL;
		2054	}
		2055
2039	static int netvsc_register_vf(struct net_device *vf_netdev)	2056	static int netvsc_register_vf(struct net_device *vf_netdev)
2040	{	2057	{
2041	struct net_device *ndev;
2042	struct net_device_context *net_device_ctx;	2058	struct net_device_context *net_device_ctx;
2043	struct device *pdev = vf_netdev->dev.parent;
2044	struct netvsc_device *netvsc_dev;	2059	struct netvsc_device *netvsc_dev;
		2060	struct net_device *ndev;
2045	int ret;	2061	int ret;
2046		2062
2047	if (vf_netdev->addr_len != ETH_ALEN)	2063	if (vf_netdev->addr_len != ETH_ALEN)
2048	return NOTIFY_DONE;	2064	return NOTIFY_DONE;
2049		2065
2050	if (!pdev \|\| !dev_is_pci(pdev) \|\| dev_is_pf(pdev))	2066	ndev = get_netvsc_byslot(vf_netdev);
2051	return NOTIFY_DONE;
2052
2053	/*
2054	* We will use the MAC address to locate the synthetic interface to
2055	* associate with the VF interface. If we don't find a matching
2056	* synthetic interface, move on.
2057	*/
2058	ndev = get_netvsc_bymac(vf_netdev->perm_addr);
2059	if (!ndev)	2067	if (!ndev)
2060	return NOTIFY_DONE;	2068	return NOTIFY_DONE;
2061		2069
@@ -2272,17 +2280,15 @@ static int netvsc_remove(struct hv_device *dev) · 210 unmodified lines
2272		2280
2273	cancel_delayed_work_sync(&ndev_ctx->dwork);	2281	cancel_delayed_work_sync(&ndev_ctx->dwork);
2274		2282
2275	rcu_read_lock();	2283	rtnl_lock();
2276	nvdev = rcu_dereference(ndev_ctx->nvdev);	2284	nvdev = rtnl_dereference(ndev_ctx->nvdev);
2277		2285	if (nvdev)
2278	if (nvdev)
2279	cancel_work_sync(&nvdev->subchan_work);	2286	cancel_work_sync(&nvdev->subchan_work);
2280		2287
2281	/*	2288	/*
2282	* Call to the vsc driver to let it know that the device is being	2289	* Call to the vsc driver to let it know that the device is being
2283	* removed. Also blocks mtu and channel changes.	2290	* removed. Also blocks mtu and channel changes.
2284	*/	2291	*/
2285	rtnl_lock();
2286	vf_netdev = rtnl_dereference(ndev_ctx->vf_netdev);	2292	vf_netdev = rtnl_dereference(ndev_ctx->vf_netdev);
2287	if (vf_netdev)	2293	if (vf_netdev)
2288	netvsc_unregister_vf(vf_netdev);	2294	netvsc_unregister_vf(vf_netdev);
@@ -2294,7 +2300,6 @@ static int netvsc_remove(struct hv_device *dev) · 5 unmodified lines
2294	list_del(&ndev_ctx->list);	2300	list_del(&ndev_ctx->list);
2295		2301
2296	rtnl_unlock();	2302	rtnl_unlock();
2297	rcu_read_unlock();
2298		2303
2299	hv_set_drvdata(dev, NULL);	2304	hv_set_drvdata(dev, NULL);
2300		2305

drivers/net/phy/sfp-bus.c+2−2

 	}
 	if (bus->started)
 		bus->socket_ops->start(bus->sfp);
+	bus->netdev->sfp_bus = bus;
 	bus->registered = true;
 	return 0;
 }
 {
 	const struct sfp_upstream_ops *ops = bus->upstream_ops;
+	bus->netdev->sfp_bus = NULL;
 	if (bus->registered) {
 		if (bus->started)
 			bus->socket_ops->stop(bus->sfp);
 {
 	bus->upstream_ops = NULL;
 	bus->upstream = NULL;
-	bus->netdev->sfp_bus = NULL;
 	bus->netdev = NULL;
 }
 		bus->upstream_ops = ops;
 		bus->upstream = upstream;
 		bus->netdev = ndev;
-		ndev->sfp_bus = bus;
 		if (bus->sfp) {
 			ret = sfp_register_bus(bus);

drivers/net/ppp/pppoe.c+3−0

@@ -429,6 +429,9 @@ static int pppoe_rcv(struct sk_buff skb, struct net_device dev, · 428 unmodified lines
429	if (!skb)	429	if (!skb)
430	goto out;	430	goto out;
431		431
		432	if (skb_mac_header_len(skb) < ETH_HLEN)
		433	goto drop;
		434
432	if (!pskb_may_pull(skb, sizeof(struct pppoe_hdr)))	435	if (!pskb_may_pull(skb, sizeof(struct pppoe_hdr)))
433	goto drop;	436	goto drop;
434		437

drivers/net/tun.c+0−43

@@ -1153,43 +1153,6 @@ static netdev_features_t tun_net_fix_features(struct net_device *dev, · 1152 unmodified lines
1153		1153
1154	return (features & tun->set_features) \| (features & ~TUN_USER_FEATURES);	1154	return (features & tun->set_features) \| (features & ~TUN_USER_FEATURES);
1155	}	1155	}
1156	#ifdef CONFIG_NET_POLL_CONTROLLER
1157	static void tun_poll_controller(struct net_device *dev)
1158	{
1159	/*
1160	* Tun only receives frames when:
1161	* 1) the char device endpoint gets data from user space
1162	* 2) the tun socket gets a sendmsg call from user space
1163	* If NAPI is not enabled, since both of those are synchronous
1164	* operations, we are guaranteed never to have pending data when we poll
1165	* for it so there is nothing to do here but return.
1166	* We need this though so netpoll recognizes us as an interface that
1167	* supports polling, which enables bridge devices in virt setups to
1168	* still use netconsole
1169	* If NAPI is enabled, however, we need to schedule polling for all
1170	* queues unless we are using napi_gro_frags(), which we call in
1171	* process context and not in NAPI context.
1172	*/
1173	struct tun_struct *tun = netdev_priv(dev);
1174
1175	if (tun->flags & IFF_NAPI) {
1176	struct tun_file *tfile;
1177	int i;
1178
1179	if (tun_napi_frags_enabled(tun))
1180	return;
1181
1182	rcu_read_lock();
1183	for (i = 0; i < tun->numqueues; i++) {
1184	tfile = rcu_dereference(tun->tfiles[i]);
1185	if (tfile->napi_enabled)
1186	napi_schedule(&tfile->napi);
1187	}
1188	rcu_read_unlock();
1189	}
1190	return;
1191	}
1192	#endif
1193		1156
1194	static void tun_set_headroom(struct net_device *dev, int new_hr)	1157	static void tun_set_headroom(struct net_device *dev, int new_hr)
1195	{	1158	{
@@ -1283,9 +1246,6 @@ static const struct net_device_ops tun_netdev_ops = { · 87 unmodified lines
1283	.ndo_start_xmit = tun_net_xmit,	1246	.ndo_start_xmit = tun_net_xmit,
1284	.ndo_fix_features = tun_net_fix_features,	1247	.ndo_fix_features = tun_net_fix_features,
1285	.ndo_select_queue = tun_select_queue,	1248	.ndo_select_queue = tun_select_queue,
1286	#ifdef CONFIG_NET_POLL_CONTROLLER
1287	.ndo_poll_controller = tun_poll_controller,
1288	#endif
1289	.ndo_set_rx_headroom = tun_set_headroom,	1249	.ndo_set_rx_headroom = tun_set_headroom,
1290	.ndo_get_stats64 = tun_net_get_stats64,	1250	.ndo_get_stats64 = tun_net_get_stats64,
1291	};	1251	};
@@ -1365,9 +1325,6 @@ static const struct net_device_ops tap_netdev_ops = { · 73 unmodified lines
1365	.ndo_set_mac_address = eth_mac_addr,	1325	.ndo_set_mac_address = eth_mac_addr,
1366	.ndo_validate_addr = eth_validate_addr,	1326	.ndo_validate_addr = eth_validate_addr,
1367	.ndo_select_queue = tun_select_queue,	1327	.ndo_select_queue = tun_select_queue,
1368	#ifdef CONFIG_NET_POLL_CONTROLLER
1369	.ndo_poll_controller = tun_poll_controller,
1370	#endif
1371	.ndo_features_check = passthru_features_check,	1328	.ndo_features_check = passthru_features_check,
1372	.ndo_set_rx_headroom = tun_set_headroom,	1329	.ndo_set_rx_headroom = tun_set_headroom,
1373	.ndo_get_stats64 = tun_net_get_stats64,	1330	.ndo_get_stats64 = tun_net_get_stats64,

drivers/net/usb/qmi_wwan.c+36−8

 		USB_DEVICE_AND_INTERFACE_INFO(0x03f0, 0x581d, USB_CLASS_VENDOR_SPEC, 1, 7),
 		.driver_info = (unsigned long)&qmi_wwan_info,
 	},
+	{	/* Quectel EP06/EG06/EM06 */
+		USB_DEVICE_AND_INTERFACE_INFO(0x2c7c, 0x0306,
+					      USB_CLASS_VENDOR_SPEC,
+					      USB_SUBCLASS_VENDOR_SPEC,
+					      0xff),
+		.driver_info	    = (unsigned long)&qmi_wwan_info_quirk_dtr,
+	},
 	/* 3. Combined interface devices matching on interface number */
 	{QMI_FIXED_INTF(0x0408, 0xea42, 4)},	/* Yota / Megafon M100-1 */
 	{QMI_FIXED_INTF(0x1199, 0x9061, 8)},	/* Sierra Wireless Modem */
 	{QMI_FIXED_INTF(0x1199, 0x9063, 8)},	/* Sierra Wireless EM7305 */
 	{QMI_FIXED_INTF(0x1199, 0x9063, 10)},	/* Sierra Wireless EM7305 */
-	{QMI_FIXED_INTF(0x1199, 0x9071, 8)},	/* Sierra Wireless MC74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x9071, 8)},	/* Sierra Wireless MC74xx */
-	{QMI_FIXED_INTF(0x1199, 0x9071, 10)},	/* Sierra Wireless MC74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x9071, 10)},/* Sierra Wireless MC74xx */
-	{QMI_FIXED_INTF(0x1199, 0x9079, 8)},	/* Sierra Wireless EM74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x9079, 8)},	/* Sierra Wireless EM74xx */
-	{QMI_FIXED_INTF(0x1199, 0x9079, 10)},	/* Sierra Wireless EM74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x9079, 10)},/* Sierra Wireless EM74xx */
-	{QMI_FIXED_INTF(0x1199, 0x907b, 8)},	/* Sierra Wireless EM74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x907b, 8)},	/* Sierra Wireless EM74xx */
-	{QMI_FIXED_INTF(0x1199, 0x907b, 10)},	/* Sierra Wireless EM74xx */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x907b, 10)},/* Sierra Wireless EM74xx */
-	{QMI_FIXED_INTF(0x1199, 0x9091, 8)},	/* Sierra Wireless EM7565 */
+	{QMI_QUIRK_SET_DTR(0x1199, 0x9091, 8)},	/* Sierra Wireless EM7565 */
 	{QMI_FIXED_INTF(0x1bbb, 0x011e, 4)},	/* Telekom Speedstick LTE II (Alcatel One Touch L100V LTE) */
 	{QMI_FIXED_INTF(0x1bbb, 0x0203, 2)},	/* Alcatel L800MA */
 	{QMI_FIXED_INTF(0x2357, 0x0201, 4)},	/* TP-LINK HSUPA Modem MA180 */
 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0121, 4)},	/* Quectel EC21 Mini PCIe */
 	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0191, 4)},	/* Quectel EG91 */
 	{QMI_FIXED_INTF(0x2c7c, 0x0296, 4)},	/* Quectel BG96 */
-	{QMI_QUIRK_SET_DTR(0x2c7c, 0x0306, 4)},	/* Quectel EP06 Mini PCIe */
 	/* 4. Gobi 1000 devices */
 	{QMI_GOBI1K_DEVICE(0x05c6, 0x9212)},	/* Acer Gobi Modem Device */
 	return false;
 }
+static bool quectel_ep06_diag_detected(struct usb_interface *intf)
+{
+	struct usb_device *dev = interface_to_usbdev(intf);
+	struct usb_interface_descriptor intf_desc = intf->cur_altsetting->desc;
+	if (le16_to_cpu(dev->descriptor.idVendor) == 0x2c7c &&
+	    le16_to_cpu(dev->descriptor.idProduct) == 0x0306 &&
+	    intf_desc.bNumEndpoints == 2)
+		return true;
+	return false;
+}
 static int qmi_wwan_probe(struct usb_interface *intf,
 			  const struct usb_device_id *prod)
 {
 		return -ENODEV;
 	}
+	/* Quectel EP06/EM06/EG06 supports dynamic interface configuration, so
+	 * we need to match on class/subclass/protocol. These values are
+	 * identical for the diagnostic- and QMI-interface, but bNumEndpoints is
+	 * different. Ignore the current interface if the number of endpoints
+	 * the number for the diag interface (two).
+	 */
+	if (quectel_ep06_diag_detected(intf))
+		return -ENODEV;
 	return usbnet_probe(intf, id);
 }

drivers/net/veth.c+2−2

 	int mac_len, delta, off;
 	struct xdp_buff xdp;
+	skb_orphan(skb);
 	rcu_read_lock();
 	xdp_prog = rcu_dereference(rq->xdp_prog);
 	if (unlikely(!xdp_prog)) {
 		skb_copy_header(nskb, skb);
 		head_off = skb_headroom(nskb) - skb_headroom(skb);
 		skb_headers_offset_update(nskb, head_off);
-		if (skb->sk)
-			skb_set_owner_w(nskb, skb->sk);
 		consume_skb(skb);
 		skb = nskb;
 	}

drivers/net/xen-netfront.c+17−15

 /* IRQ name is queue name with "-tx" or "-rx" appended */
 #define IRQ_NAME_SIZE (QUEUE_NAME_SIZE + 3)
-static DECLARE_WAIT_QUEUE_HEAD(module_load_q);
+static DECLARE_WAIT_QUEUE_HEAD(module_wq);
-static DECLARE_WAIT_QUEUE_HEAD(module_unload_q);
 struct netfront_stats {
 	u64			packets;
 			BUG_ON(pull_to <= skb_headlen(skb));
 			__pskb_pull_tail(skb, pull_to - skb_headlen(skb));
 		}
-		BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
+		if (unlikely(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS)) {
+			queue->rx.rsp_cons = ++cons;
+			kfree_skb(nskb);
+			return ~0U;
+		}
 		skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
 				skb_frag_page(nfrag),
 		skb->len += rx->status;
 		i = xennet_fill_frags(queue, skb, &tmpq);
+		if (unlikely(i == ~0U))
+			goto err;
 		if (rx->flags & XEN_NETRXF_csum_blank)
 			skb->ip_summed = CHECKSUM_PARTIAL;
 	netif_carrier_off(netdev);
 	xenbus_switch_state(dev, XenbusStateInitialising);
-	wait_event(module_load_q,
+	wait_event(module_wq,
-			   xenbus_read_driver_state(dev->otherend) !=
+		   xenbus_read_driver_state(dev->otherend) !=
-			   XenbusStateClosed &&
+		   XenbusStateClosed &&
-			   xenbus_read_driver_state(dev->otherend) !=
+		   xenbus_read_driver_state(dev->otherend) !=
-			   XenbusStateUnknown);
+		   XenbusStateUnknown);
 	return netdev;
  exit:
 	dev_dbg(&dev->dev, "%s\n", xenbus_strstate(backend_state));
+	wake_up_all(&module_wq);
 	switch (backend_state) {
 	case XenbusStateInitialising:
 	case XenbusStateInitialised:
 	case XenbusStateReconfiguring:
 	case XenbusStateReconfigured:
-		break;
 	case XenbusStateUnknown:
-		wake_up_all(&module_unload_q);
 		break;
 	case XenbusStateInitWait:
 		break;
 	case XenbusStateClosed:
-		wake_up_all(&module_unload_q);
 		if (dev->state == XenbusStateClosed)
 			break;
 		/* Missed the backend's CLOSING state -- fallthrough */
 	case XenbusStateClosing:
-		wake_up_all(&module_unload_q);
 		xenbus_frontend_closed(dev);
 		break;
 	}
 	if (xenbus_read_driver_state(dev->otherend) != XenbusStateClosed) {
 		xenbus_switch_state(dev, XenbusStateClosing);
-		wait_event(module_unload_q,
+		wait_event(module_wq,
 			   xenbus_read_driver_state(dev->otherend) ==
 			   XenbusStateClosing ||
 			   xenbus_read_driver_state(dev->otherend) ==
 			   XenbusStateUnknown);
 		xenbus_switch_state(dev, XenbusStateClosed);
-		wait_event(module_unload_q,
+		wait_event(module_wq,
 			   xenbus_read_driver_state(dev->otherend) ==
 			   XenbusStateClosed ||
 			   xenbus_read_driver_state(dev->otherend) ==

drivers/nvme/host/multipath.c+4−2

 	INIT_WORK(&ctrl->ana_work, nvme_ana_work);
 	ctrl->ana_log_buf = kmalloc(ctrl->ana_log_size, GFP_KERNEL);
-	if (!ctrl->ana_log_buf)
+	if (!ctrl->ana_log_buf) {
+		error = -ENOMEM;
 		goto out;
+	}
 	error = nvme_read_ana_log(ctrl, true);
 	if (error)
 out_free_ana_log_buf:
 	kfree(ctrl->ana_log_buf);
 out:
-	return -ENOMEM;
+	return error;
 }
 void nvme_mpath_uninit(struct nvme_ctrl *ctrl)

drivers/nvme/target/admin-cmd.c+4−0

 		offset += len;
 		ngrps++;
 	}
+	for ( ; grpid <= NVMET_MAX_ANAGRPS; grpid++) {
+		if (nvmet_ana_group_enabled[grpid])
+			ngrps++;
+	}
 	hdr.chgcnt = cpu_to_le64(nvmet_ana_chgcnt);
 	hdr.ngrps = cpu_to_le16(ngrps);

drivers/nvme/target/rdma.c+25−2

 	struct nvmet_req	req;
+	bool			allocated;
 	u8			n_rdma;
 	u32			flags;
 	u32			invalidate_rkey;
 	unsigned long flags;
 	spin_lock_irqsave(&queue->rsps_lock, flags);
-	rsp = list_first_entry(&queue->free_rsps,
+	rsp = list_first_entry_or_null(&queue->free_rsps,
 				struct nvmet_rdma_rsp, free_list);
-	list_del(&rsp->free_list);
+	if (likely(rsp))
+		list_del(&rsp->free_list);
 	spin_unlock_irqrestore(&queue->rsps_lock, flags);
+	if (unlikely(!rsp)) {
+		rsp = kmalloc(sizeof(*rsp), GFP_KERNEL);
+		if (unlikely(!rsp))
+			return NULL;
+		rsp->allocated = true;
+	}
 	return rsp;
 }
 {
 	unsigned long flags;
+	if (rsp->allocated) {
+		kfree(rsp);
+		return;
+	}
 	spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
 	list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
 	spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
 	cmd->queue = queue;
 	rsp = nvmet_rdma_get_rsp(queue);
+	if (unlikely(!rsp)) {
+		/*
+		 * we get here only under memory pressure,
+		 * silently drop and have the host retry
+		 * as we can't even fail it.
+		 */
+		nvmet_rdma_post_recv(queue->dev, cmd);
+		return;
+	}
 	rsp->queue = queue;
 	rsp->cmd = cmd;
 	rsp->flags = 0;

drivers/of/base.c+3−0

@@ -140,6 +140,9 @@ void of_populate_phandle_cache(void) · 139 unmodified lines
140	if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)	140	if (np->phandle && np->phandle != OF_PHANDLE_ILLEGAL)
141	phandles++;	141	phandles++;
142		142
		143	if (!phandles)
		144	goto out;
		145
143	cache_entries = roundup_pow_of_two(phandles);	146	cache_entries = roundup_pow_of_two(phandles);
144	phandle_cache_mask = cache_entries - 1;	147	phandle_cache_mask = cache_entries - 1;
145		148

drivers/pci/controller/dwc/pcie-designware.c+4−4

@@ -135,7 +135,7 @@ static void dw_pcie_prog_outbound_atu_unroll(struct dw_pcie *pci, int index, · 134 unmodified lines
135	if (val & PCIE_ATU_ENABLE)	135	if (val & PCIE_ATU_ENABLE)
136	return;	136	return;
137		137
138	usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);	138	mdelay(LINK_WAIT_IATU);
139	}	139	}
140	dev_err(pci->dev, "Outbound iATU is not being enabled\n");	140	dev_err(pci->dev, "Outbound iATU is not being enabled\n");
141	}	141	}
@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, · 36 unmodified lines
178	if (val & PCIE_ATU_ENABLE)	178	if (val & PCIE_ATU_ENABLE)
179	return;	179	return;
180		180
181	usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);	181	mdelay(LINK_WAIT_IATU);
182	}	182	}
183	dev_err(pci->dev, "Outbound iATU is not being enabled\n");	183	dev_err(pci->dev, "Outbound iATU is not being enabled\n");
184	}	184	}
@@ -236,7 +236,7 @@ static int dw_pcie_prog_inbound_atu_unroll(struct dw_pcie *pci, int index, · 51 unmodified lines
236	if (val & PCIE_ATU_ENABLE)	236	if (val & PCIE_ATU_ENABLE)
237	return 0;	237	return 0;
238		238
239	usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);	239	mdelay(LINK_WAIT_IATU);
240	}	240	}
241	dev_err(pci->dev, "Inbound iATU is not being enabled\n");	241	dev_err(pci->dev, "Inbound iATU is not being enabled\n");
242		242
@@ -282,7 +282,7 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int bar, · 39 unmodified lines
282	if (val & PCIE_ATU_ENABLE)	282	if (val & PCIE_ATU_ENABLE)
283	return 0;	283	return 0;
284		284
285	usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);	285	mdelay(LINK_WAIT_IATU);
286	}	286	}
287	dev_err(pci->dev, "Inbound iATU is not being enabled\n");	287	dev_err(pci->dev, "Inbound iATU is not being enabled\n");
288		288

drivers/pci/controller/dwc/pcie-designware.h+1−2

@@ -26,8 +26,7 @@ · 25 unmodified lines
26		26
27	/* Parameters for the waiting for iATU enabled routine */	27	/* Parameters for the waiting for iATU enabled routine */
28	#define LINK_WAIT_MAX_IATU_RETRIES 5	28	#define LINK_WAIT_MAX_IATU_RETRIES 5
29	#define LINK_WAIT_IATU_MIN 9000	29	#define LINK_WAIT_IATU 9
30	#define LINK_WAIT_IATU_MAX 10000
31		30
32	/* Synopsys-specific PCIe configuration registers */	31	/* Synopsys-specific PCIe configuration registers */
33	#define PCIE_PORT_LINK_CONTROL 0x710	32	#define PCIE_PORT_LINK_CONTROL 0x710

drivers/pci/controller/pci-hyperv.c+39−0

@@ -89,6 +89,9 @@ static enum pci_protocol_version_t pci_protocol_version; · 88 unmodified lines
89		89
90	#define STATUS_REVISION_MISMATCH 0xC0000059	90	#define STATUS_REVISION_MISMATCH 0xC0000059
91		91
		92	/* space for 32bit serial number as string */
		93	#define SLOT_NAME_SIZE 11
		94
92	/*	95	/*
93	* Message Types	96	* Message Types
94	*/	97	*/
@@ -494,6 +497,7 @@ struct hv_pci_dev { · 399 unmodified lines
494	struct list_head list_entry;	497	struct list_head list_entry;
495	refcount_t refs;	498	refcount_t refs;
496	enum hv_pcichild_state state;	499	enum hv_pcichild_state state;
		500	struct pci_slot *pci_slot;
497	struct pci_function_description desc;	501	struct pci_function_description desc;
498	bool reported_missing;	502	bool reported_missing;
499	struct hv_pcibus_device *hbus;	503	struct hv_pcibus_device *hbus;
@@ -1457,6 +1461,36 @@ static void prepopulate_bars(struct hv_pcibus_device *hbus) · 957 unmodified lines
1457	spin_unlock_irqrestore(&hbus->device_list_lock, flags);	1461	spin_unlock_irqrestore(&hbus->device_list_lock, flags);
1458	}	1462	}
1459		1463
		1464	/*
		1465	* Assign entries in sysfs pci slot directory.
		1466	*
		1467	* Note that this function does not need to lock the children list
		1468	* because it is called from pci_devices_present_work which
		1469	* is serialized with hv_eject_device_work because they are on the
		1470	* same ordered workqueue. Therefore hbus->children list will not change
		1471	* even when pci_create_slot sleeps.
		1472	*/
		1473	static void hv_pci_assign_slots(struct hv_pcibus_device *hbus)
		1474	{
		1475	struct hv_pci_dev *hpdev;
		1476	char name[SLOT_NAME_SIZE];
		1477	int slot_nr;
		1478
		1479	list_for_each_entry(hpdev, &hbus->children, list_entry) {
		1480	if (hpdev->pci_slot)
		1481	continue;
		1482
		1483	slot_nr = PCI_SLOT(wslot_to_devfn(hpdev->desc.win_slot.slot));
		1484	snprintf(name, SLOT_NAME_SIZE, "%u", hpdev->desc.ser);
		1485	hpdev->pci_slot = pci_create_slot(hbus->pci_bus, slot_nr,
		1486	name, NULL);
		1487	if (IS_ERR(hpdev->pci_slot)) {
		1488	pr_warn("pci_create slot %s failed\n", name);
		1489	hpdev->pci_slot = NULL;
		1490	}
		1491	}
		1492	}
		1493
1460	/**	1494	/**
1461	* create_root_hv_pci_bus() - Expose a new root PCI bus	1495	* create_root_hv_pci_bus() - Expose a new root PCI bus
1462	* @hbus: Root PCI bus, as understood by this driver	1496	* @hbus: Root PCI bus, as understood by this driver
@@ -1480,6 +1514,7 @@ static int create_root_hv_pci_bus(struct hv_pcibus_device *hbus) · 17 unmodified lines
1480	pci_lock_rescan_remove();	1514	pci_lock_rescan_remove();
1481	pci_scan_child_bus(hbus->pci_bus);	1515	pci_scan_child_bus(hbus->pci_bus);
1482	pci_bus_assign_resources(hbus->pci_bus);	1516	pci_bus_assign_resources(hbus->pci_bus);
		1517	hv_pci_assign_slots(hbus);
1483	pci_bus_add_devices(hbus->pci_bus);	1518	pci_bus_add_devices(hbus->pci_bus);
1484	pci_unlock_rescan_remove();	1519	pci_unlock_rescan_remove();
1485	hbus->state = hv_pcibus_installed;	1520	hbus->state = hv_pcibus_installed;
@@ -1742,6 +1777,7 @@ static void pci_devices_present_work(struct work_struct *work) · 256 unmodified lines
1742	*/	1777	*/
1743	pci_lock_rescan_remove();	1778	pci_lock_rescan_remove();
1744	pci_scan_child_bus(hbus->pci_bus);	1779	pci_scan_child_bus(hbus->pci_bus);
		1780	hv_pci_assign_slots(hbus);
1745	pci_unlock_rescan_remove();	1781	pci_unlock_rescan_remove();
1746	break;	1782	break;
1747		1783
@@ -1858,6 +1894,9 @@ static void hv_eject_device_work(struct work_struct *work) · 110 unmodified lines
1858	list_del(&hpdev->list_entry);	1894	list_del(&hpdev->list_entry);
1859	spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);	1895	spin_unlock_irqrestore(&hpdev->hbus->device_list_lock, flags);
1860		1896
		1897	if (hpdev->pci_slot)
		1898	pci_destroy_slot(hpdev->pci_slot);
		1899
1861	memset(&ctxt, 0, sizeof(ctxt));	1900	memset(&ctxt, 0, sizeof(ctxt));
1862	ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;	1901	ejct_pkt = (struct pci_eject_response *)&ctxt.pkt.message;
1863	ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;	1902	ejct_pkt->message_type.type = PCI_EJECTION_COMPLETE;

drivers/pci/hotplug/acpiphp_glue.c+6−5

 /**
  * enable_slot - enable, configure a slot
  * @slot: slot to be enabled
+ * @bridge: true if enable is for the whole bridge (not a single slot)
  *
  * This function should be called per *physical slot*,
  * not per each slot object in ACPI namespace.
  */
-static void enable_slot(struct acpiphp_slot *slot)
+static void enable_slot(struct acpiphp_slot *slot, bool bridge)
 {
 	struct pci_dev *dev;
 	struct pci_bus *bus = slot->bus;
 	struct acpiphp_func *func;
-	if (bus->self && hotplug_is_native(bus->self)) {
+	if (bridge && bus->self && hotplug_is_native(bus->self)) {
 		/*
 		 * If native hotplug is used, it will take care of hotplug
 		 * slot management and resource allocation for hotplug
 					trim_stale_devices(dev);
 			/* configure all functions */
-			enable_slot(slot);
+			enable_slot(slot, true);
 		} else {
 			disable_slot(slot);
 		}
 		if (bridge)
 			acpiphp_check_bridge(bridge);
 		else if (!(slot->flags & SLOT_IS_GOING_AWAY))
-			enable_slot(slot);
+			enable_slot(slot, false);
 		break;
 	/* configure all functions */
 	if (!(slot->flags & SLOT_ENABLED))
-		enable_slot(slot);
+		enable_slot(slot, false);
 	pci_unlock_rescan_remove();
 	return 0;

drivers/pci/hotplug/pciehp_hpc.c+9−9

 	u16 slot_status;
 	int retval;
-	/* Clear sticky power-fault bit from previous power failures */
+	/* Clear power-fault bit from previous power failures */
 	pcie_capability_read_word(pdev, PCI_EXP_SLTSTA, &slot_status);
 	if (slot_status & PCI_EXP_SLTSTA_PFD)
 		pcie_capability_write_word(pdev, PCI_EXP_SLTSTA,
 		pciehp_handle_button_press(slot);
 	}
+	/* Check Power Fault Detected */
+	if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) {
+		ctrl->power_fault_detected = 1;
+		ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(slot));
+		pciehp_set_attention_status(slot, 1);
+		pciehp_green_led_off(slot);
+	}
 	/*
 	 * Disable requests have higher priority than Presence Detect Changed
 	 * or Data Link Layer State Changed events.
 		pciehp_handle_presence_or_link_change(slot, events);
 	up_read(&ctrl->reset_lock);
-	/* Check Power Fault Detected */
-	if ((events & PCI_EXP_SLTSTA_PFD) && !ctrl->power_fault_detected) {
-		ctrl->power_fault_detected = 1;
-		ctrl_err(ctrl, "Slot(%s): Power fault\n", slot_name(slot));
-		pciehp_set_attention_status(slot, 1);
-		pciehp_green_led_off(slot);
-	}
 	pci_config_pm_runtime_put(pdev);
 	wake_up(&ctrl->requester);
 	return IRQ_HANDLED;

drivers/pci/pci.c+2−1

 	return pci_dev_wait(dev, "bus reset", PCIE_RESET_READY_POLL_MS);
 }
+EXPORT_SYMBOL_GPL(pci_bridge_secondary_bus_reset);
 static int pci_parent_bus_reset(struct pci_dev *dev, int probe)
 {
  */
 int pci_reset_bus(struct pci_dev *pdev)
 {
-	return pci_probe_reset_slot(pdev->slot) ?
+	return (!pci_probe_reset_slot(pdev->slot)) ?
 	    __pci_reset_slot(pdev->slot) : __pci_reset_bus(pdev->bus);
 }
 EXPORT_SYMBOL_GPL(pci_reset_bus);

drivers/pci/probe.c+4−1

 {
 #ifdef CONFIG_PCI_PASID
 	struct pci_dev *bridge;
+	int pcie_type;
 	u32 cap;
 	if (!pci_is_pcie(dev))
 	if (!(cap & PCI_EXP_DEVCAP2_EE_PREFIX))
 		return;
-	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
+	pcie_type = pci_pcie_type(dev);
+	if (pcie_type == PCI_EXP_TYPE_ROOT_PORT ||
+	    pcie_type == PCI_EXP_TYPE_RC_END)
 		dev->eetlp_prefix_path = 1;
 	else {
 		bridge = pci_upstream_bridge(dev);

drivers/pci/quirks.c+0−6

  *
  * 0x9d10-0x9d1b PCI Express Root port #{1-12}
  *
- * The 300 series chipset suffers from the same bug so include those root
- * ports here as well.
- *
- * 0xa32c-0xa343 PCI Express Root port #{0-24}
- *
  * [1] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-2.html
  * [2] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-datasheet-vol-1.html
  * [3] http://www.intel.com/content/www/us/en/chipsets/100-series-chipset-spec-update.html
 	case 0xa110 ... 0xa11f: case 0xa167 ... 0xa16a: /* Sunrise Point */
 	case 0xa290 ... 0xa29f: case 0xa2e7 ... 0xa2ee: /* Union Point */
 	case 0x9d10 ... 0x9d1b: /* 7th & 8th Gen Mobile */
-	case 0xa32c ... 0xa343:				/* 300 series */
 		return true;
 	}

drivers/pci/switch/switchtec.c+4−0

 #include <linux/poll.h>
 #include <linux/wait.h>
+#include <linux/nospec.h>
 MODULE_DESCRIPTION("Microsemi Switchtec(tm) PCIe Management Driver");
 MODULE_VERSION("0.1");
 MODULE_LICENSE("GPL");
 	default:
 		if (p.port > ARRAY_SIZE(pcfg->dsp_pff_inst_id))
 			return -EINVAL;
+		p.port = array_index_nospec(p.port,
+					ARRAY_SIZE(pcfg->dsp_pff_inst_id) + 1);
 		p.pff = ioread32(&pcfg->dsp_pff_inst_id[p.port - 1]);
 		break;
 	}

drivers/pinctrl/cirrus/pinctrl-madera-core.c+1−1

@@ -1040,7 +1040,7 @@ static int madera_pin_probe(struct platform_device *pdev) · 1039 unmodified lines
1040	}	1040	}
1041		1041
1042	/* if the configuration is provided through pdata, apply it */	1042	/* if the configuration is provided through pdata, apply it */
1043	if (pdata) {	1043	if (pdata && pdata->gpio_configs) {
1044	ret = pinctrl_register_mappings(pdata->gpio_configs,	1044	ret = pinctrl_register_mappings(pdata->gpio_configs,
1045	pdata->n_gpio_configs);	1045	pdata->n_gpio_configs);
1046	if (ret) {	1046	if (ret) {

drivers/pinctrl/intel/pinctrl-cannonlake.c+21−14

 #include "pinctrl-intel.h"
-#define CNL_PAD_OWN	0x020
+#define CNL_PAD_OWN		0x020
-#define CNL_PADCFGLOCK	0x080
+#define CNL_PADCFGLOCK		0x080
-#define CNL_HOSTSW_OWN	0x0b0
+#define CNL_LP_HOSTSW_OWN	0x0b0
-#define CNL_GPI_IE	0x120
+#define CNL_H_HOSTSW_OWN	0x0c0
+#define CNL_GPI_IE		0x120
 #define CNL_GPP(r, s, e, g)				\
 	{						\
 #define CNL_NO_GPIO	-1
-#define CNL_COMMUNITY(b, s, e, g)			\
+#define CNL_COMMUNITY(b, s, e, o, g)			\
 	{						\
 		.barno = (b),				\
 		.padown_offset = CNL_PAD_OWN,		\
 		.padcfglock_offset = CNL_PADCFGLOCK,	\
-		.hostown_offset = CNL_HOSTSW_OWN,	\
+		.hostown_offset = (o),			\
 		.ie_offset = CNL_GPI_IE,		\
 		.pin_base = (s),			\
 		.npins = ((e) - (s) + 1),		\
 		.ngpps = ARRAY_SIZE(g),			\
 	}
+#define CNLLP_COMMUNITY(b, s, e, g)			\
+	CNL_COMMUNITY(b, s, e, CNL_LP_HOSTSW_OWN, g)
+#define CNLH_COMMUNITY(b, s, e, g)			\
+	CNL_COMMUNITY(b, s, e, CNL_H_HOSTSW_OWN, g)
 /* Cannon Lake-H */
 static const struct pinctrl_pin_desc cnlh_pins[] = {
 	/* GPP_A */
 static const struct intel_padgroup cnlh_community3_gpps[] = {
 	CNL_GPP(0, 155, 178, 192),		/* GPP_K */
 	CNL_GPP(1, 179, 202, 224),		/* GPP_H */
-	CNL_GPP(2, 203, 215, 258),		/* GPP_E */
+	CNL_GPP(2, 203, 215, 256),		/* GPP_E */
 	CNL_GPP(3, 216, 239, 288),		/* GPP_F */
 	CNL_GPP(4, 240, 248, CNL_NO_GPIO),	/* SPI */
 };
 };
 static const struct intel_community cnlh_communities[] = {
-	CNL_COMMUNITY(0, 0, 50, cnlh_community0_gpps),
+	CNLH_COMMUNITY(0, 0, 50, cnlh_community0_gpps),
-	CNL_COMMUNITY(1, 51, 154, cnlh_community1_gpps),
+	CNLH_COMMUNITY(1, 51, 154, cnlh_community1_gpps),
-	CNL_COMMUNITY(2, 155, 248, cnlh_community3_gpps),
+	CNLH_COMMUNITY(2, 155, 248, cnlh_community3_gpps),
-	CNL_COMMUNITY(3, 249, 298, cnlh_community4_gpps),
+	CNLH_COMMUNITY(3, 249, 298, cnlh_community4_gpps),
 };
 static const struct intel_pinctrl_soc_data cnlh_soc_data = {
 };
 static const struct intel_community cnllp_communities[] = {
-	CNL_COMMUNITY(0, 0, 67, cnllp_community0_gpps),
+	CNLLP_COMMUNITY(0, 0, 67, cnllp_community0_gpps),
-	CNL_COMMUNITY(1, 68, 180, cnllp_community1_gpps),
+	CNLLP_COMMUNITY(1, 68, 180, cnllp_community1_gpps),
-	CNL_COMMUNITY(2, 181, 243, cnllp_community4_gpps),
+	CNLLP_COMMUNITY(2, 181, 243, cnllp_community4_gpps),
 };
 static const struct intel_pinctrl_soc_data cnllp_soc_data = {

drivers/pinctrl/intel/pinctrl-intel.c+63−80

 	.owner = THIS_MODULE,
 };
+/**
+ * intel_gpio_to_pin() - Translate from GPIO offset to pin number
+ * @pctrl: Pinctrl structure
+ * @offset: GPIO offset from gpiolib
+ * @commmunity: Community is filled here if not %NULL
+ * @padgrp: Pad group is filled here if not %NULL
+ *
+ * When coming through gpiolib irqchip, the GPIO offset is not
+ * automatically translated to pinctrl pin number. This function can be
+ * used to find out the corresponding pinctrl pin.
+ */
+static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
+			     const struct intel_community **community,
+			     const struct intel_padgroup **padgrp)
+{
+	int i;
+	for (i = 0; i < pctrl->ncommunities; i++) {
+		const struct intel_community *comm = &pctrl->communities[i];
+		int j;
+		for (j = 0; j < comm->ngpps; j++) {
+			const struct intel_padgroup *pgrp = &comm->gpps[j];
+			if (pgrp->gpio_base < 0)
+				continue;
+			if (offset >= pgrp->gpio_base &&
+			    offset < pgrp->gpio_base + pgrp->size) {
+				int pin;
+				pin = pgrp->base + offset - pgrp->gpio_base;
+				if (community)
+					*community = comm;
+				if (padgrp)
+					*padgrp = pgrp;
+				return pin;
+			}
+		}
+	}
+	return -EINVAL;
+}
 static int intel_gpio_get(struct gpio_chip *chip, unsigned offset)
 {
 	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
 	void __iomem *reg;
 	u32 padcfg0;
+	int pin;
-	reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
 	if (!reg)
 		return -EINVAL;
 	unsigned long flags;
 	void __iomem *reg;
 	u32 padcfg0;
+	int pin;
-	reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return;
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
 	if (!reg)
 		return;
 	struct intel_pinctrl *pctrl = gpiochip_get_data(chip);
 	void __iomem *reg;
 	u32 padcfg0;
+	int pin;
-	reg = intel_get_padcfg(pctrl, offset, PADCFG0);
+	pin = intel_gpio_to_pin(pctrl, offset, NULL, NULL);
+	if (pin < 0)
+		return -EINVAL;
+	reg = intel_get_padcfg(pctrl, pin, PADCFG0);
 	if (!reg)
 		return -EINVAL;
 	.set_config = gpiochip_generic_config,
 };
-/**
- * intel_gpio_to_pin() - Translate from GPIO offset to pin number
- * @pctrl: Pinctrl structure
- * @offset: GPIO offset from gpiolib
- * @commmunity: Community is filled here if not %NULL
- * @padgrp: Pad group is filled here if not %NULL
- *
- * When coming through gpiolib irqchip, the GPIO offset is not
- * automatically translated to pinctrl pin number. This function can be
- * used to find out the corresponding pinctrl pin.
- */
-static int intel_gpio_to_pin(struct intel_pinctrl *pctrl, unsigned offset,
-			     const struct intel_community **community,
-			     const struct intel_padgroup **padgrp)
-{
-	int i;
-	for (i = 0; i < pctrl->ncommunities; i++) {
-		const struct intel_community *comm = &pctrl->communities[i];
-		int j;
-		for (j = 0; j < comm->ngpps; j++) {
-			const struct intel_padgroup *pgrp = &comm->gpps[j];
-			if (pgrp->gpio_base < 0)
-				continue;
-			if (offset >= pgrp->gpio_base &&
-			    offset < pgrp->gpio_base + pgrp->size) {
-				int pin;
-				pin = pgrp->base + offset - pgrp->gpio_base;
-				if (community)
-					*community = comm;
-				if (padgrp)
-					*padgrp = pgrp;
-				return pin;
-			}
-		}
-	}
-	return -EINVAL;
-}
-static int intel_gpio_irq_reqres(struct irq_data *d)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	int pin;
-	int ret;
-	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
-	if (pin >= 0) {
-		ret = gpiochip_lock_as_irq(gc, pin);
-		if (ret) {
-			dev_err(pctrl->dev, "unable to lock HW IRQ %d for IRQ\n",
-				pin);
-			return ret;
-		}
-	}
-	return 0;
-}
-static void intel_gpio_irq_relres(struct irq_data *d)
-{
-	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
-	struct intel_pinctrl *pctrl = gpiochip_get_data(gc);
-	int pin;
-	pin = intel_gpio_to_pin(pctrl, irqd_to_hwirq(d), NULL, NULL);
-	if (pin >= 0)
-		gpiochip_unlock_as_irq(gc, pin);
-}
 static void intel_gpio_irq_ack(struct irq_data *d)
 {
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 static struct irq_chip intel_gpio_irqchip = {
 	.name = "intel-gpio",
-	.irq_request_resources = intel_gpio_irq_reqres,
-	.irq_release_resources = intel_gpio_irq_relres,
 	.irq_enable = intel_gpio_irq_enable,
 	.irq_ack = intel_gpio_irq_ack,
 	.irq_mask = intel_gpio_irq_mask,

drivers/pinctrl/pinctrl-amd.c+23−10

 	unsigned long flags;
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
-	u32 mask = BIT(INTERRUPT_ENABLE_OFF) | BIT(INTERRUPT_MASK_OFF);
 	raw_spin_lock_irqsave(&gpio_dev->lock, flags);
 	pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
 	pin_reg |= BIT(INTERRUPT_ENABLE_OFF);
 	pin_reg |= BIT(INTERRUPT_MASK_OFF);
 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
-	/*
-	 * When debounce logic is enabled it takes ~900 us before interrupts
-	 * can be enabled.  During this "debounce warm up" period the
-	 * "INTERRUPT_ENABLE" bit will read as 0. Poll the bit here until it
-	 * reads back as 1, signaling that interrupts are now enabled.
-	 */
-	while ((readl(gpio_dev->base + (d->hwirq)*4) & mask) != mask)
-		continue;
 	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
 }
 static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 {
 	int ret = 0;
-	u32 pin_reg;
+	u32 pin_reg, pin_reg_irq_en, mask;
 	unsigned long flags, irq_flags;
 	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 	struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
 	}
 	pin_reg |= CLR_INTR_STAT << INTERRUPT_STS_OFF;
+	/*
+	 * If WAKE_INT_MASTER_REG.MaskStsEn is set, a software write to the
+	 * debounce registers of any GPIO will block wake/interrupt status
+	 * generation for *all* GPIOs for a lenght of time that depends on
+	 * WAKE_INT_MASTER_REG.MaskStsLength[11:0].  During this period the
+	 * INTERRUPT_ENABLE bit will read as 0.
+	 *
+	 * We temporarily enable irq for the GPIO whose configuration is
+	 * changing, and then wait for it to read back as 1 to know when
+	 * debounce has settled and then disable the irq again.
+	 * We do this polling with the spinlock held to ensure other GPIO
+	 * access routines do not read an incorrect value for the irq enable
+	 * bit of other GPIOs.  We keep the GPIO masked while polling to avoid
+	 * spurious irqs, and disable the irq again after polling.
+	 */
+	mask = BIT(INTERRUPT_ENABLE_OFF);
+	pin_reg_irq_en = pin_reg;
+	pin_reg_irq_en |= mask;
+	pin_reg_irq_en &= ~BIT(INTERRUPT_MASK_OFF);
+	writel(pin_reg_irq_en, gpio_dev->base + (d->hwirq)*4);
+	while ((readl(gpio_dev->base + (d->hwirq)*4) & mask) != mask)
+		continue;
 	writel(pin_reg, gpio_dev->base + (d->hwirq)*4);
 	raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);

drivers/pinctrl/pinctrl-ingenic.c+2−2

@@ -793,7 +793,7 @@ static int ingenic_pinctrl_probe(struct platform_device *pdev) · 792 unmodified lines
793		793
794	err = pinctrl_generic_add_group(jzpc->pctl, group->name,	794	err = pinctrl_generic_add_group(jzpc->pctl, group->name,
795	group->pins, group->num_pins, group->data);	795	group->pins, group->num_pins, group->data);
796	if (err) {	796	if (err < 0) {
797	dev_err(dev, "Failed to register group %s\n",	797	dev_err(dev, "Failed to register group %s\n",
798	group->name);	798	group->name);
799	return err;	799	return err;
@@ -806,7 +806,7 @@ static int ingenic_pinctrl_probe(struct platform_device *pdev) · 6 unmodified lines
806	err = pinmux_generic_add_function(jzpc->pctl, func->name,	806	err = pinmux_generic_add_function(jzpc->pctl, func->name,
807	func->group_names, func->num_group_names,	807	func->group_names, func->num_group_names,
808	func->data);	808	func->data);
809	if (err) {	809	if (err < 0) {
810	dev_err(dev, "Failed to register function %s\n",	810	dev_err(dev, "Failed to register function %s\n",
811	func->name);	811	func->name);
812	return err;	812	return err;

drivers/pinctrl/qcom/pinctrl-msm.c+24−0

@@ -634,6 +634,29 @@ static void msm_gpio_irq_mask(struct irq_data *d) · 633 unmodified lines
634	raw_spin_lock_irqsave(&pctrl->lock, flags);	634	raw_spin_lock_irqsave(&pctrl->lock, flags);
635		635
636	val = readl(pctrl->regs + g->intr_cfg_reg);	636	val = readl(pctrl->regs + g->intr_cfg_reg);
		637	/*
		638	* There are two bits that control interrupt forwarding to the CPU. The
		639	* RAW_STATUS_EN bit causes the level or edge sensed on the line to be
		640	* latched into the interrupt status register when the hardware detects
		641	* an irq that it's configured for (either edge for edge type or level
		642	* for level type irq). The 'non-raw' status enable bit causes the
		643	* hardware to assert the summary interrupt to the CPU if the latched
		644	* status bit is set. There's a bug though, the edge detection logic
		645	* seems to have a problem where toggling the RAW_STATUS_EN bit may
		646	* cause the status bit to latch spuriously when there isn't any edge
		647	* so we can't touch that bit for edge type irqs and we have to keep
		648	* the bit set anyway so that edges are latched while the line is masked.
		649	*
		650	* To make matters more complicated, leaving the RAW_STATUS_EN bit
		651	* enabled all the time causes level interrupts to re-latch into the
		652	* status register because the level is still present on the line after
		653	* we ack it. We clear the raw status enable bit during mask here and
		654	* set the bit on unmask so the interrupt can't latch into the hardware
		655	* while it's masked.
		656	*/
		657	if (irqd_get_trigger_type(d) & IRQ_TYPE_LEVEL_MASK)
		658	val &= ~BIT(g->intr_raw_status_bit);
		659
637	val &= ~BIT(g->intr_enable_bit);	660	val &= ~BIT(g->intr_enable_bit);
638	writel(val, pctrl->regs + g->intr_cfg_reg);	661	writel(val, pctrl->regs + g->intr_cfg_reg);
639		662
@@ -655,6 +678,7 @@ static void msm_gpio_irq_unmask(struct irq_data *d) · 15 unmodified lines
655	raw_spin_lock_irqsave(&pctrl->lock, flags);	678	raw_spin_lock_irqsave(&pctrl->lock, flags);
656		679
657	val = readl(pctrl->regs + g->intr_cfg_reg);	680	val = readl(pctrl->regs + g->intr_cfg_reg);
		681	val \|= BIT(g->intr_raw_status_bit);
658	val \|= BIT(g->intr_enable_bit);	682	val \|= BIT(g->intr_enable_bit);
659	writel(val, pctrl->regs + g->intr_cfg_reg);	683	writel(val, pctrl->regs + g->intr_cfg_reg);
660		684

drivers/platform/x86/alienware-wmi.c+1−0

@@ -536,6 +536,7 @@ static acpi_status alienware_wmax_command(struct wmax_basic_args *in_args, · 535 unmodified lines
536	if (obj && obj->type == ACPI_TYPE_INTEGER)	536	if (obj && obj->type == ACPI_TYPE_INTEGER)
537	*out_data = (u32) obj->integer.value;	537	*out_data = (u32) obj->integer.value;
538	}	538	}
		539	kfree(output.pointer);
539	return status;	540	return status;
540		541
541	}	542	}

drivers/platform/x86/dell-smbios-wmi.c+1−0

@@ -78,6 +78,7 @@ static int run_smbios_call(struct wmi_device *wdev) · 77 unmodified lines
78	dev_dbg(&wdev->dev, "result: [%08x,%08x,%08x,%08x]\n",	78	dev_dbg(&wdev->dev, "result: [%08x,%08x,%08x,%08x]\n",
79	priv->buf->std.output[0], priv->buf->std.output[1],	79	priv->buf->std.output[0], priv->buf->std.output[1],
80	priv->buf->std.output[2], priv->buf->std.output[3]);	80	priv->buf->std.output[2], priv->buf->std.output[3]);
		81	kfree(output.pointer);
81		82
82	return 0;	83	return 0;
83	}	84	}

drivers/regulator/bd71837-regulator.c+19−0

@@ -569,6 +569,25 @@ static int bd71837_probe(struct platform_device *pdev) · 568 unmodified lines
569	BD71837_REG_REGLOCK);	569	BD71837_REG_REGLOCK);
570	}	570	}
571		571
		572	/*
		573	* There is a HW quirk in BD71837. The shutdown sequence timings for
		574	* bucks/LDOs which are controlled via register interface are changed.
		575	* At PMIC poweroff the voltage for BUCK6/7 is cut immediately at the
		576	* beginning of shut-down sequence. As bucks 6 and 7 are parent
		577	* supplies for LDO5 and LDO6 - this causes LDO5/6 voltage
		578	* monitoring to errorneously detect under voltage and force PMIC to
		579	* emergency state instead of poweroff. In order to avoid this we
		580	* disable voltage monitoring for LDO5 and LDO6
		581	*/
		582	err = regmap_update_bits(pmic->mfd->regmap, BD718XX_REG_MVRFLTMASK2,
		583	BD718XX_LDO5_VRMON80 \| BD718XX_LDO6_VRMON80,
		584	BD718XX_LDO5_VRMON80 \| BD718XX_LDO6_VRMON80);
		585	if (err) {
		586	dev_err(&pmic->pdev->dev,
		587	"Failed to disable voltage monitoring\n");
		588	goto err;
		589	}
		590
572	for (i = 0; i < ARRAY_SIZE(pmic_regulator_inits); i++) {	591	for (i = 0; i < ARRAY_SIZE(pmic_regulator_inits); i++) {
573		592
574	struct regulator_desc *desc;	593	struct regulator_desc *desc;

drivers/regulator/core.c+2−2

 	if (!rstate->changeable)
 		return -EPERM;
-	rstate->enabled = en;
+	rstate->enabled = (en) ? ENABLE_IN_SUSPEND : DISABLE_IN_SUSPEND;
 	return 0;
 }
 	    !rdev->desc->fixed_uV)
 		rdev->is_switch = true;
+	dev_set_drvdata(&rdev->dev, rdev);
 	ret = device_register(&rdev->dev);
 	if (ret != 0) {
 		put_device(&rdev->dev);
 		goto unset_supplies;
 	}
-	dev_set_drvdata(&rdev->dev, rdev);
 	rdev_init_debugfs(rdev);
 	/* try to resolve regulators supply since a new one was registered */

drivers/regulator/of_regulator.c+0−2

@@ -213,8 +213,6 @@ static void of_get_regulation_constraints(struct device_node *np, · 212 unmodified lines
213	else if (of_property_read_bool(suspend_np,	213	else if (of_property_read_bool(suspend_np,
214	"regulator-off-in-suspend"))	214	"regulator-off-in-suspend"))
215	suspend_state->enabled = DISABLE_IN_SUSPEND;	215	suspend_state->enabled = DISABLE_IN_SUSPEND;
216	else
217	suspend_state->enabled = DO_NOTHING_IN_SUSPEND;
218		216
219	if (!of_property_read_u32(np, "regulator-suspend-min-microvolt",	217	if (!of_property_read_u32(np, "regulator-suspend-min-microvolt",
220	&pval))	218	&pval))

drivers/s390/crypto/ap_bus.c+33−53

@@ -872,8 +872,6 @@ static int hex2bitmap(const char str, unsigned long bitmap, int bits) · 871 unmodified lines
872	if (bits & 0x07)	872	if (bits & 0x07)
873	return -EINVAL;	873	return -EINVAL;
874		874
875	memset(bitmap, 0, bits / 8);
876
877	if (str[0] == '0' && str[1] == 'x')	875	if (str[0] == '0' && str[1] == 'x')
878	str++;	876	str++;
879	if (*str == 'x')	877	if (*str == 'x')
@@ -895,25 +893,23 @@ static int hex2bitmap(const char str, unsigned long bitmap, int bits) · 15 unmodified lines
895	}	893	}
896		894
897	/*	895	/*
898	* str2clrsetmasks() - parse bitmask argument and set the clear and	896	* modify_bitmap() - parse bitmask argument and modify an existing
899	* the set bitmap mask. A concatenation (done with ',') of these terms	897	* bit mask accordingly. A concatenation (done with ',') of these
900	* is recognized:	898	* terms is recognized:
901	* +<bitnr>[-<bitnr>] or -<bitnr>[-<bitnr>]	899	* +<bitnr>[-<bitnr>] or -<bitnr>[-<bitnr>]
902	* <bitnr> may be any valid number (hex, decimal or octal) in the range	900	* <bitnr> may be any valid number (hex, decimal or octal) in the range
903	* 0...bits-1; the leading + or - is required. Here are some examples:	901	* 0...bits-1; the leading + or - is required. Here are some examples:
904	* +0-15,+32,-128,-0xFF	902	* +0-15,+32,-128,-0xFF
905	* -0-255,+1-16,+0x128	903	* -0-255,+1-16,+0x128
906	* +1,+2,+3,+4,-5,-7-10	904	* +1,+2,+3,+4,-5,-7-10
907	* Returns a clear and a set bitmask. Every positive value in the string	905	* Returns the new bitmap after all changes have been applied. Every
908	* results in a bit set in the set mask and every negative value in the	906	* positive value in the string will set a bit and every negative value
909	* string results in a bit SET in the clear mask. As a bit may be touched	907	* in the string will clear a bit. As a bit may be touched more than once,
910	* more than once, the last 'operation' wins: +0-255,-128 = all but bit	908	* the last 'operation' wins:
911	* 128 set in the set mask, only bit 128 set in the clear mask.	909	* +0-255,-128 = first bits 0-255 will be set, then bit 128 will be
		910	* cleared again. All other bits are unmodified.
912	*/	911	*/
913	static int str2clrsetmasks(const char *str,	912	static int modify_bitmap(const char str, unsigned long bitmap, int bits)
914	unsigned long *clrmap,
915	unsigned long *setmap,
916	int bits)
917	{	913	{
918	int a, i, z;	914	int a, i, z;
919	char *np, sign;	915	char *np, sign;
@@ -922,9 +918,6 @@ static int str2clrsetmasks(const char *str, · 2 unmodified lines
922	if (bits & 0x07)	918	if (bits & 0x07)
923	return -EINVAL;	919	return -EINVAL;
924		920
925	memset(clrmap, 0, bits / 8);
926	memset(setmap, 0, bits / 8);
927
928	while (*str) {	921	while (*str) {
929	sign = *str++;	922	sign = *str++;
930	if (sign != '+' && sign != '-')	923	if (sign != '+' && sign != '-')
@@ -940,13 +933,10 @@ static int str2clrsetmasks(const char *str, · 9 unmodified lines
940	str = np;	933	str = np;
941	}	934	}
942	for (i = a; i <= z; i++)	935	for (i = a; i <= z; i++)
943	if (sign == '+') {	936	if (sign == '+')
944	set_bit_inv(i, setmap);	937	set_bit_inv(i, bitmap);
945	clear_bit_inv(i, clrmap);	938	else
946	} else {	939	clear_bit_inv(i, bitmap);
947	clear_bit_inv(i, setmap);
948	set_bit_inv(i, clrmap);
949	}
950	while (str == ',' \|\| str == '\n')	940	while (str == ',' \|\| str == '\n')
951	str++;	941	str++;
952	}	942	}
@@ -970,44 +960,34 @@ static int process_mask_arg(const char *str, · 17 unmodified lines
970	unsigned long *bitmap, int bits,	960	unsigned long *bitmap, int bits,
971	struct mutex *lock)	961	struct mutex *lock)
972	{	962	{
973	int i;	963	unsigned long *newmap, size;
		964	int rc;
974		965
975	/* bits needs to be a multiple of 8 */	966	/* bits needs to be a multiple of 8 */
976	if (bits & 0x07)	967	if (bits & 0x07)
977	return -EINVAL;	968	return -EINVAL;
978		969
		970	size = BITS_TO_LONGS(bits)*sizeof(unsigned long);
		971	newmap = kmalloc(size, GFP_KERNEL);
		972	if (!newmap)
		973	return -ENOMEM;
		974	if (mutex_lock_interruptible(lock)) {
		975	kfree(newmap);
		976	return -ERESTARTSYS;
		977	}
		978
979	if (str == '+' \|\| str == '-') {	979	if (str == '+' \|\| str == '-') {
980	DECLARE_BITMAP(clrm, bits);	980	memcpy(newmap, bitmap, size);
981	DECLARE_BITMAP(setm, bits);	981	rc = modify_bitmap(str, newmap, bits);
982
983	i = str2clrsetmasks(str, clrm, setm, bits);
984	if (i)
985	return i;
986	if (mutex_lock_interruptible(lock))
987	return -ERESTARTSYS;
988	for (i = 0; i < bits; i++) {
989	if (test_bit_inv(i, clrm))
990	clear_bit_inv(i, bitmap);
991	if (test_bit_inv(i, setm))
992	set_bit_inv(i, bitmap);
993	}
994	} else {	982	} else {
995	DECLARE_BITMAP(setm, bits);	983	memset(newmap, 0, size);
996		984	rc = hex2bitmap(str, newmap, bits);
997	i = hex2bitmap(str, setm, bits);
998	if (i)
999	return i;
1000	if (mutex_lock_interruptible(lock))
1001	return -ERESTARTSYS;
1002	for (i = 0; i < bits; i++)
1003	if (test_bit_inv(i, setm))
1004	set_bit_inv(i, bitmap);
1005	else
1006	clear_bit_inv(i, bitmap);
1007	}	985	}
		986	if (rc == 0)
		987	memcpy(bitmap, newmap, size);
1008	mutex_unlock(lock);	988	mutex_unlock(lock);
1009		989	kfree(newmap);
1010	return 0;	990	return rc;
1011	}	991	}
1012		992
1013	/*	993	/*

drivers/s390/net/qeth_core_main.c+8−3

 #include <linux/netdevice.h>
 #include <linux/netdev_features.h>
 #include <linux/skbuff.h>
+#include <linux/vmalloc.h>
 #include <net/iucv/af_iucv.h>
 #include <net/dsfield.h>
 	priv.buffer_len = oat_data.buffer_len;
 	priv.response_len = 0;
-	priv.buffer =  kzalloc(oat_data.buffer_len, GFP_KERNEL);
+	priv.buffer = vzalloc(oat_data.buffer_len);
 	if (!priv.buffer) {
 		rc = -ENOMEM;
 		goto out;
 			rc = -EFAULT;
 out_free:
-	kfree(priv.buffer);
+	vfree(priv.buffer);
 out:
 	return rc;
 }
 		dev->priv_flags &= ~IFF_TX_SKB_SHARING;
 		dev->hw_features |= NETIF_F_SG;
 		dev->vlan_features |= NETIF_F_SG;
+		if (IS_IQD(card))
+			dev->features |= NETIF_F_SG;
 	}
 	return dev;
 	qeth_update_from_chp_desc(card);
 	card->dev = qeth_alloc_netdev(card);
-	if (!card->dev)
+	if (!card->dev) {
+		rc = -ENOMEM;
 		goto err_card;
+	}
 	qeth_determine_capabilities(card);
 	enforced_disc = qeth_enforce_discipline(card);

drivers/s390/net/qeth_l2_main.c+1−1

@@ -423,7 +423,7 @@ static int qeth_l2_process_inbound_buffer(struct qeth_card *card, · 422 unmodified lines
423	default:	423	default:
424	dev_kfree_skb_any(skb);	424	dev_kfree_skb_any(skb);
425	QETH_CARD_TEXT(card, 3, "inbunkno");	425	QETH_CARD_TEXT(card, 3, "inbunkno");
426	QETH_DBF_HEX(CTRL, 3, hdr, QETH_DBF_CTRL_LEN);	426	QETH_DBF_HEX(CTRL, 3, hdr, sizeof(*hdr));
427	continue;	427	continue;
428	}	428	}
429	work_done++;	429	work_done++;

drivers/s390/net/qeth_l3_main.c+1−1

@@ -1390,7 +1390,7 @@ static int qeth_l3_process_inbound_buffer(struct qeth_card *card, · 1389 unmodified lines
1390	default:	1390	default:
1391	dev_kfree_skb_any(skb);	1391	dev_kfree_skb_any(skb);
1392	QETH_CARD_TEXT(card, 3, "inbunkno");	1392	QETH_CARD_TEXT(card, 3, "inbunkno");
1393	QETH_DBF_HEX(CTRL, 3, hdr, QETH_DBF_CTRL_LEN);	1393	QETH_DBF_HEX(CTRL, 3, hdr, sizeof(*hdr));
1394	continue;	1394	continue;
1395	}	1395	}
1396	work_done++;	1396	work_done++;

drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c+2−3

 		vscsi->dds.window[LOCAL].liobn,
 		vscsi->dds.window[REMOTE].liobn);
-	strcpy(vscsi->eye, "VSCSI ");
+	snprintf(vscsi->eye, sizeof(vscsi->eye), "VSCSI %s", vdev->name);
-	strncat(vscsi->eye, vdev->name, MAX_EYE);
 	vscsi->dds.unit_id = vdev->unit_address;
-	strncpy(vscsi->dds.partition_name, partition_name,
+	strscpy(vscsi->dds.partition_name, partition_name,
 		sizeof(vscsi->dds.partition_name));
 	vscsi->dds.partition_num = partition_number;

drivers/scsi/ipr.c+61−45

 	LEAVE;
 }
+static void ipr_add_remove_thread(struct work_struct *work)
+{
+	unsigned long lock_flags;
+	struct ipr_resource_entry *res;
+	struct scsi_device *sdev;
+	struct ipr_ioa_cfg *ioa_cfg =
+		container_of(work, struct ipr_ioa_cfg, scsi_add_work_q);
+	u8 bus, target, lun;
+	int did_work;
+	ENTER;
+	spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+restart:
+	do {
+		did_work = 0;
+		if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
+			spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
+			return;
+		}
+		list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
+			if (res->del_from_ml && res->sdev) {
+				did_work = 1;
+				sdev = res->sdev;
+				if (!scsi_device_get(sdev)) {
+					if (!res->add_to_ml)
+						list_move_tail(&res->queue, &ioa_cfg->free_res_q);
+					else
+						res->del_from_ml = 0;
+					spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
+					scsi_remove_device(sdev);
+					scsi_device_put(sdev);
+					spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+				}
+				break;
+			}
+		}
+	} while (did_work);
+	list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
+		if (res->add_to_ml) {
+			bus = res->bus;
+			target = res->target;
+			lun = res->lun;
+			res->add_to_ml = 0;
+			spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
+			scsi_add_device(ioa_cfg->host, bus, target, lun);
+			spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
+			goto restart;
+		}
+	}
+	ioa_cfg->scan_done = 1;
+	spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
+	kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
+	LEAVE;
+}
 /**
  * ipr_worker_thread - Worker thread
  * @work:		ioa config struct
 static void ipr_worker_thread(struct work_struct *work)
 {
 	unsigned long lock_flags;
-	struct ipr_resource_entry *res;
-	struct scsi_device *sdev;
 	struct ipr_dump *dump;
 	struct ipr_ioa_cfg *ioa_cfg =
 		container_of(work, struct ipr_ioa_cfg, work_q);
-	u8 bus, target, lun;
-	int did_work;
 	ENTER;
 	spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
 		return;
 	}
-restart:
+	schedule_work(&ioa_cfg->scsi_add_work_q);
-	do {
-		did_work = 0;
-		if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
-			spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
-			return;
-		}
-		list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
-			if (res->del_from_ml && res->sdev) {
-				did_work = 1;
-				sdev = res->sdev;
-				if (!scsi_device_get(sdev)) {
-					if (!res->add_to_ml)
-						list_move_tail(&res->queue, &ioa_cfg->free_res_q);
-					else
-						res->del_from_ml = 0;
-					spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
-					scsi_remove_device(sdev);
-					scsi_device_put(sdev);
-					spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
-				}
-				break;
-			}
-		}
-	} while (did_work);
-	list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
-		if (res->add_to_ml) {
-			bus = res->bus;
-			target = res->target;
-			lun = res->lun;
-			res->add_to_ml = 0;
-			spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
-			scsi_add_device(ioa_cfg->host, bus, target, lun);
-			spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
-			goto restart;
-		}
-	}
-	ioa_cfg->scan_done = 1;
 	spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
-	kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
 	LEAVE;
 }
 	INIT_LIST_HEAD(&ioa_cfg->free_res_q);
 	INIT_LIST_HEAD(&ioa_cfg->used_res_q);
 	INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
+	INIT_WORK(&ioa_cfg->scsi_add_work_q, ipr_add_remove_thread);
 	init_waitqueue_head(&ioa_cfg->reset_wait_q);
 	init_waitqueue_head(&ioa_cfg->msi_wait_q);
 	init_waitqueue_head(&ioa_cfg->eeh_wait_q);

drivers/scsi/ipr.h+1−0

@@ -1575,6 +1575,7 @@ struct ipr_ioa_cfg { · 1574 unmodified lines
1575	u8 saved_mode_page_len;	1575	u8 saved_mode_page_len;
1576		1576
1577	struct work_struct work_q;	1577	struct work_struct work_q;
		1578	struct work_struct scsi_add_work_q;
1578	struct workqueue_struct *reset_work_q;	1579	struct workqueue_struct *reset_work_q;
1579		1580
1580	wait_queue_head_t reset_wait_q;	1581	wait_queue_head_t reset_wait_q;

drivers/scsi/lpfc/lpfc_attr.c+10−5

@@ -360,12 +360,12 @@ lpfc_nvme_info_show(struct device dev, struct device_attribute attr, · 359 unmodified lines
360	goto buffer_done;	360	goto buffer_done;
361		361
362	list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) {	362	list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) {
		363	nrport = NULL;
		364	spin_lock(&vport->phba->hbalock);
363	rport = lpfc_ndlp_get_nrport(ndlp);	365	rport = lpfc_ndlp_get_nrport(ndlp);
364	if (!rport)	366	if (rport)
365	continue;	367	nrport = rport->remoteport;
366		368	spin_unlock(&vport->phba->hbalock);
367	/* local short-hand pointer. */
368	nrport = rport->remoteport;
369	if (!nrport)	369	if (!nrport)
370	continue;	370	continue;
371		371
@@ -3386,6 +3386,7 @@ lpfc_update_rport_devloss_tmo(struct lpfc_vport *vport) · 3014 unmodified lines
3386	struct lpfc_nodelist *ndlp;	3386	struct lpfc_nodelist *ndlp;
3387	#if (IS_ENABLED(CONFIG_NVME_FC))	3387	#if (IS_ENABLED(CONFIG_NVME_FC))
3388	struct lpfc_nvme_rport *rport;	3388	struct lpfc_nvme_rport *rport;
		3389	struct nvme_fc_remote_port *remoteport = NULL;
3389	#endif	3390	#endif
3390		3391
3391	shost = lpfc_shost_from_vport(vport);	3392	shost = lpfc_shost_from_vport(vport);
@@ -3396,8 +3397,12 @@ lpfc_update_rport_devloss_tmo(struct lpfc_vport *vport) · 4 unmodified lines
3396	if (ndlp->rport)	3397	if (ndlp->rport)
3397	ndlp->rport->dev_loss_tmo = vport->cfg_devloss_tmo;	3398	ndlp->rport->dev_loss_tmo = vport->cfg_devloss_tmo;
3398	#if (IS_ENABLED(CONFIG_NVME_FC))	3399	#if (IS_ENABLED(CONFIG_NVME_FC))
		3400	spin_lock(&vport->phba->hbalock);
3399	rport = lpfc_ndlp_get_nrport(ndlp);	3401	rport = lpfc_ndlp_get_nrport(ndlp);
3400	if (rport)	3402	if (rport)
		3403	remoteport = rport->remoteport;
		3404	spin_unlock(&vport->phba->hbalock);
		3405	if (remoteport)
3401	nvme_fc_set_remoteport_devloss(rport->remoteport,	3406	nvme_fc_set_remoteport_devloss(rport->remoteport,
3402	vport->cfg_devloss_tmo);	3407	vport->cfg_devloss_tmo);
3403	#endif	3408	#endif

drivers/scsi/lpfc/lpfc_debugfs.c+5−5

@@ -551,7 +551,7 @@ lpfc_debugfs_nodelist_data(struct lpfc_vport vport, char buf, int size) · 550 unmodified lines
551	unsigned char *statep;	551	unsigned char *statep;
552	struct nvme_fc_local_port *localport;	552	struct nvme_fc_local_port *localport;
553	struct lpfc_nvmet_tgtport *tgtp;	553	struct lpfc_nvmet_tgtport *tgtp;
554	struct nvme_fc_remote_port *nrport;	554	struct nvme_fc_remote_port *nrport = NULL;
555	struct lpfc_nvme_rport *rport;	555	struct lpfc_nvme_rport *rport;
556		556
557	cnt = (LPFC_NODELIST_SIZE / LPFC_NODELIST_ENTRY_SIZE);	557	cnt = (LPFC_NODELIST_SIZE / LPFC_NODELIST_ENTRY_SIZE);
@@ -696,11 +696,11 @@ lpfc_debugfs_nodelist_data(struct lpfc_vport vport, char buf, int size) · 138 unmodified lines
696	len += snprintf(buf + len, size - len, "\tRport List:\n");	696	len += snprintf(buf + len, size - len, "\tRport List:\n");
697	list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) {	697	list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) {
698	/* local short-hand pointer. */	698	/* local short-hand pointer. */
		699	spin_lock(&phba->hbalock);
699	rport = lpfc_ndlp_get_nrport(ndlp);	700	rport = lpfc_ndlp_get_nrport(ndlp);
700	if (!rport)	701	if (rport)
701	continue;	702	nrport = rport->remoteport;
702		703	spin_unlock(&phba->hbalock);
703	nrport = rport->remoteport;
704	if (!nrport)	704	if (!nrport)
705	continue;	705	continue;
706		706

drivers/scsi/lpfc/lpfc_nvme.c+8−3

 	rpinfo.port_name = wwn_to_u64(ndlp->nlp_portname.u.wwn);
 	rpinfo.node_name = wwn_to_u64(ndlp->nlp_nodename.u.wwn);
+	spin_lock_irq(&vport->phba->hbalock);
 	oldrport = lpfc_ndlp_get_nrport(ndlp);
+	spin_unlock_irq(&vport->phba->hbalock);
 	if (!oldrport)
 		lpfc_nlp_get(ndlp);
 	struct nvme_fc_local_port *localport;
 	struct lpfc_nvme_lport *lport;
 	struct lpfc_nvme_rport *rport;
-	struct nvme_fc_remote_port *remoteport;
+	struct nvme_fc_remote_port *remoteport = NULL;
 	localport = vport->localport;
 	if (!lport)
 		goto input_err;
+	spin_lock_irq(&vport->phba->hbalock);
 	rport = lpfc_ndlp_get_nrport(ndlp);
-	if (!rport)
+	if (rport)
+		remoteport = rport->remoteport;
+	spin_unlock_irq(&vport->phba->hbalock);
+	if (!remoteport)
 		goto input_err;
-	remoteport = rport->remoteport;
 	lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC,
 			 "6033 Unreg nvme remoteport %p, portname x%llx, "
 			 "port_id x%06x, portstate x%x port type x%x\n",

drivers/scsi/qedi/qedi.h+6−1

 	QEDI_NVM_TGT_SEC,
 };
+struct qedi_nvm_iscsi_image {
+	struct nvm_iscsi_cfg iscsi_cfg;
+	u32 crc;
+};
 struct qedi_uio_ctrl {
 	/* meta data */
 	u32 uio_hsi_version;
 	void *bdq_pbl_list;
 	dma_addr_t bdq_pbl_list_dma;
 	u8 bdq_pbl_list_num_entries;
-	struct nvm_iscsi_cfg *iscsi_cfg;
+	struct qedi_nvm_iscsi_image *iscsi_image;
 	dma_addr_t nvm_buf_dma;
 	void __iomem *bdq_primary_prod;
 	void __iomem *bdq_secondary_prod;

drivers/scsi/qedi/qedi_main.c+15−13

@@ -1346,23 +1346,26 @@ exit_setup_int: · 1345 unmodified lines
1346		1346
1347	static void qedi_free_nvm_iscsi_cfg(struct qedi_ctx *qedi)	1347	static void qedi_free_nvm_iscsi_cfg(struct qedi_ctx *qedi)
1348	{	1348	{
1349	if (qedi->iscsi_cfg)	1349	if (qedi->iscsi_image)
1350	dma_free_coherent(&qedi->pdev->dev,	1350	dma_free_coherent(&qedi->pdev->dev,
1351	sizeof(struct nvm_iscsi_cfg),	1351	sizeof(struct qedi_nvm_iscsi_image),
1352	qedi->iscsi_cfg, qedi->nvm_buf_dma);	1352	qedi->iscsi_image, qedi->nvm_buf_dma);
1353	}	1353	}
1354		1354
1355	static int qedi_alloc_nvm_iscsi_cfg(struct qedi_ctx *qedi)	1355	static int qedi_alloc_nvm_iscsi_cfg(struct qedi_ctx *qedi)
1356	{	1356	{
1357	qedi->iscsi_cfg = dma_zalloc_coherent(&qedi->pdev->dev,	1357	struct qedi_nvm_iscsi_image nvm_image;
1358	sizeof(struct nvm_iscsi_cfg),	1358
1359	&qedi->nvm_buf_dma, GFP_KERNEL);	1359	qedi->iscsi_image = dma_zalloc_coherent(&qedi->pdev->dev,
1360	if (!qedi->iscsi_cfg) {	1360	sizeof(nvm_image),
		1361	&qedi->nvm_buf_dma,
		1362	GFP_KERNEL);
		1363	if (!qedi->iscsi_image) {
1361	QEDI_ERR(&qedi->dbg_ctx, "Could not allocate NVM BUF.\n");	1364	QEDI_ERR(&qedi->dbg_ctx, "Could not allocate NVM BUF.\n");
1362	return -ENOMEM;	1365	return -ENOMEM;
1363	}	1366	}
1364	QEDI_INFO(&qedi->dbg_ctx, QEDI_LOG_INFO,	1367	QEDI_INFO(&qedi->dbg_ctx, QEDI_LOG_INFO,
1365	"NVM BUF addr=0x%p dma=0x%llx.\n", qedi->iscsi_cfg,	1368	"NVM BUF addr=0x%p dma=0x%llx.\n", qedi->iscsi_image,
1366	qedi->nvm_buf_dma);	1369	qedi->nvm_buf_dma);
1367		1370
1368	return 0;	1371	return 0;
@@ -1905,7 +1908,7 @@ qedi_get_nvram_block(struct qedi_ctx *qedi) · 536 unmodified lines
1905	struct nvm_iscsi_block *block;	1908	struct nvm_iscsi_block *block;
1906		1909
1907	pf = qedi->dev_info.common.abs_pf_id;	1910	pf = qedi->dev_info.common.abs_pf_id;
1908	block = &qedi->iscsi_cfg->block[0];	1911	block = &qedi->iscsi_image->iscsi_cfg.block[0];
1909	for (i = 0; i < NUM_OF_ISCSI_PF_SUPPORTED; i++, block++) {	1912	for (i = 0; i < NUM_OF_ISCSI_PF_SUPPORTED; i++, block++) {
1910	flags = ((block->id) & NVM_ISCSI_CFG_BLK_CTRL_FLAG_MASK) >>	1913	flags = ((block->id) & NVM_ISCSI_CFG_BLK_CTRL_FLAG_MASK) >>
1911	NVM_ISCSI_CFG_BLK_CTRL_FLAG_OFFSET;	1914	NVM_ISCSI_CFG_BLK_CTRL_FLAG_OFFSET;
@@ -2194,15 +2197,14 @@ static void qedi_boot_release(void *data) · 282 unmodified lines
2194	static int qedi_get_boot_info(struct qedi_ctx *qedi)	2197	static int qedi_get_boot_info(struct qedi_ctx *qedi)
2195	{	2198	{
2196	int ret = 1;	2199	int ret = 1;
2197	u16 len;	2200	struct qedi_nvm_iscsi_image nvm_image;
2198
2199	len = sizeof(struct nvm_iscsi_cfg);
2200		2201
2201	QEDI_INFO(&qedi->dbg_ctx, QEDI_LOG_INFO,	2202	QEDI_INFO(&qedi->dbg_ctx, QEDI_LOG_INFO,
2202	"Get NVM iSCSI CFG image\n");	2203	"Get NVM iSCSI CFG image\n");
2203	ret = qedi_ops->common->nvm_get_image(qedi->cdev,	2204	ret = qedi_ops->common->nvm_get_image(qedi->cdev,
2204	QED_NVM_IMAGE_ISCSI_CFG,	2205	QED_NVM_IMAGE_ISCSI_CFG,
2205	(char *)qedi->iscsi_cfg, len);	2206	(char *)qedi->iscsi_image,
		2207	sizeof(nvm_image));
2206	if (ret)	2208	if (ret)
2207	QEDI_ERR(&qedi->dbg_ctx,	2209	QEDI_ERR(&qedi->dbg_ctx,
2208	"Could not get NVM image. ret = %d\n", ret);	2210	"Could not get NVM image. ret = %d\n", ret);

drivers/scsi/qla2xxx/qla_target.h+2−2

@@ -374,8 +374,8 @@ struct atio_from_isp { · 373 unmodified lines
374	static inline int fcpcmd_is_corrupted(struct atio *atio)	374	static inline int fcpcmd_is_corrupted(struct atio *atio)
375	{	375	{
376	if (atio->entry_type == ATIO_TYPE7 &&	376	if (atio->entry_type == ATIO_TYPE7 &&
377	(le16_to_cpu(atio->attr_n_length & FCP_CMD_LENGTH_MASK) <	377	((le16_to_cpu(atio->attr_n_length) & FCP_CMD_LENGTH_MASK) <
378	FCP_CMD_LENGTH_MIN))	378	FCP_CMD_LENGTH_MIN))
379	return 1;	379	return 1;
380	else	380	else
381	return 0;	381	return 0;

drivers/scsi/sd.c+5−1

 	case REQ_OP_ZONE_RESET:
 		return sd_zbc_setup_reset_cmnd(cmd);
 	default:
-		BUG();
+		WARN_ON_ONCE(1);
+		return BLKPREP_KILL;
 	}
 }
 	if (rot == 1) {
 		blk_queue_flag_set(QUEUE_FLAG_NONROT, q);
 		blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, q);
+	} else {
+		blk_queue_flag_clear(QUEUE_FLAG_NONROT, q);
+		blk_queue_flag_set(QUEUE_FLAG_ADD_RANDOM, q);
 	}
 	if (sdkp->device->type == TYPE_ZBC) {

drivers/scsi/ufs/ufshcd.c+7−0

@@ -7940,6 +7940,13 @@ int ufshcd_alloc_host(struct device dev, struct ufs_hba *hba_handle) · 7939 unmodified lines
7940	err = -ENOMEM;	7940	err = -ENOMEM;
7941	goto out_error;	7941	goto out_error;
7942	}	7942	}
		7943
		7944	/*
		7945	* Do not use blk-mq at this time because blk-mq does not support
		7946	* runtime pm.
		7947	*/
		7948	host->use_blk_mq = false;
		7949
7943	hba = shost_priv(host);	7950	hba = shost_priv(host);
7944	hba->host = host;	7951	hba->host = host;
7945	hba->dev = dev;	7952	hba->dev = dev;

drivers/soundwire/stream.c+17−6

 	struct sdw_master_runtime *m_rt = stream->m_rt;
 	struct sdw_slave_runtime *s_rt, *_s_rt;
-	list_for_each_entry_safe(s_rt, _s_rt,
+	list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
-			&m_rt->slave_rt_list, m_rt_node)
+		sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
-		sdw_stream_remove_slave(s_rt->slave, stream);
+		sdw_release_slave_stream(s_rt->slave, stream);
+	}
 	list_del(&m_rt->bus_node);
 }
 				"Master runtime config failed for stream:%s",
 				stream->name);
 		ret = -ENOMEM;
-		goto error;
+		goto unlock;
 	}
 	ret = sdw_config_stream(bus->dev, stream, stream_config, false);
 	if (ret)
 		goto stream_error;
-	stream->state = SDW_STREAM_CONFIGURED;
+	goto unlock;
 stream_error:
 	sdw_release_master_stream(stream);
-error:
+unlock:
 	mutex_unlock(&bus->bus_lock);
 	return ret;
 }
  * @stream: SoundWire stream
  * @port_config: Port configuration for audio stream
  * @num_ports: Number of ports
+ *
+ * It is expected that Slave is added before adding Master
+ * to the Stream.
+ *
  */
 int sdw_stream_add_slave(struct sdw_slave *slave,
 		struct sdw_stream_config *stream_config,
 	if (ret)
 		goto stream_error;
+	/*
+	 * Change stream state to CONFIGURED on first Slave add.
+	 * Bus is not aware of number of Slave(s) in a stream at this
+	 * point so cannot depend on all Slave(s) to be added in order to
+	 * change stream state to CONFIGURED.
+	 */
 	stream->state = SDW_STREAM_CONFIGURED;
 	goto error;

drivers/spi/spi-fsl-dspi.c+6−0

 #define DRIVER_NAME "fsl-dspi"
+#ifdef CONFIG_M5441x
+#define DSPI_FIFO_SIZE			16
+#else
 #define DSPI_FIFO_SIZE			4
+#endif
 #define DSPI_DMA_BUFSIZE		(DSPI_FIFO_SIZE * 1024)
 #define SPI_MCR		0x00
 static void dspi_eoq_write(struct fsl_dspi *dspi)
 {
 	int fifo_size = DSPI_FIFO_SIZE;
+	u16 xfer_cmd = dspi->tx_cmd;
 	/* Fill TX FIFO with as many transfers as possible */
 	while (dspi->len && fifo_size--) {
+		dspi->tx_cmd = xfer_cmd;
 		/* Request EOQF for last transfer in FIFO */
 		if (dspi->len == dspi->bytes_per_word || fifo_size == 0)
 			dspi->tx_cmd |= SPI_PUSHR_CMD_EOQ;

drivers/spi/spi-gpio.c+2−2

@@ -300,8 +300,8 @@ static int spi_gpio_request(struct device *dev, · 299 unmodified lines
300	*mflags \|= SPI_MASTER_NO_RX;	300	*mflags \|= SPI_MASTER_NO_RX;
301		301
302	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);	302	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
303	if (IS_ERR(spi_gpio->mosi))	303	if (IS_ERR(spi_gpio->sck))
304	return PTR_ERR(spi_gpio->mosi);	304	return PTR_ERR(spi_gpio->sck);
305		305
306	for (i = 0; i < num_chipselects; i++) {	306	for (i = 0; i < num_chipselects; i++) {
307	spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",	307	spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs",

drivers/spi/spi-rspi.c+30−4

@@ -598,11 +598,13 @@ static int rspi_dma_transfer(struct rspi_data rspi, struct sg_table tx, · 597 unmodified lines
598		598
599	ret = wait_event_interruptible_timeout(rspi->wait,	599	ret = wait_event_interruptible_timeout(rspi->wait,
600	rspi->dma_callbacked, HZ);	600	rspi->dma_callbacked, HZ);
601	if (ret > 0 && rspi->dma_callbacked)	601	if (ret > 0 && rspi->dma_callbacked) {
602	ret = 0;	602	ret = 0;
603	else if (!ret) {	603	} else {
604	dev_err(&rspi->master->dev, "DMA timeout\n");	604	if (!ret) {
605	ret = -ETIMEDOUT;	605	dev_err(&rspi->master->dev, "DMA timeout\n");
		606	ret = -ETIMEDOUT;
		607	}
606	if (tx)	608	if (tx)
607	dmaengine_terminate_all(rspi->master->dma_tx);	609	dmaengine_terminate_all(rspi->master->dma_tx);
608	if (rx)	610	if (rx)
@@ -1350,12 +1352,36 @@ static const struct platform_device_id spi_driver_ids[] = { · 741 unmodified lines
1350		1352
1351	MODULE_DEVICE_TABLE(platform, spi_driver_ids);	1353	MODULE_DEVICE_TABLE(platform, spi_driver_ids);
1352		1354
		1355	#ifdef CONFIG_PM_SLEEP
		1356	static int rspi_suspend(struct device *dev)
		1357	{
		1358	struct platform_device *pdev = to_platform_device(dev);
		1359	struct rspi_data *rspi = platform_get_drvdata(pdev);
		1360
		1361	return spi_master_suspend(rspi->master);
		1362	}
		1363
		1364	static int rspi_resume(struct device *dev)
		1365	{
		1366	struct platform_device *pdev = to_platform_device(dev);
		1367	struct rspi_data *rspi = platform_get_drvdata(pdev);
		1368
		1369	return spi_master_resume(rspi->master);
		1370	}
		1371
		1372	static SIMPLE_DEV_PM_OPS(rspi_pm_ops, rspi_suspend, rspi_resume);
		1373	#define DEV_PM_OPS &rspi_pm_ops
		1374	#else
		1375	#define DEV_PM_OPS NULL
		1376	#endif /* CONFIG_PM_SLEEP */
		1377
1353	static struct platform_driver rspi_driver = {	1378	static struct platform_driver rspi_driver = {
1354	.probe = rspi_probe,	1379	.probe = rspi_probe,
1355	.remove = rspi_remove,	1380	.remove = rspi_remove,
1356	.id_table = spi_driver_ids,	1381	.id_table = spi_driver_ids,
1357	.driver = {	1382	.driver = {
1358	.name = "renesas_spi",	1383	.name = "renesas_spi",
		1384	.pm = DEV_PM_OPS,
1359	.of_match_table = of_match_ptr(rspi_of_match),	1385	.of_match_table = of_match_ptr(rspi_of_match),
1360	},	1386	},
1361	};	1387	};

drivers/spi/spi-sh-msiof.c+27−1

@@ -397,7 +397,8 @@ static void sh_msiof_spi_set_mode_regs(struct sh_msiof_spi_priv *p, · 396 unmodified lines
397		397
398	static void sh_msiof_reset_str(struct sh_msiof_spi_priv *p)	398	static void sh_msiof_reset_str(struct sh_msiof_spi_priv *p)
399	{	399	{
400	sh_msiof_write(p, STR, sh_msiof_read(p, STR));	400	sh_msiof_write(p, STR,
		401	sh_msiof_read(p, STR) & ~(STR_TDREQ \| STR_RDREQ));
401	}	402	}
402		403
403	static void sh_msiof_spi_write_fifo_8(struct sh_msiof_spi_priv *p,	404	static void sh_msiof_spi_write_fifo_8(struct sh_msiof_spi_priv *p,
@@ -1426,12 +1427,37 @@ static const struct platform_device_id spi_driver_ids[] = { · 1022 unmodified lines
1426	};	1427	};
1427	MODULE_DEVICE_TABLE(platform, spi_driver_ids);	1428	MODULE_DEVICE_TABLE(platform, spi_driver_ids);
1428		1429
		1430	#ifdef CONFIG_PM_SLEEP
		1431	static int sh_msiof_spi_suspend(struct device *dev)
		1432	{
		1433	struct platform_device *pdev = to_platform_device(dev);
		1434	struct sh_msiof_spi_priv *p = platform_get_drvdata(pdev);
		1435
		1436	return spi_master_suspend(p->master);
		1437	}
		1438
		1439	static int sh_msiof_spi_resume(struct device *dev)
		1440	{
		1441	struct platform_device *pdev = to_platform_device(dev);
		1442	struct sh_msiof_spi_priv *p = platform_get_drvdata(pdev);
		1443
		1444	return spi_master_resume(p->master);
		1445	}
		1446
		1447	static SIMPLE_DEV_PM_OPS(sh_msiof_spi_pm_ops, sh_msiof_spi_suspend,
		1448	sh_msiof_spi_resume);
		1449	#define DEV_PM_OPS &sh_msiof_spi_pm_ops
		1450	#else
		1451	#define DEV_PM_OPS NULL
		1452	#endif /* CONFIG_PM_SLEEP */
		1453
1429	static struct platform_driver sh_msiof_spi_drv = {	1454	static struct platform_driver sh_msiof_spi_drv = {
1430	.probe = sh_msiof_spi_probe,	1455	.probe = sh_msiof_spi_probe,
1431	.remove = sh_msiof_spi_remove,	1456	.remove = sh_msiof_spi_remove,
1432	.id_table = spi_driver_ids,	1457	.id_table = spi_driver_ids,
1433	.driver = {	1458	.driver = {
1434	.name = "spi_sh_msiof",	1459	.name = "spi_sh_msiof",
		1460	.pm = DEV_PM_OPS,
1435	.of_match_table = of_match_ptr(sh_msiof_match),	1461	.of_match_table = of_match_ptr(sh_msiof_match),
1436	},	1462	},
1437	};	1463	};

drivers/spi/spi-tegra20-slink.c+23−8

 		goto exit_free_master;
 	}
+	/* disabled clock may cause interrupt storm upon request */
+	tspi->clk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(tspi->clk)) {
+		ret = PTR_ERR(tspi->clk);
+		dev_err(&pdev->dev, "Can not get clock %d\n", ret);
+		goto exit_free_master;
+	}
+	ret = clk_prepare(tspi->clk);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Clock prepare failed %d\n", ret);
+		goto exit_free_master;
+	}
+	ret = clk_enable(tspi->clk);
+	if (ret < 0) {
+		dev_err(&pdev->dev, "Clock enable failed %d\n", ret);
+		goto exit_free_master;
+	}
 	spi_irq = platform_get_irq(pdev, 0);
 	tspi->irq = spi_irq;
 	ret = request_threaded_irq(tspi->irq, tegra_slink_isr,
 	if (ret < 0) {
 		dev_err(&pdev->dev, "Failed to register ISR for IRQ %d\n",
 					tspi->irq);
-		goto exit_free_master;
+		goto exit_clk_disable;
-	}
-	tspi->clk = devm_clk_get(&pdev->dev, NULL);
-	if (IS_ERR(tspi->clk)) {
-		dev_err(&pdev->dev, "can not get clock\n");
-		ret = PTR_ERR(tspi->clk);
-		goto exit_free_irq;
 	}
 	tspi->rst = devm_reset_control_get_exclusive(&pdev->dev, "spi");
 	tegra_slink_deinit_dma_param(tspi, true);
 exit_free_irq:
 	free_irq(spi_irq, tspi);
+exit_clk_disable:
+	clk_disable(tspi->clk);
 exit_free_master:
 	spi_master_put(master);
 	return ret;
 	free_irq(tspi->irq, tspi);
+	clk_disable(tspi->clk);
 	if (tspi->tx_dma_chan)
 		tegra_slink_deinit_dma_param(tspi, false);

drivers/spi/spi.c+11−2

@@ -2143,8 +2143,17 @@ int spi_register_controller(struct spi_controller *ctlr) · 2142 unmodified lines
2143	*/	2143	*/
2144	if (ctlr->num_chipselect == 0)	2144	if (ctlr->num_chipselect == 0)
2145	return -EINVAL;	2145	return -EINVAL;
2146	/* allocate dynamic bus number using Linux idr */	2146	if (ctlr->bus_num >= 0) {
2147	if ((ctlr->bus_num < 0) && ctlr->dev.of_node) {	2147	/* devices with a fixed bus num must check-in with the num */
		2148	mutex_lock(&board_lock);
		2149	id = idr_alloc(&spi_master_idr, ctlr, ctlr->bus_num,
		2150	ctlr->bus_num + 1, GFP_KERNEL);
		2151	mutex_unlock(&board_lock);
		2152	if (WARN(id < 0, "couldn't get idr"))
		2153	return id == -ENOSPC ? -EBUSY : id;
		2154	ctlr->bus_num = id;
		2155	} else if (ctlr->dev.of_node) {
		2156	/* allocate dynamic bus number using Linux idr */
2148	id = of_alias_get_id(ctlr->dev.of_node, "spi");	2157	id = of_alias_get_id(ctlr->dev.of_node, "spi");
2149	if (id >= 0) {	2158	if (id >= 0) {
2150	ctlr->bus_num = id;	2159	ctlr->bus_num = id;

drivers/staging/erofs/Kconfig+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2		2
3	config EROFS_FS	3	config EROFS_FS
4	tristate "EROFS filesystem support"	4	tristate "EROFS filesystem support"
5	depends on BROKEN	5	depends on BLOCK
6	help	6	help
7	EROFS(Enhanced Read-Only File System) is a lightweight	7	EROFS(Enhanced Read-Only File System) is a lightweight
8	read-only file system with modern designs (eg. page-sized	8	read-only file system with modern designs (eg. page-sized

drivers/staging/erofs/super.c+2−2

@@ -340,7 +340,7 @@ static int erofs_read_super(struct super_block *sb, · 339 unmodified lines
340	goto err_sbread;	340	goto err_sbread;
341		341
342	sb->s_magic = EROFS_SUPER_MAGIC;	342	sb->s_magic = EROFS_SUPER_MAGIC;
343	sb->s_flags \|= MS_RDONLY \| MS_NOATIME;	343	sb->s_flags \|= SB_RDONLY \| SB_NOATIME;
344	sb->s_maxbytes = MAX_LFS_FILESIZE;	344	sb->s_maxbytes = MAX_LFS_FILESIZE;
345	sb->s_time_gran = 1;	345	sb->s_time_gran = 1;
346		346
@@ -627,7 +627,7 @@ static int erofs_remount(struct super_block sb, int flags, char *data) · 280 unmodified lines
627	{	627	{
628	BUG_ON(!sb_rdonly(sb));	628	BUG_ON(!sb_rdonly(sb));
629		629
630	*flags \|= MS_RDONLY;	630	*flags \|= SB_RDONLY;
631	return 0;	631	return 0;
632	}	632	}
633		633

drivers/staging/fbtft/TODO+4−0

@@ -2,3 +2,7 @@ · 1 unmodified line
2	GPIO descriptor API in <linux/gpio/consumer.h> and look up GPIO	2	GPIO descriptor API in <linux/gpio/consumer.h> and look up GPIO
3	lines from device tree, ACPI or board files, board files should	3	lines from device tree, ACPI or board files, board files should
4	use <linux/gpio/machine.h>	4	use <linux/gpio/machine.h>
		5
		6	* convert all these over to drm_simple_display_pipe and submit for inclusion
		7	into the DRM subsystem under drivers/gpu/drm - fbdev doesn't take any new
		8	drivers anymore.

drivers/staging/gasket/TODO+13−0

@@ -1,9 +1,22 @@
1	This is a list of things that need to be done to get this driver out of the	1	This is a list of things that need to be done to get this driver out of the
2	staging directory.	2	staging directory.
		3
		4	- Implement the gasket framework's functionality through UIO instead of
		5	introducing a new user-space drivers framework that is quite similar.
		6
		7	UIO provides the necessary bits to implement user-space drivers. Meanwhile
		8	the gasket APIs adds some extra conveniences like PCI BAR mapping, and
		9	MSI interrupts. Add these features to the UIO subsystem, then re-implement
		10	the Apex driver as a basic UIO driver instead (include/linux/uio_driver.h)
		11
3	- Document sysfs files with Documentation/ABI/ entries.	12	- Document sysfs files with Documentation/ABI/ entries.
		13
4	- Use misc interface instead of major number for driver version description.	14	- Use misc interface instead of major number for driver version description.
		15
5	- Add descriptions of module_param's	16	- Add descriptions of module_param's
		17
6	- apex_get_status() should actually check status.	18	- apex_get_status() should actually check status.
		19
7	- "drivers" should never be dealing with "raw" sysfs calls or mess around with	20	- "drivers" should never be dealing with "raw" sysfs calls or mess around with
8	kobjects at all. The driver core should handle all of this for you	21	kobjects at all. The driver core should handle all of this for you
9	automaically. There should not be a need for raw attribute macros.	22	automaically. There should not be a need for raw attribute macros.

drivers/staging/media/mt9t031/Kconfig+0−6

@@ -1,9 +1,3 @@
1	config SOC_CAMERA_IMX074
2	tristate "imx074 support (DEPRECATED)"
3	depends on SOC_CAMERA && I2C
4	help
5	This driver supports IMX074 cameras from Sony
6
7	config SOC_CAMERA_MT9T031	1	config SOC_CAMERA_MT9T031
8	tristate "mt9t031 support (DEPRECATED)"	2	tristate "mt9t031 support (DEPRECATED)"
9	depends on SOC_CAMERA && I2C	3	depends on SOC_CAMERA && I2C

drivers/staging/vboxvideo/vbox_drv.c+7−0

 		ret = PTR_ERR(dev);
 		goto err_drv_alloc;
 	}
+	ret = pci_enable_device(pdev);
+	if (ret)
+		goto err_pci_enable;
 	dev->pdev = pdev;
 	pci_set_drvdata(pdev, dev);
  err_drv_dev_register:
 	vbox_driver_unload(dev);
  err_vbox_driver_load:
+	pci_disable_device(pdev);
+ err_pci_enable:
 	drm_dev_put(dev);
  err_drv_alloc:
 	return ret;

drivers/staging/vboxvideo/vbox_mode.c+5−0

 	if (rc)
 		return rc;
+	mutex_lock(&vbox->hw_mutex);
+	vbox_set_view(crtc);
+	vbox_do_modeset(crtc, &crtc->mode);
+	mutex_unlock(&vbox->hw_mutex);
 	spin_lock_irqsave(&drm->event_lock, flags);
 	if (event)

drivers/staging/wilc1000/Makefile+1−2

 # SPDX-License-Identifier: GPL-2.0
+obj-$(CONFIG_WILC1000) += wilc1000.o
 ccflags-y += -DFIRMWARE_1002=\"atmel/wilc1002_firmware.bin\" \
 		-DFIRMWARE_1003=\"atmel/wilc1003_firmware.bin\"
 			wilc_wlan.o
 obj-$(CONFIG_WILC1000_SDIO) += wilc1000-sdio.o
-wilc1000-sdio-objs += $(wilc1000-objs)
 wilc1000-sdio-objs += wilc_sdio.o
 obj-$(CONFIG_WILC1000_SPI) += wilc1000-spi.o
-wilc1000-spi-objs += $(wilc1000-objs)
 wilc1000-spi-objs += wilc_spi.o

drivers/staging/wilc1000/linux_wlan.c+4−2

 	}
 	kfree(wilc);
-	wilc_debugfs_remove();
 }
+EXPORT_SYMBOL_GPL(wilc_netdev_cleanup);
 static const struct net_device_ops wilc_netdev_ops = {
 	.ndo_init = mac_init_fn,
 	if (!wl)
 		return -ENOMEM;
-	wilc_debugfs_init();
 	*wilc = wl;
 	wl->io_type = io_type;
 	wl->hif_func = ops;
 	return 0;
 }
+EXPORT_SYMBOL_GPL(wilc_netdev_init);
+MODULE_LICENSE("GPL");

drivers/staging/wilc1000/wilc_debugfs.c+5−2

 #define DBG_LEVEL_ALL	(DEBUG | INFO | WRN | ERR)
 static atomic_t WILC_DEBUG_LEVEL = ATOMIC_INIT(ERR);
+EXPORT_SYMBOL_GPL(WILC_DEBUG_LEVEL);
 static ssize_t wilc_debug_level_read(struct file *file, char __user *userbuf,
 				     size_t count, loff_t *ppos)
 	},
 };
-int wilc_debugfs_init(void)
+static int __init wilc_debugfs_init(void)
 {
 	int i;
 	struct wilc_debugfs_info_t *info;
 	}
 	return 0;
 }
+module_init(wilc_debugfs_init);
-void wilc_debugfs_remove(void)
+static void __exit wilc_debugfs_remove(void)
 {
 	debugfs_remove_recursive(wilc_dir);
 }
+module_exit(wilc_debugfs_remove);
 #endif

drivers/staging/wilc1000/wilc_wlan.c+6−0

 	wilc->hif_func->hif_write_reg(wilc, 0xf0, reg & ~BIT(0));
 	wilc->hif_func->hif_write_reg(wilc, 0xfa, 0);
 }
+EXPORT_SYMBOL_GPL(chip_allow_sleep);
 void chip_wakeup(struct wilc *wilc)
 {
 	}
 	chip_ps_state = CHIP_WAKEDUP;
 }
+EXPORT_SYMBOL_GPL(chip_wakeup);
 void wilc_chip_sleep_manually(struct wilc *wilc)
 {
 	chip_ps_state = CHIP_SLEEPING_MANUAL;
 	release_bus(wilc, RELEASE_ONLY);
 }
+EXPORT_SYMBOL_GPL(wilc_chip_sleep_manually);
 void host_wakeup_notify(struct wilc *wilc)
 {
 	wilc->hif_func->hif_write_reg(wilc, 0x10b0, 1);
 	release_bus(wilc, RELEASE_ONLY);
 }
+EXPORT_SYMBOL_GPL(host_wakeup_notify);
 void host_sleep_notify(struct wilc *wilc)
 {
 	wilc->hif_func->hif_write_reg(wilc, 0x10ac, 1);
 	release_bus(wilc, RELEASE_ONLY);
 }
+EXPORT_SYMBOL_GPL(host_sleep_notify);
 int wilc_wlan_handle_txq(struct net_device *dev, u32 *txq_count)
 {
 	release_bus(wilc, RELEASE_ALLOW_SLEEP);
 }
+EXPORT_SYMBOL_GPL(wilc_handle_isr);
 int wilc_wlan_firmware_download(struct wilc *wilc, const u8 *buffer,
 				u32 buffer_size)

drivers/staging/wilc1000/wilc_wlan_if.h+0−2

@@ -831,6 +831,4 @@ struct wilc; · 830 unmodified lines
831	int wilc_wlan_init(struct net_device *dev);	831	int wilc_wlan_init(struct net_device *dev);
832	u32 wilc_get_chipid(struct wilc *wilc, bool update);	832	u32 wilc_get_chipid(struct wilc *wilc, bool update);
833		833
834	int wilc_debugfs_init(void);
835	void wilc_debugfs_remove(void);
836	#endif	834	#endif

drivers/target/iscsi/iscsi_target.c+15−16

 	sg_init_table(sg, ARRAY_SIZE(sg));
 	sg_set_buf(sg, buf, payload_length);
-	sg_set_buf(sg + 1, pad_bytes, padding);
+	if (padding)
+		sg_set_buf(sg + 1, pad_bytes, padding);
 	ahash_request_set_crypt(hash, sg, data_crc, payload_length + padding);
 static void iscsit_get_rx_pdu(struct iscsi_conn *conn)
 {
 	int ret;
-	u8 buffer[ISCSI_HDR_LEN], opcode;
+	u8 *buffer, opcode;
 	u32 checksum = 0, digest = 0;
 	struct kvec iov;
+	buffer = kcalloc(ISCSI_HDR_LEN, sizeof(*buffer), GFP_KERNEL);
+	if (!buffer)
+		return;
 	while (!kthread_should_stop()) {
 		/*
 		 * Ensure that both TX and RX per connection kthreads
 		 */
 		iscsit_thread_check_cpumask(conn, current, 0);
-		memset(buffer, 0, ISCSI_HDR_LEN);
 		memset(&iov, 0, sizeof(struct kvec));
 		iov.iov_base	= buffer;
 		ret = rx_data(conn, &iov, 1, ISCSI_HDR_LEN);
 		if (ret != ISCSI_HDR_LEN) {
 			iscsit_rx_thread_wait_for_tcp(conn);
-			return;
+			break;
 		}
 		if (conn->conn_ops->HeaderDigest) {
 			ret = rx_data(conn, &iov, 1, ISCSI_CRC_LEN);
 			if (ret != ISCSI_CRC_LEN) {
 				iscsit_rx_thread_wait_for_tcp(conn);
-				return;
+				break;
 			}
 			iscsit_do_crypto_hash_buf(conn->conn_rx_hash, buffer,
 		}
 		if (conn->conn_state == TARG_CONN_STATE_IN_LOGOUT)
-			return;
+			break;
 		opcode = buffer[0] & ISCSI_OPCODE_MASK;
 			" while in Discovery Session, rejecting.\n", opcode);
 			iscsit_add_reject(conn, ISCSI_REASON_PROTOCOL_ERROR,
 					  buffer);
-			return;
+			break;
 		}
 		ret = iscsi_target_rx_opcode(conn, buffer);
 		if (ret < 0)
-			return;
+			break;
 	}
+	kfree(buffer);
 }
 int iscsi_target_rx_thread(void *arg)
 		crypto_free_ahash(tfm);
 	}
-	free_cpumask_var(conn->conn_cpumask);
-	kfree(conn->conn_ops);
-	conn->conn_ops = NULL;
 	if (conn->sock)
 		sock_release(conn->sock);
 	if (conn->conn_transport->iscsit_free_conn)
 		conn->conn_transport->iscsit_free_conn(conn);
-	iscsit_put_transport(conn->conn_transport);
 	pr_debug("Moving to TARG_CONN_STATE_FREE.\n");
 	conn->conn_state = TARG_CONN_STATE_FREE;
-	kfree(conn);
+	iscsit_free_conn(conn);
 	spin_lock_bh(&sess->conn_lock);
 	atomic_dec(&sess->nconn);

drivers/target/iscsi/iscsi_target_auth.c+17−28

 #include "iscsi_target_nego.h"
 #include "iscsi_target_auth.h"
-static int chap_string_to_hex(unsigned char *dst, unsigned char *src, int len)
-{
-	int j = DIV_ROUND_UP(len, 2), rc;
-	rc = hex2bin(dst, src, j);
-	if (rc < 0)
-		pr_debug("CHAP string contains non hex digit symbols\n");
-	dst[j] = '\0';
-	return j;
-}
-static void chap_binaryhex_to_asciihex(char *dst, char *src, int src_len)
-{
-	int i;
-	for (i = 0; i < src_len; i++) {
-		sprintf(&dst[i*2], "%02x", (int) src[i] & 0xff);
-	}
-}
 static int chap_gen_challenge(
 	struct iscsi_conn *conn,
 	int caller,
 	ret = get_random_bytes_wait(chap->challenge, CHAP_CHALLENGE_LENGTH);
 	if (unlikely(ret))
 		return ret;
-	chap_binaryhex_to_asciihex(challenge_asciihex, chap->challenge,
+	bin2hex(challenge_asciihex, chap->challenge,
 				CHAP_CHALLENGE_LENGTH);
 	/*
 	 * Set CHAP_C, and copy the generated challenge into c_str.
 		pr_err("Could not find CHAP_R.\n");
 		goto out;
 	}
+	if (strlen(chap_r) != MD5_SIGNATURE_SIZE * 2) {
+		pr_err("Malformed CHAP_R\n");
+		goto out;
+	}
+	if (hex2bin(client_digest, chap_r, MD5_SIGNATURE_SIZE) < 0) {
+		pr_err("Malformed CHAP_R\n");
+		goto out;
+	}
 	pr_debug("[server] Got CHAP_R=%s\n", chap_r);
-	chap_string_to_hex(client_digest, chap_r, strlen(chap_r));
 	tfm = crypto_alloc_shash("md5", 0, 0);
 	if (IS_ERR(tfm)) {
 		goto out;
 	}
-	chap_binaryhex_to_asciihex(response, server_digest, MD5_SIGNATURE_SIZE);
+	bin2hex(response, server_digest, MD5_SIGNATURE_SIZE);
 	pr_debug("[server] MD5 Server Digest: %s\n", response);
 	if (memcmp(server_digest, client_digest, MD5_SIGNATURE_SIZE) != 0) {
 		pr_err("Could not find CHAP_C.\n");
 		goto out;
 	}
-	pr_debug("[server] Got CHAP_C=%s\n", challenge);
+	challenge_len = DIV_ROUND_UP(strlen(challenge), 2);
-	challenge_len = chap_string_to_hex(challenge_binhex, challenge,
-				strlen(challenge));
 	if (!challenge_len) {
 		pr_err("Unable to convert incoming challenge\n");
 		goto out;
 		pr_err("CHAP_C exceeds maximum binary size of 1024 bytes\n");
 		goto out;
 	}
+	if (hex2bin(challenge_binhex, challenge, challenge_len) < 0) {
+		pr_err("Malformed CHAP_C\n");
+		goto out;
+	}
+	pr_debug("[server] Got CHAP_C=%s\n", challenge);
 	/*
 	 * During mutual authentication, the CHAP_C generated by the
 	 * initiator must not match the original CHAP_C generated by
 	/*
 	 * Convert response from binary hex to ascii hext.
 	 */
-	chap_binaryhex_to_asciihex(response, digest, MD5_SIGNATURE_SIZE);
+	bin2hex(response, digest, MD5_SIGNATURE_SIZE);
 	*nr_out_len += sprintf(nr_out_ptr + *nr_out_len, "CHAP_R=0x%s",
 			response);
 	*nr_out_len += 1;

drivers/target/iscsi/iscsi_target_login.c+78−71

@@ -67,45 +67,10 @@ static struct iscsi_login iscsi_login_init_conn(struct iscsi_conn conn) · 66 unmodified lines
67	goto out_req_buf;	67	goto out_req_buf;
68	}	68	}
69		69
70	conn->conn_ops = kzalloc(sizeof(struct iscsi_conn_ops), GFP_KERNEL);
71	if (!conn->conn_ops) {
72	pr_err("Unable to allocate memory for"
73	" struct iscsi_conn_ops.\n");
74	goto out_rsp_buf;
75	}
76
77	init_waitqueue_head(&conn->queues_wq);
78	INIT_LIST_HEAD(&conn->conn_list);
79	INIT_LIST_HEAD(&conn->conn_cmd_list);
80	INIT_LIST_HEAD(&conn->immed_queue_list);
81	INIT_LIST_HEAD(&conn->response_queue_list);
82	init_completion(&conn->conn_post_wait_comp);
83	init_completion(&conn->conn_wait_comp);
84	init_completion(&conn->conn_wait_rcfr_comp);
85	init_completion(&conn->conn_waiting_on_uc_comp);
86	init_completion(&conn->conn_logout_comp);
87	init_completion(&conn->rx_half_close_comp);
88	init_completion(&conn->tx_half_close_comp);
89	init_completion(&conn->rx_login_comp);
90	spin_lock_init(&conn->cmd_lock);
91	spin_lock_init(&conn->conn_usage_lock);
92	spin_lock_init(&conn->immed_queue_lock);
93	spin_lock_init(&conn->nopin_timer_lock);
94	spin_lock_init(&conn->response_queue_lock);
95	spin_lock_init(&conn->state_lock);
96
97	if (!zalloc_cpumask_var(&conn->conn_cpumask, GFP_KERNEL)) {
98	pr_err("Unable to allocate conn->conn_cpumask\n");
99	goto out_conn_ops;
100	}
101	conn->conn_login = login;	70	conn->conn_login = login;
102		71
103	return login;	72	return login;
104		73
105	out_conn_ops:
106	kfree(conn->conn_ops);
107	out_rsp_buf:
108	kfree(login->rsp_buf);
109	out_req_buf:	74	out_req_buf:
110	kfree(login->req_buf);	75	kfree(login->req_buf);
111	out_login:	76	out_login:
@@ -310,11 +275,9 @@ static int iscsi_login_zero_tsih_s1( · 198 unmodified lines
310	return -ENOMEM;	275	return -ENOMEM;
311	}	276	}
312		277
313	ret = iscsi_login_set_conn_values(sess, conn, pdu->cid);	278	if (iscsi_login_set_conn_values(sess, conn, pdu->cid))
314	if (unlikely(ret)) {	279	goto free_sess;
315	kfree(sess);	280
316	return ret;
317	}
318	sess->init_task_tag = pdu->itt;	281	sess->init_task_tag = pdu->itt;
319	memcpy(&sess->isid, pdu->isid, 6);	282	memcpy(&sess->isid, pdu->isid, 6);
320	sess->exp_cmd_sn = be32_to_cpu(pdu->cmdsn);	283	sess->exp_cmd_sn = be32_to_cpu(pdu->cmdsn);
@@ -1149,6 +1112,75 @@ iscsit_conn_set_transport(struct iscsi_conn conn, struct iscsit_transport t) · 828 unmodified lines
1149	return 0;	1112	return 0;
1150	}	1113	}
1151		1114
		1115	static struct iscsi_conn iscsit_alloc_conn(struct iscsi_np np)
		1116	{
		1117	struct iscsi_conn *conn;
		1118
		1119	conn = kzalloc(sizeof(struct iscsi_conn), GFP_KERNEL);
		1120	if (!conn) {
		1121	pr_err("Could not allocate memory for new connection\n");
		1122	return NULL;
		1123	}
		1124	pr_debug("Moving to TARG_CONN_STATE_FREE.\n");
		1125	conn->conn_state = TARG_CONN_STATE_FREE;
		1126
		1127	init_waitqueue_head(&conn->queues_wq);
		1128	INIT_LIST_HEAD(&conn->conn_list);
		1129	INIT_LIST_HEAD(&conn->conn_cmd_list);
		1130	INIT_LIST_HEAD(&conn->immed_queue_list);
		1131	INIT_LIST_HEAD(&conn->response_queue_list);
		1132	init_completion(&conn->conn_post_wait_comp);
		1133	init_completion(&conn->conn_wait_comp);
		1134	init_completion(&conn->conn_wait_rcfr_comp);
		1135	init_completion(&conn->conn_waiting_on_uc_comp);
		1136	init_completion(&conn->conn_logout_comp);
		1137	init_completion(&conn->rx_half_close_comp);
		1138	init_completion(&conn->tx_half_close_comp);
		1139	init_completion(&conn->rx_login_comp);
		1140	spin_lock_init(&conn->cmd_lock);
		1141	spin_lock_init(&conn->conn_usage_lock);
		1142	spin_lock_init(&conn->immed_queue_lock);
		1143	spin_lock_init(&conn->nopin_timer_lock);
		1144	spin_lock_init(&conn->response_queue_lock);
		1145	spin_lock_init(&conn->state_lock);
		1146
		1147	timer_setup(&conn->nopin_response_timer,
		1148	iscsit_handle_nopin_response_timeout, 0);
		1149	timer_setup(&conn->nopin_timer, iscsit_handle_nopin_timeout, 0);
		1150
		1151	if (iscsit_conn_set_transport(conn, np->np_transport) < 0)
		1152	goto free_conn;
		1153
		1154	conn->conn_ops = kzalloc(sizeof(struct iscsi_conn_ops), GFP_KERNEL);
		1155	if (!conn->conn_ops) {
		1156	pr_err("Unable to allocate memory for struct iscsi_conn_ops.\n");
		1157	goto put_transport;
		1158	}
		1159
		1160	if (!zalloc_cpumask_var(&conn->conn_cpumask, GFP_KERNEL)) {
		1161	pr_err("Unable to allocate conn->conn_cpumask\n");
		1162	goto free_mask;
		1163	}
		1164
		1165	return conn;
		1166
		1167	free_mask:
		1168	free_cpumask_var(conn->conn_cpumask);
		1169	put_transport:
		1170	iscsit_put_transport(conn->conn_transport);
		1171	free_conn:
		1172	kfree(conn);
		1173	return NULL;
		1174	}
		1175
		1176	void iscsit_free_conn(struct iscsi_conn *conn)
		1177	{
		1178	free_cpumask_var(conn->conn_cpumask);
		1179	kfree(conn->conn_ops);
		1180	iscsit_put_transport(conn->conn_transport);
		1181	kfree(conn);
		1182	}
		1183
1152	void iscsi_target_login_sess_out(struct iscsi_conn *conn,	1184	void iscsi_target_login_sess_out(struct iscsi_conn *conn,
1153	struct iscsi_np *np, bool zero_tsih, bool new_sess)	1185	struct iscsi_np *np, bool zero_tsih, bool new_sess)
1154	{	1186	{
@@ -1198,10 +1230,6 @@ old_sess_out: · 43 unmodified lines
1198	crypto_free_ahash(tfm);	1230	crypto_free_ahash(tfm);
1199	}	1231	}
1200		1232
1201	free_cpumask_var(conn->conn_cpumask);
1202
1203	kfree(conn->conn_ops);
1204
1205	if (conn->param_list) {	1233	if (conn->param_list) {
1206	iscsi_release_param_list(conn->param_list);	1234	iscsi_release_param_list(conn->param_list);
1207	conn->param_list = NULL;	1235	conn->param_list = NULL;
@@ -1219,8 +1247,7 @@ old_sess_out: · 11 unmodified lines
1219	if (conn->conn_transport->iscsit_free_conn)	1247	if (conn->conn_transport->iscsit_free_conn)
1220	conn->conn_transport->iscsit_free_conn(conn);	1248	conn->conn_transport->iscsit_free_conn(conn);
1221		1249
1222	iscsit_put_transport(conn->conn_transport);	1250	iscsit_free_conn(conn);
1223	kfree(conn);
1224	}	1251	}
1225		1252
1226	static int __iscsi_target_login_thread(struct iscsi_np *np)	1253	static int __iscsi_target_login_thread(struct iscsi_np *np)
@@ -1250,31 +1277,16 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) · 23 unmodified lines
1250	}	1277	}
1251	spin_unlock_bh(&np->np_thread_lock);	1278	spin_unlock_bh(&np->np_thread_lock);
1252		1279
1253	conn = kzalloc(sizeof(struct iscsi_conn), GFP_KERNEL);	1280	conn = iscsit_alloc_conn(np);
1254	if (!conn) {	1281	if (!conn) {
1255	pr_err("Could not allocate memory for"
1256	" new connection\n");
1257	/* Get another socket */	1282	/* Get another socket */
1258	return 1;	1283	return 1;
1259	}	1284	}
1260	pr_debug("Moving to TARG_CONN_STATE_FREE.\n");
1261	conn->conn_state = TARG_CONN_STATE_FREE;
1262
1263	timer_setup(&conn->nopin_response_timer,
1264	iscsit_handle_nopin_response_timeout, 0);
1265	timer_setup(&conn->nopin_timer, iscsit_handle_nopin_timeout, 0);
1266
1267	if (iscsit_conn_set_transport(conn, np->np_transport) < 0) {
1268	kfree(conn);
1269	return 1;
1270	}
1271		1285
1272	rc = np->np_transport->iscsit_accept_np(np, conn);	1286	rc = np->np_transport->iscsit_accept_np(np, conn);
1273	if (rc == -ENOSYS) {	1287	if (rc == -ENOSYS) {
1274	complete(&np->np_restart_comp);	1288	complete(&np->np_restart_comp);
1275	iscsit_put_transport(conn->conn_transport);	1289	iscsit_free_conn(conn);
1276	kfree(conn);
1277	conn = NULL;
1278	goto exit;	1290	goto exit;
1279	} else if (rc < 0) {	1291	} else if (rc < 0) {
1280	spin_lock_bh(&np->np_thread_lock);	1292	spin_lock_bh(&np->np_thread_lock);
@@ -1282,17 +1294,13 @@ static int __iscsi_target_login_thread(struct iscsi_np *np) · 1 unmodified line
1282	np->np_thread_state = ISCSI_NP_THREAD_ACTIVE;	1294	np->np_thread_state = ISCSI_NP_THREAD_ACTIVE;
1283	spin_unlock_bh(&np->np_thread_lock);	1295	spin_unlock_bh(&np->np_thread_lock);
1284	complete(&np->np_restart_comp);	1296	complete(&np->np_restart_comp);
1285	iscsit_put_transport(conn->conn_transport);	1297	iscsit_free_conn(conn);
1286	kfree(conn);
1287	conn = NULL;
1288	/* Get another socket */	1298	/* Get another socket */
1289	return 1;	1299	return 1;
1290	}	1300	}
1291	spin_unlock_bh(&np->np_thread_lock);	1301	spin_unlock_bh(&np->np_thread_lock);
1292	iscsit_put_transport(conn->conn_transport);	1302	iscsit_free_conn(conn);
1293	kfree(conn);	1303	return 1;
1294	conn = NULL;
1295	goto out;
1296	}	1304	}
1297	/*	1305	/*
1298	* Perform the remaining iSCSI connection initialization items..	1306	* Perform the remaining iSCSI connection initialization items..
@@ -1442,7 +1450,6 @@ old_sess_out: · 143 unmodified lines
1442	tpg_np = NULL;	1450	tpg_np = NULL;
1443	}	1451	}
1444		1452
1445	out:
1446	return 1;	1453	return 1;
1447		1454
1448	exit:	1455	exit:

drivers/target/iscsi/iscsi_target_login.h+1−1

@@ -19,7 +19,7 @@ extern int iscsi_target_setup_login_socket(struct iscsi_np *, · 18 unmodified lines
19	extern int iscsit_accept_np(struct iscsi_np , struct iscsi_conn );	19	extern int iscsit_accept_np(struct iscsi_np , struct iscsi_conn );
20	extern int iscsit_get_login_rx(struct iscsi_conn , struct iscsi_login );	20	extern int iscsit_get_login_rx(struct iscsi_conn , struct iscsi_login );
21	extern int iscsit_put_login_tx(struct iscsi_conn , struct iscsi_login , u32);	21	extern int iscsit_put_login_tx(struct iscsi_conn , struct iscsi_login , u32);
22	extern void iscsit_free_conn(struct iscsi_np , struct iscsi_conn );	22	extern void iscsit_free_conn(struct iscsi_conn *);
23	extern int iscsit_start_kthreads(struct iscsi_conn *);	23	extern int iscsit_start_kthreads(struct iscsi_conn *);
24	extern void iscsi_post_login_handler(struct iscsi_np , struct iscsi_conn , u8);	24	extern void iscsi_post_login_handler(struct iscsi_np , struct iscsi_conn , u8);
25	extern void iscsi_target_login_sess_out(struct iscsi_conn , struct iscsi_np ,	25	extern void iscsi_target_login_sess_out(struct iscsi_conn , struct iscsi_np ,

drivers/tty/hvc/hvc_console.c+33−5

@@ -522,6 +522,8 @@ static int hvc_write(struct tty_struct tty, const unsigned char buf, int count · 521 unmodified lines
522	return -EIO;	522	return -EIO;
523		523
524	while (count > 0) {	524	while (count > 0) {
		525	int ret = 0;
		526
525	spin_lock_irqsave(&hp->lock, flags);	527	spin_lock_irqsave(&hp->lock, flags);
526		528
527	rsize = hp->outbuf_size - hp->n_outbuf;	529	rsize = hp->outbuf_size - hp->n_outbuf;
@@ -537,10 +539,13 @@ static int hvc_write(struct tty_struct tty, const unsigned char buf, int count · 9 unmodified lines
537	}	539	}
538		540
539	if (hp->n_outbuf > 0)	541	if (hp->n_outbuf > 0)
540	hvc_push(hp);	542	ret = hvc_push(hp);
541		543
542	spin_unlock_irqrestore(&hp->lock, flags);	544	spin_unlock_irqrestore(&hp->lock, flags);
543		545
		546	if (!ret)
		547	break;
		548
544	if (count) {	549	if (count) {
545	if (hp->n_outbuf > 0)	550	if (hp->n_outbuf > 0)
546	hvc_flush(hp);	551	hvc_flush(hp);
@@ -623,6 +628,15 @@ static int hvc_chars_in_buffer(struct tty_struct *tty) · 76 unmodified lines
623	#define MAX_TIMEOUT (2000)	628	#define MAX_TIMEOUT (2000)
624	static u32 timeout = MIN_TIMEOUT;	629	static u32 timeout = MIN_TIMEOUT;
625		630
		631	/*
		632	* Maximum number of bytes to get from the console driver if hvc_poll is
		633	* called from driver (and can't sleep). Any more than this and we break
		634	* and start polling with khvcd. This value was derived from from an OpenBMC
		635	* console with the OPAL driver that results in about 0.25ms interrupts off
		636	* latency.
		637	*/
		638	#define HVC_ATOMIC_READ_MAX 128
		639
626	#define HVC_POLL_READ 0x00000001	640	#define HVC_POLL_READ 0x00000001
627	#define HVC_POLL_WRITE 0x00000002	641	#define HVC_POLL_WRITE 0x00000002
628		642
@@ -669,8 +683,8 @@ static int __hvc_poll(struct hvc_struct *hp, bool may_sleep) · 40 unmodified lines
669	if (!hp->irq_requested)	683	if (!hp->irq_requested)
670	poll_mask \|= HVC_POLL_READ;	684	poll_mask \|= HVC_POLL_READ;
671		685
		686	read_again:
672	/* Read data if any */	687	/* Read data if any */
673
674	count = tty_buffer_request_room(&hp->port, N_INBUF);	688	count = tty_buffer_request_room(&hp->port, N_INBUF);
675		689
676	/* If flip is full, just reschedule a later read */	690	/* If flip is full, just reschedule a later read */
@@ -717,9 +731,23 @@ static int __hvc_poll(struct hvc_struct *hp, bool may_sleep) · 40 unmodified lines
717	#endif /* CONFIG_MAGIC_SYSRQ */	731	#endif /* CONFIG_MAGIC_SYSRQ */
718	tty_insert_flip_char(&hp->port, buf[i], 0);	732	tty_insert_flip_char(&hp->port, buf[i], 0);
719	}	733	}
720	if (n == count)	734	read_total += n;
721	poll_mask \|= HVC_POLL_READ;	735
722	read_total = n;	736	if (may_sleep) {
		737	/* Keep going until the flip is full */
		738	spin_unlock_irqrestore(&hp->lock, flags);
		739	cond_resched();
		740	spin_lock_irqsave(&hp->lock, flags);
		741	goto read_again;
		742	} else if (read_total < HVC_ATOMIC_READ_MAX) {
		743	/* Break and defer if it's a large read in atomic */
		744	goto read_again;
		745	}
		746
		747	/*
		748	* Latency break, schedule another poll immediately.
		749	*/
		750	poll_mask \|= HVC_POLL_READ;
723		751
724	out:	752	out:
725	/* Wakeup write queue if necessary */	753	/* Wakeup write queue if necessary */

drivers/tty/serial/cpm_uart/cpm_uart_core.c+7−3

 	/* Get the address of the host memory buffer.
 	 */
 	bdp = pinfo->rx_cur;
-	while (bdp->cbd_sc & BD_SC_EMPTY)
+	if (bdp->cbd_sc & BD_SC_EMPTY)
-		;
+		return NO_POLL_CHAR;
 	/* If the buffer address is in the CPM DPRAM, don't
 	 * convert it.
 		poll_chars = 0;
 	}
 	if (poll_chars <= 0) {
-		poll_chars = poll_wait_key(poll_buf, pinfo);
+		int ret = poll_wait_key(poll_buf, pinfo);
+		if (ret == NO_POLL_CHAR)
+			return ret;
+		poll_chars = ret;
 		pollp = poll_buf;
 	}
 	poll_chars--;

drivers/tty/serial/fsl_lpuart.c+2−1

@@ -979,7 +979,8 @@ static inline int lpuart_start_rx_dma(struct lpuart_port *sport) · 978 unmodified lines
979	struct circ_buf *ring = &sport->rx_ring;	979	struct circ_buf *ring = &sport->rx_ring;
980	int ret, nent;	980	int ret, nent;
981	int bits, baud;	981	int bits, baud;
982	struct tty_struct *tty = tty_port_tty_get(&sport->port.state->port);	982	struct tty_port *port = &sport->port.state->port;
		983	struct tty_struct *tty = port->tty;
983	struct ktermios *termios = &tty->termios;	984	struct ktermios *termios = &tty->termios;
984		985
985	baud = tty_get_baud_rate(tty);	986	baud = tty_get_baud_rate(tty);

drivers/tty/serial/imx.c+8−0

@@ -2351,6 +2351,14 @@ static int imx_uart_probe(struct platform_device *pdev) · 2350 unmodified lines
2351	ret);	2351	ret);
2352	return ret;	2352	return ret;
2353	}	2353	}
		2354
		2355	ret = devm_request_irq(&pdev->dev, rtsirq, imx_uart_rtsint, 0,
		2356	dev_name(&pdev->dev), sport);
		2357	if (ret) {
		2358	dev_err(&pdev->dev, "failed to request rts irq: %d\n",
		2359	ret);
		2360	return ret;
		2361	}
2354	} else {	2362	} else {
2355	ret = devm_request_irq(&pdev->dev, rxirq, imx_uart_int, 0,	2363	ret = devm_request_irq(&pdev->dev, rxirq, imx_uart_int, 0,
2356	dev_name(&pdev->dev), sport);	2364	dev_name(&pdev->dev), sport);

drivers/tty/serial/mvebu-uart.c+1−0

@@ -511,6 +511,7 @@ static void mvebu_uart_set_termios(struct uart_port *port, · 510 unmodified lines
511	termios->c_iflag \|= old->c_iflag & ~(INPCK \| IGNPAR);	511	termios->c_iflag \|= old->c_iflag & ~(INPCK \| IGNPAR);
512	termios->c_cflag &= CREAD \| CBAUD;	512	termios->c_cflag &= CREAD \| CBAUD;
513	termios->c_cflag \|= old->c_cflag & ~(CREAD \| CBAUD);	513	termios->c_cflag \|= old->c_cflag & ~(CREAD \| CBAUD);
		514	termios->c_cflag \|= CS8;
514	}	515	}
515		516
516	spin_unlock_irqrestore(&port->lock, flags);	517	spin_unlock_irqrestore(&port->lock, flags);

drivers/tty/tty_io.c+8−3

 static int tty_reopen(struct tty_struct *tty)
 {
 	struct tty_driver *driver = tty->driver;
+	int retval;
 	if (driver->type == TTY_DRIVER_TYPE_PTY &&
 	    driver->subtype == PTY_TYPE_MASTER)
 	tty->count++;
-	if (!tty->ldisc)
+	if (tty->ldisc)
-		return tty_ldisc_reinit(tty, tty->termios.c_line);
+		return 0;
-	return 0;
+	retval = tty_ldisc_reinit(tty, tty->termios.c_line);
+	if (retval)
+		tty->count--;
+	return retval;
 }
 /**

drivers/tty/vt/vt_ioctl.c+4−0

 #include <asm/io.h>
 #include <linux/uaccess.h>
+#include <linux/nospec.h>
 #include <linux/kbd_kern.h>
 #include <linux/vt_kern.h>
 #include <linux/kbd_diacr.h>
 		if (vsa.console == 0 || vsa.console > MAX_NR_CONSOLES)
 			ret = -ENXIO;
 		else {
+			vsa.console = array_index_nospec(vsa.console,
+							 MAX_NR_CONSOLES + 1);
 			vsa.console--;
 			console_lock();
 			ret = vc_allocate(vsa.console);

drivers/usb/class/cdc-acm.c+0−73

@@ -780,20 +780,9 @@ static int acm_tty_write(struct tty_struct *tty, · 779 unmodified lines
780	}	780	}
781		781
782	if (acm->susp_count) {	782	if (acm->susp_count) {
783	if (acm->putbuffer) {
784	/* now to preserve order */
785	usb_anchor_urb(acm->putbuffer->urb, &acm->delayed);
786	acm->putbuffer = NULL;
787	}
788	usb_anchor_urb(wb->urb, &acm->delayed);	783	usb_anchor_urb(wb->urb, &acm->delayed);
789	spin_unlock_irqrestore(&acm->write_lock, flags);	784	spin_unlock_irqrestore(&acm->write_lock, flags);
790	return count;	785	return count;
791	} else {
792	if (acm->putbuffer) {
793	/* at this point there is no good way to handle errors */
794	acm_start_wb(acm, acm->putbuffer);
795	acm->putbuffer = NULL;
796	}
797	}	786	}
798		787
799	stat = acm_start_wb(acm, wb);	788	stat = acm_start_wb(acm, wb);
@@ -804,66 +793,6 @@ static int acm_tty_write(struct tty_struct *tty, · 4 unmodified lines
804	return count;	793	return count;
805	}	794	}
806		795
807	static void acm_tty_flush_chars(struct tty_struct *tty)
808	{
809	struct acm *acm = tty->driver_data;
810	struct acm_wb *cur;
811	int err;
812	unsigned long flags;
813
814	spin_lock_irqsave(&acm->write_lock, flags);
815
816	cur = acm->putbuffer;
817	if (!cur) /* nothing to do */
818	goto out;
819
820	acm->putbuffer = NULL;
821	err = usb_autopm_get_interface_async(acm->control);
822	if (err < 0) {
823	cur->use = 0;
824	acm->putbuffer = cur;
825	goto out;
826	}
827
828	if (acm->susp_count)
829	usb_anchor_urb(cur->urb, &acm->delayed);
830	else
831	acm_start_wb(acm, cur);
832	out:
833	spin_unlock_irqrestore(&acm->write_lock, flags);
834	return;
835	}
836
837	static int acm_tty_put_char(struct tty_struct *tty, unsigned char ch)
838	{
839	struct acm *acm = tty->driver_data;
840	struct acm_wb *cur;
841	int wbn;
842	unsigned long flags;
843
844	overflow:
845	cur = acm->putbuffer;
846	if (!cur) {
847	spin_lock_irqsave(&acm->write_lock, flags);
848	wbn = acm_wb_alloc(acm);
849	if (wbn >= 0) {
850	cur = &acm->wb[wbn];
851	acm->putbuffer = cur;
852	}
853	spin_unlock_irqrestore(&acm->write_lock, flags);
854	if (!cur)
855	return 0;
856	}
857
858	if (cur->len == acm->writesize) {
859	acm_tty_flush_chars(tty);
860	goto overflow;
861	}
862
863	cur->buf[cur->len++] = ch;
864	return 1;
865	}
866
867	static int acm_tty_write_room(struct tty_struct *tty)	796	static int acm_tty_write_room(struct tty_struct *tty)
868	{	797	{
869	struct acm *acm = tty->driver_data;	798	struct acm *acm = tty->driver_data;
@@ -1987,8 +1916,6 @@ static const struct tty_operations acm_ops = { · 1117 unmodified lines
1987	.cleanup = acm_tty_cleanup,	1916	.cleanup = acm_tty_cleanup,
1988	.hangup = acm_tty_hangup,	1917	.hangup = acm_tty_hangup,
1989	.write = acm_tty_write,	1918	.write = acm_tty_write,
1990	.put_char = acm_tty_put_char,
1991	.flush_chars = acm_tty_flush_chars,
1992	.write_room = acm_tty_write_room,	1919	.write_room = acm_tty_write_room,
1993	.ioctl = acm_tty_ioctl,	1920	.ioctl = acm_tty_ioctl,
1994	.throttle = acm_tty_throttle,	1921	.throttle = acm_tty_throttle,

drivers/usb/class/cdc-acm.h+0−1

@@ -96,7 +96,6 @@ struct acm { · 95 unmodified lines
96	unsigned long read_urbs_free;	96	unsigned long read_urbs_free;
97	struct urb *read_urbs[ACM_NR];	97	struct urb *read_urbs[ACM_NR];
98	struct acm_rb read_buffers[ACM_NR];	98	struct acm_rb read_buffers[ACM_NR];
99	struct acm_wb putbuffer; / for acm_tty_put_char() */
100	int rx_buflimit;	99	int rx_buflimit;
101	spinlock_t read_lock;	100	spinlock_t read_lock;
102	u8 notification_buffer; / to reassemble fragmented notifications */	101	u8 notification_buffer; / to reassemble fragmented notifications */

drivers/usb/common/common.c+25−0

@@ -246,6 +246,31 @@ int of_usb_update_otg_caps(struct device_node *np, · 245 unmodified lines
246	}	246	}
247	EXPORT_SYMBOL_GPL(of_usb_update_otg_caps);	247	EXPORT_SYMBOL_GPL(of_usb_update_otg_caps);
248		248
		249	/**
		250	* usb_of_get_companion_dev - Find the companion device
		251	* @dev: the device pointer to find a companion
		252	*
		253	* Find the companion device from platform bus.
		254	*
		255	* Takes a reference to the returned struct device which needs to be dropped
		256	* after use.
		257	*
		258	* Return: On success, a pointer to the companion device, %NULL on failure.
		259	*/
		260	struct device usb_of_get_companion_dev(struct device dev)
		261	{
		262	struct device_node *node;
		263	struct platform_device *pdev = NULL;
		264
		265	node = of_parse_phandle(dev->of_node, "companion", 0);
		266	if (node)
		267	pdev = of_find_device_by_node(node);
		268
		269	of_node_put(node);
		270
		271	return pdev ? &pdev->dev : NULL;
		272	}
		273	EXPORT_SYMBOL_GPL(usb_of_get_companion_dev);
249	#endif	274	#endif
250		275
251	MODULE_LICENSE("GPL");	276	MODULE_LICENSE("GPL");

drivers/usb/common/roles.c+12−3

@@ -109,8 +109,15 @@ static void usb_role_switch_match(struct device_connection con, int ep, · 108 unmodified lines
109	*/	109	*/
110	struct usb_role_switch usb_role_switch_get(struct device dev)	110	struct usb_role_switch usb_role_switch_get(struct device dev)
111	{	111	{
112	return device_connection_find_match(dev, "usb-role-switch", NULL,	112	struct usb_role_switch *sw;
113	usb_role_switch_match);	113
		114	sw = device_connection_find_match(dev, "usb-role-switch", NULL,
		115	usb_role_switch_match);
		116
		117	if (!IS_ERR_OR_NULL(sw))
		118	WARN_ON(!try_module_get(sw->dev.parent->driver->owner));
		119
		120	return sw;
114	}	121	}
115	EXPORT_SYMBOL_GPL(usb_role_switch_get);	122	EXPORT_SYMBOL_GPL(usb_role_switch_get);
116		123
@@ -122,8 +129,10 @@ EXPORT_SYMBOL_GPL(usb_role_switch_get); · 5 unmodified lines
122	*/	129	*/
123	void usb_role_switch_put(struct usb_role_switch *sw)	130	void usb_role_switch_put(struct usb_role_switch *sw)
124	{	131	{
125	if (!IS_ERR_OR_NULL(sw))	132	if (!IS_ERR_OR_NULL(sw)) {
126	put_device(&sw->dev);	133	put_device(&sw->dev);
		134	module_put(sw->dev.parent->driver->owner);
		135	}
127	}	136	}
128	EXPORT_SYMBOL_GPL(usb_role_switch_put);	137	EXPORT_SYMBOL_GPL(usb_role_switch_put);
129		138

drivers/usb/core/devio.c+21−3

 	struct async *as = NULL;
 	struct usb_ctrlrequest *dr = NULL;
 	unsigned int u, totlen, isofrmlen;
-	int i, ret, is_in, num_sgs = 0, ifnum = -1;
+	int i, ret, num_sgs = 0, ifnum = -1;
 	int number_of_packets = 0;
 	unsigned int stream_id = 0;
 	void *buf;
+	bool is_in;
+	bool allow_short = false;
+	bool allow_zero = false;
 	unsigned long mask =	USBDEVFS_URB_SHORT_NOT_OK |
 				USBDEVFS_URB_BULK_CONTINUATION |
 				USBDEVFS_URB_NO_FSBR |
 	u = 0;
 	switch (uurb->type) {
 	case USBDEVFS_URB_TYPE_CONTROL:
+		if (is_in)
+			allow_short = true;
 		if (!usb_endpoint_xfer_control(&ep->desc))
 			return -EINVAL;
 		/* min 8 byte setup packet */
 		break;
 	case USBDEVFS_URB_TYPE_BULK:
+		if (!is_in)
+			allow_zero = true;
+		else
+			allow_short = true;
 		switch (usb_endpoint_type(&ep->desc)) {
 		case USB_ENDPOINT_XFER_CONTROL:
 		case USB_ENDPOINT_XFER_ISOC:
 		if (!usb_endpoint_xfer_int(&ep->desc))
 			return -EINVAL;
  interrupt_urb:
+		if (!is_in)
+			allow_zero = true;
+		else
+			allow_short = true;
 		break;
 	case USBDEVFS_URB_TYPE_ISO:
 	u = (is_in ? URB_DIR_IN : URB_DIR_OUT);
 	if (uurb->flags & USBDEVFS_URB_ISO_ASAP)
 		u |= URB_ISO_ASAP;
-	if (uurb->flags & USBDEVFS_URB_SHORT_NOT_OK && is_in)
+	if (allow_short && uurb->flags & USBDEVFS_URB_SHORT_NOT_OK)
 		u |= URB_SHORT_NOT_OK;
-	if (uurb->flags & USBDEVFS_URB_ZERO_PACKET)
+	if (allow_zero && uurb->flags & USBDEVFS_URB_ZERO_PACKET)
 		u |= URB_ZERO_PACKET;
 	if (uurb->flags & USBDEVFS_URB_NO_INTERRUPT)
 		u |= URB_NO_INTERRUPT;
 	as->urb->transfer_flags = u;
+	if (!allow_short && uurb->flags & USBDEVFS_URB_SHORT_NOT_OK)
+		dev_warn(&ps->dev->dev, "Requested nonsensical USBDEVFS_URB_SHORT_NOT_OK.\n");
+	if (!allow_zero && uurb->flags & USBDEVFS_URB_ZERO_PACKET)
+		dev_warn(&ps->dev->dev, "Requested nonsensical USBDEVFS_URB_ZERO_PACKET.\n");
 	as->urb->transfer_buffer_length = uurb->buffer_length;
 	as->urb->setup_packet = (unsigned char *)dr;
 	dr = NULL;

drivers/usb/core/driver.c+14−14

 	struct device *dev;
 	struct usb_device *udev;
 	int retval = 0;
-	int lpm_disable_error = -ENODEV;
 	if (!iface)
 		return -ENODEV;
 	iface->condition = USB_INTERFACE_BOUND;
-	/* See the comment about disabling LPM in usb_probe_interface(). */
-	if (driver->disable_hub_initiated_lpm) {
-		lpm_disable_error = usb_unlocked_disable_lpm(udev);
-		if (lpm_disable_error) {
-			dev_err(&iface->dev, "%s Failed to disable LPM for driver %s\n",
-				__func__, driver->name);
-			return -ENOMEM;
-		}
-	}
 	/* Claimed interfaces are initially inactive (suspended) and
 	 * runtime-PM-enabled, but only if the driver has autosuspend
 	 * support.  Otherwise they are marked active, to prevent the
 	if (device_is_registered(dev))
 		retval = device_bind_driver(dev);
-	/* Attempt to re-enable USB3 LPM, if the disable was successful. */
+	if (retval) {
-	if (!lpm_disable_error)
+		dev->driver = NULL;
-		usb_unlocked_enable_lpm(udev);
+		usb_set_intfdata(iface, NULL);
+		iface->needs_remote_wakeup = 0;
+		iface->condition = USB_INTERFACE_UNBOUND;
+		/*
+		 * Unbound interfaces are always runtime-PM-disabled
+		 * and runtime-PM-suspended
+		 */
+		if (driver->supports_autosuspend)
+			pm_runtime_disable(dev);
+		pm_runtime_set_suspended(dev);
+	}
 	return retval;
 }

drivers/usb/core/hcd-pci.c+0−2

 				event == PM_EVENT_RESTORE);
 		if (retval) {
 			dev_err(dev, "PCI post-resume error %d!\n", retval);
-			if (hcd->shared_hcd)
-				usb_hc_died(hcd->shared_hcd);
 			usb_hc_died(hcd);
 		}
 	}

drivers/usb/core/message.c+11−0

  * is submitted that needs that bandwidth.  Some other operating systems
  * allocate bandwidth early, when a configuration is chosen.
  *
+ * xHCI reserves bandwidth and configures the alternate setting in
+ * usb_hcd_alloc_bandwidth(). If it fails the original interface altsetting
+ * may be disabled. Drivers cannot rely on any particular alternate
+ * setting being in effect after a failure.
+ *
  * This call is synchronous, and may not be used in an interrupt context.
  * Also, drivers must not change altsettings while urbs are scheduled for
  * endpoints in that interface; all such urbs must first be completed
 			 alternate);
 		return -EINVAL;
 	}
+	/*
+	 * usb3 hosts configure the interface in usb_hcd_alloc_bandwidth,
+	 * including freeing dropped endpoint ring buffers.
+	 * Make sure the interface endpoints are flushed before that
+	 */
+	usb_disable_interface(dev, iface, false);
 	/* Make sure we have enough bandwidth for this alternate interface.
 	 * Remove the current alt setting and add the new alt setting.

drivers/usb/core/of.c+0−26

@@ -105,29 +105,3 @@ usb_of_get_interface_node(struct usb_device *udev, u8 config, u8 ifnum) · 104 unmodified lines
105	return NULL;	105	return NULL;
106	}	106	}
107	EXPORT_SYMBOL_GPL(usb_of_get_interface_node);	107	EXPORT_SYMBOL_GPL(usb_of_get_interface_node);
108
109	/**
110	* usb_of_get_companion_dev - Find the companion device
111	* @dev: the device pointer to find a companion
112	*
113	* Find the companion device from platform bus.
114	*
115	* Takes a reference to the returned struct device which needs to be dropped
116	* after use.
117	*
118	* Return: On success, a pointer to the companion device, %NULL on failure.
119	*/
120	struct device usb_of_get_companion_dev(struct device dev)
121	{
122	struct device_node *node;
123	struct platform_device *pdev = NULL;
124
125	node = of_parse_phandle(dev->of_node, "companion", 0);
126	if (node)
127	pdev = of_find_device_by_node(node);
128
129	of_node_put(node);
130
131	return pdev ? &pdev->dev : NULL;
132	}
133	EXPORT_SYMBOL_GPL(usb_of_get_companion_dev);

drivers/usb/core/quirks.c+9−1

 	quirk_list = kcalloc(quirk_count, sizeof(struct quirk_entry),
 			     GFP_KERNEL);
 	if (!quirk_list) {
+		quirk_count = 0;
 		mutex_unlock(&quirk_mutex);
 		return -ENOMEM;
 	}
 	.string = quirks_param,
 };
-module_param_cb(quirks, &quirks_param_ops, &quirks_param_string, 0644);
+device_param_cb(quirks, &quirks_param_ops, &quirks_param_string, 0644);
 MODULE_PARM_DESC(quirks, "Add/modify USB quirks by specifying quirks=vendorID:productID:quirks");
 /* Lists of quirky USB devices, split in device quirks and interface quirks.
 	/* CBM - Flash disk */
 	{ USB_DEVICE(0x0204, 0x6025), .driver_info = USB_QUIRK_RESET_RESUME },
+	/* WORLDE Controller KS49 or Prodipe MIDI 49C USB controller */
+	{ USB_DEVICE(0x0218, 0x0201), .driver_info =
+			USB_QUIRK_CONFIG_INTF_STRINGS },
 	/* WORLDE easy key (easykey.25) MIDI controller  */
 	{ USB_DEVICE(0x0218, 0x0401), .driver_info =
 			USB_QUIRK_CONFIG_INTF_STRINGS },
 	{ USB_DEVICE(0x2040, 0x7200), .driver_info =
 			USB_QUIRK_CONFIG_INTF_STRINGS },
+	/* DJI CineSSD */
+	{ USB_DEVICE(0x2ca3, 0x0031), .driver_info = USB_QUIRK_NO_LPM },
 	/* INTEL VALUE SSD */
 	{ USB_DEVICE(0x8086, 0xf1a5), .driver_info = USB_QUIRK_RESET_RESUME },

drivers/usb/core/usb.c+2−0

@@ -228,6 +228,8 @@ struct usb_host_interface *usb_find_alt_setting( · 227 unmodified lines
228	struct usb_interface_cache *intf_cache = NULL;	228	struct usb_interface_cache *intf_cache = NULL;
229	int i;	229	int i;
230		230
		231	if (!config)
		232	return NULL;
231	for (i = 0; i < config->desc.bNumInterfaces; i++) {	233	for (i = 0; i < config->desc.bNumInterfaces; i++) {
232	if (config->intf_cache[i]->altsetting[0].desc.bInterfaceNumber	234	if (config->intf_cache[i]->altsetting[0].desc.bInterfaceNumber
233	== iface_num) {	235	== iface_num) {

drivers/usb/dwc2/platform.c+2−2

 	dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
 		(unsigned long)res->start, hsotg->regs);
-	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
 	retval = dwc2_lowlevel_hw_init(hsotg);
 	if (retval)
 		return retval;
 	if (retval)
 		return retval;
+	hsotg->needs_byte_swap = dwc2_check_core_endianness(hsotg);
 	retval = dwc2_get_dr_mode(hsotg);
 	if (retval)
 		goto error;

drivers/usb/dwc3/dwc3-of-simple.c+4−6

 	return 0;
 }
-#ifdef CONFIG_PM
+static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
-static int dwc3_of_simple_runtime_suspend(struct device *dev)
 {
 	struct dwc3_of_simple	*simple = dev_get_drvdata(dev);
 	int			i;
 	return 0;
 }
-static int dwc3_of_simple_runtime_resume(struct device *dev)
+static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
 {
 	struct dwc3_of_simple	*simple = dev_get_drvdata(dev);
 	int			ret;
 	return 0;
 }
-static int dwc3_of_simple_suspend(struct device *dev)
+static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
 {
 	struct dwc3_of_simple *simple = dev_get_drvdata(dev);
 	return 0;
 }
-static int dwc3_of_simple_resume(struct device *dev)
+static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
 {
 	struct dwc3_of_simple *simple = dev_get_drvdata(dev);
 	return 0;
 }
-#endif
 static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
 	SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)

drivers/usb/dwc3/dwc3-pci.c+2−2

@@ -85,8 +85,8 @@ static int dwc3_byt_enable_ulpi_refclock(struct pci_dev *pci) · 84 unmodified lines
85	u32 value;	85	u32 value;
86		86
87	reg = pcim_iomap(pci, GP_RWBAR, 0);	87	reg = pcim_iomap(pci, GP_RWBAR, 0);
88	if (IS_ERR(reg))	88	if (!reg)
89	return PTR_ERR(reg);	89	return -ENOMEM;
90		90
91	value = readl(reg + GP_RWREG1);	91	value = readl(reg + GP_RWREG1);
92	if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))	92	if (!(value & GP_RWREG1_ULPI_REFCLK_DISABLE))

drivers/usb/dwc3/gadget.c+0−1

@@ -473,7 +473,6 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3_ep *dep) · 472 unmodified lines
473		473
474	/**	474	/**
475	* dwc3_gadget_start_config - configure ep resources	475	* dwc3_gadget_start_config - configure ep resources
476	* @dwc: pointer to our controller context structure
477	* @dep: endpoint that is being enabled	476	* @dep: endpoint that is being enabled
478	*	477	*
479	* Issue a %DWC3_DEPCMD_DEPSTARTCFG command to @dep. After the command's	478	* Issue a %DWC3_DEPCMD_DEPSTARTCFG command to @dep. After the command's

drivers/usb/gadget/udc/fotg210-udc.c+10−5

 static int fotg210_udc_remove(struct platform_device *pdev)
 {
 	struct fotg210_udc *fotg210 = platform_get_drvdata(pdev);
+	int i;
 	usb_del_gadget_udc(&fotg210->gadget);
 	iounmap(fotg210->reg);
 	free_irq(platform_get_irq(pdev, 0), fotg210);
 	fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
+	for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
+		kfree(fotg210->ep[i]);
 	kfree(fotg210);
 	return 0;
 	/* initialize udc */
 	fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL);
 	if (fotg210 == NULL)
-		goto err_alloc;
+		goto err;
 	for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
 		_ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL);
 	fotg210->reg = ioremap(res->start, resource_size(res));
 	if (fotg210->reg == NULL) {
 		pr_err("ioremap error.\n");
-		goto err_map;
+		goto err_alloc;
 	}
 	spin_lock_init(&fotg210->lock);
 	fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep,
 				GFP_KERNEL);
 	if (fotg210->ep0_req == NULL)
-		goto err_req;
+		goto err_map;
 	fotg210_init(fotg210);
 	fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
 err_map:
-	if (fotg210->reg)
+	iounmap(fotg210->reg);
-		iounmap(fotg210->reg);
 err_alloc:
+	for (i = 0; i < FOTG210_MAX_NUM_EP; i++)
+		kfree(fotg210->ep[i]);
 	kfree(fotg210);
+err:
 	return ret;
 }

drivers/usb/gadget/udc/net2280.c+14−2

 		writel(tmp | BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
 	} else {
 		writel(tmp & ~BIT(USB_DETECT_ENABLE), &dev->usb->usbctl);
-		stop_activity(dev, dev->driver);
+		stop_activity(dev, NULL);
 	}
 	spin_unlock_irqrestore(&dev->lock, flags);
+	if (!is_on && dev->driver)
+		dev->driver->disconnect(&dev->gadget);
 	return 0;
 }
 		nuke(&dev->ep[i]);
 	/* report disconnect; the driver is already quiesced */
-	if (driver)
+	if (driver) {
+		spin_unlock(&dev->lock);
 		driver->disconnect(&dev->gadget);
+		spin_lock(&dev->lock);
+	}
 	usb_reinit(dev);
 }
 		BIT(PCI_RETRY_ABORT_INTERRUPT))
 static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
+__releases(dev->lock)
+__acquires(dev->lock)
 {
 	struct net2280_ep	*ep;
 	u32			tmp, num, mask, scratch;
 			if (disconnect || reset) {
 				stop_activity(dev, dev->driver);
 				ep0_start(dev);
+				spin_unlock(&dev->lock);
 				if (reset)
 					usb_gadget_udc_reset
 						(&dev->gadget, dev->driver);
 				else
 					(dev->driver->disconnect)
 						(&dev->gadget);
+				spin_lock(&dev->lock);
 				return;
 			}
 		}
 	tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
 	if (stat & tmp) {
 		writel(tmp, &dev->regs->irqstat1);
+		spin_unlock(&dev->lock);
 		if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
 			if (dev->driver->suspend)
 				dev->driver->suspend(&dev->gadget);
 				dev->driver->resume(&dev->gadget);
 			/* at high speed, note erratum 0133 */
 		}
+		spin_lock(&dev->lock);
 		stat &= ~tmp;
 	}

drivers/usb/gadget/udc/renesas_usb3.c+4−1

 	switch (speed) {
 	case USB_STA_SPEED_SS:
 		usb3->gadget.speed = USB_SPEED_SUPER;
+		usb3->gadget.ep0->maxpacket = USB3_EP0_SS_MAX_PACKET_SIZE;
 		break;
 	case USB_STA_SPEED_HS:
 		usb3->gadget.speed = USB_SPEED_HIGH;
+		usb3->gadget.ep0->maxpacket = USB3_EP0_HSFS_MAX_PACKET_SIZE;
 		break;
 	case USB_STA_SPEED_FS:
 		usb3->gadget.speed = USB_SPEED_FULL;
+		usb3->gadget.ep0->maxpacket = USB3_EP0_HSFS_MAX_PACKET_SIZE;
 		break;
 	default:
 		usb3->gadget.speed = USB_SPEED_UNKNOWN;
 			/* for control pipe */
 			usb3->gadget.ep0 = &usb3_ep->ep;
 			usb_ep_set_maxpacket_limit(&usb3_ep->ep,
-						USB3_EP0_HSFS_MAX_PACKET_SIZE);
+						USB3_EP0_SS_MAX_PACKET_SIZE);
 			usb3_ep->ep.caps.type_control = true;
 			usb3_ep->ep.caps.dir_in = true;
 			usb3_ep->ep.caps.dir_out = true;

drivers/usb/host/u132-hcd.c+1−1

@@ -2555,7 +2555,7 @@ static int u132_get_frame(struct usb_hcd *hcd) · 2554 unmodified lines
2555	} else {	2555	} else {
2556	int frame = 0;	2556	int frame = 0;
2557	dev_err(&u132->platform_dev->dev, "TODO: u132_get_frame\n");	2557	dev_err(&u132->platform_dev->dev, "TODO: u132_get_frame\n");
2558	msleep(100);	2558	mdelay(100);
2559	return frame;	2559	return frame;
2560	}	2560	}
2561	}	2561	}

drivers/usb/host/xhci-mem.c+4−0

 	in_ep_ctx->ep_info2 = out_ep_ctx->ep_info2;
 	in_ep_ctx->deq = out_ep_ctx->deq;
 	in_ep_ctx->tx_info = out_ep_ctx->tx_info;
+	if (xhci->quirks & XHCI_MTK_HOST) {
+		in_ep_ctx->reserved[0] = out_ep_ctx->reserved[0];
+		in_ep_ctx->reserved[1] = out_ep_ctx->reserved[1];
+	}
 }
 /* Copy output xhci_slot_ctx to the input xhci_slot_ctx.

drivers/usb/host/xhci-plat.c+16−11

@@ -153,7 +153,7 @@ static int xhci_plat_probe(struct platform_device *pdev) · 152 unmodified lines
153	{	153	{
154	const struct xhci_plat_priv *priv_match;	154	const struct xhci_plat_priv *priv_match;
155	const struct hc_driver *driver;	155	const struct hc_driver *driver;
156	struct device *sysdev;	156	struct device sysdev, tmpdev;
157	struct xhci_hcd *xhci;	157	struct xhci_hcd *xhci;
158	struct resource *res;	158	struct resource *res;
159	struct usb_hcd *hcd;	159	struct usb_hcd *hcd;
@@ -273,19 +273,24 @@ static int xhci_plat_probe(struct platform_device *pdev) · 113 unmodified lines
273	goto disable_clk;	273	goto disable_clk;
274	}	274	}
275		275
276	if (device_property_read_bool(sysdev, "usb2-lpm-disable"))	276	/* imod_interval is the interrupt moderation value in nanoseconds. */
277	xhci->quirks \|= XHCI_HW_LPM_DISABLE;	277	xhci->imod_interval = 40000;
278		278
279	if (device_property_read_bool(sysdev, "usb3-lpm-capable"))	279	/* Iterate over all parent nodes for finding quirks */
280	xhci->quirks \|= XHCI_LPM_SUPPORT;	280	for (tmpdev = &pdev->dev; tmpdev; tmpdev = tmpdev->parent) {
281		281
282	if (device_property_read_bool(&pdev->dev, "quirk-broken-port-ped"))	282	if (device_property_read_bool(tmpdev, "usb2-lpm-disable"))
283	xhci->quirks \|= XHCI_BROKEN_PORT_PED;	283	xhci->quirks \|= XHCI_HW_LPM_DISABLE;
284		284
285	/* imod_interval is the interrupt moderation value in nanoseconds. */	285	if (device_property_read_bool(tmpdev, "usb3-lpm-capable"))
286	xhci->imod_interval = 40000;	286	xhci->quirks \|= XHCI_LPM_SUPPORT;
287	device_property_read_u32(sysdev, "imod-interval-ns",	287
288	&xhci->imod_interval);	288	if (device_property_read_bool(tmpdev, "quirk-broken-port-ped"))
		289	xhci->quirks \|= XHCI_BROKEN_PORT_PED;
		290
		291	device_property_read_u32(tmpdev, "imod-interval-ns",
		292	&xhci->imod_interval);
		293	}
289		294
290	hcd->usb_phy = devm_usb_get_phy_by_phandle(sysdev, "usb-phy", 0);	295	hcd->usb_phy = devm_usb_get_phy_by_phandle(sysdev, "usb-phy", 0);
291	if (IS_ERR(hcd->usb_phy)) {	296	if (IS_ERR(hcd->usb_phy)) {

drivers/usb/host/xhci.c+30−0

@@ -37,6 +37,21 @@ static unsigned long long quirks; · 36 unmodified lines
37	module_param(quirks, ullong, S_IRUGO);	37	module_param(quirks, ullong, S_IRUGO);
38	MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");	38	MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
39		39
		40	static bool td_on_ring(struct xhci_td td, struct xhci_ring ring)
		41	{
		42	struct xhci_segment *seg = ring->first_seg;
		43
		44	if (!td \|\| !td->start_seg)
		45	return false;
		46	do {
		47	if (seg == td->start_seg)
		48	return true;
		49	seg = seg->next;
		50	} while (seg && seg != ring->first_seg);
		51
		52	return false;
		53	}
		54
40	/* TODO: copied from ehci-hcd.c - can this be refactored? */	55	/* TODO: copied from ehci-hcd.c - can this be refactored? */
41	/*	56	/*
42	* xhci_handshake - spin reading hc until handshake completes or fails	57	* xhci_handshake - spin reading hc until handshake completes or fails
@@ -1571,6 +1586,21 @@ static int xhci_urb_dequeue(struct usb_hcd hcd, struct urb urb, int status) · 1528 unmodified lines
1571	goto done;	1586	goto done;
1572	}	1587	}
1573		1588
		1589	/*
		1590	* check ring is not re-allocated since URB was enqueued. If it is, then
		1591	* make sure none of the ring related pointers in this URB private data
		1592	* are touched, such as td_list, otherwise we overwrite freed data
		1593	*/
		1594	if (!td_on_ring(&urb_priv->td[0], ep_ring)) {
		1595	xhci_err(xhci, "Canceled URB td not found on endpoint ring");
		1596	for (i = urb_priv->num_tds_done; i < urb_priv->num_tds; i++) {
		1597	td = &urb_priv->td[i];
		1598	if (!list_empty(&td->cancelled_td_list))
		1599	list_del_init(&td->cancelled_td_list);
		1600	}
		1601	goto err_giveback;
		1602	}
		1603
1574	if (xhci->xhc_state & XHCI_STATE_HALTED) {	1604	if (xhci->xhc_state & XHCI_STATE_HALTED) {
1575	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,	1605	xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1576	"HC halted, freeing TD manually.");	1606	"HC halted, freeing TD manually.");

drivers/usb/misc/uss720.c+2−2

@@ -369,7 +369,7 @@ static unsigned char parport_uss720_frob_control(struct parport *pp, unsigned ch · 368 unmodified lines
369	mask &= 0x0f;	369	mask &= 0x0f;
370	val &= 0x0f;	370	val &= 0x0f;
371	d = (priv->reg[1] & (~mask)) ^ val;	371	d = (priv->reg[1] & (~mask)) ^ val;
372	if (set_1284_register(pp, 2, d, GFP_KERNEL))	372	if (set_1284_register(pp, 2, d, GFP_ATOMIC))
373	return 0;	373	return 0;
374	priv->reg[1] = d;	374	priv->reg[1] = d;
375	return d & 0xf;	375	return d & 0xf;
@@ -379,7 +379,7 @@ static unsigned char parport_uss720_read_status(struct parport *pp) · 3 unmodified lines
379	{	379	{
380	unsigned char ret;	380	unsigned char ret;
381		381
382	if (get_1284_register(pp, 1, &ret, GFP_KERNEL))	382	if (get_1284_register(pp, 1, &ret, GFP_ATOMIC))
383	return 0;	383	return 0;
384	return ret & 0xf8;	384	return ret & 0xf8;
385	}	385	}

drivers/usb/misc/yurex.c+6−2

 	spin_unlock_irqrestore(&dev->lock, flags);
 	mutex_unlock(&dev->io_mutex);
+	if (WARN_ON_ONCE(len >= sizeof(in_buffer)))
+		return -EIO;
 	return simple_read_from_buffer(buffer, count, ppos, in_buffer, len);
 }
 {
 	struct usb_yurex *dev;
 	int i, set = 0, retval = 0;
-	char buffer[16];
+	char buffer[16 + 1];
 	char *data = buffer;
 	unsigned long long c, c2 = 0;
 	signed long timeout = 0;
 	DEFINE_WAIT(wait);
-	count = min(sizeof(buffer), count);
+	count = min(sizeof(buffer) - 1, count);
 	dev = file->private_data;
 	/* verify that we actually have some data to write */
 		retval = -EFAULT;
 		goto error;
 	}
+	buffer[count] = 0;
 	memset(dev->cntl_buffer, CMD_PADDING, YUREX_BUF_SIZE);
 	switch (buffer[0]) {

drivers/usb/mtu3/mtu3_core.c+5−1

 		(SSUSB_U2_PORT_DIS | SSUSB_U2_PORT_PDN |
 		SSUSB_U2_PORT_HOST_SEL));
-	if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG)
+	if (mtu->ssusb->dr_mode == USB_DR_MODE_OTG) {
 		mtu3_setbits(ibase, SSUSB_U2_CTRL(0), SSUSB_U2_PORT_OTG_SEL);
+		if (mtu->is_u3_ip)
+			mtu3_setbits(ibase, SSUSB_U3_CTRL(0),
+				     SSUSB_U3_PORT_DUAL_MODE);
+	}
 	return ssusb_check_clocks(mtu->ssusb, check_clk);
 }

drivers/usb/mtu3/mtu3_hw_regs.h+1−0

@@ -459,6 +459,7 @@ · 458 unmodified lines
459		459
460	/* U3D_SSUSB_U3_CTRL_0P */	460	/* U3D_SSUSB_U3_CTRL_0P */
461	#define SSUSB_U3_PORT_SSP_SPEED BIT(9)	461	#define SSUSB_U3_PORT_SSP_SPEED BIT(9)
		462	#define SSUSB_U3_PORT_DUAL_MODE BIT(7)
462	#define SSUSB_U3_PORT_HOST_SEL BIT(2)	463	#define SSUSB_U3_PORT_HOST_SEL BIT(2)
463	#define SSUSB_U3_PORT_PDN BIT(1)	464	#define SSUSB_U3_PORT_PDN BIT(1)
464	#define SSUSB_U3_PORT_DIS BIT(0)	465	#define SSUSB_U3_PORT_DIS BIT(0)

drivers/usb/musb/musb_dsps.c+1−11

 	return controller;
 }
-static void dsps_dma_controller_destroy(struct dma_controller *c)
-{
-	struct musb *musb = c->musb;
-	struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent);
-	void __iomem *usbss_base = glue->usbss_base;
-	musb_writel(usbss_base, USBSS_IRQ_CLEARR, USBSS_IRQ_PD_COMP);
-	cppi41_dma_controller_destroy(c);
-}
 #ifdef CONFIG_PM_SLEEP
 static void dsps_dma_controller_suspend(struct dsps_glue *glue)
 {
 #ifdef CONFIG_USB_TI_CPPI41_DMA
 	.dma_init	= dsps_dma_controller_create,
-	.dma_exit	= dsps_dma_controller_destroy,
+	.dma_exit	= cppi41_dma_controller_destroy,
 #endif
 	.enable		= dsps_musb_enable,
 	.disable	= dsps_musb_disable,

drivers/usb/serial/io_ti.h+1−1

@@ -173,7 +173,7 @@ struct ump_interrupt { · 172 unmodified lines
173	} __attribute__((packed));	173	} __attribute__((packed));
174		174
175		175
176	#define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3)	176	#define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 6) & 0x01)
177	#define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)	177	#define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f)
178	#define TIUMP_INTERRUPT_CODE_LSR 0x03	178	#define TIUMP_INTERRUPT_CODE_LSR 0x03
179	#define TIUMP_INTERRUPT_CODE_MSR 0x04	179	#define TIUMP_INTERRUPT_CODE_MSR 0x04

drivers/usb/serial/ti_usb_3410_5052.c+1−1

@@ -1119,7 +1119,7 @@ static void ti_break(struct tty_struct *tty, int break_state) · 1118 unmodified lines
1119		1119
1120	static int ti_get_port_from_code(unsigned char code)	1120	static int ti_get_port_from_code(unsigned char code)
1121	{	1121	{
1122	return (code >> 4) - 3;	1122	return (code >> 6) & 0x01;
1123	}	1123	}
1124		1124
1125	static int ti_get_func_from_code(unsigned char code)	1125	static int ti_get_func_from_code(unsigned char code)

drivers/usb/storage/scsiglue.c+9−0

@@ -376,6 +376,15 @@ static int queuecommand_lck(struct scsi_cmnd *srb, · 375 unmodified lines
376	return 0;	376	return 0;
377	}	377	}
378		378
		379	if ((us->fflags & US_FL_NO_ATA_1X) &&
		380	(srb->cmnd[0] == ATA_12 \|\| srb->cmnd[0] == ATA_16)) {
		381	memcpy(srb->sense_buffer, usb_stor_sense_invalidCDB,
		382	sizeof(usb_stor_sense_invalidCDB));
		383	srb->result = SAM_STAT_CHECK_CONDITION;
		384	done(srb);
		385	return 0;
		386	}
		387
379	/* enqueue the command and wake up the control thread */	388	/* enqueue the command and wake up the control thread */
380	srb->scsi_done = done;	389	srb->scsi_done = done;
381	us->srb = srb;	390	us->srb = srb;

drivers/usb/storage/uas.c+21−0

@@ -842,6 +842,27 @@ static int uas_slave_configure(struct scsi_device *sdev) · 841 unmodified lines
842	sdev->skip_ms_page_8 = 1;	842	sdev->skip_ms_page_8 = 1;
843	sdev->wce_default_on = 1;	843	sdev->wce_default_on = 1;
844	}	844	}
		845
		846	/*
		847	* Some disks return the total number of blocks in response
		848	* to READ CAPACITY rather than the highest block number.
		849	* If this device makes that mistake, tell the sd driver.
		850	*/
		851	if (devinfo->flags & US_FL_FIX_CAPACITY)
		852	sdev->fix_capacity = 1;
		853
		854	/*
		855	* Some devices don't like MODE SENSE with page=0x3f,
		856	* which is the command used for checking if a device
		857	* is write-protected. Now that we tell the sd driver
		858	* to do a 192-byte transfer with this command the
		859	* majority of devices work fine, but a few still can't
		860	* handle it. The sd driver will simply assume those
		861	* devices are write-enabled.
		862	*/
		863	if (devinfo->flags & US_FL_NO_WP_DETECT)
		864	sdev->skip_ms_page_3f = 1;
		865
845	scsi_change_queue_depth(sdev, devinfo->qdepth - 2);	866	scsi_change_queue_depth(sdev, devinfo->qdepth - 2);
846	return 0;	867	return 0;
847	}	868	}

drivers/usb/storage/unusual_devs.h+7−0

@@ -2288,6 +2288,13 @@ UNUSUAL_DEV( 0x2735, 0x100b, 0x0000, 0x9999, · 2287 unmodified lines
2288	USB_SC_DEVICE, USB_PR_DEVICE, NULL,	2288	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
2289	US_FL_GO_SLOW ),	2289	US_FL_GO_SLOW ),
2290		2290
		2291	/* Reported-by: Tim Anderson <tsa@biglakesoftware.com> */
		2292	UNUSUAL_DEV( 0x2ca3, 0x0031, 0x0000, 0x9999,
		2293	"DJI",
		2294	"CineSSD",
		2295	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
		2296	US_FL_NO_ATA_1X),
		2297
2291	/*	2298	/*
2292	* Reported by Frederic Marchal <frederic.marchal@wowcompany.com>	2299	* Reported by Frederic Marchal <frederic.marchal@wowcompany.com>
2293	* Mio Moov 330	2300	* Mio Moov 330

drivers/usb/typec/bus.c+4−3

 /* API for the port drivers */
 /**
- * typec_match_altmode - Match SVID to an array of alternate modes
+ * typec_match_altmode - Match SVID and mode to an array of alternate modes
  * @altmodes: Array of alternate modes
- * @n: Number of elements in the array, or -1 for NULL termiated arrays
+ * @n: Number of elements in the array, or -1 for NULL terminated arrays
  * @svid: Standard or Vendor ID to match with
+ * @mode: Mode to match with
  *
- * Return pointer to an alternate mode with SVID mathing @svid, or NULL when no
+ * Return pointer to an alternate mode with SVID matching @svid, or NULL when no
  * match is found.
  */
 struct typec_altmode *typec_match_altmode(struct typec_altmode **altmodes,

drivers/usb/typec/class.c+0−1

@@ -1484,7 +1484,6 @@ EXPORT_SYMBOL_GPL(typec_set_mode); · 1483 unmodified lines
1484	* typec_port_register_altmode - Register USB Type-C Port Alternate Mode	1484	* typec_port_register_altmode - Register USB Type-C Port Alternate Mode
1485	* @port: USB Type-C Port that supports the alternate mode	1485	* @port: USB Type-C Port that supports the alternate mode
1486	* @desc: Description of the alternate mode	1486	* @desc: Description of the alternate mode
1487	* @drvdata: Private pointer to driver specific info
1488	*	1487	*
1489	* This routine is used to register an alternate mode that @port is capable of	1488	* This routine is used to register an alternate mode that @port is capable of
1490	* supporting.	1489	* supporting.

drivers/usb/typec/mux.c+13−4

 #include <linux/device.h>
 #include <linux/list.h>
+#include <linux/module.h>
 #include <linux/mutex.h>
 #include <linux/usb/typec_mux.h>
 	mutex_lock(&switch_lock);
 	sw = device_connection_find_match(dev, "typec-switch", NULL,
 					  typec_switch_match);
-	if (!IS_ERR_OR_NULL(sw))
+	if (!IS_ERR_OR_NULL(sw)) {
+		WARN_ON(!try_module_get(sw->dev->driver->owner));
 		get_device(sw->dev);
+	}
 	mutex_unlock(&switch_lock);
 	return sw;
  */
 void typec_switch_put(struct typec_switch *sw)
 {
-	if (!IS_ERR_OR_NULL(sw))
+	if (!IS_ERR_OR_NULL(sw)) {
+		module_put(sw->dev->driver->owner);
 		put_device(sw->dev);
+	}
 }
 EXPORT_SYMBOL_GPL(typec_switch_put);
 	mutex_lock(&mux_lock);
 	mux = device_connection_find_match(dev, name, NULL, typec_mux_match);
-	if (!IS_ERR_OR_NULL(mux))
+	if (!IS_ERR_OR_NULL(mux)) {
+		WARN_ON(!try_module_get(mux->dev->driver->owner));
 		get_device(mux->dev);
+	}
 	mutex_unlock(&mux_lock);
 	return mux;
  */
 void typec_mux_put(struct typec_mux *mux)
 {
-	if (!IS_ERR_OR_NULL(mux))
+	if (!IS_ERR_OR_NULL(mux)) {
+		module_put(mux->dev->driver->owner);
 		put_device(mux->dev);
+	}
 }
 EXPORT_SYMBOL_GPL(typec_mux_put);

drivers/xen/Kconfig+7−3

 	  This value is used to allocate enough space in internal
 	  tables needed for physical memory administration.
-config XEN_SCRUB_PAGES
+config XEN_SCRUB_PAGES_DEFAULT
-	bool "Scrub pages before returning them to system"
+	bool "Scrub pages before returning them to system by default"
 	depends on XEN_BALLOON
 	default y
 	help
 	  Scrub pages before returning them to the system for reuse by
 	  other domains.  This makes sure that any confidential data
 	  is not accidentally visible to other domains.  Is it more
-	  secure, but slightly less efficient.
+	  secure, but slightly less efficient. This can be controlled with
+	  xen_scrub_pages=0 parameter and
+	  /sys/devices/system/xen_memory/xen_memory0/scrub_pages.
+	  This option only sets the default value.
 	  If in doubt, say yes.
 config XEN_DEV_EVTCHN

drivers/xen/cpu_hotplug.c+8−7

@@ -19,15 +19,16 @@ static void enable_hotplug_cpu(int cpu) · 18 unmodified lines
19		19
20	static void disable_hotplug_cpu(int cpu)	20	static void disable_hotplug_cpu(int cpu)
21	{	21	{
22	if (cpu_online(cpu)) {	22	if (!cpu_is_hotpluggable(cpu))
23	lock_device_hotplug();	23	return;
		24	lock_device_hotplug();
		25	if (cpu_online(cpu))
24	device_offline(get_cpu_device(cpu));	26	device_offline(get_cpu_device(cpu));
25	unlock_device_hotplug();	27	if (!cpu_online(cpu) && cpu_present(cpu)) {
26	}
27	if (cpu_present(cpu))
28	xen_arch_unregister_cpu(cpu);	28	xen_arch_unregister_cpu(cpu);
29		29	set_cpu_present(cpu, false);
30	set_cpu_present(cpu, false);	30	}
		31	unlock_device_hotplug();
31	}	32	}
32		33
33	static int vcpu_online(unsigned int cpu)	34	static int vcpu_online(unsigned int cpu)

drivers/xen/events/events_base.c+1−1

@@ -138,7 +138,7 @@ static int set_evtchn_to_irq(unsigned evtchn, unsigned irq) · 137 unmodified lines
138	clear_evtchn_to_irq_row(row);	138	clear_evtchn_to_irq_row(row);
139	}	139	}
140		140
141	evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)] = irq;	141	evtchn_to_irq[row][col] = irq;

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@@ -1352,18 +1352,18 @@ static int diskstats_show(struct seq_file seqf, void v) · 1351 unmodified lines
1352	part_stat_read(hd, ios[STAT_READ]),	1352	part_stat_read(hd, ios[STAT_READ]),
1353	part_stat_read(hd, merges[STAT_READ]),	1353	part_stat_read(hd, merges[STAT_READ]),
1354	part_stat_read(hd, sectors[STAT_READ]),	1354	part_stat_read(hd, sectors[STAT_READ]),
1355	jiffies_to_msecs(part_stat_read(hd, ticks[STAT_READ])),	1355	(unsigned int)part_stat_read_msecs(hd, STAT_READ),
1356	part_stat_read(hd, ios[STAT_WRITE]),	1356	part_stat_read(hd, ios[STAT_WRITE]),
1357	part_stat_read(hd, merges[STAT_WRITE]),	1357	part_stat_read(hd, merges[STAT_WRITE]),
1358	part_stat_read(hd, sectors[STAT_WRITE]),	1358	part_stat_read(hd, sectors[STAT_WRITE]),
1359	jiffies_to_msecs(part_stat_read(hd, ticks[STAT_WRITE])),	1359	(unsigned int)part_stat_read_msecs(hd, STAT_WRITE),
1360	inflight[0],	1360	inflight[0],
1361	jiffies_to_msecs(part_stat_read(hd, io_ticks)),	1361	jiffies_to_msecs(part_stat_read(hd, io_ticks)),
1362	jiffies_to_msecs(part_stat_read(hd, time_in_queue)),	1362	jiffies_to_msecs(part_stat_read(hd, time_in_queue)),
1363	part_stat_read(hd, ios[STAT_DISCARD]),	1363	part_stat_read(hd, ios[STAT_DISCARD]),
1364	part_stat_read(hd, merges[STAT_DISCARD]),	1364	part_stat_read(hd, merges[STAT_DISCARD]),
1365	part_stat_read(hd, sectors[STAT_DISCARD]),	1365	part_stat_read(hd, sectors[STAT_DISCARD]),
1366	jiffies_to_msecs(part_stat_read(hd, ticks[STAT_DISCARD]))	1366	(unsigned int)part_stat_read_msecs(hd, STAT_DISCARD)
1367	);	1367	);
1368	}	1368	}
1369	disk_part_iter_exit(&piter);	1369	disk_part_iter_exit(&piter);

@@ -136,18 +136,18 @@ ssize_t part_stat_show(struct device *dev, · 135 unmodified lines
136	part_stat_read(p, ios[STAT_READ]),	136	part_stat_read(p, ios[STAT_READ]),
137	part_stat_read(p, merges[STAT_READ]),	137	part_stat_read(p, merges[STAT_READ]),
138	(unsigned long long)part_stat_read(p, sectors[STAT_READ]),	138	(unsigned long long)part_stat_read(p, sectors[STAT_READ]),
139	jiffies_to_msecs(part_stat_read(p, ticks[STAT_READ])),	139	(unsigned int)part_stat_read_msecs(p, STAT_READ),
140	part_stat_read(p, ios[STAT_WRITE]),	140	part_stat_read(p, ios[STAT_WRITE]),
141	part_stat_read(p, merges[STAT_WRITE]),	141	part_stat_read(p, merges[STAT_WRITE]),
142	(unsigned long long)part_stat_read(p, sectors[STAT_WRITE]),	142	(unsigned long long)part_stat_read(p, sectors[STAT_WRITE]),
143	jiffies_to_msecs(part_stat_read(p, ticks[STAT_WRITE])),	143	(unsigned int)part_stat_read_msecs(p, STAT_WRITE),
144	inflight[0],	144	inflight[0],
145	jiffies_to_msecs(part_stat_read(p, io_ticks)),	145	jiffies_to_msecs(part_stat_read(p, io_ticks)),
146	jiffies_to_msecs(part_stat_read(p, time_in_queue)),	146	jiffies_to_msecs(part_stat_read(p, time_in_queue)),
147	part_stat_read(p, ios[STAT_DISCARD]),	147	part_stat_read(p, ios[STAT_DISCARD]),
148	part_stat_read(p, merges[STAT_DISCARD]),	148	part_stat_read(p, merges[STAT_DISCARD]),
149	(unsigned long long)part_stat_read(p, sectors[STAT_DISCARD]),	149	(unsigned long long)part_stat_read(p, sectors[STAT_DISCARD]),
150	jiffies_to_msecs(part_stat_read(p, ticks[STAT_DISCARD])));	150	(unsigned int)part_stat_read_msecs(p, STAT_DISCARD));
151	}	151	}
152		152
153	ssize_t part_inflight_show(struct device dev, struct device_attribute attr,	153	ssize_t part_inflight_show(struct device dev, struct device_attribute attr,

@@ -10422,7 +10422,7 @@ enum skl_power_gate { · 10421 unmodified lines
10422	_ICL_DSC0_PICTURE_PARAMETER_SET_4_PB, \	10422	_ICL_DSC0_PICTURE_PARAMETER_SET_4_PB, \
10423	_ICL_DSC0_PICTURE_PARAMETER_SET_4_PC)	10423	_ICL_DSC0_PICTURE_PARAMETER_SET_4_PC)
10424	#define ICL_DSC1_PICTURE_PARAMETER_SET_4(pipe) _MMIO_PIPE((pipe) - PIPE_B, \	10424	#define ICL_DSC1_PICTURE_PARAMETER_SET_4(pipe) _MMIO_PIPE((pipe) - PIPE_B, \
10425	_ICL_DSC0_PICTURE_PARAMETER_SET_4_PB, \	10425	_ICL_DSC1_PICTURE_PARAMETER_SET_4_PB, \
10426	_ICL_DSC1_PICTURE_PARAMETER_SET_4_PC)	10426	_ICL_DSC1_PICTURE_PARAMETER_SET_4_PC)
10427	#define DSC_INITIAL_DEC_DELAY(dec_delay) ((dec_delay) << 16)	10427	#define DSC_INITIAL_DEC_DELAY(dec_delay) ((dec_delay) << 16)
10428	#define DSC_INITIAL_XMIT_DELAY(xmit_delay) ((xmit_delay) << 0)	10428	#define DSC_INITIAL_XMIT_DELAY(xmit_delay) ((xmit_delay) << 0)
@@ -10437,7 +10437,7 @@ enum skl_power_gate { · 8 unmodified lines
10437	_ICL_DSC0_PICTURE_PARAMETER_SET_5_PB, \	10437	_ICL_DSC0_PICTURE_PARAMETER_SET_5_PB, \
10438	_ICL_DSC0_PICTURE_PARAMETER_SET_5_PC)	10438	_ICL_DSC0_PICTURE_PARAMETER_SET_5_PC)
10439	#define ICL_DSC1_PICTURE_PARAMETER_SET_5(pipe) _MMIO_PIPE((pipe) - PIPE_B, \	10439	#define ICL_DSC1_PICTURE_PARAMETER_SET_5(pipe) _MMIO_PIPE((pipe) - PIPE_B, \
10440	_ICL_DSC1_PICTURE_PARAMETER_SET_5_PC, \	10440	_ICL_DSC1_PICTURE_PARAMETER_SET_5_PB, \
10441	_ICL_DSC1_PICTURE_PARAMETER_SET_5_PC)	10441	_ICL_DSC1_PICTURE_PARAMETER_SET_5_PC)
10442	#define DSC_SCALE_DEC_INTINT(scale_dec) ((scale_dec) << 16)	10442	#define DSC_SCALE_DEC_INTINT(scale_dec) ((scale_dec) << 16)
10443	#define DSC_SCALE_INC_INT(scale_inc) ((scale_inc) << 0)	10443	#define DSC_SCALE_INC_INT(scale_inc) ((scale_inc) << 0)