lael-labs/linux

Documentation/devicetree/bindings/arm/cpus.txt+0−1

@@ -192,7 +192,6 @@ nodes to be present and contain the properties described below. · 191 unmodified lines
192	can be one of:	192	can be one of:
193	"allwinner,sun6i-a31"	193	"allwinner,sun6i-a31"
194	"allwinner,sun8i-a23"	194	"allwinner,sun8i-a23"
195	"arm,psci"
196	"arm,realview-smp"	195	"arm,realview-smp"
197	"brcm,bcm-nsp-smp"	196	"brcm,bcm-nsp-smp"
198	"brcm,brahma-b15"	197	"brcm,brahma-b15"

Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt+11−7

@@ -8,15 +8,19 @@ Required properties: · 7 unmodified lines
8	of memory mapped region.	8	of memory mapped region.
9	- clock-names: from common clock binding:	9	- clock-names: from common clock binding:
10	Required elements: "24m"	10	Required elements: "24m"
11	- rockchip,grf: phandle to the syscon managing the "general register files"
12	- #phy-cells : from the generic PHY bindings, must be 0;	11	- #phy-cells : from the generic PHY bindings, must be 0;
13		12
14	Example:	13	Example:
15		14
16	edp_phy: edp-phy {	15	grf: syscon@ff770000 {
17	compatible = "rockchip,rk3288-dp-phy";	16	compatible = "rockchip,rk3288-grf", "syscon", "simple-mfd";
18	rockchip,grf = <&grf>;	17
19	clocks = <&cru SCLK_EDP_24M>;	18	...
20	clock-names = "24m";	19
21	#phy-cells = <0>;	20	edp_phy: edp-phy {
		21	compatible = "rockchip,rk3288-dp-phy";
		22	clocks = <&cru SCLK_EDP_24M>;
		23	clock-names = "24m";
		24	#phy-cells = <0>;
		25	};
22	};	26	};

Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt+14−8

@@ -3,17 +3,23 @@ Rockchip EMMC PHY · 2 unmodified lines
3		3
4	Required properties:	4	Required properties:
5	- compatible: rockchip,rk3399-emmc-phy	5	- compatible: rockchip,rk3399-emmc-phy
6	- rockchip,grf : phandle to the syscon managing the "general
7	register files"
8	- #phy-cells: must be 0	6	- #phy-cells: must be 0
9	- reg: PHY configure reg address offset in "general	7	- reg: PHY register address offset and length in "general
10	register files"	8	register files"
11		9
12	Example:	10	Example:
13		11
14	emmcphy: phy {	12
15	compatible = "rockchip,rk3399-emmc-phy";	13	grf: syscon@ff770000 {
16	rockchip,grf = <&grf>;	14	compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
17	reg = <0xf780>;	15	#address-cells = <1>;
18	#phy-cells = <0>;	16	#size-cells = <1>;
		17
		18	...
		19
		20	emmcphy: phy@f780 {
		21	compatible = "rockchip,rk3399-emmc-phy";
		22	reg = <0xf780 0x20>;
		23	#phy-cells = <0>;
		24	};
19	};	25	};

Documentation/input/event-codes.txt+4−0

     proximity of the device and while the value of the BTN_TOUCH code is 0. If
     the input device may be used freely in three dimensions, consider ABS_Z
     instead.
+  - BTN_TOOL_<name> should be set to 1 when the tool comes into detectable
+    proximity and set to 0 when the tool leaves detectable proximity.
+    BTN_TOOL_<name> signals the type of tool that is currently detected by the
+    hardware and is otherwise independent of ABS_DISTANCE and/or BTN_TOUCH.
 * ABS_MT_<name>:
   - Used to describe multitouch input events. Please see

Documentation/x86/x86_64/mm.txt+3−3

@@ -19,7 +19,7 @@ ffffff0000000000 - ffffff7fffffffff (=39 bits) %esp fixup stacks · 18 unmodified lines
19	ffffffef00000000 - ffffffff00000000 (=64 GB) EFI region mapping space	19	ffffffef00000000 - ffffffff00000000 (=64 GB) EFI region mapping space
20	... unused hole ...	20	... unused hole ...
21	ffffffff80000000 - ffffffffa0000000 (=512 MB) kernel text mapping, from phys 0	21	ffffffff80000000 - ffffffffa0000000 (=512 MB) kernel text mapping, from phys 0
22	ffffffffa0000000 - ffffffffff5fffff (=1525 MB) module mapping space	22	ffffffffa0000000 - ffffffffff5fffff (=1526 MB) module mapping space
23	ffffffffff600000 - ffffffffffdfffff (=8 MB) vsyscalls	23	ffffffffff600000 - ffffffffffdfffff (=8 MB) vsyscalls
24	ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole	24	ffffffffffe00000 - ffffffffffffffff (=2 MB) unused hole
25		25
@@ -31,8 +31,8 @@ vmalloc space is lazily synchronized into the different PML4 pages of · 5 unmodified lines
31	the processes using the page fault handler, with init_level4_pgt as	31	the processes using the page fault handler, with init_level4_pgt as
32	reference.	32	reference.
33		33
34	Current X86-64 implementations only support 40 bits of address space,	34	Current X86-64 implementations support up to 46 bits of address space (64 TB),
35	but we support up to 46 bits. This expands into MBZ space in the page tables.	35	which is our current limit. This expands into MBZ space in the page tables.
36		36
37	We map EFI runtime services in the 'efi_pgd' PGD in a 64Gb large virtual	37	We map EFI runtime services in the 'efi_pgd' PGD in a 64Gb large virtual
38	memory window (this size is arbitrary, it can be raised later if needed).	38	memory window (this size is arbitrary, it can be raised later if needed).

MAINTAINERS+9−0

@@ -11072,6 +11072,15 @@ S: Maintained · 11071 unmodified lines
11072	F: drivers/clk/ti/	11072	F: drivers/clk/ti/
11073	F: include/linux/clk/ti.h	11073	F: include/linux/clk/ti.h
11074		11074
		11075	TI ETHERNET SWITCH DRIVER (CPSW)
		11076	M: Mugunthan V N <mugunthanvnm@ti.com>
		11077	R: Grygorii Strashko <grygorii.strashko@ti.com>
		11078	L: linux-omap@vger.kernel.org
		11079	L: netdev@vger.kernel.org
		11080	S: Maintained
		11081	F: drivers/net/ethernet/ti/cpsw*
		11082	F: drivers/net/ethernet/ti/davinci*
		11083
11075	TI FLASH MEDIA INTERFACE DRIVER	11084	TI FLASH MEDIA INTERFACE DRIVER
11076	M: Alex Dubov <oakad@yahoo.com>	11085	M: Alex Dubov <oakad@yahoo.com>
11077	S: Maintained	11086	S: Maintained

Makefile+3−2

 VERSION = 4
 PATCHLEVEL = 6
 SUBLEVEL = 0
-EXTRAVERSION = -rc4
+EXTRAVERSION = -rc5
 NAME = Blurry Fish Butt
 # *DOCUMENTATION*
 prepare: prepare0 prepare-objtool
 ifdef CONFIG_STACK_VALIDATION
-  has_libelf := $(shell echo "int main() {}" | $(HOSTCC) -xc -o /dev/null -lelf - &> /dev/null && echo 1 || echo 0)
+  has_libelf := $(call try-run,\
+		echo "int main() {}" | $(HOSTCC) -xc -o /dev/null -lelf -,1,0)
   ifeq ($(has_libelf),1)
     objtool_target := tools/objtool FORCE
   else

arch/arm/boot/dts/am33xx.dtsi+1−1

@@ -860,7 +860,7 @@ · 859 unmodified lines
860	ti,no-idle-on-init;	860	ti,no-idle-on-init;
861	reg = <0x50000000 0x2000>;	861	reg = <0x50000000 0x2000>;
862	interrupts = <100>;	862	interrupts = <100>;
863	dmas = <&edma 52>;	863	dmas = <&edma 52 0>;
864	dma-names = "rxtx";	864	dma-names = "rxtx";
865	gpmc,num-cs = <7>;	865	gpmc,num-cs = <7>;
866	gpmc,num-waitpins = <2>;	866	gpmc,num-waitpins = <2>;

arch/arm/boot/dts/am4372.dtsi+1−1

@@ -884,7 +884,7 @@ · 883 unmodified lines
884	gpmc: gpmc@50000000 {	884	gpmc: gpmc@50000000 {
885	compatible = "ti,am3352-gpmc";	885	compatible = "ti,am3352-gpmc";
886	ti,hwmods = "gpmc";	886	ti,hwmods = "gpmc";
887	dmas = <&edma 52>;	887	dmas = <&edma 52 0>;
888	dma-names = "rxtx";	888	dma-names = "rxtx";
889	clocks = <&l3s_gclk>;	889	clocks = <&l3s_gclk>;
890	clock-names = "fck";	890	clock-names = "fck";

arch/arm/boot/dts/am57xx-beagle-x15.dts+0−17

 		#cooling-cells = <2>;
 	};
-	extcon_usb1: extcon_usb1 {
-		compatible = "linux,extcon-usb-gpio";
-		id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&extcon_usb1_pins>;
-	};
 	hdmi0: connector {
 		compatible = "hdmi-connector";
 		label = "hdmi";
 		>;
 	};
-	extcon_usb1_pins: extcon_usb1_pins {
-		pinctrl-single,pins = <
-			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
-		>;
-	};
 	tpd12s015_pins: pinmux_tpd12s015_pins {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */
 	pinctrl-0 = <&usb1_pins>;
 };
-&omap_dwc3_1 {
-	extcon = <&extcon_usb1>;
-};
 &omap_dwc3_2 {
 	extcon = <&extcon_usb2>;
 };

arch/arm/boot/dts/dm814x-clocks.dtsi+212−31

@@ -4,6 +4,157 @@ · 3 unmodified lines
4	* published by the Free Software Foundation.	4	* published by the Free Software Foundation.
5	*/	5	*/
6		6
		7	&pllss {
		8	/*
		9	* See TRM "2.6.10 Connected outputso DPLLS" and
		10	* "2.6.11 Connected Outputs of DPLLJ". Only clkout is
		11	* connected except for hdmi and usb.
		12	*/
		13	adpll_mpu_ck: adpll@40 {
		14	#clock-cells = <1>;
		15	compatible = "ti,dm814-adpll-s-clock";
		16	reg = <0x40 0x40>;
		17	clocks = <&devosc_ck &devosc_ck &devosc_ck>;
		18	clock-names = "clkinp", "clkinpulow", "clkinphif";
		19	clock-output-names = "481c5040.adpll.dcoclkldo",
		20	"481c5040.adpll.clkout",
		21	"481c5040.adpll.clkoutx2",
		22	"481c5040.adpll.clkouthif";
		23	};
		24
		25	adpll_dsp_ck: adpll@80 {
		26	#clock-cells = <1>;
		27	compatible = "ti,dm814-adpll-lj-clock";
		28	reg = <0x80 0x30>;
		29	clocks = <&devosc_ck &devosc_ck>;
		30	clock-names = "clkinp", "clkinpulow";
		31	clock-output-names = "481c5080.adpll.dcoclkldo",
		32	"481c5080.adpll.clkout",
		33	"481c5080.adpll.clkoutldo";
		34	};
		35
		36	adpll_sgx_ck: adpll@b0 {
		37	#clock-cells = <1>;
		38	compatible = "ti,dm814-adpll-lj-clock";
		39	reg = <0xb0 0x30>;
		40	clocks = <&devosc_ck &devosc_ck>;
		41	clock-names = "clkinp", "clkinpulow";
		42	clock-output-names = "481c50b0.adpll.dcoclkldo",
		43	"481c50b0.adpll.clkout",
		44	"481c50b0.adpll.clkoutldo";
		45	};
		46
		47	adpll_hdvic_ck: adpll@e0 {
		48	#clock-cells = <1>;
		49	compatible = "ti,dm814-adpll-lj-clock";
		50	reg = <0xe0 0x30>;
		51	clocks = <&devosc_ck &devosc_ck>;
		52	clock-names = "clkinp", "clkinpulow";
		53	clock-output-names = "481c50e0.adpll.dcoclkldo",
		54	"481c50e0.adpll.clkout",
		55	"481c50e0.adpll.clkoutldo";
		56	};
		57
		58	adpll_l3_ck: adpll@110 {
		59	#clock-cells = <1>;
		60	compatible = "ti,dm814-adpll-lj-clock";
		61	reg = <0x110 0x30>;
		62	clocks = <&devosc_ck &devosc_ck>;
		63	clock-names = "clkinp", "clkinpulow";
		64	clock-output-names = "481c5110.adpll.dcoclkldo",
		65	"481c5110.adpll.clkout",
		66	"481c5110.adpll.clkoutldo";
		67	};
		68
		69	adpll_isp_ck: adpll@140 {
		70	#clock-cells = <1>;
		71	compatible = "ti,dm814-adpll-lj-clock";
		72	reg = <0x140 0x30>;
		73	clocks = <&devosc_ck &devosc_ck>;
		74	clock-names = "clkinp", "clkinpulow";
		75	clock-output-names = "481c5140.adpll.dcoclkldo",
		76	"481c5140.adpll.clkout",
		77	"481c5140.adpll.clkoutldo";
		78	};
		79
		80	adpll_dss_ck: adpll@170 {
		81	#clock-cells = <1>;
		82	compatible = "ti,dm814-adpll-lj-clock";
		83	reg = <0x170 0x30>;
		84	clocks = <&devosc_ck &devosc_ck>;
		85	clock-names = "clkinp", "clkinpulow";
		86	clock-output-names = "481c5170.adpll.dcoclkldo",
		87	"481c5170.adpll.clkout",
		88	"481c5170.adpll.clkoutldo";
		89	};
		90
		91	adpll_video0_ck: adpll@1a0 {
		92	#clock-cells = <1>;
		93	compatible = "ti,dm814-adpll-lj-clock";
		94	reg = <0x1a0 0x30>;
		95	clocks = <&devosc_ck &devosc_ck>;
		96	clock-names = "clkinp", "clkinpulow";
		97	clock-output-names = "481c51a0.adpll.dcoclkldo",
		98	"481c51a0.adpll.clkout",
		99	"481c51a0.adpll.clkoutldo";
		100	};
		101
		102	adpll_video1_ck: adpll@1d0 {
		103	#clock-cells = <1>;
		104	compatible = "ti,dm814-adpll-lj-clock";
		105	reg = <0x1d0 0x30>;
		106	clocks = <&devosc_ck &devosc_ck>;
		107	clock-names = "clkinp", "clkinpulow";
		108	clock-output-names = "481c51d0.adpll.dcoclkldo",
		109	"481c51d0.adpll.clkout",
		110	"481c51d0.adpll.clkoutldo";
		111	};
		112
		113	adpll_hdmi_ck: adpll@200 {
		114	#clock-cells = <1>;
		115	compatible = "ti,dm814-adpll-lj-clock";
		116	reg = <0x200 0x30>;
		117	clocks = <&devosc_ck &devosc_ck>;
		118	clock-names = "clkinp", "clkinpulow";
		119	clock-output-names = "481c5200.adpll.dcoclkldo",
		120	"481c5200.adpll.clkout",
		121	"481c5200.adpll.clkoutldo";
		122	};
		123
		124	adpll_audio_ck: adpll@230 {
		125	#clock-cells = <1>;
		126	compatible = "ti,dm814-adpll-lj-clock";
		127	reg = <0x230 0x30>;
		128	clocks = <&devosc_ck &devosc_ck>;
		129	clock-names = "clkinp", "clkinpulow";
		130	clock-output-names = "481c5230.adpll.dcoclkldo",
		131	"481c5230.adpll.clkout",
		132	"481c5230.adpll.clkoutldo";
		133	};
		134
		135	adpll_usb_ck: adpll@260 {
		136	#clock-cells = <1>;
		137	compatible = "ti,dm814-adpll-lj-clock";
		138	reg = <0x260 0x30>;
		139	clocks = <&devosc_ck &devosc_ck>;
		140	clock-names = "clkinp", "clkinpulow";
		141	clock-output-names = "481c5260.adpll.dcoclkldo",
		142	"481c5260.adpll.clkout",
		143	"481c5260.adpll.clkoutldo";
		144	};
		145
		146	adpll_ddr_ck: adpll@290 {
		147	#clock-cells = <1>;
		148	compatible = "ti,dm814-adpll-lj-clock";
		149	reg = <0x290 0x30>;
		150	clocks = <&devosc_ck &devosc_ck>;
		151	clock-names = "clkinp", "clkinpulow";
		152	clock-output-names = "481c5290.adpll.dcoclkldo",
		153	"481c5290.adpll.clkout",
		154	"481c5290.adpll.clkoutldo";
		155	};
		156	};
		157
7	&pllss_clocks {	158	&pllss_clocks {
8	timer1_fck: timer1_fck {	159	timer1_fck: timer1_fck {
9	#clock-cells = <0>;	160	#clock-cells = <0>;
@@ -23,6 +174,24 @@ · 13 unmodified lines
23	reg = <0x2e0>;	174	reg = <0x2e0>;
24	};	175	};
25		176
		177	/* CPTS_RFT_CLK in RMII_REFCLK_SRC, usually sourced from auiod */
		178	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
		179	#clock-cells = <0>;
		180	compatible = "ti,mux-clock";
		181	clocks = <&adpll_video0_ck 1
		182	&adpll_video1_ck 1
		183	&adpll_audio_ck 1>;
		184	ti,bit-shift = <1>;
		185	reg = <0x2e8>;
		186	};
		187
		188	/* REVISIT: Set up with a proper mux using RMII_REFCLK_SRC */
		189	cpsw_125mhz_gclk: cpsw_125mhz_gclk {
		190	#clock-cells = <0>;
		191	compatible = "fixed-clock";
		192	clock-frequency = <125000000>;
		193	};
		194
26	sysclk18_ck: sysclk18_ck {	195	sysclk18_ck: sysclk18_ck {
27	#clock-cells = <0>;	196	#clock-cells = <0>;
28	compatible = "ti,mux-clock";	197	compatible = "ti,mux-clock";
@@ -79,37 +248,6 @@ · 50 unmodified lines
79	compatible = "fixed-clock";	248	compatible = "fixed-clock";
80	clock-frequency = <1000000000>;	249	clock-frequency = <1000000000>;
81	};	250	};
82
83	sysclk4_ck: sysclk4_ck {
84	#clock-cells = <0>;
85	compatible = "fixed-clock";
86	clock-frequency = <222000000>;
87	};
88
89	sysclk6_ck: sysclk6_ck {
90	#clock-cells = <0>;
91	compatible = "fixed-clock";
92	clock-frequency = <100000000>;
93	};
94
95	sysclk10_ck: sysclk10_ck {
96	#clock-cells = <0>;
97	compatible = "fixed-clock";
98	clock-frequency = <48000000>;
99	};
100
101	cpsw_125mhz_gclk: cpsw_125mhz_gclk {
102	#clock-cells = <0>;
103	compatible = "fixed-clock";
104	clock-frequency = <125000000>;
105	};
106
107	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
108	#clock-cells = <0>;
109	compatible = "fixed-clock";
110	clock-frequency = <250000000>;
111	};
112
113	};	251	};
114		252
115	&prcm_clocks {	253	&prcm_clocks {
@@ -138,6 +276,49 @@ · 22 unmodified lines
138	clock-div = <78125>;	276	clock-div = <78125>;
139	};	277	};
140		278
		279	/* L4_HS 220 MHz*/
		280	sysclk4_ck: sysclk4_ck {
		281	#clock-cells = <0>;
		282	compatible = "ti,fixed-factor-clock";
		283	clocks = <&adpll_l3_ck 1>;
		284	ti,clock-mult = <1>;
		285	ti,clock-div = <1>;
		286	};
		287
		288	/* L4_FWCFG */
		289	sysclk5_ck: sysclk5_ck {
		290	#clock-cells = <0>;
		291	compatible = "ti,fixed-factor-clock";
		292	clocks = <&adpll_l3_ck 1>;
		293	ti,clock-mult = <1>;
		294	ti,clock-div = <2>;
		295	};
		296
		297	/* L4_LS 110 MHz */
		298	sysclk6_ck: sysclk6_ck {
		299	#clock-cells = <0>;
		300	compatible = "ti,fixed-factor-clock";
		301	clocks = <&adpll_l3_ck 1>;
		302	ti,clock-mult = <1>;
		303	ti,clock-div = <2>;
		304	};
		305
		306	sysclk8_ck: sysclk8_ck {
		307	#clock-cells = <0>;
		308	compatible = "ti,fixed-factor-clock";
		309	clocks = <&adpll_usb_ck 1>;
		310	ti,clock-mult = <1>;
		311	ti,clock-div = <1>;
		312	};
		313
		314	sysclk10_ck: sysclk10_ck {
		315	compatible = "ti,divider-clock";
		316	reg = <0x324>;
		317	ti,max-div = <7>;
		318	#clock-cells = <0>;
		319	clocks = <&adpll_usb_ck 1>;
		320	};
		321
141	aud_clkin0_ck: aud_clkin0_ck {	322	aud_clkin0_ck: aud_clkin0_ck {
142	#clock-cells = <0>;	323	#clock-cells = <0>;
143	compatible = "fixed-clock";	324	compatible = "fixed-clock";

arch/arm/boot/dts/dra62x-clocks.dtsi+26−0

@@ -6,6 +6,32 @@ · 5 unmodified lines
6		6
7	#include "dm814x-clocks.dtsi"	7	#include "dm814x-clocks.dtsi"
8		8
		9	/* Compared to dm814x, dra62x does not have hdic, l3 or dss PLLs */
		10	&adpll_hdvic_ck {
		11	status = "disabled";
		12	};
		13
		14	&adpll_l3_ck {
		15	status = "disabled";
		16	};
		17
		18	&adpll_dss_ck {
		19	status = "disabled";
		20	};
		21
		22	/* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
		23	&sysclk4_ck {
		24	clocks = <&adpll_isp_ck 1>;
		25	};
		26
		27	&sysclk5_ck {
		28	clocks = <&adpll_isp_ck 1>;
		29	};
		30
		31	&sysclk6_ck {
		32	clocks = <&adpll_isp_ck 1>;
		33	};
		34
9	/*	35	/*
10	* Compared to dm814x, dra62x has different shifts and more mux options.	36	* Compared to dm814x, dra62x has different shifts and more mux options.
11	* Please add the extra options for ysclk_14 and 16 if really needed.	37	* Please add the extra options for ysclk_14 and 16 if really needed.

arch/arm/boot/dts/dra7xx-clocks.dtsi+17−1

 		clock-frequency = <32768>;
 	};
-	sys_32k_ck: sys_32k_ck {
+	sys_clk32_crystal_ck: sys_clk32_crystal_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		clock-frequency = <32768>;
 	};
+	sys_clk32_pseudo_ck: sys_clk32_pseudo_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&sys_clkin1>;
+		clock-mult = <1>;
+		clock-div = <610>;
+	};
 	virt_12000000_ck: virt_12000000_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		ti,bit-shift = <22>;
 		reg = <0x0558>;
 	};
+	sys_32k_ck: sys_32k_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&sys_clk32_crystal_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>;
+		ti,bit-shift = <8>;
+		reg = <0x6c4>;
+	};
 };

arch/arm/boot/dts/qcom-msm8974.dtsi+1−13

 /dts-v1/;
-#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 #include "skeleton.dtsi"
 			clock-names = "core", "iface";
 			#address-cells = <1>;
 			#size-cells = <0>;
-			dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
-			dma-names = "tx", "rx";
 		};
 		spmi_bus: spmi@fc4cf000 {
 			interrupt-controller;
 			#interrupt-cells = <4>;
 		};
-		blsp2_dma: dma-controller@f9944000 {
-			compatible = "qcom,bam-v1.4.0";
-			reg = <0xf9944000 0x19000>;
-			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&gcc GCC_BLSP2_AHB_CLK>;
-			clock-names = "bam_clk";
-			#dma-cells = <1>;
-			qcom,ee = <0>;
-		};
 	};
 	smd {

arch/arm/boot/dts/r8a7791-koelsch.dts+1−0

@@ -661,6 +661,7 @@ · 660 unmodified lines
661	};	661	};
662		662
663	&pcie_bus_clk {	663	&pcie_bus_clk {
		664	clock-frequency = <100000000>;
664	status = "okay";	665	status = "okay";
665	};	666	};
666		667

arch/arm/boot/dts/r8a7791-porter.dts+1−13

 };
 &pfc {
-	pinctrl-0 = <&scif_clk_pins>;
-	pinctrl-names = "default";
 	scif0_pins: serial0 {
 		renesas,groups = "scif0_data_d";
 		renesas,function = "scif0";
 	};
-	scif_clk_pins: scif_clk {
-		renesas,groups = "scif_clk";
-		renesas,function = "scif_clk";
-	};
 	ether_pins: ether {
 		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 		renesas,function = "eth";
 	status = "okay";
 };
-&scif_clk {
-	clock-frequency = <14745600>;
-	status = "okay";
-};
 &ether {
 	pinctrl-0 = <&ether_pins &phy1_pins>;
 	pinctrl-names = "default";
 };
 &pcie_bus_clk {
+	clock-frequency = <100000000>;
 	status = "okay";
 };

arch/arm/boot/dts/r8a7791.dtsi+1−4

 		pcie_bus_clk: pcie_bus_clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			clock-frequency = <100000000>;
+			clock-frequency = <0>;
 			clock-output-names = "pcie_bus";
-			status = "disabled";
 		};
 		/* External SCIF clock */
 			#clock-cells = <0>;
 			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
-			status = "disabled";
 		};
 		/* External USB clock - can be overridden by the board */
 			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
 			clock-output-names = "can_clk";
-			status = "disabled";
 		};
 		/* Special CPG clocks */

arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c+3−2

@@ -71,6 +71,7 @@ struct platform_device *__init imx_add_sdhci_esdhc_imx( · 70 unmodified lines
71	if (!pdata)	71	if (!pdata)
72	pdata = &default_esdhc_pdata;	72	pdata = &default_esdhc_pdata;
73		73
74	return imx_add_platform_device(data->devid, data->id, res,	74	return imx_add_platform_device_dmamask(data->devid, data->id, res,
75	ARRAY_SIZE(res), pdata, sizeof(*pdata));	75	ARRAY_SIZE(res), pdata, sizeof(*pdata),
		76	DMA_BIT_MASK(32));
76	}	77	}

arch/arm/mach-omap2/clockdomains7xx_data.c+1−1

@@ -461,7 +461,7 @@ static struct clockdomain ipu_7xx_clkdm = { · 460 unmodified lines
461	.cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,	461	.cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
462	.clkdm_offs = DRA7XX_CM_CORE_AON_IPU_IPU_CDOFFS,	462	.clkdm_offs = DRA7XX_CM_CORE_AON_IPU_IPU_CDOFFS,
463	.dep_bit = DRA7XX_IPU_STATDEP_SHIFT,	463	.dep_bit = DRA7XX_IPU_STATDEP_SHIFT,
464	.flags = CLKDM_CAN_HWSUP_SWSUP,	464	.flags = CLKDM_CAN_SWSUP,
465	};	465	};
466		466
467	static struct clockdomain mpu1_7xx_clkdm = {	467	static struct clockdomain mpu1_7xx_clkdm = {

arch/arm/mach-omap2/io.c+2−1

 #ifdef CONFIG_SOC_DRA7XX
 void __init dra7xx_init_early(void)
 {
-	omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
+	omap2_set_globals_tap(DRA7XX_CLASS,
+			      OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 	omap2_control_base_init();
 	omap4_pm_init_early();

arch/arm/mach-omap2/omap-wakeupgen.c+7−0

  */
 static void irq_save_context(void)
 {
+	/* DRA7 has no SAR to save */
+	if (soc_is_dra7xx())
+		return;
 	if (!sar_base)
 		sar_base = omap4_get_sar_ram_base();
 {
 	u32 val;
 	u32 offset = SAR_BACKUP_STATUS_OFFSET;
+	/* DRA7 has no SAR to save */
+	if (soc_is_dra7xx())
+		return;
 	if (soc_is_omap54xx())
 		offset = OMAP5_SAR_BACKUP_STATUS_OFFSET;

arch/arm/mach-omap2/pm34xx.c+13−10

 	int per_next_state = PWRDM_POWER_ON;
 	int core_next_state = PWRDM_POWER_ON;
 	int per_going_off;
-	int core_prev_state;
 	u32 sdrc_pwr = 0;
 	mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
 		sdrc_write_reg(sdrc_pwr, SDRC_POWER);
 	/* CORE */
-	if (core_next_state < PWRDM_POWER_ON) {
+	if (core_next_state < PWRDM_POWER_ON &&
-		core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
+	    pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
-		if (core_prev_state == PWRDM_POWER_OFF) {
+		omap3_core_restore_context();
-			omap3_core_restore_context();
+		omap3_cm_restore_context();
-			omap3_cm_restore_context();
+		omap3_sram_restore_context();
-			omap3_sram_restore_context();
+		omap2_sms_restore_context();
-			omap2_sms_restore_context();
+	} else {
-		}
+		/*
+		 * In off-mode resume path above, omap3_core_restore_context
+		 * also handles the INTC autoidle restore done here so limit
+		 * this to non-off mode resume paths so we don't do it twice.
+		 */
+		omap3_intc_resume_idle();
 	}
-	omap3_intc_resume_idle();
 	pwrdm_post_transition(NULL);

arch/arm/mach-shmobile/timer.c+11−17

 void __init shmobile_init_delay(void)
 {
 	struct device_node *np, *cpus;
-	bool is_a7_a8_a9 = false;
+	unsigned int div = 0;
-	bool is_a15 = false;
 	bool has_arch_timer = false;
 	u32 max_freq = 0;
 		if (!of_property_read_u32(np, "clock-frequency", &freq))
 			max_freq = max(max_freq, freq);
-		if (of_device_is_compatible(np, "arm,cortex-a8") ||
+		if (of_device_is_compatible(np, "arm,cortex-a8")) {
-		    of_device_is_compatible(np, "arm,cortex-a9")) {
+			div = 2;
-			is_a7_a8_a9 = true;
+		} else if (of_device_is_compatible(np, "arm,cortex-a9")) {
-		} else if (of_device_is_compatible(np, "arm,cortex-a7")) {
+			div = 1;
-			is_a7_a8_a9 = true;
+		} else if (of_device_is_compatible(np, "arm,cortex-a7") ||
-			has_arch_timer = true;
+			 of_device_is_compatible(np, "arm,cortex-a15")) {
-		} else if (of_device_is_compatible(np, "arm,cortex-a15")) {
+			div = 1;
-			is_a15 = true;
 			has_arch_timer = true;
 		}
 	}
 	of_node_put(cpus);
-	if (!max_freq)
+	if (!max_freq || !div)
 		return;
-	if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
+	if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
-		if (is_a7_a8_a9)
+		shmobile_setup_delay_hz(max_freq, 1, div);
-			shmobile_setup_delay_hz(max_freq, 1, 3);
-		else if (is_a15)
-			shmobile_setup_delay_hz(max_freq, 2, 4);
-	}
 }

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts+0−1

@@ -70,7 +70,6 @@ · 69 unmodified lines
70	i2c3 = &i2c3;	70	i2c3 = &i2c3;
71	i2c4 = &i2c4;	71	i2c4 = &i2c4;
72	i2c5 = &i2c5;	72	i2c5 = &i2c5;
73	i2c6 = &i2c6;
74	};	73	};
75	};	74	};
76		75

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi+5−15

 		i2c2: i2c@58782000 {
 			compatible = "socionext,uniphier-fi2c";
-			status = "disabled";
 			reg = <0x58782000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 43 4>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_i2c2>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <100000>;
+			clock-frequency = <400000>;
 		};
 		i2c3: i2c@58783000 {
 		i2c4: i2c@58784000 {
 			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
 			reg = <0x58784000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 45 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c4>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
+			clock-frequency = <100000>;
 		};
 		i2c5: i2c@58785000 {
 			clock-frequency = <400000>;
 		};
-		i2c6: i2c@58786000 {
-			compatible = "socionext,uniphier-fi2c";
-			reg = <0x58786000 0x80>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <0 26 4>;
-			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
-		};
 		system_bus: system-bus@58c00000 {
 			compatible = "socionext,uniphier-system-bus";
 			status = "disabled";

arch/arm64/kernel/head.S+12−1

 	msr	vpidr_el2, x0
 	msr	vmpidr_el2, x1
+	/*
+	 * When VHE is not in use, early init of EL2 and EL1 needs to be
+	 * done here.
+	 * When VHE _is_ in use, EL1 will not be used in the host and
+	 * requires no configuration, and all non-hyp-specific EL2 setup
+	 * will be done via the _EL1 system register aliases in __cpu_setup.
+	 */
+	cbnz	x2, 1f
 	/* sctlr_el1 */
 	mov	x0, #0x0800			// Set/clear RES{1,0} bits
 CPU_BE(	movk	x0, #0x33d0, lsl #16	)	// Set EE and E0E on BE systems
 	/* Coprocessor traps. */
 	mov	x0, #0x33ff
 	msr	cptr_el2, x0			// Disable copro. traps to EL2
+1:
 #ifdef CONFIG_COMPAT
 	msr	hstr_el2, xzr			// Disable CP15 traps to EL2
 	.macro	update_early_cpu_boot_status status, tmp1, tmp2
 	mov	\tmp2, #\status
-	str_l	\tmp2, __early_cpu_boot_status, \tmp1
+	adr_l	\tmp1, __early_cpu_boot_status
+	str	\tmp2, [\tmp1]
 	dmb	sy
 	dc	ivac, \tmp1			// Invalidate potentially stale cache line
 	.endm

arch/arm64/kernel/smp_spin_table.c+6−5

 static int smp_spin_table_cpu_init(unsigned int cpu)
 {
 	struct device_node *dn;
+	int ret;
 	dn = of_get_cpu_node(cpu, NULL);
 	if (!dn)
 	/*
 	 * Determine the address from which the CPU is polling.
 	 */
-	if (of_property_read_u64(dn, "cpu-release-addr",
+	ret = of_property_read_u64(dn, "cpu-release-addr",
-				 &cpu_release_addr[cpu])) {
+				   &cpu_release_addr[cpu]);
+	if (ret)
 		pr_err("CPU %d: missing or invalid cpu-release-addr property\n",
 		       cpu);
-		return -1;
+	of_node_put(dn);
-	}
-	return 0;
+	return ret;
 }
 static int smp_spin_table_cpu_prepare(unsigned int cpu)

arch/powerpc/include/uapi/asm/cputable.h+1−0

@@ -31,6 +31,7 @@ · 30 unmodified lines
31	#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \	31	#define PPC_FEATURE_PSERIES_PERFMON_COMPAT \
32	0x00000040	32	0x00000040
33		33
		34	/* Reserved - do not use 0x00000004 */
34	#define PPC_FEATURE_TRUE_LE 0x00000002	35	#define PPC_FEATURE_TRUE_LE 0x00000002
35	#define PPC_FEATURE_PPC_LE 0x00000001	36	#define PPC_FEATURE_PPC_LE 0x00000001
36		37

arch/powerpc/kernel/prom.c+15−11

 	unsigned long	cpu_features;	/* CPU_FTR_xxx bit */
 	unsigned long	mmu_features;	/* MMU_FTR_xxx bit */
 	unsigned int	cpu_user_ftrs;	/* PPC_FEATURE_xxx bit */
+	unsigned int	cpu_user_ftrs2;	/* PPC_FEATURE2_xxx bit */
 	unsigned char	pabyte;		/* byte number in ibm,pa-features */
 	unsigned char	pabit;		/* bit number (big-endian) */
 	unsigned char	invert;		/* if 1, pa bit set => clear feature */
 } ibm_pa_features[] __initdata = {
-	{0, 0, PPC_FEATURE_HAS_MMU,	0, 0, 0},
+	{0, 0, PPC_FEATURE_HAS_MMU, 0,		0, 0, 0},
-	{0, 0, PPC_FEATURE_HAS_FPU,	0, 1, 0},
+	{0, 0, PPC_FEATURE_HAS_FPU, 0,		0, 1, 0},
-	{CPU_FTR_CTRL, 0, 0,		0, 3, 0},
+	{CPU_FTR_CTRL, 0, 0, 0,			0, 3, 0},
-	{CPU_FTR_NOEXECUTE, 0, 0,	0, 6, 0},
+	{CPU_FTR_NOEXECUTE, 0, 0, 0,		0, 6, 0},
-	{CPU_FTR_NODSISRALIGN, 0, 0,	1, 1, 1},
+	{CPU_FTR_NODSISRALIGN, 0, 0, 0,		1, 1, 1},
-	{0, MMU_FTR_CI_LARGE_PAGE, 0,	1, 2, 0},
+	{0, MMU_FTR_CI_LARGE_PAGE, 0, 0,		1, 2, 0},
-	{CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
+	{CPU_FTR_REAL_LE, 0, PPC_FEATURE_TRUE_LE, 0, 5, 0, 0},
 	/*
-	 * If the kernel doesn't support TM (ie. CONFIG_PPC_TRANSACTIONAL_MEM=n),
+	 * If the kernel doesn't support TM (ie CONFIG_PPC_TRANSACTIONAL_MEM=n),
-	 * we don't want to turn on CPU_FTR_TM here, so we use CPU_FTR_TM_COMP
+	 * we don't want to turn on TM here, so we use the *_COMP versions
-	 * which is 0 if the kernel doesn't support TM.
+	 * which are 0 if the kernel doesn't support TM.
 	 */
-	{CPU_FTR_TM_COMP, 0, 0,		22, 0, 0},
+	{CPU_FTR_TM_COMP, 0, 0,
+	 PPC_FEATURE2_HTM_COMP|PPC_FEATURE2_HTM_NOSC_COMP, 22, 0, 0},
 };
 static void __init scan_features(unsigned long node, const unsigned char *ftrs,
 		if (bit ^ fp->invert) {
 			cur_cpu_spec->cpu_features |= fp->cpu_features;
 			cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftrs;
+			cur_cpu_spec->cpu_user_features2 |= fp->cpu_user_ftrs2;
 			cur_cpu_spec->mmu_features |= fp->mmu_features;
 		} else {
 			cur_cpu_spec->cpu_features &= ~fp->cpu_features;
 			cur_cpu_spec->cpu_user_features &= ~fp->cpu_user_ftrs;
+			cur_cpu_spec->cpu_user_features2 &= ~fp->cpu_user_ftrs2;
 			cur_cpu_spec->mmu_features &= ~fp->mmu_features;
 		}
 	}

arch/x86/include/asm/hugetlb.h+1−0

@@ -4,6 +4,7 @@ · 3 unmodified lines
4	#include <asm/page.h>	4	#include <asm/page.h>
5	#include <asm-generic/hugetlb.h>	5	#include <asm-generic/hugetlb.h>
6		6
		7	#define hugepages_supported() cpu_has_pse
7		8
8	static inline int is_hugepage_only_range(struct mm_struct *mm,	9	static inline int is_hugepage_only_range(struct mm_struct *mm,
9	unsigned long addr,	10	unsigned long addr,

arch/x86/kernel/cpu/mshyperv.c+12−0

 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
+static unsigned char hv_get_nmi_reason(void)
+{
+	return 0;
+}
 static void __init ms_hyperv_init_platform(void)
 {
 	/*
 	machine_ops.crash_shutdown = hv_machine_crash_shutdown;
 #endif
 	mark_tsc_unstable("running on Hyper-V");
+	/*
+	 * Generation 2 instances don't support reading the NMI status from
+	 * 0x61 port.
+	 */
+	if (efi_enabled(EFI_BOOT))
+		x86_platform.get_nmi_reason = hv_get_nmi_reason;
 }
 const __refconst struct hypervisor_x86 x86_hyper_ms_hyperv = {

drivers/clocksource/tango_xtal.c+1−1

@@ -42,7 +42,7 @@ static void __init tango_clocksource_init(struct device_node *np) · 41 unmodified lines
42		42
43	ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350,	43	ret = clocksource_mmio_init(xtal_in_cnt, "tango-xtal", xtal_freq, 350,
44	32, clocksource_mmio_readl_up);	44	32, clocksource_mmio_readl_up);
45	if (!ret) {	45	if (ret) {
46	pr_err("%s: registration failed\n", np->full_name);	46	pr_err("%s: registration failed\n", np->full_name);
47	return;	47	return;
48	}	48	}

drivers/crypto/talitos.c+57−30

 		ptr->eptr = upper_32_bits(dma_addr);
 }
+static void copy_talitos_ptr(struct talitos_ptr *dst_ptr,
+			     struct talitos_ptr *src_ptr, bool is_sec1)
+{
+	dst_ptr->ptr = src_ptr->ptr;
+	if (!is_sec1)
+		dst_ptr->eptr = src_ptr->eptr;
+}
 static void to_talitos_ptr_len(struct talitos_ptr *ptr, unsigned int len,
 			       bool is_sec1)
 {
 	sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ?: 1,
 			      (areq->src == areq->dst) ? DMA_BIDIRECTIONAL
 							   : DMA_TO_DEVICE);
 	/* hmac data */
 	desc->ptr[1].len = cpu_to_be16(areq->assoclen);
 	if (sg_count > 1 &&
 	    (ret = sg_to_link_tbl_offset(areq->src, sg_count, 0,
 					 areq->assoclen,
 					 &edesc->link_tbl[tbl_off])) > 1) {
-		tbl_off += ret;
 		to_talitos_ptr(&desc->ptr[1], edesc->dma_link_tbl + tbl_off *
 			       sizeof(struct talitos_ptr), 0);
 		desc->ptr[1].j_extent = DESC_PTR_LNKTBL_JUMP;
 		dma_sync_single_for_device(dev, edesc->dma_link_tbl,
 					   edesc->dma_len, DMA_BIDIRECTIONAL);
+		tbl_off += ret;
 	} else {
 		to_talitos_ptr(&desc->ptr[1], sg_dma_address(areq->src), 0);
 		desc->ptr[1].j_extent = 0;
 	if (edesc->desc.hdr & DESC_HDR_MODE1_MDEU_CICV)
 		sg_link_tbl_len += authsize;
-	if (sg_count > 1 &&
+	if (sg_count == 1) {
-	    (ret = sg_to_link_tbl_offset(areq->src, sg_count, areq->assoclen,
+		to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src) +
-					 sg_link_tbl_len,
+			       areq->assoclen, 0);
-					 &edesc->link_tbl[tbl_off])) > 1) {
+	} else if ((ret = sg_to_link_tbl_offset(areq->src, sg_count,
-		tbl_off += ret;
+						areq->assoclen, sg_link_tbl_len,
+						&edesc->link_tbl[tbl_off])) >
+		   1) {
 		desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
 		to_talitos_ptr(&desc->ptr[4], edesc->dma_link_tbl +
 					      tbl_off *
 		dma_sync_single_for_device(dev, edesc->dma_link_tbl,
 					   edesc->dma_len,
 					   DMA_BIDIRECTIONAL);
-	} else
+		tbl_off += ret;
-		to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src), 0);
+	} else {
+		copy_talitos_ptr(&desc->ptr[4], &edesc->link_tbl[tbl_off], 0);
+	}
 	/* cipher out */
 	desc->ptr[5].len = cpu_to_be16(cryptlen);
 	edesc->icv_ool = false;
-	if (sg_count > 1 &&
+	if (sg_count == 1) {
-	    (sg_count = sg_to_link_tbl_offset(areq->dst, sg_count,
+		to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst) +
+			       areq->assoclen, 0);
+	} else if ((sg_count =
+			sg_to_link_tbl_offset(areq->dst, sg_count,
 					      areq->assoclen, cryptlen,
-					      &edesc->link_tbl[tbl_off])) >
+					      &edesc->link_tbl[tbl_off])) > 1) {
-	    1) {
 		struct talitos_ptr *tbl_ptr = &edesc->link_tbl[tbl_off];
 		to_talitos_ptr(&desc->ptr[5], edesc->dma_link_tbl +
 					   edesc->dma_len, DMA_BIDIRECTIONAL);
 		edesc->icv_ool = true;
-	} else
+	} else {
-		to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst), 0);
+		copy_talitos_ptr(&desc->ptr[5], &edesc->link_tbl[tbl_off], 0);
+	}
 	/* iv out */
 	map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv,
 	struct talitos_alg_template algt;
 };
-static int talitos_cra_init(struct crypto_tfm *tfm)
+static int talitos_init_common(struct talitos_ctx *ctx,
+			       struct talitos_crypto_alg *talitos_alg)
 {
-	struct crypto_alg *alg = tfm->__crt_alg;
-	struct talitos_crypto_alg *talitos_alg;
-	struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
 	struct talitos_private *priv;
-	if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
-		talitos_alg = container_of(__crypto_ahash_alg(alg),
-					   struct talitos_crypto_alg,
-					   algt.alg.hash);
-	else
-		talitos_alg = container_of(alg, struct talitos_crypto_alg,
-					   algt.alg.crypto);
 	/* update context with ptr to dev */
 	ctx->dev = talitos_alg->dev;
 	return 0;
 }
+static int talitos_cra_init(struct crypto_tfm *tfm)
+{
+	struct crypto_alg *alg = tfm->__crt_alg;
+	struct talitos_crypto_alg *talitos_alg;
+	struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
+	if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
+		talitos_alg = container_of(__crypto_ahash_alg(alg),
+					   struct talitos_crypto_alg,
+					   algt.alg.hash);
+	else
+		talitos_alg = container_of(alg, struct talitos_crypto_alg,
+					   algt.alg.crypto);
+	return talitos_init_common(ctx, talitos_alg);
+}
 static int talitos_cra_init_aead(struct crypto_aead *tfm)
 {
-	talitos_cra_init(crypto_aead_tfm(tfm));
+	struct aead_alg *alg = crypto_aead_alg(tfm);
-	return 0;
+	struct talitos_crypto_alg *talitos_alg;
+	struct talitos_ctx *ctx = crypto_aead_ctx(tfm);
+	talitos_alg = container_of(alg, struct talitos_crypto_alg,
+				   algt.alg.aead);
+	return talitos_init_common(ctx, talitos_alg);
 }
 static int talitos_cra_init_ahash(struct crypto_tfm *tfm)

drivers/edac/sb_edac.c+26−4

 	/* Memory type detection */
 	bool			is_mirrored, is_lockstep, is_close_pg;
+	bool			is_chan_hash;
 	/* Fifo double buffers */
 	struct mce		mce_entry[MCE_LOG_LEN];
 	return (pkg >> 2) & 0x1;
 }
+static int haswell_chan_hash(int idx, u64 addr)
+{
+	int i;
+	/*
+	 * XOR even bits from 12:26 to bit0 of idx,
+	 *     odd bits from 13:27 to bit1
+	 */
+	for (i = 12; i < 28; i += 2)
+		idx ^= (addr >> i) & 3;
+	return idx;
+}
 /****************************************************************************
 			Memory check routines
  ****************************************************************************/
 		KNL_MAX_CHANNELS : NUM_CHANNELS;
 	u64 knl_mc_sizes[KNL_MAX_CHANNELS];
+	if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL) {
+		pci_read_config_dword(pvt->pci_ha0, HASWELL_HASYSDEFEATURE2, &reg);
+		pvt->is_chan_hash = GET_BITFIELD(reg, 21, 21);
+	}
 	if (pvt->info.type == HASWELL || pvt->info.type == BROADWELL ||
 			pvt->info.type == KNIGHTS_LANDING)
 		pci_read_config_dword(pvt->pci_sad1, SAD_TARGET, &reg);
 	}
 	ch_way = TAD_CH(reg) + 1;
-	sck_way = 1 << TAD_SOCK(reg);
+	sck_way = TAD_SOCK(reg);
 	if (ch_way == 3)
 		idx = addr >> 6;
-	else
+	else {
 		idx = (addr >> (6 + sck_way + shiftup)) & 0x3;
+		if (pvt->is_chan_hash)
+			idx = haswell_chan_hash(idx, addr);
+	}
 	idx = idx % ch_way;
 	/*
 		switch(ch_way) {
 		case 2:
 		case 4:
-			sck_xch = 1 << sck_way * (ch_way >> 1);
+			sck_xch = (1 << sck_way) * (ch_way >> 1);
 			break;
 		default:
 			sprintf(msg, "Invalid mirror set. Can't decode addr");
 	ch_addr = addr - offset;
 	ch_addr >>= (6 + shiftup);
-	ch_addr /= ch_way * sck_way;
+	ch_addr /= sck_xch;
 	ch_addr <<= (6 + shiftup);
 	ch_addr |= addr & ((1 << (6 + shiftup)) - 1);

drivers/firmware/psci.c+1−1

@@ -360,7 +360,7 @@ static struct cpuidle_ops psci_cpuidle_ops __initdata = { · 359 unmodified lines
360	.init = psci_dt_cpu_init_idle,	360	.init = psci_dt_cpu_init_idle,
361	};	361	};
362		362
363	CPUIDLE_METHOD_OF_DECLARE(psci, "arm,psci", &psci_cpuidle_ops);	363	CPUIDLE_METHOD_OF_DECLARE(psci, "psci", &psci_cpuidle_ops);
364	#endif	364	#endif
365	#endif	365	#endif
366		366

drivers/gpu/drm/amd/amdgpu/amdgpu.h+1−0

@@ -1591,6 +1591,7 @@ struct amdgpu_uvd { · 1590 unmodified lines
1591	struct amdgpu_bo *vcpu_bo;	1591	struct amdgpu_bo *vcpu_bo;
1592	void *cpu_addr;	1592	void *cpu_addr;
1593	uint64_t gpu_addr;	1593	uint64_t gpu_addr;
		1594	unsigned fw_version;
1594	void *saved_bo;	1595	void *saved_bo;
1595	atomic_t handles[AMDGPU_MAX_UVD_HANDLES];	1596	atomic_t handles[AMDGPU_MAX_UVD_HANDLES];
1596	struct drm_file *filp[AMDGPU_MAX_UVD_HANDLES];	1597	struct drm_file *filp[AMDGPU_MAX_UVD_HANDLES];

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c+4−0

 	struct acp_pm_domain *apd;
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+	/* return early if no ACP */
+	if (!adev->acp.acp_genpd)
+		return 0;
 	/* SMU block will power on ACP irrespective of ACP runtime status.
 	 * Power off explicitly based on genpd ACP runtime status so that ACP
 	 * hw and ACP-genpd status are in sync.

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+1−1

@@ -303,7 +303,7 @@ static int amdgpu_info_ioctl(struct drm_device dev, void data, struct drm_file · 302 unmodified lines
303	fw_info.feature = adev->vce.fb_version;	303	fw_info.feature = adev->vce.fb_version;
304	break;	304	break;
305	case AMDGPU_INFO_FW_UVD:	305	case AMDGPU_INFO_FW_UVD:
306	fw_info.ver = 0;	306	fw_info.ver = adev->uvd.fw_version;
307	fw_info.feature = 0;	307	fw_info.feature = 0;
308	break;	308	break;
309	case AMDGPU_INFO_FW_GMC:	309	case AMDGPU_INFO_FW_GMC:

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h+3−3

@@ -53,7 +53,7 @@ struct amdgpu_hpd; · 52 unmodified lines
53		53
54	#define AMDGPU_MAX_HPD_PINS 6	54	#define AMDGPU_MAX_HPD_PINS 6
55	#define AMDGPU_MAX_CRTCS 6	55	#define AMDGPU_MAX_CRTCS 6
56	#define AMDGPU_MAX_AFMT_BLOCKS 7	56	#define AMDGPU_MAX_AFMT_BLOCKS 9
57		57
58	enum amdgpu_rmx_type {	58	enum amdgpu_rmx_type {
59	RMX_OFF,	59	RMX_OFF,
@@ -309,8 +309,8 @@ struct amdgpu_mode_info { · 249 unmodified lines
309	struct atom_context *atom_context;	309	struct atom_context *atom_context;
310	struct card_info *atom_card_info;	310	struct card_info *atom_card_info;
311	bool mode_config_initialized;	311	bool mode_config_initialized;
312	struct amdgpu_crtc *crtcs[6];	312	struct amdgpu_crtc *crtcs[AMDGPU_MAX_CRTCS];
313	struct amdgpu_afmt *afmt[7];	313	struct amdgpu_afmt *afmt[AMDGPU_MAX_AFMT_BLOCKS];
314	/* DVI-I properties */	314	/* DVI-I properties */
315	struct drm_property *coherent_mode_property;	315	struct drm_property *coherent_mode_property;
316	/* DAC enable load detect */	316	/* DAC enable load detect */

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c+2−0

@@ -223,6 +223,8 @@ static int amdgpu_verify_access(struct ttm_buffer_object bo, struct file filp) · 222 unmodified lines
223	{	223	{
224	struct amdgpu_bo *rbo = container_of(bo, struct amdgpu_bo, tbo);	224	struct amdgpu_bo *rbo = container_of(bo, struct amdgpu_bo, tbo);
225		225
		226	if (amdgpu_ttm_tt_get_usermm(bo->ttm))
		227	return -EPERM;
226	return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);	228	return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);
227	}	229	}
228		230

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+5−0

 	DRM_INFO("Found UVD firmware Version: %hu.%hu Family ID: %hu\n",
 		version_major, version_minor, family_id);
+	adev->uvd.fw_version = ((version_major << 24) | (version_minor << 16) |
+				(family_id << 8));
 	bo_size = AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8)
 		 +  AMDGPU_UVD_STACK_SIZE + AMDGPU_UVD_HEAP_SIZE;
 	r = amdgpu_bo_create(adev, bo_size, PAGE_SIZE, true,
 	if (i == AMDGPU_MAX_UVD_HANDLES)
 		return 0;
+	cancel_delayed_work_sync(&adev->uvd.idle_work);
 	size = amdgpu_bo_size(adev->uvd.vcpu_bo);
 	ptr = adev->uvd.cpu_addr;

drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c+1−0

@@ -234,6 +234,7 @@ int amdgpu_vce_suspend(struct amdgpu_device *adev) · 233 unmodified lines
234	if (i == AMDGPU_MAX_VCE_HANDLES)	234	if (i == AMDGPU_MAX_VCE_HANDLES)
235	return 0;	235	return 0;
236		236
		237	cancel_delayed_work_sync(&adev->vce.idle_work);
237	/* TODO: suspending running encoding sessions isn't supported */	238	/* TODO: suspending running encoding sessions isn't supported */
238	return -EINVAL;	239	return -EINVAL;
239	}	240	}

drivers/gpu/drm/drm_dp_mst_topology.c+8−1

 	u8 sinks[DRM_DP_MAX_SDP_STREAMS];
 	int i;
+	port = drm_dp_get_validated_port_ref(mgr, port);
+	if (!port)
+		return -EINVAL;
 	port_num = port->port_num;
 	mstb = drm_dp_get_validated_mstb_ref(mgr, port->parent);
 	if (!mstb) {
 		mstb = drm_dp_get_last_connected_port_and_mstb(mgr, port->parent, &port_num);
-		if (!mstb)
+		if (!mstb) {
+			drm_dp_put_port(port);
 			return -EINVAL;
+		}
 	}
 	txmsg = kzalloc(sizeof(*txmsg), GFP_KERNEL);
 	kfree(txmsg);
 fail_put:
 	drm_dp_put_mst_branch_device(mstb);
+	drm_dp_put_port(port);
 	return ret;
 }

drivers/gpu/drm/i915/i915_drv.h+3−2

@@ -2634,8 +2634,9 @@ struct drm_i915_cmd_table { · 2633 unmodified lines
2634		2634
2635	/* WaRsDisableCoarsePowerGating:skl,bxt */	2635	/* WaRsDisableCoarsePowerGating:skl,bxt */
2636	#define NEEDS_WaRsDisableCoarsePowerGating(dev) (IS_BXT_REVID(dev, 0, BXT_REVID_A1) \|\| \	2636	#define NEEDS_WaRsDisableCoarsePowerGating(dev) (IS_BXT_REVID(dev, 0, BXT_REVID_A1) \|\| \
2637	((IS_SKL_GT3(dev) \|\| IS_SKL_GT4(dev)) && \	2637	IS_SKL_GT3(dev) \|\| \
2638	IS_SKL_REVID(dev, 0, SKL_REVID_F0)))	2638	IS_SKL_GT4(dev))
		2639
2639	/*	2640	/*
2640	* dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts	2641	* dp aux and gmbus irq on gen4 seems to be able to generate legacy interrupts
2641	* even when in MSI mode. This results in spurious interrupt warnings if the	2642	* even when in MSI mode. This results in spurious interrupt warnings if the

drivers/gpu/drm/i915/i915_gem_userptr.c+17−12

@@ -501,19 +501,24 @@ __i915_gem_userptr_get_pages_worker(struct work_struct *_work) · 500 unmodified lines
501	if (pvec != NULL) {	501	if (pvec != NULL) {
502	struct mm_struct *mm = obj->userptr.mm->mm;	502	struct mm_struct *mm = obj->userptr.mm->mm;
503		503
504	down_read(&mm->mmap_sem);	504	ret = -EFAULT;
505	while (pinned < npages) {	505	if (atomic_inc_not_zero(&mm->mm_users)) {
506	ret = get_user_pages_remote(work->task, mm,	506	down_read(&mm->mmap_sem);
507	obj->userptr.ptr + pinned * PAGE_SIZE,	507	while (pinned < npages) {
508	npages - pinned,	508	ret = get_user_pages_remote
509	!obj->userptr.read_only, 0,	509	(work->task, mm,
510	pvec + pinned, NULL);	510	obj->userptr.ptr + pinned * PAGE_SIZE,
511	if (ret < 0)	511	npages - pinned,
512	break;	512	!obj->userptr.read_only, 0,
513		513	pvec + pinned, NULL);
514	pinned += ret;	514	if (ret < 0)
		515	break;
		516
		517	pinned += ret;
		518	}
		519	up_read(&mm->mmap_sem);
		520	mmput(mm);
515	}	521	}
516	up_read(&mm->mmap_sem);
517	}	522	}
518		523
519	mutex_lock(&dev->struct_mutex);	524	mutex_lock(&dev->struct_mutex);

drivers/gpu/drm/i915/intel_lrc.c+11−5

 		if (unlikely(total_bytes > remain_usable)) {
 			/*
 			 * The base request will fit but the reserved space
-			 * falls off the end. So only need to to wait for the
+			 * falls off the end. So don't need an immediate wrap
-			 * reserved size after flushing out the remainder.
+			 * and only need to effectively wait for the reserved
+			 * size space from the start of ringbuffer.
 			 */
 			wait_bytes = remain_actual + ringbuf->reserved_size;
-			need_wrap = true;
 		} else if (total_bytes > ringbuf->space) {
 			/* No wrapping required, just waiting. */
 			wait_bytes = total_bytes;
 	struct intel_ringbuffer *ringbuf = request->ringbuf;
 	int ret;
-	ret = intel_logical_ring_begin(request, 6 + WA_TAIL_DWORDS);
+	ret = intel_logical_ring_begin(request, 8 + WA_TAIL_DWORDS);
 	if (ret)
 		return ret;
+	/* We're using qword write, seqno should be aligned to 8 bytes. */
+	BUILD_BUG_ON(I915_GEM_HWS_INDEX & 1);
 	/* w/a for post sync ops following a GPGPU operation we
 	 * need a prior CS_STALL, which is emitted by the flush
 	 * following the batch.
 	 */
-	intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(5));
+	intel_logical_ring_emit(ringbuf, GFX_OP_PIPE_CONTROL(6));
 	intel_logical_ring_emit(ringbuf,
 				(PIPE_CONTROL_GLOBAL_GTT_IVB |
 				 PIPE_CONTROL_CS_STALL |
 	intel_logical_ring_emit(ringbuf, hws_seqno_address(request->ring));
 	intel_logical_ring_emit(ringbuf, 0);
 	intel_logical_ring_emit(ringbuf, i915_gem_request_get_seqno(request));
+	/* We're thrashing one dword of HWS. */
+	intel_logical_ring_emit(ringbuf, 0);
 	intel_logical_ring_emit(ringbuf, MI_USER_INTERRUPT);
+	intel_logical_ring_emit(ringbuf, MI_NOOP);
 	return intel_logical_ring_advance_and_submit(request);
 }

drivers/gpu/drm/i915/intel_pm.c+28−14

 			     const struct drm_plane_state *pstate,
 			     int y)
 {
-	struct intel_crtc *intel_crtc = to_intel_crtc(cstate->base.crtc);
+	struct intel_plane_state *intel_pstate = to_intel_plane_state(pstate);
 	struct drm_framebuffer *fb = pstate->fb;
+	uint32_t width = 0, height = 0;
+	width = drm_rect_width(&intel_pstate->src) >> 16;
+	height = drm_rect_height(&intel_pstate->src) >> 16;
+	if (intel_rotation_90_or_270(pstate->rotation))
+		swap(width, height);
 	/* for planar format */
 	if (fb->pixel_format == DRM_FORMAT_NV12) {
 		if (y)  /* y-plane data rate */
-			return intel_crtc->config->pipe_src_w *
+			return width * height *
-				intel_crtc->config->pipe_src_h *
 				drm_format_plane_cpp(fb->pixel_format, 0);
 		else    /* uv-plane data rate */
-			return (intel_crtc->config->pipe_src_w/2) *
+			return (width / 2) * (height / 2) *
-				(intel_crtc->config->pipe_src_h/2) *
 				drm_format_plane_cpp(fb->pixel_format, 1);
 	}
 	/* for packed formats */
-	return intel_crtc->config->pipe_src_w *
+	return width * height * drm_format_plane_cpp(fb->pixel_format, 0);
-		intel_crtc->config->pipe_src_h *
-		drm_format_plane_cpp(fb->pixel_format, 0);
 }
 /*
 		struct drm_framebuffer *fb = plane->state->fb;
 		int id = skl_wm_plane_id(intel_plane);
-		if (fb == NULL)
+		if (!to_intel_plane_state(plane->state)->visible)
 			continue;
 		if (plane->type == DRM_PLANE_TYPE_CURSOR)
 			continue;
 		uint16_t plane_blocks, y_plane_blocks = 0;
 		int id = skl_wm_plane_id(intel_plane);
-		if (pstate->fb == NULL)
+		if (!to_intel_plane_state(pstate)->visible)
 			continue;
 		if (plane->type == DRM_PLANE_TYPE_CURSOR)
 			continue;
 {
 	struct drm_plane *plane = &intel_plane->base;
 	struct drm_framebuffer *fb = plane->state->fb;
+	struct intel_plane_state *intel_pstate =
+					to_intel_plane_state(plane->state);
 	uint32_t latency = dev_priv->wm.skl_latency[level];
 	uint32_t method1, method2;
 	uint32_t plane_bytes_per_line, plane_blocks_per_line;
 	uint32_t res_blocks, res_lines;
 	uint32_t selected_result;
 	uint8_t cpp;
+	uint32_t width = 0, height = 0;
-	if (latency == 0 || !cstate->base.active || !fb)
+	if (latency == 0 || !cstate->base.active || !intel_pstate->visible)
 		return false;
+	width = drm_rect_width(&intel_pstate->src) >> 16;
+	height = drm_rect_height(&intel_pstate->src) >> 16;
+	if (intel_rotation_90_or_270(plane->state->rotation))
+		swap(width, height);
 	cpp = drm_format_plane_cpp(fb->pixel_format, 0);
 	method1 = skl_wm_method1(skl_pipe_pixel_rate(cstate),
 				 cpp, latency);
 	method2 = skl_wm_method2(skl_pipe_pixel_rate(cstate),
 				 cstate->base.adjusted_mode.crtc_htotal,
-				 cstate->pipe_src_w,
+				 width,
-				 cpp, fb->modifier[0],
+				 cpp,
+				 fb->modifier[0],
 				 latency);
-	plane_bytes_per_line = cstate->pipe_src_w * cpp;
+	plane_bytes_per_line = width * cpp;
 	plane_blocks_per_line = DIV_ROUND_UP(plane_bytes_per_line, 512);
 	if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||

drivers/gpu/drm/i915/intel_ringbuffer.c+11−7

 	/* WaForceContextSaveRestoreNonCoherent:skl,bxt */
 	tmp = HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT;
-	if (IS_SKL_REVID(dev, SKL_REVID_F0, SKL_REVID_F0) ||
+	if (IS_SKL_REVID(dev, SKL_REVID_F0, REVID_FOREVER) ||
 	    IS_BXT_REVID(dev, BXT_REVID_B0, REVID_FOREVER))
 		tmp |= HDC_FORCE_CSR_NON_COHERENT_OVR_DISABLE;
 	WA_SET_BIT_MASKED(HDC_CHICKEN0, tmp);
 		WA_SET_BIT_MASKED(HIZ_CHICKEN,
 				  BDW_HIZ_POWER_COMPILER_CLOCK_GATING_DISABLE);
-	if (IS_SKL_REVID(dev, 0, SKL_REVID_F0)) {
+	/* This is tied to WaForceContextSaveRestoreNonCoherent */
+	if (IS_SKL_REVID(dev, 0, REVID_FOREVER)) {
 		/*
 		 *Use Force Non-Coherent whenever executing a 3D context. This
 		 * is a workaround for a possible hang in the unlikely event
 {
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct drm_i915_gem_object *obj = ringbuf->obj;
+	/* Ring wraparound at offset 0 sometimes hangs. No idea why. */
+	unsigned flags = PIN_OFFSET_BIAS | 4096;
 	int ret;
 	if (HAS_LLC(dev_priv) && !obj->stolen) {
-		ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, 0);
+		ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, flags);
 		if (ret)
 			return ret;
 			return -ENOMEM;
 		}
 	} else {
-		ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE, PIN_MAPPABLE);
+		ret = i915_gem_obj_ggtt_pin(obj, PAGE_SIZE,
+					    flags | PIN_MAPPABLE);
 		if (ret)
 			return ret;
 		if (unlikely(total_bytes > remain_usable)) {
 			/*
 			 * The base request will fit but the reserved space
-			 * falls off the end. So only need to to wait for the
+			 * falls off the end. So don't need an immediate wrap
-			 * reserved size after flushing out the remainder.
+			 * and only need to effectively wait for the reserved
+			 * size space from the start of ringbuffer.
 			 */
 			wait_bytes = remain_actual + ringbuf->reserved_size;
-			need_wrap = true;
 		} else if (total_bytes > ringbuf->space) {
 			/* No wrapping required, just waiting. */
 			wait_bytes = total_bytes;

drivers/gpu/drm/i915/intel_uncore.c+5−1

 	} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
 		dev_priv->uncore.funcs.force_wake_get =
 			fw_domains_get_with_thread_status;
-		dev_priv->uncore.funcs.force_wake_put = fw_domains_put;
+		if (IS_HASWELL(dev))
+			dev_priv->uncore.funcs.force_wake_put =
+				fw_domains_put_with_fifo;
+		else
+			dev_priv->uncore.funcs.force_wake_put = fw_domains_put;
 		fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
 			       FORCEWAKE_MT, FORCEWAKE_ACK_HSW);
 	} else if (IS_IVYBRIDGE(dev)) {

drivers/gpu/drm/nouveau/nouveau_connector.c+2−2

 		break;
 	default:
 		if (disp->dithering_mode) {
+			nv_connector->dithering_mode = DITHERING_MODE_AUTO;
 			drm_object_attach_property(&connector->base,
 						   disp->dithering_mode,
 						   nv_connector->
 						   dithering_mode);
-			nv_connector->dithering_mode = DITHERING_MODE_AUTO;
 		}
 		if (disp->dithering_depth) {
+			nv_connector->dithering_depth = DITHERING_DEPTH_AUTO;
 			drm_object_attach_property(&connector->base,
 						   disp->dithering_depth,
 						   nv_connector->
 						   dithering_depth);
-			nv_connector->dithering_depth = DITHERING_DEPTH_AUTO;
 		}
 		break;
 	}

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c+2−0

@@ -1832,6 +1832,8 @@ gf100_gr_init(struct gf100_gr *gr) · 1831 unmodified lines
1832		1832
1833	gf100_gr_mmio(gr, gr->func->mmio);	1833	gf100_gr_mmio(gr, gr->func->mmio);
1834		1834
		1835	nvkm_mask(device, TPC_UNIT(0, 0, 0x05c), 0x00000001, 0x00000001);
		1836
1835	memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));	1837	memcpy(tpcnr, gr->tpc_nr, sizeof(gr->tpc_nr));
1836	for (i = 0, gpc = -1; i < gr->tpc_total; i++) {	1838	for (i = 0, gpc = -1; i < gr->tpc_total; i++) {
1837	do {	1839	do {

drivers/gpu/drm/radeon/radeon_atpx_handler.c+7−4

 	return radeon_atpx_priv.atpx_detected;
 }
-bool radeon_has_atpx_dgpu_power_cntl(void) {
-	return radeon_atpx_priv.atpx.functions.power_cntl;
-}
 /**
  * radeon_atpx_call - call an ATPX method
  *
  */
 static int radeon_atpx_validate(struct radeon_atpx *atpx)
 {
+	/* make sure required functions are enabled */
+	/* dGPU power control is required */
+	if (atpx->functions.power_cntl == false) {
+		printk("ATPX dGPU power cntl not present, forcing\n");
+		atpx->functions.power_cntl = true;
+	}
 	if (atpx->functions.px_params) {
 		union acpi_object *info;
 		struct atpx_px_params output;

drivers/gpu/drm/radeon/radeon_connectors.c+6−1

 						   rdev->mode_info.dither_property,
 						   RADEON_FMT_DITHER_DISABLE);
-			if (radeon_audio != 0)
+			if (radeon_audio != 0) {
 				drm_object_attach_property(&radeon_connector->base.base,
 							   rdev->mode_info.audio_property,
 							   RADEON_AUDIO_AUTO);
+				radeon_connector->audio = RADEON_AUDIO_AUTO;
+			}
 			if (ASIC_IS_DCE5(rdev))
 				drm_object_attach_property(&radeon_connector->base.base,
 							   rdev->mode_info.output_csc_property,
 				drm_object_attach_property(&radeon_connector->base.base,
 							   rdev->mode_info.audio_property,
 							   RADEON_AUDIO_AUTO);
+				radeon_connector->audio = RADEON_AUDIO_AUTO;
 			}
 			if (connector_type == DRM_MODE_CONNECTOR_DVII) {
 				radeon_connector->dac_load_detect = true;
 				drm_object_attach_property(&radeon_connector->base.base,
 							   rdev->mode_info.audio_property,
 							   RADEON_AUDIO_AUTO);
+				radeon_connector->audio = RADEON_AUDIO_AUTO;
 			}
 			if (ASIC_IS_DCE5(rdev))
 				drm_object_attach_property(&radeon_connector->base.base,
 				drm_object_attach_property(&radeon_connector->base.base,
 							   rdev->mode_info.audio_property,
 							   RADEON_AUDIO_AUTO);
+				radeon_connector->audio = RADEON_AUDIO_AUTO;
 			}
 			if (ASIC_IS_DCE5(rdev))
 				drm_object_attach_property(&radeon_connector->base.base,

drivers/gpu/drm/radeon/radeon_device.c+4−10

 	"LAST",
 };
-#if defined(CONFIG_VGA_SWITCHEROO)
-bool radeon_has_atpx_dgpu_power_cntl(void);
-#else
-static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; }
-#endif
 #define RADEON_PX_QUIRK_DISABLE_PX  (1 << 0)
 #define RADEON_PX_QUIRK_LONG_WAKEUP (1 << 1)
 	}
 	rdev->fence_context = fence_context_alloc(RADEON_NUM_RINGS);
-	DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X).\n",
+	DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X 0x%04X:0x%04X 0x%02X).\n",
-		radeon_family_name[rdev->family], pdev->vendor, pdev->device,
+		 radeon_family_name[rdev->family], pdev->vendor, pdev->device,
-		pdev->subsystem_vendor, pdev->subsystem_device);
+		 pdev->subsystem_vendor, pdev->subsystem_device, pdev->revision);
 	/* mutex initialization are all done here so we
 	 * can recall function without having locking issues */
 	 * ignore it */
 	vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
-	if ((rdev->flags & RADEON_IS_PX) && radeon_has_atpx_dgpu_power_cntl())
+	if (rdev->flags & RADEON_IS_PX)
 		runtime = true;
 	vga_switcheroo_register_client(rdev->pdev, &radeon_switcheroo_ops, runtime);
 	if (runtime)

drivers/gpu/drm/radeon/radeon_ttm.c+2−0

@@ -235,6 +235,8 @@ static int radeon_verify_access(struct ttm_buffer_object bo, struct file filp) · 234 unmodified lines
235	{	235	{
236	struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);	236	struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
237		237
		238	if (radeon_ttm_tt_has_userptr(bo->ttm))
		239	return -EPERM;
238	return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);	240	return drm_vma_node_verify_access(&rbo->gem_base.vma_node, filp);
239	}	241	}
240		242

drivers/gpu/drm/radeon/si_dpm.c+1−0

@@ -2931,6 +2931,7 @@ static struct si_dpm_quirk si_dpm_quirk_list[] = { · 2930 unmodified lines
2931	{ PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 },	2931	{ PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 },
2932	{ PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 },	2932	{ PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 },
2933	{ PCI_VENDOR_ID_ATI, 0x6811, 0x148c, 0x2015, 0, 120000 },	2933	{ PCI_VENDOR_ID_ATI, 0x6811, 0x148c, 0x2015, 0, 120000 },
		2934	{ PCI_VENDOR_ID_ATI, 0x6810, 0x1682, 0x9275, 0, 120000 },
2934	{ 0, 0, 0, 0 },	2935	{ 0, 0, 0, 0 },
2935	};	2936	};
2936		2937

drivers/infiniband/hw/mlx5/main.c+2−2

@@ -671,8 +671,8 @@ static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, · 670 unmodified lines
671	struct mlx5_ib_dev *dev = to_mdev(ibdev);	671	struct mlx5_ib_dev *dev = to_mdev(ibdev);
672	struct mlx5_core_dev *mdev = dev->mdev;	672	struct mlx5_core_dev *mdev = dev->mdev;
673	struct mlx5_hca_vport_context *rep;	673	struct mlx5_hca_vport_context *rep;
674	int max_mtu;	674	u16 max_mtu;
675	int oper_mtu;	675	u16 oper_mtu;
676	int err;	676	int err;
677	u8 ib_link_width_oper;	677	u8 ib_link_width_oper;
678	u8 vl_hw_cap;	678	u8 vl_hw_cap;

drivers/input/joystick/xpad.c+2−0

 	{ 0x0738, 0x4728, "Mad Catz Street Fighter IV FightPad", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 },
 	{ 0x0738, 0x4738, "Mad Catz Wired Xbox 360 Controller (SFIV)", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOX360 },
 	{ 0x0738, 0x4740, "Mad Catz Beat Pad", 0, XTYPE_XBOX360 },
+	{ 0x0738, 0x4a01, "Mad Catz FightStick TE 2", MAP_TRIGGERS_TO_BUTTONS, XTYPE_XBOXONE },
 	{ 0x0738, 0x6040, "Mad Catz Beat Pad Pro", MAP_DPAD_TO_BUTTONS, XTYPE_XBOX },
 	{ 0x0738, 0xb726, "Mad Catz Xbox controller - MW2", 0, XTYPE_XBOX360 },
 	{ 0x0738, 0xbeef, "Mad Catz JOYTECH NEO SE Advanced GamePad", XTYPE_XBOX360 },
 	XPAD_XBOX360_VENDOR(0x046d),		/* Logitech X-Box 360 style controllers */
 	XPAD_XBOX360_VENDOR(0x0738),		/* Mad Catz X-Box 360 controllers */
 	{ USB_DEVICE(0x0738, 0x4540) },		/* Mad Catz Beat Pad */
+	XPAD_XBOXONE_VENDOR(0x0738),		/* Mad Catz FightStick TE 2 */
 	XPAD_XBOX360_VENDOR(0x0e6f),		/* 0x0e6f X-Box 360 controllers */
 	XPAD_XBOX360_VENDOR(0x12ab),		/* X-Box 360 dance pads */
 	XPAD_XBOX360_VENDOR(0x1430),		/* RedOctane X-Box 360 controllers */

drivers/input/misc/arizona-haptics.c+0−1

@@ -178,7 +178,6 @@ static int arizona_haptics_probe(struct platform_device *pdev) · 177 unmodified lines
178	input_set_drvdata(haptics->input_dev, haptics);	178	input_set_drvdata(haptics->input_dev, haptics);
179		179
180	haptics->input_dev->name = "arizona:haptics";	180	haptics->input_dev->name = "arizona:haptics";
181	haptics->input_dev->dev.parent = pdev->dev.parent;
182	haptics->input_dev->close = arizona_haptics_close;	181	haptics->input_dev->close = arizona_haptics_close;
183	__set_bit(FF_RUMBLE, haptics->input_dev->ffbit);	182	__set_bit(FF_RUMBLE, haptics->input_dev->ffbit);
184		183

drivers/input/misc/pmic8xxx-pwrkey.c+4−3

 	if (of_property_read_u32(pdev->dev.of_node, "debounce", &kpd_delay))
 		kpd_delay = 15625;
-	if (kpd_delay > 62500 || kpd_delay == 0) {
+	/* Valid range of pwr key trigger delay is 1/64 sec to 2 seconds. */
+	if (kpd_delay > USEC_PER_SEC * 2 || kpd_delay < USEC_PER_SEC / 64) {
 		dev_err(&pdev->dev, "invalid power key trigger delay\n");
 		return -EINVAL;
 	}
 	pwr->name = "pmic8xxx_pwrkey";
 	pwr->phys = "pmic8xxx_pwrkey/input0";
-	delay = (kpd_delay << 10) / USEC_PER_SEC;
+	delay = (kpd_delay << 6) / USEC_PER_SEC;
-	delay = 1 + ilog2(delay);
+	delay = ilog2(delay);
 	err = regmap_read(regmap, PON_CNTL_1, &pon_cntl);
 	if (err < 0) {

drivers/input/misc/twl4030-vibra.c+0−1

@@ -222,7 +222,6 @@ static int twl4030_vibra_probe(struct platform_device *pdev) · 221 unmodified lines
222		222
223	info->input_dev->name = "twl4030:vibrator";	223	info->input_dev->name = "twl4030:vibrator";
224	info->input_dev->id.version = 1;	224	info->input_dev->id.version = 1;
225	info->input_dev->dev.parent = pdev->dev.parent;
226	info->input_dev->close = twl4030_vibra_close;	225	info->input_dev->close = twl4030_vibra_close;
227	__set_bit(FF_RUMBLE, info->input_dev->ffbit);	226	__set_bit(FF_RUMBLE, info->input_dev->ffbit);
228		227

drivers/input/misc/twl6040-vibra.c+1−7

 struct vibra_info {
 	struct device *dev;
 	struct input_dev *input_dev;
-	struct workqueue_struct *workqueue;
 	struct work_struct play_work;
 	struct mutex mutex;
 	int irq;
 	info->strong_speed = effect->u.rumble.strong_magnitude;
 	info->direction = effect->direction < EFFECT_DIR_180_DEG ? 1 : -1;
-	ret = queue_work(info->workqueue, &info->play_work);
+	schedule_work(&info->play_work);
-	if (!ret) {
-		dev_info(&input->dev, "work is already on queue\n");
-		return ret;
-	}
 	return 0;
 }
 	info->input_dev->name = "twl6040:vibrator";
 	info->input_dev->id.version = 1;
-	info->input_dev->dev.parent = pdev->dev.parent;
 	info->input_dev->close = twl6040_vibra_close;
 	__set_bit(FF_RUMBLE, info->input_dev->ffbit);

drivers/input/tablet/gtco.c+9−1

 		goto err_free_buf;
 	}
+	/* Sanity check that a device has an endpoint */
+	if (usbinterface->altsetting[0].desc.bNumEndpoints < 1) {
+		dev_err(&usbinterface->dev,
+			"Invalid number of endpoints\n");
+		error = -EINVAL;
+		goto err_free_urb;
+	}
 	/*
 	 * The endpoint is always altsetting 0, we know this since we know
 	 * this device only has one interrupt endpoint
 	 * HID report descriptor
 	 */
 	if (usb_get_extra_descriptor(usbinterface->cur_altsetting,
-				     HID_DEVICE_TYPE, &hid_desc) != 0){
+				     HID_DEVICE_TYPE, &hid_desc) != 0) {
 		dev_err(&usbinterface->dev,
 			"Can't retrieve exta USB descriptor to get hid report descriptor length\n");
 		error = -EIO;

drivers/iommu/amd_iommu.c+76−11

@@ -92,6 +92,7 @@ struct iommu_dev_data { · 91 unmodified lines
92	struct list_head dev_data_list; /* For global dev_data_list */	92	struct list_head dev_data_list; /* For global dev_data_list */
93	struct protection_domain domain; / Domain the device is bound to */	93	struct protection_domain domain; / Domain the device is bound to */
94	u16 devid; /* PCI Device ID */	94	u16 devid; /* PCI Device ID */
		95	u16 alias; /* Alias Device ID */
95	bool iommu_v2; /* Device can make use of IOMMUv2 */	96	bool iommu_v2; /* Device can make use of IOMMUv2 */
96	bool passthrough; /* Device is identity mapped */	97	bool passthrough; /* Device is identity mapped */
97	struct {	98	struct {
@@ -166,6 +167,13 @@ static struct protection_domain to_pdomain(struct iommu_domain dom) · 68 unmodified lines
166	return container_of(dom, struct protection_domain, domain);	167	return container_of(dom, struct protection_domain, domain);
167	}	168	}
168		169
		170	static inline u16 get_device_id(struct device *dev)
		171	{
		172	struct pci_dev *pdev = to_pci_dev(dev);
		173
		174	return PCI_DEVID(pdev->bus->number, pdev->devfn);
		175	}
		176
169	static struct iommu_dev_data *alloc_dev_data(u16 devid)	177	static struct iommu_dev_data *alloc_dev_data(u16 devid)
170	{	178	{
171	struct iommu_dev_data *dev_data;	179	struct iommu_dev_data *dev_data;
@@ -203,6 +211,68 @@ out_unlock: · 31 unmodified lines
203	return dev_data;	211	return dev_data;
204	}	212	}
205		213
		214	static int __last_alias(struct pci_dev pdev, u16 alias, void data)
		215	{
		216	(u16 )data = alias;
		217	return 0;
		218	}
		219
		220	static u16 get_alias(struct device *dev)
		221	{
		222	struct pci_dev *pdev = to_pci_dev(dev);
		223	u16 devid, ivrs_alias, pci_alias;
		224
		225	devid = get_device_id(dev);
		226	ivrs_alias = amd_iommu_alias_table[devid];
		227	pci_for_each_dma_alias(pdev, __last_alias, &pci_alias);
		228
		229	if (ivrs_alias == pci_alias)
		230	return ivrs_alias;
		231
		232	/*
		233	* DMA alias showdown
		234	*
		235	* The IVRS is fairly reliable in telling us about aliases, but it
		236	* can't know about every screwy device. If we don't have an IVRS
		237	* reported alias, use the PCI reported alias. In that case we may
		238	* still need to initialize the rlookup and dev_table entries if the
		239	* alias is to a non-existent device.
		240	*/
		241	if (ivrs_alias == devid) {
		242	if (!amd_iommu_rlookup_table[pci_alias]) {
		243	amd_iommu_rlookup_table[pci_alias] =
		244	amd_iommu_rlookup_table[devid];
		245	memcpy(amd_iommu_dev_table[pci_alias].data,
		246	amd_iommu_dev_table[devid].data,
		247	sizeof(amd_iommu_dev_table[pci_alias].data));
		248	}
		249
		250	return pci_alias;
		251	}
		252
		253	pr_info("AMD-Vi: Using IVRS reported alias %02x:%02x.%d "
		254	"for device %s[%04x:%04x], kernel reported alias "
		255	"%02x:%02x.%d\n", PCI_BUS_NUM(ivrs_alias), PCI_SLOT(ivrs_alias),
		256	PCI_FUNC(ivrs_alias), dev_name(dev), pdev->vendor, pdev->device,
		257	PCI_BUS_NUM(pci_alias), PCI_SLOT(pci_alias),
		258	PCI_FUNC(pci_alias));
		259
		260	/*
		261	* If we don't have a PCI DMA alias and the IVRS alias is on the same
		262	* bus, then the IVRS table may know about a quirk that we don't.
		263	*/
		264	if (pci_alias == devid &&
		265	PCI_BUS_NUM(ivrs_alias) == pdev->bus->number) {
		266	pdev->dev_flags \|= PCI_DEV_FLAGS_DMA_ALIAS_DEVFN;
		267	pdev->dma_alias_devfn = ivrs_alias & 0xff;
		268	pr_info("AMD-Vi: Added PCI DMA alias %02x.%d for %s\n",
		269	PCI_SLOT(ivrs_alias), PCI_FUNC(ivrs_alias),
		270	dev_name(dev));
		271	}
		272
		273	return ivrs_alias;
		274	}
		275
206	static struct iommu_dev_data *find_dev_data(u16 devid)	276	static struct iommu_dev_data *find_dev_data(u16 devid)
207	{	277	{
208	struct iommu_dev_data *dev_data;	278	struct iommu_dev_data *dev_data;
@@ -215,13 +285,6 @@ static struct iommu_dev_data *find_dev_data(u16 devid) · 6 unmodified lines
215	return dev_data;	285	return dev_data;
216	}	286	}
217		287
218	static inline u16 get_device_id(struct device *dev)
219	{
220	struct pci_dev *pdev = to_pci_dev(dev);
221
222	return PCI_DEVID(pdev->bus->number, pdev->devfn);
223	}
224
225	static struct iommu_dev_data get_dev_data(struct device dev)	288	static struct iommu_dev_data get_dev_data(struct device dev)
226	{	289	{
227	return dev->archdata.iommu;	290	return dev->archdata.iommu;
@@ -349,6 +412,8 @@ static int iommu_init_device(struct device *dev) · 121 unmodified lines
349	if (!dev_data)	412	if (!dev_data)
350	return -ENOMEM;	413	return -ENOMEM;
351		414
		415	dev_data->alias = get_alias(dev);
		416
352	if (pci_iommuv2_capable(pdev)) {	417	if (pci_iommuv2_capable(pdev)) {
353	struct amd_iommu *iommu;	418	struct amd_iommu *iommu;
354		419
@@ -369,7 +434,7 @@ static void iommu_ignore_device(struct device *dev) · 14 unmodified lines
369	u16 devid, alias;	434	u16 devid, alias;
370		435
371	devid = get_device_id(dev);	436	devid = get_device_id(dev);
372	alias = amd_iommu_alias_table[devid];	437	alias = get_alias(dev);
373		438
374	memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry));	439	memset(&amd_iommu_dev_table[devid], 0, sizeof(struct dev_table_entry));
375	memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry));	440	memset(&amd_iommu_dev_table[alias], 0, sizeof(struct dev_table_entry));
@@ -1061,7 +1126,7 @@ static int device_flush_dte(struct iommu_dev_data *dev_data) · 685 unmodified lines
1061	int ret;	1126	int ret;
1062		1127
1063	iommu = amd_iommu_rlookup_table[dev_data->devid];	1128	iommu = amd_iommu_rlookup_table[dev_data->devid];
1064	alias = amd_iommu_alias_table[dev_data->devid];	1129	alias = dev_data->alias;
1065		1130
1066	ret = iommu_flush_dte(iommu, dev_data->devid);	1131	ret = iommu_flush_dte(iommu, dev_data->devid);
1067	if (!ret && alias != dev_data->devid)	1132	if (!ret && alias != dev_data->devid)
@@ -2039,7 +2104,7 @@ static void do_attach(struct iommu_dev_data *dev_data, · 971 unmodified lines
2039	bool ats;	2104	bool ats;
2040		2105
2041	iommu = amd_iommu_rlookup_table[dev_data->devid];	2106	iommu = amd_iommu_rlookup_table[dev_data->devid];
2042	alias = amd_iommu_alias_table[dev_data->devid];	2107	alias = dev_data->alias;
2043	ats = dev_data->ats.enabled;	2108	ats = dev_data->ats.enabled;
2044		2109
2045	/* Update data structures */	2110	/* Update data structures */
@@ -2073,7 +2138,7 @@ static void do_detach(struct iommu_dev_data *dev_data) · 27 unmodified lines
2073	return;	2138	return;
2074		2139
2075	iommu = amd_iommu_rlookup_table[dev_data->devid];	2140	iommu = amd_iommu_rlookup_table[dev_data->devid];
2076	alias = amd_iommu_alias_table[dev_data->devid];	2141	alias = dev_data->alias;
2077		2142
2078	/* decrease reference counters */	2143	/* decrease reference counters */
2079	dev_data->domain->dev_iommu[iommu->index] -= 1;	2144	dev_data->domain->dev_iommu[iommu->index] -= 1;

drivers/iommu/arm-smmu.c+15−7

 	if (smmu_domain->smmu)
 		goto out_unlock;
+	/* We're bypassing these SIDs, so don't allocate an actual context */
+	if (domain->type == IOMMU_DOMAIN_DMA) {
+		smmu_domain->smmu = smmu;
+		goto out_unlock;
+	}
 	/*
 	 * Mapping the requested stage onto what we support is surprisingly
 	 * complicated, mainly because the spec allows S1+S2 SMMUs without
 	void __iomem *cb_base;
 	int irq;
-	if (!smmu)
+	if (!smmu || domain->type == IOMMU_DOMAIN_DMA)
 		return;
 	/*
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	void __iomem *gr0_base = ARM_SMMU_GR0(smmu);
-	/* Devices in an IOMMU group may already be configured */
-	ret = arm_smmu_master_configure_smrs(smmu, cfg);
-	if (ret)
-		return ret == -EEXIST ? 0 : ret;
 	/*
 	 * FIXME: This won't be needed once we have IOMMU-backed DMA ops
-	 * for all devices behind the SMMU.
+	 * for all devices behind the SMMU. Note that we need to take
+	 * care configuring SMRs for devices both a platform_device and
+	 * and a PCI device (i.e. a PCI host controller)
 	 */
 	if (smmu_domain->domain.type == IOMMU_DOMAIN_DMA)
 		return 0;
+	/* Devices in an IOMMU group may already be configured */
+	ret = arm_smmu_master_configure_smrs(smmu, cfg);
+	if (ret)
+		return ret == -EEXIST ? 0 : ret;
 	for (i = 0; i < cfg->num_streamids; ++i) {
 		u32 idx, s2cr;

drivers/irqchip/irq-mips-gic.c+2−2

@@ -467,7 +467,7 @@ static int gic_set_affinity(struct irq_data d, const struct cpumask cpumask, · 466 unmodified lines
467	gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));	467	gic_map_to_vpe(irq, mips_cm_vp_id(cpumask_first(&tmp)));
468		468
469	/* Update the pcpu_masks */	469	/* Update the pcpu_masks */
470	for (i = 0; i < gic_vpes; i++)	470	for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
471	clear_bit(irq, pcpu_masks[i].pcpu_mask);	471	clear_bit(irq, pcpu_masks[i].pcpu_mask);
472	set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask);	472	set_bit(irq, pcpu_masks[cpumask_first(&tmp)].pcpu_mask);
473		473
@@ -707,7 +707,7 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq, · 233 unmodified lines
707	spin_lock_irqsave(&gic_lock, flags);	707	spin_lock_irqsave(&gic_lock, flags);
708	gic_map_to_pin(intr, gic_cpu_pin);	708	gic_map_to_pin(intr, gic_cpu_pin);
709	gic_map_to_vpe(intr, vpe);	709	gic_map_to_vpe(intr, vpe);
710	for (i = 0; i < gic_vpes; i++)	710	for (i = 0; i < min(gic_vpes, NR_CPUS); i++)
711	clear_bit(intr, pcpu_masks[i].pcpu_mask);	711	clear_bit(intr, pcpu_masks[i].pcpu_mask);
712	set_bit(intr, pcpu_masks[vpe].pcpu_mask);	712	set_bit(intr, pcpu_masks[vpe].pcpu_mask);
713	spin_unlock_irqrestore(&gic_lock, flags);	713	spin_unlock_irqrestore(&gic_lock, flags);

drivers/net/Kconfig+2−3

 	  this device is consigned into oblivion) with a configurable IP
 	  address. It is most commonly used in order to make your currently
 	  inactive SLIP address seem like a real address for local programs.
-	  If you use SLIP or PPP, you might want to say Y here. Since this
+	  If you use SLIP or PPP, you might want to say Y here. It won't
-	  thing often comes in handy, the default is Y. It won't enlarge your
+	  enlarge your kernel. What a deal. Read about it in the Network
-	  kernel either. What a deal. Read about it in the Network
 	  Administrator's Guide, available from
 	  <http://www.tldp.org/docs.html#guide>.

drivers/net/ethernet/mellanox/mlx4/en_tx.c+4−2

@@ -405,7 +405,6 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 404 unmodified lines
405	u32 packets = 0;	405	u32 packets = 0;
406	u32 bytes = 0;	406	u32 bytes = 0;
407	int factor = priv->cqe_factor;	407	int factor = priv->cqe_factor;
408	u64 timestamp = 0;
409	int done = 0;	408	int done = 0;
410	int budget = priv->tx_work_limit;	409	int budget = priv->tx_work_limit;
411	u32 last_nr_txbb;	410	u32 last_nr_txbb;
@@ -445,9 +444,12 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 33 unmodified lines
445	new_index = be16_to_cpu(cqe->wqe_index) & size_mask;	444	new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
446		445
447	do {	446	do {
		447	u64 timestamp = 0;
		448
448	txbbs_skipped += last_nr_txbb;	449	txbbs_skipped += last_nr_txbb;
449	ring_index = (ring_index + last_nr_txbb) & size_mask;	450	ring_index = (ring_index + last_nr_txbb) & size_mask;
450	if (ring->tx_info[ring_index].ts_requested)	451
		452	if (unlikely(ring->tx_info[ring_index].ts_requested))
451	timestamp = mlx4_en_get_cqe_ts(cqe);	453	timestamp = mlx4_en_get_cqe_ts(cqe);
452		454
453	/* free next descriptor */	455	/* free next descriptor */

drivers/net/ethernet/mellanox/mlx5/core/en.h+1−1

@@ -510,7 +510,7 @@ enum mlx5e_link_mode { · 509 unmodified lines
510	MLX5E_100GBASE_KR4 = 22,	510	MLX5E_100GBASE_KR4 = 22,
511	MLX5E_100GBASE_LR4 = 23,	511	MLX5E_100GBASE_LR4 = 23,
512	MLX5E_100BASE_TX = 24,	512	MLX5E_100BASE_TX = 24,
513	MLX5E_100BASE_T = 25,	513	MLX5E_1000BASE_T = 25,
514	MLX5E_10GBASE_T = 26,	514	MLX5E_10GBASE_T = 26,
515	MLX5E_25GBASE_CR = 27,	515	MLX5E_25GBASE_CR = 27,
516	MLX5E_25GBASE_KR = 28,	516	MLX5E_25GBASE_KR = 28,

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+4−4

@@ -138,10 +138,10 @@ static const struct { · 137 unmodified lines
138	[MLX5E_100BASE_TX] = {	138	[MLX5E_100BASE_TX] = {
139	.speed = 100,	139	.speed = 100,
140	},	140	},
141	[MLX5E_100BASE_T] = {	141	[MLX5E_1000BASE_T] = {
142	.supported = SUPPORTED_100baseT_Full,	142	.supported = SUPPORTED_1000baseT_Full,
143	.advertised = ADVERTISED_100baseT_Full,	143	.advertised = ADVERTISED_1000baseT_Full,
144	.speed = 100,	144	.speed = 1000,
145	},	145	},
146	[MLX5E_10GBASE_T] = {	146	[MLX5E_10GBASE_T] = {
147	.supported = SUPPORTED_10000baseT_Full,	147	.supported = SUPPORTED_10000baseT_Full,

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+57−15

@@ -1542,24 +1542,50 @@ static int mlx5e_refresh_tirs_self_loopback_enable(struct mlx5e_priv *priv) · 1541 unmodified lines
1542	return 0;	1542	return 0;
1543	}	1543	}
1544		1544
1545	static int mlx5e_set_dev_port_mtu(struct net_device *netdev)	1545	static int mlx5e_set_mtu(struct mlx5e_priv *priv, u16 mtu)
1546	{	1546	{
1547	struct mlx5e_priv *priv = netdev_priv(netdev);
1548	struct mlx5_core_dev *mdev = priv->mdev;	1547	struct mlx5_core_dev *mdev = priv->mdev;
1549	int hw_mtu;	1548	u16 hw_mtu = MLX5E_SW2HW_MTU(mtu);
1550	int err;	1549	int err;
1551		1550
1552	err = mlx5_set_port_mtu(mdev, MLX5E_SW2HW_MTU(netdev->mtu), 1);	1551	err = mlx5_set_port_mtu(mdev, hw_mtu, 1);
1553	if (err)	1552	if (err)
1554	return err;	1553	return err;
1555		1554
1556	mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);	1555	/* Update vport context MTU */
		1556	mlx5_modify_nic_vport_mtu(mdev, hw_mtu);
		1557	return 0;
		1558	}
1557		1559
1558	if (MLX5E_HW2SW_MTU(hw_mtu) != netdev->mtu)	1560	static void mlx5e_query_mtu(struct mlx5e_priv priv, u16 mtu)
1559	netdev_warn(netdev, "%s: Port MTU %d is different than netdev mtu %d\n",	1561	{
1560	__func__, MLX5E_HW2SW_MTU(hw_mtu), netdev->mtu);	1562	struct mlx5_core_dev *mdev = priv->mdev;
		1563	u16 hw_mtu = 0;
		1564	int err;
1561		1565
1562	netdev->mtu = MLX5E_HW2SW_MTU(hw_mtu);	1566	err = mlx5_query_nic_vport_mtu(mdev, &hw_mtu);
		1567	if (err \|\| !hw_mtu) /* fallback to port oper mtu */
		1568	mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);
		1569
		1570	*mtu = MLX5E_HW2SW_MTU(hw_mtu);
		1571	}
		1572
		1573	static int mlx5e_set_dev_port_mtu(struct net_device *netdev)
		1574	{
		1575	struct mlx5e_priv *priv = netdev_priv(netdev);
		1576	u16 mtu;
		1577	int err;
		1578
		1579	err = mlx5e_set_mtu(priv, netdev->mtu);
		1580	if (err)
		1581	return err;
		1582
		1583	mlx5e_query_mtu(priv, &mtu);
		1584	if (mtu != netdev->mtu)
		1585	netdev_warn(netdev, "%s: VPort MTU %d is different than netdev mtu %d\n",
		1586	__func__, mtu, netdev->mtu);
		1587
		1588	netdev->mtu = mtu;
1563	return 0;	1589	return 0;
1564	}	1590	}
1565		1591
@@ -2257,22 +2283,27 @@ static int mlx5e_set_features(struct net_device *netdev, · 691 unmodified lines
2257	return err ? -EINVAL : 0;	2283	return err ? -EINVAL : 0;
2258	}	2284	}
2259		2285
		2286	#define MXL5_HW_MIN_MTU 64
		2287	#define MXL5E_MIN_MTU (MXL5_HW_MIN_MTU + ETH_FCS_LEN)
		2288
2260	static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)	2289	static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)
2261	{	2290	{
2262	struct mlx5e_priv *priv = netdev_priv(netdev);	2291	struct mlx5e_priv *priv = netdev_priv(netdev);
2263	struct mlx5_core_dev *mdev = priv->mdev;	2292	struct mlx5_core_dev *mdev = priv->mdev;
2264	bool was_opened;	2293	bool was_opened;
2265	int max_mtu;	2294	u16 max_mtu;
		2295	u16 min_mtu;
2266	int err = 0;	2296	int err = 0;
2267		2297
2268	mlx5_query_port_max_mtu(mdev, &max_mtu, 1);	2298	mlx5_query_port_max_mtu(mdev, &max_mtu, 1);
2269		2299
2270	max_mtu = MLX5E_HW2SW_MTU(max_mtu);	2300	max_mtu = MLX5E_HW2SW_MTU(max_mtu);
		2301	min_mtu = MLX5E_HW2SW_MTU(MXL5E_MIN_MTU);
2271		2302
2272	if (new_mtu > max_mtu) {	2303	if (new_mtu > max_mtu \|\| new_mtu < min_mtu) {
2273	netdev_err(netdev,	2304	netdev_err(netdev,
2274	"%s: Bad MTU (%d) > (%d) Max\n",	2305	"%s: Bad MTU (%d), valid range is: [%d..%d]\n",
2275	__func__, new_mtu, max_mtu);	2306	__func__, new_mtu, min_mtu, max_mtu);
2276	return -EINVAL;	2307	return -EINVAL;
2277	}	2308	}
2278		2309
@@ -2966,7 +2997,16 @@ static void mlx5e_destroy_netdev(struct mlx5_core_dev mdev, void vpriv) · 687 unmodified lines
2966	schedule_work(&priv->set_rx_mode_work);	2997	schedule_work(&priv->set_rx_mode_work);
2967	mlx5e_disable_async_events(priv);	2998	mlx5e_disable_async_events(priv);
2968	flush_scheduled_work();	2999	flush_scheduled_work();
2969	unregister_netdev(netdev);	3000	if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
		3001	netif_device_detach(netdev);
		3002	mutex_lock(&priv->state_lock);
		3003	if (test_bit(MLX5E_STATE_OPENED, &priv->state))
		3004	mlx5e_close_locked(netdev);
		3005	mutex_unlock(&priv->state_lock);
		3006	} else {
		3007	unregister_netdev(netdev);
		3008	}
		3009
2970	mlx5e_tc_cleanup(priv);	3010	mlx5e_tc_cleanup(priv);
2971	mlx5e_vxlan_cleanup(priv);	3011	mlx5e_vxlan_cleanup(priv);
2972	mlx5e_destroy_q_counter(priv);	3012	mlx5e_destroy_q_counter(priv);
@@ -2981,7 +3021,9 @@ static void mlx5e_destroy_netdev(struct mlx5_core_dev mdev, void vpriv) · 8 unmodified lines
2981	mlx5_core_dealloc_transport_domain(priv->mdev, priv->tdn);	3021	mlx5_core_dealloc_transport_domain(priv->mdev, priv->tdn);
2982	mlx5_core_dealloc_pd(priv->mdev, priv->pdn);	3022	mlx5_core_dealloc_pd(priv->mdev, priv->pdn);
2983	mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar);	3023	mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar);
2984	free_netdev(netdev);	3024
		3025	if (!test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state))
		3026	free_netdev(netdev);
2985	}	3027	}
2986		3028
2987	static void mlx5e_get_netdev(void vpriv)	3029	static void mlx5e_get_netdev(void vpriv)

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+18−30

 	return rule;
 }
-static struct mlx5_flow_rule *add_rule_to_auto_fg(struct mlx5_flow_table *ft,
-						  u8 match_criteria_enable,
-						  u32 *match_criteria,
-						  u32 *match_value,
-						  u8 action,
-						  u32 flow_tag,
-						  struct mlx5_flow_destination *dest)
-{
-	struct mlx5_flow_rule *rule;
-	struct mlx5_flow_group *g;
-	g = create_autogroup(ft, match_criteria_enable, match_criteria);
-	if (IS_ERR(g))
-		return (void *)g;
-	rule = add_rule_fg(g, match_value,
-			   action, flow_tag, dest);
-	if (IS_ERR(rule)) {
-		/* Remove assumes refcount > 0 and autogroup creates a group
-		 * with a refcount = 0.
-		 */
-		tree_get_node(&g->node);
-		tree_remove_node(&g->node);
-	}
-	return rule;
-}
 static struct mlx5_flow_rule *
 _mlx5_add_flow_rule(struct mlx5_flow_table *ft,
 		    u8 match_criteria_enable,
 				goto unlock;
 		}
-	rule = add_rule_to_auto_fg(ft, match_criteria_enable, match_criteria,
+	g = create_autogroup(ft, match_criteria_enable, match_criteria);
-				   match_value, action, flow_tag, dest);
+	if (IS_ERR(g)) {
+		rule = (void *)g;
+		goto unlock;
+	}
+	rule = add_rule_fg(g, match_value,
+			   action, flow_tag, dest);
+	if (IS_ERR(rule)) {
+		/* Remove assumes refcount > 0 and autogroup creates a group
+		 * with a refcount = 0.
+		 */
+		unlock_ref_node(&ft->node);
+		tree_get_node(&g->node);
+		tree_remove_node(&g->node);
+		return rule;
+	}
 unlock:
 	unlock_ref_node(&ft->node);
 	return rule;
 {
 	struct mlx5_flow_root_namespace *root_ns = dev->priv.root_ns;
 	int prio;
-	static struct fs_prio *fs_prio;
+	struct fs_prio *fs_prio;
 	struct mlx5_flow_namespace *ns;
 	if (!root_ns)

drivers/net/ethernet/mellanox/mlx5/core/main.c+21−4

 	int err;
 	mutex_lock(&dev->intf_state_mutex);
-	if (dev->interface_state == MLX5_INTERFACE_STATE_UP) {
+	if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
 		dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n",
 			 __func__);
 		goto out;
 	if (err)
 		pr_info("failed request module on %s\n", MLX5_IB_MOD);
-	dev->interface_state = MLX5_INTERFACE_STATE_UP;
+	clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
+	set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
 out:
 	mutex_unlock(&dev->intf_state_mutex);
 	}
 	mutex_lock(&dev->intf_state_mutex);
-	if (dev->interface_state == MLX5_INTERFACE_STATE_DOWN) {
+	if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) {
 		dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n",
 			 __func__);
 		goto out;
 	mlx5_cmd_cleanup(dev);
 out:
-	dev->interface_state = MLX5_INTERFACE_STATE_DOWN;
+	clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
+	set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
 	mutex_unlock(&dev->intf_state_mutex);
 	return err;
 }
 	.resume		= mlx5_pci_resume
 };
+static void shutdown(struct pci_dev *pdev)
+{
+	struct mlx5_core_dev *dev  = pci_get_drvdata(pdev);
+	struct mlx5_priv *priv = &dev->priv;
+	dev_info(&pdev->dev, "Shutdown was called\n");
+	/* Notify mlx5 clients that the kernel is being shut down */
+	set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state);
+	mlx5_unload_one(dev, priv);
+	mlx5_pci_disable_device(dev);
+}
 static const struct pci_device_id mlx5_core_pci_table[] = {
 	{ PCI_VDEVICE(MELLANOX, 0x1011) },			/* Connect-IB */
 	{ PCI_VDEVICE(MELLANOX, 0x1012), MLX5_PCI_DEV_IS_VF},	/* Connect-IB VF */
 	{ PCI_VDEVICE(MELLANOX, 0x1014), MLX5_PCI_DEV_IS_VF},	/* ConnectX-4 VF */
 	{ PCI_VDEVICE(MELLANOX, 0x1015) },			/* ConnectX-4LX */
 	{ PCI_VDEVICE(MELLANOX, 0x1016), MLX5_PCI_DEV_IS_VF},	/* ConnectX-4LX VF */
+	{ PCI_VDEVICE(MELLANOX, 0x1017) },			/* ConnectX-5 */
+	{ PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF},	/* ConnectX-5 VF */
 	{ 0, }
 };
 	.id_table       = mlx5_core_pci_table,
 	.probe          = init_one,
 	.remove         = remove_one,
+	.shutdown	= shutdown,
 	.err_handler	= &mlx5_err_handler,
 	.sriov_configure   = mlx5_core_sriov_configure,
 };

drivers/net/ethernet/mellanox/mlx5/core/port.c+5−5

drivers/net/ethernet/mellanox/mlx5/core/vport.c+40−0

@@ -196,6 +196,46 @@ int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev, · 195 unmodified lines
196	}	196	}
197	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);	197	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
198		198
		199	int mlx5_query_nic_vport_mtu(struct mlx5_core_dev mdev, u16 mtu)
		200	{
		201	int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
		202	u32 *out;
		203	int err;
		204
		205	out = mlx5_vzalloc(outlen);
		206	if (!out)
		207	return -ENOMEM;
		208
		209	err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
		210	if (!err)
		211	*mtu = MLX5_GET(query_nic_vport_context_out, out,
		212	nic_vport_context.mtu);
		213
		214	kvfree(out);
		215	return err;
		216	}
		217	EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
		218
		219	int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
		220	{
		221	int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
		222	void *in;
		223	int err;
		224
		225	in = mlx5_vzalloc(inlen);
		226	if (!in)
		227	return -ENOMEM;
		228
		229	MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
		230	MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
		231
		232	err = mlx5_modify_nic_vport_context(mdev, in, inlen);
		233
		234	kvfree(in);
		235	return err;
		236	}
		237	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
		238
199	int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,	239	int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
200	u32 vport,	240	u32 vport,
201	enum mlx5_list_type list_type,	241	enum mlx5_list_type list_type,

drivers/net/ethernet/qlogic/qlcnic/qlcnic.h+2−2

@@ -37,8 +37,8 @@ · 36 unmodified lines
37		37
38	#define _QLCNIC_LINUX_MAJOR 5	38	#define _QLCNIC_LINUX_MAJOR 5
39	#define _QLCNIC_LINUX_MINOR 3	39	#define _QLCNIC_LINUX_MINOR 3
40	#define _QLCNIC_LINUX_SUBVERSION 63	40	#define _QLCNIC_LINUX_SUBVERSION 64
41	#define QLCNIC_LINUX_VERSIONID "5.3.63"	41	#define QLCNIC_LINUX_VERSIONID "5.3.64"
42	#define QLCNIC_DRV_IDC_VER 0x01	42	#define QLCNIC_DRV_IDC_VER 0x01
43	#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) \|\	43	#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) \|\
44	(_QLCNIC_LINUX_MINOR << 8) \| (_QLCNIC_LINUX_SUBVERSION))	44	(_QLCNIC_LINUX_MINOR << 8) \| (_QLCNIC_LINUX_SUBVERSION))

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+16−34

 	u32	reg_shift;
 	struct	device *dev;
 	struct regmap *sys_mgr_base_addr;
-	struct reset_control *stmmac_rst;
 	void __iomem *splitter_base;
 	bool f2h_ptp_ref_clk;
 };
 	struct device_node *np_splitter;
 	struct resource res_splitter;
-	dwmac->stmmac_rst = devm_reset_control_get(dev,
-						  STMMAC_RESOURCE_NAME);
-	if (IS_ERR(dwmac->stmmac_rst)) {
-		dev_info(dev, "Could not get reset control!\n");
-		if (PTR_ERR(dwmac->stmmac_rst) == -EPROBE_DEFER)
-			return -EPROBE_DEFER;
-		dwmac->stmmac_rst = NULL;
-	}
 	dwmac->interface = of_get_phy_mode(np);
 	sys_mgr_base_addr = syscon_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
 	return 0;
 }
-static void socfpga_dwmac_exit(struct platform_device *pdev, void *priv)
-{
-	struct socfpga_dwmac	*dwmac = priv;
-	/* On socfpga platform exit, assert and hold reset to the
-	 * enet controller - the default state after a hard reset.
-	 */
-	if (dwmac->stmmac_rst)
-		reset_control_assert(dwmac->stmmac_rst);
-}
 static int socfpga_dwmac_init(struct platform_device *pdev, void *priv)
 {
-	struct socfpga_dwmac	*dwmac = priv;
+	struct socfpga_dwmac *dwmac = priv;
 	struct net_device *ndev = platform_get_drvdata(pdev);
 	struct stmmac_priv *stpriv = NULL;
 	int ret = 0;
-	if (ndev)
+	if (!ndev)
-		stpriv = netdev_priv(ndev);
+		return -EINVAL;
+	stpriv = netdev_priv(ndev);
+	if (!stpriv)
+		return -EINVAL;
 	/* Assert reset to the enet controller before changing the phy mode */
-	if (dwmac->stmmac_rst)
+	if (stpriv->stmmac_rst)
-		reset_control_assert(dwmac->stmmac_rst);
+		reset_control_assert(stpriv->stmmac_rst);
 	/* Setup the phy mode in the system manager registers according to
 	 * devicetree configuration
 	/* Deassert reset for the phy configuration to be sampled by
 	 * the enet controller, and operation to start in requested mode
 	 */
-	if (dwmac->stmmac_rst)
+	if (stpriv->stmmac_rst)
-		reset_control_deassert(dwmac->stmmac_rst);
+		reset_control_deassert(stpriv->stmmac_rst);
 	/* Before the enet controller is suspended, the phy is suspended.
 	 * This causes the phy clock to be gated. The enet controller is
 	 * control register 0, and can be modified by the phy driver
 	 * framework.
 	 */
-	if (stpriv && stpriv->phydev)
+	if (stpriv->phydev)
 		phy_resume(stpriv->phydev);
 	return ret;
 	plat_dat->bsp_priv = dwmac;
 	plat_dat->init = socfpga_dwmac_init;
-	plat_dat->exit = socfpga_dwmac_exit;
 	plat_dat->fix_mac_speed = socfpga_dwmac_fix_mac_speed;
-	ret = socfpga_dwmac_init(pdev, plat_dat->bsp_priv);
+	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-	if (ret)
+	if (!ret)
-		return ret;
+		ret = socfpga_dwmac_init(pdev, dwmac);
-	return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+	return ret;
 }
 static const struct of_device_id socfpga_dwmac_match[] = {

drivers/net/macsec.c+40−23

 	macsec_skb_cb(skb)->valid = false;
 	skb = skb_share_check(skb, GFP_ATOMIC);
 	if (!skb)
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 	req = aead_request_alloc(rx_sa->key.tfm, GFP_ATOMIC);
 	if (!req) {
 		kfree_skb(skb);
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 	}
 	hdr = (struct macsec_eth_header *)skb->data;
 		skb = skb_unshare(skb, GFP_ATOMIC);
 		if (!skb) {
 			aead_request_free(req);
-			return NULL;
+			return ERR_PTR(-ENOMEM);
 		}
 	} else {
 		/* integrity only: all headers + data authenticated */
 	dev_hold(dev);
 	ret = crypto_aead_decrypt(req);
 	if (ret == -EINPROGRESS) {
-		return NULL;
+		return ERR_PTR(ret);
 	} else if (ret != 0) {
 		/* decryption/authentication failed
 		 * 10.6 if validateFrames is disabled, deliver anyway
 		 */
 		if (ret != -EBADMSG) {
 			kfree_skb(skb);
-			skb = NULL;
+			skb = ERR_PTR(ret);
 		}
 	} else {
 		macsec_skb_cb(skb)->valid = true;
 	    secy->validate_frames != MACSEC_VALIDATE_DISABLED)
 		skb = macsec_decrypt(skb, dev, rx_sa, sci, secy);
-	if (!skb) {
+	if (IS_ERR(skb)) {
-		macsec_rxsa_put(rx_sa);
+		/* the decrypt callback needs the reference */
+		if (PTR_ERR(skb) != -EINPROGRESS)
+			macsec_rxsa_put(rx_sa);
 		rcu_read_unlock();
 		*pskb = NULL;
 		return RX_HANDLER_CONSUMED;
 			    macsec_extra_len(macsec_skb_cb(skb)->has_sci));
 	macsec_reset_skb(skb, secy->netdev);
-	macsec_rxsa_put(rx_sa);
+	if (rx_sa)
+		macsec_rxsa_put(rx_sa);
 	count_rx(dev, skb->len);
 	rcu_read_unlock();
 	}
 	rx_sa = kmalloc(sizeof(*rx_sa), GFP_KERNEL);
-	if (init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]), secy->key_len,
+	if (!rx_sa || init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
-		       secy->icv_len)) {
+				 secy->key_len, secy->icv_len)) {
+		kfree(rx_sa);
 		rtnl_unlock();
 		return -ENOMEM;
 	}
 	tx_sa = kmalloc(sizeof(*tx_sa), GFP_KERNEL);
 	if (!tx_sa || init_tx_sa(tx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
 				 secy->key_len, secy->icv_len)) {
+		kfree(tx_sa);
 		rtnl_unlock();
 		return -ENOMEM;
 	}
 	if (nla_put_sci(skb, MACSEC_SECY_ATTR_SCI, secy->sci,
 			MACSEC_SECY_ATTR_PAD) ||
 	    nla_put_u64_64bit(skb, MACSEC_SECY_ATTR_CIPHER_SUITE,
-			      DEFAULT_CIPHER_ID,
+			      MACSEC_DEFAULT_CIPHER_ID,
 			      MACSEC_SECY_ATTR_PAD) ||
 	    nla_put_u8(skb, MACSEC_SECY_ATTR_ICV_LEN, secy->icv_len) ||
 	    nla_put_u8(skb, MACSEC_SECY_ATTR_OPER, secy->operational) ||
 	if (!hdr)
 		return -EMSGSIZE;
-	rtnl_lock();
+	genl_dump_check_consistent(cb, hdr, &macsec_fam);
 	if (nla_put_u32(skb, MACSEC_ATTR_IFINDEX, dev->ifindex))
 		goto nla_put_failure;
 	nla_nest_end(skb, rxsc_list);
-	rtnl_unlock();
 	genlmsg_end(skb, hdr);
 	return 0;
 nla_put_failure:
-	rtnl_unlock();
 	genlmsg_cancel(skb, hdr);
 	return -EMSGSIZE;
 }
+static int macsec_generation = 1; /* protected by RTNL */
 static int macsec_dump_txsc(struct sk_buff *skb, struct netlink_callback *cb)
 {
 	struct net *net = sock_net(skb->sk);
 	dev_idx = cb->args[0];
 	d = 0;
+	rtnl_lock();
+	cb->seq = macsec_generation;
 	for_each_netdev(net, dev) {
 		struct macsec_secy *secy;
 	}
 done:
+	rtnl_unlock();
 	cb->args[0] = d;
 	return skb->len;
 }
 	struct net_device *real_dev = macsec->real_dev;
 	struct macsec_rxh_data *rxd = macsec_data_rtnl(real_dev);
+	macsec_generation++;
 	unregister_netdevice_queue(dev, head);
 	list_del_rcu(&macsec->secys);
-	if (list_empty(&rxd->secys))
+	if (list_empty(&rxd->secys)) {
 		netdev_rx_handler_unregister(real_dev);
+		kfree(rxd);
+	}
 	macsec_del_dev(macsec);
 }
 		err = netdev_rx_handler_register(real_dev, macsec_handle_frame,
 						 rxd);
-		if (err < 0)
+		if (err < 0) {
+			kfree(rxd);
 			return err;
+		}
 	}
 	list_add_tail_rcu(&macsec->secys, &rxd->secys);
 	if (err < 0)
 		goto del_dev;
+	macsec_generation++;
 	dev_hold(real_dev);
 	return 0;
 static int macsec_validate_attr(struct nlattr *tb[], struct nlattr *data[])
 {
-	u64 csid = DEFAULT_CIPHER_ID;
+	u64 csid = MACSEC_DEFAULT_CIPHER_ID;
 	u8 icv_len = DEFAULT_ICV_LEN;
 	int flag;
 	bool es, scb, sci;
 		icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
 	switch (csid) {
-	case DEFAULT_CIPHER_ID:
+	case MACSEC_DEFAULT_CIPHER_ID:
-	case DEFAULT_CIPHER_ALT:
+	case MACSEC_DEFAULT_CIPHER_ALT:
 		if (icv_len < MACSEC_MIN_ICV_LEN ||
 		    icv_len > MACSEC_MAX_ICV_LEN)
 			return -EINVAL;
 	    nla_get_u8(data[IFLA_MACSEC_VALIDATION]) > MACSEC_VALIDATE_MAX)
 		return -EINVAL;
-	if ((data[IFLA_MACSEC_PROTECT] &&
+	if ((data[IFLA_MACSEC_REPLAY_PROTECT] &&
-	     nla_get_u8(data[IFLA_MACSEC_PROTECT])) &&
+	     nla_get_u8(data[IFLA_MACSEC_REPLAY_PROTECT])) &&
 	    !data[IFLA_MACSEC_WINDOW])
 		return -EINVAL;
 			IFLA_MACSEC_PAD) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ICV_LEN, secy->icv_len) ||
 	    nla_put_u64_64bit(skb, IFLA_MACSEC_CIPHER_SUITE,
-			      DEFAULT_CIPHER_ID, IFLA_MACSEC_PAD) ||
+			      MACSEC_DEFAULT_CIPHER_ID, IFLA_MACSEC_PAD) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ENCODING_SA, tx_sc->encoding_sa) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ENCRYPT, tx_sc->encrypt) ||
 	    nla_put_u8(skb, IFLA_MACSEC_PROTECT, secy->protect_frames) ||

drivers/perf/arm_pmu.c+13−2

@@ -737,8 +737,19 @@ static void cpu_pm_pmu_setup(struct arm_pmu *armpmu, unsigned long cmd) · 736 unmodified lines
737	break;	737	break;
738	case CPU_PM_EXIT:	738	case CPU_PM_EXIT:
739	case CPU_PM_ENTER_FAILED:	739	case CPU_PM_ENTER_FAILED:
740	/* Restore and enable the counter */	740	/*
741	armpmu_start(event, PERF_EF_RELOAD);	741	* Restore and enable the counter.
		742	* armpmu_start() indirectly calls
		743	*
		744	* perf_event_update_userpage()
		745	*
		746	* that requires RCU read locking to be functional,
		747	* wrap the call within RCU_NONIDLE to make the
		748	* RCU subsystem aware this cpu is not idle from
		749	* an RCU perspective for the armpmu_start() call
		750	* duration.
		751	*/
		752	RCU_NONIDLE(armpmu_start(event, PERF_EF_RELOAD));
742	break;	753	break;
743	default:	754	default:
744	break;	755	break;

drivers/phy/phy-rockchip-dp.c+5−2

 	if (!np)
 		return -ENODEV;
+	if (!dev->parent || !dev->parent->of_node)
+		return -ENODEV;
 	dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL);
 	if (IS_ERR(dp))
 		return -ENOMEM;
 		return ret;
 	}
-	dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
+	dp->grf = syscon_node_to_regmap(dev->parent->of_node);
 	if (IS_ERR(dp->grf)) {
-		dev_err(dev, "rk3288-dp needs rockchip,grf property\n");
+		dev_err(dev, "rk3288-dp needs the General Register Files syscon\n");
 		return PTR_ERR(dp->grf);
 	}

drivers/phy/phy-rockchip-emmc.c+4−1

 	struct regmap *grf;
 	unsigned int reg_offset;
-	grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
+	if (!dev->parent || !dev->parent->of_node)
+		return -ENODEV;
+	grf = syscon_node_to_regmap(dev->parent->of_node);
 	if (IS_ERR(grf)) {
 		dev_err(dev, "Missing rockchip,grf property\n");
 		return PTR_ERR(grf);

drivers/pinctrl/freescale/Kconfig+1−0

@@ -2,6 +2,7 @@ config PINCTRL_IMX · 1 unmodified line
2	bool	2	bool
3	select PINMUX	3	select PINMUX
4	select PINCONF	4	select PINCONF
		5	select REGMAP
5		6
6	config PINCTRL_IMX1_CORE	7	config PINCTRL_IMX1_CORE
7	bool	8	bool

drivers/pinctrl/mediatek/pinctrl-mtk-common.c+5−4

 	struct mtk_pinctrl *pctl = dev_get_drvdata(chip->parent);
 	int eint_num, virq, eint_offset;
 	unsigned int set_offset, bit, clr_bit, clr_offset, rst, i, unmask, dbnc;
-	static const unsigned int dbnc_arr[] = {0 , 1, 16, 32, 64, 128, 256};
+	static const unsigned int debounce_time[] = {500, 1000, 16000, 32000, 64000,
+						128000, 256000};
 	const struct mtk_desc_pin *pin;
 	struct irq_data *d;
 	if (!mtk_eint_can_en_debounce(pctl, eint_num))
 		return -ENOSYS;
-	dbnc = ARRAY_SIZE(dbnc_arr);
+	dbnc = ARRAY_SIZE(debounce_time);
-	for (i = 0; i < ARRAY_SIZE(dbnc_arr); i++) {
+	for (i = 0; i < ARRAY_SIZE(debounce_time); i++) {
-		if (debounce <= dbnc_arr[i]) {
+		if (debounce <= debounce_time[i]) {
 			dbnc = i;
 			break;
 		}

drivers/pinctrl/pinctrl-single.c+3−3

@@ -1280,9 +1280,9 @@ static int pcs_parse_bits_in_pinctrl_entry(struct pcs_device *pcs, · 1279 unmodified lines
1280		1280
1281	/* Parse pins in each row from LSB */	1281	/* Parse pins in each row from LSB */
1282	while (mask) {	1282	while (mask) {
1283	bit_pos = ffs(mask);	1283	bit_pos = __ffs(mask);
1284	pin_num_from_lsb = bit_pos / pcs->bits_per_pin;	1284	pin_num_from_lsb = bit_pos / pcs->bits_per_pin;
1285	mask_pos = ((pcs->fmask) << (bit_pos - 1));	1285	mask_pos = ((pcs->fmask) << bit_pos);
1286	val_pos = val & mask_pos;	1286	val_pos = val & mask_pos;
1287	submask = mask & mask_pos;	1287	submask = mask & mask_pos;
1288		1288
@@ -1852,7 +1852,7 @@ static int pcs_probe(struct platform_device *pdev) · 563 unmodified lines
1852	ret = of_property_read_u32(np, "pinctrl-single,function-mask",	1852	ret = of_property_read_u32(np, "pinctrl-single,function-mask",
1853	&pcs->fmask);	1853	&pcs->fmask);
1854	if (!ret) {	1854	if (!ret) {
1855	pcs->fshift = ffs(pcs->fmask) - 1;	1855	pcs->fshift = __ffs(pcs->fmask);
1856	pcs->fmax = pcs->fmask >> pcs->fshift;	1856	pcs->fmax = pcs->fmask >> pcs->fshift;
1857	} else {	1857	} else {
1858	/* If mask property doesn't exist, function mux is invalid. */	1858	/* If mask property doesn't exist, function mux is invalid. */

drivers/scsi/cxgbi/libcxgbi.c+1−0

@@ -688,6 +688,7 @@ static struct rt6_info find_route_ipv6(const struct in6_addr saddr, · 687 unmodified lines
688	{	688	{
689	struct flowi6 fl;	689	struct flowi6 fl;
690		690
		691	memset(&fl, 0, sizeof(fl));
691	if (saddr)	692	if (saddr)
692	memcpy(&fl.saddr, saddr, sizeof(struct in6_addr));	693	memcpy(&fl.saddr, saddr, sizeof(struct in6_addr));
693	if (daddr)	694	if (daddr)

drivers/soc/mediatek/mtk-scpsys.c+6−5

 		genpd->dev_ops.active_wakeup = scpsys_active_wakeup;
 		/*
-		 * With CONFIG_PM disabled turn on all domains to make the
+		 * Initially turn on all domains to make the domains usable
-		 * hardware usable.
+		 * with !CONFIG_PM and to get the hardware in sync with the
+		 * software.  The unused domains will be switched off during
+		 * late_init time.
 		 */
-		if (!IS_ENABLED(CONFIG_PM))
+		genpd->power_on(genpd);
-			genpd->power_on(genpd);
-		pm_genpd_init(genpd, NULL, true);
+		pm_genpd_init(genpd, NULL, false);
 	}
 	/*

drivers/thermal/Kconfig+2−0

 	tristate "Temperature sensor driver for mediatek SoCs"
 	depends on ARCH_MEDIATEK || COMPILE_TEST
 	depends on HAS_IOMEM
+	depends on NVMEM || NVMEM=n
+	depends on RESET_CONTROLLER
 	default y
 	help
 	  Enable this option if you want to have support for thermal management

drivers/thermal/mtk_thermal.c+1−2

 #include <linux/thermal.h>
 #include <linux/reset.h>
 #include <linux/types.h>
-#include <linux/nvmem-consumer.h>
 /* AUXADC Registers */
 #define AUXADC_CON0_V		0x000
 module_platform_driver(mtk_thermal_driver);
-MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
 MODULE_AUTHOR("Hanyi Wu <hanyi.wu@mediatek.com>");
 MODULE_DESCRIPTION("Mediatek thermal driver");
 MODULE_LICENSE("GPL v2");

drivers/thermal/of-thermal.c+2−2

@@ -803,8 +803,8 @@ static int thermal_of_populate_trip(struct device_node *np, · 802 unmodified lines
803	* otherwise, it returns a corresponding ERR_PTR(). Caller must	803	* otherwise, it returns a corresponding ERR_PTR(). Caller must
804	* check the return value with help of IS_ERR() helper.	804	* check the return value with help of IS_ERR() helper.
805	*/	805	*/
806	static struct __thermal_zone *	806	static struct __thermal_zone
807	thermal_of_build_thermal_zone(struct device_node *np)	807	__init thermal_of_build_thermal_zone(struct device_node np)
808	{	808	{
809	struct device_node child = NULL, gchild;	809	struct device_node child = NULL, gchild;
810	struct __thermal_zone *tz;	810	struct __thermal_zone *tz;

drivers/thermal/power_allocator.c+1−1

@@ -301,7 +301,7 @@ static void divvy_up_power(u32 req_power, u32 max_power, int num_actors, · 300 unmodified lines
301	capped_extra_power = 0;	301	capped_extra_power = 0;
302	extra_power = 0;	302	extra_power = 0;
303	for (i = 0; i < num_actors; i++) {	303	for (i = 0; i < num_actors; i++) {
304	u64 req_range = req_power[i] * power_range;	304	u64 req_range = (u64)req_power[i] * power_range;
305		305
306	granted_power[i] = DIV_ROUND_CLOSEST_ULL(req_range,	306	granted_power[i] = DIV_ROUND_CLOSEST_ULL(req_range,
307	total_req_power);	307	total_req_power);

drivers/thermal/thermal_core.c+4−4

@@ -688,7 +688,7 @@ trip_point_temp_store(struct device dev, struct device_attribute attr, · 687 unmodified lines
688	{	688	{
689	struct thermal_zone_device *tz = to_thermal_zone(dev);	689	struct thermal_zone_device *tz = to_thermal_zone(dev);
690	int trip, ret;	690	int trip, ret;
691	unsigned long temperature;	691	int temperature;
692		692
693	if (!tz->ops->set_trip_temp)	693	if (!tz->ops->set_trip_temp)
694	return -EPERM;	694	return -EPERM;
@@ -696,7 +696,7 @@ trip_point_temp_store(struct device dev, struct device_attribute attr, · 1 unmodified line
696	if (!sscanf(attr->attr.name, "trip_point_%d_temp", &trip))	696	if (!sscanf(attr->attr.name, "trip_point_%d_temp", &trip))
697	return -EINVAL;	697	return -EINVAL;
698		698
699	if (kstrtoul(buf, 10, &temperature))	699	if (kstrtoint(buf, 10, &temperature))
700	return -EINVAL;	700	return -EINVAL;
701		701
702	ret = tz->ops->set_trip_temp(tz, trip, temperature);	702	ret = tz->ops->set_trip_temp(tz, trip, temperature);
@@ -899,9 +899,9 @@ emul_temp_store(struct device dev, struct device_attribute attr, · 196 unmodified lines
899	{	899	{
900	struct thermal_zone_device *tz = to_thermal_zone(dev);	900	struct thermal_zone_device *tz = to_thermal_zone(dev);
901	int ret = 0;	901	int ret = 0;
902	unsigned long temperature;	902	int temperature;
903		903
904	if (kstrtoul(buf, 10, &temperature))	904	if (kstrtoint(buf, 10, &temperature))
905	return -EINVAL;	905	return -EINVAL;
906		906
907	if (!tz->ops->set_emul_temp) {	907	if (!tz->ops->set_emul_temp) {

drivers/tty/pty.c+8−10

  */
 static struct tty_struct *ptm_unix98_lookup(struct tty_driver *driver,
-		struct inode *ptm_inode, int idx)
+		struct file *file, int idx)
 {
 	/* Master must be open via /dev/ptmx */
 	return ERR_PTR(-EIO);
  */
 static struct tty_struct *pts_unix98_lookup(struct tty_driver *driver,
-		struct inode *pts_inode, int idx)
+		struct file *file, int idx)
 {
 	struct tty_struct *tty;
 	mutex_lock(&devpts_mutex);
-	tty = devpts_get_priv(pts_inode);
+	tty = devpts_get_priv(file->f_path.dentry);
 	mutex_unlock(&devpts_mutex);
 	/* Master must be open before slave */
 	if (!tty)
 {
 	struct pts_fs_info *fsi;
 	struct tty_struct *tty;
-	struct inode *slave_inode;
+	struct dentry *dentry;
 	int retval;
 	int index;
 	tty_add_file(tty, filp);
-	slave_inode = devpts_pty_new(fsi,
+	dentry = devpts_pty_new(fsi, index, tty->link);
-			MKDEV(UNIX98_PTY_SLAVE_MAJOR, index), index,
+	if (IS_ERR(dentry)) {
-			tty->link);
+		retval = PTR_ERR(dentry);
-	if (IS_ERR(slave_inode)) {
-		retval = PTR_ERR(slave_inode);
 		goto err_release;
 	}
-	tty->link->driver_data = slave_inode;
+	tty->link->driver_data = dentry;
 	retval = ptm_driver->ops->open(tty, filp);
 	if (retval)

drivers/tty/serial/8250/8250_port.c+10−1

 	/*
 	 * Empty the RX FIFO, we are not interested in anything
 	 * received during the half-duplex transmission.
+	 * Enable previously disabled RX interrupts.
 	 */
-	if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX))
+	if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) {
 		serial8250_clear_fifos(p);
+		serial8250_rpm_get(p);
+		p->ier |= UART_IER_RLSI | UART_IER_RDI;
+		serial_port_out(&p->port, UART_IER, p->ier);
+		serial8250_rpm_put(p);
+	}
 }
 static void serial8250_em485_handle_stop_tx(unsigned long arg)

drivers/tty/serial/8250/Kconfig+0−1

@@ -324,7 +324,6 @@ config SERIAL_8250_EM · 323 unmodified lines
324	config SERIAL_8250_RT288X	324	config SERIAL_8250_RT288X
325	bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support"	325	bool "Ralink RT288x/RT305x/RT3662/RT3883 serial port support"
326	depends on SERIAL_8250	326	depends on SERIAL_8250
327	depends on MIPS \|\| COMPILE_TEST
328	default y if MIPS_ALCHEMY \|\| SOC_RT288X \|\| SOC_RT305X \|\| SOC_RT3883 \|\| SOC_MT7620	327	default y if MIPS_ALCHEMY \|\| SOC_RT288X \|\| SOC_RT305X \|\| SOC_RT3883 \|\| SOC_MT7620
329	help	328	help
330	Selecting this option will add support for the alternate register	329	Selecting this option will add support for the alternate register

drivers/tty/serial/uartlite.c+4−4

@@ -72,7 +72,7 @@ static void uartlite_outbe32(u32 val, void __iomem *addr) · 71 unmodified lines
72	iowrite32be(val, addr);	72	iowrite32be(val, addr);
73	}	73	}
74		74
75	static const struct uartlite_reg_ops uartlite_be = {	75	static struct uartlite_reg_ops uartlite_be = {
76	.in = uartlite_inbe32,	76	.in = uartlite_inbe32,
77	.out = uartlite_outbe32,	77	.out = uartlite_outbe32,
78	};	78	};
@@ -87,21 +87,21 @@ static void uartlite_outle32(u32 val, void __iomem *addr) · 8 unmodified lines
87	iowrite32(val, addr);	87	iowrite32(val, addr);
88	}	88	}
89		89
90	static const struct uartlite_reg_ops uartlite_le = {	90	static struct uartlite_reg_ops uartlite_le = {
91	.in = uartlite_inle32,	91	.in = uartlite_inle32,
92	.out = uartlite_outle32,	92	.out = uartlite_outle32,
93	};	93	};
94		94
95	static inline u32 uart_in32(u32 offset, struct uart_port *port)	95	static inline u32 uart_in32(u32 offset, struct uart_port *port)
96	{	96	{
97	const struct uartlite_reg_ops *reg_ops = port->private_data;	97	struct uartlite_reg_ops *reg_ops = port->private_data;
98		98
99	return reg_ops->in(port->membase + offset);	99	return reg_ops->in(port->membase + offset);
100	}	100	}
101		101
102	static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)	102	static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
103	{	103	{
104	const struct uartlite_reg_ops *reg_ops = port->private_data;	104	struct uartlite_reg_ops *reg_ops = port->private_data;
105		105
106	reg_ops->out(val, port->membase + offset);	106	reg_ops->out(val, port->membase + offset);
107	}	107	}

drivers/tty/tty_io.c+3−3

@@ -1367,12 +1367,12 @@ static ssize_t tty_line_name(struct tty_driver driver, int index, char p) · 1366 unmodified lines
1367	* Locking: tty_mutex must be held. If the tty is found, bump the tty kref.	1367	* Locking: tty_mutex must be held. If the tty is found, bump the tty kref.
1368	*/	1368	*/
1369	static struct tty_struct tty_driver_lookup_tty(struct tty_driver driver,	1369	static struct tty_struct tty_driver_lookup_tty(struct tty_driver driver,
1370	struct inode *inode, int idx)	1370	struct file *file, int idx)
1371	{	1371	{
1372	struct tty_struct *tty;	1372	struct tty_struct *tty;
1373		1373
1374	if (driver->ops->lookup)	1374	if (driver->ops->lookup)
1375	tty = driver->ops->lookup(driver, inode, idx);	1375	tty = driver->ops->lookup(driver, file, idx);
1376	else	1376	else
1377	tty = driver->ttys[idx];	1377	tty = driver->ttys[idx];
1378		1378
@@ -2040,7 +2040,7 @@ static struct tty_struct tty_open_by_driver(dev_t device, struct inode inode, · 661 unmodified lines
2040	}	2040	}
2041		2041
2042	/* check whether we're reopening an existing tty */	2042	/* check whether we're reopening an existing tty */
2043	tty = tty_driver_lookup_tty(driver, inode, index);	2043	tty = tty_driver_lookup_tty(driver, filp, index);
2044	if (IS_ERR(tty)) {	2044	if (IS_ERR(tty)) {
2045	mutex_unlock(&tty_mutex);	2045	mutex_unlock(&tty_mutex);
2046	goto out;	2046	goto out;

drivers/usb/dwc3/core.c+22−1

 	phy_exit(dwc->usb2_generic_phy);
 	phy_exit(dwc->usb3_generic_phy);
+	usb_phy_set_suspend(dwc->usb2_phy, 1);
+	usb_phy_set_suspend(dwc->usb3_phy, 1);
+	WARN_ON(phy_power_off(dwc->usb2_generic_phy) < 0);
+	WARN_ON(phy_power_off(dwc->usb3_generic_phy) < 0);
 	pinctrl_pm_select_sleep_state(dev);
 	return 0;
 	pinctrl_pm_select_default_state(dev);
+	usb_phy_set_suspend(dwc->usb2_phy, 0);
+	usb_phy_set_suspend(dwc->usb3_phy, 0);
+	ret = phy_power_on(dwc->usb2_generic_phy);
+	if (ret < 0)
+		return ret;
+	ret = phy_power_on(dwc->usb3_generic_phy);
+	if (ret < 0)
+		goto err_usb2phy_power;
 	usb_phy_init(dwc->usb3_phy);
 	usb_phy_init(dwc->usb2_phy);
 	ret = phy_init(dwc->usb2_generic_phy);
 	if (ret < 0)
-		return ret;
+		goto err_usb3phy_power;
 	ret = phy_init(dwc->usb3_generic_phy);
 	if (ret < 0)
 err_usb2phy_init:
 	phy_exit(dwc->usb2_generic_phy);
+err_usb3phy_power:
+	phy_power_off(dwc->usb3_generic_phy);
+err_usb2phy_power:
+	phy_power_off(dwc->usb2_generic_phy);
 	return ret;
 }

drivers/usb/dwc3/debugfs.c+8−5

 	file = debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset);
 	if (!file) {
 		ret = -ENOMEM;
-		goto err1;
+		goto err2;
 	}
 	if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) {
 				dwc, &dwc3_mode_fops);
 		if (!file) {
 			ret = -ENOMEM;
-			goto err1;
+			goto err2;
 		}
 	}
 				dwc, &dwc3_testmode_fops);
 		if (!file) {
 			ret = -ENOMEM;
-			goto err1;
+			goto err2;
 		}
 		file = debugfs_create_file("link_state", S_IRUGO | S_IWUSR, root,
 				dwc, &dwc3_link_state_fops);
 		if (!file) {
 			ret = -ENOMEM;
-			goto err1;
+			goto err2;
 		}
 	}
 	return 0;
+err2:
+	kfree(dwc->regset);
 err1:
 	debugfs_remove_recursive(root);
 void dwc3_debugfs_exit(struct dwc3 *dwc)
 {
 	debugfs_remove_recursive(dwc->root);
-	dwc->root = NULL;
+	kfree(dwc->regset);
 }

drivers/usb/dwc3/dwc3-omap.c+4−8

 	ret = pm_runtime_get_sync(dev);
 	if (ret < 0) {
 		dev_err(dev, "get_sync failed with err %d\n", ret);
-		goto err0;
+		goto err1;
 	}
 	dwc3_omap_map_offset(omap);
 	ret = dwc3_omap_extcon_register(omap);
 	if (ret < 0)
-		goto err2;
+		goto err1;
 	ret = of_platform_populate(node, NULL, NULL, dev);
 	if (ret) {
 		dev_err(&pdev->dev, "failed to create dwc3 core\n");
-		goto err3;
+		goto err2;
 	}
 	dwc3_omap_enable_irqs(omap);
 	return 0;
-err3:
+err2:
 	extcon_unregister_notifier(omap->edev, EXTCON_USB, &omap->vbus_nb);
 	extcon_unregister_notifier(omap->edev, EXTCON_USB_HOST, &omap->id_nb);
-err2:
-	dwc3_omap_disable_irqs(omap);
 err1:
 	pm_runtime_put_sync(dev);
-err0:
 	pm_runtime_disable(dev);
 	return ret;

drivers/usb/dwc3/gadget.c+6−0

 int dwc3_gadget_suspend(struct dwc3 *dwc)
 {
+	if (!dwc->gadget_driver)
+		return 0;
 	if (dwc->pullups_connected) {
 		dwc3_gadget_disable_irq(dwc);
 		dwc3_gadget_run_stop(dwc, true, true);
 	struct dwc3_ep		*dep;
 	int			ret;
+	if (!dwc->gadget_driver)
+		return 0;
 	/* Start with SuperSpeed Default */
 	dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);

drivers/usb/gadget/composite.c+2−0

@@ -651,6 +651,8 @@ static int bos_desc(struct usb_composite_dev *cdev) · 650 unmodified lines
651	ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(1);	651	ssp_cap->bLength = USB_DT_USB_SSP_CAP_SIZE(1);
652	ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;	652	ssp_cap->bDescriptorType = USB_DT_DEVICE_CAPABILITY;
653	ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE;	653	ssp_cap->bDevCapabilityType = USB_SSP_CAP_TYPE;
		654	ssp_cap->bReserved = 0;
		655	ssp_cap->wReserved = 0;
654		656
655	/* SSAC = 1 (2 attributes) */	657	/* SSAC = 1 (2 attributes) */
656	ssp_cap->bmAttributes = cpu_to_le32(1);	658	ssp_cap->bmAttributes = cpu_to_le32(1);

drivers/usb/gadget/function/f_fs.c+2−3

 						   work);
 	int ret = io_data->req->status ? io_data->req->status :
 					 io_data->req->actual;
+	bool kiocb_has_eventfd = io_data->kiocb->ki_flags & IOCB_EVENTFD;
 	if (io_data->read && ret > 0) {
 		use_mm(io_data->mm);
 	io_data->kiocb->ki_complete(io_data->kiocb, ret, ret);
-	if (io_data->ffs->ffs_eventfd &&
+	if (io_data->ffs->ffs_eventfd && !kiocb_has_eventfd)
-	    !(io_data->kiocb->ki_flags & IOCB_EVENTFD))
 		eventfd_signal(io_data->ffs->ffs_eventfd, 1);
 	usb_ep_free_request(io_data->ep, io_data->req);
-	io_data->kiocb->private = NULL;
 	if (io_data->read)
 		kfree(io_data->to_free);
 	kfree(io_data->buf);

fs/devpts/inode.c+12−41

@@ -604,8 +604,7 @@ void devpts_put_ref(struct pts_fs_info *fsi) · 603 unmodified lines
604	*	604	*
605	* The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.	605	* The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.
606	*/	606	*/
607	struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index,	607	struct dentry devpts_pty_new(struct pts_fs_info fsi, int index, void *priv)
608	void *priv)
609	{	608	{
610	struct dentry *dentry;	609	struct dentry *dentry;
611	struct super_block *sb;	610	struct super_block *sb;
@@ -629,25 +628,21 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 17 unmodified lines
629	inode->i_uid = opts->setuid ? opts->uid : current_fsuid();	628	inode->i_uid = opts->setuid ? opts->uid : current_fsuid();
630	inode->i_gid = opts->setgid ? opts->gid : current_fsgid();	629	inode->i_gid = opts->setgid ? opts->gid : current_fsgid();
631	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;	630	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
632	init_special_inode(inode, S_IFCHR\|opts->mode, device);	631	init_special_inode(inode, S_IFCHR\|opts->mode, MKDEV(UNIX98_PTY_SLAVE_MAJOR, index));
633	inode->i_private = priv;
634		632
635	sprintf(s, "%d", index);	633	sprintf(s, "%d", index);
636		634
637	inode_lock(d_inode(root));
638
639	dentry = d_alloc_name(root, s);	635	dentry = d_alloc_name(root, s);
640	if (dentry) {	636	if (dentry) {
		637	dentry->d_fsdata = priv;
641	d_add(dentry, inode);	638	d_add(dentry, inode);
642	fsnotify_create(d_inode(root), dentry);	639	fsnotify_create(d_inode(root), dentry);
643	} else {	640	} else {
644	iput(inode);	641	iput(inode);
645	inode = ERR_PTR(-ENOMEM);	642	dentry = ERR_PTR(-ENOMEM);
646	}	643	}
647		644
648	inode_unlock(d_inode(root));	645	return dentry;
649
650	return inode;
651	}	646	}
652		647
653	/**	648	/**
@@ -656,24 +651,10 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 2 unmodified lines
656	*	651	*
657	* Returns whatever was passed as priv in devpts_pty_new for a given inode.	652	* Returns whatever was passed as priv in devpts_pty_new for a given inode.
658	*/	653	*/
659	void devpts_get_priv(struct inode pts_inode)	654	void devpts_get_priv(struct dentry dentry)
660	{	655	{
661	struct dentry *dentry;	656	WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
662	void *priv = NULL;	657	return dentry->d_fsdata;
663
664	BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
665
666	/* Ensure dentry has not been deleted by devpts_pty_kill() */
667	dentry = d_find_alias(pts_inode);
668	if (!dentry)
669	return NULL;
670
671	if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
672	priv = pts_inode->i_private;
673
674	dput(dentry);
675
676	return priv;
677	}	658	}
678		659
679	/**	660	/**
@@ -682,24 +663,14 @@ void devpts_get_priv(struct inode pts_inode) · 2 unmodified lines
682	*	663	*
683	* This is an inverse operation of devpts_pty_new.	664	* This is an inverse operation of devpts_pty_new.
684	*/	665	*/
685	void devpts_pty_kill(struct inode *inode)	666	void devpts_pty_kill(struct dentry *dentry)
686	{	667	{
687	struct super_block *sb = pts_sb_from_inode(inode);	668	WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
688	struct dentry *root = sb->s_root;
689	struct dentry *dentry;
690		669
691	BUG_ON(inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));	670	dentry->d_fsdata = NULL;
692		671	drop_nlink(dentry->d_inode);
693	inode_lock(d_inode(root));
694
695	dentry = d_find_alias(inode);
696
697	drop_nlink(inode);
698	d_delete(dentry);	672	d_delete(dentry);
699	dput(dentry); /* d_alloc_name() in devpts_pty_new() */	673	dput(dentry); /* d_alloc_name() in devpts_pty_new() */
700	dput(dentry); /* d_find_alias above */
701
702	inode_unlock(d_inode(root));
703	}	674	}
704		675
705	static int __init init_devpts_fs(void)	676	static int __init init_devpts_fs(void)

include/asm-generic/futex.h+6−2

 	u32 val;
 	preempt_disable();
-	if (unlikely(get_user(val, uaddr) != 0))
+	if (unlikely(get_user(val, uaddr) != 0)) {
+		preempt_enable();
 		return -EFAULT;
+	}
-	if (val == oldval && unlikely(put_user(newval, uaddr) != 0))
+	if (val == oldval && unlikely(put_user(newval, uaddr) != 0)) {
+		preempt_enable();
 		return -EFAULT;
+	}
 	*uval = val;
 	preempt_enable();

include/drm/drm_cache.h+2−0

 {
 #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
 	return false;
+#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
+	return false;
 #else
 	return true;
 #endif

include/linux/devpts_fs.h+3−3

@@ -27,11 +27,11 @@ int devpts_new_index(struct pts_fs_info *); · 26 unmodified lines
27	void devpts_kill_index(struct pts_fs_info *, int);	27	void devpts_kill_index(struct pts_fs_info *, int);
28		28
29	/* mknod in devpts */	29	/* mknod in devpts */
30	struct inode devpts_pty_new(struct pts_fs_info , dev_t, int, void *);	30	struct dentry devpts_pty_new(struct pts_fs_info , int, void *);
31	/* get private structure */	31	/* get private structure */
32	void devpts_get_priv(struct inode pts_inode);	32	void devpts_get_priv(struct dentry );
33	/* unlink */	33	/* unlink */
34	void devpts_pty_kill(struct inode *inode);	34	void devpts_pty_kill(struct dentry *);
35		35
36	#endif	36	#endif
37		37

include/linux/mlx5/driver.h+4−3

 };
 enum mlx5_interface_state {
-	MLX5_INTERFACE_STATE_DOWN,
+	MLX5_INTERFACE_STATE_DOWN = BIT(0),
-	MLX5_INTERFACE_STATE_UP,
+	MLX5_INTERFACE_STATE_UP = BIT(1),
+	MLX5_INTERFACE_STATE_SHUTDOWN = BIT(2),
 };
 enum mlx5_pci_status {
 	enum mlx5_device_state	state;
 	/* sync interface state */
 	struct mutex		intf_state_mutex;
-	enum mlx5_interface_state interface_state;
+	unsigned long		intf_state;
 	void			(*event) (struct mlx5_core_dev *dev,
 					  enum mlx5_dev_event event,
 					  unsigned long param);

include/linux/mlx5/port.h+3−3

@@ -73,9 +73,9 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, · 72 unmodified lines
73	enum mlx5_port_status *status);	73	enum mlx5_port_status *status);
74	int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);	74	int mlx5_set_port_beacon(struct mlx5_core_dev *dev, u16 beacon_duration);
75		75
76	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port);	76	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
77	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu, u8 port);	77	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu, u8 port);
78	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,	78	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
79	u8 port);	79	u8 port);
80		80
81	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,	81	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,

include/linux/mlx5/vport.h+2−0

 				     u16 vport, u8 *addr);
 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *dev,
 				      u16 vport, u8 *addr);
+int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu);
+int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu);
 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
 					   u64 *system_image_guid);
 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid);

include/linux/thermal.h+2−2

@@ -352,8 +352,8 @@ struct thermal_zone_of_device_ops { · 351 unmodified lines
352		352
353	struct thermal_trip {	353	struct thermal_trip {
354	struct device_node *np;	354	struct device_node *np;
355	unsigned long int temperature;	355	int temperature;
356	unsigned long int hysteresis;	356	int hysteresis;
357	enum thermal_trip_type type;	357	enum thermal_trip_type type;
358	};	358	};
359		359

include/linux/tty_driver.h+2−2

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	* defined; unless noted otherwise, they are optional, and can be	7	* defined; unless noted otherwise, they are optional, and can be
8	* filled in with a null pointer.	8	* filled in with a null pointer.
9	*	9	*
10	* struct tty_struct * (lookup)(struct tty_driver self, int idx)	10	* struct tty_struct * (lookup)(struct tty_driver self, struct file *, int idx)
11	*	11	*
12	* Return the tty device corresponding to idx, NULL if there is not	12	* Return the tty device corresponding to idx, NULL if there is not
13	* one currently in use and an ERR_PTR value on error. Called under	13	* one currently in use and an ERR_PTR value on error. Called under
@@ -250,7 +250,7 @@ struct serial_icounter_struct; · 236 unmodified lines
250		250
251	struct tty_operations {	251	struct tty_operations {
252	struct tty_struct * (lookup)(struct tty_driver driver,	252	struct tty_struct * (lookup)(struct tty_driver driver,
253	struct inode *inode, int idx);	253	struct file *filp, int idx);
254	int (install)(struct tty_driver driver, struct tty_struct *tty);	254	int (install)(struct tty_driver driver, struct tty_struct *tty);
255	void (remove)(struct tty_driver driver, struct tty_struct *tty);	255	void (remove)(struct tty_driver driver, struct tty_struct *tty);
256	int (open)(struct tty_struct tty, struct file * filp);	256	int (open)(struct tty_struct tty, struct file * filp);

include/net/switchdev.h+4−0

 	struct net_device *orig_dev;
 	enum switchdev_attr_id id;
 	u32 flags;
+	void *complete_priv;
+	void (*complete)(struct net_device *dev, int err, void *priv);
 	union {
 		struct netdev_phys_item_id ppid;	/* PORT_PARENT_ID */
 		u8 stp_state;				/* PORT_STP_STATE */
 	struct net_device *orig_dev;
 	enum switchdev_obj_id id;
 	u32 flags;
+	void *complete_priv;
+	void (*complete)(struct net_device *dev, int err, void *priv);
 };
 /* SWITCHDEV_OBJ_ID_PORT_VLAN */

include/sound/hda_regmap.h+2−0

 				    unsigned int verb);
 int snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg,
 			     unsigned int *val);
+int snd_hdac_regmap_read_raw_uncached(struct hdac_device *codec,
+				      unsigned int reg, unsigned int *val);
 int snd_hdac_regmap_write_raw(struct hdac_device *codec, unsigned int reg,
 			      unsigned int val);
 int snd_hdac_regmap_update_raw(struct hdac_device *codec, unsigned int reg,

include/uapi/asm-generic/unistd.h+5−1

 __SYSCALL(__NR_mlock2, sys_mlock2)
 #define __NR_copy_file_range 285
 __SYSCALL(__NR_copy_file_range, sys_copy_file_range)
+#define __NR_preadv2 286
+__SYSCALL(__NR_preadv2, sys_preadv2)
+#define __NR_pwritev2 287
+__SYSCALL(__NR_pwritev2, sys_pwritev2)
 #undef __NR_syscalls
-#define __NR_syscalls 286
+#define __NR_syscalls 288
 /*
  * All syscalls below here should go away really,

include/uapi/linux/if_macsec.h+2−2

@@ -19,8 +19,8 @@ · 18 unmodified lines
19		19
20	#define MACSEC_MAX_KEY_LEN 128	20	#define MACSEC_MAX_KEY_LEN 128
21		21
22	#define DEFAULT_CIPHER_ID 0x0080020001000001ULL	22	#define MACSEC_DEFAULT_CIPHER_ID 0x0080020001000001ULL
23	#define DEFAULT_CIPHER_ALT 0x0080C20001000001ULL	23	#define MACSEC_DEFAULT_CIPHER_ALT 0x0080C20001000001ULL
24		24
25	#define MACSEC_MIN_ICV_LEN 8	25	#define MACSEC_MIN_ICV_LEN 8
26	#define MACSEC_MAX_ICV_LEN 32	26	#define MACSEC_MAX_ICV_LEN 32

kernel/bpf/verifier.c+0−1

@@ -2092,7 +2092,6 @@ static int replace_map_fd_with_map_ptr(struct verifier_env *env) · 2091 unmodified lines
2092	if (IS_ERR(map)) {	2092	if (IS_ERR(map)) {
2093	verbose("fd %d is not pointing to valid bpf_map\n",	2093	verbose("fd %d is not pointing to valid bpf_map\n",
2094	insn->imm);	2094	insn->imm);
2095	fdput(f);
2096	return PTR_ERR(map);	2095	return PTR_ERR(map);
2097	}	2096	}
2098		2097

kernel/cpu.c+26−7

  * @target:	The target state
  * @thread:	Pointer to the hotplug thread
  * @should_run:	Thread should execute
+ * @rollback:	Perform a rollback
  * @cb_stat:	The state for a single callback (install/uninstall)
  * @cb:		Single callback function (install/uninstall)
  * @result:	Result of the operation
 #ifdef CONFIG_SMP
 	struct task_struct	*thread;
 	bool			should_run;
+	bool			rollback;
 	enum cpuhp_state	cb_state;
 	int			(*cb)(unsigned int cpu);
 	int			result;
 	return __cpu_notify(val, cpu, -1, NULL);
 }
+static void cpu_notify_nofail(unsigned long val, unsigned int cpu)
+{
+	BUG_ON(cpu_notify(val, cpu));
+}
 /* Notifier wrappers for transitioning to state machine */
 static int notify_prepare(unsigned int cpu)
 {
 		} else {
 			ret = cpuhp_invoke_callback(cpu, st->cb_state, st->cb);
 		}
+	} else if (st->rollback) {
+		BUG_ON(st->state < CPUHP_AP_ONLINE_IDLE);
+		undo_cpu_down(cpu, st, cpuhp_ap_states);
+		/*
+		 * This is a momentary workaround to keep the notifier users
+		 * happy. Will go away once we got rid of the notifiers.
+		 */
+		cpu_notify_nofail(CPU_DOWN_FAILED, cpu);
+		st->rollback = false;
 	} else {
 		/* Cannot happen .... */
 		BUG_ON(st->state < CPUHP_AP_ONLINE_IDLE);
 	read_unlock(&tasklist_lock);
 }
-static void cpu_notify_nofail(unsigned long val, unsigned int cpu)
-{
-	BUG_ON(cpu_notify(val, cpu));
-}
 static int notify_down_prepare(unsigned int cpu)
 {
 	int err, nr_calls = 0;
 	 */
 	err = stop_machine(take_cpu_down, NULL, cpumask_of(cpu));
 	if (err) {
-		/* CPU didn't die: tell everyone.  Can't complain. */
+		/* CPU refused to die */
-		cpu_notify_nofail(CPU_DOWN_FAILED, cpu);
 		irq_unlock_sparse();
+		/* Unpark the hotplug thread so we can rollback there */
+		kthread_unpark(per_cpu_ptr(&cpuhp_state, cpu)->thread);
 		return err;
 	}
 	BUG_ON(cpu_online(cpu));
 	 * to do the further cleanups.
 	 */
 	ret = cpuhp_down_callbacks(cpu, st, cpuhp_bp_states, target);
+	if (ret && st->state > CPUHP_TEARDOWN_CPU && st->state < prev_state) {
+		st->target = prev_state;
+		st->rollback = true;
+		cpuhp_kick_ap_work(cpu);
+	}
 	hasdied = prev_state != st->state && st->state == CPUHP_OFFLINE;
 out:
 		.name			= "notify:online",
 		.startup		= notify_online,
 		.teardown		= notify_down_prepare,
+		.skip_onerr		= true,
 	},
 #endif
 	/*

kernel/futex.c+23−4

 	if (unlikely(should_fail_futex(true)))
 		ret = -EFAULT;
-	if (cmpxchg_futex_value_locked(&curval, uaddr, uval, newval))
+	if (cmpxchg_futex_value_locked(&curval, uaddr, uval, newval)) {
 		ret = -EFAULT;
-	else if (curval != uval)
+	} else if (curval != uval) {
-		ret = -EINVAL;
+		/*
+		 * If a unconditional UNLOCK_PI operation (user space did not
+		 * try the TID->0 transition) raced with a waiter setting the
+		 * FUTEX_WAITERS flag between get_user() and locking the hash
+		 * bucket lock, retry the operation.
+		 */
+		if ((FUTEX_TID_MASK & curval) == uval)
+			ret = -EAGAIN;
+		else
+			ret = -EINVAL;
+	}
 	if (ret) {
 		raw_spin_unlock_irq(&pi_state->pi_mutex.wait_lock);
 		return ret;
 	if (likely(&hb1->chain != &hb2->chain)) {
 		plist_del(&q->list, &hb1->chain);
 		hb_waiters_dec(hb1);
-		plist_add(&q->list, &hb2->chain);
 		hb_waiters_inc(hb2);
+		plist_add(&q->list, &hb2->chain);
 		q->lock_ptr = &hb2->lock;
 	}
 	get_futex_key_refs(key2);
 		 */
 		if (ret == -EFAULT)
 			goto pi_faulted;
+		/*
+		 * A unconditional UNLOCK_PI op raced against a waiter
+		 * setting the FUTEX_WAITERS bit. Try again.
+		 */
+		if (ret == -EAGAIN) {
+			spin_unlock(&hb->lock);
+			put_futex_key(&key);
+			goto retry;
+		}
 		/*
 		 * wake_futex_pi has detected invalid state. Tell user
 		 * space.

kernel/irq/ipi.c+1−0

@@ -94,6 +94,7 @@ unsigned int irq_reserve_ipi(struct irq_domain *domain, · 93 unmodified lines
94	data = irq_get_irq_data(virq + i);	94	data = irq_get_irq_data(virq + i);
95	cpumask_copy(data->common->affinity, dest);	95	cpumask_copy(data->common->affinity, dest);
96	data->common->ipi_offset = offset;	96	data->common->ipi_offset = offset;
		97	irq_set_status_flags(virq + i, IRQ_NO_BALANCING);
97	}	98	}
98	return virq;	99	return virq;
99		100

kernel/locking/qspinlock_stat.h+5−3

 	}
 	if (counter == qstat_pv_hash_hops) {
-		u64 frac;
+		u64 frac = 0;
-		frac = 100ULL * do_div(stat, kicks);
+		if (kicks) {
-		frac = DIV_ROUND_CLOSEST_ULL(frac, kicks);
+			frac = 100ULL * do_div(stat, kicks);
+			frac = DIV_ROUND_CLOSEST_ULL(frac, kicks);
+		}
 		/*
 		 * Return a X.XX decimal number

net/bridge/br_mdb.c+79−45

 		e->flags |= MDB_FLAGS_OFFLOAD;
 }
+static void __mdb_entry_to_br_ip(struct br_mdb_entry *entry, struct br_ip *ip)
+{
+	memset(ip, 0, sizeof(struct br_ip));
+	ip->vid = entry->vid;
+	ip->proto = entry->addr.proto;
+	if (ip->proto == htons(ETH_P_IP))
+		ip->u.ip4 = entry->addr.u.ip4;
+#if IS_ENABLED(CONFIG_IPV6)
+	else
+		ip->u.ip6 = entry->addr.u.ip6;
+#endif
+}
 static int br_mdb_fill_info(struct sk_buff *skb, struct netlink_callback *cb,
 			    struct net_device *dev)
 {
 		+ nla_total_size(sizeof(struct br_mdb_entry));
 }
-static void __br_mdb_notify(struct net_device *dev, struct br_mdb_entry *entry,
+struct br_mdb_complete_info {
-			    int type, struct net_bridge_port_group *pg)
+	struct net_bridge_port *port;
+	struct br_ip ip;
+};
+static void br_mdb_complete(struct net_device *dev, int err, void *priv)
 {
+	struct br_mdb_complete_info *data = priv;
+	struct net_bridge_port_group __rcu **pp;
+	struct net_bridge_port_group *p;
+	struct net_bridge_mdb_htable *mdb;
+	struct net_bridge_mdb_entry *mp;
+	struct net_bridge_port *port = data->port;
+	struct net_bridge *br = port->br;
+	if (err)
+		goto err;
+	spin_lock_bh(&br->multicast_lock);
+	mdb = mlock_dereference(br->mdb, br);
+	mp = br_mdb_ip_get(mdb, &data->ip);
+	if (!mp)
+		goto out;
+	for (pp = &mp->ports; (p = mlock_dereference(*pp, br)) != NULL;
+	     pp = &p->next) {
+		if (p->port != port)
+			continue;
+		p->flags |= MDB_PG_FLAGS_OFFLOAD;
+	}
+out:
+	spin_unlock_bh(&br->multicast_lock);
+err:
+	kfree(priv);
+}
+static void __br_mdb_notify(struct net_device *dev, struct net_bridge_port *p,
+			    struct br_mdb_entry *entry, int type)
+{
+	struct br_mdb_complete_info *complete_info;
 	struct switchdev_obj_port_mdb mdb = {
 		.obj = {
 			.id = SWITCHDEV_OBJ_ID_PORT_MDB,
 	mdb.obj.orig_dev = port_dev;
 	if (port_dev && type == RTM_NEWMDB) {
-		err = switchdev_port_obj_add(port_dev, &mdb.obj);
+		complete_info = kmalloc(sizeof(*complete_info), GFP_ATOMIC);
-		if (!err && pg)
+		if (complete_info) {
-			pg->flags |= MDB_PG_FLAGS_OFFLOAD;
+			complete_info->port = p;
+			__mdb_entry_to_br_ip(entry, &complete_info->ip);
+			mdb.obj.complete_priv = complete_info;
+			mdb.obj.complete = br_mdb_complete;
+			switchdev_port_obj_add(port_dev, &mdb.obj);
+		}
 	} else if (port_dev && type == RTM_DELMDB) {
 		switchdev_port_obj_del(port_dev, &mdb.obj);
 	}
 	rtnl_set_sk_err(net, RTNLGRP_MDB, err);
 }
-void br_mdb_notify(struct net_device *dev, struct net_bridge_port_group *pg,
+void br_mdb_notify(struct net_device *dev, struct net_bridge_port *port,
-		   int type)
+		   struct br_ip *group, int type, u8 flags)
 {
 	struct br_mdb_entry entry;
 	memset(&entry, 0, sizeof(entry));
-	entry.ifindex = pg->port->dev->ifindex;
+	entry.ifindex = port->dev->ifindex;
-	entry.addr.proto = pg->addr.proto;
+	entry.addr.proto = group->proto;
-	entry.addr.u.ip4 = pg->addr.u.ip4;
+	entry.addr.u.ip4 = group->u.ip4;
 #if IS_ENABLED(CONFIG_IPV6)
-	entry.addr.u.ip6 = pg->addr.u.ip6;
+	entry.addr.u.ip6 = group->u.ip6;
 #endif
-	entry.vid = pg->addr.vid;
+	entry.vid = group->vid;
-	__mdb_entry_fill_flags(&entry, pg->flags);
+	__mdb_entry_fill_flags(&entry, flags);
-	__br_mdb_notify(dev, &entry, type, pg);
+	__br_mdb_notify(dev, port, &entry, type);
 }
 static int nlmsg_populate_rtr_fill(struct sk_buff *skb,
 }
 static int br_mdb_add_group(struct net_bridge *br, struct net_bridge_port *port,
-			    struct br_ip *group, unsigned char state,
+			    struct br_ip *group, unsigned char state)
-			    struct net_bridge_port_group **pg)
 {
 	struct net_bridge_mdb_entry *mp;
 	struct net_bridge_port_group *p;
 	if (unlikely(!p))
 		return -ENOMEM;
 	rcu_assign_pointer(*pp, p);
-	*pg = p;
 	if (state == MDB_TEMPORARY)
 		mod_timer(&p->timer, now + br->multicast_membership_interval);
 }
 static int __br_mdb_add(struct net *net, struct net_bridge *br,
-			struct br_mdb_entry *entry,
+			struct br_mdb_entry *entry)
-			struct net_bridge_port_group **pg)
 {
 	struct br_ip ip;
 	struct net_device *dev;
 	if (!p || p->br != br || p->state == BR_STATE_DISABLED)
 		return -EINVAL;
-	memset(&ip, 0, sizeof(ip));
+	__mdb_entry_to_br_ip(entry, &ip);
-	ip.vid = entry->vid;
-	ip.proto = entry->addr.proto;
-	if (ip.proto == htons(ETH_P_IP))
-		ip.u.ip4 = entry->addr.u.ip4;
-#if IS_ENABLED(CONFIG_IPV6)
-	else
-		ip.u.ip6 = entry->addr.u.ip6;
-#endif
 	spin_lock_bh(&br->multicast_lock);
-	ret = br_mdb_add_group(br, p, &ip, entry->state, pg);
+	ret = br_mdb_add_group(br, p, &ip, entry->state);
 	spin_unlock_bh(&br->multicast_lock);
 	return ret;
 }
 static int br_mdb_add(struct sk_buff *skb, struct nlmsghdr *nlh)
 {
 	struct net *net = sock_net(skb->sk);
-	struct net_bridge_port_group *pg;
 	struct net_bridge_vlan_group *vg;
 	struct net_device *dev, *pdev;
 	struct br_mdb_entry *entry;
 	if (br_vlan_enabled(br) && vg && entry->vid == 0) {
 		list_for_each_entry(v, &vg->vlan_list, vlist) {
 			entry->vid = v->vid;
-			err = __br_mdb_add(net, br, entry, &pg);
+			err = __br_mdb_add(net, br, entry);
 			if (err)
 				break;
-			__br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
+			__br_mdb_notify(dev, p, entry, RTM_NEWMDB);
 		}
 	} else {
-		err = __br_mdb_add(net, br, entry, &pg);
+		err = __br_mdb_add(net, br, entry);
 		if (!err)
-			__br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
+			__br_mdb_notify(dev, p, entry, RTM_NEWMDB);
 	}
 	return err;
 	if (!netif_running(br->dev) || br->multicast_disabled)
 		return -EINVAL;
-	memset(&ip, 0, sizeof(ip));
+	__mdb_entry_to_br_ip(entry, &ip);
-	ip.vid = entry->vid;
-	ip.proto = entry->addr.proto;
-	if (ip.proto == htons(ETH_P_IP))
-		ip.u.ip4 = entry->addr.u.ip4;
-#if IS_ENABLED(CONFIG_IPV6)
-	else
-		ip.u.ip6 = entry->addr.u.ip6;
-#endif
 	spin_lock_bh(&br->multicast_lock);
 	mdb = mlock_dereference(br->mdb, br);
 			entry->vid = v->vid;
 			err = __br_mdb_del(br, entry);
 			if (!err)
-				__br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
+				__br_mdb_notify(dev, p, entry, RTM_DELMDB);
 		}
 	} else {
 		err = __br_mdb_del(br, entry);
 		if (!err)
-			__br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
+			__br_mdb_notify(dev, p, entry, RTM_DELMDB);
 	}
 	return err;

net/bridge/br_multicast.c+5−3

 		rcu_assign_pointer(*pp, p->next);
 		hlist_del_init(&p->mglist);
 		del_timer(&p->timer);
-		br_mdb_notify(br->dev, p, RTM_DELMDB);
+		br_mdb_notify(br->dev, p->port, &pg->addr, RTM_DELMDB,
+			      p->flags);
 		call_rcu_bh(&p->rcu, br_multicast_free_pg);
 		if (!mp->ports && !mp->mglist &&
 	if (unlikely(!p))
 		goto err;
 	rcu_assign_pointer(*pp, p);
-	br_mdb_notify(br->dev, p, RTM_NEWMDB);
+	br_mdb_notify(br->dev, port, group, RTM_NEWMDB, 0);
 found:
 	mod_timer(&p->timer, now + br->multicast_membership_interval);
 			hlist_del_init(&p->mglist);
 			del_timer(&p->timer);
 			call_rcu_bh(&p->rcu, br_multicast_free_pg);
-			br_mdb_notify(br->dev, p, RTM_DELMDB);
+			br_mdb_notify(br->dev, port, group, RTM_DELMDB,
+				      p->flags);
 			if (!mp->ports && !mp->mglist &&
 			    netif_running(br->dev))

net/bridge/br_private.h+2−2

@@ -560,8 +560,8 @@ br_multicast_new_port_group(struct net_bridge_port port, struct br_ip group, · 559 unmodified lines
560	unsigned char flags);	560	unsigned char flags);
561	void br_mdb_init(void);	561	void br_mdb_init(void);
562	void br_mdb_uninit(void);	562	void br_mdb_uninit(void);
563	void br_mdb_notify(struct net_device dev, struct net_bridge_port_group pg,	563	void br_mdb_notify(struct net_device dev, struct net_bridge_port port,
564	int type);	564	struct br_ip *group, int type, u8 flags);
565	void br_rtr_notify(struct net_device dev, struct net_bridge_port port,	565	void br_rtr_notify(struct net_device dev, struct net_bridge_port port,
566	int type);	566	int type);
567		567

net/ipv4/fib_frontend.c+5−1

 	if (ifa->ifa_flags & IFA_F_SECONDARY) {
 		prim = inet_ifa_byprefix(in_dev, any, ifa->ifa_mask);
 		if (!prim) {
-			pr_warn("%s: bug: prim == NULL\n", __func__);
+			/* if the device has been deleted, we don't perform
+			 * address promotion
+			 */
+			if (!in_dev->dead)
+				pr_warn("%s: bug: prim == NULL\n", __func__);
 			return;
 		}
 		if (iprim && iprim != prim) {

net/ipv6/addrconf.c+15−33

@@ -3175,35 +3175,9 @@ static void addrconf_gre_config(struct net_device *dev) · 3174 unmodified lines
3175	}	3175	}
3176	#endif	3176	#endif
3177		3177
3178	#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
3179	/* If the host route is cached on the addr struct make sure it is associated
3180	* with the proper table. e.g., enslavement can change and if so the cached
3181	* host route needs to move to the new table.
3182	*/
3183	static void l3mdev_check_host_rt(struct inet6_dev *idev,
3184	struct inet6_ifaddr *ifp)
3185	{
3186	if (ifp->rt) {
3187	u32 tb_id = l3mdev_fib_table(idev->dev) ? : RT6_TABLE_LOCAL;
3188
3189	if (tb_id != ifp->rt->rt6i_table->tb6_id) {
3190	ip6_del_rt(ifp->rt);
3191	ifp->rt = NULL;
3192	}
3193	}
3194	}
3195	#else
3196	static void l3mdev_check_host_rt(struct inet6_dev *idev,
3197	struct inet6_ifaddr *ifp)
3198	{
3199	}
3200	#endif
3201
3202	static int fixup_permanent_addr(struct inet6_dev *idev,	3178	static int fixup_permanent_addr(struct inet6_dev *idev,
3203	struct inet6_ifaddr *ifp)	3179	struct inet6_ifaddr *ifp)
3204	{	3180	{
3205	l3mdev_check_host_rt(idev, ifp);
3206
3207	if (!ifp->rt) {	3181	if (!ifp->rt) {
3208	struct rt6_info *rt;	3182	struct rt6_info *rt;
3209		3183
@@ -3303,6 +3277,9 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 93 unmodified lines
3303	break;	3277	break;
3304		3278
3305	if (event == NETDEV_UP) {	3279	if (event == NETDEV_UP) {
		3280	/* restore routes for permanent addresses */
		3281	addrconf_permanent_addr(dev);
		3282
3306	if (!addrconf_qdisc_ok(dev)) {	3283	if (!addrconf_qdisc_ok(dev)) {
3307	/* device is not ready yet. */	3284	/* device is not ready yet. */
3308	pr_info("ADDRCONF(NETDEV_UP): %s: link is not ready\n",	3285	pr_info("ADDRCONF(NETDEV_UP): %s: link is not ready\n",
@@ -3336,9 +3313,6 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 27 unmodified lines
3336	run_pending = 1;	3313	run_pending = 1;
3337	}	3314	}
3338		3315
3339	/* restore routes for permanent addresses */
3340	addrconf_permanent_addr(dev);
3341
3342	switch (dev->type) {	3316	switch (dev->type) {
3343	#if IS_ENABLED(CONFIG_IPV6_SIT)	3317	#if IS_ENABLED(CONFIG_IPV6_SIT)
3344	case ARPHRD_SIT:	3318	case ARPHRD_SIT:
@@ -3555,6 +3529,8 @@ restart: · 210 unmodified lines
3555		3529
3556	INIT_LIST_HEAD(&del_list);	3530	INIT_LIST_HEAD(&del_list);
3557	list_for_each_entry_safe(ifa, tmp, &idev->addr_list, if_list) {	3531	list_for_each_entry_safe(ifa, tmp, &idev->addr_list, if_list) {
		3532	struct rt6_info *rt = NULL;
		3533
3558	addrconf_del_dad_work(ifa);	3534	addrconf_del_dad_work(ifa);
3559		3535
3560	write_unlock_bh(&idev->lock);	3536	write_unlock_bh(&idev->lock);
@@ -3567,6 +3543,9 @@ restart: · 6 unmodified lines
3567	ifa->state = 0;	3543	ifa->state = 0;
3568	if (!(ifa->flags & IFA_F_NODAD))	3544	if (!(ifa->flags & IFA_F_NODAD))
3569	ifa->flags \|= IFA_F_TENTATIVE;	3545	ifa->flags \|= IFA_F_TENTATIVE;
		3546
		3547	rt = ifa->rt;
		3548	ifa->rt = NULL;
3570	} else {	3549	} else {
3571	state = ifa->state;	3550	state = ifa->state;
3572	ifa->state = INET6_IFADDR_STATE_DEAD;	3551	ifa->state = INET6_IFADDR_STATE_DEAD;
@@ -3577,6 +3556,9 @@ restart: · 4 unmodified lines
3577		3556
3578	spin_unlock_bh(&ifa->lock);	3557	spin_unlock_bh(&ifa->lock);
3579		3558
		3559	if (rt)
		3560	ip6_del_rt(rt);
		3561
3580	if (state != INET6_IFADDR_STATE_DEAD) {	3562	if (state != INET6_IFADDR_STATE_DEAD) {
3581	__ipv6_ifa_notify(RTM_DELADDR, ifa);	3563	__ipv6_ifa_notify(RTM_DELADDR, ifa);
3582	inet6addr_notifier_call_chain(NETDEV_DOWN, ifa);	3564	inet6addr_notifier_call_chain(NETDEV_DOWN, ifa);
@@ -5344,10 +5326,10 @@ static void __ipv6_ifa_notify(int event, struct inet6_ifaddr *ifp) · 1761 unmodified lines
5344	if (rt)	5326	if (rt)
5345	ip6_del_rt(rt);	5327	ip6_del_rt(rt);
5346	}	5328	}
5347	dst_hold(&ifp->rt->dst);	5329	if (ifp->rt) {
5348		5330	dst_hold(&ifp->rt->dst);
5349	ip6_del_rt(ifp->rt);	5331	ip6_del_rt(ifp->rt);
5350		5332	}
5351	rt_genid_bump_ipv6(net);	5333	rt_genid_bump_ipv6(net);
5352	break;	5334	break;
5353	}	5335	}

net/switchdev/switchdev.c+6−0

 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to set attribute (id=%d)\n",
 			   err, attr->id);
+	if (attr->complete)
+		attr->complete(dev, err, attr->complete_priv);
 }
 static int switchdev_port_attr_set_defer(struct net_device *dev,
 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to add object (id=%d)\n",
 			   err, obj->id);
+	if (obj->complete)
+		obj->complete(dev, err, obj->complete_priv);
 }
 static int switchdev_port_obj_add_defer(struct net_device *dev,
 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to del object (id=%d)\n",
 			   err, obj->id);
+	if (obj->complete)
+		obj->complete(dev, err, obj->complete_priv);
 }
 static int switchdev_port_obj_del_defer(struct net_device *dev,

sound/hda/hdac_device.c+4−6

 int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
 				int parm)
 {
-	int val;
+	unsigned int cmd, val;
-	if (codec->regmap)
+	cmd = snd_hdac_regmap_encode_verb(nid, AC_VERB_PARAMETERS) | parm;
-		regcache_cache_bypass(codec->regmap, true);
+	if (snd_hdac_regmap_read_raw_uncached(codec, cmd, &val) < 0)
-	val = snd_hdac_read_parm(codec, nid, parm);
+		return -1;
-	if (codec->regmap)
-		regcache_cache_bypass(codec->regmap, false);
 	return val;
 }
 EXPORT_SYMBOL_GPL(snd_hdac_read_parm_uncached);

sound/hda/hdac_regmap.c+28−12

 EXPORT_SYMBOL_GPL(snd_hdac_regmap_write_raw);
 static int reg_raw_read(struct hdac_device *codec, unsigned int reg,
-			unsigned int *val)
+			unsigned int *val, bool uncached)
 {
-	if (!codec->regmap)
+	if (uncached || !codec->regmap)
 		return hda_reg_read(codec, reg, val);
 	else
 		return regmap_read(codec->regmap, reg, val);
 }
+static int __snd_hdac_regmap_read_raw(struct hdac_device *codec,
+				      unsigned int reg, unsigned int *val,
+				      bool uncached)
+{
+	int err;
+	err = reg_raw_read(codec, reg, val, uncached);
+	if (err == -EAGAIN) {
+		err = snd_hdac_power_up_pm(codec);
+		if (!err)
+			err = reg_raw_read(codec, reg, val, uncached);
+		snd_hdac_power_down_pm(codec);
+	}
+	return err;
+}
 /**
  * snd_hdac_regmap_read_raw - read a pseudo register with power mgmt
  * @codec: the codec object
 int snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg,
 			     unsigned int *val)
 {
-	int err;
+	return __snd_hdac_regmap_read_raw(codec, reg, val, false);
-	err = reg_raw_read(codec, reg, val);
-	if (err == -EAGAIN) {
-		err = snd_hdac_power_up_pm(codec);
-		if (!err)
-			err = reg_raw_read(codec, reg, val);
-		snd_hdac_power_down_pm(codec);
-	}
-	return err;
 }
 EXPORT_SYMBOL_GPL(snd_hdac_regmap_read_raw);
+/* Works like snd_hdac_regmap_read_raw(), but this doesn't read from the
+ * cache but always via hda verbs.
+ */
+int snd_hdac_regmap_read_raw_uncached(struct hdac_device *codec,
+				      unsigned int reg, unsigned int *val)
+{
+	return __snd_hdac_regmap_read_raw(codec, reg, val, true);
+}
 /**
  * snd_hdac_regmap_update_raw - update a pseudo register with power mgmt
  * @codec: the codec object

sound/pci/hda/hda_generic.c+4−2

 				   bool allow_powerdown)
 {
 	hda_nid_t nid, changed = 0;
-	int i, state;
+	int i, state, power;
 	for (i = 0; i < path->depth; i++) {
 		nid = path->path[i];
 			state = AC_PWRST_D0;
 		else
 			state = AC_PWRST_D3;
-		if (!snd_hda_check_power_state(codec, nid, state)) {
+		power = snd_hda_codec_read(codec, nid, 0,
+					   AC_VERB_GET_POWER_STATE, 0);
+		if (power != (state | (state << 4))) {
 			snd_hda_codec_write(codec, nid, 0,
 					    AC_VERB_SET_POWER_STATE, state);
 			changed = nid;

sound/pci/hda/hda_intel.c+3−0

 	/* Broxton-P(Apollolake) */
 	{ PCI_DEVICE(0x8086, 0x5a98),
 	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
+	/* Broxton-T */
+	{ PCI_DEVICE(0x8086, 0x1a98),
+	  .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
 	/* Haswell */
 	{ PCI_DEVICE(0x8086, 0x0a0c),
 	  .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },

sound/pci/hda/patch_cirrus.c+14−0

@@ -361,6 +361,7 @@ static int cs_parse_auto_config(struct hda_codec *codec) · 360 unmodified lines
361	{	361	{
362	struct cs_spec *spec = codec->spec;	362	struct cs_spec *spec = codec->spec;
363	int err;	363	int err;
		364	int i;
364		365
365	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);	366	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
366	if (err < 0)	367	if (err < 0)
@@ -370,6 +371,19 @@ static int cs_parse_auto_config(struct hda_codec *codec) · 3 unmodified lines
370	if (err < 0)	371	if (err < 0)
371	return err;	372	return err;
372		373
		374	/* keep the ADCs powered up when it's dynamically switchable */
		375	if (spec->gen.dyn_adc_switch) {
		376	unsigned int done = 0;
		377	for (i = 0; i < spec->gen.input_mux.num_items; i++) {
		378	int idx = spec->gen.dyn_adc_idx[i];
		379	if (done & (1 << idx))
		380	continue;
		381	snd_hda_gen_fix_pin_power(codec,
		382	spec->gen.adc_nids[idx]);
		383	done \|= 1 << idx;
		384	}
		385	}
		386
373	return 0;	387	return 0;
374	}	388	}
375		389

sound/pci/hda/patch_hdmi.c+2−0

@@ -1858,6 +1858,8 @@ static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx, · 1857 unmodified lines
1858	struct hdmi_spec *spec = codec->spec;	1858	struct hdmi_spec *spec = codec->spec;
1859	struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);	1859	struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1860		1860
		1861	if (!per_pin)
		1862	return;
1861	mutex_lock(&per_pin->lock);	1863	mutex_lock(&per_pin->lock);
1862	per_pin->chmap_set = true;	1864	per_pin->chmap_set = true;
1863	memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));	1865	memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));

sound/pci/hda/patch_realtek.c+1−0

@@ -5449,6 +5449,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 5448 unmodified lines
5449	SND_PCI_QUIRK(0x1028, 0x064a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5449	SND_PCI_QUIRK(0x1028, 0x064a, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
5450	SND_PCI_QUIRK(0x1028, 0x064b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5450	SND_PCI_QUIRK(0x1028, 0x064b, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),
5451	SND_PCI_QUIRK(0x1028, 0x0665, "Dell XPS 13", ALC288_FIXUP_DELL_XPS_13),	5451	SND_PCI_QUIRK(0x1028, 0x0665, "Dell XPS 13", ALC288_FIXUP_DELL_XPS_13),
		5452	SND_PCI_QUIRK(0x1028, 0x0669, "Dell Optiplex 9020m", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
5452	SND_PCI_QUIRK(0x1028, 0x069a, "Dell Vostro 5480", ALC290_FIXUP_SUBWOOFER_HSJACK),	5453	SND_PCI_QUIRK(0x1028, 0x069a, "Dell Vostro 5480", ALC290_FIXUP_SUBWOOFER_HSJACK),
5453	SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),	5454	SND_PCI_QUIRK(0x1028, 0x06c7, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE),
5454	SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),	5455	SND_PCI_QUIRK(0x1028, 0x06d9, "Dell", ALC293_FIXUP_DELL1_MIC_NO_PRESENCE),

sound/pci/pcxhr/pcxhr_core.c+1−0

@@ -1341,5 +1341,6 @@ irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id) · 1340 unmodified lines
1341	}	1341	}
1342		1342
1343	pcxhr_msg_thread(mgr);	1343	pcxhr_msg_thread(mgr);
		1344	mutex_unlock(&mgr->lock);
1344	return IRQ_HANDLED;	1345	return IRQ_HANDLED;
1345	}	1346	}

tools/objtool/Documentation/stack-validation.txt+29−9

@@ -299,18 +299,38 @@ they mean, and suggestions for how to fix them. · 298 unmodified lines
299	Errors in .c files	299	Errors in .c files
300	------------------	300	------------------
301		301
302	If you're getting an objtool error in a compiled .c file, chances are	302	1. c_file.o: warning: objtool: funcA() falls through to next function funcB()
303	the file uses an asm() statement which has a "call" instruction. An
304	asm() statement with a call instruction must declare the use of the
305	stack pointer in its output operand. For example, on x86_64:
306		303
307	register void *__sp asm("rsp");	304	This means that funcA() doesn't end with a return instruction or an
308	asm volatile("call func" : "+r" (__sp));	305	unconditional jump, and that objtool has determined that the function
		306	can fall through into the next function. There could be different
		307	reasons for this:
309		308
310	Otherwise the stack frame may not get created before the call.	309	1) funcA()'s last instruction is a call to a "noreturn" function like
		310	panic(). In this case the noreturn function needs to be added to
		311	objtool's hard-coded global_noreturns array. Feel free to bug the
		312	objtool maintainer, or you can submit a patch.
311		313
312	Another possible cause for errors in C code is if the Makefile removes	314	2) funcA() uses the unreachable() annotation in a section of code
313	-fno-omit-frame-pointer or adds -fomit-frame-pointer to the gcc options.	315	that is actually reachable.
		316
		317	3) If funcA() calls an inline function, the object code for funcA()
		318	might be corrupt due to a gcc bug. For more details, see:
		319	https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70646
		320
		321	2. If you're getting any other objtool error in a compiled .c file, it
		322	may be because the file uses an asm() statement which has a "call"
		323	instruction. An asm() statement with a call instruction must declare
		324	the use of the stack pointer in its output operand. For example, on
		325	x86_64:
		326
		327	register void *__sp asm("rsp");
		328	asm volatile("call func" : "+r" (__sp));
		329
		330	Otherwise the stack frame may not get created before the call.
		331
		332	3. Another possible cause for errors in C code is if the Makefile removes
		333	-fno-omit-frame-pointer or adds -fomit-frame-pointer to the gcc options.
314		334
315	Also see the above section for .S file errors for more information what	335	Also see the above section for .S file errors for more information what
316	the individual error messages mean.	336	the individual error messages mean.

tools/objtool/builtin-check.c+72−25

 	struct symbol *call_dest;
 	struct instruction *jump_dest;
 	struct list_head alts;
+	struct symbol *func;
 };
 struct alternative {
 	struct list_head insn_list;
 	DECLARE_HASHTABLE(insn_hash, 16);
 	struct section *rodata, *whitelist;
+	bool ignore_unreachables, c_file;
 };
 const char *objname;
 			}
 		}
-		if (insn->type == INSN_JUMP_DYNAMIC)
+		if (insn->type == INSN_JUMP_DYNAMIC && list_empty(&insn->alts))
 			/* sibling call */
 			return 0;
 	}
 static int decode_instructions(struct objtool_file *file)
 {
 	struct section *sec;
+	struct symbol *func;
 	unsigned long offset;
 	struct instruction *insn;
 	int ret;
 			hash_add(file->insn_hash, &insn->hash, insn->offset);
 			list_add_tail(&insn->list, &file->insn_list);
 		}
+		list_for_each_entry(func, &sec->symbol_list, list) {
+			if (func->type != STT_FUNC)
+				continue;
+			if (!find_insn(file, sec, func->offset)) {
+				WARN("%s(): can't find starting instruction",
+				     func->name);
+				return -1;
+			}
+			func_for_each_insn(file, func, insn)
+				if (!insn->func)
+					insn->func = func;
+		}
 	}
 	return 0;
 						text_rela->addend);
 		/*
-		 * TODO: Document where this is needed, or get rid of it.
-		 *
 		 * rare case:   jmpq *[addr](%rip)
+		 *
+		 * This check is for a rare gcc quirk, currently only seen in
+		 * three driver functions in the kernel, only with certain
+		 * obscure non-distro configs.
+		 *
+		 * As part of an optimization, gcc makes a copy of an existing
+		 * switch jump table, modifies it, and then hard-codes the jump
+		 * (albeit with an indirect jump) to use a single entry in the
+		 * table.  The rest of the jump table and some of its jump
+		 * targets remain as dead code.
+		 *
+		 * In such a case we can just crudely ignore all unreachable
+		 * instruction warnings for the entire object file.  Ideally we
+		 * would just ignore them for the function, but that would
+		 * require redesigning the code quite a bit.  And honestly
+		 * that's just not worth doing: unreachable instruction
+		 * warnings are of questionable value anyway, and this is such
+		 * a rare issue.
+		 *
+		 * kbuild reports:
+		 * - https://lkml.kernel.org/r/201603231906.LWcVUpxm%25fengguang.wu@intel.com
+		 * - https://lkml.kernel.org/r/201603271114.K9i45biy%25fengguang.wu@intel.com
+		 * - https://lkml.kernel.org/r/201603291058.zuJ6ben1%25fengguang.wu@intel.com
+		 *
+		 * gcc bug:
+		 * - https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70604
 		 */
-		if (!rodata_rela)
+		if (!rodata_rela) {
 			rodata_rela = find_rela_by_dest(file->rodata,
 							text_rela->addend + 4);
+			if (rodata_rela)
+				file->ignore_unreachables = true;
+		}
 		if (!rodata_rela)
 			continue;
 {
 	int ret;
-	file->whitelist = find_section_by_name(file->elf, "__func_stack_frame_non_standard");
-	file->rodata = find_section_by_name(file->elf, ".rodata");
 	ret = decode_instructions(file);
 	if (ret)
 		return ret;
 	struct alternative *alt;
 	struct instruction *insn;
 	struct section *sec;
+	struct symbol *func = NULL;
 	unsigned char state;
 	int ret;
 	}
 	while (1) {
+		if (file->c_file && insn->func) {
+			if (func && func != insn->func) {
+				WARN("%s() falls through to next function %s()",
+				     func->name, insn->func->name);
+				return 1;
+			}
+			func = insn->func;
+		}
 		if (insn->visited) {
 			if (frame_state(insn->state) != frame_state(state)) {
 				WARN_FUNC("frame pointer state mismatch",
 			return 0;
 		}
-		/*
-		 * Catch a rare case where a noreturn function falls through to
-		 * the next function.
-		 */
-		if (is_fentry_call(insn) && (state & STATE_FENTRY))
-			return 0;
 		insn->visited = true;
 		insn->state = state;
 				continue;
 			insn = find_insn(file, sec, func->offset);
-			if (!insn) {
+			if (!insn)
-				WARN("%s(): can't find starting instruction",
-				     func->name);
-				warnings++;
 				continue;
-			}
 			ret = validate_branch(file, insn, 0);
 			warnings += ret;
 				if (insn->visited)
 					continue;
-				if (!ignore_unreachable_insn(func, insn) &&
-				    !warnings) {
-					WARN_FUNC("function has unreachable instruction", insn->sec, insn->offset);
-					warnings++;
-				}
 				insn->visited = true;
+				if (file->ignore_unreachables || warnings ||
+				    ignore_unreachable_insn(func, insn))
+					continue;
+				WARN_FUNC("function has unreachable instruction", insn->sec, insn->offset);
+				warnings++;
 			}
 		}
 	}
 	INIT_LIST_HEAD(&file.insn_list);
 	hash_init(file.insn_hash);
+	file.whitelist = find_section_by_name(file.elf, "__func_stack_frame_non_standard");
+	file.rodata = find_section_by_name(file.elf, ".rodata");
+	file.ignore_unreachables = false;
+	file.c_file = find_section_by_name(file.elf, ".comment");
 	ret = decode_sections(&file);
 	if (ret < 0)

tools/perf/util/intel-pt.c+1−1

@@ -1130,7 +1130,7 @@ static int intel_pt_synth_transaction_sample(struct intel_pt_queue *ptq) · 1129 unmodified lines
1130	pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",	1130	pr_err("Intel Processor Trace: failed to deliver transaction event, error %d\n",
1131	ret);	1131	ret);
1132		1132
1133	if (pt->synth_opts.callchain)	1133	if (pt->synth_opts.last_branch)
1134	intel_pt_reset_last_branch_rb(ptq);	1134	intel_pt_reset_last_branch_rb(ptq);
1135		1135
1136	return ret;	1136	return ret;

@@ -260,8 +260,8 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, · 259 unmodified lines
260	}	260	}
261	EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);	261	EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);
262		262
263	static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu,	263	static void mlx5_query_port_mtu(struct mlx5_core_dev dev, u16 admin_mtu,
264	int max_mtu, int oper_mtu, u8 port)	264	u16 max_mtu, u16 oper_mtu, u8 port)
265	{	265	{
266	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];	266	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
267	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];	267	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -281,7 +281,7 @@ static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu, · 13 unmodified lines
281	*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);	281	*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);
282	}	282	}
283		283
284	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port)	284	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port)
285	{	285	{
286	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];	286	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
287	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];	287	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -296,14 +296,14 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port) · 8 unmodified lines
296	}	296	}
297	EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);	297	EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);
298		298
299	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu,	299	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu,
300	u8 port)	300	u8 port)
301	{	301	{
302	mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, port);	302	mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, port);
303	}	303	}
304	EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);	304	EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);
305		305
306	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,	306	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
307	u8 port)	307	u8 port)
308	{	308	{
309	mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, port);	309	mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, port);