History

Merge drm/drm-fixes into drm-misc-fixes

7.0-rc1 was just released, let's merge it to kick the new release cycle.

Maxime Ripard committed 8 months ago

Commit c17ee632 parents 803ec1f 6de23f817345 files · +652622 −240756Browse files

Unified · Split

3670 files
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  295. Documentation/devicetree/bindings/iio/proximity/rfdigital,rfd77402.yaml +53 −0
  296. Documentation/devicetree/bindings/input/focaltech,ft8112.yaml +66 −0
  297. Documentation/devicetree/bindings/input/google,goldfish-events-keypad.yaml +41 −0
  298. Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml +12 −5
  299. Documentation/devicetree/bindings/input/syna,rmi4.yaml +1 −1
  300. Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml +1 −0
  301. Documentation/devicetree/bindings/input/touchscreen/goodix.yaml +2 −0
  302. Documentation/devicetree/bindings/input/touchscreen/ilitek,ili210x.yaml +51 −0
  303. Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml +3 −1
  304. Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml +7 −3
  305. Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml +3 −0
  306. Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml +0 −4
  307. Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml +1 −0
  308. Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +1 −0
  309. Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml +0 −2
  310. Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml +31 −0
  311. Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml +51 −0
  312. Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml +8 −0
  313. Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml +3 −0
  314. Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +3 −0
  315. Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +3 −0
  316. Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +2 −0
  317. Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml +236 −0
  318. Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml +1 −0
  319. Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml +1 −0
  320. Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml +1 −0
  321. Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +3 −1
  322. Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +33 −5
  323. Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml +26 −1
  324. Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml +42 −0
  325. Documentation/devicetree/bindings/leds/ams,as3668.yaml +74 −0
  326. Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml +22 −2
  327. Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml +41 −0
  328. Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +1 −1
  329. Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt +1 −0
  330. Documentation/devicetree/bindings/leds/leds-lm3697.txt +0 −73
  331. Documentation/devicetree/bindings/leds/leds-lp5860.yaml +111 −0
  332. Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml +1 −0
  333. Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml +1 −0
  334. Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml +4 −3
  335. Documentation/devicetree/bindings/leds/ti,lm3697.yaml +125 −0
  336. Documentation/devicetree/bindings/leds/ti,lp5812.yaml +246 −0
  337. Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml +49 −0
  338. Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +5 −1
  339. Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml +2 −0
  340. Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml +2 −0
  341. Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml +1 −0
  342. Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml +11 −0
  343. Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml +96 −1
  344. Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml +1 −1
  345. Documentation/devicetree/bindings/media/i2c/ovti,os05b10.yaml +103 −0
  346. Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml +13 −1
  347. Documentation/devicetree/bindings/media/i2c/samsung,s5k3m5.yaml +103 −0
  348. Documentation/devicetree/bindings/media/i2c/samsung,s5kjn1.yaml +103 −0
  349. Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt +0 −55
  350. Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml +87 −0
  351. Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml +6 −0
  352. Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml +13 −0
  353. Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml +2 −2
  354. Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml +2 −2
  355. Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml +2 −2
  356. Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml +2 −2
  357. Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +2 −2
  358. Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml +439 −0
  359. Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml +2 −2
  360. Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml +2 −2
  361. Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml +2 −2
  362. Documentation/devicetree/bindings/media/renesas,fcp.yaml +1 −0
  363. Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +141 −0
  364. Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml +1 −1
  365. Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml +3 −0
  366. Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml +3 −0
  367. Documentation/devicetree/bindings/media/ti,omap3isp.txt +0 −71
  368. Documentation/devicetree/bindings/media/ti,omap3isp.yaml +189 −0
  369. Documentation/devicetree/bindings/media/ti,vip.yaml +152 −0
  370. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml +34 −0
  371. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml +0 −74
  372. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml +1 −1
  373. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml +1 −1
  374. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml +1 −1
  375. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml +1 −1
  376. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yaml +27 −13
  377. Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-props.yaml +94 −0
  378. Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml +13 −0
  379. Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml +17 −0
  380. Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml +1 −0
  381. Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml +1 −0
  382. Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml +66 −0
  383. Documentation/devicetree/bindings/mfd/da9055.txt +1 −1
  384. Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml +80 −0
  385. Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml +1 −0
  386. Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml +3 −1
  387. Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml +74 −0
  388. Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml +6 −0
  389. Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml +1 −0
  390. Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml +69 −0
  391. Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml +197 −0
  392. Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml +339 −0
  393. Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml +120 −0
  394. Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml +88 −0
  395. Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml +1 −28
  396. Documentation/devicetree/bindings/mfd/syscon.yaml +5 −0
  397. Documentation/devicetree/bindings/misc/google,android-pipe.yaml +38 −0
  398. Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml +3 −1
  399. Documentation/devicetree/bindings/mmc/mmc-card.yaml +6 −14
  400. Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml +0 −1
  401. Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml +2 −0
  402. Documentation/devicetree/bindings/mtd/microchip,mchp23k256.txt +0 −18
  403. Documentation/devicetree/bindings/mtd/microchip,mchp23k256.yaml +49 −0
  404. Documentation/devicetree/bindings/mtd/mtd.yaml +3 −7
  405. Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml +78 −0
  406. Documentation/devicetree/bindings/mtd/mxic-nand.txt +0 −36
  407. Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml +102 −0
  408. Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt +0 −64
  409. Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml +0 −2
  410. Documentation/devicetree/bindings/mtd/partitions/binman.yaml +0 −53
  411. Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml +1 −7
  412. Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml +0 −2
  413. Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-imagetag.txt +0 −45
  414. Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt +0 −42
  415. Documentation/devicetree/bindings/mtd/partitions/brcm,trx.yaml +65 −0
  416. Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml +10 −33
  417. Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml +1 −9
  418. Documentation/devicetree/bindings/mtd/partitions/partition.yaml +43 −1
  419. Documentation/devicetree/bindings/mtd/partitions/partitions.yaml +0 −42
  420. Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml +0 −4
  421. Documentation/devicetree/bindings/mtd/partitions/seama.yaml +0 −44
  422. Documentation/devicetree/bindings/mtd/partitions/simple-partition.yaml +61 −0
  423. Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml +1 −1
  424. Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml +1 −1
  425. Documentation/devicetree/bindings/mtd/spear_smi.txt +0 −29
  426. Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml +72 −0
  427. Documentation/devicetree/bindings/mtd/st,spi-fsm.yaml +68 −0
  428. Documentation/devicetree/bindings/mtd/st-fsm.txt +0 −25
  429. Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml +3 −1
  430. Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml +1 −1
  431. Documentation/devicetree/bindings/net/adi,adin.yaml +14 −0
  432. Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml +18 −10
  433. Documentation/devicetree/bindings/net/airoha,en8811h.yaml +10 −1
  434. Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml +25 −0
  435. Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml +49 −0
  436. Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml +64 −0
  437. Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml +58 −0
  438. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml +67 −0
  439. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml +66 −0
  440. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml +91 −0
  441. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml +99 −0
  442. Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml +94 −0
  443. Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml +0 −259
  444. Documentation/devicetree/bindings/net/brcm,amac.yaml +2 −0
  445. Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml +100 −17
  446. Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml +30 −2
  447. Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml +1 −1
  448. Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml +161 −0
  449. Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml +3 −0
  450. Documentation/devicetree/bindings/net/ethernet-connector.yaml +56 −0
  451. Documentation/devicetree/bindings/net/ethernet-phy.yaml +18 −0
  452. Documentation/devicetree/bindings/net/micrel,gigabit.yaml +253 −0
  453. Documentation/devicetree/bindings/net/micrel-ksz90x1.txt +0 −228
  454. Documentation/devicetree/bindings/net/micrel.txt +0 −57
  455. Documentation/devicetree/bindings/net/micrel.yaml +131 −0
  456. Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml +14 −1
  457. Documentation/devicetree/bindings/net/mscc,miim.yaml +8 −3
  458. Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml +13 −0
  459. Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml +6 −1
  460. Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml +7 −0
  461. Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml +70 −11
  462. Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +2 −0
  463. Documentation/devicetree/bindings/net/snps,dwmac.yaml +3 −0
  464. Documentation/devicetree/bindings/net/ti,dp83822.yaml +8 −1
  465. Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml +1 −0
  466. Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +0 −9
  467. Documentation/devicetree/bindings/nvmem/google,gs101-otp.yaml +61 −0
  468. Documentation/devicetree/bindings/nvmem/mediatek,efuse.yaml +1 −0
  469. Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +1 −0
  470. Documentation/devicetree/bindings/pci/aspeed,ast2600-pcie.yaml +182 −0
  471. Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +5 −2
  472. Documentation/devicetree/bindings/pci/loongson.yaml +2 −0
  473. Documentation/devicetree/bindings/pci/mbvl,gpex40-pcie.yaml +1 −1
  474. Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +1 −0
  475. Documentation/devicetree/bindings/pci/qcom,pcie-apq8064.yaml +170 −0
  476. Documentation/devicetree/bindings/pci/qcom,pcie-apq8084.yaml +109 −0
  477. Documentation/devicetree/bindings/pci/qcom,pcie-ipq4019.yaml +146 −0
  478. Documentation/devicetree/bindings/pci/qcom,pcie-ipq5018.yaml +189 −0
  479. Documentation/devicetree/bindings/pci/qcom,pcie-ipq6018.yaml +179 −0
  480. Documentation/devicetree/bindings/pci/qcom,pcie-ipq8074.yaml +165 −0
  481. Documentation/devicetree/bindings/pci/qcom,pcie-ipq9574.yaml +183 −0
  482. Documentation/devicetree/bindings/pci/qcom,pcie-msm8996.yaml +156 −0
  483. Documentation/devicetree/bindings/pci/qcom,pcie-qcs404.yaml +131 −0
  484. Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml +0 −168
  485. Documentation/devicetree/bindings/pci/qcom,pcie-sdm845.yaml +190 −0
  486. Documentation/devicetree/bindings/pci/qcom,pcie-sdx55.yaml +172 −0
  487. Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml +1 −0
  488. Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml +6 −1
  489. Documentation/devicetree/bindings/pci/qcom,pcie.yaml +0 −782
  490. Documentation/devicetree/bindings/pci/qcom,sa8255p-pcie-ep.yaml +110 −0
  491. Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml +6 −0
  492. Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml +2 −2
  493. Documentation/devicetree/bindings/phy/apple,atcphy.yaml +222 −0
  494. Documentation/devicetree/bindings/phy/fsl,lynx-28g.yaml +70 −1
  495. Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml +133 −0
  496. Documentation/devicetree/bindings/phy/mediatek,hdmi-phy.yaml +27 −2
  497. Documentation/devicetree/bindings/phy/phy-common-props.yaml +157 −0
  498. Documentation/devicetree/bindings/phy/qcom,edp-phy.yaml +29 −1
  499. Documentation/devicetree/bindings/phy/qcom,m31-eusb2-phy.yaml +7 −3
  500. Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml +111 −0
  501. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +8 −15
  502. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml +6 −0
  503. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml +18 −0
  504. Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml +46 −24
  505. Documentation/devicetree/bindings/phy/qcom,snps-eusb2-repeater.yaml +9 −0
  506. Documentation/devicetree/bindings/phy/renesas,rzg3e-usb3-phy.yaml +8 −1
  507. Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml +14 −1
  508. Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml +3 −0
  509. Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml +51 −0
  510. Documentation/devicetree/bindings/phy/spacemit,k1-combo-phy.yaml +114 −0
  511. Documentation/devicetree/bindings/phy/spacemit,k1-pcie-phy.yaml +71 −0
  512. Documentation/devicetree/bindings/phy/spacemit,usb2-phy.yaml +40 −0
  513. Documentation/devicetree/bindings/phy/ti,control-phy-otghs.yaml +99 −0
  514. Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml +138 −0
  515. Documentation/devicetree/bindings/phy/ti,tcan104x-can.yaml +3 −0
  516. Documentation/devicetree/bindings/phy/ti-phy.txt +0 −98
  517. Documentation/devicetree/bindings/phy/transmit-amplitude.yaml +0 −103
  518. Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +1 −1
  519. Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml +1 −1
  520. Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml +1 −1
  521. Documentation/devicetree/bindings/pinctrl/microchip,mpfs-pinctrl-mssio.yaml +109 −0
  522. Documentation/devicetree/bindings/pinctrl/microchip,sparx5-sgpio.yaml +15 −5
  523. Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml +6 −0
  524. Documentation/devicetree/bindings/pinctrl/qcom,glymur-tlmm.yaml +4 −2
  525. Documentation/devicetree/bindings/pinctrl/renesas,r9a09g077-pinctrl.yaml +13 −0
  526. Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml +1 −0
  527. Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml +1 −0
  528. Documentation/devicetree/bindings/pinctrl/spacemit,k1-pinctrl.yaml +22 −5
  529. Documentation/devicetree/bindings/power/fsl,imx-gpc.yaml +3 −0
  530. Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +1 −1
  531. Documentation/devicetree/bindings/power/reset/syscon-poweroff.yaml +7 −1
  532. Documentation/devicetree/bindings/power/reset/syscon-reboot.yaml +1 −1
  533. Documentation/devicetree/bindings/power/supply/battery.yaml +32 −1
  534. Documentation/devicetree/bindings/power/supply/google,goldfish-battery.yaml +41 −0
  535. Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml +46 −0
  536. Documentation/devicetree/bindings/pwm/nxp,lpc3220-pwm.yaml +4 −0
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  858. Documentation/staging/rpmsg.rst +5 −2
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  860. Documentation/target/index.rst +0 −7
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  862. Documentation/timers/index.rst +0 −7
  863. Documentation/tools/feat.rst +10 −0
  864. Documentation/tools/index.rst +1 −7
  865. Documentation/tools/jobserver.rst +10 −0
  866. Documentation/tools/kabi.rst +13 −0
  867. Documentation/tools/kabi_helpers.rst +11 −0
  868. Documentation/tools/kabi_parser.rst +10 −0
  869. Documentation/tools/kabi_regex.rst +10 −0
  870. Documentation/tools/kabi_symbols.rst +10 −0
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  872. Documentation/tools/kdoc_ancillary.rst +46 −0
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  874. Documentation/tools/kdoc_parser.rst +29 −0
  875. Documentation/tools/python.rst +13 −0
  876. Documentation/tools/rtla/common_timerlat_options.txt +19 −1
  877. Documentation/tools/rtla/index.rst +0 −7
  878. Documentation/tools/rv/index.rst +0 −7
  879. Documentation/trace/coresight/coresight.rst +14 −2
  880. Documentation/trace/events-pci.rst +74 −0
  881. Documentation/trace/fprobe.rst +1 −1
  882. Documentation/trace/ftrace-uses.rst +1 −1
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  884. Documentation/trace/index.rst +1 −7
  885. Documentation/trace/rv/da_monitor_instrumentation.rst +3 −3
  886. Documentation/trace/rv/monitor_synthesis.rst +21 −23
  887. Documentation/translations/it_IT/doc-guide/kernel-doc.rst +4 −4
  888. Documentation/translations/it_IT/process/adding-syscalls.rst +8 −8
  889. Documentation/translations/ja_JP/index.rst +1 −0
  890. Documentation/translations/ja_JP/process/howto.rst +3 −3
  891. Documentation/translations/ja_JP/process/submit-checklist.rst +2 −2
  892. Documentation/translations/ja_JP/process/submitting-patches.rst +56 −0
  893. Documentation/translations/ko_KR/core-api/wrappers/memory-barriers.rst +0 −18
  894. Documentation/translations/ko_KR/index.rst +0 −1
  895. Documentation/translations/ko_KR/memory-barriers.txt +0 −2952
  896. Documentation/translations/sp_SP/process/adding-syscalls.rst +8 −8
  897. Documentation/translations/sp_SP/process/coding-style.rst +1 −1
  898. Documentation/translations/zh_CN/doc-guide/kernel-doc.rst +5 −5
  899. Documentation/translations/zh_CN/kbuild/kbuild.rst +1 −1
  900. Documentation/translations/zh_CN/mm/memory-model.rst +0 −2
  901. Documentation/translations/zh_CN/process/coding-style.rst +1 −1
  902. Documentation/translations/zh_TW/process/coding-style.rst +1 −1
  903. Documentation/usb/gadget-testing.rst +10 −8
  904. Documentation/usb/index.rst +0 −7
  905. Documentation/userspace-api/gpio/index.rst +0 −7
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  907. Documentation/userspace-api/ioctl/ioctl-number.rst +1 −2
  908. Documentation/userspace-api/landlock.rst +93 −12
  909. Documentation/userspace-api/media/conf_nitpick.py +0 −2
  910. Documentation/userspace-api/media/v4l/dev-decoder.rst +4 −1
  911. Documentation/userspace-api/media/v4l/dev-raw-vbi.rst +3 −3
  912. Documentation/userspace-api/media/v4l/dev-subdev.rst +8 −9
  913. Documentation/userspace-api/media/v4l/ext-ctrls-codec-stateless.rst +120 −0
  914. Documentation/userspace-api/media/v4l/ext-ctrls-flash.rst +42 −0
  915. Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst +1 −1
  916. Documentation/userspace-api/media/v4l/pixfmt-compressed.rst +8 −0
  917. Documentation/userspace-api/media/v4l/subdev-formats.rst +1 −1
  918. Documentation/userspace-api/media/v4l/videodev2.h.rst.exceptions +2 −0
  919. Documentation/userspace-api/media/v4l/vidioc-queryctrl.rst +12 −0
  920. Documentation/userspace-api/media/v4l/vidioc-subdev-g-routing.rst +8 −1
  921. Documentation/userspace-api/rseq.rst +140 −0
  922. Documentation/userspace-api/spec_ctrl.rst +8 −4
  923. Documentation/userspace-api/vduse.rst +53 −0
  924. Documentation/virt/index.rst +0 −7
  925. Documentation/virt/kvm/api.rst +148 −9
  926. Documentation/virt/kvm/x86/amd-memory-encryption.rst +52 −2
  927. Documentation/virt/kvm/x86/intel-tdx.rst +1 −1
  928. Documentation/w1/index.rst +0 −7
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  930. Documentation/watchdog/watchdog-kernel-api.rst +1 −1
  931. Documentation/watchdog/watchdog-parameters.rst +0 −7
  932. Documentation/wmi/acpi-interface.rst +68 −0
  933. Documentation/wmi/devices/index.rst +0 −7
  934. Documentation/wmi/devices/lenovo-wmi-other.rst +43 −3
  935. Documentation/wmi/driver-development-guide.rst +53 −23
  936. Documentation/wmi/index.rst +0 −8
  937. MAINTAINERS +474 −130
  938. Makefile +63 −16
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  940. arch/Kconfig +3 −0
  941. arch/alpha/Kconfig +1 −0
  942. arch/alpha/include/asm/page.h +0 −1
  943. arch/alpha/include/asm/pgtable.h +32 −1
  944. arch/alpha/include/asm/tlb.h +3 −3
  945. arch/alpha/include/asm/tlbflush.h +3 −1
  946. arch/alpha/include/uapi/asm/errno.h +2 −0
  947. arch/alpha/kernel/core_marvel.c +2 −2
  948. arch/alpha/kernel/core_titan.c +2 −2
  949. arch/alpha/kernel/module.c +2 −2
  950. arch/alpha/kernel/osf_sys.c +11 −23
  951. arch/alpha/kernel/pci.c +1 −1
  952. arch/alpha/kernel/setup.c +1 −2
  953. arch/alpha/kernel/syscalls/syscall.tbl +1 −0
  954. arch/alpha/mm/Makefile +1 −1
  955. arch/alpha/mm/init.c +7 −9
  956. arch/alpha/mm/tlbflush.c +112 −0
  957. arch/arc/Kconfig +0 −5
  958. arch/arc/Makefile +1 −2
  959. arch/arc/include/asm/page.h +2 −0
  960. arch/arc/include/uapi/asm/swab.h +0 −63
  961. arch/arc/kernel/unwind.c +1 −1
  962. arch/arc/mm/init.c +19 −18
  963. arch/arc/net/bpf_jit_core.c +1 −1
  964. arch/arm/Kconfig +14 −0
  965. arch/arm/boot/dts/allwinner/sun4i-a10-dserve-dsrv9703c.dts +1 −1
  966. arch/arm/boot/dts/allwinner/sun4i-a10-pov-protab2-ips9.dts +1 −1
  967. arch/arm/boot/dts/allwinner/sun5i-a13-utoo-p66.dts +1 −0
  968. arch/arm/boot/dts/allwinner/sun6i-a31-hummingbird.dts +1 −1
  969. arch/arm/boot/dts/allwinner/sun6i-a31s-primo81.dts +1 −1
  970. arch/arm/boot/dts/allwinner/sun8i-t113s.dtsi +33 −0
  971. arch/arm/boot/dts/amlogic/meson.dtsi +0 −5
  972. arch/arm/boot/dts/arm/vexpress-v2m-rs1.dtsi +4 −4
  973. arch/arm/boot/dts/aspeed/Makefile +3 −0
  974. arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dts +3 −4
  975. arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-altrad8.dts +637 −0
  976. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts +1045 −0
  977. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +54 −58
  978. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-clemente.dts +37 −6
  979. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-harma.dts +6 −2
  980. arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts +25 −4
  981. arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-everest.dts +64 −64
  982. arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts +246 −0
  983. arch/arm/boot/dts/aspeed/aspeed-g6.dtsi +1 −11
  984. arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi +32 −32
  985. arch/arm/boot/dts/aspeed/ibm-power10-quad.dtsi +32 −32
  986. arch/arm/boot/dts/broadcom/bcm2711.dtsi +2 −2
  987. arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +5 −1
  988. arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +5 −1
  989. arch/arm/boot/dts/microchip/Makefile +2 −1
  990. arch/arm/boot/dts/microchip/lan966x-pcb8290.dts +1 −0
  991. arch/arm/boot/dts/microchip/lan966x-pcb8385.dts +131 −0
  992. arch/arm/boot/dts/microchip/sama7d65.dtsi +281 −2
  993. arch/arm/boot/dts/microchip/usb_a9g20-dab-mmx.dtsi +0 −93
  994. arch/arm/boot/dts/nuvoton/nuvoton-common-npcm7xx.dtsi +2 −2
  995. arch/arm/boot/dts/nvidia/tegra20.dtsi +4 −0
  996. arch/arm/boot/dts/nvidia/tegra30.dtsi +8 −0
  997. arch/arm/boot/dts/nxp/imx/e60k02.dtsi +34 −1
  998. arch/arm/boot/dts/nxp/imx/imx50-kobo-aura.dts +59 −1
  999. arch/arm/boot/dts/nxp/imx/imx6-logicpd-som.dtsi +5 −1
  1000. arch/arm/boot/dts/nxp/imx/imx6qdl-icore.dtsi +5 −1
  1001. arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-pfla02.dtsi +5 −1
  1002. arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-phycore-som.dtsi +5 −1
  1003. arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi +5 −1
  1004. arch/arm/boot/dts/nxp/imx/imx6qdl-tx6.dtsi +5 −1
  1005. arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +3 −0
  1006. arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts +54 −1
  1007. arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine3.dts +26 −0
  1008. arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +1 −1
  1009. arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clara2e-b.dts +60 −1
  1010. arch/arm/boot/dts/nxp/imx/imx6sll-kobo-clarahd.dts +26 −0
  1011. arch/arm/boot/dts/nxp/imx/imx6sll.dtsi +1 −1
  1012. arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +1 −1
  1013. arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +5 −1
  1014. arch/arm/boot/dts/nxp/imx/imx6ul-isiot.dtsi +5 −1
  1015. arch/arm/boot/dts/nxp/imx/imx6ul-phytec-phycore-som.dtsi +5 −1
  1016. arch/arm/boot/dts/nxp/imx/imx6ul-tx6ul.dtsi +5 −1
  1017. arch/arm/boot/dts/nxp/imx/imx6ull-colibri.dtsi +8 −4
  1018. arch/arm/boot/dts/nxp/imx/imx6ull-engicam-microgea.dtsi +8 −4
  1019. arch/arm/boot/dts/nxp/imx/imx6ull-myir-mys-6ulx.dtsi +5 −1
  1020. arch/arm/boot/dts/nxp/imx/imx6ulz-bsh-smm-m2.dts +5 −1
  1021. arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi +6 −2
  1022. arch/arm/boot/dts/nxp/lpc/lpc3250-ea3250.dts +9 −9
  1023. arch/arm/boot/dts/nxp/lpc/lpc3250-phy3250.dts +4 −4
  1024. arch/arm/boot/dts/nxp/lpc/lpc32xx.dtsi +81 −52
  1025. arch/arm/boot/dts/qcom/qcom-apq8074-dragonboard.dts +0 −13
  1026. arch/arm/boot/dts/qcom/qcom-msm8226.dtsi +2 −2
  1027. arch/arm/boot/dts/qcom/qcom-msm8960-samsung-expressatt.dts +109 −0
  1028. arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +96 −0
  1029. arch/arm/boot/dts/qcom/qcom-msm8974-lge-nexus5-hammerhead.dts +1 −13
  1030. arch/arm/boot/dts/qcom/qcom-msm8974-samsung-hlte.dts +0 −12
  1031. arch/arm/boot/dts/qcom/qcom-msm8974-sony-xperia-rhine.dtsi +0 −12
  1032. arch/arm/boot/dts/qcom/qcom-msm8974.dtsi +47 −3
  1033. arch/arm/boot/dts/qcom/qcom-msm8974pro-fairphone-fp2.dts +0 −8
  1034. arch/arm/boot/dts/qcom/qcom-msm8974pro-htc-m8.dts +0 −11
  1035. arch/arm/boot/dts/qcom/qcom-msm8974pro-oneplus-bacon.dts +0 −9
  1036. arch/arm/boot/dts/qcom/qcom-msm8974pro-samsung-klte-common.dtsi +4 −7
  1037. arch/arm/boot/dts/qcom/qcom-msm8974pro-sony-xperia-shinano-common.dtsi +0 −12
  1038. arch/arm/boot/dts/renesas/gr-peach-audiocamerashield.dtsi +0 −75
  1039. arch/arm/boot/dts/renesas/r8a77xx-aa121td01-panel.dtsi +0 −39
  1040. arch/arm/boot/dts/renesas/r9a06g032.dtsi +165 −0
  1041. arch/arm/boot/dts/rockchip/rk3036.dtsi +0 −3
  1042. arch/arm/boot/dts/rockchip/rk3288.dtsi +16 −1
  1043. arch/arm/boot/dts/samsung/s3c6400.dtsi +0 −38
  1044. arch/arm/boot/dts/st/spear320s.dtsi +0 −24
  1045. arch/arm/boot/dts/st/stm32429i-eval.dts +43 −30
  1046. arch/arm/boot/dts/st/stm32746g-eval.dts +14 −1
  1047. arch/arm/boot/dts/st/stm32f429-disco.dts +13 −2
  1048. arch/arm/boot/dts/st/stm32f469-disco.dts +14 −1
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  1050. arch/arm/boot/dts/st/stm32f769-disco.dts +13 −1
  1051. arch/arm/boot/dts/st/stm32h743i-disco.dts +34 −0
  1052. arch/arm/boot/dts/st/stm32h743i-eval.dts +25 −0
  1053. arch/arm/boot/dts/st/stm32h747i-disco.dts +14 −1
  1054. arch/arm/boot/dts/st/stm32mp135f-dk.dts +14 −1
  1055. arch/arm/boot/dts/st/stm32mp157c-ed1.dts +14 −1
  1056. arch/arm/boot/dts/st/stm32mp157c-ev1.dts +2 −1
  1057. arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi +17 −2
  1058. arch/arm/boot/dts/st/stm32mp15xxab-pinctrl.dtsi +0 −57
  1059. arch/arm/boot/dts/ti/omap/Makefile +0 −1
  1060. arch/arm/boot/dts/ti/omap/am335x-baltos-leds.dtsi +1 −0
  1061. arch/arm/boot/dts/ti/omap/am335x-base0033.dts +0 −92
  1062. arch/arm/boot/dts/ti/omap/am3703.dtsi +0 −14
  1063. arch/arm/boot/dts/ti/omap/am3715.dtsi +0 −10
  1064. arch/arm/boot/dts/ti/omap/dra7-l4.dtsi +0 −1
  1065. arch/arm/boot/dts/ti/omap/omap2430.dtsi +1 −1
  1066. arch/arm/boot/dts/ti/omap/omap3.dtsi +1 −1
  1067. arch/arm/boot/dts/ti/omap/omap3430es1-clocks.dtsi +0 −237
  1068. arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts +5 −0
  1069. arch/arm/boot/dts/ti/omap/omap4-l4-abe.dtsi +1 −1
  1070. arch/arm/boot/dts/ti/omap/omap4-l4.dtsi +1 −1
  1071. arch/arm/boot/dts/ti/omap/omap5-l4.dtsi +1 −1
  1072. arch/arm/boot/dts/tps65910.dtsi +4 −0
  1073. arch/arm/common/locomo.c +3 −3
  1074. arch/arm/common/sa1111.c +2 −2
  1075. arch/arm/common/scoop.c +1 −1
  1076. arch/arm/configs/aspeed_g5_defconfig +1 −1
  1077. arch/arm/configs/imx_v4_v5_defconfig +2 −10
  1078. arch/arm/configs/imx_v6_v7_defconfig +2 −1
  1079. arch/arm/configs/milbeaut_m10v_defconfig +0 −1
  1080. arch/arm/configs/multi_v7_defconfig +34 −19
  1081. arch/arm/configs/neponset_defconfig +1 −1
  1082. arch/arm/configs/omap2plus_defconfig +1 −1
  1083. arch/arm/configs/pxa3xx_defconfig +1 −1
  1084. arch/arm/configs/pxa_defconfig +1 −1
  1085. arch/arm/configs/shmobile_defconfig +1 −1
  1086. arch/arm/crypto/Kconfig +0 −29
  1087. arch/arm/crypto/Makefile +0 −4
  1088. arch/arm/crypto/aes-cipher-glue.c +0 −69
  1089. arch/arm/crypto/aes-cipher.h +0 −13
  1090. arch/arm/crypto/aes-neonbs-glue.c +16 −13
  1091. arch/arm/crypto/ghash-ce-glue.c +9 −5
  1092. arch/arm/crypto/nhpoly1305-neon-glue.c +0 −80
  1093. arch/arm/include/asm/page-nommu.h +0 −1
  1094. arch/arm/include/asm/paravirt.h +0 −22
  1095. arch/arm/include/asm/paravirt_api_clock.h +0 −1
  1096. arch/arm/include/asm/pgtable.h +2 −2
  1097. arch/arm/include/asm/processor.h +2 −1
  1098. arch/arm/include/asm/string.h +9 −2
  1099. arch/arm/include/asm/syscall.h +0 −2
  1100. arch/arm/include/uapi/asm/ptrace.h +0 −9
  1101. arch/arm/kernel/Makefile +0 −1
  1102. arch/arm/kernel/atags_proc.c +1 −1
  1103. arch/arm/kernel/paravirt.c +0 −23
  1104. arch/arm/kernel/signal.c +2 −1
  1105. arch/arm/kernel/smp.c +1 −1
  1106. arch/arm/kernel/sys_oabi-compat.c +1 −1
  1107. arch/arm/kernel/unwind.c +1 −1
  1108. arch/arm/kernel/vdso.c +3 −2
  1109. arch/arm/mach-at91/at91rm9200.c +1 −11
  1110. arch/arm/mach-at91/at91sam9.c +1 −11
  1111. arch/arm/mach-at91/pm.c +2 −5
  1112. arch/arm/mach-at91/sam9x60.c +1 −11
  1113. arch/arm/mach-at91/sam9x7.c +1 −11
  1114. arch/arm/mach-at91/sama5.c +3 −18
  1115. arch/arm/mach-at91/sama7.c +1 −10
  1116. arch/arm/mach-exynos/exynos.c +2 −6
  1117. arch/arm/mach-footbridge/dc21285.c +1 −1
  1118. arch/arm/mach-footbridge/ebsa285.c +1 −1
  1119. arch/arm/mach-footbridge/netwinder-hw.c +1 −1
  1120. arch/arm/mach-imx/mmdc.c +1 −1
  1121. arch/arm/mach-mvebu/board-v7.c +1 −1
  1122. arch/arm/mach-mvebu/coherency.c +1 −1
  1123. arch/arm/mach-mvebu/mvebu-soc-id.c +1 −1
  1124. arch/arm/mach-mxs/mach-mxs.c +1 −1
  1125. arch/arm/mach-npcm/Kconfig +0 −1
  1126. arch/arm/mach-omap1/Kconfig +0 −1
  1127. arch/arm/mach-omap1/dma.c +1 −1
  1128. arch/arm/mach-omap1/mcbsp.c +1 −2
  1129. arch/arm/mach-omap1/timer.c +1 −1
  1130. arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +1 −1
  1131. arch/arm/mach-omap2/control.c +10 −4
  1132. arch/arm/mach-omap2/id.c +1 −1
  1133. arch/arm/mach-omap2/omap-iommu.c +1 −1
  1134. arch/arm/mach-omap2/omap_device.c +2 −2
  1135. arch/arm/mach-omap2/omap_hwmod.c +4 −4
  1136. arch/arm/mach-omap2/pm33xx-core.c +1 −1
  1137. arch/arm/mach-omap2/pm34xx.c +1 −1
  1138. arch/arm/mach-omap2/pm44xx.c +1 −1
  1139. arch/arm/mach-omap2/sr_device.c +1 −1
  1140. arch/arm/mach-orion5x/pci.c +2 −2
  1141. arch/arm/mach-rpc/ecard.c +1 −1
  1142. arch/arm/mach-sa1100/clock.c +2 −2
  1143. arch/arm/mach-sa1100/generic.c +1 −1
  1144. arch/arm/mach-sa1100/neponset.c +1 −1
  1145. arch/arm/mach-shmobile/regulator-quirk-rcar-gen2.c +1 −1
  1146. arch/arm/mach-versatile/spc.c +5 −5
  1147. arch/arm/mach-versatile/versatile.c +1 −1
  1148. arch/arm/mach-zynq/common.c +1 −1
  1149. arch/arm/mm/cache-l2x0-pmu.c +1 −1
  1150. arch/arm/mm/cache-uniphier.c +1 −1
  1151. arch/arm/mm/dma-mapping.c +3 −3
  1152. arch/arm/mm/init.c +4 −21
  1153. arch/arm/mm/mmu.c +1 −9
  1154. arch/arm/mm/nommu.c +1 −9
  1155. arch/arm/mm/pgd.c +1 −1
  1156. arch/arm/mm/physaddr.c +1 −1
  1157. arch/arm/probes/kprobes/test-core.c +2 −3
  1158. arch/arm/probes/uprobes/core.c +2 −2
  1159. arch/arm/tools/syscall.tbl +1 −0
  1160. arch/arm/vdso/vdso.lds.S +1 −0
  1161. arch/arm/vdso/vgettimeofday.c +5 −0
  1162. arch/arm/xen/enlighten.c +2 −2
  1163. arch/arm/xen/p2m.c +1 −1
  1164. arch/arm64/Kbuild +4 −0
  1165. arch/arm64/Kconfig +21 −33
  1166. arch/arm64/Kconfig.platforms +1 −1
  1167. arch/arm64/boot/dts/airoha/en7581-evb.dts +3 −3
  1168. arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +14 −0
  1169. arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +94 −0
  1170. arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts +15 −0
  1171. arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +1 −1
  1172. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +1 −1
  1173. arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts +2 −2
  1174. arch/arm64/boot/dts/amlogic/Makefile +1 −0
  1175. arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi +10 −3
  1176. arch/arm64/boot/dts/amlogic/amlogic-t7-a311d2-an400.dts +1 −1
  1177. arch/arm64/boot/dts/amlogic/meson-a1.dtsi +3 −2
  1178. arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +0 −1
  1179. arch/arm64/boot/dts/amlogic/meson-axg.dtsi +6 −0
  1180. arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +9 −0
  1181. arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts +0 −9
  1182. arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts +0 −9
  1183. arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts +0 −9
  1184. arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts +0 −9
  1185. arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts +0 −9
  1186. arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +8 −0
  1187. arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts +0 −13
  1188. arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi +24 −0
  1189. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-cm4io.dts +0 −1
  1190. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4-mnt-reform2.dts +0 −1
  1191. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi +0 −12
  1192. arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi +0 −13
  1193. arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi +0 −1
  1194. arch/arm64/boot/dts/amlogic/meson-g12b-gsking-x.dts +0 −1
  1195. arch/arm64/boot/dts/amlogic/meson-g12b-gtking-pro.dts +0 −1
  1196. arch/arm64/boot/dts/amlogic/meson-g12b-gtking.dts +0 −1
  1197. arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi +0 −12
  1198. arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts +0 −13
  1199. arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dtsi +0 −1
  1200. arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2l.dts +0 −1
  1201. arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi +0 −12
  1202. arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts +38 −13
  1203. arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi +24 −0
  1204. arch/arm64/boot/dts/amlogic/meson-g12b-ugoos-am6.dts +0 −1
  1205. arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi +0 −12
  1206. arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +7 −0
  1207. arch/arm64/boot/dts/amlogic/meson-gx-libretech-pc.dtsi +0 −1
  1208. arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi +0 −1
  1209. arch/arm64/boot/dts/amlogic/meson-gxbb-kii-pro.dts +0 −1
  1210. arch/arm64/boot/dts/amlogic/meson-gxbb-nanopi-k2.dts +0 −1
  1211. arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts +0 −1
  1212. arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts +0 −1
  1213. arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts +0 −1
  1214. arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts +0 −1
  1215. arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi +0 −1
  1216. arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts +0 −1
  1217. arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts +0 −1
  1218. arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +9 −0
  1219. arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts +0 −1
  1220. arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts +0 −1
  1221. arch/arm64/boot/dts/amlogic/meson-gxl-s805y-xiaomi-aquaman.dts +0 −1
  1222. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts +0 −1
  1223. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc-v2.dts +0 −1
  1224. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +0 −1
  1225. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts +0 −1
  1226. arch/arm64/boot/dts/amlogic/meson-gxl-s905x-vero4k.dts +0 −1
  1227. arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +9 −0
  1228. arch/arm64/boot/dts/amlogic/meson-gxm-khadas-vim2.dts +0 −1
  1229. arch/arm64/boot/dts/amlogic/meson-gxm-mecool-kiii-pro.dts +1 −1
  1230. arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts +0 −1
  1231. arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts +0 −1
  1232. arch/arm64/boot/dts/amlogic/meson-khadas-vim3.dtsi +0 −1
  1233. arch/arm64/boot/dts/amlogic/meson-libretech-cottonwood.dtsi +0 −1
  1234. arch/arm64/boot/dts/amlogic/meson-s4-s805x2-aq222.dts +1 −1
  1235. arch/arm64/boot/dts/amlogic/meson-s4-s905y4-khadas-vim1s.dts +259 −0
  1236. arch/arm64/boot/dts/amlogic/meson-s4.dtsi +11 −2
  1237. arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air-gbit.dts +0 −1
  1238. arch/arm64/boot/dts/amlogic/meson-sm1-a95xf3-air.dts +0 −1
  1239. arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi +0 −8
  1240. arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m2-pro.dts +0 −1
  1241. arch/arm64/boot/dts/amlogic/meson-sm1-bananapi-m5.dts +0 −1
  1242. arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi +0 −8
  1243. arch/arm64/boot/dts/amlogic/meson-sm1-h96-max.dts +0 −1
  1244. arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts +0 −8
  1245. arch/arm64/boot/dts/amlogic/meson-sm1-odroid-hc4.dts +2 −0
  1246. arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi +3 −9
  1247. arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts +0 −9
  1248. arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts +0 −9
  1249. arch/arm64/boot/dts/amlogic/meson-sm1-x96-air-gbit.dts +0 −1
  1250. arch/arm64/boot/dts/amlogic/meson-sm1-x96-air.dts +0 −1
  1251. arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +8 −0
  1252. arch/arm64/boot/dts/apm/apm-merlin.dts +1 −0
  1253. arch/arm64/boot/dts/apm/apm-mustang.dts +1 −0
  1254. arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +10 −10
  1255. arch/arm64/boot/dts/apm/apm-storm.dtsi +2 −2
  1256. arch/arm64/boot/dts/apple/s8001-j98a-j99a.dtsi +4 −0
  1257. arch/arm64/boot/dts/apple/s8001.dtsi +7 −0
  1258. arch/arm64/boot/dts/apple/t6001.dtsi +1 −0
  1259. arch/arm64/boot/dts/apple/t6002-j375d.dts +150 −0
  1260. arch/arm64/boot/dts/apple/t6002.dtsi +1 −0
  1261. arch/arm64/boot/dts/apple/t600x-die0.dtsi +6 −0
  1262. arch/arm64/boot/dts/apple/t600x-dieX.dtsi +212 −0
  1263. arch/arm64/boot/dts/apple/t600x-j314-j316.dtsi +236 −0
  1264. arch/arm64/boot/dts/apple/t600x-j375.dtsi +272 −0
  1265. arch/arm64/boot/dts/apple/t6022-j180d.dts +417 −0
  1266. arch/arm64/boot/dts/apple/t6022-j475d.dts +31 −0
  1267. arch/arm64/boot/dts/apple/t6022-jxxxd.dtsi +133 −0
  1268. arch/arm64/boot/dts/apple/t602x-die0.dtsi +6 −0
  1269. arch/arm64/boot/dts/apple/t602x-dieX.dtsi +212 −0
  1270. arch/arm64/boot/dts/apple/t8103-j274.dts +13 −0
  1271. arch/arm64/boot/dts/apple/t8103-j293.dts +13 −0
  1272. arch/arm64/boot/dts/apple/t8103-j313.dts +13 −0
  1273. arch/arm64/boot/dts/apple/t8103-j456.dts +13 −0
  1274. arch/arm64/boot/dts/apple/t8103-j457.dts +13 −0
  1275. arch/arm64/boot/dts/apple/t8103-jxxx.dtsi +134 −0
  1276. arch/arm64/boot/dts/apple/t8103-pmgr.dtsi +3 −0
  1277. arch/arm64/boot/dts/apple/t8103.dtsi +111 −0
  1278. arch/arm64/boot/dts/apple/t8112-j413.dts +13 −0
  1279. arch/arm64/boot/dts/apple/t8112-j415.dts +13 −0
  1280. arch/arm64/boot/dts/apple/t8112-j473.dts +32 −0
  1281. arch/arm64/boot/dts/apple/t8112-j493.dts +13 −0
  1282. arch/arm64/boot/dts/apple/t8112-jxxx.dtsi +134 −0
  1283. arch/arm64/boot/dts/apple/t8112.dtsi +111 −0
  1284. arch/arm64/boot/dts/arm/morello-fvp.dts +4 −4
  1285. arch/arm64/boot/dts/arm/morello-sdp.dts +7 −0
  1286. arch/arm64/boot/dts/broadcom/bcm2712.dtsi +15 −0
  1287. arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts +0 −3
  1288. arch/arm64/boot/dts/broadcom/northstar2/ns2-clock.dtsi +0 −105
  1289. arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dts +5 −21
  1290. arch/arm64/boot/dts/broadcom/northstar2/ns2-xmc.dts +1 −1
  1291. arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +76 −11
  1292. arch/arm64/boot/dts/broadcom/stingray/bcm958742-base.dtsi +1 −1
  1293. arch/arm64/boot/dts/broadcom/stingray/stingray-clock.dtsi +0 −182
  1294. arch/arm64/boot/dts/broadcom/stingray/stingray-fs4.dtsi +57 −57
  1295. arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi +1 −1
  1296. arch/arm64/boot/dts/broadcom/stingray/stingray-pinctrl.dtsi +1 −1
  1297. arch/arm64/boot/dts/broadcom/stingray/stingray-usb.dtsi +1 −20
  1298. arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +132 −16
  1299. arch/arm64/boot/dts/cavium/Makefile +0 −1
  1300. arch/arm64/boot/dts/cavium/thunder-88xx.dtsi +4 −4
  1301. arch/arm64/boot/dts/cavium/thunder2-99xx.dts +0 −30
  1302. arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi +0 −144
  1303. arch/arm64/boot/dts/cix/Makefile +1 −0
  1304. arch/arm64/boot/dts/cix/sky1-xcp.dts +83 −0
  1305. arch/arm64/boot/dts/cix/sky1.dtsi +1 −1
  1306. arch/arm64/boot/dts/exynos/exynosautov920.dtsi +11 −0
  1307. arch/arm64/boot/dts/exynos/google/gs101.dtsi +41 −1
  1308. arch/arm64/boot/dts/freescale/Makefile +46 −2
  1309. arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +1 −1
  1310. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a-mbls1028a-ind.dts +68 −0
  1311. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a-mbls1028a.dts +118 −0
  1312. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a-mbls1028a.dtsi +287 −0
  1313. arch/arm64/boot/dts/freescale/fsl-ls1028a-tqmls1028a.dtsi +124 −0
  1314. arch/arm64/boot/dts/freescale/fsl-ls1046a-tqmls1046a.dtsi +12 −0
  1315. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +3 −3
  1316. arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts +2 −2
  1317. arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 −1
  1318. arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +1 −1
  1319. arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +16 −16
  1320. arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi +4 −0
  1321. arch/arm64/boot/dts/freescale/imx8-ss-ddr.dtsi +1 −1
  1322. arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi +22 −0
  1323. arch/arm64/boot/dts/freescale/imx8dxl.dtsi +7 −0
  1324. arch/arm64/boot/dts/freescale/imx8mm-phycore-rpmsg.dtso +1 −1
  1325. arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi +1 −0
  1326. arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml-mba8mx.dts +7 −6
  1327. arch/arm64/boot/dts/freescale/imx8mm-tqma8mqml.dtsi +22 −17
  1328. arch/arm64/boot/dts/freescale/imx8mm-venice-gw71xx.dtsi +15 −0
  1329. arch/arm64/boot/dts/freescale/imx8mm.dtsi +1 −1
  1330. arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl-mba8mx.dts +15 −14
  1331. arch/arm64/boot/dts/freescale/imx8mn-tqma8mqnl.dtsi +22 −15
  1332. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-common.dtsi +396 −0
  1333. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-ksz8794-common.dtsi +98 −0
  1334. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-ksz8794.dtso +24 −0
  1335. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1-overlay-ksz9031.dtso +48 −0
  1336. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v1.dts +258 −0
  1337. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v2-overlay-adin1300.dtso +60 −0
  1338. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v2-overlay-ksz8794.dtso +24 −0
  1339. arch/arm64/boot/dts/freescale/imx8mn-vhip4-evalboard-v2.dts +221 −0
  1340. arch/arm64/boot/dts/freescale/imx8mn.dtsi +5 −0
  1341. arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts +129 −19
  1342. arch/arm64/boot/dts/freescale/imx8mp-edm-g-wb.dts +1 −1
  1343. arch/arm64/boot/dts/freescale/imx8mp-evk.dts +93 −30
  1344. arch/arm64/boot/dts/freescale/imx8mp-frdm.dts +355 −0
  1345. arch/arm64/boot/dts/freescale/imx8mp-hummingboard-pulse-common.dtsi +1 −1
  1346. arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-etml1010g3dra.dtso +1 −1
  1347. arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtsi +196 −0
  1348. arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-peb-av-10.dtso +9 −0
  1349. arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc-lvds-ph128800t006-zhc01.dtso +44 −0
  1350. arch/arm64/boot/dts/freescale/imx8mp-libra-rdk-fpsc.dts +3 −3
  1351. arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-peb-wlbt-05.dtso +108 −0
  1352. arch/arm64/boot/dts/freescale/imx8mp-phyboard-pollux-rdk.dts +32 −1
  1353. arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +8 −0
  1354. arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi +3 −3
  1355. arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc-dev.dts +4 −0
  1356. arch/arm64/boot/dts/freescale/imx8mp-toradex-smarc.dtsi +3 −3
  1357. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mp-ras314.dts +19 −4
  1358. arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql-mba8mpxl.dts +24 −7
  1359. arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts +145 −0
  1360. arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi +210 −121
  1361. arch/arm64/boot/dts/freescale/imx8mp-venice-gw71xx.dtsi +15 −0
  1362. arch/arm64/boot/dts/freescale/imx8mp-verdin-dahlia.dtsi +4 −0
  1363. arch/arm64/boot/dts/freescale/imx8mp-verdin-dev.dtsi +4 −0
  1364. arch/arm64/boot/dts/freescale/imx8mp-verdin-mallow.dtsi +4 −0
  1365. arch/arm64/boot/dts/freescale/imx8mp-verdin-yavia.dtsi +4 −0
  1366. arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +0 −4
  1367. arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts +1 −1
  1368. arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +57 −16
  1369. arch/arm64/boot/dts/freescale/imx8qm-mek.dts +6 −6
  1370. arch/arm64/boot/dts/freescale/imx8qm-ss-ddr.dtsi +19 −0
  1371. arch/arm64/boot/dts/freescale/imx8qm.dtsi +6 −4
  1372. arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval-v1.2.dts +26 −0
  1373. arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-eval.dts +16 −0
  1374. arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.1.dts +16 −0
  1375. arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1-ixora-v1.2.dts +16 −0
  1376. arch/arm64/boot/dts/freescale/imx8qp-apalis-v1.1.dtsi +16 −0
  1377. arch/arm64/boot/dts/freescale/imx8qp.dtsi +24 −0
  1378. arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +35 −3
  1379. arch/arm64/boot/dts/freescale/imx8ulp.dtsi +17 −0
  1380. arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi +29 −2
  1381. arch/arm64/boot/dts/freescale/imx91-11x11-evk.dts +180 −1
  1382. arch/arm64/boot/dts/freescale/imx91-11x11-frdm.dts +906 −0
  1383. arch/arm64/boot/dts/freescale/imx91.dtsi +58 −0
  1384. arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts +8 −9
  1385. arch/arm64/boot/dts/freescale/imx93-11x11-frdm.dts +807 −0
  1386. arch/arm64/boot/dts/freescale/imx93-14x14-evk.dts +74 −0
  1387. arch/arm64/boot/dts/freescale/imx93-9x9-qsb-can1.dtso +63 −0
  1388. arch/arm64/boot/dts/freescale/imx93-var-som-symphony.dts +84 −0
  1389. arch/arm64/boot/dts/freescale/imx93-var-som.dtsi +2 −2
  1390. arch/arm64/boot/dts/freescale/imx94.dtsi +171 −1
  1391. arch/arm64/boot/dts/freescale/imx943-evk.dts +178 −0
  1392. arch/arm64/boot/dts/freescale/imx95-15x15-evk.dts +8 −9
  1393. arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts +964 −0
  1394. arch/arm64/boot/dts/freescale/imx95-clock.h +1 −0
  1395. arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi +1 −1
  1396. arch/arm64/boot/dts/freescale/imx95-tqma9596sa.dtsi +1 −1
  1397. arch/arm64/boot/dts/freescale/imx95.dtsi +1 −1
  1398. arch/arm64/boot/dts/freescale/imx952-clock.h +215 −0
  1399. arch/arm64/boot/dts/freescale/imx952-evk.dts +596 −0
  1400. arch/arm64/boot/dts/freescale/imx952-pinfunc.h +867 −0
  1401. arch/arm64/boot/dts/freescale/imx952-power.h +44 −0
  1402. arch/arm64/boot/dts/freescale/imx952.dtsi +1266 −0
  1403. arch/arm64/boot/dts/freescale/mba8xx.dtsi +2 −2
  1404. arch/arm64/boot/dts/freescale/s32g3.dtsi +2 −2
  1405. arch/arm64/boot/dts/freescale/s32gxxxa-evb.dtsi +10 −10
  1406. arch/arm64/boot/dts/freescale/s32gxxxa-rdb.dtsi +10 −10
  1407. arch/arm64/boot/dts/freescale/tqma8xxs-mb-smarc-2.dtsi +11 −1
  1408. arch/arm64/boot/dts/freescale/tqma8xxs.dtsi +12 −4
  1409. arch/arm64/boot/dts/intel/Makefile +2 −0
  1410. arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +72 −58
  1411. arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts +109 −0
  1412. arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts +1 −1
  1413. arch/arm64/boot/dts/intel/socfpga_agilex_socdk_emmc.dts +105 −0
  1414. arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts +2 −2
  1415. arch/arm64/boot/dts/lg/lg131x.dtsi +1 −1
  1416. arch/arm64/boot/dts/marvell/Makefile +1 −0
  1417. arch/arm64/boot/dts/marvell/armada-3720-db.dts +1 −0
  1418. arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +1 −1
  1419. arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +2 −7
  1420. arch/arm64/boot/dts/marvell/armada-37xx.dtsi +2 −1
  1421. arch/arm64/boot/dts/marvell/armada-7020-comexpress.dtsi +161 −0
  1422. arch/arm64/boot/dts/marvell/armada-70x0.dtsi +7 −0
  1423. arch/arm64/boot/dts/marvell/armada-8040-db.dts +2 −0
  1424. arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi +2 −2
  1425. arch/arm64/boot/dts/marvell/armada-cp11x.dtsi +2 −1
  1426. arch/arm64/boot/dts/marvell/cn9130-cf-base.dts +1 −1
  1427. arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +2 −1
  1428. arch/arm64/boot/dts/marvell/cn9130-db.dtsi +2 −2
  1429. arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts +2 −0
  1430. arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi +2 −1
  1431. arch/arm64/boot/dts/marvell/cn9131-db.dtsi +1 −0
  1432. arch/arm64/boot/dts/marvell/cn9132-db.dtsi +2 −1
  1433. arch/arm64/boot/dts/marvell/db-falcon-carrier-a7k.dts +27 −0
  1434. arch/arm64/boot/dts/marvell/db-falcon-carrier.dtsi +22 −0
  1435. arch/arm64/boot/dts/mediatek/Makefile +2 −0
  1436. arch/arm64/boot/dts/mediatek/mt6331.dtsi +1 −1
  1437. arch/arm64/boot/dts/mediatek/mt6795-sony-xperia-m5.dts +47 −3
  1438. arch/arm64/boot/dts/mediatek/mt6795.dtsi +1 −2
  1439. arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts +127 −2
  1440. arch/arm64/boot/dts/mediatek/mt7981b.dtsi +218 −2
  1441. arch/arm64/boot/dts/mediatek/mt7986a.dtsi +1 −1
  1442. arch/arm64/boot/dts/mediatek/mt7988a.dtsi +14 −14
  1443. arch/arm64/boot/dts/mediatek/mt8173-elm-hana.dtsi +16 −18
  1444. arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi +80 −87
  1445. arch/arm64/boot/dts/mediatek/mt8173-evb.dts +37 −31
  1446. arch/arm64/boot/dts/mediatek/mt8173.dtsi +14 −14
  1447. arch/arm64/boot/dts/mediatek/mt8183-evb.dts +18 −18
  1448. arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-pico6.dts +1 −1
  1449. arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +3 −3
  1450. arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts +8 −8
  1451. arch/arm64/boot/dts/mediatek/mt8183.dtsi +31 −6
  1452. arch/arm64/boot/dts/mediatek/mt8186-evb.dts +13 −0
  1453. arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi +0 −1
  1454. arch/arm64/boot/dts/mediatek/mt8188.dtsi +85 −3
  1455. arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +0 −1
  1456. arch/arm64/boot/dts/mediatek/mt8192.dtsi +1 −1
  1457. arch/arm64/boot/dts/mediatek/mt8195.dtsi +85 −0
  1458. arch/arm64/boot/dts/mediatek/mt8370-tungsten-smarc.dts +14 −0
  1459. arch/arm64/boot/dts/mediatek/mt8390-genio-common.dtsi +150 −0
  1460. arch/arm64/boot/dts/mediatek/mt8390-tungsten-smarc.dts +22 −0
  1461. arch/arm64/boot/dts/mediatek/mt8390-tungsten-smarc.dtsi +1489 −0
  1462. arch/arm64/boot/dts/mediatek/mt8395-genio-common.dtsi +150 −0
  1463. arch/arm64/boot/dts/mediatek/mt8395-radxa-nio-12l.dts +150 −0
  1464. arch/arm64/boot/dts/nuvoton/nuvoton-npcm845-evb.dts +1 −0
  1465. arch/arm64/boot/dts/nuvoton/nuvoton-npcm845.dtsi +2 −2
  1466. arch/arm64/boot/dts/nvidia/tegra186.dtsi +0 −2
  1467. arch/arm64/boot/dts/nvidia/tegra194.dtsi +0 −15
  1468. arch/arm64/boot/dts/nvidia/tegra210-smaug.dts +25 −0
  1469. arch/arm64/boot/dts/nvidia/tegra210.dtsi +0 −24
  1470. arch/arm64/boot/dts/nvidia/tegra234.dtsi +0 −15
  1471. arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi +8 −0
  1472. arch/arm64/boot/dts/nvidia/tegra264.dtsi +50 −14
  1473. arch/arm64/boot/dts/qcom/Makefile +30 −0
  1474. arch/arm64/boot/dts/qcom/agatti.dtsi +99 −2
  1475. arch/arm64/boot/dts/qcom/glymur-ipcc.h +68 −0
  1476. arch/arm64/boot/dts/qcom/hamoa-iot-evk.dts +272 −1
  1477. arch/arm64/boot/dts/qcom/hamoa-iot-som.dtsi +74 −6
  1478. arch/arm64/boot/dts/qcom/hamoa.dtsi +90 −24
  1479. arch/arm64/boot/dts/qcom/ipq5018.dtsi +7 −3
  1480. arch/arm64/boot/dts/qcom/ipq9574.dtsi +8 −2
  1481. arch/arm64/boot/dts/qcom/kaanapali-ipcc.h +58 −0
  1482. arch/arm64/boot/dts/qcom/kaanapali-mtp.dts +754 −0
  1483. arch/arm64/boot/dts/qcom/kaanapali-qrd.dts +712 −0
  1484. arch/arm64/boot/dts/qcom/kaanapali.dtsi +1606 −0
  1485. arch/arm64/boot/dts/qcom/kodiak.dtsi +14 −1
  1486. arch/arm64/boot/dts/qcom/lemans-el2.dtso +35 −0
  1487. arch/arm64/boot/dts/qcom/lemans-evk.dts +125 −2
  1488. arch/arm64/boot/dts/qcom/lemans-ride-common.dtsi +8 −0
  1489. arch/arm64/boot/dts/qcom/lemans.dtsi +406 −80
  1490. arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts +790 −0
  1491. arch/arm64/boot/dts/qcom/milos.dtsi +2633 −0
  1492. arch/arm64/boot/dts/qcom/monaco-evk.dts +106 −0
  1493. arch/arm64/boot/dts/qcom/monaco.dtsi +1504 −19
  1494. arch/arm64/boot/dts/qcom/msm8916.dtsi +4 −4
  1495. arch/arm64/boot/dts/qcom/msm8917.dtsi +6 −6
  1496. arch/arm64/boot/dts/qcom/msm8937.dtsi +7 −6
  1497. arch/arm64/boot/dts/qcom/msm8939-asus-z00t.dts +78 −1
  1498. arch/arm64/boot/dts/qcom/msm8939-pm8916.dtsi +4 −0
  1499. arch/arm64/boot/dts/qcom/msm8939.dtsi +146 −0
  1500. arch/arm64/boot/dts/qcom/msm8953.dtsi +286 −230
  1501. arch/arm64/boot/dts/qcom/msm8976.dtsi +2 −2
  1502. arch/arm64/boot/dts/qcom/msm8992-lg-bullhead.dtsi +1 −1
  1503. arch/arm64/boot/dts/qcom/msm8994-huawei-angler-rev-101.dts +1 −1
  1504. arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi +1 −1
  1505. arch/arm64/boot/dts/qcom/msm8998.dtsi +8 −8
  1506. arch/arm64/boot/dts/qcom/pm7550.dtsi +67 −0
  1507. arch/arm64/boot/dts/qcom/pm8550vs.dtsi +8 −0
  1508. arch/arm64/boot/dts/qcom/pmiv0104.dtsi +73 −0
  1509. arch/arm64/boot/dts/qcom/qcs615-ride.dts +30 −0
  1510. arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +128 −0
  1511. arch/arm64/boot/dts/qcom/qcs6490-thundercomm-rubikpi3.dts +1410 −0
  1512. arch/arm64/boot/dts/qcom/qcs8300-ride.dts +126 −0
  1513. arch/arm64/boot/dts/qcom/qcs8550-aim300.dtsi +16 −0
  1514. arch/arm64/boot/dts/qcom/qdu1000.dtsi +1 −1
  1515. arch/arm64/boot/dts/qcom/qrb2210-arduino-imola.dts +459 −0
  1516. arch/arm64/boot/dts/qcom/qrb2210-rb1-vision-mezzanine.dtso +66 −0
  1517. arch/arm64/boot/dts/qcom/qrb2210-rb1.dts +75 −0
  1518. arch/arm64/boot/dts/qcom/qrb4210-rb2.dts +1 −1
  1519. arch/arm64/boot/dts/qcom/sc7280-chrome-common.dtsi +5 −0
  1520. arch/arm64/boot/dts/qcom/sc8280xp.dtsi +14 −6
  1521. arch/arm64/boot/dts/qcom/sdm630.dtsi +129 −17
  1522. arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +57 −0
  1523. arch/arm64/boot/dts/qcom/sdm636.dtsi +14 −9
  1524. arch/arm64/boot/dts/qcom/sdm660.dtsi +162 −1
  1525. arch/arm64/boot/dts/qcom/sdm670.dtsi +1 −1
  1526. arch/arm64/boot/dts/qcom/sdm845-db845c.dts +7 −1
  1527. arch/arm64/boot/dts/qcom/sdm845-google-blueline.dts +89 −0
  1528. arch/arm64/boot/dts/qcom/sdm845-google-common.dtsi +536 −0
  1529. arch/arm64/boot/dts/qcom/sdm845-google-crosshatch.dts +36 −0
  1530. arch/arm64/boot/dts/qcom/sdm845-oneplus-common.dtsi +35 −10
  1531. arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts +10 −4
  1532. arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dts +4 −0
  1533. arch/arm64/boot/dts/qcom/sdm845-samsung-starqltechn.dts +9 −6
  1534. arch/arm64/boot/dts/qcom/sdm845-shift-axolotl.dts +15 −8
  1535. arch/arm64/boot/dts/qcom/sdm845-xiaomi-beryllium-common.dtsi +37 −12
  1536. arch/arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts +11 −6
  1537. arch/arm64/boot/dts/qcom/sdm850-huawei-matebook-e-2019.dts +3 −14
  1538. arch/arm64/boot/dts/qcom/sm6115.dtsi +8 −4
  1539. arch/arm64/boot/dts/qcom/sm6125-xiaomi-ginkgo.dts +1 −1
  1540. arch/arm64/boot/dts/qcom/sm6125.dtsi +6 −6
  1541. arch/arm64/boot/dts/qcom/sm6350-sony-xperia-lena-pdx213.dts +1 −1
  1542. arch/arm64/boot/dts/qcom/sm6350.dtsi +3 −0
  1543. arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +69 −3
  1544. arch/arm64/boot/dts/qcom/sm8150-hdk.dts +4 −0
  1545. arch/arm64/boot/dts/qcom/sm8150-mtp.dts +4 −0
  1546. arch/arm64/boot/dts/qcom/sm8150.dtsi +10 −1
  1547. arch/arm64/boot/dts/qcom/sm8250-hdk.dts +4 −0
  1548. arch/arm64/boot/dts/qcom/sm8550-hdk-rear-camera-card.dtso +3 −4
  1549. arch/arm64/boot/dts/qcom/sm8550-hdk.dts +16 −0
  1550. arch/arm64/boot/dts/qcom/sm8550-mtp.dts +16 −0
  1551. arch/arm64/boot/dts/qcom/sm8550-qrd.dts +19 −4
  1552. arch/arm64/boot/dts/qcom/sm8550-samsung-q5q.dts +16 −0
  1553. arch/arm64/boot/dts/qcom/sm8550-sony-xperia-yodo-pdx234.dts +16 −0
  1554. arch/arm64/boot/dts/qcom/sm8550.dtsi +0 −2
  1555. arch/arm64/boot/dts/qcom/sm8650-hdk-rear-camera-card.dtso +88 −0
  1556. arch/arm64/boot/dts/qcom/sm8650-hdk.dts +16 −0
  1557. arch/arm64/boot/dts/qcom/sm8650-mtp.dts +16 −0
  1558. arch/arm64/boot/dts/qcom/sm8650-qrd.dts +59 −0
  1559. arch/arm64/boot/dts/qcom/sm8650.dtsi +299 −3
  1560. arch/arm64/boot/dts/qcom/sm8750-mtp.dts +32 −1
  1561. arch/arm64/boot/dts/qcom/sm8750-qrd.dts +27 −0
  1562. arch/arm64/boot/dts/qcom/sm8750.dtsi +1415 −148
  1563. arch/arm64/boot/dts/qcom/talos.dtsi +289 −165
  1564. arch/arm64/boot/dts/qcom/x1-el2.dtso +4 −0
  1565. arch/arm64/boot/dts/qcom/x1-microsoft-denali.dtsi +1322 −0
  1566. arch/arm64/boot/dts/qcom/x1e001de-devkit.dts +15 −9
  1567. arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dtsi +144 −9
  1568. arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +396 −14
  1569. arch/arm64/boot/dts/qcom/x1e80100-asus-zenbook-a14.dts +3 −0
  1570. arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts +8 −6
  1571. arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +5 −3
  1572. arch/arm64/boot/dts/qcom/x1e80100-medion-sprchrgd-14-s1.dts +1515 −0
  1573. arch/arm64/boot/dts/qcom/x1e80100-microsoft-denali-oled.dts +19 −0
  1574. arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi +13 −6
  1575. arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +12 −9
  1576. arch/arm64/boot/dts/qcom/x1p42100-lenovo-thinkbook-16.dts +90 −0
  1577. arch/arm64/boot/dts/qcom/x1p64100-microsoft-denali.dts +15 −0
  1578. arch/arm64/boot/dts/realtek/Makefile +3 −4
  1579. arch/arm64/boot/dts/realtek/kent.dtsi +166 −0
  1580. arch/arm64/boot/dts/realtek/rtd1501.dtsi +12 −0
  1581. arch/arm64/boot/dts/realtek/rtd1501s-phantom-8gb.dts +25 −0
  1582. arch/arm64/boot/dts/realtek/rtd1501s-phantom.dtsi +118 −0
  1583. arch/arm64/boot/dts/realtek/rtd1861.dtsi +12 −0
  1584. arch/arm64/boot/dts/realtek/rtd1861b-krypton-8gb.dts +25 −0
  1585. arch/arm64/boot/dts/realtek/rtd1861b-krypton.dtsi +72 −0
  1586. arch/arm64/boot/dts/realtek/rtd1920.dtsi +12 −0
  1587. arch/arm64/boot/dts/realtek/rtd1920s-smallville-4gb.dts +23 −0
  1588. arch/arm64/boot/dts/realtek/rtd1920s-smallville.dtsi +128 −0
  1589. arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +1 −1
  1590. arch/arm64/boot/dts/renesas/condor-common.dtsi +7 −2
  1591. arch/arm64/boot/dts/renesas/draak.dtsi +1 −1
  1592. arch/arm64/boot/dts/renesas/ebisu.dtsi +1 −1
  1593. arch/arm64/boot/dts/renesas/gmsl-cameras.dtsi +0 −332
  1594. arch/arm64/boot/dts/renesas/hihope-rev4.dtsi +1 −1
  1595. arch/arm64/boot/dts/renesas/r8a774a1.dtsi +26 −26
  1596. arch/arm64/boot/dts/renesas/r8a774b1.dtsi +26 −26
  1597. arch/arm64/boot/dts/renesas/r8a774e1.dtsi +26 −26
  1598. arch/arm64/boot/dts/renesas/r8a77951.dtsi +26 −26
  1599. arch/arm64/boot/dts/renesas/r8a77960.dtsi +26 −26
  1600. arch/arm64/boot/dts/renesas/r8a77961.dtsi +26 −26
  1601. arch/arm64/boot/dts/renesas/r8a77965.dtsi +26 −26
  1602. arch/arm64/boot/dts/renesas/r8a77970-eagle.dts +2 −2
  1603. arch/arm64/boot/dts/renesas/r8a77970-v3msk.dts +2 −2
  1604. arch/arm64/boot/dts/renesas/r8a77970.dtsi +32 −0
  1605. arch/arm64/boot/dts/renesas/r8a77980-v3hsk.dts +7 −2
  1606. arch/arm64/boot/dts/renesas/r8a77980.dtsi +89 −0
  1607. arch/arm64/boot/dts/renesas/r8a779a0.dtsi +160 −0
  1608. arch/arm64/boot/dts/renesas/r8a779f0.dtsi +160 −0
  1609. arch/arm64/boot/dts/renesas/r8a779g0.dtsi +112 −0
  1610. arch/arm64/boot/dts/renesas/r8a779h0.dtsi +112 −0
  1611. arch/arm64/boot/dts/renesas/r8a779m0.dtsi +0 −12
  1612. arch/arm64/boot/dts/renesas/r8a779m2.dtsi +0 −12
  1613. arch/arm64/boot/dts/renesas/r8a779m4.dtsi +0 −12
  1614. arch/arm64/boot/dts/renesas/r8a779m6.dtsi +0 −12
  1615. arch/arm64/boot/dts/renesas/r8a779m7.dtsi +0 −12
  1616. arch/arm64/boot/dts/renesas/r8a779m8.dtsi +0 −17
  1617. arch/arm64/boot/dts/renesas/r8a779mb.dtsi +0 −12
  1618. arch/arm64/boot/dts/renesas/r9a07g044.dtsi +1 −1
  1619. arch/arm64/boot/dts/renesas/r9a07g044c1.dtsi +0 −25
  1620. arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi +0 −18
  1621. arch/arm64/boot/dts/renesas/r9a07g054.dtsi +1 −1
  1622. arch/arm64/boot/dts/renesas/r9a07g054l1.dtsi +0 −18
  1623. arch/arm64/boot/dts/renesas/r9a08g045.dtsi +65 −0
  1624. arch/arm64/boot/dts/renesas/r9a09g047.dtsi +250 −0
  1625. arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi +0 −18
  1626. arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts +74 −1
  1627. arch/arm64/boot/dts/renesas/r9a09g056.dtsi +794 −0
  1628. arch/arm64/boot/dts/renesas/r9a09g056n48-rzv2n-evk.dts +97 −0
  1629. arch/arm64/boot/dts/renesas/r9a09g057.dtsi +429 −0
  1630. arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts +102 −1
  1631. arch/arm64/boot/dts/renesas/r9a09g057h48-kakip.dts +40 −1
  1632. arch/arm64/boot/dts/renesas/r9a09g077.dtsi +334 −0
  1633. arch/arm64/boot/dts/renesas/r9a09g077m44-rzt2h-evk.dts +85 −27
  1634. arch/arm64/boot/dts/renesas/r9a09g087.dtsi +334 −0
  1635. arch/arm64/boot/dts/renesas/r9a09g087m44-rzn2h-evk.dts +126 −63
  1636. arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi +15 −6
  1637. arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +18 −0
  1638. arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +5 −0
  1639. arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi +11 −0
  1640. arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi +81 −80
  1641. arch/arm64/boot/dts/renesas/salvator-common.dtsi +2 −2
  1642. arch/arm64/boot/dts/renesas/ulcb.dtsi +1 −1
  1643. arch/arm64/boot/dts/rockchip/Makefile +15 −0
  1644. arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts +1 −1
  1645. arch/arm64/boot/dts/rockchip/rk3326-odroid-go3.dts +2 −1
  1646. arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dtso +170 −0
  1647. arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +28 −10
  1648. arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi +24 −3
  1649. arch/arm64/boot/dts/rockchip/rk3368.dtsi +51 −0
  1650. arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts +0 −2
  1651. arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi +0 −1
  1652. arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts +0 −5
  1653. arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts +48 −3
  1654. arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +1 −1
  1655. arch/arm64/boot/dts/rockchip/rk3399-roc-pc-plus.dts +4 −0
  1656. arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dtsi +0 −1
  1657. arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts +10 −2
  1658. arch/arm64/boot/dts/rockchip/rk3399-rock-4se.dts +12 −0
  1659. arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +8 −0
  1660. arch/arm64/boot/dts/rockchip/rk3399-rockpro64-v2.dts +7 −0
  1661. arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts +7 −0
  1662. arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts +18 −0
  1663. arch/arm64/boot/dts/rockchip/rk3566-pinenote.dtsi +49 −0
  1664. arch/arm64/boot/dts/rockchip/rk3566-qnap-ts133.dts +71 −0
  1665. arch/arm64/boot/dts/rockchip/rk3566-rock-3c.dts +1 −0
  1666. arch/arm64/boot/dts/rockchip/rk3568-anbernic-rg-ds.dts +1237 −0
  1667. arch/arm64/boot/dts/rockchip/rk3568-qnap-ts233.dts +15 −3
  1668. arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts +15 −3
  1669. arch/arm64/boot/dts/rockchip/rk3568-qnap-tsx33.dtsi +7 −14
  1670. arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3i.dtsi +9 −1
  1671. arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3j-rpi-cm4.dts +204 −0
  1672. arch/arm64/boot/dts/rockchip/rk3568-radxa-cm3j.dtsi +558 −0
  1673. arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +8 −0
  1674. arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts +8 −0
  1675. arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display-vz.dtso +1 −2
  1676. arch/arm64/boot/dts/rockchip/rk3568.dtsi +2 −2
  1677. arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +1 −1
  1678. arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts +7 −12
  1679. arch/arm64/boot/dts/rockchip/rk3576-evb1-v10-pcie1.dtso +31 −0
  1680. arch/arm64/boot/dts/rockchip/rk3576-evb1-v10.dts +129 −0
  1681. arch/arm64/boot/dts/rockchip/rk3576-luckfox-core3576.dtsi +8 −0
  1682. arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts +41 −5
  1683. arch/arm64/boot/dts/rockchip/rk3576-nanopi-r76s.dts +22 −1
  1684. arch/arm64/boot/dts/rockchip/rk3576-pinctrl.dtsi +7 −0
  1685. arch/arm64/boot/dts/rockchip/rk3576-rock-4d.dts +14 −0
  1686. arch/arm64/boot/dts/rockchip/rk3576.dtsi +42 −2
  1687. arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +78 −4
  1688. arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +5 −2
  1689. arch/arm64/boot/dts/rockchip/rk3588-extra.dtsi +3 −3
  1690. arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588-nas.dts +38 −0
  1691. arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi +34 −1
  1692. arch/arm64/boot/dts/rockchip/rk3588-jaguar.dts +34 −1
  1693. arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi +35 −1
  1694. arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +23 −0
  1695. arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts +10 −0
  1696. arch/arm64/boot/dts/rockchip/rk3588-rock-5t.dts +10 −0
  1697. arch/arm64/boot/dts/rockchip/rk3588-tiger.dtsi +34 −1
  1698. arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi +34 −1
  1699. arch/arm64/boot/dts/rockchip/rk3588s-gameforce-ace.dts +63 −0
  1700. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5-base.dts +355 −0
  1701. arch/arm64/boot/dts/rockchip/rk3588s-orangepi-cm5.dtsi +472 −0
  1702. arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-io.dts +339 −0
  1703. arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5.dtsi +280 −0
  1704. arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts +1 −0
  1705. arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +1 −0
  1706. arch/arm64/boot/dts/sprd/sc9860.dtsi +4 −3
  1707. arch/arm64/boot/dts/sprd/sc9863a.dtsi +2 −2
  1708. arch/arm64/boot/dts/sprd/sharkl64.dtsi +1 −1
  1709. arch/arm64/boot/dts/sprd/whale2.dtsi +4 −4
  1710. arch/arm64/boot/dts/st/stm32mp21xc.dtsi +0 −8
  1711. arch/arm64/boot/dts/st/stm32mp231.dtsi +17 −2
  1712. arch/arm64/boot/dts/st/stm32mp235f-dk.dts +19 −2
  1713. arch/arm64/boot/dts/st/stm32mp23xc.dtsi +0 −8
  1714. arch/arm64/boot/dts/st/stm32mp251.dtsi +28 −2
  1715. arch/arm64/boot/dts/st/stm32mp257f-dk.dts +26 −2
  1716. arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +38 −1
  1717. arch/arm64/boot/dts/st/stm32mp25xc.dtsi +0 −8
  1718. arch/arm64/boot/dts/st/stm32mp25xxal-pinctrl.dtsi +0 −71
  1719. arch/arm64/boot/dts/ti/k3-am62-phycore-som.dtsi +8 −0
  1720. arch/arm64/boot/dts/ti/k3-am62a-phycore-som.dtsi +8 −0
  1721. arch/arm64/boot/dts/ti/k3-am62d2-evm.dts +1 −1
  1722. arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +17 −0
  1723. arch/arm64/boot/dts/ti/k3-am62p-verdin.dtsi +2 −2
  1724. arch/arm64/boot/dts/ti/k3-am62p.dtsi +1 −0
  1725. arch/arm64/boot/dts/ti/k3-am62p5-sk.dts +1 −1
  1726. arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts +2 −2
  1727. arch/arm64/boot/dts/ti/k3-am64-main.dtsi +9 −9
  1728. arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts +3 −3
  1729. arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-x27-gpio1-spi1-uart3.dtso +2 −2
  1730. arch/arm64/boot/dts/ti/k3-am65-iot2050-arduino-connector.dtsi +29 −29
  1731. arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi +1 −1
  1732. arch/arm64/boot/dts/ti/k3-am65-main.dtsi +2 −2
  1733. arch/arm64/boot/dts/ti/k3-am654-base-board.dts +1 −1
  1734. arch/arm64/boot/dts/ti/k3-am67a-kontron-sa67-base.dts +2 −2
  1735. arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +7 −7
  1736. arch/arm64/boot/dts/ti/k3-am69-aquila-clover.dts +4 −3
  1737. arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts +2 −2
  1738. arch/arm64/boot/dts/ti/k3-am69-aquila.dtsi +4 −2
  1739. arch/arm64/boot/dts/ti/k3-am69-sk.dts +13 −13
  1740. arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +2 −2
  1741. arch/arm64/boot/dts/ti/k3-j721e-sk.dts +12 −12
  1742. arch/arm64/boot/dts/ti/k3-j721e.dtsi +2 −2
  1743. arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi +18 −1
  1744. arch/arm64/boot/dts/ti/k3-j722s-evm.dts +1 −1
  1745. arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +5 −0
  1746. arch/arm64/boot/dts/ti/k3-j722s.dtsi +2 −1
  1747. arch/arm64/boot/dts/ti/k3-j742s2-mcu-wakeup.dtsi +4 −0
  1748. arch/arm64/boot/dts/ti/k3-j784s4-j742s2-evm-common.dtsi +2 −2
  1749. arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +0 −36
  1750. arch/arm64/boot/dts/ti/k3-j784s4-j742s2-mcu-wakeup-common.dtsi +17 −0
  1751. arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +47 −11
  1752. arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +1 −1
  1753. arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts +1 −1
  1754. arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi +1 −1
  1755. arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +2 −2
  1756. arch/arm64/boot/dts/toshiba/tmpv7708_pins.dtsi +1 −1
  1757. arch/arm64/boot/dts/xilinx/versal-net.dtsi +2 −2
  1758. arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +1 −1
  1759. arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso +0 −7
  1760. arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso +0 −7
  1761. arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso +0 −7
  1762. arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso +0 −6
  1763. arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso +0 −6
  1764. arch/arm64/boot/dts/xilinx/zynqmp.dtsi +10 −15
  1765. arch/arm64/configs/defconfig +90 −1
  1766. arch/arm64/crypto/Kconfig +3 −36
  1767. arch/arm64/crypto/Makefile +0 −9
  1768. arch/arm64/crypto/aes-ce-ccm-glue.c +0 −2
  1769. arch/arm64/crypto/aes-ce-glue.c +0 −178
  1770. arch/arm64/crypto/aes-ce-setkey.h +0 −6
  1771. arch/arm64/crypto/aes-cipher-glue.c +0 −63
  1772. arch/arm64/crypto/aes-glue.c +0 −2
  1773. arch/arm64/crypto/ghash-ce-glue.c +7 −20
  1774. arch/arm64/crypto/nhpoly1305-neon-glue.c +0 −79
  1775. arch/arm64/include/asm/assembler.h +10 −0
  1776. arch/arm64/include/asm/cpucaps.h +0 −2
  1777. arch/arm64/include/asm/el2_setup.h +11 −2
  1778. arch/arm64/include/asm/esr.h +8 −0
  1779. arch/arm64/include/asm/hugetlb.h +0 −2
  1780. arch/arm64/include/asm/hwcap.h +1 −0
  1781. arch/arm64/include/asm/insn.h +0 −23
  1782. arch/arm64/include/asm/kvm_arm.h +15 −41
  1783. arch/arm64/include/asm/kvm_emulate.h +8 −16
  1784. arch/arm64/include/asm/kvm_host.h +41 −15
  1785. arch/arm64/include/asm/kvm_mmu.h +2 −1
  1786. arch/arm64/include/asm/kvm_pgtable.h +8 −7
  1787. arch/arm64/include/asm/kvm_pkvm.h +28 −4
  1788. arch/arm64/include/asm/lse.h +0 −9
  1789. arch/arm64/include/asm/memory.h +8 −3
  1790. arch/arm64/include/asm/page.h +0 −1
  1791. arch/arm64/include/asm/paravirt.h +0 −14
  1792. arch/arm64/include/asm/paravirt_api_clock.h +0 −1
  1793. arch/arm64/include/asm/pgtable-prot.h +2 −2
  1794. arch/arm64/include/asm/pgtable.h +50 −69
  1795. arch/arm64/include/asm/rwonce.h +1 −1
  1796. arch/arm64/include/asm/syscall.h +12 −6
  1797. arch/arm64/include/asm/sysreg.h +2 −30
  1798. arch/arm64/include/asm/thread_info.h +1 −8
  1799. arch/arm64/include/asm/uaccess.h +2 −4
  1800. arch/arm64/include/uapi/asm/hwcap.h +1 −0
  1801. arch/arm64/kernel/cpu_errata.c +31 −0
  1802. arch/arm64/kernel/cpufeature.c +35 −13
  1803. arch/arm64/kernel/cpuinfo.c +1 −0
  1804. arch/arm64/kernel/head.S +1 −1
  1805. arch/arm64/kernel/hibernate.c +1 −1
  1806. arch/arm64/kernel/image-vars.h +1 −1
  1807. arch/arm64/kernel/kexec_image.c +1 −1
  1808. arch/arm64/kernel/machine_kexec_file.c +1 −1
  1809. arch/arm64/kernel/paravirt.c +1 −10
  1810. arch/arm64/kernel/probes/uprobes.c +3 −6
  1811. arch/arm64/kernel/proton-pack.c +1 −0
  1812. arch/arm64/kernel/ptrace.c +49 −27
  1813. arch/arm64/kernel/signal.c +20 −6
  1814. arch/arm64/kernel/topology.c +63 −3
  1815. arch/arm64/kernel/vdso.c +1 −3
  1816. arch/arm64/kernel/vdso32/vdso.lds.S +1 −0
  1817. arch/arm64/kernel/vdso32/vgettimeofday.c +5 −0
  1818. arch/arm64/kvm/arch_timer.c +13 −5
  1819. arch/arm64/kvm/arm.c +63 −7
  1820. arch/arm64/kvm/at.c +6 −9
  1821. arch/arm64/kvm/config.c +307 −198
  1822. arch/arm64/kvm/emulate-nested.c +63 −42
  1823. arch/arm64/kvm/hyp/entry.S +1 −1
  1824. arch/arm64/kvm/hyp/include/hyp/switch.h +3 −5
  1825. arch/arm64/kvm/hyp/nvhe/ffa.c +2 −2
  1826. arch/arm64/kvm/hyp/nvhe/hyp-init.S +0 −5
  1827. arch/arm64/kvm/hyp/nvhe/hyp-main.c +70 −0
  1828. arch/arm64/kvm/hyp/nvhe/mem_protect.c +3 −1
  1829. arch/arm64/kvm/hyp/nvhe/pkvm.c +10 −11
  1830. arch/arm64/kvm/hyp/nvhe/switch.c +1 −1
  1831. arch/arm64/kvm/hyp/nvhe/sys_regs.c +31 −8
  1832. arch/arm64/kvm/hyp/pgtable.c +41 −22
  1833. arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c +1 −1
  1834. arch/arm64/kvm/hyp/vgic-v3-sr.c +25 −44
  1835. arch/arm64/kvm/hyp/vhe/switch.c +1 −1
  1836. arch/arm64/kvm/hyp/vhe/sysreg-sr.c +1 −1
  1837. arch/arm64/kvm/inject_fault.c +42 −4
  1838. arch/arm64/kvm/mmio.c +26 −1
  1839. arch/arm64/kvm/mmu.c +29 −38
  1840. arch/arm64/kvm/nested.c +92 −88
  1841. arch/arm64/kvm/pmu-emul.c +1 −1
  1842. arch/arm64/kvm/ptdump.c +1 −1
  1843. arch/arm64/kvm/sys_regs.c +82 −45
  1844. arch/arm64/kvm/sys_regs.h +10 −0
  1845. arch/arm64/kvm/va_layout.c +28 −5
  1846. arch/arm64/kvm/vgic/vgic-debug.c +34 −78
  1847. arch/arm64/kvm/vgic/vgic-init.c +9 −9
  1848. arch/arm64/kvm/vgic/vgic-irqfd.c +1 −1
  1849. arch/arm64/kvm/vgic/vgic-its.c +5 −5
  1850. arch/arm64/kvm/vgic/vgic-mmio-v3.c +1 −1
  1851. arch/arm64/kvm/vgic/vgic-v3-nested.c +5 −5
  1852. arch/arm64/kvm/vgic/vgic-v3.c +37 −36
  1853. arch/arm64/kvm/vgic/vgic-v4.c +2 −2
  1854. arch/arm64/kvm/vgic/vgic-v5.c +2 −0
  1855. arch/arm64/kvm/vgic/vgic.h +1 −0
  1856. arch/arm64/lib/delay.c +15 −4
  1857. arch/arm64/lib/insn.c +0 −2
  1858. arch/arm64/mm/contpte.c +40 −22
  1859. arch/arm64/mm/gcs.c +2 −2
  1860. arch/arm64/mm/hugetlbpage.c +12 −15
  1861. arch/arm64/mm/init.c +16 −23
  1862. arch/arm64/mm/ioremap.c +2 −1
  1863. arch/arm64/mm/mmu.c +4 −4
  1864. arch/arm64/mm/pageattr.c +2 −2
  1865. arch/arm64/mm/proc.S +5 −5
  1866. arch/arm64/net/bpf_jit_comp.c +67 −21
  1867. arch/arm64/tools/cpucaps +3 −0
  1868. arch/arm64/tools/syscall_32.tbl +1 −0
  1869. arch/arm64/tools/sysreg +137 −17
  1870. arch/csky/abiv1/inc/abi/page.h +1 −0
  1871. arch/csky/abiv2/inc/abi/page.h +0 −7
  1872. arch/csky/kernel/setup.c +8 −8
  1873. arch/csky/kernel/vdso.c +1 −1
  1874. arch/hexagon/include/asm/page.h +0 −1
  1875. arch/hexagon/include/asm/signal.h +0 −0
  1876. arch/hexagon/mm/init.c +5 −14
  1877. arch/loongarch/Kconfig +6 −0
  1878. arch/loongarch/boot/dts/loongson-2k0500-ref.dts +19 −0
  1879. arch/loongarch/boot/dts/loongson-2k0500.dtsi +14 −1
  1880. arch/loongarch/boot/dts/loongson-2k1000-ref.dts +22 −0
  1881. arch/loongarch/boot/dts/loongson-2k1000.dtsi +25 −19
  1882. arch/loongarch/boot/dts/loongson-2k2000.dtsi +15 −20
  1883. arch/loongarch/include/asm/cmpxchg.h +54 −0
  1884. arch/loongarch/include/asm/cpu-features.h +1 −0
  1885. arch/loongarch/include/asm/cpu.h +32 −30
  1886. arch/loongarch/include/asm/kvm_host.h +9 −0
  1887. arch/loongarch/include/asm/kvm_para.h +3 −1
  1888. arch/loongarch/include/asm/loongarch.h +1 −0
  1889. arch/loongarch/include/asm/page.h +0 −1
  1890. arch/loongarch/include/asm/paravirt.h +0 −13
  1891. arch/loongarch/include/asm/paravirt_api_clock.h +0 −1
  1892. arch/loongarch/include/asm/pgalloc.h +3 −4
  1893. arch/loongarch/include/asm/pgtable.h +0 −2
  1894. arch/loongarch/include/asm/qspinlock.h +4 −0
  1895. arch/loongarch/include/asm/setup.h +3 −0
  1896. arch/loongarch/include/asm/topology.h +1 −1
  1897. arch/loongarch/include/asm/unistd.h +1 −0
  1898. arch/loongarch/include/uapi/asm/hwcap.h +1 −0
  1899. arch/loongarch/include/uapi/asm/kvm.h +1 −0
  1900. arch/loongarch/include/uapi/asm/kvm_para.h +1 −0
  1901. arch/loongarch/kernel/Makefile.syscalls +2 −3
  1902. arch/loongarch/kernel/cpu-probe.c +4 −0
  1903. arch/loongarch/kernel/efi.c +16 −15
  1904. arch/loongarch/kernel/head.S +0 −8
  1905. arch/loongarch/kernel/image-vars.h +1 −1
  1906. arch/loongarch/kernel/kgdb.c +1 −1
  1907. arch/loongarch/kernel/machine_kexec_file.c +1 −1
  1908. arch/loongarch/kernel/paravirt.c +21 −10
  1909. arch/loongarch/kernel/perf_event.c +18 −3
  1910. arch/loongarch/kernel/proc.c +40 −23
  1911. arch/loongarch/kernel/setup.c +2 −11
  1912. arch/loongarch/kernel/smp.c +13 −0
  1913. arch/loongarch/kernel/unwind_orc.c +16 −2
  1914. arch/loongarch/kernel/unwind_prologue.c +1 −5
  1915. arch/loongarch/kernel/vdso.c +1 −1
  1916. arch/loongarch/kvm/exit.c +17 −4
  1917. arch/loongarch/kvm/intc/eiointc.c +19 −27
  1918. arch/loongarch/kvm/intc/ipi.c +10 −19
  1919. arch/loongarch/kvm/intc/pch_pic.c +17 −19
  1920. arch/loongarch/kvm/interrupt.c +2 −2
  1921. arch/loongarch/kvm/main.c +10 −2
  1922. arch/loongarch/kvm/vcpu.c +100 −27
  1923. arch/loongarch/kvm/vm.c +20 −22
  1924. arch/loongarch/mm/init.c +1 −5
  1925. arch/loongarch/mm/kasan_init.c +40 −38
  1926. arch/loongarch/mm/tlb.c +1 −2
  1927. arch/loongarch/net/bpf_jit.c +166 −44
  1928. arch/loongarch/net/bpf_jit.h +3 −1
  1929. arch/loongarch/pci/acpi.c +3 −3
  1930. arch/loongarch/vdso/vgetcpu.c +2 −3
  1931. arch/m68k/68000/ucsimm.c +2 −1
  1932. arch/m68k/amiga/chipram.c +1 −1
  1933. arch/m68k/atari/stram.c +1 −1
  1934. arch/m68k/configs/amcore_defconfig +0 −2
  1935. arch/m68k/configs/amiga_defconfig +0 −4
  1936. arch/m68k/configs/apollo_defconfig +0 −4
  1937. arch/m68k/configs/atari_defconfig +0 −4
  1938. arch/m68k/configs/bvme6000_defconfig +0 −4
  1939. arch/m68k/configs/hp300_defconfig +0 −4
  1940. arch/m68k/configs/m5475evb_defconfig +0 −1
  1941. arch/m68k/configs/mac_defconfig +0 −4
  1942. arch/m68k/configs/multi_defconfig +0 −4
  1943. arch/m68k/configs/mvme147_defconfig +0 −4
  1944. arch/m68k/configs/mvme16x_defconfig +0 −4
  1945. arch/m68k/configs/q40_defconfig +0 −4
  1946. arch/m68k/configs/stmark2_defconfig +0 −1
  1947. arch/m68k/configs/sun3_defconfig +0 −4
  1948. arch/m68k/configs/sun3x_defconfig +0 −4
  1949. arch/m68k/emu/nfblock.c +1 −1
  1950. arch/m68k/include/asm/page_no.h +0 −1
  1951. arch/m68k/kernel/syscalls/syscall.tbl +1 −0
  1952. arch/m68k/lib/memmove.c +18 −0
  1953. arch/m68k/mm/init.c +5 −3
  1954. arch/m68k/mm/kmap.c +1 −1
  1955. arch/m68k/mm/mcfmmu.c +0 −3
  1956. arch/m68k/mm/motorola.c +1 −5
  1957. arch/m68k/mm/sun3mmu.c +0 −9
  1958. arch/m68k/sun3/prom/printf.c +2 −2
  1959. arch/microblaze/include/asm/page.h +0 −1
  1960. arch/microblaze/kernel/syscalls/syscall.tbl +1 −0
  1961. arch/microblaze/mm/init.c +10 −12
  1962. arch/mips/Kconfig +29 −1
  1963. arch/mips/alchemy/common/clock.c +4 −4
  1964. arch/mips/alchemy/common/dbdma.c +4 −4
  1965. arch/mips/alchemy/common/platform.c +2 −2
  1966. arch/mips/alchemy/devboards/platform.c +4 −4
  1967. arch/mips/bcm47xx/setup.c +1 −1
  1968. arch/mips/boot/dts/loongson/ls7a-pch.dtsi +4 −2
  1969. arch/mips/boot/tools/relocs.c +2 −0
  1970. arch/mips/boot/tools/relocs.h +7 −0
  1971. arch/mips/cavium-octeon/octeon-irq.c +5 −5
  1972. arch/mips/configs/ip27_defconfig +0 −1
  1973. arch/mips/configs/loongson2k_defconfig +0 −1
  1974. arch/mips/configs/mtx1_defconfig +0 −3
  1975. arch/mips/include/asm/cevt-r4k.h +0 −1
  1976. arch/mips/include/asm/elf.h +2 −0
  1977. arch/mips/include/asm/mach-loongson2ef/loongson.h +6 −0
  1978. arch/mips/include/asm/mach-loongson64/topology.h +1 −1
  1979. arch/mips/include/asm/page.h +1 −0
  1980. arch/mips/include/asm/pgalloc.h +3 −6
  1981. arch/mips/include/asm/pgtable.h +1 −1
  1982. arch/mips/include/uapi/asm/errno.h +2 −0
  1983. arch/mips/kernel/cevt-r4k.c +0 −11
  1984. arch/mips/kernel/module.c +1 −1
  1985. arch/mips/kernel/relocate.c +13 −0
  1986. arch/mips/kernel/setup.c +3 −13
  1987. arch/mips/kernel/smp-cps.c +5 −8
  1988. arch/mips/kernel/syscalls/syscall_n32.tbl +1 −0
  1989. arch/mips/kernel/syscalls/syscall_n64.tbl +1 −0
  1990. arch/mips/kernel/syscalls/syscall_o32.tbl +1 −0
  1991. arch/mips/kernel/uprobes.c +2 −2
  1992. arch/mips/kernel/vpe.c +3 −3
  1993. arch/mips/lantiq/falcon/sysctrl.c +1 −1
  1994. arch/mips/lantiq/xway/gptu.c +1 −1
  1995. arch/mips/lantiq/xway/sysctrl.c +5 −5
  1996. arch/mips/loongson2ef/common/pci.c +11 −7
  1997. arch/mips/loongson2ef/common/setup.c +1 −0
  1998. arch/mips/loongson64/env.c +98 −0
  1999. arch/mips/loongson64/init.c +1 −1
  2000. arch/mips/loongson64/numa.c +3 −7
  2001. arch/mips/mm/init.c +24 −7
  2002. arch/mips/pci/pci-alchemy.c +1 −1
  2003. arch/mips/pci/pci-xtalk-bridge.c +1 −1
  2004. arch/mips/pic32/common/reset.c +2 −1
  2005. arch/mips/pic32/pic32mzda/config.c +1 −2
  2006. arch/mips/pic32/pic32mzda/early_clk.c +2 −1
  2007. arch/mips/pic32/pic32mzda/early_console.c +2 −1
  2008. arch/mips/ralink/mt7620.c +1 −1
  2009. arch/mips/ralink/mt7621.c +1 −1
  2010. arch/mips/ralink/rt288x.c +1 −1
  2011. arch/mips/ralink/rt305x.c +1 −1
  2012. arch/mips/ralink/rt3883.c +1 −1
  2013. arch/mips/rb532/devices.c +4 −2
  2014. arch/mips/sgi-ip22/ip22-gio.c +1 −1
  2015. arch/mips/sgi-ip27/ip27-irq.c +1 −1
  2016. arch/mips/sgi-ip27/ip27-memory.c +2 −6
  2017. arch/mips/sgi-ip27/ip27-timer.c +2 −8
  2018. arch/mips/sgi-ip27/ip27-xtalk.c +2 −2
  2019. arch/mips/sgi-ip30/ip30-irq.c +1 −1
  2020. arch/mips/sgi-ip30/ip30-timer.c +2 −3
  2021. arch/mips/sgi-ip30/ip30-xtalk.c +2 −2
  2022. arch/mips/txx9/generic/pci.c +1 −1
  2023. arch/mips/txx9/generic/setup.c +2 −2
  2024. arch/mips/vdso/vdso.lds.S +1 −0
  2025. arch/mips/vdso/vgettimeofday.c +5 −0
  2026. arch/nios2/include/asm/page.h +1 −0
  2027. arch/nios2/include/asm/swab.h +0 −0
  2028. arch/nios2/mm/init.c +5 −7
  2029. arch/nios2/platform/platform.c +1 −1
  2030. arch/openrisc/boot/dts/de0-nano-common.dtsi +42 −0
  2031. arch/openrisc/boot/dts/de0-nano-multicore.dts +25 −0
  2032. arch/openrisc/boot/dts/de0-nano.dts +54 −0
  2033. arch/openrisc/boot/dts/simple-smp.dts +25 −0
  2034. arch/openrisc/boot/dts/simple-smp.dtsi +5 −6
  2035. arch/openrisc/configs/de0_nano_defconfig +79 −0
  2036. arch/openrisc/configs/de0_nano_multicore_defconfig +92 −0
  2037. arch/openrisc/configs/or1klitex_defconfig +1 −1
  2038. arch/openrisc/configs/simple_smp_defconfig +1 −1
  2039. arch/openrisc/include/asm/barrier.h +2 −0
  2040. arch/openrisc/include/asm/page.h +0 −1
  2041. arch/openrisc/include/asm/smp.h +2 −1
  2042. arch/openrisc/kernel/smp.c +21 −1
  2043. arch/openrisc/mm/init.c +2 −8
  2044. arch/parisc/Kconfig +1 −0
  2045. arch/parisc/boot/compressed/misc.c +14 −1
  2046. arch/parisc/include/asm/page.h +0 −1
  2047. arch/parisc/include/asm/pdcpat.h +5 −2
  2048. arch/parisc/include/asm/tlb.h +2 −2
  2049. arch/parisc/include/uapi/asm/errno.h +2 −0
  2050. arch/parisc/kernel/drivers.c +9 −5
  2051. arch/parisc/kernel/firmware.c +26 −1
  2052. arch/parisc/kernel/inventory.c +15 −2
  2053. arch/parisc/kernel/process.c +3 −0
  2054. arch/parisc/kernel/processor.c +14 −14
  2055. arch/parisc/kernel/syscalls/syscall.tbl +1 −0
  2056. arch/parisc/kernel/time.c +20 −0
  2057. arch/parisc/kernel/unwind.c +2 −2
  2058. arch/parisc/kernel/vdso.c +1 −1
  2059. arch/parisc/mm/init.c +2 −9
  2060. arch/parisc/net/bpf_jit_core.c +2 −2
  2061. arch/powerpc/Kconfig +3 −2
  2062. arch/powerpc/configs/powernv_defconfig +0 −1
  2063. arch/powerpc/configs/ppc64_defconfig +0 −3
  2064. arch/powerpc/configs/ppc6xx_defconfig +0 −1
  2065. arch/powerpc/configs/skiroot_defconfig +1 −2
  2066. arch/powerpc/crypto/Kconfig +1 −1
  2067. arch/powerpc/crypto/Makefile +4 −5
  2068. arch/powerpc/crypto/aes-gcm-p10-glue.c +2 −2
  2069. arch/powerpc/crypto/aes-spe-glue.c +5 −83
  2070. arch/powerpc/crypto/aes.c +0 −134
  2071. arch/powerpc/crypto/aes_cbc.c +2 −2
  2072. arch/powerpc/crypto/aes_ctr.c +1 −1
  2073. arch/powerpc/crypto/aes_xts.c +3 −3
  2074. arch/powerpc/crypto/aesp8-ppc.h +0 −22
  2075. arch/powerpc/crypto/vmx.c +1 −9
  2076. arch/powerpc/include/asm/barrier.h +1 −1
  2077. arch/powerpc/include/asm/book3s/32/kup.h +1 −2
  2078. arch/powerpc/include/asm/book3s/32/mmu-hash.h +4 −1
  2079. arch/powerpc/include/asm/book3s/32/pgtable.h +11 −5
  2080. arch/powerpc/include/asm/book3s/64/kup.h +2 −4
  2081. arch/powerpc/include/asm/book3s/64/pgtable.h +52 −10
  2082. arch/powerpc/include/asm/book3s/64/tlbflush-hash.h +9 −11
  2083. arch/powerpc/include/asm/eeh.h +2 −0
  2084. arch/powerpc/include/asm/hugetlb.h +0 −5
  2085. arch/powerpc/include/asm/hvcall.h +3 −1
  2086. arch/powerpc/include/asm/kgdb.h +0 −1
  2087. arch/powerpc/include/asm/kup.h +1 −51
  2088. arch/powerpc/include/asm/nohash/32/kup-8xx.h +1 −2
  2089. arch/powerpc/include/asm/nohash/32/mmu-8xx.h +0 −4
  2090. arch/powerpc/include/asm/nohash/kup-booke.h +1 −2
  2091. arch/powerpc/include/asm/nohash/pgtable.h +12 −1
  2092. arch/powerpc/include/asm/page.h +1 −0
  2093. arch/powerpc/include/asm/paravirt.h +0 −3
  2094. arch/powerpc/include/asm/paravirt_api_clock.h +0 −2
  2095. arch/powerpc/include/asm/pgtable.h +10 −0
  2096. arch/powerpc/include/asm/plpks.h +18 −77
  2097. arch/powerpc/include/asm/secvar.h +0 −1
  2098. arch/powerpc/include/asm/setup.h +4 −0
  2099. arch/powerpc/include/asm/task_size_32.h +27 −1
  2100. arch/powerpc/include/asm/thread_info.h +0 −2
  2101. arch/powerpc/include/asm/tlb.h +0 −1
  2102. arch/powerpc/include/asm/uaccess.h +96 −36
  2103. arch/powerpc/include/asm/vdso/gettimeofday.h +2 −0
  2104. arch/powerpc/kernel/asm-offsets.c +1 −1
  2105. arch/powerpc/kernel/btext.c +1 −0
  2106. arch/powerpc/kernel/cacheinfo.c +3 −3
  2107. arch/powerpc/kernel/dma-iommu.c +20 −10
  2108. arch/powerpc/kernel/eeh_cache.c +1 −1
  2109. arch/powerpc/kernel/eeh_driver.c +6 −5
  2110. arch/powerpc/kernel/eeh_event.c +1 −1
  2111. arch/powerpc/kernel/eeh_pe.c +70 −4
  2112. arch/powerpc/kernel/head_book3s_32.S +3 −3
  2113. arch/powerpc/kernel/nvram_64.c +2 −2
  2114. arch/powerpc/kernel/pci-common.c +4 −4
  2115. arch/powerpc/kernel/pci_dn.c +3 −3
  2116. arch/powerpc/kernel/process.c +0 −25
  2117. arch/powerpc/kernel/secvar-sysfs.c +7 −16
  2118. arch/powerpc/kernel/setup-common.c +0 −1
  2119. arch/powerpc/kernel/smp-tbsync.c +1 −1
  2120. arch/powerpc/kernel/smp.c +3 −1
  2121. arch/powerpc/kernel/syscalls/syscall.tbl +1 −0
  2122. arch/powerpc/kernel/vdso.c +1 −1
  2123. arch/powerpc/kernel/vdso/gettimeofday.S +12 −0
  2124. arch/powerpc/kernel/vdso/vdso32.lds.S +1 −0
  2125. arch/powerpc/kernel/vdso/vgettimeofday.c +6 −0
  2126. arch/powerpc/kernel/watchdog.c +10 −5
  2127. arch/powerpc/kvm/book3s_64_mmu_hv.c +3 −3
  2128. arch/powerpc/kvm/book3s_64_mmu_radix.c +1 −1
  2129. arch/powerpc/kvm/book3s_64_vio.c +2 −2
  2130. arch/powerpc/kvm/book3s_hv.c +4 −4
  2131. arch/powerpc/kvm/book3s_hv_nested.c +2 −2
  2132. arch/powerpc/kvm/book3s_hv_uvmem.c +3 −3
  2133. arch/powerpc/kvm/book3s_pr.c +1 −2
  2134. arch/powerpc/kvm/book3s_rtas.c +1 −1
  2135. arch/powerpc/kvm/book3s_xics.c +3 −3
  2136. arch/powerpc/kvm/book3s_xive.c +3 −3
  2137. arch/powerpc/kvm/book3s_xive_native.c +1 −1
  2138. arch/powerpc/kvm/e500.c +1 −1
  2139. arch/powerpc/kvm/e500_mmu.c +9 −13
  2140. arch/powerpc/kvm/guest-state-buffer.c +2 −2
  2141. arch/powerpc/kvm/mpic.c +2 −2
  2142. arch/powerpc/lib/rheap.c +2 −2
  2143. arch/powerpc/mm/book3s32/mmu.c +1 −3
  2144. arch/powerpc/mm/book3s64/hash_pgtable.c +4 −0
  2145. arch/powerpc/mm/book3s64/hash_tlb.c +8 −6
  2146. arch/powerpc/mm/book3s64/iommu_api.c +1 −1
  2147. arch/powerpc/mm/book3s64/mmu_context.c +2 −4
  2148. arch/powerpc/mm/book3s64/pgtable.c +16 −9
  2149. arch/powerpc/mm/book3s64/radix_pgtable.c +6 −3
  2150. arch/powerpc/mm/book3s64/subpage_prot.c +3 −3
  2151. arch/powerpc/mm/drmem.c +3 −5
  2152. arch/powerpc/mm/hugetlbpage.c +4 −7
  2153. arch/powerpc/mm/mem.c +11 −20
  2154. arch/powerpc/mm/nohash/8xx.c +0 −2
  2155. arch/powerpc/mm/numa.c +0 −2
  2156. arch/powerpc/mm/pgtable.c +12 −0
  2157. arch/powerpc/mm/ptdump/segment_regs.c +1 −1
  2158. arch/powerpc/net/bpf_jit.h +16 −0
  2159. arch/powerpc/net/bpf_jit_comp.c +89 −17
  2160. arch/powerpc/net/bpf_jit_comp64.c +250 −47
  2161. arch/powerpc/perf/hv-24x7.c +5 −7
  2162. arch/powerpc/perf/hv-gpci.c +1 −1
  2163. arch/powerpc/perf/imc-pmu.c +10 −15
  2164. arch/powerpc/perf/vpa-dtl.c +1 −1
  2165. arch/powerpc/platforms/44x/fsp2.c +1 −4
  2166. arch/powerpc/platforms/44x/hsta_msi.c +1 −2
  2167. arch/powerpc/platforms/44x/pci.c +1 −2
  2168. arch/powerpc/platforms/44x/uic.c +1 −1
  2169. arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c +1 −1
  2170. arch/powerpc/platforms/Kconfig.cputype +1 −0
  2171. arch/powerpc/platforms/book3s/vas-api.c +1 −1
  2172. arch/powerpc/platforms/cell/spu_base.c +1 −1
  2173. arch/powerpc/platforms/cell/spufs/context.c +1 −1
  2174. arch/powerpc/platforms/cell/spufs/file.c +3 −3
  2175. arch/powerpc/platforms/cell/spufs/gang.c +1 −1
  2176. arch/powerpc/platforms/cell/spufs/inode.c +2 −2
  2177. arch/powerpc/platforms/cell/spufs/sched.c +1 −1
  2178. arch/powerpc/platforms/embedded6xx/hlwd-pic.c +1 −3
  2179. arch/powerpc/platforms/pasemi/gpio_mdio.c +1 −1
  2180. arch/powerpc/platforms/powermac/low_i2c.c +3 −3
  2181. arch/powerpc/platforms/powermac/pfunc_core.c +2 −2
  2182. arch/powerpc/platforms/powernv/idle.c +1 −2
  2183. arch/powerpc/platforms/powernv/memtrace.c +1 −2
  2184. arch/powerpc/platforms/powernv/ocxl.c +2 −2
  2185. arch/powerpc/platforms/powernv/opal-async.c +2 −2
  2186. arch/powerpc/platforms/powernv/opal-core.c +2 −2
  2187. arch/powerpc/platforms/powernv/opal-dump.c +1 −1
  2188. arch/powerpc/platforms/powernv/opal-elog.c +1 −1
  2189. arch/powerpc/platforms/powernv/opal-hmi.c +1 −1
  2190. arch/powerpc/platforms/powernv/opal-imc.c +2 −3
  2191. arch/powerpc/platforms/powernv/opal-irqchip.c +1 −1
  2192. arch/powerpc/platforms/powernv/opal-lpc.c +1 −1
  2193. arch/powerpc/platforms/powernv/opal-memory-errors.c +1 −1
  2194. arch/powerpc/platforms/powernv/opal-powercap.c +3 −6
  2195. arch/powerpc/platforms/powernv/opal-psr.c +1 −2
  2196. arch/powerpc/platforms/powernv/opal-sensor-groups.c +3 −6
  2197. arch/powerpc/platforms/powernv/opal-sysparam.c +1 −1
  2198. arch/powerpc/platforms/powernv/opal-xscom.c +1 −1
  2199. arch/powerpc/platforms/powernv/opal.c +2 −2
  2200. arch/powerpc/platforms/powernv/pci-ioda.c +2 −2
  2201. arch/powerpc/platforms/powernv/pci-sriov.c +1 −1
  2202. arch/powerpc/platforms/powernv/rng.c +1 −1
  2203. arch/powerpc/platforms/powernv/vas-window.c +1 −1
  2204. arch/powerpc/platforms/powernv/vas.c +1 −1
  2205. arch/powerpc/platforms/ps3/device-init.c +9 −9
  2206. arch/powerpc/platforms/ps3/mm.c +2 −2
  2207. arch/powerpc/platforms/ps3/spu.c +1 −2
  2208. arch/powerpc/platforms/pseries/Kconfig +1 −1
  2209. arch/powerpc/platforms/pseries/Makefile +1 −1
  2210. arch/powerpc/platforms/pseries/cmm.c +10 −43
  2211. arch/powerpc/platforms/pseries/dlpar.c +3 −3
  2212. arch/powerpc/platforms/pseries/hotplug-memory.c +1 −1
  2213. arch/powerpc/platforms/pseries/hvcserver.c +2 −2
  2214. arch/powerpc/platforms/pseries/iommu.c +9 −11
  2215. arch/powerpc/platforms/pseries/lparcfg.c +1 −1
  2216. arch/powerpc/platforms/pseries/mobility.c +1 −1
  2217. arch/powerpc/platforms/pseries/msi.c +43 −5
  2218. arch/powerpc/platforms/pseries/papr-hvpipe.c +2 −2
  2219. arch/powerpc/platforms/pseries/papr-phy-attest.c +1 −1
  2220. arch/powerpc/platforms/pseries/papr-platform-dump.c +2 −2
  2221. arch/powerpc/platforms/pseries/papr-rtas-common.c +1 −1
  2222. arch/powerpc/platforms/pseries/papr-sysparm.c +1 −1
  2223. arch/powerpc/platforms/pseries/papr_platform_attributes.c +3 −4
  2224. arch/powerpc/platforms/pseries/papr_scm.c +2 −2
  2225. arch/powerpc/platforms/pseries/pci.c +1 −3
  2226. arch/powerpc/platforms/pseries/plpks-secvar.c +0 −29
  2227. arch/powerpc/platforms/pseries/plpks-sysfs.c +96 −0
  2228. arch/powerpc/platforms/pseries/plpks.c +678 −10
  2229. arch/powerpc/platforms/pseries/reconfig.c +2 −2
  2230. arch/powerpc/platforms/pseries/setup.c +1 −3
  2231. arch/powerpc/platforms/pseries/vas-sysfs.c +1 −1
  2232. arch/powerpc/platforms/pseries/vas.c +2 −2
  2233. arch/powerpc/platforms/pseries/vio.c +3 −4
  2234. arch/powerpc/sysdev/ehv_pic.c +1 −1
  2235. arch/powerpc/sysdev/fsl_gtm.c +1 −1
  2236. arch/powerpc/sysdev/fsl_lbc.c +2 −2
  2237. arch/powerpc/sysdev/fsl_mpic_timer_wakeup.c +1 −1
  2238. arch/powerpc/sysdev/fsl_msi.c +2 −2
  2239. arch/powerpc/sysdev/fsl_pci.c +1 −1
  2240. arch/powerpc/sysdev/fsl_rio.c +5 −5
  2241. arch/powerpc/sysdev/fsl_rmu.c +1 −1
  2242. arch/powerpc/sysdev/ipic.c +1 −1
  2243. arch/powerpc/sysdev/mpic.c +3 −5
  2244. arch/powerpc/sysdev/mpic_msgr.c +2 −3
  2245. arch/powerpc/sysdev/mpic_timer.c +1 −1
  2246. arch/powerpc/sysdev/of_rtc.c +1 −1
  2247. arch/powerpc/sysdev/xics/ics-native.c +1 −1
  2248. arch/powerpc/sysdev/xive/common.c +3 −2
  2249. arch/powerpc/sysdev/xive/spapr.c +1 −1
  2250. arch/riscv/Kconfig +23 −0
  2251. arch/riscv/Kconfig.errata +1 −0
  2252. arch/riscv/Makefile +7 −1
  2253. arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts +12 −0
  2254. arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts +13 −0
  2255. arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi +6 −0
  2256. arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +31 −0
  2257. arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +31 −0
  2258. arch/riscv/boot/dts/anlogic/dr1v90.dtsi +3 −2
  2259. arch/riscv/boot/dts/microchip/mpfs.dtsi +24 −10
  2260. arch/riscv/boot/dts/renesas/r9a07g043f.dtsi +2 −1
  2261. arch/riscv/boot/dts/sophgo/cv180x.dtsi +2 −2
  2262. arch/riscv/boot/dts/sophgo/sg2042-cpus.dtsi +305 −0
  2263. arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +21 −0
  2264. arch/riscv/boot/dts/sophgo/sg2042.dtsi +88 −391
  2265. arch/riscv/boot/dts/sophgo/sg2044-cpus.dtsi +128 −128
  2266. arch/riscv/boot/dts/spacemit/Makefile +1 −0
  2267. arch/riscv/boot/dts/spacemit/k1-bananapi-f3.dts +90 −0
  2268. arch/riscv/boot/dts/spacemit/k1-milkv-jupiter.dts +135 −0
  2269. arch/riscv/boot/dts/spacemit/k1-orangepi-r2s.dts +2 −0
  2270. arch/riscv/boot/dts/spacemit/k1-orangepi-rv2.dts +2 −0
  2271. arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi +33 −0
  2272. arch/riscv/boot/dts/spacemit/k1.dtsi +237 −17
  2273. arch/riscv/boot/dts/spacemit/k3-pico-itx.dts +29 −0
  2274. arch/riscv/boot/dts/spacemit/k3.dtsi +578 −0
  2275. arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite-emmc.dts +1 −1
  2276. arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2-lite.dts +1 −1
  2277. arch/riscv/configs/defconfig +2 −2
  2278. arch/riscv/configs/hardening.config +4 −0
  2279. arch/riscv/crypto/Kconfig +0 −2
  2280. arch/riscv/crypto/aes-macros.S +11 −1
  2281. arch/riscv/crypto/aes-riscv64-glue.c +5 −76
  2282. arch/riscv/crypto/aes-riscv64-zvkned.S +0 −27
  2283. arch/riscv/errata/sifive/errata.c +0 −18
  2284. arch/riscv/include/asm/asm-prototypes.h +1 −0
  2285. arch/riscv/include/asm/assembler.h +44 −0
  2286. arch/riscv/include/asm/compat.h +1 −1
  2287. arch/riscv/include/asm/cpufeature.h +12 −0
  2288. arch/riscv/include/asm/csr.h +31 −0
  2289. arch/riscv/include/asm/entry-common.h +2 −0
  2290. arch/riscv/include/asm/hwcap.h +2 −0
  2291. arch/riscv/include/asm/hwprobe.h +2 −1
  2292. arch/riscv/include/asm/mman.h +26 −0
  2293. arch/riscv/include/asm/mmu_context.h +7 −0
  2294. arch/riscv/include/asm/page.h +1 −3
  2295. arch/riscv/include/asm/paravirt.h +0 −14
  2296. arch/riscv/include/asm/paravirt_api_clock.h +0 −1
  2297. arch/riscv/include/asm/pgtable.h +39 −13
  2298. arch/riscv/include/asm/processor.h +1 −0
  2299. arch/riscv/include/asm/syscall.h +1 −1
  2300. arch/riscv/include/asm/thread_info.h +3 −0
  2301. arch/riscv/include/asm/uaccess.h +12 −2
  2302. arch/riscv/include/asm/usercfi.h +97 −0
  2303. arch/riscv/include/asm/vdso.h +12 −1
  2304. arch/riscv/include/uapi/asm/hwprobe.h +4 −0
  2305. arch/riscv/include/uapi/asm/kvm.h +3 −0
  2306. arch/riscv/include/uapi/asm/ptrace.h +34 −0
  2307. arch/riscv/include/uapi/asm/sigcontext.h +1 −0
  2308. arch/riscv/kernel/Makefile +2 −0
  2309. arch/riscv/kernel/asm-offsets.c +10 −0
  2310. arch/riscv/kernel/cpufeature.c +25 −0
  2311. arch/riscv/kernel/entry.S +38 −0
  2312. arch/riscv/kernel/head.S +27 −0
  2313. arch/riscv/kernel/hibernate.c +1 −1
  2314. arch/riscv/kernel/image-vars.h +1 −1
  2315. arch/riscv/kernel/machine_kexec_file.c +1 −1
  2316. arch/riscv/kernel/module.c +5 −6
  2317. arch/riscv/kernel/paravirt.c +1 −10
  2318. arch/riscv/kernel/probes/uprobes.c +2 −2
  2319. arch/riscv/kernel/process.c +25 −2
  2320. arch/riscv/kernel/ptrace.c +190 −3
  2321. arch/riscv/kernel/signal.c +89 −3
  2322. arch/riscv/kernel/suspend.c +2 −1
  2323. arch/riscv/kernel/sys_hwprobe.c +101 −69
  2324. arch/riscv/kernel/sys_riscv.c +10 −0
  2325. arch/riscv/kernel/tests/kprobes/test-kprobes.c +1 −1
  2326. arch/riscv/kernel/traps.c +54 −0
  2327. arch/riscv/kernel/unaligned_access_speed.c +1 −1
  2328. arch/riscv/kernel/usercfi.c +542 −0
  2329. arch/riscv/kernel/vdso.c +8 −3
  2330. arch/riscv/kernel/vdso/Makefile +30 −10
  2331. arch/riscv/kernel/vdso/flush_icache.S +4 −0
  2332. arch/riscv/kernel/vdso/gen_vdso_offsets.sh +3 −1
  2333. arch/riscv/kernel/vdso/getcpu.S +4 −0
  2334. arch/riscv/kernel/vdso/note.S +3 −0
  2335. arch/riscv/kernel/vdso/rt_sigreturn.S +4 −0
  2336. arch/riscv/kernel/vdso/sys_hwprobe.S +4 −0
  2337. arch/riscv/kernel/vdso/vgetrandom-chacha.S +4 −1
  2338. arch/riscv/kernel/vdso_cfi/Makefile +25 −0
  2339. arch/riscv/kernel/vdso_cfi/vdso-cfi.S +11 −0
  2340. arch/riscv/kernel/vector.c +8 −4
  2341. arch/riscv/kvm/aia.c +1 −1
  2342. arch/riscv/kvm/aia_aplic.c +2 −3
  2343. arch/riscv/kvm/aia_imsic.c +12 −3
  2344. arch/riscv/kvm/main.c +1 −1
  2345. arch/riscv/kvm/mmu.c +140 −0
  2346. arch/riscv/kvm/vcpu_onereg.c +4 −0
  2347. arch/riscv/kvm/vcpu_pmu.c +1 −4
  2348. arch/riscv/kvm/vcpu_sbi_fwft.c +2 −2
  2349. arch/riscv/kvm/vcpu_timer.c +4 −2
  2350. arch/riscv/kvm/vm.c +1 −1
  2351. arch/riscv/lib/strlen.S +3 −5
  2352. arch/riscv/mm/hugetlbpage.c +8 −0
  2353. arch/riscv/mm/init.c +2 −10
  2354. arch/riscv/mm/pgtable.c +18 −0
  2355. arch/riscv/net/bpf_jit_comp64.c +79 −24
  2356. arch/riscv/net/bpf_jit_core.c +2 −2
  2357. arch/s390/Kconfig +21 −4
  2358. arch/s390/appldata/appldata_base.c +2 −2
  2359. arch/s390/appldata/appldata_mem.c +1 −1
  2360. arch/s390/appldata/appldata_net_sum.c +1 −1
  2361. arch/s390/boot/Makefile +1 −0
  2362. arch/s390/boot/startup.c +1 −0
  2363. arch/s390/boot/vmlinux.lds.S +9 −8
  2364. arch/s390/configs/debug_defconfig +3 −3
  2365. arch/s390/configs/defconfig +2 −2
  2366. arch/s390/crypto/Kconfig +0 −2
  2367. arch/s390/crypto/aes_s390.c +0 −113
  2368. arch/s390/crypto/paes_s390.c +57 −36
  2369. arch/s390/crypto/phmac_s390.c +20 −9
  2370. arch/s390/hypfs/hypfs_dbfs.c +1 −1
  2371. arch/s390/hypfs/hypfs_diag0c.c +3 −4
  2372. arch/s390/hypfs/hypfs_sprp.c +1 −1
  2373. arch/s390/hypfs/inode.c +1 −1
  2374. arch/s390/include/asm/Kbuild +0 −1
  2375. arch/s390/include/asm/ap.h +1 −1
  2376. arch/s390/include/asm/asm-prototypes.h +1 −0
  2377. arch/s390/include/asm/asm.h +1 −1
  2378. arch/s390/include/asm/bug.h +104 −37
  2379. arch/s390/include/asm/dat-bits.h +30 −2
  2380. arch/s390/include/asm/debug.h +2 −2
  2381. arch/s390/include/asm/gmap.h +0 −174
  2382. arch/s390/include/asm/gmap_helpers.h +1 −0
  2383. arch/s390/include/asm/hugetlb.h +0 −6
  2384. arch/s390/include/asm/idals.h +3 −3
  2385. arch/s390/include/asm/kvm_host.h +7 −0
  2386. arch/s390/include/asm/mmu.h +0 −13
  2387. arch/s390/include/asm/mmu_context.h +1 −5
  2388. arch/s390/include/asm/page.h +0 −5
  2389. arch/s390/include/asm/pci_io.h +1 −0
  2390. arch/s390/include/asm/pgalloc.h +0 −4
  2391. arch/s390/include/asm/pgtable.h +21 −150
  2392. arch/s390/include/asm/pkey.h +7 −1
  2393. arch/s390/include/asm/preempt.h +44 −3
  2394. arch/s390/include/asm/processor.h +1 −0
  2395. arch/s390/include/asm/ptrace.h +30 −12
  2396. arch/s390/include/asm/tlb.h +2 −7
  2397. arch/s390/include/asm/uaccess.h +10 −60
  2398. arch/s390/include/asm/uv.h +2 −1
  2399. arch/s390/include/uapi/asm/tape390.h +0 −103
  2400. arch/s390/kernel/alternative.c +1 −0
  2401. arch/s390/kernel/cert_store.c +1 −1
  2402. arch/s390/kernel/debug.c +37 −38
  2403. arch/s390/kernel/entry.S +11 −0
  2404. arch/s390/kernel/guarded_storage.c +2 −2
  2405. arch/s390/kernel/irq.c +1 −1
  2406. arch/s390/kernel/machine_kexec_file.c +3 −1
  2407. arch/s390/kernel/os_info.c +1 −1
  2408. arch/s390/kernel/perf_cpum_cf.c +2 −2
  2409. arch/s390/kernel/perf_cpum_cf_events.c +1 −1
  2410. arch/s390/kernel/perf_cpum_sf.c +2 −2
  2411. arch/s390/kernel/perf_pai.c +6 −7
  2412. arch/s390/kernel/ptrace.c +3 −3
  2413. arch/s390/kernel/runtime_instr.c +1 −1
  2414. arch/s390/kernel/setup.c +0 −2
  2415. arch/s390/kernel/smp.c +2 −2
  2416. arch/s390/kernel/stackprotector.c +1 −0
  2417. arch/s390/kernel/syscalls/syscall.tbl +1 −0
  2418. arch/s390/kernel/traps.c +43 −3
  2419. arch/s390/kernel/uv.c +23 −119
  2420. arch/s390/kernel/vdso.c +1 −1
  2421. arch/s390/kernel/vdso/Makefile +1 −1
  2422. arch/s390/kernel/vdso/getcpu.c +1 −2
  2423. arch/s390/kernel/vdso/vdso.h +1 −3
  2424. arch/s390/kvm/Kconfig +2 −0
  2425. arch/s390/kvm/Makefile +2 −1
  2426. arch/s390/kvm/dat.c +1391 −0
  2427. arch/s390/kvm/dat.h +970 −0
  2428. arch/s390/kvm/diag.c +1 −1
  2429. arch/s390/kvm/faultin.c +148 −0
  2430. arch/s390/kvm/faultin.h +92 −0
  2431. arch/s390/kvm/gaccess.c +555 −406
  2432. arch/s390/kvm/gaccess.h +13 −7
  2433. arch/s390/kvm/gmap-vsie.c +0 −141
  2434. arch/s390/kvm/gmap.c +1244 −0
  2435. arch/s390/kvm/gmap.h +244 −0
  2436. arch/s390/kvm/guestdbg.c +2 −6
  2437. arch/s390/kvm/intercept.c +11 −4
  2438. arch/s390/kvm/interrupt.c +11 −9
  2439. arch/s390/kvm/kvm-s390.c +356 −608
  2440. arch/s390/kvm/kvm-s390.h +13 −14
  2441. arch/s390/kvm/pci.c +4 −5
  2442. arch/s390/kvm/priv.c +78 −135
  2443. arch/s390/kvm/pv.c +120 −59
  2444. arch/s390/kvm/vsie.c +107 −95
  2445. arch/s390/lib/uaccess.c +26 −158
  2446. arch/s390/mm/Makefile +0 −1
  2447. arch/s390/mm/extmem.c +4 −4
  2448. arch/s390/mm/fault.c +2 −2
  2449. arch/s390/mm/gmap.c +0 −2436
  2450. arch/s390/mm/gmap_helpers.c +82 −16
  2451. arch/s390/mm/hugetlbpage.c +8 −24
  2452. arch/s390/mm/init.c +6 −7
  2453. arch/s390/mm/page-states.c +1 −0
  2454. arch/s390/mm/pageattr.c +0 −7
  2455. arch/s390/mm/pgalloc.c +0 −24
  2456. arch/s390/mm/pgtable.c +7 −807
  2457. arch/s390/net/bpf_jit_comp.c +1 −1
  2458. arch/s390/pci/pci.c +28 −14
  2459. arch/s390/pci/pci_bus.c +1 −1
  2460. arch/s390/pci/pci_irq.c +2 −3
  2461. arch/s390/purgatory/Makefile +1 −0
  2462. arch/sh/configs/dreamcast_defconfig +0 −2
  2463. arch/sh/configs/ecovec24_defconfig +0 −2
  2464. arch/sh/configs/kfr2r09_defconfig +0 −2
  2465. arch/sh/configs/migor_defconfig +0 −2
  2466. arch/sh/configs/rts7751r2d1_defconfig +0 −2
  2467. arch/sh/configs/rts7751r2dplus_defconfig +0 −2
  2468. arch/sh/configs/se7724_defconfig +0 −2
  2469. arch/sh/configs/se7780_defconfig +0 −2
  2470. arch/sh/configs/sh7785lcr_defconfig +0 −3
  2471. arch/sh/configs/urquell_defconfig +0 −3
  2472. arch/sh/drivers/dma/dmabrg.c +1 −2
  2473. arch/sh/drivers/heartbeat.c +1 −1
  2474. arch/sh/drivers/pci/pcie-sh7786.c +1 −2
  2475. arch/sh/drivers/push-switch.c +1 −1
  2476. arch/sh/kernel/cpu/sh4/sq.c +1 −1
  2477. arch/sh/kernel/dwarf.c +2 −2
  2478. arch/sh/kernel/syscalls/syscall.tbl +1 −0
  2479. arch/sh/mm/init.c +5 −7
  2480. arch/sparc/Kconfig +13 −0
  2481. arch/sparc/crypto/Kconfig +1 −1
  2482. arch/sparc/crypto/Makefile +1 −1
  2483. arch/sparc/crypto/aes_glue.c +5 −135
  2484. arch/sparc/include/asm/page_64.h +1 −0
  2485. arch/sparc/include/asm/syscalls.h +1 −0
  2486. arch/sparc/include/asm/tlb_64.h +0 −1
  2487. arch/sparc/include/asm/tlbflush_64.h +1 −4
  2488. arch/sparc/include/asm/unistd.h +0 −2
  2489. arch/sparc/include/uapi/asm/errno.h +2 −0
  2490. arch/sparc/include/uapi/asm/ioctls.h +4 −4
  2491. arch/sparc/kernel/central.c +2 −2
  2492. arch/sparc/kernel/chmc.c +2 −2
  2493. arch/sparc/kernel/cpumap.c +1 −1
  2494. arch/sparc/kernel/ds.c +1 −1
  2495. arch/sparc/kernel/entry.S +15 −0
  2496. arch/sparc/kernel/ioport.c +1 −1
  2497. arch/sparc/kernel/irq_64.c +2 −2
  2498. arch/sparc/kernel/kernel.h +1 −0
  2499. arch/sparc/kernel/ldc.c +1 −1
  2500. arch/sparc/kernel/leon_pci_grpci2.c +1 −1
  2501. arch/sparc/kernel/module.c +0 −2
  2502. arch/sparc/kernel/of_device_32.c +1 −1
  2503. arch/sparc/kernel/of_device_64.c +1 −1
  2504. arch/sparc/kernel/pci.c +1 −1
  2505. arch/sparc/kernel/pci_common.c +1 −1
  2506. arch/sparc/kernel/pci_fire.c +2 −2
  2507. arch/sparc/kernel/pci_psycho.c +2 −2
  2508. arch/sparc/kernel/pci_sabre.c +2 −2
  2509. arch/sparc/kernel/pci_schizo.c +2 −2
  2510. arch/sparc/kernel/pci_sun4v.c +4 −4
  2511. arch/sparc/kernel/pcic.c +1 −1
  2512. arch/sparc/kernel/process.c +38 −14
  2513. arch/sparc/kernel/process_32.c +17 −6
  2514. arch/sparc/kernel/process_64.c +21 −6
  2515. arch/sparc/kernel/sbus.c +2 −2
  2516. arch/sparc/kernel/setup_32.c +1 −1
  2517. arch/sparc/kernel/smp_64.c +1 −2
  2518. arch/sparc/kernel/starfire.c +1 −1
  2519. arch/sparc/kernel/sun4d_irq.c +1 −1
  2520. arch/sparc/kernel/sun4m_irq.c +1 −1
  2521. arch/sparc/kernel/sys_sparc_64.c +2 −5
  2522. arch/sparc/kernel/syscalls.S +8 −0
  2523. arch/sparc/kernel/syscalls/syscall.tbl +2 −1
  2524. arch/sparc/kernel/vio.c +3 −3
  2525. arch/sparc/mm/init_64.c +6 −19
  2526. arch/sparc/mm/io-unit.c +1 −1
  2527. arch/sparc/mm/iommu.c +1 −1
  2528. arch/sparc/mm/srmmu.c +7 −10
  2529. arch/sparc/mm/tlb.c +13 −7
  2530. arch/sparc/net/bpf_jit_comp_64.c +1 −1
  2531. arch/sparc/vdso/vma.c +2 −2
  2532. arch/um/Kconfig +1 −0
  2533. arch/um/drivers/chan_kern.c +1 −1
  2534. arch/um/drivers/hostaudio_kern.c +2 −2
  2535. arch/um/drivers/line.c +1 −1
  2536. arch/um/drivers/mconsole_kern.c +1 −1
  2537. arch/um/drivers/port_kern.c +3 −3
  2538. arch/um/drivers/ubd_kern.c +4 −8
  2539. arch/um/drivers/vector_kern.c +6 −11
  2540. arch/um/drivers/vector_transports.c +2 −3
  2541. arch/um/drivers/vfio_kern.c +4 −5
  2542. arch/um/drivers/virtio_pcidev.c +1 −1
  2543. arch/um/drivers/virtio_uml.c +52 −3
  2544. arch/um/drivers/xterm_kern.c +1 −1
  2545. arch/um/include/asm/page.h +0 −1
  2546. arch/um/include/shared/skas/mm_id.h +3 −2
  2547. arch/um/kernel/irq.c +1 −1
  2548. arch/um/kernel/mem.c +5 −5
  2549. arch/um/kernel/skas/mmu.c +8 −5
  2550. arch/um/os-Linux/signal.c +6 −3
  2551. arch/um/os-Linux/umid.c +1 −2
  2552. arch/x86/Kconfig +22 −12
  2553. arch/x86/Kconfig.cpufeatures +9 −1
  2554. arch/x86/Makefile +4 −4
  2555. arch/x86/Makefile_32.cpu +0 −6
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  2558. arch/x86/boot/startup/sme.c +1 −0
  2559. arch/x86/coco/sev/Makefile +1 −1
  2560. arch/x86/coco/sev/core.c +8 −385
  2561. arch/x86/coco/sev/internal.h +33 −1
  2562. arch/x86/coco/sev/noinstr.c +2 −1
  2563. arch/x86/coco/sev/svsm.c +362 −0
  2564. arch/x86/coco/sev/vc-handle.c +4 −3
  2565. arch/x86/crypto/Kconfig +0 −22
  2566. arch/x86/crypto/Makefile +0 −5
  2567. arch/x86/crypto/aes-gcm-aesni-x86_64.S +17 −16
  2568. arch/x86/crypto/aes-gcm-vaes-avx2.S +11 −10
  2569. arch/x86/crypto/aes-gcm-vaes-avx512.S +14 −11
  2570. arch/x86/crypto/aesni-intel_asm.S +0 −25
  2571. arch/x86/crypto/aesni-intel_glue.c +26 −93
  2572. arch/x86/crypto/nhpoly1305-avx2-glue.c +0 −81
  2573. arch/x86/crypto/nhpoly1305-sse2-glue.c +0 −80
  2574. arch/x86/entry/entry_64.S +0 −1
  2575. arch/x86/entry/entry_fred.c +1 −0
  2576. arch/x86/entry/syscall_32.c +1 −1
  2577. arch/x86/entry/syscalls/syscall_32.tbl +1 −0
  2578. arch/x86/entry/syscalls/syscall_64.tbl +1 −0
  2579. arch/x86/entry/vdso/.gitignore +4 −6
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  2581. arch/x86/entry/vdso/common/Makefile.include +89 −0
  2582. arch/x86/entry/vdso/common/note.S +4 −1
  2583. arch/x86/entry/vdso/common/vclock_gettime.c +8 −0
  2584. arch/x86/entry/vdso/common/vdso-layout.lds.S +23 −15
  2585. arch/x86/entry/vdso/common/vgetcpu.c +2 −3
  2586. arch/x86/entry/vdso/vdso32/Makefile +24 −0
  2587. arch/x86/entry/vdso/vdso32/note.S +1 −18
  2588. arch/x86/entry/vdso/vdso32/sigreturn.S +42 −118
  2589. arch/x86/entry/vdso/vdso32/system_call.S +14 −8
  2590. arch/x86/entry/vdso/vdso32/vclock_gettime.c +1 −4
  2591. arch/x86/entry/vdso/vdso32/vdso32.lds.S +2 −1
  2592. arch/x86/entry/vdso/vdso32/vgetcpu.c +1 −3
  2593. arch/x86/entry/vdso/vdso64/Makefile +46 −0
  2594. arch/x86/entry/vdso/vdso64/note.S +1 −0
  2595. arch/x86/entry/vdso/vdso64/vclock_gettime.c +1 −0
  2596. arch/x86/entry/vdso/vdso64/vdso64.lds.S +1 −1
  2597. arch/x86/entry/vdso/vdso64/vdsox32.lds.S +1 −1
  2598. arch/x86/entry/vdso/vdso64/vgetcpu.c +1 −0
  2599. arch/x86/entry/vdso/vdso64/vgetrandom-chacha.S +0 −0
  2600. arch/x86/entry/vdso/vdso64/vgetrandom.c +1 −1
  2601. arch/x86/entry/vdso/vdso64/vsgx.S +0 −0
  2602. arch/x86/entry/vdso/vma.c +10 −14
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  2605. arch/x86/events/amd/iommu.c +2 −2
  2606. arch/x86/events/amd/uncore.c +2 −2
  2607. arch/x86/events/core.c +62 −6
  2608. arch/x86/events/intel/core.c +354 −21
  2609. arch/x86/events/intel/cstate.c +26 −7
  2610. arch/x86/events/intel/ds.c +261 −0
  2611. arch/x86/events/intel/p6.c +1 −1
  2612. arch/x86/events/intel/uncore.c +93 −53
  2613. arch/x86/events/intel/uncore.h +26 −0
  2614. arch/x86/events/intel/uncore_discovery.c +45 −49
  2615. arch/x86/events/intel/uncore_discovery.h +7 −1
  2616. arch/x86/events/intel/uncore_snb.c +85 −0
  2617. arch/x86/events/intel/uncore_snbep.c +486 −216
  2618. arch/x86/events/msr.c +1 −0
  2619. arch/x86/events/perf_event.h +37 −2
  2620. arch/x86/events/rapl.c +2 −2
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  2623. arch/x86/hyperv/hv_spinlock.c +5 −6
  2624. arch/x86/hyperv/hv_vtl.c +5 −3
  2625. arch/x86/hyperv/irqdomain.c +1 −1
  2626. arch/x86/hyperv/ivm.c +8 −7
  2627. arch/x86/include/asm/amd/ibs.h +1 −1
  2628. arch/x86/include/asm/apic.h +0 −4
  2629. arch/x86/include/asm/checksum_64.h +33 −12
  2630. arch/x86/include/asm/cpufeatures.h +3 −1
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  2633. arch/x86/include/asm/e820/types.h +1 −1
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  2635. arch/x86/include/asm/ftrace.h +1 −1
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  2637. arch/x86/include/asm/highmem.h +0 −1
  2638. arch/x86/include/asm/idtentry.h +6 −0
  2639. arch/x86/include/asm/irq_remapping.h +3 −2
  2640. arch/x86/include/asm/irq_vectors.h +3 −1
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  2643. arch/x86/include/asm/kvm_host.h +22 −0
  2644. arch/x86/include/asm/mmu_context.h +0 −2
  2645. arch/x86/include/asm/mshyperv.h +0 −1
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  2649. arch/x86/include/asm/page_64.h +61 −17
  2650. arch/x86/include/asm/paravirt-base.h +35 −0
  2651. arch/x86/include/asm/paravirt-spinlock.h +145 −0
  2652. arch/x86/include/asm/paravirt.h +85 −257
  2653. arch/x86/include/asm/paravirt_api_clock.h +0 −1
  2654. arch/x86/include/asm/paravirt_types.h +140 −131
  2655. arch/x86/include/asm/percpu.h +4 −4
  2656. arch/x86/include/asm/perf_event.h +12 −2
  2657. arch/x86/include/asm/pgtable.h +12 −11
  2658. arch/x86/include/asm/pgtable_32.h +0 −1
  2659. arch/x86/include/asm/ptrace.h +1 −1
  2660. arch/x86/include/asm/qspinlock.h +5 −82
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  2663. arch/x86/include/asm/spinlock.h +0 −1
  2664. arch/x86/include/asm/svm.h +6 −3
  2665. arch/x86/include/asm/thread_info.h +1 −3
  2666. arch/x86/include/asm/timer.h +1 −0
  2667. arch/x86/include/asm/tlbflush.h +3 −4
  2668. arch/x86/include/asm/unwind_user.h +14 −13
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  2670. arch/x86/include/asm/vdso/gettimeofday.h +8 −100
  2671. arch/x86/include/asm/vdso/processor.h +1 −3
  2672. arch/x86/include/asm/vdso/sys_call.h +105 −0
  2673. arch/x86/include/asm/vmware.h +2 −2
  2674. arch/x86/include/asm/vmx.h +1 −0
  2675. arch/x86/include/uapi/asm/auxvec.h +1 −1
  2676. arch/x86/include/uapi/asm/kvm.h +6 −2
  2677. arch/x86/include/uapi/asm/svm.h +16 −16
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  2711. arch/x86/kernel/cpu/resctrl/monitor.c +30 −20
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  2732. arch/x86/kernel/kvmclock.c +1 −0
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  2748. arch/x86/kvm/cpuid.c +73 −15
  2749. arch/x86/kvm/cpuid.h +11 −1
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  2752. arch/x86/kvm/i8259.c +1 −1
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  2759. arch/x86/kvm/pmu.c +264 −7
  2760. arch/x86/kvm/pmu.h +36 −1
  2761. arch/x86/kvm/reverse_cpuid.h +19 −0
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  2769. arch/x86/kvm/trace.h +3 −3
  2770. arch/x86/kvm/vmx/capabilities.h +8 −1
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  2772. arch/x86/kvm/vmx/hyperv_evmcs.h +1 −1
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  2774. arch/x86/kvm/vmx/nested.h +0 −1
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  2776. arch/x86/kvm/vmx/pmu_intel.h +15 −0
  2777. arch/x86/kvm/vmx/tdx.c +7 −18
  2778. arch/x86/kvm/vmx/vmcs.h +9 −0
  2779. arch/x86/kvm/vmx/vmcs12.c +70 −4
  2780. arch/x86/kvm/vmx/vmcs12.h +5 −3
  2781. arch/x86/kvm/vmx/vmx.c +303 −106
  2782. arch/x86/kvm/vmx/vmx.h +4 −14
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  2785. arch/x86/kvm/xen.c +4 −5
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  2797. arch/x86/mm/mmio-mod.c +1 −1
  2798. arch/x86/mm/pat/memtype.c +2 −2
  2799. arch/x86/mm/pat/set_memory.c +0 −13
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  2801. arch/x86/net/bpf_jit_comp.c +65 −27
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  2813. arch/x86/platform/olpc/olpc-xo15-sci.c +3 −2
  2814. arch/x86/platform/pvh/head.S +2 −0
  2815. arch/x86/power/cpu.c +1 −1
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  2820. arch/x86/um/Kconfig +1 −0
  2821. arch/x86/video/video-common.c +2 −2
  2822. arch/x86/virt/svm/sev.c +1 −1
  2823. arch/x86/virt/vmx/tdx/tdx.c +1 −1
  2824. arch/x86/xen/enlighten.c +1 −1
  2825. arch/x86/xen/enlighten_pv.c +34 −51
  2826. arch/x86/xen/grant-table.c +1 −1
  2827. arch/x86/xen/irq.c +7 −13
  2828. arch/x86/xen/mmu_pv.c +45 −67
  2829. arch/x86/xen/setup.c +18 −10
  2830. arch/x86/xen/smp_pv.c +3 −4
  2831. arch/x86/xen/spinlock.c +5 −6
  2832. arch/x86/xen/time.c +2 −0
  2833. arch/x86/xen/xen-ops.h +0 −1
  2834. arch/xtensa/include/asm/page.h +0 −1
  2835. arch/xtensa/include/asm/syscall.h +0 −1
  2836. arch/xtensa/kernel/align.S +8 −2
  2837. arch/xtensa/kernel/ptrace.c +2 −2
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  2839. arch/xtensa/mm/init.c +7 −7
  2840. arch/xtensa/platforms/iss/network.c +1 −0
  2841. arch/xtensa/platforms/iss/simdisk.c +1 −1
  2842. block/bdev.c +0 −1
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  2846. block/bio-integrity.c +2 −2
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  2848. block/blk-cgroup.c +1 −1
  2849. block/blk-core.c +13 −8
  2850. block/blk-crypto-fallback.c +229 −226
  2851. block/blk-crypto-internal.h +13 −17
  2852. block/blk-crypto-profile.c +2 −4
  2853. block/blk-crypto-sysfs.c +1 −1
  2854. block/blk-crypto.c +23 −55
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  2856. block/blk-iocost.c +3 −3
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  2864. block/blk-mq-dma.c +14 −13
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  2871. block/blk-sysfs.c +49 −41
  2872. block/blk-wbt.c +115 −41
  2873. block/blk-wbt.h +2 −5
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  2884. block/kyber-iosched.c +5 −28
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  2890. block/partitions/ibm.c +3 −3
  2891. block/partitions/ldm.c +5 −5
  2892. block/sed-opal.c +4 −3
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  2894. certs/Makefile +3 −0
  2895. certs/blacklist.c +2 −1
  2896. certs/system_keyring.c +1 −1
  2897. crypto/Kconfig +11 −29
  2898. crypto/Makefile +5 −4
  2899. crypto/acompress.c +9 −15
  2900. crypto/adiantum.c +243 −199
  2901. crypto/aead.c +2 −3
  2902. crypto/aegis.h +1 −1
  2903. crypto/aes.c +66 −0
  2904. crypto/aes_generic.c +0 −1320
  2905. crypto/aes_ti.c +0 −83
  2906. crypto/af_alg.c +1 −1
  2907. crypto/ahash.c +6 −11
  2908. crypto/akcipher.c +2 −4
  2909. crypto/algapi.c +7 −9
  2910. crypto/algboss.c +2 −2
  2911. crypto/algif_rng.c +1 −1
  2912. crypto/api.c +2 −1
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  3631. drivers/clk/renesas/rzg2l-cpg.c +151 −38
  3632. drivers/clk/renesas/rzv2h-cpg.c +8 −7
  3633. drivers/clk/rockchip/clk-cpu.c +4 −4
  3634. drivers/clk/rockchip/clk-ddr.c +1 −1
  3635. drivers/clk/rockchip/clk-gate-grf.c +1 −1
  3636. drivers/clk/rockchip/clk-half-divider.c +3 −3
  3637. drivers/clk/rockchip/clk-inverter.c +1 −1
  3638. drivers/clk/rockchip/clk-mmc-phase.c +1 −1
  3639. drivers/clk/rockchip/clk-muxgrf.c +1 −1
  3640. drivers/clk/rockchip/clk-pll.c +1 −1
  3641. drivers/clk/rockchip/clk-rk3576.c +2 −2
  3642. drivers/clk/rockchip/clk.c +9 −9
  3643. drivers/clk/rockchip/softrst.c +1 −1
  3644. drivers/clk/samsung/clk-cpu.c +1 −1
  3645. drivers/clk/samsung/clk-exynos-arm64.c +78 −14
  3646. drivers/clk/samsung/clk-exynos4.c +6 −6
  3647. drivers/clk/samsung/clk-exynos4412-isp.c +2 −2
  3648. drivers/clk/samsung/clk-exynos5250.c +1 −1
  3649. drivers/clk/samsung/clk-exynos5420.c +2 −2
  3650. drivers/clk/samsung/clk-exynosautov920.c +40 −0
  3651. drivers/clk/samsung/clk-gs101.c +338 −0
  3652. drivers/clk/samsung/clk-pll.c +1 −1
  3653. drivers/clk/samsung/clk-s3c64xx.c +2 −2
  3654. drivers/clk/samsung/clk-s5pv210.c +1 −1
  3655. drivers/clk/samsung/clk.c +193 −21
  3656. drivers/clk/samsung/clk.h +53 −3
  3657. drivers/clk/socfpga/clk-gate-a10.c +1 −1
  3658. drivers/clk/socfpga/clk-gate-s10.c +3 −3
  3659. drivers/clk/socfpga/clk-gate.c +1 −1
  3660. drivers/clk/socfpga/clk-periph-a10.c +1 −1
  3661. drivers/clk/socfpga/clk-periph-s10.c +4 −4
  3662. drivers/clk/socfpga/clk-periph.c +1 −1
  3663. drivers/clk/socfpga/clk-pll-a10.c +1 −1
  3664. drivers/clk/socfpga/clk-pll-s10.c +4 −4
  3665. drivers/clk/socfpga/clk-pll.c +1 −1
  3666. drivers/clk/sophgo/clk-cv18xx-ip.c +85 −69
  3667. drivers/clk/sophgo/clk-sg2042-clkgen.c +5 −10
  3668. drivers/clk/spacemit/Kconfig +12 −8
  3669. drivers/clk/spacemit/Makefile +10 −2
  3670. drivers/clk/spacemit/ccu-k1.c +12 −180
.clang-format+1−0
@@ -259,6 +259,7 @@ ForEachMacros: · 258 unmodified lines
259 - 'for_each_collection'259 - 'for_each_collection'
260 - 'for_each_comp_order'260 - 'for_each_comp_order'
261 - 'for_each_compatible_node'261 - 'for_each_compatible_node'
262 - 'for_each_compatible_node_scoped'
262 - 'for_each_component_dais'263 - 'for_each_component_dais'
263 - 'for_each_component_dais_safe'264 - 'for_each_component_dais_safe'
264 - 'for_each_conduit'265 - 'for_each_conduit'
.editorconfig+1−3
@@ -1,8 +1,6 @@
1# SPDX-License-Identifier: GPL-2.0-only1# SPDX-License-Identifier: GPL-2.0-only
2 2
3root = true3[{*.{awk,c,dts,dtsi,dtso,h,mk,rst,s,S},Kconfig,Makefile,Makefile.*}]
4
5[{*.{awk,c,dts,dtsi,dtso,h,mk,s,S},Kconfig,Makefile,Makefile.*}]
6charset = utf-84charset = utf-8
7end_of_line = lf5end_of_line = lf
8insert_final_newline = true6insert_final_newline = true
.mailmap+16−2
@@ -12,6 +12,7 @@ · 11 unmodified lines
12#12#
13Aaron Durbin <adurbin@google.com>13Aaron Durbin <adurbin@google.com>
14Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>14Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
15Abel Vesa <abelvesa@kernel.org> <abel.vesa@linaro.org>
15Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>16Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
16Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>17Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
17Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>18Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
@@ -33,6 +34,7 @@ Alexander Lobakin <alobakin@pm.me> <alobakin@marvell.com> · 15 unmodified lines
33Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru>34Alexander Lobakin <alobakin@pm.me> <bloodyreaper@yandex.ru>
34Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>35Alexander Mikhalitsyn <alexander@mihalicyn.com> <alexander.mikhalitsyn@virtuozzo.com>
35Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>36Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@canonical.com>
37Alexander Mikhalitsyn <alexander@mihalicyn.com> <aleksandr.mikhalitsyn@futurfusion.io>
36Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin.ext@nsn.com>38Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin.ext@nsn.com>
37Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@gmx.de>39Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@gmx.de>
38Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nokia.com>40Alexander Sverdlin <alexander.sverdlin@gmail.com> <alexander.sverdlin@nokia.com>
@@ -150,6 +152,7 @@ Bjorn Andersson <andersson@kernel.org> <bjorn.andersson@sonymobile.com> · 111 unmodified lines
150Björn Steinbrink <B.Steinbrink@gmx.de>152Björn Steinbrink <B.Steinbrink@gmx.de>
151Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>153Björn Töpel <bjorn@kernel.org> <bjorn.topel@gmail.com>
152Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>154Björn Töpel <bjorn@kernel.org> <bjorn.topel@intel.com>
155Boqun Feng <boqun@kernel.org> <boqun.feng@gmail.com>
153Boris Brezillon <bbrezillon@kernel.org> <b.brezillon.dev@gmail.com>156Boris Brezillon <bbrezillon@kernel.org> <b.brezillon.dev@gmail.com>
154Boris Brezillon <bbrezillon@kernel.org> <b.brezillon@overkiz.com>157Boris Brezillon <bbrezillon@kernel.org> <b.brezillon@overkiz.com>
155Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>158Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com>
@@ -207,6 +210,7 @@ Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch> · 51 unmodified lines
207Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>210Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
208Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>211Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
209Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>212Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
213Daniel Thompson <danielt@kernel.org> <daniel.thompson@linaro.org>
210Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>214Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>
211David Brownell <david-b@pacbell.net>215David Brownell <david-b@pacbell.net>
212David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>216David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
@@ -374,7 +378,9 @@ Jesper Dangaard Brouer <hawk@kernel.org> <hawk@comx.dk> · 161 unmodified lines
374Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>378Jesper Dangaard Brouer <hawk@kernel.org> <jbrouer@redhat.com>
375Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>379Jesper Dangaard Brouer <hawk@kernel.org> <jdb@comx.dk>
376Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>380Jesper Dangaard Brouer <hawk@kernel.org> <netoptimizer@brouer.com>
377Jessica Zhang <quic_jesszhan@quicinc.com> <jesszhan@codeaurora.org>381Jessica Zhang <jesszhan0024@gmail.com> <jesszhan@codeaurora.org>
382Jessica Zhang <jesszhan0024@gmail.com> <quic_jesszhan@quicinc.com>
383Jessica Zhang <jesszhan0024@gmail.com> <jessica.zhang@oss.qualcomm.com>
378Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>384Jilai Wang <quic_jilaiw@quicinc.com> <jilaiw@codeaurora.org>
379Jiri Kosina <jikos@kernel.org> <jikos@jikos.cz>385Jiri Kosina <jikos@kernel.org> <jikos@jikos.cz>
380Jiri Kosina <jikos@kernel.org> <jkosina@suse.cz>386Jiri Kosina <jikos@kernel.org> <jkosina@suse.cz>
@@ -487,6 +493,7 @@ Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com> · 106 unmodified lines
487Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>493Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>
488Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>494Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
489Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>495Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>
496Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>
490Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>497Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
491Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>498Luo Jie <quic_luoj@quicinc.com> <luoj@codeaurora.org>
492Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com>499Lance Yang <lance.yang@linux.dev> <ioworker0@gmail.com>
@@ -556,6 +563,7 @@ Michel Dänzer <michel@tungstengraphics.com> · 63 unmodified lines
556Michel Lespinasse <michel@lespinasse.org>563Michel Lespinasse <michel@lespinasse.org>
557Michel Lespinasse <michel@lespinasse.org> <walken@google.com>564Michel Lespinasse <michel@lespinasse.org> <walken@google.com>
558Michel Lespinasse <michel@lespinasse.org> <walken@zoy.org>565Michel Lespinasse <michel@lespinasse.org> <walken@zoy.org>
566Mickaël Salaün <mic@digikod.net> <mic@linux.microsoft.com>
559Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>567Miguel Ojeda <ojeda@kernel.org> <miguel.ojeda.sandonis@gmail.com>
560Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>568Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
561Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>569Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
@@ -784,7 +792,8 @@ Subash Abhinov Kasiviswanathan <quic_subashab@quicinc.com> <subashab@codeaurora. · 222 unmodified lines
784Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org>792Subbaraman Narayanamurthy <quic_subbaram@quicinc.com> <subbaram@codeaurora.org>
785Subhash Jadavani <subhashj@codeaurora.org>793Subhash Jadavani <subhashj@codeaurora.org>
786Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>794Sudarshan Rajagopalan <quic_sudaraja@quicinc.com> <sudaraja@codeaurora.org>
787Sudeep Holla <sudeep.holla@arm.com> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>795Sudeep Holla <sudeep.holla@kernel.org> Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
796Sudeep Holla <sudeep.holla@kernel.org> <sudeep.holla@arm.com>
788Sumit Garg <sumit.garg@kernel.org> <sumit.garg@linaro.org>797Sumit Garg <sumit.garg@kernel.org> <sumit.garg@linaro.org>
789Sumit Semwal <sumit.semwal@ti.com>798Sumit Semwal <sumit.semwal@ti.com>
790Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>799Surabhi Vishnoi <quic_svishnoi@quicinc.com> <svishnoi@codeaurora.org>
@@ -794,7 +803,9 @@ Sven Eckelmann <sven@narfation.org> <sven.eckelmann@open-mesh.com> · 3 unmodified lines
794Sven Eckelmann <sven@narfation.org> <sven.eckelmann@openmesh.com>803Sven Eckelmann <sven@narfation.org> <sven.eckelmann@openmesh.com>
795Sven Eckelmann <sven@narfation.org> <sven@open-mesh.com>804Sven Eckelmann <sven@narfation.org> <sven@open-mesh.com>
796Sven Peter <sven@kernel.org> <sven@svenpeter.dev>805Sven Peter <sven@kernel.org> <sven@svenpeter.dev>
806Szymon Wilczek <swilczek.lx@gmail.com> <szymonwilczek@gmx.com>
797Takashi YOSHII <takashi.yoshii.zj@renesas.com>807Takashi YOSHII <takashi.yoshii.zj@renesas.com>
808Tamir Duberstein <tamird@kernel.org> <tamird@gmail.com>
798Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>809Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
799Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>810Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
800Tanzir Hasan <tanzhasanwork@gmail.com> <tanzirh@google.com>811Tanzir Hasan <tanzhasanwork@gmail.com> <tanzirh@google.com>
@@ -848,6 +859,7 @@ Valentin Schneider <vschneid@redhat.com> <valentin.schneider@arm.com> · 47 unmodified lines
848Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org>859Veera Sundaram Sankaran <quic_veeras@quicinc.com> <veeras@codeaurora.org>
849Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org>860Veerabhadrarao Badiganti <quic_vbadigan@quicinc.com> <vbadigan@codeaurora.org>
850Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org>861Venkateswara Naralasetty <quic_vnaralas@quicinc.com> <vnaralas@codeaurora.org>
862Viacheslav Bocharov <v@baodeep.com> <adeep@lexina.in>
851Vikash Garodia <vikash.garodia@oss.qualcomm.com> <vgarodia@codeaurora.org>863Vikash Garodia <vikash.garodia@oss.qualcomm.com> <vgarodia@codeaurora.org>
852Vikash Garodia <vikash.garodia@oss.qualcomm.com> <quic_vgarodia@quicinc.com>864Vikash Garodia <vikash.garodia@oss.qualcomm.com> <quic_vgarodia@quicinc.com>
853Vincent Mailhol <mailhol@kernel.org> <mailhol.vincent@wanadoo.fr>865Vincent Mailhol <mailhol@kernel.org> <mailhol.vincent@wanadoo.fr>
@@ -876,6 +888,8 @@ Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de> · 22 unmodified lines
876Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>888Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
877Yanteng Si <si.yanteng@linux.dev> <siyanteng@loongson.cn>889Yanteng Si <si.yanteng@linux.dev> <siyanteng@loongson.cn>
878Ying Huang <huang.ying.caritas@gmail.com> <ying.huang@intel.com>890Ying Huang <huang.ying.caritas@gmail.com> <ying.huang@intel.com>
891Yixun Lan <dlan@kernel.org> <dlan@gentoo.org>
892Yixun Lan <dlan@kernel.org> <yixun.lan@amlogic.com>
879Yosry Ahmed <yosry.ahmed@linux.dev> <yosryahmed@google.com>893Yosry Ahmed <yosry.ahmed@linux.dev> <yosryahmed@google.com>
880Yu-Chun Lin <eleanor.lin@realtek.com> <eleanor15x@gmail.com>894Yu-Chun Lin <eleanor.lin@realtek.com> <eleanor15x@gmail.com>
881Yusuke Goda <goda.yusuke@renesas.com>895Yusuke Goda <goda.yusuke@renesas.com>
CREDITS+23−5
@@ -695,7 +695,7 @@ S: USA · 694 unmodified lines
695N: Chih-Jen Chang695N: Chih-Jen Chang
696E: chihjenc@scf.usc.edu696E: chihjenc@scf.usc.edu
697E: chihjen@iis.sinica.edu.tw697E: chihjen@iis.sinica.edu.tw
698D: IGMP(Internet Group Management Protocol) version 2698D: IGMP (Internet Group Management Protocol) version 2
699S: 3F, 65 Tajen street699S: 3F, 65 Tajen street
700S: Tamsui town, Taipei county,700S: Tamsui town, Taipei county,
701S: Taiwan 251701S: Taiwan 251
@@ -1997,7 +1997,7 @@ E: bkaindl@netway.at · 1295 unmodified lines
1997E: edv@bartelt.via.at1997E: edv@bartelt.via.at
1998D: Author of a menu based configuration tool, kmenu, which1998D: Author of a menu based configuration tool, kmenu, which
1999D: is the predecessor of 'make menuconfig' and 'make xconfig'.1999D: is the predecessor of 'make menuconfig' and 'make xconfig'.
2000D: digiboard driver update(modularisation work and 2.1.x upd)2000D: digiboard driver update (modularisation work and 2.1.x upd)
2001S: Tallak 952001S: Tallak 95
2002S: 8103 Rein2002S: 8103 Rein
2003S: Austria2003S: Austria
@@ -2231,6 +2231,10 @@ S: Markham, Ontario · 227 unmodified lines
2231S: L3R 8B22231S: L3R 8B2
2232S: Canada2232S: Canada
2233 2233
2234N: Krzysztof Kozlowski
2235E: krzk@kernel.org
2236D: NFC network subsystem and drivers maintainer
2237
2234N: Christian Krafft2238N: Christian Krafft
2235D: PowerPC Cell support2239D: PowerPC Cell support
2236 2240
@@ -2659,6 +2663,10 @@ S: 3404 E. Harmony Road · 422 unmodified lines
2659S: Fort Collins, CO 805282663S: Fort Collins, CO 80528
2660S: USA2664S: USA
2661 2665
2666N: Jon Mason
2667E: jdmason@kudzu.us
2668D: Neterion 10GbE drivers (s2io/vxge)
2669
2662N: Torben Mathiasen2670N: Torben Mathiasen
2663E: torben.mathiasen@compaq.com2671E: torben.mathiasen@compaq.com
2664E: torben@kernel.dk2672E: torben@kernel.dk
@@ -3484,7 +3492,8 @@ S: Brazil · 819 unmodified lines
3484N: Stephen Rothwell3492N: Stephen Rothwell
3485E: sfr@canb.auug.org.au3493E: sfr@canb.auug.org.au
3486W: http://www.canb.auug.org.au/~sfr3494W: http://www.canb.auug.org.au/~sfr
3487P: 1024/BD8C7805 CD A4 9D 01 10 6E 7E 3B 91 88 FA D9 C8 40 AA 023495P: 4096R/5AD24211C060D1C8 D41C A3ED 5B30 275C F5A0 1B05 5AD2 4211 C060 D1C8
3496D: Created linux-next and maintained it 2008-2026
3488D: Boot/setup/build work for setup > 2K3497D: Boot/setup/build work for setup > 2K
3489D: Author, APM driver3498D: Author, APM driver
3490D: Directory notification3499D: Directory notification
@@ -3609,7 +3618,7 @@ S: Finland · 118 unmodified lines
3609N: Deepak Saxena3618N: Deepak Saxena
3610E: dsaxena@plexity.net3619E: dsaxena@plexity.net
3611D: I2O kernel layer (config, block, core, pci, net). I2O disk support for LILO3620D: I2O kernel layer (config, block, core, pci, net). I2O disk support for LILO
3612D: XScale(IOP, IXP) porting and other random ARM bits3621D: XScale (IOP, IXP) porting and other random ARM bits
3613S: Portland, OR3622S: Portland, OR
3614 3623
3615N: Eric Schenk3624N: Eric Schenk
@@ -3767,6 +3776,11 @@ S: 10 Stockalls Place · 151 unmodified lines
3767S: Minto, NSW, 25663776S: Minto, NSW, 2566
3768S: Australia3777S: Australia
3769 3778
3779N: Tim Small
3780E: tim@buttersideup.com
3781D: Intel 82443BX/GX (440BX/GX chipset) EDAC driver
3782D: Radisys 82600 embedded chipset EDAC driver
3783
3770N: Stephen Smalley3784N: Stephen Smalley
3771E: sds@tycho.nsa.gov3785E: sds@tycho.nsa.gov
3772D: portions of the Linux Security Module (LSM) framework and security modules3786D: portions of the Linux Security Module (LSM) framework and security modules
@@ -3801,6 +3815,10 @@ S: Post Office Box 500 · 28 unmodified lines
3801S: Batavia, Illinois 605103815S: Batavia, Illinois 60510
3802S: USA3816S: USA
3803 3817
3818N: Jes Sorensen
3819E: jes@trained-monkey.org
3820D: HIPPI support and Essential RoadRunner driver
3821
3804N: Leo Spiekman3822N: Leo Spiekman
3805E: leo@netlabs.net3823E: leo@netlabs.net
3806W: http://www.netlabs.net/hp/leo/3824W: http://www.netlabs.net/hp/leo/
@@ -3986,7 +4004,7 @@ S: D-50968 Köln · 179 unmodified lines
3986 4004
3987N: Tsu-Sheng Tsao4005N: Tsu-Sheng Tsao
3988E: tsusheng@scf.usc.edu4006E: tsusheng@scf.usc.edu
3989D: IGMP(Internet Group Management Protocol) version 24007D: IGMP (Internet Group Management Protocol) version 2
3990S: 2F 14 ALY 31 LN 166 SEC 1 SHIH-PEI RD4008S: 2F 14 ALY 31 LN 166 SEC 1 SHIH-PEI RD
3991S: Taipei4009S: Taipei
3992S: Taiwan 1124010S: Taiwan 112
Documentation/.renames.txt+0−1
@@ -819,7 +819,6 @@ networking/device_drivers/intel/ixgbe networking/device_drivers/ethernet/intel/i · 818 unmodified lines
819networking/device_drivers/intel/ixgbevf networking/device_drivers/ethernet/intel/ixgbevf819networking/device_drivers/intel/ixgbevf networking/device_drivers/ethernet/intel/ixgbevf
820networking/device_drivers/marvell/octeontx2 networking/device_drivers/ethernet/marvell/octeontx2820networking/device_drivers/marvell/octeontx2 networking/device_drivers/ethernet/marvell/octeontx2
821networking/device_drivers/microsoft/netvsc networking/device_drivers/ethernet/microsoft/netvsc821networking/device_drivers/microsoft/netvsc networking/device_drivers/ethernet/microsoft/netvsc
822networking/device_drivers/neterion/s2io networking/device_drivers/ethernet/neterion/s2io
823networking/device_drivers/netronome/nfp networking/device_drivers/ethernet/netronome/nfp822networking/device_drivers/netronome/nfp networking/device_drivers/ethernet/netronome/nfp
824networking/device_drivers/pensando/ionic networking/device_drivers/ethernet/pensando/ionic823networking/device_drivers/pensando/ionic networking/device_drivers/ethernet/pensando/ionic
825networking/device_drivers/qualcomm/rmnet networking/device_drivers/cellular/qualcomm/rmnet824networking/device_drivers/qualcomm/rmnet networking/device_drivers/cellular/qualcomm/rmnet
Documentation/ABI/stable/sysfs-block+45−0
@@ -609,6 +609,51 @@ Description: · 608 unmodified lines
609 enabled, and whether tags are shared.609 enabled, and whether tags are shared.
610 610
611 611
612What: /sys/block/<disk>/queue/async_depth
613Date: August 2025
614Contact: linux-block@vger.kernel.org
615Description:
616 [RW] Controls how many asynchronous requests may be allocated
617 in the block layer. The value is always capped at nr_requests.
618
619 When no elevator is active (none):
620
621 - async_depth is always equal to nr_requests.
622
623 For bfq scheduler:
624
625 - By default, async_depth is set to 75% of nr_requests.
626 Internal limits are then derived from this value:
627
628 * Sync writes: limited to async_depth (≈75% of nr_requests).
629 * Async I/O: limited to ~2/3 of async_depth (≈50% of
630 nr_requests).
631
632 If a bfq_queue is weight-raised:
633
634 * Sync writes: limited to ~1/2 of async_depth (≈37% of
635 nr_requests).
636 * Async I/O: limited to ~1/4 of async_depth (≈18% of
637 nr_requests).
638
639 - If the user writes a custom value to async_depth, BFQ will
640 recompute these limits proportionally based on the new value.
641
642 For Kyber:
643
644 - By default async_depth is set to 75% of nr_requests.
645 - If the user writes a custom value to async_depth, then it
646 overrides the default and directly controls the limit for
647 writes and async I/O.
648
649 For mq-deadline:
650
651 - By default async_depth is set to nr_requests.
652 - If the user writes a custom value to async_depth, then it
653 overrides the default and directly controls the limit for
654 writes and async I/O.
655
656
612What: /sys/block/<disk>/queue/nr_zones657What: /sys/block/<disk>/queue/nr_zones
613Date: November 2018658Date: November 2018
614Contact: Damien Le Moal <damien.lemoal@wdc.com>659Contact: Damien Le Moal <damien.lemoal@wdc.com>
Documentation/ABI/stable/sysfs-driver-dma-idxd+15−0
@@ -136,6 +136,21 @@ Description: The last executed device administrative command's status/error. · 135 unmodified lines
136 Also last configuration error overloaded.136 Also last configuration error overloaded.
137 Writing to it will clear the status.137 Writing to it will clear the status.
138 138
139What: /sys/bus/dsa/devices/dsa<m>/dsacaps
140Date: April 5, 2026
141KernelVersion: 6.20.0
142Contact: dmaengine@vger.kernel.org
143Description: The DSA3 specification introduces three new capability
144 registers: dsacap[0-2]. User components (e.g., configuration
145 libraries and workload applications) require this information
146 to properly utilize the DSA3 features.
147 This includes SGL capability support, Enabling hardware-specific
148 optimizations, Configuring memory, etc.
149 The output format is '<dsacap2>,<dsacap1>,<dsacap0>' where each
150 DSA cap value is a 64 bit hex value.
151 This attribute should only be visible on DSA devices of version
152 3 or later.
153
139What: /sys/bus/dsa/devices/dsa<m>/iaa_cap154What: /sys/bus/dsa/devices/dsa<m>/iaa_cap
140Date: Sept 14, 2022155Date: Sept 14, 2022
141KernelVersion: 6.0.0156KernelVersion: 6.0.0
Documentation/ABI/stable/sysfs-driver-speakup+1−2
@@ -23,8 +23,7 @@ What: /sys/accessibility/speakup/bleep_time · 22 unmodified lines
23KernelVersion: 2.623KernelVersion: 2.6
24Contact: speakup@linux-speakup.org24Contact: speakup@linux-speakup.org
25Description: This controls the duration of the PC speaker beeps speakup25Description: This controls the duration of the PC speaker beeps speakup
26 produces.26 produces, in milliseconds.
27 TODO: What are the units? Jiffies?
28 27
29What: /sys/accessibility/speakup/cursor_time28What: /sys/accessibility/speakup/cursor_time
30KernelVersion: 2.629KernelVersion: 2.6
Documentation/ABI/testing/configfs-tsm-report+16−0
@@ -17,6 +17,12 @@ Description: · 16 unmodified lines
17 where the implementation is conveyed via the @provider17 where the implementation is conveyed via the @provider
18 attribute.18 attribute.
19 19
20 This interface fails reads and sets errno to EFBIG when the
21 report generated by @provider exceeds the configfs-tsm-report
22 internal maximums. Contact the platform provider for the
23 compatible security module, driver, and attestation library
24 combination.
25
20What: /sys/kernel/config/tsm/report/$name/auxblob26What: /sys/kernel/config/tsm/report/$name/auxblob
21Date: October, 202327Date: October, 2023
22KernelVersion: v6.728KernelVersion: v6.7
@@ -31,6 +37,9 @@ Description: · 8 unmodified lines
31 Standardization v2.03 Section 4.1.8.1 MSG_REPORT_REQ.37 Standardization v2.03 Section 4.1.8.1 MSG_REPORT_REQ.
32 https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf38 https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/specifications/56421.pdf
33 39
40 See "EFBIG" comment in the @outblob description for potential
41 error conditions.
42
34What: /sys/kernel/config/tsm/report/$name/manifestblob43What: /sys/kernel/config/tsm/report/$name/manifestblob
35Date: January, 202444Date: January, 2024
36KernelVersion: v6.1045KernelVersion: v6.10
@@ -43,6 +52,9 @@ Description: · 6 unmodified lines
43 See 'service_provider' for information on the format of the52 See 'service_provider' for information on the format of the
44 manifest blob.53 manifest blob.
45 54
55 See "EFBIG" comment in the @outblob description for potential
56 error conditions.
57
46What: /sys/kernel/config/tsm/report/$name/provider58What: /sys/kernel/config/tsm/report/$name/provider
47Date: September, 202359Date: September, 2023
48KernelVersion: v6.760KernelVersion: v6.7
@@ -61,6 +73,10 @@ Description: · 12 unmodified lines
61 Library Revision 0.8 Appendix 4,573 Library Revision 0.8 Appendix 4,5
62 https://download.01.org/intel-sgx/latest/dcap-latest/linux/docs/Intel_TDX_DCAP_Quoting_Library_API.pdf74 https://download.01.org/intel-sgx/latest/dcap-latest/linux/docs/Intel_TDX_DCAP_Quoting_Library_API.pdf
63 75
76 Intel TDX platforms with DICE-based attestation use CBOR Web Token
77 (CWT) format for the Quote payload. This is indicated by the Quote
78 size exceeding 8KB.
79
64What: /sys/kernel/config/tsm/report/$name/generation80What: /sys/kernel/config/tsm/report/$name/generation
65Date: September, 202381Date: September, 2023
66KernelVersion: v6.782KernelVersion: v6.7
Documentation/ABI/testing/configfs-usb-gadget-midi+9−8
@@ -4,11 +4,12 @@ KernelVersion: 3.19 · 3 unmodified lines
4Description:4Description:
5 The attributes:5 The attributes:
6 6
7 ========== ====================================7 ================ ====================================
8 index index value for the USB MIDI adapter8 index index value for the USB MIDI adapter
9 id ID string for the USB MIDI adapter9 id ID string for the USB MIDI adapter
10 buflen MIDI buffer length10 buflen MIDI buffer length
11 qlen USB read request queue length11 qlen USB read request queue length
12 in_ports number of MIDI input ports12 in_ports number of MIDI input ports
13 out_ports number of MIDI output ports13 out_ports number of MIDI output ports
14 ========== ====================================14 interface_string USB AudioControl interface string
15 ================ ====================================
Documentation/ABI/testing/pstore+1−1
@@ -26,7 +26,7 @@ Description: Generic interface to platform dependent persistent storage. · 25 unmodified lines
26 26
27 Once the information in a file has been read, removing27 Once the information in a file has been read, removing
28 the file will signal to the underlying persistent storage28 the file will signal to the underlying persistent storage
29 device that it can reclaim the space for later re-use::29 device that it can reclaim the space for later reuse::
30 30
31 $ rm /sys/fs/pstore/dmesg-erst-131 $ rm /sys/fs/pstore/dmesg-erst-1
32 32
Documentation/ABI/testing/sysfs-block-zram+14−0
@@ -150,3 +150,17 @@ Contact: Sergey Senozhatsky <senozhatsky@chromium.org> · 149 unmodified lines
150Description:150Description:
151 The algorithm_params file is write-only and is used to setup151 The algorithm_params file is write-only and is used to setup
152 compression algorithm parameters.152 compression algorithm parameters.
153
154What: /sys/block/zram<id>/writeback_compressed
155Date: Decemeber 2025
156Contact: Richard Chang <richardycc@google.com>
157Description:
158 The writeback_compressed device atrribute toggles compressed
159 writeback feature.
160
161What: /sys/block/zram<id>/writeback_batch_size
162Date: November 2025
163Contact: Sergey Senozhatsky <senozhatsky@chromium.org>
164Description:
165 The writeback_batch_size device atrribute sets the maximum
166 number of in-flight writeback operations.
Documentation/ABI/testing/sysfs-bus-coresight-devices-dummy-source+2−2
@@ -1,7 +1,7 @@
1What: /sys/bus/coresight/devices/dummy_source<N>/enable_source1What: /sys/bus/coresight/devices/dummy_source<N>/enable_source
2Date: Dec 20242Date: Dec 2024
3KernelVersion: 6.143KernelVersion: 6.14
4Contact: Mao Jinlong <quic_jinlmao@quicinc.com>4Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
5Description: (RW) Enable/disable tracing of dummy source. A sink should be activated5Description: (RW) Enable/disable tracing of dummy source. A sink should be activated
6 before enabling the source. The path of coresight components linking6 before enabling the source. The path of coresight components linking
7 the source to the sink is configured and managed automatically by the7 the source to the sink is configured and managed automatically by the
@@ -10,7 +10,7 @@ Description: (RW) Enable/disable tracing of dummy source. A sink should be activ · 2 unmodified lines
10What: /sys/bus/coresight/devices/dummy_source<N>/traceid10What: /sys/bus/coresight/devices/dummy_source<N>/traceid
11Date: Dec 202411Date: Dec 2024
12KernelVersion: 6.1412KernelVersion: 6.14
13Contact: Mao Jinlong <quic_jinlmao@quicinc.com>13Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
14Description: (R) Show the trace ID that will appear in the trace stream14Description: (R) Show the trace ID that will appear in the trace stream
15 coming from this trace entity.15 coming from this trace entity.
16 16
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpda+69−0
@@ -0,0 +1,69 @@
1What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable
2Date: December 2025
3KernelVersion: 6.20
4Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
5Description:
6 (RW) Enable/disable cross trigger synchronization sequence interface.
7
8What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable
9Date: December 2025
10KernelVersion: 6.20
11Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
12Description:
13 (RW) Enable/disable cross trigger FLAG packet request interface.
14
15What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable
16Date: December 2025
17KernelVersion: 6.20
18Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
19Description:
20 (RW) Enable/disable cross trigger FREQ packet request interface.
21
22What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable
23Date: December 2025
24KernelVersion: 6.20
25Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
26Description:
27 (RW) Enable/disable the timestamp for all FREQ packets.
28
29What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode
30Date: December 2025
31KernelVersion: 6.20
32Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
33Description:
34 (RW) Configure the CMB/MCMB channel mode for all enabled ports.
35 Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
36
37What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req
38Date: December 2025
39KernelVersion: 6.20
40Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
41Description:
42 (RW) Set global (all ports) flush request bit. The bit remains set until a
43 global flush request sequence completes.
44
45What: /sys/bus/coresight/devices/<tpda-name>/syncr_mode
46Date: December 2025
47KernelVersion: 6.20
48Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
49Description:
50 (RW) Set mode the of the syncr counter.
51 mode 0 - COUNT[11:0] value represents the approximate number of bytes moved between two ASYNC packet requests
52 mode 1 - the bits COUNT[11:7] are used as a power of 2. for example, we could insert an async packet every 8K
53 data by writing a value 13 to the COUNT[11:7] field.
54
55What: /sys/bus/coresight/devices/<tpda-name>/syncr_count
56Date: December 2025
57KernelVersion: 6.20
58Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
59Description:
60 (RW) Set value the of the syncr counter.
61 Range: 0-4095
62
63What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
64Date: December 2025
65KernelVersion: 6.20
66Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
67Description:
68 (RW) Configure the bit i to requests a flush operation of port i on the TPDA.
69 The requested bit(s) remain set until the flush request completes.
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm+28−28
@@ -1,7 +1,7 @@
1What: /sys/bus/coresight/devices/<tpdm-name>/integration_test1What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
2Date: January 20232Date: January 2023
3KernelVersion: 6.23KernelVersion: 6.2
4Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>4Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
5Description:5Description:
6 (Write) Run integration test for tpdm. Integration test6 (Write) Run integration test for tpdm. Integration test
7 will generate test data for tpdm. It can help to make7 will generate test data for tpdm. It can help to make
@@ -15,7 +15,7 @@ Description: · 7 unmodified lines
15What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset15What: /sys/bus/coresight/devices/<tpdm-name>/reset_dataset
16Date: March 202316Date: March 2023
17KernelVersion: 6.717KernelVersion: 6.7
18Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>18Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
19Description:19Description:
20 (Write) Reset the dataset of the tpdm.20 (Write) Reset the dataset of the tpdm.
21 21
@@ -25,7 +25,7 @@ Description: · 3 unmodified lines
25What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type25What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_type
26Date: March 202326Date: March 2023
27KernelVersion: 6.727KernelVersion: 6.7
28Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>28Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
29Description:29Description:
30 (RW) Set/Get the trigger type of the DSB for tpdm.30 (RW) Set/Get the trigger type of the DSB for tpdm.
31 31
@@ -36,7 +36,7 @@ Description: · 4 unmodified lines
36What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts36What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_ts
37Date: March 202337Date: March 2023
38KernelVersion: 6.738KernelVersion: 6.7
39Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>39Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
40Description:40Description:
41 (RW) Set/Get the trigger timestamp of the DSB for tpdm.41 (RW) Set/Get the trigger timestamp of the DSB for tpdm.
42 42
@@ -47,7 +47,7 @@ Description: · 4 unmodified lines
47What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode47What: /sys/bus/coresight/devices/<tpdm-name>/dsb_mode
48Date: March 202348Date: March 2023
49KernelVersion: 6.749KernelVersion: 6.7
50Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>50Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
51Description:51Description:
52 (RW) Set/Get the programming mode of the DSB for tpdm.52 (RW) Set/Get the programming mode of the DSB for tpdm.
53 53
@@ -61,7 +61,7 @@ Description: · 7 unmodified lines
61What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx61What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_idx
62Date: March 202362Date: March 2023
63KernelVersion: 6.763KernelVersion: 6.7
64Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>64Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
65Description:65Description:
66 (RW) Set/Get the index number of the edge detection for the DSB66 (RW) Set/Get the index number of the edge detection for the DSB
67 subunit TPDM. Since there are at most 256 edge detections, this67 subunit TPDM. Since there are at most 256 edge detections, this
@@ -70,7 +70,7 @@ Description: · 2 unmodified lines
70What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val70What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_val
71Date: March 202371Date: March 2023
72KernelVersion: 6.772KernelVersion: 6.7
73Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>73Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
74Description:74Description:
75 Write a data to control the edge detection corresponding to75 Write a data to control the edge detection corresponding to
76 the index number. Before writing data to this sysfs file,76 the index number. Before writing data to this sysfs file,
@@ -86,7 +86,7 @@ Description: · 9 unmodified lines
86What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask86What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/ctrl_mask
87Date: March 202387Date: March 2023
88KernelVersion: 6.788KernelVersion: 6.7
89Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>89Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
90Description:90Description:
91 Write a data to mask the edge detection corresponding to the index91 Write a data to mask the edge detection corresponding to the index
92 number. Before writing data to this sysfs file, "ctrl_idx" should92 number. Before writing data to this sysfs file, "ctrl_idx" should
@@ -98,21 +98,21 @@ Description: · 5 unmodified lines
98What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]98What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcr[0:15]
99Date: March 202399Date: March 2023
100KernelVersion: 6.7100KernelVersion: 6.7
101Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>101Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
102Description:102Description:
103 Read a set of the edge control value of the DSB in TPDM.103 Read a set of the edge control value of the DSB in TPDM.
104 104
105What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]105What: /sys/bus/coresight/devices/<tpdm-name>/dsb_edge/edcmr[0:7]
106Date: March 2023106Date: March 2023
107KernelVersion: 6.7107KernelVersion: 6.7
108Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>108Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
109Description:109Description:
110 Read a set of the edge control mask of the DSB in TPDM.110 Read a set of the edge control mask of the DSB in TPDM.
111 111
112What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]112What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpr[0:7]
113Date: March 2023113Date: March 2023
114KernelVersion: 6.7114KernelVersion: 6.7
115Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>115Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
116Description:116Description:
117 (RW) Set/Get the value of the trigger pattern for the DSB117 (RW) Set/Get the value of the trigger pattern for the DSB
118 subunit TPDM.118 subunit TPDM.
@@ -120,7 +120,7 @@ Description: · 1 unmodified line
120What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]120What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt/xpmr[0:7]
121Date: March 2023121Date: March 2023
122KernelVersion: 6.7122KernelVersion: 6.7
123Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>123Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
124Description:124Description:
125 (RW) Set/Get the mask of the trigger pattern for the DSB125 (RW) Set/Get the mask of the trigger pattern for the DSB
126 subunit TPDM.126 subunit TPDM.
@@ -128,21 +128,21 @@ Description: · 1 unmodified line
128What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]128What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:7]
129Date: March 2023129Date: March 2023
130KernelVersion: 6.7130KernelVersion: 6.7
131Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>131Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
132Description:132Description:
133 (RW) Set/Get the value of the pattern for the DSB subunit TPDM.133 (RW) Set/Get the value of the pattern for the DSB subunit TPDM.
134 134
135What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]135What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:7]
136Date: March 2023136Date: March 2023
137KernelVersion: 6.7137KernelVersion: 6.7
138Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>138Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
139Description:139Description:
140 (RW) Set/Get the mask of the pattern for the DSB subunit TPDM.140 (RW) Set/Get the mask of the pattern for the DSB subunit TPDM.
141 141
142What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts142What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/enable_ts
143Date: March 2023143Date: March 2023
144KernelVersion: 6.7144KernelVersion: 6.7
145Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>145Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
146Description:146Description:
147 (Write) Set the pattern timestamp of DSB tpdm. Read147 (Write) Set the pattern timestamp of DSB tpdm. Read
148 the pattern timestamp of DSB tpdm.148 the pattern timestamp of DSB tpdm.
@@ -154,7 +154,7 @@ Description: · 5 unmodified lines
154What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type154What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/set_type
155Date: March 2023155Date: March 2023
156KernelVersion: 6.7156KernelVersion: 6.7
157Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>157Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
158Description:158Description:
159 (Write) Set the pattern type of DSB tpdm. Read159 (Write) Set the pattern type of DSB tpdm. Read
160 the pattern type of DSB tpdm.160 the pattern type of DSB tpdm.
@@ -166,7 +166,7 @@ Description: · 5 unmodified lines
166What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]166What: /sys/bus/coresight/devices/<tpdm-name>/dsb_msr/msr[0:31]
167Date: March 2023167Date: March 2023
168KernelVersion: 6.7168KernelVersion: 6.7
169Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>169Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
170Description:170Description:
171 (RW) Set/Get the MSR(mux select register) for the DSB subunit171 (RW) Set/Get the MSR(mux select register) for the DSB subunit
172 TPDM.172 TPDM.
@@ -174,7 +174,7 @@ Description: · 1 unmodified line
174What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode174What: /sys/bus/coresight/devices/<tpdm-name>/cmb_mode
175Date: January 2024175Date: January 2024
176KernelVersion: 6.9176KernelVersion: 6.9
177Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>177Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
178Description: (Write) Set the data collection mode of CMB tpdm. Continuous178Description: (Write) Set the data collection mode of CMB tpdm. Continuous
179 change creates CMB data set elements on every CMBCLK edge.179 change creates CMB data set elements on every CMBCLK edge.
180 Trace-on-change creates CMB data set elements only when a new180 Trace-on-change creates CMB data set elements only when a new
@@ -188,7 +188,7 @@ Description: (Write) Set the data collection mode of CMB tpdm. Continuous · 7 unmodified lines
188What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]188What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpr[0:1]
189Date: January 2024189Date: January 2024
190KernelVersion: 6.9190KernelVersion: 6.9
191Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>191Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
192Description:192Description:
193 (RW) Set/Get the value of the trigger pattern for the CMB193 (RW) Set/Get the value of the trigger pattern for the CMB
194 subunit TPDM.194 subunit TPDM.
@@ -196,7 +196,7 @@ Description: · 1 unmodified line
196What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]196What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_patt/xpmr[0:1]
197Date: January 2024197Date: January 2024
198KernelVersion: 6.9198KernelVersion: 6.9
199Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>199Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
200Description:200Description:
201 (RW) Set/Get the mask of the trigger pattern for the CMB201 (RW) Set/Get the mask of the trigger pattern for the CMB
202 subunit TPDM.202 subunit TPDM.
@@ -204,21 +204,21 @@ Description: · 1 unmodified line
204What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]204What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpr[0:1]
205Date: January 2024205Date: January 2024
206KernelVersion: 6.9206KernelVersion: 6.9
207Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>207Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
208Description:208Description:
209 (RW) Set/Get the value of the pattern for the CMB subunit TPDM.209 (RW) Set/Get the value of the pattern for the CMB subunit TPDM.
210 210
211What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]211What: /sys/bus/coresight/devices/<tpdm-name>/dsb_patt/tpmr[0:1]
212Date: January 2024212Date: January 2024
213KernelVersion: 6.9213KernelVersion: 6.9
214Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>214Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
215Description:215Description:
216 (RW) Set/Get the mask of the pattern for the CMB subunit TPDM.216 (RW) Set/Get the mask of the pattern for the CMB subunit TPDM.
217 217
218What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts218What: /sys/bus/coresight/devices/<tpdm-name>/cmb_patt/enable_ts
219Date: January 2024219Date: January 2024
220KernelVersion: 6.9220KernelVersion: 6.9
221Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>221Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
222Description:222Description:
223 (Write) Set the pattern timestamp of CMB tpdm. Read223 (Write) Set the pattern timestamp of CMB tpdm. Read
224 the pattern timestamp of CMB tpdm.224 the pattern timestamp of CMB tpdm.
@@ -230,7 +230,7 @@ Description: · 5 unmodified lines
230What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts230What: /sys/bus/coresight/devices/<tpdm-name>/cmb_trig_ts
231Date: January 2024231Date: January 2024
232KernelVersion: 6.9232KernelVersion: 6.9
233Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>233Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
234Description:234Description:
235 (RW) Set/Get the trigger timestamp of the CMB for tpdm.235 (RW) Set/Get the trigger timestamp of the CMB for tpdm.
236 236
@@ -241,7 +241,7 @@ Description: · 4 unmodified lines
241What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all241What: /sys/bus/coresight/devices/<tpdm-name>/cmb_ts_all
242Date: January 2024242Date: January 2024
243KernelVersion: 6.9243KernelVersion: 6.9
244Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>244Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
245Description:245Description:
246 (RW) Read or write the status of timestamp upon all interface.246 (RW) Read or write the status of timestamp upon all interface.
247 Only value 0 and 1 can be written to this node. Set this node to 1 to request247 Only value 0 and 1 can be written to this node. Set this node to 1 to request
@@ -253,7 +253,7 @@ Description: · 5 unmodified lines
253What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]253What: /sys/bus/coresight/devices/<tpdm-name>/cmb_msr/msr[0:31]
254Date: January 2024254Date: January 2024
255KernelVersion: 6.9255KernelVersion: 6.9
256Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>256Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
257Description:257Description:
258 (RW) Set/Get the MSR(mux select register) for the CMB subunit258 (RW) Set/Get the MSR(mux select register) for the CMB subunit
259 TPDM.259 TPDM.
@@ -261,7 +261,7 @@ Description: · 1 unmodified line
261What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane261What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_trig_lane
262Date: Feb 2025262Date: Feb 2025
263KernelVersion 6.15263KernelVersion 6.15
264Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>264Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
265Description:265Description:
266 (RW) Set/Get which lane participates in the output pattern266 (RW) Set/Get which lane participates in the output pattern
267 match cross trigger mechanism for the MCMB subunit TPDM.267 match cross trigger mechanism for the MCMB subunit TPDM.
@@ -269,7 +269,7 @@ Description: · 1 unmodified line
269What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select269What: /sys/bus/coresight/devices/<tpdm-name>/mcmb_lanes_select
270Date: Feb 2025270Date: Feb 2025
271KernelVersion 6.15271KernelVersion 6.15
272Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>272Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>
273Description:273Description:
274 (RW) Set/Get the enablement of the individual lane.274 (RW) Set/Get the enablement of the individual lane.
275 275
Documentation/ABI/testing/sysfs-bus-event_source-devices-rdpmc+44−0
@@ -0,0 +1,44 @@
1What: /sys/bus/event_source/devices/cpu.../rdpmc
2Date: November 2011
3KernelVersion: 3.10
4Contact: Linux kernel mailing list linux-kernel@vger.kernel.org
5Description: The /sys/bus/event_source/devices/cpu.../rdpmc attribute
6 is used to show/manage if rdpmc instruction can be
7 executed in user space. This attribute supports 3 numbers.
8 - rdpmc = 0
9 user space rdpmc is globally disabled for all PMU
10 counters.
11 - rdpmc = 1
12 user space rdpmc is globally enabled only in event mmap
13 ioctl called time window. If the mmap region is unmapped,
14 user space rdpmc is disabled again.
15 - rdpmc = 2
16 user space rdpmc is globally enabled for all PMU
17 counters.
18
19 In the Intel platforms supporting counter level's user
20 space rdpmc disable feature (CPUID.23H.EBX[2] = 1), the
21 meaning of 3 numbers is extended to
22 - rdpmc = 0
23 global user space rdpmc and counter level's user space
24 rdpmc of all counters are both disabled.
25 - rdpmc = 1
26 No changes on behavior of global user space rdpmc.
27 counter level's rdpmc of system-wide events is disabled
28 but counter level's rdpmc of non-system-wide events is
29 enabled.
30 - rdpmc = 2
31 global user space rdpmc and counter level's user space
32 rdpmc of all counters are both enabled unconditionally.
33
34 The default value of rdpmc is 1.
35
36 Please notice:
37 - global user space rdpmc's behavior would change
38 immediately along with the rdpmc value's change,
39 but the behavior of counter level's user space rdpmc
40 won't take effect immediately until the event is
41 reactivated or recreated.
42 - The rdpmc attribute is global, even for x86 hybrid
43 platforms. For example, changing cpu_core/rdpmc will
44 also change cpu_atom/rdpmc.
Documentation/ABI/testing/sysfs-bus-i3c+11−0
@@ -161,3 +161,14 @@ Contact: linux-i3c@vger.kernel.org · 160 unmodified lines
161Description:161Description:
162 These directories are just symbolic links to162 These directories are just symbolic links to
163 /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>.163 /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>.
164
165What: /sys/bus/i3c/devices/i3c-<bus-id>/<bus-id>-<device-pid>/dev_nack_retry_count
166KernelVersion: 6.18
167Contact: linux-i3c@vger.kernel.org
168Description:
169 Expose the dev_nak_retry_count which controls the number of
170 automatic retries that will be performed by the controller when
171 the target device returns a NACK response. A value of 0 disables
172 the automatic retries. Exist only when I3C constroller supports
173 this retry on nack feature.
174
Documentation/ABI/testing/sysfs-bus-iio-cros-ec+6−3
@@ -3,9 +3,12 @@ Date: July 2015 · 2 unmodified lines
3KernelVersion: 4.73KernelVersion: 4.7
4Contact: linux-iio@vger.kernel.org4Contact: linux-iio@vger.kernel.org
5Description:5Description:
6 Writing '1' will perform a FOC (Fast Online Calibration). The6 Writing '1' either perform a FOC (Fast Online Calibration) or
7 corresponding calibration offsets can be read from `*_calibbias`7 enter calibration mode.
8 entries.8 Writing '0` exits calibration mode. It is a NOP for FOC enabled
9 sensors.
10 The corresponding calibration offsets can be read from `*_calibbias`
11 entries.
9 12
10What: /sys/bus/iio/devices/iio:deviceX/id13What: /sys/bus/iio/devices/iio:deviceX/id
11Date: September 201714Date: September 2017
Documentation/ABI/testing/sysfs-bus-pci-drivers-xhci_hcd+42−0
@@ -85,3 +85,45 @@ Description: · 84 unmodified lines
85 up to 5000. The default value is 64 ms.85 up to 5000. The default value is 64 ms.
86 This polling interval is used while DbC is enabled but has no86 This polling interval is used while DbC is enabled but has no
87 active data transfers.87 active data transfers.
88
89What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_serial
90Date: January 2026
91Contact: Łukasz Bartosik <ukaszb@chromium.org>
92Description:
93 The dbc_serial attribute allows to change the serial number
94 string descriptor presented by the debug device when a host
95 requests a string descriptor with iSerialNumber index.
96 Index is found in the iSerialNumber field in the device
97 descriptor.
98 Value can only be changed while debug capability (DbC) is in
99 disabled state to prevent USB device descriptor change while
100 connected to a USB host.
101 The default value is "0001".
102 The field length can be from 1 to 126 characters.
103
104What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_product
105Date: January 2026
106Contact: Łukasz Bartosik <ukaszb@chromium.org>
107Description:
108 The dbc_product attribute allows to change the product string
109 descriptor presented by the debug device when a host requests
110 a string descriptor with iProduct index.
111 Index is found in the iProduct field in the device descriptor.
112 Value can only be changed while debug capability (DbC) is in
113 disabled state to prevent USB device descriptor change while
114 connected to a USB host.
115 The default value is "Linux USB Debug Target".
116 The field length can be from 1 to 126 characters.
117
118What: /sys/bus/pci/drivers/xhci_hcd/.../dbc_manufacturer
119Date: January 2026
120Contact: Łukasz Bartosik <ukaszb@chromium.org>
121Description:
122 The dbc_manufacturer attribute allows to change the manufacturer
123 string descriptor presented by the debug device when a host
124 requests a string descriptor with iManufacturer index.
125 Value can only be changed while debug capability (DbC) is in
126 disabled state to prevent USB device descriptor change while
127 connected to a USB host.
128 The default value is "Linux Foundation".
129 The field length can be from 1 to 126 characters.
Documentation/ABI/testing/sysfs-class-spi-eeprom+11−0
@@ -17,3 +17,14 @@ Description: · 16 unmodified lines
17 from the device.17 from the device.
18 18
19 This is a read-only attribute.19 This is a read-only attribute.
20
21What: /sys/class/spi_master/spi<bus>/spi<bus>.<dev>/jedec_id
22Date: January 2026
23KernelVersion: 6.19
24Contact: Patrick Wicki <patrick.wicki@siemens.com>
25Description:
26 Contains the raw JEDEC ID bytes returned by the RDID (0x9f) command. The
27 bytes are exposed as a hex string in big-endian order as read from the
28 device.
29
30 This is a read-only attribute.
Documentation/ABI/testing/sysfs-class-tee+10−0
@@ -13,3 +13,13 @@ Description: · 12 unmodified lines
13 space if the variable is absent. The primary purpose13 space if the variable is absent. The primary purpose
14 of this variable is to let systemd know whether14 of this variable is to let systemd know whether
15 tee-supplicant is needed in the early boot with initramfs.15 tee-supplicant is needed in the early boot with initramfs.
16
17What: /sys/class/tee/tee{,priv}X/revision
18Date: Jan 2026
19KernelVersion: 6.19
20Contact: op-tee@lists.trustedfirmware.org
21Description:
22 Read-only revision string reported by the TEE driver. This is
23 for diagnostics only and must not be used to infer feature
24 support. Use TEE_IOC_VERSION for capability and compatibility
25 checks.
Documentation/ABI/testing/sysfs-class-tsm+0−10
@@ -7,13 +7,3 @@ Description: · 6 unmodified lines
7 signals when the PCI layer is able to support establishment of7 signals when the PCI layer is able to support establishment of
8 link encryption and other device-security features coordinated8 link encryption and other device-security features coordinated
9 through a platform tsm.9 through a platform tsm.
10
11What: /sys/class/tsm/tsmN/streamH.R.E
12Contact: linux-pci@vger.kernel.org
13Description:
14 (RO) When a host bridge has established a secure connection via
15 the platform TSM, symlink appears. The primary function of this
16 is have a system global review of TSM resource consumption
17 across host bridges. The link points to the endpoint PCI device
18 and matches the same link published by the host bridge. See
19 Documentation/ABI/testing/sysfs-devices-pci-host-bridge.
Documentation/ABI/testing/sysfs-class-typec+11−0
@@ -162,6 +162,17 @@ Description: Lists the supported USB Modes. The default USB mode that is used · 161 unmodified lines
162 - usb3 (USB 3.2)162 - usb3 (USB 3.2)
163 - usb4 (USB4)163 - usb4 (USB4)
164 164
165What: /sys/class/typec/<port>/<alt-mode>/priority
166Date: July 2025
167Contact: Andrei Kuchynski <akuchynski@chromium.org>
168Description:
169 Displays and allows setting the priority for a specific alternate mode.
170 The priority is an integer in the range 0-255. A lower numerical value
171 indicates a higher priority (0 is the highest).
172 If the new value is already in use by another mode, the priority of the
173 conflicting mode and any subsequent modes will be incremented until they
174 are all unique.
175
165USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)176USB Type-C partner devices (eg. /sys/class/typec/port0-partner/)
166 177
167What: /sys/class/typec/<port>-partner/accessory_mode178What: /sys/class/typec/<port>-partner/accessory_mode
Documentation/ABI/testing/sysfs-driver-ccp+15−0
@@ -8,6 +8,21 @@ Description: · 7 unmodified lines
8 0: Not fused8 0: Not fused
9 1: Fused9 1: Fused
10 10
11What: /sys/bus/pci/devices/<BDF>/boot_integrity
12Date: April 2026
13KernelVersion: 6.20
14Contact: mario.limonciello@amd.com
15Description:
16 The /sys/bus/pci/devices/<BDF>/boot_integrity reports
17 whether the AMD CPU or APU is used for a hardware root of trust
18 during the boot process.
19 Possible values:
20 0: Not hardware root of trust.
21 1: Hardware root of trust
22
23 NOTE: Vendors may provide design specific alternative hardware
24 root of trust implementations.
25
11What: /sys/bus/pci/devices/<BDF>/debug_lock_on26What: /sys/bus/pci/devices/<BDF>/debug_lock_on
12Date: June 202227Date: June 2022
13KernelVersion: 5.1928KernelVersion: 5.19
Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon+110−0
@@ -109,6 +109,22 @@ Description: RO. Package current voltage in millivolt. · 108 unmodified lines
109 109
110 Only supported for particular Intel Xe graphics platforms.110 Only supported for particular Intel Xe graphics platforms.
111 111
112What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_crit
113Date: January 2026
114KernelVersion: 7.0
115Contact: intel-xe@lists.freedesktop.org
116Description: RO. Package critical temperature in millidegree Celsius.
117
118 Only supported for particular Intel Xe graphics platforms.
119
120What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_emergency
121Date: January 2026
122KernelVersion: 7.0
123Contact: intel-xe@lists.freedesktop.org
124Description: RO. Package shutdown temperature in millidegree Celsius.
125
126 Only supported for particular Intel Xe graphics platforms.
127
112What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_input128What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_input
113Date: March 2025129Date: March 2025
114KernelVersion: 6.15130KernelVersion: 6.15
@@ -117,6 +133,30 @@ Description: RO. Package temperature in millidegree Celsius. · 2 unmodified lines
117 133
118 Only supported for particular Intel Xe graphics platforms.134 Only supported for particular Intel Xe graphics platforms.
119 135
136What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp2_max
137Date: January 2026
138KernelVersion: 7.0
139Contact: intel-xe@lists.freedesktop.org
140Description: RO. Package maximum temperature limit in millidegree Celsius.
141
142 Only supported for particular Intel Xe graphics platforms.
143
144What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_crit
145Date: January 2026
146KernelVersion: 7.0
147Contact: intel-xe@lists.freedesktop.org
148Description: RO. VRAM critical temperature in millidegree Celsius.
149
150 Only supported for particular Intel Xe graphics platforms.
151
152What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_emergency
153Date: January 2026
154KernelVersion: 7.0
155Contact: intel-xe@lists.freedesktop.org
156Description: RO. VRAM shutdown temperature in millidegree Celsius.
157
158 Only supported for particular Intel Xe graphics platforms.
159
120What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_input160What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp3_input
121Date: March 2025161Date: March 2025
122KernelVersion: 6.15162KernelVersion: 6.15
@@ -125,6 +165,76 @@ Description: RO. VRAM temperature in millidegree Celsius. · 2 unmodified lines
125 165
126 Only supported for particular Intel Xe graphics platforms.166 Only supported for particular Intel Xe graphics platforms.
127 167
168What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_crit
169Date: January 2026
170KernelVersion: 7.0
171Contact: intel-xe@lists.freedesktop.org
172Description: RO. Memory controller critical temperature in millidegree Celsius.
173
174 Only supported for particular Intel Xe graphics platforms.
175
176What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_emergency
177Date: January 2026
178KernelVersion: 7.0
179Contact: intel-xe@lists.freedesktop.org
180Description: RO. Memory controller shutdown temperature in millidegree Celsius.
181
182 Only supported for particular Intel Xe graphics platforms.
183
184What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp4_input
185Date: January 2026
186KernelVersion: 7.0
187Contact: intel-xe@lists.freedesktop.org
188Description: RO. Memory controller average temperature in millidegree Celsius.
189
190 Only supported for particular Intel Xe graphics platforms.
191
192What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_crit
193Date: January 2026
194KernelVersion: 7.0
195Contact: intel-xe@lists.freedesktop.org
196Description: RO. GPU PCIe critical temperature in millidegree Celsius.
197
198 Only supported for particular Intel Xe graphics platforms.
199
200What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_emergency
201Date: January 2026
202KernelVersion: 7.0
203Contact: intel-xe@lists.freedesktop.org
204Description: RO. GPU PCIe shutdown temperature in millidegree Celsius.
205
206 Only supported for particular Intel Xe graphics platforms.
207
208What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp5_input
209Date: January 2026
210KernelVersion: 7.0
211Contact: intel-xe@lists.freedesktop.org
212Description: RO. GPU PCIe temperature in millidegree Celsius.
213
214What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_crit
215Date: January 2026
216KernelVersion: 7.0
217Contact: intel-xe@lists.freedesktop.org
218Description: RO. VRAM channel critical temperature in millidegree Celsius.
219
220 Only supported for particular Intel Xe graphics platforms.
221
222What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_emergency
223Date: January 2026
224KernelVersion: 7.0
225Contact: intel-xe@lists.freedesktop.org
226Description: RO. VRAM channel shutdown temperature in millidegree Celsius.
227
228 Only supported for particular Intel Xe graphics platforms.
229
230What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/temp[6-21]_input
231Date: January 2026
232KernelVersion: 7.0
233Contact: intel-xe@lists.freedesktop.org
234Description: RO. VRAM channel temperature in millidegree Celsius.
235
236 Only supported for particular Intel Xe graphics platforms.
237
128What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan1_input238What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/fan1_input
129Date: March 2025239Date: March 2025
130KernelVersion: 6.16240KernelVersion: 6.16
Documentation/ABI/testing/sysfs-driver-intel-xe-sriov+1−1
@@ -119,7 +119,7 @@ Description: · 118 unmodified lines
119 The GT preemption timeout (PT) in [us] to be applied to all functions.119 The GT preemption timeout (PT) in [us] to be applied to all functions.
120 See sriov_admin/{pf,vf<N>}/profile/preempt_timeout_us for more details.120 See sriov_admin/{pf,vf<N>}/profile/preempt_timeout_us for more details.
121 121
122 sched_priority: (RW/RO) string122 sched_priority: (WO) string
123 The GT scheduling priority to be applied for all functions.123 The GT scheduling priority to be applied for all functions.
124 See sriov_admin/{pf,vf<N>}/profile/sched_priority for more details.124 See sriov_admin/{pf,vf<N>}/profile/sched_priority for more details.
125 125
Documentation/ABI/testing/sysfs-firmware-plpks+58−0
@@ -0,0 +1,58 @@
1What: /sys/firmware/plpks/config
2Date: February 2023
3Contact: Nayna Jain <nayna@linux.ibm.com>
4Description: This optional directory contains read-only config attributes as
5 defined by the PLPKS implementation. All data is in ASCII
6 format.
7
8What: /sys/firmware/plpks/config/version
9Date: February 2023
10Contact: Nayna Jain <nayna@linux.ibm.com>
11Description: Config version as reported by the hypervisor in ASCII decimal
12 format.
13
14What: /sys/firmware/plpks/config/max_object_size
15Date: February 2023
16Contact: Nayna Jain <nayna@linux.ibm.com>
17Description: Maximum allowed size of objects in the keystore in bytes,
18 represented in ASCII decimal format.
19
20 This is not necessarily the same as the max size that can be
21 written to an update file as writes can contain more than
22 object data, you should use the size of the update file for
23 that purpose.
24
25What: /sys/firmware/plpks/config/total_size
26Date: February 2023
27Contact: Nayna Jain <nayna@linux.ibm.com>
28Description: Total size of the PLPKS in bytes, represented in ASCII decimal
29 format.
30
31What: /sys/firmware/plpks/config/used_space
32Date: February 2023
33Contact: Nayna Jain <nayna@linux.ibm.com>
34Description: Current space consumed by the key store, in bytes, represented
35 in ASCII decimal format.
36
37What: /sys/firmware/plpks/config/supported_policies
38Date: February 2023
39Contact: Nayna Jain <nayna@linux.ibm.com>
40Description: Bitmask of supported policy flags by the hypervisor, represented
41 as an 8 byte hexadecimal ASCII string. Consult the hypervisor
42 documentation for what these flags are.
43
44What: /sys/firmware/plpks/config/signed_update_algorithms
45Date: February 2023
46Contact: Nayna Jain <nayna@linux.ibm.com>
47Description: Bitmask of flags indicating which algorithms the hypervisor
48 supports for signed update of objects, represented as a 16 byte
49 hexadecimal ASCII string. Consult the hypervisor documentation
50 for what these flags mean.
51
52What: /sys/firmware/plpks/config/wrapping_features
53Date: November 2025
54Contact: Srish Srinivasan <ssrish@linux.ibm.com>
55Description: Bitmask of the wrapping features indicating the wrapping
56 algorithms that are supported for the H_PKS_WRAP_OBJECT requests
57 , represented as a 8 byte hexadecimal ASCII string. Consult the
58 hypervisor documentation for what these flags mean.
Documentation/ABI/testing/sysfs-fs-erofs+12−8
@@ -3,19 +3,23 @@ Date: November 2021 · 2 unmodified lines
3Contact: "Huang Jianan" <huangjianan@oppo.com>3Contact: "Huang Jianan" <huangjianan@oppo.com>
4Description: Shows all enabled kernel features.4Description: Shows all enabled kernel features.
5 Supported features:5 Supported features:
6 zero_padding, compr_cfgs, big_pcluster, chunked_file,6 compr_cfgs, big_pcluster, chunked_file, device_table,
7 device_table, compr_head2, sb_chksum, ztailpacking,7 compr_head2, sb_chksum, ztailpacking, dedupe, fragments,
8 dedupe, fragments, 48bit, metabox.8 48bit, metabox.
9 9
10What: /sys/fs/erofs/<disk>/sync_decompress10What: /sys/fs/erofs/<disk>/sync_decompress
11Date: November 202111Date: November 2021
12Contact: "Huang Jianan" <huangjianan@oppo.com>12Contact: "Huang Jianan" <huangjianan@oppo.com>
13Description: Control strategy of sync decompression:13Description: Control strategy of synchronous decompression. Synchronous
14 decompression tries to decompress in the reader thread for
15 synchronous reads and small asynchronous reads (<= 12 KiB):
14 16
15 - 0 (default, auto): enable for readpage, and enable for17 - 0 (auto, default): apply to synchronous reads only, but will
16 readahead on atomic contexts only.18 switch to 1 (force on) if any decompression
17 - 1 (force on): enable for readpage and readahead.19 request is detected in atomic contexts;
18 - 2 (force off): disable for all situations.20 - 1 (force on): apply to synchronous reads and small
21 asynchronous reads;
22 - 2 (force off): disable synchronous decompression completely.
19 23
20What: /sys/fs/erofs/<disk>/drop_caches24What: /sys/fs/erofs/<disk>/drop_caches
21Date: November 202425Date: November 2024
Documentation/ABI/testing/sysfs-fs-f2fs+59−3
@@ -520,7 +520,7 @@ What: /sys/fs/f2fs/<disk>/ckpt_thread_ioprio · 519 unmodified lines
520Date: January 2021520Date: January 2021
521Contact: "Daeho Jeong" <daehojeong@google.com>521Contact: "Daeho Jeong" <daehojeong@google.com>
522Description: Give a way to change checkpoint merge daemon's io priority.522Description: Give a way to change checkpoint merge daemon's io priority.
523 Its default value is "be,3", which means "BE" I/O class and523 Its default value is "rt,3", which means "RT" I/O class and
524 I/O priority "3". We can select the class between "rt" and "be",524 I/O priority "3". We can select the class between "rt" and "be",
525 and set the I/O priority within valid range of it. "," delimiter525 and set the I/O priority within valid range of it. "," delimiter
526 is necessary in between I/O class and priority number.526 is necessary in between I/O class and priority number.
@@ -732,7 +732,7 @@ Description: Support configuring fault injection type, should be · 205 unmodified lines
732 FAULT_TRUNCATE 0x00000400732 FAULT_TRUNCATE 0x00000400
733 FAULT_READ_IO 0x00000800733 FAULT_READ_IO 0x00000800
734 FAULT_CHECKPOINT 0x00001000734 FAULT_CHECKPOINT 0x00001000
735 FAULT_DISCARD 0x00002000735 FAULT_DISCARD 0x00002000 (obsolete)
736 FAULT_WRITE_IO 0x00004000736 FAULT_WRITE_IO 0x00004000
737 FAULT_SLAB_ALLOC 0x00008000737 FAULT_SLAB_ALLOC 0x00008000
738 FAULT_DQUOT_INIT 0x00010000738 FAULT_DQUOT_INIT 0x00010000
@@ -741,8 +741,10 @@ Description: Support configuring fault injection type, should be · 2 unmodified lines
741 FAULT_BLKADDR_CONSISTENCE 0x00080000741 FAULT_BLKADDR_CONSISTENCE 0x00080000
742 FAULT_NO_SEGMENT 0x00100000742 FAULT_NO_SEGMENT 0x00100000
743 FAULT_INCONSISTENT_FOOTER 0x00200000743 FAULT_INCONSISTENT_FOOTER 0x00200000
744 FAULT_TIMEOUT 0x00400000 (1000ms)744 FAULT_ATOMIC_TIMEOUT 0x00400000 (1000ms)
745 FAULT_VMALLOC 0x00800000745 FAULT_VMALLOC 0x00800000
746 FAULT_LOCK_TIMEOUT 0x01000000 (1000ms)
747 FAULT_SKIP_WRITE 0x02000000
746 =========================== ==========748 =========================== ==========
747 749
748What: /sys/fs/f2fs/<disk>/discard_io_aware_gran750What: /sys/fs/f2fs/<disk>/discard_io_aware_gran
@@ -939,3 +941,57 @@ Description: Controls write priority in multi-devices setups. A value of 0 means · 190 unmodified lines
939 allocate_section_policy = 1 Prioritize writing to section before allocate_section_hint941 allocate_section_policy = 1 Prioritize writing to section before allocate_section_hint
940 allocate_section_policy = 2 Prioritize writing to section after allocate_section_hint942 allocate_section_policy = 2 Prioritize writing to section after allocate_section_hint
941 =========================== ==========================================================943 =========================== ==========================================================
944
945What: /sys/fs/f2fs/<disk>/max_lock_elapsed_time
946Date: December 2025
947Contact: "Chao Yu" <chao@kernel.org>
948Description: This is a threshold, once a thread enters critical region that lock covers, total
949 elapsed time exceeds this threshold, f2fs will print tracepoint to dump information
950 of related context. This sysfs entry can be used to control the value of threshold,
951 by default, the value is 500 ms.
952
953What: /sys/fs/f2fs/<disk>/inject_timeout_type
954Date: December 2025
955Contact: "Chao Yu" <chao@kernel.org>
956Description: This sysfs entry can be used to change type of injected timeout:
957 ========== ===============================
958 Flag_Value Flag_Description
959 ========== ===============================
960 0x00000000 No timeout (default)
961 0x00000001 Simulate running time
962 0x00000002 Simulate IO type sleep time
963 0x00000003 Simulate Non-IO type sleep time
964 0x00000004 Simulate runnable time
965 ========== ===============================
966
967What: /sys/fs/f2fs/<disk>/adjust_lock_priority
968Date: January 2026
969Contact: "Chao Yu" <chao@kernel.org>
970Description: This sysfs entry can be used to enable/disable to adjust priority for task
971 which is in critical region covered by lock.
972 ========== ==================
973 Flag_Value Flag_Description
974 ========== ==================
975 0x00000000 Disabled (default)
976 0x00000001 cp_rwsem
977 0x00000002 node_change
978 0x00000004 node_write
979 0x00000008 gc_lock
980 0x00000010 cp_global
981 0x00000020 io_rwsem
982 ========== ==================
983
984What: /sys/fs/f2fs/<disk>/lock_duration_priority
985Date: January 2026
986Contact: "Chao Yu" <chao@kernel.org>
987Description: f2fs can tune priority of thread which has entered into critical region covered by
988 f2fs rwsemphore lock. This sysfs entry can be used to control priority value, the
989 range is [100,139], by default the value is 120.
990
991What: /sys/fs/f2fs/<disk>/critical_task_priority
992Date: February 2026
993Contact: "Chao Yu" <chao@kernel.org>
994Description: It can be used to tune priority of f2fs critical task, e.g. f2fs_ckpt, f2fs_gc
995 threads, limitation as below:
996 - it requires user has CAP_SYS_NICE capability.
997 - the range is [100, 139], by default the value is 100.
Documentation/ABI/testing/sysfs-kernel-dmabuf-buffers+0−24
@@ -1,24 +0,0 @@
1What: /sys/kernel/dmabuf/buffers
2Date: May 2021
3KernelVersion: v5.13
4Contact: Hridya Valsaraju <hridya@google.com>
5Description: The /sys/kernel/dmabuf/buffers directory contains a
6 snapshot of the internal state of every DMA-BUF.
7 /sys/kernel/dmabuf/buffers/<inode_number> will contain the
8 statistics for the DMA-BUF with the unique inode number
9 <inode_number>
10Users: kernel memory tuning/debugging tools
11
12What: /sys/kernel/dmabuf/buffers/<inode_number>/exporter_name
13Date: May 2021
14KernelVersion: v5.13
15Contact: Hridya Valsaraju <hridya@google.com>
16Description: This file is read-only and contains the name of the exporter of
17 the DMA-BUF.
18
19What: /sys/kernel/dmabuf/buffers/<inode_number>/size
20Date: May 2021
21KernelVersion: v5.13
22Contact: Hridya Valsaraju <hridya@google.com>
23Description: This file is read-only and specifies the size of the DMA-BUF in
24 bytes.
Documentation/ABI/testing/sysfs-kernel-mm-damon+13−0
@@ -516,6 +516,19 @@ Contact: SeongJae Park <sj@kernel.org> · 515 unmodified lines
516Description: Reading this file returns the number of the exceed events of516Description: Reading this file returns the number of the exceed events of
517 the scheme's quotas.517 the scheme's quotas.
518 518
519What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/stats/nr_snapshots
520Date: Dec 2025
521Contact: SeongJae Park <sj@kernel.org>
522Description: Reading this file returns the total number of DAMON snapshots
523 that the scheme has tried to be applied.
524
525What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/stats/max_nr_snapshots
526Date: Dec 2025
527Contact: SeongJae Park <sj@kernel.org>
528Description: Writing a number to this file sets the upper limit of
529 nr_snapshots that deactivates the scheme when the limit is
530 reached or exceeded.
531
519What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/tried_regions/total_bytes532What: /sys/kernel/mm/damon/admin/kdamonds/<K>/contexts/<C>/schemes/<S>/tried_regions/total_bytes
520Date: Jul 2023533Date: Jul 2023
521Contact: SeongJae Park <sj@kernel.org>534Contact: SeongJae Park <sj@kernel.org>
Documentation/ABI/testing/sysfs-secvar+0−65
@@ -63,68 +63,3 @@ Contact: Nayna Jain <nayna@linux.ibm.com> · 62 unmodified lines
63Description: A write-only file that is used to submit the new value for the63Description: A write-only file that is used to submit the new value for the
64 variable. The size of the file represents the maximum size of64 variable. The size of the file represents the maximum size of
65 the variable data that can be written.65 the variable data that can be written.
66
67What: /sys/firmware/secvar/config
68Date: February 2023
69Contact: Nayna Jain <nayna@linux.ibm.com>
70Description: This optional directory contains read-only config attributes as
71 defined by the secure variable implementation. All data is in
72 ASCII format. The directory is only created if the backing
73 implementation provides variables to populate it, which at
74 present is only PLPKS on the pseries platform.
75
76What: /sys/firmware/secvar/config/version
77Date: February 2023
78Contact: Nayna Jain <nayna@linux.ibm.com>
79Description: Config version as reported by the hypervisor in ASCII decimal
80 format.
81
82 Currently only provided by PLPKS on the pseries platform.
83
84What: /sys/firmware/secvar/config/max_object_size
85Date: February 2023
86Contact: Nayna Jain <nayna@linux.ibm.com>
87Description: Maximum allowed size of objects in the keystore in bytes,
88 represented in ASCII decimal format.
89
90 This is not necessarily the same as the max size that can be
91 written to an update file as writes can contain more than
92 object data, you should use the size of the update file for
93 that purpose.
94
95 Currently only provided by PLPKS on the pseries platform.
96
97What: /sys/firmware/secvar/config/total_size
98Date: February 2023
99Contact: Nayna Jain <nayna@linux.ibm.com>
100Description: Total size of the PLPKS in bytes, represented in ASCII decimal
101 format.
102
103 Currently only provided by PLPKS on the pseries platform.
104
105What: /sys/firmware/secvar/config/used_space
106Date: February 2023
107Contact: Nayna Jain <nayna@linux.ibm.com>
108Description: Current space consumed by the key store, in bytes, represented
109 in ASCII decimal format.
110
111 Currently only provided by PLPKS on the pseries platform.
112
113What: /sys/firmware/secvar/config/supported_policies
114Date: February 2023
115Contact: Nayna Jain <nayna@linux.ibm.com>
116Description: Bitmask of supported policy flags by the hypervisor,
117 represented as an 8 byte hexadecimal ASCII string. Consult the
118 hypervisor documentation for what these flags are.
119
120 Currently only provided by PLPKS on the pseries platform.
121
122What: /sys/firmware/secvar/config/signed_update_algorithms
123Date: February 2023
124Contact: Nayna Jain <nayna@linux.ibm.com>
125Description: Bitmask of flags indicating which algorithms the hypervisor
126 supports for signed update of objects, represented as a 16 byte
127 hexadecimal ASCII string. Consult the hypervisor documentation
128 for what these flags mean.
129
130 Currently only provided by PLPKS on the pseries platform.
Documentation/Makefile+2−1
@@ -98,7 +98,8 @@ dochelp: · 97 unmodified lines
98 @echo ' cleandocs - clean all generated files'98 @echo ' cleandocs - clean all generated files'
99 @echo99 @echo
100 @echo ' make SPHINXDIRS="s1 s2" [target] Generate only docs of folder s1, s2'100 @echo ' make SPHINXDIRS="s1 s2" [target] Generate only docs of folder s1, s2'
101 @echo ' top level values for SPHINXDIRS are: $(_SPHINXDIRS)'101 @echo ' top level values for SPHINXDIRS are:'
102 @echo '$(_SPHINXDIRS)' | fmt -s -w 75 -g 75 | sed 's/^/ /'
102 @echo ' you may also use a subdirectory like SPHINXDIRS=userspace-api/media,'103 @echo ' you may also use a subdirectory like SPHINXDIRS=userspace-api/media,'
103 @echo ' provided that there is an index.rst file at the subdirectory.'104 @echo ' provided that there is an index.rst file at the subdirectory.'
104 @echo105 @echo
Documentation/PCI/endpoint/pci-endpoint.rst+24−0
@@ -95,6 +95,30 @@ by the PCI endpoint function driver. · 94 unmodified lines
95 Register space of the function driver is usually configured95 Register space of the function driver is usually configured
96 using this API.96 using this API.
97 97
98 Some endpoint controllers also support calling pci_epc_set_bar() again
99 for the same BAR (without calling pci_epc_clear_bar()) to update inbound
100 address translations after the host has programmed the BAR base address.
101 Endpoint function drivers can check this capability via the
102 dynamic_inbound_mapping EPC feature bit.
103
104 When pci_epf_bar.num_submap is non-zero, the endpoint function driver is
105 requesting BAR subrange mapping using pci_epf_bar.submap. This requires
106 the EPC to advertise support via the subrange_mapping EPC feature bit.
107
108 When an EPF driver wants to make use of the inbound subrange mapping
109 feature, it requires that the BAR base address has been programmed by
110 the host during enumeration. Thus, it needs to call pci_epc_set_bar()
111 twice for the same BAR (requires dynamic_inbound_mapping): first with
112 num_submap set to zero and configuring the BAR size, then after the PCIe
113 link is up and the host enumerates the endpoint and programs the BAR
114 base address, again with num_submap set to non-zero value.
115
116 Note that when making use of the inbound subrange mapping feature, the
117 EPF driver must not call pci_epc_clear_bar() between the two
118 pci_epc_set_bar() calls, because clearing the BAR can clear/disable the
119 BAR register or BAR decode on the endpoint while the host still expects
120 the assigned BAR address to remain valid.
121
98* pci_epc_clear_bar()122* pci_epc_clear_bar()
99 123
100 The PCI endpoint function driver should use pci_epc_clear_bar() to reset124 The PCI endpoint function driver should use pci_epc_clear_bar() to reset
Documentation/PCI/endpoint/pci-test-howto.rst+19−0
@@ -84,6 +84,25 @@ device, the following commands can be used:: · 83 unmodified lines
84 # echo 32 > functions/pci_epf_test/func1/msi_interrupts84 # echo 32 > functions/pci_epf_test/func1/msi_interrupts
85 # echo 2048 > functions/pci_epf_test/func1/msix_interrupts85 # echo 2048 > functions/pci_epf_test/func1/msix_interrupts
86 86
87By default, pci-epf-test uses the following BAR sizes::
88
89 # grep . functions/pci_epf_test/func1/pci_epf_test.0/bar?_size
90 functions/pci_epf_test/func1/pci_epf_test.0/bar0_size:131072
91 functions/pci_epf_test/func1/pci_epf_test.0/bar1_size:131072
92 functions/pci_epf_test/func1/pci_epf_test.0/bar2_size:131072
93 functions/pci_epf_test/func1/pci_epf_test.0/bar3_size:131072
94 functions/pci_epf_test/func1/pci_epf_test.0/bar4_size:131072
95 functions/pci_epf_test/func1/pci_epf_test.0/bar5_size:1048576
96
97The user can override a default value using e.g.::
98 # echo 1048576 > functions/pci_epf_test/func1/pci_epf_test.0/bar1_size
99
100Overriding the default BAR sizes can only be done before binding the
101pci-epf-test device to a PCI endpoint controller driver.
102
103Note: Some endpoint controllers might have fixed-size BARs or reserved BARs;
104for such controllers, the corresponding BAR size in configfs will be ignored.
105
87 106
88Binding pci-epf-test Device to EP Controller107Binding pci-epf-test Device to EP Controller
89--------------------------------------------108--------------------------------------------
Documentation/PCI/endpoint/pci-vntb-howto.rst+7−7
@@ -52,14 +52,14 @@ pci-epf-vntb device, the following commands can be used:: · 51 unmodified lines
52 # cd /sys/kernel/config/pci_ep/52 # cd /sys/kernel/config/pci_ep/
53 # mkdir functions/pci_epf_vntb/func153 # mkdir functions/pci_epf_vntb/func1
54 54
55The "mkdir func1" above creates the pci-epf-ntb function device that will55The "mkdir func1" above creates the pci-epf-vntb function device that will
56be probed by pci_epf_vntb driver.56be probed by pci_epf_vntb driver.
57 57
58The PCI endpoint framework populates the directory with the following58The PCI endpoint framework populates the directory with the following
59configurable fields::59configurable fields::
60 60
61 # ls functions/pci_epf_ntb/func161 # ls functions/pci_epf_vntb/func1
62 baseclass_code deviceid msi_interrupts pci-epf-ntb.062 baseclass_code deviceid msi_interrupts pci-epf-vntb.0
63 progif_code secondary subsys_id vendorid63 progif_code secondary subsys_id vendorid
64 cache_line_size interrupt_pin msix_interrupts primary64 cache_line_size interrupt_pin msix_interrupts primary
65 revid subclass_code subsys_vendor_id65 revid subclass_code subsys_vendor_id
@@ -111,13 +111,13 @@ A sample configuration for virtual NTB driver for virtual PCI bus:: · 45 unmodified lines
111 # echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid111 # echo 0x080A > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid
112 # echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number112 # echo 0x10 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number
113 113
114Binding pci-epf-ntb Device to EP Controller114Binding pci-epf-vntb Device to EP Controller
115--------------------------------------------115--------------------------------------------
116 116
117NTB function device should be attached to PCI endpoint controllers117NTB function device should be attached to PCI endpoint controllers
118connected to the host.118connected to the host.
119 119
120 # ln -s controllers/5f010000.pcie_ep functions/pci-epf-ntb/func1/primary120 # ln -s controllers/5f010000.pcie_ep functions/pci_epf_vntb/func1/primary
121 121
122Once the above step is completed, the PCI endpoint controllers are ready to122Once the above step is completed, the PCI endpoint controllers are ready to
123establish a link with the host.123establish a link with the host.
@@ -139,7 +139,7 @@ lspci Output at Host side · 15 unmodified lines
139-------------------------139-------------------------
140 140
141Note that the devices listed here correspond to the values populated in141Note that the devices listed here correspond to the values populated in
142"Creating pci-epf-ntb Device" section above::142"Creating pci-epf-vntb Device" section above::
143 143
144 # lspci144 # lspci
145 00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)145 00:00.0 PCI bridge: Freescale Semiconductor Inc Device 0000 (rev 01)
@@ -152,7 +152,7 @@ lspci Output at EP Side / Virtual PCI bus · 6 unmodified lines
152-----------------------------------------152-----------------------------------------
153 153
154Note that the devices listed here correspond to the values populated in154Note that the devices listed here correspond to the values populated in
155"Creating pci-epf-ntb Device" section above::155"Creating pci-epf-vntb Device" section above::
156 156
157 # lspci157 # lspci
158 10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)158 10:00.0 Unassigned class [ffff]: Dawicontrol Computersysteme GmbH Device 1234 (rev ff)
Documentation/PCI/msi-howto.rst+3−3
@@ -98,7 +98,7 @@ function:: · 97 unmodified lines
98 98
99which allocates up to max_vecs interrupt vectors for a PCI device. It99which allocates up to max_vecs interrupt vectors for a PCI device. It
100returns the number of vectors allocated or a negative error. If the device100returns the number of vectors allocated or a negative error. If the device
101has a requirements for a minimum number of vectors the driver can pass a101has a requirement for a minimum number of vectors the driver can pass a
102min_vecs argument set to this limit, and the PCI core will return -ENOSPC102min_vecs argument set to this limit, and the PCI core will return -ENOSPC
103if it can't meet the minimum number of vectors.103if it can't meet the minimum number of vectors.
104 104
@@ -127,7 +127,7 @@ not be able to allocate as many vectors for MSI as it could for MSI-X. On · 22 unmodified lines
127some platforms, MSI interrupts must all be targeted at the same set of CPUs127some platforms, MSI interrupts must all be targeted at the same set of CPUs
128whereas MSI-X interrupts can all be targeted at different CPUs.128whereas MSI-X interrupts can all be targeted at different CPUs.
129 129
130If a device supports neither MSI-X or MSI it will fall back to a single130If a device supports neither MSI-X nor MSI it will fall back to a single
131legacy IRQ vector.131legacy IRQ vector.
132 132
133The typical usage of MSI or MSI-X interrupts is to allocate as many vectors133The typical usage of MSI or MSI-X interrupts is to allocate as many vectors
@@ -203,7 +203,7 @@ How to tell whether MSI/MSI-X is enabled on a device · 69 unmodified lines
203----------------------------------------------------203----------------------------------------------------
204 204
205Using 'lspci -v' (as root) may show some devices with "MSI", "Message205Using 'lspci -v' (as root) may show some devices with "MSI", "Message
206Signalled Interrupts" or "MSI-X" capabilities. Each of these capabilities206Signaled Interrupts" or "MSI-X" capabilities. Each of these capabilities
207has an 'Enable' flag which is followed with either "+" (enabled)207has an 'Enable' flag which is followed with either "+" (enabled)
208or "-" (disabled).208or "-" (disabled).
209 209
Documentation/PCI/pci-error-recovery.rst+0−1
@@ -460,7 +460,6 @@ That is, the recovery API only requires that: · 459 unmodified lines
460 - drivers/net/e1000e460 - drivers/net/e1000e
461 - drivers/net/ixgbe461 - drivers/net/ixgbe
462 - drivers/net/cxgb3462 - drivers/net/cxgb3
463 - drivers/net/s2io.c
464 463
465 The cor_error_detected() callback is invoked in handle_error_source() when464 The cor_error_detected() callback is invoked in handle_error_source() when
466 the error severity is "correctable". The callback is optional and allows465 the error severity is "correctable". The callback is optional and allows
Documentation/RCU/Design/Requirements/Requirements.rst+6−6
@@ -2780,12 +2780,12 @@ Tasks Trace RCU · 2779 unmodified lines
2780~~~~~~~~~~~~~~~2780~~~~~~~~~~~~~~~
2781 2781
2782Some forms of tracing need to sleep in readers, but cannot tolerate2782Some forms of tracing need to sleep in readers, but cannot tolerate
2783SRCU's read-side overhead, which includes a full memory barrier in both2783SRCU's read-side overhead, which includes a full memory barrier in
2784srcu_read_lock() and srcu_read_unlock(). This need is handled by a2784both srcu_read_lock() and srcu_read_unlock(). This need is handled by
2785Tasks Trace RCU that uses scheduler locking and IPIs to synchronize with2785a Tasks Trace RCU API implemented as thin wrappers around SRCU-fast,
2786readers. Real-time systems that cannot tolerate IPIs may build their2786which avoids the read-side memory barriers, at least for architectures
2787kernels with ``CONFIG_TASKS_TRACE_RCU_READ_MB=y``, which avoids the IPIs at2787that apply noinstr to kernel entry/exit code (or that build with
2788the expense of adding full memory barriers to the read-side primitives.2788``CONFIG_TASKS_TRACE_RCU_NO_MB=y``.
2789 2789
2790The tasks-trace-RCU API is also reasonably compact,2790The tasks-trace-RCU API is also reasonably compact,
2791consisting of rcu_read_lock_trace(), rcu_read_unlock_trace(),2791consisting of rcu_read_lock_trace(), rcu_read_unlock_trace(),
Documentation/RCU/index.rst+0−7
@@ -28,10 +28,3 @@ RCU Handbook · 27 unmodified lines
28 Design/Expedited-Grace-Periods/Expedited-Grace-Periods28 Design/Expedited-Grace-Periods/Expedited-Grace-Periods
29 Design/Requirements/Requirements29 Design/Requirements/Requirements
30 Design/Data-Structures/Data-Structures30 Design/Data-Structures/Data-Structures
31
32.. only:: subproject and html
33
34 Indices
35 =======
36
37 * :ref:`genindex`
Documentation/accel/index.rst+0−7
@@ -11,10 +11,3 @@ Compute Accelerators · 10 unmodified lines
11 amdxdna/index11 amdxdna/index
12 qaic/index12 qaic/index
13 rocket/index13 rocket/index
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/accounting/delay-accounting.rst+16−16
@@ -107,22 +107,22 @@ Get sum and peak of delays, since system boot, for all pids with tgid 242:: · 106 unmodified lines
107 TGID 242107 TGID 242
108 108
109 109
110 CPU count real total virtual total delay total delay average delay max delay min110 CPU count real total virtual total delay total delay average delay max delay min delay max timestamp
111 39 156000000 156576579 2111069 0.054ms 0.212296ms 0.031307ms111 46 188000000 192348334 4098012 0.089ms 0.429260ms 0.051205ms 2026-01-15T15:06:58
112 IO count delay total delay average delay max delay min112 IO count delay total delay average delay max delay min delay max timestamp
113 0 0 0.000ms 0.000000ms 0.000000ms113 0 0 0.000ms 0.000000ms 0.000000ms N/A
114 SWAP count delay total delay average delay max delay min114 SWAP count delay total delay average delay max delay min delay max timestamp
115 0 0 0.000ms 0.000000ms 0.000000ms115 0 0 0.000ms 0.000000ms 0.000000ms N/A
116 RECLAIM count delay total delay average delay max delay min116 RECLAIM count delay total delay average delay max delay min delay max timestamp
117 0 0 0.000ms 0.000000ms 0.000000ms117 0 0 0.000ms 0.000000ms 0.000000ms N/A
118 THRASHING count delay total delay average delay max delay min118 THRASHING count delay total delay average delay max delay min delay max timestamp
119 0 0 0.000ms 0.000000ms 0.000000ms119 0 0 0.000ms 0.000000ms 0.000000ms N/A
120 COMPACT count delay total delay average delay max delay min120 COMPACT count delay total delay average delay max delay min delay max timestamp
121 0 0 0.000ms 0.000000ms 0.000000ms121 0 0 0.000ms 0.000000ms 0.000000ms N/A
122 WPCOPY count delay total delay average delay max delay min122 WPCOPY count delay total delay average delay max delay min delay max timestamp
123 156 11215873 0.072ms 0.207403ms 0.033913ms123 182 19413338 0.107ms 0.547353ms 0.022462ms 2026-01-15T15:05:24
124 IRQ count delay total delay average delay max delay min124 IRQ count delay total delay average delay max delay min delay max timestamp
125 0 0 0.000ms 0.000000ms 0.000000ms125 0 0 0.000ms 0.000000ms 0.000000ms N/A
126 126
127Get IO accounting for pid 1, it works only with -p::127Get IO accounting for pid 1, it works only with -p::
128 128
Documentation/admin-guide/LSM/landlock.rst+33−2
@@ -6,7 +6,7 @@ Landlock: system-wide management · 5 unmodified lines
6================================6================================
7 7
8:Author: Mickaël Salaün8:Author: Mickaël Salaün
9:Date: March 20259:Date: January 2026
10 10
11Landlock can leverage the audit framework to log events.11Landlock can leverage the audit framework to log events.
12 12
@@ -38,6 +38,37 @@ AUDIT_LANDLOCK_ACCESS · 25 unmodified lines
38 domain=195ba459b blockers=fs.refer path="/usr/bin" dev="vda2" ino=35138 domain=195ba459b blockers=fs.refer path="/usr/bin" dev="vda2" ino=351
39 domain=195ba459b blockers=fs.make_reg,fs.refer path="/usr/local" dev="vda2" ino=36539 domain=195ba459b blockers=fs.make_reg,fs.refer path="/usr/local" dev="vda2" ino=365
40 40
41
42 The ``blockers`` field uses dot-separated prefixes to indicate the type of
43 restriction that caused the denial:
44
45 **fs.*** - Filesystem access rights (ABI 1+):
46 - fs.execute, fs.write_file, fs.read_file, fs.read_dir
47 - fs.remove_dir, fs.remove_file
48 - fs.make_char, fs.make_dir, fs.make_reg, fs.make_sock
49 - fs.make_fifo, fs.make_block, fs.make_sym
50 - fs.refer (ABI 2+)
51 - fs.truncate (ABI 3+)
52 - fs.ioctl_dev (ABI 5+)
53
54 **net.*** - Network access rights (ABI 4+):
55 - net.bind_tcp - TCP port binding was denied
56 - net.connect_tcp - TCP connection was denied
57
58 **scope.*** - IPC scoping restrictions (ABI 6+):
59 - scope.abstract_unix_socket - Abstract UNIX socket connection denied
60 - scope.signal - Signal sending denied
61
62 Multiple blockers can appear in a single event (comma-separated) when
63 multiple access rights are missing. For example, creating a regular file
64 in a directory that lacks both ``make_reg`` and ``refer`` rights would show
65 ``blockers=fs.make_reg,fs.refer``.
66
67 The object identification fields (path, dev, ino for filesystem; opid,
68 ocomm for signals) depend on the type of access being blocked and provide
69 context about what resource was involved in the denial.
70
71
41AUDIT_LANDLOCK_DOMAIN72AUDIT_LANDLOCK_DOMAIN
42 This record type describes the status of a Landlock domain. The ``status``73 This record type describes the status of a Landlock domain. The ``status``
43 field can be either ``allocated`` or ``deallocated``.74 field can be either ``allocated`` or ``deallocated``.
@@ -86,7 +117,7 @@ This command generates two events, each identified with a unique serial · 42 unmodified lines
86number following a timestamp (``msg=audit(1729738800.268:30)``). The first117number following a timestamp (``msg=audit(1729738800.268:30)``). The first
87event (serial ``30``) contains 4 records. The first record118event (serial ``30``) contains 4 records. The first record
88(``type=LANDLOCK_ACCESS``) shows an access denied by the domain `1a6fdc66f`.119(``type=LANDLOCK_ACCESS``) shows an access denied by the domain `1a6fdc66f`.
89The cause of this denial is signal scopping restriction120The cause of this denial is signal scoping restriction
90(``blockers=scope.signal``). The process that would have receive this signal121(``blockers=scope.signal``). The process that would have receive this signal
91is the init process (``opid=1 ocomm="systemd"``).122is the init process (``opid=1 ocomm="systemd"``).
92 123
Documentation/admin-guide/README.rst+1−1
@@ -53,7 +53,7 @@ Documentation · 52 unmodified lines
53 these typically contain kernel-specific installation notes for some53 these typically contain kernel-specific installation notes for some
54 drivers for example. Please read the54 drivers for example. Please read the
55 :ref:`Documentation/process/changes.rst <changes>` file, as it55 :ref:`Documentation/process/changes.rst <changes>` file, as it
56 contains information about the problems, which may result by upgrading56 contains information about the problems which may result from upgrading
57 your kernel.57 your kernel.
58 58
59Installing the kernel source59Installing the kernel source
Documentation/admin-guide/aoe/index.rst+0−7
@@ -8,10 +8,3 @@ ATA over Ethernet (AoE) · 7 unmodified lines
8 aoe8 aoe
9 todo9 todo
10 examples10 examples
11
12.. only:: subproject and html
13
14 Indices
15 =======
16
17 * :ref:`genindex`
Documentation/admin-guide/auxdisplay/index.rst+0−7
@@ -7,10 +7,3 @@ Auxiliary Display Support · 6 unmodified lines
7 7
8 ks0108.rst8 ks0108.rst
9 cfag12864b.rst9 cfag12864b.rst
10
11.. only:: subproject and html
12
13 Indices
14 =======
15
16 * :ref:`genindex`
Documentation/admin-guide/blockdev/zram.rst+23−1
@@ -214,6 +214,9 @@ mem_limit WO specifies the maximum amount of memory ZRAM can · 213 unmodified lines
214writeback_limit WO specifies the maximum amount of write IO zram214writeback_limit WO specifies the maximum amount of write IO zram
215 can write out to backing device as 4KB unit215 can write out to backing device as 4KB unit
216writeback_limit_enable RW show and set writeback_limit feature216writeback_limit_enable RW show and set writeback_limit feature
217writeback_batch_size RW show and set maximum number of in-flight
218 writeback operations
219writeback_compressed RW show and set compressed writeback feature
217comp_algorithm RW show and change the compression algorithm220comp_algorithm RW show and change the compression algorithm
218algorithm_params WO setup compression algorithm parameters221algorithm_params WO setup compression algorithm parameters
219compact WO trigger memory compaction222compact WO trigger memory compaction
@@ -222,7 +225,6 @@ backing_dev RW set up backend storage for zram to write out · 2 unmodified lines
222idle WO mark allocated slot as idle225idle WO mark allocated slot as idle
223====================== ====== ===============================================226====================== ====== ===============================================
224 227
225
226User space is advised to use the following files to read the device statistics.228User space is advised to use the following files to read the device statistics.
227 229
228File /sys/block/zram<id>/stat230File /sys/block/zram<id>/stat
@@ -434,6 +436,26 @@ system reboot, echo 1 > /sys/block/zramX/reset) so keeping how many of · 205 unmodified lines
434writeback happened until you reset the zram to allocate extra writeback436writeback happened until you reset the zram to allocate extra writeback
435budget in next setting is user's job.437budget in next setting is user's job.
436 438
439By default zram stores written back pages in decompressed (raw) form, which
440means that writeback operation involves decompression of the page before
441writing it to the backing device. This behavior can be changed by enabling
442`writeback_compressed` feature, which causes zram to write compressed pages
443to the backing device, thus avoiding decompression overhead. To enable
444this feature, execute::
445
446 $ echo yes > /sys/block/zramX/writeback_compressed
447
448Note that this feature should be configured before the `zramX` device is
449initialized.
450
451Depending on backing device storage type, writeback operation may benefit
452from a higher number of in-flight write requests (batched writes). The
453number of maximum in-flight writeback operations can be configured via
454`writeback_batch_size` attribute. To change the default value (which is 32),
455execute::
456
457 $ echo 64 > /sys/block/zramX/writeback_batch_size
458
437If admin wants to measure writeback count in a certain period, they could459If admin wants to measure writeback count in a certain period, they could
438know it via /sys/block/zram0/bd_stat's 3rd column.460know it via /sys/block/zram0/bd_stat's 3rd column.
439 461
Documentation/admin-guide/bootconfig.rst+16−8
@@ -20,18 +20,26 @@ Config File Syntax · 19 unmodified lines
20 20
21The boot config syntax is a simple structured key-value. Each key consists21The boot config syntax is a simple structured key-value. Each key consists
22of dot-connected-words, and key and value are connected by ``=``. The value22of dot-connected-words, and key and value are connected by ``=``. The value
23has to be terminated by semi-colon (``;``) or newline (``\n``).23string has to be terminated by the following delimiters described below.
24For array value, array entries are separated by comma (``,``). ::
25
26 KEY[.WORD[...]] = VALUE[, VALUE2[...]][;]
27
28Unlike the kernel command line syntax, spaces are OK around the comma and ``=``.
29 24
30Each key word must contain only alphabets, numbers, dash (``-``) or underscore25Each key word must contain only alphabets, numbers, dash (``-``) or underscore
31(``_``). And each value only contains printable characters or spaces except26(``_``). And each value only contains printable characters or spaces except
32for delimiters such as semi-colon (``;``), new-line (``\n``), comma (``,``),27for delimiters such as semi-colon (``;``), new-line (``\n``), comma (``,``),
33hash (``#``) and closing brace (``}``).28hash (``#``) and closing brace (``}``).
34 29
30If the ``=`` is followed by whitespace up to one of these delimiters, the
31key is assigned an empty value.
32
33For arrays, the array values are comma (``,``) separated, and comments and
34line breaks with newline (``\n``) are allowed between array values for
35readability. Thus the first entry of the array must be on the same line as
36the key.::
37
38 KEY[.WORD[...]] = VALUE[, VALUE2[...]][;]
39
40Unlike the kernel command line syntax, white spaces (including tabs) are
41ignored around the comma and ``=``.
42
35If you want to use those delimiters in a value, you can use either double-43If you want to use those delimiters in a value, you can use either double-
36quotes (``"VALUE"``) or single-quotes (``'VALUE'``) to quote it. Note that44quotes (``"VALUE"``) or single-quotes (``'VALUE'``) to quote it. Note that
37you can not escape these quotes.45you can not escape these quotes.
@@ -138,8 +146,8 @@ This is parsed as below:: · 100 unmodified lines
138 foo = value146 foo = value
139 bar = 1, 2, 3147 bar = 1, 2, 3
140 148
141Note that you can not put a comment between value and delimiter(``,`` or149Note that you can NOT put a comment or a newline between value and delimiter
142``;``). This means following config has a syntax error ::150(``,`` or ``;``). This means following config has a syntax error ::
143 151
144 key = 1 # comment152 key = 1 # comment
145 ,2153 ,2
Documentation/admin-guide/bug-hunting.rst+3−3
@@ -52,14 +52,14 @@ line is usually required to identify and handle the bug. Along this chapter, · 51 unmodified lines
52we'll refer to "Oops" for all kinds of stack traces that need to be analyzed.52we'll refer to "Oops" for all kinds of stack traces that need to be analyzed.
53 53
54If the kernel is compiled with ``CONFIG_DEBUG_INFO``, you can enhance the54If the kernel is compiled with ``CONFIG_DEBUG_INFO``, you can enhance the
55quality of the stack trace by using file:`scripts/decode_stacktrace.sh`.55quality of the stack trace by using ``scripts/decode_stacktrace.sh``.
56 56
57Modules linked in57Modules linked in
58-----------------58-----------------
59 59
60Modules that are tainted or are being loaded or unloaded are marked with60Modules that are tainted or are being loaded or unloaded are marked with
61"(...)", where the taint flags are described in61"(...)", where the taint flags are described in
62file:`Documentation/admin-guide/tainted-kernels.rst`, "being loaded" is62Documentation/admin-guide/tainted-kernels.rst, "being loaded" is
63annotated with "+", and "being unloaded" is annotated with "-".63annotated with "+", and "being unloaded" is annotated with "-".
64 64
65 65
@@ -235,7 +235,7 @@ Dave Miller):: · 169 unmodified lines
235 mov 0x8(%ebp), %ebx ! %ebx = skb->sk235 mov 0x8(%ebp), %ebx ! %ebx = skb->sk
236 mov 0x13c(%ebx), %eax ! %eax = inet_sk(sk)->opt236 mov 0x13c(%ebx), %eax ! %eax = inet_sk(sk)->opt
237 237
238file:`scripts/decodecode` can be used to automate most of this, depending238``scripts/decodecode`` can be used to automate most of this, depending
239on what CPU architecture is being debugged.239on what CPU architecture is being debugged.
240 240
241Reporting the bug241Reporting the bug
Documentation/admin-guide/cgroup-v1/hugetlb.rst+9−9
@@ -77,7 +77,7 @@ control group and enforces the limit during page fault. Since HugeTLB · 76 unmodified lines
77doesn't support page reclaim, enforcing the limit at page fault time implies77doesn't support page reclaim, enforcing the limit at page fault time implies
78that, the application will get SIGBUS signal if it tries to fault in HugeTLB78that, the application will get SIGBUS signal if it tries to fault in HugeTLB
79pages beyond its limit. Therefore the application needs to know exactly how many79pages beyond its limit. Therefore the application needs to know exactly how many
80HugeTLB pages it uses before hand, and the sysadmin needs to make sure that80HugeTLB pages it uses beforehand, and the sysadmin needs to make sure that
81there are enough available on the machine for all the users to avoid processes81there are enough available on the machine for all the users to avoid processes
82getting SIGBUS.82getting SIGBUS.
83 83
@@ -91,23 +91,23 @@ getting SIGBUS. · 7 unmodified lines
91 hugetlb.<hugepagesize>.rsvd.usage_in_bytes91 hugetlb.<hugepagesize>.rsvd.usage_in_bytes
92 hugetlb.<hugepagesize>.rsvd.failcnt92 hugetlb.<hugepagesize>.rsvd.failcnt
93 93
94The HugeTLB controller allows to limit the HugeTLB reservations per control94The HugeTLB controller allows limiting the HugeTLB reservations per control
95group and enforces the controller limit at reservation time and at the fault of95group and enforces the controller limit at reservation time and at the fault of
96HugeTLB memory for which no reservation exists. Since reservation limits are96HugeTLB memory for which no reservation exists. Since reservation limits are
97enforced at reservation time (on mmap or shget), reservation limits never causes97enforced at reservation time (on mmap or shget), reservation limits never cause
98the application to get SIGBUS signal if the memory was reserved before hand. For98the application to get SIGBUS signal if the memory was reserved beforehand. For
99MAP_NORESERVE allocations, the reservation limit behaves the same as the fault99MAP_NORESERVE allocations, the reservation limit behaves the same as the fault
100limit, enforcing memory usage at fault time and causing the application to100limit, enforcing memory usage at fault time and causing the application to
101receive a SIGBUS if it's crossing its limit.101receive a SIGBUS if it's crossing its limit.
102 102
103Reservation limits are superior to page fault limits described above, since103Reservation limits are superior to page fault limits described above, since
104reservation limits are enforced at reservation time (on mmap or shget), and104reservation limits are enforced at reservation time (on mmap or shget), and
105never causes the application to get SIGBUS signal if the memory was reserved105never cause the application to get SIGBUS signal if the memory was reserved
106before hand. This allows for easier fallback to alternatives such as106beforehand. This allows for easier fallback to alternatives such as
107non-HugeTLB memory for example. In the case of page fault accounting, it's very107non-HugeTLB memory for example. In the case of page fault accounting, it's very
108hard to avoid processes getting SIGBUS since the sysadmin needs precisely know108hard to avoid processes getting SIGBUS since the sysadmin needs to precisely know
109the HugeTLB usage of all the tasks in the system and make sure there is enough109the HugeTLB usage of all the tasks in the system and make sure there are enough
110pages to satisfy all requests. Avoiding tasks getting SIGBUS on overcommited110pages to satisfy all requests. Avoiding tasks getting SIGBUS on overcommitted
111systems is practically impossible with page fault accounting.111systems is practically impossible with page fault accounting.
112 112
113 113
Documentation/admin-guide/cgroup-v1/index.rst+0−7
@@ -22,10 +22,3 @@ Control Groups version 1 · 21 unmodified lines
22 net_prio22 net_prio
23 pids23 pids
24 rdma24 rdma
25
26.. only:: subproject and html
27
28 Indices
29 =======
30
31 * :ref:`genindex`
Documentation/admin-guide/cgroup-v1/memory.rst+2−3
@@ -311,9 +311,8 @@ Lock order is as follows:: · 310 unmodified lines
311 311
312 folio_lock312 folio_lock
313 mm->page_table_lock or split pte_lock313 mm->page_table_lock or split pte_lock
314 folio_memcg_lock (memcg->move_lock)314 mapping->i_pages lock
315 mapping->i_pages lock315 lruvec->lru_lock.
316 lruvec->lru_lock.
317 316
318Per-node-per-memcgroup LRU (cgroup's private LRU) is guarded by317Per-node-per-memcgroup LRU (cgroup's private LRU) is guarded by
319lruvec->lru_lock; the folio LRU flag is cleared before318lruvec->lru_lock; the folio LRU flag is cleared before
Documentation/admin-guide/cgroup-v2.rst+28−18
@@ -737,9 +737,6 @@ combinations are invalid and should be rejected. Also, if the · 736 unmodified lines
737resource is mandatory for execution of processes, process migrations737resource is mandatory for execution of processes, process migrations
738may be rejected.738may be rejected.
739 739
740"cpu.rt.max" hard-allocates realtime slices and is an example of this
741type.
742
743 740
744Interface Files741Interface Files
745===============742===============
@@ -2561,10 +2558,10 @@ Cpuset Interface Files · 1815 unmodified lines
2561 Users can manually set it to a value that is different from2558 Users can manually set it to a value that is different from
2562 "cpuset.cpus". One constraint in setting it is that the list of2559 "cpuset.cpus". One constraint in setting it is that the list of
2563 CPUs must be exclusive with respect to "cpuset.cpus.exclusive"2560 CPUs must be exclusive with respect to "cpuset.cpus.exclusive"
2564 of its sibling. If "cpuset.cpus.exclusive" of a sibling cgroup2561 and "cpuset.cpus.exclusive.effective" of its siblings. Another
2565 isn't set, its "cpuset.cpus" value, if set, cannot be a subset2562 constraint is that it cannot be a superset of "cpuset.cpus"
2566 of it to leave at least one CPU available when the exclusive2563 of its sibling in order to leave at least one CPU available to
2567 CPUs are taken away.2564 that sibling when the exclusive CPUs are taken away.
2568 2565
2569 For a parent cgroup, any one of its exclusive CPUs can only2566 For a parent cgroup, any one of its exclusive CPUs can only
2570 be distributed to at most one of its child cgroups. Having an2567 be distributed to at most one of its child cgroups. Having an
@@ -2584,9 +2581,9 @@ Cpuset Interface Files · 13 unmodified lines
2584 of this file will always be a subset of its parent's2581 of this file will always be a subset of its parent's
2585 "cpuset.cpus.exclusive.effective" if its parent is not the root2582 "cpuset.cpus.exclusive.effective" if its parent is not the root
2586 cgroup. It will also be a subset of "cpuset.cpus.exclusive"2583 cgroup. It will also be a subset of "cpuset.cpus.exclusive"
2587 if it is set. If "cpuset.cpus.exclusive" is not set, it is2584 if it is set. This file should only be non-empty if either
2588 treated to have an implicit value of "cpuset.cpus" in the2585 "cpuset.cpus.exclusive" is set or when the current cpuset is
2589 formation of local partition.2586 a valid partition root.
2590 2587
2591 cpuset.cpus.isolated2588 cpuset.cpus.isolated
2592 A read-only and root cgroup only multiple values file.2589 A read-only and root cgroup only multiple values file.
@@ -2618,13 +2615,22 @@ Cpuset Interface Files · 25 unmodified lines
2618 There are two types of partitions - local and remote. A local2615 There are two types of partitions - local and remote. A local
2619 partition is one whose parent cgroup is also a valid partition2616 partition is one whose parent cgroup is also a valid partition
2620 root. A remote partition is one whose parent cgroup is not a2617 root. A remote partition is one whose parent cgroup is not a
2621 valid partition root itself. Writing to "cpuset.cpus.exclusive"2618 valid partition root itself.
2622 is optional for the creation of a local partition as its2619
2623 "cpuset.cpus.exclusive" file will assume an implicit value that2620 Writing to "cpuset.cpus.exclusive" is optional for the creation
2624 is the same as "cpuset.cpus" if it is not set. Writing the2621 of a local partition as its "cpuset.cpus.exclusive" file will
2625 proper "cpuset.cpus.exclusive" values down the cgroup hierarchy2622 assume an implicit value that is the same as "cpuset.cpus" if it
2626 before the target partition root is mandatory for the creation2623 is not set. Writing the proper "cpuset.cpus.exclusive" values
2627 of a remote partition.2624 down the cgroup hierarchy before the target partition root is
2625 mandatory for the creation of a remote partition.
2626
2627 Not all the CPUs requested in "cpuset.cpus.exclusive" can be
2628 used to form a new partition. Only those that were present
2629 in its parent's "cpuset.cpus.exclusive.effective" control
2630 file can be used. For partitions created without setting
2631 "cpuset.cpus.exclusive", exclusive CPUs specified in sibling's
2632 "cpuset.cpus.exclusive" or "cpuset.cpus.exclusive.effective"
2633 also cannot be used.
2628 2634
2629 Currently, a remote partition cannot be created under a local2635 Currently, a remote partition cannot be created under a local
2630 partition. All the ancestors of a remote partition root except2636 partition. All the ancestors of a remote partition root except
@@ -2632,6 +2638,10 @@ Cpuset Interface Files · 1 unmodified line
2632 2638
2633 The root cgroup is always a partition root and its state cannot2639 The root cgroup is always a partition root and its state cannot
2634 be changed. All other non-root cgroups start out as "member".2640 be changed. All other non-root cgroups start out as "member".
2641 Even though the "cpuset.cpus.exclusive*" and "cpuset.cpus"
2642 control files are not present in the root cgroup, they are
2643 implicitly the same as the "/sys/devices/system/cpu/possible"
2644 sysfs file.
2635 2645
2636 When set to "root", the current cgroup is the root of a new2646 When set to "root", the current cgroup is the root of a new
2637 partition or scheduling domain. The set of exclusive CPUs is2647 partition or scheduling domain. The set of exclusive CPUs is
@@ -2816,7 +2826,7 @@ DMEM Interface Files · 178 unmodified lines
2816HugeTLB2826HugeTLB
2817-------2827-------
2818 2828
2819The HugeTLB controller allows to limit the HugeTLB usage per control group and2829The HugeTLB controller allows limiting the HugeTLB usage per control group and
2820enforces the controller limit during page fault.2830enforces the controller limit during page fault.
2821 2831
2822HugeTLB Interface Files2832HugeTLB Interface Files
Documentation/admin-guide/cifs/index.rst+0−7
@@ -12,10 +12,3 @@ CIFS · 11 unmodified lines
12 todo12 todo
13 changes13 changes
14 authors14 authors
15
16.. only:: subproject and html
17
18 Indices
19 =======
20
21 * :ref:`genindex`
Documentation/admin-guide/device-mapper/dm-raid.rst+1−1
@@ -433,7 +433,7 @@ Table line examples: · 432 unmodified lines
433 8192 1960886272 linear 8:0 0 2048 # previous data segment433 8192 1960886272 linear 8:0 0 2048 # previous data segment
434 434
435# Mapping table for e.g. raid5_rs reshape causing the size of the raid device to double-fold once the reshape finishes.435# Mapping table for e.g. raid5_rs reshape causing the size of the raid device to double-fold once the reshape finishes.
436# Check the status output (e.g. "dmsetup status $RaidDev") for progess.436# Check the status output (e.g. "dmsetup status $RaidDev") for progress.
437 437
438 0 $((2 * 1960886272)) raid raid5 7 0 region_size 2048 data_offset 8192 delta_disk 1 2 /dev/dm-0 /dev/dm-1 /dev/dm-2 /dev/dm-3438 0 $((2 * 1960886272)) raid raid5 7 0 region_size 2048 data_offset 8192 delta_disk 1 2 /dev/dm-0 /dev/dm-1 /dev/dm-2 /dev/dm-3
439 439
Documentation/admin-guide/device-mapper/index.rst+0−7
@@ -40,10 +40,3 @@ Device Mapper · 39 unmodified lines
40 verity40 verity
41 writecache41 writecache
42 zero42 zero
43
44.. only:: subproject and html
45
46 Indices
47 =======
48
49 * :ref:`genindex`
Documentation/admin-guide/devices.rst+6−4
@@ -97,9 +97,12 @@ It is recommended that these links exist on all systems: · 96 unmodified lines
97/dev/bttv0 video0 symbolic Backward compatibility97/dev/bttv0 video0 symbolic Backward compatibility
98/dev/radio radio0 symbolic Backward compatibility98/dev/radio radio0 symbolic Backward compatibility
99/dev/i2o* /dev/i2o/* symbolic Backward compatibility99/dev/i2o* /dev/i2o/* symbolic Backward compatibility
100/dev/scd? sr? hard Alternate SCSI CD-ROM name
101=============== =============== =============== ===============================100=============== =============== =============== ===============================
102 101
102Suggested earlier ``/dev/scd?`` alternative names for ``/dev/sr?``
103CD-ROM and other optical drives (using SCSI commands) were removed
104in ``udev`` version 174 that was released in 2011.
105
103Locally defined links106Locally defined links
104+++++++++++++++++++++107+++++++++++++++++++++
105 108
@@ -112,7 +115,6 @@ exist, they should have the following uses. · 6 unmodified lines
112/dev/mouse mouse port symbolic Current mouse device115/dev/mouse mouse port symbolic Current mouse device
113/dev/tape tape device symbolic Current tape device116/dev/tape tape device symbolic Current tape device
114/dev/cdrom CD-ROM device symbolic Current CD-ROM device117/dev/cdrom CD-ROM device symbolic Current CD-ROM device
115/dev/cdwriter CD-writer symbolic Current CD-writer device
116/dev/scanner scanner symbolic Current scanner device118/dev/scanner scanner symbolic Current scanner device
117/dev/modem modem port symbolic Current dialout device119/dev/modem modem port symbolic Current dialout device
118/dev/root root device symbolic Current root filesystem120/dev/root root device symbolic Current root filesystem
@@ -126,8 +128,8 @@ exists, ``/dev/modem`` should point to the appropriate primary TTY device · 7 unmodified lines
126 128
127For SCSI devices, ``/dev/tape`` and ``/dev/cdrom`` should point to the129For SCSI devices, ``/dev/tape`` and ``/dev/cdrom`` should point to the
128*cooked* devices (``/dev/st*`` and ``/dev/sr*``, respectively), whereas130*cooked* devices (``/dev/st*`` and ``/dev/sr*``, respectively), whereas
129``/dev/cdwriter`` and /dev/scanner should point to the appropriate generic131``/dev/scanner`` should point to the appropriate generic
130SCSI devices (/dev/sg*).132SCSI device (``/dev/sg*``).
131 133
132``/dev/mouse`` may point to a primary serial TTY device, a hardware mouse134``/dev/mouse`` may point to a primary serial TTY device, a hardware mouse
133device, or a socket for a mouse driver program (e.g. ``/dev/gpmdata``).135device, or a socket for a mouse driver program (e.g. ``/dev/gpmdata``).
Documentation/admin-guide/devices.txt+4−4
@@ -352,7 +352,7 @@ · 351 unmodified lines
352 216 = /dev/fujitsu/apanel Fujitsu/Siemens application panel352 216 = /dev/fujitsu/apanel Fujitsu/Siemens application panel
353 217 = /dev/ni/natmotn National Instruments Motion353 217 = /dev/ni/natmotn National Instruments Motion
354 218 = /dev/kchuid Inter-process chuid control354 218 = /dev/kchuid Inter-process chuid control
355 219 = /dev/modems/mwave MWave modem firmware upload355 219 =
356 220 = /dev/mptctl Message passing technology (MPT) control356 220 = /dev/mptctl Message passing technology (MPT) control
357 221 = /dev/mvista/hssdsi Montavista PICMG hot swap system driver357 221 = /dev/mvista/hssdsi Montavista PICMG hot swap system driver
358 222 = /dev/mvista/hasi Montavista PICMG high availability358 222 = /dev/mvista/hasi Montavista PICMG high availability
@@ -389,11 +389,11 @@ · 30 unmodified lines
389 ...389 ...
390 390
391 11 block SCSI CD-ROM devices391 11 block SCSI CD-ROM devices
392 0 = /dev/scd0 First SCSI CD-ROM392 0 = /dev/sr0 First SCSI CD-ROM
393 1 = /dev/scd1 Second SCSI CD-ROM393 1 = /dev/sr1 Second SCSI CD-ROM
394 ...394 ...
395 395
396 The prefix /dev/sr (instead of /dev/scd) has been deprecated.396 In the past the prefix /dev/scd (instead of /dev/sr) was used and even recommended.
397 397
398 12 char QIC-02 tape398 12 char QIC-02 tape
399 2 = /dev/ntpqic11 QIC-11, no rewind-on-close399 2 = /dev/ntpqic11 QIC-11, no rewind-on-close
Documentation/admin-guide/gpio/index.rst+0−7
@@ -12,10 +12,3 @@ GPIO · 11 unmodified lines
12 gpio-sim12 gpio-sim
13 gpio-virtuser13 gpio-virtuser
14 Obsolete APIs <obsolete>14 Obsolete APIs <obsolete>
15
16.. only:: subproject and html
17
18 Indices
19 =======
20
21 * :ref:`genindex`
Documentation/admin-guide/index.rst+0−7
@@ -189,10 +189,3 @@ A few hard-to-categorize and generally obsolete documents. · 188 unmodified lines
189 189
190 ldm190 ldm
191 unicode191 unicode
192
193.. only:: subproject and html
194
195 Indices
196 =======
197
198 * :ref:`genindex`
Documentation/admin-guide/initrd.rst+1−1
@@ -297,7 +297,7 @@ as follows: · 296 unmodified lines
297 8) now the system is bootable and additional installation tasks can be297 8) now the system is bootable and additional installation tasks can be
298 performed298 performed
299 299
300The key role of initrd here is to re-use the configuration data during300The key role of initrd here is to reuse the configuration data during
301normal system operation without requiring the use of a bloated "generic"301normal system operation without requiring the use of a bloated "generic"
302kernel or re-compiling or re-linking the kernel.302kernel or re-compiling or re-linking the kernel.
303 303
Documentation/admin-guide/kdump/index.rst+0−7
@@ -11,10 +11,3 @@ information. · 10 unmodified lines
11 11
12 kdump12 kdump
13 vmcoreinfo13 vmcoreinfo
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/admin-guide/kdump/kdump.rst+1−1
@@ -591,7 +591,7 @@ with /sys/kernel/config/crash_dm_crypt_keys for setup, · 590 unmodified lines
591 cat /sys/kernel/config/crash_dm_crypt_keys/count591 cat /sys/kernel/config/crash_dm_crypt_keys/count
592 2592 2
593 593
594 # To support CPU/memory hot-plugging, re-use keys already saved to reserved594 # To support CPU/memory hot-plugging, reuse keys already saved to reserved
595 # memory595 # memory
596 echo true > /sys/kernel/config/crash_dm_crypt_key/reuse596 echo true > /sys/kernel/config/crash_dm_crypt_key/reuse
597 597
Documentation/admin-guide/kernel-parameters.txt+176−29
@@ -125,6 +125,8 @@ Kernel parameters · 124 unmodified lines
125 may result in duplicate corrected error reports.125 may result in duplicate corrected error reports.
126 nospcr -- disable console in ACPI SPCR table as126 nospcr -- disable console in ACPI SPCR table as
127 default _serial_ console on ARM64127 default _serial_ console on ARM64
128 spcr -- enable console in ACPI SPCR table as
129 default _serial_ console on x86
128 For ARM64, ONLY "acpi=off", "acpi=on", "acpi=force" or130 For ARM64, ONLY "acpi=off", "acpi=on", "acpi=force" or
129 "acpi=nospcr" are available131 "acpi=nospcr" are available
130 For RISCV64, ONLY "acpi=off", "acpi=on" or "acpi=force"132 For RISCV64, ONLY "acpi=off", "acpi=on" or "acpi=force"
@@ -1370,6 +1372,13 @@ Kernel parameters · 1239 unmodified lines
1370 For details see:1372 For details see:
1371 Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst1373 Documentation/admin-guide/hw-vuln/reg-file-data-sampling.rst
1372 1374
1375 dm_verity.keyring_unsealed=
1376 [KNL] When set to 1, leave the dm-verity keyring
1377 unsealed after initialization so userspace can
1378 provision keys. Once the keyring is restricted
1379 it becomes active and is searched during signature
1380 verification.
1381
1373 driver_async_probe= [KNL]1382 driver_async_probe= [KNL]
1374 List of driver names to be probed asynchronously. *1383 List of driver names to be probed asynchronously. *
1375 matches with all driver names. If * is specified, the1384 matches with all driver names. If * is specified, the
@@ -1969,6 +1978,9 @@ Kernel parameters · 593 unmodified lines
1969 param "no_hash_pointers" is an alias for1978 param "no_hash_pointers" is an alias for
1970 this mode.1979 this mode.
1971 1980
1981 For controlling hashing dynamically at runtime,
1982 use the "kernel.kptr_restrict" sysctl instead.
1983
1972 hashdist= [KNL,NUMA] Large hashes allocated during boot1984 hashdist= [KNL,NUMA] Large hashes allocated during boot
1973 are distributed across NUMA nodes. Defaults on1985 are distributed across NUMA nodes. Defaults on
1974 for 64-bit NUMA, off otherwise.1986 for 64-bit NUMA, off otherwise.
@@ -2675,6 +2687,15 @@ Kernel parameters · 700 unmodified lines
2675 1 - Bypass the IOMMU for DMA.2687 1 - Bypass the IOMMU for DMA.
2676 unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH.2688 unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH.
2677 2689
2690 iommu.debug_pagealloc=
2691 [KNL,EARLY] When CONFIG_IOMMU_DEBUG_PAGEALLOC is set, this
2692 parameter enables the feature at boot time. By default, it
2693 is disabled and the system behaves the same way as a kernel
2694 built without CONFIG_IOMMU_DEBUG_PAGEALLOC.
2695 Format: { "0" | "1" }
2696 0 - Sanitizer disabled.
2697 1 - Sanitizer enabled, expect runtime overhead.
2698
2678 io7= [HW] IO7 for Marvel-based Alpha systems2699 io7= [HW] IO7 for Marvel-based Alpha systems
2679 See comment before marvel_specify_io7 in2700 See comment before marvel_specify_io7 in
2680 arch/alpha/kernel/core_marvel.c.2701 arch/alpha/kernel/core_marvel.c.
@@ -2917,6 +2938,41 @@ Kernel parameters · 236 unmodified lines
2917 for Movable pages. "nn[KMGTPE]", "nn%", and "mirror"2938 for Movable pages. "nn[KMGTPE]", "nn%", and "mirror"
2918 are exclusive, so you cannot specify multiple forms.2939 are exclusive, so you cannot specify multiple forms.
2919 2940
2941 kfence.burst= [MM,KFENCE] The number of additional successive
2942 allocations to be attempted through KFENCE for each
2943 sample interval.
2944 Format: <unsigned integer>
2945 Default: 0
2946
2947 kfence.check_on_panic=
2948 [MM,KFENCE] Whether to check all KFENCE-managed objects'
2949 canaries on panic.
2950 Format: <bool>
2951 Default: false
2952
2953 kfence.deferrable=
2954 [MM,KFENCE] Whether to use a deferrable timer to trigger
2955 allocations. This avoids forcing CPU wake-ups if the
2956 system is idle, at the risk of a less predictable
2957 sample interval.
2958 Format: <bool>
2959 Default: CONFIG_KFENCE_DEFERRABLE
2960
2961 kfence.sample_interval=
2962 [MM,KFENCE] KFENCE's sample interval in milliseconds.
2963 Format: <unsigned integer>
2964 0 - Disable KFENCE.
2965 >0 - Enabled KFENCE with given sample interval.
2966 Default: CONFIG_KFENCE_SAMPLE_INTERVAL
2967
2968 kfence.skip_covered_thresh=
2969 [MM,KFENCE] If pool utilization reaches this threshold
2970 (pool usage%), KFENCE limits currently covered
2971 allocations of the same source from further filling
2972 up the pool.
2973 Format: <unsigned integer>
2974 Default: 75
2975
2920 kgdbdbgp= [KGDB,HW,EARLY] kgdb over EHCI usb debug port.2976 kgdbdbgp= [KGDB,HW,EARLY] kgdb over EHCI usb debug port.
2921 Format: <Controller#>[,poll interval]2977 Format: <Controller#>[,poll interval]
2922 The controller # is the number of the ehci usb debug2978 The controller # is the number of the ehci usb debug
@@ -3044,6 +3100,26 @@ Kernel parameters · 121 unmodified lines
3044 3100
3045 Default is Y (on).3101 Default is Y (on).
3046 3102
3103 kvm.enable_pmu=[KVM,X86]
3104 If enabled, KVM will virtualize PMU functionality based
3105 on the virtual CPU model defined by userspace. This
3106 can be overridden on a per-VM basis via
3107 KVM_CAP_PMU_CAPABILITY.
3108
3109 If disabled, KVM will not virtualize PMU functionality,
3110 e.g. MSRs, PMCs, PMIs, etc., even if userspace defines
3111 a virtual CPU model that contains PMU assets.
3112
3113 Note, KVM's vPMU support implicitly requires running
3114 with an in-kernel local APIC, e.g. to deliver PMIs to
3115 the guest. Running without an in-kernel local APIC is
3116 not supported, though KVM will allow such a combination
3117 (with severely degraded functionality).
3118
3119 See also enable_mediated_pmu.
3120
3121 Default is Y (on).
3122
3047 kvm.enable_virt_at_load=[KVM,ARM64,LOONGARCH,MIPS,RISCV,X86]3123 kvm.enable_virt_at_load=[KVM,ARM64,LOONGARCH,MIPS,RISCV,X86]
3048 If enabled, KVM will enable virtualization in hardware3124 If enabled, KVM will enable virtualization in hardware
3049 when KVM is loaded, and disable virtualization when KVM3125 when KVM is loaded, and disable virtualization when KVM
@@ -3090,6 +3166,35 @@ Kernel parameters · 40 unmodified lines
3090 If the value is 0 (the default), KVM will pick a period based3166 If the value is 0 (the default), KVM will pick a period based
3091 on the ratio, such that a page is zapped after 1 hour on average.3167 on the ratio, such that a page is zapped after 1 hour on average.
3092 3168
3169 kvm-{amd,intel}.enable_mediated_pmu=[KVM,AMD,INTEL]
3170 If enabled, KVM will provide a mediated virtual PMU,
3171 instead of the default perf-based virtual PMU (if
3172 kvm.enable_pmu is true and PMU is enumerated via the
3173 virtual CPU model).
3174
3175 With a perf-based vPMU, KVM operates as a user of perf,
3176 i.e. emulates guest PMU counters using perf events.
3177 KVM-created perf events are managed by perf as regular
3178 (guest-only) events, e.g. are scheduled in/out, contend
3179 for hardware resources, etc. Using a perf-based vPMU
3180 allows guest and host usage of the PMU to co-exist, but
3181 incurs non-trivial overhead and can result in silently
3182 dropped guest events (due to resource contention).
3183
3184 With a mediated vPMU, hardware PMU state is context
3185 switched around the world switch to/from the guest.
3186 KVM mediates which events the guest can utilize, but
3187 gives the guest direct access to all other PMU assets
3188 when possible (KVM may intercept some accesses if the
3189 virtual CPU model provides a subset of hardware PMU
3190 functionality). Using a mediated vPMU significantly
3191 reduces PMU virtualization overhead and eliminates lost
3192 guest events, but is mutually exclusive with using perf
3193 to profile KVM guests and adds latency to most VM-Exits
3194 (to context switch PMU state).
3195
3196 Default is N (off).
3197
3093 kvm-amd.nested= [KVM,AMD] Control nested virtualization feature in3198 kvm-amd.nested= [KVM,AMD] Control nested virtualization feature in
3094 KVM/SVM. Default is 1 (enabled).3199 KVM/SVM. Default is 1 (enabled).
3095 3200
@@ -3412,6 +3517,11 @@ Kernel parameters · 316 unmodified lines
3412 * [no]logdir: Enable or disable access to the general3517 * [no]logdir: Enable or disable access to the general
3413 purpose log directory.3518 purpose log directory.
3414 3519
3520 * max_sec=<sectors>: Set the transfer size limit, in
3521 number of 512-byte sectors, to the value specified in
3522 <sectors>. The value specified in <sectors> has to be
3523 a non-zero positive integer.
3524
3415 * max_sec_128: Set transfer size limit to 128 sectors.3525 * max_sec_128: Set transfer size limit to 128 sectors.
3416 3526
3417 * max_sec_1024: Set or clear transfer size limit to3527 * max_sec_1024: Set or clear transfer size limit to
@@ -3437,7 +3547,10 @@ Kernel parameters · 19 unmodified lines
3437 If there are multiple matching configurations changing3547 If there are multiple matching configurations changing
3438 the same attribute, the last one is used.3548 the same attribute, the last one is used.
3439 3549
3440 load_ramdisk= [RAM] [Deprecated]3550 liveupdate= [KNL,EARLY]
3551 Format: <bool>
3552 Enable Live Update Orchestrator (LUO).
3553 Default: off.
3441 3554
3442 lockd.nlm_grace_period=P [NFS] Assign grace period.3555 lockd.nlm_grace_period=P [NFS] Assign grace period.
3443 Format: <integer>3556 Format: <integer>
@@ -3998,6 +4111,7 @@ Kernel parameters · 554 unmodified lines
3998 spectre_v2_user=off [X86]4111 spectre_v2_user=off [X86]
3999 srbds=off [X86,INTEL]4112 srbds=off [X86,INTEL]
4000 ssbd=force-off [ARM64]4113 ssbd=force-off [ARM64]
4114 tsa=off [X86,AMD]
4001 tsx_async_abort=off [X86]4115 tsx_async_abort=off [X86]
4002 vmscape=off [X86]4116 vmscape=off [X86]
4003 4117
@@ -4444,8 +4558,10 @@ Kernel parameters · 440 unmodified lines
4444 Note that this argument takes precedence over4558 Note that this argument takes precedence over
4445 the CONFIG_RCU_NOCB_CPU_DEFAULT_ALL option.4559 the CONFIG_RCU_NOCB_CPU_DEFAULT_ALL option.
4446 4560
4447 noinitrd [RAM] Tells the kernel not to load any configured4561 noinitrd [Deprecated,RAM] Tells the kernel not to load any configured
4448 initial RAM disk.4562 initial RAM disk. Currently this parameter applies to
4563 initrd only, not to initramfs. But it applies to both
4564 in EFI mode.
4449 4565
4450 nointremap [X86-64,Intel-IOMMU,EARLY] Do not enable interrupt4566 nointremap [X86-64,Intel-IOMMU,EARLY] Do not enable interrupt
4451 remapping.4567 remapping.
@@ -4545,7 +4661,7 @@ Kernel parameters · 93 unmodified lines
4545 nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).4661 nosmt [KNL,MIPS,PPC,EARLY] Disable symmetric multithreading (SMT).
4546 Equivalent to smt=1.4662 Equivalent to smt=1.
4547 4663
4548 [KNL,X86,PPC,S390] Disable symmetric multithreading (SMT).4664 [KNL,LOONGARCH,X86,PPC,S390] Disable symmetric multithreading (SMT).
4549 nosmt=force: Force disable SMT, cannot be undone4665 nosmt=force: Force disable SMT, cannot be undone
4550 via the sysfs control file.4666 via the sysfs control file.
4551 4667
@@ -4753,6 +4869,21 @@ Kernel parameters · 201 unmodified lines
4753 panic_on_warn=1 panic() instead of WARN(). Useful to cause kdump4869 panic_on_warn=1 panic() instead of WARN(). Useful to cause kdump
4754 on a WARN().4870 on a WARN().
4755 4871
4872 panic_force_cpu=
4873 [KNL,SMP] Force panic handling to execute on a specific CPU.
4874 Format: <cpu number>
4875 Some platforms require panic handling to occur on a
4876 specific CPU for the crash kernel to function correctly.
4877 This can be due to firmware limitations, interrupt routing
4878 constraints, or platform-specific requirements where only
4879 a particular CPU can safely enter the crash kernel.
4880 When set, panic() will redirect execution to the specified
4881 CPU before proceeding with the normal panic and kexec flow.
4882 If the target CPU is offline or unavailable, panic proceeds
4883 on the current CPU.
4884 This option should only be used for systems with the above
4885 constraints as it might cause the panic operation to be less reliable.
4886
4756 panic_print= Bitmask for printing system info when panic happens.4887 panic_print= Bitmask for printing system info when panic happens.
4757 User can chose combination of the following bits:4888 User can chose combination of the following bits:
4758 bit 0: print all tasks info4889 bit 0: print all tasks info
@@ -5402,8 +5533,6 @@ Kernel parameters · 643 unmodified lines
5402 Param: <number> - step/bucket size as a power of 2 for5533 Param: <number> - step/bucket size as a power of 2 for
5403 statistical time based profiling.5534 statistical time based profiling.
5404 5535
5405 prompt_ramdisk= [RAM] [Deprecated]
5406
5407 prot_virt= [S390] enable hosting protected virtual machines5536 prot_virt= [S390] enable hosting protected virtual machines
5408 isolated from the hypervisor (if hardware supports5537 isolated from the hypervisor (if hardware supports
5409 that). If enabled, the default kernel base address5538 that). If enabled, the default kernel base address
@@ -5460,7 +5589,7 @@ Kernel parameters · 50 unmodified lines
5460 ramdisk_size= [RAM] Sizes of RAM disks in kilobytes5589 ramdisk_size= [RAM] Sizes of RAM disks in kilobytes
5461 See Documentation/admin-guide/blockdev/ramdisk.rst.5590 See Documentation/admin-guide/blockdev/ramdisk.rst.
5462 5591
5463 ramdisk_start= [RAM] RAM disk image start address5592 ramdisk_start= [Deprecated,RAM] RAM disk image start address
5464 5593
5465 random.trust_cpu=off5594 random.trust_cpu=off
5466 [KNL,EARLY] Disable trusting the use of the CPU's5595 [KNL,EARLY] Disable trusting the use of the CPU's
@@ -6249,13 +6378,6 @@ Kernel parameters · 782 unmodified lines
6249 dynamically) adjusted. This parameter is intended6378 dynamically) adjusted. This parameter is intended
6250 for use in testing.6379 for use in testing.
6251 6380
6252 rcupdate.rcu_task_ipi_delay= [KNL]
6253 Set time in jiffies during which RCU tasks will
6254 avoid sending IPIs, starting with the beginning
6255 of a given grace period. Setting a large
6256 number avoids disturbing real-time workloads,
6257 but lengthens grace periods.
6258
6259 rcupdate.rcu_task_lazy_lim= [KNL]6381 rcupdate.rcu_task_lazy_lim= [KNL]
6260 Number of callbacks on a given CPU that will6382 Number of callbacks on a given CPU that will
6261 cancel laziness on that CPU. Use -1 to disable6383 cancel laziness on that CPU. Use -1 to disable
@@ -6299,14 +6421,6 @@ Kernel parameters · 37 unmodified lines
6299 of zero will disable batching. Batching is6421 of zero will disable batching. Batching is
6300 always disabled for synchronize_rcu_tasks().6422 always disabled for synchronize_rcu_tasks().
6301 6423
6302 rcupdate.rcu_tasks_trace_lazy_ms= [KNL]
6303 Set timeout in milliseconds RCU Tasks
6304 Trace asynchronous callback batching for
6305 call_rcu_tasks_trace(). A negative value
6306 will take the default. A value of zero will
6307 disable batching. Batching is always disabled
6308 for synchronize_rcu_tasks_trace().
6309
6310 rcupdate.rcu_self_test= [KNL]6424 rcupdate.rcu_self_test= [KNL]
6311 Run the RCU early boot self tests6425 Run the RCU early boot self tests
6312 6426
@@ -6325,9 +6439,14 @@ Kernel parameters · 12 unmodified lines
6325 rdt= [HW,X86,RDT]6439 rdt= [HW,X86,RDT]
6326 Turn on/off individual RDT features. List is:6440 Turn on/off individual RDT features. List is:
6327 cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp,6441 cmt, mbmtotal, mbmlocal, l3cat, l3cdp, l2cat, l2cdp,
6328 mba, smba, bmec, abmc, sdciae.6442 mba, smba, bmec, abmc, sdciae, energy[:guid],
6443 perf[:guid].
6329 E.g. to turn on cmt and turn off mba use:6444 E.g. to turn on cmt and turn off mba use:
6330 rdt=cmt,!mba6445 rdt=cmt,!mba
6446 To turn off all energy telemetry monitoring and ensure that
6447 perf telemetry monitoring associated with guid 0x12345
6448 is enabled use:
6449 rdt=!energy,perf:0x12345
6331 6450
6332 reboot= [KNL]6451 reboot= [KNL]
6333 Format (x86 or x86_64):6452 Format (x86 or x86_64):
@@ -6571,6 +6690,14 @@ Kernel parameters · 237 unmodified lines
6571 replacement properties are not found. See the Kconfig6690 replacement properties are not found. See the Kconfig
6572 entry for RISCV_ISA_FALLBACK.6691 entry for RISCV_ISA_FALLBACK.
6573 6692
6693 riscv_nousercfi=
6694 all Disable user CFI ABI to userspace even if cpu extension
6695 are available.
6696 bcfi Disable user backward CFI ABI to userspace even if
6697 the shadow stack extension is available.
6698 fcfi Disable user forward CFI ABI to userspace even if the
6699 landing pad extension is available.
6700
6574 ro [KNL] Mount root device read-only on boot6701 ro [KNL] Mount root device read-only on boot
6575 6702
6576 rodata= [KNL,EARLY]6703 rodata= [KNL,EARLY]
@@ -6600,6 +6727,11 @@ Kernel parameters · 23 unmodified lines
6600 6727
6601 rootflags= [KNL] Set root filesystem mount option string6728 rootflags= [KNL] Set root filesystem mount option string
6602 6729
6730 rseq_slice_ext= [KNL] RSEQ based time slice extension
6731 Format: boolean
6732 Control enablement of RSEQ based time slice extension.
6733 Default is 'on'.
6734
6603 initramfs_options= [KNL]6735 initramfs_options= [KNL]
6604 Specify mount options for for the initramfs mount.6736 Specify mount options for for the initramfs mount.
6605 6737
@@ -6934,12 +7066,12 @@ Kernel parameters · 328 unmodified lines
6934 7066
6935 softlockup_panic=7067 softlockup_panic=
6936 [KNL] Should the soft-lockup detector generate panics.7068 [KNL] Should the soft-lockup detector generate panics.
6937 Format: 0 | 17069 Format: <int>
6938 7070
6939 A value of 1 instructs the soft-lockup detector7071 A value of non-zero instructs the soft-lockup detector
6940 to panic the machine when a soft-lockup occurs. It is7072 to panic the machine when a soft-lockup duration exceeds
6941 also controlled by the kernel.softlockup_panic sysctl7073 N thresholds. It is also controlled by the kernel.softlockup_panic
6942 and CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC, which is the7074 sysctl and CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC, which is the
6943 respective build-time switch to that functionality.7075 respective build-time switch to that functionality.
6944 7076
6945 softlockup_all_cpu_backtrace=7077 softlockup_all_cpu_backtrace=
@@ -7755,6 +7887,7 @@ Kernel parameters · 809 unmodified lines
7755 - "tee"7887 - "tee"
7756 - "caam"7888 - "caam"
7757 - "dcp"7889 - "dcp"
7890 - "pkwm"
7758 If not specified then it defaults to iterating through7891 If not specified then it defaults to iterating through
7759 the trust source list starting with TPM and assigns the7892 the trust source list starting with TPM and assigns the
7760 first trust source as a backend which is initialized7893 first trust source as a backend which is initialized
@@ -8336,7 +8469,16 @@ Kernel parameters · 575 unmodified lines
8336 CONFIG_WQ_WATCHDOG. It sets the number times of the8469 CONFIG_WQ_WATCHDOG. It sets the number times of the
8337 stall to trigger panic.8470 stall to trigger panic.
8338 8471
8339 The default is 0, which disables the panic on stall.8472 The default is set by CONFIG_BOOTPARAM_WQ_STALL_PANIC,
8473 which is 0 (disabled) if not configured.
8474
8475 workqueue.panic_on_stall_time=<uint>
8476 Panic when a workqueue stall has been continuous for
8477 the specified number of seconds. Unlike panic_on_stall
8478 which counts accumulated stall events, this triggers
8479 based on the duration of a single continuous stall.
8480
8481 The default is 0, which disables the time-based panic.
8340 8482
8341 workqueue.cpu_intensive_thresh_us=8483 workqueue.cpu_intensive_thresh_us=
8342 Per-cpu work items which run for longer than this8484 Per-cpu work items which run for longer than this
@@ -8414,6 +8556,11 @@ Kernel parameters · 71 unmodified lines
8414 save/restore/migration must be enabled to handle larger8556 save/restore/migration must be enabled to handle larger
8415 domains.8557 domains.
8416 8558
8559 xen_console_io [XEN,EARLY]
8560 Boolean option to enable/disable the usage of the Xen
8561 console_io hypercalls to read and write to the console.
8562 Mostly useful for debugging and development.
8563
8417 xen_emul_unplug= [HW,X86,XEN,EARLY]8564 xen_emul_unplug= [HW,X86,XEN,EARLY]
8418 Unplug Xen emulated devices8565 Unplug Xen emulated devices
8419 Format: [unplug0,][unplug1]8566 Format: [unplug0,][unplug1]
Documentation/admin-guide/laptops/alienware-wmi.rst+1−1
@@ -105,7 +105,7 @@ information. · 104 unmodified lines
105 105
106Manual fan control on the other hand, is not exposed directly by the AWCC106Manual fan control on the other hand, is not exposed directly by the AWCC
107interface. Instead it let's us control a fan `boost` value. This `boost` value107interface. Instead it let's us control a fan `boost` value. This `boost` value
108has the following aproximate behavior over the fan pwm:108has the following approximate behavior over the fan pwm:
109 109
110::110::
111 111
Documentation/admin-guide/laptops/index.rst+0−1
@@ -10,7 +10,6 @@ Laptop Drivers · 9 unmodified lines
10 alienware-wmi10 alienware-wmi
11 asus-laptop11 asus-laptop
12 disk-shock-protection12 disk-shock-protection
13 laptop-mode
14 lg-laptop13 lg-laptop
15 samsung-galaxybook14 samsung-galaxybook
16 sony-laptop15 sony-laptop
Documentation/admin-guide/laptops/laptop-mode.rst+0−770
@@ -1,770 +0,0 @@
1===============================================
2How to conserve battery power using laptop-mode
3===============================================
4
5Document Author: Bart Samwel (bart@samwel.tk)
6
7Date created: January 2, 2004
8
9Last modified: December 06, 2004
10
11Introduction
12------------
13
14Laptop mode is used to minimize the time that the hard disk needs to be spun up,
15to conserve battery power on laptops. It has been reported to cause significant
16power savings.
17
18.. Contents
19
20 * Introduction
21 * Installation
22 * Caveats
23 * The Details
24 * Tips & Tricks
25 * Control script
26 * ACPI integration
27 * Monitoring tool
28
29
30Installation
31------------
32
33To use laptop mode, you don't need to set any kernel configuration options
34or anything. Simply install all the files included in this document, and
35laptop mode will automatically be started when you're on battery. For
36your convenience, a tarball containing an installer can be downloaded at:
37
38 http://www.samwel.tk/laptop_mode/laptop_mode/
39
40To configure laptop mode, you need to edit the configuration file, which is
41located in /etc/default/laptop-mode on Debian-based systems, or in
42/etc/sysconfig/laptop-mode on other systems.
43
44Unfortunately, automatic enabling of laptop mode does not work for
45laptops that don't have ACPI. On those laptops, you need to start laptop
46mode manually. To start laptop mode, run "laptop_mode start", and to
47stop it, run "laptop_mode stop". (Note: The laptop mode tools package now
48has experimental support for APM, you might want to try that first.)
49
50
51Caveats
52-------
53
54* The downside of laptop mode is that you have a chance of losing up to 10
55 minutes of work. If you cannot afford this, don't use it! The supplied ACPI
56 scripts automatically turn off laptop mode when the battery almost runs out,
57 so that you won't lose any data at the end of your battery life.
58
59* Most desktop hard drives have a very limited lifetime measured in spindown
60 cycles, typically about 50.000 times (it's usually listed on the spec sheet).
61 Check your drive's rating, and don't wear down your drive's lifetime if you
62 don't need to.
63
64* If you mount some of your ext3 filesystems with the -n option, then
65 the control script will not be able to remount them correctly. You must set
66 DO_REMOUNTS=0 in the control script, otherwise it will remount them with the
67 wrong options -- or it will fail because it cannot write to /etc/mtab.
68
69* If you have your filesystems listed as type "auto" in fstab, like I did, then
70 the control script will not recognize them as filesystems that need remounting.
71 You must list the filesystems with their true type instead.
72
73* It has been reported that some versions of the mutt mail client use file access
74 times to determine whether a folder contains new mail. If you use mutt and
75 experience this, you must disable the noatime remounting by setting the option
76 DO_REMOUNT_NOATIME to 0 in the configuration file.
77
78
79The Details
80-----------
81
82Laptop mode is controlled by the knob /proc/sys/vm/laptop_mode. This knob is
83present for all kernels that have the laptop mode patch, regardless of any
84configuration options. When the knob is set, any physical disk I/O (that might
85have caused the hard disk to spin up) causes Linux to flush all dirty blocks. The
86result of this is that after a disk has spun down, it will not be spun up
87anymore to write dirty blocks, because those blocks had already been written
88immediately after the most recent read operation. The value of the laptop_mode
89knob determines the time between the occurrence of disk I/O and when the flush
90is triggered. A sensible value for the knob is 5 seconds. Setting the knob to
910 disables laptop mode.
92
93To increase the effectiveness of the laptop_mode strategy, the laptop_mode
94control script increases dirty_expire_centisecs and dirty_writeback_centisecs in
95/proc/sys/vm to about 10 minutes (by default), which means that pages that are
96dirtied are not forced to be written to disk as often. The control script also
97changes the dirty background ratio, so that background writeback of dirty pages
98is not done anymore. Combined with a higher commit value (also 10 minutes) for
99ext3 filesystem (also done automatically by the control script),
100this results in concentration of disk activity in a small time interval which
101occurs only once every 10 minutes, or whenever the disk is forced to spin up by
102a cache miss. The disk can then be spun down in the periods of inactivity.
103
104
105Configuration
106-------------
107
108The laptop mode configuration file is located in /etc/default/laptop-mode on
109Debian-based systems, or in /etc/sysconfig/laptop-mode on other systems. It
110contains the following options:
111
112MAX_AGE:
113
114Maximum time, in seconds, of hard drive spindown time that you are
115comfortable with. Worst case, it's possible that you could lose this
116amount of work if your battery fails while you're in laptop mode.
117
118MINIMUM_BATTERY_MINUTES:
119
120Automatically disable laptop mode if the remaining number of minutes of
121battery power is less than this value. Default is 10 minutes.
122
123AC_HD/BATT_HD:
124
125The idle timeout that should be set on your hard drive when laptop mode
126is active (BATT_HD) and when it is not active (AC_HD). The defaults are
12720 seconds (value 4) for BATT_HD and 2 hours (value 244) for AC_HD. The
128possible values are those listed in the manual page for "hdparm" for the
129"-S" option.
130
131HD:
132
133The devices for which the spindown timeout should be adjusted by laptop mode.
134Default is /dev/hda. If you specify multiple devices, separate them by a space.
135
136READAHEAD:
137
138Disk readahead, in 512-byte sectors, while laptop mode is active. A large
139readahead can prevent disk accesses for things like executable pages (which are
140loaded on demand while the application executes) and sequentially accessed data
141(MP3s).
142
143DO_REMOUNTS:
144
145The control script automatically remounts any mounted journaled filesystems
146with appropriate commit interval options. When this option is set to 0, this
147feature is disabled.
148
149DO_REMOUNT_NOATIME:
150
151When remounting, should the filesystems be remounted with the noatime option?
152Normally, this is set to "1" (enabled), but there may be programs that require
153access time recording.
154
155DIRTY_RATIO:
156
157The percentage of memory that is allowed to contain "dirty" or unsaved data
158before a writeback is forced, while laptop mode is active. Corresponds to
159the /proc/sys/vm/dirty_ratio sysctl.
160
161DIRTY_BACKGROUND_RATIO:
162
163The percentage of memory that is allowed to contain "dirty" or unsaved data
164after a forced writeback is done due to an exceeding of DIRTY_RATIO. Set
165this nice and low. This corresponds to the /proc/sys/vm/dirty_background_ratio
166sysctl.
167
168Note that the behaviour of dirty_background_ratio is quite different
169when laptop mode is active and when it isn't. When laptop mode is inactive,
170dirty_background_ratio is the threshold percentage at which background writeouts
171start taking place. When laptop mode is active, however, background writeouts
172are disabled, and the dirty_background_ratio only determines how much writeback
173is done when dirty_ratio is reached.
174
175DO_CPU:
176
177Enable CPU frequency scaling when in laptop mode. (Requires CPUFreq to be setup.
178See Documentation/admin-guide/pm/cpufreq.rst for more info. Disabled by default.)
179
180CPU_MAXFREQ:
181
182When on battery, what is the maximum CPU speed that the system should use? Legal
183values are "slowest" for the slowest speed that your CPU is able to operate at,
184or a value listed in /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies.
185
186
187Tips & Tricks
188-------------
189
190* Bartek Kania reports getting up to 50 minutes of extra battery life (on top
191 of his regular 3 to 3.5 hours) using a spindown time of 5 seconds (BATT_HD=1).
192
193* You can spin down the disk while playing MP3, by setting disk readahead
194 to 8MB (READAHEAD=16384). Effectively, the disk will read a complete MP3 at
195 once, and will then spin down while the MP3 is playing. (Thanks to Bartek
196 Kania.)
197
198* Drew Scott Daniels observed: "I don't know why, but when I decrease the number
199 of colours that my display uses it consumes less battery power. I've seen
200 this on powerbooks too. I hope that this is a piece of information that
201 might be useful to the Laptop Mode patch or its users."
202
203* In syslog.conf, you can prefix entries with a dash `-` to omit syncing the
204 file after every logging. When you're using laptop-mode and your disk doesn't
205 spin down, this is a likely culprit.
206
207* Richard Atterer observed that laptop mode does not work well with noflushd
208 (http://noflushd.sourceforge.net/), it seems that noflushd prevents laptop-mode
209 from doing its thing.
210
211* If you're worried about your data, you might want to consider using a USB
212 memory stick or something like that as a "working area". (Be aware though
213 that flash memory can only handle a limited number of writes, and overuse
214 may wear out your memory stick pretty quickly. Do _not_ use journalling
215 filesystems on flash memory sticks.)
216
217
218Configuration file for control and ACPI battery scripts
219-------------------------------------------------------
220
221This allows the tunables to be changed for the scripts via an external
222configuration file
223
224It should be installed as /etc/default/laptop-mode on Debian, and as
225/etc/sysconfig/laptop-mode on Red Hat, SUSE, Mandrake, and other work-alikes.
226
227Config file::
228
229 # Maximum time, in seconds, of hard drive spindown time that you are
230 # comfortable with. Worst case, it's possible that you could lose this
231 # amount of work if your battery fails you while in laptop mode.
232 #MAX_AGE=600
233
234 # Automatically disable laptop mode when the number of minutes of battery
235 # that you have left goes below this threshold.
236 MINIMUM_BATTERY_MINUTES=10
237
238 # Read-ahead, in 512-byte sectors. You can spin down the disk while playing MP3/OGG
239 # by setting the disk readahead to 8MB (READAHEAD=16384). Effectively, the disk
240 # will read a complete MP3 at once, and will then spin down while the MP3/OGG is
241 # playing.
242 #READAHEAD=4096
243
244 # Shall we remount journaled fs. with appropriate commit interval? (1=yes)
245 #DO_REMOUNTS=1
246
247 # And shall we add the "noatime" option to that as well? (1=yes)
248 #DO_REMOUNT_NOATIME=1
249
250 # Dirty synchronous ratio. At this percentage of dirty pages the process
251 # which
252 # calls write() does its own writeback
253 #DIRTY_RATIO=40
254
255 #
256 # Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been
257 # exceeded, the kernel will wake flusher threads which will then reduce the
258 # amount of dirty memory to dirty_background_ratio. Set this nice and low,
259 # so once some writeout has commenced, we do a lot of it.
260 #
261 #DIRTY_BACKGROUND_RATIO=5
262
263 # kernel default dirty buffer age
264 #DEF_AGE=30
265 #DEF_UPDATE=5
266 #DEF_DIRTY_BACKGROUND_RATIO=10
267 #DEF_DIRTY_RATIO=40
268 #DEF_XFS_AGE_BUFFER=15
269 #DEF_XFS_SYNC_INTERVAL=30
270 #DEF_XFS_BUFD_INTERVAL=1
271
272 # This must be adjusted manually to the value of HZ in the running kernel
273 # on 2.4, until the XFS people change their 2.4 external interfaces to work in
274 # centisecs. This can be automated, but it's a work in progress that still
275 # needs# some fixes. On 2.6 kernels, XFS uses USER_HZ instead of HZ for
276 # external interfaces, and that is currently always set to 100. So you don't
277 # need to change this on 2.6.
278 #XFS_HZ=100
279
280 # Should the maximum CPU frequency be adjusted down while on battery?
281 # Requires CPUFreq to be setup.
282 # See Documentation/admin-guide/pm/cpufreq.rst for more info
283 #DO_CPU=0
284
285 # When on battery what is the maximum CPU speed that the system should
286 # use? Legal values are "slowest" for the slowest speed that your
287 # CPU is able to operate at, or a value listed in:
288 # /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies
289 # Only applicable if DO_CPU=1.
290 #CPU_MAXFREQ=slowest
291
292 # Idle timeout for your hard drive (man hdparm for valid values, -S option)
293 # Default is 2 hours on AC (AC_HD=244) and 20 seconds for battery (BATT_HD=4).
294 #AC_HD=244
295 #BATT_HD=4
296
297 # The drives for which to adjust the idle timeout. Separate them by a space,
298 # e.g. HD="/dev/hda /dev/hdb".
299 #HD="/dev/hda"
300
301 # Set the spindown timeout on a hard drive?
302 #DO_HD=1
303
304
305Control script
306--------------
307
308Please note that this control script works for the Linux 2.4 and 2.6 series (thanks
309to Kiko Piris).
310
311Control script::
312
313 #!/bin/bash
314
315 # start or stop laptop_mode, best run by a power management daemon when
316 # ac gets connected/disconnected from a laptop
317 #
318 # install as /sbin/laptop_mode
319 #
320 # Contributors to this script: Kiko Piris
321 # Bart Samwel
322 # Micha Feigin
323 # Andrew Morton
324 # Herve Eychenne
325 # Dax Kelson
326 #
327 # Original Linux 2.4 version by: Jens Axboe
328
329 #############################################################################
330
331 # Source config
332 if [ -f /etc/default/laptop-mode ] ; then
333 # Debian
334 . /etc/default/laptop-mode
335 elif [ -f /etc/sysconfig/laptop-mode ] ; then
336 # Others
337 . /etc/sysconfig/laptop-mode
338 fi
339
340 # Don't raise an error if the config file is incomplete
341 # set defaults instead:
342
343 # Maximum time, in seconds, of hard drive spindown time that you are
344 # comfortable with. Worst case, it's possible that you could lose this
345 # amount of work if your battery fails you while in laptop mode.
346 MAX_AGE=${MAX_AGE:-'600'}
347
348 # Read-ahead, in kilobytes
349 READAHEAD=${READAHEAD:-'4096'}
350
351 # Shall we remount journaled fs. with appropriate commit interval? (1=yes)
352 DO_REMOUNTS=${DO_REMOUNTS:-'1'}
353
354 # And shall we add the "noatime" option to that as well? (1=yes)
355 DO_REMOUNT_NOATIME=${DO_REMOUNT_NOATIME:-'1'}
356
357 # Shall we adjust the idle timeout on a hard drive?
358 DO_HD=${DO_HD:-'1'}
359
360 # Adjust idle timeout on which hard drive?
361 HD="${HD:-'/dev/hda'}"
362
363 # spindown time for HD (hdparm -S values)
364 AC_HD=${AC_HD:-'244'}
365 BATT_HD=${BATT_HD:-'4'}
366
367 # Dirty synchronous ratio. At this percentage of dirty pages the process which
368 # calls write() does its own writeback
369 DIRTY_RATIO=${DIRTY_RATIO:-'40'}
370
371 # cpu frequency scaling
372 # See Documentation/admin-guide/pm/cpufreq.rst for more info
373 DO_CPU=${CPU_MANAGE:-'0'}
374 CPU_MAXFREQ=${CPU_MAXFREQ:-'slowest'}
375
376 #
377 # Allowed dirty background ratio, in percent. Once DIRTY_RATIO has been
378 # exceeded, the kernel will wake flusher threads which will then reduce the
379 # amount of dirty memory to dirty_background_ratio. Set this nice and low,
380 # so once some writeout has commenced, we do a lot of it.
381 #
382 DIRTY_BACKGROUND_RATIO=${DIRTY_BACKGROUND_RATIO:-'5'}
383
384 # kernel default dirty buffer age
385 DEF_AGE=${DEF_AGE:-'30'}
386 DEF_UPDATE=${DEF_UPDATE:-'5'}
387 DEF_DIRTY_BACKGROUND_RATIO=${DEF_DIRTY_BACKGROUND_RATIO:-'10'}
388 DEF_DIRTY_RATIO=${DEF_DIRTY_RATIO:-'40'}
389 DEF_XFS_AGE_BUFFER=${DEF_XFS_AGE_BUFFER:-'15'}
390 DEF_XFS_SYNC_INTERVAL=${DEF_XFS_SYNC_INTERVAL:-'30'}
391 DEF_XFS_BUFD_INTERVAL=${DEF_XFS_BUFD_INTERVAL:-'1'}
392
393 # This must be adjusted manually to the value of HZ in the running kernel
394 # on 2.4, until the XFS people change their 2.4 external interfaces to work in
395 # centisecs. This can be automated, but it's a work in progress that still needs
396 # some fixes. On 2.6 kernels, XFS uses USER_HZ instead of HZ for external
397 # interfaces, and that is currently always set to 100. So you don't need to
398 # change this on 2.6.
399 XFS_HZ=${XFS_HZ:-'100'}
400
401 #############################################################################
402
403 KLEVEL="$(uname -r |
404 {
405 IFS='.' read a b c
406 echo $a.$b
407 }
408 )"
409 case "$KLEVEL" in
410 "2.4"|"2.6")
411 ;;
412 *)
413 echo "Unhandled kernel version: $KLEVEL ('uname -r' = '$(uname -r)')" >&2
414 exit 1
415 ;;
416 esac
417
418 if [ ! -e /proc/sys/vm/laptop_mode ] ; then
419 echo "Kernel is not patched with laptop_mode patch." >&2
420 exit 1
421 fi
422
423 if [ ! -w /proc/sys/vm/laptop_mode ] ; then
424 echo "You do not have enough privileges to enable laptop_mode." >&2
425 exit 1
426 fi
427
428 # Remove an option (the first parameter) of the form option=<number> from
429 # a mount options string (the rest of the parameters).
430 parse_mount_opts () {
431 OPT="$1"
432 shift
433 echo ",$*," | sed \
434 -e 's/,'"$OPT"'=[0-9]*,/,/g' \
435 -e 's/,,*/,/g' \
436 -e 's/^,//' \
437 -e 's/,$//'
438 }
439
440 # Remove an option (the first parameter) without any arguments from
441 # a mount option string (the rest of the parameters).
442 parse_nonumber_mount_opts () {
443 OPT="$1"
444 shift
445 echo ",$*," | sed \
446 -e 's/,'"$OPT"',/,/g' \
447 -e 's/,,*/,/g' \
448 -e 's/^,//' \
449 -e 's/,$//'
450 }
451
452 # Find out the state of a yes/no option (e.g. "atime"/"noatime") in
453 # fstab for a given filesystem, and use this state to replace the
454 # value of the option in another mount options string. The device
455 # is the first argument, the option name the second, and the default
456 # value the third. The remainder is the mount options string.
457 #
458 # Example:
459 # parse_yesno_opts_wfstab /dev/hda1 atime atime defaults,noatime
460 #
461 # If fstab contains, say, "rw" for this filesystem, then the result
462 # will be "defaults,atime".
463 parse_yesno_opts_wfstab () {
464 L_DEV="$1"
465 OPT="$2"
466 DEF_OPT="$3"
467 shift 3
468 L_OPTS="$*"
469 PARSEDOPTS1="$(parse_nonumber_mount_opts $OPT $L_OPTS)"
470 PARSEDOPTS1="$(parse_nonumber_mount_opts no$OPT $PARSEDOPTS1)"
471 # Watch for a default atime in fstab
472 FSTAB_OPTS="$(awk '$1 == "'$L_DEV'" { print $4 }' /etc/fstab)"
473 if echo "$FSTAB_OPTS" | grep "$OPT" > /dev/null ; then
474 # option specified in fstab: extract the value and use it
475 if echo "$FSTAB_OPTS" | grep "no$OPT" > /dev/null ; then
476 echo "$PARSEDOPTS1,no$OPT"
477 else
478 # no$OPT not found -- so we must have $OPT.
479 echo "$PARSEDOPTS1,$OPT"
480 fi
481 else
482 # option not specified in fstab -- choose the default.
483 echo "$PARSEDOPTS1,$DEF_OPT"
484 fi
485 }
486
487 # Find out the state of a numbered option (e.g. "commit=NNN") in
488 # fstab for a given filesystem, and use this state to replace the
489 # value of the option in another mount options string. The device
490 # is the first argument, and the option name the second. The
491 # remainder is the mount options string in which the replacement
492 # must be done.
493 #
494 # Example:
495 # parse_mount_opts_wfstab /dev/hda1 commit defaults,commit=7
496 #
497 # If fstab contains, say, "commit=3,rw" for this filesystem, then the
498 # result will be "rw,commit=3".
499 parse_mount_opts_wfstab () {
500 L_DEV="$1"
501 OPT="$2"
502 shift 2
503 L_OPTS="$*"
504 PARSEDOPTS1="$(parse_mount_opts $OPT $L_OPTS)"
505 # Watch for a default commit in fstab
506 FSTAB_OPTS="$(awk '$1 == "'$L_DEV'" { print $4 }' /etc/fstab)"
507 if echo "$FSTAB_OPTS" | grep "$OPT=" > /dev/null ; then
508 # option specified in fstab: extract the value, and use it
509 echo -n "$PARSEDOPTS1,$OPT="
510 echo ",$FSTAB_OPTS," | sed \
511 -e 's/.*,'"$OPT"'=//' \
512 -e 's/,.*//'
513 else
514 # option not specified in fstab: set it to 0
515 echo "$PARSEDOPTS1,$OPT=0"
516 fi
517 }
518
519 deduce_fstype () {
520 MP="$1"
521 # My root filesystem unfortunately has
522 # type "unknown" in /etc/mtab. If we encounter
523 # "unknown", we try to get the type from fstab.
524 cat /etc/fstab |
525 grep -v '^#' |
526 while read FSTAB_DEV FSTAB_MP FSTAB_FST FSTAB_OPTS FSTAB_DUMP FSTAB_DUMP ; do
527 if [ "$FSTAB_MP" = "$MP" ]; then
528 echo $FSTAB_FST
529 exit 0
530 fi
531 done
532 }
533
534 if [ $DO_REMOUNT_NOATIME -eq 1 ] ; then
535 NOATIME_OPT=",noatime"
536 fi
537
538 case "$1" in
539 start)
540 AGE=$((100*$MAX_AGE))
541 XFS_AGE=$(($XFS_HZ*$MAX_AGE))
542 echo -n "Starting laptop_mode"
543
544 if [ -d /proc/sys/vm/pagebuf ] ; then
545 # (For 2.4 and early 2.6.)
546 # This only needs to be set, not reset -- it is only used when
547 # laptop mode is enabled.
548 echo $XFS_AGE > /proc/sys/vm/pagebuf/lm_flush_age
549 echo $XFS_AGE > /proc/sys/fs/xfs/lm_sync_interval
550 elif [ -f /proc/sys/fs/xfs/lm_age_buffer ] ; then
551 # (A couple of early 2.6 laptop mode patches had these.)
552 # The same goes for these.
553 echo $XFS_AGE > /proc/sys/fs/xfs/lm_age_buffer
554 echo $XFS_AGE > /proc/sys/fs/xfs/lm_sync_interval
555 elif [ -f /proc/sys/fs/xfs/age_buffer ] ; then
556 # (2.6.6)
557 # But not for these -- they are also used in normal
558 # operation.
559 echo $XFS_AGE > /proc/sys/fs/xfs/age_buffer
560 echo $XFS_AGE > /proc/sys/fs/xfs/sync_interval
561 elif [ -f /proc/sys/fs/xfs/age_buffer_centisecs ] ; then
562 # (2.6.7 upwards)
563 # And not for these either. These are in centisecs,
564 # not USER_HZ, so we have to use $AGE, not $XFS_AGE.
565 echo $AGE > /proc/sys/fs/xfs/age_buffer_centisecs
566 echo $AGE > /proc/sys/fs/xfs/xfssyncd_centisecs
567 echo 3000 > /proc/sys/fs/xfs/xfsbufd_centisecs
568 fi
569
570 case "$KLEVEL" in
571 "2.4")
572 echo 1 > /proc/sys/vm/laptop_mode
573 echo "30 500 0 0 $AGE $AGE 60 20 0" > /proc/sys/vm/bdflush
574 ;;
575 "2.6")
576 echo 5 > /proc/sys/vm/laptop_mode
577 echo "$AGE" > /proc/sys/vm/dirty_writeback_centisecs
578 echo "$AGE" > /proc/sys/vm/dirty_expire_centisecs
579 echo "$DIRTY_RATIO" > /proc/sys/vm/dirty_ratio
580 echo "$DIRTY_BACKGROUND_RATIO" > /proc/sys/vm/dirty_background_ratio
581 ;;
582 esac
583 if [ $DO_REMOUNTS -eq 1 ]; then
584 cat /etc/mtab | while read DEV MP FST OPTS DUMP PASS ; do
585 PARSEDOPTS="$(parse_mount_opts "$OPTS")"
586 if [ "$FST" = 'unknown' ]; then
587 FST=$(deduce_fstype $MP)
588 fi
589 case "$FST" in
590 "ext3")
591 PARSEDOPTS="$(parse_mount_opts commit "$OPTS")"
592 mount $DEV -t $FST $MP -o remount,$PARSEDOPTS,commit=$MAX_AGE$NOATIME_OPT
593 ;;
594 "xfs")
595 mount $DEV -t $FST $MP -o remount,$OPTS$NOATIME_OPT
596 ;;
597 esac
598 if [ -b $DEV ] ; then
599 blockdev --setra $(($READAHEAD * 2)) $DEV
600 fi
601 done
602 fi
603 if [ $DO_HD -eq 1 ] ; then
604 for THISHD in $HD ; do
605 /sbin/hdparm -S $BATT_HD $THISHD > /dev/null 2>&1
606 /sbin/hdparm -B 1 $THISHD > /dev/null 2>&1
607 done
608 fi
609 if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then
610 if [ $CPU_MAXFREQ = 'slowest' ]; then
611 CPU_MAXFREQ=`cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq`
612 fi
613 echo $CPU_MAXFREQ > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
614 fi
615 echo "."
616 ;;
617 stop)
618 U_AGE=$((100*$DEF_UPDATE))
619 B_AGE=$((100*$DEF_AGE))
620 echo -n "Stopping laptop_mode"
621 echo 0 > /proc/sys/vm/laptop_mode
622 if [ -f /proc/sys/fs/xfs/age_buffer -a ! -f /proc/sys/fs/xfs/lm_age_buffer ] ; then
623 # These need to be restored, if there are no lm_*.
624 echo $(($XFS_HZ*$DEF_XFS_AGE_BUFFER)) > /proc/sys/fs/xfs/age_buffer
625 echo $(($XFS_HZ*$DEF_XFS_SYNC_INTERVAL)) > /proc/sys/fs/xfs/sync_interval
626 elif [ -f /proc/sys/fs/xfs/age_buffer_centisecs ] ; then
627 # These need to be restored as well.
628 echo $((100*$DEF_XFS_AGE_BUFFER)) > /proc/sys/fs/xfs/age_buffer_centisecs
629 echo $((100*$DEF_XFS_SYNC_INTERVAL)) > /proc/sys/fs/xfs/xfssyncd_centisecs
630 echo $((100*$DEF_XFS_BUFD_INTERVAL)) > /proc/sys/fs/xfs/xfsbufd_centisecs
631 fi
632 case "$KLEVEL" in
633 "2.4")
634 echo "30 500 0 0 $U_AGE $B_AGE 60 20 0" > /proc/sys/vm/bdflush
635 ;;
636 "2.6")
637 echo "$U_AGE" > /proc/sys/vm/dirty_writeback_centisecs
638 echo "$B_AGE" > /proc/sys/vm/dirty_expire_centisecs
639 echo "$DEF_DIRTY_RATIO" > /proc/sys/vm/dirty_ratio
640 echo "$DEF_DIRTY_BACKGROUND_RATIO" > /proc/sys/vm/dirty_background_ratio
641 ;;
642 esac
643 if [ $DO_REMOUNTS -eq 1 ] ; then
644 cat /etc/mtab | while read DEV MP FST OPTS DUMP PASS ; do
645 # Reset commit and atime options to defaults.
646 if [ "$FST" = 'unknown' ]; then
647 FST=$(deduce_fstype $MP)
648 fi
649 case "$FST" in
650 "ext3")
651 PARSEDOPTS="$(parse_mount_opts_wfstab $DEV commit $OPTS)"
652 PARSEDOPTS="$(parse_yesno_opts_wfstab $DEV atime atime $PARSEDOPTS)"
653 mount $DEV -t $FST $MP -o remount,$PARSEDOPTS
654 ;;
655 "xfs")
656 PARSEDOPTS="$(parse_yesno_opts_wfstab $DEV atime atime $OPTS)"
657 mount $DEV -t $FST $MP -o remount,$PARSEDOPTS
658 ;;
659 esac
660 if [ -b $DEV ] ; then
661 blockdev --setra 256 $DEV
662 fi
663 done
664 fi
665 if [ $DO_HD -eq 1 ] ; then
666 for THISHD in $HD ; do
667 /sbin/hdparm -S $AC_HD $THISHD > /dev/null 2>&1
668 /sbin/hdparm -B 255 $THISHD > /dev/null 2>&1
669 done
670 fi
671 if [ $DO_CPU -eq 1 -a -e /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_min_freq ]; then
672 echo `cat /sys/devices/system/cpu/cpu0/cpufreq/cpuinfo_max_freq` > /sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq
673 fi
674 echo "."
675 ;;
676 *)
677 echo "Usage: $0 {start|stop}" 2>&1
678 exit 1
679 ;;
680
681 esac
682
683 exit 0
684
685
686ACPI integration
687----------------
688
689Dax Kelson submitted this so that the ACPI acpid daemon will
690kick off the laptop_mode script and run hdparm. The part that
691automatically disables laptop mode when the battery is low was
692written by Jan Topinski.
693
694/etc/acpi/events/ac_adapter::
695
696 event=ac_adapter
697 action=/etc/acpi/actions/ac.sh %e
698
699/etc/acpi/events/battery::
700
701 event=battery.*
702 action=/etc/acpi/actions/battery.sh %e
703
704/etc/acpi/actions/ac.sh::
705
706 #!/bin/bash
707
708 # ac on/offline event handler
709
710 status=`awk '/^state: / { print $2 }' /proc/acpi/ac_adapter/$2/state`
711
712 case $status in
713 "on-line")
714 /sbin/laptop_mode stop
715 exit 0
716 ;;
717 "off-line")
718 /sbin/laptop_mode start
719 exit 0
720 ;;
721 esac
722
723
724/etc/acpi/actions/battery.sh::
725
726 #! /bin/bash
727
728 # Automatically disable laptop mode when the battery almost runs out.
729
730 BATT_INFO=/proc/acpi/battery/$2/state
731
732 if [[ -f /proc/sys/vm/laptop_mode ]]
733 then
734 LM=`cat /proc/sys/vm/laptop_mode`
735 if [[ $LM -gt 0 ]]
736 then
737 if [[ -f $BATT_INFO ]]
738 then
739 # Source the config file only now that we know we need
740 if [ -f /etc/default/laptop-mode ] ; then
741 # Debian
742 . /etc/default/laptop-mode
743 elif [ -f /etc/sysconfig/laptop-mode ] ; then
744 # Others
745 . /etc/sysconfig/laptop-mode
746 fi
747 MINIMUM_BATTERY_MINUTES=${MINIMUM_BATTERY_MINUTES:-'10'}
748
749 ACTION="`cat $BATT_INFO | grep charging | cut -c 26-`"
750 if [[ ACTION -eq "discharging" ]]
751 then
752 PRESENT_RATE=`cat $BATT_INFO | grep "present rate:" | sed "s/.* \([0-9][0-9]* \).*/\1/" `
753 REMAINING=`cat $BATT_INFO | grep "remaining capacity:" | sed "s/.* \([0-9][0-9]* \).*/\1/" `
754 fi
755 if (($REMAINING * 60 / $PRESENT_RATE < $MINIMUM_BATTERY_MINUTES))
756 then
757 /sbin/laptop_mode stop
758 fi
759 else
760 logger -p daemon.warning "You are using laptop mode and your battery interface $BATT_INFO is missing. This may lead to loss of data when the battery runs out. Check kernel ACPI support and /proc/acpi/battery folder, and edit /etc/acpi/battery.sh to set BATT_INFO to the correct path."
761 fi
762 fi
763 fi
764
765
766Monitoring tool
767---------------
768
769Bartek Kania submitted this, it can be used to measure how much time your disk
770spends spun up/down. See tools/laptop/dslm/dslm.c
Documentation/admin-guide/laptops/thinkpad-acpi.rst+37−0
@@ -54,6 +54,7 @@ detailed description): · 53 unmodified lines
54 - Setting keyboard language54 - Setting keyboard language
55 - WWAN Antenna type55 - WWAN Antenna type
56 - Auxmac56 - Auxmac
57 - Hardware damage detection capability
57 58
58A compatibility table by model and feature is maintained on the web59A compatibility table by model and feature is maintained on the web
59site, http://ibm-acpi.sf.net/. I appreciate any success or failure60site, http://ibm-acpi.sf.net/. I appreciate any success or failure
@@ -1576,6 +1577,42 @@ percentage level, above which charging will stop. · 1516 unmodified lines
1576The exact semantics of the attributes may be found in1577The exact semantics of the attributes may be found in
1577Documentation/ABI/testing/sysfs-class-power.1578Documentation/ABI/testing/sysfs-class-power.
1578 1579
1580Hardware damage detection capability
1581------------------------------------
1582
1583sysfs attributes: hwdd_status, hwdd_detail
1584
1585Thinkpads are adding the ability to detect and report hardware damage.
1586Add new sysfs interface to identify the damaged device status.
1587Initial support is available for the USB-C replaceable connector.
1588
1589The command to check device damaged status is::
1590
1591 cat /sys/devices/platform/thinkpad_acpi/hwdd_status
1592
1593This value displays status of device damaged.
1594
1595- 0 = Not Damaged
1596- 1 = Damaged
1597
1598The command to check location of damaged device is::
1599
1600 cat /sys/devices/platform/thinkpad_acpi/hwdd_detail
1601
1602This value displays location of damaged device having 1 line per damaged "item".
1603For example:
1604
1605if no damage is detected:
1606
1607- No damage detected
1608
1609if damage detected:
1610
1611- TYPE-C: Base, Right side, Center port
1612
1613The property is read-only. If feature is not supported then sysfs
1614attribute is not created.
1615
1579Multiple Commands, Module Parameters1616Multiple Commands, Module Parameters
1580------------------------------------1617------------------------------------
1581 1618
Documentation/admin-guide/laptops/toshiba_haps.rst+1−1
@@ -43,7 +43,7 @@ RSSS Shuts down the HDD protection interface for a few seconds, · 42 unmodified lines
43==== =====================================================================43==== =====================================================================
44 44
45Note:45Note:
46 The presence of Solid State Drives (SSD) can make this driver to fail loading,46 The presence of Solid State Drives (SSD) can cause this driver to fail loading,
47 given the fact that such drives have no movable parts, and thus, not requiring47 given the fact that such drives have no movable parts, and thus, not requiring
48 any "protection" as well as failing during the evaluation of the _STA method48 any "protection" as well as failing during the evaluation of the _STA method
49 found under this device.49 found under this device.
Documentation/admin-guide/media/mgb4.rst+7−4
@@ -31,9 +31,11 @@ Global (PCI card) parameters · 30 unmodified lines
31 31
32 | 0 - No module present32 | 0 - No module present
33 | 1 - FPDL333 | 1 - FPDL3
34 | 2 - GMSL (one serializer, two daisy chained deserializers)34 | 2 - GMSL3 (one serializer, two daisy chained deserializers)
35 | 3 - GMSL (one serializer, two deserializers)35 | 3 - GMSL3 (one serializer, two deserializers)
36 | 4 - GMSL (two deserializers with two daisy chain outputs)36 | 4 - GMSL3 (two deserializers with two daisy chain outputs)
37 | 6 - GMSL1
38 | 8 - GMSL3 coax
37 39
38**module_version** (R):40**module_version** (R):
39 Module version number. Zero in case of a missing module.41 Module version number. Zero in case of a missing module.
@@ -42,7 +44,8 @@ Global (PCI card) parameters · 2 unmodified lines
42 Firmware type.44 Firmware type.
43 45
44 | 1 - FPDL346 | 1 - FPDL3
45 | 2 - GMSL47 | 2 - GMSL3
48 | 3 - GMSL1
46 49
47**fw_version** (R):50**fw_version** (R):
48 Firmware version number.51 Firmware version number.
Documentation/admin-guide/mm/damon/lru_sort.rst+37−0
@@ -79,6 +79,43 @@ of parametrs except ``enabled`` again. Once the re-reading is done, this · 78 unmodified lines
79parameter is set as ``N``. If invalid parameters are found while the79parameter is set as ``N``. If invalid parameters are found while the
80re-reading, DAMON_LRU_SORT will be disabled.80re-reading, DAMON_LRU_SORT will be disabled.
81 81
82active_mem_bp
83-------------
84
85Desired active to [in]active memory ratio in bp (1/10,000).
86
87While keeping the caps that set by other quotas, DAMON_LRU_SORT automatically
88increases and decreases the effective level of the quota aiming the LRU
89[de]prioritizations of the hot and cold memory resulting in this active to
90[in]active memory ratio. Value zero means disabling this auto-tuning feature.
91
92Disabled by default.
93
94Auto-tune monitoring intervals
95------------------------------
96
97If this parameter is set as ``Y``, DAMON_LRU_SORT automatically tunes DAMON's
98sampling and aggregation intervals. The auto-tuning aims to capture meaningful
99amount of access events in each DAMON-snapshot, while keeping the sampling
100interval 5 milliseconds in minimum, and 10 seconds in maximum. Setting this as
101``N`` disables the auto-tuning.
102
103Disabled by default.
104
105filter_young_pages
106------------------
107
108Filter [non-]young pages accordingly for LRU [de]prioritizations.
109
110If this is set, check page level access (youngness) once again before each
111LRU [de]prioritization operation. LRU prioritization operation is skipped
112if the page has not accessed since the last check (not young). LRU
113deprioritization operation is skipped if the page has accessed since the
114last check (young). The feature is enabled or disabled if this parameter is
115set as ``Y`` or ``N``, respectively.
116
117Disabled by default.
118
82hot_thres_access_freq119hot_thres_access_freq
83---------------------120---------------------
84 121
Documentation/admin-guide/mm/damon/usage.rst+14−5
@@ -6,6 +6,11 @@ Detailed Usages · 5 unmodified lines
6 6
7DAMON provides below interfaces for different users.7DAMON provides below interfaces for different users.
8 8
9- *Special-purpose DAMON modules.*
10 :ref:`This <damon_modules_special_purpose>` is for people who are building,
11 distributing, and/or administrating the kernel with special-purpose DAMON
12 usages. Using this, users can use DAMON's major features for the given
13 purposes in build, boot, or runtime in simple ways.
9- *DAMON user space tool.*14- *DAMON user space tool.*
10 `This <https://github.com/damonitor/damo>`_ is for privileged people such as15 `This <https://github.com/damonitor/damo>`_ is for privileged people such as
11 system administrators who want a just-working human-friendly interface.16 system administrators who want a just-working human-friendly interface.
@@ -87,7 +92,7 @@ comma (","). · 75 unmodified lines
87 │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max92 │ │ │ │ │ │ │ │ 0/type,matching,allow,memcg_path,addr_start,addr_end,target_idx,min,max
88 │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests93 │ │ │ │ │ │ │ :ref:`dests <damon_sysfs_dests>`/nr_dests
89 │ │ │ │ │ │ │ │ 0/id,weight94 │ │ │ │ │ │ │ │ 0/id,weight
90 │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds95 │ │ │ │ │ │ │ :ref:`stats <sysfs_schemes_stats>`/nr_tried,sz_tried,nr_applied,sz_applied,sz_ops_filter_passed,qt_exceeds,nr_snapshots,max_nr_snapshots
91 │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes96 │ │ │ │ │ │ │ :ref:`tried_regions <sysfs_schemes_tried_regions>`/total_bytes
92 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed97 │ │ │ │ │ │ │ │ 0/start,end,nr_accesses,age,sz_filter_passed
93 │ │ │ │ │ │ │ │ ...98 │ │ │ │ │ │ │ │ ...
@@ -543,10 +548,14 @@ online analysis or tuning of the schemes. Refer to :ref:`design doc · 449 unmodified lines
543 548
544The statistics can be retrieved by reading the files under ``stats`` directory549The statistics can be retrieved by reading the files under ``stats`` directory
545(``nr_tried``, ``sz_tried``, ``nr_applied``, ``sz_applied``,550(``nr_tried``, ``sz_tried``, ``nr_applied``, ``sz_applied``,
546``sz_ops_filter_passed``, and ``qt_exceeds``), respectively. The files are not551``sz_ops_filter_passed``, ``qt_exceeds``, ``nr_snapshots`` and
547updated in real time, so you should ask DAMON sysfs interface to update the552``max_nr_snapshots``), respectively.
548content of the files for the stats by writing a special keyword,553
549``update_schemes_stats`` to the relevant ``kdamonds/<N>/state`` file.554The files are not updated in real time by default. Users should ask DAMON
555sysfs interface to periodically update those using ``refresh_ms``, or do a one
556time update by writing a special keyword, ``update_schemes_stats`` to the
557relevant ``kdamonds/<N>/state`` file. Refer to :ref:`kdamond directory
558<sysfs_kdamond>` for more details.
550 559
551.. _sysfs_schemes_tried_regions:560.. _sysfs_schemes_tried_regions:
552 561
Documentation/admin-guide/mm/memory-hotplug.rst+16−6
@@ -603,17 +603,18 @@ ZONE_MOVABLE, especially when fine-tuning zone ratios: · 602 unmodified lines
603 memory for metadata and page tables in the direct map; having a lot of offline603 memory for metadata and page tables in the direct map; having a lot of offline
604 memory blocks is not a typical case, though.604 memory blocks is not a typical case, though.
605 605
606- Memory ballooning without balloon compaction is incompatible with606- Memory ballooning without support for balloon memory migration is incompatible
607 ZONE_MOVABLE. Only some implementations, such as virtio-balloon and607 with ZONE_MOVABLE. Only some implementations, such as virtio-balloon and
608 pseries CMM, fully support balloon compaction.608 pseries CMM, fully support balloon memory migration.
609 609
610 Further, the CONFIG_BALLOON_COMPACTION kernel configuration option might be610 Further, the CONFIG_BALLOON_MIGRATION kernel configuration option might be
611 disabled. In that case, balloon inflation will only perform unmovable611 disabled. In that case, balloon inflation will only perform unmovable
612 allocations and silently create a zone imbalance, usually triggered by612 allocations and silently create a zone imbalance, usually triggered by
613 inflation requests from the hypervisor.613 inflation requests from the hypervisor.
614 614
615- Gigantic pages are unmovable, resulting in user space consuming a615- Gigantic pages are unmovable when an architecture does not support
616 lot of unmovable memory.616 huge page migration and/or the ``movable_gigantic_pages`` sysctl is false.
617 See Documentation/admin-guide/sysctl/vm.rst for more info on this sysctl.
617 618
618- Huge pages are unmovable when an architectures does not support huge619- Huge pages are unmovable when an architectures does not support huge
619 page migration, resulting in a similar issue as with gigantic pages.620 page migration, resulting in a similar issue as with gigantic pages.
@@ -672,6 +673,15 @@ block might fail: · 52 unmodified lines
672- Concurrent activity that operates on the same physical memory area, such as673- Concurrent activity that operates on the same physical memory area, such as
673 allocating gigantic pages, can result in temporary offlining failures.674 allocating gigantic pages, can result in temporary offlining failures.
674 675
676- When an admin sets the ``movable_gigantic_pages`` sysctl to true, gigantic
677 pages are allowed in ZONE_MOVABLE. This only allows migratable gigantic
678 pages to be allocated; however, if there are no eligible destination gigantic
679 pages at offline, the offlining operation will fail.
680
681 Users leveraging ``movable_gigantic_pages`` should weigh the value of
682 ZONE_MOVABLE for increasing the reliability of gigantic page allocation
683 against the potential loss of hot-unplug reliability.
684
675- Out of memory when dissolving huge pages, especially when HugeTLB Vmemmap685- Out of memory when dissolving huge pages, especially when HugeTLB Vmemmap
676 Optimization (HVO) is enabled.686 Optimization (HVO) is enabled.
677 687
Documentation/admin-guide/mm/nommu-mmap.rst+1−1
@@ -38,7 +38,7 @@ and it's also much more restricted in the latter case: · 37 unmodified lines
38 38
39 In the no-MMU case:39 In the no-MMU case:
40 40
41 - If one exists, the kernel will re-use an existing mapping to the41 - If one exists, the kernel will reuse an existing mapping to the
42 same segment of the same file if that has compatible permissions,42 same segment of the same file if that has compatible permissions,
43 even if this was created by another process.43 even if this was created by another process.
44 44
Documentation/admin-guide/module-signing.rst+9−7
@@ -28,10 +28,12 @@ trusted userspace bits. · 27 unmodified lines
28 28
29This facility uses X.509 ITU-T standard certificates to encode the public keys29This facility uses X.509 ITU-T standard certificates to encode the public keys
30involved. The signatures are not themselves encoded in any industrial standard30involved. The signatures are not themselves encoded in any industrial standard
31type. The built-in facility currently only supports the RSA & NIST P-384 ECDSA31type. The built-in facility currently only supports the RSA, NIST P-384 ECDSA
32public key signing standard (though it is pluggable and permits others to be32and NIST FIPS-204 ML-DSA public key signing standards (though it is pluggable
33used). The possible hash algorithms that can be used are SHA-2 and SHA-3 of33and permits others to be used). For RSA and ECDSA, the possible hash
34sizes 256, 384, and 512 (the algorithm is selected by data in the signature).34algorithms that can be used are SHA-2 and SHA-3 of sizes 256, 384, and 512 (the
35algorithm is selected by data in the signature); ML-DSA does its own hashing,
36but is allowed to be used with a SHA512 hash for signed attributes.
35 37
36 38
37==========================39==========================
@@ -146,9 +148,9 @@ into vmlinux) using parameters in the:: · 108 unmodified lines
146 148
147file (which is also generated if it does not already exist).149file (which is also generated if it does not already exist).
148 150
149One can select between RSA (``MODULE_SIG_KEY_TYPE_RSA``) and ECDSA151One can select between RSA (``MODULE_SIG_KEY_TYPE_RSA``), ECDSA
150(``MODULE_SIG_KEY_TYPE_ECDSA``) to generate either RSA 4k or NIST152(``MODULE_SIG_KEY_TYPE_ECDSA``) and ML-DSA (``MODULE_SIG_KEY_TYPE_MLDSA_*``) to
151P-384 keypair.153generate an RSA 4k, a NIST P-384 keypair or an ML-DSA 44, 65 or 87 keypair.
152 154
153It is strongly recommended that you provide your own x509.genkey file.155It is strongly recommended that you provide your own x509.genkey file.
154 156
Documentation/admin-guide/pm/cpufreq.rst+1−1
@@ -439,7 +439,7 @@ This governor exposes only one tunable: · 438 unmodified lines
439``rate_limit_us``439``rate_limit_us``
440 Minimum time (in microseconds) that has to pass between two consecutive440 Minimum time (in microseconds) that has to pass between two consecutive
441 runs of governor computations (default: 1.5 times the scaling driver's441 runs of governor computations (default: 1.5 times the scaling driver's
442 transition latency or the maximum 2ms).442 transition latency or 1ms if the driver does not provide a latency value).
443 443
444 The purpose of this tunable is to reduce the scheduler context overhead444 The purpose of this tunable is to reduce the scheduler context overhead
445 of the governor which might be excessive without it.445 of the governor which might be excessive without it.
Documentation/admin-guide/pm/intel_idle.rst+11−0
@@ -260,6 +260,17 @@ mode to off when the CPU is in any one of the available idle states. This may · 259 unmodified lines
260help performance of a sibling CPU at the expense of a slightly higher wakeup260help performance of a sibling CPU at the expense of a slightly higher wakeup
261latency for the idle CPU.261latency for the idle CPU.
262 262
263The ``table`` argument allows customization of idle state latency and target
264residency. The syntax is a comma-separated list of ``name:latency:residency``
265entries, where ``name`` is the idle state name, ``latency`` is the exit latency
266in microseconds, and ``residency`` is the target residency in microseconds. It
267is not necessary to specify all idle states; only those to be customized. For
268example, ``C1:1:3,C6:50:100`` sets the exit latency and target residency for
269C1 and C6 to 1/3 and 50/100 microseconds, respectively. Remaining idle states
270keep their default values. The driver verifies that deeper idle states have
271higher latency and target residency than shallower ones. Also, target
272residency cannot be smaller than exit latency. If any of these conditions is
273not met, the driver ignores the entire ``table`` parameter.
263 274
264.. _intel-idle-core-and-package-idle-states:275.. _intel-idle-core-and-package-idle-states:
265 276
Documentation/admin-guide/sysctl/kernel.rst+3−6
@@ -591,6 +591,9 @@ if leaking kernel pointer values to unprivileged users is a concern. · 590 unmodified lines
591When ``kptr_restrict`` is set to 2, kernel pointers printed using591When ``kptr_restrict`` is set to 2, kernel pointers printed using
592%pK will be replaced with 0s regardless of privileges.592%pK will be replaced with 0s regardless of privileges.
593 593
594For disabling these security restrictions early at boot time (and once
595for all), use the ``hash_pointers`` boot parameter instead.
596
594softlockup_sys_info & hardlockup_sys_info597softlockup_sys_info & hardlockup_sys_info
595=========================================598=========================================
596A comma separated list of extra system information to be dumped when599A comma separated list of extra system information to be dumped when
@@ -1235,12 +1238,6 @@ that support this feature. · 638 unmodified lines
1235== ===========================================================================1238== ===========================================================================
1236 1239
1237 1240
1238real-root-dev
1239=============
1240
1241See Documentation/admin-guide/initrd.rst.
1242
1243
1244reboot-cmd (SPARC only)1241reboot-cmd (SPARC only)
1245=======================1242=======================
1246 1243
Documentation/admin-guide/sysctl/net.rst+65−8
@@ -40,8 +40,8 @@ Table : Subdirectories in /proc/sys/net · 39 unmodified lines
40 bridge Bridging rose X.25 PLP layer40 bridge Bridging rose X.25 PLP layer
41 core General parameter tipc TIPC41 core General parameter tipc TIPC
42 ethernet Ethernet protocol unix Unix domain sockets42 ethernet Ethernet protocol unix Unix domain sockets
43 ipv4 IP version 4 x25 X.25 protocol43 ipv4 IP version 4 vsock VSOCK sockets
44 ipv6 IP version 644 ipv6 IP version 6 x25 X.25 protocol
45 ========= =================== = ========== ===================45 ========= =================== = ========== ===================
46 46
471. /proc/sys/net/core - Network core options471. /proc/sys/net/core - Network core options
@@ -303,24 +303,33 @@ netdev_max_backlog · 255 unmodified lines
303Maximum number of packets, queued on the INPUT side, when the interface303Maximum number of packets, queued on the INPUT side, when the interface
304receives packets faster than kernel can process them.304receives packets faster than kernel can process them.
305 305
306qdisc_max_burst
307------------------
308
309Maximum number of packets that can be temporarily stored before
310reaching qdisc.
311
312Default: 1000
313
306netdev_rss_key314netdev_rss_key
307--------------315--------------
308 316
309RSS (Receive Side Scaling) enabled drivers use a 40 bytes host key that is317RSS (Receive Side Scaling) enabled drivers use a host key that
310randomly generated.318is randomly generated.
311Some user space might need to gather its content even if drivers do not319Some user space might need to gather its content even if drivers do not
312provide ethtool -x support yet.320provide ethtool -x support yet.
313 321
314::322::
315 323
316 myhost:~# cat /proc/sys/net/core/netdev_rss_key324 myhost:~# cat /proc/sys/net/core/netdev_rss_key
317 84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (52 bytes total)325 84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (256 bytes total)
318 326
319File contains nul bytes if no driver ever called netdev_rss_key_fill() function.327File contains all nul bytes if no driver ever called netdev_rss_key_fill()
328function.
320 329
321Note:330Note:
322 /proc/sys/net/core/netdev_rss_key contains 52 bytes of key,331 /proc/sys/net/core/netdev_rss_key contains 256 bytes of key,
323 but most drivers only use 40 bytes of it.332 but many drivers only use 40 or 52 bytes of it.
324 333
325::334::
326 335
@@ -542,3 +551,51 @@ originally may have been issued in the correct sequential order. · 215 unmodified lines
542If named_timeout is nonzero, failed topology updates will be placed on a defer551If named_timeout is nonzero, failed topology updates will be placed on a defer
543queue until another event arrives that clears the error, or until the timeout552queue until another event arrives that clears the error, or until the timeout
544expires. Value is in milliseconds.553expires. Value is in milliseconds.
554
5556. /proc/sys/net/vsock - VSOCK sockets
556--------------------------------------
557
558VSOCK sockets (AF_VSOCK) provide communication between virtual machines and
559their hosts. The behavior of VSOCK sockets in a network namespace is determined
560by the namespace's mode (``global`` or ``local``), which controls how CIDs
561(Context IDs) are allocated and how sockets interact across namespaces.
562
563ns_mode
564-------
565
566Read-only. Reports the current namespace's mode, set at namespace creation
567and immutable thereafter.
568
569Values:
570
571 - ``global`` - the namespace shares system-wide CID allocation and
572 its sockets can reach any VM or socket in any global namespace.
573 Sockets in this namespace cannot reach sockets in local
574 namespaces.
575 - ``local`` - the namespace has private CID allocation and its
576 sockets can only connect to VMs or sockets within the same
577 namespace.
578
579The init_net mode is always ``global``.
580
581child_ns_mode
582-------------
583
584Controls what mode newly created child namespaces will inherit. At namespace
585creation, ``ns_mode`` is inherited from the parent's ``child_ns_mode``. The
586initial value matches the namespace's own ``ns_mode``.
587
588Values:
589
590 - ``global`` - child namespaces will share system-wide CID allocation
591 and their sockets will be able to reach any VM or socket in any
592 global namespace.
593 - ``local`` - child namespaces will have private CID allocation and
594 their sockets will only be able to connect within their own
595 namespace.
596
597Changing ``child_ns_mode`` only affects namespaces created after the change;
598it does not modify the current namespace or any existing children.
599
600A namespace with ``ns_mode`` set to ``local`` cannot change
601``child_ns_mode`` to ``global`` (returns ``-EPERM``).
Documentation/admin-guide/sysctl/vm.rst+34−8
@@ -41,7 +41,6 @@ Currently, these files are in /proc/sys/vm: · 40 unmodified lines
41- extfrag_threshold41- extfrag_threshold
42- highmem_is_dirtyable42- highmem_is_dirtyable
43- hugetlb_shm_group43- hugetlb_shm_group
44- laptop_mode
45- legacy_va_layout44- legacy_va_layout
46- lowmem_reserve_ratio45- lowmem_reserve_ratio
47- max_map_count46- max_map_count
@@ -54,6 +53,7 @@ Currently, these files are in /proc/sys/vm: · 6 unmodified lines
54- mmap_min_addr53- mmap_min_addr
55- mmap_rnd_bits54- mmap_rnd_bits
56- mmap_rnd_compat_bits55- mmap_rnd_compat_bits
56- movable_gigantic_pages
57- nr_hugepages57- nr_hugepages
58- nr_hugepages_mempolicy58- nr_hugepages_mempolicy
59- nr_overcommit_hugepages59- nr_overcommit_hugepages
@@ -231,6 +231,8 @@ eventually gets pushed out to disk. This tunable is used to define when dirty · 171 unmodified lines
231inode is old enough to be eligible for writeback by the kernel flusher threads.231inode is old enough to be eligible for writeback by the kernel flusher threads.
232And, it is also used as the interval to wakeup dirtytime_writeback thread.232And, it is also used as the interval to wakeup dirtytime_writeback thread.
233 233
234Setting this to zero disables periodic dirtytime writeback.
235
234 236
235dirty_writeback_centisecs237dirty_writeback_centisecs
236=========================238=========================
@@ -363,13 +365,6 @@ hugetlb_shm_group contains group id that is allowed to create SysV · 126 unmodified lines
363shared memory segment using hugetlb page.365shared memory segment using hugetlb page.
364 366
365 367
366laptop_mode
367===========
368
369laptop_mode is a knob that controls "laptop mode". All the things that are
370controlled by this knob are discussed in Documentation/admin-guide/laptops/laptop-mode.rst.
371
372
373legacy_va_layout368legacy_va_layout
374================369================
375 370
@@ -494,6 +489,10 @@ memory allocations. · 118 unmodified lines
494 489
495The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.490The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.
496 491
492When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid
493warnings produced by allocations made while profiling is disabled and freed
494when it's enabled.
495
497 496
498memory_failure_early_kill497memory_failure_early_kill
499=========================498=========================
@@ -624,6 +623,33 @@ This value can be changed after boot using the · 124 unmodified lines
624/proc/sys/vm/mmap_rnd_compat_bits tunable623/proc/sys/vm/mmap_rnd_compat_bits tunable
625 624
626 625
626movable_gigantic_pages
627======================
628
629This parameter controls whether gigantic pages may be allocated from
630ZONE_MOVABLE. If set to non-zero, gigantic pages can be allocated
631from ZONE_MOVABLE. ZONE_MOVABLE memory may be created via the kernel
632boot parameter `kernelcore` or via memory hotplug as discussed in
633Documentation/admin-guide/mm/memory-hotplug.rst.
634
635Support may depend on specific architecture.
636
637Note that using ZONE_MOVABLE gigantic pages make memory hotremove unreliable.
638
639Memory hot-remove operations will block indefinitely until the admin reserves
640sufficient gigantic pages to service migration requests associated with the
641memory offlining process. As HugeTLB gigantic page reservation is a manual
642process (via `nodeN/hugepages/.../nr_hugepages` interfaces) this may not be
643obvious when just attempting to offline a block of memory.
644
645Additionally, as multiple gigantic pages may be reserved on a single block,
646it may appear that gigantic pages are available for migration when in reality
647they are in the process of being removed. For example if `memoryN` contains
648two gigantic pages, one reserved and one allocated, and an admin attempts to
649offline that block, this operations may hang indefinitely unless another
650reserved gigantic page is available on another block `memoryM`.
651
652
627nr_hugepages653nr_hugepages
628============654============
629 655
Documentation/admin-guide/thunderbolt.rst+1−1
@@ -370,7 +370,7 @@ is built-in to the kernel image, there is no need to do anything. · 369 unmodified lines
370 370
371The driver will create one virtual ethernet interface per Thunderbolt371The driver will create one virtual ethernet interface per Thunderbolt
372port which are named like ``thunderbolt0`` and so on. From this point372port which are named like ``thunderbolt0`` and so on. From this point
373you can either use standard userspace tools like ``ifconfig`` to373you can either use standard userspace tools like ``ip`` to
374configure the interface or let your GUI handle it automatically.374configure the interface or let your GUI handle it automatically.
375 375
376Forcing power376Forcing power
Documentation/admin-guide/xfs.rst+8−0
@@ -215,6 +215,14 @@ When mounting an XFS filesystem, the following options are accepted. · 214 unmodified lines
215 inconsistent namespace presentation during or after a215 inconsistent namespace presentation during or after a
216 failover event.216 failover event.
217 217
218 errortag=tagname
219 When specified, enables the error inject tag named "tagname" with the
220 default frequency. Can be specified multiple times to enable multiple
221 errortags. Specifying this option on remount will reset the error tag
222 to the default value if it was set to any other value before.
223 This option is only supported when CONFIG_XFS_DEBUG is enabled, and
224 will not be reflected in /proc/self/mounts.
225
218Deprecation of V4 Format226Deprecation of V4 Format
219========================227========================
220 228
Documentation/arch/arc/index.rst+0−7
@@ -8,10 +8,3 @@ ARC architecture · 7 unmodified lines
8 arc8 arc
9 9
10 features10 features
11
12.. only:: subproject and html
13
14 Indices
15 =======
16
17 * :ref:`genindex`
Documentation/arch/arm/index.rst+0−8
@@ -75,11 +75,3 @@ SoC-specific documents · 74 unmodified lines
75 sti/overview75 sti/overview
76 76
77 vfp/release-notes77 vfp/release-notes
78
79
80.. only:: subproject and html
81
82 Indices
83 =======
84
85 * :ref:`genindex`
Documentation/arch/arm/keystone/knav-qmss.rst+1−1
@@ -39,7 +39,7 @@ CPPI/QMSS Low Level Driver document (docs/CPPI_QMSS_LLD_SDS.pdf) at · 38 unmodified lines
39 39
40 git://git.ti.com/keystone-rtos/qmss-lld.git40 git://git.ti.com/keystone-rtos/qmss-lld.git
41 41
42k2_qmss_pdsp_acc48_k2_le_1_0_0_9.bin firmware supports upto 48 accumulator42k2_qmss_pdsp_acc48_k2_le_1_0_0_9.bin firmware supports up to 48 accumulator
43channels. This firmware is available under ti-keystone folder of43channels. This firmware is available under ti-keystone folder of
44firmware.git at44firmware.git at
45 45
Documentation/arch/arm/keystone/overview.rst+1−1
@@ -65,7 +65,7 @@ specified through DTS. Following are the DTS used: · 64 unmodified lines
65 65
66The device tree documentation for the keystone machines are located at66The device tree documentation for the keystone machines are located at
67 67
68 Documentation/devicetree/bindings/arm/keystone/keystone.txt68 Documentation/devicetree/bindings/arm/ti/ti,keystone.yaml
69 69
70Document Author70Document Author
71---------------71---------------
Documentation/arch/arm64/arm-acpi.rst+2−2
@@ -306,9 +306,9 @@ that looks like this: Name(KEY0, "value0"). An ACPI device driver would · 305 unmodified lines
306then retrieve the value of the property by evaluating the KEY0 object.306then retrieve the value of the property by evaluating the KEY0 object.
307However, using Name() this way has multiple problems: (1) ACPI limits307However, using Name() this way has multiple problems: (1) ACPI limits
308names ("KEY0") to four characters unlike DT; (2) there is no industry308names ("KEY0") to four characters unlike DT; (2) there is no industry
309wide registry that maintains a list of names, minimizing re-use; (3)309wide registry that maintains a list of names, minimizing reuse; (3)
310there is also no registry for the definition of property values ("value0"),310there is also no registry for the definition of property values ("value0"),
311again making re-use difficult; and (4) how does one maintain backward311again making reuse difficult; and (4) how does one maintain backward
312compatibility as new hardware comes out? The _DSD method was created312compatibility as new hardware comes out? The _DSD method was created
313to solve precisely these sorts of problems; Linux drivers should ALWAYS313to solve precisely these sorts of problems; Linux drivers should ALWAYS
314use the _DSD method for device properties and nothing else.314use the _DSD method for device properties and nothing else.
Documentation/arch/arm64/asymmetric-32bit.rst+8−4
@@ -154,10 +154,14 @@ mode will return to host userspace with an ``exit_reason`` of · 153 unmodified lines
154``KVM_EXIT_FAIL_ENTRY`` and will remain non-runnable until successfully154``KVM_EXIT_FAIL_ENTRY`` and will remain non-runnable until successfully
155re-initialised by a subsequent ``KVM_ARM_VCPU_INIT`` operation.155re-initialised by a subsequent ``KVM_ARM_VCPU_INIT`` operation.
156 156
157NOHZ FULL157SCHEDULER DOMAIN ISOLATION
158---------158--------------------------
159 159
160To avoid perturbing an adaptive-ticks CPU (specified using160To avoid perturbing a boot-defined domain isolated CPU (specified using
161``nohz_full=``) when a 32-bit task is forcefully migrated, these CPUs161``isolcpus=[domain]``) when a 32-bit task is forcefully migrated, these CPUs
162are treated as 64-bit-only when support for asymmetric 32-bit systems162are treated as 64-bit-only when support for asymmetric 32-bit systems
163is enabled.163is enabled.
164
165However as opposed to boot-defined domain isolation, runtime-defined domain
166isolation using cpuset isolated partition is not advised on asymmetric
16732-bit systems and will result in undefined behaviour.
Documentation/arch/arm64/booting.rst+12−0
@@ -556,6 +556,18 @@ Before jumping into the kernel, the following conditions must be met: · 555 unmodified lines
556 556
557 - MDCR_EL3.TPM (bit 6) must be initialized to 0b0557 - MDCR_EL3.TPM (bit 6) must be initialized to 0b0
558 558
559 For CPUs with support for 64-byte loads and stores without status (FEAT_LS64):
560
561 - If the kernel is entered at EL1 and EL2 is present:
562
563 - HCRX_EL2.EnALS (bit 1) must be initialised to 0b1.
564
565 For CPUs with support for 64-byte stores with status (FEAT_LS64_V):
566
567 - If the kernel is entered at EL1 and EL2 is present:
568
569 - HCRX_EL2.EnASR (bit 2) must be initialised to 0b1.
570
559The requirements described above for CPU mode, caches, MMUs, architected571The requirements described above for CPU mode, caches, MMUs, architected
560timers, coherency and system registers apply to all CPUs. All CPUs must572timers, coherency and system registers apply to all CPUs. All CPUs must
561enter the kernel in the same exception level. Where the values documented573enter the kernel in the same exception level. Where the values documented
Documentation/arch/arm64/elf_hwcaps.rst+7−0
@@ -444,6 +444,13 @@ HWCAP3_MTE_STORE_ONLY · 443 unmodified lines
444HWCAP3_LSFE444HWCAP3_LSFE
445 Functionality implied by ID_AA64ISAR3_EL1.LSFE == 0b0001445 Functionality implied by ID_AA64ISAR3_EL1.LSFE == 0b0001
446 446
447HWCAP3_LS64
448 Functionality implied by ID_AA64ISAR1_EL1.LS64 == 0b0001. Note that
449 the function of instruction ld64b/st64b requires support by CPU, system
450 and target (device) memory location and HWCAP3_LS64 implies the support
451 of CPU. User should only use ld64b/st64b on supported target (device)
452 memory location, otherwise fallback to the non-atomic alternatives.
453
447 454
4484. Unused AT_HWCAP bits4554. Unused AT_HWCAP bits
449-----------------------456-----------------------
Documentation/arch/arm64/index.rst+0−7
@@ -33,10 +33,3 @@ ARM64 Architecture · 32 unmodified lines
33 tagged-pointers33 tagged-pointers
34 34
35 features35 features
36
37.. only:: subproject and html
38
39 Indices
40 =======
41
42 * :ref:`genindex`
Documentation/arch/arm64/silicon-errata.rst+1−0
@@ -212,6 +212,7 @@ stable kernels. · 211 unmodified lines
212+----------------+-----------------+-----------------+-----------------------------+212+----------------+-----------------+-----------------+-----------------------------+
213| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |213| ARM | GIC-700 | #2941627 | ARM64_ERRATUM_2941627 |
214+----------------+-----------------+-----------------+-----------------------------+214+----------------+-----------------+-----------------+-----------------------------+
215| ARM | SI L1 | #4311569 | ARM64_ERRATUM_4311569 |
215+----------------+-----------------+-----------------+-----------------------------+216+----------------+-----------------+-----------------+-----------------------------+
216| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |217| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
217+----------------+-----------------+-----------------+-----------------------------+218+----------------+-----------------+-----------------+-----------------------------+
Documentation/arch/loongarch/index.rst+0−7
@@ -13,10 +13,3 @@ LoongArch Architecture · 12 unmodified lines
13 irq-chip-model13 irq-chip-model
14 14
15 features15 features
16
17.. only:: subproject and html
18
19 Indices
20 =======
21
22 * :ref:`genindex`
Documentation/arch/m68k/index.rst+0−7
@@ -11,10 +11,3 @@ m68k Architecture · 10 unmodified lines
11 buddha-driver11 buddha-driver
12 12
13 features13 features
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/arch/mips/index.rst+0−7
@@ -12,10 +12,3 @@ MIPS-specific Documentation · 11 unmodified lines
12 ingenic-tcu12 ingenic-tcu
13 13
14 features14 features
15
16.. only:: subproject and html
17
18 Indices
19 =======
20
21 * :ref:`genindex`
Documentation/arch/openrisc/index.rst+0−7
@@ -11,10 +11,3 @@ OpenRISC Architecture · 10 unmodified lines
11 todo11 todo
12 12
13 features13 features
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/arch/parisc/index.rst+0−7
@@ -11,10 +11,3 @@ PA-RISC Architecture · 10 unmodified lines
11 registers11 registers
12 12
13 features13 features
14
15.. only:: subproject and html
16
17 Indices
18 =======
19
20 * :ref:`genindex`
Documentation/arch/powerpc/index.rst+0−7
@@ -40,10 +40,3 @@ powerpc · 39 unmodified lines
40 vpa-dtl40 vpa-dtl
41 41
42 features42 features
43
44.. only:: subproject and html
45
46 Indices
47 =======
48
49 * :ref:`genindex`
Documentation/arch/powerpc/papr_hcalls.rst+43−0
@@ -300,6 +300,49 @@ H_HTM supports setup, configuration, control and dumping of Hardware Trace · 299 unmodified lines
300Macro (HTM) function and its data. HTM buffer stores tracing data for functions300Macro (HTM) function and its data. HTM buffer stores tracing data for functions
301like core instruction, core LLAT and nest.301like core instruction, core LLAT and nest.
302 302
303**H_PKS_GEN_KEY**
304
305| Input: authorization, objectlabel, objectlabellen, policy, out, outlen
306| Out: *Hypervisor Generated Key, or None when the wrapping key policy is set*
307| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2,
308 H_P3, H_P4, H_P5, H_P6, H_Authority, H_Nomem, H_Busy, H_Resource,
309 H_Aborted*
310
311H_PKS_GEN_KEY is used to have the hypervisor generate a new random key.
312This key is stored as an object in the Power LPAR Platform KeyStore with
313the provided object label. With the wrapping key policy set the key is only
314visible to the hypervisor, while the key's label would still be visible to
315the user. Generation of wrapping keys is supported only for a key size of
31632 bytes.
317
318**H_PKS_WRAP_OBJECT**
319
320| Input: authorization, wrapkeylabel, wrapkeylabellen, objectwrapflags, in,
321| inlen, out, outlen, continue-token
322| Out: *continue-token, byte size of wrapped object, wrapped object*
323| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2,
324 H_P3, H_P4, H_P5, H_P6, H_P7, H_P8, H_P9, H_Authority, H_Invalid_Key,
325 H_NOT_FOUND, H_Busy, H_LongBusy, H_Aborted*
326
327H_PKS_WRAP_OBJECT is used to wrap an object using a wrapping key stored in the
328Power LPAR Platform KeyStore and return the wrapped object to the caller. The
329caller provides a label to a wrapping key with the 'wrapping key' policy set,
330which must have been previously created with H_PKS_GEN_KEY. The provided object
331is then encrypted with the wrapping key and additional metadata and the result
332is returned to the caller.
333
334
335**H_PKS_UNWRAP_OBJECT**
336
337| Input: authorization, objectwrapflags, in, inlen, out, outlen, continue-token
338| Out: *continue-token, byte size of unwrapped object, unwrapped object*
339| Return Value: *H_SUCCESS, H_Function, H_State, H_R_State, H_Parameter, H_P2,
340 H_P3, H_P4, H_P5, H_P6, H_P7, H_Authority, H_Unsupported, H_Bad_Data,
341 H_NOT_FOUND, H_Invalid_Key, H_Busy, H_LongBusy, H_Aborted*
342
343H_PKS_UNWRAP_OBJECT is used to unwrap an object that was previously warapped with
344H_PKS_WRAP_OBJECT.
345
303References346References
304==========347==========
305.. [1] "Power Architecture Platform Reference"348.. [1] "Power Architecture Platform Reference"
Documentation/arch/riscv/hwprobe.rst+5−1
@@ -67,7 +67,7 @@ The following keys are defined: · 66 unmodified lines
67 programs (it may still be executed in userspace via a67 programs (it may still be executed in userspace via a
68 kernel-controlled mechanism such as the vDSO).68 kernel-controlled mechanism such as the vDSO).
69 69
70* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing the extensions70* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_0`: A bitmask containing extensions
71 that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`:71 that are compatible with the :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`:
72 base system behavior.72 base system behavior.
73 73
@@ -387,3 +387,7 @@ The following keys are defined: · 313 unmodified lines
387 387
388* :c:macro:`RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE`: An unsigned int which388* :c:macro:`RISCV_HWPROBE_KEY_ZICBOP_BLOCK_SIZE`: An unsigned int which
389 represents the size of the Zicbop block in bytes.389 represents the size of the Zicbop block in bytes.
390
391* :c:macro:`RISCV_HWPROBE_KEY_IMA_EXT_1`: A bitmask containing additional
392 extensions that are compatible with the
393 :c:macro:`RISCV_HWPROBE_BASE_BEHAVIOR_IMA`: base system behavior.
Documentation/arch/riscv/index.rst+2−7
@@ -14,12 +14,7 @@ RISC-V architecture · 13 unmodified lines
14 uabi14 uabi
15 vector15 vector
16 cmodx16 cmodx
17 zicfilp
18 zicfiss
17 19
18 features20 features
19
20.. only:: subproject and html
21
22 Indices
23 =======
24
25 * :ref:`genindex`
Documentation/arch/riscv/uabi.rst+3−1
@@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo · 6 unmodified lines
7------------------------------------7------------------------------------
8 8
9The canonical order of ISA extension names in the ISA string is defined in9The canonical order of ISA extension names in the ISA string is defined in
10chapter 27 of the unprivileged specification.10Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
11(Document Version 20191213).
12
11The specification uses vague wording, such as should, when it comes to ordering,13The specification uses vague wording, such as should, when it comes to ordering,
12so for our purposes the following rules apply:14so for our purposes the following rules apply:
13 15
Documentation/arch/riscv/zicfilp.rst+122−0
@@ -0,0 +1,122 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3:Author: Deepak Gupta <debug@rivosinc.com>
4:Date: 12 January 2024
5
6====================================================
7Tracking indirect control transfers on RISC-V Linux
8====================================================
9
10This document briefly describes the interface provided to userspace by Linux
11to enable indirect branch tracking for user mode applications on RISC-V.
12
131. Feature Overview
14--------------------
15
16Memory corruption issues usually result in crashes. However, in the
17hands of a creative adversary, these can result in a variety of
18security issues.
19
20Some of those security issues can be code re-use attacks, where an
21adversary can use corrupt function pointers, chaining them together to
22perform jump oriented programming (JOP) or call oriented programming
23(COP) and thus compromise control flow integrity (CFI) of the program.
24
25Function pointers live in read-write memory and thus are susceptible
26to corruption. This can allow an adversary to control the program
27counter (PC) value. On RISC-V, the zicfilp extension enforces a
28restriction on such indirect control transfers:
29
30- Indirect control transfers must land on a landing pad instruction ``lpad``.
31 There are two exceptions to this rule:
32
33 - rs1 = x1 or rs1 = x5, i.e. a return from a function and returns are
34 protected using shadow stack (see zicfiss.rst)
35
36 - rs1 = x7. On RISC-V, the compiler usually does the following to reach a
37 function which is beyond the offset of possible J-type instruction::
38
39 auipc x7, <imm>
40 jalr (x7)
41
42 This form of indirect control transfer is immutable and doesn't
43 rely on memory. Thus rs1=x7 is exempted from tracking and
44 these are considered software guarded jumps.
45
46The ``lpad`` instruction is a pseudo-op of ``auipc rd, <imm_20bit>``
47with ``rd=x0``. This is a HINT op. The ``lpad`` instruction must be
48aligned on a 4 byte boundary. It compares the 20 bit immediate with
49x7. If ``imm_20bit`` == 0, the CPU doesn't perform any comparison with
50``x7``. If ``imm_20bit`` != 0, then ``imm_20bit`` must match ``x7``
51else CPU will raise ``software check exception`` (``cause=18``) with
52``*tval = 2``.
53
54The compiler can generate a hash over function signatures and set them
55up (truncated to 20 bits) in x7 at callsites. Function prologues can
56have ``lpad`` instructions encoded with the same function hash. This
57further reduces the number of valid program counter addresses a call
58site can reach.
59
602. ELF and psABI
61-----------------
62
63The toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_FCFI` for
64property :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in the notes
65section of the object file.
66
673. Linux enabling
68------------------
69
70User space programs can have multiple shared objects loaded in their
71address spaces. It's a difficult task to make sure all the
72dependencies have been compiled with indirect branch support. Thus
73it's left to the dynamic loader to enable indirect branch tracking for
74the program.
75
764. prctl() enabling
77--------------------
78
79:c:macro:`PR_SET_INDIR_BR_LP_STATUS` / :c:macro:`PR_GET_INDIR_BR_LP_STATUS` /
80:c:macro:`PR_LOCK_INDIR_BR_LP_STATUS` are three prctls added to manage indirect
81branch tracking. These prctls are architecture-agnostic and return -EINVAL if
82the underlying functionality is not supported.
83
84* prctl(PR_SET_INDIR_BR_LP_STATUS, unsigned long arg)
85
86If arg1 is :c:macro:`PR_INDIR_BR_LP_ENABLE` and if CPU supports
87``zicfilp`` then the kernel will enable indirect branch tracking for the
88task. The dynamic loader can issue this :c:macro:`prctl` once it has
89determined that all the objects loaded in the address space support
90indirect branch tracking. Additionally, if there is a `dlopen` to an
91object which wasn't compiled with ``zicfilp``, the dynamic loader can
92issue this prctl with arg1 set to 0 (i.e. :c:macro:`PR_INDIR_BR_LP_ENABLE`
93cleared).
94
95* prctl(PR_GET_INDIR_BR_LP_STATUS, unsigned long * arg)
96
97Returns the current status of indirect branch tracking. If enabled
98it'll return :c:macro:`PR_INDIR_BR_LP_ENABLE`
99
100* prctl(PR_LOCK_INDIR_BR_LP_STATUS, unsigned long arg)
101
102Locks the current status of indirect branch tracking on the task. User
103space may want to run with a strict security posture and wouldn't want
104loading of objects without ``zicfilp`` support in them, to disallow
105disabling of indirect branch tracking. In this case, user space can
106use this prctl to lock the current settings.
107
1085. violations related to indirect branch tracking
109--------------------------------------------------
110
111Pertaining to indirect branch tracking, the CPU raises a software
112check exception in the following conditions:
113
114- missing ``lpad`` after indirect call / jmp
115- ``lpad`` not on 4 byte boundary
116- ``imm_20bit`` embedded in ``lpad`` instruction doesn't match with ``x7``
117
118In all 3 cases, ``*tval = 2`` is captured and software check exception is
119raised (``cause=18``).
120
121The kernel will treat this as :c:macro:`SIGSEGV` with code =
122:c:macro:`SEGV_CPERR` and follow the normal course of signal delivery.
Documentation/arch/riscv/zicfiss.rst+194−0
@@ -0,0 +1,194 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3:Author: Deepak Gupta <debug@rivosinc.com>
4:Date: 12 January 2024
5
6=========================================================
7Shadow stack to protect function returns on RISC-V Linux
8=========================================================
9
10This document briefly describes the interface provided to userspace by Linux
11to enable shadow stacks for user mode applications on RISC-V.
12
131. Feature Overview
14--------------------
15
16Memory corruption issues usually result in crashes. However, in the
17hands of a creative adversary, these issues can result in a variety of
18security problems.
19
20Some of those security issues can be code re-use attacks on programs
21where an adversary can use corrupt return addresses present on the
22stack. chaining them together to perform return oriented programming
23(ROP) and thus compromising the control flow integrity (CFI) of the
24program.
25
26Return addresses live on the stack in read-write memory. Therefore
27they are susceptible to corruption, which allows an adversary to
28control the program counter. On RISC-V, the ``zicfiss`` extension
29provides an alternate stack (the "shadow stack") on which return
30addresses can be safely placed in the prologue of the function and
31retrieved in the epilogue. The ``zicfiss`` extension makes the
32following changes:
33
34- PTE encodings for shadow stack virtual memory
35 An earlier reserved encoding in first stage translation i.e.
36 PTE.R=0, PTE.W=1, PTE.X=0 becomes the PTE encoding for shadow stack pages.
37
38- The ``sspush x1/x5`` instruction pushes (stores) ``x1/x5`` to shadow stack.
39
40- The ``sspopchk x1/x5`` instruction pops (loads) from shadow stack and compares
41 with ``x1/x5`` and if not equal, the CPU raises a ``software check exception``
42 with ``*tval = 3``
43
44The compiler toolchain ensures that function prologues have ``sspush
45x1/x5`` to save the return address on shadow stack in addition to the
46regular stack. Similarly, function epilogues have ``ld x5,
47offset(x2)`` followed by ``sspopchk x5`` to ensure that a popped value
48from the regular stack matches with the popped value from the shadow
49stack.
50
512. Shadow stack protections and linux memory manager
52-----------------------------------------------------
53
54As mentioned earlier, shadow stacks get new page table encodings that
55have some special properties assigned to them, along with instructions
56that operate on the shadow stacks:
57
58- Regular stores to shadow stack memory raise store access faults. This
59 protects shadow stack memory from stray writes.
60
61- Regular loads from shadow stack memory are allowed. This allows
62 stack trace utilities or backtrace functions to read the true call
63 stack and ensure that it has not been tampered with.
64
65- Only shadow stack instructions can generate shadow stack loads or
66 shadow stack stores.
67
68- Shadow stack loads and stores on read-only memory raise AMO/store
69 page faults. Thus both ``sspush x1/x5`` and ``sspopchk x1/x5`` will
70 raise AMO/store page fault. This simplies COW handling in kernel
71 during fork(). The kernel can convert shadow stack pages into
72 read-only memory (as it does for regular read-write memory). As
73 soon as subsequent ``sspush`` or ``sspopchk`` instructions in
74 userspace are encountered, the kernel can perform COW.
75
76- Shadow stack loads and stores on read-write or read-write-execute
77 memory raise an access fault. This is a fatal condition because
78 shadow stack loads and stores should never be operating on
79 read-write or read-write-execute memory.
80
813. ELF and psABI
82-----------------
83
84The toolchain sets up :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_BCFI` for
85property :c:macro:`GNU_PROPERTY_RISCV_FEATURE_1_AND` in the notes
86section of the object file.
87
884. Linux enabling
89------------------
90
91User space programs can have multiple shared objects loaded in their
92address space. It's a difficult task to make sure all the
93dependencies have been compiled with shadow stack support. Thus
94it's left to the dynamic loader to enable shadow stacks for the
95program.
96
975. prctl() enabling
98--------------------
99
100:c:macro:`PR_SET_SHADOW_STACK_STATUS` / :c:macro:`PR_GET_SHADOW_STACK_STATUS` /
101:c:macro:`PR_LOCK_SHADOW_STACK_STATUS` are three prctls added to manage shadow
102stack enabling for tasks. These prctls are architecture-agnostic and return
103-EINVAL if not implemented.
104
105* prctl(PR_SET_SHADOW_STACK_STATUS, unsigned long arg)
106
107If arg = :c:macro:`PR_SHADOW_STACK_ENABLE` and if CPU supports
108``zicfiss`` then the kernel will enable shadow stacks for the task.
109The dynamic loader can issue this :c:macro:`prctl` once it has
110determined that all the objects loaded in address space have support
111for shadow stacks. Additionally, if there is a :c:macro:`dlopen` to
112an object which wasn't compiled with ``zicfiss``, the dynamic loader
113can issue this prctl with arg set to 0 (i.e.
114:c:macro:`PR_SHADOW_STACK_ENABLE` being clear)
115
116* prctl(PR_GET_SHADOW_STACK_STATUS, unsigned long * arg)
117
118Returns the current status of indirect branch tracking. If enabled
119it'll return :c:macro:`PR_SHADOW_STACK_ENABLE`.
120
121* prctl(PR_LOCK_SHADOW_STACK_STATUS, unsigned long arg)
122
123Locks the current status of shadow stack enabling on the
124task. Userspace may want to run with a strict security posture and
125wouldn't want loading of objects without ``zicfiss`` support. In this
126case userspace can use this prctl to disallow disabling of shadow
127stacks on the current task.
128
1295. violations related to returns with shadow stack enabled
130-----------------------------------------------------------
131
132Pertaining to shadow stacks, the CPU raises a ``software check
133exception`` upon executing ``sspopchk x1/x5`` if ``x1/x5`` doesn't
134match the top of shadow stack. If a mismatch happens, then the CPU
135sets ``*tval = 3`` and raises the exception.
136
137The Linux kernel will treat this as a :c:macro:`SIGSEGV` with code =
138:c:macro:`SEGV_CPERR` and follow the normal course of signal delivery.
139
1406. Shadow stack tokens
141-----------------------
142
143Regular stores on shadow stacks are not allowed and thus can't be
144tampered with via arbitrary stray writes. However, one method of
145pivoting / switching to a shadow stack is simply writing to the CSR
146``CSR_SSP``. This will change the active shadow stack for the
147program. Writes to ``CSR_SSP`` in the program should be mostly
148limited to context switches, stack unwinds, or longjmp or similar
149mechanisms (like context switching of Green Threads) in languages like
150Go and Rust. CSR_SSP writes can be problematic because an attacker can
151use memory corruption bugs and leverage context switching routines to
152pivot to any shadow stack. Shadow stack tokens can help mitigate this
153problem by making sure that:
154
155- When software is switching away from a shadow stack, the shadow
156 stack pointer should be saved on the shadow stack itself (this is
157 called the ``shadow stack token``).
158
159- When software is switching to a shadow stack, it should read the
160 ``shadow stack token`` from the shadow stack pointer and verify that
161 the ``shadow stack token`` itself is a pointer to the shadow stack
162 itself.
163
164- Once the token verification is done, software can perform the write
165 to ``CSR_SSP`` to switch shadow stacks.
166
167Here "software" could refer to the user mode task runtime itself,
168managing various contexts as part of a single thread. Or "software"
169could refer to the kernel, when the kernel has to deliver a signal to
170a user task and must save the shadow stack pointer. The kernel can
171perform similar procedure itself by saving a token on the user mode
172task's shadow stack. This way, whenever :c:macro:`sigreturn` happens,
173the kernel can read and verify the token and then switch to the shadow
174stack. Using this mechanism, the kernel helps the user task so that
175any corruption issue in the user task is not exploited by adversaries
176arbitrarily using :c:macro:`sigreturn`. Adversaries will have to make
177sure that there is a valid ``shadow stack token`` in addition to
178invoking :c:macro:`sigreturn`.
179
1807. Signal shadow stack
181-----------------------
182The following structure has been added to sigcontext for RISC-V::
183
184 struct __sc_riscv_cfi_state {
185 unsigned long ss_ptr;
186 };
187
188As part of signal delivery, the shadow stack token is saved on the
189current shadow stack itself. The updated pointer is saved away in the
190:c:macro:`ss_ptr` field in :c:macro:`__sc_riscv_cfi_state` under
191:c:macro:`sigcontext`. The existing shadow stack allocation is used
192for signal delivery. During :c:macro:`sigreturn`, kernel will obtain
193:c:macro:`ss_ptr` from :c:macro:`sigcontext`, verify the saved
194token on the shadow stack, and switch the shadow stack.
Documentation/arch/s390/driver-model.rst+1−1
@@ -279,7 +279,7 @@ status · 278 unmodified lines
279 - Can be 'online' or 'offline'.279 - Can be 'online' or 'offline'.
280 Piping 'on' or 'off' sets the chpid logically online/offline.280 Piping 'on' or 'off' sets the chpid logically online/offline.
281 Piping 'on' to an online chpid triggers path reprobing for all devices281 Piping 'on' to an online chpid triggers path reprobing for all devices
282 the chpid connects to. This can be used to force the kernel to re-use282 the chpid connects to. This can be used to force the kernel to reuse
283 a channel path the user knows to be online, but the machine hasn't283 a channel path the user knows to be online, but the machine hasn't
284 created a machine check for.284 created a machine check for.
285 285
Documentation/arch/s390/index.rst+0−7
@@ -22,10 +22,3 @@ s390 Architecture · 21 unmodified lines
22 text_files22 text_files
23 23
24 features24 features
25
26.. only:: subproject and html
27
28 Indices
29 =======
30
31 * :ref:`genindex`
Documentation/arch/s390/mm.rst+4−0
@@ -109,3 +109,7 @@ Virtual memory layout · 108 unmodified lines
109 | KASAN shadow | KASAN untracked109 | KASAN shadow | KASAN untracked
110 | |110 | |
111 +------------------+ ASCE limit111 +------------------+ ASCE limit
112 | |
113 | CONFIG_ILLEGAL_POINTER_VALUE causes memory access fault
114 | |
115 +------------------+
Documentation/arch/x86/amd_hsmp.rst+2−2
@@ -14,7 +14,7 @@ set of mailbox registers. · 13 unmodified lines
14 14
15More details on the interface can be found in chapter15More details on the interface can be found in chapter
16"7 Host System Management Port (HSMP)" of the family/model PPR16"7 Host System Management Port (HSMP)" of the family/model PPR
17Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip17Eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
18 18
19 19
20HSMP interface is supported on EPYC line of server CPUs and MI300A (APU).20HSMP interface is supported on EPYC line of server CPUs and MI300A (APU).
@@ -185,7 +185,7 @@ what happened. The transaction returns 0 on success. · 164 unmodified lines
185 185
186More details on the interface and message definitions can be found in chapter186More details on the interface and message definitions can be found in chapter
187"7 Host System Management Port (HSMP)" of the respective family/model PPR187"7 Host System Management Port (HSMP)" of the respective family/model PPR
188eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip188eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
189 189
190User space C-APIs are made available by linking against the esmi library,190User space C-APIs are made available by linking against the esmi library,
191which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html.191which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html.
Documentation/arch/x86/iommu.rst+4−3
@@ -2,10 +2,11 @@ · 1 unmodified line
2x86 IOMMU Support2x86 IOMMU Support
3=================3=================
4 4
5The architecture specs can be obtained from the below locations.5The architecture specs can be obtained from the vendor websites.
6Search for the following documents to obtain the latest versions:
6 7
7- Intel: http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf8- Intel: Intel Virtualization Technology for Directed I/O Architecture Specification (ID: D51397)
8- AMD: https://www.amd.com/content/dam/amd/en/documents/processor-tech-docs/specifications/48882_3_07_PUB.pdf9- AMD: AMD I/O Virtualization Technology (IOMMU) Specification (ID: 48882)
9 10
10This guide gives a quick cheat sheet for some basic understanding.11This guide gives a quick cheat sheet for some basic understanding.
11 12
Documentation/arch/x86/shstk.rst+1−1
@@ -165,7 +165,7 @@ in the page fault error code. · 164 unmodified lines
165When a task forks a child, its shadow stack PTEs are copied and both the165When a task forks a child, its shadow stack PTEs are copied and both the
166parent's and the child's shadow stack PTEs are cleared of the dirty bit.166parent's and the child's shadow stack PTEs are cleared of the dirty bit.
167Upon the next shadow stack access, the resulting shadow stack page fault167Upon the next shadow stack access, the resulting shadow stack page fault
168is handled by page copy/re-use.168is handled by page copy/reuse.
169 169
170When a pthread child is created, the kernel allocates a new shadow stack170When a pthread child is created, the kernel allocates a new shadow stack
171for the new thread. New shadow stack creation behaves like mmap() with respect171for the new thread. New shadow stack creation behaves like mmap() with respect
Documentation/block/biovecs.rst+0−1
@@ -135,7 +135,6 @@ Usage of helpers: · 134 unmodified lines
135 bio_first_bvec_all()135 bio_first_bvec_all()
136 bio_first_page_all()136 bio_first_page_all()
137 bio_first_folio_all()137 bio_first_folio_all()
138 bio_last_bvec_all()
139 138
140* The following helpers iterate over single-page segment. The passed 'struct139* The following helpers iterate over single-page segment. The passed 'struct
141 bio_vec' will contain a single-page IO vector during the iteration::140 bio_vec' will contain a single-page IO vector during the iteration::
Documentation/block/inline-encryption.rst+6−0
@@ -206,6 +206,12 @@ it to a bio, given the blk_crypto_key and the data unit number that will be used · 205 unmodified lines
206for en/decryption. Users don't need to worry about freeing the bio_crypt_ctx206for en/decryption. Users don't need to worry about freeing the bio_crypt_ctx
207later, as that happens automatically when the bio is freed or reset.207later, as that happens automatically when the bio is freed or reset.
208 208
209To submit a bio that uses inline encryption, users must call
210``blk_crypto_submit_bio()`` instead of the usual ``submit_bio()``. This will
211submit the bio to the underlying driver if it supports inline crypto, or else
212call the blk-crypto fallback routines before submitting normal bios to the
213underlying drivers.
214
209Finally, when done using inline encryption with a blk_crypto_key on a215Finally, when done using inline encryption with a blk_crypto_key on a
210block_device, users must call ``blk_crypto_evict_key()``. This ensures that216block_device, users must call ``blk_crypto_evict_key()``. This ensures that
211the key is evicted from all keyslots it may be programmed into and unlinked from217the key is evicted from all keyslots it may be programmed into and unlinked from
Documentation/block/ublk.rst+60−4
@@ -260,9 +260,12 @@ The following IO commands are communicated via io_uring passthrough command, · 259 unmodified lines
260and each command is only for forwarding the IO and committing the result260and each command is only for forwarding the IO and committing the result
261with specified IO tag in the command data:261with specified IO tag in the command data:
262 262
263- ``UBLK_IO_FETCH_REQ``263Traditional Per-I/O Commands
264~~~~~~~~~~~~~~~~~~~~~~~~~~~~
264 265
265 Sent from the server IO pthread for fetching future incoming IO requests266- ``UBLK_U_IO_FETCH_REQ``
267
268 Sent from the server I/O pthread for fetching future incoming I/O requests
266 destined to ``/dev/ublkb*``. This command is sent only once from the server269 destined to ``/dev/ublkb*``. This command is sent only once from the server
267 IO pthread for ublk driver to setup IO forward environment.270 IO pthread for ublk driver to setup IO forward environment.
268 271
@@ -278,7 +281,7 @@ with specified IO tag in the command data: · 9 unmodified lines
278 supported by the driver, daemons must be per-queue instead - i.e. all I/Os281 supported by the driver, daemons must be per-queue instead - i.e. all I/Os
279 associated to a single qid must be handled by the same task.282 associated to a single qid must be handled by the same task.
280 283
281- ``UBLK_IO_COMMIT_AND_FETCH_REQ``284- ``UBLK_U_IO_COMMIT_AND_FETCH_REQ``
282 285
283 When an IO request is destined to ``/dev/ublkb*``, the driver stores286 When an IO request is destined to ``/dev/ublkb*``, the driver stores
284 the IO's ``ublksrv_io_desc`` to the specified mapped area; then the287 the IO's ``ublksrv_io_desc`` to the specified mapped area; then the
@@ -293,7 +296,7 @@ with specified IO tag in the command data: · 8 unmodified lines
293 requests with the same IO tag. That is, ``UBLK_IO_COMMIT_AND_FETCH_REQ``296 requests with the same IO tag. That is, ``UBLK_IO_COMMIT_AND_FETCH_REQ``
294 is reused for both fetching request and committing back IO result.297 is reused for both fetching request and committing back IO result.
295 298
296- ``UBLK_IO_NEED_GET_DATA``299- ``UBLK_U_IO_NEED_GET_DATA``
297 300
298 With ``UBLK_F_NEED_GET_DATA`` enabled, the WRITE request will be firstly301 With ``UBLK_F_NEED_GET_DATA`` enabled, the WRITE request will be firstly
299 issued to ublk server without data copy. Then, IO backend of ublk server302 issued to ublk server without data copy. Then, IO backend of ublk server
@@ -322,6 +325,59 @@ with specified IO tag in the command data: · 22 unmodified lines
322 ``UBLK_IO_COMMIT_AND_FETCH_REQ`` to the server, ublkdrv needs to copy325 ``UBLK_IO_COMMIT_AND_FETCH_REQ`` to the server, ublkdrv needs to copy
323 the server buffer (pages) read to the IO request pages.326 the server buffer (pages) read to the IO request pages.
324 327
328Batch I/O Commands (UBLK_F_BATCH_IO)
329~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
330
331The ``UBLK_F_BATCH_IO`` feature provides an alternative high-performance
332I/O handling model that replaces the traditional per-I/O commands with
333per-queue batch commands. This significantly reduces communication overhead
334and enables better load balancing across multiple server tasks.
335
336Key differences from traditional mode:
337
338- **Per-queue vs Per-I/O**: Commands operate on queues rather than individual I/Os
339- **Batch processing**: Multiple I/Os are handled in single operations
340- **Multishot commands**: Use io_uring multishot for reduced submission overhead
341- **Flexible task assignment**: Any task can handle any I/O (no per-I/O daemons)
342- **Better load balancing**: Tasks can adjust their workload dynamically
343
344Batch I/O Commands:
345
346- ``UBLK_U_IO_PREP_IO_CMDS``
347
348 Prepares multiple I/O commands in batch. The server provides a buffer
349 containing multiple I/O descriptors that will be processed together.
350 This reduces the number of individual command submissions required.
351
352- ``UBLK_U_IO_COMMIT_IO_CMDS``
353
354 Commits results for multiple I/O operations in batch, and prepares the
355 I/O descriptors to accept new requests. The server provides a buffer
356 containing the results of multiple completed I/Os, allowing efficient
357 bulk completion of requests.
358
359- ``UBLK_U_IO_FETCH_IO_CMDS``
360
361 **Multishot command** for fetching I/O commands in batch. This is the key
362 command that enables high-performance batch processing:
363
364 * Uses io_uring multishot capability for reduced submission overhead
365 * Single command can fetch multiple I/O requests over time
366 * Buffer size determines maximum batch size per operation
367 * Multiple fetch commands can be submitted for load balancing
368 * Only one fetch command is active at any time per queue
369 * Supports dynamic load balancing across multiple server tasks
370
371 It is one typical multishot io_uring request with provided buffer, and it
372 won't be completed until any failure is triggered.
373
374 Each task can submit ``UBLK_U_IO_FETCH_IO_CMDS`` with different buffer
375 sizes to control how much work it handles. This enables sophisticated
376 load balancing strategies in multi-threaded servers.
377
378Migration: Applications using traditional commands (``UBLK_U_IO_FETCH_REQ``,
379``UBLK_U_IO_COMMIT_AND_FETCH_REQ``) cannot use batch mode simultaneously.
380
325Zero copy381Zero copy
326---------382---------
327 383
Documentation/bpf/bpf_prog_run.rst+2−1
@@ -34,11 +34,12 @@ following types: · 33 unmodified lines
34- ``BPF_PROG_TYPE_LWT_IN``34- ``BPF_PROG_TYPE_LWT_IN``
35- ``BPF_PROG_TYPE_LWT_OUT``35- ``BPF_PROG_TYPE_LWT_OUT``
36- ``BPF_PROG_TYPE_LWT_XMIT``36- ``BPF_PROG_TYPE_LWT_XMIT``
37- ``BPF_PROG_TYPE_LWT_SEG6LOCAL``
38- ``BPF_PROG_TYPE_FLOW_DISSECTOR``37- ``BPF_PROG_TYPE_FLOW_DISSECTOR``
39- ``BPF_PROG_TYPE_STRUCT_OPS``38- ``BPF_PROG_TYPE_STRUCT_OPS``
40- ``BPF_PROG_TYPE_RAW_TRACEPOINT``39- ``BPF_PROG_TYPE_RAW_TRACEPOINT``
41- ``BPF_PROG_TYPE_SYSCALL``40- ``BPF_PROG_TYPE_SYSCALL``
41- ``BPF_PROG_TYPE_TRACING``
42- ``BPF_PROG_TYPE_NETFILTER``
42 43
43When using the ``BPF_PROG_RUN`` command, userspace supplies an input context44When using the ``BPF_PROG_RUN`` command, userspace supplies an input context
44object and (for program types operating on network packets) a buffer containing45object and (for program types operating on network packets) a buffer containing
Documentation/bpf/index.rst+0−7
@@ -34,12 +34,5 @@ that goes into great technical depth about the BPF Architecture. · 33 unmodified lines
34 other34 other
35 redirect35 redirect
36 36
37.. only:: subproject and html
38
39 Indices
40 =======
41
42 * :ref:`genindex`
43
44.. Links:37.. Links:
45.. _BPF and XDP Reference Guide: https://docs.cilium.io/en/latest/bpf/38.. _BPF and XDP Reference Guide: https://docs.cilium.io/en/latest/bpf/
Documentation/bpf/kfuncs.rst+141−119
@@ -50,7 +50,70 @@ A wrapper kfunc is often needed when we need to annotate parameters of the · 49 unmodified lines
50kfunc. Otherwise one may directly make the kfunc visible to the BPF program by50kfunc. Otherwise one may directly make the kfunc visible to the BPF program by
51registering it with the BPF subsystem. See :ref:`BPF_kfunc_nodef`.51registering it with the BPF subsystem. See :ref:`BPF_kfunc_nodef`.
52 52
532.2 Annotating kfunc parameters532.2 kfunc Parameters
54--------------------
55
56All kfuncs now require trusted arguments by default. This means that all
57pointer arguments must be valid, and all pointers to BTF objects must be
58passed in their unmodified form (at a zero offset, and without having been
59obtained from walking another pointer, with exceptions described below).
60
61There are two types of pointers to kernel objects which are considered "trusted":
62
631. Pointers which are passed as tracepoint or struct_ops callback arguments.
642. Pointers which were returned from a KF_ACQUIRE kfunc.
65
66Pointers to non-BTF objects (e.g. scalar pointers) may also be passed to
67kfuncs, and may have a non-zero offset.
68
69The definition of "valid" pointers is subject to change at any time, and has
70absolutely no ABI stability guarantees.
71
72As mentioned above, a nested pointer obtained from walking a trusted pointer is
73no longer trusted, with one exception. If a struct type has a field that is
74guaranteed to be valid (trusted or rcu, as in KF_RCU description below) as long
75as its parent pointer is valid, the following macros can be used to express
76that to the verifier:
77
78* ``BTF_TYPE_SAFE_TRUSTED``
79* ``BTF_TYPE_SAFE_RCU``
80* ``BTF_TYPE_SAFE_RCU_OR_NULL``
81
82For example,
83
84.. code-block:: c
85
86 BTF_TYPE_SAFE_TRUSTED(struct socket) {
87 struct sock *sk;
88 };
89
90or
91
92.. code-block:: c
93
94 BTF_TYPE_SAFE_RCU(struct task_struct) {
95 const cpumask_t *cpus_ptr;
96 struct css_set __rcu *cgroups;
97 struct task_struct __rcu *real_parent;
98 struct task_struct *group_leader;
99 };
100
101In other words, you must:
102
1031. Wrap the valid pointer type in a ``BTF_TYPE_SAFE_*`` macro.
104
1052. Specify the type and name of the valid nested field. This field must match
106 the field in the original type definition exactly.
107
108A new type declared by a ``BTF_TYPE_SAFE_*`` macro also needs to be emitted so
109that it appears in BTF. For example, ``BTF_TYPE_SAFE_TRUSTED(struct socket)``
110is emitted in the ``type_is_trusted()`` function as follows:
111
112.. code-block:: c
113
114 BTF_TYPE_EMIT(BTF_TYPE_SAFE_TRUSTED(struct socket));
115
1162.3 Annotating kfunc parameters
54-------------------------------117-------------------------------
55 118
56Similar to BPF helpers, there is sometime need for additional context required119Similar to BPF helpers, there is sometime need for additional context required
@@ -58,7 +121,7 @@ by the verifier to make the usage of kernel functions safer and more useful. · 1 unmodified line
58Hence, we can annotate a parameter by suffixing the name of the argument of the121Hence, we can annotate a parameter by suffixing the name of the argument of the
59kfunc with a __tag, where tag may be one of the supported annotations.122kfunc with a __tag, where tag may be one of the supported annotations.
60 123
612.2.1 __sz Annotation1242.3.1 __sz Annotation
62---------------------125---------------------
63 126
64This annotation is used to indicate a memory and size pair in the argument list.127This annotation is used to indicate a memory and size pair in the argument list.
@@ -74,7 +137,7 @@ argument as its size. By default, without __sz annotation, the size of the type · 9 unmodified lines
74of the pointer is used. Without __sz annotation, a kfunc cannot accept a void137of the pointer is used. Without __sz annotation, a kfunc cannot accept a void
75pointer.138pointer.
76 139
772.2.2 __k Annotation1402.3.2 __k Annotation
78--------------------141--------------------
79 142
80This annotation is only understood for scalar arguments, where it indicates that143This annotation is only understood for scalar arguments, where it indicates that
@@ -98,7 +161,7 @@ Hence, whenever a constant scalar argument is accepted by a kfunc which is not a · 17 unmodified lines
98size parameter, and the value of the constant matters for program safety, __k161size parameter, and the value of the constant matters for program safety, __k
99suffix should be used.162suffix should be used.
100 163
1012.2.3 __uninit Annotation1642.3.3 __uninit Annotation
102-------------------------165-------------------------
103 166
104This annotation is used to indicate that the argument will be treated as167This annotation is used to indicate that the argument will be treated as
@@ -115,27 +178,36 @@ Here, the dynptr will be treated as an uninitialized dynptr. Without this · 10 unmodified lines
115annotation, the verifier will reject the program if the dynptr passed in is178annotation, the verifier will reject the program if the dynptr passed in is
116not initialized.179not initialized.
117 180
1182.2.4 __opt Annotation1812.3.4 __nullable Annotation
119-------------------------182---------------------------
120 183
121This annotation is used to indicate that the buffer associated with an __sz or __szk184This annotation is used to indicate that the pointer argument may be NULL.
122argument may be null. If the function is passed a nullptr in place of the buffer,185The verifier will allow passing NULL for such arguments.
123the verifier will not check that length is appropriate for the buffer. The kfunc is
124responsible for checking if this buffer is null before using it.
125 186
126An example is given below::187An example is given below::
127 188
128 __bpf_kfunc void *bpf_dynptr_slice(..., void *buffer__opt, u32 buffer__szk)189 __bpf_kfunc void bpf_task_release(struct task_struct *task__nullable)
129 {190 {
130 ...191 ...
131 }192 }
132 193
133Here, the buffer may be null. If buffer is not null, it at least of size buffer_szk.194Here, the task pointer may be NULL. The kfunc is responsible for checking if
134Either way, the returned buffer is either NULL, or of size buffer_szk. Without this195the pointer is NULL before dereferencing it.
135annotation, the verifier will reject the program if a null pointer is passed in with196
136a nonzero size.197The __nullable annotation can be combined with other annotations. For example,
198when used with __sz or __szk annotations for memory and size pairs, the
199verifier will skip size validation when a NULL pointer is passed, but will
200still process the size argument to extract constant size information when
201needed::
202
203 __bpf_kfunc void *bpf_dynptr_slice(..., void *buffer__nullable,
204 u32 buffer__szk)
205
206Here, the buffer may be NULL. If the buffer is not NULL, it must be at least
207buffer__szk bytes in size. The kfunc is responsible for checking if the buffer
208is NULL before using it.
137 209
1382.2.5 __str Annotation2102.3.5 __str Annotation
139----------------------------211----------------------------
140This annotation is used to indicate that the argument is a constant string.212This annotation is used to indicate that the argument is a constant string.
141 213
@@ -160,26 +232,9 @@ Or:: · 18 unmodified lines
160 ...232 ...
161 }233 }
162 234
1632.2.6 __prog Annotation
164---------------------------
165This annotation is used to indicate that the argument needs to be fixed up to
166the bpf_prog_aux of the caller BPF program. Any value passed into this argument
167is ignored, and rewritten by the verifier.
168
169An example is given below::
170
171 __bpf_kfunc int bpf_wq_set_callback_impl(struct bpf_wq *wq,
172 int (callback_fn)(void *map, int *key, void *value),
173 unsigned int flags,
174 void *aux__prog)
175 {
176 struct bpf_prog_aux *aux = aux__prog;
177 ...
178 }
179
180.. _BPF_kfunc_nodef:235.. _BPF_kfunc_nodef:
181 236
1822.3 Using an existing kernel function2372.4 Using an existing kernel function
183-------------------------------------238-------------------------------------
184 239
185When an existing function in the kernel is fit for consumption by BPF programs,240When an existing function in the kernel is fit for consumption by BPF programs,
@@ -187,7 +242,7 @@ it can be directly registered with the BPF subsystem. However, care must still · 1 unmodified line
187be taken to review the context in which it will be invoked by the BPF program242be taken to review the context in which it will be invoked by the BPF program
188and whether it is safe to do so.243and whether it is safe to do so.
189 244
1902.4 Annotating kfuncs2452.5 Annotating kfuncs
191---------------------246---------------------
192 247
193In addition to kfuncs' arguments, verifier may need more information about the248In addition to kfuncs' arguments, verifier may need more information about the
@@ -216,7 +271,7 @@ protected. An example is given below:: · 22 unmodified lines
216 ...271 ...
217 }272 }
218 273
2192.4.1 KF_ACQUIRE flag2742.5.1 KF_ACQUIRE flag
220---------------------275---------------------
221 276
222The KF_ACQUIRE flag is used to indicate that the kfunc returns a pointer to a277The KF_ACQUIRE flag is used to indicate that the kfunc returns a pointer to a
@@ -226,7 +281,7 @@ referenced kptr (by invoking bpf_kptr_xchg). If not, the verifier fails the · 3 unmodified lines
226loading of the BPF program until no lingering references remain in all possible281loading of the BPF program until no lingering references remain in all possible
227explored states of the program.282explored states of the program.
228 283
2292.4.2 KF_RET_NULL flag2842.5.2 KF_RET_NULL flag
230----------------------285----------------------
231 286
232The KF_RET_NULL flag is used to indicate that the pointer returned by the kfunc287The KF_RET_NULL flag is used to indicate that the pointer returned by the kfunc
@@ -235,87 +290,21 @@ returned from the kfunc before making use of it (dereferencing or passing to · 2 unmodified lines
235another helper). This flag is often used in pairing with KF_ACQUIRE flag, but290another helper). This flag is often used in pairing with KF_ACQUIRE flag, but
236both are orthogonal to each other.291both are orthogonal to each other.
237 292
2382.4.3 KF_RELEASE flag2932.5.3 KF_RELEASE flag
239---------------------294---------------------
240 295
241The KF_RELEASE flag is used to indicate that the kfunc releases the pointer296The KF_RELEASE flag is used to indicate that the kfunc releases the pointer
242passed in to it. There can be only one referenced pointer that can be passed297passed in to it. There can be only one referenced pointer that can be passed
243in. All copies of the pointer being released are invalidated as a result of298in. All copies of the pointer being released are invalidated as a result of
244invoking kfunc with this flag. KF_RELEASE kfuncs automatically receive the299invoking kfunc with this flag.
245protection afforded by the KF_TRUSTED_ARGS flag described below.
246
2472.4.4 KF_TRUSTED_ARGS flag
248--------------------------
249 300
250The KF_TRUSTED_ARGS flag is used for kfuncs taking pointer arguments. It3012.5.4 KF_SLEEPABLE flag
251indicates that the all pointer arguments are valid, and that all pointers to
252BTF objects have been passed in their unmodified form (that is, at a zero
253offset, and without having been obtained from walking another pointer, with one
254exception described below).
255
256There are two types of pointers to kernel objects which are considered "valid":
257
2581. Pointers which are passed as tracepoint or struct_ops callback arguments.
2592. Pointers which were returned from a KF_ACQUIRE kfunc.
260
261Pointers to non-BTF objects (e.g. scalar pointers) may also be passed to
262KF_TRUSTED_ARGS kfuncs, and may have a non-zero offset.
263
264The definition of "valid" pointers is subject to change at any time, and has
265absolutely no ABI stability guarantees.
266
267As mentioned above, a nested pointer obtained from walking a trusted pointer is
268no longer trusted, with one exception. If a struct type has a field that is
269guaranteed to be valid (trusted or rcu, as in KF_RCU description below) as long
270as its parent pointer is valid, the following macros can be used to express
271that to the verifier:
272
273* ``BTF_TYPE_SAFE_TRUSTED``
274* ``BTF_TYPE_SAFE_RCU``
275* ``BTF_TYPE_SAFE_RCU_OR_NULL``
276
277For example,
278
279.. code-block:: c
280
281 BTF_TYPE_SAFE_TRUSTED(struct socket) {
282 struct sock *sk;
283 };
284
285or
286
287.. code-block:: c
288
289 BTF_TYPE_SAFE_RCU(struct task_struct) {
290 const cpumask_t *cpus_ptr;
291 struct css_set __rcu *cgroups;
292 struct task_struct __rcu *real_parent;
293 struct task_struct *group_leader;
294 };
295
296In other words, you must:
297
2981. Wrap the valid pointer type in a ``BTF_TYPE_SAFE_*`` macro.
299
3002. Specify the type and name of the valid nested field. This field must match
301 the field in the original type definition exactly.
302
303A new type declared by a ``BTF_TYPE_SAFE_*`` macro also needs to be emitted so
304that it appears in BTF. For example, ``BTF_TYPE_SAFE_TRUSTED(struct socket)``
305is emitted in the ``type_is_trusted()`` function as follows:
306
307.. code-block:: c
308
309 BTF_TYPE_EMIT(BTF_TYPE_SAFE_TRUSTED(struct socket));
310
311
3122.4.5 KF_SLEEPABLE flag
313-----------------------302-----------------------
314 303
315The KF_SLEEPABLE flag is used for kfuncs that may sleep. Such kfuncs can only304The KF_SLEEPABLE flag is used for kfuncs that may sleep. Such kfuncs can only
316be called by sleepable BPF programs (BPF_F_SLEEPABLE).305be called by sleepable BPF programs (BPF_F_SLEEPABLE).
317 306
3182.4.6 KF_DESTRUCTIVE flag3072.5.5 KF_DESTRUCTIVE flag
319--------------------------308--------------------------
320 309
321The KF_DESTRUCTIVE flag is used to indicate functions calling which is310The KF_DESTRUCTIVE flag is used to indicate functions calling which is
@@ -324,18 +313,19 @@ rebooting or panicking. Due to this additional restrictions apply to these · 2 unmodified lines
324calls. At the moment they only require CAP_SYS_BOOT capability, but more can be313calls. At the moment they only require CAP_SYS_BOOT capability, but more can be
325added later.314added later.
326 315
3272.4.7 KF_RCU flag3162.5.6 KF_RCU flag
328-----------------317-----------------
329 318
330The KF_RCU flag is a weaker version of KF_TRUSTED_ARGS. The kfuncs marked with319The KF_RCU flag allows kfuncs to opt out of the default trusted args
331KF_RCU expect either PTR_TRUSTED or MEM_RCU arguments. The verifier guarantees320requirement and accept RCU pointers with weaker guarantees. The kfuncs marked
332that the objects are valid and there is no use-after-free. The pointers are not321with KF_RCU expect either PTR_TRUSTED or MEM_RCU arguments. The verifier
333NULL, but the object's refcount could have reached zero. The kfuncs need to322guarantees that the objects are valid and there is no use-after-free. The
334consider doing refcnt != 0 check, especially when returning a KF_ACQUIRE323pointers are not NULL, but the object's refcount could have reached zero. The
335pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should very likely324kfuncs need to consider doing refcnt != 0 check, especially when returning a
336also be KF_RET_NULL.325KF_ACQUIRE pointer. Note as well that a KF_ACQUIRE kfunc that is KF_RCU should
326very likely also be KF_RET_NULL.
337 327
3382.4.8 KF_RCU_PROTECTED flag3282.5.7 KF_RCU_PROTECTED flag
339---------------------------329---------------------------
340 330
341The KF_RCU_PROTECTED flag is used to indicate that the kfunc must be invoked in331The KF_RCU_PROTECTED flag is used to indicate that the kfunc must be invoked in
@@ -354,7 +344,7 @@ RCU protection but do not take RCU protected arguments. · 12 unmodified lines
354 344
355.. _KF_deprecated_flag:345.. _KF_deprecated_flag:
356 346
3572.4.9 KF_DEPRECATED flag3472.5.8 KF_DEPRECATED flag
358------------------------348------------------------
359 349
360The KF_DEPRECATED flag is used for kfuncs which are scheduled to be350The KF_DEPRECATED flag is used for kfuncs which are scheduled to be
@@ -374,7 +364,39 @@ encouraged to make their use-cases known as early as possible, and participate · 13 unmodified lines
374in upstream discussions regarding whether to keep, change, deprecate, or remove364in upstream discussions regarding whether to keep, change, deprecate, or remove
375those kfuncs if and when such discussions occur.365those kfuncs if and when such discussions occur.
376 366
3772.5 Registering the kfuncs3672.5.9 KF_IMPLICIT_ARGS flag
368------------------------------------
369
370The KF_IMPLICIT_ARGS flag is used to indicate that the BPF signature
371of the kfunc is different from it's kernel signature, and the values
372for implicit arguments are provided at load time by the verifier.
373
374Only arguments of specific types are implicit.
375Currently only ``struct bpf_prog_aux *`` type is supported.
376
377A kfunc with KF_IMPLICIT_ARGS flag therefore has two types in BTF: one
378function matching the kernel declaration (with _impl suffix in the
379name by convention), and another matching the intended BPF API.
380
381Verifier only allows calls to the non-_impl version of a kfunc, that
382uses a signature without the implicit arguments.
383
384Example declaration:
385
386.. code-block:: c
387
388 __bpf_kfunc int bpf_task_work_schedule_signal(struct task_struct *task, struct bpf_task_work *tw,
389 void *map__map, bpf_task_work_callback_t callback,
390 struct bpf_prog_aux *aux) { ... }
391
392Example usage in BPF program:
393
394.. code-block:: c
395
396 /* note that the last argument is omitted */
397 bpf_task_work_schedule_signal(task, &work->tw, &arrmap, task_work_callback);
398
3992.6 Registering the kfuncs
378--------------------------400--------------------------
379 401
380Once the kfunc is prepared for use, the final step to making it visible is402Once the kfunc is prepared for use, the final step to making it visible is
@@ -397,7 +419,7 @@ type. An example is shown below:: · 16 unmodified lines
397 }419 }
398 late_initcall(init_subsystem);420 late_initcall(init_subsystem);
399 421
4002.6 Specifying no-cast aliases with ___init4222.7 Specifying no-cast aliases with ___init
401--------------------------------------------423--------------------------------------------
402 424
403The verifier will always enforce that the BTF type of a pointer passed to a425The verifier will always enforce that the BTF type of a pointer passed to a
Documentation/cdrom/index.rst+0−7
@@ -8,10 +8,3 @@ CD-ROM · 7 unmodified lines
8 :maxdepth: 18 :maxdepth: 1
9 9
10 cdrom-standard10 cdrom-standard
11
12.. only:: subproject and html
13
14 Indices
15 =======
16
17 * :ref:`genindex`
Documentation/conf.py+40−15
@@ -13,10 +13,15 @@ from textwrap import dedent · 12 unmodified lines
13 13
14import sphinx14import sphinx
15 15
16# If extensions (or modules to document with autodoc) are in another directory,16# Location of Documentation/ directory
17# add these directories to sys.path here. If the directory is relative to the17kern_doc_dir = os.path.dirname(os.path.abspath(__file__))
18# documentation root, use os.path.abspath to make it absolute, like shown here.18
19sys.path.insert(0, os.path.abspath("sphinx"))19# Add location of Sphinx extensions
20sys.path.insert(0, os.path.join(kern_doc_dir, "sphinx"))
21
22# Allow sphinx.ext.autodoc to document files at tools and scripts
23sys.path.append(os.path.join(kern_doc_dir, "..", "tools"))
24sys.path.append(os.path.join(kern_doc_dir, "..", "scripts"))
20 25
21# Minimal supported version26# Minimal supported version
22needs_sphinx = "3.4.3"27needs_sphinx = "3.4.3"
@@ -32,15 +37,12 @@ else: · 9 unmodified lines
32 # Include patterns that don't contain directory names, in glob format37 # Include patterns that don't contain directory names, in glob format
33 include_patterns = ["**.rst"]38 include_patterns = ["**.rst"]
34 39
35# Location of Documentation/ directory
36doctree = os.path.abspath(".")
37
38# Exclude of patterns that don't contain directory names, in glob format.40# Exclude of patterns that don't contain directory names, in glob format.
39exclude_patterns = []41exclude_patterns = []
40 42
41# List of patterns that contain directory names in glob format.43# List of patterns that contain directory names in glob format.
42dyn_include_patterns = []44dyn_include_patterns = []
43dyn_exclude_patterns = ["output"]45dyn_exclude_patterns = ["output", "sphinx-includes"]
44 46
45# Currently, only netlink/specs has a parser for yaml.47# Currently, only netlink/specs has a parser for yaml.
46# Prefer using include patterns if available, as it is faster48# Prefer using include patterns if available, as it is faster
@@ -51,6 +53,9 @@ else: · 4 unmodified lines
51 dyn_exclude_patterns.append("devicetree/bindings/**.yaml")53 dyn_exclude_patterns.append("devicetree/bindings/**.yaml")
52 dyn_exclude_patterns.append("core-api/kho/bindings/**.yaml")54 dyn_exclude_patterns.append("core-api/kho/bindings/**.yaml")
53 55
56# Link to man pages
57manpages_url = 'https://man7.org/linux/man-pages/man{section}/{page}.{section}.html'
58
54# Properly handle directory patterns and LaTeX docs59# Properly handle directory patterns and LaTeX docs
55# -------------------------------------------------60# -------------------------------------------------
56 61
@@ -70,7 +75,7 @@ def config_init(app, config): · 13 unmodified lines
70 # setup include_patterns dynamically75 # setup include_patterns dynamically
71 if has_include_patterns:76 if has_include_patterns:
72 for p in dyn_include_patterns:77 for p in dyn_include_patterns:
73 full = os.path.join(doctree, p)78 full = os.path.join(kern_doc_dir, p)
74 79
75 rel_path = os.path.relpath(full, start=app.srcdir)80 rel_path = os.path.relpath(full, start=app.srcdir)
76 if rel_path.startswith("../"):81 if rel_path.startswith("../"):
@@ -80,7 +85,7 @@ def config_init(app, config): · 3 unmodified lines
80 85
81 # setup exclude_patterns dynamically86 # setup exclude_patterns dynamically
82 for p in dyn_exclude_patterns:87 for p in dyn_exclude_patterns:
83 full = os.path.join(doctree, p)88 full = os.path.join(kern_doc_dir, p)
84 89
85 rel_path = os.path.relpath(full, start=app.srcdir)90 rel_path = os.path.relpath(full, start=app.srcdir)
86 if rel_path.startswith("../"):91 if rel_path.startswith("../"):
@@ -92,7 +97,7 @@ def config_init(app, config): · 5 unmodified lines
92 # of the app.srcdir. Add them here97 # of the app.srcdir. Add them here
93 98
94 # Handle the case where SPHINXDIRS is used99 # Handle the case where SPHINXDIRS is used
95 if not os.path.samefile(doctree, app.srcdir):100 if not os.path.samefile(kern_doc_dir, app.srcdir):
96 # Add a tag to mark that the build is actually a subproject101 # Add a tag to mark that the build is actually a subproject
97 tags.add("subproject")102 tags.add("subproject")
98 103
@@ -151,6 +156,7 @@ extensions = [ · 52 unmodified lines
151 "maintainers_include",156 "maintainers_include",
152 "parser_yaml",157 "parser_yaml",
153 "rstFlatTable",158 "rstFlatTable",
159 "sphinx.ext.autodoc",
154 "sphinx.ext.autosectionlabel",160 "sphinx.ext.autosectionlabel",
155 "sphinx.ext.ifconfig",161 "sphinx.ext.ifconfig",
156 "translations",162 "translations",
@@ -579,13 +585,32 @@ pdf_documents = [ · 422 unmodified lines
579 ("kernel-documentation", "Kernel", "Kernel", "J. Random Bozo"),585 ("kernel-documentation", "Kernel", "Kernel", "J. Random Bozo"),
580]586]
581 587
582# kernel-doc extension configuration for running Sphinx directly (e.g. by Read
583# the Docs). In a normal build, these are supplied from the Makefile via command
584# line arguments.
585kerneldoc_bin = "../scripts/kernel-doc.py"
586kerneldoc_srctree = ".."588kerneldoc_srctree = ".."
587 589
590# Add index link at the end of the root document for SPHINXDIRS builds.
591def add_subproject_index(app, docname, content):
592 # Only care about root documents
593 if docname != master_doc:
594 return
595
596 # Add the index link at the root of translations, but not at the root of
597 # individual translations. They have their own language specific links.
598 rel = os.path.relpath(app.srcdir, start=kern_doc_dir).split('/')
599 if rel[0] == 'translations' and len(rel) > 1:
600 return
601
602 # Only add the link for SPHINXDIRS HTML builds
603 if not app.builder.tags.has('subproject') or not app.builder.tags.has('html'):
604 return
605
606 # The include directive needs a relative path from the srcdir
607 rel = os.path.relpath(os.path.join(kern_doc_dir, 'sphinx-includes/subproject-index.rst'),
608 start=app.srcdir)
609
610 content[0] += f'\n.. include:: {rel}\n\n'
611
588def setup(app):612def setup(app):
589 """Patterns need to be updated at init time on older Sphinx versions"""613 """Patterns need to be updated at init time on older Sphinx versions"""
590 614
591 app.connect('config-inited', config_init)615 app.connect('config-inited', config_init)
616 app.connect('source-read', add_subproject_index)
Documentation/core-api/dma-api-howto.rst+52−0
@@ -146,6 +146,58 @@ What about block I/O and networking buffers? The block I/O and · 145 unmodified lines
146networking subsystems make sure that the buffers they use are valid146networking subsystems make sure that the buffers they use are valid
147for you to DMA from/to.147for you to DMA from/to.
148 148
149__dma_from_device_group_begin/end annotations
150=============================================
151
152As explained previously, when a structure contains a DMA_FROM_DEVICE /
153DMA_BIDIRECTIONAL buffer (device writes to memory) alongside fields that the
154CPU writes to, cache line sharing between the DMA buffer and CPU-written fields
155can cause data corruption on CPUs with DMA-incoherent caches.
156
157The ``__dma_from_device_group_begin(GROUP)/__dma_from_device_group_end(GROUP)``
158macros ensure proper alignment to prevent this::
159
160 struct my_device {
161 spinlock_t lock1;
162 __dma_from_device_group_begin();
163 char dma_buffer1[16];
164 char dma_buffer2[16];
165 __dma_from_device_group_end();
166 spinlock_t lock2;
167 };
168
169To isolate a DMA buffer from adjacent fields, use
170``__dma_from_device_group_begin(GROUP)`` before the first DMA buffer
171field and ``__dma_from_device_group_end(GROUP)`` after the last DMA
172buffer field (with the same GROUP name). This protects both the head
173and tail of the buffer from cache line sharing.
174
175The GROUP parameter is an optional identifier that names the DMA buffer group
176(in case you have several in the same structure)::
177
178 struct my_device {
179 spinlock_t lock1;
180 __dma_from_device_group_begin(buffer1);
181 char dma_buffer1[16];
182 __dma_from_device_group_end(buffer1);
183 spinlock_t lock2;
184 __dma_from_device_group_begin(buffer2);
185 char dma_buffer2[16];
186 __dma_from_device_group_end(buffer2);
187 };
188
189On cache-coherent platforms these macros expand to zero-length array markers.
190On non-coherent platforms, they also ensure the minimal DMA alignment, which
191can be as large as 128 bytes.
192
193.. note::
194
195 It is allowed (though somewhat fragile) to include extra fields, not
196 intended for DMA from the device, within the group (in order to pack the
197 structure tightly) - but only as long as the CPU does not write these
198 fields while any fields in the group are mapped for DMA_FROM_DEVICE or
199 DMA_BIDIRECTIONAL.
200
149DMA addressing capabilities201DMA addressing capabilities
150===========================202===========================
151 203
Documentation/core-api/dma-attributes.rst+9−0
@@ -148,3 +148,12 @@ DMA_ATTR_MMIO is appropriate. · 147 unmodified lines
148For architectures that require cache flushing for DMA coherence148For architectures that require cache flushing for DMA coherence
149DMA_ATTR_MMIO will not perform any cache flushing. The address149DMA_ATTR_MMIO will not perform any cache flushing. The address
150provided must never be mapped cacheable into the CPU.150provided must never be mapped cacheable into the CPU.
151
152DMA_ATTR_CPU_CACHE_CLEAN
153------------------------
154
155This attribute indicates the CPU will not dirty any cacheline overlapping this
156DMA_FROM_DEVICE/DMA_BIDIRECTIONAL buffer while it is mapped. This allows
157multiple small buffers to safely share a cacheline without risk of data
158corruption, suppressing DMA debug warnings about overlapping mappings.
159All mappings sharing a cacheline should have this attribute.
Documentation/core-api/housekeeping.rst+111−0
@@ -0,0 +1,111 @@
1======================================
2Housekeeping
3======================================
4
5
6CPU Isolation moves away kernel work that may otherwise run on any CPU.
7The purpose of its related features is to reduce the OS jitter that some
8extreme workloads can't stand, such as in some DPDK usecases.
9
10The kernel work moved away by CPU isolation is commonly described as
11"housekeeping" because it includes ground work that performs cleanups,
12statistics maintainance and actions relying on them, memory release,
13various deferrals etc...
14
15Sometimes housekeeping is just some unbound work (unbound workqueues,
16unbound timers, ...) that gets easily assigned to non-isolated CPUs.
17But sometimes housekeeping is tied to a specific CPU and requires
18elaborated tricks to be offloaded to non-isolated CPUs (RCU_NOCB, remote
19scheduler tick, etc...).
20
21Thus, a housekeeping CPU can be considered as the reverse of an isolated
22CPU. It is simply a CPU that can execute housekeeping work. There must
23always be at least one online housekeeping CPU at any time. The CPUs that
24are not isolated are automatically assigned as housekeeping.
25
26Housekeeping is currently divided in four features described
27by the ``enum hk_type type``:
28
291. HK_TYPE_DOMAIN matches the work moved away by scheduler domain
30 isolation performed through ``isolcpus=domain`` boot parameter or
31 isolated cpuset partitions in cgroup v2. This includes scheduler
32 load balancing, unbound workqueues and timers.
33
342. HK_TYPE_KERNEL_NOISE matches the work moved away by tick isolation
35 performed through ``nohz_full=`` or ``isolcpus=nohz`` boot
36 parameters. This includes remote scheduler tick, vmstat and lockup
37 watchdog.
38
393. HK_TYPE_MANAGED_IRQ matches the IRQ handlers moved away by managed
40 IRQ isolation performed through ``isolcpus=managed_irq``.
41
424. HK_TYPE_DOMAIN_BOOT matches the work moved away by scheduler domain
43 isolation performed through ``isolcpus=domain`` only. It is similar
44 to HK_TYPE_DOMAIN except it ignores the isolation performed by
45 cpusets.
46
47
48Housekeeping cpumasks
49=================================
50
51Housekeeping cpumasks include the CPUs that can execute the work moved
52away by the matching isolation feature. These cpumasks are returned by
53the following function::
54
55 const struct cpumask *housekeeping_cpumask(enum hk_type type)
56
57By default, if neither ``nohz_full=``, nor ``isolcpus``, nor cpuset's
58isolated partitions are used, which covers most usecases, this function
59returns the cpu_possible_mask.
60
61Otherwise the function returns the cpumask complement of the isolation
62feature. For example:
63
64With isolcpus=domain,7 the following will return a mask with all possible
65CPUs except 7::
66
67 housekeeping_cpumask(HK_TYPE_DOMAIN)
68
69Similarly with nohz_full=5,6 the following will return a mask with all
70possible CPUs except 5,6::
71
72 housekeeping_cpumask(HK_TYPE_KERNEL_NOISE)
73
74
75Synchronization against cpusets
76=================================
77
78Cpuset can modify the HK_TYPE_DOMAIN housekeeping cpumask while creating,
79modifying or deleting an isolated partition.
80
81The users of HK_TYPE_DOMAIN cpumask must then make sure to synchronize
82properly against cpuset in order to make sure that:
83
841. The cpumask snapshot stays coherent.
85
862. No housekeeping work is queued on a newly made isolated CPU.
87
883. Pending housekeeping work that was queued to a non isolated
89 CPU which just turned isolated through cpuset must be flushed
90 before the related created/modified isolated partition is made
91 available to userspace.
92
93This synchronization is maintained by an RCU based scheme. The cpuset update
94side waits for an RCU grace period after updating the HK_TYPE_DOMAIN
95cpumask and before flushing pending works. On the read side, care must be
96taken to gather the housekeeping target election and the work enqueue within
97the same RCU read side critical section.
98
99A typical layout example would look like this on the update side
100(``housekeeping_update()``)::
101
102 rcu_assign_pointer(housekeeping_cpumasks[type], trial);
103 synchronize_rcu();
104 flush_workqueue(example_workqueue);
105
106And then on the read side::
107
108 rcu_read_lock();
109 cpu = housekeeping_any_cpu(HK_TYPE_DOMAIN);
110 queue_work_on(cpu, example_workqueue, work);
111 rcu_read_unlock();
Documentation/core-api/index.rst+1−7
@@ -25,6 +25,7 @@ it. · 24 unmodified lines
25 symbol-namespaces25 symbol-namespaces
26 asm-annotations26 asm-annotations
27 real-time/index27 real-time/index
28 housekeeping.rst
28 29
29Data structures and low-level utilities30Data structures and low-level utilities
30=======================================31=======================================
@@ -140,10 +141,3 @@ Documents that don't fit elsewhere or which have yet to be categorized. · 109 unmodified lines
140 librs141 librs
141 liveupdate142 liveupdate
142 netlink143 netlink
143
144.. only:: subproject and html
145
146 Indices
147 =======
148
149 * :ref:`genindex`
Documentation/core-api/kho/abi.rst+28−0
@@ -0,0 +1,28 @@
1.. SPDX-License-Identifier: GPL-2.0-or-later
2
3==================
4Kexec Handover ABI
5==================
6
7Core Kexec Handover ABI
8========================
9
10.. kernel-doc:: include/linux/kho/abi/kexec_handover.h
11 :doc: Kexec Handover ABI
12
13vmalloc preservation ABI
14========================
15
16.. kernel-doc:: include/linux/kho/abi/kexec_handover.h
17 :doc: Kexec Handover ABI for vmalloc Preservation
18
19memblock preservation ABI
20=========================
21
22.. kernel-doc:: include/linux/kho/abi/memblock.h
23 :doc: memblock kexec handover ABI
24
25See Also
26========
27
28- :doc:`/admin-guide/mm/kho`
Documentation/core-api/kho/bindings/kho.yaml+0−43
@@ -1,43 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4title: Kexec HandOver (KHO) root tree
5
6maintainers:
7 - Mike Rapoport <rppt@kernel.org>
8 - Changyuan Lyu <changyuanl@google.com>
9
10description: |
11 System memory preserved by KHO across kexec.
12
13properties:
14 compatible:
15 enum:
16 - kho-v1
17
18 preserved-memory-map:
19 description: |
20 physical address (u64) of an in-memory structure describing all preserved
21 folios and memory ranges.
22
23patternProperties:
24 "$[0-9a-f_]+^":
25 $ref: sub-fdt.yaml#
26 description: physical address of a KHO user's own FDT.
27
28required:
29 - compatible
30 - preserved-memory-map
31
32additionalProperties: false
33
34examples:
35 - |
36 kho {
37 compatible = "kho-v1";
38 preserved-memory-map = <0xf0be16 0x1000000>;
39
40 memblock {
41 fdt = <0x80cc16 0x1000000>;
42 };
43 };
Documentation/core-api/kho/bindings/memblock/memblock.yaml+0−39
@@ -1,39 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4title: Memblock reserved memory
5
6maintainers:
7 - Mike Rapoport <rppt@kernel.org>
8
9description: |
10 Memblock can serialize its current memory reservations created with
11 reserve_mem command line option across kexec through KHO.
12 The post-KHO kernel can then consume these reservations and they are
13 guaranteed to have the same physical address.
14
15properties:
16 compatible:
17 enum:
18 - reserve-mem-v1
19
20patternProperties:
21 "$[0-9a-f_]+^":
22 $ref: reserve-mem.yaml#
23 description: reserved memory regions
24
25required:
26 - compatible
27
28additionalProperties: false
29
30examples:
31 - |
32 memblock {
33 compatible = "memblock-v1";
34 n1 {
35 compatible = "reserve-mem-v1";
36 start = <0xc06b 0x4000000>;
37 size = <0x04 0x00>;
38 };
39 };
Documentation/core-api/kho/bindings/memblock/reserve-mem.yaml+0−40
@@ -1,40 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4title: Memblock reserved memory regions
5
6maintainers:
7 - Mike Rapoport <rppt@kernel.org>
8
9description: |
10 Memblock can serialize its current memory reservations created with
11 reserve_mem command line option across kexec through KHO.
12 This object describes each such region.
13
14properties:
15 compatible:
16 enum:
17 - reserve-mem-v1
18
19 start:
20 description: |
21 physical address (u64) of the reserved memory region.
22
23 size:
24 description: |
25 size (u64) of the reserved memory region.
26
27required:
28 - compatible
29 - start
30 - size
31
32additionalProperties: false
33
34examples:
35 - |
36 n1 {
37 compatible = "reserve-mem-v1";
38 start = <0xc06b 0x4000000>;
39 size = <0x04 0x00>;
40 };
Documentation/core-api/kho/bindings/sub-fdt.yaml+0−27
@@ -1,27 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4title: KHO users' FDT address
5
6maintainers:
7 - Mike Rapoport <rppt@kernel.org>
8 - Changyuan Lyu <changyuanl@google.com>
9
10description: |
11 Physical address of an FDT blob registered by a KHO user.
12
13properties:
14 fdt:
15 description: |
16 physical address (u64) of an FDT blob.
17
18required:
19 - fdt
20
21additionalProperties: false
22
23examples:
24 - |
25 memblock {
26 fdt = <0x80cc16 0x1000000>;
27 };
Documentation/core-api/kho/concepts.rst+0−74
@@ -1,74 +0,0 @@
1.. SPDX-License-Identifier: GPL-2.0-or-later
2.. _kho-concepts:
3
4=======================
5Kexec Handover Concepts
6=======================
7
8Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory
9regions, which could contain serialized system states, across kexec.
10
11It introduces multiple concepts:
12
13KHO FDT
14=======
15
16Every KHO kexec carries a KHO specific flattened device tree (FDT) blob
17that describes preserved memory regions. These regions contain either
18serialized subsystem states, or in-memory data that shall not be touched
19across kexec. After KHO, subsystems can retrieve and restore preserved
20memory regions from KHO FDT.
21
22KHO only uses the FDT container format and libfdt library, but does not
23adhere to the same property semantics that normal device trees do: Properties
24are passed in native endianness and standardized properties like ``regs`` and
25``ranges`` do not exist, hence there are no ``#...-cells`` properties.
26
27KHO is still under development. The FDT schema is unstable and would change
28in the future.
29
30Scratch Regions
31===============
32
33To boot into kexec, we need to have a physically contiguous memory range that
34contains no handed over memory. Kexec then places the target kernel and initrd
35into that region. The new kernel exclusively uses this region for memory
36allocations before during boot up to the initialization of the page allocator.
37
38We guarantee that we always have such regions through the scratch regions: On
39first boot KHO allocates several physically contiguous memory regions. Since
40after kexec these regions will be used by early memory allocations, there is a
41scratch region per NUMA node plus a scratch region to satisfy allocations
42requests that do not require particular NUMA node assignment.
43By default, size of the scratch region is calculated based on amount of memory
44allocated during boot. The ``kho_scratch`` kernel command line option may be
45used to explicitly define size of the scratch regions.
46The scratch regions are declared as CMA when page allocator is initialized so
47that their memory can be used during system lifetime. CMA gives us the
48guarantee that no handover pages land in that region, because handover pages
49must be at a static physical memory location and CMA enforces that only
50movable pages can be located inside.
51
52After KHO kexec, we ignore the ``kho_scratch`` kernel command line option and
53instead reuse the exact same region that was originally allocated. This allows
54us to recursively execute any amount of KHO kexecs. Because we used this region
55for boot memory allocations and as target memory for kexec blobs, some parts
56of that memory region may be reserved. These reservations are irrelevant for
57the next KHO, because kexec can overwrite even the original kernel.
58
59.. _kho-finalization-phase:
60
61KHO finalization phase
62======================
63
64To enable user space based kexec file loader, the kernel needs to be able to
65provide the FDT that describes the current kernel's state before
66performing the actual kexec. The process of generating that FDT is
67called serialization. When the FDT is generated, some properties
68of the system may become immutable because they are already written down
69in the FDT. That state is called the KHO finalization phase.
70
71Public API
72==========
73.. kernel-doc:: kernel/liveupdate/kexec_handover.c
74 :export:
Documentation/core-api/kho/fdt.rst+0−80
@@ -1,80 +0,0 @@
1.. SPDX-License-Identifier: GPL-2.0-or-later
2
3=======
4KHO FDT
5=======
6
7KHO uses the flattened device tree (FDT) container format and libfdt
8library to create and parse the data that is passed between the
9kernels. The properties in KHO FDT are stored in native format.
10It includes the physical address of an in-memory structure describing
11all preserved memory regions, as well as physical addresses of KHO users'
12own FDTs. Interpreting those sub FDTs is the responsibility of KHO users.
13
14KHO nodes and properties
15========================
16
17Property ``preserved-memory-map``
18---------------------------------
19
20KHO saves a special property named ``preserved-memory-map`` under the root node.
21This node contains the physical address of an in-memory structure for KHO to
22preserve memory regions across kexec.
23
24Property ``compatible``
25-----------------------
26
27The ``compatible`` property determines compatibility between the kernel
28that created the KHO FDT and the kernel that attempts to load it.
29If the kernel that loads the KHO FDT is not compatible with it, the entire
30KHO process will be bypassed.
31
32Property ``fdt``
33----------------
34
35Generally, a KHO user serialize its state into its own FDT and instructs
36KHO to preserve the underlying memory, such that after kexec, the new kernel
37can recover its state from the preserved FDT.
38
39A KHO user thus can create a node in KHO root tree and save the physical address
40of its own FDT in that node's property ``fdt`` .
41
42Examples
43========
44
45The following example demonstrates KHO FDT that preserves two memory
46regions created with ``reserve_mem`` kernel command line parameter::
47
48 /dts-v1/;
49
50 / {
51 compatible = "kho-v1";
52
53 preserved-memory-map = <0x40be16 0x1000000>;
54
55 memblock {
56 fdt = <0x1517 0x1000000>;
57 };
58 };
59
60where the ``memblock`` node contains an FDT that is requested by the
61subsystem memblock for preservation. The FDT contains the following
62serialized data::
63
64 /dts-v1/;
65
66 / {
67 compatible = "memblock-v1";
68
69 n1 {
70 compatible = "reserve-mem-v1";
71 start = <0xc06b 0x4000000>;
72 size = <0x04 0x00>;
73 };
74
75 n2 {
76 compatible = "reserve-mem-v1";
77 start = <0xc067 0x4000000>;
78 size = <0x04 0x00>;
79 };
80 };
Documentation/core-api/kho/index.rst+79−3
@@ -1,13 +1,89 @@
1.. SPDX-License-Identifier: GPL-2.0-or-later1.. SPDX-License-Identifier: GPL-2.0-or-later
2 2
3.. _kho-concepts:
4
3========================5========================
4Kexec Handover Subsystem6Kexec Handover Subsystem
5========================7========================
6 8
9Overview
10========
11
12Kexec HandOver (KHO) is a mechanism that allows Linux to preserve memory
13regions, which could contain serialized system states, across kexec.
14
15KHO uses :ref:`flattened device tree (FDT) <kho_fdt>` to pass information about
16the preserved state from pre-exec kernel to post-kexec kernel and :ref:`scratch
17memory regions <kho_scratch>` to ensure integrity of the preserved memory.
18
19.. _kho_fdt:
20
21KHO FDT
22=======
23Every KHO kexec carries a KHO specific flattened device tree (FDT) blob that
24describes the preserved state. The FDT includes properties describing preserved
25memory regions and nodes that hold subsystem specific state.
26
27The preserved memory regions contain either serialized subsystem states, or
28in-memory data that shall not be touched across kexec. After KHO, subsystems
29can retrieve and restore the preserved state from KHO FDT.
30
31Subsystems participating in KHO can define their own format for state
32serialization and preservation.
33
34KHO FDT and structures defined by the subsystems form an ABI between pre-kexec
35and post-kexec kernels. This ABI is defined by header files in
36``include/linux/kho/abi`` directory.
37
7.. toctree::38.. toctree::
8 :maxdepth: 139 :maxdepth: 1
9 40
10 concepts41 abi.rst
11 fdt42
43.. _kho_scratch:
44
45Scratch Regions
46===============
47
48To boot into kexec, we need to have a physically contiguous memory range that
49contains no handed over memory. Kexec then places the target kernel and initrd
50into that region. The new kernel exclusively uses this region for memory
51allocations before during boot up to the initialization of the page allocator.
52
53We guarantee that we always have such regions through the scratch regions: On
54first boot KHO allocates several physically contiguous memory regions. Since
55after kexec these regions will be used by early memory allocations, there is a
56scratch region per NUMA node plus a scratch region to satisfy allocations
57requests that do not require particular NUMA node assignment.
58By default, size of the scratch region is calculated based on amount of memory
59allocated during boot. The ``kho_scratch`` kernel command line option may be
60used to explicitly define size of the scratch regions.
61The scratch regions are declared as CMA when page allocator is initialized so
62that their memory can be used during system lifetime. CMA gives us the
63guarantee that no handover pages land in that region, because handover pages
64must be at a static physical memory location and CMA enforces that only
65movable pages can be located inside.
66
67After KHO kexec, we ignore the ``kho_scratch`` kernel command line option and
68instead reuse the exact same region that was originally allocated. This allows
69us to recursively execute any amount of KHO kexecs. Because we used this region
70for boot memory allocations and as target memory for kexec blobs, some parts
71of that memory region may be reserved. These reservations are irrelevant for
72the next KHO, because kexec can overwrite even the original kernel.
73
74.. _kho-finalization-phase:
75
76KHO finalization phase
77======================
78
79To enable user space based kexec file loader, the kernel needs to be able to
80provide the FDT that describes the current kernel's state before
81performing the actual kexec. The process of generating that FDT is
82called serialization. When the FDT is generated, some properties
83of the system may become immutable because they are already written down
84in the FDT. That state is called the KHO finalization phase.
85
86See Also
87========
12 88
13.. only:: subproject and html89- :doc:`/admin-guide/mm/kho`
Documentation/core-api/kobject.rst+1−1
@@ -78,7 +78,7 @@ just a matter of using the kobj member. Code that works with kobjects will · 77 unmodified lines
78often have the opposite problem, however: given a struct kobject pointer,78often have the opposite problem, however: given a struct kobject pointer,
79what is the pointer to the containing structure? You must avoid tricks79what is the pointer to the containing structure? You must avoid tricks
80(such as assuming that the kobject is at the beginning of the structure)80(such as assuming that the kobject is at the beginning of the structure)
81and, instead, use the container_of() macro, found in ``<linux/kernel.h>``::81and, instead, use the container_of() macro, found in ``<linux/container_of.h>``::
82 82
83 container_of(ptr, type, member)83 container_of(ptr, type, member)
84 84
Documentation/core-api/list.rst+9−0
@@ -774,3 +774,12 @@ Full List API · 773 unmodified lines
774 774
775.. kernel-doc:: include/linux/list.h775.. kernel-doc:: include/linux/list.h
776 :internal:776 :internal:
777
778Private List API
779================
780
781.. kernel-doc:: include/linux/list_private.h
782 :doc: Private List Primitives
783
784.. kernel-doc:: include/linux/list_private.h
785 :internal:
Documentation/core-api/liveupdate.rst+12−1
@@ -18,6 +18,11 @@ LUO Preserving File Descriptors · 17 unmodified lines
18.. kernel-doc:: kernel/liveupdate/luo_file.c18.. kernel-doc:: kernel/liveupdate/luo_file.c
19 :doc: LUO File Descriptors19 :doc: LUO File Descriptors
20 20
21LUO File Lifecycle Bound Global Data
22====================================
23.. kernel-doc:: kernel/liveupdate/luo_flb.c
24 :doc: LUO File Lifecycle Bound Global Data
25
21Live Update Orchestrator ABI26Live Update Orchestrator ABI
22============================27============================
23.. kernel-doc:: include/linux/kho/abi/luo.h28.. kernel-doc:: include/linux/kho/abi/luo.h
@@ -40,6 +45,9 @@ Public API · 16 unmodified lines
40.. kernel-doc:: kernel/liveupdate/luo_core.c45.. kernel-doc:: kernel/liveupdate/luo_core.c
41 :export:46 :export:
42 47
48.. kernel-doc:: kernel/liveupdate/luo_flb.c
49 :export:
50
43.. kernel-doc:: kernel/liveupdate/luo_file.c51.. kernel-doc:: kernel/liveupdate/luo_file.c
44 :export:52 :export:
45 53
@@ -48,6 +56,9 @@ Internal API · 2 unmodified lines
48.. kernel-doc:: kernel/liveupdate/luo_core.c56.. kernel-doc:: kernel/liveupdate/luo_core.c
49 :internal:57 :internal:
50 58
59.. kernel-doc:: kernel/liveupdate/luo_flb.c
60 :internal:
61
51.. kernel-doc:: kernel/liveupdate/luo_session.c62.. kernel-doc:: kernel/liveupdate/luo_session.c
52 :internal:63 :internal:
53 64
@@ -58,4 +69,4 @@ See Also · 4 unmodified lines
58========69========
59 70
60- :doc:`Live Update uAPI </userspace-api/liveupdate>`71- :doc:`Live Update uAPI </userspace-api/liveupdate>`
61- :doc:`/core-api/kho/concepts`72- :doc:`/core-api/kho/index`
Documentation/core-api/mm-api.rst+1−1
@@ -130,5 +130,5 @@ More Memory Management Functions · 129 unmodified lines
130.. kernel-doc:: mm/vmscan.c130.. kernel-doc:: mm/vmscan.c
131.. kernel-doc:: mm/memory_hotplug.c131.. kernel-doc:: mm/memory_hotplug.c
132.. kernel-doc:: mm/mmu_notifier.c132.. kernel-doc:: mm/mmu_notifier.c
133.. kernel-doc:: mm/balloon_compaction.c133.. kernel-doc:: mm/balloon.c
134.. kernel-doc:: mm/huge_memory.c134.. kernel-doc:: mm/huge_memory.c
Documentation/core-api/rbtree.rst+3−3
@@ -197,7 +197,7 @@ Cached rbtrees · 196 unmodified lines
197--------------197--------------
198 198
199Computing the leftmost (smallest) node is quite a common task for binary199Computing the leftmost (smallest) node is quite a common task for binary
200search trees, such as for traversals or users relying on a the particular200search trees, such as for traversals or users relying on the particular
201order for their own logic. To this end, users can use 'struct rb_root_cached'201order for their own logic. To this end, users can use 'struct rb_root_cached'
202to optimize O(logN) rb_first() calls to a simple pointer fetch avoiding202to optimize O(logN) rb_first() calls to a simple pointer fetch avoiding
203potentially expensive tree iterations. This is done at negligible runtime203potentially expensive tree iterations. This is done at negligible runtime
@@ -255,7 +255,7 @@ affected subtrees. · 51 unmodified lines
255 255
256When erasing a node, the user must call rb_erase_augmented() instead of256When erasing a node, the user must call rb_erase_augmented() instead of
257rb_erase(). rb_erase_augmented() calls back into user provided functions257rb_erase(). rb_erase_augmented() calls back into user provided functions
258to updated the augmented information on affected subtrees.258to update the augmented information on affected subtrees.
259 259
260In both cases, the callbacks are provided through struct rb_augment_callbacks.260In both cases, the callbacks are provided through struct rb_augment_callbacks.
2613 callbacks must be defined:2613 callbacks must be defined:
@@ -293,7 +293,7 @@ way making it possible to do efficient lookup and exact match. · 31 unmodified lines
293 293
294This "extra information" stored in each node is the maximum hi294This "extra information" stored in each node is the maximum hi
295(max_hi) value among all the nodes that are its descendants. This295(max_hi) value among all the nodes that are its descendants. This
296information can be maintained at each node just be looking at the node296information can be maintained at each node just by looking at the node
297and its immediate children. And this will be used in O(log n) lookup297and its immediate children. And this will be used in O(log n) lookup
298for lowest match (lowest start address among all possible matches)298for lowest match (lowest start address among all possible matches)
299with something like::299with something like::
Documentation/core-api/real-time/architecture-porting.rst+2−1
@@ -35,7 +35,8 @@ POSIX CPU timers and KVM · 34 unmodified lines
35 POSIX CPU timers must expire from thread context rather than directly within35 POSIX CPU timers must expire from thread context rather than directly within
36 the timer interrupt. This behavior is enabled by setting the configuration36 the timer interrupt. This behavior is enabled by setting the configuration
37 option CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK.37 option CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK.
38 When KVM is enabled, CONFIG_KVM_XFER_TO_GUEST_WORK must also be set to ensure38 When virtualization support, such as KVM, is enabled,
39 CONFIG_VIRT_XFER_TO_GUEST_WORK must also be set to ensure
39 that any pending work, such as POSIX timer expiration, is handled before40 that any pending work, such as POSIX timer expiration, is handled before
40 transitioning into guest mode.41 transitioning into guest mode.
41 42
Documentation/core-api/real-time/hardware.rst+132−0
@@ -0,0 +1,132 @@
1.. SPDX-License-Identifier: GPL-2.0
2
3====================
4Considering hardware
5====================
6
7:Author: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8
9The way a workload is handled can be influenced by the hardware it runs on.
10Key components include the CPU, memory, and the buses that connect them.
11These resources are shared among all applications on the system.
12As a result, heavy utilization of one resource by a single application
13can affect the deterministic handling of workloads in other applications.
14
15Below is a brief overview.
16
17System memory and cache
18-----------------------
19
20Main memory and the associated caches are the most common shared resources among
21tasks in a system. One task can dominate the available caches, forcing another
22task to wait until a cache line is written back to main memory before it can
23proceed. The impact of this contention varies based on write patterns and the
24size of the caches available. Larger caches may reduce stalls because more lines
25can be buffered before being written back. Conversely, certain write patterns
26may trigger the cache controller to flush many lines at once, causing
27applications to stall until the operation completes.
28
29This issue can be partly mitigated if applications do not share the same CPU
30cache. The kernel is aware of the cache topology and exports this information to
31user space. Tools such as **lstopo** from the Portable Hardware Locality (hwloc)
32project (https://www.open-mpi.org/projects/hwloc/) can visualize the hierarchy.
33
34Avoiding shared L2 or L3 caches is not always possible. Even when cache sharing
35is minimized, bottlenecks can still occur when accessing system memory. Memory
36is used not only by the CPU but also by peripheral devices via DMA, such as
37graphics cards or network adapters.
38
39In some cases, cache and memory bottlenecks can be controlled if the hardware
40provides the necessary support. On x86 systems, Intel offers Cache Allocation
41Technology (CAT), which enables cache partitioning among applications and
42provides control over the interconnect. AMD provides similar functionality under
43Platform Quality of Service (PQoS). On Arm64, the equivalent is Memory
44System Resource Partitioning and Monitoring (MPAM).
45
46These features can be configured through the Linux Resource Control interface.
47For details, see Documentation/filesystems/resctrl.rst.
48
49The perf tool can be used to monitor cache behavior. It can analyze
50cache misses of an application and compare how they change under
51different workloads on a neighboring CPU. Even more powerful, the perf
52c2c tool can help identify cache-to-cache issues, where multiple CPU
53cores repeatedly access and modify data on the same cache line.
54
55Hardware buses
56--------------
57
58Real-time systems often need to access hardware directly to perform their work.
59Any latency in this process is undesirable, as it can affect the outcome of the
60task. For example, on an I/O bus, a changed output may not become immediately
61visible but instead appear with variable delay depending on the latency of the
62bus used for communication.
63
64A bus such as PCI is relatively simple because register accesses are routed
65directly to the connected device. In the worst case, a read operation stalls the
66CPU until the device responds.
67
68A bus such as USB is more complex, involving multiple layers. A register read
69or write is wrapped in a USB Request Block (URB), which is then sent by the
70USB host controller to the device. Timing and latency are influenced by the
71underlying USB bus. Requests cannot be sent immediately; they must align with
72the next frame boundary according to the endpoint type and the host controller's
73scheduling rules. This can introduce delays and additional latency. For example,
74a network device connected via USB may still deliver sufficient throughput, but
75the added latency when sending or receiving packets may fail to meet the
76requirements of certain real-time use cases.
77
78Additional restrictions on bus latency can arise from power management. For
79instance, PCIe with Active State Power Management (ASPM) enabled can suspend
80the link between the device and the host. While this behavior is beneficial for
81power savings, it delays device access and adds latency to responses. This issue
82is not limited to PCIe; internal buses within a System-on-Chip (SoC) can also be
83affected by power management mechanisms.
84
85Virtualization
86--------------
87
88In a virtualized environment such as KVM, each guest CPU is represented as a
89thread on the host. If such a thread runs with real-time priority, the system
90should be tested to confirm it can sustain this behavior over extended periods.
91Because of its priority, the thread will not be preempted by lower-priority
92threads (such as SCHED_OTHER), which may then receive no CPU time. This can
93cause problems if a lower-priority thread is pinned to a CPU already occupied by
94a real-time task and unable to make progress. Even if a CPU has been isolated,
95the system may still (accidentally) start a per‑CPU thread on that CPU.
96Ensuring that a guest CPU goes idle is difficult, as it requires avoiding both
97task scheduling and interrupt handling. Furthermore, if the guest CPU does go
98idle but the guest system is booted with the option **idle=poll**, the guest
99CPU will never enter an idle state and will instead spin until an event
100arrives.
101
102Device handling introduces additional considerations. Emulated PCI devices or
103VirtIO devices require a counterpart on the host to complete requests. This
104adds latency because the host must intercept and either process the request
105directly or schedule a thread for its completion. These delays can be avoided if
106the required PCI device is passed directly through to the guest. Some devices,
107such as networking or storage controllers, support the PCIe SR-IOV feature.
108SR-IOV allows a single PCIe device to be divided into multiple virtual functions,
109which can then be assigned to different guests.
110
111Networking
112----------
113
114For low-latency networking, the full networking stack may be undesirable, as it
115can introduce additional sources of delay. In this context, XDP can be used
116as a shortcut to bypass much of the stack while still relying on the kernel's
117network driver.
118
119The requirements are that the network driver must support XDP- preferably using
120an "skb pool" and that the application must use an XDP socket. Additional
121configuration may involve BPF filters, tuning networking queues, or configuring
122qdiscs for time-based transmission. These techniques are often
123applied in Time-Sensitive Networking (TSN) environments.
124
125Documenting all required steps exceeds the scope of this text. For detailed
126guidance, see the TSN documentation at https://tsn.readthedocs.io.
127
128Another useful resource is the Linux Real-Time Communication Testbench
129https://github.com/Linutronix/RTC-Testbench.
130The goal of this project is to validate real-time network communication. It can
131be thought of as a "cyclictest" for networking and also serves as a starting
132point for application development.
Documentation/core-api/real-time/index.rst+1−0
@@ -13,4 +13,5 @@ the required changes compared to a non-PREEMPT_RT configuration. · 12 unmodified lines
13 13
14 theory14 theory
15 differences15 differences
16 hardware
16 architecture-porting17 architecture-porting
Documentation/dev-tools/checkpatch.rst+6−1
@@ -601,6 +601,11 @@ Commit message · 600 unmodified lines
601 601
602 See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes602 See: https://www.kernel.org/doc/html/latest/process/submitting-patches.html#describe-your-changes
603 603
604 **BAD_COMMIT_SEPARATOR**
605 The commit separator is a single line with 3 dashes.
606 The regex match is '^---$'
607 Lines that start with 3 dashes and have more content on the same line
608 may confuse tools that apply patches.
604 609
605Comparison style610Comparison style
606----------------611----------------
@@ -753,7 +758,7 @@ Macros, Attributes and Symbols · 146 unmodified lines
753 sizeof(foo)/sizeof(foo[0]) for finding number of elements in an758 sizeof(foo)/sizeof(foo[0]) for finding number of elements in an
754 array.759 array.
755 760
756 The macro is defined in include/linux/kernel.h::761 The macro is defined in include/linux/array_size.h::
757 762
758 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))763 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
759 764
Documentation/dev-tools/clang-format.rst+1−1
@@ -88,7 +88,7 @@ Reformatting blocks of code · 87 unmodified lines
88 88
89By using an integration with your text editor, you can reformat arbitrary89By using an integration with your text editor, you can reformat arbitrary
90blocks (selections) of code with a single keystroke. This is specially90blocks (selections) of code with a single keystroke. This is specially
91useful when moving code around, for complex code that is deeply intended,91useful when moving code around, for complex code that is deeply indented,
92for multi-line macros (and aligning their backslashes), etc.92for multi-line macros (and aligning their backslashes), etc.
93 93
94Remember that you can always tweak the changes afterwards in those cases94Remember that you can always tweak the changes afterwards in those cases
Documentation/dev-tools/coccinelle.rst+16−5
@@ -127,6 +127,18 @@ To enable verbose messages set the V= variable, for example:: · 126 unmodified lines
127 127
128 make coccicheck MODE=report V=1128 make coccicheck MODE=report V=1
129 129
130By default, coccicheck will print debug logs to stdout and redirect stderr to
131/dev/null. This can make coccicheck output difficult to read and understand.
132Debug and error messages can instead be written to a debug file instead by
133setting the ``DEBUG_FILE`` variable::
134
135 make coccicheck MODE=report DEBUG_FILE="cocci.log"
136
137Coccinelle cannot overwrite a debug file. Instead of repeatedly deleting a log
138file, you could include the datetime in the debug file name::
139
140 make coccicheck MODE=report DEBUG_FILE="cocci-$(date -Iseconds).log"
141
130Coccinelle parallelization142Coccinelle parallelization
131--------------------------143--------------------------
132 144
@@ -208,11 +220,10 @@ include options matching the options used when we compile the kernel. · 75 unmodified lines
208You can learn what these options are by using V=1; you could then220You can learn what these options are by using V=1; you could then
209manually run Coccinelle with debug options added.221manually run Coccinelle with debug options added.
210 222
211Alternatively you can debug running Coccinelle against SmPL patches223An easier approach to debug running Coccinelle against SmPL patches is to ask
212by asking for stderr to be redirected to stderr. By default stderr224coccicheck to redirect stderr to a debug file. As mentioned in the examples, by
213is redirected to /dev/null; if you'd like to capture stderr you225default stderr is redirected to /dev/null; if you'd like to capture stderr you
214can specify the ``DEBUG_FILE="file.txt"`` option to coccicheck. For226can specify the ``DEBUG_FILE="file.txt"`` option to coccicheck. For instance::
215instance::
216 227
217 rm -f cocci.err228 rm -f cocci.err
218 make coccicheck COCCI=scripts/coccinelle/free/kfree.cocci MODE=report DEBUG_FILE=cocci.err229 make coccicheck COCCI=scripts/coccinelle/free/kfree.cocci MODE=report DEBUG_FILE=cocci.err
Documentation/dev-tools/container.rst+227−0
@@ -0,0 +1,227 @@
1.. SPDX-License-Identifier: GPL-2.0-only
2.. Copyright (C) 2025 Guillaume Tucker
3
4====================
5Containerized Builds
6====================
7
8The ``container`` tool can be used to run any command in the kernel source tree
9from within a container. Doing so facilitates reproducing builds across
10various platforms, for example when a test bot has reported an issue which
11requires a specific version of a compiler or an external test suite. While
12this can already be done by users who are familiar with containers, having a
13dedicated tool in the kernel tree lowers the barrier to entry by solving common
14problems once and for all (e.g. user id management). It also makes it easier
15to share an exact command line leading to a particular result. The main use
16case is likely to be kernel builds but virtually anything can be run: KUnit,
17checkpatch etc. provided a suitable image is available.
18
19
20Options
21=======
22
23Command line syntax::
24
25 scripts/container -i IMAGE [OPTION]... CMD...
26
27Available options:
28
29``-e, --env-file ENV_FILE``
30
31 Path to an environment file to load in the container.
32
33``-g, --gid GID``
34
35 Group id to use inside the container.
36
37``-i, --image IMAGE``
38
39 Container image name (required).
40
41``-r, --runtime RUNTIME``
42
43 Container runtime name. Supported runtimes: ``docker``, ``podman``.
44
45 If not specified, the first one found on the system will be used
46 i.e. Podman if present, otherwise Docker.
47
48``-s, --shell``
49
50 Run the container in an interactive shell.
51
52``-u, --uid UID``
53
54 User id to use inside the container.
55
56 If the ``-g`` option is not specified, the user id will also be used for
57 the group id.
58
59``-v, --verbose``
60
61 Enable verbose output.
62
63``-h, --help``
64
65 Show the help message and exit.
66
67
68Usage
69=====
70
71It's entirely up to the user to choose which image to use and the ``CMD``
72arguments are passed directly as an arbitrary command line to run in the
73container. The tool will take care of mounting the source tree as the current
74working directory and adjust the user and group id as needed.
75
76The container image which would typically include a compiler toolchain is
77provided by the user and selected via the ``-i`` option. The container runtime
78can be selected with the ``-r`` option, which can be either ``docker`` or
79``podman``. If none is specified, the first one found on the system will be
80used while giving priority to Podman. Support for other runtimes may be added
81later depending on their popularity among users.
82
83By default, commands are run non-interactively. The user can abort a running
84container with SIGINT (Ctrl-C). To run commands interactively with a TTY, the
85``--shell`` or ``-s`` option can be used. Signals will then be received by the
86shell directly rather than the parent ``container`` process. To exit an
87interactive shell, use Ctrl-D or ``exit``.
88
89.. note::
90
91 The only host requirement aside from a container runtime is Python 3.10 or
92 later.
93
94.. note::
95
96 Out-of-tree builds are not fully supported yet. The ``O=`` option can
97 however already be used with a relative path inside the source tree to keep
98 separate build outputs. A workaround to build outside the tree is to use
99 ``mount --bind``, see the examples section further down.
100
101
102Environment Variables
103=====================
104
105Environment variables are not propagated to the container so they have to be
106either defined in the image itself or via the ``-e`` option using an
107environment file. In some cases it makes more sense to have them defined in
108the Containerfile used to create the image. For example, a Clang-only compiler
109toolchain image may have ``LLVM=1`` defined.
110
111The local environment file is more useful for user-specific variables added
112during development. It is passed as-is to the container runtime so its format
113may vary. Typically, it will look like the output of ``env``. For example::
114
115 INSTALL_MOD_STRIP=1
116 SOME_RANDOM_TEXT=One upon a time
117
118Please also note that ``make`` options can still be passed on the command line,
119so while this can't be done since the first argument needs to be the
120executable::
121
122 scripts/container -i docker.io/tuxmake/korg-clang LLVM=1 make # won't work
123
124this will work::
125
126 scripts/container -i docker.io/tuxmake/korg-clang make LLVM=1
127
128
129User IDs
130========
131
132This is an area where the behaviour will vary slightly depending on the
133container runtime. The goal is to run commands as the user invoking the tool.
134With Podman, a namespace is created to map the current user id to a different
135one in the container (1000 by default). With Docker, while this is also
136possible with recent versions it requires a special feature to be enabled in
137the daemon so it's not used here for simplicity. Instead, the container is run
138with the current user id directly. In both cases, this will provide the same
139file permissions for the kernel source tree mounted as a volume. The only
140difference is that when using Docker without a namespace, the user id may not
141be the same as the default one set in the image.
142
143Say, we're using an image which sets up a default user with id 1000 and the
144current user calling the ``container`` tool has id 1234. The kernel source
145tree was checked out by this same user so the files belong to user 1234. With
146Podman, the container will be running as user id 1000 with a mapping to id 1234
147so that the files from the mounted volume appear to belong to id 1000 inside
148the container. With Docker and no namespace, the container will be running
149with user id 1234 which can access the files in the volume but not in the user
1501000 home directory. This shouldn't be an issue when running commands only in
151the kernel tree but it is worth highlighting here as it might matter for
152special corner cases.
153
154.. note::
155
156 Podman's `Docker compatibility
157 <https://podman-desktop.io/docs/migrating-from-docker/managing-docker-compatibility>`__
158 mode to run ``docker`` commands on top of a Podman backend is more complex
159 and not fully supported yet. As such, Podman will take priority if both
160 runtimes are available on the system.
161
162
163Examples
164========
165
166The TuxMake project provides a variety of prebuilt container images available
167on `Docker Hub <https://hub.docker.com/u/tuxmake>`__. Here's the shortest
168example to build a kernel using a TuxMake Clang image::
169
170 scripts/container -i docker.io/tuxmake/korg-clang -- make LLVM=1 defconfig
171 scripts/container -i docker.io/tuxmake/korg-clang -- make LLVM=1 -j$(nproc)
172
173.. note::
174
175 When running a command with options within the container, it should be
176 separated with a double dash ``--`` to not confuse them with the
177 ``container`` tool options. Plain commands with no options don't strictly
178 require the double dashes e.g.::
179
180 scripts/container -i docker.io/tuxmake/korg-clang make mrproper
181
182To run ``checkpatch.pl`` in a ``patches`` directory with a generic Perl image::
183
184 scripts/container -i perl:slim-trixie scripts/checkpatch.pl patches/*
185
186As an alternative to the TuxMake images, the examples below refer to
187``kernel.org`` images which are based on the `kernel.org compiler toolchains
188<https://mirrors.edge.kernel.org/pub/tools/>`__. These aren't (yet) officially
189available in any public registry but users can build their own locally instead
190using this `experimental repository
191<https://gitlab.com/gtucker/korg-containers>`__ by running ``make
192PREFIX=kernel.org/``.
193
194To build just ``bzImage`` using Clang::
195
196 scripts/container -i kernel.org/clang -- make bzImage -j$(nproc)
197
198Same with GCC 15 as a particular version tag::
199
200 scripts/container -i kernel.org/gcc:15 -- make bzImage -j$(nproc)
201
202For an out-of-tree build, a trick is to bind-mount the destination directory to
203a relative path inside the source tree::
204
205 mkdir -p $HOME/tmp/my-kernel-build
206 mkdir -p build
207 sudo mount --bind $HOME/tmp/my-kernel-build build
208 scripts/container -i kernel.org/gcc -- make mrproper
209 scripts/container -i kernel.org/gcc -- make O=build defconfig
210 scripts/container -i kernel.org/gcc -- make O=build -j$(nproc)
211
212To run KUnit in an interactive shell and get the full output::
213
214 scripts/container -s -i kernel.org/gcc:kunit -- \
215 tools/testing/kunit/kunit.py \
216 run \
217 --arch=x86_64 \
218 --cross_compile=x86_64-linux-
219
220To just start an interactive shell::
221
222 scripts/container -si kernel.org/gcc bash
223
224To build the HTML documentation, which requires the ``kdocs`` image built with
225``make PREFIX=kernel.org/ extra`` as it's not a compiler toolchain::
226
227 scripts/container -i kernel.org/kdocs make htmldocs
Documentation/dev-tools/context-analysis.rst+169−0
@@ -0,0 +1,169 @@
1.. SPDX-License-Identifier: GPL-2.0
2.. Copyright (C) 2025, Google LLC.
3
4.. _context-analysis:
5
6Compiler-Based Context Analysis
7===============================
8
9Context Analysis is a language extension, which enables statically checking
10that required contexts are active (or inactive) by acquiring and releasing
11user-definable "context locks". An obvious application is lock-safety checking
12for the kernel's various synchronization primitives (each of which represents a
13"context lock"), and checking that locking rules are not violated.
14
15The Clang compiler currently supports the full set of context analysis
16features. To enable for Clang, configure the kernel with::
17
18 CONFIG_WARN_CONTEXT_ANALYSIS=y
19
20The feature requires Clang 22 or later.
21
22The analysis is *opt-in by default*, and requires declaring which modules and
23subsystems should be analyzed in the respective `Makefile`::
24
25 CONTEXT_ANALYSIS_mymodule.o := y
26
27Or for all translation units in the directory::
28
29 CONTEXT_ANALYSIS := y
30
31It is possible to enable the analysis tree-wide, however, which will result in
32numerous false positive warnings currently and is *not* generally recommended::
33
34 CONFIG_WARN_CONTEXT_ANALYSIS_ALL=y
35
36Programming Model
37-----------------
38
39The below describes the programming model around using context lock types.
40
41.. note::
42 Enabling context analysis can be seen as enabling a dialect of Linux C with
43 a Context System. Some valid patterns involving complex control-flow are
44 constrained (such as conditional acquisition and later conditional release
45 in the same function).
46
47Context analysis is a way to specify permissibility of operations to depend on
48context locks being held (or not held). Typically we are interested in
49protecting data and code in a critical section by requiring a specific context
50to be active, for example by holding a specific lock. The analysis ensures that
51callers cannot perform an operation without the required context being active.
52
53Context locks are associated with named structs, along with functions that
54operate on struct instances to acquire and release the associated context lock.
55
56Context locks can be held either exclusively or shared. This mechanism allows
57assigning more precise privileges when a context is active, typically to
58distinguish where a thread may only read (shared) or also write (exclusive) to
59data guarded within a context.
60
61The set of contexts that are actually active in a given thread at a given point
62in program execution is a run-time concept. The static analysis works by
63calculating an approximation of that set, called the context environment. The
64context environment is calculated for every program point, and describes the
65set of contexts that are statically known to be active, or inactive, at that
66particular point. This environment is a conservative approximation of the full
67set of contexts that will actually be active in a thread at run-time.
68
69More details are also documented `here
70<https://clang.llvm.org/docs/ThreadSafetyAnalysis.html>`_.
71
72.. note::
73 Clang's analysis explicitly does not infer context locks acquired or
74 released by inline functions. It requires explicit annotations to (a) assert
75 that it's not a bug if a context lock is released or acquired, and (b) to
76 retain consistency between inline and non-inline function declarations.
77
78Supported Kernel Primitives
79~~~~~~~~~~~~~~~~~~~~~~~~~~~
80
81Currently the following synchronization primitives are supported:
82`raw_spinlock_t`, `spinlock_t`, `rwlock_t`, `mutex`, `seqlock_t`,
83`bit_spinlock`, RCU, SRCU (`srcu_struct`), `rw_semaphore`, `local_lock_t`,
84`ww_mutex`.
85
86To initialize variables guarded by a context lock with an initialization
87function (``type_init(&lock)``), prefer using ``guard(type_init)(&lock)`` or
88``scoped_guard(type_init, &lock) { ... }`` to initialize such guarded members
89or globals in the enclosing scope. This initializes the context lock and treats
90the context as active within the initialization scope (initialization implies
91exclusive access to the underlying object).
92
93For example::
94
95 struct my_data {
96 spinlock_t lock;
97 int counter __guarded_by(&lock);
98 };
99
100 void init_my_data(struct my_data *d)
101 {
102 ...
103 guard(spinlock_init)(&d->lock);
104 d->counter = 0;
105 ...
106 }
107
108Alternatively, initializing guarded variables can be done with context analysis
109disabled, preferably in the smallest possible scope (due to lack of any other
110checking): either with a ``context_unsafe(var = init)`` expression, or by
111marking small initialization functions with the ``__context_unsafe(init)``
112attribute.
113
114Lockdep assertions, such as `lockdep_assert_held()`, inform the compiler's
115context analysis that the associated synchronization primitive is held after
116the assertion. This avoids false positives in complex control-flow scenarios
117and encourages the use of Lockdep where static analysis is limited. For
118example, this is useful when a function doesn't *always* require a lock, making
119`__must_hold()` inappropriate.
120
121Keywords
122~~~~~~~~
123
124.. kernel-doc:: include/linux/compiler-context-analysis.h
125 :identifiers: context_lock_struct
126 token_context_lock token_context_lock_instance
127 __guarded_by __pt_guarded_by
128 __must_hold
129 __must_not_hold
130 __acquires
131 __cond_acquires
132 __releases
133 __must_hold_shared
134 __acquires_shared
135 __cond_acquires_shared
136 __releases_shared
137 __acquire
138 __release
139 __acquire_shared
140 __release_shared
141 __acquire_ret
142 __acquire_shared_ret
143 context_unsafe
144 __context_unsafe
145 disable_context_analysis enable_context_analysis
146
147.. note::
148 The function attribute `__no_context_analysis` is reserved for internal
149 implementation of context lock types, and should be avoided in normal code.
150
151Background
152----------
153
154Clang originally called the feature `Thread Safety Analysis
155<https://clang.llvm.org/docs/ThreadSafetyAnalysis.html>`_, with some keywords
156and documentation still using the thread-safety-analysis-only terminology. This
157was later changed and the feature became more flexible, gaining the ability to
158define custom "capabilities". Its foundations can be found in `Capability
159Systems <https://www.cs.cornell.edu/talc/papers/capabilities.pdf>`_, used to
160specify the permissibility of operations to depend on some "capability" being
161held (or not held).
162
163Because the feature is not just able to express capabilities related to
164synchronization primitives, and "capability" is already overloaded in the
165kernel, the naming chosen for the kernel departs from Clang's initial "Thread
166Safety" and "capability" nomenclature; we refer to the feature as "Context
167Analysis" to avoid confusion. The internal implementation still makes
168references to Clang's terminology in a few places, such as `-Wthread-safety`
169being the warning option that also still appears in diagnostic messages.
Documentation/dev-tools/index.rst+2−8
@@ -21,6 +21,7 @@ Documentation/process/debugging/index.rst · 20 unmodified lines
21 checkpatch21 checkpatch
22 clang-format22 clang-format
23 coccinelle23 coccinelle
24 context-analysis
24 sparse25 sparse
25 kcov26 kcov
26 gcov27 gcov
@@ -38,11 +39,4 @@ Documentation/process/debugging/index.rst · 11 unmodified lines
38 gpio-sloppy-logic-analyzer39 gpio-sloppy-logic-analyzer
39 autofdo40 autofdo
40 propeller41 propeller
41 42 container
42
43.. only:: subproject and html
44
45 Indices
46 =======
47
48 * :ref:`genindex`
Documentation/dev-tools/kunit/run_wrapper.rst+9−0
@@ -335,3 +335,12 @@ command line arguments: · 334 unmodified lines
335 335
336- ``--list_tests_attr``: If set, lists all tests that will be run and all of their336- ``--list_tests_attr``: If set, lists all tests that will be run and all of their
337 attributes.337 attributes.
338
339Command-line completion
340==============================
341
342The kunit_tool comes with a bash completion script:
343
344.. code-block:: bash
345
346 source tools/testing/kunit/kunit-completion.sh
Documentation/dev-tools/sparse.rst+0−19
@@ -53,25 +53,6 @@ sure that bitwise types don't get mixed up (little-endian vs big-endian · 52 unmodified lines
53vs cpu-endian vs whatever), and there the constant "0" really _is_53vs cpu-endian vs whatever), and there the constant "0" really _is_
54special.54special.
55 55
56Using sparse for lock checking
57------------------------------
58
59The following macros are undefined for gcc and defined during a sparse
60run to use the "context" tracking feature of sparse, applied to
61locking. These annotations tell sparse when a lock is held, with
62regard to the annotated function's entry and exit.
63
64__must_hold - The specified lock is held on function entry and exit.
65
66__acquires - The specified lock is held on function exit, but not entry.
67
68__releases - The specified lock is held on function entry, but not exit.
69
70If the function enters and exits without the lock held, acquiring and
71releasing the lock inside the function in a balanced way, no
72annotation is needed. The three annotations above are for cases where
73sparse would otherwise report a context imbalance.
74
75Getting sparse56Getting sparse
76--------------57--------------
77 58
Documentation/devicetree/bindings/Makefile+4−2
@@ -56,7 +56,6 @@ DT_DOCS = $(patsubst $(srctree)/%,%,$(shell $(find_all_cmd))) · 55 unmodified lines
56 56
57override DTC_FLAGS := \57override DTC_FLAGS := \
58 -Wno-avoid_unnecessary_addr_size \58 -Wno-avoid_unnecessary_addr_size \
59 -Wno-graph_child_address \
60 -Wno-unique_unit_address \59 -Wno-unique_unit_address \
61 -Wunique_unit_address_if_enabled60 -Wunique_unit_address_if_enabled
62 61
@@ -82,5 +81,8 @@ clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \ · 19 unmodified lines
82dt_compatible_check: $(obj)/processed-schema.json81dt_compatible_check: $(obj)/processed-schema.json
83 $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<82 $(Q)$(srctree)/scripts/dtc/dt-extract-compatibles $(srctree) | xargs dt-check-compatible -v -s $<
84 83
84PHONY += dt_binding_check_one
85dt_binding_check_one: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked
86
85PHONY += dt_binding_check87PHONY += dt_binding_check
86dt_binding_check: $(obj)/.dt-binding.checked $(obj)/.yamllint.checked $(CHK_DT_EXAMPLES)88dt_binding_check: dt_binding_check_one $(CHK_DT_EXAMPLES)
Documentation/devicetree/bindings/arm/altera.yaml+27−0
@@ -9,6 +9,9 @@ title: Altera's SoCFPGA platform · 8 unmodified lines
9maintainers:9maintainers:
10 - Dinh Nguyen <dinguyen@kernel.org>10 - Dinh Nguyen <dinguyen@kernel.org>
11 11
12description:
13 Altera/Intel boards with ARM 32/64 bits cores
14
12properties:15properties:
13 $nodename:16 $nodename:
14 const: "/"17 const: "/"
@@ -81,6 +84,30 @@ properties: · 66 unmodified lines
81 - altr,socfpga-stratix10-swvp84 - altr,socfpga-stratix10-swvp
82 - const: altr,socfpga-stratix1085 - const: altr,socfpga-stratix10
83 86
87 - description: AgileX boards
88 items:
89 - enum:
90 - intel,n5x-socdk
91 - intel,socfpga-agilex-n6000
92 - intel,socfpga-agilex-socdk
93 - intel,socfpga-agilex-socdk-emmc
94 - const: intel,socfpga-agilex
95
96 - description: Agilex3 boards
97 items:
98 - enum:
99 - intel,socfpga-agilex3-socdk
100 - const: intel,socfpga-agilex3
101 - const: intel,socfpga-agilex5
102
103 - description: Agilex5 boards
104 items:
105 - enum:
106 - intel,socfpga-agilex5-socdk
107 - intel,socfpga-agilex5-socdk-013b
108 - intel,socfpga-agilex5-socdk-nand
109 - const: intel,socfpga-agilex5
110
84 - description: SoCFPGA VT111 - description: SoCFPGA VT
85 items:112 items:
86 - const: altr,socfpga-vt113 - const: altr,socfpga-vt
Documentation/devicetree/bindings/arm/amlogic.yaml+8−0
@@ -245,6 +245,14 @@ properties: · 244 unmodified lines
245 items:245 items:
246 - enum:246 - enum:
247 - amlogic,aq222247 - amlogic,aq222
248 - const: amlogic,s805x2
249 - const: amlogic,s4
250
251 - description: Boards with the Amlogic Meson S4 S905Y4 SoC
252 items:
253 - enum:
254 - khadas,vim1s
255 - const: amlogic,s905y4
248 - const: amlogic,s4256 - const: amlogic,s4
249 257
250 - description: Boards with the Amlogic S6 S905X5 SoC258 - description: Boards with the Amlogic S6 S905X5 SoC
Documentation/devicetree/bindings/arm/arm,coresight-dummy-sink.yaml+1−1
@@ -31,7 +31,7 @@ maintainers: · 30 unmodified lines
31 - Mike Leach <mike.leach@linaro.org>31 - Mike Leach <mike.leach@linaro.org>
32 - Suzuki K Poulose <suzuki.poulose@arm.com>32 - Suzuki K Poulose <suzuki.poulose@arm.com>
33 - James Clark <james.clark@linaro.org>33 - James Clark <james.clark@linaro.org>
34 - Mao Jinlong <quic_jinlmao@quicinc.com>34 - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
35 - Hao Zhang <quic_hazha@quicinc.com>35 - Hao Zhang <quic_hazha@quicinc.com>
36 36
37properties:37properties:
Documentation/devicetree/bindings/arm/arm,coresight-dummy-source.yaml+1−1
@@ -30,7 +30,7 @@ maintainers: · 29 unmodified lines
30 - Mike Leach <mike.leach@linaro.org>30 - Mike Leach <mike.leach@linaro.org>
31 - Suzuki K Poulose <suzuki.poulose@arm.com>31 - Suzuki K Poulose <suzuki.poulose@arm.com>
32 - James Clark <james.clark@linaro.org>32 - James Clark <james.clark@linaro.org>
33 - Mao Jinlong <quic_jinlmao@quicinc.com>33 - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
34 - Hao Zhang <quic_hazha@quicinc.com>34 - Hao Zhang <quic_hazha@quicinc.com>
35 35
36properties:36properties:
Documentation/devicetree/bindings/arm/arm,vexpress-juno.yaml+6−0
@@ -157,6 +157,12 @@ patternProperties: · 156 unmodified lines
157 - const: simple-bus157 - const: simple-bus
158 - const: simple-bus158 - const: simple-bus
159 159
160 "#interrupt-cells":
161 const: 1
162
163 interrupt-map: true
164 interrupt-map-mask: true
165
160 patternProperties:166 patternProperties:
161 '^motherboard-bus@':167 '^motherboard-bus@':
162 type: object168 type: object
Documentation/devicetree/bindings/arm/aspeed/aspeed.yaml+3−0
@@ -34,6 +34,7 @@ properties: · 33 unmodified lines
34 - amd,ethanolx-bmc34 - amd,ethanolx-bmc
35 - ampere,mtjade-bmc35 - ampere,mtjade-bmc
36 - aspeed,ast2500-evb36 - aspeed,ast2500-evb
37 - asrock,altrad8-bmc
37 - asrock,e3c246d4i-bmc38 - asrock,e3c246d4i-bmc
38 - asrock,e3c256d4i-bmc39 - asrock,e3c256d4i-bmc
39 - asrock,romed8hm3-bmc40 - asrock,romed8hm3-bmc
@@ -80,6 +81,7 @@ properties: · 40 unmodified lines
80 - aspeed,ast2600-evb81 - aspeed,ast2600-evb
81 - aspeed,ast2600-evb-a182 - aspeed,ast2600-evb-a1
82 - asus,x4tf-bmc83 - asus,x4tf-bmc
84 - facebook,anacapa-bmc
83 - facebook,bletchley-bmc85 - facebook,bletchley-bmc
84 - facebook,catalina-bmc86 - facebook,catalina-bmc
85 - facebook,clemente-bmc87 - facebook,clemente-bmc
@@ -107,6 +109,7 @@ properties: · 21 unmodified lines
107 - inventec,transformer-bmc109 - inventec,transformer-bmc
108 - jabil,rbp-bmc110 - jabil,rbp-bmc
109 - nvidia,gb200nvl-bmc111 - nvidia,gb200nvl-bmc
112 - nvidia,msx4-bmc
110 - qcom,dc-scm-v1-bmc113 - qcom,dc-scm-v1-bmc
111 - quanta,s6q-bmc114 - quanta,s6q-bmc
112 - ufispace,ncplite-bmc115 - ufispace,ncplite-bmc
Documentation/devicetree/bindings/arm/atmel-at91.yaml+4−2
@@ -235,9 +235,11 @@ properties: · 234 unmodified lines
235 - const: microchip,lan9662235 - const: microchip,lan9662
236 - const: microchip,lan966236 - const: microchip,lan966
237 237
238 - description: Microchip LAN9668 PCB8290 Evaluation Board.238 - description: Microchip LAN9668 Evaluation Board.
239 items:239 items:
240 - const: microchip,lan9668-pcb8290240 - enum:
241 - microchip,lan9668-pcb8290
242 - microchip,lan9668-pcb8385
241 - const: microchip,lan9668243 - const: microchip,lan9668
242 - const: microchip,lan966244 - const: microchip,lan966
243 245
Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml+0−24
@@ -1,24 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/bcm/brcm,vulcan-soc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom Vulcan
8
9maintainers:
10 - Robert Richter <rrichter@marvell.com>
11
12properties:
13 $nodename:
14 const: '/'
15 compatible:
16 items:
17 - enum:
18 - brcm,vulcan-eval
19 - cavium,thunderx2-cn9900
20 - const: brcm,vulcan-soc
21
22additionalProperties: true
23
24...
Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml+8−0
@@ -65,6 +65,11 @@ properties: · 64 unmodified lines
65 gpio-line-names:65 gpio-line-names:
66 minItems: 866 minItems: 8
67 67
68 patternProperties:
69 '-hog$':
70 required:
71 - gpio-hog
72
68 required:73 required:
69 - compatible74 - compatible
70 - gpio-controller75 - gpio-controller
@@ -87,6 +92,9 @@ properties: · 16 unmodified lines
87 - compatible92 - compatible
88 - "#reset-cells"93 - "#reset-cells"
89 94
95 power:
96 $ref: /schemas/power/raspberrypi,bcm2835-power.yaml#
97
90 pwm:98 pwm:
91 type: object99 type: object
92 additionalProperties: false100 additionalProperties: false
Documentation/devicetree/bindings/arm/cix.yaml+4−2
@@ -16,9 +16,11 @@ properties: · 15 unmodified lines
16 compatible:16 compatible:
17 oneOf:17 oneOf:
18 18
19 - description: Radxa Orion O619 - description: Sky1 based boards
20 items:20 items:
21 - const: radxa,orion-o621 - enum:
22 - radxa,orion-o6 # Radxa Orion O6 board
23 - xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board
22 - const: cix,sky124 - const: cix,sky1
23 25
24additionalProperties: true26additionalProperties: true
Documentation/devicetree/bindings/arm/fsl.yaml+32−2
@@ -1071,6 +1071,15 @@ properties: · 1070 unmodified lines
1071 - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board1071 - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board
1072 - const: fsl,imx8mn1072 - const: fsl,imx8mn
1073 1073
1074 - description: ifm i.MX8MN VHIP4 based boards
1075 items:
1076 - enum:
1077 - ifm,imx8mn-vhip4-evalboard-v1
1078 - ifm,imx8mn-vhip4-evalboard-v2
1079 - const: ifm,imx8mn-vhip4-evalboard
1080 - const: ifm,imx8mn-vhip4
1081 - const: fsl,imx8mn
1082
1074 - description: Variscite VAR-SOM-MX8MN based boards1083 - description: Variscite VAR-SOM-MX8MN based boards
1075 items:1084 items:
1076 - enum:1085 - enum:
@@ -1099,6 +1108,7 @@ properties: · 22 unmodified lines
1099 - emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit1108 - emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit
1100 - fsl,imx8mp-evk # i.MX8MP EVK Board1109 - fsl,imx8mp-evk # i.MX8MP EVK Board
1101 - fsl,imx8mp-evk-revb4 # i.MX8MP EVK Rev B4 Board1110 - fsl,imx8mp-evk-revb4 # i.MX8MP EVK Rev B4 Board
1111 - fsl,imx8mp-frdm # i.MX8MP Freedom Board
1102 - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board1112 - gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board
1103 - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board1113 - gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
1104 - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board1114 - gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
@@ -1340,7 +1350,7 @@ properties: · 235 unmodified lines
1340 - const: toradex,apalis-imx81350 - const: toradex,apalis-imx8
1341 - const: fsl,imx8qm1351 - const: fsl,imx8qm
1342 1352
1343 - description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules1353 - description: i.MX8QM/i.MX8QP Boards with Toradex Apalis iMX8 V1.1 Modules
1344 items:1354 items:
1345 - enum:1355 - enum:
1346 - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. V1.0/V1.1 Board1356 - toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. V1.0/V1.1 Board
@@ -1348,7 +1358,9 @@ properties: · 1 unmodified line
1348 - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board1358 - toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board
1349 - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board1359 - toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board
1350 - const: toradex,apalis-imx8-v1.11360 - const: toradex,apalis-imx8-v1.1
1351 - const: fsl,imx8qm1361 - enum:
1362 - fsl,imx8qm
1363 - fsl,imx8qp
1352 1364
1353 - description: i.MX8QXP based Boards1365 - description: i.MX8QXP based Boards
1354 items:1366 items:
@@ -1419,6 +1431,7 @@ properties: · 64 unmodified lines
1419 items:1431 items:
1420 - enum:1432 - enum:
1421 - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board1433 - fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board
1434 - fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board
1422 - const: fsl,imx911435 - const: fsl,imx91
1423 1436
1424 - description: i.MX93 based Boards1437 - description: i.MX93 based Boards
@@ -1426,6 +1439,7 @@ properties: · 1 unmodified line
1426 - enum:1439 - enum:
1427 - fsl,imx93-9x9-qsb # i.MX93 9x9 QSB Board1440 - fsl,imx93-9x9-qsb # i.MX93 9x9 QSB Board
1428 - fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board1441 - fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board
1442 - fsl,imx93-11x11-frdm # i.MX93 11x11 FRDM Board
1429 - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board1443 - fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board
1430 - const: fsl,imx931444 - const: fsl,imx93
1431 1445
@@ -1439,10 +1453,17 @@ properties: · 7 unmodified lines
1439 items:1453 items:
1440 - enum:1454 - enum:
1441 - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board1455 - fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board
1456 - fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board
1442 - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board1457 - fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board
1443 - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)1458 - toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)
1444 - const: fsl,imx951459 - const: fsl,imx95
1445 1460
1461 - description: i.MX952 based Boards
1462 items:
1463 - enum:
1464 - fsl,imx952-evk # i.MX952 EVK Board
1465 - const: fsl,imx952
1466
1446 - description: PHYTEC i.MX 95 FPSC based Boards1467 - description: PHYTEC i.MX 95 FPSC based Boards
1447 items:1468 items:
1448 - enum:1469 - enum:
@@ -1679,6 +1700,15 @@ properties: · 230 unmodified lines
1679 - const: kontron,sl281700 - const: kontron,sl28
1680 - const: fsl,ls1028a1701 - const: fsl,ls1028a
1681 1702
1703 - description:
1704 TQ-Systems TQMLS1028A SoM on MBLS1028A/MBLS1028A-IND board
1705 items:
1706 - enum:
1707 - tq,ls1028a-tqmls1028a-mbls1028a
1708 - tq,ls1028a-tqmls1028a-mbls1028a-ind
1709 - const: tq,ls1028a-tqmls1028a
1710 - const: fsl,ls1028a
1711
1682 - description: LS1043A based Boards1712 - description: LS1043A based Boards
1683 items:1713 items:
1684 - enum:1714 - enum:
Documentation/devicetree/bindings/arm/intel,socfpga.yaml+0−40
@@ -1,40 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Intel SoCFPGA platform
8
9maintainers:
10 - Dinh Nguyen <dinguyen@kernel.org>
11
12properties:
13 $nodename:
14 const: "/"
15 compatible:
16 oneOf:
17 - description: AgileX boards
18 items:
19 - enum:
20 - intel,n5x-socdk
21 - intel,socfpga-agilex-n6000
22 - intel,socfpga-agilex-socdk
23 - const: intel,socfpga-agilex
24 - description: Agilex3 boards
25 items:
26 - enum:
27 - intel,socfpga-agilex3-socdk
28 - const: intel,socfpga-agilex3
29 - const: intel,socfpga-agilex5
30 - description: Agilex5 boards
31 items:
32 - enum:
33 - intel,socfpga-agilex5-socdk
34 - intel,socfpga-agilex5-socdk-013b
35 - intel,socfpga-agilex5-socdk-nand
36 - const: intel,socfpga-agilex5
37
38additionalProperties: true
39
40...
Documentation/devicetree/bindings/arm/mediatek.yaml+2−0
@@ -438,12 +438,14 @@ properties: · 437 unmodified lines
438 - const: mediatek,mt8365438 - const: mediatek,mt8365
439 - items:439 - items:
440 - enum:440 - enum:
441 - ezurio,mt8370-tungsten-smarc
441 - grinn,genio-510-sbc442 - grinn,genio-510-sbc
442 - mediatek,mt8370-evk443 - mediatek,mt8370-evk
443 - const: mediatek,mt8370444 - const: mediatek,mt8370
444 - const: mediatek,mt8188445 - const: mediatek,mt8188
445 - items:446 - items:
446 - enum:447 - enum:
448 - ezurio,mt8390-tungsten-smarc
447 - grinn,genio-700-sbc449 - grinn,genio-700-sbc
448 - mediatek,mt8390-evk450 - mediatek,mt8390-evk
449 - const: mediatek,mt8390451 - const: mediatek,mt8390
Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.yaml+33−13
@@ -48,19 +48,39 @@ required: · 47 unmodified lines
48 - compatible48 - compatible
49 - '#clock-cells'49 - '#clock-cells'
50 50
51if:51allOf:
52 properties:52 - if:
53 compatible:53 properties:
54 contains:54 compatible:
55 const: mediatek,mt8183-audiosys55 contains:
56then:56 enum:
57 properties:57 - mediatek,mt2701-audsys
58 audio-controller:58 - mediatek,mt7622-audsys
59 $ref: /schemas/sound/mediatek,mt8183-audio.yaml#59 then:
60else:60 properties:
61 properties:61 audio-controller:
62 audio-controller:62 $ref: /schemas/sound/mediatek,mt2701-audio.yaml#
63 $ref: /schemas/sound/mediatek,mt2701-audio.yaml#63
64 - if:
65 properties:
66 compatible:
67 contains:
68 const: mediatek,mt8183-audiosys
69 then:
70 properties:
71 audio-controller:
72 $ref: /schemas/sound/mediatek,mt8183-audio.yaml#
73
74 - if:
75 properties:
76 compatible:
77 contains:
78 const: mediatek,mt8192-audsys
79 then:
80 properties:
81 audio-controller:
82 $ref: /schemas/sound/mt8192-afe-pcm.yaml#
83
64 84
65additionalProperties: false85additionalProperties: false
66 86
Documentation/devicetree/bindings/arm/omap/prm-inst.txt+0−31
@@ -1,31 +0,0 @@
1OMAP PRM instance bindings
2
3Power and Reset Manager is an IP block on OMAP family of devices which
4handle the power domains and their current state, and provide reset
5handling for the domains and/or separate IP blocks under the power domain
6hierarchy.
7
8Required properties:
9- compatible: Must contain one of the following:
10 "ti,am3-prm-inst"
11 "ti,am4-prm-inst"
12 "ti,omap4-prm-inst"
13 "ti,omap5-prm-inst"
14 "ti,dra7-prm-inst"
15 and additionally must contain:
16 "ti,omap-prm-inst"
17- reg: Contains PRM instance register address range
18 (base address and length)
19
20Optional properties:
21- #power-domain-cells: Should be 0 if the instance is a power domain provider.
22- #reset-cells: Should be 1 if the PRM instance in question supports resets.
23
24Example:
25
26prm_dsp2: prm@1b00 {
27 compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
28 reg = <0x1b00 0x40>;
29 #power-domain-cells = <0>;
30 #reset-cells = <1>;
31};
Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml+10−5
@@ -7,9 +7,9 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: CoreSight TMC Control Unit7title: CoreSight TMC Control Unit
8 8
9maintainers:9maintainers:
10 - Yuanfang Zhang <quic_yuanfang@quicinc.com>10 - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
11 - Mao Jinlong <quic_jinlmao@quicinc.com>11 - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
12 - Jie Gan <quic_jiegan@quicinc.com>12 - Jie Gan <jie.gan@oss.qualcomm.com>
13 13
14description: |14description: |
15 The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),15 The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB),
@@ -26,8 +26,13 @@ description: | · 10 unmodified lines
26 26
27properties:27properties:
28 compatible:28 compatible:
29 enum:29 oneOf:
30 - qcom,sa8775p-ctcu30 - items:
31 - enum:
32 - qcom,qcs8300-ctcu
33 - const: qcom,sa8775p-ctcu
34 - enum:
35 - qcom,sa8775p-ctcu
31 36
32 reg:37 reg:
33 maxItems: 138 maxItems: 1
Documentation/devicetree/bindings/arm/qcom,coresight-itnoc.yaml+90−0
@@ -0,0 +1,90 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/qcom,coresight-itnoc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Interconnect Trace Network On Chip - ITNOC
8
9maintainers:
10 - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
11
12description:
13 The Interconnect TNOC is a CoreSight graph link that forwards trace data
14 from a subsystem to the Aggregator TNOC. Compared to Aggregator TNOC, it
15 does not have aggregation and ATID functionality.
16
17properties:
18 $nodename:
19 pattern: "^itnoc(@[0-9a-f]+)?$"
20
21 compatible:
22 const: qcom,coresight-itnoc
23
24 reg:
25 maxItems: 1
26
27 clocks:
28 maxItems: 1
29
30 clock-names:
31 items:
32 - const: apb
33
34 in-ports:
35 $ref: /schemas/graph.yaml#/properties/ports
36
37 patternProperties:
38 '^port(@[0-9a-f]{1,2})?$':
39 description: Input connections from CoreSight Trace Bus
40 $ref: /schemas/graph.yaml#/properties/port
41
42 out-ports:
43 $ref: /schemas/graph.yaml#/properties/ports
44 additionalProperties: false
45
46 properties:
47 port:
48 description: out connections to aggregator TNOC
49 $ref: /schemas/graph.yaml#/properties/port
50
51required:
52 - compatible
53 - reg
54 - clocks
55 - clock-names
56 - in-ports
57 - out-ports
58
59additionalProperties: false
60
61examples:
62 - |
63 itnoc@109ac000 {
64 compatible = "qcom,coresight-itnoc";
65 reg = <0x109ac000 0x1000>;
66
67 clocks = <&aoss_qmp>;
68 clock-names = "apb";
69
70 in-ports {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 port@0 {
74 reg = <0>;
75 tn_ic_in_tpdm_dcc: endpoint {
76 remote-endpoint = <&tpdm_dcc_out_tn_ic>;
77 };
78 };
79 };
80
81 out-ports {
82 port {
83 tn_ic_out_tnoc_aggr: endpoint {
84 /* to Aggregator TNOC input */
85 remote-endpoint = <&tn_ag_in_tn_ic>;
86 };
87 };
88 };
89 };
90...
Documentation/devicetree/bindings/arm/qcom,coresight-remote-etm.yaml+2−2
@@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell)7title: Qualcomm Coresight Remote ETM(Embedded Trace Macrocell)
8 8
9maintainers:9maintainers:
10 - Jinlong Mao <quic_jinlmao@quicinc.com>10 - Jinlong Mao <jinlong.mao@oss.qualcomm.com>
11 - Tao Zhang <quic_taozha@quicinc.com>11 - Tao Zhang <tao.zhang@oss.qualcomm.com>
12 12
13description:13description:
14 Support for ETM trace collection on remote processor using coresight14 Support for ETM trace collection on remote processor using coresight
Documentation/devicetree/bindings/arm/qcom,coresight-tnoc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Qualcomm Trace Network On Chip - TNOC7title: Qualcomm Trace Network On Chip - TNOC
8 8
9maintainers:9maintainers:
10 - Yuanfang Zhang <quic_yuanfang@quicinc.com>10 - Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
11 11
12description: >12description: >
13 The Trace Network On Chip (TNOC) is an integration hierarchy hardware13 The Trace Network On Chip (TNOC) is an integration hierarchy hardware
Documentation/devicetree/bindings/arm/qcom,coresight-tpda.yaml+2−2
@@ -33,8 +33,8 @@ description: | · 32 unmodified lines
33 to sink.33 to sink.
34 34
35maintainers:35maintainers:
36 - Mao Jinlong <quic_jinlmao@quicinc.com>36 - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
37 - Tao Zhang <quic_taozha@quicinc.com>37 - Tao Zhang <tao.zhang@oss.qualcomm.com>
38 38
39# Need a custom select here or 'arm,primecell' will match on lots of nodes39# Need a custom select here or 'arm,primecell' will match on lots of nodes
40select:40select:
Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml+2−2
@@ -19,8 +19,8 @@ description: | · 18 unmodified lines
19 sources and send it to a TPDA for packetization, timestamping, and funneling.19 sources and send it to a TPDA for packetization, timestamping, and funneling.
20 20
21maintainers:21maintainers:
22 - Mao Jinlong <quic_jinlmao@quicinc.com>22 - Mao Jinlong <jinlong.mao@oss.qualcomm.com>
23 - Tao Zhang <quic_taozha@quicinc.com>23 - Tao Zhang <tao.zhang@oss.qualcomm.com>
24 24
25# Need a custom select here or 'arm,primecell' will match on lots of nodes25# Need a custom select here or 'arm,primecell' will match on lots of nodes
26select:26select:
Documentation/devicetree/bindings/arm/qcom.yaml+33−0
@@ -61,6 +61,11 @@ properties: · 60 unmodified lines
61 - qcom,apq8084-sbc61 - qcom,apq8084-sbc
62 - const: qcom,apq808462 - const: qcom,apq8084
63 63
64 - items:
65 - enum:
66 - fairphone,fp6
67 - const: qcom,milos
68
64 - items:69 - items:
65 - enum:70 - enum:
66 - microsoft,dempsey71 - microsoft,dempsey
@@ -327,6 +332,12 @@ properties: · 260 unmodified lines
327 - qcom,ipq9574-ap-al02-c9332 - qcom,ipq9574-ap-al02-c9
328 - const: qcom,ipq9574333 - const: qcom,ipq9574
329 334
335 - items:
336 - enum:
337 - qcom,kaanapali-mtp
338 - qcom,kaanapali-qrd
339 - const: qcom,kaanapali
340
330 - description: Sierra Wireless MangOH Green with WP8548 Module341 - description: Sierra Wireless MangOH Green with WP8548 Module
331 items:342 items:
332 - const: swir,mangoh-green-wp8548343 - const: swir,mangoh-green-wp8548
@@ -336,6 +347,7 @@ properties: · 3 unmodified lines
336 - description: Qualcomm Technologies, Inc. Robotics RB1347 - description: Qualcomm Technologies, Inc. Robotics RB1
337 items:348 items:
338 - enum:349 - enum:
350 - arduino,imola
339 - qcom,qrb2210-rb1351 - qcom,qrb2210-rb1
340 - const: qcom,qrb2210352 - const: qcom,qrb2210
341 - const: qcom,qcm2290353 - const: qcom,qcm2290
@@ -348,6 +360,7 @@ properties: · 6 unmodified lines
348 - qcom,qcs6490-rb3gen2360 - qcom,qcs6490-rb3gen2
349 - radxa,dragon-q6a361 - radxa,dragon-q6a
350 - shift,otter362 - shift,otter
363 - thundercomm,rubikpi3
351 - const: qcom,qcm6490364 - const: qcom,qcm6490
352 365
353 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform366 - description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
@@ -900,6 +913,8 @@ properties: · 546 unmodified lines
900 913
901 - items:914 - items:
902 - enum:915 - enum:
916 - google,blueline
917 - google,crosshatch
903 - huawei,planck918 - huawei,planck
904 - lenovo,yoga-c630919 - lenovo,yoga-c630
905 - lg,judyln920 - lg,judyln
@@ -1067,6 +1082,19 @@ properties: · 161 unmodified lines
1067 - const: qcom,x1e781001082 - const: qcom,x1e78100
1068 - const: qcom,x1e801001083 - const: qcom,x1e80100
1069 1084
1085 - items:
1086 - enum:
1087 - medion,sprchrgd14s1
1088 - tuxedo,elite14gen1
1089 - const: qcom,x1e78100
1090 - const: qcom,x1e80100
1091
1092 - items:
1093 - const: microsoft,denali-lcd
1094 - const: microsoft,denali
1095 - const: qcom,x1p64100
1096 - const: qcom,x1e80100
1097
1070 - items:1098 - items:
1071 - enum:1099 - enum:
1072 - asus,vivobook-s151100 - asus,vivobook-s15
@@ -1089,6 +1117,11 @@ properties: · 16 unmodified lines
1089 - const: qcom,hamoa-iot-som1117 - const: qcom,hamoa-iot-som
1090 - const: qcom,x1e801001118 - const: qcom,x1e80100
1091 1119
1120 - items:
1121 - const: microsoft,denali-oled
1122 - const: microsoft,denali
1123 - const: qcom,x1e80100
1124
1092 - items:1125 - items:
1093 - enum:1126 - enum:
1094 - asus,zenbook-a14-ux3407qa-lcd1127 - asus,zenbook-a14-ux3407qa-lcd
Documentation/devicetree/bindings/arm/realtek.yaml+30−12
@@ -14,21 +14,21 @@ properties: · 13 unmodified lines
14 const: '/'14 const: '/'
15 compatible:15 compatible:
16 oneOf:16 oneOf:
17 # RTD1195 SoC based boards17 - description: RTD1195 SoC based boards
18 - items:18 items:
19 - enum:19 - enum:
20 - mele,x1000 # MeLE X100020 - mele,x1000 # MeLE X1000
21 - realtek,horseradish # Realtek Horseradish EVB21 - realtek,horseradish # Realtek Horseradish EVB
22 - const: realtek,rtd119522 - const: realtek,rtd1195
23 23
24 # RTD1293 SoC based boards24 - description: RTD1293 SoC based boards
25 - items:25 items:
26 - enum:26 - enum:
27 - synology,ds418j # Synology DiskStation DS418j27 - synology,ds418j # Synology DiskStation DS418j
28 - const: realtek,rtd129328 - const: realtek,rtd1293
29 29
30 # RTD1295 SoC based boards30 - description: RTD1295 SoC based boards
31 - items:31 items:
32 - enum:32 - enum:
33 - mele,v9 # MeLE V933 - mele,v9 # MeLE V9
34 - probox2,ava # ProBox2 AVA34 - probox2,ava # ProBox2 AVA
@@ -36,25 +36,43 @@ properties: · 1 unmodified line
36 - zidoo,x9s # Zidoo X9S36 - zidoo,x9s # Zidoo X9S
37 - const: realtek,rtd129537 - const: realtek,rtd1295
38 38
39 # RTD1296 SoC based boards39 - description: RTD1296 SoC based boards
40 - items:40 items:
41 - enum:41 - enum:
42 - synology,ds418 # Synology DiskStation DS41842 - synology,ds418 # Synology DiskStation DS418
43 - const: realtek,rtd129643 - const: realtek,rtd1296
44 44
45 # RTD1395 SoC based boards45 - description: RTD1395 SoC based boards
46 - items:46 items:
47 - enum:47 - enum:
48 - bananapi,bpi-m4 # Banana Pi BPI-M448 - bananapi,bpi-m4 # Banana Pi BPI-M4
49 - realtek,lion-skin # Realtek Lion Skin EVB49 - realtek,lion-skin # Realtek Lion Skin EVB
50 - const: realtek,rtd139550 - const: realtek,rtd1395
51 51
52 # RTD1619 SoC based boards52 - description: RTD1501s SoC based boards
53 - items:53 items:
54 - enum:
55 - realtek,phantom # Realtek Phantom EVB (8GB)
56 - const: realtek,rtd1501s
57
58 - description: RTD1619 SoC based boards
59 items:
54 - enum:60 - enum:
55 - realtek,mjolnir # Realtek Mjolnir EVB61 - realtek,mjolnir # Realtek Mjolnir EVB
56 - const: realtek,rtd161962 - const: realtek,rtd1619
57 63
64 - description: RTD1861b SoC based boards
65 items:
66 - enum:
67 - realtek,krypton # Realtek Krypton EVB (8GB)
68 - const: realtek,rtd1861b
69
70 - description: RTD1920s SoC based boards
71 items:
72 - enum:
73 - realtek,smallville # Realtek Smallville EVB (4GB)
74 - const: realtek,rtd1920s
75
58additionalProperties: true76additionalProperties: true
59 77
60...78...
Documentation/devicetree/bindings/arm/rockchip.yaml+36−6
@@ -60,6 +60,12 @@ properties: · 59 unmodified lines
60 - anbernic,rg-arc-s60 - anbernic,rg-arc-s
61 - const: rockchip,rk356661 - const: rockchip,rk3566
62 62
63 - description: Anbernic RK3568 Handheld Gaming Console
64 items:
65 - enum:
66 - anbernic,rg-ds
67 - const: rockchip,rk3568
68
63 - description: Ariaboard Photonicat69 - description: Ariaboard Photonicat
64 items:70 items:
65 - const: ariaboard,photonicat71 - const: ariaboard,photonicat
@@ -894,11 +900,15 @@ properties: · 828 unmodified lines
894 - const: rockchip,rk3568900 - const: rockchip,rk3568
895 901
896 - description: QNAP TS-x33 NAS devices902 - description: QNAP TS-x33 NAS devices
897 items:903 oneOf:
898 - enum:904 - items:
899 - qnap,ts233905 - const: qnap,ts133
900 - qnap,ts433906 - const: rockchip,rk3566
901 - const: rockchip,rk3568907 - items:
908 - enum:
909 - qnap,ts233
910 - qnap,ts433
911 - const: rockchip,rk3568
902 912
903 - description: Radxa Compute Module 3 (CM3)913 - description: Radxa Compute Module 3 (CM3)
904 items:914 items:
@@ -907,13 +917,27 @@ properties: · 2 unmodified lines
907 - const: radxa,cm3917 - const: radxa,cm3
908 - const: rockchip,rk3566918 - const: rockchip,rk3566
909 919
910 - description: Radxa CM3 Industrial920 - description: Radxa CM3I
911 items:921 items:
912 - enum:922 - enum:
913 - radxa,e25923 - radxa,e25
914 - const: radxa,cm3i924 - const: radxa,cm3i
915 - const: rockchip,rk3568925 - const: rockchip,rk3568
916 926
927 - description: Radxa CM3J
928 items:
929 - enum:
930 - radxa,cm3j-rpi-cm4
931 - const: radxa,cm3j
932 - const: rockchip,rk3568
933
934 - description: Radxa CM5
935 items:
936 - enum:
937 - radxa,cm5-io
938 - const: radxa,cm5
939 - const: rockchip,rk3588s
940
917 - description: Radxa E20C941 - description: Radxa E20C
918 items:942 items:
919 - const: radxa,e20c943 - const: radxa,e20c
@@ -1299,6 +1323,12 @@ properties: · 379 unmodified lines
1299 - xunlong,orangepi-5b1323 - xunlong,orangepi-5b
1300 - const: rockchip,rk3588s1324 - const: rockchip,rk3588s
1301 1325
1326 - description: Xunlong Orange Pi CM5
1327 items:
1328 - const: xunlong,orangepi-cm5-base
1329 - const: xunlong,orangepi-cm5
1330 - const: rockchip,rk3588s
1331
1302 - description: Zkmagic A95X Z21332 - description: Zkmagic A95X Z2
1303 items:1333 items:
1304 - const: zkmagic,a95x-z21334 - const: zkmagic,a95x-z2
Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.yaml+7−4
@@ -19,15 +19,15 @@ properties: · 18 unmodified lines
19 - nvidia,tegra264-pmc19 - nvidia,tegra264-pmc
20 20
21 reg:21 reg:
22 minItems: 422 minItems: 3
23 maxItems: 523 maxItems: 5
24 24
25 reg-names:25 reg-names:
26 minItems: 426 minItems: 3
27 items:27 items:
28 - const: pmc28 - const: pmc
29 - const: wake29 - const: wake
30 - const: aotag30 - enum: [ aotag, scratch, misc ]
31 - enum: [ scratch, misc ]31 - enum: [ scratch, misc ]
32 - const: misc32 - const: misc
33 33
@@ -51,6 +51,7 @@ allOf: · 17 unmodified lines
51 then:51 then:
52 properties:52 properties:
53 reg:53 reg:
54 minItems: 4
54 maxItems: 455 maxItems: 4
55 reg-names:56 reg-names:
56 maxItems: 457 maxItems: 4
@@ -73,7 +74,9 @@ allOf: · 16 unmodified lines
73 properties:74 properties:
74 compatible:75 compatible:
75 contains:76 contains:
76 const: nvidia,tegra234-pmc77 enum:
78 - nvidia,tegra234-pmc
79 - nvidia,tegra264-pmc
77 then:80 then:
78 properties:81 properties:
79 reg-names:82 reg-names:
Documentation/devicetree/bindings/arm/ti/ti,omap-prm-inst.yaml+55−0
@@ -0,0 +1,55 @@
1# SPDX-License-Identifier: GPL-2.0-only
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/ti/ti,omap-prm-inst.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: OMAP PRM instances
8
9maintainers:
10 - Aaro Koskinen <aaro.koskinen@iki.fi>
11 - Andreas Kemnade <andreas@kemnade.info>
12 - Kevin Hilman <khilman@baylibre.com>
13 - Roger Quadros <rogerq@kernel.org>
14 - Tony Lindgren <tony@atomide.com>
15
16description:
17 Power and Reset Manager is an IP block on OMAP family of devices which
18 handle the power domains and their current state, and provide reset
19 handling for the domains and/or separate IP blocks under the power domain
20 hierarchy.
21
22properties:
23 compatible:
24 items:
25 - enum:
26 - ti,am3-prm-inst
27 - ti,am4-prm-inst
28 - ti,omap4-prm-inst
29 - ti,omap5-prm-inst
30 - ti,dra7-prm-inst
31 - const: ti,omap-prm-inst
32
33 reg:
34 maxItems: 1
35
36 "#power-domain-cells":
37 const: 0
38
39 "#reset-cells":
40 const: 1
41
42required:
43 - compatible
44 - reg
45
46additionalProperties: false
47
48examples:
49 - |
50 reset-controller@1b00 {
51 compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
52 reg = <0x1b00 0x40>;
53 #power-domain-cells = <0>;
54 #reset-cells = <1>;
55 };
Documentation/devicetree/bindings/arm/vexpress-config.yaml+3−3
@@ -103,7 +103,7 @@ required: · 102 unmodified lines
103 - arm,vexpress,config-bridge103 - arm,vexpress,config-bridge
104 104
105patternProperties:105patternProperties:
106 'clk[0-9]*$':106 '^clock-controller.*$':
107 type: object107 type: object
108 description:108 description:
109 clocks109 clocks
@@ -137,7 +137,7 @@ patternProperties: · 27 unmodified lines
137 - arm,vexpress-sysreg,func137 - arm,vexpress-sysreg,func
138 - "#clock-cells"138 - "#clock-cells"
139 139
140 "^volt-.+$":140 "^regulator-.+$":
141 $ref: /schemas/regulator/regulator.yaml#141 $ref: /schemas/regulator/regulator.yaml#
142 properties:142 properties:
143 compatible:143 compatible:
@@ -272,7 +272,7 @@ examples: · 128 unmodified lines
272 compatible = "arm,vexpress,config-bus";272 compatible = "arm,vexpress,config-bus";
273 arm,vexpress,config-bridge = <&v2m_sysreg>;273 arm,vexpress,config-bridge = <&v2m_sysreg>;
274 274
275 clk0 {275 clock-controller {
276 compatible = "arm,vexpress-osc";276 compatible = "arm,vexpress-osc";
277 arm,vexpress-sysreg,func = <1 0>;277 arm,vexpress-sysreg,func = <1 0>;
278 #clock-cells = <0>;278 #clock-cells = <0>;
Documentation/devicetree/bindings/ata/ahci-platform.yaml+0−20
@@ -18,26 +18,6 @@ maintainers: · 17 unmodified lines
18 - Hans de Goede <hdegoede@redhat.com>18 - Hans de Goede <hdegoede@redhat.com>
19 - Jens Axboe <axboe@kernel.dk>19 - Jens Axboe <axboe@kernel.dk>
20 20
21select:
22 properties:
23 compatible:
24 contains:
25 enum:
26 - brcm,iproc-ahci
27 - cavium,octeon-7130-ahci
28 - hisilicon,hisi-ahci
29 - ibm,476gtr-ahci
30 - marvell,armada-3700-ahci
31 - marvell,armada-8k-ahci
32 - marvell,berlin2q-ahci
33 - qcom,apq8064-ahci
34 - qcom,ipq806x-ahci
35 - socionext,uniphier-pro4-ahci
36 - socionext,uniphier-pxs2-ahci
37 - socionext,uniphier-pxs3-ahci
38 required:
39 - compatible
40
41properties:21properties:
42 compatible:22 compatible:
43 oneOf:23 oneOf:
Documentation/devicetree/bindings/ata/sata-common.yaml+3−0
@@ -54,4 +54,7 @@ $defs: · 53 unmodified lines
54 each port can have a Port Multiplier attached thus allowing to54 each port can have a Port Multiplier attached thus allowing to
55 access more than one drive by means of a single SATA port.55 access more than one drive by means of a single SATA port.
56 56
57 port:
58 $ref: /schemas/graph.yaml#/properties/port
59
57...60...
Documentation/devicetree/bindings/bus/aspeed,ast2600-ahbc.yaml+5−3
@@ -17,8 +17,10 @@ description: | · 16 unmodified lines
17 17
18properties:18properties:
19 compatible:19 compatible:
20 enum:20 items:
21 - aspeed,ast2600-ahbc21 - enum:
22 - aspeed,ast2600-ahbc
23 - const: syscon
22 24
23 reg:25 reg:
24 maxItems: 126 maxItems: 1
@@ -32,6 +34,6 @@ additionalProperties: false · 7 unmodified lines
32examples:34examples:
33 - |35 - |
34 ahbc@1e600000 {36 ahbc@1e600000 {
35 compatible = "aspeed,ast2600-ahbc";37 compatible = "aspeed,ast2600-ahbc", "syscon";
36 reg = <0x1e600000 0x100>;38 reg = <0x1e600000 0x100>;
37 };39 };
Documentation/devicetree/bindings/bus/fsl,spba-bus.yaml+11−3
@@ -19,21 +19,29 @@ description: | · 18 unmodified lines
19 the SDMA can access. There are no special clocks for the bus, because19 the SDMA can access. There are no special clocks for the bus, because
20 the SDMA controller itself has its interrupt and clock assignments.20 the SDMA controller itself has its interrupt and clock assignments.
21 21
22 EMI (External Memory Interface) for legacy i.MX35.
23
22select:24select:
23 properties:25 properties:
24 compatible:26 compatible:
25 contains:27 contains:
26 const: fsl,spba-bus28 enum:
29 - fsl,aips
30 - fsl,emi
31 - fsl,spba-bus
27 required:32 required:
28 - compatible33 - compatible
29 34
30properties:35properties:
31 $nodename:36 $nodename:
32 pattern: "^spba-bus(@[0-9a-f]+)?$"37 pattern: "^((spba|emi)-bus|bus)(@[0-9a-f]+)?$"
33 38
34 compatible:39 compatible:
35 items:40 items:
36 - const: fsl,spba-bus41 - enum:
42 - fsl,aips
43 - fsl,emi
44 - fsl,spba-bus
37 - const: simple-bus45 - const: simple-bus
38 46
39 '#address-cells':47 '#address-cells':
Documentation/devicetree/bindings/bus/st,stm32mp25-rifsc.yaml+1−1
@@ -54,7 +54,7 @@ properties: · 53 unmodified lines
54 const: 154 const: 1
55 55
56 "#size-cells":56 "#size-cells":
57 const: 157 enum: [ 1, 2 ]
58 58
59 ranges: true59 ranges: true
60 60
Documentation/devicetree/bindings/cache/qcom,llcc.yaml+44−2
@@ -20,6 +20,7 @@ description: | · 19 unmodified lines
20properties:20properties:
21 compatible:21 compatible:
22 enum:22 enum:
23 - qcom,glymur-llcc
23 - qcom,ipq5424-llcc24 - qcom,ipq5424-llcc
24 - qcom,kaanapali-llcc25 - qcom,kaanapali-llcc
25 - qcom,qcs615-llcc26 - qcom,qcs615-llcc
@@ -46,11 +47,11 @@ properties: · 20 unmodified lines
46 47
47 reg:48 reg:
48 minItems: 149 minItems: 1
49 maxItems: 1050 maxItems: 14
50 51
51 reg-names:52 reg-names:
52 minItems: 153 minItems: 1
53 maxItems: 1054 maxItems: 14
54 55
55 interrupts:56 interrupts:
56 maxItems: 157 maxItems: 1
@@ -84,6 +85,47 @@ allOf: · 27 unmodified lines
84 items:85 items:
85 - const: llcc0_base86 - const: llcc0_base
86 87
88 - if:
89 properties:
90 compatible:
91 contains:
92 enum:
93 - qcom,glymur-llcc
94 then:
95 properties:
96 reg:
97 items:
98 - description: LLCC0 base register region
99 - description: LLCC1 base register region
100 - description: LLCC2 base register region
101 - description: LLCC3 base register region
102 - description: LLCC4 base register region
103 - description: LLCC5 base register region
104 - description: LLCC6 base register region
105 - description: LLCC7 base register region
106 - description: LLCC8 base register region
107 - description: LLCC9 base register region
108 - description: LLCC10 base register region
109 - description: LLCC11 base register region
110 - description: LLCC broadcast base register region
111 - description: LLCC broadcast AND register region
112 reg-names:
113 items:
114 - const: llcc0_base
115 - const: llcc1_base
116 - const: llcc2_base
117 - const: llcc3_base
118 - const: llcc4_base
119 - const: llcc5_base
120 - const: llcc6_base
121 - const: llcc7_base
122 - const: llcc8_base
123 - const: llcc9_base
124 - const: llcc10_base
125 - const: llcc11_base
126 - const: llcc_broadcast_base
127 - const: llcc_broadcast_and_base
128
87 - if:129 - if:
88 properties:130 properties:
89 compatible:131 compatible:
Documentation/devicetree/bindings/clock/amlogic,t7-peripherals-clkc.yaml+116−0
@@ -0,0 +1,116 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2024-2025 Amlogic, Inc. All rights reserved
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/clock/amlogic,t7-peripherals-clkc.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Amlogic T7 Peripherals Clock Controller
9
10maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Jerome Brunet <jbrunet@baylibre.com>
13 - Xianwei Zhao <xianwei.zhao@amlogic.com>
14 - Jian Hu <jian.hu@amlogic.com>
15
16properties:
17 compatible:
18 const: amlogic,t7-peripherals-clkc
19
20 reg:
21 maxItems: 1
22
23 '#clock-cells':
24 const: 1
25
26 clocks:
27 minItems: 14
28 items:
29 - description: input oscillator
30 - description: input sys clk
31 - description: input fixed pll
32 - description: input fclk div 2
33 - description: input fclk div 2p5
34 - description: input fclk div 3
35 - description: input fclk div 4
36 - description: input fclk div 5
37 - description: input fclk div 7
38 - description: input hifi pll
39 - description: input gp0 pll
40 - description: input gp1 pll
41 - description: input mpll1
42 - description: input mpll2
43 - description: external input rmii oscillator (optional)
44 - description: input video pll0 (optional)
45 - description: external pad input for rtc (optional)
46
47 clock-names:
48 minItems: 14
49 items:
50 - const: xtal
51 - const: sys
52 - const: fix
53 - const: fdiv2
54 - const: fdiv2p5
55 - const: fdiv3
56 - const: fdiv4
57 - const: fdiv5
58 - const: fdiv7
59 - const: hifi
60 - const: gp0
61 - const: gp1
62 - const: mpll1
63 - const: mpll2
64 - const: ext_rmii
65 - const: vid_pll0
66 - const: ext_rtc
67
68required:
69 - compatible
70 - '#clock-cells'
71 - reg
72 - clocks
73 - clock-names
74
75additionalProperties: false
76
77examples:
78 - |
79 apb {
80 #address-cells = <2>;
81 #size-cells = <2>;
82
83 clkc_periphs:clock-controller@0 {
84 compatible = "amlogic,t7-peripherals-clkc";
85 reg = <0 0x0 0 0x1c8>;
86 #clock-cells = <1>;
87 clocks = <&xtal>,
88 <&scmi_clk 13>,
89 <&scmi_clk 16>,
90 <&scmi_clk 18>,
91 <&scmi_clk 20>,
92 <&scmi_clk 22>,
93 <&scmi_clk 24>,
94 <&scmi_clk 26>,
95 <&scmi_clk 28>,
96 <&hifi 1>,
97 <&gp0 1>,
98 <&gp1 1>,
99 <&mpll 4>,
100 <&mpll 6>;
101 clock-names = "xtal",
102 "sys",
103 "fix",
104 "fdiv2",
105 "fdiv2p5",
106 "fdiv3",
107 "fdiv4",
108 "fdiv5",
109 "fdiv7",
110 "hifi",
111 "gp0",
112 "gp1",
113 "mpll1",
114 "mpll2";
115 };
116 };
Documentation/devicetree/bindings/clock/amlogic,t7-pll-clkc.yaml+114−0
@@ -0,0 +1,114 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2024-2025 Amlogic, Inc. All rights reserved
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/clock/amlogic,t7-pll-clkc.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Amlogic T7 PLL Clock Control Controller
9
10maintainers:
11 - Neil Armstrong <neil.armstrong@linaro.org>
12 - Jerome Brunet <jbrunet@baylibre.com>
13 - Jian Hu <jian.hu@amlogic.com>
14 - Xianwei Zhao <xianwei.zhao@amlogic.com>
15
16properties:
17 compatible:
18 enum:
19 - amlogic,t7-gp0-pll
20 - amlogic,t7-gp1-pll
21 - amlogic,t7-hifi-pll
22 - amlogic,t7-pcie-pll
23 - amlogic,t7-mpll
24 - amlogic,t7-hdmi-pll
25 - amlogic,t7-mclk-pll
26
27 reg:
28 maxItems: 1
29
30 '#clock-cells':
31 const: 1
32
33 clocks:
34 items:
35 - description: mclk pll input oscillator gate
36 - description: oscillator input clock source for mclk_sel_0
37 - description: fixed input clock source for mclk_sel_0
38 minItems: 1
39
40 clock-names:
41 items:
42 - const: in0
43 - const: in1
44 - const: in2
45 minItems: 1
46
47required:
48 - compatible
49 - '#clock-cells'
50 - reg
51 - clocks
52 - clock-names
53
54allOf:
55 - if:
56 properties:
57 compatible:
58 contains:
59 const: amlogic,t7-mclk-pll
60
61 then:
62 properties:
63 clocks:
64 minItems: 3
65
66 clock-names:
67 minItems: 3
68
69 - if:
70 properties:
71 compatible:
72 contains:
73 enum:
74 - amlogic,t7-gp0-pll
75 - amlogic,t7-gp1--pll
76 - amlogic,t7-hifi-pll
77 - amlogic,t7-pcie-pll
78 - amlogic,t7-mpll
79 - amlogic,t7-hdmi-pll
80
81 then:
82 properties:
83 clocks:
84 maxItems: 1
85
86 clock-names:
87 maxItems: 1
88
89additionalProperties: false
90
91examples:
92 - |
93 apb {
94 #address-cells = <2>;
95 #size-cells = <2>;
96
97 clock-controller@8080 {
98 compatible = "amlogic,t7-gp0-pll";
99 reg = <0 0x8080 0 0x20>;
100 clocks = <&scmi_clk 2>;
101 clock-names = "in0";
102 #clock-cells = <1>;
103 };
104
105 clock-controller@8300 {
106 compatible = "amlogic,t7-mclk-pll";
107 reg = <0 0x8300 0 0x18>;
108 clocks = <&scmi_clk 2>,
109 <&xtal>,
110 <&scmi_clk 31>;
111 clock-names = "in0", "in1", "in2";
112 #clock-cells = <1>;
113 };
114 };
Documentation/devicetree/bindings/clock/google,gs101-clock.yaml+38−2
@@ -29,9 +29,10 @@ properties: · 28 unmodified lines
29 enum:29 enum:
30 - google,gs101-cmu-top30 - google,gs101-cmu-top
31 - google,gs101-cmu-apm31 - google,gs101-cmu-apm
32 - google,gs101-cmu-misc32 - google,gs101-cmu-dpu
33 - google,gs101-cmu-hsi033 - google,gs101-cmu-hsi0
34 - google,gs101-cmu-hsi234 - google,gs101-cmu-hsi2
35 - google,gs101-cmu-misc
35 - google,gs101-cmu-peric036 - google,gs101-cmu-peric0
36 - google,gs101-cmu-peric137 - google,gs101-cmu-peric1
37 38
@@ -52,6 +53,11 @@ properties: · 14 unmodified lines
52 reg:53 reg:
53 maxItems: 154 maxItems: 1
54 55
56 samsung,sysreg:
57 $ref: /schemas/types.yaml#/definitions/phandle
58 description:
59 Phandle to system registers interface.
60
55required:61required:
56 - compatible62 - compatible
57 - "#clock-cells"63 - "#clock-cells"
@@ -77,6 +83,24 @@ allOf: · 19 unmodified lines
77 items:83 items:
78 - const: oscclk84 - const: oscclk
79 85
86 - if:
87 properties:
88 compatible:
89 contains:
90 const: google,gs101-cmu-dpu
91
92 then:
93 properties:
94 clocks:
95 items:
96 - description: External reference clock (24.576 MHz)
97 - description: DPU bus clock (from CMU_TOP)
98
99 clock-names:
100 items:
101 - const: oscclk
102 - const: bus
103
80 - if:104 - if:
81 properties:105 properties:
82 compatible:106 compatible:
@@ -166,6 +190,18 @@ allOf: · 83 unmodified lines
166 - const: bus190 - const: bus
167 - const: ip191 - const: ip
168 192
193 - if:
194 properties:
195 compatible:
196 contains:
197 const: google,gs101-cmu-top
198 then:
199 properties:
200 samsung,sysreg: false
201 else:
202 required:
203 - samsung,sysreg
204
169additionalProperties: false205additionalProperties: false
170 206
171examples:207examples:
@@ -175,7 +211,7 @@ examples: · 3 unmodified lines
175 211
176 cmu_top: clock-controller@1e080000 {212 cmu_top: clock-controller@1e080000 {
177 compatible = "google,gs101-cmu-top";213 compatible = "google,gs101-cmu-top";
178 reg = <0x1e080000 0x8000>;214 reg = <0x1e080000 0x10000>;
179 #clock-cells = <1>;215 #clock-cells = <1>;
180 clocks = <&ext_24_5m>;216 clocks = <&ext_24_5m>;
181 clock-names = "oscclk";217 clock-names = "oscclk";
Documentation/devicetree/bindings/clock/mediatek,mt7622-pciesys.yaml+4−6
@@ -14,11 +14,9 @@ maintainers: · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 oneOf:17 enum:
18 - items:18 - mediatek,mt7622-pciesys
19 - const: mediatek,mt7622-pciesys19 - mediatek,mt7629-pciesys
20 - const: syscon
21 - const: mediatek,mt7629-pciesys
22 20
23 reg:21 reg:
24 maxItems: 122 maxItems: 1
@@ -40,7 +38,7 @@ additionalProperties: false · 15 unmodified lines
40examples:38examples:
41 - |39 - |
42 clock-controller@1a100800 {40 clock-controller@1a100800 {
43 compatible = "mediatek,mt7622-pciesys", "syscon";41 compatible = "mediatek,mt7622-pciesys";
44 reg = <0x1a100800 0x1000>;42 reg = <0x1a100800 0x1000>;
45 #clock-cells = <1>;43 #clock-cells = <1>;
46 #reset-cells = <1>;44 #reset-cells = <1>;
Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml+5−1
@@ -17,7 +17,11 @@ description: | · 16 unmodified lines
17 17
18properties:18properties:
19 compatible:19 compatible:
20 const: microchip,mpfs-ccc20 oneOf:
21 - items:
22 - const: microchip,pic64gx-ccc
23 - const: microchip,mpfs-ccc
24 - const: microchip,mpfs-ccc
21 25
22 reg:26 reg:
23 items:27 items:
Documentation/devicetree/bindings/clock/microchip,mpfs-clkcfg.yaml+15−1
@@ -19,7 +19,11 @@ description: | · 18 unmodified lines
19 19
20properties:20properties:
21 compatible:21 compatible:
22 const: microchip,mpfs-clkcfg22 oneOf:
23 - items:
24 - const: microchip,pic64gx-clkcfg
25 - const: microchip,mpfs-clkcfg
26 - const: microchip,mpfs-clkcfg
23 27
24 reg:28 reg:
25 oneOf:29 oneOf:
@@ -69,6 +73,16 @@ required: · 43 unmodified lines
69 - clocks73 - clocks
70 - '#clock-cells'74 - '#clock-cells'
71 75
76if:
77 properties:
78 compatible:
79 contains:
80 const: microchip,pic64gx-clkcfg
81then:
82 properties:
83 reg:
84 maxItems: 1
85
72additionalProperties: false86additionalProperties: false
73 87
74examples:88examples:
Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml+4−2
@@ -4,7 +4,7 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8953.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Qualcomm Global Clock & Reset Controller on MSM89537title: Qualcomm Global Clock & Reset Controller on MSM8937, MSM8940, MSM8953 and SDM439
8 8
9maintainers:9maintainers:
10 - Adam Skladowski <a_skl39@protonmail.com>10 - Adam Skladowski <a_skl39@protonmail.com>
@@ -13,7 +13,7 @@ maintainers: · 2 unmodified lines
13 13
14description: |14description: |
15 Qualcomm global clock control module provides the clocks, resets and power15 Qualcomm global clock control module provides the clocks, resets and power
16 domains on MSM8937 or MSM8953.16 domains on MSM8937, MSM8940, MSM8953 or SDM439.
17 17
18 See also::18 See also::
19 include/dt-bindings/clock/qcom,gcc-msm8917.h19 include/dt-bindings/clock/qcom,gcc-msm8917.h
@@ -23,7 +23,9 @@ properties: · 3 unmodified lines
23 compatible:23 compatible:
24 enum:24 enum:
25 - qcom,gcc-msm893725 - qcom,gcc-msm8937
26 - qcom,gcc-msm8940
26 - qcom,gcc-msm895327 - qcom,gcc-msm8953
28 - qcom,gcc-sdm439
27 29
28 clocks:30 clocks:
29 items:31 items:
Documentation/devicetree/bindings/clock/qcom,kaanapali-gxclkctl.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,kaanapali-gxclkctl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics power domain Controller on Kaanapali
8
9maintainers:
10 - Taniya Das <taniya.das@oss.qualcomm.com>
11
12description: |
13 Qualcomm GX(graphics) is a clock controller which has PLLs, clocks and
14 Power domains (GDSC). This module provides the power domains control
15 of gxclkctl on Qualcomm SoCs which helps the recovery of Graphics subsystem.
16
17 See also:
18 include/dt-bindings/clock/qcom,kaanapali-gxclkctl.h
19
20properties:
21 compatible:
22 enum:
23 - qcom,kaanapali-gxclkctl
24
25 power-domains:
26 description:
27 Power domains required for the clock controller to operate
28 items:
29 - description: GFX power domain
30 - description: GMXC power domain
31 - description: GPUCC(CX) power domain
32
33 '#power-domain-cells':
34 const: 1
35
36 reg:
37 maxItems: 1
38
39required:
40 - compatible
41 - reg
42 - power-domains
43 - '#power-domain-cells'
44
45unevaluatedProperties: false
46
47examples:
48 - |
49 #include <dt-bindings/power/qcom,rpmhpd.h>
50 soc {
51 #address-cells = <2>;
52 #size-cells = <2>;
53
54 clock-controller@3d64000 {
55 compatible = "qcom,kaanapali-gxclkctl";
56 reg = <0x0 0x03d64000 0x0 0x6000>;
57 power-domains = <&rpmhpd RPMHPD_GFX>,
58 <&rpmhpd RPMHPD_GMXC>,
59 <&gpucc 0>;
60 #power-domain-cells = <1>;
61 };
62 };
63...
Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml+11−0
@@ -9,23 +9,32 @@ title: Qualcomm Camera Clock & Reset Controller on SM8450 · 8 unmodified lines
9maintainers:9maintainers:
10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11 - Jagadeesh Kona <quic_jkona@quicinc.com>11 - Jagadeesh Kona <quic_jkona@quicinc.com>
12 - Taniya Das <taniya.das@oss.qualcomm.com>
12 13
13description: |14description: |
14 Qualcomm camera clock control module provides the clocks, resets and power15 Qualcomm camera clock control module provides the clocks, resets and power
15 domains on SM8450.16 domains on SM8450.
16 17
17 See also:18 See also:
19 include/dt-bindings/clock/qcom,kaanapali-camcc.h
20 include/dt-bindings/clock/qcom,kaanapali-cambistmclkcc.h
18 include/dt-bindings/clock/qcom,sm8450-camcc.h21 include/dt-bindings/clock/qcom,sm8450-camcc.h
19 include/dt-bindings/clock/qcom,sm8550-camcc.h22 include/dt-bindings/clock/qcom,sm8550-camcc.h
20 include/dt-bindings/clock/qcom,sm8650-camcc.h23 include/dt-bindings/clock/qcom,sm8650-camcc.h
24 include/dt-bindings/clock/qcom,sm8750-cambistmclkcc.h
25 include/dt-bindings/clock/qcom,sm8750-camcc.h
21 26
22properties:27properties:
23 compatible:28 compatible:
24 enum:29 enum:
30 - qcom,kaanapali-cambistmclkcc
31 - qcom,kaanapali-camcc
25 - qcom,sm8450-camcc32 - qcom,sm8450-camcc
26 - qcom,sm8475-camcc33 - qcom,sm8475-camcc
27 - qcom,sm8550-camcc34 - qcom,sm8550-camcc
28 - qcom,sm8650-camcc35 - qcom,sm8650-camcc
36 - qcom,sm8750-cambistmclkcc
37 - qcom,sm8750-camcc
29 38
30 clocks:39 clocks:
31 items:40 items:
@@ -63,6 +72,8 @@ allOf: · 31 unmodified lines
63 compatible:72 compatible:
64 contains:73 contains:
65 enum:74 enum:
75 - qcom,kaanapali-cambistmclkcc
76 - qcom,kaanapali-camcc
66 - qcom,sc8280xp-camcc77 - qcom,sc8280xp-camcc
67 - qcom,sm8450-camcc78 - qcom,sm8450-camcc
68 - qcom,sm8550-camcc79 - qcom,sm8550-camcc
Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml+2−0
@@ -14,6 +14,7 @@ description: | · 13 unmodified lines
14 domains on Qualcomm SoCs.14 domains on Qualcomm SoCs.
15 15
16 See also::16 See also::
17 include/dt-bindings/clock/qcom,kaanapali-gpucc.h
17 include/dt-bindings/clock/qcom,milos-gpucc.h18 include/dt-bindings/clock/qcom,milos-gpucc.h
18 include/dt-bindings/clock/qcom,sar2130p-gpucc.h19 include/dt-bindings/clock/qcom,sar2130p-gpucc.h
19 include/dt-bindings/clock/qcom,sm4450-gpucc.h20 include/dt-bindings/clock/qcom,sm4450-gpucc.h
@@ -26,6 +27,7 @@ description: | · 6 unmodified lines
26properties:27properties:
27 compatible:28 compatible:
28 enum:29 enum:
30 - qcom,kaanapali-gpucc
29 - qcom,milos-gpucc31 - qcom,milos-gpucc
30 - qcom,sar2130p-gpucc32 - qcom,sar2130p-gpucc
31 - qcom,sm4450-gpucc33 - qcom,sm4450-gpucc
Documentation/devicetree/bindings/clock/qcom,sm8450-videocc.yaml+3−0
@@ -15,6 +15,7 @@ description: | · 14 unmodified lines
15 domains on SM8450.15 domains on SM8450.
16 16
17 See also:17 See also:
18 include/dt-bindings/clock/qcom,kaanapali-videocc.h
18 include/dt-bindings/clock/qcom,sm8450-videocc.h19 include/dt-bindings/clock/qcom,sm8450-videocc.h
19 include/dt-bindings/clock/qcom,sm8650-videocc.h20 include/dt-bindings/clock/qcom,sm8650-videocc.h
20 include/dt-bindings/clock/qcom,sm8750-videocc.h21 include/dt-bindings/clock/qcom,sm8750-videocc.h
@@ -22,6 +23,7 @@ description: | · 1 unmodified line
22properties:23properties:
23 compatible:24 compatible:
24 enum:25 enum:
26 - qcom,kaanapali-videocc
25 - qcom,sm8450-videocc27 - qcom,sm8450-videocc
26 - qcom,sm8475-videocc28 - qcom,sm8475-videocc
27 - qcom,sm8550-videocc29 - qcom,sm8550-videocc
@@ -61,6 +63,7 @@ allOf: · 33 unmodified lines
61 compatible:63 compatible:
62 contains:64 contains:
63 enum:65 enum:
66 - qcom,kaanapali-videocc
64 - qcom,sm8450-videocc67 - qcom,sm8450-videocc
65 - qcom,sm8550-videocc68 - qcom,sm8550-videocc
66 - qcom,sm8750-videocc69 - qcom,sm8750-videocc
Documentation/devicetree/bindings/clock/qcom,sm8550-dispcc.yaml+2−0
@@ -15,6 +15,7 @@ description: | · 14 unmodified lines
15 domains on SM8550, SM8650, SM8750 and few other platforms.15 domains on SM8550, SM8650, SM8750 and few other platforms.
16 16
17 See also:17 See also:
18 - include/dt-bindings/clock/qcom,kaanapali-dispcc.h
18 - include/dt-bindings/clock/qcom,sm8550-dispcc.h19 - include/dt-bindings/clock/qcom,sm8550-dispcc.h
19 - include/dt-bindings/clock/qcom,sm8650-dispcc.h20 - include/dt-bindings/clock/qcom,sm8650-dispcc.h
20 - include/dt-bindings/clock/qcom,sm8750-dispcc.h21 - include/dt-bindings/clock/qcom,sm8750-dispcc.h
@@ -23,6 +24,7 @@ description: | · 2 unmodified lines
23properties:24properties:
24 compatible:25 compatible:
25 enum:26 enum:
27 - qcom,kaanapali-dispcc
26 - qcom,sar2130p-dispcc28 - qcom,sar2130p-dispcc
27 - qcom,sm8550-dispcc29 - qcom,sm8550-dispcc
28 - qcom,sm8650-dispcc30 - qcom,sm8650-dispcc
Documentation/devicetree/bindings/clock/qcom,x1e80100-gcc.yaml+7−1
@@ -62,6 +62,9 @@ properties: · 61 unmodified lines
62 - description: USB4_1 PHY max PIPE clock source62 - description: USB4_1 PHY max PIPE clock source
63 - description: USB4_2 PHY PCIE PIPE clock source63 - description: USB4_2 PHY PCIE PIPE clock source
64 - description: USB4_2 PHY max PIPE clock source64 - description: USB4_2 PHY max PIPE clock source
65 - description: UFS PHY RX Symbol 0 clock source
66 - description: UFS PHY RX Symbol 1 clock source
67 - description: UFS PHY TX Symbol 0 clock source
65 68
66 power-domains:69 power-domains:
67 description:70 description:
@@ -121,7 +124,10 @@ examples: · 53 unmodified lines
121 <&usb4_1_phy_pcie_pipe_clk>,124 <&usb4_1_phy_pcie_pipe_clk>,
122 <&usb4_1_phy_max_pipe_clk>,125 <&usb4_1_phy_max_pipe_clk>,
123 <&usb4_2_phy_pcie_pipe_clk>,126 <&usb4_2_phy_pcie_pipe_clk>,
124 <&usb4_2_phy_max_pipe_clk>;127 <&usb4_2_phy_max_pipe_clk>,
128 <&ufs_phy_rx_symbol_0>,
129 <&ufs_phy_rx_symbol_1>,
130 <&ufs_phy_tx_symbol_0>;
125 power-domains = <&rpmhpd RPMHPD_CX>;131 power-domains = <&rpmhpd RPMHPD_CX>;
126 #clock-cells = <1>;132 #clock-cells = <1>;
127 #reset-cells = <1>;133 #reset-cells = <1>;
Documentation/devicetree/bindings/clock/renesas,9series.yaml+10−1
@@ -62,7 +62,7 @@ properties: · 61 unmodified lines
62 description: Output clock down spread in pcm (1/1000 of percent)62 description: Output clock down spread in pcm (1/1000 of percent)
63 63
64patternProperties:64patternProperties:
65 "^DIF[0-19]$":65 "^DIF1?[0-9]$":
66 type: object66 type: object
67 description:67 description:
68 Description of one of the outputs (DIF0..DIF19).68 Description of one of the outputs (DIF0..DIF19).
@@ -107,6 +107,15 @@ examples: · 38 unmodified lines
107 DIF0 {107 DIF0 {
108 renesas,slew-rate = <3000000>;108 renesas,slew-rate = <3000000>;
109 };109 };
110
111 /* Not present on 9FGV0241, used for DT validation only */
112 DIF2 {
113 renesas,slew-rate = <2000000>;
114 };
115
116 DIF19 {
117 renesas,slew-rate = <3000000>;
118 };
110 };119 };
111 };120 };
112 121
Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml+19−0
@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40 - samsung,exynosautov920-cmu-hsi240 - samsung,exynosautov920-cmu-hsi2
41 - samsung,exynosautov920-cmu-m2m41 - samsung,exynosautov920-cmu-m2m
42 - samsung,exynosautov920-cmu-mfc42 - samsung,exynosautov920-cmu-mfc
43 - samsung,exynosautov920-cmu-mfd
43 - samsung,exynosautov920-cmu-misc44 - samsung,exynosautov920-cmu-misc
44 - samsung,exynosautov920-cmu-peric045 - samsung,exynosautov920-cmu-peric0
45 - samsung,exynosautov920-cmu-peric146 - samsung,exynosautov920-cmu-peric1
@@ -268,6 +269,24 @@ allOf: · 222 unmodified lines
268 - const: mfc269 - const: mfc
269 - const: wfd270 - const: wfd
270 271
272 - if:
273 properties:
274 compatible:
275 contains:
276 const: samsung,exynosautov920-cmu-mfd
277
278 then:
279 properties:
280 clocks:
281 items:
282 - description: External reference clock (38.4 MHz)
283 - description: CMU_MFD NOC clock (from CMU_TOP)
284
285 clock-names:
286 items:
287 - const: oscclk
288 - const: noc
289
271required:290required:
272 - compatible291 - compatible
273 - "#clock-cells"292 - "#clock-cells"
Documentation/devicetree/bindings/clock/spacemit,k1-pll.yaml+6−3
@@ -4,14 +4,16 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#4$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: SpacemiT K1 PLL7title: SpacemiT K1/K3 PLL
8 8
9maintainers:9maintainers:
10 - Haylen Chu <heylenay@4d2.org>10 - Haylen Chu <heylenay@4d2.org>
11 11
12properties:12properties:
13 compatible:13 compatible:
14 const: spacemit,k1-pll14 enum:
15 - spacemit,k1-pll
16 - spacemit,k3-pll
15 17
16 reg:18 reg:
17 maxItems: 119 maxItems: 1
@@ -28,7 +30,8 @@ properties: · 10 unmodified lines
28 "#clock-cells":30 "#clock-cells":
29 const: 131 const: 1
30 description:32 description:
31 See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.33 For K1 SoC, check <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.
34 For K3 SoC, check <dt-bindings/clock/spacemit,k3-clocks.h> for valid indices.
32 35
33required:36required:
34 - compatible37 - compatible
Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml+145−0
@@ -0,0 +1,145 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/connector/pcie-m2-m-connector.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: PCIe M.2 Mechanical Key M Connector
8
9maintainers:
10 - Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
11
12description:
13 A PCIe M.2 M connector node represents a physical PCIe M.2 Mechanical Key M
14 connector. The Mechanical Key M connectors are used to connect SSDs to the
15 host system over PCIe/SATA interfaces. These connectors also offer optional
16 interfaces like USB, SMBus.
17
18properties:
19 compatible:
20 const: pcie-m2-m-connector
21
22 vpcie3v3-supply:
23 description: A phandle to the regulator for 3.3v supply.
24
25 vpcie1v8-supply:
26 description: A phandle to the regulator for VIO 1.8v supply.
27
28 ports:
29 $ref: /schemas/graph.yaml#/properties/ports
30 description: OF graph bindings modeling the interfaces exposed on the
31 connector. Since a single connector can have multiple interfaces, every
32 interface has an assigned OF graph port number as described below.
33
34 properties:
35 port@0:
36 $ref: /schemas/graph.yaml#/properties/port
37 description: PCIe interface
38
39 port@1:
40 $ref: /schemas/graph.yaml#/properties/port
41 description: SATA interface
42
43 port@2:
44 $ref: /schemas/graph.yaml#/properties/port
45 description: USB 2.0 interface
46
47 anyOf:
48 - required:
49 - port@0
50 - required:
51 - port@1
52
53 i2c-parent:
54 $ref: /schemas/types.yaml#/definitions/phandle
55 description: I2C interface
56
57 clocks:
58 description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to
59 the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for
60 more details.
61 maxItems: 1
62
63 pedet-gpios:
64 description: GPIO input to PEDET signal. This signal is used by the host
65 systems to determine the communication protocol that the M.2 card uses;
66 SATA signaling (low) or PCIe signaling (high). Refer, PCI Express M.2
67 Specification r4.0, sec 3.3.4.2 for more details.
68 maxItems: 1
69
70 viocfg-gpios:
71 description: GPIO input to IO voltage configuration (VIO_CFG) signal. This
72 signal is used by the host systems to determine whether the card supports
73 an independent IO voltage domain for the sideband signals or not. Refer,
74 PCI Express M.2 Specification r4.0, sec 3.1.15.1 for more details.
75 maxItems: 1
76
77 pwrdis-gpios:
78 description: GPIO output to Power Disable (PWRDIS) signal. This signal is
79 used by the host system to disable power on the M.2 card. Refer, PCI
80 Express M.2 Specification r4.0, sec 3.3.5.2 for more details.
81 maxItems: 1
82
83 pln-gpios:
84 description: GPIO output to Power Loss Notification (PLN#) signal. This
85 signal is used by the host system to notify the M.2 card that the power
86 loss event is about to occur. Refer, PCI Express M.2 Specification r4.0,
87 sec 3.2.17.1 for more details.
88 maxItems: 1
89
90 plas3-gpios:
91 description: GPIO input to Power Loss Acknowledge (PLA_S3#) signal. This
92 signal is used by the host system to receive the acknowledgment of the M.2
93 card's preparation for power loss.
94 maxItems: 1
95
96required:
97 - compatible
98 - vpcie3v3-supply
99
100additionalProperties: false
101
102examples:
103 # PCI M.2 Key M connector for SSDs with PCIe interface
104 - |
105 #include <dt-bindings/gpio/gpio.h>
106
107 connector {
108 compatible = "pcie-m2-m-connector";
109 vpcie3v3-supply = <&vreg_nvme>;
110 i2c-parent = <&i2c0>;
111 pedet-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
112 viocfg-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
113 pwrdis-gpios = <&tlmm 97 GPIO_ACTIVE_HIGH>;
114 pln-gpios = <&tlmm 98 GPIO_ACTIVE_LOW>;
115 plas3-gpios = <&tlmm 99 GPIO_ACTIVE_LOW>;
116
117 ports {
118 #address-cells = <1>;
119 #size-cells = <0>;
120
121 port@0 {
122 #address-cells = <1>;
123 #size-cells = <0>;
124
125 reg = <0>;
126
127 endpoint@0 {
128 reg = <0>;
129 remote-endpoint = <&pcie6_port0_ep>;
130 };
131 };
132
133 port@2 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136
137 reg = <2>;
138
139 endpoint@0 {
140 reg = <0>;
141 remote-endpoint = <&usb_hs_ep>;
142 };
143 };
144 };
145 };
Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml+2−0
@@ -35,6 +35,7 @@ properties: · 34 unmodified lines
35 - description: v2 of CPUFREQ HW (EPSS)35 - description: v2 of CPUFREQ HW (EPSS)
36 items:36 items:
37 - enum:37 - enum:
38 - qcom,milos-cpufreq-epss
38 - qcom,qcs8300-cpufreq-epss39 - qcom,qcs8300-cpufreq-epss
39 - qcom,qdu1000-cpufreq-epss40 - qcom,qdu1000-cpufreq-epss
40 - qcom,sa8255p-cpufreq-epss41 - qcom,sa8255p-cpufreq-epss
@@ -169,6 +170,7 @@ allOf: · 128 unmodified lines
169 compatible:170 compatible:
170 contains:171 contains:
171 enum:172 enum:
173 - qcom,milos-cpufreq-epss
172 - qcom,qcs8300-cpufreq-epss174 - qcom,qcs8300-cpufreq-epss
173 - qcom,sc7280-cpufreq-epss175 - qcom,sc7280-cpufreq-epss
174 - qcom,sm8250-cpufreq-epss176 - qcom,sm8250-cpufreq-epss
Documentation/devicetree/bindings/crypto/aspeed,ast2600-acry.yaml+7−0
@@ -30,11 +30,17 @@ properties: · 29 unmodified lines
30 interrupts:30 interrupts:
31 maxItems: 131 maxItems: 1
32 32
33 aspeed,ahbc:
34 $ref: /schemas/types.yaml#/definitions/phandle
35 description:
36 A phandle to the AHB controller node, which must be a syscon
37
33required:38required:
34 - compatible39 - compatible
35 - reg40 - reg
36 - clocks41 - clocks
37 - interrupts42 - interrupts
43 - aspeed,ahbc
38 44
39additionalProperties: false45additionalProperties: false
40 46
@@ -46,4 +52,5 @@ examples: · 5 unmodified lines
46 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;52 reg = <0x1e6fa000 0x400>, <0x1e710000 0x1800>;
47 interrupts = <160>;53 interrupts = <160>;
48 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;54 clocks = <&syscon ASPEED_CLK_GATE_RSACLK>;
55 aspeed,ahbc = <&ahbc>;
49 };56 };
Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-aes.yaml+1−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 - const: atmel,at91sam9g46-aes16 - const: atmel,at91sam9g46-aes
17 - items:17 - items:
18 - enum:18 - enum:
19 - microchip,lan9691-aes
19 - microchip,sam9x7-aes20 - microchip,sam9x7-aes
20 - microchip,sama7d65-aes21 - microchip,sama7d65-aes
21 - const: atmel,at91sam9g46-aes22 - const: atmel,at91sam9g46-aes
Documentation/devicetree/bindings/crypto/atmel,at91sam9g46-sha.yaml+1−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 - const: atmel,at91sam9g46-sha16 - const: atmel,at91sam9g46-sha
17 - items:17 - items:
18 - enum:18 - enum:
19 - microchip,lan9691-sha
19 - microchip,sam9x7-sha20 - microchip,sam9x7-sha
20 - microchip,sama7d65-sha21 - microchip,sama7d65-sha
21 - const: atmel,at91sam9g46-sha22 - const: atmel,at91sam9g46-sha
Documentation/devicetree/bindings/crypto/inside-secure,safexcel.yaml+22−0
@@ -12,6 +12,14 @@ maintainers: · 11 unmodified lines
12properties:12properties:
13 compatible:13 compatible:
14 oneOf:14 oneOf:
15 - items:
16 - const: marvell,armada-cp110-crypto
17 - const: inside-secure,safexcel-eip197b
18 - items:
19 - enum:
20 - marvell,armada-3700-crypto
21 - mediatek,mt7986-crypto
22 - const: inside-secure,safexcel-eip97ies
15 - const: inside-secure,safexcel-eip197b23 - const: inside-secure,safexcel-eip197b
16 - const: inside-secure,safexcel-eip197d24 - const: inside-secure,safexcel-eip197d
17 - const: inside-secure,safexcel-eip97ies25 - const: inside-secure,safexcel-eip97ies
@@ -26,9 +34,11 @@ properties: · 8 unmodified lines
26 maxItems: 134 maxItems: 1
27 35
28 interrupts:36 interrupts:
37 minItems: 4
29 maxItems: 638 maxItems: 6
30 39
31 interrupt-names:40 interrupt-names:
41 minItems: 4
32 items:42 items:
33 - const: ring043 - const: ring0
34 - const: ring144 - const: ring1
@@ -65,6 +75,18 @@ allOf: · 30 unmodified lines
65 minItems: 275 minItems: 2
66 required:76 required:
67 - clock-names77 - clock-names
78 - if:
79 properties:
80 compatible:
81 not:
82 contains:
83 const: mediatek,mt7986-crypto
84 then:
85 properties:
86 interrupts:
87 minItems: 6
88 interrupt-names:
89 minItems: 6
68 90
69additionalProperties: false91additionalProperties: false
70 92
Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml+1−0
@@ -14,6 +14,7 @@ properties: · 13 unmodified lines
14 items:14 items:
15 - enum:15 - enum:
16 - qcom,kaanapali-inline-crypto-engine16 - qcom,kaanapali-inline-crypto-engine
17 - qcom,milos-inline-crypto-engine
17 - qcom,qcs8300-inline-crypto-engine18 - qcom,qcs8300-inline-crypto-engine
18 - qcom,sa8775p-inline-crypto-engine19 - qcom,sa8775p-inline-crypto-engine
19 - qcom,sc7180-inline-crypto-engine20 - qcom,sc7180-inline-crypto-engine
Documentation/devicetree/bindings/crypto/qcom,prng.yaml+2−0
@@ -21,6 +21,7 @@ properties: · 20 unmodified lines
21 - qcom,ipq5424-trng21 - qcom,ipq5424-trng
22 - qcom,ipq9574-trng22 - qcom,ipq9574-trng
23 - qcom,kaanapali-trng23 - qcom,kaanapali-trng
24 - qcom,milos-trng
24 - qcom,qcs615-trng25 - qcom,qcs615-trng
25 - qcom,qcs8300-trng26 - qcom,qcs8300-trng
26 - qcom,sa8255p-trng27 - qcom,sa8255p-trng
@@ -30,6 +31,7 @@ properties: · 3 unmodified lines
30 - qcom,sm8550-trng31 - qcom,sm8550-trng
31 - qcom,sm8650-trng32 - qcom,sm8650-trng
32 - qcom,sm8750-trng33 - qcom,sm8750-trng
34 - qcom,x1e80100-trng
33 - const: qcom,trng35 - const: qcom,trng
34 36
35 reg:37 reg:
Documentation/devicetree/bindings/crypto/xlnx,zynqmp-aes.yaml+2−0
@@ -14,6 +14,8 @@ description: | · 13 unmodified lines
14 The ZynqMP AES-GCM hardened cryptographic accelerator is used to14 The ZynqMP AES-GCM hardened cryptographic accelerator is used to
15 encrypt or decrypt the data with provided key and initialization vector.15 encrypt or decrypt the data with provided key and initialization vector.
16 16
17deprecated: true
18
17properties:19properties:
18 compatible:20 compatible:
19 const: xlnx,zynqmp-aes21 const: xlnx,zynqmp-aes
Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml+10−0
@@ -59,6 +59,7 @@ required: · 58 unmodified lines
59 - compatible59 - compatible
60 - clocks60 - clocks
61 - ports61 - ports
62 - reg
62 63
63allOf:64allOf:
64 - if:65 - if:
@@ -73,6 +74,15 @@ allOf: · 8 unmodified lines
73 ports:74 ports:
74 properties:75 properties:
75 port@2: false76 port@2: false
77 - if:
78 not:
79 properties:
80 compatible:
81 contains:
82 const: fsl,imx6sx-ldb
83 then:
84 required:
85 - reg-names
76 86
77additionalProperties: false87additionalProperties: false
78 88
Documentation/devicetree/bindings/display/bridge/lontium,lt8912b.yaml+0−1
@@ -79,7 +79,6 @@ properties: · 78 unmodified lines
79required:79required:
80 - compatible80 - compatible
81 - reg81 - reg
82 - reset-gpios
83 - ports82 - ports
84 83
85additionalProperties: false84additionalProperties: false
Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml+1−0
@@ -33,6 +33,7 @@ properties: · 32 unmodified lines
33 oneOf:33 oneOf:
34 - items:34 - items:
35 - enum:35 - enum:
36 - onnn,fin3385 # OnSemi FIN3385
36 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer37 - ti,ds90c185 # For the TI DS90C185 FPD-Link Serializer
37 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer38 - ti,ds90c187 # For the TI DS90C187 FPD-Link Serializer
38 - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter39 - ti,sn75lvds83 # For the TI SN75LVDS83 FlatLink transmitter
Documentation/devicetree/bindings/display/bridge/nxp,tda998x.yaml+3−0
@@ -19,6 +19,9 @@ properties: · 18 unmodified lines
19 interrupts:19 interrupts:
20 maxItems: 120 maxItems: 1
21 21
22 clocks:
23 maxItems: 1
24
22 video-ports:25 video-ports:
23 $ref: /schemas/types.yaml#/definitions/uint3226 $ref: /schemas/types.yaml#/definitions/uint32
24 default: 0x23014527 default: 0x230145
Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml+91−29
@@ -14,16 +14,21 @@ description: | · 13 unmodified lines
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
15 up to four data lanes.15 up to four data lanes.
16 16
17allOf:
18 - $ref: /schemas/display/dsi-controller.yaml#
19
20properties:17properties:
21 compatible:18 compatible:
22 items:19 oneOf:
20 - items:
21 - enum:
22 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
23 - renesas,r9a07g054-mipi-dsi # RZ/V2L
24 - const: renesas,rzg2l-mipi-dsi
25
26 - items:
27 - const: renesas,r9a09g056-mipi-dsi # RZ/V2N
28 - const: renesas,r9a09g057-mipi-dsi
29
23 - enum:30 - enum:
24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}31 - renesas,r9a09g057-mipi-dsi # RZ/V2H(P)
25 - renesas,r9a07g054-mipi-dsi # RZ/V2L
26 - const: renesas,rzg2l-mipi-dsi
27 32
28 reg:33 reg:
29 maxItems: 134 maxItems: 1
@@ -49,34 +54,56 @@ properties: · 19 unmodified lines
49 - const: debug54 - const: debug
50 55
51 clocks:56 clocks:
52 items:57 oneOf:
53 - description: DSI D-PHY PLL multiplied clock58 - items:
54 - description: DSI D-PHY system clock59 - description: DSI D-PHY PLL multiplied clock
55 - description: DSI AXI bus clock60 - description: DSI D-PHY system clock
56 - description: DSI Register access clock61 - description: DSI AXI bus clock
57 - description: DSI Video clock62 - description: DSI Register access clock
58 - description: DSI D-PHY Escape mode transmit clock63 - description: DSI Video clock
64 - description: DSI D-PHY Escape mode transmit clock
65 - items:
66 - description: DSI D-PHY PLL reference clock
67 - description: DSI AXI bus clock
68 - description: DSI Register access clock
69 - description: DSI Video clock
70 - description: DSI D-PHY Escape mode transmit clock
59 71
60 clock-names:72 clock-names:
61 items:73 oneOf:
62 - const: pllclk74 - items:
63 - const: sysclk75 - const: pllclk
64 - const: aclk76 - const: sysclk
65 - const: pclk77 - const: aclk
66 - const: vclk78 - const: pclk
67 - const: lpclk79 - const: vclk
80 - const: lpclk
81 - items:
82 - const: pllrefclk
83 - const: aclk
84 - const: pclk
85 - const: vclk
86 - const: lpclk
68 87
69 resets:88 resets:
70 items:89 oneOf:
71 - description: MIPI_DSI_CMN_RSTB90 - items:
72 - description: MIPI_DSI_ARESET_N91 - description: MIPI_DSI_CMN_RSTB
73 - description: MIPI_DSI_PRESET_N92 - description: MIPI_DSI_ARESET_N
93 - description: MIPI_DSI_PRESET_N
94 - items:
95 - description: MIPI_DSI_ARESET_N
96 - description: MIPI_DSI_PRESET_N
74 97
75 reset-names:98 reset-names:
76 items:99 oneOf:
77 - const: rst100 - items:
78 - const: arst101 - const: rst
79 - const: prst102 - const: arst
103 - const: prst
104 - items:
105 - const: arst
106 - const: prst
80 107
81 power-domains:108 power-domains:
82 maxItems: 1109 maxItems: 1
@@ -130,6 +157,41 @@ required: · 47 unmodified lines
130 157
131unevaluatedProperties: false158unevaluatedProperties: false
132 159
160allOf:
161 - $ref: ../dsi-controller.yaml#
162
163 - if:
164 properties:
165 compatible:
166 contains:
167 const: renesas,r9a09g057-mipi-dsi
168 then:
169 properties:
170 clocks:
171 maxItems: 5
172
173 clock-names:
174 maxItems: 5
175
176 resets:
177 maxItems: 2
178
179 reset-names:
180 maxItems: 2
181 else:
182 properties:
183 clocks:
184 minItems: 6
185
186 clock-names:
187 minItems: 6
188
189 resets:
190 minItems: 3
191
192 reset-names:
193 minItems: 3
194
133examples:195examples:
134 - |196 - |
135 #include <dt-bindings/clock/r9a07g044-cpg.h>197 #include <dt-bindings/clock/r9a07g044-cpg.h>
Documentation/devicetree/bindings/display/bridge/simple-bridge.yaml+1−0
@@ -27,6 +27,7 @@ properties: · 26 unmodified lines
27 - const: adi,adv712327 - const: adi,adv7123
28 - enum:28 - enum:
29 - adi,adv712329 - adi,adv7123
30 - algoltek,ag6311
30 - asl-tek,cs526331 - asl-tek,cs5263
31 - dumb-vga-dac32 - dumb-vga-dac
32 - parade,ps185hdm33 - parade,ps185hdm
Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml+1−1
@@ -117,7 +117,7 @@ properties: · 116 unmodified lines
117 - 1 # 3.5dB pre-emphasis117 - 1 # 3.5dB pre-emphasis
118 - 2 # 6dB pre-emphasis118 - 2 # 6dB pre-emphasis
119 119
120 oneOf:120 anyOf:
121 - required:121 - required:
122 - port@0122 - port@0
123 - required:123 - required:
Documentation/devicetree/bindings/display/google,goldfish-fb.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish framebuffer
2
3Android Goldfish framebuffer device used by Android emulator.
4
5Required properties:
6
7- compatible : should contain "google,goldfish-fb"
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 display-controller@1f008000 {
14 compatible = "google,goldfish-fb";
15 interrupts = <0x10>;
16 reg = <0x1f008000 0x100>;
17 };
Documentation/devicetree/bindings/display/google,goldfish-fb.yaml+38−0
@@ -0,0 +1,38 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/google,goldfish-fb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Android Goldfish Framebuffer
8
9maintainers:
10 - Kuan-Wei Chiu <visitorckw@gmail.com>
11
12description:
13 Android Goldfish framebuffer device used by Android emulator.
14
15properties:
16 compatible:
17 const: google,goldfish-fb
18
19 reg:
20 maxItems: 1
21
22 interrupts:
23 maxItems: 1
24
25required:
26 - compatible
27 - reg
28 - interrupts
29
30additionalProperties: false
31
32examples:
33 - |
34 display@1f008000 {
35 compatible = "google,goldfish-fb";
36 reg = <0x1f008000 0x100>;
37 interrupts = <16>;
38 };
Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml+1−1
@@ -11,7 +11,7 @@ maintainers: · 10 unmodified lines
11 - Jitao shi <jitao.shi@mediatek.com>11 - Jitao shi <jitao.shi@mediatek.com>
12 12
13description: |13description: |
14 MediaTek DP and eDP are different hardwares and there are some features14 MediaTek DP and eDP are different hardware and there are some features
15 which are not supported for eDP. For example, audio is not supported for15 which are not supported for eDP. For example, audio is not supported for
16 eDP. Therefore, we need to use two different compatibles to describe them.16 eDP. Therefore, we need to use two different compatibles to describe them.
17 In addition, We just need to enable the power domain of DP, so the clock17 In addition, We just need to enable the power domain of DP, so the clock
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml+7−0
@@ -15,6 +15,7 @@ properties: · 14 unmodified lines
15 - items:15 - items:
16 - enum:16 - enum:
17 - qcom,apq8064-dsi-ctrl17 - qcom,apq8064-dsi-ctrl
18 - qcom,kaanapali-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl19 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl20 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl21 - qcom,msm8953-dsi-ctrl
@@ -45,6 +46,11 @@ properties: · 24 unmodified lines
45 - qcom,sm8650-dsi-ctrl46 - qcom,sm8650-dsi-ctrl
46 - qcom,sm8750-dsi-ctrl47 - qcom,sm8750-dsi-ctrl
47 - const: qcom,mdss-dsi-ctrl48 - const: qcom,mdss-dsi-ctrl
49 - items:
50 - enum:
51 - qcom,qcs8300-dsi-ctrl
52 - const: qcom,sa8775p-dsi-ctrl
53 - const: qcom,mdss-dsi-ctrl
48 - enum:54 - enum:
49 - qcom,dsi-ctrl-6g-qcm229055 - qcom,dsi-ctrl-6g-qcm2290
50 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible56 - qcom,mdss-dsi-ctrl # This should always come with an SoC-specific compatible
@@ -369,6 +375,7 @@ allOf: · 318 unmodified lines
369 compatible:375 compatible:
370 contains:376 contains:
371 enum:377 enum:
378 - qcom,kaanapali-dsi-ctrl
372 - qcom,sm8750-dsi-ctrl379 - qcom,sm8750-dsi-ctrl
373 then:380 then:
374 properties:381 properties:
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml+19−12
@@ -14,18 +14,25 @@ allOf: · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 enum:17 oneOf:
18 - qcom,dsi-phy-7nm18 - items:
19 - qcom,dsi-phy-7nm-815019 - enum:
20 - qcom,sa8775p-dsi-phy-5nm20 - qcom,dsi-phy-7nm
21 - qcom,sar2130p-dsi-phy-5nm21 - qcom,dsi-phy-7nm-8150
22 - qcom,sc7280-dsi-phy-7nm22 - qcom,kaanapali-dsi-phy-3nm
23 - qcom,sm6375-dsi-phy-7nm23 - qcom,sa8775p-dsi-phy-5nm
24 - qcom,sm8350-dsi-phy-5nm24 - qcom,sar2130p-dsi-phy-5nm
25 - qcom,sm8450-dsi-phy-5nm25 - qcom,sc7280-dsi-phy-7nm
26 - qcom,sm8550-dsi-phy-4nm26 - qcom,sm6375-dsi-phy-7nm
27 - qcom,sm8650-dsi-phy-4nm27 - qcom,sm8350-dsi-phy-5nm
28 - qcom,sm8750-dsi-phy-3nm28 - qcom,sm8450-dsi-phy-5nm
29 - qcom,sm8550-dsi-phy-4nm
30 - qcom,sm8650-dsi-phy-4nm
31 - qcom,sm8750-dsi-phy-3nm
32 - items:
33 - enum:
34 - qcom,qcs8300-dsi-phy-5nm
35 - const: qcom,sa8775p-dsi-phy-5nm
29 36
30 reg:37 reg:
31 items:38 items:
Documentation/devicetree/bindings/display/msm/gpu.yaml+62−23
@@ -45,11 +45,11 @@ properties: · 44 unmodified lines
45 - const: amd,imageon45 - const: amd,imageon
46 46
47 clocks:47 clocks:
48 minItems: 248 minItems: 1
49 maxItems: 749 maxItems: 7
50 50
51 clock-names:51 clock-names:
52 minItems: 252 minItems: 1
53 maxItems: 753 maxItems: 7
54 54
55 reg:55 reg:
@@ -378,35 +378,74 @@ allOf: · 322 unmodified lines
378 - const: xo378 - const: xo
379 description: GPUCC clocksource clock379 description: GPUCC clocksource clock
380 380
381 required:
382 - clocks
383 - clock-names
384
385 - if:
386 properties:
387 compatible:
388 contains:
389 const: qcom,adreno-612.0
390 then:
391 properties:
392 clocks:
393 items:
394 - description: GPU Core clock
395
396 clock-names:
397 items:
398 - const: core
399
400 reg:
401 minItems: 3
402 maxItems: 3
403
381 reg-names:404 reg-names:
382 minItems: 1
383 items:405 items:
384 - const: kgsl_3d0_reg_memory406 - const: kgsl_3d0_reg_memory
407 - const: cx_mem
385 - const: cx_dbgc408 - const: cx_dbgc
386 409
387 required:410 required:
388 - clocks411 - clocks
389 - clock-names412 - clock-names
390 else:413
391 if:414 - if:
392 properties:415 properties:
393 compatible:416 compatible:
394 contains:417 contains:
395 oneOf:418 enum:
396 - pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'419 - qcom,adreno-615.0
397 - pattern: '^qcom,adreno-[0-9a-f]{8}$'420 - qcom,adreno-618.0
398 421 - qcom,adreno-619.0
399 then: # Starting with A6xx, the clocks are usually defined in the GMU node422 - qcom,adreno-621.0
400 properties:423 - qcom,adreno-623.0
401 clocks: false424 - qcom,adreno-630.2
402 clock-names: false425 - qcom,adreno-635.0
403 426 - qcom,adreno-640.1
404 reg-names:427 - qcom,adreno-650.2
405 minItems: 1428 - qcom,adreno-660.1
406 items:429 - qcom,adreno-663.0
407 - const: kgsl_3d0_reg_memory430 - qcom,adreno-680.1
408 - const: cx_mem431 - qcom,adreno-690.0
409 - const: cx_dbgc432 - qcom,adreno-730.1
433 - qcom,adreno-43030c00
434 - qcom,adreno-43050a01
435 - qcom,adreno-43050c01
436 - qcom,adreno-43051401
437
438 then: # Starting with A6xx, the clocks are usually defined in the GMU node
439 properties:
440 clocks: false
441 clock-names: false
442
443 reg-names:
444 minItems: 1
445 items:
446 - const: kgsl_3d0_reg_memory
447 - const: cx_mem
448 - const: cx_dbgc
410 449
411examples:450examples:
412 - |451 - |
Documentation/devicetree/bindings/display/msm/qcom,adreno-rgmu.yaml+126−0
@@ -0,0 +1,126 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
3%YAML 1.2
4---
5
6$id: http://devicetree.org/schemas/display/msm/qcom,adreno-rgmu.yaml#
7$schema: http://devicetree.org/meta-schemas/core.yaml#
8
9title: RGMU attached to certain Adreno GPUs
10
11maintainers:
12 - Rob Clark <robin.clark@oss.qualcomm.com>
13
14description:
15 RGMU (Reduced Graphics Management Unit) IP is present in some GPUs that
16 belong to Adreno A6xx family. It is a small state machine that helps to
17 toggle the GX GDSC (connected to CX rail) to implement IFPC feature and save
18 power.
19
20properties:
21 compatible:
22 items:
23 - const: qcom,adreno-rgmu-612.0
24 - const: qcom,adreno-rgmu
25
26 reg:
27 items:
28 - description: Core RGMU registers
29
30 clocks:
31 items:
32 - description: GMU clock
33 - description: GPU CX clock
34 - description: GPU AXI clock
35 - description: GPU MEMNOC clock
36 - description: GPU SMMU vote clock
37
38 clock-names:
39 items:
40 - const: gmu
41 - const: cxo
42 - const: axi
43 - const: memnoc
44 - const: smmu_vote
45
46 power-domains:
47 items:
48 - description: CX GDSC power domain
49 - description: GX GDSC power domain
50
51 power-domain-names:
52 items:
53 - const: cx
54 - const: gx
55
56 interrupts:
57 items:
58 - description: GMU OOB interrupt
59 - description: GMU interrupt
60
61 interrupt-names:
62 items:
63 - const: oob
64 - const: gmu
65
66 operating-points-v2: true
67 opp-table:
68 type: object
69
70required:
71 - compatible
72 - reg
73 - clocks
74 - clock-names
75 - power-domains
76 - power-domain-names
77 - interrupts
78 - interrupt-names
79 - operating-points-v2
80
81additionalProperties: false
82
83examples:
84 - |
85 #include <dt-bindings/clock/qcom,qcs615-gpucc.h>
86 #include <dt-bindings/clock/qcom,qcs615-gcc.h>
87 #include <dt-bindings/interrupt-controller/arm-gic.h>
88 #include <dt-bindings/power/qcom,rpmhpd.h>
89
90 gmu@506a000 {
91 compatible = "qcom,adreno-rgmu-612.0", "qcom,adreno-rgmu";
92
93 reg = <0x05000000 0x90000>;
94
95 clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
96 <&gpucc GPU_CC_CXO_CLK>,
97 <&gcc GCC_DDRSS_GPU_AXI_CLK>,
98 <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
99 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>;
100 clock-names = "gmu",
101 "cxo",
102 "axi",
103 "memnoc",
104 "smmu_vote";
105
106 power-domains = <&gpucc CX_GDSC>,
107 <&gpucc GX_GDSC>;
108 power-domain-names = "cx",
109 "gx";
110
111 interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
112 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
113 interrupt-names = "oob",
114 "gmu";
115
116 operating-points-v2 = <&gmu_opp_table>;
117
118 gmu_opp_table: opp-table {
119 compatible = "operating-points-v2";
120
121 opp-200000000 {
122 opp-hz = /bits/ 64 <200000000>;
123 required-opps = <&rpmhpd_opp_low_svs>;
124 };
125 };
126 };
Documentation/devicetree/bindings/display/msm/qcom,kaanapali-mdss.yaml+297−0
@@ -0,0 +1,297 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/msm/qcom,kaanapali-mdss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Kaanapali Display MDSS
8
9maintainers:
10 - Yongxing Mou <yongxing.mou@oss.qualcomm.com>
11 - Yuanjie Yang <yuanjie.yang@oss.qualcomm.com>
12
13description:
14 Kaanapali MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks
15 like DPU display controller, DSI and DP interfaces etc.
16
17$ref: /schemas/display/msm/mdss-common.yaml#
18
19properties:
20 compatible:
21 const: qcom,kaanapali-mdss
22
23 clocks:
24 items:
25 - description: Display AHB
26 - description: Display hf AXI
27 - description: Display core
28 - description: Display AHB SWI
29
30 iommus:
31 maxItems: 1
32
33 interconnects:
34 items:
35 - description: Interconnect path from mdp0 port to the data bus
36 - description: Interconnect path from CPU to the reg bus
37
38 interconnect-names:
39 items:
40 - const: mdp0-mem
41 - const: cpu-cfg
42
43patternProperties:
44 "^display-controller@[0-9a-f]+$":
45 type: object
46 additionalProperties: true
47 properties:
48 compatible:
49 const: qcom,kaanapali-dpu
50
51 "^dsi@[0-9a-f]+$":
52 type: object
53 additionalProperties: true
54 properties:
55 compatible:
56 contains:
57 const: qcom,kaanapali-dsi-ctrl
58
59 "^phy@[0-9a-f]+$":
60 type: object
61 additionalProperties: true
62 properties:
63 compatible:
64 const: qcom,kaanapali-dsi-phy-3nm
65
66required:
67 - compatible
68
69unevaluatedProperties: false
70
71examples:
72 - |
73 #include <dt-bindings/clock/qcom,rpmh.h>
74 #include <dt-bindings/interconnect/qcom,icc.h>
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
76 #include <dt-bindings/phy/phy-qcom-qmp.h>
77 #include <dt-bindings/power/qcom,rpmhpd.h>
78
79 display-subsystem@9800000 {
80 compatible = "qcom,kaanapali-mdss";
81 reg = <0x09800000 0x1000>;
82 reg-names = "mdss";
83
84 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
85
86 clocks = <&disp_cc_mdss_ahb_clk>,
87 <&gcc_disp_hf_axi_clk>,
88 <&disp_cc_mdss_mdp_clk>,
89 <&disp_cc_mdss_ahb_swi_clk>;
90 resets = <&disp_cc_mdss_core_bcr>;
91
92 power-domains = <&mdss_gdsc>;
93
94 iommus = <&apps_smmu 0x800 0x2>;
95
96 interrupt-controller;
97 #interrupt-cells = <1>;
98
99 #address-cells = <1>;
100 #size-cells = <1>;
101 ranges;
102
103 display-controller@9801000 {
104 compatible = "qcom,kaanapali-dpu";
105 reg = <0x09801000 0x1c8000>,
106 <0x09b16000 0x3000>;
107 reg-names = "mdp",
108 "vbif";
109
110 interrupts-extended = <&mdss 0>;
111
112 clocks = <&gcc_disp_hf_axi_clk>,
113 <&disp_cc_mdss_ahb_clk>,
114 <&disp_cc_mdss_mdp_lut_clk>,
115 <&disp_cc_mdss_mdp_clk>,
116 <&disp_cc_mdss_vsync_clk>;
117 clock-names = "nrt_bus",
118 "iface",
119 "lut",
120 "core",
121 "vsync";
122
123 assigned-clocks = <&disp_cc_mdss_vsync_clk>;
124 assigned-clock-rates = <19200000>;
125
126 operating-points-v2 = <&mdp_opp_table>;
127
128 power-domains = <&rpmhpd RPMHPD_MMCX>;
129
130 ports {
131 #address-cells = <1>;
132 #size-cells = <0>;
133
134 port@0 {
135 reg = <0>;
136
137 dpu_intf1_out: endpoint {
138 remote-endpoint = <&mdss_dsi0_in>;
139 };
140 };
141
142 port@1 {
143 reg = <1>;
144
145 dpu_intf2_out: endpoint {
146 remote-endpoint = <&mdss_dsi1_in>;
147 };
148 };
149 };
150
151 mdp_opp_table: opp-table {
152 compatible = "operating-points-v2";
153
154 opp-156000000 {
155 opp-hz = /bits/ 64 <156000000>;
156 required-opps = <&rpmhpd_opp_low_svs_d1>;
157 };
158
159 opp-207000000 {
160 opp-hz = /bits/ 64 <207000000>;
161 required-opps = <&rpmhpd_opp_low_svs>;
162 };
163
164 opp-337000000 {
165 opp-hz = /bits/ 64 <337000000>;
166 required-opps = <&rpmhpd_opp_svs>;
167 };
168
169 opp-417000000 {
170 opp-hz = /bits/ 64 <417000000>;
171 required-opps = <&rpmhpd_opp_svs_l1>;
172 };
173
174 opp-532000000 {
175 opp-hz = /bits/ 64 <532000000>;
176 required-opps = <&rpmhpd_opp_nom>;
177 };
178
179 opp-600000000 {
180 opp-hz = /bits/ 64 <600000000>;
181 required-opps = <&rpmhpd_opp_nom_l1>;
182 };
183
184 opp-650000000 {
185 opp-hz = /bits/ 64 <650000000>;
186 required-opps = <&rpmhpd_opp_turbo>;
187 };
188 };
189 };
190
191 dsi@9ac0000 {
192 compatible = "qcom,kaanapali-dsi-ctrl", "qcom,mdss-dsi-ctrl";
193 reg = <0x09ac0000 0x1000>;
194 reg-names = "dsi_ctrl";
195
196 interrupts-extended = <&mdss 4>;
197
198 clocks = <&disp_cc_mdss_byte0_clk>,
199 <&disp_cc_mdss_byte0_intf_clk>,
200 <&disp_cc_mdss_pclk0_clk>,
201 <&disp_cc_mdss_esc0_clk>,
202 <&disp_cc_mdss_ahb_clk>,
203 <&gcc_disp_hf_axi_clk>,
204 <&mdss_dsi0_phy 1>,
205 <&mdss_dsi0_phy 0>,
206 <&disp_cc_esync0_clk>,
207 <&disp_cc_osc_clk>,
208 <&disp_cc_mdss_byte0_clk_src>,
209 <&disp_cc_mdss_pclk0_clk_src>;
210 clock-names = "byte",
211 "byte_intf",
212 "pixel",
213 "core",
214 "iface",
215 "bus",
216 "dsi_pll_pixel",
217 "dsi_pll_byte",
218 "esync",
219 "osc",
220 "byte_src",
221 "pixel_src";
222
223 operating-points-v2 = <&mdss_dsi_opp_table>;
224
225 power-domains = <&rpmhpd RPMHPD_MMCX>;
226
227 phys = <&mdss_dsi0_phy>;
228 phy-names = "dsi";
229
230 #address-cells = <1>;
231 #size-cells = <0>;
232
233 ports {
234 #address-cells = <1>;
235 #size-cells = <0>;
236
237 port@0 {
238 reg = <0>;
239
240 mdss_dsi0_in: endpoint {
241 remote-endpoint = <&dpu_intf1_out>;
242 };
243 };
244
245 port@1 {
246 reg = <1>;
247
248 mdss_dsi0_out: endpoint {
249 remote-endpoint = <&panel0_in>;
250 data-lanes = <0 1 2 3>;
251 };
252 };
253 };
254
255 mdss_dsi_opp_table: opp-table {
256 compatible = "operating-points-v2";
257
258 opp-187500000 {
259 opp-hz = /bits/ 64 <187500000>;
260 required-opps = <&rpmhpd_opp_low_svs_d1>;
261 };
262
263 opp-250000000 {
264 opp-hz = /bits/ 64 <250000000>;
265 required-opps = <&rpmhpd_opp_low_svs>;
266 };
267
268 opp-312500000 {
269 opp-hz = /bits/ 64 <312500000>;
270 required-opps = <&rpmhpd_opp_svs>;
271 };
272
273 opp-358000000 {
274 opp-hz = /bits/ 64 <358000000>;
275 required-opps = <&rpmhpd_opp_svs_l1>;
276 };
277 };
278 };
279
280 mdss_dsi0_phy: phy@9ac1000 {
281 compatible = "qcom,kaanapali-dsi-phy-3nm";
282 reg = <0x09ac1000 0x1cc>,
283 <0x09ac1200 0x80>,
284 <0x09ac1500 0x400>;
285 reg-names = "dsi_phy",
286 "dsi_phy_lane",
287 "dsi_pll";
288
289 clocks = <&disp_cc_mdss_ahb_clk>,
290 <&rpmhcc RPMH_CXO_CLK>;
291 clock-names = "iface",
292 "ref";
293
294 #clock-cells = <1>;
295 #phy-cells = <0>;
296 };
297 };
Documentation/devicetree/bindings/display/msm/qcom,qcs8300-mdss.yaml+101−1
@@ -53,13 +53,23 @@ patternProperties: · 52 unmodified lines
53 contains:53 contains:
54 const: qcom,qcs8300-dp54 const: qcom,qcs8300-dp
55 55
56 "^dsi@[0-9a-f]+$":
57 type: object
58 additionalProperties: true
59 properties:
60 compatible:
61 contains:
62 const: qcom,qcs8300-dsi-ctrl
63
56 "^phy@[0-9a-f]+$":64 "^phy@[0-9a-f]+$":
57 type: object65 type: object
58 additionalProperties: true66 additionalProperties: true
59 properties:67 properties:
60 compatible:68 compatible:
61 contains:69 contains:
62 const: qcom,qcs8300-edp-phy70 enum:
71 - qcom,qcs8300-dsi-phy-5nm
72 - qcom,qcs8300-edp-phy
63 73
64required:74required:
65 - compatible75 - compatible
@@ -71,6 +81,7 @@ examples: · 5 unmodified lines
71 #include <dt-bindings/interconnect/qcom,icc.h>81 #include <dt-bindings/interconnect/qcom,icc.h>
72 #include <dt-bindings/interrupt-controller/arm-gic.h>82 #include <dt-bindings/interrupt-controller/arm-gic.h>
73 #include <dt-bindings/clock/qcom,qcs8300-gcc.h>83 #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
84 #include <dt-bindings/clock/qcom,rpmh.h>
74 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>85 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
75 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>86 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
76 #include <dt-bindings/power/qcom,rpmhpd.h>87 #include <dt-bindings/power/qcom,rpmhpd.h>
@@ -142,6 +153,13 @@ examples: · 65 unmodified lines
142 remote-endpoint = <&mdss_dp0_in>;153 remote-endpoint = <&mdss_dp0_in>;
143 };154 };
144 };155 };
156
157 port@1 {
158 reg = <1>;
159 dpu_intf1_out: endpoint {
160 remote-endpoint = <&mdss_dsi0_in>;
161 };
162 };
145 };163 };
146 164
147 mdp_opp_table: opp-table {165 mdp_opp_table: opp-table {
@@ -169,6 +187,88 @@ examples: · 21 unmodified lines
169 };187 };
170 };188 };
171 189
190 dsi@ae94000 {
191 compatible = "qcom,qcs8300-dsi-ctrl",
192 "qcom,sa8775p-dsi-ctrl",
193 "qcom,mdss-dsi-ctrl";
194 reg = <0x0ae94000 0x400>;
195 reg-names = "dsi_ctrl";
196
197 interrupt-parent = <&mdss>;
198 interrupts = <4>;
199
200 clocks = <&dispcc MDSS_DISP_CC_MDSS_BYTE0_CLK>,
201 <&dispcc MDSS_DISP_CC_MDSS_BYTE0_INTF_CLK>,
202 <&dispcc MDSS_DISP_CC_MDSS_PCLK0_CLK>,
203 <&dispcc MDSS_DISP_CC_MDSS_ESC0_CLK>,
204 <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
205 <&gcc GCC_DISP_HF_AXI_CLK>;
206 clock-names = "byte",
207 "byte_intf",
208 "pixel",
209 "core",
210 "iface",
211 "bus";
212 assigned-clocks = <&dispcc MDSS_DISP_CC_MDSS_BYTE0_CLK_SRC>,
213 <&dispcc MDSS_DISP_CC_MDSS_PCLK0_CLK_SRC>;
214 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
215 phys = <&mdss_dsi0_phy>;
216
217 operating-points-v2 = <&dsi0_opp_table>;
218 power-domains = <&rpmhpd RPMHPD_MMCX>;
219
220 vdda-supply = <&vreg_l5a>;
221
222 #address-cells = <1>;
223 #size-cells = <0>;
224
225 ports {
226 #address-cells = <1>;
227 #size-cells = <0>;
228
229 port@0 {
230 reg = <0>;
231 mdss0_dsi0_in: endpoint {
232 remote-endpoint = <&dpu_intf1_out>;
233 };
234 };
235
236 port@1 {
237 reg = <1>;
238 mdss0_dsi0_out: endpoint { };
239 };
240 };
241
242 dsi0_opp_table: opp-table {
243 compatible = "operating-points-v2";
244
245 opp-358000000 {
246 opp-hz = /bits/ 64 <358000000>;
247 required-opps = <&rpmhpd_opp_svs_l1>;
248 };
249 };
250 };
251
252 mdss_dsi0_phy: phy@ae94400 {
253 compatible = "qcom,qcs8300-dsi-phy-5nm",
254 "qcom,sa8775p-dsi-phy-5nm";
255 reg = <0x0ae94400 0x200>,
256 <0x0ae94600 0x280>,
257 <0x0ae94900 0x27c>;
258 reg-names = "dsi_phy",
259 "dsi_phy_lane",
260 "dsi_pll";
261
262 #clock-cells = <1>;
263 #phy-cells = <0>;
264
265 clocks = <&dispcc MDSS_DISP_CC_MDSS_AHB_CLK>,
266 <&rpmhcc RPMH_CXO_CLK>;
267 clock-names = "iface", "ref";
268
269 vdds-supply = <&vreg_l4a>;
270 };
271
172 mdss_dp0_phy: phy@aec2a00 {272 mdss_dp0_phy: phy@aec2a00 {
173 compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";273 compatible = "qcom,qcs8300-edp-phy", "qcom,sa8775p-edp-phy";
174 274
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml+1−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 oneOf:16 oneOf:
17 - enum:17 - enum:
18 - qcom,glymur-dpu18 - qcom,glymur-dpu
19 - qcom,kaanapali-dpu
19 - qcom,sa8775p-dpu20 - qcom,sa8775p-dpu
20 - qcom,sm8650-dpu21 - qcom,sm8650-dpu
21 - qcom,sm8750-dpu22 - qcom,sm8750-dpu
Documentation/devicetree/bindings/display/panel/jadard,jd9365da-h3.yaml+2−0
@@ -16,6 +16,8 @@ properties: · 15 unmodified lines
16 compatible:16 compatible:
17 items:17 items:
18 - enum:18 - enum:
19 - anbernic,rg-ds-display-bottom
20 - anbernic,rg-ds-display-top
19 - chongzhou,cz101b400121 - chongzhou,cz101b4001
20 - kingdisplay,kd101ne3-40ti22 - kingdisplay,kd101ne3-40ti
21 - melfas,lmfbx10111748023 - melfas,lmfbx101117480
Documentation/devicetree/bindings/display/panel/lg,sw43408.yaml+9−4
@@ -4,14 +4,16 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#4$id: http://devicetree.org/schemas/display/panel/lg,sw43408.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: LG SW43408 1080x2160 DSI panel7title: LG SW43408 AMOLED DDIC
8 8
9maintainers:9maintainers:
10 - Casey Connolly <casey.connolly@linaro.org>10 - Casey Connolly <casey.connolly@linaro.org>
11 11
12description:12description:
13 This panel is used on the Pixel 3, it is a 60hz OLED panel which13 The SW43408 is display driver IC with connected panel.
14 required DSC (Display Stream Compression) and has rounded corners.14
15 LG LH546WF1-ED01 panel is used on the Pixel 3, it is a 60hz OLED panel
16 which required DSC (Display Stream Compression) and has rounded corners.
15 17
16allOf:18allOf:
17 - $ref: panel-common.yaml#19 - $ref: panel-common.yaml#
@@ -19,6 +21,9 @@ allOf: · 1 unmodified line
19properties:21properties:
20 compatible:22 compatible:
21 items:23 items:
24 - enum:
25 # LG 5.46 inch, 1080x2160 pixels, 18:9 ratio
26 - lg,sw43408-lh546wf1-ed01
22 - const: lg,sw4340827 - const: lg,sw43408
23 28
24 reg:29 reg:
@@ -46,7 +51,7 @@ examples: · 21 unmodified lines
46 #size-cells = <0>;51 #size-cells = <0>;
47 52
48 panel@0 {53 panel@0 {
49 compatible = "lg,sw43408";54 compatible = "lg,sw43408-lh546wf1-ed01", "lg,sw43408";
50 reg = <0>;55 reg = <0>;
51 56
52 vddi-supply = <&vreg_l14a_1p88>;57 vddi-supply = <&vreg_l14a_1p88>;
Documentation/devicetree/bindings/display/panel/panel-simple-dsi.yaml+2−0
@@ -55,6 +55,8 @@ properties: · 54 unmodified lines
55 - panasonic,vvx10f004b0055 - panasonic,vvx10f004b00
56 # Panasonic 10" WUXGA TFT LCD panel56 # Panasonic 10" WUXGA TFT LCD panel
57 - panasonic,vvx10f034n0057 - panasonic,vvx10f034n00
58 # Samsung ltl106hl02 10.6" Full HD TFT LCD panel
59 - samsung,ltl106hl02-001
58 # Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel60 # Samsung s6e3fa7 1080x2220 based AMS559NK06 AMOLED panel
59 - samsung,s6e3fa7-ams559nk0661 - samsung,s6e3fa7-ams559nk06
60 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel62 # Shangai Top Display Optoelectronics 7" TL070WSH30 1024x600 TFT LCD panel
Documentation/devicetree/bindings/display/panel/panel-simple.yaml+7−1
@@ -154,6 +154,8 @@ properties: · 153 unmodified lines
154 - hannstar,hsd070pww1154 - hannstar,hsd070pww1
155 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel155 # HannStar Display Corp. HSD100PXN1 10.1" XGA LVDS panel
156 - hannstar,hsd100pxn1156 - hannstar,hsd100pxn1
157 # HannStar Display Corp. HSD156JUW2 15.6" FHD (1920x1080) TFT LCD panel
158 - hannstar,hsd156juw2
157 # Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel159 # Hitachi Ltd. Corporation 9" WVGA (800x480) TFT LCD panel
158 - hit,tx23d38vm0caa160 - hit,tx23d38vm0caa
159 # Innolux AT043TN24 4.3" WQVGA TFT LCD panel161 # Innolux AT043TN24 4.3" WQVGA TFT LCD panel
@@ -176,6 +178,8 @@ properties: · 16 unmodified lines
176 - innolux,g121x1-l03178 - innolux,g121x1-l03
177 # Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel179 # Innolux Corporation 12.1" G121XCE-L01 XGA (1024x768) TFT LCD panel
178 - innolux,g121xce-l01180 - innolux,g121xce-l01
181 # InnoLux 15.0" G150XGE-L05 XGA (1024x768) TFT LCD panel
182 - innolux,g150xge-l05
179 # InnoLux 15.6" FHD (1920x1080) TFT LCD panel183 # InnoLux 15.6" FHD (1920x1080) TFT LCD panel
180 - innolux,g156hce-l01184 - innolux,g156hce-l01
181 # InnoLux 13.3" FHD (1920x1080) TFT LCD panel185 # InnoLux 13.3" FHD (1920x1080) TFT LCD panel
@@ -347,7 +351,9 @@ if: · 165 unmodified lines
347 properties:351 properties:
348 compatible:352 compatible:
349 contains:353 contains:
350 const: innolux,g101ice-l01354 enum:
355 - innolux,g101ice-l01
356 - yes-optoelectronics,ytc700tlag-05-201c
351then:357then:
352 properties:358 properties:
353 data-mapping: false359 data-mapping: false
Documentation/devicetree/bindings/display/panel/samsung,s6e3fc2x01.yaml+8−12
@@ -6,11 +6,11 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 5 unmodified lines
6 6
7title: Samsung S6E3FC2X01 AMOLED DDIC7title: Samsung S6E3FC2X01 AMOLED DDIC
8 8
9description: The S6E3FC2X01 is display driver IC with connected panel.
10
11maintainers:9maintainers:
12 - David Heidelberg <david@ixit.cz>10 - David Heidelberg <david@ixit.cz>
13 11
12description: The S6E3FC2X01 is display driver IC with connected panel.
13
14allOf:14allOf:
15 - $ref: panel-common.yaml#15 - $ref: panel-common.yaml#
16 16
@@ -25,25 +25,21 @@ properties: · 8 unmodified lines
25 reg:25 reg:
26 maxItems: 126 maxItems: 1
27 27
28 reset-gpios: true28 poc-supply:
29 29 description: POC regulator
30 port: true
31
32 vddio-supply:
33 description: VDD regulator
34 30
35 vci-supply:31 vci-supply:
36 description: VCI regulator32 description: VCI regulator
37 33
38 poc-supply:34 vddio-supply:
39 description: POC regulator35 description: VDD regulator
40 36
41required:37required:
42 - compatible38 - compatible
43 - reset-gpios39 - reset-gpios
44 - vddio-supply
45 - vci-supply
46 - poc-supply40 - poc-supply
41 - vci-supply
42 - vddio-supply
47 43
48unevaluatedProperties: false44unevaluatedProperties: false
49 45
Documentation/devicetree/bindings/display/panel/sitronix,st7789v.yaml+3−2
@@ -34,8 +34,9 @@ properties: · 33 unmodified lines
34 spi-cpol: true34 spi-cpol: true
35 35
36 spi-rx-bus-width:36 spi-rx-bus-width:
37 minimum: 037 items:
38 maximum: 138 minimum: 0
39 maximum: 1
39 40
40 dc-gpios:41 dc-gpios:
41 maxItems: 142 maxItems: 1
Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml+1−0
@@ -23,6 +23,7 @@ properties: · 22 unmodified lines
23 - rockchip,rk3228-dw-hdmi23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi25 - rockchip,rk3328-dw-hdmi
26 - rockchip,rk3368-dw-hdmi
26 - rockchip,rk3399-dw-hdmi27 - rockchip,rk3399-dw-hdmi
27 - rockchip,rk3568-dw-hdmi28 - rockchip,rk3568-dw-hdmi
28 29
Documentation/devicetree/bindings/display/rockchip/rockchip,dw-mipi-dsi.yaml+2−0
@@ -19,6 +19,7 @@ properties: · 18 unmodified lines
19 - rockchip,rk3288-mipi-dsi19 - rockchip,rk3288-mipi-dsi
20 - rockchip,rk3368-mipi-dsi20 - rockchip,rk3368-mipi-dsi
21 - rockchip,rk3399-mipi-dsi21 - rockchip,rk3399-mipi-dsi
22 - rockchip,rk3506-mipi-dsi
22 - rockchip,rk3568-mipi-dsi23 - rockchip,rk3568-mipi-dsi
23 - rockchip,rv1126-mipi-dsi24 - rockchip,rv1126-mipi-dsi
24 - const: snps,dw-mipi-dsi25 - const: snps,dw-mipi-dsi
@@ -75,6 +76,7 @@ allOf: · 50 unmodified lines
75 - rockchip,px30-mipi-dsi76 - rockchip,px30-mipi-dsi
76 - rockchip,rk3128-mipi-dsi77 - rockchip,rk3128-mipi-dsi
77 - rockchip,rk3368-mipi-dsi78 - rockchip,rk3368-mipi-dsi
79 - rockchip,rk3506-mipi-dsi
78 - rockchip,rk3568-mipi-dsi80 - rockchip,rk3568-mipi-dsi
79 - rockchip,rv1126-mipi-dsi81 - rockchip,rv1126-mipi-dsi
80 82
Documentation/devicetree/bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml+6−0
@@ -69,6 +69,12 @@ properties: · 68 unmodified lines
69 - const: main69 - const: main
70 - const: hpd70 - const: hpd
71 71
72 no-hpd:
73 type: boolean
74 description:
75 The HPD pin is not present or used for another purpose, and the EDID
76 must be polled instead to determine if a device is attached.
77
72 phys:78 phys:
73 maxItems: 179 maxItems: 1
74 description: The HDMI/eDP PHY80 description: The HDMI/eDP PHY
Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml+1−0
@@ -31,6 +31,7 @@ properties: · 30 unmodified lines
31 - rockchip,rk3368-vop31 - rockchip,rk3368-vop
32 - rockchip,rk3399-vop-big32 - rockchip,rk3399-vop-big
33 - rockchip,rk3399-vop-lit33 - rockchip,rk3399-vop-lit
34 - rockchip,rk3506-vop
34 - rockchip,rv1126-vop35 - rockchip,rv1126-vop
35 36
36 reg:37 reg:
Documentation/devicetree/bindings/display/sitronix,st7571.yaml+25−0
@@ -76,3 +76,28 @@ examples: · 75 unmodified lines
76 };76 };
77 };77 };
78 };78 };
79
80 spi {
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 display@0 {
85 compatible = "sitronix,st7571";
86 reg = <0>;
87 reset-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
88 width-mm = <37>;
89 height-mm = <27>;
90
91 panel-timing {
92 hactive = <128>;
93 vactive = <96>;
94 hback-porch = <0>;
95 vback-porch = <0>;
96 clock-frequency = <0>;
97 hfront-porch = <0>;
98 hsync-len = <0>;
99 vfront-porch = <0>;
100 vsync-len = <0>;
101 };
102 };
103 };
Documentation/devicetree/bindings/display/sitronix,st7920.yaml+58−0
@@ -0,0 +1,58 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/sitronix,st7920.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Sitronix ST7920 LCD Display Controllers
8
9maintainers:
10 - Iker Pedrosa <ikerpedrosam@gmail.com>
11
12description:
13 The Sitronix ST7920 is a controller for monochrome dot-matrix graphical LCDs,
14 most commonly used for 128x64 pixel displays.
15
16properties:
17 compatible:
18 const: sitronix,st7920
19
20 reg:
21 maxItems: 1
22
23 vdd-supply:
24 description: Regulator that provides 5V Vdd power supply
25
26 reset-gpios:
27 maxItems: 1
28
29 spi-max-frequency:
30 maximum: 600000
31
32required:
33 - compatible
34 - reg
35 - spi-max-frequency
36
37allOf:
38 - $ref: /schemas/spi/spi-peripheral-props.yaml#
39
40unevaluatedProperties: false
41
42examples:
43 - |
44 #include <dt-bindings/gpio/gpio.h>
45
46 spi {
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 display@0 {
51 compatible = "sitronix,st7920";
52 reg = <0>;
53 vdd-supply = <&reg_5v>;
54 reset-gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
55 spi-max-frequency = <600000>;
56 spi-cs-high;
57 };
58 };
Documentation/devicetree/bindings/display/tegra/nvidia,tegra114-mipi.yaml+1−0
@@ -18,6 +18,7 @@ properties: · 17 unmodified lines
18 enum:18 enum:
19 - nvidia,tegra114-mipi19 - nvidia,tegra114-mipi
20 - nvidia,tegra124-mipi20 - nvidia,tegra124-mipi
21 - nvidia,tegra132-mipi
21 - nvidia,tegra210-mipi22 - nvidia,tegra210-mipi
22 - nvidia,tegra186-mipi23 - nvidia,tegra186-mipi
23 24
Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml+12−7
@@ -16,16 +16,21 @@ properties: · 15 unmodified lines
16 16
17 compatible:17 compatible:
18 oneOf:18 oneOf:
19 - const: nvidia,tegra20-vi19 - enum:
20 - const: nvidia,tegra30-vi20 - nvidia,tegra20-vi
21 - const: nvidia,tegra114-vi21 - nvidia,tegra114-vi
22 - const: nvidia,tegra124-vi22 - nvidia,tegra124-vi
23 - nvidia,tegra210-vi
24 - nvidia,tegra186-vi
25 - nvidia,tegra194-vi
26
27 - items:
28 - const: nvidia,tegra30-vi
29 - const: nvidia,tegra20-vi
30
23 - items:31 - items:
24 - const: nvidia,tegra132-vi32 - const: nvidia,tegra132-vi
25 - const: nvidia,tegra124-vi33 - const: nvidia,tegra124-vi
26 - const: nvidia,tegra210-vi
27 - const: nvidia,tegra186-vi
28 - const: nvidia,tegra194-vi
29 34
30 reg:35 reg:
31 maxItems: 136 maxItems: 1
Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml+7−2
@@ -11,8 +11,13 @@ maintainers: · 10 unmodified lines
11 11
12properties:12properties:
13 compatible:13 compatible:
14 enum:14 oneOf:
15 - nvidia,tegra20-vip15 - enum:
16 - nvidia,tegra20-vip
17
18 - items:
19 - const: nvidia,tegra30-vip
20 - const: nvidia,tegra20-vip
16 21
17 ports:22 ports:
18 $ref: /schemas/graph.yaml#/properties/ports23 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/dma/arm-pl08x.yaml+1−1
@@ -4,7 +4,7 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#4$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller7title: ARM PrimeCell PL080 and PL081 and derivatives DMA controller
8 8
9maintainers:9maintainers:
10 - Vinod Koul <vkoul@kernel.org>10 - Vinod Koul <vkoul@kernel.org>
Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml+3−1
@@ -33,7 +33,9 @@ properties: · 32 unmodified lines
33 - microchip,sam9x7-dma33 - microchip,sam9x7-dma
34 - const: atmel,sama5d4-dma34 - const: atmel,sama5d4-dma
35 - items:35 - items:
36 - const: microchip,sama7d65-dma36 - enum:
37 - microchip,lan9691-dma
38 - microchip,sama7d65-dma
37 - const: microchip,sama7g5-dma39 - const: microchip,sama7g5-dma
38 40
39 "#dma-cells":41 "#dma-cells":
Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml+20−0
@@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: MediaTek UART APDMA controller7title: MediaTek UART APDMA controller
8 8
9maintainers:9maintainers:
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
10 - Long Cheng <long.cheng@mediatek.com>11 - Long Cheng <long.cheng@mediatek.com>
11 12
12description: |13description: |
@@ -23,11 +24,29 @@ properties: · 10 unmodified lines
23 - enum:24 - enum:
24 - mediatek,mt2712-uart-dma25 - mediatek,mt2712-uart-dma
25 - mediatek,mt6795-uart-dma26 - mediatek,mt6795-uart-dma
27 - mediatek,mt8173-uart-dma
28 - mediatek,mt8183-uart-dma
26 - mediatek,mt8365-uart-dma29 - mediatek,mt8365-uart-dma
27 - mediatek,mt8516-uart-dma30 - mediatek,mt8516-uart-dma
28 - const: mediatek,mt6577-uart-dma31 - const: mediatek,mt6577-uart-dma
32 - items:
33 - enum:
34 - mediatek,mt7988-uart-dma
35 - mediatek,mt8186-uart-dma
36 - mediatek,mt8188-uart-dma
37 - mediatek,mt8192-uart-dma
38 - mediatek,mt8195-uart-dma
39 - const: mediatek,mt6835-uart-dma
40 - items:
41 - enum:
42 - mediatek,mt6991-uart-dma
43 - mediatek,mt8196-uart-dma
44 - const: mediatek,mt6985-uart-dma
29 - enum:45 - enum:
30 - mediatek,mt6577-uart-dma46 - mediatek,mt6577-uart-dma
47 - mediatek,mt6795-uart-dma
48 - mediatek,mt6835-uart-dma
49 - mediatek,mt6985-uart-dma
31 50
32 reg:51 reg:
33 minItems: 152 minItems: 1
@@ -58,6 +77,7 @@ properties: · 24 unmodified lines
58 77
59 mediatek,dma-33bits:78 mediatek,dma-33bits:
60 type: boolean79 type: boolean
80 deprecated: true
61 description: Enable 33-bits UART APDMA support81 description: Enable 33-bits UART APDMA support
62 82
63required:83required:
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml+14−1
@@ -46,7 +46,7 @@ properties: · 45 unmodified lines
46 Should contain all of the per-channel DMA interrupts in46 Should contain all of the per-channel DMA interrupts in
47 ascending order with respect to the DMA channel index.47 ascending order with respect to the DMA channel index.
48 minItems: 148 minItems: 1
49 maxItems: 3249 maxItems: 64
50 50
51 clocks:51 clocks:
52 description: Must contain one entry for the ADMA module clock52 description: Must contain one entry for the ADMA module clock
@@ -86,6 +86,19 @@ allOf: · 33 unmodified lines
86 reg:86 reg:
87 items:87 items:
88 - description: Full address space range of DMA registers.88 - description: Full address space range of DMA registers.
89 interrupts:
90 maxItems: 22
91
92 - if:
93 properties:
94 compatible:
95 contains:
96 enum:
97 - nvidia,tegra186-adma
98 then:
99 properties:
100 interrupts:
101 maxItems: 32
89 102
90 - if:103 - if:
91 properties:104 properties:
Documentation/devicetree/bindings/dma/qcom,gpi.yaml+3−1
@@ -24,6 +24,8 @@ properties: · 23 unmodified lines
24 - qcom,sm6350-gpi-dma24 - qcom,sm6350-gpi-dma
25 - items:25 - items:
26 - enum:26 - enum:
27 - qcom,glymur-gpi-dma
28 - qcom,kaanapali-gpi-dma
27 - qcom,milos-gpi-dma29 - qcom,milos-gpi-dma
28 - qcom,qcm2290-gpi-dma30 - qcom,qcm2290-gpi-dma
29 - qcom,qcs8300-gpi-dma31 - qcom,qcs8300-gpi-dma
@@ -58,7 +60,7 @@ properties: · 28 unmodified lines
58 description:60 description:
59 Interrupt lines for each GPI instance61 Interrupt lines for each GPI instance
60 minItems: 162 minItems: 1
61 maxItems: 1363 maxItems: 16
62 64
63 "#dma-cells":65 "#dma-cells":
64 const: 366 const: 3
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml+1−0
@@ -24,6 +24,7 @@ properties: · 23 unmodified lines
24 - items:24 - items:
25 - enum:25 - enum:
26 - renesas,r9a09g047-dmac # RZ/G3E26 - renesas,r9a09g047-dmac # RZ/G3E
27 - renesas,r9a09g056-dmac # RZ/V2N
27 - const: renesas,r9a09g057-dmac28 - const: renesas,r9a09g057-dmac
28 29
29 - const: renesas,r9a09g057-dmac # RZ/V2H(P)30 - const: renesas,r9a09g057-dmac # RZ/V2H(P)
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml+9−5
@@ -17,11 +17,15 @@ allOf: · 16 unmodified lines
17 17
18properties:18properties:
19 compatible:19 compatible:
20 enum:20 oneOf:
21 - snps,axi-dma-1.01a21 - enum:
22 - intel,kmb-axi-dma22 - snps,axi-dma-1.01a
23 - starfive,jh7110-axi-dma23 - intel,kmb-axi-dma
24 - starfive,jh8100-axi-dma24 - starfive,jh7110-axi-dma
25 - starfive,jh8100-axi-dma
26 - items:
27 - const: altr,agilex5-axi-dma
28 - const: snps,axi-dma-1.01a
25 29
26 reg:30 reg:
27 minItems: 131 minItems: 1
Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: MediaTek mt8186 DSP core7title: MediaTek mt8186 DSP core
8 8
9maintainers:9maintainers:
10 - Tinghan Shen <tinghan.shen@mediatek.com>10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 11
12description: |12description: |
13 MediaTek mt8186 SoC contains a DSP core used for13 MediaTek mt8186 SoC contains a DSP core used for
Documentation/devicetree/bindings/eeprom/at24.yaml+4−0
@@ -116,6 +116,7 @@ properties: · 115 unmodified lines
116 - const: atmel,24c02116 - const: atmel,24c02
117 - items:117 - items:
118 - enum:118 - enum:
119 - belling,bl24c04a
119 - giantec,gt24c04a120 - giantec,gt24c04a
120 - onnn,cat24c04121 - onnn,cat24c04
121 - onnn,cat24c05122 - onnn,cat24c05
@@ -124,6 +125,7 @@ properties: · 2 unmodified lines
124 - items:125 - items:
125 - enum:126 - enum:
126 - belling,bl24c16a127 - belling,bl24c16a
128 - belling,bl24c16f
127 - renesas,r1ex24016129 - renesas,r1ex24016
128 - const: atmel,24c16130 - const: atmel,24c16
129 - items:131 - items:
@@ -132,6 +134,7 @@ properties: · 2 unmodified lines
132 - items:134 - items:
133 - enum:135 - enum:
134 - belling,bl24s64136 - belling,bl24s64
137 - giantec,gt24p64a
135 - onnn,n24s64b138 - onnn,n24s64b
136 - puya,p24c64f139 - puya,p24c64f
137 - const: atmel,24c64140 - const: atmel,24c64
@@ -139,6 +142,7 @@ properties: · 1 unmodified line
139 - enum:142 - enum:
140 - giantec,gt24p128e143 - giantec,gt24p128e
141 - giantec,gt24p128f144 - giantec,gt24p128f
145 - puya,p24c128f
142 - renesas,r1ex24128146 - renesas,r1ex24128
143 - samsung,s524ad0xd1147 - samsung,s524ad0xd1
144 - const: atmel,24c128148 - const: atmel,24c128
Documentation/devicetree/bindings/eeprom/at25.yaml+1−0
@@ -31,6 +31,7 @@ properties: · 30 unmodified lines
31 - fujitsu,mb85rs1mt31 - fujitsu,mb85rs1mt
32 - fujitsu,mb85rs25632 - fujitsu,mb85rs256
33 - fujitsu,mb85rs6433 - fujitsu,mb85rs64
34 - microchip,25aa010a
34 - microchip,at25160bn35 - microchip,at25160bn
35 - microchip,25lc04036 - microchip,25lc040
36 - st,m95m0237 - st,m95m02
Documentation/devicetree/bindings/embedded-controller/lenovo,yoga-c630-ec.yaml+1−1
@@ -50,7 +50,7 @@ additionalProperties: false · 49 unmodified lines
50examples:50examples:
51 - |+51 - |+
52 #include <dt-bindings/interrupt-controller/irq.h>52 #include <dt-bindings/interrupt-controller/irq.h>
53 i2c1 {53 i2c {
54 clock-frequency = <400000>;54 clock-frequency = <400000>;
55 55
56 #address-cells = <1>;56 #address-cells = <1>;
Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.txt+0−19
@@ -1,19 +0,0 @@
1Turris Mox rWTM firmware driver
2
3Required properties:
4 - compatible : Should be "cznic,turris-mox-rwtm"
5 - mboxes : Must contain a reference to associated mailbox
6
7This device tree node should be used on Turris Mox, or potentially another A3700
8compatible device running the Mox's rWTM firmware in the secure processor (for
9example it is possible to flash this firmware into EspressoBin).
10
11Example:
12
13 firmware {
14 turris-mox-rwtm {
15 compatible = "cznic,turris-mox-rwtm";
16 mboxes = <&rwtm 0>;
17 status = "okay";
18 };
19 };
Documentation/devicetree/bindings/firmware/cznic,turris-mox-rwtm.yaml+40−0
@@ -0,0 +1,40 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/firmware/cznic,turris-mox-rwtm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: CZ.NIC Turris Mox rWTM firmware
8
9maintainers:
10 - Marek Behún <kabel@kernel.org>
11
12description:
13 This device tree node should be used on Turris Mox, or potentially another
14 A3700 compatible device running the Mox's rWTM firmware in the secure
15 processor (for example it is possible to flash this firmware into
16 EspressoBin).
17
18properties:
19 compatible:
20 oneOf:
21 - items:
22 - const: marvell,armada-3700-rwtm-firmware
23 - const: cznic,turris-mox-rwtm
24 - const: marvell,armada-3700-rwtm-firmware
25
26 mboxes:
27 maxItems: 1
28
29required:
30 - compatible
31 - mboxes
32
33additionalProperties: false
34
35examples:
36 - |
37 turris-mox-rwtm {
38 compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm";
39 mboxes = <&rwtm 0>;
40 };
Documentation/devicetree/bindings/firmware/fsl,scu.yaml+11−9
@@ -76,7 +76,8 @@ properties: · 75 unmodified lines
76 - description: TX0 MU channel76 - description: TX0 MU channel
77 - description: RX0 MU channel77 - description: RX0 MU channel
78 - description: optional MU channel for general interrupt78 - description: optional MU channel for general interrupt
79 - items:79 - deprecated: true
80 items:
80 - description: TX0 MU channel81 - description: TX0 MU channel
81 - description: TX1 MU channel82 - description: TX1 MU channel
82 - description: TX2 MU channel83 - description: TX2 MU channel
@@ -85,7 +86,8 @@ properties: · 2 unmodified lines
85 - description: RX1 MU channel86 - description: RX1 MU channel
86 - description: RX2 MU channel87 - description: RX2 MU channel
87 - description: RX3 MU channel88 - description: RX3 MU channel
88 - items:89 - deprecated: true
90 items:
89 - description: TX0 MU channel91 - description: TX0 MU channel
90 - description: TX1 MU channel92 - description: TX1 MU channel
91 - description: TX2 MU channel93 - description: TX2 MU channel
@@ -105,7 +107,8 @@ properties: · 13 unmodified lines
105 - const: tx0107 - const: tx0
106 - const: rx0108 - const: rx0
107 - const: gip3109 - const: gip3
108 - items:110 - deprecated: true
111 items:
109 - const: tx0112 - const: tx0
110 - const: tx1113 - const: tx1
111 - const: tx2114 - const: tx2
@@ -114,7 +117,8 @@ properties: · 2 unmodified lines
114 - const: rx1117 - const: rx1
115 - const: rx2118 - const: rx2
116 - const: rx3119 - const: rx3
117 - items:120 - deprecated: true
121 items:
118 - const: tx0122 - const: tx0
119 - const: tx1123 - const: tx1
120 - const: tx2124 - const: tx2
@@ -167,11 +171,9 @@ examples: · 46 unmodified lines
167 firmware {171 firmware {
168 system-controller {172 system-controller {
169 compatible = "fsl,imx-scu";173 compatible = "fsl,imx-scu";
170 mbox-names = "tx0", "tx1", "tx2", "tx3",174 mbox-names = "tx0", "rx0", "gip3";
171 "rx0", "rx1", "rx2", "rx3",175 mboxes = <&lsio_mu1 0 0
172 "gip3";176 &lsio_mu1 1 0
173 mboxes = <&lsio_mu1 0 0 &lsio_mu1 0 1 &lsio_mu1 0 2 &lsio_mu1 0 3
174 &lsio_mu1 1 0 &lsio_mu1 1 1 &lsio_mu1 1 2 &lsio_mu1 1 3
175 &lsio_mu1 3 3>;177 &lsio_mu1 3 3>;
176 178
177 clock-controller {179 clock-controller {
Documentation/devicetree/bindings/firmware/google,gs101-acpm-ipc.yaml+2−2
@@ -75,7 +75,7 @@ examples: · 74 unmodified lines
75 interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;75 interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
76 76
77 regulators {77 regulators {
78 LDO1 {78 ldo1m {
79 regulator-name = "vdd_ldo1";79 regulator-name = "vdd_ldo1";
80 regulator-min-microvolt = <700000>;80 regulator-min-microvolt = <700000>;
81 regulator-max-microvolt = <1300000>;81 regulator-max-microvolt = <1300000>;
@@ -84,7 +84,7 @@ examples: · 2 unmodified lines
84 84
85 // ...85 // ...
86 86
87 BUCK1 {87 buck8m {
88 regulator-name = "vdd_mif";88 regulator-name = "vdd_mif";
89 regulator-min-microvolt = <450000>;89 regulator-min-microvolt = <450000>;
90 regulator-max-microvolt = <1300000>;90 regulator-max-microvolt = <1300000>;
Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml+21−1
@@ -76,7 +76,6 @@ properties: · 75 unmodified lines
76 type: object76 type: object
77 77
78 pinctrl:78 pinctrl:
79 $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
80 description: The pinctrl node provides access to pinconfig and pincontrol79 description: The pinctrl node provides access to pinconfig and pincontrol
81 functionality available in firmware.80 functionality available in firmware.
82 type: object81 type: object
@@ -104,6 +103,22 @@ properties: · 21 unmodified lines
104 used to encrypt or decrypt the data with provided key and initialization103 used to encrypt or decrypt the data with provided key and initialization
105 vector.104 vector.
106 type: object105 type: object
106 deprecated: true
107
108allOf:
109 - if:
110 properties:
111 compatible:
112 contains:
113 const: xlnx,zynqmp-firmware
114 then:
115 properties:
116 pinctrl:
117 $ref: /schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
118 else:
119 properties:
120 pinctrl:
121 $ref: /schemas/pinctrl/xlnx,versal-pinctrl.yaml#
107 122
108required:123required:
109 - compatible124 - compatible
@@ -115,6 +130,7 @@ examples: · 5 unmodified lines
115 #include <dt-bindings/power/xlnx-zynqmp-power.h>130 #include <dt-bindings/power/xlnx-zynqmp-power.h>
116 firmware {131 firmware {
117 zynqmp_firmware: zynqmp-firmware {132 zynqmp_firmware: zynqmp-firmware {
133 compatible = "xlnx,zynqmp-firmware";
118 #power-domain-cells = <1>;134 #power-domain-cells = <1>;
119 soc-nvmem {135 soc-nvmem {
120 compatible = "xlnx,zynqmp-nvmem-fw";136 compatible = "xlnx,zynqmp-nvmem-fw";
@@ -162,6 +178,10 @@ examples: · 41 unmodified lines
162 compatible = "xlnx,versal-fpga";178 compatible = "xlnx,versal-fpga";
163 };179 };
164 180
181 pinctrl {
182 compatible = "xlnx,versal-pinctrl";
183 };
184
165 xlnx_aes: zynqmp-aes {185 xlnx_aes: zynqmp-aes {
166 compatible = "xlnx,zynqmp-aes";186 compatible = "xlnx,zynqmp-aes";
167 };187 };
Documentation/devicetree/bindings/goldfish/audio.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish Audio
2
3Android goldfish audio device generated by android emulator.
4
5Required properties:
6
7- compatible : should contain "google,goldfish-audio" to match emulator
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 goldfish_audio@9030000 {
14 compatible = "google,goldfish-audio";
15 reg = <0x9030000 0x100>;
16 interrupts = <0x4>;
17 };
Documentation/devicetree/bindings/goldfish/battery.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish Battery
2
3Android goldfish battery device generated by android emulator.
4
5Required properties:
6
7- compatible : should contain "google,goldfish-battery" to match emulator
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 goldfish_battery@9020000 {
14 compatible = "google,goldfish-battery";
15 reg = <0x9020000 0x1000>;
16 interrupts = <0x3>;
17 };
Documentation/devicetree/bindings/goldfish/events.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish Events Keypad
2
3Android goldfish events keypad device generated by android emulator.
4
5Required properties:
6
7- compatible : should contain "google,goldfish-events-keypad" to match emulator
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 goldfish-events@9040000 {
14 compatible = "google,goldfish-events-keypad";
15 reg = <0x9040000 0x1000>;
16 interrupts = <0x5>;
17 };
Documentation/devicetree/bindings/goldfish/pipe.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish QEMU Pipe
2
3Android pipe virtual device generated by android emulator.
4
5Required properties:
6
7- compatible : should contain "google,android-pipe" to match emulator
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 android_pipe@a010000 {
14 compatible = "google,android-pipe";
15 reg = <ff018000 0x2000>;
16 interrupts = <0x12>;
17 };
Documentation/devicetree/bindings/goldfish/tty.txt+0−17
@@ -1,17 +0,0 @@
1Android Goldfish TTY
2
3Android goldfish tty device generated by android emulator.
4
5Required properties:
6
7- compatible : should contain "google,goldfish-tty" to match emulator
8- reg : <registers mapping>
9- interrupts : <interrupt mapping>
10
11Example:
12
13 goldfish_tty@1f004000 {
14 compatible = "google,goldfish-tty";
15 reg = <0x1f004000 0x1000>;
16 interrupts = <0xc>;
17 };
Documentation/devicetree/bindings/gpio/aspeed,sgpio.yaml+3−1
@@ -10,7 +10,8 @@ maintainers: · 9 unmodified lines
10 - Andrew Jeffery <andrew@aj.id.au>10 - Andrew Jeffery <andrew@aj.id.au>
11 11
12description:12description:
13 This SGPIO controller is for ASPEED AST2400, AST2500 and AST2600 SoC,13 This SGPIO controller is for ASPEED AST2400, AST2500, AST2600 and AST2700 SoC,
14 AST2700 have two sgpio master both with 256 pins,
14 AST2600 have two sgpio master one with 128 pins another one with 80 pins,15 AST2600 have two sgpio master one with 128 pins another one with 80 pins,
15 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial16 AST2500/AST2400 have one sgpio master with 80 pins. Each of the Serial
16 GPIO pins can be programmed to support the following options17 GPIO pins can be programmed to support the following options
@@ -27,6 +28,7 @@ properties: · 10 unmodified lines
27 - aspeed,ast2400-sgpio28 - aspeed,ast2400-sgpio
28 - aspeed,ast2500-sgpio29 - aspeed,ast2500-sgpio
29 - aspeed,ast2600-sgpiom30 - aspeed,ast2600-sgpiom
31 - aspeed,ast2700-sgpiom
30 32
31 reg:33 reg:
32 maxItems: 134 maxItems: 1
Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml+107−0
@@ -0,0 +1,107 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/gpio/gpio-line-mux.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: GPIO line mux
8
9maintainers:
10 - Jonas Jelonek <jelonek.jonas@gmail.com>
11
12description: |
13 A GPIO controller to provide virtual GPIOs for a 1-to-many input-only mapping
14 backed by a single shared GPIO and a multiplexer. A simple illustrated
15 example is:
16
17 +----- A
18 IN /
19 <-----o------- B
20 / |\
21 | | +----- C
22 | | \
23 | | +--- D
24 | |
25 M1 M0
26
27 MUX CONTROL
28
29 M1 M0 IN
30 0 0 A
31 0 1 B
32 1 0 C
33 1 1 D
34
35 This can be used in case a real GPIO is connected to multiple inputs and
36 controlled by a multiplexer, and another subsystem/driver does not work
37 directly with the multiplexer subsystem.
38
39properties:
40 compatible:
41 const: gpio-line-mux
42
43 gpio-controller: true
44
45 "#gpio-cells":
46 const: 2
47
48 gpio-line-mux-states:
49 description: Mux states corresponding to the virtual GPIOs.
50 $ref: /schemas/types.yaml#/definitions/uint32-array
51
52 gpio-line-names: true
53
54 mux-controls:
55 maxItems: 1
56 description:
57 Phandle to the multiplexer to control access to the GPIOs.
58
59 ngpios: false
60
61 muxed-gpios:
62 maxItems: 1
63 description:
64 GPIO which is the '1' in 1-to-many and is shared by the virtual GPIOs
65 and controlled via the mux.
66
67required:
68 - compatible
69 - gpio-controller
70 - gpio-line-mux-states
71 - mux-controls
72 - muxed-gpios
73
74additionalProperties: false
75
76examples:
77 - |
78 #include <dt-bindings/gpio/gpio.h>
79 #include <dt-bindings/mux/mux.h>
80
81 sfp_gpio_mux: mux-controller-1 {
82 compatible = "gpio-mux";
83 mux-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>,
84 <&gpio0 1 GPIO_ACTIVE_HIGH>;
85 #mux-control-cells = <0>;
86 idle-state = <MUX_IDLE_AS_IS>;
87 };
88
89 sfp1_gpio: sfp-gpio-1 {
90 compatible = "gpio-line-mux";
91 gpio-controller;
92 #gpio-cells = <2>;
93
94 mux-controls = <&sfp_gpio_mux>;
95 muxed-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
96
97 gpio-line-mux-states = <0>, <1>, <3>;
98 };
99
100 sfp1: sfp-p1 {
101 compatible = "sff,sfp";
102
103 i2c-bus = <&sfp1_i2c>;
104 los-gpios = <&sfp1_gpio 0 GPIO_ACTIVE_HIGH>;
105 mod-def0-gpios = <&sfp1_gpio 1 GPIO_ACTIVE_LOW>;
106 tx-fault-gpios = <&sfp1_gpio 2 GPIO_ACTIVE_HIGH>;
107 };
Documentation/devicetree/bindings/gpio/gpio-mmio.yaml+2−1
@@ -20,9 +20,10 @@ properties: · 19 unmodified lines
20 compatible:20 compatible:
21 enum:21 enum:
22 - brcm,bcm6345-gpio22 - brcm,bcm6345-gpio
23 - intel,ixp4xx-expansion-bus-mmio-gpio
23 - ni,169445-nand-gpio24 - ni,169445-nand-gpio
25 - opencores,gpio
24 - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller26 - wd,mbl-gpio # Western Digital MyBook Live memory-mapped GPIO controller
25 - intel,ixp4xx-expansion-bus-mmio-gpio
26 27
27 big-endian: true28 big-endian: true
28 29
Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml+2−0
@@ -74,6 +74,8 @@ properties: · 73 unmodified lines
74 - ti,tca953874 - ti,tca9538
75 - ti,tca953975 - ti,tca9539
76 - ti,tca955476 - ti,tca9554
77 - ti,tcal6408
78 - ti,tcal6416
77 79
78 reg:80 reg:
79 maxItems: 181 maxItems: 1
Documentation/devicetree/bindings/gpio/nvidia,tegra186-gpio.yaml+22−0
@@ -86,6 +86,9 @@ properties: · 85 unmodified lines
86 - nvidia,tegra234-gpio86 - nvidia,tegra234-gpio
87 - nvidia,tegra234-gpio-aon87 - nvidia,tegra234-gpio-aon
88 - nvidia,tegra256-gpio88 - nvidia,tegra256-gpio
89 - nvidia,tegra264-gpio
90 - nvidia,tegra264-gpio-uphy
91 - nvidia,tegra264-gpio-aon
89 92
90 reg-names:93 reg-names:
91 items:94 items:
@@ -110,6 +113,10 @@ properties: · 18 unmodified lines
110 ports, in the order the HW manual describes them. The number of entries113 ports, in the order the HW manual describes them. The number of entries
111 required varies depending on compatible value.114 required varies depending on compatible value.
112 115
116 wakeup-parent:
117 description: Phandle to the parent interrupt controller used for wake-up. On
118 Tegra, this typically references the PMC interrupt controller.
119
113 gpio-controller: true120 gpio-controller: true
114 121
115 gpio-ranges:122 gpio-ranges:
@@ -157,6 +164,8 @@ allOf: · 41 unmodified lines
157 - nvidia,tegra194-gpio164 - nvidia,tegra194-gpio
158 - nvidia,tegra234-gpio165 - nvidia,tegra234-gpio
159 - nvidia,tegra256-gpio166 - nvidia,tegra256-gpio
167 - nvidia,tegra264-gpio
168 - nvidia,tegra264-gpio-uphy
160 then:169 then:
161 properties:170 properties:
162 interrupts:171 interrupts:
@@ -171,12 +180,25 @@ allOf: · 8 unmodified lines
171 - nvidia,tegra186-gpio-aon180 - nvidia,tegra186-gpio-aon
172 - nvidia,tegra194-gpio-aon181 - nvidia,tegra194-gpio-aon
173 - nvidia,tegra234-gpio-aon182 - nvidia,tegra234-gpio-aon
183 - nvidia,tegra264-gpio-aon
174 then:184 then:
175 properties:185 properties:
176 interrupts:186 interrupts:
177 minItems: 1187 minItems: 1
178 maxItems: 4188 maxItems: 4
179 189
190 - if:
191 properties:
192 compatible:
193 contains:
194 enum:
195 - nvidia,tegra264-gpio
196 - nvidia,tegra264-gpio-uphy
197 - nvidia,tegra264-gpio-aon
198 then:
199 required:
200 - wakeup-parent
201
180required:202required:
181 - compatible203 - compatible
182 - reg204 - reg
Documentation/devicetree/bindings/gpio/spacemit,k1-gpio.yaml+3−1
@@ -19,7 +19,9 @@ properties: · 18 unmodified lines
19 pattern: "^gpio@[0-9a-f]+$"19 pattern: "^gpio@[0-9a-f]+$"
20 20
21 compatible:21 compatible:
22 const: spacemit,k1-gpio22 enum:
23 - spacemit,k1-gpio
24 - spacemit,k3-gpio
23 25
24 reg:26 reg:
25 maxItems: 127 maxItems: 1
Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml+14−0
@@ -51,6 +51,14 @@ properties: · 50 unmodified lines
51 - stacks51 - stacks
52 - const: stacks52 - const: stacks
53 53
54 nvmem-cells:
55 items:
56 - description: bitmask of functional shader cores
57
58 nvmem-cell-names:
59 items:
60 - const: shader-present
61
54 mali-supply: true62 mali-supply: true
55 63
56 operating-points-v2: true64 operating-points-v2: true
@@ -108,6 +116,8 @@ allOf: · 51 unmodified lines
108 properties:116 properties:
109 clocks:117 clocks:
110 minItems: 3118 minItems: 3
119 nvmem-cells: false
120 nvmem-cell-names: false
111 power-domains:121 power-domains:
112 maxItems: 1122 maxItems: 1
113 power-domain-names: false123 power-domain-names: false
@@ -133,6 +143,8 @@ allOf: · 19 unmodified lines
133 - const: core143 - const: core
134 - const: stacks144 - const: stacks
135 required:145 required:
146 - nvmem-cells
147 - nvmem-cell-names
136 - power-domains148 - power-domains
137 149
138examples:150examples:
@@ -179,6 +191,8 @@ examples: · 40 unmodified lines
179 <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>,191 <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH 0>,
180 <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>;192 <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH 0>;
181 interrupt-names = "job", "mmu", "gpu";193 interrupt-names = "job", "mmu", "gpu";
194 nvmem-cells = <&shader_present>;
195 nvmem-cell-names = "shader-present";
182 power-domains = <&gpufreq>;196 power-domains = <&gpufreq>;
183 };197 };
184 198
Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml+2−0
@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40 - const: img,img-rogue40 - const: img,img-rogue
41 - items:41 - items:
42 - enum:42 - enum:
43 - ti,am62p-gpu
43 - ti,j721s2-gpu44 - ti,j721s2-gpu
44 - const: img,img-bxs-4-6445 - const: img,img-bxs-4-64
45 - const: img,img-rogue46 - const: img,img-rogue
@@ -100,6 +101,7 @@ allOf: · 54 unmodified lines
100 contains:101 contains:
101 enum:102 enum:
102 - ti,am62-gpu103 - ti,am62-gpu
104 - ti,am62p-gpu
103 - ti,j721s2-gpu105 - ti,j721s2-gpu
104 then:106 then:
105 properties:107 properties:
Documentation/devicetree/bindings/hwmon/aspeed,ast2400-pwm-tacho.yaml+106−0
@@ -0,0 +1,106 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/aspeed,ast2400-pwm-tacho.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ASPEED AST2400/AST2500 PWM and Fan Tacho controller
8
9maintainers:
10 - Joel Stanley <joel@jms.id.au>
11 - Andrew Jeffery <andrew@codeconstruct.com.au>
12
13description: >
14 The ASPEED PWM controller can support up to 8 PWM outputs. The ASPEED Fan
15 Tacho controller can support up to 16 Fan tachometer inputs.
16
17 There can be up to 8 fans supported. Each fan can have 1 PWM output and
18 1-2 Fan tach inputs.
19
20properties:
21 compatible:
22 enum:
23 - aspeed,ast2400-pwm-tacho
24 - aspeed,ast2500-pwm-tacho
25
26 reg:
27 maxItems: 1
28
29 '#address-cells':
30 const: 1
31
32 '#size-cells':
33 const: 0
34
35 '#cooling-cells':
36 const: 2
37
38 clocks:
39 maxItems: 1
40
41 resets:
42 maxItems: 1
43
44patternProperties:
45 '^fan@[0-7]$':
46 description: Fan subnode
47 type: object
48 additionalProperties: false
49
50 properties:
51 reg:
52 description: PWM source port index (0 = PWM A, ..., 7 = PWM H)
53 maximum: 7
54
55 cooling-levels:
56 description: PWM duty cycle values for cooling states
57 $ref: /schemas/types.yaml#/definitions/uint8-array
58 minItems: 1
59 maxItems: 16 # Should be enough
60
61 aspeed,fan-tach-ch:
62 description: Fan tachometer input channel
63 $ref: /schemas/types.yaml#/definitions/uint8-array
64 minItems: 1
65 maxItems: 2
66 items:
67 maximum: 15
68
69 required:
70 - reg
71 - aspeed,fan-tach-ch
72
73required:
74 - compatible
75 - reg
76 - '#address-cells'
77 - '#size-cells'
78 - clocks
79 - resets
80
81additionalProperties: false
82
83examples:
84 - |
85 #include <dt-bindings/clock/aspeed-clock.h>
86
87 fan-controller@1e786000 {
88 compatible = "aspeed,ast2500-pwm-tacho";
89 reg = <0x1e786000 0x1000>;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 #cooling-cells = <2>;
93 clocks = <&syscon ASPEED_CLK_APB>;
94 resets = <&syscon ASPEED_RESET_PWM>;
95
96 fan@0 {
97 reg = <0x00>;
98 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
99 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
100 };
101
102 fan@1 {
103 reg = <0x01>;
104 aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>;
105 };
106 };
Documentation/devicetree/bindings/hwmon/aspeed-pwm-tacho.txt+0−73
@@ -1,73 +0,0 @@
1ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver
2
3The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho
4controller can support upto 16 Fan tachometer inputs.
5
6There can be upto 8 fans supported. Each fan can have one PWM output and
7one/two Fan tach inputs.
8
9Required properties for pwm-tacho node:
10- #address-cells : should be 1.
11
12- #size-cells : should be 1.
13
14- #cooling-cells: should be 2.
15
16- reg : address and length of the register set for the device.
17
18- pinctrl-names : a pinctrl state named "default" must be defined.
19
20- pinctrl-0 : phandle referencing pin configuration of the PWM ports.
21
22- compatible : should be "aspeed,ast2400-pwm-tacho" for AST2400 and
23 "aspeed,ast2500-pwm-tacho" for AST2500.
24
25- clocks : phandle to clock provider with the clock number in the second cell
26
27- resets : phandle to reset controller with the reset number in the second cell
28
29fan subnode format:
30===================
31Under fan subnode there can upto 8 child nodes, with each child node
32representing a fan. If there are 8 fans each fan can have one PWM port and
33one/two Fan tach inputs.
34For PWM port can be configured cooling-levels to create cooling device.
35Cooling device could be bound to a thermal zone for the thermal control.
36
37Required properties for each child node:
38- reg : should specify PWM source port.
39 integer value in the range 0 to 7 with 0 indicating PWM port A and
40 7 indicating PWM port H.
41
42- cooling-levels: PWM duty cycle values in a range from 0 to 255
43 which correspond to thermal cooling states.
44
45- aspeed,fan-tach-ch : should specify the Fan tach input channel.
46 integer value in the range 0 through 15, with 0 indicating
47 Fan tach channel 0 and 15 indicating Fan tach channel 15.
48 At least one Fan tach input channel is required.
49
50Examples:
51
52pwm_tacho: pwmtachocontroller@1e786000 {
53 #address-cells = <1>;
54 #size-cells = <1>;
55 #cooling-cells = <2>;
56 reg = <0x1E786000 0x1000>;
57 compatible = "aspeed,ast2500-pwm-tacho";
58 clocks = <&syscon ASPEED_CLK_APB>;
59 resets = <&syscon ASPEED_RESET_PWM>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default>;
62
63 fan@0 {
64 reg = <0x00>;
65 cooling-levels = /bits/ 8 <125 151 177 203 229 255>;
66 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
67 };
68
69 fan@1 {
70 reg = <0x01>;
71 aspeed,fan-tach-ch = /bits/ 8 <0x01 0x02>;
72 };
73};
Documentation/devicetree/bindings/hwmon/iei,wt61p803-puzzle-hwmon.yaml+59−0
@@ -0,0 +1,59 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: IEI WT61P803 PUZZLE MCU HWMON module from IEI Integration Corp.
8
9maintainers:
10 - Luka Kovacic <luka.kovacic@sartura.hr>
11
12description: |
13 This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details
14 see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml.
15
16 The HWMON module is a sub-node of the MCU node in the Device Tree.
17
18properties:
19 compatible:
20 const: iei,wt61p803-puzzle-hwmon
21
22 '#address-cells':
23 const: 1
24
25 '#size-cells':
26 const: 0
27
28patternProperties:
29 '^fan-group@[0-1]$':
30 type: object
31 additionalProperties: false
32
33 properties:
34 reg:
35 minimum: 0
36 maximum: 1
37 description:
38 Fan group ID
39
40 '#cooling-cells':
41 const: 2
42
43 cooling-levels:
44 minItems: 1
45 maxItems: 255
46 description:
47 Cooling levels for the fans (PWM value mapping)
48
49 required:
50 - reg
51 - '#cooling-cells'
52 - cooling-levels
53
54required:
55 - compatible
56 - '#address-cells'
57 - '#size-cells'
58
59additionalProperties: false
Documentation/devicetree/bindings/hwmon/microchip,sparx5-temp.yaml+6−2
@@ -14,8 +14,12 @@ description: | · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 enum:17 oneOf:
18 - microchip,sparx5-temp18 - const: microchip,sparx5-temp
19 - items:
20 - enum:
21 - microchip,lan9691-temp
22 - const: microchip,sparx5-temp
19 23
20 reg:24 reg:
21 maxItems: 125 maxItems: 1
Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: Sensirion SHTC1 Humidity and Temperature Sensor IC7title: Sensirion SHTC1 Humidity and Temperature Sensor IC
8 8
9maintainers:9maintainers:
10 - Christopher Ruehl chris.ruehl@gtsys.com.hk10 - Christopher Ruehl <chris.ruehl@gtsys.com.hk>
11 11
12description: |12description: |
13 The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors13 The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensors
Documentation/devicetree/bindings/hwmon/ti,tmp108.yaml+13−8
@@ -4,27 +4,32 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/hwmon/ti,tmp108.yaml#4$id: http://devicetree.org/schemas/hwmon/ti,tmp108.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: TMP108/P3T1085(NXP) temperature sensor7title: TMP108/P3T1035/P3T1085/P3T2030 temperature sensor
8 8
9maintainers:9maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>10 - Krzysztof Kozlowski <krzk@kernel.org>
11 11
12description: |12description: |
13 The TMP108/P3T1085(NXP) is a digital-output temperature sensor with a13 The TMP108 or NXP P3T Family (P3T1035, P3T1085 and P3T2030) is a digital-
14 dynamically-programmable limit window, and under- and overtemperature14 output temperature sensor with a dynamically-programmable limit window,
15 alert functions.15 and under- and over-temperature alert functions.
16 16
17 P3T1085(NXP) support I3C.17 NXP P3T Family (P3T1035, P3T1085 and P3T2030) supports I3C.
18 18
19 Datasheets:19 Datasheets:
20 https://www.ti.com/product/TMP10820 https://www.ti.com/product/TMP108
21 https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf21 https://www.nxp.com/docs/en/data-sheet/P3T1085UK.pdf
22 https://www.nxp.com/docs/en/data-sheet/P3T1035XUK_P3T2030XUK.pdf
22 23
23properties:24properties:
24 compatible:25 compatible:
25 enum:26 oneOf:
26 - nxp,p3t108527 - items:
27 - ti,tmp10828 - const: nxp,p3t2030
29 - const: nxp,p3t1035
30 - const: nxp,p3t1035
31 - const: nxp,p3t1085
32 - const: ti,tmp108
28 33
29 interrupts:34 interrupts:
30 items:35 items:
Documentation/devicetree/bindings/i2c/atmel,at91sam-i2c.yaml+1−0
@@ -26,6 +26,7 @@ properties: · 25 unmodified lines
26 - microchip,sam9x60-i2c26 - microchip,sam9x60-i2c
27 - items:27 - items:
28 - enum:28 - enum:
29 - microchip,lan9691-i2c
29 - microchip,sama7d65-i2c30 - microchip,sama7d65-i2c
30 - microchip,sama7g5-i2c31 - microchip,sama7g5-i2c
31 - microchip,sam9x7-i2c32 - microchip,sam9x7-i2c
Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml+9−1
@@ -16,7 +16,8 @@ properties: · 15 unmodified lines
16 - brcm,iproc-nic-i2c16 - brcm,iproc-nic-i2c
17 17
18 reg:18 reg:
19 maxItems: 119 minItems: 1
20 maxItems: 2
20 21
21 clock-frequency:22 clock-frequency:
22 enum: [ 100000, 400000 ]23 enum: [ 100000, 400000 ]
@@ -41,8 +42,15 @@ allOf: · 18 unmodified lines
41 contains:42 contains:
42 const: brcm,iproc-nic-i2c43 const: brcm,iproc-nic-i2c
43 then:44 then:
45 properties:
46 reg:
47 minItems: 2
44 required:48 required:
45 - brcm,ape-hsls-addr-mask49 - brcm,ape-hsls-addr-mask
50 else:
51 properties:
52 reg:
53 maxItems: 1
46 54
47unevaluatedProperties: false55unevaluatedProperties: false
48 56
Documentation/devicetree/bindings/i2c/i2c-mt65xx.yaml+1−0
@@ -54,6 +54,7 @@ properties: · 53 unmodified lines
54 - enum:54 - enum:
55 - mediatek,mt6878-i2c55 - mediatek,mt6878-i2c
56 - mediatek,mt6991-i2c56 - mediatek,mt6991-i2c
57 - mediatek,mt8189-i2c
57 - mediatek,mt8196-i2c58 - mediatek,mt8196-i2c
58 - const: mediatek,mt8188-i2c59 - const: mediatek,mt8188-i2c
59 - items:60 - items:
Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml+2−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
28 - enum:28 - enum:
29 - qcom,kaanapali-cci29 - qcom,kaanapali-cci
30 - qcom,qcm2290-cci30 - qcom,qcm2290-cci
31 - qcom,qcs8300-cci
31 - qcom,sa8775p-cci32 - qcom,sa8775p-cci
32 - qcom,sc7280-cci33 - qcom,sc7280-cci
33 - qcom,sc8280xp-cci34 - qcom,sc8280xp-cci
@@ -133,6 +134,7 @@ allOf: · 99 unmodified lines
133 enum:134 enum:
134 - qcom,kaanapali-cci135 - qcom,kaanapali-cci
135 - qcom,qcm2290-cci136 - qcom,qcm2290-cci
137 - qcom,qcs8300-cci
136 - qcom,sm8750-cci138 - qcom,sm8750-cci
137 then:139 then:
138 properties:140 properties:
Documentation/devicetree/bindings/i2c/silabs,cp2112.yaml+100−0
@@ -0,0 +1,100 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/silabs,cp2112.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: CP2112 HID USB to SMBus/I2C Bridge
8
9maintainers:
10 - Danny Kaehn <danny.kaehn@plexus.com>
11
12description:
13 The CP2112 is a USB HID device which includes an integrated I2C controller
14 and 8 GPIO pins. Its GPIO pins can each be configured as inputs, open-drain
15 outputs, or push-pull outputs.
16
17properties:
18 compatible:
19 const: usb10c4,ea90
20
21 reg:
22 maxItems: 1
23 description: The USB port number
24
25 interrupt-controller: true
26 "#interrupt-cells":
27 const: 2
28
29 gpio-controller: true
30 "#gpio-cells":
31 const: 2
32
33 gpio-line-names:
34 minItems: 1
35 maxItems: 8
36
37 i2c:
38 description: The SMBus/I2C controller node for the CP2112
39 $ref: /schemas/i2c/i2c-controller.yaml#
40 unevaluatedProperties: false
41
42 properties:
43 clock-frequency:
44 minimum: 10000
45 default: 100000
46 maximum: 400000
47
48patternProperties:
49 "-hog(-[0-9]+)?$":
50 type: object
51
52 required:
53 - gpio-hog
54
55required:
56 - compatible
57 - reg
58
59additionalProperties: false
60
61examples:
62 - |
63 #include <dt-bindings/interrupt-controller/irq.h>
64 #include <dt-bindings/gpio/gpio.h>
65
66 usb {
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 cp2112: device@1 {
71 compatible = "usb10c4,ea90";
72 reg = <1>;
73
74 gpio-controller;
75 interrupt-controller;
76 #interrupt-cells = <2>;
77 #gpio-cells = <2>;
78 gpio-line-names = "CP2112_SDA", "CP2112_SCL", "TEST2",
79 "TEST3","TEST4", "TEST5", "TEST6";
80
81 fan-rst-hog {
82 gpio-hog;
83 gpios = <7 GPIO_ACTIVE_HIGH>;
84 output-high;
85 line-name = "FAN_RST";
86 };
87
88 i2c {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 sda-gpios = <&cp2112 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
92 scl-gpios = <&cp2112 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
93
94 temp@48 {
95 compatible = "national,lm75";
96 reg = <0x48>;
97 };
98 };
99 };
100 };
Documentation/devicetree/bindings/i2c/spacemit,k1-i2c.yaml+3−0
@@ -41,6 +41,9 @@ properties: · 40 unmodified lines
41 default: 40000041 default: 400000
42 maximum: 330000042 maximum: 3300000
43 43
44 resets:
45 maxItems: 1
46
44required:47required:
45 - compatible48 - compatible
46 - reg49 - reg
Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml+3−0
@@ -127,6 +127,9 @@ properties: · 126 unmodified lines
127 127
128 wakeup-source: true128 wakeup-source: true
129 129
130 power-domains:
131 maxItems: 1
132
130 access-controllers:133 access-controllers:
131 minItems: 1134 minItems: 1
132 maxItems: 2135 maxItems: 2
Documentation/devicetree/bindings/iio/adc/adi,ad4030.yaml+41−1
@@ -37,7 +37,15 @@ properties: · 36 unmodified lines
37 maximum: 10204081637 maximum: 102040816
38 38
39 spi-rx-bus-width:39 spi-rx-bus-width:
40 enum: [1, 2, 4]40 maxItems: 2
41 # all lanes must have the same width
42 oneOf:
43 - contains:
44 const: 1
45 - contains:
46 const: 2
47 - contains:
48 const: 4
41 49
42 vdd-5v-supply: true50 vdd-5v-supply: true
43 vdd-1v8-supply: true51 vdd-1v8-supply: true
@@ -88,6 +96,18 @@ oneOf: · 44 unmodified lines
88 96
89unevaluatedProperties: false97unevaluatedProperties: false
90 98
99allOf:
100 - if:
101 properties:
102 compatible:
103 enum:
104 - adi,ad4030-24
105 - adi,ad4032-24
106 then:
107 properties:
108 spi-rx-bus-width:
109 maxItems: 1
110
91examples:111examples:
92 - |112 - |
93 #include <dt-bindings/gpio/gpio.h>113 #include <dt-bindings/gpio/gpio.h>
@@ -108,3 +128,23 @@ examples: · 14 unmodified lines
108 reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;128 reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
109 };129 };
110 };130 };
131 - |
132 #include <dt-bindings/gpio/gpio.h>
133
134 spi {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 adc@0 {
139 compatible = "adi,ad4630-24";
140 reg = <0>;
141 spi-max-frequency = <80000000>;
142 spi-rx-bus-width = <4>, <4>;
143 vdd-5v-supply = <&supply_5V>;
144 vdd-1v8-supply = <&supply_1_8V>;
145 vio-supply = <&supply_1_8V>;
146 ref-supply = <&supply_5V>;
147 cnv-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
148 reset-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
149 };
150 };
Documentation/devicetree/bindings/iio/adc/adi,ad4062.yaml+120−0
@@ -0,0 +1,120 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2025 Analog Devices Inc.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/iio/adc/adi,ad4062.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Analog Devices AD4062 ADC family device driver
9
10maintainers:
11 - Jorge Marques <jorge.marques@analog.com>
12
13description: |
14 Analog Devices AD4062 Single Channel Precision SAR ADC family
15
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4060.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4062.pdf
18
19properties:
20 compatible:
21 enum:
22 - adi,ad4060
23 - adi,ad4062
24
25 reg:
26 maxItems: 1
27
28 interrupts:
29 description:
30 Two pins are available that can be configured as either a general purpose
31 digital output, device enable signal (used to synchronise other parts of
32 the signal chain with ADC sampling), device ready (GP1 only) or various
33 interrupt signals. If intended for use as a GPIO or device enable, will not
34 present here.
35 minItems: 1
36 items:
37 - description:
38 GP0 pin, cannot be configured as DEV_RDY.
39 - description:
40 GP1 pin, can be configured to any setting.
41
42 interrupt-names:
43 minItems: 1
44 items:
45 - const: gp0
46 - const: gp1
47
48 gpio-controller:
49 description:
50 Marks the device node as a GPIO controller. GPs not listed as interrupts
51 are exposed as a GPO.
52
53 '#gpio-cells':
54 const: 2
55 description:
56 The first cell is the GPIO number and the second cell specifies
57 GPIO flags, as defined in <dt-bindings/gpio/gpio.h>.
58
59 vdd-supply:
60 description: Analog power supply.
61
62 vio-supply:
63 description: Digital interface logic power supply.
64
65 ref-supply:
66 description:
67 Reference voltage to set the ADC full-scale range. If not present,
68 vdd-supply is used as the reference voltage.
69
70required:
71 - compatible
72 - reg
73 - vdd-supply
74 - vio-supply
75
76allOf:
77 - $ref: /schemas/i3c/i3c.yaml#
78
79unevaluatedProperties: false
80
81examples:
82 - |
83 #include <dt-bindings/gpio/gpio.h>
84 #include <dt-bindings/interrupt-controller/irq.h>
85
86 i3c {
87 #address-cells = <3>;
88 #size-cells = <0>;
89
90 adc@0,2ee007c0000 {
91 reg = <0x0 0x2ee 0x7c0000>;
92 vdd-supply = <&vdd>;
93 vio-supply = <&vio>;
94 ref-supply = <&ref>;
95
96 interrupt-parent = <&gpio>;
97 interrupts = <0 0 IRQ_TYPE_EDGE_RISING>,
98 <0 1 IRQ_TYPE_EDGE_FALLING>;
99 interrupt-names = "gp0", "gp1";
100 };
101 };
102
103 - |
104 #include <dt-bindings/gpio/gpio.h>
105 #include <dt-bindings/interrupt-controller/irq.h>
106
107 i3c {
108 #address-cells = <3>;
109 #size-cells = <0>;
110
111 adc@0,2ee007c0000 {
112 reg = <0x0 0x2ee 0x7c0000>;
113 vdd-supply = <&vdd>;
114 vio-supply = <&vio>;
115 ref-supply = <&ref>;
116
117 gpio-controller;
118 #gpio-cells = <2>;
119 };
120 };
Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml+191−0
@@ -0,0 +1,191 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/adi,ad4134.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices AD4134 ADC
8
9maintainers:
10 - Marcelo Schmitt <marcelo.schmitt@analog.com>
11
12description: |
13 The AD4134 is a quad channel, low noise, simultaneous sampling, precision
14 analog-to-digital converter (ADC).
15 Specifications can be found at:
16 https://www.analog.com/media/en/technical-documentation/data-sheets/ad4134.pdf
17
18$ref: /schemas/spi/spi-peripheral-props.yaml#
19
20properties:
21 compatible:
22 enum:
23 - adi,ad4134
24
25 reg:
26 maxItems: 1
27
28 spi-max-frequency:
29 maximum: 50000000
30
31 avdd5-supply:
32 description: A 5V supply that powers the chip's analog circuitry.
33
34 dvdd5-supply:
35 description: A 5V supply that powers the chip's digital circuitry.
36
37 iovdd-supply:
38 description:
39 A 1.8V supply that sets the logic levels for the digital interface pins.
40
41 refin-supply:
42 description:
43 A 4.096V or 5V supply that serves as reference for ADC conversions.
44
45 avdd1v8-supply:
46 description: A 1.8V supply used by the analog circuitry.
47
48 dvdd1v8-supply:
49 description: A 1.8V supply used by the digital circuitry.
50
51 clkvdd-supply:
52 description: A 1.8V supply for the chip's clock management circuit.
53
54 ldoin-supply:
55 description:
56 A 2.6V to 5.5V supply that generates 1.8V for AVDD1V8, DVDD1V8, and CLKVDD
57 pins.
58
59 clocks:
60 maxItems: 1
61 description:
62 Required external clock source. Can specify either a crystal or CMOS clock
63 source. If an external crystal is set, connect the CLKSEL pin to IOVDD.
64 Otherwise, connect the CLKSEL pin to IOGND and the external CMOS clock
65 signal to the XTAL2/CLKIN pin.
66
67 clock-names:
68 enum:
69 - xtal
70 - clkin
71 default: clkin
72
73 '#clock-cells':
74 const: 0
75
76 clock-output-names:
77 maxItems: 1
78
79 regulators:
80 type: object
81 description:
82 list of regulators provided by this controller.
83
84 properties:
85 vcm-output:
86 $ref: /schemas/regulator/regulator.yaml#
87 type: object
88 unevaluatedProperties: false
89
90 additionalProperties: false
91
92 reset-gpios:
93 maxItems: 1
94
95 powerdown-gpios:
96 description:
97 Active low GPIO connected to the /PDN pin. Forces the device into full
98 power-down mode when brought low. Pull this input to IOVDD for normal
99 operation.
100 maxItems: 1
101
102 odr-gpios:
103 description:
104 GPIO connected to ODR pin. Used to sample ADC data in minimum I/O mode.
105 maxItems: 1
106
107 adi,asrc-mode:
108 $ref: /schemas/types.yaml#/definitions/string
109 description:
110 Asynchronous Sample Rate Converter (ASRC) operation mode control input.
111 Describes whether the MODE pin is set to a high level (for master mode
112 operation) or to a low level (for slave mode operation).
113 enum: [ high, low ]
114 default: low
115
116 adi,dclkio:
117 description:
118 DCLK pin I/O direction control for when the device operates in Pin Control
119 Slave Mode or in SPI Control Mode. Describes if DEC0/DCLKIO pin is at a
120 high level (which configures DCLK as an output) or to set to a low level
121 (configuring DCLK for input).
122 enum: [ out, in ]
123 default: in
124
125 adi,dclkmode:
126 description:
127 DCLK mode control for when the device operates in Pin Control Slave Mode
128 or in SPI Control Mode. Describes whether the DEC1/DCLKMODE pin is set to
129 a high level (configuring the DCLK to operate in free running mode) or
130 to a low level (to configure DCLK to operate in gated mode).
131 enum: [ free-running, gated ]
132 default: gated
133
134required:
135 - compatible
136 - reg
137 - avdd5-supply
138 - dvdd5-supply
139 - iovdd-supply
140 - refin-supply
141 - clocks
142 - clock-names
143
144oneOf:
145 - required:
146 - ldoin-supply
147 - required:
148 - avdd1v8-supply
149 - dvdd1v8-supply
150 - clkvdd-supply
151
152unevaluatedProperties: false
153
154examples:
155 - |
156 #include <dt-bindings/gpio/gpio.h>
157
158 spi {
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 adc@0 {
163 compatible = "adi,ad4134";
164 reg = <0>;
165
166 spi-max-frequency = <1000000>;
167
168 reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
169 odr-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
170 powerdown-gpios = <&gpio0 88 GPIO_ACTIVE_LOW>;
171
172 clocks = <&sys_clk>;
173 clock-names = "clkin";
174
175 avdd5-supply = <&avdd5>;
176 dvdd5-supply = <&dvdd5>;
177 iovdd-supply = <&iovdd>;
178 refin-supply = <&refin>;
179 avdd1v8-supply = <&avdd1v8>;
180 dvdd1v8-supply = <&dvdd1v8>;
181 clkvdd-supply = <&clkvdd>;
182
183 regulators {
184 vcm_reg: vcm-output {
185 regulator-name = "ad4134-vcm";
186 };
187 };
188
189 };
190 };
191...
Documentation/devicetree/bindings/iio/adc/adi,ad4695.yaml+3−2
@@ -38,8 +38,9 @@ properties: · 37 unmodified lines
38 spi-cpha: true38 spi-cpha: true
39 39
40 spi-rx-bus-width:40 spi-rx-bus-width:
41 minimum: 141 items:
42 maximum: 442 minimum: 1
43 maximum: 4
43 44
44 avdd-supply:45 avdd-supply:
45 description: Analog power supply.46 description: Analog power supply.
Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml+60−4
@@ -4,18 +4,26 @@ · 3 unmodified lines
4$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#4$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: Analog Devices AD7768-1 ADC device driver7title: Analog Devices AD7768-1 ADC family
8 8
9maintainers:9maintainers:
10 - Michael Hennerich <michael.hennerich@analog.com>10 - Michael Hennerich <michael.hennerich@analog.com>
11 11
12description: |12description: |
13 Datasheet at:13 Analog Devices AD7768-1 24-Bit Single Channel Low Power sigma-delta ADC family
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf14
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7767-1.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7768-1.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/adaq7769-1.pdf
15 19
16properties:20properties:
17 compatible:21 compatible:
18 const: adi,ad7768-122 enum:
23 - adi,ad7768-1
24 - adi,adaq7767-1
25 - adi,adaq7768-1
26 - adi,adaq7769-1
19 27
20 reg:28 reg:
21 maxItems: 129 maxItems: 1
@@ -58,6 +66,25 @@ properties: · 36 unmodified lines
58 description:66 description:
59 ADC reference voltage supply67 ADC reference voltage supply
60 68
69 adi,aaf-gain-bp:
70 description: |
71 Specifies the gain applied by the Analog Anti-Aliasing Filter (AAF)
72 to the ADC input in basis points (one hundredth of a percent).
73 The hardware gain is determined by which input pin(s) the signal goes
74 through into the AAF. The possible connections are:
75 * For the ADAQ7767-1: Input connected to IN1±, IN2± or IN3±.
76 * For the ADAQ7769-1: OUT_PGA pin connected to IN1_AAF+, IN2_AAF+,
77 or IN3_AAF+.
78 enum: [1430, 3640, 10000]
79 default: 10000
80
81 pga-gpios:
82 description:
83 GAIN 0, GAIN1 and GAIN2 pins for gain selection. For devices that have
84 PGA configuration input pins, pga-gpios must be defined.
85 minItems: 3
86 maxItems: 3
87
61 adi,sync-in-gpios:88 adi,sync-in-gpios:
62 maxItems: 189 maxItems: 1
63 description:90 description:
@@ -147,6 +174,35 @@ patternProperties: · 83 unmodified lines
147allOf:174allOf:
148 - $ref: /schemas/spi/spi-peripheral-props.yaml#175 - $ref: /schemas/spi/spi-peripheral-props.yaml#
149 176
177 # AAF Gain property only applies to ADAQ7767-1 and ADAQ7769-1 devices
178 - if:
179 properties:
180 compatible:
181 contains:
182 enum:
183 - adi,adaq7767-1
184 - adi,adaq7769-1
185 then:
186 required:
187 - adi,aaf-gain-bp
188 else:
189 properties:
190 adi,aaf-gain-bp: false
191
192 - if:
193 properties:
194 compatible:
195 contains:
196 enum:
197 - adi,adaq7768-1
198 - adi,adaq7769-1
199 then:
200 required:
201 - pga-gpios
202 else:
203 properties:
204 pga-gpios: false
205
150unevaluatedProperties: false206unevaluatedProperties: false
151 207
152examples:208examples:
Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml+2−0
@@ -18,6 +18,7 @@ description: | · 17 unmodified lines
18 All the parts support the register map described by Application Note AN-87718 All the parts support the register map described by Application Note AN-877
19 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf19 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
20 20
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9211.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf23 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
23 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf24 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf
@@ -25,6 +26,7 @@ description: | · 1 unmodified line
25properties:26properties:
26 compatible:27 compatible:
27 enum:28 enum:
29 - adi,ad9211
28 - adi,ad926530 - adi,ad9265
29 - adi,ad943431 - adi,ad9434
30 - adi,ad946732 - adi,ad9467
Documentation/devicetree/bindings/iio/adc/aspeed,ast2600-adc.yaml+3−0
@@ -44,6 +44,9 @@ properties: · 43 unmodified lines
44 Input clock used to derive the sample clock. Expected to be the44 Input clock used to derive the sample clock. Expected to be the
45 SoC's APB clock.45 SoC's APB clock.
46 46
47 interrupts:
48 maxItems: 1
49
47 resets:50 resets:
48 maxItems: 151 maxItems: 1
49 52
Documentation/devicetree/bindings/iio/adc/nxp,s32g2-sar-adc.yaml+63−0
@@ -0,0 +1,63 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/nxp,s32g2-sar-adc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Successive Approximation ADC
8
9description:
10 The NXP SAR ADC provides fast and accurate analog-to-digital
11 conversion using the Successive Approximation Register (SAR) method.
12 It has 12-bit resolution with 8 input channels. Conversions can be
13 launched in software or using hardware triggers. It supports
14 continuous and one-shot modes with separate registers.
15
16maintainers:
17 - Daniel Lezcano <daniel.lezcano@kernel.org>
18
19properties:
20 compatible:
21 oneOf:
22 - const: nxp,s32g2-sar-adc
23 - items:
24 - const: nxp,s32g3-sar-adc
25 - const: nxp,s32g2-sar-adc
26
27 reg:
28 maxItems: 1
29
30 interrupts:
31 maxItems: 1
32
33 clocks:
34 maxItems: 1
35
36 dmas:
37 maxItems: 1
38
39 dma-names:
40 const: rx
41
42required:
43 - compatible
44 - reg
45 - interrupts
46 - clocks
47 - dmas
48 - dma-names
49
50additionalProperties: false
51
52examples:
53 - |
54 #include <dt-bindings/interrupt-controller/arm-gic.h>
55
56 adc@401f8000 {
57 compatible = "nxp,s32g2-sar-adc";
58 reg = <0x401f8000 0x1000>;
59 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
60 clocks = <&clks 0x41>;
61 dmas = <&edma0 0 32>;
62 dma-names = "rx";
63 };
Documentation/devicetree/bindings/iio/adc/ti,ads1018.yaml+82−0
@@ -0,0 +1,82 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/ti,ads1018.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI ADS1018/ADS1118 SPI analog to digital converter
8
9maintainers:
10 - Kurt Borja <kuurtb@gmail.com>
11
12description: |
13 The ADS1018/ADS1118 is a precision, low-power, 12-bit/16-bit, analog to
14 digital converter (ADC). It integrates a programmable gain amplifier (PGA),
15 internal voltage reference, oscillator and high-accuracy temperature sensor.
16
17 Datasheets:
18 - ADS1018: https://www.ti.com/lit/ds/symlink/ads1018.pdf
19 - ADS1118: https://www.ti.com/lit/ds/symlink/ads1118.pdf
20
21properties:
22 compatible:
23 enum:
24 - ti,ads1018
25 - ti,ads1118
26
27 reg:
28 maxItems: 1
29
30 vdd-supply: true
31
32 spi-max-frequency:
33 maximum: 4000000
34
35 spi-cpha: true
36
37 interrupts:
38 description: DOUT/DRDY (Data Out/Data Ready) line.
39 maxItems: 1
40
41 drdy-gpios:
42 description:
43 Extra GPIO line connected to DOUT/DRDY (Data Out/Data Ready). This allows
44 distinguishing between interrupts triggered by the data-ready signal and
45 interrupts triggered by an SPI transfer.
46 maxItems: 1
47
48 '#io-channel-cells':
49 const: 1
50
51required:
52 - compatible
53 - reg
54 - vdd-supply
55
56allOf:
57 - $ref: /schemas/spi/spi-peripheral-props.yaml#
58
59unevaluatedProperties: false
60
61examples:
62 - |
63 #include <dt-bindings/interrupt-controller/irq.h>
64 #include <dt-bindings/gpio/gpio.h>
65
66 spi {
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 adc@0 {
71 compatible = "ti,ads1118";
72 reg = <0>;
73
74 spi-max-frequency = <4000000>;
75 spi-cpha;
76
77 vdd-supply = <&vdd_3v3_reg>;
78
79 interrupts-extended = <&gpio 14 IRQ_TYPE_EDGE_FALLING>;
80 drdy-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
81 };
82 };
Documentation/devicetree/bindings/iio/adc/ti,ads131m02.yaml+208−0
@@ -0,0 +1,208 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/ti,ads131m02.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments ADS131M0x 2-, 3-, 4-, 6- and 8-Channel ADCs
8
9maintainers:
10 - Oleksij Rempel <o.rempel@pengutronix.de>
11
12description: |
13 The ADS131M0x are a family of multichannel, simultaneous sampling,
14 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a
15 built-in programmable gain amplifier (PGA) and internal reference.
16 Communication with the ADC chip is via SPI.
17
18 Datasheets:
19 - ADS131M02: https://www.ti.com/lit/ds/symlink/ads131m02.pdf
20 - ADS131M03: https://www.ti.com/lit/ds/symlink/ads131m03.pdf
21 - ADS131M04: https://www.ti.com/lit/ds/symlink/ads131m04.pdf
22 - ADS131M06: https://www.ti.com/lit/ds/symlink/ads131m06.pdf
23 - ADS131M08: https://www.ti.com/lit/ds/symlink/ads131m08.pdf
24
25properties:
26 compatible:
27 enum:
28 - ti,ads131m02
29 - ti,ads131m03
30 - ti,ads131m04
31 - ti,ads131m06
32 - ti,ads131m08
33
34 reg:
35 description: SPI chip select number.
36
37 clocks:
38 description:
39 Phandle to the external clock source required by the ADC's CLKIN pin.
40 The datasheet recommends specific frequencies based on the desired power
41 mode (e.g., 8.192 MHz for High-Resolution mode).
42 maxItems: 1
43
44 avdd-supply:
45 description: Analog power supply (AVDD).
46
47 dvdd-supply:
48 description: Digital power supply (DVDD).
49
50 interrupts:
51 description: DRDY (Data Ready) output signal.
52 maxItems: 1
53
54 reset-gpios:
55 description: Optional RESET signal.
56 maxItems: 1
57
58 clock-names:
59 description:
60 Indicates if a crystal oscillator (XTAL) or CMOS signal is connected
61 (CLKIN). Note that XTAL mode is only supported on ADS131M06 and ADS131M08.
62 enum: [xtal, clkin]
63
64 refin-supply:
65 description: Optional external reference supply (REFIN).
66
67 '#address-cells':
68 const: 1
69
70 '#size-cells':
71 const: 0
72
73required:
74 - compatible
75 - reg
76 - clocks
77 - clock-names
78 - avdd-supply
79 - dvdd-supply
80
81patternProperties:
82 "^channel@[0-7]$":
83 type: object
84 $ref: /schemas/iio/adc/adc.yaml#
85 description: Properties for a single ADC channel.
86
87 properties:
88 reg:
89 description: The channel index (0-7).
90 minimum: 0
91 maximum: 7 # Max channels on ADS131M08
92
93 label: true
94
95 required:
96 - reg
97
98 unevaluatedProperties: false
99
100allOf:
101 - $ref: /schemas/spi/spi-peripheral-props.yaml#
102
103 - if:
104 # 20-pin devices: M02, M03, M04
105 # These do not support XTAL or REFIN.
106 properties:
107 compatible:
108 enum:
109 - ti,ads131m02
110 - ti,ads131m03
111 - ti,ads131m04
112 then:
113 properties:
114 clock-names:
115 const: clkin
116 refin-supply: false
117
118 - if:
119 # ADS131M02: 2 channels max (0-1)
120 properties:
121 compatible:
122 contains:
123 const: ti,ads131m02
124 then:
125 patternProperties:
126 "^channel@[0-1]$":
127 properties:
128 reg:
129 maximum: 1
130 "^channel@[2-7]$": false
131
132 - if:
133 # ADS131M03: 3 channels max (0-2)
134 properties:
135 compatible:
136 contains:
137 const: ti,ads131m03
138 then:
139 patternProperties:
140 "^channel@[0-2]$":
141 properties:
142 reg:
143 maximum: 2
144 "^channel@[3-7]$": false
145
146 - if:
147 # ADS131M04: 4 channels max (0-3)
148 properties:
149 compatible:
150 contains:
151 const: ti,ads131m04
152 then:
153 patternProperties:
154 "^channel@[0-3]$":
155 properties:
156 reg:
157 maximum: 3
158 "^channel@[4-7]$": false
159
160 - if:
161 # ADS131M06: 6 channels max (0-5)
162 properties:
163 compatible:
164 contains:
165 const: ti,ads131m06
166 then:
167 patternProperties:
168 "^channel@[0-5]$":
169 properties:
170 reg:
171 maximum: 5
172 "^channel@[6-7]$": false
173
174unevaluatedProperties: false
175
176examples:
177 - |
178 #include <dt-bindings/clock/stm32mp1-clks.h>
179
180 spi1 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183
184 adc@0 {
185 compatible = "ti,ads131m02";
186 reg = <0>;
187 spi-max-frequency = <8000000>;
188
189 clocks = <&rcc CK_MCO2>;
190 clock-names = "clkin";
191
192 avdd-supply = <&vdd_ana>;
193 dvdd-supply = <&vdd_dig>;
194
195 #address-cells = <1>;
196 #size-cells = <0>;
197
198 channel@0 {
199 reg = <0>;
200 label = "input_voltage";
201 };
202
203 channel@1 {
204 reg = <1>;
205 label = "input_current";
206 };
207 };
208 };
Documentation/devicetree/bindings/iio/amplifiers/adi,adl8113.yaml+87−0
@@ -0,0 +1,87 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/amplifiers/adi,adl8113.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices ADL8113 Low Noise Amplifier with integrated bypass switches
8
9maintainers:
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
11
12description: |
13 The ADL8113 is a 10MHz to 12GHz Low Noise Amplifier with integrated bypass
14 switches controlled by two GPIO pins (VA and VB). The device supports four
15 operation modes:
16 - Internal Amplifier: VA=0, VB=0 - Signal passes through the internal LNA
17 - Internal Bypass: VA=1, VB=1 - Signal bypasses through internal path
18 - External Bypass A: VA=0, VB=1 - Signal routes from RFIN to OUT_A and from IN_A to RFOUT
19 - External Bypass B: VA=1, VB=0 - Signal routes from RFIN to OUT_B and from IN_B to RFOUT
20
21 https://www.analog.com/en/products/adl8113.html
22
23properties:
24 compatible:
25 const: adi,adl8113
26
27 vdd1-supply: true
28
29 vdd2-supply: true
30
31 vss2-supply: true
32
33 ctrl-gpios:
34 items:
35 - description: VA control pin
36 - description: VB control pin
37
38 adi,external-bypass-a-gain-db:
39 description:
40 Gain in dB of external amplifier connected to bypass path A (OUT_A/IN_A).
41 When specified, this gain value becomes selectable via the hardwaregain
42 attribute and automatically routes through the external A path.
43
44 adi,external-bypass-b-gain-db:
45 description:
46 Gain in dB of external amplifier connected to bypass path B (OUT_B/IN_B).
47 When specified, this gain value becomes selectable via the hardwaregain
48 attribute and automatically routes through the external B path.
49
50required:
51 - compatible
52 - ctrl-gpios
53 - vdd1-supply
54 - vdd2-supply
55 - vss2-supply
56
57additionalProperties: false
58
59examples:
60 - |
61 #include <dt-bindings/gpio/gpio.h>
62
63 /* Basic configuration with only internal paths */
64 amplifier {
65 compatible = "adi,adl8113";
66 ctrl-gpios = <&gpio 22 GPIO_ACTIVE_HIGH>,
67 <&gpio 23 GPIO_ACTIVE_HIGH>;
68 vdd1-supply = <&vdd1_5v>;
69 vdd2-supply = <&vdd2_3v3>;
70 vss2-supply = <&vss2_neg>;
71 };
72
73 - |
74 #include <dt-bindings/gpio/gpio.h>
75
76 /* Configuration with external bypass amplifiers */
77 amplifier {
78 compatible = "adi,adl8113";
79 ctrl-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>,
80 <&gpio 25 GPIO_ACTIVE_HIGH>;
81 vdd1-supply = <&vdd1_5v>;
82 vdd2-supply = <&vdd2_3v3>;
83 vss2-supply = <&vss2_neg>;
84 adi,external-bypass-a-gain-db = <20>; /* 20dB external amp on path A */
85 adi,external-bypass-b-gain-db = <6>; /* 6dB external amp on path B */
86 };
87...
Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml+120−0
@@ -0,0 +1,120 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/dac/adi,max22007.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Analog Devices MAX22007 DAC
8
9maintainers:
10 - Janani Sunil <janani.sunil@analog.com>
11
12description:
13 The MAX22007 is a quad-channel, 12-bit digital-to-analog converter (DAC)
14 with integrated precision output amplifiers and current output capability.
15 Each channel can be independently configured for voltage or current output.
16 Datasheet available at https://www.analog.com/en/products/max22007.html
17
18$ref: /schemas/spi/spi-peripheral-props.yaml#
19
20properties:
21 compatible:
22 const: adi,max22007
23
24 reg:
25 maxItems: 1
26
27 spi-max-frequency:
28 maximum: 500000
29
30 '#address-cells':
31 const: 1
32
33 '#size-cells':
34 const: 0
35
36 vdd-supply:
37 description: Low-Voltage Power Supply from +2.7V to +5.5V.
38
39 hvdd-supply:
40 description:
41 Positive High-Voltage Power Supply from +8V to (HVSS +24V) for
42 the Output Channels.
43
44 hvss-supply:
45 description:
46 Optional Negative High-Voltage Power Supply from -2V to 0V for the Output
47 Channels. For most applications HVSS can be connected to GND (0V), but for
48 applications requiring output down to true 0V or 0mA, connect to a -2V supply.
49
50 reset-gpios:
51 maxItems: 1
52 description:
53 Active low GPIO.
54
55patternProperties:
56 "^channel@[0-3]$":
57 $ref: /schemas/iio/dac/dac.yaml#
58 type: object
59 description:
60 Represents the external channels which are connected to the DAC.
61
62 properties:
63 reg:
64 description: Channel number
65 items:
66 minimum: 0
67 maximum: 3
68
69 adi,ch-func:
70 description:
71 Channel output type. Use CH_FUNC_VOLTAGE_OUTPUT for voltage
72 output or CH_FUNC_CURRENT_OUTPUT for current output.
73 $ref: /schemas/types.yaml#/definitions/uint32
74 enum: [1, 2]
75
76 required:
77 - reg
78 - adi,ch-func
79
80 unevaluatedProperties: false
81
82required:
83 - compatible
84 - reg
85 - vdd-supply
86 - hvdd-supply
87
88unevaluatedProperties: false
89
90examples:
91 - |
92 #include <dt-bindings/gpio/gpio.h>
93 #include <dt-bindings/iio/addac/adi,ad74413r.h>
94
95 spi {
96 #address-cells = <1>;
97 #size-cells = <0>;
98
99 dac@0 {
100 compatible = "adi,max22007";
101 reg = <0>;
102 spi-max-frequency = <500000>;
103 reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
104 vdd-supply = <&vdd_reg>;
105 hvdd-supply = <&hvdd_reg>;
106 #address-cells = <1>;
107 #size-cells = <0>;
108
109 channel@0 {
110 reg = <0>;
111 adi,ch-func = <CH_FUNC_VOLTAGE_OUTPUT>;
112 };
113
114 channel@1 {
115 reg = <1>;
116 adi,ch-func = <CH_FUNC_CURRENT_OUTPUT>;
117 };
118 };
119 };
120...
Documentation/devicetree/bindings/iio/dac/microchip,mcp47feb02.yaml+302−0
@@ -0,0 +1,302 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/dac/microchip,mcp47feb02.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip MCP47F(E/V)B(0/1/2)(1/2/4/8) DAC with I2C Interface Families
8
9maintainers:
10 - Ariana Lazar <ariana.lazar@microchip.com>
11
12description: |
13 Datasheet for MCP47FEB01, MCP47FEB11, MCP47FEB21, MCP47FEB02, MCP47FEB12,
14 MCP47FEB22 can be found here:
15 https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005375A.pdf
16 Datasheet for MCP47FVB01, MCP47FVB11, MCP47FVB21, MCP47FVB02, MCP47FVB12,
17 MCP47FVB22 can be found here:
18 https://ww1.microchip.com/downloads/aemDocuments/documents/OTH/ProductDocuments/DataSheets/20005405A.pdf
19 Datasheet for MCP47FEB04, MCP47FEB14, MCP47FEB24, MCP47FEB08, MCP47FEB18,
20 MCP47FEB28, MCP47FVB04, MCP47FVB14, MCP47FVB24, MCP47FVB08, MCP47FVB18,
21 MCP47FVB28 can be found here:
22 https://ww1.microchip.com/downloads/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP47FXBX48-Data-Sheet-DS200006368A.pdf
23
24 +------------+--------------+-------------+-------------+------------+
25 | Device | Resolution | Channels | Vref number | Memory |
26 |------------|--------------|-------------|-------------|------------|
27 | MCP47FEB01 | 8-bit | 1 | 1 | EEPROM |
28 | MCP47FEB11 | 10-bit | 1 | 1 | EEPROM |
29 | MCP47FEB21 | 12-bit | 1 | 1 | EEPROM |
30 |------------|--------------|-------------|-------------|------------|
31 | MCP47FEB02 | 8-bit | 2 | 1 | EEPROM |
32 | MCP47FEB12 | 10-bit | 2 | 1 | EEPROM |
33 | MCP47FEB22 | 12-bit | 2 | 1 | EEPROM |
34 |------------|--------------|-------------|-------------|------------|
35 | MCP47FVB01 | 8-bit | 1 | 1 | RAM |
36 | MCP47FVB11 | 10-bit | 1 | 1 | RAM |
37 | MCP47FVB21 | 12-bit | 1 | 1 | RAM |
38 |------------|--------------|-------------|-------------|------------|
39 | MCP47FVB02 | 8-bit | 2 | 1 | RAM |
40 | MCP47FVB12 | 10-bit | 2 | 1 | RAM |
41 | MCP47FVB22 | 12-bit | 2 | 1 | RAM |
42 |------------|--------------|-------------|-------------|------------|
43 | MCP47FVB04 | 8-bit | 4 | 2 | RAM |
44 | MCP47FVB14 | 10-bit | 4 | 2 | RAM |
45 | MCP47FVB24 | 12-bit | 4 | 2 | RAM |
46 |------------|--------------|-------------|-------------|------------|
47 | MCP47FVB08 | 8-bit | 8 | 2 | RAM |
48 | MCP47FVB18 | 10-bit | 8 | 2 | RAM |
49 | MCP47FVB28 | 12-bit | 8 | 2 | RAM |
50 |------------|--------------|-------------|-------------|------------|
51 | MCP47FEB04 | 8-bit | 4 | 2 | EEPROM |
52 | MCP47FEB14 | 10-bit | 4 | 2 | EEPROM |
53 | MCP47FEB24 | 12-bit | 4 | 2 | EEPROM |
54 |------------|--------------|-------------|-------------|------------|
55 | MCP47FEB08 | 8-bit | 8 | 2 | EEPROM |
56 | MCP47FEB18 | 10-bit | 8 | 2 | EEPROM |
57 | MCP47FEB28 | 12-bit | 8 | 2 | EEPROM |
58 +------------+--------------+-------------+-------------+------------+
59
60properties:
61 compatible:
62 enum:
63 - microchip,mcp47feb01
64 - microchip,mcp47feb11
65 - microchip,mcp47feb21
66 - microchip,mcp47feb02
67 - microchip,mcp47feb12
68 - microchip,mcp47feb22
69 - microchip,mcp47fvb01
70 - microchip,mcp47fvb11
71 - microchip,mcp47fvb21
72 - microchip,mcp47fvb02
73 - microchip,mcp47fvb12
74 - microchip,mcp47fvb22
75 - microchip,mcp47fvb04
76 - microchip,mcp47fvb14
77 - microchip,mcp47fvb24
78 - microchip,mcp47fvb08
79 - microchip,mcp47fvb18
80 - microchip,mcp47fvb28
81 - microchip,mcp47feb04
82 - microchip,mcp47feb14
83 - microchip,mcp47feb24
84 - microchip,mcp47feb08
85 - microchip,mcp47feb18
86 - microchip,mcp47feb28
87
88 reg:
89 maxItems: 1
90
91 "#address-cells":
92 const: 1
93
94 "#size-cells":
95 const: 0
96
97 vdd-supply:
98 description:
99 Provides power to the chip and it could be used as reference voltage. The
100 voltage is used to calculate scale. For parts without EEPROM at powerup
101 this will be the selected as voltage reference.
102
103 vref-supply:
104 description: |
105 Vref pin (it could be found as Vref0 into the datasheet) may be used as a
106 voltage reference when this supply is specified. The internal reference
107 will be taken into account for voltage reference besides VDD if this supply
108 does not exist.
109
110 This supply will be voltage reference for the following outputs:
111 - for single-channel device: Vout0;
112 - for dual-channel device: Vout0, Vout1;
113 - for quad-channel device: Vout0, Vout2;
114 - for octal-channel device: Vout0, Vout2, Vout6, Vout8;
115
116 vref1-supply:
117 description: |
118 Vref1 pin may be used as a voltage reference when this supply is specified.
119 The internal reference will be taken into account for voltage reference
120 beside VDD if this supply does not exist.
121
122 This supply will be voltage reference for the following outputs:
123 - for quad-channel device: Vout1, Vout3;
124 - for octal-channel device: Vout1, Vout3, Vout5, Vout7;
125
126 lat-gpios:
127 description:
128 LAT pin to be used as a hardware trigger to synchronously update the DAC
129 channels. The pin is active Low. It could be also found as LAT0 in
130 datasheet.
131 maxItems: 1
132
133 lat1-gpios:
134 description:
135 LAT1 pin to be used as a hardware trigger to synchronously update the odd
136 DAC channels on devices with 4 and 8 channels. The pin is active Low.
137 maxItems: 1
138
139 microchip,vref-buffered:
140 type: boolean
141 description:
142 Enable buffering of the external Vref/Vref0 pin in cases where the
143 external reference voltage does not have sufficient current capability in
144 order not to drop it’s voltage when connected to the internal resistor
145 ladder circuit.
146
147 microchip,vref1-buffered:
148 type: boolean
149 description:
150 Enable buffering of the external Vref1 pin in cases where the external
151 reference voltage does not have sufficient current capability in order not
152 to drop it’s voltage when connected to the internal resistor ladder
153 circuit.
154
155patternProperties:
156 "^channel@[0-7]$":
157 $ref: dac.yaml
158 type: object
159 description: Voltage output channel.
160
161 properties:
162 reg:
163 description: The channel number.
164 minItems: 1
165 maxItems: 8
166
167 label:
168 description: Unique name to identify which channel this is.
169
170 required:
171 - reg
172
173 unevaluatedProperties: false
174
175required:
176 - compatible
177 - reg
178 - vdd-supply
179
180allOf:
181 - if:
182 properties:
183 compatible:
184 contains:
185 enum:
186 - microchip,mcp47feb01
187 - microchip,mcp47feb11
188 - microchip,mcp47feb21
189 - microchip,mcp47fvb01
190 - microchip,mcp47fvb11
191 - microchip,mcp47fvb21
192 then:
193 properties:
194 lat1-gpios: false
195 vref1-supply: false
196 microchip,vref1-buffered: false
197 channel@0:
198 properties:
199 reg:
200 const: 0
201 patternProperties:
202 "^channel@[1-7]$": false
203 - if:
204 properties:
205 compatible:
206 contains:
207 enum:
208 - microchip,mcp47feb02
209 - microchip,mcp47feb12
210 - microchip,mcp47feb22
211 - microchip,mcp47fvb02
212 - microchip,mcp47fvb12
213 - microchip,mcp47fvb22
214 then:
215 properties:
216 lat1-gpios: false
217 vref1-supply: false
218 microchip,vref1-buffered: false
219 patternProperties:
220 "^channel@[0-1]$":
221 properties:
222 reg:
223 enum: [0, 1]
224 "^channel@[2-7]$": false
225 - if:
226 properties:
227 compatible:
228 contains:
229 enum:
230 - microchip,mcp47fvb04
231 - microchip,mcp47fvb14
232 - microchip,mcp47fvb24
233 - microchip,mcp47feb04
234 - microchip,mcp47feb14
235 - microchip,mcp47feb24
236 then:
237 patternProperties:
238 "^channel@[0-3]$":
239 properties:
240 reg:
241 enum: [0, 1, 2, 3]
242 "^channel@[4-7]$": false
243 - if:
244 properties:
245 compatible:
246 contains:
247 enum:
248 - microchip,mcp47fvb08
249 - microchip,mcp47fvb18
250 - microchip,mcp47fvb28
251 - microchip,mcp47feb08
252 - microchip,mcp47feb18
253 - microchip,mcp47feb28
254 then:
255 patternProperties:
256 "^channel@[0-7]$":
257 properties:
258 reg:
259 enum: [0, 1, 2, 3, 4, 5, 6, 7]
260 - if:
261 not:
262 required:
263 - vref-supply
264 then:
265 properties:
266 microchip,vref-buffered: false
267 - if:
268 not:
269 required:
270 - vref1-supply
271 then:
272 properties:
273 microchip,vref1-buffered: false
274
275additionalProperties: false
276
277examples:
278 - |
279 i2c {
280
281 #address-cells = <1>;
282 #size-cells = <0>;
283 dac@0 {
284 compatible = "microchip,mcp47feb02";
285 reg = <0>;
286 vdd-supply = <&vdac_vdd>;
287 vref-supply = <&vref_reg>;
288
289 #address-cells = <1>;
290 #size-cells = <0>;
291 channel@0 {
292 reg = <0>;
293 label = "Adjustable_voltage_ch0";
294 };
295
296 channel@1 {
297 reg = <0x1>;
298 label = "Adjustable_voltage_ch1";
299 };
300 };
301 };
302...
Documentation/devicetree/bindings/iio/frequency/adi,adf4377.yaml+8−0
@@ -40,6 +40,12 @@ properties: · 39 unmodified lines
40 items:40 items:
41 - const: ref_in41 - const: ref_in
42 42
43 '#clock-cells':
44 const: 0
45
46 clock-output-names:
47 maxItems: 1
48
43 chip-enable-gpios:49 chip-enable-gpios:
44 description:50 description:
45 GPIO that controls the Chip Enable Pin.51 GPIO that controls the Chip Enable Pin.
@@ -97,6 +103,8 @@ examples: · 51 unmodified lines
97 spi-max-frequency = <10000000>;103 spi-max-frequency = <10000000>;
98 clocks = <&adf4377_ref_in>;104 clocks = <&adf4377_ref_in>;
99 clock-names = "ref_in";105 clock-names = "ref_in";
106 #clock-cells = <0>;
107 clock-output-names = "adf4377";
100 };108 };
101 };109 };
102...110...
Documentation/devicetree/bindings/iio/pressure/honeywell,abp2030pa.yaml+132−0
@@ -0,0 +1,132 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/pressure/honeywell,abp2030pa.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Honeywell abp2030pa pressure sensor
8
9maintainers:
10 - Petre Rodan <petre.rodan@subdimension.ro>
11
12description: |
13 Honeywell pressure sensor of model abp2030pa.
14
15 This sensor has an I2C and SPI interface.
16
17 There are many models with different pressure ranges available. The vendor
18 calls them "ABP2 series". All of them have an identical programming model and
19 differ in the pressure range and measurement unit.
20
21 To support different models one needs to specify its pressure triplet.
22
23 For custom silicon chips not covered by the Honeywell ABP2 series datasheet,
24 the pressure values can be specified manually via honeywell,pmin-pascal and
25 honeywell,pmax-pascal.
26
27 Specifications about the devices can be found at:
28 https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/basic-abp2-series/documents/sps-siot-abp2-series-datasheet-32350268-en.pdf
29
30properties:
31 compatible:
32 const: honeywell,abp2030pa
33
34 reg:
35 maxItems: 1
36
37 interrupts:
38 description:
39 Optional interrupt for indicating end of conversion.
40 SPI variants of ABP2 chips do not provide this feature.
41 maxItems: 1
42
43 honeywell,pressure-triplet:
44 description: |
45 Case-sensitive five character string that defines pressure range, unit
46 and type as part of the device nomenclature. In the unlikely case of a
47 custom chip, unset and provide pmin-pascal and pmax-pascal instead.
48 enum: [001BA, 1.6BA, 2.5BA, 004BA, 006BA, 008BA, 010BA, 012BA, 001BD,
49 1.6BD, 2.5BD, 004BD, 001BG, 1.6BG, 2.5BG, 004BG, 006BG, 008BG,
50 010BG, 012BG, 001GG, 1.2GG, 100KA, 160KA, 250KA, 001KD, 1.6KD,
51 2.5KD, 004KD, 006KD, 010KD, 016KD, 025KD, 040KD, 060KD, 100KD,
52 160KD, 250KD, 400KD, 001KG, 1.6KG, 2.5KG, 004KG, 006KG, 010KG,
53 016KG, 025KG, 040KG, 060KG, 100KG, 160KG, 250KG, 400KG, 600KG,
54 800KG, 250LD, 600LD, 600LG, 2.5MD, 006MD, 010MD, 016MD, 025MD,
55 040MD, 060MD, 100MD, 160MD, 250MD, 400MD, 600MD, 006MG, 010MG,
56 016MG, 025MG, 040MG, 060MG, 100MG, 160MG, 250MG, 400MG, 600MG,
57 001ND, 002ND, 004ND, 005ND, 010ND, 020ND, 030ND, 002NG, 004NG,
58 005NG, 010NG, 020NG, 030NG, 015PA, 030PA, 060PA, 100PA, 150PA,
59 175PA, 001PD, 005PD, 015PD, 030PD, 060PD, 001PG, 005PG, 015PG,
60 030PG, 060PG, 100PG, 150PG, 175PG]
61 $ref: /schemas/types.yaml#/definitions/string
62
63 honeywell,pmin-pascal:
64 description:
65 Minimum pressure value the sensor can measure in pascal.
66
67 honeywell,pmax-pascal:
68 description:
69 Maximum pressure value the sensor can measure in pascal.
70
71 spi-max-frequency:
72 maximum: 800000
73
74 vdd-supply: true
75
76required:
77 - compatible
78 - reg
79 - vdd-supply
80
81oneOf:
82 - required:
83 - honeywell,pressure-triplet
84 - required:
85 - honeywell,pmin-pascal
86 - honeywell,pmax-pascal
87
88allOf:
89 - $ref: /schemas/spi/spi-peripheral-props.yaml
90 - if:
91 required:
92 - honeywell,pressure-triplet
93 then:
94 properties:
95 honeywell,pmin-pascal: false
96 honeywell,pmax-pascal: false
97
98additionalProperties: false
99
100examples:
101 - |
102 #include <dt-bindings/gpio/gpio.h>
103 #include <dt-bindings/interrupt-controller/irq.h>
104 i2c {
105 #address-cells = <1>;
106 #size-cells = <0>;
107
108 pressure@18 {
109 compatible = "honeywell,abp2030pa";
110 reg = <0x18>;
111 interrupt-parent = <&gpio3>;
112 interrupts = <21 IRQ_TYPE_EDGE_RISING>;
113
114 honeywell,pressure-triplet = "001BA";
115 vdd-supply = <&vcc_3v3>;
116 };
117 };
118 - |
119 spi {
120 #address-cells = <1>;
121 #size-cells = <0>;
122
123 pressure@0 {
124 compatible = "honeywell,abp2030pa";
125 reg = <0>;
126 spi-max-frequency = <800000>;
127
128 honeywell,pressure-triplet = "001PD";
129 vdd-supply = <&vcc_3v3>;
130 };
131 };
132...
Documentation/devicetree/bindings/iio/proximity/rfdigital,rfd77402.yaml+53−0
@@ -0,0 +1,53 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/proximity/rfdigital,rfd77402.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: RF Digital RFD77402 ToF sensor
8
9maintainers:
10 - Shrikant Raskar <raskar.shree97@gmail.com>
11
12description:
13 The RF Digital RFD77402 is a Time-of-Flight (ToF) proximity and distance
14 sensor providing up to 200 mm range measurement over an I2C interface.
15
16properties:
17 compatible:
18 const: rfdigital,rfd77402
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25 description:
26 Interrupt asserted when a new distance measurement is available.
27
28 vdd-supply:
29 description: Regulator that provides power to the sensor.
30
31required:
32 - compatible
33 - reg
34 - vdd-supply
35
36additionalProperties: false
37
38examples:
39 - |
40 #include <dt-bindings/interrupt-controller/irq.h>
41 i2c {
42 #address-cells = <1>;
43 #size-cells = <0>;
44
45 proximity@4c {
46 compatible = "rfdigital,rfd77402";
47 reg = <0x4c>;
48 vdd-supply = <&vdd_3v3>;
49 interrupt-parent = <&gpio>;
50 interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
51 };
52 };
53...
Documentation/devicetree/bindings/input/focaltech,ft8112.yaml+66−0
@@ -0,0 +1,66 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/input/focaltech,ft8112.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: FocalTech FT8112 touchscreen controller
8
9maintainers:
10 - Daniel Peng <Daniel_Peng@pegatron.corp-partner.google.com>
11
12description:
13 Supports the FocalTech FT8112 touchscreen controller.
14 This touchscreen controller uses the i2c-hid protocol with a reset GPIO.
15
16allOf:
17 - $ref: /schemas/input/touchscreen/touchscreen.yaml#
18
19properties:
20 compatible:
21 enum:
22 - focaltech,ft8112
23
24 reg:
25 maxItems: 1
26
27 interrupts:
28 maxItems: 1
29
30 panel: true
31
32 reset-gpios:
33 maxItems: 1
34
35 vcc33-supply: true
36
37 vccio-supply: true
38
39required:
40 - compatible
41 - reg
42 - interrupts
43 - vcc33-supply
44
45additionalProperties: false
46
47examples:
48 - |
49 #include <dt-bindings/gpio/gpio.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51
52 i2c {
53 #address-cells = <1>;
54 #size-cells = <0>;
55
56 touchscreen@38 {
57 compatible = "focaltech,ft8112";
58 reg = <0x38>;
59
60 interrupt-parent = <&pio>;
61 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
62
63 reset-gpios = <&pio 126 GPIO_ACTIVE_LOW>;
64 vcc33-supply = <&pp3300_tchscr_x>;
65 };
66 };
Documentation/devicetree/bindings/input/google,goldfish-events-keypad.yaml+41−0
@@ -0,0 +1,41 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/input/google,goldfish-events-keypad.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Android Goldfish Events Keypad
8
9maintainers:
10 - Kuan-Wei Chiu <visitorckw@gmail.com>
11
12allOf:
13 - $ref: input.yaml#
14
15description:
16 Android goldfish events keypad device generated by android emulator.
17
18properties:
19 compatible:
20 const: google,goldfish-events-keypad
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28required:
29 - compatible
30 - reg
31 - interrupts
32
33unevaluatedProperties: false
34
35examples:
36 - |
37 keypad@9040000 {
38 compatible = "google,goldfish-events-keypad";
39 reg = <0x9040000 0x1000>;
40 interrupts = <5>;
41 };
Documentation/devicetree/bindings/input/qcom,pm8941-pwrkey.yaml+12−5
@@ -12,11 +12,18 @@ maintainers: · 11 unmodified lines
12 12
13properties:13properties:
14 compatible:14 compatible:
15 enum:15 oneOf:
16 - qcom,pm8941-pwrkey16 - enum:
17 - qcom,pm8941-resin17 - qcom,pm8941-pwrkey
18 - qcom,pmk8350-pwrkey18 - qcom,pm8941-resin
19 - qcom,pmk8350-resin19 - qcom,pmk8350-pwrkey
20 - qcom,pmk8350-resin
21 - items:
22 - const: qcom,pmm8654au-pwrkey
23 - const: qcom,pmk8350-pwrkey
24 - items:
25 - const: qcom,pmm8654au-resin
26 - const: qcom,pmk8350-resin
20 27
21 interrupts:28 interrupts:
22 maxItems: 129 maxItems: 1
Documentation/devicetree/bindings/input/syna,rmi4.yaml+1−1
@@ -8,7 +8,7 @@ title: Synaptics RMI4 compliant devices · 7 unmodified lines
8 8
9maintainers:9maintainers:
10 - Jason A. Donenfeld <Jason@zx2c4.com>10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
12 - Vincent Huang <vincent.huang@tw.synaptics.com>12 - Vincent Huang <vincent.huang@tw.synaptics.com>
13 13
14description: |14description: |
Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml+1−0
@@ -39,6 +39,7 @@ properties: · 38 unmodified lines
39 - edt,edt-ft540639 - edt,edt-ft5406
40 - edt,edt-ft550640 - edt,edt-ft5506
41 - evervision,ev-ft572641 - evervision,ev-ft5726
42 - focaltech,ft3518
42 - focaltech,ft542643 - focaltech,ft5426
43 - focaltech,ft545244 - focaltech,ft5452
44 - focaltech,ft623645 - focaltech,ft6236
Documentation/devicetree/bindings/input/touchscreen/goodix.yaml+2−0
@@ -42,6 +42,8 @@ properties: · 41 unmodified lines
42 address, thus it can be driven by the host during the reset sequence.42 address, thus it can be driven by the host during the reset sequence.
43 maxItems: 143 maxItems: 1
44 44
45 panel: true
46
45 reset-gpios:47 reset-gpios:
46 maxItems: 148 maxItems: 1
47 49
Documentation/devicetree/bindings/input/touchscreen/ilitek,ili210x.yaml+51−0
@@ -0,0 +1,51 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/input/touchscreen/ilitek,ili210x.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ilitek ILI21xx/ILI251x V3/V6 touch screen controller with i2c interface
8
9maintainers:
10 - Frank Li <Frank.Li@nxp.com>
11 - Marek Vasut <marek.vasut+renesas@mailbox.org>
12
13properties:
14 compatible:
15 enum:
16 - ilitek,ili210x
17 - ilitek,ili2117
18 - ilitek,ili2120
19 - ilitek,ili251x
20
21 reg:
22 maxItems: 1
23
24 interrupts:
25 maxItems: 1
26
27 reset-gpios:
28 maxItems: 1
29
30 wakeup-source: true
31
32required:
33 - compatible
34 - reg
35
36allOf:
37 - $ref: touchscreen.yaml
38
39unevaluatedProperties: false
40
41examples:
42 - |
43 i2c {
44 #address-cells = <1>;
45 #size-cells = <0>;
46
47 touchscreen@41 {
48 compatible = "ilitek,ili2120";
49 reg = <0x41>;
50 };
51 };
Documentation/devicetree/bindings/input/touchscreen/imagis,ist3038c.yaml+3−1
@@ -55,7 +55,9 @@ allOf: · 54 unmodified lines
55 properties:55 properties:
56 compatible:56 compatible:
57 contains:57 contains:
58 const: imagis,ist3032c58 enum:
59 - imagis,ist3032c
60 - imagis,ist3038
59 then:61 then:
60 properties:62 properties:
61 linux,keycodes: false63 linux,keycodes: false
Documentation/devicetree/bindings/input/touchscreen/sitronix,st1232.yaml+7−3
@@ -14,9 +14,13 @@ allOf: · 13 unmodified lines
14 14
15properties:15properties:
16 compatible:16 compatible:
17 enum:17 oneOf:
18 - sitronix,st123218 - enum:
19 - sitronix,st163319 - sitronix,st1232
20 - sitronix,st1633
21 - items:
22 - const: sitronix,st1624
23 - const: sitronix,st1633
20 24
21 reg:25 reg:
22 maxItems: 126 maxItems: 1
Documentation/devicetree/bindings/input/touchscreen/ti,tsc2007.yaml+3−0
@@ -53,6 +53,9 @@ properties: · 52 unmodified lines
53 how much time to wait (in milliseconds) before reading again the53 how much time to wait (in milliseconds) before reading again the
54 values from the tsc2007.54 values from the tsc2007.
55 55
56 "#io-channel-cells":
57 const: 1
58
56required:59required:
57 - compatible60 - compatible
58 - reg61 - reg
Documentation/devicetree/bindings/input/touchscreen/trivial-touch.yaml+0−4
@@ -23,9 +23,6 @@ properties: · 22 unmodified lines
23 # Hynitron cstxxx series touchscreen controller23 # Hynitron cstxxx series touchscreen controller
24 - hynitron,cst34024 - hynitron,cst340
25 # Ilitek I2C Touchscreen Controller25 # Ilitek I2C Touchscreen Controller
26 - ilitek,ili210x
27 - ilitek,ili2117
28 - ilitek,ili2120
29 - ilitek,ili213026 - ilitek,ili2130
30 - ilitek,ili213127 - ilitek,ili2131
31 - ilitek,ili213228 - ilitek,ili2132
@@ -33,7 +30,6 @@ properties: · 1 unmodified line
33 - ilitek,ili232230 - ilitek,ili2322
34 - ilitek,ili232331 - ilitek,ili2323
35 - ilitek,ili232632 - ilitek,ili2326
36 - ilitek,ili251x
37 - ilitek,ili252033 - ilitek,ili2520
38 - ilitek,ili252134 - ilitek,ili2521
39 # MAXI MAX11801 Resistive touch screen controller with i2c interface35 # MAXI MAX11801 Resistive touch screen controller with i2c interface
Documentation/devicetree/bindings/interconnect/mediatek,mt8183-emi.yaml+1−0
@@ -40,6 +40,7 @@ properties: · 39 unmodified lines
40 enum:40 enum:
41 - mediatek,mt8183-emi41 - mediatek,mt8183-emi
42 - mediatek,mt8195-emi42 - mediatek,mt8195-emi
43 - mediatek,mt8196-emi
43 44
44 '#interconnect-cells':45 '#interconnect-cells':
45 const: 146 const: 1
Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - const: qcom,msm8998-bwmon # BWMON v425 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:26 - items:
27 - enum:27 - enum:
28 - qcom,glymur-cpu-bwmon
28 - qcom,kaanapali-cpu-bwmon29 - qcom,kaanapali-cpu-bwmon
29 - qcom,qcm2290-cpu-bwmon30 - qcom,qcm2290-cpu-bwmon
30 - qcom,qcs615-cpu-bwmon31 - qcom,qcs615-cpu-bwmon
Documentation/devicetree/bindings/interconnect/qcom,qcs615-rpmh.yaml+0−2
@@ -27,7 +27,6 @@ properties: · 26 unmodified lines
27 - qcom,qcs615-config-noc27 - qcom,qcs615-config-noc
28 - qcom,qcs615-dc-noc28 - qcom,qcs615-dc-noc
29 - qcom,qcs615-gem-noc29 - qcom,qcs615-gem-noc
30 - qcom,qcs615-ipa-virt
31 - qcom,qcs615-mc-virt30 - qcom,qcs615-mc-virt
32 - qcom,qcs615-mmss-noc31 - qcom,qcs615-mmss-noc
33 - qcom,qcs615-system-noc32 - qcom,qcs615-system-noc
@@ -46,7 +45,6 @@ allOf: · 12 unmodified lines
46 contains:45 contains:
47 enum:46 enum:
48 - qcom,qcs615-camnoc-virt47 - qcom,qcs615-camnoc-virt
49 - qcom,qcs615-ipa-virt
50 - qcom,qcs615-mc-virt48 - qcom,qcs615-mc-virt
51 then:49 then:
52 properties:50 properties:
Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml+31−0
@@ -74,6 +74,37 @@ allOf: · 73 unmodified lines
74 - description: aggre UFS CARD AXI clock74 - description: aggre UFS CARD AXI clock
75 - description: RPMH CC IPA clock75 - description: RPMH CC IPA clock
76 76
77 - if:
78 properties:
79 compatible:
80 contains:
81 enum:
82 - qcom,sa8775p-config-noc
83 - qcom,sa8775p-dc-noc
84 - qcom,sa8775p-gem-noc
85 - qcom,sa8775p-gpdsp-anoc
86 - qcom,sa8775p-lpass-ag-noc
87 - qcom,sa8775p-mmss-noc
88 - qcom,sa8775p-nspa-noc
89 - qcom,sa8775p-nspb-noc
90 - qcom,sa8775p-pcie-anoc
91 - qcom,sa8775p-system-noc
92 then:
93 properties:
94 clocks: false
95
96 - if:
97 properties:
98 compatible:
99 contains:
100 enum:
101 - qcom,sa8775p-clk-virt
102 - qcom,sa8775p-mc-virt
103 then:
104 properties:
105 reg: false
106 clocks: false
107
77unevaluatedProperties: false108unevaluatedProperties: false
78 109
79examples:110examples:
Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml+51−0
@@ -0,0 +1,51 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,qe-ports-ic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale QUICC Engine I/O Ports Interrupt Controller
8
9maintainers:
10 - Christophe Leroy (CS GROUP) <chleroy@kernel.org>
11
12properties:
13 compatible:
14 enum:
15 - fsl,mpc8323-qe-ports-ic
16
17 reg:
18 maxItems: 1
19
20 interrupt-controller: true
21
22 '#address-cells':
23 const: 0
24
25 '#interrupt-cells':
26 const: 1
27
28 interrupts:
29 maxItems: 1
30
31required:
32 - compatible
33 - reg
34 - interrupt-controller
35 - '#address-cells'
36 - '#interrupt-cells'
37 - interrupts
38
39additionalProperties: false
40
41examples:
42 - |
43 interrupt-controller@c00 {
44 compatible = "fsl,mpc8323-qe-ports-ic";
45 reg = <0xc00 0x18>;
46 interrupt-controller;
47 #address-cells = <0>;
48 #interrupt-cells = <1>;
49 interrupts = <74 0x8>;
50 interrupt-parent = <&ipic>;
51 };
Documentation/devicetree/bindings/interrupt-controller/fsl,tzic.yaml+8−0
@@ -12,6 +12,14 @@ maintainers: · 11 unmodified lines
12properties:12properties:
13 compatible:13 compatible:
14 oneOf:14 oneOf:
15 - items:
16 - enum:
17 - fsl,imx1-aitc
18 - fsl,imx25-asic
19 - fsl,imx27-aitc
20 - fsl,imx31-avic
21 - fsl,imx35-avic
22 - const: fsl,avic
15 - items:23 - items:
16 - enum:24 - enum:
17 - fsl,imx51-tzic25 - fsl,imx51-tzic
Documentation/devicetree/bindings/interrupt-controller/loongson,eiointc.yaml+3−0
@@ -29,6 +29,9 @@ properties: · 28 unmodified lines
29 interrupts:29 interrupts:
30 maxItems: 130 maxItems: 1
31 31
32 '#address-cells':
33 const: 0
34
32 interrupt-controller: true35 interrupt-controller: true
33 36
34 '#interrupt-cells':37 '#interrupt-cells':
Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml+3−0
@@ -40,6 +40,9 @@ properties: · 39 unmodified lines
40 - const: isr140 - const: isr1
41 minItems: 241 minItems: 2
42 42
43 '#address-cells':
44 const: 0
45
43 interrupt-controller: true46 interrupt-controller: true
44 47
45 interrupts:48 interrupts:
Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml+3−0
@@ -29,6 +29,9 @@ properties: · 28 unmodified lines
29 minimum: 029 minimum: 0
30 maximum: 19230 maximum: 192
31 31
32 '#address-cells':
33 const: 0
34
32 interrupt-controller: true35 interrupt-controller: true
33 36
34 '#interrupt-cells':37 '#interrupt-cells':
Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml+2−0
@@ -27,6 +27,8 @@ properties: · 26 unmodified lines
27 items:27 items:
28 - enum:28 - enum:
29 - qcom,glymur-pdc29 - qcom,glymur-pdc
30 - qcom,kaanapali-pdc
31 - qcom,milos-pdc
30 - qcom,qcs615-pdc32 - qcom,qcs615-pdc
31 - qcom,qcs8300-pdc33 - qcom,qcs8300-pdc
32 - qcom,qdu1000-pdc34 - qcom,qdu1000-pdc
Documentation/devicetree/bindings/interrupt-controller/renesas,r9a09g077-icu.yaml+236−0
@@ -0,0 +1,236 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/renesas,r9a09g077-icu.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas RZ/{T2H,N2H} Interrupt Controller
8
9maintainers:
10 - Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
11
12allOf:
13 - $ref: /schemas/interrupt-controller.yaml#
14
15description:
16 The Interrupt Controller (ICU) handles software-triggered interrupts
17 (INTCPU), external interrupts (IRQ and SEI), error interrupts and DMAC
18 requests.
19
20properties:
21 compatible:
22 oneOf:
23 - const: renesas,r9a09g077-icu # RZ/T2H
24
25 - items:
26 - enum:
27 - renesas,r9a09g087-icu # RZ/N2H
28 - const: renesas,r9a09g077-icu
29
30 reg:
31 items:
32 - description: Non-safety registers (INTCPU0-13, IRQ0-13)
33 - description: Safety registers (INTCPU14-15, IRQ14-15, SEI)
34
35 '#interrupt-cells':
36 description: The first cell is the SPI number of the interrupt, as per user
37 manual. The second cell is used to specify the flag.
38 const: 2
39
40 '#address-cells':
41 const: 0
42
43 interrupt-controller: true
44
45 interrupts:
46 items:
47 - description: Software interrupt 0
48 - description: Software interrupt 1
49 - description: Software interrupt 2
50 - description: Software interrupt 3
51 - description: Software interrupt 4
52 - description: Software interrupt 5
53 - description: Software interrupt 6
54 - description: Software interrupt 7
55 - description: Software interrupt 8
56 - description: Software interrupt 9
57 - description: Software interrupt 10
58 - description: Software interrupt 11
59 - description: Software interrupt 12
60 - description: Software interrupt 13
61 - description: Software interrupt 14
62 - description: Software interrupt 15
63 - description: External pin interrupt 0
64 - description: External pin interrupt 1
65 - description: External pin interrupt 2
66 - description: External pin interrupt 3
67 - description: External pin interrupt 4
68 - description: External pin interrupt 5
69 - description: External pin interrupt 6
70 - description: External pin interrupt 7
71 - description: External pin interrupt 8
72 - description: External pin interrupt 9
73 - description: External pin interrupt 10
74 - description: External pin interrupt 11
75 - description: External pin interrupt 12
76 - description: External pin interrupt 13
77 - description: External pin interrupt 14
78 - description: External pin interrupt 15
79 - description: System error interrupt
80 - description: Cortex-A55 error event 0
81 - description: Cortex-A55 error event 1
82 - description: Cortex-R52 CPU 0 error event 0
83 - description: Cortex-R52 CPU 0 error event 1
84 - description: Cortex-R52 CPU 1 error event 0
85 - description: Cortex-R52 CPU 1 error event 1
86 - description: Peripherals error event 0
87 - description: Peripherals error event 1
88 - description: DSMIF error event 0
89 - description: DSMIF error event 1
90 - description: ENCIF error event 0
91 - description: ENCIF error event 1
92
93 interrupt-names:
94 items:
95 - const: intcpu0
96 - const: intcpu1
97 - const: intcpu2
98 - const: intcpu3
99 - const: intcpu4
100 - const: intcpu5
101 - const: intcpu6
102 - const: intcpu7
103 - const: intcpu8
104 - const: intcpu9
105 - const: intcpu10
106 - const: intcpu11
107 - const: intcpu12
108 - const: intcpu13
109 - const: intcpu14
110 - const: intcpu15
111 - const: irq0
112 - const: irq1
113 - const: irq2
114 - const: irq3
115 - const: irq4
116 - const: irq5
117 - const: irq6
118 - const: irq7
119 - const: irq8
120 - const: irq9
121 - const: irq10
122 - const: irq11
123 - const: irq12
124 - const: irq13
125 - const: irq14
126 - const: irq15
127 - const: sei
128 - const: ca55-err0
129 - const: ca55-err1
130 - const: cr520-err0
131 - const: cr520-err1
132 - const: cr521-err0
133 - const: cr521-err1
134 - const: peri-err0
135 - const: peri-err1
136 - const: dsmif-err0
137 - const: dsmif-err1
138 - const: encif-err0
139 - const: encif-err1
140
141 clocks:
142 maxItems: 1
143
144 power-domains:
145 maxItems: 1
146
147required:
148 - compatible
149 - reg
150 - '#interrupt-cells'
151 - '#address-cells'
152 - interrupt-controller
153 - interrupts
154 - interrupt-names
155 - clocks
156 - power-domains
157
158unevaluatedProperties: false
159
160examples:
161 - |
162 #include <dt-bindings/interrupt-controller/arm-gic.h>
163 #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>
164
165 icu: interrupt-controller@802a0000 {
166 compatible = "renesas,r9a09g077-icu";
167 reg = <0x802a0000 0x10000>,
168 <0x812a0000 0x50>;
169 #interrupt-cells = <2>;
170 #address-cells = <0>;
171 interrupt-controller;
172 interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>,
173 <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>,
174 <GIC_SPI 2 IRQ_TYPE_EDGE_RISING>,
175 <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>,
176 <GIC_SPI 4 IRQ_TYPE_EDGE_RISING>,
177 <GIC_SPI 5 IRQ_TYPE_EDGE_RISING>,
178 <GIC_SPI 6 IRQ_TYPE_EDGE_RISING>,
179 <GIC_SPI 7 IRQ_TYPE_EDGE_RISING>,
180 <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>,
181 <GIC_SPI 9 IRQ_TYPE_EDGE_RISING>,
182 <GIC_SPI 10 IRQ_TYPE_EDGE_RISING>,
183 <GIC_SPI 11 IRQ_TYPE_EDGE_RISING>,
184 <GIC_SPI 12 IRQ_TYPE_EDGE_RISING>,
185 <GIC_SPI 13 IRQ_TYPE_EDGE_RISING>,
186 <GIC_SPI 14 IRQ_TYPE_EDGE_RISING>,
187 <GIC_SPI 15 IRQ_TYPE_EDGE_RISING>,
188 <GIC_SPI 16 IRQ_TYPE_EDGE_RISING>,
189 <GIC_SPI 17 IRQ_TYPE_EDGE_RISING>,
190 <GIC_SPI 18 IRQ_TYPE_EDGE_RISING>,
191 <GIC_SPI 19 IRQ_TYPE_EDGE_RISING>,
192 <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
193 <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
194 <GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
195 <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>,
196 <GIC_SPI 24 IRQ_TYPE_EDGE_RISING>,
197 <GIC_SPI 25 IRQ_TYPE_EDGE_RISING>,
198 <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>,
199 <GIC_SPI 27 IRQ_TYPE_EDGE_RISING>,
200 <GIC_SPI 28 IRQ_TYPE_EDGE_RISING>,
201 <GIC_SPI 29 IRQ_TYPE_EDGE_RISING>,
202 <GIC_SPI 30 IRQ_TYPE_EDGE_RISING>,
203 <GIC_SPI 31 IRQ_TYPE_EDGE_RISING>,
204 <GIC_SPI 406 IRQ_TYPE_EDGE_RISING>,
205 <GIC_SPI 407 IRQ_TYPE_EDGE_RISING>,
206 <GIC_SPI 408 IRQ_TYPE_EDGE_RISING>,
207 <GIC_SPI 409 IRQ_TYPE_EDGE_RISING>,
208 <GIC_SPI 410 IRQ_TYPE_EDGE_RISING>,
209 <GIC_SPI 411 IRQ_TYPE_EDGE_RISING>,
210 <GIC_SPI 412 IRQ_TYPE_EDGE_RISING>,
211 <GIC_SPI 413 IRQ_TYPE_EDGE_RISING>,
212 <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>,
213 <GIC_SPI 415 IRQ_TYPE_EDGE_RISING>,
214 <GIC_SPI 416 IRQ_TYPE_EDGE_RISING>,
215 <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>,
216 <GIC_SPI 418 IRQ_TYPE_EDGE_RISING>;
217 interrupt-names = "intcpu0", "intcpu1", "intcpu2",
218 "intcpu3", "intcpu4", "intcpu5",
219 "intcpu6", "intcpu7", "intcpu8",
220 "intcpu9", "intcpu10", "intcpu11",
221 "intcpu12", "intcpu13", "intcpu14",
222 "intcpu15",
223 "irq0", "irq1", "irq2", "irq3",
224 "irq4", "irq5", "irq6", "irq7",
225 "irq8", "irq9", "irq10", "irq11",
226 "irq12", "irq13", "irq14", "irq15",
227 "sei",
228 "ca55-err0", "ca55-err1",
229 "cr520-err0", "cr520-err1",
230 "cr521-err0", "cr521-err1",
231 "peri-err0", "peri-err1",
232 "dsmif-err0", "dsmif-err1",
233 "encif-err0", "encif-err1";
234 clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>;
235 power-domains = <&cpg>;
236 };
Documentation/devicetree/bindings/interrupt-controller/renesas,rzv2h-icu.yaml+1−0
@@ -22,6 +22,7 @@ properties: · 21 unmodified lines
22 compatible:22 compatible:
23 enum:23 enum:
24 - renesas,r9a09g047-icu # RZ/G3E24 - renesas,r9a09g047-icu # RZ/G3E
25 - renesas,r9a09g056-icu # RZ/V2N
25 - renesas,r9a09g057-icu # RZ/V2H(P)26 - renesas,r9a09g057-icu # RZ/V2H(P)
26 27
27 '#interrupt-cells':28 '#interrupt-cells':
Documentation/devicetree/bindings/interrupt-controller/riscv,aplic.yaml+1−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
28 items:28 items:
29 - enum:29 - enum:
30 - qemu,aplic30 - qemu,aplic
31 - spacemit,k3-aplic
31 - const: riscv,aplic32 - const: riscv,aplic
32 33
33 reg:34 reg:
Documentation/devicetree/bindings/interrupt-controller/riscv,imsics.yaml+1−0
@@ -48,6 +48,7 @@ properties: · 47 unmodified lines
48 items:48 items:
49 - enum:49 - enum:
50 - qemu,imsics50 - qemu,imsics
51 - spacemit,k3-imsics
51 - const: riscv,imsics52 - const: riscv,imsics
52 53
53 reg:54 reg:
Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+3−1
@@ -108,7 +108,9 @@ properties: · 107 unmodified lines
108 riscv,ndev:108 riscv,ndev:
109 $ref: /schemas/types.yaml#/definitions/uint32109 $ref: /schemas/types.yaml#/definitions/uint32
110 description:110 description:
111 Specifies how many external interrupts are supported by this controller.111 Specifies how many external (device) interrupts are supported by this
112 controller. Note that source 0 is reserved in PLIC, so the valid
113 interrupt sources are 1 to riscv,ndev inclusive.
112 114
113 clocks: true115 clocks: true
114 116
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml+33−5
@@ -15,8 +15,7 @@ allOf: · 14 unmodified lines
15description: |15description: |
16 The Interrupt Router (INTR) module provides a mechanism to mux M16 The Interrupt Router (INTR) module provides a mechanism to mux M
17 interrupt inputs to N interrupt outputs, where all M inputs are selectable17 interrupt inputs to N interrupt outputs, where all M inputs are selectable
18 to be driven per N output. An Interrupt Router can either handle edge18 to be driven per N output.
19 triggered or level triggered interrupts and that is fixed in hardware.
20 19
21 Interrupt Router20 Interrupt Router
22 +----------------------+21 +----------------------+
@@ -64,9 +63,14 @@ properties: · 41 unmodified lines
64 interrupt-controller: true63 interrupt-controller: true
65 64
66 '#interrupt-cells':65 '#interrupt-cells':
67 const: 166 enum: [1, 2]
68 description: |67 description: |
69 The 1st cell should contain interrupt router input hw number.68 Number of cells in interrupt specifier. Depends on ti,intr-trigger-type:
69 - If ti,intr-trigger-type is present: must be 1
70 The 1st cell should contain interrupt router input hw number.
71 - If ti,intr-trigger-type is absent: must be 2
72 The 1st cell should contain interrupt router input hw number.
73 The 2nd cell should contain interrupt trigger type (preserved by router).
70 74
71 ti,interrupt-ranges:75 ti,interrupt-ranges:
72 $ref: /schemas/types.yaml#/definitions/uint32-matrix76 $ref: /schemas/types.yaml#/definitions/uint32-matrix
@@ -82,9 +86,22 @@ properties: · 9 unmodified lines
82 - description: |86 - description: |
83 "limit" specifies the limit for translation87 "limit" specifies the limit for translation
84 88
89if:
90 required:
91 - ti,intr-trigger-type
92then:
93 properties:
94 '#interrupt-cells':
95 const: 1
96 description: Interrupt ID only. Interrupt type is specified globally
97else:
98 properties:
99 '#interrupt-cells':
100 const: 2
101 description: Interrupt ID and corresponding interrupt type
102
85required:103required:
86 - compatible104 - compatible
87 - ti,intr-trigger-type
88 - interrupt-controller105 - interrupt-controller
89 - '#interrupt-cells'106 - '#interrupt-cells'
90 - ti,sci107 - ti,sci
@@ -105,3 +122,14 @@ examples: · 14 unmodified lines
105 ti,sci-dev-id = <131>;122 ti,sci-dev-id = <131>;
106 ti,interrupt-ranges = <0 360 32>;123 ti,interrupt-ranges = <0 360 32>;
107 };124 };
125
126 - |
127 interrupt-controller {
128 compatible = "ti,sci-intr";
129 interrupt-controller;
130 interrupt-parent = <&gic500>;
131 #interrupt-cells = <2>;
132 ti,sci = <&dmsc>;
133 ti,sci-dev-id = <131>;
134 ti,interrupt-ranges = <0 360 32>;
135 };
Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml+26−1
@@ -20,7 +20,12 @@ properties: · 19 unmodified lines
20 $nodename:20 $nodename:
21 pattern: "^iommu@[0-9a-f]*"21 pattern: "^iommu@[0-9a-f]*"
22 compatible:22 compatible:
23 const: arm,smmu-v323 oneOf:
24 - const: arm,smmu-v3
25 - items:
26 - enum:
27 - nvidia,tegra264-smmu
28 - const: arm,smmu-v3
24 29
25 reg:30 reg:
26 maxItems: 131 maxItems: 1
@@ -58,6 +63,15 @@ properties: · 31 unmodified lines
58 63
59 msi-parent: true64 msi-parent: true
60 65
66 nvidia,cmdqv:
67 description: |
68 A phandle to its pairing CMDQV extension for an implementation on NVIDIA
69 Tegra SoC.
70
71 If this property is absent, CMDQ-Virtualization won't be used and SMMU
72 will only use its own CMDQ.
73 $ref: /schemas/types.yaml#/definitions/phandle
74
61 hisilicon,broken-prefetch-cmd:75 hisilicon,broken-prefetch-cmd:
62 type: boolean76 type: boolean
63 description: Avoid sending CMD_PREFETCH_* commands to the SMMU.77 description: Avoid sending CMD_PREFETCH_* commands to the SMMU.
@@ -69,6 +83,17 @@ properties: · 5 unmodified lines
69 register access with page 0 offsets. Set for Cavium ThunderX2 silicon that83 register access with page 0 offsets. Set for Cavium ThunderX2 silicon that
70 doesn't support SMMU page1 register space.84 doesn't support SMMU page1 register space.
71 85
86allOf:
87 - if:
88 not:
89 properties:
90 compatible:
91 contains:
92 const: nvidia,tegra264-smmu
93 then:
94 properties:
95 nvidia,cmdqv: false
96
72required:97required:
73 - compatible98 - compatible
74 - reg99 - reg
Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml+42−0
@@ -0,0 +1,42 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iommu/nvidia,tegra264-cmdqv.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra264 CMDQV
8
9description:
10 The CMDQ-Virtualization hardware block is part of the SMMUv3 implementation
11 on Tegra264 SoCs. It assists in virtualizing the command queue for the SMMU.
12
13maintainers:
14 - Nicolin Chen <nicolinc@nvidia.com>
15
16properties:
17 compatible:
18 const: nvidia,tegra264-cmdqv
19
20 reg:
21 maxItems: 1
22
23 interrupts:
24 maxItems: 1
25
26required:
27 - compatible
28 - reg
29 - interrupts
30
31additionalProperties: false
32
33examples:
34 - |
35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/interrupt-controller/irq.h>
37
38 cmdqv@5200000 {
39 compatible = "nvidia,tegra264-cmdqv";
40 reg = <0x5200000 0x830000>;
41 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
42 };
Documentation/devicetree/bindings/leds/ams,as3668.yaml+74−0
@@ -0,0 +1,74 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/ams,as3668.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Osram 4-channel i2c LED driver
8
9maintainers:
10 - Lukas Timmermann <linux@timmermann.space>
11
12description:
13 This IC can drive up to four separate LEDs.
14 Having four channels suggests it could be used with a single RGBW LED.
15
16properties:
17 compatible:
18 const: ams,as3668
19
20 reg:
21 maxItems: 1
22
23 "#address-cells":
24 const: 1
25
26 "#size-cells":
27 const: 0
28
29patternProperties:
30 "^led@[0-3]$":
31 type: object
32 $ref: common.yaml#
33 unevaluatedProperties: false
34
35 properties:
36 reg:
37 maxItems: 1
38
39required:
40 - compatible
41 - reg
42 - "#address-cells"
43 - "#size-cells"
44
45additionalProperties: false
46
47examples:
48 - |
49 #include <dt-bindings/leds/common.h>
50
51 i2c {
52 #address-cells = <1>;
53 #size-cells = <0>;
54
55 led-controller@42 {
56 compatible = "ams,as3668";
57 reg = <0x42>;
58 #address-cells = <1>;
59 #size-cells = <0>;
60
61 led@0 {
62 reg = <0x0>;
63 function = LED_FUNCTION_STATUS;
64 color = <LED_COLOR_ID_RED>;
65 };
66
67 led@1 {
68 reg = <0x1>;
69 function = LED_FUNCTION_STATUS;
70 color = <LED_COLOR_ID_GREEN>;
71 };
72 };
73 };
74
Documentation/devicetree/bindings/leds/backlight/qcom-wled.yaml+22−2
@@ -98,8 +98,8 @@ properties: · 97 unmodified lines
98 description: |98 description: |
99 Over-voltage protection limit. This property is for WLED4 only.99 Over-voltage protection limit. This property is for WLED4 only.
100 $ref: /schemas/types.yaml#/definitions/uint32100 $ref: /schemas/types.yaml#/definitions/uint32
101 enum: [ 18100, 19600, 29600, 31100 ]101 minimum: 17800
102 default: 29600102 maximum: 31100
103 103
104 qcom,num-strings:104 qcom,num-strings:
105 description: |105 description: |
@@ -239,6 +239,26 @@ allOf: · 133 unmodified lines
239 minimum: 0239 minimum: 0
240 maximum: 4095240 maximum: 4095
241 241
242 - if:
243 properties:
244 compatible:
245 contains:
246 enum:
247 - qcom,pmi8950-wled
248 - qcom,pmi8994-wled
249
250 then:
251 properties:
252 qcom,ovp-millivolt:
253 enum: [ 17800, 19400, 29500, 31000 ]
254 default: 29500
255
256 else:
257 properties:
258 qcom,ovp-millivolt:
259 enum: [ 18100, 19600, 29600, 31100 ]
260 default: 29600
261
242required:262required:
243 - compatible263 - compatible
244 - reg264 - reg
Documentation/devicetree/bindings/leds/iei,wt61p803-puzzle-leds.yaml+41−0
@@ -0,0 +1,41 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/iei,wt61p803-puzzle-leds.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: IEI WT61P803 PUZZLE MCU LED module from IEI Integration Corp.
8
9maintainers:
10 - Luka Kovacic <luka.kovacic@sartura.hr>
11
12description: |
13 This module is a part of the IEI WT61P803 PUZZLE MFD device. For more details
14 see Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml.
15
16 The LED module is a sub-node of the MCU node in the Device Tree.
17
18properties:
19 compatible:
20 const: iei,wt61p803-puzzle-leds
21
22 '#address-cells':
23 const: 1
24
25 '#size-cells':
26 const: 0
27
28 led@0:
29 $ref: common.yaml
30 unevaluatedProperties: false
31
32 properties:
33 reg:
34 const: 0
35
36required:
37 - compatible
38 - '#address-cells'
39 - '#size-cells'
40
41additionalProperties: false
Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml+1−1
@@ -21,7 +21,7 @@ description: | · 20 unmodified lines
21 21
22properties:22properties:
23 $nodename:23 $nodename:
24 pattern: "^multi-led(@[0-9a-f])?$"24 pattern: "^multi-led(@[0-9a-f]|-[0-9]+)?$"
25 25
26 color:26 color:
27 description: |27 description: |
Documentation/devicetree/bindings/leds/leds-is31fl32xx.txt+1−0
@@ -10,6 +10,7 @@ Required properties: · 9 unmodified lines
10 issi,is31fl323510 issi,is31fl3235
11 issi,is31fl321811 issi,is31fl3218
12 issi,is31fl321612 issi,is31fl3216
13 issi,is31fl3293
13 si-en,sn321814 si-en,sn3218
14 si-en,sn321615 si-en,sn3216
15- reg: I2C slave address16- reg: I2C slave address
Documentation/devicetree/bindings/leds/leds-lm3697.txt+0−73
@@ -1,73 +0,0 @@
1* Texas Instruments - LM3697 Highly Efficient White LED Driver
2
3The LM3697 11-bit LED driver provides high-
4performance backlight dimming for 1, 2, or 3 series
5LED strings while delivering up to 90% efficiency.
6
7This device is suitable for display and keypad lighting
8
9Required properties:
10 - compatible:
11 "ti,lm3697"
12 - reg : I2C slave address
13 - #address-cells : 1
14 - #size-cells : 0
15
16Optional properties:
17 - enable-gpios : GPIO pin to enable/disable the device
18 - vled-supply : LED supply
19
20Required child properties:
21 - reg : 0 - LED is Controlled by bank A
22 1 - LED is Controlled by bank B
23 - led-sources : Indicates which HVLED string is associated to which
24 control bank. This is a zero based property so
25 HVLED1 = 0, HVLED2 = 1, HVLED3 = 2.
26 Additional information is contained
27 in Documentation/devicetree/bindings/leds/common.txt
28
29Optional child properties:
30 - ti,brightness-resolution - see Documentation/devicetree/bindings/mfd/ti-lmu.txt
31 - ramp-up-us: see Documentation/devicetree/bindings/mfd/ti-lmu.txt
32 - ramp-down-us: see Documentation/devicetree/bindings/mfd/ti-lmu.txt
33 - label : see Documentation/devicetree/bindings/leds/common.txt
34 - linux,default-trigger :
35 see Documentation/devicetree/bindings/leds/common.txt
36
37Example:
38
39HVLED string 1 and 3 are controlled by control bank A and HVLED 2 string is
40controlled by control bank B.
41
42led-controller@36 {
43 compatible = "ti,lm3697";
44 #address-cells = <1>;
45 #size-cells = <0>;
46 reg = <0x36>;
47
48 enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
49 vled-supply = <&vbatt>;
50
51 led@0 {
52 reg = <0>;
53 led-sources = <0 2>;
54 ti,brightness-resolution = <2047>;
55 ramp-up-us = <5000>;
56 ramp-down-us = <1000>;
57 label = "white:first_backlight_cluster";
58 linux,default-trigger = "backlight";
59 };
60
61 led@1 {
62 reg = <1>;
63 led-sources = <1>;
64 ti,brightness-resolution = <255>;
65 ramp-up-us = <500>;
66 ramp-down-us = <1000>;
67 label = "white:second_backlight_cluster";
68 linux,default-trigger = "backlight";
69 };
70}
71
72For more product information please see the link below:
73https://www.ti.com/lit/ds/symlink/lm3697.pdf
Documentation/devicetree/bindings/leds/leds-lp5860.yaml+111−0
@@ -0,0 +1,111 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/leds-lp5860.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: LED driver for LP5860 RGB LED from Texas Instruments.
8
9maintainers:
10 - Steffen Trumtrar <kernel@pengutronix.de>
11
12description: |
13 The LP5860 is multi-channel, I2C and SPI RGB LED Driver that can group RGB LEDs
14 into a LED group or control them individually.
15
16 For more product information please see the link below:
17 https://www.ti.com/lit/ds/symlink/lp5860.pdf
18
19allOf:
20 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21
22properties:
23 compatible:
24 enum:
25 - ti,lp5860
26
27 reg:
28 maxItems: 1
29
30 '#address-cells':
31 const: 1
32
33 '#size-cells':
34 const: 0
35
36patternProperties:
37 '^multi-led@[0-9a-f]+$':
38 type: object
39 $ref: leds-class-multicolor.yaml#
40 unevaluatedProperties: false
41
42 properties:
43 reg:
44 minimum: 0
45 maximum: 198
46 description:
47 This property denotes the LED module number that is used
48 for the child node.
49
50 '#address-cells':
51 const: 1
52
53 '#size-cells':
54 const: 0
55
56 patternProperties:
57 "^led@[0-9a-f]+$":
58 type: object
59 $ref: common.yaml#
60 unevaluatedProperties: false
61
62 properties:
63 reg:
64 maxItems: 1
65
66 required:
67 - reg
68
69required:
70 - compatible
71 - reg
72
73unevaluatedProperties: false
74
75examples:
76 - |
77 #include <dt-bindings/leds/common.h>
78
79 spi {
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 led-controller@0 {
84 compatible = "ti,lp5860";
85 reg = <0x0>;
86 #address-cells = <1>;
87 #size-cells = <0>;
88
89 multi-led@0 {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 reg = <0x0>;
93 color = <LED_COLOR_ID_RGB>;
94
95 led@0 {
96 reg = <0x0>;
97 color = <LED_COLOR_ID_RED>;
98 };
99
100 led@1 {
101 reg = <0x1>;
102 color = <LED_COLOR_ID_GREEN>;
103 };
104
105 led@2 {
106 reg = <0x2>;
107 color = <LED_COLOR_ID_BLUE>;
108 };
109 };
110 };
111 };
Documentation/devicetree/bindings/leds/leds-qcom-lpg.yaml+1−0
@@ -43,6 +43,7 @@ properties: · 42 unmodified lines
43 - items:43 - items:
44 - enum:44 - enum:
45 - qcom,pm8550-pwm45 - qcom,pm8550-pwm
46 - qcom,pmh0101-pwm
46 - const: qcom,pm8350c-pwm47 - const: qcom,pm8350c-pwm
47 - items:48 - items:
48 - enum:49 - enum:
Documentation/devicetree/bindings/leds/qcom,spmi-flash-led.yaml+1−0
@@ -29,6 +29,7 @@ properties: · 28 unmodified lines
29 - qcom,pm8150l-flash-led29 - qcom,pm8150l-flash-led
30 - qcom,pm8350c-flash-led30 - qcom,pm8350c-flash-led
31 - qcom,pm8550-flash-led31 - qcom,pm8550-flash-led
32 - qcom,pmh0101-flash-led
32 - qcom,pmi8998-flash-led33 - qcom,pmi8998-flash-led
33 - const: qcom,spmi-flash-led34 - const: qcom,spmi-flash-led
34 35
Documentation/devicetree/bindings/leds/rohm,bd71828-leds.yaml+4−3
@@ -10,11 +10,12 @@ maintainers: · 9 unmodified lines
10 - Matti Vaittinen <mazziesaccount@gmail.com>10 - Matti Vaittinen <mazziesaccount@gmail.com>
11 11
12description: |12description: |
13 This module is part of the ROHM BD71828 MFD device. For more details13 This module is part of the ROHM BD71828 and BD72720 MFD device. For more
14 see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml.14 details see Documentation/devicetree/bindings/mfd/rohm,bd71828-pmic.yaml
15 and Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml
15 16
16 The LED controller is represented as a sub-node of the PMIC node on the device17 The LED controller is represented as a sub-node of the PMIC node on the device
17 tree.18 tree. This should be located under "leds" - node in PMIC node.
18 19
19 The device has two LED outputs referred as GRNLED and AMBLED in data-sheet.20 The device has two LED outputs referred as GRNLED and AMBLED in data-sheet.
20 21
Documentation/devicetree/bindings/leds/ti,lm3697.yaml+125−0
@@ -0,0 +1,125 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/ti,lm3697.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI LM3697 Highly Efficient White LED Driver
8
9maintainers:
10 - Dan Murphy <dmurphy@ti.com>
11
12description: >
13 The LM3697 11-bit LED driver provides high-performance backlight dimming for
14 1, 2, or 3 series LED strings while delivering up to 90% efficiency.
15
16 This device is suitable for display and keypad lighting.
17
18properties:
19 compatible:
20 const: ti,lm3697
21
22 reg:
23 maxItems: 1
24
25 '#address-cells':
26 const: 1
27
28 '#size-cells':
29 const: 0
30
31 enable-gpios:
32 description: GPIO pin to enable or disable the device.
33 maxItems: 1
34
35 vled-supply:
36 description: LED supply for the device.
37
38patternProperties:
39 '^led@[01]$':
40 description: LED control bank nodes.
41 $ref: common.yaml#
42 unevaluatedProperties: false
43
44 properties:
45 reg:
46 description: Control bank selection (0 = bank A, 1 = bank B).
47 maximum: 1
48
49 led-sources:
50 description: >
51 HVLED strings associated with this control bank:
52
53 0 - HVLED1
54 1 - HVLED2
55 2 - HVLED3
56 minItems: 1
57 maxItems: 3
58 items:
59 maximum: 2
60
61 ti,brightness-resolution:
62 description: Brightness resolution for the LED string.
63 $ref: /schemas/types.yaml#/definitions/uint32
64 maximum: 2047
65
66 ramp-up-us:
67 description: Ramp-up time in microseconds.
68 minimum: 117
69 maximum: 2048
70
71 ramp-down-us:
72 description: Ramp-down time in microseconds.
73 minimum: 117
74 maximum: 2048
75
76 required:
77 - reg
78 - led-sources
79
80required:
81 - compatible
82 - reg
83 - '#address-cells'
84 - '#size-cells'
85
86additionalProperties: false
87
88examples:
89 - |
90 #include <dt-bindings/gpio/gpio.h>
91
92 i2c {
93 #address-cells = <1>;
94 #size-cells = <0>;
95
96 led-controller@36 {
97 compatible = "ti,lm3697";
98 #address-cells = <1>;
99 #size-cells = <0>;
100 reg = <0x36>;
101
102 enable-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
103 vled-supply = <&vbatt>;
104
105 led@0 {
106 reg = <0>;
107 led-sources = <0 2>;
108 ti,brightness-resolution = <2047>;
109 ramp-up-us = <500>;
110 ramp-down-us = <1000>;
111 label = "white:first_backlight_cluster";
112 linux,default-trigger = "backlight";
113 };
114
115 led@1 {
116 reg = <1>;
117 led-sources = <1>;
118 ti,brightness-resolution = <255>;
119 ramp-up-us = <500>;
120 ramp-down-us = <1000>;
121 label = "white:second_backlight_cluster";
122 linux,default-trigger = "backlight";
123 };
124 };
125 };
Documentation/devicetree/bindings/leds/ti,lp5812.yaml+246−0
@@ -0,0 +1,246 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/leds/ti,lp5812.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: TI LP5812 4x3 Matrix RGB LED Driver with Autonomous Control
8
9maintainers:
10 - Nam Tran <trannamatk@gmail.com>
11
12description: |
13 The LP5812 is a 4x3 matrix RGB LED driver with I2C interface
14 and autonomous animation engine control.
15 For more product information please see the link below:
16 https://www.ti.com/product/LP5812#tech-docs
17
18properties:
19 compatible:
20 const: ti,lp5812
21
22 reg:
23 maxItems: 1
24
25 ti,scan-mode:
26 description: |
27 Selects the LED scan mode of the LP5812. The device supports
28 three modes:
29 - Direct-drive mode (by default if 'ti,scan-mode' is omitted)
30 drives up to 4 LEDs directly by internal current sinks (LED0-LED3).
31 - TCM-drive mode ("tcm:<n>:<order...>") drives up to 12 LEDs
32 (4 RGB) using 1-4 scan multiplexing. The <n> specifies the number
33 of scans (1-4), and <order...> defines the scan order of the outputs.
34 - Mix-drive mode ("mix:<n>:<direct>:<order...>") combines
35 direct-drive and TCM-drive outputs. The <n> specifies the number
36 of scans, <direct> selects the direct-drive outputs, and <order...>
37 defines the scan order.
38 $ref: /schemas/types.yaml#/definitions/string
39 pattern: '^(tcm|mix):[1-4](:[0-3]){1,4}$'
40
41 vcc-supply:
42 description: Regulator providing power to the 'VCC' pin.
43
44 "#address-cells":
45 const: 1
46
47 "#size-cells":
48 const: 0
49
50patternProperties:
51 "^led@[0-3]$":
52 type: object
53 $ref: common.yaml#
54 unevaluatedProperties: false
55
56 properties:
57 reg:
58 minimum: 0
59 maximum: 3
60
61 required:
62 - reg
63
64 "^multi-led@[4-7]$":
65 type: object
66 $ref: leds-class-multicolor.yaml#
67 unevaluatedProperties: false
68
69 properties:
70 reg:
71 minimum: 4
72 maximum: 7
73
74 "#address-cells":
75 const: 1
76
77 "#size-cells":
78 const: 0
79
80 patternProperties:
81 "^led@[4-9a-f]$":
82 type: object
83 $ref: common.yaml#
84 unevaluatedProperties: false
85
86 properties:
87 reg:
88 minimum: 4
89 maximum: 15
90
91 required:
92 - reg
93
94required:
95 - compatible
96 - reg
97
98additionalProperties: false
99
100examples:
101 - |
102 #include <dt-bindings/leds/common.h>
103
104 i2c {
105 #address-cells = <1>;
106 #size-cells = <0>;
107
108 led-controller@1b {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 compatible = "ti,lp5812";
112 reg = <0x1b>;
113 ti,scan-mode = "tcm:4:0:1:2:3";
114 vcc-supply = <&vdd_3v3_reg>;
115
116 led@0 {
117 reg = <0x0>;
118 label = "LED0";
119 led-max-microamp = <25500>;
120 };
121
122 led@1 {
123 reg = <0x1>;
124 label = "LED1";
125 led-max-microamp = <25500>;
126 };
127
128 led@2 {
129 reg = <0x2>;
130 label = "LED2";
131 led-max-microamp = <25500>;
132 };
133
134 led@3 {
135 reg = <0x3>;
136 label = "LED3";
137 led-max-microamp = <25500>;
138 };
139
140 multi-led@4 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 reg = <0x4>;
144 color = <LED_COLOR_ID_RGB>;
145 label = "LED_A";
146
147 led@4 {
148 reg = <0x4>;
149 color = <LED_COLOR_ID_GREEN>;
150 led-max-microamp = <25500>;
151 };
152
153 led@5 {
154 reg = <0x5>;
155 color = <LED_COLOR_ID_RED>;
156 led-max-microamp = <25500>;
157 };
158
159 led@6 {
160 reg = <0x6>;
161 color = <LED_COLOR_ID_BLUE>;
162 led-max-microamp = <25500>;
163 };
164 };
165
166 multi-led@5 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 reg = <0x5>;
170 color = <LED_COLOR_ID_RGB>;
171 label = "LED_B";
172
173 led@7 {
174 reg = <0x7>;
175 color = <LED_COLOR_ID_GREEN>;
176 led-max-microamp = <25500>;
177 };
178
179 led@8 {
180 reg = <0x8>;
181 color = <LED_COLOR_ID_RED>;
182 led-max-microamp = <25500>;
183 };
184
185 led@9 {
186 reg = <0x9>;
187 color = <LED_COLOR_ID_BLUE>;
188 led-max-microamp = <25500>;
189 };
190 };
191
192 multi-led@6 {
193 #address-cells = <1>;
194 #size-cells = <0>;
195 reg = <0x6>;
196 color = <LED_COLOR_ID_RGB>;
197 label = "LED_C";
198
199 led@a {
200 reg = <0xa>;
201 color = <LED_COLOR_ID_GREEN>;
202 led-max-microamp = <25500>;
203 };
204
205 led@b {
206 reg = <0xb>;
207 color = <LED_COLOR_ID_RED>;
208 led-max-microamp = <25500>;
209 };
210
211 led@c {
212 reg = <0xc>;
213 color = <LED_COLOR_ID_BLUE>;
214 led-max-microamp = <25500>;
215 };
216 };
217
218 multi-led@7 {
219 #address-cells = <1>;
220 #size-cells = <0>;
221 reg = <0x7>;
222 color = <LED_COLOR_ID_RGB>;
223 label = "LED_D";
224
225 led@d {
226 reg = <0xd>;
227 color = <LED_COLOR_ID_GREEN>;
228 led-max-microamp = <25500>;
229 };
230
231 led@e {
232 reg = <0xe>;
233 color = <LED_COLOR_ID_RED>;
234 led-max-microamp = <25500>;
235 };
236
237 led@f {
238 reg = <0xf>;
239 color = <LED_COLOR_ID_BLUE>;
240 led-max-microamp = <25500>;
241 };
242 };
243 };
244 };
245
246...
Documentation/devicetree/bindings/mailbox/mediatek,mt8196-vcp-mbox.yaml+49−0
@@ -0,0 +1,49 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mailbox/mediatek,mt8196-vcp-mbox.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Video Companion Processor (VCP) mailbox
8
9maintainers:
10 - Jjian Zhou <Jjian.Zhou@mediatek.com>
11
12description:
13 The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
14 messages through 64 32-bit wide registers. It has 32 interrupt vectors in
15 either direction for signalling purposes.
16
17properties:
18 compatible:
19 enum:
20 - mediatek,mt8196-vcp-mbox
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 maxItems: 1
27
28 "#mbox-cells":
29 const: 0
30
31required:
32 - compatible
33 - reg
34 - interrupts
35 - "#mbox-cells"
36
37additionalProperties: false
38
39examples:
40 - |
41 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 #include <dt-bindings/interrupt-controller/irq.h>
43
44 mailbox@31b80000 {
45 compatible = "mediatek,mt8196-vcp-mbox";
46 reg = <0x31b80000 0x1000>;
47 interrupts = <GIC_SPI 789 IRQ_TYPE_LEVEL_HIGH 0>;
48 #mbox-cells = <0>;
49 };
Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml+5−1
@@ -11,7 +11,11 @@ maintainers: · 10 unmodified lines
11 11
12properties:12properties:
13 compatible:13 compatible:
14 const: microchip,mpfs-mailbox14 oneOf:
15 - items:
16 - const: microchip,pic64gx-mailbox
17 - const: microchip,mpfs-mailbox
18 - const: microchip,mpfs-mailbox
15 19
16 reg:20 reg:
17 oneOf:21 oneOf:
Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml+2−0
@@ -19,6 +19,8 @@ properties: · 18 unmodified lines
19 - items:19 - items:
20 - enum:20 - enum:
21 - qcom,glymur-cpucp-mbox21 - qcom,glymur-cpucp-mbox
22 - qcom,kaanapali-cpucp-mbox
23 - qcom,sm8750-cpucp-mbox
22 - const: qcom,x1e80100-cpucp-mbox24 - const: qcom,x1e80100-cpucp-mbox
23 - enum:25 - enum:
24 - qcom,x1e80100-cpucp-mbox26 - qcom,x1e80100-cpucp-mbox
Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml+2−0
@@ -24,6 +24,8 @@ properties: · 23 unmodified lines
24 compatible:24 compatible:
25 items:25 items:
26 - enum:26 - enum:
27 - qcom,glymur-ipcc
28 - qcom,kaanapali-ipcc
27 - qcom,milos-ipcc29 - qcom,milos-ipcc
28 - qcom,qcs8300-ipcc30 - qcom,qcs8300-ipcc
29 - qcom,qdu1000-ipcc31 - qcom,qdu1000-ipcc
Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml+1−0
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
16 enum:16 enum:
17 - sprd,sc9860-mailbox17 - sprd,sc9860-mailbox
18 - sprd,sc9863a-mailbox18 - sprd,sc9863a-mailbox
19 - sprd,ums9230-mailbox
19 20
20 reg:21 reg:
21 items:22 items:
Documentation/devicetree/bindings/mailbox/xlnx,zynqmp-ipi-mailbox.yaml+11−0
@@ -11,6 +11,17 @@ description: | · 10 unmodified lines
11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI11 messaging between two Xilinx Zynq UltraScale+ MPSoC IPI agents. Each IPI
12 agent owns registers used for notification and buffers for message.12 agent owns registers used for notification and buffers for message.
13 13
14 For Versal devices, there are two types of IPI channels:
15 - Buffered channels: Support message passing and require the "msg"
16 register region to be present on both the host and remote IPI agents.
17 - Buffer-less channels: Support notification only and do not require the
18 "msg" register region. For these channels, the "msg" region should be
19 omitted.
20
21 For message passing, both the host and remote IPI agents must define the "msg"
22 register region. If either agent omits the "msg" region, only notification
23 based communication is possible.
24
14 +-------------------------------------+25 +-------------------------------------+
15 | Xilinx ZynqMP IPI Controller |26 | Xilinx ZynqMP IPI Controller |
16 +-------------------------------------+27 +-------------------------------------+
Documentation/devicetree/bindings/media/i2c/adi,adv7180.yaml+96−1
@@ -30,7 +30,27 @@ properties: · 29 unmodified lines
30 - adi,adv7282-m30 - adi,adv7282-m
31 31
32 reg:32 reg:
33 maxItems: 133 minItems: 1
34 items:
35 - description: main register map
36 - description: VPP or CSI register map
37 - description: CSI register map
38 description:
39 The ADV7180 family may have up to three register maps. All chips have
40 the main register map. The availability of the CSI and VPP register maps
41 depends on the chip variant.
42
43 The addresses of the CSI and VPP register maps are programmable by
44 software. They depend on the board layout and other devices on the I2C
45 bus and are determined by the hardware designer to avoid address
46 conflicts on the I2C bus.
47
48 reg-names:
49 minItems: 1
50 items:
51 - const: main
52 - enum: [ csi, vpp ]
53 - const: csi
34 54
35 powerdown-gpios:55 powerdown-gpios:
36 maxItems: 156 maxItems: 1
@@ -138,6 +158,62 @@ allOf: · 101 unmodified lines
138 required:158 required:
139 - ports159 - ports
140 160
161 - if:
162 properties:
163 compatible:
164 contains:
165 enum:
166 - adi,adv7180
167 - adi,adv7180cp
168 - adi,adv7180st
169 - adi,adv7182
170 then:
171 properties:
172 reg:
173 maxItems: 1
174
175 reg-names:
176 maxItems: 1
177
178 - if:
179 properties:
180 compatible:
181 contains:
182 enum:
183 - adi,adv7281
184 - adi,adv7281-m
185 - adi,adv7281-ma
186 then:
187 properties:
188 reg:
189 minItems: 1
190 maxItems: 2
191
192 reg-names:
193 minItems: 1
194 items:
195 - const: main
196 - const: csi
197
198 - if:
199 properties:
200 compatible:
201 contains:
202 enum:
203 - adi,adv7280
204 - adi,adv7282
205 then:
206 properties:
207 reg:
208 minItems: 1
209 maxItems: 2
210
211 reg-names:
212 minItems: 1
213 items:
214 - const: main
215 - const: vpp
216
141examples:217examples:
142 - |218 - |
143 i2c {219 i2c {
@@ -187,3 +263,22 @@ examples: · 43 unmodified lines
187 };263 };
188 };264 };
189 };265 };
266
267 - |
268 i2c {
269 #address-cells = <1>;
270 #size-cells = <0>;
271
272 composite-in@20 {
273 compatible = "adi,adv7280-m";
274 reg = <0x20>, <0x42>, <0x44>;
275 reg-names = "main", "vpp", "csi";
276
277 port {
278 adv7280_out: endpoint {
279 bus-width = <8>;
280 remote-endpoint = <&vin1ep>;
281 };
282 };
283 };
284 };
Documentation/devicetree/bindings/media/i2c/onnn,mt9m114.yaml+1−1
@@ -95,7 +95,7 @@ examples: · 94 unmodified lines
95 #include <dt-bindings/gpio/gpio.h>95 #include <dt-bindings/gpio/gpio.h>
96 #include <dt-bindings/media/video-interfaces.h>96 #include <dt-bindings/media/video-interfaces.h>
97 97
98 i2c0 {98 i2c {
99 #address-cells = <1>;99 #address-cells = <1>;
100 #size-cells = <0>;100 #size-cells = <0>;
101 101
Documentation/devicetree/bindings/media/i2c/ovti,os05b10.yaml+103−0
@@ -0,0 +1,103 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/i2c/ovti,os05b10.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: OmniVision OS05B10 Image Sensor
8
9maintainers:
10 - Elgin Perumbilly <elgin.perumbilly@siliconsignals.io>
11
12description:
13 The OmniVision OS05B10 is a 5MP (2592x1944) color CMOS image sensor controlled
14 through an I2C-compatible SCCB bus. it outputs RAW10/RAW12 format and uses a
15 1/2.78" optical format.
16
17properties:
18 compatible:
19 const: ovti,os05b10
20
21 reg:
22 maxItems: 1
23
24 clocks:
25 items:
26 - description: XCLK clock
27
28 avdd-supply:
29 description: Analog Domain Power Supply (2.8v)
30
31 dovdd-supply:
32 description: I/O Domain Power Supply (1.8v)
33
34 dvdd-supply:
35 description: Digital Domain Power Supply (1.2v)
36
37 reset-gpios:
38 maxItems: 1
39 description: Reset Pin GPIO Control (active low)
40
41 port:
42 description: MIPI CSI-2 transmitter port
43 $ref: /schemas/graph.yaml#/$defs/port-base
44 additionalProperties: false
45
46 properties:
47 endpoint:
48 $ref: /schemas/media/video-interfaces.yaml#
49 unevaluatedProperties: false
50
51 properties:
52 data-lanes:
53 oneOf:
54 - items:
55 - const: 1
56 - const: 2
57 - const: 3
58 - const: 4
59 - items:
60 - const: 1
61 - const: 2
62 required:
63 - data-lanes
64 - link-frequencies
65
66required:
67 - compatible
68 - reg
69 - clocks
70 - avdd-supply
71 - dovdd-supply
72 - dvdd-supply
73 - port
74
75additionalProperties: false
76
77examples:
78 - |
79 #include <dt-bindings/gpio/gpio.h>
80
81 i2c {
82 #address-cells = <1>;
83 #size-cells = <0>;
84
85 camera-sensor@36 {
86 compatible = "ovti,os05b10";
87 reg = <0x36>;
88 clocks = <&os05b10_clk>;
89 reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
90
91 avdd-supply = <&os05b10_avdd_2v8>;
92 dvdd-supply = <&os05b10_dvdd_1v2>;
93 dovdd-supply = <&os05b10_dovdd_1v8>;
94
95 port {
96 cam_out: endpoint {
97 remote-endpoint = <&mipi_in_cam>;
98 data-lanes = <1 2 3 4>;
99 link-frequencies = /bits/ 64 <600000000>;
100 };
101 };
102 };
103 };
Documentation/devicetree/bindings/media/i2c/ovti,ov5647.yaml+13−1
@@ -14,6 +14,9 @@ description: |- · 13 unmodified lines
14 The OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data14 The OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data
15 interfaces and CCI (I2C compatible) control bus.15 interfaces and CCI (I2C compatible) control bus.
16 16
17allOf:
18 - $ref: /schemas/media/video-interface-devices.yaml#
19
17properties:20properties:
18 compatible:21 compatible:
19 const: ovti,ov564722 const: ovti,ov5647
@@ -30,6 +33,15 @@ properties: · 10 unmodified lines
30 description: Reference to the GPIO connected to the pwdn pin. Active high.33 description: Reference to the GPIO connected to the pwdn pin. Active high.
31 maxItems: 134 maxItems: 1
32 35
36 avdd-supply:
37 description: Analog voltage supply, 2.8 volts
38
39 dvdd-supply:
40 description: Digital core voltage supply, 1.5 volts
41
42 dovdd-supply:
43 description: Digital I/O voltage supply, 1.7 - 3.0 volts
44
33 port:45 port:
34 $ref: /schemas/graph.yaml#/$defs/port-base46 $ref: /schemas/graph.yaml#/$defs/port-base
35 additionalProperties: false47 additionalProperties: false
@@ -48,7 +60,7 @@ required: · 12 unmodified lines
48 - clocks60 - clocks
49 - port61 - port
50 62
51additionalProperties: false63unevaluatedProperties: false
52 64
53examples:65examples:
54 - |66 - |
Documentation/devicetree/bindings/media/i2c/samsung,s5k3m5.yaml+103−0
@@ -0,0 +1,103 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/i2c/samsung,s5k3m5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S5K3M5 Image Sensor
8
9description:
10 Samsung S5K3M5 (ISOCELL 3M5) image sensor is a 13MP image sensor.
11 The sensor is controlled over a serial camera control bus protocol,
12 the widest supported output image frame size is 4208x3120 at 30 frames
13 per second, data output format is RAW10 transferred over 4-lane
14 MIPI D-PHY interface.
15
16maintainers:
17 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
18
19allOf:
20 - $ref: /schemas/media/video-interface-devices.yaml#
21
22properties:
23 compatible:
24 const: samsung,s5k3m5
25
26 reg:
27 maxItems: 1
28
29 clocks:
30 description: MCLK supply clock.
31 maxItems: 1
32
33 reset-gpios:
34 description: Active low GPIO connected to RESET pad of the sensor.
35 maxItems: 1
36
37 afvdd-supply:
38 description: Autofocus actuator voltage supply, 2.8-3.0 volts.
39
40 vdda-supply:
41 description: Analogue voltage supply, 2.8 volts.
42
43 vddd-supply:
44 description: Digital core voltage supply, 1.05 volts.
45
46 vddio-supply:
47 description: Digital I/O voltage supply, 2.8 or 1.8 volts.
48
49 port:
50 $ref: /schemas/graph.yaml#/$defs/port-base
51 additionalProperties: false
52
53 properties:
54 endpoint:
55 $ref: /schemas/media/video-interfaces.yaml#
56 unevaluatedProperties: false
57
58 properties:
59 data-lanes:
60 items:
61 - const: 1
62 - const: 2
63 - const: 3
64 - const: 4
65
66 required:
67 - link-frequencies
68
69required:
70 - compatible
71 - reg
72 - port
73
74unevaluatedProperties: false
75
76examples:
77 - |
78 #include <dt-bindings/gpio/gpio.h>
79
80 i2c {
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 camera@10 {
85 compatible = "samsung,s5k3m5";
86 reg = <0x10>;
87 clocks = <&camera_mclk 0>;
88 assigned-clocks = <&camera_mclk 0>;
89 assigned-clock-rates = <24000000>;
90 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
91 vdda-supply = <&vreg_2p8>;
92 vddd-supply = <&vreg_1p05>;
93 vddio-supply = <&vreg_1p8>;
94
95 port {
96 endpoint {
97 link-frequencies = /bits/ 64 <602500000>;
98 remote-endpoint = <&mipi_csi2_ep>;
99 };
100 };
101 };
102 };
103...
Documentation/devicetree/bindings/media/i2c/samsung,s5kjn1.yaml+103−0
@@ -0,0 +1,103 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/i2c/samsung,s5kjn1.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S5KJN1 Image Sensor
8
9description:
10 Samsung S5KJN1 (ISOCELL JN1) image sensor is a 50MP image sensor.
11 The sensor is controlled over a serial camera control bus protocol,
12 the widest supported output image frame size is 8160x6144 at 10 frames
13 per second, data output format is RAW10 transferred over 4-lane
14 MIPI D-PHY interface.
15
16maintainers:
17 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
18
19allOf:
20 - $ref: /schemas/media/video-interface-devices.yaml#
21
22properties:
23 compatible:
24 const: samsung,s5kjn1
25
26 reg:
27 maxItems: 1
28
29 clocks:
30 description: MCLK supply clock.
31 maxItems: 1
32
33 reset-gpios:
34 description: Active low GPIO connected to RESET pad of the sensor.
35 maxItems: 1
36
37 afvdd-supply:
38 description: Autofocus actuator voltage supply, 2.8-3.0 volts.
39
40 vdda-supply:
41 description: Analogue voltage supply, 2.8 volts.
42
43 vddd-supply:
44 description: Digital core voltage supply, 1.05 volts.
45
46 vddio-supply:
47 description: Digital I/O voltage supply, 1.8 volts.
48
49 port:
50 $ref: /schemas/graph.yaml#/$defs/port-base
51 additionalProperties: false
52
53 properties:
54 endpoint:
55 $ref: /schemas/media/video-interfaces.yaml#
56 unevaluatedProperties: false
57
58 properties:
59 data-lanes:
60 items:
61 - const: 1
62 - const: 2
63 - const: 3
64 - const: 4
65
66 required:
67 - link-frequencies
68
69required:
70 - compatible
71 - reg
72 - port
73
74unevaluatedProperties: false
75
76examples:
77 - |
78 #include <dt-bindings/gpio/gpio.h>
79
80 i2c {
81 #address-cells = <1>;
82 #size-cells = <0>;
83
84 camera@56 {
85 compatible = "samsung,s5kjn1";
86 reg = <0x56>;
87 clocks = <&camera_mclk 0>;
88 assigned-clocks = <&camera_mclk 0>;
89 assigned-clock-rates = <24000000>;
90 reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
91 vdda-supply = <&vreg_2p8>;
92 vddd-supply = <&vreg_1p05>;
93 vddio-supply = <&vreg_1p8>;
94
95 port {
96 endpoint {
97 link-frequencies = /bits/ 64 <700000000>;
98 remote-endpoint = <&mipi_csi2_ep>;
99 };
100 };
101 };
102 };
103...
Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.txt+0−55
@@ -1,55 +0,0 @@
1Toshiba et8ek8 5MP sensor
2
3Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device
4
5More detailed documentation can be found in
6Documentation/devicetree/bindings/media/video-interfaces.txt .
7
8
9Mandatory properties
10--------------------
11
12- compatible: "toshiba,et8ek8"
13- reg: I2C address (0x3e, or an alternative address)
14- vana-supply: Analogue voltage supply (VANA), 2.8 volts
15- clocks: External clock to the sensor
16- reset-gpios: XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor
17 is in hardware standby mode when the signal is in the low state.
18
19
20Optional properties
21-------------------
22
23- flash-leds: See ../video-interfaces.txt
24- lens-focus: See ../video-interfaces.txt
25
26
27Endpoint node mandatory properties
28----------------------------------
29
30- remote-endpoint: A phandle to the bus receiver's endpoint node.
31
32
33Example
34-------
35
36&i2c3 {
37 clock-frequency = <400000>;
38
39 cam1: camera@3e {
40 compatible = "toshiba,et8ek8";
41 reg = <0x3e>;
42 vana-supply = <&vaux4>;
43
44 clocks = <&isp 0>;
45 assigned-clocks = <&isp 0>;
46 assigned-clock-rates = <9600000>;
47
48 reset-gpio = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* 102 */
49 port {
50 csi_cam1: endpoint {
51 remote-endpoint = <&csi_out1>;
52 };
53 };
54 };
55};
Documentation/devicetree/bindings/media/i2c/toshiba,et8ek8.yaml+87−0
@@ -0,0 +1,87 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/i2c/toshiba,et8ek8.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Toshiba et8ek8 5MP sensor
8
9maintainers:
10 - Pavel Machek <pavel@ucw.cz>
11 - Sakari Ailus <sakari.ailus@iki.fi>
12
13description:
14 Toshiba et8ek8 5MP sensor is an image sensor found in Nokia N900 device
15
16allOf:
17 - $ref: /schemas/media/video-interface-devices.yaml#
18
19properties:
20 compatible:
21 const: toshiba,et8ek8
22
23 reg:
24 description:
25 I2C address (0x3e, or an alternative address)
26 maxItems: 1
27
28 vana-supply:
29 description:
30 Analogue voltage supply (VANA), 2.8 volts
31
32 clocks:
33 maxItems: 1
34
35 reset-gpios:
36 description:
37 XSHUTDOWN GPIO. The XSHUTDOWN signal is active low. The sensor
38 is in hardware standby mode when the signal is in the low state.
39 maxItems: 1
40
41 flash-leds:
42 maxItems: 1
43
44 port:
45 $ref: /schemas/graph.yaml#/$defs/port-base
46 additionalProperties: false
47
48 properties:
49 endpoint:
50 $ref: /schemas/media/video-interfaces.yaml#
51 unevaluatedProperties: false
52
53required:
54 - compatible
55 - reg
56 - vana-supply
57 - clocks
58 - reset-gpios
59 - port
60
61unevaluatedProperties: false
62
63examples:
64 - |
65 #include <dt-bindings/gpio/gpio.h>
66
67 i2c {
68 #address-cells = <1>;
69 #size-cells = <0>;
70
71 camera@3e {
72 compatible = "toshiba,et8ek8";
73 reg = <0x3e>;
74 vana-supply = <&vaux4>;
75 clocks = <&isp 0>;
76 assigned-clocks = <&isp 0>;
77 assigned-clock-rates = <9600000>;
78 reset-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
79 flash-leds = <&led>;
80
81 port {
82 csi_cam1: endpoint {
83 remote-endpoint = <&csi_out1>;
84 };
85 };
86 };
87 };
Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml+6−0
@@ -55,6 +55,12 @@ properties: · 54 unmodified lines
55 minItems: 1 # Wrapper and all slots55 minItems: 1 # Wrapper and all slots
56 maxItems: 5 # Wrapper and 4 slots56 maxItems: 5 # Wrapper and 4 slots
57 57
58 sram:
59 $ref: /schemas/types.yaml#/definitions/phandle
60 description:
61 Optional phandle to a reserved on-chip SRAM regions. The SRAM can
62 be used for descriptor storage, which may improve bus utilization.
63
58required:64required:
59 - compatible65 - compatible
60 - reg66 - reg
Documentation/devicetree/bindings/media/qcom,qcs8300-camss.yaml+13−0
@@ -120,6 +120,14 @@ properties: · 119 unmodified lines
120 items:120 items:
121 - const: top121 - const: top
122 122
123 vdda-phy-supply:
124 description:
125 Phandle to a 0.88V regulator supply to CSI PHYs.
126
127 vdda-pll-supply:
128 description:
129 Phandle to 1.2V regulator supply to CSI PHYs pll block.
130
123 ports:131 ports:
124 $ref: /schemas/graph.yaml#/properties/ports132 $ref: /schemas/graph.yaml#/properties/ports
125 133
@@ -160,6 +168,8 @@ required: · 34 unmodified lines
160 - power-domains168 - power-domains
161 - power-domain-names169 - power-domain-names
162 - ports170 - ports
171 - vdda-phy-supply
172 - vdda-pll-supply
163 173
164additionalProperties: false174additionalProperties: false
165 175
@@ -328,6 +338,9 @@ examples: · 162 unmodified lines
328 power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;338 power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
329 power-domain-names = "top";339 power-domain-names = "top";
330 340
341 vdda-phy-supply = <&vreg_l4a_0p88>;
342 vdda-pll-supply = <&vreg_l1c_1p2>;
343
331 ports {344 ports {
332 #address-cells = <1>;345 #address-cells = <1>;
333 #size-cells = <0>;346 #size-cells = <0>;
Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml+2−2
@@ -126,11 +126,11 @@ properties: · 125 unmodified lines
126 126
127 vdda-phy-supply:127 vdda-phy-supply:
128 description:128 description:
129 Phandle to a regulator supply to PHY core block.129 0.88V supply to CSIPHY IP blocks.
130 130
131 vdda-pll-supply:131 vdda-pll-supply:
132 description:132 description:
133 Phandle to 1.8V regulator supply to PHY refclk pll block.133 1.2V supply to CSIPHY IP blocks.
134 134
135 ports:135 ports:
136 $ref: /schemas/graph.yaml#/properties/ports136 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml+2−2
@@ -125,11 +125,11 @@ properties: · 124 unmodified lines
125 125
126 vdda-phy-supply:126 vdda-phy-supply:
127 description:127 description:
128 Phandle to a regulator supply to PHY core block.128 0.88V supply to CSIPHY IP blocks.
129 129
130 vdda-pll-supply:130 vdda-pll-supply:
131 description:131 description:
132 Phandle to 1.8V regulator supply to PHY refclk pll block.132 1.2V supply to CSIPHY IP blocks.
133 133
134 ports:134 ports:
135 $ref: /schemas/graph.yaml#/properties/ports135 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml+2−2
@@ -264,11 +264,11 @@ properties: · 263 unmodified lines
264 264
265 vdda-phy-supply:265 vdda-phy-supply:
266 description:266 description:
267 Phandle to a regulator supply to PHY core block.267 0.88V supply to CSIPHY IP blocks.
268 268
269 vdda-pll-supply:269 vdda-pll-supply:
270 description:270 description:
271 Phandle to 1.8V regulator supply to PHY refclk pll block.271 1.2V supply to CSIPHY IP blocks.
272 272
273required:273required:
274 - clock-names274 - clock-names
Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml+2−2
@@ -91,11 +91,11 @@ properties: · 90 unmodified lines
91 91
92 vdda-phy-supply:92 vdda-phy-supply:
93 description:93 description:
94 Phandle to a regulator supply to PHY core block.94 0.88V supply to CSIPHY IP blocks.
95 95
96 vdda-pll-supply:96 vdda-pll-supply:
97 description:97 description:
98 Phandle to 1.8V regulator supply to PHY refclk pll block.98 1.2V supply to CSIPHY IP blocks.
99 99
100 ports:100 ports:
101 $ref: /schemas/graph.yaml#/properties/ports101 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml+2−2
@@ -207,11 +207,11 @@ properties: · 206 unmodified lines
207 207
208 vdda-phy-supply:208 vdda-phy-supply:
209 description:209 description:
210 Phandle to a regulator supply to PHY core block.210 0.88V supply to CSIPHY IP blocks.
211 211
212 vdda-pll-supply:212 vdda-pll-supply:
213 description:213 description:
214 Phandle to 1.8V regulator supply to PHY refclk pll block.214 1.2V supply to CSIPHY IP blocks.
215 215
216required:216required:
217 - clock-names217 - clock-names
Documentation/devicetree/bindings/media/qcom,sm6150-camss.yaml+439−0
@@ -0,0 +1,439 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/qcom,sm6150-camss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM6150 Camera Subsystem (CAMSS)
8
9maintainers:
10 - Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
11
12description:
13 This binding describes the camera subsystem hardware found on SM6150
14 Qualcomm SoCs. It includes submodules such as CSIPHY (CSI Physical layer)
15 and CSID (CSI Decoder), which comply with the MIPI CSI2 protocol.
16
17 The subsystem also integrates a set of real-time image processing engines
18 and their associated configuration modules, as well as non-real-time engines.
19
20properties:
21 compatible:
22 const: qcom,sm6150-camss
23
24 reg:
25 items:
26 - description: Registers for CSID 0
27 - description: Registers for CSID 1
28 - description: Registers for CSID Lite
29 - description: Registers for CSIPHY 0
30 - description: Registers for CSIPHY 1
31 - description: Registers for CSIPHY 2
32 - description: Registers for VFE 0
33 - description: Registers for VFE 1
34 - description: Registers for VFE Lite
35 - description: Registers for BPS (Bayer Processing Segment)
36 - description: Registers for CAMNOC
37 - description: Registers for CPAS CDM
38 - description: Registers for CPAS TOP
39 - description: Registers for ICP (Imaging Control Processor) CSR (Control and Status Registers)
40 - description: Registers for ICP QGIC (Qualcomm Generic Interrupt Controller)
41 - description: Registers for ICP SIERRA ((A5 subsystem communication))
42 - description: Registers for IPE (Image Postprocessing Engine) 0
43 - description: Registers for JPEG DMA
44 - description: Registers for JPEG ENC
45 - description: Registers for LRME (Low Resolution Motion Estimation)
46
47 reg-names:
48 items:
49 - const: csid0
50 - const: csid1
51 - const: csid_lite
52 - const: csiphy0
53 - const: csiphy1
54 - const: csiphy2
55 - const: vfe0
56 - const: vfe1
57 - const: vfe_lite
58 - const: bps
59 - const: camnoc
60 - const: cpas_cdm
61 - const: cpas_top
62 - const: icp_csr
63 - const: icp_qgic
64 - const: icp_sierra
65 - const: ipe0
66 - const: jpeg_dma
67 - const: jpeg_enc
68 - const: lrme
69
70 clocks:
71 maxItems: 33
72
73 clock-names:
74 items:
75 - const: gcc_ahb
76 - const: gcc_axi_hf
77 - const: camnoc_axi
78 - const: cpas_ahb
79 - const: csiphy0
80 - const: csiphy0_timer
81 - const: csiphy1
82 - const: csiphy1_timer
83 - const: csiphy2
84 - const: csiphy2_timer
85 - const: soc_ahb
86 - const: vfe0
87 - const: vfe0_axi
88 - const: vfe0_cphy_rx
89 - const: vfe0_csid
90 - const: vfe1
91 - const: vfe1_axi
92 - const: vfe1_cphy_rx
93 - const: vfe1_csid
94 - const: vfe_lite
95 - const: vfe_lite_cphy_rx
96 - const: vfe_lite_csid
97 - const: bps
98 - const: bps_ahb
99 - const: bps_axi
100 - const: bps_areg
101 - const: icp
102 - const: ipe0
103 - const: ipe0_ahb
104 - const: ipe0_areg
105 - const: ipe0_axi
106 - const: jpeg
107 - const: lrme
108
109 interrupts:
110 maxItems: 15
111
112 interrupt-names:
113 items:
114 - const: csid0
115 - const: csid1
116 - const: csid_lite
117 - const: csiphy0
118 - const: csiphy1
119 - const: csiphy2
120 - const: vfe0
121 - const: vfe1
122 - const: vfe_lite
123 - const: camnoc
124 - const: cdm
125 - const: icp
126 - const: jpeg_dma
127 - const: jpeg_enc
128 - const: lrme
129
130 interconnects:
131 maxItems: 4
132
133 interconnect-names:
134 items:
135 - const: ahb
136 - const: hf_0
137 - const: hf_1
138 - const: sf_mnoc
139
140 iommus:
141 items:
142 - description: Camera IFE 0 non-protected stream
143 - description: Camera IFE 1 non-protected stream
144 - description: Camera IFE 3 non-protected stream
145 - description: Camera CDM non-protected stream
146 - description: Camera LRME read non-protected stream
147 - description: Camera IPE 0 read non-protected stream
148 - description: Camera BPS read non-protected stream
149 - description: Camera IPE 0 write non-protected stream
150 - description: Camera BPS write non-protected stream
151 - description: Camera LRME write non-protected stream
152 - description: Camera JPEG read non-protected stream
153 - description: Camera JPEG write non-protected stream
154 - description: Camera ICP stream
155
156 power-domains:
157 items:
158 - description:
159 IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
160 - description:
161 IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
162 - description:
163 Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
164 - description:
165 Titan BPS - Bayer Processing Segment, Global Distributed Switch Controller.
166 - description:
167 IPE GDSC - Image Postprocessing Engine, Global Distributed Switch Controller.
168
169 power-domain-names:
170 items:
171 - const: ife0
172 - const: ife1
173 - const: top
174 - const: bps
175 - const: ipe
176
177 vdd-csiphy-1p2-supply:
178 description:
179 Phandle to a 1.2V regulator supply to CSI PHYs.
180
181 vdd-csiphy-1p8-supply:
182 description:
183 Phandle to 1.8V regulator supply to CSI PHYs pll block.
184
185 ports:
186 $ref: /schemas/graph.yaml#/properties/ports
187
188 description:
189 CSI input ports.
190
191 patternProperties:
192 "^port@[0-2]$":
193 $ref: /schemas/graph.yaml#/$defs/port-base
194 unevaluatedProperties: false
195
196 description:
197 Input port for receiving CSI data from a CSIPHY.
198
199 properties:
200 endpoint:
201 $ref: video-interfaces.yaml#
202 unevaluatedProperties: false
203
204 properties:
205 data-lanes:
206 minItems: 1
207 maxItems: 4
208
209 required:
210 - data-lanes
211
212required:
213 - compatible
214 - reg
215 - reg-names
216 - clocks
217 - clock-names
218 - interrupts
219 - interrupt-names
220 - interconnects
221 - interconnect-names
222 - iommus
223 - power-domains
224 - power-domain-names
225
226additionalProperties: false
227
228examples:
229 - |
230 #include <dt-bindings/clock/qcom,qcs615-camcc.h>
231 #include <dt-bindings/clock/qcom,qcs615-gcc.h>
232 #include <dt-bindings/clock/qcom,rpmh.h>
233 #include <dt-bindings/interconnect/qcom,icc.h>
234 #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
235 #include <dt-bindings/interrupt-controller/arm-gic.h>
236 #include <dt-bindings/power/qcom-rpmpd.h>
237
238 soc {
239 #address-cells = <2>;
240 #size-cells = <2>;
241
242 camss: isp@acb3000 {
243 compatible = "qcom,sm6150-camss";
244
245 reg = <0x0 0x0acb3000 0x0 0x1000>,
246 <0x0 0x0acba000 0x0 0x1000>,
247 <0x0 0x0acc8000 0x0 0x1000>,
248 <0x0 0x0ac65000 0x0 0x1000>,
249 <0x0 0x0ac66000 0x0 0x1000>,
250 <0x0 0x0ac67000 0x0 0x1000>,
251 <0x0 0x0acaf000 0x0 0x4000>,
252 <0x0 0x0acb6000 0x0 0x4000>,
253 <0x0 0x0acc4000 0x0 0x4000>,
254 <0x0 0x0ac6f000 0x0 0x3000>,
255 <0x0 0x0ac42000 0x0 0x5000>,
256 <0x0 0x0ac48000 0x0 0x1000>,
257 <0x0 0x0ac40000 0x0 0x1000>,
258 <0x0 0x0ac18000 0x0 0x3000>,
259 <0x0 0x0ac00000 0x0 0x6000>,
260 <0x0 0x0ac10000 0x0 0x8000>,
261 <0x0 0x0ac87000 0x0 0x3000>,
262 <0x0 0x0ac52000 0x0 0x4000>,
263 <0x0 0x0ac4e000 0x0 0x4000>,
264 <0x0 0x0ac6b000 0x0 0x0a00>;
265 reg-names = "csid0",
266 "csid1",
267 "csid_lite",
268 "csiphy0",
269 "csiphy1",
270 "csiphy2",
271 "vfe0",
272 "vfe1",
273 "vfe_lite",
274 "bps",
275 "camnoc",
276 "cpas_cdm",
277 "cpas_top",
278 "icp_csr",
279 "icp_qgic",
280 "icp_sierra",
281 "ipe0",
282 "jpeg_dma",
283 "jpeg_enc",
284 "lrme";
285
286 clocks = <&gcc GCC_CAMERA_AHB_CLK>,
287 <&gcc GCC_CAMERA_HF_AXI_CLK>,
288 <&camcc CAM_CC_CAMNOC_AXI_CLK>,
289 <&camcc CAM_CC_CPAS_AHB_CLK>,
290 <&camcc CAM_CC_CSIPHY0_CLK>,
291 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
292 <&camcc CAM_CC_CSIPHY1_CLK>,
293 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
294 <&camcc CAM_CC_CSIPHY2_CLK>,
295 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
296 <&camcc CAM_CC_SOC_AHB_CLK>,
297 <&camcc CAM_CC_IFE_0_CLK>,
298 <&camcc CAM_CC_IFE_0_AXI_CLK>,
299 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
300 <&camcc CAM_CC_IFE_0_CSID_CLK>,
301 <&camcc CAM_CC_IFE_1_CLK>,
302 <&camcc CAM_CC_IFE_1_AXI_CLK>,
303 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
304 <&camcc CAM_CC_IFE_1_CSID_CLK>,
305 <&camcc CAM_CC_IFE_LITE_CLK>,
306 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
307 <&camcc CAM_CC_IFE_LITE_CSID_CLK>,
308 <&camcc CAM_CC_BPS_CLK>,
309 <&camcc CAM_CC_BPS_AHB_CLK>,
310 <&camcc CAM_CC_BPS_AXI_CLK>,
311 <&camcc CAM_CC_BPS_AREG_CLK>,
312 <&camcc CAM_CC_ICP_CLK>,
313 <&camcc CAM_CC_IPE_0_CLK>,
314 <&camcc CAM_CC_IPE_0_AHB_CLK>,
315 <&camcc CAM_CC_IPE_0_AREG_CLK>,
316 <&camcc CAM_CC_IPE_0_AXI_CLK>,
317 <&camcc CAM_CC_JPEG_CLK>,
318 <&camcc CAM_CC_LRME_CLK>;
319
320 clock-names = "gcc_ahb",
321 "gcc_axi_hf",
322 "camnoc_axi",
323 "cpas_ahb",
324 "csiphy0",
325 "csiphy0_timer",
326 "csiphy1",
327 "csiphy1_timer",
328 "csiphy2",
329 "csiphy2_timer",
330 "soc_ahb",
331 "vfe0",
332 "vfe0_axi",
333 "vfe0_cphy_rx",
334 "vfe0_csid",
335 "vfe1",
336 "vfe1_axi",
337 "vfe1_cphy_rx",
338 "vfe1_csid",
339 "vfe_lite",
340 "vfe_lite_cphy_rx",
341 "vfe_lite_csid",
342 "bps",
343 "bps_ahb",
344 "bps_axi",
345 "bps_areg",
346 "icp",
347 "ipe0",
348 "ipe0_ahb",
349 "ipe0_areg",
350 "ipe0_axi",
351 "jpeg",
352 "lrme";
353
354 interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
355 &config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
356 <&mmss_noc MASTER_CAMNOC_HF0 QCOM_ICC_TAG_ALWAYS
357 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
358 <&mmss_noc MASTER_CAMNOC_HF1 QCOM_ICC_TAG_ALWAYS
359 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
360 <&mmss_noc MASTER_CAMNOC_SF QCOM_ICC_TAG_ALWAYS
361 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
362 interconnect-names = "ahb",
363 "hf_0",
364 "hf_1",
365 "sf_mnoc";
366
367 interrupts = <GIC_SPI 464 IRQ_TYPE_EDGE_RISING>,
368 <GIC_SPI 466 IRQ_TYPE_EDGE_RISING>,
369 <GIC_SPI 468 IRQ_TYPE_EDGE_RISING>,
370 <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
371 <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
372 <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
373 <GIC_SPI 465 IRQ_TYPE_EDGE_RISING>,
374 <GIC_SPI 467 IRQ_TYPE_EDGE_RISING>,
375 <GIC_SPI 469 IRQ_TYPE_EDGE_RISING>,
376 <GIC_SPI 459 IRQ_TYPE_EDGE_RISING>,
377 <GIC_SPI 461 IRQ_TYPE_EDGE_RISING>,
378 <GIC_SPI 463 IRQ_TYPE_EDGE_RISING>,
379 <GIC_SPI 475 IRQ_TYPE_EDGE_RISING>,
380 <GIC_SPI 474 IRQ_TYPE_EDGE_RISING>,
381 <GIC_SPI 476 IRQ_TYPE_EDGE_RISING>;
382 interrupt-names = "csid0",
383 "csid1",
384 "csid_lite",
385 "csiphy0",
386 "csiphy1",
387 "csiphy2",
388 "vfe0",
389 "vfe1",
390 "vfe_lite",
391 "camnoc",
392 "cdm",
393 "icp",
394 "jpeg_dma",
395 "jpeg_enc",
396 "lrme";
397
398 iommus = <&apps_smmu 0x0820 0x40>,
399 <&apps_smmu 0x0840 0x00>,
400 <&apps_smmu 0x0860 0x40>,
401 <&apps_smmu 0x0c00 0x00>,
402 <&apps_smmu 0x0cc0 0x00>,
403 <&apps_smmu 0x0c80 0x00>,
404 <&apps_smmu 0x0ca0 0x00>,
405 <&apps_smmu 0x0d00 0x00>,
406 <&apps_smmu 0x0d20 0x00>,
407 <&apps_smmu 0x0d40 0x00>,
408 <&apps_smmu 0x0d80 0x20>,
409 <&apps_smmu 0x0da0 0x20>,
410 <&apps_smmu 0x0de2 0x00>;
411
412 power-domains = <&camcc IFE_0_GDSC>,
413 <&camcc IFE_1_GDSC>,
414 <&camcc TITAN_TOP_GDSC>,
415 <&camcc BPS_GDSC>,
416 <&camcc IPE_0_GDSC>;
417 power-domain-names = "ife0",
418 "ife1",
419 "top",
420 "bps",
421 "ipe";
422
423 vdd-csiphy-1p2-supply = <&vreg_l11a_1p2>;
424 vdd-csiphy-1p8-supply = <&vreg_l12a_1p8>;
425
426 ports {
427 #address-cells = <1>;
428 #size-cells = <0>;
429
430 port@0 {
431 reg = <0>;
432 csiphy_ep0: endpoint {
433 data-lanes = <0 1>;
434 remote-endpoint = <&sensor_ep>;
435 };
436 };
437 };
438 };
439 };
Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml+2−2
@@ -296,11 +296,11 @@ properties: · 295 unmodified lines
296 296
297 vdda-phy-supply:297 vdda-phy-supply:
298 description:298 description:
299 Phandle to a regulator supply to PHY core block.299 0.88V supply to CSIPHY IP blocks.
300 300
301 vdda-pll-supply:301 vdda-pll-supply:
302 description:302 description:
303 Phandle to 1.8V regulator supply to PHY refclk pll block.303 1.2V supply to CSIPHY IP blocks.
304 304
305required:305required:
306 - clock-names306 - clock-names
Documentation/devicetree/bindings/media/qcom,sm8550-camss.yaml+2−2
@@ -134,11 +134,11 @@ properties: · 133 unmodified lines
134 134
135 vdda-phy-supply:135 vdda-phy-supply:
136 description:136 description:
137 Phandle to a regulator supply to PHY core block.137 0.88V supply to CSIPHY IP blocks.
138 138
139 vdda-pll-supply:139 vdda-pll-supply:
140 description:140 description:
141 Phandle to 1.2V regulator supply to PHY refclk pll block.141 1.2V supply to CSIPHY IP blocks.
142 142
143 ports:143 ports:
144 $ref: /schemas/graph.yaml#/properties/ports144 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml+2−2
@@ -120,11 +120,11 @@ properties: · 119 unmodified lines
120 120
121 vdd-csiphy-0p8-supply:121 vdd-csiphy-0p8-supply:
122 description:122 description:
123 Phandle to a 0.8V regulator supply to a PHY.123 0.8V supply to a PHY.
124 124
125 vdd-csiphy-1p2-supply:125 vdd-csiphy-1p2-supply:
126 description:126 description:
127 Phandle to 1.2V regulator supply to a PHY.127 1.2V supply to a PHY.
128 128
129 ports:129 ports:
130 $ref: /schemas/graph.yaml#/properties/ports130 $ref: /schemas/graph.yaml#/properties/ports
Documentation/devicetree/bindings/media/renesas,fcp.yaml+1−0
@@ -77,6 +77,7 @@ allOf: · 76 unmodified lines
77 - renesas,r9a07g043u-fcpvd77 - renesas,r9a07g043u-fcpvd
78 - renesas,r9a07g044-fcpvd78 - renesas,r9a07g044-fcpvd
79 - renesas,r9a07g054-fcpvd79 - renesas,r9a07g054-fcpvd
80 - renesas,r9a09g056-fcpvd
80 - renesas,r9a09g057-fcpvd81 - renesas,r9a09g057-fcpvd
81 then:82 then:
82 properties:83 properties:
Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml+141−0
@@ -0,0 +1,141 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi2.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip MIPI CSI-2 Receiver
8
9maintainers:
10 - Michael Riesch <michael.riesch@collabora.com>
11
12description:
13 The Rockchip MIPI CSI-2 Receiver is a CSI-2 bridge with one input port and
14 one output port. It receives the data with the help of an external MIPI PHY
15 (C-PHY or D-PHY) and passes it to the Rockchip Video Capture (VICAP) block.
16
17properties:
18 compatible:
19 enum:
20 - rockchip,rk3568-mipi-csi2
21
22 reg:
23 maxItems: 1
24
25 interrupts:
26 items:
27 - description: Interrupt that signals changes in CSI2HOST_ERR1.
28 - description: Interrupt that signals changes in CSI2HOST_ERR2.
29
30 interrupt-names:
31 items:
32 - const: err1
33 - const: err2
34
35 clocks:
36 maxItems: 1
37
38 phys:
39 maxItems: 1
40 description: MIPI C-PHY or D-PHY.
41
42 ports:
43 $ref: /schemas/graph.yaml#/properties/ports
44
45 properties:
46 port@0:
47 $ref: /schemas/graph.yaml#/$defs/port-base
48 unevaluatedProperties: false
49 description: Input port node. Connect to e.g., a MIPI CSI-2 image sensor.
50
51 properties:
52 endpoint:
53 $ref: video-interfaces.yaml#
54 unevaluatedProperties: false
55
56 properties:
57 bus-type:
58 enum:
59 - 1 # MEDIA_BUS_TYPE_CSI2_CPHY
60 - 4 # MEDIA_BUS_TYPE_CSI2_DPHY
61
62 data-lanes:
63 minItems: 1
64 maxItems: 4
65
66 required:
67 - bus-type
68 - data-lanes
69
70 port@1:
71 $ref: /schemas/graph.yaml#/properties/port
72 description: Output port connected to a Rockchip VICAP port.
73
74 required:
75 - port@0
76 - port@1
77
78 power-domains:
79 maxItems: 1
80
81 resets:
82 maxItems: 1
83
84required:
85 - compatible
86 - reg
87 - clocks
88 - phys
89 - ports
90 - power-domains
91 - resets
92
93additionalProperties: false
94
95examples:
96 - |
97 #include <dt-bindings/clock/rk3568-cru.h>
98 #include <dt-bindings/interrupt-controller/arm-gic.h>
99 #include <dt-bindings/media/video-interfaces.h>
100 #include <dt-bindings/power/rk3568-power.h>
101
102 soc {
103 interrupt-parent = <&gic>;
104 #address-cells = <2>;
105 #size-cells = <2>;
106
107 csi: csi@fdfb0000 {
108 compatible = "rockchip,rk3568-mipi-csi2";
109 reg = <0x0 0xfdfb0000 0x0 0x10000>;
110 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
111 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
112 interrupt-names = "err1", "err2";
113 clocks = <&cru PCLK_CSI2HOST1>;
114 phys = <&csi_dphy>;
115 power-domains = <&power RK3568_PD_VI>;
116 resets = <&cru SRST_P_CSI2HOST1>;
117
118 ports {
119 #address-cells = <1>;
120 #size-cells = <0>;
121
122 csi_in: port@0 {
123 reg = <0>;
124
125 csi_input: endpoint {
126 bus-type = <MEDIA_BUS_TYPE_CSI2_DPHY>;
127 data-lanes = <1 2 3 4>;
128 remote-endpoint = <&imx415_output>;
129 };
130 };
131
132 csi_out: port@1 {
133 reg = <1>;
134
135 csi_output: endpoint {
136 remote-endpoint = <&vicap_mipi_input>;
137 };
138 };
139 };
140 };
141 };
Documentation/devicetree/bindings/media/samsung,exynos5250-gsc.yaml+1−1
@@ -9,7 +9,7 @@ title: Samsung Exynos SoC G-Scaler · 8 unmodified lines
9maintainers:9maintainers:
10 - Inki Dae <inki.dae@samsung.com>10 - Inki Dae <inki.dae@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>11 - Krzysztof Kozlowski <krzk@kernel.org>
12 - Seung-Woo Kim <sw0312.kim@samsung.com12 - Seung-Woo Kim <sw0312.kim@samsung.com>
13 13
14description:14description:
15 G-Scaler is used for scaling and color space conversion on Samsung Exynos15 G-Scaler is used for scaling and color space conversion on Samsung Exynos
Documentation/devicetree/bindings/media/st,stm32-dcmipp.yaml+3−0
@@ -37,6 +37,9 @@ properties: · 36 unmodified lines
37 resets:37 resets:
38 maxItems: 138 maxItems: 1
39 39
40 power-domains:
41 maxItems: 1
42
40 access-controllers:43 access-controllers:
41 minItems: 144 minItems: 1
42 maxItems: 245 maxItems: 2
Documentation/devicetree/bindings/media/st,stm32mp25-csi.yaml+3−0
@@ -46,6 +46,9 @@ properties: · 45 unmodified lines
46 minItems: 146 minItems: 1
47 maxItems: 247 maxItems: 2
48 48
49 power-domains:
50 maxItems: 1
51
49 ports:52 ports:
50 $ref: /schemas/graph.yaml#/properties/ports53 $ref: /schemas/graph.yaml#/properties/ports
51 54
Documentation/devicetree/bindings/media/ti,omap3isp.txt+0−71
@@ -1,71 +0,0 @@
1OMAP 3 ISP Device Tree bindings
2===============================
3
4The DT definitions can be found in include/dt-bindings/media/omap3-isp.h.
5
6Required properties
7===================
8
9compatible : must contain "ti,omap3-isp"
10
11reg : the two registers sets (physical address and length) for the
12 ISP. The first set contains the core ISP registers up to
13 the end of the SBL block. The second set contains the
14 CSI PHYs and receivers registers.
15interrupts : the ISP interrupt specifier
16iommus : phandle and IOMMU specifier for the IOMMU that serves the ISP
17syscon : the phandle and register offset to the Complex I/O or CSI-PHY
18 register
19ti,phy-type : 0 -- OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. 3430)
20 1 -- OMAP3ISP_PHY_TYPE_CSIPHY (e.g. 3630)
21#clock-cells : Must be 1 --- the ISP provides two external clocks,
22 cam_xclka and cam_xclkb, at indices 0 and 1,
23 respectively. Please find more information on common
24 clock bindings in ../clock/clock-bindings.txt.
25
26Port nodes (optional)
27---------------------
28
29More documentation on these bindings is available in
30video-interfaces.txt in the same directory.
31
32reg : The interface:
33 0 - parallel (CCDC)
34 1 - CSIPHY1 -- CSI2C / CCP2B on 3630;
35 CSI1 -- CSIb on 3430
36 2 - CSIPHY2 -- CSI2A / CCP2B on 3630;
37 CSI2 -- CSIa on 3430
38
39Optional properties
40===================
41
42vdd-csiphy1-supply : voltage supply of the CSI-2 PHY 1
43vdd-csiphy2-supply : voltage supply of the CSI-2 PHY 2
44
45Endpoint nodes
46--------------
47
48lane-polarities : lane polarity (required on CSI-2)
49 0 -- not inverted; 1 -- inverted
50data-lanes : an array of data lanes from 1 to 3. The length can
51 be either 1 or 2. (required on CSI-2)
52clock-lanes : the clock lane (from 1 to 3). (required on CSI-2)
53
54
55Example
56=======
57
58 isp@480bc000 {
59 compatible = "ti,omap3-isp";
60 reg = <0x480bc000 0x12fc
61 0x480bd800 0x0600>;
62 interrupts = <24>;
63 iommus = <&mmu_isp>;
64 syscon = <&scm_conf 0x2f0>;
65 ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
66 #clock-cells = <1>;
67 ports {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 };
71 };
Documentation/devicetree/bindings/media/ti,omap3isp.yaml+189−0
@@ -0,0 +1,189 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/ti,omap3isp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Texas Instruments OMAP 3 Image Signal Processor (ISP)
8
9maintainers:
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
11 - Sakari Ailus <sakari.ailus@iki.fi>
12
13description:
14 The OMAP 3 ISP is an image signal processor present in OMAP 3 SoCs.
15
16properties:
17 compatible:
18 const: ti,omap3-isp
19
20 reg:
21 items:
22 - description: Core ISP registers up to the end of the SBL block
23 - description: CSI PHYs and receivers registers
24
25 interrupts:
26 maxItems: 1
27
28 iommus:
29 maxItems: 1
30
31 syscon:
32 $ref: /schemas/types.yaml#/definitions/phandle-array
33 items:
34 - items:
35 - description: phandle to System Control Module
36 - description: register offset to Complex I/O or CSI-PHY register
37 description:
38 Phandle and register offset to the Complex I/O or CSI-PHY register
39
40 ti,phy-type:
41 $ref: /schemas/types.yaml#/definitions/uint32
42 enum: [0, 1]
43 description:
44 0 - OMAP3ISP_PHY_TYPE_COMPLEX_IO (e.g. OMAP 3430)
45 1 - OMAP3ISP_PHY_TYPE_CSIPHY (e.g. OMAP 3630)
46
47 '#clock-cells':
48 const: 1
49 description:
50 The ISP provides two external clocks, cam_xclka and cam_xclkb,
51 at indices 0 and 1 respectively.
52
53 vdd-csiphy1-supply:
54 description: Voltage supply of the CSI-2 PHY 1
55
56 vdd-csiphy2-supply:
57 description: Voltage supply of the CSI-2 PHY 2
58
59 ports:
60 $ref: /schemas/graph.yaml#/properties/ports
61
62 properties:
63 port@0:
64 $ref: /schemas/graph.yaml#/$defs/port-base
65 unevaluatedProperties: false
66 description: Parallel (CCDC) interface
67
68 properties:
69 endpoint:
70 $ref: /schemas/media/video-interfaces.yaml#
71 unevaluatedProperties: false
72
73 port@1:
74 $ref: /schemas/graph.yaml#/$defs/port-base
75 unevaluatedProperties: false
76 description: |
77 CSIPHY1 interface:
78 OMAP 3630: CSI2C / CCP2B
79 OMAP 3430: CSI1 (CSIb)
80
81 properties:
82 endpoint:
83 $ref: /schemas/media/video-interfaces.yaml#
84 unevaluatedProperties: false
85
86 properties:
87 lane-polarities:
88 minItems: 2
89 maxItems: 3
90
91 data-lanes:
92 minItems: 1
93 maxItems: 2
94 items:
95 minimum: 1
96 maximum: 3
97
98 clock-lanes:
99 minimum: 1
100 maximum: 3
101
102 port@2:
103 $ref: /schemas/graph.yaml#/$defs/port-base
104 unevaluatedProperties: false
105 description: |
106 CSIPHY2 interface:
107 OMAP 3630: CSI2A / CCP2B
108 OMAP 3430: CSI2 (CSIa)
109
110 properties:
111 endpoint:
112 $ref: /schemas/media/video-interfaces.yaml#
113 unevaluatedProperties: false
114
115 properties:
116 lane-polarities:
117 minItems: 2
118 maxItems: 3
119
120 data-lanes:
121 minItems: 1
122 maxItems: 2
123 items:
124 minimum: 1
125 maximum: 3
126
127 clock-lanes:
128 minimum: 1
129 maximum: 3
130
131required:
132 - compatible
133 - reg
134 - interrupts
135 - iommus
136 - syscon
137 - ti,phy-type
138 - '#clock-cells'
139
140additionalProperties: false
141
142examples:
143 - |
144 #include <dt-bindings/media/omap3-isp.h>
145
146 isp@480bc000 {
147 compatible = "ti,omap3-isp";
148 reg = <0x480bc000 0x12fc>,
149 <0x480bd800 0x0600>;
150 interrupts = <24>;
151 iommus = <&mmu_isp>;
152 syscon = <&scm_conf 0x2f0>;
153 ti,phy-type = <OMAP3ISP_PHY_TYPE_CSIPHY>;
154 #clock-cells = <1>;
155 vdd-csiphy1-supply = <&vaux2>;
156 vdd-csiphy2-supply = <&vaux2>;
157
158 ports {
159 #address-cells = <1>;
160 #size-cells = <0>;
161
162 port@0 {
163 reg = <0>;
164 parallel_ep: endpoint {
165 remote-endpoint = <&parallel>;
166 };
167 };
168
169 port@1 {
170 reg = <1>;
171 csi1_ep: endpoint {
172 remote-endpoint = <&smia_1>;
173 clock-lanes = <1>;
174 data-lanes = <2>;
175 lane-polarities = <0 0>;
176 };
177 };
178
179 port@2 {
180 reg = <2>;
181 csi2a_ep: endpoint {
182 remote-endpoint = <&smia_2>;
183 clock-lanes = <2>;
184 data-lanes = <1 3>;
185 lane-polarities = <1 1 1>;
186 };
187 };
188 };
189 };
Documentation/devicetree/bindings/media/ti,vip.yaml+152−0
@@ -0,0 +1,152 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2025 Texas Instruments Incorporated - http://www.ti.com/
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/media/ti,vip.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Texas Instruments DRA7x Video Input Port (VIP)
9
10maintainers:
11 - Yemike Abhilash Chandra <y-abhilashchandra@ti.com>
12
13description: |-
14 Video Input Port (VIP) can be found on devices such as DRA7xx and
15 provides the system interface and the processing capability to
16 connect parallel image-sensor as well as BT.656/1120 capable encoder
17 chip to DRA7x device.
18
19 Each VIP instance supports 2 independently configurable external
20 video input capture slices (Slice 0 and Slice 1) each providing
21 up to two video input ports (Port A and Port B).
22
23properties:
24 compatible:
25 enum:
26 - ti,dra7-vip
27
28 reg:
29 maxItems: 1
30
31 interrupts:
32 items:
33 - description: IRQ index 0 is used for Slice0 interrupts
34 - description: IRQ index 1 is used for Slice1 interrupts
35
36 ti,ctrl-module:
37 description:
38 Reference to the device control module that provides clock-edge
39 inversion control for VIP ports. These controls allow the
40 VIP to sample pixel data on the correct clock edge.
41 $ref: /schemas/types.yaml#/definitions/phandle-array
42 items:
43 items:
44 - description: phandle to device control module
45 - description: offset to the CTRL_CORE_SMA_SW_1 register
46 - description: Bit field to slice 0 port A
47 - description: Bit field to slice 0 port B
48 - description: Bit field to slice 1 port A
49 - description: Bit field to slice 1 port B
50 maxItems: 1
51
52 ports:
53 $ref: /schemas/graph.yaml#/properties/ports
54
55 patternProperties:
56 '^port@[0-3]$':
57 $ref: /schemas/graph.yaml#/$defs/port-base
58 unevaluatedProperties: false
59 description: |
60 Each VIP instance supports 2 independently configurable external video
61 input capture slices (Slice 0 and Slice 1) each providing up to two video
62 input ports (Port A and Port B). These ports represent the following
63 port@0 -> Slice 0 Port A
64 port@1 -> Slice 0 Port B
65 port@2 -> Slice 1 Port A
66 port@3 -> Slice 1 Port B
67
68 properties:
69 endpoint:
70 $ref: /schemas/media/video-interfaces.yaml#
71 unevaluatedProperties: false
72
73 properties:
74 bus-width:
75 enum: [8, 16, 24]
76 default: 8
77
78required:
79 - compatible
80 - reg
81 - interrupts
82 - ti,ctrl-module
83 - ports
84
85additionalProperties: false
86
87examples:
88 - |
89 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 #include <dt-bindings/interrupt-controller/irq.h>
91
92 video@48970000 {
93 compatible = "ti,dra7-vip";
94 reg = <0x48970000 0x1000>;
95 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
96 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>;
97 ti,ctrl-module = <&scm_conf 0x534 0x0 0x2 0x1 0x3>;
98
99 ports {
100 #address-cells = <1>;
101 #size-cells = <0>;
102
103 vin1a: port@0 {
104 reg = <0>;
105
106 vin1a_ep: endpoint {
107 remote-endpoint = <&camera1>;
108 hsync-active = <1>;
109 vsync-active = <1>;
110 pclk-sample = <0>;
111 bus-width = <8>;
112 };
113 };
114
115 vin1b: port@1 {
116 reg = <1>;
117
118 vin1b_ep: endpoint {
119 remote-endpoint = <&camera2>;
120 hsync-active = <1>;
121 vsync-active = <1>;
122 pclk-sample = <0>;
123 bus-width = <8>;
124 };
125 };
126
127 vin2a: port@2 {
128 reg = <2>;
129
130 vin2a_ep: endpoint {
131 remote-endpoint = <&camera3>;
132 hsync-active = <1>;
133 vsync-active = <1>;
134 pclk-sample = <0>;
135 bus-width = <16>;
136 };
137 };
138
139 vin2b: port@3 {
140 reg = <3>;
141
142 vin2b_ep: endpoint {
143 remote-endpoint = <&camera4>;
144 hsync-active = <1>;
145 vsync-active = <1>;
146 pclk-sample = <0>;
147 bus-width = <8>;
148 };
149 };
150 };
151 };
152...
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,ddr4.yaml+34−0
@@ -0,0 +1,34 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,ddr4.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: DDR4 SDRAM compliant to JEDEC JESD79-4D
8
9maintainers:
10 - Krzysztof Kozlowski <krzk@kernel.org>
11
12allOf:
13 - $ref: jedec,sdram-props.yaml#
14
15properties:
16 compatible:
17 items:
18 - pattern: "^ddr4-[0-9a-f]{4},[a-z]{1,20}-[0-9a-f]{2}$"
19 - const: jedec,ddr4
20
21required:
22 - compatible
23 - density
24 - io-width
25
26unevaluatedProperties: false
27
28examples:
29 - |
30 ddr {
31 compatible = "ddr4-00ff,azaz-ff", "jedec,ddr4";
32 density = <8192>;
33 io-width = <8>;
34 };
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-props.yaml+0−74
@@ -1,74 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-props.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Common properties for LPDDR types
8
9description:
10 Different LPDDR types generally use the same properties and only differ in the
11 range of legal values for each. This file defines the common parts that can be
12 reused for each type. Nodes using this schema should generally be nested under
13 an LPDDR channel node.
14
15maintainers:
16 - Krzysztof Kozlowski <krzk@kernel.org>
17
18properties:
19 compatible:
20 description:
21 Compatible strings can be either explicit vendor names and part numbers
22 (e.g. elpida,ECB240ABACN), or generated strings of the form
23 lpddrX-YY,ZZZZ where X is the LPDDR version, YY is the manufacturer ID
24 (from MR5) and ZZZZ is the revision ID (from MR6 and MR7). Both IDs are
25 formatted in lower case hexadecimal representation with leading zeroes.
26 The latter form can be useful when LPDDR nodes are created at runtime by
27 boot firmware that doesn't have access to static part number information.
28
29 reg:
30 description:
31 The rank number of this LPDDR rank when used as a subnode to an LPDDR
32 channel.
33 minimum: 0
34 maximum: 3
35
36 revision-id:
37 $ref: /schemas/types.yaml#/definitions/uint32-array
38 description:
39 Revision IDs read from Mode Register 6 and 7. One byte per uint32 cell (i.e. <MR6 MR7>).
40 maxItems: 2
41 items:
42 minimum: 0
43 maximum: 255
44
45 density:
46 $ref: /schemas/types.yaml#/definitions/uint32
47 description:
48 Density in megabits of SDRAM chip. Decoded from Mode Register 8.
49 enum:
50 - 64
51 - 128
52 - 256
53 - 512
54 - 1024
55 - 2048
56 - 3072
57 - 4096
58 - 6144
59 - 8192
60 - 12288
61 - 16384
62 - 24576
63 - 32768
64
65 io-width:
66 $ref: /schemas/types.yaml#/definitions/uint32
67 description:
68 IO bus width in bits of SDRAM chip. Decoded from Mode Register 8.
69 enum:
70 - 8
71 - 16
72 - 32
73
74additionalProperties: true
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr2.yaml+1−1
@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
10 - Krzysztof Kozlowski <krzk@kernel.org>10 - Krzysztof Kozlowski <krzk@kernel.org>
11 11
12allOf:12allOf:
13 - $ref: jedec,lpddr-props.yaml#13 - $ref: jedec,sdram-props.yaml#
14 14
15properties:15properties:
16 compatible:16 compatible:
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr3.yaml+1−1
@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
10 - Krzysztof Kozlowski <krzk@kernel.org>10 - Krzysztof Kozlowski <krzk@kernel.org>
11 11
12allOf:12allOf:
13 - $ref: jedec,lpddr-props.yaml#13 - $ref: jedec,sdram-props.yaml#
14 14
15properties:15properties:
16 compatible:16 compatible:
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr4.yaml+1−1
@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
10 - Krzysztof Kozlowski <krzk@kernel.org>10 - Krzysztof Kozlowski <krzk@kernel.org>
11 11
12allOf:12allOf:
13 - $ref: jedec,lpddr-props.yaml#13 - $ref: jedec,sdram-props.yaml#
14 14
15properties:15properties:
16 compatible:16 compatible:
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr5.yaml+1−1
@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
10 - Krzysztof Kozlowski <krzk@kernel.org>10 - Krzysztof Kozlowski <krzk@kernel.org>
11 11
12allOf:12allOf:
13 - $ref: jedec,lpddr-props.yaml#13 - $ref: jedec,sdram-props.yaml#
14 14
15properties:15properties:
16 compatible:16 compatible:
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-channel.yamlrenamed from Documentation/devicetree/bindings/memory-controllers/ddr/jedec,lpddr-channel.yaml+27−13
@@ -1,23 +1,28 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.22%YAML 1.2
3---3---
4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,sdram-channel.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#5$schema: http://devicetree.org/meta-schemas/core.yaml#
6 6
7title: LPDDR channel with chip/rank topology description7title: SDRAM channel with chip/rank topology description
8 8
9description:9description:
10 An LPDDR channel is a completely independent set of LPDDR pins (DQ, CA, CS,10 A memory channel of SDRAM memory like DDR SDRAM or LPDDR SDRAM is a completely
11 CK, etc.) that connect one or more LPDDR chips to a host system. The main11 independent set of pins (DQ, CA, CS, CK, etc.) that connect one or more memory
12 purpose of this node is to overall LPDDR topology of the system, including the12 chips to a host system. The main purpose of this node is to overall memory
13 amount of individual LPDDR chips and the ranks per chip.13 topology of the system, including the amount of individual memory chips and
14 the ranks per chip.
14 15
15maintainers:16maintainers:
16 - Julius Werner <jwerner@chromium.org>17 - Julius Werner <jwerner@chromium.org>
17 18
18properties:19properties:
20 $nodename:
21 pattern: "sdram-channel-[0-9]+$"
22
19 compatible:23 compatible:
20 enum:24 enum:
25 - jedec,ddr4-channel
21 - jedec,lpddr2-channel26 - jedec,lpddr2-channel
22 - jedec,lpddr3-channel27 - jedec,lpddr3-channel
23 - jedec,lpddr4-channel28 - jedec,lpddr4-channel
@@ -26,14 +31,14 @@ properties: · 2 unmodified lines
26 io-width:31 io-width:
27 description:32 description:
28 The number of DQ pins in the channel. If this number is different33 The number of DQ pins in the channel. If this number is different
29 from (a multiple of) the io-width of the LPDDR chip, that means that34 from (a multiple of) the io-width of the SDRAM chip, that means that
30 multiple instances of that type of chip are wired in parallel on this35 multiple instances of that type of chip are wired in parallel on this
31 channel (with the channel's DQ pins split up between the different36 channel (with the channel's DQ pins split up between the different
32 chips, and the CA, CS, etc. pins of the different chips all shorted37 chips, and the CA, CS, etc. pins of the different chips all shorted
33 together). This means that the total physical memory controlled by a38 together). This means that the total physical memory controlled by a
34 channel is equal to the sum of the densities of each rank on the39 channel is equal to the sum of the densities of each rank on the
35 connected LPDDR chip, times the io-width of the channel divided by40 connected SDRAM chip, times the io-width of the channel divided by
36 the io-width of the LPDDR chip.41 the io-width of the SDRAM chip.
37 enum:42 enum:
38 - 843 - 8
39 - 1644 - 16
@@ -51,8 +56,8 @@ patternProperties: · 11 unmodified lines
51 "^rank@[0-9]+$":56 "^rank@[0-9]+$":
52 type: object57 type: object
53 description:58 description:
54 Each physical LPDDR chip may have one or more ranks. Ranks are59 Each physical SDRAM chip may have one or more ranks. Ranks are
55 internal but fully independent sub-units of the chip. Each LPDDR bus60 internal but fully independent sub-units of the chip. Each SDRAM bus
56 transaction on the channel targets exactly one rank, based on the61 transaction on the channel targets exactly one rank, based on the
57 state of the CS pins. Different ranks may have different densities and62 state of the CS pins. Different ranks may have different densities and
58 timing requirements.63 timing requirements.
@@ -60,6 +65,15 @@ patternProperties: · 1 unmodified line
60 - reg65 - reg
61 66
62allOf:67allOf:
68 - if:
69 properties:
70 compatible:
71 contains:
72 const: jedec,ddr4-channel
73 then:
74 patternProperties:
75 "^rank@[0-9]+$":
76 $ref: /schemas/memory-controllers/ddr/jedec,ddr4.yaml#
63 - if:77 - if:
64 properties:78 properties:
65 compatible:79 compatible:
@@ -107,7 +121,7 @@ additionalProperties: false · 41 unmodified lines
107 121
108examples:122examples:
109 - |123 - |
110 lpddr-channel0 {124 sdram-channel-0 {
111 #address-cells = <1>;125 #address-cells = <1>;
112 #size-cells = <0>;126 #size-cells = <0>;
113 compatible = "jedec,lpddr3-channel";127 compatible = "jedec,lpddr3-channel";
@@ -122,7 +136,7 @@ examples: · 8 unmodified lines
122 };136 };
123 };137 };
124 138
125 lpddr-channel1 {139 sdram-channel-1 {
126 #address-cells = <1>;140 #address-cells = <1>;
127 #size-cells = <0>;141 #size-cells = <0>;
128 compatible = "jedec,lpddr4-channel";142 compatible = "jedec,lpddr4-channel";
Documentation/devicetree/bindings/memory-controllers/ddr/jedec,sdram-props.yaml+94−0
@@ -0,0 +1,94 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,sdram-props.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Common properties for SDRAM types
8
9description:
10 Different SDRAM types generally use the same properties and only differ in the
11 range of legal values for each. This file defines the common parts that can be
12 reused for each type. Nodes using this schema should generally be nested under
13 a SDRAM channel node.
14
15maintainers:
16 - Krzysztof Kozlowski <krzk@kernel.org>
17
18properties:
19 compatible:
20 description: |
21 Compatible strings can be either explicit vendor names and part numbers
22 (e.g. elpida,ECB240ABACN), or generated strings of the form
23 lpddrX-YY,ZZZZ or ddrX-YYYY,AAAA...-ZZ where X, Y, and Z are lowercase
24 hexadecimal with leading zeroes, and A is lowercase ASCII.
25 For LPDDR and DDR SDRAM, X is the SDRAM version (2, 3, 4, etc.).
26 For LPDDR SDRAM:
27 - YY is the manufacturer ID (from MR5), 1 byte
28 - ZZZZ is the revision ID (from MR6 and MR7), 2 bytes
29 For DDR4 SDRAM with SPD, according to JEDEC SPD4.1.2.L-6:
30 - YYYY is the manufacturer ID, 2 bytes, from bytes 320 and 321
31 - AAAA... is the part number, 20 bytes (20 chars) from bytes 329 to 348
32 without trailing spaces
33 - ZZ is the revision ID, 1 byte, from byte 349
34 The former form is useful when the SDRAM vendor and part number are
35 known, for example, when memory is soldered on the board. The latter
36 form is useful when SDRAM nodes are created at runtime by boot firmware
37 that doesn't have access to static part number information.
38
39 reg:
40 description:
41 The rank number of this memory rank when used as a subnode to an memory
42 channel.
43 minimum: 0
44 maximum: 3
45
46 revision-id:
47 $ref: /schemas/types.yaml#/definitions/uint32-array
48 description: |
49 SDRAM revision ID:
50 - LPDDR SDRAM, decoded from Mode Registers 6 and 7, always 2 bytes.
51 - DDR4 SDRAM, decoded from the SPD from byte 349 according to
52 JEDEC SPD4.1.2.L-6, always 1 byte.
53 One byte per uint32 cell (e.g., <MR6 MR7>).
54 maxItems: 2
55 items:
56 minimum: 0
57 maximum: 255
58
59 density:
60 $ref: /schemas/types.yaml#/definitions/uint32
61 description: |
62 Density of the SDRAM chip in megabits:
63 - LPDDR SDRAM, decoded from Mode Register 8.
64 - DDR4 SDRAM, decoded from the SPD from bits 3-0 of byte 4 according to
65 JEDEC SPD4.1.2.L-6.
66 enum:
67 - 64
68 - 128
69 - 256
70 - 512
71 - 1024
72 - 2048
73 - 3072
74 - 4096
75 - 6144
76 - 8192
77 - 12288
78 - 16384
79 - 24576
80 - 32768
81
82 io-width:
83 $ref: /schemas/types.yaml#/definitions/uint32
84 description: |
85 I/O bus width in bits of the SDRAM chip:
86 - LPDDR SDRAM, decoded from Mode Register 8.
87 - DDR4 SDRAM, decoded from the SPD from bits 2-0 of byte 12 according to
88 JEDEC SPD4.1.2.L-6.
89 enum:
90 - 8
91 - 16
92 - 32
93
94additionalProperties: true
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra186-mc.yaml+13−0
@@ -92,10 +92,14 @@ patternProperties: · 91 unmodified lines
92 clocks:92 clocks:
93 items:93 items:
94 - description: external memory clock94 - description: external memory clock
95 - description: data backbone clock
96 minItems: 1
95 97
96 clock-names:98 clock-names:
97 items:99 items:
98 - const: emc100 - const: emc
101 - const: dbb
102 minItems: 1
99 103
100 "#interconnect-cells":104 "#interconnect-cells":
101 const: 0105 const: 0
@@ -115,6 +119,9 @@ patternProperties: · 13 unmodified lines
115 reg:119 reg:
116 maxItems: 1120 maxItems: 1
117 121
122 clocks:
123 maxItems: 1
124
118 - if:125 - if:
119 properties:126 properties:
120 compatible:127 compatible:
@@ -124,6 +131,9 @@ patternProperties: · 3 unmodified lines
124 reg:131 reg:
125 minItems: 2132 minItems: 2
126 133
134 clocks:
135 maxItems: 1
136
127 - if:137 - if:
128 properties:138 properties:
129 compatible:139 compatible:
@@ -133,6 +143,9 @@ patternProperties: · 3 unmodified lines
133 reg:143 reg:
134 minItems: 2144 minItems: 2
135 145
146 clocks:
147 maxItems: 1
148
136 - if:149 - if:
137 properties:150 properties:
138 compatible:151 compatible:
Documentation/devicetree/bindings/mfd/aspeed,ast2x00-scu.yaml+17−0
@@ -130,6 +130,23 @@ patternProperties: · 129 unmodified lines
130 - description: silicon id information registers130 - description: silicon id information registers
131 - description: unique chip id registers131 - description: unique chip id registers
132 132
133 '^smp-memram@[0-9a-f]+$':
134 description: Memory region used for the AST2600's custom SMP bringup protocol
135 type: object
136 additionalProperties: false
137
138 properties:
139 compatible:
140 const: aspeed,ast2600-smpmem
141
142 reg:
143 description: The SMP memory region
144 maxItems: 1
145
146 required:
147 - compatible
148 - reg
149
133required:150required:
134 - compatible151 - compatible
135 - reg152 - reg
Documentation/devicetree/bindings/mfd/atmel,hlcdc.yaml+1−0
@@ -25,6 +25,7 @@ properties: · 24 unmodified lines
25 - atmel,sama5d4-hlcdc25 - atmel,sama5d4-hlcdc
26 - microchip,sam9x60-hlcdc26 - microchip,sam9x60-hlcdc
27 - microchip,sam9x75-xlcdc27 - microchip,sam9x75-xlcdc
28 - microchip,sama7d65-xlcdc
28 29
29 reg:30 reg:
30 maxItems: 131 maxItems: 1
Documentation/devicetree/bindings/mfd/atmel,sama5d2-flexcom.yaml+1−0
@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20 - const: atmel,sama5d2-flexcom20 - const: atmel,sama5d2-flexcom
21 - items:21 - items:
22 - enum:22 - enum:
23 - microchip,lan9691-flexcom
23 - microchip,sam9x7-flexcom24 - microchip,sam9x7-flexcom
24 - microchip,sama7d65-flexcom25 - microchip,sama7d65-flexcom
25 - microchip,sama7g5-flexcom26 - microchip,sama7g5-flexcom
Documentation/devicetree/bindings/mfd/bitmain,bm1880-sctrl.yaml+66−0
@@ -0,0 +1,66 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/bitmain,bm1880-sctrl.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Bitmain BM1880 System Controller
8
9maintainers:
10 - Manivannan Sadhasivam <mani@kernel.org>
11
12properties:
13 compatible:
14 items:
15 - const: bitmain,bm1880-sctrl
16 - const: syscon
17 - const: simple-mfd
18
19 reg:
20 maxItems: 1
21
22 ranges: true
23
24 '#address-cells':
25 const: 1
26
27 '#size-cells':
28 const: 1
29
30patternProperties:
31 '^pinctrl@[0-9a-f]+$':
32 type: object
33 additionalProperties: true
34
35 properties:
36 compatible:
37 contains:
38 const: bitmain,bm1880-pinctrl
39
40 '^clock-controller@[0-9a-f]+$':
41 type: object
42 additionalProperties: true
43
44 properties:
45 compatible:
46 contains:
47 const: bitmain,bm1880-clk
48
49 '^reset-controller@[0-9a-f]+$':
50 type: object
51 additionalProperties: true
52
53 properties:
54 compatible:
55 contains:
56 const: bitmain,bm1880-reset
57
58required:
59 - compatible
60 - reg
61 - ranges
62 - '#address-cells'
63 - '#size-cells'
64
65additionalProperties: false
66...
Documentation/devicetree/bindings/mfd/da9055.txt+1−1
@@ -15,7 +15,7 @@ The CODEC device in DA9055 has a separate, configurable I2C address and so · 14 unmodified lines
15is instantiated separately from the PMIC.15is instantiated separately from the PMIC.
16 16
17For details on accompanying CODEC I2C device, see the following:17For details on accompanying CODEC I2C device, see the following:
18Documentation/devicetree/bindings/sound/da9055.txt18Documentation/devicetree/bindings/sound/trivial-codec.yaml
19 19
20======20======
21 21
Documentation/devicetree/bindings/mfd/iei,wt61p803-puzzle.yaml+80−0
@@ -0,0 +1,80 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/iei,wt61p803-puzzle.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: IEI WT61P803 PUZZLE MCU from IEI Integration Corp.
8
9maintainers:
10 - Luka Kovacic <luka.kovacic@sartura.hr>
11
12description: |
13 IEI WT61P803 PUZZLE MCU is embedded in some IEI Puzzle series boards.
14 It's used for controlling system power states, fans, LEDs and temperature
15 sensors.
16
17 For Device Tree bindings of other sub-modules (HWMON, LEDs) refer to the
18 binding documents under the respective subsystem directories.
19
20properties:
21 compatible:
22 const: iei,wt61p803-puzzle
23
24 current-speed: true
25
26 enable-beep:
27 type: boolean
28
29 hwmon:
30 $ref: /schemas/hwmon/iei,wt61p803-puzzle-hwmon.yaml
31
32 leds:
33 $ref: /schemas/leds/iei,wt61p803-puzzle-leds.yaml
34
35required:
36 - compatible
37 - current-speed
38
39additionalProperties: false
40
41examples:
42 - |
43 #include <dt-bindings/leds/common.h>
44 serial {
45 mcu {
46 compatible = "iei,wt61p803-puzzle";
47 current-speed = <115200>;
48 enable-beep;
49
50 leds {
51 compatible = "iei,wt61p803-puzzle-leds";
52 #address-cells = <1>;
53 #size-cells = <0>;
54
55 led@0 {
56 reg = <0>;
57 function = LED_FUNCTION_POWER;
58 color = <LED_COLOR_ID_BLUE>;
59 };
60 };
61
62 hwmon {
63 compatible = "iei,wt61p803-puzzle-hwmon";
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 fan-group@0 {
68 #cooling-cells = <2>;
69 reg = <0x00>;
70 cooling-levels = <64 102 170 230 250>;
71 };
72
73 fan-group@1 {
74 #cooling-cells = <2>;
75 reg = <0x01>;
76 cooling-levels = <64 102 170 230 250>;
77 };
78 };
79 };
80 };
Documentation/devicetree/bindings/mfd/mediatek,mt6397.yaml+1−0
@@ -90,6 +90,7 @@ properties: · 89 unmodified lines
90 - enum:90 - enum:
91 - mediatek,mt6323-regulator91 - mediatek,mt6323-regulator
92 - mediatek,mt6328-regulator92 - mediatek,mt6328-regulator
93 - mediatek,mt6331-regulator
93 - mediatek,mt6358-regulator94 - mediatek,mt6358-regulator
94 - mediatek,mt6359-regulator95 - mediatek,mt6359-regulator
95 - mediatek,mt6397-regulator96 - mediatek,mt6397-regulator
Documentation/devicetree/bindings/mfd/mediatek,mt8195-scpsys.yaml+3−1
@@ -7,7 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7title: MediaTek System Control Processor System7title: MediaTek System Control Processor System
8 8
9maintainers:9maintainers:
10 - MandyJH Liu <mandyjh.liu@mediatek.com>10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
11 12
12description:13description:
13 MediaTek System Control Processor System (SCPSYS) has several14 MediaTek System Control Processor System (SCPSYS) has several
@@ -18,6 +19,7 @@ properties: · 4 unmodified lines
18 compatible:19 compatible:
19 items:20 items:
20 - enum:21 - enum:
22 - mediatek,mt6795-scpsys
21 - mediatek,mt6893-scpsys23 - mediatek,mt6893-scpsys
22 - mediatek,mt8167-scpsys24 - mediatek,mt8167-scpsys
23 - mediatek,mt8173-scpsys25 - mediatek,mt8173-scpsys
Documentation/devicetree/bindings/mfd/nxp,lpc3220-scb.yaml+74−0
@@ -0,0 +1,74 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/nxp,lpc3220-scb.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP LPC32xx System Control Block
8
9maintainers:
10 - Vladimir Zapolskiy <vz@mleia.com>
11
12description:
13 NXP LPC32xx SoC series have a System Control Block, which serves for
14 a multitude of purposes including clock management, DMA muxes, storing
15 SoC unique ID etc.
16
17properties:
18 compatible:
19 items:
20 - enum:
21 - nxp,lpc3220-scb
22 - const: syscon
23 - const: simple-mfd
24
25 reg:
26 maxItems: 1
27
28 ranges: true
29
30 "#address-cells":
31 const: 1
32
33 "#size-cells":
34 const: 1
35
36patternProperties:
37 "^clock-controller@[0-9a-f]+$":
38 $ref: /schemas/clock/nxp,lpc3220-clk.yaml#
39
40 "^dma-router@[0-9a-f]+$":
41 $ref: /schemas/dma/nxp,lpc3220-dmamux.yaml#
42
43required:
44 - compatible
45 - reg
46 - "#address-cells"
47 - "#size-cells"
48
49additionalProperties: false
50
51examples:
52 - |
53 syscon@400040000 {
54 compatible = "nxp,lpc3220-scb", "syscon", "simple-mfd";
55 reg = <0x40004000 0x1000>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 ranges = <0 0x40004000 0x1000>;
59
60 clock-controller@0 {
61 compatible = "nxp,lpc3220-clk";
62 reg = <0x0 0x114>;
63 clocks = <&xtal_32k>, <&xtal>;
64 clock-names = "xtal_32k", "xtal";
65 #clock-cells = <1>;
66 };
67
68 dma-router@78 {
69 compatible = "nxp,lpc3220-dmamux";
70 reg = <0x78 0x8>;
71 dma-masters = <&dma>;
72 #dma-cells = <3>;
73 };
74 };
Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml+6−0
@@ -77,8 +77,12 @@ properties: · 76 unmodified lines
77 - qcom,pmc818077 - qcom,pmc8180
78 - qcom,pmc8180c78 - qcom,pmc8180c
79 - qcom,pmc838079 - qcom,pmc8380
80 - qcom,pmcx0102
80 - qcom,pmd802881 - qcom,pmd8028
81 - qcom,pmd963582 - qcom,pmd9635
83 - qcom,pmh0101
84 - qcom,pmh0104
85 - qcom,pmh0110
82 - qcom,pmi63286 - qcom,pmi632
83 - qcom,pmi895087 - qcom,pmi8950
84 - qcom,pmi896288 - qcom,pmi8962
@@ -89,6 +93,7 @@ properties: · 4 unmodified lines
89 - qcom,pmk800293 - qcom,pmk8002
90 - qcom,pmk835094 - qcom,pmk8350
91 - qcom,pmk855095 - qcom,pmk8550
96 - qcom,pmk8850
92 - qcom,pmm8155au97 - qcom,pmm8155au
93 - qcom,pmm8654au98 - qcom,pmm8654au
94 - qcom,pmp807499 - qcom,pmp8074
@@ -101,6 +106,7 @@ properties: · 6 unmodified lines
101 - qcom,pmx75106 - qcom,pmx75
102 - qcom,smb2351107 - qcom,smb2351
103 - qcom,smb2360108 - qcom,smb2360
109 - qcom,smb2370
104 - const: qcom,spmi-pmic110 - const: qcom,spmi-pmic
105 111
106 reg:112 reg:
Documentation/devicetree/bindings/mfd/qnap,ts433-mcu.yaml+1−0
@@ -16,6 +16,7 @@ description: · 15 unmodified lines
16properties:16properties:
17 compatible:17 compatible:
18 enum:18 enum:
19 - qnap,ts133-mcu
19 - qnap,ts233-mcu20 - qnap,ts233-mcu
20 - qnap,ts433-mcu21 - qnap,ts433-mcu
21 22
Documentation/devicetree/bindings/mfd/realtek,rtd1xxx.yaml+69−0
@@ -0,0 +1,69 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/realtek,rtd1xxx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Realtek RTD1xxx system controllers
8
9maintainers:
10 - Andreas Färber <afaerber@suse.de>
11
12properties:
13 compatible:
14 items:
15 - enum:
16 - realtek,rtd1293-crt
17 - realtek,rtd1293-iso
18 - realtek,rtd1293-misc
19 - realtek,rtd1293-sb2
20 - realtek,rtd1293-scpu-wrapper
21 - realtek,rtd1295-crt
22 - realtek,rtd1295-iso
23 - realtek,rtd1295-misc
24 - realtek,rtd1295-sb2
25 - realtek,rtd1295-scpu-wrapper
26 - realtek,rtd1296-crt
27 - realtek,rtd1296-iso
28 - realtek,rtd1296-misc
29 - realtek,rtd1296-sb2
30 - realtek,rtd1296-scpu-wrapper
31 - realtek,rtd1395-crt
32 - realtek,rtd1395-iso
33 - realtek,rtd1395-misc
34 - realtek,rtd1395-sb2
35 - realtek,rtd1395-scpu-wrapper
36 - realtek,rtd1619-crt
37 - realtek,rtd1619-iso
38 - realtek,rtd1619-misc
39 - realtek,rtd1619-sb2
40 - realtek,rtd1619-scpu-wrapper
41 - const: syscon
42 - const: simple-mfd
43
44 reg:
45 maxItems: 1
46
47 reg-io-width:
48 const: 4
49
50 ranges: true
51
52 '#address-cells':
53 const: 1
54
55 '#size-cells':
56 const: 1
57
58patternProperties:
59 '@[0-9a-f]+$':
60 type: object
61
62 required:
63 - compatible
64
65required:
66 - compatible
67 - reg
68
69additionalProperties: false
Documentation/devicetree/bindings/mfd/rockchip,rk801.yaml+197−0
@@ -0,0 +1,197 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/rockchip,rk801.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: RK801 Power Management Integrated Circuit
8
9maintainers:
10 - Joseph Chen <chenjh@rock-chips.com>
11
12description: |
13 Rockchip RK801 series PMIC. This device consists of an i2c controlled MFD
14 that includes multiple switchable regulators.
15
16properties:
17 compatible:
18 enum:
19 - rockchip,rk801
20
21 reg:
22 maxItems: 1
23
24 interrupts:
25 maxItems: 1
26
27 system-power-controller:
28 type: boolean
29 description:
30 Telling whether or not this PMIC is controlling the system power.
31
32 wakeup-source:
33 type: boolean
34 description:
35 Device can be used as a wakeup source.
36
37 vcc1-supply:
38 description:
39 The input supply for dcdc1.
40
41 vcc2-supply:
42 description:
43 The input supply for dcdc2.
44
45 vcc3-supply:
46 description:
47 The input supply for dcdc3.
48
49 vcc4-supply:
50 description:
51 The input supply for dcdc4.
52
53 vcc5-supply:
54 description:
55 The input supply for ldo1.
56
57 vcc6-supply:
58 description:
59 The input supply for ldo2.
60
61 vcc7-supply:
62 description:
63 The input supply for switch.
64
65 regulators:
66 type: object
67 patternProperties:
68 "^(dcdc[1-4]|ldo[1-2]|switch)$":
69 type: object
70 $ref: /schemas/regulator/regulator.yaml#
71 unevaluatedProperties: false
72 additionalProperties: false
73
74required:
75 - compatible
76 - reg
77 - interrupts
78
79additionalProperties: false
80
81examples:
82 - |
83 #include <dt-bindings/pinctrl/rockchip.h>
84 #include <dt-bindings/interrupt-controller/irq.h>
85 #include <dt-bindings/gpio/gpio.h>
86
87 i2c {
88 #address-cells = <1>;
89 #size-cells = <0>;
90
91 rk801: pmic@27 {
92 compatible = "rockchip,rk801";
93 reg = <0x27>;
94 interrupt-parent = <&gpio0>;
95 interrupts = <RK_PC0 IRQ_TYPE_LEVEL_LOW>;
96 pinctrl-names = "default";
97 pinctrl-0 = <&pmic_int_l>;
98 system-power-controller;
99 wakeup-source;
100
101 vcc1-supply = <&vcc_sys>;
102 vcc2-supply = <&vcc_sys>;
103 vcc3-supply = <&vcc_sys>;
104 vcc4-supply = <&vcc_sys>;
105 vcc5-supply = <&vcc3v3_sys>;
106 vcc6-supply = <&vcc3v3_sys>;
107 vcc7-supply = <&vcc3v3_sys>;
108
109 regulators {
110 vdd_cpu: dcdc1 {
111 regulator-name = "vdd_cpu";
112 regulator-min-microvolt = <500000>;
113 regulator-max-microvolt = <1500000>;
114 regulator-initial-mode = <0x1>;
115 regulator-boot-on;
116 regulator-always-on;
117 regulator-state-mem {
118 regulator-mode = <0x2>;
119 regulator-off-in-suspend;
120 regulator-suspend-microvolt = <950000>;
121 };
122 };
123
124 vcc3v3_sys: dcdc2 {
125 regulator-name = "vcc3v3_sys";
126 regulator-min-microvolt = <3300000>;
127 regulator-max-microvolt = <3300000>;
128 regulator-initial-mode = <0x1>;
129 regulator-boot-on;
130 regulator-always-on;
131 regulator-state-mem {
132 regulator-mode = <0x2>;
133 regulator-on-in-suspend;
134 regulator-suspend-microvolt = <3300000>;
135 };
136 };
137
138 vcc_ddr: dcdc3 {
139 regulator-name = "vcc_ddr";
140 regulator-boot-on;
141 regulator-always-on;
142 regulator-state-mem {
143 regulator-mode = <0x2>;
144 regulator-on-in-suspend;
145 };
146 };
147
148 vdd_logic: dcdc4 {
149 regulator-name = "vdd_logic";
150 regulator-min-microvolt = <500000>;
151 regulator-max-microvolt = <1500000>;
152 regulator-initial-mode = <0x1>;
153 regulator-boot-on;
154 regulator-always-on;
155 regulator-state-mem {
156 regulator-mode = <0x2>;
157 regulator-off-in-suspend;
158 regulator-suspend-microvolt = <900000>;
159 };
160 };
161
162 vdd0v9_sys: ldo1 {
163 regulator-name = "vdd0v9_sys";
164 regulator-min-microvolt = <900000>;
165 regulator-max-microvolt = <900000>;
166 regulator-boot-on;
167 regulator-always-on;
168 regulator-state-mem {
169 regulator-off-in-suspend;
170 regulator-suspend-microvolt = <900000>;
171 };
172 };
173
174 vcc_1v8: ldo2 {
175 regulator-name = "vcc_1v8";
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <1800000>;
178 regulator-boot-on;
179 regulator-always-on;
180 regulator-state-mem {
181 regulator-off-in-suspend;
182 regulator-suspend-microvolt = <1800000>;
183 };
184 };
185
186 vcc_3v3: switch {
187 regulator-name = "vcc_3v3";
188 regulator-boot-on;
189 regulator-always-on;
190 regulator-state-mem {
191 regulator-off-in-suspend;
192 regulator-suspend-microvolt = <3300000>;
193 };
194 };
195 };
196 };
197 };
Documentation/devicetree/bindings/mfd/rohm,bd72720-pmic.yaml+339−0
@@ -0,0 +1,339 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/rohm,bd72720-pmic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: ROHM BD72720 Power Management Integrated Circuit
8
9maintainers:
10 - Matti Vaittinen <mazziesaccount@gmail.com>
11
12description:
13 BD72720 is a single-chip power management IC for battery-powered portable
14 devices. The BD72720 integrates 10 bucks and 11 LDOs, and a 3000 mA
15 switching charger. The IC also includes a Coulomb counter, a real-time
16 clock (RTC), GPIOs and a 32.768 kHz clock gate.
17
18# In addition to the properties found from the charger node, the ROHM BD72720
19# uses properties from a static battery node. Please see the:
20# Documentation/devicetree/bindings/power/supply/battery.yaml
21#
22# Following properties are used
23# when present:
24#
25# charge-full-design-microamp-hours: Battry capacity in mAh
26# voltage-max-design-microvolt: Maximum voltage
27# voltage-min-design-microvolt: Minimum voltage system is still operating.
28# degrade-cycle-microamp-hours: Capacity lost due to aging at each full
29# charge cycle.
30# ocv-capacity-celsius: Array of OCV table temperatures. 1/table.
31# ocv-capacity-table-<N>: Table of OCV voltage/SOC pairs. Corresponds
32# N.th temperature in ocv-capacity-celsius
33#
34# volt-drop-thresh-microvolt: Threshold for starting the VDR correction
35# volt-drop-soc: Table of capacity values matching the
36# values in VDR tables.
37#
38# volt-drop-temperatures-millicelsius: Temperatures corresponding to the volage
39# drop values given in volt-drop-[0-9]-microvolt
40#
41# volt-drop-[0-9]-microvolt: VDR table for a temperature specified in
42# volt-drop-temperatures-millicelsius
43#
44# VDR tables are (usually) determined for a specific battery by ROHM.
45# The battery node would then be referred from the charger node:
46#
47# monitored-battery = <&battery>;
48
49properties:
50 compatible:
51 const: rohm,bd72720
52
53 reg:
54 description:
55 I2C slave address.
56 maxItems: 1
57
58 interrupts:
59 maxItems: 1
60
61 gpio-controller: true
62
63 "#gpio-cells":
64 const: 2
65 description:
66 The first cell is the pin number and the second cell is used to specify
67 flags. See the gpio binding document for more information.
68
69 clocks:
70 maxItems: 1
71
72 "#clock-cells":
73 const: 0
74
75 clock-output-names:
76 const: bd71828-32k-out
77
78 rohm,clkout-open-drain:
79 description: clk32kout mode. Set to 1 for "open-drain" or 0 for "cmos".
80 $ref: /schemas/types.yaml#/definitions/uint32
81 maximum: 1
82
83 rohm,charger-sense-resistor-micro-ohms:
84 minimum: 10000
85 maximum: 50000
86 description:
87 BD72720 has a SAR ADC for measuring charging currents. External sense
88 resistor (RSENSE in data sheet) should be used. If some other but
89 30 mOhm resistor is used the resistance value should be given here in
90 micro Ohms.
91
92 regulators:
93 $ref: /schemas/regulator/rohm,bd72720-regulator.yaml
94 description:
95 List of child nodes that specify the regulators.
96
97 leds:
98 $ref: /schemas/leds/rohm,bd71828-leds.yaml
99
100 rohm,pin-fault_b:
101 $ref: /schemas/types.yaml#/definitions/string
102 description:
103 BD72720 has an OTP option to use fault_b-pin for different
104 purposes. Set this property accordingly. OTP options are
105 OTP0 - bi-directional FAULT_B or READY indicator depending on a
106 'sub option'
107 OTP1 - GPO
108 OTP2 - Power sequencer output.
109 enum:
110 - faultb
111 - readyind
112 - gpo
113 - pwrseq
114
115patternProperties:
116 "^rohm,pin-dvs[0-1]$":
117 $ref: /schemas/types.yaml#/definitions/string
118 description:
119 BD72720 has 4 different OTP options to determine the use of dvs<X>-pins.
120 OTP0 - regulator RUN state control.
121 OTP1 - GPI.
122 OTP2 - GPO.
123 OTP3 - Power sequencer output.
124 This property specifies the use of the pin.
125 enum:
126 - dvs-input
127 - gpi
128 - gpo
129 - pwrseq
130
131 "^rohm,pin-exten[0-1]$":
132 $ref: /schemas/types.yaml#/definitions/string
133 description: BD72720 has an OTP option to use exten0-pin for different
134 purposes. Set this property accordingly.
135 OTP0 - GPO
136 OTP1 - Power sequencer output.
137 enum:
138 - gpo
139 - pwrseq
140
141required:
142 - compatible
143 - reg
144 - interrupts
145 - clocks
146 - "#clock-cells"
147 - regulators
148 - gpio-controller
149 - "#gpio-cells"
150
151additionalProperties: false
152
153examples:
154 - |
155 #include <dt-bindings/interrupt-controller/irq.h>
156 #include <dt-bindings/leds/common.h>
157 i2c {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 pmic: pmic@4b {
161 compatible = "rohm,bd72720";
162 reg = <0x4b>;
163
164 interrupt-parent = <&gpio1>;
165 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
166
167 clocks = <&osc 0>;
168 #clock-cells = <0>;
169 clock-output-names = "bd71828-32k-out";
170
171 gpio-controller;
172 #gpio-cells = <2>;
173
174 rohm,pin-dvs0 = "gpi";
175 rohm,pin-dvs1 = "gpi";
176 rohm,pin-exten0 = "gpo";
177 rohm,pin-exten1 = "gpo";
178 rohm,pin-fault_b = "faultb";
179
180 rohm,charger-sense-resistor-micro-ohms = <10000>;
181
182 regulators {
183 buck1 {
184 regulator-name = "buck1";
185 regulator-min-microvolt = <500000>;
186 regulator-max-microvolt = <2000000>;
187 regulator-ramp-delay = <2500>;
188 };
189 buck2 {
190 regulator-name = "buck2";
191 regulator-min-microvolt = <500000>;
192 regulator-max-microvolt = <2000000>;
193 regulator-ramp-delay = <2500>;
194 };
195 buck3 {
196 regulator-name = "buck3";
197 regulator-min-microvolt = <1200000>;
198 regulator-max-microvolt = <2000000>;
199 };
200 buck4 {
201 regulator-name = "buck4";
202 regulator-min-microvolt = <1000000>;
203 regulator-max-microvolt = <1800000>;
204 };
205 buck5 {
206 regulator-name = "buck5";
207 regulator-min-microvolt = <2500000>;
208 regulator-max-microvolt = <3300000>;
209 };
210 buck6 {
211 regulator-name = "buck6";
212 regulator-min-microvolt = <500000>;
213 regulator-max-microvolt = <2000000>;
214 regulator-ramp-delay = <2500>;
215 };
216 buck7 {
217 regulator-name = "buck7";
218 regulator-min-microvolt = <500000>;
219 regulator-max-microvolt = <2000000>;
220 regulator-ramp-delay = <2500>;
221 };
222 buck8 {
223 regulator-name = "buck8";
224 regulator-min-microvolt = <500000>;
225 regulator-max-microvolt = <1700000>;
226 regulator-ramp-delay = <2500>;
227 rohm,dvs-run-voltage = <1700000>;
228 rohm,dvs-idle-voltage = <1>;
229 rohm,dvs-suspend-voltage = <1>;
230 rohm,dvs-lpsr-voltage = <0>;
231 regulator-boot-on;
232 };
233 buck9 {
234 regulator-name = "buck9";
235 regulator-min-microvolt = <500000>;
236 regulator-max-microvolt = <1700000>;
237 regulator-ramp-delay = <2500>;
238 rohm,dvs-run-voltage = <1700000>;
239 rohm,dvs-idle-voltage = <1>;
240 rohm,dvs-suspend-voltage = <1>;
241 rohm,dvs-lpsr-voltage = <0>;
242 regulator-boot-on;
243 };
244 buck10 {
245 regulator-name = "buck10";
246 regulator-min-microvolt = <500000>;
247 regulator-max-microvolt = <1700000>;
248 regulator-ramp-delay = <2500>;
249 rohm,dvs-run-voltage = <1700000>;
250 rohm,dvs-idle-voltage = <1>;
251 rohm,dvs-suspend-voltage = <1>;
252 rohm,dvs-lpsr-voltage = <0>;
253 regulator-boot-on;
254 };
255 ldo1 {
256 regulator-name = "ldo1";
257 regulator-min-microvolt = <800000>;
258 regulator-max-microvolt = <3300000>;
259 };
260 ldo2 {
261 regulator-name = "ldo2";
262 regulator-min-microvolt = <800000>;
263 regulator-max-microvolt = <3300000>;
264 };
265 ldo3 {
266 regulator-name = "ldo3";
267 regulator-min-microvolt = <800000>;
268 regulator-max-microvolt = <3300000>;
269 };
270 ldo4 {
271 regulator-name = "ldo4";
272 regulator-min-microvolt = <800000>;
273 regulator-max-microvolt = <3300000>;
274 };
275 ldo5 {
276 regulator-name = "ldo5";
277 regulator-min-microvolt = <800000>;
278 regulator-max-microvolt = <3300000>;
279 };
280 ldo6 {
281 regulator-name = "ldo6";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 };
285 ldo7 {
286 regulator-name = "ldo7";
287 regulator-min-microvolt = <800000>;
288 regulator-max-microvolt = <3300000>;
289 };
290 ldo8 {
291 regulator-name = "ldo8";
292 regulator-min-microvolt = <750000>;
293 regulator-max-microvolt = <3300000>;
294 rohm,dvs-suspend-voltage = <0>;
295 rohm,dvs-lpsr-voltage = <1>;
296 rohm,dvs-run-voltage = <750000>;
297 };
298 ldo9 {
299 regulator-name = "ldo9";
300 regulator-min-microvolt = <750000>;
301 regulator-max-microvolt = <3300000>;
302 rohm,dvs-suspend-voltage = <0>;
303 rohm,dvs-lpsr-voltage = <1>;
304 rohm,dvs-run-voltage = <750000>;
305 };
306 ldo10 {
307 regulator-name = "ldo10";
308 regulator-min-microvolt = <750000>;
309 regulator-max-microvolt = <3300000>;
310 rohm,dvs-suspend-voltage = <0>;
311 rohm,dvs-lpsr-voltage = <1>;
312 rohm,dvs-run-voltage = <750000>;
313 };
314 ldo11 {
315 regulator-name = "ldo11";
316 regulator-min-microvolt = <750000>;
317 regulator-max-microvolt = <3300000>;
318 rohm,dvs-suspend-voltage = <0>;
319 rohm,dvs-lpsr-voltage = <1>;
320 rohm,dvs-run-voltage = <750000>;
321 };
322 };
323
324 leds {
325 compatible = "rohm,bd71828-leds";
326
327 led-1 {
328 rohm,led-compatible = "bd71828-grnled";
329 function = LED_FUNCTION_INDICATOR;
330 color = <LED_COLOR_ID_GREEN>;
331 };
332 led-2 {
333 rohm,led-compatible = "bd71828-ambled";
334 function = LED_FUNCTION_CHARGING;
335 color = <LED_COLOR_ID_AMBER>;
336 };
337 };
338 };
339 };
Documentation/devicetree/bindings/mfd/samsung,s2mpg10-pmic.yaml+120−0
@@ -0,0 +1,120 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/samsung,s2mpg10-pmic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S2MPG10 Power Management IC
8
9maintainers:
10 - André Draszik <andre.draszik@linaro.org>
11
12description: |
13 This is part of the device tree bindings for the S2MPG10 Power Management IC
14 (PMIC).
15
16 The Samsung S2MPG10 is a Power Management IC for mobile applications with buck
17 converters, various LDOs, power meters, RTC, clock outputs, and additional
18 GPIO interfaces and is typically complemented by S2MPG10 PMIC in a main/sub
19 configuration as the main PMIC.
20
21properties:
22 compatible:
23 const: samsung,s2mpg10-pmic
24
25 clocks:
26 $ref: /schemas/clock/samsung,s2mps11.yaml
27 description:
28 Child node describing clock provider.
29
30 interrupts:
31 maxItems: 1
32
33 regulators:
34 type: object
35 $ref: /schemas/regulator/samsung,s2mpg10-regulator.yaml
36 description:
37 List of child nodes that specify the regulators.
38
39 system-power-controller: true
40
41 wakeup-source: true
42
43patternProperties:
44 "^vinb([1-9]|10)m-supply$":
45 description:
46 Phandle to the power supply for each buck rail of this PMIC. There is a
47 1:1 mapping of supply to rail, e.g. vinb1m-supply supplies buck1m.
48
49 "^vinl([1-9]|1[0-5])m-supply$":
50 description: |
51 Phandle to the power supply for one or multiple LDO rails of this PMIC.
52 The mapping of supply to rail(s) is as follows:
53 vinl1m - ldo13m
54 vinl2m - ldo15m
55 vinl3m - ldo1m, ldo5m, ldo7m
56 vinl4m - ldo3m, ldo8m
57 vinl5m - ldo16m
58 vinl6m - ldo17m
59 vinl7m - ldo6m, ldo11m, ldo24m, ldo28m
60 vinl8m - ldo12m
61 vinl9m - ldo2m, ldo4m
62 vinl10m - ldo9m, ldo14m, ldo18m, 19m, ldo20m, ldo25m
63 vinl11m - ldo23m, ldo31m
64 vinl12m - ldo29m
65 vinl13m - ldo30m
66 vinl14m - ldo21m
67 vinl15m - ldo10m, ldo22m, ldo26m, ldo27m
68
69required:
70 - compatible
71 - interrupts
72 - regulators
73
74additionalProperties: false
75
76examples:
77 - |
78 #include <dt-bindings/gpio/gpio.h>
79 #include <dt-bindings/interrupt-controller/irq.h>
80 #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
81
82 pmic {
83 compatible = "samsung,s2mpg10-pmic";
84 interrupts-extended = <&gpa0 6 IRQ_TYPE_LEVEL_LOW>;
85 pinctrl-names = "default";
86 pinctrl-0 = <&pmic_int>;
87 system-power-controller;
88 wakeup-source;
89
90 vinl3m-supply = <&buck8m>;
91
92 clocks {
93 compatible = "samsung,s2mpg10-clk";
94 #clock-cells = <1>;
95 clock-output-names = "rtc32k_ap", "peri32k1", "peri32k2";
96 };
97
98 regulators {
99 buck8m {
100 regulator-name = "vdd_mif";
101 regulator-min-microvolt = <450000>;
102 regulator-max-microvolt = <1300000>;
103 regulator-ramp-delay = <6250>;
104 };
105
106 ldo1m {
107 regulator-name = "vdd_ldo1";
108 regulator-min-microvolt = <700000>;
109 regulator-max-microvolt = <1300000>;
110 };
111
112 ldo20m {
113 regulator-name = "vdd_dmics";
114 regulator-min-microvolt = <700000>;
115 regulator-max-microvolt = <1300000>;
116 regulator-always-on;
117 samsung,ext-control = <S2MPG10_EXTCTRL_LDO20M_EN2>;
118 };
119 };
120 };
Documentation/devicetree/bindings/mfd/samsung,s2mpg11-pmic.yaml+88−0
@@ -0,0 +1,88 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/samsung,s2mpg11-pmic.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S2MPG11 Power Management IC
8
9maintainers:
10 - André Draszik <andre.draszik@linaro.org>
11
12description: |
13 This is part of the device tree bindings for the S2MPG11 Power Management IC
14 (PMIC).
15
16 The Samsung S2MPG11 is a Power Management IC for mobile applications with buck
17 converters, various LDOs, power meters, NTC thermistor inputs, and additional
18 GPIO interfaces and typically complements an S2MPG10 PMIC in a main/sub
19 configuration as the sub-PMIC.
20
21properties:
22 compatible:
23 const: samsung,s2mpg11-pmic
24
25 interrupts:
26 maxItems: 1
27
28 regulators:
29 type: object
30 $ref: /schemas/regulator/samsung,s2mpg11-regulator.yaml
31 description:
32 List of child nodes that specify the regulators.
33
34 wakeup-source: true
35
36patternProperties:
37 "^vinb(([1-9]|10)s|[abd])-supply$":
38 description:
39 Phandle to the power supply for each buck rail of this PMIC. There is a
40 1:1 mapping of numbered supply to rail, e.g. vinb1s-supply supplies
41 buck1s. The remaining mapping is as follows
42 vinba - bucka
43 vinbb - buck boost
44 vinbd - buckd
45
46 "^vinl[1-6]s-supply$":
47 description: |
48 Phandle to the power supply for one or multiple LDO rails of this PMIC.
49 The mapping of supply to rail(s) is as follows
50 vinl1s - ldo1s, ldo2s
51 vinl2s - ldo8s, ldo9s
52 vinl3s - ldo3s, ldo5s, ldo7s, ldo15s
53 vinl4s - ldo10s, ldo11s, ldo12s, ldo14s
54 vinl5s - ldo4s, ldo6s
55 vinl6s - ldo13s
56
57required:
58 - compatible
59 - interrupts
60 - regulators
61
62additionalProperties: false
63
64examples:
65 - |
66 #include <dt-bindings/gpio/gpio.h>
67 #include <dt-bindings/interrupt-controller/irq.h>
68 #include <dt-bindings/regulator/samsung,s2mpg10-regulator.h>
69
70 pmic {
71 compatible = "samsung,s2mpg11-pmic";
72 interrupts-extended = <&gpa0 7 IRQ_TYPE_LEVEL_LOW>;
73 pinctrl-names = "default";
74 pinctrl-0 = <&pmic_int>;
75 wakeup-source;
76
77 vinl1s-supply = <&buck8m>;
78 vinl2s-supply = <&buck6s>;
79
80 regulators {
81 buckd {
82 regulator-name = "vcc_ufs";
83 regulator-ramp-delay = <6250>;
84 enable-gpios = <&gpp0 1 GPIO_ACTIVE_HIGH>;
85 samsung,ext-control = <S2MPG11_EXTCTRL_UFS_EN>;
86 };
87 };
88 };
Documentation/devicetree/bindings/mfd/samsung,s2mps11.yaml+1−28
@@ -20,7 +20,6 @@ description: | · 19 unmodified lines
20properties:20properties:
21 compatible:21 compatible:
22 enum:22 enum:
23 - samsung,s2mpg10-pmic
24 - samsung,s2mps11-pmic23 - samsung,s2mps11-pmic
25 - samsung,s2mps13-pmic24 - samsung,s2mps13-pmic
26 - samsung,s2mps14-pmic25 - samsung,s2mps14-pmic
@@ -59,42 +58,16 @@ properties: · 32 unmodified lines
59 reset (setting buck voltages to default values).58 reset (setting buck voltages to default values).
60 type: boolean59 type: boolean
61 60
62 system-power-controller: true
63
64 wakeup-source: true61 wakeup-source: true
65 62
66required:63required:
67 - compatible64 - compatible
65 - reg
68 - regulators66 - regulators
69 67
70additionalProperties: false68additionalProperties: false
71 69
72allOf:70allOf:
73 - if:
74 properties:
75 compatible:
76 contains:
77 const: samsung,s2mpg10-pmic
78 then:
79 properties:
80 reg: false
81 samsung,s2mps11-acokb-ground: false
82 samsung,s2mps11-wrstbi-ground: false
83
84 # oneOf is required, because dtschema's fixups.py doesn't handle this
85 # nesting here. Its special treatment to allow either interrupt property
86 # when only one is specified in the binding works at the top level only.
87 oneOf:
88 - required: [interrupts]
89 - required: [interrupts-extended]
90
91 else:
92 properties:
93 system-power-controller: false
94
95 required:
96 - reg
97
98 - if:71 - if:
99 properties:72 properties:
100 compatible:73 compatible:
Documentation/devicetree/bindings/mfd/syscon.yaml+5−0
@@ -102,6 +102,8 @@ select: · 101 unmodified lines
102 - mstar,msc313-pmsleep102 - mstar,msc313-pmsleep
103 - nuvoton,ma35d1-sys103 - nuvoton,ma35d1-sys
104 - nuvoton,wpcm450-shm104 - nuvoton,wpcm450-shm
105 - nxp,s32g2-gpr
106 - nxp,s32g3-gpr
105 - qcom,apq8064-mmss-sfpb107 - qcom,apq8064-mmss-sfpb
106 - qcom,apq8064-sps-sic108 - qcom,apq8064-sps-sic
107 - rockchip,px30-qos109 - rockchip,px30-qos
@@ -195,6 +197,7 @@ properties: · 87 unmodified lines
195 - mediatek,mt2701-pctl-a-syscfg197 - mediatek,mt2701-pctl-a-syscfg
196 - mediatek,mt2712-pctl-a-syscfg198 - mediatek,mt2712-pctl-a-syscfg
197 - mediatek,mt6397-pctl-pmic-syscfg199 - mediatek,mt6397-pctl-pmic-syscfg
200 - mediatek,mt7981-topmisc
198 - mediatek,mt7988-topmisc201 - mediatek,mt7988-topmisc
199 - mediatek,mt8135-pctl-a-syscfg202 - mediatek,mt8135-pctl-a-syscfg
200 - mediatek,mt8135-pctl-b-syscfg203 - mediatek,mt8135-pctl-b-syscfg
@@ -212,6 +215,8 @@ properties: · 11 unmodified lines
212 - mstar,msc313-pmsleep215 - mstar,msc313-pmsleep
213 - nuvoton,ma35d1-sys216 - nuvoton,ma35d1-sys
214 - nuvoton,wpcm450-shm217 - nuvoton,wpcm450-shm
218 - nxp,s32g2-gpr
219 - nxp,s32g3-gpr
215 - qcom,apq8064-mmss-sfpb220 - qcom,apq8064-mmss-sfpb
216 - qcom,apq8064-sps-sic221 - qcom,apq8064-sps-sic
217 - rockchip,px30-qos222 - rockchip,px30-qos
Documentation/devicetree/bindings/misc/google,android-pipe.yaml+38−0
@@ -0,0 +1,38 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/misc/google,android-pipe.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Android Goldfish QEMU Pipe
8
9maintainers:
10 - Kuan-Wei Chiu <visitorckw@gmail.com>
11
12description:
13 Android QEMU pipe virtual device generated by Android emulator.
14
15properties:
16 compatible:
17 const: google,android-pipe
18
19 reg:
20 maxItems: 1
21
22 interrupts:
23 maxItems: 1
24
25required:
26 - compatible
27 - reg
28 - interrupts
29
30additionalProperties: false
31
32examples:
33 - |
34 pipe@ff018000 {
35 compatible = "google,android-pipe";
36 reg = <0xff018000 0x2000>;
37 interrupts = <18>;
38 };
Documentation/devicetree/bindings/misc/qcom,fastrpc.yaml+3−1
@@ -18,7 +18,9 @@ description: | · 17 unmodified lines
18 18
19properties:19properties:
20 compatible:20 compatible:
21 const: qcom,fastrpc21 enum:
22 - qcom,kaanapali-fastrpc
23 - qcom,fastrpc
22 24
23 label:25 label:
24 enum:26 enum:
Documentation/devicetree/bindings/mmc/mmc-card.yaml+6−14
@@ -32,21 +32,13 @@ properties: · 31 unmodified lines
32 32
33patternProperties:33patternProperties:
34 "^partitions(-boot[12]|-gp[14])?$":34 "^partitions(-boot[12]|-gp[14])?$":
35 $ref: /schemas/mtd/partitions/partitions.yaml35 type: object
36 additionalProperties: true
36 37
37 patternProperties:38 properties:
38 "^partition@[0-9a-f]+$":39 compatible:
39 $ref: /schemas/mtd/partitions/partition.yaml40 contains:
40 41 const: fixed-partitions
41 properties:
42 reg:
43 description: Must be multiple of 512 as it's converted
44 internally from bytes to SECTOR_SIZE (512 bytes)
45
46 required:
47 - reg
48
49 unevaluatedProperties: false
50 42
51required:43required:
52 - compatible44 - compatible
Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml+0−1
@@ -66,7 +66,6 @@ properties: · 65 unmodified lines
66 items:66 items:
67 - const: brcm,nand-iproc67 - const: brcm,nand-iproc
68 - const: brcm,brcmnand-v6.168 - const: brcm,brcmnand-v6.1
69 - const: brcm,brcmnand
70 - description: BCM63168 SoC-specific NAND controller69 - description: BCM63168 SoC-specific NAND controller
71 items:70 items:
72 - const: brcm,nand-bcm6316871 - const: brcm,nand-bcm63168
Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml+2−0
@@ -40,6 +40,8 @@ properties: · 39 unmodified lines
40 dmas:40 dmas:
41 maxItems: 141 maxItems: 1
42 42
43 dma-coherent: true
44
43 iommus:45 iommus:
44 maxItems: 146 maxItems: 1
45 47
Documentation/devicetree/bindings/mtd/microchip,mchp23k256.txt+0−18
@@ -1,18 +0,0 @@
1* MTD SPI driver for Microchip 23K256 (and similar) serial SRAM
2
3Required properties:
4- #address-cells, #size-cells : Must be present if the device has sub-nodes
5 representing partitions.
6- compatible : Must be one of "microchip,mchp23k256" or "microchip,mchp23lcv1024"
7- reg : Chip-Select number
8- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
9
10Example:
11
12 spi-sram@0 {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 compatible = "microchip,mchp23k256";
16 reg = <0>;
17 spi-max-frequency = <20000000>;
18 };
Documentation/devicetree/bindings/mtd/microchip,mchp23k256.yaml+49−0
@@ -0,0 +1,49 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/microchip,mchp23k256.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Microchip 23K256 SPI SRAM
8
9maintainers:
10 - Richard Weinberger <richard@nod.at>
11
12description:
13 The Microchip 23K256 is a 256 Kbit (32 Kbyte) serial SRAM with an
14 SPI interface,supporting clock frequencies up to 20 MHz. It features
15 a 32-byte page size for writes and supports byte, page, and
16 sequential access modes.
17
18allOf:
19 - $ref: /schemas/spi/spi-peripheral-props.yaml#
20
21properties:
22 compatible:
23 enum:
24 - microchip,mchp23k256
25 - microchip,mchp23lcv1024
26
27 reg:
28 maxItems: 1
29
30required:
31 - reg
32 - compatible
33 - spi-max-frequency
34
35unevaluatedProperties: false
36
37examples:
38 - |
39 spi {
40 #address-cells = <1>;
41 #size-cells = <0>;
42
43 sram@0 {
44 compatible = "microchip,mchp23k256";
45 reg = <0>;
46 spi-max-frequency = <20000000>;
47 };
48 };
49...
Documentation/devicetree/bindings/mtd/mtd.yaml+3−7
@@ -30,18 +30,14 @@ properties: · 29 unmodified lines
30 deprecated: true30 deprecated: true
31 31
32 partitions:32 partitions:
33 $ref: /schemas/mtd/partitions/partitions.yaml33 type: object
34 34
35 required:35 required:
36 - compatible36 - compatible
37 37
38patternProperties:38patternProperties:
39 "@[0-9a-f]+$":39 "(^partition)?@[0-9a-f]+$":
40 $ref: partitions/partition.yaml40 $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node
41 deprecated: true
42
43 "^partition@[0-9a-f]+":
44 $ref: partitions/partition.yaml
45 deprecated: true41 deprecated: true
46 42
47 "^otp(-[0-9]+)?$":43 "^otp(-[0-9]+)?$":
Documentation/devicetree/bindings/mtd/mxic,multi-itfc-v009-nand-controller.yaml+78−0
@@ -0,0 +1,78 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/mtd/mxic,multi-itfc-v009-nand-controller.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Macronix Raw NAND Controller
9
10maintainers:
11 - Mason Yang <masonccyang@mxic.com.tw>
12
13description:
14 The Macronix Multi-Interface Raw NAND Controller is a versatile flash
15 memory controller for embedding in SoCs, capable of interfacing with
16 various NAND devices. It requires dedicated clock inputs for core, data
17 transmit, and delayed transmit paths along with register space and an
18 interrupt line for operation.
19
20allOf:
21 - $ref: nand-controller.yaml#
22
23properties:
24 compatible:
25 const: mxic,multi-itfc-v009-nand-controller
26
27 reg:
28 maxItems: 1
29
30 interrupts:
31 maxItems: 1
32
33 "#address-cells":
34 const: 1
35
36 "#size-cells":
37 const: 0
38
39 clocks:
40 minItems: 3
41 maxItems: 3
42
43 clock-names:
44 items:
45 - const: ps
46 - const: send
47 - const: send_dly
48
49required:
50 - compatible
51 - reg
52 - interrupts
53 - "#address-cells"
54 - "#size-cells"
55 - clocks
56 - clock-names
57
58unevaluatedProperties: false
59
60examples:
61 - |
62 #include <dt-bindings/interrupt-controller/arm-gic.h>
63 nand-controller@43c30000 {
64 compatible = "mxic,multi-itfc-v009-nand-controller";
65 reg = <0x43c30000 0x10000>;
66 #address-cells = <1>;
67 #size-cells = <0>;
68 interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;
69 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
70 clock-names = "ps", "send", "send_dly";
71
72 nand@0 {
73 reg = <0>;
74 nand-ecc-mode = "soft";
75 nand-ecc-algo = "bch";
76 };
77 };
78...
Documentation/devicetree/bindings/mtd/mxic-nand.txt+0−36
@@ -1,36 +0,0 @@
1Macronix Raw NAND Controller Device Tree Bindings
2-------------------------------------------------
3
4Required properties:
5- compatible: should be "mxic,multi-itfc-v009-nand-controller"
6- reg: should contain 1 entry for the registers
7- #address-cells: should be set to 1
8- #size-cells: should be set to 0
9- interrupts: interrupt line connected to this raw NAND controller
10- clock-names: should contain "ps", "send" and "send_dly"
11- clocks: should contain 3 phandles for the "ps", "send" and
12 "send_dly" clocks
13
14Children nodes:
15- children nodes represent the available NAND chips.
16
17See Documentation/devicetree/bindings/mtd/nand-controller.yaml
18for more details on generic bindings.
19
20Example:
21
22 nand: nand-controller@43c30000 {
23 compatible = "mxic,multi-itfc-v009-nand-controller";
24 reg = <0x43c30000 0x10000>;
25 #address-cells = <1>;
26 #size-cells = <0>;
27 interrupts = <GIC_SPI 0x1d IRQ_TYPE_EDGE_RISING>;
28 clocks = <&clkwizard 0>, <&clkwizard 1>, <&clkc 15>;
29 clock-names = "send", "send_dly", "ps";
30
31 nand@0 {
32 reg = <0>;
33 nand-ecc-mode = "soft";
34 nand-ecc-algo = "bch";
35 };
36 };
Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml+102−0
@@ -0,0 +1,102 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra NAND Flash Controller
8
9maintainers:
10 - Jonathan Hunter <jonathanh@nvidia.com>
11
12allOf:
13 - $ref: nand-controller.yaml
14
15description:
16 The NVIDIA NAND controller provides an interface between NVIDIA SoCs
17 and raw NAND flash devices. It supports standard NAND operations,
18 hardware-assisted ECC, OOB data access, and DMA transfers, and
19 integrates with the Linux MTD NAND subsystem for reliable flash management.
20
21properties:
22 compatible:
23 const: nvidia,tegra20-nand
24
25 reg:
26 maxItems: 1
27
28 interrupts:
29 maxItems: 1
30
31 clocks:
32 maxItems: 1
33
34 clock-names:
35 items:
36 - const: nand
37
38 resets:
39 maxItems: 1
40
41 reset-names:
42 items:
43 - const: nand
44
45 power-domains:
46 maxItems: 1
47
48 operating-points-v2:
49 maxItems: 1
50
51patternProperties:
52 '^nand@':
53 type: object
54 description: Individual NAND chip connected to the NAND controller
55 $ref: raw-nand-chip.yaml#
56
57 properties:
58 reg:
59 maximum: 5
60
61 unevaluatedProperties: false
62
63required:
64 - compatible
65 - reg
66 - interrupts
67 - clocks
68 - clock-names
69 - resets
70 - reset-names
71
72unevaluatedProperties: false
73
74examples:
75 - |
76 #include <dt-bindings/interrupt-controller/arm-gic.h>
77 #include <dt-bindings/clock/tegra20-car.h>
78 #include <dt-bindings/gpio/tegra-gpio.h>
79
80 nand-controller@70008000 {
81 compatible = "nvidia,tegra20-nand";
82 reg = <0x70008000 0x100>;
83 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
84 clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
85 clock-names = "nand";
86 resets = <&tegra_car 13>;
87 reset-names = "nand";
88 #address-cells = <1>;
89 #size-cells = <0>;
90
91 nand@0 {
92 reg = <0>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 nand-bus-width = <8>;
96 nand-on-flash-bbt;
97 nand-ecc-algo = "bch";
98 nand-ecc-strength = <8>;
99 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
100 };
101 };
102...
Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt+0−64
@@ -1,64 +0,0 @@
1NVIDIA Tegra NAND Flash controller
2
3Required properties:
4- compatible: Must be one of:
5 - "nvidia,tegra20-nand"
6- reg: MMIO address range
7- interrupts: interrupt output of the NFC controller
8- clocks: Must contain an entry for each entry in clock-names.
9 See ../clocks/clock-bindings.txt for details.
10- clock-names: Must include the following entries:
11 - nand
12- resets: Must contain an entry for each entry in reset-names.
13 See ../reset/reset.txt for details.
14- reset-names: Must include the following entries:
15 - nand
16
17Optional children nodes:
18Individual NAND chips are children of the NAND controller node. Currently
19only one NAND chip supported.
20
21Required children node properties:
22- reg: An integer ranging from 1 to 6 representing the CS line to use.
23
24Optional children node properties:
25- nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
26 "hw" is supported.
27- nand-ecc-algo: string, algorithm of NAND ECC.
28 Supported values with "hw" ECC mode are: "rs", "bch".
29- nand-bus-width : See nand-controller.yaml
30- nand-on-flash-bbt: See nand-controller.yaml
31- nand-ecc-strength: integer representing the number of bits to correct
32 per ECC step (always 512). Supported strength using HW ECC
33 modes are:
34 - RS: 4, 6, 8
35 - BCH: 4, 8, 14, 16
36- nand-ecc-maximize: See nand-controller.yaml
37- nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
38 are chosen.
39- wp-gpios: GPIO specifier for the write protect pin.
40
41Optional child node of NAND chip nodes:
42Partitions: see mtd.yaml
43
44 Example:
45 nand-controller@70008000 {
46 compatible = "nvidia,tegra20-nand";
47 reg = <0x70008000 0x100>;
48 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
49 clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
50 clock-names = "nand";
51 resets = <&tegra_car 13>;
52 reset-names = "nand";
53
54 nand@0 {
55 reg = <0>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 nand-bus-width = <8>;
59 nand-on-flash-bbt;
60 nand-ecc-algo = "bch";
61 nand-ecc-strength = <8>;
62 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
63 };
64 };
Documentation/devicetree/bindings/mtd/partitions/arm,arm-firmware-suite.yaml+0−2
@@ -9,8 +9,6 @@ title: ARM Firmware Suite (AFS) Partitions · 8 unmodified lines
9maintainers:9maintainers:
10 - Linus Walleij <linusw@kernel.org>10 - Linus Walleij <linusw@kernel.org>
11 11
12select: false
13
14description: |12description: |
15 The ARM Firmware Suite is a flash partitioning system found on the13 The ARM Firmware Suite is a flash partitioning system found on the
16 ARM reference designs: Integrator AP, Integrator CP, Versatile AB,14 ARM reference designs: Integrator AP, Integrator CP, Versatile AB,
Documentation/devicetree/bindings/mtd/partitions/binman.yaml+0−53
@@ -1,53 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/partitions/binman.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Binman entries
8
9description: |
10 This corresponds to a binman 'entry'. It is a single partition which holds
11 data of a defined type.
12
13 Binman uses the type to indicate what data file / type to place in the
14 partition. There are quite a number of binman-specific entry types, such as
15 section, fill and files, to be added later.
16
17maintainers:
18 - Simon Glass <sjg@chromium.org>
19
20allOf:
21 - $ref: /schemas/mtd/partitions/partition.yaml#
22
23properties:
24 compatible:
25 enum:
26 - u-boot # u-boot.bin from U-Boot project
27 - tfa-bl31 # bl31.bin or bl31.elf from TF-A project
28
29required:
30 - compatible
31
32unevaluatedProperties: false
33
34examples:
35 - |
36 partitions {
37 compatible = "fixed-partitions";
38 #address-cells = <1>;
39 #size-cells = <1>;
40
41 partition@100000 {
42 compatible = "u-boot";
43 reg = <0x100000 0xf00000>;
44 align-size = <0x1000>;
45 align-end = <0x10000>;
46 };
47
48 partition@200000 {
49 compatible = "tfa-bl31";
50 reg = <0x200000 0x100000>;
51 align = <0x4000>;
52 };
53 };
Documentation/devicetree/bindings/mtd/partitions/brcm,bcm4908-partitions.yaml+1−7
@@ -17,8 +17,6 @@ description: | · 16 unmodified lines
17maintainers:17maintainers:
18 - Rafał Miłecki <rafal@milecki.pl>18 - Rafał Miłecki <rafal@milecki.pl>
19 19
20select: false
21
22properties:20properties:
23 compatible:21 compatible:
24 const: brcm,bcm4908-partitions22 const: brcm,bcm4908-partitions
@@ -31,11 +29,7 @@ properties: · 6 unmodified lines
31 29
32patternProperties:30patternProperties:
33 "^partition@[0-9a-f]+$":31 "^partition@[0-9a-f]+$":
34 $ref: partition.yaml#32 $ref: partition.yaml#/$defs/partition-node
35 properties:
36 compatible:
37 const: brcm,bcm4908-firmware
38 unevaluatedProperties: false
39 33
40required:34required:
41 - "#address-cells"35 - "#address-cells"
Documentation/devicetree/bindings/mtd/partitions/brcm,bcm947xx-cfe-partitions.yaml+0−2
@@ -35,8 +35,6 @@ description: | · 34 unmodified lines
35maintainers:35maintainers:
36 - Rafał Miłecki <rafal@milecki.pl>36 - Rafał Miłecki <rafal@milecki.pl>
37 37
38select: false
39
40properties:38properties:
41 compatible:39 compatible:
42 const: brcm,bcm947xx-cfe-partitions40 const: brcm,bcm947xx-cfe-partitions
Documentation/devicetree/bindings/mtd/partitions/brcm,bcm963xx-imagetag.txt+0−45
@@ -1,45 +0,0 @@
1Broadcom BCM963XX ImageTag Partition Container
2==============================================
3
4Some Broadcom BCM63XX SoC based devices contain additional, non discoverable
5partitions or non standard bootloader partition sizes. For these a mixed layout
6needs to be used with an explicit firmware partition.
7
8The BCM963XX ImageTag is a simple firmware header describing the offsets and
9sizes of the rootfs and kernel parts contained in the firmware.
10
11Required properties:
12- compatible : must be "brcm,bcm963xx-imagetag"
13
14Example:
15
16flash@1e000000 {
17 compatible = "cfi-flash";
18 reg = <0x1e000000 0x2000000>;
19 bank-width = <2>;
20
21 partitions {
22 compatible = "fixed-partitions";
23 #address-cells = <1>;
24 #size-cells = <1>;
25
26 cfe@0 {
27 reg = <0x0 0x10000>;
28 read-only;
29 };
30
31 firmware@10000 {
32 reg = <0x10000 0x7d0000>;
33 compatible = "brcm,bcm963xx-imagetag";
34 };
35
36 caldata@7e0000 {
37 reg = <0x7e0000 0x10000>;
38 read-only;
39 };
40
41 nvram@7f0000 {
42 reg = <0x7f0000 0x10000>;
43 };
44 };
45};
Documentation/devicetree/bindings/mtd/partitions/brcm,trx.txt+0−42
@@ -1,42 +0,0 @@
1Broadcom TRX Container Partition
2================================
3
4TRX is Broadcom's official firmware format for the BCM947xx boards. It's used by
5most of the vendors building devices based on Broadcom's BCM47xx SoCs and is
6supported by the CFE bootloader.
7
8Design of the TRX format is very minimalistic. Its header contains
9identification fields, CRC32 checksum and the locations of embedded partitions.
10Its purpose is to store a few partitions in a format that can be distributed as
11a standalone file and written in a flash memory.
12
13Container can hold up to 4 partitions. The first partition has to contain a
14device executable binary (e.g. a kernel) as it's what the CFE bootloader starts
15executing. Other partitions can be used for operating system purposes. This is
16useful for systems that keep kernel and rootfs separated.
17
18TRX doesn't enforce any strict partition boundaries or size limits. All
19partitions have to be less than the 4GiB max size limit.
20
21There are two existing/known TRX variants:
221) v1 which contains 3 partitions
232) v2 which contains 4 partitions
24
25There aren't separated compatible bindings for them as version can be trivialy
26detected by a software parsing TRX header.
27
28Required properties:
29- compatible : (required) must be "brcm,trx"
30
31Optional properties:
32
33- brcm,trx-magic: TRX magic, if it is different from the default magic
34 0x30524448 as a u32.
35
36Example:
37
38flash@0 {
39 partitions {
40 compatible = "brcm,trx";
41 };
42};
Documentation/devicetree/bindings/mtd/partitions/brcm,trx.yaml+65−0
@@ -0,0 +1,65 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/partitions/brcm,trx.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Broadcom TRX Container Partition
8
9maintainers:
10 - Hauke Mehrtens <hauke@hauke-m.de>
11 - Rafał Miłecki <rafal@milecki.pl>
12
13description: >
14 TRX is Broadcom's official firmware format for the BCM947xx boards. It's used by
15 most of the vendors building devices based on Broadcom's BCM47xx SoCs and is
16 supported by the CFE bootloader.
17
18 Design of the TRX format is very minimalistic. Its header contains
19 identification fields, CRC32 checksum and the locations of embedded partitions.
20 Its purpose is to store a few partitions in a format that can be distributed as
21 a standalone file and written in a flash memory.
22
23 Container can hold up to 4 partitions. The first partition has to contain a
24 device executable binary (e.g. a kernel) as it's what the CFE bootloader starts
25 executing. Other partitions can be used for operating system purposes. This is
26 useful for systems that keep kernel and rootfs separated.
27
28 TRX doesn't enforce any strict partition boundaries or size limits. All
29 partitions have to be less than the 4GiB max size limit.
30
31 There are two existing/known TRX variants:
32 1) v1 which contains 3 partitions
33 2) v2 which contains 4 partitions
34
35 There aren't separated compatible bindings for them as version can be trivially
36 detected by a software parsing TRX header.
37
38properties:
39 compatible:
40 oneOf:
41 - items:
42 - const: linksys,ns-firmware
43 - const: brcm,trx
44 - const: brcm,trx
45
46 brcm,trx-magic:
47 description: TRX magic, if it is different from the default magic.
48 $ref: /schemas/types.yaml#/definitions/uint32
49 default: 0x30524448
50
51required:
52 - compatible
53
54allOf:
55 - $ref: partition.yaml#
56
57unevaluatedProperties: false
58
59examples:
60 - |
61 flash {
62 partitions {
63 compatible = "brcm,trx";
64 };
65 };
Documentation/devicetree/bindings/mtd/partitions/fixed-partitions.yaml+10−33
@@ -25,47 +25,25 @@ properties: · 24 unmodified lines
25 - const: sercomm,sc-partitions25 - const: sercomm,sc-partitions
26 - const: fixed-partitions26 - const: fixed-partitions
27 27
28 "#address-cells": true28 "#address-cells":
29 enum: [ 1, 2 ]
29 30
30 "#size-cells": true31 "#size-cells":
31 32 enum: [ 1, 2 ]
32 compression:
33 $ref: /schemas/types.yaml#/definitions/string
34 description: |
35 Compression algorithm used to store the data in this partition, chosen
36 from a list of well-known algorithms.
37
38 The contents are compressed using this algorithm.
39
40 enum:
41 - none
42 - bzip2
43 - gzip
44 - lzop
45 - lz4
46 - lzma
47 - xz
48 - zstd
49 33
50patternProperties:34patternProperties:
51 "@[0-9a-f]+$":35 "@[0-9a-f]+$":
52 $ref: partition.yaml#36 $ref: partition.yaml#/$defs/partition-node
53
54 properties:
55 sercomm,scpart-id:
56 description: Partition id in Sercomm partition map. Mtd parser
57 uses this id to find a record in the partition map containing
58 offset and size of the current partition. The values from
59 partition map overrides partition offset and size defined in
60 reg property of the dts. Frequently these values are the same,
61 but may differ if device has bad eraseblocks on a flash.
62 $ref: /schemas/types.yaml#/definitions/uint32
63 37
64required:38required:
65 - "#address-cells"39 - "#address-cells"
66 - "#size-cells"40 - "#size-cells"
67 41
68additionalProperties: true42# fixed-partitions can be nested
43allOf:
44 - $ref: partition.yaml#
45
46unevaluatedProperties: false
69 47
70examples:48examples:
71 - |49 - |
@@ -141,7 +119,6 @@ examples: · 69 unmodified lines
141 compatible = "fixed-partitions";119 compatible = "fixed-partitions";
142 label = "calibration";120 label = "calibration";
143 reg = <0xf00000 0x100000>;121 reg = <0xf00000 0x100000>;
144 ranges = <0 0xf00000 0x100000>;
145 #address-cells = <1>;122 #address-cells = <1>;
146 #size-cells = <1>;123 #size-cells = <1>;
147 124
Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml+1−9
@@ -18,8 +18,6 @@ description: | · 17 unmodified lines
18maintainers:18maintainers:
19 - Rafał Miłecki <rafal@milecki.pl>19 - Rafał Miłecki <rafal@milecki.pl>
20 20
21select: false
22
23properties:21properties:
24 compatible:22 compatible:
25 const: linksys,ns-partitions23 const: linksys,ns-partitions
@@ -32,13 +30,7 @@ properties: · 6 unmodified lines
32 30
33patternProperties:31patternProperties:
34 "^partition@[0-9a-f]+$":32 "^partition@[0-9a-f]+$":
35 $ref: partition.yaml#33 $ref: partition.yaml#/$defs/partition-node
36 properties:
37 compatible:
38 items:
39 - const: linksys,ns-firmware
40 - const: brcm,trx
41 unevaluatedProperties: false
42 34
43required:35required:
44 - "#address-cells"36 - "#address-cells"
Documentation/devicetree/bindings/mtd/partitions/partition.yaml+43−1
@@ -108,17 +108,59 @@ properties: · 107 unmodified lines
108 with the padding bytes, so may grow. If ‘align-end’ is not provided,108 with the padding bytes, so may grow. If ‘align-end’ is not provided,
109 no alignment is performed.109 no alignment is performed.
110 110
111 compression:
112 $ref: /schemas/types.yaml#/definitions/string
113 description: |
114 Compression algorithm used to store the data in this partition, chosen
115 from a list of well-known algorithms.
116
117 The contents are compressed using this algorithm.
118
119 enum:
120 - none
121 - bzip2
122 - gzip
123 - lzop
124 - lz4
125 - lzma
126 - xz
127 - zstd
128
129 sercomm,scpart-id:
130 description: Partition id in Sercomm partition map. Mtd parser
131 uses this id to find a record in the partition map containing
132 offset and size of the current partition. The values from
133 partition map overrides partition offset and size defined in
134 reg property of the dts. Frequently these values are the same,
135 but may differ if device has bad eraseblocks on a flash.
136 $ref: /schemas/types.yaml#/definitions/uint32
137
138 nvmem-layout:
139 $ref: /schemas/nvmem/layouts/nvmem-layout.yaml
140
111if:141if:
112 not:142 not:
113 required: [ reg ]143 required: [ reg ]
114then:144then:
115 properties:145 properties:
116 $nodename:146 $nodename:
117 pattern: '^partition-.*$'147 pattern: '^partitions?(-.+)?$'
118 148
119# This is a generic file other binding inherit from and extend149# This is a generic file other binding inherit from and extend
120additionalProperties: true150additionalProperties: true
121 151
152$defs:
153 partition-node:
154 type: object
155 if:
156 not:
157 required: [ compatible ]
158 then:
159 $ref: '#'
160 unevaluatedProperties: false
161 else:
162 $ref: '#'
163
122examples:164examples:
123 - |165 - |
124 partitions {166 partitions {
Documentation/devicetree/bindings/mtd/partitions/partitions.yaml+0−42
@@ -1,42 +0,0 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/partitions/partitions.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Partitions
8
9description: |
10 This binding is generic and describes the content of the partitions container
11 node. All partition parsers must be referenced here.
12
13maintainers:
14 - Miquel Raynal <miquel.raynal@bootlin.com>
15
16oneOf:
17 - $ref: arm,arm-firmware-suite.yaml
18 - $ref: brcm,bcm4908-partitions.yaml
19 - $ref: brcm,bcm947xx-cfe-partitions.yaml
20 - $ref: fixed-partitions.yaml
21 - $ref: linksys,ns-partitions.yaml
22 - $ref: qcom,smem-part.yaml
23 - $ref: redboot-fis.yaml
24 - $ref: tplink,safeloader-partitions.yaml
25
26properties:
27 compatible: true
28
29 '#address-cells':
30 enum: [1, 2]
31
32 '#size-cells':
33 enum: [1, 2]
34
35patternProperties:
36 "^partition(-.+|@[0-9a-f]+)$":
37 $ref: partition.yaml
38
39required:
40 - compatible
41
42unevaluatedProperties: false
Documentation/devicetree/bindings/mtd/partitions/redboot-fis.yaml+0−4
@@ -28,10 +28,6 @@ properties: · 27 unmodified lines
28 device. On a flash memory with 32KB eraseblocks, 0 means the first28 device. On a flash memory with 32KB eraseblocks, 0 means the first
29 eraseblock at 0x00000000, 1 means the second eraseblock at 0x00008000 and so on.29 eraseblock at 0x00000000, 1 means the second eraseblock at 0x00008000 and so on.
30 30
31 '#address-cells': false
32
33 '#size-cells': false
34
35required:31required:
36 - compatible32 - compatible
37 - fis-index-block33 - fis-index-block
Documentation/devicetree/bindings/mtd/partitions/seama.yaml+0−44
@@ -1,44 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/partitions/seama.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Seattle Image Partitions
8
9description: The SEAttle iMAge (SEAMA) partition is a type of partition
10 used for NAND flash devices. This type of flash image is found in some
11 D-Link routers such as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L,
12 DIR890L and DCH-M225, as well as in WD and NEC routers on the ath79
13 (MIPS), Broadcom BCM53xx, and RAMIPS platforms. This partition type
14 does not have children defined in the device tree, they need to be
15 detected by software.
16
17allOf:
18 - $ref: partition.yaml#
19
20maintainers:
21 - Linus Walleij <linusw@kernel.org>
22
23properties:
24 compatible:
25 const: seama
26
27required:
28 - compatible
29
30unevaluatedProperties: false
31
32examples:
33 - |
34 partitions {
35 compatible = "fixed-partitions";
36 #address-cells = <1>;
37 #size-cells = <1>;
38
39 partition@0 {
40 compatible = "seama";
41 reg = <0x0 0x800000>;
42 label = "firmware";
43 };
44 };
Documentation/devicetree/bindings/mtd/partitions/simple-partition.yaml+61−0
@@ -0,0 +1,61 @@
1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/partitions/simple-partition.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Simple partition types
8
9description:
10 Simple partition types which only define a "compatible" value and no custom
11 properties.
12
13maintainers:
14 - Rafał Miłecki <rafal@milecki.pl>
15 - Simon Glass <sjg@chromium.org>
16
17allOf:
18 - $ref: partition.yaml#
19
20properties:
21 compatible:
22 oneOf:
23 - const: brcm,bcm4908-firmware
24 description:
25 Broadcom BCM4908 CFE bootloader firmware partition
26
27 - const: brcm,bcm963xx-imagetag
28 description:
29 The BCM963XX ImageTag is a simple firmware header describing the
30 offsets and sizes of the rootfs and kernel parts contained in the
31 firmware.
32
33 - const: seama
34 description:
35 The SEAttle iMAge (SEAMA) partition is a type of partition used for
36 NAND flash devices. This type of flash image is found in some D-Link
37 routers such as DIR-645, DIR-842, DIR-859, DIR-860L, DIR-885L, DIR890L
38 and DCH-M225, as well as in WD and NEC routers on the ath79 (MIPS),
39 Broadcom BCM53xx, and RAMIPS platforms. This partition type does not
40 have children defined in the device tree, they need to be detected by
41 software.
42
43 - const: u-boot
44 description: >
45 u-boot.bin from U-Boot project.
46
47 This corresponds to a binman 'entry'. It is a single partition which holds
48 data of a defined type.
49
50 Binman uses the type to indicate what data file / type to place in the
51 partition. There are quite a number of binman-specific entry types, such as
52 section, fill and files, to be added later.
53
54 - const: tfa-bl31
55 description: >
56 bl31.bin or bl31.elf from TF-A project
57
58 This corresponds to a binman 'entry'. It is a single partition which holds
59 data of a defined type.
60
61unevaluatedProperties: false
Documentation/devicetree/bindings/mtd/partitions/tplink,safeloader-partitions.yaml+1−1
@@ -38,7 +38,7 @@ properties: · 37 unmodified lines
38 38
39patternProperties:39patternProperties:
40 "^partition-.*$":40 "^partition-.*$":
41 $ref: partition.yaml#41 $ref: partition.yaml#/$defs/partition-node
42 42
43required:43required:
44 - partitions-table-offset44 - partitions-table-offset
Documentation/devicetree/bindings/mtd/partitions/u-boot.yaml+1−1
@@ -29,7 +29,7 @@ properties: · 28 unmodified lines
29 29
30patternProperties:30patternProperties:
31 "^partition-.*$":31 "^partition-.*$":
32 $ref: partition.yaml#32 $ref: partition.yaml#/$defs/partition-node
33 33
34unevaluatedProperties: false34unevaluatedProperties: false
35 35
Documentation/devicetree/bindings/mtd/spear_smi.txt+0−29
@@ -1,29 +0,0 @@
1* SPEAr SMI
2
3Required properties:
4- compatible : "st,spear600-smi"
5- reg : Address range of the mtd chip
6- #address-cells, #size-cells : Must be present if the device has sub-nodes
7 representing partitions.
8- interrupts: Should contain the STMMAC interrupts
9- clock-rate : Functional clock rate of SMI in Hz
10
11Optional properties:
12- st,smi-fast-mode : Flash supports read in fast mode
13
14Example:
15
16 smi: flash@fc000000 {
17 compatible = "st,spear600-smi";
18 #address-cells = <1>;
19 #size-cells = <1>;
20 reg = <0xfc000000 0x1000>;
21 interrupt-parent = <&vic1>;
22 interrupts = <12>;
23 clock-rate = <50000000>; /* 50MHz */
24
25 flash@f8000000 {
26 st,smi-fast-mode;
27 ...
28 };
29 };
Documentation/devicetree/bindings/mtd/st,spear600-smi.yaml+72−0
@@ -0,0 +1,72 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/st,spear600-smi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics SPEAr600 Serial Memory Interface (SMI) Controller
8
9maintainers:
10 - Richard Weinberger <richard@nod.at>
11
12description:
13 The SPEAr600 Serial Memory Interface (SMI) is a dedicated serial flash
14 controller supporting up to four chip selects for serial NOR flashes
15 connected in parallel. The controller is memory-mapped and the attached
16 flash devices appear in the CPU address space.The driver
17 (drivers/mtd/devices/spear_smi.c) probes the attached flashes
18 dynamically by sending commands (e.g., RDID) to each bank.
19 Flash sub nodes describe the memory range and optional per-flash
20 properties.
21
22allOf:
23 - $ref: mtd.yaml#
24
25properties:
26 compatible:
27 const: st,spear600-smi
28
29 reg:
30 maxItems: 1
31
32 interrupts:
33 maxItems: 1
34
35 "#address-cells":
36 const: 1
37
38 "#size-cells":
39 const: 1
40
41 clock-rate:
42 $ref: /schemas/types.yaml#/definitions/uint32
43 description: Functional clock rate of the SMI controller in Hz.
44
45 st,smi-fast-mode:
46 type: boolean
47 description: Indicates that the attached flash supports fast read mode.
48
49required:
50 - compatible
51 - reg
52 - clock-rate
53
54unevaluatedProperties: false
55
56examples:
57 - |
58 flash@fc000000 {
59 compatible = "st,spear600-smi";
60 #address-cells = <1>;
61 #size-cells = <1>;
62 reg = <0xfc000000 0x1000>;
63 interrupt-parent = <&vic1>;
64 interrupts = <12>;
65 clock-rate = <50000000>; /* 50 MHz */
66
67 flash@f8000000 {
68 reg = <0xfc000000 0x1000>;
69 st,smi-fast-mode;
70 };
71 };
72...
Documentation/devicetree/bindings/mtd/st,spi-fsm.yaml+68−0
@@ -0,0 +1,68 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/st,spi-fsm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics SPI FSM Serial NOR Flash Controller
8
9maintainers:
10 - Angus Clark <angus.clark@st.com>
11
12description:
13 The STMicroelectronics Fast Sequence Mode (FSM) controller is a dedicated
14 hardware accelerator integrated in older STiH4xx/STiDxxx set-top box SoCs
15 (such as STiH407, STiH416, STiD127). It connects directly to a single
16 external serial flash device used as the primary boot device. The FSM
17 executes hard-coded or configurable instruction sequences in hardware,
18 providing low-latency reads suitable for execute-in-place (XIP) boot
19 and high read bandwidth.
20
21properties:
22 compatible:
23 const: st,spi-fsm
24
25 reg:
26 maxItems: 1
27
28 reg-names:
29 const: spi-fsm
30
31 interrupts:
32 maxItems: 1
33
34 st,syscfg:
35 $ref: /schemas/types.yaml#/definitions/phandle
36 description: Phandle to the system configuration registers used for boot-device selection.
37
38 st,boot-device-reg:
39 $ref: /schemas/types.yaml#/definitions/uint32
40 description: Offset of the boot-device register within the st,syscfg node.
41
42 st,boot-device-spi:
43 $ref: /schemas/types.yaml#/definitions/uint32
44 description: Expected boot-device value when booting from this SPI controller.
45
46required:
47 - compatible
48 - reg
49 - reg-names
50 - interrupts
51 - pinctrl-0
52
53unevaluatedProperties: false
54
55examples:
56 - |
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 spifsm@fe902000 {
59 compatible = "st,spi-fsm";
60 reg = <0xfe902000 0x1000>;
61 reg-names = "spi-fsm";
62 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
63 pinctrl-0 = <&pinctrl_fsm>;
64 st,syscfg = <&syscfg_rear>;
65 st,boot-device-reg = <0x958>;
66 st,boot-device-spi = <0x1a>;
67 };
68...
Documentation/devicetree/bindings/mtd/st-fsm.txt+0−25
@@ -1,25 +0,0 @@
1* ST-Microelectronics SPI FSM Serial (NOR) Flash Controller
2
3Required properties:
4 - compatible : Should be "st,spi-fsm"
5 - reg : Contains register's location and length.
6 - reg-names : Should contain the reg names "spi-fsm"
7 - interrupts : The interrupt number
8 - pinctrl-0 : Standard Pinctrl phandle (see: pinctrl/pinctrl-bindings.txt)
9
10Optional properties:
11 - st,syscfg : Phandle to boot-device system configuration registers
12 - st,boot-device-reg : Address of the aforementioned boot-device register(s)
13 - st,boot-device-spi : Expected boot-device value if booted via this device
14
15Example:
16 spifsm: spifsm@fe902000{
17 compatible = "st,spi-fsm";
18 reg = <0xfe902000 0x1000>;
19 reg-names = "spi-fsm";
20 pinctrl-0 = <&pinctrl_fsm>;
21 st,syscfg = <&syscfg_rear>;
22 st,boot-device-reg = <0x958>;
23 st,boot-device-spi = <0x1a>;
24 };
25
Documentation/devicetree/bindings/mtd/ti,davinci-nand.yaml+3−1
@@ -24,7 +24,9 @@ properties: · 23 unmodified lines
24 - description: AEMIF control registers.24 - description: AEMIF control registers.
25 25
26 partitions:26 partitions:
27 $ref: /schemas/mtd/partitions/partitions.yaml27 type: object
28 required:
29 - compatible
28 30
29 ti,davinci-chipselect:31 ti,davinci-chipselect:
30 description:32 description:
Documentation/devicetree/bindings/mtd/ti,gpmc-onenand.yaml+1−1
@@ -36,7 +36,7 @@ properties: · 35 unmodified lines
36 36
37patternProperties:37patternProperties:
38 "@[0-9a-f]+$":38 "@[0-9a-f]+$":
39 $ref: /schemas/mtd/partitions/partition.yaml39 $ref: /schemas/mtd/partitions/partition.yaml#/$defs/partition-node
40 40
41allOf:41allOf:
42 - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml42 - $ref: /schemas/memory-controllers/ti,gpmc-child.yaml
Documentation/devicetree/bindings/net/adi,adin.yaml+14−0
@@ -52,6 +52,20 @@ properties: · 51 unmodified lines
52 description: Enable 25MHz reference clock output on CLK25_REF pin.52 description: Enable 25MHz reference clock output on CLK25_REF pin.
53 type: boolean53 type: boolean
54 54
55 adi,low-cmode-impedance:
56 description: |
57 Configure PHY for the lowest common-mode impedance on the receive pair
58 for 100BASE-TX. This is suited for capacitive coupled applications and
59 other applications where there may be a path for high common-mode noise
60 to reach the PHY.
61 If not present, by default the PHY is configured for normal termination
62 (zero-power termination) mode.
63
64 Note: There is a trade-off of 12 mW increased power consumption with
65 the lowest common-mode impedance setting, but in all cases the
66 differential impedance is 100 ohms.
67 type: boolean
68
55unevaluatedProperties: false69unevaluatedProperties: false
56 70
57examples:71examples:
Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml+18−10
@@ -42,14 +42,13 @@ properties: · 41 unmodified lines
42 - description: wlan irq line542 - description: wlan irq line5
43 43
44 memory-region:44 memory-region:
45 oneOf:45 items:
46 - items:46 - description: NPU firmware binary region
47 - description: NPU firmware binary region47 - description: NPU wlan offload RX buffers region
48 - items:48 - description: NPU wlan offload TX buffers region
49 - description: NPU firmware binary region49 - description: NPU wlan offload TX packet identifiers region
50 - description: NPU wlan offload RX buffers region50 - description: NPU wlan Block Ack buffers region
51 - description: NPU wlan offload TX buffers region51 minItems: 1
52 - description: NPU wlan offload TX packet identifiers region
53 52
54 memory-region-names:53 memory-region-names:
55 items:54 items:
@@ -57,6 +56,13 @@ properties: · 1 unmodified line
57 - const: pkt56 - const: pkt
58 - const: tx-pkt57 - const: tx-pkt
59 - const: tx-bufid58 - const: tx-bufid
59 - const: ba
60 minItems: 1
61
62 firmware-name:
63 items:
64 - description: Firmware name of RiscV core
65 - description: Firmware name of Data section
60 66
61required:67required:
62 - compatible68 - compatible
@@ -93,7 +99,9 @@ examples: · 30 unmodified lines
93 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,99 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
94 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;100 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
95 memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>,101 memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>,
96 <&npu_txbufid>;102 <&npu_txbufid>, <&npu_ba>;
97 memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid";103 memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid", "ba";
104 firmware-name = "airoha/en7581_npu_rv32.bin",
105 "airoha/en7581_npu_data.bin";
98 };106 };
99 };107 };
Documentation/devicetree/bindings/net/airoha,en8811h.yaml+10−1
@@ -16,6 +16,7 @@ description: · 15 unmodified lines
16 16
17allOf:17allOf:
18 - $ref: ethernet-phy.yaml#18 - $ref: ethernet-phy.yaml#
19 - $ref: /schemas/phy/phy-common-props.yaml#
19 20
20properties:21properties:
21 compatible:22 compatible:
@@ -30,12 +31,18 @@ properties: · 8 unmodified lines
30 description:31 description:
31 Reverse rx polarity of the SERDES. This is the receiving32 Reverse rx polarity of the SERDES. This is the receiving
32 side of the lines from the MAC towards the EN881H.33 side of the lines from the MAC towards the EN881H.
34 This property is deprecated, for details please refer to
35 Documentation/devicetree/bindings/phy/phy-common-props.yaml
36 deprecated: true
33 37
34 airoha,pnswap-tx:38 airoha,pnswap-tx:
35 type: boolean39 type: boolean
36 description:40 description:
37 Reverse tx polarity of SERDES. This is the transmitting41 Reverse tx polarity of SERDES. This is the transmitting
38 side of the lines from EN8811H towards the MAC.42 side of the lines from EN8811H towards the MAC.
43 This property is deprecated, for details please refer to
44 Documentation/devicetree/bindings/phy/phy-common-props.yaml
45 deprecated: true
39 46
40required:47required:
41 - reg48 - reg
@@ -44,6 +51,8 @@ unevaluatedProperties: false · 2 unmodified lines
44 51
45examples:52examples:
46 - |53 - |
54 #include <dt-bindings/phy/phy.h>
55
47 mdio {56 mdio {
48 #address-cells = <1>;57 #address-cells = <1>;
49 #size-cells = <0>;58 #size-cells = <0>;
@@ -51,6 +60,6 @@ examples: · 1 unmodified line
51 ethernet-phy@1 {60 ethernet-phy@1 {
52 compatible = "ethernet-phy-id03a2.a411";61 compatible = "ethernet-phy-id03a2.a411";
53 reg = <1>;62 reg = <1>;
54 airoha,pnswap-rx;63 rx-polarity = <PHY_POL_INVERT>;
55 };64 };
56 };65 };
Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml+25−0
@@ -0,0 +1,25 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,bluetooth-common.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Bluetooth Common Properties
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 firmware-name:
15 minItems: 1
16 items:
17 - description: specify the name of nvm firmware to load
18 - description: specify the name of rampatch firmware to load
19
20 qcom,local-bd-address-broken:
21 type: boolean
22 description:
23 boot firmware is incorrectly passing the address in big-endian order
24
25additionalProperties: true
Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml+49−0
@@ -0,0 +1,49 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca2066-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCA2006 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,qca2066-bt
17 - qcom,qca6174-bt
18
19 clocks:
20 items:
21 - description: External low-power 32.768 kHz clock input
22
23 enable-gpios:
24 maxItems: 1
25
26required:
27 - compatible
28 - clocks
29 - enable-gpios
30
31allOf:
32 - $ref: bluetooth-controller.yaml#
33 - $ref: qcom,bluetooth-common.yaml
34 - $ref: /schemas/serial/serial-peripheral-props.yaml#
35
36unevaluatedProperties: false
37
38examples:
39 - |
40 #include <dt-bindings/gpio/gpio.h>
41
42 serial {
43 bluetooth {
44 compatible = "qcom,qca6174-bt";
45 clocks = <&divclk4>;
46 enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
47 firmware-name = "nvm_00440302.bin";
48 };
49 };
Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml+64−0
@@ -0,0 +1,64 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca6390-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCA6390 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,qca6390-bt
17
18 vddaon-supply:
19 description: VDD_AON supply regulator handle
20
21 vddbtcmx-supply:
22 description: VDD_BT_CMX supply regulator handle
23
24 vddrfa0p8-supply:
25 description: VDD_RFA_0P8 supply regulator handle
26
27 vddrfa1p2-supply:
28 description: VDD_RFA_1P2 supply regulator handle
29
30 vddrfa1p7-supply:
31 description: VDD_RFA_1P7 supply regulator handle
32
33 vddrfacmn-supply:
34 description: VDD_RFA_CMN supply regulator handle
35
36required:
37 - compatible
38 - vddaon-supply
39 - vddbtcmx-supply
40 - vddrfa0p8-supply
41 - vddrfa1p2-supply
42 - vddrfa1p7-supply
43 - vddrfacmn-supply
44
45allOf:
46 - $ref: bluetooth-controller.yaml#
47 - $ref: qcom,bluetooth-common.yaml
48 - $ref: /schemas/serial/serial-peripheral-props.yaml#
49
50unevaluatedProperties: false
51
52examples:
53 - |
54 serial {
55 bluetooth {
56 compatible = "qcom,qca6390-bt";
57 vddaon-supply = <&vreg_pmu_aon_0p59>;
58 vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
59 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
60 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
61 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
62 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
63 };
64 };
Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml+58−0
@@ -0,0 +1,58 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca9377-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm QCA9377 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,qca9377-bt
17
18 clocks:
19 items:
20 - description: External low-power 32.768 kHz clock input
21
22 enable-gpios:
23 maxItems: 1
24
25 vddio-supply:
26 description: VDD_IO supply regulator handle
27
28 vddxo-supply:
29 description: VDD_XO supply regulator handle
30
31required:
32 - compatible
33 - clocks
34 - enable-gpios
35
36allOf:
37 - $ref: bluetooth-controller.yaml#
38 - $ref: qcom,bluetooth-common.yaml
39 - $ref: /schemas/serial/serial-peripheral-props.yaml#
40
41unevaluatedProperties: false
42
43examples:
44 - |
45 #include <dt-bindings/gpio/gpio.h>
46
47 serial {
48 bluetooth {
49 compatible = "qcom,qca9377-bt";
50 clocks = <&rk809 1>;
51 enable-gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
52 max-speed = <2000000>;
53 pinctrl-names = "default";
54 pinctrl-0 = <&bt_enable>;
55 vddio-supply = <&vcc_1v8>;
56 vddxo-supply = <&vcc3v3_sys>;
57 };
58 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml+67−0
@@ -0,0 +1,67 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3950-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm WCN3950/WCN3988 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,wcn3950-bt
17 - qcom,wcn3988-bt
18
19 enable-gpios:
20 maxItems: 1
21
22 swctrl-gpios:
23 maxItems: 1
24 description: gpio specifier is used to find status
25 of clock supply to SoC
26
27 vddch0-supply:
28 description: VDD_CH0 supply regulator handle
29
30 vddio-supply:
31 description: VDD_IO supply regulator handle
32
33 vddrf-supply:
34 description: VDD_RF supply regulator handle
35
36 vddxo-supply:
37 description: VDD_XO supply regulator handle
38
39required:
40 - compatible
41 - vddch0-supply
42 - vddio-supply
43 - vddrf-supply
44 - vddxo-supply
45
46allOf:
47 - $ref: bluetooth-controller.yaml#
48 - $ref: qcom,bluetooth-common.yaml
49 - $ref: /schemas/serial/serial-peripheral-props.yaml#
50
51unevaluatedProperties: false
52
53examples:
54 - |
55 #include <dt-bindings/gpio/gpio.h>
56
57 serial {
58 bluetooth {
59 compatible = "qcom,wcn3950-bt";
60 enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
61 max-speed = <3200000>;
62 vddch0-supply = <&pm4125_l22>;
63 vddio-supply = <&pm4125_l15>;
64 vddrf-supply = <&pm4125_l10>;
65 vddxo-supply = <&pm4125_l13>;
66 };
67 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml+66−0
@@ -0,0 +1,66 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3990-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm WCN3990/WCN3991/WCN3998 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,wcn3990-bt
17 - qcom,wcn3991-bt
18 - qcom,wcn3998-bt
19
20 clocks:
21 items:
22 - description: External low-power 32.768 kHz clock input
23
24 vddch0-supply:
25 description: VDD_CH0 supply regulator handle
26
27 vddch1-supply:
28 description: VDD_CH1 supply regulator handle
29
30 vddio-supply:
31 description: VDD_IO supply regulator handle
32
33 vddrf-supply:
34 description: VDD_RF supply regulator handle
35
36 vddxo-supply:
37 description: VDD_XO supply regulator handle
38
39required:
40 - compatible
41 - vddch0-supply
42 - vddio-supply
43 - vddrf-supply
44 - vddxo-supply
45
46allOf:
47 - $ref: bluetooth-controller.yaml#
48 - $ref: qcom,bluetooth-common.yaml
49 - $ref: /schemas/serial/serial-peripheral-props.yaml#
50
51unevaluatedProperties: false
52
53examples:
54 - |
55 serial {
56 bluetooth {
57 compatible = "qcom,wcn3990-bt";
58 firmware-name = "crnv21.bin";
59 max-speed = <3200000>;
60 vddio-supply = <&vreg_s4a_1p8>;
61 vddch0-supply = <&vreg_l25a_3p3>;
62 vddch1-supply = <&vreg_l23a_3p3>;
63 vddrf-supply = <&vreg_l17a_1p3>;
64 vddxo-supply = <&vreg_l7a_1p8>;
65 };
66 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml+91−0
@@ -0,0 +1,91 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6750-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm WCN6750 Bluetooth
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13properties:
14 compatible:
15 enum:
16 - qcom,wcn6750-bt
17
18 enable-gpios:
19 maxItems: 1
20 deprecated: true
21
22 swctrl-gpios:
23 maxItems: 1
24 description: gpio specifier is used to find status
25 of clock supply to SoC
26 deprecated: true
27
28 vddaon-supply:
29 description: VDD_AON supply regulator handle
30
31 vddasd-supply:
32 description: VDD_ASD supply regulator handle
33 deprecated: true
34
35 vddbtcmx-supply:
36 description: VDD_BT_CMX supply regulator handle
37
38 vddbtcxmx-supply:
39 description: VDD_BT_CXMX supply regulator handle
40 deprecated: true
41
42 vddio-supply:
43 description: VDD_IO supply regulator handle
44 deprecated: true
45
46 vddrfa0p8-supply:
47 description: VDD_RFA_0P8 supply regulator handle
48
49 vddrfa1p2-supply:
50 description: VDD_RFA_1P2 supply regulator handle
51
52 vddrfa1p7-supply:
53 description: VDD_RFA_1P7 supply regulator handle
54
55 vddrfa2p2-supply:
56 description: VDD_RFA_2P2 supply regulator handle
57
58 vddrfacmn-supply:
59 description: VDD_RFA_CMN supply regulator handle
60
61required:
62 - compatible
63 - vddaon-supply
64 - vddrfa0p8-supply
65 - vddrfa1p2-supply
66 - vddrfa1p7-supply
67 - vddrfacmn-supply
68
69allOf:
70 - $ref: bluetooth-controller.yaml#
71 - $ref: qcom,bluetooth-common.yaml
72 - $ref: /schemas/serial/serial-peripheral-props.yaml#
73
74unevaluatedProperties: false
75
76examples:
77 - |
78 serial {
79 bluetooth {
80 compatible = "qcom,wcn6750-bt";
81
82 firmware-name = "msnv11.bin";
83 max-speed = <3200000>;
84 vddaon-supply = <&vreg_pmu_aon_0p59>;
85 vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
86 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
87 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
88 vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
89 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
90 };
91 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml+99−0
@@ -0,0 +1,99 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6855-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm WCN6855 Bluetooth
8
9maintainers:
10 - Bartosz Golaszewski <brgl@bgdev.pl>
11 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
12 - Rocky Liao <quic_rjliao@quicinc.com>
13
14properties:
15 compatible:
16 enum:
17 - qcom,wcn6855-bt
18
19 enable-gpios:
20 maxItems: 1
21 deprecated: true
22
23 swctrl-gpios:
24 maxItems: 1
25 description: gpio specifier is used to find status
26 of clock supply to SoC
27 deprecated: true
28
29 vddaon-supply:
30 description: VDD_AON supply regulator handle
31
32 vddbtcmx-supply:
33 description: VDD_BT_CMX supply regulator handle
34
35 vddbtcxmx-supply:
36 description: VDD_BT_CXMX supply regulator handle
37 deprecated: true
38
39 vddio-supply:
40 description: VDD_IO supply regulator handle
41 deprecated: true
42
43 vddrfa0p8-supply:
44 description: VDD_RFA_0P8 supply regulator handle
45
46 vddrfa1p2-supply:
47 description: VDD_RFA_1P2 supply regulator handle
48
49 vddrfa1p7-supply:
50 description: VDD_RFA_1P7 supply regulator handle
51 deprecated: true
52
53 vddrfa1p8-supply:
54 description: VDD_RFA_1P8 supply regulator handle
55
56 vddrfacmn-supply:
57 description: VDD_RFA_CMN supply regulator handle
58
59 vddwlcx-supply:
60 description: VDD_WLCX supply regulator handle
61
62 vddwlmx-supply:
63 description: VDD_WLMX supply regulator handle
64
65required:
66 - compatible
67 - vddaon-supply
68 - vddbtcmx-supply
69 - vddrfa0p8-supply
70 - vddrfa1p2-supply
71 - vddrfa1p8-supply
72 - vddrfacmn-supply
73 - vddwlcx-supply
74 - vddwlmx-supply
75
76allOf:
77 - $ref: bluetooth-controller.yaml#
78 - $ref: qcom,bluetooth-common.yaml
79 - $ref: /schemas/serial/serial-peripheral-props.yaml#
80
81unevaluatedProperties: false
82
83examples:
84 - |
85 serial {
86 bluetooth {
87 compatible = "qcom,wcn6855-bt";
88
89 max-speed = <3000000>;
90 vddaon-supply = <&vreg_pmu_aon_0p8>;
91 vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
92 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
93 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
94 vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
95 vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
96 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
97 vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
98 };
99 };
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml+94−0
@@ -0,0 +1,94 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn7850-bt.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm WCN7850 Bluetooth
8
9maintainers:
10 - Bartosz Golaszewski <brgl@bgdev.pl>
11 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
12 - Rocky Liao <quic_rjliao@quicinc.com>
13
14properties:
15 compatible:
16 enum:
17 - qcom,wcn7850-bt
18
19 enable-gpios:
20 maxItems: 1
21 deprecated: true
22
23 swctrl-gpios:
24 maxItems: 1
25 description: gpio specifier is used to find status
26 of clock supply to SoC
27 deprecated: true
28
29 vddaon-supply:
30 description: VDD_AON supply regulator handle
31
32 vdddig-supply:
33 description: VDD_DIG supply regulator handle
34 deprecated: true
35
36 vddio-supply:
37 description: VDD_IO supply regulator handle
38 deprecated: true
39
40 vddrfa0p8-supply:
41 description: VDD_RFA_0P8 supply regulator handle
42
43 vddrfa1p2-supply:
44 description: VDD_RFA_1P2 supply regulator handle
45
46 vddrfa1p8-supply:
47 description: VDD_RFA_1P8 supply regulator handle
48
49 vddrfa1p9-supply:
50 description: VDD_RFA_1P9 supply regulator handle
51 deprecated: true
52
53 vddrfacmn-supply:
54 description: VDD_RFA_CMN supply regulator handle
55
56 vddwlcx-supply:
57 description: VDD_WLCX supply regulator handle
58
59 vddwlmx-supply:
60 description: VDD_WLMX supply regulator handle
61
62required:
63 - compatible
64 - vddrfacmn-supply
65 - vddaon-supply
66 - vddwlcx-supply
67 - vddwlmx-supply
68 - vddrfa0p8-supply
69 - vddrfa1p2-supply
70 - vddrfa1p8-supply
71
72allOf:
73 - $ref: bluetooth-controller.yaml#
74 - $ref: qcom,bluetooth-common.yaml
75 - $ref: /schemas/serial/serial-peripheral-props.yaml#
76
77unevaluatedProperties: false
78
79examples:
80 - |
81 serial {
82 bluetooth {
83 compatible = "qcom,wcn7850-bt";
84
85 max-speed = <3200000>;
86 vddaon-supply = <&vreg_pmu_aon_0p59>;
87 vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
88 vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
89 vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
90 vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
91 vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
92 vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
93 };
94 };
Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml+0−259
@@ -1,259 +0,0 @@
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/bluetooth/qualcomm-bluetooth.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Bluetooth Chips
8
9maintainers:
10 - Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
11 - Rocky Liao <quic_rjliao@quicinc.com>
12
13description:
14 This binding describes Qualcomm UART-attached bluetooth chips.
15
16properties:
17 compatible:
18 enum:
19 - qcom,qca2066-bt
20 - qcom,qca6174-bt
21 - qcom,qca9377-bt
22 - qcom,wcn3950-bt
23 - qcom,wcn3988-bt
24 - qcom,wcn3990-bt
25 - qcom,wcn3991-bt
26 - qcom,wcn3998-bt
27 - qcom,qca6390-bt
28 - qcom,wcn6750-bt
29 - qcom,wcn6855-bt
30 - qcom,wcn7850-bt
31
32 enable-gpios:
33 maxItems: 1
34 description: gpio specifier used to enable chip
35
36 swctrl-gpios:
37 maxItems: 1
38 description: gpio specifier is used to find status
39 of clock supply to SoC
40
41 clocks:
42 maxItems: 1
43 description: clock provided to the controller (SUSCLK_32KHZ)
44
45 vddio-supply:
46 description: VDD_IO supply regulator handle
47
48 vddxo-supply:
49 description: VDD_XO supply regulator handle
50
51 vddrf-supply:
52 description: VDD_RF supply regulator handle
53
54 vddch0-supply:
55 description: VDD_CH0 supply regulator handle
56
57 vddch1-supply:
58 description: VDD_CH1 supply regulator handle
59
60 vddaon-supply:
61 description: VDD_AON supply regulator handle
62
63 vdddig-supply:
64 description: VDD_DIG supply regulator handle
65
66 vddbtcmx-supply:
67 description: VDD_BT_CMX supply regulator handle
68
69 vddbtcxmx-supply:
70 description: VDD_BT_CXMX supply regulator handle
71
72 vddrfacmn-supply:
73 description: VDD_RFA_CMN supply regulator handle
74
75 vddrfa0p8-supply:
76 description: VDD_RFA_0P8 supply regulator handle
77
78 vddrfa1p7-supply:
79 description: VDD_RFA_1P7 supply regulator handle
80
81 vddrfa1p8-supply:
82 description: VDD_RFA_1P8 supply regulator handle
83
84 vddrfa1p2-supply:
85 description: VDD_RFA_1P2 supply regulator handle
86
87 vddrfa1p9-supply:
88 description: VDD_RFA_1P9 supply regulator handle
89
90 vddrfa2p2-supply:
91 description: VDD_RFA_2P2 supply regulator handle
92
93 vddasd-supply:

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arch/hexagon/include/asm/signal.hrenamed from arch/hexagon/include/uapi/asm/signal.h+0−0

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arch/x86/net/bpf_jit_comp32.c+1−1

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arch/x86/tools/vdso2c.crenamed from arch/x86/entry/vdso/vdso2c.c+0−0

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arch/x86/xen/setup.c+18−10

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crypto/nhpoly1305.c+0−255

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crypto/testmgr.h+837−1554

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crypto/zstd.c+1−1

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drivers/accel/amdxdna/aie2_ctx.c+33−37

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drivers/accel/amdxdna/aie2_error.c+5−7

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drivers/accel/amdxdna/aie2_message.c+88−40

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drivers/accel/amdxdna/aie2_msg_priv.h+7−1

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drivers/accel/amdxdna/aie2_pci.c+13−31

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drivers/accel/amdxdna/aie2_pci.h+11−3

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drivers/accel/amdxdna/aie2_pm.c+19−1

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drivers/accel/amdxdna/aie2_psp.c+15−0

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drivers/accel/amdxdna/aie2_smu.c+4−25

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drivers/accel/amdxdna/aie2_solver.c+2−2

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drivers/accel/amdxdna/amdxdna_ctx.c+3−3

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drivers/accel/amdxdna/amdxdna_ctx.h+1−5

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drivers/accel/amdxdna/amdxdna_gem.c+3−4

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drivers/accel/amdxdna/amdxdna_mailbox.c+18−30

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drivers/accel/amdxdna/amdxdna_pci_drv.c+16−21

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drivers/accel/amdxdna/amdxdna_pci_drv.h+1−2

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drivers/accel/amdxdna/amdxdna_pm.c+2−20

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drivers/accel/amdxdna/amdxdna_ubuf.c+12−6

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drivers/accel/amdxdna/npu1_regs.c+5−3

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drivers/accel/amdxdna/npu2_regs.c+0−115

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drivers/accel/amdxdna/npu4_regs.c+8−4

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drivers/accel/amdxdna/npu5_regs.c+2−2

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drivers/accel/amdxdna/npu6_regs.c+2−2

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drivers/accel/ethosu/ethosu_drv.c+1−1

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drivers/accel/ethosu/ethosu_gem.c+2−2

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drivers/accel/ethosu/ethosu_job.c+3−3

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drivers/accel/habanalabs/common/command_buffer.c+2−2

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drivers/accel/habanalabs/common/command_submission.c+12−14

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drivers/accel/habanalabs/common/context.c+3−4

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drivers/accel/habanalabs/common/debugfs.c+1−1

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drivers/accel/habanalabs/common/decoder.c+1−1

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drivers/accel/habanalabs/common/device.c+12−15

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drivers/accel/habanalabs/common/firmware_if.c+1−1

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drivers/accel/habanalabs/common/habanalabs_drv.c+2−2

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drivers/accel/habanalabs/common/habanalabs_ioctl.c+5−5

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drivers/accel/habanalabs/common/hldio.c+1−1

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drivers/accel/habanalabs/common/hw_queue.c+3−3

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drivers/accel/habanalabs/common/hwmon.c+3−3

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drivers/accel/habanalabs/common/irq.c+7−5

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drivers/accel/habanalabs/common/memory.c+12−12

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drivers/accel/habanalabs/common/memory_mgr.c+1−1

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drivers/accel/habanalabs/common/mmu/mmu.c+4−4

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drivers/accel/habanalabs/common/security.c+4−12

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drivers/accel/habanalabs/common/state_dump.c+1−1

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drivers/accel/habanalabs/gaudi/gaudi.c+5−6

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drivers/accel/habanalabs/gaudi2/gaudi2.c+9−9

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drivers/accel/habanalabs/gaudi2/gaudi2_security.c+1−1

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drivers/accel/habanalabs/goya/goya.c+5−6

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drivers/accel/ivpu/ivpu_debugfs.c+3−1

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drivers/accel/ivpu/ivpu_gem.c+1−1

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drivers/accel/ivpu/ivpu_gem_userptr.c+2−2

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drivers/accel/ivpu/ivpu_hw_40xx_reg.h+6−0

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drivers/accel/ivpu/ivpu_hw_ip.c+51−23

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drivers/accel/ivpu/ivpu_hw_ip.h+0−1

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drivers/accel/ivpu/ivpu_ipc.c+1−1

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drivers/accel/ivpu/ivpu_mmu_context.c+17−3

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drivers/accel/ivpu/ivpu_mmu_context.h+3−2

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drivers/accel/ivpu/ivpu_ms.c+1−1

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drivers/bluetooth/btmrvl_debugfs.c+1−1

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drivers/bluetooth/btmrvl_main.c+2−2

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drivers/bluetooth/btmtk.c+1−1

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drivers/bluetooth/btmtksdio.c+1−7

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drivers/bluetooth/btnxpuart.c+2−4

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drivers/bluetooth/btqca.c+35−23

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drivers/bluetooth/btrsi.c+1−1

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drivers/bluetooth/btrtl.c+3−3

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drivers/bluetooth/btusb.c+17−13

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drivers/bluetooth/hci_ag6xx.c+1−1

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drivers/bluetooth/hci_aml.c+9−9

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drivers/bluetooth/hci_ath.c+1−1

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drivers/bluetooth/hci_bcm.c+1−1

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drivers/bluetooth/hci_bcm4377.c+7−4

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drivers/bluetooth/hci_bcsp.c+1−1

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drivers/bluetooth/hci_h4.c+1−1

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drivers/bluetooth/hci_h5.c+2−2

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drivers/bluetooth/hci_intel.c+3−9

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drivers/bluetooth/hci_ldisc.c+3−3

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drivers/bluetooth/hci_ll.c+1−1

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drivers/bluetooth/hci_mrvl.c+1−1

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drivers/bluetooth/hci_qca.c+50−11

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drivers/bluetooth/hci_vhci.c+1−1

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drivers/bluetooth/virtio_bt.c+1−1

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drivers/bus/Kconfig+1−1

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drivers/bus/arm-cci.c+1−1

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drivers/bus/fsl-mc/dprc-driver.c+1−12

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drivers/bus/fsl-mc/fsl-mc-bus.c+42−57

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drivers/bus/fsl-mc/fsl-mc-uapi.c+1−1

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drivers/bus/mhi/ep/main.c+12−15

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drivers/bus/mhi/ep/ring.c+2−1

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drivers/bus/mhi/host/boot.c+14−5

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drivers/bus/mhi/host/init.c+10−24

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drivers/bus/mhi/host/internal.h+0−3

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drivers/bus/mhi/host/main.c+2−79

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drivers/bus/mhi/host/pci_generic.c+2−18

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drivers/bus/mhi/host/pm.c+1−1

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drivers/bus/mips_cdmm.c+2−2

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drivers/bus/moxtet.c+2−1

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drivers/bus/omap-ocp2scp.c+2−11

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drivers/bus/omap_l3_smx.c+1−1

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drivers/bus/qcom-ebi2.c+2−5

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drivers/bus/simple-pm-bus.c+6−0

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drivers/bus/stm32_firewall.c+1−1

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drivers/bus/sunxi-rsb.c+2−2

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drivers/bus/ti-sysc.c+4−4

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drivers/bus/vexpress-config.c+1−1

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drivers/cdrom/cdrom.c+4−4

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drivers/cdrom/gdrom.c+7−7

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drivers/cdx/cdx.c+6−13

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drivers/cdx/controller/cdx_controller.c+2−2

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drivers/cdx/controller/mcdi.c+3−3

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drivers/char/Kconfig+0−26

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drivers/char/Makefile+0−1

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drivers/char/agp/amd-k7-agp.c+2−3

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drivers/char/agp/ati-agp.c+2−3

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drivers/char/agp/backend.c+1−1

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drivers/char/agp/generic.c+2−2

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drivers/char/agp/isoch.c+3−3

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drivers/char/agp/sworks-agp.c+2−3

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drivers/char/agp/uninorth-agp.c+1−3

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drivers/char/apm-emulation.c+1−1

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drivers/char/bsr.c+1−2

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drivers/char/hpet.c+1−2

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drivers/char/hw_random/airoha-trng.c+1−0

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drivers/char/hw_random/amd-rng.c+1−1

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drivers/char/hw_random/core.c+105−63

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drivers/char/hw_random/geode-rng.c+1−1

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drivers/char/hw_random/intel-rng.c+1−1

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drivers/char/hw_random/optee-rng.c+7−24

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drivers/char/hw_random/virtio-rng.c+4−1

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drivers/char/ipmi/ipmb_dev_int.c+1−1

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drivers/char/ipmi/ipmi_devintf.c+2−2

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drivers/char/ipmi/ipmi_dmi.c+1−1

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drivers/char/ipmi/ipmi_msghandler.c+7−9

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drivers/char/ipmi/ipmi_si_intf.c+1−1

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drivers/char/ipmi/ipmi_ssif.c+3−3

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drivers/char/ipmi/kcs_bmc_serio.c+1−1

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drivers/char/mem.c+3−3

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drivers/char/misc_minor_kunit.c+1−1

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drivers/char/mwave/3780i.c+0−536

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drivers/char/mwave/3780i.h+0−358

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drivers/char/mwave/Makefile+0−10

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drivers/char/mwave/README+0−37

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drivers/char/mwave/mwavedd.c+0−432

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drivers/char/mwave/mwavedd.h+0−90

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drivers/char/mwave/mwavepub.h+0−89

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drivers/char/mwave/smapi.c+0−404

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drivers/char/mwave/smapi.h+0−76

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drivers/char/mwave/tp3780i.c+0−477

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drivers/char/mwave/tp3780i.h+0−103

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drivers/char/powernv-op-panel.c+1−1

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drivers/char/ppdev.c+1−1

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drivers/char/ps3flash.c+1−1

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drivers/char/random.c+1−1

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drivers/char/tlclk.c+1−1

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drivers/char/tpm/st33zp24/st33zp24.c+4−2

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drivers/char/tpm/tpm-chip.c+1−1

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drivers/char/tpm/tpm-dev.c+1−1

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drivers/char/tpm/tpm.h+1−0

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drivers/char/tpm/tpm2-sessions.c+6−6

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drivers/char/tpm/tpm_crb_ffa.c+1−1

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drivers/char/tpm/tpm_ftpm_tee.c+23−12

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drivers/char/tpm/tpm_i2c_infineon.c+4−2

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drivers/char/tpm/tpm_ibmvtpm.c+1−1

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drivers/char/tpm/tpm_tis_i2c_cr50.c+1−2

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drivers/char/tpm/tpm_tis_spi_cr50.c+1−1

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drivers/char/tpm/tpm_vtpm_proxy.c+1−1

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drivers/char/tpm/tpmrm-dev.c+1−1

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drivers/char/tpm/xen-tpmfront.c+1−1

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drivers/char/virtio_console.c+7−9

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drivers/char/xilinx_hwicap/fifo_icap.c+19−8

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drivers/char/xillybus/xillybus_class.c+1−1

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drivers/char/xillybus/xillybus_core.c+1−1

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drivers/char/xillybus/xillyusb.c+5−5

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drivers/clk/.kunitconfig+1−1

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drivers/clk/Kconfig+3−14

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drivers/clk/Makefile+1−2

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drivers/clk/actions/owl-composite.c+3−8

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drivers/clk/actions/owl-divider.c+2−15

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drivers/clk/actions/owl-divider.h+0−5

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drivers/clk/aspeed/Kconfig+21−0

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drivers/clk/aspeed/Makefile+4−0

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drivers/clk/aspeed/clk-aspeed.crenamed from drivers/clk/clk-aspeed.c+4−4

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drivers/clk/aspeed/clk-aspeed.hrenamed from drivers/clk/clk-aspeed.h+0−0

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drivers/clk/aspeed/clk-ast2600.crenamed from drivers/clk/clk-ast2600.c+3−3

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drivers/clk/aspeed/clk-ast2700.c+1055−0

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drivers/clk/at91/clk-audio-pll.c+3−3

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drivers/clk/at91/clk-generated.c+1−1

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drivers/clk/at91/clk-h32mx.c+1−1

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drivers/clk/at91/clk-i2s-mux.c+1−1

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drivers/clk/at91/clk-main.c+4−4

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drivers/clk/at91/clk-master.c+2−2

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drivers/clk/at91/clk-peripheral.c+2−2

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drivers/clk/at91/clk-pll.c+1−1

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drivers/clk/at91/clk-plldiv.c+1−1

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drivers/clk/at91/clk-programmable.c+1−1

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drivers/clk/at91/clk-sam9x60-pll.c+2−2

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drivers/clk/at91/clk-slow.c+1−1

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drivers/clk/at91/clk-smd.c+1−1

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drivers/clk/at91/clk-system.c+1−1

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drivers/clk/at91/clk-usb.c+3−3

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drivers/clk/at91/clk-utmi.c+1−1

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drivers/clk/at91/dt-compat.c+3−3

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drivers/clk/at91/pmc.c+1−2

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drivers/clk/at91/sckc.c+5−5

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drivers/clk/axis/clk-artpec6.c+1−1

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drivers/clk/axs10x/pll_clock.c+1−1

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drivers/clk/baikal-t1/ccu-div.c+4−4

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drivers/clk/baikal-t1/ccu-pll.c+3−3

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drivers/clk/baikal-t1/ccu-rst.c+1−1

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drivers/clk/baikal-t1/clk-ccu-div.c+2−2

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drivers/clk/baikal-t1/clk-ccu-pll.c+1−1

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drivers/clk/bcm/clk-bcm2835.c+1−1

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drivers/clk/bcm/clk-bcm53573-ilp.c+1−1

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drivers/clk/bcm/clk-iproc-armpll.c+1−1

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drivers/clk/bcm/clk-iproc-asiu.c+3−4

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drivers/clk/bcm/clk-iproc-pll.c+3−3

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drivers/clk/berlin/berlin2-avpll.c+2−2

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drivers/clk/berlin/berlin2-div.c+1−1

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drivers/clk/berlin/berlin2-pll.c+1−1

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drivers/clk/berlin/bg2.c+1−1

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drivers/clk/berlin/bg2q.c+1−1

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drivers/clk/clk-apple-nco.c+1−0

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drivers/clk/clk-asm9260.c+1−1

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drivers/clk/clk-bd718x7.c+8−2

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drivers/clk/clk-bm1880.c+6−13

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drivers/clk/clk-bulk.c+1−1

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drivers/clk/clk-clps711x.c+2−3

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drivers/clk/clk-composite.c+1−1

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drivers/clk/clk-devres.c+50−0

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drivers/clk/clk-divider.c+1−1

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drivers/clk/clk-eyeq.c+3−3

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drivers/clk/clk-fixed-factor.c+1−1

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drivers/clk/clk-fixed-rate.c+1−1

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drivers/clk/clk-fractional-divider.c+1−1

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drivers/clk/clk-gate.c+1−1

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drivers/clk/clk-gemini.c+2−4

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drivers/clk/clk-highbank.c+1−1

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drivers/clk/clk-hsdk-pll.c+1−1

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drivers/clk/clk-k210.c+1−1

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drivers/clk/clk-lmk04832.c+1−3

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drivers/clk/clk-loongson1.c+1−4

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drivers/clk/clk-milbeaut.c+7−16

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drivers/clk/clk-mux.c+1−1

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drivers/clk/clk-nomadik.c+2−2

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drivers/clk/clk-npcm7xx.c+3−3

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drivers/clk/clk-qoriq.c+4−4

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drivers/clk/clk-renesas-pcie.c+5−5

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drivers/clk/clk-scpi.c+2−3

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drivers/clk/clk-stm32f4.c+9−10

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drivers/clk/clk-stm32h7.c+7−8

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drivers/clk/clk-versaclock3.c+2−5

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drivers/clk/clk-vt8500.c+2−2

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drivers/clk/clk-xgene.c+3−3

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drivers/clk/clk.c+7−7

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drivers/clk/clkdev.c+1−1

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drivers/clk/davinci/pll.c+12−12

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drivers/clk/davinci/psc.c+4−4

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drivers/clk/hisilicon/clk-hi3620.c+3−3

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drivers/clk/hisilicon/clk-hix5hd2.c+1−1

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drivers/clk/hisilicon/clk.c+2−2

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drivers/clk/hisilicon/clkdivider-hi6220.c+4−6

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drivers/clk/hisilicon/clkgate-separated.c+1−1

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drivers/clk/imgtec/clk-boston.c+1−2

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drivers/clk/imx/clk-busy.c+2−2

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drivers/clk/imx/clk-composite-7ulp.c+3−3

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drivers/clk/imx/clk-composite-8m.c+3−3

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drivers/clk/imx/clk-composite-93.c+3−3

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drivers/clk/imx/clk-cpu.c+1−1

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drivers/clk/imx/clk-divider-gate.c+1−1

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drivers/clk/imx/clk-fixup-div.c+1−1

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drivers/clk/imx/clk-fixup-mux.c+1−1

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drivers/clk/imx/clk-frac-pll.c+1−1

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drivers/clk/imx/clk-fracn-gppll.c+4−2

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drivers/clk/imx/clk-gate-93.c+1−1

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drivers/clk/imx/clk-gate-exclusive.c+1−1

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drivers/clk/imx/clk-gate2.c+1−1

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drivers/clk/imx/clk-gpr-mux.c+1−1

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drivers/clk/imx/clk-imx27.c+2−5

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drivers/clk/imx/clk-imx31.c+2−5

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drivers/clk/imx/clk-imx6q.c+1−2

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drivers/clk/imx/clk-imx6sl.c+1−2

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drivers/clk/imx/clk-imx6sll.c+1−2

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drivers/clk/imx/clk-imx6sx.c+1−2

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drivers/clk/imx/clk-imx6ul.c+1−2

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drivers/clk/imx/clk-imx7d.c+1−2

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drivers/clk/imx/clk-imx7ulp.c+4−8

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drivers/clk/imx/clk-imx8mm.c+1−2

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drivers/clk/imx/clk-lpcg-scu.c+1−1

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drivers/clk/imx/clk-pfd.c+1−1

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drivers/clk/imx/clk-pfdv2.c+1−1

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drivers/clk/imx/clk-pll14xx.c+1−1

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drivers/clk/imx/clk-pllv1.c+1−1

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drivers/clk/imx/clk-pllv2.c+1−1

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drivers/clk/imx/clk-pllv3.c+1−1

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drivers/clk/imx/clk-pllv4.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/imx/clk-scu.c+3−3

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drivers/clk/imx/clk-sscg-pll.c+1−1

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drivers/clk/imx/clk.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/ingenic/cgu.c+3−4

This diff is large: its 28 lines aren’t shown here.

drivers/clk/ingenic/tcu.c+3−4

This diff is large: its 28 lines aren’t shown here.

drivers/clk/keystone/gate.c+2−2

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drivers/clk/keystone/pll.c+2−2

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drivers/clk/mediatek/Kconfig+1−1

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drivers/clk/mediatek/clk-apmixed.c+1−1

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drivers/clk/mediatek/clk-cpumux.c+1−1

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drivers/clk/mediatek/clk-gate.c+1−1

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drivers/clk/mediatek/clk-mt2701.c+1−1

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drivers/clk/mediatek/clk-mt2712-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt6735-apmixedsys.c+2−2

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drivers/clk/mediatek/clk-mt6765.c+1−1

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drivers/clk/mediatek/clk-mt6779.c+1−1

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drivers/clk/mediatek/clk-mt6795-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt6797.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-mt7622-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt7629.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-mt7981-apmixed.c+1−1

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drivers/clk/mediatek/clk-mt7981-eth.c+3−3

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drivers/clk/mediatek/clk-mt7986-apmixed.c+1−1

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drivers/clk/mediatek/clk-mt7988-apmixed.c+1−1

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drivers/clk/mediatek/clk-mt8135-apmixedsys.c+2−1

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drivers/clk/mediatek/clk-mt8167-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8173-apmixedsys.c+7−7

This diff is large: its 47 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8183-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8186-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8188-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8192-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8195-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8195-apusys_pll.c+2−1

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drivers/clk/mediatek/clk-mt8196-apmixedsys.c+2−1

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drivers/clk/mediatek/clk-mt8196-mcu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8196-mfg.c+8−7

This diff is large: its 41 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8196-vlpckgen.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-mt8365-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8516-apmixedsys.c+1−1

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drivers/clk/mediatek/clk-mt8516.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-mtk.c+11−9

This diff is large: its 70 lines aren’t shown here.

drivers/clk/mediatek/clk-mux.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mediatek/clk-pll.c+14−7

This diff is large: its 82 lines aren’t shown here.

drivers/clk/mediatek/clk-pll.h+8−7

This diff is large: its 50 lines aren’t shown here.

drivers/clk/mediatek/clk-pllfh.c+9−6

This diff is large: its 64 lines aren’t shown here.

drivers/clk/mediatek/clk-pllfh.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/meson/Kconfig+28−0

This diff is large: its 33 lines aren’t shown here.

drivers/clk/meson/Makefile+2−0

This diff is large: its 6 lines aren’t shown here.

drivers/clk/meson/g12a.c+14−3

This diff is large: its 43 lines aren’t shown here.

drivers/clk/meson/gxbb.c+17−6

This diff is large: its 52 lines aren’t shown here.

drivers/clk/meson/meson8b.c+1−1

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drivers/clk/meson/s4-peripherals.c+202−4

This diff is large: its 262 lines aren’t shown here.

drivers/clk/meson/t7-peripherals.c+1271−0

This diff is large: its 1272 lines aren’t shown here.

drivers/clk/meson/t7-pll.c+1074−0

This diff is large: its 1075 lines aren’t shown here.

drivers/clk/microchip/Kconfig+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/microchip/clk-core.c+13−25

This diff is large: its 75 lines aren’t shown here.

drivers/clk/mmp/clk-apbc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-apmu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-frac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-gate.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-mix.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk-of-mmp2.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/mmp/clk-of-pxa168.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/mmp/clk-of-pxa1928.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/clk/mmp/clk-of-pxa910.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/mmp/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mmp/clk.c+1−1

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drivers/clk/mmp/pwr-island.c+1−1

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drivers/clk/mmp/reset.c+1−1

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drivers/clk/mvebu/clk-corediv.c+2−4

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drivers/clk/mvebu/clk-cpu.c+2−2

This diff is large: its 14 lines aren’t shown here.

drivers/clk/mvebu/common.c+3−5

This diff is large: its 29 lines aren’t shown here.

drivers/clk/mvebu/cp110-system-controller.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mvebu/kirkwood.c+2−3

This diff is large: its 19 lines aren’t shown here.

drivers/clk/mxs/clk-div.c+1−1

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drivers/clk/mxs/clk-frac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mxs/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/mxs/clk-ref.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/nuvoton/clk-ma35d1-divider.c+2−5

This diff is large: its 14 lines aren’t shown here.

drivers/clk/nxp/clk-lpc18xx-ccu.c+2−2

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drivers/clk/nxp/clk-lpc32xx.c+2−4

This diff is large: its 13 lines aren’t shown here.

drivers/clk/pistachio/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/pistachio/clk.c+2−2

This diff is large: its 14 lines aren’t shown here.

drivers/clk/pxa/clk-pxa.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/qcom/Kconfig+68−3

This diff is large: its 95 lines aren’t shown here.

drivers/clk/qcom/Makefile+7−0

This diff is large: its 21 lines aren’t shown here.

drivers/clk/qcom/cambistmclkcc-kaanapali.c+437−0

This diff is large: its 438 lines aren’t shown here.

drivers/clk/qcom/cambistmclkcc-sm8750.c+454−0

This diff is large: its 455 lines aren’t shown here.

drivers/clk/qcom/camcc-kaanapali.c+2661−0

This diff is large: its 2662 lines aren’t shown here.

drivers/clk/qcom/camcc-sm8750.c+2710−0

This diff is large: its 2711 lines aren’t shown here.

drivers/clk/qcom/clk-alpha-pll.c+25−16

This diff is large: its 83 lines aren’t shown here.

drivers/clk/qcom/clk-alpha-pll.h+7−0

This diff is large: its 33 lines aren’t shown here.

drivers/clk/qcom/clk-rcg2.c+4−5

This diff is large: its 38 lines aren’t shown here.

drivers/clk/qcom/clk-regmap-divider.c+4−12

This diff is large: its 29 lines aren’t shown here.

drivers/clk/qcom/clk-rpmh.c+50−10

This diff is large: its 88 lines aren’t shown here.

drivers/clk/qcom/common.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/qcom/dispcc-kaanapali.c+1956−0

This diff is large: its 1957 lines aren’t shown here.

drivers/clk/qcom/dispcc-sdm845.c+2−2

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drivers/clk/qcom/dispcc-sm7150.c+1−1

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drivers/clk/qcom/gcc-glymur.c+2−2

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drivers/clk/qcom/gcc-ipq5018.c+1−0

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drivers/clk/qcom/gcc-kaanapali.c+3540−0

This diff is large: its 3541 lines aren’t shown here.

drivers/clk/qcom/gcc-milos.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/qcom/gcc-msm8917.c+281−1

This diff is large: its 344 lines aren’t shown here.

drivers/clk/qcom/gcc-msm8953.c+0−1

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drivers/clk/qcom/gcc-qdu1000.c+2−2

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drivers/clk/qcom/gcc-sdx75.c+2−2

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drivers/clk/qcom/gcc-sm4450.c+3−3

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drivers/clk/qcom/gcc-sm8450.c+2−2

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drivers/clk/qcom/gcc-sm8550.c+2−2

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drivers/clk/qcom/gcc-sm8650.c+2−2

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drivers/clk/qcom/gcc-sm8750.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/qcom/gcc-x1e80100.c+71−5

This diff is large: its 154 lines aren’t shown here.

drivers/clk/qcom/gpucc-kaanapali.c+482−0

This diff is large: its 483 lines aren’t shown here.

drivers/clk/qcom/gxclkctl-kaanapali.c+76−0

This diff is large: its 77 lines aren’t shown here.

drivers/clk/qcom/tcsrcc-kaanapali.c+141−0

This diff is large: its 142 lines aren’t shown here.

drivers/clk/qcom/videocc-kaanapali.c+821−0

This diff is large: its 822 lines aren’t shown here.

drivers/clk/qcom/videocc-sm8750.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/ralink/clk-mt7621.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/ralink/clk-mtmips.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/renesas/clk-div6.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/renesas/clk-mstp.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/renesas/clk-r8a73a4.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7740.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7778.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-r8a7779.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-rz.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-sh73a0.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/clk/renesas/clk-vbattb.c+2−2

This diff is large: its 14 lines aren’t shown here.

drivers/clk/renesas/r9a06g032-clocks.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/clk/renesas/r9a09g056-cpg.c+188−0

This diff is large: its 266 lines aren’t shown here.

drivers/clk/renesas/r9a09g057-cpg.c+136−0

This diff is large: its 178 lines aren’t shown here.

drivers/clk/renesas/r9a09g077-cpg.c+202−4

This diff is large: its 313 lines aren’t shown here.

drivers/clk/renesas/rcar-cpg-lib.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/renesas/rcar-gen2-cpg.c+5−5

This diff is large: its 44 lines aren’t shown here.

drivers/clk/renesas/rcar-gen3-cpg.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/renesas/rcar-gen4-cpg.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/renesas/renesas-cpg-mssr.c+33−25

This diff is large: its 154 lines aren’t shown here.

drivers/clk/renesas/rzg2l-cpg.c+151−38

This diff is large: its 312 lines aren’t shown here.

drivers/clk/renesas/rzv2h-cpg.c+8−7

This diff is large: its 50 lines aren’t shown here.

drivers/clk/rockchip/clk-cpu.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/clk/rockchip/clk-ddr.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-gate-grf.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-half-divider.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/rockchip/clk-inverter.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-mmc-phase.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-muxgrf.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/rockchip/clk-rk3576.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/rockchip/clk.c+9−9

This diff is large: its 77 lines aren’t shown here.

drivers/clk/rockchip/softrst.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-cpu.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-exynos-arm64.c+78−14

This diff is large: its 212 lines aren’t shown here.

drivers/clk/samsung/clk-exynos4.c+6−6

This diff is large: its 35 lines aren’t shown here.

drivers/clk/samsung/clk-exynos4412-isp.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5250.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-exynos5420.c+2−2

This diff is large: its 15 lines aren’t shown here.

drivers/clk/samsung/clk-exynosautov920.c+40−0

This diff is large: its 61 lines aren’t shown here.

drivers/clk/samsung/clk-gs101.c+338−0

This diff is large: its 426 lines aren’t shown here.

drivers/clk/samsung/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk-s3c64xx.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/clk/samsung/clk-s5pv210.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/samsung/clk.c+193−21

This diff is large: its 336 lines aren’t shown here.

drivers/clk/samsung/clk.h+53−3

This diff is large: its 134 lines aren’t shown here.

drivers/clk/socfpga/clk-gate-a10.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/socfpga/clk-gate-s10.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/clk/socfpga/clk-gate.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/socfpga/clk-periph-a10.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/socfpga/clk-periph-s10.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/clk/socfpga/clk-periph.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/socfpga/clk-pll-a10.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/socfpga/clk-pll-s10.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/clk/socfpga/clk-pll.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/clk/sophgo/clk-cv18xx-ip.c+85−69

This diff is large: its 300 lines aren’t shown here.

drivers/clk/sophgo/clk-sg2042-clkgen.c+5−10

This diff is large: its 31 lines aren’t shown here.

drivers/clk/spacemit/Kconfig+12−8

This diff is large: its 32 lines aren’t shown here.

drivers/clk/spacemit/Makefile+10−2

This diff is large: its 16 lines aren’t shown here.

drivers/clk/spacemit/ccu-k1.c+12−180

This diff is large: its 258 lines aren’t shown here.

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