lael-labs/linux

Documentation/devicetree/bindings/rtc/nxp,lpc1788-rtc.txt+21−0

@@ -0,0 +1,21 @@
	1	NXP LPC1788 real-time clock
	2
	3	The LPC1788 RTC provides calendar and clock functionality
	4	together with periodic tick and alarm interrupt support.
	5
	6	Required properties:
	7	- compatible : must contain "nxp,lpc1788-rtc"
	8	- reg : Specifies base physical address and size of the registers.
	9	- interrupts : A single interrupt specifier.
	10	- clocks : Must contain clock specifiers for rtc and register clock
	11	- clock-names : Must contain "rtc" and "reg"
	12	See ../clocks/clock-bindings.txt for details.
	13
	14	Example:
	15	rtc: rtc@40046000 {
	16	compatible = "nxp,lpc1788-rtc";
	17	reg = <0x40046000 0x1000>;
	18	interrupts = <47>;
	19	clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>;
	20	clock-names = "rtc", "reg";
	21	};

Documentation/devicetree/bindings/rtc/rtc-omap.txt+4−0

 Optional properties:
 - system-power-controller: whether the rtc is controlling the system power
   through pmic_power_en
+- clocks: Any internal or external clocks feeding in to rtc
+- clock-names: Corresponding names of the clocks
 Example:
 		      19>;
 	interrupt-parent = <&intc>;
 	system-power-controller;
+	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
+	clock-names = "ext-clk", "int-clk";
 };

Documentation/devicetree/bindings/rtc/xlnx-rtc.txt+25−0

@@ -0,0 +1,25 @@
	1	* Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
	2
	3	RTC controller for the Xilinx Zynq MPSoC Real Time Clock
	4	Separate IRQ lines for seconds and alarm
	5
	6	Required properties:
	7	- compatible: Should be "xlnx,zynqmp-rtc"
	8	- reg: Physical base address of the controller and length
	9	of memory mapped region.
	10	- interrupts: IRQ lines for the RTC.
	11	- interrupt-names: interrupt line names eg. "sec" "alarm"
	12
	13	Optional:
	14	- calibration: calibration value for 1 sec period which will
	15	be programmed directly to calibration register
	16
	17	Example:
	18	rtc: rtc@ffa60000 {
	19	compatible = "xlnx,zynqmp-rtc";
	20	reg = <0x0 0xffa60000 0x100>;
	21	interrupt-parent = <&gic>;
	22	interrupts = <0 26 4>, <0 27 4>;
	23	interrupt-names = "alarm", "sec";
	24	calibration = <0x198233>;
	25	};

arch/arm/boot/dts/am4372.dtsi+2−0

@@ -358,6 +358,8 @@ · 357 unmodified lines
358	interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH	358	interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH
359	GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;	359	GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
360	ti,hwmods = "rtc";	360	ti,hwmods = "rtc";
		361	clocks = <&clk_32768_ck>;
		362	clock-names = "int-clk";
361	status = "disabled";	363	status = "disabled";
362	};	364	};
363		365

arch/arm/boot/dts/am437x-gp-evm.dts+13−0

@@ -112,6 +112,13 @@ · 111 unmodified lines
112	clock-frequency = <12000000>;	112	clock-frequency = <12000000>;
113	};	113	};
114		114
		115	/* fixed 32k external oscillator clock */
		116	clk_32k_rtc: clk_32k_rtc {
		117	#clock-cells = <0>;
		118	compatible = "fixed-clock";
		119	clock-frequency = <32768>;
		120	};
		121
115	sound0: sound@0 {	122	sound0: sound@0 {
116	compatible = "simple-audio-card";	123	compatible = "simple-audio-card";
117	simple-audio-card,name = "AM437x-GP-EVM";	124	simple-audio-card,name = "AM437x-GP-EVM";
@@ -941,3 +948,9 @@ · 823 unmodified lines
941	tx-num-evt = <32>;	948	tx-num-evt = <32>;
942	rx-num-evt = <32>;	949	rx-num-evt = <32>;
943	};	950	};
		951
		952	&rtc {
		953	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
		954	clock-names = "ext-clk", "int-clk";
		955	status = "okay";
		956	};

arch/arm/boot/dts/am437x-idk-evm.dts+9−0

 			gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
 		};
 	};
+	/* fixed 32k external oscillator clock */
+	clk_32k_rtc: clk_32k_rtc {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+	};
 };
 &am43xx_pinmux {
 };
 &rtc {
+	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
+	clock-names = "ext-clk", "int-clk";
 	status = "okay";
 };

arch/arm/boot/dts/am437x-sk-evm.dts+9−0

 		display0 = &lcd0;
 	};
+	/* fixed 32k external oscillator clock */
+	clk_32k_rtc: clk_32k_rtc {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+	};
 	backlight {
 		compatible = "pwm-backlight";
 		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
 };
 &rtc {
+	clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
+	clock-names = "ext-clk", "int-clk";
 	status = "okay";
 };

arch/arm/configs/cm_x2xx_defconfig+1−1

@@ -157,7 +157,7 @@ CONFIG_LEDS_TRIGGERS=y · 156 unmodified lines
157	CONFIG_LEDS_TRIGGER_HEARTBEAT=y	157	CONFIG_LEDS_TRIGGER_HEARTBEAT=y
158	CONFIG_RTC_CLASS=y	158	CONFIG_RTC_CLASS=y
159	CONFIG_RTC_DRV_V3020=y	159	CONFIG_RTC_DRV_V3020=y
160	CONFIG_RTC_DRV_SA1100=y	160	CONFIG_RTC_DRV_PXA=y
161	CONFIG_EXT2_FS=y	161	CONFIG_EXT2_FS=y
162	CONFIG_EXT3_FS=y	162	CONFIG_EXT3_FS=y
163	CONFIG_INOTIFY=y	163	CONFIG_INOTIFY=y

arch/arm/configs/em_x270_defconfig+1−1

@@ -157,7 +157,7 @@ CONFIG_LEDS_TRIGGERS=y · 156 unmodified lines
157	CONFIG_LEDS_TRIGGER_HEARTBEAT=y	157	CONFIG_LEDS_TRIGGER_HEARTBEAT=y
158	CONFIG_RTC_CLASS=y	158	CONFIG_RTC_CLASS=y
159	CONFIG_RTC_DRV_V3020=y	159	CONFIG_RTC_DRV_V3020=y
160	CONFIG_RTC_DRV_SA1100=y	160	CONFIG_RTC_DRV_PXA=y
161	CONFIG_EXT2_FS=y	161	CONFIG_EXT2_FS=y
162	CONFIG_EXT3_FS=y	162	CONFIG_EXT3_FS=y
163	CONFIG_INOTIFY=y	163	CONFIG_INOTIFY=y

arch/arm/configs/magician_defconfig+1−1

@@ -150,7 +150,7 @@ CONFIG_LEDS_TRIGGERS=y · 149 unmodified lines
150	CONFIG_LEDS_TRIGGER_BACKLIGHT=y	150	CONFIG_LEDS_TRIGGER_BACKLIGHT=y
151	CONFIG_RTC_CLASS=y	151	CONFIG_RTC_CLASS=y
152	CONFIG_RTC_DEBUG=y	152	CONFIG_RTC_DEBUG=y
153	CONFIG_RTC_DRV_SA1100=y	153	CONFIG_RTC_DRV_PXA=y
154	CONFIG_EXT2_FS=y	154	CONFIG_EXT2_FS=y
155	CONFIG_INOTIFY=y	155	CONFIG_INOTIFY=y
156	CONFIG_MSDOS_FS=m	156	CONFIG_MSDOS_FS=m

arch/arm/configs/palmz72_defconfig+1−1

@@ -67,7 +67,7 @@ CONFIG_MMC=y · 66 unmodified lines
67	CONFIG_MMC_DEBUG=y	67	CONFIG_MMC_DEBUG=y
68	CONFIG_MMC_PXA=y	68	CONFIG_MMC_PXA=y
69	CONFIG_RTC_CLASS=y	69	CONFIG_RTC_CLASS=y
70	CONFIG_RTC_DRV_SA1100=y	70	CONFIG_RTC_DRV_PXA=y
71	CONFIG_EXT2_FS=y	71	CONFIG_EXT2_FS=y
72	CONFIG_EXT3_FS=y	72	CONFIG_EXT3_FS=y
73	# CONFIG_DNOTIFY is not set	73	# CONFIG_DNOTIFY is not set

arch/arm/configs/pcm027_defconfig+1−1

@@ -82,7 +82,7 @@ CONFIG_MMC=y · 81 unmodified lines
82	CONFIG_MMC_PXA=y	82	CONFIG_MMC_PXA=y
83	CONFIG_RTC_CLASS=y	83	CONFIG_RTC_CLASS=y
84	CONFIG_RTC_DRV_PCF8563=m	84	CONFIG_RTC_DRV_PCF8563=m
85	CONFIG_RTC_DRV_SA1100=m	85	CONFIG_RTC_DRV_PXA=m
86	CONFIG_EXT2_FS=m	86	CONFIG_EXT2_FS=m
87	CONFIG_EXT3_FS=m	87	CONFIG_EXT3_FS=m
88	# CONFIG_DNOTIFY is not set	88	# CONFIG_DNOTIFY is not set

arch/arm/configs/trizeps4_defconfig+1−1

@@ -177,7 +177,7 @@ CONFIG_NEW_LEDS=y · 176 unmodified lines
177	CONFIG_RTC_CLASS=y	177	CONFIG_RTC_CLASS=y
178	# CONFIG_RTC_HCTOSYS is not set	178	# CONFIG_RTC_HCTOSYS is not set
179	CONFIG_RTC_DRV_PCF8583=m	179	CONFIG_RTC_DRV_PCF8583=m
180	CONFIG_RTC_DRV_SA1100=y	180	CONFIG_RTC_DRV_PXA=y
181	CONFIG_EXT2_FS=y	181	CONFIG_EXT2_FS=y
182	CONFIG_EXT2_FS_XATTR=y	182	CONFIG_EXT2_FS_XATTR=y
183	CONFIG_EXT2_FS_POSIX_ACL=y	183	CONFIG_EXT2_FS_POSIX_ACL=y

arch/arm/mach-mmp/include/mach/regs-rtc.h+0−23

@@ -1,23 +0,0 @@
1	#ifndef __ASM_MACH_REGS_RTC_H
2	#define __ASM_MACH_REGS_RTC_H
3
4	#include <mach/addr-map.h>
5
6	#define RTC_VIRT_BASE (APB_VIRT_BASE + 0x10000)
7	#define RTC_REG(x) (((volatile u32 __iomem )(RTC_VIRT_BASE + (x))))
8
9	/*
10	* Real Time Clock
11	*/
12
13	#define RCNR RTC_REG(0x00) /* RTC Count Register */
14	#define RTAR RTC_REG(0x04) /* RTC Alarm Register */
15	#define RTSR RTC_REG(0x08) /* RTC Status Register */
16	#define RTTR RTC_REG(0x0C) /* RTC Timer Trim Register */
17
18	#define RTSR_HZE (1 << 3) /* HZ interrupt enable */
19	#define RTSR_ALE (1 << 2) /* RTC alarm interrupt enable */
20	#define RTSR_HZ (1 << 1) /* HZ rising-edge detected */
21	#define RTSR_AL (1 << 0) /* RTC alarm detected */
22
23	#endif /* __ASM_MACH_REGS_RTC_H */

arch/arm/mach-pxa/devices.c+2−16

@@ -440,25 +440,11 @@ struct platform_device pxa_device_rtc = { · 439 unmodified lines
440	.resource = pxa_rtc_resources,	440	.resource = pxa_rtc_resources,
441	};	441	};
442		442
443	static struct resource sa1100_rtc_resources[] = {
444	{
445	.start = IRQ_RTC1Hz,
446	.end = IRQ_RTC1Hz,
447	.name = "rtc 1Hz",
448	.flags = IORESOURCE_IRQ,
449	}, {
450	.start = IRQ_RTCAlrm,
451	.end = IRQ_RTCAlrm,
452	.name = "rtc alarm",
453	.flags = IORESOURCE_IRQ,
454	},
455	};
456
457	struct platform_device sa1100_device_rtc = {	443	struct platform_device sa1100_device_rtc = {
458	.name = "sa1100-rtc",	444	.name = "sa1100-rtc",
459	.id = -1,	445	.id = -1,
460	.num_resources = ARRAY_SIZE(sa1100_rtc_resources),	446	.num_resources = ARRAY_SIZE(pxa_rtc_resources),
461	.resource = sa1100_rtc_resources,	447	.resource = pxa_rtc_resources,
462	};	448	};
463		449
464	static struct resource pxa_ac97_resources[] = {	450	static struct resource pxa_ac97_resources[] = {

arch/arm/mach-pxa/pxa27x.c+0−1

@@ -282,7 +282,6 @@ static struct platform_device *devices[] __initdata = { · 281 unmodified lines
282	&pxa_device_asoc_ssp2,	282	&pxa_device_asoc_ssp2,
283	&pxa_device_asoc_ssp3,	283	&pxa_device_asoc_ssp3,
284	&pxa_device_asoc_platform,	284	&pxa_device_asoc_platform,
285	&sa1100_device_rtc,
286	&pxa_device_rtc,	285	&pxa_device_rtc,
287	&pxa27x_device_ssp1,	286	&pxa27x_device_ssp1,
288	&pxa27x_device_ssp2,	287	&pxa27x_device_ssp2,

arch/arm/mach-pxa/pxa3xx.c+0−1

@@ -394,7 +394,6 @@ static struct platform_device *devices[] __initdata = { · 393 unmodified lines
394	&pxa_device_asoc_ssp3,	394	&pxa_device_asoc_ssp3,
395	&pxa_device_asoc_ssp4,	395	&pxa_device_asoc_ssp4,
396	&pxa_device_asoc_platform,	396	&pxa_device_asoc_platform,
397	&sa1100_device_rtc,
398	&pxa_device_rtc,	397	&pxa_device_rtc,
399	&pxa3xx_device_ssp1,	398	&pxa3xx_device_ssp1,
400	&pxa3xx_device_ssp2,	399	&pxa3xx_device_ssp2,

arch/arm/mach-sa1100/include/mach/SA-1100.h+0−34

@@ -857,40 +857,6 @@ · 856 unmodified lines
857	#define OIER_E3 OIER_E (3) /* match interrupt Enable 3 */	857	#define OIER_E3 OIER_E (3) /* match interrupt Enable 3 */
858		858
859		859
860	/*
861	* Real-Time Clock (RTC) control registers
862	*
863	* Registers
864	* RTAR Real-Time Clock (RTC) Alarm Register (read/write).
865	* RCNR Real-Time Clock (RTC) CouNt Register (read/write).
866	* RTTR Real-Time Clock (RTC) Trim Register (read/write).
867	* RTSR Real-Time Clock (RTC) Status Register (read/write).
868	*
869	* Clocks
870	* frtx, Trtx Frequency, period of the real-time clock crystal
871	* (32.768 kHz nominal).
872	* frtc, Trtc Frequency, period of the real-time clock counter
873	* (1 Hz nominal).
874	*/
875
876	#define RTAR __REG(0x90010000) /* RTC Alarm Reg. */
877	#define RCNR __REG(0x90010004) /* RTC CouNt Reg. */
878	#define RTTR __REG(0x90010008) /* RTC Trim Reg. */
879	#define RTSR __REG(0x90010010) /* RTC Status Reg. */
880
881	#define RTTR_C Fld (16, 0) /* clock divider Count - 1 */
882	#define RTTR_D Fld (10, 16) /* trim Delete count */
883	/* frtc = (1023(C + 1) - D)frtx/ */
884	/* (1023(C + 1)^2) /
885	/* Trtc = (1023(C + 1)^2)Trtx/ */
886	/* (1023(C + 1) - D) /
887
888	#define RTSR_AL 0x00000001 /* ALarm detected */
889	#define RTSR_HZ 0x00000002 /* 1 Hz clock detected */
890	#define RTSR_ALE 0x00000004 /* ALarm interrupt Enable */
891	#define RTSR_HZE 0x00000008 /* 1 Hz clock interrupt Enable */
892
893
894	/*	860	/*
895	* Power Manager (PM) control registers	861	* Power Manager (PM) control registers
896	*	862	*

drivers/rtc/Kconfig+29−8

 	  will be called rtc-da9055
 config RTC_DRV_DA9063
-	tristate "Dialog Semiconductor DA9063 RTC"
+	tristate "Dialog Semiconductor DA9063/DA9062 RTC"
-	depends on MFD_DA9063
+	depends on MFD_DA9063 || MFD_DA9062
 	help
 	  If you say yes here you will get support for the RTC subsystem
-	  of the Dialog Semiconductor DA9063.
+	  for the Dialog Semiconductor PMIC chips DA9063 and DA9062.
 	  This driver can also be built as a module. If so, the module
 	  will be called "rtc-da9063".
 	  This driver can also be built as a module. If so, the module
 	  will be called rtc-opal.
+config RTC_DRV_ZYNQMP
+	tristate "Xilinx Zynq Ultrascale+ MPSoC RTC"
+	depends on OF
+	help
+	  If you say yes here you get support for the RTC controller found on
+	  Xilinx Zynq Ultrascale+ MPSoC.
 comment "on-CPU RTC drivers"
 config RTC_DRV_DAVINCI
 	  just say Y.
 config RTC_DRV_PXA
-	tristate "PXA27x/PXA3xx"
+       tristate "PXA27x/PXA3xx"
-	depends on ARCH_PXA
+       depends on ARCH_PXA
-	help
+       select RTC_DRV_SA1100
-	 If you say Y here you will get access to the real time clock
+       help
-	 built into your PXA27x or PXA3xx CPU.
+         If you say Y here you will get access to the real time clock
+         built into your PXA27x or PXA3xx CPU. This RTC is actually 2 RTCs
+         consisting of an SA1100 compatible RTC and the extended PXA RTC.
 	 This RTC driver uses PXA RTC registers available since pxa27x
 	 series (RDxR, RYxR) instead of legacy RCNR, RTAR.
 	  This driver can also be buillt as a module. If so, the module
 	  will be called rtc-jz4740.
+config RTC_DRV_LPC24XX
+	tristate "NXP RTC for LPC178x/18xx/408x/43xx"
+	depends on ARCH_LPC18XX || COMPILE_TEST
+	depends on OF && HAS_IOMEM
+	help
+	  This enables support for the NXP RTC found which can be found on
+	  NXP LPC178x/18xx/408x/43xx devices.
+	  If you have one of the devices above enable this driver to use
+	  the hardware RTC. This driver can also be buillt as a module. If
+	  so, the module will be called rtc-lpc24xx.
 config RTC_DRV_LPC32XX
 	depends on ARCH_LPC32XX
 	tristate "NXP LPC32XX RTC"

drivers/rtc/Makefile+2−0

 obj-$(CONFIG_RTC_DRV_ISL1208)	+= rtc-isl1208.o
 obj-$(CONFIG_RTC_DRV_JZ4740)	+= rtc-jz4740.o
 obj-$(CONFIG_RTC_DRV_LP8788)	+= rtc-lp8788.o
+obj-$(CONFIG_RTC_DRV_LPC24XX)	+= rtc-lpc24xx.o
 obj-$(CONFIG_RTC_DRV_LPC32XX)	+= rtc-lpc32xx.o
 obj-$(CONFIG_RTC_DRV_LOONGSON1)	+= rtc-ls1x.o
 obj-$(CONFIG_RTC_DRV_M41T80)	+= rtc-m41t80.o
 obj-$(CONFIG_RTC_DRV_WM8350)	+= rtc-wm8350.o
 obj-$(CONFIG_RTC_DRV_X1205)	+= rtc-x1205.o
 obj-$(CONFIG_RTC_DRV_XGENE)	+= rtc-xgene.o
+obj-$(CONFIG_RTC_DRV_ZYNQMP)	+= rtc-zynqmp.o

drivers/rtc/class.c+14−19

 	rtc->max_user_freq = 64;
 	rtc->dev.parent = dev;
 	rtc->dev.class = rtc_class;
+	rtc->dev.groups = rtc_get_dev_attribute_groups();
 	rtc->dev.release = rtc_device_release;
 	mutex_init(&rtc->ops_lock);
 	err = device_register(&rtc->dev);
 	if (err) {
+		/* This will free both memory and the ID */
 		put_device(&rtc->dev);
-		goto exit_kfree;
+		goto exit;
 	}
 	rtc_dev_add_device(rtc);
-	rtc_sysfs_add_device(rtc);
 	rtc_proc_add_device(rtc);
 	dev_info(dev, "rtc core: registered %s as %s\n",
 	return rtc;
-exit_kfree:
-	kfree(rtc);
 exit_ida:
 	ida_simple_remove(&rtc_ida, id);
  */
 void rtc_device_unregister(struct rtc_device *rtc)
 {
-	if (get_device(&rtc->dev) != NULL) {
+	mutex_lock(&rtc->ops_lock);
-		mutex_lock(&rtc->ops_lock);
+	/*
-		/* remove innards of this RTC, then disable it, before
+	 * Remove innards of this RTC, then disable it, before
-		 * letting any rtc_class_open() users access it again
+	 * letting any rtc_class_open() users access it again
-		 */
+	 */
-		rtc_sysfs_del_device(rtc);
+	rtc_dev_del_device(rtc);
-		rtc_dev_del_device(rtc);
+	rtc_proc_del_device(rtc);
-		rtc_proc_del_device(rtc);
+	device_del(&rtc->dev);
-		device_unregister(&rtc->dev);
+	rtc->ops = NULL;
-		rtc->ops = NULL;
+	mutex_unlock(&rtc->ops_lock);
-		mutex_unlock(&rtc->ops_lock);
+	put_device(&rtc->dev);
-		put_device(&rtc->dev);
-	}
 }
 EXPORT_SYMBOL_GPL(rtc_device_unregister);
 	}
 	rtc_class->pm = RTC_CLASS_DEV_PM_OPS;
 	rtc_dev_init();
-	rtc_sysfs_init(rtc_class);
 	return 0;
 }

drivers/rtc/interface.c+1−1

@@ -564,7 +564,7 @@ enum hrtimer_restart rtc_pie_update_irq(struct hrtimer *timer) · 563 unmodified lines
564	void rtc_update_irq(struct rtc_device *rtc,	564	void rtc_update_irq(struct rtc_device *rtc,
565	unsigned long num, unsigned long events)	565	unsigned long num, unsigned long events)
566	{	566	{
567	if (unlikely(IS_ERR_OR_NULL(rtc)))	567	if (IS_ERR_OR_NULL(rtc))
568	return;	568	return;
569		569
570	pm_stay_awake(rtc->dev.parent);	570	pm_stay_awake(rtc->dev.parent);

drivers/rtc/rtc-88pm80x.c+17−11

 static int pm80x_rtc_probe(struct platform_device *pdev)
 {
 	struct pm80x_chip *chip = dev_get_drvdata(pdev->dev.parent);
-	struct pm80x_platform_data *pm80x_pdata =
+	struct pm80x_rtc_pdata *pdata = dev_get_platdata(&pdev->dev);
-				dev_get_platdata(pdev->dev.parent);
-	struct pm80x_rtc_pdata *pdata = NULL;
 	struct pm80x_rtc_info *info;
+	struct device_node *node = pdev->dev.of_node;
 	struct rtc_time tm;
 	unsigned long ticks = 0;
 	int ret;
-	pdata = dev_get_platdata(&pdev->dev);
+	if (!pdata && !node) {
-	if (pdata == NULL)
+		dev_err(&pdev->dev,
-		dev_warn(&pdev->dev, "No platform data!\n");
+			"pm80x-rtc requires platform data or of_node\n");
+		return -EINVAL;
+	}
+	if (!pdata) {
+		pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
+		if (!pdata) {
+			dev_err(&pdev->dev, "failed to allocate memory\n");
+			return -ENOMEM;
+		}
+	}
 	info =
 	    devm_kzalloc(&pdev->dev, sizeof(struct pm80x_rtc_info), GFP_KERNEL);
 	regmap_update_bits(info->map, PM800_RTC_CONTROL, PM800_RTC1_USE_XO,
 			   PM800_RTC1_USE_XO);
-	if (pm80x_pdata) {
+	/* remember whether this power up is caused by PMIC RTC or not */
-		pdata = pm80x_pdata->rtc;
+	info->rtc_dev->dev.platform_data = &pdata->rtc_wakeup;
-		if (pdata)
-			info->rtc_dev->dev.platform_data = &pdata->rtc_wakeup;
-	}
 	device_init_wakeup(&pdev->dev, 1);

drivers/rtc/rtc-ab-b5ze-s3.c+1−1

 	{ .compatible = "abracon,abb5zes3" },
 	{ },
 };
+MODULE_DEVICE_TABLE(of, abb5zes3_dt_match);
 #endif
 static const struct i2c_device_id abb5zes3_id[] = {
 static struct i2c_driver abb5zes3_driver = {
 	.driver = {
 		.name = DRV_NAME,
-		.owner = THIS_MODULE,
 		.pm = &abb5zes3_rtc_pm_ops,
 		.of_match_table = of_match_ptr(abb5zes3_dt_match),
 	},

drivers/rtc/rtc-ab8500.c+2−0

 static const struct platform_device_id ab85xx_rtc_ids[] = {
 	{ "ab8500-rtc", (kernel_ulong_t)&ab8500_rtc_ops, },
 	{ "ab8540-rtc", (kernel_ulong_t)&ab8540_rtc_ops, },
+	{ /* sentinel */ }
 };
+MODULE_DEVICE_TABLE(platform, ab85xx_rtc_ids);
 static int ab8500_rtc_probe(struct platform_device *pdev)
 {

drivers/rtc/rtc-abx80x.c+1−1

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	#define ABX8XX_REG_WD 0x07	28	#define ABX8XX_REG_WD 0x07
29		29
30	#define ABX8XX_REG_CTRL1 0x10	30	#define ABX8XX_REG_CTRL1 0x10
31	#define ABX8XX_CTRL_WRITE BIT(1)	31	#define ABX8XX_CTRL_WRITE BIT(0)
32	#define ABX8XX_CTRL_12_24 BIT(6)	32	#define ABX8XX_CTRL_12_24 BIT(6)
33		33
34	#define ABX8XX_REG_CFG_KEY 0x1f	34	#define ABX8XX_REG_CFG_KEY 0x1f

drivers/rtc/rtc-armada38x.c+13−20

 	void __iomem	    *regs;
 	void __iomem	    *regs_soc;
 	spinlock_t	    lock;
-	/*
-	 * While setting the time, the RTC TIME register should not be
-	 * accessed. Setting the RTC time involves sleeping during
-	 * 100ms, so a mutex instead of a spinlock is used to protect
-	 * it
-	 */
-	struct mutex	    mutex_time;
 	int		    irq;
 };
 static int armada38x_rtc_read_time(struct device *dev, struct rtc_time *tm)
 {
 	struct armada38x_rtc *rtc = dev_get_drvdata(dev);
-	unsigned long time, time_check;
+	unsigned long time, time_check, flags;
-	mutex_lock(&rtc->mutex_time);
+	spin_lock_irqsave(&rtc->lock, flags);
 	time = readl(rtc->regs + RTC_TIME);
 	/*
 	 * WA for failing time set attempts. As stated in HW ERRATA if
 	if ((time_check - time) > 1)
 		time_check = readl(rtc->regs + RTC_TIME);
-	mutex_unlock(&rtc->mutex_time);
+	spin_unlock_irqrestore(&rtc->lock, flags);
 	rtc_time_to_tm(time_check, tm);
 {
 	struct armada38x_rtc *rtc = dev_get_drvdata(dev);
 	int ret = 0;
-	unsigned long time;
+	unsigned long time, flags;
 	ret = rtc_tm_to_time(tm, &time);
 	if (ret)
 		goto out;
 	/*
-	 * Setting the RTC time not always succeeds. According to the
+	 * According to errata FE-3124064, Write to RTC TIME register
-	 * errata we need to first write on the status register and
+	 * may fail. As a workaround, after writing to RTC TIME
-	 * then wait for 100ms before writing to the time register to be
+	 * register, issue a dummy write of 0x0 twice to RTC Status
-	 * sure that the data will be taken into account.
+	 * register.
 	 */
-	mutex_lock(&rtc->mutex_time);
+	spin_lock_irqsave(&rtc->lock, flags);
-	rtc_delayed_write(0, rtc, RTC_STATUS);
-	msleep(100);
 	rtc_delayed_write(time, rtc, RTC_TIME);
-	mutex_unlock(&rtc->mutex_time);
+	rtc_delayed_write(0, rtc, RTC_STATUS);
+	rtc_delayed_write(0, rtc, RTC_STATUS);
+	spin_unlock_irqrestore(&rtc->lock, flags);
 out:
 	return ret;
 		return -ENOMEM;
 	spin_lock_init(&rtc->lock);
-	mutex_init(&rtc->mutex_time);
 	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rtc");
 	rtc->regs = devm_ioremap_resource(&pdev->dev, res);
 	{ .compatible = "marvell,armada-380-rtc", },
 	{}
 };
+MODULE_DEVICE_TABLE(of, armada38x_rtc_of_match_table);
 #endif
 static struct platform_driver armada38x_rtc_driver = {

drivers/rtc/rtc-as3722.c+2−2

@@ -45,7 +45,7 @@ static void as3722_time_to_reg(u8 rbuff, struct rtc_time tm) · 44 unmodified lines
45	rbuff[1] = bin2bcd(tm->tm_min);	45	rbuff[1] = bin2bcd(tm->tm_min);
46	rbuff[2] = bin2bcd(tm->tm_hour);	46	rbuff[2] = bin2bcd(tm->tm_hour);
47	rbuff[3] = bin2bcd(tm->tm_mday);	47	rbuff[3] = bin2bcd(tm->tm_mday);
48	rbuff[4] = bin2bcd(tm->tm_mon);	48	rbuff[4] = bin2bcd(tm->tm_mon + 1);
49	rbuff[5] = bin2bcd(tm->tm_year - (AS3722_RTC_START_YEAR - 1900));	49	rbuff[5] = bin2bcd(tm->tm_year - (AS3722_RTC_START_YEAR - 1900));
50	}	50	}
51		51
@@ -55,7 +55,7 @@ static void as3722_reg_to_time(u8 rbuff, struct rtc_time tm) · 3 unmodified lines
55	tm->tm_min = bcd2bin(rbuff[1] & 0x7F);	55	tm->tm_min = bcd2bin(rbuff[1] & 0x7F);
56	tm->tm_hour = bcd2bin(rbuff[2] & 0x3F);	56	tm->tm_hour = bcd2bin(rbuff[2] & 0x3F);
57	tm->tm_mday = bcd2bin(rbuff[3] & 0x3F);	57	tm->tm_mday = bcd2bin(rbuff[3] & 0x3F);
58	tm->tm_mon = bcd2bin(rbuff[4] & 0x1F);	58	tm->tm_mon = bcd2bin(rbuff[4] & 0x1F) - 1;
59	tm->tm_year = (AS3722_RTC_START_YEAR - 1900) + bcd2bin(rbuff[5] & 0x7F);	59	tm->tm_year = (AS3722_RTC_START_YEAR - 1900) + bcd2bin(rbuff[5] & 0x7F);
60	return;	60	return;
61	}	61	}

drivers/rtc/rtc-at91rm9200.c+32−11

  *
  */
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/time.h>
-#include <linux/rtc.h>
 #include <linux/bcd.h>
+#include <linux/clk.h>
+#include <linux/completion.h>
 #include <linux/interrupt.h>
-#include <linux/spinlock.h>
 #include <linux/ioctl.h>
-#include <linux/completion.h>
 #include <linux/io.h>
-#include <linux/of.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
 #include <linux/of_device.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/rtc.h>
+#include <linux/spinlock.h>
 #include <linux/suspend.h>
+#include <linux/time.h>
 #include <linux/uaccess.h>
 #include "rtc-at91rm9200.h"
 static DEFINE_SPINLOCK(suspended_lock);
 static unsigned long cached_events;
 static u32 at91_rtc_imr;
+static struct clk *sclk;
 static void at91_rtc_write_ier(u32 mask)
 {
 		return -ENOMEM;
 	}
+	sclk = devm_clk_get(&pdev->dev, NULL);
+	if (IS_ERR(sclk))
+		return PTR_ERR(sclk);
+	ret = clk_prepare_enable(sclk);
+	if (ret) {
+		dev_err(&pdev->dev, "Could not enable slow clock\n");
+		return ret;
+	}
 	at91_rtc_write(AT91_RTC_CR, 0);
 	at91_rtc_write(AT91_RTC_MR, 0);		/* 24 hour mode */
 			       "at91_rtc", pdev);
 	if (ret) {
 		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
-		return ret;
+		goto err_clk;
 	}
 	/* cpu init code should really have flagged this device as
 	rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 				&at91_rtc_ops, THIS_MODULE);
-	if (IS_ERR(rtc))
+	if (IS_ERR(rtc)) {
-		return PTR_ERR(rtc);
+		ret = PTR_ERR(rtc);
+		goto err_clk;
+	}
 	platform_set_drvdata(pdev, rtc);
 	/* enable SECEV interrupt in order to initialize at91_rtc_upd_rdy
 	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
 	return 0;
+err_clk:
+	clk_disable_unprepare(sclk);
+	return ret;
 }
 /*
 					AT91_RTC_SECEV | AT91_RTC_TIMEV |
 					AT91_RTC_CALEV);
+	clk_disable_unprepare(sclk);
 	return 0;
 }

drivers/rtc/rtc-at91sam9.c+26−19

  * 2 of the License, or (at your option) any later version.
  */
-#include <linux/module.h>
+#include <linux/clk.h>
-#include <linux/kernel.h>
-#include <linux/platform_device.h>
-#include <linux/time.h>
-#include <linux/rtc.h>
 #include <linux/interrupt.h>
 #include <linux/ioctl.h>
-#include <linux/slab.h>
-#include <linux/platform_data/atmel.h>
 #include <linux/io.h>
+#include <linux/kernel.h>
 #include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
 #include <linux/regmap.h>
+#include <linux/rtc.h>
+#include <linux/slab.h>
 #include <linux/suspend.h>
-#include <linux/clk.h>
+#include <linux/time.h>
 /*
  * This driver uses two configurable hardware resources that live in the
 	if (IS_ERR(rtc->sclk))
 		return PTR_ERR(rtc->sclk);
-	sclk_rate = clk_get_rate(rtc->sclk);
-	if (!sclk_rate || sclk_rate > AT91_RTT_RTPRES) {
-		dev_err(&pdev->dev, "Invalid slow clock rate\n");
-		return -EINVAL;
-	}
 	ret = clk_prepare_enable(rtc->sclk);
 	if (ret) {
 		dev_err(&pdev->dev, "Could not enable slow clock\n");
 		return ret;
 	}
+	sclk_rate = clk_get_rate(rtc->sclk);
+	if (!sclk_rate || sclk_rate > AT91_RTT_RTPRES) {
+		dev_err(&pdev->dev, "Invalid slow clock rate\n");
+		ret = -EINVAL;
+		goto err_clk;
+	}
 	mr = rtt_readl(rtc, MR);
 	/* unless RTT is counting at 1 Hz, re-initialize it */
 	rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name,
 					&at91_rtc_ops, THIS_MODULE);
-	if (IS_ERR(rtc->rtcdev))
+	if (IS_ERR(rtc->rtcdev)) {
-		return PTR_ERR(rtc->rtcdev);
+		ret = PTR_ERR(rtc->rtcdev);
+		goto err_clk;
+	}
 	/* register irq handler after we know what name we'll use */
 	ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
 			       dev_name(&rtc->rtcdev->dev), rtc);
 	if (ret) {
 		dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
-		return ret;
+		goto err_clk;
 	}
 	/* NOTE:  sam9260 rev A silicon has a ROM bug which resets the
 				dev_name(&rtc->rtcdev->dev));
 	return 0;
+err_clk:
+	clk_disable_unprepare(rtc->sclk);
+	return ret;
 }
 /*
 	/* disable all interrupts */
 	rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
-	if (!IS_ERR(rtc->sclk))
+	clk_disable_unprepare(rtc->sclk);
-		clk_disable_unprepare(rtc->sclk);
 	return 0;
 }

drivers/rtc/rtc-bfin.c+1−1

@@ -361,7 +361,7 @@ static int bfin_rtc_probe(struct platform_device *pdev) · 360 unmodified lines
361	/* Register our RTC with the RTC framework */	361	/* Register our RTC with the RTC framework */
362	rtc->rtc_dev = devm_rtc_device_register(dev, pdev->name, &bfin_rtc_ops,	362	rtc->rtc_dev = devm_rtc_device_register(dev, pdev->name, &bfin_rtc_ops,
363	THIS_MODULE);	363	THIS_MODULE);
364	if (unlikely(IS_ERR(rtc->rtc_dev)))	364	if (IS_ERR(rtc->rtc_dev))
365	return PTR_ERR(rtc->rtc_dev);	365	return PTR_ERR(rtc->rtc_dev);
366		366
367	/* Grab the IRQ and init the hardware */	367	/* Grab the IRQ and init the hardware */

drivers/rtc/rtc-bq32k.c+1−2

 	if (error)
 		return error;
-	if (client && client->dev.of_node)
+	if (client->dev.of_node)
 		trickle_charger_of_init(dev, client->dev.of_node);
 	rtc = devm_rtc_device_register(&client->dev, bq32k_driver.driver.name,
 static struct i2c_driver bq32k_driver = {
 	.driver = {
 		.name	= "bq32k",
-		.owner	= THIS_MODULE,
 	},
 	.probe		= bq32k_probe,
 	.id_table	= bq32k_id,

drivers/rtc/rtc-cmos.c+59−66

 #include <linux/pm.h>
 #include <linux/of.h>
 #include <linux/of_platform.h>
-#include <linux/dmi.h>
 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
 #include <asm-generic/rtc.h>
 	struct device		*dev;
 	int			irq;
 	struct resource		*iomem;
+	time64_t		alarm_expires;
 	void			(*wake_on)(struct device *);
 	void			(*wake_off)(struct device *);
 	spin_unlock_irq(&rtc_lock);
-	return 0;
+	cmos->alarm_expires = rtc_tm_to_time64(&t->time);
-}
-/*
- * Do not disable RTC alarm on shutdown - workaround for b0rked BIOSes.
- */
-static bool alarm_disable_quirk;
-static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
-{
-	alarm_disable_quirk = true;
-	pr_info("BIOS has alarm-disable quirk - RTC alarms disabled\n");
 	return 0;
 }
-static const struct dmi_system_id rtc_quirks[] __initconst = {
-	/* https://bugzilla.novell.com/show_bug.cgi?id=805740 */
-	{
-		.callback = set_alarm_disable_quirk,
-		.ident    = "IBM Truman",
-		.matches  = {
-			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
-			DMI_MATCH(DMI_PRODUCT_NAME, "4852570"),
-		},
-	},
-	/* https://bugzilla.novell.com/show_bug.cgi?id=812592 */
-	{
-		.callback = set_alarm_disable_quirk,
-		.ident    = "Gigabyte GA-990XA-UD3",
-		.matches  = {
-			DMI_MATCH(DMI_SYS_VENDOR,
-					"Gigabyte Technology Co., Ltd."),
-			DMI_MATCH(DMI_PRODUCT_NAME, "GA-990XA-UD3"),
-		},
-	},
-	/* http://permalink.gmane.org/gmane.linux.kernel/1604474 */
-	{
-		.callback = set_alarm_disable_quirk,
-		.ident    = "Toshiba Satellite L300",
-		.matches  = {
-			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
-			DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
-		},
-	},
-	{}
-};
 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
 {
 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
 	if (!is_valid_irq(cmos->irq))
 		return -EINVAL;
-	if (alarm_disable_quirk)
-		return 0;
 	spin_lock_irqsave(&rtc_lock, flags);
 	if (enabled)
 {
 	int	retval;
-	if (unlikely(off >= attr->size))
-		return 0;
-	if (unlikely(off < 0))
-		return -EINVAL;
-	if ((off + count) > attr->size)
-		count = attr->size - off;
 	off += NVRAM_OFFSET;
 	spin_lock_irq(&rtc_lock);
 	for (retval = 0; count; count--, off++, retval++) {
 	int		retval;
 	cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
-	if (unlikely(off >= attr->size))
-		return -EFBIG;
-	if (unlikely(off < 0))
-		return -EINVAL;
-	if ((off + count) > attr->size)
-		count = attr->size - off;
 	/* NOTE:  on at least PCs and Ataris, the boot firmware uses a
 	 * checksum on part of the NVRAM data.  That's currently ignored
 	cmos->dev = NULL;
 }
+static int cmos_aie_poweroff(struct device *dev)
+{
+	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
+	struct rtc_time now;
+	time64_t t_now;
+	int retval = 0;
+	unsigned char rtc_control;
+	if (!cmos->alarm_expires)
+		return -EINVAL;
+	spin_lock_irq(&rtc_lock);
+	rtc_control = CMOS_READ(RTC_CONTROL);
+	spin_unlock_irq(&rtc_lock);
+	/* We only care about the situation where AIE is disabled. */
+	if (rtc_control & RTC_AIE)
+		return -EBUSY;
+	cmos_read_time(dev, &now);
+	t_now = rtc_tm_to_time64(&now);
+	/*
+	 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
+	 * automatically right after shutdown on some buggy boxes.
+	 * This automatic rebooting issue won't happen when the alarm
+	 * time is larger than now+1 seconds.
+	 *
+	 * If the alarm time is equal to now+1 seconds, the issue can be
+	 * prevented by cancelling the alarm.
+	 */
+	if (cmos->alarm_expires == t_now + 1) {
+		struct rtc_wkalrm alarm;
+		/* Cancel the AIE timer by configuring the past time. */
+		rtc_time64_to_tm(t_now - 1, &alarm.time);
+		alarm.enabled = 0;
+		retval = cmos_set_alarm(dev, &alarm);
+	} else if (cmos->alarm_expires > t_now + 1) {
+		retval = -EBUSY;
+	}
+	return retval;
+}
 #ifdef CONFIG_PM
 static int cmos_suspend(struct device *dev)
 	struct device *dev = &pnp->dev;
 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
-	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(dev))
+	if (system_state == SYSTEM_POWER_OFF) {
-		return;
+		int retval = cmos_poweroff(dev);
+		if (cmos_aie_poweroff(dev) < 0 && !retval)
+			return;
+	}
 	cmos_do_shutdown(cmos->irq);
 }
 	struct device *dev = &pdev->dev;
 	struct cmos_rtc	*cmos = dev_get_drvdata(dev);
-	if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(dev))
+	if (system_state == SYSTEM_POWER_OFF) {
-		return;
+		int retval = cmos_poweroff(dev);
+		if (cmos_aie_poweroff(dev) < 0 && !retval)
+			return;
+	}
 	cmos_do_shutdown(cmos->irq);
 }
 			platform_driver_registered = true;
 	}
-	dmi_check_system(rtc_quirks);
 	if (retval == 0)
 		return 0;

drivers/rtc/rtc-coh901331.c+1−0

@@ -263,6 +263,7 @@ static const struct of_device_id coh901331_dt_match[] = { · 262 unmodified lines
263	{ .compatible = "stericsson,coh901331" },	263	{ .compatible = "stericsson,coh901331" },
264	{},	264	{},
265	};	265	};
		266	MODULE_DEVICE_TABLE(of, coh901331_dt_match);
266		267
267	static struct platform_driver coh901331_driver = {	268	static struct platform_driver coh901331_driver = {
268	.driver = {	269	.driver = {

drivers/rtc/rtc-core.h+3−16

@@ -48,23 +48,10 @@ static inline void rtc_proc_del_device(struct rtc_device *rtc) · 47 unmodified lines
48	#endif	48	#endif
49		49
50	#ifdef CONFIG_RTC_INTF_SYSFS	50	#ifdef CONFIG_RTC_INTF_SYSFS
51		51	const struct attribute_group **rtc_get_dev_attribute_groups(void);
52	extern void __init rtc_sysfs_init(struct class *);
53	extern void rtc_sysfs_add_device(struct rtc_device *rtc);
54	extern void rtc_sysfs_del_device(struct rtc_device *rtc);
55
56	#else	52	#else
57		53	static inline const struct attribute_group **rtc_get_dev_attribute_groups(void)
58	static inline void rtc_sysfs_init(struct class *rtc)
59	{
60	}
61
62	static inline void rtc_sysfs_add_device(struct rtc_device *rtc)
63	{	54	{
		55	return NULL;
64	}	56	}
65
66	static inline void rtc_sysfs_del_device(struct rtc_device *rtc)
67	{
68	}
69
70	#endif	57	#endif

drivers/rtc/rtc-da9063.c+280−112

@@ -12,15 +12,18 @@ · 11 unmodified lines
12	* Library General Public License for more details.	12	* Library General Public License for more details.
13	*/	13	*/
14		14
		15	#include <linux/delay.h>
		16	#include <linux/init.h>
		17	#include <linux/interrupt.h>
15	#include <linux/kernel.h>	18	#include <linux/kernel.h>
16	#include <linux/module.h>	19	#include <linux/module.h>
17	#include <linux/init.h>	20	#include <linux/of.h>
18	#include <linux/platform_device.h>	21	#include <linux/platform_device.h>
19	#include <linux/interrupt.h>	22	#include <linux/regmap.h>
20	#include <linux/rtc.h>	23	#include <linux/rtc.h>
21	#include <linux/slab.h>	24	#include <linux/slab.h>
22	#include <linux/delay.h>	25
23	#include <linux/regmap.h>	26	#include <linux/mfd/da9062/registers.h>
24	#include <linux/mfd/da9063/registers.h>	27	#include <linux/mfd/da9063/registers.h>
25	#include <linux/mfd/da9063/core.h>	28	#include <linux/mfd/da9063/core.h>
26		29
@@ -29,99 +32,231 @@ · 2 unmodified lines
29	#define YEARS_FROM_DA9063(year) ((year) + 100)	32	#define YEARS_FROM_DA9063(year) ((year) + 100)
30	#define MONTHS_FROM_DA9063(month) ((month) - 1)	33	#define MONTHS_FROM_DA9063(month) ((month) - 1)
31		34
32	#define RTC_ALARM_DATA_LEN (DA9063_AD_REG_ALARM_Y - DA9063_AD_REG_ALARM_MI + 1)	35	enum {
33		36	RTC_SEC = 0,
34	#define RTC_DATA_LEN (DA9063_REG_COUNT_Y - DA9063_REG_COUNT_S + 1)	37	RTC_MIN = 1,
35	#define RTC_SEC 0	38	RTC_HOUR = 2,
36	#define RTC_MIN 1	39	RTC_DAY = 3,
37	#define RTC_HOUR 2	40	RTC_MONTH = 4,
38	#define RTC_DAY 3	41	RTC_YEAR = 5,
39	#define RTC_MONTH 4	42	RTC_DATA_LEN
40	#define RTC_YEAR 5	43	};
41		44
42	struct da9063_rtc {	45	struct da9063_compatible_rtc_regmap {
43	struct rtc_device *rtc_dev;	46	/* REGS */
44	struct da9063 *hw;	47	int rtc_enable_reg;
45	struct rtc_time alarm_time;	48	int rtc_enable_32k_crystal_reg;
46	bool rtc_sync;	49	int rtc_alarm_secs_reg;
47	int alarm_year;	50	int rtc_alarm_year_reg;
48	int alarm_start;	51	int rtc_count_secs_reg;
49	int alarm_len;	52	int rtc_count_year_reg;
50	int data_start;	53	int rtc_event_reg;
		54	/* MASKS */
		55	int rtc_enable_mask;
		56	int rtc_crystal_mask;
		57	int rtc_event_alarm_mask;
		58	int rtc_alarm_on_mask;
		59	int rtc_alarm_status_mask;
		60	int rtc_tick_on_mask;
		61	int rtc_ready_to_read_mask;
		62	int rtc_count_sec_mask;
		63	int rtc_count_min_mask;
		64	int rtc_count_hour_mask;
		65	int rtc_count_day_mask;
		66	int rtc_count_month_mask;
		67	int rtc_count_year_mask;
		68	/* ALARM CONFIG */
		69	int rtc_data_start;
		70	int rtc_alarm_len;
		71	};
		72
		73	struct da9063_compatible_rtc {
		74	struct rtc_device *rtc_dev;
		75	struct rtc_time alarm_time;
		76	struct regmap *regmap;
		77	const struct da9063_compatible_rtc_regmap *config;
		78	bool rtc_sync;
		79	};
		80
		81	static const struct da9063_compatible_rtc_regmap da9063_ad_regs = {
		82	/* REGS */
		83	.rtc_enable_reg = DA9063_REG_CONTROL_E,
		84	.rtc_alarm_secs_reg = DA9063_AD_REG_ALARM_MI,
		85	.rtc_alarm_year_reg = DA9063_AD_REG_ALARM_Y,
		86	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
		87	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
		88	.rtc_event_reg = DA9063_REG_EVENT_A,
		89	/* MASKS */
		90	.rtc_enable_mask = DA9063_RTC_EN,
		91	.rtc_crystal_mask = DA9063_CRYSTAL,
		92	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
		93	.rtc_event_alarm_mask = DA9063_E_ALARM,
		94	.rtc_alarm_on_mask = DA9063_ALARM_ON,
		95	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
		96	DA9063_ALARM_STATUS_TICK,
		97	.rtc_tick_on_mask = DA9063_TICK_ON,
		98	.rtc_ready_to_read_mask = DA9063_RTC_READ,
		99	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
		100	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
		101	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
		102	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
		103	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
		104	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
		105	/* ALARM CONFIG */
		106	.rtc_data_start = RTC_MIN,
		107	.rtc_alarm_len = RTC_DATA_LEN - 1,
		108	};
		109
		110	static const struct da9063_compatible_rtc_regmap da9063_bb_regs = {
		111	/* REGS */
		112	.rtc_enable_reg = DA9063_REG_CONTROL_E,
		113	.rtc_alarm_secs_reg = DA9063_BB_REG_ALARM_S,
		114	.rtc_alarm_year_reg = DA9063_BB_REG_ALARM_Y,
		115	.rtc_count_secs_reg = DA9063_REG_COUNT_S,
		116	.rtc_count_year_reg = DA9063_REG_COUNT_Y,
		117	.rtc_event_reg = DA9063_REG_EVENT_A,
		118	/* MASKS */
		119	.rtc_enable_mask = DA9063_RTC_EN,
		120	.rtc_crystal_mask = DA9063_CRYSTAL,
		121	.rtc_enable_32k_crystal_reg = DA9063_REG_EN_32K,
		122	.rtc_event_alarm_mask = DA9063_E_ALARM,
		123	.rtc_alarm_on_mask = DA9063_ALARM_ON,
		124	.rtc_alarm_status_mask = DA9063_ALARM_STATUS_ALARM \|
		125	DA9063_ALARM_STATUS_TICK,
		126	.rtc_tick_on_mask = DA9063_TICK_ON,
		127	.rtc_ready_to_read_mask = DA9063_RTC_READ,
		128	.rtc_count_sec_mask = DA9063_COUNT_SEC_MASK,
		129	.rtc_count_min_mask = DA9063_COUNT_MIN_MASK,
		130	.rtc_count_hour_mask = DA9063_COUNT_HOUR_MASK,
		131	.rtc_count_day_mask = DA9063_COUNT_DAY_MASK,
		132	.rtc_count_month_mask = DA9063_COUNT_MONTH_MASK,
		133	.rtc_count_year_mask = DA9063_COUNT_YEAR_MASK,
		134	/* ALARM CONFIG */
		135	.rtc_data_start = RTC_SEC,
		136	.rtc_alarm_len = RTC_DATA_LEN,
		137	};
		138
		139	static const struct da9063_compatible_rtc_regmap da9062_aa_regs = {
		140	/* REGS */
		141	.rtc_enable_reg = DA9062AA_CONTROL_E,
		142	.rtc_alarm_secs_reg = DA9062AA_ALARM_S,
		143	.rtc_alarm_year_reg = DA9062AA_ALARM_Y,
		144	.rtc_count_secs_reg = DA9062AA_COUNT_S,
		145	.rtc_count_year_reg = DA9062AA_COUNT_Y,
		146	.rtc_event_reg = DA9062AA_EVENT_A,
		147	/* MASKS */
		148	.rtc_enable_mask = DA9062AA_RTC_EN_MASK,
		149	.rtc_crystal_mask = DA9062AA_CRYSTAL_MASK,
		150	.rtc_enable_32k_crystal_reg = DA9062AA_EN_32K,
		151	.rtc_event_alarm_mask = DA9062AA_M_ALARM_MASK,
		152	.rtc_alarm_on_mask = DA9062AA_ALARM_ON_MASK,
		153	.rtc_alarm_status_mask = (0x02 << 6),
		154	.rtc_tick_on_mask = DA9062AA_TICK_ON_MASK,
		155	.rtc_ready_to_read_mask = DA9062AA_RTC_READ_MASK,
		156	.rtc_count_sec_mask = DA9062AA_COUNT_SEC_MASK,
		157	.rtc_count_min_mask = DA9062AA_COUNT_MIN_MASK,
		158	.rtc_count_hour_mask = DA9062AA_COUNT_HOUR_MASK,
		159	.rtc_count_day_mask = DA9062AA_COUNT_DAY_MASK,
		160	.rtc_count_month_mask = DA9062AA_COUNT_MONTH_MASK,
		161	.rtc_count_year_mask = DA9062AA_COUNT_YEAR_MASK,
		162	/* ALARM CONFIG */
		163	.rtc_data_start = RTC_SEC,
		164	.rtc_alarm_len = RTC_DATA_LEN,
		165	};
		166
		167	static const struct of_device_id da9063_compatible_reg_id_table[] = {
		168	{ .compatible = "dlg,da9063-rtc", .data = &da9063_bb_regs },
		169	{ .compatible = "dlg,da9062-rtc", .data = &da9062_aa_regs },
		170	{ },
51	};	171	};
		172	MODULE_DEVICE_TABLE(of, da9063_compatible_reg_id_table);
52		173
53	static void da9063_data_to_tm(u8 data, struct rtc_time tm)	174	static void da9063_data_to_tm(u8 data, struct rtc_time tm,
		175	struct da9063_compatible_rtc *rtc)
54	{	176	{
55	tm->tm_sec = data[RTC_SEC] & DA9063_COUNT_SEC_MASK;	177	const struct da9063_compatible_rtc_regmap *config = rtc->config;
56	tm->tm_min = data[RTC_MIN] & DA9063_COUNT_MIN_MASK;	178
57	tm->tm_hour = data[RTC_HOUR] & DA9063_COUNT_HOUR_MASK;	179	tm->tm_sec = data[RTC_SEC] & config->rtc_count_sec_mask;
58	tm->tm_mday = data[RTC_DAY] & DA9063_COUNT_DAY_MASK;	180	tm->tm_min = data[RTC_MIN] & config->rtc_count_min_mask;
		181	tm->tm_hour = data[RTC_HOUR] & config->rtc_count_hour_mask;
		182	tm->tm_mday = data[RTC_DAY] & config->rtc_count_day_mask;
59	tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &	183	tm->tm_mon = MONTHS_FROM_DA9063(data[RTC_MONTH] &
60	DA9063_COUNT_MONTH_MASK);	184	config->rtc_count_month_mask);
61	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &	185	tm->tm_year = YEARS_FROM_DA9063(data[RTC_YEAR] &
62	DA9063_COUNT_YEAR_MASK);	186	config->rtc_count_year_mask);
63	}	187	}
64		188
65	static void da9063_tm_to_data(struct rtc_time tm, u8 data)	189	static void da9063_tm_to_data(struct rtc_time tm, u8 data,
		190	struct da9063_compatible_rtc *rtc)
66	{	191	{
67	data[RTC_SEC] &= ~DA9063_COUNT_SEC_MASK;	192	const struct da9063_compatible_rtc_regmap *config = rtc->config;
68	data[RTC_SEC] \|= tm->tm_sec & DA9063_COUNT_SEC_MASK;	193
		194	data[RTC_SEC] &= ~config->rtc_count_sec_mask;
		195	data[RTC_SEC] \|= tm->tm_sec & config->rtc_count_sec_mask;
69		196
70	data[RTC_MIN] &= ~DA9063_COUNT_MIN_MASK;	197	data[RTC_MIN] &= ~config->rtc_count_min_mask;
71	data[RTC_MIN] \|= tm->tm_min & DA9063_COUNT_MIN_MASK;	198	data[RTC_MIN] \|= tm->tm_min & config->rtc_count_min_mask;
72		199
73	data[RTC_HOUR] &= ~DA9063_COUNT_HOUR_MASK;	200	data[RTC_HOUR] &= ~config->rtc_count_hour_mask;
74	data[RTC_HOUR] \|= tm->tm_hour & DA9063_COUNT_HOUR_MASK;	201	data[RTC_HOUR] \|= tm->tm_hour & config->rtc_count_hour_mask;
75		202
76	data[RTC_DAY] &= ~DA9063_COUNT_DAY_MASK;	203	data[RTC_DAY] &= ~config->rtc_count_day_mask;
77	data[RTC_DAY] \|= tm->tm_mday & DA9063_COUNT_DAY_MASK;	204	data[RTC_DAY] \|= tm->tm_mday & config->rtc_count_day_mask;
78		205
79	data[RTC_MONTH] &= ~DA9063_COUNT_MONTH_MASK;	206	data[RTC_MONTH] &= ~config->rtc_count_month_mask;
80	data[RTC_MONTH] \|= MONTHS_TO_DA9063(tm->tm_mon) &	207	data[RTC_MONTH] \|= MONTHS_TO_DA9063(tm->tm_mon) &
81	DA9063_COUNT_MONTH_MASK;	208	config->rtc_count_month_mask;
82		209
83	data[RTC_YEAR] &= ~DA9063_COUNT_YEAR_MASK;	210	data[RTC_YEAR] &= ~config->rtc_count_year_mask;
84	data[RTC_YEAR] \|= YEARS_TO_DA9063(tm->tm_year) &	211	data[RTC_YEAR] \|= YEARS_TO_DA9063(tm->tm_year) &
85	DA9063_COUNT_YEAR_MASK;	212	config->rtc_count_year_mask;
86	}	213	}
87		214
88	static int da9063_rtc_stop_alarm(struct device *dev)	215	static int da9063_rtc_stop_alarm(struct device *dev)
89	{	216	{
90	struct da9063_rtc *rtc = dev_get_drvdata(dev);	217	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		218	const struct da9063_compatible_rtc_regmap *config = rtc->config;
91		219
92	return regmap_update_bits(rtc->hw->regmap, rtc->alarm_year,	220	return regmap_update_bits(rtc->regmap,
93	DA9063_ALARM_ON, 0);	221	config->rtc_alarm_year_reg,
		222	config->rtc_alarm_on_mask,
		223	0);
94	}	224	}
95		225
96	static int da9063_rtc_start_alarm(struct device *dev)	226	static int da9063_rtc_start_alarm(struct device *dev)
97	{	227	{
98	struct da9063_rtc *rtc = dev_get_drvdata(dev);	228	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		229	const struct da9063_compatible_rtc_regmap *config = rtc->config;
99		230
100	return regmap_update_bits(rtc->hw->regmap, rtc->alarm_year,	231	return regmap_update_bits(rtc->regmap,
101	DA9063_ALARM_ON, DA9063_ALARM_ON);	232	config->rtc_alarm_year_reg,
		233	config->rtc_alarm_on_mask,
		234	config->rtc_alarm_on_mask);
102	}	235	}
103		236
104	static int da9063_rtc_read_time(struct device dev, struct rtc_time tm)	237	static int da9063_rtc_read_time(struct device dev, struct rtc_time tm)
105	{	238	{
106	struct da9063_rtc *rtc = dev_get_drvdata(dev);	239	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		240	const struct da9063_compatible_rtc_regmap *config = rtc->config;
107	unsigned long tm_secs;	241	unsigned long tm_secs;
108	unsigned long al_secs;	242	unsigned long al_secs;
109	u8 data[RTC_DATA_LEN];	243	u8 data[RTC_DATA_LEN];
110	int ret;	244	int ret;
111		245
112	ret = regmap_bulk_read(rtc->hw->regmap, DA9063_REG_COUNT_S,	246	ret = regmap_bulk_read(rtc->regmap,
		247	config->rtc_count_secs_reg,
113	data, RTC_DATA_LEN);	248	data, RTC_DATA_LEN);
114	if (ret < 0) {	249	if (ret < 0) {
115	dev_err(dev, "Failed to read RTC time data: %d\n", ret);	250	dev_err(dev, "Failed to read RTC time data: %d\n", ret);
116	return ret;	251	return ret;
117	}	252	}
118		253
119	if (!(data[RTC_SEC] & DA9063_RTC_READ)) {	254	if (!(data[RTC_SEC] & config->rtc_ready_to_read_mask)) {
120	dev_dbg(dev, "RTC not yet ready to be read by the host\n");	255	dev_dbg(dev, "RTC not yet ready to be read by the host\n");
121	return -EINVAL;	256	return -EINVAL;
122	}	257	}
123		258
124	da9063_data_to_tm(data, tm);	259	da9063_data_to_tm(data, tm, rtc);
125		260
126	rtc_tm_to_time(tm, &tm_secs);	261	rtc_tm_to_time(tm, &tm_secs);
127	rtc_tm_to_time(&rtc->alarm_time, &al_secs);	262	rtc_tm_to_time(&rtc->alarm_time, &al_secs);
@@ -137,12 +272,14 @@ static int da9063_rtc_read_time(struct device dev, struct rtc_time tm) · 9 unmodified lines
137		272
138	static int da9063_rtc_set_time(struct device dev, struct rtc_time tm)	273	static int da9063_rtc_set_time(struct device dev, struct rtc_time tm)
139	{	274	{
140	struct da9063_rtc *rtc = dev_get_drvdata(dev);	275	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		276	const struct da9063_compatible_rtc_regmap *config = rtc->config;
141	u8 data[RTC_DATA_LEN];	277	u8 data[RTC_DATA_LEN];
142	int ret;	278	int ret;
143		279
144	da9063_tm_to_data(tm, data);	280	da9063_tm_to_data(tm, data, rtc);
145	ret = regmap_bulk_write(rtc->hw->regmap, DA9063_REG_COUNT_S,	281	ret = regmap_bulk_write(rtc->regmap,
		282	config->rtc_count_secs_reg,
146	data, RTC_DATA_LEN);	283	data, RTC_DATA_LEN);
147	if (ret < 0)	284	if (ret < 0)
148	dev_err(dev, "Failed to set RTC time data: %d\n", ret);	285	dev_err(dev, "Failed to set RTC time data: %d\n", ret);
@@ -152,26 +289,31 @@ static int da9063_rtc_set_time(struct device dev, struct rtc_time tm) · 3 unmodified lines
152		289
153	static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)	290	static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
154	{	291	{
155	struct da9063_rtc *rtc = dev_get_drvdata(dev);	292	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		293	const struct da9063_compatible_rtc_regmap *config = rtc->config;
156	u8 data[RTC_DATA_LEN];	294	u8 data[RTC_DATA_LEN];
157	int ret;	295	int ret;
158	unsigned int val;	296	unsigned int val;
159		297
160	data[RTC_SEC] = 0;	298	data[RTC_SEC] = 0;
161	ret = regmap_bulk_read(rtc->hw->regmap, rtc->alarm_start,	299	ret = regmap_bulk_read(rtc->regmap,
162	&data[rtc->data_start], rtc->alarm_len);	300	config->rtc_alarm_secs_reg,
		301	&data[config->rtc_data_start],
		302	config->rtc_alarm_len);
163	if (ret < 0)	303	if (ret < 0)
164	return ret;	304	return ret;
165		305
166	da9063_data_to_tm(data, &alrm->time);	306	da9063_data_to_tm(data, &alrm->time, rtc);
167		307
168	alrm->enabled = !!(data[RTC_YEAR] & DA9063_ALARM_ON);	308	alrm->enabled = !!(data[RTC_YEAR] & config->rtc_alarm_on_mask);
169		309
170	ret = regmap_read(rtc->hw->regmap, DA9063_REG_EVENT_A, &val);	310	ret = regmap_read(rtc->regmap,
		311	config->rtc_event_reg,
		312	&val);
171	if (ret < 0)	313	if (ret < 0)
172	return ret;	314	return ret;
173		315
174	if (val & (DA9063_E_ALARM))	316	if (val & config->rtc_event_alarm_mask)
175	alrm->pending = 1;	317	alrm->pending = 1;
176	else	318	else
177	alrm->pending = 0;	319	alrm->pending = 0;
@@ -181,11 +323,12 @@ static int da9063_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm) · 3 unmodified lines
181		323
182	static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)	324	static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
183	{	325	{
184	struct da9063_rtc *rtc = dev_get_drvdata(dev);	326	struct da9063_compatible_rtc *rtc = dev_get_drvdata(dev);
		327	const struct da9063_compatible_rtc_regmap *config = rtc->config;
185	u8 data[RTC_DATA_LEN];	328	u8 data[RTC_DATA_LEN];
186	int ret;	329	int ret;
187		330
188	da9063_tm_to_data(&alrm->time, data);	331	da9063_tm_to_data(&alrm->time, data, rtc);
189		332
190	ret = da9063_rtc_stop_alarm(dev);	333	ret = da9063_rtc_stop_alarm(dev);
191	if (ret < 0) {	334	if (ret < 0) {
@@ -193,14 +336,16 @@ static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm) · 1 unmodified line
193	return ret;	336	return ret;
194	}	337	}
195		338
196	ret = regmap_bulk_write(rtc->hw->regmap, rtc->alarm_start,	339	ret = regmap_bulk_write(rtc->regmap,
197	&data[rtc->data_start], rtc->alarm_len);	340	config->rtc_alarm_secs_reg,
		341	&data[config->rtc_data_start],
		342	config->rtc_alarm_len);
198	if (ret < 0) {	343	if (ret < 0) {
199	dev_err(dev, "Failed to write alarm: %d\n", ret);	344	dev_err(dev, "Failed to write alarm: %d\n", ret);
200	return ret;	345	return ret;
201	}	346	}
202		347
203	da9063_data_to_tm(data, &rtc->alarm_time);	348	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
204		349
205	if (alrm->enabled) {	350	if (alrm->enabled) {
206	ret = da9063_rtc_start_alarm(dev);	351	ret = da9063_rtc_start_alarm(dev);
@@ -213,7 +358,8 @@ static int da9063_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm) · 6 unmodified lines
213	return ret;	358	return ret;
214	}	359	}
215		360
216	static int da9063_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)	361	static int da9063_rtc_alarm_irq_enable(struct device *dev,
		362	unsigned int enabled)
217	{	363	{
218	if (enabled)	364	if (enabled)
219	return da9063_rtc_start_alarm(dev);	365	return da9063_rtc_start_alarm(dev);
@@ -223,10 +369,13 @@ static int da9063_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) · 3 unmodified lines
223		369
224	static irqreturn_t da9063_alarm_event(int irq, void *data)	370	static irqreturn_t da9063_alarm_event(int irq, void *data)
225	{	371	{
226	struct da9063_rtc *rtc = data;	372	struct da9063_compatible_rtc *rtc = data;
		373	const struct da9063_compatible_rtc_regmap *config = rtc->config;
227		374
228	regmap_update_bits(rtc->hw->regmap, rtc->alarm_year,	375	regmap_update_bits(rtc->regmap,
229	DA9063_ALARM_ON, 0);	376	config->rtc_alarm_year_reg,
		377	config->rtc_alarm_on_mask,
		378	0);
230		379
231	rtc->rtc_sync = true;	380	rtc->rtc_sync = true;
232	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);	381	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF \| RTC_AF);
@@ -244,72 +393,92 @@ static const struct rtc_class_ops da9063_rtc_ops = { · 11 unmodified lines
244		393
245	static int da9063_rtc_probe(struct platform_device *pdev)	394	static int da9063_rtc_probe(struct platform_device *pdev)
246	{	395	{
247	struct da9063 *da9063 = dev_get_drvdata(pdev->dev.parent);	396	struct da9063_compatible_rtc *rtc;
248	struct da9063_rtc *rtc;	397	const struct da9063_compatible_rtc_regmap *config;
		398	const struct of_device_id *match;
249	int irq_alarm;	399	int irq_alarm;
250	u8 data[RTC_DATA_LEN];	400	u8 data[RTC_DATA_LEN];
251	int ret;	401	int ret;
252		402
253	ret = regmap_update_bits(da9063->regmap, DA9063_REG_CONTROL_E,	403	if (!pdev->dev.of_node)
254	DA9063_RTC_EN, DA9063_RTC_EN);	404	return -ENXIO;
255	if (ret < 0) {
256	dev_err(&pdev->dev, "Failed to enable RTC\n");
257	goto err;
258	}
259		405
260	ret = regmap_update_bits(da9063->regmap, DA9063_REG_EN_32K,	406	match = of_match_node(da9063_compatible_reg_id_table,
261	DA9063_CRYSTAL, DA9063_CRYSTAL);	407	pdev->dev.of_node);
262	if (ret < 0) {
263	dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
264	goto err;
265	}
266		408
267	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);	409	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
268	if (!rtc)	410	if (!rtc)
269	return -ENOMEM;	411	return -ENOMEM;
270		412
271	if (da9063->variant_code == PMIC_DA9063_AD) {	413	rtc->config = match->data;
272	rtc->alarm_year = DA9063_AD_REG_ALARM_Y;	414	if (of_device_is_compatible(pdev->dev.of_node, "dlg,da9063-rtc")) {
273	rtc->alarm_start = DA9063_AD_REG_ALARM_MI;	415	struct da9063 *chip = dev_get_drvdata(pdev->dev.parent);
274	rtc->alarm_len = RTC_ALARM_DATA_LEN;	416
275	rtc->data_start = RTC_MIN;	417	if (chip->variant_code == PMIC_DA9063_AD)
276	} else {	418	rtc->config = &da9063_ad_regs;
277	rtc->alarm_year = DA9063_BB_REG_ALARM_Y;
278	rtc->alarm_start = DA9063_BB_REG_ALARM_S;
279	rtc->alarm_len = RTC_DATA_LEN;
280	rtc->data_start = RTC_SEC;
281	}	419	}
282		420
283	ret = regmap_update_bits(da9063->regmap, rtc->alarm_start,	421	rtc->regmap = dev_get_regmap(pdev->dev.parent, NULL);
284	DA9063_ALARM_STATUS_TICK \| DA9063_ALARM_STATUS_ALARM,	422	if (!rtc->regmap) {
285	0);	423	dev_warn(&pdev->dev, "Parent regmap unavailable.\n");
		424	return -ENXIO;
		425	}
		426
		427	config = rtc->config;
		428	ret = regmap_update_bits(rtc->regmap,
		429	config->rtc_enable_reg,
		430	config->rtc_enable_mask,
		431	config->rtc_enable_mask);
		432	if (ret < 0) {
		433	dev_err(&pdev->dev, "Failed to enable RTC\n");
		434	return ret;
		435	}
		436
		437	ret = regmap_update_bits(rtc->regmap,
		438	config->rtc_enable_32k_crystal_reg,
		439	config->rtc_crystal_mask,
		440	config->rtc_crystal_mask);
		441	if (ret < 0) {
		442	dev_err(&pdev->dev, "Failed to run 32kHz oscillator\n");
		443	return ret;
		444	}
		445
		446	ret = regmap_update_bits(rtc->regmap,
		447	config->rtc_alarm_secs_reg,
		448	config->rtc_alarm_status_mask,
		449	0);
286	if (ret < 0) {	450	if (ret < 0) {
287	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");	451	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
288	goto err;	452	return ret;
289	}	453	}
290		454
291	ret = regmap_update_bits(da9063->regmap, rtc->alarm_start,	455	ret = regmap_update_bits(rtc->regmap,
		456	config->rtc_alarm_secs_reg,
292	DA9063_ALARM_STATUS_ALARM,	457	DA9063_ALARM_STATUS_ALARM,
293	DA9063_ALARM_STATUS_ALARM);	458	DA9063_ALARM_STATUS_ALARM);
294	if (ret < 0) {	459	if (ret < 0) {
295	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");	460	dev_err(&pdev->dev, "Failed to access RTC alarm register\n");
296	goto err;	461	return ret;
297	}	462	}
298		463
299	ret = regmap_update_bits(da9063->regmap, rtc->alarm_year,	464	ret = regmap_update_bits(rtc->regmap,
300	DA9063_TICK_ON, 0);	465	config->rtc_alarm_year_reg,
		466	config->rtc_tick_on_mask,
		467	0);
301	if (ret < 0) {	468	if (ret < 0) {
302	dev_err(&pdev->dev, "Failed to disable TICKs\n");	469	dev_err(&pdev->dev, "Failed to disable TICKs\n");
303	goto err;	470	return ret;
304	}	471	}
305		472
306	data[RTC_SEC] = 0;	473	data[RTC_SEC] = 0;
307	ret = regmap_bulk_read(da9063->regmap, rtc->alarm_start,	474	ret = regmap_bulk_read(rtc->regmap,
308	&data[rtc->data_start], rtc->alarm_len);	475	config->rtc_alarm_secs_reg,
		476	&data[config->rtc_data_start],
		477	config->rtc_alarm_len);
309	if (ret < 0) {	478	if (ret < 0) {
310	dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",	479	dev_err(&pdev->dev, "Failed to read initial alarm data: %d\n",
311	ret);	480	ret);
312	goto err;	481	return ret;
313	}	482	}
314		483
315	platform_set_drvdata(pdev, rtc);	484	platform_set_drvdata(pdev, rtc);
@@ -322,18 +491,16 @@ static int da9063_rtc_probe(struct platform_device *pdev) · 6 unmodified lines
322	if (ret) {	491	if (ret) {
323	dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",	492	dev_err(&pdev->dev, "Failed to request ALARM IRQ %d: %d\n",
324	irq_alarm, ret);	493	irq_alarm, ret);
325	goto err;	494	return ret;
326	}	495	}
327		496
328	rtc->hw = da9063;
329	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, DA9063_DRVNAME_RTC,	497	rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, DA9063_DRVNAME_RTC,
330	&da9063_rtc_ops, THIS_MODULE);	498	&da9063_rtc_ops, THIS_MODULE);
331	if (IS_ERR(rtc->rtc_dev))	499	if (IS_ERR(rtc->rtc_dev))
332	return PTR_ERR(rtc->rtc_dev);	500	return PTR_ERR(rtc->rtc_dev);
333		501
334	da9063_data_to_tm(data, &rtc->alarm_time);	502	da9063_data_to_tm(data, &rtc->alarm_time, rtc);
335	rtc->rtc_sync = false;	503	rtc->rtc_sync = false;
336	err:
337	return ret;	504	return ret;
338	}	505	}
339		506
@@ -341,6 +508,7 @@ static struct platform_driver da9063_rtc_driver = { · 1 unmodified line
341	.probe = da9063_rtc_probe,	508	.probe = da9063_rtc_probe,
342	.driver = {	509	.driver = {
343	.name = DA9063_DRVNAME_RTC,	510	.name = DA9063_DRVNAME_RTC,
		511	.of_match_table = da9063_compatible_reg_id_table,
344	},	512	},
345	};	513	};
346		514

drivers/rtc/rtc-dev.c+1−0

@@ -477,6 +477,7 @@ void rtc_dev_prepare(struct rtc_device *rtc) · 476 unmodified lines
477		477
478	cdev_init(&rtc->char_dev, &rtc_dev_fops);	478	cdev_init(&rtc->char_dev, &rtc_dev_fops);
479	rtc->char_dev.owner = rtc->owner;	479	rtc->char_dev.owner = rtc->owner;
		480	rtc->char_dev.kobj.parent = &rtc->dev.kobj;
480	}	481	}
481		482
482	void rtc_dev_add_device(struct rtc_device *rtc)	483	void rtc_dev_add_device(struct rtc_device *rtc)

drivers/rtc/rtc-ds1305.c+0−18

@@ -538,15 +538,6 @@ ds1305_nvram_read(struct file filp, struct kobject kobj, · 537 unmodified lines
538		538
539	spi = container_of(kobj, struct spi_device, dev.kobj);	539	spi = container_of(kobj, struct spi_device, dev.kobj);
540		540
541	if (unlikely(off >= DS1305_NVRAM_LEN))
542	return 0;
543	if (count >= DS1305_NVRAM_LEN)
544	count = DS1305_NVRAM_LEN;
545	if ((off + count) > DS1305_NVRAM_LEN)
546	count = DS1305_NVRAM_LEN - off;
547	if (unlikely(!count))
548	return count;
549
550	addr = DS1305_NVRAM + off;	541	addr = DS1305_NVRAM + off;
551	msg_init(&m, x, &addr, count, NULL, buf);	542	msg_init(&m, x, &addr, count, NULL, buf);
552		543
@@ -569,15 +560,6 @@ ds1305_nvram_write(struct file filp, struct kobject kobj, · 16 unmodified lines
569		560
570	spi = container_of(kobj, struct spi_device, dev.kobj);	561	spi = container_of(kobj, struct spi_device, dev.kobj);
571		562
572	if (unlikely(off >= DS1305_NVRAM_LEN))
573	return -EFBIG;
574	if (count >= DS1305_NVRAM_LEN)
575	count = DS1305_NVRAM_LEN;
576	if ((off + count) > DS1305_NVRAM_LEN)
577	count = DS1305_NVRAM_LEN - off;
578	if (unlikely(!count))
579	return count;
580
581	addr = (DS1305_WRITE \| DS1305_NVRAM) + off;	563	addr = (DS1305_WRITE \| DS1305_NVRAM) + off;
582	msg_init(&m, x, &addr, count, buf, NULL);	564	msg_init(&m, x, &addr, count, buf, NULL);
583		565

drivers/rtc/rtc-ds1307.c+56−64

@@ -11,14 +11,17 @@ · 10 unmodified lines
11	* published by the Free Software Foundation.	11	* published by the Free Software Foundation.
12	*/	12	*/
13		13
14	#include <linux/module.h>	14	#include <linux/bcd.h>
		15	#include <linux/i2c.h>
15	#include <linux/init.h>	16	#include <linux/init.h>
		17	#include <linux/module.h>
		18	#include <linux/of_device.h>
		19	#include <linux/of_irq.h>
		20	#include <linux/pm_wakeirq.h>
		21	#include <linux/rtc/ds1307.h>
		22	#include <linux/rtc.h>
16	#include <linux/slab.h>	23	#include <linux/slab.h>
17	#include <linux/i2c.h>
18	#include <linux/string.h>	24	#include <linux/string.h>
19	#include <linux/rtc.h>
20	#include <linux/bcd.h>
21	#include <linux/rtc/ds1307.h>
22		25
23	/*	26	/*
24	* We can't determine type by probing, but if we expect pre-Linux code	27	* We can't determine type by probing, but if we expect pre-Linux code
@@ -114,7 +117,7 @@ struct ds1307 { · 89 unmodified lines
114	#define HAS_ALARM 1 /* bit 1 == irq claimed */	117	#define HAS_ALARM 1 /* bit 1 == irq claimed */
115	struct i2c_client *client;	118	struct i2c_client *client;
116	struct rtc_device *rtc;	119	struct rtc_device *rtc;
117	struct work_struct work;	120	int wakeirq;
118	s32 (read_block_data)(const struct i2c_client client, u8 command,	121	s32 (read_block_data)(const struct i2c_client client, u8 command,
119	u8 length, u8 *values);	122	u8 length, u8 *values);
120	s32 (write_block_data)(const struct i2c_client client, u8 command,	123	s32 (write_block_data)(const struct i2c_client client, u8 command,
@@ -311,27 +314,17 @@ static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client, · 190 unmodified lines
311	/----------------------------------------------------------------------/	314	/----------------------------------------------------------------------/
312		315
313	/*	316	/*
314	* The IRQ logic includes a "real" handler running in IRQ context just
315	* long enough to schedule this workqueue entry. We need a task context
316	* to talk to the RTC, since I2C I/O calls require that; and disable the
317	* IRQ until we clear its status on the chip, so that this handler can
318	* work with any type of triggering (not just falling edge).
319	*
320	* The ds1337 and ds1339 both have two alarms, but we only use the first	317	* The ds1337 and ds1339 both have two alarms, but we only use the first
321	* one (with a "seconds" field). For ds1337 we expect nINTA is our alarm	318	* one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
322	* signal; ds1339 chips have only one alarm signal.	319	* signal; ds1339 chips have only one alarm signal.
323	*/	320	*/
324	static void ds1307_work(struct work_struct *work)	321	static irqreturn_t ds1307_irq(int irq, void *dev_id)
325	{	322	{
326	struct ds1307 *ds1307;	323	struct i2c_client *client = dev_id;
327	struct i2c_client *client;	324	struct ds1307 *ds1307 = i2c_get_clientdata(client);
328	struct mutex *lock;	325	struct mutex *lock = &ds1307->rtc->ops_lock;
329	int stat, control;	326	int stat, control;
330		327
331	ds1307 = container_of(work, struct ds1307, work);
332	client = ds1307->client;
333	lock = &ds1307->rtc->ops_lock;
334
335	mutex_lock(lock);	328	mutex_lock(lock);
336	stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);	329	stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
337	if (stat < 0)	330	if (stat < 0)
@@ -352,18 +345,8 @@ static void ds1307_work(struct work_struct *work) · 14 unmodified lines
352	}	345	}
353		346
354	out:	347	out:
355	if (test_bit(HAS_ALARM, &ds1307->flags))
356	enable_irq(client->irq);
357	mutex_unlock(lock);	348	mutex_unlock(lock);
358	}
359		349
360	static irqreturn_t ds1307_irq(int irq, void *dev_id)
361	{
362	struct i2c_client *client = dev_id;
363	struct ds1307 *ds1307 = i2c_get_clientdata(client);
364
365	disable_irq_nosync(irq);
366	schedule_work(&ds1307->work);
367	return IRQ_HANDLED;	350	return IRQ_HANDLED;
368	}	351	}
369		352
@@ -634,13 +617,14 @@ static const struct rtc_class_ops ds13xx_rtc_ops = { · 264 unmodified lines
634	MCP794XX_BIT_ALMX_C1 \| \	617	MCP794XX_BIT_ALMX_C1 \| \
635	MCP794XX_BIT_ALMX_C2)	618	MCP794XX_BIT_ALMX_C2)
636		619
637	static void mcp794xx_work(struct work_struct *work)	620	static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
638	{	621	{
639	struct ds1307 *ds1307 = container_of(work, struct ds1307, work);	622	struct i2c_client *client = dev_id;
640	struct i2c_client *client = ds1307->client;	623	struct ds1307 *ds1307 = i2c_get_clientdata(client);
		624	struct mutex *lock = &ds1307->rtc->ops_lock;
641	int reg, ret;	625	int reg, ret;
642		626
643	mutex_lock(&ds1307->rtc->ops_lock);	627	mutex_lock(lock);
644		628
645	/* Check and clear alarm 0 interrupt flag. */	629	/* Check and clear alarm 0 interrupt flag. */
646	reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);	630	reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
@@ -665,9 +649,9 @@ static void mcp794xx_work(struct work_struct *work) · 18 unmodified lines
665	rtc_update_irq(ds1307->rtc, 1, RTC_AF \| RTC_IRQF);	649	rtc_update_irq(ds1307->rtc, 1, RTC_AF \| RTC_IRQF);
666		650
667	out:	651	out:
668	if (test_bit(HAS_ALARM, &ds1307->flags))	652	mutex_unlock(lock);
669	enable_irq(client->irq);	653
670	mutex_unlock(&ds1307->rtc->ops_lock);	654	return IRQ_HANDLED;
671	}	655	}
672		656
673	static int mcp794xx_read_alarm(struct device dev, struct rtc_wkalrm t)	657	static int mcp794xx_read_alarm(struct device dev, struct rtc_wkalrm t)
@@ -798,13 +782,6 @@ ds1307_nvram_read(struct file filp, struct kobject kobj, · 124 unmodified lines
798	client = kobj_to_i2c_client(kobj);	782	client = kobj_to_i2c_client(kobj);
799	ds1307 = i2c_get_clientdata(client);	783	ds1307 = i2c_get_clientdata(client);
800		784
801	if (unlikely(off >= ds1307->nvram->size))
802	return 0;
803	if ((off + count) > ds1307->nvram->size)
804	count = ds1307->nvram->size - off;
805	if (unlikely(!count))
806	return count;
807
808	result = ds1307->read_block_data(client, ds1307->nvram_offset + off,	785	result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
809	count, buf);	786	count, buf);
810	if (result < 0)	787	if (result < 0)
@@ -824,13 +801,6 @@ ds1307_nvram_write(struct file filp, struct kobject kobj, · 13 unmodified lines
824	client = kobj_to_i2c_client(kobj);	801	client = kobj_to_i2c_client(kobj);
825	ds1307 = i2c_get_clientdata(client);	802	ds1307 = i2c_get_clientdata(client);
826		803
827	if (unlikely(off >= ds1307->nvram->size))
828	return -EFBIG;
829	if ((off + count) > ds1307->nvram->size)
830	count = ds1307->nvram->size - off;
831	if (unlikely(!count))
832	return count;
833
834	result = ds1307->write_block_data(client, ds1307->nvram_offset + off,	804	result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
835	count, buf);	805	count, buf);
836	if (result < 0) {	806	if (result < 0) {
@@ -896,6 +866,8 @@ static int ds1307_probe(struct i2c_client *client, · 59 unmodified lines
896	bool want_irq = false;	866	bool want_irq = false;
897	unsigned char *buf;	867	unsigned char *buf;
898	struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);	868	struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
		869	irq_handler_t irq_handler = ds1307_irq;
		870
899	static const int bbsqi_bitpos[] = {	871	static const int bbsqi_bitpos[] = {
900	[ds_1337] = 0,	872	[ds_1337] = 0,
901	[ds_1339] = DS1339_BIT_BBSQI,	873	[ds_1339] = DS1339_BIT_BBSQI,
@@ -962,8 +934,6 @@ static int ds1307_probe(struct i2c_client *client, · 60 unmodified lines
962	* running on Vbackup (BBSQI/BBSQW)	934	* running on Vbackup (BBSQI/BBSQW)
963	*/	935	*/
964	if (ds1307->client->irq > 0 && chip->alarm) {	936	if (ds1307->client->irq > 0 && chip->alarm) {
965	INIT_WORK(&ds1307->work, ds1307_work);
966
967	ds1307->regs[0] \|= DS1337_BIT_INTCN	937	ds1307->regs[0] \|= DS1337_BIT_INTCN
968	\| bbsqi_bitpos[ds1307->type];	938	\| bbsqi_bitpos[ds1307->type];
969	ds1307->regs[0] &= ~(DS1337_BIT_A2IE \| DS1337_BIT_A1IE);	939	ds1307->regs[0] &= ~(DS1337_BIT_A2IE \| DS1337_BIT_A1IE);
@@ -1053,7 +1023,7 @@ static int ds1307_probe(struct i2c_client *client, · 83 unmodified lines
1053	case mcp794xx:	1023	case mcp794xx:
1054	rtc_ops = &mcp794xx_rtc_ops;	1024	rtc_ops = &mcp794xx_rtc_ops;
1055	if (ds1307->client->irq > 0 && chip->alarm) {	1025	if (ds1307->client->irq > 0 && chip->alarm) {
1056	INIT_WORK(&ds1307->work, mcp794xx_work);	1026	irq_handler = mcp794xx_irq;
1057	want_irq = true;	1027	want_irq = true;
1058	}	1028	}
1059	break;	1029	break;
@@ -1176,18 +1146,43 @@ read_rtc: · 116 unmodified lines
1176	}	1146	}
1177		1147
1178	if (want_irq) {	1148	if (want_irq) {
1179	err = request_irq(client->irq, ds1307_irq, IRQF_SHARED,	1149	struct device_node *node = client->dev.of_node;
1180	ds1307->rtc->name, client);	1150
		1151	err = devm_request_threaded_irq(&client->dev,
		1152	client->irq, NULL, irq_handler,
		1153	IRQF_SHARED \| IRQF_ONESHOT,
		1154	ds1307->rtc->name, client);
1181	if (err) {	1155	if (err) {
1182	client->irq = 0;	1156	client->irq = 0;
1183	dev_err(&client->dev, "unable to request IRQ!\n");	1157	dev_err(&client->dev, "unable to request IRQ!\n");
1184	} else {	1158	goto no_irq;
		1159	}
		1160
		1161	set_bit(HAS_ALARM, &ds1307->flags);
		1162	dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
		1163
		1164	/* Currently supported by OF code only! */
		1165	if (!node)
		1166	goto no_irq;
		1167
		1168	err = of_irq_get(node, 1);
		1169	if (err <= 0) {
		1170	if (err == -EPROBE_DEFER)
		1171	goto exit;
		1172	goto no_irq;
		1173	}
		1174	ds1307->wakeirq = err;
1185		1175
1186	set_bit(HAS_ALARM, &ds1307->flags);	1176	err = dev_pm_set_dedicated_wake_irq(&client->dev,
1187	dev_dbg(&client->dev, "got IRQ %d\n", client->irq);	1177	ds1307->wakeirq);
		1178	if (err) {
		1179	dev_err(&client->dev, "unable to setup wakeIRQ %d!\n",
		1180	err);
		1181	goto exit;
1188	}	1182	}
1189	}	1183	}
1190		1184
		1185	no_irq:
1191	if (chip->nvram_size) {	1186	if (chip->nvram_size) {
1192		1187
1193	ds1307->nvram = devm_kzalloc(&client->dev,	1188	ds1307->nvram = devm_kzalloc(&client->dev,
@@ -1231,10 +1226,8 @@ static int ds1307_remove(struct i2c_client *client) · 37 unmodified lines
1231	{	1226	{
1232	struct ds1307 *ds1307 = i2c_get_clientdata(client);	1227	struct ds1307 *ds1307 = i2c_get_clientdata(client);
1233		1228
1234	if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {	1229	if (ds1307->wakeirq)
1235	free_irq(client->irq, client);	1230	dev_pm_clear_wake_irq(&client->dev);
1236	cancel_work_sync(&ds1307->work);
1237	}
1238		1231
1239	if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))	1232	if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1240	sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);	1233	sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
@@ -1245,7 +1238,6 @@ static int ds1307_remove(struct i2c_client *client) · 4 unmodified lines
1245	static struct i2c_driver ds1307_driver = {	1238	static struct i2c_driver ds1307_driver = {
1246	.driver = {	1239	.driver = {
1247	.name = "rtc-ds1307",	1240	.name = "rtc-ds1307",
1248	.owner = THIS_MODULE,
1249	},	1241	},
1250	.probe = ds1307_probe,	1242	.probe = ds1307_probe,
1251	.remove = ds1307_remove,	1243	.remove = ds1307_remove,

drivers/rtc/rtc-ds1343.c+0−12

 	struct device *dev = kobj_to_dev(kobj);
 	struct ds1343_priv *priv = dev_get_drvdata(dev);
-	if (unlikely(!count))
-		return count;
-	if ((count + off) > DS1343_NVRAM_LEN)
-		count = DS1343_NVRAM_LEN - off;
 	address = DS1343_NVRAM + off;
 	ret = regmap_bulk_write(priv->map, address, buf, count);
 	struct device *dev = kobj_to_dev(kobj);
 	struct ds1343_priv *priv = dev_get_drvdata(dev);
-	if (unlikely(!count))
-		return count;
-	if ((count + off) > DS1343_NVRAM_LEN)
-		count = DS1343_NVRAM_LEN - off;
 	address = DS1343_NVRAM + off;
 	ret = regmap_bulk_read(priv->map, address, buf, count);

drivers/rtc/rtc-ds1374.c+2−5

 {
 	struct ds1374 *ds1374 = i2c_get_clientdata(client);
 #ifdef CONFIG_RTC_DRV_DS1374_WDT
-	int res;
 	misc_deregister(&ds1374_miscdev);
 	ds1374_miscdev.parent = NULL;
 	unregister_reboot_notifier(&ds1374_wdt_notifier);
 {
 	struct i2c_client *client = to_i2c_client(dev);
-	if (client->irq >= 0 && device_may_wakeup(&client->dev))
+	if (client->irq > 0 && device_may_wakeup(&client->dev))
 		enable_irq_wake(client->irq);
 	return 0;
 }
 {
 	struct i2c_client *client = to_i2c_client(dev);
-	if (client->irq >= 0 && device_may_wakeup(&client->dev))
+	if (client->irq > 0 && device_may_wakeup(&client->dev))
 		disable_irq_wake(client->irq);
 	return 0;
 }
 static struct i2c_driver ds1374_driver = {
 	.driver = {
 		.name = "rtc-ds1374",
-		.owner = THIS_MODULE,
 		.pm = &ds1374_pm,
 	},
 	.probe = ds1374_probe,

drivers/rtc/rtc-ds1511.c+5−37

 #define DS1511_KIE	0x04
 #define DS1511_WDE	0x02
 #define DS1511_WDS	0x01
-#define DS1511_RAM_MAX	0xff
+#define DS1511_RAM_MAX	0x100
 #define RTC_CMD		DS1511_CONTROL_B
 #define RTC_CMD1	DS1511_CONTROL_A
 	/*
 	 * set wdog enable and wdog 'steering' bit to issue a reset
 	 */
-	rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD);
+	rtc_write(rtc_read(RTC_CMD) | DS1511_WDE | DS1511_WDS, RTC_CMD);
 }
 void
 {
 	ssize_t count;
-	/*
-	 * if count is more than one, turn on "burst" mode
-	 * turn it off when you're done
-	 */
-	if (size > 1)
-		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
-	if (pos > DS1511_RAM_MAX)
-		pos = DS1511_RAM_MAX;
-	if (size + pos > DS1511_RAM_MAX + 1)
-		size = DS1511_RAM_MAX - pos + 1;
 	rtc_write(pos, DS1511_RAMADDR_LSB);
-	for (count = 0; size > 0; count++, size--)
+	for (count = 0; count < size; count++)
 		*buf++ = rtc_read(DS1511_RAMDATA);
-	if (count > 1)
-		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
 	return count;
 }
 {
 	ssize_t count;
-	/*
-	 * if count is more than one, turn on "burst" mode
-	 * turn it off when you're done
-	 */
-	if (size > 1)
-		rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD);
-	if (pos > DS1511_RAM_MAX)
-		pos = DS1511_RAM_MAX;
-	if (size + pos > DS1511_RAM_MAX + 1)
-		size = DS1511_RAM_MAX - pos + 1;
 	rtc_write(pos, DS1511_RAMADDR_LSB);
-	for (count = 0; size > 0; count++, size--)
+	for (count = 0; count < size; count++)
 		rtc_write(*buf++, DS1511_RAMDATA);
-	if (count > 1)
-		rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD);
 	return count;
 }
 	/*
 	 * turn on the clock and the crystal, etc.
 	 */
-	rtc_write(0, RTC_CMD);
+	rtc_write(DS1511_BME, RTC_CMD);
 	rtc_write(0, RTC_CMD1);
 	/*
 	 * clear the wdog counter

drivers/rtc/rtc-ds1553.c+2−2

@@ -245,7 +245,7 @@ static ssize_t ds1553_nvram_read(struct file filp, struct kobject kobj, · 244 unmodified lines
245	void __iomem *ioaddr = pdata->ioaddr;	245	void __iomem *ioaddr = pdata->ioaddr;
246	ssize_t count;	246	ssize_t count;
247		247
248	for (count = 0; size > 0 && pos < RTC_OFFSET; count++, size--)	248	for (count = 0; count < size; count++)
249	*buf++ = readb(ioaddr + pos++);	249	*buf++ = readb(ioaddr + pos++);
250	return count;	250	return count;
251	}	251	}
@@ -260,7 +260,7 @@ static ssize_t ds1553_nvram_write(struct file filp, struct kobject kobj, · 8 unmodified lines
260	void __iomem *ioaddr = pdata->ioaddr;	260	void __iomem *ioaddr = pdata->ioaddr;
261	ssize_t count;	261	ssize_t count;
262		262
263	for (count = 0; size > 0 && pos < RTC_OFFSET; count++, size--)	263	for (count = 0; count < size; count++)
264	writeb(*buf++, ioaddr + pos++);	264	writeb(*buf++, ioaddr + pos++);
265	return count;	265	return count;
266	}	266	}

drivers/rtc/rtc-ds1685.c+1−21

@@ -2145,27 +2145,7 @@ static struct platform_driver ds1685_rtc_driver = { · 2144 unmodified lines
2145	.probe = ds1685_rtc_probe,	2145	.probe = ds1685_rtc_probe,
2146	.remove = ds1685_rtc_remove,	2146	.remove = ds1685_rtc_remove,
2147	};	2147	};
2148		2148	module_platform_driver(ds1685_rtc_driver);
2149	/**
2150	* ds1685_rtc_init - rtc module init.
2151	*/
2152	static int __init
2153	ds1685_rtc_init(void)
2154	{
2155	return platform_driver_register(&ds1685_rtc_driver);
2156	}
2157
2158	/**
2159	* ds1685_rtc_exit - rtc module exit.
2160	*/
2161	static void __exit
2162	ds1685_rtc_exit(void)
2163	{
2164	platform_driver_unregister(&ds1685_rtc_driver);
2165	}
2166
2167	module_init(ds1685_rtc_init);
2168	module_exit(ds1685_rtc_exit);
2169	/* ----------------------------------------------------------------------- */	2149	/* ----------------------------------------------------------------------- */
2170		2150
2171		2151

drivers/rtc/rtc-ds1742.c+2−2

@@ -134,7 +134,7 @@ static ssize_t ds1742_nvram_read(struct file filp, struct kobject kobj, · 133 unmodified lines
134	void __iomem *ioaddr = pdata->ioaddr_nvram;	134	void __iomem *ioaddr = pdata->ioaddr_nvram;
135	ssize_t count;	135	ssize_t count;
136		136
137	for (count = 0; size > 0 && pos < pdata->size_nvram; count++, size--)	137	for (count = 0; count < size; count++)
138	*buf++ = readb(ioaddr + pos++);	138	*buf++ = readb(ioaddr + pos++);
139	return count;	139	return count;
140	}	140	}
@@ -149,7 +149,7 @@ static ssize_t ds1742_nvram_write(struct file filp, struct kobject kobj, · 8 unmodified lines
149	void __iomem *ioaddr = pdata->ioaddr_nvram;	149	void __iomem *ioaddr = pdata->ioaddr_nvram;
150	ssize_t count;	150	ssize_t count;
151		151
152	for (count = 0; size > 0 && pos < pdata->size_nvram; count++, size--)	152	for (count = 0; count < size; count++)
153	writeb(*buf++, ioaddr + pos++);	153	writeb(*buf++, ioaddr + pos++);
154	return count;	154	return count;
155	}	155	}

drivers/rtc/rtc-ds3232.c+5−3

 {
 	struct ds3232 *ds3232 = i2c_get_clientdata(client);
-	if (client->irq >= 0) {
+	if (client->irq > 0) {
 		mutex_lock(&ds3232->mutex);
 		ds3232->exiting = 1;
 		mutex_unlock(&ds3232->mutex);
 	if (device_can_wakeup(dev)) {
 		ds3232->suspended = true;
-		irq_set_irq_wake(client->irq, 1);
+		if (irq_set_irq_wake(client->irq, 1)) {
+			dev_warn_once(dev, "Cannot set wakeup source\n");
+			ds3232->suspended = false;
+		}
 	}
 	return 0;
 static struct i2c_driver ds3232_driver = {
 	.driver = {
 		.name = "rtc-ds3232",
-		.owner = THIS_MODULE,
 		.pm	= &ds3232_pm_ops,
 	},
 	.probe = ds3232_probe,

drivers/rtc/rtc-fm3130.c+0−1

@@ -523,7 +523,6 @@ exit_free: · 522 unmodified lines
523	static struct i2c_driver fm3130_driver = {	523	static struct i2c_driver fm3130_driver = {
524	.driver = {	524	.driver = {
525	.name = "rtc-fm3130",	525	.name = "rtc-fm3130",
526	.owner = THIS_MODULE,
527	},	526	},
528	.probe = fm3130_probe,	527	.probe = fm3130_probe,
529	.id_table = fm3130_id,	528	.id_table = fm3130_id,

drivers/rtc/rtc-gemini.c+1−4

@@ -148,10 +148,7 @@ static int gemini_rtc_probe(struct platform_device *pdev) · 147 unmodified lines
148		148
149	rtc->rtc_dev = rtc_device_register(pdev->name, dev,	149	rtc->rtc_dev = rtc_device_register(pdev->name, dev,
150	&gemini_rtc_ops, THIS_MODULE);	150	&gemini_rtc_ops, THIS_MODULE);
151	if (likely(IS_ERR(rtc->rtc_dev)))	151	return PTR_ERR_OR_ZERO(rtc->rtc_dev);
152	return PTR_ERR(rtc->rtc_dev);
153
154	return 0;
155	}	152	}
156		153
157	static int gemini_rtc_remove(struct platform_device *pdev)	154	static int gemini_rtc_remove(struct platform_device *pdev)

drivers/rtc/rtc-hym8563.c+0−1

@@ -599,7 +599,6 @@ MODULE_DEVICE_TABLE(of, hym8563_dt_idtable); · 598 unmodified lines
599	static struct i2c_driver hym8563_driver = {	599	static struct i2c_driver hym8563_driver = {
600	.driver = {	600	.driver = {
601	.name = "rtc-hym8563",	601	.name = "rtc-hym8563",
602	.owner = THIS_MODULE,
603	.pm = &hym8563_pm_ops,	602	.pm = &hym8563_pm_ops,
604	.of_match_table = hym8563_dt_idtable,	603	.of_match_table = hym8563_dt_idtable,
605	},	604	},

drivers/rtc/rtc-isl12022.c+2−6

 		tm->tm_sec, tm->tm_min, tm->tm_hour,
 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
-	/* The clock can give out invalid datetime, but we cannot return
+	return rtc_valid_tm(tm);
-	 * -EINVAL otherwise hwclock will refuse to set the time on bootup. */
-	if (rtc_valid_tm(tm) < 0)
-		dev_err(&client->dev, "retrieved date and time is invalid.\n");
-	return 0;
 }
 static int isl12022_set_datetime(struct i2c_client *client, struct rtc_time *tm)
 	{ .compatible = "isil,isl12022" },
 	{ },
 };
+MODULE_DEVICE_TABLE(of, isl12022_dt_match);
 #endif
 static const struct i2c_device_id isl12022_id[] = {

drivers/rtc/rtc-isl12057.c+1−1

 	{ .compatible = "isil,isl12057" },
 	{ },
 };
+MODULE_DEVICE_TABLE(of, isl12057_dt_match);
 #endif
 static const struct i2c_device_id isl12057_id[] = {
 static struct i2c_driver isl12057_driver = {
 	.driver = {
 		.name = DRV_NAME,
-		.owner = THIS_MODULE,
 		.pm = &isl12057_rtc_pm_ops,
 		.of_match_table = of_match_ptr(isl12057_dt_match),
 	},

drivers/rtc/rtc-lpc24xx.c+310−0

@@ -0,0 +1,310 @@
	1	/*
	2	* RTC driver for NXP LPC178x/18xx/43xx Real-Time Clock (RTC)
	3	*
	4	* Copyright (C) 2011 NXP Semiconductors
	5	* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	*/
	13
	14	#include <linux/clk.h>
	15	#include <linux/io.h>
	16	#include <linux/kernel.h>
	17	#include <linux/module.h>
	18	#include <linux/of.h>
	19	#include <linux/of_device.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/rtc.h>
	22
	23	/* LPC24xx RTC register offsets and bits */
	24	#define LPC24XX_ILR 0x00
	25	#define LPC24XX_RTCCIF BIT(0)
	26	#define LPC24XX_RTCALF BIT(1)
	27	#define LPC24XX_CTC 0x04
	28	#define LPC24XX_CCR 0x08
	29	#define LPC24XX_CLKEN BIT(0)
	30	#define LPC178X_CCALEN BIT(4)
	31	#define LPC24XX_CIIR 0x0c
	32	#define LPC24XX_AMR 0x10
	33	#define LPC24XX_ALARM_DISABLE 0xff
	34	#define LPC24XX_CTIME0 0x14
	35	#define LPC24XX_CTIME1 0x18
	36	#define LPC24XX_CTIME2 0x1c
	37	#define LPC24XX_SEC 0x20
	38	#define LPC24XX_MIN 0x24
	39	#define LPC24XX_HOUR 0x28
	40	#define LPC24XX_DOM 0x2c
	41	#define LPC24XX_DOW 0x30
	42	#define LPC24XX_DOY 0x34
	43	#define LPC24XX_MONTH 0x38
	44	#define LPC24XX_YEAR 0x3c
	45	#define LPC24XX_ALSEC 0x60
	46	#define LPC24XX_ALMIN 0x64
	47	#define LPC24XX_ALHOUR 0x68
	48	#define LPC24XX_ALDOM 0x6c
	49	#define LPC24XX_ALDOW 0x70
	50	#define LPC24XX_ALDOY 0x74
	51	#define LPC24XX_ALMON 0x78
	52	#define LPC24XX_ALYEAR 0x7c
	53
	54	/* Macros to read fields in consolidated time (CT) registers */
	55	#define CT0_SECS(x) (((x) >> 0) & 0x3f)
	56	#define CT0_MINS(x) (((x) >> 8) & 0x3f)
	57	#define CT0_HOURS(x) (((x) >> 16) & 0x1f)
	58	#define CT0_DOW(x) (((x) >> 24) & 0x07)
	59	#define CT1_DOM(x) (((x) >> 0) & 0x1f)
	60	#define CT1_MONTH(x) (((x) >> 8) & 0x0f)
	61	#define CT1_YEAR(x) (((x) >> 16) & 0xfff)
	62	#define CT2_DOY(x) (((x) >> 0) & 0xfff)
	63
	64	#define rtc_readl(dev, reg) readl((dev)->rtc_base + (reg))
	65	#define rtc_writel(dev, reg, val) writel((val), (dev)->rtc_base + (reg))
	66
	67	struct lpc24xx_rtc {
	68	void __iomem *rtc_base;
	69	struct rtc_device *rtc;
	70	struct clk *clk_rtc;
	71	struct clk *clk_reg;
	72	};
	73
	74	static int lpc24xx_rtc_set_time(struct device dev, struct rtc_time tm)
	75	{
	76	struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
	77
	78	/* Disable RTC during update */
	79	rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
	80
	81	rtc_writel(rtc, LPC24XX_SEC, tm->tm_sec);
	82	rtc_writel(rtc, LPC24XX_MIN, tm->tm_min);
	83	rtc_writel(rtc, LPC24XX_HOUR, tm->tm_hour);
	84	rtc_writel(rtc, LPC24XX_DOW, tm->tm_wday);
	85	rtc_writel(rtc, LPC24XX_DOM, tm->tm_mday);
	86	rtc_writel(rtc, LPC24XX_DOY, tm->tm_yday);
	87	rtc_writel(rtc, LPC24XX_MONTH, tm->tm_mon);
	88	rtc_writel(rtc, LPC24XX_YEAR, tm->tm_year);
	89
	90	rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN \| LPC178X_CCALEN);
	91
	92	return 0;
	93	}
	94
	95	static int lpc24xx_rtc_read_time(struct device dev, struct rtc_time tm)
	96	{
	97	struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
	98	u32 ct0, ct1, ct2;
	99
	100	ct0 = rtc_readl(rtc, LPC24XX_CTIME0);
	101	ct1 = rtc_readl(rtc, LPC24XX_CTIME1);
	102	ct2 = rtc_readl(rtc, LPC24XX_CTIME2);
	103
	104	tm->tm_sec = CT0_SECS(ct0);
	105	tm->tm_min = CT0_MINS(ct0);
	106	tm->tm_hour = CT0_HOURS(ct0);
	107	tm->tm_wday = CT0_DOW(ct0);
	108	tm->tm_mon = CT1_MONTH(ct1);
	109	tm->tm_mday = CT1_DOM(ct1);
	110	tm->tm_year = CT1_YEAR(ct1);
	111	tm->tm_yday = CT2_DOY(ct2);
	112
	113	return rtc_valid_tm(tm);
	114	}
	115
	116	static int lpc24xx_rtc_read_alarm(struct device dev, struct rtc_wkalrm wkalrm)
	117	{
	118	struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
	119	struct rtc_time *tm = &wkalrm->time;
	120
	121	tm->tm_sec = rtc_readl(rtc, LPC24XX_ALSEC);
	122	tm->tm_min = rtc_readl(rtc, LPC24XX_ALMIN);
	123	tm->tm_hour = rtc_readl(rtc, LPC24XX_ALHOUR);
	124	tm->tm_mday = rtc_readl(rtc, LPC24XX_ALDOM);
	125	tm->tm_wday = rtc_readl(rtc, LPC24XX_ALDOW);
	126	tm->tm_yday = rtc_readl(rtc, LPC24XX_ALDOY);
	127	tm->tm_mon = rtc_readl(rtc, LPC24XX_ALMON);
	128	tm->tm_year = rtc_readl(rtc, LPC24XX_ALYEAR);
	129
	130	wkalrm->enabled = rtc_readl(rtc, LPC24XX_AMR) == 0;
	131	wkalrm->pending = !!(rtc_readl(rtc, LPC24XX_ILR) & LPC24XX_RTCCIF);
	132
	133	return rtc_valid_tm(&wkalrm->time);
	134	}
	135
	136	static int lpc24xx_rtc_set_alarm(struct device dev, struct rtc_wkalrm wkalrm)
	137	{
	138	struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
	139	struct rtc_time *tm = &wkalrm->time;
	140
	141	/* Disable alarm irq during update */
	142	rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
	143
	144	rtc_writel(rtc, LPC24XX_ALSEC, tm->tm_sec);
	145	rtc_writel(rtc, LPC24XX_ALMIN, tm->tm_min);
	146	rtc_writel(rtc, LPC24XX_ALHOUR, tm->tm_hour);
	147	rtc_writel(rtc, LPC24XX_ALDOM, tm->tm_mday);
	148	rtc_writel(rtc, LPC24XX_ALDOW, tm->tm_wday);
	149	rtc_writel(rtc, LPC24XX_ALDOY, tm->tm_yday);
	150	rtc_writel(rtc, LPC24XX_ALMON, tm->tm_mon);
	151	rtc_writel(rtc, LPC24XX_ALYEAR, tm->tm_year);
	152
	153	if (wkalrm->enabled)
	154	rtc_writel(rtc, LPC24XX_AMR, 0);
	155
	156	return 0;
	157	}
	158
	159	static int lpc24xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
	160	{
	161	struct lpc24xx_rtc *rtc = dev_get_drvdata(dev);
	162
	163	if (enable)
	164	rtc_writel(rtc, LPC24XX_AMR, 0);
	165	else
	166	rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
	167
	168	return 0;
	169	}
	170
	171	static irqreturn_t lpc24xx_rtc_interrupt(int irq, void *data)
	172	{
	173	unsigned long events = RTC_IRQF;
	174	struct lpc24xx_rtc *rtc = data;
	175	u32 rtc_iir;
	176
	177	/* Check interrupt cause */
	178	rtc_iir = rtc_readl(rtc, LPC24XX_ILR);
	179	if (rtc_iir & LPC24XX_RTCALF) {
	180	events \|= RTC_AF;
	181	rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
	182	}
	183
	184	/* Clear interrupt status and report event */
	185	rtc_writel(rtc, LPC24XX_ILR, rtc_iir);
	186	rtc_update_irq(rtc->rtc, 1, events);
	187
	188	return IRQ_HANDLED;
	189	}
	190
	191	static const struct rtc_class_ops lpc24xx_rtc_ops = {
	192	.read_time = lpc24xx_rtc_read_time,
	193	.set_time = lpc24xx_rtc_set_time,
	194	.read_alarm = lpc24xx_rtc_read_alarm,
	195	.set_alarm = lpc24xx_rtc_set_alarm,
	196	.alarm_irq_enable = lpc24xx_rtc_alarm_irq_enable,
	197	};
	198
	199	static int lpc24xx_rtc_probe(struct platform_device *pdev)
	200	{
	201	struct lpc24xx_rtc *rtc;
	202	struct resource *res;
	203	int irq, ret;
	204
	205	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
	206	if (!rtc)
	207	return -ENOMEM;
	208
	209	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	210	rtc->rtc_base = devm_ioremap_resource(&pdev->dev, res);
	211	if (IS_ERR(rtc->rtc_base))
	212	return PTR_ERR(rtc->rtc_base);
	213
	214	irq = platform_get_irq(pdev, 0);
	215	if (irq < 0) {
	216	dev_warn(&pdev->dev, "can't get interrupt resource\n");
	217	return irq;
	218	}
	219
	220	rtc->clk_rtc = devm_clk_get(&pdev->dev, "rtc");
	221	if (IS_ERR(rtc->clk_rtc)) {
	222	dev_err(&pdev->dev, "error getting rtc clock\n");
	223	return PTR_ERR(rtc->clk_rtc);
	224	}
	225
	226	rtc->clk_reg = devm_clk_get(&pdev->dev, "reg");
	227	if (IS_ERR(rtc->clk_reg)) {
	228	dev_err(&pdev->dev, "error getting reg clock\n");
	229	return PTR_ERR(rtc->clk_reg);
	230	}
	231
	232	ret = clk_prepare_enable(rtc->clk_rtc);
	233	if (ret) {
	234	dev_err(&pdev->dev, "unable to enable rtc clock\n");
	235	return ret;
	236	}
	237
	238	ret = clk_prepare_enable(rtc->clk_reg);
	239	if (ret) {
	240	dev_err(&pdev->dev, "unable to enable reg clock\n");
	241	goto disable_rtc_clk;
	242	}
	243
	244	platform_set_drvdata(pdev, rtc);
	245
	246	/* Clear any pending interrupts */
	247	rtc_writel(rtc, LPC24XX_ILR, LPC24XX_RTCCIF \| LPC24XX_RTCALF);
	248
	249	/* Enable RTC count */
	250	rtc_writel(rtc, LPC24XX_CCR, LPC24XX_CLKEN \| LPC178X_CCALEN);
	251
	252	ret = devm_request_irq(&pdev->dev, irq, lpc24xx_rtc_interrupt, 0,
	253	pdev->name, rtc);
	254	if (ret < 0) {
	255	dev_warn(&pdev->dev, "can't request interrupt\n");
	256	goto disable_clks;
	257	}
	258
	259	rtc->rtc = devm_rtc_device_register(&pdev->dev, "lpc24xx-rtc",
	260	&lpc24xx_rtc_ops, THIS_MODULE);
	261	if (IS_ERR(rtc->rtc)) {
	262	dev_err(&pdev->dev, "can't register rtc device\n");
	263	ret = PTR_ERR(rtc->rtc);
	264	goto disable_clks;
	265	}
	266
	267	return 0;
	268
	269	disable_clks:
	270	clk_disable_unprepare(rtc->clk_reg);
	271	disable_rtc_clk:
	272	clk_disable_unprepare(rtc->clk_rtc);
	273	return ret;
	274	}
	275
	276	static int lpc24xx_rtc_remove(struct platform_device *pdev)
	277	{
	278	struct lpc24xx_rtc *rtc = platform_get_drvdata(pdev);
	279
	280	/* Ensure all interrupt sources are masked */
	281	rtc_writel(rtc, LPC24XX_AMR, LPC24XX_ALARM_DISABLE);
	282	rtc_writel(rtc, LPC24XX_CIIR, 0);
	283
	284	rtc_writel(rtc, LPC24XX_CCR, LPC178X_CCALEN);
	285
	286	clk_disable_unprepare(rtc->clk_rtc);
	287	clk_disable_unprepare(rtc->clk_reg);
	288
	289	return 0;
	290	}
	291
	292	static const struct of_device_id lpc24xx_rtc_match[] = {
	293	{ .compatible = "nxp,lpc1788-rtc" },
	294	{ }
	295	};
	296	MODULE_DEVICE_TABLE(of, lpc24xx_rtc_match);
	297
	298	static struct platform_driver lpc24xx_rtc_driver = {
	299	.probe = lpc24xx_rtc_probe,
	300	.remove = lpc24xx_rtc_remove,
	301	.driver = {
	302	.name = "lpc24xx-rtc",
	303	.of_match_table = lpc24xx_rtc_match,
	304	},
	305	};
	306	module_platform_driver(lpc24xx_rtc_driver);
	307
	308	MODULE_AUTHOR("Kevin Wells <wellsk40@gmail.com>");
	309	MODULE_DESCRIPTION("RTC driver for the LPC178x/18xx/408x/43xx SoCs");
	310	MODULE_LICENSE("GPL");

drivers/rtc/rtc-m48t59.c+10−8

@@ -345,11 +345,12 @@ static ssize_t m48t59_nvram_read(struct file filp, struct kobject kobj, · 344 unmodified lines
345	ssize_t cnt = 0;	345	ssize_t cnt = 0;
346	unsigned long flags;	346	unsigned long flags;
347		347
348	for (; size > 0 && pos < pdata->offset; cnt++, size--) {	348	spin_lock_irqsave(&m48t59->lock, flags);
349	spin_lock_irqsave(&m48t59->lock, flags);	349
		350	for (; cnt < size; cnt++)
350	*buf++ = M48T59_READ(cnt);	351	*buf++ = M48T59_READ(cnt);
351	spin_unlock_irqrestore(&m48t59->lock, flags);	352
352	}	353	spin_unlock_irqrestore(&m48t59->lock, flags);
353		354
354	return cnt;	355	return cnt;
355	}	356	}
@@ -365,11 +366,12 @@ static ssize_t m48t59_nvram_write(struct file filp, struct kobject kobj, · 9 unmodified lines
365	ssize_t cnt = 0;	366	ssize_t cnt = 0;
366	unsigned long flags;	367	unsigned long flags;
367		368
368	for (; size > 0 && pos < pdata->offset; cnt++, size--) {	369	spin_lock_irqsave(&m48t59->lock, flags);
369	spin_lock_irqsave(&m48t59->lock, flags);	370
		371	for (; cnt < size; cnt++)
370	M48T59_WRITE(*buf++, cnt);	372	M48T59_WRITE(*buf++, cnt);
371	spin_unlock_irqrestore(&m48t59->lock, flags);	373
372	}	374	spin_unlock_irqrestore(&m48t59->lock, flags);
373		375
374	return cnt;	376	return cnt;
375	}	377	}

drivers/rtc/rtc-max8997.c+1−0

@@ -521,6 +521,7 @@ static const struct platform_device_id rtc_id[] = { · 520 unmodified lines
521	{ "max8997-rtc", 0 },	521	{ "max8997-rtc", 0 },
522	{},	522	{},
523	};	523	};
		524	MODULE_DEVICE_TABLE(platform, rtc_id);
524		525
525	static struct platform_driver max8997_rtc_driver = {	526	static struct platform_driver max8997_rtc_driver = {
526	.driver = {	527	.driver = {

drivers/rtc/rtc-moxart.c+1−0

@@ -312,6 +312,7 @@ static const struct of_device_id moxart_rtc_match[] = { · 311 unmodified lines
312	{ .compatible = "moxa,moxart-rtc" },	312	{ .compatible = "moxa,moxart-rtc" },
313	{ },	313	{ },
314	};	314	};
		315	MODULE_DEVICE_TABLE(of, moxart_rtc_match);
315		316
316	static struct platform_driver moxart_rtc_driver = {	317	static struct platform_driver moxart_rtc_driver = {
317	.probe = moxart_rtc_probe,	318	.probe = moxart_rtc_probe,

drivers/rtc/rtc-mpc5121.c+1−0

@@ -406,6 +406,7 @@ static const struct of_device_id mpc5121_rtc_match[] = { · 405 unmodified lines
406	{ .compatible = "fsl,mpc5200-rtc", },	406	{ .compatible = "fsl,mpc5200-rtc", },
407	{},	407	{},
408	};	408	};
		409	MODULE_DEVICE_TABLE(of, mpc5121_rtc_match);
409	#endif	410	#endif
410		411
411	static struct platform_driver mpc5121_rtc_driver = {	412	static struct platform_driver mpc5121_rtc_driver = {

drivers/rtc/rtc-mt6397.c+27−0

@@ -373,15 +373,42 @@ static int mtk_rtc_remove(struct platform_device *pdev) · 372 unmodified lines
373	return 0;	373	return 0;
374	}	374	}
375		375
		376	#ifdef CONFIG_PM_SLEEP
		377	static int mt6397_rtc_suspend(struct device *dev)
		378	{
		379	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
		380
		381	if (device_may_wakeup(dev))
		382	enable_irq_wake(rtc->irq);
		383
		384	return 0;
		385	}
		386
		387	static int mt6397_rtc_resume(struct device *dev)
		388	{
		389	struct mt6397_rtc *rtc = dev_get_drvdata(dev);
		390
		391	if (device_may_wakeup(dev))
		392	disable_irq_wake(rtc->irq);
		393
		394	return 0;
		395	}
		396	#endif
		397
		398	static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
		399	mt6397_rtc_resume);
		400
376	static const struct of_device_id mt6397_rtc_of_match[] = {	401	static const struct of_device_id mt6397_rtc_of_match[] = {
377	{ .compatible = "mediatek,mt6397-rtc", },	402	{ .compatible = "mediatek,mt6397-rtc", },
378	{ }	403	{ }
379	};	404	};
		405	MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
380		406
381	static struct platform_driver mtk_rtc_driver = {	407	static struct platform_driver mtk_rtc_driver = {
382	.driver = {	408	.driver = {
383	.name = "mt6397-rtc",	409	.name = "mt6397-rtc",
384	.of_match_table = mt6397_rtc_of_match,	410	.of_match_table = mt6397_rtc_of_match,
		411	.pm = &mt6397_pm_ops,
385	},	412	},
386	.probe = mtk_rtc_probe,	413	.probe = mtk_rtc_probe,
387	.remove = mtk_rtc_remove,	414	.remove = mtk_rtc_remove,

drivers/rtc/rtc-mv.c+1−0

@@ -324,6 +324,7 @@ static const struct of_device_id rtc_mv_of_match_table[] = { · 323 unmodified lines
324	{ .compatible = "marvell,orion-rtc", },	324	{ .compatible = "marvell,orion-rtc", },
325	{}	325	{}
326	};	326	};
		327	MODULE_DEVICE_TABLE(of, rtc_mv_of_match_table);
327	#endif	328	#endif
328		329
329	static struct platform_driver mv_rtc_driver = {	330	static struct platform_driver mv_rtc_driver = {

drivers/rtc/rtc-omap.c+33−0

 #include <linux/of_device.h>
 #include <linux/pm_runtime.h>
 #include <linux/io.h>
+#include <linux/clk.h>
 /*
  * The OMAP RTC is a year/month/day/hours/minutes/seconds BCD clock
 /* OMAP_RTC_OSC_REG bit fields: */
 #define OMAP_RTC_OSC_32KCLK_EN		BIT(6)
+#define OMAP_RTC_OSC_SEL_32KCLK_SRC	BIT(3)
 /* OMAP_RTC_IRQWAKEEN bit fields: */
 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN	BIT(1)
 struct omap_rtc {
 	struct rtc_device *rtc;
 	void __iomem *base;
+	struct clk *clk;
 	int irq_alarm;
 	int irq_timer;
 	u8 interrupts_reg;
 	bool is_pmic_controller;
+	bool has_ext_clk;
 	const struct omap_rtc_device_type *type;
 };
 	if (rtc->irq_alarm <= 0)
 		return -ENOENT;
+	rtc->clk = devm_clk_get(&pdev->dev, "ext-clk");
+	if (!IS_ERR(rtc->clk))
+		rtc->has_ext_clk = true;
+	else
+		rtc->clk = devm_clk_get(&pdev->dev, "int-clk");
+	if (!IS_ERR(rtc->clk))
+		clk_prepare_enable(rtc->clk);
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	rtc->base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(rtc->base))
 	if (reg != new_ctrl)
 		rtc_write(rtc, OMAP_RTC_CTRL_REG, new_ctrl);
+	/*
+	 * If we have the external clock then switch to it so we can keep
+	 * ticking across suspend.
+	 */
+	if (rtc->has_ext_clk) {
+		reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
+		rtc_write(rtc, OMAP_RTC_OSC_REG,
+			  reg | OMAP_RTC_OSC_SEL_32KCLK_SRC);
+	}
 	rtc->type->lock(rtc);
 	device_init_wakeup(&pdev->dev, true);
 static int __exit omap_rtc_remove(struct platform_device *pdev)
 {
 	struct omap_rtc *rtc = platform_get_drvdata(pdev);
+	u8 reg;
 	if (pm_power_off == omap_rtc_power_off &&
 			omap_rtc_power_off_rtc == rtc) {
 	device_init_wakeup(&pdev->dev, 0);
+	if (!IS_ERR(rtc->clk))
+		clk_disable_unprepare(rtc->clk);
 	rtc->type->unlock(rtc);
 	/* leave rtc running, but disable irqs */
 	rtc_write(rtc, OMAP_RTC_INTERRUPTS_REG, 0);
+	if (rtc->has_ext_clk) {
+		reg = rtc_read(rtc, OMAP_RTC_OSC_REG);
+		reg &= ~OMAP_RTC_OSC_SEL_32KCLK_SRC;
+		rtc_write(rtc, OMAP_RTC_OSC_REG, reg);
+	}
 	rtc->type->lock(rtc);
 	/* Disable the clock/module */

drivers/rtc/rtc-opal.c+5−5

 	return rc;
 }
-static const struct rtc_class_ops opal_rtc_ops = {
+static struct rtc_class_ops opal_rtc_ops = {
 	.read_time	= opal_get_rtc_time,
 	.set_time	= opal_set_rtc_time,
-	.read_alarm	= opal_get_tpo_time,
-	.set_alarm	= opal_set_tpo_time,
 };
 static int opal_rtc_probe(struct platform_device *pdev)
 	struct rtc_device *rtc;
 	if (pdev->dev.of_node && of_get_property(pdev->dev.of_node, "has-tpo",
-						 NULL))
+						 NULL)) {
 		device_set_wakeup_capable(&pdev->dev, true);
+		opal_rtc_ops.read_alarm	= opal_get_tpo_time;
+		opal_rtc_ops.set_alarm = opal_set_tpo_time;
+	}
 	rtc = devm_rtc_device_register(&pdev->dev, DRVNAME, &opal_rtc_ops,
 				       THIS_MODULE);
 	.id_table	= opal_rtc_driver_ids,
 	.driver		= {
 		.name		= DRVNAME,
-		.owner		= THIS_MODULE,
 		.of_match_table	= opal_rtc_match,
 	},
 };

drivers/rtc/rtc-pcf2123.c+1−7

 			tm->tm_sec, tm->tm_min, tm->tm_hour,
 			tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
-	/* the clock can give out invalid datetime, but we cannot return
+	return rtc_valid_tm(tm);
-	 * -EINVAL otherwise hwclock will refuse to set the time on bootup.
-	 */
-	if (rtc_valid_tm(tm) < 0)
-		dev_err(dev, "retrieved date/time is not valid.\n");
-	return 0;
 }
 static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)

drivers/rtc/rtc-pcf2127.c+24−11

 #define PCF2127_REG_MO          (0x08)
 #define PCF2127_REG_YR          (0x09)
+#define PCF2127_OSF             BIT(7)  /* Oscillator Fail flag */
 static struct i2c_driver pcf2127_driver;
 struct pcf2127 {
 	struct rtc_device *rtc;
 	int voltage_low; /* indicates if a low_voltage was detected */
+	int oscillator_failed; /* OSF was detected and date is unreliable */
 };
 /*
 	if (buf[PCF2127_REG_CTRL3] & 0x04) {
 		pcf2127->voltage_low = 1;
 		dev_info(&client->dev,
-			"low voltage detected, date/time is not reliable.\n");
+			"low voltage detected, check/replace RTC battery.\n");
+	}
+	if (buf[PCF2127_REG_SC] & PCF2127_OSF) {
+		/*
+		 * no need clear the flag here,
+		 * it will be cleared once the new date is saved
+		 */
+		pcf2127->oscillator_failed = 1;
+		dev_warn(&client->dev,
+			 "oscillator stop detected, date/time is not reliable\n");
+		return -EINVAL;
 	}
 	dev_dbg(&client->dev,
 		tm->tm_sec, tm->tm_min, tm->tm_hour,
 		tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
-	/* the clock can give out invalid datetime, but we cannot return
+	return rtc_valid_tm(tm);
-	 * -EINVAL otherwise hwclock will refuse to set the time on bootup.
-	 */
-	if (rtc_valid_tm(tm) < 0)
-		dev_err(&client->dev, "retrieved date/time is not valid.\n");
-	return 0;
 }
 static int pcf2127_set_datetime(struct i2c_client *client, struct rtc_time *tm)
 {
+	struct pcf2127 *pcf2127 = i2c_get_clientdata(client);
 	unsigned char buf[8];
 	int i = 0, err;
 	buf[i++] = PCF2127_REG_SC;
 	/* hours, minutes and seconds */
-	buf[i++] = bin2bcd(tm->tm_sec);
+	buf[i++] = bin2bcd(tm->tm_sec);	/* this will also clear OSF flag */
 	buf[i++] = bin2bcd(tm->tm_min);
 	buf[i++] = bin2bcd(tm->tm_hour);
 	buf[i++] = bin2bcd(tm->tm_mday);
 		return -EIO;
 	}
+	/* clear OSF flag in client data */
+	pcf2127->oscillator_failed = 0;
 	return 0;
 }
 	switch (cmd) {
 	case RTC_VL_READ:
 		if (pcf2127->voltage_low)
-			dev_info(dev, "low voltage detected, date/time is not reliable.\n");
+			dev_info(dev, "low voltage detected, check/replace battery\n");
+		if (pcf2127->oscillator_failed)
+			dev_info(dev, "oscillator stop detected, date/time is not reliable\n");
 		if (copy_to_user((void __user *)arg, &pcf2127->voltage_low,
 					sizeof(int)))
 static struct i2c_driver pcf2127_driver = {
 	.driver		= {
 		.name	= "rtc-pcf2127",
-		.owner	= THIS_MODULE,
 		.of_match_table = of_match_ptr(pcf2127_of_match),
 	},
 	.probe		= pcf2127_probe,

drivers/rtc/rtc-pcf85063.c+0−1

@@ -189,7 +189,6 @@ MODULE_DEVICE_TABLE(of, pcf85063_of_match); · 188 unmodified lines
189	static struct i2c_driver pcf85063_driver = {	189	static struct i2c_driver pcf85063_driver = {
190	.driver = {	190	.driver = {
191	.name = "rtc-pcf85063",	191	.name = "rtc-pcf85063",
192	.owner = THIS_MODULE,
193	.of_match_table = of_match_ptr(pcf85063_of_match),	192	.of_match_table = of_match_ptr(pcf85063_of_match),
194	},	193	},
195	.probe = pcf85063_probe,	194	.probe = pcf85063_probe,

drivers/rtc/rtc-pcf8523.c+0−1

@@ -334,7 +334,6 @@ MODULE_DEVICE_TABLE(of, pcf8523_of_match); · 333 unmodified lines
334	static struct i2c_driver pcf8523_driver = {	334	static struct i2c_driver pcf8523_driver = {
335	.driver = {	335	.driver = {
336	.name = DRIVER_NAME,	336	.name = DRIVER_NAME,
337	.owner = THIS_MODULE,
338	.of_match_table = of_match_ptr(pcf8523_of_match),	337	.of_match_table = of_match_ptr(pcf8523_of_match),
339	},	338	},
340	.probe = pcf8523_probe,	339	.probe = pcf8523_probe,

drivers/rtc/rtc-pcf8563.c+0−1

@@ -483,7 +483,6 @@ MODULE_DEVICE_TABLE(of, pcf8563_of_match); · 482 unmodified lines
483	static struct i2c_driver pcf8563_driver = {	483	static struct i2c_driver pcf8563_driver = {
484	.driver = {	484	.driver = {
485	.name = "rtc-pcf8563",	485	.name = "rtc-pcf8563",
486	.owner = THIS_MODULE,
487	.of_match_table = of_match_ptr(pcf8563_of_match),	486	.of_match_table = of_match_ptr(pcf8563_of_match),
488	},	487	},
489	.probe = pcf8563_probe,	488	.probe = pcf8563_probe,

drivers/rtc/rtc-pcf8583.c+0−1

@@ -309,7 +309,6 @@ MODULE_DEVICE_TABLE(i2c, pcf8583_id); · 308 unmodified lines
309	static struct i2c_driver pcf8583_driver = {	309	static struct i2c_driver pcf8583_driver = {
310	.driver = {	310	.driver = {
311	.name = "pcf8583",	311	.name = "pcf8583",
312	.owner = THIS_MODULE,
313	},	312	},
314	.probe = pcf8583_probe,	313	.probe = pcf8583_probe,
315	.id_table = pcf8583_id,	314	.id_table = pcf8583_id,

drivers/rtc/rtc-pl031.c+1−1

@@ -476,6 +476,6 @@ static struct amba_driver pl031_driver = { · 475 unmodified lines
476		476
477	module_amba_driver(pl031_driver);	477	module_amba_driver(pl031_driver);
478		478
479	MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net");	479	MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
480	MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");	480	MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
481	MODULE_LICENSE("GPL");	481	MODULE_LICENSE("GPL");

drivers/rtc/rtc-pxa.c+28−27

 #include <mach/hardware.h>
+#include "rtc-sa1100.h"
 #define RTC_DEF_DIVIDER		(32768 - 1)
 #define RTC_DEF_TRIM		0
 #define MAXFREQ_PERIODIC	1000
 	__raw_writel((value), (pxa_rtc)->base + (reg))
 struct pxa_rtc {
+	struct sa1100_rtc sa1100_rtc;
 	struct resource	*ress;
 	void __iomem		*base;
-	int			irq_1Hz;
-	int			irq_Alrm;
 	struct rtc_device	*rtc;
 	spinlock_t		lock;		/* Protects this structure */
 };
 	struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
 	int ret;
-	ret = request_irq(pxa_rtc->irq_1Hz, pxa_rtc_irq, 0,
+	ret = request_irq(pxa_rtc->sa1100_rtc.irq_1hz, pxa_rtc_irq, 0,
 			  "rtc 1Hz", dev);
 	if (ret < 0) {
-		dev_err(dev, "can't get irq %i, err %d\n", pxa_rtc->irq_1Hz,
+		dev_err(dev, "can't get irq %i, err %d\n",
-			ret);
+			pxa_rtc->sa1100_rtc.irq_1hz, ret);
 		goto err_irq_1Hz;
 	}
-	ret = request_irq(pxa_rtc->irq_Alrm, pxa_rtc_irq, 0,
+	ret = request_irq(pxa_rtc->sa1100_rtc.irq_alarm, pxa_rtc_irq, 0,
 			  "rtc Alrm", dev);
 	if (ret < 0) {
-		dev_err(dev, "can't get irq %i, err %d\n", pxa_rtc->irq_Alrm,
+		dev_err(dev, "can't get irq %i, err %d\n",
-			ret);
+			pxa_rtc->sa1100_rtc.irq_alarm, ret);
 		goto err_irq_Alrm;
 	}
 	return 0;
 err_irq_Alrm:
-	free_irq(pxa_rtc->irq_1Hz, dev);
+	free_irq(pxa_rtc->sa1100_rtc.irq_1hz, dev);
 err_irq_1Hz:
 	return ret;
 }
 	rtsr_clear_bits(pxa_rtc, RTSR_PIALE | RTSR_RDALE1 | RTSR_HZE);
 	spin_unlock_irq(&pxa_rtc->lock);
-	free_irq(pxa_rtc->irq_Alrm, dev);
+	free_irq(pxa_rtc->sa1100_rtc.irq_1hz, dev);
-	free_irq(pxa_rtc->irq_1Hz, dev);
+	free_irq(pxa_rtc->sa1100_rtc.irq_alarm, dev);
 }
 static int pxa_alarm_irq_enable(struct device *dev, unsigned int enabled)
 {
 	struct device *dev = &pdev->dev;
 	struct pxa_rtc *pxa_rtc;
+	struct sa1100_rtc *sa1100_rtc;
 	int ret;
-	u32 rttr;
 	pxa_rtc = devm_kzalloc(dev, sizeof(*pxa_rtc), GFP_KERNEL);
 	if (!pxa_rtc)
 		return -ENOMEM;
+	sa1100_rtc = &pxa_rtc->sa1100_rtc;
 	spin_lock_init(&pxa_rtc->lock);
 	platform_set_drvdata(pdev, pxa_rtc);
 		return -ENXIO;
 	}
-	pxa_rtc->irq_1Hz = platform_get_irq(pdev, 0);
+	sa1100_rtc->irq_1hz = platform_get_irq(pdev, 0);
-	if (pxa_rtc->irq_1Hz < 0) {
+	if (sa1100_rtc->irq_1hz < 0) {
 		dev_err(dev, "No 1Hz IRQ resource defined\n");
 		return -ENXIO;
 	}
-	pxa_rtc->irq_Alrm = platform_get_irq(pdev, 1);
+	sa1100_rtc->irq_alarm = platform_get_irq(pdev, 1);
-	if (pxa_rtc->irq_Alrm < 0) {
+	if (sa1100_rtc->irq_alarm < 0) {
 		dev_err(dev, "No alarm IRQ resource defined\n");
 		return -ENXIO;
 	}
 		return -ENOMEM;
 	}
-	/*
+	sa1100_rtc->rcnr = pxa_rtc->base + 0x0;
-	 * If the clock divider is uninitialized then reset it to the
+	sa1100_rtc->rtsr = pxa_rtc->base + 0x8;
-	 * default value to get the 1Hz clock.
+	sa1100_rtc->rtar = pxa_rtc->base + 0x4;
-	 */
+	sa1100_rtc->rttr = pxa_rtc->base + 0xc;
-	if (rtc_readl(pxa_rtc, RTTR) == 0) {
+	ret = sa1100_rtc_init(pdev, sa1100_rtc);
-		rttr = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
+	if (!ret) {
-		rtc_writel(pxa_rtc, RTTR, rttr);
+		dev_err(dev, "Unable to init SA1100 RTC sub-device\n");
-		dev_warn(dev, "warning: initializing default clock"
+		return ret;
-			 " divider/trim value\n");
 	}
 	rtsr_clear_bits(pxa_rtc, RTSR_PIALE | RTSR_RDALE1 | RTSR_HZE);
 	struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
 	if (device_may_wakeup(dev))
-		enable_irq_wake(pxa_rtc->irq_Alrm);
+		enable_irq_wake(pxa_rtc->sa1100_rtc.irq_alarm);
 	return 0;
 }
 	struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
 	if (device_may_wakeup(dev))
-		disable_irq_wake(pxa_rtc->irq_Alrm);
+		disable_irq_wake(pxa_rtc->sa1100_rtc.irq_alarm);
 	return 0;
 }
 #endif

drivers/rtc/rtc-rp5c01.c+2−2

@@ -170,7 +170,7 @@ static ssize_t rp5c01_nvram_read(struct file filp, struct kobject kobj, · 169 unmodified lines
170		170
171	spin_lock_irq(&priv->lock);	171	spin_lock_irq(&priv->lock);
172		172
173	for (count = 0; size > 0 && pos < RP5C01_MODE; count++, size--) {	173	for (count = 0; count < size; count++) {
174	u8 data;	174	u8 data;
175		175
176	rp5c01_write(priv,	176	rp5c01_write(priv,
@@ -200,7 +200,7 @@ static ssize_t rp5c01_nvram_write(struct file filp, struct kobject kobj, · 23 unmodified lines
200		200
201	spin_lock_irq(&priv->lock);	201	spin_lock_irq(&priv->lock);
202		202
203	for (count = 0; size > 0 && pos < RP5C01_MODE; count++, size--) {	203	for (count = 0; count < size; count++) {
204	u8 data = *buf++;	204	u8 data = *buf++;
205		205
206	rp5c01_write(priv,	206	rp5c01_write(priv,

drivers/rtc/rtc-rx8025.c+105−172

@@ -18,13 +18,11 @@ · 17 unmodified lines
18	* modify it under the terms of the GNU General Public License	18	* modify it under the terms of the GNU General Public License
19	* version 2 as published by the Free Software Foundation.	19	* version 2 as published by the Free Software Foundation.
20	*/	20	*/
21	#include <linux/kernel.h>
22	#include <linux/module.h>
23	#include <linux/slab.h>
24	#include <linux/init.h>
25	#include <linux/bcd.h>	21	#include <linux/bcd.h>
		22	#include <linux/bitops.h>
26	#include <linux/i2c.h>	23	#include <linux/i2c.h>
27	#include <linux/list.h>	24	#include <linux/kernel.h>
		25	#include <linux/module.h>
28	#include <linux/rtc.h>	26	#include <linux/rtc.h>
29		27
30	/* Register definitions */	28	/* Register definitions */
@@ -48,17 +46,17 @@ · 17 unmodified lines
48	#define RX8025_BIT_CTRL1_CT (7 << 0)	46	#define RX8025_BIT_CTRL1_CT (7 << 0)
49	/* 1 Hz periodic level irq */	47	/* 1 Hz periodic level irq */
50	#define RX8025_BIT_CTRL1_CT_1HZ 4	48	#define RX8025_BIT_CTRL1_CT_1HZ 4
51	#define RX8025_BIT_CTRL1_TEST (1 << 3)	49	#define RX8025_BIT_CTRL1_TEST BIT(3)
52	#define RX8025_BIT_CTRL1_1224 (1 << 5)	50	#define RX8025_BIT_CTRL1_1224 BIT(5)
53	#define RX8025_BIT_CTRL1_DALE (1 << 6)	51	#define RX8025_BIT_CTRL1_DALE BIT(6)
54	#define RX8025_BIT_CTRL1_WALE (1 << 7)	52	#define RX8025_BIT_CTRL1_WALE BIT(7)
55		53
56	#define RX8025_BIT_CTRL2_DAFG (1 << 0)	54	#define RX8025_BIT_CTRL2_DAFG BIT(0)
57	#define RX8025_BIT_CTRL2_WAFG (1 << 1)	55	#define RX8025_BIT_CTRL2_WAFG BIT(1)
58	#define RX8025_BIT_CTRL2_CTFG (1 << 2)	56	#define RX8025_BIT_CTRL2_CTFG BIT(2)
59	#define RX8025_BIT_CTRL2_PON (1 << 4)	57	#define RX8025_BIT_CTRL2_PON BIT(4)
60	#define RX8025_BIT_CTRL2_XST (1 << 5)	58	#define RX8025_BIT_CTRL2_XST BIT(5)
61	#define RX8025_BIT_CTRL2_VDET (1 << 6)	59	#define RX8025_BIT_CTRL2_VDET BIT(6)
62		60
63	/* Clock precision adjustment */	61	/* Clock precision adjustment */
64	#define RX8025_ADJ_RESOLUTION 3050 /* in ppb */	62	#define RX8025_ADJ_RESOLUTION 3050 /* in ppb */
@@ -74,84 +72,84 @@ MODULE_DEVICE_TABLE(i2c, rx8025_id); · 9 unmodified lines
74	struct rx8025_data {	72	struct rx8025_data {
75	struct i2c_client *client;	73	struct i2c_client *client;
76	struct rtc_device *rtc;	74	struct rtc_device *rtc;
77	struct work_struct work;
78	u8 ctrl1;	75	u8 ctrl1;
79	unsigned exiting:1;
80	};	76	};
81		77
82	static int rx8025_read_reg(struct i2c_client client, int number, u8 value)	78	static s32 rx8025_read_reg(const struct i2c_client *client, u8 number)
83	{	79	{
84	int ret = i2c_smbus_read_byte_data(client, (number << 4) \| 0x08);	80	return i2c_smbus_read_byte_data(client, number << 4);
85
86	if (ret < 0) {
87	dev_err(&client->dev, "Unable to read register #%d\n", number);
88	return ret;
89	}
90
91	*value = ret;
92	return 0;
93	}	81	}
94		82
95	static int rx8025_read_regs(struct i2c_client *client,	83	static int rx8025_read_regs(const struct i2c_client *client,
96	int number, u8 length, u8 *values)	84	u8 number, u8 length, u8 *values)
97	{	85	{
98	int ret = i2c_smbus_read_i2c_block_data(client, (number << 4) \| 0x08,	86	int ret = i2c_smbus_read_i2c_block_data(client, number << 4, length,
99	length, values);	87	values);
100		88	if (ret != length)
101	if (ret != length) {
102	dev_err(&client->dev, "Unable to read registers #%d..#%d\n",
103	number, number + length - 1);
104	return ret < 0 ? ret : -EIO;	89	return ret < 0 ? ret : -EIO;
105	}
106		90
107	return 0;	91	return 0;
108	}	92	}
109		93
110	static int rx8025_write_reg(struct i2c_client *client, int number, u8 value)	94	static s32 rx8025_write_reg(const struct i2c_client *client, u8 number,
		95	u8 value)
111	{	96	{
112	int ret = i2c_smbus_write_byte_data(client, number << 4, value);	97	return i2c_smbus_write_byte_data(client, number << 4, value);
113		98	}
114	if (ret)
115	dev_err(&client->dev, "Unable to write register #%d\n",
116	number);
117		99
118	return ret;	100	static s32 rx8025_write_regs(const struct i2c_client *client,
		101	u8 number, u8 length, const u8 *values)
		102	{
		103	return i2c_smbus_write_i2c_block_data(client, number << 4,
		104	length, values);
119	}	105	}
120		106
121	static int rx8025_write_regs(struct i2c_client *client,	107	static int rx8025_check_validity(struct device *dev)
122	int number, u8 length, u8 *values)
123	{	108	{
124	int ret = i2c_smbus_write_i2c_block_data(client, (number << 4) \| 0x08,	109	struct rx8025_data *rx8025 = dev_get_drvdata(dev);
125	length, values);	110	int ctrl2;
		111
		112	ctrl2 = rx8025_read_reg(rx8025->client, RX8025_REG_CTRL2);
		113	if (ctrl2 < 0)
		114	return ctrl2;
		115
		116	if (ctrl2 & RX8025_BIT_CTRL2_VDET)
		117	dev_warn(dev, "power voltage drop detected\n");
		118
		119	if (ctrl2 & RX8025_BIT_CTRL2_PON) {
		120	dev_warn(dev, "power-on reset detected, date is invalid\n");
		121	return -EINVAL;
		122	}
126		123
127	if (ret)	124	if (!(ctrl2 & RX8025_BIT_CTRL2_XST)) {
128	dev_err(&client->dev, "Unable to write registers #%d..#%d\n",	125	dev_warn(dev, "crystal stopped, date is invalid\n");
129	number, number + length - 1);	126	return -EINVAL;
		127	}
130		128
131	return ret;	129	return 0;
132	}	130	}
133		131
134	static irqreturn_t rx8025_irq(int irq, void *dev_id)	132	static int rx8025_reset_validity(struct i2c_client *client)
135	{	133	{
136	struct i2c_client *client = dev_id;	134	int ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
137	struct rx8025_data *rx8025 = i2c_get_clientdata(client);
138		135
139	disable_irq_nosync(irq);	136	if (ctrl2 < 0)
140	schedule_work(&rx8025->work);	137	return ctrl2;
141	return IRQ_HANDLED;	138
		139	ctrl2 &= ~(RX8025_BIT_CTRL2_PON \| RX8025_BIT_CTRL2_VDET);
		140
		141	return rx8025_write_reg(client, RX8025_REG_CTRL2,
		142	ctrl2 \| RX8025_BIT_CTRL2_XST);
142	}	143	}
143		144
144	static void rx8025_work(struct work_struct *work)	145	static irqreturn_t rx8025_handle_irq(int irq, void *dev_id)
145	{	146	{
146	struct rx8025_data *rx8025 = container_of(work, struct rx8025_data,	147	struct i2c_client *client = dev_id;
147	work);	148	struct rx8025_data *rx8025 = i2c_get_clientdata(client);
148	struct i2c_client *client = rx8025->client;	149	int status;
149	struct mutex *lock = &rx8025->rtc->ops_lock;
150	u8 status;
151
152	mutex_lock(lock);
153		150
154	if (rx8025_read_reg(client, RX8025_REG_CTRL2, &status))	151	status = rx8025_read_reg(client, RX8025_REG_CTRL2);
		152	if (status < 0)
155	goto out;	153	goto out;
156		154
157	if (!(status & RX8025_BIT_CTRL2_XST))	155	if (!(status & RX8025_BIT_CTRL2_XST))
@@ -161,9 +159,7 @@ static void rx8025_work(struct work_struct *work) · 3 unmodified lines
161	if (status & RX8025_BIT_CTRL2_CTFG) {	159	if (status & RX8025_BIT_CTRL2_CTFG) {
162	/* periodic */	160	/* periodic */
163	status &= ~RX8025_BIT_CTRL2_CTFG;	161	status &= ~RX8025_BIT_CTRL2_CTFG;
164	local_irq_disable();
165	rtc_update_irq(rx8025->rtc, 1, RTC_PF \| RTC_IRQF);	162	rtc_update_irq(rx8025->rtc, 1, RTC_PF \| RTC_IRQF);
166	local_irq_enable();
167	}	163	}
168		164
169	if (status & RX8025_BIT_CTRL2_DAFG) {	165	if (status & RX8025_BIT_CTRL2_DAFG) {
@@ -172,20 +168,11 @@ static void rx8025_work(struct work_struct *work) · 2 unmodified lines
172	if (rx8025_write_reg(client, RX8025_REG_CTRL1,	168	if (rx8025_write_reg(client, RX8025_REG_CTRL1,
173	rx8025->ctrl1 & ~RX8025_BIT_CTRL1_DALE))	169	rx8025->ctrl1 & ~RX8025_BIT_CTRL1_DALE))
174	goto out;	170	goto out;
175	local_irq_disable();
176	rtc_update_irq(rx8025->rtc, 1, RTC_AF \| RTC_IRQF);	171	rtc_update_irq(rx8025->rtc, 1, RTC_AF \| RTC_IRQF);
177	local_irq_enable();
178	}	172	}
179		173
180	/* acknowledge IRQ */
181	rx8025_write_reg(client, RX8025_REG_CTRL2,
182	status \| RX8025_BIT_CTRL2_XST);
183
184	out:	174	out:
185	if (!rx8025->exiting)	175	return IRQ_HANDLED;
186	enable_irq(client->irq);
187
188	mutex_unlock(lock);
189	}	176	}
190		177
191	static int rx8025_get_time(struct device dev, struct rtc_time dt)	178	static int rx8025_get_time(struct device dev, struct rtc_time dt)
@@ -194,6 +181,10 @@ static int rx8025_get_time(struct device dev, struct rtc_time dt) · 2 unmodified lines
194	u8 date[7];	181	u8 date[7];
195	int err;	182	int err;
196		183
		184	err = rx8025_check_validity(dev);
		185	if (err)
		186	return err;
		187
197	err = rx8025_read_regs(rx8025->client, RX8025_REG_SEC, 7, date);	188	err = rx8025_read_regs(rx8025->client, RX8025_REG_SEC, 7, date);
198	if (err)	189	if (err)
199	return err;	190	return err;
@@ -213,10 +204,7 @@ static int rx8025_get_time(struct device dev, struct rtc_time dt) · 13 unmodified lines
213		204
214	dt->tm_mday = bcd2bin(date[RX8025_REG_MDAY] & 0x3f);	205	dt->tm_mday = bcd2bin(date[RX8025_REG_MDAY] & 0x3f);
215	dt->tm_mon = bcd2bin(date[RX8025_REG_MONTH] & 0x1f) - 1;	206	dt->tm_mon = bcd2bin(date[RX8025_REG_MONTH] & 0x1f) - 1;
216	dt->tm_year = bcd2bin(date[RX8025_REG_YEAR]);	207	dt->tm_year = bcd2bin(date[RX8025_REG_YEAR]) + 100;
217
218	if (dt->tm_year < 70)
219	dt->tm_year += 100;
220		208
221	dev_dbg(dev, "%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,	209	dev_dbg(dev, "%s: date %ds %dm %dh %dmd %dm %dy\n", __func__,
222	dt->tm_sec, dt->tm_min, dt->tm_hour,	210	dt->tm_sec, dt->tm_min, dt->tm_hour,
@@ -229,12 +217,10 @@ static int rx8025_set_time(struct device dev, struct rtc_time dt) · 6 unmodified lines
229	{	217	{
230	struct rx8025_data *rx8025 = dev_get_drvdata(dev);	218	struct rx8025_data *rx8025 = dev_get_drvdata(dev);
231	u8 date[7];	219	u8 date[7];
		220	int ret;
232		221
233	/*	222	if ((dt->tm_year < 100) \|\| (dt->tm_year > 199))
234	* BUG: The HW assumes every year that is a multiple of 4 to be a leap	223	return -EINVAL;
235	* year. Next time this is wrong is 2100, which will not be a leap
236	* year.
237	*/
238		224
239	/*	225	/*
240	* Here the read-only bits are written as "0". I'm not sure if that	226	* Here the read-only bits are written as "0". I'm not sure if that
@@ -251,17 +237,21 @@ static int rx8025_set_time(struct device dev, struct rtc_time dt) · 10 unmodified lines
251	date[RX8025_REG_WDAY] = bin2bcd(dt->tm_wday);	237	date[RX8025_REG_WDAY] = bin2bcd(dt->tm_wday);
252	date[RX8025_REG_MDAY] = bin2bcd(dt->tm_mday);	238	date[RX8025_REG_MDAY] = bin2bcd(dt->tm_mday);
253	date[RX8025_REG_MONTH] = bin2bcd(dt->tm_mon + 1);	239	date[RX8025_REG_MONTH] = bin2bcd(dt->tm_mon + 1);
254	date[RX8025_REG_YEAR] = bin2bcd(dt->tm_year % 100);	240	date[RX8025_REG_YEAR] = bin2bcd(dt->tm_year - 100);
255		241
256	dev_dbg(dev,	242	dev_dbg(dev,
257	"%s: write 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",	243	"%s: write 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",
258	__func__,	244	__func__,
259	date[0], date[1], date[2], date[3], date[4], date[5], date[6]);	245	date[0], date[1], date[2], date[3], date[4], date[5], date[6]);
260		246
261	return rx8025_write_regs(rx8025->client, RX8025_REG_SEC, 7, date);	247	ret = rx8025_write_regs(rx8025->client, RX8025_REG_SEC, 7, date);
		248	if (ret < 0)
		249	return ret;
		250
		251	return rx8025_reset_validity(rx8025->client);
262	}	252	}
263		253
264	static int rx8025_init_client(struct i2c_client client, int need_reset)	254	static int rx8025_init_client(struct i2c_client *client)
265	{	255	{
266	struct rx8025_data *rx8025 = i2c_get_clientdata(client);	256	struct rx8025_data *rx8025 = i2c_get_clientdata(client);
267	u8 ctrl[2], ctrl2;	257	u8 ctrl[2], ctrl2;
@@ -275,38 +265,18 @@ static int rx8025_init_client(struct i2c_client client, int need_reset) · 7 unmodified lines
275	/* Keep test bit zero ! */	265	/* Keep test bit zero ! */
276	rx8025->ctrl1 = ctrl[0] & ~RX8025_BIT_CTRL1_TEST;	266	rx8025->ctrl1 = ctrl[0] & ~RX8025_BIT_CTRL1_TEST;
277		267
278	if (ctrl[1] & RX8025_BIT_CTRL2_PON) {
279	dev_warn(&client->dev, "power-on reset was detected, "
280	"you may have to readjust the clock\n");
281	*need_reset = 1;
282	}
283
284	if (ctrl[1] & RX8025_BIT_CTRL2_VDET) {
285	dev_warn(&client->dev, "a power voltage drop was detected, "
286	"you may have to readjust the clock\n");
287	*need_reset = 1;
288	}
289
290	if (!(ctrl[1] & RX8025_BIT_CTRL2_XST)) {
291	dev_warn(&client->dev, "Oscillation stop was detected,"
292	"you may have to readjust the clock\n");
293	*need_reset = 1;
294	}
295
296	if (ctrl[1] & (RX8025_BIT_CTRL2_DAFG \| RX8025_BIT_CTRL2_WAFG)) {	268	if (ctrl[1] & (RX8025_BIT_CTRL2_DAFG \| RX8025_BIT_CTRL2_WAFG)) {
297	dev_warn(&client->dev, "Alarm was detected\n");	269	dev_warn(&client->dev, "Alarm was detected\n");
298	need_clear = 1;	270	need_clear = 1;
299	}	271	}
300		272
301	if (!(ctrl[1] & RX8025_BIT_CTRL2_CTFG))	273	if (ctrl[1] & RX8025_BIT_CTRL2_CTFG)
302	need_clear = 1;	274	need_clear = 1;
303		275
304	if (*need_reset \|\| need_clear) {	276	if (need_clear) {
305	ctrl2 = ctrl[0];	277	ctrl2 = ctrl[1];
306	ctrl2 &= ~(RX8025_BIT_CTRL2_PON \| RX8025_BIT_CTRL2_VDET \|	278	ctrl2 &= ~(RX8025_BIT_CTRL2_CTFG \| RX8025_BIT_CTRL2_WAFG \|
307	RX8025_BIT_CTRL2_CTFG \| RX8025_BIT_CTRL2_WAFG \|
308	RX8025_BIT_CTRL2_DAFG);	279	RX8025_BIT_CTRL2_DAFG);
309	ctrl2 \|= RX8025_BIT_CTRL2_XST;
310		280
311	err = rx8025_write_reg(client, RX8025_REG_CTRL2, ctrl2);	281	err = rx8025_write_reg(client, RX8025_REG_CTRL2, ctrl2);
312	}	282	}
@@ -319,8 +289,8 @@ static int rx8025_read_alarm(struct device dev, struct rtc_wkalrm t) · 6 unmodified lines
319	{	289	{
320	struct rx8025_data *rx8025 = dev_get_drvdata(dev);	290	struct rx8025_data *rx8025 = dev_get_drvdata(dev);
321	struct i2c_client *client = rx8025->client;	291	struct i2c_client *client = rx8025->client;
322	u8 ctrl2, ald[2];	292	u8 ald[2];
323	int err;	293	int ctrl2, err;
324		294
325	if (client->irq <= 0)	295	if (client->irq <= 0)
326	return -EINVAL;	296	return -EINVAL;
@@ -329,9 +299,9 @@ static int rx8025_read_alarm(struct device dev, struct rtc_wkalrm t) · 2 unmodified lines
329	if (err)	299	if (err)
330	return err;	300	return err;
331		301
332	err = rx8025_read_reg(client, RX8025_REG_CTRL2, &ctrl2);	302	ctrl2 = rx8025_read_reg(client, RX8025_REG_CTRL2);
333	if (err)	303	if (ctrl2 < 0)
334	return err;	304	return ctrl2;
335		305
336	dev_dbg(dev, "%s: read alarm 0x%02x 0x%02x ctrl2 %02x\n",	306	dev_dbg(dev, "%s: read alarm 0x%02x 0x%02x ctrl2 %02x\n",
337	__func__, ald[0], ald[1], ctrl2);	307	__func__, ald[0], ald[1], ctrl2);
@@ -452,12 +422,11 @@ static struct rtc_class_ops rx8025_rtc_ops = { · 114 unmodified lines
452	static int rx8025_get_clock_adjust(struct device dev, int adj)	422	static int rx8025_get_clock_adjust(struct device dev, int adj)
453	{	423	{
454	struct i2c_client *client = to_i2c_client(dev);	424	struct i2c_client *client = to_i2c_client(dev);
455	u8 digoff;	425	int digoff;
456	int err;
457		426
458	err = rx8025_read_reg(client, RX8025_REG_DIGOFF, &digoff);	427	digoff = rx8025_read_reg(client, RX8025_REG_DIGOFF);
459	if (err)	428	if (digoff < 0)
460	return err;	429	return digoff;
461		430
462	*adj = digoff >= 64 ? digoff - 128 : digoff;	431	*adj = digoff >= 64 ? digoff - 128 : digoff;
463	if (*adj > 0)	432	if (*adj > 0)
@@ -539,88 +508,53 @@ static int rx8025_probe(struct i2c_client *client, · 75 unmodified lines
539	{	508	{
540	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);	509	struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
541	struct rx8025_data *rx8025;	510	struct rx8025_data *rx8025;
542	int err, need_reset = 0;	511	int err = 0;
543		512
544	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA	513	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
545	\| I2C_FUNC_SMBUS_I2C_BLOCK)) {	514	\| I2C_FUNC_SMBUS_I2C_BLOCK)) {
546	dev_err(&adapter->dev,	515	dev_err(&adapter->dev,
547	"doesn't support required functionality\n");	516	"doesn't support required functionality\n");
548	err = -EIO;	517	return -EIO;
549	goto errout;
550	}	518	}
551		519
552	rx8025 = devm_kzalloc(&client->dev, sizeof(*rx8025), GFP_KERNEL);	520	rx8025 = devm_kzalloc(&client->dev, sizeof(*rx8025), GFP_KERNEL);
553	if (!rx8025) {	521	if (!rx8025) {
554	err = -ENOMEM;	522	return -ENOMEM;
555	goto errout;
556	}	523	}
557		524
558	rx8025->client = client;	525	rx8025->client = client;
559	i2c_set_clientdata(client, rx8025);	526	i2c_set_clientdata(client, rx8025);
560	INIT_WORK(&rx8025->work, rx8025_work);
561		527
562	err = rx8025_init_client(client, &need_reset);	528	err = rx8025_init_client(client);
563	if (err)	529	if (err)
564	goto errout;	530	return err;
565
566	if (need_reset) {
567	struct rtc_time tm;
568	dev_info(&client->dev,
569	"bad conditions detected, resetting date\n");
570	rtc_time_to_tm(0, &tm); /* 1970/1/1 */
571	rx8025_set_time(&client->dev, &tm);
572	}
573		531
574	rx8025->rtc = devm_rtc_device_register(&client->dev, client->name,	532	rx8025->rtc = devm_rtc_device_register(&client->dev, client->name,
575	&rx8025_rtc_ops, THIS_MODULE);	533	&rx8025_rtc_ops, THIS_MODULE);
576	if (IS_ERR(rx8025->rtc)) {	534	if (IS_ERR(rx8025->rtc)) {
577	err = PTR_ERR(rx8025->rtc);
578	dev_err(&client->dev, "unable to register the class device\n");	535	dev_err(&client->dev, "unable to register the class device\n");
579	goto errout;	536	return PTR_ERR(rx8025->rtc);
580	}	537	}
581		538
582	if (client->irq > 0) {	539	if (client->irq > 0) {
583	dev_info(&client->dev, "IRQ %d supplied\n", client->irq);	540	dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
584	err = request_irq(client->irq, rx8025_irq,	541	err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
585	0, "rx8025", client);	542	rx8025_handle_irq, 0, "rx8025",
		543	client);
586	if (err) {	544	if (err) {
587	dev_err(&client->dev, "unable to request IRQ\n");	545	dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
588	goto errout;	546	client->irq = 0;
589	}	547	}
590	}	548	}
591		549
592	rx8025->rtc->irq_freq = 1;
593	rx8025->rtc->max_user_freq = 1;	550	rx8025->rtc->max_user_freq = 1;
594		551
595	err = rx8025_sysfs_register(&client->dev);	552	err = rx8025_sysfs_register(&client->dev);
596	if (err)
597	goto errout_irq;
598
599	return 0;
600
601	errout_irq:
602	if (client->irq > 0)
603	free_irq(client->irq, client);
604
605	errout:
606	dev_err(&adapter->dev, "probing for rx8025 failed\n");
607	return err;	553	return err;
608	}	554	}
609		555
610	static int rx8025_remove(struct i2c_client *client)	556	static int rx8025_remove(struct i2c_client *client)
611	{	557	{
612	struct rx8025_data *rx8025 = i2c_get_clientdata(client);
613	struct mutex *lock = &rx8025->rtc->ops_lock;
614
615	if (client->irq > 0) {
616	mutex_lock(lock);
617	rx8025->exiting = 1;
618	mutex_unlock(lock);
619
620	free_irq(client->irq, client);
621	cancel_work_sync(&rx8025->work);
622	}
623
624	rx8025_sysfs_unregister(&client->dev);	558	rx8025_sysfs_unregister(&client->dev);
625	return 0;	559	return 0;
626	}	560	}
@@ -628,7 +562,6 @@ static int rx8025_remove(struct i2c_client *client) · 1 unmodified line
628	static struct i2c_driver rx8025_driver = {	562	static struct i2c_driver rx8025_driver = {
629	.driver = {	563	.driver = {
630	.name = "rtc-rx8025",	564	.name = "rtc-rx8025",
631	.owner = THIS_MODULE,
632	},	565	},
633	.probe = rx8025_probe,	566	.probe = rx8025_probe,
634	.remove = rx8025_remove,	567	.remove = rx8025_remove,

drivers/rtc/rtc-rx8581.c+0−1

@@ -315,7 +315,6 @@ MODULE_DEVICE_TABLE(i2c, rx8581_id); · 314 unmodified lines
315	static struct i2c_driver rx8581_driver = {	315	static struct i2c_driver rx8581_driver = {
316	.driver = {	316	.driver = {
317	.name = "rtc-rx8581",	317	.name = "rtc-rx8581",
318	.owner = THIS_MODULE,
319	},	318	},
320	.probe = rx8581_probe,	319	.probe = rx8581_probe,
321	.id_table = rx8581_id,	320	.id_table = rx8581_id,

drivers/rtc/rtc-s3c.c+21−7

 	void __iomem *base;
 	struct clk *rtc_clk;
 	struct clk *rtc_src_clk;
+	bool clk_disabled;
 	struct s3c_rtc_data *data;
 	unsigned long irq_flags;
 	spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
-	clk_enable(info->rtc_clk);
+	if (info->clk_disabled) {
-	if (info->data->needs_src_clk)
+		clk_enable(info->rtc_clk);
-		clk_enable(info->rtc_src_clk);
+		if (info->data->needs_src_clk)
+			clk_enable(info->rtc_src_clk);
+		info->clk_disabled = false;
+	}
 	spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
 }
 	unsigned long irq_flags;
 	spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
-	if (info->data->needs_src_clk)
+	if (!info->clk_disabled) {
-		clk_disable(info->rtc_src_clk);
+		if (info->data->needs_src_clk)
-	clk_disable(info->rtc_clk);
+			clk_disable(info->rtc_src_clk);
+		clk_disable(info->rtc_clk);
+		info->clk_disabled = true;
+	}
 	spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
 }
 	s3c_rtc_disable_clk(info);
+	if (enabled)
+		s3c_rtc_enable_clk(info);
+	else
+		s3c_rtc_disable_clk(info);
 	return 0;
 }
 	s3c_rtc_setaie(info->dev, 0);
+	if (info->data->needs_src_clk)
+		clk_unprepare(info->rtc_src_clk);
 	clk_unprepare(info->rtc_clk);
-	info->rtc_clk = NULL;
 	return 0;
 }
 		if (IS_ERR(info->rtc_src_clk)) {
 			dev_err(&pdev->dev,
 				"failed to find rtc source clock\n");
+			clk_disable_unprepare(info->rtc_clk);
 			return PTR_ERR(info->rtc_src_clk);
 		}
 		clk_prepare_enable(info->rtc_src_clk);

drivers/rtc/rtc-s5m.c+11−0

 	case S2MPS13X:
 		data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT);
 		ret = regmap_write(info->regmap, info->regs->ctrl, data[0]);
+		if (ret < 0)
+			break;
+		/*
+		 * Should set WUDR & (RUDR or AUDR) bits to high after writing
+		 * RTC_CTRL register like writing Alarm registers. We can't find
+		 * the description from datasheet but vendor code does that
+		 * really.
+		 */
+		ret = s5m8767_rtc_set_alarm_reg(info);
 		break;
 	default:
 	{ "s2mps14-rtc",	S2MPS14X },
 	{ },
 };
+MODULE_DEVICE_TABLE(platform, s5m_rtc_id);
 static struct platform_driver s5m_rtc_driver = {
 	.driver		= {

drivers/rtc/rtc-sa1100.c+84−55

@@ -35,24 +35,17 @@ · 34 unmodified lines
35	#include <linux/bitops.h>	35	#include <linux/bitops.h>
36	#include <linux/io.h>	36	#include <linux/io.h>
37		37
38	#include <mach/hardware.h>	38	#define RTSR_HZE BIT(3) /* HZ interrupt enable */
39	#include <mach/irqs.h>	39	#define RTSR_ALE BIT(2) /* RTC alarm interrupt enable */
		40	#define RTSR_HZ BIT(1) /* HZ rising-edge detected */
		41	#define RTSR_AL BIT(0) /* RTC alarm detected */
40		42
41	#if defined(CONFIG_ARCH_PXA) \|\| defined(CONFIG_ARCH_MMP)	43	#include "rtc-sa1100.h"
42	#include <mach/regs-rtc.h>
43	#endif
44		44
45	#define RTC_DEF_DIVIDER (32768 - 1)	45	#define RTC_DEF_DIVIDER (32768 - 1)
46	#define RTC_DEF_TRIM 0	46	#define RTC_DEF_TRIM 0
47	#define RTC_FREQ 1024	47	#define RTC_FREQ 1024
48		48
49	struct sa1100_rtc {
50	spinlock_t lock;
51	int irq_1hz;
52	int irq_alarm;
53	struct rtc_device *rtc;
54	struct clk *clk;
55	};
56		49
57	static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)	50	static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
58	{	51	{
@@ -63,16 +56,16 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) · 4 unmodified lines
63		56
64	spin_lock(&info->lock);	57	spin_lock(&info->lock);
65		58
66	rtsr = RTSR;	59	rtsr = readl_relaxed(info->rtsr);
67	/* clear interrupt sources */	60	/* clear interrupt sources */
68	RTSR = 0;	61	writel_relaxed(0, info->rtsr);
69	/* Fix for a nasty initialization problem the in SA11xx RTSR register.	62	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
70	* See also the comments in sa1100_rtc_probe(). */	63	* See also the comments in sa1100_rtc_probe(). */
71	if (rtsr & (RTSR_ALE \| RTSR_HZE)) {	64	if (rtsr & (RTSR_ALE \| RTSR_HZE)) {
72	/* This is the original code, before there was the if test	65	/* This is the original code, before there was the if test
73	* above. This code does not clear interrupts that were not	66	* above. This code does not clear interrupts that were not
74	* enabled. */	67	* enabled. */
75	RTSR = (RTSR_AL \| RTSR_HZ) & (rtsr >> 2);	68	writel_relaxed((RTSR_AL \| RTSR_HZ) & (rtsr >> 2), info->rtsr);
76	} else {	69	} else {
77	/* For some reason, it is possible to enter this routine	70	/* For some reason, it is possible to enter this routine
78	* without interruptions enabled, it has been tested with	71	* without interruptions enabled, it has been tested with
@@ -81,13 +74,13 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) · 2 unmodified lines
81	* This situation leads to an infinite "loop" of interrupt	74	* This situation leads to an infinite "loop" of interrupt
82	* routine calling and as a result the processor seems to	75	* routine calling and as a result the processor seems to
83	* lock on its first call to open(). */	76	* lock on its first call to open(). */
84	RTSR = RTSR_AL \| RTSR_HZ;	77	writel_relaxed(RTSR_AL \| RTSR_HZ, info->rtsr);
85	}	78	}
86		79
87	/* clear alarm interrupt if it has occurred */	80	/* clear alarm interrupt if it has occurred */
88	if (rtsr & RTSR_AL)	81	if (rtsr & RTSR_AL)
89	rtsr &= ~RTSR_ALE;	82	rtsr &= ~RTSR_ALE;
90	RTSR = rtsr & (RTSR_ALE \| RTSR_HZE);	83	writel_relaxed(rtsr & (RTSR_ALE \| RTSR_HZE), info->rtsr);
91		84
92	/* update irq data & counter */	85	/* update irq data & counter */
93	if (rtsr & RTSR_AL)	86	if (rtsr & RTSR_AL)
@@ -135,7 +128,7 @@ static void sa1100_rtc_release(struct device *dev) · 41 unmodified lines
135	struct sa1100_rtc *info = dev_get_drvdata(dev);	128	struct sa1100_rtc *info = dev_get_drvdata(dev);
136		129
137	spin_lock_irq(&info->lock);	130	spin_lock_irq(&info->lock);
138	RTSR = 0;	131	writel_relaxed(0, info->rtsr);
139	spin_unlock_irq(&info->lock);	132	spin_unlock_irq(&info->lock);
140		133
141	free_irq(info->irq_alarm, dev);	134	free_irq(info->irq_alarm, dev);
@@ -144,39 +137,46 @@ static void sa1100_rtc_release(struct device *dev) · 2 unmodified lines
144		137
145	static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)	138	static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
146	{	139	{
		140	u32 rtsr;
147	struct sa1100_rtc *info = dev_get_drvdata(dev);	141	struct sa1100_rtc *info = dev_get_drvdata(dev);
148		142
149	spin_lock_irq(&info->lock);	143	spin_lock_irq(&info->lock);
		144	rtsr = readl_relaxed(info->rtsr);
150	if (enabled)	145	if (enabled)
151	RTSR \|= RTSR_ALE;	146	rtsr \|= RTSR_ALE;
152	else	147	else
153	RTSR &= ~RTSR_ALE;	148	rtsr &= ~RTSR_ALE;
		149	writel_relaxed(rtsr, info->rtsr);
154	spin_unlock_irq(&info->lock);	150	spin_unlock_irq(&info->lock);
155	return 0;	151	return 0;
156	}	152	}
157		153
158	static int sa1100_rtc_read_time(struct device dev, struct rtc_time tm)	154	static int sa1100_rtc_read_time(struct device dev, struct rtc_time tm)
159	{	155	{
160	rtc_time_to_tm(RCNR, tm);	156	struct sa1100_rtc *info = dev_get_drvdata(dev);
		157
		158	rtc_time_to_tm(readl_relaxed(info->rcnr), tm);
161	return 0;	159	return 0;
162	}	160	}
163		161
164	static int sa1100_rtc_set_time(struct device dev, struct rtc_time tm)	162	static int sa1100_rtc_set_time(struct device dev, struct rtc_time tm)
165	{	163	{
		164	struct sa1100_rtc *info = dev_get_drvdata(dev);
166	unsigned long time;	165	unsigned long time;
167	int ret;	166	int ret;
168		167
169	ret = rtc_tm_to_time(tm, &time);	168	ret = rtc_tm_to_time(tm, &time);
170	if (ret == 0)	169	if (ret == 0)
171	RCNR = time;	170	writel_relaxed(time, info->rcnr);
172	return ret;	171	return ret;
173	}	172	}
174		173
175	static int sa1100_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)	174	static int sa1100_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
176	{	175	{
177	u32 rtsr;	176	u32 rtsr;
		177	struct sa1100_rtc *info = dev_get_drvdata(dev);
178		178
179	rtsr = RTSR;	179	rtsr = readl_relaxed(info->rtsr);
180	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;	180	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
181	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;	181	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
182	return 0;	182	return 0;
@@ -192,12 +192,13 @@ static int sa1100_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm) · 9 unmodified lines
192	ret = rtc_tm_to_time(&alrm->time, &time);	192	ret = rtc_tm_to_time(&alrm->time, &time);
193	if (ret != 0)	193	if (ret != 0)
194	goto out;	194	goto out;
195	RTSR = RTSR & (RTSR_HZE\|RTSR_ALE\|RTSR_AL);	195	writel_relaxed(readl_relaxed(info->rtsr) &
196	RTAR = time;	196	(RTSR_HZE \| RTSR_ALE \| RTSR_AL), info->rtsr);
		197	writel_relaxed(time, info->rtar);
197	if (alrm->enabled)	198	if (alrm->enabled)
198	RTSR \|= RTSR_ALE;	199	writel_relaxed(readl_relaxed(info->rtsr) \| RTSR_ALE, info->rtsr);
199	else	200	else
200	RTSR &= ~RTSR_ALE;	201	writel_relaxed(readl_relaxed(info->rtsr) & ~RTSR_ALE, info->rtsr);
201	out:	202	out:
202	spin_unlock_irq(&info->lock);	203	spin_unlock_irq(&info->lock);
203		204
@@ -206,8 +207,10 @@ out: · 2 unmodified lines
206		207
207	static int sa1100_rtc_proc(struct device dev, struct seq_file seq)	208	static int sa1100_rtc_proc(struct device dev, struct seq_file seq)
208	{	209	{
209	seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);	210	struct sa1100_rtc *info = dev_get_drvdata(dev);
210	seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);	211
		212	seq_printf(seq, "trim/divider\t\t: 0x%08x\n", readl_relaxed(info->rttr));
		213	seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", readl_relaxed(info->rtsr));
211		214
212	return 0;	215	return 0;
213	}	216	}
@@ -223,29 +226,18 @@ static const struct rtc_class_ops sa1100_rtc_ops = { · 9 unmodified lines
223	.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,	226	.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
224	};	227	};
225		228
226	static int sa1100_rtc_probe(struct platform_device *pdev)	229	int sa1100_rtc_init(struct platform_device pdev, struct sa1100_rtc info)
227	{	230	{
228	struct rtc_device *rtc;	231	struct rtc_device *rtc;
229	struct sa1100_rtc *info;	232	int ret;
230	int irq_1hz, irq_alarm, ret = 0;
231		233
232	irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");	234	spin_lock_init(&info->lock);
233	irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
234	if (irq_1hz < 0 \|\| irq_alarm < 0)
235	return -ENODEV;
236		235
237	info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
238	if (!info)
239	return -ENOMEM;
240	info->clk = devm_clk_get(&pdev->dev, NULL);	236	info->clk = devm_clk_get(&pdev->dev, NULL);
241	if (IS_ERR(info->clk)) {	237	if (IS_ERR(info->clk)) {
242	dev_err(&pdev->dev, "failed to find rtc clock source\n");	238	dev_err(&pdev->dev, "failed to find rtc clock source\n");
243	return PTR_ERR(info->clk);	239	return PTR_ERR(info->clk);
244	}	240	}
245	info->irq_1hz = irq_1hz;
246	info->irq_alarm = irq_alarm;
247	spin_lock_init(&info->lock);
248	platform_set_drvdata(pdev, info);
249		241
250	ret = clk_prepare_enable(info->clk);	242	ret = clk_prepare_enable(info->clk);
251	if (ret)	243	if (ret)
@@ -257,22 +249,19 @@ static int sa1100_rtc_probe(struct platform_device *pdev) · 5 unmodified lines
257	* If the clock divider is uninitialized then reset it to the	249	* If the clock divider is uninitialized then reset it to the
258	* default value to get the 1Hz clock.	250	* default value to get the 1Hz clock.
259	*/	251	*/
260	if (RTTR == 0) {	252	if (readl_relaxed(info->rttr) == 0) {
261	RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);	253	writel_relaxed(RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16), info->rttr);
262	dev_warn(&pdev->dev, "warning: "	254	dev_warn(&pdev->dev, "warning: "
263	"initializing default clock divider/trim value\n");	255	"initializing default clock divider/trim value\n");
264	/* The current RTC value probably doesn't make sense either */	256	/* The current RTC value probably doesn't make sense either */
265	RCNR = 0;	257	writel_relaxed(0, info->rcnr);
266	}	258	}
267		259
268	device_init_wakeup(&pdev->dev, 1);
269
270	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,	260	rtc = devm_rtc_device_register(&pdev->dev, pdev->name, &sa1100_rtc_ops,
271	THIS_MODULE);	261	THIS_MODULE);
272
273	if (IS_ERR(rtc)) {	262	if (IS_ERR(rtc)) {
274	ret = PTR_ERR(rtc);	263	clk_disable_unprepare(info->clk);
275	goto err_dev;	264	return PTR_ERR(rtc);
276	}	265	}
277	info->rtc = rtc;	266	info->rtc = rtc;
278		267
@@ -298,12 +287,52 @@ static int sa1100_rtc_probe(struct platform_device *pdev) · 19 unmodified lines
298	*	287	*
299	* Notice that clearing bit 1 and 0 is accomplished by writting ONES to	288	* Notice that clearing bit 1 and 0 is accomplished by writting ONES to
300	* the corresponding bits in RTSR. */	289	* the corresponding bits in RTSR. */
301	RTSR = RTSR_AL \| RTSR_HZ;	290	writel_relaxed(RTSR_AL \| RTSR_HZ, info->rtsr);
302		291
303	return 0;	292	return 0;
304	err_dev:	293	}
305	clk_disable_unprepare(info->clk);	294	EXPORT_SYMBOL_GPL(sa1100_rtc_init);
306	return ret;	295
		296	static int sa1100_rtc_probe(struct platform_device *pdev)
		297	{
		298	struct sa1100_rtc *info;
		299	struct resource *iores;
		300	void __iomem *base;
		301	int irq_1hz, irq_alarm;
		302
		303	irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
		304	irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
		305	if (irq_1hz < 0 \|\| irq_alarm < 0)
		306	return -ENODEV;
		307
		308	info = devm_kzalloc(&pdev->dev, sizeof(struct sa1100_rtc), GFP_KERNEL);
		309	if (!info)
		310	return -ENOMEM;
		311	info->irq_1hz = irq_1hz;
		312	info->irq_alarm = irq_alarm;
		313
		314	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		315	base = devm_ioremap_resource(&pdev->dev, iores);
		316	if (IS_ERR(base))
		317	return PTR_ERR(base);
		318
		319	if (IS_ENABLED(CONFIG_ARCH_SA1100) \|\|
		320	of_device_is_compatible(pdev->dev.of_node, "mrvl,sa1100-rtc")) {
		321	info->rcnr = base + 0x04;
		322	info->rtsr = base + 0x10;
		323	info->rtar = base + 0x00;
		324	info->rttr = base + 0x08;
		325	} else {
		326	info->rcnr = base + 0x0;
		327	info->rtsr = base + 0x8;
		328	info->rtar = base + 0x4;
		329	info->rttr = base + 0xc;
		330	}
		331
		332	platform_set_drvdata(pdev, info);
		333	device_init_wakeup(&pdev->dev, 1);
		334
		335	return sa1100_rtc_init(pdev, info);
307	}	336	}
308		337
309	static int sa1100_rtc_remove(struct platform_device *pdev)	338	static int sa1100_rtc_remove(struct platform_device *pdev)

drivers/rtc/rtc-sa1100.h+23−0

@@ -0,0 +1,23 @@
	1	#ifndef __RTC_SA1100_H__
	2	#define __RTC_SA1100_H__
	3
	4	#include <linux/kernel.h>
	5
	6	struct clk;
	7	struct platform_device;
	8
	9	struct sa1100_rtc {
	10	spinlock_t lock;
	11	void __iomem *rcnr;
	12	void __iomem *rtar;
	13	void __iomem *rtsr;
	14	void __iomem *rttr;
	15	int irq_1hz;
	16	int irq_alarm;
	17	struct rtc_device *rtc;
	18	struct clk *clk;
	19	};
	20
	21	int sa1100_rtc_init(struct platform_device pdev, struct sa1100_rtc info);
	22
	23	#endif

drivers/rtc/rtc-sirfsoc.c+64−43

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	#include <linux/slab.h>	13	#include <linux/slab.h>
14	#include <linux/io.h>	14	#include <linux/io.h>
15	#include <linux/of.h>	15	#include <linux/of.h>
		16	#include <linux/regmap.h>
16	#include <linux/rtc/sirfsoc_rtciobrg.h>	17	#include <linux/rtc/sirfsoc_rtciobrg.h>
17		18
18		19
@@ -48,12 +49,27 @@ struct sirfsoc_rtc_drv { · 29 unmodified lines
48	/* Overflow for every 8 years extra time */	49	/* Overflow for every 8 years extra time */
49	u32 overflow_rtc;	50	u32 overflow_rtc;
50	spinlock_t lock;	51	spinlock_t lock;
		52	struct regmap *regmap;
51	#ifdef CONFIG_PM	53	#ifdef CONFIG_PM
52	u32 saved_counter;	54	u32 saved_counter;
53	u32 saved_overflow_rtc;	55	u32 saved_overflow_rtc;
54	#endif	56	#endif
55	};	57	};
56		58
		59	static u32 sirfsoc_rtc_readl(struct sirfsoc_rtc_drv *rtcdrv, u32 offset)
		60	{
		61	u32 val;
		62
		63	regmap_read(rtcdrv->regmap, rtcdrv->rtc_base + offset, &val);
		64	return val;
		65	}
		66
		67	static void sirfsoc_rtc_writel(struct sirfsoc_rtc_drv *rtcdrv,
		68	u32 offset, u32 val)
		69	{
		70	regmap_write(rtcdrv->regmap, rtcdrv->rtc_base + offset, val);
		71	}
		72
57	static int sirfsoc_rtc_read_alarm(struct device *dev,	73	static int sirfsoc_rtc_read_alarm(struct device *dev,
58	struct rtc_wkalrm *alrm)	74	struct rtc_wkalrm *alrm)
59	{	75	{
@@ -64,9 +80,9 @@ static int sirfsoc_rtc_read_alarm(struct device *dev, · 4 unmodified lines
64		80
65	spin_lock_irq(&rtcdrv->lock);	81	spin_lock_irq(&rtcdrv->lock);
66		82
67	rtc_count = sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_CN);	83	rtc_count = sirfsoc_rtc_readl(rtcdrv, RTC_CN);
68		84
69	rtc_alarm = sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_ALARM0);	85	rtc_alarm = sirfsoc_rtc_readl(rtcdrv, RTC_ALARM0);
70	memset(alrm, 0, sizeof(struct rtc_wkalrm));	86	memset(alrm, 0, sizeof(struct rtc_wkalrm));
71		87
72	/*	88	/*
@@ -82,8 +98,7 @@ static int sirfsoc_rtc_read_alarm(struct device *dev, · 9 unmodified lines
82	rtc_time_to_tm(rtcdrv->overflow_rtc	98	rtc_time_to_tm(rtcdrv->overflow_rtc
83	<< (BITS_PER_LONG - RTC_SHIFT)	99	<< (BITS_PER_LONG - RTC_SHIFT)
84	\| rtc_alarm >> RTC_SHIFT, &(alrm->time));	100	\| rtc_alarm >> RTC_SHIFT, &(alrm->time));
85	if (sirfsoc_rtc_iobrg_readl(	101	if (sirfsoc_rtc_readl(rtcdrv, RTC_STATUS) & SIRFSOC_RTC_AL0E)
86	rtcdrv->rtc_base + RTC_STATUS) & SIRFSOC_RTC_AL0E)
87	alrm->enabled = 1;	102	alrm->enabled = 1;
88		103
89	spin_unlock_irq(&rtcdrv->lock);	104	spin_unlock_irq(&rtcdrv->lock);
@@ -103,8 +118,7 @@ static int sirfsoc_rtc_set_alarm(struct device *dev, · 13 unmodified lines
103		118
104	spin_lock_irq(&rtcdrv->lock);	119	spin_lock_irq(&rtcdrv->lock);
105		120
106	rtc_status_reg = sirfsoc_rtc_iobrg_readl(	121	rtc_status_reg = sirfsoc_rtc_readl(rtcdrv, RTC_STATUS);
107	rtcdrv->rtc_base + RTC_STATUS);
108	if (rtc_status_reg & SIRFSOC_RTC_AL0E) {	122	if (rtc_status_reg & SIRFSOC_RTC_AL0E) {
109	/*	123	/*
110	* An ongoing alarm in progress - ingore it and not	124	* An ongoing alarm in progress - ingore it and not
@@ -113,8 +127,7 @@ static int sirfsoc_rtc_set_alarm(struct device *dev, · 2 unmodified lines
113	dev_info(dev, "An old alarm was set, will be replaced by a new one\n");	127	dev_info(dev, "An old alarm was set, will be replaced by a new one\n");
114	}	128	}
115		129
116	sirfsoc_rtc_iobrg_writel(	130	sirfsoc_rtc_writel(rtcdrv, RTC_ALARM0, rtc_alarm << RTC_SHIFT);
117	rtc_alarm << RTC_SHIFT, rtcdrv->rtc_base + RTC_ALARM0);
118	rtc_status_reg &= ~0x07; /* mask out the lower status bits */	131	rtc_status_reg &= ~0x07; /* mask out the lower status bits */
119	/*	132	/*
120	* This bit RTC_AL sets it as a wake-up source for Sleep Mode	133	* This bit RTC_AL sets it as a wake-up source for Sleep Mode
@@ -123,8 +136,7 @@ static int sirfsoc_rtc_set_alarm(struct device *dev, · 2 unmodified lines
123	rtc_status_reg \|= SIRFSOC_RTC_AL0;	136	rtc_status_reg \|= SIRFSOC_RTC_AL0;
124	/* enable the RTC alarm interrupt */	137	/* enable the RTC alarm interrupt */
125	rtc_status_reg \|= SIRFSOC_RTC_AL0E;	138	rtc_status_reg \|= SIRFSOC_RTC_AL0E;
126	sirfsoc_rtc_iobrg_writel(	139	sirfsoc_rtc_writel(rtcdrv, RTC_STATUS, rtc_status_reg);
127	rtc_status_reg, rtcdrv->rtc_base + RTC_STATUS);
128		140
129	spin_unlock_irq(&rtcdrv->lock);	141	spin_unlock_irq(&rtcdrv->lock);
130	} else {	142	} else {
@@ -135,8 +147,7 @@ static int sirfsoc_rtc_set_alarm(struct device *dev, · 4 unmodified lines
135	*/	147	*/
136	spin_lock_irq(&rtcdrv->lock);	148	spin_lock_irq(&rtcdrv->lock);
137		149
138	rtc_status_reg = sirfsoc_rtc_iobrg_readl(	150	rtc_status_reg = sirfsoc_rtc_readl(rtcdrv, RTC_STATUS);
139	rtcdrv->rtc_base + RTC_STATUS);
140	if (rtc_status_reg & SIRFSOC_RTC_AL0E) {	151	if (rtc_status_reg & SIRFSOC_RTC_AL0E) {
141	/* clear the RTC status register's alarm bit */	152	/* clear the RTC status register's alarm bit */
142	rtc_status_reg &= ~0x07;	153	rtc_status_reg &= ~0x07;
@@ -145,8 +156,8 @@ static int sirfsoc_rtc_set_alarm(struct device *dev, · 2 unmodified lines
145	/* Clear the Alarm enable bit */	156	/* Clear the Alarm enable bit */
146	rtc_status_reg &= ~(SIRFSOC_RTC_AL0E);	157	rtc_status_reg &= ~(SIRFSOC_RTC_AL0E);
147		158
148	sirfsoc_rtc_iobrg_writel(rtc_status_reg,	159	sirfsoc_rtc_writel(rtcdrv, RTC_STATUS,
149	rtcdrv->rtc_base + RTC_STATUS);	160	rtc_status_reg);
150	}	161	}
151		162
152	spin_unlock_irq(&rtcdrv->lock);	163	spin_unlock_irq(&rtcdrv->lock);
@@ -167,9 +178,9 @@ static int sirfsoc_rtc_read_time(struct device *dev, · 14 unmodified lines
167	* fail, read several times to make sure get stable value.	178	* fail, read several times to make sure get stable value.
168	*/	179	*/
169	do {	180	do {
170	tmp_rtc = sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_CN);	181	tmp_rtc = sirfsoc_rtc_readl(rtcdrv, RTC_CN);
171	cpu_relax();	182	cpu_relax();
172	} while (tmp_rtc != sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_CN));	183	} while (tmp_rtc != sirfsoc_rtc_readl(rtcdrv, RTC_CN));
173		184
174	rtc_time_to_tm(rtcdrv->overflow_rtc << (BITS_PER_LONG - RTC_SHIFT) \|	185	rtc_time_to_tm(rtcdrv->overflow_rtc << (BITS_PER_LONG - RTC_SHIFT) \|
175	tmp_rtc >> RTC_SHIFT, tm);	186	tmp_rtc >> RTC_SHIFT, tm);
@@ -187,10 +198,8 @@ static int sirfsoc_rtc_set_time(struct device *dev, · 11 unmodified lines
187		198
188	rtcdrv->overflow_rtc = rtc_time >> (BITS_PER_LONG - RTC_SHIFT);	199	rtcdrv->overflow_rtc = rtc_time >> (BITS_PER_LONG - RTC_SHIFT);
189		200
190	sirfsoc_rtc_iobrg_writel(rtcdrv->overflow_rtc,	201	sirfsoc_rtc_writel(rtcdrv, RTC_SW_VALUE, rtcdrv->overflow_rtc);
191	rtcdrv->rtc_base + RTC_SW_VALUE);	202	sirfsoc_rtc_writel(rtcdrv, RTC_CN, rtc_time << RTC_SHIFT);
192	sirfsoc_rtc_iobrg_writel(
193	rtc_time << RTC_SHIFT, rtcdrv->rtc_base + RTC_CN);
194		203
195	return 0;	204	return 0;
196	}	205	}
@@ -222,14 +231,13 @@ static int sirfsoc_rtc_alarm_irq_enable(struct device *dev, · 25 unmodified lines
222		231
223	spin_lock_irq(&rtcdrv->lock);	232	spin_lock_irq(&rtcdrv->lock);
224		233
225	rtc_status_reg = sirfsoc_rtc_iobrg_readl(	234	rtc_status_reg = sirfsoc_rtc_readl(rtcdrv, RTC_STATUS);
226	rtcdrv->rtc_base + RTC_STATUS);
227	if (enabled)	235	if (enabled)
228	rtc_status_reg \|= SIRFSOC_RTC_AL0E;	236	rtc_status_reg \|= SIRFSOC_RTC_AL0E;
229	else	237	else
230	rtc_status_reg &= ~SIRFSOC_RTC_AL0E;	238	rtc_status_reg &= ~SIRFSOC_RTC_AL0E;
231		239
232	sirfsoc_rtc_iobrg_writel(rtc_status_reg, rtcdrv->rtc_base + RTC_STATUS);	240	sirfsoc_rtc_writel(rtcdrv, RTC_STATUS, rtc_status_reg);
233		241
234	spin_unlock_irq(&rtcdrv->lock);	242	spin_unlock_irq(&rtcdrv->lock);
235		243
@@ -254,7 +262,7 @@ static irqreturn_t sirfsoc_rtc_irq_handler(int irq, void *pdata) · 18 unmodified lines
254		262
255	spin_lock(&rtcdrv->lock);	263	spin_lock(&rtcdrv->lock);
256		264
257	rtc_status_reg = sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_STATUS);	265	rtc_status_reg = sirfsoc_rtc_readl(rtcdrv, RTC_STATUS);
258	/* this bit will be set ONLY if an alarm was active	266	/* this bit will be set ONLY if an alarm was active
259	* and it expired NOW	267	* and it expired NOW
260	* So this is being used as an ASSERT	268	* So this is being used as an ASSERT
@@ -270,7 +278,8 @@ static irqreturn_t sirfsoc_rtc_irq_handler(int irq, void *pdata) · 9 unmodified lines
270	/* Clear the Alarm enable bit */	278	/* Clear the Alarm enable bit */
271	rtc_status_reg &= ~(SIRFSOC_RTC_AL0E);	279	rtc_status_reg &= ~(SIRFSOC_RTC_AL0E);
272	}	280	}
273	sirfsoc_rtc_iobrg_writel(rtc_status_reg, rtcdrv->rtc_base + RTC_STATUS);	281
		282	sirfsoc_rtc_writel(rtcdrv, RTC_STATUS, rtc_status_reg);
274		283
275	spin_unlock(&rtcdrv->lock);	284	spin_unlock(&rtcdrv->lock);
276		285
@@ -287,6 +296,13 @@ static const struct of_device_id sirfsoc_rtc_of_match[] = { · 10 unmodified lines
287	{ .compatible = "sirf,prima2-sysrtc"},	296	{ .compatible = "sirf,prima2-sysrtc"},
288	{},	297	{},
289	};	298	};
		299
		300	const struct regmap_config sysrtc_regmap_config = {
		301	.reg_bits = 32,
		302	.val_bits = 32,
		303	.fast_io = true,
		304	};
		305
290	MODULE_DEVICE_TABLE(of, sirfsoc_rtc_of_match);	306	MODULE_DEVICE_TABLE(of, sirfsoc_rtc_of_match);
291		307
292	static int sirfsoc_rtc_probe(struct platform_device *pdev)	308	static int sirfsoc_rtc_probe(struct platform_device *pdev)
@@ -314,27 +330,35 @@ static int sirfsoc_rtc_probe(struct platform_device *pdev) · 21 unmodified lines
314	/* Register rtc alarm as a wakeup source */	330	/* Register rtc alarm as a wakeup source */
315	device_init_wakeup(&pdev->dev, 1);	331	device_init_wakeup(&pdev->dev, 1);
316		332
		333	rtcdrv->regmap = devm_regmap_init_iobg(&pdev->dev,
		334	&sysrtc_regmap_config);
		335	if (IS_ERR(rtcdrv->regmap)) {
		336	err = PTR_ERR(rtcdrv->regmap);
		337	dev_err(&pdev->dev, "Failed to allocate register map: %d\n",
		338	err);
		339	return err;
		340	}
		341
317	/*	342	/*
318	* Set SYS_RTC counter in RTC_HZ HZ Units	343	* Set SYS_RTC counter in RTC_HZ HZ Units
319	* We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1	344	* We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1
320	* If 16HZ, therefore RTC_DIV = 1023;	345	* If 16HZ, therefore RTC_DIV = 1023;
321	*/	346	*/
322	rtc_div = ((32768 / RTC_HZ) / 2) - 1;	347	rtc_div = ((32768 / RTC_HZ) / 2) - 1;
323	sirfsoc_rtc_iobrg_writel(rtc_div, rtcdrv->rtc_base + RTC_DIV);	348	sirfsoc_rtc_writel(rtcdrv, RTC_DIV, rtc_div);
324		349
325	/* 0x3 -> RTC_CLK */	350	/* 0x3 -> RTC_CLK */
326	sirfsoc_rtc_iobrg_writel(SIRFSOC_RTC_CLK,	351	sirfsoc_rtc_writel(rtcdrv, RTC_CLOCK_SWITCH, SIRFSOC_RTC_CLK);
327	rtcdrv->rtc_base + RTC_CLOCK_SWITCH);
328		352
329	/* reset SYS RTC ALARM0 */	353	/* reset SYS RTC ALARM0 */
330	sirfsoc_rtc_iobrg_writel(0x0, rtcdrv->rtc_base + RTC_ALARM0);	354	sirfsoc_rtc_writel(rtcdrv, RTC_ALARM0, 0x0);
331		355
332	/* reset SYS RTC ALARM1 */	356	/* reset SYS RTC ALARM1 */
333	sirfsoc_rtc_iobrg_writel(0x0, rtcdrv->rtc_base + RTC_ALARM1);	357	sirfsoc_rtc_writel(rtcdrv, RTC_ALARM1, 0x0);
334		358
335	/* Restore RTC Overflow From Register After Command Reboot */	359	/* Restore RTC Overflow From Register After Command Reboot */
336	rtcdrv->overflow_rtc =	360	rtcdrv->overflow_rtc =
337	sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_SW_VALUE);	361	sirfsoc_rtc_readl(rtcdrv, RTC_SW_VALUE);
338		362
339	rtcdrv->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,	363	rtcdrv->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
340	&sirfsoc_rtc_ops, THIS_MODULE);	364	&sirfsoc_rtc_ops, THIS_MODULE);
@@ -372,10 +396,10 @@ static int sirfsoc_rtc_suspend(struct device *dev) · 31 unmodified lines
372	{	396	{
373	struct sirfsoc_rtc_drv *rtcdrv = dev_get_drvdata(dev);	397	struct sirfsoc_rtc_drv *rtcdrv = dev_get_drvdata(dev);
374	rtcdrv->overflow_rtc =	398	rtcdrv->overflow_rtc =
375	sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_SW_VALUE);	399	sirfsoc_rtc_readl(rtcdrv, RTC_SW_VALUE);
376		400
377	rtcdrv->saved_counter =	401	rtcdrv->saved_counter =
378	sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_CN);	402	sirfsoc_rtc_readl(rtcdrv, RTC_CN);
379	rtcdrv->saved_overflow_rtc = rtcdrv->overflow_rtc;	403	rtcdrv->saved_overflow_rtc = rtcdrv->overflow_rtc;
380	if (device_may_wakeup(dev) && !enable_irq_wake(rtcdrv->irq))	404	if (device_may_wakeup(dev) && !enable_irq_wake(rtcdrv->irq))
381	rtcdrv->irq_wake = 1;	405	rtcdrv->irq_wake = 1;
@@ -392,12 +416,10 @@ static int sirfsoc_rtc_resume(struct device *dev) · 10 unmodified lines
392	* if resume from snapshot and the rtc power is lost,	416	* if resume from snapshot and the rtc power is lost,
393	* restroe the rtc settings	417	* restroe the rtc settings
394	*/	418	*/
395	if (SIRFSOC_RTC_CLK != sirfsoc_rtc_iobrg_readl(	419	if (SIRFSOC_RTC_CLK != sirfsoc_rtc_readl(rtcdrv, RTC_CLOCK_SWITCH)) {
396	rtcdrv->rtc_base + RTC_CLOCK_SWITCH)) {
397	u32 rtc_div;	420	u32 rtc_div;
398	/* 0x3 -> RTC_CLK */	421	/* 0x3 -> RTC_CLK */
399	sirfsoc_rtc_iobrg_writel(SIRFSOC_RTC_CLK,	422	sirfsoc_rtc_writel(rtcdrv, RTC_CLOCK_SWITCH, SIRFSOC_RTC_CLK);
400	rtcdrv->rtc_base + RTC_CLOCK_SWITCH);
401	/*	423	/*
402	* Set SYS_RTC counter in RTC_HZ HZ Units	424	* Set SYS_RTC counter in RTC_HZ HZ Units
403	* We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1	425	* We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1
@@ -405,13 +427,13 @@ static int sirfsoc_rtc_resume(struct device *dev) · 1 unmodified line
405	*/	427	*/
406	rtc_div = ((32768 / RTC_HZ) / 2) - 1;	428	rtc_div = ((32768 / RTC_HZ) / 2) - 1;
407		429
408	sirfsoc_rtc_iobrg_writel(rtc_div, rtcdrv->rtc_base + RTC_DIV);	430	sirfsoc_rtc_writel(rtcdrv, RTC_DIV, rtc_div);
409		431
410	/* reset SYS RTC ALARM0 */	432	/* reset SYS RTC ALARM0 */
411	sirfsoc_rtc_iobrg_writel(0x0, rtcdrv->rtc_base + RTC_ALARM0);	433	sirfsoc_rtc_writel(rtcdrv, RTC_ALARM0, 0x0);
412		434
413	/* reset SYS RTC ALARM1 */	435	/* reset SYS RTC ALARM1 */
414	sirfsoc_rtc_iobrg_writel(0x0, rtcdrv->rtc_base + RTC_ALARM1);	436	sirfsoc_rtc_writel(rtcdrv, RTC_ALARM1, 0x0);
415	}	437	}
416	rtcdrv->overflow_rtc = rtcdrv->saved_overflow_rtc;	438	rtcdrv->overflow_rtc = rtcdrv->saved_overflow_rtc;
417		439
@@ -419,15 +441,14 @@ static int sirfsoc_rtc_resume(struct device *dev) · 1 unmodified line
419	* if current counter is small than previous,	441	* if current counter is small than previous,
420	* it means overflow in sleep	442	* it means overflow in sleep
421	*/	443	*/
422	tmp = sirfsoc_rtc_iobrg_readl(rtcdrv->rtc_base + RTC_CN);	444	tmp = sirfsoc_rtc_readl(rtcdrv, RTC_CN);
423	if (tmp <= rtcdrv->saved_counter)	445	if (tmp <= rtcdrv->saved_counter)
424	rtcdrv->overflow_rtc++;	446	rtcdrv->overflow_rtc++;
425	/*	447	/*
426	*PWRC Value Be Changed When Suspend, Restore Overflow	448	*PWRC Value Be Changed When Suspend, Restore Overflow
427	* In Memory To Register	449	* In Memory To Register
428	*/	450	*/
429	sirfsoc_rtc_iobrg_writel(rtcdrv->overflow_rtc,	451	sirfsoc_rtc_writel(rtcdrv, RTC_SW_VALUE, rtcdrv->overflow_rtc);
430	rtcdrv->rtc_base + RTC_SW_VALUE);
431		452
432	if (device_may_wakeup(dev) && rtcdrv->irq_wake) {	453	if (device_may_wakeup(dev) && rtcdrv->irq_wake) {
433	disable_irq_wake(rtcdrv->irq);	454	disable_irq_wake(rtcdrv->irq);

drivers/rtc/rtc-stk17ta8.c+2−2

@@ -254,7 +254,7 @@ static ssize_t stk17ta8_nvram_read(struct file filp, struct kobject kobj, · 253 unmodified lines
254	void __iomem *ioaddr = pdata->ioaddr;	254	void __iomem *ioaddr = pdata->ioaddr;
255	ssize_t count;	255	ssize_t count;
256		256
257	for (count = 0; size > 0 && pos < RTC_OFFSET; count++, size--)	257	for (count = 0; count < size; count++)
258	*buf++ = readb(ioaddr + pos++);	258	*buf++ = readb(ioaddr + pos++);
259	return count;	259	return count;
260	}	260	}
@@ -269,7 +269,7 @@ static ssize_t stk17ta8_nvram_write(struct file filp, struct kobject kobj, · 8 unmodified lines
269	void __iomem *ioaddr = pdata->ioaddr;	269	void __iomem *ioaddr = pdata->ioaddr;
270	ssize_t count;	270	ssize_t count;
271		271
272	for (count = 0; size > 0 && pos < RTC_OFFSET; count++, size--)	272	for (count = 0; count < size; count++)
273	writeb(*buf++, ioaddr + pos++);	273	writeb(*buf++, ioaddr + pos++);
274	return count;	274	return count;
275	}	275	}

drivers/rtc/rtc-sysfs.c+36−36

@@ -122,20 +122,8 @@ hctosys_show(struct device dev, struct device_attribute attr, char *buf) · 121 unmodified lines
122	}	122	}
123	static DEVICE_ATTR_RO(hctosys);	123	static DEVICE_ATTR_RO(hctosys);
124		124
125	static struct attribute *rtc_attrs[] = {
126	&dev_attr_name.attr,
127	&dev_attr_date.attr,
128	&dev_attr_time.attr,
129	&dev_attr_since_epoch.attr,
130	&dev_attr_max_user_freq.attr,
131	&dev_attr_hctosys.attr,
132	NULL,
133	};
134	ATTRIBUTE_GROUPS(rtc);
135
136	static ssize_t	125	static ssize_t
137	rtc_sysfs_show_wakealarm(struct device dev, struct device_attribute attr,	126	wakealarm_show(struct device dev, struct device_attribute attr, char *buf)
138	char *buf)
139	{	127	{
140	ssize_t retval;	128	ssize_t retval;
141	unsigned long alarm;	129	unsigned long alarm;
@@ -159,7 +147,7 @@ rtc_sysfs_show_wakealarm(struct device dev, struct device_attribute attr, · 17 unmodified lines
159	}	147	}
160		148
161	static ssize_t	149	static ssize_t
162	rtc_sysfs_set_wakealarm(struct device dev, struct device_attribute attr,	150	wakealarm_store(struct device dev, struct device_attribute attr,
163	const char *buf, size_t n)	151	const char *buf, size_t n)
164	{	152	{
165	ssize_t retval;	153	ssize_t retval;
@@ -221,45 +209,57 @@ rtc_sysfs_set_wakealarm(struct device dev, struct device_attribute attr, · 55 unmodified lines
221	retval = rtc_set_alarm(rtc, &alm);	209	retval = rtc_set_alarm(rtc, &alm);
222	return (retval < 0) ? retval : n;	210	return (retval < 0) ? retval : n;
223	}	211	}
224	static DEVICE_ATTR(wakealarm, S_IRUGO \| S_IWUSR,	212	static DEVICE_ATTR_RW(wakealarm);
225	rtc_sysfs_show_wakealarm, rtc_sysfs_set_wakealarm);
226		213
		214	static struct attribute *rtc_attrs[] = {
		215	&dev_attr_name.attr,
		216	&dev_attr_date.attr,
		217	&dev_attr_time.attr,
		218	&dev_attr_since_epoch.attr,
		219	&dev_attr_max_user_freq.attr,
		220	&dev_attr_hctosys.attr,
		221	&dev_attr_wakealarm.attr,
		222	NULL,
		223	};
227		224
228	/* The reason to trigger an alarm with no process watching it (via sysfs)	225	/* The reason to trigger an alarm with no process watching it (via sysfs)
229	* is its side effect: waking from a system state like suspend-to-RAM or	226	* is its side effect: waking from a system state like suspend-to-RAM or
230	* suspend-to-disk. So: no attribute unless that side effect is possible.	227	* suspend-to-disk. So: no attribute unless that side effect is possible.
231	* (Userspace may disable that mechanism later.)	228	* (Userspace may disable that mechanism later.)
232	*/	229	*/
233	static inline int rtc_does_wakealarm(struct rtc_device *rtc)	230	static bool rtc_does_wakealarm(struct rtc_device *rtc)
234	{	231	{
235	if (!device_can_wakeup(rtc->dev.parent))	232	if (!device_can_wakeup(rtc->dev.parent))
236	return 0;	233	return false;
		234
237	return rtc->ops->set_alarm != NULL;	235	return rtc->ops->set_alarm != NULL;
238	}	236	}
239		237
240		238	static umode_t rtc_attr_is_visible(struct kobject *kobj,
241	void rtc_sysfs_add_device(struct rtc_device *rtc)	239	struct attribute *attr, int n)
242	{	240	{
243	int err;	241	struct device *dev = container_of(kobj, struct device, kobj);
		242	struct rtc_device *rtc = to_rtc_device(dev);
		243	umode_t mode = attr->mode;
244		244
245	/* not all RTCs support both alarms and wakeup */	245	if (attr == &dev_attr_wakealarm.attr)
246	if (!rtc_does_wakealarm(rtc))	246	if (!rtc_does_wakealarm(rtc))
247	return;	247	mode = 0;
248		248
249	err = device_create_file(&rtc->dev, &dev_attr_wakealarm);	249	return mode;
250	if (err)
251	dev_err(rtc->dev.parent,
252	"failed to create alarm attribute, %d\n", err);
253	}	250	}
254		251
255	void rtc_sysfs_del_device(struct rtc_device *rtc)	252	static struct attribute_group rtc_attr_group = {
256	{	253	.is_visible = rtc_attr_is_visible,
257	/* REVISIT did we add it successfully? */	254	.attrs = rtc_attrs,
258	if (rtc_does_wakealarm(rtc))	255	};
259	device_remove_file(&rtc->dev, &dev_attr_wakealarm);	256
260	}	257	static const struct attribute_group *rtc_attr_groups[] = {
		258	&rtc_attr_group,
		259	NULL
		260	};
261		261
262	void __init rtc_sysfs_init(struct class *rtc_class)	262	const struct attribute_group **rtc_get_dev_attribute_groups(void)
263	{	263	{
264	rtc_class->dev_groups = rtc_groups;	264	return rtc_attr_groups;
265	}	265	}

drivers/rtc/rtc-tx4939.c+2−4

 	ssize_t count;
 	spin_lock_irq(&pdata->lock);
-	for (count = 0; size > 0 && pos < TX4939_RTC_REG_RAMSIZE;
+	for (count = 0; count < size; count++) {
-	     count++, size--) {
 		__raw_writel(pos++, &rtcreg->adr);
 		*buf++ = __raw_readl(&rtcreg->dat);
 	}
 	ssize_t count;
 	spin_lock_irq(&pdata->lock);
-	for (count = 0; size > 0 && pos < TX4939_RTC_REG_RAMSIZE;
+	for (count = 0; count < size; count++) {
-	     count++, size--) {
 		__raw_writel(pos++, &rtcreg->adr);
 		__raw_writel(*buf++, &rtcreg->dat);
 	}

drivers/rtc/rtc-vt8500.c+1−0

@@ -271,6 +271,7 @@ static const struct of_device_id wmt_dt_ids[] = { · 270 unmodified lines
271	{ .compatible = "via,vt8500-rtc", },	271	{ .compatible = "via,vt8500-rtc", },
272	{}	272	{}
273	};	273	};
		274	MODULE_DEVICE_TABLE(of, wmt_dt_ids);
274		275
275	static struct platform_driver vt8500_rtc_driver = {	276	static struct platform_driver vt8500_rtc_driver = {
276	.probe = vt8500_rtc_probe,	277	.probe = vt8500_rtc_probe,

drivers/rtc/rtc-zynqmp.c+279−0

@@ -0,0 +1,279 @@
	1	/*
	2	* Xilinx Zynq Ultrascale+ MPSoC Real Time Clock Driver
	3	*
	4	* Copyright (C) 2015 Xilinx, Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms and conditions of the GNU General Public License,
	8	* version 2, as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope it will be useful, but WITHOUT
	11	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	* more details.
	14	*
	15	* You should have received a copy of the GNU General Public License along with
	16	* this program. If not, see <http://www.gnu.org/licenses/>.
	17	*
	18	*/
	19
	20	#include <linux/delay.h>
	21	#include <linux/init.h>
	22	#include <linux/io.h>
	23	#include <linux/module.h>
	24	#include <linux/of.h>
	25	#include <linux/platform_device.h>
	26	#include <linux/rtc.h>
	27
	28	/* RTC Registers */
	29	#define RTC_SET_TM_WR 0x00
	30	#define RTC_SET_TM_RD 0x04
	31	#define RTC_CALIB_WR 0x08
	32	#define RTC_CALIB_RD 0x0C
	33	#define RTC_CUR_TM 0x10
	34	#define RTC_CUR_TICK 0x14
	35	#define RTC_ALRM 0x18
	36	#define RTC_INT_STS 0x20
	37	#define RTC_INT_MASK 0x24
	38	#define RTC_INT_EN 0x28
	39	#define RTC_INT_DIS 0x2C
	40	#define RTC_CTRL 0x40
	41
	42	#define RTC_FR_EN BIT(20)
	43	#define RTC_FR_DATSHIFT 16
	44	#define RTC_TICK_MASK 0xFFFF
	45	#define RTC_INT_SEC BIT(0)
	46	#define RTC_INT_ALRM BIT(1)
	47	#define RTC_OSC_EN BIT(24)
	48
	49	#define RTC_CALIB_DEF 0x198233
	50	#define RTC_CALIB_MASK 0x1FFFFF
	51	#define RTC_SEC_MAX_VAL 0xFFFFFFFF
	52
	53	struct xlnx_rtc_dev {
	54	struct rtc_device *rtc;
	55	void __iomem *reg_base;
	56	int alarm_irq;
	57	int sec_irq;
	58	};
	59
	60	static int xlnx_rtc_set_time(struct device dev, struct rtc_time tm)
	61	{
	62	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
	63	unsigned long new_time;
	64
	65	new_time = rtc_tm_to_time64(tm);
	66
	67	if (new_time > RTC_SEC_MAX_VAL)
	68	return -EINVAL;
	69
	70	writel(new_time, xrtcdev->reg_base + RTC_SET_TM_WR);
	71
	72	return 0;
	73	}
	74
	75	static int xlnx_rtc_read_time(struct device dev, struct rtc_time tm)
	76	{
	77	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
	78
	79	rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_CUR_TM), tm);
	80
	81	return rtc_valid_tm(tm);
	82	}
	83
	84	static int xlnx_rtc_read_alarm(struct device dev, struct rtc_wkalrm alrm)
	85	{
	86	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
	87
	88	rtc_time64_to_tm(readl(xrtcdev->reg_base + RTC_ALRM), &alrm->time);
	89	alrm->enabled = readl(xrtcdev->reg_base + RTC_INT_MASK) & RTC_INT_ALRM;
	90
	91	return 0;
	92	}
	93
	94	static int xlnx_rtc_alarm_irq_enable(struct device *dev, u32 enabled)
	95	{
	96	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
	97
	98	if (enabled)
	99	writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_EN);
	100	else
	101	writel(RTC_INT_ALRM, xrtcdev->reg_base + RTC_INT_DIS);
	102
	103	return 0;
	104	}
	105
	106	static int xlnx_rtc_set_alarm(struct device dev, struct rtc_wkalrm alrm)
	107	{
	108	struct xlnx_rtc_dev *xrtcdev = dev_get_drvdata(dev);
	109	unsigned long alarm_time;
	110
	111	alarm_time = rtc_tm_to_time64(&alrm->time);
	112
	113	if (alarm_time > RTC_SEC_MAX_VAL)
	114	return -EINVAL;
	115
	116	writel((u32)alarm_time, (xrtcdev->reg_base + RTC_ALRM));
	117
	118	xlnx_rtc_alarm_irq_enable(dev, alrm->enabled);
	119
	120	return 0;
	121	}
	122
	123	static void xlnx_init_rtc(struct xlnx_rtc_dev *xrtcdev, u32 calibval)
	124	{
	125	/*
	126	* Based on crystal freq of 33.330 KHz
	127	* set the seconds counter and enable, set fractions counter
	128	* to default value suggested as per design spec
	129	* to correct RTC delay in frequency over period of time.
	130	*/
	131	calibval &= RTC_CALIB_MASK;
	132	writel(calibval, (xrtcdev->reg_base + RTC_CALIB_WR));
	133	}
	134
	135	static const struct rtc_class_ops xlnx_rtc_ops = {
	136	.set_time = xlnx_rtc_set_time,
	137	.read_time = xlnx_rtc_read_time,
	138	.read_alarm = xlnx_rtc_read_alarm,
	139	.set_alarm = xlnx_rtc_set_alarm,
	140	.alarm_irq_enable = xlnx_rtc_alarm_irq_enable,
	141	};
	142
	143	static irqreturn_t xlnx_rtc_interrupt(int irq, void *id)
	144	{
	145	struct xlnx_rtc_dev xrtcdev = (struct xlnx_rtc_dev )id;
	146	unsigned int status;
	147
	148	status = readl(xrtcdev->reg_base + RTC_INT_STS);
	149	/* Check if interrupt asserted */
	150	if (!(status & (RTC_INT_SEC \| RTC_INT_ALRM)))
	151	return IRQ_NONE;
	152
	153	/* Clear interrupt */
	154	writel(status, xrtcdev->reg_base + RTC_INT_STS);
	155
	156	if (status & RTC_INT_SEC)
	157	rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF \| RTC_UF);
	158	if (status & RTC_INT_ALRM)
	159	rtc_update_irq(xrtcdev->rtc, 1, RTC_IRQF \| RTC_AF);
	160
	161	return IRQ_HANDLED;
	162	}
	163
	164	static int xlnx_rtc_probe(struct platform_device *pdev)
	165	{
	166	struct xlnx_rtc_dev *xrtcdev;
	167	struct resource *res;
	168	int ret;
	169	unsigned int calibvalue;
	170
	171	xrtcdev = devm_kzalloc(&pdev->dev, sizeof(*xrtcdev), GFP_KERNEL);
	172	if (!xrtcdev)
	173	return -ENOMEM;
	174
	175	platform_set_drvdata(pdev, xrtcdev);
	176
	177	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	178
	179	xrtcdev->reg_base = devm_ioremap_resource(&pdev->dev, res);
	180	if (IS_ERR(xrtcdev->reg_base))
	181	return PTR_ERR(xrtcdev->reg_base);
	182
	183	xrtcdev->alarm_irq = platform_get_irq_byname(pdev, "alarm");
	184	if (xrtcdev->alarm_irq < 0) {
	185	dev_err(&pdev->dev, "no irq resource\n");
	186	return xrtcdev->alarm_irq;
	187	}
	188	ret = devm_request_irq(&pdev->dev, xrtcdev->alarm_irq,
	189	xlnx_rtc_interrupt, 0,
	190	dev_name(&pdev->dev), xrtcdev);
	191	if (ret) {
	192	dev_err(&pdev->dev, "request irq failed\n");
	193	return ret;
	194	}
	195
	196	xrtcdev->sec_irq = platform_get_irq_byname(pdev, "sec");
	197	if (xrtcdev->sec_irq < 0) {
	198	dev_err(&pdev->dev, "no irq resource\n");
	199	return xrtcdev->sec_irq;
	200	}
	201	ret = devm_request_irq(&pdev->dev, xrtcdev->sec_irq,
	202	xlnx_rtc_interrupt, 0,
	203	dev_name(&pdev->dev), xrtcdev);
	204	if (ret) {
	205	dev_err(&pdev->dev, "request irq failed\n");
	206	return ret;
	207	}
	208
	209	ret = of_property_read_u32(pdev->dev.of_node, "calibration",
	210	&calibvalue);
	211	if (ret)
	212	calibvalue = RTC_CALIB_DEF;
	213
	214	xlnx_init_rtc(xrtcdev, calibvalue);
	215
	216	device_init_wakeup(&pdev->dev, 1);
	217
	218	xrtcdev->rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
	219	&xlnx_rtc_ops, THIS_MODULE);
	220	return PTR_ERR_OR_ZERO(xrtcdev->rtc);
	221	}
	222
	223	static int xlnx_rtc_remove(struct platform_device *pdev)
	224	{
	225	xlnx_rtc_alarm_irq_enable(&pdev->dev, 0);
	226	device_init_wakeup(&pdev->dev, 0);
	227
	228	return 0;
	229	}
	230
	231	static int __maybe_unused xlnx_rtc_suspend(struct device *dev)
	232	{
	233	struct platform_device *pdev = to_platform_device(dev);
	234	struct xlnx_rtc_dev *xrtcdev = platform_get_drvdata(pdev);
	235
	236	if (device_may_wakeup(&pdev->dev))
	237	enable_irq_wake(xrtcdev->alarm_irq);
	238	else
	239	xlnx_rtc_alarm_irq_enable(dev, 0);
	240
	241	return 0;
	242	}
	243
	244	static int __maybe_unused xlnx_rtc_resume(struct device *dev)
	245	{
	246	struct platform_device *pdev = to_platform_device(dev);
	247	struct xlnx_rtc_dev *xrtcdev = platform_get_drvdata(pdev);
	248
	249	if (device_may_wakeup(&pdev->dev))
	250	disable_irq_wake(xrtcdev->alarm_irq);
	251	else
	252	xlnx_rtc_alarm_irq_enable(dev, 1);
	253
	254	return 0;
	255	}
	256
	257	static SIMPLE_DEV_PM_OPS(xlnx_rtc_pm_ops, xlnx_rtc_suspend, xlnx_rtc_resume);
	258
	259	static const struct of_device_id xlnx_rtc_of_match[] = {
	260	{.compatible = "xlnx,zynqmp-rtc" },
	261	{ }
	262	};
	263	MODULE_DEVICE_TABLE(of, xlnx_rtc_of_match);
	264
	265	static struct platform_driver xlnx_rtc_driver = {
	266	.probe = xlnx_rtc_probe,
	267	.remove = xlnx_rtc_remove,
	268	.driver = {
	269	.name = KBUILD_MODNAME,
	270	.pm = &xlnx_rtc_pm_ops,
	271	.of_match_table = xlnx_rtc_of_match,
	272	},
	273	};
	274
	275	module_platform_driver(xlnx_rtc_driver);
	276
	277	MODULE_DESCRIPTION("Xilinx Zynq MPSoC RTC driver");
	278	MODULE_AUTHOR("Xilinx Inc.");
	279	MODULE_LICENSE("GPL v2");

include/asm-generic/rtc.h+29−0

 #include <linux/rtc.h>
 #include <linux/bcd.h>
 #include <linux/delay.h>
+#ifdef CONFIG_ACPI
+#include <linux/acpi.h>
+#endif
 #define RTC_PIE 0x40		/* periodic interrupt enable */
 #define RTC_AIE 0x20		/* alarm interrupt enable */
 {
 	unsigned char ctrl;
 	unsigned long flags;
+	unsigned char century = 0;
 #ifdef CONFIG_MACH_DECSTATION
 	unsigned int real_year;
 	time->tm_year = CMOS_READ(RTC_YEAR);
 #ifdef CONFIG_MACH_DECSTATION
 	real_year = CMOS_READ(RTC_DEC_YEAR);
+#endif
+#ifdef CONFIG_ACPI
+	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
+	    acpi_gbl_FADT.century)
+		century = CMOS_READ(acpi_gbl_FADT.century);
 #endif
 	ctrl = CMOS_READ(RTC_CONTROL);
 	spin_unlock_irqrestore(&rtc_lock, flags);
 		time->tm_mday = bcd2bin(time->tm_mday);
 		time->tm_mon = bcd2bin(time->tm_mon);
 		time->tm_year = bcd2bin(time->tm_year);
+		century = bcd2bin(century);
 	}
 #ifdef CONFIG_MACH_DECSTATION
 	time->tm_year += real_year - 72;
 #endif
+	if (century)
+		time->tm_year += (century - 19) * 100;
 	/*
 	 * Account for differences between how the RTC uses the values
 	 * and how they are defined in a struct rtc_time;
 #ifdef CONFIG_MACH_DECSTATION
 	unsigned int real_yrs, leap_yr;
 #endif
+	unsigned char century = 0;
 	yrs = time->tm_year;
 	mon = time->tm_mon + 1;   /* tm_mon starts at zero */
 		yrs = 73;
 	}
 #endif
+#ifdef CONFIG_ACPI
+	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
+	    acpi_gbl_FADT.century) {
+		century = (yrs + 1900) / 100;
+		yrs %= 100;
+	}
+#endif
 	/* These limits and adjustments are independent of
 	 * whether the chip is in binary mode or not.
 	 */
 		day = bin2bcd(day);
 		mon = bin2bcd(mon);
 		yrs = bin2bcd(yrs);
+		century = bin2bcd(century);
 	}
 	save_control = CMOS_READ(RTC_CONTROL);
 	CMOS_WRITE(hrs, RTC_HOURS);
 	CMOS_WRITE(min, RTC_MINUTES);
 	CMOS_WRITE(sec, RTC_SECONDS);
+#ifdef CONFIG_ACPI
+	if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
+	    acpi_gbl_FADT.century)
+		CMOS_WRITE(century, acpi_gbl_FADT.century);
+#endif
 	CMOS_WRITE(save_control, RTC_CONTROL);
 	CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);