| @@ -33,8 +33,8 @@ extern "C" { · 32 unmodified lines |
| 33 | 33 | #define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */ |
| 34 | 34 | |
| 35 | 35 | struct drm_omap_param { |
| 36 | | − uint64_t param; /* in */ |
| 37 | | − uint64_t value; /* in (set_param), out (get_param) */ |
| 36 | + __u64 param; /* in */ |
| 37 | + __u64 value; /* in (set_param), out (get_param) */ |
| 38 | 38 | }; |
| 39 | 39 | |
| 40 | 40 | #define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */ |
| @@ -53,18 +53,18 @@ struct drm_omap_param { · 12 unmodified lines |
| 53 | 53 | #define OMAP_BO_TILED (OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32) |
| 54 | 54 | |
| 55 | 55 | union omap_gem_size { |
| 56 | | − uint32_t bytes; /* (for non-tiled formats) */ |
| 56 | + __u32 bytes; /* (for non-tiled formats) */ |
| 57 | 57 | struct { |
| 58 | | − uint16_t width; |
| 59 | | − uint16_t height; |
| 58 | + __u16 width; |
| 59 | + __u16 height; |
| 60 | 60 | } tiled; /* (for tiled formats) */ |
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | 63 | struct drm_omap_gem_new { |
| 64 | 64 | union omap_gem_size size; /* in */ |
| 65 | | − uint32_t flags; /* in */ |
| 66 | | − uint32_t handle; /* out */ |
| 67 | | − uint32_t __pad; |
| 65 | + __u32 flags; /* in */ |
| 66 | + __u32 handle; /* out */ |
| 67 | + __u32 __pad; |
| 68 | 68 | }; |
| 69 | 69 | |
| 70 | 70 | /* mask of operations: */ |
| @@ -74,33 +74,33 @@ enum omap_gem_op { · 3 unmodified lines |
| 74 | 74 | }; |
| 75 | 75 | |
| 76 | 76 | struct drm_omap_gem_cpu_prep { |
| 77 | | − uint32_t handle; /* buffer handle (in) */ |
| 78 | | − uint32_t op; /* mask of omap_gem_op (in) */ |
| 77 | + __u32 handle; /* buffer handle (in) */ |
| 78 | + __u32 op; /* mask of omap_gem_op (in) */ |
| 79 | 79 | }; |
| 80 | 80 | |
| 81 | 81 | struct drm_omap_gem_cpu_fini { |
| 82 | | − uint32_t handle; /* buffer handle (in) */ |
| 83 | | − uint32_t op; /* mask of omap_gem_op (in) */ |
| 82 | + __u32 handle; /* buffer handle (in) */ |
| 83 | + __u32 op; /* mask of omap_gem_op (in) */ |
| 84 | 84 | /* TODO maybe here we pass down info about what regions are touched |
| 85 | 85 | * by sw so we can be clever about cache ops? For now a placeholder, |
| 86 | 86 | * set to zero and we just do full buffer flush.. |
| 87 | 87 | */ |
| 88 | | − uint32_t nregions; |
| 89 | | − uint32_t __pad; |
| 88 | + __u32 nregions; |
| 89 | + __u32 __pad; |
| 90 | 90 | }; |
| 91 | 91 | |
| 92 | 92 | struct drm_omap_gem_info { |
| 93 | | − uint32_t handle; /* buffer handle (in) */ |
| 94 | | − uint32_t pad; |
| 95 | | − uint64_t offset; /* mmap offset (out) */ |
| 93 | + __u32 handle; /* buffer handle (in) */ |
| 94 | + __u32 pad; |
| 95 | + __u64 offset; /* mmap offset (out) */ |
| 96 | 96 | /* note: in case of tiled buffers, the user virtual size can be |
| 97 | 97 | * different from the physical size (ie. how many pages are needed |
| 98 | 98 | * to back the object) which is returned in DRM_IOCTL_GEM_OPEN.. |
| 99 | 99 | * This size here is the one that should be used if you want to |
| 100 | 100 | * mmap() the buffer: |
| 101 | 101 | */ |
| 102 | | − uint32_t size; /* virtual size for mmap'ing (out) */ |
| 103 | | − uint32_t __pad; |
| 102 | + __u32 size; /* virtual size for mmap'ing (out) */ |
| 103 | + __u32 __pad; |
| 104 | 104 | }; |
| 105 | 105 | |
| 106 | 106 | #define DRM_OMAP_GET_PARAM 0x00 |