History

Merge tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY/Thunderbolt driver updates from Greg KH: "Here is the big set of USB, PHY, and Thunderbolt driver updates for 5.10-rc1. Lots of tiny different things for these subsystems are in here, including: - phy driver updates - thunderbolt / USB 4 updates and additions - USB gadget driver updates - xhci fixes and updates - typec driver additions and updates - api conversions to various drivers for core kernel api changes - new USB control message functions to make it harder to get wrong, as found by syzbot (took 2 tries to get it right) - lots of tiny USB driver fixes and updates all over the place All of these have been in linux-next for a while, with the exception of the last "obviously correct" patch that updated a FALLTHROUGH comment that got merged last weekend" * tag 'usb-5.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (374 commits) usb: musb: gadget: Use fallthrough pseudo-keyword usb: typec: Add QCOM PMIC typec detection driver USB: serial: option: add Cellient MPL200 card usb: typec: tcpci_maxim: Add support for Sink FRS usb: typec: tcpci: Implement callbacks for FRS usb: typec: tcpm: Add support for Sink Fast Role SWAP(FRS) usb: typec: tcpci_maxim: Chip level TCPC driver usb: typec: tcpci: Add set_vbus tcpci callback usb: typec: tcpci: Add a getter method to retrieve tcpm_port reference usbip: vhci_hcd: fix calling usb_hcd_giveback_urb() with irqs enabled usb: cdc-acm: add quirk to blacklist ETAS ES58X devices USB: serial: ftdi_sio: use cur_altsetting for consistency USB: serial: option: Add Telit FT980-KS composition USB: core: remove polling for /sys/kernel/debug/usb/devices usb: typec: add support for STUSB160x Type-C controller family usb: typec: add typec_find_pwr_opmode usb: typec: hd3ss3220: Use OF graph API to get the connector fwnode dt-bindings: usb: renesas,usb3-peri: Document HS and SS data bus dt-bindings: usb: convert ti,hd3ss3220 bindings to json-schema usb: dwc2: Fix INTR OUT transfers in DDMA mode. ...

Linus Torvalds committed 6 years ago

Commit c6dbef72 parents ade7afe 93578a2260 files · +12933 −2874Browse files

Unified · Split

260 files
  1. Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +21 −0
  2. Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt +1 −1
  3. Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml +16 −1
  4. Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml +58 −0
  5. Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml +79 −17
  6. Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +84 −11
  7. Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +76 −0
  8. Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml +74 −0
  9. Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +10 −3
  10. Documentation/devicetree/bindings/phy/ti-phy.txt +0 −37
  11. Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml +21 −1
  12. Documentation/devicetree/bindings/usb/atmel-usb.txt +1 −0
  13. Documentation/devicetree/bindings/usb/cdns,usb3.yaml +96 −0
  14. Documentation/devicetree/bindings/usb/cdns-usb3.txt +0 −45
  15. Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt +9 −0
  16. Documentation/devicetree/bindings/usb/dwc2.yaml +5 −0
  17. Documentation/devicetree/bindings/usb/dwc3.txt +3 −0
  18. Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml +77 −0
  19. Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml +95 −0
  20. Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml +1 −0
  21. Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml +30 −5
  22. Documentation/devicetree/bindings/usb/renesas,usbhs.yaml +1 −0
  23. Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt +0 −38
  24. Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml +82 −0
  25. MAINTAINERS +19 −1
  26. arch/arm/boot/dts/at91-sam9x60ek.dts +13 −0
  27. arch/arm/boot/dts/bcm2711-rpi-4-b.dts +22 −0
  28. arch/arm/boot/dts/sam9x60.dtsi +14 −0
  29. drivers/acpi/bus.c +1 −0
  30. drivers/bluetooth/ath3k.c +29 −64
  31. drivers/firmware/Kconfig +1 −2
  32. drivers/firmware/raspberrypi.c +0 −61
  33. drivers/net/usb/pegasus.c +15 −46
  34. drivers/net/usb/rtl8150.c +6 −26
  35. drivers/pci/controller/pcie-brcmstb.c +0 −17
  36. drivers/pci/quirks.c +0 −57
  37. drivers/phy/Kconfig +11 −0
  38. drivers/phy/Makefile +1 −0
  39. drivers/phy/broadcom/phy-bcm-ns-usb3.c +9 −13
  40. drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c +4 −9
  41. drivers/phy/broadcom/phy-bcm-sr-usb.c +8 −11
  42. drivers/phy/cadence/phy-cadence-salvo.c +4 −4
  43. drivers/phy/cadence/phy-cadence-sierra.c +12 −12
  44. drivers/phy/cadence/phy-cadence-torrent.c +2018 −101
  45. drivers/phy/freescale/phy-fsl-imx8mq-usb.c +71 −8
  46. drivers/phy/hisilicon/phy-hi3660-usb3.c +1 −1
  47. drivers/phy/intel/Kconfig +17 −5
  48. drivers/phy/intel/Makefile +3 −2
  49. drivers/phy/intel/phy-intel-keembay-emmc.c +307 −0
  50. drivers/phy/intel/phy-intel-lgm-combo.c +0 −0
  51. drivers/phy/intel/phy-intel-lgm-emmc.c +0 −0
  52. drivers/phy/lantiq/phy-lantiq-rcu-usb2.c +1 −1
  53. drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c +1 −1
  54. drivers/phy/marvell/phy-pxa-28nm-hsic.c +20 −20
  55. drivers/phy/marvell/phy-pxa-28nm-usb2.c +15 −18
  56. drivers/phy/phy-lgm-usb.c +284 −0
  57. drivers/phy/qualcomm/phy-qcom-apq8064-sata.c +8 −13
  58. drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c +2 −2
  59. drivers/phy/qualcomm/phy-qcom-qmp.c +883 −170
  60. drivers/phy/qualcomm/phy-qcom-qmp.h +80 −0
  61. drivers/phy/ralink/phy-ralink-usb.c +1 −1
  62. drivers/phy/rockchip/Kconfig +12 −0
  63. drivers/phy/rockchip/Makefile +1 −0
  64. drivers/phy/rockchip/phy-rockchip-dphy-rx0.c +1 −0
  65. drivers/phy/samsung/phy-exynos5-usbdrd.c +12 −27
  66. drivers/phy/samsung/phy-samsung-ufs.c +1 −1
  67. drivers/phy/socionext/Kconfig +10 −0
  68. drivers/phy/socionext/Makefile +1 −0
  69. drivers/phy/socionext/phy-uniphier-ahci.c +321 −0
  70. drivers/phy/ti/phy-am654-serdes.c +211 −114
  71. drivers/phy/ti/phy-gmii-sel.c +96 −63
  72. drivers/phy/ti/phy-j721e-wiz.c +0 −1
  73. drivers/phy/ti/phy-omap-usb2.c +17 −19
  74. drivers/reset/Kconfig +11 −0
  75. drivers/reset/Makefile +1 −0
  76. drivers/reset/reset-raspberrypi.c +122 −0
  77. drivers/staging/media/Kconfig +0 −2
  78. drivers/staging/media/Makefile +0 −1
  79. drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig +0 −13
  80. drivers/staging/media/phy-rockchip-dphy-rx0/Makefile +0 −2
  81. drivers/staging/media/phy-rockchip-dphy-rx0/TODO +0 −6
  82. drivers/thunderbolt/Kconfig +13 −1
  83. drivers/thunderbolt/Makefile +3 −1
  84. drivers/thunderbolt/acpi.c +117 −0
  85. drivers/thunderbolt/cap.c +94 −42
  86. drivers/thunderbolt/ctl.c +17 −6
  87. drivers/thunderbolt/debugfs.c +701 −0
  88. drivers/thunderbolt/domain.c +45 −3
  89. drivers/thunderbolt/icm.c +4 −1
  90. drivers/thunderbolt/lc.c +121 −30
  91. drivers/thunderbolt/nhi.c +87 −3
  92. drivers/thunderbolt/nhi_ops.c +19 −12
  93. drivers/thunderbolt/quirks.c +1 −1
  94. drivers/thunderbolt/switch.c +183 −33
  95. drivers/thunderbolt/tb.c +198 −9
  96. drivers/thunderbolt/tb.h +124 −36
  97. drivers/thunderbolt/tb_msgs.h +1 −0
  98. drivers/thunderbolt/tb_regs.h +33 −1
  99. drivers/thunderbolt/test.c +12 −1
  100. drivers/thunderbolt/usb4.c +197 −54
  101. drivers/usb/atm/cxacru.c +13 −14
  102. drivers/usb/atm/usbatm.c +8 −6
  103. drivers/usb/c67x00/c67x00-sched.c +3 −4
  104. drivers/usb/cdns3/cdns3-imx.c +186 −5
  105. drivers/usb/cdns3/core.c +170 −32
  106. drivers/usb/cdns3/core.h +17 −0
  107. drivers/usb/cdns3/drd.c +20 −0
  108. drivers/usb/cdns3/drd.h +4 −1
  109. drivers/usb/cdns3/ep0.c +9 −1
  110. drivers/usb/cdns3/gadget.c +183 −93
  111. drivers/usb/cdns3/gadget.h +10 −1
  112. drivers/usb/cdns3/host.c +7 −0
  113. drivers/usb/chipidea/ci_hdrc_imx.c +12 −1
  114. drivers/usb/chipidea/ci_hdrc_imx.h +2 −0
  115. drivers/usb/chipidea/usbmisc_imx.c +21 −0
  116. drivers/usb/class/cdc-acm.c +42 −37
  117. drivers/usb/class/cdc-acm.h +8 −11
  118. drivers/usb/class/cdc-wdm.c +55 −17
  119. drivers/usb/common/usb-conn-gpio.c +25 −7
  120. drivers/usb/core/Kconfig +14 −0
  121. drivers/usb/core/devices.c +0 −41
  122. drivers/usb/core/driver.c +3 −5
  123. drivers/usb/core/generic.c +2 −2
  124. drivers/usb/core/hcd.c +3 −3
  125. drivers/usb/core/hub.c +38 −24
  126. drivers/usb/core/message.c +160 −20
  127. drivers/usb/core/urb.c +77 −43
  128. drivers/usb/core/usb.h +0 −1
  129. drivers/usb/dwc2/Kconfig +1 −0
  130. drivers/usb/dwc2/Makefile +1 −1
  131. drivers/usb/dwc2/core.h +9 −0
  132. drivers/usb/dwc2/drd.c +180 −0
  133. drivers/usb/dwc2/gadget.c +34 −8
  134. drivers/usb/dwc2/params.c +3 −2
  135. drivers/usb/dwc2/platform.c +36 −7
  136. drivers/usb/dwc3/core.c +68 −22
  137. drivers/usb/dwc3/core.h +28 −19
  138. drivers/usb/dwc3/debug.h +5 −3
  139. drivers/usb/dwc3/debugfs.c +29 −30
  140. drivers/usb/dwc3/dwc3-meson-g12a.c +26 −15
  141. drivers/usb/dwc3/dwc3-of-simple.c +2 −0
  142. drivers/usb/dwc3/dwc3-pci.c +2 −1
  143. drivers/usb/dwc3/dwc3-qcom.c +123 −5
  144. drivers/usb/dwc3/ep0.c +42 −19
  145. drivers/usb/dwc3/gadget.c +351 −242
  146. drivers/usb/dwc3/gadget.h +2 −1
  147. drivers/usb/dwc3/trace.h +9 −8
  148. drivers/usb/dwc3/ulpi.c +1 −1
  149. drivers/usb/early/ehci-dbgp.c +5 −10
  150. drivers/usb/early/xhci-dbc.c +4 −10
  151. drivers/usb/gadget/function/f_acm.c +5 −3
  152. drivers/usb/gadget/function/f_midi.c +3 −3
  153. drivers/usb/gadget/function/f_ncm.c +6 −4
  154. drivers/usb/gadget/function/f_printer.c +14 −2
  155. drivers/usb/gadget/function/f_tcm.c +6 −6
  156. drivers/usb/gadget/function/f_uvc.c +4 −4
  157. drivers/usb/gadget/function/u_ether.c +1 −1
  158. drivers/usb/gadget/function/u_serial.c +1 −0
  159. drivers/usb/gadget/udc/aspeed-vhub/core.c +3 −7
  160. drivers/usb/gadget/udc/aspeed-vhub/vhub.h +3 −0
  161. drivers/usb/gadget/udc/atmel_usba_udc.c +45 −23
  162. drivers/usb/gadget/udc/atmel_usba_udc.h +2 −1
  163. drivers/usb/gadget/udc/bcm63xx_udc.c +1 −0
  164. drivers/usb/gadget/udc/bdc/bdc_core.c +4 −5
  165. drivers/usb/gadget/udc/core.c +66 −16
  166. drivers/usb/gadget/udc/fsl_qe_udc.c +3 −4
  167. drivers/usb/gadget/udc/fsl_udc_core.c +5 −4
  168. drivers/usb/gadget/udc/lpc32xx_udc.c +3 −14
  169. drivers/usb/gadget/udc/net2272.c +13 −11
  170. drivers/usb/gadget/udc/net2272.h +1 −0
  171. drivers/usb/gadget/udc/net2280.c +17 −15
  172. drivers/usb/gadget/udc/net2280.h +1 −0
  173. drivers/usb/gadget/udc/pch_udc.c +22 −33
  174. drivers/usb/gadget/udc/s3c2410_udc.c +0 −3
  175. drivers/usb/gadget/udc/tegra-xudc.c +31 −29
  176. drivers/usb/host/bcma-hcd.c +1 −12
  177. drivers/usb/host/ehci-npcm7xx.c +3 −5
  178. drivers/usb/host/ehci-platform.c +11 −5
  179. drivers/usb/host/ehci-sched.c +0 −20
  180. drivers/usb/host/ehci-spear.c +3 −5
  181. drivers/usb/host/fotg210-hcd.c +9 −11
  182. drivers/usb/host/ohci-hcd.c +11 −7
  183. drivers/usb/host/oxu210hp-hcd.c +10 −11
  184. drivers/usb/host/pci-quirks.c +16 −19
  185. drivers/usb/host/xhci-dbgtty.c +3 −3
  186. drivers/usb/host/xhci-debugfs.c +108 −1
  187. drivers/usb/host/xhci-debugfs.h +10 −0
  188. drivers/usb/host/xhci-mtk.c +3 −3
  189. drivers/usb/host/xhci-pci.c +10 −0
  190. drivers/usb/host/xhci-plat.c +33 −11
  191. drivers/usb/host/xhci-plat.h +1 −0
  192. drivers/usb/host/xhci-rcar.c +12 −31
  193. drivers/usb/host/xhci-ring.c +19 −4
  194. drivers/usb/host/xhci-tegra.c +0 −1
  195. drivers/usb/host/xhci.c +7 −4
  196. drivers/usb/host/xhci.h +3 −0
  197. drivers/usb/image/microtek.c +7 −7
  198. drivers/usb/isp1760/isp1760-hcd.c +9 −11
  199. drivers/usb/misc/adutux.c +1 −0
  200. drivers/usb/misc/appledisplay.c +1 −13
  201. drivers/usb/misc/legousbtower.c +20 −41
  202. drivers/usb/misc/usb3503.c +8 −10
  203. drivers/usb/misc/usb4604.c +3 −5
  204. drivers/usb/misc/usblcd.c +0 −1
  205. drivers/usb/misc/yurex.c +2 −4
  206. drivers/usb/mtu3/mtu3.h +0 −6
  207. drivers/usb/musb/musb_gadget_ep0.c +1 −1
  208. drivers/usb/phy/phy-ab8500-usb.c +1 −1
  209. drivers/usb/phy/phy-mv-usb.c +8 −10
  210. drivers/usb/phy/phy-ulpi-viewport.c +3 −9
  211. drivers/usb/serial/ftdi_sio.c +20 −17
  212. drivers/usb/serial/ftdi_sio_ids.h +7 −0
  213. drivers/usb/serial/mos7720.c +4 −4
  214. drivers/usb/serial/option.c +5 −0
  215. drivers/usb/serial/pl2303.c +1 −0
  216. drivers/usb/serial/pl2303.h +1 −0
  217. drivers/usb/serial/qcserial.c +2 −2
  218. drivers/usb/storage/isd200.c +1 −1
  219. drivers/usb/storage/scsiglue.c +1 −1
  220. drivers/usb/storage/uas.c +19 −12
  221. drivers/usb/storage/usb.c +3 −2
  222. drivers/usb/typec/Kconfig +24 −0
  223. drivers/usb/typec/Makefile +2 −0
  224. drivers/usb/typec/altmodes/displayport.c +1 −1
  225. drivers/usb/typec/class.c +15 −0
  226. drivers/usb/typec/hd3ss3220.c +14 −4
  227. drivers/usb/typec/mux/Kconfig +1 −0
  228. drivers/usb/typec/mux/intel_pmc_mux.c +172 −35
  229. drivers/usb/typec/qcom-pmic-typec.c +262 −0
  230. drivers/usb/typec/stusb160x.c +875 −0
  231. drivers/usb/typec/tcpm/Kconfig +14 −0
  232. drivers/usb/typec/tcpm/Makefile +8 −6
  233. drivers/usb/typec/tcpm/tcpci.c +101 −12
  234. drivers/usb/typec/tcpm/tcpci.h +25 −0
  235. drivers/usb/typec/tcpm/tcpci_maxim.c +503 −0
  236. drivers/usb/typec/tcpm/tcpci_mt6360.c +212 −0
  237. drivers/usb/typec/tcpm/tcpm.c +314 −48
  238. drivers/usb/usbip/usbip_common.c +1 −7
  239. drivers/usb/usbip/vhci_hcd.c +7 −1
  240. include/dt-bindings/phy/phy-cadence-torrent.h +13 −0
  241. include/dt-bindings/phy/phy.h +1 −0
  242. include/dt-bindings/reset/raspberrypi,firmware-reset.h +13 −0
  243. include/linux/iopoll.h +2 −2
  244. include/linux/phy/phy.h +2 −0
  245. include/linux/usb.h +9 −0
  246. include/linux/usb/gadget.h +21 −6
  247. include/linux/usb/pd.h +15 −11
  248. include/linux/usb/tcpm.h +7 −1
  249. include/linux/usb/typec.h +1 −0
  250. include/soc/bcm2835/raspberrypi-firmware.h +0 −7
  251. sound/usb/6fire/firmware.c +13 −25
  252. sound/usb/helper.c +1 −15
  253. sound/usb/helper.h +0 −1
  254. sound/usb/hiface/pcm.c +6 −8
  255. sound/usb/line6/driver.c +30 −42
  256. sound/usb/line6/podhd.c +9 −14
  257. sound/usb/line6/toneport.c +5 −4
  258. sound/usb/mixer_scarlett_gen2.c +1 −1
  259. sound/usb/quirks.c +3 −9
  260. sound/usb/usx2y/us122l.c +8 −34
Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml+21−0
@@ -48,6 +48,22 @@ properties: · 47 unmodified lines
4848 - compatible
4949 - "#clock-cells"
5050
51+ reset:
52+ type: object
53+
54+ properties:
55+ compatible:
56+ const: raspberrypi,firmware-reset
57+
58+ "#reset-cells":
59+ const: 1
60+ description: >
61+ The argument is the ID of the firmware reset line to affect.
62+
63+ required:
64+ - compatible
65+ - "#reset-cells"
66+
5167 additionalProperties: false
5268
5369 required:
@@ -66,5 +82,10 @@ examples: · 12 unmodified lines
6682 compatible = "raspberrypi,firmware-clocks";
6783 #clock-cells = <1>;
6884 };
85+
86+ reset: reset {
87+ compatible = "raspberrypi,firmware-reset";
88+ #reset-cells = <1>;
89+ };
6990 };
7091 ...
Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt+1−1
@@ -1,7 +1,7 @@
11 * Freescale i.MX8MQ USB3 PHY binding
22
33 Required properties:
4−- compatible: Should be "fsl,imx8mq-usb-phy"
4+- compatible: Should be "fsl,imx8mq-usb-phy" or "fsl,imx8mp-usb-phy"
55 - #phys-cells: must be 0 (see phy-bindings.txt in this directory)
66 - reg: The base address and length of the registers
77 - clocks: phandles to the clocks for each clock listed in clock-names
Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml+16−1
@@ -23,7 +23,9 @@ description: |+ · 22 unmodified lines
2323
2424 properties:
2525 compatible:
26− const: intel,lgm-emmc-phy
26+ oneOf:
27+ - const: intel,lgm-emmc-phy
28+ - const: intel,keembay-emmc-phy
2729
2830 "#phy-cells":
2931 const: 0
@@ -34,6 +36,10 @@ properties: · 4 unmodified lines
3436 clocks:
3537 maxItems: 1
3638
39+ clock-names:
40+ items:
41+ - const: emmcclk
42+
3743 required:
3844 - "#phy-cells"
3945 - compatible
@@ -57,4 +63,13 @@ examples: · 17 unmodified lines
5763 #phy-cells = <0>;
5864 };
5965 };
66+
67+ - |
68+ phy@20290000 {
69+ compatible = "intel,keembay-emmc-phy";
70+ reg = <0x20290000 0x54>;
71+ clocks = <&emmc>;
72+ clock-names = "emmcclk";
73+ #phy-cells = <0>;
74+ };
6075 ...
Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml+58−0
@@ -0,0 +1,58 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Intel LGM USB PHY Device Tree Bindings
8+
9+maintainers:
10+ - Vadivel Murugan Ramuthevar <vadivel.muruganx.ramuthevar@linux.intel.com>
11+
12+properties:
13+ compatible:
14+ const: intel,lgm-usb-phy
15+
16+ reg:
17+ maxItems: 1
18+
19+ clocks:
20+ maxItems: 1
21+
22+ resets:
23+ items:
24+ - description: USB PHY and Host controller reset
25+ - description: APB BUS reset
26+ - description: General Hardware reset
27+
28+ reset-names:
29+ items:
30+ - const: phy
31+ - const: apb
32+ - const: phy31
33+
34+ "#phy-cells":
35+ const: 0
36+
37+required:
38+ - compatible
39+ - clocks
40+ - reg
41+ - resets
42+ - reset-names
43+ - "#phy-cells"
44+
45+additionalProperties: false
46+
47+examples:
48+ - |
49+ usb-phy@e7e00000 {
50+ compatible = "intel,lgm-usb-phy";
51+ reg = <0xe7e00000 0x10000>;
52+ clocks = <&cgu0 153>;
53+ resets = <&rcu 0x70 0x24>,
54+ <&rcu 0x70 0x26>,
55+ <&rcu 0x70 0x28>;
56+ reset-names = "phy", "apb", "phy31";
57+ #phy-cells = <0>;
58+ };
Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml+79−17
@@ -4,11 +4,13 @@ · 3 unmodified lines
44 $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
55 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
66
7−title: Cadence Torrent SD0801 PHY binding for DisplayPort
7+title: Cadence Torrent SD0801 PHY binding
88
99 description:
1010 This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
11− hardware included with the Cadence MHDP DisplayPort controller.
11+ hardware included with the Cadence MHDP DisplayPort controller. Torrent
12+ PHY also supports multilink multiprotocol combinations including protocols
13+ such as PCIe, USB, SGMII, QSGMII etc.
1214
1315 maintainers:
1416 - Swapnil Jakhade <sjakhade@cadence.com>
@@ -49,13 +51,21 @@ properties: · 34 unmodified lines
4951 - const: dptx_phy
5052
5153 resets:
52− maxItems: 1
53− description:
54− Torrent PHY reset.
55− See Documentation/devicetree/bindings/reset/reset.txt
54+ minItems: 1
55+ maxItems: 2
56+ items:
57+ - description: Torrent PHY reset.
58+ - description: Torrent APB reset. This is optional.
59+
60+ reset-names:
61+ minItems: 1
62+ maxItems: 2
63+ items:
64+ - const: torrent_reset
65+ - const: torrent_apb
5666
5767 patternProperties:
58− '^phy@[0-7]+$':
68+ '^phy@[0-3]$':
5969 type: object
6070 description:
6171 Each group of PHY lanes with a single master lane should be represented as a sub-node.
@@ -63,6 +73,8 @@ patternProperties: · 1 unmodified line
6373 reg:
6474 description:
6575 The master lane number. This is the lowest numbered lane in the lane group.
76+ minimum: 0
77+ maximum: 3
6678
6779 resets:
6880 minItems: 1
@@ -78,15 +90,25 @@ patternProperties: · 9 unmodified lines
7890 Specifies the type of PHY for which the group of PHY lanes is used.
7991 Refer include/dt-bindings/phy/phy.h. Constants from the header should be used.
8092 $ref: /schemas/types.yaml#/definitions/uint32
81− enum: [1, 2, 3, 4, 5, 6]
93+ minimum: 1
94+ maximum: 9
8295
8396 cdns,num-lanes:
8497 description:
85− Number of DisplayPort lanes.
98+ Number of lanes.
8699 $ref: /schemas/types.yaml#/definitions/uint32
87− enum: [1, 2, 4]
100+ enum: [1, 2, 3, 4]
88101 default: 4
89102
103+ cdns,ssc-mode:
104+ description:
105+ Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC,
106+ EXTERNAL_SSC or INTERNAL_SSC.
107+ Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used.
108+ $ref: /schemas/types.yaml#/definitions/uint32
109+ enum: [0, 1, 2]
110+ default: 0
111+
90112 cdns,max-bit-rate:
91113 description:
92114 Maximum DisplayPort link bit rate to use, in Mbps
@@ -99,6 +121,7 @@ patternProperties: · 6 unmodified lines
99121 - resets
100122 - "#phy-cells"
101123 - cdns,phy-type
124+ - cdns,num-lanes
102125
103126 additionalProperties: false
104127
@@ -111,6 +134,7 @@ required: · 6 unmodified lines
111134 - reg
112135 - reg-names
113136 - resets
137+ - reset-names
114138
115139 additionalProperties: false
116140
@@ -128,18 +152,56 @@ examples: · 11 unmodified lines
128152 <0xf0 0xfb030a00 0x0 0x00000040>;
129153 reg-names = "torrent_phy", "dptx_phy";
130154 resets = <&phyrst 0>;
155+ reset-names = "torrent_reset";
131156 clocks = <&ref_clk>;
132157 clock-names = "refclk";
133158 #address-cells = <1>;
134159 #size-cells = <0>;
135160 phy@0 {
136− reg = <0>;
137− resets = <&phyrst 1>, <&phyrst 2>,
138− <&phyrst 3>, <&phyrst 4>;
139− #phy-cells = <0>;
140− cdns,phy-type = <PHY_TYPE_DP>;
141− cdns,num-lanes = <4>;
142− cdns,max-bit-rate = <8100>;
161+ reg = <0>;
162+ resets = <&phyrst 1>, <&phyrst 2>,
163+ <&phyrst 3>, <&phyrst 4>;
164+ #phy-cells = <0>;
165+ cdns,phy-type = <PHY_TYPE_DP>;
166+ cdns,num-lanes = <4>;
167+ cdns,max-bit-rate = <8100>;
168+ };
169+ };
170+ };
171+ - |
172+ #include <dt-bindings/phy/phy.h>
173+ #include <dt-bindings/phy/phy-cadence-torrent.h>
174+
175+ bus {
176+ #address-cells = <2>;
177+ #size-cells = <2>;
178+
179+ torrent-phy@f0fb500000 {
180+ compatible = "cdns,torrent-phy";
181+ reg = <0xf0 0xfb500000 0x0 0x00100000>;
182+ reg-names = "torrent_phy";
183+ resets = <&phyrst 0>, <&phyrst 1>;
184+ reset-names = "torrent_reset", "torrent_apb";
185+ clocks = <&ref_clk>;
186+ clock-names = "refclk";
187+ #address-cells = <1>;
188+ #size-cells = <0>;
189+ phy@0 {
190+ reg = <0>;
191+ resets = <&phyrst 2>, <&phyrst 3>;
192+ #phy-cells = <0>;
193+ cdns,phy-type = <PHY_TYPE_PCIE>;
194+ cdns,num-lanes = <2>;
195+ cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
196+ };
197+
198+ phy@2 {
199+ reg = <2>;
200+ resets = <&phyrst 4>;
201+ #phy-cells = <0>;
202+ cdns,phy-type = <PHY_TYPE_SGMII>;
203+ cdns,num-lanes = <1>;
204+ cdns,ssc-mode = <TORRENT_SERDES_NO_SSC>;
143205 };
144206 };
145207 };
Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml+84−11
@@ -13,17 +13,21 @@ maintainers: · 12 unmodified lines
1313 properties:
1414 compatible:
1515 enum:
16+ - qcom,sc7180-qmp-usb3-dp-phy
1617 - qcom,sc7180-qmp-usb3-phy
18+ - qcom,sdm845-qmp-usb3-dp-phy
1719 - qcom,sdm845-qmp-usb3-phy
1820 reg:
1921 items:
20− - description: Address and length of PHY's common serdes block.
22+ - description: Address and length of PHY's USB serdes block.
2123 - description: Address and length of the DP_COM control block.
24+ - description: Address and length of PHY's DP serdes block.
2225
2326 reg-names:
2427 items:
25− - const: reg-base
28+ - const: usb
2629 - const: dp_com
30+ - const: dp
2731
2832 "#clock-cells":
2933 enum: [ 1, 2 ]
@@ -74,16 +78,74 @@ properties: · 44 unmodified lines
7478
7579 #Required nodes:
7680 patternProperties:
77− "^phy@[0-9a-f]+$":
81+ "^usb3-phy@[0-9a-f]+$":
7882 type: object
7983 description:
80− Each device node of QMP phy is required to have as many child nodes as
81− the number of lanes the PHY has.
84+ The USB3 PHY.
85+
86+ properties:
87+ reg:
88+ items:
89+ - description: Address and length of TX.
90+ - description: Address and length of RX.
91+ - description: Address and length of PCS.
92+ - description: Address and length of TX2.
93+ - description: Address and length of RX2.
94+ - description: Address and length of pcs_misc.
95+
96+ clocks:
97+ items:
98+ - description: pipe clock
99+
100+ clock-names:
101+ items:
102+ - const: pipe0
103+
104+ clock-output-names:
105+ items:
106+ - const: usb3_phy_pipe_clk_src
107+
108+ '#clock-cells':
109+ const: 0
110+
111+ '#phy-cells':
112+ const: 0
113+
114+ required:
115+ - reg
116+ - clocks
117+ - clock-names
118+ - '#clock-cells'
119+ - '#phy-cells'
120+
121+ "^dp-phy@[0-9a-f]+$":
122+ type: object
123+ description:
124+ The DP PHY.
125+
126+ properties:
127+ reg:
128+ items:
129+ - description: Address and length of TX.
130+ - description: Address and length of RX.
131+ - description: Address and length of PCS.
132+ - description: Address and length of TX2.
133+ - description: Address and length of RX2.
134+
135+ '#clock-cells':
136+ const: 1
137+
138+ '#phy-cells':
139+ const: 0
140+
141+ required:
142+ - reg
143+ - '#clock-cells'
144+ - '#phy-cells'
82145
83146 required:
84147 - compatible
85148 - reg
86− - reg-names
87149 - "#clock-cells"
88150 - "#address-cells"
89151 - "#size-cells"
@@ -101,14 +163,15 @@ examples: · 11 unmodified lines
101163 - |
102164 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
103165 usb_1_qmpphy: phy-wrapper@88e9000 {
104− compatible = "qcom,sdm845-qmp-usb3-phy";
166+ compatible = "qcom,sdm845-qmp-usb3-dp-phy";
105167 reg = <0x088e9000 0x18c>,
106− <0x088e8000 0x10>;
107− reg-names = "reg-base", "dp_com";
168+ <0x088e8000 0x10>,
169+ <0x088ea000 0x40>;
170+ reg-names = "usb", "dp_com", "dp";
108171 #clock-cells = <1>;
109172 #address-cells = <1>;
110173 #size-cells = <1>;
111− ranges = <0x0 0x088e9000 0x1000>;
174+ ranges = <0x0 0x088e9000 0x2000>;
112175
113176 clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
114177 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
@@ -123,7 +186,7 @@ examples: · 8 unmodified lines
123186 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
124187 vdda-pll-supply = <&vdda_usb2_ss_core>;
125188
126− phy@200 {
189+ usb3-phy@200 {
127190 reg = <0x200 0x128>,
128191 <0x400 0x200>,
129192 <0xc00 0x218>,
@@ -136,4 +199,14 @@ examples: · 6 unmodified lines
136199 clock-names = "pipe0";
137200 clock-output-names = "usb3_phy_pipe_clk_src";
138201 };
202+
203+ dp-phy@88ea200 {
204+ reg = <0xa200 0x200>,
205+ <0xa400 0x200>,
206+ <0xaa00 0x200>,
207+ <0xa600 0x200>,
208+ <0xa800 0x200>;
209+ #clock-cells = <1>;
210+ #phy-cells = <0>;
211+ };
139212 };
Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml+76−0
@@ -0,0 +1,76 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Socionext UniPhier AHCI PHY
8+
9+description: |
10+ This describes the deivcetree bindings for PHY interfaces built into
11+ AHCI controller implemented on Socionext UniPhier SoCs.
12+
13+maintainers:
14+ - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
15+
16+properties:
17+ compatible:
18+ enum:
19+ - socionext,uniphier-pxs2-ahci-phy
20+ - socionext,uniphier-pxs3-ahci-phy
21+
22+ reg:
23+ description: PHY register region (offset and length)
24+
25+ "#phy-cells":
26+ const: 0
27+
28+ clocks:
29+ maxItems: 2
30+
31+ clock-names:
32+ oneOf:
33+ - items: # for PXs2
34+ - const: link
35+ - items: # for others
36+ - const: link
37+ - const: phy
38+
39+ resets:
40+ maxItems: 2
41+
42+ reset-names:
43+ items:
44+ - const: link
45+ - const: phy
46+
47+required:
48+ - compatible
49+ - reg
50+ - "#phy-cells"
51+ - clocks
52+ - clock-names
53+ - resets
54+ - reset-names
55+
56+additionalProperties: false
57+
58+examples:
59+ - |
60+ ahci-glue@65700000 {
61+ compatible = "socionext,uniphier-pxs3-ahci-glue",
62+ "simple-mfd";
63+ #address-cells = <1>;
64+ #size-cells = <1>;
65+ ranges = <0 0x65700000 0x100>;
66+
67+ ahci_phy: phy@10 {
68+ compatible = "socionext,uniphier-pxs3-ahci-phy";
69+ reg = <0x10 0x10>;
70+ #phy-cells = <0>;
71+ clock-names = "link", "phy";
72+ clocks = <&sys_clk 28>, <&sys_clk 30>;
73+ reset-names = "link", "phy";
74+ resets = <&sys_rst 28>, <&sys_rst 30>;
75+ };
76+ };
Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml+74−0
@@ -0,0 +1,74 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: OMAP USB2 PHY
8+
9+maintainers:
10+ - Kishon Vijay Abraham I <kishon@ti.com>
11+ - Roger Quadros <rogerq@ti.com>
12+
13+properties:
14+ compatible:
15+ oneOf:
16+ - items:
17+ - enum:
18+ - ti,dra7x-usb2
19+ - ti,dra7x-usb2-phy2
20+ - ti,am654-usb2
21+ - enum:
22+ - ti,omap-usb2
23+ - items:
24+ - const: ti,am437x-usb2
25+ - items:
26+ - const: ti,omap-usb2
27+
28+ reg:
29+ maxItems: 1
30+
31+ "#phy-cells":
32+ const: 0
33+
34+ clocks:
35+ minItems: 1
36+ items:
37+ - description: wakeup clock
38+ - description: reference clock
39+
40+ clock-names:
41+ minItems: 1
42+ items:
43+ - const: wkupclk
44+ - const: refclk
45+
46+ syscon-phy-power:
47+ $ref: /schemas/types.yaml#definitions/phandle-array
48+ description:
49+ phandle/offset pair. Phandle to the system control module and
50+ register offset to power on/off the PHY.
51+
52+ ctrl-module:
53+ $ref: /schemas/types.yaml#definitions/phandle
54+ description:
55+ (deprecated) phandle of the control module used by PHY driver
56+ to power on the PHY. Use syscon-phy-power instead.
57+
58+required:
59+ - compatible
60+ - reg
61+ - "#phy-cells"
62+ - clocks
63+ - clock-names
64+
65+examples:
66+ - |
67+ usb0_phy: phy@4100000 {
68+ compatible = "ti,am654-usb2", "ti,omap-usb2";
69+ reg = <0x4100000 0x54>;
70+ syscon-phy-power = <&scm_conf 0x4000>;
71+ clocks = <&k3_clks 151 0>, <&k3_clks 151 1>;
72+ clock-names = "wkupclk", "refclk";
73+ #phy-cells = <0>;
74+ };
Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml+10−3
@@ -45,9 +45,15 @@ properties: · 44 unmodified lines
4545 ranges: true
4646
4747 assigned-clocks:
48+ minItems: 1
4849 maxItems: 2
4950
5051 assigned-clock-parents:
52+ minItems: 1
53+ maxItems: 2
54+
55+ assigned-clock-rates:
56+ minItems: 1
5157 maxItems: 2
5258
5359 typec-dir-gpios:
@@ -119,9 +125,10 @@ patternProperties: · 65 unmodified lines
119125 logic.
120126 properties:
121127 clocks:
128+ minItems: 2
122129 maxItems: 4
123− description: Phandle to four clock nodes representing the inputs to
124− refclk_dig
130+ description: Phandle to two (Torrent) or four (Sierra) clock nodes representing
131+ the inputs to refclk_dig
125132
126133 "#clock-cells":
127134 const: 0
@@ -203,7 +210,7 @@ examples: · 75 unmodified lines
203210 };
204211
205212 refclk-dig {
206− clocks = <&k3_clks 292 11>, <&k3_clks 292 0>,
213+ clocks = <&k3_clks 292 11>, <&k3_clks 292 0>,
207214 <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>;
208215 #clock-cells = <0>;
209216 assigned-clocks = <&wiz0_refclk_dig>;
Documentation/devicetree/bindings/phy/ti-phy.txt+0−37
@@ -27,43 +27,6 @@ omap_control_usb: omap-control-usb@4a002300 { · 26 unmodified lines
2727 reg-names = "otghs_control";
2828 };
2929
30−OMAP USB2 PHY
31−
32−Required properties:
33− - compatible: Should be "ti,omap-usb2"
34− Should be "ti,dra7x-usb2" for the 1st instance of USB2 PHY on
35− DRA7x
36− Should be "ti,dra7x-usb2-phy2" for the 2nd instance of USB2 PHY
37− in DRA7x
38− Should be "ti,am654-usb2" for the USB2 PHYs on AM654.
39− - reg : Address and length of the register set for the device.
40− - #phy-cells: determine the number of cells that should be given in the
41− phandle while referencing this phy.
42− - clocks: a list of phandles and clock-specifier pairs, one for each entry in
43− clock-names.
44− - clock-names: should include:
45− * "wkupclk" - wakeup clock.
46− * "refclk" - reference clock (optional).
47−
48−Deprecated properties:
49− - ctrl-module : phandle of the control module used by PHY driver to power on
50− the PHY.
51−
52−Recommended properies:
53−- syscon-phy-power : phandle/offset pair. Phandle to the system control
54− module and the register offset to power on/off the PHY.
55−
56−This is usually a subnode of ocp2scp to which it is connected.
57−
58−usb2phy@4a0ad080 {
59− compatible = "ti,omap-usb2";
60− reg = <0x4a0ad080 0x58>;
61− ctrl-module = <&omap_control_usb>;
62− #phy-cells = <0>;
63− clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>;
64− clock-names = "wkupclk", "refclk";
65−};
66−
6730 TI PIPE3 PHY
6831
6932 Required properties:
Documentation/devicetree/bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml+21−1
@@ -25,13 +25,14 @@ description: | · 24 unmodified lines
2525 The Amlogic A1 embeds a DWC3 USB IP Core configured for USB2 in
2626 host-only mode.
2727
28− The Amlogic GXL & GXM SoCs doesn't embed an USB3 PHY.
28+ The Amlogic GXL, GXM & AXG SoCs doesn't embed an USB3 PHY.
2929
3030 properties:
3131 compatible:
3232 enum:
3333 - amlogic,meson-gxl-usb-ctrl
3434 - amlogic,meson-gxm-usb-ctrl
35+ - amlogic,meson-axg-usb-ctrl
3536 - amlogic,meson-g12a-usb-ctrl
3637 - amlogic,meson-a1-usb-ctrl
3738
@@ -151,6 +152,25 @@ allOf: · 113 unmodified lines
151152
152153 required:
153154 - clock-names
155+ - if:
156+ properties:
157+ compatible:
158+ enum:
159+ - amlogic,meson-axg-usb-ctrl
160+
161+ then:
162+ properties:
163+ phy-names:
164+ items:
165+ - const: usb2-phy1 # USB2 PHY1 if USBOTG_B port is used
166+ clocks:
167+ minItems: 2
168+ clock-names:
169+ items:
170+ - const: usb_ctrl
171+ - const: ddr
172+ required:
173+ - clock-names
154174 - if:
155175 properties:
156176 compatible:
Documentation/devicetree/bindings/usb/atmel-usb.txt+1−0
@@ -82,6 +82,7 @@ Required properties: · 81 unmodified lines
8282 "atmel,at91sam9rl-udc"
8383 "atmel,at91sam9g45-udc"
8484 "atmel,sama5d3-udc"
85+ "microchip,sam9x60-udc"
8586 - reg: Address and length of the register set for the device
8687 - interrupts: Should contain usba interrupt
8788 - clocks: Should reference the peripheral and host clocks
Documentation/devicetree/bindings/usb/cdns,usb3.yaml+96−0
@@ -0,0 +1,96 @@
1+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Cadence USBSS-DRD controller bindings
8+
9+maintainers:
10+ - Pawel Laszczak <pawell@cadence.com>
11+
12+properties:
13+ compatible:
14+ const: cdns,usb3
15+
16+ reg:
17+ items:
18+ - description: OTG controller registers
19+ - description: XHCI Host controller registers
20+ - description: DEVICE controller registers
21+
22+ reg-names:
23+ items:
24+ - const: otg
25+ - const: xhci
26+ - const: dev
27+
28+ interrupts:
29+ items:
30+ - description: OTG/DRD controller interrupt
31+ - description: XHCI host controller interrupt
32+ - description: Device controller interrupt
33+
34+ interrupt-names:
35+ items:
36+ - const: host
37+ - const: peripheral
38+ - const: otg
39+
40+ dr_mode:
41+ enum: [host, otg, peripheral]
42+
43+ maximum-speed:
44+ enum: [super-speed, high-speed, full-speed]
45+
46+ phys:
47+ minItems: 1
48+ maxItems: 2
49+
50+ phy-names:
51+ minItems: 1
52+ maxItems: 2
53+ items:
54+ anyOf:
55+ - const: cdns3,usb2-phy
56+ - const: cdns3,usb3-phy
57+
58+ cdns,on-chip-buff-size:
59+ description:
60+ size of memory intended as internal memory for endpoints
61+ buffers expressed in KB
62+ $ref: /schemas/types.yaml#/definitions/uint32
63+
64+ cdns,phyrst-a-enable:
65+ description: Enable resetting of PHY if Rx fail is detected
66+ type: boolean
67+
68+required:
69+ - compatible
70+ - reg
71+ - reg-names
72+ - interrupts
73+
74+additionalProperties: false
75+
76+examples:
77+ - |
78+ #include <dt-bindings/interrupt-controller/arm-gic.h>
79+ bus {
80+ #address-cells = <2>;
81+ #size-cells = <2>;
82+
83+ usb@6000000 {
84+ compatible = "cdns,usb3";
85+ reg = <0x00 0x6000000 0x00 0x10000>,
86+ <0x00 0x6010000 0x00 0x10000>,
87+ <0x00 0x6020000 0x00 0x10000>;
88+ reg-names = "otg", "xhci", "dev";
89+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
90+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
91+ <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
92+ interrupt-names = "host", "peripheral", "otg";
93+ maximum-speed = "super-speed";
94+ dr_mode = "otg";
95+ };
96+ };
Documentation/devicetree/bindings/usb/cdns-usb3.txt+0−45
@@ -1,45 +0,0 @@
1−Binding for the Cadence USBSS-DRD controller
2−
3−Required properties:
4− - reg: Physical base address and size of the controller's register areas.
5− Controller has 3 different regions:
6− - HOST registers area
7− - DEVICE registers area
8− - OTG/DRD registers area
9− - reg-names - register memory area names:
10− "xhci" - for HOST registers space
11− "dev" - for DEVICE registers space
12− "otg" - for OTG/DRD registers space
13− - compatible: Should contain: "cdns,usb3"
14− - interrupts: Interrupts used by cdns3 controller:
15− "host" - interrupt used by XHCI driver.
16− "peripheral" - interrupt used by device driver
17− "otg" - interrupt used by DRD/OTG part of driver
18−
19−Optional properties:
20− - maximum-speed : valid arguments are "super-speed", "high-speed" and
21− "full-speed"; refer to usb/generic.txt
22− - dr_mode: Should be one of "host", "peripheral" or "otg".
23− - phys: reference to the USB PHY
24− - phy-names: from the *Generic PHY* bindings;
25− Supported names are:
26− - cdns3,usb2-phy
27− - cdns3,usb3-phy
28−
29− - cdns,on-chip-buff-size : size of memory intended as internal memory for endpoints
30− buffers expressed in KB
31−
32−Example:
33− usb@f3000000 {
34− compatible = "cdns,usb3";
35− interrupts = <GIC_USB_IRQ 7 IRQ_TYPE_LEVEL_HIGH>,
36− <GIC_USB_IRQ 7 IRQ_TYPE_LEVEL_HIGH>,
37− <GIC_USB_IRQ 8 IRQ_TYPE_LEVEL_HIGH>;
38− interrupt-names = "host", "peripheral", "otg";
39− reg = <0xf3000000 0x10000>, /* memory area for HOST registers */
40− <0xf3010000 0x10000>, /* memory area for DEVICE registers */
41− <0xf3020000 0x10000>; /* memory area for OTG/DRD registers */
42− reg-names = "xhci", "dev", "otg";
43− phys = <&usb2_phy>, <&usb3_phy>;
44− phy-names = "cdns3,usb2-phy", "cnds3,usb3-phy";
45− };
Documentation/devicetree/bindings/usb/ci-hdrc-usb2.txt+9−0
@@ -100,6 +100,15 @@ i.mx specific properties · 99 unmodified lines
100100 It's recommended to specify the over current polarity.
101101 - power-active-high: power signal polarity is active high
102102 - external-vbus-divider: enables off-chip resistor divider for Vbus
103+- samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current
104+ Control. This signal controls the amount of current sourced to the
105+ USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition.
106+ The range is from 0x0 to 0x3, the default value is 0x1.
107+ Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1.
108+- samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment.
109+ Adjust the high-speed transmitter DC level voltage.
110+ The range is from 0x0 to 0xf, the default value is 0x3.
111+ Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
103112
104113 Example:
105114
Documentation/devicetree/bindings/usb/dwc2.yaml+5−0
@@ -39,6 +39,7 @@ properties: · 38 unmodified lines
3939 - amlogic,meson-g12a-usb
4040 - const: snps,dwc2
4141 - const: amcc,dwc-otg
42+ - const: apm,apm82181-dwc-otg
4243 - const: snps,dwc2
4344 - const: st,stm32f4x9-fsotg
4445 - const: st,stm32f4x9-hsotg
@@ -102,6 +103,10 @@ properties: · 57 unmodified lines
102103 dr_mode:
103104 enum: [host, peripheral, otg]
104105
106+ usb-role-switch:
107+ $ref: /schemas/types.yaml#/definitions/flag
108+ description: Support role switch.
109+
105110 g-rx-fifo-size:
106111 $ref: /schemas/types.yaml#/definitions/uint32
107112 description: size of rx fifo size in gadget mode.
Documentation/devicetree/bindings/usb/dwc3.txt+3−0
@@ -78,6 +78,9 @@ Optional properties: · 77 unmodified lines
7878 park mode are disabled.
7979 - snps,dis_metastability_quirk: when set, disable metastability workaround.
8080 CAUTION: use only if you are absolutely sure of it.
81+ - snps,dis-split-quirk: when set, change the way URBs are handled by the
82+ driver. Needed to avoid -EPROTO errors with usbhid
83+ on some devices (Hikey 970).
8184 - snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
8285 utmi_l1_suspend_n, false when asserts utmi_sleep_n
8386 - snps,hird-threshold: HIRD threshold
Documentation/devicetree/bindings/usb/intel,keembay-dwc3.yaml+77−0
@@ -0,0 +1,77 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/usb/intel,keembay-dwc3.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: Intel Keem Bay DWC3 USB controller
8+
9+maintainers:
10+ - Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>
11+
12+properties:
13+ compatible:
14+ const: intel,keembay-dwc3
15+
16+ clocks:
17+ maxItems: 4
18+
19+ clock-names:
20+ items:
21+ - const: async_master
22+ - const: ref
23+ - const: alt_ref
24+ - const: suspend
25+
26+ ranges: true
27+
28+ '#address-cells':
29+ enum: [ 1, 2 ]
30+
31+ '#size-cells':
32+ enum: [ 1, 2 ]
33+
34+# Required child node:
35+
36+patternProperties:
37+ "^dwc3@[0-9a-f]+$":
38+ type: object
39+ description:
40+ A child node must exist to represent the core DWC3 IP block.
41+ The content of the node is defined in dwc3.txt.
42+
43+required:
44+ - compatible
45+ - clocks
46+ - clock-names
47+ - ranges
48+
49+additionalProperties: false
50+
51+examples:
52+ - |
53+ #include <dt-bindings/interrupt-controller/arm-gic.h>
54+ #include <dt-bindings/interrupt-controller/irq.h>
55+ #define KEEM_BAY_A53_AUX_USB
56+ #define KEEM_BAY_A53_AUX_USB_REF
57+ #define KEEM_BAY_A53_AUX_USB_ALT_REF
58+ #define KEEM_BAY_A53_AUX_USB_SUSPEND
59+
60+ usb {
61+ compatible = "intel,keembay-dwc3";
62+ clocks = <&scmi_clk KEEM_BAY_A53_AUX_USB>,
63+ <&scmi_clk KEEM_BAY_A53_AUX_USB_REF>,
64+ <&scmi_clk KEEM_BAY_A53_AUX_USB_ALT_REF>,
65+ <&scmi_clk KEEM_BAY_A53_AUX_USB_SUSPEND>;
66+ clock-names = "async_master", "ref", "alt_ref", "suspend";
67+ ranges;
68+ #address-cells = <1>;
69+ #size-cells = <1>;
70+
71+ dwc3@34000000 {
72+ compatible = "snps,dwc3";
73+ reg = <0x34000000 0x10000>;
74+ interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
75+ dr_mode = "peripheral";
76+ };
77+ };
Documentation/devicetree/bindings/usb/mediatek,mt6360-tcpc.yaml+95−0
@@ -0,0 +1,95 @@
1+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: "http://devicetree.org/schemas/usb/mediatek,mt6360-tcpc.yaml#"
5+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6+
7+title: Mediatek MT6360 Type-C Port Switch and Power Delivery controller DT bindings
8+
9+maintainers:
10+ - ChiYuan Huang <cy_huang@richtek.com>
11+
12+description: |
13+ Mediatek MT6360 is a multi-functional device. It integrates charger, ADC, flash, RGB indicators,
14+ regulators (BUCKs/LDOs), and TypeC Port Switch with Power Delivery controller.
15+ This document only describes MT6360 Type-C Port Switch and Power Delivery controller.
16+
17+properties:
18+ compatible:
19+ enum:
20+ - mediatek,mt6360-tcpc
21+
22+ interrupts:
23+ maxItems: 1
24+
25+ interrupt-names:
26+ items:
27+ - const: PD_IRQB
28+
29+ connector:
30+ type: object
31+ $ref: ../connector/usb-connector.yaml#
32+ description:
33+ Properties for usb c connector.
34+
35+additionalProperties: false
36+
37+required:
38+ - compatible
39+ - interrupts
40+ - interrupt-names
41+
42+examples:
43+ - |
44+ #include <dt-bindings/interrupt-controller/irq.h>
45+ #include <dt-bindings/usb/pd.h>
46+ i2c0 {
47+ #address-cells = <1>;
48+ #size-cells = <0>;
49+
50+ mt6360@34 {
51+ compatible = "mediatek,mt6360";
52+ reg = <0x34>;
53+ tcpc {
54+ compatible = "mediatek,mt6360-tcpc";
55+ interrupts-extended = <&gpio26 3 IRQ_TYPE_LEVEL_LOW>;
56+ interrupt-names = "PD_IRQB";
57+
58+ connector {
59+ compatible = "usb-c-connector";
60+ label = "USB-C";
61+ data-role = "dual";
62+ power-role = "dual";
63+ try-power-role = "sink";
64+ source-pdos = <PDO_FIXED(5000, 1000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
65+ sink-pdos = <PDO_FIXED(5000, 2000, PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP)>;
66+ op-sink-microwatt = <10000000>;
67+
68+ ports {
69+ #address-cells = <1>;
70+ #size-cells = <0>;
71+
72+ port@0 {
73+ reg = <0>;
74+ endpoint {
75+ remote-endpoint = <&usb_hs>;
76+ };
77+ };
78+ port@1 {
79+ reg = <1>;
80+ endpoint {
81+ remote-endpoint = <&usb_ss>;
82+ };
83+ };
84+ port@2 {
85+ reg = <2>;
86+ endpoint {
87+ remote-endpoint = <&dp_aux>;
88+ };
89+ };
90+ };
91+ };
92+ };
93+ };
94+ };
95+...
Documentation/devicetree/bindings/usb/renesas,usb-xhci.yaml+1−0
@@ -30,6 +30,7 @@ properties: · 29 unmodified lines
3030 - renesas,xhci-r8a774a1 # RZ/G2M
3131 - renesas,xhci-r8a774b1 # RZ/G2N
3232 - renesas,xhci-r8a774c0 # RZ/G2E
33+ - renesas,xhci-r8a774e1 # RZ/G2H
3334 - renesas,xhci-r8a7795 # R-Car H3
3435 - renesas,xhci-r8a7796 # R-Car M3-W
3536 - renesas,xhci-r8a77961 # R-Car M3-W+
Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml+30−5
@@ -16,6 +16,7 @@ properties: · 15 unmodified lines
1616 - renesas,r8a774a1-usb3-peri # RZ/G2M
1717 - renesas,r8a774b1-usb3-peri # RZ/G2N
1818 - renesas,r8a774c0-usb3-peri # RZ/G2E
19+ - renesas,r8a774e1-usb3-peri # RZ/G2H
1920 - renesas,r8a7795-usb3-peri # R-Car H3
2021 - renesas,r8a7796-usb3-peri # R-Car M3-W
2122 - renesas,r8a77961-usb3-peri # R-Car M3-W+
@@ -52,11 +53,24 @@ properties: · 30 unmodified lines
5253 $ref: /schemas/types.yaml#/definitions/phandle
5354 description: phandle of a companion.
5455
55− port:
56+ ports:
5657 description: |
5758 any connector to the data bus of this controller should be modelled
5859 using the OF graph bindings specified, if the "usb-role-switch"
5960 property is used.
61+ type: object
62+ properties:
63+ port@0:
64+ type: object
65+ description: High Speed (HS) data bus.
66+
67+ port@1:
68+ type: object
69+ description: Super Speed (SS) data bus.
70+
71+ required:
72+ - port@0
73+ - port@1
6074
6175 required:
6276 - compatible
@@ -79,9 +93,20 @@ examples: · 16 unmodified lines
7993 companion = <&xhci0>;
8094 usb-role-switch;
8195
82− port {
83− usb3_role_switch: endpoint {
84− remote-endpoint = <&hd3ss3220_ep>;
85− };
96+ ports {
97+ #address-cells = <1>;
98+ #size-cells = <0>;
99+ port@0 {
100+ reg = <0>;
101+ usb3_hs_ep: endpoint {
102+ remote-endpoint = <&hs_ep>;
103+ };
104+ };
105+ port@1 {
106+ reg = <1>;
107+ usb3_role_switch: endpoint {
108+ remote-endpoint = <&hd3ss3220_out_ep>;
109+ };
110+ };
86111 };
87112 };
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml+1−0
@@ -39,6 +39,7 @@ properties: · 38 unmodified lines
3939 - renesas,usbhs-r8a774a1 # RZ/G2M
4040 - renesas,usbhs-r8a774b1 # RZ/G2N
4141 - renesas,usbhs-r8a774c0 # RZ/G2E
42+ - renesas,usbhs-r8a774e1 # RZ/G2H
4243 - renesas,usbhs-r8a7795 # R-Car H3
4344 - renesas,usbhs-r8a7796 # R-Car M3-W
4445 - renesas,usbhs-r8a77961 # R-Car M3-W+
Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt+0−38
@@ -1,38 +0,0 @@
1−TI HD3SS3220 TypeC DRP Port Controller.
2−
3−Required properties:
4− - compatible: Must be "ti,hd3ss3220".
5− - reg: I2C slave address, must be 0x47 or 0x67 based on ADDR pin.
6− - interrupts: An interrupt specifier.
7−
8−Required sub-node:
9− - connector: The "usb-c-connector" attached to the hd3ss3220 chip. The
10− bindings of the connector node are specified in:
11−
12− Documentation/devicetree/bindings/connector/usb-connector.yaml
13−
14−Example:
15−hd3ss3220@47 {
16− compatible = "ti,hd3ss3220";
17− reg = <0x47>;
18− interrupt-parent = <&gpio6>;
19− interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
20−
21− connector {
22− compatible = "usb-c-connector";
23− label = "USB-C";
24− data-role = "dual";
25−
26− ports {
27− #address-cells = <1>;
28− #size-cells = <0>;
29−
30− port@1 {
31− reg = <1>;
32− hd3ss3220_ep: endpoint {
33− remote-endpoint = <&usb3_role_switch>;
34− };
35− };
36− };
37− };
38−};
Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml+82−0
@@ -0,0 +1,82 @@
1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+%YAML 1.2
3+---
4+$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml#
5+$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+title: TI HD3SS3220 TypeC DRP Port Controller
8+
9+maintainers:
10+ - Biju Das <biju.das.jz@bp.renesas.com>
11+
12+description: |-
13+ HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel
14+ Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The
15+ HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a
16+ Dual Role Port (DRP) making it ideal for any application.
17+
18+properties:
19+ compatible:
20+ const: ti,hd3ss3220
21+
22+ reg:
23+ maxItems: 1
24+
25+ interrupts:
26+ maxItems: 1
27+
28+ ports:
29+ description: OF graph bindings (specified in bindings/graph.txt) that model
30+ SS data bus to the SS capable connector.
31+ type: object
32+ properties:
33+ port@0:
34+ type: object
35+ description: Super Speed (SS) MUX inputs connected to SS capable connector.
36+ $ref: /connector/usb-connector.yaml#/properties/ports/properties/port@1
37+
38+ port@1:
39+ type: object
40+ description: Output of 2:1 MUX connected to Super Speed (SS) data bus.
41+
42+ required:
43+ - port@0
44+ - port@1
45+
46+required:
47+ - compatible
48+ - reg
49+ - interrupts
50+
51+additionalProperties: false
52+
53+examples:
54+ - |
55+ i2c0 {
56+ #address-cells = <1>;
57+ #size-cells = <0>;
58+
59+ hd3ss3220@47 {
60+ compatible = "ti,hd3ss3220";
61+ reg = <0x47>;
62+ interrupt-parent = <&gpio6>;
63+ interrupts = <3>;
64+
65+ ports {
66+ #address-cells = <1>;
67+ #size-cells = <0>;
68+ port@0 {
69+ reg = <0>;
70+ hd3ss3220_in_ep: endpoint {
71+ remote-endpoint = <&ss_ep>;
72+ };
73+ };
74+ port@1 {
75+ reg = <1>;
76+ hd3ss3220_out_ep: endpoint {
77+ remote-endpoint = <&usb3_role_switch>;
78+ };
79+ };
80+ };
81+ };
82+ };
MAINTAINERS+19−1
@@ -3454,6 +3454,14 @@ F: drivers/bus/brcmstb_gisb.c · 3453 unmodified lines
34543454 F: drivers/pci/controller/pcie-brcmstb.c
34553455 N: brcmstb
34563456
3457+BROADCOM BDC DRIVER
3458+M: Al Cooper <alcooperx@gmail.com>
3459+L: linux-usb@vger.kernel.org
3460+L: bcm-kernel-feedback-list@broadcom.com
3461+S: Maintained
3462+F: Documentation/devicetree/bindings/usb/brcm,bdc.txt
3463+F: drivers/usb/gadget/udc/bdc/
3464+
34573465 BROADCOM BMIPS CPUFREQ DRIVER
34583466 M: Markus Mayer <mmayer@broadcom.com>
34593467 M: bcm-kernel-feedback-list@broadcom.com
@@ -3831,6 +3839,16 @@ S: Orphan · 371 unmodified lines
38313839 F: Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
38323840 F: drivers/mtd/nand/raw/cadence-nand-controller.c
38333841
3842+CADENCE USB3 DRD IP DRIVER
3843+M: Peter Chen <peter.chen@nxp.com>
3844+M: Pawel Laszczak <pawell@cadence.com>
3845+M: Roger Quadros <rogerq@ti.com>
3846+L: linux-usb@vger.kernel.org
3847+S: Maintained
3848+T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
3849+F: Documentation/devicetree/bindings/usb/cdns-usb3.txt
3850+F: drivers/usb/cdns3/
3851+
38343852 CADET FM/AM RADIO RECEIVER DRIVER
38353853 M: Hans Verkuil <hverkuil@xs4all.nl>
38363854 L: linux-media@vger.kernel.org
@@ -11037,7 +11055,7 @@ F: net/dsa/tag_mtk.c · 7200 unmodified lines
1103711055
1103811056 MEDIATEK USB3 DRD IP DRIVER
1103911057 M: Chunfeng Yun <chunfeng.yun@mediatek.com>
11040−L: linux-usb@vger.kernel.org (moderated for non-subscribers)
11058+L: linux-usb@vger.kernel.org
1104111059 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1104211060 L: linux-mediatek@lists.infradead.org (moderated for non-subscribers)
1104311061 S: Maintained
arch/arm/boot/dts/at91-sam9x60ek.dts+13−0
@@ -563,6 +563,12 @@ · 562 unmodified lines
563563 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
564564 };
565565 };
566+
567+ usb0 {
568+ pinctrl_usba_vbus: usba_vbus {
569+ atmel,pins = <AT91_PIOB 16 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
570+ };
571+ };
566572 }; /* pinctrl */
567573
568574 &pmc {
@@ -666,6 +672,13 @@ · 97 unmodified lines
666672 };
667673 };
668674
675+&usb0 {
676+ atmel,vbus-gpio = <&pioB 16 GPIO_ACTIVE_HIGH>;
677+ pinctrl-names = "default";
678+ pinctrl-0 = <&pinctrl_usba_vbus>;
679+ status = "okay";
680+};
681+
669682 &usb1 {
670683 num-ports = <3>;
671684 atmel,vbus-gpio = <0
arch/arm/boot/dts/bcm2711-rpi-4-b.dts+22−0
@@ -4,6 +4,8 @@ · 3 unmodified lines
44 #include "bcm2835-rpi.dtsi"
55 #include "bcm283x-rpi-usb-peripheral.dtsi"
66
7+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
8+
79 / {
810 compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
911 model = "Raspberry Pi 4 Model B";
@@ -88,6 +90,11 @@ · 78 unmodified lines
8890 "";
8991 status = "okay";
9092 };
93+
94+ reset: reset {
95+ compatible = "raspberrypi,firmware-reset";
96+ #reset-cells = <1>;
97+ };
9198 };
9299
93100 &gpio {
@@ -207,6 +214,21 @@ · 113 unmodified lines
207214 };
208215 };
209216
217+&pcie0 {
218+ pci@1,0 {
219+ #address-cells = <3>;
220+ #size-cells = <2>;
221+ ranges;
222+
223+ reg = <0 0 0 0 0>;
224+
225+ usb@1,0 {
226+ reg = <0x10000 0 0 0 0>;
227+ resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>;
228+ };
229+ };
230+};
231+
210232 /* uart0 communicates with the BT module */
211233 &uart0 {
212234 pinctrl-names = "default";
arch/arm/boot/dts/sam9x60.dtsi+14−0
@@ -69,6 +69,20 @@ · 68 unmodified lines
6969 #size-cells = <1>;
7070 ranges;
7171
72+ usb0: gadget@500000 {
73+ #address-cells = <1>;
74+ #size-cells = <0>;
75+ compatible = "microchip,sam9x60-udc";
76+ reg = <0x00500000 0x100000
77+ 0xf803c000 0x400>;
78+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
79+ clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
80+ clock-names = "pclk", "hclk";
81+ assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
82+ assigned-clock-rates = <480000000>;
83+ status = "disabled";
84+ };
85+
7286 usb1: ohci@600000 {
7387 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
7488 reg = <0x00600000 0x100000>;
drivers/acpi/bus.c+1−0
@@ -555,6 +555,7 @@ struct device *acpi_get_first_physical_node(struct acpi_device *adev) · 554 unmodified lines
555555 mutex_unlock(physical_node_lock);
556556 return phys_dev;
557557 }
558+EXPORT_SYMBOL_GPL(acpi_get_first_physical_node);
558559
559560 static struct acpi_device *acpi_primary_dev_companion(struct acpi_device *adev,
560561 const struct device *dev)
drivers/bluetooth/ath3k.c+29−64
@@ -212,19 +212,16 @@ static int ath3k_load_firmware(struct usb_device *udev, · 211 unmodified lines
212212
213213 BT_DBG("udev %p", udev);
214214
215− pipe = usb_sndctrlpipe(udev, 0);
216−
217215 send_buf = kmalloc(BULK_SIZE, GFP_KERNEL);
218216 if (!send_buf) {
219217 BT_ERR("Can't allocate memory chunk for firmware");
220218 return -ENOMEM;
221219 }
222220
223− memcpy(send_buf, firmware->data, FW_HDR_SIZE);
224− err = usb_control_msg(udev, pipe, USB_REQ_DFU_DNLOAD, USB_TYPE_VENDOR,
225− 0, 0, send_buf, FW_HDR_SIZE,
226− USB_CTRL_SET_TIMEOUT);
227− if (err < 0) {
221+ err = usb_control_msg_send(udev, 0, USB_REQ_DFU_DNLOAD, USB_TYPE_VENDOR,
222+ 0, 0, firmware->data, FW_HDR_SIZE,
223+ USB_CTRL_SET_TIMEOUT, GFP_KERNEL);
224+ if (err) {
228225 BT_ERR("Can't change to loading configuration err");
229226 goto error;
230227 }
@@ -259,44 +256,19 @@ error: · 28 unmodified lines
259256
260257 static int ath3k_get_state(struct usb_device *udev, unsigned char *state)
261258 {
262− int ret, pipe = 0;
263− char *buf;
264−
265− buf = kmalloc(sizeof(*buf), GFP_KERNEL);
266− if (!buf)
267− return -ENOMEM;
268−
269− pipe = usb_rcvctrlpipe(udev, 0);
270− ret = usb_control_msg(udev, pipe, ATH3K_GETSTATE,
271− USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
272− buf, sizeof(*buf), USB_CTRL_SET_TIMEOUT);
273−
274− *state = *buf;
275− kfree(buf);
276−
277− return ret;
259+ return usb_control_msg_recv(udev, 0, ATH3K_GETSTATE,
260+ USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
261+ state, 1, USB_CTRL_SET_TIMEOUT,
262+ GFP_KERNEL);
278263 }
279264
280265 static int ath3k_get_version(struct usb_device *udev,
281266 struct ath3k_version *version)
282267 {
283− int ret, pipe = 0;
284− struct ath3k_version *buf;
285− const int size = sizeof(*buf);
286−
287− buf = kmalloc(size, GFP_KERNEL);
288− if (!buf)
289− return -ENOMEM;
290−
291− pipe = usb_rcvctrlpipe(udev, 0);
292− ret = usb_control_msg(udev, pipe, ATH3K_GETVERSION,
293− USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
294− buf, size, USB_CTRL_SET_TIMEOUT);
295−
296− memcpy(version, buf, size);
297− kfree(buf);
298−
299− return ret;
268+ return usb_control_msg_recv(udev, 0, ATH3K_GETVERSION,
269+ USB_TYPE_VENDOR | USB_DIR_IN, 0, 0,
270+ version, sizeof(*version), USB_CTRL_SET_TIMEOUT,
271+ GFP_KERNEL);
300272 }
301273
302274 static int ath3k_load_fwfile(struct usb_device *udev,
@@ -316,13 +288,11 @@ static int ath3k_load_fwfile(struct usb_device *udev, · 13 unmodified lines
316288 }
317289
318290 size = min_t(uint, count, FW_HDR_SIZE);
319− memcpy(send_buf, firmware->data, size);
320291
321− pipe = usb_sndctrlpipe(udev, 0);
322− ret = usb_control_msg(udev, pipe, ATH3K_DNLOAD,
323− USB_TYPE_VENDOR, 0, 0, send_buf,
324− size, USB_CTRL_SET_TIMEOUT);
325− if (ret < 0) {
292+ ret = usb_control_msg_send(udev, 0, ATH3K_DNLOAD, USB_TYPE_VENDOR, 0, 0,
293+ firmware->data, size, USB_CTRL_SET_TIMEOUT,
294+ GFP_KERNEL);
295+ if (ret) {
326296 BT_ERR("Can't change to loading configuration err");
327297 kfree(send_buf);
328298 return ret;
@@ -355,23 +325,19 @@ static int ath3k_load_fwfile(struct usb_device *udev, · 26 unmodified lines
355325 return 0;
356326 }
357327
358−static int ath3k_switch_pid(struct usb_device *udev)
328+static void ath3k_switch_pid(struct usb_device *udev)
359329 {
360− int pipe = 0;
361−
362− pipe = usb_sndctrlpipe(udev, 0);
363− return usb_control_msg(udev, pipe, USB_REG_SWITCH_VID_PID,
364− USB_TYPE_VENDOR, 0, 0,
365− NULL, 0, USB_CTRL_SET_TIMEOUT);
330+ usb_control_msg_send(udev, 0, USB_REG_SWITCH_VID_PID, USB_TYPE_VENDOR,
331+ 0, 0, NULL, 0, USB_CTRL_SET_TIMEOUT, GFP_KERNEL);
366332 }
367333
368334 static int ath3k_set_normal_mode(struct usb_device *udev)
369335 {
370336 unsigned char fw_state;
371− int pipe = 0, ret;
337+ int ret;
372338
373339 ret = ath3k_get_state(udev, &fw_state);
374− if (ret < 0) {
340+ if (ret) {
375341 BT_ERR("Can't get state to change to normal mode err");
376342 return ret;
377343 }
@@ -381,10 +347,9 @@ static int ath3k_set_normal_mode(struct usb_device *udev) · 3 unmodified lines
381347 return 0;
382348 }
383349
384− pipe = usb_sndctrlpipe(udev, 0);
385− return usb_control_msg(udev, pipe, ATH3K_SET_NORMAL_MODE,
386− USB_TYPE_VENDOR, 0, 0,
387− NULL, 0, USB_CTRL_SET_TIMEOUT);
350+ return usb_control_msg_send(udev, 0, ATH3K_SET_NORMAL_MODE,
351+ USB_TYPE_VENDOR, 0, 0, NULL, 0,
352+ USB_CTRL_SET_TIMEOUT, GFP_KERNEL);
388353 }
389354
390355 static int ath3k_load_patch(struct usb_device *udev)
@@ -397,7 +362,7 @@ static int ath3k_load_patch(struct usb_device *udev) · 6 unmodified lines
397362 int ret;
398363
399364 ret = ath3k_get_state(udev, &fw_state);
400− if (ret < 0) {
365+ if (ret) {
401366 BT_ERR("Can't get state to change to load ram patch err");
402367 return ret;
403368 }
@@ -408,7 +373,7 @@ static int ath3k_load_patch(struct usb_device *udev) · 4 unmodified lines
408373 }
409374
410375 ret = ath3k_get_version(udev, &fw_version);
411− if (ret < 0) {
376+ if (ret) {
412377 BT_ERR("Can't get version to change to load ram patch err");
413378 return ret;
414379 }
@@ -449,13 +414,13 @@ static int ath3k_load_syscfg(struct usb_device *udev) · 34 unmodified lines
449414 int clk_value, ret;
450415
451416 ret = ath3k_get_state(udev, &fw_state);
452− if (ret < 0) {
417+ if (ret) {
453418 BT_ERR("Can't get state to change to load configuration err");
454419 return -EBUSY;
455420 }
456421
457422 ret = ath3k_get_version(udev, &fw_version);
458− if (ret < 0) {
423+ if (ret) {
459424 BT_ERR("Can't get version to change to load ram patch err");
460425 return ret;
461426 }
@@ -529,7 +494,7 @@ static int ath3k_probe(struct usb_interface *intf, · 67 unmodified lines
529494 return ret;
530495 }
531496 ret = ath3k_set_normal_mode(udev);
532− if (ret < 0) {
497+ if (ret) {
533498 BT_ERR("Set normal mode failed");
534499 return ret;
535500 }
drivers/firmware/Kconfig+1−2
@@ -178,9 +178,8 @@ config ISCSI_IBFT · 177 unmodified lines
178178 Otherwise, say N.
179179
180180 config RASPBERRYPI_FIRMWARE
181− bool "Raspberry Pi Firmware Driver"
181+ tristate "Raspberry Pi Firmware Driver"
182182 depends on BCM2835_MBOX
183− default USB_PCI
184183 help
185184 This option enables support for communicating with the firmware on the
186185 Raspberry Pi.
drivers/firmware/raspberrypi.c+0−61
@@ -12,8 +12,6 @@ · 11 unmodified lines
1212 #include <linux/of_platform.h>
1313 #include <linux/platform_device.h>
1414 #include <linux/slab.h>
15−#include <linux/pci.h>
16−#include <linux/delay.h>
1715 #include <soc/bcm2835/raspberrypi-firmware.h>
1816
1917 #define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf))
@@ -21,8 +19,6 @@ · 1 unmodified line
2119 #define MBOX_DATA28(msg) ((msg) & ~0xf)
2220 #define MBOX_CHAN_PROPERTY 8
2321
24−#define VL805_PCI_CONFIG_VERSION_OFFSET 0x50
25−
2622 static struct platform_device *rpi_hwmon;
2723 static struct platform_device *rpi_clk;
2824
@@ -301,63 +297,6 @@ struct rpi_firmware *rpi_firmware_get(struct device_node *firmware_node) · 272 unmodified lines
301297 }
302298 EXPORT_SYMBOL_GPL(rpi_firmware_get);
303299
304−/*
305− * The Raspberry Pi 4 gets its USB functionality from VL805, a PCIe chip that
306− * implements xHCI. After a PCI reset, VL805's firmware may either be loaded
307− * directly from an EEPROM or, if not present, by the SoC's co-processor,
308− * VideoCore. RPi4's VideoCore OS contains both the non public firmware load
309− * logic and the VL805 firmware blob. This function triggers the aforementioned
310− * process.
311− */
312−int rpi_firmware_init_vl805(struct pci_dev *pdev)
313−{
314− struct device_node *fw_np;
315− struct rpi_firmware *fw;
316− u32 dev_addr, version;
317− int ret;
318−
319− fw_np = of_find_compatible_node(NULL, NULL,
320− "raspberrypi,bcm2835-firmware");
321− if (!fw_np)
322− return 0;
323−
324− fw = rpi_firmware_get(fw_np);
325− of_node_put(fw_np);
326− if (!fw)
327− return -ENODEV;
328−
329− /*
330− * Make sure we don't trigger a firmware load unnecessarily.
331− *
332− * If something went wrong with PCI, this whole exercise would be
333− * futile as VideoCore expects from us a configured PCI bus. Just take
334− * the faulty version (likely ~0) and let xHCI's registration fail
335− * further down the line.
336− */
337− pci_read_config_dword(pdev, VL805_PCI_CONFIG_VERSION_OFFSET, &version);
338− if (version)
339− goto exit;
340−
341− dev_addr = pdev->bus->number << 20 | PCI_SLOT(pdev->devfn) << 15 |
342− PCI_FUNC(pdev->devfn) << 12;
343−
344− ret = rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET,
345− &dev_addr, sizeof(dev_addr));
346− if (ret)
347− return ret;
348−
349− /* Wait for vl805 to startup */
350− usleep_range(200, 1000);
351−
352− pci_read_config_dword(pdev, VL805_PCI_CONFIG_VERSION_OFFSET,
353− &version);
354−exit:
355− pci_info(pdev, "VL805 firmware version %08x\n", version);
356−
357− return 0;
358−}
359−EXPORT_SYMBOL_GPL(rpi_firmware_init_vl805);
360−
361300 static const struct of_device_id rpi_firmware_of_match[] = {
362301 { .compatible = "raspberrypi,bcm2835-firmware", },
363302 {},
drivers/net/usb/pegasus.c+15−46
@@ -124,62 +124,31 @@ static void async_ctrl_callback(struct urb *urb) · 123 unmodified lines
124124
125125 static int get_registers(pegasus_t *pegasus, __u16 indx, __u16 size, void *data)
126126 {
127− u8 *buf;
128− int ret;
129−
130− buf = kmalloc(size, GFP_NOIO);
131− if (!buf)
132− return -ENOMEM;
133−
134− ret = usb_control_msg(pegasus->usb, usb_rcvctrlpipe(pegasus->usb, 0),
135− PEGASUS_REQ_GET_REGS, PEGASUS_REQT_READ, 0,
136− indx, buf, size, 1000);
137− if (ret < 0)
138− netif_dbg(pegasus, drv, pegasus->net,
139− "%s returned %d\n", __func__, ret);
140− else if (ret <= size)
141− memcpy(data, buf, ret);
142− kfree(buf);
143− return ret;
127+ return usb_control_msg_recv(pegasus->usb, 0, PEGASUS_REQ_GET_REGS,
128+ PEGASUS_REQT_READ, 0, indx, data, size,
129+ 1000, GFP_NOIO);
144130 }
145131
146132 static int set_registers(pegasus_t *pegasus, __u16 indx, __u16 size,
147133 const void *data)
148134 {
149− u8 *buf;
150− int ret;
151−
152− buf = kmemdup(data, size, GFP_NOIO);
153− if (!buf)
154− return -ENOMEM;
155−
156− ret = usb_control_msg(pegasus->usb, usb_sndctrlpipe(pegasus->usb, 0),
157− PEGASUS_REQ_SET_REGS, PEGASUS_REQT_WRITE, 0,
158− indx, buf, size, 100);
159− if (ret < 0)
160− netif_dbg(pegasus, drv, pegasus->net,
161− "%s returned %d\n", __func__, ret);
162− kfree(buf);
163− return ret;
135+ return usb_control_msg_send(pegasus->usb, 0, PEGASUS_REQ_SET_REGS,
136+ PEGASUS_REQT_WRITE, 0, indx, data, size,
137+ 1000, GFP_NOIO);
164138 }
165139
140+/*
141+ * There is only one way to write to a single ADM8511 register and this is via
142+ * specific control request. 'data' is ignored by the device, but it is here to
143+ * not break the API.
144+ */
166145 static int set_register(pegasus_t *pegasus, __u16 indx, __u8 data)
167146 {
168− u8 *buf;
169− int ret;
170−
171− buf = kmemdup(&data, 1, GFP_NOIO);
172− if (!buf)
173− return -ENOMEM;
147+ void *buf = &data;
174148
175− ret = usb_control_msg(pegasus->usb, usb_sndctrlpipe(pegasus->usb, 0),
176− PEGASUS_REQ_SET_REG, PEGASUS_REQT_WRITE, data,
177− indx, buf, 1, 1000);
178− if (ret < 0)
179− netif_dbg(pegasus, drv, pegasus->net,
180− "%s returned %d\n", __func__, ret);
181− kfree(buf);
182− return ret;
149+ return usb_control_msg_send(pegasus->usb, 0, PEGASUS_REQ_SET_REG,
150+ PEGASUS_REQT_WRITE, data, indx, buf, 1,
151+ 1000, GFP_NOIO);
183152 }
184153
185154 static int update_eth_regs_async(pegasus_t *pegasus)
drivers/net/usb/rtl8150.c+6−26
@@ -152,36 +152,16 @@ static const char driver_name [] = "rtl8150"; · 151 unmodified lines
152152 */
153153 static int get_registers(rtl8150_t * dev, u16 indx, u16 size, void *data)
154154 {
155− void *buf;
156− int ret;
157−
158− buf = kmalloc(size, GFP_NOIO);
159− if (!buf)
160− return -ENOMEM;
161−
162− ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
163− RTL8150_REQ_GET_REGS, RTL8150_REQT_READ,
164− indx, 0, buf, size, 500);
165− if (ret > 0 && ret <= size)
166− memcpy(data, buf, ret);
167− kfree(buf);
168− return ret;
155+ return usb_control_msg_recv(dev->udev, 0, RTL8150_REQ_GET_REGS,
156+ RTL8150_REQT_READ, indx, 0, data, size,
157+ 1000, GFP_NOIO);
169158 }
170159
171160 static int set_registers(rtl8150_t * dev, u16 indx, u16 size, const void *data)
172161 {
173− void *buf;
174− int ret;
175−
176− buf = kmemdup(data, size, GFP_NOIO);
177− if (!buf)
178− return -ENOMEM;
179−
180− ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
181− RTL8150_REQ_SET_REGS, RTL8150_REQT_WRITE,
182− indx, 0, buf, size, 500);
183− kfree(buf);
184− return ret;
162+ return usb_control_msg_send(dev->udev, 0, RTL8150_REQ_SET_REGS,
163+ RTL8150_REQT_WRITE, indx, 0, data, size,
164+ 1000, GFP_NOIO);
185165 }
186166
187167 static void async_set_reg_cb(struct urb *urb)
drivers/pci/controller/pcie-brcmstb.c+0−17
@@ -28,8 +28,6 @@ · 27 unmodified lines
2828 #include <linux/string.h>
2929 #include <linux/types.h>
3030
31−#include <soc/bcm2835/raspberrypi-firmware.h>
32−
3331 #include "../pci.h"
3432
3533 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
@@ -931,24 +929,9 @@ static int brcm_pcie_probe(struct platform_device *pdev) · 895 unmodified lines
931929 {
932930 struct device_node *np = pdev->dev.of_node, *msi_np;
933931 struct pci_host_bridge *bridge;
934− struct device_node *fw_np;
935932 struct brcm_pcie *pcie;
936933 int ret;
937934
938− /*
939− * We have to wait for Raspberry Pi's firmware interface to be up as a
940− * PCI fixup, rpi_firmware_init_vl805(), depends on it. This driver's
941− * probe can race with the firmware interface's (see
942− * drivers/firmware/raspberrypi.c) and potentially break the PCI fixup.
943− */
944− fw_np = of_find_compatible_node(NULL, NULL,
945− "raspberrypi,bcm2835-firmware");
946− if (fw_np && !rpi_firmware_get(fw_np)) {
947− of_node_put(fw_np);
948− return -EPROBE_DEFER;
949− }
950− of_node_put(fw_np);
951−
952935 bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie));
953936 if (!bridge)
954937 return -ENOMEM;
drivers/pci/quirks.c+0−57
@@ -3673,63 +3673,6 @@ static void quirk_apple_poweroff_thunderbolt(struct pci_dev *dev) · 3672 unmodified lines
36733673 DECLARE_PCI_FIXUP_SUSPEND_LATE(PCI_VENDOR_ID_INTEL,
36743674 PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
36753675 quirk_apple_poweroff_thunderbolt);
3676−
3677−/*
3678− * Apple: Wait for the Thunderbolt controller to reestablish PCI tunnels
3679− *
3680− * During suspend the Thunderbolt controller is reset and all PCI
3681− * tunnels are lost. The NHI driver will try to reestablish all tunnels
3682− * during resume. We have to manually wait for the NHI since there is
3683− * no parent child relationship between the NHI and the tunneled
3684− * bridges.
3685− */
3686−static void quirk_apple_wait_for_thunderbolt(struct pci_dev *dev)
3687−{
3688− struct pci_dev *sibling = NULL;
3689− struct pci_dev *nhi = NULL;
3690−
3691− if (!x86_apple_machine)
3692− return;
3693− if (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)
3694− return;
3695−
3696− /*
3697− * Find the NHI and confirm that we are a bridge on the Thunderbolt
3698− * host controller and not on a Thunderbolt endpoint.
3699− */
3700− sibling = pci_get_slot(dev->bus, 0x0);
3701− if (sibling == dev)
3702− goto out; /* we are the downstream bridge to the NHI */
3703− if (!sibling || !sibling->subordinate)
3704− goto out;
3705− nhi = pci_get_slot(sibling->subordinate, 0x0);
3706− if (!nhi)
3707− goto out;
3708− if (nhi->vendor != PCI_VENDOR_ID_INTEL
3709− || (nhi->device != PCI_DEVICE_ID_INTEL_LIGHT_RIDGE &&
3710− nhi->device != PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C &&
3711− nhi->device != PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI &&
3712− nhi->device != PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI)
3713− || nhi->class != PCI_CLASS_SYSTEM_OTHER << 8)
3714− goto out;
3715− pci_info(dev, "quirk: waiting for Thunderbolt to reestablish PCI tunnels...\n");
3716− device_pm_wait_for_dev(&dev->dev, &nhi->dev);
3717−out:
3718− pci_dev_put(nhi);
3719− pci_dev_put(sibling);
3720−}
3721−DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
3722− PCI_DEVICE_ID_INTEL_LIGHT_RIDGE,
3723− quirk_apple_wait_for_thunderbolt);
3724−DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
3725− PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C,
3726− quirk_apple_wait_for_thunderbolt);
3727−DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
3728− PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE,
3729− quirk_apple_wait_for_thunderbolt);
3730−DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL,
3731− PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE,
3732− quirk_apple_wait_for_thunderbolt);
37333676 #endif
37343677
37353678 /*
drivers/phy/Kconfig+11−0
@@ -49,6 +49,17 @@ config PHY_XGENE · 48 unmodified lines
4949 help
5050 This option enables support for APM X-Gene SoC multi-purpose PHY.
5151
52+config USB_LGM_PHY
53+ tristate "INTEL Lightning Mountain USB PHY Driver"
54+ depends on USB_SUPPORT
55+ select USB_PHY
56+ select REGULATOR
57+ select REGULATOR_FIXED_VOLTAGE
58+ help
59+ Enable this to support Intel DWC3 PHY USB phy. This driver provides
60+ interface to interact with USB GEN-II and USB 3.x PHY that is part
61+ of the Intel network SOC.
62+
5263 source "drivers/phy/allwinner/Kconfig"
5364 source "drivers/phy/amlogic/Kconfig"
5465 source "drivers/phy/broadcom/Kconfig"
drivers/phy/Makefile+1−0
@@ -8,6 +8,7 @@ obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o · 7 unmodified lines
88 obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
99 obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
1010 obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
11+obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
1112 obj-y += allwinner/ \
1213 amlogic/ \
1314 broadcom/ \
drivers/phy/broadcom/phy-bcm-ns-usb3.c+9−13
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 #include <linux/bcma/bcma.h>
1414 #include <linux/delay.h>
1515 #include <linux/err.h>
16+#include <linux/iopoll.h>
1617 #include <linux/mdio.h>
1718 #include <linux/module.h>
1819 #include <linux/of_address.h>
@@ -258,29 +259,24 @@ static struct mdio_driver bcm_ns_usb3_mdio_driver = { · 239 unmodified lines
258259 **************************************************/
259260
260261 static int bcm_ns_usb3_wait_reg(struct bcm_ns_usb3 *usb3, void __iomem *addr,
261− u32 mask, u32 value, unsigned long timeout)
262+ u32 mask, u32 value, int usec)
262263 {
263− unsigned long deadline = jiffies + timeout;
264264 u32 val;
265+ int ret;
265266
266− do {
267− val = readl(addr);
268− if ((val & mask) == value)
269− return 0;
270− cpu_relax();
271− udelay(10);
272− } while (!time_after_eq(jiffies, deadline));
267+ ret = readl_poll_timeout_atomic(addr, val, ((val & mask) == value),
268+ 10, usec);
269+ if (ret)
270+ dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
273271
274− dev_err(usb3->dev, "Timeout waiting for register %p\n", addr);
275−
276− return -EBUSY;
272+ return ret;
277273 }
278274
279275 static inline int bcm_ns_usb3_mii_mng_wait_idle(struct bcm_ns_usb3 *usb3)
280276 {
281277 return bcm_ns_usb3_wait_reg(usb3, usb3->ccb_mii + BCMA_CCB_MII_MNG_CTL,
282278 0x0100, 0x0000,
283− usecs_to_jiffies(BCM_NS_USB3_MII_MNG_TIMEOUT_US));
279+ BCM_NS_USB3_MII_MNG_TIMEOUT_US);
284280 }
285281
286282 static int bcm_ns_usb3_platform_phy_write(struct bcm_ns_usb3 *usb3, u16 reg,
drivers/phy/broadcom/phy-bcm-ns2-usbdrd.c+4−9
@@ -18,6 +18,7 @@ · 17 unmodified lines
1818 #include <linux/init.h>
1919 #include <linux/interrupt.h>
2020 #include <linux/io.h>
21+#include <linux/iopoll.h>
2122 #include <linux/irq.h>
2223 #include <linux/mfd/syscon.h>
2324 #include <linux/module.h>
@@ -87,17 +88,11 @@ static const unsigned int usb_extcon_cable[] = { · 63 unmodified lines
8788 static inline int pll_lock_stat(u32 usb_reg, int reg_mask,
8889 struct ns2_phy_driver *driver)
8990 {
90− int retry = PLL_LOCK_RETRY;
9191 u32 val;
9292
93− do {
94− udelay(1);
95− val = readl(driver->icfgdrd_regs + usb_reg);
96− if (val & reg_mask)
97− return 0;
98− } while (--retry > 0);
99−
100− return -EBUSY;
93+ return readl_poll_timeout_atomic(driver->icfgdrd_regs + usb_reg,
94+ val, (val & reg_mask), 1,
95+ PLL_LOCK_RETRY);
10196 }
10297
10398 static int ns2_drd_phy_init(struct phy *phy)
drivers/phy/broadcom/phy-bcm-sr-usb.c+8−11
@@ -5,6 +5,7 @@ · 4 unmodified lines
55
66 #include <linux/delay.h>
77 #include <linux/io.h>
8+#include <linux/iopoll.h>
89 #include <linux/module.h>
910 #include <linux/of.h>
1011 #include <linux/phy/phy.h>
@@ -109,19 +110,15 @@ static inline void bcm_usb_reg32_setbits(void __iomem *addr, uint32_t set) · 98 unmodified lines
109110
110111 static int bcm_usb_pll_lock_check(void __iomem *addr, u32 bit)
111112 {
112− int retry;
113− u32 rd_data;
113+ u32 data;
114+ int ret;
114115
115− retry = PLL_LOCK_RETRY_COUNT;
116− do {
117− rd_data = readl(addr);
118− if (rd_data & bit)
119− return 0;
120− udelay(1);
121− } while (--retry > 0);
116+ ret = readl_poll_timeout_atomic(addr, data, (data & bit), 1,
117+ PLL_LOCK_RETRY_COUNT);
118+ if (ret)
119+ pr_err("%s: FAIL\n", __func__);
122120
123− pr_err("%s: FAIL\n", __func__);
124− return -ETIMEDOUT;
121+ return ret;
125122 }
126123
127124 static int bcm_usb_ss_phy_init(struct bcm_usb_phy_cfg *phy_cfg)
drivers/phy/cadence/phy-cadence-salvo.c+4−4
@@ -97,7 +97,7 @@ struct cdns_reg_pairs { · 96 unmodified lines
9797
9898 struct cdns_salvo_data {
9999 u8 reg_offset_shift;
100− struct cdns_reg_pairs *init_sequence_val;
100+ const struct cdns_reg_pairs *init_sequence_val;
101101 u8 init_sequence_length;
102102 };
103103
@@ -126,7 +126,7 @@ static void cdns_salvo_write(struct cdns_salvo_phy *salvo_phy, · 22 unmodified lines
126126 * Below bringup sequence pair are from Cadence PHY's User Guide
127127 * and NXP platform tuning results.
128128 */
129−static struct cdns_reg_pairs cdns_nxp_sequence_pair[] = {
129+static const struct cdns_reg_pairs cdns_nxp_sequence_pair[] = {
130130 {0x0830, PHY_PMA_CMN_CTRL1},
131131 {0x0010, TB_ADDR_CMN_DIAG_HSCLK_SEL},
132132 {0x00f0, TB_ADDR_CMN_PLL0_VCOCAL_INIT_TMR},
@@ -217,7 +217,7 @@ static int cdns_salvo_phy_init(struct phy *phy) · 84 unmodified lines
217217 return ret;
218218
219219 for (i = 0; i < data->init_sequence_length; i++) {
220− struct cdns_reg_pairs *reg_pair = data->init_sequence_val + i;
220+ const struct cdns_reg_pairs *reg_pair = data->init_sequence_val + i;
221221
222222 cdns_salvo_write(salvo_phy, reg_pair->off, reg_pair->val);
223223 }
@@ -251,7 +251,7 @@ static int cdns_salvo_phy_power_off(struct phy *phy) · 27 unmodified lines
251251 return 0;
252252 }
253253
254−static struct phy_ops cdns_salvo_phy_ops = {
254+static const struct phy_ops cdns_salvo_phy_ops = {
255255 .init = cdns_salvo_phy_init,
256256 .power_on = cdns_salvo_phy_power_on,
257257 .power_off = cdns_salvo_phy_power_off,
drivers/phy/cadence/phy-cadence-sierra.c+12−12
@@ -172,10 +172,10 @@ struct cdns_sierra_data { · 171 unmodified lines
172172 u32 pcie_ln_regs;
173173 u32 usb_cmn_regs;
174174 u32 usb_ln_regs;
175− struct cdns_reg_pairs *pcie_cmn_vals;
176− struct cdns_reg_pairs *pcie_ln_vals;
177− struct cdns_reg_pairs *usb_cmn_vals;
178− struct cdns_reg_pairs *usb_ln_vals;
175+ const struct cdns_reg_pairs *pcie_cmn_vals;
176+ const struct cdns_reg_pairs *pcie_ln_vals;
177+ const struct cdns_reg_pairs *usb_cmn_vals;
178+ const struct cdns_reg_pairs *usb_ln_vals;
179179 };
180180
181181 struct cdns_regmap_cdb_context {
@@ -233,7 +233,7 @@ static int cdns_regmap_read(void *context, unsigned int reg, unsigned int *val) · 51 unmodified lines
233233 .reg_read = cdns_regmap_read, \
234234 }
235235
236−static struct regmap_config cdns_sierra_lane_cdb_config[] = {
236+static const struct regmap_config cdns_sierra_lane_cdb_config[] = {
237237 SIERRA_LANE_CDB_REGMAP_CONF("0"),
238238 SIERRA_LANE_CDB_REGMAP_CONF("1"),
239239 SIERRA_LANE_CDB_REGMAP_CONF("2"),
@@ -252,7 +252,7 @@ static struct regmap_config cdns_sierra_lane_cdb_config[] = { · 12 unmodified lines
252252 SIERRA_LANE_CDB_REGMAP_CONF("15"),
253253 };
254254
255−static struct regmap_config cdns_sierra_common_cdb_config = {
255+static const struct regmap_config cdns_sierra_common_cdb_config = {
256256 .name = "sierra_common_cdb",
257257 .reg_stride = 1,
258258 .fast_io = true,
@@ -260,7 +260,7 @@ static struct regmap_config cdns_sierra_common_cdb_config = { · 1 unmodified line
260260 .reg_read = cdns_regmap_read,
261261 };
262262
263−static struct regmap_config cdns_sierra_phy_config_ctrl_config = {
263+static const struct regmap_config cdns_sierra_phy_config_ctrl_config = {
264264 .name = "sierra_phy_config_ctrl",
265265 .reg_stride = 1,
266266 .fast_io = true,
@@ -274,7 +274,7 @@ static int cdns_sierra_phy_init(struct phy *gphy) · 7 unmodified lines
274274 struct cdns_sierra_phy *phy = dev_get_drvdata(gphy->dev.parent);
275275 struct regmap *regmap;
276276 int i, j;
277− struct cdns_reg_pairs *cmn_vals, *ln_vals;
277+ const struct cdns_reg_pairs *cmn_vals, *ln_vals;
278278 u32 num_cmn_regs, num_ln_regs;
279279
280280 /* Initialise the PHY registers, unless auto configured */
@@ -654,7 +654,7 @@ static int cdns_sierra_phy_remove(struct platform_device *pdev) · 373 unmodified lines
654654 }
655655
656656 /* refclk100MHz_32b_PCIe_cmn_pll_ext_ssc */
657−static struct cdns_reg_pairs cdns_pcie_cmn_regs_ext_ssc[] = {
657+static const struct cdns_reg_pairs cdns_pcie_cmn_regs_ext_ssc[] = {
658658 {0x2106, SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG},
659659 {0x2106, SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG},
660660 {0x8A06, SIERRA_CMN_PLLLC_BWCAL_MODE1_PREG},
@@ -663,7 +663,7 @@ static struct cdns_reg_pairs cdns_pcie_cmn_regs_ext_ssc[] = { · 2 unmodified lines
663663 };
664664
665665 /* refclk100MHz_32b_PCIe_ln_ext_ssc */
666−static struct cdns_reg_pairs cdns_pcie_ln_regs_ext_ssc[] = {
666+static const struct cdns_reg_pairs cdns_pcie_ln_regs_ext_ssc[] = {
667667 {0x813E, SIERRA_CLKPATHCTRL_TMR_PREG},
668668 {0x8047, SIERRA_RX_CREQ_FLTR_A_MODE3_PREG},
669669 {0x808F, SIERRA_RX_CREQ_FLTR_A_MODE2_PREG},
@@ -674,7 +674,7 @@ static struct cdns_reg_pairs cdns_pcie_ln_regs_ext_ssc[] = { · 4 unmodified lines
674674 };
675675
676676 /* refclk100MHz_20b_USB_cmn_pll_ext_ssc */
677−static struct cdns_reg_pairs cdns_usb_cmn_regs_ext_ssc[] = {
677+static const struct cdns_reg_pairs cdns_usb_cmn_regs_ext_ssc[] = {
678678 {0x2085, SIERRA_CMN_PLLLC_LF_COEFF_MODE1_PREG},
679679 {0x2085, SIERRA_CMN_PLLLC_LF_COEFF_MODE0_PREG},
680680 {0x0000, SIERRA_CMN_PLLLC_BWCAL_MODE0_PREG},
@@ -682,7 +682,7 @@ static struct cdns_reg_pairs cdns_usb_cmn_regs_ext_ssc[] = { · 1 unmodified line
682682 };
683683
684684 /* refclk100MHz_20b_USB_ln_ext_ssc */
685−static struct cdns_reg_pairs cdns_usb_ln_regs_ext_ssc[] = {
685+static const struct cdns_reg_pairs cdns_usb_ln_regs_ext_ssc[] = {
686686 {0xFE0A, SIERRA_DET_STANDEC_A_PREG},
687687 {0x000F, SIERRA_DET_STANDEC_B_PREG},
688688 {0x55A5, SIERRA_DET_STANDEC_C_PREG},
drivers/phy/cadence/phy-cadence-torrent.c+2018−101
@@ -25,11 +25,14 @@ · 24 unmodified lines
2525 #define REF_CLK_19_2MHz 19200000
2626 #define REF_CLK_25MHz 25000000
2727
28−#define DEFAULT_NUM_LANES 4
2928 #define MAX_NUM_LANES 4
3029 #define DEFAULT_MAX_BIT_RATE 8100 /* in Mbps */
3130
31+#define NUM_SSC_MODE 3
32+#define NUM_PHY_TYPE 6
33+
3234 #define POLL_TIMEOUT_US 5000
35+#define PLL_LOCK_TIMEOUT 100000
3336
3437 #define TORRENT_COMMON_CDB_OFFSET 0x0
3538
@@ -79,6 +82,8 @@ · 43 unmodified lines
7982 #define CMN_PLLSM0_PLLLOCK_TMR 0x002CU
8083 #define CMN_PLLSM1_PLLPRE_TMR 0x0032U
8184 #define CMN_PLLSM1_PLLLOCK_TMR 0x0034U
85+#define CMN_CDIAG_CDB_PWRI_OVRD 0x0041U
86+#define CMN_CDIAG_XCVRC_PWRI_OVRD 0x0047U
8287 #define CMN_BGCAL_INIT_TMR 0x0064U
8388 #define CMN_BGCAL_ITER_TMR 0x0065U
8489 #define CMN_IBCAL_INIT_TMR 0x0074U
@@ -99,6 +104,14 @@ · 14 unmodified lines
99104 #define CMN_PLL0_LOCK_REFCNT_START 0x009CU
100105 #define CMN_PLL0_LOCK_PLLCNT_START 0x009EU
101106 #define CMN_PLL0_LOCK_PLLCNT_THR 0x009FU
107+#define CMN_PLL0_INTDIV_M1 0x00A0U
108+#define CMN_PLL0_FRACDIVH_M1 0x00A2U
109+#define CMN_PLL0_HIGH_THR_M1 0x00A3U
110+#define CMN_PLL0_DSM_DIAG_M1 0x00A4U
111+#define CMN_PLL0_SS_CTRL1_M1 0x00A8U
112+#define CMN_PLL0_SS_CTRL2_M1 0x00A9U
113+#define CMN_PLL0_SS_CTRL3_M1 0x00AAU
114+#define CMN_PLL0_SS_CTRL4_M1 0x00ABU
102115 #define CMN_PLL1_VCOCAL_TCTRL 0x00C2U
103116 #define CMN_PLL1_VCOCAL_INIT_TMR 0x00C4U
104117 #define CMN_PLL1_VCOCAL_ITER_TMR 0x00C5U
@@ -116,8 +129,10 @@ · 11 unmodified lines
116129 #define CMN_PLL1_LOCK_REFCNT_START 0x00DCU
117130 #define CMN_PLL1_LOCK_PLLCNT_START 0x00DEU
118131 #define CMN_PLL1_LOCK_PLLCNT_THR 0x00DFU
132+#define CMN_TXPUCAL_TUNE 0x0103U
119133 #define CMN_TXPUCAL_INIT_TMR 0x0104U
120134 #define CMN_TXPUCAL_ITER_TMR 0x0105U
135+#define CMN_TXPDCAL_TUNE 0x010BU
121136 #define CMN_TXPDCAL_INIT_TMR 0x010CU
122137 #define CMN_TXPDCAL_ITER_TMR 0x010DU
123138 #define CMN_RXCAL_INIT_TMR 0x0114U
@@ -131,24 +146,31 @@ · 7 unmodified lines
131146 #define CMN_PDIAG_PLL0_CP_PADJ_M0 0x01A4U
132147 #define CMN_PDIAG_PLL0_CP_IADJ_M0 0x01A5U
133148 #define CMN_PDIAG_PLL0_FILT_PADJ_M0 0x01A6U
149+#define CMN_PDIAG_PLL0_CTRL_M1 0x01B0U
150+#define CMN_PDIAG_PLL0_CLK_SEL_M1 0x01B1U
134151 #define CMN_PDIAG_PLL0_CP_PADJ_M1 0x01B4U
135152 #define CMN_PDIAG_PLL0_CP_IADJ_M1 0x01B5U
153+#define CMN_PDIAG_PLL0_FILT_PADJ_M1 0x01B6U
136154 #define CMN_PDIAG_PLL1_CTRL_M0 0x01C0U
137155 #define CMN_PDIAG_PLL1_CLK_SEL_M0 0x01C1U
138156 #define CMN_PDIAG_PLL1_CP_PADJ_M0 0x01C4U
139157 #define CMN_PDIAG_PLL1_CP_IADJ_M0 0x01C5U
140158 #define CMN_PDIAG_PLL1_FILT_PADJ_M0 0x01C6U
159+#define CMN_DIAG_BIAS_OVRD1 0x01E1U
141160
142161 /* PMA TX Lane registers */
143162 #define TX_TXCC_CTRL 0x0040U
144163 #define TX_TXCC_CPOST_MULT_00 0x004CU
164+#define TX_TXCC_CPOST_MULT_01 0x004DU
145165 #define TX_TXCC_MGNFS_MULT_000 0x0050U
146166 #define DRV_DIAG_TX_DRV 0x00C6U
147167 #define XCVR_DIAG_PLLDRC_CTRL 0x00E5U
148168 #define XCVR_DIAG_HSCLK_SEL 0x00E6U
149169 #define XCVR_DIAG_HSCLK_DIV 0x00E7U
150170 #define XCVR_DIAG_BIDI_CTRL 0x00EAU
171+#define XCVR_DIAG_PSC_OVRD 0x00EBU
151172 #define TX_PSC_A0 0x0100U
173+#define TX_PSC_A1 0x0101U
152174 #define TX_PSC_A2 0x0102U
153175 #define TX_PSC_A3 0x0103U
154176 #define TX_RCVDET_ST_TMR 0x0123U
@@ -157,23 +179,49 @@ · 2 unmodified lines
157179
158180 /* PMA RX Lane registers */
159181 #define RX_PSC_A0 0x0000U
182+#define RX_PSC_A1 0x0001U
160183 #define RX_PSC_A2 0x0002U
161184 #define RX_PSC_A3 0x0003U
162185 #define RX_PSC_CAL 0x0006U
186+#define RX_CDRLF_CNFG 0x0080U
187+#define RX_CDRLF_CNFG3 0x0082U
188+#define RX_SIGDET_HL_FILT_TMR 0x0090U
163189 #define RX_REE_GCSM1_CTRL 0x0108U
190+#define RX_REE_GCSM1_EQENM_PH1 0x0109U
191+#define RX_REE_GCSM1_EQENM_PH2 0x010AU
164192 #define RX_REE_GCSM2_CTRL 0x0110U
165193 #define RX_REE_PERGCSM_CTRL 0x0118U
194+#define RX_REE_ATTEN_THR 0x0149U
195+#define RX_REE_TAP1_CLIP 0x0171U
196+#define RX_REE_TAP2TON_CLIP 0x0172U
197+#define RX_REE_SMGM_CTRL1 0x0177U
198+#define RX_REE_SMGM_CTRL2 0x0178U
199+#define RX_DIAG_DFE_CTRL 0x01E0U
200+#define RX_DIAG_DFE_AMP_TUNE_2 0x01E2U
201+#define RX_DIAG_DFE_AMP_TUNE_3 0x01E3U
202+#define RX_DIAG_NQST_CTRL 0x01E5U
203+#define RX_DIAG_SIGDET_TUNE 0x01E8U
204+#define RX_DIAG_PI_RATE 0x01F4U
205+#define RX_DIAG_PI_CAP 0x01F5U
206+#define RX_DIAG_ACYA 0x01FFU
166207
167208 /* PHY PCS common registers */
168209 #define PHY_PLL_CFG 0x000EU
210+#define PHY_PIPE_USB3_GEN2_PRE_CFG0 0x0020U
211+#define PHY_PIPE_USB3_GEN2_POST_CFG0 0x0022U
212+#define PHY_PIPE_USB3_GEN2_POST_CFG1 0x0023U
169213
170214 /* PHY PMA common registers */
215+#define PHY_PMA_CMN_CTRL1 0x0000U
171216 #define PHY_PMA_CMN_CTRL2 0x0001U
172217 #define PHY_PMA_PLL_RAW_CTRL 0x0003U
173218
174219 static const struct reg_field phy_pll_cfg =
175220 REG_FIELD(PHY_PLL_CFG, 0, 1);
176221
222+static const struct reg_field phy_pma_cmn_ctrl_1 =
223+ REG_FIELD(PHY_PMA_CMN_CTRL1, 0, 0);
224+
177225 static const struct reg_field phy_pma_cmn_ctrl_2 =
178226 REG_FIELD(PHY_PMA_CMN_CTRL2, 0, 7);
179227
@@ -183,14 +231,28 @@ static const struct reg_field phy_pma_pll_raw_ctrl = · 3 unmodified lines
183231 static const struct reg_field phy_reset_ctrl =
184232 REG_FIELD(PHY_RESET, 8, 8);
185233
186−static const struct of_device_id cdns_torrent_phy_of_match[];
234+enum cdns_torrent_phy_type {
235+ TYPE_NONE,
236+ TYPE_DP,
237+ TYPE_PCIE,
238+ TYPE_SGMII,
239+ TYPE_QSGMII,
240+ TYPE_USB,
241+};
242+
243+enum cdns_torrent_ssc_mode {
244+ NO_SSC,
245+ EXTERNAL_SSC,
246+ INTERNAL_SSC
247+};
187248
188249 struct cdns_torrent_inst {
189250 struct phy *phy;
190251 u32 mlane;
191− u32 phy_type;
252+ enum cdns_torrent_phy_type phy_type;
192253 u32 num_lanes;
193254 struct reset_control *lnk_rst;
255+ enum cdns_torrent_ssc_mode ssc_mode;
194256 };
195257
196258 struct cdns_torrent_phy {
@@ -198,11 +260,13 @@ struct cdns_torrent_phy { · 1 unmodified line
198260 void __iomem *sd_base; /* SD0801 registers base */
199261 u32 max_bit_rate; /* Maximum link bit rate to use (in Mbps) */
200262 struct reset_control *phy_rst;
263+ struct reset_control *apb_rst;
201264 struct device *dev;
202265 struct clk *clk;
203266 unsigned long ref_clk_rate;
204267 struct cdns_torrent_inst phys[MAX_NUM_LANES];
205268 int nsubnodes;
269+ const struct cdns_torrent_data *init_data;
206270 struct regmap *regmap;
207271 struct regmap *regmap_common_cdb;
208272 struct regmap *regmap_phy_pcs_common_cdb;
@@ -211,6 +275,7 @@ struct cdns_torrent_phy { · 2 unmodified lines
211275 struct regmap *regmap_rx_lane_cdb[MAX_NUM_LANES];
212276 struct regmap *regmap_dptx_phy_reg;
213277 struct regmap_field *phy_pll_cfg;
278+ struct regmap_field *phy_pma_cmn_ctrl_1;
214279 struct regmap_field *phy_pma_cmn_ctrl_2;
215280 struct regmap_field *phy_pma_pll_raw_ctrl;
216281 struct regmap_field *phy_reset_ctrl;
@@ -223,8 +288,8 @@ enum phy_powerstate { · 6 unmodified lines
223288 POWERSTATE_A3 = 3,
224289 };
225290
291+static int cdns_torrent_phy_init(struct phy *phy);
226292 static int cdns_torrent_dp_init(struct phy *phy);
227−static int cdns_torrent_dp_exit(struct phy *phy);
228293 static int cdns_torrent_dp_run(struct cdns_torrent_phy *cdns_phy,
229294 u32 num_lanes);
230295 static
@@ -254,17 +319,38 @@ static int cdns_torrent_phy_on(struct phy *phy); · 23 unmodified lines
254319 static int cdns_torrent_phy_off(struct phy *phy);
255320
256321 static const struct phy_ops cdns_torrent_phy_ops = {
257− .init = cdns_torrent_dp_init,
258− .exit = cdns_torrent_dp_exit,
322+ .init = cdns_torrent_phy_init,
259323 .configure = cdns_torrent_dp_configure,
260324 .power_on = cdns_torrent_phy_on,
261325 .power_off = cdns_torrent_phy_off,
262326 .owner = THIS_MODULE,
263327 };
264328
329+struct cdns_reg_pairs {
330+ u32 val;
331+ u32 off;
332+};
333+
334+struct cdns_torrent_vals {
335+ struct cdns_reg_pairs *reg_pairs;
336+ u32 num_regs;
337+};
338+
265339 struct cdns_torrent_data {
266− u8 block_offset_shift;
267− u8 reg_offset_shift;
340+ u8 block_offset_shift;
341+ u8 reg_offset_shift;
342+ struct cdns_torrent_vals *link_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
343+ [NUM_SSC_MODE];
344+ struct cdns_torrent_vals *xcvr_diag_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
345+ [NUM_SSC_MODE];
346+ struct cdns_torrent_vals *pcs_cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
347+ [NUM_SSC_MODE];
348+ struct cdns_torrent_vals *cmn_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
349+ [NUM_SSC_MODE];
350+ struct cdns_torrent_vals *tx_ln_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
351+ [NUM_SSC_MODE];
352+ struct cdns_torrent_vals *rx_ln_vals[NUM_PHY_TYPE][NUM_PHY_TYPE]
353+ [NUM_SSC_MODE];
268354 };
269355
270356 struct cdns_regmap_cdb_context {
@@ -331,21 +417,21 @@ static int cdns_regmap_dptx_read(void *context, unsigned int reg, · 60 unmodified lines
331417 .reg_read = cdns_regmap_read, \
332418 }
333419
334−static struct regmap_config cdns_torrent_tx_lane_cdb_config[] = {
420+static const struct regmap_config cdns_torrent_tx_lane_cdb_config[] = {
335421 TORRENT_TX_LANE_CDB_REGMAP_CONF("0"),
336422 TORRENT_TX_LANE_CDB_REGMAP_CONF("1"),
337423 TORRENT_TX_LANE_CDB_REGMAP_CONF("2"),
338424 TORRENT_TX_LANE_CDB_REGMAP_CONF("3"),
339425 };
340426
341−static struct regmap_config cdns_torrent_rx_lane_cdb_config[] = {
427+static const struct regmap_config cdns_torrent_rx_lane_cdb_config[] = {
342428 TORRENT_RX_LANE_CDB_REGMAP_CONF("0"),
343429 TORRENT_RX_LANE_CDB_REGMAP_CONF("1"),
344430 TORRENT_RX_LANE_CDB_REGMAP_CONF("2"),
345431 TORRENT_RX_LANE_CDB_REGMAP_CONF("3"),
346432 };
347433
348−static struct regmap_config cdns_torrent_common_cdb_config = {
434+static const struct regmap_config cdns_torrent_common_cdb_config = {
349435 .name = "torrent_common_cdb",
350436 .reg_stride = 1,
351437 .fast_io = true,
@@ -353,7 +439,7 @@ static struct regmap_config cdns_torrent_common_cdb_config = { · 1 unmodified line
353439 .reg_read = cdns_regmap_read,
354440 };
355441
356−static struct regmap_config cdns_torrent_phy_pcs_cmn_cdb_config = {
442+static const struct regmap_config cdns_torrent_phy_pcs_cmn_cdb_config = {
357443 .name = "torrent_phy_pcs_cmn_cdb",
358444 .reg_stride = 1,
359445 .fast_io = true,
@@ -361,7 +447,7 @@ static struct regmap_config cdns_torrent_phy_pcs_cmn_cdb_config = { · 1 unmodified line
361447 .reg_read = cdns_regmap_read,
362448 };
363449
364−static struct regmap_config cdns_torrent_phy_pma_cmn_cdb_config = {
450+static const struct regmap_config cdns_torrent_phy_pma_cmn_cdb_config = {
365451 .name = "torrent_phy_pma_cmn_cdb",
366452 .reg_stride = 1,
367453 .fast_io = true,
@@ -369,7 +455,7 @@ static struct regmap_config cdns_torrent_phy_pma_cmn_cdb_config = { · 1 unmodified line
369455 .reg_read = cdns_regmap_read,
370456 };
371457
372−static struct regmap_config cdns_torrent_dptx_phy_config = {
458+static const struct regmap_config cdns_torrent_dptx_phy_config = {
373459 .name = "torrent_dptx_phy",
374460 .reg_stride = 1,
375461 .fast_io = true,
@@ -848,19 +934,6 @@ static int cdns_torrent_dp_init(struct phy *phy) · 472 unmodified lines
848934 struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
849935 struct regmap *regmap = cdns_phy->regmap_dptx_phy_reg;
850936
851− ret = clk_prepare_enable(cdns_phy->clk);
852− if (ret) {
853− dev_err(cdns_phy->dev, "Failed to prepare ref clock\n");
854− return ret;
855− }
856−
857− cdns_phy->ref_clk_rate = clk_get_rate(cdns_phy->clk);
858− if (!(cdns_phy->ref_clk_rate)) {
859− dev_err(cdns_phy->dev, "Failed to get ref clock rate\n");
860− clk_disable_unprepare(cdns_phy->clk);
861− return -EINVAL;
862− }
863−
864937 switch (cdns_phy->ref_clk_rate) {
865938 case REF_CLK_19_2MHz:
866939 case REF_CLK_25MHz:
@@ -920,14 +993,6 @@ static int cdns_torrent_dp_init(struct phy *phy) · 53 unmodified lines
920993 return ret;
921994 }
922995
923−static int cdns_torrent_dp_exit(struct phy *phy)
924−{
925− struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
926−
927− clk_disable_unprepare(cdns_phy->clk);
928− return 0;
929−}
930−
931996 static
932997 int cdns_torrent_dp_wait_pma_cmn_ready(struct cdns_torrent_phy *cdns_phy)
933998 {
@@ -1543,15 +1608,34 @@ static int cdns_torrent_phy_on(struct phy *phy) · 609 unmodified lines
15431608 {
15441609 struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
15451610 struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
1611+ u32 read_val;
15461612 int ret;
15471613
1548− /* Take the PHY out of reset */
1549− ret = reset_control_deassert(cdns_phy->phy_rst);
1550− if (ret)
1614+ if (cdns_phy->nsubnodes == 1) {
1615+ /* Take the PHY lane group out of reset */
1616+ reset_control_deassert(inst->lnk_rst);
1617+
1618+ /* Take the PHY out of reset */
1619+ ret = reset_control_deassert(cdns_phy->phy_rst);
1620+ if (ret)
1621+ return ret;
1622+ }
1623+
1624+ /*
1625+ * Wait for cmn_ready assertion
1626+ * PHY_PMA_CMN_CTRL1[0] == 1
1627+ */
1628+ ret = regmap_field_read_poll_timeout(cdns_phy->phy_pma_cmn_ctrl_1,
1629+ read_val, read_val, 1000,
1630+ PLL_LOCK_TIMEOUT);
1631+ if (ret) {
1632+ dev_err(cdns_phy->dev, "Timeout waiting for CMN ready\n");
15511633 return ret;
1634+ }
1635+
1636+ mdelay(10);
15521637
1553− /* Take the PHY lane group out of reset */
1554− return reset_control_deassert(inst->lnk_rst);
1638+ return 0;
15551639 }
15561640
15571641 static int cdns_torrent_phy_off(struct phy *phy)
@@ -1560,6 +1644,9 @@ static int cdns_torrent_phy_off(struct phy *phy) · 2 unmodified lines
15601644 struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
15611645 int ret;
15621646
1647+ if (cdns_phy->nsubnodes != 1)
1648+ return 0;
1649+
15631650 ret = reset_control_assert(cdns_phy->phy_rst);
15641651 if (ret)
15651652 return ret;
@@ -1585,7 +1672,24 @@ static struct regmap *cdns_regmap_init(struct device *dev, void __iomem *base, · 19 unmodified lines
15851672 return devm_regmap_init(dev, NULL, ctx, config);
15861673 }
15871674
1588−static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy)
1675+static int cdns_torrent_dp_regfield_init(struct cdns_torrent_phy *cdns_phy)
1676+{
1677+ struct device *dev = cdns_phy->dev;
1678+ struct regmap_field *field;
1679+ struct regmap *regmap;
1680+
1681+ regmap = cdns_phy->regmap_dptx_phy_reg;
1682+ field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
1683+ if (IS_ERR(field)) {
1684+ dev_err(dev, "PHY_RESET reg field init failed\n");
1685+ return PTR_ERR(field);
1686+ }
1687+ cdns_phy->phy_reset_ctrl = field;
1688+
1689+ return 0;
1690+}
1691+
1692+static int cdns_torrent_regfield_init(struct cdns_torrent_phy *cdns_phy)
15891693 {
15901694 struct device *dev = cdns_phy->dev;
15911695 struct regmap_field *field;
@@ -1599,6 +1703,14 @@ static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy) · 7 unmodified lines
15991703 }
16001704 cdns_phy->phy_pll_cfg = field;
16011705
1706+ regmap = cdns_phy->regmap_phy_pma_common_cdb;
1707+ field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_1);
1708+ if (IS_ERR(field)) {
1709+ dev_err(dev, "PHY_PMA_CMN_CTRL1 reg field init failed\n");
1710+ return PTR_ERR(field);
1711+ }
1712+ cdns_phy->phy_pma_cmn_ctrl_1 = field;
1713+
16021714 regmap = cdns_phy->regmap_phy_pma_common_cdb;
16031715 field = devm_regmap_field_alloc(dev, regmap, phy_pma_cmn_ctrl_2);
16041716 if (IS_ERR(field)) {
@@ -1615,28 +1727,44 @@ static int cdns_regfield_init(struct cdns_torrent_phy *cdns_phy) · 10 unmodified lines
16151727 }
16161728 cdns_phy->phy_pma_pll_raw_ctrl = field;
16171729
1618− regmap = cdns_phy->regmap_dptx_phy_reg;
1619− field = devm_regmap_field_alloc(dev, regmap, phy_reset_ctrl);
1620− if (IS_ERR(field)) {
1621− dev_err(dev, "PHY_RESET reg field init failed\n");
1622− return PTR_ERR(field);
1730+ return 0;
1731+}
1732+
1733+static int cdns_torrent_dp_regmap_init(struct cdns_torrent_phy *cdns_phy)
1734+{
1735+ void __iomem *base = cdns_phy->base;
1736+ struct device *dev = cdns_phy->dev;
1737+ struct regmap *regmap;
1738+ u8 reg_offset_shift;
1739+ u32 block_offset;
1740+
1741+ reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
1742+
1743+ block_offset = TORRENT_DPTX_PHY_OFFSET;
1744+ regmap = cdns_regmap_init(dev, base, block_offset,
1745+ reg_offset_shift,
1746+ &cdns_torrent_dptx_phy_config);
1747+ if (IS_ERR(regmap)) {
1748+ dev_err(dev, "Failed to init DPTX PHY regmap\n");
1749+ return PTR_ERR(regmap);
16231750 }
1624− cdns_phy->phy_reset_ctrl = field;
1751+ cdns_phy->regmap_dptx_phy_reg = regmap;
16251752
16261753 return 0;
16271754 }
16281755
1629−static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy,
1630− void __iomem *sd_base,
1631− void __iomem *base,
1632− u8 block_offset_shift,
1633− u8 reg_offset_shift)
1756+static int cdns_torrent_regmap_init(struct cdns_torrent_phy *cdns_phy)
16341757 {
1758+ void __iomem *sd_base = cdns_phy->sd_base;
1759+ u8 block_offset_shift, reg_offset_shift;
16351760 struct device *dev = cdns_phy->dev;
16361761 struct regmap *regmap;
16371762 u32 block_offset;
16381763 int i;
16391764
1765+ block_offset_shift = cdns_phy->init_data->block_offset_shift;
1766+ reg_offset_shift = cdns_phy->init_data->reg_offset_shift;
1767+
16401768 for (i = 0; i < MAX_NUM_LANES; i++) {
16411769 block_offset = TORRENT_TX_LANE_CDB_OFFSET(i, block_offset_shift,
16421770 reg_offset_shift);
@@ -1691,43 +1819,282 @@ static int cdns_regmap_init_torrent_dp(struct cdns_torrent_phy *cdns_phy, · 48 unmodified lines
16911819 }
16921820 cdns_phy->regmap_phy_pma_common_cdb = regmap;
16931821
1694− block_offset = TORRENT_DPTX_PHY_OFFSET;
1695− regmap = cdns_regmap_init(dev, base, block_offset,
1696− reg_offset_shift,
1697− &cdns_torrent_dptx_phy_config);
1698− if (IS_ERR(regmap)) {
1699− dev_err(dev, "Failed to init DPTX PHY regmap\n");
1700− return PTR_ERR(regmap);
1822+ return 0;
1823+}
1824+
1825+static int cdns_torrent_phy_init(struct phy *phy)
1826+{
1827+ struct cdns_torrent_phy *cdns_phy = dev_get_drvdata(phy->dev.parent);
1828+ const struct cdns_torrent_data *init_data = cdns_phy->init_data;
1829+ struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
1830+ struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
1831+ struct cdns_torrent_inst *inst = phy_get_drvdata(phy);
1832+ enum cdns_torrent_phy_type phy_type = inst->phy_type;
1833+ enum cdns_torrent_ssc_mode ssc = inst->ssc_mode;
1834+ struct cdns_torrent_vals *pcs_cmn_vals;
1835+ struct cdns_reg_pairs *reg_pairs;
1836+ struct regmap *regmap;
1837+ u32 num_regs;
1838+ int i, j;
1839+
1840+ if (cdns_phy->nsubnodes > 1)
1841+ return 0;
1842+
1843+ if (phy_type == TYPE_DP)
1844+ return cdns_torrent_dp_init(phy);
1845+
1846+ /**
1847+ * Spread spectrum generation is not required or supported
1848+ * for SGMII/QSGMII
1849+ */
1850+ if (phy_type == TYPE_SGMII || phy_type == TYPE_QSGMII)
1851+ ssc = NO_SSC;
1852+
1853+ /* PHY configuration specific registers for single link */
1854+ link_cmn_vals = init_data->link_cmn_vals[phy_type][TYPE_NONE][ssc];
1855+ if (link_cmn_vals) {
1856+ reg_pairs = link_cmn_vals->reg_pairs;
1857+ num_regs = link_cmn_vals->num_regs;
1858+ regmap = cdns_phy->regmap_common_cdb;
1859+
1860+ /**
1861+ * First array value in link_cmn_vals must be of
1862+ * PHY_PLL_CFG register
1863+ */
1864+ regmap_field_write(cdns_phy->phy_pll_cfg, reg_pairs[0].val);
1865+
1866+ for (i = 1; i < num_regs; i++)
1867+ regmap_write(regmap, reg_pairs[i].off,
1868+ reg_pairs[i].val);
1869+ }
1870+
1871+ xcvr_diag_vals = init_data->xcvr_diag_vals[phy_type][TYPE_NONE][ssc];
1872+ if (xcvr_diag_vals) {
1873+ reg_pairs = xcvr_diag_vals->reg_pairs;
1874+ num_regs = xcvr_diag_vals->num_regs;
1875+ for (i = 0; i < inst->num_lanes; i++) {
1876+ regmap = cdns_phy->regmap_tx_lane_cdb[i + inst->mlane];
1877+ for (j = 0; j < num_regs; j++)
1878+ regmap_write(regmap, reg_pairs[j].off,
1879+ reg_pairs[j].val);
1880+ }
1881+ }
1882+
1883+ /* PHY PCS common registers configurations */
1884+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_type][TYPE_NONE][ssc];
1885+ if (pcs_cmn_vals) {
1886+ reg_pairs = pcs_cmn_vals->reg_pairs;
1887+ num_regs = pcs_cmn_vals->num_regs;
1888+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
1889+ for (i = 0; i < num_regs; i++)
1890+ regmap_write(regmap, reg_pairs[i].off,
1891+ reg_pairs[i].val);
1892+ }
1893+
1894+ /* PMA common registers configurations */
1895+ cmn_vals = init_data->cmn_vals[phy_type][TYPE_NONE][ssc];
1896+ if (cmn_vals) {
1897+ reg_pairs = cmn_vals->reg_pairs;
1898+ num_regs = cmn_vals->num_regs;
1899+ regmap = cdns_phy->regmap_common_cdb;
1900+ for (i = 0; i < num_regs; i++)
1901+ regmap_write(regmap, reg_pairs[i].off,
1902+ reg_pairs[i].val);
1903+ }
1904+
1905+ /* PMA TX lane registers configurations */
1906+ tx_ln_vals = init_data->tx_ln_vals[phy_type][TYPE_NONE][ssc];
1907+ if (tx_ln_vals) {
1908+ reg_pairs = tx_ln_vals->reg_pairs;
1909+ num_regs = tx_ln_vals->num_regs;
1910+ for (i = 0; i < inst->num_lanes; i++) {
1911+ regmap = cdns_phy->regmap_tx_lane_cdb[i + inst->mlane];
1912+ for (j = 0; j < num_regs; j++)
1913+ regmap_write(regmap, reg_pairs[j].off,
1914+ reg_pairs[j].val);
1915+ }
1916+ }
1917+
1918+ /* PMA RX lane registers configurations */
1919+ rx_ln_vals = init_data->rx_ln_vals[phy_type][TYPE_NONE][ssc];
1920+ if (rx_ln_vals) {
1921+ reg_pairs = rx_ln_vals->reg_pairs;
1922+ num_regs = rx_ln_vals->num_regs;
1923+ for (i = 0; i < inst->num_lanes; i++) {
1924+ regmap = cdns_phy->regmap_rx_lane_cdb[i + inst->mlane];
1925+ for (j = 0; j < num_regs; j++)
1926+ regmap_write(regmap, reg_pairs[j].off,
1927+ reg_pairs[j].val);
1928+ }
17011929 }
1702− cdns_phy->regmap_dptx_phy_reg = regmap;
1930+
1931+ return 0;
1932+}
1933+
1934+static
1935+int cdns_torrent_phy_configure_multilink(struct cdns_torrent_phy *cdns_phy)
1936+{
1937+ const struct cdns_torrent_data *init_data = cdns_phy->init_data;
1938+ struct cdns_torrent_vals *cmn_vals, *tx_ln_vals, *rx_ln_vals;
1939+ struct cdns_torrent_vals *link_cmn_vals, *xcvr_diag_vals;
1940+ enum cdns_torrent_phy_type phy_t1, phy_t2, tmp_phy_type;
1941+ struct cdns_torrent_vals *pcs_cmn_vals;
1942+ int i, j, node, mlane, num_lanes, ret;
1943+ struct cdns_reg_pairs *reg_pairs;
1944+ enum cdns_torrent_ssc_mode ssc;
1945+ struct regmap *regmap;
1946+ u32 num_regs;
1947+
1948+ /* Maximum 2 links (subnodes) are supported */
1949+ if (cdns_phy->nsubnodes != 2)
1950+ return -EINVAL;
1951+
1952+ phy_t1 = cdns_phy->phys[0].phy_type;
1953+ phy_t2 = cdns_phy->phys[1].phy_type;
1954+
1955+ /**
1956+ * First configure the PHY for first link with phy_t1. Get the array
1957+ * values as [phy_t1][phy_t2][ssc].
1958+ */
1959+ for (node = 0; node < cdns_phy->nsubnodes; node++) {
1960+ if (node == 1) {
1961+ /**
1962+ * If first link with phy_t1 is configured, then
1963+ * configure the PHY for second link with phy_t2.
1964+ * Get the array values as [phy_t2][phy_t1][ssc].
1965+ */
1966+ tmp_phy_type = phy_t1;
1967+ phy_t1 = phy_t2;
1968+ phy_t2 = tmp_phy_type;
1969+ }
1970+
1971+ mlane = cdns_phy->phys[node].mlane;
1972+ ssc = cdns_phy->phys[node].ssc_mode;
1973+ num_lanes = cdns_phy->phys[node].num_lanes;
1974+
1975+ /**
1976+ * PHY configuration specific registers:
1977+ * link_cmn_vals depend on combination of PHY types being
1978+ * configured and are common for both PHY types, so array
1979+ * values should be same for [phy_t1][phy_t2][ssc] and
1980+ * [phy_t2][phy_t1][ssc].
1981+ * xcvr_diag_vals also depend on combination of PHY types
1982+ * being configured, but these can be different for particular
1983+ * PHY type and are per lane.
1984+ */
1985+ link_cmn_vals = init_data->link_cmn_vals[phy_t1][phy_t2][ssc];
1986+ if (link_cmn_vals) {
1987+ reg_pairs = link_cmn_vals->reg_pairs;
1988+ num_regs = link_cmn_vals->num_regs;
1989+ regmap = cdns_phy->regmap_common_cdb;
1990+
1991+ /**
1992+ * First array value in link_cmn_vals must be of
1993+ * PHY_PLL_CFG register
1994+ */
1995+ regmap_field_write(cdns_phy->phy_pll_cfg,
1996+ reg_pairs[0].val);
1997+
1998+ for (i = 1; i < num_regs; i++)
1999+ regmap_write(regmap, reg_pairs[i].off,
2000+ reg_pairs[i].val);
2001+ }
2002+
2003+ xcvr_diag_vals = init_data->xcvr_diag_vals[phy_t1][phy_t2][ssc];
2004+ if (xcvr_diag_vals) {
2005+ reg_pairs = xcvr_diag_vals->reg_pairs;
2006+ num_regs = xcvr_diag_vals->num_regs;
2007+ for (i = 0; i < num_lanes; i++) {
2008+ regmap = cdns_phy->regmap_tx_lane_cdb[i + mlane];
2009+ for (j = 0; j < num_regs; j++)
2010+ regmap_write(regmap, reg_pairs[j].off,
2011+ reg_pairs[j].val);
2012+ }
2013+ }
2014+
2015+ /* PHY PCS common registers configurations */
2016+ pcs_cmn_vals = init_data->pcs_cmn_vals[phy_t1][phy_t2][ssc];
2017+ if (pcs_cmn_vals) {
2018+ reg_pairs = pcs_cmn_vals->reg_pairs;
2019+ num_regs = pcs_cmn_vals->num_regs;
2020+ regmap = cdns_phy->regmap_phy_pcs_common_cdb;
2021+ for (i = 0; i < num_regs; i++)
2022+ regmap_write(regmap, reg_pairs[i].off,
2023+ reg_pairs[i].val);
2024+ }
2025+
2026+ /* PMA common registers configurations */
2027+ cmn_vals = init_data->cmn_vals[phy_t1][phy_t2][ssc];
2028+ if (cmn_vals) {
2029+ reg_pairs = cmn_vals->reg_pairs;
2030+ num_regs = cmn_vals->num_regs;
2031+ regmap = cdns_phy->regmap_common_cdb;
2032+ for (i = 0; i < num_regs; i++)
2033+ regmap_write(regmap, reg_pairs[i].off,
2034+ reg_pairs[i].val);
2035+ }
2036+
2037+ /* PMA TX lane registers configurations */
2038+ tx_ln_vals = init_data->tx_ln_vals[phy_t1][phy_t2][ssc];
2039+ if (tx_ln_vals) {
2040+ reg_pairs = tx_ln_vals->reg_pairs;
2041+ num_regs = tx_ln_vals->num_regs;
2042+ for (i = 0; i < num_lanes; i++) {
2043+ regmap = cdns_phy->regmap_tx_lane_cdb[i + mlane];
2044+ for (j = 0; j < num_regs; j++)
2045+ regmap_write(regmap, reg_pairs[j].off,
2046+ reg_pairs[j].val);
2047+ }
2048+ }
2049+
2050+ /* PMA RX lane registers configurations */
2051+ rx_ln_vals = init_data->rx_ln_vals[phy_t1][phy_t2][ssc];
2052+ if (rx_ln_vals) {
2053+ reg_pairs = rx_ln_vals->reg_pairs;
2054+ num_regs = rx_ln_vals->num_regs;
2055+ for (i = 0; i < num_lanes; i++) {
2056+ regmap = cdns_phy->regmap_rx_lane_cdb[i + mlane];
2057+ for (j = 0; j < num_regs; j++)
2058+ regmap_write(regmap, reg_pairs[j].off,
2059+ reg_pairs[j].val);
2060+ }
2061+ }
2062+
2063+ reset_control_deassert(cdns_phy->phys[node].lnk_rst);
2064+ }
2065+
2066+ /* Take the PHY out of reset */
2067+ ret = reset_control_deassert(cdns_phy->phy_rst);
2068+ if (ret)
2069+ return ret;
17032070
17042071 return 0;
17052072 }
17062073
17072074 static int cdns_torrent_phy_probe(struct platform_device *pdev)
17082075 {
1709− struct resource *regs;
17102076 struct cdns_torrent_phy *cdns_phy;
17112077 struct device *dev = &pdev->dev;
17122078 struct phy_provider *phy_provider;
1713− const struct of_device_id *match;
1714− struct cdns_torrent_data *data;
2079+ const struct cdns_torrent_data *data;
17152080 struct device_node *child;
17162081 int ret, subnodes, node = 0, i;
2082+ u32 total_num_lanes = 0;
2083+ u8 init_dp_regmap = 0;
2084+ u32 phy_type;
17172085
17182086 /* Get init data for this PHY */
1719− match = of_match_device(cdns_torrent_phy_of_match, dev);
1720− if (!match)
2087+ data = of_device_get_match_data(dev);
2088+ if (!data)
17212089 return -EINVAL;
17222090
1723− data = (struct cdns_torrent_data *)match->data;
1724−
17252091 cdns_phy = devm_kzalloc(dev, sizeof(*cdns_phy), GFP_KERNEL);
17262092 if (!cdns_phy)
17272093 return -ENOMEM;
17282094
17292095 dev_set_drvdata(dev, cdns_phy);
17302096 cdns_phy->dev = dev;
2097+ cdns_phy->init_data = data;
17312098
17322099 cdns_phy->phy_rst = devm_reset_control_get_exclusive_by_index(dev, 0);
17332100 if (IS_ERR(cdns_phy->phy_rst)) {
@@ -1736,14 +2103,20 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) · 2 unmodified lines
17362103 return PTR_ERR(cdns_phy->phy_rst);
17372104 }
17382105
2106+ cdns_phy->apb_rst = devm_reset_control_get_optional(dev, "torrent_apb");
2107+ if (IS_ERR(cdns_phy->apb_rst)) {
2108+ dev_err(dev, "%s: failed to get apb reset\n",
2109+ dev->of_node->full_name);
2110+ return PTR_ERR(cdns_phy->apb_rst);
2111+ }
2112+
17392113 cdns_phy->clk = devm_clk_get(dev, "refclk");
17402114 if (IS_ERR(cdns_phy->clk)) {
17412115 dev_err(dev, "phy ref clock not found\n");
17422116 return PTR_ERR(cdns_phy->clk);
17432117 }
17442118
1745− regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1746− cdns_phy->sd_base = devm_ioremap_resource(&pdev->dev, regs);
2119+ cdns_phy->sd_base = devm_platform_ioremap_resource(pdev, 0);
17472120 if (IS_ERR(cdns_phy->sd_base))
17482121 return PTR_ERR(cdns_phy->sd_base);
17492122
@@ -1751,14 +2124,39 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) · 1 unmodified line
17512124 if (subnodes == 0) {
17522125 dev_err(dev, "No available link subnodes found\n");
17532126 return -EINVAL;
1754− } else if (subnodes != 1) {
1755− dev_err(dev, "Driver supports only one link subnode.\n");
2127+ }
2128+
2129+ ret = cdns_torrent_regmap_init(cdns_phy);
2130+ if (ret)
2131+ return ret;
2132+
2133+ ret = cdns_torrent_regfield_init(cdns_phy);
2134+ if (ret)
2135+ return ret;
2136+
2137+ ret = clk_prepare_enable(cdns_phy->clk);
2138+ if (ret) {
2139+ dev_err(cdns_phy->dev, "Failed to prepare ref clock\n");
2140+ return ret;
2141+ }
2142+
2143+ cdns_phy->ref_clk_rate = clk_get_rate(cdns_phy->clk);
2144+ if (!(cdns_phy->ref_clk_rate)) {
2145+ dev_err(cdns_phy->dev, "Failed to get ref clock rate\n");
2146+ clk_disable_unprepare(cdns_phy->clk);
17562147 return -EINVAL;
17572148 }
17582149
2150+ /* Enable APB */
2151+ reset_control_deassert(cdns_phy->apb_rst);
2152+
17592153 for_each_available_child_of_node(dev->of_node, child) {
17602154 struct phy *gphy;
17612155
2156+ /* PHY subnode name must be 'phy'. */
2157+ if (!(of_node_name_eq(child, "phy")))
2158+ continue;
2159+
17622160 cdns_phy->phys[node].lnk_rst =
17632161 of_reset_control_array_get_exclusive(child);
17642162 if (IS_ERR(cdns_phy->phys[node].lnk_rst)) {
@@ -1776,27 +2174,57 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) · 11 unmodified lines
17762174 goto put_child;
17772175 }
17782176
1779− if (cdns_phy->phys[node].mlane != 0) {
1780− dev_err(dev,
1781− "%s: Driver supports only lane-0 as master lane.\n",
2177+ if (of_property_read_u32(child, "cdns,phy-type", &phy_type)) {
2178+ dev_err(dev, "%s: No \"cdns,phy-type\"-property.\n",
17822179 child->full_name);
17832180 ret = -EINVAL;
17842181 goto put_child;
17852182 }
17862183
1787− if (of_property_read_u32(child, "cdns,phy-type",
1788− &cdns_phy->phys[node].phy_type)) {
1789− dev_err(dev, "%s: No \"cdns,phy-type\"-property.\n",
2184+ switch (phy_type) {
2185+ case PHY_TYPE_PCIE:
2186+ cdns_phy->phys[node].phy_type = TYPE_PCIE;
2187+ break;
2188+ case PHY_TYPE_DP:
2189+ cdns_phy->phys[node].phy_type = TYPE_DP;
2190+ break;
2191+ case PHY_TYPE_SGMII:
2192+ cdns_phy->phys[node].phy_type = TYPE_SGMII;
2193+ break;
2194+ case PHY_TYPE_QSGMII:
2195+ cdns_phy->phys[node].phy_type = TYPE_QSGMII;
2196+ break;
2197+ case PHY_TYPE_USB3:
2198+ cdns_phy->phys[node].phy_type = TYPE_USB;
2199+ break;
2200+ default:
2201+ dev_err(dev, "Unsupported protocol\n");
2202+ ret = -EINVAL;
2203+ goto put_child;
2204+ }
2205+
2206+ if (of_property_read_u32(child, "cdns,num-lanes",
2207+ &cdns_phy->phys[node].num_lanes)) {
2208+ dev_err(dev, "%s: No \"cdns,num-lanes\"-property.\n",
17902209 child->full_name);
17912210 ret = -EINVAL;
17922211 goto put_child;
17932212 }
17942213
1795− cdns_phy->phys[node].num_lanes = DEFAULT_NUM_LANES;
1796− of_property_read_u32(child, "cdns,num-lanes",
1797− &cdns_phy->phys[node].num_lanes);
2214+ total_num_lanes += cdns_phy->phys[node].num_lanes;
2215+
2216+ /* Get SSC mode */
2217+ cdns_phy->phys[node].ssc_mode = NO_SSC;
2218+ of_property_read_u32(child, "cdns,ssc-mode",
2219+ &cdns_phy->phys[node].ssc_mode);
2220+
2221+ gphy = devm_phy_create(dev, child, &cdns_torrent_phy_ops);
2222+ if (IS_ERR(gphy)) {
2223+ ret = PTR_ERR(gphy);
2224+ goto put_child;
2225+ }
17982226
1799− if (cdns_phy->phys[node].phy_type == PHY_TYPE_DP) {
2227+ if (cdns_phy->phys[node].phy_type == TYPE_DP) {
18002228 switch (cdns_phy->phys[node].num_lanes) {
18012229 case 1:
18022230 case 2:
@@ -1833,30 +2261,34 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) · 30 unmodified lines
18332261 }
18342262
18352263 /* DPTX registers */
1836− regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1837− cdns_phy->base = devm_ioremap_resource(&pdev->dev,
1838− regs);
2264+ cdns_phy->base = devm_platform_ioremap_resource(pdev, 1);
18392265 if (IS_ERR(cdns_phy->base)) {
18402266 ret = PTR_ERR(cdns_phy->base);
18412267 goto put_child;
18422268 }
18432269
1844− gphy = devm_phy_create(dev, child,
1845− &cdns_torrent_phy_ops);
1846− if (IS_ERR(gphy)) {
1847− ret = PTR_ERR(gphy);
1848− goto put_child;
2270+ if (!init_dp_regmap) {
2271+ ret = cdns_torrent_dp_regmap_init(cdns_phy);
2272+ if (ret)
2273+ goto put_child;
2274+
2275+ ret = cdns_torrent_dp_regfield_init(cdns_phy);
2276+ if (ret)
2277+ goto put_child;
2278+
2279+ init_dp_regmap++;
18492280 }
18502281
18512282 dev_info(dev, "%d lanes, max bit rate %d.%03d Gbps\n",
18522283 cdns_phy->phys[node].num_lanes,
18532284 cdns_phy->max_bit_rate / 1000,
18542285 cdns_phy->max_bit_rate % 1000);
1855− } else {
1856− dev_err(dev, "Driver supports only PHY_TYPE_DP\n");
1857− ret = -ENOTSUPP;
1858− goto put_child;
2286+
2287+ gphy->attrs.bus_width = cdns_phy->phys[node].num_lanes;
2288+ gphy->attrs.max_link_rate = cdns_phy->max_bit_rate;
2289+ gphy->attrs.mode = PHY_MODE_DP;
18592290 }
2291+
18602292 cdns_phy->phys[node].phy = gphy;
18612293 phy_set_drvdata(gphy, &cdns_phy->phys[node]);
18622294
@@ -1864,16 +2296,16 @@ static int cdns_torrent_phy_probe(struct platform_device *pdev) · 1 unmodified line
18642296 }
18652297 cdns_phy->nsubnodes = node;
18662298
1867− ret = cdns_regmap_init_torrent_dp(cdns_phy, cdns_phy->sd_base,
1868− cdns_phy->base,
1869− data->block_offset_shift,
1870− data->reg_offset_shift);
1871− if (ret)
2299+ if (total_num_lanes > MAX_NUM_LANES) {
2300+ dev_err(dev, "Invalid lane configuration\n");
18722301 goto put_lnk_rst;
2302+ }
18732303
1874− ret = cdns_regfield_init(cdns_phy);
1875− if (ret)
1876− goto put_lnk_rst;
2304+ if (cdns_phy->nsubnodes > 1) {
2305+ ret = cdns_torrent_phy_configure_multilink(cdns_phy);
2306+ if (ret)
2307+ goto put_lnk_rst;
2308+ }
18772309
18782310 phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
18792311 if (IS_ERR(phy_provider)) {
@@ -1889,6 +2321,8 @@ put_lnk_rst: · 9 unmodified lines
18892321 for (i = 0; i < node; i++)
18902322 reset_control_put(cdns_phy->phys[i].lnk_rst);
18912323 of_node_put(child);
2324+ reset_control_assert(cdns_phy->apb_rst);
2325+ clk_disable_unprepare(cdns_phy->clk);
18922326 return ret;
18932327 }
18942328
@@ -1898,22 +2332,1505 @@ static int cdns_torrent_phy_remove(struct platform_device *pdev) · 3 unmodified lines
18982332 int i;
18992333
19002334 reset_control_assert(cdns_phy->phy_rst);
2335+ reset_control_assert(cdns_phy->apb_rst);
19012336 for (i = 0; i < cdns_phy->nsubnodes; i++) {
19022337 reset_control_assert(cdns_phy->phys[i].lnk_rst);
19032338 reset_control_put(cdns_phy->phys[i].lnk_rst);
19042339 }
19052340
2341+ clk_disable_unprepare(cdns_phy->clk);
2342+
19062343 return 0;
19072344 }
19082345
2346+/* USB and SGMII/QSGMII link configuration */
2347+static struct cdns_reg_pairs usb_sgmii_link_cmn_regs[] = {
2348+ {0x0002, PHY_PLL_CFG},
2349+ {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0},
2350+ {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
2351+};
2352+
2353+static struct cdns_reg_pairs usb_sgmii_xcvr_diag_ln_regs[] = {
2354+ {0x0000, XCVR_DIAG_HSCLK_SEL},
2355+ {0x0001, XCVR_DIAG_HSCLK_DIV},
2356+ {0x0041, XCVR_DIAG_PLLDRC_CTRL}
2357+};
2358+
2359+static struct cdns_reg_pairs sgmii_usb_xcvr_diag_ln_regs[] = {
2360+ {0x0011, XCVR_DIAG_HSCLK_SEL},
2361+ {0x0003, XCVR_DIAG_HSCLK_DIV},
2362+ {0x009B, XCVR_DIAG_PLLDRC_CTRL}
2363+};
2364+
2365+static struct cdns_torrent_vals usb_sgmii_link_cmn_vals = {
2366+ .reg_pairs = usb_sgmii_link_cmn_regs,
2367+ .num_regs = ARRAY_SIZE(usb_sgmii_link_cmn_regs),
2368+};
2369+
2370+static struct cdns_torrent_vals usb_sgmii_xcvr_diag_ln_vals = {
2371+ .reg_pairs = usb_sgmii_xcvr_diag_ln_regs,
2372+ .num_regs = ARRAY_SIZE(usb_sgmii_xcvr_diag_ln_regs),
2373+};
2374+
2375+static struct cdns_torrent_vals sgmii_usb_xcvr_diag_ln_vals = {
2376+ .reg_pairs = sgmii_usb_xcvr_diag_ln_regs,
2377+ .num_regs = ARRAY_SIZE(sgmii_usb_xcvr_diag_ln_regs),
2378+};
2379+
2380+/* PCIe and USB Unique SSC link configuration */
2381+static struct cdns_reg_pairs pcie_usb_link_cmn_regs[] = {
2382+ {0x0003, PHY_PLL_CFG},
2383+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
2384+ {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
2385+ {0x8600, CMN_PDIAG_PLL1_CLK_SEL_M0}
2386+};
2387+
2388+static struct cdns_reg_pairs pcie_usb_xcvr_diag_ln_regs[] = {
2389+ {0x0000, XCVR_DIAG_HSCLK_SEL},
2390+ {0x0001, XCVR_DIAG_HSCLK_DIV},
2391+ {0x0012, XCVR_DIAG_PLLDRC_CTRL}
2392+};
2393+
2394+static struct cdns_reg_pairs usb_pcie_xcvr_diag_ln_regs[] = {
2395+ {0x0011, XCVR_DIAG_HSCLK_SEL},
2396+ {0x0001, XCVR_DIAG_HSCLK_DIV},
2397+ {0x00C9, XCVR_DIAG_PLLDRC_CTRL}
2398+};
2399+
2400+static struct cdns_torrent_vals pcie_usb_link_cmn_vals = {
2401+ .reg_pairs = pcie_usb_link_cmn_regs,
2402+ .num_regs = ARRAY_SIZE(pcie_usb_link_cmn_regs),
2403+};
2404+
2405+static struct cdns_torrent_vals pcie_usb_xcvr_diag_ln_vals = {
2406+ .reg_pairs = pcie_usb_xcvr_diag_ln_regs,
2407+ .num_regs = ARRAY_SIZE(pcie_usb_xcvr_diag_ln_regs),
2408+};
2409+
2410+static struct cdns_torrent_vals usb_pcie_xcvr_diag_ln_vals = {
2411+ .reg_pairs = usb_pcie_xcvr_diag_ln_regs,
2412+ .num_regs = ARRAY_SIZE(usb_pcie_xcvr_diag_ln_regs),
2413+};
2414+
2415+/* USB 100 MHz Ref clk, internal SSC */
2416+static struct cdns_reg_pairs usb_100_int_ssc_cmn_regs[] = {
2417+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2418+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
2419+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2420+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2421+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
2422+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2423+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2424+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
2425+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2426+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2427+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
2428+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2429+ {0x0064, CMN_PLL0_INTDIV_M0},
2430+ {0x0050, CMN_PLL0_INTDIV_M1},
2431+ {0x0064, CMN_PLL1_INTDIV_M0},
2432+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2433+ {0x0002, CMN_PLL0_FRACDIVH_M1},
2434+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2435+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2436+ {0x0036, CMN_PLL0_HIGH_THR_M1},
2437+ {0x0044, CMN_PLL1_HIGH_THR_M0},
2438+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2439+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
2440+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2441+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2442+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
2443+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2444+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2445+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
2446+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2447+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2448+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
2449+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
2450+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2451+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
2452+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
2453+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2454+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2455+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2456+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2457+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2458+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2459+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2460+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2461+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2462+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2463+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2464+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
2465+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
2466+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
2467+};
2468+
2469+static struct cdns_torrent_vals usb_100_int_ssc_cmn_vals = {
2470+ .reg_pairs = usb_100_int_ssc_cmn_regs,
2471+ .num_regs = ARRAY_SIZE(usb_100_int_ssc_cmn_regs),
2472+};
2473+
2474+/* Single USB link configuration */
2475+static struct cdns_reg_pairs sl_usb_link_cmn_regs[] = {
2476+ {0x0000, PHY_PLL_CFG},
2477+ {0x8600, CMN_PDIAG_PLL0_CLK_SEL_M0}
2478+};
2479+
2480+static struct cdns_reg_pairs sl_usb_xcvr_diag_ln_regs[] = {
2481+ {0x0000, XCVR_DIAG_HSCLK_SEL},
2482+ {0x0001, XCVR_DIAG_HSCLK_DIV},
2483+ {0x0041, XCVR_DIAG_PLLDRC_CTRL}
2484+};
2485+
2486+static struct cdns_torrent_vals sl_usb_link_cmn_vals = {
2487+ .reg_pairs = sl_usb_link_cmn_regs,
2488+ .num_regs = ARRAY_SIZE(sl_usb_link_cmn_regs),
2489+};
2490+
2491+static struct cdns_torrent_vals sl_usb_xcvr_diag_ln_vals = {
2492+ .reg_pairs = sl_usb_xcvr_diag_ln_regs,
2493+ .num_regs = ARRAY_SIZE(sl_usb_xcvr_diag_ln_regs),
2494+};
2495+
2496+/* USB PHY PCS common configuration */
2497+static struct cdns_reg_pairs usb_phy_pcs_cmn_regs[] = {
2498+ {0x0A0A, PHY_PIPE_USB3_GEN2_PRE_CFG0},
2499+ {0x1000, PHY_PIPE_USB3_GEN2_POST_CFG0},
2500+ {0x0010, PHY_PIPE_USB3_GEN2_POST_CFG1}
2501+};
2502+
2503+static struct cdns_torrent_vals usb_phy_pcs_cmn_vals = {
2504+ .reg_pairs = usb_phy_pcs_cmn_regs,
2505+ .num_regs = ARRAY_SIZE(usb_phy_pcs_cmn_regs),
2506+};
2507+
2508+/* USB 100 MHz Ref clk, no SSC */
2509+static struct cdns_reg_pairs usb_100_no_ssc_cmn_regs[] = {
2510+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2511+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2512+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
2513+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
2514+};
2515+
2516+static struct cdns_reg_pairs usb_100_no_ssc_tx_ln_regs[] = {
2517+ {0x02FF, TX_PSC_A0},
2518+ {0x06AF, TX_PSC_A1},
2519+ {0x06AE, TX_PSC_A2},
2520+ {0x06AE, TX_PSC_A3},
2521+ {0x2A82, TX_TXCC_CTRL},
2522+ {0x0014, TX_TXCC_CPOST_MULT_01},
2523+ {0x0003, XCVR_DIAG_PSC_OVRD}
2524+};
2525+
2526+static struct cdns_reg_pairs usb_100_no_ssc_rx_ln_regs[] = {
2527+ {0x0D1D, RX_PSC_A0},
2528+ {0x0D1D, RX_PSC_A1},
2529+ {0x0D00, RX_PSC_A2},
2530+ {0x0500, RX_PSC_A3},
2531+ {0x0013, RX_SIGDET_HL_FILT_TMR},
2532+ {0x0000, RX_REE_GCSM1_CTRL},
2533+ {0x0C02, RX_REE_ATTEN_THR},
2534+ {0x0330, RX_REE_SMGM_CTRL1},
2535+ {0x0300, RX_REE_SMGM_CTRL2},
2536+ {0x0019, RX_REE_TAP1_CLIP},
2537+ {0x0019, RX_REE_TAP2TON_CLIP},
2538+ {0x1004, RX_DIAG_SIGDET_TUNE},
2539+ {0x00F9, RX_DIAG_NQST_CTRL},
2540+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
2541+ {0x0002, RX_DIAG_DFE_AMP_TUNE_3},
2542+ {0x0000, RX_DIAG_PI_CAP},
2543+ {0x0031, RX_DIAG_PI_RATE},
2544+ {0x0001, RX_DIAG_ACYA},
2545+ {0x018C, RX_CDRLF_CNFG},
2546+ {0x0003, RX_CDRLF_CNFG3}
2547+};
2548+
2549+static struct cdns_torrent_vals usb_100_no_ssc_cmn_vals = {
2550+ .reg_pairs = usb_100_no_ssc_cmn_regs,
2551+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_cmn_regs),
2552+};
2553+
2554+static struct cdns_torrent_vals usb_100_no_ssc_tx_ln_vals = {
2555+ .reg_pairs = usb_100_no_ssc_tx_ln_regs,
2556+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_tx_ln_regs),
2557+};
2558+
2559+static struct cdns_torrent_vals usb_100_no_ssc_rx_ln_vals = {
2560+ .reg_pairs = usb_100_no_ssc_rx_ln_regs,
2561+ .num_regs = ARRAY_SIZE(usb_100_no_ssc_rx_ln_regs),
2562+};
2563+
2564+/* Single link USB, 100 MHz Ref clk, internal SSC */
2565+static struct cdns_reg_pairs sl_usb_100_int_ssc_cmn_regs[] = {
2566+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2567+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2568+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2569+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2570+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2571+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2572+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2573+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2574+ {0x0064, CMN_PLL0_INTDIV_M0},
2575+ {0x0064, CMN_PLL1_INTDIV_M0},
2576+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2577+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2578+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2579+ {0x0044, CMN_PLL1_HIGH_THR_M0},
2580+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2581+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2582+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2583+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2584+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2585+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2586+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2587+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
2588+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2589+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
2590+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2591+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2592+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2593+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2594+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2595+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2596+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2597+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2598+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2599+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2600+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2601+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
2602+ {0x8200, CMN_CDIAG_CDB_PWRI_OVRD},
2603+ {0x8200, CMN_CDIAG_XCVRC_PWRI_OVRD}
2604+};
2605+
2606+static struct cdns_torrent_vals sl_usb_100_int_ssc_cmn_vals = {
2607+ .reg_pairs = sl_usb_100_int_ssc_cmn_regs,
2608+ .num_regs = ARRAY_SIZE(sl_usb_100_int_ssc_cmn_regs),
2609+};
2610+
2611+/* PCIe and SGMII/QSGMII Unique SSC link configuration */
2612+static struct cdns_reg_pairs pcie_sgmii_link_cmn_regs[] = {
2613+ {0x0003, PHY_PLL_CFG},
2614+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0},
2615+ {0x0400, CMN_PDIAG_PLL0_CLK_SEL_M1},
2616+ {0x0601, CMN_PDIAG_PLL1_CLK_SEL_M0}
2617+};
2618+
2619+static struct cdns_reg_pairs pcie_sgmii_xcvr_diag_ln_regs[] = {
2620+ {0x0000, XCVR_DIAG_HSCLK_SEL},
2621+ {0x0001, XCVR_DIAG_HSCLK_DIV},
2622+ {0x0012, XCVR_DIAG_PLLDRC_CTRL}
2623+};
2624+
2625+static struct cdns_reg_pairs sgmii_pcie_xcvr_diag_ln_regs[] = {
2626+ {0x0011, XCVR_DIAG_HSCLK_SEL},
2627+ {0x0003, XCVR_DIAG_HSCLK_DIV},
2628+ {0x009B, XCVR_DIAG_PLLDRC_CTRL}
2629+};
2630+
2631+static struct cdns_torrent_vals pcie_sgmii_link_cmn_vals = {
2632+ .reg_pairs = pcie_sgmii_link_cmn_regs,
2633+ .num_regs = ARRAY_SIZE(pcie_sgmii_link_cmn_regs),
2634+};
2635+
2636+static struct cdns_torrent_vals pcie_sgmii_xcvr_diag_ln_vals = {
2637+ .reg_pairs = pcie_sgmii_xcvr_diag_ln_regs,
2638+ .num_regs = ARRAY_SIZE(pcie_sgmii_xcvr_diag_ln_regs),
2639+};
2640+
2641+static struct cdns_torrent_vals sgmii_pcie_xcvr_diag_ln_vals = {
2642+ .reg_pairs = sgmii_pcie_xcvr_diag_ln_regs,
2643+ .num_regs = ARRAY_SIZE(sgmii_pcie_xcvr_diag_ln_regs),
2644+};
2645+
2646+/* SGMII 100 MHz Ref clk, no SSC */
2647+static struct cdns_reg_pairs sgmii_100_no_ssc_cmn_regs[] = {
2648+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2649+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2650+ {0x3700, CMN_DIAG_BIAS_OVRD1},
2651+ {0x0008, CMN_TXPUCAL_TUNE},
2652+ {0x0008, CMN_TXPDCAL_TUNE}
2653+};
2654+
2655+static struct cdns_reg_pairs sgmii_100_no_ssc_tx_ln_regs[] = {
2656+ {0x00F3, TX_PSC_A0},
2657+ {0x04A2, TX_PSC_A2},
2658+ {0x04A2, TX_PSC_A3},
2659+ {0x0000, TX_TXCC_CPOST_MULT_00},
2660+ {0x00B3, DRV_DIAG_TX_DRV}
2661+};
2662+
2663+static struct cdns_reg_pairs sgmii_100_no_ssc_rx_ln_regs[] = {
2664+ {0x091D, RX_PSC_A0},
2665+ {0x0900, RX_PSC_A2},
2666+ {0x0100, RX_PSC_A3},
2667+ {0x03C7, RX_REE_GCSM1_EQENM_PH1},
2668+ {0x01C7, RX_REE_GCSM1_EQENM_PH2},
2669+ {0x0000, RX_DIAG_DFE_CTRL},
2670+ {0x0019, RX_REE_TAP1_CLIP},
2671+ {0x0019, RX_REE_TAP2TON_CLIP},
2672+ {0x0098, RX_DIAG_NQST_CTRL},
2673+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
2674+ {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
2675+ {0x0000, RX_DIAG_PI_CAP},
2676+ {0x0010, RX_DIAG_PI_RATE},
2677+ {0x0001, RX_DIAG_ACYA},
2678+ {0x018C, RX_CDRLF_CNFG},
2679+};
2680+
2681+static struct cdns_torrent_vals sgmii_100_no_ssc_cmn_vals = {
2682+ .reg_pairs = sgmii_100_no_ssc_cmn_regs,
2683+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_cmn_regs),
2684+};
2685+
2686+static struct cdns_torrent_vals sgmii_100_no_ssc_tx_ln_vals = {
2687+ .reg_pairs = sgmii_100_no_ssc_tx_ln_regs,
2688+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_tx_ln_regs),
2689+};
2690+
2691+static struct cdns_torrent_vals sgmii_100_no_ssc_rx_ln_vals = {
2692+ .reg_pairs = sgmii_100_no_ssc_rx_ln_regs,
2693+ .num_regs = ARRAY_SIZE(sgmii_100_no_ssc_rx_ln_regs),
2694+};
2695+
2696+/* SGMII 100 MHz Ref clk, internal SSC */
2697+static struct cdns_reg_pairs sgmii_100_int_ssc_cmn_regs[] = {
2698+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2699+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
2700+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2701+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2702+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
2703+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2704+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2705+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
2706+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2707+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2708+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
2709+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2710+ {0x0064, CMN_PLL0_INTDIV_M0},
2711+ {0x0050, CMN_PLL0_INTDIV_M1},
2712+ {0x0064, CMN_PLL1_INTDIV_M0},
2713+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2714+ {0x0002, CMN_PLL0_FRACDIVH_M1},
2715+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2716+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2717+ {0x0036, CMN_PLL0_HIGH_THR_M1},
2718+ {0x0044, CMN_PLL1_HIGH_THR_M0},
2719+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2720+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
2721+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2722+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2723+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
2724+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2725+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2726+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
2727+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2728+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2729+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
2730+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
2731+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2732+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
2733+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
2734+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2735+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2736+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2737+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2738+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2739+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2740+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2741+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2742+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2743+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2744+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2745+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR},
2746+ {0x3700, CMN_DIAG_BIAS_OVRD1},
2747+ {0x0008, CMN_TXPUCAL_TUNE},
2748+ {0x0008, CMN_TXPDCAL_TUNE}
2749+};
2750+
2751+static struct cdns_torrent_vals sgmii_100_int_ssc_cmn_vals = {
2752+ .reg_pairs = sgmii_100_int_ssc_cmn_regs,
2753+ .num_regs = ARRAY_SIZE(sgmii_100_int_ssc_cmn_regs),
2754+};
2755+
2756+/* QSGMII 100 MHz Ref clk, no SSC */
2757+static struct cdns_reg_pairs qsgmii_100_no_ssc_cmn_regs[] = {
2758+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2759+ {0x0003, CMN_PLL1_VCOCAL_TCTRL}
2760+};
2761+
2762+static struct cdns_reg_pairs qsgmii_100_no_ssc_tx_ln_regs[] = {
2763+ {0x00F3, TX_PSC_A0},
2764+ {0x04A2, TX_PSC_A2},
2765+ {0x04A2, TX_PSC_A3},
2766+ {0x0000, TX_TXCC_CPOST_MULT_00},
2767+ {0x0003, DRV_DIAG_TX_DRV}
2768+};
2769+
2770+static struct cdns_reg_pairs qsgmii_100_no_ssc_rx_ln_regs[] = {
2771+ {0x091D, RX_PSC_A0},
2772+ {0x0900, RX_PSC_A2},
2773+ {0x0100, RX_PSC_A3},
2774+ {0x03C7, RX_REE_GCSM1_EQENM_PH1},
2775+ {0x01C7, RX_REE_GCSM1_EQENM_PH2},
2776+ {0x0000, RX_DIAG_DFE_CTRL},
2777+ {0x0019, RX_REE_TAP1_CLIP},
2778+ {0x0019, RX_REE_TAP2TON_CLIP},
2779+ {0x0098, RX_DIAG_NQST_CTRL},
2780+ {0x0C01, RX_DIAG_DFE_AMP_TUNE_2},
2781+ {0x0000, RX_DIAG_DFE_AMP_TUNE_3},
2782+ {0x0000, RX_DIAG_PI_CAP},
2783+ {0x0010, RX_DIAG_PI_RATE},
2784+ {0x0001, RX_DIAG_ACYA},
2785+ {0x018C, RX_CDRLF_CNFG},
2786+};
2787+
2788+static struct cdns_torrent_vals qsgmii_100_no_ssc_cmn_vals = {
2789+ .reg_pairs = qsgmii_100_no_ssc_cmn_regs,
2790+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_cmn_regs),
2791+};
2792+
2793+static struct cdns_torrent_vals qsgmii_100_no_ssc_tx_ln_vals = {
2794+ .reg_pairs = qsgmii_100_no_ssc_tx_ln_regs,
2795+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_tx_ln_regs),
2796+};
2797+
2798+static struct cdns_torrent_vals qsgmii_100_no_ssc_rx_ln_vals = {
2799+ .reg_pairs = qsgmii_100_no_ssc_rx_ln_regs,
2800+ .num_regs = ARRAY_SIZE(qsgmii_100_no_ssc_rx_ln_regs),
2801+};
2802+
2803+/* QSGMII 100 MHz Ref clk, internal SSC */
2804+static struct cdns_reg_pairs qsgmii_100_int_ssc_cmn_regs[] = {
2805+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2806+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
2807+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2808+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2809+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
2810+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2811+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2812+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
2813+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2814+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2815+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
2816+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2817+ {0x0064, CMN_PLL0_INTDIV_M0},
2818+ {0x0050, CMN_PLL0_INTDIV_M1},
2819+ {0x0064, CMN_PLL1_INTDIV_M0},
2820+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2821+ {0x0002, CMN_PLL0_FRACDIVH_M1},
2822+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2823+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2824+ {0x0036, CMN_PLL0_HIGH_THR_M1},
2825+ {0x0044, CMN_PLL1_HIGH_THR_M0},
2826+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2827+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
2828+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2829+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2830+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
2831+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2832+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2833+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
2834+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2835+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2836+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
2837+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
2838+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2839+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
2840+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
2841+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2842+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2843+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2844+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2845+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2846+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2847+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2848+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2849+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2850+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2851+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2852+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
2853+};
2854+
2855+static struct cdns_torrent_vals qsgmii_100_int_ssc_cmn_vals = {
2856+ .reg_pairs = qsgmii_100_int_ssc_cmn_regs,
2857+ .num_regs = ARRAY_SIZE(qsgmii_100_int_ssc_cmn_regs),
2858+};
2859+
2860+/* Single SGMII/QSGMII link configuration */
2861+static struct cdns_reg_pairs sl_sgmii_link_cmn_regs[] = {
2862+ {0x0000, PHY_PLL_CFG},
2863+ {0x0601, CMN_PDIAG_PLL0_CLK_SEL_M0}
2864+};
2865+
2866+static struct cdns_reg_pairs sl_sgmii_xcvr_diag_ln_regs[] = {
2867+ {0x0000, XCVR_DIAG_HSCLK_SEL},
2868+ {0x0003, XCVR_DIAG_HSCLK_DIV},
2869+ {0x0013, XCVR_DIAG_PLLDRC_CTRL}
2870+};
2871+
2872+static struct cdns_torrent_vals sl_sgmii_link_cmn_vals = {
2873+ .reg_pairs = sl_sgmii_link_cmn_regs,
2874+ .num_regs = ARRAY_SIZE(sl_sgmii_link_cmn_regs),
2875+};
2876+
2877+static struct cdns_torrent_vals sl_sgmii_xcvr_diag_ln_vals = {
2878+ .reg_pairs = sl_sgmii_xcvr_diag_ln_regs,
2879+ .num_regs = ARRAY_SIZE(sl_sgmii_xcvr_diag_ln_regs),
2880+};
2881+
2882+/* Multi link PCIe, 100 MHz Ref clk, internal SSC */
2883+static struct cdns_reg_pairs pcie_100_int_ssc_cmn_regs[] = {
2884+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2885+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
2886+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2887+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2888+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
2889+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2890+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2891+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
2892+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2893+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2894+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
2895+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2896+ {0x0064, CMN_PLL0_INTDIV_M0},
2897+ {0x0050, CMN_PLL0_INTDIV_M1},
2898+ {0x0064, CMN_PLL1_INTDIV_M0},
2899+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2900+ {0x0002, CMN_PLL0_FRACDIVH_M1},
2901+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2902+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2903+ {0x0036, CMN_PLL0_HIGH_THR_M1},
2904+ {0x0044, CMN_PLL1_HIGH_THR_M0},
2905+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2906+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
2907+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2908+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2909+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
2910+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2911+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2912+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
2913+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2914+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2915+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
2916+ {0x006E, CMN_PLL1_SS_CTRL3_M0},
2917+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2918+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
2919+ {0x000E, CMN_PLL1_SS_CTRL4_M0},
2920+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2921+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2922+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2923+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2924+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2925+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2926+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2927+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2928+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2929+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2930+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2931+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
2932+};
2933+
2934+static struct cdns_torrent_vals pcie_100_int_ssc_cmn_vals = {
2935+ .reg_pairs = pcie_100_int_ssc_cmn_regs,
2936+ .num_regs = ARRAY_SIZE(pcie_100_int_ssc_cmn_regs),
2937+};
2938+
2939+/* Single link PCIe, 100 MHz Ref clk, internal SSC */
2940+static struct cdns_reg_pairs sl_pcie_100_int_ssc_cmn_regs[] = {
2941+ {0x0004, CMN_PLL0_DSM_DIAG_M0},
2942+ {0x0004, CMN_PLL0_DSM_DIAG_M1},
2943+ {0x0004, CMN_PLL1_DSM_DIAG_M0},
2944+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M0},
2945+ {0x0509, CMN_PDIAG_PLL0_CP_PADJ_M1},
2946+ {0x0509, CMN_PDIAG_PLL1_CP_PADJ_M0},
2947+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M0},
2948+ {0x0F00, CMN_PDIAG_PLL0_CP_IADJ_M1},
2949+ {0x0F00, CMN_PDIAG_PLL1_CP_IADJ_M0},
2950+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M0},
2951+ {0x0F08, CMN_PDIAG_PLL0_FILT_PADJ_M1},
2952+ {0x0F08, CMN_PDIAG_PLL1_FILT_PADJ_M0},
2953+ {0x0064, CMN_PLL0_INTDIV_M0},
2954+ {0x0050, CMN_PLL0_INTDIV_M1},
2955+ {0x0050, CMN_PLL1_INTDIV_M0},
2956+ {0x0002, CMN_PLL0_FRACDIVH_M0},
2957+ {0x0002, CMN_PLL0_FRACDIVH_M1},
2958+ {0x0002, CMN_PLL1_FRACDIVH_M0},
2959+ {0x0044, CMN_PLL0_HIGH_THR_M0},
2960+ {0x0036, CMN_PLL0_HIGH_THR_M1},
2961+ {0x0036, CMN_PLL1_HIGH_THR_M0},
2962+ {0x0002, CMN_PDIAG_PLL0_CTRL_M0},
2963+ {0x0002, CMN_PDIAG_PLL0_CTRL_M1},
2964+ {0x0002, CMN_PDIAG_PLL1_CTRL_M0},
2965+ {0x0001, CMN_PLL0_SS_CTRL1_M0},
2966+ {0x0001, CMN_PLL0_SS_CTRL1_M1},
2967+ {0x0001, CMN_PLL1_SS_CTRL1_M0},
2968+ {0x011B, CMN_PLL0_SS_CTRL2_M0},
2969+ {0x011B, CMN_PLL0_SS_CTRL2_M1},
2970+ {0x011B, CMN_PLL1_SS_CTRL2_M0},
2971+ {0x006E, CMN_PLL0_SS_CTRL3_M0},
2972+ {0x0058, CMN_PLL0_SS_CTRL3_M1},
2973+ {0x0058, CMN_PLL1_SS_CTRL3_M0},
2974+ {0x000E, CMN_PLL0_SS_CTRL4_M0},
2975+ {0x0012, CMN_PLL0_SS_CTRL4_M1},
2976+ {0x0012, CMN_PLL1_SS_CTRL4_M0},
2977+ {0x0C5E, CMN_PLL0_VCOCAL_REFTIM_START},
2978+ {0x0C5E, CMN_PLL1_VCOCAL_REFTIM_START},
2979+ {0x0C56, CMN_PLL0_VCOCAL_PLLCNT_START},
2980+ {0x0C56, CMN_PLL1_VCOCAL_PLLCNT_START},
2981+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2982+ {0x0003, CMN_PLL1_VCOCAL_TCTRL},
2983+ {0x00C7, CMN_PLL0_LOCK_REFCNT_START},
2984+ {0x00C7, CMN_PLL1_LOCK_REFCNT_START},
2985+ {0x00C7, CMN_PLL0_LOCK_PLLCNT_START},
2986+ {0x00C7, CMN_PLL1_LOCK_PLLCNT_START},
2987+ {0x0005, CMN_PLL0_LOCK_PLLCNT_THR},
2988+ {0x0005, CMN_PLL1_LOCK_PLLCNT_THR}
2989+};
2990+
2991+static struct cdns_torrent_vals sl_pcie_100_int_ssc_cmn_vals = {
2992+ .reg_pairs = sl_pcie_100_int_ssc_cmn_regs,
2993+ .num_regs = ARRAY_SIZE(sl_pcie_100_int_ssc_cmn_regs),
2994+};
2995+
2996+/* PCIe, 100 MHz Ref clk, no SSC & external SSC */
2997+static struct cdns_reg_pairs pcie_100_ext_no_ssc_cmn_regs[] = {
2998+ {0x0003, CMN_PLL0_VCOCAL_TCTRL},
2999+ {0x0003, CMN_PLL1_VCOCAL_TCTRL}
3000+};
3001+
3002+static struct cdns_reg_pairs pcie_100_ext_no_ssc_rx_ln_regs[] = {
3003+ {0x0019, RX_REE_TAP1_CLIP},
3004+ {0x0019, RX_REE_TAP2TON_CLIP},
3005+ {0x0001, RX_DIAG_ACYA}
3006+};
3007+
3008+static struct cdns_torrent_vals pcie_100_no_ssc_cmn_vals = {
3009+ .reg_pairs = pcie_100_ext_no_ssc_cmn_regs,
3010+ .num_regs = ARRAY_SIZE(pcie_100_ext_no_ssc_cmn_regs),
3011+};
3012+
3013+static struct cdns_torrent_vals pcie_100_no_ssc_rx_ln_vals = {
3014+ .reg_pairs = pcie_100_ext_no_ssc_rx_ln_regs,
3015+ .num_regs = ARRAY_SIZE(pcie_100_ext_no_ssc_rx_ln_regs),
3016+};
3017+
19093018 static const struct cdns_torrent_data cdns_map_torrent = {
19103019 .block_offset_shift = 0x2,
19113020 .reg_offset_shift = 0x2,
3021+ .link_cmn_vals = {
3022+ [TYPE_PCIE] = {
3023+ [TYPE_NONE] = {
3024+ [NO_SSC] = NULL,
3025+ [EXTERNAL_SSC] = NULL,
3026+ [INTERNAL_SSC] = NULL,
3027+ },
3028+ [TYPE_SGMII] = {
3029+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3030+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3031+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3032+ },
3033+ [TYPE_QSGMII] = {
3034+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3035+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3036+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3037+ },
3038+ [TYPE_USB] = {
3039+ [NO_SSC] = &pcie_usb_link_cmn_vals,
3040+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3041+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3042+ },
3043+ },
3044+ [TYPE_SGMII] = {
3045+ [TYPE_NONE] = {
3046+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
3047+ },
3048+ [TYPE_PCIE] = {
3049+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3050+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3051+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3052+ },
3053+ [TYPE_USB] = {
3054+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3055+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3056+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3057+ },
3058+ },
3059+ [TYPE_QSGMII] = {
3060+ [TYPE_NONE] = {
3061+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
3062+ },
3063+ [TYPE_PCIE] = {
3064+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3065+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3066+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3067+ },
3068+ [TYPE_USB] = {
3069+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3070+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3071+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3072+ },
3073+ },
3074+ [TYPE_USB] = {
3075+ [TYPE_NONE] = {
3076+ [NO_SSC] = &sl_usb_link_cmn_vals,
3077+ [EXTERNAL_SSC] = &sl_usb_link_cmn_vals,
3078+ [INTERNAL_SSC] = &sl_usb_link_cmn_vals,
3079+ },
3080+ [TYPE_PCIE] = {
3081+ [NO_SSC] = &pcie_usb_link_cmn_vals,
3082+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3083+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3084+ },
3085+ [TYPE_SGMII] = {
3086+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3087+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3088+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3089+ },
3090+ [TYPE_QSGMII] = {
3091+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3092+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3093+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3094+ },
3095+ },
3096+ },
3097+ .xcvr_diag_vals = {
3098+ [TYPE_PCIE] = {
3099+ [TYPE_NONE] = {
3100+ [NO_SSC] = NULL,
3101+ [EXTERNAL_SSC] = NULL,
3102+ [INTERNAL_SSC] = NULL,
3103+ },
3104+ [TYPE_SGMII] = {
3105+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3106+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3107+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3108+ },
3109+ [TYPE_QSGMII] = {
3110+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3111+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3112+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3113+ },
3114+ [TYPE_USB] = {
3115+ [NO_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3116+ [EXTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3117+ [INTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3118+ },
3119+ },
3120+ [TYPE_SGMII] = {
3121+ [TYPE_NONE] = {
3122+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
3123+ },
3124+ [TYPE_PCIE] = {
3125+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3126+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3127+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3128+ },
3129+ [TYPE_USB] = {
3130+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3131+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3132+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3133+ },
3134+ },
3135+ [TYPE_QSGMII] = {
3136+ [TYPE_NONE] = {
3137+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
3138+ },
3139+ [TYPE_PCIE] = {
3140+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3141+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3142+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3143+ },
3144+ [TYPE_USB] = {
3145+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3146+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3147+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3148+ },
3149+ },
3150+ [TYPE_USB] = {
3151+ [TYPE_NONE] = {
3152+ [NO_SSC] = &sl_usb_xcvr_diag_ln_vals,
3153+ [EXTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
3154+ [INTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
3155+ },
3156+ [TYPE_PCIE] = {
3157+ [NO_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3158+ [EXTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3159+ [INTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3160+ },
3161+ [TYPE_SGMII] = {
3162+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3163+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3164+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3165+ },
3166+ [TYPE_QSGMII] = {
3167+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3168+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3169+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3170+ },
3171+ },
3172+ },
3173+ .pcs_cmn_vals = {
3174+ [TYPE_USB] = {
3175+ [TYPE_NONE] = {
3176+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3177+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3178+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3179+ },
3180+ [TYPE_PCIE] = {
3181+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3182+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3183+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3184+ },
3185+ [TYPE_SGMII] = {
3186+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3187+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3188+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3189+ },
3190+ [TYPE_QSGMII] = {
3191+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3192+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3193+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3194+ },
3195+ },
3196+ },
3197+ .cmn_vals = {
3198+ [TYPE_PCIE] = {
3199+ [TYPE_NONE] = {
3200+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3201+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3202+ [INTERNAL_SSC] = &sl_pcie_100_int_ssc_cmn_vals,
3203+ },
3204+ [TYPE_SGMII] = {
3205+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3206+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3207+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3208+ },
3209+ [TYPE_QSGMII] = {
3210+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3211+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3212+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3213+ },
3214+ [TYPE_USB] = {
3215+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3216+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3217+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3218+ },
3219+ },
3220+ [TYPE_SGMII] = {
3221+ [TYPE_NONE] = {
3222+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3223+ },
3224+ [TYPE_PCIE] = {
3225+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3226+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3227+ [INTERNAL_SSC] = &sgmii_100_int_ssc_cmn_vals,
3228+ },
3229+ [TYPE_USB] = {
3230+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3231+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3232+ [INTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3233+ },
3234+ },
3235+ [TYPE_QSGMII] = {
3236+ [TYPE_NONE] = {
3237+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3238+ },
3239+ [TYPE_PCIE] = {
3240+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3241+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3242+ [INTERNAL_SSC] = &qsgmii_100_int_ssc_cmn_vals,
3243+ },
3244+ [TYPE_USB] = {
3245+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3246+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3247+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3248+ },
3249+ },
3250+ [TYPE_USB] = {
3251+ [TYPE_NONE] = {
3252+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3253+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3254+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3255+ },
3256+ [TYPE_PCIE] = {
3257+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3258+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3259+ [INTERNAL_SSC] = &usb_100_int_ssc_cmn_vals,
3260+ },
3261+ [TYPE_SGMII] = {
3262+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3263+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3264+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3265+ },
3266+ [TYPE_QSGMII] = {
3267+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3268+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3269+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3270+ },
3271+ },
3272+ },
3273+ .tx_ln_vals = {
3274+ [TYPE_PCIE] = {
3275+ [TYPE_NONE] = {
3276+ [NO_SSC] = NULL,
3277+ [EXTERNAL_SSC] = NULL,
3278+ [INTERNAL_SSC] = NULL,
3279+ },
3280+ [TYPE_SGMII] = {
3281+ [NO_SSC] = NULL,
3282+ [EXTERNAL_SSC] = NULL,
3283+ [INTERNAL_SSC] = NULL,
3284+ },
3285+ [TYPE_QSGMII] = {
3286+ [NO_SSC] = NULL,
3287+ [EXTERNAL_SSC] = NULL,
3288+ [INTERNAL_SSC] = NULL,
3289+ },
3290+ [TYPE_USB] = {
3291+ [NO_SSC] = NULL,
3292+ [EXTERNAL_SSC] = NULL,
3293+ [INTERNAL_SSC] = NULL,
3294+ },
3295+ },
3296+ [TYPE_SGMII] = {
3297+ [TYPE_NONE] = {
3298+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3299+ },
3300+ [TYPE_PCIE] = {
3301+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3302+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3303+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3304+ },
3305+ [TYPE_USB] = {
3306+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3307+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3308+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3309+ },
3310+ },
3311+ [TYPE_QSGMII] = {
3312+ [TYPE_NONE] = {
3313+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3314+ },
3315+ [TYPE_PCIE] = {
3316+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3317+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3318+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3319+ },
3320+ [TYPE_USB] = {
3321+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3322+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3323+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3324+ },
3325+ },
3326+ [TYPE_USB] = {
3327+ [TYPE_NONE] = {
3328+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3329+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3330+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3331+ },
3332+ [TYPE_PCIE] = {
3333+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3334+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3335+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3336+ },
3337+ [TYPE_SGMII] = {
3338+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3339+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3340+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3341+ },
3342+ [TYPE_QSGMII] = {
3343+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3344+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3345+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3346+ },
3347+ },
3348+ },
3349+ .rx_ln_vals = {
3350+ [TYPE_PCIE] = {
3351+ [TYPE_NONE] = {
3352+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3353+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3354+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3355+ },
3356+ [TYPE_SGMII] = {
3357+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3358+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3359+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3360+ },
3361+ [TYPE_QSGMII] = {
3362+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3363+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3364+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3365+ },
3366+ [TYPE_USB] = {
3367+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3368+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3369+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3370+ },
3371+ },
3372+ [TYPE_SGMII] = {
3373+ [TYPE_NONE] = {
3374+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3375+ },
3376+ [TYPE_PCIE] = {
3377+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3378+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3379+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3380+ },
3381+ [TYPE_USB] = {
3382+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3383+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3384+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3385+ },
3386+ },
3387+ [TYPE_QSGMII] = {
3388+ [TYPE_NONE] = {
3389+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3390+ },
3391+ [TYPE_PCIE] = {
3392+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3393+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3394+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3395+ },
3396+ [TYPE_USB] = {
3397+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3398+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3399+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3400+ },
3401+ },
3402+ [TYPE_USB] = {
3403+ [TYPE_NONE] = {
3404+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3405+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3406+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3407+ },
3408+ [TYPE_PCIE] = {
3409+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3410+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3411+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3412+ },
3413+ [TYPE_SGMII] = {
3414+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3415+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3416+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3417+ },
3418+ [TYPE_QSGMII] = {
3419+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3420+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3421+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3422+ },
3423+ },
3424+ },
19123425 };
19133426
19143427 static const struct cdns_torrent_data ti_j721e_map_torrent = {
19153428 .block_offset_shift = 0x0,
19163429 .reg_offset_shift = 0x1,
3430+ .link_cmn_vals = {
3431+ [TYPE_PCIE] = {
3432+ [TYPE_NONE] = {
3433+ [NO_SSC] = NULL,
3434+ [EXTERNAL_SSC] = NULL,
3435+ [INTERNAL_SSC] = NULL,
3436+ },
3437+ [TYPE_SGMII] = {
3438+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3439+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3440+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3441+ },
3442+ [TYPE_QSGMII] = {
3443+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3444+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3445+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3446+ },
3447+ [TYPE_USB] = {
3448+ [NO_SSC] = &pcie_usb_link_cmn_vals,
3449+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3450+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3451+ },
3452+ },
3453+ [TYPE_SGMII] = {
3454+ [TYPE_NONE] = {
3455+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
3456+ },
3457+ [TYPE_PCIE] = {
3458+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3459+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3460+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3461+ },
3462+ [TYPE_USB] = {
3463+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3464+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3465+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3466+ },
3467+ },
3468+ [TYPE_QSGMII] = {
3469+ [TYPE_NONE] = {
3470+ [NO_SSC] = &sl_sgmii_link_cmn_vals,
3471+ },
3472+ [TYPE_PCIE] = {
3473+ [NO_SSC] = &pcie_sgmii_link_cmn_vals,
3474+ [EXTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3475+ [INTERNAL_SSC] = &pcie_sgmii_link_cmn_vals,
3476+ },
3477+ [TYPE_USB] = {
3478+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3479+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3480+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3481+ },
3482+ },
3483+ [TYPE_USB] = {
3484+ [TYPE_NONE] = {
3485+ [NO_SSC] = &sl_usb_link_cmn_vals,
3486+ [EXTERNAL_SSC] = &sl_usb_link_cmn_vals,
3487+ [INTERNAL_SSC] = &sl_usb_link_cmn_vals,
3488+ },
3489+ [TYPE_PCIE] = {
3490+ [NO_SSC] = &pcie_usb_link_cmn_vals,
3491+ [EXTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3492+ [INTERNAL_SSC] = &pcie_usb_link_cmn_vals,
3493+ },
3494+ [TYPE_SGMII] = {
3495+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3496+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3497+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3498+ },
3499+ [TYPE_QSGMII] = {
3500+ [NO_SSC] = &usb_sgmii_link_cmn_vals,
3501+ [EXTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3502+ [INTERNAL_SSC] = &usb_sgmii_link_cmn_vals,
3503+ },
3504+ },
3505+ },
3506+ .xcvr_diag_vals = {
3507+ [TYPE_PCIE] = {
3508+ [TYPE_NONE] = {
3509+ [NO_SSC] = NULL,
3510+ [EXTERNAL_SSC] = NULL,
3511+ [INTERNAL_SSC] = NULL,
3512+ },
3513+ [TYPE_SGMII] = {
3514+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3515+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3516+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3517+ },
3518+ [TYPE_QSGMII] = {
3519+ [NO_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3520+ [EXTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3521+ [INTERNAL_SSC] = &pcie_sgmii_xcvr_diag_ln_vals,
3522+ },
3523+ [TYPE_USB] = {
3524+ [NO_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3525+ [EXTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3526+ [INTERNAL_SSC] = &pcie_usb_xcvr_diag_ln_vals,
3527+ },
3528+ },
3529+ [TYPE_SGMII] = {
3530+ [TYPE_NONE] = {
3531+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
3532+ },
3533+ [TYPE_PCIE] = {
3534+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3535+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3536+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3537+ },
3538+ [TYPE_USB] = {
3539+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3540+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3541+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3542+ },
3543+ },
3544+ [TYPE_QSGMII] = {
3545+ [TYPE_NONE] = {
3546+ [NO_SSC] = &sl_sgmii_xcvr_diag_ln_vals,
3547+ },
3548+ [TYPE_PCIE] = {
3549+ [NO_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3550+ [EXTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3551+ [INTERNAL_SSC] = &sgmii_pcie_xcvr_diag_ln_vals,
3552+ },
3553+ [TYPE_USB] = {
3554+ [NO_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3555+ [EXTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3556+ [INTERNAL_SSC] = &sgmii_usb_xcvr_diag_ln_vals,
3557+ },
3558+ },
3559+ [TYPE_USB] = {
3560+ [TYPE_NONE] = {
3561+ [NO_SSC] = &sl_usb_xcvr_diag_ln_vals,
3562+ [EXTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
3563+ [INTERNAL_SSC] = &sl_usb_xcvr_diag_ln_vals,
3564+ },
3565+ [TYPE_PCIE] = {
3566+ [NO_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3567+ [EXTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3568+ [INTERNAL_SSC] = &usb_pcie_xcvr_diag_ln_vals,
3569+ },
3570+ [TYPE_SGMII] = {
3571+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3572+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3573+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3574+ },
3575+ [TYPE_QSGMII] = {
3576+ [NO_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3577+ [EXTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3578+ [INTERNAL_SSC] = &usb_sgmii_xcvr_diag_ln_vals,
3579+ },
3580+ },
3581+ },
3582+ .pcs_cmn_vals = {
3583+ [TYPE_USB] = {
3584+ [TYPE_NONE] = {
3585+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3586+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3587+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3588+ },
3589+ [TYPE_PCIE] = {
3590+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3591+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3592+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3593+ },
3594+ [TYPE_SGMII] = {
3595+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3596+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3597+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3598+ },
3599+ [TYPE_QSGMII] = {
3600+ [NO_SSC] = &usb_phy_pcs_cmn_vals,
3601+ [EXTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3602+ [INTERNAL_SSC] = &usb_phy_pcs_cmn_vals,
3603+ },
3604+ },
3605+ },
3606+ .cmn_vals = {
3607+ [TYPE_PCIE] = {
3608+ [TYPE_NONE] = {
3609+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3610+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3611+ [INTERNAL_SSC] = &sl_pcie_100_int_ssc_cmn_vals,
3612+ },
3613+ [TYPE_SGMII] = {
3614+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3615+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3616+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3617+ },
3618+ [TYPE_QSGMII] = {
3619+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3620+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3621+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3622+ },
3623+ [TYPE_USB] = {
3624+ [NO_SSC] = &pcie_100_no_ssc_cmn_vals,
3625+ [EXTERNAL_SSC] = &pcie_100_no_ssc_cmn_vals,
3626+ [INTERNAL_SSC] = &pcie_100_int_ssc_cmn_vals,
3627+ },
3628+ },
3629+ [TYPE_SGMII] = {
3630+ [TYPE_NONE] = {
3631+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3632+ },
3633+ [TYPE_PCIE] = {
3634+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3635+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3636+ [INTERNAL_SSC] = &sgmii_100_int_ssc_cmn_vals,
3637+ },
3638+ [TYPE_USB] = {
3639+ [NO_SSC] = &sgmii_100_no_ssc_cmn_vals,
3640+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3641+ [INTERNAL_SSC] = &sgmii_100_no_ssc_cmn_vals,
3642+ },
3643+ },
3644+ [TYPE_QSGMII] = {
3645+ [TYPE_NONE] = {
3646+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3647+ },
3648+ [TYPE_PCIE] = {
3649+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3650+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3651+ [INTERNAL_SSC] = &qsgmii_100_int_ssc_cmn_vals,
3652+ },
3653+ [TYPE_USB] = {
3654+ [NO_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3655+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3656+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_cmn_vals,
3657+ },
3658+ },
3659+ [TYPE_USB] = {
3660+ [TYPE_NONE] = {
3661+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3662+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3663+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3664+ },
3665+ [TYPE_PCIE] = {
3666+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3667+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3668+ [INTERNAL_SSC] = &usb_100_int_ssc_cmn_vals,
3669+ },
3670+ [TYPE_SGMII] = {
3671+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3672+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3673+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3674+ },
3675+ [TYPE_QSGMII] = {
3676+ [NO_SSC] = &usb_100_no_ssc_cmn_vals,
3677+ [EXTERNAL_SSC] = &usb_100_no_ssc_cmn_vals,
3678+ [INTERNAL_SSC] = &sl_usb_100_int_ssc_cmn_vals,
3679+ },
3680+ },
3681+ },
3682+ .tx_ln_vals = {
3683+ [TYPE_PCIE] = {
3684+ [TYPE_NONE] = {
3685+ [NO_SSC] = NULL,
3686+ [EXTERNAL_SSC] = NULL,
3687+ [INTERNAL_SSC] = NULL,
3688+ },
3689+ [TYPE_SGMII] = {
3690+ [NO_SSC] = NULL,
3691+ [EXTERNAL_SSC] = NULL,
3692+ [INTERNAL_SSC] = NULL,
3693+ },
3694+ [TYPE_QSGMII] = {
3695+ [NO_SSC] = NULL,
3696+ [EXTERNAL_SSC] = NULL,
3697+ [INTERNAL_SSC] = NULL,
3698+ },
3699+ [TYPE_USB] = {
3700+ [NO_SSC] = NULL,
3701+ [EXTERNAL_SSC] = NULL,
3702+ [INTERNAL_SSC] = NULL,
3703+ },
3704+ },
3705+ [TYPE_SGMII] = {
3706+ [TYPE_NONE] = {
3707+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3708+ },
3709+ [TYPE_PCIE] = {
3710+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3711+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3712+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3713+ },
3714+ [TYPE_USB] = {
3715+ [NO_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3716+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3717+ [INTERNAL_SSC] = &sgmii_100_no_ssc_tx_ln_vals,
3718+ },
3719+ },
3720+ [TYPE_QSGMII] = {
3721+ [TYPE_NONE] = {
3722+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3723+ },
3724+ [TYPE_PCIE] = {
3725+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3726+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3727+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3728+ },
3729+ [TYPE_USB] = {
3730+ [NO_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3731+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3732+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_tx_ln_vals,
3733+ },
3734+ },
3735+ [TYPE_USB] = {
3736+ [TYPE_NONE] = {
3737+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3738+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3739+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3740+ },
3741+ [TYPE_PCIE] = {
3742+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3743+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3744+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3745+ },
3746+ [TYPE_SGMII] = {
3747+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3748+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3749+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3750+ },
3751+ [TYPE_QSGMII] = {
3752+ [NO_SSC] = &usb_100_no_ssc_tx_ln_vals,
3753+ [EXTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3754+ [INTERNAL_SSC] = &usb_100_no_ssc_tx_ln_vals,
3755+ },
3756+ },
3757+ },
3758+ .rx_ln_vals = {
3759+ [TYPE_PCIE] = {
3760+ [TYPE_NONE] = {
3761+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3762+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3763+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3764+ },
3765+ [TYPE_SGMII] = {
3766+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3767+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3768+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3769+ },
3770+ [TYPE_QSGMII] = {
3771+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3772+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3773+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3774+ },
3775+ [TYPE_USB] = {
3776+ [NO_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3777+ [EXTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3778+ [INTERNAL_SSC] = &pcie_100_no_ssc_rx_ln_vals,
3779+ },
3780+ },
3781+ [TYPE_SGMII] = {
3782+ [TYPE_NONE] = {
3783+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3784+ },
3785+ [TYPE_PCIE] = {
3786+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3787+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3788+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3789+ },
3790+ [TYPE_USB] = {
3791+ [NO_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3792+ [EXTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3793+ [INTERNAL_SSC] = &sgmii_100_no_ssc_rx_ln_vals,
3794+ },
3795+ },
3796+ [TYPE_QSGMII] = {
3797+ [TYPE_NONE] = {
3798+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3799+ },
3800+ [TYPE_PCIE] = {
3801+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3802+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3803+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3804+ },
3805+ [TYPE_USB] = {
3806+ [NO_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3807+ [EXTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3808+ [INTERNAL_SSC] = &qsgmii_100_no_ssc_rx_ln_vals,
3809+ },
3810+ },
3811+ [TYPE_USB] = {
3812+ [TYPE_NONE] = {
3813+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3814+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3815+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3816+ },
3817+ [TYPE_PCIE] = {
3818+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3819+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3820+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3821+ },
3822+ [TYPE_SGMII] = {
3823+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3824+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3825+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3826+ },
3827+ [TYPE_QSGMII] = {
3828+ [NO_SSC] = &usb_100_no_ssc_rx_ln_vals,
3829+ [EXTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3830+ [INTERNAL_SSC] = &usb_100_no_ssc_rx_ln_vals,
3831+ },
3832+ },
3833+ },
19173834 };
19183835
19193836 static const struct of_device_id cdns_torrent_phy_of_match[] = {
drivers/phy/freescale/phy-fsl-imx8mq-usb.c+71−8
@@ -1,15 +1,20 @@
11 // SPDX-License-Identifier: GPL-2.0+
22 /* Copyright (c) 2017 NXP. */
33
4+#include <linux/bitfield.h>
45 #include <linux/clk.h>
6+#include <linux/delay.h>
57 #include <linux/io.h>
68 #include <linux/module.h>
9+#include <linux/of_platform.h>
710 #include <linux/phy/phy.h>
811 #include <linux/platform_device.h>
912 #include <linux/regulator/consumer.h>
1013
1114 #define PHY_CTRL0 0x0
1215 #define PHY_CTRL0_REF_SSP_EN BIT(2)
16+#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
17+#define PHY_CTRL0_FSEL_24M 0x2a
1318
1419 #define PHY_CTRL1 0x4
1520 #define PHY_CTRL1_RESET BIT(0)
@@ -20,6 +25,11 @@ · 4 unmodified lines
2025
2126 #define PHY_CTRL2 0x8
2227 #define PHY_CTRL2_TXENABLEN0 BIT(8)
28+#define PHY_CTRL2_OTG_DISABLE BIT(9)
29+
30+#define PHY_CTRL6 0x18
31+#define PHY_CTRL6_ALT_CLK_EN BIT(1)
32+#define PHY_CTRL6_ALT_CLK_SEL BIT(0)
2333
2434 struct imx8mq_usb_phy {
2535 struct phy *phy;
@@ -54,6 +64,44 @@ static int imx8mq_usb_phy_init(struct phy *phy) · 28 unmodified lines
5464 return 0;
5565 }
5666
67+static int imx8mp_usb_phy_init(struct phy *phy)
68+{
69+ struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
70+ u32 value;
71+
72+ /* USB3.0 PHY signal fsel for 24M ref */
73+ value = readl(imx_phy->base + PHY_CTRL0);
74+ value &= ~PHY_CTRL0_FSEL_MASK;
75+ value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
76+ writel(value, imx_phy->base + PHY_CTRL0);
77+
78+ /* Disable alt_clk_en and use internal MPLL clocks */
79+ value = readl(imx_phy->base + PHY_CTRL6);
80+ value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
81+ writel(value, imx_phy->base + PHY_CTRL6);
82+
83+ value = readl(imx_phy->base + PHY_CTRL1);
84+ value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
85+ value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
86+ writel(value, imx_phy->base + PHY_CTRL1);
87+
88+ value = readl(imx_phy->base + PHY_CTRL0);
89+ value |= PHY_CTRL0_REF_SSP_EN;
90+ writel(value, imx_phy->base + PHY_CTRL0);
91+
92+ value = readl(imx_phy->base + PHY_CTRL2);
93+ value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
94+ writel(value, imx_phy->base + PHY_CTRL2);
95+
96+ udelay(10);
97+
98+ value = readl(imx_phy->base + PHY_CTRL1);
99+ value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
100+ writel(value, imx_phy->base + PHY_CTRL1);
101+
102+ return 0;
103+}
104+
57105 static int imx8mq_phy_power_on(struct phy *phy)
58106 {
59107 struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
@@ -76,19 +124,36 @@ static int imx8mq_phy_power_off(struct phy *phy) · 16 unmodified lines
76124 return 0;
77125 }
78126
79−static struct phy_ops imx8mq_usb_phy_ops = {
127+static const struct phy_ops imx8mq_usb_phy_ops = {
80128 .init = imx8mq_usb_phy_init,
81129 .power_on = imx8mq_phy_power_on,
82130 .power_off = imx8mq_phy_power_off,
83131 .owner = THIS_MODULE,
84132 };
85133
134+static struct phy_ops imx8mp_usb_phy_ops = {
135+ .init = imx8mp_usb_phy_init,
136+ .power_on = imx8mq_phy_power_on,
137+ .power_off = imx8mq_phy_power_off,
138+ .owner = THIS_MODULE,
139+};
140+
141+static const struct of_device_id imx8mq_usb_phy_of_match[] = {
142+ {.compatible = "fsl,imx8mq-usb-phy",
143+ .data = &imx8mq_usb_phy_ops,},
144+ {.compatible = "fsl,imx8mp-usb-phy",
145+ .data = &imx8mp_usb_phy_ops,},
146+ { }
147+};
148+MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
149+
86150 static int imx8mq_usb_phy_probe(struct platform_device *pdev)
87151 {
88152 struct phy_provider *phy_provider;
89153 struct device *dev = &pdev->dev;
90154 struct imx8mq_usb_phy *imx_phy;
91155 struct resource *res;
156+ const struct phy_ops *phy_ops;
92157
93158 imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
94159 if (!imx_phy)
@@ -105,7 +170,11 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev) · 10 unmodified lines
105170 if (IS_ERR(imx_phy->base))
106171 return PTR_ERR(imx_phy->base);
107172
108− imx_phy->phy = devm_phy_create(dev, NULL, &imx8mq_usb_phy_ops);
173+ phy_ops = of_device_get_match_data(dev);
174+ if (!phy_ops)
175+ return -EINVAL;
176+
177+ imx_phy->phy = devm_phy_create(dev, NULL, phy_ops);
109178 if (IS_ERR(imx_phy->phy))
110179 return PTR_ERR(imx_phy->phy);
111180
@@ -120,12 +189,6 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev) · 8 unmodified lines
120189 return PTR_ERR_OR_ZERO(phy_provider);
121190 }
122191
123−static const struct of_device_id imx8mq_usb_phy_of_match[] = {
124− {.compatible = "fsl,imx8mq-usb-phy",},
125− { },
126−};
127−MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
128−
129192 static struct platform_driver imx8mq_usb_phy_driver = {
130193 .probe = imx8mq_usb_phy_probe,
131194 .driver = {
drivers/phy/hisilicon/phy-hi3660-usb3.c+1−1
@@ -161,7 +161,7 @@ out: · 160 unmodified lines
161161 return ret;
162162 }
163163
164−static struct phy_ops hi3660_phy_ops = {
164+static const struct phy_ops hi3660_phy_ops = {
165165 .init = hi3660_phy_init,
166166 .exit = hi3660_phy_exit,
167167 .owner = THIS_MODULE,
drivers/phy/intel/Kconfig+17−5
@@ -1,9 +1,21 @@
11 # SPDX-License-Identifier: GPL-2.0
22 #
3−# Phy drivers for Intel Lightning Mountain(LGM) platform
3+# Phy drivers for Intel platforms
44 #
5−config PHY_INTEL_COMBO
6− bool "Intel ComboPHY driver"
5+config PHY_INTEL_KEEMBAY_EMMC
6+ tristate "Intel Keem Bay EMMC PHY driver"
7+ depends on (OF && ARM64) || COMPILE_TEST
8+ depends on HAS_IOMEM
9+ select GENERIC_PHY
10+ select REGMAP_MMIO
11+ help
12+ Choose this option if you have an Intel Keem Bay SoC.
13+
14+ To compile this driver as a module, choose M here: the module
15+ will be called phy-keembay-emmc.ko.
16+
17+config PHY_INTEL_LGM_COMBO
18+ bool "Intel Lightning Mountain ComboPHY driver"
719 depends on X86 || COMPILE_TEST
820 depends on OF && HAS_IOMEM
921 select MFD_SYSCON
@@ -16,8 +28,8 @@ config PHY_INTEL_COMBO · 6 unmodified lines
1628 chipsets which provides PHYs for various controllers, EMAC,
1729 SATA and PCIe.
1830
19−config PHY_INTEL_EMMC
20− tristate "Intel EMMC PHY driver"
31+config PHY_INTEL_LGM_EMMC
32+ tristate "Intel Lightning Mountain EMMC PHY driver"
2133 depends on X86 || COMPILE_TEST
2234 select GENERIC_PHY
2335 help
drivers/phy/intel/Makefile+3−2
@@ -1,3 +1,4 @@
11 # SPDX-License-Identifier: GPL-2.0
2−obj-$(CONFIG_PHY_INTEL_COMBO) += phy-intel-combo.o
3−obj-$(CONFIG_PHY_INTEL_EMMC) += phy-intel-emmc.o
2+obj-$(CONFIG_PHY_INTEL_KEEMBAY_EMMC) += phy-intel-keembay-emmc.o
3+obj-$(CONFIG_PHY_INTEL_LGM_COMBO) += phy-intel-lgm-combo.o
4+obj-$(CONFIG_PHY_INTEL_LGM_EMMC) += phy-intel-lgm-emmc.o
drivers/phy/intel/phy-intel-keembay-emmc.c+307−0
@@ -0,0 +1,307 @@
1+// SPDX-License-Identifier: GPL-2.0-only
2+/*
3+ * Intel Keem Bay eMMC PHY driver
4+ * Copyright (C) 2020 Intel Corporation
5+ */
6+
7+#include <linux/bitfield.h>
8+#include <linux/clk.h>
9+#include <linux/delay.h>
10+#include <linux/mfd/syscon.h>
11+#include <linux/module.h>
12+#include <linux/of.h>
13+#include <linux/of_address.h>
14+#include <linux/phy/phy.h>
15+#include <linux/platform_device.h>
16+#include <linux/regmap.h>
17+
18+/* eMMC/SD/SDIO core/phy configuration registers */
19+#define PHY_CFG_0 0x24
20+#define SEL_DLY_TXCLK_MASK BIT(29)
21+#define OTAP_DLY_ENA_MASK BIT(27)
22+#define OTAP_DLY_SEL_MASK GENMASK(26, 23)
23+#define DLL_EN_MASK BIT(10)
24+#define PWR_DOWN_MASK BIT(0)
25+
26+#define PHY_CFG_2 0x2c
27+#define SEL_FREQ_MASK GENMASK(12, 10)
28+
29+#define PHY_STAT 0x40
30+#define CAL_DONE_MASK BIT(6)
31+#define IS_CALDONE(x) ((x) & CAL_DONE_MASK)
32+#define DLL_RDY_MASK BIT(5)
33+#define IS_DLLRDY(x) ((x) & DLL_RDY_MASK)
34+
35+/* From ACS_eMMC51_16nFFC_RO1100_Userguide_v1p0.pdf p17 */
36+#define FREQSEL_200M_170M 0x0
37+#define FREQSEL_170M_140M 0x1
38+#define FREQSEL_140M_110M 0x2
39+#define FREQSEL_110M_80M 0x3
40+#define FREQSEL_80M_50M 0x4
41+
42+struct keembay_emmc_phy {
43+ struct regmap *syscfg;
44+ struct clk *emmcclk;
45+};
46+
47+static const struct regmap_config keembay_regmap_config = {
48+ .reg_bits = 32,
49+ .val_bits = 32,
50+ .reg_stride = 4,
51+};
52+
53+static int keembay_emmc_phy_power(struct phy *phy, bool on_off)
54+{
55+ struct keembay_emmc_phy *priv = phy_get_drvdata(phy);
56+ unsigned int caldone;
57+ unsigned int dllrdy;
58+ unsigned int freqsel;
59+ unsigned int mhz;
60+ int ret;
61+
62+ /*
63+ * Keep phyctrl_pdb and phyctrl_endll low to allow
64+ * initialization of CALIO state M/C DFFs
65+ */
66+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK,
67+ FIELD_PREP(PWR_DOWN_MASK, 0));
68+ if (ret) {
69+ dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret);
70+ return ret;
71+ }
72+
73+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK,
74+ FIELD_PREP(DLL_EN_MASK, 0));
75+ if (ret) {
76+ dev_err(&phy->dev, "turn off the dll failed: %d\n", ret);
77+ return ret;
78+ }
79+
80+ /* Already finish power off above */
81+ if (!on_off)
82+ return 0;
83+
84+ mhz = DIV_ROUND_CLOSEST(clk_get_rate(priv->emmcclk), 1000000);
85+ if (mhz <= 200 && mhz >= 170)
86+ freqsel = FREQSEL_200M_170M;
87+ else if (mhz <= 170 && mhz >= 140)
88+ freqsel = FREQSEL_170M_140M;
89+ else if (mhz <= 140 && mhz >= 110)
90+ freqsel = FREQSEL_140M_110M;
91+ else if (mhz <= 110 && mhz >= 80)
92+ freqsel = FREQSEL_110M_80M;
93+ else if (mhz <= 80 && mhz >= 50)
94+ freqsel = FREQSEL_80M_50M;
95+ else
96+ freqsel = 0x0;
97+
98+ if (mhz < 50 || mhz > 200)
99+ dev_warn(&phy->dev, "Unsupported rate: %d MHz\n", mhz);
100+
101+ /*
102+ * According to the user manual, calpad calibration
103+ * cycle takes more than 2us without the minimal recommended
104+ * value, so we may need a little margin here
105+ */
106+ udelay(5);
107+
108+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, PWR_DOWN_MASK,
109+ FIELD_PREP(PWR_DOWN_MASK, 1));
110+ if (ret) {
111+ dev_err(&phy->dev, "CALIO power down bar failed: %d\n", ret);
112+ return ret;
113+ }
114+
115+ /*
116+ * According to the user manual, it asks driver to wait 5us for
117+ * calpad busy trimming. However it is documented that this value is
118+ * PVT(A.K.A. process, voltage and temperature) relevant, so some
119+ * failure cases are found which indicates we should be more tolerant
120+ * to calpad busy trimming.
121+ */
122+ ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT,
123+ caldone, IS_CALDONE(caldone),
124+ 0, 50);
125+ if (ret) {
126+ dev_err(&phy->dev, "caldone failed, ret=%d\n", ret);
127+ return ret;
128+ }
129+
130+ /* Set the frequency of the DLL operation */
131+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_2, SEL_FREQ_MASK,
132+ FIELD_PREP(SEL_FREQ_MASK, freqsel));
133+ if (ret) {
134+ dev_err(&phy->dev, "set the frequency of dll failed:%d\n", ret);
135+ return ret;
136+ }
137+
138+ /* Turn on the DLL */
139+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, DLL_EN_MASK,
140+ FIELD_PREP(DLL_EN_MASK, 1));
141+ if (ret) {
142+ dev_err(&phy->dev, "turn on the dll failed: %d\n", ret);
143+ return ret;
144+ }
145+
146+ /*
147+ * We turned on the DLL even though the rate was 0 because we the
148+ * clock might be turned on later. ...but we can't wait for the DLL
149+ * to lock when the rate is 0 because it will never lock with no
150+ * input clock.
151+ *
152+ * Technically we should be checking the lock later when the clock
153+ * is turned on, but for now we won't.
154+ */
155+ if (mhz == 0)
156+ return 0;
157+
158+ /*
159+ * After enabling analog DLL circuits docs say that we need 10.2 us if
160+ * our source clock is at 50 MHz and that lock time scales linearly
161+ * with clock speed. If we are powering on the PHY and the card clock
162+ * is super slow (like 100kHz) this could take as long as 5.1 ms as
163+ * per the math: 10.2 us * (50000000 Hz / 100000 Hz) => 5.1 ms
164+ * hopefully we won't be running at 100 kHz, but we should still make
165+ * sure we wait long enough.
166+ *
167+ * NOTE: There appear to be corner cases where the DLL seems to take
168+ * extra long to lock for reasons that aren't understood. In some
169+ * extreme cases we've seen it take up to over 10ms (!). We'll be
170+ * generous and give it 50ms.
171+ */
172+ ret = regmap_read_poll_timeout(priv->syscfg, PHY_STAT,
173+ dllrdy, IS_DLLRDY(dllrdy),
174+ 0, 50 * USEC_PER_MSEC);
175+ if (ret)
176+ dev_err(&phy->dev, "dllrdy failed, ret=%d\n", ret);
177+
178+ return ret;
179+}
180+
181+static int keembay_emmc_phy_init(struct phy *phy)
182+{
183+ struct keembay_emmc_phy *priv = phy_get_drvdata(phy);
184+
185+ /*
186+ * We purposely get the clock here and not in probe to avoid the
187+ * circular dependency problem. We expect:
188+ * - PHY driver to probe
189+ * - SDHCI driver to start probe
190+ * - SDHCI driver to register it's clock
191+ * - SDHCI driver to get the PHY
192+ * - SDHCI driver to init the PHY
193+ *
194+ * The clock is optional, so upon any error just return it like
195+ * any other error to user.
196+ */
197+ priv->emmcclk = clk_get_optional(&phy->dev, "emmcclk");
198+
199+ return PTR_ERR_OR_ZERO(priv->emmcclk);
200+}
201+
202+static int keembay_emmc_phy_exit(struct phy *phy)
203+{
204+ struct keembay_emmc_phy *priv = phy_get_drvdata(phy);
205+
206+ clk_put(priv->emmcclk);
207+
208+ return 0;
209+};
210+
211+static int keembay_emmc_phy_power_on(struct phy *phy)
212+{
213+ struct keembay_emmc_phy *priv = phy_get_drvdata(phy);
214+ int ret;
215+
216+ /* Delay chain based txclk: enable */
217+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, SEL_DLY_TXCLK_MASK,
218+ FIELD_PREP(SEL_DLY_TXCLK_MASK, 1));
219+ if (ret) {
220+ dev_err(&phy->dev, "ERROR: delay chain txclk set: %d\n", ret);
221+ return ret;
222+ }
223+
224+ /* Output tap delay: enable */
225+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, OTAP_DLY_ENA_MASK,
226+ FIELD_PREP(OTAP_DLY_ENA_MASK, 1));
227+ if (ret) {
228+ dev_err(&phy->dev, "ERROR: output tap delay set: %d\n", ret);
229+ return ret;
230+ }
231+
232+ /* Output tap delay */
233+ ret = regmap_update_bits(priv->syscfg, PHY_CFG_0, OTAP_DLY_SEL_MASK,
234+ FIELD_PREP(OTAP_DLY_SEL_MASK, 2));
235+ if (ret) {
236+ dev_err(&phy->dev, "ERROR: output tap delay select: %d\n", ret);
237+ return ret;
238+ }
239+
240+ /* Power up eMMC phy analog blocks */
241+ return keembay_emmc_phy_power(phy, true);
242+}
243+
244+static int keembay_emmc_phy_power_off(struct phy *phy)
245+{
246+ /* Power down eMMC phy analog blocks */
247+ return keembay_emmc_phy_power(phy, false);
248+}
249+
250+static const struct phy_ops ops = {
251+ .init = keembay_emmc_phy_init,
252+ .exit = keembay_emmc_phy_exit,
253+ .power_on = keembay_emmc_phy_power_on,
254+ .power_off = keembay_emmc_phy_power_off,
255+ .owner = THIS_MODULE,
256+};
257+
258+static int keembay_emmc_phy_probe(struct platform_device *pdev)
259+{
260+ struct device *dev = &pdev->dev;
261+ struct device_node *np = dev->of_node;
262+ struct keembay_emmc_phy *priv;
263+ struct phy *generic_phy;
264+ struct phy_provider *phy_provider;
265+ void __iomem *base;
266+
267+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
268+ if (!priv)
269+ return -ENOMEM;
270+
271+ base = devm_platform_ioremap_resource(pdev, 0);
272+ if (IS_ERR(base))
273+ return PTR_ERR(base);
274+
275+ priv->syscfg = devm_regmap_init_mmio(dev, base, &keembay_regmap_config);
276+ if (IS_ERR(priv->syscfg))
277+ return PTR_ERR(priv->syscfg);
278+
279+ generic_phy = devm_phy_create(dev, np, &ops);
280+ if (IS_ERR(generic_phy))
281+ return dev_err_probe(dev, PTR_ERR(generic_phy),
282+ "failed to create PHY\n");
283+
284+ phy_set_drvdata(generic_phy, priv);
285+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
286+
287+ return PTR_ERR_OR_ZERO(phy_provider);
288+}
289+
290+static const struct of_device_id keembay_emmc_phy_dt_ids[] = {
291+ { .compatible = "intel,keembay-emmc-phy" },
292+ {}
293+};
294+MODULE_DEVICE_TABLE(of, keembay_emmc_phy_dt_ids);
295+
296+static struct platform_driver keembay_emmc_phy_driver = {
297+ .probe = keembay_emmc_phy_probe,
298+ .driver = {
299+ .name = "keembay-emmc-phy",
300+ .of_match_table = keembay_emmc_phy_dt_ids,
301+ },
302+};
303+module_platform_driver(keembay_emmc_phy_driver);
304+
305+MODULE_AUTHOR("Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@intel.com>");
306+MODULE_DESCRIPTION("Intel Keem Bay eMMC PHY driver");
307+MODULE_LICENSE("GPL v2");
drivers/phy/intel/phy-intel-lgm-combo.crenamed from drivers/phy/intel/phy-intel-combo.c+0−0

File renamed without changes.

drivers/phy/intel/phy-intel-lgm-emmc.crenamed from drivers/phy/intel/phy-intel-emmc.c+0−0

File renamed without changes.

drivers/phy/lantiq/phy-lantiq-rcu-usb2.c+1−1
@@ -141,7 +141,7 @@ static int ltq_rcu_usb2_phy_power_off(struct phy *phy) · 140 unmodified lines
141141 return 0;
142142 }
143143
144−static struct phy_ops ltq_rcu_usb2_phy_ops = {
144+static const struct phy_ops ltq_rcu_usb2_phy_ops = {
145145 .init = ltq_rcu_usb2_phy_init,
146146 .power_on = ltq_rcu_usb2_phy_power_on,
147147 .power_off = ltq_rcu_usb2_phy_power_off,
drivers/phy/lantiq/phy-lantiq-vrx200-pcie.c+1−1
@@ -349,7 +349,7 @@ static int ltq_vrx200_pcie_phy_power_off(struct phy *phy) · 348 unmodified lines
349349 return 0;
350350 }
351351
352−static struct phy_ops ltq_vrx200_pcie_phy_ops = {
352+static const struct phy_ops ltq_vrx200_pcie_phy_ops = {
353353 .init = ltq_vrx200_pcie_phy_init,
354354 .exit = ltq_vrx200_pcie_phy_exit,
355355 .power_on = ltq_vrx200_pcie_phy_power_on,
drivers/phy/marvell/phy-pxa-28nm-hsic.c+20−20
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include <linux/slab.h>
1313 #include <linux/of.h>
1414 #include <linux/io.h>
15+#include <linux/iopoll.h>
1516 #include <linux/err.h>
1617 #include <linux/clk.h>
1718 #include <linux/module.h>
@@ -44,15 +45,12 @@ struct mv_hsic_phy { · 26 unmodified lines
4445 struct clk *clk;
4546 };
4647
47−static bool wait_for_reg(void __iomem *reg, u32 mask, unsigned long timeout)
48+static int wait_for_reg(void __iomem *reg, u32 mask, u32 ms)
4849 {
49− timeout += jiffies;
50− while (time_is_after_eq_jiffies(timeout)) {
51− if ((readl(reg) & mask) == mask)
52− return true;
53− msleep(1);
54− }
55− return false;
50+ u32 val;
51+
52+ return readl_poll_timeout(reg, val, ((val & mask) == mask),
53+ 1000, 1000 * ms);
5654 }
5755
5856 static int mv_hsic_phy_init(struct phy *phy)
@@ -60,6 +58,7 @@ static int mv_hsic_phy_init(struct phy *phy) · 1 unmodified line
6058 struct mv_hsic_phy *mv_phy = phy_get_drvdata(phy);
6159 struct platform_device *pdev = mv_phy->pdev;
6260 void __iomem *base = mv_phy->base;
61+ int ret;
6362
6463 clk_prepare_enable(mv_phy->clk);
6564
@@ -75,14 +74,14 @@ static int mv_hsic_phy_init(struct phy *phy) · 9 unmodified lines
7574 base + PHY_28NM_HSIC_PLL_CTRL2);
7675
7776 /* Make sure PHY PLL is locked */
78− if (!wait_for_reg(base + PHY_28NM_HSIC_PLL_CTRL2,
79− PHY_28NM_HSIC_H2S_PLL_LOCK, HZ / 10)) {
77+ ret = wait_for_reg(base + PHY_28NM_HSIC_PLL_CTRL2,
78+ PHY_28NM_HSIC_H2S_PLL_LOCK, 100);
79+ if (ret) {
8080 dev_err(&pdev->dev, "HSIC PHY PLL not locked after 100mS.");
8181 clk_disable_unprepare(mv_phy->clk);
82− return -ETIMEDOUT;
8382 }
8483
85− return 0;
84+ return ret;
8685 }
8786
8887 static int mv_hsic_phy_power_on(struct phy *phy)
@@ -91,6 +90,7 @@ static int mv_hsic_phy_power_on(struct phy *phy) · 2 unmodified lines
9190 struct platform_device *pdev = mv_phy->pdev;
9291 void __iomem *base = mv_phy->base;
9392 u32 reg;
93+ int ret;
9494
9595 reg = readl(base + PHY_28NM_HSIC_CTRL);
9696 /* Avoid SE0 state when resume for some device will take it as reset */
@@ -108,20 +108,20 @@ static int mv_hsic_phy_power_on(struct phy *phy) · 11 unmodified lines
108108 */
109109
110110 /* Make sure PHY Calibration is ready */
111− if (!wait_for_reg(base + PHY_28NM_HSIC_IMPCAL_CAL,
112− PHY_28NM_HSIC_H2S_IMPCAL_DONE, HZ / 10)) {
111+ ret = wait_for_reg(base + PHY_28NM_HSIC_IMPCAL_CAL,
112+ PHY_28NM_HSIC_H2S_IMPCAL_DONE, 100);
113+ if (ret) {
113114 dev_warn(&pdev->dev, "HSIC PHY READY not set after 100mS.");
114− return -ETIMEDOUT;
115+ return ret;
115116 }
116117
117118 /* Waiting for HSIC connect int*/
118− if (!wait_for_reg(base + PHY_28NM_HSIC_INT,
119− PHY_28NM_HSIC_CONNECT_INT, HZ / 5)) {
119+ ret = wait_for_reg(base + PHY_28NM_HSIC_INT,
120+ PHY_28NM_HSIC_CONNECT_INT, 200);
121+ if (ret)
120122 dev_warn(&pdev->dev, "HSIC wait for connect interrupt timeout.");
121− return -ETIMEDOUT;
122− }
123123
124− return 0;
124+ return ret;
125125 }
126126
127127 static int mv_hsic_phy_power_off(struct phy *phy)
drivers/phy/marvell/phy-pxa-28nm-usb2.c+15−18
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 #include <linux/of.h>
1414 #include <linux/of_device.h>
1515 #include <linux/io.h>
16+#include <linux/iopoll.h>
1617 #include <linux/err.h>
1718 #include <linux/clk.h>
1819 #include <linux/module.h>
@@ -138,15 +139,12 @@ struct mv_usb2_phy { · 119 unmodified lines
138139 struct clk *clk;
139140 };
140141
141−static bool wait_for_reg(void __iomem *reg, u32 mask, unsigned long timeout)
142+static int wait_for_reg(void __iomem *reg, u32 mask, u32 ms)
142143 {
143− timeout += jiffies;
144− while (time_is_after_eq_jiffies(timeout)) {
145− if ((readl(reg) & mask) == mask)
146− return true;
147− msleep(1);
148− }
149− return false;
144+ u32 val;
145+
146+ return readl_poll_timeout(reg, val, ((val & mask) == mask),
147+ 1000, 1000 * ms);
150148 }
151149
152150 static int mv_usb2_phy_28nm_init(struct phy *phy)
@@ -208,24 +206,23 @@ static int mv_usb2_phy_28nm_init(struct phy *phy) · 55 unmodified lines
208206 */
209207
210208 /* Make sure PHY Calibration is ready */
211− if (!wait_for_reg(base + PHY_28NM_CAL_REG,
212− PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE,
213− HZ / 10)) {
209+ ret = wait_for_reg(base + PHY_28NM_CAL_REG,
210+ PHY_28NM_PLL_PLLCAL_DONE | PHY_28NM_PLL_IMPCAL_DONE,
211+ 100);
212+ if (ret) {
214213 dev_warn(&pdev->dev, "USB PHY PLL calibrate not done after 100mS.");
215− ret = -ETIMEDOUT;
216214 goto err_clk;
217215 }
218− if (!wait_for_reg(base + PHY_28NM_RX_REG1,
219− PHY_28NM_RX_SQCAL_DONE, HZ / 10)) {
216+ ret = wait_for_reg(base + PHY_28NM_RX_REG1,
217+ PHY_28NM_RX_SQCAL_DONE, 100);
218+ if (ret) {
220219 dev_warn(&pdev->dev, "USB PHY RX SQ calibrate not done after 100mS.");
221− ret = -ETIMEDOUT;
222220 goto err_clk;
223221 }
224222 /* Make sure PHY PLL is ready */
225− if (!wait_for_reg(base + PHY_28NM_PLL_REG0,
226− PHY_28NM_PLL_READY, HZ / 10)) {
223+ ret = wait_for_reg(base + PHY_28NM_PLL_REG0, PHY_28NM_PLL_READY, 100);
224+ if (ret) {
227225 dev_warn(&pdev->dev, "PLL_READY not set after 100mS.");
228− ret = -ETIMEDOUT;
229226 goto err_clk;
230227 }
231228
drivers/phy/phy-lgm-usb.c+284−0
@@ -0,0 +1,284 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * Intel LGM USB PHY driver
4+ *
5+ * Copyright (C) 2020 Intel Corporation.
6+ */
7+
8+#include <linux/bitfield.h>
9+#include <linux/delay.h>
10+#include <linux/iopoll.h>
11+#include <linux/module.h>
12+#include <linux/of.h>
13+#include <linux/platform_device.h>
14+#include <linux/regulator/consumer.h>
15+#include <linux/reset.h>
16+#include <linux/usb/phy.h>
17+#include <linux/workqueue.h>
18+
19+#define CTRL1_OFFSET 0x14
20+#define SRAM_EXT_LD_DONE BIT(25)
21+#define SRAM_INIT_DONE BIT(26)
22+
23+#define TCPC_OFFSET 0x1014
24+#define TCPC_MUX_CTL GENMASK(1, 0)
25+#define MUX_NC 0
26+#define MUX_USB 1
27+#define MUX_DP 2
28+#define MUX_USBDP 3
29+#define TCPC_FLIPPED BIT(2)
30+#define TCPC_LOW_POWER_EN BIT(3)
31+#define TCPC_VALID BIT(4)
32+#define TCPC_CONN \
33+ (TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_USB))
34+#define TCPC_DISCONN \
35+ (TCPC_VALID | FIELD_PREP(TCPC_MUX_CTL, MUX_NC) | TCPC_LOW_POWER_EN)
36+
37+static const char *const PHY_RESETS[] = { "phy31", "phy", };
38+static const char *const CTL_RESETS[] = { "apb", "ctrl", };
39+
40+struct tca_apb {
41+ struct reset_control *resets[ARRAY_SIZE(PHY_RESETS)];
42+ struct regulator *vbus;
43+ struct work_struct wk;
44+ struct usb_phy phy;
45+
46+ bool regulator_enabled;
47+ bool phy_initialized;
48+ bool connected;
49+};
50+
51+static int get_flipped(struct tca_apb *ta, bool *flipped)
52+{
53+ union extcon_property_value property;
54+ int ret;
55+
56+ ret = extcon_get_property(ta->phy.edev, EXTCON_USB_HOST,
57+ EXTCON_PROP_USB_TYPEC_POLARITY, &property);
58+ if (ret) {
59+ dev_err(ta->phy.dev, "no polarity property from extcon\n");
60+ return ret;
61+ }
62+
63+ *flipped = property.intval;
64+
65+ return 0;
66+}
67+
68+static int phy_init(struct usb_phy *phy)
69+{
70+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
71+ void __iomem *ctrl1 = phy->io_priv + CTRL1_OFFSET;
72+ int val, ret, i;
73+
74+ if (ta->phy_initialized)
75+ return 0;
76+
77+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
78+ reset_control_deassert(ta->resets[i]);
79+
80+ ret = readl_poll_timeout(ctrl1, val, val & SRAM_INIT_DONE, 10, 10 * 1000);
81+ if (ret) {
82+ dev_err(ta->phy.dev, "SRAM init failed, 0x%x\n", val);
83+ return ret;
84+ }
85+
86+ writel(readl(ctrl1) | SRAM_EXT_LD_DONE, ctrl1);
87+
88+ ta->phy_initialized = true;
89+ if (!ta->phy.edev) {
90+ writel(TCPC_CONN, ta->phy.io_priv + TCPC_OFFSET);
91+ return phy->set_vbus(phy, true);
92+ }
93+
94+ schedule_work(&ta->wk);
95+
96+ return ret;
97+}
98+
99+static void phy_shutdown(struct usb_phy *phy)
100+{
101+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
102+ int i;
103+
104+ if (!ta->phy_initialized)
105+ return;
106+
107+ ta->phy_initialized = false;
108+ flush_work(&ta->wk);
109+ ta->phy.set_vbus(&ta->phy, false);
110+
111+ ta->connected = false;
112+ writel(TCPC_DISCONN, ta->phy.io_priv + TCPC_OFFSET);
113+
114+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
115+ reset_control_assert(ta->resets[i]);
116+}
117+
118+static int phy_set_vbus(struct usb_phy *phy, int on)
119+{
120+ struct tca_apb *ta = container_of(phy, struct tca_apb, phy);
121+ int ret;
122+
123+ if (!!on == ta->regulator_enabled)
124+ return 0;
125+
126+ if (on)
127+ ret = regulator_enable(ta->vbus);
128+ else
129+ ret = regulator_disable(ta->vbus);
130+
131+ if (!ret)
132+ ta->regulator_enabled = on;
133+
134+ dev_dbg(ta->phy.dev, "set vbus: %d\n", on);
135+ return ret;
136+}
137+
138+static void tca_work(struct work_struct *work)
139+{
140+ struct tca_apb *ta = container_of(work, struct tca_apb, wk);
141+ bool connected;
142+ bool flipped = false;
143+ u32 val;
144+ int ret;
145+
146+ ret = get_flipped(ta, &flipped);
147+ if (ret)
148+ return;
149+
150+ connected = extcon_get_state(ta->phy.edev, EXTCON_USB_HOST);
151+ if (connected == ta->connected)
152+ return;
153+
154+ ta->connected = connected;
155+ if (connected) {
156+ val = TCPC_CONN;
157+ if (flipped)
158+ val |= TCPC_FLIPPED;
159+ dev_dbg(ta->phy.dev, "connected%s\n", flipped ? " flipped" : "");
160+ } else {
161+ val = TCPC_DISCONN;
162+ dev_dbg(ta->phy.dev, "disconnected\n");
163+ }
164+
165+ writel(val, ta->phy.io_priv + TCPC_OFFSET);
166+
167+ ret = ta->phy.set_vbus(&ta->phy, connected);
168+ if (ret)
169+ dev_err(ta->phy.dev, "failed to set VBUS\n");
170+}
171+
172+static int id_notifier(struct notifier_block *nb, unsigned long event, void *ptr)
173+{
174+ struct tca_apb *ta = container_of(nb, struct tca_apb, phy.id_nb);
175+
176+ if (ta->phy_initialized)
177+ schedule_work(&ta->wk);
178+
179+ return NOTIFY_DONE;
180+}
181+
182+static int vbus_notifier(struct notifier_block *nb, unsigned long evnt, void *ptr)
183+{
184+ return NOTIFY_DONE;
185+}
186+
187+static int phy_probe(struct platform_device *pdev)
188+{
189+ struct reset_control *resets[ARRAY_SIZE(CTL_RESETS)];
190+ struct device *dev = &pdev->dev;
191+ struct usb_phy *phy;
192+ struct tca_apb *ta;
193+ int i;
194+
195+ ta = devm_kzalloc(dev, sizeof(*ta), GFP_KERNEL);
196+ if (!ta)
197+ return -ENOMEM;
198+
199+ platform_set_drvdata(pdev, ta);
200+ INIT_WORK(&ta->wk, tca_work);
201+
202+ phy = &ta->phy;
203+ phy->dev = dev;
204+ phy->label = dev_name(dev);
205+ phy->type = USB_PHY_TYPE_USB3;
206+ phy->init = phy_init;
207+ phy->shutdown = phy_shutdown;
208+ phy->set_vbus = phy_set_vbus;
209+ phy->id_nb.notifier_call = id_notifier;
210+ phy->vbus_nb.notifier_call = vbus_notifier;
211+
212+ phy->io_priv = devm_platform_ioremap_resource(pdev, 0);
213+ if (IS_ERR(phy->io_priv))
214+ return PTR_ERR(phy->io_priv);
215+
216+ ta->vbus = devm_regulator_get(dev, "vbus");
217+ if (IS_ERR(ta->vbus))
218+ return PTR_ERR(ta->vbus);
219+
220+ for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++) {
221+ resets[i] = devm_reset_control_get_exclusive(dev, CTL_RESETS[i]);
222+ if (IS_ERR(resets[i])) {
223+ dev_err(dev, "%s reset not found\n", CTL_RESETS[i]);
224+ return PTR_ERR(resets[i]);
225+ }
226+ }
227+
228+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++) {
229+ ta->resets[i] = devm_reset_control_get_exclusive(dev, PHY_RESETS[i]);
230+ if (IS_ERR(ta->resets[i])) {
231+ dev_err(dev, "%s reset not found\n", PHY_RESETS[i]);
232+ return PTR_ERR(ta->resets[i]);
233+ }
234+ }
235+
236+ for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
237+ reset_control_assert(resets[i]);
238+
239+ for (i = 0; i < ARRAY_SIZE(PHY_RESETS); i++)
240+ reset_control_assert(ta->resets[i]);
241+ /*
242+ * Out-of-band reset of the controller after PHY reset will cause
243+ * controller malfunctioning, so we should use in-band controller
244+ * reset only and leave the controller de-asserted here.
245+ */
246+ for (i = 0; i < ARRAY_SIZE(CTL_RESETS); i++)
247+ reset_control_deassert(resets[i]);
248+
249+ /* Need to wait at least 20us after de-assert the controller */
250+ usleep_range(20, 100);
251+
252+ return usb_add_phy_dev(phy);
253+}
254+
255+static int phy_remove(struct platform_device *pdev)
256+{
257+ struct tca_apb *ta = platform_get_drvdata(pdev);
258+
259+ usb_remove_phy(&ta->phy);
260+
261+ return 0;
262+}
263+
264+static const struct of_device_id intel_usb_phy_dt_ids[] = {
265+ { .compatible = "intel,lgm-usb-phy" },
266+ { }
267+};
268+MODULE_DEVICE_TABLE(of, intel_usb_phy_dt_ids);
269+
270+static struct platform_driver lgm_phy_driver = {
271+ .driver = {
272+ .name = "lgm-usb-phy",
273+ .of_match_table = intel_usb_phy_dt_ids,
274+ },
275+ .probe = phy_probe,
276+ .remove = phy_remove,
277+};
278+
279+module_platform_driver(lgm_phy_driver);
280+
281+MODULE_DESCRIPTION("Intel LGM USB PHY driver");
282+MODULE_AUTHOR("Li Yin <yin1.li@intel.com>");
283+MODULE_AUTHOR("Vadivel Murugan R <vadivel.muruganx.ramuthevar@linux.intel.com>");
284+MODULE_LICENSE("GPL v2");
drivers/phy/qualcomm/phy-qcom-apq8064-sata.c+8−13
@@ -4,6 +4,7 @@ · 3 unmodified lines
44 */
55
66 #include <linux/io.h>
7+#include <linux/iopoll.h>
78 #include <linux/kernel.h>
89 #include <linux/module.h>
910 #include <linux/of.h>
@@ -72,18 +73,12 @@ struct qcom_apq8064_sata_phy { · 62 unmodified lines
7273 };
7374
7475 /* Helper function to do poll and timeout */
75−static int read_poll_timeout(void __iomem *addr, u32 mask)
76+static int poll_timeout(void __iomem *addr, u32 mask)
7677 {
77− unsigned long timeout = jiffies + msecs_to_jiffies(TIMEOUT_MS);
78+ u32 val;
7879
79− do {
80− if (readl_relaxed(addr) & mask)
81− return 0;
82−
83− usleep_range(DELAY_INTERVAL_US, DELAY_INTERVAL_US + 50);
84− } while (!time_after(jiffies, timeout));
85−
86− return (readl_relaxed(addr) & mask) ? 0 : -ETIMEDOUT;
80+ return readl_relaxed_poll_timeout(addr, val, (val & mask),
81+ DELAY_INTERVAL_US, TIMEOUT_MS * 1000);
8782 }
8883
8984 static int qcom_apq8064_sata_phy_init(struct phy *generic_phy)
@@ -137,21 +132,21 @@ static int qcom_apq8064_sata_phy_init(struct phy *generic_phy) · 47 unmodified lines
137132 writel_relaxed(0x05, base + UNIPHY_PLL_LKDET_CFG2);
138133
139134 /* PLL Lock wait */
140− ret = read_poll_timeout(base + UNIPHY_PLL_STATUS, UNIPHY_PLL_LOCK);
135+ ret = poll_timeout(base + UNIPHY_PLL_STATUS, UNIPHY_PLL_LOCK);
141136 if (ret) {
142137 dev_err(phy->dev, "poll timeout UNIPHY_PLL_STATUS\n");
143138 return ret;
144139 }
145140
146141 /* TX Calibration */
147− ret = read_poll_timeout(base + SATA_PHY_TX_IMCAL_STAT, SATA_PHY_TX_CAL);
142+ ret = poll_timeout(base + SATA_PHY_TX_IMCAL_STAT, SATA_PHY_TX_CAL);
148143 if (ret) {
149144 dev_err(phy->dev, "poll timeout SATA_PHY_TX_IMCAL_STAT\n");
150145 return ret;
151146 }
152147
153148 /* RX Calibration */
154− ret = read_poll_timeout(base + SATA_PHY_RX_IMCAL_STAT, SATA_PHY_RX_CAL);
149+ ret = poll_timeout(base + SATA_PHY_RX_IMCAL_STAT, SATA_PHY_RX_CAL);
155150 if (ret) {
156151 dev_err(phy->dev, "poll timeout SATA_PHY_RX_IMCAL_STAT\n");
157152 return ret;
drivers/phy/qualcomm/phy-qcom-ipq4019-usb.c+2−2
@@ -48,7 +48,7 @@ static int ipq4019_ss_phy_power_on(struct phy *_phy) · 47 unmodified lines
4848 return 0;
4949 }
5050
51−static struct phy_ops ipq4019_usb_ss_phy_ops = {
51+static const struct phy_ops ipq4019_usb_ss_phy_ops = {
5252 .power_on = ipq4019_ss_phy_power_on,
5353 .power_off = ipq4019_ss_phy_power_off,
5454 };
@@ -80,7 +80,7 @@ static int ipq4019_hs_phy_power_on(struct phy *_phy) · 25 unmodified lines
8080 return 0;
8181 }
8282
83−static struct phy_ops ipq4019_usb_hs_phy_ops = {
83+static const struct phy_ops ipq4019_usb_hs_phy_ops = {
8484 .power_on = ipq4019_hs_phy_power_on,
8585 .power_off = ipq4019_hs_phy_power_off,
8686 };
drivers/phy/qualcomm/phy-qcom-qmp.c+883−170
@@ -946,6 +946,88 @@ static const struct qmp_phy_init_tbl qmp_v3_usb3_tx_tbl[] = { · 945 unmodified lines
946946 QMP_PHY_INIT_CFG(QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX, 0x06),
947947 };
948948
949+static const struct qmp_phy_init_tbl qmp_v3_dp_serdes_tbl[] = {
950+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_SVS_MODE_CLK_SEL, 0x01),
951+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYSCLK_EN_SEL, 0x37),
952+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYS_CLK_CTRL, 0x02),
953+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_ENABLE1, 0x0e),
954+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_SYSCLK_BUF_ENABLE, 0x06),
955+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30),
956+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CMN_CONFIG, 0x02),
957+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START1_MODE0, 0x00),
958+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0, 0x3f),
959+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0, 0x00),
960+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_VCO_TUNE_MAP, 0x00),
961+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP3_MODE0, 0x00),
962+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_BG_TIMER, 0x0a),
963+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CORECLK_DIV_MODE0, 0x0a),
964+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_VCO_TUNE_CTRL, 0x00),
965+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x3f),
966+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CORE_CLK_EN, 0x1f),
967+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_IVCO, 0x07),
968+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_CCTRL_MODE0, 0x36),
969+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_PLL_RCTRL_MODE0, 0x16),
970+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_CP_CTRL_MODE0, 0x06),
971+};
972+
973+static const struct qmp_phy_init_tbl qmp_v3_dp_serdes_tbl_rbr[] = {
974+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_HSCLK_SEL, 0x0c),
975+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DEC_START_MODE0, 0x69),
976+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START2_MODE0, 0x80),
977+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START3_MODE0, 0x07),
978+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP1_MODE0, 0x6f),
979+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP2_MODE0, 0x08),
980+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_EN, 0x00),
981+};
982+
983+static const struct qmp_phy_init_tbl qmp_v3_dp_serdes_tbl_hbr[] = {
984+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_HSCLK_SEL, 0x04),
985+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DEC_START_MODE0, 0x69),
986+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START2_MODE0, 0x80),
987+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START3_MODE0, 0x07),
988+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP1_MODE0, 0x0f),
989+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP2_MODE0, 0x0e),
990+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_EN, 0x00),
991+};
992+
993+static const struct qmp_phy_init_tbl qmp_v3_dp_serdes_tbl_hbr2[] = {
994+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_HSCLK_SEL, 0x00),
995+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DEC_START_MODE0, 0x8c),
996+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START2_MODE0, 0x00),
997+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START3_MODE0, 0x0a),
998+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP1_MODE0, 0x1f),
999+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP2_MODE0, 0x1c),
1000+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_EN, 0x00),
1001+};
1002+
1003+static const struct qmp_phy_init_tbl qmp_v3_dp_serdes_tbl_hbr3[] = {
1004+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_HSCLK_SEL, 0x03),
1005+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DEC_START_MODE0, 0x69),
1006+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START2_MODE0, 0x80),
1007+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_DIV_FRAC_START3_MODE0, 0x07),
1008+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP1_MODE0, 0x2f),
1009+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP2_MODE0, 0x2a),
1010+ QMP_PHY_INIT_CFG(QSERDES_V3_COM_LOCK_CMP_EN, 0x08),
1011+};
1012+
1013+static const struct qmp_phy_init_tbl qmp_v3_dp_tx_tbl[] = {
1014+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TRANSCEIVER_BIAS_EN, 0x1a),
1015+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_VMODE_CTRL1, 0x40),
1016+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN, 0x30),
1017+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_INTERFACE_SELECT, 0x3d),
1018+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_CLKBUF_ENABLE, 0x0f),
1019+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_RESET_TSYNC_EN, 0x03),
1020+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TRAN_DRVR_EMP_EN, 0x03),
1021+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_PARRATE_REC_DETECT_IDLE_EN, 0x00),
1022+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TX_INTERFACE_MODE, 0x00),
1023+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TX_BAND, 0x4),
1024+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TX_POL_INV, 0x0a),
1025+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TX_DRV_LVL, 0x38),
1026+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_TX_EMP_POST1_LVL, 0x20),
1027+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX, 0x06),
1028+ QMP_PHY_INIT_CFG(QSERDES_V3_TX_RES_CODE_LANE_OFFSET_RX, 0x07),
1029+};
1030+
9491031 static const struct qmp_phy_init_tbl qmp_v3_usb3_rx_tbl[] = {
9501032 QMP_PHY_INIT_CFG(QSERDES_V3_RX_UCDR_FASTLOCK_FO_GAIN, 0x0b),
9511033 QMP_PHY_INIT_CFG(QSERDES_V3_RX_RX_EQU_ADAPTOR_CNTRL2, 0x0f),
@@ -1761,6 +1843,16 @@ struct qmp_phy_cfg { · 809 unmodified lines
17611843 const struct qmp_phy_init_tbl *pcs_misc_tbl;
17621844 int pcs_misc_tbl_num;
17631845
1846+ /* Init sequence for DP PHY block link rates */
1847+ const struct qmp_phy_init_tbl *serdes_tbl_rbr;
1848+ int serdes_tbl_rbr_num;
1849+ const struct qmp_phy_init_tbl *serdes_tbl_hbr;
1850+ int serdes_tbl_hbr_num;
1851+ const struct qmp_phy_init_tbl *serdes_tbl_hbr2;
1852+ int serdes_tbl_hbr2_num;
1853+ const struct qmp_phy_init_tbl *serdes_tbl_hbr3;
1854+ int serdes_tbl_hbr3_num;
1855+
17641856 /* clock ids to be requested */
17651857 const char * const *clk_list;
17661858 int num_clks;
@@ -1797,10 +1889,17 @@ struct qmp_phy_cfg { · 30 unmodified lines
17971889 bool no_pcs_sw_reset;
17981890 };
17991891
1892+struct qmp_phy_combo_cfg {
1893+ const struct qmp_phy_cfg *usb_cfg;
1894+ const struct qmp_phy_cfg *dp_cfg;
1895+};
1896+
18001897 /**
18011898 * struct qmp_phy - per-lane phy descriptor
18021899 *
18031900 * @phy: generic phy
1901+ * @cfg: phy specific configuration
1902+ * @serdes: iomapped memory space for phy's serdes (i.e. PLL)
18041903 * @tx: iomapped memory space for lane's tx
18051904 * @rx: iomapped memory space for lane's rx
18061905 * @pcs: iomapped memory space for lane's pcs
@@ -1811,9 +1910,12 @@ struct qmp_phy_cfg { · 4 unmodified lines
18111910 * @index: lane index
18121911 * @qmp: QMP phy to which this lane belongs
18131912 * @lane_rst: lane's reset controller
1913+ * @mode: current PHY mode
18141914 */
18151915 struct qmp_phy {
18161916 struct phy *phy;
1917+ const struct qmp_phy_cfg *cfg;
1918+ void __iomem *serdes;
18171919 void __iomem *tx;
18181920 void __iomem *rx;
18191921 void __iomem *pcs;
@@ -1824,43 +1926,45 @@ struct qmp_phy { · 4 unmodified lines
18241926 unsigned int index;
18251927 struct qcom_qmp *qmp;
18261928 struct reset_control *lane_rst;
1929+ enum phy_mode mode;
1930+ unsigned int dp_aux_cfg;
1931+ struct phy_configure_opts_dp dp_opts;
1932+ struct qmp_phy_dp_clks *dp_clks;
1933+};
1934+
1935+struct qmp_phy_dp_clks {
1936+ struct qmp_phy *qphy;
1937+ struct clk_hw dp_link_hw;
1938+ struct clk_hw dp_pixel_hw;
18271939 };
18281940
18291941 /**
18301942 * struct qcom_qmp - structure holding QMP phy block attributes
18311943 *
18321944 * @dev: device
1833− * @serdes: iomapped memory space for phy's serdes
18341945 * @dp_com: iomapped memory space for phy's dp_com control block
18351946 *
18361947 * @clks: array of clocks required by phy
18371948 * @resets: array of resets required by phy
18381949 * @vregs: regulator supplies bulk data
18391950 *
1840− * @cfg: phy specific configuration
18411951 * @phys: array of per-lane phy descriptors
18421952 * @phy_mutex: mutex lock for PHY common block initialization
18431953 * @init_count: phy common block initialization count
1844− * @phy_initialized: indicate if PHY has been initialized
1845− * @mode: current PHY mode
18461954 * @ufs_reset: optional UFS PHY reset handle
18471955 */
18481956 struct qcom_qmp {
18491957 struct device *dev;
1850− void __iomem *serdes;
18511958 void __iomem *dp_com;
18521959
18531960 struct clk_bulk_data *clks;
18541961 struct reset_control **resets;
18551962 struct regulator_bulk_data *vregs;
18561963
1857− const struct qmp_phy_cfg *cfg;
18581964 struct qmp_phy **phys;
18591965
18601966 struct mutex phy_mutex;
18611967 int init_count;
1862− bool phy_initialized;
1863− enum phy_mode mode;
18641968
18651969 struct reset_control *ufs_reset;
18661970 };
@@ -2203,6 +2307,41 @@ static const struct qmp_phy_cfg sc7180_usb3phy_cfg = { · 336 unmodified lines
22032307 .is_dual_lane_phy = true,
22042308 };
22052309
2310+static const struct qmp_phy_cfg sc7180_dpphy_cfg = {
2311+ .type = PHY_TYPE_DP,
2312+ .nlanes = 1,
2313+
2314+ .serdes_tbl = qmp_v3_dp_serdes_tbl,
2315+ .serdes_tbl_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl),
2316+ .tx_tbl = qmp_v3_dp_tx_tbl,
2317+ .tx_tbl_num = ARRAY_SIZE(qmp_v3_dp_tx_tbl),
2318+
2319+ .serdes_tbl_rbr = qmp_v3_dp_serdes_tbl_rbr,
2320+ .serdes_tbl_rbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_rbr),
2321+ .serdes_tbl_hbr = qmp_v3_dp_serdes_tbl_hbr,
2322+ .serdes_tbl_hbr_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr),
2323+ .serdes_tbl_hbr2 = qmp_v3_dp_serdes_tbl_hbr2,
2324+ .serdes_tbl_hbr2_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr2),
2325+ .serdes_tbl_hbr3 = qmp_v3_dp_serdes_tbl_hbr3,
2326+ .serdes_tbl_hbr3_num = ARRAY_SIZE(qmp_v3_dp_serdes_tbl_hbr3),
2327+
2328+ .clk_list = qmp_v3_phy_clk_l,
2329+ .num_clks = ARRAY_SIZE(qmp_v3_phy_clk_l),
2330+ .reset_list = sc7180_usb3phy_reset_l,
2331+ .num_resets = ARRAY_SIZE(sc7180_usb3phy_reset_l),
2332+ .vreg_list = qmp_phy_vreg_l,
2333+ .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
2334+ .regs = qmp_v3_usb3phy_regs_layout,
2335+
2336+ .has_phy_dp_com_ctrl = true,
2337+ .is_dual_lane_phy = true,
2338+};
2339+
2340+static const struct qmp_phy_combo_cfg sc7180_usb3dpphy_cfg = {
2341+ .usb_cfg = &sc7180_usb3phy_cfg,
2342+ .dp_cfg = &sc7180_dpphy_cfg,
2343+};
2344+
22062345 static const struct qmp_phy_cfg qmp_v3_usb3_uniphy_cfg = {
22072346 .type = PHY_TYPE_USB3,
22082347 .nlanes = 1,
@@ -2479,11 +2618,300 @@ static void qcom_qmp_phy_configure(void __iomem *base, · 270 unmodified lines
24792618 qcom_qmp_phy_configure_lane(base, regs, tbl, num, 0xff);
24802619 }
24812620
2621+static int qcom_qmp_phy_serdes_init(struct qmp_phy *qphy)
2622+{
2623+ struct qcom_qmp *qmp = qphy->qmp;
2624+ const struct qmp_phy_cfg *cfg = qphy->cfg;
2625+ void __iomem *serdes = qphy->serdes;
2626+ const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts;
2627+ const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl;
2628+ int serdes_tbl_num = cfg->serdes_tbl_num;
2629+ int ret;
2630+
2631+ qcom_qmp_phy_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num);
2632+
2633+ if (cfg->type == PHY_TYPE_DP) {
2634+ switch (dp_opts->link_rate) {
2635+ case 1620:
2636+ qcom_qmp_phy_configure(serdes, cfg->regs,
2637+ cfg->serdes_tbl_rbr,
2638+ cfg->serdes_tbl_rbr_num);
2639+ break;
2640+ case 2700:
2641+ qcom_qmp_phy_configure(serdes, cfg->regs,
2642+ cfg->serdes_tbl_hbr,
2643+ cfg->serdes_tbl_hbr_num);
2644+ break;
2645+ case 5400:
2646+ qcom_qmp_phy_configure(serdes, cfg->regs,
2647+ cfg->serdes_tbl_hbr2,
2648+ cfg->serdes_tbl_hbr2_num);
2649+ break;
2650+ case 8100:
2651+ qcom_qmp_phy_configure(serdes, cfg->regs,
2652+ cfg->serdes_tbl_hbr3,
2653+ cfg->serdes_tbl_hbr3_num);
2654+ break;
2655+ default:
2656+ /* Other link rates aren't supported */
2657+ return -EINVAL;
2658+ }
2659+ }
2660+
2661+
2662+ if (cfg->has_phy_com_ctrl) {
2663+ void __iomem *status;
2664+ unsigned int mask, val;
2665+
2666+ qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET);
2667+ qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
2668+ SERDES_START | PCS_START);
2669+
2670+ status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
2671+ mask = cfg->mask_com_pcs_ready;
2672+
2673+ ret = readl_poll_timeout(status, val, (val & mask), 10,
2674+ PHY_INIT_COMPLETE_TIMEOUT);
2675+ if (ret) {
2676+ dev_err(qmp->dev,
2677+ "phy common block init timed-out\n");
2678+ return ret;
2679+ }
2680+ }
2681+
2682+ return 0;
2683+}
2684+
2685+static void qcom_qmp_phy_dp_aux_init(struct qmp_phy *qphy)
2686+{
2687+ writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
2688+ DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN,
2689+ qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL);
2690+
2691+ /* Turn on BIAS current for PHY/PLL */
2692+ writel(QSERDES_V3_COM_BIAS_EN | QSERDES_V3_COM_BIAS_EN_MUX |
2693+ QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL,
2694+ qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
2695+
2696+ writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL);
2697+
2698+ writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
2699+ DP_PHY_PD_CTL_LANE_0_1_PWRDN |
2700+ DP_PHY_PD_CTL_LANE_2_3_PWRDN | DP_PHY_PD_CTL_PLL_PWRDN |
2701+ DP_PHY_PD_CTL_DP_CLAMP_EN,
2702+ qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL);
2703+
2704+ writel(QSERDES_V3_COM_BIAS_EN |
2705+ QSERDES_V3_COM_BIAS_EN_MUX | QSERDES_V3_COM_CLKBUF_R_EN |
2706+ QSERDES_V3_COM_CLKBUF_L_EN | QSERDES_V3_COM_EN_SYSCLK_TX_SEL |
2707+ QSERDES_V3_COM_CLKBUF_RX_DRIVE_L,
2708+ qphy->serdes + QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN);
2709+
2710+ writel(0x00, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG0);
2711+ writel(0x13, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG1);
2712+ writel(0x24, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG2);
2713+ writel(0x00, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG3);
2714+ writel(0x0a, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG4);
2715+ writel(0x26, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG5);
2716+ writel(0x0a, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG6);
2717+ writel(0x03, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG7);
2718+ writel(0xbb, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG8);
2719+ writel(0x03, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG9);
2720+ qphy->dp_aux_cfg = 0;
2721+
2722+ writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK |
2723+ PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK |
2724+ PHY_AUX_REQ_ERR_MASK,
2725+ qphy->pcs + QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK);
2726+}
2727+
2728+static const u8 qmp_dp_v3_pre_emphasis_hbr_rbr[4][4] = {
2729+ { 0x00, 0x0c, 0x14, 0x19 },
2730+ { 0x00, 0x0b, 0x12, 0xff },
2731+ { 0x00, 0x0b, 0xff, 0xff },
2732+ { 0x04, 0xff, 0xff, 0xff }
2733+};
2734+
2735+static const u8 qmp_dp_v3_voltage_swing_hbr_rbr[4][4] = {
2736+ { 0x08, 0x0f, 0x16, 0x1f },
2737+ { 0x11, 0x1e, 0x1f, 0xff },
2738+ { 0x19, 0x1f, 0xff, 0xff },
2739+ { 0x1f, 0xff, 0xff, 0xff }
2740+};
2741+
2742+static void qcom_qmp_phy_configure_dp_tx(struct qmp_phy *qphy)
2743+{
2744+ const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts;
2745+ unsigned int v_level = 0, p_level = 0;
2746+ u32 bias_en, drvr_en;
2747+ u8 voltage_swing_cfg, pre_emphasis_cfg;
2748+ int i;
2749+
2750+ for (i = 0; i < dp_opts->lanes; i++) {
2751+ v_level = max(v_level, dp_opts->voltage[i]);
2752+ p_level = max(p_level, dp_opts->pre[i]);
2753+ }
2754+
2755+ if (dp_opts->lanes == 1) {
2756+ bias_en = 0x3e;
2757+ drvr_en = 0x13;
2758+ } else {
2759+ bias_en = 0x3f;
2760+ drvr_en = 0x10;
2761+ }
2762+
2763+ voltage_swing_cfg = qmp_dp_v3_voltage_swing_hbr_rbr[v_level][p_level];
2764+ pre_emphasis_cfg = qmp_dp_v3_pre_emphasis_hbr_rbr[v_level][p_level];
2765+
2766+ /* TODO: Move check to config check */
2767+ if (voltage_swing_cfg == 0xFF && pre_emphasis_cfg == 0xFF)
2768+ return;
2769+
2770+ /* Enable MUX to use Cursor values from these registers */
2771+ voltage_swing_cfg |= DP_PHY_TXn_TX_DRV_LVL_MUX_EN;
2772+ pre_emphasis_cfg |= DP_PHY_TXn_TX_EMP_POST1_LVL_MUX_EN;
2773+
2774+ writel(voltage_swing_cfg, qphy->tx + QSERDES_V3_TX_TX_DRV_LVL);
2775+ writel(pre_emphasis_cfg, qphy->tx + QSERDES_V3_TX_TX_EMP_POST1_LVL);
2776+ writel(voltage_swing_cfg, qphy->tx2 + QSERDES_V3_TX_TX_DRV_LVL);
2777+ writel(pre_emphasis_cfg, qphy->tx2 + QSERDES_V3_TX_TX_EMP_POST1_LVL);
2778+
2779+ writel(drvr_en, qphy->tx + QSERDES_V3_TX_HIGHZ_DRVR_EN);
2780+ writel(bias_en, qphy->tx + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN);
2781+ writel(drvr_en, qphy->tx2 + QSERDES_V3_TX_HIGHZ_DRVR_EN);
2782+ writel(bias_en, qphy->tx2 + QSERDES_V3_TX_TRANSCEIVER_BIAS_EN);
2783+}
2784+
2785+static int qcom_qmp_dp_phy_configure(struct phy *phy, union phy_configure_opts *opts)
2786+{
2787+ const struct phy_configure_opts_dp *dp_opts = &opts->dp;
2788+ struct qmp_phy *qphy = phy_get_drvdata(phy);
2789+
2790+ memcpy(&qphy->dp_opts, dp_opts, sizeof(*dp_opts));
2791+ if (qphy->dp_opts.set_voltages) {
2792+ qcom_qmp_phy_configure_dp_tx(qphy);
2793+ qphy->dp_opts.set_voltages = 0;
2794+ }
2795+
2796+ return 0;
2797+}
2798+
2799+static int qcom_qmp_phy_configure_dp_phy(struct qmp_phy *qphy)
2800+{
2801+ const struct qmp_phy_dp_clks *dp_clks = qphy->dp_clks;
2802+ const struct phy_configure_opts_dp *dp_opts = &qphy->dp_opts;
2803+ u32 val, phy_vco_div, status;
2804+ unsigned long pixel_freq;
2805+
2806+ val = DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN |
2807+ DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN;
2808+
2809+ /*
2810+ * TODO: Assume orientation is CC1 for now and two lanes, need to
2811+ * use type-c connector to understand orientation and lanes.
2812+ *
2813+ * Otherwise val changes to be like below if this code understood
2814+ * the orientation of the type-c cable.
2815+ *
2816+ * if (lane_cnt == 4 || orientation == ORIENTATION_CC2)
2817+ * val |= DP_PHY_PD_CTL_LANE_0_1_PWRDN;
2818+ * if (lane_cnt == 4 || orientation == ORIENTATION_CC1)
2819+ * val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN;
2820+ * if (orientation == ORIENTATION_CC2)
2821+ * writel(0x4c, qphy->pcs + QSERDES_V3_DP_PHY_MODE);
2822+ */
2823+ val |= DP_PHY_PD_CTL_LANE_2_3_PWRDN;
2824+ writel(val, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL);
2825+
2826+ writel(0x5c, qphy->pcs + QSERDES_V3_DP_PHY_MODE);
2827+ writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL);
2828+ writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL);
2829+
2830+ switch (dp_opts->link_rate) {
2831+ case 1620:
2832+ phy_vco_div = 0x1;
2833+ pixel_freq = 1620000000UL / 2;
2834+ break;
2835+ case 2700:
2836+ phy_vco_div = 0x1;
2837+ pixel_freq = 2700000000UL / 2;
2838+ break;
2839+ case 5400:
2840+ phy_vco_div = 0x2;
2841+ pixel_freq = 5400000000UL / 4;
2842+ break;
2843+ case 8100:
2844+ phy_vco_div = 0x0;
2845+ pixel_freq = 8100000000UL / 6;
2846+ break;
2847+ default:
2848+ /* Other link rates aren't supported */
2849+ return -EINVAL;
2850+ }
2851+ writel(phy_vco_div, qphy->pcs + QSERDES_V3_DP_PHY_VCO_DIV);
2852+
2853+ clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000);
2854+ clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq);
2855+
2856+ writel(0x04, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG2);
2857+ writel(0x01, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2858+ writel(0x05, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2859+ writel(0x01, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2860+ writel(0x09, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2861+
2862+ writel(0x20, qphy->serdes + QSERDES_V3_COM_RESETSM_CNTRL);
2863+
2864+ if (readl_poll_timeout(qphy->serdes + QSERDES_V3_COM_C_READY_STATUS,
2865+ status,
2866+ ((status & BIT(0)) > 0),
2867+ 500,
2868+ 10000))
2869+ return -ETIMEDOUT;
2870+
2871+ writel(0x19, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2872+
2873+ if (readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS,
2874+ status,
2875+ ((status & BIT(1)) > 0),
2876+ 500,
2877+ 10000))
2878+ return -ETIMEDOUT;
2879+
2880+ writel(0x18, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2881+ udelay(2000);
2882+ writel(0x19, qphy->pcs + QSERDES_V3_DP_PHY_CFG);
2883+
2884+ return readl_poll_timeout(qphy->pcs + QSERDES_V3_DP_PHY_STATUS,
2885+ status,
2886+ ((status & BIT(1)) > 0),
2887+ 500,
2888+ 10000);
2889+}
2890+
2891+/*
2892+ * We need to calibrate the aux setting here as many times
2893+ * as the caller tries
2894+ */
2895+static int qcom_qmp_dp_phy_calibrate(struct phy *phy)
2896+{
2897+ struct qmp_phy *qphy = phy_get_drvdata(phy);
2898+ const u8 cfg1_settings[] = { 0x13, 0x23, 0x1d };
2899+ u8 val;
2900+
2901+ qphy->dp_aux_cfg++;
2902+ qphy->dp_aux_cfg %= ARRAY_SIZE(cfg1_settings);
2903+ val = cfg1_settings[qphy->dp_aux_cfg];
2904+
2905+ writel(val, qphy->pcs + QSERDES_V3_DP_PHY_AUX_CFG1);
2906+
2907+ return 0;
2908+}
2909+
24822910 static int qcom_qmp_phy_com_init(struct qmp_phy *qphy)
24832911 {
24842912 struct qcom_qmp *qmp = qphy->qmp;
2485− const struct qmp_phy_cfg *cfg = qmp->cfg;
2486− void __iomem *serdes = qmp->serdes;
2913+ const struct qmp_phy_cfg *cfg = qphy->cfg;
2914+ void __iomem *serdes = qphy->serdes;
24872915 void __iomem *pcs = qphy->pcs;
24882916 void __iomem *dp_com = qmp->dp_com;
24892917 int ret, i;
@@ -2514,7 +2942,7 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) · 24 unmodified lines
25142942 ret = reset_control_deassert(qmp->resets[i]);
25152943 if (ret) {
25162944 dev_err(qmp->dev, "%s reset deassert failed\n",
2517− qmp->cfg->reset_list[i]);
2945+ qphy->cfg->reset_list[i]);
25182946 goto err_rst;
25192947 }
25202948 }
@@ -2533,6 +2961,9 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) · 12 unmodified lines
25332961 SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
25342962 SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
25352963
2964+ /* Default type-c orientation, i.e CC1 */
2965+ qphy_setbits(dp_com, QPHY_V3_DP_COM_TYPEC_CTRL, 0x02);
2966+
25362967 qphy_setbits(dp_com, QPHY_V3_DP_COM_PHY_MODE_CTRL,
25372968 USB3_MODE | DP_MODE);
25382969
@@ -2540,6 +2971,9 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) · 1 unmodified line
25402971 qphy_clrbits(dp_com, QPHY_V3_DP_COM_RESET_OVRD_CTRL,
25412972 SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
25422973 SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET);
2974+
2975+ qphy_clrbits(dp_com, QPHY_V3_DP_COM_SWI_CTRL, 0x03);
2976+ qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
25432977 }
25442978
25452979 if (cfg->has_phy_com_ctrl) {
@@ -2555,36 +2989,10 @@ static int qcom_qmp_phy_com_init(struct qmp_phy *qphy) · 9 unmodified lines
25552989 cfg->pwrdn_ctrl);
25562990 }
25572991
2558− /* Serdes configuration */
2559− qcom_qmp_phy_configure(serdes, cfg->regs, cfg->serdes_tbl,
2560− cfg->serdes_tbl_num);
2561−
2562− if (cfg->has_phy_com_ctrl) {
2563− void __iomem *status;
2564− unsigned int mask, val;
2565−
2566− qphy_clrbits(serdes, cfg->regs[QPHY_COM_SW_RESET], SW_RESET);
2567− qphy_setbits(serdes, cfg->regs[QPHY_COM_START_CONTROL],
2568− SERDES_START | PCS_START);
2569−
2570− status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS];
2571− mask = cfg->mask_com_pcs_ready;
2572−
2573− ret = readl_poll_timeout(status, val, (val & mask), 10,
2574− PHY_INIT_COMPLETE_TIMEOUT);
2575− if (ret) {
2576− dev_err(qmp->dev,
2577− "phy common block init timed-out\n");
2578− goto err_com_init;
2579− }
2580− }
2581−
25822992 mutex_unlock(&qmp->phy_mutex);
25832993
25842994 return 0;
25852995
2586−err_com_init:
2587− clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks);
25882996 err_rst:
25892997 while (++i < cfg->num_resets)
25902998 reset_control_assert(qmp->resets[i]);
@@ -2596,10 +3004,11 @@ err_reg_enable: · 5 unmodified lines
25963004 return ret;
25973005 }
25983006
2599−static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp)
3007+static int qcom_qmp_phy_com_exit(struct qmp_phy *qphy)
26003008 {
2601− const struct qmp_phy_cfg *cfg = qmp->cfg;
2602− void __iomem *serdes = qmp->serdes;
3009+ struct qcom_qmp *qmp = qphy->qmp;
3010+ const struct qmp_phy_cfg *cfg = qphy->cfg;
3011+ void __iomem *serdes = qphy->serdes;
26033012 int i = cfg->num_resets;
26043013
26053014 mutex_lock(&qmp->phy_mutex);
@@ -2630,20 +3039,12 @@ static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp) · 24 unmodified lines
26303039 return 0;
26313040 }
26323041
2633−static int qcom_qmp_phy_enable(struct phy *phy)
3042+static int qcom_qmp_phy_init(struct phy *phy)
26343043 {
26353044 struct qmp_phy *qphy = phy_get_drvdata(phy);
26363045 struct qcom_qmp *qmp = qphy->qmp;
2637− const struct qmp_phy_cfg *cfg = qmp->cfg;
2638− void __iomem *tx = qphy->tx;
2639− void __iomem *rx = qphy->rx;
2640− void __iomem *pcs = qphy->pcs;
2641− void __iomem *pcs_misc = qphy->pcs_misc;
2642− void __iomem *dp_com = qmp->dp_com;
2643− void __iomem *status;
2644− unsigned int mask, val, ready;
3046+ const struct qmp_phy_cfg *cfg = qphy->cfg;
26453047 int ret;
2646−
26473048 dev_vdbg(qmp->dev, "Initializing QMP phy\n");
26483049
26493050 if (cfg->no_pcs_sw_reset) {
@@ -2670,13 +3071,34 @@ static int qcom_qmp_phy_enable(struct phy *phy) · 20 unmodified lines
26703071
26713072 ret = reset_control_assert(qmp->ufs_reset);
26723073 if (ret)
2673− goto err_lane_rst;
3074+ return ret;
26743075 }
26753076
26763077 ret = qcom_qmp_phy_com_init(qphy);
26773078 if (ret)
26783079 return ret;
26793080
3081+ if (cfg->type == PHY_TYPE_DP)
3082+ qcom_qmp_phy_dp_aux_init(qphy);
3083+
3084+ return 0;
3085+}
3086+
3087+static int qcom_qmp_phy_power_on(struct phy *phy)
3088+{
3089+ struct qmp_phy *qphy = phy_get_drvdata(phy);
3090+ struct qcom_qmp *qmp = qphy->qmp;
3091+ const struct qmp_phy_cfg *cfg = qphy->cfg;
3092+ void __iomem *tx = qphy->tx;
3093+ void __iomem *rx = qphy->rx;
3094+ void __iomem *pcs = qphy->pcs;
3095+ void __iomem *pcs_misc = qphy->pcs_misc;
3096+ void __iomem *status;
3097+ unsigned int mask, val, ready;
3098+ int ret;
3099+
3100+ qcom_qmp_phy_serdes_init(qphy);
3101+
26803102 if (cfg->has_lane_rst) {
26813103 ret = reset_control_deassert(qphy->lane_rst);
26823104 if (ret) {
@@ -2700,13 +3122,23 @@ static int qcom_qmp_phy_enable(struct phy *phy) · 17 unmodified lines
27003122 qcom_qmp_phy_configure_lane(qphy->tx2, cfg->regs,
27013123 cfg->tx_tbl, cfg->tx_tbl_num, 2);
27023124
3125+ /* Configure special DP tx tunings */
3126+ if (cfg->type == PHY_TYPE_DP)
3127+ qcom_qmp_phy_configure_dp_tx(qphy);
3128+
27033129 qcom_qmp_phy_configure_lane(rx, cfg->regs,
27043130 cfg->rx_tbl, cfg->rx_tbl_num, 1);
3131+
27053132 if (cfg->is_dual_lane_phy)
27063133 qcom_qmp_phy_configure_lane(qphy->rx2, cfg->regs,
27073134 cfg->rx_tbl, cfg->rx_tbl_num, 2);
27083135
2709− qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
3136+ /* Configure link rate, swing, etc. */
3137+ if (cfg->type == PHY_TYPE_DP)
3138+ qcom_qmp_phy_configure_dp_phy(qphy);
3139+ else
3140+ qcom_qmp_phy_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num);
3141+
27103142 ret = reset_control_deassert(qmp->ufs_reset);
27113143 if (ret)
27123144 goto err_lane_rst;
@@ -2724,102 +3156,129 @@ static int qcom_qmp_phy_enable(struct phy *phy) · 11 unmodified lines
27243156 if (cfg->has_pwrdn_delay)
27253157 usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max);
27263158
2727− /* Pull PHY out of reset state */
2728− if (!cfg->no_pcs_sw_reset)
2729− qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
2730−
2731− if (cfg->has_phy_dp_com_ctrl)
2732− qphy_clrbits(dp_com, QPHY_V3_DP_COM_SW_RESET, SW_RESET);
2733−
2734− /* start SerDes and Phy-Coding-Sublayer */
2735− qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
2736−
2737− if (cfg->type == PHY_TYPE_UFS) {
2738− status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
2739− mask = PCS_READY;
2740− ready = PCS_READY;
2741− } else {
2742− status = pcs + cfg->regs[QPHY_PCS_STATUS];
2743− mask = PHYSTATUS;
2744− ready = 0;
2745− }
3159+ if (cfg->type != PHY_TYPE_DP) {
3160+ /* Pull PHY out of reset state */
3161+ if (!cfg->no_pcs_sw_reset)
3162+ qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
3163+ /* start SerDes and Phy-Coding-Sublayer */
3164+ qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
3165+
3166+ if (cfg->type == PHY_TYPE_UFS) {
3167+ status = pcs + cfg->regs[QPHY_PCS_READY_STATUS];
3168+ mask = PCS_READY;
3169+ ready = PCS_READY;
3170+ } else {
3171+ status = pcs + cfg->regs[QPHY_PCS_STATUS];
3172+ mask = PHYSTATUS;
3173+ ready = 0;
3174+ }
27463175
2747− ret = readl_poll_timeout(status, val, (val & mask) == ready, 10,
2748− PHY_INIT_COMPLETE_TIMEOUT);
2749− if (ret) {
2750− dev_err(qmp->dev, "phy initialization timed-out\n");
2751− goto err_pcs_ready;
3176+ ret = readl_poll_timeout(status, val, (val & mask) == ready, 10,
3177+ PHY_INIT_COMPLETE_TIMEOUT);
3178+ if (ret) {
3179+ dev_err(qmp->dev, "phy initialization timed-out\n");
3180+ goto err_pcs_ready;
3181+ }
27523182 }
2753− qmp->phy_initialized = true;
27543183 return 0;
27553184
27563185 err_pcs_ready:
2757− reset_control_assert(qmp->ufs_reset);
27583186 clk_disable_unprepare(qphy->pipe_clk);
27593187 err_clk_enable:
27603188 if (cfg->has_lane_rst)
27613189 reset_control_assert(qphy->lane_rst);
27623190 err_lane_rst:
2763− qcom_qmp_phy_com_exit(qmp);
2764−
27653191 return ret;
27663192 }
27673193
2768−static int qcom_qmp_phy_disable(struct phy *phy)
3194+static int qcom_qmp_phy_power_off(struct phy *phy)
27693195 {
27703196 struct qmp_phy *qphy = phy_get_drvdata(phy);
2771− struct qcom_qmp *qmp = qphy->qmp;
2772− const struct qmp_phy_cfg *cfg = qmp->cfg;
3197+ const struct qmp_phy_cfg *cfg = qphy->cfg;
27733198
27743199 clk_disable_unprepare(qphy->pipe_clk);
27753200
2776− /* PHY reset */
2777− if (!cfg->no_pcs_sw_reset)
2778− qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
3201+ if (cfg->type == PHY_TYPE_DP) {
3202+ /* Assert DP PHY power down */
3203+ writel(DP_PHY_PD_CTL_PSR_PWRDN, qphy->pcs + QSERDES_V3_DP_PHY_PD_CTL);
3204+ } else {
3205+ /* PHY reset */
3206+ if (!cfg->no_pcs_sw_reset)
3207+ qphy_setbits(qphy->pcs, cfg->regs[QPHY_SW_RESET], SW_RESET);
27793208
2780− /* stop SerDes and Phy-Coding-Sublayer */
2781− qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
3209+ /* stop SerDes and Phy-Coding-Sublayer */
3210+ qphy_clrbits(qphy->pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl);
27823211
2783− /* Put PHY into POWER DOWN state: active low */
2784− if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) {
2785− qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
2786− cfg->pwrdn_ctrl);
2787− } else {
2788− qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,
2789− cfg->pwrdn_ctrl);
3212+ /* Put PHY into POWER DOWN state: active low */
3213+ if (cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL]) {
3214+ qphy_clrbits(qphy->pcs, cfg->regs[QPHY_PCS_POWER_DOWN_CONTROL],
3215+ cfg->pwrdn_ctrl);
3216+ } else {
3217+ qphy_clrbits(qphy->pcs, QPHY_POWER_DOWN_CONTROL,
3218+ cfg->pwrdn_ctrl);
3219+ }
27903220 }
27913221
3222+ return 0;
3223+}
3224+
3225+static int qcom_qmp_phy_exit(struct phy *phy)
3226+{
3227+ struct qmp_phy *qphy = phy_get_drvdata(phy);
3228+ const struct qmp_phy_cfg *cfg = qphy->cfg;
3229+
27923230 if (cfg->has_lane_rst)
27933231 reset_control_assert(qphy->lane_rst);
27943232
2795− qcom_qmp_phy_com_exit(qmp);
2796−
2797− qmp->phy_initialized = false;
3233+ qcom_qmp_phy_com_exit(qphy);
27983234
27993235 return 0;
28003236 }
28013237
3238+static int qcom_qmp_phy_enable(struct phy *phy)
3239+{
3240+ int ret;
3241+
3242+ ret = qcom_qmp_phy_init(phy);
3243+ if (ret)
3244+ return ret;
3245+
3246+ ret = qcom_qmp_phy_power_on(phy);
3247+ if (ret)
3248+ qcom_qmp_phy_exit(phy);
3249+
3250+ return ret;
3251+}
3252+
3253+static int qcom_qmp_phy_disable(struct phy *phy)
3254+{
3255+ int ret;
3256+
3257+ ret = qcom_qmp_phy_power_off(phy);
3258+ if (ret)
3259+ return ret;
3260+ return qcom_qmp_phy_exit(phy);
3261+}
3262+
28023263 static int qcom_qmp_phy_set_mode(struct phy *phy,
28033264 enum phy_mode mode, int submode)
28043265 {
28053266 struct qmp_phy *qphy = phy_get_drvdata(phy);
2806− struct qcom_qmp *qmp = qphy->qmp;
28073267
2808− qmp->mode = mode;
3268+ qphy->mode = mode;
28093269
28103270 return 0;
28113271 }
28123272
28133273 static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy)
28143274 {
2815− struct qcom_qmp *qmp = qphy->qmp;
2816− const struct qmp_phy_cfg *cfg = qmp->cfg;
3275+ const struct qmp_phy_cfg *cfg = qphy->cfg;
28173276 void __iomem *pcs = qphy->pcs;
28183277 void __iomem *pcs_misc = qphy->pcs_misc;
28193278 u32 intr_mask;
28203279
2821− if (qmp->mode == PHY_MODE_USB_HOST_SS ||
2822− qmp->mode == PHY_MODE_USB_DEVICE_SS)
3280+ if (qphy->mode == PHY_MODE_USB_HOST_SS ||
3281+ qphy->mode == PHY_MODE_USB_DEVICE_SS)
28233282 intr_mask = ARCVR_DTCT_EN | ALFPS_DTCT_EN;
28243283 else
28253284 intr_mask = ARCVR_DTCT_EN | ARCVR_DTCT_EVENT_SEL;
@@ -2842,8 +3301,7 @@ static void qcom_qmp_phy_enable_autonomous_mode(struct qmp_phy *qphy) · 16 unmodified lines
28423301
28433302 static void qcom_qmp_phy_disable_autonomous_mode(struct qmp_phy *qphy)
28443303 {
2845− struct qcom_qmp *qmp = qphy->qmp;
2846− const struct qmp_phy_cfg *cfg = qmp->cfg;
3304+ const struct qmp_phy_cfg *cfg = qphy->cfg;
28473305 void __iomem *pcs = qphy->pcs;
28483306 void __iomem *pcs_misc = qphy->pcs_misc;
28493307
@@ -2863,15 +3321,15 @@ static int __maybe_unused qcom_qmp_phy_runtime_suspend(struct device *dev) · 13 unmodified lines
28633321 {
28643322 struct qcom_qmp *qmp = dev_get_drvdata(dev);
28653323 struct qmp_phy *qphy = qmp->phys[0];
2866− const struct qmp_phy_cfg *cfg = qmp->cfg;
3324+ const struct qmp_phy_cfg *cfg = qphy->cfg;
28673325
2868− dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qmp->mode);
3326+ dev_vdbg(dev, "Suspending QMP phy, mode:%d\n", qphy->mode);
28693327
2870− /* Supported only for USB3 PHY */
3328+ /* Supported only for USB3 PHY and luckily USB3 is the first phy */
28713329 if (cfg->type != PHY_TYPE_USB3)
28723330 return 0;
28733331
2874− if (!qmp->phy_initialized) {
3332+ if (!qmp->init_count) {
28753333 dev_vdbg(dev, "PHY not initialized, bailing out\n");
28763334 return 0;
28773335 }
@@ -2888,16 +3346,16 @@ static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev) · 10 unmodified lines
28883346 {
28893347 struct qcom_qmp *qmp = dev_get_drvdata(dev);
28903348 struct qmp_phy *qphy = qmp->phys[0];
2891− const struct qmp_phy_cfg *cfg = qmp->cfg;
3349+ const struct qmp_phy_cfg *cfg = qphy->cfg;
28923350 int ret = 0;
28933351
2894− dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qmp->mode);
3352+ dev_vdbg(dev, "Resuming QMP phy, mode:%d\n", qphy->mode);
28953353
2896− /* Supported only for USB3 PHY */
3354+ /* Supported only for USB3 PHY and luckily USB3 is the first phy */
28973355 if (cfg->type != PHY_TYPE_USB3)
28983356 return 0;
28993357
2900− if (!qmp->phy_initialized) {
3358+ if (!qmp->init_count) {
29013359 dev_vdbg(dev, "PHY not initialized, bailing out\n");
29023360 return 0;
29033361 }
@@ -2920,10 +3378,10 @@ static int __maybe_unused qcom_qmp_phy_runtime_resume(struct device *dev) · 16 unmodified lines
29203378 return 0;
29213379 }
29223380
2923−static int qcom_qmp_phy_vreg_init(struct device *dev)
3381+static int qcom_qmp_phy_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg)
29243382 {
29253383 struct qcom_qmp *qmp = dev_get_drvdata(dev);
2926− int num = qmp->cfg->num_vregs;
3384+ int num = cfg->num_vregs;
29273385 int i;
29283386
29293387 qmp->vregs = devm_kcalloc(dev, num, sizeof(*qmp->vregs), GFP_KERNEL);
@@ -2931,24 +3389,24 @@ static int qcom_qmp_phy_vreg_init(struct device *dev) · 1 unmodified line
29313389 return -ENOMEM;
29323390
29333391 for (i = 0; i < num; i++)
2934− qmp->vregs[i].supply = qmp->cfg->vreg_list[i];
3392+ qmp->vregs[i].supply = cfg->vreg_list[i];
29353393
29363394 return devm_regulator_bulk_get(dev, num, qmp->vregs);
29373395 }
29383396
2939−static int qcom_qmp_phy_reset_init(struct device *dev)
3397+static int qcom_qmp_phy_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg)
29403398 {
29413399 struct qcom_qmp *qmp = dev_get_drvdata(dev);
29423400 int i;
29433401
2944− qmp->resets = devm_kcalloc(dev, qmp->cfg->num_resets,
3402+ qmp->resets = devm_kcalloc(dev, cfg->num_resets,
29453403 sizeof(*qmp->resets), GFP_KERNEL);
29463404 if (!qmp->resets)
29473405 return -ENOMEM;
29483406
2949− for (i = 0; i < qmp->cfg->num_resets; i++) {
3407+ for (i = 0; i < cfg->num_resets; i++) {
29503408 struct reset_control *rst;
2951− const char *name = qmp->cfg->reset_list[i];
3409+ const char *name = cfg->reset_list[i];
29523410
29533411 rst = devm_reset_control_get(dev, name);
29543412 if (IS_ERR(rst)) {
@@ -2961,10 +3419,10 @@ static int qcom_qmp_phy_reset_init(struct device *dev) · 6 unmodified lines
29613419 return 0;
29623420 }
29633421
2964−static int qcom_qmp_phy_clk_init(struct device *dev)
3422+static int qcom_qmp_phy_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
29653423 {
29663424 struct qcom_qmp *qmp = dev_get_drvdata(dev);
2967− int num = qmp->cfg->num_clks;
3425+ int num = cfg->num_clks;
29683426 int i;
29693427
29703428 qmp->clks = devm_kcalloc(dev, num, sizeof(*qmp->clks), GFP_KERNEL);
@@ -2972,12 +3430,12 @@ static int qcom_qmp_phy_clk_init(struct device *dev) · 1 unmodified line
29723430 return -ENOMEM;
29733431
29743432 for (i = 0; i < num; i++)
2975− qmp->clks[i].id = qmp->cfg->clk_list[i];
3433+ qmp->clks[i].id = cfg->clk_list[i];
29763434
29773435 return devm_clk_bulk_get(dev, num, qmp->clks);
29783436 }
29793437
2980−static void phy_pipe_clk_release_provider(void *res)
3438+static void phy_clk_release_provider(void *res)
29813439 {
29823440 of_clk_del_provider(res);
29833441 }
@@ -3006,12 +3464,6 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) · 22 unmodified lines
30063464 struct clk_init_data init = { };
30073465 int ret;
30083466
3009− if ((qmp->cfg->type != PHY_TYPE_USB3) &&
3010− (qmp->cfg->type != PHY_TYPE_PCIE)) {
3011− /* not all phys register pipe clocks, so return success */
3012− return 0;
3013− }
3014−
30153467 ret = of_property_read_string(np, "clock-output-names", &init.name);
30163468 if (ret) {
30173469 dev_err(qmp->dev, "%pOFn: No clock-output-names\n", np);
@@ -3040,9 +3492,202 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) · 22 unmodified lines
30403492 * Roll a devm action because the clock provider is the child node, but
30413493 * the child node is not actually a device.
30423494 */
3043− ret = devm_add_action(qmp->dev, phy_pipe_clk_release_provider, np);
3495+ ret = devm_add_action(qmp->dev, phy_clk_release_provider, np);
3496+ if (ret)
3497+ phy_clk_release_provider(np);
3498+
3499+ return ret;
3500+}
3501+
3502+/*
3503+ * Display Port PLL driver block diagram for branch clocks
3504+ *
3505+ * +------------------------------+
3506+ * | DP_VCO_CLK |
3507+ * | |
3508+ * | +-------------------+ |
3509+ * | | (DP PLL/VCO) | |
3510+ * | +---------+---------+ |
3511+ * | v |
3512+ * | +----------+-----------+ |
3513+ * | | hsclk_divsel_clk_src | |
3514+ * | +----------+-----------+ |
3515+ * +------------------------------+
3516+ * |
3517+ * +---------<---------v------------>----------+
3518+ * | |
3519+ * +--------v----------------+ |
3520+ * | dp_phy_pll_link_clk | |
3521+ * | link_clk | |
3522+ * +--------+----------------+ |
3523+ * | |
3524+ * | |
3525+ * v v
3526+ * Input to DISPCC block |
3527+ * for link clk, crypto clk |
3528+ * and interface clock |
3529+ * |
3530+ * |
3531+ * +--------<------------+-----------------+---<---+
3532+ * | | |
3533+ * +----v---------+ +--------v-----+ +--------v------+
3534+ * | vco_divided | | vco_divided | | vco_divided |
3535+ * | _clk_src | | _clk_src | | _clk_src |
3536+ * | | | | | |
3537+ * |divsel_six | | divsel_two | | divsel_four |
3538+ * +-------+------+ +-----+--------+ +--------+------+
3539+ * | | |
3540+ * v---->----------v-------------<------v
3541+ * |
3542+ * +----------+-----------------+
3543+ * | dp_phy_pll_vco_div_clk |
3544+ * +---------+------------------+
3545+ * |
3546+ * v
3547+ * Input to DISPCC block
3548+ * for DP pixel clock
3549+ *
3550+ */
3551+static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw,
3552+ struct clk_rate_request *req)
3553+{
3554+ switch (req->rate) {
3555+ case 1620000000UL / 2:
3556+ case 2700000000UL / 2:
3557+ /* 5.4 and 8.1 GHz are same link rate as 2.7GHz, i.e. div 4 and div 6 */
3558+ return 0;
3559+ default:
3560+ return -EINVAL;
3561+ }
3562+}
3563+
3564+static unsigned long
3565+qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
3566+{
3567+ const struct qmp_phy_dp_clks *dp_clks;
3568+ const struct qmp_phy *qphy;
3569+ const struct phy_configure_opts_dp *dp_opts;
3570+
3571+ dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_pixel_hw);
3572+ qphy = dp_clks->qphy;
3573+ dp_opts = &qphy->dp_opts;
3574+
3575+ switch (dp_opts->link_rate) {
3576+ case 1620:
3577+ return 1620000000UL / 2;
3578+ case 2700:
3579+ return 2700000000UL / 2;
3580+ case 5400:
3581+ return 5400000000UL / 4;
3582+ case 8100:
3583+ return 8100000000UL / 6;
3584+ default:
3585+ return 0;
3586+ }
3587+}
3588+
3589+static const struct clk_ops qcom_qmp_dp_pixel_clk_ops = {
3590+ .determine_rate = qcom_qmp_dp_pixel_clk_determine_rate,
3591+ .recalc_rate = qcom_qmp_dp_pixel_clk_recalc_rate,
3592+};
3593+
3594+static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw,
3595+ struct clk_rate_request *req)
3596+{
3597+ switch (req->rate) {
3598+ case 162000000:
3599+ case 270000000:
3600+ case 540000000:
3601+ case 810000000:
3602+ return 0;
3603+ default:
3604+ return -EINVAL;
3605+ }
3606+}
3607+
3608+static unsigned long
3609+qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
3610+{
3611+ const struct qmp_phy_dp_clks *dp_clks;
3612+ const struct qmp_phy *qphy;
3613+ const struct phy_configure_opts_dp *dp_opts;
3614+
3615+ dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_link_hw);
3616+ qphy = dp_clks->qphy;
3617+ dp_opts = &qphy->dp_opts;
3618+
3619+ switch (dp_opts->link_rate) {
3620+ case 1620:
3621+ case 2700:
3622+ case 5400:
3623+ case 8100:
3624+ return dp_opts->link_rate * 100000;
3625+ default:
3626+ return 0;
3627+ }
3628+}
3629+
3630+static const struct clk_ops qcom_qmp_dp_link_clk_ops = {
3631+ .determine_rate = qcom_qmp_dp_link_clk_determine_rate,
3632+ .recalc_rate = qcom_qmp_dp_link_clk_recalc_rate,
3633+};
3634+
3635+static struct clk_hw *
3636+qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data)
3637+{
3638+ struct qmp_phy_dp_clks *dp_clks = data;
3639+ unsigned int idx = clkspec->args[0];
3640+
3641+ if (idx >= 2) {
3642+ pr_err("%s: invalid index %u\n", __func__, idx);
3643+ return ERR_PTR(-EINVAL);
3644+ }
3645+
3646+ if (idx == 0)
3647+ return &dp_clks->dp_link_hw;
3648+
3649+ return &dp_clks->dp_pixel_hw;
3650+}
3651+
3652+static int phy_dp_clks_register(struct qcom_qmp *qmp, struct qmp_phy *qphy,
3653+ struct device_node *np)
3654+{
3655+ struct clk_init_data init = { };
3656+ struct qmp_phy_dp_clks *dp_clks;
3657+ int ret;
3658+
3659+ dp_clks = devm_kzalloc(qmp->dev, sizeof(*dp_clks), GFP_KERNEL);
3660+ if (!dp_clks)
3661+ return -ENOMEM;
3662+
3663+ dp_clks->qphy = qphy;
3664+ qphy->dp_clks = dp_clks;
3665+
3666+ init.ops = &qcom_qmp_dp_link_clk_ops;
3667+ init.name = "qmp_dp_phy_pll_link_clk";
3668+ dp_clks->dp_link_hw.init = &init;
3669+ ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_link_hw);
3670+ if (ret)
3671+ return ret;
3672+
3673+ init.ops = &qcom_qmp_dp_pixel_clk_ops;
3674+ init.name = "qmp_dp_phy_pll_vco_div_clk";
3675+ dp_clks->dp_pixel_hw.init = &init;
3676+ ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_pixel_hw);
3677+ if (ret)
3678+ return ret;
3679+
3680+ ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, dp_clks);
3681+ if (ret)
3682+ return ret;
3683+
3684+ /*
3685+ * Roll a devm action because the clock provider is the child node, but
3686+ * the child node is not actually a device.
3687+ */
3688+ ret = devm_add_action(qmp->dev, phy_clk_release_provider, np);
30443689 if (ret)
3045− phy_pipe_clk_release_provider(np);
3690+ phy_clk_release_provider(np);
30463691
30473692 return ret;
30483693 }
@@ -3054,6 +3699,17 @@ static const struct phy_ops qcom_qmp_phy_gen_ops = { · 5 unmodified lines
30543699 .owner = THIS_MODULE,
30553700 };
30563701
3702+static const struct phy_ops qcom_qmp_phy_dp_ops = {
3703+ .init = qcom_qmp_phy_init,
3704+ .configure = qcom_qmp_dp_phy_configure,
3705+ .power_on = qcom_qmp_phy_power_on,
3706+ .calibrate = qcom_qmp_dp_phy_calibrate,
3707+ .power_off = qcom_qmp_phy_power_off,
3708+ .exit = qcom_qmp_phy_exit,
3709+ .set_mode = qcom_qmp_phy_set_mode,
3710+ .owner = THIS_MODULE,
3711+};
3712+
30573713 static const struct phy_ops qcom_qmp_pcie_ufs_ops = {
30583714 .power_on = qcom_qmp_phy_enable,
30593715 .power_off = qcom_qmp_phy_disable,
@@ -3062,12 +3718,13 @@ static const struct phy_ops qcom_qmp_pcie_ufs_ops = { · 2 unmodified lines
30623718 };
30633719
30643720 static
3065−int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id)
3721+int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id,
3722+ void __iomem *serdes, const struct qmp_phy_cfg *cfg)
30663723 {
30673724 struct qcom_qmp *qmp = dev_get_drvdata(dev);
30683725 struct phy *generic_phy;
30693726 struct qmp_phy *qphy;
3070− const struct phy_ops *ops = &qcom_qmp_phy_gen_ops;
3727+ const struct phy_ops *ops;
30713728 char prop_name[MAX_PROP_NAME];
30723729 int ret;
30733730
@@ -3075,6 +3732,8 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 1 unmodified line
30753732 if (!qphy)
30763733 return -ENOMEM;
30773734
3735+ qphy->cfg = cfg;
3736+ qphy->serdes = serdes;
30783737 /*
30793738 * Get memory resources for each phy lane:
30803739 * Resources are indexed as: tx -> 0; rx -> 1; pcs -> 2.
@@ -3099,7 +3758,7 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 18 unmodified lines
30993758 * back to old legacy behavior of assuming they can be reached at an
31003759 * offset from the first lane.
31013760 */
3102− if (qmp->cfg->is_dual_lane_phy) {
3761+ if (cfg->is_dual_lane_phy) {
31033762 qphy->tx2 = of_iomap(np, 3);
31043763 qphy->rx2 = of_iomap(np, 4);
31053764 if (!qphy->tx2 || !qphy->rx2) {
@@ -3132,8 +3791,8 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 26 unmodified lines
31323791 snprintf(prop_name, sizeof(prop_name), "pipe%d", id);
31333792 qphy->pipe_clk = of_clk_get_by_name(np, prop_name);
31343793 if (IS_ERR(qphy->pipe_clk)) {
3135− if (qmp->cfg->type == PHY_TYPE_PCIE ||
3136− qmp->cfg->type == PHY_TYPE_USB3) {
3794+ if (cfg->type == PHY_TYPE_PCIE ||
3795+ cfg->type == PHY_TYPE_USB3) {
31373796 ret = PTR_ERR(qphy->pipe_clk);
31383797 if (ret != -EPROBE_DEFER)
31393798 dev_err(dev,
@@ -3145,7 +3804,7 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 5 unmodified lines
31453804 }
31463805
31473806 /* Get lane reset, if any */
3148− if (qmp->cfg->has_lane_rst) {
3807+ if (cfg->has_lane_rst) {
31493808 snprintf(prop_name, sizeof(prop_name), "lane%d", id);
31503809 qphy->lane_rst = of_reset_control_get(np, prop_name);
31513810 if (IS_ERR(qphy->lane_rst)) {
@@ -3154,8 +3813,12 @@ int qcom_qmp_phy_create(struct device *dev, struct device_node *np, int id) · 2 unmodified lines
31543813 }
31553814 }
31563815
3157− if (qmp->cfg->type == PHY_TYPE_UFS || qmp->cfg->type == PHY_TYPE_PCIE)
3816+ if (cfg->type == PHY_TYPE_UFS || cfg->type == PHY_TYPE_PCIE)
31583817 ops = &qcom_qmp_pcie_ufs_ops;
3818+ else if (cfg->type == PHY_TYPE_DP)
3819+ ops = &qcom_qmp_phy_dp_ops;
3820+ else
3821+ ops = &qcom_qmp_phy_gen_ops;
31593822
31603823 generic_phy = devm_phy_create(dev, np, ops);
31613824 if (IS_ERR(generic_phy)) {
@@ -3198,6 +3861,9 @@ static const struct of_device_id qcom_qmp_phy_of_match_table[] = { · 36 unmodified lines
31983861 }, {
31993862 .compatible = "qcom,sc7180-qmp-usb3-phy",
32003863 .data = &sc7180_usb3phy_cfg,
3864+ }, {
3865+ .compatible = "qcom,sc7180-qmp-usb3-dp-phy",
3866+ /* It's a combo phy */
32013867 }, {
32023868 .compatible = "qcom,sdm845-qhp-pcie-phy",
32033869 .data = &sdm845_qhp_pciephy_cfg,
@@ -3239,6 +3905,14 @@ static const struct of_device_id qcom_qmp_phy_of_match_table[] = { · 35 unmodified lines
32393905 };
32403906 MODULE_DEVICE_TABLE(of, qcom_qmp_phy_of_match_table);
32413907
3908+static const struct of_device_id qcom_qmp_combo_phy_of_match_table[] = {
3909+ {
3910+ .compatible = "qcom,sc7180-qmp-usb3-dp-phy",
3911+ .data = &sc7180_usb3dpphy_cfg,
3912+ },
3913+ { }
3914+};
3915+
32423916 static const struct dev_pm_ops qcom_qmp_phy_pm_ops = {
32433917 SET_RUNTIME_PM_OPS(qcom_qmp_phy_runtime_suspend,
32443918 qcom_qmp_phy_runtime_resume, NULL)
@@ -3248,11 +3922,16 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) · 3 unmodified lines
32483922 {
32493923 struct qcom_qmp *qmp;
32503924 struct device *dev = &pdev->dev;
3251− struct resource *res;
32523925 struct device_node *child;
32533926 struct phy_provider *phy_provider;
3254− void __iomem *base;
3255− int num, id;
3927+ void __iomem *serdes;
3928+ void __iomem *usb_serdes;
3929+ void __iomem *dp_serdes;
3930+ const struct qmp_phy_combo_cfg *combo_cfg = NULL;
3931+ const struct qmp_phy_cfg *cfg = NULL;
3932+ const struct qmp_phy_cfg *usb_cfg = NULL;
3933+ const struct qmp_phy_cfg *dp_cfg = NULL;
3934+ int num, id, expected_phys;
32563935 int ret;
32573936
32583937 qmp = devm_kzalloc(dev, sizeof(*qmp), GFP_KERNEL);
@@ -3263,40 +3942,57 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) · 4 unmodified lines
32633942 dev_set_drvdata(dev, qmp);
32643943
32653944 /* Get the specific init parameters of QMP phy */
3266− qmp->cfg = of_device_get_match_data(dev);
3267− if (!qmp->cfg)
3268− return -EINVAL;
3945+ cfg = of_device_get_match_data(dev);
3946+ if (!cfg) {
3947+ const struct of_device_id *match;
32693948
3270− res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3271− base = devm_ioremap_resource(dev, res);
3272− if (IS_ERR(base))
3273− return PTR_ERR(base);
3949+ match = of_match_device(qcom_qmp_combo_phy_of_match_table, dev);
3950+ if (!match)
3951+ return -EINVAL;
3952+
3953+ combo_cfg = match->data;
3954+ if (!combo_cfg)
3955+ return -EINVAL;
3956+
3957+ usb_cfg = combo_cfg->usb_cfg;
3958+ cfg = usb_cfg; /* Setup clks and regulators */
3959+ }
32743960
32753961 /* per PHY serdes; usually located at base address */
3276− qmp->serdes = base;
3962+ usb_serdes = serdes = devm_platform_ioremap_resource(pdev, 0);
3963+ if (IS_ERR(serdes))
3964+ return PTR_ERR(serdes);
32773965
32783966 /* per PHY dp_com; if PHY has dp_com control block */
3279− if (qmp->cfg->has_phy_dp_com_ctrl) {
3280− res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
3281− "dp_com");
3282− base = devm_ioremap_resource(dev, res);
3283− if (IS_ERR(base))
3284− return PTR_ERR(base);
3285−
3286− qmp->dp_com = base;
3967+ if (combo_cfg || cfg->has_phy_dp_com_ctrl) {
3968+ qmp->dp_com = devm_platform_ioremap_resource(pdev, 1);
3969+ if (IS_ERR(qmp->dp_com))
3970+ return PTR_ERR(qmp->dp_com);
3971+ }
3972+
3973+ if (combo_cfg) {
3974+ /* Only two serdes for combo PHY */
3975+ dp_serdes = devm_platform_ioremap_resource(pdev, 2);
3976+ if (IS_ERR(dp_serdes))
3977+ return PTR_ERR(dp_serdes);
3978+
3979+ dp_cfg = combo_cfg->dp_cfg;
3980+ expected_phys = 2;
3981+ } else {
3982+ expected_phys = cfg->nlanes;
32873983 }
32883984
32893985 mutex_init(&qmp->phy_mutex);
32903986
3291− ret = qcom_qmp_phy_clk_init(dev);
3987+ ret = qcom_qmp_phy_clk_init(dev, cfg);
32923988 if (ret)
32933989 return ret;
32943990
3295− ret = qcom_qmp_phy_reset_init(dev);
3991+ ret = qcom_qmp_phy_reset_init(dev, cfg);
32963992 if (ret)
32973993 return ret;
32983994
3299− ret = qcom_qmp_phy_vreg_init(dev);
3995+ ret = qcom_qmp_phy_vreg_init(dev, cfg);
33003996 if (ret) {
33013997 if (ret != -EPROBE_DEFER)
33023998 dev_err(dev, "failed to get regulator supplies: %d\n",
@@ -3306,14 +4002,13 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) · 3 unmodified lines
33064002
33074003 num = of_get_available_child_count(dev->of_node);
33084004 /* do we have a rogue child node ? */
3309− if (num > qmp->cfg->nlanes)
4005+ if (num > expected_phys)
33104006 return -EINVAL;
33114007
33124008 qmp->phys = devm_kcalloc(dev, num, sizeof(*qmp->phys), GFP_KERNEL);
33134009 if (!qmp->phys)
33144010 return -ENOMEM;
33154011
3316− id = 0;
33174012 pm_runtime_set_active(dev);
33184013 pm_runtime_enable(dev);
33194014 /*
@@ -3322,9 +4017,18 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) · 2 unmodified lines
33224017 */
33234018 pm_runtime_forbid(dev);
33244019
4020+ id = 0;
33254021 for_each_available_child_of_node(dev->of_node, child) {
4022+ if (of_node_name_eq(child, "dp-phy")) {
4023+ cfg = dp_cfg;
4024+ serdes = dp_serdes;
4025+ } else if (of_node_name_eq(child, "usb3-phy")) {
4026+ cfg = usb_cfg;
4027+ serdes = usb_serdes;
4028+ }
4029+
33264030 /* Create per-lane phy */
3327− ret = qcom_qmp_phy_create(dev, child, id);
4031+ ret = qcom_qmp_phy_create(dev, child, id, serdes, cfg);
33284032 if (ret) {
33294033 dev_err(dev, "failed to create lane%d phy, %d\n",
33304034 id, ret);
@@ -3335,11 +4039,20 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev) · 4 unmodified lines
33354039 * Register the pipe clock provided by phy.
33364040 * See function description to see details of this pipe clock.
33374041 */
3338− ret = phy_pipe_clk_register(qmp, child);
3339− if (ret) {
3340− dev_err(qmp->dev,
3341− "failed to register pipe clock source\n");
3342− goto err_node_put;
4042+ if (cfg->type == PHY_TYPE_USB3 || cfg->type == PHY_TYPE_PCIE) {
4043+ ret = phy_pipe_clk_register(qmp, child);
4044+ if (ret) {
4045+ dev_err(qmp->dev,
4046+ "failed to register pipe clock source\n");
4047+ goto err_node_put;
4048+ }
4049+ } else if (cfg->type == PHY_TYPE_DP) {
4050+ ret = phy_dp_clks_register(qmp, qmp->phys[id], child);
4051+ if (ret) {
4052+ dev_err(qmp->dev,
4053+ "failed to register DP clock source\n");
4054+ goto err_node_put;
4055+ }
33434056 }
33444057 id++;
33454058 }
drivers/phy/qualcomm/phy-qcom-qmp.h+80−0
@@ -137,6 +137,9 @@ · 136 unmodified lines
137137 #define QPHY_V3_DP_COM_RESET_OVRD_CTRL 0x1c
138138
139139 /* Only for QMP V3 PHY - QSERDES COM registers */
140+#define QSERDES_V3_COM_ATB_SEL1 0x000
141+#define QSERDES_V3_COM_ATB_SEL2 0x004
142+#define QSERDES_V3_COM_FREQ_UPDATE 0x008
140143 #define QSERDES_V3_COM_BG_TIMER 0x00c
141144 #define QSERDES_V3_COM_SSC_EN_CENTER 0x010
142145 #define QSERDES_V3_COM_SSC_ADJ_PER1 0x014
@@ -146,6 +149,13 @@ · 3 unmodified lines
146149 #define QSERDES_V3_COM_SSC_STEP_SIZE1 0x024
147150 #define QSERDES_V3_COM_SSC_STEP_SIZE2 0x028
148151 #define QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN 0x034
152+# define QSERDES_V3_COM_BIAS_EN 0x0001
153+# define QSERDES_V3_COM_BIAS_EN_MUX 0x0002
154+# define QSERDES_V3_COM_CLKBUF_R_EN 0x0004
155+# define QSERDES_V3_COM_CLKBUF_L_EN 0x0008
156+# define QSERDES_V3_COM_EN_SYSCLK_TX_SEL 0x0010
157+# define QSERDES_V3_COM_CLKBUF_RX_DRIVE_L 0x0020
158+# define QSERDES_V3_COM_CLKBUF_RX_DRIVE_R 0x0040
149159 #define QSERDES_V3_COM_CLK_ENABLE1 0x038
150160 #define QSERDES_V3_COM_SYS_CLK_CTRL 0x03c
151161 #define QSERDES_V3_COM_SYSCLK_BUF_ENABLE 0x040
@@ -207,12 +217,36 @@ · 55 unmodified lines
207217 #define QSERDES_V3_COM_CMN_MODE 0x184
208218
209219 /* Only for QMP V3 PHY - TX registers */
220+#define QSERDES_V3_TX_BIST_MODE_LANENO 0x000
221+#define QSERDES_V3_TX_CLKBUF_ENABLE 0x008
222+#define QSERDES_V3_TX_TX_EMP_POST1_LVL 0x00c
223+# define DP_PHY_TXn_TX_EMP_POST1_LVL_MASK 0x001f
224+# define DP_PHY_TXn_TX_EMP_POST1_LVL_MUX_EN 0x0020
225+
226+#define QSERDES_V3_TX_TX_DRV_LVL 0x01c
227+# define DP_PHY_TXn_TX_DRV_LVL_MASK 0x001f
228+# define DP_PHY_TXn_TX_DRV_LVL_MUX_EN 0x0020
229+
230+#define QSERDES_V3_TX_RESET_TSYNC_EN 0x024
231+#define QSERDES_V3_TX_PRE_STALL_LDO_BOOST_EN 0x028
232+
233+#define QSERDES_V3_TX_TX_BAND 0x02c
234+#define QSERDES_V3_TX_SLEW_CNTL 0x030
235+#define QSERDES_V3_TX_INTERFACE_SELECT 0x034
236+#define QSERDES_V3_TX_RES_CODE_LANE_TX 0x03c
237+#define QSERDES_V3_TX_RES_CODE_LANE_RX 0x040
210238 #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_TX 0x044
211239 #define QSERDES_V3_TX_RES_CODE_LANE_OFFSET_RX 0x048
212240 #define QSERDES_V3_TX_DEBUG_BUS_SEL 0x058
241+#define QSERDES_V3_TX_TRANSCEIVER_BIAS_EN 0x05c
213242 #define QSERDES_V3_TX_HIGHZ_DRVR_EN 0x060
243+#define QSERDES_V3_TX_TX_POL_INV 0x064
244+#define QSERDES_V3_TX_PARRATE_REC_DETECT_IDLE_EN 0x068
214245 #define QSERDES_V3_TX_LANE_MODE_1 0x08c
215246 #define QSERDES_V3_TX_RCV_DETECT_LVL_2 0x0a4
247+#define QSERDES_V3_TX_TRAN_DRVR_EMP_EN 0x0c0
248+#define QSERDES_V3_TX_TX_INTERFACE_MODE 0x0c4
249+#define QSERDES_V3_TX_VMODE_CTRL1 0x0f0
216250
217251 /* Only for QMP V3 PHY - RX registers */
218252 #define QSERDES_V3_RX_UCDR_FO_GAIN 0x008
@@ -315,6 +349,52 @@ · 96 unmodified lines
315349 #define QPHY_V3_PCS_MISC_OSC_DTCT_MODE2_CONFIG4 0x5c
316350 #define QPHY_V3_PCS_MISC_OSC_DTCT_MODE2_CONFIG5 0x60
317351
352+/* Only for QMP V3 PHY - DP PHY registers */
353+#define QSERDES_V3_DP_PHY_REVISION_ID0 0x000
354+#define QSERDES_V3_DP_PHY_REVISION_ID1 0x004
355+#define QSERDES_V3_DP_PHY_REVISION_ID2 0x008
356+#define QSERDES_V3_DP_PHY_REVISION_ID3 0x00c
357+#define QSERDES_V3_DP_PHY_CFG 0x010
358+#define QSERDES_V3_DP_PHY_PD_CTL 0x018
359+# define DP_PHY_PD_CTL_PWRDN 0x001
360+# define DP_PHY_PD_CTL_PSR_PWRDN 0x002
361+# define DP_PHY_PD_CTL_AUX_PWRDN 0x004
362+# define DP_PHY_PD_CTL_LANE_0_1_PWRDN 0x008
363+# define DP_PHY_PD_CTL_LANE_2_3_PWRDN 0x010
364+# define DP_PHY_PD_CTL_PLL_PWRDN 0x020
365+# define DP_PHY_PD_CTL_DP_CLAMP_EN 0x040
366+#define QSERDES_V3_DP_PHY_MODE 0x01c
367+#define QSERDES_V3_DP_PHY_AUX_CFG0 0x020
368+#define QSERDES_V3_DP_PHY_AUX_CFG1 0x024
369+#define QSERDES_V3_DP_PHY_AUX_CFG2 0x028
370+#define QSERDES_V3_DP_PHY_AUX_CFG3 0x02c
371+#define QSERDES_V3_DP_PHY_AUX_CFG4 0x030
372+#define QSERDES_V3_DP_PHY_AUX_CFG5 0x034
373+#define QSERDES_V3_DP_PHY_AUX_CFG6 0x038
374+#define QSERDES_V3_DP_PHY_AUX_CFG7 0x03c
375+#define QSERDES_V3_DP_PHY_AUX_CFG8 0x040
376+#define QSERDES_V3_DP_PHY_AUX_CFG9 0x044
377+
378+#define QSERDES_V3_DP_PHY_AUX_INTERRUPT_MASK 0x048
379+# define PHY_AUX_STOP_ERR_MASK 0x01
380+# define PHY_AUX_DEC_ERR_MASK 0x02
381+# define PHY_AUX_SYNC_ERR_MASK 0x04
382+# define PHY_AUX_ALIGN_ERR_MASK 0x08
383+# define PHY_AUX_REQ_ERR_MASK 0x10
384+
385+#define QSERDES_V3_DP_PHY_AUX_INTERRUPT_CLEAR 0x04c
386+#define QSERDES_V3_DP_PHY_AUX_BIST_CFG 0x050
387+
388+#define QSERDES_V3_DP_PHY_VCO_DIV 0x064
389+#define QSERDES_V3_DP_PHY_TX0_TX1_LANE_CTL 0x06c
390+#define QSERDES_V3_DP_PHY_TX2_TX3_LANE_CTL 0x088
391+
392+#define QSERDES_V3_DP_PHY_SPARE0 0x0ac
393+#define DP_PHY_SPARE0_MASK 0x0f
394+#define DP_PHY_SPARE0_ORIENTATION_INFO_SHIFT 0x04(0x0004)
395+
396+#define QSERDES_V3_DP_PHY_STATUS 0x0c0
397+
318398 /* Only for QMP V4 PHY - QSERDES COM registers */
319399 #define QSERDES_V4_COM_SSC_EN_CENTER 0x010
320400 #define QSERDES_V4_COM_SSC_PER1 0x01c
drivers/phy/ralink/phy-ralink-usb.c+1−1
@@ -142,7 +142,7 @@ static int ralink_usb_phy_power_off(struct phy *_phy) · 141 unmodified lines
142142 return 0;
143143 }
144144
145−static struct phy_ops ralink_usb_phy_ops = {
145+static const struct phy_ops ralink_usb_phy_ops = {
146146 .power_on = ralink_usb_phy_power_on,
147147 .power_off = ralink_usb_phy_power_off,
148148 .owner = THIS_MODULE,
drivers/phy/rockchip/Kconfig+12−0
@@ -9,6 +9,18 @@ config PHY_ROCKCHIP_DP · 8 unmodified lines
99 help
1010 Enable this to support the Rockchip Display Port PHY.
1111
12+config PHY_ROCKCHIP_DPHY_RX0
13+ tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
14+ depends on ARCH_ROCKCHIP || COMPILE_TEST
15+ select GENERIC_PHY_MIPI_DPHY
16+ select GENERIC_PHY
17+ help
18+ Enable this to support the Rockchip MIPI Synopsys DPHY RX0
19+ associated to the Rockchip ISP module present in RK3399 SoCs.
20+
21+ To compile this driver as a module, choose M here: the module
22+ will be called phy-rockchip-dphy-rx0.
23+
1224 config PHY_ROCKCHIP_EMMC
1325 tristate "Rockchip EMMC PHY Driver"
1426 depends on ARCH_ROCKCHIP && OF
drivers/phy/rockchip/Makefile+1−0
@@ -1,5 +1,6 @@
11 # SPDX-License-Identifier: GPL-2.0
22 obj-$(CONFIG_PHY_ROCKCHIP_DP) += phy-rockchip-dp.o
3+obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0.o
34 obj-$(CONFIG_PHY_ROCKCHIP_EMMC) += phy-rockchip-emmc.o
45 obj-$(CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY) += phy-rockchip-inno-dsidphy.o
56 obj-$(CONFIG_PHY_ROCKCHIP_INNO_HDMI) += phy-rockchip-inno-hdmi.o
drivers/phy/rockchip/phy-rockchip-dphy-rx0.crenamed from drivers/staging/media/phy-rockchip-dphy-rx0/phy-rockchip-dphy-rx0.c+1−0
@@ -16,6 +16,7 @@ · 15 unmodified lines
1616 */
1717
1818 #include <linux/clk.h>
19+#include <linux/delay.h>
1920 #include <linux/io.h>
2021 #include <linux/mfd/syscon.h>
2122 #include <linux/module.h>
drivers/phy/samsung/phy-exynos5-usbdrd.c+12−27
@@ -16,6 +16,7 @@ · 15 unmodified lines
1616 #include <linux/of.h>
1717 #include <linux/of_address.h>
1818 #include <linux/of_device.h>
19+#include <linux/iopoll.h>
1920 #include <linux/phy/phy.h>
2021 #include <linux/platform_device.h>
2122 #include <linux/mutex.h>
@@ -556,41 +557,25 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy) · 534 unmodified lines
556557 static int crport_handshake(struct exynos5_usbdrd_phy *phy_drd,
557558 u32 val, u32 cmd)
558559 {
559− u32 usec = 100;
560560 unsigned int result;
561+ int err;
561562
562563 writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
563564
564− do {
565− result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1);
566− if (result & PHYREG1_CR_ACK)
567− break;
568−
569− udelay(1);
570− } while (usec-- > 0);
571−
572− if (!usec) {
573− dev_err(phy_drd->dev,
574− "CRPORT handshake timeout1 (0x%08x)\n", val);
575− return -ETIME;
565+ err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1,
566+ result, (result & PHYREG1_CR_ACK), 1, 100);
567+ if (err == -ETIMEDOUT) {
568+ dev_err(phy_drd->dev, "CRPORT handshake timeout1 (0x%08x)\n", val);
569+ return err;
576570 }
577571
578− usec = 100;
579−
580572 writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0);
581573
582− do {
583− result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1);
584− if (!(result & PHYREG1_CR_ACK))
585− break;
586−
587− udelay(1);
588− } while (usec-- > 0);
589−
590− if (!usec) {
591− dev_err(phy_drd->dev,
592− "CRPORT handshake timeout2 (0x%08x)\n", val);
593− return -ETIME;
574+ err = readl_poll_timeout(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1,
575+ result, !(result & PHYREG1_CR_ACK), 1, 100);
576+ if (err == -ETIMEDOUT) {
577+ dev_err(phy_drd->dev, "CRPORT handshake timeout2 (0x%08x)\n", val);
578+ return err;
594579 }
595580
596581 return 0;
drivers/phy/samsung/phy-samsung-ufs.c+1−1
@@ -268,7 +268,7 @@ static int samsung_ufs_phy_exit(struct phy *phy) · 267 unmodified lines
268268 return 0;
269269 }
270270
271−static struct phy_ops samsung_ufs_phy_ops = {
271+static const struct phy_ops samsung_ufs_phy_ops = {
272272 .init = samsung_ufs_phy_init,
273273 .exit = samsung_ufs_phy_exit,
274274 .power_on = samsung_ufs_phy_power_on,
drivers/phy/socionext/Kconfig+10−0
@@ -34,3 +34,13 @@ config PHY_UNIPHIER_PCIE · 33 unmodified lines
3434 help
3535 Enable this to support PHY implemented in PCIe controller
3636 on UniPhier SoCs. This driver supports LD20 and PXs3 SoCs.
37+
38+config PHY_UNIPHIER_AHCI
39+ tristate "UniPhier AHCI PHY driver"
40+ depends on ARCH_UNIPHIER || COMPILE_TEST
41+ depends on OF && HAS_IOMEM
42+ default SATA_AHCI_PLATFORM
43+ select GENERIC_PHY
44+ help
45+ Enable this to support PHY implemented in AHCI controller
46+ on UniPhier SoCs. This driver supports PXs2 and PXs3 SoCs.
drivers/phy/socionext/Makefile+1−0
@@ -6,3 +6,4 @@ · 5 unmodified lines
66 obj-$(CONFIG_PHY_UNIPHIER_USB2) += phy-uniphier-usb2.o
77 obj-$(CONFIG_PHY_UNIPHIER_USB3) += phy-uniphier-usb3hs.o phy-uniphier-usb3ss.o
88 obj-$(CONFIG_PHY_UNIPHIER_PCIE) += phy-uniphier-pcie.o
9+obj-$(CONFIG_PHY_UNIPHIER_AHCI) += phy-uniphier-ahci.o
drivers/phy/socionext/phy-uniphier-ahci.c+321−0
@@ -0,0 +1,321 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * phy-uniphier-ahci.c - PHY driver for UniPhier AHCI controller
4+ * Copyright 2016-2020, Socionext Inc.
5+ * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
6+ */
7+
8+#include <linux/bitfield.h>
9+#include <linux/bitops.h>
10+#include <linux/clk.h>
11+#include <linux/iopoll.h>
12+#include <linux/module.h>
13+#include <linux/of.h>
14+#include <linux/of_platform.h>
15+#include <linux/phy/phy.h>
16+#include <linux/platform_device.h>
17+#include <linux/reset.h>
18+
19+struct uniphier_ahciphy_priv {
20+ struct device *dev;
21+ void __iomem *base;
22+ struct clk *clk, *clk_parent;
23+ struct reset_control *rst, *rst_parent;
24+ const struct uniphier_ahciphy_soc_data *data;
25+};
26+
27+struct uniphier_ahciphy_soc_data {
28+ int (*init)(struct uniphier_ahciphy_priv *priv);
29+ int (*power_on)(struct uniphier_ahciphy_priv *priv);
30+ int (*power_off)(struct uniphier_ahciphy_priv *priv);
31+ bool is_ready_high;
32+ bool is_phy_clk;
33+};
34+
35+/* for PXs2/PXs3 */
36+#define CKCTRL 0x0
37+#define CKCTRL_P0_READY BIT(15)
38+#define CKCTRL_P0_RESET BIT(10)
39+#define CKCTRL_REF_SSP_EN BIT(9)
40+#define TXCTRL0 0x4
41+#define TXCTRL0_AMP_G3_MASK GENMASK(22, 16)
42+#define TXCTRL0_AMP_G2_MASK GENMASK(14, 8)
43+#define TXCTRL0_AMP_G1_MASK GENMASK(6, 0)
44+#define TXCTRL1 0x8
45+#define TXCTRL1_DEEMPH_G3_MASK GENMASK(21, 16)
46+#define TXCTRL1_DEEMPH_G2_MASK GENMASK(13, 8)
47+#define TXCTRL1_DEEMPH_G1_MASK GENMASK(5, 0)
48+#define RXCTRL 0xc
49+#define RXCTRL_LOS_LVL_MASK GENMASK(20, 16)
50+#define RXCTRL_LOS_BIAS_MASK GENMASK(10, 8)
51+#define RXCTRL_RX_EQ_MASK GENMASK(2, 0)
52+
53+static void uniphier_ahciphy_pxs2_enable(struct uniphier_ahciphy_priv *priv,
54+ bool enable)
55+{
56+ u32 val;
57+
58+ val = readl(priv->base + CKCTRL);
59+
60+ if (enable) {
61+ val |= CKCTRL_REF_SSP_EN;
62+ writel(val, priv->base + CKCTRL);
63+ val &= ~CKCTRL_P0_RESET;
64+ writel(val, priv->base + CKCTRL);
65+ } else {
66+ val |= CKCTRL_P0_RESET;
67+ writel(val, priv->base + CKCTRL);
68+ val &= ~CKCTRL_REF_SSP_EN;
69+ writel(val, priv->base + CKCTRL);
70+ }
71+}
72+
73+static int uniphier_ahciphy_pxs2_power_on(struct uniphier_ahciphy_priv *priv)
74+{
75+ int ret;
76+ u32 val;
77+
78+ uniphier_ahciphy_pxs2_enable(priv, true);
79+
80+ /* wait until PLL is ready */
81+ if (priv->data->is_ready_high)
82+ ret = readl_poll_timeout(priv->base + CKCTRL, val,
83+ (val & CKCTRL_P0_READY), 200, 400);
84+ else
85+ ret = readl_poll_timeout(priv->base + CKCTRL, val,
86+ !(val & CKCTRL_P0_READY), 200, 400);
87+ if (ret) {
88+ dev_err(priv->dev, "Failed to check whether PHY PLL is ready\n");
89+ uniphier_ahciphy_pxs2_enable(priv, false);
90+ }
91+
92+ return ret;
93+}
94+
95+static int uniphier_ahciphy_pxs2_power_off(struct uniphier_ahciphy_priv *priv)
96+{
97+ uniphier_ahciphy_pxs2_enable(priv, false);
98+
99+ return 0;
100+}
101+
102+static int uniphier_ahciphy_pxs3_init(struct uniphier_ahciphy_priv *priv)
103+{
104+ int i;
105+ u32 val;
106+
107+ /* setup port parameter */
108+ val = readl(priv->base + TXCTRL0);
109+ val &= ~TXCTRL0_AMP_G3_MASK;
110+ val |= FIELD_PREP(TXCTRL0_AMP_G3_MASK, 0x73);
111+ val &= ~TXCTRL0_AMP_G2_MASK;
112+ val |= FIELD_PREP(TXCTRL0_AMP_G2_MASK, 0x46);
113+ val &= ~TXCTRL0_AMP_G1_MASK;
114+ val |= FIELD_PREP(TXCTRL0_AMP_G1_MASK, 0x42);
115+ writel(val, priv->base + TXCTRL0);
116+
117+ val = readl(priv->base + TXCTRL1);
118+ val &= ~TXCTRL1_DEEMPH_G3_MASK;
119+ val |= FIELD_PREP(TXCTRL1_DEEMPH_G3_MASK, 0x23);
120+ val &= ~TXCTRL1_DEEMPH_G2_MASK;
121+ val |= FIELD_PREP(TXCTRL1_DEEMPH_G2_MASK, 0x05);
122+ val &= ~TXCTRL1_DEEMPH_G1_MASK;
123+ val |= FIELD_PREP(TXCTRL1_DEEMPH_G1_MASK, 0x05);
124+
125+ val = readl(priv->base + RXCTRL);
126+ val &= ~RXCTRL_LOS_LVL_MASK;
127+ val |= FIELD_PREP(RXCTRL_LOS_LVL_MASK, 0x9);
128+ val &= ~RXCTRL_LOS_BIAS_MASK;
129+ val |= FIELD_PREP(RXCTRL_LOS_BIAS_MASK, 0x2);
130+ val &= ~RXCTRL_RX_EQ_MASK;
131+ val |= FIELD_PREP(RXCTRL_RX_EQ_MASK, 0x1);
132+
133+ /* dummy read 25 times to make a wait time for the phy to stabilize */
134+ for (i = 0; i < 25; i++)
135+ readl(priv->base + CKCTRL);
136+
137+ return 0;
138+}
139+
140+static int uniphier_ahciphy_init(struct phy *phy)
141+{
142+ struct uniphier_ahciphy_priv *priv = phy_get_drvdata(phy);
143+ int ret;
144+
145+ ret = clk_prepare_enable(priv->clk_parent);
146+ if (ret)
147+ return ret;
148+
149+ ret = reset_control_deassert(priv->rst_parent);
150+ if (ret)
151+ goto out_clk_disable;
152+
153+ if (priv->data->init) {
154+ ret = priv->data->init(priv);
155+ if (ret)
156+ goto out_rst_assert;
157+ }
158+
159+ return 0;
160+
161+out_rst_assert:
162+ reset_control_assert(priv->rst_parent);
163+out_clk_disable:
164+ clk_disable_unprepare(priv->clk_parent);
165+
166+ return ret;
167+}
168+
169+static int uniphier_ahciphy_exit(struct phy *phy)
170+{
171+ struct uniphier_ahciphy_priv *priv = phy_get_drvdata(phy);
172+
173+ reset_control_assert(priv->rst_parent);
174+ clk_disable_unprepare(priv->clk_parent);
175+
176+ return 0;
177+}
178+
179+static int uniphier_ahciphy_power_on(struct phy *phy)
180+{
181+ struct uniphier_ahciphy_priv *priv = phy_get_drvdata(phy);
182+ int ret = 0;
183+
184+ ret = clk_prepare_enable(priv->clk);
185+ if (ret)
186+ return ret;
187+
188+ ret = reset_control_deassert(priv->rst);
189+ if (ret)
190+ goto out_clk_disable;
191+
192+ if (priv->data->power_on) {
193+ ret = priv->data->power_on(priv);
194+ if (ret)
195+ goto out_reset_assert;
196+ }
197+
198+ return 0;
199+
200+out_reset_assert:
201+ reset_control_assert(priv->rst);
202+out_clk_disable:
203+ clk_disable_unprepare(priv->clk);
204+
205+ return ret;
206+}
207+
208+static int uniphier_ahciphy_power_off(struct phy *phy)
209+{
210+ struct uniphier_ahciphy_priv *priv = phy_get_drvdata(phy);
211+ int ret = 0;
212+
213+ if (priv->data->power_off)
214+ ret = priv->data->power_off(priv);
215+
216+ reset_control_assert(priv->rst);
217+ clk_disable_unprepare(priv->clk);
218+
219+ return ret;
220+}
221+
222+static const struct phy_ops uniphier_ahciphy_ops = {
223+ .init = uniphier_ahciphy_init,
224+ .exit = uniphier_ahciphy_exit,
225+ .power_on = uniphier_ahciphy_power_on,
226+ .power_off = uniphier_ahciphy_power_off,
227+ .owner = THIS_MODULE,
228+};
229+
230+static int uniphier_ahciphy_probe(struct platform_device *pdev)
231+{
232+ struct device *dev = &pdev->dev;
233+ struct uniphier_ahciphy_priv *priv;
234+ struct phy *phy;
235+ struct phy_provider *phy_provider;
236+
237+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
238+ if (!priv)
239+ return -ENOMEM;
240+
241+ priv->dev = dev;
242+ priv->data = of_device_get_match_data(dev);
243+ if (WARN_ON(!priv->data))
244+ return -EINVAL;
245+
246+ priv->base = devm_platform_ioremap_resource(pdev, 0);
247+ if (IS_ERR(priv->base))
248+ return PTR_ERR(priv->base);
249+
250+ priv->clk_parent = devm_clk_get(dev, "link");
251+ if (IS_ERR(priv->clk_parent))
252+ return PTR_ERR(priv->clk_parent);
253+
254+ if (priv->data->is_phy_clk) {
255+ priv->clk = devm_clk_get(dev, "phy");
256+ if (IS_ERR(priv->clk))
257+ return PTR_ERR(priv->clk);
258+ }
259+
260+ priv->rst_parent = devm_reset_control_get_shared(dev, "link");
261+ if (IS_ERR(priv->rst_parent))
262+ return PTR_ERR(priv->rst_parent);
263+
264+ priv->rst = devm_reset_control_get_shared(dev, "phy");
265+ if (IS_ERR(priv->rst))
266+ return PTR_ERR(priv->rst);
267+
268+ phy = devm_phy_create(dev, dev->of_node, &uniphier_ahciphy_ops);
269+ if (IS_ERR(phy)) {
270+ dev_err(dev, "failed to create phy\n");
271+ return PTR_ERR(phy);
272+ }
273+
274+ phy_set_drvdata(phy, priv);
275+ phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
276+ if (IS_ERR(phy_provider))
277+ return PTR_ERR(phy_provider);
278+
279+ return 0;
280+}
281+
282+static const struct uniphier_ahciphy_soc_data uniphier_pxs2_data = {
283+ .power_on = uniphier_ahciphy_pxs2_power_on,
284+ .power_off = uniphier_ahciphy_pxs2_power_off,
285+ .is_ready_high = false,
286+ .is_phy_clk = false,
287+};
288+
289+static const struct uniphier_ahciphy_soc_data uniphier_pxs3_data = {
290+ .init = uniphier_ahciphy_pxs3_init,
291+ .power_on = uniphier_ahciphy_pxs2_power_on,
292+ .power_off = uniphier_ahciphy_pxs2_power_off,
293+ .is_ready_high = true,
294+ .is_phy_clk = true,
295+};
296+
297+static const struct of_device_id uniphier_ahciphy_match[] = {
298+ {
299+ .compatible = "socionext,uniphier-pxs2-ahci-phy",
300+ .data = &uniphier_pxs2_data,
301+ },
302+ {
303+ .compatible = "socionext,uniphier-pxs3-ahci-phy",
304+ .data = &uniphier_pxs3_data,
305+ },
306+ { /* Sentinel */ },
307+};
308+MODULE_DEVICE_TABLE(of, uniphier_ahciphy_match);
309+
310+static struct platform_driver uniphier_ahciphy_driver = {
311+ .probe = uniphier_ahciphy_probe,
312+ .driver = {
313+ .name = "uniphier-ahci-phy",
314+ .of_match_table = uniphier_ahciphy_match,
315+ },
316+};
317+module_platform_driver(uniphier_ahciphy_driver);
318+
319+MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>");
320+MODULE_DESCRIPTION("UniPhier PHY driver for AHCI controller");
321+MODULE_LICENSE("GPL v2");
drivers/phy/ti/phy-am654-serdes.c+211−114
@@ -19,15 +19,38 @@ · 18 unmodified lines
1919 #include <linux/pm_runtime.h>
2020 #include <linux/regmap.h>
2121
22+#define CMU_R004 0x4
23+#define CMU_R060 0x60
2224 #define CMU_R07C 0x7c
23−
25+#define CMU_R088 0x88
26+#define CMU_R0D0 0xd0
27+#define CMU_R0E8 0xe8
28+
29+#define LANE_R048 0x248
30+#define LANE_R058 0x258
31+#define LANE_R06c 0x26c
32+#define LANE_R070 0x270
33+#define LANE_R070 0x270
34+#define LANE_R19C 0x39c
35+
36+#define COMLANE_R004 0xa04
2437 #define COMLANE_R138 0xb38
25−#define VERSION 0x70
38+#define VERSION_VAL 0x70
2639
2740 #define COMLANE_R190 0xb90
28−
2941 #define COMLANE_R194 0xb94
3042
43+#define COMRXEQ_R004 0x1404
44+#define COMRXEQ_R008 0x1408
45+#define COMRXEQ_R00C 0x140c
46+#define COMRXEQ_R014 0x1414
47+#define COMRXEQ_R018 0x1418
48+#define COMRXEQ_R01C 0x141c
49+#define COMRXEQ_R04C 0x144c
50+#define COMRXEQ_R088 0x1488
51+#define COMRXEQ_R094 0x1494
52+#define COMRXEQ_R098 0x1498
53+
3154 #define SERDES_CTRL 0x1fd0
3255
3356 #define WIZ_LANEXCTL_STS 0x1fe0
@@ -80,27 +103,136 @@ static const struct regmap_config serdes_am654_regmap_config = { · 46 unmodified lines
80103 .max_register = 0x1ffc,
81104 };
82105
83−static const struct reg_field cmu_master_cdn_o = REG_FIELD(CMU_R07C, 24, 24);
84−static const struct reg_field config_version = REG_FIELD(COMLANE_R138, 16, 23);
85−static const struct reg_field l1_master_cdn_o = REG_FIELD(COMLANE_R190, 9, 9);
86−static const struct reg_field cmu_ok_i_0 = REG_FIELD(COMLANE_R194, 19, 19);
87−static const struct reg_field por_en = REG_FIELD(SERDES_CTRL, 29, 29);
88−static const struct reg_field tx0_enable = REG_FIELD(WIZ_LANEXCTL_STS, 29, 31);
89−static const struct reg_field rx0_enable = REG_FIELD(WIZ_LANEXCTL_STS, 13, 15);
90−static const struct reg_field pll_enable = REG_FIELD(WIZ_PLL_CTRL, 29, 31);
91−static const struct reg_field pll_ok = REG_FIELD(WIZ_PLL_CTRL, 28, 28);
106+enum serdes_am654_fields {
107+ /* CMU PLL Control */
108+ CMU_PLL_CTRL,
109+
110+ LANE_PLL_CTRL_RXEQ_RXIDLE,
111+
112+ /* CMU VCO bias current and VREG setting */
113+ AHB_PMA_CM_VCO_VBIAS_VREG,
114+ AHB_PMA_CM_VCO_BIAS_VREG,
115+
116+ AHB_PMA_CM_SR,
117+ AHB_SSC_GEN_Z_O_20_13,
118+
119+ /* AHB PMA Lane Configuration */
120+ AHB_PMA_LN_AGC_THSEL_VREGH,
121+
122+ /* AGC and Signal detect threshold for Gen3 */
123+ AHB_PMA_LN_GEN3_AGC_SD_THSEL,
124+
125+ AHB_PMA_LN_RX_SELR_GEN3,
126+ AHB_PMA_LN_TX_DRV,
127+
128+ /* CMU Master Reset */
129+ CMU_MASTER_CDN,
130+
131+ /* P2S ring buffer initial startup pointer difference */
132+ P2S_RBUF_PTR_DIFF,
133+
134+ CONFIG_VERSION,
135+
136+ /* Lane 1 Master Reset */
137+ L1_MASTER_CDN,
138+
139+ /* CMU OK Status */
140+ CMU_OK_I_0,
141+
142+ /* Mid-speed initial calibration control */
143+ COMRXEQ_MS_INIT_CTRL_7_0,
144+
145+ /* High-speed initial calibration control */
146+ COMRXEQ_HS_INIT_CAL_7_0,
147+
148+ /* Mid-speed recalibration control */
149+ COMRXEQ_MS_RECAL_CTRL_7_0,
150+
151+ /* High-speed recalibration control */
152+ COMRXEQ_HS_RECAL_CTRL_7_0,
153+
154+ /* ATT configuration */
155+ COMRXEQ_CSR_ATT_CONFIG,
156+
157+ /* Edge based boost adaptation window length */
158+ COMRXEQ_CSR_EBSTADAPT_WIN_LEN,
159+
160+ /* COMRXEQ control 3 & 4 */
161+ COMRXEQ_CTRL_3_4,
162+
163+ /* COMRXEQ control 14, 15 and 16*/
164+ COMRXEQ_CTRL_14_15_16,
165+
166+ /* Threshold for errors in pattern data */
167+ COMRXEQ_CSR_DLEV_ERR_THRESH,
168+
169+ /* COMRXEQ control 25 */
170+ COMRXEQ_CTRL_25,
171+
172+ /* Mid-speed rate change calibration control */
173+ CSR_RXEQ_RATE_CHANGE_CAL_RUN_RATE2_O,
174+
175+ /* High-speed rate change calibration control */
176+ COMRXEQ_HS_RCHANGE_CTRL_7_0,
177+
178+ /* Serdes reset */
179+ POR_EN,
180+
181+ /* Tx Enable Value */
182+ TX0_ENABLE,
183+
184+ /* Rx Enable Value */
185+ RX0_ENABLE,
186+
187+ /* PLL Enable Value */
188+ PLL_ENABLE,
189+
190+ /* PLL ready for use */
191+ PLL_OK,
192+
193+ /* sentinel */
194+ MAX_FIELDS
195+
196+};
197+
198+static const struct reg_field serdes_am654_reg_fields[] = {
199+ [CMU_PLL_CTRL] = REG_FIELD(CMU_R004, 8, 15),
200+ [AHB_PMA_CM_VCO_VBIAS_VREG] = REG_FIELD(CMU_R060, 8, 15),
201+ [CMU_MASTER_CDN] = REG_FIELD(CMU_R07C, 24, 31),
202+ [AHB_PMA_CM_VCO_BIAS_VREG] = REG_FIELD(CMU_R088, 24, 31),
203+ [AHB_PMA_CM_SR] = REG_FIELD(CMU_R0D0, 24, 31),
204+ [AHB_SSC_GEN_Z_O_20_13] = REG_FIELD(CMU_R0E8, 8, 15),
205+ [LANE_PLL_CTRL_RXEQ_RXIDLE] = REG_FIELD(LANE_R048, 8, 15),
206+ [AHB_PMA_LN_AGC_THSEL_VREGH] = REG_FIELD(LANE_R058, 16, 23),
207+ [AHB_PMA_LN_GEN3_AGC_SD_THSEL] = REG_FIELD(LANE_R06c, 0, 7),
208+ [AHB_PMA_LN_RX_SELR_GEN3] = REG_FIELD(LANE_R070, 16, 23),
209+ [AHB_PMA_LN_TX_DRV] = REG_FIELD(LANE_R19C, 16, 23),
210+ [P2S_RBUF_PTR_DIFF] = REG_FIELD(COMLANE_R004, 0, 7),
211+ [CONFIG_VERSION] = REG_FIELD(COMLANE_R138, 16, 23),
212+ [L1_MASTER_CDN] = REG_FIELD(COMLANE_R190, 8, 15),
213+ [CMU_OK_I_0] = REG_FIELD(COMLANE_R194, 19, 19),
214+ [COMRXEQ_MS_INIT_CTRL_7_0] = REG_FIELD(COMRXEQ_R004, 24, 31),
215+ [COMRXEQ_HS_INIT_CAL_7_0] = REG_FIELD(COMRXEQ_R008, 0, 7),
216+ [COMRXEQ_MS_RECAL_CTRL_7_0] = REG_FIELD(COMRXEQ_R00C, 8, 15),
217+ [COMRXEQ_HS_RECAL_CTRL_7_0] = REG_FIELD(COMRXEQ_R00C, 16, 23),
218+ [COMRXEQ_CSR_ATT_CONFIG] = REG_FIELD(COMRXEQ_R014, 16, 23),
219+ [COMRXEQ_CSR_EBSTADAPT_WIN_LEN] = REG_FIELD(COMRXEQ_R018, 16, 23),
220+ [COMRXEQ_CTRL_3_4] = REG_FIELD(COMRXEQ_R01C, 8, 15),
221+ [COMRXEQ_CTRL_14_15_16] = REG_FIELD(COMRXEQ_R04C, 0, 7),
222+ [COMRXEQ_CSR_DLEV_ERR_THRESH] = REG_FIELD(COMRXEQ_R088, 16, 23),
223+ [COMRXEQ_CTRL_25] = REG_FIELD(COMRXEQ_R094, 24, 31),
224+ [CSR_RXEQ_RATE_CHANGE_CAL_RUN_RATE2_O] = REG_FIELD(COMRXEQ_R098, 8, 15),
225+ [COMRXEQ_HS_RCHANGE_CTRL_7_0] = REG_FIELD(COMRXEQ_R098, 16, 23),
226+ [POR_EN] = REG_FIELD(SERDES_CTRL, 29, 29),
227+ [TX0_ENABLE] = REG_FIELD(WIZ_LANEXCTL_STS, 29, 31),
228+ [RX0_ENABLE] = REG_FIELD(WIZ_LANEXCTL_STS, 13, 15),
229+ [PLL_ENABLE] = REG_FIELD(WIZ_PLL_CTRL, 29, 31),
230+ [PLL_OK] = REG_FIELD(WIZ_PLL_CTRL, 28, 28),
231+};
92232
93233 struct serdes_am654 {
94234 struct regmap *regmap;
95− struct regmap_field *cmu_master_cdn_o;
96− struct regmap_field *config_version;
97− struct regmap_field *l1_master_cdn_o;
98− struct regmap_field *cmu_ok_i_0;
99− struct regmap_field *por_en;
100− struct regmap_field *tx0_enable;
101− struct regmap_field *rx0_enable;
102− struct regmap_field *pll_enable;
103− struct regmap_field *pll_ok;
235+ struct regmap_field *fields[MAX_FIELDS];
104236
105237 struct device *dev;
106238 struct mux_control *control;
@@ -116,12 +248,12 @@ static int serdes_am654_enable_pll(struct serdes_am654 *phy) · 9 unmodified lines
116248 int ret;
117249 u32 val;
118250
119− ret = regmap_field_write(phy->pll_enable, PLL_ENABLE_STATE);
251+ ret = regmap_field_write(phy->fields[PLL_ENABLE], PLL_ENABLE_STATE);
120252 if (ret)
121253 return ret;
122254
123− return regmap_field_read_poll_timeout(phy->pll_ok, val, val, 1000,
124− PLL_LOCK_TIME);
255+ return regmap_field_read_poll_timeout(phy->fields[PLL_OK], val, val,
256+ 1000, PLL_LOCK_TIME);
125257 }
126258
127259 static void serdes_am654_disable_pll(struct serdes_am654 *phy)
@@ -129,41 +261,39 @@ static void serdes_am654_disable_pll(struct serdes_am654 *phy) · 1 unmodified line
129261 struct device *dev = phy->dev;
130262 int ret;
131263
132− ret = regmap_field_write(phy->pll_enable, PLL_DISABLE_STATE);
264+ ret = regmap_field_write(phy->fields[PLL_ENABLE], PLL_DISABLE_STATE);
133265 if (ret)
134266 dev_err(dev, "Failed to disable PLL\n");
135267 }
136268
137269 static int serdes_am654_enable_txrx(struct serdes_am654 *phy)
138270 {
139− int ret;
271+ int ret = 0;
140272
141273 /* Enable TX */
142− ret = regmap_field_write(phy->tx0_enable, TX0_ENABLE_STATE);
143− if (ret)
144− return ret;
274+ ret |= regmap_field_write(phy->fields[TX0_ENABLE], TX0_ENABLE_STATE);
145275
146276 /* Enable RX */
147− ret = regmap_field_write(phy->rx0_enable, RX0_ENABLE_STATE);
277+ ret |= regmap_field_write(phy->fields[RX0_ENABLE], RX0_ENABLE_STATE);
278+
148279 if (ret)
149− return ret;
280+ return -EIO;
150281
151282 return 0;
152283 }
153284
154285 static int serdes_am654_disable_txrx(struct serdes_am654 *phy)
155286 {
156− int ret;
287+ int ret = 0;
157288
158289 /* Disable TX */
159− ret = regmap_field_write(phy->tx0_enable, TX0_DISABLE_STATE);
160− if (ret)
161− return ret;
290+ ret |= regmap_field_write(phy->fields[TX0_ENABLE], TX0_DISABLE_STATE);
162291
163292 /* Disable RX */
164− ret = regmap_field_write(phy->rx0_enable, RX0_DISABLE_STATE);
293+ ret |= regmap_field_write(phy->fields[RX0_ENABLE], RX0_DISABLE_STATE);
294+
165295 if (ret)
166− return ret;
296+ return -EIO;
167297
168298 return 0;
169299 }
@@ -187,8 +317,8 @@ static int serdes_am654_power_on(struct phy *x) · 17 unmodified lines
187317 return ret;
188318 }
189319
190− return regmap_field_read_poll_timeout(phy->cmu_ok_i_0, val, val,
191− SLEEP_TIME, PLL_LOCK_TIME);
320+ return regmap_field_read_poll_timeout(phy->fields[CMU_OK_I_0], val,
321+ val, SLEEP_TIME, PLL_LOCK_TIME);
192322 }
193323
194324 static int serdes_am654_power_off(struct phy *x)
@@ -286,19 +416,37 @@ static int serdes_am654_usb3_init(struct serdes_am654 *phy) · 91 unmodified lines
286416
287417 static int serdes_am654_pcie_init(struct serdes_am654 *phy)
288418 {
289− int ret;
290−
291− ret = regmap_field_write(phy->config_version, VERSION);
292− if (ret)
293− return ret;
419+ int ret = 0;
294420
295− ret = regmap_field_write(phy->cmu_master_cdn_o, 0x1);
296− if (ret)
297− return ret;
421+ ret |= regmap_field_write(phy->fields[CMU_PLL_CTRL], 0x2);
422+ ret |= regmap_field_write(phy->fields[AHB_PMA_CM_VCO_VBIAS_VREG], 0x98);
423+ ret |= regmap_field_write(phy->fields[AHB_PMA_CM_VCO_BIAS_VREG], 0x98);
424+ ret |= regmap_field_write(phy->fields[AHB_PMA_CM_SR], 0x45);
425+ ret |= regmap_field_write(phy->fields[AHB_SSC_GEN_Z_O_20_13], 0xe);
426+ ret |= regmap_field_write(phy->fields[LANE_PLL_CTRL_RXEQ_RXIDLE], 0x5);
427+ ret |= regmap_field_write(phy->fields[AHB_PMA_LN_AGC_THSEL_VREGH], 0x83);
428+ ret |= regmap_field_write(phy->fields[AHB_PMA_LN_GEN3_AGC_SD_THSEL], 0x83);
429+ ret |= regmap_field_write(phy->fields[AHB_PMA_LN_RX_SELR_GEN3], 0x81);
430+ ret |= regmap_field_write(phy->fields[AHB_PMA_LN_TX_DRV], 0x3b);
431+ ret |= regmap_field_write(phy->fields[P2S_RBUF_PTR_DIFF], 0x3);
432+ ret |= regmap_field_write(phy->fields[CONFIG_VERSION], VERSION_VAL);
433+ ret |= regmap_field_write(phy->fields[COMRXEQ_MS_INIT_CTRL_7_0], 0xf);
434+ ret |= regmap_field_write(phy->fields[COMRXEQ_HS_INIT_CAL_7_0], 0x4f);
435+ ret |= regmap_field_write(phy->fields[COMRXEQ_MS_RECAL_CTRL_7_0], 0xf);
436+ ret |= regmap_field_write(phy->fields[COMRXEQ_HS_RECAL_CTRL_7_0], 0x4f);
437+ ret |= regmap_field_write(phy->fields[COMRXEQ_CSR_ATT_CONFIG], 0x7);
438+ ret |= regmap_field_write(phy->fields[COMRXEQ_CSR_EBSTADAPT_WIN_LEN], 0x7f);
439+ ret |= regmap_field_write(phy->fields[COMRXEQ_CTRL_3_4], 0xf);
440+ ret |= regmap_field_write(phy->fields[COMRXEQ_CTRL_14_15_16], 0x9a);
441+ ret |= regmap_field_write(phy->fields[COMRXEQ_CSR_DLEV_ERR_THRESH], 0x32);
442+ ret |= regmap_field_write(phy->fields[COMRXEQ_CTRL_25], 0x80);
443+ ret |= regmap_field_write(phy->fields[CSR_RXEQ_RATE_CHANGE_CAL_RUN_RATE2_O], 0xf);
444+ ret |= regmap_field_write(phy->fields[COMRXEQ_HS_RCHANGE_CTRL_7_0], 0x4f);
445+ ret |= regmap_field_write(phy->fields[CMU_MASTER_CDN], 0x1);
446+ ret |= regmap_field_write(phy->fields[L1_MASTER_CDN], 0x2);
298447
299− ret = regmap_field_write(phy->l1_master_cdn_o, 0x1);
300448 if (ret)
301− return ret;
449+ return -EIO;
302450
303451 return 0;
304452 }
@@ -320,20 +468,19 @@ static int serdes_am654_init(struct phy *x) · 15 unmodified lines
320468 static int serdes_am654_reset(struct phy *x)
321469 {
322470 struct serdes_am654 *phy = phy_get_drvdata(x);
323− int ret;
471+ int ret = 0;
324472
325473 serdes_am654_disable_pll(phy);
326474 serdes_am654_disable_txrx(phy);
327475
328− ret = regmap_field_write(phy->por_en, 0x1);
329− if (ret)
330− return ret;
476+ ret |= regmap_field_write(phy->fields[POR_EN], 0x1);
331477
332478 mdelay(1);
333479
334− ret = regmap_field_write(phy->por_en, 0x0);
480+ ret |= regmap_field_write(phy->fields[POR_EN], 0x0);
481+
335482 if (ret)
336− return ret;
483+ return -EIO;
337484
338485 return 0;
339486 }
@@ -587,66 +734,16 @@ static int serdes_am654_regfield_init(struct serdes_am654 *am654_phy) · 247 unmodified lines
587734 {
588735 struct regmap *regmap = am654_phy->regmap;
589736 struct device *dev = am654_phy->dev;
737+ int i;
590738
591− am654_phy->cmu_master_cdn_o = devm_regmap_field_alloc(dev, regmap,
592− cmu_master_cdn_o);
593− if (IS_ERR(am654_phy->cmu_master_cdn_o)) {
594− dev_err(dev, "CMU_MASTER_CDN_O reg field init failed\n");
595− return PTR_ERR(am654_phy->cmu_master_cdn_o);
596− }
597−
598− am654_phy->config_version = devm_regmap_field_alloc(dev, regmap,
599− config_version);
600− if (IS_ERR(am654_phy->config_version)) {
601− dev_err(dev, "CONFIG_VERSION reg field init failed\n");
602− return PTR_ERR(am654_phy->config_version);
603− }
604−
605− am654_phy->l1_master_cdn_o = devm_regmap_field_alloc(dev, regmap,
606− l1_master_cdn_o);
607− if (IS_ERR(am654_phy->l1_master_cdn_o)) {
608− dev_err(dev, "L1_MASTER_CDN_O reg field init failed\n");
609− return PTR_ERR(am654_phy->l1_master_cdn_o);
610− }
611−
612− am654_phy->cmu_ok_i_0 = devm_regmap_field_alloc(dev, regmap,
613− cmu_ok_i_0);
614− if (IS_ERR(am654_phy->cmu_ok_i_0)) {
615− dev_err(dev, "CMU_OK_I_0 reg field init failed\n");
616− return PTR_ERR(am654_phy->cmu_ok_i_0);
617− }
618−
619− am654_phy->por_en = devm_regmap_field_alloc(dev, regmap, por_en);
620− if (IS_ERR(am654_phy->por_en)) {
621− dev_err(dev, "POR_EN reg field init failed\n");
622− return PTR_ERR(am654_phy->por_en);
623− }
624−
625− am654_phy->tx0_enable = devm_regmap_field_alloc(dev, regmap,
626− tx0_enable);
627− if (IS_ERR(am654_phy->tx0_enable)) {
628− dev_err(dev, "TX0_ENABLE reg field init failed\n");
629− return PTR_ERR(am654_phy->tx0_enable);
630− }
631−
632− am654_phy->rx0_enable = devm_regmap_field_alloc(dev, regmap,
633− rx0_enable);
634− if (IS_ERR(am654_phy->rx0_enable)) {
635− dev_err(dev, "RX0_ENABLE reg field init failed\n");
636− return PTR_ERR(am654_phy->rx0_enable);
637− }
638−
639− am654_phy->pll_enable = devm_regmap_field_alloc(dev, regmap,
640− pll_enable);
641− if (IS_ERR(am654_phy->pll_enable)) {
642− dev_err(dev, "PLL_ENABLE reg field init failed\n");
643− return PTR_ERR(am654_phy->pll_enable);
644− }
645−
646− am654_phy->pll_ok = devm_regmap_field_alloc(dev, regmap, pll_ok);
647− if (IS_ERR(am654_phy->pll_ok)) {
648− dev_err(dev, "PLL_OK reg field init failed\n");
649− return PTR_ERR(am654_phy->pll_ok);
739+ for (i = 0; i < MAX_FIELDS; i++) {
740+ am654_phy->fields[i] = devm_regmap_field_alloc(dev,
741+ regmap,
742+ serdes_am654_reg_fields[i]);
743+ if (IS_ERR(am654_phy->fields[i])) {
744+ dev_err(dev, "Unable to allocate regmap field %d\n", i);
745+ return PTR_ERR(am654_phy->fields[i]);
746+ }
650747 }
651748
652749 return 0;
drivers/phy/ti/phy-gmii-sel.c+96−63
@@ -11,6 +11,7 @@ · 10 unmodified lines
1111 #include <linux/module.h>
1212 #include <linux/mfd/syscon.h>
1313 #include <linux/of.h>
14+#include <linux/of_address.h>
1415 #include <linux/of_net.h>
1516 #include <linux/phy.h>
1617 #include <linux/phy/phy.h>
@@ -22,7 +23,7 @@ · 5 unmodified lines
2223 #define AM33XX_GMII_SEL_MODE_RGMII 2
2324
2425 enum {
25− PHY_GMII_SEL_PORT_MODE,
26+ PHY_GMII_SEL_PORT_MODE = 0,
2627 PHY_GMII_SEL_RGMII_ID_MODE,
2728 PHY_GMII_SEL_RMII_IO_CLK_EN,
2829 PHY_GMII_SEL_LAST,
@@ -41,6 +42,7 @@ struct phy_gmii_sel_soc_data { · 12 unmodified lines
4142 u32 num_ports;
4243 u32 features;
4344 const struct reg_field (*regfields)[PHY_GMII_SEL_LAST];
45+ bool use_of_data;
4446 };
4547
4648 struct phy_gmii_sel_priv {
@@ -49,6 +51,8 @@ struct phy_gmii_sel_priv { · 2 unmodified lines
4951 struct regmap *regmap;
5052 struct phy_provider *phy_provider;
5153 struct phy_gmii_sel_phy_priv *if_phys;
54+ u32 num_ports;
55+ u32 reg_offset;
5256 };
5357
5458 static int phy_gmii_sel_mode(struct phy *phy, enum phy_mode mode, int submode)
@@ -147,13 +151,9 @@ static const · 92 unmodified lines
147151 struct reg_field phy_gmii_sel_fields_dra7[][PHY_GMII_SEL_LAST] = {
148152 {
149153 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 0, 1),
150− [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
151− [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
152154 },
153155 {
154156 [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x554, 4, 5),
155− [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
156− [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
157157 },
158158 };
159159
@@ -172,16 +172,19 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_dm814 = { · 12 unmodified lines
172172
173173 static const
174174 struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = {
175− {
176− [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1),
177− [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0),
178− [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0),
179− },
175+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x0, 0, 2), },
176+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4, 0, 2), },
177+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x8, 0, 2), },
178+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0xC, 0, 2), },
179+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x10, 0, 2), },
180+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x14, 0, 2), },
181+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x18, 0, 2), },
182+ { [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x1C, 0, 2), },
180183 };
181184
182185 static const
183186 struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = {
184− .num_ports = 1,
187+ .use_of_data = true,
185188 .regfields = phy_gmii_sel_fields_am654,
186189 };
187190
@@ -228,7 +231,7 @@ static struct phy *phy_gmii_sel_of_xlate(struct device *dev, · 40 unmodified lines
228231 if (priv->soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN) &&
229232 args->args_count < 2)
230233 return ERR_PTR(-EINVAL);
231− if (phy_id > priv->soc_data->num_ports)
234+ if (phy_id > priv->num_ports)
232235 return ERR_PTR(-EINVAL);
233236 if (phy_id != priv->if_phys[phy_id - 1].id)
234237 return ERR_PTR(-EINVAL);
@@ -242,68 +245,97 @@ static struct phy *phy_gmii_sel_of_xlate(struct device *dev, · 7 unmodified lines
242245 return priv->if_phys[phy_id].if_phy;
243246 }
244247
245−static int phy_gmii_sel_init_ports(struct phy_gmii_sel_priv *priv)
248+static int phy_gmii_init_phy(struct phy_gmii_sel_priv *priv, int port,
249+ struct phy_gmii_sel_phy_priv *if_phy)
246250 {
247251 const struct phy_gmii_sel_soc_data *soc_data = priv->soc_data;
248252 struct device *dev = priv->dev;
253+ const struct reg_field *fields;
254+ struct regmap_field *regfield;
255+ struct reg_field field;
256+ int ret;
257+
258+ if_phy->id = port;
259+ if_phy->priv = priv;
260+
261+ fields = soc_data->regfields[port - 1];
262+ field = *fields++;
263+ field.reg += priv->reg_offset;
264+ dev_dbg(dev, "%s field %x %d %d\n", __func__,
265+ field.reg, field.msb, field.lsb);
266+
267+ regfield = devm_regmap_field_alloc(dev, priv->regmap, field);
268+ if (IS_ERR(regfield))
269+ return PTR_ERR(regfield);
270+ if_phy->fields[PHY_GMII_SEL_PORT_MODE] = regfield;
271+
272+ field = *fields++;
273+ field.reg += priv->reg_offset;
274+ if (soc_data->features & BIT(PHY_GMII_SEL_RGMII_ID_MODE)) {
275+ regfield = devm_regmap_field_alloc(dev,
276+ priv->regmap,
277+ field);
278+ if (IS_ERR(regfield))
279+ return PTR_ERR(regfield);
280+ if_phy->fields[PHY_GMII_SEL_RGMII_ID_MODE] = regfield;
281+ dev_dbg(dev, "%s field %x %d %d\n", __func__,
282+ field.reg, field.msb, field.lsb);
283+ }
284+
285+ field = *fields;
286+ field.reg += priv->reg_offset;
287+ if (soc_data->features & BIT(PHY_GMII_SEL_RMII_IO_CLK_EN)) {
288+ regfield = devm_regmap_field_alloc(dev,
289+ priv->regmap,
290+ field);
291+ if (IS_ERR(regfield))
292+ return PTR_ERR(regfield);
293+ if_phy->fields[PHY_GMII_SEL_RMII_IO_CLK_EN] = regfield;
294+ dev_dbg(dev, "%s field %x %d %d\n", __func__,
295+ field.reg, field.msb, field.lsb);
296+ }
297+
298+ if_phy->if_phy = devm_phy_create(dev,
299+ priv->dev->of_node,
300+ &phy_gmii_sel_ops);
301+ if (IS_ERR(if_phy->if_phy)) {
302+ ret = PTR_ERR(if_phy->if_phy);
303+ dev_err(dev, "Failed to create phy%d %d\n", port, ret);
304+ return ret;
305+ }
306+ phy_set_drvdata(if_phy->if_phy, if_phy);
307+
308+ return 0;
309+}
310+
311+static int phy_gmii_sel_init_ports(struct phy_gmii_sel_priv *priv)
312+{
313+ const struct phy_gmii_sel_soc_data *soc_data = priv->soc_data;
249314 struct phy_gmii_sel_phy_priv *if_phys;
250− int i, num_ports, ret;
315+ struct device *dev = priv->dev;
316+ int i, ret;
251317
252− num_ports = priv->soc_data->num_ports;
318+ if (soc_data->use_of_data) {
319+ const __be32 *offset;
320+ u64 size;
253321
254− if_phys = devm_kcalloc(priv->dev, num_ports,
322+ offset = of_get_address(dev->of_node, 0, &size, NULL);
323+ priv->num_ports = size / sizeof(u32);
324+ if (!priv->num_ports)
325+ return -EINVAL;
326+ priv->reg_offset = __be32_to_cpu(*offset);
327+ }
328+
329+ if_phys = devm_kcalloc(dev, priv->num_ports,
255330 sizeof(*if_phys), GFP_KERNEL);
256331 if (!if_phys)
257332 return -ENOMEM;
258− dev_dbg(dev, "%s %d\n", __func__, num_ports);
259−
260− for (i = 0; i < num_ports; i++) {
261− const struct reg_field *field;
262− struct regmap_field *regfield;
333+ dev_dbg(dev, "%s %d\n", __func__, priv->num_ports);
263334
264− if_phys[i].id = i + 1;
265− if_phys[i].priv = priv;
266−
267− field = &soc_data->regfields[i][PHY_GMII_SEL_PORT_MODE];
268− dev_dbg(dev, "%s field %x %d %d\n", __func__,
269− field->reg, field->msb, field->lsb);
270−
271− regfield = devm_regmap_field_alloc(dev, priv->regmap, *field);
272− if (IS_ERR(regfield))
273− return PTR_ERR(regfield);
274− if_phys[i].fields[PHY_GMII_SEL_PORT_MODE] = regfield;
275−
276− field = &soc_data->regfields[i][PHY_GMII_SEL_RGMII_ID_MODE];
277− if (field->reg != (~0)) {
278− regfield = devm_regmap_field_alloc(dev,
279− priv->regmap,
280− *field);
281− if (IS_ERR(regfield))
282− return PTR_ERR(regfield);
283− if_phys[i].fields[PHY_GMII_SEL_RGMII_ID_MODE] =
284− regfield;
285− }
286−
287− field = &soc_data->regfields[i][PHY_GMII_SEL_RMII_IO_CLK_EN];
288− if (field->reg != (~0)) {
289− regfield = devm_regmap_field_alloc(dev,
290− priv->regmap,
291− *field);
292− if (IS_ERR(regfield))
293− return PTR_ERR(regfield);
294− if_phys[i].fields[PHY_GMII_SEL_RMII_IO_CLK_EN] =
295− regfield;
296− }
297−
298− if_phys[i].if_phy = devm_phy_create(dev,
299− priv->dev->of_node,
300− &phy_gmii_sel_ops);
301− if (IS_ERR(if_phys[i].if_phy)) {
302− ret = PTR_ERR(if_phys[i].if_phy);
303− dev_err(dev, "Failed to create phy%d %d\n", i, ret);
335+ for (i = 0; i < priv->num_ports; i++) {
336+ ret = phy_gmii_init_phy(priv, i + 1, &if_phys[i]);
337+ if (ret)
304338 return ret;
305− }
306− phy_set_drvdata(if_phys[i].if_phy, &if_phys[i]);
307339 }
308340
309341 priv->if_phys = if_phys;
@@ -328,6 +360,7 @@ static int phy_gmii_sel_probe(struct platform_device *pdev) · 18 unmodified lines
328360
329361 priv->dev = &pdev->dev;
330362 priv->soc_data = of_id->data;
363+ priv->num_ports = priv->soc_data->num_ports;
331364
332365 priv->regmap = syscon_node_to_regmap(node->parent);
333366 if (IS_ERR(priv->regmap)) {
drivers/phy/ti/phy-j721e-wiz.c+0−1
@@ -20,7 +20,6 @@ · 19 unmodified lines
2020 #include <linux/pm_runtime.h>
2121 #include <linux/regmap.h>
2222 #include <linux/reset-controller.h>
23−#include <dt-bindings/phy/phy.h>
2423
2524 #define WIZ_SERDES_CTRL 0x404
2625 #define WIZ_SERDES_TOP_CTRL 0x408
drivers/phy/ti/phy-omap-usb2.c+17−19
@@ -6,23 +6,23 @@ · 5 unmodified lines
66 * Author: Kishon Vijay Abraham I <kishon@ti.com>
77 */
88
9−#include <linux/module.h>
10−#include <linux/platform_device.h>
11−#include <linux/slab.h>
12−#include <linux/of.h>
13−#include <linux/io.h>
14−#include <linux/phy/omap_usb.h>
15−#include <linux/usb/phy_companion.h>
169 #include <linux/clk.h>
17−#include <linux/err.h>
18−#include <linux/pm_runtime.h>
1910 #include <linux/delay.h>
11+#include <linux/err.h>
12+#include <linux/io.h>
13+#include <linux/mfd/syscon.h>
14+#include <linux/module.h>
15+#include <linux/of.h>
16+#include <linux/of_platform.h>
2017 #include <linux/phy/omap_control_phy.h>
18+#include <linux/phy/omap_usb.h>
2119 #include <linux/phy/phy.h>
22−#include <linux/mfd/syscon.h>
20+#include <linux/platform_device.h>
21+#include <linux/pm_runtime.h>
2322 #include <linux/regmap.h>
24−#include <linux/of_platform.h>
23+#include <linux/slab.h>
2524 #include <linux/sys_soc.h>
25+#include <linux/usb/phy_companion.h>
2626
2727 #define USB2PHY_ANA_CONFIG1 0x4c
2828 #define USB2PHY_DISCON_BYP_LATCH BIT(31)
@@ -89,7 +89,7 @@ static inline void omap_usb_writel(void __iomem *addr, unsigned int offset, · 60 unmodified lines
8989 }
9090
9191 /**
92− * omap_usb2_set_comparator - links the comparator present in the sytem with
92+ * omap_usb2_set_comparator - links the comparator present in the system with
9393 * this phy
9494 * @comparator - the companion phy(comparator) for this phy
9595 *
@@ -142,7 +142,7 @@ static int omap_usb_set_host(struct usb_otg *otg, struct usb_bus *host) · 46 unmodified lines
142142 }
143143
144144 static int omap_usb_set_peripheral(struct usb_otg *otg,
145− struct usb_gadget *gadget)
145+ struct usb_gadget *gadget)
146146 {
147147 otg->gadget = gadget;
148148 if (!gadget)
@@ -409,7 +409,7 @@ static int omap_usb2_probe(struct platform_device *pdev) · 260 unmodified lines
409409 return PTR_ERR(phy->phy_base);
410410
411411 phy->syscon_phy_power = syscon_regmap_lookup_by_phandle(node,
412− "syscon-phy-power");
412+ "syscon-phy-power");
413413 if (IS_ERR(phy->syscon_phy_power)) {
414414 dev_dbg(&pdev->dev,
415415 "can't get syscon-phy-power, using control device\n");
@@ -438,7 +438,6 @@ static int omap_usb2_probe(struct platform_device *pdev) · 22 unmodified lines
438438 }
439439 }
440440
441−
442441 phy->wkupclk = devm_clk_get(phy->dev, "wkupclk");
443442 if (IS_ERR(phy->wkupclk)) {
444443 if (PTR_ERR(phy->wkupclk) == -EPROBE_DEFER)
@@ -452,10 +451,10 @@ static int omap_usb2_probe(struct platform_device *pdev) · 7 unmodified lines
452451 if (PTR_ERR(phy->wkupclk) != -EPROBE_DEFER)
453452 dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
454453 return PTR_ERR(phy->wkupclk);
455− } else {
456− dev_warn(&pdev->dev,
457− "found usb_phy_cm_clk32k, please fix DTS\n");
458454 }
455+
456+ dev_warn(&pdev->dev,
457+ "found usb_phy_cm_clk32k, please fix DTS\n");
459458 }
460459
461460 phy->optclk = devm_clk_get(phy->dev, "refclk");
@@ -504,7 +503,6 @@ static int omap_usb2_probe(struct platform_device *pdev) · 42 unmodified lines
504503 return PTR_ERR(phy_provider);
505504 }
506505
507−
508506 usb_add_phy_dev(&phy->phy);
509507
510508 return 0;
drivers/reset/Kconfig+11−0
@@ -140,6 +140,17 @@ config RESET_QCOM_PDC · 139 unmodified lines
140140 to control reset signals provided by PDC for Modem, Compute,
141141 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
142142
143+config RESET_RASPBERRYPI
144+ tristate "Raspberry Pi 4 Firmware Reset Driver"
145+ depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
146+ default USB_XHCI_PCI
147+ help
148+ Raspberry Pi 4's co-processor controls some of the board's HW
149+ initialization process, but it's up to Linux to trigger it when
150+ relevant. This driver provides a reset controller capable of
151+ interfacing with RPi4's co-processor and model these firmware
152+ initialization routines as reset lines.
153+
143154 config RESET_SCMI
144155 tristate "Reset driver controlled via ARM SCMI interface"
145156 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
drivers/reset/Makefile+1−0
@@ -21,6 +21,7 @@ obj-$(CONFIG_RESET_OXNAS) += reset-oxnas.o · 20 unmodified lines
2121 obj-$(CONFIG_RESET_PISTACHIO) += reset-pistachio.o
2222 obj-$(CONFIG_RESET_QCOM_AOSS) += reset-qcom-aoss.o
2323 obj-$(CONFIG_RESET_QCOM_PDC) += reset-qcom-pdc.o
24+obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
2425 obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
2526 obj-$(CONFIG_RESET_SIMPLE) += reset-simple.o
2627 obj-$(CONFIG_RESET_STM32MP157) += reset-stm32mp1.o
drivers/reset/reset-raspberrypi.c+122−0
@@ -0,0 +1,122 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * Raspberry Pi 4 firmware reset driver
4+ *
5+ * Copyright (C) 2020 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
6+ */
7+#include <linux/delay.h>
8+#include <linux/device.h>
9+#include <linux/module.h>
10+#include <linux/of.h>
11+#include <linux/platform_device.h>
12+#include <linux/reset-controller.h>
13+#include <soc/bcm2835/raspberrypi-firmware.h>
14+#include <dt-bindings/reset/raspberrypi,firmware-reset.h>
15+
16+struct rpi_reset {
17+ struct reset_controller_dev rcdev;
18+ struct rpi_firmware *fw;
19+};
20+
21+static inline struct rpi_reset *to_rpi(struct reset_controller_dev *rcdev)
22+{
23+ return container_of(rcdev, struct rpi_reset, rcdev);
24+}
25+
26+static int rpi_reset_reset(struct reset_controller_dev *rcdev, unsigned long id)
27+{
28+ struct rpi_reset *priv = to_rpi(rcdev);
29+ u32 dev_addr;
30+ int ret;
31+
32+ switch (id) {
33+ case RASPBERRYPI_FIRMWARE_RESET_ID_USB:
34+ /*
35+ * The Raspberry Pi 4 gets its USB functionality from VL805, a
36+ * PCIe chip that implements xHCI. After a PCI reset, VL805's
37+ * firmware may either be loaded directly from an EEPROM or, if
38+ * not present, by the SoC's co-processor, VideoCore. rpi's
39+ * VideoCore OS contains both the non public firmware load
40+ * logic and the VL805 firmware blob. This triggers the
41+ * aforementioned process.
42+ *
43+ * The pci device address is expected is expected by the
44+ * firmware encoded like this:
45+ *
46+ * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
47+ *
48+ * But since rpi's PCIe is hardwired, we know the address in
49+ * advance.
50+ */
51+ dev_addr = 0x100000;
52+ ret = rpi_firmware_property(priv->fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET,
53+ &dev_addr, sizeof(dev_addr));
54+ if (ret)
55+ return ret;
56+
57+ /* Wait for vl805 to startup */
58+ usleep_range(200, 1000);
59+ break;
60+
61+ default:
62+ return -EINVAL;
63+ }
64+
65+ return 0;
66+}
67+
68+static const struct reset_control_ops rpi_reset_ops = {
69+ .reset = rpi_reset_reset,
70+};
71+
72+static int rpi_reset_probe(struct platform_device *pdev)
73+{
74+ struct device *dev = &pdev->dev;
75+ struct rpi_firmware *fw;
76+ struct device_node *np;
77+ struct rpi_reset *priv;
78+
79+ np = of_get_parent(dev->of_node);
80+ if (!np) {
81+ dev_err(dev, "Missing firmware node\n");
82+ return -ENOENT;
83+ }
84+
85+ fw = rpi_firmware_get(np);
86+ of_node_put(np);
87+ if (!fw)
88+ return -EPROBE_DEFER;
89+
90+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
91+ if (!priv)
92+ return -ENOMEM;
93+
94+ dev_set_drvdata(dev, priv);
95+
96+ priv->fw = fw;
97+ priv->rcdev.owner = THIS_MODULE;
98+ priv->rcdev.nr_resets = RASPBERRYPI_FIRMWARE_RESET_NUM_IDS;
99+ priv->rcdev.ops = &rpi_reset_ops;
100+ priv->rcdev.of_node = dev->of_node;
101+
102+ return devm_reset_controller_register(dev, &priv->rcdev);
103+}
104+
105+static const struct of_device_id rpi_reset_of_match[] = {
106+ { .compatible = "raspberrypi,firmware-reset" },
107+ { /* sentinel */ }
108+};
109+MODULE_DEVICE_TABLE(of, rpi_reset_of_match);
110+
111+static struct platform_driver rpi_reset_driver = {
112+ .probe = rpi_reset_probe,
113+ .driver = {
114+ .name = "raspberrypi-reset",
115+ .of_match_table = rpi_reset_of_match,
116+ },
117+};
118+module_platform_driver(rpi_reset_driver);
119+
120+MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
121+MODULE_DESCRIPTION("Raspberry Pi 4 firmware reset driver");
122+MODULE_LICENSE("GPL");
drivers/staging/media/Kconfig+0−2
@@ -44,8 +44,6 @@ source "drivers/staging/media/tegra-video/Kconfig" · 43 unmodified lines
4444
4545 source "drivers/staging/media/ipu3/Kconfig"
4646
47−source "drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig"
48−
4947 source "drivers/staging/media/rkisp1/Kconfig"
5048
5149 endif
drivers/staging/media/Makefile+0−1
@@ -10,6 +10,5 @@ obj-$(CONFIG_VIDEO_TEGRA) += tegra-video/ · 9 unmodified lines
1010 obj-$(CONFIG_TEGRA_VDE) += tegra-vde/
1111 obj-$(CONFIG_VIDEO_HANTRO) += hantro/
1212 obj-$(CONFIG_VIDEO_IPU3_IMGU) += ipu3/
13−obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0/
1413 obj-$(CONFIG_VIDEO_ROCKCHIP_ISP1) += rkisp1/
1514 obj-$(CONFIG_VIDEO_ZORAN) += zoran/
drivers/staging/media/phy-rockchip-dphy-rx0/Kconfig+0−13
@@ -1,13 +0,0 @@
1−# SPDX-License-Identifier: GPL-2.0-only
2−
3−config PHY_ROCKCHIP_DPHY_RX0
4− tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
5− depends on ARCH_ROCKCHIP || COMPILE_TEST
6− select GENERIC_PHY_MIPI_DPHY
7− select GENERIC_PHY
8− help
9− Enable this to support the Rockchip MIPI Synopsys DPHY RX0
10− associated to the Rockchip ISP module present in RK3399 SoCs.
11−
12− To compile this driver as a module, choose M here: the module
13− will be called phy-rockchip-dphy-rx0.
drivers/staging/media/phy-rockchip-dphy-rx0/Makefile+0−2
@@ -1,2 +0,0 @@
1−# SPDX-License-Identifier: GPL-2.0
2−obj-$(CONFIG_PHY_ROCKCHIP_DPHY_RX0) += phy-rockchip-dphy-rx0.o
drivers/staging/media/phy-rockchip-dphy-rx0/TODO+0−6
@@ -1,6 +0,0 @@
1−The main reason for keeping this in staging is because the only driver
2−that uses this is rkisp1, which is also in staging. It should be moved together
3−with rkisp1.
4−
5−Please CC patches to Linux Media <linux-media@vger.kernel.org> and
6−Helen Koike <helen.koike@collabora.com>.
drivers/thunderbolt/Kconfig+13−1
@@ -16,7 +16,19 @@ menuconfig USB4 · 15 unmodified lines
1616 To compile this driver a module, choose M here. The module will be
1717 called thunderbolt.
1818
19+if USB4
20+
21+config USB4_DEBUGFS_WRITE
22+ bool "Enable write by debugfs to configuration spaces (DANGEROUS)"
23+ help
24+ Enables writing to device configuration registers through
25+ debugfs interface.
26+
27+ Only enable this if you know what you are doing! Never enable
28+ this for production systems or distro kernels.
29+
1930 config USB4_KUNIT_TEST
2031 bool "KUnit tests"
2132 depends on KUNIT=y
22− depends on USB4=y
33+
34+endif # USB4
drivers/thunderbolt/Makefile+3−1
@@ -4,4 +4,6 @@ thunderbolt-objs := nhi.o nhi_ops.o ctl.o tb.o switch.o cap.o path.o tunnel.o ee · 3 unmodified lines
44 thunderbolt-objs += domain.o dma_port.o icm.o property.o xdomain.o lc.o tmu.o usb4.o
55 thunderbolt-objs += nvm.o retimer.o quirks.o
66
7−obj-${CONFIG_USB4_KUNIT_TEST} += test.o
7+thunderbolt-${CONFIG_ACPI} += acpi.o
8+thunderbolt-$(CONFIG_DEBUG_FS) += debugfs.o
9+thunderbolt-${CONFIG_USB4_KUNIT_TEST} += test.o
drivers/thunderbolt/acpi.c+117−0
@@ -0,0 +1,117 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * ACPI support
4+ *
5+ * Copyright (C) 2020, Intel Corporation
6+ * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
7+ */
8+
9+#include <linux/acpi.h>
10+
11+#include "tb.h"
12+
13+static acpi_status tb_acpi_add_link(acpi_handle handle, u32 level, void *data,
14+ void **return_value)
15+{
16+ struct fwnode_reference_args args;
17+ struct fwnode_handle *fwnode;
18+ struct tb_nhi *nhi = data;
19+ struct acpi_device *adev;
20+ struct pci_dev *pdev;
21+ struct device *dev;
22+ int ret;
23+
24+ if (acpi_bus_get_device(handle, &adev))
25+ return AE_OK;
26+
27+ fwnode = acpi_fwnode_handle(adev);
28+ ret = fwnode_property_get_reference_args(fwnode, "usb4-host-interface",
29+ NULL, 0, 0, &args);
30+ if (ret)
31+ return AE_OK;
32+
33+ /* It needs to reference this NHI */
34+ if (nhi->pdev->dev.fwnode != args.fwnode)
35+ goto out_put;
36+
37+ /*
38+ * Try to find physical device walking upwards to the hierarcy.
39+ * We need to do this because the xHCI driver might not yet be
40+ * bound so the USB3 SuperSpeed ports are not yet created.
41+ */
42+ dev = acpi_get_first_physical_node(adev);
43+ while (!dev) {
44+ adev = adev->parent;
45+ if (!adev)
46+ break;
47+ dev = acpi_get_first_physical_node(adev);
48+ }
49+
50+ if (!dev)
51+ goto out_put;
52+
53+ /*
54+ * Check that the device is PCIe. This is because USB3
55+ * SuperSpeed ports have this property and they are not power
56+ * managed with the xHCI and the SuperSpeed hub so we create the
57+ * link from xHCI instead.
58+ */
59+ while (!dev_is_pci(dev))
60+ dev = dev->parent;
61+
62+ if (!dev)
63+ goto out_put;
64+
65+ /*
66+ * Check that this actually matches the type of device we
67+ * expect. It should either be xHCI or PCIe root/downstream
68+ * port.
69+ */
70+ pdev = to_pci_dev(dev);
71+ if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI ||
72+ (pci_is_pcie(pdev) &&
73+ (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT ||
74+ pci_pcie_type(pdev) == PCI_EXP_TYPE_DOWNSTREAM))) {
75+ const struct device_link *link;
76+
77+ link = device_link_add(&pdev->dev, &nhi->pdev->dev,
78+ DL_FLAG_AUTOREMOVE_SUPPLIER |
79+ DL_FLAG_PM_RUNTIME);
80+ if (link) {
81+ dev_dbg(&nhi->pdev->dev, "created link from %s\n",
82+ dev_name(&pdev->dev));
83+ } else {
84+ dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n",
85+ dev_name(&pdev->dev));
86+ }
87+ }
88+
89+out_put:
90+ fwnode_handle_put(args.fwnode);
91+ return AE_OK;
92+}
93+
94+/**
95+ * tb_acpi_add_links() - Add device links based on ACPI description
96+ * @nhi: Pointer to NHI
97+ *
98+ * Goes over ACPI namespace finding tunneled ports that reference to
99+ * @nhi ACPI node. For each reference a device link is added. The link
100+ * is automatically removed by the driver core.
101+ */
102+void tb_acpi_add_links(struct tb_nhi *nhi)
103+{
104+ acpi_status status;
105+
106+ if (!has_acpi_companion(&nhi->pdev->dev))
107+ return;
108+
109+ /*
110+ * Find all devices that have usb4-host-controller interface
111+ * property that references to this NHI.
112+ */
113+ status = acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, 32,
114+ tb_acpi_add_link, NULL, nhi, NULL);
115+ if (ACPI_FAILURE(status))
116+ dev_warn(&nhi->pdev->dev, "failed to enumerate tunneled ports\n");
117+}
drivers/thunderbolt/cap.c+94−42
@@ -15,14 +15,6 @@ · 14 unmodified lines
1515 #define VSE_CAP_OFFSET_MAX 0xffff
1616 #define TMU_ACCESS_EN BIT(20)
1717
18−struct tb_cap_any {
19− union {
20− struct tb_cap_basic basic;
21− struct tb_cap_extended_short extended_short;
22− struct tb_cap_extended_long extended_long;
23− };
24−} __packed;
25−
2618 static int tb_port_enable_tmu(struct tb_port *port, bool enable)
2719 {
2820 struct tb_switch *sw = port->sw;
@@ -67,23 +59,50 @@ static void tb_port_dummy_read(struct tb_port *port) · 38 unmodified lines
6759 }
6860 }
6961
62+/**
63+ * tb_port_next_cap() - Return next capability in the linked list
64+ * @port: Port to find the capability for
65+ * @offset: Previous capability offset (%0 for start)
66+ *
67+ * Returns dword offset of the next capability in port config space
68+ * capability list and returns it. Passing %0 returns the first entry in
69+ * the capability list. If no next capability is found returns %0. In case
70+ * of failure returns negative errno.
71+ */
72+int tb_port_next_cap(struct tb_port *port, unsigned int offset)
73+{
74+ struct tb_cap_any header;
75+ int ret;
76+
77+ if (!offset)
78+ return port->config.first_cap_offset;
79+
80+ ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1);
81+ if (ret)
82+ return ret;
83+
84+ return header.basic.next;
85+}
86+
7087 static int __tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap)
7188 {
72− u32 offset = 1;
89+ int offset = 0;
7390
7491 do {
7592 struct tb_cap_any header;
7693 int ret;
7794
95+ offset = tb_port_next_cap(port, offset);
96+ if (offset < 0)
97+ return offset;
98+
7899 ret = tb_port_read(port, &header, TB_CFG_PORT, offset, 1);
79100 if (ret)
80101 return ret;
81102
82103 if (header.basic.cap == cap)
83104 return offset;
84−
85− offset = header.basic.next;
86− } while (offset);
105+ } while (offset > 0);
87106
88107 return -ENOENT;
89108 }
@@ -113,6 +132,50 @@ int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) · 23 unmodified lines
113132 return ret;
114133 }
115134
135+/**
136+ * tb_switch_next_cap() - Return next capability in the linked list
137+ * @sw: Switch to find the capability for
138+ * @offset: Previous capability offset (%0 for start)
139+ *
140+ * Finds dword offset of the next capability in router config space
141+ * capability list and returns it. Passing %0 returns the first entry in
142+ * the capability list. If no next capability is found returns %0. In case
143+ * of failure returns negative errno.
144+ */
145+int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset)
146+{
147+ struct tb_cap_any header;
148+ int ret;
149+
150+ if (!offset)
151+ return sw->config.first_cap_offset;
152+
153+ ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 2);
154+ if (ret)
155+ return ret;
156+
157+ switch (header.basic.cap) {
158+ case TB_SWITCH_CAP_TMU:
159+ ret = header.basic.next;
160+ break;
161+
162+ case TB_SWITCH_CAP_VSE:
163+ if (!header.extended_short.length)
164+ ret = header.extended_long.next;
165+ else
166+ ret = header.extended_short.next;
167+ break;
168+
169+ default:
170+ tb_sw_dbg(sw, "unknown capability %#x at %#x\n",
171+ header.basic.cap, offset);
172+ ret = -EINVAL;
173+ break;
174+ }
175+
176+ return ret >= VSE_CAP_OFFSET_MAX ? 0 : ret;
177+}
178+
116179 /**
117180 * tb_switch_find_cap() - Find switch capability
118181 * @sw Switch to find the capability for
@@ -124,21 +187,23 @@ int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap) · 5 unmodified lines
124187 */
125188 int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap)
126189 {
127− int offset = sw->config.first_cap_offset;
190+ int offset = 0;
128191
129− while (offset > 0 && offset < CAP_OFFSET_MAX) {
192+ do {
130193 struct tb_cap_any header;
131194 int ret;
132195
196+ offset = tb_switch_next_cap(sw, offset);
197+ if (offset < 0)
198+ return offset;
199+
133200 ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1);
134201 if (ret)
135202 return ret;
136203
137204 if (header.basic.cap == cap)
138205 return offset;
139−
140− offset = header.basic.next;
141− }
206+ } while (offset);
142207
143208 return -ENOENT;
144209 }
@@ -155,37 +220,24 @@ int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap) · 10 unmodified lines
155220 */
156221 int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec)
157222 {
158− struct tb_cap_any header;
159− int offset;
223+ int offset = 0;
160224
161− offset = tb_switch_find_cap(sw, TB_SWITCH_CAP_VSE);
162− if (offset < 0)
163− return offset;
164−
165− while (offset > 0 && offset < VSE_CAP_OFFSET_MAX) {
225+ do {
226+ struct tb_cap_any header;
166227 int ret;
167228
168− ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 2);
229+ offset = tb_switch_next_cap(sw, offset);
230+ if (offset < 0)
231+ return offset;
232+
233+ ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, offset, 1);
169234 if (ret)
170235 return ret;
171236
172− /*
173− * Extended vendor specific capabilities come in two
174− * flavors: short and long. The latter is used when
175− * offset is over 0xff.
176− */
177− if (offset >= CAP_OFFSET_MAX) {
178− if (header.extended_long.vsec_id == vsec)
179− return offset;
180− offset = header.extended_long.next;
181− } else {
182− if (header.extended_short.vsec_id == vsec)
183− return offset;
184− if (!header.extended_short.length)
185− return -ENOENT;
186− offset = header.extended_short.next;
187− }
188− }
237+ if (header.extended_short.cap == TB_SWITCH_CAP_VSE &&
238+ header.extended_short.vsec_id == vsec)
239+ return offset;
240+ } while (offset);
189241
190242 return -ENOENT;
191243 }
drivers/thunderbolt/ctl.c+17−6
@@ -219,6 +219,7 @@ static int check_config_address(struct tb_cfg_address addr, · 218 unmodified lines
219219 static struct tb_cfg_result decode_error(const struct ctl_pkg *response)
220220 {
221221 struct cfg_error_pkg *pkg = response->buffer;
222+ struct tb_ctl *ctl = response->ctl;
222223 struct tb_cfg_result res = { 0 };
223224 res.response_route = tb_cfg_get_route(&pkg->header);
224225 res.response_port = 0;
@@ -227,9 +228,13 @@ static struct tb_cfg_result decode_error(const struct ctl_pkg *response) · 2 unmodified lines
227228 if (res.err)
228229 return res;
229230
230− WARN(pkg->zero1, "pkg->zero1 is %#x\n", pkg->zero1);
231− WARN(pkg->zero2, "pkg->zero1 is %#x\n", pkg->zero1);
232− WARN(pkg->zero3, "pkg->zero1 is %#x\n", pkg->zero1);
231+ if (pkg->zero1)
232+ tb_ctl_warn(ctl, "pkg->zero1 is %#x\n", pkg->zero1);
233+ if (pkg->zero2)
234+ tb_ctl_warn(ctl, "pkg->zero2 is %#x\n", pkg->zero2);
235+ if (pkg->zero3)
236+ tb_ctl_warn(ctl, "pkg->zero3 is %#x\n", pkg->zero3);
237+
233238 res.err = 1;
234239 res.tb_error = pkg->error;
235240 res.response_port = pkg->port;
@@ -266,9 +271,8 @@ static void tb_cfg_print_error(struct tb_ctl *ctl, · 30 unmodified lines
266271 * Invalid cfg_space/offset/length combination in
267272 * cfg_read/cfg_write.
268273 */
269− tb_ctl_WARN(ctl,
270− "CFG_ERROR(%llx:%x): Invalid config space or offset\n",
271− res->response_route, res->response_port);
274+ tb_ctl_dbg(ctl, "%llx:%x: invalid config space or offset\n",
275+ res->response_route, res->response_port);
272276 return;
273277 case TB_CFG_ERROR_NO_SUCH_PORT:
274278 /*
@@ -283,6 +287,10 @@ static void tb_cfg_print_error(struct tb_ctl *ctl, · 8 unmodified lines
283287 tb_ctl_WARN(ctl, "CFG_ERROR(%llx:%x): Route contains a loop\n",
284288 res->response_route, res->response_port);
285289 return;
290+ case TB_CFG_ERROR_LOCK:
291+ tb_ctl_warn(ctl, "%llx:%x: downstream port is locked\n",
292+ res->response_route, res->response_port);
293+ return;
286294 default:
287295 /* 5,6,7,9 and 11 are also valid error codes */
288296 tb_ctl_WARN(ctl, "CFG_ERROR(%llx:%x): Unknown error\n",
@@ -951,6 +959,9 @@ static int tb_cfg_get_error(struct tb_ctl *ctl, enum tb_cfg_space space, · 662 unmodified lines
951959 return -ENODEV;
952960
953961 tb_cfg_print_error(ctl, res);
962+
963+ if (res->tb_error == TB_CFG_ERROR_LOCK)
964+ return -EACCES;
954965 return -EIO;
955966 }
956967
drivers/thunderbolt/debugfs.c+701−0
@@ -0,0 +1,701 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * Debugfs interface
4+ *
5+ * Copyright (C) 2020, Intel Corporation
6+ * Authors: Gil Fine <gil.fine@intel.com>
7+ * Mika Westerberg <mika.westerberg@linux.intel.com>
8+ */
9+
10+#include <linux/debugfs.h>
11+#include <linux/pm_runtime.h>
12+
13+#include "tb.h"
14+
15+#define PORT_CAP_PCIE_LEN 1
16+#define PORT_CAP_POWER_LEN 2
17+#define PORT_CAP_LANE_LEN 3
18+#define PORT_CAP_USB3_LEN 5
19+#define PORT_CAP_DP_LEN 8
20+#define PORT_CAP_TMU_LEN 8
21+#define PORT_CAP_BASIC_LEN 9
22+#define PORT_CAP_USB4_LEN 20
23+
24+#define SWITCH_CAP_TMU_LEN 26
25+#define SWITCH_CAP_BASIC_LEN 27
26+
27+#define PATH_LEN 2
28+
29+#define COUNTER_SET_LEN 3
30+
31+#define DEBUGFS_ATTR(__space, __write) \
32+static int __space ## _open(struct inode *inode, struct file *file) \
33+{ \
34+ return single_open(file, __space ## _show, inode->i_private); \
35+} \
36+ \
37+static const struct file_operations __space ## _fops = { \
38+ .owner = THIS_MODULE, \
39+ .open = __space ## _open, \
40+ .release = single_release, \
41+ .read = seq_read, \
42+ .write = __write, \
43+ .llseek = seq_lseek, \
44+}
45+
46+#define DEBUGFS_ATTR_RO(__space) \
47+ DEBUGFS_ATTR(__space, NULL)
48+
49+#define DEBUGFS_ATTR_RW(__space) \
50+ DEBUGFS_ATTR(__space, __space ## _write)
51+
52+static struct dentry *tb_debugfs_root;
53+
54+static void *validate_and_copy_from_user(const void __user *user_buf,
55+ size_t *count)
56+{
57+ size_t nbytes;
58+ void *buf;
59+
60+ if (!*count)
61+ return ERR_PTR(-EINVAL);
62+
63+ if (!access_ok(user_buf, *count))
64+ return ERR_PTR(-EFAULT);
65+
66+ buf = (void *)get_zeroed_page(GFP_KERNEL);
67+ if (!buf)
68+ return ERR_PTR(-ENOMEM);
69+
70+ nbytes = min_t(size_t, *count, PAGE_SIZE);
71+ if (copy_from_user(buf, user_buf, nbytes)) {
72+ free_page((unsigned long)buf);
73+ return ERR_PTR(-EFAULT);
74+ }
75+
76+ *count = nbytes;
77+ return buf;
78+}
79+
80+static bool parse_line(char **line, u32 *offs, u32 *val, int short_fmt_len,
81+ int long_fmt_len)
82+{
83+ char *token;
84+ u32 v[5];
85+ int ret;
86+
87+ token = strsep(line, "\n");
88+ if (!token)
89+ return false;
90+
91+ /*
92+ * For Adapter/Router configuration space:
93+ * Short format is: offset value\n
94+ * v[0] v[1]
95+ * Long format as produced from the read side:
96+ * offset relative_offset cap_id vs_cap_id value\n
97+ * v[0] v[1] v[2] v[3] v[4]
98+ *
99+ * For Counter configuration space:
100+ * Short format is: offset\n
101+ * v[0]
102+ * Long format as produced from the read side:
103+ * offset relative_offset counter_id value\n
104+ * v[0] v[1] v[2] v[3]
105+ */
106+ ret = sscanf(token, "%i %i %i %i %i", &v[0], &v[1], &v[2], &v[3], &v[4]);
107+ /* In case of Counters, clear counter, "val" content is NA */
108+ if (ret == short_fmt_len) {
109+ *offs = v[0];
110+ *val = v[short_fmt_len - 1];
111+ return true;
112+ } else if (ret == long_fmt_len) {
113+ *offs = v[0];
114+ *val = v[long_fmt_len - 1];
115+ return true;
116+ }
117+
118+ return false;
119+}
120+
121+#if IS_ENABLED(CONFIG_USB4_DEBUGFS_WRITE)
122+static ssize_t regs_write(struct tb_switch *sw, struct tb_port *port,
123+ const char __user *user_buf, size_t count,
124+ loff_t *ppos)
125+{
126+ struct tb *tb = sw->tb;
127+ char *line, *buf;
128+ u32 val, offset;
129+ int ret = 0;
130+
131+ buf = validate_and_copy_from_user(user_buf, &count);
132+ if (IS_ERR(buf))
133+ return PTR_ERR(buf);
134+
135+ pm_runtime_get_sync(&sw->dev);
136+
137+ if (mutex_lock_interruptible(&tb->lock)) {
138+ ret = -ERESTARTSYS;
139+ goto out;
140+ }
141+
142+ /* User did hardware changes behind the driver's back */
143+ add_taint(TAINT_USER, LOCKDEP_STILL_OK);
144+
145+ line = buf;
146+ while (parse_line(&line, &offset, &val, 2, 5)) {
147+ if (port)
148+ ret = tb_port_write(port, &val, TB_CFG_PORT, offset, 1);
149+ else
150+ ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, offset, 1);
151+ if (ret)
152+ break;
153+ }
154+
155+ mutex_unlock(&tb->lock);
156+
157+out:
158+ pm_runtime_mark_last_busy(&sw->dev);
159+ pm_runtime_put_autosuspend(&sw->dev);
160+ free_page((unsigned long)buf);
161+
162+ return ret < 0 ? ret : count;
163+}
164+
165+static ssize_t port_regs_write(struct file *file, const char __user *user_buf,
166+ size_t count, loff_t *ppos)
167+{
168+ struct seq_file *s = file->private_data;
169+ struct tb_port *port = s->private;
170+
171+ return regs_write(port->sw, port, user_buf, count, ppos);
172+}
173+
174+static ssize_t switch_regs_write(struct file *file, const char __user *user_buf,
175+ size_t count, loff_t *ppos)
176+{
177+ struct seq_file *s = file->private_data;
178+ struct tb_switch *sw = s->private;
179+
180+ return regs_write(sw, NULL, user_buf, count, ppos);
181+}
182+#define DEBUGFS_MODE 0600
183+#else
184+#define port_regs_write NULL
185+#define switch_regs_write NULL
186+#define DEBUGFS_MODE 0400
187+#endif
188+
189+static int port_clear_all_counters(struct tb_port *port)
190+{
191+ u32 *buf;
192+ int ret;
193+
194+ buf = kcalloc(COUNTER_SET_LEN * port->config.max_counters, sizeof(u32),
195+ GFP_KERNEL);
196+ if (!buf)
197+ return -ENOMEM;
198+
199+ ret = tb_port_write(port, buf, TB_CFG_COUNTERS, 0,
200+ COUNTER_SET_LEN * port->config.max_counters);
201+ kfree(buf);
202+
203+ return ret;
204+}
205+
206+static ssize_t counters_write(struct file *file, const char __user *user_buf,
207+ size_t count, loff_t *ppos)
208+{
209+ struct seq_file *s = file->private_data;
210+ struct tb_port *port = s->private;
211+ struct tb_switch *sw = port->sw;
212+ struct tb *tb = port->sw->tb;
213+ char *buf;
214+ int ret;
215+
216+ buf = validate_and_copy_from_user(user_buf, &count);
217+ if (IS_ERR(buf))
218+ return PTR_ERR(buf);
219+
220+ pm_runtime_get_sync(&sw->dev);
221+
222+ if (mutex_lock_interruptible(&tb->lock)) {
223+ ret = -ERESTARTSYS;
224+ goto out;
225+ }
226+
227+ /* If written delimiter only, clear all counters in one shot */
228+ if (buf[0] == '\n') {
229+ ret = port_clear_all_counters(port);
230+ } else {
231+ char *line = buf;
232+ u32 val, offset;
233+
234+ ret = -EINVAL;
235+ while (parse_line(&line, &offset, &val, 1, 4)) {
236+ ret = tb_port_write(port, &val, TB_CFG_COUNTERS,
237+ offset, 1);
238+ if (ret)
239+ break;
240+ }
241+ }
242+
243+ mutex_unlock(&tb->lock);
244+
245+out:
246+ pm_runtime_mark_last_busy(&sw->dev);
247+ pm_runtime_put_autosuspend(&sw->dev);
248+ free_page((unsigned long)buf);
249+
250+ return ret < 0 ? ret : count;
251+}
252+
253+static void cap_show(struct seq_file *s, struct tb_switch *sw,
254+ struct tb_port *port, unsigned int cap, u8 cap_id,
255+ u8 vsec_id, int length)
256+{
257+ int ret, offset = 0;
258+
259+ while (length > 0) {
260+ int i, dwords = min(length, TB_MAX_CONFIG_RW_LENGTH);
261+ u32 data[TB_MAX_CONFIG_RW_LENGTH];
262+
263+ if (port)
264+ ret = tb_port_read(port, data, TB_CFG_PORT, cap + offset,
265+ dwords);
266+ else
267+ ret = tb_sw_read(sw, data, TB_CFG_SWITCH, cap + offset, dwords);
268+ if (ret) {
269+ seq_printf(s, "0x%04x <not accessible>\n",
270+ cap + offset);
271+ if (dwords > 1)
272+ seq_printf(s, "0x%04x ...\n", cap + offset + 1);
273+ return;
274+ }
275+
276+ for (i = 0; i < dwords; i++) {
277+ seq_printf(s, "0x%04x %4d 0x%02x 0x%02x 0x%08x\n",
278+ cap + offset + i, offset + i,
279+ cap_id, vsec_id, data[i]);
280+ }
281+
282+ length -= dwords;
283+ offset += dwords;
284+ }
285+}
286+
287+static void port_cap_show(struct tb_port *port, struct seq_file *s,
288+ unsigned int cap)
289+{
290+ struct tb_cap_any header;
291+ u8 vsec_id = 0;
292+ size_t length;
293+ int ret;
294+
295+ ret = tb_port_read(port, &header, TB_CFG_PORT, cap, 1);
296+ if (ret) {
297+ seq_printf(s, "0x%04x <capability read failed>\n", cap);
298+ return;
299+ }
300+
301+ switch (header.basic.cap) {
302+ case TB_PORT_CAP_PHY:
303+ length = PORT_CAP_LANE_LEN;
304+ break;
305+
306+ case TB_PORT_CAP_TIME1:
307+ length = PORT_CAP_TMU_LEN;
308+ break;
309+
310+ case TB_PORT_CAP_POWER:
311+ length = PORT_CAP_POWER_LEN;
312+ break;
313+
314+ case TB_PORT_CAP_ADAP:
315+ if (tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) {
316+ length = PORT_CAP_PCIE_LEN;
317+ } else if (tb_port_is_dpin(port) || tb_port_is_dpout(port)) {
318+ length = PORT_CAP_DP_LEN;
319+ } else if (tb_port_is_usb3_down(port) ||
320+ tb_port_is_usb3_up(port)) {
321+ length = PORT_CAP_USB3_LEN;
322+ } else {
323+ seq_printf(s, "0x%04x <unsupported capability 0x%02x>\n",
324+ cap, header.basic.cap);
325+ return;
326+ }
327+ break;
328+
329+ case TB_PORT_CAP_VSE:
330+ if (!header.extended_short.length) {
331+ ret = tb_port_read(port, (u32 *)&header + 1, TB_CFG_PORT,
332+ cap + 1, 1);
333+ if (ret) {
334+ seq_printf(s, "0x%04x <capability read failed>\n",
335+ cap + 1);
336+ return;
337+ }
338+ length = header.extended_long.length;
339+ vsec_id = header.extended_short.vsec_id;
340+ } else {
341+ length = header.extended_short.length;
342+ vsec_id = header.extended_short.vsec_id;
343+ /*
344+ * Ice Lake and Tiger Lake do not implement the
345+ * full length of the capability, only first 32
346+ * dwords so hard-code it here.
347+ */
348+ if (!vsec_id &&
349+ (tb_switch_is_ice_lake(port->sw) ||
350+ tb_switch_is_tiger_lake(port->sw)))
351+ length = 32;
352+ }
353+ break;
354+
355+ case TB_PORT_CAP_USB4:
356+ length = PORT_CAP_USB4_LEN;
357+ break;
358+
359+ default:
360+ seq_printf(s, "0x%04x <unsupported capability 0x%02x>\n",
361+ cap, header.basic.cap);
362+ return;
363+ }
364+
365+ cap_show(s, NULL, port, cap, header.basic.cap, vsec_id, length);
366+}
367+
368+static void port_caps_show(struct tb_port *port, struct seq_file *s)
369+{
370+ int cap;
371+
372+ cap = tb_port_next_cap(port, 0);
373+ while (cap > 0) {
374+ port_cap_show(port, s, cap);
375+ cap = tb_port_next_cap(port, cap);
376+ }
377+}
378+
379+static int port_basic_regs_show(struct tb_port *port, struct seq_file *s)
380+{
381+ u32 data[PORT_CAP_BASIC_LEN];
382+ int ret, i;
383+
384+ ret = tb_port_read(port, data, TB_CFG_PORT, 0, ARRAY_SIZE(data));
385+ if (ret)
386+ return ret;
387+
388+ for (i = 0; i < ARRAY_SIZE(data); i++)
389+ seq_printf(s, "0x%04x %4d 0x00 0x00 0x%08x\n", i, i, data[i]);
390+
391+ return 0;
392+}
393+
394+static int port_regs_show(struct seq_file *s, void *not_used)
395+{
396+ struct tb_port *port = s->private;
397+ struct tb_switch *sw = port->sw;
398+ struct tb *tb = sw->tb;
399+ int ret;
400+
401+ pm_runtime_get_sync(&sw->dev);
402+
403+ if (mutex_lock_interruptible(&tb->lock)) {
404+ ret = -ERESTARTSYS;
405+ goto out_rpm_put;
406+ }
407+
408+ seq_puts(s, "# offset relative_offset cap_id vs_cap_id value\n");
409+
410+ ret = port_basic_regs_show(port, s);
411+ if (ret)
412+ goto out_unlock;
413+
414+ port_caps_show(port, s);
415+
416+out_unlock:
417+ mutex_unlock(&tb->lock);
418+out_rpm_put:
419+ pm_runtime_mark_last_busy(&sw->dev);
420+ pm_runtime_put_autosuspend(&sw->dev);
421+
422+ return ret;
423+}
424+DEBUGFS_ATTR_RW(port_regs);
425+
426+static void switch_cap_show(struct tb_switch *sw, struct seq_file *s,
427+ unsigned int cap)
428+{
429+ struct tb_cap_any header;
430+ int ret, length;
431+ u8 vsec_id = 0;
432+
433+ ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, cap, 1);
434+ if (ret) {
435+ seq_printf(s, "0x%04x <capability read failed>\n", cap);
436+ return;
437+ }
438+
439+ if (header.basic.cap == TB_SWITCH_CAP_VSE) {
440+ if (!header.extended_short.length) {
441+ ret = tb_sw_read(sw, (u32 *)&header + 1, TB_CFG_SWITCH,
442+ cap + 1, 1);
443+ if (ret) {
444+ seq_printf(s, "0x%04x <capability read failed>\n",
445+ cap + 1);
446+ return;
447+ }
448+ length = header.extended_long.length;
449+ } else {
450+ length = header.extended_short.length;
451+ }
452+ vsec_id = header.extended_short.vsec_id;
453+ } else {
454+ if (header.basic.cap == TB_SWITCH_CAP_TMU) {
455+ length = SWITCH_CAP_TMU_LEN;
456+ } else {
457+ seq_printf(s, "0x%04x <unknown capability 0x%02x>\n",
458+ cap, header.basic.cap);
459+ return;
460+ }
461+ }
462+
463+ cap_show(s, sw, NULL, cap, header.basic.cap, vsec_id, length);
464+}
465+
466+static void switch_caps_show(struct tb_switch *sw, struct seq_file *s)
467+{
468+ int cap;
469+
470+ cap = tb_switch_next_cap(sw, 0);
471+ while (cap > 0) {
472+ switch_cap_show(sw, s, cap);
473+ cap = tb_switch_next_cap(sw, cap);
474+ }
475+}
476+
477+static int switch_basic_regs_show(struct tb_switch *sw, struct seq_file *s)
478+{
479+ u32 data[SWITCH_CAP_BASIC_LEN];
480+ size_t dwords;
481+ int ret, i;
482+
483+ /* Only USB4 has the additional registers */
484+ if (tb_switch_is_usb4(sw))
485+ dwords = ARRAY_SIZE(data);
486+ else
487+ dwords = 7;
488+
489+ ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords);
490+ if (ret)
491+ return ret;
492+
493+ for (i = 0; i < dwords; i++)
494+ seq_printf(s, "0x%04x %4d 0x00 0x00 0x%08x\n", i, i, data[i]);
495+
496+ return 0;
497+}
498+
499+static int switch_regs_show(struct seq_file *s, void *not_used)
500+{
501+ struct tb_switch *sw = s->private;
502+ struct tb *tb = sw->tb;
503+ int ret;
504+
505+ pm_runtime_get_sync(&sw->dev);
506+
507+ if (mutex_lock_interruptible(&tb->lock)) {
508+ ret = -ERESTARTSYS;
509+ goto out_rpm_put;
510+ }
511+
512+ seq_puts(s, "# offset relative_offset cap_id vs_cap_id value\n");
513+
514+ ret = switch_basic_regs_show(sw, s);
515+ if (ret)
516+ goto out_unlock;
517+
518+ switch_caps_show(sw, s);
519+
520+out_unlock:
521+ mutex_unlock(&tb->lock);
522+out_rpm_put:
523+ pm_runtime_mark_last_busy(&sw->dev);
524+ pm_runtime_put_autosuspend(&sw->dev);
525+
526+ return ret;
527+}
528+DEBUGFS_ATTR_RW(switch_regs);
529+
530+static int path_show_one(struct tb_port *port, struct seq_file *s, int hopid)
531+{
532+ u32 data[PATH_LEN];
533+ int ret, i;
534+
535+ ret = tb_port_read(port, data, TB_CFG_HOPS, hopid * PATH_LEN,
536+ ARRAY_SIZE(data));
537+ if (ret) {
538+ seq_printf(s, "0x%04x <not accessible>\n", hopid * PATH_LEN);
539+ return ret;
540+ }
541+
542+ for (i = 0; i < ARRAY_SIZE(data); i++) {
543+ seq_printf(s, "0x%04x %4d 0x%02x 0x%08x\n",
544+ hopid * PATH_LEN + i, i, hopid, data[i]);
545+ }
546+
547+ return 0;
548+}
549+
550+static int path_show(struct seq_file *s, void *not_used)
551+{
552+ struct tb_port *port = s->private;
553+ struct tb_switch *sw = port->sw;
554+ struct tb *tb = sw->tb;
555+ int start, i, ret = 0;
556+
557+ pm_runtime_get_sync(&sw->dev);
558+
559+ if (mutex_lock_interruptible(&tb->lock)) {
560+ ret = -ERESTARTSYS;
561+ goto out_rpm_put;
562+ }
563+
564+ seq_puts(s, "# offset relative_offset in_hop_id value\n");
565+
566+ /* NHI and lane adapters have entry for path 0 */
567+ if (tb_port_is_null(port) || tb_port_is_nhi(port)) {
568+ ret = path_show_one(port, s, 0);
569+ if (ret)
570+ goto out_unlock;
571+ }
572+
573+ start = tb_port_is_nhi(port) ? 1 : TB_PATH_MIN_HOPID;
574+
575+ for (i = start; i <= port->config.max_in_hop_id; i++) {
576+ ret = path_show_one(port, s, i);
577+ if (ret)
578+ break;
579+ }
580+
581+out_unlock:
582+ mutex_unlock(&tb->lock);
583+out_rpm_put:
584+ pm_runtime_mark_last_busy(&sw->dev);
585+ pm_runtime_put_autosuspend(&sw->dev);
586+
587+ return ret;
588+}
589+DEBUGFS_ATTR_RO(path);
590+
591+static int counter_set_regs_show(struct tb_port *port, struct seq_file *s,
592+ int counter)
593+{
594+ u32 data[COUNTER_SET_LEN];
595+ int ret, i;
596+
597+ ret = tb_port_read(port, data, TB_CFG_COUNTERS,
598+ counter * COUNTER_SET_LEN, ARRAY_SIZE(data));
599+ if (ret) {
600+ seq_printf(s, "0x%04x <not accessible>\n",
601+ counter * COUNTER_SET_LEN);
602+ return ret;
603+ }
604+
605+ for (i = 0; i < ARRAY_SIZE(data); i++) {
606+ seq_printf(s, "0x%04x %4d 0x%02x 0x%08x\n",
607+ counter * COUNTER_SET_LEN + i, i, counter, data[i]);
608+ }
609+
610+ return 0;
611+}
612+
613+static int counters_show(struct seq_file *s, void *not_used)
614+{
615+ struct tb_port *port = s->private;
616+ struct tb_switch *sw = port->sw;
617+ struct tb *tb = sw->tb;
618+ int i, ret = 0;
619+
620+ pm_runtime_get_sync(&sw->dev);
621+
622+ if (mutex_lock_interruptible(&tb->lock)) {
623+ ret = -ERESTARTSYS;
624+ goto out;
625+ }
626+
627+ seq_puts(s, "# offset relative_offset counter_id value\n");
628+
629+ for (i = 0; i < port->config.max_counters; i++) {
630+ ret = counter_set_regs_show(port, s, i);
631+ if (ret)
632+ break;
633+ }
634+
635+ mutex_unlock(&tb->lock);
636+
637+out:
638+ pm_runtime_mark_last_busy(&sw->dev);
639+ pm_runtime_put_autosuspend(&sw->dev);
640+
641+ return ret;
642+}
643+DEBUGFS_ATTR_RW(counters);
644+
645+/**
646+ * tb_switch_debugfs_init() - Add debugfs entries for router
647+ * @sw: Pointer to the router
648+ *
649+ * Adds debugfs directories and files for given router.
650+ */
651+void tb_switch_debugfs_init(struct tb_switch *sw)
652+{
653+ struct dentry *debugfs_dir;
654+ struct tb_port *port;
655+
656+ debugfs_dir = debugfs_create_dir(dev_name(&sw->dev), tb_debugfs_root);
657+ sw->debugfs_dir = debugfs_dir;
658+ debugfs_create_file("regs", DEBUGFS_MODE, debugfs_dir, sw,
659+ &switch_regs_fops);
660+
661+ tb_switch_for_each_port(sw, port) {
662+ struct dentry *debugfs_dir;
663+ char dir_name[10];
664+
665+ if (port->disabled)
666+ continue;
667+ if (port->config.type == TB_TYPE_INACTIVE)
668+ continue;
669+
670+ snprintf(dir_name, sizeof(dir_name), "port%d", port->port);
671+ debugfs_dir = debugfs_create_dir(dir_name, sw->debugfs_dir);
672+ debugfs_create_file("regs", DEBUGFS_MODE, debugfs_dir,
673+ port, &port_regs_fops);
674+ debugfs_create_file("path", 0400, debugfs_dir, port,
675+ &path_fops);
676+ if (port->config.counters_support)
677+ debugfs_create_file("counters", 0600, debugfs_dir, port,
678+ &counters_fops);
679+ }
680+}
681+
682+/**
683+ * tb_switch_debugfs_remove() - Remove all router debugfs entries
684+ * @sw: Pointer to the router
685+ *
686+ * Removes all previously added debugfs entries under this router.
687+ */
688+void tb_switch_debugfs_remove(struct tb_switch *sw)
689+{
690+ debugfs_remove_recursive(sw->debugfs_dir);
691+}
692+
693+void tb_debugfs_init(void)
694+{
695+ tb_debugfs_root = debugfs_create_dir("thunderbolt", NULL);
696+}
697+
698+void tb_debugfs_exit(void)
699+{
700+ debugfs_remove_recursive(tb_debugfs_root);
701+}
drivers/thunderbolt/domain.c+45−3
@@ -275,7 +275,7 @@ static struct attribute *domain_attrs[] = { · 274 unmodified lines
275275 static umode_t domain_attr_is_visible(struct kobject *kobj,
276276 struct attribute *attr, int n)
277277 {
278− struct device *dev = container_of(kobj, struct device, kobj);
278+ struct device *dev = kobj_to_dev(kobj);
279279 struct tb *tb = container_of(dev, struct tb, dev);
280280
281281 if (attr == &dev_attr_boot_acl.attr) {
@@ -455,6 +455,8 @@ int tb_domain_add(struct tb *tb) · 173 unmodified lines
455455 /* This starts event processing */
456456 mutex_unlock(&tb->lock);
457457
458+ device_init_wakeup(&tb->dev, true);
459+
458460 pm_runtime_no_callbacks(&tb->dev);
459461 pm_runtime_set_active(&tb->dev);
460462 pm_runtime_enable(&tb->dev);
@@ -544,6 +546,33 @@ int tb_domain_suspend(struct tb *tb) · 83 unmodified lines
544546 return tb->cm_ops->suspend ? tb->cm_ops->suspend(tb) : 0;
545547 }
546548
549+int tb_domain_freeze_noirq(struct tb *tb)
550+{
551+ int ret = 0;
552+
553+ mutex_lock(&tb->lock);
554+ if (tb->cm_ops->freeze_noirq)
555+ ret = tb->cm_ops->freeze_noirq(tb);
556+ if (!ret)
557+ tb_ctl_stop(tb->ctl);
558+ mutex_unlock(&tb->lock);
559+
560+ return ret;
561+}
562+
563+int tb_domain_thaw_noirq(struct tb *tb)
564+{
565+ int ret = 0;
566+
567+ mutex_lock(&tb->lock);
568+ tb_ctl_start(tb->ctl);
569+ if (tb->cm_ops->thaw_noirq)
570+ ret = tb->cm_ops->thaw_noirq(tb);
571+ mutex_unlock(&tb->lock);
572+
573+ return ret;
574+}
575+
547576 void tb_domain_complete(struct tb *tb)
548577 {
549578 if (tb->cm_ops->complete)
@@ -798,12 +827,23 @@ int tb_domain_init(void) · 248 unmodified lines
798827 {
799828 int ret;
800829
830+ tb_test_init();
831+
832+ tb_debugfs_init();
801833 ret = tb_xdomain_init();
802834 if (ret)
803− return ret;
835+ goto err_debugfs;
804836 ret = bus_register(&tb_bus_type);
805837 if (ret)
806− tb_xdomain_exit();
838+ goto err_xdomain;
839+
840+ return 0;
841+
842+err_xdomain:
843+ tb_xdomain_exit();
844+err_debugfs:
845+ tb_debugfs_exit();
846+ tb_test_exit();
807847
808848 return ret;
809849 }
@@ -814,4 +854,6 @@ void tb_domain_exit(void) · 4 unmodified lines
814854 ida_destroy(&tb_domain_ida);
815855 tb_nvm_exit();
816856 tb_xdomain_exit();
857+ tb_debugfs_exit();
858+ tb_test_exit();
817859 }
drivers/thunderbolt/icm.c+4−1
@@ -1635,11 +1635,14 @@ static void icm_icl_rtd3_veto(struct tb *tb, const struct icm_pkg_header *hdr) · 1634 unmodified lines
16351635
16361636 static bool icm_tgl_is_supported(struct tb *tb)
16371637 {
1638+ u32 val;
1639+
16381640 /*
16391641 * If the firmware is not running use software CM. This platform
16401642 * should fully support both.
16411643 */
1642− return icm_firmware_running(tb->nhi);
1644+ val = ioread32(tb->nhi->iobase + REG_FW_STS);
1645+ return !!(val & REG_FW_STS_NVM_AUTH_DONE);
16431646 }
16441647
16451648 static void icm_handle_notification(struct work_struct *work)
drivers/thunderbolt/lc.c+121−30
@@ -45,7 +45,7 @@ static int find_port_lc_cap(struct tb_port *port) · 44 unmodified lines
4545 return sw->cap_lc + start + phys * size;
4646 }
4747
48−static int tb_lc_configure_lane(struct tb_port *port, bool configure)
48+static int tb_lc_set_port_configured(struct tb_port *port, bool configured)
4949 {
5050 bool upstream = tb_is_upstream_port(port);
5151 struct tb_switch *sw = port->sw;
@@ -69,7 +69,7 @@ static int tb_lc_configure_lane(struct tb_port *port, bool configure) · 17 unmodified lines
6969 else
7070 lane = TB_LC_SX_CTRL_L2C;
7171
72− if (configure) {
72+ if (configured) {
7373 ctrl |= lane;
7474 if (upstream)
7575 ctrl |= TB_LC_SX_CTRL_UPSTREAM;
@@ -83,55 +83,146 @@ static int tb_lc_configure_lane(struct tb_port *port, bool configure) · 7 unmodified lines
8383 }
8484
8585 /**
86− * tb_lc_configure_link() - Let LC know about configured link
87− * @sw: Switch that is being added
86+ * tb_lc_configure_port() - Let LC know about configured port
87+ * @port: Port that is set as configured
8888 *
89− * Informs LC of both parent switch and @sw that there is established
90− * link between the two.
89+ * Sets the port configured for power management purposes.
9190 */
92−int tb_lc_configure_link(struct tb_switch *sw)
91+int tb_lc_configure_port(struct tb_port *port)
9392 {
94− struct tb_port *up, *down;
95− int ret;
93+ return tb_lc_set_port_configured(port, true);
94+}
95+
96+/**
97+ * tb_lc_unconfigure_port() - Let LC know about unconfigured port
98+ * @port: Port that is set as configured
99+ *
100+ * Sets the port unconfigured for power management purposes.
101+ */
102+void tb_lc_unconfigure_port(struct tb_port *port)
103+{
104+ tb_lc_set_port_configured(port, false);
105+}
96106
97− if (!tb_route(sw) || tb_switch_is_icm(sw))
107+static int tb_lc_set_xdomain_configured(struct tb_port *port, bool configure)
108+{
109+ struct tb_switch *sw = port->sw;
110+ u32 ctrl, lane;
111+ int cap, ret;
112+
113+ if (sw->generation < 2)
98114 return 0;
99115
100− up = tb_upstream_port(sw);
101− down = tb_port_at(tb_route(sw), tb_to_switch(sw->dev.parent));
116+ cap = find_port_lc_cap(port);
117+ if (cap < 0)
118+ return cap;
102119
103− /* Configure parent link toward this switch */
104− ret = tb_lc_configure_lane(down, true);
120+ ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1);
105121 if (ret)
106122 return ret;
107123
108− /* Configure upstream link from this switch to the parent */
109− ret = tb_lc_configure_lane(up, true);
124+ /* Resolve correct lane */
125+ if (port->port % 2)
126+ lane = TB_LC_SX_CTRL_L1D;
127+ else
128+ lane = TB_LC_SX_CTRL_L2D;
129+
130+ if (configure)
131+ ctrl |= lane;
132+ else
133+ ctrl &= ~lane;
134+
135+ return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1);
136+}
137+
138+/**
139+ * tb_lc_configure_xdomain() - Inform LC that the link is XDomain
140+ * @port: Switch downstream port connected to another host
141+ *
142+ * Sets the lane configured for XDomain accordingly so that the LC knows
143+ * about this. Returns %0 in success and negative errno in failure.
144+ */
145+int tb_lc_configure_xdomain(struct tb_port *port)
146+{
147+ return tb_lc_set_xdomain_configured(port, true);
148+}
149+
150+/**
151+ * tb_lc_unconfigure_xdomain() - Unconfigure XDomain from port
152+ * @port: Switch downstream port that was connected to another host
153+ *
154+ * Unsets the lane XDomain configuration.
155+ */
156+void tb_lc_unconfigure_xdomain(struct tb_port *port)
157+{
158+ tb_lc_set_xdomain_configured(port, false);
159+}
160+
161+static int tb_lc_set_wake_one(struct tb_switch *sw, unsigned int offset,
162+ unsigned int flags)
163+{
164+ u32 ctrl;
165+ int ret;
166+
167+ /*
168+ * Enable wake on PCIe and USB4 (wake coming from another
169+ * router).
170+ */
171+ ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH,
172+ offset + TB_LC_SX_CTRL, 1);
110173 if (ret)
111− tb_lc_configure_lane(down, false);
174+ return ret;
175+
176+ ctrl &= ~(TB_LC_SX_CTRL_WOC | TB_LC_SX_CTRL_WOD | TB_LC_SX_CTRL_WOP |
177+ TB_LC_SX_CTRL_WOU4);
178+
179+ if (flags & TB_WAKE_ON_CONNECT)
180+ ctrl |= TB_LC_SX_CTRL_WOC | TB_LC_SX_CTRL_WOD;
181+ if (flags & TB_WAKE_ON_USB4)
182+ ctrl |= TB_LC_SX_CTRL_WOU4;
183+ if (flags & TB_WAKE_ON_PCIE)
184+ ctrl |= TB_LC_SX_CTRL_WOP;
112185
113− return ret;
186+ return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, offset + TB_LC_SX_CTRL, 1);
114187 }
115188
116189 /**
117− * tb_lc_unconfigure_link() - Let LC know about unconfigured link
118− * @sw: Switch to unconfigure
190+ * tb_lc_set_wake() - Enable/disable wake
191+ * @sw: Switch whose wakes to configure
192+ * @flags: Wakeup flags (%0 to disable)
119193 *
120− * Informs LC of both parent switch and @sw that the link between the
121− * two does not exist anymore.
194+ * For each LC sets wake bits accordingly.
122195 */
123−void tb_lc_unconfigure_link(struct tb_switch *sw)
196+int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags)
124197 {
125− struct tb_port *up, *down;
198+ int start, size, nlc, ret, i;
199+ u32 desc;
126200
127− if (sw->is_unplugged || !tb_route(sw) || tb_switch_is_icm(sw))
128− return;
201+ if (sw->generation < 2)
202+ return 0;
129203
130− up = tb_upstream_port(sw);
131− down = tb_port_at(tb_route(sw), tb_to_switch(sw->dev.parent));
204+ if (!tb_route(sw))
205+ return 0;
132206
133− tb_lc_configure_lane(up, false);
134− tb_lc_configure_lane(down, false);
207+ ret = read_lc_desc(sw, &desc);
208+ if (ret)
209+ return ret;
210+
211+ /* Figure out number of link controllers */
212+ nlc = desc & TB_LC_DESC_NLC_MASK;
213+ start = (desc & TB_LC_DESC_SIZE_MASK) >> TB_LC_DESC_SIZE_SHIFT;
214+ size = (desc & TB_LC_DESC_PORT_SIZE_MASK) >> TB_LC_DESC_PORT_SIZE_SHIFT;
215+
216+ /* For each link controller set sleep bit */
217+ for (i = 0; i < nlc; i++) {
218+ unsigned int offset = sw->cap_lc + start + i * size;
219+
220+ ret = tb_lc_set_wake_one(sw, offset, flags);
221+ if (ret)
222+ return ret;
223+ }
224+
225+ return 0;
135226 }
136227
137228 /**
drivers/thunderbolt/nhi.c+87−3
@@ -17,6 +17,7 @@ · 16 unmodified lines
1717 #include <linux/module.h>
1818 #include <linux/delay.h>
1919 #include <linux/property.h>
20+#include <linux/platform_data/x86/apple.h>
2021
2122 #include "nhi.h"
2223 #include "nhi_regs.h"
@@ -863,6 +864,22 @@ static int nhi_suspend_noirq(struct device *dev) · 840 unmodified lines
863864 return __nhi_suspend_noirq(dev, device_may_wakeup(dev));
864865 }
865866
867+static int nhi_freeze_noirq(struct device *dev)
868+{
869+ struct pci_dev *pdev = to_pci_dev(dev);
870+ struct tb *tb = pci_get_drvdata(pdev);
871+
872+ return tb_domain_freeze_noirq(tb);
873+}
874+
875+static int nhi_thaw_noirq(struct device *dev)
876+{
877+ struct pci_dev *pdev = to_pci_dev(dev);
878+ struct tb *tb = pci_get_drvdata(pdev);
879+
880+ return tb_domain_thaw_noirq(tb);
881+}
882+
866883 static bool nhi_wake_supported(struct pci_dev *pdev)
867884 {
868885 u8 val;
@@ -1069,6 +1086,69 @@ static bool nhi_imr_valid(struct pci_dev *pdev) · 200 unmodified lines
10691086 return true;
10701087 }
10711088
1089+/*
1090+ * During suspend the Thunderbolt controller is reset and all PCIe
1091+ * tunnels are lost. The NHI driver will try to reestablish all tunnels
1092+ * during resume. This adds device links between the tunneled PCIe
1093+ * downstream ports and the NHI so that the device core will make sure
1094+ * NHI is resumed first before the rest.
1095+ */
1096+static void tb_apple_add_links(struct tb_nhi *nhi)
1097+{
1098+ struct pci_dev *upstream, *pdev;
1099+
1100+ if (!x86_apple_machine)
1101+ return;
1102+
1103+ switch (nhi->pdev->device) {
1104+ case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE:
1105+ case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
1106+ case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_NHI:
1107+ case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_NHI:
1108+ break;
1109+ default:
1110+ return;
1111+ }
1112+
1113+ upstream = pci_upstream_bridge(nhi->pdev);
1114+ while (upstream) {
1115+ if (!pci_is_pcie(upstream))
1116+ return;
1117+ if (pci_pcie_type(upstream) == PCI_EXP_TYPE_UPSTREAM)
1118+ break;
1119+ upstream = pci_upstream_bridge(upstream);
1120+ }
1121+
1122+ if (!upstream)
1123+ return;
1124+
1125+ /*
1126+ * For each hotplug downstream port, create add device link
1127+ * back to NHI so that PCIe tunnels can be re-established after
1128+ * sleep.
1129+ */
1130+ for_each_pci_bridge(pdev, upstream->subordinate) {
1131+ const struct device_link *link;
1132+
1133+ if (!pci_is_pcie(pdev))
1134+ continue;
1135+ if (pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM ||
1136+ !pdev->is_hotplug_bridge)
1137+ continue;
1138+
1139+ link = device_link_add(&pdev->dev, &nhi->pdev->dev,
1140+ DL_FLAG_AUTOREMOVE_SUPPLIER |
1141+ DL_FLAG_PM_RUNTIME);
1142+ if (link) {
1143+ dev_dbg(&nhi->pdev->dev, "created link from %s\n",
1144+ dev_name(&pdev->dev));
1145+ } else {
1146+ dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n",
1147+ dev_name(&pdev->dev));
1148+ }
1149+ }
1150+}
1151+
10721152 static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id)
10731153 {
10741154 struct tb_nhi *nhi;
@@ -1134,6 +1214,9 @@ static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 59 unmodified lines
11341214 return res;
11351215 }
11361216
1217+ tb_apple_add_links(nhi);
1218+ tb_acpi_add_links(nhi);
1219+
11371220 tb = icm_probe(nhi);
11381221 if (!tb)
11391222 tb = tb_probe(nhi);
@@ -1157,6 +1240,8 @@ static int nhi_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 17 unmodified lines
11571240 }
11581241 pci_set_drvdata(pdev, tb);
11591242
1243+ device_wakeup_enable(&pdev->dev);
1244+
11601245 pm_runtime_allow(&pdev->dev);
11611246 pm_runtime_set_autosuspend_delay(&pdev->dev, TB_AUTOSUSPEND_DELAY);
11621247 pm_runtime_use_autosuspend(&pdev->dev);
@@ -1186,14 +1271,13 @@ static void nhi_remove(struct pci_dev *pdev) · 23 unmodified lines
11861271 static const struct dev_pm_ops nhi_pm_ops = {
11871272 .suspend_noirq = nhi_suspend_noirq,
11881273 .resume_noirq = nhi_resume_noirq,
1189− .freeze_noirq = nhi_suspend_noirq, /*
1274+ .freeze_noirq = nhi_freeze_noirq, /*
11901275 * we just disable hotplug, the
11911276 * pci-tunnels stay alive.
11921277 */
1193− .thaw_noirq = nhi_resume_noirq,
1278+ .thaw_noirq = nhi_thaw_noirq,
11941279 .restore_noirq = nhi_resume_noirq,
11951280 .suspend = nhi_suspend,
1196− .freeze = nhi_suspend,
11971281 .poweroff_noirq = nhi_poweroff_noirq,
11981282 .poweroff = nhi_suspend,
11991283 .complete = nhi_complete,
drivers/thunderbolt/nhi_ops.c+19−12
@@ -59,7 +59,7 @@ static int icl_nhi_force_power(struct tb_nhi *nhi, bool power) · 58 unmodified lines
5959 pci_write_config_dword(nhi->pdev, VS_CAP_22, vs_cap);
6060
6161 if (power) {
62− unsigned int retries = 10;
62+ unsigned int retries = 350;
6363 u32 val;
6464
6565 /* Wait until the firmware tells it is up and running */
@@ -67,7 +67,7 @@ static int icl_nhi_force_power(struct tb_nhi *nhi, bool power) · 1 unmodified line
6767 pci_read_config_dword(nhi->pdev, VS_CAP_9, &val);
6868 if (val & VS_CAP_9_FW_READY)
6969 return 0;
70− msleep(250);
70+ usleep_range(3000, 3100);
7171 } while (--retries);
7272
7373 return -ETIMEDOUT;
@@ -97,7 +97,7 @@ static int icl_nhi_lc_mailbox_cmd_complete(struct tb_nhi *nhi, int timeout) · 23 unmodified lines
9797 pci_read_config_dword(nhi->pdev, VS_CAP_18, &data);
9898 if (data & VS_CAP_18_DONE)
9999 goto clear;
100− msleep(100);
100+ usleep_range(1000, 1100);
101101 } while (time_before(jiffies, end));
102102
103103 return -ETIMEDOUT;
@@ -121,31 +121,38 @@ static void icl_nhi_set_ltr(struct tb_nhi *nhi) · 17 unmodified lines
121121
122122 static int icl_nhi_suspend(struct tb_nhi *nhi)
123123 {
124+ struct tb *tb = pci_get_drvdata(nhi->pdev);
124125 int ret;
125126
126127 if (icl_nhi_is_device_connected(nhi))
127128 return 0;
128129
129− /*
130− * If there is no device connected we need to perform both: a
131− * handshake through LC mailbox and force power down before
132− * entering D3.
133− */
134− icl_nhi_lc_mailbox_cmd(nhi, ICL_LC_PREPARE_FOR_RESET);
135− ret = icl_nhi_lc_mailbox_cmd_complete(nhi, ICL_LC_MAILBOX_TIMEOUT);
136− if (ret)
137− return ret;
130+ if (tb_switch_is_icm(tb->root_switch)) {
131+ /*
132+ * If there is no device connected we need to perform
133+ * both: a handshake through LC mailbox and force power
134+ * down before entering D3.
135+ */
136+ icl_nhi_lc_mailbox_cmd(nhi, ICL_LC_PREPARE_FOR_RESET);
137+ ret = icl_nhi_lc_mailbox_cmd_complete(nhi, ICL_LC_MAILBOX_TIMEOUT);
138+ if (ret)
139+ return ret;
140+ }
138141
139142 return icl_nhi_force_power(nhi, false);
140143 }
141144
142145 static int icl_nhi_suspend_noirq(struct tb_nhi *nhi, bool wakeup)
143146 {
147+ struct tb *tb = pci_get_drvdata(nhi->pdev);
144148 enum icl_lc_mailbox_cmd cmd;
145149
146150 if (!pm_suspend_via_firmware())
147151 return icl_nhi_suspend(nhi);
148152
153+ if (!tb_switch_is_icm(tb->root_switch))
154+ return 0;
155+
149156 cmd = wakeup ? ICL_LC_GO2SX : ICL_LC_GO2SX_NO_WAKE;
150157 icl_nhi_lc_mailbox_cmd(nhi, cmd);
151158 return icl_nhi_lc_mailbox_cmd_complete(nhi, ICL_LC_MAILBOX_TIMEOUT);
drivers/thunderbolt/quirks.c+1−1
@@ -27,7 +27,7 @@ static const struct tb_quirk tb_quirks[] = { · 26 unmodified lines
2727 * tb_check_quirks() - Check for quirks to apply
2828 * @sw: Thunderbolt switch
2929 *
30− * Apply any quirks for the Thunderbolt controller
30+ * Apply any quirks for the Thunderbolt controller.
3131 */
3232 void tb_check_quirks(struct tb_switch *sw)
3333 {
drivers/thunderbolt/switch.c+183−33
@@ -601,6 +601,13 @@ int tb_port_add_nfc_credits(struct tb_port *port, int credits) · 600 unmodified lines
601601 if (credits == 0 || port->sw->is_unplugged)
602602 return 0;
603603
604+ /*
605+ * USB4 restricts programming NFC buffers to lane adapters only
606+ * so skip other ports.
607+ */
608+ if (tb_switch_is_usb4(port->sw) && !tb_port_is_null(port))
609+ return 0;
610+
604611 nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK;
605612 nfc_credits += credits;
606613
@@ -666,6 +673,50 @@ int tb_port_unlock(struct tb_port *port) · 59 unmodified lines
666673 return 0;
667674 }
668675
676+static int __tb_port_enable(struct tb_port *port, bool enable)
677+{
678+ int ret;
679+ u32 phy;
680+
681+ if (!tb_port_is_null(port))
682+ return -EINVAL;
683+
684+ ret = tb_port_read(port, &phy, TB_CFG_PORT,
685+ port->cap_phy + LANE_ADP_CS_1, 1);
686+ if (ret)
687+ return ret;
688+
689+ if (enable)
690+ phy &= ~LANE_ADP_CS_1_LD;
691+ else
692+ phy |= LANE_ADP_CS_1_LD;
693+
694+ return tb_port_write(port, &phy, TB_CFG_PORT,
695+ port->cap_phy + LANE_ADP_CS_1, 1);
696+}
697+
698+/**
699+ * tb_port_enable() - Enable lane adapter
700+ * @port: Port to enable (can be %NULL)
701+ *
702+ * This is used for lane 0 and 1 adapters to enable it.
703+ */
704+int tb_port_enable(struct tb_port *port)
705+{
706+ return __tb_port_enable(port, true);
707+}
708+
709+/**
710+ * tb_port_disable() - Disable lane adapter
711+ * @port: Port to disable (can be %NULL)
712+ *
713+ * This is used for lane 0 and 1 adapters to disable it.
714+ */
715+int tb_port_disable(struct tb_port *port)
716+{
717+ return __tb_port_enable(port, false);
718+}
719+
669720 /**
670721 * tb_init_port() - initialize a port
671722 *
@@ -739,7 +790,7 @@ static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, · 67 unmodified lines
739790 * NHI can use HopIDs 1-max for other adapters HopIDs 0-7 are
740791 * reserved.
741792 */
742− if (port->config.type != TB_TYPE_NHI && min_hopid < TB_PATH_MIN_HOPID)
793+ if (!tb_port_is_nhi(port) && min_hopid < TB_PATH_MIN_HOPID)
743794 min_hopid = TB_PATH_MIN_HOPID;
744795
745796 if (max_hopid < 0 || max_hopid > port_max_hopid)
@@ -1227,23 +1278,24 @@ static void tb_dump_switch(const struct tb *tb, const struct tb_switch *sw) · 481 unmodified lines
12271278
12281279 /**
12291280 * reset_switch() - reconfigure route, enable and send TB_CFG_PKG_RESET
1281+ * @sw: Switch to reset
12301282 *
12311283 * Return: Returns 0 on success or an error code on failure.
12321284 */
1233−int tb_switch_reset(struct tb *tb, u64 route)
1285+int tb_switch_reset(struct tb_switch *sw)
12341286 {
12351287 struct tb_cfg_result res;
1236− struct tb_regs_switch_header header = {
1237− header.route_hi = route >> 32,
1238− header.route_lo = route,
1239− header.enabled = true,
1240− };
1241− tb_dbg(tb, "resetting switch at %llx\n", route);
1242− res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route,
1243− 0, 2, 2, 2);
1288+
1289+ if (sw->generation > 1)
1290+ return 0;
1291+
1292+ tb_sw_dbg(sw, "resetting switch\n");
1293+
1294+ res.err = tb_sw_write(sw, ((u32 *) &sw->config) + 2,
1295+ TB_CFG_SWITCH, 2, 2);
12441296 if (res.err)
12451297 return res.err;
1246− res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT);
1298+ res = tb_cfg_reset(sw->tb->ctl, tb_route(sw), TB_CFG_DEFAULT_TIMEOUT);
12471299 if (res.err > 0)
12481300 return -EIO;
12491301 return res.err;
@@ -1261,7 +1313,7 @@ static int tb_plug_events_active(struct tb_switch *sw, bool active) · 11 unmodified lines
12611313 u32 data;
12621314 int res;
12631315
1264− if (tb_switch_is_icm(sw))
1316+ if (tb_switch_is_icm(sw) || tb_switch_is_usb4(sw))
12651317 return 0;
12661318
12671319 sw->config.plug_events_delay = 0xff;
@@ -1269,10 +1321,6 @@ static int tb_plug_events_active(struct tb_switch *sw, bool active) · 1 unmodified line
12691321 if (res)
12701322 return res;
12711323
1272− /* Plug events are always enabled in USB4 */
1273− if (tb_switch_is_usb4(sw))
1274− return 0;
1275−
12761324 res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1);
12771325 if (res)
12781326 return res;
@@ -1649,7 +1697,7 @@ static struct attribute *switch_attrs[] = { · 370 unmodified lines
16491697 static umode_t switch_attr_is_visible(struct kobject *kobj,
16501698 struct attribute *attr, int n)
16511699 {
1652− struct device *dev = container_of(kobj, struct device, kobj);
1700+ struct device *dev = kobj_to_dev(kobj);
16531701 struct tb_switch *sw = tb_to_switch(dev);
16541702
16551703 if (attr == &dev_attr_device.attr) {
@@ -1988,7 +2036,7 @@ int tb_switch_configure(struct tb_switch *sw) · 332 unmodified lines
19882036 route = tb_route(sw);
19892037
19902038 tb_dbg(tb, "%s Switch at %#llx (depth: %d, up port: %d)\n",
1991− sw->config.enabled ? "restoring " : "initializing", route,
2039+ sw->config.enabled ? "restoring" : "initializing", route,
19922040 tb_route_length(route), sw->config.upstream_port_number);
19932041
19942042 sw->config.enabled = 1;
@@ -2008,10 +2056,6 @@ int tb_switch_configure(struct tb_switch *sw) · 13 unmodified lines
20082056 return ret;
20092057
20102058 ret = usb4_switch_setup(sw);
2011− if (ret)
2012− return ret;
2013−
2014− ret = usb4_switch_configure_link(sw);
20152059 } else {
20162060 if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL)
20172061 tb_sw_warn(sw, "unknown switch vendor id %#x\n",
@@ -2025,10 +2069,6 @@ int tb_switch_configure(struct tb_switch *sw) · 7 unmodified lines
20252069 /* Enumerate the switch */
20262070 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH,
20272071 ROUTER_CS_1, 3);
2028− if (ret)
2029− return ret;
2030−
2031− ret = tb_lc_configure_link(sw);
20322072 }
20332073 if (ret)
20342074 return ret;
@@ -2311,6 +2351,69 @@ void tb_switch_lane_bonding_disable(struct tb_switch *sw) · 276 unmodified lines
23112351 tb_sw_dbg(sw, "lane bonding disabled\n");
23122352 }
23132353
2354+/**
2355+ * tb_switch_configure_link() - Set link configured
2356+ * @sw: Switch whose link is configured
2357+ *
2358+ * Sets the link upstream from @sw configured (from both ends) so that
2359+ * it will not be disconnected when the domain exits sleep. Can be
2360+ * called for any switch.
2361+ *
2362+ * It is recommended that this is called after lane bonding is enabled.
2363+ *
2364+ * Returns %0 on success and negative errno in case of error.
2365+ */
2366+int tb_switch_configure_link(struct tb_switch *sw)
2367+{
2368+ struct tb_port *up, *down;
2369+ int ret;
2370+
2371+ if (!tb_route(sw) || tb_switch_is_icm(sw))
2372+ return 0;
2373+
2374+ up = tb_upstream_port(sw);
2375+ if (tb_switch_is_usb4(up->sw))
2376+ ret = usb4_port_configure(up);
2377+ else
2378+ ret = tb_lc_configure_port(up);
2379+ if (ret)
2380+ return ret;
2381+
2382+ down = up->remote;
2383+ if (tb_switch_is_usb4(down->sw))
2384+ return usb4_port_configure(down);
2385+ return tb_lc_configure_port(down);
2386+}
2387+
2388+/**
2389+ * tb_switch_unconfigure_link() - Unconfigure link
2390+ * @sw: Switch whose link is unconfigured
2391+ *
2392+ * Sets the link unconfigured so the @sw will be disconnected if the
2393+ * domain exists sleep.
2394+ */
2395+void tb_switch_unconfigure_link(struct tb_switch *sw)
2396+{
2397+ struct tb_port *up, *down;
2398+
2399+ if (sw->is_unplugged)
2400+ return;
2401+ if (!tb_route(sw) || tb_switch_is_icm(sw))
2402+ return;
2403+
2404+ up = tb_upstream_port(sw);
2405+ if (tb_switch_is_usb4(up->sw))
2406+ usb4_port_unconfigure(up);
2407+ else
2408+ tb_lc_unconfigure_port(up);
2409+
2410+ down = up->remote;
2411+ if (tb_switch_is_usb4(down->sw))
2412+ usb4_port_unconfigure(down);
2413+ else
2414+ tb_lc_unconfigure_port(down);
2415+}
2416+
23142417 /**
23152418 * tb_switch_add() - Add a switch to the domain
23162419 * @sw: Switch to add
@@ -2399,6 +2502,13 @@ int tb_switch_add(struct tb_switch *sw) · 82 unmodified lines
23992502 return ret;
24002503 }
24012504
2505+ /*
2506+ * Thunderbolt routers do not generate wakeups themselves but
2507+ * they forward wakeups from tunneled protocols, so enable it
2508+ * here.
2509+ */
2510+ device_init_wakeup(&sw->dev, true);
2511+
24022512 pm_runtime_set_active(&sw->dev);
24032513 if (sw->rpm) {
24042514 pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY);
@@ -2408,6 +2518,7 @@ int tb_switch_add(struct tb_switch *sw) · 3 unmodified lines
24082518 pm_request_autosuspend(&sw->dev);
24092519 }
24102520
2521+ tb_switch_debugfs_init(sw);
24112522 return 0;
24122523 }
24132524
@@ -2423,6 +2534,8 @@ void tb_switch_remove(struct tb_switch *sw) · 9 unmodified lines
24232534 {
24242535 struct tb_port *port;
24252536
2537+ tb_switch_debugfs_remove(sw);
2538+
24262539 if (sw->rpm) {
24272540 pm_runtime_get_sync(&sw->dev);
24282541 pm_runtime_disable(&sw->dev);
@@ -2445,11 +2558,6 @@ void tb_switch_remove(struct tb_switch *sw) · 16 unmodified lines
24452558 if (!sw->is_unplugged)
24462559 tb_plug_events_active(sw, false);
24472560
2448− if (tb_switch_is_usb4(sw))
2449− usb4_switch_unconfigure_link(sw);
2450− else
2451− tb_lc_unconfigure_link(sw);
2452−
24532561 tb_switch_nvm_remove(sw);
24542562
24552563 if (tb_route(sw))
@@ -2481,6 +2589,18 @@ void tb_sw_set_unplugged(struct tb_switch *sw) · 25 unmodified lines
24812589 }
24822590 }
24832591
2592+static int tb_switch_set_wake(struct tb_switch *sw, unsigned int flags)
2593+{
2594+ if (flags)
2595+ tb_sw_dbg(sw, "enabling wakeup: %#x\n", flags);
2596+ else
2597+ tb_sw_dbg(sw, "disabling wakeup\n");
2598+
2599+ if (tb_switch_is_usb4(sw))
2600+ return usb4_switch_set_wake(sw, flags);
2601+ return tb_lc_set_wake(sw, flags);
2602+}
2603+
24842604 int tb_switch_resume(struct tb_switch *sw)
24852605 {
24862606 struct tb_port *port;
@@ -2526,6 +2646,13 @@ int tb_switch_resume(struct tb_switch *sw) · 39 unmodified lines
25262646 if (err)
25272647 return err;
25282648
2649+ /* Disable wakes */
2650+ tb_switch_set_wake(sw, 0);
2651+
2652+ err = tb_switch_tmu_init(sw);
2653+ if (err)
2654+ return err;
2655+
25292656 /* check for surviving downstream switches */
25302657 tb_switch_for_each_port(sw, port) {
25312658 if (!tb_port_has_remote(port) && !port->xdomain)
@@ -2555,20 +2682,43 @@ int tb_switch_resume(struct tb_switch *sw) · 23 unmodified lines
25552682 return 0;
25562683 }
25572684
2558−void tb_switch_suspend(struct tb_switch *sw)
2685+/**
2686+ * tb_switch_suspend() - Put a switch to sleep
2687+ * @sw: Switch to suspend
2688+ * @runtime: Is this runtime suspend or system sleep
2689+ *
2690+ * Suspends router and all its children. Enables wakes according to
2691+ * value of @runtime and then sets sleep bit for the router. If @sw is
2692+ * host router the domain is ready to go to sleep once this function
2693+ * returns.
2694+ */
2695+void tb_switch_suspend(struct tb_switch *sw, bool runtime)
25592696 {
2697+ unsigned int flags = 0;
25602698 struct tb_port *port;
25612699 int err;
25622700
2701+ tb_sw_dbg(sw, "suspending switch\n");
2702+
25632703 err = tb_plug_events_active(sw, false);
25642704 if (err)
25652705 return;
25662706
25672707 tb_switch_for_each_port(sw, port) {
25682708 if (tb_port_has_remote(port))
2569− tb_switch_suspend(port->remote->sw);
2709+ tb_switch_suspend(port->remote->sw, runtime);
25702710 }
25712711
2712+ if (runtime) {
2713+ /* Trigger wake when something is plugged in/out */
2714+ flags |= TB_WAKE_ON_CONNECT | TB_WAKE_ON_DISCONNECT;
2715+ flags |= TB_WAKE_ON_USB4 | TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE;
2716+ } else if (device_may_wakeup(&sw->dev)) {
2717+ flags |= TB_WAKE_ON_USB4 | TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE;
2718+ }
2719+
2720+ tb_switch_set_wake(sw, flags);
2721+
25722722 if (tb_switch_is_usb4(sw))
25732723 usb4_switch_set_sleep(sw);
25742724 else
drivers/thunderbolt/tb.c+198−9
@@ -9,6 +9,7 @@ · 8 unmodified lines
99 #include <linux/slab.h>
1010 #include <linux/errno.h>
1111 #include <linux/delay.h>
12+#include <linux/pm_runtime.h>
1213
1314 #include "tb.h"
1415 #include "tb_regs.h"
@@ -22,13 +23,21 @@ · 7 unmodified lines
2223 * events and exit if this is not set (it needs to
2324 * acquire the lock one more time). Used to drain wq
2425 * after cfg has been paused.
26+ * @remove_work: Work used to remove any unplugged routers after
27+ * runtime resume
2528 */
2629 struct tb_cm {
2730 struct list_head tunnel_list;
2831 struct list_head dp_resources;
2932 bool hotplug_active;
33+ struct delayed_work remove_work;
3034 };
3135
36+static inline struct tb *tcm_to_tb(struct tb_cm *tcm)
37+{
38+ return ((void *)tcm - sizeof(struct tb));
39+}
40+
3241 struct tb_hotplug_event {
3342 struct work_struct work;
3443 struct tb *tb;
@@ -140,6 +149,29 @@ static void tb_discover_tunnels(struct tb_switch *sw) · 105 unmodified lines
140149 }
141150 }
142151
152+static int tb_port_configure_xdomain(struct tb_port *port)
153+{
154+ /*
155+ * XDomain paths currently only support single lane so we must
156+ * disable the other lane according to USB4 spec.
157+ */
158+ tb_port_disable(port->dual_link_port);
159+
160+ if (tb_switch_is_usb4(port->sw))
161+ return usb4_port_configure_xdomain(port);
162+ return tb_lc_configure_xdomain(port);
163+}
164+
165+static void tb_port_unconfigure_xdomain(struct tb_port *port)
166+{
167+ if (tb_switch_is_usb4(port->sw))
168+ usb4_port_unconfigure_xdomain(port);
169+ else
170+ tb_lc_unconfigure_xdomain(port);
171+
172+ tb_port_enable(port->dual_link_port);
173+}
174+
143175 static void tb_scan_xdomain(struct tb_port *port)
144176 {
145177 struct tb_switch *sw = port->sw;
@@ -158,6 +190,7 @@ static void tb_scan_xdomain(struct tb_port *port) · 12 unmodified lines
158190 NULL);
159191 if (xd) {
160192 tb_port_at(route, sw)->xdomain = xd;
193+ tb_port_configure_xdomain(port);
161194 tb_xdomain_add(xd);
162195 }
163196 }
@@ -502,8 +535,13 @@ static void tb_scan_switch(struct tb_switch *sw) · 338 unmodified lines
502535 {
503536 struct tb_port *port;
504537
538+ pm_runtime_get_sync(&sw->dev);
539+
505540 tb_switch_for_each_port(sw, port)
506541 tb_scan_port(port);
542+
543+ pm_runtime_mark_last_busy(&sw->dev);
544+ pm_runtime_put_autosuspend(&sw->dev);
507545 }
508546
509547 /**
@@ -566,6 +604,7 @@ static void tb_scan_port(struct tb_port *port) · 56 unmodified lines
566604 */
567605 if (port->xdomain) {
568606 tb_xdomain_remove(port->xdomain);
607+ tb_port_unconfigure_xdomain(port);
569608 port->xdomain = NULL;
570609 }
571610
@@ -577,6 +616,12 @@ static void tb_scan_port(struct tb_port *port) · 5 unmodified lines
577616 if (!tcm->hotplug_active)
578617 dev_set_uevent_suppress(&sw->dev, true);
579618
619+ /*
620+ * At the moment Thunderbolt 2 and beyond (devices with LC) we
621+ * can support runtime PM.
622+ */
623+ sw->rpm = sw->generation > 1;
624+
580625 if (tb_switch_add(sw)) {
581626 tb_switch_put(sw);
582627 return;
@@ -592,8 +637,9 @@ static void tb_scan_port(struct tb_port *port) · 9 unmodified lines
592637 }
593638
594639 /* Enable lane bonding if supported */
595− if (tb_switch_lane_bonding_enable(sw))
596− tb_sw_warn(sw, "failed to enable lane bonding\n");
640+ tb_switch_lane_bonding_enable(sw);
641+ /* Set the link configured */
642+ tb_switch_configure_link(sw);
597643
598644 if (tb_enable_tmu(sw))
599645 tb_sw_warn(sw, "failed to enable TMU\n");
@@ -636,6 +682,11 @@ static void tb_deactivate_and_free_tunnel(struct tb_tunnel *tunnel) · 36 unmodified lines
636682 * deallocated properly.
637683 */
638684 tb_switch_dealloc_dp_resource(src_port->sw, src_port);
685+ /* Now we can allow the domain to runtime suspend again */
686+ pm_runtime_mark_last_busy(&dst_port->sw->dev);
687+ pm_runtime_put_autosuspend(&dst_port->sw->dev);
688+ pm_runtime_mark_last_busy(&src_port->sw->dev);
689+ pm_runtime_put_autosuspend(&src_port->sw->dev);
639690 fallthrough;
640691
641692 case TB_TUNNEL_USB3:
@@ -682,6 +733,7 @@ static void tb_free_unplugged_children(struct tb_switch *sw) · 40 unmodified lines
682733 if (port->remote->sw->is_unplugged) {
683734 tb_retimer_remove_all(port);
684735 tb_remove_dp_resources(port->remote->sw);
736+ tb_switch_unconfigure_link(port->remote->sw);
685737 tb_switch_lane_bonding_disable(port->remote->sw);
686738 tb_switch_remove(port->remote->sw);
687739 port->remote = NULL;
@@ -821,9 +873,20 @@ static void tb_tunnel_dp(struct tb *tb) · 133 unmodified lines
821873 return;
822874 }
823875
876+ /*
877+ * DP stream needs the domain to be active so runtime resume
878+ * both ends of the tunnel.
879+ *
880+ * This should bring the routers in the middle active as well
881+ * and keeps the domain from runtime suspending while the DP
882+ * tunnel is active.
883+ */
884+ pm_runtime_get_sync(&in->sw->dev);
885+ pm_runtime_get_sync(&out->sw->dev);
886+
824887 if (tb_switch_alloc_dp_resource(in->sw, in)) {
825888 tb_port_dbg(in, "no resource available for DP IN, not tunneling\n");
826− return;
889+ goto err_rpm_put;
827890 }
828891
829892 /* Make all unused USB3 bandwidth available for the new DP tunnel */
@@ -862,6 +925,11 @@ err_reclaim: · 32 unmodified lines
862925 tb_reclaim_usb3_bandwidth(tb, in, out);
863926 err_dealloc_dp:
864927 tb_switch_dealloc_dp_resource(in->sw, in);
928+err_rpm_put:
929+ pm_runtime_mark_last_busy(&out->sw->dev);
930+ pm_runtime_put_autosuspend(&out->sw->dev);
931+ pm_runtime_mark_last_busy(&in->sw->dev);
932+ pm_runtime_put_autosuspend(&in->sw->dev);
865933 }
866934
867935 static void tb_dp_resource_unavailable(struct tb *tb, struct tb_port *port)
@@ -911,6 +979,29 @@ static void tb_dp_resource_available(struct tb *tb, struct tb_port *port) · 43 unmodified lines
911979 tb_tunnel_dp(tb);
912980 }
913981
982+static void tb_disconnect_and_release_dp(struct tb *tb)
983+{
984+ struct tb_cm *tcm = tb_priv(tb);
985+ struct tb_tunnel *tunnel, *n;
986+
987+ /*
988+ * Tear down all DP tunnels and release their resources. They
989+ * will be re-established after resume based on plug events.
990+ */
991+ list_for_each_entry_safe_reverse(tunnel, n, &tcm->tunnel_list, list) {
992+ if (tb_tunnel_is_dp(tunnel))
993+ tb_deactivate_and_free_tunnel(tunnel);
994+ }
995+
996+ while (!list_empty(&tcm->dp_resources)) {
997+ struct tb_port *port;
998+
999+ port = list_first_entry(&tcm->dp_resources,
1000+ struct tb_port, list);
1001+ list_del_init(&port->list);
1002+ }
1003+}
1004+
9141005 static int tb_tunnel_pci(struct tb *tb, struct tb_switch *sw)
9151006 {
9161007 struct tb_port *up, *down, *port;
@@ -1022,6 +1113,10 @@ static void tb_handle_hotplug(struct work_struct *work) · 105 unmodified lines
10221113 struct tb_cm *tcm = tb_priv(tb);
10231114 struct tb_switch *sw;
10241115 struct tb_port *port;
1116+
1117+ /* Bring the domain back from sleep if it was suspended */
1118+ pm_runtime_get_sync(&tb->dev);
1119+
10251120 mutex_lock(&tb->lock);
10261121 if (!tcm->hotplug_active)
10271122 goto out; /* during init, suspend or shutdown */
@@ -1045,6 +1140,9 @@ static void tb_handle_hotplug(struct work_struct *work) · 17 unmodified lines
10451140 ev->route, ev->port, ev->unplug);
10461141 goto put_sw;
10471142 }
1143+
1144+ pm_runtime_get_sync(&sw->dev);
1145+
10481146 if (ev->unplug) {
10491147 tb_retimer_remove_all(port);
10501148
@@ -1054,6 +1152,7 @@ static void tb_handle_hotplug(struct work_struct *work) · 3 unmodified lines
10541152 tb_free_invalid_tunnels(tb);
10551153 tb_remove_dp_resources(port->remote->sw);
10561154 tb_switch_tmu_disable(port->remote->sw);
1155+ tb_switch_unconfigure_link(port->remote->sw);
10571156 tb_switch_lane_bonding_disable(port->remote->sw);
10581157 tb_switch_remove(port->remote->sw);
10591158 port->remote = NULL;
@@ -1077,6 +1176,7 @@ static void tb_handle_hotplug(struct work_struct *work) · 17 unmodified lines
10771176 port->xdomain = NULL;
10781177 __tb_disconnect_xdomain_paths(tb, xd);
10791178 tb_xdomain_put(xd);
1179+ tb_port_unconfigure_xdomain(port);
10801180 } else if (tb_port_is_dpout(port) || tb_port_is_dpin(port)) {
10811181 tb_dp_resource_unavailable(tb, port);
10821182 } else {
@@ -1096,10 +1196,17 @@ static void tb_handle_hotplug(struct work_struct *work) · 13 unmodified lines
10961196 }
10971197 }
10981198
1199+ pm_runtime_mark_last_busy(&sw->dev);
1200+ pm_runtime_put_autosuspend(&sw->dev);
1201+
10991202 put_sw:
11001203 tb_switch_put(sw);
11011204 out:
11021205 mutex_unlock(&tb->lock);
1206+
1207+ pm_runtime_mark_last_busy(&tb->dev);
1208+ pm_runtime_put_autosuspend(&tb->dev);
1209+
11031210 kfree(ev);
11041211 }
11051212
@@ -1135,6 +1242,7 @@ static void tb_stop(struct tb *tb) · 29 unmodified lines
11351242 struct tb_tunnel *tunnel;
11361243 struct tb_tunnel *n;
11371244
1245+ cancel_delayed_work(&tcm->remove_work);
11381246 /* tunnels are only present after everything has been initialized */
11391247 list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list) {
11401248 /*
@@ -1186,6 +1294,8 @@ static int tb_start(struct tb *tb) · 45 unmodified lines
11861294 * root switch.
11871295 */
11881296 tb->root_switch->no_nvm_upgrade = true;
1297+ /* All USB4 routers support runtime PM */
1298+ tb->root_switch->rpm = tb_switch_is_usb4(tb->root_switch);
11891299
11901300 ret = tb_switch_configure(tb->root_switch);
11911301 if (ret) {
@@ -1227,7 +1337,8 @@ static int tb_suspend_noirq(struct tb *tb) · 35 unmodified lines
12271337 struct tb_cm *tcm = tb_priv(tb);
12281338
12291339 tb_dbg(tb, "suspending...\n");
1230− tb_switch_suspend(tb->root_switch);
1340+ tb_disconnect_and_release_dp(tb);
1341+ tb_switch_suspend(tb->root_switch, false);
12311342 tcm->hotplug_active = false; /* signal tb_handle_hotplug to quit */
12321343 tb_dbg(tb, "suspend finished\n");
12331344
@@ -1238,17 +1349,25 @@ static void tb_restore_children(struct tb_switch *sw) · 4 unmodified lines
12381349 {
12391350 struct tb_port *port;
12401351
1352+ /* No need to restore if the router is already unplugged */
1353+ if (sw->is_unplugged)
1354+ return;
1355+
12411356 if (tb_enable_tmu(sw))
12421357 tb_sw_warn(sw, "failed to restore TMU configuration\n");
12431358
12441359 tb_switch_for_each_port(sw, port) {
1245− if (!tb_port_has_remote(port))
1360+ if (!tb_port_has_remote(port) && !port->xdomain)
12461361 continue;
12471362
1248− if (tb_switch_lane_bonding_enable(port->remote->sw))
1249− dev_warn(&sw->dev, "failed to restore lane bonding\n");
1363+ if (port->remote) {
1364+ tb_switch_lane_bonding_enable(port->remote->sw);
1365+ tb_switch_configure_link(port->remote->sw);
12501366
1251− tb_restore_children(port->remote->sw);
1367+ tb_restore_children(port->remote->sw);
1368+ } else if (port->xdomain) {
1369+ tb_port_configure_xdomain(port);
1370+ }
12521371 }
12531372 }
12541373
@@ -1260,7 +1379,7 @@ static int tb_resume_noirq(struct tb *tb) · 5 unmodified lines
12601379 tb_dbg(tb, "resuming...\n");
12611380
12621381 /* remove any pci devices the firmware might have setup */
1263− tb_switch_reset(tb, 0);
1382+ tb_switch_reset(tb->root_switch);
12641383
12651384 tb_switch_resume(tb->root_switch);
12661385 tb_free_invalid_tunnels(tb);
@@ -1294,6 +1413,7 @@ static int tb_free_unplugged_xdomains(struct tb_switch *sw) · 27 unmodified lines
12941413 if (port->xdomain && port->xdomain->is_unplugged) {
12951414 tb_retimer_remove_all(port);
12961415 tb_xdomain_remove(port->xdomain);
1416+ tb_port_unconfigure_xdomain(port);
12971417 port->xdomain = NULL;
12981418 ret++;
12991419 } else if (port->remote) {
@@ -1304,6 +1424,22 @@ static int tb_free_unplugged_xdomains(struct tb_switch *sw) · 4 unmodified lines
13041424 return ret;
13051425 }
13061426
1427+static int tb_freeze_noirq(struct tb *tb)
1428+{
1429+ struct tb_cm *tcm = tb_priv(tb);
1430+
1431+ tcm->hotplug_active = false;
1432+ return 0;
1433+}
1434+
1435+static int tb_thaw_noirq(struct tb *tb)
1436+{
1437+ struct tb_cm *tcm = tb_priv(tb);
1438+
1439+ tcm->hotplug_active = true;
1440+ return 0;
1441+}
1442+
13071443 static void tb_complete(struct tb *tb)
13081444 {
13091445 /*
@@ -1317,12 +1453,64 @@ static void tb_complete(struct tb *tb) · 7 unmodified lines
13171453 mutex_unlock(&tb->lock);
13181454 }
13191455
1456+static int tb_runtime_suspend(struct tb *tb)
1457+{
1458+ struct tb_cm *tcm = tb_priv(tb);
1459+
1460+ mutex_lock(&tb->lock);
1461+ tb_switch_suspend(tb->root_switch, true);
1462+ tcm->hotplug_active = false;
1463+ mutex_unlock(&tb->lock);
1464+
1465+ return 0;
1466+}
1467+
1468+static void tb_remove_work(struct work_struct *work)
1469+{
1470+ struct tb_cm *tcm = container_of(work, struct tb_cm, remove_work.work);
1471+ struct tb *tb = tcm_to_tb(tcm);
1472+
1473+ mutex_lock(&tb->lock);
1474+ if (tb->root_switch) {
1475+ tb_free_unplugged_children(tb->root_switch);
1476+ tb_free_unplugged_xdomains(tb->root_switch);
1477+ }
1478+ mutex_unlock(&tb->lock);
1479+}
1480+
1481+static int tb_runtime_resume(struct tb *tb)
1482+{
1483+ struct tb_cm *tcm = tb_priv(tb);
1484+ struct tb_tunnel *tunnel, *n;
1485+
1486+ mutex_lock(&tb->lock);
1487+ tb_switch_resume(tb->root_switch);
1488+ tb_free_invalid_tunnels(tb);
1489+ tb_restore_children(tb->root_switch);
1490+ list_for_each_entry_safe(tunnel, n, &tcm->tunnel_list, list)
1491+ tb_tunnel_restart(tunnel);
1492+ tcm->hotplug_active = true;
1493+ mutex_unlock(&tb->lock);
1494+
1495+ /*
1496+ * Schedule cleanup of any unplugged devices. Run this in a
1497+ * separate thread to avoid possible deadlock if the device
1498+ * removal runtime resumes the unplugged device.
1499+ */
1500+ queue_delayed_work(tb->wq, &tcm->remove_work, msecs_to_jiffies(50));
1501+ return 0;
1502+}
1503+
13201504 static const struct tb_cm_ops tb_cm_ops = {
13211505 .start = tb_start,
13221506 .stop = tb_stop,
13231507 .suspend_noirq = tb_suspend_noirq,
13241508 .resume_noirq = tb_resume_noirq,
1509+ .freeze_noirq = tb_freeze_noirq,
1510+ .thaw_noirq = tb_thaw_noirq,
13251511 .complete = tb_complete,
1512+ .runtime_suspend = tb_runtime_suspend,
1513+ .runtime_resume = tb_runtime_resume,
13261514 .handle_event = tb_handle_event,
13271515 .approve_switch = tb_tunnel_pci,
13281516 .approve_xdomain_paths = tb_approve_xdomain_paths,
@@ -1344,6 +1532,7 @@ struct tb *tb_probe(struct tb_nhi *nhi) · 15 unmodified lines
13441532 tcm = tb_priv(tb);
13451533 INIT_LIST_HEAD(&tcm->tunnel_list);
13461534 INIT_LIST_HEAD(&tcm->dp_resources);
1535+ INIT_DELAYED_WORK(&tcm->remove_work, tb_remove_work);
13471536
13481537 return tb;
13491538 }
drivers/thunderbolt/tb.h+124−36
@@ -125,6 +125,7 @@ struct tb_switch_tmu { · 124 unmodified lines
125125 * @rpm: The switch supports runtime PM
126126 * @authorized: Whether the switch is authorized by user or policy
127127 * @security_level: Switch supported security level
128+ * @debugfs_dir: Pointer to the debugfs structure
128129 * @key: Contains the key used to challenge the device or %NULL if not
129130 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
130131 * @connection_id: Connection ID used with ICM messaging
@@ -166,6 +167,7 @@ struct tb_switch { · 35 unmodified lines
166167 bool rpm;
167168 unsigned int authorized;
168169 enum tb_security_level security_level;
170+ struct dentry *debugfs_dir;
169171 u8 *key;
170172 u8 connection_id;
171173 u8 connection_key;
@@ -333,6 +335,13 @@ struct tb_path { · 161 unmodified lines
333335 */
334336 #define TB_PATH_MAX_HOPS (7 * 2)
335337
338+/* Possible wake types */
339+#define TB_WAKE_ON_CONNECT BIT(0)
340+#define TB_WAKE_ON_DISCONNECT BIT(1)
341+#define TB_WAKE_ON_USB4 BIT(2)
342+#define TB_WAKE_ON_USB3 BIT(3)
343+#define TB_WAKE_ON_PCIE BIT(4)
344+
336345 /**
337346 * struct tb_cm_ops - Connection manager specific operations vector
338347 * @driver_ready: Called right after control channel is started. Used by
@@ -342,6 +351,8 @@ struct tb_path { · 3 unmodified lines
342351 * @suspend_noirq: Connection manager specific suspend_noirq
343352 * @resume_noirq: Connection manager specific resume_noirq
344353 * @suspend: Connection manager specific suspend
354+ * @freeze_noirq: Connection manager specific freeze_noirq
355+ * @thaw_noirq: Connection manager specific thaw_noirq
345356 * @complete: Connection manager specific complete
346357 * @runtime_suspend: Connection manager specific runtime_suspend
347358 * @runtime_resume: Connection manager specific runtime_resume
@@ -364,6 +375,8 @@ struct tb_cm_ops { · 16 unmodified lines
364375 int (*suspend_noirq)(struct tb *tb);
365376 int (*resume_noirq)(struct tb *tb);
366377 int (*suspend)(struct tb *tb);
378+ int (*freeze_noirq)(struct tb *tb);
379+ int (*thaw_noirq)(struct tb *tb);
367380 void (*complete)(struct tb *tb);
368381 int (*runtime_suspend)(struct tb *tb);
369382 int (*runtime_resume)(struct tb *tb);
@@ -457,6 +470,11 @@ static inline bool tb_port_is_null(const struct tb_port *port) · 87 unmodified lines
457470 return port && port->port && port->config.type == TB_TYPE_PORT;
458471 }
459472
473+static inline bool tb_port_is_nhi(const struct tb_port *port)
474+{
475+ return port && port->config.type == TB_TYPE_NHI;
476+}
477+
460478 static inline bool tb_port_is_pcie_down(const struct tb_port *port)
461479 {
462480 return port && port->config.type == TB_TYPE_PCIE_DOWN;
@@ -593,6 +611,8 @@ void tb_domain_remove(struct tb *tb); · 130 unmodified lines
593611 int tb_domain_suspend_noirq(struct tb *tb);
594612 int tb_domain_resume_noirq(struct tb *tb);
595613 int tb_domain_suspend(struct tb *tb);
614+int tb_domain_freeze_noirq(struct tb *tb);
615+int tb_domain_thaw_noirq(struct tb *tb);
596616 void tb_domain_complete(struct tb *tb);
597617 int tb_domain_runtime_suspend(struct tb *tb);
598618 int tb_domain_runtime_resume(struct tb *tb);
@@ -632,9 +652,9 @@ struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb, · 33 unmodified lines
632652 int tb_switch_configure(struct tb_switch *sw);
633653 int tb_switch_add(struct tb_switch *sw);
634654 void tb_switch_remove(struct tb_switch *sw);
635−void tb_switch_suspend(struct tb_switch *sw);
655+void tb_switch_suspend(struct tb_switch *sw, bool runtime);
636656 int tb_switch_resume(struct tb_switch *sw);
637−int tb_switch_reset(struct tb *tb, u64 route);
657+int tb_switch_reset(struct tb_switch *sw);
638658 void tb_sw_set_unplugged(struct tb_switch *sw);
639659 struct tb_port *tb_switch_find_port(struct tb_switch *sw,
640660 enum tb_port_type type);
@@ -685,59 +705,89 @@ static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw) · 44 unmodified lines
685705
686706 static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
687707 {
688− return sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
708+ return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
709+ sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
689710 }
690711
691712 static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
692713 {
693− return sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
714+ return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
715+ sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
694716 }
695717
696718 static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
697719 {
698− switch (sw->config.device_id) {
699− case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
700− case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
701− return true;
702− default:
703− return false;
720+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
721+ switch (sw->config.device_id) {
722+ case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
723+ case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
724+ return true;
725+ }
704726 }
727+ return false;
705728 }
706729
707730 static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
708731 {
709− switch (sw->config.device_id) {
710− case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
711− case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
712− return true;
713− default:
714− return false;
732+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
733+ switch (sw->config.device_id) {
734+ case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
735+ case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
736+ return true;
737+ }
715738 }
739+ return false;
716740 }
717741
718742 static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
719743 {
720− switch (sw->config.device_id) {
721− case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
722− case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
723− case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
724− case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
725− return true;
726− default:
727− return false;
744+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
745+ switch (sw->config.device_id) {
746+ case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
747+ case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
748+ case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
749+ case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
750+ return true;
751+ }
728752 }
753+ return false;
729754 }
730755
731756 static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
732757 {
733− switch (sw->config.device_id) {
734− case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
735− case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
736− case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
737− return true;
738− default:
739− return false;
758+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
759+ switch (sw->config.device_id) {
760+ case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
761+ case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
762+ case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
763+ return true;
764+ }
765+ }
766+ return false;
767+}
768+
769+static inline bool tb_switch_is_ice_lake(const struct tb_switch *sw)
770+{
771+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
772+ switch (sw->config.device_id) {
773+ case PCI_DEVICE_ID_INTEL_ICL_NHI0:
774+ case PCI_DEVICE_ID_INTEL_ICL_NHI1:
775+ return true;
776+ }
777+ }
778+ return false;
779+}
780+
781+static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
782+{
783+ if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
784+ switch (sw->config.device_id) {
785+ case PCI_DEVICE_ID_INTEL_TGL_NHI0:
786+ case PCI_DEVICE_ID_INTEL_TGL_NHI1:
787+ return true;
788+ }
740789 }
790+ return false;
741791 }
742792
743793 /**
@@ -767,6 +817,8 @@ static inline bool tb_switch_is_icm(const struct tb_switch *sw) · 23 unmodified lines
767817
768818 int tb_switch_lane_bonding_enable(struct tb_switch *sw);
769819 void tb_switch_lane_bonding_disable(struct tb_switch *sw);
820+int tb_switch_configure_link(struct tb_switch *sw);
821+void tb_switch_unconfigure_link(struct tb_switch *sw);
770822
771823 bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
772824 int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
@@ -788,6 +840,8 @@ int tb_port_add_nfc_credits(struct tb_port *port, int credits); · 15 unmodified lines
788840 int tb_port_set_initial_credits(struct tb_port *port, u32 credits);
789841 int tb_port_clear_counter(struct tb_port *port, int counter);
790842 int tb_port_unlock(struct tb_port *port);
843+int tb_port_enable(struct tb_port *port);
844+int tb_port_disable(struct tb_port *port);
791845 int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
792846 void tb_port_release_in_hopid(struct tb_port *port, int hopid);
793847 int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
@@ -811,7 +865,9 @@ int tb_port_get_link_speed(struct tb_port *port); · 17 unmodified lines
811865
812866 int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
813867 int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
868+int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
814869 int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
870+int tb_port_next_cap(struct tb_port *port, unsigned int offset);
815871 bool tb_port_is_enabled(struct tb_port *port);
816872
817873 bool tb_usb3_port_is_enabled(struct tb_port *port);
@@ -844,8 +900,11 @@ int tb_drom_read(struct tb_switch *sw); · 26 unmodified lines
844900 int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
845901
846902 int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
847−int tb_lc_configure_link(struct tb_switch *sw);
848−void tb_lc_unconfigure_link(struct tb_switch *sw);
903+int tb_lc_configure_port(struct tb_port *port);
904+void tb_lc_unconfigure_port(struct tb_port *port);
905+int tb_lc_configure_xdomain(struct tb_port *port);
906+void tb_lc_unconfigure_xdomain(struct tb_port *port);
907+int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
849908 int tb_lc_set_sleep(struct tb_switch *sw);
850909 bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
851910 bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
@@ -900,9 +959,8 @@ int usb4_switch_setup(struct tb_switch *sw); · 48 unmodified lines
900959 int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
901960 int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
902961 size_t size);
903−int usb4_switch_configure_link(struct tb_switch *sw);
904−void usb4_switch_unconfigure_link(struct tb_switch *sw);
905962 bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
963+int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
906964 int usb4_switch_set_sleep(struct tb_switch *sw);
907965 int usb4_switch_nvm_sector_size(struct tb_switch *sw);
908966 int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
@@ -919,6 +977,10 @@ struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw, · 10 unmodified lines
919977 const struct tb_port *port);
920978
921979 int usb4_port_unlock(struct tb_port *port);
980+int usb4_port_configure(struct tb_port *port);
981+void usb4_port_unconfigure(struct tb_port *port);
982+int usb4_port_configure_xdomain(struct tb_port *port);
983+void usb4_port_unconfigure_xdomain(struct tb_port *port);
922984 int usb4_port_enumerate_retimers(struct tb_port *port);
923985
924986 int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
@@ -945,9 +1007,35 @@ int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw, · 20 unmodified lines
9451007 int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
9461008 int *downstream_bw);
9471009
948−/* keep link controller awake during update */
1010+/* Keep link controller awake during update */
9491011 #define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
9501012
9511013 void tb_check_quirks(struct tb_switch *sw);
9521014
1015+#ifdef CONFIG_ACPI
1016+void tb_acpi_add_links(struct tb_nhi *nhi);
1017+#else
1018+static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
1019+#endif
1020+
1021+#ifdef CONFIG_DEBUG_FS
1022+void tb_debugfs_init(void);
1023+void tb_debugfs_exit(void);
1024+void tb_switch_debugfs_init(struct tb_switch *sw);
1025+void tb_switch_debugfs_remove(struct tb_switch *sw);
1026+#else
1027+static inline void tb_debugfs_init(void) { }
1028+static inline void tb_debugfs_exit(void) { }
1029+static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1030+static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
1031+#endif
1032+
1033+#ifdef CONFIG_USB4_KUNIT_TEST
1034+int tb_test_init(void);
1035+void tb_test_exit(void);
1036+#else
1037+static inline int tb_test_init(void) { return 0; }
1038+static inline void tb_test_exit(void) { }
1039+#endif
1040+
9531041 #endif
drivers/thunderbolt/tb_msgs.h+1−0
@@ -28,6 +28,7 @@ enum tb_cfg_error { · 27 unmodified lines
2828 TB_CFG_ERROR_LOOP = 8,
2929 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
3030 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
31+ TB_CFG_ERROR_LOCK = 15,
3132 };
3233
3334 /* common header */
drivers/thunderbolt/tb_regs.h+33−1
@@ -39,6 +39,7 @@ enum tb_switch_vse_cap { · 38 unmodified lines
3939
4040 enum tb_port_cap {
4141 TB_PORT_CAP_PHY = 0x01,
42+ TB_PORT_CAP_POWER = 0x02,
4243 TB_PORT_CAP_TIME1 = 0x03,
4344 TB_PORT_CAP_ADAP = 0x04,
4445 TB_PORT_CAP_VSE = 0x05,
@@ -93,6 +94,20 @@ struct tb_cap_extended_long { · 48 unmodified lines
9394 u16 length;
9495 } __packed;
9596
97+/**
98+ * struct tb_cap_any - Structure capable of hold every capability
99+ * @basic: Basic capability
100+ * @extended_short: Vendor specific capability
101+ * @extended_long: Vendor specific extended capability
102+ */
103+struct tb_cap_any {
104+ union {
105+ struct tb_cap_basic basic;
106+ struct tb_cap_extended_short extended_short;
107+ struct tb_cap_extended_long extended_long;
108+ };
109+} __packed;
110+
96111 /* capabilities */
97112
98113 struct tb_cap_link_controller {
@@ -178,6 +193,8 @@ struct tb_regs_switch_header { · 79 unmodified lines
178193 #define ROUTER_CS_4 0x04
179194 #define ROUTER_CS_5 0x05
180195 #define ROUTER_CS_5_SLP BIT(0)
196+#define ROUTER_CS_5_WOP BIT(1)
197+#define ROUTER_CS_5_WOU BIT(2)
181198 #define ROUTER_CS_5_C3S BIT(23)
182199 #define ROUTER_CS_5_PTO BIT(24)
183200 #define ROUTER_CS_5_UTO BIT(25)
@@ -186,6 +203,8 @@ struct tb_regs_switch_header { · 2 unmodified lines
186203 #define ROUTER_CS_6 0x06
187204 #define ROUTER_CS_6_SLPR BIT(0)
188205 #define ROUTER_CS_6_TNS BIT(1)
206+#define ROUTER_CS_6_WOPS BIT(2)
207+#define ROUTER_CS_6_WOUS BIT(3)
189208 #define ROUTER_CS_6_HCI BIT(18)
190209 #define ROUTER_CS_6_CR BIT(25)
191210 #define ROUTER_CS_7 0x07
@@ -234,7 +253,8 @@ struct tb_regs_port_header { · 42 unmodified lines
234253 /* DWORD 1 */
235254 u32 first_cap_offset:8;
236255 u32 max_counters:11;
237− u32 __unknown1:5;
256+ u32 counters_support:1;
257+ u32 __unknown1:4;
238258 u32 revision:8;
239259 /* DWORD 2 */
240260 enum tb_port_type type:24;
@@ -279,6 +299,7 @@ struct tb_regs_port_header { · 38 unmodified lines
279299 #define LANE_ADP_CS_1_TARGET_WIDTH_SHIFT 4
280300 #define LANE_ADP_CS_1_TARGET_WIDTH_SINGLE 0x1
281301 #define LANE_ADP_CS_1_TARGET_WIDTH_DUAL 0x3
302+#define LANE_ADP_CS_1_LD BIT(14)
282303 #define LANE_ADP_CS_1_LB BIT(15)
283304 #define LANE_ADP_CS_1_CURRENT_SPEED_MASK GENMASK(19, 16)
284305 #define LANE_ADP_CS_1_CURRENT_SPEED_SHIFT 16
@@ -301,8 +322,13 @@ struct tb_regs_port_header { · 16 unmodified lines
301322 #define PORT_CS_18 0x12
302323 #define PORT_CS_18_BE BIT(8)
303324 #define PORT_CS_18_TCM BIT(9)
325+#define PORT_CS_18_WOU4S BIT(18)
304326 #define PORT_CS_19 0x13
305327 #define PORT_CS_19_PC BIT(3)
328+#define PORT_CS_19_PID BIT(4)
329+#define PORT_CS_19_WOC BIT(16)
330+#define PORT_CS_19_WOD BIT(17)
331+#define PORT_CS_19_WOU4 BIT(18)
306332
307333 /* Display Port adapter registers */
308334 #define ADP_DP_CS_0 0x00
@@ -416,8 +442,14 @@ struct tb_regs_hop { · 107 unmodified lines
416442 #define TB_LC_PORT_ATTR_BE BIT(12)
417443
418444 #define TB_LC_SX_CTRL 0x96
445+#define TB_LC_SX_CTRL_WOC BIT(1)
446+#define TB_LC_SX_CTRL_WOD BIT(2)
447+#define TB_LC_SX_CTRL_WOU4 BIT(5)
448+#define TB_LC_SX_CTRL_WOP BIT(6)
419449 #define TB_LC_SX_CTRL_L1C BIT(16)
450+#define TB_LC_SX_CTRL_L1D BIT(17)
420451 #define TB_LC_SX_CTRL_L2C BIT(20)
452+#define TB_LC_SX_CTRL_L2D BIT(21)
421453 #define TB_LC_SX_CTRL_UPSTREAM BIT(30)
422454 #define TB_LC_SX_CTRL_SLP BIT(31)
423455
drivers/thunderbolt/test.c+12−1
@@ -1623,4 +1623,15 @@ static struct kunit_suite tb_test_suite = { · 1622 unmodified lines
16231623 .name = "thunderbolt",
16241624 .test_cases = tb_test_cases,
16251625 };
1626−kunit_test_suite(tb_test_suite);
1626+
1627+static struct kunit_suite *tb_test_suites[] = { &tb_test_suite, NULL };
1628+
1629+int tb_test_init(void)
1630+{
1631+ return __kunit_test_suites_init(tb_test_suites);
1632+}
1633+
1634+void tb_test_exit(void)
1635+{
1636+ return __kunit_test_suites_exit(tb_test_suites);
1637+}
drivers/thunderbolt/usb4.c+197−54
@@ -196,6 +196,46 @@ static int usb4_switch_op(struct tb_switch *sw, u16 opcode, u8 *status) · 195 unmodified lines
196196 return 0;
197197 }
198198
199+static void usb4_switch_check_wakes(struct tb_switch *sw)
200+{
201+ struct tb_port *port;
202+ bool wakeup = false;
203+ u32 val;
204+
205+ if (!device_may_wakeup(&sw->dev))
206+ return;
207+
208+ if (tb_route(sw)) {
209+ if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
210+ return;
211+
212+ tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
213+ (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
214+ (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
215+
216+ wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
217+ }
218+
219+ /* Check for any connected downstream ports for USB4 wake */
220+ tb_switch_for_each_port(sw, port) {
221+ if (!tb_port_has_remote(port))
222+ continue;
223+
224+ if (tb_port_read(port, &val, TB_CFG_PORT,
225+ port->cap_usb4 + PORT_CS_18, 1))
226+ break;
227+
228+ tb_port_dbg(port, "USB4 wake: %s\n",
229+ (val & PORT_CS_18_WOU4S) ? "yes" : "no");
230+
231+ if (val & PORT_CS_18_WOU4S)
232+ wakeup = true;
233+ }
234+
235+ if (wakeup)
236+ pm_wakeup_event(&sw->dev, 0);
237+}
238+
199239 static bool link_is_usb4(struct tb_port *port)
200240 {
201241 u32 val;
@@ -229,6 +269,8 @@ int usb4_switch_setup(struct tb_switch *sw) · 27 unmodified lines
229269 u32 val = 0;
230270 int ret;
231271
272+ usb4_switch_check_wakes(sw);
273+
232274 if (!tb_route(sw))
233275 return 0;
234276
@@ -338,87 +380,99 @@ int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf, · 103 unmodified lines
338380 usb4_switch_drom_read_block, sw);
339381 }
340382
341−static int usb4_set_port_configured(struct tb_port *port, bool configured)
383+/**
384+ * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
385+ * @sw: USB4 router
386+ *
387+ * Checks whether conditions are met so that lane bonding can be
388+ * established with the upstream router. Call only for device routers.
389+ */
390+bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
342391 {
392+ struct tb_port *up;
343393 int ret;
344394 u32 val;
345395
346− ret = tb_port_read(port, &val, TB_CFG_PORT,
347− port->cap_usb4 + PORT_CS_19, 1);
396+ up = tb_upstream_port(sw);
397+ ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
348398 if (ret)
349− return ret;
350−
351− if (configured)
352− val |= PORT_CS_19_PC;
353− else
354− val &= ~PORT_CS_19_PC;
399+ return false;
355400
356− return tb_port_write(port, &val, TB_CFG_PORT,
357− port->cap_usb4 + PORT_CS_19, 1);
401+ return !!(val & PORT_CS_18_BE);
358402 }
359403
360404 /**
361− * usb4_switch_configure_link() - Set upstream USB4 link configured
405+ * usb4_switch_set_wake() - Enabled/disable wake
362406 * @sw: USB4 router
407+ * @flags: Wakeup flags (%0 to disable)
363408 *
364− * Sets the upstream USB4 link to be configured for power management
365− * purposes.
409+ * Enables/disables router to wake up from sleep.
366410 */
367−int usb4_switch_configure_link(struct tb_switch *sw)
411+int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
368412 {
369− struct tb_port *up;
413+ struct tb_port *port;
414+ u64 route = tb_route(sw);
415+ u32 val;
416+ int ret;
370417
371− if (!tb_route(sw))
372− return 0;
418+ /*
419+ * Enable wakes coming from all USB4 downstream ports (from
420+ * child routers). For device routers do this also for the
421+ * upstream USB4 port.
422+ */
423+ tb_switch_for_each_port(sw, port) {
424+ if (!route && tb_is_upstream_port(port))
425+ continue;
373426
374− up = tb_upstream_port(sw);
375− return usb4_set_port_configured(up, true);
376−}
427+ ret = tb_port_read(port, &val, TB_CFG_PORT,
428+ port->cap_usb4 + PORT_CS_19, 1);
429+ if (ret)
430+ return ret;
377431
378−/**
379− * usb4_switch_unconfigure_link() - Un-set upstream USB4 link configuration
380− * @sw: USB4 router
381− *
382− * Reverse of usb4_switch_configure_link().
383− */
384−void usb4_switch_unconfigure_link(struct tb_switch *sw)
385−{
386− struct tb_port *up;
432+ val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
387433
388− if (sw->is_unplugged || !tb_route(sw))
389− return;
434+ if (flags & TB_WAKE_ON_CONNECT)
435+ val |= PORT_CS_19_WOC;
436+ if (flags & TB_WAKE_ON_DISCONNECT)
437+ val |= PORT_CS_19_WOD;
438+ if (flags & TB_WAKE_ON_USB4)
439+ val |= PORT_CS_19_WOU4;
390440
391− up = tb_upstream_port(sw);
392− usb4_set_port_configured(up, false);
393−}
441+ ret = tb_port_write(port, &val, TB_CFG_PORT,
442+ port->cap_usb4 + PORT_CS_19, 1);
443+ if (ret)
444+ return ret;
445+ }
394446
395−/**
396− * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
397− * @sw: USB4 router
398− *
399− * Checks whether conditions are met so that lane bonding can be
400− * established with the upstream router. Call only for device routers.
401− */
402−bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
403−{
404− struct tb_port *up;
405− int ret;
406− u32 val;
447+ /*
448+ * Enable wakes from PCIe and USB 3.x on this router. Only
449+ * needed for device routers.
450+ */
451+ if (route) {
452+ ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
453+ if (ret)
454+ return ret;
407455
408− up = tb_upstream_port(sw);
409− ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
410− if (ret)
411− return false;
456+ val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
457+ if (flags & TB_WAKE_ON_USB3)
458+ val |= ROUTER_CS_5_WOU;
459+ if (flags & TB_WAKE_ON_PCIE)
460+ val |= ROUTER_CS_5_WOP;
412461
413− return !!(val & PORT_CS_18_BE);
462+ ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
463+ if (ret)
464+ return ret;
465+ }
466+
467+ return 0;
414468 }
415469
416470 /**
417471 * usb4_switch_set_sleep() - Prepare the router to enter sleep
418472 * @sw: USB4 router
419473 *
420− * Enables wakes and sets sleep bit for the router. Returns when the
421− * router sleep ready bit has been asserted.
474+ * Sets sleep bit for the router. Returns when the router sleep ready
475+ * bit has been asserted.
422476 */
423477 int usb4_switch_set_sleep(struct tb_switch *sw)
424478 {
@@ -795,6 +849,95 @@ int usb4_port_unlock(struct tb_port *port) · 370 unmodified lines
795849 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
796850 }
797851
852+static int usb4_port_set_configured(struct tb_port *port, bool configured)
853+{
854+ int ret;
855+ u32 val;
856+
857+ if (!port->cap_usb4)
858+ return -EINVAL;
859+
860+ ret = tb_port_read(port, &val, TB_CFG_PORT,
861+ port->cap_usb4 + PORT_CS_19, 1);
862+ if (ret)
863+ return ret;
864+
865+ if (configured)
866+ val |= PORT_CS_19_PC;
867+ else
868+ val &= ~PORT_CS_19_PC;
869+
870+ return tb_port_write(port, &val, TB_CFG_PORT,
871+ port->cap_usb4 + PORT_CS_19, 1);
872+}
873+
874+/**
875+ * usb4_port_configure() - Set USB4 port configured
876+ * @port: USB4 router
877+ *
878+ * Sets the USB4 link to be configured for power management purposes.
879+ */
880+int usb4_port_configure(struct tb_port *port)
881+{
882+ return usb4_port_set_configured(port, true);
883+}
884+
885+/**
886+ * usb4_port_unconfigure() - Set USB4 port unconfigured
887+ * @port: USB4 router
888+ *
889+ * Sets the USB4 link to be unconfigured for power management purposes.
890+ */
891+void usb4_port_unconfigure(struct tb_port *port)
892+{
893+ usb4_port_set_configured(port, false);
894+}
895+
896+static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
897+{
898+ int ret;
899+ u32 val;
900+
901+ if (!port->cap_usb4)
902+ return -EINVAL;
903+
904+ ret = tb_port_read(port, &val, TB_CFG_PORT,
905+ port->cap_usb4 + PORT_CS_19, 1);
906+ if (ret)
907+ return ret;
908+
909+ if (configured)
910+ val |= PORT_CS_19_PID;
911+ else
912+ val &= ~PORT_CS_19_PID;
913+
914+ return tb_port_write(port, &val, TB_CFG_PORT,
915+ port->cap_usb4 + PORT_CS_19, 1);
916+}
917+
918+/**
919+ * usb4_port_configure_xdomain() - Configure port for XDomain
920+ * @port: USB4 port connected to another host
921+ *
922+ * Marks the USB4 port as being connected to another host. Returns %0 in
923+ * success and negative errno in failure.
924+ */
925+int usb4_port_configure_xdomain(struct tb_port *port)
926+{
927+ return usb4_set_xdomain_configured(port, true);
928+}
929+
930+/**
931+ * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
932+ * @port: USB4 port that was connected to another host
933+ *
934+ * Clears USB4 port from being marked as XDomain.
935+ */
936+void usb4_port_unconfigure_xdomain(struct tb_port *port)
937+{
938+ usb4_set_xdomain_configured(port, false);
939+}
940+
798941 static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
799942 u32 value, int timeout_msec)
800943 {
drivers/usb/atm/cxacru.c+13−14
@@ -230,12 +230,12 @@ CXACRU__ATTR_INIT(_name) · 229 unmodified lines
230230
231231 static ssize_t cxacru_sysfs_showattr_u32(u32 value, char *buf)
232232 {
233− return snprintf(buf, PAGE_SIZE, "%u\n", value);
233+ return sprintf(buf, "%u\n", value);
234234 }
235235
236236 static ssize_t cxacru_sysfs_showattr_s8(s8 value, char *buf)
237237 {
238− return snprintf(buf, PAGE_SIZE, "%d\n", value);
238+ return sprintf(buf, "%d\n", value);
239239 }
240240
241241 static ssize_t cxacru_sysfs_showattr_dB(s16 value, char *buf)
@@ -255,8 +255,8 @@ static ssize_t cxacru_sysfs_showattr_bool(u32 value, char *buf) · 13 unmodified lines
255255 static char *str[] = { "no", "yes" };
256256
257257 if (unlikely(value >= ARRAY_SIZE(str)))
258− return snprintf(buf, PAGE_SIZE, "%u\n", value);
259− return snprintf(buf, PAGE_SIZE, "%s\n", str[value]);
258+ return sprintf(buf, "%u\n", value);
259+ return sprintf(buf, "%s\n", str[value]);
260260 }
261261
262262 static ssize_t cxacru_sysfs_showattr_LINK(u32 value, char *buf)
@@ -264,8 +264,8 @@ static ssize_t cxacru_sysfs_showattr_LINK(u32 value, char *buf) · 1 unmodified line
264264 static char *str[] = { NULL, "not connected", "connected", "lost" };
265265
266266 if (unlikely(value >= ARRAY_SIZE(str) || str[value] == NULL))
267− return snprintf(buf, PAGE_SIZE, "%u\n", value);
268− return snprintf(buf, PAGE_SIZE, "%s\n", str[value]);
267+ return sprintf(buf, "%u\n", value);
268+ return sprintf(buf, "%s\n", str[value]);
269269 }
270270
271271 static ssize_t cxacru_sysfs_showattr_LINE(u32 value, char *buf)
@@ -275,8 +275,8 @@ static ssize_t cxacru_sysfs_showattr_LINE(u32 value, char *buf) · 3 unmodified lines
275275 "waiting", "initialising"
276276 };
277277 if (unlikely(value >= ARRAY_SIZE(str)))
278− return snprintf(buf, PAGE_SIZE, "%u\n", value);
279− return snprintf(buf, PAGE_SIZE, "%s\n", str[value]);
278+ return sprintf(buf, "%u\n", value);
279+ return sprintf(buf, "%s\n", str[value]);
280280 }
281281
282282 static ssize_t cxacru_sysfs_showattr_MODU(u32 value, char *buf)
@@ -288,8 +288,8 @@ static ssize_t cxacru_sysfs_showattr_MODU(u32 value, char *buf) · 5 unmodified lines
288288 "ITU-T G.992.2 (G.LITE)"
289289 };
290290 if (unlikely(value >= ARRAY_SIZE(str)))
291− return snprintf(buf, PAGE_SIZE, "%u\n", value);
292− return snprintf(buf, PAGE_SIZE, "%s\n", str[value]);
291+ return sprintf(buf, "%u\n", value);
292+ return sprintf(buf, "%s\n", str[value]);
293293 }
294294
295295 /*
@@ -309,8 +309,7 @@ static ssize_t mac_address_show(struct device *dev, · 13 unmodified lines
309309 if (instance == NULL || instance->usbatm->atm_dev == NULL)
310310 return -ENODEV;
311311
312− return snprintf(buf, PAGE_SIZE, "%pM\n",
313− instance->usbatm->atm_dev->esi);
312+ return sprintf(buf, "%pM\n", instance->usbatm->atm_dev->esi);
314313 }
315314
316315 static ssize_t adsl_state_show(struct device *dev,
@@ -326,8 +325,8 @@ static ssize_t adsl_state_show(struct device *dev, · 9 unmodified lines
326325
327326 value = instance->card_info[CXINF_LINE_STARTABLE];
328327 if (unlikely(value >= ARRAY_SIZE(str)))
329− return snprintf(buf, PAGE_SIZE, "%u\n", value);
330− return snprintf(buf, PAGE_SIZE, "%s\n", str[value]);
328+ return sprintf(buf, "%u\n", value);
329+ return sprintf(buf, "%s\n", str[value]);
331330 }
332331
333332 static ssize_t adsl_state_store(struct device *dev,
drivers/usb/atm/usbatm.c+8−6
@@ -511,9 +511,10 @@ static unsigned int usbatm_write_cells(struct usbatm_data *instance, · 510 unmodified lines
511511 ** receive **
512512 **************/
513513
514−static void usbatm_rx_process(unsigned long data)
514+static void usbatm_rx_process(struct tasklet_struct *t)
515515 {
516− struct usbatm_data *instance = (struct usbatm_data *)data;
516+ struct usbatm_data *instance = from_tasklet(instance, t,
517+ rx_channel.tasklet);
517518 struct urb *urb;
518519
519520 while ((urb = usbatm_pop_urb(&instance->rx_channel))) {
@@ -564,9 +565,10 @@ static void usbatm_rx_process(unsigned long data) · 44 unmodified lines
564565 ** send **
565566 ***********/
566567
567−static void usbatm_tx_process(unsigned long data)
568+static void usbatm_tx_process(struct tasklet_struct *t)
568569 {
569− struct usbatm_data *instance = (struct usbatm_data *)data;
570+ struct usbatm_data *instance = from_tasklet(instance, t,
571+ tx_channel.tasklet);
570572 struct sk_buff *skb = instance->current_skb;
571573 struct urb *urb = NULL;
572574 const unsigned int buf_size = instance->tx_channel.buf_size;
@@ -1069,8 +1071,8 @@ int usbatm_usb_probe(struct usb_interface *intf, const struct usb_device_id *id, · 496 unmodified lines
10691071
10701072 usbatm_init_channel(&instance->rx_channel);
10711073 usbatm_init_channel(&instance->tx_channel);
1072− tasklet_init(&instance->rx_channel.tasklet, usbatm_rx_process, (unsigned long)instance);
1073− tasklet_init(&instance->tx_channel.tasklet, usbatm_tx_process, (unsigned long)instance);
1074+ tasklet_setup(&instance->rx_channel.tasklet, usbatm_rx_process);
1075+ tasklet_setup(&instance->tx_channel.tasklet, usbatm_tx_process);
10741076 instance->rx_channel.stride = ATM_CELL_SIZE + driver->rx_padding;
10751077 instance->tx_channel.stride = ATM_CELL_SIZE + driver->tx_padding;
10761078 instance->rx_channel.usbatm = instance->tx_channel.usbatm = instance;
drivers/usb/c67x00/c67x00-sched.c+3−4
@@ -1123,9 +1123,9 @@ static void c67x00_do_work(struct c67x00_hcd *c67x00) · 1122 unmodified lines
11231123
11241124 /* -------------------------------------------------------------------------- */
11251125
1126−static void c67x00_sched_tasklet(unsigned long __c67x00)
1126+static void c67x00_sched_tasklet(struct tasklet_struct *t)
11271127 {
1128− struct c67x00_hcd *c67x00 = (struct c67x00_hcd *)__c67x00;
1128+ struct c67x00_hcd *c67x00 = from_tasklet(c67x00, t, tasklet);
11291129 c67x00_do_work(c67x00);
11301130 }
11311131
@@ -1136,8 +1136,7 @@ void c67x00_sched_kick(struct c67x00_hcd *c67x00) · 4 unmodified lines
11361136
11371137 int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00)
11381138 {
1139− tasklet_init(&c67x00->tasklet, c67x00_sched_tasklet,
1140− (unsigned long)c67x00);
1139+ tasklet_setup(&c67x00->tasklet, c67x00_sched_tasklet);
11411140 return 0;
11421141 }
11431142
drivers/usb/cdns3/cdns3-imx.c+186−5
@@ -15,6 +15,8 @@ · 14 unmodified lines
1515 #include <linux/io.h>
1616 #include <linux/of_platform.h>
1717 #include <linux/iopoll.h>
18+#include <linux/pm_runtime.h>
19+#include "core.h"
1820
1921 #define USB3_CORE_CTRL1 0x00
2022 #define USB3_CORE_CTRL2 0x04
@@ -32,7 +34,7 @@ · 11 unmodified lines
3234 /* Register bits definition */
3335
3436 /* USB3_CORE_CTRL1 */
35−#define SW_RESET_MASK (0x3f << 26)
37+#define SW_RESET_MASK GENMASK(31, 26)
3638 #define PWR_SW_RESET BIT(31)
3739 #define APB_SW_RESET BIT(30)
3840 #define AXI_SW_RESET BIT(29)
@@ -53,8 +55,8 @@ · 14 unmodified lines
5355 #define LPM_CLK_REQ BIT(28)
5456 #define DEVU3_WAEKUP_EN BIT(14)
5557 #define OTG_WAKEUP_EN BIT(12)
56−#define DEV_INT_EN (3 << 8) /* DEV INT b9:8 */
57−#define HOST_INT1_EN (1 << 0) /* HOST INT b7:0 */
58+#define DEV_INT_EN (3 << 8) /* DEV INT b9:8 */
59+#define HOST_INT1_EN (1 << 0) /* HOST INT b7:0 */
5860
5961 /* USB3_CORE_STATUS */
6062 #define MDCTRL_CLK_STATUS BIT(15)
@@ -66,11 +68,30 @@ · 5 unmodified lines
6668 #define CLK_VALID_COMPARE_BITS (0xf << 28)
6769 #define PHY_REFCLK_REQ (1 << 0)
6870
71+/* OTG registers definition */
72+#define OTGSTS 0x4
73+/* OTGSTS */
74+#define OTG_NRDY BIT(11)
75+
76+/* xHCI registers definition */
77+#define XECP_PM_PMCSR 0x8018
78+#define XECP_AUX_CTRL_REG1 0x8120
79+
80+/* Register bits definition */
81+/* XECP_AUX_CTRL_REG1 */
82+#define CFG_RXDET_P3_EN BIT(15)
83+
84+/* XECP_PM_PMCSR */
85+#define PS_MASK GENMASK(1, 0)
86+#define PS_D0 0
87+#define PS_D1 1
88+
6989 struct cdns_imx {
7090 struct device *dev;
7191 void __iomem *noncore;
7292 struct clk_bulk_data *clks;
7393 int num_clks;
94+ struct platform_device *cdns3_pdev;
7495 };
7596
7697 static inline u32 cdns_imx_readl(struct cdns_imx *data, u32 offset)
@@ -126,6 +147,20 @@ static int cdns_imx_noncore_init(struct cdns_imx *data) · 49 unmodified lines
126147 return ret;
127148 }
128149
150+static int cdns_imx_platform_suspend(struct device *dev,
151+ bool suspend, bool wakeup);
152+static struct cdns3_platform_data cdns_imx_pdata = {
153+ .platform_suspend = cdns_imx_platform_suspend,
154+};
155+
156+static const struct of_dev_auxdata cdns_imx_auxdata[] = {
157+ {
158+ .compatible = "cdns,usb3",
159+ .platform_data = &cdns_imx_pdata,
160+ },
161+ {},
162+};
163+
129164 static int cdns_imx_probe(struct platform_device *pdev)
130165 {
131166 struct device *dev = &pdev->dev;
@@ -162,14 +197,18 @@ static int cdns_imx_probe(struct platform_device *pdev) · 30 unmodified lines
162197 if (ret)
163198 goto err;
164199
165− ret = of_platform_populate(node, NULL, NULL, dev);
200+ ret = of_platform_populate(node, NULL, cdns_imx_auxdata, dev);
166201 if (ret) {
167202 dev_err(dev, "failed to create children: %d\n", ret);
168203 goto err;
169204 }
170205
171− return ret;
206+ device_set_wakeup_capable(dev, true);
207+ pm_runtime_set_active(dev);
208+ pm_runtime_enable(dev);
209+ pm_runtime_forbid(dev);
172210
211+ return ret;
173212 err:
174213 clk_bulk_disable_unprepare(data->num_clks, data->clks);
175214 return ret;
@@ -194,6 +233,147 @@ static int cdns_imx_remove(struct platform_device *pdev) · 18 unmodified lines
194233 return 0;
195234 }
196235
236+#ifdef CONFIG_PM
237+static void cdns3_set_wakeup(struct cdns_imx *data, bool enable)
238+{
239+ u32 value;
240+
241+ value = cdns_imx_readl(data, USB3_INT_REG);
242+ if (enable)
243+ value |= OTG_WAKEUP_EN | DEVU3_WAEKUP_EN;
244+ else
245+ value &= ~(OTG_WAKEUP_EN | DEVU3_WAEKUP_EN);
246+
247+ cdns_imx_writel(data, USB3_INT_REG, value);
248+}
249+
250+static int cdns_imx_platform_suspend(struct device *dev,
251+ bool suspend, bool wakeup)
252+{
253+ struct cdns3 *cdns = dev_get_drvdata(dev);
254+ struct device *parent = dev->parent;
255+ struct cdns_imx *data = dev_get_drvdata(parent);
256+ void __iomem *otg_regs = (void __iomem *)(cdns->otg_regs);
257+ void __iomem *xhci_regs = cdns->xhci_regs;
258+ u32 value;
259+ int ret = 0;
260+
261+ if (cdns->role != USB_ROLE_HOST)
262+ return 0;
263+
264+ if (suspend) {
265+ /* SW request low power when all usb ports allow to it ??? */
266+ value = readl(xhci_regs + XECP_PM_PMCSR);
267+ value &= ~PS_MASK;
268+ value |= PS_D1;
269+ writel(value, xhci_regs + XECP_PM_PMCSR);
270+
271+ /* mdctrl_clk_sel */
272+ value = cdns_imx_readl(data, USB3_CORE_CTRL1);
273+ value |= MDCTRL_CLK_SEL;
274+ cdns_imx_writel(data, USB3_CORE_CTRL1, value);
275+
276+ /* wait for mdctrl_clk_status */
277+ value = cdns_imx_readl(data, USB3_CORE_STATUS);
278+ ret = readl_poll_timeout(data->noncore + USB3_CORE_STATUS, value,
279+ (value & MDCTRL_CLK_STATUS) == MDCTRL_CLK_STATUS,
280+ 10, 100000);
281+ if (ret)
282+ dev_warn(parent, "wait mdctrl_clk_status timeout\n");
283+
284+ /* wait lpm_clk_req to be 0 */
285+ value = cdns_imx_readl(data, USB3_INT_REG);
286+ ret = readl_poll_timeout(data->noncore + USB3_INT_REG, value,
287+ (value & LPM_CLK_REQ) != LPM_CLK_REQ,
288+ 10, 100000);
289+ if (ret)
290+ dev_warn(parent, "wait lpm_clk_req timeout\n");
291+
292+ /* wait phy_refclk_req to be 0 */
293+ value = cdns_imx_readl(data, USB3_SSPHY_STATUS);
294+ ret = readl_poll_timeout(data->noncore + USB3_SSPHY_STATUS, value,
295+ (value & PHY_REFCLK_REQ) != PHY_REFCLK_REQ,
296+ 10, 100000);
297+ if (ret)
298+ dev_warn(parent, "wait phy_refclk_req timeout\n");
299+
300+ cdns3_set_wakeup(data, wakeup);
301+ } else {
302+ cdns3_set_wakeup(data, false);
303+
304+ /* SW request D0 */
305+ value = readl(xhci_regs + XECP_PM_PMCSR);
306+ value &= ~PS_MASK;
307+ value |= PS_D0;
308+ writel(value, xhci_regs + XECP_PM_PMCSR);
309+
310+ /* clr CFG_RXDET_P3_EN */
311+ value = readl(xhci_regs + XECP_AUX_CTRL_REG1);
312+ value &= ~CFG_RXDET_P3_EN;
313+ writel(value, xhci_regs + XECP_AUX_CTRL_REG1);
314+
315+ /* clear mdctrl_clk_sel */
316+ value = cdns_imx_readl(data, USB3_CORE_CTRL1);
317+ value &= ~MDCTRL_CLK_SEL;
318+ cdns_imx_writel(data, USB3_CORE_CTRL1, value);
319+
320+ /* wait CLK_125_REQ to be 1 */
321+ value = cdns_imx_readl(data, USB3_INT_REG);
322+ ret = readl_poll_timeout(data->noncore + USB3_INT_REG, value,
323+ (value & CLK_125_REQ) == CLK_125_REQ,
324+ 10, 100000);
325+ if (ret)
326+ dev_warn(parent, "wait CLK_125_REQ timeout\n");
327+
328+ /* wait for mdctrl_clk_status is cleared */
329+ value = cdns_imx_readl(data, USB3_CORE_STATUS);
330+ ret = readl_poll_timeout(data->noncore + USB3_CORE_STATUS, value,
331+ (value & MDCTRL_CLK_STATUS) != MDCTRL_CLK_STATUS,
332+ 10, 100000);
333+ if (ret)
334+ dev_warn(parent, "wait mdctrl_clk_status cleared timeout\n");
335+
336+ /* Wait until OTG_NRDY is 0 */
337+ value = readl(otg_regs + OTGSTS);
338+ ret = readl_poll_timeout(otg_regs + OTGSTS, value,
339+ (value & OTG_NRDY) != OTG_NRDY,
340+ 10, 100000);
341+ if (ret)
342+ dev_warn(parent, "wait OTG ready timeout\n");
343+ }
344+
345+ return ret;
346+
347+}
348+
349+static int cdns_imx_resume(struct device *dev)
350+{
351+ struct cdns_imx *data = dev_get_drvdata(dev);
352+
353+ return clk_bulk_prepare_enable(data->num_clks, data->clks);
354+}
355+
356+static int cdns_imx_suspend(struct device *dev)
357+{
358+ struct cdns_imx *data = dev_get_drvdata(dev);
359+
360+ clk_bulk_disable_unprepare(data->num_clks, data->clks);
361+
362+ return 0;
363+}
364+#else
365+static int cdns_imx_platform_suspend(struct device *dev,
366+ bool suspend, bool wakeup)
367+{
368+ return 0;
369+}
370+
371+#endif /* CONFIG_PM */
372+
373+static const struct dev_pm_ops cdns_imx_pm_ops = {
374+ SET_RUNTIME_PM_OPS(cdns_imx_suspend, cdns_imx_resume, NULL)
375+};
376+
197377 static const struct of_device_id cdns_imx_of_match[] = {
198378 { .compatible = "fsl,imx8qm-usb3", },
199379 {},
@@ -206,6 +386,7 @@ static struct platform_driver cdns_imx_driver = { · 6 unmodified lines
206386 .driver = {
207387 .name = "cdns3-imx",
208388 .of_match_table = cdns_imx_of_match,
389+ .pm = &cdns_imx_pm_ops,
209390 },
210391 };
211392 module_platform_driver(cdns_imx_driver);
drivers/usb/cdns3/core.c+170−32
@@ -280,6 +280,10 @@ int cdns3_hw_role_switch(struct cdns3 *cdns) · 279 unmodified lines
280280 enum usb_role real_role, current_role;
281281 int ret = 0;
282282
283+ /* Depends on role switch class */
284+ if (cdns->role_sw)
285+ return 0;
286+
283287 pm_runtime_get_sync(cdns->dev);
284288
285289 current_role = cdns->role;
@@ -371,6 +375,50 @@ pm_put: · 85 unmodified lines
371375 return ret;
372376 }
373377
378+static int set_phy_power_on(struct cdns3 *cdns)
379+{
380+ int ret;
381+
382+ ret = phy_power_on(cdns->usb2_phy);
383+ if (ret)
384+ return ret;
385+
386+ ret = phy_power_on(cdns->usb3_phy);
387+ if (ret)
388+ phy_power_off(cdns->usb2_phy);
389+
390+ return ret;
391+}
392+
393+static void set_phy_power_off(struct cdns3 *cdns)
394+{
395+ phy_power_off(cdns->usb3_phy);
396+ phy_power_off(cdns->usb2_phy);
397+}
398+
399+/**
400+ * cdns3_wakeup_irq - interrupt handler for wakeup events
401+ * @irq: irq number for cdns3 core device
402+ * @data: structure of cdns3
403+ *
404+ * Returns IRQ_HANDLED or IRQ_NONE
405+ */
406+static irqreturn_t cdns3_wakeup_irq(int irq, void *data)
407+{
408+ struct cdns3 *cdns = data;
409+
410+ if (cdns->in_lpm) {
411+ disable_irq_nosync(irq);
412+ cdns->wakeup_pending = true;
413+ if ((cdns->role == USB_ROLE_HOST) && cdns->host_dev)
414+ pm_request_resume(&cdns->host_dev->dev);
415+
416+ return IRQ_HANDLED;
417+ }
418+
419+ return IRQ_NONE;
420+}
421+
374422 /**
375423 * cdns3_probe - probe for cdns3 core device
376424 * @pdev: Pointer to cdns3 core platform device
@@ -397,6 +445,7 @@ static int cdns3_probe(struct platform_device *pdev) · 20 unmodified lines
397445 return -ENOMEM;
398446
399447 cdns->dev = dev;
448+ cdns->pdata = dev_get_platdata(dev);
400449
401450 platform_set_drvdata(pdev, cdns);
402451
@@ -443,8 +492,21 @@ static int cdns3_probe(struct platform_device *pdev) · 40 unmodified lines
443492 return -ENXIO;
444493 }
445494
495+ cdns->phyrst_a_enable = device_property_read_bool(dev, "cdns,phyrst-a-enable");
496+
446497 cdns->otg_res = *res;
447498
499+ cdns->wakeup_irq = platform_get_irq_byname_optional(pdev, "wakeup");
500+ if (cdns->wakeup_irq == -EPROBE_DEFER)
501+ return cdns->wakeup_irq;
502+ else if (cdns->wakeup_irq == 0)
503+ return -EINVAL;
504+
505+ if (cdns->wakeup_irq < 0) {
506+ dev_dbg(dev, "couldn't get wakeup irq\n");
507+ cdns->wakeup_irq = 0x0;
508+ }
509+
448510 mutex_init(&cdns->mutex);
449511
450512 cdns->usb2_phy = devm_phy_optional_get(dev, "cdns3,usb2-phy");
@@ -463,14 +525,10 @@ static int cdns3_probe(struct platform_device *pdev) · 12 unmodified lines
463525 if (ret)
464526 goto err1;
465527
466− ret = phy_power_on(cdns->usb2_phy);
528+ ret = set_phy_power_on(cdns);
467529 if (ret)
468530 goto err2;
469531
470− ret = phy_power_on(cdns->usb3_phy);
471− if (ret)
472− goto err3;
473−
474532 sw_desc.set = cdns3_role_set;
475533 sw_desc.get = cdns3_role_get;
476534 sw_desc.allow_userspace_control = true;
@@ -482,20 +540,34 @@ static int cdns3_probe(struct platform_device *pdev) · 5 unmodified lines
482540 if (IS_ERR(cdns->role_sw)) {
483541 ret = PTR_ERR(cdns->role_sw);
484542 dev_warn(dev, "Unable to register Role Switch\n");
485− goto err4;
543+ goto err3;
544+ }
545+
546+ if (cdns->wakeup_irq) {
547+ ret = devm_request_irq(cdns->dev, cdns->wakeup_irq,
548+ cdns3_wakeup_irq,
549+ IRQF_SHARED,
550+ dev_name(cdns->dev), cdns);
551+
552+ if (ret) {
553+ dev_err(cdns->dev, "couldn't register wakeup irq handler\n");
554+ goto err3;
555+ }
486556 }
487557
488558 ret = cdns3_drd_init(cdns);
489559 if (ret)
490− goto err5;
560+ goto err4;
491561
492562 ret = cdns3_core_init_role(cdns);
493563 if (ret)
494− goto err5;
564+ goto err4;
495565
566+ spin_lock_init(&cdns->lock);
496567 device_set_wakeup_capable(dev, true);
497568 pm_runtime_set_active(dev);
498569 pm_runtime_enable(dev);
570+ pm_runtime_forbid(dev);
499571
500572 /*
501573 * The controller needs less time between bus and controller suspend,
@@ -508,14 +580,11 @@ static int cdns3_probe(struct platform_device *pdev) · 6 unmodified lines
508580 dev_dbg(dev, "Cadence USB3 core: probe succeed\n");
509581
510582 return 0;
511−err5:
583+err4:
512584 cdns3_drd_exit(cdns);
513585 usb_role_switch_unregister(cdns->role_sw);
514−err4:
515− phy_power_off(cdns->usb3_phy);
516−
517586 err3:
518− phy_power_off(cdns->usb2_phy);
587+ set_phy_power_off(cdns);
519588 err2:
520589 phy_exit(cdns->usb3_phy);
521590 err1:
@@ -539,59 +608,128 @@ static int cdns3_remove(struct platform_device *pdev) · 17 unmodified lines
539608 pm_runtime_put_noidle(&pdev->dev);
540609 cdns3_exit_roles(cdns);
541610 usb_role_switch_unregister(cdns->role_sw);
542− phy_power_off(cdns->usb2_phy);
543− phy_power_off(cdns->usb3_phy);
611+ set_phy_power_off(cdns);
544612 phy_exit(cdns->usb2_phy);
545613 phy_exit(cdns->usb3_phy);
546614 return 0;
547615 }
548616
549−#ifdef CONFIG_PM_SLEEP
617+#ifdef CONFIG_PM
550618
551−static int cdns3_suspend(struct device *dev)
619+static int cdns3_set_platform_suspend(struct device *dev,
620+ bool suspend, bool wakeup)
621+{
622+ struct cdns3 *cdns = dev_get_drvdata(dev);
623+ int ret = 0;
624+
625+ if (cdns->pdata && cdns->pdata->platform_suspend)
626+ ret = cdns->pdata->platform_suspend(dev, suspend, wakeup);
627+
628+ return ret;
629+}
630+
631+static int cdns3_controller_suspend(struct device *dev, pm_message_t msg)
552632 {
553633 struct cdns3 *cdns = dev_get_drvdata(dev);
634+ bool wakeup;
554635 unsigned long flags;
555636
556− if (cdns->role == USB_ROLE_HOST)
637+ if (cdns->in_lpm)
557638 return 0;
558639
559− if (pm_runtime_status_suspended(dev))
560− pm_runtime_resume(dev);
640+ if (PMSG_IS_AUTO(msg))
641+ wakeup = true;
642+ else
643+ wakeup = device_may_wakeup(dev);
561644
562− if (cdns->roles[cdns->role]->suspend) {
563− spin_lock_irqsave(&cdns->gadget_dev->lock, flags);
564− cdns->roles[cdns->role]->suspend(cdns, false);
565− spin_unlock_irqrestore(&cdns->gadget_dev->lock, flags);
566− }
645+ cdns3_set_platform_suspend(cdns->dev, true, wakeup);
646+ set_phy_power_off(cdns);
647+ spin_lock_irqsave(&cdns->lock, flags);
648+ cdns->in_lpm = true;
649+ spin_unlock_irqrestore(&cdns->lock, flags);
650+ dev_dbg(cdns->dev, "%s ends\n", __func__);
567651
568652 return 0;
569653 }
570654
571−static int cdns3_resume(struct device *dev)
655+static int cdns3_controller_resume(struct device *dev, pm_message_t msg)
572656 {
573657 struct cdns3 *cdns = dev_get_drvdata(dev);
658+ int ret;
574659 unsigned long flags;
575660
576− if (cdns->role == USB_ROLE_HOST)
661+ if (!cdns->in_lpm)
577662 return 0;
578663
579− if (cdns->roles[cdns->role]->resume) {
580− spin_lock_irqsave(&cdns->gadget_dev->lock, flags);
664+ ret = set_phy_power_on(cdns);
665+ if (ret)
666+ return ret;
667+
668+ cdns3_set_platform_suspend(cdns->dev, false, false);
669+
670+ spin_lock_irqsave(&cdns->lock, flags);
671+ if (cdns->roles[cdns->role]->resume && !PMSG_IS_AUTO(msg))
581672 cdns->roles[cdns->role]->resume(cdns, false);
582− spin_unlock_irqrestore(&cdns->gadget_dev->lock, flags);
673+
674+ cdns->in_lpm = false;
675+ spin_unlock_irqrestore(&cdns->lock, flags);
676+ if (cdns->wakeup_pending) {
677+ cdns->wakeup_pending = false;
678+ enable_irq(cdns->wakeup_irq);
679+ }
680+ dev_dbg(cdns->dev, "%s ends\n", __func__);
681+
682+ return ret;
683+}
684+
685+static int cdns3_runtime_suspend(struct device *dev)
686+{
687+ return cdns3_controller_suspend(dev, PMSG_AUTO_SUSPEND);
688+}
689+
690+static int cdns3_runtime_resume(struct device *dev)
691+{
692+ return cdns3_controller_resume(dev, PMSG_AUTO_RESUME);
693+}
694+#ifdef CONFIG_PM_SLEEP
695+
696+static int cdns3_suspend(struct device *dev)
697+{
698+ struct cdns3 *cdns = dev_get_drvdata(dev);
699+ unsigned long flags;
700+
701+ if (pm_runtime_status_suspended(dev))
702+ pm_runtime_resume(dev);
703+
704+ if (cdns->roles[cdns->role]->suspend) {
705+ spin_lock_irqsave(&cdns->lock, flags);
706+ cdns->roles[cdns->role]->suspend(cdns, false);
707+ spin_unlock_irqrestore(&cdns->lock, flags);
583708 }
584709
710+ return cdns3_controller_suspend(dev, PMSG_SUSPEND);
711+}
712+
713+static int cdns3_resume(struct device *dev)
714+{
715+ int ret;
716+
717+ ret = cdns3_controller_resume(dev, PMSG_RESUME);
718+ if (ret)
719+ return ret;
720+
585721 pm_runtime_disable(dev);
586722 pm_runtime_set_active(dev);
587723 pm_runtime_enable(dev);
588724
589− return 0;
725+ return ret;
590726 }
591−#endif
727+#endif /* CONFIG_PM_SLEEP */
728+#endif /* CONFIG_PM */
592729
593730 static const struct dev_pm_ops cdns3_pm_ops = {
594731 SET_SYSTEM_SLEEP_PM_OPS(cdns3_suspend, cdns3_resume)
732+ SET_RUNTIME_PM_OPS(cdns3_runtime_suspend, cdns3_runtime_resume, NULL)
595733 };
596734
597735 #ifdef CONFIG_OF
drivers/usb/cdns3/core.h+17−0
@@ -38,6 +38,12 @@ struct cdns3_role_driver { · 37 unmodified lines
3838 };
3939
4040 #define CDNS3_XHCI_RESOURCES_NUM 2
41+
42+struct cdns3_platform_data {
43+ int (*platform_suspend)(struct device *dev,
44+ bool suspend, bool wakeup);
45+};
46+
4147 /**
4248 * struct cdns3 - Representation of Cadence USB3 DRD controller.
4349 * @dev: pointer to Cadence device struct
@@ -50,6 +56,7 @@ struct cdns3_role_driver { · 6 unmodified lines
5056 * @otg_regs: pointer to base of otg registers
5157 * @otg_irq: irq number for otg controller
5258 * @dev_irq: irq number for device controller
59+ * @wakeup_irq: irq number for wakeup event, it is optional
5360 * @roles: array of supported roles for this controller
5461 * @role: current role
5562 * @host_dev: the child host device pointer for cdns3 core
@@ -62,6 +69,10 @@ struct cdns3_role_driver { · 6 unmodified lines
6269 * This field based on firmware setting, kernel configuration
6370 * and hardware configuration.
6471 * @role_sw: pointer to role switch object.
72+ * @in_lpm: indicate the controller is in low power mode
73+ * @wakeup_pending: wakeup interrupt pending
74+ * @pdata: platform data from glue layer
75+ * @lock: spinlock structure
6576 */
6677 struct cdns3 {
6778 struct device *dev;
@@ -76,9 +87,11 @@ struct cdns3 { · 8 unmodified lines
7687 #define CDNS3_CONTROLLER_V0 0
7788 #define CDNS3_CONTROLLER_V1 1
7889 u32 version;
90+ bool phyrst_a_enable;
7991
8092 int otg_irq;
8193 int dev_irq;
94+ int wakeup_irq;
8295 struct cdns3_role_driver *roles[USB_ROLE_DEVICE + 1];
8396 enum usb_role role;
8497 struct platform_device *host_dev;
@@ -89,6 +102,10 @@ struct cdns3 { · 4 unmodified lines
89102 struct mutex mutex;
90103 enum usb_dr_mode dr_mode;
91104 struct usb_role_switch *role_sw;
105+ bool in_lpm;
106+ bool wakeup_pending;
107+ struct cdns3_platform_data *pdata;
108+ spinlock_t lock;
92109 };
93110
94111 int cdns3_hw_role_switch(struct cdns3 *cdns);
drivers/usb/cdns3/drd.c+20−0
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <linux/delay.h>
1616 #include <linux/iopoll.h>
1717 #include <linux/usb/otg.h>
18+#include <linux/phy/phy.h>
1819
1920 #include "gadget.h"
2021 #include "drd.h"
@@ -42,6 +43,18 @@ int cdns3_set_mode(struct cdns3 *cdns, enum usb_dr_mode mode) · 21 unmodified lines
4243 reg = readl(&cdns->otg_v1_regs->override);
4344 reg |= OVERRIDE_IDPULLUP;
4445 writel(reg, &cdns->otg_v1_regs->override);
46+
47+ /*
48+ * Enable work around feature built into the
49+ * controller to address issue with RX Sensitivity
50+ * est (EL_17) for USB2 PHY. The issue only occures
51+ * for 0x0002450D controller version.
52+ */
53+ if (cdns->phyrst_a_enable) {
54+ reg = readl(&cdns->otg_v1_regs->phyrst_cfg);
55+ reg |= PHYRST_CFG_PHYRST_A_ENABLE;
56+ writel(reg, &cdns->otg_v1_regs->phyrst_cfg);
57+ }
4558 } else {
4659 reg = readl(&cdns->otg_v0_regs->ctrl1);
4760 reg |= OVERRIDE_IDPULLUP_V0;
@@ -145,6 +158,7 @@ int cdns3_drd_host_on(struct cdns3 *cdns) · 97 unmodified lines
145158 if (ret)
146159 dev_err(cdns->dev, "timeout waiting for xhci_ready\n");
147160
161+ phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_HOST);
148162 return ret;
149163 }
150164
@@ -164,6 +178,7 @@ void cdns3_drd_host_off(struct cdns3 *cdns) · 13 unmodified lines
164178 readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
165179 !(val & OTGSTATE_HOST_STATE_MASK),
166180 1, 2000000);
181+ phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID);
167182 }
168183
169184 /**
@@ -190,6 +205,7 @@ int cdns3_drd_gadget_on(struct cdns3 *cdns) · 20 unmodified lines
190205 return ret;
191206 }
192207
208+ phy_set_mode(cdns->usb3_phy, PHY_MODE_USB_DEVICE);
193209 return 0;
194210 }
195211
@@ -213,6 +229,7 @@ void cdns3_drd_gadget_off(struct cdns3 *cdns) · 17 unmodified lines
213229 readl_poll_timeout_atomic(&cdns->otg_regs->state, val,
214230 !(val & OTGSTATE_DEV_STATE_MASK),
215231 1, 2000000);
232+ phy_set_mode(cdns->usb3_phy, PHY_MODE_INVALID);
216233 }
217234
218235 /**
@@ -293,6 +310,9 @@ static irqreturn_t cdns3_drd_irq(int irq, void *data) · 74 unmodified lines
293310 if (cdns->dr_mode != USB_DR_MODE_OTG)
294311 return IRQ_NONE;
295312
313+ if (cdns->in_lpm)
314+ return ret;
315+
296316 reg = readl(&cdns->otg_regs->ivect);
297317
298318 if (!reg)
drivers/usb/cdns3/drd.h+4−1
@@ -31,7 +31,7 @@ struct cdns3_otg_regs { · 30 unmodified lines
3131 __le32 simulate;
3232 __le32 override;
3333 __le32 susp_ctrl;
34− __le32 reserved4;
34+ __le32 phyrst_cfg;
3535 __le32 anasts;
3636 __le32 adp_ramp_time;
3737 __le32 ctrl1;
@@ -153,6 +153,9 @@ struct cdns3_otg_common_regs { · 115 unmodified lines
153153 /* Only for CDNS3_CONTROLLER_V0 version */
154154 #define OVERRIDE_IDPULLUP_V0 BIT(24)
155155
156+/* PHYRST_CFG - bitmasks */
157+#define PHYRST_CFG_PHYRST_A_ENABLE BIT(0)
158+
156159 #define CDNS3_ID_PERIPHERAL 1
157160 #define CDNS3_ID_HOST 0
158161
drivers/usb/cdns3/ep0.c+9−1
@@ -717,9 +717,17 @@ static int cdns3_gadget_ep0_queue(struct usb_ep *ep, · 716 unmodified lines
717717
718718 /* send STATUS stage. Should be called only for SET_CONFIGURATION */
719719 if (priv_dev->ep0_stage == CDNS3_STATUS_STAGE) {
720+ u32 val;
721+
720722 cdns3_select_ep(priv_dev, 0x00);
721723 cdns3_set_hw_configuration(priv_dev);
722724 cdns3_ep0_complete_setup(priv_dev, 0, 1);
725+ /* wait until configuration set */
726+ ret = readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
727+ val & USB_STS_CFGSTS_MASK, 1, 100);
728+ if (ret == -ETIMEDOUT)
729+ dev_warn(priv_dev->dev, "timeout for waiting configuration set\n");
730+
723731 request->actual = 0;
724732 priv_dev->status_completion_no_call = true;
725733 priv_dev->pending_status_request = request;
@@ -731,7 +739,7 @@ static int cdns3_gadget_ep0_queue(struct usb_ep *ep, · 5 unmodified lines
731739 * ep0_queue is back.
732740 */
733741 queue_work(system_freezable_wq, &priv_dev->pending_status_wq);
734− return 0;
742+ return ret;
735743 }
736744
737745 if (!list_empty(&priv_ep->pending_req_list)) {
drivers/usb/cdns3/gadget.c+183−93
@@ -261,8 +261,8 @@ int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep) · 260 unmodified lines
261261 */
262262 link_trb->control = 0;
263263 } else {
264− link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma);
265− link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE;
264+ link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma));
265+ link_trb->control = cpu_to_le32(TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE);
266266 }
267267 return 0;
268268 }
@@ -462,6 +462,36 @@ static int cdns3_start_all_request(struct cdns3_device *priv_dev, · 193 unmodified lines
462462 (reg) |= EP_STS_EN_DESCMISEN; \
463463 } } while (0)
464464
465+static void __cdns3_descmiss_copy_data(struct usb_request *request,
466+ struct usb_request *descmiss_req)
467+{
468+ int length = request->actual + descmiss_req->actual;
469+ struct scatterlist *s = request->sg;
470+
471+ if (!s) {
472+ if (length <= request->length) {
473+ memcpy(&((u8 *)request->buf)[request->actual],
474+ descmiss_req->buf,
475+ descmiss_req->actual);
476+ request->actual = length;
477+ } else {
478+ /* It should never occures */
479+ request->status = -ENOMEM;
480+ }
481+ } else {
482+ if (length <= sg_dma_len(s)) {
483+ void *p = phys_to_virt(sg_dma_address(s));
484+
485+ memcpy(&((u8 *)p)[request->actual],
486+ descmiss_req->buf,
487+ descmiss_req->actual);
488+ request->actual = length;
489+ } else {
490+ request->status = -ENOMEM;
491+ }
492+ }
493+}
494+
465495 /**
466496 * cdns3_wa2_descmiss_copy_data copy data from internal requests to
467497 * request queued by class driver.
@@ -488,21 +518,9 @@ static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep, · 20 unmodified lines
488518
489519 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
490520 length = request->actual + descmiss_req->actual;
491−
492521 request->status = descmiss_req->status;
493−
494− if (length <= request->length) {
495− memcpy(&((u8 *)request->buf)[request->actual],
496− descmiss_req->buf,
497− descmiss_req->actual);
498− request->actual = length;
499− } else {
500− /* It should never occures */
501− request->status = -ENOMEM;
502− }
503−
522+ __cdns3_descmiss_copy_data(request, descmiss_req);
504523 list_del_init(&descmiss_priv_req->list);
505−
506524 kfree(descmiss_req->buf);
507525 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
508526 --priv_ep->wa2_counter;
@@ -817,6 +835,8 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep, · 308 unmodified lines
817835 request->length);
818836
819837 priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
838+ /* All TRBs have finished, clear the counter */
839+ priv_req->finished_trb = 0;
820840 trace_cdns3_gadget_giveback(priv_req);
821841
822842 if (priv_dev->dev_ver < DEV_VER_V2) {
@@ -847,10 +867,10 @@ static void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep) · 24 unmodified lines
847867 priv_ep->wa1_trb_index = 0xFFFF;
848868 if (priv_ep->wa1_cycle_bit) {
849869 priv_ep->wa1_trb->control =
850− priv_ep->wa1_trb->control | 0x1;
870+ priv_ep->wa1_trb->control | cpu_to_le32(0x1);
851871 } else {
852872 priv_ep->wa1_trb->control =
853− priv_ep->wa1_trb->control & ~0x1;
873+ priv_ep->wa1_trb->control & cpu_to_le32(~0x1);
854874 }
855875 }
856876 }
@@ -1008,17 +1028,16 @@ static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep, · 151 unmodified lines
10081028 TRB_STREAM_ID(priv_req->request.stream_id) | TRB_ISP;
10091029
10101030 if (!request->num_sgs) {
1011− trb->buffer = TRB_BUFFER(trb_dma);
1031+ trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
10121032 length = request->length;
10131033 } else {
1014− trb->buffer = TRB_BUFFER(request->sg[sg_idx].dma_address);
1034+ trb->buffer = cpu_to_le32(TRB_BUFFER(request->sg[sg_idx].dma_address));
10151035 length = request->sg[sg_idx].length;
10161036 }
10171037
10181038 tdl = DIV_ROUND_UP(length, priv_ep->endpoint.maxpacket);
10191039
1020− trb->length = TRB_BURST_LEN(16 /*priv_ep->trb_burst_size*/) |
1021− TRB_LEN(length);
1040+ trb->length = cpu_to_le32(TRB_BURST_LEN(16) | TRB_LEN(length));
10221041
10231042 /*
10241043 * For DEV_VER_V2 controller version we have enabled
@@ -1027,11 +1046,11 @@ static int cdns3_ep_run_stream_transfer(struct cdns3_endpoint *priv_ep, · 2 unmodified lines
10271046 */
10281047 if (priv_dev->dev_ver >= DEV_VER_V2) {
10291048 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1030− trb->length |= TRB_TDL_SS_SIZE(tdl);
1049+ trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(tdl));
10311050 }
10321051 priv_req->flags |= REQUEST_PENDING;
10331052
1034− trb->control = control;
1053+ trb->control = cpu_to_le32(control);
10351054
10361055 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
10371056
@@ -1091,6 +1110,7 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 53 unmodified lines
10911110 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
10921111 struct cdns3_request *priv_req;
10931112 struct cdns3_trb *trb;
1113+ struct cdns3_trb *link_trb;
10941114 dma_addr_t trb_dma;
10951115 u32 togle_pcs = 1;
10961116 int sg_iter = 0;
@@ -1099,11 +1119,13 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 2 unmodified lines
10991119 u32 control;
11001120 int pcs;
11011121 u16 total_tdl = 0;
1122+ struct scatterlist *s = NULL;
1123+ bool sg_supported = !!(request->num_mapped_sgs);
11021124
11031125 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC)
11041126 num_trb = priv_ep->interval;
11051127 else
1106− num_trb = request->num_sgs ? request->num_sgs : 1;
1128+ num_trb = sg_supported ? request->num_mapped_sgs : 1;
11071129
11081130 if (num_trb > priv_ep->free_trbs) {
11091131 priv_ep->flags |= EP_RING_FULL;
@@ -1129,7 +1151,6 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 19 unmodified lines
11291151
11301152 /* prepare ring */
11311153 if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
1132− struct cdns3_trb *link_trb;
11331154 int doorbell, dma_index;
11341155 u32 ch_bit = 0;
11351156
@@ -1156,13 +1177,16 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 20 unmodified lines
11561177 TRBS_PER_SEGMENT > 2)
11571178 ch_bit = TRB_CHAIN;
11581179
1159− link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) |
1160− TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit;
1180+ link_trb->control = cpu_to_le32(((priv_ep->pcs) ? TRB_CYCLE : 0) |
1181+ TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit);
11611182 }
11621183
11631184 if (priv_dev->dev_ver <= DEV_VER_V2)
11641185 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
11651186
1187+ if (sg_supported)
1188+ s = request->sg;
1189+
11661190 /* set incorrect Cycle Bit for first trb*/
11671191 control = priv_ep->pcs ? 0 : TRB_CYCLE;
11681192
@@ -1172,13 +1196,13 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 3 unmodified lines
11721196
11731197 /* fill TRB */
11741198 control |= TRB_TYPE(TRB_NORMAL);
1175− trb->buffer = TRB_BUFFER(request->num_sgs == 0
1176− ? trb_dma : request->sg[sg_iter].dma_address);
1177−
1178− if (likely(!request->num_sgs))
1199+ if (sg_supported) {
1200+ trb->buffer = cpu_to_le32(TRB_BUFFER(sg_dma_address(s)));
1201+ length = sg_dma_len(s);
1202+ } else {
1203+ trb->buffer = cpu_to_le32(TRB_BUFFER(trb_dma));
11791204 length = request->length;
1180− else
1181− length = request->sg[sg_iter].length;
1205+ }
11821206
11831207 if (likely(priv_dev->dev_ver >= DEV_VER_V2))
11841208 td_size = DIV_ROUND_UP(length,
@@ -1187,10 +1211,10 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 2 unmodified lines
11871211 total_tdl += DIV_ROUND_UP(length,
11881212 priv_ep->endpoint.maxpacket);
11891213
1190− trb->length = TRB_BURST_LEN(priv_ep->trb_burst_size) |
1191− TRB_LEN(length);
1214+ trb->length = cpu_to_le32(TRB_BURST_LEN(priv_ep->trb_burst_size) |
1215+ TRB_LEN(length));
11921216 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
1193− trb->length |= TRB_TDL_SS_SIZE(td_size);
1217+ trb->length |= cpu_to_le32(TRB_TDL_SS_SIZE(td_size));
11941218 else
11951219 control |= TRB_TDL_HS_SIZE(td_size);
11961220
@@ -1212,9 +1236,18 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 15 unmodified lines
12121236 }
12131237
12141238 if (sg_iter)
1215− trb->control = control;
1239+ trb->control = cpu_to_le32(control);
12161240 else
1217− priv_req->trb->control = control;
1241+ priv_req->trb->control = cpu_to_le32(control);
1242+
1243+ if (sg_supported) {
1244+ trb->control |= TRB_ISP;
1245+ /* Don't set chain bit for last TRB */
1246+ if (sg_iter < num_trb - 1)
1247+ trb->control |= TRB_CHAIN;
1248+
1249+ s = sg_next(s);
1250+ }
12181251
12191252 control = 0;
12201253 ++sg_iter;
@@ -1226,9 +1259,10 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 5 unmodified lines
12261259 trb = priv_req->trb;
12271260
12281261 priv_req->flags |= REQUEST_PENDING;
1262+ priv_req->num_of_trb = num_trb;
12291263
12301264 if (sg_iter == 1)
1231− trb->control |= TRB_IOC | TRB_ISP;
1265+ trb->control |= cpu_to_le32(TRB_IOC | TRB_ISP);
12321266
12331267 if (priv_dev->dev_ver < DEV_VER_V2 &&
12341268 (priv_ep->flags & EP_TDLCHK_EN)) {
@@ -1254,12 +1288,27 @@ static int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep, · 19 unmodified lines
12541288
12551289 /* give the TD to the consumer*/
12561290 if (togle_pcs)
1257− trb->control = trb->control ^ 1;
1291+ trb->control = trb->control ^ cpu_to_le32(1);
12581292
12591293 if (priv_dev->dev_ver <= DEV_VER_V2)
12601294 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
12611295
1262− trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1296+ if (num_trb > 1) {
1297+ int i = 0;
1298+
1299+ while (i < num_trb) {
1300+ trace_cdns3_prepare_trb(priv_ep, trb + i);
1301+ if (trb + i == link_trb) {
1302+ trb = priv_ep->trb_pool;
1303+ num_trb = num_trb - i;
1304+ i = 0;
1305+ } else {
1306+ i++;
1307+ }
1308+ }
1309+ } else {
1310+ trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
1311+ }
12631312
12641313 /*
12651314 * Memory barrier - Cycle Bit must be set before trb->length and
@@ -1310,7 +1359,6 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) · 44 unmodified lines
13101359 {
13111360 struct cdns3_endpoint *priv_ep;
13121361 struct usb_ep *ep;
1313− int val;
13141362
13151363 if (priv_dev->hw_configured_flag)
13161364 return;
@@ -1320,10 +1368,6 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) · 3 unmodified lines
13201368 cdns3_set_register_bit(&priv_dev->regs->usb_conf,
13211369 USB_CONF_U1EN | USB_CONF_U2EN);
13221370
1323− /* wait until configuration set */
1324− readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
1325− val & USB_STS_CFGSTS_MASK, 1, 100);
1326−
13271371 priv_dev->hw_configured_flag = 1;
13281372
13291373 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
@@ -1337,7 +1381,7 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) · 7 unmodified lines
13371381 }
13381382
13391383 /**
1340− * cdns3_request_handled - check whether request has been handled by DMA
1384+ * cdns3_trb_handled - check whether trb has been handled by DMA
13411385 *
13421386 * @priv_ep: extended endpoint object.
13431387 * @priv_req: request object for checking
@@ -1354,32 +1398,28 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev) · 10 unmodified lines
13541398 * ET = priv_req->end_trb - index of last TRB in transfer ring
13551399 * CI = current_index - index of processed TRB by DMA.
13561400 *
1357− * As first step, function checks if cycle bit for priv_req->start_trb is
1358− * correct.
1401+ * As first step, we check if the TRB between the ST and ET.
1402+ * Then, we check if cycle bit for index priv_ep->dequeue
1403+ * is correct.
13591404 *
13601405 * some rules:
1361− * 1. priv_ep->dequeue never exceed current_index.
1406+ * 1. priv_ep->dequeue never equals to current_index.
13621407 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
13631408 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
13641409 * and priv_ep->free_trbs is zero.
13651410 * This case indicate that TR is full.
13661411 *
1367− * Then We can split recognition into two parts:
1412+ * At below two cases, the request have been handled.
13681413 * Case 1 - priv_ep->dequeue < current_index
13691414 * SR ... EQ ... DQ ... CI ... ER
13701415 * SR ... DQ ... CI ... EQ ... ER
13711416 *
1372− * Request has been handled by DMA if ST and ET is between DQ and CI.
1373− *
13741417 * Case 2 - priv_ep->dequeue > current_index
1375− * This situation take place when CI go through the LINK TRB at the end of
1418+ * This situation takes place when CI go through the LINK TRB at the end of
13761419 * transfer ring.
13771420 * SR ... CI ... EQ ... DQ ... ER
1378− *
1379− * Request has been handled by DMA if ET is less then CI or
1380− * ET is greater or equal DQ.
13811421 */
1382−static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep,
1422+static bool cdns3_trb_handled(struct cdns3_endpoint *priv_ep,
13831423 struct cdns3_request *priv_req)
13841424 {
13851425 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
@@ -1391,9 +1431,27 @@ static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep, · 5 unmodified lines
13911431 current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
13921432 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
13931433
1394− trb = &priv_ep->trb_pool[priv_req->start_trb];
1434+ /* current trb doesn't belong to this request */
1435+ if (priv_req->start_trb < priv_req->end_trb) {
1436+ if (priv_ep->dequeue > priv_req->end_trb)
1437+ goto finish;
1438+
1439+ if (priv_ep->dequeue < priv_req->start_trb)
1440+ goto finish;
1441+ }
1442+
1443+ if ((priv_req->start_trb > priv_req->end_trb) &&
1444+ (priv_ep->dequeue > priv_req->end_trb) &&
1445+ (priv_ep->dequeue < priv_req->start_trb))
1446+ goto finish;
13951447
1396− if ((trb->control & TRB_CYCLE) != priv_ep->ccs)
1448+ if ((priv_req->start_trb == priv_req->end_trb) &&
1449+ (priv_ep->dequeue != priv_req->end_trb))
1450+ goto finish;
1451+
1452+ trb = &priv_ep->trb_pool[priv_ep->dequeue];
1453+
1454+ if ((le32_to_cpu(trb->control) & TRB_CYCLE) != priv_ep->ccs)
13971455 goto finish;
13981456
13991457 if (doorbell == 1 && current_index == priv_ep->dequeue)
@@ -1413,12 +1471,8 @@ static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep, · 13 unmodified lines
14131471 !priv_ep->dequeue)
14141472 goto finish;
14151473
1416− if (priv_req->end_trb >= priv_ep->dequeue &&
1417− priv_req->end_trb < current_index)
1418− handled = 1;
1474+ handled = 1;
14191475 } else if (priv_ep->dequeue > current_index) {
1420− if (priv_req->end_trb < current_index ||
1421− priv_req->end_trb >= priv_ep->dequeue)
14221476 handled = 1;
14231477 }
14241478
@@ -1434,6 +1488,8 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev, · 9 unmodified lines
14341488 struct cdns3_request *priv_req;
14351489 struct usb_request *request;
14361490 struct cdns3_trb *trb;
1491+ bool request_handled = false;
1492+ bool transfer_end = false;
14371493
14381494 while (!list_empty(&priv_ep->pending_req_list)) {
14391495 request = cdns3_next_request(&priv_ep->pending_req_list);
@@ -1442,7 +1498,7 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev, · 2 unmodified lines
14421498 trb = priv_ep->trb_pool + priv_ep->dequeue;
14431499
14441500 /* Request was dequeued and TRB was changed to TRB_LINK. */
1445− if (TRB_FIELD_TO_TYPE(trb->control) == TRB_LINK) {
1501+ if (TRB_FIELD_TO_TYPE(le32_to_cpu(trb->control)) == TRB_LINK) {
14461502 trace_cdns3_complete_trb(priv_ep, trb);
14471503 cdns3_move_deq_to_next_trb(priv_req);
14481504 }
@@ -1453,20 +1509,32 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev, · 4 unmodified lines
14531509 */
14541510 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
14551511
1456− if (!cdns3_request_handled(priv_ep, priv_req))
1457− goto prepare_next_td;
1512+ while (cdns3_trb_handled(priv_ep, priv_req)) {
1513+ priv_req->finished_trb++;
1514+ if (priv_req->finished_trb >= priv_req->num_of_trb)
1515+ request_handled = true;
14581516
1459− trb = priv_ep->trb_pool + priv_ep->dequeue;
1460− trace_cdns3_complete_trb(priv_ep, trb);
1517+ trb = priv_ep->trb_pool + priv_ep->dequeue;
1518+ trace_cdns3_complete_trb(priv_ep, trb);
14611519
1462− if (trb != priv_req->trb)
1463− dev_warn(priv_dev->dev,
1464− "request_trb=0x%p, queue_trb=0x%p\n",
1465− priv_req->trb, trb);
1520+ if (!transfer_end)
1521+ request->actual +=
1522+ TRB_LEN(le32_to_cpu(trb->length));
14661523
1467− request->actual = TRB_LEN(le32_to_cpu(trb->length));
1468− cdns3_move_deq_to_next_trb(priv_req);
1469− cdns3_gadget_giveback(priv_ep, priv_req, 0);
1524+ if (priv_req->num_of_trb > 1 &&
1525+ le32_to_cpu(trb->control) & TRB_SMM)
1526+ transfer_end = true;
1527+
1528+ cdns3_ep_inc_deq(priv_ep);
1529+ }
1530+
1531+ if (request_handled) {
1532+ cdns3_gadget_giveback(priv_ep, priv_req, 0);
1533+ request_handled = false;
1534+ transfer_end = false;
1535+ } else {
1536+ goto prepare_next_td;
1537+ }
14701538
14711539 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
14721540 TRBS_PER_SEGMENT == 2)
@@ -1574,7 +1642,7 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep) · 101 unmodified lines
15741642 * that host ignore the ERDY packet and driver has to send it
15751643 * again.
15761644 */
1577− if (tdl && (dbusy | !EP_STS_BUFFEMPTY(ep_sts_reg) |
1645+ if (tdl && (dbusy || !EP_STS_BUFFEMPTY(ep_sts_reg) ||
15781646 EP_STS_HOSTPP(ep_sts_reg))) {
15791647 writel(EP_CMD_ERDY |
15801648 EP_CMD_ERDY_SID(priv_ep->last_stream_id),
@@ -1769,9 +1837,13 @@ static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev, · 188 unmodified lines
17691837 static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
17701838 {
17711839 struct cdns3_device *priv_dev = data;
1840+ struct cdns3 *cdns = dev_get_drvdata(priv_dev->dev);
17721841 irqreturn_t ret = IRQ_NONE;
17731842 u32 reg;
17741843
1844+ if (cdns->in_lpm)
1845+ return ret;
1846+
17751847 /* check USB device interrupt */
17761848 reg = readl(&priv_dev->regs->usb_ists);
17771849 if (reg) {
@@ -2552,10 +2624,10 @@ found: · 774 unmodified lines
25522624
25532625 /* Update ring only if removed request is on pending_req_list list */
25542626 if (req_on_hw_ring && link_trb) {
2555− link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +
2556− ((priv_req->end_trb + 1) * TRB_SIZE));
2557− link_trb->control = (link_trb->control & TRB_CYCLE) |
2558− TRB_TYPE(TRB_LINK) | TRB_CHAIN;
2627+ link_trb->buffer = cpu_to_le32(TRB_BUFFER(priv_ep->trb_pool_dma +
2628+ ((priv_req->end_trb + 1) * TRB_SIZE)));
2629+ link_trb->control = cpu_to_le32((le32_to_cpu(link_trb->control) & TRB_CYCLE) |
2630+ TRB_TYPE(TRB_LINK) | TRB_CHAIN);
25592631
25602632 if (priv_ep->wa1_trb == priv_req->trb)
25612633 cdns3_wa1_restore_cycle_bit(priv_ep);
@@ -2610,7 +2682,7 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 48 unmodified lines
26102682 priv_req = to_cdns3_request(request);
26112683 trb = priv_req->trb;
26122684 if (trb)
2613− trb->control = trb->control ^ TRB_CYCLE;
2685+ trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
26142686 }
26152687
26162688 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
@@ -2625,7 +2697,8 @@ int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep) · 8 unmodified lines
26252697
26262698 if (request) {
26272699 if (trb)
2628− trb->control = trb->control ^ TRB_CYCLE;
2700+ trb->control = trb->control ^ cpu_to_le32(TRB_CYCLE);
2701+
26292702 cdns3_rearm_transfer(priv_ep, 1);
26302703 }
26312704
@@ -2735,10 +2808,13 @@ static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on) · 103 unmodified lines
27352808 {
27362809 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
27372810
2738− if (is_on)
2811+ if (is_on) {
27392812 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2740− else
2813+ } else {
2814+ writel(~0, &priv_dev->regs->ep_ists);
2815+ writel(~0, &priv_dev->regs->usb_ists);
27412816 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2817+ }
27422818
27432819 return 0;
27442820 }
@@ -2779,6 +2855,8 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev) · 34 unmodified lines
27792855 /* enable generic interrupt*/
27802856 writel(USB_IEN_INIT, &regs->usb_ien);
27812857 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2858+ /* keep Fast Access bit */
2859+ writel(PUSB_PWR_FST_REG_ACCESS, &priv_dev->regs->usb_pwr);
27822860
27832861 cdns3_configure_dmult(priv_dev, NULL);
27842862 }
@@ -2862,6 +2940,7 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget) · 77 unmodified lines
28622940
28632941 /* disable interrupt for device */
28642942 writel(0, &priv_dev->regs->usb_ien);
2943+ writel(0, &priv_dev->regs->usb_pwr);
28652944 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
28662945
28672946 return 0;
@@ -2984,18 +3063,26 @@ err: · 116 unmodified lines
29843063 return -ENOMEM;
29853064 }
29863065
3066+static void cdns3_gadget_release(struct device *dev)
3067+{
3068+ struct cdns3_device *priv_dev = container_of(dev,
3069+ struct cdns3_device, gadget.dev);
3070+
3071+ kfree(priv_dev);
3072+}
3073+
29873074 void cdns3_gadget_exit(struct cdns3 *cdns)
29883075 {
29893076 struct cdns3_device *priv_dev;
29903077
29913078 priv_dev = cdns->gadget_dev;
29923079
2993− devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
29943080
29953081 pm_runtime_mark_last_busy(cdns->dev);
29963082 pm_runtime_put_autosuspend(cdns->dev);
29973083
2998− usb_del_gadget_udc(&priv_dev->gadget);
3084+ usb_del_gadget(&priv_dev->gadget);
3085+ devm_free_irq(cdns->dev, cdns->dev_irq, priv_dev);
29993086
30003087 cdns3_free_all_eps(priv_dev);
30013088
@@ -3015,7 +3102,7 @@ void cdns3_gadget_exit(struct cdns3 *cdns) · 13 unmodified lines
30153102 priv_dev->setup_dma);
30163103
30173104 kfree(priv_dev->zlp_buf);
3018− kfree(priv_dev);
3105+ usb_put_gadget(&priv_dev->gadget);
30193106 cdns->gadget_dev = NULL;
30203107 cdns3_drd_gadget_off(cdns);
30213108 }
@@ -3030,6 +3117,8 @@ static int cdns3_gadget_start(struct cdns3 *cdns) · 8 unmodified lines
30303117 if (!priv_dev)
30313118 return -ENOMEM;
30323119
3120+ usb_initialize_gadget(cdns->dev, &priv_dev->gadget,
3121+ cdns3_gadget_release);
30333122 cdns->gadget_dev = priv_dev;
30343123 priv_dev->sysdev = cdns->dev;
30353124 priv_dev->dev = cdns->dev;
@@ -3070,7 +3159,6 @@ static int cdns3_gadget_start(struct cdns3 *cdns) · 34 unmodified lines
30703159 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
30713160 priv_dev->gadget.ops = &cdns3_gadget_ops;
30723161 priv_dev->gadget.name = "usb-ss-gadget";
3073− priv_dev->gadget.sg_supported = 1;
30743162 priv_dev->gadget.quirk_avoids_skb_reserve = 1;
30753163 priv_dev->gadget.irq = cdns->dev_irq;
30763164
@@ -3109,6 +3197,8 @@ static int cdns3_gadget_start(struct cdns3 *cdns) · 32 unmodified lines
31093197 readl(&priv_dev->regs->usb_cap2));
31103198
31113199 priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
3200+ if (priv_dev->dev_ver >= DEV_VER_V2)
3201+ priv_dev->gadget.sg_supported = 1;
31123202
31133203 priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
31143204 if (!priv_dev->zlp_buf) {
@@ -3117,10 +3207,9 @@ static int cdns3_gadget_start(struct cdns3 *cdns) · 2 unmodified lines
31173207 }
31183208
31193209 /* add USB gadget device */
3120− ret = usb_add_gadget_udc(priv_dev->dev, &priv_dev->gadget);
3210+ ret = usb_add_gadget(&priv_dev->gadget);
31213211 if (ret < 0) {
3122− dev_err(priv_dev->dev,
3123− "Failed to register USB device controller\n");
3212+ dev_err(priv_dev->dev, "Failed to add gadget\n");
31243213 goto err4;
31253214 }
31263215
@@ -3133,6 +3222,7 @@ err3: · 6 unmodified lines
31333222 err2:
31343223 cdns3_free_all_eps(priv_dev);
31353224 err1:
3225+ usb_put_gadget(&priv_dev->gadget);
31363226 cdns->gadget_dev = NULL;
31373227 return ret;
31383228 }
drivers/usb/cdns3/gadget.h+10−1
@@ -966,7 +966,7 @@ struct cdns3_usb_regs { · 965 unmodified lines
966966 /*
967967 * USBSS-DEV DMA interface.
968968 */
969−#define TRBS_PER_SEGMENT 40
969+#define TRBS_PER_SEGMENT 600
970970
971971 #define ISO_MAX_INTERVAL 10
972972
@@ -1030,6 +1030,11 @@ struct cdns3_trb { · 57 unmodified lines
10301030 * When set to '1', the device will toggle its interpretation of the Cycle bit
10311031 */
10321032 #define TRB_TOGGLE BIT(1)
1033+/*
1034+ * The controller will set it if OUTSMM (OUT size mismatch) is detected,
1035+ * this bit is for normal TRB
1036+ */
1037+#define TRB_SMM BIT(1)
10331038
10341039 /*
10351040 * Short Packet (SP). OUT EPs at DMULT=1 only. Indicates if the TRB was
@@ -1215,6 +1220,8 @@ struct cdns3_aligned_buf { · 179 unmodified lines
12151220 * this endpoint
12161221 * @flags: flag specifying special usage of request
12171222 * @list: used by internally allocated request to add to wa2_descmiss_req_list.
1223+ * @finished_trb: number of trb has already finished per request
1224+ * @num_of_trb: how many trbs in this request
12181225 */
12191226 struct cdns3_request {
12201227 struct usb_request request;
@@ -1230,6 +1237,8 @@ struct cdns3_request { · 9 unmodified lines
12301237 #define REQUEST_UNALIGNED BIT(4)
12311238 u32 flags;
12321239 struct list_head list;
1240+ int finished_trb;
1241+ int num_of_trb;
12331242 };
12341243
12351244 #define to_cdns3_request(r) (container_of(r, struct cdns3_request, request))
drivers/usb/cdns3/host.c+7−0
@@ -13,11 +13,13 @@ · 12 unmodified lines
1313 #include "core.h"
1414 #include "drd.h"
1515 #include "host-export.h"
16+#include <linux/usb/hcd.h>
1617
1718 static int __cdns3_host_init(struct cdns3 *cdns)
1819 {
1920 struct platform_device *xhci;
2021 int ret;
22+ struct usb_hcd *hcd;
2123
2224 cdns3_drd_host_on(cdns);
2325
@@ -43,6 +45,11 @@ static int __cdns3_host_init(struct cdns3 *cdns) · 19 unmodified lines
4345 goto err1;
4446 }
4547
48+ /* Glue needs to access xHCI region register for Power management */
49+ hcd = platform_get_drvdata(xhci);
50+ if (hcd)
51+ cdns->xhci_regs = hcd->regs;
52+
4653 return 0;
4754 err1:
4855 platform_device_put(xhci);
drivers/usb/chipidea/ci_hdrc_imx.c+12−1
@@ -165,6 +165,11 @@ static struct imx_usbmisc_data *usbmisc_get_init_data(struct device *dev) · 164 unmodified lines
165165 if (of_usb_get_phy_mode(np) == USBPHY_INTERFACE_MODE_ULPI)
166166 data->ulpi = 1;
167167
168+ of_property_read_u32(np, "samsung,picophy-pre-emp-curr-control",
169+ &data->emp_curr_control);
170+ of_property_read_u32(np, "samsung,picophy-dc-vol-level-adjust",
171+ &data->dc_vol_level_adjust);
172+
168173 return data;
169174 }
170175
@@ -609,7 +614,12 @@ static int __maybe_unused ci_hdrc_imx_suspend(struct device *dev) · 438 unmodified lines
609614 }
610615 }
611616
612− return imx_controller_suspend(dev);
617+ ret = imx_controller_suspend(dev);
618+ if (ret)
619+ return ret;
620+
621+ pinctrl_pm_select_sleep_state(dev);
622+ return ret;
613623 }
614624
615625 static int __maybe_unused ci_hdrc_imx_resume(struct device *dev)
@@ -617,6 +627,7 @@ static int __maybe_unused ci_hdrc_imx_resume(struct device *dev) · 1 unmodified line
617627 struct ci_hdrc_imx_data *data = dev_get_drvdata(dev);
618628 int ret;
619629
630+ pinctrl_pm_select_default_state(dev);
620631 ret = imx_controller_resume(dev);
621632 if (!ret && data->supports_runtime_pm) {
622633 pm_runtime_disable(dev);
drivers/usb/chipidea/ci_hdrc_imx.h+2−0
@@ -26,6 +26,8 @@ struct imx_usbmisc_data { · 25 unmodified lines
2626 unsigned int ext_vbus:1; /* Vbus from exteranl event */
2727 struct usb_phy *usb_phy;
2828 enum usb_dr_mode available_role; /* runtime usb dr mode */
29+ int emp_curr_control;
30+ int dc_vol_level_adjust;
2931 };
3032
3133 int imx_usbmisc_init(struct imx_usbmisc_data *data);
drivers/usb/chipidea/usbmisc_imx.c+21−0
@@ -128,6 +128,12 @@ · 127 unmodified lines
128128 #define MX7D_USB_OTG_PHY_STATUS_VBUS_VLD BIT(3)
129129 #define MX7D_USB_OTG_PHY_STATUS_CHRGDET BIT(29)
130130
131+#define MX7D_USB_OTG_PHY_CFG1 0x30
132+#define TXPREEMPAMPTUNE0_BIT 28
133+#define TXPREEMPAMPTUNE0_MASK (3 << 28)
134+#define TXVREFTUNE0_BIT 20
135+#define TXVREFTUNE0_MASK (0xf << 20)
136+
131137 #define MX6_USB_OTG_WAKEUP_BITS (MX6_BM_WAKEUP_ENABLE | MX6_BM_VBUS_WAKEUP | \
132138 MX6_BM_ID_WAKEUP)
133139
@@ -649,6 +655,21 @@ static int usbmisc_imx7d_init(struct imx_usbmisc_data *data) · 515 unmodified lines
649655 writel(reg | MX7D_USB_VBUS_WAKEUP_SOURCE_BVALID
650656 | MX7D_USBNC_AUTO_RESUME,
651657 usbmisc->base + MX7D_USBNC_USB_CTRL2);
658+ /* PHY tuning for signal quality */
659+ reg = readl(usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
660+ if (data->emp_curr_control && data->emp_curr_control <=
661+ (TXPREEMPAMPTUNE0_MASK >> TXPREEMPAMPTUNE0_BIT)) {
662+ reg &= ~TXPREEMPAMPTUNE0_MASK;
663+ reg |= (data->emp_curr_control << TXPREEMPAMPTUNE0_BIT);
664+ }
665+
666+ if (data->dc_vol_level_adjust && data->dc_vol_level_adjust <=
667+ (TXVREFTUNE0_MASK >> TXVREFTUNE0_BIT)) {
668+ reg &= ~TXVREFTUNE0_MASK;
669+ reg |= (data->dc_vol_level_adjust << TXVREFTUNE0_BIT);
670+ }
671+
672+ writel(reg, usbmisc->base + MX7D_USB_OTG_PHY_CFG1);
652673 }
653674
654675 spin_unlock_irqrestore(&usbmisc->lock, flags);
drivers/usb/class/cdc-acm.c+42−37
@@ -173,7 +173,7 @@ static int acm_wb_alloc(struct acm *acm) · 172 unmodified lines
173173 for (;;) {
174174 wb = &acm->wb[wbn];
175175 if (!wb->use) {
176− wb->use = 1;
176+ wb->use = true;
177177 wb->len = 0;
178178 return wbn;
179179 }
@@ -191,7 +191,8 @@ static int acm_wb_is_avail(struct acm *acm) · 11 unmodified lines
191191 n = ACM_NW;
192192 spin_lock_irqsave(&acm->write_lock, flags);
193193 for (i = 0; i < ACM_NW; i++)
194− n -= acm->wb[i].use;
194+ if(acm->wb[i].use)
195+ n--;
195196 spin_unlock_irqrestore(&acm->write_lock, flags);
196197 return n;
197198 }
@@ -201,7 +202,7 @@ static int acm_wb_is_avail(struct acm *acm) · 3 unmodified lines
201202 */
202203 static void acm_write_done(struct acm *acm, struct acm_wb *wb)
203204 {
204− wb->use = 0;
205+ wb->use = false;
205206 acm->transmitting--;
206207 usb_autopm_put_interface_async(acm->control);
207208 }
@@ -741,7 +742,7 @@ static void acm_port_shutdown(struct tty_port *port) · 533 unmodified lines
741742 if (!urb)
742743 break;
743744 wb = urb->context;
744− wb->use = 0;
745+ wb->use = false;
745746 usb_autopm_put_interface_async(acm->control);
746747 }
747748
@@ -792,7 +793,7 @@ static int acm_tty_write(struct tty_struct *tty, · 44 unmodified lines
792793 wb = &acm->wb[wbn];
793794
794795 if (!acm->dev) {
795− wb->use = 0;
796+ wb->use = false;
796797 spin_unlock_irqrestore(&acm->write_lock, flags);
797798 return -ENODEV;
798799 }
@@ -804,7 +805,7 @@ static int acm_tty_write(struct tty_struct *tty, · 5 unmodified lines
804805
805806 stat = usb_autopm_get_interface_async(acm->control);
806807 if (stat) {
807− wb->use = 0;
808+ wb->use = false;
808809 spin_unlock_irqrestore(&acm->write_lock, flags);
809810 return stat;
810811 }
@@ -1196,9 +1197,6 @@ static int acm_probe(struct usb_interface *intf, · 385 unmodified lines
11961197 return -EINVAL;
11971198 }
11981199
1199− if (!intf->cur_altsetting)
1200− return -EINVAL;
1201−
12021200 if (!buflen) {
12031201 if (intf->cur_altsetting->endpoint &&
12041202 intf->cur_altsetting->endpoint->extralen &&
@@ -1221,39 +1219,42 @@ static int acm_probe(struct usb_interface *intf, · 16 unmodified lines
12211219 call_intf_num = cmgmd->bDataInterface;
12221220
12231221 if (!union_header) {
1224− if (call_intf_num > 0) {
1222+ if (intf->cur_altsetting->desc.bNumEndpoints == 3) {
1223+ dev_dbg(&intf->dev, "No union descriptor, assuming single interface\n");
1224+ combined_interfaces = 1;
1225+ control_interface = data_interface = intf;
1226+ goto look_for_collapsed_interface;
1227+ } else if (call_intf_num > 0) {
12251228 dev_dbg(&intf->dev, "No union descriptor, using call management descriptor\n");
1226− /* quirks for Droids MuIn LCD */
1227− if (quirks & NO_DATA_INTERFACE) {
1228− data_interface = usb_ifnum_to_if(usb_dev, 0);
1229− } else {
1230− data_intf_num = call_intf_num;
1231− data_interface = usb_ifnum_to_if(usb_dev, data_intf_num);
1232− }
1229+ data_intf_num = call_intf_num;
1230+ data_interface = usb_ifnum_to_if(usb_dev, data_intf_num);
12331231 control_interface = intf;
12341232 } else {
1235− if (intf->cur_altsetting->desc.bNumEndpoints != 3) {
1236− dev_dbg(&intf->dev,"No union descriptor, giving up\n");
1237− return -ENODEV;
1238− } else {
1239− dev_warn(&intf->dev,"No union descriptor, testing for castrated device\n");
1240− combined_interfaces = 1;
1241− control_interface = data_interface = intf;
1242− goto look_for_collapsed_interface;
1243− }
1233+ dev_dbg(&intf->dev, "No union descriptor, giving up\n");
1234+ return -ENODEV;
12441235 }
12451236 } else {
1237+ int class = -1;
1238+
12461239 data_intf_num = union_header->bSlaveInterface0;
12471240 control_interface = usb_ifnum_to_if(usb_dev, union_header->bMasterInterface0);
12481241 data_interface = usb_ifnum_to_if(usb_dev, data_intf_num);
1242+
1243+ if (control_interface)
1244+ class = control_interface->cur_altsetting->desc.bInterfaceClass;
1245+
1246+ if (class != USB_CLASS_COMM && class != USB_CLASS_CDC_DATA) {
1247+ dev_dbg(&intf->dev, "Broken union descriptor, assuming single interface\n");
1248+ combined_interfaces = 1;
1249+ control_interface = data_interface = intf;
1250+ goto look_for_collapsed_interface;
1251+ }
12491252 }
12501253
12511254 if (!control_interface || !data_interface) {
12521255 dev_dbg(&intf->dev, "no interfaces\n");
12531256 return -ENODEV;
12541257 }
1255− if (!data_interface->cur_altsetting || !control_interface->cur_altsetting)
1256− return -ENODEV;
12571258
12581259 if (data_intf_num != call_intf_num)
12591260 dev_dbg(&intf->dev, "Separate call control interface. That is not fully supported.\n");
@@ -1280,10 +1281,8 @@ look_for_collapsed_interface: · 20 unmodified lines
12801281 skip_normal_probe:
12811282
12821283 /*workaround for switched interfaces */
1283− if (data_interface->cur_altsetting->desc.bInterfaceClass
1284− != CDC_DATA_INTERFACE_TYPE) {
1285− if (control_interface->cur_altsetting->desc.bInterfaceClass
1286− == CDC_DATA_INTERFACE_TYPE) {
1284+ if (data_interface->cur_altsetting->desc.bInterfaceClass != USB_CLASS_CDC_DATA) {
1285+ if (control_interface->cur_altsetting->desc.bInterfaceClass == USB_CLASS_CDC_DATA) {
12871286 dev_dbg(&intf->dev,
12881287 "Your device has switched interfaces.\n");
12891288 swap(control_interface, data_interface);
@@ -1876,11 +1875,6 @@ static const struct usb_device_id acm_ids[] = { · 586 unmodified lines
18761875
18771876 /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */
18781877
1879− /* Support for Droids MuIn LCD */
1880− { USB_DEVICE(0x04d8, 0x000b),
1881− .driver_info = NO_DATA_INTERFACE,
1882− },
1883−
18841878 #if IS_ENABLED(CONFIG_INPUT_IMS_PCU)
18851879 { USB_DEVICE(0x04d8, 0x0082), /* Application mode */
18861880 .driver_info = IGNORE_DEVICE,
@@ -1906,6 +1900,17 @@ static const struct usb_device_id acm_ids[] = { · 19 unmodified lines
19061900 .driver_info = IGNORE_DEVICE,
19071901 },
19081902
1903+ /* Exclude ETAS ES58x */
1904+ { USB_DEVICE(0x108c, 0x0159), /* ES581.4 */
1905+ .driver_info = IGNORE_DEVICE,
1906+ },
1907+ { USB_DEVICE(0x108c, 0x0168), /* ES582.1 */
1908+ .driver_info = IGNORE_DEVICE,
1909+ },
1910+ { USB_DEVICE(0x108c, 0x0169), /* ES584.1 */
1911+ .driver_info = IGNORE_DEVICE,
1912+ },
1913+
19091914 { USB_DEVICE(0x1bc7, 0x0021), /* Telit 3G ACM only composition */
19101915 .driver_info = SEND_ZERO_PACKET,
19111916 },
drivers/usb/class/cdc-acm.h+8−11
@@ -64,12 +64,12 @@ · 63 unmodified lines
6464 #define ACM_NR 16
6565
6666 struct acm_wb {
67− unsigned char *buf;
67+ u8 *buf;
6868 dma_addr_t dmah;
69− int len;
70− int use;
69+ unsigned int len;
7170 struct urb *urb;
7271 struct acm *instance;
72+ bool use;
7373 };
7474
7575 struct acm_rb {
@@ -131,15 +131,12 @@ struct acm { · 55 unmodified lines
131131 unsigned long quirks;
132132 };
133133
134−#define CDC_DATA_INTERFACE_TYPE 0x0a
135−
136134 /* constants describing various quirks and errors */
137135 #define NO_UNION_NORMAL BIT(0)
138136 #define SINGLE_RX_URB BIT(1)
139137 #define NO_CAP_LINE BIT(2)
140−#define NO_DATA_INTERFACE BIT(4)
141−#define IGNORE_DEVICE BIT(5)
142−#define QUIRK_CONTROL_LINE_STATE BIT(6)
143−#define CLEAR_HALT_CONDITIONS BIT(7)
144−#define SEND_ZERO_PACKET BIT(8)
145−#define DISABLE_ECHO BIT(9)
138+#define IGNORE_DEVICE BIT(3)
139+#define QUIRK_CONTROL_LINE_STATE BIT(4)
140+#define CLEAR_HALT_CONDITIONS BIT(5)
141+#define SEND_ZERO_PACKET BIT(6)
142+#define DISABLE_ECHO BIT(7)
drivers/usb/class/cdc-wdm.c+55−17
@@ -58,6 +58,9 @@ MODULE_DEVICE_TABLE (usb, wdm_ids); · 57 unmodified lines
5858
5959 #define WDM_MAX 16
6060
61+/* we cannot wait forever at flush() */
62+#define WDM_FLUSH_TIMEOUT (30 * HZ)
63+
6164 /* CDC-WMC r1.1 requires wMaxCommand to be "at least 256 decimal (0x100)" */
6265 #define WDM_DEFAULT_BUFSIZE 256
6366
@@ -151,7 +154,7 @@ static void wdm_out_callback(struct urb *urb) · 87 unmodified lines
151154 kfree(desc->outbuf);
152155 desc->outbuf = NULL;
153156 clear_bit(WDM_IN_USE, &desc->flags);
154− wake_up(&desc->wait);
157+ wake_up_all(&desc->wait);
155158 }
156159
157160 static void wdm_in_callback(struct urb *urb)
@@ -393,6 +396,9 @@ static ssize_t wdm_write · 235 unmodified lines
393396 if (test_bit(WDM_RESETTING, &desc->flags))
394397 r = -EIO;
395398
399+ if (test_bit(WDM_DISCONNECTING, &desc->flags))
400+ r = -ENODEV;
401+
396402 if (r < 0) {
397403 rv = r;
398404 goto out_free_mem_pm;
@@ -424,6 +430,7 @@ static ssize_t wdm_write · 25 unmodified lines
424430 if (rv < 0) {
425431 desc->outbuf = NULL;
426432 clear_bit(WDM_IN_USE, &desc->flags);
433+ wake_up_all(&desc->wait); /* for wdm_wait_for_response() */
427434 dev_err(&desc->intf->dev, "Tx URB error: %d\n", rv);
428435 rv = usb_translate_errors(rv);
429436 goto out_free_mem_pm;
@@ -583,28 +590,58 @@ err: · 153 unmodified lines
583590 return rv;
584591 }
585592
586−static int wdm_flush(struct file *file, fl_owner_t id)
593+static int wdm_wait_for_response(struct file *file, long timeout)
587594 {
588595 struct wdm_device *desc = file->private_data;
596+ long rv; /* Use long here because (int) MAX_SCHEDULE_TIMEOUT < 0. */
597+
598+ /*
599+ * Needs both flags. We cannot do with one because resetting it would
600+ * cause a race with write() yet we need to signal a disconnect.
601+ */
602+ rv = wait_event_interruptible_timeout(desc->wait,
603+ !test_bit(WDM_IN_USE, &desc->flags) ||
604+ test_bit(WDM_DISCONNECTING, &desc->flags),
605+ timeout);
589606
590− wait_event(desc->wait,
591− /*
592− * needs both flags. We cannot do with one
593− * because resetting it would cause a race
594− * with write() yet we need to signal
595− * a disconnect
596− */
597− !test_bit(WDM_IN_USE, &desc->flags) ||
598− test_bit(WDM_DISCONNECTING, &desc->flags));
599−
600− /* cannot dereference desc->intf if WDM_DISCONNECTING */
607+ /*
608+ * To report the correct error. This is best effort.
609+ * We are inevitably racing with the hardware.
610+ */
601611 if (test_bit(WDM_DISCONNECTING, &desc->flags))
602612 return -ENODEV;
603− if (desc->werr < 0)
604− dev_err(&desc->intf->dev, "Error in flush path: %d\n",
605− desc->werr);
613+ if (!rv)
614+ return -EIO;
615+ if (rv < 0)
616+ return -EINTR;
617+
618+ spin_lock_irq(&desc->iuspin);
619+ rv = desc->werr;
620+ desc->werr = 0;
621+ spin_unlock_irq(&desc->iuspin);
622+
623+ return usb_translate_errors(rv);
624+
625+}
626+
627+/*
628+ * You need to send a signal when you react to malicious or defective hardware.
629+ * Also, don't abort when fsync() returned -EINVAL, for older kernels which do
630+ * not implement wdm_flush() will return -EINVAL.
631+ */
632+static int wdm_fsync(struct file *file, loff_t start, loff_t end, int datasync)
633+{
634+ return wdm_wait_for_response(file, MAX_SCHEDULE_TIMEOUT);
635+}
606636
607− return usb_translate_errors(desc->werr);
637+/*
638+ * Same with wdm_fsync(), except it uses finite timeout in order to react to
639+ * malicious or defective hardware which ceased communication after close() was
640+ * implicitly called due to process termination.
641+ */
642+static int wdm_flush(struct file *file, fl_owner_t id)
643+{
644+ return wdm_wait_for_response(file, WDM_FLUSH_TIMEOUT);
608645 }
609646
610647 static __poll_t wdm_poll(struct file *file, struct poll_table_struct *wait)
@@ -729,6 +766,7 @@ static const struct file_operations wdm_fops = { · 118 unmodified lines
729766 .owner = THIS_MODULE,
730767 .read = wdm_read,
731768 .write = wdm_write,
769+ .fsync = wdm_fsync,
732770 .open = wdm_open,
733771 .flush = wdm_flush,
734772 .release = wdm_release,
drivers/usb/common/usb-conn-gpio.c+25−7
@@ -91,14 +91,14 @@ static void usb_conn_detect_cable(struct work_struct *work) · 90 unmodified lines
9191 return;
9292 }
9393
94− if (info->last_role == USB_ROLE_HOST)
94+ if (info->last_role == USB_ROLE_HOST && info->vbus)
9595 regulator_disable(info->vbus);
9696
9797 ret = usb_role_switch_set_role(info->role_sw, role);
9898 if (ret)
9999 dev_err(info->dev, "failed to set role: %d\n", ret);
100100
101− if (role == USB_ROLE_HOST) {
101+ if (role == USB_ROLE_HOST && info->vbus) {
102102 ret = regulator_enable(info->vbus);
103103 if (ret)
104104 dev_err(info->dev, "enable vbus regulator failed\n");
@@ -106,8 +106,9 @@ static void usb_conn_detect_cable(struct work_struct *work) · 1 unmodified line
106106
107107 info->last_role = role;
108108
109− dev_dbg(info->dev, "vbus regulator is %s\n",
110− regulator_is_enabled(info->vbus) ? "enabled" : "disabled");
109+ if (info->vbus)
110+ dev_dbg(info->dev, "vbus regulator is %s\n",
111+ regulator_is_enabled(info->vbus) ? "enabled" : "disabled");
111112
112113 power_supply_changed(info->charger);
113114 }
@@ -156,6 +157,7 @@ static int usb_conn_probe(struct platform_device *pdev) · 42 unmodified lines
156157 struct power_supply_config cfg = {
157158 .of_node = dev->of_node,
158159 };
160+ bool need_vbus = true;
159161 int ret = 0;
160162
161163 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
@@ -185,10 +187,26 @@ static int usb_conn_probe(struct platform_device *pdev) · 23 unmodified lines
185187
186188 INIT_DELAYED_WORK(&info->dw_det, usb_conn_detect_cable);
187189
188− info->vbus = devm_regulator_get(dev, "vbus");
190+ /*
191+ * If the USB connector is a child of a USB port and that port already provides the VBUS
192+ * supply, there's no need for the USB connector to provide it again.
193+ */
194+ if (dev->parent && dev->parent->of_node) {
195+ if (of_find_property(dev->parent->of_node, "vbus-supply", NULL))
196+ need_vbus = false;
197+ }
198+
199+ if (!need_vbus) {
200+ info->vbus = devm_regulator_get_optional(dev, "vbus");
201+ if (PTR_ERR(info->vbus) == -ENODEV)
202+ info->vbus = NULL;
203+ } else {
204+ info->vbus = devm_regulator_get(dev, "vbus");
205+ }
206+
189207 if (IS_ERR(info->vbus)) {
190208 if (PTR_ERR(info->vbus) != -EPROBE_DEFER)
191− dev_err(dev, "failed to get vbus\n");
209+ dev_err(dev, "failed to get vbus: %ld\n", PTR_ERR(info->vbus));
192210 return PTR_ERR(info->vbus);
193211 }
194212
@@ -266,7 +284,7 @@ static int usb_conn_remove(struct platform_device *pdev) · 71 unmodified lines
266284
267285 cancel_delayed_work_sync(&info->dw_det);
268286
269− if (info->last_role == USB_ROLE_HOST)
287+ if (info->last_role == USB_ROLE_HOST && info->vbus)
270288 regulator_disable(info->vbus);
271289
272290 usb_role_switch_put(info->role_sw);
drivers/usb/core/Kconfig+14−0
@@ -32,6 +32,20 @@ config USB_DEFAULT_PERSIST · 31 unmodified lines
3232 If you have any questions about this, say Y here, only say N
3333 if you know exactly what you are doing.
3434
35+config USB_FEW_INIT_RETRIES
36+ bool "Limit USB device initialization to only a few retries"
37+ help
38+ When a new USB device is detected, the kernel tries very hard
39+ to initialize and enumerate it, with lots of nested retry loops.
40+ This almost always works, but when it fails it can take a long time.
41+ This option tells the kernel to make only a few retry attempts,
42+ so that the total time required for a failed initialization is
43+ no more than 30 seconds (as required by the USB OTG spec).
44+
45+ Say N here unless you require new-device enumeration failure to
46+ occur within 30 seconds (as might be needed in an embedded
47+ application).
48+
3549 config USB_DYNAMIC_MINORS
3650 bool "Dynamic USB minor allocation"
3751 help
drivers/usb/core/devices.c+0−41
@@ -39,7 +39,6 @@ · 38 unmodified lines
3939 #include <linux/fs.h>
4040 #include <linux/mm.h>
4141 #include <linux/gfp.h>
42−#include <linux/poll.h>
4342 #include <linux/usb.h>
4443 #include <linux/usbdevice_fs.h>
4544 #include <linux/usb/hcd.h>
@@ -97,22 +96,6 @@ static const char format_endpt[] = · 51 unmodified lines
9796 /* E: Ad=xx(s) Atr=xx(ssss) MxPS=dddd Ivl=D?s */
9897 "E: Ad=%02x(%c) Atr=%02x(%-4s) MxPS=%4d Ivl=%d%cs\n";
9998
100−/*
101− * Wait for an connect/disconnect event to happen. We initialize
102− * the event counter with an odd number, and each event will increment
103− * the event counter by two, so it will always _stay_ odd. That means
104− * that it will never be zero, so "event 0" will never match a current
105− * event, and thus 'poll' will always trigger as readable for the first
106− * time it gets called.
107− */
108−static struct device_connect_event {
109− atomic_t count;
110− wait_queue_head_t wait;
111−} device_event = {
112− .count = ATOMIC_INIT(1),
113− .wait = __WAIT_QUEUE_HEAD_INITIALIZER(device_event.wait)
114−};
115−
11699 struct class_info {
117100 int class;
118101 char *class_name;
@@ -146,12 +129,6 @@ static const struct class_info clas_info[] = { · 27 unmodified lines
146129
147130 /*****************************************************************/
148131
149−void usbfs_conn_disc_event(void)
150−{
151− atomic_add(2, &device_event.count);
152− wake_up(&device_event.wait);
153−}
154−
155132 static const char *class_decode(const int class)
156133 {
157134 int ix;
@@ -623,25 +600,7 @@ static ssize_t usb_device_read(struct file *file, char __user *buf, · 465 unmodified lines
623600 return total_written;
624601 }
625602
626−/* Kernel lock for "lastev" protection */
627−static __poll_t usb_device_poll(struct file *file,
628− struct poll_table_struct *wait)
629−{
630− unsigned int event_count;
631−
632− poll_wait(file, &device_event.wait, wait);
633−
634− event_count = atomic_read(&device_event.count);
635− if (file->f_version != event_count) {
636− file->f_version = event_count;
637− return EPOLLIN | EPOLLRDNORM;
638− }
639−
640− return 0;
641−}
642−
643603 const struct file_operations usbfs_devices_fops = {
644604 .llseek = no_seek_end_llseek,
645605 .read = usb_device_read,
646− .poll = usb_device_poll,
647606 };
drivers/usb/core/driver.c+3−5
@@ -991,8 +991,7 @@ int usb_register_device_driver(struct usb_device_driver *new_udriver, · 990 unmodified lines
991991 bus_for_each_dev(&usb_bus_type, NULL, new_udriver,
992992 __usb_bus_reprobe_drivers);
993993 } else {
994− printk(KERN_ERR "%s: error %d registering device "
995− " driver %s\n",
994+ pr_err("%s: error %d registering device driver %s\n",
996995 usbcore_name, retval, new_udriver->name);
997996 }
998997
@@ -1068,9 +1067,8 @@ out: · 69 unmodified lines
10681067 out_newid:
10691068 driver_unregister(&new_driver->drvwrap.driver);
10701069
1071− printk(KERN_ERR "%s: error %d registering interface "
1072− " driver %s\n",
1073− usbcore_name, retval, new_driver->name);
1070+ pr_err("%s: error %d registering interface driver %s\n",
1071+ usbcore_name, retval, new_driver->name);
10741072 goto out;
10751073 }
10761074 EXPORT_SYMBOL_GPL(usb_register_driver);
drivers/usb/core/generic.c+2−2
@@ -195,7 +195,7 @@ int usb_choose_configuration(struct usb_device *udev) · 194 unmodified lines
195195 }
196196 EXPORT_SYMBOL_GPL(usb_choose_configuration);
197197
198−static int __check_usb_generic(struct device_driver *drv, void *data)
198+static int __check_for_non_generic_match(struct device_driver *drv, void *data)
199199 {
200200 struct usb_device *udev = data;
201201 struct usb_device_driver *udrv;
@@ -219,7 +219,7 @@ static bool usb_generic_driver_match(struct usb_device *udev) · 17 unmodified lines
219219 * If any other driver wants the device, leave the device to this other
220220 * driver.
221221 */
222− if (bus_for_each_drv(&usb_bus_type, NULL, udev, __check_usb_generic))
222+ if (bus_for_each_drv(&usb_bus_type, NULL, udev, __check_for_non_generic_match))
223223 return false;
224224
225225 return true;
drivers/usb/core/hcd.c+3−3
@@ -1657,9 +1657,9 @@ static void __usb_hcd_giveback_urb(struct urb *urb) · 1656 unmodified lines
16571657 usb_put_urb(urb);
16581658 }
16591659
1660−static void usb_giveback_urb_bh(unsigned long param)
1660+static void usb_giveback_urb_bh(struct tasklet_struct *t)
16611661 {
1662− struct giveback_urb_bh *bh = (struct giveback_urb_bh *)param;
1662+ struct giveback_urb_bh *bh = from_tasklet(bh, t, bh);
16631663 struct list_head local_list;
16641664
16651665 spin_lock_irq(&bh->lock);
@@ -2403,7 +2403,7 @@ static void init_giveback_urb_bh(struct giveback_urb_bh *bh) · 737 unmodified lines
24032403
24042404 spin_lock_init(&bh->lock);
24052405 INIT_LIST_HEAD(&bh->head);
2406− tasklet_init(&bh->bh, usb_giveback_urb_bh, (unsigned long)bh);
2406+ tasklet_setup(&bh->bh, usb_giveback_urb_bh);
24072407 }
24082408
24092409 struct usb_hcd *__usb_create_hcd(const struct hc_driver *driver,
drivers/usb/core/hub.c+38−24
@@ -2705,11 +2705,20 @@ static unsigned hub_is_wusb(struct usb_hub *hub) · 2704 unmodified lines
27052705 }
27062706
27072707
2708+#ifdef CONFIG_USB_FEW_INIT_RETRIES
2709+#define PORT_RESET_TRIES 2
2710+#define SET_ADDRESS_TRIES 1
2711+#define GET_DESCRIPTOR_TRIES 1
2712+#define GET_MAXPACKET0_TRIES 1
2713+#define PORT_INIT_TRIES 4
2714+
2715+#else
27082716 #define PORT_RESET_TRIES 5
27092717 #define SET_ADDRESS_TRIES 2
27102718 #define GET_DESCRIPTOR_TRIES 2
2711−#define SET_CONFIG_TRIES (2 * (use_both_schemes + 1))
2712−#define USE_NEW_SCHEME(i, scheme) ((i) / 2 == (int)(scheme))
2719+#define GET_MAXPACKET0_TRIES 3
2720+#define PORT_INIT_TRIES 4
2721+#endif /* CONFIG_USB_FEW_INIT_RETRIES */
27132722
27142723 #define HUB_ROOT_RESET_TIME 60 /* times are in msec */
27152724 #define HUB_SHORT_RESET_TIME 10
@@ -2717,23 +2726,31 @@ static unsigned hub_is_wusb(struct usb_hub *hub) · 1 unmodified line
27172726 #define HUB_LONG_RESET_TIME 200
27182727 #define HUB_RESET_TIMEOUT 800
27192728
2720−/*
2721− * "New scheme" enumeration causes an extra state transition to be
2722− * exposed to an xhci host and causes USB3 devices to receive control
2723− * commands in the default state. This has been seen to cause
2724− * enumeration failures, so disable this enumeration scheme for USB3
2725− * devices.
2726− */
27272729 static bool use_new_scheme(struct usb_device *udev, int retry,
27282730 struct usb_port *port_dev)
27292731 {
27302732 int old_scheme_first_port =
2731− port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME;
2733+ (port_dev->quirks & USB_PORT_QUIRK_OLD_SCHEME) ||
2734+ old_scheme_first;
27322735
2736+ /*
2737+ * "New scheme" enumeration causes an extra state transition to be
2738+ * exposed to an xhci host and causes USB3 devices to receive control
2739+ * commands in the default state. This has been seen to cause
2740+ * enumeration failures, so disable this enumeration scheme for USB3
2741+ * devices.
2742+ */
27332743 if (udev->speed >= USB_SPEED_SUPER)
27342744 return false;
27352745
2736− return USE_NEW_SCHEME(retry, old_scheme_first_port || old_scheme_first);
2746+ /*
2747+ * If use_both_schemes is set, use the first scheme (whichever
2748+ * it is) for the larger half of the retries, then use the other
2749+ * scheme. Otherwise, use the first scheme for all the retries.
2750+ */
2751+ if (use_both_schemes && retry >= (PORT_INIT_TRIES + 1) / 2)
2752+ return old_scheme_first_port; /* Second half */
2753+ return !old_scheme_first_port; /* First half or all */
27372754 }
27382755
27392756 /* Is a USB 3.0 port in the Inactive or Compliance Mode state?
@@ -4545,6 +4562,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, · 1805 unmodified lines
45454562 const char *speed;
45464563 int devnum = udev->devnum;
45474564 const char *driver_name;
4565+ bool do_new_scheme;
45484566
45494567 /* root hub ports have a slightly longer reset period
45504568 * (from USB 2.0 spec, section 7.1.7.5)
@@ -4657,14 +4675,13 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, · 106 unmodified lines
46574675 * first 8 bytes of the device descriptor to get the ep0 maxpacket
46584676 * value.
46594677 */
4660− for (retries = 0; retries < GET_DESCRIPTOR_TRIES; (++retries, msleep(100))) {
4661− bool did_new_scheme = false;
4678+ do_new_scheme = use_new_scheme(udev, retry_counter, port_dev);
46624679
4663− if (use_new_scheme(udev, retry_counter, port_dev)) {
4680+ for (retries = 0; retries < GET_DESCRIPTOR_TRIES; (++retries, msleep(100))) {
4681+ if (do_new_scheme) {
46644682 struct usb_device_descriptor *buf;
46654683 int r = 0;
46664684
4667− did_new_scheme = true;
46684685 retval = hub_enable_device(udev);
46694686 if (retval < 0) {
46704687 dev_err(&udev->dev,
@@ -4684,7 +4701,8 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, · 13 unmodified lines
46844701 * 255 is for WUSB devices, we actually need to use
46854702 * 512 (WUSB1.0[4.8.1]).
46864703 */
4687− for (operations = 0; operations < 3; ++operations) {
4704+ for (operations = 0; operations < GET_MAXPACKET0_TRIES;
4705+ ++operations) {
46884706 buf->bMaxPacketSize0 = 0;
46894707 r = usb_control_msg(udev, usb_rcvaddr0pipe(),
46904708 USB_REQ_GET_DESCRIPTOR, USB_DIR_IN,
@@ -4773,11 +4791,7 @@ hub_port_init(struct usb_hub *hub, struct usb_device *udev, int port1, · 82 unmodified lines
47734791 * - read ep0 maxpacket even for high and low speed,
47744792 */
47754793 msleep(10);
4776− /* use_new_scheme() checks the speed which may have
4777− * changed since the initial look so we cache the result
4778− * in did_new_scheme
4779− */
4780− if (did_new_scheme)
4794+ if (do_new_scheme)
47814795 break;
47824796 }
47834797
@@ -5106,7 +5120,7 @@ static void hub_port_connect(struct usb_hub *hub, int port1, u16 portstatus, · 322 unmodified lines
51065120 unit_load = 100;
51075121
51085122 status = 0;
5109− for (i = 0; i < SET_CONFIG_TRIES; i++) {
5123+ for (i = 0; i < PORT_INIT_TRIES; i++) {
51105124
51115125 /* reallocate for each attempt, since references
51125126 * to the previous one can escape in various ways
@@ -5239,7 +5253,7 @@ loop: · 126 unmodified lines
52395253 break;
52405254
52415255 /* When halfway through our retry count, power-cycle the port */
5242− if (i == (SET_CONFIG_TRIES / 2) - 1) {
5256+ if (i == (PORT_INIT_TRIES - 1) / 2) {
52435257 dev_info(&port_dev->dev, "attempt power cycle\n");
52445258 usb_hub_set_port_power(hdev, hub, port1, false);
52455259 msleep(2 * hub_power_on_good_delay(hub));
@@ -5770,7 +5784,7 @@ static int usb_reset_and_verify_device(struct usb_device *udev) · 524 unmodified lines
57705784 bos = udev->bos;
57715785 udev->bos = NULL;
57725786
5773− for (i = 0; i < SET_CONFIG_TRIES; ++i) {
5787+ for (i = 0; i < PORT_INIT_TRIES; ++i) {
57745788
57755789 /* ep0 maxpacket size may change; let the HCD know about it.
57765790 * Other endpoints will be handled by re-enumeration. */
drivers/usb/core/message.c+160−20
@@ -162,6 +162,143 @@ int usb_control_msg(struct usb_device *dev, unsigned int pipe, __u8 request, · 161 unmodified lines
162162 }
163163 EXPORT_SYMBOL_GPL(usb_control_msg);
164164
165+/**
166+ * usb_control_msg_send - Builds a control "send" message, sends it off and waits for completion
167+ * @dev: pointer to the usb device to send the message to
168+ * @endpoint: endpoint to send the message to
169+ * @request: USB message request value
170+ * @requesttype: USB message request type value
171+ * @value: USB message value
172+ * @index: USB message index value
173+ * @driver_data: pointer to the data to send
174+ * @size: length in bytes of the data to send
175+ * @timeout: time in msecs to wait for the message to complete before timing
176+ * out (if 0 the wait is forever)
177+ * @memflags: the flags for memory allocation for buffers
178+ *
179+ * Context: !in_interrupt ()
180+ *
181+ * This function sends a control message to a specified endpoint that is not
182+ * expected to fill in a response (i.e. a "send message") and waits for the
183+ * message to complete, or timeout.
184+ *
185+ * Do not use this function from within an interrupt context. If you need
186+ * an asynchronous message, or need to send a message from within interrupt
187+ * context, use usb_submit_urb(). If a thread in your driver uses this call,
188+ * make sure your disconnect() method can wait for it to complete. Since you
189+ * don't have a handle on the URB used, you can't cancel the request.
190+ *
191+ * The data pointer can be made to a reference on the stack, or anywhere else,
192+ * as it will not be modified at all. This does not have the restriction that
193+ * usb_control_msg() has where the data pointer must be to dynamically allocated
194+ * memory (i.e. memory that can be successfully DMAed to a device).
195+ *
196+ * Return: If successful, 0 is returned, Otherwise, a negative error number.
197+ */
198+int usb_control_msg_send(struct usb_device *dev, __u8 endpoint, __u8 request,
199+ __u8 requesttype, __u16 value, __u16 index,
200+ const void *driver_data, __u16 size, int timeout,
201+ gfp_t memflags)
202+{
203+ unsigned int pipe = usb_sndctrlpipe(dev, endpoint);
204+ int ret;
205+ u8 *data = NULL;
206+
207+ if (usb_pipe_type_check(dev, pipe))
208+ return -EINVAL;
209+
210+ if (size) {
211+ data = kmemdup(driver_data, size, memflags);
212+ if (!data)
213+ return -ENOMEM;
214+ }
215+
216+ ret = usb_control_msg(dev, pipe, request, requesttype, value, index,
217+ data, size, timeout);
218+ kfree(data);
219+
220+ if (ret < 0)
221+ return ret;
222+ if (ret == size)
223+ return 0;
224+ return -EINVAL;
225+}
226+EXPORT_SYMBOL_GPL(usb_control_msg_send);
227+
228+/**
229+ * usb_control_msg_recv - Builds a control "receive" message, sends it off and waits for completion
230+ * @dev: pointer to the usb device to send the message to
231+ * @endpoint: endpoint to send the message to
232+ * @request: USB message request value
233+ * @requesttype: USB message request type value
234+ * @value: USB message value
235+ * @index: USB message index value
236+ * @driver_data: pointer to the data to be filled in by the message
237+ * @size: length in bytes of the data to be received
238+ * @timeout: time in msecs to wait for the message to complete before timing
239+ * out (if 0 the wait is forever)
240+ * @memflags: the flags for memory allocation for buffers
241+ *
242+ * Context: !in_interrupt ()
243+ *
244+ * This function sends a control message to a specified endpoint that is
245+ * expected to fill in a response (i.e. a "receive message") and waits for the
246+ * message to complete, or timeout.
247+ *
248+ * Do not use this function from within an interrupt context. If you need
249+ * an asynchronous message, or need to send a message from within interrupt
250+ * context, use usb_submit_urb(). If a thread in your driver uses this call,
251+ * make sure your disconnect() method can wait for it to complete. Since you
252+ * don't have a handle on the URB used, you can't cancel the request.
253+ *
254+ * The data pointer can be made to a reference on the stack, or anywhere else
255+ * that can be successfully written to. This function does not have the
256+ * restriction that usb_control_msg() has where the data pointer must be to
257+ * dynamically allocated memory (i.e. memory that can be successfully DMAed to a
258+ * device).
259+ *
260+ * The "whole" message must be properly received from the device in order for
261+ * this function to be successful. If a device returns less than the expected
262+ * amount of data, then the function will fail. Do not use this for messages
263+ * where a variable amount of data might be returned.
264+ *
265+ * Return: If successful, 0 is returned, Otherwise, a negative error number.
266+ */
267+int usb_control_msg_recv(struct usb_device *dev, __u8 endpoint, __u8 request,
268+ __u8 requesttype, __u16 value, __u16 index,
269+ void *driver_data, __u16 size, int timeout,
270+ gfp_t memflags)
271+{
272+ unsigned int pipe = usb_rcvctrlpipe(dev, endpoint);
273+ int ret;
274+ u8 *data;
275+
276+ if (!size || !driver_data || usb_pipe_type_check(dev, pipe))
277+ return -EINVAL;
278+
279+ data = kmalloc(size, memflags);
280+ if (!data)
281+ return -ENOMEM;
282+
283+ ret = usb_control_msg(dev, pipe, request, requesttype, value, index,
284+ data, size, timeout);
285+
286+ if (ret < 0)
287+ goto exit;
288+
289+ if (ret == size) {
290+ memcpy(driver_data, data, size);
291+ ret = 0;
292+ } else {
293+ ret = -EINVAL;
294+ }
295+
296+exit:
297+ kfree(data);
298+ return ret;
299+}
300+EXPORT_SYMBOL_GPL(usb_control_msg_recv);
301+
165302 /**
166303 * usb_interrupt_msg - Builds an interrupt urb, sends it off and waits for completion
167304 * @usb_dev: pointer to the usb device to send the message to
@@ -948,11 +1085,12 @@ int usb_set_isoch_delay(struct usb_device *dev) · 780 unmodified lines
9481085 if (dev->speed < USB_SPEED_SUPER)
9491086 return 0;
9501087
951− return usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1088+ return usb_control_msg_send(dev, 0,
9521089 USB_REQ_SET_ISOCH_DELAY,
9531090 USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
9541091 dev->hub_delay, 0, NULL, 0,
955− USB_CTRL_SET_TIMEOUT);
1092+ USB_CTRL_SET_TIMEOUT,
1093+ GFP_NOIO);
9561094 }
9571095
9581096 /**
@@ -1070,13 +1208,13 @@ int usb_clear_halt(struct usb_device *dev, int pipe) · 111 unmodified lines
10701208 * (like some ibmcam model 1 units) seem to expect hosts to make
10711209 * this request for iso endpoints, which can't halt!
10721210 */
1073− result = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1074− USB_REQ_CLEAR_FEATURE, USB_RECIP_ENDPOINT,
1075− USB_ENDPOINT_HALT, endp, NULL, 0,
1076− USB_CTRL_SET_TIMEOUT);
1211+ result = usb_control_msg_send(dev, 0,
1212+ USB_REQ_CLEAR_FEATURE, USB_RECIP_ENDPOINT,
1213+ USB_ENDPOINT_HALT, endp, NULL, 0,
1214+ USB_CTRL_SET_TIMEOUT, GFP_NOIO);
10771215
10781216 /* don't un-halt or force to DATA0 except on success */
1079− if (result < 0)
1217+ if (result)
10801218 return result;
10811219
10821220 /* NOTE: seems like Microsoft and Apple don't bother verifying
@@ -1438,9 +1576,11 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate) · 355 unmodified lines
14381576 if (dev->quirks & USB_QUIRK_NO_SET_INTF)
14391577 ret = -EPIPE;
14401578 else
1441− ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1442− USB_REQ_SET_INTERFACE, USB_RECIP_INTERFACE,
1443− alternate, interface, NULL, 0, 5000);
1579+ ret = usb_control_msg_send(dev, 0,
1580+ USB_REQ_SET_INTERFACE,
1581+ USB_RECIP_INTERFACE, alternate,
1582+ interface, NULL, 0, 5000,
1583+ GFP_NOIO);
14441584
14451585 /* 9.4.10 says devices don't need this and are free to STALL the
14461586 * request if the interface only has one alternate setting.
@@ -1450,7 +1590,7 @@ int usb_set_interface(struct usb_device *dev, int interface, int alternate) · 3 unmodified lines
14501590 "manual set_interface for iface %d, alt %d\n",
14511591 interface, alternate);
14521592 manual = 1;
1453− } else if (ret < 0) {
1593+ } else if (ret) {
14541594 /* Re-instate the old alt setting */
14551595 usb_hcd_alloc_bandwidth(dev, NULL, alt, iface->cur_altsetting);
14561596 usb_enable_lpm(dev);
@@ -1574,11 +1714,11 @@ int usb_reset_configuration(struct usb_device *dev) · 117 unmodified lines
15741714 mutex_unlock(hcd->bandwidth_mutex);
15751715 return retval;
15761716 }
1577− retval = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1578− USB_REQ_SET_CONFIGURATION, 0,
1579− config->desc.bConfigurationValue, 0,
1580− NULL, 0, USB_CTRL_SET_TIMEOUT);
1581− if (retval < 0) {
1717+ retval = usb_control_msg_send(dev, 0, USB_REQ_SET_CONFIGURATION, 0,
1718+ config->desc.bConfigurationValue, 0,
1719+ NULL, 0, USB_CTRL_SET_TIMEOUT,
1720+ GFP_NOIO);
1721+ if (retval) {
15821722 usb_hcd_alloc_bandwidth(dev, NULL, NULL, NULL);
15831723 usb_enable_lpm(dev);
15841724 mutex_unlock(hcd->bandwidth_mutex);
@@ -1963,10 +2103,10 @@ free_interfaces: · 378 unmodified lines
19632103 }
19642104 kfree(new_interfaces);
19652105
1966− ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1967− USB_REQ_SET_CONFIGURATION, 0, configuration, 0,
1968− NULL, 0, USB_CTRL_SET_TIMEOUT);
1969− if (ret < 0 && cp) {
2106+ ret = usb_control_msg_send(dev, 0, USB_REQ_SET_CONFIGURATION, 0,
2107+ configuration, 0, NULL, 0,
2108+ USB_CTRL_SET_TIMEOUT, GFP_NOIO);
2109+ if (ret && cp) {
19702110 /*
19712111 * All the old state is gone, so what else can we do?
19722112 * The device is probably useless now anyway.
drivers/usb/core/urb.c+77−43
@@ -192,24 +192,39 @@ static const int pipetypes[4] = { · 191 unmodified lines
192192 };
193193
194194 /**
195− * usb_urb_ep_type_check - sanity check of endpoint in the given urb
196− * @urb: urb to be checked
195+ * usb_pipe_type_check - sanity check of a specific pipe for a usb device
196+ * @dev: struct usb_device to be checked
197+ * @pipe: pipe to check
197198 *
198199 * This performs a light-weight sanity check for the endpoint in the
199− * given urb. It returns 0 if the urb contains a valid endpoint, otherwise
200− * a negative error code.
200+ * given usb device. It returns 0 if the pipe is valid for the specific usb
201+ * device, otherwise a negative error code.
201202 */
202−int usb_urb_ep_type_check(const struct urb *urb)
203+int usb_pipe_type_check(struct usb_device *dev, unsigned int pipe)
203204 {
204205 const struct usb_host_endpoint *ep;
205206
206− ep = usb_pipe_endpoint(urb->dev, urb->pipe);
207+ ep = usb_pipe_endpoint(dev, pipe);
207208 if (!ep)
208209 return -EINVAL;
209− if (usb_pipetype(urb->pipe) != pipetypes[usb_endpoint_type(&ep->desc)])
210+ if (usb_pipetype(pipe) != pipetypes[usb_endpoint_type(&ep->desc)])
210211 return -EINVAL;
211212 return 0;
212213 }
214+EXPORT_SYMBOL_GPL(usb_pipe_type_check);
215+
216+/**
217+ * usb_urb_ep_type_check - sanity check of endpoint in the given urb
218+ * @urb: urb to be checked
219+ *
220+ * This performs a light-weight sanity check for the endpoint in the
221+ * given urb. It returns 0 if the urb contains a valid endpoint, otherwise
222+ * a negative error code.
223+ */
224+int usb_urb_ep_type_check(const struct urb *urb)
225+{
226+ return usb_pipe_type_check(urb->dev, urb->pipe);
227+}
213228 EXPORT_SYMBOL_GPL(usb_urb_ep_type_check);
214229
215230 /**
@@ -474,7 +489,7 @@ int usb_submit_urb(struct urb *urb, gfp_t mem_flags) · 258 unmodified lines
474489 */
475490
476491 /* Check that the pipe's type matches the endpoint's type */
477− if (usb_urb_ep_type_check(urb))
492+ if (usb_pipe_type_check(urb->dev, urb->pipe))
478493 dev_WARN(&dev->dev, "BOGUS urb xfer, pipe %x != type %x\n",
479494 usb_pipetype(urb->pipe), pipetypes[xfertype]);
480495
@@ -772,11 +787,12 @@ void usb_block_urb(struct urb *urb) · 291 unmodified lines
772787 EXPORT_SYMBOL_GPL(usb_block_urb);
773788
774789 /**
775− * usb_kill_anchored_urbs - cancel transfer requests en masse
790+ * usb_kill_anchored_urbs - kill all URBs associated with an anchor
776791 * @anchor: anchor the requests are bound to
777792 *
778− * this allows all outstanding URBs to be killed starting
779− * from the back of the queue
793+ * This kills all outstanding URBs starting from the back of the queue,
794+ * with guarantee that no completer callbacks will take place from the
795+ * anchor after this function returns.
780796 *
781797 * This routine should not be called by a driver after its disconnect
782798 * method has returned.
@@ -784,20 +800,26 @@ EXPORT_SYMBOL_GPL(usb_block_urb); · 1 unmodified line
784800 void usb_kill_anchored_urbs(struct usb_anchor *anchor)
785801 {
786802 struct urb *victim;
803+ int surely_empty;
787804
788− spin_lock_irq(&anchor->lock);
789− while (!list_empty(&anchor->urb_list)) {
790− victim = list_entry(anchor->urb_list.prev, struct urb,
791− anchor_list);
792− /* we must make sure the URB isn't freed before we kill it*/
793− usb_get_urb(victim);
794− spin_unlock_irq(&anchor->lock);
795− /* this will unanchor the URB */
796− usb_kill_urb(victim);
797− usb_put_urb(victim);
805+ do {
798806 spin_lock_irq(&anchor->lock);
799− }
800− spin_unlock_irq(&anchor->lock);
807+ while (!list_empty(&anchor->urb_list)) {
808+ victim = list_entry(anchor->urb_list.prev,
809+ struct urb, anchor_list);
810+ /* make sure the URB isn't freed before we kill it */
811+ usb_get_urb(victim);
812+ spin_unlock_irq(&anchor->lock);
813+ /* this will unanchor the URB */
814+ usb_kill_urb(victim);
815+ usb_put_urb(victim);
816+ spin_lock_irq(&anchor->lock);
817+ }
818+ surely_empty = usb_anchor_check_wakeup(anchor);
819+
820+ spin_unlock_irq(&anchor->lock);
821+ cpu_relax();
822+ } while (!surely_empty);
801823 }
802824 EXPORT_SYMBOL_GPL(usb_kill_anchored_urbs);
803825
@@ -816,21 +838,27 @@ EXPORT_SYMBOL_GPL(usb_kill_anchored_urbs); · 12 unmodified lines
816838 void usb_poison_anchored_urbs(struct usb_anchor *anchor)
817839 {
818840 struct urb *victim;
841+ int surely_empty;
819842
820− spin_lock_irq(&anchor->lock);
821− anchor->poisoned = 1;
822− while (!list_empty(&anchor->urb_list)) {
823− victim = list_entry(anchor->urb_list.prev, struct urb,
824− anchor_list);
825− /* we must make sure the URB isn't freed before we kill it*/
826− usb_get_urb(victim);
827− spin_unlock_irq(&anchor->lock);
828− /* this will unanchor the URB */
829− usb_poison_urb(victim);
830− usb_put_urb(victim);
843+ do {
831844 spin_lock_irq(&anchor->lock);
832− }
833− spin_unlock_irq(&anchor->lock);
845+ anchor->poisoned = 1;
846+ while (!list_empty(&anchor->urb_list)) {
847+ victim = list_entry(anchor->urb_list.prev,
848+ struct urb, anchor_list);
849+ /* make sure the URB isn't freed before we kill it */
850+ usb_get_urb(victim);
851+ spin_unlock_irq(&anchor->lock);
852+ /* this will unanchor the URB */
853+ usb_poison_urb(victim);
854+ usb_put_urb(victim);
855+ spin_lock_irq(&anchor->lock);
856+ }
857+ surely_empty = usb_anchor_check_wakeup(anchor);
858+
859+ spin_unlock_irq(&anchor->lock);
860+ cpu_relax();
861+ } while (!surely_empty);
834862 }
835863 EXPORT_SYMBOL_GPL(usb_poison_anchored_urbs);
836864
@@ -970,14 +998,20 @@ void usb_scuttle_anchored_urbs(struct usb_anchor *anchor) · 133 unmodified lines
970998 {
971999 struct urb *victim;
9721000 unsigned long flags;
1001+ int surely_empty;
1002+
1003+ do {
1004+ spin_lock_irqsave(&anchor->lock, flags);
1005+ while (!list_empty(&anchor->urb_list)) {
1006+ victim = list_entry(anchor->urb_list.prev,
1007+ struct urb, anchor_list);
1008+ __usb_unanchor_urb(victim, anchor);
1009+ }
1010+ surely_empty = usb_anchor_check_wakeup(anchor);
9731011
974− spin_lock_irqsave(&anchor->lock, flags);
975− while (!list_empty(&anchor->urb_list)) {
976− victim = list_entry(anchor->urb_list.prev, struct urb,
977− anchor_list);
978− __usb_unanchor_urb(victim, anchor);
979− }
980− spin_unlock_irqrestore(&anchor->lock, flags);
1012+ spin_unlock_irqrestore(&anchor->lock, flags);
1013+ cpu_relax();
1014+ } while (!surely_empty);
9811015 }
9821016
9831017 EXPORT_SYMBOL_GPL(usb_scuttle_anchored_urbs);
drivers/usb/core/usb.h+0−1
@@ -191,7 +191,6 @@ extern const struct attribute_group *usb_interface_groups[]; · 190 unmodified lines
191191 extern struct usb_driver usbfs_driver;
192192 extern const struct file_operations usbfs_devices_fops;
193193 extern const struct file_operations usbdev_file_operations;
194−extern void usbfs_conn_disc_event(void);
195194
196195 extern int usb_devio_init(void);
197196 extern void usb_devio_cleanup(void);
drivers/usb/dwc2/Kconfig+1−0
@@ -5,6 +5,7 @@ config USB_DWC2 · 4 unmodified lines
55 depends on HAS_DMA
66 depends on USB || USB_GADGET
77 depends on HAS_IOMEM
8+ select USB_ROLE_SWITCH
89 help
910 Say Y here if your system has a Dual Role Hi-Speed USB
1011 controller based on the DesignWare HSOTG IP Core.
drivers/usb/dwc2/Makefile+1−1
@@ -3,7 +3,7 @@ ccflags-$(CONFIG_USB_DWC2_DEBUG) += -DDEBUG · 2 unmodified lines
33 ccflags-$(CONFIG_USB_DWC2_VERBOSE) += -DVERBOSE_DEBUG
44
55 obj-$(CONFIG_USB_DWC2) += dwc2.o
6−dwc2-y := core.o core_intr.o platform.o
6+dwc2-y := core.o core_intr.o platform.o drd.o
77 dwc2-y += params.o
88
99 ifneq ($(filter y,$(CONFIG_USB_DWC2_HOST) $(CONFIG_USB_DWC2_DUAL_ROLE)),)
drivers/usb/dwc2/core.h+9−0
@@ -860,6 +860,7 @@ struct dwc2_hregs_backup { · 859 unmodified lines
860860 * - USB_DR_MODE_PERIPHERAL
861861 * - USB_DR_MODE_HOST
862862 * - USB_DR_MODE_OTG
863+ * @role_sw: usb_role_switch handle
863864 * @hcd_enabled: Host mode sub-driver initialization indicator.
864865 * @gadget_enabled: Peripheral mode sub-driver initialization indicator.
865866 * @ll_hw_enabled: Status of low-level hardware resources.
@@ -1054,6 +1055,7 @@ struct dwc2_hsotg { · 188 unmodified lines
10541055 struct dwc2_core_params params;
10551056 enum usb_otg_state op_state;
10561057 enum usb_dr_mode dr_mode;
1058+ struct usb_role_switch *role_sw;
10571059 unsigned int hcd_enabled:1;
10581060 unsigned int gadget_enabled:1;
10591061 unsigned int ll_hw_enabled:1;
@@ -1376,6 +1378,11 @@ static inline int dwc2_is_device_mode(struct dwc2_hsotg *hsotg) · 316 unmodified lines
13761378 return (dwc2_readl(hsotg, GINTSTS) & GINTSTS_CURMODE_HOST) == 0;
13771379 }
13781380
1381+int dwc2_drd_init(struct dwc2_hsotg *hsotg);
1382+void dwc2_drd_suspend(struct dwc2_hsotg *hsotg);
1383+void dwc2_drd_resume(struct dwc2_hsotg *hsotg);
1384+void dwc2_drd_exit(struct dwc2_hsotg *hsotg);
1385+
13791386 /*
13801387 * Dump core registers and SPRAM
13811388 */
@@ -1392,6 +1399,7 @@ int dwc2_hsotg_resume(struct dwc2_hsotg *dwc2); · 10 unmodified lines
13921399 int dwc2_gadget_init(struct dwc2_hsotg *hsotg);
13931400 void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2,
13941401 bool reset);
1402+void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg);
13951403 void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg);
13961404 void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2);
13971405 int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode);
@@ -1417,6 +1425,7 @@ static inline int dwc2_gadget_init(struct dwc2_hsotg *hsotg) · 19 unmodified lines
14171425 { return 0; }
14181426 static inline void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *dwc2,
14191427 bool reset) {}
1428+static inline void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg) {}
14201429 static inline void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg) {}
14211430 static inline void dwc2_hsotg_disconnect(struct dwc2_hsotg *dwc2) {}
14221431 static inline int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg,
drivers/usb/dwc2/drd.c+180−0
@@ -0,0 +1,180 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * drd.c - DesignWare USB2 DRD Controller Dual-role support
4+ *
5+ * Copyright (C) 2020 STMicroelectronics
6+ *
7+ * Author(s): Amelie Delaunay <amelie.delaunay@st.com>
8+ */
9+
10+#include <linux/iopoll.h>
11+#include <linux/platform_device.h>
12+#include <linux/usb/role.h>
13+#include "core.h"
14+
15+static void dwc2_ovr_init(struct dwc2_hsotg *hsotg)
16+{
17+ unsigned long flags;
18+ u32 gotgctl;
19+
20+ spin_lock_irqsave(&hsotg->lock, flags);
21+
22+ gotgctl = dwc2_readl(hsotg, GOTGCTL);
23+ gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_AVALOEN | GOTGCTL_VBVALOEN;
24+ gotgctl |= GOTGCTL_DBNCE_FLTR_BYPASS;
25+ gotgctl &= ~(GOTGCTL_BVALOVAL | GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL);
26+ dwc2_writel(hsotg, gotgctl, GOTGCTL);
27+
28+ dwc2_force_mode(hsotg, false);
29+
30+ spin_unlock_irqrestore(&hsotg->lock, flags);
31+}
32+
33+static int dwc2_ovr_avalid(struct dwc2_hsotg *hsotg, bool valid)
34+{
35+ u32 gotgctl = dwc2_readl(hsotg, GOTGCTL);
36+
37+ /* Check if A-Session is already in the right state */
38+ if ((valid && (gotgctl & GOTGCTL_ASESVLD)) ||
39+ (!valid && !(gotgctl & GOTGCTL_ASESVLD)))
40+ return -EALREADY;
41+
42+ if (valid)
43+ gotgctl |= GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL;
44+ else
45+ gotgctl &= ~(GOTGCTL_AVALOVAL | GOTGCTL_VBVALOVAL);
46+ dwc2_writel(hsotg, gotgctl, GOTGCTL);
47+
48+ return 0;
49+}
50+
51+static int dwc2_ovr_bvalid(struct dwc2_hsotg *hsotg, bool valid)
52+{
53+ u32 gotgctl = dwc2_readl(hsotg, GOTGCTL);
54+
55+ /* Check if B-Session is already in the right state */
56+ if ((valid && (gotgctl & GOTGCTL_BSESVLD)) ||
57+ (!valid && !(gotgctl & GOTGCTL_BSESVLD)))
58+ return -EALREADY;
59+
60+ if (valid)
61+ gotgctl |= GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL;
62+ else
63+ gotgctl &= ~(GOTGCTL_BVALOVAL | GOTGCTL_VBVALOVAL);
64+ dwc2_writel(hsotg, gotgctl, GOTGCTL);
65+
66+ return 0;
67+}
68+
69+static int dwc2_drd_role_sw_set(struct usb_role_switch *sw, enum usb_role role)
70+{
71+ struct dwc2_hsotg *hsotg = usb_role_switch_get_drvdata(sw);
72+ unsigned long flags;
73+ int already = 0;
74+
75+ /* Skip session not in line with dr_mode */
76+ if ((role == USB_ROLE_DEVICE && hsotg->dr_mode == USB_DR_MODE_HOST) ||
77+ (role == USB_ROLE_HOST && hsotg->dr_mode == USB_DR_MODE_PERIPHERAL))
78+ return -EINVAL;
79+
80+#if IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL) || \
81+ IS_ENABLED(CONFIG_USB_DWC2_DUAL_ROLE)
82+ /* Skip session if core is in test mode */
83+ if (role == USB_ROLE_NONE && hsotg->test_mode) {
84+ dev_dbg(hsotg->dev, "Core is in test mode\n");
85+ return -EBUSY;
86+ }
87+#endif
88+
89+ spin_lock_irqsave(&hsotg->lock, flags);
90+
91+ if (role == USB_ROLE_HOST) {
92+ already = dwc2_ovr_avalid(hsotg, true);
93+ } else if (role == USB_ROLE_DEVICE) {
94+ already = dwc2_ovr_bvalid(hsotg, true);
95+ /* This clear DCTL.SFTDISCON bit */
96+ dwc2_hsotg_core_connect(hsotg);
97+ } else {
98+ if (dwc2_is_device_mode(hsotg)) {
99+ if (!dwc2_ovr_bvalid(hsotg, false))
100+ /* This set DCTL.SFTDISCON bit */
101+ dwc2_hsotg_core_disconnect(hsotg);
102+ } else {
103+ dwc2_ovr_avalid(hsotg, false);
104+ }
105+ }
106+
107+ spin_unlock_irqrestore(&hsotg->lock, flags);
108+
109+ if (!already && hsotg->dr_mode == USB_DR_MODE_OTG)
110+ /* This will raise a Connector ID Status Change Interrupt */
111+ dwc2_force_mode(hsotg, role == USB_ROLE_HOST);
112+
113+ dev_dbg(hsotg->dev, "%s-session valid\n",
114+ role == USB_ROLE_NONE ? "No" :
115+ role == USB_ROLE_HOST ? "A" : "B");
116+
117+ return 0;
118+}
119+
120+int dwc2_drd_init(struct dwc2_hsotg *hsotg)
121+{
122+ struct usb_role_switch_desc role_sw_desc = {0};
123+ struct usb_role_switch *role_sw;
124+ int ret;
125+
126+ if (!device_property_read_bool(hsotg->dev, "usb-role-switch"))
127+ return 0;
128+
129+ role_sw_desc.driver_data = hsotg;
130+ role_sw_desc.fwnode = dev_fwnode(hsotg->dev);
131+ role_sw_desc.set = dwc2_drd_role_sw_set;
132+ role_sw_desc.allow_userspace_control = true;
133+
134+ role_sw = usb_role_switch_register(hsotg->dev, &role_sw_desc);
135+ if (IS_ERR(role_sw)) {
136+ ret = PTR_ERR(role_sw);
137+ dev_err(hsotg->dev,
138+ "failed to register role switch: %d\n", ret);
139+ return ret;
140+ }
141+
142+ hsotg->role_sw = role_sw;
143+
144+ /* Enable override and initialize values */
145+ dwc2_ovr_init(hsotg);
146+
147+ return 0;
148+}
149+
150+void dwc2_drd_suspend(struct dwc2_hsotg *hsotg)
151+{
152+ u32 gintsts, gintmsk;
153+
154+ if (hsotg->role_sw && !hsotg->params.external_id_pin_ctl) {
155+ gintmsk = dwc2_readl(hsotg, GINTMSK);
156+ gintmsk &= ~GINTSTS_CONIDSTSCHNG;
157+ dwc2_writel(hsotg, gintmsk, GINTMSK);
158+ gintsts = dwc2_readl(hsotg, GINTSTS);
159+ dwc2_writel(hsotg, gintsts | GINTSTS_CONIDSTSCHNG, GINTSTS);
160+ }
161+}
162+
163+void dwc2_drd_resume(struct dwc2_hsotg *hsotg)
164+{
165+ u32 gintsts, gintmsk;
166+
167+ if (hsotg->role_sw && !hsotg->params.external_id_pin_ctl) {
168+ gintsts = dwc2_readl(hsotg, GINTSTS);
169+ dwc2_writel(hsotg, gintsts | GINTSTS_CONIDSTSCHNG, GINTSTS);
170+ gintmsk = dwc2_readl(hsotg, GINTMSK);
171+ gintmsk |= GINTSTS_CONIDSTSCHNG;
172+ dwc2_writel(hsotg, gintmsk, GINTMSK);
173+ }
174+}
175+
176+void dwc2_drd_exit(struct dwc2_hsotg *hsotg)
177+{
178+ if (hsotg->role_sw)
179+ usb_role_switch_unregister(hsotg->role_sw);
180+}
drivers/usb/dwc2/gadget.c+34−8
@@ -713,8 +713,11 @@ static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg) · 712 unmodified lines
713713 */
714714 static unsigned int dwc2_gadget_get_chain_limit(struct dwc2_hsotg_ep *hs_ep)
715715 {
716+ const struct usb_endpoint_descriptor *ep_desc = hs_ep->ep.desc;
716717 int is_isoc = hs_ep->isochronous;
717718 unsigned int maxsize;
719+ u32 mps = hs_ep->ep.maxpacket;
720+ int dir_in = hs_ep->dir_in;
718721
719722 if (is_isoc)
720723 maxsize = (hs_ep->dir_in ? DEV_DMA_ISOC_TX_NBYTES_LIMIT :
@@ -723,6 +726,11 @@ static unsigned int dwc2_gadget_get_chain_limit(struct dwc2_hsotg_ep *hs_ep) · 2 unmodified lines
723726 else
724727 maxsize = DEV_DMA_NBYTES_LIMIT * MAX_DMA_DESC_NUM_GENERIC;
725728
729+ /* Interrupt OUT EP with mps not multiple of 4 */
730+ if (hs_ep->index)
731+ if (usb_endpoint_xfer_int(ep_desc) && !dir_in && (mps % 4))
732+ maxsize = mps * MAX_DMA_DESC_NUM_GENERIC;
733+
726734 return maxsize;
727735 }
728736
@@ -738,11 +746,14 @@ static unsigned int dwc2_gadget_get_chain_limit(struct dwc2_hsotg_ep *hs_ep) · 9 unmodified lines
738746 * Isochronous - descriptor rx/tx bytes bitfield limit,
739747 * Control In/Bulk/Interrupt - multiple of mps. This will allow to not
740748 * have concatenations from various descriptors within one packet.
749+ * Interrupt OUT - if mps not multiple of 4 then a single packet corresponds
750+ * to a single descriptor.
741751 *
742752 * Selects corresponding mask for RX/TX bytes as well.
743753 */
744754 static u32 dwc2_gadget_get_desc_params(struct dwc2_hsotg_ep *hs_ep, u32 *mask)
745755 {
756+ const struct usb_endpoint_descriptor *ep_desc = hs_ep->ep.desc;
746757 u32 mps = hs_ep->ep.maxpacket;
747758 int dir_in = hs_ep->dir_in;
748759 u32 desc_size = 0;
@@ -766,6 +777,13 @@ static u32 dwc2_gadget_get_desc_params(struct dwc2_hsotg_ep *hs_ep, u32 *mask) · 17 unmodified lines
766777 desc_size -= desc_size % mps;
767778 }
768779
780+ /* Interrupt OUT EP with mps not multiple of 4 */
781+ if (hs_ep->index)
782+ if (usb_endpoint_xfer_int(ep_desc) && !dir_in && (mps % 4)) {
783+ desc_size = mps;
784+ *mask = DEV_DMA_NBYTES_MASK;
785+ }
786+
769787 return desc_size;
770788 }
771789
@@ -1123,13 +1141,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg, · 351 unmodified lines
11231141 length += (mps - (length % mps));
11241142 }
11251143
1126− /*
1127− * If more data to send, adjust DMA for EP0 out data stage.
1128− * ureq->dma stays unchanged, hence increment it by already
1129− * passed passed data count before starting new transaction.
1130− */
1131− if (!index && hsotg->ep0_state == DWC2_EP0_DATA_OUT &&
1132− continuing)
1144+ if (continuing)
11331145 offset = ureq->actual;
11341146
11351147 /* Fill DDMA chain entries */
@@ -2320,22 +2332,36 @@ static void dwc2_hsotg_change_ep_iso_parity(struct dwc2_hsotg *hsotg, · 1184 unmodified lines
23202332 */
23212333 static unsigned int dwc2_gadget_get_xfersize_ddma(struct dwc2_hsotg_ep *hs_ep)
23222334 {
2335+ const struct usb_endpoint_descriptor *ep_desc = hs_ep->ep.desc;
23232336 struct dwc2_hsotg *hsotg = hs_ep->parent;
23242337 unsigned int bytes_rem = 0;
2338+ unsigned int bytes_rem_correction = 0;
23252339 struct dwc2_dma_desc *desc = hs_ep->desc_list;
23262340 int i;
23272341 u32 status;
2342+ u32 mps = hs_ep->ep.maxpacket;
2343+ int dir_in = hs_ep->dir_in;
23282344
23292345 if (!desc)
23302346 return -EINVAL;
23312347
2348+ /* Interrupt OUT EP with mps not multiple of 4 */
2349+ if (hs_ep->index)
2350+ if (usb_endpoint_xfer_int(ep_desc) && !dir_in && (mps % 4))
2351+ bytes_rem_correction = 4 - (mps % 4);
2352+
23322353 for (i = 0; i < hs_ep->desc_count; ++i) {
23332354 status = desc->status;
23342355 bytes_rem += status & DEV_DMA_NBYTES_MASK;
2356+ bytes_rem -= bytes_rem_correction;
23352357
23362358 if (status & DEV_DMA_STS_MASK)
23372359 dev_err(hsotg->dev, "descriptor %d closed with %x\n",
23382360 i, status & DEV_DMA_STS_MASK);
2361+
2362+ if (status & DEV_DMA_L)
2363+ break;
2364+
23392365 desc++;
23402366 }
23412367
@@ -3530,7 +3556,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, · 1188 unmodified lines
35303556 dwc2_readl(hsotg, DOEPCTL0));
35313557 }
35323558
3533−static void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg)
3559+void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg)
35343560 {
35353561 /* set the soft-disconnect bit */
35363562 dwc2_set_bit(hsotg, DCTL, DCTL_SFTDISCON);
drivers/usb/dwc2/params.c+3−2
@@ -185,7 +185,7 @@ static void dwc2_set_stm32mp15_hsotg_params(struct dwc2_hsotg *hsotg) · 184 unmodified lines
185185 struct dwc2_core_params *p = &hsotg->params;
186186
187187 p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
188− p->activate_stm_id_vb_detection = true;
188+ p->activate_stm_id_vb_detection = !device_property_read_bool(hsotg->dev, "usb-role-switch");
189189 p->host_rx_fifo_size = 440;
190190 p->host_nperio_tx_fifo_size = 256;
191191 p->host_perio_tx_fifo_size = 256;
@@ -210,6 +210,7 @@ const struct of_device_id dwc2_of_match_table[] = { · 18 unmodified lines
210210 { .compatible = "amlogic,meson-g12a-usb",
211211 .data = dwc2_set_amlogic_g12a_params },
212212 { .compatible = "amcc,dwc-otg", .data = dwc2_set_amcc_params },
213+ { .compatible = "apm,apm82181-dwc-otg", .data = dwc2_set_amcc_params },
213214 { .compatible = "st,stm32f4x9-fsotg",
214215 .data = dwc2_set_stm32f4x9_fsotg_params },
215216 { .compatible = "st,stm32f4x9-hsotg" },
@@ -860,7 +861,7 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) · 644 unmodified lines
860861 int dwc2_init_params(struct dwc2_hsotg *hsotg)
861862 {
862863 const struct of_device_id *match;
863− void (*set_params)(void *data);
864+ void (*set_params)(struct dwc2_hsotg *data);
864865
865866 dwc2_set_default_params(hsotg);
866867 dwc2_get_device_properties(hsotg);
drivers/usb/dwc2/platform.c+36−7
@@ -121,6 +121,13 @@ static int dwc2_get_dr_mode(struct dwc2_hsotg *hsotg) · 120 unmodified lines
121121 return 0;
122122 }
123123
124+static void __dwc2_disable_regulators(void *data)
125+{
126+ struct dwc2_hsotg *hsotg = data;
127+
128+ regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies), hsotg->supplies);
129+}
130+
124131 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg)
125132 {
126133 struct platform_device *pdev = to_platform_device(hsotg->dev);
@@ -131,6 +138,11 @@ static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg *hsotg) · 4 unmodified lines
131138 if (ret)
132139 return ret;
133140
141+ ret = devm_add_action_or_reset(&pdev->dev,
142+ __dwc2_disable_regulators, hsotg);
143+ if (ret)
144+ return ret;
145+
134146 if (hsotg->clk) {
135147 ret = clk_prepare_enable(hsotg->clk);
136148 if (ret)
@@ -186,10 +198,7 @@ static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg *hsotg) · 49 unmodified lines
186198 if (hsotg->clk)
187199 clk_disable_unprepare(hsotg->clk);
188200
189− ret = regulator_bulk_disable(ARRAY_SIZE(hsotg->supplies),
190− hsotg->supplies);
191−
192− return ret;
201+ return 0;
193202 }
194203
195204 /**
@@ -314,6 +323,8 @@ static int dwc2_driver_remove(struct platform_device *dev) · 118 unmodified lines
314323 if (hsotg->gadget_enabled)
315324 dwc2_hsotg_remove(hsotg);
316325
326+ dwc2_drd_exit(hsotg);
327+
317328 if (hsotg->params.activate_stm_id_vb_detection)
318329 regulator_disable(hsotg->usb33d);
319330
@@ -533,10 +544,17 @@ static int dwc2_driver_probe(struct platform_device *dev) · 213 unmodified lines
533544 dwc2_writel(hsotg, ggpio, GGPIO);
534545 }
535546
547+ retval = dwc2_drd_init(hsotg);
548+ if (retval) {
549+ if (retval != -EPROBE_DEFER)
550+ dev_err(hsotg->dev, "failed to initialize dual-role\n");
551+ goto error_init;
552+ }
553+
536554 if (hsotg->dr_mode != USB_DR_MODE_HOST) {
537555 retval = dwc2_gadget_init(hsotg);
538556 if (retval)
539− goto error_init;
557+ goto error_drd;
540558 hsotg->gadget_enabled = 1;
541559 }
542560
@@ -562,7 +580,7 @@ static int dwc2_driver_probe(struct platform_device *dev) · 19 unmodified lines
562580 if (retval) {
563581 if (hsotg->gadget_enabled)
564582 dwc2_hsotg_remove(hsotg);
565− goto error_init;
583+ goto error_drd;
566584 }
567585 hsotg->hcd_enabled = 1;
568586 }
@@ -584,12 +602,19 @@ static int dwc2_driver_probe(struct platform_device *dev) · 15 unmodified lines
584602 if (retval) {
585603 hsotg->gadget.udc = NULL;
586604 dwc2_hsotg_remove(hsotg);
587− goto error_init;
605+ goto error_debugfs;
588606 }
589607 }
590608 #endif /* CONFIG_USB_DWC2_PERIPHERAL || CONFIG_USB_DWC2_DUAL_ROLE */
591609 return 0;
592610
611+error_debugfs:
612+ dwc2_debugfs_exit(hsotg);
613+ if (hsotg->hcd_enabled)
614+ dwc2_hcd_remove(hsotg);
615+error_drd:
616+ dwc2_drd_exit(hsotg);
617+
593618 error_init:
594619 if (hsotg->params.activate_stm_id_vb_detection)
595620 regulator_disable(hsotg->usb33d);
@@ -608,6 +633,8 @@ static int __maybe_unused dwc2_suspend(struct device *dev) · 12 unmodified lines
608633 if (is_device_mode)
609634 dwc2_hsotg_suspend(dwc2);
610635
636+ dwc2_drd_suspend(dwc2);
637+
611638 if (dwc2->params.activate_stm_id_vb_detection) {
612639 unsigned long flags;
613640 u32 ggpio, gotgctl;
@@ -688,6 +715,8 @@ static int __maybe_unused dwc2_resume(struct device *dev) · 74 unmodified lines
688715 /* Need to restore FORCEDEVMODE/FORCEHOSTMODE */
689716 dwc2_force_dr_mode(dwc2);
690717
718+ dwc2_drd_resume(dwc2);
719+
691720 if (dwc2_is_device_mode(dwc2))
692721 ret = dwc2_hsotg_resume(dwc2);
693722
drivers/usb/dwc3/core.c+68−22
@@ -119,9 +119,7 @@ static void __dwc3_set_mode(struct work_struct *work) · 118 unmodified lines
119119 struct dwc3 *dwc = work_to_dwc(work);
120120 unsigned long flags;
121121 int ret;
122−
123− if (dwc->dr_mode != USB_DR_MODE_OTG)
124− return;
122+ u32 reg;
125123
126124 pm_runtime_get_sync(dwc->dev);
127125
@@ -172,6 +170,11 @@ static void __dwc3_set_mode(struct work_struct *work) · 44 unmodified lines
172170 otg_set_vbus(dwc->usb2_phy->otg, true);
173171 phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
174172 phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
173+ if (dwc->dis_split_quirk) {
174+ reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
175+ reg |= DWC3_GUCTL3_SPLITDISABLE;
176+ dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
177+ }
175178 }
176179 break;
177180 case DWC3_GCTL_PRTCAP_DEVICE:
@@ -203,6 +206,9 @@ void dwc3_set_mode(struct dwc3 *dwc, u32 mode) · 25 unmodified lines
203206 {
204207 unsigned long flags;
205208
209+ if (dwc->dr_mode != USB_DR_MODE_OTG)
210+ return;
211+
206212 spin_lock_irqsave(&dwc->lock, flags);
207213 dwc->desired_dr_role = mode;
208214 spin_unlock_irqrestore(&dwc->lock, flags);
@@ -929,13 +935,6 @@ static int dwc3_core_init(struct dwc3 *dwc) · 720 unmodified lines
929935 */
930936 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
931937
932− /* Handle USB2.0-only core configuration */
933− if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
934− DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
935− if (dwc->maximum_speed == USB_SPEED_SUPER)
936− dwc->maximum_speed = USB_SPEED_HIGH;
937− }
938−
939938 ret = dwc3_phy_setup(dwc);
940939 if (ret)
941940 goto err0;
@@ -1356,6 +1355,9 @@ static void dwc3_get_properties(struct dwc3 *dwc) · 414 unmodified lines
13561355 dwc->dis_metastability_quirk = device_property_read_bool(dev,
13571356 "snps,dis_metastability_quirk");
13581357
1358+ dwc->dis_split_quirk = device_property_read_bool(dev,
1359+ "snps,dis-split-quirk");
1360+
13591361 dwc->lpm_nyet_threshold = lpm_nyet_threshold;
13601362 dwc->tx_de_emphasis = tx_de_emphasis;
13611363
@@ -1381,6 +1383,8 @@ bool dwc3_has_imod(struct dwc3 *dwc) · 19 unmodified lines
13811383 static void dwc3_check_params(struct dwc3 *dwc)
13821384 {
13831385 struct device *dev = dwc->dev;
1386+ unsigned int hwparam_gen =
1387+ DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3);
13841388
13851389 /* Check for proper value of imod_interval */
13861390 if (dwc->imod_interval && !dwc3_has_imod(dwc)) {
@@ -1404,25 +1408,40 @@ static void dwc3_check_params(struct dwc3 *dwc) · 17 unmodified lines
14041408 case USB_SPEED_LOW:
14051409 case USB_SPEED_FULL:
14061410 case USB_SPEED_HIGH:
1411+ break;
14071412 case USB_SPEED_SUPER:
1413+ if (hwparam_gen == DWC3_GHWPARAMS3_SSPHY_IFC_DIS)
1414+ dev_warn(dev, "UDC doesn't support Gen 1\n");
1415+ break;
14081416 case USB_SPEED_SUPER_PLUS:
1417+ if ((DWC3_IP_IS(DWC32) &&
1418+ hwparam_gen == DWC3_GHWPARAMS3_SSPHY_IFC_DIS) ||
1419+ (!DWC3_IP_IS(DWC32) &&
1420+ hwparam_gen != DWC3_GHWPARAMS3_SSPHY_IFC_GEN2))
1421+ dev_warn(dev, "UDC doesn't support SSP\n");
14091422 break;
14101423 default:
14111424 dev_err(dev, "invalid maximum_speed parameter %d\n",
14121425 dwc->maximum_speed);
14131426 fallthrough;
14141427 case USB_SPEED_UNKNOWN:
1415− /* default to superspeed */
1416− dwc->maximum_speed = USB_SPEED_SUPER;
1417−
1418− /*
1419− * default to superspeed plus if we are capable.
1420− */
1421− if ((DWC3_IP_IS(DWC31) || DWC3_IP_IS(DWC32)) &&
1422− (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
1423− DWC3_GHWPARAMS3_SSPHY_IFC_GEN2))
1428+ switch (hwparam_gen) {
1429+ case DWC3_GHWPARAMS3_SSPHY_IFC_GEN2:
14241430 dwc->maximum_speed = USB_SPEED_SUPER_PLUS;
1425−
1431+ break;
1432+ case DWC3_GHWPARAMS3_SSPHY_IFC_GEN1:
1433+ if (DWC3_IP_IS(DWC32))
1434+ dwc->maximum_speed = USB_SPEED_SUPER_PLUS;
1435+ else
1436+ dwc->maximum_speed = USB_SPEED_SUPER;
1437+ break;
1438+ case DWC3_GHWPARAMS3_SSPHY_IFC_DIS:
1439+ dwc->maximum_speed = USB_SPEED_HIGH;
1440+ break;
1441+ default:
1442+ dwc->maximum_speed = USB_SPEED_SUPER;
1443+ break;
1444+ }
14261445 break;
14271446 }
14281447 }
@@ -1554,6 +1573,17 @@ static int dwc3_probe(struct platform_device *pdev) · 125 unmodified lines
15541573
15551574 err5:
15561575 dwc3_event_buffers_cleanup(dwc);
1576+
1577+ usb_phy_shutdown(dwc->usb2_phy);
1578+ usb_phy_shutdown(dwc->usb3_phy);
1579+ phy_exit(dwc->usb2_generic_phy);
1580+ phy_exit(dwc->usb3_generic_phy);
1581+
1582+ usb_phy_set_suspend(dwc->usb2_phy, 1);
1583+ usb_phy_set_suspend(dwc->usb3_phy, 1);
1584+ phy_power_off(dwc->usb2_generic_phy);
1585+ phy_power_off(dwc->usb3_generic_phy);
1586+
15571587 dwc3_ulpi_exit(dwc);
15581588
15591589 err4:
@@ -1589,9 +1619,9 @@ static int dwc3_remove(struct platform_device *pdev) · 29 unmodified lines
15891619 dwc3_core_exit(dwc);
15901620 dwc3_ulpi_exit(dwc);
15911621
1592− pm_runtime_put_sync(&pdev->dev);
1593− pm_runtime_allow(&pdev->dev);
15941622 pm_runtime_disable(&pdev->dev);
1623+ pm_runtime_put_noidle(&pdev->dev);
1624+ pm_runtime_set_suspended(&pdev->dev);
15951625
15961626 dwc3_free_event_buffers(dwc);
15971627 dwc3_free_scratch_buffers(dwc);
@@ -1865,10 +1895,26 @@ static int dwc3_resume(struct device *dev) · 267 unmodified lines
18651895
18661896 return 0;
18671897 }
1898+
1899+static void dwc3_complete(struct device *dev)
1900+{
1901+ struct dwc3 *dwc = dev_get_drvdata(dev);
1902+ u32 reg;
1903+
1904+ if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST &&
1905+ dwc->dis_split_quirk) {
1906+ reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
1907+ reg |= DWC3_GUCTL3_SPLITDISABLE;
1908+ dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
1909+ }
1910+}
1911+#else
1912+#define dwc3_complete NULL
18681913 #endif /* CONFIG_PM_SLEEP */
18691914
18701915 static const struct dev_pm_ops dwc3_dev_pm_ops = {
18711916 SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume)
1917+ .complete = dwc3_complete,
18721918 SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume,
18731919 dwc3_runtime_idle)
18741920 };
drivers/usb/dwc3/core.h+28−19
@@ -138,6 +138,7 @@ · 137 unmodified lines
138138 #define DWC3_GEVNTCOUNT(n) (0xc40c + ((n) * 0x10))
139139
140140 #define DWC3_GHWPARAMS8 0xc600
141+#define DWC3_GUCTL3 0xc60c
141142 #define DWC3_GFLADJ 0xc630
142143
143144 /* Device Registers */
@@ -380,6 +381,9 @@ · 236 unmodified lines
380381 /* Global User Control Register 2 */
381382 #define DWC3_GUCTL2_RST_ACTBITLATER BIT(14)
382383
384+/* Global User Control Register 3 */
385+#define DWC3_GUCTL3_SPLITDISABLE BIT(14)
386+
383387 /* Device Configuration Register */
384388 #define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
385389 #define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -634,7 +638,7 @@ struct dwc3_trb; · 248 unmodified lines
634638 struct dwc3_event_buffer {
635639 void *buf;
636640 void *cache;
637− unsigned length;
641+ unsigned int length;
638642 unsigned int lpos;
639643 unsigned int count;
640644 unsigned int flags;
@@ -694,7 +698,7 @@ struct dwc3_ep { · 53 unmodified lines
694698 struct dwc3 *dwc;
695699
696700 u32 saved_state;
697− unsigned flags;
701+ unsigned int flags;
698702 #define DWC3_EP_ENABLED BIT(0)
699703 #define DWC3_EP_STALL BIT(1)
700704 #define DWC3_EP_WEDGE BIT(2)
@@ -706,6 +710,7 @@ struct dwc3_ep { · 5 unmodified lines
706710 #define DWC3_EP_IGNORE_NEXT_NOSTREAM BIT(8)
707711 #define DWC3_EP_FORCE_RESTART_STREAM BIT(9)
708712 #define DWC3_EP_FIRST_STREAM_PRIMED BIT(10)
713+#define DWC3_EP_PENDING_CLEAR_STALL BIT(11)
709714
710715 /* This last one is specific to EP0 */
711716 #define DWC3_EP0_DIR_IN BIT(31)
@@ -893,9 +898,9 @@ struct dwc3_request { · 181 unmodified lines
893898 struct scatterlist *sg;
894899 struct scatterlist *start_sg;
895900
896− unsigned num_pending_sgs;
901+ unsigned int num_pending_sgs;
897902 unsigned int num_queued_sgs;
898− unsigned remaining;
903+ unsigned int remaining;
899904
900905 unsigned int status;
901906 #define DWC3_REQUEST_STATUS_QUEUED 0
@@ -908,11 +913,11 @@ struct dwc3_request { · 6 unmodified lines
908913 struct dwc3_trb *trb;
909914 dma_addr_t trb_dma;
910915
911− unsigned num_trbs;
916+ unsigned int num_trbs;
912917
913− unsigned needs_extra_trb:1;
914− unsigned direction:1;
915− unsigned mapped:1;
918+ unsigned int needs_extra_trb:1;
919+ unsigned int direction:1;
920+ unsigned int mapped:1;
916921 };
917922
918923 /*
@@ -1010,8 +1015,8 @@ struct dwc3_scratchpad_array { · 91 unmodified lines
10101015 * @has_lpm_erratum: true when core was configured with LPM Erratum. Note that
10111016 * there's now way for software to detect this in runtime.
10121017 * @is_utmi_l1_suspend: the core asserts output signal
1013− * 0 - utmi_sleep_n
1014− * 1 - utmi_l1_suspend_n
1018+ * 0 - utmi_sleep_n
1019+ * 1 - utmi_l1_suspend_n
10151020 * @is_fpga: true when we are using the FPGA board
10161021 * @pending_events: true when we have pending IRQs to be handled
10171022 * @pullups_connected: true when Run/Stop bit is set
@@ -1047,13 +1052,14 @@ struct dwc3_scratchpad_array { · 29 unmodified lines
10471052 * instances in park mode.
10481053 * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
10491054 * @tx_de_emphasis: Tx de-emphasis value
1050− * 0 - -6dB de-emphasis
1051− * 1 - -3.5dB de-emphasis
1052− * 2 - No de-emphasis
1053− * 3 - Reserved
1055+ * 0 - -6dB de-emphasis
1056+ * 1 - -3.5dB de-emphasis
1057+ * 2 - No de-emphasis
1058+ * 3 - Reserved
10541059 * @dis_metastability_quirk: set to disable metastability quirk.
1060+ * @dis_split_quirk: set to disable split boundary.
10551061 * @imod_interval: set the interrupt moderation interval in 250ns
1056− * increments or 0 to disable.
1062+ * increments or 0 to disable.
10571063 */
10581064 struct dwc3 {
10591065 struct work_struct drd_work;
@@ -1079,7 +1085,7 @@ struct dwc3 { · 19 unmodified lines
10791085 struct dwc3_event_buffer *ev_buf;
10801086 struct dwc3_ep *eps[DWC3_ENDPOINTS_NUM];
10811087
1082− struct usb_gadget gadget;
1088+ struct usb_gadget *gadget;
10831089 struct usb_gadget_driver *gadget_driver;
10841090
10851091 struct clk_bulk_data *clks;
@@ -1245,6 +1251,8 @@ struct dwc3 { · 159 unmodified lines
12451251
12461252 unsigned dis_metastability_quirk:1;
12471253
1254+ unsigned dis_split_quirk:1;
1255+
12481256 u16 imod_interval;
12491257 };
12501258
@@ -1456,9 +1464,10 @@ void dwc3_gadget_exit(struct dwc3 *dwc); · 205 unmodified lines
14561464 int dwc3_gadget_set_test_mode(struct dwc3 *dwc, int mode);
14571465 int dwc3_gadget_get_link_state(struct dwc3 *dwc);
14581466 int dwc3_gadget_set_link_state(struct dwc3 *dwc, enum dwc3_link_state state);
1459−int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
1467+int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned int cmd,
14601468 struct dwc3_gadget_ep_cmd_params *params);
1461−int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param);
1469+int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned int cmd,
1470+ u32 param);
14621471 #else
14631472 static inline int dwc3_gadget_init(struct dwc3 *dwc)
14641473 { return 0; }
@@ -1472,7 +1481,7 @@ static inline int dwc3_gadget_set_link_state(struct dwc3 *dwc, · 7 unmodified lines
14721481 enum dwc3_link_state state)
14731482 { return 0; }
14741483
1475−static inline int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
1484+static inline int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned int cmd,
14761485 struct dwc3_gadget_ep_cmd_params *params)
14771486 { return 0; }
14781487 static inline int dwc3_send_gadget_generic_command(struct dwc3 *dwc,
drivers/usb/dwc3/debug.h+5−3
@@ -371,7 +371,9 @@ static inline const char *dwc3_gadget_event_type_string(u8 event) · 370 unmodified lines
371371 static inline const char *dwc3_decode_event(char *str, size_t size, u32 event,
372372 u32 ep0state)
373373 {
374− const union dwc3_event evt = (union dwc3_event) event;
374+ union dwc3_event evt;
375+
376+ memcpy(&evt, &event, sizeof(event));
375377
376378 if (evt.type.is_devspec)
377379 return dwc3_gadget_event_string(str, size, &evt.devt);
@@ -411,8 +413,8 @@ static inline const char *dwc3_gadget_generic_cmd_status_string(int status) · 33 unmodified lines
411413
412414
413415 #ifdef CONFIG_DEBUG_FS
414−extern void dwc3_debugfs_init(struct dwc3 *);
415−extern void dwc3_debugfs_exit(struct dwc3 *);
416+extern void dwc3_debugfs_init(struct dwc3 *d);
417+extern void dwc3_debugfs_exit(struct dwc3 *d);
416418 #else
417419 static inline void dwc3_debugfs_init(struct dwc3 *d)
418420 { }
drivers/usb/dwc3/debugfs.c+29−30
@@ -397,13 +397,13 @@ static int dwc3_mode_show(struct seq_file *s, void *unused) · 396 unmodified lines
397397
398398 switch (DWC3_GCTL_PRTCAP(reg)) {
399399 case DWC3_GCTL_PRTCAP_HOST:
400− seq_printf(s, "host\n");
400+ seq_puts(s, "host\n");
401401 break;
402402 case DWC3_GCTL_PRTCAP_DEVICE:
403− seq_printf(s, "device\n");
403+ seq_puts(s, "device\n");
404404 break;
405405 case DWC3_GCTL_PRTCAP_OTG:
406− seq_printf(s, "otg\n");
406+ seq_puts(s, "otg\n");
407407 break;
408408 default:
409409 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg));
@@ -428,6 +428,9 @@ static ssize_t dwc3_mode_write(struct file *file, · 18 unmodified lines
428428 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
429429 return -EFAULT;
430430
431+ if (dwc->dr_mode != USB_DR_MODE_OTG)
432+ return count;
433+
431434 if (!strncmp(buf, "host", 4))
432435 mode = DWC3_GCTL_PRTCAP_HOST;
433436
@@ -464,22 +467,22 @@ static int dwc3_testmode_show(struct seq_file *s, void *unused) · 30 unmodified lines
464467
465468 switch (reg) {
466469 case 0:
467− seq_printf(s, "no test\n");
470+ seq_puts(s, "no test\n");
468471 break;
469472 case USB_TEST_J:
470− seq_printf(s, "test_j\n");
473+ seq_puts(s, "test_j\n");
471474 break;
472475 case USB_TEST_K:
473− seq_printf(s, "test_k\n");
476+ seq_puts(s, "test_k\n");
474477 break;
475478 case USB_TEST_SE0_NAK:
476− seq_printf(s, "test_se0_nak\n");
479+ seq_puts(s, "test_se0_nak\n");
477480 break;
478481 case USB_TEST_PACKET:
479− seq_printf(s, "test_packet\n");
482+ seq_puts(s, "test_packet\n");
480483 break;
481484 case USB_TEST_FORCE_ENABLE:
482− seq_printf(s, "test_force_enable\n");
485+ seq_puts(s, "test_force_enable\n");
483486 break;
484487 default:
485488 seq_printf(s, "UNKNOWN %d\n", reg);
@@ -760,27 +763,26 @@ static int dwc3_transfer_type_show(struct seq_file *s, void *unused) · 274 unmodified lines
760763 unsigned long flags;
761764
762765 spin_lock_irqsave(&dwc->lock, flags);
763− if (!(dep->flags & DWC3_EP_ENABLED) ||
764− !dep->endpoint.desc) {
765− seq_printf(s, "--\n");
766+ if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) {
767+ seq_puts(s, "--\n");
766768 goto out;
767769 }
768770
769771 switch (usb_endpoint_type(dep->endpoint.desc)) {
770772 case USB_ENDPOINT_XFER_CONTROL:
771− seq_printf(s, "control\n");
773+ seq_puts(s, "control\n");
772774 break;
773775 case USB_ENDPOINT_XFER_ISOC:
774− seq_printf(s, "isochronous\n");
776+ seq_puts(s, "isochronous\n");
775777 break;
776778 case USB_ENDPOINT_XFER_BULK:
777− seq_printf(s, "bulk\n");
779+ seq_puts(s, "bulk\n");
778780 break;
779781 case USB_ENDPOINT_XFER_INT:
780− seq_printf(s, "interrupt\n");
782+ seq_puts(s, "interrupt\n");
781783 break;
782784 default:
783− seq_printf(s, "--\n");
785+ seq_puts(s, "--\n");
784786 }
785787
786788 out:
@@ -798,11 +800,11 @@ static int dwc3_trb_ring_show(struct seq_file *s, void *unused) · 11 unmodified lines
798800
799801 spin_lock_irqsave(&dwc->lock, flags);
800802 if (dep->number <= 1) {
801− seq_printf(s, "--\n");
803+ seq_puts(s, "--\n");
802804 goto out;
803805 }
804806
805− seq_printf(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n");
807+ seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n");
806808
807809 for (i = 0; i < DWC3_TRB_NUM; i++) {
808810 struct dwc3_trb *trb = &dep->trb_pool[i];
@@ -884,7 +886,7 @@ static void dwc3_debugfs_create_endpoint_files(struct dwc3_ep *dep, · 75 unmodified lines
884886 const struct file_operations *fops = dwc3_ep_file_map[i].fops;
885887 const char *name = dwc3_ep_file_map[i].name;
886888
887− debugfs_create_file(name, S_IRUGO, parent, dep, fops);
889+ debugfs_create_file(name, 0444, parent, dep, fops);
888890 }
889891 }
890892
@@ -929,21 +931,18 @@ void dwc3_debugfs_init(struct dwc3 *dwc) · 38 unmodified lines
929931 root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root);
930932 dwc->root = root;
931933
932− debugfs_create_regset32("regdump", S_IRUGO, root, dwc->regset);
933−
934− debugfs_create_file("lsp_dump", S_IRUGO | S_IWUSR, root, dwc,
935− &dwc3_lsp_fops);
934+ debugfs_create_regset32("regdump", 0444, root, dwc->regset);
935+ debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops);
936936
937− if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) {
938− debugfs_create_file("mode", S_IRUGO | S_IWUSR, root, dwc,
937+ if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE))
938+ debugfs_create_file("mode", 0644, root, dwc,
939939 &dwc3_mode_fops);
940− }
941940
942941 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) ||
943942 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) {
944− debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, dwc,
945− &dwc3_testmode_fops);
946− debugfs_create_file("link_state", S_IRUGO | S_IWUSR, root, dwc,
943+ debugfs_create_file("testmode", 0644, root, dwc,
944+ &dwc3_testmode_fops);
945+ debugfs_create_file("link_state", 0644, root, dwc,
947946 &dwc3_link_state_fops);
948947 dwc3_debugfs_create_endpoint_dirs(dwc, root);
949948 }
drivers/usb/dwc3/dwc3-meson-g12a.c+26−15
@@ -116,23 +116,24 @@ static struct clk_bulk_data meson_a1_clocks[] = { · 115 unmodified lines
116116 { .id = "xtal_usb_ctrl" },
117117 };
118118
119−static const char *meson_gxm_phy_names[] = {
119+static const char * const meson_gxm_phy_names[] = {
120120 "usb2-phy0", "usb2-phy1", "usb2-phy2",
121121 };
122122
123−static const char *meson_g12a_phy_names[] = {
123+static const char * const meson_g12a_phy_names[] = {
124124 "usb2-phy0", "usb2-phy1", "usb3-phy0",
125125 };
126126
127127 /*
128128 * Amlogic A1 has a single physical PHY, in slot 1, but still has the
129129 * two U2 PHY controls register blocks like G12A.
130+ * AXG has the similar scheme, thus needs the same tweak.
130131 * Handling the first PHY on slot 1 would need a large amount of code
131132 * changes, and the current management is generic enough to handle it
132133 * correctly when only the "usb2-phy1" phy is specified on-par with the
133134 * DT bindings.
134135 */
135−static const char *meson_a1_phy_names[] = {
136+static const char * const meson_a1_phy_names[] = {
136137 "usb2-phy0", "usb2-phy1"
137138 };
138139
@@ -143,7 +144,7 @@ struct dwc3_meson_g12a_drvdata { · 4 unmodified lines
143144 bool otg_phy_host_port_disable;
144145 struct clk_bulk_data *clks;
145146 int num_clks;
146− const char **phy_names;
147+ const char * const *phy_names;
147148 int num_phys;
148149 int (*setup_regmaps)(struct dwc3_meson_g12a *priv, void __iomem *base);
149150 int (*usb2_init_phy)(struct dwc3_meson_g12a *priv, int i,
@@ -215,6 +216,19 @@ static struct dwc3_meson_g12a_drvdata gxm_drvdata = { · 65 unmodified lines
215216 .usb_post_init = dwc3_meson_gxl_usb_post_init,
216217 };
217218
219+static struct dwc3_meson_g12a_drvdata axg_drvdata = {
220+ .otg_switch_supported = true,
221+ .clks = meson_gxl_clocks,
222+ .num_clks = ARRAY_SIZE(meson_gxl_clocks),
223+ .phy_names = meson_a1_phy_names,
224+ .num_phys = ARRAY_SIZE(meson_a1_phy_names),
225+ .setup_regmaps = dwc3_meson_gxl_setup_regmaps,
226+ .usb2_init_phy = dwc3_meson_gxl_usb2_init_phy,
227+ .set_phy_mode = dwc3_meson_gxl_set_phy_mode,
228+ .usb_init = dwc3_meson_g12a_usb_init,
229+ .usb_post_init = dwc3_meson_gxl_usb_post_init,
230+};
231+
218232 static struct dwc3_meson_g12a_drvdata g12a_drvdata = {
219233 .otg_switch_supported = true,
220234 .clks = meson_g12a_clocks,
@@ -520,11 +534,7 @@ static int dwc3_meson_g12a_role_set(struct usb_role_switch *sw, · 299 unmodified lines
520534 return 0;
521535
522536 if (priv->drvdata->otg_phy_host_port_disable)
523− dev_warn_once(priv->dev, "Manual OTG switch is broken on this "\
524− "SoC, when manual switching from "\
525− "Host to device, DWC3 controller "\
526− "will need to be resetted in order "\
527− "to recover usage of the Host port");
537+ dev_warn_once(priv->dev, "Broken manual OTG switch\n");
528538
529539 return dwc3_meson_g12a_otg_mode_set(priv, mode);
530540 }
@@ -626,10 +636,7 @@ static int dwc3_meson_gxl_setup_regmaps(struct dwc3_meson_g12a *priv, · 95 unmodified lines
626636 /* GXL controls the PHY mode in the PHY registers unlike G12A */
627637 priv->usb_glue_regmap = devm_regmap_init_mmio(priv->dev, base,
628638 &phy_meson_g12a_usb_glue_regmap_conf);
629− if (IS_ERR(priv->usb_glue_regmap))
630− return PTR_ERR(priv->usb_glue_regmap);
631−
632− return 0;
639+ return PTR_ERR_OR_ZERO(priv->usb_glue_regmap);
633640 }
634641
635642 static int dwc3_meson_g12a_setup_regmaps(struct dwc3_meson_g12a *priv,
@@ -906,8 +913,8 @@ static int __maybe_unused dwc3_meson_g12a_resume(struct device *dev) · 270 unmodified lines
906913 return ret;
907914 }
908915
909− if (priv->vbus && priv->otg_phy_mode == PHY_MODE_USB_HOST) {
910− ret = regulator_enable(priv->vbus);
916+ if (priv->vbus && priv->otg_phy_mode == PHY_MODE_USB_HOST) {
917+ ret = regulator_enable(priv->vbus);
911918 if (ret)
912919 return ret;
913920 }
@@ -930,6 +937,10 @@ static const struct of_device_id dwc3_meson_g12a_match[] = { · 16 unmodified lines
930937 .compatible = "amlogic,meson-gxm-usb-ctrl",
931938 .data = &gxm_drvdata,
932939 },
940+ {
941+ .compatible = "amlogic,meson-axg-usb-ctrl",
942+ .data = &axg_drvdata,
943+ },
933944 {
934945 .compatible = "amlogic,meson-g12a-usb-ctrl",
935946 .data = &g12a_drvdata,
drivers/usb/dwc3/dwc3-of-simple.c+2−0
@@ -176,6 +176,8 @@ static const struct of_device_id of_dwc3_simple_match[] = { · 175 unmodified lines
176176 { .compatible = "cavium,octeon-7130-usb-uctl" },
177177 { .compatible = "sprd,sc9860-dwc3" },
178178 { .compatible = "allwinner,sun50i-h6-dwc3" },
179+ { .compatible = "hisilicon,hi3670-dwc3" },
180+ { .compatible = "intel,keembay-dwc3" },
179181 { /* Sentinel */ }
180182 };
181183 MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
drivers/usb/dwc3/dwc3-pci.c+2−1
@@ -147,7 +147,8 @@ static int dwc3_pci_quirks(struct dwc3_pci *dwc) · 146 unmodified lines
147147
148148 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
149149 if (pdev->device == PCI_DEVICE_ID_INTEL_BXT ||
150− pdev->device == PCI_DEVICE_ID_INTEL_BXT_M) {
150+ pdev->device == PCI_DEVICE_ID_INTEL_BXT_M ||
151+ pdev->device == PCI_DEVICE_ID_INTEL_EHLLP) {
151152 guid_parse(PCI_INTEL_BXT_DSM_GUID, &dwc->guid);
152153 dwc->has_dsm_for_pm = true;
153154 }
drivers/usb/dwc3/dwc3-qcom.c+123−5
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 #include <linux/module.h>
1414 #include <linux/kernel.h>
1515 #include <linux/extcon.h>
16+#include <linux/interconnect.h>
1617 #include <linux/of_platform.h>
1718 #include <linux/platform_device.h>
1819 #include <linux/phy/phy.h>
@@ -43,6 +44,14 @@ · 24 unmodified lines
4344 #define SDM845_QSCRATCH_SIZE 0x400
4445 #define SDM845_DWC3_CORE_SIZE 0xcd00
4546
47+/* Interconnect path bandwidths in MBps */
48+#define USB_MEMORY_AVG_HS_BW MBps_to_icc(240)
49+#define USB_MEMORY_PEAK_HS_BW MBps_to_icc(700)
50+#define USB_MEMORY_AVG_SS_BW MBps_to_icc(1000)
51+#define USB_MEMORY_PEAK_SS_BW MBps_to_icc(2500)
52+#define APPS_USB_AVG_BW 0
53+#define APPS_USB_PEAK_BW MBps_to_icc(40)
54+
4655 struct dwc3_acpi_pdata {
4756 u32 qscratch_base_offset;
4857 u32 qscratch_base_size;
@@ -76,6 +85,8 @@ struct dwc3_qcom { · 27 unmodified lines
7685 enum usb_dr_mode mode;
7786 bool is_suspended;
7887 bool pm_suspended;
88+ struct icc_path *icc_path_ddr;
89+ struct icc_path *icc_path_apps;
7990 };
8091
8192 static inline void dwc3_qcom_setbits(void __iomem *base, u32 offset, u32 val)
@@ -190,6 +201,96 @@ static int dwc3_qcom_register_extcon(struct dwc3_qcom *qcom) · 108 unmodified lines
190201 return 0;
191202 }
192203
204+static int dwc3_qcom_interconnect_enable(struct dwc3_qcom *qcom)
205+{
206+ int ret;
207+
208+ ret = icc_enable(qcom->icc_path_ddr);
209+ if (ret)
210+ return ret;
211+
212+ ret = icc_enable(qcom->icc_path_apps);
213+ if (ret)
214+ icc_disable(qcom->icc_path_ddr);
215+
216+ return ret;
217+}
218+
219+static int dwc3_qcom_interconnect_disable(struct dwc3_qcom *qcom)
220+{
221+ int ret;
222+
223+ ret = icc_disable(qcom->icc_path_ddr);
224+ if (ret)
225+ return ret;
226+
227+ ret = icc_disable(qcom->icc_path_apps);
228+ if (ret)
229+ icc_enable(qcom->icc_path_ddr);
230+
231+ return ret;
232+}
233+
234+/**
235+ * dwc3_qcom_interconnect_init() - Get interconnect path handles
236+ * and set bandwidhth.
237+ * @qcom: Pointer to the concerned usb core.
238+ *
239+ */
240+static int dwc3_qcom_interconnect_init(struct dwc3_qcom *qcom)
241+{
242+ struct device *dev = qcom->dev;
243+ int ret;
244+
245+ qcom->icc_path_ddr = of_icc_get(dev, "usb-ddr");
246+ if (IS_ERR(qcom->icc_path_ddr)) {
247+ dev_err(dev, "failed to get usb-ddr path: %ld\n",
248+ PTR_ERR(qcom->icc_path_ddr));
249+ return PTR_ERR(qcom->icc_path_ddr);
250+ }
251+
252+ qcom->icc_path_apps = of_icc_get(dev, "apps-usb");
253+ if (IS_ERR(qcom->icc_path_apps)) {
254+ dev_err(dev, "failed to get apps-usb path: %ld\n",
255+ PTR_ERR(qcom->icc_path_apps));
256+ return PTR_ERR(qcom->icc_path_apps);
257+ }
258+
259+ if (usb_get_maximum_speed(&qcom->dwc3->dev) >= USB_SPEED_SUPER ||
260+ usb_get_maximum_speed(&qcom->dwc3->dev) == USB_SPEED_UNKNOWN)
261+ ret = icc_set_bw(qcom->icc_path_ddr,
262+ USB_MEMORY_AVG_SS_BW, USB_MEMORY_PEAK_SS_BW);
263+ else
264+ ret = icc_set_bw(qcom->icc_path_ddr,
265+ USB_MEMORY_AVG_HS_BW, USB_MEMORY_PEAK_HS_BW);
266+
267+ if (ret) {
268+ dev_err(dev, "failed to set bandwidth for usb-ddr path: %d\n", ret);
269+ return ret;
270+ }
271+
272+ ret = icc_set_bw(qcom->icc_path_apps,
273+ APPS_USB_AVG_BW, APPS_USB_PEAK_BW);
274+ if (ret) {
275+ dev_err(dev, "failed to set bandwidth for apps-usb path: %d\n", ret);
276+ return ret;
277+ }
278+
279+ return 0;
280+}
281+
282+/**
283+ * dwc3_qcom_interconnect_exit() - Release interconnect path handles
284+ * @qcom: Pointer to the concerned usb core.
285+ *
286+ * This function is used to release interconnect path handle.
287+ */
288+static void dwc3_qcom_interconnect_exit(struct dwc3_qcom *qcom)
289+{
290+ icc_put(qcom->icc_path_ddr);
291+ icc_put(qcom->icc_path_apps);
292+}
293+
193294 static void dwc3_qcom_disable_interrupts(struct dwc3_qcom *qcom)
194295 {
195296 if (qcom->hs_phy_irq) {
@@ -239,7 +340,7 @@ static void dwc3_qcom_enable_interrupts(struct dwc3_qcom *qcom) · 43 unmodified lines
239340 static int dwc3_qcom_suspend(struct dwc3_qcom *qcom)
240341 {
241342 u32 val;
242− int i;
343+ int i, ret;
243344
244345 if (qcom->is_suspended)
245346 return 0;
@@ -251,6 +352,10 @@ static int dwc3_qcom_suspend(struct dwc3_qcom *qcom) · 5 unmodified lines
251352 for (i = qcom->num_clocks - 1; i >= 0; i--)
252353 clk_disable_unprepare(qcom->clks[i]);
253354
355+ ret = dwc3_qcom_interconnect_disable(qcom);
356+ if (ret)
357+ dev_warn(qcom->dev, "failed to disable interconnect: %d\n", ret);
358+
254359 qcom->is_suspended = true;
255360 dwc3_qcom_enable_interrupts(qcom);
256361
@@ -276,6 +381,10 @@ static int dwc3_qcom_resume(struct dwc3_qcom *qcom) · 19 unmodified lines
276381 }
277382 }
278383
384+ ret = dwc3_qcom_interconnect_enable(qcom);
385+ if (ret)
386+ dev_warn(qcom->dev, "failed to enable interconnect: %d\n", ret);
387+
279388 /* Clear existing events from PHY related to L2 in/out */
280389 dwc3_qcom_setbits(qcom->qscratch_base, PWR_EVNT_IRQ_STAT_REG,
281390 PWR_EVNT_LPM_IN_L2_MASK | PWR_EVNT_LPM_OUT_L2_MASK);
@@ -335,7 +444,9 @@ static int dwc3_qcom_setup_irq(struct platform_device *pdev) · 53 unmodified lines
335444 {
336445 struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
337446 const struct dwc3_acpi_pdata *pdata = qcom->acpi_pdata;
338− int irq, ret;
447+ int irq;
448+ int ret;
449+
339450 irq = dwc3_qcom_get_irq(pdev, "hs_phy_irq",
340451 pdata ? pdata->hs_phy_irq_index : -1);
341452 if (irq > 0) {
@@ -454,7 +565,7 @@ static const struct property_entry dwc3_qcom_acpi_properties[] = { · 112 unmodified lines
454565
455566 static int dwc3_qcom_acpi_register_core(struct platform_device *pdev)
456567 {
457− struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
568+ struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
458569 struct device *dev = &pdev->dev;
459570 struct resource *res, *child_res = NULL;
460571 int irq;
@@ -514,7 +625,7 @@ out: · 53 unmodified lines
514625
515626 static int dwc3_qcom_of_register_core(struct platform_device *pdev)
516627 {
517− struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
628+ struct dwc3_qcom *qcom = platform_get_drvdata(pdev);
518629 struct device_node *np = pdev->dev.of_node, *dwc3_np;
519630 struct device *dev = &pdev->dev;
520631 int ret;
@@ -638,6 +749,10 @@ static int dwc3_qcom_probe(struct platform_device *pdev) · 117 unmodified lines
638749 goto depopulate;
639750 }
640751
752+ ret = dwc3_qcom_interconnect_init(qcom);
753+ if (ret)
754+ goto depopulate;
755+
641756 qcom->mode = usb_get_dr_mode(&qcom->dwc3->dev);
642757
643758 /* enable vbus override for device mode */
@@ -647,7 +762,7 @@ static int dwc3_qcom_probe(struct platform_device *pdev) · 3 unmodified lines
647762 /* register extcon to override sw_vbus on Vbus change later */
648763 ret = dwc3_qcom_register_extcon(qcom);
649764 if (ret)
650− goto depopulate;
765+ goto interconnect_exit;
651766
652767 device_init_wakeup(&pdev->dev, 1);
653768 qcom->is_suspended = false;
@@ -657,6 +772,8 @@ static int dwc3_qcom_probe(struct platform_device *pdev) · 3 unmodified lines
657772
658773 return 0;
659774
775+interconnect_exit:
776+ dwc3_qcom_interconnect_exit(qcom);
660777 depopulate:
661778 if (np)
662779 of_platform_depopulate(&pdev->dev);
@@ -687,6 +804,7 @@ static int dwc3_qcom_remove(struct platform_device *pdev) · 24 unmodified lines
687804 }
688805 qcom->num_clocks = 0;
689806
807+ dwc3_qcom_interconnect_exit(qcom);
690808 reset_control_assert(qcom->resets);
691809
692810 pm_runtime_allow(dev);
drivers/usb/dwc3/ep0.c+42−19
@@ -105,7 +105,7 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, · 104 unmodified lines
105105 * IRQ we were waiting for is long gone.
106106 */
107107 if (dep->flags & DWC3_EP_PENDING_REQUEST) {
108− unsigned direction;
108+ unsigned int direction;
109109
110110 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
111111
@@ -127,11 +127,11 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, · 15 unmodified lines
127127 * handle it here.
128128 */
129129 if (dwc->delayed_status) {
130− unsigned direction;
130+ unsigned int direction;
131131
132132 direction = !dwc->ep0_expect_in;
133133 dwc->delayed_status = false;
134− usb_gadget_set_state(&dwc->gadget, USB_STATE_CONFIGURED);
134+ usb_gadget_set_state(dwc->gadget, USB_STATE_CONFIGURED);
135135
136136 if (dwc->ep0state == EP0_STATUS_PHASE)
137137 __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]);
@@ -172,7 +172,7 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep, · 34 unmodified lines
172172 * XferNotReady(STATUS).
173173 */
174174 if (dwc->three_stage_setup) {
175− unsigned direction;
175+ unsigned int direction;
176176
177177 direction = dwc->ep0_expect_in;
178178 dwc->ep0state = EP0_DATA_PHASE;
@@ -197,7 +197,7 @@ int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request, · 18 unmodified lines
197197 int ret;
198198
199199 spin_lock_irqsave(&dwc->lock, flags);
200− if (!dep->endpoint.desc) {
200+ if (!dep->endpoint.desc || !dwc->pullups_connected) {
201201 dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
202202 dep->name);
203203 ret = -ESHUTDOWN;
@@ -325,7 +325,7 @@ static int dwc3_ep0_handle_status(struct dwc3 *dwc, · 121 unmodified lines
325325 /*
326326 * LTM will be set once we know how to set this in HW.
327327 */
328− usb_status |= dwc->gadget.is_selfpowered;
328+ usb_status |= dwc->gadget->is_selfpowered;
329329
330330 if ((dwc->speed == DWC3_DSTS_SUPERSPEED) ||
331331 (dwc->speed == DWC3_DSTS_SUPERSPEED_PLUS)) {
@@ -450,7 +450,7 @@ static int dwc3_ep0_handle_device(struct dwc3 *dwc, · 118 unmodified lines
450450
451451 wValue = le16_to_cpu(ctrl->wValue);
452452 wIndex = le16_to_cpu(ctrl->wIndex);
453− state = dwc->gadget.state;
453+ state = dwc->gadget->state;
454454
455455 switch (wValue) {
456456 case USB_DEVICE_REMOTE_WAKEUP:
@@ -524,6 +524,11 @@ static int dwc3_ep0_handle_endpoint(struct dwc3 *dwc, · 67 unmodified lines
524524 ret = __dwc3_gadget_ep_set_halt(dep, set, true);
525525 if (ret)
526526 return -EINVAL;
527+
528+ /* ClearFeature(Halt) may need delayed status */
529+ if (!set && (dep->flags & DWC3_EP_END_TRANSFER_PENDING))
530+ return USB_GADGET_DELAYED_STATUS;
531+
527532 break;
528533 default:
529534 return -EINVAL;
@@ -559,7 +564,7 @@ static int dwc3_ep0_handle_feature(struct dwc3 *dwc, · 29 unmodified lines
559564
560565 static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
561566 {
562− enum usb_device_state state = dwc->gadget.state;
567+ enum usb_device_state state = dwc->gadget->state;
563568 u32 addr;
564569 u32 reg;
565570
@@ -580,9 +585,9 @@ static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) · 14 unmodified lines
580585 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
581586
582587 if (addr)
583− usb_gadget_set_state(&dwc->gadget, USB_STATE_ADDRESS);
588+ usb_gadget_set_state(dwc->gadget, USB_STATE_ADDRESS);
584589 else
585− usb_gadget_set_state(&dwc->gadget, USB_STATE_DEFAULT);
590+ usb_gadget_set_state(dwc->gadget, USB_STATE_DEFAULT);
586591
587592 return 0;
588593 }
@@ -592,14 +597,14 @@ static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) · 3 unmodified lines
592597 int ret;
593598
594599 spin_unlock(&dwc->lock);
595− ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl);
600+ ret = dwc->gadget_driver->setup(dwc->gadget, ctrl);
596601 spin_lock(&dwc->lock);
597602 return ret;
598603 }
599604
600605 static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
601606 {
602− enum usb_device_state state = dwc->gadget.state;
607+ enum usb_device_state state = dwc->gadget->state;
603608 u32 cfg;
604609 int ret;
605610 u32 reg;
@@ -622,7 +627,7 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) · 16 unmodified lines
622627 * to change the state on the next usb_ep_queue()
623628 */
624629 if (ret == 0)
625− usb_gadget_set_state(&dwc->gadget,
630+ usb_gadget_set_state(dwc->gadget,
626631 USB_STATE_CONFIGURED);
627632
628633 /*
@@ -641,7 +646,7 @@ static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl) · 12 unmodified lines
641646 case USB_STATE_CONFIGURED:
642647 ret = dwc3_ep0_delegate_req(dwc, ctrl);
643648 if (!cfg && !ret)
644− usb_gadget_set_state(&dwc->gadget,
649+ usb_gadget_set_state(dwc->gadget,
645650 USB_STATE_ADDRESS);
646651 break;
647652 default:
@@ -697,7 +702,7 @@ static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req) · 49 unmodified lines
697702 static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
698703 {
699704 struct dwc3_ep *dep;
700− enum usb_device_state state = dwc->gadget.state;
705+ enum usb_device_state state = dwc->gadget->state;
701706 u16 wLength;
702707
703708 if (state == USB_STATE_DEFAULT)
@@ -741,7 +746,7 @@ static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ct · 37 unmodified lines
741746 if (wIndex || wLength)
742747 return -EINVAL;
743748
744− dwc->gadget.isoch_delay = wValue;
749+ dwc->gadget->isoch_delay = wValue;
745750
746751 return 0;
747752 }
@@ -942,12 +947,16 @@ static void dwc3_ep0_xfer_complete(struct dwc3 *dwc, · 194 unmodified lines
942947 static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
943948 struct dwc3_ep *dep, struct dwc3_request *req)
944949 {
950+ unsigned int trb_length = 0;
945951 int ret;
946952
947953 req->direction = !!dep->number;
948954
949955 if (req->request.length == 0) {
950− dwc3_ep0_prepare_one_trb(dep, dwc->ep0_trb_addr, 0,
956+ if (!req->direction)
957+ trb_length = dep->endpoint.maxpacket;
958+
959+ dwc3_ep0_prepare_one_trb(dep, dwc->bounce_addr, trb_length,
951960 DWC3_TRBCTL_CONTROL_DATA, false);
952961 ret = dwc3_ep0_start_trans(dep);
953962 } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket)
@@ -994,9 +1003,12 @@ static void __dwc3_ep0_do_control_data(struct dwc3 *dwc, · 40 unmodified lines
9941003
9951004 req->trb = &dwc->ep0_trb[dep->trb_enqueue - 1];
9961005
1006+ if (!req->direction)
1007+ trb_length = dep->endpoint.maxpacket;
1008+
9971009 /* Now prepare one extra TRB to align transfer size */
9981010 dwc3_ep0_prepare_one_trb(dep, dwc->bounce_addr,
999− 0, DWC3_TRBCTL_CONTROL_DATA,
1011+ trb_length, DWC3_TRBCTL_CONTROL_DATA,
10001012 false);
10011013 ret = dwc3_ep0_start_trans(dep);
10021014 } else {
@@ -1042,6 +1054,17 @@ static void dwc3_ep0_do_control_status(struct dwc3 *dwc, · 39 unmodified lines
10421054 __dwc3_ep0_do_control_status(dwc, dep);
10431055 }
10441056
1057+void dwc3_ep0_send_delayed_status(struct dwc3 *dwc)
1058+{
1059+ unsigned int direction = !dwc->ep0_expect_in;
1060+
1061+ if (dwc->ep0state != EP0_STATUS_PHASE)
1062+ return;
1063+
1064+ dwc->delayed_status = false;
1065+ __dwc3_ep0_do_control_status(dwc, dwc->eps[direction]);
1066+}
1067+
10451068 static void dwc3_ep0_end_control_data(struct dwc3 *dwc, struct dwc3_ep *dep)
10461069 {
10471070 struct dwc3_gadget_ep_cmd_params params;
@@ -1102,7 +1125,7 @@ static void dwc3_ep0_xfernotready(struct dwc3 *dwc, · 54 unmodified lines
11021125 */
11031126 if (!list_empty(&dep->pending_list)) {
11041127 dwc->delayed_status = false;
1105− usb_gadget_set_state(&dwc->gadget,
1128+ usb_gadget_set_state(dwc->gadget,
11061129 USB_STATE_CONFIGURED);
11071130 dwc3_ep0_do_control_status(dwc, event);
11081131 }
drivers/usb/dwc3/gadget.c+351−242
@@ -227,7 +227,8 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, · 226 unmodified lines
227227 * Caller should take care of locking. Issue @cmd with a given @param to @dwc
228228 * and wait for its completion.
229229 */
230−int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned cmd, u32 param)
230+int dwc3_send_gadget_generic_command(struct dwc3 *dwc, unsigned int cmd,
231+ u32 param)
231232 {
232233 u32 timeout = 500;
233234 int status = 0;
@@ -268,7 +269,7 @@ static int __dwc3_gadget_wakeup(struct dwc3 *dwc); · 34 unmodified lines
268269 * Caller should handle locking. This function will issue @cmd with given
269270 * @params to @dep and wait for its completion.
270271 */
271−int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd,
272+int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned int cmd,
272273 struct dwc3_gadget_ep_cmd_params *params)
273274 {
274275 const struct usb_endpoint_descriptor *desc = dep->endpoint.desc;
@@ -290,7 +291,7 @@ int dwc3_send_gadget_ep_cmd(struct dwc3_ep *dep, unsigned cmd, · 15 unmodified lines
290291 *
291292 * DWC_usb3 3.30a and DWC_usb31 1.90a programming guide section 3.2.2
292293 */
293− if (dwc->gadget.speed <= USB_SPEED_HIGH) {
294+ if (dwc->gadget->speed <= USB_SPEED_HIGH) {
294295 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
295296 if (unlikely(reg & DWC3_GUSB2PHYCFG_SUSPHY)) {
296297 saved_config |= DWC3_GUSB2PHYCFG_SUSPHY;
@@ -422,7 +423,7 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep) · 125 unmodified lines
422423 */
423424 if (dep->direction &&
424425 !DWC3_VER_IS_PRIOR(DWC3, 260A) &&
425− (dwc->gadget.speed >= USB_SPEED_SUPER))
426+ (dwc->gadget->speed >= USB_SPEED_SUPER))
426427 cmd |= DWC3_DEPCMD_CLEARPENDIN;
427428
428429 memset(&params, 0, sizeof(params));
@@ -562,8 +563,9 @@ static int dwc3_gadget_set_ep_config(struct dwc3_ep *dep, unsigned int action) · 133 unmodified lines
562563 | DWC3_DEPCFG_MAX_PACKET_SIZE(usb_endpoint_maxp(desc));
563564
564565 /* Burst size is only needed in SuperSpeed mode */
565− if (dwc->gadget.speed >= USB_SPEED_SUPER) {
566+ if (dwc->gadget->speed >= USB_SPEED_SUPER) {
566567 u32 burst = dep->endpoint.maxburst;
568+
567569 params.param0 |= DWC3_DEPCFG_BURST_SIZE(burst - 1);
568570 }
569571
@@ -942,12 +944,13 @@ static u32 dwc3_calc_trbs_left(struct dwc3_ep *dep) · 372 unmodified lines
942944 }
943945
944946 static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb,
945− dma_addr_t dma, unsigned length, unsigned chain, unsigned node,
946− unsigned stream_id, unsigned short_not_ok,
947− unsigned no_interrupt, unsigned is_last)
947+ dma_addr_t dma, unsigned int length, unsigned int chain,
948+ unsigned int node, unsigned int stream_id,
949+ unsigned int short_not_ok, unsigned int no_interrupt,
950+ unsigned int is_last, bool must_interrupt)
948951 {
949952 struct dwc3 *dwc = dep->dwc;
950− struct usb_gadget *gadget = &dwc->gadget;
953+ struct usb_gadget *gadget = dwc->gadget;
951954 enum usb_device_speed speed = gadget->speed;
952955
953956 trb->size = DWC3_TRB_SIZE_LENGTH(length);
@@ -1031,8 +1034,7 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, · 77 unmodified lines
10311034 trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI;
10321035 }
10331036
1034− if ((!no_interrupt && !chain) ||
1035− (dwc3_calc_trbs_left(dep) == 1))
1037+ if ((!no_interrupt && !chain) || must_interrupt)
10361038 trb->ctrl |= DWC3_TRB_CTRL_IOC;
10371039
10381040 if (chain)
@@ -1057,19 +1059,24 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, · 18 unmodified lines
10571059 * @trb_length: buffer size of the TRB
10581060 * @chain: should this TRB be chained to the next?
10591061 * @node: only for isochronous endpoints. First TRB needs different type.
1062+ * @use_bounce_buffer: set to use bounce buffer
1063+ * @must_interrupt: set to interrupt on TRB completion
10601064 */
10611065 static void dwc3_prepare_one_trb(struct dwc3_ep *dep,
10621066 struct dwc3_request *req, unsigned int trb_length,
1063− unsigned chain, unsigned node)
1067+ unsigned int chain, unsigned int node, bool use_bounce_buffer,
1068+ bool must_interrupt)
10641069 {
10651070 struct dwc3_trb *trb;
10661071 dma_addr_t dma;
1067− unsigned stream_id = req->request.stream_id;
1068− unsigned short_not_ok = req->request.short_not_ok;
1069− unsigned no_interrupt = req->request.no_interrupt;
1070− unsigned is_last = req->request.is_last;
1071−
1072− if (req->request.num_sgs > 0)
1072+ unsigned int stream_id = req->request.stream_id;
1073+ unsigned int short_not_ok = req->request.short_not_ok;
1074+ unsigned int no_interrupt = req->request.no_interrupt;
1075+ unsigned int is_last = req->request.is_last;
1076+
1077+ if (use_bounce_buffer)
1078+ dma = dep->dwc->bounce_addr;
1079+ else if (req->request.num_sgs > 0)
10731080 dma = sg_dma_address(req->start_sg);
10741081 else
10751082 dma = req->request.dma;
@@ -1085,10 +1092,63 @@ static void dwc3_prepare_one_trb(struct dwc3_ep *dep, · 9 unmodified lines
10851092 req->num_trbs++;
10861093
10871094 __dwc3_prepare_one_trb(dep, trb, dma, trb_length, chain, node,
1088− stream_id, short_not_ok, no_interrupt, is_last);
1095+ stream_id, short_not_ok, no_interrupt, is_last,
1096+ must_interrupt);
10891097 }
10901098
1091−static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
1099+static bool dwc3_needs_extra_trb(struct dwc3_ep *dep, struct dwc3_request *req)
1100+{
1101+ unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
1102+ unsigned int rem = req->request.length % maxp;
1103+
1104+ if ((req->request.length && req->request.zero && !rem &&
1105+ !usb_endpoint_xfer_isoc(dep->endpoint.desc)) ||
1106+ (!req->direction && rem))
1107+ return true;
1108+
1109+ return false;
1110+}
1111+
1112+/**
1113+ * dwc3_prepare_last_sg - prepare TRBs for the last SG entry
1114+ * @dep: The endpoint that the request belongs to
1115+ * @req: The request to prepare
1116+ * @entry_length: The last SG entry size
1117+ * @node: Indicates whether this is not the first entry (for isoc only)
1118+ *
1119+ * Return the number of TRBs prepared.
1120+ */
1121+static int dwc3_prepare_last_sg(struct dwc3_ep *dep,
1122+ struct dwc3_request *req, unsigned int entry_length,
1123+ unsigned int node)
1124+{
1125+ unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
1126+ unsigned int rem = req->request.length % maxp;
1127+ unsigned int num_trbs = 1;
1128+
1129+ if (dwc3_needs_extra_trb(dep, req))
1130+ num_trbs++;
1131+
1132+ if (dwc3_calc_trbs_left(dep) < num_trbs)
1133+ return 0;
1134+
1135+ req->needs_extra_trb = num_trbs > 1;
1136+
1137+ /* Prepare a normal TRB */
1138+ if (req->direction || req->request.length)
1139+ dwc3_prepare_one_trb(dep, req, entry_length,
1140+ req->needs_extra_trb, node, false, false);
1141+
1142+ /* Prepare extra TRBs for ZLP and MPS OUT transfer alignment */
1143+ if ((!req->direction && !req->request.length) || req->needs_extra_trb)
1144+ dwc3_prepare_one_trb(dep, req,
1145+ req->direction ? 0 : maxp - rem,
1146+ false, 1, true, false);
1147+
1148+ return num_trbs;
1149+}
1150+
1151+static int dwc3_prepare_trbs_sg(struct dwc3_ep *dep,
10921152 struct dwc3_request *req)
10931153 {
10941154 struct scatterlist *sg = req->start_sg;
@@ -1097,6 +1157,8 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 2 unmodified lines
10971157 unsigned int length = req->request.length;
10981158 unsigned int remaining = req->request.num_mapped_sgs
10991159 - req->num_queued_sgs;
1160+ unsigned int num_trbs = req->num_trbs;
1161+ bool needs_extra_trb = dwc3_needs_extra_trb(dep, req);
11001162
11011163 /*
11021164 * If we resume preparing the request, then get the remaining length of
@@ -1106,10 +1168,10 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 3 unmodified lines
11061168 length -= sg_dma_len(s);
11071169
11081170 for_each_sg(sg, s, remaining, i) {
1109− unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
1110− unsigned int rem = length % maxp;
1171+ unsigned int num_trbs_left = dwc3_calc_trbs_left(dep);
11111172 unsigned int trb_length;
1112− unsigned chain = true;
1173+ bool must_interrupt = false;
1174+ bool last_sg = false;
11131175
11141176 trb_length = min_t(unsigned int, length, sg_dma_len(s));
11151177
@@ -1123,59 +1185,28 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 7 unmodified lines
11231185 * mapped sg.
11241186 */
11251187 if ((i == remaining - 1) || !length)
1126− chain = false;
1127−
1128− if (rem && usb_endpoint_dir_out(dep->endpoint.desc) && !chain) {
1129− struct dwc3 *dwc = dep->dwc;
1130− struct dwc3_trb *trb;
1131−
1132− req->needs_extra_trb = true;
1133−
1134− /* prepare normal TRB */
1135− dwc3_prepare_one_trb(dep, req, trb_length, true, i);
1136−
1137− /* Now prepare one extra TRB to align transfer size */
1138− trb = &dep->trb_pool[dep->trb_enqueue];
1139− req->num_trbs++;
1140− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr,
1141− maxp - rem, false, 1,
1142− req->request.stream_id,
1143− req->request.short_not_ok,
1144− req->request.no_interrupt,
1145− req->request.is_last);
1146− } else if (req->request.zero && req->request.length &&
1147− !usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1148− !rem && !chain) {
1149− struct dwc3 *dwc = dep->dwc;
1150− struct dwc3_trb *trb;
1151−
1152− req->needs_extra_trb = true;
1153−
1154− /* Prepare normal TRB */
1155− dwc3_prepare_one_trb(dep, req, trb_length, true, i);
1156−
1157− /* Prepare one extra TRB to handle ZLP */
1158− trb = &dep->trb_pool[dep->trb_enqueue];
1159− req->num_trbs++;
1160− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 0,
1161− !req->direction, 1,
1162− req->request.stream_id,
1163− req->request.short_not_ok,
1164− req->request.no_interrupt,
1165− req->request.is_last);
1166−
1167− /* Prepare one more TRB to handle MPS alignment */
1168− if (!req->direction) {
1169− trb = &dep->trb_pool[dep->trb_enqueue];
1170− req->num_trbs++;
1171− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp,
1172− false, 1, req->request.stream_id,
1173− req->request.short_not_ok,
1174− req->request.no_interrupt,
1175− req->request.is_last);
1176− }
1188+ last_sg = true;
1189+
1190+ if (!num_trbs_left)
1191+ break;
1192+
1193+ if (last_sg) {
1194+ if (!dwc3_prepare_last_sg(dep, req, trb_length, i))
1195+ break;
11771196 } else {
1178− dwc3_prepare_one_trb(dep, req, trb_length, chain, i);
1197+ /*
1198+ * Look ahead to check if we have enough TRBs for the
1199+ * next SG entry. If not, set interrupt on this TRB to
1200+ * resume preparing the next SG entry when more TRBs are
1201+ * free.
1202+ */
1203+ if (num_trbs_left == 1 || (needs_extra_trb &&
1204+ num_trbs_left <= 2 &&
1205+ sg_dma_len(sg_next(s)) >= length))
1206+ must_interrupt = true;
1207+
1208+ dwc3_prepare_one_trb(dep, req, trb_length, 1, i, false,
1209+ must_interrupt);
11791210 }
11801211
11811212 /*
@@ -1185,7 +1216,7 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 3 unmodified lines
11851216 * we have free trbs we can continue queuing from where we
11861217 * previously stopped
11871218 */
1188− if (chain)
1219+ if (!last_sg)
11891220 req->start_sg = sg_next(s);
11901221
11911222 req->num_queued_sgs++;
@@ -1200,68 +1231,17 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep, · 8 unmodified lines
12001231 break;
12011232 }
12021233
1203− if (!dwc3_calc_trbs_left(dep))
1234+ if (must_interrupt)
12041235 break;
12051236 }
1237+
1238+ return req->num_trbs - num_trbs;
12061239 }
12071240
1208−static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
1241+static int dwc3_prepare_trbs_linear(struct dwc3_ep *dep,
12091242 struct dwc3_request *req)
12101243 {
1211− unsigned int length = req->request.length;
1212− unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
1213− unsigned int rem = length % maxp;
1214−
1215− if ((!length || rem) && usb_endpoint_dir_out(dep->endpoint.desc)) {
1216− struct dwc3 *dwc = dep->dwc;
1217− struct dwc3_trb *trb;
1218−
1219− req->needs_extra_trb = true;
1220−
1221− /* prepare normal TRB */
1222− dwc3_prepare_one_trb(dep, req, length, true, 0);
1223−
1224− /* Now prepare one extra TRB to align transfer size */
1225− trb = &dep->trb_pool[dep->trb_enqueue];
1226− req->num_trbs++;
1227− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp - rem,
1228− false, 1, req->request.stream_id,
1229− req->request.short_not_ok,
1230− req->request.no_interrupt,
1231− req->request.is_last);
1232− } else if (req->request.zero && req->request.length &&
1233− !usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
1234− (IS_ALIGNED(req->request.length, maxp))) {
1235− struct dwc3 *dwc = dep->dwc;
1236− struct dwc3_trb *trb;
1237−
1238− req->needs_extra_trb = true;
1239−
1240− /* prepare normal TRB */
1241− dwc3_prepare_one_trb(dep, req, length, true, 0);
1242−
1243− /* Prepare one extra TRB to handle ZLP */
1244− trb = &dep->trb_pool[dep->trb_enqueue];
1245− req->num_trbs++;
1246− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 0,
1247− !req->direction, 1, req->request.stream_id,
1248− req->request.short_not_ok,
1249− req->request.no_interrupt,
1250− req->request.is_last);
1251−
1252− /* Prepare one more TRB to handle MPS alignment for OUT */
1253− if (!req->direction) {
1254− trb = &dep->trb_pool[dep->trb_enqueue];
1255− req->num_trbs++;
1256− __dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp,
1257− false, 1, req->request.stream_id,
1258− req->request.short_not_ok,
1259− req->request.no_interrupt,
1260− req->request.is_last);
1261− }
1262− } else {
1263− dwc3_prepare_one_trb(dep, req, length, false, 0);
1264− }
1244+ return dwc3_prepare_last_sg(dep, req, req->request.length, 0);
12651245 }
12661246
12671247 /*
@@ -1271,10 +1251,13 @@ static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep, · 3 unmodified lines
12711251 * The function goes through the requests list and sets up TRBs for the
12721252 * transfers. The function returns once there are no more TRBs available or
12731253 * it runs out of requests.
1254+ *
1255+ * Returns the number of TRBs prepared or negative errno.
12741256 */
1275−static void dwc3_prepare_trbs(struct dwc3_ep *dep)
1257+static int dwc3_prepare_trbs(struct dwc3_ep *dep)
12761258 {
12771259 struct dwc3_request *req, *n;
1260+ int ret = 0;
12781261
12791262 BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM);
12801263
@@ -1289,11 +1272,14 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) · 8 unmodified lines
12891272 * break things.
12901273 */
12911274 list_for_each_entry(req, &dep->started_list, list) {
1292− if (req->num_pending_sgs > 0)
1293− dwc3_prepare_one_trb_sg(dep, req);
1275+ if (req->num_pending_sgs > 0) {
1276+ ret = dwc3_prepare_trbs_sg(dep, req);
1277+ if (!ret || req->num_pending_sgs)
1278+ return ret;
1279+ }
12941280
12951281 if (!dwc3_calc_trbs_left(dep))
1296− return;
1282+ return ret;
12971283
12981284 /*
12991285 * Don't prepare beyond a transfer. In DWC_usb32, its transfer
@@ -1301,30 +1287,32 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) · 1 unmodified line
13011287 * active transfer instead of stopping.
13021288 */
13031289 if (dep->stream_capable && req->request.is_last)
1304− return;
1290+ return ret;
13051291 }
13061292
13071293 list_for_each_entry_safe(req, n, &dep->pending_list, list) {
13081294 struct dwc3 *dwc = dep->dwc;
1309− int ret;
13101295
13111296 ret = usb_gadget_map_request_by_dev(dwc->sysdev, &req->request,
13121297 dep->direction);
13131298 if (ret)
1314− return;
1299+ return ret;
13151300
13161301 req->sg = req->request.sg;
13171302 req->start_sg = req->sg;
13181303 req->num_queued_sgs = 0;
13191304 req->num_pending_sgs = req->request.num_mapped_sgs;
13201305
1321− if (req->num_pending_sgs > 0)
1322− dwc3_prepare_one_trb_sg(dep, req);
1323− else
1324− dwc3_prepare_one_trb_linear(dep, req);
1306+ if (req->num_pending_sgs > 0) {
1307+ ret = dwc3_prepare_trbs_sg(dep, req);
1308+ if (req->num_pending_sgs)
1309+ return ret;
1310+ } else {
1311+ ret = dwc3_prepare_trbs_linear(dep, req);
1312+ }
13251313
1326− if (!dwc3_calc_trbs_left(dep))
1327− return;
1314+ if (!ret || !dwc3_calc_trbs_left(dep))
1315+ return ret;
13281316
13291317 /*
13301318 * Don't prepare beyond a transfer. In DWC_usb32, its transfer
@@ -1332,8 +1320,10 @@ static void dwc3_prepare_trbs(struct dwc3_ep *dep) · 1 unmodified line
13321320 * active transfer instead of stopping.
13331321 */
13341322 if (dep->stream_capable && req->request.is_last)
1335− return;
1323+ return ret;
13361324 }
1325+
1326+ return ret;
13371327 }
13381328
13391329 static void dwc3_gadget_ep_cleanup_cancelled_requests(struct dwc3_ep *dep);
@@ -1346,12 +1336,24 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep) · 6 unmodified lines
13461336 int ret;
13471337 u32 cmd;
13481338
1349− if (!dwc3_calc_trbs_left(dep))
1350− return 0;
1339+ /*
1340+ * Note that it's normal to have no new TRBs prepared (i.e. ret == 0).
1341+ * This happens when we need to stop and restart a transfer such as in
1342+ * the case of reinitiating a stream or retrying an isoc transfer.
1343+ */
1344+ ret = dwc3_prepare_trbs(dep);
1345+ if (ret < 0)
1346+ return ret;
13511347
13521348 starting = !(dep->flags & DWC3_EP_TRANSFER_STARTED);
13531349
1354− dwc3_prepare_trbs(dep);
1350+ /*
1351+ * If there's no new TRB prepared and we don't need to restart a
1352+ * transfer, there's no need to update the transfer.
1353+ */
1354+ if (!ret && !starting)
1355+ return ret;
1356+
13551357 req = next_request(&dep->started_list);
13561358 if (!req) {
13571359 dep->flags |= DWC3_EP_PENDING_REQUEST;
@@ -1539,12 +1541,12 @@ static int __dwc3_gadget_start_isoc(struct dwc3_ep *dep) · 181 unmodified lines
15391541 if (!dwc->dis_start_transfer_quirk &&
15401542 (DWC3_VER_IS_PRIOR(DWC31, 170A) ||
15411543 DWC3_VER_TYPE_IS_WITHIN(DWC31, 170A, EA01, EA06))) {
1542− if (dwc->gadget.speed <= USB_SPEED_HIGH && dep->direction)
1544+ if (dwc->gadget->speed <= USB_SPEED_HIGH && dep->direction)
15431545 return dwc3_gadget_start_isoc_quirk(dep);
15441546 }
15451547
15461548 if (desc->bInterval <= 14 &&
1547− dwc->gadget.speed >= USB_SPEED_HIGH) {
1549+ dwc->gadget->speed >= USB_SPEED_HIGH) {
15481550 u32 frame = __dwc3_gadget_get_frame(dwc);
15491551 bool rollover = frame <
15501552 (dep->frame_number & DWC3_FRNUMBER_MASK);
@@ -1600,7 +1602,7 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) · 49 unmodified lines
16001602 {
16011603 struct dwc3 *dwc = dep->dwc;
16021604
1603− if (!dep->endpoint.desc) {
1605+ if (!dep->endpoint.desc || !dwc->pullups_connected) {
16041606 dev_err(dwc->dev, "%s: can't queue to disabled endpoint\n",
16051607 dep->name);
16061608 return -ESHUTDOWN;
@@ -1628,8 +1630,13 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) · 21 unmodified lines
16281630 if (dep->flags & DWC3_EP_WAIT_TRANSFER_COMPLETE)
16291631 return 0;
16301632
1631− /* Start the transfer only after the END_TRANSFER is completed */
1632− if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) {
1633+ /*
1634+ * Start the transfer only after the END_TRANSFER is completed
1635+ * and endpoint STALL is cleared.
1636+ */
1637+ if ((dep->flags & DWC3_EP_END_TRANSFER_PENDING) ||
1638+ (dep->flags & DWC3_EP_WEDGE) ||
1639+ (dep->flags & DWC3_EP_STALL)) {
16331640 dep->flags |= DWC3_EP_DELAY_START;
16341641 return 0;
16351642 }
@@ -1648,9 +1655,8 @@ static int __dwc3_gadget_ep_queue(struct dwc3_ep *dep, struct dwc3_request *req) · 12 unmodified lines
16481655 return 0;
16491656
16501657 if ((dep->flags & DWC3_EP_PENDING_REQUEST)) {
1651− if (!(dep->flags & DWC3_EP_TRANSFER_STARTED)) {
1658+ if (!(dep->flags & DWC3_EP_TRANSFER_STARTED))
16521659 return __dwc3_gadget_start_isoc(dep);
1653− }
16541660 }
16551661 }
16561662
@@ -1788,8 +1794,8 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol) · 131 unmodified lines
17881794 if (value) {
17891795 struct dwc3_trb *trb;
17901796
1791− unsigned transfer_in_flight;
1792− unsigned started;
1797+ unsigned int transfer_in_flight;
1798+ unsigned int started;
17931799
17941800 if (dep->number > 1)
17951801 trb = dwc3_ep_prev_trb(dep, dep->trb_enqueue);
@@ -1822,6 +1828,18 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol) · 26 unmodified lines
18221828 return 0;
18231829 }
18241830
1831+ dwc3_stop_active_transfer(dep, true, true);
1832+
1833+ list_for_each_entry_safe(req, tmp, &dep->started_list, list)
1834+ dwc3_gadget_move_cancelled_request(req);
1835+
1836+ if (dep->flags & DWC3_EP_END_TRANSFER_PENDING) {
1837+ dep->flags |= DWC3_EP_PENDING_CLEAR_STALL;
1838+ return 0;
1839+ }
1840+
1841+ dwc3_gadget_ep_cleanup_cancelled_requests(dep);
1842+
18251843 ret = dwc3_send_clear_stall_ep_cmd(dep);
18261844 if (ret) {
18271845 dev_err(dwc->dev, "failed to clear STALL on %s\n",
@@ -1831,18 +1849,11 @@ int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol) · 3 unmodified lines
18311849
18321850 dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
18331851
1834− dwc3_stop_active_transfer(dep, true, true);
1835−
1836− list_for_each_entry_safe(req, tmp, &dep->started_list, list)
1837− dwc3_gadget_move_cancelled_request(req);
1838−
1839− list_for_each_entry_safe(req, tmp, &dep->pending_list, list)
1840− dwc3_gadget_move_cancelled_request(req);
1852+ if ((dep->flags & DWC3_EP_DELAY_START) &&
1853+ !usb_endpoint_xfer_isoc(dep->endpoint.desc))
1854+ __dwc3_gadget_kick_transfer(dep);
18411855
1842− if (!(dep->flags & DWC3_EP_END_TRANSFER_PENDING)) {
1843− dep->flags &= ~DWC3_EP_DELAY_START;
1844− dwc3_gadget_ep_cleanup_cancelled_requests(dep);
1845− }
1856+ dep->flags &= ~DWC3_EP_DELAY_START;
18461857 }
18471858
18481859 return ret;
@@ -2010,6 +2021,21 @@ static int dwc3_gadget_set_selfpowered(struct usb_gadget *g, · 161 unmodified lines
20102021 return 0;
20112022 }
20122023
2024+static void dwc3_stop_active_transfers(struct dwc3 *dwc)
2025+{
2026+ u32 epnum;
2027+
2028+ for (epnum = 2; epnum < dwc->num_eps; epnum++) {
2029+ struct dwc3_ep *dep;
2030+
2031+ dep = dwc->eps[epnum];
2032+ if (!dep)
2033+ continue;
2034+
2035+ dwc3_remove_requests(dwc, dep);
2036+ }
2037+}
2038+
20132039 static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend)
20142040 {
20152041 u32 reg;
@@ -2055,6 +2081,9 @@ static int dwc3_gadget_run_stop(struct dwc3 *dwc, int is_on, int suspend) · 39 unmodified lines
20552081 return 0;
20562082 }
20572083
2084+static void dwc3_gadget_disable_irq(struct dwc3 *dwc);
2085+static void __dwc3_gadget_stop(struct dwc3 *dwc);
2086+
20582087 static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on)
20592088 {
20602089 struct dwc3 *dwc = gadget_to_dwc(g);
@@ -2078,7 +2107,46 @@ static int dwc3_gadget_pullup(struct usb_gadget *g, int is_on) · 17 unmodified lines
20782107 }
20792108 }
20802109
2110+ /*
2111+ * Synchronize any pending event handling before executing the controller
2112+ * halt routine.
2113+ */
2114+ if (!is_on) {
2115+ dwc3_gadget_disable_irq(dwc);
2116+ synchronize_irq(dwc->irq_gadget);
2117+ }
2118+
20812119 spin_lock_irqsave(&dwc->lock, flags);
2120+
2121+ if (!is_on) {
2122+ u32 count;
2123+
2124+ /*
2125+ * In the Synopsis DesignWare Cores USB3 Databook Rev. 3.30a
2126+ * Section 4.1.8 Table 4-7, it states that for a device-initiated
2127+ * disconnect, the SW needs to ensure that it sends "a DEPENDXFER
2128+ * command for any active transfers" before clearing the RunStop
2129+ * bit.
2130+ */
2131+ dwc3_stop_active_transfers(dwc);
2132+ __dwc3_gadget_stop(dwc);
2133+
2134+ /*
2135+ * In the Synopsis DesignWare Cores USB3 Databook Rev. 3.30a
2136+ * Section 1.3.4, it mentions that for the DEVCTRLHLT bit, the
2137+ * "software needs to acknowledge the events that are generated
2138+ * (by writing to GEVNTCOUNTn) while it is waiting for this bit
2139+ * to be set to '1'."
2140+ */
2141+ count = dwc3_readl(dwc->regs, DWC3_GEVNTCOUNT(0));
2142+ count &= DWC3_GEVNTCOUNT_MASK;
2143+ if (count > 0) {
2144+ dwc3_writel(dwc->regs, DWC3_GEVNTCOUNT(0), count);
2145+ dwc->ev_buf->lpos = (dwc->ev_buf->lpos + count) %
2146+ dwc->ev_buf->length;
2147+ }
2148+ }
2149+
20822150 ret = dwc3_gadget_run_stop(dwc, is_on, false);
20832151 spin_unlock_irqrestore(&dwc->lock, flags);
20842152
@@ -2244,7 +2312,7 @@ static int dwc3_gadget_start(struct usb_gadget *g, · 159 unmodified lines
22442312 spin_lock_irqsave(&dwc->lock, flags);
22452313 if (dwc->gadget_driver) {
22462314 dev_err(dwc->dev, "%s is already bound to %s\n",
2247− dwc->gadget.name,
2315+ dwc->gadget->name,
22482316 dwc->gadget_driver->driver.name);
22492317 ret = -EBUSY;
22502318 goto err1;
@@ -2416,7 +2484,7 @@ static int dwc3_gadget_init_control_endpoint(struct dwc3_ep *dep) · 165 unmodified lines
24162484 dep->endpoint.maxburst = 1;
24172485 dep->endpoint.ops = &dwc3_gadget_ep0_ops;
24182486 if (!dep->direction)
2419− dwc->gadget.ep0 = &dep->endpoint;
2487+ dwc->gadget->ep0 = &dep->endpoint;
24202488
24212489 dep->endpoint.caps.type_control = true;
24222490
@@ -2459,10 +2527,10 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep) · 36 unmodified lines
24592527
24602528 usb_ep_set_maxpacket_limit(&dep->endpoint, size);
24612529
2462− dep->endpoint.max_streams = 15;
2530+ dep->endpoint.max_streams = 16;
24632531 dep->endpoint.ops = &dwc3_gadget_ep_ops;
24642532 list_add_tail(&dep->endpoint.ep_list,
2465− &dwc->gadget.ep_list);
2533+ &dwc->gadget->ep_list);
24662534 dep->endpoint.caps.type_iso = true;
24672535 dep->endpoint.caps.type_bulk = true;
24682536 dep->endpoint.caps.type_int = true;
@@ -2508,10 +2576,10 @@ static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep) · 39 unmodified lines
25082576 size /= 3;
25092577
25102578 usb_ep_set_maxpacket_limit(&dep->endpoint, size);
2511− dep->endpoint.max_streams = 15;
2579+ dep->endpoint.max_streams = 16;
25122580 dep->endpoint.ops = &dwc3_gadget_ep_ops;
25132581 list_add_tail(&dep->endpoint.ep_list,
2514− &dwc->gadget.ep_list);
2582+ &dwc->gadget->ep_list);
25152583 dep->endpoint.caps.type_iso = true;
25162584 dep->endpoint.caps.type_bulk = true;
25172585 dep->endpoint.caps.type_int = true;
@@ -2572,7 +2640,7 @@ static int dwc3_gadget_init_endpoints(struct dwc3 *dwc, u8 total) · 54 unmodified lines
25722640 {
25732641 u8 epnum;
25742642
2575− INIT_LIST_HEAD(&dwc->gadget.ep_list);
2643+ INIT_LIST_HEAD(&dwc->gadget->ep_list);
25762644
25772645 for (epnum = 0; epnum < total; epnum++) {
25782646 int ret;
@@ -2652,12 +2720,12 @@ static int dwc3_gadget_ep_reclaim_completed_trb(struct dwc3_ep *dep, · 73 unmodified lines
26522720 }
26532721
26542722 /*
2655− * If we're dealing with unaligned size OUT transfer, we will be left
2656− * with one TRB pending in the ring. We need to manually clear HWO bit
2657− * from that TRB.
2723+ * We use bounce buffer for requests that needs extra TRB or OUT ZLP. If
2724+ * this TRB points to the bounce buffer address, it's a MPS alignment
2725+ * TRB. Don't add it to req->remaining calculation.
26582726 */
2659−
2660− if (req->needs_extra_trb && !(trb->ctrl & DWC3_TRB_CTRL_CHN)) {
2727+ if (trb->bpl == lower_32_bits(dep->dwc->bounce_addr) &&
2728+ trb->bph == upper_32_bits(dep->dwc->bounce_addr)) {
26612729 trb->ctrl &= ~DWC3_TRB_CTRL_HWO;
26622730 return 1;
26632731 }
@@ -2732,26 +2800,17 @@ static int dwc3_gadget_ep_cleanup_completed_request(struct dwc3_ep *dep, · 68 unmodified lines
27322800 ret = dwc3_gadget_ep_reclaim_trb_linear(dep, req, event,
27332801 status);
27342802
2735− if (req->needs_extra_trb) {
2736− unsigned int maxp = usb_endpoint_maxp(dep->endpoint.desc);
2803+ req->request.actual = req->request.length - req->remaining;
2804+
2805+ if (!dwc3_gadget_ep_request_completed(req))
2806+ goto out;
27372807
2808+ if (req->needs_extra_trb) {
27382809 ret = dwc3_gadget_ep_reclaim_trb_linear(dep, req, event,
27392810 status);
2740−
2741− /* Reclaim MPS padding TRB for ZLP */
2742− if (!req->direction && req->request.zero && req->request.length &&
2743− !usb_endpoint_xfer_isoc(dep->endpoint.desc) &&
2744− (IS_ALIGNED(req->request.length, maxp)))
2745− ret = dwc3_gadget_ep_reclaim_trb_linear(dep, req, event, status);
2746−
27472811 req->needs_extra_trb = false;
27482812 }
27492813
2750− req->request.actual = req->request.length - req->remaining;
2751−
2752− if (!dwc3_gadget_ep_request_completed(req))
2753− goto out;
2754−
27552814 dwc3_gadget_giveback(dep, req, status);
27562815
27572816 out:
@@ -2896,6 +2955,43 @@ static void dwc3_gadget_endpoint_transfer_not_ready(struct dwc3_ep *dep, · 138 unmodified lines
28962955 (void) __dwc3_gadget_start_isoc(dep);
28972956 }
28982957
2958+static void dwc3_gadget_endpoint_command_complete(struct dwc3_ep *dep,
2959+ const struct dwc3_event_depevt *event)
2960+{
2961+ u8 cmd = DEPEVT_PARAMETER_CMD(event->parameters);
2962+
2963+ if (cmd != DWC3_DEPCMD_ENDTRANSFER)
2964+ return;
2965+
2966+ dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING;
2967+ dep->flags &= ~DWC3_EP_TRANSFER_STARTED;
2968+ dwc3_gadget_ep_cleanup_cancelled_requests(dep);
2969+
2970+ if (dep->flags & DWC3_EP_PENDING_CLEAR_STALL) {
2971+ struct dwc3 *dwc = dep->dwc;
2972+
2973+ dep->flags &= ~DWC3_EP_PENDING_CLEAR_STALL;
2974+ if (dwc3_send_clear_stall_ep_cmd(dep)) {
2975+ struct usb_ep *ep0 = &dwc->eps[0]->endpoint;
2976+
2977+ dev_err(dwc->dev, "failed to clear STALL on %s\n", dep->name);
2978+ if (dwc->delayed_status)
2979+ __dwc3_gadget_ep0_set_halt(ep0, 1);
2980+ return;
2981+ }
2982+
2983+ dep->flags &= ~(DWC3_EP_STALL | DWC3_EP_WEDGE);
2984+ if (dwc->delayed_status)
2985+ dwc3_ep0_send_delayed_status(dwc);
2986+ }
2987+
2988+ if ((dep->flags & DWC3_EP_DELAY_START) &&
2989+ !usb_endpoint_xfer_isoc(dep->endpoint.desc))
2990+ __dwc3_gadget_kick_transfer(dep);
2991+
2992+ dep->flags &= ~DWC3_EP_DELAY_START;
2993+}
2994+
28992995 static void dwc3_gadget_endpoint_stream_event(struct dwc3_ep *dep,
29002996 const struct dwc3_event_depevt *event)
29012997 {
@@ -2965,7 +3061,6 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, · 63 unmodified lines
29653061 {
29663062 struct dwc3_ep *dep;
29673063 u8 epnum = event->endpoint_number;
2968− u8 cmd;
29693064
29703065 dep = dwc->eps[epnum];
29713066
@@ -2991,18 +3086,7 @@ static void dwc3_endpoint_interrupt(struct dwc3 *dwc, · 19 unmodified lines
29913086 dwc3_gadget_endpoint_transfer_not_ready(dep, event);
29923087 break;
29933088 case DWC3_DEPEVT_EPCMDCMPLT:
2994− cmd = DEPEVT_PARAMETER_CMD(event->parameters);
2995−
2996− if (cmd == DWC3_DEPCMD_ENDTRANSFER) {
2997− dep->flags &= ~DWC3_EP_END_TRANSFER_PENDING;
2998− dep->flags &= ~DWC3_EP_TRANSFER_STARTED;
2999− dwc3_gadget_ep_cleanup_cancelled_requests(dep);
3000− if ((dep->flags & DWC3_EP_DELAY_START) &&
3001− !usb_endpoint_xfer_isoc(dep->endpoint.desc))
3002− __dwc3_gadget_kick_transfer(dep);
3003−
3004− dep->flags &= ~DWC3_EP_DELAY_START;
3005− }
3089+ dwc3_gadget_endpoint_command_complete(dep, event);
30063090 break;
30073091 case DWC3_DEPEVT_XFERCOMPLETE:
30083092 dwc3_gadget_endpoint_transfer_complete(dep, event);
@@ -3019,7 +3103,7 @@ static void dwc3_disconnect_gadget(struct dwc3 *dwc) · 10 unmodified lines
30193103 {
30203104 if (dwc->gadget_driver && dwc->gadget_driver->disconnect) {
30213105 spin_unlock(&dwc->lock);
3022− dwc->gadget_driver->disconnect(&dwc->gadget);
3106+ dwc->gadget_driver->disconnect(dwc->gadget);
30233107 spin_lock(&dwc->lock);
30243108 }
30253109 }
@@ -3028,7 +3112,7 @@ static void dwc3_suspend_gadget(struct dwc3 *dwc) · 2 unmodified lines
30283112 {
30293113 if (dwc->gadget_driver && dwc->gadget_driver->suspend) {
30303114 spin_unlock(&dwc->lock);
3031− dwc->gadget_driver->suspend(&dwc->gadget);
3115+ dwc->gadget_driver->suspend(dwc->gadget);
30323116 spin_lock(&dwc->lock);
30333117 }
30343118 }
@@ -3037,7 +3121,7 @@ static void dwc3_resume_gadget(struct dwc3 *dwc) · 2 unmodified lines
30373121 {
30383122 if (dwc->gadget_driver && dwc->gadget_driver->resume) {
30393123 spin_unlock(&dwc->lock);
3040− dwc->gadget_driver->resume(&dwc->gadget);
3124+ dwc->gadget_driver->resume(dwc->gadget);
30413125 spin_lock(&dwc->lock);
30423126 }
30433127 }
@@ -3047,9 +3131,9 @@ static void dwc3_reset_gadget(struct dwc3 *dwc) · 3 unmodified lines
30473131 if (!dwc->gadget_driver)
30483132 return;
30493133
3050− if (dwc->gadget.speed != USB_SPEED_UNKNOWN) {
3134+ if (dwc->gadget->speed != USB_SPEED_UNKNOWN) {
30513135 spin_unlock(&dwc->lock);
3052− usb_gadget_udc_reset(&dwc->gadget, dwc->gadget_driver);
3136+ usb_gadget_udc_reset(dwc->gadget, dwc->gadget_driver);
30533137 spin_lock(&dwc->lock);
30543138 }
30553139 }
@@ -3150,9 +3234,9 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc) · 94 unmodified lines
31503234
31513235 dwc3_disconnect_gadget(dwc);
31523236
3153− dwc->gadget.speed = USB_SPEED_UNKNOWN;
3237+ dwc->gadget->speed = USB_SPEED_UNKNOWN;
31543238 dwc->setup_packet_pending = false;
3155− usb_gadget_set_state(&dwc->gadget, USB_STATE_NOTATTACHED);
3239+ usb_gadget_set_state(dwc->gadget, USB_STATE_NOTATTACHED);
31563240
31573241 dwc->connected = false;
31583242 }
@@ -3195,6 +3279,13 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) · 36 unmodified lines
31953279 }
31963280
31973281 dwc3_reset_gadget(dwc);
3282+ /*
3283+ * In the Synopsis DesignWare Cores USB3 Databook Rev. 3.30a
3284+ * Section 4.1.2 Table 4-2, it states that during a USB reset, the SW
3285+ * needs to ensure that it sends "a DEPENDXFER command for any active
3286+ * transfers."
3287+ */
3288+ dwc3_stop_active_transfers(dwc);
31983289
31993290 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
32003291 reg &= ~DWC3_DCTL_TSTCTRL_MASK;
@@ -3231,8 +3322,8 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) · 30 unmodified lines
32313322 switch (speed) {
32323323 case DWC3_DSTS_SUPERSPEED_PLUS:
32333324 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
3234− dwc->gadget.ep0->maxpacket = 512;
3235− dwc->gadget.speed = USB_SPEED_SUPER_PLUS;
3325+ dwc->gadget->ep0->maxpacket = 512;
3326+ dwc->gadget->speed = USB_SPEED_SUPER_PLUS;
32363327 break;
32373328 case DWC3_DSTS_SUPERSPEED:
32383329 /*
@@ -3252,27 +3343,27 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) · 13 unmodified lines
32523343 dwc3_gadget_reset_interrupt(dwc);
32533344
32543345 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512);
3255− dwc->gadget.ep0->maxpacket = 512;
3256− dwc->gadget.speed = USB_SPEED_SUPER;
3346+ dwc->gadget->ep0->maxpacket = 512;
3347+ dwc->gadget->speed = USB_SPEED_SUPER;
32573348 break;
32583349 case DWC3_DSTS_HIGHSPEED:
32593350 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
3260− dwc->gadget.ep0->maxpacket = 64;
3261− dwc->gadget.speed = USB_SPEED_HIGH;
3351+ dwc->gadget->ep0->maxpacket = 64;
3352+ dwc->gadget->speed = USB_SPEED_HIGH;
32623353 break;
32633354 case DWC3_DSTS_FULLSPEED:
32643355 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(64);
3265− dwc->gadget.ep0->maxpacket = 64;
3266− dwc->gadget.speed = USB_SPEED_FULL;
3356+ dwc->gadget->ep0->maxpacket = 64;
3357+ dwc->gadget->speed = USB_SPEED_FULL;
32673358 break;
32683359 case DWC3_DSTS_LOWSPEED:
32693360 dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(8);
3270− dwc->gadget.ep0->maxpacket = 8;
3271− dwc->gadget.speed = USB_SPEED_LOW;
3361+ dwc->gadget->ep0->maxpacket = 8;
3362+ dwc->gadget->speed = USB_SPEED_LOW;
32723363 break;
32733364 }
32743365
3275− dwc->eps[1]->endpoint.maxpacket = dwc->gadget.ep0->maxpacket;
3366+ dwc->eps[1]->endpoint.maxpacket = dwc->gadget->ep0->maxpacket;
32763367
32773368 /* Enable USB2 LPM Capability */
32783369
@@ -3340,7 +3431,7 @@ static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc) · 61 unmodified lines
33403431
33413432 if (dwc->gadget_driver && dwc->gadget_driver->resume) {
33423433 spin_unlock(&dwc->lock);
3343− dwc->gadget_driver->resume(&dwc->gadget);
3434+ dwc->gadget_driver->resume(dwc->gadget);
33443435 spin_lock(&dwc->lock);
33453436 }
33463437 }
@@ -3511,7 +3602,7 @@ static void dwc3_gadget_interrupt(struct dwc3 *dwc, · 164 unmodified lines
35113602 * Ignore suspend event until the gadget enters into
35123603 * USB_STATE_CONFIGURED state.
35133604 */
3514− if (dwc->gadget.state >= USB_STATE_CONFIGURED)
3605+ if (dwc->gadget->state >= USB_STATE_CONFIGURED)
35153606 dwc3_gadget_suspend_interrupt(dwc,
35163607 event->event_info);
35173608 }
@@ -3686,6 +3777,13 @@ out: · 168 unmodified lines
36863777 return irq;
36873778 }
36883779
3780+static void dwc_gadget_release(struct device *dev)
3781+{
3782+ struct usb_gadget *gadget = container_of(dev, struct usb_gadget, dev);
3783+
3784+ kfree(gadget);
3785+}
3786+
36893787 /**
36903788 * dwc3_gadget_init - initializes gadget related registers
36913789 * @dwc: pointer to our controller context structure
@@ -3696,6 +3794,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) · 4 unmodified lines
36963794 {
36973795 int ret;
36983796 int irq;
3797+ struct device *dev;
36993798
37003799 irq = dwc3_gadget_get_irq(dwc);
37013800 if (irq < 0) {
@@ -3728,12 +3827,21 @@ int dwc3_gadget_init(struct dwc3 *dwc) · 26 unmodified lines
37283827 }
37293828
37303829 init_completion(&dwc->ep0_in_setup);
3830+ dwc->gadget = kzalloc(sizeof(struct usb_gadget), GFP_KERNEL);
3831+ if (!dwc->gadget) {
3832+ ret = -ENOMEM;
3833+ goto err3;
3834+ }
37313835
3732− dwc->gadget.ops = &dwc3_gadget_ops;
3733− dwc->gadget.speed = USB_SPEED_UNKNOWN;
3734− dwc->gadget.sg_supported = true;
3735− dwc->gadget.name = "dwc3-gadget";
3736− dwc->gadget.lpm_capable = true;
3836+
3837+ usb_initialize_gadget(dwc->dev, dwc->gadget, dwc_gadget_release);
3838+ dev = &dwc->gadget->dev;
3839+ dev->platform_data = dwc;
3840+ dwc->gadget->ops = &dwc3_gadget_ops;
3841+ dwc->gadget->speed = USB_SPEED_UNKNOWN;
3842+ dwc->gadget->sg_supported = true;
3843+ dwc->gadget->name = "dwc3-gadget";
3844+ dwc->gadget->lpm_capable = true;
37373845
37383846 /*
37393847 * FIXME We might be setting max_speed to <SUPER, however versions
@@ -3756,7 +3864,7 @@ int dwc3_gadget_init(struct dwc3 *dwc) · 16 unmodified lines
37563864 dev_info(dwc->dev, "changing max_speed on rev %08x\n",
37573865 dwc->revision);
37583866
3759− dwc->gadget.max_speed = dwc->maximum_speed;
3867+ dwc->gadget->max_speed = dwc->maximum_speed;
37603868
37613869 /*
37623870 * REVISIT: Here we should clear all pending IRQs to be
@@ -3765,21 +3873,22 @@ int dwc3_gadget_init(struct dwc3 *dwc) · 2 unmodified lines
37653873
37663874 ret = dwc3_gadget_init_endpoints(dwc, dwc->num_eps);
37673875 if (ret)
3768− goto err3;
3876+ goto err4;
37693877
3770− ret = usb_add_gadget_udc(dwc->dev, &dwc->gadget);
3878+ ret = usb_add_gadget(dwc->gadget);
37713879 if (ret) {
3772− dev_err(dwc->dev, "failed to register udc\n");
3773− goto err4;
3880+ dev_err(dwc->dev, "failed to add gadget\n");
3881+ goto err5;
37743882 }
37753883
3776− dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed);
3884+ dwc3_gadget_set_speed(dwc->gadget, dwc->maximum_speed);
37773885
37783886 return 0;
37793887
3780−err4:
3888+err5:
37813889 dwc3_gadget_free_endpoints(dwc);
3782−
3890+err4:
3891+ usb_put_gadget(dwc->gadget);
37833892 err3:
37843893 dma_free_coherent(dwc->sysdev, DWC3_BOUNCE_SIZE, dwc->bounce,
37853894 dwc->bounce_addr);
@@ -3799,7 +3908,7 @@ err0: · 13 unmodified lines
37993908
38003909 void dwc3_gadget_exit(struct dwc3 *dwc)
38013910 {
3802− usb_del_gadget_udc(&dwc->gadget);
3911+ usb_del_gadget_udc(dwc->gadget);
38033912 dwc3_gadget_free_endpoints(dwc);
38043913 dma_free_coherent(dwc->sysdev, DWC3_BOUNCE_SIZE, dwc->bounce,
38053914 dwc->bounce_addr);
drivers/usb/dwc3/gadget.h+2−1
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717
1818 struct dwc3;
1919 #define to_dwc3_ep(ep) (container_of(ep, struct dwc3_ep, endpoint))
20−#define gadget_to_dwc(g) (container_of(g, struct dwc3, gadget))
20+#define gadget_to_dwc(g) (dev_get_platdata(&g->dev))
2121
2222 /* DEPCFG parameter 1 */
2323 #define DWC3_DEPCFG_INT_NUM(n) (((n) & 0x1f) << 0)
@@ -113,6 +113,7 @@ int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value); · 89 unmodified lines
113113 int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
114114 gfp_t gfp_flags);
115115 int __dwc3_gadget_ep_set_halt(struct dwc3_ep *dep, int value, int protocol);
116+void dwc3_ep0_send_delayed_status(struct dwc3 *dwc);
116117
117118 /**
118119 * dwc3_gadget_ep_get_transfer_index - Gets transfer index from HW
drivers/usb/dwc3/trace.h+9−8
@@ -104,8 +104,8 @@ DECLARE_EVENT_CLASS(dwc3_log_request, · 103 unmodified lines
104104 TP_STRUCT__entry(
105105 __string(name, req->dep->name)
106106 __field(struct dwc3_request *, req)
107− __field(unsigned, actual)
108− __field(unsigned, length)
107+ __field(unsigned int, actual)
108+ __field(unsigned int, length)
109109 __field(int, status)
110110 __field(int, zero)
111111 __field(int, short_not_ok)
@@ -246,6 +246,7 @@ DECLARE_EVENT_CLASS(dwc3_log_trb, · 134 unmodified lines
246246 __entry->dequeue, __entry->bph, __entry->bpl,
247247 ({char *s;
248248 int pcm = ((__entry->size >> 24) & 3) + 1;
249+
249250 switch (__entry->type) {
250251 case USB_ENDPOINT_XFER_INT:
251252 case USB_ENDPOINT_XFER_ISOC:
@@ -291,12 +292,12 @@ DECLARE_EVENT_CLASS(dwc3_log_ep, · 39 unmodified lines
291292 TP_ARGS(dep),
292293 TP_STRUCT__entry(
293294 __string(name, dep->name)
294− __field(unsigned, maxpacket)
295− __field(unsigned, maxpacket_limit)
296− __field(unsigned, max_streams)
297− __field(unsigned, maxburst)
298− __field(unsigned, flags)
299− __field(unsigned, direction)
295+ __field(unsigned int, maxpacket)
296+ __field(unsigned int, maxpacket_limit)
297+ __field(unsigned int, max_streams)
298+ __field(unsigned int, maxburst)
299+ __field(unsigned int, flags)
300+ __field(unsigned int, direction)
300301 __field(u8, trb_enqueue)
301302 __field(u8, trb_dequeue)
302303 ),
drivers/usb/dwc3/ulpi.c+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
1919
2020 static int dwc3_ulpi_busyloop(struct dwc3 *dwc)
2121 {
22− unsigned count = 1000;
22+ unsigned int count = 1000;
2323 u32 reg;
2424
2525 while (count--) {
drivers/usb/early/ehci-dbgp.c+5−10
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <linux/console.h>
1616 #include <linux/errno.h>
1717 #include <linux/init.h>
18+#include <linux/iopoll.h>
1819 #include <linux/pci_regs.h>
1920 #include <linux/pci_ids.h>
2021 #include <linux/usb/ch9.h>
@@ -161,17 +162,11 @@ static inline u32 dbgp_pid_read_update(u32 x, u32 tok) · 140 unmodified lines
161162 static int dbgp_wait_until_complete(void)
162163 {
163164 u32 ctrl;
164− int loop = DBGP_TIMEOUT;
165−
166− do {
167− ctrl = readl(&ehci_debug->control);
168− /* Stop when the transaction is finished */
169− if (ctrl & DBGP_DONE)
170− break;
171− udelay(1);
172− } while (--loop > 0);
165+ int ret;
173166
174− if (!loop)
167+ ret = readl_poll_timeout_atomic(&ehci_debug->control, ctrl,
168+ (ctrl & DBGP_DONE), 1, DBGP_TIMEOUT);
169+ if (ret)
175170 return -DBGP_TIMEOUT;
176171
177172 /*
drivers/usb/early/xhci-dbc.c+4−10
@@ -14,6 +14,7 @@ · 13 unmodified lines
1414 #include <linux/pci_ids.h>
1515 #include <linux/memblock.h>
1616 #include <linux/io.h>
17+#include <linux/iopoll.h>
1718 #include <asm/pci-direct.h>
1819 #include <asm/fixmap.h>
1920 #include <linux/bcd.h>
@@ -135,16 +136,9 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done, int wait, int delay) · 115 unmodified lines
135136 {
136137 u32 result;
137138
138− do {
139− result = readl(ptr);
140− result &= mask;
141− if (result == done)
142− return 0;
143− udelay(delay);
144− wait -= delay;
145− } while (wait > 0);
146−
147− return -ETIMEDOUT;
139+ return readl_poll_timeout_atomic(ptr, result,
140+ ((result & mask) == done),
141+ delay, wait);
148142 }
149143
150144 static void __init xdbc_bios_handoff(void)
drivers/usb/gadget/function/f_acm.c+5−3
@@ -425,9 +425,11 @@ static int acm_set_alt(struct usb_function *f, unsigned intf, unsigned alt) · 424 unmodified lines
425425 /* we know alt == 0, so this is an activation or a reset */
426426
427427 if (intf == acm->ctrl_id) {
428− dev_vdbg(&cdev->gadget->dev,
429− "reset acm control interface %d\n", intf);
430− usb_ep_disable(acm->notify);
428+ if (acm->notify->enabled) {
429+ dev_vdbg(&cdev->gadget->dev,
430+ "reset acm control interface %d\n", intf);
431+ usb_ep_disable(acm->notify);
432+ }
431433
432434 if (!acm->notify->desc)
433435 if (config_ep_by_speed(cdev->gadget, f, acm->notify))
drivers/usb/gadget/function/f_midi.c+3−3
@@ -698,9 +698,9 @@ drop_out: · 697 unmodified lines
698698 f_midi_drop_out_substreams(midi);
699699 }
700700
701−static void f_midi_in_tasklet(unsigned long data)
701+static void f_midi_in_tasklet(struct tasklet_struct *t)
702702 {
703− struct f_midi *midi = (struct f_midi *) data;
703+ struct f_midi *midi = from_tasklet(midi, t, tasklet);
704704 f_midi_transmit(midi);
705705 }
706706
@@ -875,7 +875,7 @@ static int f_midi_bind(struct usb_configuration *c, struct usb_function *f) · 168 unmodified lines
875875 int status, n, jack = 1, i = 0, endpoint_descriptor_index = 0;
876876
877877 midi->gadget = cdev->gadget;
878− tasklet_init(&midi->tasklet, f_midi_in_tasklet, (unsigned long) midi);
878+ tasklet_setup(&midi->tasklet, f_midi_in_tasklet);
879879 status = f_midi_register_card(midi);
880880 if (status < 0)
881881 goto fail_register;
drivers/usb/gadget/function/f_ncm.c+6−4
@@ -85,8 +85,10 @@ static inline struct f_ncm *func_to_ncm(struct usb_function *f) · 84 unmodified lines
8585 /* peak (theoretical) bulk transfer rate in bits-per-second */
8686 static inline unsigned ncm_bitrate(struct usb_gadget *g)
8787 {
88− if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER)
89− return 13 * 1024 * 8 * 1000 * 8;
88+ if (gadget_is_superspeed(g) && g->speed >= USB_SPEED_SUPER_PLUS)
89+ return 4250000000U;
90+ else if (gadget_is_superspeed(g) && g->speed == USB_SPEED_SUPER)
91+ return 3750000000U;
9092 else if (gadget_is_dualspeed(g) && g->speed == USB_SPEED_HIGH)
9193 return 13 * 512 * 8 * 1000 * 8;
9294 else
@@ -376,7 +378,7 @@ static struct usb_ss_ep_comp_descriptor ss_ncm_bulk_comp_desc = { · 283 unmodified lines
376378 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
377379
378380 /* the following 2 values can be tweaked if necessary */
379− /* .bMaxBurst = 0, */
381+ .bMaxBurst = 15,
380382 /* .bmAttributes = 0, */
381383 };
382384
@@ -1534,7 +1536,7 @@ static int ncm_bind(struct usb_configuration *c, struct usb_function *f) · 1151 unmodified lines
15341536 fs_ncm_notify_desc.bEndpointAddress;
15351537
15361538 status = usb_assign_descriptors(f, ncm_fs_function, ncm_hs_function,
1537− ncm_ss_function, NULL);
1539+ ncm_ss_function, ncm_ss_function);
15381540 if (status)
15391541 goto fail;
15401542
drivers/usb/gadget/function/f_printer.c+14−2
@@ -31,6 +31,7 @@ · 30 unmodified lines
3131 #include <linux/types.h>
3232 #include <linux/ctype.h>
3333 #include <linux/cdev.h>
34+#include <linux/kref.h>
3435
3536 #include <asm/byteorder.h>
3637 #include <linux/io.h>
@@ -64,7 +65,7 @@ struct printer_dev { · 27 unmodified lines
6465 struct usb_gadget *gadget;
6566 s8 interface;
6667 struct usb_ep *in_ep, *out_ep;
67−
68+ struct kref kref;
6869 struct list_head rx_reqs; /* List of free RX structs */
6970 struct list_head rx_reqs_active; /* List of Active RX xfers */
7071 struct list_head rx_buffers; /* List of completed xfers */
@@ -218,6 +219,13 @@ static inline struct usb_endpoint_descriptor *ep_desc(struct usb_gadget *gadget, · 147 unmodified lines
218219
219220 /*-------------------------------------------------------------------------*/
220221
222+static void printer_dev_free(struct kref *kref)
223+{
224+ struct printer_dev *dev = container_of(kref, struct printer_dev, kref);
225+
226+ kfree(dev);
227+}
228+
221229 static struct usb_request *
222230 printer_req_alloc(struct usb_ep *ep, unsigned len, gfp_t gfp_flags)
223231 {
@@ -353,6 +361,7 @@ printer_open(struct inode *inode, struct file *fd) · 129 unmodified lines
353361
354362 spin_unlock_irqrestore(&dev->lock, flags);
355363
364+ kref_get(&dev->kref);
356365 DBG(dev, "printer_open returned %x\n", ret);
357366 return ret;
358367 }
@@ -370,6 +379,7 @@ printer_close(struct inode *inode, struct file *fd) · 11 unmodified lines
370379 dev->printer_status &= ~PRINTER_SELECTED;
371380 spin_unlock_irqrestore(&dev->lock, flags);
372381
382+ kref_put(&dev->kref, printer_dev_free);
373383 DBG(dev, "printer_close\n");
374384
375385 return 0;
@@ -1386,7 +1396,8 @@ static void gprinter_free(struct usb_function *f) · 1010 unmodified lines
13861396 struct f_printer_opts *opts;
13871397
13881398 opts = container_of(f->fi, struct f_printer_opts, func_inst);
1389− kfree(dev);
1399+
1400+ kref_put(&dev->kref, printer_dev_free);
13901401 mutex_lock(&opts->lock);
13911402 --opts->refcnt;
13921403 mutex_unlock(&opts->lock);
@@ -1455,6 +1466,7 @@ static struct usb_function *gprinter_alloc(struct usb_function_instance *fi) · 62 unmodified lines
14551466 return ERR_PTR(-ENOMEM);
14561467 }
14571468
1469+ kref_init(&dev->kref);
14581470 ++opts->refcnt;
14591471 dev->minor = opts->minor;
14601472 dev->pnp_string = opts->pnp_string;
drivers/usb/gadget/function/f_tcm.c+6−6
@@ -392,12 +392,12 @@ static void bot_set_alt(struct f_uas *fu) · 391 unmodified lines
392392
393393 fu->flags = USBG_IS_BOT;
394394
395− config_ep_by_speed(gadget, f, fu->ep_in);
395+ config_ep_by_speed_and_alt(gadget, f, fu->ep_in, USB_G_ALT_INT_BBB);
396396 ret = usb_ep_enable(fu->ep_in);
397397 if (ret)
398398 goto err_b_in;
399399
400− config_ep_by_speed(gadget, f, fu->ep_out);
400+ config_ep_by_speed_and_alt(gadget, f, fu->ep_out, USB_G_ALT_INT_BBB);
401401 ret = usb_ep_enable(fu->ep_out);
402402 if (ret)
403403 goto err_b_out;
@@ -852,21 +852,21 @@ static void uasp_set_alt(struct f_uas *fu) · 448 unmodified lines
852852 if (gadget->speed >= USB_SPEED_SUPER)
853853 fu->flags |= USBG_USE_STREAMS;
854854
855− config_ep_by_speed(gadget, f, fu->ep_in);
855+ config_ep_by_speed_and_alt(gadget, f, fu->ep_in, USB_G_ALT_INT_UAS);
856856 ret = usb_ep_enable(fu->ep_in);
857857 if (ret)
858858 goto err_b_in;
859859
860− config_ep_by_speed(gadget, f, fu->ep_out);
860+ config_ep_by_speed_and_alt(gadget, f, fu->ep_out, USB_G_ALT_INT_UAS);
861861 ret = usb_ep_enable(fu->ep_out);
862862 if (ret)
863863 goto err_b_out;
864864
865− config_ep_by_speed(gadget, f, fu->ep_cmd);
865+ config_ep_by_speed_and_alt(gadget, f, fu->ep_cmd, USB_G_ALT_INT_UAS);
866866 ret = usb_ep_enable(fu->ep_cmd);
867867 if (ret)
868868 goto err_cmd;
869− config_ep_by_speed(gadget, f, fu->ep_status);
869+ config_ep_by_speed_and_alt(gadget, f, fu->ep_status, USB_G_ALT_INT_UAS);
870870 ret = usb_ep_enable(fu->ep_status);
871871 if (ret)
872872 goto err_status;
drivers/usb/gadget/function/f_uvc.c+4−4
@@ -740,20 +740,20 @@ uvc_function_bind(struct usb_configuration *c, struct usb_function *f) · 739 unmodified lines
740740 /* Initialise video. */
741741 ret = uvcg_video_init(&uvc->video, uvc);
742742 if (ret < 0)
743− goto error;
743+ goto v4l2_error;
744744
745745 /* Register a V4L2 device. */
746746 ret = uvc_register_video(uvc);
747747 if (ret < 0) {
748748 uvcg_err(f, "failed to register video device\n");
749− goto error;
749+ goto v4l2_error;
750750 }
751751
752752 return 0;
753753
754−error:
754+v4l2_error:
755755 v4l2_device_unregister(&uvc->v4l2_dev);
756−
756+error:
757757 if (uvc->control_req)
758758 usb_ep_free_request(cdev->gadget->ep0, uvc->control_req);
759759 kfree(uvc->control_buf);
drivers/usb/gadget/function/u_ether.c+1−1
@@ -93,7 +93,7 @@ struct eth_dev { · 92 unmodified lines
9393 static inline int qlen(struct usb_gadget *gadget, unsigned qmult)
9494 {
9595 if (gadget_is_dualspeed(gadget) && (gadget->speed == USB_SPEED_HIGH ||
96− gadget->speed == USB_SPEED_SUPER))
96+ gadget->speed >= USB_SPEED_SUPER))
9797 return qmult * DEFAULT_QLEN;
9898 else
9999 return DEFAULT_QLEN;
drivers/usb/gadget/function/u_serial.c+1−0
@@ -1391,6 +1391,7 @@ void gserial_disconnect(struct gserial *gser) · 1390 unmodified lines
13911391 if (port->port.tty)
13921392 tty_hangup(port->port.tty);
13931393 }
1394+ port->suspended = false;
13941395 spin_unlock_irqrestore(&port->port_lock, flags);
13951396
13961397 /* disable endpoints, aborting down any active I/O */
drivers/usb/gadget/udc/aspeed-vhub/core.c+3−7
@@ -135,13 +135,9 @@ static irqreturn_t ast_vhub_irq(int irq, void *data) · 134 unmodified lines
135135
136136 /* Handle device interrupts */
137137 if (istat & vhub->port_irq_mask) {
138− unsigned long bitmap = istat;
139− int offset = VHUB_IRQ_DEV1_BIT;
140− int size = VHUB_IRQ_DEV1_BIT + vhub->max_ports;
141−
142− for_each_set_bit_from(offset, &bitmap, size) {
143− i = offset - VHUB_IRQ_DEV1_BIT;
144− ast_vhub_dev_irq(&vhub->ports[i].dev);
138+ for (i = 0; i < vhub->max_ports; i++) {
139+ if (istat & VHUB_DEV_IRQ(i))
140+ ast_vhub_dev_irq(&vhub->ports[i].dev);
145141 }
146142 }
147143
drivers/usb/gadget/udc/aspeed-vhub/vhub.h+3−0
@@ -67,6 +67,9 @@ · 66 unmodified lines
6767 #define VHUB_IRQ_HUB_EP0_SETUP (1 << 0)
6868 #define VHUB_IRQ_ACK_ALL 0x1ff
6969
70+/* Downstream device IRQ mask. */
71+#define VHUB_DEV_IRQ(n) (VHUB_IRQ_DEVICE1 << (n))
72+
7073 /* SW reset reg */
7174 #define VHUB_SW_RESET_EP_POOL (1 << 9)
7275 #define VHUB_SW_RESET_DMA_CONTROLLER (1 << 8)
drivers/usb/gadget/udc/atmel_usba_udc.c+45−23
@@ -1056,16 +1056,19 @@ found_ep: · 1055 unmodified lines
10561056
10571057 switch (usb_endpoint_type(desc)) {
10581058 case USB_ENDPOINT_XFER_CONTROL:
1059+ ep->nr_banks = 1;
10591060 break;
10601061
10611062 case USB_ENDPOINT_XFER_ISOC:
10621063 ep->fifo_size = 1024;
1063− ep->nr_banks = 2;
1064+ if (ep->udc->ep_prealloc)
1065+ ep->nr_banks = 2;
10641066 break;
10651067
10661068 case USB_ENDPOINT_XFER_BULK:
10671069 ep->fifo_size = 512;
1068− ep->nr_banks = 1;
1070+ if (ep->udc->ep_prealloc)
1071+ ep->nr_banks = 1;
10691072 break;
10701073
10711074 case USB_ENDPOINT_XFER_INT:
@@ -1075,7 +1078,8 @@ found_ep: · 3 unmodified lines
10751078 else
10761079 ep->fifo_size =
10771080 roundup_pow_of_two(le16_to_cpu(desc->wMaxPacketSize));
1078− ep->nr_banks = 1;
1081+ if (ep->udc->ep_prealloc)
1082+ ep->nr_banks = 1;
10791083 break;
10801084 }
10811085
@@ -1091,8 +1095,6 @@ found_ep: · 9 unmodified lines
10911095 USBA_BF(EPT_SIZE, fls(ep->fifo_size - 1) - 3);
10921096
10931097 ep->ept_cfg |= USBA_BF(BK_NUMBER, ep->nr_banks);
1094−
1095− ep->udc->configured_ep++;
10961098 }
10971099
10981100 return _ep;
@@ -1786,7 +1788,7 @@ static irqreturn_t usba_udc_irq(int irq, void *devid) · 687 unmodified lines
17861788
17871789 if (status & USBA_END_OF_RESET) {
17881790 struct usba_ep *ep0, *ep;
1789− int i, n;
1791+ int i;
17901792
17911793 usba_writel(udc, INT_CLR,
17921794 USBA_END_OF_RESET|USBA_END_OF_RESUME
@@ -1834,13 +1836,14 @@ static irqreturn_t usba_udc_irq(int irq, void *devid) · 41 unmodified lines
18341836 "ODD: EP0 configuration is invalid!\n");
18351837
18361838 /* Preallocate other endpoints */
1837− n = fifo_mode ? udc->num_ep : udc->configured_ep;
1838− for (i = 1; i < n; i++) {
1839+ for (i = 1; i < udc->num_ep; i++) {
18391840 ep = &udc->usba_ep[i];
1840− usba_ep_writel(ep, CFG, ep->ept_cfg);
1841− if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1842− dev_err(&udc->pdev->dev,
1843− "ODD: EP%d configuration is invalid!\n", i);
1841+ if (ep->ep.claimed) {
1842+ usba_ep_writel(ep, CFG, ep->ept_cfg);
1843+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED))
1844+ dev_err(&udc->pdev->dev,
1845+ "ODD: EP%d configuration is invalid!\n", i);
1846+ }
18441847 }
18451848 }
18461849
@@ -2025,9 +2028,6 @@ static int atmel_usba_stop(struct usb_gadget *gadget) · 178 unmodified lines
20252028 if (udc->vbus_pin)
20262029 disable_irq(gpiod_to_irq(udc->vbus_pin));
20272030
2028− if (fifo_mode == 0)
2029− udc->configured_ep = 1;
2030−
20312031 udc->suspended = false;
20322032 usba_stop(udc);
20332033
@@ -2090,33 +2090,51 @@ static const struct usba_udc_config udc_at91sam9rl_cfg = { · 56 unmodified lines
20902090 .errata = &at91sam9rl_errata,
20912091 .config = ep_config_sam9,
20922092 .num_ep = ARRAY_SIZE(ep_config_sam9),
2093+ .ep_prealloc = true,
20932094 };
20942095
20952096 static const struct usba_udc_config udc_at91sam9g45_cfg = {
20962097 .errata = &at91sam9g45_errata,
20972098 .config = ep_config_sam9,
20982099 .num_ep = ARRAY_SIZE(ep_config_sam9),
2100+ .ep_prealloc = true,
20992101 };
21002102
21012103 static const struct usba_udc_config udc_sama5d3_cfg = {
21022104 .config = ep_config_sama5,
21032105 .num_ep = ARRAY_SIZE(ep_config_sama5),
2106+ .ep_prealloc = true,
2107+};
2108+
2109+static const struct usba_udc_config udc_sam9x60_cfg = {
2110+ .num_ep = ARRAY_SIZE(ep_config_sam9),
2111+ .config = ep_config_sam9,
2112+ .ep_prealloc = false,
21042113 };
21052114
21062115 static const struct of_device_id atmel_udc_dt_ids[] = {
21072116 { .compatible = "atmel,at91sam9rl-udc", .data = &udc_at91sam9rl_cfg },
21082117 { .compatible = "atmel,at91sam9g45-udc", .data = &udc_at91sam9g45_cfg },
21092118 { .compatible = "atmel,sama5d3-udc", .data = &udc_sama5d3_cfg },
2119+ { .compatible = "microchip,sam9x60-udc", .data = &udc_sam9x60_cfg },
21102120 { /* sentinel */ }
21112121 };
21122122
21132123 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
21142124
2125+static const struct of_device_id atmel_pmc_dt_ids[] = {
2126+ { .compatible = "atmel,at91sam9g45-pmc" },
2127+ { .compatible = "atmel,at91sam9rl-pmc" },
2128+ { .compatible = "atmel,at91sam9x5-pmc" },
2129+ { /* sentinel */ }
2130+};
2131+
21152132 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
21162133 struct usba_udc *udc)
21172134 {
21182135 struct device_node *np = pdev->dev.of_node;
21192136 const struct of_device_id *match;
2137+ struct device_node *pp;
21202138 int i, ret;
21212139 struct usba_ep *eps, *ep;
21222140 const struct usba_udc_config *udc_config;
@@ -2126,14 +2144,19 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, · 3 unmodified lines
21262144 return ERR_PTR(-EINVAL);
21272145
21282146 udc_config = match->data;
2147+ udc->ep_prealloc = udc_config->ep_prealloc;
21292148 udc->errata = udc_config->errata;
2130− udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
2131− if (IS_ERR(udc->pmc))
2132− udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9rl-pmc");
2133− if (IS_ERR(udc->pmc))
2134− udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9x5-pmc");
2135− if (udc->errata && IS_ERR(udc->pmc))
2136− return ERR_CAST(udc->pmc);
2149+ if (udc->errata) {
2150+ pp = of_find_matching_node_and_match(NULL, atmel_pmc_dt_ids,
2151+ NULL);
2152+ if (!pp)
2153+ return ERR_PTR(-ENODEV);
2154+
2155+ udc->pmc = syscon_node_to_regmap(pp);
2156+ of_node_put(pp);
2157+ if (IS_ERR(udc->pmc))
2158+ return ERR_CAST(udc->pmc);
2159+ }
21372160
21382161 udc->num_ep = 0;
21392162
@@ -2142,7 +2165,6 @@ static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev, · 2 unmodified lines
21422165
21432166 if (fifo_mode == 0) {
21442167 udc->num_ep = udc_config->num_ep;
2145− udc->configured_ep = 1;
21462168 } else {
21472169 udc->num_ep = usba_config_fifo_table(udc);
21482170 }
drivers/usb/gadget/udc/atmel_usba_udc.h+2−1
@@ -317,6 +317,7 @@ struct usba_udc_config { · 316 unmodified lines
317317 const struct usba_udc_errata *errata;
318318 const struct usba_ep_config *config;
319319 const int num_ep;
320+ const bool ep_prealloc;
320321 };
321322
322323 struct usba_udc {
@@ -336,7 +337,6 @@ struct usba_udc { · 13 unmodified lines
336337 int irq;
337338 struct gpio_desc *vbus_pin;
338339 int num_ep;
339− int configured_ep;
340340 struct usba_fifo_cfg *fifo_cfg;
341341 struct clk *pclk;
342342 struct clk *hclk;
@@ -344,6 +344,7 @@ struct usba_udc { · 1 unmodified line
344344 bool bias_pulse_needed;
345345 bool clocked;
346346 bool suspended;
347+ bool ep_prealloc;
347348
348349 u16 devstatus;
349350
drivers/usb/gadget/udc/bcm63xx_udc.c+1−0
@@ -26,6 +26,7 @@ · 25 unmodified lines
2626 #include <linux/seq_file.h>
2727 #include <linux/slab.h>
2828 #include <linux/timer.h>
29+#include <linux/usb.h>
2930 #include <linux/usb/ch9.h>
3031 #include <linux/usb/gadget.h>
3132 #include <linux/workqueue.h>
drivers/usb/gadget/udc/bdc/bdc_core.c+4−5
@@ -484,7 +484,7 @@ static void bdc_phy_exit(struct bdc *bdc) · 483 unmodified lines
484484 static int bdc_probe(struct platform_device *pdev)
485485 {
486486 struct bdc *bdc;
487− int ret = -ENOMEM;
487+ int ret;
488488 int irq;
489489 u32 temp;
490490 struct device *dev = &pdev->dev;
@@ -510,10 +510,9 @@ static int bdc_probe(struct platform_device *pdev) · 19 unmodified lines
510510 bdc->clk = clk;
511511
512512 bdc->regs = devm_platform_ioremap_resource(pdev, 0);
513− if (IS_ERR(bdc->regs)) {
514− dev_err(dev, "ioremap error\n");
515− return -ENOMEM;
516− }
513+ if (IS_ERR(bdc->regs))
514+ return PTR_ERR(bdc->regs);
515+
517516 irq = platform_get_irq(pdev, 0);
518517 if (irq < 0)
519518 return irq;
drivers/usb/gadget/udc/core.c+66−16
@@ -715,6 +715,9 @@ int usb_gadget_disconnect(struct usb_gadget *gadget) · 714 unmodified lines
715715 goto out;
716716 }
717717
718+ if (!gadget->connected)
719+ goto out;
720+
718721 if (gadget->deactivated) {
719722 /*
720723 * If gadget is deactivated we only save new state.
@@ -1164,21 +1167,18 @@ static int check_pending_gadget_drivers(struct usb_udc *udc) · 443 unmodified lines
11641167 }
11651168
11661169 /**
1167− * usb_add_gadget_udc_release - adds a new gadget to the udc class driver list
1170+ * usb_initialize_gadget - initialize a gadget and its embedded struct device
11681171 * @parent: the parent device to this udc. Usually the controller driver's
11691172 * device.
1170− * @gadget: the gadget to be added to the list.
1173+ * @gadget: the gadget to be initialized.
11711174 * @release: a gadget release function.
11721175 *
11731176 * Returns zero on success, negative errno otherwise.
11741177 * Calls the gadget release function in the latter case.
11751178 */
1176−int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget,
1179+void usb_initialize_gadget(struct device *parent, struct usb_gadget *gadget,
11771180 void (*release)(struct device *dev))
11781181 {
1179− struct usb_udc *udc;
1180− int ret = -ENOMEM;
1181−
11821182 dev_set_name(&gadget->dev, "gadget");
11831183 INIT_WORK(&gadget->work, usb_gadget_state_work);
11841184 gadget->dev.parent = parent;
@@ -1189,17 +1189,32 @@ int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget, · 4 unmodified lines
11891189 gadget->dev.release = usb_udc_nop_release;
11901190
11911191 device_initialize(&gadget->dev);
1192+}
1193+EXPORT_SYMBOL_GPL(usb_initialize_gadget);
1194+
1195+/**
1196+ * usb_add_gadget - adds a new gadget to the udc class driver list
1197+ * @gadget: the gadget to be added to the list.
1198+ *
1199+ * Returns zero on success, negative errno otherwise.
1200+ * Does not do a final usb_put_gadget() if an error occurs.
1201+ */
1202+int usb_add_gadget(struct usb_gadget *gadget)
1203+{
1204+ struct usb_udc *udc;
1205+ int ret = -ENOMEM;
11921206
11931207 udc = kzalloc(sizeof(*udc), GFP_KERNEL);
11941208 if (!udc)
1195− goto err_put_gadget;
1209+ goto error;
11961210
11971211 device_initialize(&udc->dev);
11981212 udc->dev.release = usb_udc_release;
11991213 udc->dev.class = udc_class;
12001214 udc->dev.groups = usb_udc_attr_groups;
1201− udc->dev.parent = parent;
1202− ret = dev_set_name(&udc->dev, "%s", kobject_name(&parent->kobj));
1215+ udc->dev.parent = gadget->dev.parent;
1216+ ret = dev_set_name(&udc->dev, "%s",
1217+ kobject_name(&gadget->dev.parent->kobj));
12031218 if (ret)
12041219 goto err_put_udc;
12051220
@@ -1242,8 +1257,30 @@ int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget, · 36 unmodified lines
12421257 err_put_udc:
12431258 put_device(&udc->dev);
12441259
1245− err_put_gadget:
1246− put_device(&gadget->dev);
1260+ error:
1261+ return ret;
1262+}
1263+EXPORT_SYMBOL_GPL(usb_add_gadget);
1264+
1265+/**
1266+ * usb_add_gadget_udc_release - adds a new gadget to the udc class driver list
1267+ * @parent: the parent device to this udc. Usually the controller driver's
1268+ * device.
1269+ * @gadget: the gadget to be added to the list.
1270+ * @release: a gadget release function.
1271+ *
1272+ * Returns zero on success, negative errno otherwise.
1273+ * Calls the gadget release function in the latter case.
1274+ */
1275+int usb_add_gadget_udc_release(struct device *parent, struct usb_gadget *gadget,
1276+ void (*release)(struct device *dev))
1277+{
1278+ int ret;
1279+
1280+ usb_initialize_gadget(parent, gadget, release);
1281+ ret = usb_add_gadget(gadget);
1282+ if (ret)
1283+ usb_put_gadget(gadget);
12471284 return ret;
12481285 }
12491286 EXPORT_SYMBOL_GPL(usb_add_gadget_udc_release);
@@ -1311,13 +1348,14 @@ static void usb_gadget_remove_driver(struct usb_udc *udc) · 61 unmodified lines
13111348 }
13121349
13131350 /**
1314− * usb_del_gadget_udc - deletes @udc from udc_list
1351+ * usb_del_gadget - deletes @udc from udc_list
13151352 * @gadget: the gadget to be removed.
13161353 *
1317− * This, will call usb_gadget_unregister_driver() if
1354+ * This will call usb_gadget_unregister_driver() if
13181355 * the @udc is still busy.
1356+ * It will not do a final usb_put_gadget().
13191357 */
1320−void usb_del_gadget_udc(struct usb_gadget *gadget)
1358+void usb_del_gadget(struct usb_gadget *gadget)
13211359 {
13221360 struct usb_udc *udc = gadget->udc;
13231361
@@ -1340,8 +1378,20 @@ void usb_del_gadget_udc(struct usb_gadget *gadget) · 16 unmodified lines
13401378 kobject_uevent(&udc->dev.kobj, KOBJ_REMOVE);
13411379 flush_work(&gadget->work);
13421380 device_unregister(&udc->dev);
1343− device_unregister(&gadget->dev);
1344− memset(&gadget->dev, 0x00, sizeof(gadget->dev));
1381+ device_del(&gadget->dev);
1382+}
1383+EXPORT_SYMBOL_GPL(usb_del_gadget);
1384+
1385+/**
1386+ * usb_del_gadget_udc - deletes @udc from udc_list
1387+ * @gadget: the gadget to be removed.
1388+ *
1389+ * Calls usb_del_gadget() and does a final usb_put_gadget().
1390+ */
1391+void usb_del_gadget_udc(struct usb_gadget *gadget)
1392+{
1393+ usb_del_gadget(gadget);
1394+ usb_put_gadget(gadget);
13451395 }
13461396 EXPORT_SYMBOL_GPL(usb_del_gadget_udc);
13471397
drivers/usb/gadget/udc/fsl_qe_udc.c+3−4
@@ -923,9 +923,9 @@ static int qe_ep_rxframe_handle(struct qe_ep *ep) · 922 unmodified lines
923923 return 0;
924924 }
925925
926−static void ep_rx_tasklet(unsigned long data)
926+static void ep_rx_tasklet(struct tasklet_struct *t)
927927 {
928− struct qe_udc *udc = (struct qe_udc *)data;
928+ struct qe_udc *udc = from_tasklet(udc, t, rx_tasklet);
929929 struct qe_ep *ep;
930930 struct qe_frame *pframe;
931931 struct qe_bd __iomem *bd;
@@ -2553,8 +2553,7 @@ static int qe_udc_probe(struct platform_device *ofdev) · 1621 unmodified lines
25532553 DMA_TO_DEVICE);
25542554 }
25552555
2556− tasklet_init(&udc->rx_tasklet, ep_rx_tasklet,
2557− (unsigned long)udc);
2556+ tasklet_setup(&udc->rx_tasklet, ep_rx_tasklet);
25582557 /* request irq and disable DR */
25592558 udc->usb_irq = irq_of_parse_and_map(np, 0);
25602559 if (!udc->usb_irq) {
drivers/usb/gadget/udc/fsl_udc_core.c+5−4
@@ -2061,7 +2061,7 @@ static int fsl_proc_read(struct seq_file *m, void *v) · 2060 unmodified lines
20612061 "Sleep Enable: %d SOF Received Enable: %d "
20622062 "Reset Enable: %d\n"
20632063 "System Error Enable: %d "
2064− "Port Change Dectected Enable: %d\n"
2064+ "Port Change Detected Enable: %d\n"
20652065 "USB Error Intr Enable: %d USB Intr Enable: %d\n\n",
20662066 (tmp_reg & USB_INTR_DEVICE_SUSPEND) ? 1 : 0,
20672067 (tmp_reg & USB_INTR_SOF_EN) ? 1 : 0,
@@ -2439,11 +2439,12 @@ static int fsl_udc_probe(struct platform_device *pdev) · 371 unmodified lines
24392439 /* DEN is bidirectional ep number, max_ep doubles the number */
24402440 udc_controller->max_ep = (dccparams & DCCPARAMS_DEN_MASK) * 2;
24412441
2442− udc_controller->irq = platform_get_irq(pdev, 0);
2443− if (udc_controller->irq <= 0) {
2444− ret = udc_controller->irq ? : -ENODEV;
2442+ ret = platform_get_irq(pdev, 0);
2443+ if (ret <= 0) {
2444+ ret = ret ? : -ENODEV;
24452445 goto err_iounmap;
24462446 }
2447+ udc_controller->irq = ret;
24472448
24482449 ret = request_irq(udc_controller->irq, fsl_udc_irq, IRQF_SHARED,
24492450 driver_name, udc_controller);
drivers/usb/gadget/udc/lpc32xx_udc.c+3−14
@@ -495,7 +495,7 @@ static void proc_ep_show(struct seq_file *s, struct lpc32xx_ep *ep) · 494 unmodified lines
495495 }
496496 }
497497
498−static int proc_udc_show(struct seq_file *s, void *unused)
498+static int udc_show(struct seq_file *s, void *unused)
499499 {
500500 struct lpc32xx_udc *udc = s->private;
501501 struct lpc32xx_ep *ep;
@@ -524,22 +524,11 @@ static int proc_udc_show(struct seq_file *s, void *unused) · 22 unmodified lines
524524 return 0;
525525 }
526526
527−static int proc_udc_open(struct inode *inode, struct file *file)
528−{
529− return single_open(file, proc_udc_show, PDE_DATA(inode));
530−}
531−
532−static const struct file_operations proc_ops = {
533− .owner = THIS_MODULE,
534− .open = proc_udc_open,
535− .read = seq_read,
536− .llseek = seq_lseek,
537− .release = single_release,
538−};
527+DEFINE_SHOW_ATTRIBUTE(udc);
539528
540529 static void create_debug_file(struct lpc32xx_udc *udc)
541530 {
542− udc->pde = debugfs_create_file(debug_filename, 0, NULL, udc, &proc_ops);
531+ udc->pde = debugfs_create_file(debug_filename, 0, NULL, udc, &udc_fops);
543532 }
544533
545534 static void remove_debug_file(struct lpc32xx_udc *udc)
drivers/usb/gadget/udc/net2272.c+13−11
@@ -9,7 +9,6 @@ · 8 unmodified lines
99 #include <linux/delay.h>
1010 #include <linux/device.h>
1111 #include <linux/errno.h>
12−#include <linux/gpio.h>
1312 #include <linux/init.h>
1413 #include <linux/interrupt.h>
1514 #include <linux/io.h>
@@ -2196,7 +2195,8 @@ static int net2272_present(struct net2272 *dev) · 2180 unmodified lines
21962195 static void
21972196 net2272_gadget_release(struct device *_dev)
21982197 {
2199− struct net2272 *dev = dev_get_drvdata(_dev);
2198+ struct net2272 *dev = container_of(_dev, struct net2272, gadget.dev);
2199+
22002200 kfree(dev);
22012201 }
22022202
@@ -2205,7 +2205,8 @@ net2272_gadget_release(struct device *_dev) · 2 unmodified lines
22052205 static void
22062206 net2272_remove(struct net2272 *dev)
22072207 {
2208− usb_del_gadget_udc(&dev->gadget);
2208+ if (dev->added)
2209+ usb_del_gadget(&dev->gadget);
22092210 free_irq(dev->irq, dev);
22102211 iounmap(dev->base_addr);
22112212 device_remove_file(dev->dev, &dev_attr_registers);
@@ -2235,6 +2236,7 @@ static struct net2272 *net2272_probe_init(struct device *dev, unsigned int irq) · 23 unmodified lines
22352236
22362237 /* the "gadget" abstracts/virtualizes the controller */
22372238 ret->gadget.name = driver_name;
2239+ usb_initialize_gadget(dev, &ret->gadget, net2272_gadget_release);
22382240
22392241 return ret;
22402242 }
@@ -2273,10 +2275,10 @@ net2272_probe_fin(struct net2272 *dev, unsigned int irqflags) · 32 unmodified lines
22732275 if (ret)
22742276 goto err_irq;
22752277
2276− ret = usb_add_gadget_udc_release(dev->dev, &dev->gadget,
2277− net2272_gadget_release);
2278+ ret = usb_add_gadget(&dev->gadget);
22782279 if (ret)
22792280 goto err_add_udc;
2281+ dev->added = 1;
22802282
22812283 return 0;
22822284
@@ -2451,7 +2453,7 @@ net2272_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 168 unmodified lines
24512453
24522454 if (pci_enable_device(pdev) < 0) {
24532455 ret = -ENODEV;
2454− goto err_free;
2456+ goto err_put;
24552457 }
24562458
24572459 pci_set_master(pdev);
@@ -2474,8 +2476,8 @@ net2272_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 16 unmodified lines
24742476
24752477 err_pci:
24762478 pci_disable_device(pdev);
2477− err_free:
2478− kfree(dev);
2479+ err_put:
2480+ usb_put_gadget(&dev->gadget);
24792481
24802482 return ret;
24812483 }
@@ -2536,7 +2538,7 @@ net2272_pci_remove(struct pci_dev *pdev) · 54 unmodified lines
25362538
25372539 pci_disable_device(pdev);
25382540
2539− kfree(dev);
2541+ usb_put_gadget(&dev->gadget);
25402542 }
25412543
25422544 /* Table of matching PCI IDs */
@@ -2649,7 +2651,7 @@ net2272_plat_probe(struct platform_device *pdev) · 106 unmodified lines
26492651 err_req:
26502652 release_mem_region(base, len);
26512653 err:
2652− kfree(dev);
2654+ usb_put_gadget(&dev->gadget);
26532655
26542656 return ret;
26552657 }
@@ -2664,7 +2666,7 @@ net2272_plat_remove(struct platform_device *pdev) · 8 unmodified lines
26642666 release_mem_region(pdev->resource[0].start,
26652667 resource_size(&pdev->resource[0]));
26662668
2667− kfree(dev);
2669+ usb_put_gadget(&dev->gadget);
26682670
26692671 return 0;
26702672 }
drivers/usb/gadget/udc/net2272.h+1−0
@@ -441,6 +441,7 @@ struct net2272 { · 440 unmodified lines
441441 unsigned protocol_stall:1,
442442 softconnect:1,
443443 wakeup:1,
444+ added:1,
444445 dma_eot_polarity:1,
445446 dma_dack_polarity:1,
446447 dma_dreq_polarity:1,
drivers/usb/gadget/udc/net2280.c+17−15
@@ -52,6 +52,7 @@ · 51 unmodified lines
5252 #include <linux/usb/gadget.h>
5353 #include <linux/prefetch.h>
5454 #include <linux/io.h>
55+#include <linux/iopoll.h>
5556
5657 #include <asm/byteorder.h>
5758 #include <asm/irq.h>
@@ -360,18 +361,16 @@ print_err: · 302 unmodified lines
360361 static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
361362 {
362363 u32 result;
364+ int ret;
363365
364− do {
365− result = readl(ptr);
366− if (result == ~(u32)0) /* "device unplugged" */
367− return -ENODEV;
368− result &= mask;
369− if (result == done)
370− return 0;
371− udelay(1);
372− usec--;
373− } while (usec > 0);
374− return -ETIMEDOUT;
366+ ret = readl_poll_timeout_atomic(ptr, result,
367+ ((result & mask) == done ||
368+ result == U32_MAX),
369+ 1, usec);
370+ if (result == U32_MAX) /* device unplugged */
371+ return -ENODEV;
372+
373+ return ret;
375374 }
376375
377376 static const struct usb_ep_ops net2280_ep_ops;
@@ -3561,7 +3560,7 @@ static irqreturn_t net2280_irq(int irq, void *_dev) · 3183 unmodified lines
35613560
35623561 static void gadget_release(struct device *_dev)
35633562 {
3564− struct net2280 *dev = dev_get_drvdata(_dev);
3563+ struct net2280 *dev = container_of(_dev, struct net2280, gadget.dev);
35653564
35663565 kfree(dev);
35673566 }
@@ -3572,7 +3571,8 @@ static void net2280_remove(struct pci_dev *pdev) · 4 unmodified lines
35723571 {
35733572 struct net2280 *dev = pci_get_drvdata(pdev);
35743573
3575− usb_del_gadget_udc(&dev->gadget);
3574+ if (dev->added)
3575+ usb_del_gadget(&dev->gadget);
35763576
35773577 BUG_ON(dev->driver);
35783578
@@ -3603,6 +3603,7 @@ static void net2280_remove(struct pci_dev *pdev) · 24 unmodified lines
36033603 device_remove_file(&pdev->dev, &dev_attr_registers);
36043604
36053605 ep_info(dev, "unbind\n");
3606+ usb_put_gadget(&dev->gadget);
36063607 }
36073608
36083609 /* wrap this driver around the specified device, but
@@ -3624,6 +3625,7 @@ static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 15 unmodified lines
36243625 }
36253626
36263627 pci_set_drvdata(pdev, dev);
3628+ usb_initialize_gadget(&pdev->dev, &dev->gadget, gadget_release);
36273629 spin_lock_init(&dev->lock);
36283630 dev->quirks = id->driver_data;
36293631 dev->pdev = pdev;
@@ -3774,10 +3776,10 @@ static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 144 unmodified lines
37743776 if (retval)
37753777 goto done;
37763778
3777− retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
3778− gadget_release);
3779+ retval = usb_add_gadget(&dev->gadget);
37793780 if (retval)
37803781 goto done;
3782+ dev->added = 1;
37813783 return 0;
37823784
37833785 done:
drivers/usb/gadget/udc/net2280.h+1−0
@@ -156,6 +156,7 @@ struct net2280 { · 155 unmodified lines
156156 softconnect : 1,
157157 got_irq : 1,
158158 region:1,
159+ added:1,
159160 u1_enable:1,
160161 u2_enable:1,
161162 ltm_enable:1,
drivers/usb/gadget/udc/pch_udc.c+22−33
@@ -12,12 +12,9 @@ · 11 unmodified lines
1212 #include <linux/interrupt.h>
1313 #include <linux/usb/ch9.h>
1414 #include <linux/usb/gadget.h>
15−#include <linux/gpio.h>
15+#include <linux/gpio/consumer.h>
1616 #include <linux/irq.h>
1717
18−/* GPIO port for VBUS detecting */
19−static int vbus_gpio_port = -1; /* GPIO port number (-1:Not used) */
20−
2118 #define PCH_VBUS_PERIOD 3000 /* VBUS polling period (msec) */
2219 #define PCH_VBUS_INTERVAL 10 /* VBUS polling interval (msec) */
2320
@@ -301,13 +298,13 @@ struct pch_udc_ep { · 277 unmodified lines
301298 /**
302299 * struct pch_vbus_gpio_data - Structure holding GPIO informaton
303300 * for detecting VBUS
304− * @port: gpio port number
301+ * @port: gpio descriptor for the VBUS GPIO
305302 * @intr: gpio interrupt number
306303 * @irq_work_fall: Structure for WorkQueue
307304 * @irq_work_rise: Structure for WorkQueue
308305 */
309306 struct pch_vbus_gpio_data {
310− int port;
307+ struct gpio_desc *port;
311308 int intr;
312309 struct work_struct irq_work_fall;
313310 struct work_struct irq_work_rise;
@@ -1254,7 +1251,7 @@ static int pch_vbus_gpio_get_value(struct pch_udc_dev *dev) · 940 unmodified lines
12541251 int vbus = 0;
12551252
12561253 if (dev->vbus_gpio.port)
1257− vbus = gpio_get_value(dev->vbus_gpio.port) ? 1 : 0;
1254+ vbus = gpiod_get_value(dev->vbus_gpio.port) ? 1 : 0;
12581255 else
12591256 vbus = -1;
12601257
@@ -1356,42 +1353,30 @@ static irqreturn_t pch_vbus_gpio_irq(int irq, void *data) · 95 unmodified lines
13561353 /**
13571354 * pch_vbus_gpio_init() - This API initializes GPIO port detecting VBUS.
13581355 * @dev: Reference to the driver structure
1359− * @vbus_gpio_port: Number of GPIO port to detect gpio
13601356 *
13611357 * Return codes:
13621358 * 0: Success
13631359 * -EINVAL: GPIO port is invalid or can't be initialized.
13641360 */
1365−static int pch_vbus_gpio_init(struct pch_udc_dev *dev, int vbus_gpio_port)
1361+static int pch_vbus_gpio_init(struct pch_udc_dev *dev)
13661362 {
13671363 int err;
13681364 int irq_num = 0;
1365+ struct gpio_desc *gpiod;
13691366
1370− dev->vbus_gpio.port = 0;
1367+ dev->vbus_gpio.port = NULL;
13711368 dev->vbus_gpio.intr = 0;
13721369
1373− if (vbus_gpio_port <= -1)
1374− return -EINVAL;
1375−
1376− err = gpio_is_valid(vbus_gpio_port);
1377− if (!err) {
1378− pr_err("%s: gpio port %d is invalid\n",
1379− __func__, vbus_gpio_port);
1380− return -EINVAL;
1381− }
1382−
1383− err = gpio_request(vbus_gpio_port, "pch_vbus");
1384− if (err) {
1385− pr_err("%s: can't request gpio port %d, err: %d\n",
1386− __func__, vbus_gpio_port, err);
1387− return -EINVAL;
1388− }
1370+ /* Retrieve the GPIO line from the USB gadget device */
1371+ gpiod = devm_gpiod_get(dev->gadget.dev.parent, NULL, GPIOD_IN);
1372+ if (IS_ERR(gpiod))
1373+ return PTR_ERR(gpiod);
1374+ gpiod_set_consumer_name(gpiod, "pch_vbus");
13891375
1390− dev->vbus_gpio.port = vbus_gpio_port;
1391− gpio_direction_input(vbus_gpio_port);
1376+ dev->vbus_gpio.port = gpiod;
13921377 INIT_WORK(&dev->vbus_gpio.irq_work_fall, pch_vbus_gpio_work_fall);
13931378
1394− irq_num = gpio_to_irq(vbus_gpio_port);
1379+ irq_num = gpiod_to_irq(gpiod);
13951380 if (irq_num > 0) {
13961381 irq_set_irq_type(irq_num, IRQ_TYPE_EDGE_BOTH);
13971382 err = request_irq(irq_num, pch_vbus_gpio_irq, 0,
@@ -1417,9 +1402,6 @@ static void pch_vbus_gpio_free(struct pch_udc_dev *dev) · 19 unmodified lines
14171402 {
14181403 if (dev->vbus_gpio.intr)
14191404 free_irq(dev->vbus_gpio.intr, dev);
1420−
1421− if (dev->vbus_gpio.port)
1422− gpio_free(dev->vbus_gpio.port);
14231405 }
14241406
14251407 /**
@@ -2894,7 +2876,7 @@ static int pch_udc_pcd_init(struct pch_udc_dev *dev) · 1468 unmodified lines
28942876 {
28952877 pch_udc_init(dev);
28962878 pch_udc_pcd_reinit(dev);
2897− pch_vbus_gpio_init(dev, vbus_gpio_port);
2879+ pch_vbus_gpio_init(dev);
28982880 return 0;
28992881 }
29002882
@@ -3096,6 +3078,13 @@ static int pch_udc_probe(struct pci_dev *pdev, · 195 unmodified lines
30963078
30973079 dev->base_addr = pcim_iomap_table(pdev)[bar];
30983080
3081+ /*
3082+ * FIXME: add a GPIO descriptor table to pdev.dev using
3083+ * gpiod_add_descriptor_table() from <linux/gpio/machine.h> based on
3084+ * the PCI subsystem ID. The system-dependent GPIO is necessary for
3085+ * VBUS operation.
3086+ */
3087+
30993088 /* initialize the hardware */
31003089 if (pch_udc_pcd_init(dev))
31013090 return -ENODEV;
drivers/usb/gadget/udc/s3c2410_udc.c+0−3
@@ -1270,7 +1270,6 @@ static int s3c2410_udc_queue(struct usb_ep *_ep, struct usb_request *_req, · 1269 unmodified lines
12701270 static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req)
12711271 {
12721272 struct s3c2410_ep *ep = to_s3c2410_ep(_ep);
1273− struct s3c2410_udc *udc;
12741273 int retval = -EINVAL;
12751274 unsigned long flags;
12761275 struct s3c2410_request *req = NULL;
@@ -1283,8 +1282,6 @@ static int s3c2410_udc_dequeue(struct usb_ep *_ep, struct usb_request *_req) · 6 unmodified lines
12831282 if (!_ep || !_req)
12841283 return retval;
12851284
1286− udc = to_s3c2410_udc(ep->gadget);
1287−
12881285 local_irq_save(flags);
12891286
12901287 list_for_each_entry(req, &ep->queue, queue) {
drivers/usb/gadget/udc/tegra-xudc.c+31−29
@@ -705,11 +705,11 @@ static void tegra_xudc_device_mode_on(struct tegra_xudc *xudc) · 704 unmodified lines
705705
706706 err = phy_power_on(xudc->curr_utmi_phy);
707707 if (err < 0)
708− dev_err(xudc->dev, "utmi power on failed %d\n", err);
708+ dev_err(xudc->dev, "UTMI power on failed: %d\n", err);
709709
710710 err = phy_power_on(xudc->curr_usb3_phy);
711711 if (err < 0)
712− dev_err(xudc->dev, "usb3 phy power on failed %d\n", err);
712+ dev_err(xudc->dev, "USB3 PHY power on failed: %d\n", err);
713713
714714 dev_dbg(xudc->dev, "device mode on\n");
715715
@@ -759,11 +759,11 @@ static void tegra_xudc_device_mode_off(struct tegra_xudc *xudc) · 43 unmodified lines
759759
760760 err = phy_power_off(xudc->curr_utmi_phy);
761761 if (err < 0)
762− dev_err(xudc->dev, "utmi_phy power off failed %d\n", err);
762+ dev_err(xudc->dev, "UTMI PHY power off failed: %d\n", err);
763763
764764 err = phy_power_off(xudc->curr_usb3_phy);
765765 if (err < 0)
766− dev_err(xudc->dev, "usb3_phy power off failed %d\n", err);
766+ dev_err(xudc->dev, "USB3 PHY power off failed: %d\n", err);
767767
768768 pm_runtime_put(xudc->dev);
769769 }
@@ -1539,7 +1539,7 @@ static int __tegra_xudc_ep_set_halt(struct tegra_xudc_ep *ep, bool halt) · 769 unmodified lines
15391539 return -EINVAL;
15401540
15411541 if (usb_endpoint_xfer_isoc(ep->desc)) {
1542− dev_err(xudc->dev, "can't halt isoc EP\n");
1542+ dev_err(xudc->dev, "can't halt isochronous EP\n");
15431543 return -ENOTSUPP;
15441544 }
15451545
@@ -1788,7 +1788,7 @@ static int __tegra_xudc_ep_enable(struct tegra_xudc_ep *ep, · 242 unmodified lines
17881788
17891789 if (usb_endpoint_xfer_isoc(desc)) {
17901790 if (xudc->nr_isoch_eps > XUDC_MAX_ISOCH_EPS) {
1791− dev_err(xudc->dev, "too many isoch endpoints\n");
1791+ dev_err(xudc->dev, "too many isochronous endpoints\n");
17921792 return -EBUSY;
17931793 }
17941794 xudc->nr_isoch_eps++;
@@ -3509,7 +3509,7 @@ static int tegra_xudc_phy_get(struct tegra_xudc *xudc) · 1714 unmodified lines
35093509 if (IS_ERR(xudc->utmi_phy[i])) {
35103510 err = PTR_ERR(xudc->utmi_phy[i]);
35113511 if (err != -EPROBE_DEFER)
3512− dev_err(xudc->dev, "failed to get usb2-%d phy: %d\n",
3512+ dev_err(xudc->dev, "failed to get usb2-%d PHY: %d\n",
35133513 i, err);
35143514
35153515 goto clean_up;
@@ -3539,12 +3539,12 @@ static int tegra_xudc_phy_get(struct tegra_xudc *xudc) · 23 unmodified lines
35393539 if (IS_ERR(xudc->usb3_phy[i])) {
35403540 err = PTR_ERR(xudc->usb3_phy[i]);
35413541 if (err != -EPROBE_DEFER)
3542− dev_err(xudc->dev, "failed to get usb3-%d phy: %d\n",
3542+ dev_err(xudc->dev, "failed to get usb3-%d PHY: %d\n",
35433543 usb3, err);
35443544
35453545 goto clean_up;
35463546 } else if (xudc->usb3_phy[i])
3547− dev_dbg(xudc->dev, "usb3_phy-%d registered", usb3);
3547+ dev_dbg(xudc->dev, "usb3-%d PHY registered", usb3);
35483548 }
35493549
35503550 return err;
@@ -3577,13 +3577,13 @@ static int tegra_xudc_phy_init(struct tegra_xudc *xudc) · 26 unmodified lines
35773577 for (i = 0; i < xudc->soc->num_phys; i++) {
35783578 err = phy_init(xudc->utmi_phy[i]);
35793579 if (err < 0) {
3580− dev_err(xudc->dev, "utmi phy init failed: %d\n", err);
3580+ dev_err(xudc->dev, "UTMI PHY #%u initialization failed: %d\n", i, err);
35813581 goto exit_phy;
35823582 }
35833583
35843584 err = phy_init(xudc->usb3_phy[i]);
35853585 if (err < 0) {
3586− dev_err(xudc->dev, "usb3 phy init failed: %d\n", err);
3586+ dev_err(xudc->dev, "USB3 PHY #%u initialization failed: %d\n", i, err);
35873587 goto exit_phy;
35883588 }
35893589 }
@@ -3692,34 +3692,33 @@ static int tegra_xudc_powerdomain_init(struct tegra_xudc *xudc) · 102 unmodified lines
36923692 struct device *dev = xudc->dev;
36933693 int err;
36943694
3695− xudc->genpd_dev_device = dev_pm_domain_attach_by_name(dev,
3696− "dev");
3695+ xudc->genpd_dev_device = dev_pm_domain_attach_by_name(dev, "dev");
36973696 if (IS_ERR(xudc->genpd_dev_device)) {
36983697 err = PTR_ERR(xudc->genpd_dev_device);
3699− dev_err(dev, "failed to get dev pm-domain: %d\n", err);
3698+ dev_err(dev, "failed to get device power domain: %d\n", err);
37003699 return err;
37013700 }
37023701
37033702 xudc->genpd_dev_ss = dev_pm_domain_attach_by_name(dev, "ss");
37043703 if (IS_ERR(xudc->genpd_dev_ss)) {
37053704 err = PTR_ERR(xudc->genpd_dev_ss);
3706− dev_err(dev, "failed to get superspeed pm-domain: %d\n", err);
3705+ dev_err(dev, "failed to get SuperSpeed power domain: %d\n", err);
37073706 return err;
37083707 }
37093708
37103709 xudc->genpd_dl_device = device_link_add(dev, xudc->genpd_dev_device,
3711− DL_FLAG_PM_RUNTIME |
3712− DL_FLAG_STATELESS);
3710+ DL_FLAG_PM_RUNTIME |
3711+ DL_FLAG_STATELESS);
37133712 if (!xudc->genpd_dl_device) {
3714− dev_err(dev, "adding usb device device link failed!\n");
3713+ dev_err(dev, "failed to add USB device link\n");
37153714 return -ENODEV;
37163715 }
37173716
37183717 xudc->genpd_dl_ss = device_link_add(dev, xudc->genpd_dev_ss,
3719− DL_FLAG_PM_RUNTIME |
3720− DL_FLAG_STATELESS);
3718+ DL_FLAG_PM_RUNTIME |
3719+ DL_FLAG_STATELESS);
37213720 if (!xudc->genpd_dl_ss) {
3722− dev_err(dev, "adding superspeed device link failed!\n");
3721+ dev_err(dev, "failed to add SuperSpeed device link\n");
37233722 return -ENODEV;
37243723 }
37253724
@@ -3733,7 +3732,7 @@ static int tegra_xudc_probe(struct platform_device *pdev) · 7 unmodified lines
37333732 unsigned int i;
37343733 int err;
37353734
3736− xudc = devm_kzalloc(&pdev->dev, sizeof(*xudc), GFP_ATOMIC);
3735+ xudc = devm_kzalloc(&pdev->dev, sizeof(*xudc), GFP_KERNEL);
37373736 if (!xudc)
37383737 return -ENOMEM;
37393738
@@ -3772,18 +3771,19 @@ static int tegra_xudc_probe(struct platform_device *pdev) · 32 unmodified lines
37723771 return err;
37733772 }
37743773
3775− xudc->clks = devm_kcalloc(&pdev->dev, xudc->soc->num_clks,
3776− sizeof(*xudc->clks), GFP_KERNEL);
3774+ xudc->clks = devm_kcalloc(&pdev->dev, xudc->soc->num_clks, sizeof(*xudc->clks),
3775+ GFP_KERNEL);
37773776 if (!xudc->clks)
37783777 return -ENOMEM;
37793778
37803779 for (i = 0; i < xudc->soc->num_clks; i++)
37813780 xudc->clks[i].id = xudc->soc->clock_names[i];
37823781
3783− err = devm_clk_bulk_get(&pdev->dev, xudc->soc->num_clks,
3784− xudc->clks);
3782+ err = devm_clk_bulk_get(&pdev->dev, xudc->soc->num_clks, xudc->clks);
37853783 if (err) {
3786− dev_err(xudc->dev, "failed to request clks %d\n", err);
3784+ if (err != -EPROBE_DEFER)
3785+ dev_err(xudc->dev, "failed to request clocks: %d\n", err);
3786+
37873787 return err;
37883788 }
37893789
@@ -3798,7 +3798,9 @@ static int tegra_xudc_probe(struct platform_device *pdev) · 8 unmodified lines
37983798 err = devm_regulator_bulk_get(&pdev->dev, xudc->soc->num_supplies,
37993799 xudc->supplies);
38003800 if (err) {
3801− dev_err(xudc->dev, "failed to request regulators %d\n", err);
3801+ if (err != -EPROBE_DEFER)
3802+ dev_err(xudc->dev, "failed to request regulators: %d\n", err);
3803+
38023804 return err;
38033805 }
38043806
@@ -3808,7 +3810,7 @@ static int tegra_xudc_probe(struct platform_device *pdev) · 3 unmodified lines
38083810
38093811 err = regulator_bulk_enable(xudc->soc->num_supplies, xudc->supplies);
38103812 if (err) {
3811− dev_err(xudc->dev, "failed to enable regulators %d\n", err);
3813+ dev_err(xudc->dev, "failed to enable regulators: %d\n", err);
38123814 goto put_padctl;
38133815 }
38143816
drivers/usb/host/bcma-hcd.c+1−12
@@ -498,15 +498,4 @@ static struct bcma_driver bcma_hcd_driver = { · 497 unmodified lines
498498 .suspend = bcma_hcd_suspend,
499499 .resume = bcma_hcd_resume,
500500 };
501−
502−static int __init bcma_hcd_init(void)
503−{
504− return bcma_driver_register(&bcma_hcd_driver);
505−}
506−module_init(bcma_hcd_init);
507−
508−static void __exit bcma_hcd_exit(void)
509−{
510− bcma_driver_unregister(&bcma_hcd_driver);
511−}
512−module_exit(bcma_hcd_exit);
501+module_bcma_driver(bcma_hcd_driver);
drivers/usb/host/ehci-npcm7xx.c+3−5
@@ -37,8 +37,7 @@ static const char hcd_name[] = "npcm7xx-ehci"; · 36 unmodified lines
3737
3838 static struct hc_driver __read_mostly ehci_npcm7xx_hc_driver;
3939
40−#ifdef CONFIG_PM_SLEEP
41−static int ehci_npcm7xx_drv_suspend(struct device *dev)
40+static int __maybe_unused ehci_npcm7xx_drv_suspend(struct device *dev)
4241 {
4342 struct usb_hcd *hcd = dev_get_drvdata(dev);
4443 bool do_wakeup = device_may_wakeup(dev);
@@ -46,14 +45,13 @@ static int ehci_npcm7xx_drv_suspend(struct device *dev) · 1 unmodified line
4645 return ehci_suspend(hcd, do_wakeup);
4746 }
4847
49−static int ehci_npcm7xx_drv_resume(struct device *dev)
48+static int __maybe_unused ehci_npcm7xx_drv_resume(struct device *dev)
5049 {
5150 struct usb_hcd *hcd = dev_get_drvdata(dev);
5251
5352 ehci_resume(hcd, false);
5453 return 0;
5554 }
56−#endif /* CONFIG_PM_SLEEP */
5755
5856 static SIMPLE_DEV_PM_OPS(ehci_npcm7xx_pm_ops, ehci_npcm7xx_drv_suspend,
5957 ehci_npcm7xx_drv_resume);
@@ -183,7 +181,7 @@ static struct platform_driver npcm7xx_ehci_hcd_driver = { · 123 unmodified lines
183181 .driver = {
184182 .name = "npcm7xx-ehci",
185183 .bus = &platform_bus_type,
186− .pm = &ehci_npcm7xx_pm_ops,
184+ .pm = pm_ptr(&ehci_npcm7xx_pm_ops),
187185 .of_match_table = npcm7xx_ehci_id_table,
188186 }
189187 };
drivers/usb/host/ehci-platform.c+11−5
@@ -42,6 +42,9 @@ · 41 unmodified lines
4242 #define EHCI_MAX_CLKS 4
4343 #define hcd_to_ehci_priv(h) ((struct ehci_platform_priv *)hcd_to_ehci(h)->priv)
4444
45+#define BCM_USB_FIFO_THRESHOLD 0x00800040
46+#define bcm_iproc_insnreg01 hostpc[0]
47+
4548 struct ehci_platform_priv {
4649 struct clk *clks[EHCI_MAX_CLKS];
4750 struct reset_control *rsts;
@@ -75,6 +78,11 @@ static int ehci_platform_reset(struct usb_hcd *hcd) · 27 unmodified lines
7578
7679 if (pdata->no_io_watchdog)
7780 ehci->need_io_watchdog = 0;
81+
82+ if (of_device_is_compatible(pdev->dev.of_node, "brcm,xgs-iproc-ehci"))
83+ ehci_writel(ehci, BCM_USB_FIFO_THRESHOLD,
84+ &ehci->regs->bcm_iproc_insnreg01);
85+
7886 return 0;
7987 }
8088
@@ -410,8 +418,7 @@ static int ehci_platform_remove(struct platform_device *dev) · 329 unmodified lines
410418 return 0;
411419 }
412420
413−#ifdef CONFIG_PM_SLEEP
414−static int ehci_platform_suspend(struct device *dev)
421+static int __maybe_unused ehci_platform_suspend(struct device *dev)
415422 {
416423 struct usb_hcd *hcd = dev_get_drvdata(dev);
417424 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
@@ -433,7 +440,7 @@ static int ehci_platform_suspend(struct device *dev) · 15 unmodified lines
433440 return ret;
434441 }
435442
436−static int ehci_platform_resume(struct device *dev)
443+static int __maybe_unused ehci_platform_resume(struct device *dev)
437444 {
438445 struct usb_hcd *hcd = dev_get_drvdata(dev);
439446 struct usb_ehci_pdata *pdata = dev_get_platdata(dev);
@@ -464,7 +471,6 @@ static int ehci_platform_resume(struct device *dev) · 24 unmodified lines
464471
465472 return 0;
466473 }
467−#endif /* CONFIG_PM_SLEEP */
468474
469475 static const struct of_device_id vt8500_ehci_ids[] = {
470476 { .compatible = "via,vt8500-ehci", },
@@ -499,7 +505,7 @@ static struct platform_driver ehci_platform_driver = { · 28 unmodified lines
499505 .shutdown = usb_hcd_platform_shutdown,
500506 .driver = {
501507 .name = "ehci-platform",
502− .pm = &ehci_platform_pm_ops,
508+ .pm = pm_ptr(&ehci_platform_pm_ops),
503509 .of_match_table = vt8500_ehci_ids,
504510 .acpi_match_table = ACPI_PTR(ehci_acpi_match),
505511 }
drivers/usb/host/ehci-sched.c+0−20
@@ -307,26 +307,6 @@ static int __maybe_unused same_tt(struct usb_device *dev1, · 306 unmodified lines
307307
308308 #ifdef CONFIG_USB_EHCI_TT_NEWSCHED
309309
310−/* Which uframe does the low/fullspeed transfer start in?
311− *
312− * The parameter is the mask of ssplits in "H-frame" terms
313− * and this returns the transfer start uframe in "B-frame" terms,
314− * which allows both to match, e.g. a ssplit in "H-frame" uframe 0
315− * will cause a transfer in "B-frame" uframe 0. "B-frames" lag
316− * "H-frames" by 1 uframe. See the EHCI spec sec 4.5 and figure 4.7.
317− */
318−static inline unsigned char tt_start_uframe(struct ehci_hcd *ehci, __hc32 mask)
319−{
320− unsigned char smask = hc32_to_cpu(ehci, mask) & QH_SMASK;
321−
322− if (!smask) {
323− ehci_err(ehci, "invalid empty smask!\n");
324− /* uframe 7 can't have bw so this will indicate failure */
325− return 7;
326− }
327− return ffs(smask) - 1;
328−}
329−
330310 static const unsigned char
331311 max_tt_usecs[] = { 125, 125, 125, 125, 125, 125, 30, 0 };
332312
drivers/usb/host/ehci-spear.c+3−5
@@ -34,8 +34,7 @@ struct spear_ehci { · 33 unmodified lines
3434
3535 static struct hc_driver __read_mostly ehci_spear_hc_driver;
3636
37−#ifdef CONFIG_PM_SLEEP
38−static int ehci_spear_drv_suspend(struct device *dev)
37+static int __maybe_unused ehci_spear_drv_suspend(struct device *dev)
3938 {
4039 struct usb_hcd *hcd = dev_get_drvdata(dev);
4140 bool do_wakeup = device_may_wakeup(dev);
@@ -43,14 +42,13 @@ static int ehci_spear_drv_suspend(struct device *dev) · 1 unmodified line
4342 return ehci_suspend(hcd, do_wakeup);
4443 }
4544
46−static int ehci_spear_drv_resume(struct device *dev)
45+static int __maybe_unused ehci_spear_drv_resume(struct device *dev)
4746 {
4847 struct usb_hcd *hcd = dev_get_drvdata(dev);
4948
5049 ehci_resume(hcd, false);
5150 return 0;
5251 }
53−#endif /* CONFIG_PM_SLEEP */
5452
5553 static SIMPLE_DEV_PM_OPS(ehci_spear_pm_ops, ehci_spear_drv_suspend,
5654 ehci_spear_drv_resume);
@@ -155,7 +153,7 @@ static struct platform_driver spear_ehci_hcd_driver = { · 98 unmodified lines
155153 .driver = {
156154 .name = "spear-ehci",
157155 .bus = &platform_bus_type,
158− .pm = &ehci_spear_pm_ops,
156+ .pm = pm_ptr(&ehci_spear_pm_ops),
159157 .of_match_table = spear_ehci_id_table,
160158 }
161159 };
drivers/usb/host/fotg210-hcd.c+9−11
@@ -32,6 +32,7 @@ · 31 unmodified lines
3232 #include <linux/uaccess.h>
3333 #include <linux/platform_device.h>
3434 #include <linux/io.h>
35+#include <linux/iopoll.h>
3536 #include <linux/clk.h>
3637
3738 #include <asm/byteorder.h>
@@ -883,18 +884,15 @@ static int handshake(struct fotg210_hcd *fotg210, void __iomem *ptr, · 845 unmodified lines
883884 u32 mask, u32 done, int usec)
884885 {
885886 u32 result;
887+ int ret;
886888
887− do {
888− result = fotg210_readl(fotg210, ptr);
889− if (result == ~(u32)0) /* card removed */
890− return -ENODEV;
891− result &= mask;
892− if (result == done)
893− return 0;
894− udelay(1);
895− usec--;
896− } while (usec > 0);
897− return -ETIMEDOUT;
889+ ret = readl_poll_timeout_atomic(ptr, result,
890+ ((result & mask) == done ||
891+ result == U32_MAX), 1, usec);
892+ if (result == U32_MAX) /* card removed */
893+ return -ENODEV;
894+
895+ return ret;
898896 }
899897
900898 /* Force HC to halt state from unknown (EHCI spec section 2.3).
drivers/usb/host/ohci-hcd.c+11−7
@@ -102,7 +102,7 @@ static void io_watchdog_func(struct timer_list *t); · 101 unmodified lines
102102
103103
104104 /* Some boards misreport power switching/overcurrent */
105−static bool distrust_firmware = true;
105+static bool distrust_firmware;
106106 module_param (distrust_firmware, bool, 0);
107107 MODULE_PARM_DESC (distrust_firmware,
108108 "true to distrust firmware power/overcurrent setup");
@@ -673,20 +673,24 @@ retry: · 564 unmodified lines
673673
674674 /* handle root hub init quirks ... */
675675 val = roothub_a (ohci);
676− val &= ~(RH_A_PSM | RH_A_OCPM);
676+ /* Configure for per-port over-current protection by default */
677+ val &= ~RH_A_NOCP;
678+ val |= RH_A_OCPM;
677679 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
678− /* NSC 87560 and maybe others */
680+ /* NSC 87560 and maybe others.
681+ * Ganged power switching, no over-current protection.
682+ */
679683 val |= RH_A_NOCP;
680− val &= ~(RH_A_POTPGT | RH_A_NPS);
681− ohci_writel (ohci, val, &ohci->regs->roothub.a);
684+ val &= ~(RH_A_POTPGT | RH_A_NPS | RH_A_PSM | RH_A_OCPM);
682685 } else if ((ohci->flags & OHCI_QUIRK_AMD756) ||
683686 (ohci->flags & OHCI_QUIRK_HUB_POWER)) {
684687 /* hub power always on; required for AMD-756 and some
685− * Mac platforms. ganged overcurrent reporting, if any.
688+ * Mac platforms.
686689 */
687690 val |= RH_A_NPS;
688− ohci_writel (ohci, val, &ohci->regs->roothub.a);
689691 }
692+ ohci_writel(ohci, val, &ohci->regs->roothub.a);
693+
690694 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
691695 ohci_writel (ohci, (val & RH_A_NPS) ? 0 : RH_B_PPCM,
692696 &ohci->regs->roothub.b);
drivers/usb/host/oxu210hp-hcd.c+10−11
@@ -24,6 +24,7 @@ · 23 unmodified lines
2424 #include <linux/moduleparam.h>
2525 #include <linux/dma-mapping.h>
2626 #include <linux/io.h>
27+#include <linux/iopoll.h>
2728
2829 #include <asm/irq.h>
2930 #include <asm/unaligned.h>
@@ -748,18 +749,16 @@ static int handshake(struct oxu_hcd *oxu, void __iomem *ptr, · 718 unmodified lines
748749 u32 mask, u32 done, int usec)
749750 {
750751 u32 result;
752+ int ret;
751753
752− do {
753− result = readl(ptr);
754− if (result == ~(u32)0) /* card removed */
755− return -ENODEV;
756− result &= mask;
757− if (result == done)
758− return 0;
759− udelay(1);
760− usec--;
761− } while (usec > 0);
762− return -ETIMEDOUT;
754+ ret = readl_poll_timeout_atomic(ptr, result,
755+ ((result & mask) == done ||
756+ result == U32_MAX),
757+ 1, usec);
758+ if (result == U32_MAX) /* card removed */
759+ return -ENODEV;
760+
761+ return ret;
763762 }
764763
765764 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
drivers/usb/host/pci-quirks.c+16−19
@@ -16,8 +16,8 @@ · 15 unmodified lines
1616 #include <linux/export.h>
1717 #include <linux/acpi.h>
1818 #include <linux/dmi.h>
19−
20−#include <soc/bcm2835/raspberrypi-firmware.h>
19+#include <linux/of.h>
20+#include <linux/iopoll.h>
2121
2222 #include "pci-quirks.h"
2323 #include "xhci-ext-caps.h"
@@ -1013,15 +1013,9 @@ static int handshake(void __iomem *ptr, u32 mask, u32 done, · 989 unmodified lines
10131013 {
10141014 u32 result;
10151015
1016− do {
1017− result = readl(ptr);
1018− result &= mask;
1019− if (result == done)
1020− return 0;
1021− udelay(delay_usec);
1022− wait_usec -= delay_usec;
1023− } while (wait_usec > 0);
1024− return -ETIMEDOUT;
1016+ return readl_poll_timeout_atomic(ptr, result,
1017+ ((result & mask) == done),
1018+ delay_usec, wait_usec);
10251019 }
10261020
10271021 /*
@@ -1247,7 +1241,8 @@ iounmap: · 219 unmodified lines
12471241
12481242 static void quirk_usb_early_handoff(struct pci_dev *pdev)
12491243 {
1250− int ret;
1244+ struct device_node *parent;
1245+ bool is_rpi;
12511246
12521247 /* Skip Netlogic mips SoC's internal PCI USB controller.
12531248 * This device does not need/support EHCI/OHCI handoff
@@ -1255,14 +1250,16 @@ static void quirk_usb_early_handoff(struct pci_dev *pdev) · 1 unmodified line
12551250 if (pdev->vendor == 0x184e) /* vendor Netlogic */
12561251 return;
12571252
1253+ /*
1254+ * Bypass the Raspberry Pi 4 controller xHCI controller, things are
1255+ * taken care of by the board's co-processor.
1256+ */
12581257 if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
1259− ret = rpi_firmware_init_vl805(pdev);
1260− if (ret) {
1261− /* Firmware might be outdated, or something failed */
1262− dev_warn(&pdev->dev,
1263− "Failed to load VL805's firmware: %d. Will continue to attempt to work, but bad things might happen. You should fix this...\n",
1264− ret);
1265− }
1258+ parent = of_get_parent(pdev->bus->dev.of_node);
1259+ is_rpi = of_device_is_compatible(parent, "brcm,bcm2711-pcie");
1260+ of_node_put(parent);
1261+ if (is_rpi)
1262+ return;
12661263 }
12671264
12681265 if (pdev->class != PCI_CLASS_SERIAL_USB_UHCI &&
drivers/usb/host/xhci-dbgtty.c+3−3
@@ -288,14 +288,14 @@ static const struct tty_operations dbc_tty_ops = { · 287 unmodified lines
288288 .unthrottle = dbc_tty_unthrottle,
289289 };
290290
291−static void dbc_rx_push(unsigned long _port)
291+static void dbc_rx_push(struct tasklet_struct *t)
292292 {
293293 struct dbc_request *req;
294294 struct tty_struct *tty;
295295 unsigned long flags;
296296 bool do_push = false;
297297 bool disconnect = false;
298− struct dbc_port *port = (void *)_port;
298+ struct dbc_port *port = from_tasklet(port, t, push);
299299 struct list_head *queue = &port->read_queue;
300300
301301 spin_lock_irqsave(&port->port_lock, flags);
@@ -382,7 +382,7 @@ xhci_dbc_tty_init_port(struct xhci_dbc *dbc, struct dbc_port *port) · 80 unmodified lines
382382 {
383383 tty_port_init(&port->port);
384384 spin_lock_init(&port->port_lock);
385− tasklet_init(&port->push, dbc_rx_push, (unsigned long)port);
385+ tasklet_setup(&port->push, dbc_rx_push);
386386 INIT_LIST_HEAD(&port->read_pool);
387387 INIT_LIST_HEAD(&port->read_queue);
388388 INIT_LIST_HEAD(&port->write_pool);
drivers/usb/host/xhci-debugfs.c+108−1
@@ -451,9 +451,11 @@ void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci, · 450 unmodified lines
451451 if (!epriv)
452452 return;
453453
454+ epriv->show_ring = dev->eps[ep_index].ring;
455+
454456 snprintf(epriv->name, sizeof(epriv->name), "ep%02d", ep_index);
455457 epriv->root = xhci_debugfs_create_ring_dir(xhci,
456− &dev->eps[ep_index].ring,
458+ &epriv->show_ring,
457459 epriv->name,
458460 spriv->root);
459461 spriv->eps[ep_index] = epriv;
@@ -475,6 +477,111 @@ void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci, · 15 unmodified lines
475477 kfree(epriv);
476478 }
477479
480+static int xhci_stream_id_show(struct seq_file *s, void *unused)
481+{
482+ struct xhci_ep_priv *epriv = s->private;
483+
484+ if (!epriv->stream_info)
485+ return -EPERM;
486+
487+ seq_printf(s, "Show stream ID %d trb ring, supported [1 - %d]\n",
488+ epriv->stream_id, epriv->stream_info->num_streams - 1);
489+
490+ return 0;
491+}
492+
493+static int xhci_stream_id_open(struct inode *inode, struct file *file)
494+{
495+ return single_open(file, xhci_stream_id_show, inode->i_private);
496+}
497+
498+static ssize_t xhci_stream_id_write(struct file *file, const char __user *ubuf,
499+ size_t count, loff_t *ppos)
500+{
501+ struct seq_file *s = file->private_data;
502+ struct xhci_ep_priv *epriv = s->private;
503+ int ret;
504+ u16 stream_id; /* MaxPStreams + 1 <= 16 */
505+
506+ if (!epriv->stream_info)
507+ return -EPERM;
508+
509+ /* Decimal number */
510+ ret = kstrtou16_from_user(ubuf, count, 10, &stream_id);
511+ if (ret)
512+ return ret;
513+
514+ if (stream_id == 0 || stream_id >= epriv->stream_info->num_streams)
515+ return -EINVAL;
516+
517+ epriv->stream_id = stream_id;
518+ epriv->show_ring = epriv->stream_info->stream_rings[stream_id];
519+
520+ return count;
521+}
522+
523+static const struct file_operations stream_id_fops = {
524+ .open = xhci_stream_id_open,
525+ .write = xhci_stream_id_write,
526+ .read = seq_read,
527+ .llseek = seq_lseek,
528+ .release = single_release,
529+};
530+
531+static int xhci_stream_context_array_show(struct seq_file *s, void *unused)
532+{
533+ struct xhci_ep_priv *epriv = s->private;
534+ struct xhci_stream_ctx *stream_ctx;
535+ dma_addr_t dma;
536+ int id;
537+
538+ if (!epriv->stream_info)
539+ return -EPERM;
540+
541+ seq_printf(s, "Allocated %d streams and %d stream context array entries\n",
542+ epriv->stream_info->num_streams,
543+ epriv->stream_info->num_stream_ctxs);
544+
545+ for (id = 0; id < epriv->stream_info->num_stream_ctxs; id++) {
546+ stream_ctx = epriv->stream_info->stream_ctx_array + id;
547+ dma = epriv->stream_info->ctx_array_dma + id * 16;
548+ if (id < epriv->stream_info->num_streams)
549+ seq_printf(s, "%pad stream id %d deq %016llx\n", &dma,
550+ id, le64_to_cpu(stream_ctx->stream_ring));
551+ else
552+ seq_printf(s, "%pad stream context entry not used deq %016llx\n",
553+ &dma, le64_to_cpu(stream_ctx->stream_ring));
554+ }
555+
556+ return 0;
557+}
558+DEFINE_SHOW_ATTRIBUTE(xhci_stream_context_array);
559+
560+void xhci_debugfs_create_stream_files(struct xhci_hcd *xhci,
561+ struct xhci_virt_device *dev,
562+ int ep_index)
563+{
564+ struct xhci_slot_priv *spriv = dev->debugfs_private;
565+ struct xhci_ep_priv *epriv;
566+
567+ if (!spriv || !spriv->eps[ep_index] ||
568+ !dev->eps[ep_index].stream_info)
569+ return;
570+
571+ epriv = spriv->eps[ep_index];
572+ epriv->stream_info = dev->eps[ep_index].stream_info;
573+
574+ /* Show trb ring of stream ID 1 by default */
575+ epriv->stream_id = 1;
576+ epriv->show_ring = epriv->stream_info->stream_rings[1];
577+ debugfs_create_file("stream_id", 0644,
578+ epriv->root, epriv,
579+ &stream_id_fops);
580+ debugfs_create_file("stream_context_array", 0444,
581+ epriv->root, epriv,
582+ &xhci_stream_context_array_fops);
583+}
584+
478585 void xhci_debugfs_create_slot(struct xhci_hcd *xhci, int slot_id)
479586 {
480587 struct xhci_slot_priv *priv;
drivers/usb/host/xhci-debugfs.h+10−0
@@ -91,6 +91,9 @@ struct xhci_file_map { · 90 unmodified lines
9191 struct xhci_ep_priv {
9292 char name[DEBUGFS_NAMELEN];
9393 struct dentry *root;
94+ struct xhci_stream_info *stream_info;
95+ struct xhci_ring *show_ring;
96+ unsigned int stream_id;
9497 };
9598
9699 struct xhci_slot_priv {
@@ -113,6 +116,9 @@ void xhci_debugfs_create_endpoint(struct xhci_hcd *xhci, · 16 unmodified lines
113116 void xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
114117 struct xhci_virt_device *virt_dev,
115118 int ep_index);
119+void xhci_debugfs_create_stream_files(struct xhci_hcd *xhci,
120+ struct xhci_virt_device *virt_dev,
121+ int ep_index);
116122 #else
117123 static inline void xhci_debugfs_init(struct xhci_hcd *xhci) { }
118124 static inline void xhci_debugfs_exit(struct xhci_hcd *xhci) { }
@@ -128,6 +134,10 @@ static inline void · 9 unmodified lines
128134 xhci_debugfs_remove_endpoint(struct xhci_hcd *xhci,
129135 struct xhci_virt_device *virt_dev,
130136 int ep_index) { }
137+static inline void
138+xhci_debugfs_create_stream_files(struct xhci_hcd *xhci,
139+ struct xhci_virt_device *virt_dev,
140+ int ep_index) { }
131141 #endif /* CONFIG_DEBUG_FS */
132142
133143 #endif /* __LINUX_XHCI_DEBUGFS_H */
drivers/usb/host/xhci-mtk.c+3−3
@@ -77,7 +77,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) · 76 unmodified lines
7777 {
7878 struct mu3c_ippc_regs __iomem *ippc = mtk->ippc_regs;
7979 u32 value, check_val;
80− int u3_ports_disabed = 0;
80+ int u3_ports_disabled = 0;
8181 int ret;
8282 int i;
8383
@@ -92,7 +92,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) · 8 unmodified lines
9292 /* power on and enable u3 ports except skipped ones */
9393 for (i = 0; i < mtk->num_u3_ports; i++) {
9494 if ((0x1 << i) & mtk->u3p_dis_msk) {
95− u3_ports_disabed++;
95+ u3_ports_disabled++;
9696 continue;
9797 }
9898
@@ -117,7 +117,7 @@ static int xhci_mtk_host_enable(struct xhci_hcd_mtk *mtk) · 18 unmodified lines
117117 check_val = STS1_SYSPLL_STABLE | STS1_REF_RST |
118118 STS1_SYS125_RST | STS1_XHCI_RST;
119119
120− if (mtk->num_u3_ports > u3_ports_disabed)
120+ if (mtk->num_u3_ports > u3_ports_disabled)
121121 check_val |= STS1_U3_MAC_RST;
122122
123123 ret = readl_poll_timeout(&ippc->ip_pw_sts1, value,
drivers/usb/host/xhci-pci.c+10−0
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include <linux/slab.h>
1313 #include <linux/module.h>
1414 #include <linux/acpi.h>
15+#include <linux/reset.h>
1516
1617 #include "xhci.h"
1718 #include "xhci-trace.h"
@@ -346,6 +347,7 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 328 unmodified lines
346347 struct xhci_hcd *xhci;
347348 struct usb_hcd *hcd;
348349 struct xhci_driver_data *driver_data;
350+ struct reset_control *reset;
349351
350352 driver_data = (struct xhci_driver_data *)id->driver_data;
351353 if (driver_data && driver_data->quirks & XHCI_RENESAS_FW_QUIRK) {
@@ -354,6 +356,11 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 2 unmodified lines
354356 return retval;
355357 }
356358
359+ reset = devm_reset_control_get_optional_exclusive(&dev->dev, NULL);
360+ if (IS_ERR(reset))
361+ return PTR_ERR(reset);
362+ reset_control_reset(reset);
363+
357364 /* Prevent runtime suspending between USB-2 and USB-3 initialization */
358365 pm_runtime_get_noresume(&dev->dev);
359366
@@ -371,6 +378,7 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) · 11 unmodified lines
371378 /* USB 2.0 roothub is stored in the PCI device now. */
372379 hcd = dev_get_drvdata(&dev->dev);
373380 xhci = hcd_to_xhci(hcd);
381+ xhci->reset = reset;
374382 xhci->shared_hcd = usb_create_shared_hcd(&xhci_pci_hc_driver, &dev->dev,
375383 pci_name(dev), hcd);
376384 if (!xhci->shared_hcd) {
@@ -522,6 +530,8 @@ static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) · 145 unmodified lines
522530 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
523531 int retval = 0;
524532
533+ reset_control_reset(xhci->reset);
534+
525535 /* The BIOS on systems with the Intel Panther Point chipset may or may
526536 * not support xHCI natively. That means that during system resume, it
527537 * may switch the ports back to EHCI so that users can use their
drivers/usb/host/xhci-plat.c+33−11
@@ -54,6 +54,16 @@ static int xhci_priv_init_quirk(struct usb_hcd *hcd) · 53 unmodified lines
5454 return priv->init_quirk(hcd);
5555 }
5656
57+static int xhci_priv_suspend_quirk(struct usb_hcd *hcd)
58+{
59+ struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
60+
61+ if (!priv->suspend_quirk)
62+ return 0;
63+
64+ return priv->suspend_quirk(hcd);
65+}
66+
5767 static int xhci_priv_resume_quirk(struct usb_hcd *hcd)
5868 {
5969 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
@@ -173,6 +183,8 @@ static int xhci_plat_probe(struct platform_device *pdev) · 113 unmodified lines
173183 struct usb_hcd *hcd;
174184 int ret;
175185 int irq;
186+ struct xhci_plat_priv *priv = NULL;
187+
176188
177189 if (usb_disabled())
178190 return -ENODEV;
@@ -264,16 +276,18 @@ static int xhci_plat_probe(struct platform_device *pdev) · 85 unmodified lines
264276 if (ret)
265277 goto disable_reg_clk;
266278
267− priv_match = of_device_get_match_data(&pdev->dev);
268− if (priv_match) {
269− struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
279+ if (pdev->dev.of_node)
280+ priv_match = of_device_get_match_data(&pdev->dev);
281+ else
282+ priv_match = dev_get_platdata(&pdev->dev);
270283
284+ if (priv_match) {
285+ priv = hcd_to_xhci_priv(hcd);
271286 /* Just copy data for now */
272− if (priv_match)
273− *priv = *priv_match;
287+ *priv = *priv_match;
274288 }
275289
276− device_wakeup_enable(hcd->self.controller);
290+ device_set_wakeup_capable(&pdev->dev, true);
277291
278292 xhci->main_hcd = hcd;
279293 xhci->shared_hcd = __usb_create_hcd(driver, sysdev, &pdev->dev,
@@ -316,6 +330,9 @@ static int xhci_plat_probe(struct platform_device *pdev) · 36 unmodified lines
316330
317331 hcd->tpl_support = of_usb_host_tpl_support(sysdev->of_node);
318332 xhci->shared_hcd->tpl_support = hcd->tpl_support;
333+ if (priv && (priv->quirks & XHCI_SKIP_PHY_INIT))
334+ hcd->skip_phy_initialization = 1;
335+
319336 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
320337 if (ret)
321338 goto disable_usb_phy;
@@ -397,14 +414,14 @@ static int __maybe_unused xhci_plat_suspend(struct device *dev) · 75 unmodified lines
397414 {
398415 struct usb_hcd *hcd = dev_get_drvdata(dev);
399416 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
417+ int ret;
400418
419+ ret = xhci_priv_suspend_quirk(hcd);
420+ if (ret)
421+ return ret;
401422 /*
402423 * xhci_suspend() needs `do_wakeup` to know whether host is allowed
403− * to do wakeup during suspend. Since xhci_plat_suspend is currently
404− * only designed for system suspend, device_may_wakeup() is enough
405− * to dertermine whether host is allowed to do wakeup. Need to
406− * reconsider this when xhci_plat_suspend enlarges its scope, e.g.,
407− * also applies to runtime suspend.
424+ * to do wakeup during suspend.
408425 */
409426 return xhci_suspend(xhci, device_may_wakeup(dev));
410427 }
@@ -434,6 +451,11 @@ static int __maybe_unused xhci_plat_runtime_suspend(struct device *dev) · 23 unmodified lines
434451 {
435452 struct usb_hcd *hcd = dev_get_drvdata(dev);
436453 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
454+ int ret;
455+
456+ ret = xhci_priv_suspend_quirk(hcd);
457+ if (ret)
458+ return ret;
437459
438460 return xhci_suspend(xhci, true);
439461 }
drivers/usb/host/xhci-plat.h+1−0
@@ -15,6 +15,7 @@ struct xhci_plat_priv { · 14 unmodified lines
1515 unsigned long long quirks;
1616 void (*plat_start)(struct usb_hcd *);
1717 int (*init_quirk)(struct usb_hcd *);
18+ int (*suspend_quirk)(struct usb_hcd *);
1819 int (*resume_quirk)(struct usb_hcd *);
1920 };
2021
drivers/usb/host/xhci-rcar.c+12−31
@@ -6,6 +6,7 @@ · 5 unmodified lines
66 */
77
88 #include <linux/firmware.h>
9+#include <linux/iopoll.h>
910 #include <linux/module.h>
1011 #include <linux/platform_device.h>
1112 #include <linux/of.h>
@@ -127,8 +128,7 @@ static int xhci_rcar_download_firmware(struct usb_hcd *hcd) · 115 unmodified lines
127128 void __iomem *regs = hcd->regs;
128129 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
129130 const struct firmware *fw;
130− int retval, index, j, time;
131− int timeout = 10000;
131+ int retval, index, j;
132132 u32 data, val, temp;
133133 u32 quirks = 0;
134134 const struct soc_device_attribute *attr;
@@ -166,32 +166,19 @@ static int xhci_rcar_download_firmware(struct usb_hcd *hcd) · 31 unmodified lines
166166 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
167167 writel(temp, regs + RCAR_USB3_DL_CTRL);
168168
169− for (time = 0; time < timeout; time++) {
170− val = readl(regs + RCAR_USB3_DL_CTRL);
171− if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
172− break;
173− udelay(1);
174− }
175− if (time == timeout) {
176− retval = -ETIMEDOUT;
169+ retval = readl_poll_timeout_atomic(regs + RCAR_USB3_DL_CTRL,
170+ val, !(val & RCAR_USB3_DL_CTRL_FW_SET_DATA0),
171+ 1, 10000);
172+ if (retval < 0)
177173 break;
178− }
179174 }
180175
181176 temp = readl(regs + RCAR_USB3_DL_CTRL);
182177 temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
183178 writel(temp, regs + RCAR_USB3_DL_CTRL);
184179
185− for (time = 0; time < timeout; time++) {
186− val = readl(regs + RCAR_USB3_DL_CTRL);
187− if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
188− retval = 0;
189− break;
190− }
191− udelay(1);
192− }
193− if (time == timeout)
194− retval = -ETIMEDOUT;
180+ retval = readl_poll_timeout_atomic((regs + RCAR_USB3_DL_CTRL),
181+ val, val & RCAR_USB3_DL_CTRL_FW_SUCCESS, 1, 10000);
195182
196183 release_firmware(fw);
197184
@@ -200,18 +187,12 @@ static int xhci_rcar_download_firmware(struct usb_hcd *hcd) · 2 unmodified lines
200187
201188 static bool xhci_rcar_wait_for_pll_active(struct usb_hcd *hcd)
202189 {
203− int timeout = 1000;
190+ int retval;
204191 u32 val, mask = RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK;
205192
206− while (timeout > 0) {
207− val = readl(hcd->regs + RCAR_USB3_AXH_STA);
208− if ((val & mask) == mask)
209− return true;
210− udelay(1);
211− timeout--;
212− }
213−
214− return false;
193+ retval = readl_poll_timeout_atomic(hcd->regs + RCAR_USB3_AXH_STA,
194+ val, (val & mask) == mask, 1, 1000);
195+ return !retval;
215196 }
216197
217198 /* This function needs to initialize a "phy" of usb before */
drivers/usb/host/xhci-ring.c+19−4
@@ -3736,6 +3736,24 @@ static int xhci_get_isoc_frame_id(struct xhci_hcd *xhci, · 3735 unmodified lines
37363736 return start_frame;
37373737 }
37383738
3739+/* Check if we should generate event interrupt for a TD in an isoc URB */
3740+static bool trb_block_event_intr(struct xhci_hcd *xhci, int num_tds, int i)
3741+{
3742+ if (xhci->hci_version < 0x100)
3743+ return false;
3744+ /* always generate an event interrupt for the last TD */
3745+ if (i == num_tds - 1)
3746+ return false;
3747+ /*
3748+ * If AVOID_BEI is set the host handles full event rings poorly,
3749+ * generate an event at least every 8th TD to clear the event ring
3750+ */
3751+ if (i && xhci->quirks & XHCI_AVOID_BEI)
3752+ return !!(i % 8);
3753+
3754+ return true;
3755+}
3756+
37393757 /* This is for isoc transfer */
37403758 static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
37413759 struct urb *urb, int slot_id, unsigned int ep_index)
@@ -3843,10 +3861,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, · 101 unmodified lines
38433861 more_trbs_coming = false;
38443862 td->last_trb = ep_ring->enqueue;
38453863 field |= TRB_IOC;
3846− /* set BEI, except for the last TD */
3847− if (xhci->hci_version >= 0x100 &&
3848− !(xhci->quirks & XHCI_AVOID_BEI) &&
3849− i < num_tds - 1)
3864+ if (trb_block_event_intr(xhci, num_tds, i))
38503865 field |= TRB_BEI;
38513866 }
38523867 /* Calculate TRB length */
drivers/usb/host/xhci-tegra.c+0−1
@@ -1865,7 +1865,6 @@ static const struct tegra_xusb_phy_type tegra124_phy_types[] = { · 1864 unmodified lines
18651865 };
18661866
18671867 static const unsigned int tegra124_xusb_context_ipfs[] = {
1868− IPFS_XUSB_HOST_MSI_BAR_SZ_0,
18691868 IPFS_XUSB_HOST_MSI_BAR_SZ_0,
18701869 IPFS_XUSB_HOST_MSI_AXI_BAR_ST_0,
18711870 IPFS_XUSB_HOST_MSI_FPCI_BAR_ST_0,
drivers/usb/host/xhci.c+7−4
@@ -982,12 +982,15 @@ int xhci_suspend(struct xhci_hcd *xhci, bool do_wakeup) · 981 unmodified lines
982982 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
983983 return -EINVAL;
984984
985− xhci_dbc_suspend(xhci);
986−
987985 /* Clear root port wake on bits if wakeup not allowed. */
988986 if (!do_wakeup)
989987 xhci_disable_port_wake_on_bits(xhci);
990988
989+ if (!HCD_HW_ACCESSIBLE(hcd))
990+ return 0;
991+
992+ xhci_dbc_suspend(xhci);
993+
991994 /* Don't poll the roothubs on bus suspend. */
992995 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
993996 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
@@ -1915,8 +1918,6 @@ static int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, · 921 unmodified lines
19151918 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
19161919 trace_xhci_add_endpoint(ep_ctx);
19171920
1918− xhci_debugfs_create_endpoint(xhci, virt_dev, ep_index);
1919−
19201921 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x\n",
19211922 (unsigned int) ep->desc.bEndpointAddress,
19221923 udev->slot_id,
@@ -2949,6 +2950,7 @@ static int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) · 1026 unmodified lines
29492950 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
29502951 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
29512952 virt_dev->eps[i].new_ring = NULL;
2953+ xhci_debugfs_create_endpoint(xhci, virt_dev, i);
29522954 }
29532955 command_cleanup:
29542956 kfree(command->completion);
@@ -3531,6 +3533,7 @@ static int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev, · 576 unmodified lines
35313533 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
35323534 udev->slot_id, ep_index);
35333535 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3536+ xhci_debugfs_create_stream_files(xhci, vdev, ep_index);
35343537 }
35353538 xhci_free_command(xhci, config_cmd);
35363539 spin_unlock_irqrestore(&xhci->lock, flags);
drivers/usb/host/xhci.h+3−0
@@ -1770,6 +1770,8 @@ struct xhci_hcd { · 1769 unmodified lines
17701770 /* optional clocks */
17711771 struct clk *clk;
17721772 struct clk *reg_clk;
1773+ /* optional reset controller */
1774+ struct reset_control *reset;
17731775 /* data structures */
17741776 struct xhci_device_context_array *dcbaa;
17751777 struct xhci_ring *cmd_ring;
@@ -1874,6 +1876,7 @@ struct xhci_hcd { · 98 unmodified lines
18741876 #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
18751877 #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
18761878 #define XHCI_RENESAS_FW_QUIRK BIT_ULL(36)
1879+#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
18771880
18781881 unsigned int num_active_eps;
18791882 unsigned int limit_active_eps;
drivers/usb/image/microtek.c+7−7
@@ -389,7 +389,7 @@ void mts_int_submit_urb (struct urb* transfer, · 388 unmodified lines
389389 res = usb_submit_urb( transfer, GFP_ATOMIC );
390390 if ( unlikely(res) ) {
391391 MTS_INT_ERROR( "could not submit URB! Error was %d\n",(int)res );
392− context->srb->result = DID_ERROR << 16;
392+ set_host_byte(context->srb, DID_ERROR);
393393 mts_transfer_cleanup(transfer);
394394 }
395395 }
@@ -438,7 +438,7 @@ static void mts_data_done( struct urb* transfer ) · 42 unmodified lines
438438 scsi_set_resid(context->srb, context->data_length -
439439 transfer->actual_length);
440440 } else if ( unlikely(status) ) {
441− context->srb->result = (status == -ENOENT ? DID_ABORT : DID_ERROR)<<16;
441+ set_host_byte(context->srb, (status == -ENOENT ? DID_ABORT : DID_ERROR));
442442 }
443443
444444 mts_get_status(transfer);
@@ -455,12 +455,12 @@ static void mts_command_done( struct urb *transfer ) · 10 unmodified lines
455455 if (status == -ENOENT) {
456456 /* We are being killed */
457457 MTS_DEBUG_GOT_HERE();
458− context->srb->result = DID_ABORT<<16;
458+ set_host_byte(context->srb, DID_ABORT);
459459 } else {
460460 /* A genuine error has occurred */
461461 MTS_DEBUG_GOT_HERE();
462462
463− context->srb->result = DID_ERROR<<16;
463+ set_host_byte(context->srb, DID_ERROR);
464464 }
465465 mts_transfer_cleanup(transfer);
466466
@@ -495,7 +495,7 @@ static void mts_do_sg (struct urb* transfer) · 28 unmodified lines
495495 scsi_sg_count(context->srb));
496496
497497 if (unlikely(status)) {
498− context->srb->result = (status == -ENOENT ? DID_ABORT : DID_ERROR)<<16;
498+ set_host_byte(context->srb, (status == -ENOENT ? DID_ABORT : DID_ERROR));
499499 mts_transfer_cleanup(transfer);
500500 }
501501
@@ -578,7 +578,7 @@ mts_scsi_queuecommand_lck(struct scsi_cmnd *srb, mts_scsi_cmnd_callback callback · 76 unmodified lines
578578
579579 MTS_DEBUG("this device doesn't exist\n");
580580
581− srb->result = DID_BAD_TARGET << 16;
581+ set_host_byte(srb, DID_BAD_TARGET);
582582
583583 if(likely(callback != NULL))
584584 callback(srb);
@@ -605,7 +605,7 @@ mts_scsi_queuecommand_lck(struct scsi_cmnd *srb, mts_scsi_cmnd_callback callback · 20 unmodified lines
605605
606606 if(unlikely(res)){
607607 MTS_ERROR("error %d submitting URB\n",(int)res);
608− srb->result = DID_ERROR << 16;
608+ set_host_byte(srb, DID_ERROR);
609609
610610 if(likely(callback != NULL))
611611 callback(srb);
drivers/usb/isp1760/isp1760-hcd.c+9−11
@@ -22,6 +22,7 @@ · 21 unmodified lines
2222 #include <linux/debugfs.h>
2323 #include <linux/uaccess.h>
2424 #include <linux/io.h>
25+#include <linux/iopoll.h>
2526 #include <linux/mm.h>
2627 #include <linux/timer.h>
2728 #include <asm/unaligned.h>
@@ -380,18 +381,15 @@ static int handshake(struct usb_hcd *hcd, u32 reg, · 352 unmodified lines
380381 u32 mask, u32 done, int usec)
381382 {
382383 u32 result;
384+ int ret;
385+
386+ ret = readl_poll_timeout_atomic(hcd->regs + reg, result,
387+ ((result & mask) == done ||
388+ result == U32_MAX), 1, usec);
389+ if (result == U32_MAX)
390+ return -ENODEV;
383391
384− do {
385− result = reg_read32(hcd->regs, reg);
386− if (result == ~0)
387− return -ENODEV;
388− result &= mask;
389− if (result == done)
390− return 0;
391− udelay(1);
392− usec--;
393− } while (usec > 0);
394− return -ETIMEDOUT;
392+ return ret;
395393 }
396394
397395 /* reset a non-running (STS_HALT == 1) controller */
drivers/usb/misc/adutux.c+1−0
@@ -209,6 +209,7 @@ static void adu_interrupt_out_callback(struct urb *urb) · 208 unmodified lines
209209
210210 if (status != 0) {
211211 if ((status != -ENOENT) &&
212+ (status != -ESHUTDOWN) &&
212213 (status != -ECONNRESET)) {
213214 dev_dbg(&dev->udev->dev,
214215 "%s :nonzero status received: %d\n", __func__,
drivers/usb/misc/appledisplay.c+1−13
@@ -342,20 +342,8 @@ static struct usb_driver appledisplay_driver = { · 341 unmodified lines
342342 .disconnect = appledisplay_disconnect,
343343 .id_table = appledisplay_table,
344344 };
345−
346−static int __init appledisplay_init(void)
347−{
348− return usb_register(&appledisplay_driver);
349−}
350−
351−static void __exit appledisplay_exit(void)
352−{
353− usb_deregister(&appledisplay_driver);
354−}
345+module_usb_driver(appledisplay_driver);
355346
356347 MODULE_AUTHOR("Michael Hanselmann");
357348 MODULE_DESCRIPTION("Apple Cinema Display driver");
358349 MODULE_LICENSE("GPL");
359−
360−module_init(appledisplay_init);
361−module_exit(appledisplay_exit);
drivers/usb/misc/legousbtower.c+20−41
@@ -308,15 +308,9 @@ static int tower_open(struct inode *inode, struct file *file) · 307 unmodified lines
308308 int subminor;
309309 int retval = 0;
310310 struct usb_interface *interface;
311− struct tower_reset_reply *reset_reply;
311+ struct tower_reset_reply reset_reply;
312312 int result;
313313
314− reset_reply = kmalloc(sizeof(*reset_reply), GFP_KERNEL);
315− if (!reset_reply) {
316− retval = -ENOMEM;
317− goto exit;
318− }
319−
320314 nonseekable_open(inode, file);
321315 subminor = iminor(inode);
322316
@@ -347,15 +341,12 @@ static int tower_open(struct inode *inode, struct file *file) · 24 unmodified lines
347341 }
348342
349343 /* reset the tower */
350− result = usb_control_msg(dev->udev,
351− usb_rcvctrlpipe(dev->udev, 0),
352− LEGO_USB_TOWER_REQUEST_RESET,
353− USB_TYPE_VENDOR | USB_DIR_IN | USB_RECIP_DEVICE,
354− 0,
355− 0,
356− reset_reply,
357− sizeof(*reset_reply),
358− 1000);
344+ result = usb_control_msg_recv(dev->udev, 0,
345+ LEGO_USB_TOWER_REQUEST_RESET,
346+ USB_TYPE_VENDOR | USB_DIR_IN | USB_RECIP_DEVICE,
347+ 0, 0,
348+ &reset_reply, sizeof(reset_reply), 1000,
349+ GFP_KERNEL);
359350 if (result < 0) {
360351 dev_err(&dev->udev->dev,
361352 "LEGO USB Tower reset control request failed\n");
@@ -394,7 +385,6 @@ unlock_exit: · 32 unmodified lines
394385 mutex_unlock(&dev->lock);
395386
396387 exit:
397− kfree(reset_reply);
398388 return retval;
399389 }
400390
@@ -753,7 +743,7 @@ static int tower_probe(struct usb_interface *interface, const struct usb_device_ · 352 unmodified lines
753743 struct device *idev = &interface->dev;
754744 struct usb_device *udev = interface_to_usbdev(interface);
755745 struct lego_usb_tower *dev;
756− struct tower_get_version_reply *get_version_reply = NULL;
746+ struct tower_get_version_reply get_version_reply;
757747 int retval = -ENOMEM;
758748 int result;
759749
@@ -798,34 +788,25 @@ static int tower_probe(struct usb_interface *interface, const struct usb_device_ · 38 unmodified lines
798788 dev->interrupt_in_interval = interrupt_in_interval ? interrupt_in_interval : dev->interrupt_in_endpoint->bInterval;
799789 dev->interrupt_out_interval = interrupt_out_interval ? interrupt_out_interval : dev->interrupt_out_endpoint->bInterval;
800790
801− get_version_reply = kmalloc(sizeof(*get_version_reply), GFP_KERNEL);
802− if (!get_version_reply) {
803− retval = -ENOMEM;
804− goto error;
805− }
806−
807791 /* get the firmware version and log it */
808− result = usb_control_msg(udev,
809− usb_rcvctrlpipe(udev, 0),
810− LEGO_USB_TOWER_REQUEST_GET_VERSION,
811− USB_TYPE_VENDOR | USB_DIR_IN | USB_RECIP_DEVICE,
812− 0,
813− 0,
814− get_version_reply,
815− sizeof(*get_version_reply),
816− 1000);
817− if (result != sizeof(*get_version_reply)) {
818− if (result >= 0)
819− result = -EIO;
792+ result = usb_control_msg_recv(udev, 0,
793+ LEGO_USB_TOWER_REQUEST_GET_VERSION,
794+ USB_TYPE_VENDOR | USB_DIR_IN | USB_RECIP_DEVICE,
795+ 0,
796+ 0,
797+ &get_version_reply,
798+ sizeof(get_version_reply),
799+ 1000, GFP_KERNEL);
800+ if (!result) {
820801 dev_err(idev, "get version request failed: %d\n", result);
821802 retval = result;
822803 goto error;
823804 }
824805 dev_info(&interface->dev,
825806 "LEGO USB Tower firmware version is %d.%d build %d\n",
826− get_version_reply->major,
827− get_version_reply->minor,
828− le16_to_cpu(get_version_reply->build_no));
807+ get_version_reply.major,
808+ get_version_reply.minor,
809+ le16_to_cpu(get_version_reply.build_no));
829810
830811 /* we can register the device now, as it is ready */
831812 usb_set_intfdata(interface, dev);
@@ -844,11 +825,9 @@ static int tower_probe(struct usb_interface *interface, const struct usb_device_ · 12 unmodified lines
844825 USB_MAJOR, dev->minor);
845826
846827 exit:
847− kfree(get_version_reply);
848828 return retval;
849829
850830 error:
851− kfree(get_version_reply);
852831 tower_delete(dev);
853832 return retval;
854833 }
drivers/usb/misc/usb3503.c+8−10
@@ -322,8 +322,7 @@ static int usb3503_platform_remove(struct platform_device *pdev) · 321 unmodified lines
322322 return 0;
323323 }
324324
325−#ifdef CONFIG_PM_SLEEP
326−static int usb3503_suspend(struct usb3503 *hub)
325+static int __maybe_unused usb3503_suspend(struct usb3503 *hub)
327326 {
328327 usb3503_switch_mode(hub, USB3503_MODE_STANDBY);
329328 clk_disable_unprepare(hub->clk);
@@ -331,7 +330,7 @@ static int usb3503_suspend(struct usb3503 *hub) · 1 unmodified line
331330 return 0;
332331 }
333332
334−static int usb3503_resume(struct usb3503 *hub)
333+static int __maybe_unused usb3503_resume(struct usb3503 *hub)
335334 {
336335 clk_prepare_enable(hub->clk);
337336 usb3503_switch_mode(hub, hub->mode);
@@ -339,30 +338,29 @@ static int usb3503_resume(struct usb3503 *hub) · 1 unmodified line
339338 return 0;
340339 }
341340
342−static int usb3503_i2c_suspend(struct device *dev)
341+static int __maybe_unused usb3503_i2c_suspend(struct device *dev)
343342 {
344343 struct i2c_client *client = to_i2c_client(dev);
345344
346345 return usb3503_suspend(i2c_get_clientdata(client));
347346 }
348347
349−static int usb3503_i2c_resume(struct device *dev)
348+static int __maybe_unused usb3503_i2c_resume(struct device *dev)
350349 {
351350 struct i2c_client *client = to_i2c_client(dev);
352351
353352 return usb3503_resume(i2c_get_clientdata(client));
354353 }
355354
356−static int usb3503_platform_suspend(struct device *dev)
355+static int __maybe_unused usb3503_platform_suspend(struct device *dev)
357356 {
358357 return usb3503_suspend(dev_get_drvdata(dev));
359358 }
360359
361−static int usb3503_platform_resume(struct device *dev)
360+static int __maybe_unused usb3503_platform_resume(struct device *dev)
362361 {
363362 return usb3503_resume(dev_get_drvdata(dev));
364363 }
365−#endif
366364
367365 static SIMPLE_DEV_PM_OPS(usb3503_i2c_pm_ops, usb3503_i2c_suspend,
368366 usb3503_i2c_resume);
@@ -388,7 +386,7 @@ MODULE_DEVICE_TABLE(of, usb3503_of_match); · 19 unmodified lines
388386 static struct i2c_driver usb3503_i2c_driver = {
389387 .driver = {
390388 .name = USB3503_I2C_NAME,
391− .pm = &usb3503_i2c_pm_ops,
389+ .pm = pm_ptr(&usb3503_i2c_pm_ops),
392390 .of_match_table = of_match_ptr(usb3503_of_match),
393391 },
394392 .probe = usb3503_i2c_probe,
@@ -400,7 +398,7 @@ static struct platform_driver usb3503_platform_driver = { · 5 unmodified lines
400398 .driver = {
401399 .name = USB3503_I2C_NAME,
402400 .of_match_table = of_match_ptr(usb3503_of_match),
403− .pm = &usb3503_platform_pm_ops,
401+ .pm = pm_ptr(&usb3503_platform_pm_ops),
404402 },
405403 .probe = usb3503_platform_probe,
406404 .remove = usb3503_platform_remove,
drivers/usb/misc/usb4604.c+3−5
@@ -112,8 +112,7 @@ static int usb4604_i2c_probe(struct i2c_client *i2c, · 111 unmodified lines
112112 return usb4604_probe(hub);
113113 }
114114
115−#ifdef CONFIG_PM_SLEEP
116−static int usb4604_i2c_suspend(struct device *dev)
115+static int __maybe_unused usb4604_i2c_suspend(struct device *dev)
117116 {
118117 struct i2c_client *client = to_i2c_client(dev);
119118 struct usb4604 *hub = i2c_get_clientdata(client);
@@ -123,7 +122,7 @@ static int usb4604_i2c_suspend(struct device *dev) · 3 unmodified lines
123122 return 0;
124123 }
125124
126−static int usb4604_i2c_resume(struct device *dev)
125+static int __maybe_unused usb4604_i2c_resume(struct device *dev)
127126 {
128127 struct i2c_client *client = to_i2c_client(dev);
129128 struct usb4604 *hub = i2c_get_clientdata(client);
@@ -132,7 +131,6 @@ static int usb4604_i2c_resume(struct device *dev) · 2 unmodified lines
132131
133132 return 0;
134133 }
135−#endif
136134
137135 static SIMPLE_DEV_PM_OPS(usb4604_i2c_pm_ops, usb4604_i2c_suspend,
138136 usb4604_i2c_resume);
@@ -154,7 +152,7 @@ MODULE_DEVICE_TABLE(of, usb4604_of_match); · 15 unmodified lines
154152 static struct i2c_driver usb4604_i2c_driver = {
155153 .driver = {
156154 .name = "usb4604",
157− .pm = &usb4604_i2c_pm_ops,
155+ .pm = pm_ptr(&usb4604_i2c_pm_ops),
158156 .of_match_table = of_match_ptr(usb4604_of_match),
159157 },
160158 .probe = usb4604_i2c_probe,
drivers/usb/misc/usblcd.c+0−1
@@ -187,7 +187,6 @@ static long lcd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 186 unmodified lines
187187 break;
188188 default:
189189 return -ENOTTY;
190− break;
191190 }
192191
193192 return 0;
drivers/usb/misc/yurex.c+2−4
@@ -96,15 +96,13 @@ static void yurex_delete(struct kref *kref) · 95 unmodified lines
9696 if (dev->cntl_urb) {
9797 usb_kill_urb(dev->cntl_urb);
9898 kfree(dev->cntl_req);
99− if (dev->cntl_buffer)
100− usb_free_coherent(dev->udev, YUREX_BUF_SIZE,
99+ usb_free_coherent(dev->udev, YUREX_BUF_SIZE,
101100 dev->cntl_buffer, dev->cntl_urb->transfer_dma);
102101 usb_free_urb(dev->cntl_urb);
103102 }
104103 if (dev->urb) {
105104 usb_kill_urb(dev->urb);
106− if (dev->int_buffer)
107− usb_free_coherent(dev->udev, YUREX_BUF_SIZE,
105+ usb_free_coherent(dev->udev, YUREX_BUF_SIZE,
108106 dev->int_buffer, dev->urb->transfer_dma);
109107 usb_free_urb(dev->urb);
110108 }
drivers/usb/mtu3/mtu3.h+0−6
@@ -370,12 +370,6 @@ static inline struct mtu3 *gadget_to_mtu3(struct usb_gadget *g) · 369 unmodified lines
370370 return container_of(g, struct mtu3, g);
371371 }
372372
373−static inline int is_first_entry(const struct list_head *list,
374− const struct list_head *head)
375−{
376− return list_is_last(head, list);
377−}
378−
379373 static inline struct mtu3_request *to_mtu3_request(struct usb_request *req)
380374 {
381375 return req ? container_of(req, struct mtu3_request, request) : NULL;
drivers/usb/musb/musb_gadget_ep0.c+1−1
@@ -1024,7 +1024,7 @@ static int musb_g_ep0_halt(struct usb_ep *e, int value) · 1023 unmodified lines
10241024 case MUSB_EP0_STAGE_ACKWAIT: /* STALL for zero-length data */
10251025 case MUSB_EP0_STAGE_RX: /* control-OUT data */
10261026 csr = musb_readw(regs, MUSB_CSR0);
1027− /* FALLTHROUGH */
1027+ fallthrough;
10281028
10291029 /* It's also OK to issue stalls during callbacks when a non-empty
10301030 * DATA stage buffer has been read (or even written).
drivers/usb/phy/phy-ab8500-usb.c+1−1
@@ -518,7 +518,7 @@ static int ab8500_usb_link_status_update(struct ab8500_usb *ab, · 517 unmodified lines
518518 * 3. Enable AB regulators
519519 * 4. Enable USB phy
520520 * 5. Reset the musb controller
521− * 6. Switch the ULPI GPIO pins to fucntion mode
521+ * 6. Switch the ULPI GPIO pins to function mode
522522 * 7. Enable the musb Peripheral5 clock
523523 * 8. Restore MUSB context
524524 */
drivers/usb/phy/phy-mv-usb.c+8−10
@@ -8,6 +8,7 @@ · 7 unmodified lines
88 #include <linux/module.h>
99 #include <linux/kernel.h>
1010 #include <linux/io.h>
11+#include <linux/iopoll.h>
1112 #include <linux/uaccess.h>
1213 #include <linux/device.h>
1314 #include <linux/proc_fs.h>
@@ -135,8 +136,8 @@ static int mv_otg_set_timer(struct mv_otg *mvotg, unsigned int id, · 121 unmodified lines
135136
136137 static int mv_otg_reset(struct mv_otg *mvotg)
137138 {
138− unsigned int loops;
139139 u32 tmp;
140+ int ret;
140141
141142 /* Stop the controller */
142143 tmp = readl(&mvotg->op_regs->usbcmd);
@@ -146,15 +147,12 @@ static int mv_otg_reset(struct mv_otg *mvotg) · 3 unmodified lines
146147 /* Reset the controller to get default values */
147148 writel(USBCMD_CTRL_RESET, &mvotg->op_regs->usbcmd);
148149
149− loops = 500;
150− while (readl(&mvotg->op_regs->usbcmd) & USBCMD_CTRL_RESET) {
151− if (loops == 0) {
152− dev_err(&mvotg->pdev->dev,
153− "Wait for RESET completed TIMEOUT\n");
154− return -ETIMEDOUT;
155− }
156− loops--;
157− udelay(20);
150+ ret = readl_poll_timeout_atomic(&mvotg->op_regs->usbcmd, tmp,
151+ (tmp & USBCMD_CTRL_RESET), 10, 10000);
152+ if (ret < 0) {
153+ dev_err(&mvotg->pdev->dev,
154+ "Wait for RESET completed TIMEOUT\n");
155+ return ret;
158156 }
159157
160158 writel(0x0, &mvotg->op_regs->usbintr);
drivers/usb/phy/phy-ulpi-viewport.c+3−9
@@ -7,6 +7,7 @@ · 6 unmodified lines
77 #include <linux/kernel.h>
88 #include <linux/usb.h>
99 #include <linux/io.h>
10+#include <linux/iopoll.h>
1011 #include <linux/usb/otg.h>
1112 #include <linux/usb/ulpi.h>
1213
@@ -20,16 +21,9 @@ · 7 unmodified lines
2021
2122 static int ulpi_viewport_wait(void __iomem *view, u32 mask)
2223 {
23− unsigned long usec = 2000;
24+ u32 val;
2425
25− while (usec--) {
26− if (!(readl(view) & mask))
27− return 0;
28−
29− udelay(1);
30− }
31−
32− return -ETIMEDOUT;
26+ return readl_poll_timeout_atomic(view, val, !(val & mask), 1, 2000);
3327 }
3428
3529 static int ulpi_viewport_read(struct usb_phy *otg, u32 reg)
drivers/usb/serial/ftdi_sio.c+20−17
@@ -1037,6 +1037,11 @@ static const struct usb_device_id id_table_combined[] = { · 1036 unmodified lines
10371037 /* U-Blox devices */
10381038 { USB_DEVICE(UBLOX_VID, UBLOX_C099F9P_ZED_PID) },
10391039 { USB_DEVICE(UBLOX_VID, UBLOX_C099F9P_ODIN_PID) },
1040+ /* FreeCalypso USB adapters */
1041+ { USB_DEVICE(FTDI_VID, FTDI_FALCONIA_JTAG_BUF_PID),
1042+ .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
1043+ { USB_DEVICE(FTDI_VID, FTDI_FALCONIA_JTAG_UNBUF_PID),
1044+ .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
10401045 { } /* Terminating entry */
10411046 };
10421047
@@ -1566,7 +1571,8 @@ static void ftdi_determine_type(struct usb_serial_port *port) · 523 unmodified lines
15661571 dev_dbg(&port->dev, "%s: bcdDevice = 0x%x, bNumInterfaces = %u\n", __func__,
15671572 version, interfaces);
15681573 if (interfaces > 1) {
1569− int inter;
1574+ struct usb_interface *intf = serial->interface;
1575+ int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
15701576
15711577 /* Multiple interfaces.*/
15721578 if (version == 0x0800) {
@@ -1581,16 +1587,15 @@ static void ftdi_determine_type(struct usb_serial_port *port) · 8 unmodified lines
15811587 priv->chip_type = FT2232C;
15821588
15831589 /* Determine interface code. */
1584− inter = serial->interface->altsetting->desc.bInterfaceNumber;
1585− if (inter == 0) {
1590+ if (ifnum == 0)
15861591 priv->interface = INTERFACE_A;
1587− } else if (inter == 1) {
1592+ else if (ifnum == 1)
15881593 priv->interface = INTERFACE_B;
1589− } else if (inter == 2) {
1594+ else if (ifnum == 2)
15901595 priv->interface = INTERFACE_C;
1591− } else if (inter == 3) {
1596+ else if (ifnum == 3)
15921597 priv->interface = INTERFACE_D;
1593− }
1598+
15941599 /* BM-type devices have a bug where bcdDevice gets set
15951600 * to 0x200 when iSerialNumber is 0. */
15961601 if (version < 0x500) {
@@ -2330,12 +2335,11 @@ static int ftdi_NDI_device_setup(struct usb_serial *serial) · 733 unmodified lines
23302335 */
23312336 static int ftdi_jtag_probe(struct usb_serial *serial)
23322337 {
2333− struct usb_device *udev = serial->dev;
2334− struct usb_interface *interface = serial->interface;
2338+ struct usb_interface *intf = serial->interface;
2339+ int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
23352340
2336− if (interface == udev->actconfig->interface[0]) {
2337− dev_info(&udev->dev,
2338− "Ignoring serial port reserved for JTAG\n");
2341+ if (ifnum == 0) {
2342+ dev_info(&intf->dev, "Ignoring interface reserved for JTAG\n");
23392343 return -ENODEV;
23402344 }
23412345
@@ -2367,12 +2371,11 @@ static int ftdi_8u2232c_probe(struct usb_serial *serial) · 25 unmodified lines
23672371 */
23682372 static int ftdi_stmclite_probe(struct usb_serial *serial)
23692373 {
2370− struct usb_device *udev = serial->dev;
2371− struct usb_interface *interface = serial->interface;
2374+ struct usb_interface *intf = serial->interface;
2375+ int ifnum = intf->cur_altsetting->desc.bInterfaceNumber;
23722376
2373− if (interface == udev->actconfig->interface[0] ||
2374− interface == udev->actconfig->interface[1]) {
2375− dev_info(&udev->dev, "Ignoring serial port reserved for JTAG\n");
2377+ if (ifnum < 2) {
2378+ dev_info(&intf->dev, "Ignoring interface reserved for JTAG\n");
23762379 return -ENODEV;
23772380 }
23782381
drivers/usb/serial/ftdi_sio_ids.h+7−0
@@ -39,6 +39,13 @@ · 38 unmodified lines
3939
4040 #define FTDI_LUMEL_PD12_PID 0x6002
4141
42+/*
43+ * Custom USB adapters made by Falconia Partners LLC
44+ * for FreeCalypso project, ID codes allocated to Falconia by FTDI.
45+ */
46+#define FTDI_FALCONIA_JTAG_BUF_PID 0x7150
47+#define FTDI_FALCONIA_JTAG_UNBUF_PID 0x7151
48+
4249 /* Sienna Serial Interface by Secyourit GmbH */
4350 #define FTDI_SIENNA_PID 0x8348
4451
drivers/usb/serial/mos7720.c+4−4
@@ -282,11 +282,12 @@ static void destroy_urbtracker(struct kref *kref) · 281 unmodified lines
282282 * port callback had to be deferred because the disconnect mutex could not be
283283 * obtained at the time.

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