History

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar. * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/smp: Fix topology checks on AMD MCM CPUs x86/mm: Fix some kernel-doc warnings x86, um: Correct syscall table type attributes breaking gcc 4.8

Linus Torvalds committed 14 years ago

Commit c83119a2 parents ed21a66 161270f4 files · +10 −7Browse files

Unified · Split

4 files
  1. arch/x86/kernel/smpboot.c +5 −2
  2. arch/x86/mm/ioremap.c +2 −2
  3. arch/x86/mm/pageattr.c +1 −1
  4. arch/x86/um/sys_call_table_32.c +2 −2
arch/x86/kernel/smpboot.c+5−2
@@ -349,9 +349,12 @@ static bool __cpuinit match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) · 348 unmodified lines
349 349
350static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)350static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
351{351{
352 if (c->phys_proc_id == o->phys_proc_id)352 if (c->phys_proc_id == o->phys_proc_id) {
353 return topology_sane(c, o, "mc");353 if (cpu_has(c, X86_FEATURE_AMD_DCM))
354 return true;
354 355
356 return topology_sane(c, o, "mc");
357 }
355 return false;358 return false;
356}359}
357 360
arch/x86/mm/ioremap.c+2−2
@@ -180,7 +180,7 @@ err_free_memtype: · 179 unmodified lines
180 180
181/**181/**
182 * ioremap_nocache - map bus memory into CPU space182 * ioremap_nocache - map bus memory into CPU space
183 * @offset: bus address of the memory183 * @phys_addr: bus address of the memory
184 * @size: size of the resource to map184 * @size: size of the resource to map
185 *185 *
186 * ioremap_nocache performs a platform specific sequence of operations to186 * ioremap_nocache performs a platform specific sequence of operations to
@@ -217,7 +217,7 @@ EXPORT_SYMBOL(ioremap_nocache); · 30 unmodified lines
217 217
218/**218/**
219 * ioremap_wc - map memory into CPU space write combined219 * ioremap_wc - map memory into CPU space write combined
220 * @offset: bus address of the memory220 * @phys_addr: bus address of the memory
221 * @size: size of the resource to map221 * @size: size of the resource to map
222 *222 *
223 * This version of ioremap ensures that the memory is marked write combining.223 * This version of ioremap ensures that the memory is marked write combining.
arch/x86/mm/pageattr.c+1−1
@@ -122,7 +122,7 @@ within(unsigned long addr, unsigned long start, unsigned long end) · 121 unmodified lines
122 122
123/**123/**
124 * clflush_cache_range - flush a cache range with clflush124 * clflush_cache_range - flush a cache range with clflush
125 * @addr: virtual start address125 * @vaddr: virtual start address
126 * @size: number of bytes to flush126 * @size: number of bytes to flush
127 *127 *
128 * clflush is an unordered instruction which needs fencing with mfence128 * clflush is an unordered instruction which needs fencing with mfence
arch/x86/um/sys_call_table_32.c+2−2
@@ -39,9 +39,9 @@ · 38 unmodified lines
39#undef __SYSCALL_I38639#undef __SYSCALL_I386
40#define __SYSCALL_I386(nr, sym, compat) [ nr ] = sym,40#define __SYSCALL_I386(nr, sym, compat) [ nr ] = sym,
41 41
42typedef void (*sys_call_ptr_t)(void);42typedef asmlinkage void (*sys_call_ptr_t)(void);
43 43
44extern void sys_ni_syscall(void);44extern asmlinkage void sys_ni_syscall(void);
45 45
46const sys_call_ptr_t sys_call_table[] __cacheline_aligned = {46const sys_call_ptr_t sys_call_table[] __cacheline_aligned = {
47 /*47 /*