History

Merge 5.8-rc7 into usb-next

We want the USB fixes in here as well.

Greg Kroah-Hartman committed 6 years ago

Commit c9779302 parents 9a360a7 92ed301303 files · +3457 −3165Browse files

Unified · Split

303 files
  1. .mailmap +3 −0
  2. Documentation/ABI/testing/debugfs-driver-habanalabs +10 −1
  3. Documentation/devicetree/bindings/sound/simple-card.yaml +13 −4
  4. Documentation/driver-api/ptp.rst +12 −0
  5. Documentation/networking/bareudp.rst +13 −6
  6. MAINTAINERS +17 −4
  7. Makefile +3 −3
  8. arch/arm64/Makefile +1 −1
  9. arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +1 −4
  10. arch/arm64/kernel/vdso32/Makefile +1 −1
  11. arch/parisc/include/asm/atomic.h +2 −0
  12. arch/parisc/include/asm/cmpxchg.h +2 −0
  13. arch/parisc/lib/bitops.c +12 −0
  14. arch/riscv/mm/init.c +45 −21
  15. arch/riscv/mm/kasan_init.c +2 −2
  16. arch/s390/kernel/perf_cpum_cf_events.c +2 −2
  17. arch/x86/include/asm/iosf_mbi.h +1 −0
  18. arch/x86/kernel/dumpstack.c +17 −10
  19. arch/x86/kernel/fpu/xstate.c +1 −1
  20. arch/x86/kernel/stacktrace.c +0 −5
  21. arch/x86/kernel/unwind_orc.c +6 −2
  22. arch/x86/kernel/vmlinux.lds.S +1 −0
  23. arch/xtensa/include/asm/checksum.h +1 −1
  24. drivers/android/binder_alloc.c +1 −1
  25. drivers/base/property.c +1 −1
  26. drivers/bus/ti-sysc.c +22 −0
  27. drivers/char/mem.c +7 −3
  28. drivers/clocksource/timer-ti-dm-systimer.c +36 −10
  29. drivers/crypto/chelsio/chtls/chtls_cm.c +1 −1
  30. drivers/crypto/chelsio/chtls/chtls_io.c +4 −3
  31. drivers/firmware/efi/efi-pstore.c +1 −4
  32. drivers/firmware/efi/efi.c +8 −4
  33. drivers/firmware/efi/efivars.c +1 −4
  34. drivers/firmware/efi/libstub/Makefile +1 −2
  35. drivers/firmware/efi/libstub/alignedmem.c +1 −1
  36. drivers/firmware/efi/libstub/efi-stub.c +0 −17
  37. drivers/firmware/efi/libstub/efistub.h +16 −0
  38. drivers/firmware/efi/libstub/x86-stub.c +4 −4
  39. drivers/firmware/efi/vars.c +6 −0
  40. drivers/fpga/dfl-afu-main.c +2 −1
  41. drivers/fpga/dfl-pci.c +2 −1
  42. drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +3 −6
  43. drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c +6 −4
  44. drivers/gpu/drm/lima/lima_pp.c +2 −0
  45. drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c +1 −1
  46. drivers/i2c/busses/i2c-cadence.c +12 −16
  47. drivers/i2c/busses/i2c-qcom-geni.c +4 −2
  48. drivers/i2c/busses/i2c-rcar.c +3 −0
  49. drivers/infiniband/core/cm.c +2 −0
  50. drivers/infiniband/core/rdma_core.c +3 −3
  51. drivers/infiniband/hw/hns/hns_roce_hw_v2.c +22 −12
  52. drivers/infiniband/hw/hns/hns_roce_mr.c +1 −1
  53. drivers/infiniband/hw/mlx5/odp.c +19 −3
  54. drivers/infiniband/hw/mlx5/srq_cmd.c +2 −2
  55. drivers/interconnect/core.c +9 −3
  56. drivers/interconnect/qcom/msm8916.c +7 −7
  57. drivers/iommu/qcom_iommu.c +17 −20
  58. drivers/md/dm-integrity.c +2 −2
  59. drivers/md/dm.c +17 −0
  60. drivers/misc/habanalabs/command_submission.c +11 −3
  61. drivers/misc/habanalabs/debugfs.c +8 −15
  62. drivers/misc/habanalabs/device.c +1 −1
  63. drivers/misc/habanalabs/firmware_if.c +5 −5
  64. drivers/misc/habanalabs/gaudi/gaudi.c +84 −39
  65. drivers/misc/habanalabs/goya/goya.c +12 −8
  66. drivers/misc/habanalabs/habanalabs.h +13 −6
  67. drivers/misc/habanalabs/habanalabs_drv.c +1 −1
  68. drivers/misc/habanalabs/hwmon.c +9 −10
  69. drivers/misc/habanalabs/sysfs.c +4 −7
  70. drivers/mmc/host/sdhci-of-aspeed.c +1 −1
  71. drivers/net/bonding/bond_main.c +7 −3
  72. drivers/net/bonding/bond_netlink.c +1 −2
  73. drivers/net/dsa/microchip/ksz9477.c +23 −19
  74. drivers/net/dsa/microchip/ksz_common.c +0 −2
  75. drivers/net/dsa/microchip/ksz_common.h +0 −2
  76. drivers/net/dsa/mv88e6xxx/chip.c +19 −3
  77. drivers/net/dsa/mv88e6xxx/chip.h +1 −0
  78. drivers/net/ethernet/aquantia/atlantic/aq_hw.h +1 −0
  79. drivers/net/ethernet/aquantia/atlantic/aq_nic.c +9 −0
  80. drivers/net/ethernet/aquantia/atlantic/aq_nic.h +2 −0
  81. drivers/net/ethernet/aquantia/atlantic/aq_phy.c +27 −2
  82. drivers/net/ethernet/aquantia/atlantic/aq_phy.h +6 −2
  83. drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c +25 −1
  84. drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h +4 −6
  85. drivers/net/ethernet/atheros/ag71xx.c +2 −1
  86. drivers/net/ethernet/broadcom/bnxt/bnxt.c +15 −7
  87. drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c +4 −1
  88. drivers/net/ethernet/broadcom/genet/bcmgenet.c +65 −79
  89. drivers/net/ethernet/broadcom/genet/bcmgenet.h +0 −1
  90. drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c +15 −7
  91. drivers/net/ethernet/cadence/macb_main.c +1 −1
  92. drivers/net/ethernet/chelsio/cxgb4/sge.c +1 −0
  93. drivers/net/ethernet/freescale/dpaa/dpaa_eth.c +1 −1
  94. drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c +1 −1
  95. drivers/net/ethernet/freescale/enetc/enetc_pf.c +1 −0
  96. drivers/net/ethernet/freescale/fec.h +1 −0
  97. drivers/net/ethernet/freescale/fec_main.c +17 −6
  98. drivers/net/ethernet/freescale/fec_ptp.c +12 −0
  99. drivers/net/ethernet/freescale/gianfar.c +5 −1
  100. drivers/net/ethernet/hisilicon/hns3/hnae3.h +1 −0
  101. drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +12 −12
  102. drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +0 −2
  103. drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +22 −27
  104. drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +3 −0
  105. drivers/net/ethernet/mellanox/mlxsw/core.c +2 −1
  106. drivers/net/ethernet/mellanox/mlxsw/core_env.c +32 −16
  107. drivers/net/ethernet/neterion/vxge/vxge-main.c +1 −1
  108. drivers/net/ethernet/pensando/ionic/ionic_ethtool.c +5 −2
  109. drivers/net/ethernet/pensando/ionic/ionic_lif.c +25 −25
  110. drivers/net/ethernet/pensando/ionic/ionic_lif.h +1 −7
  111. drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c +29 −0
  112. drivers/net/ethernet/pensando/ionic/ionic_txrx.c +0 −6
  113. drivers/net/ethernet/qlogic/qed/qed_cxt.c +2 −2
  114. drivers/net/ethernet/qlogic/qed/qed_dev.c +1 −1
  115. drivers/net/ethernet/qlogic/qed/qed_int.c +31 −22
  116. drivers/net/ethernet/qlogic/qed/qed_int.h +2 −2
  117. drivers/net/ethernet/renesas/ravb_main.c +24 −2
  118. drivers/net/ethernet/smsc/smc91x.c +2 −2
  119. drivers/net/ethernet/socionext/sni_ave.c +1 −1
  120. drivers/net/ethernet/ti/am65-cpsw-nuss.c +2 −1
  121. drivers/net/geneve.c +1 −1
  122. drivers/net/hippi/rrunner.c +1 −1
  123. drivers/net/ieee802154/adf7242.c +4 −2
  124. drivers/net/netdevsim/netdev.c +2 −2
  125. drivers/net/phy/dp83640.c +4 −0
  126. drivers/net/usb/ax88172a.c +1 −0
  127. drivers/net/usb/hso.c +3 −2
  128. drivers/net/wan/hdlc_x25.c +3 −1
  129. drivers/net/wan/lapbether.c +5 −3
  130. drivers/net/wan/x25_asy.c +14 −7
  131. drivers/net/wireless/ath/ath10k/ahb.c +1 −1
  132. drivers/net/wireless/ath/ath10k/pci.c +37 −41
  133. drivers/net/wireless/ath/ath9k/hif_usb.c +3 −1
  134. drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c +14 −2
  135. drivers/net/wireless/intel/iwlwifi/mvm/sta.c +3 −5
  136. drivers/net/wireless/intel/iwlwifi/pcie/drv.c +2 −0
  137. drivers/net/wireless/mediatek/mt76/mt76.h +1 −0
  138. drivers/net/wireless/mediatek/mt76/mt7603/main.c +2 −0
  139. drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c +5 −4
  140. drivers/net/wireless/mediatek/mt76/mt7615/dma.c +5 −4
  141. drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c +1 −2
  142. drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h +1 −1
  143. drivers/net/wireless/mediatek/mt76/mt7615/mac.c +7 −13
  144. drivers/net/wireless/mediatek/mt76/mt7615/mac.h +0 −15
  145. drivers/net/wireless/mediatek/mt76/mt7615/main.c +4 −0
  146. drivers/net/wireless/mediatek/mt76/mt7615/mmio.c +1 −1
  147. drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h +30 −0
  148. drivers/net/wireless/mediatek/mt76/mt7615/usb.c +7 −6
  149. drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c +3 −2
  150. drivers/net/wireless/mediatek/mt76/mt7915/main.c +3 −0
  151. drivers/net/wireless/mediatek/mt76/tx.c +7 −0
  152. drivers/net/wireless/mediatek/mt76/usb.c +26 −13
  153. drivers/net/xen-netfront.c +42 −22
  154. drivers/nfc/s3fwrn5/core.c +1 −0
  155. drivers/pci/pci.c +9 −21
  156. drivers/scsi/scsi_lib.c +11 −5
  157. drivers/staging/comedi/drivers/addi_apci_1032.c +14 −6
  158. drivers/staging/comedi/drivers/addi_apci_1500.c +19 −5
  159. drivers/staging/comedi/drivers/addi_apci_1564.c +14 −6
  160. drivers/staging/comedi/drivers/ni_6527.c +1 −1
  161. drivers/staging/media/atomisp/Kconfig +1 −1
  162. drivers/staging/media/atomisp/Makefile +1 −5
  163. drivers/staging/media/atomisp/i2c/atomisp-ov2680.c +3 −3
  164. drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c +4 −2
  165. drivers/staging/media/atomisp/include/linux/atomisp_platform.h +1 −0
  166. drivers/staging/media/atomisp/pci/atomisp-regs.h +0 −3
  167. drivers/staging/media/atomisp/pci/atomisp_acc.c +2 −2
  168. drivers/staging/media/atomisp/pci/atomisp_cmd.c +32 −27
  169. drivers/staging/media/atomisp/pci/atomisp_cmd.h +2 −2
  170. drivers/staging/media/atomisp/pci/atomisp_compat.h +0 −2
  171. drivers/staging/media/atomisp/pci/atomisp_compat_css20.c +34 −36
  172. drivers/staging/media/atomisp/pci/atomisp_compat_css20.h +1 −1
  173. drivers/staging/media/atomisp/pci/atomisp_drvfs.c +7 −7
  174. drivers/staging/media/atomisp/pci/atomisp_drvfs.h +1 −1
  175. drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c +351 −186
  176. drivers/staging/media/atomisp/pci/atomisp_internal.h +1 −1
  177. drivers/staging/media/atomisp/pci/atomisp_ioctl.c +9 −10
  178. drivers/staging/media/atomisp/pci/atomisp_v4l2.c +127 −158
  179. drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c +14 −14
  180. drivers/staging/media/atomisp/pci/hive_types.h +3 −21
  181. drivers/staging/media/atomisp/pci/hmm/hmm.c +5 −5
  182. drivers/staging/media/atomisp/pci/isp2400_system_global.h +0 −302
  183. drivers/staging/media/atomisp/pci/isp2400_system_local.h +0 −321
  184. drivers/staging/media/atomisp/pci/isp2401_system_global.h +1 −409
  185. drivers/staging/media/atomisp/pci/isp2401_system_local.h +0 −402
  186. drivers/staging/media/atomisp/pci/sh_css.c +7 −2
  187. drivers/staging/media/atomisp/pci/system_global.h +395 −0
  188. drivers/staging/media/atomisp/pci/system_local.c +179 −0
  189. drivers/staging/media/atomisp/pci/system_local.h +98 −6
  190. drivers/staging/wlan-ng/prism2usb.c +15 −1
  191. drivers/tty/serial/8250/8250_core.c +1 −1
  192. drivers/tty/serial/8250/8250_exar.c +11 −1
  193. drivers/tty/serial/8250/8250_mtk.c +18 −0
  194. drivers/tty/serial/serial-tegra.c +7 −9
  195. drivers/tty/serial/xilinx_uartps.c +6 −2
  196. drivers/tty/vt/vt.c +18 −11
  197. drivers/usb/host/xhci-mtk-sch.c +4 −0
  198. drivers/usb/host/xhci-pci.c +3 −0
  199. drivers/usb/host/xhci-tegra.c +1 −1
  200. drivers/vfio/pci/vfio_pci.c +5 −0
  201. drivers/video/fbdev/core/bitblit.c +2 −2
  202. drivers/video/fbdev/core/fbcon_ccw.c +2 −2
  203. drivers/video/fbdev/core/fbcon_cw.c +2 −2
  204. drivers/video/fbdev/core/fbcon_ud.c +2 −2
  205. drivers/virtio/virtio_mmio.c +2 −2
  206. fs/btrfs/backref.c +1 −0
  207. fs/btrfs/extent_io.c +2 −1
  208. fs/btrfs/inode.c +10 −13
  209. fs/btrfs/volumes.c +8 −0
  210. fs/cifs/inode.c +2 −8
  211. fs/efivarfs/super.c +3 −3
  212. fs/exfat/dir.c +1 −1
  213. fs/exfat/exfat_fs.h +1 −1
  214. fs/exfat/file.c +1 −1
  215. fs/exfat/nls.c +4 −4
  216. fs/io_uring.c +36 −25
  217. fs/nfsd/nfs4state.c +19 −1
  218. fs/squashfs/block.c +1 −1
  219. fs/zonefs/super.c +11 −7
  220. include/asm-generic/vmlinux.lds.h +4 −1
  221. include/linux/device-mapper.h +1 −0
  222. include/linux/efi.h +1 −0
  223. include/linux/i2c.h +1 −1
  224. include/linux/io-mapping.h +4 −1
  225. include/linux/rhashtable.h +1 −1
  226. include/linux/tcp.h +4 −2
  227. include/linux/xattr.h +2 −1
  228. include/net/flow_offload.h +0 −1
  229. include/sound/rt5670.h +1 −0
  230. include/sound/soc-dai.h +1 −0
  231. include/sound/soc.h +2 −0
  232. kernel/events/uprobes.c +1 −1
  233. kernel/sched/core.c +15 −10
  234. mm/hugetlb.c +10 −5
  235. mm/khugepaged.c +3 −0
  236. mm/memcontrol.c +10 −3
  237. mm/memory.c +1 −1
  238. mm/mmap.c +14 −2
  239. mm/shmem.c +1 −1
  240. mm/slab_common.c +28 −7
  241. net/ax25/af_ax25.c +8 −2
  242. net/core/dev.c +1 −1
  243. net/core/flow_offload.c +1 −0
  244. net/core/net-sysfs.c +1 −1
  245. net/core/rtnetlink.c +2 −1
  246. net/core/sock_reuseport.c +1 −0
  247. net/hsr/hsr_forward.c +13 −5
  248. net/hsr/hsr_framereg.c +2 −1
  249. net/ipv4/tcp_input.c +6 −5
  250. net/ipv4/tcp_output.c +8 −5
  251. net/ipv4/udp.c +10 −7
  252. net/ipv6/ip6_gre.c +6 −5
  253. net/ipv6/udp.c +10 −7
  254. net/netfilter/ipvs/ip_vs_sync.c +8 −4
  255. net/netfilter/nf_tables_api.c +14 −27
  256. net/nfc/nci/core.c +4 −1
  257. net/qrtr/qrtr.c +1 −0
  258. net/rxrpc/recvmsg.c +1 −1
  259. net/rxrpc/sendmsg.c +1 −1
  260. net/sched/act_ct.c +14 −2
  261. net/sched/cls_api.c +0 −1
  262. net/sctp/stream.c +18 −9
  263. net/smc/af_smc.c +8 −4
  264. net/smc/smc_cdc.c +5 −1
  265. net/smc/smc_core.c +24 −85
  266. net/smc/smc_core.h +5 −0
  267. net/smc/smc_ib.c +13 −3
  268. net/smc/smc_ib.h +1 −0
  269. net/smc/smc_llc.c +85 −42
  270. net/smc/smc_llc.h +1 −1
  271. net/tipc/link.c +1 −1
  272. net/vmw_vsock/virtio_transport.c +1 −1
  273. scripts/decode_stacktrace.sh +2 −2
  274. scripts/gdb/linux/symbols.py +1 −1
  275. scripts/mod/modpost.c +10 −2
  276. sound/core/info.c +3 −1
  277. sound/pci/hda/patch_realtek.c +1 −0
  278. sound/soc/amd/raven/pci-acp3x.c +1 −3
  279. sound/soc/codecs/max98373.c +0 −8
  280. sound/soc/codecs/rt286.c +4 −4
  281. sound/soc/codecs/rt5670.c +58 −17
  282. sound/soc/codecs/rt5670.h +1 −1
  283. sound/soc/codecs/rt5682.c +29 −17
  284. sound/soc/codecs/wm8974.c +5 −1
  285. sound/soc/generic/audio-graph-card.c +2 −2
  286. sound/soc/generic/simple-card.c +2 −2
  287. sound/soc/intel/boards/bdw-rt5677.c +1 −0
  288. sound/soc/intel/boards/bytcht_es8316.c +3 −1
  289. sound/soc/intel/boards/cht_bsw_rt5672.c +11 −12
  290. sound/soc/qcom/Kconfig +1 −1
  291. sound/soc/rockchip/rk3399_gru_sound.c +13 −0
  292. sound/soc/soc-core.c +27 −0
  293. sound/soc/soc-dai.c +38 −0
  294. sound/soc/soc-devres.c +5 −3
  295. sound/soc/soc-generic-dmaengine-pcm.c +1 −1
  296. sound/soc/soc-topology.c +18 −6
  297. sound/soc/sof/core.c +5 −5
  298. sound/soc/sof/imx/imx8.c +8 −0
  299. sound/soc/sof/imx/imx8m.c +8 −0
  300. tools/perf/pmu-events/arch/s390/cf_z15/extended.json +1 −1
  301. tools/testing/selftests/net/fib_nexthop_multiprefix.sh +1 −1
  302. tools/testing/selftests/net/ip_defrag.sh +2 −0
  303. tools/testing/selftests/net/txtimestamp.sh +1 −1
.mailmap+3−0
@@ -198,6 +198,9 @@ Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> · 197 unmodified lines
198198 Mayuresh Janorkar <mayur@ti.com>
199199 Michael Buesch <m@bues.ch>
200200 Michel Dänzer <michel@tungstengraphics.com>
201+Mike Rapoport <rppt@kernel.org> <mike@compulab.co.il>
202+Mike Rapoport <rppt@kernel.org> <mike.rapoport@gmail.com>
203+Mike Rapoport <rppt@kernel.org> <rppt@linux.ibm.com>
201204 Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>
202205 Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>
203206 Mitesh shah <mshah@teja.com>
Documentation/ABI/testing/debugfs-driver-habanalabs+10−1
@@ -16,7 +16,16 @@ Description: Allow the root user to disable/enable in runtime the clock · 15 unmodified lines
1616 gating mechanism in Gaudi. Due to how Gaudi is built, the
1717 clock gating needs to be disabled in order to access the
1818 registers of the TPC and MME engines. This is sometimes needed
19− during debug by the user and hence the user needs this option
19+ during debug by the user and hence the user needs this option.
20+ The user can supply a bitmask value, each bit represents
21+ a different engine to disable/enable its clock gating feature.
22+ The bitmask is composed of 20 bits:
23+ 0 - 7 : DMA channels
24+ 8 - 11 : MME engines
25+ 12 - 19 : TPC engines
26+ The bit's location of a specific engine can be determined
27+ using (1 << GAUDI_ENGINE_ID_*). GAUDI_ENGINE_ID_* values
28+ are defined in uapi habanalabs.h file in enum gaudi_engine_id
2029
2130 What: /sys/kernel/debug/habanalabs/hl<n>/command_buffers
2231 Date: Jan 2019
Documentation/devicetree/bindings/sound/simple-card.yaml+13−4
@@ -378,6 +378,8 @@ examples: · 377 unmodified lines
378378 - |
379379 sound {
380380 compatible = "simple-audio-card";
381+ #address-cells = <1>;
382+ #size-cells = <0>;
381383
382384 simple-audio-card,name = "rsnd-ak4643";
383385 simple-audio-card,format = "left_j";
@@ -391,10 +393,12 @@ examples: · 7 unmodified lines
391393 "ak4642 Playback", "DAI1 Playback";
392394
393395 dpcmcpu: simple-audio-card,cpu@0 {
396+ reg = <0>;
394397 sound-dai = <&rcar_sound 0>;
395398 };
396399
397400 simple-audio-card,cpu@1 {
401+ reg = <1>;
398402 sound-dai = <&rcar_sound 1>;
399403 };
400404
@@ -418,6 +422,8 @@ examples: · 17 unmodified lines
418422 - |
419423 sound {
420424 compatible = "simple-audio-card";
425+ #address-cells = <1>;
426+ #size-cells = <0>;
421427
422428 simple-audio-card,routing =
423429 "pcm3168a Playback", "DAI1 Playback",
@@ -426,6 +432,7 @@ examples: · 2 unmodified lines
426432 "pcm3168a Playback", "DAI4 Playback";
427433
428434 simple-audio-card,dai-link@0 {
435+ reg = <0>;
429436 format = "left_j";
430437 bitclock-master = <&sndcpu0>;
431438 frame-master = <&sndcpu0>;
@@ -439,22 +446,23 @@ examples: · 7 unmodified lines
439446 };
440447
441448 simple-audio-card,dai-link@1 {
449+ reg = <1>;
442450 format = "i2s";
443451 bitclock-master = <&sndcpu1>;
444452 frame-master = <&sndcpu1>;
445453
446454 convert-channels = <8>; /* TDM Split */
447455
448− sndcpu1: cpu@0 {
456+ sndcpu1: cpu0 {
449457 sound-dai = <&rcar_sound 1>;
450458 };
451− cpu@1 {
459+ cpu1 {
452460 sound-dai = <&rcar_sound 2>;
453461 };
454− cpu@2 {
462+ cpu2 {
455463 sound-dai = <&rcar_sound 3>;
456464 };
457− cpu@3 {
465+ cpu3 {
458466 sound-dai = <&rcar_sound 4>;
459467 };
460468 codec {
@@ -466,6 +474,7 @@ examples: · 5 unmodified lines
466474 };
467475
468476 simple-audio-card,dai-link@2 {
477+ reg = <2>;
469478 format = "i2s";
470479 bitclock-master = <&sndcpu2>;
471480 frame-master = <&sndcpu2>;
Documentation/driver-api/ptp.rst+12−0
@@ -23,6 +23,7 @@ PTP hardware clock infrastructure for Linux · 22 unmodified lines
2323 + Ancillary clock features
2424 - Time stamp external events
2525 - Period output signals configurable from user space
26+ - Low Pass Filter (LPF) access from user space
2627 - Synchronization of the Linux system time via the PPS subsystem
2728
2829 PTP hardware clock kernel API
@@ -94,3 +95,14 @@ Supported hardware · 65 unmodified lines
9495
9596 - Auxiliary Slave/Master Mode Snapshot (optional interrupt)
9697 - Target Time (optional interrupt)
98+
99+ * Renesas (IDT) ClockMatrix™
100+
101+ - Up to 4 independent PHC channels
102+ - Integrated low pass filter (LPF), access via .adjPhase (compliant to ITU-T G.8273.2)
103+ - Programmable output periodic signals
104+ - Programmable inputs can time stamp external triggers
105+ - Driver and/or hardware configuration through firmware (idtcm.bin)
106+ - LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.8273.2))
107+ - Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk to ASSPs/SoCs/FPGAs)
108+ - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)
Documentation/networking/bareudp.rst+13−6
@@ -26,7 +26,7 @@ Usage · 25 unmodified lines
2626
2727 1) Device creation & deletion
2828
29− a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847.
29+ a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc
3030
3131 This creates a bareudp tunnel device which tunnels L3 traffic with ethertype
3232 0x8847 (MPLS traffic). The destination port of the UDP header will be set to
@@ -34,14 +34,21 @@ Usage · 1 unmodified line
3434
3535 b) ip link delete bareudp0
3636
37−2) Device creation with multiple proto mode enabled
37+2) Device creation with multiproto mode enabled
3838
39−There are two ways to create a bareudp device for MPLS & IP with multiproto mode
40−enabled.
39+The multiproto mode allows bareudp tunnels to handle several protocols of the
40+same family. It is currently only available for IP and MPLS. This mode has to
41+be enabled explicitly with the "multiproto" flag.
4142
42− a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype 0x8847 multiproto
43+ a) ip link add dev bareudp0 type bareudp dstport 6635 ethertype ipv4 multiproto
4344
44− b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls
45+ For an IPv4 tunnel the multiproto mode allows the tunnel to also handle
46+ IPv6.
47+
48+ b) ip link add dev bareudp0 type bareudp dstport 6635 ethertype mpls_uc multiproto
49+
50+ For MPLS, the multiproto mode allows the tunnel to handle both unicast
51+ and multicast MPLS packets.
4552
4653 3) Device Usage
4754
MAINTAINERS+17−4
@@ -6956,6 +6956,7 @@ M: Timur Tabi <timur@kernel.org> · 6955 unmodified lines
69566956 M: Nicolin Chen <nicoleotsuka@gmail.com>
69576957 M: Xiubo Li <Xiubo.Lee@gmail.com>
69586958 R: Fabio Estevam <festevam@gmail.com>
6959+R: Shengjiu Wang <shengjiu.wang@gmail.com>
69596960 L: alsa-devel@alsa-project.org (moderated for non-subscribers)
69606961 L: linuxppc-dev@lists.ozlabs.org
69616962 S: Maintained
@@ -9312,6 +9313,17 @@ F: Documentation/kbuild/kconfig* · 2350 unmodified lines
93129313 F: scripts/Kconfig.include
93139314 F: scripts/kconfig/
93149315
9316+KCOV
9317+R: Dmitry Vyukov <dvyukov@google.com>
9318+R: Andrey Konovalov <andreyknvl@google.com>
9319+L: kasan-dev@googlegroups.com
9320+S: Maintained
9321+F: Documentation/dev-tools/kcov.rst
9322+F: include/linux/kcov.h
9323+F: include/uapi/linux/kcov.h
9324+F: kernel/kcov.c
9325+F: scripts/Makefile.kcov
9326+
93159327 KCSAN
93169328 M: Marco Elver <elver@google.com>
93179329 R: Dmitry Vyukov <dvyukov@google.com>
@@ -11247,7 +11259,7 @@ S: Maintained · 1929 unmodified lines
1124711259 F: drivers/crypto/atmel-ecc.*
1124811260
1124911261 MICROCHIP I2C DRIVER
11250−M: Ludovic Desroches <ludovic.desroches@microchip.com>
11262+M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
1125111263 L: linux-i2c@vger.kernel.org
1125211264 S: Supported
1125311265 F: drivers/i2c/busses/i2c-at91-*.c
@@ -11340,17 +11352,17 @@ F: drivers/iio/adc/at91-sama5d2_adc.c · 86 unmodified lines
1134011352 F: include/dt-bindings/iio/adc/at91-sama5d2_adc.h
1134111353
1134211354 MICROCHIP SAMA5D2-COMPATIBLE SHUTDOWN CONTROLLER
11343−M: Nicolas Ferre <nicolas.ferre@microchip.com>
11355+M: Claudiu Beznea <claudiu.beznea@microchip.com>
1134411356 S: Supported
1134511357 F: drivers/power/reset/at91-sama5d2_shdwc.c
1134611358
1134711359 MICROCHIP SPI DRIVER
11348−M: Nicolas Ferre <nicolas.ferre@microchip.com>
11360+M: Tudor Ambarus <tudor.ambarus@microchip.com>
1134911361 S: Supported
1135011362 F: drivers/spi/spi-atmel.*
1135111363
1135211364 MICROCHIP SSC DRIVER
11353−M: Nicolas Ferre <nicolas.ferre@microchip.com>
11365+M: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
1135411366 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1135511367 S: Supported
1135611368 F: drivers/misc/atmel-ssc.c
@@ -14869,6 +14881,7 @@ F: drivers/s390/block/dasd* · 3512 unmodified lines
1486914881 F: include/linux/dasd_mod.h
1487014882
1487114883 S390 IOMMU (PCI)
14884+M: Matthew Rosato <mjrosato@linux.ibm.com>
1487214885 M: Gerald Schaefer <gerald.schaefer@linux.ibm.com>
1487314886 L: linux-s390@vger.kernel.org
1487414887 S: Supported
Makefile+3−3
@@ -2,7 +2,7 @@ · 1 unmodified line
22 VERSION = 5
33 PATCHLEVEL = 8
44 SUBLEVEL = 0
5−EXTRAVERSION = -rc6
5+EXTRAVERSION = -rc7
66 NAME = Kleptomaniac Octopus
77
88 # *DOCUMENTATION*
@@ -567,7 +567,7 @@ ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),) · 558 unmodified lines
567567 ifneq ($(CROSS_COMPILE),)
568568 CLANG_FLAGS += --target=$(notdir $(CROSS_COMPILE:%-=%))
569569 GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))
570−CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)
570+CLANG_FLAGS += --prefix=$(GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE))
571571 GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
572572 endif
573573 ifneq ($(GCC_TOOLCHAIN),)
@@ -1754,7 +1754,7 @@ PHONY += descend $(build-dirs) · 1180 unmodified lines
17541754 descend: $(build-dirs)
17551755 $(build-dirs): prepare
17561756 $(Q)$(MAKE) $(build)=$@ \
1757− single-build=$(if $(filter-out $@/, $(filter $@/%, $(single-no-ko))),1) \
1757+ single-build=$(if $(filter-out $@/, $(filter $@/%, $(KBUILD_SINGLE_TARGETS))),1) \
17581758 need-builtin=1 need-modorder=1
17591759
17601760 clean-dirs := $(addprefix _clean_, $(clean-dirs))
arch/arm64/Makefile+1−1
@@ -137,7 +137,7 @@ export TEXT_OFFSET · 136 unmodified lines
137137
138138 core-y += arch/arm64/
139139 libs-y := arch/arm64/lib/ $(libs-y)
140−core-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
140+libs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a
141141
142142 # Default target when executing plain make
143143 boot := arch/arm64/boot
arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts+1−4
@@ -454,10 +454,7 @@ · 453 unmodified lines
454454 status = "okay";
455455 phy-mode = "2500base-x";
456456 phys = <&cp1_comphy5 2>;
457− fixed-link {
458− speed = <2500>;
459− full-duplex;
460− };
457+ managed = "in-band-status";
461458 };
462459
463460 &cp1_spi1 {
arch/arm64/kernel/vdso32/Makefile+1−1
@@ -14,7 +14,7 @@ COMPAT_GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE_COMPAT)elfedit)) · 13 unmodified lines
1414 COMPAT_GCC_TOOLCHAIN := $(realpath $(COMPAT_GCC_TOOLCHAIN_DIR)/..)
1515
1616 CC_COMPAT_CLANG_FLAGS := --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%))
17−CC_COMPAT_CLANG_FLAGS += --prefix=$(COMPAT_GCC_TOOLCHAIN_DIR)
17+CC_COMPAT_CLANG_FLAGS += --prefix=$(COMPAT_GCC_TOOLCHAIN_DIR)$(notdir $(CROSS_COMPILE_COMPAT))
1818 CC_COMPAT_CLANG_FLAGS += -no-integrated-as -Qunused-arguments
1919 ifneq ($(COMPAT_GCC_TOOLCHAIN),)
2020 CC_COMPAT_CLANG_FLAGS += --gcc-toolchain=$(COMPAT_GCC_TOOLCHAIN)
arch/parisc/include/asm/atomic.h+2−0
@@ -212,6 +212,8 @@ atomic64_set(atomic64_t *v, s64 i) · 211 unmodified lines
212212 _atomic_spin_unlock_irqrestore(v, flags);
213213 }
214214
215+#define atomic64_set_release(v, i) atomic64_set((v), (i))
216+
215217 static __inline__ s64
216218 atomic64_read(const atomic64_t *v)
217219 {
arch/parisc/include/asm/cmpxchg.h+2−0
@@ -60,6 +60,7 @@ extern void __cmpxchg_called_with_bad_pointer(void); · 59 unmodified lines
6060 extern unsigned long __cmpxchg_u32(volatile unsigned int *m, unsigned int old,
6161 unsigned int new_);
6262 extern u64 __cmpxchg_u64(volatile u64 *ptr, u64 old, u64 new_);
63+extern u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new_);
6364
6465 /* don't worry...optimizer will get rid of most of this */
6566 static inline unsigned long
@@ -71,6 +72,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) · 5 unmodified lines
7172 #endif
7273 case 4: return __cmpxchg_u32((unsigned int *)ptr,
7374 (unsigned int)old, (unsigned int)new_);
75+ case 1: return __cmpxchg_u8((u8 *)ptr, (u8)old, (u8)new_);
7476 }
7577 __cmpxchg_called_with_bad_pointer();
7678 return old;
arch/parisc/lib/bitops.c+12−0
@@ -79,3 +79,15 @@ unsigned long __cmpxchg_u32(volatile unsigned int *ptr, unsigned int old, unsign · 78 unmodified lines
7979 _atomic_spin_unlock_irqrestore(ptr, flags);
8080 return (unsigned long)prev;
8181 }
82+
83+u8 __cmpxchg_u8(volatile u8 *ptr, u8 old, u8 new)
84+{
85+ unsigned long flags;
86+ u8 prev;
87+
88+ _atomic_spin_lock_irqsave(ptr, flags);
89+ if ((prev = *ptr) == old)
90+ *ptr = new;
91+ _atomic_spin_unlock_irqrestore(ptr, flags);
92+ return prev;
93+}
arch/riscv/mm/init.c+45−21
@@ -95,19 +95,40 @@ void __init mem_init(void) · 94 unmodified lines
9595 #ifdef CONFIG_BLK_DEV_INITRD
9696 static void __init setup_initrd(void)
9797 {
98+ phys_addr_t start;
9899 unsigned long size;
99100
100− if (initrd_start >= initrd_end) {
101− pr_info("initrd not found or empty");
101+ /* Ignore the virtul address computed during device tree parsing */
102+ initrd_start = initrd_end = 0;
103+
104+ if (!phys_initrd_size)
105+ return;
106+ /*
107+ * Round the memory region to page boundaries as per free_initrd_mem()
108+ * This allows us to detect whether the pages overlapping the initrd
109+ * are in use, but more importantly, reserves the entire set of pages
110+ * as we don't want these pages allocated for other purposes.
111+ */
112+ start = round_down(phys_initrd_start, PAGE_SIZE);
113+ size = phys_initrd_size + (phys_initrd_start - start);
114+ size = round_up(size, PAGE_SIZE);
115+
116+ if (!memblock_is_region_memory(start, size)) {
117+ pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region",
118+ (u64)start, size);
102119 goto disable;
103120 }
104− if (__pa_symbol(initrd_end) > PFN_PHYS(max_low_pfn)) {
105− pr_err("initrd extends beyond end of memory");
121+
122+ if (memblock_is_region_reserved(start, size)) {
123+ pr_err("INITRD: 0x%08llx+0x%08lx overlaps in-use memory region\n",
124+ (u64)start, size);
106125 goto disable;
107126 }
108127
109− size = initrd_end - initrd_start;
110− memblock_reserve(__pa_symbol(initrd_start), size);
128+ memblock_reserve(start, size);
129+ /* Now convert initrd to virtual addresses */
130+ initrd_start = (unsigned long)__va(phys_initrd_start);
131+ initrd_end = initrd_start + phys_initrd_size;
111132 initrd_below_start_ok = 1;
112133
113134 pr_info("Initial ramdisk at: 0x%p (%lu bytes)\n",
@@ -126,33 +147,36 @@ void __init setup_bootmem(void) · 12 unmodified lines
126147 {
127148 struct memblock_region *reg;
128149 phys_addr_t mem_size = 0;
150+ phys_addr_t total_mem = 0;
151+ phys_addr_t mem_start, end = 0;
129152 phys_addr_t vmlinux_end = __pa_symbol(&_end);
130153 phys_addr_t vmlinux_start = __pa_symbol(&_start);
131154
132155 /* Find the memory region containing the kernel */
133156 for_each_memblock(memory, reg) {
134− phys_addr_t end = reg->base + reg->size;
135−
136− if (reg->base <= vmlinux_start && vmlinux_end <= end) {
137− mem_size = min(reg->size, (phys_addr_t)-PAGE_OFFSET);
138−
139− /*
140− * Remove memblock from the end of usable area to the
141− * end of region
142− */
143− if (reg->base + mem_size < end)
144− memblock_remove(reg->base + mem_size,
145− end - reg->base - mem_size);
146− }
157+ end = reg->base + reg->size;
158+ if (!total_mem)
159+ mem_start = reg->base;
160+ if (reg->base <= vmlinux_start && vmlinux_end <= end)
161+ BUG_ON(reg->size == 0);
162+ total_mem = total_mem + reg->size;
147163 }
148− BUG_ON(mem_size == 0);
164+
165+ /*
166+ * Remove memblock from the end of usable area to the
167+ * end of region
168+ */
169+ mem_size = min(total_mem, (phys_addr_t)-PAGE_OFFSET);
170+ if (mem_start + mem_size < end)
171+ memblock_remove(mem_start + mem_size,
172+ end - mem_start - mem_size);
149173
150174 /* Reserve from the start of the kernel to the end of the kernel */
151175 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
152176
153− set_max_mapnr(PFN_DOWN(mem_size));
154177 max_pfn = PFN_DOWN(memblock_end_of_DRAM());
155178 max_low_pfn = max_pfn;
179+ set_max_mapnr(max_low_pfn);
156180
157181 #ifdef CONFIG_BLK_DEV_INITRD
158182 setup_initrd();
arch/riscv/mm/kasan_init.c+2−2
@@ -44,7 +44,7 @@ asmlinkage void __init kasan_early_init(void) · 43 unmodified lines
4444 (__pa(((uintptr_t) kasan_early_shadow_pmd))),
4545 __pgprot(_PAGE_TABLE)));
4646
47− flush_tlb_all();
47+ local_flush_tlb_all();
4848 }
4949
5050 static void __init populate(void *start, void *end)
@@ -79,7 +79,7 @@ static void __init populate(void *start, void *end) · 28 unmodified lines
7979 pfn_pgd(PFN_DOWN(__pa(&pmd[offset])),
8080 __pgprot(_PAGE_TABLE)));
8181
82− flush_tlb_all();
82+ local_flush_tlb_all();
8383 memset(start, 0, end - start);
8484 }
8585
arch/s390/kernel/perf_cpum_cf_events.c+2−2
@@ -292,7 +292,7 @@ CPUMF_EVENT_ATTR(cf_z15, TX_C_TABORT_SPECIAL, 0x00f5); · 291 unmodified lines
292292 CPUMF_EVENT_ATTR(cf_z15, DFLT_ACCESS, 0x00f7);
293293 CPUMF_EVENT_ATTR(cf_z15, DFLT_CYCLES, 0x00fc);
294294 CPUMF_EVENT_ATTR(cf_z15, DFLT_CC, 0x00108);
295−CPUMF_EVENT_ATTR(cf_z15, DFLT_CCERROR, 0x00109);
295+CPUMF_EVENT_ATTR(cf_z15, DFLT_CCFINISH, 0x00109);
296296 CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE, 0x01c0);
297297 CPUMF_EVENT_ATTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE, 0x01c1);
298298
@@ -629,7 +629,7 @@ static struct attribute *cpumcf_z15_pmu_event_attr[] __initdata = { · 330 unmodified lines
629629 CPUMF_EVENT_PTR(cf_z15, DFLT_ACCESS),
630630 CPUMF_EVENT_PTR(cf_z15, DFLT_CYCLES),
631631 CPUMF_EVENT_PTR(cf_z15, DFLT_CC),
632− CPUMF_EVENT_PTR(cf_z15, DFLT_CCERROR),
632+ CPUMF_EVENT_PTR(cf_z15, DFLT_CCFINISH),
633633 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
634634 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
635635 NULL,
arch/x86/include/asm/iosf_mbi.h+1−0
@@ -39,6 +39,7 @@ · 38 unmodified lines
3939 #define BT_MBI_UNIT_PMC 0x04
4040 #define BT_MBI_UNIT_GFX 0x06
4141 #define BT_MBI_UNIT_SMI 0x0C
42+#define BT_MBI_UNIT_CCK 0x14
4243 #define BT_MBI_UNIT_USB 0x43
4344 #define BT_MBI_UNIT_SATA 0xA3
4445 #define BT_MBI_UNIT_PCIE 0xA6
arch/x86/kernel/dumpstack.c+17−10
@@ -71,6 +71,22 @@ static void printk_stack_address(unsigned long address, int reliable, · 70 unmodified lines
7171 printk("%s %s%pB\n", log_lvl, reliable ? "" : "? ", (void *)address);
7272 }
7373
74+static int copy_code(struct pt_regs *regs, u8 *buf, unsigned long src,
75+ unsigned int nbytes)
76+{
77+ if (!user_mode(regs))
78+ return copy_from_kernel_nofault(buf, (u8 *)src, nbytes);
79+
80+ /*
81+ * Make sure userspace isn't trying to trick us into dumping kernel
82+ * memory by pointing the userspace instruction pointer at it.
83+ */
84+ if (__chk_range_not_ok(src, nbytes, TASK_SIZE_MAX))
85+ return -EINVAL;
86+
87+ return copy_from_user_nmi(buf, (void __user *)src, nbytes);
88+}
89+
7490 /*
7591 * There are a couple of reasons for the 2/3rd prologue, courtesy of Linus:
7692 *
@@ -97,17 +113,8 @@ void show_opcodes(struct pt_regs *regs, const char *loglvl) · 20 unmodified lines
97113 #define OPCODE_BUFSIZE (PROLOGUE_SIZE + 1 + EPILOGUE_SIZE)
98114 u8 opcodes[OPCODE_BUFSIZE];
99115 unsigned long prologue = regs->ip - PROLOGUE_SIZE;
100− bool bad_ip;
101−
102− /*
103− * Make sure userspace isn't trying to trick us into dumping kernel
104− * memory by pointing the userspace instruction pointer at it.
105− */
106− bad_ip = user_mode(regs) &&
107− __chk_range_not_ok(prologue, OPCODE_BUFSIZE, TASK_SIZE_MAX);
108116
109− if (bad_ip || copy_from_kernel_nofault(opcodes, (u8 *)prologue,
110− OPCODE_BUFSIZE)) {
117+ if (copy_code(regs, opcodes, prologue, sizeof(opcodes))) {
111118 printk("%sCode: Bad RIP value.\n", loglvl);
112119 } else {
113120 printk("%sCode: %" __stringify(PROLOGUE_SIZE) "ph <%02x> %"
arch/x86/kernel/fpu/xstate.c+1−1
@@ -1074,7 +1074,7 @@ int copy_xstate_to_kernel(void *kbuf, struct xregs_state *xsave, unsigned int of · 1073 unmodified lines
10741074 copy_part(offsetof(struct fxregs_state, st_space), 128,
10751075 &xsave->i387.st_space, &kbuf, &offset_start, &count);
10761076 if (header.xfeatures & XFEATURE_MASK_SSE)
1077− copy_part(xstate_offsets[XFEATURE_MASK_SSE], 256,
1077+ copy_part(xstate_offsets[XFEATURE_SSE], 256,
10781078 &xsave->i387.xmm_space, &kbuf, &offset_start, &count);
10791079 /*
10801080 * Fill xsave->i387.sw_reserved value for ptrace frame:
arch/x86/kernel/stacktrace.c+0−5
@@ -58,7 +58,6 @@ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry, · 57 unmodified lines
5858 * or a page fault), which can make frame pointers
5959 * unreliable.
6060 */
61−
6261 if (IS_ENABLED(CONFIG_FRAME_POINTER))
6362 return -EINVAL;
6463 }
@@ -81,10 +80,6 @@ int arch_stack_walk_reliable(stack_trace_consume_fn consume_entry, · 16 unmodified lines
8180 if (unwind_error(&state))
8281 return -EINVAL;
8382
84− /* Success path for non-user tasks, i.e. kthreads and idle tasks */
85− if (!(task->flags & (PF_KTHREAD | PF_IDLE)))
86− return -EINVAL;
87−
8883 return 0;
8984 }
9085
arch/x86/kernel/unwind_orc.c+6−2
@@ -440,8 +440,11 @@ bool unwind_next_frame(struct unwind_state *state) · 439 unmodified lines
440440 /*
441441 * Find the orc_entry associated with the text address.
442442 *
443− * Decrement call return addresses by one so they work for sibling
444− * calls and calls to noreturn functions.
443+ * For a call frame (as opposed to a signal frame), state->ip points to
444+ * the instruction after the call. That instruction's stack layout
445+ * could be different from the call instruction's layout, for example
446+ * if the call was to a noreturn function. So get the ORC data for the
447+ * call instruction itself.
445448 */
446449 orc = orc_find(state->signal ? state->ip : state->ip - 1);
447450 if (!orc) {
@@ -662,6 +665,7 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task, · 214 unmodified lines
662665 state->sp = task->thread.sp;
663666 state->bp = READ_ONCE_NOCHECK(frame->bp);
664667 state->ip = READ_ONCE_NOCHECK(frame->ret_addr);
668+ state->signal = (void *)state->ip == ret_from_fork;
665669 }
666670
667671 if (get_stack_info((unsigned long *)state->sp, state->task,
arch/x86/kernel/vmlinux.lds.S+1−0
@@ -358,6 +358,7 @@ SECTIONS · 357 unmodified lines
358358 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
359359 __bss_start = .;
360360 *(.bss..page_aligned)
361+ . = ALIGN(PAGE_SIZE);
361362 *(BSS_MAIN)
362363 BSS_DECRYPTED
363364 . = ALIGN(PAGE_SIZE);
arch/xtensa/include/asm/checksum.h+1−1
@@ -57,7 +57,7 @@ static inline · 56 unmodified lines
5757 __wsum csum_and_copy_from_user(const void __user *src, void *dst,
5858 int len, __wsum sum, int *err_ptr)
5959 {
60− if (access_ok(dst, len))
60+ if (access_ok(src, len))
6161 return csum_partial_copy_generic((__force const void *)src, dst,
6262 len, sum, err_ptr, NULL);
6363 if (len)
drivers/android/binder_alloc.c+1−1
@@ -947,7 +947,7 @@ enum lru_status binder_alloc_free_page(struct list_head *item, · 946 unmodified lines
947947 trace_binder_unmap_user_end(alloc, index);
948948 }
949949 mmap_read_unlock(mm);
950− mmput(mm);
950+ mmput_async(mm);
951951
952952 trace_binder_unmap_kernel_start(alloc, index);
953953
drivers/base/property.c+1−1
@@ -721,7 +721,7 @@ struct fwnode_handle *device_get_next_child_node(struct device *dev, · 720 unmodified lines
721721 return next;
722722
723723 /* When no more children in primary, continue with secondary */
724− if (!IS_ERR_OR_NULL(fwnode->secondary))
724+ if (fwnode && !IS_ERR_OR_NULL(fwnode->secondary))
725725 next = fwnode_get_next_child_node(fwnode->secondary, child);
726726
727727 return next;
drivers/bus/ti-sysc.c+22−0
@@ -2865,6 +2865,24 @@ static int sysc_check_disabled_devices(struct sysc *ddata) · 2864 unmodified lines
28652865 return error;
28662866 }
28672867
2868+/*
2869+ * Ignore timers tagged with no-reset and no-idle. These are likely in use,
2870+ * for example by drivers/clocksource/timer-ti-dm-systimer.c. If more checks
2871+ * are needed, we could also look at the timer register configuration.
2872+ */
2873+static int sysc_check_active_timer(struct sysc *ddata)
2874+{
2875+ if (ddata->cap->type != TI_SYSC_OMAP2_TIMER &&
2876+ ddata->cap->type != TI_SYSC_OMAP4_TIMER)
2877+ return 0;
2878+
2879+ if ((ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT) &&
2880+ (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE))
2881+ return -EBUSY;
2882+
2883+ return 0;
2884+}
2885+
28682886 static const struct of_device_id sysc_match_table[] = {
28692887 { .compatible = "simple-bus", },
28702888 { /* sentinel */ },
@@ -2921,6 +2939,10 @@ static int sysc_probe(struct platform_device *pdev) · 50 unmodified lines
29212939 if (error)
29222940 return error;
29232941
2942+ error = sysc_check_active_timer(ddata);
2943+ if (error)
2944+ return error;
2945+
29242946 error = sysc_get_clocks(ddata);
29252947 if (error)
29262948 return error;
drivers/char/mem.c+7−3
@@ -814,7 +814,8 @@ static struct inode *devmem_inode; · 813 unmodified lines
814814 #ifdef CONFIG_IO_STRICT_DEVMEM
815815 void revoke_devmem(struct resource *res)
816816 {
817− struct inode *inode = READ_ONCE(devmem_inode);
817+ /* pairs with smp_store_release() in devmem_init_inode() */
818+ struct inode *inode = smp_load_acquire(&devmem_inode);
818819
819820 /*
820821 * Check that the initialization has completed. Losing the race
@@ -1028,8 +1029,11 @@ static int devmem_init_inode(void) · 207 unmodified lines
10281029 return rc;
10291030 }
10301031
1031− /* publish /dev/mem initialized */
1032− WRITE_ONCE(devmem_inode, inode);
1032+ /*
1033+ * Publish /dev/mem initialized.
1034+ * Pairs with smp_load_acquire() in revoke_devmem().
1035+ */
1036+ smp_store_release(&devmem_inode, inode);
10331037
10341038 return 0;
10351039 }
drivers/clocksource/timer-ti-dm-systimer.c+36−10
@@ -19,7 +19,7 @@ · 18 unmodified lines
1919 /* For type1, set SYSC_OMAP2_CLOCKACTIVITY for fck off on idle, l4 clock on */
2020 #define DMTIMER_TYPE1_ENABLE ((1 << 9) | (SYSC_IDLE_SMART << 3) | \
2121 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_AUTOIDLE)
22−
22+#define DMTIMER_TYPE1_DISABLE (SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE)
2323 #define DMTIMER_TYPE2_ENABLE (SYSC_IDLE_SMART_WKUP << 2)
2424 #define DMTIMER_RESET_WAIT 100000
2525
@@ -44,6 +44,8 @@ struct dmtimer_systimer { · 18 unmodified lines
4444 u8 ctrl;
4545 u8 wakeup;
4646 u8 ifctrl;
47+ struct clk *fck;
48+ struct clk *ick;
4749 unsigned long rate;
4850 };
4951
@@ -298,16 +300,20 @@ static void __init dmtimer_systimer_select_best(void) · 248 unmodified lines
298300 }
299301
300302 /* Interface clocks are only available on some SoCs variants */
301−static int __init dmtimer_systimer_init_clock(struct device_node *np,
303+static int __init dmtimer_systimer_init_clock(struct dmtimer_systimer *t,
304+ struct device_node *np,
302305 const char *name,
303306 unsigned long *rate)
304307 {
305308 struct clk *clock;
306309 unsigned long r;
310+ bool is_ick = false;
307311 int error;
308312
313+ is_ick = !strncmp(name, "ick", 3);
314+
309315 clock = of_clk_get_by_name(np, name);
310− if ((PTR_ERR(clock) == -EINVAL) && !strncmp(name, "ick", 3))
316+ if ((PTR_ERR(clock) == -EINVAL) && is_ick)
311317 return 0;
312318 else if (IS_ERR(clock))
313319 return PTR_ERR(clock);
@@ -320,6 +326,11 @@ static int __init dmtimer_systimer_init_clock(struct device_node *np, · 6 unmodified lines
320326 if (!r)
321327 return -ENODEV;
322328
329+ if (is_ick)
330+ t->ick = clock;
331+ else
332+ t->fck = clock;
333+
323334 *rate = r;
324335
325336 return 0;
@@ -339,7 +350,10 @@ static void dmtimer_systimer_enable(struct dmtimer_systimer *t) · 13 unmodified lines
339350
340351 static void dmtimer_systimer_disable(struct dmtimer_systimer *t)
341352 {
342− writel_relaxed(0, t->base + t->sysc);
353+ if (!dmtimer_systimer_revision1(t))
354+ return;
355+
356+ writel_relaxed(DMTIMER_TYPE1_DISABLE, t->base + t->sysc);
343357 }
344358
345359 static int __init dmtimer_systimer_setup(struct device_node *np,
@@ -366,13 +380,13 @@ static int __init dmtimer_systimer_setup(struct device_node *np, · 20 unmodified lines
366380 pr_err("%s: clock source init failed: %i\n", __func__, error);
367381
368382 /* For ti-sysc, we have timer clocks at the parent module level */
369− error = dmtimer_systimer_init_clock(np->parent, "fck", &rate);
383+ error = dmtimer_systimer_init_clock(t, np->parent, "fck", &rate);
370384 if (error)
371385 goto err_unmap;
372386
373387 t->rate = rate;
374388
375− error = dmtimer_systimer_init_clock(np->parent, "ick", &rate);
389+ error = dmtimer_systimer_init_clock(t, np->parent, "ick", &rate);
376390 if (error)
377391 goto err_unmap;
378392
@@ -496,12 +510,18 @@ static void omap_clockevent_idle(struct clock_event_device *evt) · 117 unmodified lines
496510 struct dmtimer_systimer *t = &clkevt->t;
497511
498512 dmtimer_systimer_disable(t);
513+ clk_disable(t->fck);
499514 }
500515
501516 static void omap_clockevent_unidle(struct clock_event_device *evt)
502517 {
503518 struct dmtimer_clockevent *clkevt = to_dmtimer_clockevent(evt);
504519 struct dmtimer_systimer *t = &clkevt->t;
520+ int error;
521+
522+ error = clk_enable(t->fck);
523+ if (error)
524+ pr_err("could not enable timer fck on resume: %i\n", error);
505525
506526 dmtimer_systimer_enable(t);
507527 writel_relaxed(OMAP_TIMER_INT_OVERFLOW, t->base + t->irq_ena);
@@ -570,8 +590,8 @@ static int __init dmtimer_clockevent_init(struct device_node *np) · 62 unmodified lines
570590 3, /* Timer internal resynch latency */
571591 0xffffffff);
572592
573− if (of_device_is_compatible(np, "ti,am33xx") ||
574− of_device_is_compatible(np, "ti,am43")) {
593+ if (of_machine_is_compatible("ti,am33xx") ||
594+ of_machine_is_compatible("ti,am43")) {
575595 dev->suspend = omap_clockevent_idle;
576596 dev->resume = omap_clockevent_unidle;
577597 }
@@ -616,12 +636,18 @@ static void dmtimer_clocksource_suspend(struct clocksource *cs) · 38 unmodified lines
616636
617637 clksrc->loadval = readl_relaxed(t->base + t->counter);
618638 dmtimer_systimer_disable(t);
639+ clk_disable(t->fck);
619640 }
620641
621642 static void dmtimer_clocksource_resume(struct clocksource *cs)
622643 {
623644 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs);
624645 struct dmtimer_systimer *t = &clksrc->t;
646+ int error;
647+
648+ error = clk_enable(t->fck);
649+ if (error)
650+ pr_err("could not enable timer fck on resume: %i\n", error);
625651
626652 dmtimer_systimer_enable(t);
627653 writel_relaxed(clksrc->loadval, t->base + t->counter);
@@ -653,8 +679,8 @@ static int __init dmtimer_clocksource_init(struct device_node *np) · 25 unmodified lines
653679 dev->mask = CLOCKSOURCE_MASK(32);
654680 dev->flags = CLOCK_SOURCE_IS_CONTINUOUS;
655681
656− if (of_device_is_compatible(np, "ti,am33xx") ||
657− of_device_is_compatible(np, "ti,am43")) {
682+ /* Unlike for clockevent, legacy code sets suspend only for am4 */
683+ if (of_machine_is_compatible("ti,am43")) {
658684 dev->suspend = dmtimer_clocksource_suspend;
659685 dev->resume = dmtimer_clocksource_resume;
660686 }
drivers/crypto/chelsio/chtls/chtls_cm.c+1−1
@@ -102,7 +102,7 @@ static struct net_device *chtls_find_netdev(struct chtls_dev *cdev, · 101 unmodified lines
102102 case PF_INET:
103103 if (likely(!inet_sk(sk)->inet_rcv_saddr))
104104 return ndev;
105− ndev = ip_dev_find(&init_net, inet_sk(sk)->inet_rcv_saddr);
105+ ndev = __ip_dev_find(&init_net, inet_sk(sk)->inet_rcv_saddr, false);
106106 break;
107107 #if IS_ENABLED(CONFIG_IPV6)
108108 case PF_INET6:
drivers/crypto/chelsio/chtls/chtls_io.c+4−3
@@ -1052,14 +1052,15 @@ int chtls_sendmsg(struct sock *sk, struct msghdr *msg, size_t size) · 1051 unmodified lines
10521052 &record_type);
10531053 if (err)
10541054 goto out_err;
1055+
1056+ /* Avoid appending tls handshake, alert to tls data */
1057+ if (skb)
1058+ tx_skb_finalize(skb);
10551059 }
10561060
10571061 recordsz = size;
10581062 csk->tlshws.txleft = recordsz;
10591063 csk->tlshws.type = record_type;
1060−
1061− if (skb)
1062− ULP_SKB_CB(skb)->ulp.tls.type = record_type;
10631064 }
10641065
10651066 if (!skb || (ULP_SKB_CB(skb)->flags & ULPCB_FLAG_NO_APPEND) ||
drivers/firmware/efi/efi-pstore.c+1−4
@@ -356,10 +356,7 @@ static struct pstore_info efi_pstore_info = { · 355 unmodified lines
356356
357357 static __init int efivars_pstore_init(void)
358358 {
359− if (!efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))
360− return 0;
361−
362− if (!efivars_kobject())
359+ if (!efivars_kobject() || !efivar_supports_writes())
363360 return 0;
364361
365362 if (efivars_pstore_disable)
drivers/firmware/efi/efi.c+8−4
@@ -176,11 +176,13 @@ static struct efivar_operations generic_ops; · 175 unmodified lines
176176 static int generic_ops_register(void)
177177 {
178178 generic_ops.get_variable = efi.get_variable;
179− generic_ops.set_variable = efi.set_variable;
180− generic_ops.set_variable_nonblocking = efi.set_variable_nonblocking;
181179 generic_ops.get_next_variable = efi.get_next_variable;
182180 generic_ops.query_variable_store = efi_query_variable_store;
183181
182+ if (efi_rt_services_supported(EFI_RT_SUPPORTED_SET_VARIABLE)) {
183+ generic_ops.set_variable = efi.set_variable;
184+ generic_ops.set_variable_nonblocking = efi.set_variable_nonblocking;
185+ }
184186 return efivars_register(&generic_efivars, &generic_ops, efi_kobj);
185187 }
186188
@@ -382,7 +384,8 @@ static int __init efisubsys_init(void) · 195 unmodified lines
382384 return -ENOMEM;
383385 }
384386
385− if (efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES)) {
387+ if (efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE |
388+ EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME)) {
386389 efivar_ssdt_load();
387390 error = generic_ops_register();
388391 if (error)
@@ -416,7 +419,8 @@ static int __init efisubsys_init(void) · 27 unmodified lines
416419 err_remove_group:
417420 sysfs_remove_group(efi_kobj, &efi_subsys_attr_group);
418421 err_unregister:
419− if (efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))
422+ if (efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE |
423+ EFI_RT_SUPPORTED_GET_NEXT_VARIABLE_NAME))
420424 generic_ops_unregister();
421425 err_put:
422426 kobject_put(efi_kobj);
drivers/firmware/efi/efivars.c+1−4
@@ -680,11 +680,8 @@ int efivars_sysfs_init(void) · 679 unmodified lines
680680 struct kobject *parent_kobj = efivars_kobject();
681681 int error = 0;
682682
683− if (!efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))
684− return -ENODEV;
685−
686683 /* No efivars has been registered yet */
687− if (!parent_kobj)
684+ if (!parent_kobj || !efivar_supports_writes())
688685 return 0;
689686
690687 printk(KERN_INFO "EFI Variables Facility v%s %s\n", EFIVARS_VERSION,
drivers/firmware/efi/libstub/Makefile+1−2
@@ -6,8 +6,7 @@ · 5 unmodified lines
66 # enabled, even if doing so doesn't break the build.
77 #
88 cflags-$(CONFIG_X86_32) := -march=i386
9−cflags-$(CONFIG_X86_64) := -mcmodel=small \
10− $(call cc-option,-maccumulate-outgoing-args)
9+cflags-$(CONFIG_X86_64) := -mcmodel=small
1110 cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \
1211 -fPIC -fno-strict-aliasing -mno-red-zone \
1312 -mno-mmx -mno-sse -fshort-wchar \
drivers/firmware/efi/libstub/alignedmem.c+1−1
@@ -44,7 +44,7 @@ efi_status_t efi_allocate_pages_aligned(unsigned long size, unsigned long *addr, · 43 unmodified lines
4444 *addr = ALIGN((unsigned long)alloc_addr, align);
4545
4646 if (slack > 0) {
47− int l = (alloc_addr % align) / EFI_PAGE_SIZE;
47+ int l = (alloc_addr & (align - 1)) / EFI_PAGE_SIZE;
4848
4949 if (l) {
5050 efi_bs_call(free_pages, alloc_addr, slack - l + 1);
drivers/firmware/efi/libstub/efi-stub.c+0−17
@@ -121,23 +121,6 @@ static unsigned long get_dram_base(void) · 120 unmodified lines
121121 return membase;
122122 }
123123
124−/*
125− * This function handles the architcture specific differences between arm and
126− * arm64 regarding where the kernel image must be loaded and any memory that
127− * must be reserved. On failure it is required to free all
128− * all allocations it has made.
129− */
130−efi_status_t handle_kernel_image(unsigned long *image_addr,
131− unsigned long *image_size,
132− unsigned long *reserve_addr,
133− unsigned long *reserve_size,
134− unsigned long dram_base,
135− efi_loaded_image_t *image);
136−
137−asmlinkage void __noreturn efi_enter_kernel(unsigned long entrypoint,
138− unsigned long fdt_addr,
139− unsigned long fdt_size);
140−
141124 /*
142125 * EFI entry point for the arm/arm64 EFI stubs. This is the entrypoint
143126 * that is described in the PE/COFF header. Most of the code is the same
drivers/firmware/efi/libstub/efistub.h+16−0
@@ -776,6 +776,22 @@ efi_status_t efi_load_initrd(efi_loaded_image_t *image, · 775 unmodified lines
776776 unsigned long *load_size,
777777 unsigned long soft_limit,
778778 unsigned long hard_limit);
779+/*
780+ * This function handles the architcture specific differences between arm and
781+ * arm64 regarding where the kernel image must be loaded and any memory that
782+ * must be reserved. On failure it is required to free all
783+ * all allocations it has made.
784+ */
785+efi_status_t handle_kernel_image(unsigned long *image_addr,
786+ unsigned long *image_size,
787+ unsigned long *reserve_addr,
788+ unsigned long *reserve_size,
789+ unsigned long dram_base,
790+ efi_loaded_image_t *image);
791+
792+asmlinkage void __noreturn efi_enter_kernel(unsigned long entrypoint,
793+ unsigned long fdt_addr,
794+ unsigned long fdt_size);
779795
780796 void efi_handle_post_ebs_state(void);
781797
drivers/firmware/efi/libstub/x86-stub.c+4−4
@@ -8,6 +8,7 @@ · 7 unmodified lines
88
99 #include <linux/efi.h>
1010 #include <linux/pci.h>
11+#include <linux/stddef.h>
1112
1213 #include <asm/efi.h>
1314 #include <asm/e820/types.h>
@@ -361,8 +362,6 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, · 347 unmodified lines
361362 int options_size = 0;
362363 efi_status_t status;
363364 char *cmdline_ptr;
364− unsigned long ramdisk_addr;
365− unsigned long ramdisk_size;
366365
367366 efi_system_table = sys_table_arg;
368367
@@ -390,8 +389,9 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, · 21 unmodified lines
390389
391390 hdr = &boot_params->hdr;
392391
393− /* Copy the second sector to boot_params */
394− memcpy(&hdr->jump, image_base + 512, 512);
392+ /* Copy the setup header from the second sector to boot_params */
393+ memcpy(&hdr->jump, image_base + 512,
394+ sizeof(struct setup_header) - offsetof(struct setup_header, jump));
395395
396396 /*
397397 * Fill out some of the header fields ourselves because the
drivers/firmware/efi/vars.c+6−0
@@ -1229,3 +1229,9 @@ out: · 1228 unmodified lines
12291229 return rv;
12301230 }
12311231 EXPORT_SYMBOL_GPL(efivars_unregister);
1232+
1233+int efivar_supports_writes(void)
1234+{
1235+ return __efivars && __efivars->ops->set_variable;
1236+}
1237+EXPORT_SYMBOL_GPL(efivar_supports_writes);
drivers/fpga/dfl-afu-main.c+2−1
@@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev) · 82 unmodified lines
8383 * on this port and minimum soft reset pulse width has elapsed.
8484 * Driver polls port_soft_reset_ack to determine if reset done by HW.
8585 */
86− if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST,
86+ if (readq_poll_timeout(base + PORT_HDR_CTRL, v,
87+ v & PORT_CTRL_SFTRST_ACK,
8788 RST_POLL_INVL, RST_POLL_TIMEOUT)) {
8889 dev_err(&pdev->dev, "timeout, fail to reset device\n");
8990 return -ETIMEDOUT;
drivers/fpga/dfl-pci.c+2−1
@@ -227,7 +227,6 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) · 226 unmodified lines
227227 {
228228 struct cci_drvdata *drvdata = pci_get_drvdata(pcidev);
229229 struct dfl_fpga_cdev *cdev = drvdata->cdev;
230− int ret = 0;
231230
232231 if (!num_vfs) {
233232 /*
@@ -239,6 +238,8 @@ static int cci_pci_sriov_configure(struct pci_dev *pcidev, int num_vfs) · 5 unmodified lines
239238 dfl_fpga_cdev_config_ports_pf(cdev);
240239
241240 } else {
241+ int ret;
242+
242243 /*
243244 * before enable SRIOV, put released ports into VF access mode
244245 * first of all.
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c+3−6
@@ -778,8 +778,7 @@ static ssize_t amdgpu_set_pp_od_clk_voltage(struct device *dev, · 777 unmodified lines
778778 tmp_str++;
779779 while (isspace(*++tmp_str));
780780
781− while (tmp_str[0]) {
782− sub_str = strsep(&tmp_str, delimiter);
781+ while ((sub_str = strsep(&tmp_str, delimiter)) != NULL) {
783782 ret = kstrtol(sub_str, 0, &parameter[parameter_size]);
784783 if (ret)
785784 return -EINVAL;
@@ -1039,8 +1038,7 @@ static ssize_t amdgpu_read_mask(const char *buf, size_t count, uint32_t *mask) · 253 unmodified lines
10391038 memcpy(buf_cpy, buf, bytes);
10401039 buf_cpy[bytes] = '\0';
10411040 tmp = buf_cpy;
1042− while (tmp[0]) {
1043− sub_str = strsep(&tmp, delimiter);
1041+ while ((sub_str = strsep(&tmp, delimiter)) != NULL) {
10441042 if (strlen(sub_str)) {
10451043 ret = kstrtol(sub_str, 0, &level);
10461044 if (ret)
@@ -1637,8 +1635,7 @@ static ssize_t amdgpu_set_pp_power_profile_mode(struct device *dev, · 590 unmodified lines
16371635 i++;
16381636 memcpy(buf_cpy, buf, count-i);
16391637 tmp_str = buf_cpy;
1640− while (tmp_str[0]) {
1641− sub_str = strsep(&tmp_str, delimiter);
1638+ while ((sub_str = strsep(&tmp_str, delimiter)) != NULL) {
16421639 ret = kstrtol(sub_str, 0, &parameter[parameter_size]);
16431640 if (ret)
16441641 return -EINVAL;
drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c+6−4
@@ -644,9 +644,6 @@ static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, · 643 unmodified lines
644644
645645 /* sclk is bigger than max sclk in the dependence table */
646646 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT;
647− vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),
648− (dep_table->entries[i - 1].vddc -
649− (uint16_t)VDDC_VDDCI_DELTA));
650647
651648 if (SMU7_VOLTAGE_CONTROL_NONE == data->vddci_control)
652649 *voltage |= (data->vbios_boot_state.vddci_bootup_value *
@@ -654,8 +651,13 @@ static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, · 1 unmodified line
654651 else if (dep_table->entries[i - 1].vddci)
655652 *voltage |= (dep_table->entries[i - 1].vddci *
656653 VOLTAGE_SCALE) << VDDC_SHIFT;
657− else
654+ else {
655+ vddci = phm_find_closest_vddci(&(data->vddci_voltage_table),
656+ (dep_table->entries[i - 1].vddc -
657+ (uint16_t)VDDC_VDDCI_DELTA));
658+
658659 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT;
660+ }
659661
660662 if (SMU7_VOLTAGE_CONTROL_NONE == data->mvdd_control)
661663 *mvdd = data->vbios_boot_state.mvdd_bootup_value * VOLTAGE_SCALE;
drivers/gpu/drm/lima/lima_pp.c+2−0
@@ -271,6 +271,8 @@ void lima_pp_fini(struct lima_ip *ip) · 270 unmodified lines
271271
272272 int lima_pp_bcast_resume(struct lima_ip *ip)
273273 {
274+ /* PP has been reset by individual PP resume */
275+ ip->data.async_reset = false;
274276 return 0;
275277 }
276278
drivers/gpu/drm/sun4i/sun4i_hdmi_enc.c+1−1
@@ -260,7 +260,7 @@ sun4i_hdmi_connector_detect(struct drm_connector *connector, bool force) · 259 unmodified lines
260260 unsigned long reg;
261261
262262 reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG);
263− if (reg & SUN4I_HDMI_HPD_HIGH) {
263+ if (!(reg & SUN4I_HDMI_HPD_HIGH)) {
264264 cec_phys_addr_invalidate(hdmi->cec_adap);
265265 return connector_status_disconnected;
266266 }
drivers/i2c/busses/i2c-cadence.c+12−16
@@ -421,20 +421,21 @@ static irqreturn_t cdns_i2c_master_isr(void *ptr) · 420 unmodified lines
421421 /* Read data if receive data valid is set */
422422 while (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) &
423423 CDNS_I2C_SR_RXDV) {
424− /*
425− * Clear hold bit that was set for FIFO control if
426− * RX data left is less than FIFO depth, unless
427− * repeated start is selected.
428− */
429− if ((id->recv_count < CDNS_I2C_FIFO_DEPTH) &&
430− !id->bus_hold_flag)
431− cdns_i2c_clear_bus_hold(id);
432−
433424 if (id->recv_count > 0) {
434425 *(id->p_recv_buf)++ =
435426 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);
436427 id->recv_count--;
437428 id->curr_recv_count--;
429+
430+ /*
431+ * Clear hold bit that was set for FIFO control
432+ * if RX data left is less than or equal to
433+ * FIFO DEPTH unless repeated start is selected
434+ */
435+ if (id->recv_count <= CDNS_I2C_FIFO_DEPTH &&
436+ !id->bus_hold_flag)
437+ cdns_i2c_clear_bus_hold(id);
438+
438439 } else {
439440 dev_err(id->adap.dev.parent,
440441 "xfer_size reg rollover. xfer aborted!\n");
@@ -594,10 +595,8 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id) · 153 unmodified lines
594595 * Check for the message size against FIFO depth and set the
595596 * 'hold bus' bit if it is greater than FIFO depth.
596597 */
597− if ((id->recv_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)
598+ if (id->recv_count > CDNS_I2C_FIFO_DEPTH)
598599 ctrl_reg |= CDNS_I2C_CR_HOLD;
599− else
600− ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
601600
602601 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
603602
@@ -654,11 +653,8 @@ static void cdns_i2c_msend(struct cdns_i2c *id) · 50 unmodified lines
654653 * Check for the message size against FIFO depth and set the
655654 * 'hold bus' bit if it is greater than FIFO depth.
656655 */
657− if ((id->send_count > CDNS_I2C_FIFO_DEPTH) || id->bus_hold_flag)
656+ if (id->send_count > CDNS_I2C_FIFO_DEPTH)
658657 ctrl_reg |= CDNS_I2C_CR_HOLD;
659− else
660− ctrl_reg = ctrl_reg & ~CDNS_I2C_CR_HOLD;
661−
662658 cdns_i2c_writereg(ctrl_reg, CDNS_I2C_CR_OFFSET);
663659
664660 /* Clear the interrupts in interrupt status register. */
drivers/i2c/busses/i2c-qcom-geni.c+4−2
@@ -367,7 +367,6 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 366 unmodified lines
367367 geni_se_select_mode(se, GENI_SE_FIFO);
368368
369369 writel_relaxed(len, se->base + SE_I2C_RX_TRANS_LEN);
370− geni_se_setup_m_cmd(se, I2C_READ, m_param);
371370
372371 if (dma_buf && geni_se_rx_dma_prep(se, dma_buf, len, &rx_dma)) {
373372 geni_se_select_mode(se, GENI_SE_FIFO);
@@ -375,6 +374,8 @@ static int geni_i2c_rx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 1 unmodified line
375374 dma_buf = NULL;
376375 }
377376
377+ geni_se_setup_m_cmd(se, I2C_READ, m_param);
378+
378379 time_left = wait_for_completion_timeout(&gi2c->done, XFER_TIMEOUT);
379380 if (!time_left)
380381 geni_i2c_abort_xfer(gi2c);
@@ -408,7 +409,6 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 27 unmodified lines
408409 geni_se_select_mode(se, GENI_SE_FIFO);
409410
410411 writel_relaxed(len, se->base + SE_I2C_TX_TRANS_LEN);
411− geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
412412
413413 if (dma_buf && geni_se_tx_dma_prep(se, dma_buf, len, &tx_dma)) {
414414 geni_se_select_mode(se, GENI_SE_FIFO);
@@ -416,6 +416,8 @@ static int geni_i2c_tx_one_msg(struct geni_i2c_dev *gi2c, struct i2c_msg *msg, · 1 unmodified line
416416 dma_buf = NULL;
417417 }
418418
419+ geni_se_setup_m_cmd(se, I2C_WRITE, m_param);
420+
419421 if (!dma_buf) /* Get FIFO IRQ */
420422 writel_relaxed(1, se->base + SE_GENI_TX_WATERMARK_REG);
421423
drivers/i2c/busses/i2c-rcar.c+3−0
@@ -868,6 +868,7 @@ static int rcar_unreg_slave(struct i2c_client *slave) · 867 unmodified lines
868868 /* disable irqs and ensure none is running before clearing ptr */
869869 rcar_i2c_write(priv, ICSIER, 0);
870870 rcar_i2c_write(priv, ICSCR, 0);
871+ rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
871872
872873 synchronize_irq(priv->irq);
873874 priv->slave = NULL;
@@ -969,6 +970,8 @@ static int rcar_i2c_probe(struct platform_device *pdev) · 95 unmodified lines
969970 if (ret < 0)
970971 goto out_pm_put;
971972
973+ rcar_i2c_write(priv, ICSAR, 0); /* Gen2: must be 0 if not using slave */
974+
972975 if (priv->devtype == I2C_RCAR_GEN3) {
973976 priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
974977 if (!IS_ERR(priv->rstc)) {
drivers/infiniband/core/cm.c+2−0
@@ -3676,10 +3676,12 @@ static int cm_send_sidr_rep_locked(struct cm_id_private *cm_id_priv, · 3675 unmodified lines
36763676 return ret;
36773677 }
36783678 cm_id_priv->id.state = IB_CM_IDLE;
3679+ spin_lock_irq(&cm.lock);
36793680 if (!RB_EMPTY_NODE(&cm_id_priv->sidr_id_node)) {
36803681 rb_erase(&cm_id_priv->sidr_id_node, &cm.remote_sidr_table);
36813682 RB_CLEAR_NODE(&cm_id_priv->sidr_id_node);
36823683 }
3684+ spin_unlock_irq(&cm.lock);
36833685 return 0;
36843686 }
36853687
drivers/infiniband/core/rdma_core.c+3−3
@@ -649,9 +649,6 @@ void rdma_alloc_commit_uobject(struct ib_uobject *uobj, · 648 unmodified lines
649649 {
650650 struct ib_uverbs_file *ufile = attrs->ufile;
651651
652− /* alloc_commit consumes the uobj kref */
653− uobj->uapi_object->type_class->alloc_commit(uobj);
654−
655652 /* kref is held so long as the uobj is on the uobj list. */
656653 uverbs_uobject_get(uobj);
657654 spin_lock_irq(&ufile->uobjects_lock);
@@ -661,6 +658,9 @@ void rdma_alloc_commit_uobject(struct ib_uobject *uobj, · 3 unmodified lines
661658 /* matches atomic_set(-1) in alloc_uobj */
662659 atomic_set(&uobj->usecnt, 0);
663660
661+ /* alloc_commit consumes the uobj kref */
662+ uobj->uapi_object->type_class->alloc_commit(uobj);
663+
664664 /* Matches the down_read in rdma_alloc_begin_uobject */
665665 up_read(&ufile->hw_destroy_rwsem);
666666 }
drivers/infiniband/hw/hns/hns_roce_hw_v2.c+22−12
@@ -3954,6 +3954,15 @@ static int config_qp_sq_buf(struct hns_roce_dev *hr_dev, · 3953 unmodified lines
39543954 return 0;
39553955 }
39563956
3957+static inline enum ib_mtu get_mtu(struct ib_qp *ibqp,
3958+ const struct ib_qp_attr *attr)
3959+{
3960+ if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_UD)
3961+ return IB_MTU_4096;
3962+
3963+ return attr->path_mtu;
3964+}
3965+
39573966 static int modify_qp_init_to_rtr(struct ib_qp *ibqp,
39583967 const struct ib_qp_attr *attr, int attr_mask,
39593968 struct hns_roce_v2_qp_context *context,
@@ -3965,6 +3974,7 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, · 5 unmodified lines
39653974 struct ib_device *ibdev = &hr_dev->ib_dev;
39663975 dma_addr_t trrl_ba;
39673976 dma_addr_t irrl_ba;
3977+ enum ib_mtu mtu;
39683978 u8 port_num;
39693979 u64 *mtts;
39703980 u8 *dmac;
@@ -4062,23 +4072,23 @@ static int modify_qp_init_to_rtr(struct ib_qp *ibqp, · 91 unmodified lines
40624072 roce_set_field(qpc_mask->byte_52_udpspn_dmac, V2_QPC_BYTE_52_DMAC_M,
40634073 V2_QPC_BYTE_52_DMAC_S, 0);
40644074
4065− /* mtu*(2^LP_PKTN_INI) should not bigger than 1 message length 64kb */
4075+ mtu = get_mtu(ibqp, attr);
4076+
4077+ if (attr_mask & IB_QP_PATH_MTU) {
4078+ roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4079+ V2_QPC_BYTE_24_MTU_S, mtu);
4080+ roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4081+ V2_QPC_BYTE_24_MTU_S, 0);
4082+ }
4083+
4084+#define MAX_LP_MSG_LEN 65536
4085+ /* MTU*(2^LP_PKTN_INI) shouldn't be bigger than 64kb */
40664086 roce_set_field(context->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
40674087 V2_QPC_BYTE_56_LP_PKTN_INI_S,
4068− ilog2(hr_dev->caps.max_sq_inline / IB_MTU_4096));
4088+ ilog2(MAX_LP_MSG_LEN / ib_mtu_enum_to_int(mtu)));
40694089 roce_set_field(qpc_mask->byte_56_dqpn_err, V2_QPC_BYTE_56_LP_PKTN_INI_M,
40704090 V2_QPC_BYTE_56_LP_PKTN_INI_S, 0);
40714091
4072− if (ibqp->qp_type == IB_QPT_GSI || ibqp->qp_type == IB_QPT_UD)
4073− roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4074− V2_QPC_BYTE_24_MTU_S, IB_MTU_4096);
4075− else if (attr_mask & IB_QP_PATH_MTU)
4076− roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4077− V2_QPC_BYTE_24_MTU_S, attr->path_mtu);
4078−
4079− roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_MTU_M,
4080− V2_QPC_BYTE_24_MTU_S, 0);
4081−
40824092 roce_set_bit(qpc_mask->byte_108_rx_reqepsn,
40834093 V2_QPC_BYTE_108_RX_REQ_PSN_ERR_S, 0);
40844094 roce_set_field(qpc_mask->byte_96_rx_reqmsn, V2_QPC_BYTE_96_RX_REQ_MSN_M,
drivers/infiniband/hw/hns/hns_roce_mr.c+1−1
@@ -120,7 +120,7 @@ static int alloc_mr_pbl(struct hns_roce_dev *hr_dev, struct hns_roce_mr *mr, · 119 unmodified lines
120120
121121 mr->pbl_hop_num = is_fast ? 1 : hr_dev->caps.pbl_hop_num;
122122 buf_attr.page_shift = is_fast ? PAGE_SHIFT :
123− hr_dev->caps.pbl_buf_pg_sz + HNS_HW_PAGE_SHIFT;
123+ hr_dev->caps.pbl_buf_pg_sz + PAGE_SHIFT;
124124 buf_attr.region[0].size = length;
125125 buf_attr.region[0].hopnum = mr->pbl_hop_num;
126126 buf_attr.region_count = 1;
drivers/infiniband/hw/mlx5/odp.c+19−3
@@ -601,6 +601,23 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 600 unmodified lines
601601 */
602602 synchronize_srcu(&dev->odp_srcu);
603603
604+ /*
605+ * All work on the prefetch list must be completed, xa_erase() prevented
606+ * new work from being created.
607+ */
608+ wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work));
609+
610+ /*
611+ * At this point it is forbidden for any other thread to enter
612+ * pagefault_mr() on this imr. It is already forbidden to call
613+ * pagefault_mr() on an implicit child. Due to this additions to
614+ * implicit_children are prevented.
615+ */
616+
617+ /*
618+ * Block destroy_unused_implicit_child_mr() from incrementing
619+ * num_deferred_work.
620+ */
604621 xa_lock(&imr->implicit_children);
605622 xa_for_each (&imr->implicit_children, idx, mtt) {
606623 __xa_erase(&imr->implicit_children, idx);
@@ -609,9 +626,8 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 2 unmodified lines
609626 xa_unlock(&imr->implicit_children);
610627
611628 /*
612− * num_deferred_work can only be incremented inside the odp_srcu, or
613− * under xa_lock while the child is in the xarray. Thus at this point
614− * it is only decreasing, and all work holding it is now on the wq.
629+ * Wait for any concurrent destroy_unused_implicit_child_mr() to
630+ * complete.
615631 */
616632 wait_event(imr->q_deferred_work, !atomic_read(&imr->num_deferred_work));
617633
drivers/infiniband/hw/mlx5/srq_cmd.c+2−2
@@ -83,11 +83,11 @@ struct mlx5_core_srq *mlx5_cmd_get_srq(struct mlx5_ib_dev *dev, u32 srqn) · 82 unmodified lines
8383 struct mlx5_srq_table *table = &dev->srq_table;
8484 struct mlx5_core_srq *srq;
8585
86− xa_lock(&table->array);
86+ xa_lock_irq(&table->array);
8787 srq = xa_load(&table->array, srqn);
8888 if (srq)
8989 refcount_inc(&srq->common.refcount);
90− xa_unlock(&table->array);
90+ xa_unlock_irq(&table->array);
9191
9292 return srq;
9393 }
drivers/interconnect/core.c+9−3
@@ -243,6 +243,7 @@ static int aggregate_requests(struct icc_node *node) · 242 unmodified lines
243243 {
244244 struct icc_provider *p = node->provider;
245245 struct icc_req *r;
246+ u32 avg_bw, peak_bw;
246247
247248 node->avg_bw = 0;
248249 node->peak_bw = 0;
@@ -251,9 +252,14 @@ static int aggregate_requests(struct icc_node *node) · 2 unmodified lines
251252 p->pre_aggregate(node);
252253
253254 hlist_for_each_entry(r, &node->req_list, req_node) {
254− if (!r->enabled)
255− continue;
256− p->aggregate(node, r->tag, r->avg_bw, r->peak_bw,
255+ if (r->enabled) {
256+ avg_bw = r->avg_bw;
257+ peak_bw = r->peak_bw;
258+ } else {
259+ avg_bw = 0;
260+ peak_bw = 0;
261+ }
262+ p->aggregate(node, r->tag, avg_bw, peak_bw,
257263 &node->avg_bw, &node->peak_bw);
258264 }
259265
drivers/interconnect/qcom/msm8916.c+7−7
@@ -197,13 +197,13 @@ DEFINE_QNODE(pcnoc_int_0, MSM8916_PNOC_INT_0, 8, -1, -1, MSM8916_PNOC_SNOC_MAS, · 196 unmodified lines
197197 DEFINE_QNODE(pcnoc_int_1, MSM8916_PNOC_INT_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
198198 DEFINE_QNODE(pcnoc_m_0, MSM8916_PNOC_MAS_0, 8, -1, -1, MSM8916_PNOC_INT_0);
199199 DEFINE_QNODE(pcnoc_m_1, MSM8916_PNOC_MAS_1, 8, -1, -1, MSM8916_PNOC_SNOC_MAS);
200−DEFINE_QNODE(pcnoc_s_0, MSM8916_PNOC_SLV_0, 8, -1, -1, MSM8916_SLAVE_CLK_CTL, MSM8916_SLAVE_TLMM, MSM8916_SLAVE_TCSR, MSM8916_SLAVE_SECURITY, MSM8916_SLAVE_MSS);
201−DEFINE_QNODE(pcnoc_s_1, MSM8916_PNOC_SLV_1, 8, -1, -1, MSM8916_SLAVE_IMEM_CFG, MSM8916_SLAVE_CRYPTO_0_CFG, MSM8916_SLAVE_MSG_RAM, MSM8916_SLAVE_PDM, MSM8916_SLAVE_PRNG);
202−DEFINE_QNODE(pcnoc_s_2, MSM8916_PNOC_SLV_2, 8, -1, -1, MSM8916_SLAVE_SPDM, MSM8916_SLAVE_BOOT_ROM, MSM8916_SLAVE_BIMC_CFG, MSM8916_SLAVE_PNOC_CFG, MSM8916_SLAVE_PMIC_ARB);
203−DEFINE_QNODE(pcnoc_s_3, MSM8916_PNOC_SLV_3, 8, -1, -1, MSM8916_SLAVE_MPM, MSM8916_SLAVE_SNOC_CFG, MSM8916_SLAVE_RBCPR_CFG, MSM8916_SLAVE_QDSS_CFG, MSM8916_SLAVE_DEHR_CFG);
204−DEFINE_QNODE(pcnoc_s_4, MSM8916_PNOC_SLV_4, 8, -1, -1, MSM8916_SLAVE_VENUS_CFG, MSM8916_SLAVE_CAMERA_CFG, MSM8916_SLAVE_DISPLAY_CFG);
205−DEFINE_QNODE(pcnoc_s_8, MSM8916_PNOC_SLV_8, 8, -1, -1, MSM8916_SLAVE_USB_HS, MSM8916_SLAVE_SDCC_1, MSM8916_SLAVE_BLSP_1);
206−DEFINE_QNODE(pcnoc_s_9, MSM8916_PNOC_SLV_9, 8, -1, -1, MSM8916_SLAVE_SDCC_2, MSM8916_SLAVE_LPASS, MSM8916_SLAVE_GRAPHICS_3D_CFG);
200+DEFINE_QNODE(pcnoc_s_0, MSM8916_PNOC_SLV_0, 4, -1, -1, MSM8916_SLAVE_CLK_CTL, MSM8916_SLAVE_TLMM, MSM8916_SLAVE_TCSR, MSM8916_SLAVE_SECURITY, MSM8916_SLAVE_MSS);
201+DEFINE_QNODE(pcnoc_s_1, MSM8916_PNOC_SLV_1, 4, -1, -1, MSM8916_SLAVE_IMEM_CFG, MSM8916_SLAVE_CRYPTO_0_CFG, MSM8916_SLAVE_MSG_RAM, MSM8916_SLAVE_PDM, MSM8916_SLAVE_PRNG);
202+DEFINE_QNODE(pcnoc_s_2, MSM8916_PNOC_SLV_2, 4, -1, -1, MSM8916_SLAVE_SPDM, MSM8916_SLAVE_BOOT_ROM, MSM8916_SLAVE_BIMC_CFG, MSM8916_SLAVE_PNOC_CFG, MSM8916_SLAVE_PMIC_ARB);
203+DEFINE_QNODE(pcnoc_s_3, MSM8916_PNOC_SLV_3, 4, -1, -1, MSM8916_SLAVE_MPM, MSM8916_SLAVE_SNOC_CFG, MSM8916_SLAVE_RBCPR_CFG, MSM8916_SLAVE_QDSS_CFG, MSM8916_SLAVE_DEHR_CFG);
204+DEFINE_QNODE(pcnoc_s_4, MSM8916_PNOC_SLV_4, 4, -1, -1, MSM8916_SLAVE_VENUS_CFG, MSM8916_SLAVE_CAMERA_CFG, MSM8916_SLAVE_DISPLAY_CFG);
205+DEFINE_QNODE(pcnoc_s_8, MSM8916_PNOC_SLV_8, 4, -1, -1, MSM8916_SLAVE_USB_HS, MSM8916_SLAVE_SDCC_1, MSM8916_SLAVE_BLSP_1);
206+DEFINE_QNODE(pcnoc_s_9, MSM8916_PNOC_SLV_9, 4, -1, -1, MSM8916_SLAVE_SDCC_2, MSM8916_SLAVE_LPASS, MSM8916_SLAVE_GRAPHICS_3D_CFG);
207207 DEFINE_QNODE(pcnoc_snoc_mas, MSM8916_PNOC_SNOC_MAS, 8, 29, -1, MSM8916_PNOC_SNOC_SLV);
208208 DEFINE_QNODE(pcnoc_snoc_slv, MSM8916_PNOC_SNOC_SLV, 8, -1, 45, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC, MSM8916_SNOC_INT_1);
209209 DEFINE_QNODE(qdss_int, MSM8916_SNOC_QDSS_INT, 8, -1, -1, MSM8916_SNOC_INT_0, MSM8916_SNOC_INT_BIMC);
drivers/iommu/qcom_iommu.c+17−20
@@ -65,6 +65,7 @@ struct qcom_iommu_domain { · 64 unmodified lines
6565 struct mutex init_mutex; /* Protects iommu pointer */
6666 struct iommu_domain domain;
6767 struct qcom_iommu_dev *iommu;
68+ struct iommu_fwspec *fwspec;
6869 };
6970
7071 static struct qcom_iommu_domain *to_qcom_iommu_domain(struct iommu_domain *dom)
@@ -84,9 +85,9 @@ static struct qcom_iommu_dev * to_iommu(struct device *dev) · 13 unmodified lines
8485 return dev_iommu_priv_get(dev);
8586 }
8687
87−static struct qcom_iommu_ctx * to_ctx(struct device *dev, unsigned asid)
88+static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid)
8889 {
89− struct qcom_iommu_dev *qcom_iommu = to_iommu(dev);
90+ struct qcom_iommu_dev *qcom_iommu = d->iommu;
9091 if (!qcom_iommu)
9192 return NULL;
9293 return qcom_iommu->ctxs[asid - 1];
@@ -118,14 +119,12 @@ iommu_readq(struct qcom_iommu_ctx *ctx, unsigned reg) · 25 unmodified lines
118119
119120 static void qcom_iommu_tlb_sync(void *cookie)
120121 {
121− struct iommu_fwspec *fwspec;
122− struct device *dev = cookie;
122+ struct qcom_iommu_domain *qcom_domain = cookie;
123+ struct iommu_fwspec *fwspec = qcom_domain->fwspec;
123124 unsigned i;
124125
125− fwspec = dev_iommu_fwspec_get(dev);
126−
127126 for (i = 0; i < fwspec->num_ids; i++) {
128− struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);
127+ struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
129128 unsigned int val, ret;
130129
131130 iommu_writel(ctx, ARM_SMMU_CB_TLBSYNC, 0);
@@ -139,14 +138,12 @@ static void qcom_iommu_tlb_sync(void *cookie) · 7 unmodified lines
139138
140139 static void qcom_iommu_tlb_inv_context(void *cookie)
141140 {
142− struct device *dev = cookie;
143− struct iommu_fwspec *fwspec;
141+ struct qcom_iommu_domain *qcom_domain = cookie;
142+ struct iommu_fwspec *fwspec = qcom_domain->fwspec;
144143 unsigned i;
145144
146− fwspec = dev_iommu_fwspec_get(dev);
147−
148145 for (i = 0; i < fwspec->num_ids; i++) {
149− struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);
146+ struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
150147 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid);
151148 }
152149
@@ -156,16 +153,14 @@ static void qcom_iommu_tlb_inv_context(void *cookie) · 3 unmodified lines
156153 static void qcom_iommu_tlb_inv_range_nosync(unsigned long iova, size_t size,
157154 size_t granule, bool leaf, void *cookie)
158155 {
159− struct device *dev = cookie;
160− struct iommu_fwspec *fwspec;
156+ struct qcom_iommu_domain *qcom_domain = cookie;
157+ struct iommu_fwspec *fwspec = qcom_domain->fwspec;
161158 unsigned i, reg;
162159
163160 reg = leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA;
164161
165− fwspec = dev_iommu_fwspec_get(dev);
166−
167162 for (i = 0; i < fwspec->num_ids; i++) {
168− struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);
163+ struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
169164 size_t s = size;
170165
171166 iova = (iova >> 12) << 12;
@@ -256,7 +251,9 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, · 84 unmodified lines
256251 };
257252
258253 qcom_domain->iommu = qcom_iommu;
259− pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, dev);
254+ qcom_domain->fwspec = fwspec;
255+
256+ pgtbl_ops = alloc_io_pgtable_ops(ARM_32_LPAE_S1, &pgtbl_cfg, qcom_domain);
260257 if (!pgtbl_ops) {
261258 dev_err(qcom_iommu->dev, "failed to allocate pagetable ops\n");
262259 ret = -ENOMEM;
@@ -269,7 +266,7 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain, · 6 unmodified lines
269266 domain->geometry.force_aperture = true;
270267
271268 for (i = 0; i < fwspec->num_ids; i++) {
272− struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);
269+ struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
273270
274271 if (!ctx->secure_init) {
275272 ret = qcom_scm_restore_sec_cfg(qcom_iommu->sec_id, ctx->asid);
@@ -419,7 +416,7 @@ static void qcom_iommu_detach_dev(struct iommu_domain *domain, struct device *de · 143 unmodified lines
419416
420417 pm_runtime_get_sync(qcom_iommu->dev);
421418 for (i = 0; i < fwspec->num_ids; i++) {
422− struct qcom_iommu_ctx *ctx = to_ctx(dev, fwspec->ids[i]);
419+ struct qcom_iommu_ctx *ctx = to_ctx(qcom_domain, fwspec->ids[i]);
423420
424421 /* Disable the context bank: */
425422 iommu_writel(ctx, ARM_SMMU_CB_SCTLR, 0);
drivers/md/dm-integrity.c+2−2
@@ -2420,7 +2420,7 @@ static void integrity_writer(struct work_struct *w) · 2419 unmodified lines
24202420 unsigned prev_free_sectors;
24212421
24222422 /* the following test is not needed, but it tests the replay code */
2423− if (unlikely(dm_suspended(ic->ti)) && !ic->meta_dev)
2423+ if (unlikely(dm_post_suspending(ic->ti)) && !ic->meta_dev)
24242424 return;
24252425
24262426 spin_lock_irq(&ic->endio_wait.lock);
@@ -2481,7 +2481,7 @@ static void integrity_recalc(struct work_struct *w) · 54 unmodified lines
24812481
24822482 next_chunk:
24832483
2484− if (unlikely(dm_suspended(ic->ti)))
2484+ if (unlikely(dm_post_suspending(ic->ti)))
24852485 goto unlock_ret;
24862486
24872487 range.logical_sector = le64_to_cpu(ic->sb->recalc_sector);
drivers/md/dm.c+17−0
@@ -143,6 +143,7 @@ EXPORT_SYMBOL_GPL(dm_bio_get_target_bio_nr); · 142 unmodified lines
143143 #define DMF_NOFLUSH_SUSPENDING 5
144144 #define DMF_DEFERRED_REMOVE 6
145145 #define DMF_SUSPENDED_INTERNALLY 7
146+#define DMF_POST_SUSPENDING 8
146147
147148 #define DM_NUMA_NODE NUMA_NO_NODE
148149 static int dm_numa_node = DM_NUMA_NODE;
@@ -2408,6 +2409,7 @@ static void __dm_destroy(struct mapped_device *md, bool wait) · 2259 unmodified lines
24082409 if (!dm_suspended_md(md)) {
24092410 dm_table_presuspend_targets(map);
24102411 set_bit(DMF_SUSPENDED, &md->flags);
2412+ set_bit(DMF_POST_SUSPENDING, &md->flags);
24112413 dm_table_postsuspend_targets(map);
24122414 }
24132415 /* dm_put_live_table must be before msleep, otherwise deadlock is possible */
@@ -2766,7 +2768,9 @@ retry: · 352 unmodified lines
27662768 if (r)
27672769 goto out_unlock;
27682770
2771+ set_bit(DMF_POST_SUSPENDING, &md->flags);
27692772 dm_table_postsuspend_targets(map);
2773+ clear_bit(DMF_POST_SUSPENDING, &md->flags);
27702774
27712775 out_unlock:
27722776 mutex_unlock(&md->suspend_lock);
@@ -2863,7 +2867,9 @@ static void __dm_internal_suspend(struct mapped_device *md, unsigned suspend_fla · 90 unmodified lines
28632867 (void) __dm_suspend(md, map, suspend_flags, TASK_UNINTERRUPTIBLE,
28642868 DMF_SUSPENDED_INTERNALLY);
28652869
2870+ set_bit(DMF_POST_SUSPENDING, &md->flags);
28662871 dm_table_postsuspend_targets(map);
2872+ clear_bit(DMF_POST_SUSPENDING, &md->flags);
28672873 }
28682874
28692875 static void __dm_internal_resume(struct mapped_device *md)
@@ -3024,6 +3030,11 @@ int dm_suspended_md(struct mapped_device *md) · 154 unmodified lines
30243030 return test_bit(DMF_SUSPENDED, &md->flags);
30253031 }
30263032
3033+static int dm_post_suspending_md(struct mapped_device *md)
3034+{
3035+ return test_bit(DMF_POST_SUSPENDING, &md->flags);
3036+}
3037+
30273038 int dm_suspended_internally_md(struct mapped_device *md)
30283039 {
30293040 return test_bit(DMF_SUSPENDED_INTERNALLY, &md->flags);
@@ -3040,6 +3051,12 @@ int dm_suspended(struct dm_target *ti) · 10 unmodified lines
30403051 }
30413052 EXPORT_SYMBOL_GPL(dm_suspended);
30423053
3054+int dm_post_suspending(struct dm_target *ti)
3055+{
3056+ return dm_post_suspending_md(dm_table_get_md(ti->table));
3057+}
3058+EXPORT_SYMBOL_GPL(dm_post_suspending);
3059+
30433060 int dm_noflush_suspending(struct dm_target *ti)
30443061 {
30453062 return __noflush_suspending(dm_table_get_md(ti->table));
drivers/misc/habanalabs/command_submission.c+11−3
@@ -499,11 +499,19 @@ static int validate_queue_index(struct hl_device *hdev, · 498 unmodified lines
499499 struct asic_fixed_properties *asic = &hdev->asic_prop;
500500 struct hw_queue_properties *hw_queue_prop;
501501
502+ /* This must be checked here to prevent out-of-bounds access to
503+ * hw_queues_props array
504+ */
505+ if (chunk->queue_index >= HL_MAX_QUEUES) {
506+ dev_err(hdev->dev, "Queue index %d is invalid\n",
507+ chunk->queue_index);
508+ return -EINVAL;
509+ }
510+
502511 hw_queue_prop = &asic->hw_queues_props[chunk->queue_index];
503512
504− if ((chunk->queue_index >= HL_MAX_QUEUES) ||
505− (hw_queue_prop->type == QUEUE_TYPE_NA)) {
506− dev_err(hdev->dev, "Queue index %d is invalid\n",
513+ if (hw_queue_prop->type == QUEUE_TYPE_NA) {
514+ dev_err(hdev->dev, "Queue index %d is not applicable\n",
507515 chunk->queue_index);
508516 return -EINVAL;
509517 }
drivers/misc/habanalabs/debugfs.c+8−15
@@ -36,7 +36,7 @@ static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 35 unmodified lines
3636 pkt.i2c_reg = i2c_reg;
3737
3838 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
39− HL_DEVICE_TIMEOUT_USEC, (long *) val);
39+ 0, (long *) val);
4040
4141 if (rc)
4242 dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);
@@ -63,7 +63,7 @@ static int hl_debugfs_i2c_write(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 20 unmodified lines
6363 pkt.value = cpu_to_le64(val);
6464
6565 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
66− HL_DEVICE_TIMEOUT_USEC, NULL);
66+ 0, NULL);
6767
6868 if (rc)
6969 dev_err(hdev->dev, "Failed to write to I2C, error %d\n", rc);
@@ -87,7 +87,7 @@ static void hl_debugfs_led_set(struct hl_device *hdev, u8 led, u8 state) · 17 unmodified lines
8787 pkt.value = cpu_to_le64(state);
8888
8989 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
90− HL_DEVICE_TIMEOUT_USEC, NULL);
90+ 0, NULL);
9191
9292 if (rc)
9393 dev_err(hdev->dev, "Failed to set LED %d, error %d\n", led, rc);
@@ -981,7 +981,7 @@ static ssize_t hl_clk_gate_read(struct file *f, char __user *buf, · 887 unmodified lines
981981 if (*ppos)
982982 return 0;
983983
984− sprintf(tmp_buf, "%d\n", hdev->clock_gating);
984+ sprintf(tmp_buf, "0x%llx\n", hdev->clock_gating_mask);
985985 rc = simple_read_from_buffer(buf, strlen(tmp_buf) + 1, ppos, tmp_buf,
986986 strlen(tmp_buf) + 1);
987987
@@ -993,7 +993,7 @@ static ssize_t hl_clk_gate_write(struct file *f, const char __user *buf, · 5 unmodified lines
993993 {
994994 struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
995995 struct hl_device *hdev = entry->hdev;
996− u32 value;
996+ u64 value;
997997 ssize_t rc;
998998
999999 if (atomic_read(&hdev->in_reset)) {
@@ -1002,19 +1002,12 @@ static ssize_t hl_clk_gate_write(struct file *f, const char __user *buf, · 2 unmodified lines
10021002 return 0;
10031003 }
10041004
1005− rc = kstrtouint_from_user(buf, count, 10, &value);
1005+ rc = kstrtoull_from_user(buf, count, 16, &value);
10061006 if (rc)
10071007 return rc;
10081008
1009− if (value) {
1010− hdev->clock_gating = 1;
1011− if (hdev->asic_funcs->enable_clock_gating)
1012− hdev->asic_funcs->enable_clock_gating(hdev);
1013− } else {
1014− if (hdev->asic_funcs->disable_clock_gating)
1015− hdev->asic_funcs->disable_clock_gating(hdev);
1016− hdev->clock_gating = 0;
1017− }
1009+ hdev->clock_gating_mask = value;
1010+ hdev->asic_funcs->set_clock_gating(hdev);
10181011
10191012 return count;
10201013 }
drivers/misc/habanalabs/device.c+1−1
@@ -608,7 +608,7 @@ int hl_device_set_debug_mode(struct hl_device *hdev, bool enable) · 607 unmodified lines
608608 hdev->in_debug = 0;
609609
610610 if (!hdev->hard_reset_pending)
611− hdev->asic_funcs->enable_clock_gating(hdev);
611+ hdev->asic_funcs->set_clock_gating(hdev);
612612
613613 goto out;
614614 }
drivers/misc/habanalabs/firmware_if.c+5−5
@@ -61,7 +61,7 @@ int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode) · 60 unmodified lines
6161 pkt.ctl = cpu_to_le32(opcode << ARMCP_PKT_CTL_OPCODE_SHIFT);
6262
6363 return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,
64− sizeof(pkt), HL_DEVICE_TIMEOUT_USEC, NULL);
64+ sizeof(pkt), 0, NULL);
6565 }
6666
6767 int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
@@ -144,7 +144,7 @@ int hl_fw_unmask_irq(struct hl_device *hdev, u16 event_type) · 76 unmodified lines
144144 pkt.value = cpu_to_le64(event_type);
145145
146146 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
147− HL_DEVICE_TIMEOUT_USEC, &result);
147+ 0, &result);
148148
149149 if (rc)
150150 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
@@ -183,7 +183,7 @@ int hl_fw_unmask_irq_arr(struct hl_device *hdev, const u32 *irq_arr, · 32 unmodified lines
183183 ARMCP_PKT_CTL_OPCODE_SHIFT);
184184
185185 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
186− total_pkt_size, HL_DEVICE_TIMEOUT_USEC, &result);
186+ total_pkt_size, 0, &result);
187187
188188 if (rc)
189189 dev_err(hdev->dev, "failed to unmask IRQ array\n");
@@ -204,7 +204,7 @@ int hl_fw_test_cpu_queue(struct hl_device *hdev) · 14 unmodified lines
204204 test_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
205205
206206 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,
207− sizeof(test_pkt), HL_DEVICE_TIMEOUT_USEC, &result);
207+ sizeof(test_pkt), 0, &result);
208208
209209 if (!rc) {
210210 if (result != ARMCP_PACKET_FENCE_VAL)
@@ -248,7 +248,7 @@ int hl_fw_send_heartbeat(struct hl_device *hdev) · 37 unmodified lines
248248 hb_pkt.value = cpu_to_le64(ARMCP_PACKET_FENCE_VAL);
249249
250250 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,
251− sizeof(hb_pkt), HL_DEVICE_TIMEOUT_USEC, &result);
251+ sizeof(hb_pkt), 0, &result);
252252
253253 if ((rc) || (result != ARMCP_PACKET_FENCE_VAL))
254254 rc = -EIO;
drivers/misc/habanalabs/gaudi/gaudi.c+84−39
@@ -80,6 +80,7 @@ · 79 unmodified lines
8080 #define GAUDI_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
8181 #define GAUDI_PLDM_TPC_KERNEL_WAIT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
8282 #define GAUDI_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */
83+#define GAUDI_MSG_TO_CPU_TIMEOUT_USEC 4000000 /* 4s */
8384
8485 #define GAUDI_QMAN0_FENCE_VAL 0x72E91AB9
8586
@@ -98,6 +99,11 @@ · 12 unmodified lines
9899
99100 #define GAUDI_ARB_WDT_TIMEOUT 0x1000000
100101
102+#define GAUDI_CLK_GATE_DEBUGFS_MASK (\
103+ BIT(GAUDI_ENGINE_ID_MME_0) |\
104+ BIT(GAUDI_ENGINE_ID_MME_2) |\
105+ GENMASK_ULL(GAUDI_ENGINE_ID_TPC_7, GAUDI_ENGINE_ID_TPC_0))
106+
101107 static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = {
102108 "gaudi cq 0_0", "gaudi cq 0_1", "gaudi cq 0_2", "gaudi cq 0_3",
103109 "gaudi cq 1_0", "gaudi cq 1_1", "gaudi cq 1_2", "gaudi cq 1_3",
@@ -106,14 +112,14 @@ static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { · 2 unmodified lines
106112 };
107113
108114 static const u8 gaudi_dma_assignment[GAUDI_DMA_MAX] = {
109− [GAUDI_PCI_DMA_1] = 0,
110− [GAUDI_PCI_DMA_2] = 1,
111− [GAUDI_PCI_DMA_3] = 5,
112− [GAUDI_HBM_DMA_1] = 2,
113− [GAUDI_HBM_DMA_2] = 3,
114− [GAUDI_HBM_DMA_3] = 4,
115− [GAUDI_HBM_DMA_4] = 6,
116− [GAUDI_HBM_DMA_5] = 7
115+ [GAUDI_PCI_DMA_1] = GAUDI_ENGINE_ID_DMA_0,
116+ [GAUDI_PCI_DMA_2] = GAUDI_ENGINE_ID_DMA_1,
117+ [GAUDI_PCI_DMA_3] = GAUDI_ENGINE_ID_DMA_5,
118+ [GAUDI_HBM_DMA_1] = GAUDI_ENGINE_ID_DMA_2,
119+ [GAUDI_HBM_DMA_2] = GAUDI_ENGINE_ID_DMA_3,
120+ [GAUDI_HBM_DMA_3] = GAUDI_ENGINE_ID_DMA_4,
121+ [GAUDI_HBM_DMA_4] = GAUDI_ENGINE_ID_DMA_6,
122+ [GAUDI_HBM_DMA_5] = GAUDI_ENGINE_ID_DMA_7
117123 };
118124
119125 static const u8 gaudi_cq_assignment[NUMBER_OF_CMPLT_QUEUES] = {
@@ -1819,7 +1825,7 @@ static void gaudi_init_golden_registers(struct hl_device *hdev) · 1699 unmodified lines
18191825
18201826 gaudi_init_rate_limiter(hdev);
18211827
1822− gaudi_disable_clock_gating(hdev);
1828+ hdev->asic_funcs->disable_clock_gating(hdev);
18231829
18241830 for (tpc_id = 0, tpc_offset = 0;
18251831 tpc_id < TPC_NUMBER_OF_ENGINES;
@@ -2531,46 +2537,55 @@ static void gaudi_tpc_stall(struct hl_device *hdev) · 705 unmodified lines
25312537 WREG32(mmTPC7_CFG_TPC_STALL, 1 << TPC0_CFG_TPC_STALL_V_SHIFT);
25322538 }
25332539
2534−static void gaudi_enable_clock_gating(struct hl_device *hdev)
2540+static void gaudi_set_clock_gating(struct hl_device *hdev)
25352541 {
25362542 struct gaudi_device *gaudi = hdev->asic_specific;
25372543 u32 qman_offset;
25382544 int i;
25392545
2540− if (!hdev->clock_gating)
2541− return;
2542−
2543− if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE)
2544− return;
2545−
25462546 /* In case we are during debug session, don't enable the clock gate
25472547 * as it may interfere
25482548 */
25492549 if (hdev->in_debug)
25502550 return;
25512551
2552− for (i = 0, qman_offset = 0 ; i < PCI_DMA_NUMBER_OF_CHNLS ; i++) {
2552+ for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {
2553+ if (!(hdev->clock_gating_mask &
2554+ (BIT_ULL(gaudi_dma_assignment[i]))))
2555+ continue;
2556+
25532557 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
25542558 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
25552559 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
25562560 QMAN_UPPER_CP_CGM_PWR_GATE_EN);
25572561 }
25582562
2559− for (; i < HBM_DMA_NUMBER_OF_CHNLS ; i++) {
2563+ for (i = GAUDI_HBM_DMA_1 ; i < GAUDI_DMA_MAX ; i++) {
2564+ if (!(hdev->clock_gating_mask &
2565+ (BIT_ULL(gaudi_dma_assignment[i]))))
2566+ continue;
2567+
25602568 qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
25612569 WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
25622570 WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
25632571 QMAN_COMMON_CP_CGM_PWR_GATE_EN);
25642572 }
25652573
2566− WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2567− WREG32(mmMME0_QM_CGM_CFG,
2568− QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2569− WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2570− WREG32(mmMME2_QM_CGM_CFG,
2571− QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2574+ if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0))) {
2575+ WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2576+ WREG32(mmMME0_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2577+ }
2578+
2579+ if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2))) {
2580+ WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
2581+ WREG32(mmMME2_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
2582+ }
25722583
25732584 for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
2585+ if (!(hdev->clock_gating_mask &
2586+ (BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i))))
2587+ continue;
2588+
25742589 WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,
25752590 QMAN_CGM1_PWR_GATE_EN);
25762591 WREG32(mmTPC0_QM_CGM_CFG + qman_offset,
@@ -2663,7 +2678,7 @@ static void gaudi_halt_engines(struct hl_device *hdev, bool hard_reset) · 86 unmodified lines
26632678 gaudi_stop_hbm_dma_qmans(hdev);
26642679 gaudi_stop_pci_dma_qmans(hdev);
26652680
2666− gaudi_disable_clock_gating(hdev);
2681+ hdev->asic_funcs->disable_clock_gating(hdev);
26672682
26682683 msleep(wait_timeout_ms);
26692684
@@ -3003,7 +3018,7 @@ static int gaudi_hw_init(struct hl_device *hdev) · 333 unmodified lines
30033018
30043019 gaudi_init_tpc_qmans(hdev);
30053020
3006− gaudi_enable_clock_gating(hdev);
3021+ hdev->asic_funcs->set_clock_gating(hdev);
30073022
30083023 gaudi_enable_timestamp(hdev);
30093024
@@ -3112,7 +3127,9 @@ static void gaudi_hw_fini(struct hl_device *hdev, bool hard_reset) · 102 unmodified lines
31123127 HW_CAP_HBM_DMA | HW_CAP_PLL |
31133128 HW_CAP_MMU |
31143129 HW_CAP_SRAM_SCRAMBLER |
3115− HW_CAP_HBM_SCRAMBLER);
3130+ HW_CAP_HBM_SCRAMBLER |
3131+ HW_CAP_CLK_GATE);
3132+
31163133 memset(gaudi->events_stat, 0, sizeof(gaudi->events_stat));
31173134 }
31183135
@@ -3463,6 +3480,9 @@ static int gaudi_send_cpu_message(struct hl_device *hdev, u32 *msg, · 344 unmodified lines
34633480 return 0;
34643481 }
34653482
3483+ if (!timeout)
3484+ timeout = GAUDI_MSG_TO_CPU_TIMEOUT_USEC;
3485+
34663486 return hl_fw_send_cpu_message(hdev, GAUDI_QUEUE_ID_CPU_PQ, msg, len,
34673487 timeout, result);
34683488 }
@@ -3865,6 +3885,12 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 396 unmodified lines
38653885 rc = -EPERM;
38663886 break;
38673887
3888+ case PACKET_WREG_BULK:
3889+ dev_err(hdev->dev,
3890+ "User not allowed to use WREG_BULK\n");
3891+ rc = -EPERM;
3892+ break;
3893+
38683894 case PACKET_LOAD_AND_EXE:
38693895 rc = gaudi_validate_load_and_exe_pkt(hdev, parser,
38703896 (struct packet_load_and_exe *) user_pkt);
@@ -3880,7 +3906,6 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 9 unmodified lines
38803906 break;
38813907
38823908 case PACKET_WREG_32:
3883− case PACKET_WREG_BULK:
38843909 case PACKET_MSG_LONG:
38853910 case PACKET_MSG_SHORT:
38863911 case PACKET_REPEAT:
@@ -4521,13 +4546,18 @@ static int gaudi_debugfs_read32(struct hl_device *hdev, u64 addr, u32 *val) · 634 unmodified lines
45214546 int rc = 0;
45224547
45234548 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4524− if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {
4549+
4550+ if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4551+ (hdev->clock_gating_mask &
4552+ GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4553+
45254554 dev_err_ratelimited(hdev->dev,
45264555 "Can't read register - clock gating is enabled!\n");
45274556 rc = -EFAULT;
45284557 } else {
45294558 *val = RREG32(addr - CFG_BASE);
45304559 }
4560+
45314561 } else if ((addr >= SRAM_BASE_ADDR) &&
45324562 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {
45334563 *val = readl(hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4563,13 +4593,18 @@ static int gaudi_debugfs_write32(struct hl_device *hdev, u64 addr, u32 val) · 29 unmodified lines
45634593 int rc = 0;
45644594
45654595 if ((addr >= CFG_BASE) && (addr < CFG_BASE + CFG_SIZE)) {
4566− if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {
4596+
4597+ if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4598+ (hdev->clock_gating_mask &
4599+ GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4600+
45674601 dev_err_ratelimited(hdev->dev,
45684602 "Can't write register - clock gating is enabled!\n");
45694603 rc = -EFAULT;
45704604 } else {
45714605 WREG32(addr - CFG_BASE, val);
45724606 }
4607+
45734608 } else if ((addr >= SRAM_BASE_ADDR) &&
45744609 (addr < SRAM_BASE_ADDR + SRAM_BAR_SIZE)) {
45754610 writel(val, hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4605,7 +4640,11 @@ static int gaudi_debugfs_read64(struct hl_device *hdev, u64 addr, u64 *val) · 29 unmodified lines
46054640 int rc = 0;
46064641
46074642 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4608− if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {
4643+
4644+ if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4645+ (hdev->clock_gating_mask &
4646+ GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4647+
46094648 dev_err_ratelimited(hdev->dev,
46104649 "Can't read register - clock gating is enabled!\n");
46114650 rc = -EFAULT;
@@ -4615,6 +4654,7 @@ static int gaudi_debugfs_read64(struct hl_device *hdev, u64 addr, u64 *val) · 3 unmodified lines
46154654
46164655 *val = (((u64) val_h) << 32) | val_l;
46174656 }
4657+
46184658 } else if ((addr >= SRAM_BASE_ADDR) &&
46194659 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {
46204660 *val = readq(hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4651,7 +4691,11 @@ static int gaudi_debugfs_write64(struct hl_device *hdev, u64 addr, u64 val) · 30 unmodified lines
46514691 int rc = 0;
46524692
46534693 if ((addr >= CFG_BASE) && (addr <= CFG_BASE + CFG_SIZE - sizeof(u64))) {
4654− if (gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) {
4694+
4695+ if ((gaudi->hw_cap_initialized & HW_CAP_CLK_GATE) &&
4696+ (hdev->clock_gating_mask &
4697+ GAUDI_CLK_GATE_DEBUGFS_MASK)) {
4698+
46554699 dev_err_ratelimited(hdev->dev,
46564700 "Can't write register - clock gating is enabled!\n");
46574701 rc = -EFAULT;
@@ -4660,6 +4704,7 @@ static int gaudi_debugfs_write64(struct hl_device *hdev, u64 addr, u64 val) · 2 unmodified lines
46604704 WREG32(addr + sizeof(u32) - CFG_BASE,
46614705 upper_32_bits(val));
46624706 }
4707+
46634708 } else if ((addr >= SRAM_BASE_ADDR) &&
46644709 (addr <= SRAM_BASE_ADDR + SRAM_BAR_SIZE - sizeof(u64))) {
46654710 writeq(val, hdev->pcie_bar[SRAM_BAR_ID] +
@@ -4881,7 +4926,7 @@ static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid) · 215 unmodified lines
48814926 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_ARUSER, asid);
48824927 gaudi_mmu_prepare_reg(hdev, mmPSOC_GLOBAL_CONF_TRACE_AWUSER, asid);
48834928
4884− hdev->asic_funcs->enable_clock_gating(hdev);
4929+ hdev->asic_funcs->set_clock_gating(hdev);
48854930
48864931 mutex_unlock(&gaudi->clk_gate_mutex);
48874932 }
@@ -5262,7 +5307,7 @@ static void gaudi_print_ecc_info_generic(struct hl_device *hdev, · 374 unmodified lines
52625307 }
52635308
52645309 if (disable_clock_gating) {
5265− hdev->asic_funcs->enable_clock_gating(hdev);
5310+ hdev->asic_funcs->set_clock_gating(hdev);
52665311 mutex_unlock(&gaudi->clk_gate_mutex);
52675312 }
52685313 }
@@ -5749,7 +5794,7 @@ static bool gaudi_tpc_read_interrupts(struct hl_device *hdev, u8 tpc_id, · 480 unmodified lines
57495794 /* Clear interrupts */
57505795 WREG32(mmTPC0_CFG_TPC_INTR_CAUSE + tpc_offset, 0);
57515796
5752− hdev->asic_funcs->enable_clock_gating(hdev);
5797+ hdev->asic_funcs->set_clock_gating(hdev);
57535798
57545799 mutex_unlock(&gaudi->clk_gate_mutex);
57555800
@@ -6265,7 +6310,7 @@ static bool gaudi_is_device_idle(struct hl_device *hdev, u32 *mask, · 509 unmodified lines
62656310 if (s)
62666311 seq_puts(s, "\n");
62676312
6268− hdev->asic_funcs->enable_clock_gating(hdev);
6313+ hdev->asic_funcs->set_clock_gating(hdev);
62696314
62706315 mutex_unlock(&gaudi->clk_gate_mutex);
62716316
@@ -6366,7 +6411,7 @@ static int gaudi_run_tpc_kernel(struct hl_device *hdev, u64 tpc_kernel, · 94 unmodified lines
63666411 dev_err(hdev->dev,
63676412 "Timeout while waiting for TPC%d icache prefetch\n",
63686413 tpc_id);
6369− hdev->asic_funcs->enable_clock_gating(hdev);
6414+ hdev->asic_funcs->set_clock_gating(hdev);
63706415 mutex_unlock(&gaudi->clk_gate_mutex);
63716416 return -EIO;
63726417 }
@@ -6395,7 +6440,7 @@ static int gaudi_run_tpc_kernel(struct hl_device *hdev, u64 tpc_kernel, · 22 unmodified lines
63956440 1000,
63966441 kernel_timeout);
63976442
6398− hdev->asic_funcs->enable_clock_gating(hdev);
6443+ hdev->asic_funcs->set_clock_gating(hdev);
63996444 mutex_unlock(&gaudi->clk_gate_mutex);
64006445
64016446 if (rc) {
@@ -6736,7 +6781,7 @@ static const struct hl_asic_funcs gaudi_funcs = { · 334 unmodified lines
67366781 .mmu_invalidate_cache = gaudi_mmu_invalidate_cache,
67376782 .mmu_invalidate_cache_range = gaudi_mmu_invalidate_cache_range,
67386783 .send_heartbeat = gaudi_send_heartbeat,
6739− .enable_clock_gating = gaudi_enable_clock_gating,
6784+ .set_clock_gating = gaudi_set_clock_gating,
67406785 .disable_clock_gating = gaudi_disable_clock_gating,
67416786 .debug_coresight = gaudi_debug_coresight,
67426787 .is_device_idle = gaudi_is_device_idle,
drivers/misc/habanalabs/goya/goya.c+12−8
@@ -88,6 +88,7 @@ · 87 unmodified lines
8888 #define GOYA_PLDM_MMU_TIMEOUT_USEC (MMU_CONFIG_TIMEOUT_USEC * 100)
8989 #define GOYA_PLDM_QMAN0_TIMEOUT_USEC (HL_DEVICE_TIMEOUT_USEC * 30)
9090 #define GOYA_BOOT_FIT_REQ_TIMEOUT_USEC 1000000 /* 1s */
91+#define GOYA_MSG_TO_CPU_TIMEOUT_USEC 4000000 /* 4s */
9192
9293 #define GOYA_QMAN0_FENCE_VAL 0xD169B243
9394
@@ -2830,6 +2831,9 @@ int goya_send_cpu_message(struct hl_device *hdev, u32 *msg, u16 len, · 2736 unmodified lines
28302831 return 0;
28312832 }
28322833
2834+ if (!timeout)
2835+ timeout = GOYA_MSG_TO_CPU_TIMEOUT_USEC;
2836+
28332837 return hl_fw_send_cpu_message(hdev, GOYA_QUEUE_ID_CPU_PQ, msg, len,
28342838 timeout, result);
28352839 }
@@ -4431,8 +4435,8 @@ static int goya_unmask_irq_arr(struct hl_device *hdev, u32 *irq_arr, · 1595 unmodified lines
44314435 pkt->armcp_pkt.ctl = cpu_to_le32(ARMCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY <<
44324436 ARMCP_PKT_CTL_OPCODE_SHIFT);
44334437
4434− rc = goya_send_cpu_message(hdev, (u32 *) pkt, total_pkt_size,
4435− HL_DEVICE_TIMEOUT_USEC, &result);
4438+ rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
4439+ total_pkt_size, 0, &result);
44364440
44374441 if (rc)
44384442 dev_err(hdev->dev, "failed to unmask IRQ array\n");
@@ -4464,8 +4468,8 @@ static int goya_unmask_irq(struct hl_device *hdev, u16 event_type) · 25 unmodified lines
44644468 ARMCP_PKT_CTL_OPCODE_SHIFT);
44654469 pkt.value = cpu_to_le64(event_type);
44664470
4467− rc = goya_send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
4468− HL_DEVICE_TIMEOUT_USEC, &result);
4471+ rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
4472+ 0, &result);
44694473
44704474 if (rc)
44714475 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
@@ -5028,14 +5032,14 @@ int goya_armcp_info_get(struct hl_device *hdev) · 556 unmodified lines
50285032 return 0;
50295033 }
50305034
5031−static void goya_enable_clock_gating(struct hl_device *hdev)
5035+static void goya_set_clock_gating(struct hl_device *hdev)
50325036 {
5033−
5037+ /* clock gating not supported in Goya */
50345038 }
50355039
50365040 static void goya_disable_clock_gating(struct hl_device *hdev)
50375041 {
5038−
5042+ /* clock gating not supported in Goya */
50395043 }
50405044
50415045 static bool goya_is_device_idle(struct hl_device *hdev, u32 *mask,
@@ -5259,7 +5263,7 @@ static const struct hl_asic_funcs goya_funcs = { · 217 unmodified lines
52595263 .mmu_invalidate_cache = goya_mmu_invalidate_cache,
52605264 .mmu_invalidate_cache_range = goya_mmu_invalidate_cache_range,
52615265 .send_heartbeat = goya_send_heartbeat,
5262− .enable_clock_gating = goya_enable_clock_gating,
5266+ .set_clock_gating = goya_set_clock_gating,
52635267 .disable_clock_gating = goya_disable_clock_gating,
52645268 .debug_coresight = goya_debug_coresight,
52655269 .is_device_idle = goya_is_device_idle,
drivers/misc/habanalabs/habanalabs.h+13−6
@@ -578,8 +578,9 @@ enum hl_pll_frequency { · 577 unmodified lines
578578 * @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with
579579 * ASID-VA-size mask.
580580 * @send_heartbeat: send is-alive packet to ArmCP and verify response.
581− * @enable_clock_gating: enable clock gating for reducing power consumption.
582− * @disable_clock_gating: disable clock for accessing registers on HBW.
581+ * @set_clock_gating: enable/disable clock gating per engine according to
582+ * clock gating mask in hdev
583+ * @disable_clock_gating: disable clock gating completely
583584 * @debug_coresight: perform certain actions on Coresight for debugging.
584585 * @is_device_idle: return true if device is idle, false otherwise.
585586 * @soft_reset_late_init: perform certain actions needed after soft reset.
@@ -587,7 +588,11 @@ enum hl_pll_frequency { · 1 unmodified line
587588 * @hw_queues_unlock: release H/W queues lock.
588589 * @get_pci_id: retrieve PCI ID.
589590 * @get_eeprom_data: retrieve EEPROM data from F/W.
590− * @send_cpu_message: send buffer to ArmCP.
591+ * @send_cpu_message: send message to F/W. If the message is timedout, the
592+ * driver will eventually reset the device. The timeout can
593+ * be determined by the calling function or it can be 0 and
594+ * then the timeout is the default timeout for the specific
595+ * ASIC
591596 * @get_hw_state: retrieve the H/W state
592597 * @pci_bars_map: Map PCI BARs.
593598 * @set_dram_bar_base: Set DRAM BAR to map specific device address. Returns
@@ -680,7 +685,7 @@ struct hl_asic_funcs { · 86 unmodified lines
680685 int (*mmu_invalidate_cache_range)(struct hl_device *hdev, bool is_hard,
681686 u32 asid, u64 va, u64 size);
682687 int (*send_heartbeat)(struct hl_device *hdev);
683− void (*enable_clock_gating)(struct hl_device *hdev);
688+ void (*set_clock_gating)(struct hl_device *hdev);
684689 void (*disable_clock_gating)(struct hl_device *hdev);
685690 int (*debug_coresight)(struct hl_device *hdev, void *data);
686691 bool (*is_device_idle)(struct hl_device *hdev, u32 *mask,
@@ -1398,6 +1403,9 @@ struct hl_device_idle_busy_ts { · 711 unmodified lines
13981403 * @max_power: the max power of the device, as configured by the sysadmin. This
13991404 * value is saved so in case of hard-reset, the driver will restore
14001405 * this value and update the F/W after the re-initialization
1406+ * @clock_gating_mask: is clock gating enabled. bitmask that represents the
1407+ * different engines. See debugfs-driver-habanalabs for
1408+ * details.
14011409 * @in_reset: is device in reset flow.
14021410 * @curr_pll_profile: current PLL profile.
14031411 * @cs_active_cnt: number of active command submissions on this device (active
@@ -1425,7 +1433,6 @@ struct hl_device_idle_busy_ts { · 21 unmodified lines
14251433 * @init_done: is the initialization of the device done.
14261434 * @mmu_enable: is MMU enabled.
14271435 * @mmu_huge_page_opt: is MMU huge pages optimization enabled.
1428− * @clock_gating: is clock gating enabled.
14291436 * @device_cpu_disabled: is the device CPU disabled (due to timeouts)
14301437 * @dma_mask: the dma mask that was set for this device
14311438 * @in_debug: is device under debug. This, together with fpriv_list, enforces
@@ -1493,6 +1500,7 @@ struct hl_device { · 61 unmodified lines
14931500 atomic64_t dram_used_mem;
14941501 u64 timeout_jiffies;
14951502 u64 max_power;
1503+ u64 clock_gating_mask;
14961504 atomic_t in_reset;
14971505 enum hl_pll_frequency curr_pll_profile;
14981506 int cs_active_cnt;
@@ -1514,7 +1522,6 @@ struct hl_device { · 15 unmodified lines
15141522 u8 dram_default_page_mapping;
15151523 u8 pmmu_huge_range;
15161524 u8 init_done;
1517− u8 clock_gating;
15181525 u8 device_cpu_disabled;
15191526 u8 dma_mask;
15201527 u8 in_debug;
drivers/misc/habanalabs/habanalabs_drv.c+1−1
@@ -232,7 +232,7 @@ static void set_driver_behavior_per_device(struct hl_device *hdev) · 231 unmodified lines
232232 hdev->fw_loading = 1;
233233 hdev->cpu_queues_enable = 1;
234234 hdev->heartbeat = 1;
235− hdev->clock_gating = 1;
235+ hdev->clock_gating_mask = ULONG_MAX;
236236
237237 hdev->reset_pcilink = 0;
238238 hdev->axi_drain = 0;
drivers/misc/habanalabs/hwmon.c+9−10
@@ -10,7 +10,6 @@ · 9 unmodified lines
1010 #include <linux/pci.h>
1111 #include <linux/hwmon.h>
1212
13−#define SENSORS_PKT_TIMEOUT 1000000 /* 1s */
1413 #define HWMON_NR_SENSOR_TYPES (hwmon_pwm + 1)
1514
1615 int hl_build_hwmon_channel_info(struct hl_device *hdev,
@@ -323,7 +322,7 @@ int hl_get_temperature(struct hl_device *hdev, · 306 unmodified lines
323322 pkt.type = __cpu_to_le16(attr);
324323
325324 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
326− SENSORS_PKT_TIMEOUT, value);
325+ 0, value);
327326
328327 if (rc) {
329328 dev_err(hdev->dev,
@@ -350,7 +349,7 @@ int hl_set_temperature(struct hl_device *hdev, · 20 unmodified lines
350349 pkt.value = __cpu_to_le64(value);
351350
352351 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
353− SENSORS_PKT_TIMEOUT, NULL);
352+ 0, NULL);
354353
355354 if (rc)
356355 dev_err(hdev->dev,
@@ -374,7 +373,7 @@ int hl_get_voltage(struct hl_device *hdev, · 17 unmodified lines
374373 pkt.type = __cpu_to_le16(attr);
375374
376375 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
377− SENSORS_PKT_TIMEOUT, value);
376+ 0, value);
378377
379378 if (rc) {
380379 dev_err(hdev->dev,
@@ -400,7 +399,7 @@ int hl_get_current(struct hl_device *hdev, · 19 unmodified lines
400399 pkt.type = __cpu_to_le16(attr);
401400
402401 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
403− SENSORS_PKT_TIMEOUT, value);
402+ 0, value);
404403
405404 if (rc) {
406405 dev_err(hdev->dev,
@@ -426,7 +425,7 @@ int hl_get_fan_speed(struct hl_device *hdev, · 19 unmodified lines
426425 pkt.type = __cpu_to_le16(attr);
427426
428427 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
429− SENSORS_PKT_TIMEOUT, value);
428+ 0, value);
430429
431430 if (rc) {
432431 dev_err(hdev->dev,
@@ -452,7 +451,7 @@ int hl_get_pwm_info(struct hl_device *hdev, · 19 unmodified lines
452451 pkt.type = __cpu_to_le16(attr);
453452
454453 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
455− SENSORS_PKT_TIMEOUT, value);
454+ 0, value);
456455
457456 if (rc) {
458457 dev_err(hdev->dev,
@@ -479,7 +478,7 @@ void hl_set_pwm_info(struct hl_device *hdev, int sensor_index, u32 attr, · 20 unmodified lines
479478 pkt.value = cpu_to_le64(value);
480479
481480 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
482− SENSORS_PKT_TIMEOUT, NULL);
481+ 0, NULL);
483482
484483 if (rc)
485484 dev_err(hdev->dev,
@@ -502,7 +501,7 @@ int hl_set_voltage(struct hl_device *hdev, · 16 unmodified lines
502501 pkt.value = __cpu_to_le64(value);
503502
504503 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
505− SENSORS_PKT_TIMEOUT, NULL);
504+ 0, NULL);
506505
507506 if (rc)
508507 dev_err(hdev->dev,
@@ -527,7 +526,7 @@ int hl_set_current(struct hl_device *hdev, · 18 unmodified lines
527526 pkt.value = __cpu_to_le64(value);
528527
529528 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
530− SENSORS_PKT_TIMEOUT, NULL);
529+ 0, NULL);
531530
532531 if (rc)
533532 dev_err(hdev->dev,
drivers/misc/habanalabs/sysfs.c+4−7
@@ -9,9 +9,6 @@ · 8 unmodified lines
99
1010 #include <linux/pci.h>
1111
12−#define SET_CLK_PKT_TIMEOUT 1000000 /* 1s */
13−#define SET_PWR_PKT_TIMEOUT 1000000 /* 1s */
14−
1512 long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr)
1613 {
1714 struct armcp_packet pkt;
@@ -29,7 +26,7 @@ long hl_get_frequency(struct hl_device *hdev, u32 pll_index, bool curr) · 11 unmodified lines
2926 pkt.pll_index = cpu_to_le32(pll_index);
3027
3128 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
32− SET_CLK_PKT_TIMEOUT, &result);
29+ 0, &result);
3330
3431 if (rc) {
3532 dev_err(hdev->dev,
@@ -54,7 +51,7 @@ void hl_set_frequency(struct hl_device *hdev, u32 pll_index, u64 freq) · 18 unmodified lines
5451 pkt.value = cpu_to_le64(freq);
5552
5653 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
57− SET_CLK_PKT_TIMEOUT, NULL);
54+ 0, NULL);
5855
5956 if (rc)
6057 dev_err(hdev->dev,
@@ -74,7 +71,7 @@ u64 hl_get_max_power(struct hl_device *hdev) · 13 unmodified lines
7471 ARMCP_PKT_CTL_OPCODE_SHIFT);
7572
7673 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
77− SET_PWR_PKT_TIMEOUT, &result);
74+ 0, &result);
7875
7976 if (rc) {
8077 dev_err(hdev->dev, "Failed to get max power, error %d\n", rc);
@@ -96,7 +93,7 @@ void hl_set_max_power(struct hl_device *hdev, u64 value) · 15 unmodified lines
9693 pkt.value = cpu_to_le64(value);
9794
9895 rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
99− SET_PWR_PKT_TIMEOUT, NULL);
96+ 0, NULL);
10097
10198 if (rc)
10299 dev_err(hdev->dev, "Failed to set max power, error %d\n", rc);
drivers/mmc/host/sdhci-of-aspeed.c+1−1
@@ -68,7 +68,7 @@ static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) · 67 unmodified lines
6868 if (WARN_ON(clock > host->max_clk))
6969 clock = host->max_clk;
7070
71− for (div = 1; div < 256; div *= 2) {
71+ for (div = 2; div < 256; div *= 2) {
7272 if ((parent / div) <= clock)
7373 break;
7474 }
drivers/net/bonding/bond_main.c+7−3
@@ -5053,15 +5053,19 @@ int bond_create(struct net *net, const char *name) · 5052 unmodified lines
50535053 bond_dev->rtnl_link_ops = &bond_link_ops;
50545054
50555055 res = register_netdevice(bond_dev);
5056+ if (res < 0) {
5057+ free_netdev(bond_dev);
5058+ rtnl_unlock();
5059+
5060+ return res;
5061+ }
50565062
50575063 netif_carrier_off(bond_dev);
50585064
50595065 bond_work_init_all(bond);
50605066
50615067 rtnl_unlock();
5062− if (res < 0)
5063− free_netdev(bond_dev);
5064− return res;
5068+ return 0;
50655069 }
50665070
50675071 static int __net_init bond_net_init(struct net *net)
drivers/net/bonding/bond_netlink.c+1−2
@@ -456,11 +456,10 @@ static int bond_newlink(struct net *src_net, struct net_device *bond_dev, · 455 unmodified lines
456456 return err;
457457
458458 err = register_netdevice(bond_dev);
459−
460− netif_carrier_off(bond_dev);
461459 if (!err) {
462460 struct bonding *bond = netdev_priv(bond_dev);
463461
462+ netif_carrier_off(bond_dev);
464463 bond_work_init_all(bond);
465464 }
466465
drivers/net/dsa/microchip/ksz9477.c+23−19
@@ -974,23 +974,6 @@ static void ksz9477_port_mirror_del(struct dsa_switch *ds, int port, · 973 unmodified lines
974974 PORT_MIRROR_SNIFFER, false);
975975 }
976976
977−static void ksz9477_phy_setup(struct ksz_device *dev, int port,
978− struct phy_device *phy)
979−{
980− /* Only apply to port with PHY. */
981− if (port >= dev->phy_port_cnt)
982− return;
983−
984− /* The MAC actually cannot run in 1000 half-duplex mode. */
985− phy_remove_link_mode(phy,
986− ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
987−
988− /* PHY does not support gigabit. */
989− if (!(dev->features & GBIT_SUPPORT))
990− phy_remove_link_mode(phy,
991− ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
992−}
993−
994977 static bool ksz9477_get_gbit(struct ksz_device *dev, u8 data)
995978 {
996979 bool gbit;
@@ -1603,7 +1586,6 @@ static const struct ksz_dev_ops ksz9477_dev_ops = { · 606 unmodified lines
16031586 .get_port_addr = ksz9477_get_port_addr,
16041587 .cfg_port_member = ksz9477_cfg_port_member,
16051588 .flush_dyn_mac_table = ksz9477_flush_dyn_mac_table,
1606− .phy_setup = ksz9477_phy_setup,
16071589 .port_setup = ksz9477_port_setup,
16081590 .r_mib_cnt = ksz9477_r_mib_cnt,
16091591 .r_mib_pkt = ksz9477_r_mib_pkt,
@@ -1617,7 +1599,29 @@ static const struct ksz_dev_ops ksz9477_dev_ops = { · 7 unmodified lines
16171599
16181600 int ksz9477_switch_register(struct ksz_device *dev)
16191601 {
1620− return ksz_switch_register(dev, &ksz9477_dev_ops);
1602+ int ret, i;
1603+ struct phy_device *phydev;
1604+
1605+ ret = ksz_switch_register(dev, &ksz9477_dev_ops);
1606+ if (ret)
1607+ return ret;
1608+
1609+ for (i = 0; i < dev->phy_port_cnt; ++i) {
1610+ if (!dsa_is_user_port(dev->ds, i))
1611+ continue;
1612+
1613+ phydev = dsa_to_port(dev->ds, i)->slave->phydev;
1614+
1615+ /* The MAC actually cannot run in 1000 half-duplex mode. */
1616+ phy_remove_link_mode(phydev,
1617+ ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
1618+
1619+ /* PHY does not support gigabit. */
1620+ if (!(dev->features & GBIT_SUPPORT))
1621+ phy_remove_link_mode(phydev,
1622+ ETHTOOL_LINK_MODE_1000baseT_Full_BIT);
1623+ }
1624+ return ret;
16211625 }
16221626 EXPORT_SYMBOL(ksz9477_switch_register);
16231627
drivers/net/dsa/microchip/ksz_common.c+0−2
@@ -358,8 +358,6 @@ int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy) · 357 unmodified lines
358358
359359 /* setup slave port */
360360 dev->dev_ops->port_setup(dev, port, false);
361− if (dev->dev_ops->phy_setup)
362− dev->dev_ops->phy_setup(dev, port, phy);
363361
364362 /* port_stp_state_set() will be called after to enable the port so
365363 * there is no need to do anything.
drivers/net/dsa/microchip/ksz_common.h+0−2
@@ -119,8 +119,6 @@ struct ksz_dev_ops { · 118 unmodified lines
119119 u32 (*get_port_addr)(int port, int offset);
120120 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
121121 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
122− void (*phy_setup)(struct ksz_device *dev, int port,
123− struct phy_device *phy);
124122 void (*port_cleanup)(struct ksz_device *dev, int port);
125123 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
126124 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
drivers/net/dsa/mv88e6xxx/chip.c+19−3
@@ -664,8 +664,11 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 663 unmodified lines
664664 const struct phylink_link_state *state)
665665 {
666666 struct mv88e6xxx_chip *chip = ds->priv;
667+ struct mv88e6xxx_port *p;
667668 int err;
668669
670+ p = &chip->ports[port];
671+
669672 /* FIXME: is this the correct test? If we're in fixed mode on an
670673 * internal port, why should we process this any different from
671674 * PHY mode? On the other hand, the port may be automedia between
@@ -675,10 +678,14 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 3 unmodified lines
675678 return;
676679
677680 mv88e6xxx_reg_lock(chip);
678− /* FIXME: should we force the link down here - but if we do, how
679− * do we restore the link force/unforce state? The driver layering
680− * gets in the way.
681+ /* In inband mode, the link may come up at any time while the link
682+ * is not forced down. Force the link down while we reconfigure the
683+ * interface mode.
681684 */
685+ if (mode == MLO_AN_INBAND && p->interface != state->interface &&
686+ chip->info->ops->port_set_link)
687+ chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN);
688+
682689 err = mv88e6xxx_port_config_interface(chip, port, state->interface);
683690 if (err && err != -EOPNOTSUPP)
684691 goto err_unlock;
@@ -691,6 +698,15 @@ static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port, · 6 unmodified lines
691698 if (err > 0)
692699 err = 0;
693700
701+ /* Undo the forced down state above after completing configuration
702+ * irrespective of its state on entry, which allows the link to come up.
703+ */
704+ if (mode == MLO_AN_INBAND && p->interface != state->interface &&
705+ chip->info->ops->port_set_link)
706+ chip->info->ops->port_set_link(chip, port, LINK_UNFORCED);
707+
708+ p->interface = state->interface;
709+
694710 err_unlock:
695711 mv88e6xxx_reg_unlock(chip);
696712
drivers/net/dsa/mv88e6xxx/chip.h+1−0
@@ -232,6 +232,7 @@ struct mv88e6xxx_port { · 231 unmodified lines
232232 u64 atu_full_violation;
233233 u64 vtu_member_violation;
234234 u64 vtu_miss_violation;
235+ phy_interface_t interface;
235236 u8 cmode;
236237 bool mirror_ingress;
237238 bool mirror_egress;
drivers/net/ethernet/aquantia/atlantic/aq_hw.h+1−0
@@ -64,6 +64,7 @@ struct aq_hw_caps_s { · 63 unmodified lines
6464 u8 rx_rings;
6565 bool flow_control;
6666 bool is_64_dma;
67+ u32 quirks;
6768 u32 priv_data_len;
6869 };
6970
drivers/net/ethernet/aquantia/atlantic/aq_nic.c+9−0
@@ -415,6 +415,15 @@ int aq_nic_init(struct aq_nic_s *self) · 414 unmodified lines
415415 self->aq_nic_cfg.aq_hw_caps->media_type == AQ_HW_MEDIA_TYPE_TP) {
416416 self->aq_hw->phy_id = HW_ATL_PHY_ID_MAX;
417417 err = aq_phy_init(self->aq_hw);
418+
419+ /* Disable the PTP on NICs where it's known to cause datapath
420+ * problems.
421+ * Ideally this should have been done by PHY provisioning, but
422+ * many units have been shipped with enabled PTP block already.
423+ */
424+ if (self->aq_nic_cfg.aq_hw_caps->quirks & AQ_NIC_QUIRK_BAD_PTP)
425+ if (self->aq_hw->phy_id != HW_ATL_PHY_ID_MAX)
426+ aq_phy_disable_ptp(self->aq_hw);
418427 }
419428
420429 for (i = 0U; i < self->aq_vecs; i++) {
drivers/net/ethernet/aquantia/atlantic/aq_nic.h+2−0
@@ -81,6 +81,8 @@ struct aq_nic_cfg_s { · 80 unmodified lines
8181 #define AQ_NIC_FLAG_ERR_UNPLUG 0x40000000U
8282 #define AQ_NIC_FLAG_ERR_HW 0x80000000U
8383
84+#define AQ_NIC_QUIRK_BAD_PTP BIT(0)
85+
8486 #define AQ_NIC_WOL_MODES (WAKE_MAGIC |\
8587 WAKE_PHY)
8688
drivers/net/ethernet/aquantia/atlantic/aq_phy.c+27−2
@@ -1,10 +1,14 @@
11 // SPDX-License-Identifier: GPL-2.0-only
2−/* aQuantia Corporation Network Driver
3− * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved
2+/* Atlantic Network Driver
3+ *
4+ * Copyright (C) 2018-2019 aQuantia Corporation
5+ * Copyright (C) 2019-2020 Marvell International Ltd.
46 */
57
68 #include "aq_phy.h"
79
10+#define HW_ATL_PTP_DISABLE_MSK BIT(10)
11+
812 bool aq_mdio_busy_wait(struct aq_hw_s *aq_hw)
913 {
1014 int err = 0;
@@ -145,3 +149,24 @@ bool aq_phy_init(struct aq_hw_s *aq_hw) · 134 unmodified lines
145149
146150 return true;
147151 }
152+
153+void aq_phy_disable_ptp(struct aq_hw_s *aq_hw)
154+{
155+ static const u16 ptp_registers[] = {
156+ 0x031e,
157+ 0x031d,
158+ 0x031c,
159+ 0x031b,
160+ };
161+ u16 val;
162+ int i;
163+
164+ for (i = 0; i < ARRAY_SIZE(ptp_registers); i++) {
165+ val = aq_phy_read_reg(aq_hw, MDIO_MMD_VEND1,
166+ ptp_registers[i]);
167+
168+ aq_phy_write_reg(aq_hw, MDIO_MMD_VEND1,
169+ ptp_registers[i],
170+ val & ~HW_ATL_PTP_DISABLE_MSK);
171+ }
172+}
drivers/net/ethernet/aquantia/atlantic/aq_phy.h+6−2
@@ -1,6 +1,8 @@
11 /* SPDX-License-Identifier: GPL-2.0-only */
2−/* aQuantia Corporation Network Driver
3− * Copyright (C) 2018-2019 aQuantia Corporation. All rights reserved
2+/* Atlantic Network Driver
3+ *
4+ * Copyright (C) 2018-2019 aQuantia Corporation
5+ * Copyright (C) 2019-2020 Marvell International Ltd.
46 */
57
68 #ifndef AQ_PHY_H
@@ -29,4 +31,6 @@ bool aq_phy_init_phy_id(struct aq_hw_s *aq_hw); · 22 unmodified lines
2931
3032 bool aq_phy_init(struct aq_hw_s *aq_hw);
3133
34+void aq_phy_disable_ptp(struct aq_hw_s *aq_hw);
35+
3236 #endif /* AQ_PHY_H */
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c+25−1
@@ -93,6 +93,25 @@ const struct aq_hw_caps_s hw_atl_b0_caps_aqc109 = { · 92 unmodified lines
9393 AQ_NIC_RATE_100M,
9494 };
9595
96+const struct aq_hw_caps_s hw_atl_b0_caps_aqc111 = {
97+ DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
98+ .media_type = AQ_HW_MEDIA_TYPE_TP,
99+ .link_speed_msk = AQ_NIC_RATE_5G |
100+ AQ_NIC_RATE_2G5 |
101+ AQ_NIC_RATE_1G |
102+ AQ_NIC_RATE_100M,
103+ .quirks = AQ_NIC_QUIRK_BAD_PTP,
104+};
105+
106+const struct aq_hw_caps_s hw_atl_b0_caps_aqc112 = {
107+ DEFAULT_B0_BOARD_BASIC_CAPABILITIES,
108+ .media_type = AQ_HW_MEDIA_TYPE_TP,
109+ .link_speed_msk = AQ_NIC_RATE_2G5 |
110+ AQ_NIC_RATE_1G |
111+ AQ_NIC_RATE_100M,
112+ .quirks = AQ_NIC_QUIRK_BAD_PTP,
113+};
114+
96115 static int hw_atl_b0_hw_reset(struct aq_hw_s *self)
97116 {
98117 int err = 0;
@@ -354,8 +373,13 @@ static int hw_atl_b0_hw_init_tx_tc_rate_limit(struct aq_hw_s *self) · 255 unmodified lines
354373
355374 /* WSP, if min_rate is set for at least one TC.
356375 * RR otherwise.
376+ *
377+ * NB! MAC FW sets arb mode itself if PTP is enabled. We shouldn't
378+ * overwrite it here in that case.
357379 */
358− hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);
380+ if (!nic_cfg->is_ptp)
381+ hw_atl_tps_tx_pkt_shed_data_arb_mode_set(self, min_rate_msk ? 1U : 0U);
382+
359383 /* Data TC Arbiter takes precedence over Descriptor TC Arbiter,
360384 * leave Descriptor TC Arbiter as RR.
361385 */
drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.h+4−6
@@ -18,17 +18,15 @@ extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc100; · 17 unmodified lines
1818 extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc107;
1919 extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc108;
2020 extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc109;
21−
22−#define hw_atl_b0_caps_aqc111 hw_atl_b0_caps_aqc108
23−#define hw_atl_b0_caps_aqc112 hw_atl_b0_caps_aqc109
21+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc111;
22+extern const struct aq_hw_caps_s hw_atl_b0_caps_aqc112;
2423
2524 #define hw_atl_b0_caps_aqc100s hw_atl_b0_caps_aqc100
2625 #define hw_atl_b0_caps_aqc107s hw_atl_b0_caps_aqc107
2726 #define hw_atl_b0_caps_aqc108s hw_atl_b0_caps_aqc108
2827 #define hw_atl_b0_caps_aqc109s hw_atl_b0_caps_aqc109
29−
30−#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc108
31−#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc109
28+#define hw_atl_b0_caps_aqc111s hw_atl_b0_caps_aqc111
29+#define hw_atl_b0_caps_aqc112s hw_atl_b0_caps_aqc112
3230
3331 extern const struct aq_hw_ops hw_atl_ops_b0;
3432
drivers/net/ethernet/atheros/ag71xx.c+2−1
@@ -556,7 +556,8 @@ static int ag71xx_mdio_probe(struct ag71xx *ag) · 555 unmodified lines
556556 ag->mdio_reset = of_reset_control_get_exclusive(np, "mdio");
557557 if (IS_ERR(ag->mdio_reset)) {
558558 netif_err(ag, probe, ndev, "Failed to get reset mdio.\n");
559− return PTR_ERR(ag->mdio_reset);
559+ err = PTR_ERR(ag->mdio_reset);
560+ goto mdio_err_put_clk;
560561 }
561562
562563 mii_bus->name = "ag71xx_mdio";
drivers/net/ethernet/broadcom/bnxt/bnxt.c+15−7
@@ -3418,7 +3418,7 @@ void bnxt_set_tpa_flags(struct bnxt *bp) · 3417 unmodified lines
34183418 */
34193419 void bnxt_set_ring_params(struct bnxt *bp)
34203420 {
3421− u32 ring_size, rx_size, rx_space;
3421+ u32 ring_size, rx_size, rx_space, max_rx_cmpl;
34223422 u32 agg_factor = 0, agg_ring_size = 0;
34233423
34243424 /* 8 for CRC and VLAN */
@@ -3474,7 +3474,15 @@ void bnxt_set_ring_params(struct bnxt *bp) · 49 unmodified lines
34743474 bp->tx_nr_pages = bnxt_calc_nr_ring_pages(ring_size, TX_DESC_CNT);
34753475 bp->tx_ring_mask = (bp->tx_nr_pages * TX_DESC_CNT) - 1;
34763476
3477− ring_size = bp->rx_ring_size * (2 + agg_factor) + bp->tx_ring_size;
3477+ max_rx_cmpl = bp->rx_ring_size;
3478+ /* MAX TPA needs to be added because TPA_START completions are
3479+ * immediately recycled, so the TPA completions are not bound by
3480+ * the RX ring size.
3481+ */
3482+ if (bp->flags & BNXT_FLAG_TPA)
3483+ max_rx_cmpl += bp->max_tpa;
3484+ /* RX and TPA completions are 32-byte, all others are 16-byte */
3485+ ring_size = max_rx_cmpl * 2 + agg_ring_size + bp->tx_ring_size;
34783486 bp->cp_ring_size = ring_size;
34793487
34803488 bp->cp_nr_pages = bnxt_calc_nr_ring_pages(ring_size, CP_DESC_CNT);
@@ -10385,15 +10393,15 @@ static void bnxt_sp_task(struct work_struct *work) · 6904 unmodified lines
1038510393 &bp->sp_event))
1038610394 bnxt_hwrm_phy_qcaps(bp);
1038710395
10388− if (test_and_clear_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT,
10389− &bp->sp_event))
10390− bnxt_init_ethtool_link_settings(bp);
10391−
1039210396 rc = bnxt_update_link(bp, true);
10393− mutex_unlock(&bp->link_lock);
1039410397 if (rc)
1039510398 netdev_err(bp->dev, "SP task can't update link (rc: %x)\n",
1039610399 rc);
10400+
10401+ if (test_and_clear_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT,
10402+ &bp->sp_event))
10403+ bnxt_init_ethtool_link_settings(bp);
10404+ mutex_unlock(&bp->link_lock);
1039710405 }
1039810406 if (test_and_clear_bit(BNXT_UPDATE_PHY_SP_EVENT, &bp->sp_event)) {
1039910407 int rc;
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+4−1
@@ -1765,8 +1765,11 @@ static int bnxt_set_pauseparam(struct net_device *dev, · 1764 unmodified lines
17651765 if (epause->tx_pause)
17661766 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
17671767
1768− if (netif_running(dev))
1768+ if (netif_running(dev)) {
1769+ mutex_lock(&bp->link_lock);
17691770 rc = bnxt_hwrm_set_pause(bp);
1771+ mutex_unlock(&bp->link_lock);
1772+ }
17701773 return rc;
17711774 }
17721775
drivers/net/ethernet/broadcom/genet/bcmgenet.c+65−79
@@ -543,14 +543,14 @@ static int bcmgenet_hfb_validate_mask(void *mask, size_t size) · 542 unmodified lines
543543 #define VALIDATE_MASK(x) \
544544 bcmgenet_hfb_validate_mask(&(x), sizeof(x))
545545
546−static int bcmgenet_hfb_insert_data(u32 *f, int offset,
547− void *val, void *mask, size_t size)
546+static int bcmgenet_hfb_insert_data(struct bcmgenet_priv *priv, u32 f_index,
547+ u32 offset, void *val, void *mask,
548+ size_t size)
548549 {
549− int index;
550− u32 tmp;
550+ u32 index, tmp;
551551
552− index = offset / 2;
553− tmp = f[index];
552+ index = f_index * priv->hw_params->hfb_filter_size + offset / 2;
553+ tmp = bcmgenet_hfb_readl(priv, index * sizeof(u32));
554554
555555 while (size--) {
556556 if (offset++ & 1) {
@@ -567,9 +567,10 @@ static int bcmgenet_hfb_insert_data(u32 *f, int offset, · 10 unmodified lines
567567 tmp |= 0x10000;
568568 break;
569569 }
570− f[index++] = tmp;
570+ bcmgenet_hfb_writel(priv, tmp, index++ * sizeof(u32));
571571 if (size)
572− tmp = f[index];
572+ tmp = bcmgenet_hfb_readl(priv,
573+ index * sizeof(u32));
573574 } else {
574575 tmp &= ~0xCFF00;
575576 tmp |= (*(unsigned char *)val++) << 8;
@@ -585,44 +586,26 @@ static int bcmgenet_hfb_insert_data(u32 *f, int offset, · 9 unmodified lines
585586 break;
586587 }
587588 if (!size)
588− f[index] = tmp;
589+ bcmgenet_hfb_writel(priv, tmp, index * sizeof(u32));
589590 }
590591 }
591592
592593 return 0;
593594 }
594595
595−static void bcmgenet_hfb_set_filter(struct bcmgenet_priv *priv, u32 *f_data,
596− u32 f_length, u32 rx_queue, int f_index)
597−{
598− u32 base = f_index * priv->hw_params->hfb_filter_size;
599− int i;
600−
601− for (i = 0; i < f_length; i++)
602− bcmgenet_hfb_writel(priv, f_data[i], (base + i) * sizeof(u32));
603−
604− bcmgenet_hfb_set_filter_length(priv, f_index, 2 * f_length);
605− bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f_index, rx_queue);
606−}
607−
608−static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
609− struct bcmgenet_rxnfc_rule *rule)
596+static void bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv,
597+ struct bcmgenet_rxnfc_rule *rule)
610598 {
611599 struct ethtool_rx_flow_spec *fs = &rule->fs;
612− int err = 0, offset = 0, f_length = 0;
600+ u32 offset = 0, f_length = 0, f;
613601 u8 val_8, mask_8;
614602 __be16 val_16;
615603 u16 mask_16;
616604 size_t size;
617− u32 *f_data;
618−
619− f_data = kcalloc(priv->hw_params->hfb_filter_size, sizeof(u32),
620− GFP_KERNEL);
621− if (!f_data)
622− return -ENOMEM;
623605
606+ f = fs->location;
624607 if (fs->flow_type & FLOW_MAC_EXT) {
625− bcmgenet_hfb_insert_data(f_data, 0,
608+ bcmgenet_hfb_insert_data(priv, f, 0,
626609 &fs->h_ext.h_dest, &fs->m_ext.h_dest,
627610 sizeof(fs->h_ext.h_dest));
628611 }
@@ -630,11 +613,11 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 1 unmodified line
630613 if (fs->flow_type & FLOW_EXT) {
631614 if (fs->m_ext.vlan_etype ||
632615 fs->m_ext.vlan_tci) {
633− bcmgenet_hfb_insert_data(f_data, 12,
616+ bcmgenet_hfb_insert_data(priv, f, 12,
634617 &fs->h_ext.vlan_etype,
635618 &fs->m_ext.vlan_etype,
636619 sizeof(fs->h_ext.vlan_etype));
637− bcmgenet_hfb_insert_data(f_data, 14,
620+ bcmgenet_hfb_insert_data(priv, f, 14,
638621 &fs->h_ext.vlan_tci,
639622 &fs->m_ext.vlan_tci,
640623 sizeof(fs->h_ext.vlan_tci));
@@ -646,15 +629,15 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 5 unmodified lines
646629 switch (fs->flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
647630 case ETHER_FLOW:
648631 f_length += DIV_ROUND_UP(ETH_HLEN, 2);
649− bcmgenet_hfb_insert_data(f_data, 0,
632+ bcmgenet_hfb_insert_data(priv, f, 0,
650633 &fs->h_u.ether_spec.h_dest,
651634 &fs->m_u.ether_spec.h_dest,
652635 sizeof(fs->h_u.ether_spec.h_dest));
653− bcmgenet_hfb_insert_data(f_data, ETH_ALEN,
636+ bcmgenet_hfb_insert_data(priv, f, ETH_ALEN,
654637 &fs->h_u.ether_spec.h_source,
655638 &fs->m_u.ether_spec.h_source,
656639 sizeof(fs->h_u.ether_spec.h_source));
657− bcmgenet_hfb_insert_data(f_data, (2 * ETH_ALEN) + offset,
640+ bcmgenet_hfb_insert_data(priv, f, (2 * ETH_ALEN) + offset,
658641 &fs->h_u.ether_spec.h_proto,
659642 &fs->m_u.ether_spec.h_proto,
660643 sizeof(fs->h_u.ether_spec.h_proto));
@@ -664,21 +647,21 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 3 unmodified lines
664647 /* Specify IP Ether Type */
665648 val_16 = htons(ETH_P_IP);
666649 mask_16 = 0xFFFF;
667− bcmgenet_hfb_insert_data(f_data, (2 * ETH_ALEN) + offset,
650+ bcmgenet_hfb_insert_data(priv, f, (2 * ETH_ALEN) + offset,
668651 &val_16, &mask_16, sizeof(val_16));
669− bcmgenet_hfb_insert_data(f_data, 15 + offset,
652+ bcmgenet_hfb_insert_data(priv, f, 15 + offset,
670653 &fs->h_u.usr_ip4_spec.tos,
671654 &fs->m_u.usr_ip4_spec.tos,
672655 sizeof(fs->h_u.usr_ip4_spec.tos));
673− bcmgenet_hfb_insert_data(f_data, 23 + offset,
656+ bcmgenet_hfb_insert_data(priv, f, 23 + offset,
674657 &fs->h_u.usr_ip4_spec.proto,
675658 &fs->m_u.usr_ip4_spec.proto,
676659 sizeof(fs->h_u.usr_ip4_spec.proto));
677− bcmgenet_hfb_insert_data(f_data, 26 + offset,
660+ bcmgenet_hfb_insert_data(priv, f, 26 + offset,
678661 &fs->h_u.usr_ip4_spec.ip4src,
679662 &fs->m_u.usr_ip4_spec.ip4src,
680663 sizeof(fs->h_u.usr_ip4_spec.ip4src));
681− bcmgenet_hfb_insert_data(f_data, 30 + offset,
664+ bcmgenet_hfb_insert_data(priv, f, 30 + offset,
682665 &fs->h_u.usr_ip4_spec.ip4dst,
683666 &fs->m_u.usr_ip4_spec.ip4dst,
684667 sizeof(fs->h_u.usr_ip4_spec.ip4dst));
@@ -688,11 +671,11 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 3 unmodified lines
688671 /* Only supports 20 byte IPv4 header */
689672 val_8 = 0x45;
690673 mask_8 = 0xFF;
691− bcmgenet_hfb_insert_data(f_data, ETH_HLEN + offset,
674+ bcmgenet_hfb_insert_data(priv, f, ETH_HLEN + offset,
692675 &val_8, &mask_8,
693676 sizeof(val_8));
694677 size = sizeof(fs->h_u.usr_ip4_spec.l4_4_bytes);
695− bcmgenet_hfb_insert_data(f_data,
678+ bcmgenet_hfb_insert_data(priv, f,
696679 ETH_HLEN + 20 + offset,
697680 &fs->h_u.usr_ip4_spec.l4_4_bytes,
698681 &fs->m_u.usr_ip4_spec.l4_4_bytes,
@@ -701,34 +684,42 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 2 unmodified lines
701684 break;
702685 }
703686
687+ bcmgenet_hfb_set_filter_length(priv, f, 2 * f_length);
704688 if (!fs->ring_cookie || fs->ring_cookie == RX_CLS_FLOW_WAKE) {
705689 /* Ring 0 flows can be handled by the default Descriptor Ring
706690 * We'll map them to ring 0, but don't enable the filter
707691 */
708− bcmgenet_hfb_set_filter(priv, f_data, f_length, 0,
709− fs->location);
692+ bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f, 0);
710693 rule->state = BCMGENET_RXNFC_STATE_DISABLED;
711694 } else {
712695 /* Other Rx rings are direct mapped here */
713− bcmgenet_hfb_set_filter(priv, f_data, f_length,
714− fs->ring_cookie, fs->location);
715− bcmgenet_hfb_enable_filter(priv, fs->location);
696+ bcmgenet_hfb_set_filter_rx_queue_mapping(priv, f,
697+ fs->ring_cookie);
698+ bcmgenet_hfb_enable_filter(priv, f);
716699 rule->state = BCMGENET_RXNFC_STATE_ENABLED;
717700 }
718−
719− kfree(f_data);
720−
721− return err;
722701 }
723702
724703 /* bcmgenet_hfb_clear
725704 *
726705 * Clear Hardware Filter Block and disable all filtering.
727706 */
707+static void bcmgenet_hfb_clear_filter(struct bcmgenet_priv *priv, u32 f_index)
708+{
709+ u32 base, i;
710+
711+ base = f_index * priv->hw_params->hfb_filter_size;
712+ for (i = 0; i < priv->hw_params->hfb_filter_size; i++)
713+ bcmgenet_hfb_writel(priv, 0x0, (base + i) * sizeof(u32));
714+}
715+
728716 static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv)
729717 {
730718 u32 i;
731719
720+ if (GENET_IS_V1(priv) || GENET_IS_V2(priv))
721+ return;
722+
732723 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_CTRL);
733724 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS);
734725 bcmgenet_hfb_reg_writel(priv, 0x0, HFB_FLT_ENABLE_V3PLUS + 4);
@@ -740,19 +731,18 @@ static void bcmgenet_hfb_clear(struct bcmgenet_priv *priv) · 5 unmodified lines
740731 bcmgenet_hfb_reg_writel(priv, 0x0,
741732 HFB_FLT_LEN_V3PLUS + i * sizeof(u32));
742733
743− for (i = 0; i < priv->hw_params->hfb_filter_cnt *
744− priv->hw_params->hfb_filter_size; i++)
745− bcmgenet_hfb_writel(priv, 0x0, i * sizeof(u32));
734+ for (i = 0; i < priv->hw_params->hfb_filter_cnt; i++)
735+ bcmgenet_hfb_clear_filter(priv, i);
746736 }
747737
748738 static void bcmgenet_hfb_init(struct bcmgenet_priv *priv)
749739 {
750740 int i;
751741
742+ INIT_LIST_HEAD(&priv->rxnfc_list);
752743 if (GENET_IS_V1(priv) || GENET_IS_V2(priv))
753744 return;
754745
755− INIT_LIST_HEAD(&priv->rxnfc_list);
756746 for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
757747 INIT_LIST_HEAD(&priv->rxnfc_rules[i].list);
758748 priv->rxnfc_rules[i].state = BCMGENET_RXNFC_STATE_UNUSED;
@@ -1437,18 +1427,15 @@ static int bcmgenet_insert_flow(struct net_device *dev, · 678 unmodified lines
14371427 loc_rule = &priv->rxnfc_rules[cmd->fs.location];
14381428 if (loc_rule->state == BCMGENET_RXNFC_STATE_ENABLED)
14391429 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);
1440− if (loc_rule->state != BCMGENET_RXNFC_STATE_UNUSED)
1430+ if (loc_rule->state != BCMGENET_RXNFC_STATE_UNUSED) {
14411431 list_del(&loc_rule->list);
1432+ bcmgenet_hfb_clear_filter(priv, cmd->fs.location);
1433+ }
14421434 loc_rule->state = BCMGENET_RXNFC_STATE_UNUSED;
14431435 memcpy(&loc_rule->fs, &cmd->fs,
14441436 sizeof(struct ethtool_rx_flow_spec));
14451437
1446− err = bcmgenet_hfb_create_rxnfc_filter(priv, loc_rule);
1447− if (err) {
1448− netdev_err(dev, "rxnfc: Could not install rule (%d)\n",
1449− err);
1450− return err;
1451− }
1438+ bcmgenet_hfb_create_rxnfc_filter(priv, loc_rule);
14521439
14531440 list_add_tail(&loc_rule->list, &priv->rxnfc_list);
14541441
@@ -1473,8 +1460,10 @@ static int bcmgenet_delete_flow(struct net_device *dev, · 18 unmodified lines
14731460
14741461 if (rule->state == BCMGENET_RXNFC_STATE_ENABLED)
14751462 bcmgenet_hfb_disable_filter(priv, cmd->fs.location);
1476− if (rule->state != BCMGENET_RXNFC_STATE_UNUSED)
1463+ if (rule->state != BCMGENET_RXNFC_STATE_UNUSED) {
14771464 list_del(&rule->list);
1465+ bcmgenet_hfb_clear_filter(priv, cmd->fs.location);
1466+ }
14781467 rule->state = BCMGENET_RXNFC_STATE_UNUSED;
14791468 memset(&rule->fs, 0, sizeof(struct ethtool_rx_flow_spec));
14801469
@@ -3999,7 +3988,7 @@ static int bcmgenet_probe(struct platform_device *pdev) · 2518 unmodified lines
39993988 if (err)
40003989 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
40013990 if (err)
4002− goto err;
3991+ goto err_clk_disable;
40033992
40043993 /* Mii wait queue */
40053994 init_waitqueue_head(&priv->wq);
@@ -4011,14 +4000,14 @@ static int bcmgenet_probe(struct platform_device *pdev) · 5 unmodified lines
40114000 if (IS_ERR(priv->clk_wol)) {
40124001 dev_dbg(&priv->pdev->dev, "failed to get enet-wol clock\n");
40134002 err = PTR_ERR(priv->clk_wol);
4014− goto err;
4003+ goto err_clk_disable;
40154004 }
40164005
40174006 priv->clk_eee = devm_clk_get_optional(&priv->pdev->dev, "enet-eee");
40184007 if (IS_ERR(priv->clk_eee)) {
40194008 dev_dbg(&priv->pdev->dev, "failed to get enet-eee clock\n");
40204009 err = PTR_ERR(priv->clk_eee);
4021− goto err;
4010+ goto err_clk_disable;
40224011 }
40234012
40244013 /* If this is an internal GPHY, power it on now, before UniMAC is
@@ -4129,8 +4118,9 @@ static int bcmgenet_resume(struct device *d) · 104 unmodified lines
41294118 {
41304119 struct net_device *dev = dev_get_drvdata(d);
41314120 struct bcmgenet_priv *priv = netdev_priv(dev);
4121+ struct bcmgenet_rxnfc_rule *rule;
41324122 unsigned long dma_ctrl;
4133− u32 offset, reg;
4123+ u32 reg;
41344124 int ret;
41354125
41364126 if (!netif_running(dev))
@@ -4161,10 +4151,11 @@ static int bcmgenet_resume(struct device *d) · 24 unmodified lines
41614151
41624152 bcmgenet_set_hw_addr(priv, dev->dev_addr);
41634153
4164− offset = HFB_FLT_ENABLE_V3PLUS;
4165− bcmgenet_hfb_reg_writel(priv, priv->hfb_en[1], offset);
4166− bcmgenet_hfb_reg_writel(priv, priv->hfb_en[2], offset + sizeof(u32));
4167− bcmgenet_hfb_reg_writel(priv, priv->hfb_en[0], HFB_CTRL);
4154+ /* Restore hardware filters */
4155+ bcmgenet_hfb_clear(priv);
4156+ list_for_each_entry(rule, &priv->rxnfc_list, list)
4157+ if (rule->state != BCMGENET_RXNFC_STATE_UNUSED)
4158+ bcmgenet_hfb_create_rxnfc_filter(priv, rule);
41684159
41694160 if (priv->internal_phy) {
41704161 reg = bcmgenet_ext_readl(priv, EXT_EXT_PWR_MGMT);
@@ -4208,7 +4199,6 @@ static int bcmgenet_suspend(struct device *d) · 37 unmodified lines
42084199 {
42094200 struct net_device *dev = dev_get_drvdata(d);
42104201 struct bcmgenet_priv *priv = netdev_priv(dev);
4211− u32 offset;
42124202
42134203 if (!netif_running(dev))
42144204 return 0;
@@ -4220,11 +4210,7 @@ static int bcmgenet_suspend(struct device *d) · 5 unmodified lines
42204210 if (!device_may_wakeup(d))
42214211 phy_suspend(dev->phydev);
42224212
4223− /* Preserve filter state and disable filtering */
4224− priv->hfb_en[0] = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);
4225− offset = HFB_FLT_ENABLE_V3PLUS;
4226− priv->hfb_en[1] = bcmgenet_hfb_reg_readl(priv, offset);
4227− priv->hfb_en[2] = bcmgenet_hfb_reg_readl(priv, offset + sizeof(u32));
4213+ /* Disable filtering */
42284214 bcmgenet_hfb_reg_writel(priv, 0, HFB_CTRL);
42294215
42304216 return 0;
drivers/net/ethernet/broadcom/genet/bcmgenet.h+0−1
@@ -696,7 +696,6 @@ struct bcmgenet_priv { · 695 unmodified lines
696696 u32 wolopts;
697697 u8 sopass[SOPASS_MAX];
698698 bool wol_active;
699− u32 hfb_en[3];
700699
701700 struct bcmgenet_mib_counters mib;
702701
drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c+15−7
@@ -217,20 +217,28 @@ void bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv, · 216 unmodified lines
217217
218218 priv->wol_active = 0;
219219 clk_disable_unprepare(priv->clk_wol);
220+ priv->crc_fwd_en = 0;
220221
221222 /* Disable Magic Packet Detection */
222− reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
223− reg &= ~(MPD_EN | MPD_PW_EN);
224− bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);
223+ if (priv->wolopts & (WAKE_MAGIC | WAKE_MAGICSECURE)) {
224+ reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
225+ if (!(reg & MPD_EN))
226+ return; /* already reset so skip the rest */
227+ reg &= ~(MPD_EN | MPD_PW_EN);
228+ bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);
229+ }
225230
226231 /* Disable WAKE_FILTER Detection */
227− reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);
228− reg &= ~(RBUF_HFB_EN | RBUF_ACPI_EN);
229− bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);
232+ if (priv->wolopts & WAKE_FILTER) {
233+ reg = bcmgenet_hfb_reg_readl(priv, HFB_CTRL);
234+ if (!(reg & RBUF_ACPI_EN))
235+ return; /* already reset so skip the rest */
236+ reg &= ~(RBUF_HFB_EN | RBUF_ACPI_EN);
237+ bcmgenet_hfb_reg_writel(priv, reg, HFB_CTRL);
238+ }
230239
231240 /* Disable CRC Forward */
232241 reg = bcmgenet_umac_readl(priv, UMAC_CMD);
233242 reg &= ~CMD_CRC_FWD;
234243 bcmgenet_umac_writel(priv, reg, UMAC_CMD);
235− priv->crc_fwd_en = 0;
236244 }
drivers/net/ethernet/cadence/macb_main.c+1−1
@@ -3736,7 +3736,7 @@ static int macb_init(struct platform_device *pdev) · 3735 unmodified lines
37363736
37373737 if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
37383738 val = 0;
3739− if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
3739+ if (phy_interface_mode_is_rgmii(bp->phy_interface))
37403740 val = GEM_BIT(RGMII);
37413741 else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
37423742 (bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII))
drivers/net/ethernet/chelsio/cxgb4/sge.c+1−0
@@ -2938,6 +2938,7 @@ static inline int uld_send(struct adapter *adap, struct sk_buff *skb, · 2937 unmodified lines
29382938 txq_info = adap->sge.uld_txq_info[tx_uld_type];
29392939 if (unlikely(!txq_info)) {
29402940 WARN_ON(true);
2941+ kfree_skb(skb);
29412942 return NET_XMIT_DROP;
29422943 }
29432944
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c+1−1
@@ -2938,7 +2938,7 @@ static int dpaa_eth_probe(struct platform_device *pdev) · 2937 unmodified lines
29382938 DMA_BIT_MASK(40));
29392939 if (err) {
29402940 netdev_err(net_dev, "dma_coerce_mask_and_coherent() failed\n");
2941− return err;
2941+ goto free_netdev;
29422942 }
29432943
29442944 /* If fsl_fm_max_frm is set to a higher value than the all-common 1500,
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+1−1
@@ -3632,7 +3632,7 @@ static int dpaa2_eth_connect_mac(struct dpaa2_eth_priv *priv) · 3631 unmodified lines
36323632
36333633 dpni_dev = to_fsl_mc_device(priv->net_dev->dev.parent);
36343634 dpmac_dev = fsl_mc_get_endpoint(dpni_dev);
3635− if (IS_ERR(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
3635+ if (IS_ERR_OR_NULL(dpmac_dev) || dpmac_dev->dev.type != &fsl_mc_bus_dpmac_type)
36363636 return 0;
36373637
36383638 if (dpaa2_mac_is_type_fixed(dpmac_dev, priv->mc_io))
drivers/net/ethernet/freescale/enetc/enetc_pf.c+1−0
@@ -906,6 +906,7 @@ static int enetc_pf_probe(struct pci_dev *pdev, · 905 unmodified lines
906906 return 0;
907907
908908 err_reg_netdev:
909+ enetc_mdio_remove(pf);
909910 enetc_of_put_phy(priv);
910911 enetc_free_msix(priv);
911912 err_alloc_msix:
drivers/net/ethernet/freescale/fec.h+1−0
@@ -590,6 +590,7 @@ struct fec_enet_private { · 589 unmodified lines
590590 void fec_ptp_init(struct platform_device *pdev, int irq_idx);
591591 void fec_ptp_stop(struct platform_device *pdev);
592592 void fec_ptp_start_cyclecounter(struct net_device *ndev);
593+void fec_ptp_disable_hwts(struct net_device *ndev);
593594 int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr);
594595 int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr);
595596
drivers/net/ethernet/freescale/fec_main.c+17−6
@@ -1294,8 +1294,13 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id) · 1293 unmodified lines
12941294 ndev->stats.tx_bytes += skb->len;
12951295 }
12961296
1297− if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1298− fep->bufdesc_ex) {
1297+ /* NOTE: SKBTX_IN_PROGRESS being set does not imply it's we who
1298+ * are to time stamp the packet, so we still need to check time
1299+ * stamping enabled flag.
1300+ */
1301+ if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
1302+ fep->hwts_tx_en) &&
1303+ fep->bufdesc_ex) {
12991304 struct skb_shared_hwtstamps shhwtstamps;
13001305 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
13011306
@@ -2723,10 +2728,16 @@ static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd) · 1421 unmodified lines
27232728 return -ENODEV;
27242729
27252730 if (fep->bufdesc_ex) {
2726− if (cmd == SIOCSHWTSTAMP)
2727− return fec_ptp_set(ndev, rq);
2728− if (cmd == SIOCGHWTSTAMP)
2729− return fec_ptp_get(ndev, rq);
2731+ bool use_fec_hwts = !phy_has_hwtstamp(phydev);
2732+
2733+ if (cmd == SIOCSHWTSTAMP) {
2734+ if (use_fec_hwts)
2735+ return fec_ptp_set(ndev, rq);
2736+ fec_ptp_disable_hwts(ndev);
2737+ } else if (cmd == SIOCGHWTSTAMP) {
2738+ if (use_fec_hwts)
2739+ return fec_ptp_get(ndev, rq);
2740+ }
27302741 }
27312742
27322743 return phy_mii_ioctl(phydev, rq, cmd);
drivers/net/ethernet/freescale/fec_ptp.c+12−0
@@ -452,6 +452,18 @@ static int fec_ptp_enable(struct ptp_clock_info *ptp, · 451 unmodified lines
452452 return -EOPNOTSUPP;
453453 }
454454
455+/**
456+ * fec_ptp_disable_hwts - disable hardware time stamping
457+ * @ndev: pointer to net_device
458+ */
459+void fec_ptp_disable_hwts(struct net_device *ndev)
460+{
461+ struct fec_enet_private *fep = netdev_priv(ndev);
462+
463+ fep->hwts_tx_en = 0;
464+ fep->hwts_rx_en = 0;
465+}
466+
455467 int fec_ptp_set(struct net_device *ndev, struct ifreq *ifr)
456468 {
457469 struct fec_enet_private *fep = netdev_priv(ndev);
drivers/net/ethernet/freescale/gianfar.c+5−1
@@ -779,8 +779,12 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) · 778 unmodified lines
779779
780780 mac_addr = of_get_mac_address(np);
781781
782− if (!IS_ERR(mac_addr))
782+ if (!IS_ERR(mac_addr)) {
783783 ether_addr_copy(dev->dev_addr, mac_addr);
784+ } else {
785+ eth_hw_addr_random(dev);
786+ dev_info(&ofdev->dev, "Using random MAC address: %pM\n", dev->dev_addr);
787+ }
784788
785789 if (model && !strcasecmp(model, "TSEC"))
786790 priv->device_flags |= FSL_GIANFAR_DEV_HAS_GIGABIT |
drivers/net/ethernet/hisilicon/hns3/hnae3.h+1−0
@@ -77,6 +77,7 @@ · 76 unmodified lines
7777 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
7878
7979 enum hns_desc_type {
80+ DESC_TYPE_UNKNOWN,
8081 DESC_TYPE_SKB,
8182 DESC_TYPE_FRAGLIST_SKB,
8283 DESC_TYPE_PAGE,
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+12−12
@@ -1118,12 +1118,12 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 1117 unmodified lines
11181118 return -ENOMEM;
11191119 }
11201120
1121+ desc_cb->priv = priv;
11211122 desc_cb->length = size;
1123+ desc_cb->dma = dma;
1124+ desc_cb->type = type;
11221125
11231126 if (likely(size <= HNS3_MAX_BD_SIZE)) {
1124− desc_cb->priv = priv;
1125− desc_cb->dma = dma;
1126− desc_cb->type = type;
11271127 desc->addr = cpu_to_le64(dma);
11281128 desc->tx.send_size = cpu_to_le16(size);
11291129 desc->tx.bdtp_fe_sc_vld_ra_ri =
@@ -1135,18 +1135,11 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 5 unmodified lines
11351135 }
11361136
11371137 frag_buf_num = hns3_tx_bd_count(size);
1138− sizeoflast = size & HNS3_TX_LAST_SIZE_M;
1138+ sizeoflast = size % HNS3_MAX_BD_SIZE;
11391139 sizeoflast = sizeoflast ? sizeoflast : HNS3_MAX_BD_SIZE;
11401140
11411141 /* When frag size is bigger than hardware limit, split this frag */
11421142 for (k = 0; k < frag_buf_num; k++) {
1143− /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
1144− desc_cb->priv = priv;
1145− desc_cb->dma = dma + HNS3_MAX_BD_SIZE * k;
1146− desc_cb->type = ((type == DESC_TYPE_FRAGLIST_SKB ||
1147− type == DESC_TYPE_SKB) && !k) ?
1148− type : DESC_TYPE_PAGE;
1149−
11501143 /* now, fill the descriptor */
11511144 desc->addr = cpu_to_le64(dma + HNS3_MAX_BD_SIZE * k);
11521145 desc->tx.send_size = cpu_to_le16((k == frag_buf_num - 1) ?
@@ -1158,7 +1151,6 @@ static int hns3_fill_desc(struct hns3_enet_ring *ring, void *priv, · 5 unmodified lines
11581151 /* move ring pointer to next */
11591152 ring_ptr_move_fw(ring, next_to_use);
11601153
1161− desc_cb = &ring->desc_cb[ring->next_to_use];
11621154 desc = &ring->desc[ring->next_to_use];
11631155 }
11641156
@@ -1346,6 +1338,10 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 181 unmodified lines
13461338 unsigned int i;
13471339
13481340 for (i = 0; i < ring->desc_num; i++) {
1341+ struct hns3_desc *desc = &ring->desc[ring->next_to_use];
1342+
1343+ memset(desc, 0, sizeof(*desc));
1344+
13491345 /* check if this is where we started */
13501346 if (ring->next_to_use == next_to_use_orig)
13511347 break;
@@ -1353,6 +1349,9 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 1 unmodified line
13531349 /* rollback one */
13541350 ring_ptr_move_bw(ring, next_to_use);
13551351
1352+ if (!ring->desc_cb[ring->next_to_use].dma)
1353+ continue;
1354+
13561355 /* unmap the descriptor dma address */
13571356 if (ring->desc_cb[ring->next_to_use].type == DESC_TYPE_SKB ||
13581357 ring->desc_cb[ring->next_to_use].type ==
@@ -1369,6 +1368,7 @@ static void hns3_clear_desc(struct hns3_enet_ring *ring, int next_to_use_orig) · 10 unmodified lines
13691368
13701369 ring->desc_cb[ring->next_to_use].length = 0;
13711370 ring->desc_cb[ring->next_to_use].dma = 0;
1371+ ring->desc_cb[ring->next_to_use].type = DESC_TYPE_UNKNOWN;
13721372 }
13731373 }
13741374
drivers/net/ethernet/hisilicon/hns3/hns3_enet.h+0−2
@@ -165,8 +165,6 @@ enum hns3_nic_state { · 164 unmodified lines
165165 #define HNS3_TXD_MSS_S 0
166166 #define HNS3_TXD_MSS_M (0x3fff << HNS3_TXD_MSS_S)
167167
168−#define HNS3_TX_LAST_SIZE_M 0xffff
169−
170168 #define HNS3_VECTOR_TX_IRQ BIT_ULL(0)
171169 #define HNS3_VECTOR_RX_IRQ BIT_ULL(1)
172170
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+22−27
@@ -2673,11 +2673,10 @@ void hclge_task_schedule(struct hclge_dev *hdev, unsigned long delay_time) · 2672 unmodified lines
26732673 delay_time);
26742674 }
26752675
2676−static int hclge_get_mac_link_status(struct hclge_dev *hdev)
2676+static int hclge_get_mac_link_status(struct hclge_dev *hdev, int *link_status)
26772677 {
26782678 struct hclge_link_status_cmd *req;
26792679 struct hclge_desc desc;
2680− int link_status;
26812680 int ret;
26822681
26832682 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_QUERY_LINK_STATUS, true);
@@ -2689,33 +2688,25 @@ static int hclge_get_mac_link_status(struct hclge_dev *hdev) · 5 unmodified lines
26892688 }
26902689
26912690 req = (struct hclge_link_status_cmd *)desc.data;
2692− link_status = req->status & HCLGE_LINK_STATUS_UP_M;
2691+ *link_status = (req->status & HCLGE_LINK_STATUS_UP_M) > 0 ?
2692+ HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;
26932693
2694− return !!link_status;
2694+ return 0;
26952695 }
26962696
2697−static int hclge_get_mac_phy_link(struct hclge_dev *hdev)
2697+static int hclge_get_mac_phy_link(struct hclge_dev *hdev, int *link_status)
26982698 {
2699− unsigned int mac_state;
2700− int link_stat;
2699+ struct phy_device *phydev = hdev->hw.mac.phydev;
2700+
2701+ *link_status = HCLGE_LINK_STATUS_DOWN;
27012702
27022703 if (test_bit(HCLGE_STATE_DOWN, &hdev->state))
27032704 return 0;
27042705
2705− mac_state = hclge_get_mac_link_status(hdev);
2706−
2707− if (hdev->hw.mac.phydev) {
2708− if (hdev->hw.mac.phydev->state == PHY_RUNNING)
2709− link_stat = mac_state &
2710− hdev->hw.mac.phydev->link;
2711− else
2712− link_stat = 0;
2713−
2714− } else {
2715− link_stat = mac_state;
2716− }
2706+ if (phydev && (phydev->state != PHY_RUNNING || !phydev->link))
2707+ return 0;
27172708
2718− return !!link_stat;
2709+ return hclge_get_mac_link_status(hdev, link_status);
27192710 }
27202711
27212712 static void hclge_update_link_status(struct hclge_dev *hdev)
@@ -2725,6 +2716,7 @@ static void hclge_update_link_status(struct hclge_dev *hdev) · 3 unmodified lines
27252716 struct hnae3_handle *rhandle;
27262717 struct hnae3_handle *handle;
27272718 int state;
2719+ int ret;
27282720 int i;
27292721
27302722 if (!client)
@@ -2733,7 +2725,12 @@ static void hclge_update_link_status(struct hclge_dev *hdev) · 2 unmodified lines
27332725 if (test_and_set_bit(HCLGE_STATE_LINK_UPDATING, &hdev->state))
27342726 return;
27352727
2736− state = hclge_get_mac_phy_link(hdev);
2728+ ret = hclge_get_mac_phy_link(hdev, &state);
2729+ if (ret) {
2730+ clear_bit(HCLGE_STATE_LINK_UPDATING, &hdev->state);
2731+ return;
2732+ }
2733+
27372734 if (state != hdev->hw.mac.link) {
27382735 for (i = 0; i < hdev->num_vmdq_vport + 1; i++) {
27392736 handle = &hdev->vport[i].nic;
@@ -6524,14 +6521,15 @@ static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret) · 3784 unmodified lines
65246521 {
65256522 #define HCLGE_MAC_LINK_STATUS_NUM 100
65266523
6524+ int link_status;
65276525 int i = 0;
65286526 int ret;
65296527
65306528 do {
6531− ret = hclge_get_mac_link_status(hdev);
6532− if (ret < 0)
6529+ ret = hclge_get_mac_link_status(hdev, &link_status);
6530+ if (ret)
65336531 return ret;
6534− else if (ret == link_ret)
6532+ if (link_status == link_ret)
65356533 return 0;
65366534
65376535 msleep(HCLGE_LINK_STATUS_MS);
@@ -6542,9 +6540,6 @@ static int hclge_mac_link_status_wait(struct hclge_dev *hdev, int link_ret) · 4 unmodified lines
65426540 static int hclge_mac_phy_link_status_wait(struct hclge_dev *hdev, bool en,
65436541 bool is_phy)
65446542 {
6545−#define HCLGE_LINK_STATUS_DOWN 0
6546−#define HCLGE_LINK_STATUS_UP 1
6547−
65486543 int link_ret;
65496544
65506545 link_ret = en ? HCLGE_LINK_STATUS_UP : HCLGE_LINK_STATUS_DOWN;
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h+3−0
@@ -317,6 +317,9 @@ enum hclge_link_fail_code { · 316 unmodified lines
317317 HCLGE_LF_XSFP_ABSENT,
318318 };
319319
320+#define HCLGE_LINK_STATUS_DOWN 0
321+#define HCLGE_LINK_STATUS_UP 1
322+
320323 #define HCLGE_PG_NUM 4
321324 #define HCLGE_SCH_MODE_SP 0
322325 #define HCLGE_SCH_MODE_DWRR 1
drivers/net/ethernet/mellanox/mlxsw/core.c+2−1
@@ -710,7 +710,7 @@ static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) · 709 unmodified lines
710710 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
711711 mlxsw_core);
712712 if (err)
713− return err;
713+ goto err_trap_register;
714714
715715 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
716716 if (err)
@@ -722,6 +722,7 @@ static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) · 5 unmodified lines
722722 err_emad_trap_set:
723723 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
724724 mlxsw_core);
725+err_trap_register:
725726 destroy_workqueue(mlxsw_core->emad_wq);
726727 return err;
727728 }
drivers/net/ethernet/mellanox/mlxsw/core_env.c+32−16
@@ -45,7 +45,7 @@ static int mlxsw_env_validate_cable_ident(struct mlxsw_core *core, int id, · 44 unmodified lines
4545 static int
4646 mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module,
4747 u16 offset, u16 size, void *data,
48− unsigned int *p_read_size)
48+ bool qsfp, unsigned int *p_read_size)
4949 {
5050 char eeprom_tmp[MLXSW_REG_MCIA_EEPROM_SIZE];
5151 char mcia_pl[MLXSW_REG_MCIA_LEN];
@@ -54,6 +54,10 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, · 2 unmodified lines
5454 int status;
5555 int err;
5656
57+ /* MCIA register accepts buffer size <= 48. Page of size 128 should be
58+ * read by chunks of size 48, 48, 32. Align the size of the last chunk
59+ * to avoid reading after the end of the page.
60+ */
5761 size = min_t(u16, size, MLXSW_REG_MCIA_EEPROM_SIZE);
5862
5963 if (offset < MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH &&
@@ -63,18 +67,25 @@ mlxsw_env_query_module_eeprom(struct mlxsw_core *mlxsw_core, int module, · 3 unmodified lines
6367
6468 i2c_addr = MLXSW_REG_MCIA_I2C_ADDR_LOW;
6569 if (offset >= MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH) {
66− page = MLXSW_REG_MCIA_PAGE_GET(offset);
67− offset -= MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH * page;
68− /* When reading upper pages 1, 2 and 3 the offset starts at
69− * 128. Please refer to "QSFP+ Memory Map" figure in SFF-8436
70− * specification for graphical depiction.
71− * MCIA register accepts buffer size <= 48. Page of size 128
72− * should be read by chunks of size 48, 48, 32. Align the size
73− * of the last chunk to avoid reading after the end of the
74− * page.
75− */
76− if (offset + size > MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH)
77− size = MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH - offset;
70+ if (qsfp) {
71+ /* When reading upper pages 1, 2 and 3 the offset
72+ * starts at 128. Please refer to "QSFP+ Memory Map"
73+ * figure in SFF-8436 specification for graphical
74+ * depiction.
75+ */
76+ page = MLXSW_REG_MCIA_PAGE_GET(offset);
77+ offset -= MLXSW_REG_MCIA_EEPROM_UP_PAGE_LENGTH * page;
78+ if (offset + size > MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH)
79+ size = MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH - offset;
80+ } else {
81+ /* When reading upper pages 1, 2 and 3 the offset
82+ * starts at 0 and I2C high address is used. Please refer
83+ * refer to "Memory Organization" figure in SFF-8472
84+ * specification for graphical depiction.
85+ */
86+ i2c_addr = MLXSW_REG_MCIA_I2C_ADDR_HIGH;
87+ offset -= MLXSW_REG_MCIA_EEPROM_PAGE_LENGTH;
88+ }
7889 }
7990
8091 mlxsw_reg_mcia_pack(mcia_pl, module, 0, page, offset, size, i2c_addr);
@@ -166,7 +177,7 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module, · 85 unmodified lines
166177 int err;
167178
168179 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, 0, offset,
169− module_info, &read_size);
180+ module_info, false, &read_size);
170181 if (err)
171182 return err;
172183
@@ -197,7 +208,7 @@ int mlxsw_env_get_module_info(struct mlxsw_core *mlxsw_core, int module, · 24 unmodified lines
197208 /* Verify if transceiver provides diagnostic monitoring page */
198209 err = mlxsw_env_query_module_eeprom(mlxsw_core, module,
199210 SFP_DIAGMON, 1, &diag_mon,
200− &read_size);
211+ false, &read_size);
201212 if (err)
202213 return err;
203214
@@ -225,17 +236,22 @@ int mlxsw_env_get_module_eeprom(struct net_device *netdev, · 21 unmodified lines
225236 int offset = ee->offset;
226237 unsigned int read_size;
227238 int i = 0;
239+ bool qsfp;
228240 int err;
229241
230242 if (!ee->len)
231243 return -EINVAL;
232244
233245 memset(data, 0, ee->len);
246+ /* Validate module identifier value. */
247+ err = mlxsw_env_validate_cable_ident(mlxsw_core, module, &qsfp);
248+ if (err)
249+ return err;
234250
235251 while (i < ee->len) {
236252 err = mlxsw_env_query_module_eeprom(mlxsw_core, module, offset,
237253 ee->len - i, data + i,
238− &read_size);
254+ qsfp, &read_size);
239255 if (err) {
240256 netdev_err(netdev, "Eeprom query failed\n");
241257 return err;
drivers/net/ethernet/neterion/vxge/vxge-main.c+1−1
@@ -98,7 +98,7 @@ static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo) · 97 unmodified lines
9898 {
9999 struct sk_buff **skb_ptr = NULL;
100100 struct sk_buff **temp;
101−#define NR_SKB_COMPLETED 128
101+#define NR_SKB_COMPLETED 16
102102 struct sk_buff *completed[NR_SKB_COMPLETED];
103103 int more;
104104
drivers/net/ethernet/pensando/ionic/ionic_ethtool.c+5−2
@@ -103,15 +103,18 @@ static void ionic_get_regs(struct net_device *netdev, struct ethtool_regs *regs, · 102 unmodified lines
103103 void *p)
104104 {
105105 struct ionic_lif *lif = netdev_priv(netdev);
106+ unsigned int offset;
106107 unsigned int size;
107108
108109 regs->version = IONIC_DEV_CMD_REG_VERSION;
109110
111+ offset = 0;
110112 size = IONIC_DEV_INFO_REG_COUNT * sizeof(u32);
111− memcpy_fromio(p, lif->ionic->idev.dev_info_regs->words, size);
113+ memcpy_fromio(p + offset, lif->ionic->idev.dev_info_regs->words, size);
112114
115+ offset += size;
113116 size = IONIC_DEV_CMD_REG_COUNT * sizeof(u32);
114− memcpy_fromio(p, lif->ionic->idev.dev_cmd_regs->words, size);
117+ memcpy_fromio(p + offset, lif->ionic->idev.dev_cmd_regs->words, size);
115118 }
116119
117120 static int ionic_get_link_ksettings(struct net_device *netdev,
drivers/net/ethernet/pensando/ionic/ionic_lif.c+25−25
@@ -96,8 +96,7 @@ static void ionic_link_status_check(struct ionic_lif *lif) · 95 unmodified lines
9696 u16 link_status;
9797 bool link_up;
9898
99− if (!test_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state) ||
100− test_bit(IONIC_LIF_F_QUEUE_RESET, lif->state))
99+ if (!test_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state))
101100 return;
102101
103102 link_status = le16_to_cpu(lif->info->status.link_status);
@@ -114,16 +113,22 @@ static void ionic_link_status_check(struct ionic_lif *lif) · 10 unmodified lines
114113 netif_carrier_on(netdev);
115114 }
116115
117− if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev))
116+ if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev)) {
117+ mutex_lock(&lif->queue_lock);
118118 ionic_start_queues(lif);
119+ mutex_unlock(&lif->queue_lock);
120+ }
119121 } else {
120122 if (netif_carrier_ok(netdev)) {
121123 netdev_info(netdev, "Link down\n");
122124 netif_carrier_off(netdev);
123125 }
124126
125− if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev))
127+ if (lif->netdev->flags & IFF_UP && netif_running(lif->netdev)) {
128+ mutex_lock(&lif->queue_lock);
126129 ionic_stop_queues(lif);
130+ mutex_unlock(&lif->queue_lock);
131+ }
127132 }
128133
129134 clear_bit(IONIC_LIF_F_LINK_CHECK_REQUESTED, lif->state);
@@ -863,8 +868,7 @@ static int ionic_lif_addr_add(struct ionic_lif *lif, const u8 *addr) · 733 unmodified lines
863868 if (f)
864869 return 0;
865870
866− netdev_dbg(lif->netdev, "rx_filter add ADDR %pM (id %d)\n", addr,
867− ctx.comp.rx_filter_add.filter_id);
871+ netdev_dbg(lif->netdev, "rx_filter add ADDR %pM\n", addr);
868872
869873 memcpy(ctx.cmd.rx_filter_add.mac.addr, addr, ETH_ALEN);
870874 err = ionic_adminq_post_wait(lif, &ctx);
@@ -893,6 +897,9 @@ static int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr) · 22 unmodified lines
893897 return -ENOENT;
894898 }
895899
900+ netdev_dbg(lif->netdev, "rx_filter del ADDR %pM (id %d)\n",
901+ addr, f->filter_id);
902+
896903 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);
897904 ionic_rx_filter_free(lif, f);
898905 spin_unlock_bh(&lif->rx_filters.lock);
@@ -901,9 +908,6 @@ static int ionic_lif_addr_del(struct ionic_lif *lif, const u8 *addr) · 2 unmodified lines
901908 if (err && err != -EEXIST)
902909 return err;
903910
904− netdev_dbg(lif->netdev, "rx_filter del ADDR %pM (id %d)\n", addr,
905− ctx.cmd.rx_filter_del.filter_id);
906−
907911 return 0;
908912 }
909913
@@ -1351,13 +1355,11 @@ static int ionic_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, · 441 unmodified lines
13511355 };
13521356 int err;
13531357
1358+ netdev_dbg(netdev, "rx_filter add VLAN %d\n", vid);
13541359 err = ionic_adminq_post_wait(lif, &ctx);
13551360 if (err)
13561361 return err;
13571362
1358− netdev_dbg(netdev, "rx_filter add VLAN %d (id %d)\n", vid,
1359− ctx.comp.rx_filter_add.filter_id);
1360−
13611363 return ionic_rx_filter_save(lif, 0, IONIC_RXQ_INDEX_ANY, 0, &ctx);
13621364 }
13631365
@@ -1382,8 +1384,8 @@ static int ionic_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, · 18 unmodified lines
13821384 return -ENOENT;
13831385 }
13841386
1385− netdev_dbg(netdev, "rx_filter del VLAN %d (id %d)\n", vid,
1386− le32_to_cpu(ctx.cmd.rx_filter_del.filter_id));
1387+ netdev_dbg(netdev, "rx_filter del VLAN %d (id %d)\n",
1388+ vid, f->filter_id);
13871389
13881390 ctx.cmd.rx_filter_del.filter_id = cpu_to_le32(f->filter_id);
13891391 ionic_rx_filter_free(lif, f);
@@ -1993,16 +1995,13 @@ int ionic_reset_queues(struct ionic_lif *lif, ionic_reset_cb cb, void *arg) · 603 unmodified lines
19931995 bool running;
19941996 int err = 0;
19951997
1996− err = ionic_wait_for_bit(lif, IONIC_LIF_F_QUEUE_RESET);
1997− if (err)
1998− return err;
1999−
1998+ mutex_lock(&lif->queue_lock);
20001999 running = netif_running(lif->netdev);
20012000 if (running) {
20022001 netif_device_detach(lif->netdev);
20032002 err = ionic_stop(lif->netdev);
20042003 if (err)
2005− goto reset_out;
2004+ return err;
20062005 }
20072006
20082007 if (cb)
@@ -2012,9 +2011,7 @@ int ionic_reset_queues(struct ionic_lif *lif, ionic_reset_cb cb, void *arg) · 3 unmodified lines
20122011 err = ionic_open(lif->netdev);
20132012 netif_device_attach(lif->netdev);
20142013 }
2015−
2016−reset_out:
2017− clear_bit(IONIC_LIF_F_QUEUE_RESET, lif->state);
2014+ mutex_unlock(&lif->queue_lock);
20182015
20192016 return err;
20202017 }
@@ -2161,7 +2158,9 @@ static void ionic_lif_handle_fw_down(struct ionic_lif *lif) · 140 unmodified lines
21612158
21622159 if (test_bit(IONIC_LIF_F_UP, lif->state)) {
21632160 dev_info(ionic->dev, "Surprise FW stop, stopping queues\n");
2161+ mutex_lock(&lif->queue_lock);
21642162 ionic_stop_queues(lif);
2163+ mutex_unlock(&lif->queue_lock);
21652164 }
21662165
21672166 if (netif_running(lif->netdev)) {
@@ -2280,15 +2279,15 @@ static void ionic_lif_deinit(struct ionic_lif *lif) · 112 unmodified lines
22802279 cancel_work_sync(&lif->deferred.work);
22812280 cancel_work_sync(&lif->tx_timeout_work);
22822281 ionic_rx_filters_deinit(lif);
2282+ if (lif->netdev->features & NETIF_F_RXHASH)
2283+ ionic_lif_rss_deinit(lif);
22832284 }
22842285
2285− if (lif->netdev->features & NETIF_F_RXHASH)
2286− ionic_lif_rss_deinit(lif);
2287−
22882286 napi_disable(&lif->adminqcq->napi);
22892287 ionic_lif_qcq_deinit(lif, lif->notifyqcq);
22902288 ionic_lif_qcq_deinit(lif, lif->adminqcq);
22912289
2290+ mutex_destroy(&lif->queue_lock);
22922291 ionic_lif_reset(lif);
22932292 }
22942293
@@ -2465,6 +2464,7 @@ static int ionic_lif_init(struct ionic_lif *lif) · 170 unmodified lines
24652464 return err;
24662465
24672466 lif->hw_index = le16_to_cpu(comp.hw_index);
2467+ mutex_init(&lif->queue_lock);
24682468
24692469 /* now that we have the hw_index we can figure out our doorbell page */
24702470 lif->dbid_count = le32_to_cpu(lif->ionic->ident.dev.ndbpgs_per_lif);
drivers/net/ethernet/pensando/ionic/ionic_lif.h+1−7
@@ -135,7 +135,6 @@ enum ionic_lif_state_flags { · 134 unmodified lines
135135 IONIC_LIF_F_SW_DEBUG_STATS,
136136 IONIC_LIF_F_UP,
137137 IONIC_LIF_F_LINK_CHECK_REQUESTED,
138− IONIC_LIF_F_QUEUE_RESET,
139138 IONIC_LIF_F_FW_RESET,
140139
141140 /* leave this as last */
@@ -165,6 +164,7 @@ struct ionic_lif { · 23 unmodified lines
165164 unsigned int hw_index;
166165 unsigned int kern_pid;
167166 u64 __iomem *kern_dbpage;
167+ struct mutex queue_lock; /* lock for queue structures */
168168 spinlock_t adminq_lock; /* lock for AdminQ operations */
169169 struct ionic_qcq *adminqcq;
170170 struct ionic_qcq *notifyqcq;
@@ -213,12 +213,6 @@ struct ionic_lif { · 42 unmodified lines
213213 #define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q)
214214 #define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q)
215215
216−/* return 0 if successfully set the bit, else non-zero */
217−static inline int ionic_wait_for_bit(struct ionic_lif *lif, int bitname)
218−{
219− return wait_on_bit_lock(lif->state, bitname, TASK_INTERRUPTIBLE);
220−}
221−
222216 static inline u32 ionic_coal_usec_to_hw(struct ionic *ionic, u32 usecs)
223217 {
224218 u32 mult = le32_to_cpu(ionic->ident.dev.intr_coal_mult);
drivers/net/ethernet/pensando/ionic/ionic_rx_filter.c+29−0
@@ -21,13 +21,16 @@ void ionic_rx_filter_free(struct ionic_lif *lif, struct ionic_rx_filter *f) · 20 unmodified lines
2121 void ionic_rx_filter_replay(struct ionic_lif *lif)
2222 {
2323 struct ionic_rx_filter_add_cmd *ac;
24+ struct hlist_head new_id_list;
2425 struct ionic_admin_ctx ctx;
2526 struct ionic_rx_filter *f;
2627 struct hlist_head *head;
2728 struct hlist_node *tmp;
29+ unsigned int key;
2830 unsigned int i;
2931 int err;
3032
33+ INIT_HLIST_HEAD(&new_id_list);
3134 ac = &ctx.cmd.rx_filter_add;
3235
3336 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
@@ -58,9 +61,30 @@ void ionic_rx_filter_replay(struct ionic_lif *lif) · 24 unmodified lines
5861 ac->mac.addr);
5962 break;
6063 }
64+ spin_lock_bh(&lif->rx_filters.lock);
65+ ionic_rx_filter_free(lif, f);
66+ spin_unlock_bh(&lif->rx_filters.lock);
67+
68+ continue;
6169 }
70+
71+ /* remove from old id list, save new id in tmp list */
72+ spin_lock_bh(&lif->rx_filters.lock);
73+ hlist_del(&f->by_id);
74+ spin_unlock_bh(&lif->rx_filters.lock);
75+ f->filter_id = le32_to_cpu(ctx.comp.rx_filter_add.filter_id);
76+ hlist_add_head(&f->by_id, &new_id_list);
6277 }
6378 }
79+
80+ /* rebuild the by_id hash lists with the new filter ids */
81+ spin_lock_bh(&lif->rx_filters.lock);
82+ hlist_for_each_entry_safe(f, tmp, &new_id_list, by_id) {
83+ key = f->filter_id & IONIC_RX_FILTER_HLISTS_MASK;
84+ head = &lif->rx_filters.by_id[key];
85+ hlist_add_head(&f->by_id, head);
86+ }
87+ spin_unlock_bh(&lif->rx_filters.lock);
6488 }
6589
6690 int ionic_rx_filters_init(struct ionic_lif *lif)
@@ -69,10 +93,12 @@ int ionic_rx_filters_init(struct ionic_lif *lif) · 2 unmodified lines
6993
7094 spin_lock_init(&lif->rx_filters.lock);
7195
96+ spin_lock_bh(&lif->rx_filters.lock);
7297 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
7398 INIT_HLIST_HEAD(&lif->rx_filters.by_hash[i]);
7499 INIT_HLIST_HEAD(&lif->rx_filters.by_id[i]);
75100 }
101+ spin_unlock_bh(&lif->rx_filters.lock);
76102
77103 return 0;
78104 }
@@ -84,11 +110,13 @@ void ionic_rx_filters_deinit(struct ionic_lif *lif) · 5 unmodified lines
84110 struct hlist_node *tmp;
85111 unsigned int i;
86112
113+ spin_lock_bh(&lif->rx_filters.lock);
87114 for (i = 0; i < IONIC_RX_FILTER_HLISTS; i++) {
88115 head = &lif->rx_filters.by_id[i];
89116 hlist_for_each_entry_safe(f, tmp, head, by_id)
90117 ionic_rx_filter_free(lif, f);
91118 }
119+ spin_unlock_bh(&lif->rx_filters.lock);
92120 }
93121
94122 int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index,
@@ -124,6 +152,7 @@ int ionic_rx_filter_save(struct ionic_lif *lif, u32 flow_id, u16 rxq_index, · 29 unmodified lines
124152 f->filter_id = le32_to_cpu(ctx->comp.rx_filter_add.filter_id);
125153 f->rxq_index = rxq_index;
126154 memcpy(&f->cmd, ac, sizeof(f->cmd));
155+ netdev_dbg(lif->netdev, "rx_filter add filter_id %d\n", f->filter_id);
127156
128157 INIT_HLIST_NODE(&f->by_hash);
129158 INIT_HLIST_NODE(&f->by_id);
drivers/net/ethernet/pensando/ionic/ionic_txrx.c+0−6
@@ -161,12 +161,6 @@ static void ionic_rx_clean(struct ionic_queue *q, · 160 unmodified lines
161161 return;
162162 }
163163
164− /* no packet processing while resetting */
165− if (unlikely(test_bit(IONIC_LIF_F_QUEUE_RESET, q->lif->state))) {
166− stats->dropped++;
167− return;
168− }
169−
170164 stats->pkts++;
171165 stats->bytes += le16_to_cpu(comp->len);
172166
drivers/net/ethernet/qlogic/qed/qed_cxt.c+2−2
@@ -2008,8 +2008,8 @@ static void qed_rdma_set_pf_params(struct qed_hwfn *p_hwfn, · 2007 unmodified lines
20082008 enum protocol_type proto;
20092009
20102010 if (p_hwfn->mcp_info->func_info.protocol == QED_PCI_ETH_RDMA) {
2011− DP_NOTICE(p_hwfn,
2012− "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
2011+ DP_VERBOSE(p_hwfn, QED_MSG_SP,
2012+ "Current day drivers don't support RoCE & iWARP simultaneously on the same PF. Default to RoCE-only\n");
20132013 p_hwfn->hw_info.personality = QED_PCI_ETH_ROCE;
20142014 }
20152015
drivers/net/ethernet/qlogic/qed/qed_dev.c+1−1
@@ -3102,7 +3102,7 @@ int qed_hw_init(struct qed_dev *cdev, struct qed_hw_init_params *p_params) · 3101 unmodified lines
31023102 }
31033103
31043104 /* Log and clear previous pglue_b errors if such exist */
3105− qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt);
3105+ qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_main_ptt, true);
31063106
31073107 /* Enable the PF's internal FID_enable in the PXP */
31083108 rc = qed_pglueb_set_pfid_enable(p_hwfn, p_hwfn->p_main_ptt,
drivers/net/ethernet/qlogic/qed/qed_int.c+31−22
@@ -257,9 +257,10 @@ out: · 256 unmodified lines
257257 #define PGLUE_ATTENTION_ZLR_VALID (1 << 25)
258258 #define PGLUE_ATTENTION_ILT_VALID (1 << 23)
259259
260−int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,
261− struct qed_ptt *p_ptt)
260+int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
261+ bool hw_init)
262262 {
263+ char msg[256];
263264 u32 tmp;
264265
265266 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS2);
@@ -273,22 +274,23 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 7 unmodified lines
273274 details = qed_rd(p_hwfn, p_ptt,
274275 PGLUE_B_REG_TX_ERR_WR_DETAILS);
275276
276− DP_NOTICE(p_hwfn,
277− "Illegal write by chip to [%08x:%08x] blocked.\n"
278− "Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n"
279− "Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]\n",
280− addr_hi, addr_lo, details,
281− (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID),
282− (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID),
283− GET_FIELD(details,
284− PGLUE_ATTENTION_DETAILS_VF_VALID) ? 1 : 0,
285− tmp,
286− GET_FIELD(tmp,
287− PGLUE_ATTENTION_DETAILS2_WAS_ERR) ? 1 : 0,
288− GET_FIELD(tmp,
289− PGLUE_ATTENTION_DETAILS2_BME) ? 1 : 0,
290− GET_FIELD(tmp,
291− PGLUE_ATTENTION_DETAILS2_FID_EN) ? 1 : 0);
277+ snprintf(msg, sizeof(msg),
278+ "Illegal write by chip to [%08x:%08x] blocked.\n"
279+ "Details: %08x [PFID %02x, VFID %02x, VF_VALID %02x]\n"
280+ "Details2 %08x [Was_error %02x BME deassert %02x FID_enable deassert %02x]",
281+ addr_hi, addr_lo, details,
282+ (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_PFID),
283+ (u8)GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VFID),
284+ !!GET_FIELD(details, PGLUE_ATTENTION_DETAILS_VF_VALID),
285+ tmp,
286+ !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_WAS_ERR),
287+ !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_BME),
288+ !!GET_FIELD(tmp, PGLUE_ATTENTION_DETAILS2_FID_EN));
289+
290+ if (hw_init)
291+ DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
292+ else
293+ DP_NOTICE(p_hwfn, "%s\n", msg);
292294 }
293295
294296 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_RD_DETAILS2);
@@ -321,8 +323,14 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 26 unmodified lines
321323 }
322324
323325 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_TX_ERR_WR_DETAILS_ICPL);
324− if (tmp & PGLUE_ATTENTION_ICPL_VALID)
325− DP_NOTICE(p_hwfn, "ICPL error - %08x\n", tmp);
326+ if (tmp & PGLUE_ATTENTION_ICPL_VALID) {
327+ snprintf(msg, sizeof(msg), "ICPL error - %08x", tmp);
328+
329+ if (hw_init)
330+ DP_VERBOSE(p_hwfn, NETIF_MSG_INTR, "%s\n", msg);
331+ else
332+ DP_NOTICE(p_hwfn, "%s\n", msg);
333+ }
326334
327335 tmp = qed_rd(p_hwfn, p_ptt, PGLUE_B_REG_MASTER_ZLR_ERR_DETAILS);
328336 if (tmp & PGLUE_ATTENTION_ZLR_VALID) {
@@ -361,7 +369,7 @@ int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, · 32 unmodified lines
361369
362370 static int qed_pglueb_rbc_attn_cb(struct qed_hwfn *p_hwfn)
363371 {
364− return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt);
372+ return qed_pglueb_rbc_attn_handler(p_hwfn, p_hwfn->p_dpc_ptt, false);
365373 }
366374
367375 static int qed_fw_assertion(struct qed_hwfn *p_hwfn)
@@ -1193,7 +1201,8 @@ static int qed_int_attentions(struct qed_hwfn *p_hwfn) · 825 unmodified lines
11931201 index, attn_bits, attn_acks, asserted_bits,
11941202 deasserted_bits, p_sb_attn_sw->known_attn);
11951203 } else if (asserted_bits == 0x100) {
1196− DP_INFO(p_hwfn, "MFW indication via attention\n");
1204+ DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
1205+ "MFW indication via attention\n");
11971206 } else {
11981207 DP_VERBOSE(p_hwfn, NETIF_MSG_INTR,
11991208 "MFW indication [deassertion]\n");
drivers/net/ethernet/qlogic/qed/qed_int.h+2−2
@@ -442,7 +442,7 @@ int qed_int_set_timer_res(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt, · 441 unmodified lines
442442
443443 #define QED_MAPPING_MEMORY_SIZE(dev) (NUM_OF_SBS(dev))
444444
445−int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn,
446− struct qed_ptt *p_ptt);
445+int qed_pglueb_rbc_attn_handler(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt,
446+ bool hw_init);
447447
448448 #endif
drivers/net/ethernet/renesas/ravb_main.c+24−2
@@ -1450,6 +1450,7 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 1449 unmodified lines
14501450 struct ravb_private *priv = container_of(work, struct ravb_private,
14511451 work);
14521452 struct net_device *ndev = priv->ndev;
1453+ int error;
14531454
14541455 netif_tx_stop_all_queues(ndev);
14551456
@@ -1458,15 +1459,36 @@ static void ravb_tx_timeout_work(struct work_struct *work) · 2 unmodified lines
14581459 ravb_ptp_stop(ndev);
14591460
14601461 /* Wait for DMA stopping */
1461− ravb_stop_dma(ndev);
1462+ if (ravb_stop_dma(ndev)) {
1463+ /* If ravb_stop_dma() fails, the hardware is still operating
1464+ * for TX and/or RX. So, this should not call the following
1465+ * functions because ravb_dmac_init() is possible to fail too.
1466+ * Also, this should not retry ravb_stop_dma() again and again
1467+ * here because it's possible to wait forever. So, this just
1468+ * re-enables the TX and RX and skip the following
1469+ * re-initialization procedure.
1470+ */
1471+ ravb_rcv_snd_enable(ndev);
1472+ goto out;
1473+ }
14621474
14631475 ravb_ring_free(ndev, RAVB_BE);
14641476 ravb_ring_free(ndev, RAVB_NC);
14651477
14661478 /* Device init */
1467− ravb_dmac_init(ndev);
1479+ error = ravb_dmac_init(ndev);
1480+ if (error) {
1481+ /* If ravb_dmac_init() fails, descriptors are freed. So, this
1482+ * should return here to avoid re-enabling the TX and RX in
1483+ * ravb_emac_init().
1484+ */
1485+ netdev_err(ndev, "%s: ravb_dmac_init() failed, error %d\n",
1486+ __func__, error);
1487+ return;
1488+ }
14681489 ravb_emac_init(ndev);
14691490
1491+out:
14701492 /* Initialise PTP Clock driver */
14711493 if (priv->chip_id == RCAR_GEN2)
14721494 ravb_ptp_init(ndev, priv->pdev);
drivers/net/ethernet/smsc/smc91x.c+2−2
@@ -2274,7 +2274,7 @@ static int smc_drv_probe(struct platform_device *pdev) · 2273 unmodified lines
22742274 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
22752275 "power", 0, 0, 100);
22762276 if (ret)
2277− return ret;
2277+ goto out_free_netdev;
22782278
22792279 /*
22802280 * Optional reset GPIO configured? Minimum 100 ns reset needed
@@ -2283,7 +2283,7 @@ static int smc_drv_probe(struct platform_device *pdev) · 2 unmodified lines
22832283 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
22842284 "reset", 0, 0, 100);
22852285 if (ret)
2286− return ret;
2286+ goto out_free_netdev;
22872287
22882288 /*
22892289 * Need to wait for optional EEPROM to load, max 750 us according
drivers/net/ethernet/socionext/sni_ave.c+1−1
@@ -1191,7 +1191,7 @@ static int ave_init(struct net_device *ndev) · 1190 unmodified lines
11911191 ret = regmap_update_bits(priv->regmap, SG_ETPINMODE,
11921192 priv->pinmode_mask, priv->pinmode_val);
11931193 if (ret)
1194− return ret;
1194+ goto out_reset_assert;
11951195
11961196 ave_global_reset(ndev);
11971197
drivers/net/ethernet/ti/am65-cpsw-nuss.c+2−1
@@ -1850,7 +1850,8 @@ static int am65_cpsw_nuss_init_ndev_2g(struct am65_cpsw_common *common) · 1849 unmodified lines
18501850 port->ndev->max_mtu = AM65_CPSW_MAX_PACKET_SIZE;
18511851 port->ndev->hw_features = NETIF_F_SG |
18521852 NETIF_F_RXCSUM |
1853− NETIF_F_HW_CSUM;
1853+ NETIF_F_HW_CSUM |
1854+ NETIF_F_HW_TC;
18541855 port->ndev->features = port->ndev->hw_features |
18551856 NETIF_F_HW_VLAN_CTAG_FILTER;
18561857 port->ndev->vlan_features |= NETIF_F_SG;
drivers/net/geneve.c+1−1
@@ -1615,11 +1615,11 @@ static int geneve_changelink(struct net_device *dev, struct nlattr *tb[], · 1614 unmodified lines
16151615 struct netlink_ext_ack *extack)
16161616 {
16171617 struct geneve_dev *geneve = netdev_priv(dev);
1618+ enum ifla_geneve_df df = geneve->df;
16181619 struct geneve_sock *gs4, *gs6;
16191620 struct ip_tunnel_info info;
16201621 bool metadata;
16211622 bool use_udp6_rx_checksums;
1622− enum ifla_geneve_df df;
16231623 bool ttl_inherit;
16241624 int err;
16251625
drivers/net/hippi/rrunner.c+1−1
@@ -1242,7 +1242,7 @@ static int rr_open(struct net_device *dev) · 1241 unmodified lines
12421242 rrpriv->info = NULL;
12431243 }
12441244 if (rrpriv->rx_ctrl) {
1245− pci_free_consistent(pdev, sizeof(struct ring_ctrl),
1245+ pci_free_consistent(pdev, 256 * sizeof(struct ring_ctrl),
12461246 rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
12471247 rrpriv->rx_ctrl = NULL;
12481248 }
drivers/net/ieee802154/adf7242.c+4−2
@@ -4,7 +4,7 @@ · 3 unmodified lines
44 *
55 * Copyright 2009-2017 Analog Devices Inc.
66 *
7− * http://www.analog.com/ADF7242
7+ * https://www.analog.com/ADF7242
88 */
99
1010 #include <linux/kernel.h>
@@ -1262,7 +1262,7 @@ static int adf7242_probe(struct spi_device *spi) · 1251 unmodified lines
12621262 WQ_MEM_RECLAIM);
12631263 if (unlikely(!lp->wqueue)) {
12641264 ret = -ENOMEM;
1265− goto err_hw_init;
1265+ goto err_alloc_wq;
12661266 }
12671267
12681268 ret = adf7242_hw_init(lp);
@@ -1294,6 +1294,8 @@ static int adf7242_probe(struct spi_device *spi) · 25 unmodified lines
12941294 return ret;
12951295
12961296 err_hw_init:
1297+ destroy_workqueue(lp->wqueue);
1298+err_alloc_wq:
12971299 mutex_destroy(&lp->bmux);
12981300 ieee802154_free_hw(lp->hw);
12991301
drivers/net/netdevsim/netdev.c+2−2
@@ -302,7 +302,7 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port) · 301 unmodified lines
302302 rtnl_lock();
303303 err = nsim_bpf_init(ns);
304304 if (err)
305− goto err_free_netdev;
305+ goto err_rtnl_unlock;
306306
307307 nsim_ipsec_init(ns);
308308
@@ -316,8 +316,8 @@ nsim_create(struct nsim_dev *nsim_dev, struct nsim_dev_port *nsim_dev_port) · 7 unmodified lines
316316 err_ipsec_teardown:
317317 nsim_ipsec_teardown(ns);
318318 nsim_bpf_uninit(ns);
319+err_rtnl_unlock:
319320 rtnl_unlock();
320−err_free_netdev:
321321 free_netdev(dev);
322322 return ERR_PTR(err);
323323 }
drivers/net/phy/dp83640.c+4−0
@@ -1260,6 +1260,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1259 unmodified lines
12601260 dp83640->hwts_rx_en = 1;
12611261 dp83640->layer = PTP_CLASS_L4;
12621262 dp83640->version = PTP_CLASS_V1;
1263+ cfg.rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT;
12631264 break;
12641265 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
12651266 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
@@ -1267,6 +1268,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
12671268 dp83640->hwts_rx_en = 1;
12681269 dp83640->layer = PTP_CLASS_L4;
12691270 dp83640->version = PTP_CLASS_V2;
1271+ cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT;
12701272 break;
12711273 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
12721274 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
@@ -1274,6 +1276,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
12741276 dp83640->hwts_rx_en = 1;
12751277 dp83640->layer = PTP_CLASS_L2;
12761278 dp83640->version = PTP_CLASS_V2;
1279+ cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT;
12771280 break;
12781281 case HWTSTAMP_FILTER_PTP_V2_EVENT:
12791282 case HWTSTAMP_FILTER_PTP_V2_SYNC:
@@ -1281,6 +1284,7 @@ static int dp83640_hwtstamp(struct mii_timestamper *mii_ts, struct ifreq *ifr) · 1 unmodified line
12811284 dp83640->hwts_rx_en = 1;
12821285 dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2;
12831286 dp83640->version = PTP_CLASS_V2;
1287+ cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
12841288 break;
12851289 default:
12861290 return -ERANGE;
drivers/net/usb/ax88172a.c+1−0
@@ -187,6 +187,7 @@ static int ax88172a_bind(struct usbnet *dev, struct usb_interface *intf) · 186 unmodified lines
187187 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
188188 if (ret < ETH_ALEN) {
189189 netdev_err(dev->net, "Failed to read MAC address: %d\n", ret);
190+ ret = -EIO;
190191 goto free;
191192 }
192193 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
drivers/net/usb/hso.c+3−2
@@ -1390,8 +1390,9 @@ static void hso_serial_set_termios(struct tty_struct *tty, struct ktermios *old) · 1389 unmodified lines
13901390 unsigned long flags;
13911391
13921392 if (old)
1393− hso_dbg(0x16, "Termios called with: cflags new[%d] - old[%d]\n",
1394− tty->termios.c_cflag, old->c_cflag);
1393+ hso_dbg(0x16, "Termios called with: cflags new[%u] - old[%u]\n",
1394+ (unsigned int)tty->termios.c_cflag,
1395+ (unsigned int)old->c_cflag);
13951396
13961397 /* the actual setup */
13971398 spin_lock_irqsave(&serial->serial_lock, flags);
drivers/net/wan/hdlc_x25.c+3−1
@@ -71,8 +71,10 @@ static int x25_data_indication(struct net_device *dev, struct sk_buff *skb) · 70 unmodified lines
7171 {
7272 unsigned char *ptr;
7373
74− if (skb_cow(skb, 1))
74+ if (skb_cow(skb, 1)) {
75+ kfree_skb(skb);
7576 return NET_RX_DROP;
77+ }
7678
7779 skb_push(skb, 1);
7880 skb_reset_network_header(skb);
drivers/net/wan/lapbether.c+5−3
@@ -128,10 +128,12 @@ static int lapbeth_data_indication(struct net_device *dev, struct sk_buff *skb) · 127 unmodified lines
128128 {
129129 unsigned char *ptr;
130130
131− skb_push(skb, 1);
132−
133− if (skb_cow(skb, 1))
131+ if (skb_cow(skb, 1)) {
132+ kfree_skb(skb);
134133 return NET_RX_DROP;
134+ }
135+
136+ skb_push(skb, 1);
135137
136138 ptr = skb->data;
137139 *ptr = X25_IFACE_DATA;
drivers/net/wan/x25_asy.c+14−7
@@ -183,7 +183,7 @@ static inline void x25_asy_unlock(struct x25_asy *sl) · 182 unmodified lines
183183 netif_wake_queue(sl->dev);
184184 }
185185
186−/* Send one completely decapsulated IP datagram to the IP layer. */
186+/* Send an LAPB frame to the LAPB module to process. */
187187
188188 static void x25_asy_bump(struct x25_asy *sl)
189189 {
@@ -195,13 +195,12 @@ static void x25_asy_bump(struct x25_asy *sl) · 5 unmodified lines
195195 count = sl->rcount;
196196 dev->stats.rx_bytes += count;
197197
198− skb = dev_alloc_skb(count+1);
198+ skb = dev_alloc_skb(count);
199199 if (skb == NULL) {
200200 netdev_warn(sl->dev, "memory squeeze, dropping packet\n");
201201 dev->stats.rx_dropped++;
202202 return;
203203 }
204− skb_push(skb, 1); /* LAPB internal control */
205204 skb_put_data(skb, sl->rbuff, count);
206205 skb->protocol = x25_type_trans(skb, sl->dev);
207206 err = lapb_data_received(skb->dev, skb);
@@ -209,7 +208,6 @@ static void x25_asy_bump(struct x25_asy *sl) · 1 unmodified line
209208 kfree_skb(skb);
210209 printk(KERN_DEBUG "x25_asy: data received err - %d\n", err);
211210 } else {
212− netif_rx(skb);
213211 dev->stats.rx_packets++;
214212 }
215213 }
@@ -356,12 +354,21 @@ static netdev_tx_t x25_asy_xmit(struct sk_buff *skb, · 140 unmodified lines
356354 */
357355
358356 /*
359− * Called when I frame data arrives. We did the work above - throw it
360− * at the net layer.
357+ * Called when I frame data arrive. We add a pseudo header for upper
358+ * layers and pass it to upper layers.
361359 */
362360
363361 static int x25_asy_data_indication(struct net_device *dev, struct sk_buff *skb)
364362 {
363+ if (skb_cow(skb, 1)) {
364+ kfree_skb(skb);
365+ return NET_RX_DROP;
366+ }
367+ skb_push(skb, 1);
368+ skb->data[0] = X25_IFACE_DATA;
369+
370+ skb->protocol = x25_type_trans(skb, dev);
371+
365372 return netif_rx(skb);
366373 }
367374
@@ -657,7 +664,7 @@ static void x25_asy_unesc(struct x25_asy *sl, unsigned char s) · 289 unmodified lines
657664 switch (s) {
658665 case X25_END:
659666 if (!test_and_clear_bit(SLF_ERROR, &sl->flags) &&
660− sl->rcount > 2)
667+ sl->rcount >= 2)
661668 x25_asy_bump(sl);
662669 clear_bit(SLF_ESCAPE, &sl->flags);
663670 sl->rcount = 0;
drivers/net/wireless/ath/ath10k/ahb.c+1−1
@@ -820,7 +820,7 @@ err_free_irq: · 819 unmodified lines
820820 ath10k_ahb_release_irq_legacy(ar);
821821
822822 err_free_pipes:
823− ath10k_pci_free_pipes(ar);
823+ ath10k_pci_release_resource(ar);
824824
825825 err_resource_deinit:
826826 ath10k_ahb_resource_deinit(ar);
drivers/net/wireless/ath/ath10k/pci.c+37−41
@@ -3473,6 +3473,28 @@ int ath10k_pci_setup_resource(struct ath10k *ar) · 3472 unmodified lines
34733473
34743474 timer_setup(&ar_pci->rx_post_retry, ath10k_pci_rx_replenish_retry, 0);
34753475
3476+ ar_pci->attr = kmemdup(pci_host_ce_config_wlan,
3477+ sizeof(pci_host_ce_config_wlan),
3478+ GFP_KERNEL);
3479+ if (!ar_pci->attr)
3480+ return -ENOMEM;
3481+
3482+ ar_pci->pipe_config = kmemdup(pci_target_ce_config_wlan,
3483+ sizeof(pci_target_ce_config_wlan),
3484+ GFP_KERNEL);
3485+ if (!ar_pci->pipe_config) {
3486+ ret = -ENOMEM;
3487+ goto err_free_attr;
3488+ }
3489+
3490+ ar_pci->serv_to_pipe = kmemdup(pci_target_service_to_ce_map_wlan,
3491+ sizeof(pci_target_service_to_ce_map_wlan),
3492+ GFP_KERNEL);
3493+ if (!ar_pci->serv_to_pipe) {
3494+ ret = -ENOMEM;
3495+ goto err_free_pipe_config;
3496+ }
3497+
34763498 if (QCA_REV_6174(ar) || QCA_REV_9377(ar))
34773499 ath10k_pci_override_ce_config(ar);
34783500
@@ -3480,18 +3502,31 @@ int ath10k_pci_setup_resource(struct ath10k *ar) · 1 unmodified line
34803502 if (ret) {
34813503 ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
34823504 ret);
3483− return ret;
3505+ goto err_free_serv_to_pipe;
34843506 }
34853507
34863508 return 0;
3509+
3510+err_free_serv_to_pipe:
3511+ kfree(ar_pci->serv_to_pipe);
3512+err_free_pipe_config:
3513+ kfree(ar_pci->pipe_config);
3514+err_free_attr:
3515+ kfree(ar_pci->attr);
3516+ return ret;
34873517 }
34883518
34893519 void ath10k_pci_release_resource(struct ath10k *ar)
34903520 {
3521+ struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
3522+
34913523 ath10k_pci_rx_retry_sync(ar);
34923524 netif_napi_del(&ar->napi);
34933525 ath10k_pci_ce_deinit(ar);
34943526 ath10k_pci_free_pipes(ar);
3527+ kfree(ar_pci->attr);
3528+ kfree(ar_pci->pipe_config);
3529+ kfree(ar_pci->serv_to_pipe);
34953530 }
34963531
34973532 static const struct ath10k_bus_ops ath10k_pci_bus_ops = {
@@ -3601,30 +3636,6 @@ static int ath10k_pci_probe(struct pci_dev *pdev, · 103 unmodified lines
36013636
36023637 timer_setup(&ar_pci->ps_timer, ath10k_pci_ps_timer, 0);
36033638
3604− ar_pci->attr = kmemdup(pci_host_ce_config_wlan,
3605− sizeof(pci_host_ce_config_wlan),
3606− GFP_KERNEL);
3607− if (!ar_pci->attr) {
3608− ret = -ENOMEM;
3609− goto err_free;
3610− }
3611−
3612− ar_pci->pipe_config = kmemdup(pci_target_ce_config_wlan,
3613− sizeof(pci_target_ce_config_wlan),
3614− GFP_KERNEL);
3615− if (!ar_pci->pipe_config) {
3616− ret = -ENOMEM;
3617− goto err_free;
3618− }
3619−
3620− ar_pci->serv_to_pipe = kmemdup(pci_target_service_to_ce_map_wlan,
3621− sizeof(pci_target_service_to_ce_map_wlan),
3622− GFP_KERNEL);
3623− if (!ar_pci->serv_to_pipe) {
3624− ret = -ENOMEM;
3625− goto err_free;
3626− }
3627−
36283639 ret = ath10k_pci_setup_resource(ar);
36293640 if (ret) {
36303641 ath10k_err(ar, "failed to setup resource: %d\n", ret);
@@ -3705,10 +3716,9 @@ err_unsupported: · 74 unmodified lines
37053716
37063717 err_free_irq:
37073718 ath10k_pci_free_irq(ar);
3708− ath10k_pci_rx_retry_sync(ar);
37093719
37103720 err_deinit_irq:
3711− ath10k_pci_deinit_irq(ar);
3721+ ath10k_pci_release_resource(ar);
37123722
37133723 err_sleep:
37143724 ath10k_pci_sleep_sync(ar);
@@ -3720,29 +3730,18 @@ err_free_pipes: · 5 unmodified lines
37203730 err_core_destroy:
37213731 ath10k_core_destroy(ar);
37223732
3723−err_free:
3724− kfree(ar_pci->attr);
3725− kfree(ar_pci->pipe_config);
3726− kfree(ar_pci->serv_to_pipe);
3727−
37283733 return ret;
37293734 }
37303735
37313736 static void ath10k_pci_remove(struct pci_dev *pdev)
37323737 {
37333738 struct ath10k *ar = pci_get_drvdata(pdev);
3734− struct ath10k_pci *ar_pci;
37353739
37363740 ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n");
37373741
37383742 if (!ar)
37393743 return;
37403744
3741− ar_pci = ath10k_pci_priv(ar);
3742−
3743− if (!ar_pci)
3744− return;
3745−
37463745 ath10k_core_unregister(ar);
37473746 ath10k_pci_free_irq(ar);
37483747 ath10k_pci_deinit_irq(ar);
@@ -3750,9 +3749,6 @@ static void ath10k_pci_remove(struct pci_dev *pdev) · 1 unmodified line
37503749 ath10k_pci_sleep_sync(ar);
37513750 ath10k_pci_release(ar);
37523751 ath10k_core_destroy(ar);
3753− kfree(ar_pci->attr);
3754− kfree(ar_pci->pipe_config);
3755− kfree(ar_pci->serv_to_pipe);
37563752 }
37573753
37583754 MODULE_DEVICE_TABLE(pci, ath10k_pci_id_table);
drivers/net/wireless/ath/ath9k/hif_usb.c+3−1
@@ -733,11 +733,13 @@ static void ath9k_hif_usb_reg_in_cb(struct urb *urb) · 732 unmodified lines
733733 return;
734734 }
735735
736+ rx_buf->skb = nskb;
737+
736738 usb_fill_int_urb(urb, hif_dev->udev,
737739 usb_rcvintpipe(hif_dev->udev,
738740 USB_REG_IN_PIPE),
739741 nskb->data, MAX_REG_IN_BUF_SIZE,
740− ath9k_hif_usb_reg_in_cb, nskb, 1);
742+ ath9k_hif_usb_reg_in_cb, rx_buf, 1);
741743 }
742744
743745 resubmit:
drivers/net/wireless/intel/iwlwifi/iwl-dbg-tlv.c+14−2
@@ -271,6 +271,8 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, · 270 unmodified lines
271271 {
272272 struct iwl_fw_ini_trigger_tlv *trig = (void *)tlv->data;
273273 u32 tp = le32_to_cpu(trig->time_point);
274+ struct iwl_ucode_tlv *dup = NULL;
275+ int ret;
274276
275277 if (le32_to_cpu(tlv->length) < sizeof(*trig))
276278 return -EINVAL;
@@ -283,10 +285,20 @@ static int iwl_dbg_tlv_alloc_trigger(struct iwl_trans *trans, · 6 unmodified lines
283285 return -EINVAL;
284286 }
285287
286− if (!le32_to_cpu(trig->occurrences))
288+ if (!le32_to_cpu(trig->occurrences)) {
289+ dup = kmemdup(tlv, sizeof(*tlv) + le32_to_cpu(tlv->length),
290+ GFP_KERNEL);
291+ if (!dup)
292+ return -ENOMEM;
293+ trig = (void *)dup->data;
287294 trig->occurrences = cpu_to_le32(-1);
295+ tlv = dup;
296+ }
297+
298+ ret = iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);
299+ kfree(dup);
288300
289− return iwl_dbg_tlv_add(tlv, &trans->dbg.time_point[tp].trig_list);
301+ return ret;
290302 }
291303
292304 static int (*dbg_tlv_alloc[])(struct iwl_trans *trans,
drivers/net/wireless/intel/iwlwifi/mvm/sta.c+3−5
@@ -1189,17 +1189,15 @@ static int iwl_mvm_inactivity_check(struct iwl_mvm *mvm, u8 alloc_for_sta) · 1188 unmodified lines
11891189 for_each_set_bit(i, &changetid_queues, IWL_MAX_HW_QUEUES)
11901190 iwl_mvm_change_queue_tid(mvm, i);
11911191
1192+ rcu_read_unlock();
1193+
11921194 if (free_queue >= 0 && alloc_for_sta != IWL_MVM_INVALID_STA) {
11931195 ret = iwl_mvm_free_inactive_queue(mvm, free_queue, queue_owner,
11941196 alloc_for_sta);
1195− if (ret) {
1196− rcu_read_unlock();
1197+ if (ret)
11971198 return ret;
1198− }
11991199 }
12001200
1201− rcu_read_unlock();
1202−
12031201 return free_queue;
12041202 }
12051203
drivers/net/wireless/intel/iwlwifi/pcie/drv.c+2−0
@@ -582,6 +582,8 @@ static const struct iwl_dev_info iwl_dev_info_table[] = { · 581 unmodified lines
582582 IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
583583 IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
584584 IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
585+ IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
586+ IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
585587
586588 IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
587589
drivers/net/wireless/mediatek/mt76/mt76.h+1−0
@@ -301,6 +301,7 @@ struct mt76_hw_cap { · 300 unmodified lines
301301 #define MT_DRV_TX_ALIGNED4_SKBS BIT(1)
302302 #define MT_DRV_SW_RX_AIRTIME BIT(2)
303303 #define MT_DRV_RX_DMA_HDR BIT(3)
304+#define MT_DRV_HW_MGMT_TXQ BIT(4)
304305
305306 struct mt76_driver_ops {
306307 u32 drv_flags;
drivers/net/wireless/mediatek/mt76/mt7603/main.c+2−0
@@ -642,8 +642,10 @@ mt7603_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class) · 641 unmodified lines
642642 {
643643 struct mt7603_dev *dev = hw->priv;
644644
645+ mutex_lock(&dev->mt76.mutex);
645646 dev->coverage_class = max_t(s16, coverage_class, 0);
646647 mt7603_mac_set_timing(dev);
648+ mutex_unlock(&dev->mt76.mutex);
647649 }
648650
649651 static void mt7603_tx(struct ieee80211_hw *hw,
drivers/net/wireless/mediatek/mt76/mt7615/debugfs.c+5−4
@@ -234,10 +234,11 @@ mt7615_queues_acq(struct seq_file *s, void *data) · 233 unmodified lines
234234 int i;
235235
236236 for (i = 0; i < 16; i++) {
237− int j, acs = i / 4, index = i % 4;
237+ int j, wmm_idx = i % MT7615_MAX_WMM_SETS;
238+ int acs = i / MT7615_MAX_WMM_SETS;
238239 u32 ctrl, val, qlen = 0;
239240
240− val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, index));
241+ val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, wmm_idx));
241242 ctrl = BIT(31) | BIT(15) | (acs << 8);
242243
243244 for (j = 0; j < 32; j++) {
@@ -245,11 +246,11 @@ mt7615_queues_acq(struct seq_file *s, void *data) · 1 unmodified line
245246 continue;
246247
247248 mt76_wr(dev, MT_PLE_FL_Q0_CTRL,
248− ctrl | (j + (index << 5)));
249+ ctrl | (j + (wmm_idx << 5)));
249250 qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
250251 GENMASK(11, 0));
251252 }
252− seq_printf(s, "AC%d%d: queued=%d\n", acs, index, qlen);
253+ seq_printf(s, "AC%d%d: queued=%d\n", wmm_idx, acs, qlen);
253254 }
254255
255256 return 0;
drivers/net/wireless/mediatek/mt76/mt7615/dma.c+5−4
@@ -36,10 +36,10 @@ static int · 35 unmodified lines
3636 mt7622_init_tx_queues_multi(struct mt7615_dev *dev)
3737 {
3838 static const u8 wmm_queue_map[] = {
39− MT7622_TXQ_AC0,
40− MT7622_TXQ_AC1,
41− MT7622_TXQ_AC2,
42− MT7622_TXQ_AC3,
39+ [IEEE80211_AC_BK] = MT7622_TXQ_AC0,
40+ [IEEE80211_AC_BE] = MT7622_TXQ_AC1,
41+ [IEEE80211_AC_VI] = MT7622_TXQ_AC2,
42+ [IEEE80211_AC_VO] = MT7622_TXQ_AC3,
4343 };
4444 int ret;
4545 int i;
@@ -100,6 +100,7 @@ mt7615_tx_cleanup(struct mt7615_dev *dev) · 54 unmodified lines
100100 int i;
101101
102102 mt76_queue_tx_cleanup(dev, MT_TXQ_MCU, false);
103+ mt76_queue_tx_cleanup(dev, MT_TXQ_PSD, false);
103104 if (is_mt7615(&dev->mt76)) {
104105 mt76_queue_tx_cleanup(dev, MT_TXQ_BE, false);
105106 } else {
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.c+1−2
@@ -72,8 +72,7 @@ static int mt7615_eeprom_load(struct mt7615_dev *dev, u32 addr) · 71 unmodified lines
7272 {
7373 int ret;
7474
75− ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_SIZE +
76− MT7615_EEPROM_EXTRA_DATA);
75+ ret = mt76_eeprom_init(&dev->mt76, MT7615_EEPROM_FULL_SIZE);
7776 if (ret < 0)
7877 return ret;
7978
drivers/net/wireless/mediatek/mt76/mt7615/eeprom.h+1−1
@@ -17,7 +17,7 @@ · 16 unmodified lines
1717 #define MT7615_EEPROM_TXDPD_SIZE 216
1818 #define MT7615_EEPROM_TXDPD_COUNT (44 + 3)
1919
20−#define MT7615_EEPROM_EXTRA_DATA (MT7615_EEPROM_TXDPD_OFFSET + \
20+#define MT7615_EEPROM_FULL_SIZE (MT7615_EEPROM_TXDPD_OFFSET + \
2121 MT7615_EEPROM_TXDPD_COUNT * \
2222 MT7615_EEPROM_TXDPD_SIZE)
2323
drivers/net/wireless/mediatek/mt76/mt7615/mac.c+7−13
@@ -526,22 +526,16 @@ int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi, · 525 unmodified lines
526526 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2;
527527 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4;
528528
529− if (ieee80211_is_data(fc) || ieee80211_is_bufferable_mmpdu(fc)) {
530− q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
531− skb_get_queue_mapping(skb);
532− p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
533− } else if (beacon) {
534− if (ext_phy)
535− q_idx = MT_LMAC_BCN1;
536− else
537− q_idx = MT_LMAC_BCN0;
529+ if (beacon) {
538530 p_fmt = MT_TX_TYPE_FW;
531+ q_idx = ext_phy ? MT_LMAC_BCN1 : MT_LMAC_BCN0;
532+ } else if (skb_get_queue_mapping(skb) >= MT_TXQ_PSD) {
533+ p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
534+ q_idx = ext_phy ? MT_LMAC_ALTX1 : MT_LMAC_ALTX0;
539535 } else {
540− if (ext_phy)
541− q_idx = MT_LMAC_ALTX1;
542− else
543− q_idx = MT_LMAC_ALTX0;
544536 p_fmt = is_usb ? MT_TX_TYPE_SF : MT_TX_TYPE_CT;
537+ q_idx = wmm_idx * MT7615_MAX_WMM_SETS +
538+ mt7615_lmac_mapping(dev, skb_get_queue_mapping(skb));
545539 }
546540
547541 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) |
drivers/net/wireless/mediatek/mt76/mt7615/mac.h+0−15
@@ -124,21 +124,6 @@ enum tx_pkt_type { · 123 unmodified lines
124124 MT_TX_TYPE_FW,
125125 };
126126
127−enum tx_pkt_queue_idx {
128− MT_LMAC_AC00,
129− MT_LMAC_AC01,
130− MT_LMAC_AC02,
131− MT_LMAC_AC03,
132− MT_LMAC_ALTX0 = 0x10,
133− MT_LMAC_BMC0,
134− MT_LMAC_BCN0,
135− MT_LMAC_PSMP0,
136− MT_LMAC_ALTX1,
137− MT_LMAC_BMC1,
138− MT_LMAC_BCN1,
139− MT_LMAC_PSMP1,
140−};
141−
142127 enum tx_port_idx {
143128 MT_TX_PORT_IDX_LMAC,
144129 MT_TX_PORT_IDX_MCU
drivers/net/wireless/mediatek/mt76/mt7615/main.c+4−0
@@ -397,6 +397,7 @@ mt7615_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, · 396 unmodified lines
397397 struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
398398 struct mt7615_dev *dev = mt7615_hw_dev(hw);
399399
400+ queue = mt7615_lmac_mapping(dev, queue);
400401 queue += mvif->wmm_idx * MT7615_MAX_WMM_SETS;
401402
402403 return mt7615_mcu_set_wmm(dev, queue, params);
@@ -735,9 +736,12 @@ static void · 332 unmodified lines
735736 mt7615_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
736737 {
737738 struct mt7615_phy *phy = mt7615_hw_phy(hw);
739+ struct mt7615_dev *dev = phy->dev;
738740
741+ mutex_lock(&dev->mt76.mutex);
739742 phy->coverage_class = max_t(s16, coverage_class, 0);
740743 mt7615_mac_set_timing(phy);
744+ mutex_unlock(&dev->mt76.mutex);
741745 }
742746
743747 static int
drivers/net/wireless/mediatek/mt76/mt7615/mmio.c+1−1
@@ -146,7 +146,7 @@ int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base, · 145 unmodified lines
146146 static const struct mt76_driver_ops drv_ops = {
147147 /* txwi_size = txd size + txp size */
148148 .txwi_size = MT_TXD_SIZE + sizeof(struct mt7615_txp_common),
149− .drv_flags = MT_DRV_TXWI_NO_FREE,
149+ .drv_flags = MT_DRV_TXWI_NO_FREE | MT_DRV_HW_MGMT_TXQ,
150150 .survey_flags = SURVEY_INFO_TIME_TX |
151151 SURVEY_INFO_TIME_RX |
152152 SURVEY_INFO_TIME_BSS_RX,
drivers/net/wireless/mediatek/mt76/mt7615/mt7615.h+30−0
@@ -282,6 +282,21 @@ struct mt7615_dev { · 281 unmodified lines
282282 struct list_head wd_head;
283283 };
284284
285+enum tx_pkt_queue_idx {
286+ MT_LMAC_AC00,
287+ MT_LMAC_AC01,
288+ MT_LMAC_AC02,
289+ MT_LMAC_AC03,
290+ MT_LMAC_ALTX0 = 0x10,
291+ MT_LMAC_BMC0,
292+ MT_LMAC_BCN0,
293+ MT_LMAC_PSMP0,
294+ MT_LMAC_ALTX1,
295+ MT_LMAC_BMC1,
296+ MT_LMAC_BCN1,
297+ MT_LMAC_PSMP1,
298+};
299+
285300 enum {
286301 HW_BSSID_0 = 0x0,
287302 HW_BSSID_1,
@@ -447,6 +462,21 @@ static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev) · 159 unmodified lines
447462 return MT7615_WTBL_SIZE;
448463 }
449464
465+static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
466+{
467+ static const u8 lmac_queue_map[] = {
468+ [IEEE80211_AC_BK] = MT_LMAC_AC00,
469+ [IEEE80211_AC_BE] = MT_LMAC_AC01,
470+ [IEEE80211_AC_VI] = MT_LMAC_AC02,
471+ [IEEE80211_AC_VO] = MT_LMAC_AC03,
472+ };
473+
474+ if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
475+ return MT_LMAC_AC01; /* BE */
476+
477+ return lmac_queue_map[ac];
478+}
479+
450480 void mt7615_dma_reset(struct mt7615_dev *dev);
451481 void mt7615_scan_work(struct work_struct *work);
452482 void mt7615_roc_work(struct work_struct *work);
drivers/net/wireless/mediatek/mt76/mt7615/usb.c+7−6
@@ -270,7 +270,7 @@ static int mt7663u_probe(struct usb_interface *usb_intf, · 269 unmodified lines
270270 {
271271 static const struct mt76_driver_ops drv_ops = {
272272 .txwi_size = MT_USB_TXD_SIZE,
273− .drv_flags = MT_DRV_RX_DMA_HDR,
273+ .drv_flags = MT_DRV_RX_DMA_HDR | MT_DRV_HW_MGMT_TXQ,
274274 .tx_prepare_skb = mt7663u_tx_prepare_skb,
275275 .tx_complete_skb = mt7663u_tx_complete_skb,
276276 .tx_status_data = mt7663u_tx_status_data,
@@ -329,25 +329,26 @@ static int mt7663u_probe(struct usb_interface *usb_intf, · 52 unmodified lines
329329 if (!mt76_poll_msec(dev, MT_CONN_ON_MISC, MT_TOP_MISC2_FW_PWR_ON,
330330 FW_STATE_PWR_ON << 1, 500)) {
331331 dev_err(dev->mt76.dev, "Timeout for power on\n");
332− return -EIO;
332+ ret = -EIO;
333+ goto error;
333334 }
334335
335336 alloc_queues:
336337 ret = mt76u_alloc_mcu_queue(&dev->mt76);
337338 if (ret)
338− goto error;
339+ goto error_free_q;
339340
340341 ret = mt76u_alloc_queues(&dev->mt76);
341342 if (ret)
342− goto error;
343+ goto error_free_q;
343344
344345 ret = mt7663u_register_device(dev);
345346 if (ret)
346− goto error_freeq;
347+ goto error_free_q;
347348
348349 return 0;
349350
350−error_freeq:
351+error_free_q:
351352 mt76u_queues_deinit(&dev->mt76);
352353 error:
353354 mt76u_deinit(&dev->mt76);
drivers/net/wireless/mediatek/mt76/mt76x02_mmio.c+3−2
@@ -456,8 +456,9 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) · 455 unmodified lines
456456 tasklet_disable(&dev->mt76.tx_tasklet);
457457 napi_disable(&dev->mt76.tx_napi);
458458
459− for (i = 0; i < ARRAY_SIZE(dev->mt76.napi); i++)
459+ mt76_for_each_q_rx(&dev->mt76, i) {
460460 napi_disable(&dev->mt76.napi[i]);
461+ }
461462
462463 mutex_lock(&dev->mt76.mutex);
463464
@@ -515,7 +516,7 @@ static void mt76x02_watchdog_reset(struct mt76x02_dev *dev) · 51 unmodified lines
515516
516517 tasklet_enable(&dev->mt76.pre_tbtt_tasklet);
517518
518− for (i = 0; i < ARRAY_SIZE(dev->mt76.napi); i++) {
519+ mt76_for_each_q_rx(&dev->mt76, i) {
519520 napi_enable(&dev->mt76.napi[i]);
520521 napi_schedule(&dev->mt76.napi[i]);
521522 }
drivers/net/wireless/mediatek/mt76/mt7915/main.c+3−0
@@ -716,9 +716,12 @@ static void · 715 unmodified lines
716716 mt7915_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
717717 {
718718 struct mt7915_phy *phy = mt7915_hw_phy(hw);
719+ struct mt7915_dev *dev = phy->dev;
719720
721+ mutex_lock(&dev->mt76.mutex);
720722 phy->coverage_class = max_t(s16, coverage_class, 0);
721723 mt7915_mac_set_timing(phy);
724+ mutex_unlock(&dev->mt76.mutex);
722725 }
723726
724727 static int
drivers/net/wireless/mediatek/mt76/tx.c+7−0
@@ -264,6 +264,13 @@ mt76_tx(struct mt76_phy *phy, struct ieee80211_sta *sta, · 263 unmodified lines
264264 skb_set_queue_mapping(skb, qid);
265265 }
266266
267+ if ((dev->drv->drv_flags & MT_DRV_HW_MGMT_TXQ) &&
268+ !ieee80211_is_data(hdr->frame_control) &&
269+ !ieee80211_is_bufferable_mmpdu(hdr->frame_control)) {
270+ qid = MT_TXQ_PSD;
271+ skb_set_queue_mapping(skb, qid);
272+ }
273+
267274 if (!(wcid->tx_info & MT_WCID_TX_INFO_SET))
268275 ieee80211_get_tx_rates(info->control.vif, sta, skb,
269276 info->control.rates, 1);
drivers/net/wireless/mediatek/mt76/usb.c+26−13
@@ -1010,17 +1010,18 @@ static void mt76u_tx_kick(struct mt76_dev *dev, struct mt76_queue *q) · 1009 unmodified lines
10101010 static u8 mt76u_ac_to_hwq(struct mt76_dev *dev, u8 ac)
10111011 {
10121012 if (mt76_chip(dev) == 0x7663) {
1013− static const u8 wmm_queue_map[] = {
1014− [IEEE80211_AC_VO] = 0,
1015− [IEEE80211_AC_VI] = 1,
1016− [IEEE80211_AC_BE] = 2,
1017− [IEEE80211_AC_BK] = 4,
1013+ static const u8 lmac_queue_map[] = {
1014+ /* ac to lmac mapping */
1015+ [IEEE80211_AC_BK] = 0,
1016+ [IEEE80211_AC_BE] = 1,
1017+ [IEEE80211_AC_VI] = 2,
1018+ [IEEE80211_AC_VO] = 4,
10181019 };
10191020
1020− if (WARN_ON(ac >= ARRAY_SIZE(wmm_queue_map)))
1021− return 2; /* BE */
1021+ if (WARN_ON(ac >= ARRAY_SIZE(lmac_queue_map)))
1022+ return 1; /* BE */
10221023
1023− return wmm_queue_map[ac];
1024+ return lmac_queue_map[ac];
10241025 }
10251026
10261027 return mt76_ac_to_hwq(ac);
@@ -1066,11 +1067,16 @@ static int mt76u_alloc_tx(struct mt76_dev *dev) · 39 unmodified lines
10661067
10671068 static void mt76u_free_tx(struct mt76_dev *dev)
10681069 {
1069− struct mt76_queue *q;
1070− int i, j;
1070+ int i;
10711071
10721072 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
1073+ struct mt76_queue *q;
1074+ int j;
1075+
10731076 q = dev->q_tx[i].q;
1077+ if (!q)
1078+ continue;
1079+
10741080 for (j = 0; j < q->ndesc; j++)
10751081 usb_free_urb(q->entry[j].urb);
10761082 }
@@ -1078,17 +1084,22 @@ static void mt76u_free_tx(struct mt76_dev *dev) · 1 unmodified line
10781084
10791085 void mt76u_stop_tx(struct mt76_dev *dev)
10801086 {
1081− struct mt76_queue_entry entry;
1082− struct mt76_queue *q;
1083− int i, j, ret;
1087+ int ret;
10841088
10851089 ret = wait_event_timeout(dev->tx_wait, !mt76_has_tx_pending(&dev->phy),
10861090 HZ / 5);
10871091 if (!ret) {
1092+ struct mt76_queue_entry entry;
1093+ struct mt76_queue *q;
1094+ int i, j;
1095+
10881096 dev_err(dev->dev, "timed out waiting for pending tx\n");
10891097
10901098 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
10911099 q = dev->q_tx[i].q;
1100+ if (!q)
1101+ continue;
1102+
10921103 for (j = 0; j < q->ndesc; j++)
10931104 usb_kill_urb(q->entry[j].urb);
10941105 }
@@ -1100,6 +1111,8 @@ void mt76u_stop_tx(struct mt76_dev *dev) · 5 unmodified lines
11001111 */
11011112 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
11021113 q = dev->q_tx[i].q;
1114+ if (!q)
1115+ continue;
11031116
11041117 /* Assure we are in sync with killed tasklet. */
11051118 spin_lock_bh(&q->lock);
drivers/net/xen-netfront.c+42−22
@@ -63,6 +63,8 @@ module_param_named(max_queues, xennet_max_queues, uint, 0644); · 62 unmodified lines
6363 MODULE_PARM_DESC(max_queues,
6464 "Maximum number of queues per virtual interface");
6565
66+#define XENNET_TIMEOUT (5 * HZ)
67+
6668 static const struct ethtool_ops xennet_ethtool_ops;
6769
6870 struct netfront_cb {
@@ -1334,12 +1336,15 @@ static struct net_device *xennet_create_dev(struct xenbus_device *dev) · 1265 unmodified lines
13341336
13351337 netif_carrier_off(netdev);
13361338
1337− xenbus_switch_state(dev, XenbusStateInitialising);
1338− wait_event(module_wq,
1339− xenbus_read_driver_state(dev->otherend) !=
1340− XenbusStateClosed &&
1341− xenbus_read_driver_state(dev->otherend) !=
1342− XenbusStateUnknown);
1339+ do {
1340+ xenbus_switch_state(dev, XenbusStateInitialising);
1341+ err = wait_event_timeout(module_wq,
1342+ xenbus_read_driver_state(dev->otherend) !=
1343+ XenbusStateClosed &&
1344+ xenbus_read_driver_state(dev->otherend) !=
1345+ XenbusStateUnknown, XENNET_TIMEOUT);
1346+ } while (!err);
1347+
13431348 return netdev;
13441349
13451350 exit:
@@ -2139,28 +2144,43 @@ static const struct attribute_group xennet_dev_group = { · 793 unmodified lines
21392144 };
21402145 #endif /* CONFIG_SYSFS */
21412146
2142−static int xennet_remove(struct xenbus_device *dev)
2147+static void xennet_bus_close(struct xenbus_device *dev)
21432148 {
2144− struct netfront_info *info = dev_get_drvdata(&dev->dev);
2145−
2146− dev_dbg(&dev->dev, "%s\n", dev->nodename);
2149+ int ret;
21472150
2148− if (xenbus_read_driver_state(dev->otherend) != XenbusStateClosed) {
2151+ if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed)
2152+ return;
2153+ do {
21492154 xenbus_switch_state(dev, XenbusStateClosing);
2150− wait_event(module_wq,
2151− xenbus_read_driver_state(dev->otherend) ==
2152− XenbusStateClosing ||
2153− xenbus_read_driver_state(dev->otherend) ==
2154− XenbusStateUnknown);
2155+ ret = wait_event_timeout(module_wq,
2156+ xenbus_read_driver_state(dev->otherend) ==
2157+ XenbusStateClosing ||
2158+ xenbus_read_driver_state(dev->otherend) ==
2159+ XenbusStateClosed ||
2160+ xenbus_read_driver_state(dev->otherend) ==
2161+ XenbusStateUnknown,
2162+ XENNET_TIMEOUT);
2163+ } while (!ret);
2164+
2165+ if (xenbus_read_driver_state(dev->otherend) == XenbusStateClosed)
2166+ return;
21552167
2168+ do {
21562169 xenbus_switch_state(dev, XenbusStateClosed);
2157− wait_event(module_wq,
2158− xenbus_read_driver_state(dev->otherend) ==
2159− XenbusStateClosed ||
2160− xenbus_read_driver_state(dev->otherend) ==
2161− XenbusStateUnknown);
2162− }
2170+ ret = wait_event_timeout(module_wq,
2171+ xenbus_read_driver_state(dev->otherend) ==
2172+ XenbusStateClosed ||
2173+ xenbus_read_driver_state(dev->otherend) ==
2174+ XenbusStateUnknown,
2175+ XENNET_TIMEOUT);
2176+ } while (!ret);
2177+}
2178+
2179+static int xennet_remove(struct xenbus_device *dev)
2180+{
2181+ struct netfront_info *info = dev_get_drvdata(&dev->dev);
21632182
2183+ xennet_bus_close(dev);
21642184 xennet_disconnect_backend(info);
21652185
21662186 if (info->netdev->reg_state == NETREG_REGISTERED)
drivers/nfc/s3fwrn5/core.c+1−0
@@ -198,6 +198,7 @@ int s3fwrn5_recv_frame(struct nci_dev *ndev, struct sk_buff *skb, · 197 unmodified lines
198198 case S3FWRN5_MODE_FW:
199199 return s3fwrn5_fw_recv_frame(ndev, skb);
200200 default:
201+ kfree_skb(skb);
201202 return -ENODEV;
202203 }
203204 }
drivers/pci/pci.c+9−21
@@ -4638,8 +4638,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) · 4637 unmodified lines
46384638 * pcie_wait_for_link_delay - Wait until link is active or inactive
46394639 * @pdev: Bridge device
46404640 * @active: waiting for active or inactive?
4641− * @delay: Delay to wait after link has become active (in ms). Specify %0
4642− * for no delay.
4641+ * @delay: Delay to wait after link has become active (in ms)
46434642 *
46444643 * Use this to wait till link becomes active or inactive.
46454644 */
@@ -4680,7 +4679,7 @@ static bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, · 34 unmodified lines
46804679 msleep(10);
46814680 timeout -= 10;
46824681 }
4683− if (active && ret && delay)
4682+ if (active && ret)
46844683 msleep(delay);
46854684 else if (ret != active)
46864685 pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",
@@ -4801,28 +4800,17 @@ void pci_bridge_wait_for_secondary_bus(struct pci_dev *dev) · 114 unmodified lines
48014800 if (!pcie_downstream_port(dev))
48024801 return;
48034802
4804− /*
4805− * Per PCIe r5.0, sec 6.6.1, for downstream ports that support
4806− * speeds > 5 GT/s, we must wait for link training to complete
4807− * before the mandatory delay.
4808− *
4809− * We can only tell when link training completes via DLL Link
4810− * Active, which is required for downstream ports that support
4811− * speeds > 5 GT/s (sec 7.5.3.6). Unfortunately some common
4812− * devices do not implement Link Active reporting even when it's
4813− * required, so we'll check for that directly instead of checking
4814− * the supported link speed. We assume devices without Link Active
4815− * reporting can train in 100 ms regardless of speed.
4816− */
4817− if (dev->link_active_reporting) {
4818− pci_dbg(dev, "waiting for link to train\n");
4819− if (!pcie_wait_for_link_delay(dev, true, 0)) {
4803+ if (pcie_get_speed_cap(dev) <= PCIE_SPEED_5_0GT) {
4804+ pci_dbg(dev, "waiting %d ms for downstream link\n", delay);
4805+ msleep(delay);
4806+ } else {
4807+ pci_dbg(dev, "waiting %d ms for downstream link, after activation\n",
4808+ delay);
4809+ if (!pcie_wait_for_link_delay(dev, true, delay)) {
48204810 /* Did not train, no need to wait any further */
48214811 return;
48224812 }
48234813 }
4824− pci_dbg(child, "waiting %d ms to become accessible\n", delay);
4825− msleep(delay);
48264814
48274815 if (!pci_device_is_present(child)) {
48284816 pci_dbg(child, "waiting additional %d ms to become accessible\n", delay);
drivers/scsi/scsi_lib.c+11−5
@@ -547,6 +547,15 @@ static void scsi_mq_uninit_cmd(struct scsi_cmnd *cmd) · 546 unmodified lines
547547 scsi_uninit_cmd(cmd);
548548 }
549549
550+static void scsi_run_queue_async(struct scsi_device *sdev)
551+{
552+ if (scsi_target(sdev)->single_lun ||
553+ !list_empty(&sdev->host->starved_list))
554+ kblockd_schedule_work(&sdev->requeue_work);
555+ else
556+ blk_mq_run_hw_queues(sdev->request_queue, true);
557+}
558+
550559 /* Returns false when no more bytes to process, true if there are more */
551560 static bool scsi_end_request(struct request *req, blk_status_t error,
552561 unsigned int bytes)
@@ -591,11 +600,7 @@ static bool scsi_end_request(struct request *req, blk_status_t error, · 38 unmodified lines
591600
592601 __blk_mq_end_request(req, error);
593602
594− if (scsi_target(sdev)->single_lun ||
595− !list_empty(&sdev->host->starved_list))
596− kblockd_schedule_work(&sdev->requeue_work);
597− else
598− blk_mq_run_hw_queues(q, true);
603+ scsi_run_queue_async(sdev);
599604
600605 percpu_ref_put(&q->q_usage_counter);
601606 return false;
@@ -1702,6 +1707,7 @@ out_put_budget: · 1100 unmodified lines
17021707 */
17031708 if (req->rq_flags & RQF_DONTPREP)
17041709 scsi_mq_uninit_cmd(cmd);
1710+ scsi_run_queue_async(sdev);
17051711 break;
17061712 }
17071713 return ret;
drivers/staging/comedi/drivers/addi_apci_1032.c+14−6
@@ -106,14 +106,22 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 105 unmodified lines
106106 unsigned int *data)
107107 {
108108 struct apci1032_private *devpriv = dev->private;
109− unsigned int shift, oldmask;
109+ unsigned int shift, oldmask, himask, lomask;
110110
111111 switch (data[0]) {
112112 case INSN_CONFIG_DIGITAL_TRIG:
113113 if (data[1] != 0)
114114 return -EINVAL;
115115 shift = data[3];
116− oldmask = (1U << shift) - 1;
116+ if (shift < 32) {
117+ oldmask = (1U << shift) - 1;
118+ himask = data[4] << shift;
119+ lomask = data[5] << shift;
120+ } else {
121+ oldmask = 0xffffffffu;
122+ himask = 0;
123+ lomask = 0;
124+ }
117125 switch (data[2]) {
118126 case COMEDI_DIGITAL_TRIG_DISABLE:
119127 devpriv->ctrl = 0;
@@ -136,8 +144,8 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 16 unmodified lines
136144 devpriv->mode2 &= oldmask;
137145 }
138146 /* configure specified channels */
139− devpriv->mode1 |= data[4] << shift;
140− devpriv->mode2 |= data[5] << shift;
147+ devpriv->mode1 |= himask;
148+ devpriv->mode2 |= lomask;
141149 break;
142150 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
143151 if (devpriv->ctrl != (APCI1032_CTRL_INT_ENA |
@@ -154,8 +162,8 @@ static int apci1032_cos_insn_config(struct comedi_device *dev, · 10 unmodified lines
154162 devpriv->mode2 &= oldmask;
155163 }
156164 /* configure specified channels */
157− devpriv->mode1 |= data[4] << shift;
158− devpriv->mode2 |= data[5] << shift;
165+ devpriv->mode1 |= himask;
166+ devpriv->mode2 |= lomask;
159167 break;
160168 default:
161169 return -EINVAL;
drivers/staging/comedi/drivers/addi_apci_1500.c+19−5
@@ -452,13 +452,14 @@ static int apci1500_di_cfg_trig(struct comedi_device *dev, · 451 unmodified lines
452452 struct apci1500_private *devpriv = dev->private;
453453 unsigned int trig = data[1];
454454 unsigned int shift = data[3];
455− unsigned int hi_mask = data[4] << shift;
456− unsigned int lo_mask = data[5] << shift;
457− unsigned int chan_mask = hi_mask | lo_mask;
458− unsigned int old_mask = (1 << shift) - 1;
455+ unsigned int hi_mask;
456+ unsigned int lo_mask;
457+ unsigned int chan_mask;
458+ unsigned int old_mask;
459459 unsigned int pm;
460460 unsigned int pt;
461461 unsigned int pp;
462+ unsigned int invalid_chan;
462463
463464 if (trig > 1) {
464465 dev_dbg(dev->class_dev,
@@ -466,7 +467,20 @@ static int apci1500_di_cfg_trig(struct comedi_device *dev, · 1 unmodified line
466467 return -EINVAL;
467468 }
468469
469− if (chan_mask > 0xffff) {
470+ if (shift <= 16) {
471+ hi_mask = data[4] << shift;
472+ lo_mask = data[5] << shift;
473+ old_mask = (1U << shift) - 1;
474+ invalid_chan = (data[4] | data[5]) >> (16 - shift);
475+ } else {
476+ hi_mask = 0;
477+ lo_mask = 0;
478+ old_mask = 0xffff;
479+ invalid_chan = data[4] | data[5];
480+ }
481+ chan_mask = hi_mask | lo_mask;
482+
483+ if (invalid_chan) {
470484 dev_dbg(dev->class_dev, "invalid digital trigger channel\n");
471485 return -EINVAL;
472486 }
drivers/staging/comedi/drivers/addi_apci_1564.c+14−6
@@ -331,14 +331,22 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 330 unmodified lines
331331 unsigned int *data)
332332 {
333333 struct apci1564_private *devpriv = dev->private;
334− unsigned int shift, oldmask;
334+ unsigned int shift, oldmask, himask, lomask;
335335
336336 switch (data[0]) {
337337 case INSN_CONFIG_DIGITAL_TRIG:
338338 if (data[1] != 0)
339339 return -EINVAL;
340340 shift = data[3];
341− oldmask = (1U << shift) - 1;
341+ if (shift < 32) {
342+ oldmask = (1U << shift) - 1;
343+ himask = data[4] << shift;
344+ lomask = data[5] << shift;
345+ } else {
346+ oldmask = 0xffffffffu;
347+ himask = 0;
348+ lomask = 0;
349+ }
342350 switch (data[2]) {
343351 case COMEDI_DIGITAL_TRIG_DISABLE:
344352 devpriv->ctrl = 0;
@@ -362,8 +370,8 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 17 unmodified lines
362370 devpriv->mode2 &= oldmask;
363371 }
364372 /* configure specified channels */
365− devpriv->mode1 |= data[4] << shift;
366− devpriv->mode2 |= data[5] << shift;
373+ devpriv->mode1 |= himask;
374+ devpriv->mode2 |= lomask;
367375 break;
368376 case COMEDI_DIGITAL_TRIG_ENABLE_LEVELS:
369377 if (devpriv->ctrl != (APCI1564_DI_IRQ_ENA |
@@ -380,8 +388,8 @@ static int apci1564_cos_insn_config(struct comedi_device *dev, · 10 unmodified lines
380388 devpriv->mode2 &= oldmask;
381389 }
382390 /* configure specified channels */
383− devpriv->mode1 |= data[4] << shift;
384− devpriv->mode2 |= data[5] << shift;
391+ devpriv->mode1 |= himask;
392+ devpriv->mode2 |= lomask;
385393 break;
386394 default:
387395 return -EINVAL;
drivers/staging/comedi/drivers/ni_6527.c+1−1
@@ -332,7 +332,7 @@ static int ni6527_intr_insn_config(struct comedi_device *dev, · 331 unmodified lines
332332 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
333333 /* check shift amount */
334334 shift = data[3];
335− if (shift >= s->n_chan) {
335+ if (shift >= 32) {
336336 mask = 0;
337337 rising = 0;
338338 falling = 0;
drivers/staging/media/atomisp/Kconfig+1−1
@@ -22,7 +22,7 @@ config VIDEO_ATOMISP · 21 unmodified lines
2222 module will be called atomisp
2323
2424 config VIDEO_ATOMISP_ISP2401
25− bool "VIDEO_ATOMISP_ISP2401"
25+ bool "Use Intel Atom ISP on Cherrytail/Anniedale (ISP2401)"
2626 depends on VIDEO_ATOMISP
2727 help
2828 Enable support for Atom ISP2401-based boards.
drivers/staging/media/atomisp/Makefile+1−5
@@ -156,6 +156,7 @@ atomisp-objs += \ · 155 unmodified lines
156156 pci/hive_isp_css_common/host/timed_ctrl.o \
157157 pci/hive_isp_css_common/host/vmem.o \
158158 pci/hive_isp_css_shared/host/tag.o \
159+ pci/system_local.o \
159160
160161 obj-byt = \
161162 pci/css_2400_system/hive/ia_css_isp_configs.o \
@@ -182,7 +183,6 @@ INCLUDES += \ · 20 unmodified lines
182183 -I$(atomisp)/include/hmm/ \
183184 -I$(atomisp)/include/mmu/ \
184185 -I$(atomisp)/pci/ \
185− -I$(atomisp)/pci/hrt/ \
186186 -I$(atomisp)/pci/base/circbuf/interface/ \
187187 -I$(atomisp)/pci/base/refcount/interface/ \
188188 -I$(atomisp)/pci/camera/pipe/interface/ \
@@ -192,7 +192,6 @@ INCLUDES += \ · 3 unmodified lines
192192 -I$(atomisp)/pci/hive_isp_css_include/ \
193193 -I$(atomisp)/pci/hive_isp_css_include/device_access/ \
194194 -I$(atomisp)/pci/hive_isp_css_include/host/ \
195− -I$(atomisp)/pci/hive_isp_css_include/memory_access/ \
196195 -I$(atomisp)/pci/hive_isp_css_shared/ \
197196 -I$(atomisp)/pci/hive_isp_css_shared/host/ \
198197 -I$(atomisp)/pci/isp/kernels/ \
@@ -311,9 +310,7 @@ INCLUDES += \ · 112 unmodified lines
311310 -I$(atomisp)/pci/runtime/tagger/interface/
312311
313312 INCLUDES_byt += \
314− -I$(atomisp)/pci/css_2400_system/ \
315313 -I$(atomisp)/pci/css_2400_system/hive/ \
316− -I$(atomisp)/pci/css_2400_system/hrt/ \
317314
318315 INCLUDES_cht += \
319316 -I$(atomisp)/pci/css_2401_system/ \
@@ -321,7 +318,6 @@ INCLUDES_cht += \ · 1 unmodified line
321318 -I$(atomisp)/pci/css_2401_system/hive/ \
322319 -I$(atomisp)/pci/css_2401_system/hrt/ \
323320
324−# -I$(atomisp)/pci/css_2401_system/hrt/ \
325321 # -I$(atomisp)/pci/css_2401_system/hive_isp_css_2401_system_generated/ \
326322
327323 DEFINES := -DHRT_HW -DHRT_ISP_CSS_CUSTOM_HOST -DHRT_USE_VIR_ADDRS -D__HOST__
drivers/staging/media/atomisp/i2c/atomisp-ov2680.c+3−3
@@ -495,11 +495,11 @@ static int ov2680_h_flip(struct v4l2_subdev *sd, s32 value) · 494 unmodified lines
495495 ret = ov2680_read_reg(client, 1, OV2680_MIRROR_REG, &val);
496496 if (ret)
497497 return ret;
498− if (value) {
498+ if (value)
499499 val |= OV2680_FLIP_MIRROR_BIT_ENABLE;
500− } else {
500+ else
501501 val &= ~OV2680_FLIP_MIRROR_BIT_ENABLE;
502− }
502+
503503 ret = ov2680_write_reg(client, 1,
504504 OV2680_MIRROR_REG, val);
505505 if (ret)
drivers/staging/media/atomisp/i2c/ov5693/atomisp-ov5693.c+4−2
@@ -1899,7 +1899,7 @@ static int ov5693_probe(struct i2c_client *client) · 1898 unmodified lines
18991899 {
19001900 struct ov5693_device *dev;
19011901 int i2c;
1902− int ret = 0;
1902+ int ret;
19031903 void *pdata;
19041904 unsigned int i;
19051905
@@ -1929,8 +1929,10 @@ static int ov5693_probe(struct i2c_client *client) · 23 unmodified lines
19291929 pdata = gmin_camera_platform_data(&dev->sd,
19301930 ATOMISP_INPUT_FORMAT_RAW_10,
19311931 atomisp_bayer_order_bggr);
1932− if (!pdata)
1932+ if (!pdata) {
1933+ ret = -EINVAL;
19331934 goto out_free;
1935+ }
19341936
19351937 ret = ov5693_s_config(&dev->sd, client->irq, pdata);
19361938 if (ret)
drivers/staging/media/atomisp/include/linux/atomisp_platform.h+1−0
@@ -250,6 +250,7 @@ const struct atomisp_camera_caps *atomisp_get_default_camera_caps(void); · 249 unmodified lines
250250 #define IS_MFLD __IS_SOC(INTEL_FAM6_ATOM_SALTWELL_MID)
251251 #define IS_BYT __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT)
252252 #define IS_CHT __IS_SOC(INTEL_FAM6_ATOM_AIRMONT)
253+#define IS_MRFD __IS_SOC(INTEL_FAM6_ATOM_SILVERMONT_MID)
253254 #define IS_MOFD __IS_SOC(INTEL_FAM6_ATOM_AIRMONT_MID)
254255
255256 /* Both CHT and MOFD come with ISP2401 */
drivers/staging/media/atomisp/pci/atomisp-regs.h+0−3
@@ -20,9 +20,6 @@ · 19 unmodified lines
2020 #define ATOMISP_REGS_H
2121
2222 /* common register definitions */
23−#define PUNIT_PORT 0x04
24−#define CCK_PORT 0x14
25−
2623 #define PCICMDSTS 0x01
2724 #define INTR 0x0f
2825 #define MSI_CAPID 0x24
drivers/staging/media/atomisp/pci/atomisp_acc.c+2−2
@@ -355,11 +355,11 @@ int atomisp_acc_map(struct atomisp_sub_device *asd, struct atomisp_acc_map *map) · 354 unmodified lines
355355
356356 pgnr = DIV_ROUND_UP(map->length, PAGE_SIZE);
357357 if (pgnr < ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {
358− dev_err(atomisp_dev,
358+ dev_err(asd->isp->dev,
359359 "user space memory size is less than the expected size..\n");
360360 return -ENOMEM;
361361 } else if (pgnr > ((PAGE_ALIGN(map->length)) >> PAGE_SHIFT)) {
362− dev_err(atomisp_dev,
362+ dev_err(asd->isp->dev,
363363 "user space memory size is large than the expected size..\n");
364364 return -ENOMEM;
365365 }
drivers/staging/media/atomisp/pci/atomisp_cmd.c+32−27
@@ -21,6 +21,7 @@ · 20 unmodified lines
2121 #include <linux/firmware.h>
2222 #include <linux/pci.h>
2323 #include <linux/interrupt.h>
24+#include <linux/io.h>
2425 #include <linux/kernel.h>
2526 #include <linux/kfifo.h>
2627 #include <linux/pm_runtime.h>
@@ -109,7 +110,7 @@ struct atomisp_acc_pipe *atomisp_to_acc_pipe(struct video_device *dev) · 82 unmodified lines
109110
110111 static unsigned short atomisp_get_sensor_fps(struct atomisp_sub_device *asd)
111112 {
112− struct v4l2_subdev_frame_interval fi;
113+ struct v4l2_subdev_frame_interval fi = { 0 };
113114 struct atomisp_device *isp = asd->isp;
114115
115116 unsigned short fps = 0;
@@ -206,6 +207,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, · 90 unmodified lines
206207 enum atomisp_dfs_mode mode,
207208 bool force)
208209 {
210+ struct pci_dev *pdev = to_pci_dev(isp->dev);
209211 /* FIXME! Only use subdev[0] status yet */
210212 struct atomisp_sub_device *asd = &isp->asd[0];
211213 const struct atomisp_dfs_config *dfs;
@@ -219,7 +221,7 @@ int atomisp_freq_scaling(struct atomisp_device *isp, · 7 unmodified lines
219221 return -EINVAL;
220222 }
221223
222− if ((isp->pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
224+ if ((pdev->device & ATOMISP_PCI_DEVICE_SOC_MASK) ==
223225 ATOMISP_PCI_DEVICE_SOC_CHT && ATOMISP_USE_YUVPP(asd))
224226 isp->dfs = &dfs_config_cht_soc;
225227
@@ -357,39 +359,41 @@ static void clear_isp_irq(enum hrt_isp_css_irq irq) · 131 unmodified lines
357359 irq_clear_all(IRQ0_ID);
358360 }
359361
360−void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev)
362+void atomisp_msi_irq_init(struct atomisp_device *isp)
361363 {
364+ struct pci_dev *pdev = to_pci_dev(isp->dev);
362365 u32 msg32;
363366 u16 msg16;
364367
365− pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32);
368+ pci_read_config_dword(pdev, PCI_MSI_CAPID, &msg32);
366369 msg32 |= 1 << MSI_ENABLE_BIT;
367− pci_write_config_dword(dev, PCI_MSI_CAPID, msg32);
370+ pci_write_config_dword(pdev, PCI_MSI_CAPID, msg32);
368371
369372 msg32 = (1 << INTR_IER) | (1 << INTR_IIR);
370− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32);
373+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg32);
371374
372− pci_read_config_word(dev, PCI_COMMAND, &msg16);
375+ pci_read_config_word(pdev, PCI_COMMAND, &msg16);
373376 msg16 |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
374377 PCI_COMMAND_INTX_DISABLE);
375− pci_write_config_word(dev, PCI_COMMAND, msg16);
378+ pci_write_config_word(pdev, PCI_COMMAND, msg16);
376379 }
377380
378−void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev)
381+void atomisp_msi_irq_uninit(struct atomisp_device *isp)
379382 {
383+ struct pci_dev *pdev = to_pci_dev(isp->dev);
380384 u32 msg32;
381385 u16 msg16;
382386
383− pci_read_config_dword(dev, PCI_MSI_CAPID, &msg32);
387+ pci_read_config_dword(pdev, PCI_MSI_CAPID, &msg32);
384388 msg32 &= ~(1 << MSI_ENABLE_BIT);
385− pci_write_config_dword(dev, PCI_MSI_CAPID, msg32);
389+ pci_write_config_dword(pdev, PCI_MSI_CAPID, msg32);
386390
387391 msg32 = 0x0;
388− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, msg32);
392+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg32);
389393
390− pci_read_config_word(dev, PCI_COMMAND, &msg16);
394+ pci_read_config_word(pdev, PCI_COMMAND, &msg16);
391395 msg16 &= ~(PCI_COMMAND_MASTER);
392− pci_write_config_word(dev, PCI_COMMAND, msg16);
396+ pci_write_config_word(pdev, PCI_COMMAND, msg16);
393397 }
394398
395399 static void atomisp_sof_event(struct atomisp_sub_device *asd)
@@ -480,11 +484,12 @@ static void print_csi_rx_errors(enum mipi_port_id port, · 84 unmodified lines
480484 /* Clear irq reg */
481485 static void clear_irq_reg(struct atomisp_device *isp)
482486 {
487+ struct pci_dev *pdev = to_pci_dev(isp->dev);
483488 u32 msg_ret;
484489
485− pci_read_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, &msg_ret);
490+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &msg_ret);
486491 msg_ret |= 1 << INTR_IIR;
487− pci_write_config_dword(isp->pdev, PCI_INTERRUPT_CTRL, msg_ret);
492+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, msg_ret);
488493 }
489494
490495 static struct atomisp_sub_device *
@@ -665,11 +670,10 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe) · 174 unmodified lines
665670 void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr,
666671 unsigned int size)
667672 {
668− u32 __iomem *io_virt_addr;
669673 unsigned int data = 0;
670674 unsigned int size32 = DIV_ROUND_UP(size, sizeof(u32));
671675
672− dev_dbg(isp->dev, "atomisp_io_base:%p\n", atomisp_io_base);
676+ dev_dbg(isp->dev, "atomisp mmio base: %p\n", isp->base);
673677 dev_dbg(isp->dev, "%s, addr:0x%x, size: %d, size32: %d\n", __func__,
674678 addr, size, size32);
675679 if (size32 * 4 + addr > 0x4000) {
@@ -678,13 +682,12 @@ void dump_sp_dmem(struct atomisp_device *isp, unsigned int addr, · 2 unmodified lines
678682 return;
679683 }
680684 addr += SP_DMEM_BASE;
681− io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
685+ addr &= 0x003FFFFF;
682686 do {
683− data = *io_virt_addr;
687+ data = readl(isp->base + addr);
684688 dev_dbg(isp->dev, "%s, \t [0x%x]:0x%x\n", __func__, addr, data);
685− io_virt_addr += sizeof(u32);
686− size32 -= 1;
687− } while (size32 > 0);
689+ addr += sizeof(u32);
690+ } while (--size32);
688691 }
689692
690693 static struct videobuf_buffer *atomisp_css_frame_to_vbuf(
@@ -1289,6 +1292,7 @@ void atomisp_delayed_init_work(struct work_struct *work) · 598 unmodified lines
12891292
12901293 static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout)
12911294 {
1295+ struct pci_dev *pdev = to_pci_dev(isp->dev);
12921296 enum ia_css_pipe_id css_pipe_id;
12931297 bool stream_restart[MAX_STREAM_NUM] = {0};
12941298 bool depth_mode = false;
@@ -1372,8 +1376,8 @@ static void __atomisp_css_recover(struct atomisp_device *isp, bool isp_timeout) · 77 unmodified lines
13721376 clear_isp_irq(hrt_isp_css_irq_sp);
13731377
13741378 /* Set the SRSE to 3 before resetting */
1375− pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control |
1376− MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
1379+ pci_write_config_dword(pdev, PCI_I_CONTROL,
1380+ isp->saved_regs.i_control | MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
13771381
13781382 /* reset ISP and restore its state */
13791383 isp->isp_timeout = true;
@@ -6158,6 +6162,7 @@ out: · 4778 unmodified lines
61586162 /*Turn off ISP dphy */
61596163 int atomisp_ospm_dphy_down(struct atomisp_device *isp)
61606164 {
6165+ struct pci_dev *pdev = to_pci_dev(isp->dev);
61616166 unsigned long flags;
61626167 u32 reg;
61636168
@@ -6179,9 +6184,9 @@ done: · 15 unmodified lines
61796184 * MRFLD HW design need all CSI ports are disabled before
61806185 * powering down the IUNIT.
61816186 */
6182− pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &reg);
6187+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &reg);
61836188 reg |= MRFLD_ALL_CSI_PORTS_OFF_MASK;
6184− pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, reg);
6189+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, reg);
61856190 return 0;
61866191 }
61876192
drivers/staging/media/atomisp/pci/atomisp_cmd.h+2−2
@@ -68,8 +68,8 @@ bool atomisp_buffers_queued_pipe(struct atomisp_video_pipe *pipe); · 67 unmodified lines
6868 /*
6969 * Interrupt functions
7070 */
71−void atomisp_msi_irq_init(struct atomisp_device *isp, struct pci_dev *dev);
72−void atomisp_msi_irq_uninit(struct atomisp_device *isp, struct pci_dev *dev);
71+void atomisp_msi_irq_init(struct atomisp_device *isp);
72+void atomisp_msi_irq_uninit(struct atomisp_device *isp);
7373 void atomisp_wdt_work(struct work_struct *work);
7474 void atomisp_wdt(struct timer_list *t);
7575 void atomisp_setup_flash(struct atomisp_sub_device *asd);
drivers/staging/media/atomisp/pci/atomisp_compat.h+0−2
@@ -29,8 +29,6 @@ struct atomisp_sub_device; · 28 unmodified lines
2929 struct video_device;
3030 enum atomisp_input_stream_id;
3131
32−extern void __iomem *atomisp_io_base;
33−
3432 struct atomisp_metadata_buf {
3533 struct ia_css_metadata *metadata;
3634 void *md_vptr;
drivers/staging/media/atomisp/pci/atomisp_compat_css20.c+34−36
@@ -33,13 +33,12 @@ · 32 unmodified lines
3333 #include "atomisp_ioctl.h"
3434 #include "atomisp_acc.h"
3535
36−#include <asm/intel-mid.h>
37−
3836 #include "ia_css_debug.h"
3937 #include "ia_css_isp_param.h"
4038 #include "sh_css_hrt.h"
4139 #include "ia_css_isys.h"
4240
41+#include <linux/io.h>
4342 #include <linux/pm_runtime.h>
4443
4544 /* Assume max number of ACC stages */
@@ -69,92 +68,94 @@ struct bayer_ds_factor { · 23 unmodified lines
6968
7069 static void atomisp_css2_hw_store_8(hrt_address addr, uint8_t data)
7170 {
72− s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
71+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
7372 unsigned long flags;
7473
7574 spin_lock_irqsave(&mmio_lock, flags);
76− *io_virt_addr = data;
75+ writeb(data, isp->base + (addr & 0x003FFFFF));
7776 spin_unlock_irqrestore(&mmio_lock, flags);
7877 }
7978
8079 static void atomisp_css2_hw_store_16(hrt_address addr, uint16_t data)
8180 {
82− s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
81+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
8382 unsigned long flags;
8483
8584 spin_lock_irqsave(&mmio_lock, flags);
86− *io_virt_addr = data;
85+ writew(data, isp->base + (addr & 0x003FFFFF));
8786 spin_unlock_irqrestore(&mmio_lock, flags);
8887 }
8988
9089 void atomisp_css2_hw_store_32(hrt_address addr, uint32_t data)
9190 {
92− s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
91+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
9392 unsigned long flags;
9493
9594 spin_lock_irqsave(&mmio_lock, flags);
96− *io_virt_addr = data;
95+ writel(data, isp->base + (addr & 0x003FFFFF));
9796 spin_unlock_irqrestore(&mmio_lock, flags);
9897 }
9998
10099 static uint8_t atomisp_css2_hw_load_8(hrt_address addr)
101100 {
102− s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
101+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
103102 unsigned long flags;
104103 u8 ret;
105104
106105 spin_lock_irqsave(&mmio_lock, flags);
107− ret = *io_virt_addr;
106+ ret = readb(isp->base + (addr & 0x003FFFFF));
108107 spin_unlock_irqrestore(&mmio_lock, flags);
109108 return ret;
110109 }
111110
112111 static uint16_t atomisp_css2_hw_load_16(hrt_address addr)
113112 {
114− s16 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
113+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
115114 unsigned long flags;
116115 u16 ret;
117116
118117 spin_lock_irqsave(&mmio_lock, flags);
119− ret = *io_virt_addr;
118+ ret = readw(isp->base + (addr & 0x003FFFFF));
120119 spin_unlock_irqrestore(&mmio_lock, flags);
121120 return ret;
122121 }
123122
124123 static uint32_t atomisp_css2_hw_load_32(hrt_address addr)
125124 {
126− s32 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
125+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
127126 unsigned long flags;
128127 u32 ret;
129128
130129 spin_lock_irqsave(&mmio_lock, flags);
131− ret = *io_virt_addr;
130+ ret = readl(isp->base + (addr & 0x003FFFFF));
132131 spin_unlock_irqrestore(&mmio_lock, flags);
133132 return ret;
134133 }
135134
136−static void atomisp_css2_hw_store(hrt_address addr,
137− const void *from, uint32_t n)
135+static void atomisp_css2_hw_store(hrt_address addr, const void *from, uint32_t n)
138136 {
139− s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
137+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
140138 unsigned long flags;
141139 unsigned int i;
142140
141+ addr &= 0x003FFFFF;
143142 spin_lock_irqsave(&mmio_lock, flags);
144− for (i = 0; i < n; i++, io_virt_addr++, from++)
145− *io_virt_addr = *(s8 *)from;
143+ for (i = 0; i < n; i++, from++)
144+ writeb(*(s8 *)from, isp->base + addr + i);
145+
146146 spin_unlock_irqrestore(&mmio_lock, flags);
147147 }
148148
149149 static void atomisp_css2_hw_load(hrt_address addr, void *to, uint32_t n)
150150 {
151− s8 __iomem *io_virt_addr = atomisp_io_base + (addr & 0x003FFFFF);
151+ struct atomisp_device *isp = dev_get_drvdata(atomisp_dev);
152152 unsigned long flags;
153153 unsigned int i;
154154
155+ addr &= 0x003FFFFF;
155156 spin_lock_irqsave(&mmio_lock, flags);
156− for (i = 0; i < n; i++, to++, io_virt_addr++)
157− *(s8 *)to = *io_virt_addr;
157+ for (i = 0; i < n; i++, to++)
158+ *(s8 *)to = readb(isp->base + addr + i);
158159 spin_unlock_irqrestore(&mmio_lock, flags);
159160 }
160161
@@ -181,10 +182,10 @@ void atomisp_load_uint32(hrt_address addr, uint32_t *data) · 20 unmodified lines
181182 *data = atomisp_css2_hw_load_32(addr);
182183 }
183184
184−static int hmm_get_mmu_base_addr(unsigned int *mmu_base_addr)
185+static int hmm_get_mmu_base_addr(struct device *dev, unsigned int *mmu_base_addr)
185186 {
186187 if (!sh_mmu_mrfld.get_pd_base) {
187− dev_err(atomisp_dev, "get mmu base address failed.\n");
188+ dev_err(dev, "get mmu base address failed.\n");
188189 return -EINVAL;
189190 }
190191
@@ -839,7 +840,7 @@ int atomisp_css_init(struct atomisp_device *isp) · 648 unmodified lines
839840 int ret;
840841 int err;
841842
842− ret = hmm_get_mmu_base_addr(&mmu_base_addr);
843+ ret = hmm_get_mmu_base_addr(isp->dev, &mmu_base_addr);
843844 if (ret)
844845 return ret;
845846
@@ -941,7 +942,7 @@ int atomisp_css_resume(struct atomisp_device *isp) · 95 unmodified lines
941942 unsigned int mmu_base_addr;
942943 int ret;
943944
944− ret = hmm_get_mmu_base_addr(&mmu_base_addr);
945+ ret = hmm_get_mmu_base_addr(isp->dev, &mmu_base_addr);
945946 if (ret) {
946947 dev_err(isp->dev, "get base address error.\n");
947948 return -EINVAL;
@@ -1966,8 +1967,7 @@ void atomisp_css_input_set_mode(struct atomisp_sub_device *asd, · 1018 unmodified lines
19661967 true,
19671968 0x13000,
19681969 &size_mem_words) != 0) {
1969− if (intel_mid_identify_cpu() ==
1970− INTEL_MID_CPU_CHIP_TANGIER)
1970+ if (IS_MRFD)
19711971 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_2;
19721972 else
19731973 size_mem_words = CSS_MIPI_FRAME_BUFFER_SIZE_1;
@@ -2414,13 +2414,13 @@ static void __configure_preview_pp_input(struct atomisp_sub_device *asd, · 440 unmodified lines
24142414 struct ia_css_resolution *effective_res =
24152415 &stream_config->input_config.effective_res;
24162416
2417− const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} };
2417+ static const struct bayer_ds_factor bds_fct[] = {{2, 1}, {3, 2}, {5, 4} };
24182418 /*
24192419 * BZ201033: YUV decimation factor of 4 causes couple of rightmost
24202420 * columns to be shaded. Remove this factor to work around the CSS bug.
24212421 * const unsigned int yuv_dec_fct[] = {4, 2};
24222422 */
2423− const unsigned int yuv_dec_fct[] = { 2 };
2423+ static const unsigned int yuv_dec_fct[] = { 2 };
24242424 unsigned int i;
24252425
24262426 if (width == 0 && height == 0)
@@ -2540,7 +2540,7 @@ static void __configure_video_pp_input(struct atomisp_sub_device *asd, · 113 unmodified lines
25402540 struct ia_css_resolution *effective_res =
25412541 &stream_config->input_config.effective_res;
25422542
2543− const struct bayer_ds_factor bds_factors[] = {
2543+ static const struct bayer_ds_factor bds_factors[] = {
25442544 {8, 1}, {6, 1}, {4, 1}, {3, 1}, {2, 1}, {3, 2}
25452545 };
25462546 unsigned int i;
@@ -4337,7 +4337,7 @@ static const char * const fw_acc_type_name[] = { · 1790 unmodified lines
43374337 [IA_CSS_ACC_STANDALONE] = "Stand-alone acceleration",
43384338 };
43394339
4340−int atomisp_css_dump_blob_infor(void)
4340+int atomisp_css_dump_blob_infor(struct atomisp_device *isp)
43414341 {
43424342 struct ia_css_blob_descr *bd = sh_css_blob_info;
43434343 unsigned int i, nm = sh_css_num_binaries;
@@ -4354,8 +4354,7 @@ int atomisp_css_dump_blob_infor(void) · 10 unmodified lines
43544354 for (i = 0; i < sh_css_num_binaries - NUM_OF_SPS; i++) {
43554355 switch (bd[i].header.type) {
43564356 case ia_css_isp_firmware:
4357− dev_dbg(atomisp_dev,
4358− "Num%2d type %s (%s), binary id is %2d, name is %s\n",
4357+ dev_dbg(isp->dev, "Num%2d type %s (%s), binary id is %2d, name is %s\n",
43594358 i + NUM_OF_SPS,
43604359 fw_type_name[bd[i].header.type],
43614360 fw_acc_type_name[bd[i].header.info.isp.type],
@@ -4363,8 +4362,7 @@ int atomisp_css_dump_blob_infor(void) · 1 unmodified line
43634362 bd[i].name);
43644363 break;
43654364 default:
4366− dev_dbg(atomisp_dev,
4367− "Num%2d type %s, name is %s\n",
4365+ dev_dbg(isp->dev, "Num%2d type %s, name is %s\n",
43684366 i + NUM_OF_SPS, fw_type_name[bd[i].header.type],
43694367 bd[i].name);
43704368 }
drivers/staging/media/atomisp/pci/atomisp_compat_css20.h+1−1
@@ -153,7 +153,7 @@ int atomisp_css_debug_dump_isp_binary(void); · 152 unmodified lines
153153
154154 int atomisp_css_dump_sp_raw_copy_linecount(bool reduced);
155155
156−int atomisp_css_dump_blob_infor(void);
156+int atomisp_css_dump_blob_infor(struct atomisp_device *isp);
157157
158158 void atomisp_css_set_isp_config_id(struct atomisp_sub_device *asd,
159159 uint32_t isp_config_id);
drivers/staging/media/atomisp/pci/atomisp_drvfs.c+7−7
@@ -62,9 +62,9 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 61 unmodified lines
6262
6363 if (opt & OPTION_VALID) {
6464 if (opt & OPTION_BIN_LIST) {
65− ret = atomisp_css_dump_blob_infor();
65+ ret = atomisp_css_dump_blob_infor(isp);
6666 if (ret) {
67− dev_err(atomisp_dev, "%s dump blob infor err[ret:%d]\n",
67+ dev_err(isp->dev, "%s dump blob infor err[ret:%d]\n",
6868 __func__, ret);
6969 goto opt_err;
7070 }
@@ -76,7 +76,7 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 5 unmodified lines
7676 atomisp_css_debug_dump_isp_binary();
7777 } else {
7878 ret = -EPERM;
79− dev_err(atomisp_dev, "%s dump running bin err[ret:%d]\n",
79+ dev_err(isp->dev, "%s dump running bin err[ret:%d]\n",
8080 __func__, ret);
8181 goto opt_err;
8282 }
@@ -86,8 +86,7 @@ static inline int iunit_dump_dbgopt(struct atomisp_device *isp, · 3 unmodified lines
8686 hmm_show_mem_stat(__func__, __LINE__);
8787 } else {
8888 ret = -EINVAL;
89− dev_err(atomisp_dev, "%s dump nothing[ret=%d]\n", __func__,
90− ret);
89+ dev_err(isp->dev, "%s dump nothing[ret=%d]\n", __func__, ret);
9190 }
9291
9392 opt_err:
@@ -185,8 +184,9 @@ static void iunit_drvfs_remove_files(struct device_driver *drv) · 91 unmodified lines
185184 driver_remove_file(drv, &iunit_drvfs_attrs[i]);
186185 }
187186
188−int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp)
187+int atomisp_drvfs_init(struct atomisp_device *isp)
189188 {
189+ struct device_driver *drv = isp->dev->driver;
190190 int ret;
191191
192192 iunit_debug.isp = isp;
@@ -194,7 +194,7 @@ int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp) · 1 unmodified line
194194
195195 ret = iunit_drvfs_create_files(iunit_debug.drv);
196196 if (ret) {
197− dev_err(atomisp_dev, "drvfs_create_files error: %d\n", ret);
197+ dev_err(isp->dev, "drvfs_create_files error: %d\n", ret);
198198 iunit_drvfs_remove_files(iunit_debug.drv);
199199 }
200200
drivers/staging/media/atomisp/pci/atomisp_drvfs.h+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
1919 #ifndef __ATOMISP_DRVFS_H__
2020 #define __ATOMISP_DRVFS_H__
2121
22−int atomisp_drvfs_init(struct device_driver *drv, struct atomisp_device *isp);
22+int atomisp_drvfs_init(struct atomisp_device *isp);
2323 void atomisp_drvfs_exit(void);
2424
2525 #endif /* __ATOMISP_DRVFS_H__ */
drivers/staging/media/atomisp/pci/atomisp_gmin_platform.c+351−186
@@ -26,6 +26,9 @@ enum clock_rate { · 25 unmodified lines
2626 #define CLK_RATE_19_2MHZ 19200000
2727 #define CLK_RATE_25_0MHZ 25000000
2828
29+/* Valid clock number range from 0 to 5 */
30+#define MAX_CLK_COUNT 5
31+
2932 /* X-Powers AXP288 register set */
3033 #define ALDO1_SEL_REG 0x28
3134 #define ALDO1_CTRL3_REG 0x13
@@ -61,9 +64,7 @@ enum clock_rate { · 29 unmodified lines
6164
6265 struct gmin_subdev {
6366 struct v4l2_subdev *subdev;
64− int clock_num;
6567 enum clock_rate clock_src;
66− bool clock_on;
6768 struct clk *pmc_clk;
6869 struct gpio_desc *gpio0;
6970 struct gpio_desc *gpio1;
@@ -75,11 +76,16 @@ struct gmin_subdev { · 5 unmodified lines
7576 unsigned int csi_lanes;
7677 enum atomisp_input_format csi_fmt;
7778 enum atomisp_bayer_order csi_bayer;
79+
80+ bool clock_on;
7881 bool v1p8_on;
7982 bool v2p8_on;
8083 bool v1p2_on;
8184 bool v2p8_vcm_on;
8285
86+ int v1p8_gpio;
87+ int v2p8_gpio;
88+
8389 u8 pwm_i2c_addr;
8490
8591 /* For PMIC AXP */
@@ -90,9 +96,9 @@ struct gmin_subdev { · 4 unmodified lines
9096 static struct gmin_subdev gmin_subdevs[MAX_SUBDEVS];
9197
9298 /* ACPI HIDs for the PMICs that could be used by this driver */
93−#define PMIC_ACPI_AXP "INT33F4:00" /* XPower AXP288 PMIC */
94−#define PMIC_ACPI_TI "INT33F5:00" /* Dollar Cove TI PMIC */
95−#define PMIC_ACPI_CRYSTALCOVE "INT33FD:00" /* Crystal Cove PMIC */
99+#define PMIC_ACPI_AXP "INT33F4" /* XPower AXP288 PMIC */
100+#define PMIC_ACPI_TI "INT33F5" /* Dollar Cove TI PMIC */
101+#define PMIC_ACPI_CRYSTALCOVE "INT33FD" /* Crystal Cove PMIC */
96102
97103 #define PMIC_PLATFORM_TI "intel_soc_pmic_chtdc_ti"
98104
@@ -105,7 +111,7 @@ static enum { · 6 unmodified lines
105111 } pmic_id;
106112
107113 static const char *pmic_name[] = {
108− [PMIC_UNSET] = "unset",
114+ [PMIC_UNSET] = "ACPI device PM",
109115 [PMIC_REGULATOR] = "regulator driver",
110116 [PMIC_AXP] = "XPower AXP288 PMIC",
111117 [PMIC_TI] = "Dollar Cove TI PMIC",
@@ -119,24 +125,6 @@ static const struct atomisp_platform_data pdata = { · 7 unmodified lines
119125 .subdevs = pdata_subdevs,
120126 };
121127
122−/*
123− * Something of a hack. The ECS E7 board drives camera 2.8v from an
124− * external regulator instead of the PMIC. There's a gmin_CamV2P8
125− * config variable that specifies the GPIO to handle this particular
126− * case, but this needs a broader architecture for handling camera
127− * power.
128− */
129−enum { V2P8_GPIO_UNSET = -2, V2P8_GPIO_NONE = -1 };
130−static int v2p8_gpio = V2P8_GPIO_UNSET;
131−
132−/*
133− * Something of a hack. The CHT RVP board drives camera 1.8v from an
134− * external regulator instead of the PMIC just like ECS E7 board, see the
135− * comments above.
136− */
137−enum { V1P8_GPIO_UNSET = -2, V1P8_GPIO_NONE = -1 };
138−static int v1p8_gpio = V1P8_GPIO_UNSET;
139−
140128 static LIST_HEAD(vcm_devices);
141129 static DEFINE_MUTEX(vcm_lock);
142130
@@ -199,6 +187,8 @@ int atomisp_register_i2c_module(struct v4l2_subdev *subdev, · 56 unmodified lines
199187 * gmin_subdev struct is already initialized for us.
200188 */
201189 gs = find_gmin_subdev(subdev);
190+ if (!gs)
191+ return -ENODEV;
202192
203193 pdata.subdevs[i].type = type;
204194 pdata.subdevs[i].port = gs->csi_port;
@@ -294,6 +284,7 @@ static struct gmin_cfg_var mrd7_vars[] = { · 89 unmodified lines
294284 {"INT33F8:00_CsiFmt", "13"},
295285 {"INT33F8:00_CsiBayer", "0"},
296286 {"INT33F8:00_CamClk", "0"},
287+
297288 {"INT33F9:00_CamType", "1"},
298289 {"INT33F9:00_CsiPort", "0"},
299290 {"INT33F9:00_CsiLanes", "1"},
@@ -309,6 +300,7 @@ static struct gmin_cfg_var ecs7_vars[] = { · 9 unmodified lines
309300 {"INT33BE:00_CsiFmt", "13"},
310301 {"INT33BE:00_CsiBayer", "2"},
311302 {"INT33BE:00_CamClk", "0"},
303+
312304 {"INT33F0:00_CsiPort", "0"},
313305 {"INT33F0:00_CsiLanes", "1"},
314306 {"INT33F0:00_CsiFmt", "13"},
@@ -322,6 +314,7 @@ static struct gmin_cfg_var i8880_vars[] = { · 7 unmodified lines
322314 {"XXOV2680:00_CsiPort", "1"},
323315 {"XXOV2680:00_CsiLanes", "1"},
324316 {"XXOV2680:00_CamClk", "0"},
317+
325318 {"XXGC0310:00_CsiPort", "0"},
326319 {"XXGC0310:00_CsiLanes", "1"},
327320 {"XXGC0310:00_CamClk", "1"},
@@ -381,34 +374,27 @@ static const guid_t atomisp_dsm_guid = GUID_INIT(0xdc2f6c4f, 0x045b, 0x4f1d, · 53 unmodified lines
381374 #define GMIN_PMC_CLK_NAME 14 /* "pmc_plt_clk_[0..5]" */
382375 static char gmin_pmc_clk_name[GMIN_PMC_CLK_NAME];
383376
384−static int gmin_i2c_match_one(struct device *dev, const void *data)
385−{
386− const char *name = data;
387− struct i2c_client *client;
388−
389− if (dev->type != &i2c_client_type)
390− return 0;
391−
392− client = to_i2c_client(dev);
393−
394− return (!strcmp(name, client->name));
395−}
396−
397377 static struct i2c_client *gmin_i2c_dev_exists(struct device *dev, char *name,
398378 struct i2c_client **client)
399379 {
380+ struct acpi_device *adev;
400381 struct device *d;
401382
402− while ((d = bus_find_device(&i2c_bus_type, NULL, name,
403− gmin_i2c_match_one))) {
404− *client = to_i2c_client(d);
405− dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n",
406− (*client)->name, (*client)->addr,
407− (*client)->adapter->nr);
408− return *client;
409− }
383+ adev = acpi_dev_get_first_match_dev(name, NULL, -1);
384+ if (!adev)
385+ return NULL;
410386
411− return NULL;
387+ d = bus_find_device_by_acpi_dev(&i2c_bus_type, adev);
388+ acpi_dev_put(adev);
389+ if (!d)
390+ return NULL;
391+
392+ *client = i2c_verify_client(d);
393+ put_device(d);
394+
395+ dev_dbg(dev, "found '%s' at address 0x%02x, adapter %d\n",
396+ (*client)->name, (*client)->addr, (*client)->adapter->nr);
397+ return *client;
412398 }
413399
414400 static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg,
@@ -427,94 +413,222 @@ static int gmin_i2c_write(struct device *dev, u16 i2c_addr, u8 reg, · 12 unmodified lines
427413 "I2C write, addr: 0x%02x, reg: 0x%02x, value: 0x%02x, mask: 0x%02x\n",
428414 i2c_addr, reg, value, mask);
429415
430− ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg,
431− value, mask);
432−
433− if (ret == -EOPNOTSUPP) {
416+ ret = intel_soc_pmic_exec_mipi_pmic_seq_element(i2c_addr, reg, value, mask);
417+ if (ret == -EOPNOTSUPP)
434418 dev_err(dev,
435419 "ACPI didn't mapped the OpRegion needed to access I2C address 0x%02x.\n"
436− "Need to compile the Kernel using CONFIG_*_PMIC_OPREGION settings\n",
420+ "Need to compile the kernel using CONFIG_*_PMIC_OPREGION settings\n",
437421 i2c_addr);
438− return ret;
439− }
440422
441423 return ret;
442424 }
443425
444−static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev)
426+static int atomisp_get_acpi_power(struct device *dev)
445427 {
446− struct i2c_client *power = NULL, *client = v4l2_get_subdevdata(subdev);
447− struct acpi_device *adev;
448− acpi_handle handle;
449− struct device *dev;
450− int i, ret;
428+ char name[5];
429+ struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
430+ struct acpi_buffer b_name = { sizeof(name), name };
431+ union acpi_object *package, *element;
432+ acpi_handle handle = ACPI_HANDLE(dev);
433+ acpi_handle rhandle;
434+ acpi_status status;
435+ int clock_num = -1;
436+ int i;
451437
452− if (!client)
453− return NULL;
438+ status = acpi_evaluate_object(handle, "_PR0", NULL, &buffer);
439+ if (!ACPI_SUCCESS(status))
440+ return -1;
454441
455− dev = &client->dev;
442+ package = buffer.pointer;
456443
457− handle = ACPI_HANDLE(dev);
444+ if (!buffer.length || !package
445+ || package->type != ACPI_TYPE_PACKAGE
446+ || !package->package.count)
447+ goto fail;
458448
459− // FIXME: may need to release resources allocated by acpi_bus_get_device()
460− if (!handle || acpi_bus_get_device(handle, &adev)) {
461− dev_err(dev, "Error could not get ACPI device\n");
462− return NULL;
463− }
449+ for (i = 0; i < package->package.count; i++) {
450+ element = &package->package.elements[i];
464451
465− dev_info(&client->dev, "%s: ACPI detected it on bus ID=%s, HID=%s\n",
466− __func__, acpi_device_bid(adev), acpi_device_hid(adev));
452+ if (element->type != ACPI_TYPE_LOCAL_REFERENCE)
453+ continue;
467454
468− if (!pmic_id) {
469− if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power))
470− pmic_id = PMIC_TI;
471− else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power))
472− pmic_id = PMIC_AXP;
473− else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power))
474− pmic_id = PMIC_CRYSTALCOVE;
475− else
476− pmic_id = PMIC_REGULATOR;
455+ rhandle = element->reference.handle;
456+ if (!rhandle)
457+ goto fail;
458+
459+ acpi_get_name(rhandle, ACPI_SINGLE_NAME, &b_name);
460+
461+ dev_dbg(dev, "Found PM resource '%s'\n", name);
462+ if (strlen(name) == 4 && !strncmp(name, "CLK", 3)) {
463+ if (name[3] >= '0' && name[3] <= '4')
464+ clock_num = name[3] - '0';
465+#if 0
466+ /*
467+ * We could abort here, but let's parse all resources,
468+ * as this is helpful for debugging purposes
469+ */
470+ if (clock_num >= 0)
471+ break;
472+#endif
473+ }
477474 }
478475
479− for (i = 0; i < MAX_SUBDEVS && gmin_subdevs[i].subdev; i++)
480− ;
481− if (i >= MAX_SUBDEVS)
482− return NULL;
476+fail:
477+ ACPI_FREE(buffer.pointer);
478+
479+ return clock_num;
480+}
481+
482+static u8 gmin_get_pmic_id_and_addr(struct device *dev)
483+{
484+ struct i2c_client *power;
485+ static u8 pmic_i2c_addr;
486+
487+ if (pmic_id)
488+ return pmic_i2c_addr;
489+
490+ if (gmin_i2c_dev_exists(dev, PMIC_ACPI_TI, &power))
491+ pmic_id = PMIC_TI;
492+ else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_AXP, &power))
493+ pmic_id = PMIC_AXP;
494+ else if (gmin_i2c_dev_exists(dev, PMIC_ACPI_CRYSTALCOVE, &power))
495+ pmic_id = PMIC_CRYSTALCOVE;
496+ else
497+ pmic_id = PMIC_REGULATOR;
498+
499+ pmic_i2c_addr = power ? power->addr : 0;
500+ return pmic_i2c_addr;
501+}
502+
503+static int gmin_detect_pmic(struct v4l2_subdev *subdev)
504+{
505+ struct i2c_client *client = v4l2_get_subdevdata(subdev);
506+ struct device *dev = &client->dev;
507+ u8 pmic_i2c_addr;
508+
509+ pmic_i2c_addr = gmin_get_pmic_id_and_addr(dev);
510+ dev_info(dev, "gmin: power management provided via %s (i2c addr 0x%02x)\n",
511+ pmic_name[pmic_id], pmic_i2c_addr);
512+ return pmic_i2c_addr;
513+}
514+
515+static int gmin_subdev_add(struct gmin_subdev *gs)
516+{
517+ struct i2c_client *client = v4l2_get_subdevdata(gs->subdev);
518+ struct device *dev = &client->dev;
519+ struct acpi_device *adev = ACPI_COMPANION(dev);
520+ int ret, clock_num = -1;
521+
522+ dev_info(dev, "%s: ACPI path is %pfw\n", __func__, dev_fwnode(dev));
523+
524+ /*WA:CHT requires XTAL clock as PLL is not stable.*/
525+ gs->clock_src = gmin_get_var_int(dev, false, "ClkSrc",
526+ VLV2_CLK_PLL_19P2MHZ);
527+
528+ gs->csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);
529+ gs->csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);
530+
531+ gs->gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
532+ if (IS_ERR(gs->gpio0))
533+ gs->gpio0 = NULL;
534+ else
535+ dev_info(dev, "will handle gpio0 via ACPI\n");
536+
537+ gs->gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
538+ if (IS_ERR(gs->gpio1))
539+ gs->gpio1 = NULL;
540+ else
541+ dev_info(dev, "will handle gpio1 via ACPI\n");
542+
543+ /*
544+ * Those are used only when there is an external regulator apart
545+ * from the PMIC that would be providing power supply, like on the
546+ * two cases below:
547+ *
548+ * The ECS E7 board drives camera 2.8v from an external regulator
549+ * instead of the PMIC. There's a gmin_CamV2P8 config variable
550+ * that specifies the GPIO to handle this particular case,
551+ * but this needs a broader architecture for handling camera power.
552+ *
553+ * The CHT RVP board drives camera 1.8v from an* external regulator
554+ * instead of the PMIC just like ECS E7 board.
555+ */
483556
484− if (power) {
485− gmin_subdevs[i].pwm_i2c_addr = power->addr;
557+ gs->v1p8_gpio = gmin_get_var_int(dev, true, "V1P8GPIO", -1);
558+ gs->v2p8_gpio = gmin_get_var_int(dev, true, "V2P8GPIO", -1);
559+
560+ /*
561+ * FIXME:
562+ *
563+ * The ACPI handling code checks for the _PR? tables in order to
564+ * know what is required to switch the device from power state
565+ * D0 (_PR0) up to D3COLD (_PR3).
566+ *
567+ * The adev->flags.power_manageable is set to true if the device
568+ * has a _PR0 table, which can be checked by calling
569+ * acpi_device_power_manageable(adev).
570+ *
571+ * However, this only says that the device can be set to power off
572+ * mode.
573+ *
574+ * At least on the DSDT tables we've seen so far, there's no _PR3,
575+ * nor _PS3 (which would have a somewhat similar effect).
576+ * So, using ACPI for power management won't work, except if adding
577+ * an ACPI override logic somewhere.
578+ *
579+ * So, at least for the existing devices we know, the check below
580+ * will always be false.
581+ */
582+ if (acpi_device_can_wakeup(adev) &&
583+ acpi_device_can_poweroff(adev)) {
486584 dev_info(dev,
487− "gmin: power management provided via %s (i2c addr 0x%02x)\n",
488− pmic_name[pmic_id], power->addr);
489− } else {
490− dev_info(dev, "gmin: power management provided via %s\n",
491− pmic_name[pmic_id]);
585+ "gmin: power management provided via device PM\n");
586+ return 0;
492587 }
493588
494− gmin_subdevs[i].subdev = subdev;
495− gmin_subdevs[i].clock_num = gmin_get_var_int(dev, false, "CamClk", 0);
496− /*WA:CHT requires XTAL clock as PLL is not stable.*/
497− gmin_subdevs[i].clock_src = gmin_get_var_int(dev, false, "ClkSrc",
498− VLV2_CLK_PLL_19P2MHZ);
499− gmin_subdevs[i].csi_port = gmin_get_var_int(dev, false, "CsiPort", 0);
500− gmin_subdevs[i].csi_lanes = gmin_get_var_int(dev, false, "CsiLanes", 1);
589+ /*
590+ * The code below is here due to backward compatibility with devices
591+ * whose ACPI BIOS may not contain everything that would be needed
592+ * in order to set clocks and do power management.
593+ */
594+
595+ /*
596+ * According with :
597+ * https://github.com/projectceladon/hardware-intel-kernelflinger/blob/master/doc/fastboot.md
598+ *
599+ * The "CamClk" EFI var is set via fastboot on some Android devices,
600+ * and seems to contain the number of the clock used to feed the
601+ * sensor.
602+ *
603+ * On systems with a proper ACPI table, this is given via the _PR0
604+ * power resource table. The logic below should first check if there
605+ * is a power resource already, falling back to the EFI vars detection
606+ * otherwise.
607+ */
501608
502− /* get PMC clock with clock framework */
503− snprintf(gmin_pmc_clk_name,
504− sizeof(gmin_pmc_clk_name),
505− "%s_%d", "pmc_plt_clk", gmin_subdevs[i].clock_num);
609+ /* Try first to use ACPI to get the clock resource */
610+ if (acpi_device_power_manageable(adev))
611+ clock_num = atomisp_get_acpi_power(dev);
506612
507− gmin_subdevs[i].pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);
508− if (IS_ERR(gmin_subdevs[i].pmc_clk)) {
509− ret = PTR_ERR(gmin_subdevs[i].pmc_clk);
613+ /* Fall-back use EFI and/or DMI match */
614+ if (clock_num < 0)
615+ clock_num = gmin_get_var_int(dev, false, "CamClk", 0);
510616
511− dev_err(dev,
512− "Failed to get clk from %s : %d\n",
513− gmin_pmc_clk_name,
514− ret);
617+ if (clock_num < 0 || clock_num > MAX_CLK_COUNT) {
618+ dev_err(dev, "Invalid clock number\n");
619+ return -EINVAL;
620+ }
515621
516− return NULL;
622+ snprintf(gmin_pmc_clk_name, sizeof(gmin_pmc_clk_name),
623+ "%s_%d", "pmc_plt_clk", clock_num);
624+
625+ gs->pmc_clk = devm_clk_get(dev, gmin_pmc_clk_name);
626+ if (IS_ERR(gs->pmc_clk)) {
627+ ret = PTR_ERR(gs->pmc_clk);
628+ dev_err(dev, "Failed to get clk from %s: %d\n", gmin_pmc_clk_name, ret);
629+ return ret;
517630 }
631+ dev_info(dev, "Will use CLK%d (%s)\n", clock_num, gmin_pmc_clk_name);
518632
519633 /*
520634 * The firmware might enable the clock at
@@ -526,25 +640,17 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) · 5 unmodified lines
526640 * to disable a clock that has not been enabled,
527641 * we need to enable the clock first.
528642 */
529− ret = clk_prepare_enable(gmin_subdevs[i].pmc_clk);
643+ ret = clk_prepare_enable(gs->pmc_clk);
530644 if (!ret)
531− clk_disable_unprepare(gmin_subdevs[i].pmc_clk);
532−
533− gmin_subdevs[i].gpio0 = gpiod_get_index(dev, NULL, 0, GPIOD_OUT_LOW);
534− if (IS_ERR(gmin_subdevs[i].gpio0))
535− gmin_subdevs[i].gpio0 = NULL;
536−
537− gmin_subdevs[i].gpio1 = gpiod_get_index(dev, NULL, 1, GPIOD_OUT_LOW);
538− if (IS_ERR(gmin_subdevs[i].gpio1))
539− gmin_subdevs[i].gpio1 = NULL;
645+ clk_disable_unprepare(gs->pmc_clk);
540646
541647 switch (pmic_id) {
542648 case PMIC_REGULATOR:
543− gmin_subdevs[i].v1p8_reg = regulator_get(dev, "V1P8SX");
544− gmin_subdevs[i].v2p8_reg = regulator_get(dev, "V2P8SX");
649+ gs->v1p8_reg = regulator_get(dev, "V1P8SX");
650+ gs->v2p8_reg = regulator_get(dev, "V2P8SX");
545651
546− gmin_subdevs[i].v1p2_reg = regulator_get(dev, "V1P2A");
547− gmin_subdevs[i].v2p8_vcm_reg = regulator_get(dev, "VPROG4B");
652+ gs->v1p2_reg = regulator_get(dev, "V1P2A");
653+ gs->v2p8_vcm_reg = regulator_get(dev, "VPROG4B");
548654
549655 /* Note: ideally we would initialize v[12]p8_on to the
550656 * output of regulator_is_enabled(), but sadly that
@@ -556,32 +662,31 @@ static struct gmin_subdev *gmin_subdev_add(struct v4l2_subdev *subdev) · 5 unmodified lines
556662 break;
557663
558664 case PMIC_AXP:
559− gmin_subdevs[i].eldo1_1p8v = gmin_get_var_int(dev, false,
560− "eldo1_1p8v",
561− ELDO1_1P8V);
562− gmin_subdevs[i].eldo1_sel_reg = gmin_get_var_int(dev, false,
563− "eldo1_sel_reg",
564− ELDO1_SEL_REG);
565− gmin_subdevs[i].eldo1_ctrl_shift = gmin_get_var_int(dev, false,
566− "eldo1_ctrl_shift",
567− ELDO1_CTRL_SHIFT);
568− gmin_subdevs[i].eldo2_1p8v = gmin_get_var_int(dev, false,
569− "eldo2_1p8v",
570− ELDO2_1P8V);
571− gmin_subdevs[i].eldo2_sel_reg = gmin_get_var_int(dev, false,
572− "eldo2_sel_reg",
573− ELDO2_SEL_REG);
574− gmin_subdevs[i].eldo2_ctrl_shift = gmin_get_var_int(dev, false,
575− "eldo2_ctrl_shift",
576− ELDO2_CTRL_SHIFT);
577− gmin_subdevs[i].pwm_i2c_addr = power->addr;
665+ gs->eldo1_1p8v = gmin_get_var_int(dev, false,
666+ "eldo1_1p8v",
667+ ELDO1_1P8V);
668+ gs->eldo1_sel_reg = gmin_get_var_int(dev, false,
669+ "eldo1_sel_reg",
670+ ELDO1_SEL_REG);
671+ gs->eldo1_ctrl_shift = gmin_get_var_int(dev, false,
672+ "eldo1_ctrl_shift",
673+ ELDO1_CTRL_SHIFT);
674+ gs->eldo2_1p8v = gmin_get_var_int(dev, false,
675+ "eldo2_1p8v",
676+ ELDO2_1P8V);
677+ gs->eldo2_sel_reg = gmin_get_var_int(dev, false,
678+ "eldo2_sel_reg",
679+ ELDO2_SEL_REG);
680+ gs->eldo2_ctrl_shift = gmin_get_var_int(dev, false,
681+ "eldo2_ctrl_shift",
682+ ELDO2_CTRL_SHIFT);
578683 break;
579684
580685 default:
581686 break;
582687 }
583688
584− return &gmin_subdevs[i];
689+ return 0;
585690 }
586691
587692 static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev)
@@ -591,7 +696,17 @@ static struct gmin_subdev *find_gmin_subdev(struct v4l2_subdev *subdev) · 3 unmodified lines
591696 for (i = 0; i < MAX_SUBDEVS; i++)
592697 if (gmin_subdevs[i].subdev == subdev)
593698 return &gmin_subdevs[i];
594− return gmin_subdev_add(subdev);
699+ return NULL;
700+}
701+
702+static struct gmin_subdev *find_free_gmin_subdev_slot(void)
703+{
704+ unsigned int i;
705+
706+ for (i = 0; i < MAX_SUBDEVS; i++)
707+ if (gmin_subdevs[i].subdev == NULL)
708+ return &gmin_subdevs[i];
709+ return NULL;
595710 }
596711
597712 static int axp_regulator_set(struct device *dev, struct gmin_subdev *gs,
@@ -700,32 +815,24 @@ static int gmin_v1p8_ctrl(struct v4l2_subdev *subdev, int on) · 102 unmodified lines
700815 {
701816 struct gmin_subdev *gs = find_gmin_subdev(subdev);
702817 int ret;
703− struct device *dev;
704− struct i2c_client *client = v4l2_get_subdevdata(subdev);
705818 int value;
706819
707− dev = &client->dev;
708−
709− if (v1p8_gpio == V1P8_GPIO_UNSET) {
710− v1p8_gpio = gmin_get_var_int(dev, true,
711− "V1P8GPIO", V1P8_GPIO_NONE);
712− if (v1p8_gpio != V1P8_GPIO_NONE) {
713− pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n",
714− v1p8_gpio);
715− ret = gpio_request(v1p8_gpio, "camera_v1p8_en");
716− if (!ret)
717− ret = gpio_direction_output(v1p8_gpio, 0);
718− if (ret)
719− pr_err("V1P8 GPIO initialization failed\n");
720− }
820+ if (gs->v1p8_gpio >= 0) {
821+ pr_info("atomisp_gmin_platform: 1.8v power on GPIO %d\n",
822+ gs->v1p8_gpio);
823+ ret = gpio_request(gs->v1p8_gpio, "camera_v1p8_en");
824+ if (!ret)
825+ ret = gpio_direction_output(gs->v1p8_gpio, 0);
826+ if (ret)
827+ pr_err("V1P8 GPIO initialization failed\n");
721828 }
722829
723830 if (!gs || gs->v1p8_on == on)
724831 return 0;
725832 gs->v1p8_on = on;
726833
727− if (v1p8_gpio >= 0)
728− gpio_set_value(v1p8_gpio, on);
834+ if (gs->v1p8_gpio >= 0)
835+ gpio_set_value(gs->v1p8_gpio, on);
729836
730837 if (gs->v1p8_reg) {
731838 regulator_set_voltage(gs->v1p8_reg, 1800000, 1800000);
@@ -762,32 +869,24 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) · 30 unmodified lines
762869 {
763870 struct gmin_subdev *gs = find_gmin_subdev(subdev);
764871 int ret;
765− struct device *dev;
766− struct i2c_client *client = v4l2_get_subdevdata(subdev);
767872 int value;
768873
769− dev = &client->dev;
770−
771− if (v2p8_gpio == V2P8_GPIO_UNSET) {
772− v2p8_gpio = gmin_get_var_int(dev, true,
773− "V2P8GPIO", V2P8_GPIO_NONE);
774− if (v2p8_gpio != V2P8_GPIO_NONE) {
775− pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n",
776− v2p8_gpio);
777− ret = gpio_request(v2p8_gpio, "camera_v2p8");
778− if (!ret)
779− ret = gpio_direction_output(v2p8_gpio, 0);
780− if (ret)
781− pr_err("V2P8 GPIO initialization failed\n");
782− }
874+ if (gs->v2p8_gpio >= 0) {
875+ pr_info("atomisp_gmin_platform: 2.8v power on GPIO %d\n",
876+ gs->v2p8_gpio);
877+ ret = gpio_request(gs->v2p8_gpio, "camera_v2p8");
878+ if (!ret)
879+ ret = gpio_direction_output(gs->v2p8_gpio, 0);
880+ if (ret)
881+ pr_err("V2P8 GPIO initialization failed\n");
783882 }
784883
785884 if (!gs || gs->v2p8_on == on)
786885 return 0;
787886 gs->v2p8_on = on;
788887
789− if (v2p8_gpio >= 0)
790− gpio_set_value(v2p8_gpio, on);
888+ if (gs->v2p8_gpio >= 0)
889+ gpio_set_value(gs->v2p8_gpio, on);
791890
792891 if (gs->v2p8_reg) {
793892 regulator_set_voltage(gs->v2p8_reg, 2900000, 2900000);
@@ -819,6 +918,37 @@ static int gmin_v2p8_ctrl(struct v4l2_subdev *subdev, int on) · 25 unmodified lines
819918 return -EINVAL;
820919 }
821920
921+static int gmin_acpi_pm_ctrl(struct v4l2_subdev *subdev, int on)
922+{
923+ int ret = 0;
924+ struct gmin_subdev *gs = find_gmin_subdev(subdev);
925+ struct i2c_client *client = v4l2_get_subdevdata(subdev);
926+ struct acpi_device *adev = ACPI_COMPANION(&client->dev);
927+
928+ /* Use the ACPI power management to control it */
929+ on = !!on;
930+ if (gs->clock_on == on)
931+ return 0;
932+
933+ dev_dbg(subdev->dev, "Setting power state to %s\n",
934+ on ? "on" : "off");
935+
936+ if (on)
937+ ret = acpi_device_set_power(adev,
938+ ACPI_STATE_D0);
939+ else
940+ ret = acpi_device_set_power(adev,
941+ ACPI_STATE_D3_COLD);
942+
943+ if (!ret)
944+ gs->clock_on = on;
945+ else
946+ dev_err(subdev->dev, "Couldn't set power state to %s\n",
947+ on ? "on" : "off");
948+
949+ return ret;
950+}
951+
822952 static int gmin_flisclk_ctrl(struct v4l2_subdev *subdev, int on)
823953 {
824954 int ret = 0;
@@ -884,7 +1014,7 @@ static struct camera_vcm_control *gmin_get_vcm_ctrl(struct v4l2_subdev *subdev, · 59 unmodified lines
8841014 return NULL;
8851015 }
8861016
887−static struct camera_sensor_platform_data gmin_plat = {
1017+static struct camera_sensor_platform_data pmic_gmin_plat = {
8881018 .gpio0_ctrl = gmin_gpio0_ctrl,
8891019 .gpio1_ctrl = gmin_gpio1_ctrl,
8901020 .v1p8_ctrl = gmin_v1p8_ctrl,
@@ -895,17 +1025,36 @@ static struct camera_sensor_platform_data gmin_plat = { · 4 unmodified lines
8951025 .get_vcm_ctrl = gmin_get_vcm_ctrl,
8961026 };
8971027
1028+static struct camera_sensor_platform_data acpi_gmin_plat = {
1029+ .gpio0_ctrl = gmin_gpio0_ctrl,
1030+ .gpio1_ctrl = gmin_gpio1_ctrl,
1031+ .v1p8_ctrl = gmin_acpi_pm_ctrl,
1032+ .v2p8_ctrl = gmin_acpi_pm_ctrl,
1033+ .v1p2_ctrl = gmin_acpi_pm_ctrl,
1034+ .flisclk_ctrl = gmin_acpi_pm_ctrl,
1035+ .csi_cfg = gmin_csi_cfg,
1036+ .get_vcm_ctrl = gmin_get_vcm_ctrl,
1037+};
1038+
8981039 struct camera_sensor_platform_data *gmin_camera_platform_data(
8991040 struct v4l2_subdev *subdev,
9001041 enum atomisp_input_format csi_format,
9011042 enum atomisp_bayer_order csi_bayer)
9021043 {
903− struct gmin_subdev *gs = find_gmin_subdev(subdev);
1044+ u8 pmic_i2c_addr = gmin_detect_pmic(subdev);
1045+ struct gmin_subdev *gs;
9041046
1047+ gs = find_free_gmin_subdev_slot();
1048+ gs->subdev = subdev;
9051049 gs->csi_fmt = csi_format;
9061050 gs->csi_bayer = csi_bayer;
1051+ gs->pwm_i2c_addr = pmic_i2c_addr;
9071052
908− return &gmin_plat;
1053+ gmin_subdev_add(gs);
1054+ if (gs->pmc_clk)
1055+ return &pmic_gmin_plat;
1056+ else
1057+ return &acpi_gmin_plat;
9091058 }
9101059 EXPORT_SYMBOL_GPL(gmin_camera_platform_data);
9111060
@@ -957,12 +1106,28 @@ static int gmin_get_config_dsm_var(struct device *dev, · 45 unmodified lines
9571106 union acpi_object *obj, *cur = NULL;
9581107 int i;
9591108
1109+ /*
1110+ * The data reported by "CamClk" seems to be either 0 or 1 at the
1111+ * _DSM table.
1112+ *
1113+ * At the ACPI tables we looked so far, this is not related to the
1114+ * actual clock source for the sensor, which is given by the
1115+ * _PR0 ACPI table. So, ignore it, as otherwise this will be
1116+ * set to a wrong value.
1117+ */
1118+ if (!strcmp(var, "CamClk"))
1119+ return -EINVAL;
1120+
9601121 obj = acpi_evaluate_dsm(handle, &atomisp_dsm_guid, 0, 0, NULL);
9611122 if (!obj) {
9621123 dev_info_once(dev, "Didn't find ACPI _DSM table.\n");
9631124 return -EINVAL;
9641125 }
9651126
1127+ /* Return on unexpected object type */
1128+ if (obj->type != ACPI_TYPE_PACKAGE)
1129+ return -EINVAL;
1130+
9661131 #if 0 /* Just for debugging purposes */
9671132 for (i = 0; i < obj->package.count; i++) {
9681133 union acpi_object *cur = &obj->package.elements[i];
@@ -1155,10 +1320,10 @@ EXPORT_SYMBOL_GPL(camera_sensor_csi); · 186 unmodified lines
11551320 * trying. The driver itself does direct calls to the PUNIT to manage
11561321 * ISP power.
11571322 */
1158−static void isp_pm_cap_fixup(struct pci_dev *dev)
1323+static void isp_pm_cap_fixup(struct pci_dev *pdev)
11591324 {
1160− dev_info(&dev->dev, "Disabling PCI power management on camera ISP\n");
1161− dev->pm_cap = 0;
1325+ dev_info(&pdev->dev, "Disabling PCI power management on camera ISP\n");
1326+ pdev->pm_cap = 0;
11621327 }
11631328 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0f38, isp_pm_cap_fixup);
11641329
drivers/staging/media/atomisp/pci/atomisp_internal.h+1−1
@@ -216,12 +216,12 @@ struct atomisp_sw_contex { · 215 unmodified lines
216216 * ci device struct
217217 */
218218 struct atomisp_device {
219− struct pci_dev *pdev;
220219 struct device *dev;
221220 struct v4l2_device v4l2_dev;
222221 struct media_device media_dev;
223222 struct atomisp_platform_data *pdata;
224223 void *mmu_l1_base;
224+ void __iomem *base;
225225 const struct firmware *firmware;
226226
227227 struct pm_qos_request pm_qos;
drivers/staging/media/atomisp/pci/atomisp_ioctl.c+9−10
@@ -549,8 +549,7 @@ static int atomisp_querycap(struct file *file, void *fh, · 548 unmodified lines
549549
550550 strscpy(cap->driver, DRIVER, sizeof(cap->driver));
551551 strscpy(cap->card, CARD, sizeof(cap->card));
552− snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
553− pci_name(isp->pdev));
552+ snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s", dev_name(isp->dev));
554553
555554 return 0;
556555 }
@@ -1635,6 +1634,7 @@ static int atomisp_streamon(struct file *file, void *fh, · 1078 unmodified lines
16351634 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
16361635 struct atomisp_sub_device *asd = pipe->asd;
16371636 struct atomisp_device *isp = video_get_drvdata(vdev);
1637+ struct pci_dev *pdev = to_pci_dev(isp->dev);
16381638 enum ia_css_pipe_id css_pipe_id;
16391639 unsigned int sensor_start_stream;
16401640 unsigned int wdt_duration = ATOMISP_ISP_TIMEOUT_DURATION;
@@ -1844,9 +1844,8 @@ start_sensor: · 203 unmodified lines
18441844 /* Enable the CSI interface on ANN B0/K0 */
18451845 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
18461846 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
1847− pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,
1848− isp->saved_regs.csi_control |
1849− MRFLD_PCI_CSI_CONTROL_CSI_READY);
1847+ pci_write_config_word(pdev, MRFLD_PCI_CSI_CONTROL,
1848+ isp->saved_regs.csi_control | MRFLD_PCI_CSI_CONTROL_CSI_READY);
18501849 }
18511850
18521851 /* stream on the sensor */
@@ -1891,6 +1890,7 @@ int __atomisp_streamoff(struct file *file, void *fh, enum v4l2_buf_type type) · 38 unmodified lines
18911890 {
18921891 struct video_device *vdev = video_devdata(file);
18931892 struct atomisp_device *isp = video_get_drvdata(vdev);
1893+ struct pci_dev *pdev = to_pci_dev(isp->dev);
18941894 struct atomisp_video_pipe *pipe = atomisp_to_video_pipe(vdev);
18951895 struct atomisp_sub_device *asd = pipe->asd;
18961896 struct atomisp_video_pipe *capture_pipe = NULL;
@@ -2076,9 +2076,8 @@ stopsensor: · 179 unmodified lines
20762076 /* Disable the CSI interface on ANN B0/K0 */
20772077 if (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
20782078 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)) {
2079− pci_write_config_word(isp->pdev, MRFLD_PCI_CSI_CONTROL,
2080− isp->saved_regs.csi_control &
2081− ~MRFLD_PCI_CSI_CONTROL_CSI_READY);
2079+ pci_write_config_word(pdev, MRFLD_PCI_CSI_CONTROL,
2080+ isp->saved_regs.csi_control & ~MRFLD_PCI_CSI_CONTROL_CSI_READY);
20822081 }
20832082
20842083 if (atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, false))
@@ -2111,8 +2110,8 @@ stopsensor: · 26 unmodified lines
21112110 }
21122111
21132112 /* disable PUNIT/ISP acknowlede/handshake - SRSE=3 */
2114− pci_write_config_dword(isp->pdev, PCI_I_CONTROL, isp->saved_regs.i_control |
2115− MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
2113+ pci_write_config_dword(pdev, PCI_I_CONTROL,
2114+ isp->saved_regs.i_control | MRFLD_PCI_I_CONTROL_SRSE_RESET_MASK);
21162115 dev_err(isp->dev, "atomisp_reset");
21172116 atomisp_reset(isp);
21182117 for (i = 0; i < isp->num_of_streams; i++) {
drivers/staging/media/atomisp/pci/atomisp_v4l2.c+127−158
@@ -127,8 +127,6 @@ MODULE_PARM_DESC(pad_h, "extra data for ISP processing"); · 126 unmodified lines
127127
128128 struct device *atomisp_dev;
129129
130−void __iomem *atomisp_io_base;
131−
132130 static const struct atomisp_freq_scaling_rule dfs_rules_merr[] = {
133131 {
134132 .width = ISP_FREQ_RULE_ANY,
@@ -512,30 +510,27 @@ void atomisp_acc_unregister(struct atomisp_acc_pipe *video) · 377 unmodified lines
512510
513511 static int atomisp_save_iunit_reg(struct atomisp_device *isp)
514512 {
515− struct pci_dev *dev = isp->pdev;
513+ struct pci_dev *pdev = to_pci_dev(isp->dev);
516514
517515 dev_dbg(isp->dev, "%s\n", __func__);
518516
519− pci_read_config_word(dev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
517+ pci_read_config_word(pdev, PCI_COMMAND, &isp->saved_regs.pcicmdsts);
520518 /* isp->saved_regs.ispmmadr is set from the atomisp_pci_probe() */
521− pci_read_config_dword(dev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
522− pci_read_config_dword(dev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
523− pci_read_config_word(dev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
524− pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
525− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL,
526− &isp->saved_regs.interrupt_control);
527−
528− pci_read_config_dword(dev, MRFLD_PCI_PMCS,
529− &isp->saved_regs.pmcs);
519+ pci_read_config_dword(pdev, PCI_MSI_CAPID, &isp->saved_regs.msicap);
520+ pci_read_config_dword(pdev, PCI_MSI_ADDR, &isp->saved_regs.msi_addr);
521+ pci_read_config_word(pdev, PCI_MSI_DATA, &isp->saved_regs.msi_data);
522+ pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &isp->saved_regs.intr);
523+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &isp->saved_regs.interrupt_control);
524+
525+ pci_read_config_dword(pdev, MRFLD_PCI_PMCS, &isp->saved_regs.pmcs);
530526 /* Ensure read/write combining is enabled. */
531− pci_read_config_dword(dev, PCI_I_CONTROL,
532− &isp->saved_regs.i_control);
527+ pci_read_config_dword(pdev, PCI_I_CONTROL, &isp->saved_regs.i_control);
533528 isp->saved_regs.i_control |=
534529 MRFLD_PCI_I_CONTROL_ENABLE_READ_COMBINING |
535530 MRFLD_PCI_I_CONTROL_ENABLE_WRITE_COMBINING;
536− pci_read_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
531+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
537532 &isp->saved_regs.csi_access_viol);
538− pci_read_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
533+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
539534 &isp->saved_regs.csi_rcomp_config);
540535 /*
541536 * Hardware bugs require setting CSI_HS_OVR_CLK_GATE_ON_UPDATE.
@@ -545,65 +540,58 @@ static int atomisp_save_iunit_reg(struct atomisp_device *isp) · 3 unmodified lines
545540 * is missed, and IUNIT can hang.
546541 * For both issues, setting this bit is a workaround.
547542 */
548− isp->saved_regs.csi_rcomp_config |=
549− MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
550− pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
543+ isp->saved_regs.csi_rcomp_config |= MRFLD_PCI_CSI_HS_OVR_CLK_GATE_ON_UPDATE;
544+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
551545 &isp->saved_regs.csi_afe_dly);
552− pci_read_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
546+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
553547 &isp->saved_regs.csi_control);
554548 if (isp->media_dev.hw_revision >=
555549 (ATOMISP_HW_REVISION_ISP2401 << ATOMISP_HW_REVISION_SHIFT))
556− isp->saved_regs.csi_control |=
557− MRFLD_PCI_CSI_CONTROL_PARPATHEN;
550+ isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_PARPATHEN;
558551 /*
559552 * On CHT CSI_READY bit should be enabled before stream on
560553 */
561554 if (IS_CHT && (isp->media_dev.hw_revision >= ((ATOMISP_HW_REVISION_ISP2401 <<
562555 ATOMISP_HW_REVISION_SHIFT) | ATOMISP_HW_STEPPING_B0)))
563− isp->saved_regs.csi_control |=
564− MRFLD_PCI_CSI_CONTROL_CSI_READY;
565− pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
556+ isp->saved_regs.csi_control |= MRFLD_PCI_CSI_CONTROL_CSI_READY;
557+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
566558 &isp->saved_regs.csi_afe_rcomp_config);
567− pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
559+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
568560 &isp->saved_regs.csi_afe_hs_control);
569− pci_read_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
561+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
570562 &isp->saved_regs.csi_deadline_control);
571563 return 0;
572564 }
573565
574566 static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp)
575567 {
576− struct pci_dev *dev = isp->pdev;
568+ struct pci_dev *pdev = to_pci_dev(isp->dev);
577569
578570 dev_dbg(isp->dev, "%s\n", __func__);
579571
580− pci_write_config_word(dev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
581− pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
582− isp->saved_regs.ispmmadr);
583− pci_write_config_dword(dev, PCI_MSI_CAPID, isp->saved_regs.msicap);
584− pci_write_config_dword(dev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
585− pci_write_config_word(dev, PCI_MSI_DATA, isp->saved_regs.msi_data);
586− pci_write_config_byte(dev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
587− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL,
588− isp->saved_regs.interrupt_control);
589− pci_write_config_dword(dev, PCI_I_CONTROL,
590− isp->saved_regs.i_control);
591−
592− pci_write_config_dword(dev, MRFLD_PCI_PMCS,
593− isp->saved_regs.pmcs);
594− pci_write_config_dword(dev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
572+ pci_write_config_word(pdev, PCI_COMMAND, isp->saved_regs.pcicmdsts);
573+ pci_write_config_dword(pdev, PCI_BASE_ADDRESS_0, isp->saved_regs.ispmmadr);
574+ pci_write_config_dword(pdev, PCI_MSI_CAPID, isp->saved_regs.msicap);
575+ pci_write_config_dword(pdev, PCI_MSI_ADDR, isp->saved_regs.msi_addr);
576+ pci_write_config_word(pdev, PCI_MSI_DATA, isp->saved_regs.msi_data);
577+ pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, isp->saved_regs.intr);
578+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, isp->saved_regs.interrupt_control);
579+ pci_write_config_dword(pdev, PCI_I_CONTROL, isp->saved_regs.i_control);
580+
581+ pci_write_config_dword(pdev, MRFLD_PCI_PMCS, isp->saved_regs.pmcs);
582+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_ACCESS_CTRL_VIOL,
595583 isp->saved_regs.csi_access_viol);
596− pci_write_config_dword(dev, MRFLD_PCI_CSI_RCOMP_CONTROL,
584+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_RCOMP_CONTROL,
597585 isp->saved_regs.csi_rcomp_config);
598− pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
586+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
599587 isp->saved_regs.csi_afe_dly);
600− pci_write_config_dword(dev, MRFLD_PCI_CSI_CONTROL,
588+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL,
601589 isp->saved_regs.csi_control);
602− pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
590+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_RCOMP_CONTROL,
603591 isp->saved_regs.csi_afe_rcomp_config);
604− pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
592+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_HS_CONTROL,
605593 isp->saved_regs.csi_afe_hs_control);
606− pci_write_config_dword(dev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
594+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_DEADLINE_CONTROL,
607595 isp->saved_regs.csi_deadline_control);
608596
609597 /*
@@ -619,7 +607,7 @@ static int __maybe_unused atomisp_restore_iunit_reg(struct atomisp_device *isp) · 9 unmodified lines
619607
620608 static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp)
621609 {
622− struct pci_dev *dev = isp->pdev;
610+ struct pci_dev *pdev = to_pci_dev(isp->dev);
623611 u32 irq;
624612 unsigned long flags;
625613
@@ -635,11 +623,11 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) · 9 unmodified lines
635623 * So, here we need to check if there is any pending
636624 * IRQ, if so, waiting for it to be served
637625 */
638− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
626+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
639627 irq = irq & 1 << INTR_IIR;
640− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
628+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
641629
642− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
630+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
643631 if (!(irq & (1 << INTR_IIR)))
644632 goto done;
645633
@@ -652,11 +640,11 @@ static int atomisp_mrfld_pre_power_down(struct atomisp_device *isp) · 6 unmodified lines
652640 spin_unlock_irqrestore(&isp->lock, flags);
653641 return -EAGAIN;
654642 } else {
655− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
643+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
656644 irq = irq & 1 << INTR_IIR;
657− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
645+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
658646
659− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
647+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
660648 if (!(irq & (1 << INTR_IIR))) {
661649 atomisp_css2_hw_store_32(MRFLD_INTR_ENABLE_REG, 0x0);
662650 goto done;
@@ -675,11 +663,11 @@ done: · 12 unmodified lines
675663 * to IIR. It could block subsequent interrupt messages.
676664 * HW sighting:4568410.
677665 */
678− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
666+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
679667 irq &= ~(1 << INTR_IER);
680− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
668+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
681669
682− atomisp_msi_irq_uninit(isp, dev);
670+ atomisp_msi_irq_uninit(isp);
683671 atomisp_freq_scaling(isp, ATOMISP_DFS_MODE_LOW, true);
684672 spin_unlock_irqrestore(&isp->lock, flags);
685673
@@ -755,7 +743,7 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) · 69 unmodified lines
755743
756744 /* Wait until ISPSSPM0 bit[25:24] shows the right value */
757745 iosf_mbi_read(BT_MBI_UNIT_PMC, MBI_REG_READ, MRFLD_ISPSSPM0, &tmp);
758− tmp = (tmp & MRFLD_ISPSSPM0_ISPSSC_MASK) >> MRFLD_ISPSSPM0_ISPSSS_OFFSET;
746+ tmp = (tmp >> MRFLD_ISPSSPM0_ISPSSS_OFFSET) & MRFLD_ISPSSPM0_ISPSSC_MASK;
759747 if (tmp == val) {
760748 trace_ipu_cstate(enable);
761749 return 0;
@@ -778,15 +766,13 @@ static int atomisp_mrfld_power(struct atomisp_device *isp, bool enable) · 16 unmodified lines
778766 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
779767 int atomisp_mrfld_power_down(struct atomisp_device *isp)
780768 {
781−// FIXME: at least with ISP2401, enabling this code causes the driver to break
782− return 0 && atomisp_mrfld_power(isp, false);
769+ return atomisp_mrfld_power(isp, false);
783770 }
784771
785772 /* Workaround for pmu_nc_set_power_state not ready in MRFLD */
786773 int atomisp_mrfld_power_up(struct atomisp_device *isp)
787774 {
788−// FIXME: at least with ISP2401, enabling this code causes the driver to break
789− return 0 && atomisp_mrfld_power(isp, true);
775+ return atomisp_mrfld_power(isp, true);
790776 }
791777
792778 int atomisp_runtime_suspend(struct device *dev)
@@ -902,6 +888,7 @@ static int __maybe_unused atomisp_resume(struct device *dev) · 109 unmodified lines
902888
903889 int atomisp_csi_lane_config(struct atomisp_device *isp)
904890 {
891+ struct pci_dev *pdev = to_pci_dev(isp->dev);
905892 static const struct {
906893 u8 code;
907894 u8 lanes[MRFLD_PORT_NUM];
@@ -1003,7 +990,7 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) · 95 unmodified lines
1003990 return -EINVAL;
1004991 }
1005992
1006− pci_read_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
993+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, &csi_control);
1007994 csi_control &= ~port_config_mask;
1008995 csi_control |= (portconfigs[i].code << MRFLD_PORT_CONFIGCODE_SHIFT)
1009996 | (portconfigs[i].lanes[0] ? 0 : (1 << MRFLD_PORT1_ENABLE_SHIFT))
@@ -1013,7 +1000,7 @@ int atomisp_csi_lane_config(struct atomisp_device *isp) · 3 unmodified lines
10131000 | (((1 << portconfigs[i].lanes[1]) - 1) << MRFLD_PORT2_LANES_SHIFT)
10141001 | (((1 << portconfigs[i].lanes[2]) - 1) << port3_lanes_shift);
10151002
1016− pci_write_config_dword(isp->pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
1003+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_CONTROL, csi_control);
10171004
10181005 dev_dbg(isp->dev,
10191006 "%s: the portconfig is %d-%d-%d, CSI_CONTROL is 0x%08X\n",
@@ -1440,8 +1427,7 @@ atomisp_load_firmware(struct atomisp_device *isp) · 420 unmodified lines
14401427 * Check for flags the driver was compiled with against the PCI
14411428 * device. Always returns true on other than ISP 2400.
14421429 */
1443−static bool is_valid_device(struct pci_dev *dev,
1444− const struct pci_device_id *id)
1430+static bool is_valid_device(struct pci_dev *pdev, const struct pci_device_id *id)
14451431 {
14461432 unsigned int a0_max_id = 0;
14471433 const char *name;
@@ -1465,14 +1451,14 @@ static bool is_valid_device(struct pci_dev *dev, · 17 unmodified lines
14651451 name = "Cherrytrail";
14661452 break;
14671453 default:
1468− dev_err(&dev->dev, "%s: unknown device ID %x04:%x04\n",
1454+ dev_err(&pdev->dev, "%s: unknown device ID %x04:%x04\n",
14691455 product, id->vendor, id->device);
14701456 return false;
14711457 }
14721458
1473− if (dev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1474− dev_err(&dev->dev, "%s revision %d is not unsupported\n",
1475− name, dev->revision);
1459+ if (pdev->revision <= ATOMISP_PCI_REV_BYT_A0_MAX) {
1460+ dev_err(&pdev->dev, "%s revision %d is not unsupported\n",
1461+ name, pdev->revision);
14761462 return false;
14771463 }
14781464
@@ -1483,22 +1469,20 @@ static bool is_valid_device(struct pci_dev *dev, · 4 unmodified lines
14831469
14841470 #if defined(ISP2400)
14851471 if (IS_ISP2401) {
1486− dev_err(&dev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
1472+ dev_err(&pdev->dev, "Support for %s (ISP2401) was disabled at compile time\n",
14871473 name);
14881474 return false;
14891475 }
14901476 #else
14911477 if (!IS_ISP2401) {
1492− dev_err(&dev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
1478+ dev_err(&pdev->dev, "Support for %s (ISP2400) was disabled at compile time\n",
14931479 name);
14941480 return false;
14951481 }
14961482 #endif
14971483
1498− dev_info(&dev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1499− name, dev->revision,
1500− IS_ISP2401 ? '1' : '0',
1501− product);
1484+ dev_info(&pdev->dev, "Detected %s version %d (ISP240%c) on %s\n",
1485+ name, pdev->revision, IS_ISP2401 ? '1' : '0', product);
15021486
15031487 return true;
15041488 }
@@ -1538,66 +1522,60 @@ alloc_fail: · 33 unmodified lines
15381522
15391523 #define ATOM_ISP_PCI_BAR 0
15401524
1541−static int atomisp_pci_probe(struct pci_dev *dev,
1542− const struct pci_device_id *id)
1525+static int atomisp_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
15431526 {
15441527 const struct atomisp_platform_data *pdata;
15451528 struct atomisp_device *isp;
15461529 unsigned int start;
1547− void __iomem *base;
15481530 int err, val;
15491531 u32 irq;
15501532
1551− if (!is_valid_device(dev, id))
1533+ if (!is_valid_device(pdev, id))
15521534 return -ENODEV;
15531535
15541536 /* Pointer to struct device. */
1555− atomisp_dev = &dev->dev;
1537+ atomisp_dev = &pdev->dev;
15561538
15571539 pdata = atomisp_get_platform_data();
15581540 if (!pdata)
1559− dev_warn(&dev->dev, "no platform data available\n");
1541+ dev_warn(&pdev->dev, "no platform data available\n");
15601542
1561− err = pcim_enable_device(dev);
1543+ err = pcim_enable_device(pdev);
15621544 if (err) {
1563− dev_err(&dev->dev, "Failed to enable CI ISP device (%d)\n",
1564− err);
1545+ dev_err(&pdev->dev, "Failed to enable CI ISP device (%d)\n", err);
15651546 return err;
15661547 }
15671548
1568− start = pci_resource_start(dev, ATOM_ISP_PCI_BAR);
1569− dev_dbg(&dev->dev, "start: 0x%x\n", start);
1549+ start = pci_resource_start(pdev, ATOM_ISP_PCI_BAR);
1550+ dev_dbg(&pdev->dev, "start: 0x%x\n", start);
15701551
1571− err = pcim_iomap_regions(dev, 1 << ATOM_ISP_PCI_BAR, pci_name(dev));
1552+ err = pcim_iomap_regions(pdev, 1 << ATOM_ISP_PCI_BAR, pci_name(pdev));
15721553 if (err) {
1573− dev_err(&dev->dev, "Failed to I/O memory remapping (%d)\n",
1574− err);
1554+ dev_err(&pdev->dev, "Failed to I/O memory remapping (%d)\n", err);
15751555 goto ioremap_fail;
15761556 }
15771557
1578− base = pcim_iomap_table(dev)[ATOM_ISP_PCI_BAR];
1579− dev_dbg(&dev->dev, "base: %p\n", base);
1580−
1581− atomisp_io_base = base;
1582−
1583− dev_dbg(&dev->dev, "atomisp_io_base: %p\n", atomisp_io_base);
1584−
1585− isp = devm_kzalloc(&dev->dev, sizeof(struct atomisp_device), GFP_KERNEL);
1558+ isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
15861559 if (!isp) {
15871560 err = -ENOMEM;
15881561 goto atomisp_dev_alloc_fail;
15891562 }
1590− isp->pdev = dev;
1591− isp->dev = &dev->dev;
1563+
1564+ isp->dev = &pdev->dev;
1565+ isp->base = pcim_iomap_table(pdev)[ATOM_ISP_PCI_BAR];
15921566 isp->sw_contex.power_state = ATOM_ISP_POWER_UP;
15931567 isp->saved_regs.ispmmadr = start;
15941568
1569+ dev_dbg(&pdev->dev, "atomisp mmio base: %p\n", isp->base);
1570+
15951571 rt_mutex_init(&isp->mutex);
15961572 mutex_init(&isp->streamoff_mutex);
15971573 spin_lock_init(&isp->lock);
15981574
15991575 /* This is not a true PCI device on SoC, so the delay is not needed. */
1600− isp->pdev->d3_delay = 0;
1576+ pdev->d3_delay = 0;
1577+
1578+ pci_set_drvdata(pdev, isp);
16011579
16021580 switch (id->device & ATOMISP_PCI_DEVICE_SOC_MASK) {
16031581 case ATOMISP_PCI_DEVICE_SOC_MRFLD:
@@ -1648,15 +1626,14 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 44 unmodified lines
16481626 * have specs yet for exactly how it varies. Default to
16491627 * BYT-CR but let provisioning set it via EFI variable
16501628 */
1651− isp->hpll_freq = gmin_get_var_int(&dev->dev, false, "HpllFreq",
1652− HPLL_FREQ_2000MHZ);
1629+ isp->hpll_freq = gmin_get_var_int(&pdev->dev, false, "HpllFreq", HPLL_FREQ_2000MHZ);
16531630
16541631 /*
16551632 * for BYT/CHT we are put isp into D3cold to avoid pci registers access
16561633 * in power off. Set d3cold_delay to 0 since default 100ms is not
16571634 * necessary.
16581635 */
1659− isp->pdev->d3cold_delay = 0;
1636+ pdev->d3cold_delay = 0;
16601637 break;
16611638 case ATOMISP_PCI_DEVICE_SOC_ANN:
16621639 isp->media_dev.hw_revision = (
@@ -1666,7 +1643,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 3 unmodified lines
16661643 ATOMISP_HW_REVISION_ISP2401_LEGACY
16671644 #endif
16681645 << ATOMISP_HW_REVISION_SHIFT);
1669− isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1646+ isp->media_dev.hw_revision |= pdev->revision < 2 ?
16701647 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
16711648 isp->dfs = &dfs_config_merr;
16721649 isp->hpll_freq = HPLL_FREQ_1600MHZ;
@@ -1679,13 +1656,13 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
16791656 ATOMISP_HW_REVISION_ISP2401_LEGACY
16801657 #endif
16811658 << ATOMISP_HW_REVISION_SHIFT);
1682− isp->media_dev.hw_revision |= isp->pdev->revision < 2 ?
1659+ isp->media_dev.hw_revision |= pdev->revision < 2 ?
16831660 ATOMISP_HW_STEPPING_A0 : ATOMISP_HW_STEPPING_B0;
16841661
16851662 isp->dfs = &dfs_config_cht;
1686− isp->pdev->d3cold_delay = 0;
1663+ pdev->d3cold_delay = 0;
16871664
1688− iosf_mbi_read(CCK_PORT, MBI_REG_READ, CCK_FUSE_REG_0, &val);
1665+ iosf_mbi_read(BT_MBI_UNIT_CCK, MBI_REG_READ, CCK_FUSE_REG_0, &val);
16891666 switch (val & CCK_FUSE_HPLL_FREQ_MASK) {
16901667 case 0x00:
16911668 isp->hpll_freq = HPLL_FREQ_800MHZ;
@@ -1698,18 +1675,16 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
16981675 break;
16991676 default:
17001677 isp->hpll_freq = HPLL_FREQ_1600MHZ;
1701− dev_warn(isp->dev,
1702− "read HPLL from cck failed. Default to 1600 MHz.\n");
1678+ dev_warn(&pdev->dev, "read HPLL from cck failed. Default to 1600 MHz.\n");
17031679 }
17041680 break;
17051681 default:
1706− dev_err(&dev->dev, "un-supported IUNIT device\n");
1682+ dev_err(&pdev->dev, "un-supported IUNIT device\n");
17071683 err = -ENODEV;
17081684 goto atomisp_dev_alloc_fail;
17091685 }
17101686
1711− dev_info(&dev->dev, "ISP HPLL frequency base = %d MHz\n",
1712− isp->hpll_freq);
1687+ dev_info(&pdev->dev, "ISP HPLL frequency base = %d MHz\n", isp->hpll_freq);
17131688
17141689 isp->max_isr_latency = ATOMISP_MAX_ISR_LATENCY;
17151690
@@ -1718,30 +1693,28 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 2 unmodified lines
17181693 isp->firmware = atomisp_load_firmware(isp);
17191694 if (!isp->firmware) {
17201695 err = -ENOENT;
1721− dev_dbg(&dev->dev, "Firmware load failed\n");
1696+ dev_dbg(&pdev->dev, "Firmware load failed\n");
17221697 goto load_fw_fail;
17231698 }
17241699
1725− err = sh_css_check_firmware_version(isp->dev,
1726− isp->firmware->data);
1700+ err = sh_css_check_firmware_version(isp->dev, isp->firmware->data);
17271701 if (err) {
1728− dev_dbg(&dev->dev, "Firmware version check failed\n");
1702+ dev_dbg(&pdev->dev, "Firmware version check failed\n");
17291703 goto fw_validation_fail;
17301704 }
17311705 } else {
1732− dev_info(&dev->dev, "Firmware load will be deferred\n");
1706+ dev_info(&pdev->dev, "Firmware load will be deferred\n");
17331707 }
17341708
1735− pci_set_master(dev);
1736− pci_set_drvdata(dev, isp);
1709+ pci_set_master(pdev);
17371710
1738− err = pci_enable_msi(dev);
1711+ err = pci_enable_msi(pdev);
17391712 if (err) {
1740− dev_err(&dev->dev, "Failed to enable msi (%d)\n", err);
1713+ dev_err(&pdev->dev, "Failed to enable msi (%d)\n", err);
17411714 goto enable_msi_fail;
17421715 }
17431716
1744− atomisp_msi_irq_init(isp, dev);
1717+ atomisp_msi_irq_init(isp);
17451718
17461719 cpu_latency_qos_add_request(&isp->pm_qos, PM_QOS_DEFAULT_VALUE);
17471720
@@ -1762,8 +1735,7 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 14 unmodified lines
17621735 * Workaround for imbalance data eye issue which is observed
17631736 * on TNG B0.
17641737 */
1765− pci_read_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1766− &csi_afe_trim);
1738+ pci_read_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, &csi_afe_trim);
17671739 csi_afe_trim &= ~((MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
17681740 MRFLD_PCI_CSI1_HSRXCLKTRIM_SHIFT) |
17691741 (MRFLD_PCI_CSI_HSRXCLKTRIM_MASK <<
@@ -1776,20 +1748,18 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
17761748 MRFLD_PCI_CSI2_HSRXCLKTRIM_SHIFT) |
17771749 (MRFLD_PCI_CSI3_HSRXCLKTRIM <<
17781750 MRFLD_PCI_CSI3_HSRXCLKTRIM_SHIFT);
1779− pci_write_config_dword(dev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL,
1780− csi_afe_trim);
1751+ pci_write_config_dword(pdev, MRFLD_PCI_CSI_AFE_TRIM_CONTROL, csi_afe_trim);
17811752 }
17821753
17831754 err = atomisp_initialize_modules(isp);
17841755 if (err < 0) {
1785− dev_err(&dev->dev, "atomisp_initialize_modules (%d)\n", err);
1756+ dev_err(&pdev->dev, "atomisp_initialize_modules (%d)\n", err);
17861757 goto initialize_modules_fail;
17871758 }
17881759
17891760 err = atomisp_register_entities(isp);
17901761 if (err < 0) {
1791− dev_err(&dev->dev, "atomisp_register_entities failed (%d)\n",
1792− err);
1762+ dev_err(&pdev->dev, "atomisp_register_entities failed (%d)\n", err);
17931763 goto register_entities_fail;
17941764 }
17951765 err = atomisp_create_pads_links(isp);
@@ -1802,24 +1772,24 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 6 unmodified lines
18021772 /* save the iunit context only once after all the values are init'ed. */
18031773 atomisp_save_iunit_reg(isp);
18041774
1805− pm_runtime_put_noidle(&dev->dev);
1806− pm_runtime_allow(&dev->dev);
1775+ pm_runtime_put_noidle(&pdev->dev);
1776+ pm_runtime_allow(&pdev->dev);
18071777
18081778 hmm_init_mem_stat(repool_pgnr, dypool_enable, dypool_pgnr);
18091779 err = hmm_pool_register(repool_pgnr, HMM_POOL_TYPE_RESERVED);
18101780 if (err) {
1811− dev_err(&dev->dev, "Failed to register reserved memory pool.\n");
1781+ dev_err(&pdev->dev, "Failed to register reserved memory pool.\n");
18121782 goto hmm_pool_fail;
18131783 }
18141784
18151785 /* Init ISP memory management */
18161786 hmm_init();
18171787
1818− err = devm_request_threaded_irq(&dev->dev, dev->irq,
1788+ err = devm_request_threaded_irq(&pdev->dev, pdev->irq,
18191789 atomisp_isr, atomisp_isr_thread,
18201790 IRQF_SHARED, "isp_irq", isp);
18211791 if (err) {
1822− dev_err(&dev->dev, "Failed to request irq (%d)\n", err);
1792+ dev_err(&pdev->dev, "Failed to request irq (%d)\n", err);
18231793 goto request_irq_fail;
18241794 }
18251795
@@ -1827,23 +1797,23 @@ static int atomisp_pci_probe(struct pci_dev *dev, · 1 unmodified line
18271797 if (!defer_fw_load) {
18281798 err = atomisp_css_load_firmware(isp);
18291799 if (err) {
1830− dev_err(&dev->dev, "Failed to init css.\n");
1800+ dev_err(&pdev->dev, "Failed to init css.\n");
18311801 goto css_init_fail;
18321802 }
18331803 } else {
1834− dev_dbg(&dev->dev, "Skip css init.\n");
1804+ dev_dbg(&pdev->dev, "Skip css init.\n");
18351805 }
18361806 /* Clear FW image from memory */
18371807 release_firmware(isp->firmware);
18381808 isp->firmware = NULL;
18391809 isp->css_env.isp_css_fw.data = NULL;
18401810
1841− atomisp_drvfs_init(&dev->driver->driver, isp);
1811+ atomisp_drvfs_init(isp);
18421812
18431813 return 0;
18441814
18451815 css_init_fail:
1846− devm_free_irq(&dev->dev, dev->irq, isp);
1816+ devm_free_irq(&pdev->dev, pdev->irq, isp);
18471817 request_irq_fail:
18481818 hmm_cleanup();
18491819 hmm_pool_unregister(HMM_POOL_TYPE_RESERVED);
@@ -1856,8 +1826,8 @@ register_entities_fail: · 6 unmodified lines
18561826 atomisp_uninitialize_modules(isp);
18571827 initialize_modules_fail:
18581828 cpu_latency_qos_remove_request(&isp->pm_qos);
1859− atomisp_msi_irq_uninit(isp, dev);
1860− pci_disable_msi(dev);
1829+ atomisp_msi_irq_uninit(isp);
1830+ pci_disable_msi(pdev);
18611831 enable_msi_fail:
18621832 fw_validation_fail:
18631833 release_firmware(isp->firmware);
@@ -1869,35 +1839,34 @@ load_fw_fail: · 5 unmodified lines
18691839 * The following lines have been copied from atomisp suspend path
18701840 */
18711841
1872− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1842+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
18731843 irq = irq & 1 << INTR_IIR;
1874− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1844+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
18751845
1876− pci_read_config_dword(dev, PCI_INTERRUPT_CTRL, &irq);
1846+ pci_read_config_dword(pdev, PCI_INTERRUPT_CTRL, &irq);
18771847 irq &= ~(1 << INTR_IER);
1878− pci_write_config_dword(dev, PCI_INTERRUPT_CTRL, irq);
1848+ pci_write_config_dword(pdev, PCI_INTERRUPT_CTRL, irq);
18791849
1880− atomisp_msi_irq_uninit(isp, dev);
1850+ atomisp_msi_irq_uninit(isp);
18811851
18821852 atomisp_ospm_dphy_down(isp);
18831853
18841854 /* Address later when we worry about the ...field chips */
18851855 if (IS_ENABLED(CONFIG_PM) && atomisp_mrfld_power_down(isp))
1886− dev_err(&dev->dev, "Failed to switch off ISP\n");
1856+ dev_err(&pdev->dev, "Failed to switch off ISP\n");
18871857
18881858 atomisp_dev_alloc_fail:
1889− pcim_iounmap_regions(dev, 1 << ATOM_ISP_PCI_BAR);
1859+ pcim_iounmap_regions(pdev, 1 << ATOM_ISP_PCI_BAR);
18901860
18911861 ioremap_fail:
18921862 return err;
18931863 }
18941864
1895−static void atomisp_pci_remove(struct pci_dev *dev)
1865+static void atomisp_pci_remove(struct pci_dev *pdev)
18961866 {
1897− struct atomisp_device *isp = (struct atomisp_device *)
1898− pci_get_drvdata(dev);
1867+ struct atomisp_device *isp = pci_get_drvdata(pdev);
18991868
1900− dev_info(&dev->dev, "Removing atomisp driver\n");
1869+ dev_info(&pdev->dev, "Removing atomisp driver\n");
19011870
19021871 atomisp_drvfs_exit();
19031872
@@ -1906,11 +1875,11 @@ static void atomisp_pci_remove(struct pci_dev *dev) · 2 unmodified lines
19061875 ia_css_unload_firmware();
19071876 hmm_cleanup();
19081877
1909− pm_runtime_forbid(&dev->dev);
1910− pm_runtime_get_noresume(&dev->dev);
1878+ pm_runtime_forbid(&pdev->dev);
1879+ pm_runtime_get_noresume(&pdev->dev);
19111880 cpu_latency_qos_remove_request(&isp->pm_qos);
19121881
1913− atomisp_msi_irq_uninit(isp, dev);
1882+ atomisp_msi_irq_uninit(isp);
19141883 atomisp_unregister_entities(isp);
19151884
19161885 destroy_workqueue(isp->wdt_work_queue);
drivers/staging/media/atomisp/pci/base/refcount/src/refcount.c+14−14
@@ -48,7 +48,7 @@ static struct ia_css_refcount_entry *refcount_find_entry(ia_css_ptr ptr, · 47 unmodified lines
4848 return NULL;
4949 if (!myrefcount.items) {
5050 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
51− "refcount_find_entry(): Ref count not initialized!\n");
51+ "%s(): Ref count not initialized!\n", __func__);
5252 return NULL;
5353 }
5454
@@ -73,12 +73,12 @@ int ia_css_refcount_init(uint32_t size) · 18 unmodified lines
7373
7474 if (size == 0) {
7575 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
76− "ia_css_refcount_init(): Size of 0 for Ref count init!\n");
76+ "%s(): Size of 0 for Ref count init!\n", __func__);
7777 return -EINVAL;
7878 }
7979 if (myrefcount.items) {
8080 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
81− "ia_css_refcount_init(): Ref count is already initialized\n");
81+ "%s(): Ref count is already initialized\n", __func__);
8282 return -EINVAL;
8383 }
8484 myrefcount.items =
@@ -99,7 +99,7 @@ void ia_css_refcount_uninit(void) · 14 unmodified lines
9999 u32 i;
100100
101101 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
102− "ia_css_refcount_uninit() entry\n");
102+ "%s() entry\n", __func__);
103103 for (i = 0; i < myrefcount.size; i++) {
104104 /* driver verifier tool has issues with &arr[i]
105105 and prefers arr + i; as these are actually equivalent
@@ -120,7 +120,7 @@ void ia_css_refcount_uninit(void) · 14 unmodified lines
120120 myrefcount.items = NULL;
121121 myrefcount.size = 0;
122122 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
123− "ia_css_refcount_uninit() leave\n");
123+ "%s() leave\n", __func__);
124124 }
125125
126126 ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr)
@@ -133,7 +133,7 @@ ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr) · 6 unmodified lines
133133 entry = refcount_find_entry(ptr, false);
134134
135135 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
136− "ia_css_refcount_increment(%x) 0x%x\n", id, ptr);
136+ "%s(%x) 0x%x\n", __func__, id, ptr);
137137
138138 if (!entry) {
139139 entry = refcount_find_entry(ptr, true);
@@ -145,7 +145,7 @@ ia_css_ptr ia_css_refcount_increment(s32 id, ia_css_ptr ptr) · 5 unmodified lines
145145
146146 if (entry->id != id) {
147147 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
148− "ia_css_refcount_increment(): Ref count IDS do not match!\n");
148+ "%s(): Ref count IDS do not match!\n", __func__);
149149 return mmgr_NULL;
150150 }
151151
@@ -165,7 +165,7 @@ bool ia_css_refcount_decrement(s32 id, ia_css_ptr ptr) · 13 unmodified lines
165165 struct ia_css_refcount_entry *entry;
166166
167167 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
168− "ia_css_refcount_decrement(%x) 0x%x\n", id, ptr);
168+ "%s(%x) 0x%x\n", __func__, id, ptr);
169169
170170 if (ptr == mmgr_NULL)
171171 return false;
@@ -175,7 +175,7 @@ bool ia_css_refcount_decrement(s32 id, ia_css_ptr ptr) · 3 unmodified lines
175175 if (entry) {
176176 if (entry->id != id) {
177177 ia_css_debug_dtrace(IA_CSS_DEBUG_ERROR,
178− "ia_css_refcount_decrement(): Ref count IDS do not match!\n");
178+ "%s(): Ref count IDS do not match!\n", __func__);
179179 return false;
180180 }
181181 if (entry->count > 0) {
@@ -225,8 +225,8 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 43 unmodified lines
225225 u32 count = 0;
226226
227227 assert(clear_func_ptr);
228− ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "ia_css_refcount_clear(%x)\n",
229− id);
228+ ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE, "%s(%x)\n",
229+ __func__, id);
230230
231231 for (i = 0; i < myrefcount.size; i++) {
232232 /* driver verifier tool has issues with &arr[i]
@@ -236,14 +236,14 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 3 unmodified lines
236236 entry = myrefcount.items + i;
237237 if ((entry->data != mmgr_NULL) && (entry->id == id)) {
238238 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
239− "ia_css_refcount_clear: %x: 0x%x\n",
239+ "%s: %x: 0x%x\n", __func__,
240240 id, entry->data);
241241 if (clear_func_ptr) {
242242 /* clear using provided function */
243243 clear_func_ptr(entry->data);
244244 } else {
245245 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
246− "ia_css_refcount_clear: using hmm_free: no clear_func\n");
246+ "%s: using hmm_free: no clear_func\n", __func__);
247247 hmm_free(entry->data);
248248 }
249249
@@ -260,7 +260,7 @@ void ia_css_refcount_clear(s32 id, clear_func clear_func_ptr) · 10 unmodified lines
260260 }
261261 }
262262 ia_css_debug_dtrace(IA_CSS_DEBUG_TRACE,
263− "ia_css_refcount_clear(%x): cleared %d\n", id,
263+ "%s(%x): cleared %d\n", __func__, id,
264264 count);
265265 }
266266
drivers/staging/media/atomisp/pci/hive_types.h+3−21
@@ -52,32 +52,14 @@ typedef unsigned short hive_uint16; · 51 unmodified lines
5252 typedef unsigned int hive_uint32;
5353 typedef unsigned long long hive_uint64;
5454
55−/* by default assume 32 bit master port (both data and address) */
56−#ifndef HRT_DATA_WIDTH
57−#define HRT_DATA_WIDTH 32
58−#endif
59−#ifndef HRT_ADDRESS_WIDTH
60−#define HRT_ADDRESS_WIDTH 32
61−#endif
62−
55+#define HRT_DATA_WIDTH 32
56+#define HRT_ADDRESS_WIDTH 64
6357 #define HRT_DATA_BYTES (HRT_DATA_WIDTH / 8)
6458 #define HRT_ADDRESS_BYTES (HRT_ADDRESS_WIDTH / 8)
59+#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
6560
66−#if HRT_DATA_WIDTH == 64
67−typedef hive_uint64 hrt_data;
68−#elif HRT_DATA_WIDTH == 32
6961 typedef hive_uint32 hrt_data;
70−#else
71−#error data width not supported
72−#endif
73−
74−#if HRT_ADDRESS_WIDTH == 64
7562 typedef hive_uint64 hrt_address;
76−#elif HRT_ADDRESS_WIDTH == 32
77−typedef hive_uint32 hrt_address;
78−#else
79−#error adddres width not supported
80−#endif
8163
8264 /* use 64 bit addresses in simulation, where possible */
8365 typedef hive_uint64 hive_sim_address;
drivers/staging/media/atomisp/pci/hmm/hmm.c+5−5
@@ -735,11 +735,11 @@ ia_css_ptr hmm_host_vaddr_to_hrt_vaddr(const void *ptr) · 734 unmodified lines
735735
736736 void hmm_show_mem_stat(const char *func, const int line)
737737 {
738− trace_printk("tol_cnt=%d usr_size=%d res_size=%d res_cnt=%d sys_size=%d dyc_thr=%d dyc_size=%d.\n",
739− hmm_mem_stat.tol_cnt,
740− hmm_mem_stat.usr_size, hmm_mem_stat.res_size,
741− hmm_mem_stat.res_cnt, hmm_mem_stat.sys_size,
742− hmm_mem_stat.dyc_thr, hmm_mem_stat.dyc_size);
738+ pr_info("tol_cnt=%d usr_size=%d res_size=%d res_cnt=%d sys_size=%d dyc_thr=%d dyc_size=%d.\n",
739+ hmm_mem_stat.tol_cnt,
740+ hmm_mem_stat.usr_size, hmm_mem_stat.res_size,
741+ hmm_mem_stat.res_cnt, hmm_mem_stat.sys_size,
742+ hmm_mem_stat.dyc_thr, hmm_mem_stat.dyc_size);
743743 }
744744
745745 void hmm_init_mem_stat(int res_pgnr, int dyc_en, int dyc_pgnr)
drivers/staging/media/atomisp/pci/isp2400_system_global.h+0−302
@@ -13,306 +13,4 @@ · 12 unmodified lines
1313 * more details.
1414 */
1515
16−#ifndef __SYSTEM_GLOBAL_H_INCLUDED__
17−#define __SYSTEM_GLOBAL_H_INCLUDED__
18−
19−#include <hive_isp_css_defs.h>
20−#include <type_support.h>
21−
22−/*
23− * The longest allowed (uninteruptible) bus transfer, does not
24− * take stalling into account
25− */
26−#define HIVE_ISP_MAX_BURST_LENGTH 1024
27−
28−/*
29− * Maximum allowed burst length in words for the ISP DMA
30− */
31−#define ISP_DMA_MAX_BURST_LENGTH 128
32−
33−/*
34− * Create a list of HAS and IS properties that defines the system
35− *
36− * The configuration assumes the following
37− * - The system is hetereogeneous; Multiple cells and devices classes
38− * - The cell and device instances are homogeneous, each device type
39− * belongs to the same class
40− * - Device instances supporting a subset of the class capabilities are
41− * allowed
42− *
43− * We could manage different device classes through the enumerated
44− * lists (C) or the use of classes (C++), but that is presently not
45− * fully supported
46− *
47− * N.B. the 3 input formatters are of 2 different classess
48− */
49−
5016 #define USE_INPUT_SYSTEM_VERSION_2
51−
52−#define HAS_MMU_VERSION_2
53−#define HAS_DMA_VERSION_2
54−#define HAS_GDC_VERSION_2
55−#define HAS_VAMEM_VERSION_2
56−#define HAS_HMEM_VERSION_1
57−#define HAS_BAMEM_VERSION_2
58−#define HAS_IRQ_VERSION_2
59−#define HAS_IRQ_MAP_VERSION_2
60−#define HAS_INPUT_FORMATTER_VERSION_2
61−/* 2401: HAS_INPUT_SYSTEM_VERSION_2401 */
62−#define HAS_INPUT_SYSTEM_VERSION_2
63−#define HAS_BUFFERED_SENSOR
64−#define HAS_FIFO_MONITORS_VERSION_2
65−/* #define HAS_GP_REGS_VERSION_2 */
66−#define HAS_GP_DEVICE_VERSION_2
67−#define HAS_GPIO_VERSION_1
68−#define HAS_TIMED_CTRL_VERSION_1
69−#define HAS_RX_VERSION_2
70−
71−#define DMA_DDR_TO_VAMEM_WORKAROUND
72−#define DMA_DDR_TO_HMEM_WORKAROUND
73−
74−/*
75− * Semi global. "HRT" is accessible from SP, but the HRT types do not fully apply
76− */
77−#define HRT_VADDRESS_WIDTH 32
78−//#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property*/
79−#define HRT_DATA_WIDTH 32
80−
81−#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
82−#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8)
83−
84−/* The main bus connecting all devices */
85−#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH
86−#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES
87−
88−/* per-frame parameter handling support */
89−#define SH_CSS_ENABLE_PER_FRAME_PARAMS
90−
91−typedef u32 hrt_bus_align_t;
92−
93−/*
94− * Enumerate the devices, device access through the API is by ID, through the DLI by address
95− * The enumerator terminators are used to size the wiring arrays and as an exception value.
96− */
97−typedef enum {
98− DDR0_ID = 0,
99− N_DDR_ID
100−} ddr_ID_t;
101−
102−typedef enum {
103− ISP0_ID = 0,
104− N_ISP_ID
105−} isp_ID_t;
106−
107−typedef enum {
108− SP0_ID = 0,
109− N_SP_ID
110−} sp_ID_t;
111−
112−typedef enum {
113− MMU0_ID = 0,
114− MMU1_ID,
115− N_MMU_ID
116−} mmu_ID_t;
117−
118−typedef enum {
119− DMA0_ID = 0,
120− N_DMA_ID
121−} dma_ID_t;
122−
123−typedef enum {
124− GDC0_ID = 0,
125− GDC1_ID,
126− N_GDC_ID
127−} gdc_ID_t;
128−
129−#define N_GDC_ID_CPP 2 // this extra define is needed because we want to use it also in the preprocessor, and that doesn't work with enums.
130−
131−typedef enum {
132− VAMEM0_ID = 0,
133− VAMEM1_ID,
134− VAMEM2_ID,
135− N_VAMEM_ID
136−} vamem_ID_t;
137−
138−typedef enum {
139− BAMEM0_ID = 0,
140− N_BAMEM_ID
141−} bamem_ID_t;
142−
143−typedef enum {
144− HMEM0_ID = 0,
145− N_HMEM_ID
146−} hmem_ID_t;
147−
148−/*
149−typedef enum {
150− IRQ0_ID = 0,
151− N_IRQ_ID
152−} irq_ID_t;
153−*/
154−
155−typedef enum {
156− IRQ0_ID = 0, // GP IRQ block
157− IRQ1_ID, // Input formatter
158− IRQ2_ID, // input system
159− IRQ3_ID, // input selector
160− N_IRQ_ID
161−} irq_ID_t;
162−
163−typedef enum {
164− FIFO_MONITOR0_ID = 0,
165− N_FIFO_MONITOR_ID
166−} fifo_monitor_ID_t;
167−
168−/*
169− * Deprecated: Since all gp_reg instances are different
170− * and put in the address maps of other devices we cannot
171− * enumerate them as that assumes the instrances are the
172− * same.
173− *
174− * We define a single GP_DEVICE containing all gp_regs
175− * w.r.t. a single base address
176− *
177−typedef enum {
178− GP_REGS0_ID = 0,
179− N_GP_REGS_ID
180−} gp_regs_ID_t;
181− */
182−typedef enum {
183− GP_DEVICE0_ID = 0,
184− N_GP_DEVICE_ID
185−} gp_device_ID_t;
186−
187−typedef enum {
188− GP_TIMER0_ID = 0,
189− GP_TIMER1_ID,
190− GP_TIMER2_ID,
191− GP_TIMER3_ID,
192− GP_TIMER4_ID,
193− GP_TIMER5_ID,
194− GP_TIMER6_ID,
195− GP_TIMER7_ID,
196− N_GP_TIMER_ID
197−} gp_timer_ID_t;
198−
199−typedef enum {
200− GPIO0_ID = 0,
201− N_GPIO_ID
202−} gpio_ID_t;
203−
204−typedef enum {
205− TIMED_CTRL0_ID = 0,
206− N_TIMED_CTRL_ID
207−} timed_ctrl_ID_t;
208−
209−typedef enum {
210− INPUT_FORMATTER0_ID = 0,
211− INPUT_FORMATTER1_ID,
212− INPUT_FORMATTER2_ID,
213− INPUT_FORMATTER3_ID,
214− N_INPUT_FORMATTER_ID
215−} input_formatter_ID_t;
216−
217−/* The IF RST is outside the IF */
218−#define INPUT_FORMATTER0_SRST_OFFSET 0x0824
219−#define INPUT_FORMATTER1_SRST_OFFSET 0x0624
220−#define INPUT_FORMATTER2_SRST_OFFSET 0x0424
221−#define INPUT_FORMATTER3_SRST_OFFSET 0x0224
222−
223−#define INPUT_FORMATTER0_SRST_MASK 0x0001
224−#define INPUT_FORMATTER1_SRST_MASK 0x0002
225−#define INPUT_FORMATTER2_SRST_MASK 0x0004
226−#define INPUT_FORMATTER3_SRST_MASK 0x0008
227−
228−typedef enum {
229− INPUT_SYSTEM0_ID = 0,
230− N_INPUT_SYSTEM_ID
231−} input_system_ID_t;
232−
233−typedef enum {
234− RX0_ID = 0,
235− N_RX_ID
236−} rx_ID_t;
237−
238−enum mipi_port_id {
239− MIPI_PORT0_ID = 0,
240− MIPI_PORT1_ID,
241− MIPI_PORT2_ID,
242− N_MIPI_PORT_ID
243−};
244−
245−#define N_RX_CHANNEL_ID 4
246−
247−/* Generic port enumeration with an internal port type ID */
248−typedef enum {
249− CSI_PORT0_ID = 0,
250− CSI_PORT1_ID,
251− CSI_PORT2_ID,
252− TPG_PORT0_ID,
253− PRBS_PORT0_ID,
254− FIFO_PORT0_ID,
255− MEMORY_PORT0_ID,
256− N_INPUT_PORT_ID
257−} input_port_ID_t;
258−
259−typedef enum {
260− CAPTURE_UNIT0_ID = 0,
261− CAPTURE_UNIT1_ID,
262− CAPTURE_UNIT2_ID,
263− ACQUISITION_UNIT0_ID,
264− DMA_UNIT0_ID,
265− CTRL_UNIT0_ID,
266− GPREGS_UNIT0_ID,
267− FIFO_UNIT0_ID,
268− IRQ_UNIT0_ID,
269− N_SUB_SYSTEM_ID
270−} sub_system_ID_t;
271−
272−#define N_CAPTURE_UNIT_ID 3
273−#define N_ACQUISITION_UNIT_ID 1
274−#define N_CTRL_UNIT_ID 1
275−
276−enum ia_css_isp_memories {
277− IA_CSS_ISP_PMEM0 = 0,
278− IA_CSS_ISP_DMEM0,
279− IA_CSS_ISP_VMEM0,
280− IA_CSS_ISP_VAMEM0,
281− IA_CSS_ISP_VAMEM1,
282− IA_CSS_ISP_VAMEM2,
283− IA_CSS_ISP_HMEM0,
284− IA_CSS_SP_DMEM0,
285− IA_CSS_DDR,
286− N_IA_CSS_MEMORIES
287−};
288−
289−#define IA_CSS_NUM_MEMORIES 9
290−/* For driver compatibility */
291−#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
292−#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
293−
294−#if 0
295−typedef enum {
296− dev_chn, /* device channels, external resource */
297− ext_mem, /* external memories */
298− int_mem, /* internal memories */
299− int_chn /* internal channels, user defined */
300−} resource_type_t;
301−
302−/* if this enum is extended with other memory resources, pls also extend the function resource_to_memptr() */
303−typedef enum {
304− vied_nci_dev_chn_dma_ext0,
305− int_mem_vmem0,
306− int_mem_dmem0
307−} resource_id_t;
308−
309−/* enum listing the different memories within a program group.
310− This enum is used in the mem_ptr_t type */
311−typedef enum {
312− buf_mem_invalid = 0,
313− buf_mem_vmem_prog0,
314− buf_mem_dmem_prog0
315−} buf_mem_t;
316−
317−#endif
318−#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/isp2400_system_local.h+0−321
@@ -1,321 +0,0 @@
1−/* SPDX-License-Identifier: GPL-2.0 */
2−/*
3− * Support for Intel Camera Imaging ISP subsystem.
4− * Copyright (c) 2010-2015, Intel Corporation.
5− *
6− * This program is free software; you can redistribute it and/or modify it
7− * under the terms and conditions of the GNU General Public License,
8− * version 2, as published by the Free Software Foundation.
9− *
10− * This program is distributed in the hope it will be useful, but WITHOUT
11− * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12− * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13− * more details.
14− */
15−
16−#ifndef __SYSTEM_LOCAL_H_INCLUDED__
17−#define __SYSTEM_LOCAL_H_INCLUDED__
18−
19−#ifdef HRT_ISP_CSS_CUSTOM_HOST
20−#ifndef HRT_USE_VIR_ADDRS
21−#define HRT_USE_VIR_ADDRS
22−#endif
23−#endif
24−
25−#include "system_global.h"
26−
27−/* HRT assumes 32 by default (see Linux/include/hive_types.h), overrule it in case it is different */
28−#undef HRT_ADDRESS_WIDTH
29−#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */
30−
31−/* This interface is deprecated */
32−#include "hive_types.h"
33−
34−/*
35− * Cell specific address maps
36− */
37−#if HRT_ADDRESS_WIDTH == 64
38−
39−#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */
40−
41−/* DDR */
42−static const hrt_address DDR_BASE[N_DDR_ID] = {
43− (hrt_address)0x0000000120000000ULL
44−};
45−
46−/* ISP */
47−static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
48− (hrt_address)0x0000000000020000ULL
49−};
50−
51−static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
52− (hrt_address)0x0000000000200000ULL
53−};
54−
55−static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
56− (hrt_address)0x0000000000100000ULL
57−};
58−
59−static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
60− (hrt_address)0x00000000001C0000ULL,
61− (hrt_address)0x00000000001D0000ULL,
62− (hrt_address)0x00000000001E0000ULL
63−};
64−
65−static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
66− (hrt_address)0x00000000001F0000ULL
67−};
68−
69−/* SP */
70−static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
71− (hrt_address)0x0000000000010000ULL
72−};
73−
74−static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
75− (hrt_address)0x0000000000300000ULL
76−};
77−
78−static const hrt_address SP_PMEM_BASE[N_SP_ID] = {
79− (hrt_address)0x00000000000B0000ULL
80−};
81−
82−/* MMU */
83−/*
84− * MMU0_ID: The data MMU
85− * MMU1_ID: The icache MMU
86− */
87−static const hrt_address MMU_BASE[N_MMU_ID] = {
88− (hrt_address)0x0000000000070000ULL,
89− (hrt_address)0x00000000000A0000ULL
90−};
91−
92−/* DMA */
93−static const hrt_address DMA_BASE[N_DMA_ID] = {
94− (hrt_address)0x0000000000040000ULL
95−};
96−
97−/* IRQ */
98−static const hrt_address IRQ_BASE[N_IRQ_ID] = {
99− (hrt_address)0x0000000000000500ULL,
100− (hrt_address)0x0000000000030A00ULL,
101− (hrt_address)0x000000000008C000ULL,
102− (hrt_address)0x0000000000090200ULL
103−};
104−
105−/*
106− (hrt_address)0x0000000000000500ULL};
107− */
108−
109−/* GDC */
110−static const hrt_address GDC_BASE[N_GDC_ID] = {
111− (hrt_address)0x0000000000050000ULL,
112− (hrt_address)0x0000000000060000ULL
113−};
114−
115−/* FIFO_MONITOR (not a subset of GP_DEVICE) */
116−static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
117− (hrt_address)0x0000000000000000ULL
118−};
119−
120−/*
121−static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
122− (hrt_address)0x0000000000000000ULL};
123−
124−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
125− (hrt_address)0x0000000000090000ULL};
126−*/
127−
128−/* GP_DEVICE (single base for all separate GP_REG instances) */
129−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
130− (hrt_address)0x0000000000000000ULL
131−};
132−
133−/*GP TIMER , all timer registers are inter-twined,
134− * so, having multiple base addresses for
135− * different timers does not help*/
136−static const hrt_address GP_TIMER_BASE =
137− (hrt_address)0x0000000000000600ULL;
138−/* GPIO */
139−static const hrt_address GPIO_BASE[N_GPIO_ID] = {
140− (hrt_address)0x0000000000000400ULL
141−};
142−
143−/* TIMED_CTRL */
144−static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
145− (hrt_address)0x0000000000000100ULL
146−};
147−
148−/* INPUT_FORMATTER */
149−static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
150− (hrt_address)0x0000000000030000ULL,
151− (hrt_address)0x0000000000030200ULL,
152− (hrt_address)0x0000000000030400ULL,
153− (hrt_address)0x0000000000030600ULL
154−}; /* memcpy() */
155−
156−/* INPUT_SYSTEM */
157−static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
158− (hrt_address)0x0000000000080000ULL
159−};
160−
161−/* (hrt_address)0x0000000000081000ULL, */ /* capture A */
162−/* (hrt_address)0x0000000000082000ULL, */ /* capture B */
163−/* (hrt_address)0x0000000000083000ULL, */ /* capture C */
164−/* (hrt_address)0x0000000000084000ULL, */ /* Acquisition */
165−/* (hrt_address)0x0000000000085000ULL, */ /* DMA */
166−/* (hrt_address)0x0000000000089000ULL, */ /* ctrl */
167−/* (hrt_address)0x000000000008A000ULL, */ /* GP regs */
168−/* (hrt_address)0x000000000008B000ULL, */ /* FIFO */
169−/* (hrt_address)0x000000000008C000ULL, */ /* IRQ */
170−
171−/* RX, the MIPI lane control regs start at offset 0 */
172−static const hrt_address RX_BASE[N_RX_ID] = {
173− (hrt_address)0x0000000000080100ULL
174−};
175−
176−#elif HRT_ADDRESS_WIDTH == 32
177−
178−#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */
179−
180−/* DDR : Attention, this value not defined in 32-bit */
181−static const hrt_address DDR_BASE[N_DDR_ID] = {
182− (hrt_address)0x00000000UL
183−};
184−
185−/* ISP */
186−static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
187− (hrt_address)0x00020000UL
188−};
189−
190−static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
191− (hrt_address)0x00200000UL
192−};
193−
194−static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
195− (hrt_address)0x100000UL
196−};
197−
198−static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
199− (hrt_address)0xffffffffUL,
200− (hrt_address)0xffffffffUL,
201− (hrt_address)0xffffffffUL
202−};
203−
204−static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
205− (hrt_address)0xffffffffUL
206−};
207−
208−/* SP */
209−static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
210− (hrt_address)0x00010000UL
211−};
212−
213−static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
214− (hrt_address)0x00300000UL
215−};
216−
217−static const hrt_address SP_PMEM_BASE[N_SP_ID] = {
218− (hrt_address)0x000B0000UL
219−};
220−
221−/* MMU */
222−/*
223− * MMU0_ID: The data MMU
224− * MMU1_ID: The icache MMU
225− */
226−static const hrt_address MMU_BASE[N_MMU_ID] = {
227− (hrt_address)0x00070000UL,
228− (hrt_address)0x000A0000UL
229−};
230−
231−/* DMA */
232−static const hrt_address DMA_BASE[N_DMA_ID] = {
233− (hrt_address)0x00040000UL
234−};
235−
236−/* IRQ */
237−static const hrt_address IRQ_BASE[N_IRQ_ID] = {
238− (hrt_address)0x00000500UL,
239− (hrt_address)0x00030A00UL,
240− (hrt_address)0x0008C000UL,
241− (hrt_address)0x00090200UL
242−};
243−
244−/*
245− (hrt_address)0x00000500UL};
246− */
247−
248−/* GDC */
249−static const hrt_address GDC_BASE[N_GDC_ID] = {
250− (hrt_address)0x00050000UL,
251− (hrt_address)0x00060000UL
252−};
253−
254−/* FIFO_MONITOR (not a subset of GP_DEVICE) */
255−static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
256− (hrt_address)0x00000000UL
257−};
258−
259−/*
260−static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
261− (hrt_address)0x00000000UL};
262−
263−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
264− (hrt_address)0x00090000UL};
265−*/
266−
267−/* GP_DEVICE (single base for all separate GP_REG instances) */
268−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
269− (hrt_address)0x00000000UL
270−};
271−
272−/*GP TIMER , all timer registers are inter-twined,
273− * so, having multiple base addresses for
274− * different timers does not help*/
275−static const hrt_address GP_TIMER_BASE =
276− (hrt_address)0x00000600UL;
277−
278−/* GPIO */
279−static const hrt_address GPIO_BASE[N_GPIO_ID] = {
280− (hrt_address)0x00000400UL
281−};
282−
283−/* TIMED_CTRL */
284−static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
285− (hrt_address)0x00000100UL
286−};
287−
288−/* INPUT_FORMATTER */
289−static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
290− (hrt_address)0x00030000UL,
291− (hrt_address)0x00030200UL,
292− (hrt_address)0x00030400UL
293−};
294−
295−/* (hrt_address)0x00030600UL, */ /* memcpy() */
296−
297−/* INPUT_SYSTEM */
298−static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
299− (hrt_address)0x00080000UL
300−};
301−
302−/* (hrt_address)0x00081000UL, */ /* capture A */
303−/* (hrt_address)0x00082000UL, */ /* capture B */
304−/* (hrt_address)0x00083000UL, */ /* capture C */
305−/* (hrt_address)0x00084000UL, */ /* Acquisition */
306−/* (hrt_address)0x00085000UL, */ /* DMA */
307−/* (hrt_address)0x00089000UL, */ /* ctrl */
308−/* (hrt_address)0x0008A000UL, */ /* GP regs */
309−/* (hrt_address)0x0008B000UL, */ /* FIFO */
310−/* (hrt_address)0x0008C000UL, */ /* IRQ */
311−
312−/* RX, the MIPI lane control regs start at offset 0 */
313−static const hrt_address RX_BASE[N_RX_ID] = {
314− (hrt_address)0x00080100UL
315−};
316−
317−#else
318−#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}"
319−#endif
320−
321−#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/isp2401_system_global.h+1−409
@@ -13,415 +13,7 @@ · 12 unmodified lines
1313 * more details.
1414 */
1515
16−#ifndef __SYSTEM_GLOBAL_H_INCLUDED__
17−#define __SYSTEM_GLOBAL_H_INCLUDED__
18−
19−#include <hive_isp_css_defs.h>
20−#include <type_support.h>
21−
22−/*
23− * The longest allowed (uninteruptible) bus transfer, does not
24− * take stalling into account
25− */
26−#define HIVE_ISP_MAX_BURST_LENGTH 1024
27−
28−/*
29− * Maximum allowed burst length in words for the ISP DMA
30− * This value is set to 2 to prevent the ISP DMA from blocking
31− * the bus for too long; as the input system can only buffer
32− * 2 lines on Moorefield and Cherrytrail, the input system buffers
33− * may overflow if blocked for too long (BZ 2726).
34− */
35−#define ISP_DMA_MAX_BURST_LENGTH 2
36−
37−/*
38− * Create a list of HAS and IS properties that defines the system
39− *
40− * The configuration assumes the following
41− * - The system is hetereogeneous; Multiple cells and devices classes
42− * - The cell and device instances are homogeneous, each device type
43− * belongs to the same class
44− * - Device instances supporting a subset of the class capabilities are
45− * allowed
46− *
47− * We could manage different device classes through the enumerated
48− * lists (C) or the use of classes (C++), but that is presently not
49− * fully supported
50− *
51− * N.B. the 3 input formatters are of 2 different classess
52− */
53−
16+#define HAS_NO_INPUT_FORMATTER
5417 #define USE_INPUT_SYSTEM_VERSION_2401
55−
56−#define HAS_MMU_VERSION_2
57−#define HAS_DMA_VERSION_2
58−#define HAS_GDC_VERSION_2
59−#define HAS_VAMEM_VERSION_2
60−#define HAS_HMEM_VERSION_1
61−#define HAS_BAMEM_VERSION_2
62−#define HAS_IRQ_VERSION_2
63−#define HAS_IRQ_MAP_VERSION_2
64−#define HAS_INPUT_FORMATTER_VERSION_2
65−/* 2401: HAS_INPUT_SYSTEM_VERSION_3 */
66−/* 2400: HAS_INPUT_SYSTEM_VERSION_2 */
67−#define HAS_INPUT_SYSTEM_VERSION_2
6818 #define HAS_INPUT_SYSTEM_VERSION_2401
69−#define HAS_BUFFERED_SENSOR
70−#define HAS_FIFO_MONITORS_VERSION_2
71−/* #define HAS_GP_REGS_VERSION_2 */
72−#define HAS_GP_DEVICE_VERSION_2
73−#define HAS_GPIO_VERSION_1
74−#define HAS_TIMED_CTRL_VERSION_1
75−#define HAS_RX_VERSION_2
76−#define HAS_NO_INPUT_FORMATTER
77−/*#define HAS_NO_PACKED_RAW_PIXELS*/
78−/*#define HAS_NO_DVS_6AXIS_CONFIG_UPDATE*/
79−
80−#define DMA_DDR_TO_VAMEM_WORKAROUND
81−#define DMA_DDR_TO_HMEM_WORKAROUND
82−
83−/*
84− * Semi global. "HRT" is accessible from SP, but
85− * the HRT types do not fully apply
86− */
87−#define HRT_VADDRESS_WIDTH 32
88−/* Surprise, this is a local property*/
89−/*#define HRT_ADDRESS_WIDTH 64 */
90−#define HRT_DATA_WIDTH 32
91−
92−#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
93−#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8)
94−
95−/* The main bus connecting all devices */
96−#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH
97−#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES
98−
9919 #define CSI2P_DISABLE_ISYS2401_ONLINE_MODE
100−
101−/* per-frame parameter handling support */
102−#define SH_CSS_ENABLE_PER_FRAME_PARAMS
103−
104−typedef u32 hrt_bus_align_t;
105−
106−/*
107− * Enumerate the devices, device access through the API is by ID,
108− * through the DLI by address. The enumerator terminators are used
109− * to size the wiring arrays and as an exception value.
110− */
111−typedef enum {
112− DDR0_ID = 0,
113− N_DDR_ID
114−} ddr_ID_t;
115−
116−typedef enum {
117− ISP0_ID = 0,
118− N_ISP_ID
119−} isp_ID_t;
120−
121−typedef enum {
122− SP0_ID = 0,
123− N_SP_ID
124−} sp_ID_t;
125−
126−typedef enum {
127− MMU0_ID = 0,
128− MMU1_ID,
129− N_MMU_ID
130−} mmu_ID_t;
131−
132−typedef enum {
133− DMA0_ID = 0,
134− N_DMA_ID
135−} dma_ID_t;
136−
137−typedef enum {
138− GDC0_ID = 0,
139− GDC1_ID,
140− N_GDC_ID
141−} gdc_ID_t;
142−
143−/* this extra define is needed because we want to use it also
144− in the preprocessor, and that doesn't work with enums.
145− */
146−#define N_GDC_ID_CPP 2
147−
148−typedef enum {
149− VAMEM0_ID = 0,
150− VAMEM1_ID,
151− VAMEM2_ID,
152− N_VAMEM_ID
153−} vamem_ID_t;
154−
155−typedef enum {
156− BAMEM0_ID = 0,
157− N_BAMEM_ID
158−} bamem_ID_t;
159−
160−typedef enum {
161− HMEM0_ID = 0,
162− N_HMEM_ID
163−} hmem_ID_t;
164−
165−typedef enum {
166− ISYS_IRQ0_ID = 0, /* port a */
167− ISYS_IRQ1_ID, /* port b */
168− ISYS_IRQ2_ID, /* port c */
169− N_ISYS_IRQ_ID
170−} isys_irq_ID_t;
171−
172−typedef enum {
173− IRQ0_ID = 0, /* GP IRQ block */
174− IRQ1_ID, /* Input formatter */
175− IRQ2_ID, /* input system */
176− IRQ3_ID, /* input selector */
177− N_IRQ_ID
178−} irq_ID_t;
179−
180−typedef enum {
181− FIFO_MONITOR0_ID = 0,
182− N_FIFO_MONITOR_ID
183−} fifo_monitor_ID_t;
184−
185−/*
186− * Deprecated: Since all gp_reg instances are different
187− * and put in the address maps of other devices we cannot
188− * enumerate them as that assumes the instrances are the
189− * same.
190− *
191− * We define a single GP_DEVICE containing all gp_regs
192− * w.r.t. a single base address
193− *
194−typedef enum {
195− GP_REGS0_ID = 0,
196− N_GP_REGS_ID
197−} gp_regs_ID_t;
198− */
199−typedef enum {
200− GP_DEVICE0_ID = 0,
201− N_GP_DEVICE_ID
202−} gp_device_ID_t;
203−
204−typedef enum {
205− GP_TIMER0_ID = 0,
206− GP_TIMER1_ID,
207− GP_TIMER2_ID,
208− GP_TIMER3_ID,
209− GP_TIMER4_ID,
210− GP_TIMER5_ID,
211− GP_TIMER6_ID,
212− GP_TIMER7_ID,
213− N_GP_TIMER_ID
214−} gp_timer_ID_t;
215−
216−typedef enum {
217− GPIO0_ID = 0,
218− N_GPIO_ID
219−} gpio_ID_t;
220−
221−typedef enum {
222− TIMED_CTRL0_ID = 0,
223− N_TIMED_CTRL_ID
224−} timed_ctrl_ID_t;
225−
226−typedef enum {
227− INPUT_FORMATTER0_ID = 0,
228− INPUT_FORMATTER1_ID,
229− INPUT_FORMATTER2_ID,
230− INPUT_FORMATTER3_ID,
231− N_INPUT_FORMATTER_ID
232−} input_formatter_ID_t;
233−
234−/* The IF RST is outside the IF */
235−#define INPUT_FORMATTER0_SRST_OFFSET 0x0824
236−#define INPUT_FORMATTER1_SRST_OFFSET 0x0624
237−#define INPUT_FORMATTER2_SRST_OFFSET 0x0424
238−#define INPUT_FORMATTER3_SRST_OFFSET 0x0224
239−
240−#define INPUT_FORMATTER0_SRST_MASK 0x0001
241−#define INPUT_FORMATTER1_SRST_MASK 0x0002
242−#define INPUT_FORMATTER2_SRST_MASK 0x0004
243−#define INPUT_FORMATTER3_SRST_MASK 0x0008
244−
245−typedef enum {
246− INPUT_SYSTEM0_ID = 0,
247− N_INPUT_SYSTEM_ID
248−} input_system_ID_t;
249−
250−typedef enum {
251− RX0_ID = 0,
252− N_RX_ID
253−} rx_ID_t;
254−
255−enum mipi_port_id {
256− MIPI_PORT0_ID = 0,
257− MIPI_PORT1_ID,
258− MIPI_PORT2_ID,
259− N_MIPI_PORT_ID
260−};
261−
262−#define N_RX_CHANNEL_ID 4
263−
264−/* Generic port enumeration with an internal port type ID */
265−typedef enum {
266− CSI_PORT0_ID = 0,
267− CSI_PORT1_ID,
268− CSI_PORT2_ID,
269− TPG_PORT0_ID,
270− PRBS_PORT0_ID,
271− FIFO_PORT0_ID,
272− MEMORY_PORT0_ID,
273− N_INPUT_PORT_ID
274−} input_port_ID_t;
275−
276−typedef enum {
277− CAPTURE_UNIT0_ID = 0,
278− CAPTURE_UNIT1_ID,
279− CAPTURE_UNIT2_ID,
280− ACQUISITION_UNIT0_ID,
281− DMA_UNIT0_ID,
282− CTRL_UNIT0_ID,
283− GPREGS_UNIT0_ID,
284− FIFO_UNIT0_ID,
285− IRQ_UNIT0_ID,
286− N_SUB_SYSTEM_ID
287−} sub_system_ID_t;
288−
289−#define N_CAPTURE_UNIT_ID 3
290−#define N_ACQUISITION_UNIT_ID 1
291−#define N_CTRL_UNIT_ID 1
292−
293−/*
294− * Input-buffer Controller.
295− */
296−typedef enum {
297− IBUF_CTRL0_ID = 0, /* map to ISYS2401_IBUF_CNTRL_A */
298− IBUF_CTRL1_ID, /* map to ISYS2401_IBUF_CNTRL_B */
299− IBUF_CTRL2_ID, /* map ISYS2401_IBUF_CNTRL_C */
300− N_IBUF_CTRL_ID
301−} ibuf_ctrl_ID_t;
302−/* end of Input-buffer Controller */
303−
304−/*
305− * Stream2MMIO.
306− */
307−typedef enum {
308− STREAM2MMIO0_ID = 0, /* map to ISYS2401_S2M_A */
309− STREAM2MMIO1_ID, /* map to ISYS2401_S2M_B */
310− STREAM2MMIO2_ID, /* map to ISYS2401_S2M_C */
311− N_STREAM2MMIO_ID
312−} stream2mmio_ID_t;
313−
314−typedef enum {
315− /*
316− * Stream2MMIO 0 has 8 SIDs that are indexed by
317− * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID7_ID].
318− *
319− * Stream2MMIO 1 has 4 SIDs that are indexed by
320− * [STREAM2MMIO_SID0_ID...TREAM2MMIO_SID3_ID].
321− *
322− * Stream2MMIO 2 has 4 SIDs that are indexed by
323− * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID3_ID].
324− */
325− STREAM2MMIO_SID0_ID = 0,
326− STREAM2MMIO_SID1_ID,
327− STREAM2MMIO_SID2_ID,
328− STREAM2MMIO_SID3_ID,
329− STREAM2MMIO_SID4_ID,
330− STREAM2MMIO_SID5_ID,
331− STREAM2MMIO_SID6_ID,
332− STREAM2MMIO_SID7_ID,
333− N_STREAM2MMIO_SID_ID
334−} stream2mmio_sid_ID_t;
335−/* end of Stream2MMIO */
336−
337−/**
338− * Input System 2401: CSI-MIPI recevier.
339− */
340−typedef enum {
341− CSI_RX_BACKEND0_ID = 0, /* map to ISYS2401_MIPI_BE_A */
342− CSI_RX_BACKEND1_ID, /* map to ISYS2401_MIPI_BE_B */
343− CSI_RX_BACKEND2_ID, /* map to ISYS2401_MIPI_BE_C */
344− N_CSI_RX_BACKEND_ID
345−} csi_rx_backend_ID_t;
346−
347−typedef enum {
348− CSI_RX_FRONTEND0_ID = 0, /* map to ISYS2401_CSI_RX_A */
349− CSI_RX_FRONTEND1_ID, /* map to ISYS2401_CSI_RX_B */
350− CSI_RX_FRONTEND2_ID, /* map to ISYS2401_CSI_RX_C */
351−#define N_CSI_RX_FRONTEND_ID (CSI_RX_FRONTEND2_ID + 1)
352−} csi_rx_frontend_ID_t;
353−
354−typedef enum {
355− CSI_RX_DLANE0_ID = 0, /* map to DLANE0 in CSI RX */
356− CSI_RX_DLANE1_ID, /* map to DLANE1 in CSI RX */
357− CSI_RX_DLANE2_ID, /* map to DLANE2 in CSI RX */
358− CSI_RX_DLANE3_ID, /* map to DLANE3 in CSI RX */
359− N_CSI_RX_DLANE_ID
360−} csi_rx_fe_dlane_ID_t;
361−/* end of CSI-MIPI receiver */
362−
363−typedef enum {
364− ISYS2401_DMA0_ID = 0,
365− N_ISYS2401_DMA_ID
366−} isys2401_dma_ID_t;
367−
368−/**
369− * Pixel-generator. ("system_global.h")
370− */
371−typedef enum {
372− PIXELGEN0_ID = 0,
373− PIXELGEN1_ID,
374− PIXELGEN2_ID,
375− N_PIXELGEN_ID
376−} pixelgen_ID_t;
377−/* end of pixel-generator. ("system_global.h") */
378−
379−typedef enum {
380− INPUT_SYSTEM_CSI_PORT0_ID = 0,
381− INPUT_SYSTEM_CSI_PORT1_ID,
382− INPUT_SYSTEM_CSI_PORT2_ID,
383−
384− INPUT_SYSTEM_PIXELGEN_PORT0_ID,
385− INPUT_SYSTEM_PIXELGEN_PORT1_ID,
386− INPUT_SYSTEM_PIXELGEN_PORT2_ID,
387−
388− N_INPUT_SYSTEM_INPUT_PORT_ID
389−} input_system_input_port_ID_t;
390−
391−#define N_INPUT_SYSTEM_CSI_PORT 3
392−
393−typedef enum {
394− ISYS2401_DMA_CHANNEL_0 = 0,
395− ISYS2401_DMA_CHANNEL_1,
396− ISYS2401_DMA_CHANNEL_2,
397− ISYS2401_DMA_CHANNEL_3,
398− ISYS2401_DMA_CHANNEL_4,
399− ISYS2401_DMA_CHANNEL_5,
400− ISYS2401_DMA_CHANNEL_6,
401− ISYS2401_DMA_CHANNEL_7,
402− ISYS2401_DMA_CHANNEL_8,
403− ISYS2401_DMA_CHANNEL_9,
404− ISYS2401_DMA_CHANNEL_10,
405− ISYS2401_DMA_CHANNEL_11,
406− N_ISYS2401_DMA_CHANNEL
407−} isys2401_dma_channel;
408−
409−enum ia_css_isp_memories {
410− IA_CSS_ISP_PMEM0 = 0,
411− IA_CSS_ISP_DMEM0,
412− IA_CSS_ISP_VMEM0,
413− IA_CSS_ISP_VAMEM0,
414− IA_CSS_ISP_VAMEM1,
415− IA_CSS_ISP_VAMEM2,
416− IA_CSS_ISP_HMEM0,
417− IA_CSS_SP_DMEM0,
418− IA_CSS_DDR,
419− N_IA_CSS_MEMORIES
420−};
421−
422−#define IA_CSS_NUM_MEMORIES 9
423−/* For driver compatibility */
424−#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
425−#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
426−
427−#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/isp2401_system_local.h+0−402
@@ -1,402 +0,0 @@
1−/* SPDX-License-Identifier: GPL-2.0 */
2−/*
3− * Support for Intel Camera Imaging ISP subsystem.
4− * Copyright (c) 2015, Intel Corporation.
5− *
6− * This program is free software; you can redistribute it and/or modify it
7− * under the terms and conditions of the GNU General Public License,
8− * version 2, as published by the Free Software Foundation.
9− *
10− * This program is distributed in the hope it will be useful, but WITHOUT
11− * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12− * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13− * more details.
14− */
15−
16−#ifndef __SYSTEM_LOCAL_H_INCLUDED__
17−#define __SYSTEM_LOCAL_H_INCLUDED__
18−
19−#ifdef HRT_ISP_CSS_CUSTOM_HOST
20−#ifndef HRT_USE_VIR_ADDRS
21−#define HRT_USE_VIR_ADDRS
22−#endif
23−#endif
24−
25−#include "system_global.h"
26−
27−#define HRT_ADDRESS_WIDTH 64 /* Surprise, this is a local property */
28−
29−/* This interface is deprecated */
30−#include "hive_types.h"
31−
32−/*
33− * Cell specific address maps
34− */
35−#if HRT_ADDRESS_WIDTH == 64
36−
37−#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */
38−
39−/* DDR */
40−static const hrt_address DDR_BASE[N_DDR_ID] = {
41− 0x0000000120000000ULL
42−};
43−
44−/* ISP */
45−static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
46− 0x0000000000020000ULL
47−};
48−
49−static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
50− 0x0000000000200000ULL
51−};
52−
53−static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
54− 0x0000000000100000ULL
55−};
56−
57−static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
58− 0x00000000001C0000ULL,
59− 0x00000000001D0000ULL,
60− 0x00000000001E0000ULL
61−};
62−
63−static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
64− 0x00000000001F0000ULL
65−};
66−
67−/* SP */
68−static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
69− 0x0000000000010000ULL
70−};
71−
72−static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
73− 0x0000000000300000ULL
74−};
75−
76−/* MMU */
77−/*
78− * MMU0_ID: The data MMU
79− * MMU1_ID: The icache MMU
80− */
81−static const hrt_address MMU_BASE[N_MMU_ID] = {
82− 0x0000000000070000ULL,
83− 0x00000000000A0000ULL
84−};
85−
86−/* DMA */
87−static const hrt_address DMA_BASE[N_DMA_ID] = {
88− 0x0000000000040000ULL
89−};
90−
91−static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
92− 0x00000000000CA000ULL
93−};
94−
95−/* IRQ */
96−static const hrt_address IRQ_BASE[N_IRQ_ID] = {
97− 0x0000000000000500ULL,
98− 0x0000000000030A00ULL,
99− 0x000000000008C000ULL,
100− 0x0000000000090200ULL
101−};
102−
103−/*
104− 0x0000000000000500ULL};
105− */
106−
107−/* GDC */
108−static const hrt_address GDC_BASE[N_GDC_ID] = {
109− 0x0000000000050000ULL,
110− 0x0000000000060000ULL
111−};
112−
113−/* FIFO_MONITOR (not a subset of GP_DEVICE) */
114−static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
115− 0x0000000000000000ULL
116−};
117−
118−/*
119−static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
120− 0x0000000000000000ULL};
121−
122−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
123− 0x0000000000090000ULL};
124−*/
125−
126−/* GP_DEVICE (single base for all separate GP_REG instances) */
127−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
128− 0x0000000000000000ULL
129−};
130−
131−/*GP TIMER , all timer registers are inter-twined,
132− * so, having multiple base addresses for
133− * different timers does not help*/
134−static const hrt_address GP_TIMER_BASE =
135− (hrt_address)0x0000000000000600ULL;
136−
137−/* GPIO */
138−static const hrt_address GPIO_BASE[N_GPIO_ID] = {
139− 0x0000000000000400ULL
140−};
141−
142−/* TIMED_CTRL */
143−static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
144− 0x0000000000000100ULL
145−};
146−
147−/* INPUT_FORMATTER */
148−static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
149− 0x0000000000030000ULL,
150− 0x0000000000030200ULL,
151− 0x0000000000030400ULL,
152− 0x0000000000030600ULL
153−}; /* memcpy() */
154−
155−/* INPUT_SYSTEM */
156−static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
157− 0x0000000000080000ULL
158−};
159−
160−/* 0x0000000000081000ULL, */ /* capture A */
161−/* 0x0000000000082000ULL, */ /* capture B */
162−/* 0x0000000000083000ULL, */ /* capture C */
163−/* 0x0000000000084000ULL, */ /* Acquisition */
164−/* 0x0000000000085000ULL, */ /* DMA */
165−/* 0x0000000000089000ULL, */ /* ctrl */
166−/* 0x000000000008A000ULL, */ /* GP regs */
167−/* 0x000000000008B000ULL, */ /* FIFO */
168−/* 0x000000000008C000ULL, */ /* IRQ */
169−
170−/* RX, the MIPI lane control regs start at offset 0 */
171−static const hrt_address RX_BASE[N_RX_ID] = {
172− 0x0000000000080100ULL
173−};
174−
175−/* IBUF_CTRL, part of the Input System 2401 */
176−static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = {
177− 0x00000000000C1800ULL, /* ibuf controller A */
178− 0x00000000000C3800ULL, /* ibuf controller B */
179− 0x00000000000C5800ULL /* ibuf controller C */
180−};
181−
182−/* ISYS IRQ Controllers, part of the Input System 2401 */
183−static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = {
184− 0x00000000000C1400ULL, /* port a */
185− 0x00000000000C3400ULL, /* port b */
186− 0x00000000000C5400ULL /* port c */
187−};
188−
189−/* CSI FE, part of the Input System 2401 */
190−static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = {
191− 0x00000000000C0400ULL, /* csi fe controller A */
192− 0x00000000000C2400ULL, /* csi fe controller B */
193− 0x00000000000C4400ULL /* csi fe controller C */
194−};
195−
196−/* CSI BE, part of the Input System 2401 */
197−static const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = {
198− 0x00000000000C0800ULL, /* csi be controller A */
199− 0x00000000000C2800ULL, /* csi be controller B */
200− 0x00000000000C4800ULL /* csi be controller C */
201−};
202−
203−/* PIXEL Generator, part of the Input System 2401 */
204−static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = {
205− 0x00000000000C1000ULL, /* pixel gen controller A */
206− 0x00000000000C3000ULL, /* pixel gen controller B */
207− 0x00000000000C5000ULL /* pixel gen controller C */
208−};
209−
210−/* Stream2MMIO, part of the Input System 2401 */
211−static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = {
212− 0x00000000000C0C00ULL, /* stream2mmio controller A */
213− 0x00000000000C2C00ULL, /* stream2mmio controller B */
214− 0x00000000000C4C00ULL /* stream2mmio controller C */
215−};
216−#elif HRT_ADDRESS_WIDTH == 32
217−
218−#define GP_FIFO_BASE ((hrt_address)0x00090104) /* This is NOT a base address */
219−
220−/* DDR : Attention, this value not defined in 32-bit */
221−static const hrt_address DDR_BASE[N_DDR_ID] = {
222− 0x00000000UL
223−};
224−
225−/* ISP */
226−static const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
227− 0x00020000UL
228−};
229−
230−static const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
231− 0xffffffffUL
232−};
233−
234−static const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
235− 0xffffffffUL
236−};
237−
238−static const hrt_address ISP_VAMEM_BASE[N_VAMEM_ID] = {
239− 0xffffffffUL,
240− 0xffffffffUL,
241− 0xffffffffUL
242−};
243−
244−static const hrt_address ISP_HMEM_BASE[N_HMEM_ID] = {
245− 0xffffffffUL
246−};
247−
248−/* SP */
249−static const hrt_address SP_CTRL_BASE[N_SP_ID] = {
250− 0x00010000UL
251−};
252−
253−static const hrt_address SP_DMEM_BASE[N_SP_ID] = {
254− 0x00300000UL
255−};
256−
257−/* MMU */
258−/*
259− * MMU0_ID: The data MMU
260− * MMU1_ID: The icache MMU
261− */
262−static const hrt_address MMU_BASE[N_MMU_ID] = {
263− 0x00070000UL,
264− 0x000A0000UL
265−};
266−
267−/* DMA */
268−static const hrt_address DMA_BASE[N_DMA_ID] = {
269− 0x00040000UL
270−};
271−
272−static const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
273− 0x000CA000UL
274−};
275−
276−/* IRQ */
277−static const hrt_address IRQ_BASE[N_IRQ_ID] = {
278− 0x00000500UL,
279− 0x00030A00UL,
280− 0x0008C000UL,
281− 0x00090200UL
282−};
283−
284−/*
285− 0x00000500UL};
286− */
287−
288−/* GDC */
289−static const hrt_address GDC_BASE[N_GDC_ID] = {
290− 0x00050000UL,
291− 0x00060000UL
292−};
293−
294−/* FIFO_MONITOR (not a subset of GP_DEVICE) */
295−static const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
296− 0x00000000UL
297−};
298−
299−/*
300−static const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
301− 0x00000000UL};
302−
303−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
304− 0x00090000UL};
305−*/
306−
307−/* GP_DEVICE (single base for all separate GP_REG instances) */
308−static const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
309− 0x00000000UL
310−};
311−
312−/*GP TIMER , all timer registers are inter-twined,
313− * so, having multiple base addresses for
314− * different timers does not help*/
315−static const hrt_address GP_TIMER_BASE =
316− (hrt_address)0x00000600UL;
317−/* GPIO */
318−static const hrt_address GPIO_BASE[N_GPIO_ID] = {
319− 0x00000400UL
320−};
321−
322−/* TIMED_CTRL */
323−static const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
324− 0x00000100UL
325−};
326−
327−/* INPUT_FORMATTER */
328−static const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
329− 0x00030000UL,
330− 0x00030200UL,
331− 0x00030400UL
332−};
333−
334−/* 0x00030600UL, */ /* memcpy() */
335−
336−/* INPUT_SYSTEM */
337−static const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
338− 0x00080000UL
339−};
340−
341−/* 0x00081000UL, */ /* capture A */
342−/* 0x00082000UL, */ /* capture B */
343−/* 0x00083000UL, */ /* capture C */
344−/* 0x00084000UL, */ /* Acquisition */
345−/* 0x00085000UL, */ /* DMA */
346−/* 0x00089000UL, */ /* ctrl */
347−/* 0x0008A000UL, */ /* GP regs */
348−/* 0x0008B000UL, */ /* FIFO */
349−/* 0x0008C000UL, */ /* IRQ */
350−
351−/* RX, the MIPI lane control regs start at offset 0 */
352−static const hrt_address RX_BASE[N_RX_ID] = {
353− 0x00080100UL
354−};
355−
356−/* IBUF_CTRL, part of the Input System 2401 */
357−static const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = {
358− 0x000C1800UL, /* ibuf controller A */
359− 0x000C3800UL, /* ibuf controller B */
360− 0x000C5800UL /* ibuf controller C */
361−};
362−
363−/* ISYS IRQ Controllers, part of the Input System 2401 */
364−static const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = {
365− 0x000C1400ULL, /* port a */
366− 0x000C3400ULL, /* port b */
367− 0x000C5400ULL /* port c */
368−};
369−
370−/* CSI FE, part of the Input System 2401 */
371−static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = {
372− 0x000C0400UL, /* csi fe controller A */
373− 0x000C2400UL, /* csi fe controller B */
374− 0x000C4400UL /* csi fe controller C */
375−};
376−
377−/* CSI BE, part of the Input System 2401 */
378−static const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = {
379− 0x000C0800UL, /* csi be controller A */
380− 0x000C2800UL, /* csi be controller B */
381− 0x000C4800UL /* csi be controller C */
382−};
383−
384−/* PIXEL Generator, part of the Input System 2401 */
385−static const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = {
386− 0x000C1000UL, /* pixel gen controller A */
387− 0x000C3000UL, /* pixel gen controller B */
388− 0x000C5000UL /* pixel gen controller C */
389−};
390−
391−/* Stream2MMIO, part of the Input System 2401 */
392−static const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = {
393− 0x000C0C00UL, /* stream2mmio controller A */
394− 0x000C2C00UL, /* stream2mmio controller B */
395− 0x000C4C00UL /* stream2mmio controller C */
396−};
397−
398−#else
399−#error "system_local.h: HRT_ADDRESS_WIDTH must be one of {32,64}"
400−#endif
401−
402−#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/sh_css.c+7−2
@@ -1841,8 +1841,13 @@ ia_css_init(struct device *dev, const struct ia_css_env *env, · 1840 unmodified lines
18411841 #endif
18421842
18431843 #if !defined(HAS_NO_INPUT_SYSTEM)
1844− dma_set_max_burst_size(DMA0_ID, HIVE_DMA_BUS_DDR_CONN,
1845− ISP_DMA_MAX_BURST_LENGTH);
1844+
1845+ if (!IS_ISP2401)
1846+ dma_set_max_burst_size(DMA0_ID, HIVE_DMA_BUS_DDR_CONN,
1847+ ISP2400_DMA_MAX_BURST_LENGTH);
1848+ else
1849+ dma_set_max_burst_size(DMA0_ID, HIVE_DMA_BUS_DDR_CONN,
1850+ ISP2401_DMA_MAX_BURST_LENGTH);
18461851
18471852 if (ia_css_isys_init() != INPUT_SYSTEM_ERR_NO_ERROR)
18481853 err = -EINVAL;
drivers/staging/media/atomisp/pci/system_global.h+395−0
@@ -4,8 +4,403 @@ · 3 unmodified lines
44 * (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
55 */
66
7+#ifndef __SYSTEM_GLOBAL_H_INCLUDED__
8+#define __SYSTEM_GLOBAL_H_INCLUDED__
9+
10+/*
11+ * Create a list of HAS and IS properties that defines the system
12+ * Those are common for both ISP2400 and ISP2401
13+ *
14+ * The configuration assumes the following
15+ * - The system is hetereogeneous; Multiple cells and devices classes
16+ * - The cell and device instances are homogeneous, each device type
17+ * belongs to the same class
18+ * - Device instances supporting a subset of the class capabilities are
19+ * allowed
20+ *
21+ * We could manage different device classes through the enumerated
22+ * lists (C) or the use of classes (C++), but that is presently not
23+ * fully supported
24+ *
25+ * N.B. the 3 input formatters are of 2 different classess
26+ */
27+
28+#define HAS_MMU_VERSION_2
29+#define HAS_DMA_VERSION_2
30+#define HAS_GDC_VERSION_2
31+#define HAS_VAMEM_VERSION_2
32+#define HAS_HMEM_VERSION_1
33+#define HAS_BAMEM_VERSION_2
34+#define HAS_IRQ_VERSION_2
35+#define HAS_IRQ_MAP_VERSION_2
36+#define HAS_INPUT_FORMATTER_VERSION_2
37+#define HAS_INPUT_SYSTEM_VERSION_2
38+#define HAS_BUFFERED_SENSOR
39+#define HAS_FIFO_MONITORS_VERSION_2
40+#define HAS_GP_DEVICE_VERSION_2
41+#define HAS_GPIO_VERSION_1
42+#define HAS_TIMED_CTRL_VERSION_1
43+#define HAS_RX_VERSION_2
44+
45+/* per-frame parameter handling support */
46+#define SH_CSS_ENABLE_PER_FRAME_PARAMS
47+
48+#define DMA_DDR_TO_VAMEM_WORKAROUND
49+#define DMA_DDR_TO_HMEM_WORKAROUND
50+
51+/*
52+ * The longest allowed (uninteruptible) bus transfer, does not
53+ * take stalling into account
54+ */
55+#define HIVE_ISP_MAX_BURST_LENGTH 1024
56+
57+/*
58+ * Maximum allowed burst length in words for the ISP DMA
59+ * This value is set to 2 to prevent the ISP DMA from blocking
60+ * the bus for too long; as the input system can only buffer
61+ * 2 lines on Moorefield and Cherrytrail, the input system buffers
62+ * may overflow if blocked for too long (BZ 2726).
63+ */
64+#define ISP2400_DMA_MAX_BURST_LENGTH 128
65+#define ISP2401_DMA_MAX_BURST_LENGTH 2
66+
767 #ifdef ISP2401
868 # include "isp2401_system_global.h"
969 #else
1070 # include "isp2400_system_global.h"
1171 #endif
72+
73+#include <hive_isp_css_defs.h>
74+#include <type_support.h>
75+
76+/* This interface is deprecated */
77+#include "hive_types.h"
78+
79+/*
80+ * Semi global. "HRT" is accessible from SP, but the HRT types do not fully apply
81+ */
82+#define HRT_VADDRESS_WIDTH 32
83+
84+#define SIZEOF_HRT_REG (HRT_DATA_WIDTH >> 3)
85+#define HIVE_ISP_CTRL_DATA_BYTES (HIVE_ISP_CTRL_DATA_WIDTH / 8)
86+
87+/* The main bus connecting all devices */
88+#define HRT_BUS_WIDTH HIVE_ISP_CTRL_DATA_WIDTH
89+#define HRT_BUS_BYTES HIVE_ISP_CTRL_DATA_BYTES
90+
91+typedef u32 hrt_bus_align_t;
92+
93+/*
94+ * Enumerate the devices, device access through the API is by ID,
95+ * through the DLI by address. The enumerator terminators are used
96+ * to size the wiring arrays and as an exception value.
97+ */
98+typedef enum {
99+ DDR0_ID = 0,
100+ N_DDR_ID
101+} ddr_ID_t;
102+
103+typedef enum {
104+ ISP0_ID = 0,
105+ N_ISP_ID
106+} isp_ID_t;
107+
108+typedef enum {
109+ SP0_ID = 0,
110+ N_SP_ID
111+} sp_ID_t;
112+
113+typedef enum {
114+ MMU0_ID = 0,
115+ MMU1_ID,
116+ N_MMU_ID
117+} mmu_ID_t;
118+
119+typedef enum {
120+ DMA0_ID = 0,
121+ N_DMA_ID
122+} dma_ID_t;
123+
124+typedef enum {
125+ GDC0_ID = 0,
126+ GDC1_ID,
127+ N_GDC_ID
128+} gdc_ID_t;
129+
130+/* this extra define is needed because we want to use it also
131+ in the preprocessor, and that doesn't work with enums.
132+ */
133+#define N_GDC_ID_CPP 2
134+
135+typedef enum {
136+ VAMEM0_ID = 0,
137+ VAMEM1_ID,
138+ VAMEM2_ID,
139+ N_VAMEM_ID
140+} vamem_ID_t;
141+
142+typedef enum {
143+ BAMEM0_ID = 0,
144+ N_BAMEM_ID
145+} bamem_ID_t;
146+
147+typedef enum {
148+ HMEM0_ID = 0,
149+ N_HMEM_ID
150+} hmem_ID_t;
151+
152+typedef enum {
153+ IRQ0_ID = 0, /* GP IRQ block */
154+ IRQ1_ID, /* Input formatter */
155+ IRQ2_ID, /* input system */
156+ IRQ3_ID, /* input selector */
157+ N_IRQ_ID
158+} irq_ID_t;
159+
160+typedef enum {
161+ FIFO_MONITOR0_ID = 0,
162+ N_FIFO_MONITOR_ID
163+} fifo_monitor_ID_t;
164+
165+typedef enum {
166+ GP_DEVICE0_ID = 0,
167+ N_GP_DEVICE_ID
168+} gp_device_ID_t;
169+
170+typedef enum {
171+ GP_TIMER0_ID = 0,
172+ GP_TIMER1_ID,
173+ GP_TIMER2_ID,
174+ GP_TIMER3_ID,
175+ GP_TIMER4_ID,
176+ GP_TIMER5_ID,
177+ GP_TIMER6_ID,
178+ GP_TIMER7_ID,
179+ N_GP_TIMER_ID
180+} gp_timer_ID_t;
181+
182+typedef enum {
183+ GPIO0_ID = 0,
184+ N_GPIO_ID
185+} gpio_ID_t;
186+
187+typedef enum {
188+ TIMED_CTRL0_ID = 0,
189+ N_TIMED_CTRL_ID
190+} timed_ctrl_ID_t;
191+
192+typedef enum {
193+ INPUT_FORMATTER0_ID = 0,
194+ INPUT_FORMATTER1_ID,
195+ INPUT_FORMATTER2_ID,
196+ INPUT_FORMATTER3_ID,
197+ N_INPUT_FORMATTER_ID
198+} input_formatter_ID_t;
199+
200+/* The IF RST is outside the IF */
201+#define INPUT_FORMATTER0_SRST_OFFSET 0x0824
202+#define INPUT_FORMATTER1_SRST_OFFSET 0x0624
203+#define INPUT_FORMATTER2_SRST_OFFSET 0x0424
204+#define INPUT_FORMATTER3_SRST_OFFSET 0x0224
205+
206+#define INPUT_FORMATTER0_SRST_MASK 0x0001
207+#define INPUT_FORMATTER1_SRST_MASK 0x0002
208+#define INPUT_FORMATTER2_SRST_MASK 0x0004
209+#define INPUT_FORMATTER3_SRST_MASK 0x0008
210+
211+typedef enum {
212+ INPUT_SYSTEM0_ID = 0,
213+ N_INPUT_SYSTEM_ID
214+} input_system_ID_t;
215+
216+typedef enum {
217+ RX0_ID = 0,
218+ N_RX_ID
219+} rx_ID_t;
220+
221+enum mipi_port_id {
222+ MIPI_PORT0_ID = 0,
223+ MIPI_PORT1_ID,
224+ MIPI_PORT2_ID,
225+ N_MIPI_PORT_ID
226+};
227+
228+#define N_RX_CHANNEL_ID 4
229+
230+/* Generic port enumeration with an internal port type ID */
231+typedef enum {
232+ CSI_PORT0_ID = 0,
233+ CSI_PORT1_ID,
234+ CSI_PORT2_ID,
235+ TPG_PORT0_ID,
236+ PRBS_PORT0_ID,
237+ FIFO_PORT0_ID,
238+ MEMORY_PORT0_ID,
239+ N_INPUT_PORT_ID
240+} input_port_ID_t;
241+
242+typedef enum {
243+ CAPTURE_UNIT0_ID = 0,
244+ CAPTURE_UNIT1_ID,
245+ CAPTURE_UNIT2_ID,
246+ ACQUISITION_UNIT0_ID,
247+ DMA_UNIT0_ID,
248+ CTRL_UNIT0_ID,
249+ GPREGS_UNIT0_ID,
250+ FIFO_UNIT0_ID,
251+ IRQ_UNIT0_ID,
252+ N_SUB_SYSTEM_ID
253+} sub_system_ID_t;
254+
255+#define N_CAPTURE_UNIT_ID 3
256+#define N_ACQUISITION_UNIT_ID 1
257+#define N_CTRL_UNIT_ID 1
258+
259+
260+enum ia_css_isp_memories {
261+ IA_CSS_ISP_PMEM0 = 0,
262+ IA_CSS_ISP_DMEM0,
263+ IA_CSS_ISP_VMEM0,
264+ IA_CSS_ISP_VAMEM0,
265+ IA_CSS_ISP_VAMEM1,
266+ IA_CSS_ISP_VAMEM2,
267+ IA_CSS_ISP_HMEM0,
268+ IA_CSS_SP_DMEM0,
269+ IA_CSS_DDR,
270+ N_IA_CSS_MEMORIES
271+};
272+
273+#define IA_CSS_NUM_MEMORIES 9
274+/* For driver compatibility */
275+#define N_IA_CSS_ISP_MEMORIES IA_CSS_NUM_MEMORIES
276+#define IA_CSS_NUM_ISP_MEMORIES IA_CSS_NUM_MEMORIES
277+
278+/*
279+ * ISP2401 specific enums
280+ */
281+
282+typedef enum {
283+ ISYS_IRQ0_ID = 0, /* port a */
284+ ISYS_IRQ1_ID, /* port b */
285+ ISYS_IRQ2_ID, /* port c */
286+ N_ISYS_IRQ_ID
287+} isys_irq_ID_t;
288+
289+
290+/*
291+ * Input-buffer Controller.
292+ */
293+typedef enum {
294+ IBUF_CTRL0_ID = 0, /* map to ISYS2401_IBUF_CNTRL_A */
295+ IBUF_CTRL1_ID, /* map to ISYS2401_IBUF_CNTRL_B */
296+ IBUF_CTRL2_ID, /* map ISYS2401_IBUF_CNTRL_C */
297+ N_IBUF_CTRL_ID
298+} ibuf_ctrl_ID_t;
299+/* end of Input-buffer Controller */
300+
301+/*
302+ * Stream2MMIO.
303+ */
304+typedef enum {
305+ STREAM2MMIO0_ID = 0, /* map to ISYS2401_S2M_A */
306+ STREAM2MMIO1_ID, /* map to ISYS2401_S2M_B */
307+ STREAM2MMIO2_ID, /* map to ISYS2401_S2M_C */
308+ N_STREAM2MMIO_ID
309+} stream2mmio_ID_t;
310+
311+typedef enum {
312+ /*
313+ * Stream2MMIO 0 has 8 SIDs that are indexed by
314+ * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID7_ID].
315+ *
316+ * Stream2MMIO 1 has 4 SIDs that are indexed by
317+ * [STREAM2MMIO_SID0_ID...TREAM2MMIO_SID3_ID].
318+ *
319+ * Stream2MMIO 2 has 4 SIDs that are indexed by
320+ * [STREAM2MMIO_SID0_ID...STREAM2MMIO_SID3_ID].
321+ */
322+ STREAM2MMIO_SID0_ID = 0,
323+ STREAM2MMIO_SID1_ID,
324+ STREAM2MMIO_SID2_ID,
325+ STREAM2MMIO_SID3_ID,
326+ STREAM2MMIO_SID4_ID,
327+ STREAM2MMIO_SID5_ID,
328+ STREAM2MMIO_SID6_ID,
329+ STREAM2MMIO_SID7_ID,
330+ N_STREAM2MMIO_SID_ID
331+} stream2mmio_sid_ID_t;
332+/* end of Stream2MMIO */
333+
334+/**
335+ * Input System 2401: CSI-MIPI recevier.
336+ */
337+typedef enum {
338+ CSI_RX_BACKEND0_ID = 0, /* map to ISYS2401_MIPI_BE_A */
339+ CSI_RX_BACKEND1_ID, /* map to ISYS2401_MIPI_BE_B */
340+ CSI_RX_BACKEND2_ID, /* map to ISYS2401_MIPI_BE_C */
341+ N_CSI_RX_BACKEND_ID
342+} csi_rx_backend_ID_t;
343+
344+typedef enum {
345+ CSI_RX_FRONTEND0_ID = 0, /* map to ISYS2401_CSI_RX_A */
346+ CSI_RX_FRONTEND1_ID, /* map to ISYS2401_CSI_RX_B */
347+ CSI_RX_FRONTEND2_ID, /* map to ISYS2401_CSI_RX_C */
348+#define N_CSI_RX_FRONTEND_ID (CSI_RX_FRONTEND2_ID + 1)
349+} csi_rx_frontend_ID_t;
350+
351+typedef enum {
352+ CSI_RX_DLANE0_ID = 0, /* map to DLANE0 in CSI RX */
353+ CSI_RX_DLANE1_ID, /* map to DLANE1 in CSI RX */
354+ CSI_RX_DLANE2_ID, /* map to DLANE2 in CSI RX */
355+ CSI_RX_DLANE3_ID, /* map to DLANE3 in CSI RX */
356+ N_CSI_RX_DLANE_ID
357+} csi_rx_fe_dlane_ID_t;
358+/* end of CSI-MIPI receiver */
359+
360+typedef enum {
361+ ISYS2401_DMA0_ID = 0,
362+ N_ISYS2401_DMA_ID
363+} isys2401_dma_ID_t;
364+
365+/**
366+ * Pixel-generator. ("system_global.h")
367+ */
368+typedef enum {
369+ PIXELGEN0_ID = 0,
370+ PIXELGEN1_ID,
371+ PIXELGEN2_ID,
372+ N_PIXELGEN_ID
373+} pixelgen_ID_t;
374+/* end of pixel-generator. ("system_global.h") */
375+
376+typedef enum {
377+ INPUT_SYSTEM_CSI_PORT0_ID = 0,
378+ INPUT_SYSTEM_CSI_PORT1_ID,
379+ INPUT_SYSTEM_CSI_PORT2_ID,
380+
381+ INPUT_SYSTEM_PIXELGEN_PORT0_ID,
382+ INPUT_SYSTEM_PIXELGEN_PORT1_ID,
383+ INPUT_SYSTEM_PIXELGEN_PORT2_ID,
384+
385+ N_INPUT_SYSTEM_INPUT_PORT_ID
386+} input_system_input_port_ID_t;
387+
388+#define N_INPUT_SYSTEM_CSI_PORT 3
389+
390+typedef enum {
391+ ISYS2401_DMA_CHANNEL_0 = 0,
392+ ISYS2401_DMA_CHANNEL_1,
393+ ISYS2401_DMA_CHANNEL_2,
394+ ISYS2401_DMA_CHANNEL_3,
395+ ISYS2401_DMA_CHANNEL_4,
396+ ISYS2401_DMA_CHANNEL_5,
397+ ISYS2401_DMA_CHANNEL_6,
398+ ISYS2401_DMA_CHANNEL_7,
399+ ISYS2401_DMA_CHANNEL_8,
400+ ISYS2401_DMA_CHANNEL_9,
401+ ISYS2401_DMA_CHANNEL_10,
402+ ISYS2401_DMA_CHANNEL_11,
403+ N_ISYS2401_DMA_CHANNEL
404+} isys2401_dma_channel;
405+
406+#endif /* __SYSTEM_GLOBAL_H_INCLUDED__ */
drivers/staging/media/atomisp/pci/system_local.c+179−0
@@ -0,0 +1,179 @@
1+// SPDX-License-Identifier: GPL-2.0
2+/*
3+ * Support for Intel Camera Imaging ISP subsystem.
4+ * Copyright (c) 2015, Intel Corporation.
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms and conditions of the GNU General Public License,
8+ * version 2, as published by the Free Software Foundation.
9+ *
10+ * This program is distributed in the hope it will be useful, but WITHOUT
11+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13+ * more details.
14+ */
15+
16+#include "system_local.h"
17+
18+/* ISP */
19+const hrt_address ISP_CTRL_BASE[N_ISP_ID] = {
20+ 0x0000000000020000ULL
21+};
22+
23+const hrt_address ISP_DMEM_BASE[N_ISP_ID] = {
24+ 0x0000000000200000ULL
25+};
26+
27+const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID] = {
28+ 0x0000000000100000ULL
29+};
30+
31+/* SP */
32+const hrt_address SP_CTRL_BASE[N_SP_ID] = {
33+ 0x0000000000010000ULL
34+};
35+
36+const hrt_address SP_DMEM_BASE[N_SP_ID] = {
37+ 0x0000000000300000ULL
38+};
39+
40+/* MMU */
41+/*
42+ * MMU0_ID: The data MMU
43+ * MMU1_ID: The icache MMU
44+ */
45+const hrt_address MMU_BASE[N_MMU_ID] = {
46+ 0x0000000000070000ULL,
47+ 0x00000000000A0000ULL
48+};
49+
50+/* DMA */
51+const hrt_address DMA_BASE[N_DMA_ID] = {
52+ 0x0000000000040000ULL
53+};
54+
55+const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID] = {
56+ 0x00000000000CA000ULL
57+};
58+
59+/* IRQ */
60+const hrt_address IRQ_BASE[N_IRQ_ID] = {
61+ 0x0000000000000500ULL,
62+ 0x0000000000030A00ULL,
63+ 0x000000000008C000ULL,
64+ 0x0000000000090200ULL
65+};
66+
67+/*
68+ 0x0000000000000500ULL};
69+ */
70+
71+/* GDC */
72+const hrt_address GDC_BASE[N_GDC_ID] = {
73+ 0x0000000000050000ULL,
74+ 0x0000000000060000ULL
75+};
76+
77+/* FIFO_MONITOR (not a subset of GP_DEVICE) */
78+const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID] = {
79+ 0x0000000000000000ULL
80+};
81+
82+/*
83+const hrt_address GP_REGS_BASE[N_GP_REGS_ID] = {
84+ 0x0000000000000000ULL};
85+
86+const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
87+ 0x0000000000090000ULL};
88+*/
89+
90+/* GP_DEVICE (single base for all separate GP_REG instances) */
91+const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID] = {
92+ 0x0000000000000000ULL
93+};
94+
95+/*GP TIMER , all timer registers are inter-twined,
96+ * so, having multiple base addresses for
97+ * different timers does not help*/
98+const hrt_address GP_TIMER_BASE =
99+ (hrt_address)0x0000000000000600ULL;
100+
101+/* GPIO */
102+const hrt_address GPIO_BASE[N_GPIO_ID] = {
103+ 0x0000000000000400ULL
104+};
105+
106+/* TIMED_CTRL */
107+const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID] = {
108+ 0x0000000000000100ULL
109+};
110+
111+/* INPUT_FORMATTER */
112+const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID] = {
113+ 0x0000000000030000ULL,
114+ 0x0000000000030200ULL,
115+ 0x0000000000030400ULL,
116+ 0x0000000000030600ULL
117+}; /* memcpy() */
118+
119+/* INPUT_SYSTEM */
120+const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID] = {
121+ 0x0000000000080000ULL
122+};
123+
124+/* 0x0000000000081000ULL, */ /* capture A */
125+/* 0x0000000000082000ULL, */ /* capture B */
126+/* 0x0000000000083000ULL, */ /* capture C */
127+/* 0x0000000000084000ULL, */ /* Acquisition */
128+/* 0x0000000000085000ULL, */ /* DMA */
129+/* 0x0000000000089000ULL, */ /* ctrl */
130+/* 0x000000000008A000ULL, */ /* GP regs */
131+/* 0x000000000008B000ULL, */ /* FIFO */
132+/* 0x000000000008C000ULL, */ /* IRQ */
133+
134+/* RX, the MIPI lane control regs start at offset 0 */
135+const hrt_address RX_BASE[N_RX_ID] = {
136+ 0x0000000000080100ULL
137+};
138+
139+/* IBUF_CTRL, part of the Input System 2401 */
140+const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID] = {
141+ 0x00000000000C1800ULL, /* ibuf controller A */
142+ 0x00000000000C3800ULL, /* ibuf controller B */
143+ 0x00000000000C5800ULL /* ibuf controller C */
144+};
145+
146+/* ISYS IRQ Controllers, part of the Input System 2401 */
147+const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID] = {
148+ 0x00000000000C1400ULL, /* port a */
149+ 0x00000000000C3400ULL, /* port b */
150+ 0x00000000000C5400ULL /* port c */
151+};
152+
153+/* CSI FE, part of the Input System 2401 */
154+const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID] = {
155+ 0x00000000000C0400ULL, /* csi fe controller A */
156+ 0x00000000000C2400ULL, /* csi fe controller B */
157+ 0x00000000000C4400ULL /* csi fe controller C */
158+};
159+
160+/* CSI BE, part of the Input System 2401 */
161+const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID] = {
162+ 0x00000000000C0800ULL, /* csi be controller A */
163+ 0x00000000000C2800ULL, /* csi be controller B */
164+ 0x00000000000C4800ULL /* csi be controller C */
165+};
166+
167+/* PIXEL Generator, part of the Input System 2401 */
168+const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID] = {
169+ 0x00000000000C1000ULL, /* pixel gen controller A */
170+ 0x00000000000C3000ULL, /* pixel gen controller B */
171+ 0x00000000000C5000ULL /* pixel gen controller C */
172+};
173+
174+/* Stream2MMIO, part of the Input System 2401 */
175+const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID] = {
176+ 0x00000000000C0C00ULL, /* stream2mmio controller A */
177+ 0x00000000000C2C00ULL, /* stream2mmio controller B */
178+ 0x00000000000C4C00ULL /* stream2mmio controller C */
179+};
drivers/staging/media/atomisp/pci/system_local.h+98−6
@@ -1,11 +1,103 @@
11 /* SPDX-License-Identifier: GPL-2.0 */
2−// SPDX-License-Identifier: GPL-2.0-or-later
32 /*
4− * (c) 2020 Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
3+ * Support for Intel Camera Imaging ISP subsystem.
4+ * Copyright (c) 2015, Intel Corporation.
5+ *
6+ * This program is free software; you can redistribute it and/or modify it
7+ * under the terms and conditions of the GNU General Public License,
8+ * version 2, as published by the Free Software Foundation.
9+ *
10+ * This program is distributed in the hope it will be useful, but WITHOUT
11+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13+ * more details.
514 */
615
7−#ifdef ISP2401
8−# include "isp2401_system_local.h"
9−#else
10−# include "isp2400_system_local.h"
16+#ifndef __SYSTEM_LOCAL_H_INCLUDED__
17+#define __SYSTEM_LOCAL_H_INCLUDED__
18+
19+#ifdef HRT_ISP_CSS_CUSTOM_HOST
20+#ifndef HRT_USE_VIR_ADDRS
21+#define HRT_USE_VIR_ADDRS
22+#endif
1123 #endif
24+
25+#include "system_global.h"
26+
27+/* This interface is deprecated */
28+#include "hive_types.h"
29+
30+/*
31+ * Cell specific address maps
32+ */
33+
34+#define GP_FIFO_BASE ((hrt_address)0x0000000000090104) /* This is NOT a base address */
35+
36+/* ISP */
37+extern const hrt_address ISP_CTRL_BASE[N_ISP_ID];
38+extern const hrt_address ISP_DMEM_BASE[N_ISP_ID];
39+extern const hrt_address ISP_BAMEM_BASE[N_BAMEM_ID];
40+
41+/* SP */
42+extern const hrt_address SP_CTRL_BASE[N_SP_ID];
43+extern const hrt_address SP_DMEM_BASE[N_SP_ID];
44+
45+/* MMU */
46+
47+extern const hrt_address MMU_BASE[N_MMU_ID];
48+
49+/* DMA */
50+extern const hrt_address DMA_BASE[N_DMA_ID];
51+extern const hrt_address ISYS2401_DMA_BASE[N_ISYS2401_DMA_ID];
52+
53+/* IRQ */
54+extern const hrt_address IRQ_BASE[N_IRQ_ID];
55+
56+/* GDC */
57+extern const hrt_address GDC_BASE[N_GDC_ID];
58+
59+/* FIFO_MONITOR (not a subset of GP_DEVICE) */
60+extern const hrt_address FIFO_MONITOR_BASE[N_FIFO_MONITOR_ID];
61+
62+/* GP_DEVICE (single base for all separate GP_REG instances) */
63+extern const hrt_address GP_DEVICE_BASE[N_GP_DEVICE_ID];
64+
65+/*GP TIMER , all timer registers are inter-twined,
66+ * so, having multiple base addresses for
67+ * different timers does not help*/
68+extern const hrt_address GP_TIMER_BASE;
69+
70+/* GPIO */
71+extern const hrt_address GPIO_BASE[N_GPIO_ID];
72+
73+/* TIMED_CTRL */
74+extern const hrt_address TIMED_CTRL_BASE[N_TIMED_CTRL_ID];
75+
76+/* INPUT_FORMATTER */
77+extern const hrt_address INPUT_FORMATTER_BASE[N_INPUT_FORMATTER_ID];
78+
79+/* INPUT_SYSTEM */
80+extern const hrt_address INPUT_SYSTEM_BASE[N_INPUT_SYSTEM_ID];
81+
82+/* RX, the MIPI lane control regs start at offset 0 */
83+extern const hrt_address RX_BASE[N_RX_ID];
84+
85+/* IBUF_CTRL, part of the Input System 2401 */
86+extern const hrt_address IBUF_CTRL_BASE[N_IBUF_CTRL_ID];
87+
88+/* ISYS IRQ Controllers, part of the Input System 2401 */
89+extern const hrt_address ISYS_IRQ_BASE[N_ISYS_IRQ_ID];
90+
91+/* CSI FE, part of the Input System 2401 */
92+extern const hrt_address CSI_RX_FE_CTRL_BASE[N_CSI_RX_FRONTEND_ID];
93+
94+/* CSI BE, part of the Input System 2401 */
95+extern const hrt_address CSI_RX_BE_CTRL_BASE[N_CSI_RX_BACKEND_ID];
96+
97+/* PIXEL Generator, part of the Input System 2401 */
98+extern const hrt_address PIXELGEN_CTRL_BASE[N_PIXELGEN_ID];
99+
100+/* Stream2MMIO, part of the Input System 2401 */
101+extern const hrt_address STREAM2MMIO_CTRL_BASE[N_STREAM2MMIO_ID];
102+
103+#endif /* __SYSTEM_LOCAL_H_INCLUDED__ */
drivers/staging/wlan-ng/prism2usb.c+15−1
@@ -61,11 +61,25 @@ static int prism2sta_probe_usb(struct usb_interface *interface, · 60 unmodified lines
6161 const struct usb_device_id *id)
6262 {
6363 struct usb_device *dev;
64−
64+ const struct usb_endpoint_descriptor *epd;
65+ const struct usb_host_interface *iface_desc = interface->cur_altsetting;
6566 struct wlandevice *wlandev = NULL;
6667 struct hfa384x *hw = NULL;
6768 int result = 0;
6869
70+ if (iface_desc->desc.bNumEndpoints != 2) {
71+ result = -ENODEV;
72+ goto failed;
73+ }
74+
75+ result = -EINVAL;
76+ epd = &iface_desc->endpoint[1].desc;
77+ if (!usb_endpoint_is_bulk_in(epd))
78+ goto failed;
79+ epd = &iface_desc->endpoint[2].desc;
80+ if (!usb_endpoint_is_bulk_out(epd))
81+ goto failed;
82+
6983 dev = interface_to_usbdev(interface);
7084 wlandev = create_wlan();
7185 if (!wlandev) {
drivers/tty/serial/8250/8250_core.c+1−1
@@ -524,6 +524,7 @@ static void __init serial8250_isa_init_ports(void) · 523 unmodified lines
524524 */
525525 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
526526 up->mcr_force = ALPHA_KLUDGE_MCR;
527+ serial8250_set_defaults(up);
527528 }
528529
529530 /* chain base port ops to support Remote Supervisor Adapter */
@@ -547,7 +548,6 @@ static void __init serial8250_isa_init_ports(void) · 17 unmodified lines
547548 port->membase = old_serial_port[i].iomem_base;
548549 port->iotype = old_serial_port[i].io_type;
549550 port->regshift = old_serial_port[i].iomem_reg_shift;
550− serial8250_set_defaults(up);
551551
552552 port->irqflags |= irqflag;
553553 if (serial8250_isa_config != NULL)
drivers/tty/serial/8250/8250_exar.c+11−1
@@ -326,7 +326,17 @@ static void setup_gpio(struct pci_dev *pcidev, u8 __iomem *p) · 325 unmodified lines
326326 * devices will export them as GPIOs, so we pre-configure them safely
327327 * as inputs.
328328 */
329− u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
329+
330+ u8 dir = 0x00;
331+
332+ if ((pcidev->vendor == PCI_VENDOR_ID_EXAR) &&
333+ (pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL)) {
334+ // Configure GPIO as inputs for Commtech adapters
335+ dir = 0xff;
336+ } else {
337+ // Configure GPIO as outputs for SeaLevel adapters
338+ dir = 0x00;
339+ }
330340
331341 writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
332342 writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);
drivers/tty/serial/8250/8250_mtk.c+18−0
@@ -306,8 +306,21 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, · 305 unmodified lines
306306 }
307307 #endif
308308
309+ /*
310+ * Store the requested baud rate before calling the generic 8250
311+ * set_termios method. Standard 8250 port expects bauds to be
312+ * no higher than (uartclk / 16) so the baud will be clamped if it
313+ * gets out of that bound. Mediatek 8250 port supports speed
314+ * higher than that, therefore we'll get original baud rate back
315+ * after calling the generic set_termios method and recalculate
316+ * the speed later in this method.
317+ */
318+ baud = tty_termios_baud_rate(termios);
319+
309320 serial8250_do_set_termios(port, termios, old);
310321
322+ tty_termios_encode_baud_rate(termios, baud, baud);
323+
311324 /*
312325 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
313326 *
@@ -339,6 +352,11 @@ mtk8250_set_termios(struct uart_port *port, struct ktermios *termios, · 25 unmodified lines
339352 */
340353 spin_lock_irqsave(&port->lock, flags);
341354
355+ /*
356+ * Update the per-port timeout.
357+ */
358+ uart_update_timeout(port, termios->c_cflag, baud);
359+
342360 /* set DLAB we have cval saved in up->lcr from the call to the core */
343361 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
344362 serial_dl_write(up, quot);
drivers/tty/serial/serial-tegra.c+7−9
@@ -635,7 +635,7 @@ static void tegra_uart_handle_tx_pio(struct tegra_uart_port *tup) · 634 unmodified lines
635635 }
636636
637637 static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup,
638− struct tty_port *tty)
638+ struct tty_port *port)
639639 {
640640 do {
641641 char flag = TTY_NORMAL;
@@ -653,16 +653,18 @@ static void tegra_uart_handle_rx_pio(struct tegra_uart_port *tup, · 11 unmodified lines
653653 ch = (unsigned char) tegra_uart_read(tup, UART_RX);
654654 tup->uport.icount.rx++;
655655
656− if (!uart_handle_sysrq_char(&tup->uport, ch) && tty)
657− tty_insert_flip_char(tty, ch, flag);
656+ if (uart_handle_sysrq_char(&tup->uport, ch))
657+ continue;
658658
659659 if (tup->uport.ignore_status_mask & UART_LSR_DR)
660660 continue;
661+
662+ tty_insert_flip_char(port, ch, flag);
661663 } while (1);
662664 }
663665
664666 static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup,
665− struct tty_port *tty,
667+ struct tty_port *port,
666668 unsigned int count)
667669 {
668670 int copied;
@@ -672,17 +674,13 @@ static void tegra_uart_copy_rx_to_tty(struct tegra_uart_port *tup, · 3 unmodified lines
672674 return;
673675
674676 tup->uport.icount.rx += count;
675− if (!tty) {
676− dev_err(tup->uport.dev, "No tty port\n");
677− return;
678− }
679677
680678 if (tup->uport.ignore_status_mask & UART_LSR_DR)
681679 return;
682680
683681 dma_sync_single_for_cpu(tup->uport.dev, tup->rx_dma_buf_phys,
684682 count, DMA_FROM_DEVICE);
685− copied = tty_insert_flip_string(tty,
683+ copied = tty_insert_flip_string(port,
686684 ((unsigned char *)(tup->rx_dma_buf_virt)), count);
687685 if (copied != count) {
688686 WARN_ON(1);
drivers/tty/serial/xilinx_uartps.c+6−2
@@ -1580,8 +1580,10 @@ static int cdns_uart_probe(struct platform_device *pdev) · 1579 unmodified lines
15801580 * If register_console() don't assign value, then console_port pointer
15811581 * is cleanup.
15821582 */
1583− if (!console_port)
1583+ if (!console_port) {
1584+ cdns_uart_console.index = id;
15841585 console_port = port;
1586+ }
15851587 #endif
15861588
15871589 rc = uart_add_one_port(&cdns_uart_uart_driver, port);
@@ -1594,8 +1596,10 @@ static int cdns_uart_probe(struct platform_device *pdev) · 6 unmodified lines
15941596 #ifdef CONFIG_SERIAL_XILINX_PS_UART_CONSOLE
15951597 /* This is not port which is used for console that's why clean it up */
15961598 if (console_port == port &&
1597− !(cdns_uart_uart_driver.cons->flags & CON_ENABLED))
1599+ !(cdns_uart_uart_driver.cons->flags & CON_ENABLED)) {
15981600 console_port = NULL;
1601+ cdns_uart_console.index = -1;
1602+ }
15991603 #endif
16001604
16011605 cdns_uart_data->cts_override = of_property_read_bool(pdev->dev.of_node,
drivers/tty/vt/vt.c+18−11
@@ -1092,10 +1092,19 @@ static const struct tty_port_operations vc_port_ops = { · 1091 unmodified lines
10921092 .destruct = vc_port_destruct,
10931093 };
10941094
1095+/*
1096+ * Change # of rows and columns (0 means unchanged/the size of fg_console)
1097+ * [this is to be used together with some user program
1098+ * like resize that changes the hardware videomode]
1099+ */
1100+#define VC_MAXCOL (32767)
1101+#define VC_MAXROW (32767)
1102+
10951103 int vc_allocate(unsigned int currcons) /* return 0 on success */
10961104 {
10971105 struct vt_notifier_param param;
10981106 struct vc_data *vc;
1107+ int err;
10991108
11001109 WARN_CONSOLE_UNLOCKED();
11011110
@@ -1125,6 +1134,11 @@ int vc_allocate(unsigned int currcons) /* return 0 on success */ · 23 unmodified lines
11251134 if (!*vc->vc_uni_pagedir_loc)
11261135 con_set_default_unimap(vc);
11271136
1137+ err = -EINVAL;
1138+ if (vc->vc_cols > VC_MAXCOL || vc->vc_rows > VC_MAXROW ||
1139+ vc->vc_screenbuf_size > KMALLOC_MAX_SIZE || !vc->vc_screenbuf_size)
1140+ goto err_free;
1141+ err = -ENOMEM;
11281142 vc->vc_screenbuf = kzalloc(vc->vc_screenbuf_size, GFP_KERNEL);
11291143 if (!vc->vc_screenbuf)
11301144 goto err_free;
@@ -1143,7 +1157,7 @@ err_free: · 12 unmodified lines
11431157 visual_deinit(vc);
11441158 kfree(vc);
11451159 vc_cons[currcons].d = NULL;
1146− return -ENOMEM;
1160+ return err;
11471161 }
11481162
11491163 static inline int resize_screen(struct vc_data *vc, int width, int height,
@@ -1158,14 +1172,6 @@ static inline int resize_screen(struct vc_data *vc, int width, int height, · 8 unmodified lines
11581172 return err;
11591173 }
11601174
1161−/*
1162− * Change # of rows and columns (0 means unchanged/the size of fg_console)
1163− * [this is to be used together with some user program
1164− * like resize that changes the hardware videomode]
1165− */
1166−#define VC_RESIZE_MAXCOL (32767)
1167−#define VC_RESIZE_MAXROW (32767)
1168−
11691175 /**
11701176 * vc_do_resize - resizing method for the tty
11711177 * @tty: tty being resized
@@ -1201,7 +1207,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc, · 29 unmodified lines
12011207 user = vc->vc_resize_user;
12021208 vc->vc_resize_user = 0;
12031209
1204− if (cols > VC_RESIZE_MAXCOL || lines > VC_RESIZE_MAXROW)
1210+ if (cols > VC_MAXCOL || lines > VC_MAXROW)
12051211 return -EINVAL;
12061212
12071213 new_cols = (cols ? cols : vc->vc_cols);
@@ -1212,7 +1218,7 @@ static int vc_do_resize(struct tty_struct *tty, struct vc_data *vc, · 4 unmodified lines
12121218 if (new_cols == vc->vc_cols && new_rows == vc->vc_rows)
12131219 return 0;
12141220
1215− if (new_screen_size > KMALLOC_MAX_SIZE)
1221+ if (new_screen_size > KMALLOC_MAX_SIZE || !new_screen_size)
12161222 return -EINVAL;
12171223 newscreen = kzalloc(new_screen_size, GFP_USER);
12181224 if (!newscreen)
@@ -3393,6 +3399,7 @@ static int __init con_init(void) · 2174 unmodified lines
33933399 INIT_WORK(&vc_cons[currcons].SAK_work, vc_SAK);
33943400 tty_port_init(&vc->port);
33953401 visual_init(vc, currcons, 1);
3402+ /* Assuming vc->vc_{cols,rows,screenbuf_size} are sane here. */
33963403 vc->vc_screenbuf = kzalloc(vc->vc_screenbuf_size, GFP_NOWAIT);
33973404 vc_init(vc, vc->vc_rows, vc->vc_cols,
33983405 currcons || !vc->vc_sw->con_save_screen);
drivers/usb/host/xhci-mtk-sch.c+4−0
@@ -557,6 +557,10 @@ static bool need_bw_sch(struct usb_host_endpoint *ep, · 556 unmodified lines
557557 if (is_fs_or_ls(speed) && !has_tt)
558558 return false;
559559
560+ /* skip endpoint with zero maxpkt */
561+ if (usb_endpoint_maxp(&ep->desc) == 0)
562+ return false;
563+
560564 return true;
561565 }
562566
drivers/usb/host/xhci-pci.c+3−0
@@ -265,6 +265,9 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) · 264 unmodified lines
265265 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
266266 pdev->device == 0x1142)
267267 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
268+ if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
269+ pdev->device == 0x2142)
270+ xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
268271
269272 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
270273 pdev->device == PCI_DEVICE_ID_ASMEDIA_1042A_XHCI)
drivers/usb/host/xhci-tegra.c+1−1
@@ -856,7 +856,7 @@ static int tegra_xusb_init_context(struct tegra_xusb *tegra) · 855 unmodified lines
856856 if (!tegra->context.ipfs)
857857 return -ENOMEM;
858858
859− tegra->context.fpci = devm_kcalloc(tegra->dev, soc->ipfs.num_offsets,
859+ tegra->context.fpci = devm_kcalloc(tegra->dev, soc->fpci.num_offsets,
860860 sizeof(u32), GFP_KERNEL);
861861 if (!tegra->context.fpci)
862862 return -ENOMEM;
drivers/vfio/pci/vfio_pci.c+5−0
@@ -521,14 +521,19 @@ static void vfio_pci_release(void *device_data) · 520 unmodified lines
521521 vfio_pci_vf_token_user_add(vdev, -1);
522522 vfio_spapr_pci_eeh_release(vdev->pdev);
523523 vfio_pci_disable(vdev);
524+ mutex_lock(&vdev->igate);
524525 if (vdev->err_trigger) {
525526 eventfd_ctx_put(vdev->err_trigger);
526527 vdev->err_trigger = NULL;
527528 }
529+ mutex_unlock(&vdev->igate);
530+
531+ mutex_lock(&vdev->igate);
528532 if (vdev->req_trigger) {
529533 eventfd_ctx_put(vdev->req_trigger);
530534 vdev->req_trigger = NULL;
531535 }
536+ mutex_unlock(&vdev->igate);
532537 }
533538
534539 mutex_unlock(&vdev->reflck->lock);
drivers/video/fbdev/core/bitblit.c+2−2
@@ -216,7 +216,7 @@ static void bit_clear_margins(struct vc_data *vc, struct fb_info *info, · 215 unmodified lines
216216 region.color = color;
217217 region.rop = ROP_COPY;
218218
219− if (rw && !bottom_only) {
219+ if ((int) rw > 0 && !bottom_only) {
220220 region.dx = info->var.xoffset + rs;
221221 region.dy = 0;
222222 region.width = rw;
@@ -224,7 +224,7 @@ static void bit_clear_margins(struct vc_data *vc, struct fb_info *info, · 1 unmodified line
224224 info->fbops->fb_fillrect(info, &region);
225225 }
226226
227− if (bh) {
227+ if ((int) bh > 0) {
228228 region.dx = info->var.xoffset;
229229 region.dy = info->var.yoffset + bs;
230230 region.width = rs;
drivers/video/fbdev/core/fbcon_ccw.c+2−2
@@ -201,7 +201,7 @@ static void ccw_clear_margins(struct vc_data *vc, struct fb_info *info, · 200 unmodified lines
201201 region.color = color;
202202 region.rop = ROP_COPY;
203203
204− if (rw && !bottom_only) {
204+ if ((int) rw > 0 && !bottom_only) {
205205 region.dx = 0;
206206 region.dy = info->var.yoffset;
207207 region.height = rw;
@@ -209,7 +209,7 @@ static void ccw_clear_margins(struct vc_data *vc, struct fb_info *info, · 1 unmodified line
209209 info->fbops->fb_fillrect(info, &region);
210210 }
211211
212− if (bh) {
212+ if ((int) bh > 0) {
213213 region.dx = info->var.xoffset + bs;
214214 region.dy = 0;
215215 region.height = info->var.yres_virtual;
drivers/video/fbdev/core/fbcon_cw.c+2−2
@@ -184,7 +184,7 @@ static void cw_clear_margins(struct vc_data *vc, struct fb_info *info, · 183 unmodified lines
184184 region.color = color;
185185 region.rop = ROP_COPY;
186186
187− if (rw && !bottom_only) {
187+ if ((int) rw > 0 && !bottom_only) {
188188 region.dx = 0;
189189 region.dy = info->var.yoffset + rs;
190190 region.height = rw;
@@ -192,7 +192,7 @@ static void cw_clear_margins(struct vc_data *vc, struct fb_info *info, · 1 unmodified line
192192 info->fbops->fb_fillrect(info, &region);
193193 }
194194
195− if (bh) {
195+ if ((int) bh > 0) {
196196 region.dx = info->var.xoffset;
197197 region.dy = info->var.yoffset;
198198 region.height = info->var.yres;
drivers/video/fbdev/core/fbcon_ud.c+2−2
@@ -231,7 +231,7 @@ static void ud_clear_margins(struct vc_data *vc, struct fb_info *info, · 230 unmodified lines
231231 region.color = color;
232232 region.rop = ROP_COPY;
233233
234− if (rw && !bottom_only) {
234+ if ((int) rw > 0 && !bottom_only) {
235235 region.dy = 0;
236236 region.dx = info->var.xoffset;
237237 region.width = rw;
@@ -239,7 +239,7 @@ static void ud_clear_margins(struct vc_data *vc, struct fb_info *info, · 1 unmodified line
239239 info->fbops->fb_fillrect(info, &region);
240240 }
241241
242− if (bh) {
242+ if ((int) bh > 0) {
243243 region.dy = info->var.yoffset;
244244 region.dx = info->var.xoffset;
245245 region.height = bh;
drivers/virtio/virtio_mmio.c+2−2
@@ -641,11 +641,11 @@ static int vm_cmdline_set(const char *device, · 640 unmodified lines
641641 &vm_cmdline_id, &consumed);
642642
643643 /*
644− * sscanf() must processes at least 2 chunks; also there
644+ * sscanf() must process at least 2 chunks; also there
645645 * must be no extra characters after the last chunk, so
646646 * str[consumed] must be '\0'
647647 */
648− if (processed < 2 || str[consumed])
648+ if (processed < 2 || str[consumed] || irq == 0)
649649 return -EINVAL;
650650
651651 resources[0].flags = IORESOURCE_MEM;
fs/btrfs/backref.c+1−0
@@ -1461,6 +1461,7 @@ static int btrfs_find_all_roots_safe(struct btrfs_trans_handle *trans, · 1460 unmodified lines
14611461 if (ret < 0 && ret != -ENOENT) {
14621462 ulist_free(tmp);
14631463 ulist_free(*roots);
1464+ *roots = NULL;
14641465 return ret;
14651466 }
14661467 node = ulist_next(tmp, &uiter);
fs/btrfs/extent_io.c+2−1
@@ -1999,7 +1999,8 @@ static int __process_pages_contig(struct address_space *mapping, · 1998 unmodified lines
19991999 if (!PageDirty(pages[i]) ||
20002000 pages[i]->mapping != mapping) {
20012001 unlock_page(pages[i]);
2002− put_page(pages[i]);
2002+ for (; i < ret; i++)
2003+ put_page(pages[i]);
20032004 err = -EAGAIN;
20042005 goto out;
20052006 }
fs/btrfs/inode.c+10−13
@@ -8123,20 +8123,17 @@ again: · 8122 unmodified lines
81238123 /*
81248124 * Qgroup reserved space handler
81258125 * Page here will be either
8126− * 1) Already written to disk
8127− * In this case, its reserved space is released from data rsv map
8128− * and will be freed by delayed_ref handler finally.
8129− * So even we call qgroup_free_data(), it won't decrease reserved
8130− * space.
8131− * 2) Not written to disk
8132− * This means the reserved space should be freed here. However,
8133− * if a truncate invalidates the page (by clearing PageDirty)
8134− * and the page is accounted for while allocating extent
8135− * in btrfs_check_data_free_space() we let delayed_ref to
8136− * free the entire extent.
8126+ * 1) Already written to disk or ordered extent already submitted
8127+ * Then its QGROUP_RESERVED bit in io_tree is already cleaned.
8128+ * Qgroup will be handled by its qgroup_record then.
8129+ * btrfs_qgroup_free_data() call will do nothing here.
8130+ *
8131+ * 2) Not written to disk yet
8132+ * Then btrfs_qgroup_free_data() call will clear the QGROUP_RESERVED
8133+ * bit of its io_tree, and free the qgroup reserved data space.
8134+ * Since the IO will never happen for this page.
81378135 */
8138− if (PageDirty(page))
8139− btrfs_qgroup_free_data(inode, NULL, page_start, PAGE_SIZE);
8136+ btrfs_qgroup_free_data(inode, NULL, page_start, PAGE_SIZE);
81408137 if (!inode_evicting) {
81418138 clear_extent_bit(tree, page_start, page_end, EXTENT_LOCKED |
81428139 EXTENT_DELALLOC | EXTENT_DELALLOC_NEW |
fs/btrfs/volumes.c+8−0
@@ -7051,6 +7051,14 @@ int btrfs_read_chunk_tree(struct btrfs_fs_info *fs_info) · 7050 unmodified lines
70517051 mutex_lock(&uuid_mutex);
70527052 mutex_lock(&fs_info->chunk_mutex);
70537053
7054+ /*
7055+ * It is possible for mount and umount to race in such a way that
7056+ * we execute this code path, but open_fs_devices failed to clear
7057+ * total_rw_bytes. We certainly want it cleared before reading the
7058+ * device items, so clear it here.
7059+ */
7060+ fs_info->fs_devices->total_rw_bytes = 0;
7061+
70547062 /*
70557063 * Read all device items, and then all the chunk items. All
70567064 * device items are found before any chunk item (their object id
fs/cifs/inode.c+2−8
@@ -2044,7 +2044,6 @@ cifs_rename2(struct inode *source_dir, struct dentry *source_dentry, · 2043 unmodified lines
20442044 FILE_UNIX_BASIC_INFO *info_buf_target;
20452045 unsigned int xid;
20462046 int rc, tmprc;
2047− bool new_target = d_really_is_negative(target_dentry);
20482047
20492048 if (flags & ~RENAME_NOREPLACE)
20502049 return -EINVAL;
@@ -2121,13 +2120,8 @@ cifs_rename2(struct inode *source_dir, struct dentry *source_dentry, · 70 unmodified lines
21212120 */
21222121
21232122 unlink_target:
2124− /*
2125− * If the target dentry was created during the rename, try
2126− * unlinking it if it's not negative
2127− */
2128− if (new_target &&
2129− d_really_is_positive(target_dentry) &&
2130− (rc == -EACCES || rc == -EEXIST)) {
2123+ /* Try unlinking the target dentry if it's not negative */
2124+ if (d_really_is_positive(target_dentry) && (rc == -EACCES || rc == -EEXIST)) {
21312125 if (d_is_dir(target_dentry))
21322126 tmprc = cifs_rmdir(target_dir, target_dentry);
21332127 else
fs/efivarfs/super.c+3−3
@@ -201,6 +201,9 @@ static int efivarfs_fill_super(struct super_block *sb, struct fs_context *fc) · 200 unmodified lines
201201 sb->s_d_op = &efivarfs_d_ops;
202202 sb->s_time_gran = 1;
203203
204+ if (!efivar_supports_writes())
205+ sb->s_flags |= SB_RDONLY;
206+
204207 inode = efivarfs_get_inode(sb, NULL, S_IFDIR | 0755, 0, true);
205208 if (!inode)
206209 return -ENOMEM;
@@ -252,9 +255,6 @@ static struct file_system_type efivarfs_type = { · 45 unmodified lines
252255
253256 static __init int efivarfs_init(void)
254257 {
255− if (!efi_rt_services_supported(EFI_RT_SUPPORTED_VARIABLE_SERVICES))
256− return -ENODEV;
257−
258258 if (!efivars_kobject())
259259 return -ENODEV;
260260
fs/exfat/dir.c+1−1
@@ -1112,7 +1112,7 @@ found: · 1111 unmodified lines
11121112 ret = exfat_get_next_cluster(sb, &clu.dir);
11131113 }
11141114
1115− if (ret || clu.dir != EXFAT_EOF_CLUSTER) {
1115+ if (ret || clu.dir == EXFAT_EOF_CLUSTER) {
11161116 /* just initialized hint_stat */
11171117 hint_stat->clu = p_dir->dir;
11181118 hint_stat->eidx = 0;
fs/exfat/exfat_fs.h+1−1
@@ -371,7 +371,7 @@ static inline bool exfat_is_last_sector_in_cluster(struct exfat_sb_info *sbi, · 370 unmodified lines
371371 static inline sector_t exfat_cluster_to_sector(struct exfat_sb_info *sbi,
372372 unsigned int clus)
373373 {
374− return ((clus - EXFAT_RESERVED_CLUSTERS) << sbi->sect_per_clus_bits) +
374+ return ((sector_t)(clus - EXFAT_RESERVED_CLUSTERS) << sbi->sect_per_clus_bits) +
375375 sbi->data_start_sector;
376376 }
377377
fs/exfat/file.c+1−1
@@ -176,7 +176,7 @@ int __exfat_truncate(struct inode *inode, loff_t new_size) · 175 unmodified lines
176176 ep2->dentry.stream.size = 0;
177177 } else {
178178 ep2->dentry.stream.valid_size = cpu_to_le64(new_size);
179− ep2->dentry.stream.size = ep->dentry.stream.valid_size;
179+ ep2->dentry.stream.size = ep2->dentry.stream.valid_size;
180180 }
181181
182182 if (new_size == 0) {
fs/exfat/nls.c+4−4
@@ -495,7 +495,7 @@ static int exfat_utf8_to_utf16(struct super_block *sb, · 494 unmodified lines
495495 struct exfat_uni_name *p_uniname, int *p_lossy)
496496 {
497497 int i, unilen, lossy = NLS_NAME_NO_LOSSY;
498− unsigned short upname[MAX_NAME_LENGTH + 1];
498+ __le16 upname[MAX_NAME_LENGTH + 1];
499499 unsigned short *uniname = p_uniname->name;
500500
501501 WARN_ON(!len);
@@ -519,7 +519,7 @@ static int exfat_utf8_to_utf16(struct super_block *sb, · 17 unmodified lines
519519 exfat_wstrchr(bad_uni_chars, *uniname))
520520 lossy |= NLS_NAME_LOSSY;
521521
522− upname[i] = exfat_toupper(sb, *uniname);
522+ upname[i] = cpu_to_le16(exfat_toupper(sb, *uniname));
523523 uniname++;
524524 }
525525
@@ -597,7 +597,7 @@ static int exfat_nls_to_ucs2(struct super_block *sb, · 71 unmodified lines
597597 struct exfat_uni_name *p_uniname, int *p_lossy)
598598 {
599599 int i = 0, unilen = 0, lossy = NLS_NAME_NO_LOSSY;
600− unsigned short upname[MAX_NAME_LENGTH + 1];
600+ __le16 upname[MAX_NAME_LENGTH + 1];
601601 unsigned short *uniname = p_uniname->name;
602602 struct nls_table *nls = EXFAT_SB(sb)->nls_io;
603603
@@ -611,7 +611,7 @@ static int exfat_nls_to_ucs2(struct super_block *sb, · 7 unmodified lines
611611 exfat_wstrchr(bad_uni_chars, *uniname))
612612 lossy |= NLS_NAME_LOSSY;
613613
614− upname[unilen] = exfat_toupper(sb, *uniname);
614+ upname[unilen] = cpu_to_le16(exfat_toupper(sb, *uniname));
615615 uniname++;
616616 unilen++;
617617 }
fs/io_uring.c+36−25
@@ -605,6 +605,7 @@ enum { · 604 unmodified lines
605605
606606 struct async_poll {
607607 struct io_poll_iocb poll;
608+ struct io_poll_iocb *double_poll;
608609 struct io_wq_work work;
609610 };
610611
@@ -4159,9 +4160,9 @@ static bool io_poll_rewait(struct io_kiocb *req, struct io_poll_iocb *poll) · 3548 unmodified lines
41594160 return false;
41604161 }
41614162
4162−static void io_poll_remove_double(struct io_kiocb *req)
4163+static void io_poll_remove_double(struct io_kiocb *req, void *data)
41634164 {
4164− struct io_poll_iocb *poll = (struct io_poll_iocb *) req->io;
4165+ struct io_poll_iocb *poll = data;
41654166
41664167 lockdep_assert_held(&req->ctx->completion_lock);
41674168
@@ -4181,7 +4182,7 @@ static void io_poll_complete(struct io_kiocb *req, __poll_t mask, int error) · 13 unmodified lines
41814182 {
41824183 struct io_ring_ctx *ctx = req->ctx;
41834184
4184− io_poll_remove_double(req);
4185+ io_poll_remove_double(req, req->io);
41854186 req->poll.done = true;
41864187 io_cqring_fill_event(req, error ? error : mangle_poll(mask));
41874188 io_commit_cqring(ctx);
@@ -4224,21 +4225,21 @@ static int io_poll_double_wake(struct wait_queue_entry *wait, unsigned mode, · 36 unmodified lines
42244225 int sync, void *key)
42254226 {
42264227 struct io_kiocb *req = wait->private;
4227− struct io_poll_iocb *poll = (struct io_poll_iocb *) req->io;
4228+ struct io_poll_iocb *poll = req->apoll->double_poll;
42284229 __poll_t mask = key_to_poll(key);
42294230
42304231 /* for instances that support it check for an event match first: */
42314232 if (mask && !(mask & poll->events))
42324233 return 0;
42334234
4234− if (req->poll.head) {
4235+ if (poll && poll->head) {
42354236 bool done;
42364237
4237− spin_lock(&req->poll.head->lock);
4238− done = list_empty(&req->poll.wait.entry);
4238+ spin_lock(&poll->head->lock);
4239+ done = list_empty(&poll->wait.entry);
42394240 if (!done)
4240− list_del_init(&req->poll.wait.entry);
4241− spin_unlock(&req->poll.head->lock);
4241+ list_del_init(&poll->wait.entry);
4242+ spin_unlock(&poll->head->lock);
42424243 if (!done)
42434244 __io_async_wake(req, poll, mask, io_poll_task_func);
42444245 }
@@ -4258,7 +4259,8 @@ static void io_init_poll_iocb(struct io_poll_iocb *poll, __poll_t events, · 13 unmodified lines
42584259 }
42594260
42604261 static void __io_queue_proc(struct io_poll_iocb *poll, struct io_poll_table *pt,
4261− struct wait_queue_head *head)
4262+ struct wait_queue_head *head,
4263+ struct io_poll_iocb **poll_ptr)
42624264 {
42634265 struct io_kiocb *req = pt->req;
42644266
@@ -4269,7 +4271,7 @@ static void __io_queue_proc(struct io_poll_iocb *poll, struct io_poll_table *pt, · 4 unmodified lines
42694271 */
42704272 if (unlikely(poll->head)) {
42714273 /* already have a 2nd entry, fail a third attempt */
4272− if (req->io) {
4274+ if (*poll_ptr) {
42734275 pt->error = -EINVAL;
42744276 return;
42754277 }
@@ -4281,7 +4283,7 @@ static void __io_queue_proc(struct io_poll_iocb *poll, struct io_poll_table *pt, · 5 unmodified lines
42814283 io_init_poll_iocb(poll, req->poll.events, io_poll_double_wake);
42824284 refcount_inc(&req->refs);
42834285 poll->wait.private = req;
4284− req->io = (void *) poll;
4286+ *poll_ptr = poll;
42854287 }
42864288
42874289 pt->error = 0;
@@ -4293,8 +4295,9 @@ static void io_async_queue_proc(struct file *file, struct wait_queue_head *head, · 5 unmodified lines
42934295 struct poll_table_struct *p)
42944296 {
42954297 struct io_poll_table *pt = container_of(p, struct io_poll_table, pt);
4298+ struct async_poll *apoll = pt->req->apoll;
42964299
4297− __io_queue_proc(&pt->req->apoll->poll, pt, head);
4300+ __io_queue_proc(&apoll->poll, pt, head, &apoll->double_poll);
42984301 }
42994302
43004303 static void io_sq_thread_drop_mm(struct io_ring_ctx *ctx)
@@ -4344,11 +4347,13 @@ static void io_async_task_func(struct callback_head *cb) · 43 unmodified lines
43444347 }
43454348 }
43464349
4350+ io_poll_remove_double(req, apoll->double_poll);
43474351 spin_unlock_irq(&ctx->completion_lock);
43484352
43494353 /* restore ->work in case we need to retry again */
43504354 if (req->flags & REQ_F_WORK_INITIALIZED)
43514355 memcpy(&req->work, &apoll->work, sizeof(req->work));
4356+ kfree(apoll->double_poll);
43524357 kfree(apoll);
43534358
43544359 if (!canceled) {
@@ -4436,7 +4441,6 @@ static bool io_arm_poll_handler(struct io_kiocb *req) · 81 unmodified lines
44364441 struct async_poll *apoll;
44374442 struct io_poll_table ipt;
44384443 __poll_t mask, ret;
4439− bool had_io;
44404444
44414445 if (!req->file || !file_can_poll(req->file))
44424446 return false;
@@ -4448,11 +4452,11 @@ static bool io_arm_poll_handler(struct io_kiocb *req) · 5 unmodified lines
44484452 apoll = kmalloc(sizeof(*apoll), GFP_ATOMIC);
44494453 if (unlikely(!apoll))
44504454 return false;
4455+ apoll->double_poll = NULL;
44514456
44524457 req->flags |= REQ_F_POLLED;
44534458 if (req->flags & REQ_F_WORK_INITIALIZED)
44544459 memcpy(&apoll->work, &req->work, sizeof(req->work));
4455− had_io = req->io != NULL;
44564460
44574461 io_get_req_task(req);
44584462 req->apoll = apoll;
@@ -4470,13 +4474,11 @@ static bool io_arm_poll_handler(struct io_kiocb *req) · 11 unmodified lines
44704474 ret = __io_arm_poll_handler(req, &apoll->poll, &ipt, mask,
44714475 io_async_wake);
44724476 if (ret) {
4473− ipt.error = 0;
4474− /* only remove double add if we did it here */
4475− if (!had_io)
4476− io_poll_remove_double(req);
4477+ io_poll_remove_double(req, apoll->double_poll);
44774478 spin_unlock_irq(&ctx->completion_lock);
44784479 if (req->flags & REQ_F_WORK_INITIALIZED)
44794480 memcpy(&req->work, &apoll->work, sizeof(req->work));
4481+ kfree(apoll->double_poll);
44804482 kfree(apoll);
44814483 return false;
44824484 }
@@ -4507,11 +4509,13 @@ static bool io_poll_remove_one(struct io_kiocb *req) · 24 unmodified lines
45074509 bool do_complete;
45084510
45094511 if (req->opcode == IORING_OP_POLL_ADD) {
4510− io_poll_remove_double(req);
4512+ io_poll_remove_double(req, req->io);
45114513 do_complete = __io_poll_remove_one(req, &req->poll);
45124514 } else {
45134515 struct async_poll *apoll = req->apoll;
45144516
4517+ io_poll_remove_double(req, apoll->double_poll);
4518+
45154519 /* non-poll requests have submit ref still */
45164520 do_complete = __io_poll_remove_one(req, &apoll->poll);
45174521 if (do_complete) {
@@ -4524,6 +4528,7 @@ static bool io_poll_remove_one(struct io_kiocb *req) · 6 unmodified lines
45244528 if (req->flags & REQ_F_WORK_INITIALIZED)
45254529 memcpy(&req->work, &apoll->work,
45264530 sizeof(req->work));
4531+ kfree(apoll->double_poll);
45274532 kfree(apoll);
45284533 }
45294534 }
@@ -4624,7 +4629,7 @@ static void io_poll_queue_proc(struct file *file, struct wait_queue_head *head, · 94 unmodified lines
46244629 {
46254630 struct io_poll_table *pt = container_of(p, struct io_poll_table, pt);
46264631
4627− __io_queue_proc(&pt->req->poll, pt, head);
4632+ __io_queue_proc(&pt->req->poll, pt, head, (struct io_poll_iocb **) &pt->req->io);
46284633 }
46294634
46304635 static int io_poll_add_prep(struct io_kiocb *req, const struct io_uring_sqe *sqe)
@@ -4732,7 +4737,9 @@ static int io_timeout_remove_prep(struct io_kiocb *req, · 101 unmodified lines
47324737 {
47334738 if (unlikely(req->ctx->flags & IORING_SETUP_IOPOLL))
47344739 return -EINVAL;
4735− if (sqe->flags || sqe->ioprio || sqe->buf_index || sqe->len)
4740+ if (unlikely(req->flags & (REQ_F_FIXED_FILE | REQ_F_BUFFER_SELECT)))
4741+ return -EINVAL;
4742+ if (sqe->ioprio || sqe->buf_index || sqe->len)
47364743 return -EINVAL;
47374744
47384745 req->timeout.addr = READ_ONCE(sqe->addr);
@@ -4910,8 +4917,9 @@ static int io_async_cancel_prep(struct io_kiocb *req, · 171 unmodified lines
49104917 {
49114918 if (unlikely(req->ctx->flags & IORING_SETUP_IOPOLL))
49124919 return -EINVAL;
4913− if (sqe->flags || sqe->ioprio || sqe->off || sqe->len ||
4914− sqe->cancel_flags)
4920+ if (unlikely(req->flags & (REQ_F_FIXED_FILE | REQ_F_BUFFER_SELECT)))
4921+ return -EINVAL;
4922+ if (sqe->ioprio || sqe->off || sqe->len || sqe->cancel_flags)
49154923 return -EINVAL;
49164924
49174925 req->cancel.addr = READ_ONCE(sqe->addr);
@@ -4929,7 +4937,9 @@ static int io_async_cancel(struct io_kiocb *req) · 11 unmodified lines
49294937 static int io_files_update_prep(struct io_kiocb *req,
49304938 const struct io_uring_sqe *sqe)
49314939 {
4932− if (sqe->flags || sqe->ioprio || sqe->rw_flags)
4940+ if (unlikely(req->flags & (REQ_F_FIXED_FILE | REQ_F_BUFFER_SELECT)))
4941+ return -EINVAL;
4942+ if (sqe->ioprio || sqe->rw_flags)
49334943 return -EINVAL;
49344944
49354945 req->files_update.offset = READ_ONCE(sqe->off);
@@ -5720,6 +5730,7 @@ fail_req: · 784 unmodified lines
57205730 * Never try inline submit of IOSQE_ASYNC is set, go straight
57215731 * to async execution.
57225732 */
5733+ io_req_init_async(req);
57235734 req->work.flags |= IO_WQ_WORK_CONCURRENT;
57245735 io_queue_async_work(req);
57255736 } else {
fs/nfsd/nfs4state.c+19−1
@@ -507,6 +507,17 @@ find_any_file(struct nfs4_file *f) · 506 unmodified lines
507507 return ret;
508508 }
509509
510+static struct nfsd_file *find_deleg_file(struct nfs4_file *f)
511+{
512+ struct nfsd_file *ret = NULL;
513+
514+ spin_lock(&f->fi_lock);
515+ if (f->fi_deleg_file)
516+ ret = nfsd_file_get(f->fi_deleg_file);
517+ spin_unlock(&f->fi_lock);
518+ return ret;
519+}
520+
510521 static atomic_long_t num_delegations;
511522 unsigned long max_delegations;
512523
@@ -2444,6 +2455,8 @@ static int nfs4_show_open(struct seq_file *s, struct nfs4_stid *st) · 1931 unmodified lines
24442455 oo = ols->st_stateowner;
24452456 nf = st->sc_file;
24462457 file = find_any_file(nf);
2458+ if (!file)
2459+ return 0;
24472460
24482461 seq_printf(s, "- ");
24492462 nfs4_show_stateid(s, &st->sc_stateid);
@@ -2481,6 +2494,8 @@ static int nfs4_show_lock(struct seq_file *s, struct nfs4_stid *st) · 31 unmodified lines
24812494 oo = ols->st_stateowner;
24822495 nf = st->sc_file;
24832496 file = find_any_file(nf);
2497+ if (!file)
2498+ return 0;
24842499
24852500 seq_printf(s, "- ");
24862501 nfs4_show_stateid(s, &st->sc_stateid);
@@ -2513,7 +2528,9 @@ static int nfs4_show_deleg(struct seq_file *s, struct nfs4_stid *st) · 26 unmodified lines
25132528
25142529 ds = delegstateid(st);
25152530 nf = st->sc_file;
2516− file = nf->fi_deleg_file;
2531+ file = find_deleg_file(nf);
2532+ if (!file)
2533+ return 0;
25172534
25182535 seq_printf(s, "- ");
25192536 nfs4_show_stateid(s, &st->sc_stateid);
@@ -2529,6 +2546,7 @@ static int nfs4_show_deleg(struct seq_file *s, struct nfs4_stid *st) · 9 unmodified lines
25292546 seq_printf(s, ", ");
25302547 nfs4_show_fname(s, file);
25312548 seq_printf(s, " }\n");
2549+ nfsd_file_put(file);
25322550
25332551 return 0;
25342552 }
fs/squashfs/block.c+1−1
@@ -175,7 +175,7 @@ int squashfs_read_data(struct super_block *sb, u64 index, int length, · 174 unmodified lines
175175 /* Extract the length of the metadata block */
176176 data = page_address(bvec->bv_page) + bvec->bv_offset;
177177 length = data[offset];
178− if (offset <= bvec->bv_len - 1) {
178+ if (offset < bvec->bv_len - 1) {
179179 length |= data[offset + 1] << 8;
180180 } else {
181181 if (WARN_ON_ONCE(!bio_next_segment(bio, &iter_all))) {
fs/zonefs/super.c+11−7
@@ -607,14 +607,14 @@ static ssize_t zonefs_file_dio_append(struct kiocb *iocb, struct iov_iter *from) · 606 unmodified lines
607607 int nr_pages;
608608 ssize_t ret;
609609
610− nr_pages = iov_iter_npages(from, BIO_MAX_PAGES);
611− if (!nr_pages)
612− return 0;
613−
614610 max = queue_max_zone_append_sectors(bdev_get_queue(bdev));
615611 max = ALIGN_DOWN(max << SECTOR_SHIFT, inode->i_sb->s_blocksize);
616612 iov_iter_truncate(from, max);
617613
614+ nr_pages = iov_iter_npages(from, BIO_MAX_PAGES);
615+ if (!nr_pages)
616+ return 0;
617+
618618 bio = bio_alloc_bioset(GFP_NOFS, nr_pages, &fs_bio_set);
619619 if (!bio)
620620 return -ENOMEM;
@@ -1119,7 +1119,7 @@ static int zonefs_create_zgroup(struct zonefs_zone_data *zd, · 498 unmodified lines
11191119 char *file_name;
11201120 struct dentry *dir;
11211121 unsigned int n = 0;
1122− int ret = -ENOMEM;
1122+ int ret;
11231123
11241124 /* If the group is empty, there is nothing to do */
11251125 if (!zd->nr_zones[type])
@@ -1135,8 +1135,10 @@ static int zonefs_create_zgroup(struct zonefs_zone_data *zd, · 9 unmodified lines
11351135 zgroup_name = "seq";
11361136
11371137 dir = zonefs_create_inode(sb->s_root, zgroup_name, NULL, type);
1138− if (!dir)
1138+ if (!dir) {
1139+ ret = -ENOMEM;
11391140 goto free;
1141+ }
11401142
11411143 /*
11421144 * The first zone contains the super block: skip it.
@@ -1174,8 +1176,10 @@ static int zonefs_create_zgroup(struct zonefs_zone_data *zd, · 31 unmodified lines
11741176 * Use the file number within its group as file name.
11751177 */
11761178 snprintf(file_name, ZONEFS_NAME_MAX - 1, "%u", n);
1177− if (!zonefs_create_inode(dir, file_name, zone, type))
1179+ if (!zonefs_create_inode(dir, file_name, zone, type)) {
1180+ ret = -ENOMEM;
11781181 goto free;
1182+ }
11791183
11801184 n++;
11811185 }
include/asm-generic/vmlinux.lds.h+4−1
@@ -341,7 +341,8 @@ · 340 unmodified lines
341341
342342 #define PAGE_ALIGNED_DATA(page_align) \
343343 . = ALIGN(page_align); \
344− *(.data..page_aligned)
344+ *(.data..page_aligned) \
345+ . = ALIGN(page_align);
345346
346347 #define READ_MOSTLY_DATA(align) \
347348 . = ALIGN(align); \
@@ -737,7 +738,9 @@ · 389 unmodified lines
737738 . = ALIGN(bss_align); \
738739 .bss : AT(ADDR(.bss) - LOAD_OFFSET) { \
739740 BSS_FIRST_SECTIONS \
741+ . = ALIGN(PAGE_SIZE); \
740742 *(.bss..page_aligned) \
743+ . = ALIGN(PAGE_SIZE); \
741744 *(.dynbss) \
742745 *(BSS_MAIN) \
743746 *(COMMON) \
include/linux/device-mapper.h+1−0
@@ -426,6 +426,7 @@ const char *dm_device_name(struct mapped_device *md); · 425 unmodified lines
426426 int dm_copy_name_and_uuid(struct mapped_device *md, char *name, char *uuid);
427427 struct gendisk *dm_disk(struct mapped_device *md);
428428 int dm_suspended(struct dm_target *ti);
429+int dm_post_suspending(struct dm_target *ti);
429430 int dm_noflush_suspending(struct dm_target *ti);
430431 void dm_accept_partial_bio(struct bio *bio, unsigned n_sectors);
431432 union map_info *dm_get_rq_mapinfo(struct request *rq);
include/linux/efi.h+1−0
@@ -994,6 +994,7 @@ int efivars_register(struct efivars *efivars, · 993 unmodified lines
994994 int efivars_unregister(struct efivars *efivars);
995995 struct kobject *efivars_kobject(void);
996996
997+int efivar_supports_writes(void);
997998 int efivar_init(int (*func)(efi_char16_t *, efi_guid_t, unsigned long, void *),
998999 void *data, bool duplicates, struct list_head *head);
9991000
include/linux/i2c.h+1−1
@@ -56,7 +56,7 @@ struct property_entry; · 55 unmodified lines
5656 * on a bus (or read from them). Apart from two basic transfer functions to
5757 * transmit one message at a time, a more complex version can be used to
5858 * transmit an arbitrary number of messages without interruption.
59− * @count must be be less than 64k since msg.len is u16.
59+ * @count must be less than 64k since msg.len is u16.
6060 */
6161 int i2c_transfer_buffer_flags(const struct i2c_client *client,
6262 char *buf, int count, u16 flags);
include/linux/io-mapping.h+4−1
@@ -107,9 +107,12 @@ io_mapping_init_wc(struct io_mapping *iomap, · 106 unmodified lines
107107 resource_size_t base,
108108 unsigned long size)
109109 {
110+ iomap->iomem = ioremap_wc(base, size);
111+ if (!iomap->iomem)
112+ return NULL;
113+
110114 iomap->base = base;
111115 iomap->size = size;
112− iomap->iomem = ioremap_wc(base, size);
113116 #if defined(pgprot_noncached_wc) /* archs can't agree on a name ... */
114117 iomap->prot = pgprot_noncached_wc(PAGE_KERNEL);
115118 #elif defined(pgprot_writecombine)
include/linux/rhashtable.h+1−1
@@ -33,7 +33,7 @@ · 32 unmodified lines
3333 * of two or more hash tables when the rhashtable is being resized.
3434 * The end of the chain is marked with a special nulls marks which has
3535 * the least significant bit set but otherwise stores the address of
36− * the hash bucket. This allows us to be be sure we've found the end
36+ * the hash bucket. This allows us to be sure we've found the end
3737 * of the right list.
3838 * The value stored in the hash bucket has BIT(0) used as a lock bit.
3939 * This bit must be atomically set before any changes are made to
include/linux/tcp.h+4−2
@@ -220,7 +220,9 @@ struct tcp_sock { · 219 unmodified lines
220220 } rack;
221221 u16 advmss; /* Advertised MSS */
222222 u8 compressed_ack;
223− u8 dup_ack_counter;
223+ u8 dup_ack_counter:2,
224+ tlp_retrans:1, /* TLP is a retransmission */
225+ unused:5;
224226 u32 chrono_start; /* Start time in jiffies of a TCP chrono */
225227 u32 chrono_stat[3]; /* Time in jiffies for chrono_stat stats */
226228 u8 chrono_type:2, /* current chronograph type */
@@ -243,7 +245,7 @@ struct tcp_sock { · 16 unmodified lines
243245 save_syn:1, /* Save headers of SYN packet */
244246 is_cwnd_limited:1,/* forward progress limited by snd_cwnd? */
245247 syn_smc:1; /* SYN includes SMC */
246− u32 tlp_high_seq; /* snd_nxt at the time of TLP retransmit. */
248+ u32 tlp_high_seq; /* snd_nxt at the time of TLP */
247249
248250 u32 tcp_tx_delay; /* delay (in usec) added to TX packets */
249251 u64 tcp_wstamp_ns; /* departure time for next sent data packet */
include/linux/xattr.h+2−1
@@ -15,6 +15,7 @@ · 14 unmodified lines
1515 #include <linux/slab.h>
1616 #include <linux/types.h>
1717 #include <linux/spinlock.h>
18+#include <linux/mm.h>
1819 #include <uapi/linux/xattr.h>
1920
2021 struct inode;
@@ -94,7 +95,7 @@ static inline void simple_xattrs_free(struct simple_xattrs *xattrs) · 73 unmodified lines
9495
9596 list_for_each_entry_safe(xattr, node, &xattrs->head, list) {
9697 kfree(xattr->name);
97− kfree(xattr);
98+ kvfree(xattr);
9899 }
99100 }
100101
include/net/flow_offload.h+0−1
@@ -5,7 +5,6 @@ · 4 unmodified lines
55 #include <linux/list.h>
66 #include <linux/netlink.h>
77 #include <net/flow_dissector.h>
8−#include <linux/rhashtable.h>
98
109 struct flow_match {
1110 struct flow_dissector *dissector;
include/sound/rt5670.h+1−0
@@ -12,6 +12,7 @@ struct rt5670_platform_data { · 11 unmodified lines
1212 int jd_mode;
1313 bool in2_diff;
1414 bool dev_gpio;
15+ bool gpio1_is_ext_spk_en;
1516
1617 bool dmic_en;
1718 unsigned int dmic1_data_pin;
include/sound/soc-dai.h+1−0
@@ -161,6 +161,7 @@ void snd_soc_dai_resume(struct snd_soc_dai *dai); · 160 unmodified lines
161161 int snd_soc_dai_compress_new(struct snd_soc_dai *dai,
162162 struct snd_soc_pcm_runtime *rtd, int num);
163163 bool snd_soc_dai_stream_valid(struct snd_soc_dai *dai, int stream);
164+void snd_soc_dai_link_set_capabilities(struct snd_soc_dai_link *dai_link);
164165 void snd_soc_dai_action(struct snd_soc_dai *dai,
165166 int stream, int action);
166167 static inline void snd_soc_dai_activate(struct snd_soc_dai *dai,
include/sound/soc.h+2−0
@@ -444,6 +444,8 @@ int devm_snd_soc_register_component(struct device *dev, · 443 unmodified lines
444444 const struct snd_soc_component_driver *component_driver,
445445 struct snd_soc_dai_driver *dai_drv, int num_dai);
446446 void snd_soc_unregister_component(struct device *dev);
447+void snd_soc_unregister_component_by_driver(struct device *dev,
448+ const struct snd_soc_component_driver *component_driver);
447449 struct snd_soc_component *snd_soc_lookup_component_nolocked(struct device *dev,
448450 const char *driver_name);
449451 struct snd_soc_component *snd_soc_lookup_component(struct device *dev,
kernel/events/uprobes.c+1−1
@@ -2199,7 +2199,7 @@ static void handle_swbp(struct pt_regs *regs) · 2198 unmodified lines
21992199 if (!uprobe) {
22002200 if (is_swbp > 0) {
22012201 /* No matching uprobe; signal SIGTRAP. */
2202− send_sig(SIGTRAP, current, 0);
2202+ force_sig(SIGTRAP);
22032203 } else {
22042204 /*
22052205 * Either we raced with uprobe_unregister() or we can't
kernel/sched/core.c+15−10
@@ -4119,9 +4119,6 @@ static void __sched notrace __schedule(bool preempt) · 4118 unmodified lines
41194119 local_irq_disable();
41204120 rcu_note_context_switch(preempt);
41214121
4122− /* See deactivate_task() below. */
4123− prev_state = prev->state;
4124−
41254122 /*
41264123 * Make sure that signal_pending_state()->signal_pending() below
41274124 * can't be reordered with __set_current_state(TASK_INTERRUPTIBLE)
@@ -4145,11 +4142,16 @@ static void __sched notrace __schedule(bool preempt) · 17 unmodified lines
41454142 update_rq_clock(rq);
41464143
41474144 switch_count = &prev->nivcsw;
4145+
41484146 /*
4149− * We must re-load prev->state in case ttwu_remote() changed it
4150− * before we acquired rq->lock.
4147+ * We must load prev->state once (task_struct::state is volatile), such
4148+ * that:
4149+ *
4150+ * - we form a control dependency vs deactivate_task() below.
4151+ * - ptrace_{,un}freeze_traced() can change ->state underneath us.
41514152 */
4152− if (!preempt && prev_state && prev_state == prev->state) {
4153+ prev_state = prev->state;
4154+ if (!preempt && prev_state) {
41534155 if (signal_pending_state(prev_state, prev)) {
41544156 prev->state = TASK_RUNNING;
41554157 } else {
@@ -4163,10 +4165,12 @@ static void __sched notrace __schedule(bool preempt) · 7 unmodified lines
41634165
41644166 /*
41654167 * __schedule() ttwu()
4166− * prev_state = prev->state; if (READ_ONCE(p->on_rq) && ...)
4167− * LOCK rq->lock goto out;
4168− * smp_mb__after_spinlock(); smp_acquire__after_ctrl_dep();
4169− * p->on_rq = 0; p->state = TASK_WAKING;
4168+ * prev_state = prev->state; if (p->on_rq && ...)
4169+ * if (prev_state) goto out;
4170+ * p->on_rq = 0; smp_acquire__after_ctrl_dep();
4171+ * p->state = TASK_WAKING
4172+ *
4173+ * Where __schedule() and ttwu() have matching control dependencies.
41704174 *
41714175 * After this, schedule() must not care about p->state any more.
41724176 */
@@ -4481,6 +4485,7 @@ asmlinkage __visible void __sched preempt_schedule_irq(void) · 308 unmodified lines
44814485 int default_wake_function(wait_queue_entry_t *curr, unsigned mode, int wake_flags,
44824486 void *key)
44834487 {
4488+ WARN_ON_ONCE(IS_ENABLED(CONFIG_SCHED_DEBUG) && wake_flags & ~WF_SYNC);
44844489 return try_to_wake_up(curr->private, mode, wake_flags);
44854490 }
44864491 EXPORT_SYMBOL(default_wake_function);
mm/hugetlb.c+10−5
@@ -45,7 +45,10 @@ int hugetlb_max_hstate __read_mostly; · 44 unmodified lines
4545 unsigned int default_hstate_idx;
4646 struct hstate hstates[HUGE_MAX_HSTATE];
4747
48+#ifdef CONFIG_CMA
4849 static struct cma *hugetlb_cma[MAX_NUMNODES];
50+#endif
51+static unsigned long hugetlb_cma_size __initdata;
4952
5053 /*
5154 * Minimum page order among possible hugepage sizes, set to a proper value
@@ -1235,9 +1238,10 @@ static void free_gigantic_page(struct page *page, unsigned int order) · 1183 unmodified lines
12351238 * If the page isn't allocated using the cma allocator,
12361239 * cma_release() returns false.
12371240 */
1238− if (IS_ENABLED(CONFIG_CMA) &&
1239− cma_release(hugetlb_cma[page_to_nid(page)], page, 1 << order))
1241+#ifdef CONFIG_CMA
1242+ if (cma_release(hugetlb_cma[page_to_nid(page)], page, 1 << order))
12401243 return;
1244+#endif
12411245
12421246 free_contig_range(page_to_pfn(page), 1 << order);
12431247 }
@@ -1248,7 +1252,8 @@ static struct page *alloc_gigantic_page(struct hstate *h, gfp_t gfp_mask, · 4 unmodified lines
12481252 {
12491253 unsigned long nr_pages = 1UL << huge_page_order(h);
12501254
1251− if (IS_ENABLED(CONFIG_CMA)) {
1255+#ifdef CONFIG_CMA
1256+ {
12521257 struct page *page;
12531258 int node;
12541259
@@ -1262,6 +1267,7 @@ static struct page *alloc_gigantic_page(struct hstate *h, gfp_t gfp_mask, · 7 unmodified lines
12621267 return page;
12631268 }
12641269 }
1270+#endif
12651271
12661272 return alloc_contig_pages(nr_pages, gfp_mask, nid, nodemask);
12671273 }
@@ -2571,7 +2577,7 @@ static void __init hugetlb_hstate_alloc_pages(struct hstate *h) · 1303 unmodified lines
25712577
25722578 for (i = 0; i < h->max_huge_pages; ++i) {
25732579 if (hstate_is_gigantic(h)) {
2574− if (IS_ENABLED(CONFIG_CMA) && hugetlb_cma[0]) {
2580+ if (hugetlb_cma_size) {
25752581 pr_warn_once("HugeTLB: hugetlb_cma is enabled, skip boot time allocation\n");
25762582 break;
25772583 }
@@ -5654,7 +5660,6 @@ void move_hugetlb_state(struct page *oldpage, struct page *newpage, int reason) · 3076 unmodified lines
56545660 }
56555661
56565662 #ifdef CONFIG_CMA
5657−static unsigned long hugetlb_cma_size __initdata;
56585663 static bool cma_reserve_called __initdata;
56595664
56605665 static int __init cmdline_parse_hugetlb_cma(char *p)
mm/khugepaged.c+3−0
@@ -958,6 +958,9 @@ static int hugepage_vma_revalidate(struct mm_struct *mm, unsigned long address, · 957 unmodified lines
958958 return SCAN_ADDRESS_RANGE;
959959 if (!hugepage_vma_check(vma, vma->vm_flags))
960960 return SCAN_VMA_CHECK;
961+ /* Anon VMA expected */
962+ if (!vma->anon_vma || vma->vm_ops)
963+ return SCAN_VMA_CHECK;
961964 return 0;
962965 }
963966
mm/memcontrol.c+10−3
@@ -5669,7 +5669,6 @@ static void __mem_cgroup_clear_mc(void) · 5668 unmodified lines
56695669 if (!mem_cgroup_is_root(mc.to))
56705670 page_counter_uncharge(&mc.to->memory, mc.moved_swap);
56715671
5672− mem_cgroup_id_get_many(mc.to, mc.moved_swap);
56735672 css_put_many(&mc.to->css, mc.moved_swap);
56745673
56755674 mc.moved_swap = 0;
@@ -5860,7 +5859,8 @@ put: /* get_mctgt_type() gets the page */ · 184 unmodified lines
58605859 ent = target.ent;
58615860 if (!mem_cgroup_move_swap_account(ent, mc.from, mc.to)) {
58625861 mc.precharge--;
5863− /* we fixup refcnts and charges later. */
5862+ mem_cgroup_id_get_many(mc.to, 1);
5863+ /* we fixup other refcnts and charges later. */
58645864 mc.moved_swap++;
58655865 }
58665866 break;
@@ -7186,6 +7186,13 @@ static struct cftype memsw_files[] = { · 1319 unmodified lines
71867186 { }, /* terminate */
71877187 };
71887188
7189+/*
7190+ * If mem_cgroup_swap_init() is implemented as a subsys_initcall()
7191+ * instead of a core_initcall(), this could mean cgroup_memory_noswap still
7192+ * remains set to false even when memcg is disabled via "cgroup_disable=memory"
7193+ * boot parameter. This may result in premature OOPS inside
7194+ * mem_cgroup_get_nr_swap_pages() function in corner cases.
7195+ */
71897196 static int __init mem_cgroup_swap_init(void)
71907197 {
71917198 /* No memory control -> no swap control */
@@ -7200,6 +7207,6 @@ static int __init mem_cgroup_swap_init(void) · 8 unmodified lines
72007207
72017208 return 0;
72027209 }
7203−subsys_initcall(mem_cgroup_swap_init);
7210+core_initcall(mem_cgroup_swap_init);
72047211
72057212 #endif /* CONFIG_MEMCG_SWAP */
mm/memory.c+1−1
@@ -1601,7 +1601,7 @@ int vm_insert_pages(struct vm_area_struct *vma, unsigned long addr, · 1600 unmodified lines
16011601 return insert_pages(vma, addr, pages, num, vma->vm_page_prot);
16021602 #else
16031603 unsigned long idx = 0, pgcount = *num;
1604− int err;
1604+ int err = -EINVAL;
16051605
16061606 for (; idx < pgcount; ++idx) {
16071607 err = vm_insert_page(vma, addr + (PAGE_SIZE * idx), pages[idx]);
mm/mmap.c+14−2
@@ -2620,7 +2620,7 @@ static void unmap_region(struct mm_struct *mm, · 2619 unmodified lines
26202620 * Create a list of vma's touched by the unmap, removing them from the mm's
26212621 * vma list as we go..
26222622 */
2623−static void
2623+static bool
26242624 detach_vmas_to_be_unmapped(struct mm_struct *mm, struct vm_area_struct *vma,
26252625 struct vm_area_struct *prev, unsigned long end)
26262626 {
@@ -2645,6 +2645,17 @@ detach_vmas_to_be_unmapped(struct mm_struct *mm, struct vm_area_struct *vma, · 18 unmodified lines
26452645
26462646 /* Kill the cache */
26472647 vmacache_invalidate(mm);
2648+
2649+ /*
2650+ * Do not downgrade mmap_lock if we are next to VM_GROWSDOWN or
2651+ * VM_GROWSUP VMA. Such VMAs can change their size under
2652+ * down_read(mmap_lock) and collide with the VMA we are about to unmap.
2653+ */
2654+ if (vma && (vma->vm_flags & VM_GROWSDOWN))
2655+ return false;
2656+ if (prev && (prev->vm_flags & VM_GROWSUP))
2657+ return false;
2658+ return true;
26482659 }
26492660
26502661 /*
@@ -2825,7 +2836,8 @@ int __do_munmap(struct mm_struct *mm, unsigned long start, size_t len, · 174 unmodified lines
28252836 }
28262837
28272838 /* Detach vmas from rbtree */
2828− detach_vmas_to_be_unmapped(mm, vma, prev, end);
2839+ if (!detach_vmas_to_be_unmapped(mm, vma, prev, end))
2840+ downgrade = false;
28292841
28302842 if (downgrade)
28312843 mmap_write_downgrade(mm);
mm/shmem.c+1−1
@@ -3178,7 +3178,7 @@ static int shmem_initxattrs(struct inode *inode, · 3177 unmodified lines
31783178 new_xattr->name = kmalloc(XATTR_SECURITY_PREFIX_LEN + len,
31793179 GFP_KERNEL);
31803180 if (!new_xattr->name) {
3181− kfree(new_xattr);
3181+ kvfree(new_xattr);
31823182 return -ENOMEM;
31833183 }
31843184
mm/slab_common.c+28−7
@@ -326,6 +326,14 @@ int slab_unmergeable(struct kmem_cache *s) · 325 unmodified lines
326326 if (s->refcount < 0)
327327 return 1;
328328
329+#ifdef CONFIG_MEMCG_KMEM
330+ /*
331+ * Skip the dying kmem_cache.
332+ */
333+ if (s->memcg_params.dying)
334+ return 1;
335+#endif
336+
329337 return 0;
330338 }
331339
@@ -886,12 +894,15 @@ static int shutdown_memcg_caches(struct kmem_cache *s) · 554 unmodified lines
886894 return 0;
887895 }
888896
889−static void flush_memcg_workqueue(struct kmem_cache *s)
897+static void memcg_set_kmem_cache_dying(struct kmem_cache *s)
890898 {
891899 spin_lock_irq(&memcg_kmem_wq_lock);
892900 s->memcg_params.dying = true;
893901 spin_unlock_irq(&memcg_kmem_wq_lock);
902+}
894903
904+static void flush_memcg_workqueue(struct kmem_cache *s)
905+{
895906 /*
896907 * SLAB and SLUB deactivate the kmem_caches through call_rcu. Make
897908 * sure all registered rcu callbacks have been invoked.
@@ -923,10 +934,6 @@ static inline int shutdown_memcg_caches(struct kmem_cache *s) · 25 unmodified lines
923934 {
924935 return 0;
925936 }
926−
927−static inline void flush_memcg_workqueue(struct kmem_cache *s)
928−{
929−}
930937 #endif /* CONFIG_MEMCG_KMEM */
931938
932939 void slab_kmem_cache_release(struct kmem_cache *s)
@@ -944,8 +951,6 @@ void kmem_cache_destroy(struct kmem_cache *s) · 11 unmodified lines
944951 if (unlikely(!s))
945952 return;
946953
947− flush_memcg_workqueue(s);
948−
949954 get_online_cpus();
950955 get_online_mems();
951956
@@ -955,6 +960,22 @@ void kmem_cache_destroy(struct kmem_cache *s) · 3 unmodified lines
955960 if (s->refcount)
956961 goto out_unlock;
957962
963+#ifdef CONFIG_MEMCG_KMEM
964+ memcg_set_kmem_cache_dying(s);
965+
966+ mutex_unlock(&slab_mutex);
967+
968+ put_online_mems();
969+ put_online_cpus();
970+
971+ flush_memcg_workqueue(s);
972+
973+ get_online_cpus();
974+ get_online_mems();
975+
976+ mutex_lock(&slab_mutex);
977+#endif
978+
958979 err = shutdown_memcg_caches(s);
959980 if (!err)
960981 err = shutdown_cache(s);
net/ax25/af_ax25.c+8−2
@@ -1187,7 +1187,10 @@ static int __must_check ax25_connect(struct socket *sock, · 1186 unmodified lines
11871187 if (addr_len > sizeof(struct sockaddr_ax25) &&
11881188 fsa->fsa_ax25.sax25_ndigis != 0) {
11891189 /* Valid number of digipeaters ? */
1190− if (fsa->fsa_ax25.sax25_ndigis < 1 || fsa->fsa_ax25.sax25_ndigis > AX25_MAX_DIGIS) {
1190+ if (fsa->fsa_ax25.sax25_ndigis < 1 ||
1191+ fsa->fsa_ax25.sax25_ndigis > AX25_MAX_DIGIS ||
1192+ addr_len < sizeof(struct sockaddr_ax25) +
1193+ sizeof(ax25_address) * fsa->fsa_ax25.sax25_ndigis) {
11911194 err = -EINVAL;
11921195 goto out_release;
11931196 }
@@ -1507,7 +1510,10 @@ static int ax25_sendmsg(struct socket *sock, struct msghdr *msg, size_t len) · 313 unmodified lines
15071510 struct full_sockaddr_ax25 *fsa = (struct full_sockaddr_ax25 *)usax;
15081511
15091512 /* Valid number of digipeaters ? */
1510− if (usax->sax25_ndigis < 1 || usax->sax25_ndigis > AX25_MAX_DIGIS) {
1513+ if (usax->sax25_ndigis < 1 ||
1514+ usax->sax25_ndigis > AX25_MAX_DIGIS ||
1515+ addr_len < sizeof(struct sockaddr_ax25) +
1516+ sizeof(ax25_address) * usax->sax25_ndigis) {
15111517 err = -EINVAL;
15121518 goto out;
15131519 }
net/core/dev.c+1−1
@@ -5601,7 +5601,7 @@ static void flush_backlog(struct work_struct *work) · 5600 unmodified lines
56015601 skb_queue_walk_safe(&sd->input_pkt_queue, skb, tmp) {
56025602 if (skb->dev->reg_state == NETREG_UNREGISTERING) {
56035603 __skb_unlink(skb, &sd->input_pkt_queue);
5604− kfree_skb(skb);
5604+ dev_kfree_skb_irq(skb);
56055605 input_queue_head_incr(sd);
56065606 }
56075607 }
net/core/flow_offload.c+1−0
@@ -4,6 +4,7 @@ · 3 unmodified lines
44 #include <net/flow_offload.h>
55 #include <linux/rtnetlink.h>
66 #include <linux/mutex.h>
7+#include <linux/rhashtable.h>
78
89 struct flow_rule *flow_rule_alloc(unsigned int num_actions)
910 {
net/core/net-sysfs.c+1−1
@@ -1108,7 +1108,7 @@ static ssize_t tx_timeout_show(struct netdev_queue *queue, char *buf) · 1107 unmodified lines
11081108 trans_timeout = queue->trans_timeout;
11091109 spin_unlock_irq(&queue->_xmit_lock);
11101110
1111− return sprintf(buf, "%lu", trans_timeout);
1111+ return sprintf(buf, fmt_ulong, trans_timeout);
11121112 }
11131113
11141114 static unsigned int get_netdev_queue_index(struct netdev_queue *queue)
net/core/rtnetlink.c+2−1
@@ -3343,7 +3343,8 @@ replay: · 3342 unmodified lines
33433343 */
33443344 if (err < 0) {
33453345 /* If device is not registered at all, free it now */
3346− if (dev->reg_state == NETREG_UNINITIALIZED)
3346+ if (dev->reg_state == NETREG_UNINITIALIZED ||
3347+ dev->reg_state == NETREG_UNREGISTERED)
33473348 free_netdev(dev);
33483349 goto out;
33493350 }
net/core/sock_reuseport.c+1−0
@@ -101,6 +101,7 @@ static struct sock_reuseport *reuseport_grow(struct sock_reuseport *reuse) · 100 unmodified lines
101101 more_reuse->prog = reuse->prog;
102102 more_reuse->reuseport_id = reuse->reuseport_id;
103103 more_reuse->bind_inany = reuse->bind_inany;
104+ more_reuse->has_conns = reuse->has_conns;
104105
105106 memcpy(more_reuse->socks, reuse->socks,
106107 reuse->num_socks * sizeof(struct sock *));
net/hsr/hsr_forward.c+13−5
@@ -120,13 +120,18 @@ static struct sk_buff *frame_get_stripped_skb(struct hsr_frame_info *frame, · 119 unmodified lines
120120 return skb_clone(frame->skb_std, GFP_ATOMIC);
121121 }
122122
123−static void hsr_fill_tag(struct sk_buff *skb, struct hsr_frame_info *frame,
124− struct hsr_port *port, u8 proto_version)
123+static struct sk_buff *hsr_fill_tag(struct sk_buff *skb,
124+ struct hsr_frame_info *frame,
125+ struct hsr_port *port, u8 proto_version)
125126 {
126127 struct hsr_ethhdr *hsr_ethhdr;
127128 int lane_id;
128129 int lsdu_size;
129130
131+ /* pad to minimum packet size which is 60 + 6 (HSR tag) */
132+ if (skb_put_padto(skb, ETH_ZLEN + HSR_HLEN))
133+ return NULL;
134+
130135 if (port->type == HSR_PT_SLAVE_A)
131136 lane_id = 0;
132137 else
@@ -144,6 +149,8 @@ static void hsr_fill_tag(struct sk_buff *skb, struct hsr_frame_info *frame, · 11 unmodified lines
144149 hsr_ethhdr->hsr_tag.encap_proto = hsr_ethhdr->ethhdr.h_proto;
145150 hsr_ethhdr->ethhdr.h_proto = htons(proto_version ?
146151 ETH_P_HSR : ETH_P_PRP);
152+
153+ return skb;
147154 }
148155
149156 static struct sk_buff *create_tagged_skb(struct sk_buff *skb_o,
@@ -172,9 +179,10 @@ static struct sk_buff *create_tagged_skb(struct sk_buff *skb_o, · 22 unmodified lines
172179 memmove(dst, src, movelen);
173180 skb_reset_mac_header(skb);
174181
175− hsr_fill_tag(skb, frame, port, port->hsr->prot_version);
176−
177− return skb;
182+ /* skb_put_padto free skb on error and hsr_fill_tag returns NULL in
183+ * that case
184+ */
185+ return hsr_fill_tag(skb, frame, port, port->hsr->prot_version);
178186 }
179187
180188 /* If the original frame was an HSR tagged frame, just clone it to be sent
net/hsr/hsr_framereg.c+2−1
@@ -325,7 +325,8 @@ void hsr_addr_subst_dest(struct hsr_node *node_src, struct sk_buff *skb, · 324 unmodified lines
325325 if (port->type != node_dst->addr_B_port)
326326 return;
327327
328− ether_addr_copy(eth_hdr(skb)->h_dest, node_dst->macaddress_B);
328+ if (is_valid_ether_addr(node_dst->macaddress_B))
329+ ether_addr_copy(eth_hdr(skb)->h_dest, node_dst->macaddress_B);
329330 }
330331
331332 void hsr_register_frame_in(struct hsr_node *node, struct hsr_port *port,
net/ipv4/tcp_input.c+6−5
@@ -3488,10 +3488,8 @@ static void tcp_replace_ts_recent(struct tcp_sock *tp, u32 seq) · 3487 unmodified lines
34883488 }
34893489 }
34903490
3491−/* This routine deals with acks during a TLP episode.
3492− * We mark the end of a TLP episode on receiving TLP dupack or when
3493− * ack is after tlp_high_seq.
3494− * Ref: loss detection algorithm in draft-dukkipati-tcpm-tcp-loss-probe.
3491+/* This routine deals with acks during a TLP episode and ends an episode by
3492+ * resetting tlp_high_seq. Ref: TLP algorithm in draft-ietf-tcpm-rack
34953493 */
34963494 static void tcp_process_tlp_ack(struct sock *sk, u32 ack, int flag)
34973495 {
@@ -3500,7 +3498,10 @@ static void tcp_process_tlp_ack(struct sock *sk, u32 ack, int flag) · 2 unmodified lines
35003498 if (before(ack, tp->tlp_high_seq))
35013499 return;
35023500
3503− if (flag & FLAG_DSACKING_ACK) {
3501+ if (!tp->tlp_retrans) {
3502+ /* TLP of new data has been acknowledged */
3503+ tp->tlp_high_seq = 0;
3504+ } else if (flag & FLAG_DSACKING_ACK) {
35043505 /* This DSACK means original and TLP probe arrived; no loss */
35053506 tp->tlp_high_seq = 0;
35063507 } else if (after(ack, tp->tlp_high_seq)) {
net/ipv4/tcp_output.c+8−5
@@ -2624,6 +2624,11 @@ void tcp_send_loss_probe(struct sock *sk) · 2623 unmodified lines
26242624 int pcount;
26252625 int mss = tcp_current_mss(sk);
26262626
2627+ /* At most one outstanding TLP */
2628+ if (tp->tlp_high_seq)
2629+ goto rearm_timer;
2630+
2631+ tp->tlp_retrans = 0;
26272632 skb = tcp_send_head(sk);
26282633 if (skb && tcp_snd_wnd_test(tp, skb, mss)) {
26292634 pcount = tp->packets_out;
@@ -2641,10 +2646,6 @@ void tcp_send_loss_probe(struct sock *sk) · 11 unmodified lines
26412646 return;
26422647 }
26432648
2644− /* At most one outstanding TLP retransmission. */
2645− if (tp->tlp_high_seq)
2646− goto rearm_timer;
2647−
26482649 if (skb_still_in_host_queue(sk, skb))
26492650 goto rearm_timer;
26502651
@@ -2666,10 +2667,12 @@ void tcp_send_loss_probe(struct sock *sk) · 15 unmodified lines
26662667 if (__tcp_retransmit_skb(sk, skb, 1))
26672668 goto rearm_timer;
26682669
2670+ tp->tlp_retrans = 1;
2671+
2672+probe_sent:
26692673 /* Record snd_nxt for loss detection. */
26702674 tp->tlp_high_seq = tp->snd_nxt;
26712675
2672−probe_sent:
26732676 NET_INC_STATS(sock_net(sk), LINUX_MIB_TCPLOSSPROBES);
26742677 /* Reset s.t. tcp_rearm_rto will restart timer from now */
26752678 inet_csk(sk)->icsk_pending = 0;
net/ipv4/udp.c+10−7
@@ -416,7 +416,7 @@ static struct sock *udp4_lib_lookup2(struct net *net, · 415 unmodified lines
416416 struct udp_hslot *hslot2,
417417 struct sk_buff *skb)
418418 {
419− struct sock *sk, *result;
419+ struct sock *sk, *result, *reuseport_result;
420420 int score, badness;
421421 u32 hash = 0;
422422
@@ -426,17 +426,20 @@ static struct sock *udp4_lib_lookup2(struct net *net, · 3 unmodified lines
426426 score = compute_score(sk, net, saddr, sport,
427427 daddr, hnum, dif, sdif);
428428 if (score > badness) {
429+ reuseport_result = NULL;
430+
429431 if (sk->sk_reuseport &&
430432 sk->sk_state != TCP_ESTABLISHED) {
431433 hash = udp_ehashfn(net, daddr, hnum,
432434 saddr, sport);
433− result = reuseport_select_sock(sk, hash, skb,
434− sizeof(struct udphdr));
435− if (result && !reuseport_has_conns(sk, false))
436− return result;
435+ reuseport_result = reuseport_select_sock(sk, hash, skb,
436+ sizeof(struct udphdr));
437+ if (reuseport_result && !reuseport_has_conns(sk, false))
438+ return reuseport_result;
437439 }
440+
441+ result = reuseport_result ? : sk;
438442 badness = score;
439− result = sk;
440443 }
441444 }
442445 return result;
@@ -2051,7 +2054,7 @@ static int udp_queue_rcv_one_skb(struct sock *sk, struct sk_buff *skb) · 1608 unmodified lines
20512054 /*
20522055 * UDP-Lite specific tests, ignored on UDP sockets
20532056 */
2054− if ((is_udplite & UDPLITE_RECV_CC) && UDP_SKB_CB(skb)->partial_cov) {
2057+ if ((up->pcflag & UDPLITE_RECV_CC) && UDP_SKB_CB(skb)->partial_cov) {
20552058
20562059 /*
20572060 * MIB statistics other than incrementing the error count are
net/ipv6/ip6_gre.c+6−5
@@ -1562,17 +1562,18 @@ static void ip6gre_destroy_tunnels(struct net *net, struct list_head *head) · 1561 unmodified lines
15621562 static int __net_init ip6gre_init_net(struct net *net)
15631563 {
15641564 struct ip6gre_net *ign = net_generic(net, ip6gre_net_id);
1565+ struct net_device *ndev;
15651566 int err;
15661567
15671568 if (!net_has_fallback_tunnels(net))
15681569 return 0;
1569− ign->fb_tunnel_dev = alloc_netdev(sizeof(struct ip6_tnl), "ip6gre0",
1570− NET_NAME_UNKNOWN,
1571− ip6gre_tunnel_setup);
1572− if (!ign->fb_tunnel_dev) {
1570+ ndev = alloc_netdev(sizeof(struct ip6_tnl), "ip6gre0",
1571+ NET_NAME_UNKNOWN, ip6gre_tunnel_setup);
1572+ if (!ndev) {
15731573 err = -ENOMEM;
15741574 goto err_alloc_dev;
15751575 }
1576+ ign->fb_tunnel_dev = ndev;
15761577 dev_net_set(ign->fb_tunnel_dev, net);
15771578 /* FB netdevice is special: we have one, and only one per netns.
15781579 * Allowing to move it to another netns is clearly unsafe.
@@ -1592,7 +1593,7 @@ static int __net_init ip6gre_init_net(struct net *net) · 13 unmodified lines
15921593 return 0;
15931594
15941595 err_reg_dev:
1595− free_netdev(ign->fb_tunnel_dev);
1596+ free_netdev(ndev);
15961597 err_alloc_dev:
15971598 return err;
15981599 }
net/ipv6/udp.c+10−7
@@ -148,7 +148,7 @@ static struct sock *udp6_lib_lookup2(struct net *net, · 147 unmodified lines
148148 int dif, int sdif, struct udp_hslot *hslot2,
149149 struct sk_buff *skb)
150150 {
151− struct sock *sk, *result;
151+ struct sock *sk, *result, *reuseport_result;
152152 int score, badness;
153153 u32 hash = 0;
154154
@@ -158,17 +158,20 @@ static struct sock *udp6_lib_lookup2(struct net *net, · 3 unmodified lines
158158 score = compute_score(sk, net, saddr, sport,
159159 daddr, hnum, dif, sdif);
160160 if (score > badness) {
161+ reuseport_result = NULL;
162+
161163 if (sk->sk_reuseport &&
162164 sk->sk_state != TCP_ESTABLISHED) {
163165 hash = udp6_ehashfn(net, daddr, hnum,
164166 saddr, sport);
165167
166− result = reuseport_select_sock(sk, hash, skb,
167− sizeof(struct udphdr));
168− if (result && !reuseport_has_conns(sk, false))
169− return result;
168+ reuseport_result = reuseport_select_sock(sk, hash, skb,
169+ sizeof(struct udphdr));
170+ if (reuseport_result && !reuseport_has_conns(sk, false))
171+ return reuseport_result;
170172 }
171− result = sk;
173+
174+ result = reuseport_result ? : sk;
172175 badness = score;
173176 }
174177 }
@@ -643,7 +646,7 @@ static int udpv6_queue_rcv_one_skb(struct sock *sk, struct sk_buff *skb) · 468 unmodified lines
643646 /*
644647 * UDP-Lite specific tests, ignored on UDP sockets (see net/ipv4/udp.c).
645648 */
646− if ((is_udplite & UDPLITE_RECV_CC) && UDP_SKB_CB(skb)->partial_cov) {
649+ if ((up->pcflag & UDPLITE_RECV_CC) && UDP_SKB_CB(skb)->partial_cov) {
647650
648651 if (up->pcrlen == 0) { /* full coverage was set */
649652 net_dbg_ratelimited("UDPLITE6: partial coverage %d while full coverage %d requested\n",
net/netfilter/ipvs/ip_vs_sync.c+8−4
@@ -1717,6 +1717,8 @@ static int sync_thread_backup(void *data) · 1716 unmodified lines
17171717 {
17181718 struct ip_vs_sync_thread_data *tinfo = data;
17191719 struct netns_ipvs *ipvs = tinfo->ipvs;
1720+ struct sock *sk = tinfo->sock->sk;
1721+ struct udp_sock *up = udp_sk(sk);
17201722 int len;
17211723
17221724 pr_info("sync thread started: state = BACKUP, mcast_ifn = %s, "
@@ -1724,12 +1726,14 @@ static int sync_thread_backup(void *data) · 1 unmodified line
17241726 ipvs->bcfg.mcast_ifn, ipvs->bcfg.syncid, tinfo->id);
17251727
17261728 while (!kthread_should_stop()) {
1727− wait_event_interruptible(*sk_sleep(tinfo->sock->sk),
1728− !skb_queue_empty(&tinfo->sock->sk->sk_receive_queue)
1729− || kthread_should_stop());
1729+ wait_event_interruptible(*sk_sleep(sk),
1730+ !skb_queue_empty_lockless(&sk->sk_receive_queue) ||
1731+ !skb_queue_empty_lockless(&up->reader_queue) ||
1732+ kthread_should_stop());
17301733
17311734 /* do we have data now? */
1732− while (!skb_queue_empty(&(tinfo->sock->sk->sk_receive_queue))) {
1735+ while (!skb_queue_empty_lockless(&sk->sk_receive_queue) ||
1736+ !skb_queue_empty_lockless(&up->reader_queue)) {
17331737 len = ip_vs_receive(tinfo->sock, tinfo->buf,
17341738 ipvs->bcfg.sync_maxlen);
17351739 if (len <= 0) {
net/netfilter/nf_tables_api.c+14−27
@@ -188,24 +188,6 @@ static void nft_netdev_unregister_hooks(struct net *net, · 187 unmodified lines
188188 nf_unregister_net_hook(net, &hook->ops);
189189 }
190190
191−static int nft_register_basechain_hooks(struct net *net, int family,
192− struct nft_base_chain *basechain)
193−{
194− if (family == NFPROTO_NETDEV)
195− return nft_netdev_register_hooks(net, &basechain->hook_list);
196−
197− return nf_register_net_hook(net, &basechain->ops);
198−}
199−
200−static void nft_unregister_basechain_hooks(struct net *net, int family,
201− struct nft_base_chain *basechain)
202−{
203− if (family == NFPROTO_NETDEV)
204− nft_netdev_unregister_hooks(net, &basechain->hook_list);
205− else
206− nf_unregister_net_hook(net, &basechain->ops);
207−}
208−
209191 static int nf_tables_register_hook(struct net *net,
210192 const struct nft_table *table,
211193 struct nft_chain *chain)
@@ -223,7 +205,10 @@ static int nf_tables_register_hook(struct net *net, · 11 unmodified lines
223205 if (basechain->type->ops_register)
224206 return basechain->type->ops_register(net, ops);
225207
226− return nft_register_basechain_hooks(net, table->family, basechain);
208+ if (table->family == NFPROTO_NETDEV)
209+ return nft_netdev_register_hooks(net, &basechain->hook_list);
210+
211+ return nf_register_net_hook(net, &basechain->ops);
227212 }
228213
229214 static void nf_tables_unregister_hook(struct net *net,
@@ -242,7 +227,10 @@ static void nf_tables_unregister_hook(struct net *net, · 12 unmodified lines
242227 if (basechain->type->ops_unregister)
243228 return basechain->type->ops_unregister(net, ops);
244229
245− nft_unregister_basechain_hooks(net, table->family, basechain);
230+ if (table->family == NFPROTO_NETDEV)
231+ nft_netdev_unregister_hooks(net, &basechain->hook_list);
232+ else
233+ nf_unregister_net_hook(net, &basechain->ops);
246234 }
247235
248236 static int nft_trans_table_add(struct nft_ctx *ctx, int msg_type)
@@ -832,8 +820,7 @@ static void nft_table_disable(struct net *net, struct nft_table *table, u32 cnt) · 583 unmodified lines
832820 if (cnt && i++ == cnt)
833821 break;
834822
835− nft_unregister_basechain_hooks(net, table->family,
836− nft_base_chain(chain));
823+ nf_tables_unregister_hook(net, table, chain);
837824 }
838825 }
839826
@@ -848,8 +835,7 @@ static int nf_tables_table_enable(struct net *net, struct nft_table *table) · 8 unmodified lines
848835 if (!nft_is_base_chain(chain))
849836 continue;
850837
851− err = nft_register_basechain_hooks(net, table->family,
852− nft_base_chain(chain));
838+ err = nf_tables_register_hook(net, table, chain);
853839 if (err < 0)
854840 goto err_register_hooks;
855841
@@ -894,11 +880,12 @@ static int nf_tables_updtable(struct nft_ctx *ctx) · 38 unmodified lines
894880 nft_trans_table_enable(trans) = false;
895881 } else if (!(flags & NFT_TABLE_F_DORMANT) &&
896882 ctx->table->flags & NFT_TABLE_F_DORMANT) {
883+ ctx->table->flags &= ~NFT_TABLE_F_DORMANT;
897884 ret = nf_tables_table_enable(ctx->net, ctx->table);
898− if (ret >= 0) {
899− ctx->table->flags &= ~NFT_TABLE_F_DORMANT;
885+ if (ret >= 0)
900886 nft_trans_table_enable(trans) = true;
901− }
887+ else
888+ ctx->table->flags |= NFT_TABLE_F_DORMANT;
902889 }
903890 if (ret < 0)
904891 goto err;
net/nfc/nci/core.c+4−1
@@ -1228,10 +1228,13 @@ int nci_register_device(struct nci_dev *ndev) · 1227 unmodified lines
12281228
12291229 rc = nfc_register_device(ndev->nfc_dev);
12301230 if (rc)
1231− goto destroy_rx_wq_exit;
1231+ goto destroy_tx_wq_exit;
12321232
12331233 goto exit;
12341234
1235+destroy_tx_wq_exit:
1236+ destroy_workqueue(ndev->tx_wq);
1237+
12351238 destroy_rx_wq_exit:
12361239 destroy_workqueue(ndev->rx_wq);
12371240
net/qrtr/qrtr.c+1−0
@@ -1180,6 +1180,7 @@ static int qrtr_release(struct socket *sock) · 1179 unmodified lines
11801180 sk->sk_state_change(sk);
11811181
11821182 sock_set_flag(sk, SOCK_DEAD);
1183+ sock_orphan(sk);
11831184 sock->sk = NULL;
11841185
11851186 if (!sock_flag(sk, SOCK_ZAPPED))
net/rxrpc/recvmsg.c+1−1
@@ -543,7 +543,7 @@ try_again: · 542 unmodified lines
543543 list_empty(&rx->recvmsg_q) &&
544544 rx->sk.sk_state != RXRPC_SERVER_LISTENING) {
545545 release_sock(&rx->sk);
546− return -ENODATA;
546+ return -EAGAIN;
547547 }
548548
549549 if (list_empty(&rx->recvmsg_q)) {
net/rxrpc/sendmsg.c+1−1
@@ -304,7 +304,7 @@ static int rxrpc_send_data(struct rxrpc_sock *rx, · 303 unmodified lines
304304 /* this should be in poll */
305305 sk_clear_bit(SOCKWQ_ASYNC_NOSPACE, sk);
306306
307− if (sk->sk_err || (sk->sk_shutdown & SEND_SHUTDOWN))
307+ if (sk->sk_shutdown & SEND_SHUTDOWN)
308308 return -EPIPE;
309309
310310 more = msg->msg_flags & MSG_MORE;
net/sched/act_ct.c+14−2
@@ -673,9 +673,10 @@ static int tcf_ct_ipv6_is_fragment(struct sk_buff *skb, bool *frag) · 672 unmodified lines
673673 }
674674
675675 static int tcf_ct_handle_fragments(struct net *net, struct sk_buff *skb,
676− u8 family, u16 zone)
676+ u8 family, u16 zone, bool *defrag)
677677 {
678678 enum ip_conntrack_info ctinfo;
679+ struct qdisc_skb_cb cb;
679680 struct nf_conn *ct;
680681 int err = 0;
681682 bool frag;
@@ -693,6 +694,7 @@ static int tcf_ct_handle_fragments(struct net *net, struct sk_buff *skb, · 11 unmodified lines
693694 return err;
694695
695696 skb_get(skb);
697+ cb = *qdisc_skb_cb(skb);
696698
697699 if (family == NFPROTO_IPV4) {
698700 enum ip_defrag_users user = IP_DEFRAG_CONNTRACK_IN + zone;
@@ -703,6 +705,9 @@ static int tcf_ct_handle_fragments(struct net *net, struct sk_buff *skb, · 4 unmodified lines
703705 local_bh_enable();
704706 if (err && err != -EINPROGRESS)
705707 goto out_free;
708+
709+ if (!err)
710+ *defrag = true;
706711 } else { /* NFPROTO_IPV6 */
707712 #if IS_ENABLED(CONFIG_NF_DEFRAG_IPV6)
708713 enum ip6_defrag_users user = IP6_DEFRAG_CONNTRACK_IN + zone;
@@ -711,12 +716,16 @@ static int tcf_ct_handle_fragments(struct net *net, struct sk_buff *skb, · 2 unmodified lines
711716 err = nf_ct_frag6_gather(net, skb, user);
712717 if (err && err != -EINPROGRESS)
713718 goto out_free;
719+
720+ if (!err)
721+ *defrag = true;
714722 #else
715723 err = -EOPNOTSUPP;
716724 goto out_free;
717725 #endif
718726 }
719727
728+ *qdisc_skb_cb(skb) = cb;
720729 skb_clear_hash(skb);
721730 skb->ignore_df = 1;
722731 return err;
@@ -914,6 +923,7 @@ static int tcf_ct_act(struct sk_buff *skb, const struct tc_action *a, · 191 unmodified lines
914923 int nh_ofs, err, retval;
915924 struct tcf_ct_params *p;
916925 bool skip_add = false;
926+ bool defrag = false;
917927 struct nf_conn *ct;
918928 u8 family;
919929
@@ -946,7 +956,7 @@ static int tcf_ct_act(struct sk_buff *skb, const struct tc_action *a, · 26 unmodified lines
946956 */
947957 nh_ofs = skb_network_offset(skb);
948958 skb_pull_rcsum(skb, nh_ofs);
949− err = tcf_ct_handle_fragments(net, skb, family, p->zone);
959+ err = tcf_ct_handle_fragments(net, skb, family, p->zone, &defrag);
950960 if (err == -EINPROGRESS) {
951961 retval = TC_ACT_STOLEN;
952962 goto out;
@@ -1014,6 +1024,8 @@ out_push: · 61 unmodified lines
10141024
10151025 out:
10161026 tcf_action_update_bstats(&c->common, skb);
1027+ if (defrag)
1028+ qdisc_skb_cb(skb)->pkt_len = skb->len;
10171029 return retval;
10181030
10191031 drop:
net/sched/cls_api.c+0−1
@@ -20,7 +20,6 @@ · 19 unmodified lines
2020 #include <linux/kmod.h>
2121 #include <linux/slab.h>
2222 #include <linux/idr.h>
23−#include <linux/rhashtable.h>
2423 #include <linux/jhash.h>
2524 #include <linux/rculist.h>
2625 #include <net/net_namespace.h>
net/sctp/stream.c+18−9
@@ -22,17 +22,11 @@ · 21 unmodified lines
2222 #include <net/sctp/sm.h>
2323 #include <net/sctp/stream_sched.h>
2424
25−/* Migrates chunks from stream queues to new stream queues if needed,
26− * but not across associations. Also, removes those chunks to streams
27− * higher than the new max.
28− */
29−static void sctp_stream_outq_migrate(struct sctp_stream *stream,
30− struct sctp_stream *new, __u16 outcnt)
25+static void sctp_stream_shrink_out(struct sctp_stream *stream, __u16 outcnt)
3126 {
3227 struct sctp_association *asoc;
3328 struct sctp_chunk *ch, *temp;
3429 struct sctp_outq *outq;
35− int i;
3630
3731 asoc = container_of(stream, struct sctp_association, stream);
3832 outq = &asoc->outqueue;
@@ -56,6 +50,19 @@ static void sctp_stream_outq_migrate(struct sctp_stream *stream, · 17 unmodified lines
5650
5751 sctp_chunk_free(ch);
5852 }
53+}
54+
55+/* Migrates chunks from stream queues to new stream queues if needed,
56+ * but not across associations. Also, removes those chunks to streams
57+ * higher than the new max.
58+ */
59+static void sctp_stream_outq_migrate(struct sctp_stream *stream,
60+ struct sctp_stream *new, __u16 outcnt)
61+{
62+ int i;
63+
64+ if (stream->outcnt > outcnt)
65+ sctp_stream_shrink_out(stream, outcnt);
5966
6067 if (new) {
6168 /* Here we actually move the old ext stuff into the new
@@ -1037,11 +1044,13 @@ struct sctp_chunk *sctp_process_strreset_resp( · 975 unmodified lines
10371044 nums = ntohs(addstrm->number_of_streams);
10381045 number = stream->outcnt - nums;
10391046
1040− if (result == SCTP_STRRESET_PERFORMED)
1047+ if (result == SCTP_STRRESET_PERFORMED) {
10411048 for (i = number; i < stream->outcnt; i++)
10421049 SCTP_SO(stream, i)->state = SCTP_STREAM_OPEN;
1043− else
1050+ } else {
1051+ sctp_stream_shrink_out(stream, number);
10441052 stream->outcnt = number;
1053+ }
10451054
10461055 *evp = sctp_ulpevent_make_stream_change_event(asoc, flags,
10471056 0, nums, GFP_ATOMIC);
net/smc/af_smc.c+8−4
@@ -126,8 +126,10 @@ EXPORT_SYMBOL_GPL(smc_proto6); · 125 unmodified lines
126126
127127 static void smc_restore_fallback_changes(struct smc_sock *smc)
128128 {
129− smc->clcsock->file->private_data = smc->sk.sk_socket;
130− smc->clcsock->file = NULL;
129+ if (smc->clcsock->file) { /* non-accepted sockets have no file yet */
130+ smc->clcsock->file->private_data = smc->sk.sk_socket;
131+ smc->clcsock->file = NULL;
132+ }
131133 }
132134
133135 static int __smc_release(struct smc_sock *smc)
@@ -352,7 +354,7 @@ static int smcr_lgr_reg_rmbs(struct smc_link *link, · 218 unmodified lines
352354 */
353355 mutex_lock(&lgr->llc_conf_mutex);
354356 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
355− if (lgr->lnk[i].state != SMC_LNK_ACTIVE)
357+ if (!smc_link_active(&lgr->lnk[i]))
356358 continue;
357359 rc = smcr_link_reg_rmb(&lgr->lnk[i], rmb_desc);
358360 if (rc)
@@ -632,7 +634,9 @@ static int smc_connect_rdma(struct smc_sock *smc, · 273 unmodified lines
632634 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
633635 struct smc_link *l = &smc->conn.lgr->lnk[i];
634636
635− if (l->peer_qpn == ntoh24(aclc->qpn)) {
637+ if (l->peer_qpn == ntoh24(aclc->qpn) &&
638+ !memcmp(l->peer_gid, &aclc->lcl.gid, SMC_GID_SIZE) &&
639+ !memcmp(l->peer_mac, &aclc->lcl.mac, sizeof(l->peer_mac))) {
636640 link = l;
637641 break;
638642 }
net/smc/smc_cdc.c+5−1
@@ -66,9 +66,13 @@ int smc_cdc_get_free_slot(struct smc_connection *conn, · 65 unmodified lines
6666 rc = smc_wr_tx_get_free_slot(link, smc_cdc_tx_handler, wr_buf,
6767 wr_rdma_buf,
6868 (struct smc_wr_tx_pend_priv **)pend);
69− if (conn->killed)
69+ if (conn->killed) {
7070 /* abnormal termination */
71+ if (!rc)
72+ smc_wr_tx_put_slot(link,
73+ (struct smc_wr_tx_pend_priv *)pend);
7174 rc = -EPIPE;
75+ }
7276 return rc;
7377 }
7478
net/smc/smc_core.c+24−85
@@ -45,18 +45,10 @@ static struct smc_lgr_list smc_lgr_list = { /* established link groups */ · 44 unmodified lines
4545 static atomic_t lgr_cnt = ATOMIC_INIT(0); /* number of existing link groups */
4646 static DECLARE_WAIT_QUEUE_HEAD(lgrs_deleted);
4747
48−struct smc_ib_up_work {
49− struct work_struct work;
50− struct smc_link_group *lgr;
51− struct smc_ib_device *smcibdev;
52− u8 ibport;
53−};
54−
5548 static void smc_buf_free(struct smc_link_group *lgr, bool is_rmb,
5649 struct smc_buf_desc *buf_desc);
5750 static void __smc_lgr_terminate(struct smc_link_group *lgr, bool soft);
5851
59−static void smc_link_up_work(struct work_struct *work);
6052 static void smc_link_down_work(struct work_struct *work);
6153
6254 /* return head of link group list and its lock for a given link group */
@@ -326,7 +318,6 @@ int smcr_link_init(struct smc_link_group *lgr, struct smc_link *lnk, · 263 unmodified lines
326318
327319 get_device(&ini->ib_dev->ibdev->dev);
328320 atomic_inc(&ini->ib_dev->lnk_cnt);
329− lnk->state = SMC_LNK_ACTIVATING;
330321 lnk->link_id = smcr_next_link_id(lgr);
331322 lnk->lgr = lgr;
332323 lnk->link_idx = link_idx;
@@ -362,6 +353,7 @@ int smcr_link_init(struct smc_link_group *lgr, struct smc_link *lnk, · 29 unmodified lines
362353 rc = smc_wr_create_link(lnk);
363354 if (rc)
364355 goto destroy_qp;
356+ lnk->state = SMC_LNK_ACTIVATING;
365357 return 0;
366358
367359 destroy_qp:
@@ -452,7 +444,7 @@ static int smc_lgr_create(struct smc_sock *smc, struct smc_init_info *ini) · 84 unmodified lines
452444 }
453445 smc->conn.lgr = lgr;
454446 spin_lock_bh(lgr_lock);
455− list_add(&lgr->list, lgr_list);
447+ list_add_tail(&lgr->list, lgr_list);
456448 spin_unlock_bh(lgr_lock);
457449 return 0;
458450
@@ -550,8 +542,7 @@ struct smc_link *smc_switch_conns(struct smc_link_group *lgr, · 91 unmodified lines
550542 smc_wr_wakeup_tx_wait(from_lnk);
551543
552544 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
553− if (lgr->lnk[i].state != SMC_LNK_ACTIVE ||
554− i == from_lnk->link_idx)
545+ if (!smc_link_active(&lgr->lnk[i]) || i == from_lnk->link_idx)
555546 continue;
556547 if (is_dev_err && from_lnk->smcibdev == lgr->lnk[i].smcibdev &&
557548 from_lnk->ibport == lgr->lnk[i].ibport) {
@@ -1106,67 +1097,23 @@ static void smc_conn_abort_work(struct work_struct *work) · 548 unmodified lines
11061097 sock_put(&smc->sk); /* sock_hold done by schedulers of abort_work */
11071098 }
11081099
1109−/* link is up - establish alternate link if applicable */
1110−static void smcr_link_up(struct smc_link_group *lgr,
1111− struct smc_ib_device *smcibdev, u8 ibport)
1112−{
1113− struct smc_link *link = NULL;
1114−
1115− if (list_empty(&lgr->list) ||
1116− lgr->type == SMC_LGR_SYMMETRIC ||
1117− lgr->type == SMC_LGR_ASYMMETRIC_PEER)
1118− return;
1119−
1120− if (lgr->role == SMC_SERV) {
1121− /* trigger local add link processing */
1122− link = smc_llc_usable_link(lgr);
1123− if (!link)
1124− return;
1125− smc_llc_srv_add_link_local(link);
1126− } else {
1127− /* invite server to start add link processing */
1128− u8 gid[SMC_GID_SIZE];
1129−
1130− if (smc_ib_determine_gid(smcibdev, ibport, lgr->vlan_id, gid,
1131− NULL))
1132− return;
1133− if (lgr->llc_flow_lcl.type != SMC_LLC_FLOW_NONE) {
1134− /* some other llc task is ongoing */
1135− wait_event_timeout(lgr->llc_flow_waiter,
1136− (list_empty(&lgr->list) ||
1137− lgr->llc_flow_lcl.type == SMC_LLC_FLOW_NONE),
1138− SMC_LLC_WAIT_TIME);
1139− }
1140− /* lgr or device no longer active? */
1141− if (!list_empty(&lgr->list) &&
1142− smc_ib_port_active(smcibdev, ibport))
1143− link = smc_llc_usable_link(lgr);
1144− if (link)
1145− smc_llc_send_add_link(link, smcibdev->mac[ibport - 1],
1146− gid, NULL, SMC_LLC_REQ);
1147− wake_up(&lgr->llc_flow_waiter); /* wake up next waiter */
1148− }
1149−}
1150−
11511100 void smcr_port_add(struct smc_ib_device *smcibdev, u8 ibport)
11521101 {
1153− struct smc_ib_up_work *ib_work;
11541102 struct smc_link_group *lgr, *n;
11551103
11561104 list_for_each_entry_safe(lgr, n, &smc_lgr_list.list, list) {
1105+ struct smc_link *link;
1106+
11571107 if (strncmp(smcibdev->pnetid[ibport - 1], lgr->pnet_id,
11581108 SMC_MAX_PNETID_LEN) ||
11591109 lgr->type == SMC_LGR_SYMMETRIC ||
11601110 lgr->type == SMC_LGR_ASYMMETRIC_PEER)
11611111 continue;
1162− ib_work = kmalloc(sizeof(*ib_work), GFP_KERNEL);
1163− if (!ib_work)
1164− continue;
1165− INIT_WORK(&ib_work->work, smc_link_up_work);
1166− ib_work->lgr = lgr;
1167− ib_work->smcibdev = smcibdev;
1168− ib_work->ibport = ibport;
1169− schedule_work(&ib_work->work);
1112+
1113+ /* trigger local add link processing */
1114+ link = smc_llc_usable_link(lgr);
1115+ if (link)
1116+ smc_llc_add_link_local(link);
11701117 }
11711118 }
11721119
@@ -1204,10 +1151,12 @@ static void smcr_link_down(struct smc_link *lnk) · 31 unmodified lines
12041151 SMC_LLC_WAIT_TIME);
12051152 mutex_lock(&lgr->llc_conf_mutex);
12061153 }
1207− if (!list_empty(&lgr->list))
1154+ if (!list_empty(&lgr->list)) {
12081155 smc_llc_send_delete_link(to_lnk, del_link_id,
12091156 SMC_LLC_REQ, true,
12101157 SMC_LLC_DEL_LOST_PATH);
1158+ smcr_link_clear(lnk, true);
1159+ }
12111160 wake_up(&lgr->llc_flow_waiter); /* wake up next waiter */
12121161 }
12131162 }
@@ -1247,20 +1196,6 @@ void smcr_port_err(struct smc_ib_device *smcibdev, u8 ibport) · 33 unmodified lines
12471196 }
12481197 }
12491198
1250−static void smc_link_up_work(struct work_struct *work)
1251−{
1252− struct smc_ib_up_work *ib_work = container_of(work,
1253− struct smc_ib_up_work,
1254− work);
1255− struct smc_link_group *lgr = ib_work->lgr;
1256−
1257− if (list_empty(&lgr->list))
1258− goto out;
1259− smcr_link_up(lgr, ib_work->smcibdev, ib_work->ibport);
1260−out:
1261− kfree(ib_work);
1262−}
1263−
12641199 static void smc_link_down_work(struct work_struct *work)
12651200 {
12661201 struct smc_link *link = container_of(work, struct smc_link,
@@ -1333,7 +1268,7 @@ static bool smcr_lgr_match(struct smc_link_group *lgr, · 66 unmodified lines
13331268 return false;
13341269
13351270 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
1336− if (lgr->lnk[i].state != SMC_LNK_ACTIVE)
1271+ if (!smc_link_active(&lgr->lnk[i]))
13371272 continue;
13381273 if ((lgr->role == SMC_SERV || lgr->lnk[i].peer_qpn == clcqpn) &&
13391274 !memcmp(lgr->lnk[i].peer_gid, &lcl->gid, SMC_GID_SIZE) &&
@@ -1376,7 +1311,7 @@ int smc_conn_create(struct smc_sock *smc, struct smc_init_info *ini) · 36 unmodified lines
13761311 smcr_lgr_match(lgr, ini->ib_lcl, role, ini->ib_clcqpn)) &&
13771312 !lgr->sync_err &&
13781313 lgr->vlan_id == ini->vlan_id &&
1379− (role == SMC_CLNT ||
1314+ (role == SMC_CLNT || ini->is_smcd ||
13801315 lgr->conns_num < SMC_RMBS_PER_LGR_MAX)) {
13811316 /* link group found */
13821317 ini->cln_first_contact = SMC_REUSE_CONTACT;
@@ -1781,14 +1716,14 @@ static int __smc_buf_create(struct smc_sock *smc, bool is_smcd, bool is_rmb) · 398 unmodified lines
17811716
17821717 void smc_sndbuf_sync_sg_for_cpu(struct smc_connection *conn)
17831718 {
1784− if (!conn->lgr || conn->lgr->is_smcd || !smc_link_usable(conn->lnk))
1719+ if (!conn->lgr || conn->lgr->is_smcd || !smc_link_active(conn->lnk))
17851720 return;
17861721 smc_ib_sync_sg_for_cpu(conn->lnk, conn->sndbuf_desc, DMA_TO_DEVICE);
17871722 }
17881723
17891724 void smc_sndbuf_sync_sg_for_device(struct smc_connection *conn)
17901725 {
1791− if (!conn->lgr || conn->lgr->is_smcd || !smc_link_usable(conn->lnk))
1726+ if (!conn->lgr || conn->lgr->is_smcd || !smc_link_active(conn->lnk))
17921727 return;
17931728 smc_ib_sync_sg_for_device(conn->lnk, conn->sndbuf_desc, DMA_TO_DEVICE);
17941729 }
@@ -1800,7 +1735,7 @@ void smc_rmb_sync_sg_for_cpu(struct smc_connection *conn) · 5 unmodified lines
18001735 if (!conn->lgr || conn->lgr->is_smcd)
18011736 return;
18021737 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
1803− if (!smc_link_usable(&conn->lgr->lnk[i]))
1738+ if (!smc_link_active(&conn->lgr->lnk[i]))
18041739 continue;
18051740 smc_ib_sync_sg_for_cpu(&conn->lgr->lnk[i], conn->rmb_desc,
18061741 DMA_FROM_DEVICE);
@@ -1814,7 +1749,7 @@ void smc_rmb_sync_sg_for_device(struct smc_connection *conn) · 7 unmodified lines
18141749 if (!conn->lgr || conn->lgr->is_smcd)
18151750 return;
18161751 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
1817− if (!smc_link_usable(&conn->lgr->lnk[i]))
1752+ if (!smc_link_active(&conn->lgr->lnk[i]))
18181753 continue;
18191754 smc_ib_sync_sg_for_device(&conn->lgr->lnk[i], conn->rmb_desc,
18201755 DMA_FROM_DEVICE);
@@ -1837,8 +1772,12 @@ int smc_buf_create(struct smc_sock *smc, bool is_smcd) · 16 unmodified lines
18371772 return rc;
18381773 /* create rmb */
18391774 rc = __smc_buf_create(smc, is_smcd, true);
1840− if (rc)
1775+ if (rc) {
1776+ mutex_lock(&smc->conn.lgr->sndbufs_lock);
1777+ list_del(&smc->conn.sndbuf_desc->list);
1778+ mutex_unlock(&smc->conn.lgr->sndbufs_lock);
18411779 smc_buf_free(smc->conn.lgr, false, smc->conn.sndbuf_desc);
1780+ }
18421781 return rc;
18431782 }
18441783
net/smc/smc_core.h+5−0
@@ -349,6 +349,11 @@ static inline bool smc_link_usable(struct smc_link *lnk) · 348 unmodified lines
349349 return true;
350350 }
351351
352+static inline bool smc_link_active(struct smc_link *lnk)
353+{
354+ return lnk->state == SMC_LNK_ACTIVE;
355+}
356+
352357 struct smc_sock;
353358 struct smc_clc_msg_accept_confirm;
354359 struct smc_clc_msg_local;
net/smc/smc_ib.c+13−3
@@ -506,6 +506,10 @@ long smc_ib_setup_per_ibdev(struct smc_ib_device *smcibdev) · 505 unmodified lines
506506 int cqe_size_order, smc_order;
507507 long rc;
508508
509+ mutex_lock(&smcibdev->mutex);
510+ rc = 0;
511+ if (smcibdev->initialized)
512+ goto out;
509513 /* the calculated number of cq entries fits to mlx5 cq allocation */
510514 cqe_size_order = cache_line_size() == 128 ? 7 : 6;
511515 smc_order = MAX_ORDER - cqe_size_order - 1;
@@ -517,7 +521,7 @@ long smc_ib_setup_per_ibdev(struct smc_ib_device *smcibdev) · 5 unmodified lines
517521 rc = PTR_ERR_OR_ZERO(smcibdev->roce_cq_send);
518522 if (IS_ERR(smcibdev->roce_cq_send)) {
519523 smcibdev->roce_cq_send = NULL;
520− return rc;
524+ goto out;
521525 }
522526 smcibdev->roce_cq_recv = ib_create_cq(smcibdev->ibdev,
523527 smc_wr_rx_cq_handler, NULL,
@@ -529,21 +533,26 @@ long smc_ib_setup_per_ibdev(struct smc_ib_device *smcibdev) · 5 unmodified lines
529533 }
530534 smc_wr_add_dev(smcibdev);
531535 smcibdev->initialized = 1;
532− return rc;
536+ goto out;
533537
534538 err:
535539 ib_destroy_cq(smcibdev->roce_cq_send);
540+out:
541+ mutex_unlock(&smcibdev->mutex);
536542 return rc;
537543 }
538544
539545 static void smc_ib_cleanup_per_ibdev(struct smc_ib_device *smcibdev)
540546 {
547+ mutex_lock(&smcibdev->mutex);
541548 if (!smcibdev->initialized)
542− return;
549+ goto out;
543550 smcibdev->initialized = 0;
544551 ib_destroy_cq(smcibdev->roce_cq_recv);
545552 ib_destroy_cq(smcibdev->roce_cq_send);
546553 smc_wr_remove_dev(smcibdev);
554+out:
555+ mutex_unlock(&smcibdev->mutex);
547556 }
548557
549558 static struct ib_client smc_ib_client;
@@ -566,6 +575,7 @@ static int smc_ib_add_dev(struct ib_device *ibdev) · 16 unmodified lines
566575 INIT_WORK(&smcibdev->port_event_work, smc_ib_port_event_work);
567576 atomic_set(&smcibdev->lnk_cnt, 0);
568577 init_waitqueue_head(&smcibdev->lnks_deleted);
578+ mutex_init(&smcibdev->mutex);
569579 mutex_lock(&smc_ib_devices.mutex);
570580 list_add_tail(&smcibdev->list, &smc_ib_devices.list);
571581 mutex_unlock(&smc_ib_devices.mutex);
net/smc/smc_ib.h+1−0
@@ -52,6 +52,7 @@ struct smc_ib_device { /* ib-device infos for smc */ · 51 unmodified lines
5252 DECLARE_BITMAP(ports_going_away, SMC_MAX_PORTS);
5353 atomic_t lnk_cnt; /* number of links on ibdev */
5454 wait_queue_head_t lnks_deleted; /* wait 4 removal of all links*/
55+ struct mutex mutex; /* protect dev setup+cleanup */
5556 };
5657
5758 struct smc_buf_desc;
net/smc/smc_llc.c+85−42
@@ -428,7 +428,7 @@ static int smc_llc_send_confirm_rkey(struct smc_link *send_link, · 427 unmodified lines
428428 rtok_ix = 1;
429429 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
430430 link = &send_link->lgr->lnk[i];
431− if (link->state == SMC_LNK_ACTIVE && link != send_link) {
431+ if (smc_link_active(link) && link != send_link) {
432432 rkeyllc->rtoken[rtok_ix].link_id = link->link_id;
433433 rkeyllc->rtoken[rtok_ix].rmb_key =
434434 htonl(rmb_desc->mr_rx[link->link_idx]->rkey);
@@ -895,6 +895,36 @@ out: · 460 unmodified lines
895895 return rc;
896896 }
897897
898+/* as an SMC client, invite server to start the add_link processing */
899+static void smc_llc_cli_add_link_invite(struct smc_link *link,
900+ struct smc_llc_qentry *qentry)
901+{
902+ struct smc_link_group *lgr = smc_get_lgr(link);
903+ struct smc_init_info ini;
904+
905+ if (lgr->type == SMC_LGR_SYMMETRIC ||
906+ lgr->type == SMC_LGR_ASYMMETRIC_PEER)
907+ goto out;
908+
909+ ini.vlan_id = lgr->vlan_id;
910+ smc_pnet_find_alt_roce(lgr, &ini, link->smcibdev);
911+ if (!ini.ib_dev)
912+ goto out;
913+
914+ smc_llc_send_add_link(link, ini.ib_dev->mac[ini.ib_port - 1],
915+ ini.ib_gid, NULL, SMC_LLC_REQ);
916+out:
917+ kfree(qentry);
918+}
919+
920+static bool smc_llc_is_local_add_link(union smc_llc_msg *llc)
921+{
922+ if (llc->raw.hdr.common.type == SMC_LLC_ADD_LINK &&
923+ !llc->add_link.qp_mtu && !llc->add_link.link_num)
924+ return true;
925+ return false;
926+}
927+
898928 static void smc_llc_process_cli_add_link(struct smc_link_group *lgr)
899929 {
900930 struct smc_llc_qentry *qentry;
@@ -902,7 +932,10 @@ static void smc_llc_process_cli_add_link(struct smc_link_group *lgr) · 1 unmodified line
902932 qentry = smc_llc_flow_qentry_clr(&lgr->llc_flow_lcl);
903933
904934 mutex_lock(&lgr->llc_conf_mutex);
905− smc_llc_cli_add_link(qentry->link, qentry);
935+ if (smc_llc_is_local_add_link(&qentry->msg))
936+ smc_llc_cli_add_link_invite(qentry->link, qentry);
937+ else
938+ smc_llc_cli_add_link(qentry->link, qentry);
906939 mutex_unlock(&lgr->llc_conf_mutex);
907940 }
908941
@@ -911,7 +944,7 @@ static int smc_llc_active_link_count(struct smc_link_group *lgr) · 2 unmodified lines
911944 int i, link_count = 0;
912945
913946 for (i = 0; i < SMC_LINKS_PER_LGR_MAX; i++) {
914− if (!smc_link_usable(&lgr->lnk[i]))
947+ if (!smc_link_active(&lgr->lnk[i]))
915948 continue;
916949 link_count++;
917950 }
@@ -1051,12 +1084,14 @@ static int smc_llc_srv_conf_link(struct smc_link *link, · 133 unmodified lines
10511084 if (rc)
10521085 return -ENOLINK;
10531086 /* receive CONFIRM LINK response over the RoCE fabric */
1054− qentry = smc_llc_wait(lgr, link, SMC_LLC_WAIT_FIRST_TIME,
1055− SMC_LLC_CONFIRM_LINK);
1056− if (!qentry) {
1087+ qentry = smc_llc_wait(lgr, link, SMC_LLC_WAIT_FIRST_TIME, 0);
1088+ if (!qentry ||
1089+ qentry->msg.raw.hdr.common.type != SMC_LLC_CONFIRM_LINK) {
10571090 /* send DELETE LINK */
10581091 smc_llc_send_delete_link(link, link_new->link_id, SMC_LLC_REQ,
10591092 false, SMC_LLC_DEL_LOST_PATH);
1093+ if (qentry)
1094+ smc_llc_flow_qentry_del(&lgr->llc_flow_lcl);
10601095 return -ENOLINK;
10611096 }
10621097 smc_llc_save_peer_uid(qentry);
@@ -1158,14 +1193,14 @@ static void smc_llc_process_srv_add_link(struct smc_link_group *lgr) · 95 unmodified lines
11581193 mutex_unlock(&lgr->llc_conf_mutex);
11591194 }
11601195
1161−/* enqueue a local add_link req to trigger a new add_link flow, only as SERV */
1162−void smc_llc_srv_add_link_local(struct smc_link *link)
1196+/* enqueue a local add_link req to trigger a new add_link flow */
1197+void smc_llc_add_link_local(struct smc_link *link)
11631198 {
11641199 struct smc_llc_msg_add_link add_llc = {0};
11651200
11661201 add_llc.hd.length = sizeof(add_llc);
11671202 add_llc.hd.common.type = SMC_LLC_ADD_LINK;
1168− /* no dev and port needed, we as server ignore client data anyway */
1203+ /* no dev and port needed */
11691204 smc_llc_enqueue(link, (union smc_llc_msg *)&add_llc);
11701205 }
11711206
@@ -1345,7 +1380,7 @@ static void smc_llc_process_srv_delete_link(struct smc_link_group *lgr) · 173 unmodified lines
13451380
13461381 if (lgr->type == SMC_LGR_SINGLE && !list_empty(&lgr->list)) {
13471382 /* trigger setup of asymm alt link */
1348− smc_llc_srv_add_link_local(lnk);
1383+ smc_llc_add_link_local(lnk);
13491384 }
13501385 out:
13511386 mutex_unlock(&lgr->llc_conf_mutex);
@@ -1474,7 +1509,18 @@ static void smc_llc_event_handler(struct smc_llc_qentry *qentry) · 122 unmodified lines
14741509 if (list_empty(&lgr->list))
14751510 goto out; /* lgr is terminating */
14761511 if (lgr->role == SMC_CLNT) {
1477− if (lgr->llc_flow_lcl.type == SMC_LLC_FLOW_ADD_LINK) {
1512+ if (smc_llc_is_local_add_link(llc)) {
1513+ if (lgr->llc_flow_lcl.type ==
1514+ SMC_LLC_FLOW_ADD_LINK)
1515+ break; /* add_link in progress */
1516+ if (smc_llc_flow_start(&lgr->llc_flow_lcl,
1517+ qentry)) {
1518+ schedule_work(&lgr->llc_add_link_work);
1519+ }
1520+ return;
1521+ }
1522+ if (lgr->llc_flow_lcl.type == SMC_LLC_FLOW_ADD_LINK &&
1523+ !lgr->llc_flow_lcl.qentry) {
14781524 /* a flow is waiting for this message */
14791525 smc_llc_flow_qentry_set(&lgr->llc_flow_lcl,
14801526 qentry);
@@ -1498,28 +1544,13 @@ static void smc_llc_event_handler(struct smc_llc_qentry *qentry) · 17 unmodified lines
14981544 }
14991545 break;
15001546 case SMC_LLC_DELETE_LINK:
1501− if (lgr->role == SMC_CLNT) {
1502− /* server requests to delete this link, send response */
1503− if (lgr->llc_flow_lcl.type != SMC_LLC_FLOW_NONE) {
1504− /* DEL LINK REQ during ADD LINK SEQ */
1505− smc_llc_flow_qentry_set(&lgr->llc_flow_lcl,
1506− qentry);
1507− wake_up(&lgr->llc_msg_waiter);
1508− } else if (smc_llc_flow_start(&lgr->llc_flow_lcl,
1509− qentry)) {
1510− schedule_work(&lgr->llc_del_link_work);
1511− }
1512− } else {
1513− if (lgr->llc_flow_lcl.type == SMC_LLC_FLOW_ADD_LINK &&
1514− !lgr->llc_flow_lcl.qentry) {
1515− /* DEL LINK REQ during ADD LINK SEQ */
1516− smc_llc_flow_qentry_set(&lgr->llc_flow_lcl,
1517− qentry);
1518− wake_up(&lgr->llc_msg_waiter);
1519− } else if (smc_llc_flow_start(&lgr->llc_flow_lcl,
1520− qentry)) {
1521− schedule_work(&lgr->llc_del_link_work);
1522− }
1547+ if (lgr->llc_flow_lcl.type == SMC_LLC_FLOW_ADD_LINK &&
1548+ !lgr->llc_flow_lcl.qentry) {
1549+ /* DEL LINK REQ during ADD LINK SEQ */
1550+ smc_llc_flow_qentry_set(&lgr->llc_flow_lcl, qentry);
1551+ wake_up(&lgr->llc_msg_waiter);
1552+ } else if (smc_llc_flow_start(&lgr->llc_flow_lcl, qentry)) {
1553+ schedule_work(&lgr->llc_del_link_work);
15231554 }
15241555 return;
15251556 case SMC_LLC_CONFIRM_RKEY:
@@ -1585,23 +1616,30 @@ again: · 59 unmodified lines
15851616 static void smc_llc_rx_response(struct smc_link *link,
15861617 struct smc_llc_qentry *qentry)
15871618 {
1619+ enum smc_llc_flowtype flowtype = link->lgr->llc_flow_lcl.type;
1620+ struct smc_llc_flow *flow = &link->lgr->llc_flow_lcl;
15881621 u8 llc_type = qentry->msg.raw.hdr.common.type;
15891622
15901623 switch (llc_type) {
15911624 case SMC_LLC_TEST_LINK:
1592− if (link->state == SMC_LNK_ACTIVE)
1625+ if (smc_link_active(link))
15931626 complete(&link->llc_testlink_resp);
15941627 break;
15951628 case SMC_LLC_ADD_LINK:
1596− case SMC_LLC_DELETE_LINK:
1597− case SMC_LLC_CONFIRM_LINK:
15981629 case SMC_LLC_ADD_LINK_CONT:
1630+ case SMC_LLC_CONFIRM_LINK:
1631+ if (flowtype != SMC_LLC_FLOW_ADD_LINK || flow->qentry)
1632+ break; /* drop out-of-flow response */
1633+ goto assign;
1634+ case SMC_LLC_DELETE_LINK:
1635+ if (flowtype != SMC_LLC_FLOW_DEL_LINK || flow->qentry)
1636+ break; /* drop out-of-flow response */
1637+ goto assign;
15991638 case SMC_LLC_CONFIRM_RKEY:
16001639 case SMC_LLC_DELETE_RKEY:
1601− /* assign responses to the local flow, we requested them */
1602− smc_llc_flow_qentry_set(&link->lgr->llc_flow_lcl, qentry);
1603− wake_up(&link->lgr->llc_msg_waiter);
1604− return;
1640+ if (flowtype != SMC_LLC_FLOW_RKEY || flow->qentry)
1641+ break; /* drop out-of-flow response */
1642+ goto assign;
16051643 case SMC_LLC_CONFIRM_RKEY_CONT:
16061644 /* not used because max links is 3 */
16071645 break;
@@ -1610,6 +1648,11 @@ static void smc_llc_rx_response(struct smc_link *link, · 2 unmodified lines
16101648 break;
16111649 }
16121650 kfree(qentry);
1651+ return;
1652+assign:
1653+ /* assign responses to the local flow, we requested them */
1654+ smc_llc_flow_qentry_set(&link->lgr->llc_flow_lcl, qentry);
1655+ wake_up(&link->lgr->llc_msg_waiter);
16131656 }
16141657
16151658 static void smc_llc_enqueue(struct smc_link *link, union smc_llc_msg *llc)
@@ -1663,7 +1706,7 @@ static void smc_llc_testlink_work(struct work_struct *work) · 47 unmodified lines
16631706 u8 user_data[16] = { 0 };
16641707 int rc;
16651708
1666− if (link->state != SMC_LNK_ACTIVE)
1709+ if (!smc_link_active(link))
16671710 return; /* don't reschedule worker */
16681711 expire_time = link->wr_rx_tstamp + link->llc_testlink_time;
16691712 if (time_is_after_jiffies(expire_time)) {
@@ -1675,7 +1718,7 @@ static void smc_llc_testlink_work(struct work_struct *work) · 5 unmodified lines
16751718 /* receive TEST LINK response over RoCE fabric */
16761719 rc = wait_for_completion_interruptible_timeout(&link->llc_testlink_resp,
16771720 SMC_LLC_WAIT_TIME);
1678− if (link->state != SMC_LNK_ACTIVE)
1721+ if (!smc_link_active(link))
16791722 return; /* link state changed */
16801723 if (rc <= 0) {
16811724 smcr_link_down_cond_sched(link);
net/smc/smc_llc.h+1−1
@@ -103,7 +103,7 @@ void smc_llc_send_link_delete_all(struct smc_link_group *lgr, bool ord, · 102 unmodified lines
103103 u32 rsn);
104104 int smc_llc_cli_add_link(struct smc_link *link, struct smc_llc_qentry *qentry);
105105 int smc_llc_srv_add_link(struct smc_link *link);
106−void smc_llc_srv_add_link_local(struct smc_link *link);
106+void smc_llc_add_link_local(struct smc_link *link);
107107 int smc_llc_init(void) __init;
108108
109109 #endif /* SMC_LLC_H */
net/tipc/link.c+1−1
@@ -827,11 +827,11 @@ int tipc_link_timeout(struct tipc_link *l, struct sk_buff_head *xmitq) · 826 unmodified lines
827827 state |= l->bc_rcvlink->rcv_unacked;
828828 state |= l->rcv_unacked;
829829 state |= !skb_queue_empty(&l->transmq);
830− state |= !skb_queue_empty(&l->deferdq);
831830 probe = mstate->probing;
832831 probe |= l->silent_intv_cnt;
833832 if (probe || mstate->monitoring)
834833 l->silent_intv_cnt++;
834+ probe |= !skb_queue_empty(&l->deferdq);
835835 if (l->snd_nxt == l->checkpoint) {
836836 tipc_link_update_cwin(l, 0, 0);
837837 probe = true;
net/vmw_vsock/virtio_transport.c+1−1
@@ -22,7 +22,7 @@ · 21 unmodified lines
2222 #include <net/af_vsock.h>
2323
2424 static struct workqueue_struct *virtio_vsock_workqueue;
25−static struct virtio_vsock *the_virtio_vsock;
25+static struct virtio_vsock __rcu *the_virtio_vsock;
2626 static DEFINE_MUTEX(the_virtio_vsock_mutex); /* protects the_virtio_vsock */
2727
2828 struct virtio_vsock {
scripts/decode_stacktrace.sh+2−2
@@ -87,8 +87,8 @@ parse_symbol() { · 86 unmodified lines
8787 return
8888 fi
8989
90− # Strip out the base of the path
91− code=${code#$basepath/}
90+ # Strip out the base of the path on each line
91+ code=$(while read -r line; do echo "${line#$basepath/}"; done <<< "$code")
9292
9393 # In the case of inlines, move everything to same line
9494 code=${code//$'\n'/' '}
scripts/gdb/linux/symbols.py+1−1
@@ -96,7 +96,7 @@ lx-symbols command.""" · 95 unmodified lines
9696 return ""
9797 attrs = sect_attrs['attrs']
9898 section_name_to_address = {
99− attrs[n]['name'].string(): attrs[n]['address']
99+ attrs[n]['battr']['attr']['name'].string(): attrs[n]['address']
100100 for n in range(int(sect_attrs['nsections']))}
101101 args = []
102102 for section_name in [".data", ".data..read_mostly", ".rodata", ".bss",
scripts/mod/modpost.c+10−2
@@ -138,11 +138,19 @@ char *read_text_file(const char *filename) · 137 unmodified lines
138138
139139 char *get_line(char **stringp)
140140 {
141+ char *orig = *stringp, *next;
142+
141143 /* do not return the unwanted extra line at EOF */
142− if (*stringp && **stringp == '\0')
144+ if (!orig || *orig == '\0')
143145 return NULL;
144146
145− return strsep(stringp, "\n");
147+ next = strchr(orig, '\n');
148+ if (next)
149+ *next++ = '\0';
150+
151+ *stringp = next;
152+
153+ return orig;
146154 }
147155
148156 /* A list of all modules we processed */
sound/core/info.c+3−1
@@ -606,7 +606,9 @@ int snd_info_get_line(struct snd_info_buffer *buffer, char *line, int len) · 605 unmodified lines
606606 {
607607 int c;
608608
609− if (snd_BUG_ON(!buffer || !buffer->buffer))
609+ if (snd_BUG_ON(!buffer))
610+ return 1;
611+ if (!buffer->buffer)
610612 return 1;
611613 if (len <= 0 || buffer->stop || buffer->error)
612614 return 1;
sound/pci/hda/patch_realtek.c+1−0
@@ -7587,6 +7587,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 7586 unmodified lines
75877587 SND_PCI_QUIRK(0x144d, 0xc169, "Samsung Notebook 9 Pen (NP930SBE-K01US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET),
75887588 SND_PCI_QUIRK(0x144d, 0xc176, "Samsung Notebook 9 Pro (NP930MBE-K04US)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET),
75897589 SND_PCI_QUIRK(0x144d, 0xc740, "Samsung Ativ book 8 (NP870Z5G)", ALC269_FIXUP_ATIV_BOOK_8),
7590+ SND_PCI_QUIRK(0x144d, 0xc812, "Samsung Notebook Pen S (NT950SBE-X58)", ALC298_FIXUP_SAMSUNG_HEADPHONE_VERY_QUIET),
75907591 SND_PCI_QUIRK(0x1458, 0xfa53, "Gigabyte BXBT-2807", ALC283_FIXUP_HEADSET_MIC),
75917592 SND_PCI_QUIRK(0x1462, 0xb120, "MSI Cubi MS-B120", ALC283_FIXUP_HEADSET_MIC),
75927593 SND_PCI_QUIRK(0x1462, 0xb171, "Cubi N 8GL (MS-B171)", ALC283_FIXUP_HEADSET_MIC),
sound/soc/amd/raven/pci-acp3x.c+1−3
@@ -232,9 +232,7 @@ static int snd_acp3x_probe(struct pci_dev *pci, · 231 unmodified lines
232232 }
233233 pm_runtime_set_autosuspend_delay(&pci->dev, 2000);
234234 pm_runtime_use_autosuspend(&pci->dev);
235− pm_runtime_set_active(&pci->dev);
236235 pm_runtime_put_noidle(&pci->dev);
237− pm_runtime_enable(&pci->dev);
238236 pm_runtime_allow(&pci->dev);
239237 return 0;
240238
@@ -303,7 +301,7 @@ static void snd_acp3x_remove(struct pci_dev *pci) · 62 unmodified lines
303301 ret = acp3x_deinit(adata->acp3x_base);
304302 if (ret)
305303 dev_err(&pci->dev, "ACP de-init failed\n");
306− pm_runtime_disable(&pci->dev);
304+ pm_runtime_forbid(&pci->dev);
307305 pm_runtime_get_noresume(&pci->dev);
308306 pci_disable_msi(pci);
309307 pci_release_regions(pci);
sound/soc/codecs/max98373.c+0−8
@@ -779,13 +779,6 @@ static int max98373_probe(struct snd_soc_component *component) · 778 unmodified lines
779779 regmap_write(max98373->regmap,
780780 MAX98373_R202A_PCM_TO_SPK_MONO_MIX_2,
781781 0x1);
782− /* Set inital volume (0dB) */
783− regmap_write(max98373->regmap,
784− MAX98373_R203D_AMP_DIG_VOL_CTRL,
785− 0x00);
786− regmap_write(max98373->regmap,
787− MAX98373_R203E_AMP_PATH_GAIN,
788− 0x00);
789782 /* Enable DC blocker */
790783 regmap_write(max98373->regmap,
791784 MAX98373_R203F_AMP_DSP_CFG,
@@ -869,7 +862,6 @@ static const struct snd_soc_component_driver soc_codec_dev_max98373 = { · 77 unmodified lines
869862 .num_dapm_widgets = ARRAY_SIZE(max98373_dapm_widgets),
870863 .dapm_routes = max98373_audio_map,
871864 .num_dapm_routes = ARRAY_SIZE(max98373_audio_map),
872− .idle_bias_on = 1,
873865 .use_pmdown_time = 1,
874866 .endianness = 1,
875867 .non_legacy_dai_naming = 1,
sound/soc/codecs/rt286.c+4−4
@@ -272,13 +272,13 @@ static int rt286_jack_detect(struct rt286_priv *rt286, bool *hp, bool *mic) · 271 unmodified lines
272272 regmap_read(rt286->regmap, RT286_GET_MIC1_SENSE, &buf);
273273 *mic = buf & 0x80000000;
274274 }
275− if (!*mic) {
275+
276+ if (!*hp) {
276277 snd_soc_dapm_disable_pin(dapm, "HV");
277278 snd_soc_dapm_disable_pin(dapm, "VREF");
278− }
279− if (!*hp)
280279 snd_soc_dapm_disable_pin(dapm, "LDO1");
281− snd_soc_dapm_sync(dapm);
280+ snd_soc_dapm_sync(dapm);
281+ }
282282
283283 return 0;
284284 }
sound/soc/codecs/rt5670.c+58−17
@@ -31,18 +31,19 @@ · 30 unmodified lines
3131 #include "rt5670.h"
3232 #include "rt5670-dsp.h"
3333
34−#define RT5670_DEV_GPIO BIT(0)
35−#define RT5670_IN2_DIFF BIT(1)
36−#define RT5670_DMIC_EN BIT(2)
37−#define RT5670_DMIC1_IN2P BIT(3)
38−#define RT5670_DMIC1_GPIO6 BIT(4)
39−#define RT5670_DMIC1_GPIO7 BIT(5)
40−#define RT5670_DMIC2_INR BIT(6)
41−#define RT5670_DMIC2_GPIO8 BIT(7)
42−#define RT5670_DMIC3_GPIO5 BIT(8)
43−#define RT5670_JD_MODE1 BIT(9)
44−#define RT5670_JD_MODE2 BIT(10)
45−#define RT5670_JD_MODE3 BIT(11)
34+#define RT5670_DEV_GPIO BIT(0)
35+#define RT5670_IN2_DIFF BIT(1)
36+#define RT5670_DMIC_EN BIT(2)
37+#define RT5670_DMIC1_IN2P BIT(3)
38+#define RT5670_DMIC1_GPIO6 BIT(4)
39+#define RT5670_DMIC1_GPIO7 BIT(5)
40+#define RT5670_DMIC2_INR BIT(6)
41+#define RT5670_DMIC2_GPIO8 BIT(7)
42+#define RT5670_DMIC3_GPIO5 BIT(8)
43+#define RT5670_JD_MODE1 BIT(9)
44+#define RT5670_JD_MODE2 BIT(10)
45+#define RT5670_JD_MODE3 BIT(11)
46+#define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12)
4647
4748 static unsigned long rt5670_quirk;
4849 static unsigned int quirk_override;
@@ -602,9 +603,9 @@ int rt5670_set_jack_detect(struct snd_soc_component *component, · 553 unmodified lines
602603 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
603604
604605 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
605−static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
606+static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -6562, 0);
606607 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
607−static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
608+static const DECLARE_TLV_DB_MINMAX(adc_vol_tlv, -1762, 3000);
608609 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
609610
610611 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
@@ -1447,6 +1448,33 @@ static int rt5670_hp_event(struct snd_soc_dapm_widget *w, · 836 unmodified lines
14471448 return 0;
14481449 }
14491450
1451+static int rt5670_spk_event(struct snd_soc_dapm_widget *w,
1452+ struct snd_kcontrol *kcontrol, int event)
1453+{
1454+ struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1455+ struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1456+
1457+ if (!rt5670->pdata.gpio1_is_ext_spk_en)
1458+ return 0;
1459+
1460+ switch (event) {
1461+ case SND_SOC_DAPM_POST_PMU:
1462+ regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1463+ RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI);
1464+ break;
1465+
1466+ case SND_SOC_DAPM_PRE_PMD:
1467+ regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1468+ RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO);
1469+ break;
1470+
1471+ default:
1472+ return 0;
1473+ }
1474+
1475+ return 0;
1476+}
1477+
14501478 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
14511479 struct snd_kcontrol *kcontrol, int event)
14521480 {
@@ -1860,7 +1888,9 @@ static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = { · 407 unmodified lines
18601888 };
18611889
18621890 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1863− SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1891+ SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1892+ rt5670_spk_event, SND_SOC_DAPM_PRE_PMD |
1893+ SND_SOC_DAPM_POST_PMU),
18641894 SND_SOC_DAPM_OUTPUT("SPOLP"),
18651895 SND_SOC_DAPM_OUTPUT("SPOLN"),
18661896 SND_SOC_DAPM_OUTPUT("SPORP"),
@@ -2857,14 +2887,14 @@ static const struct dmi_system_id dmi_platform_intel_quirks[] = { · 990 unmodified lines
28572887 },
28582888 {
28592889 .callback = rt5670_quirk_cb,
2860− .ident = "Lenovo Thinkpad Tablet 10",
2890+ .ident = "Lenovo Miix 2 10",
28612891 .matches = {
28622892 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
28632893 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
28642894 },
28652895 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
28662896 RT5670_DMIC1_IN2P |
2867− RT5670_DEV_GPIO |
2897+ RT5670_GPIO1_IS_EXT_SPK_EN |
28682898 RT5670_JD_MODE2),
28692899 },
28702900 {
@@ -2924,6 +2954,10 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, · 53 unmodified lines
29242954 rt5670->pdata.dev_gpio = true;
29252955 dev_info(&i2c->dev, "quirk dev_gpio\n");
29262956 }
2957+ if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) {
2958+ rt5670->pdata.gpio1_is_ext_spk_en = true;
2959+ dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n");
2960+ }
29272961 if (rt5670_quirk & RT5670_IN2_DIFF) {
29282962 rt5670->pdata.in2_diff = true;
29292963 dev_info(&i2c->dev, "quirk IN2_DIFF\n");
@@ -3023,6 +3057,13 @@ static int rt5670_i2c_probe(struct i2c_client *i2c, · 93 unmodified lines
30233057 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
30243058 }
30253059
3060+ if (rt5670->pdata.gpio1_is_ext_spk_en) {
3061+ regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3062+ RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1);
3063+ regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3064+ RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3065+ }
3066+
30263067 if (rt5670->pdata.jd_mode) {
30273068 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
30283069 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
sound/soc/codecs/rt5670.h+1−1
@@ -757,7 +757,7 @@ · 756 unmodified lines
757757 #define RT5670_PWR_VREF2_BIT 4
758758 #define RT5670_PWR_FV2 (0x1 << 3)
759759 #define RT5670_PWR_FV2_BIT 3
760−#define RT5670_LDO_SEL_MASK (0x3)
760+#define RT5670_LDO_SEL_MASK (0x7)
761761 #define RT5670_LDO_SEL_SFT 0
762762
763763 /* Power Management for Analog 2 (0x64) */
sound/soc/codecs/rt5682.c+29−17
@@ -967,13 +967,12 @@ int rt5682_headset_detect(struct snd_soc_component *component, int jack_insert) · 966 unmodified lines
967967 rt5682_enable_push_button_irq(component, false);
968968 snd_soc_component_update_bits(component, RT5682_CBJ_CTRL_1,
969969 RT5682_TRIG_JD_MASK, RT5682_TRIG_JD_LOW);
970− if (snd_soc_dapm_get_pin_status(dapm, "MICBIAS"))
970+ if (!snd_soc_dapm_get_pin_status(dapm, "MICBIAS"))
971971 snd_soc_component_update_bits(component,
972− RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);
973− else
972+ RT5682_PWR_ANLG_1, RT5682_PWR_MB, 0);
973+ if (!snd_soc_dapm_get_pin_status(dapm, "Vref2"))
974974 snd_soc_component_update_bits(component,
975− RT5682_PWR_ANLG_1,
976− RT5682_PWR_VREF2 | RT5682_PWR_MB, 0);
975+ RT5682_PWR_ANLG_1, RT5682_PWR_VREF2, 0);
977976 snd_soc_component_update_bits(component, RT5682_PWR_ANLG_3,
978977 RT5682_PWR_CBJ, 0);
979978
@@ -992,16 +991,17 @@ static int rt5682_set_jack_detect(struct snd_soc_component *component, · 12 unmodified lines
992991
993992 rt5682->hs_jack = hs_jack;
994993
995− if (!rt5682->is_sdw) {
996− if (!hs_jack) {
997− regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
998− RT5682_JD1_EN_MASK, RT5682_JD1_DIS);
999− regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
1000− RT5682_POW_JDH | RT5682_POW_JDL, 0);
1001− cancel_delayed_work_sync(&rt5682->jack_detect_work);
1002− return 0;
1003− }
994+ if (!hs_jack) {
995+ regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
996+ RT5682_JD1_EN_MASK, RT5682_JD1_DIS);
997+ regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
998+ RT5682_POW_JDH | RT5682_POW_JDL, 0);
999+ cancel_delayed_work_sync(&rt5682->jack_detect_work);
10041000
1001+ return 0;
1002+ }
1003+
1004+ if (!rt5682->is_sdw) {
10051005 switch (rt5682->pdata.jd_src) {
10061006 case RT5682_JD1:
10071007 snd_soc_component_update_bits(component,
@@ -1082,7 +1082,8 @@ void rt5682_jack_detect_handler(struct work_struct *work) · 74 unmodified lines
10821082 /* jack was out, report jack type */
10831083 rt5682->jack_type =
10841084 rt5682_headset_detect(rt5682->component, 1);
1085− } else {
1085+ } else if ((rt5682->jack_type & SND_JACK_HEADSET) ==
1086+ SND_JACK_HEADSET) {
10861087 /* jack is already in, report button event */
10871088 rt5682->jack_type = SND_JACK_HEADSET;
10881089 btn_type = rt5682_button_detect(rt5682->component);
@@ -1608,8 +1609,7 @@ static const struct snd_soc_dapm_widget rt5682_dapm_widgets[] = { · 519 unmodified lines
16081609 0, set_filter_clk, SND_SOC_DAPM_PRE_PMU),
16091610 SND_SOC_DAPM_SUPPLY("Vref1", RT5682_PWR_ANLG_1, RT5682_PWR_VREF1_BIT, 0,
16101611 rt5682_set_verf, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU),
1611− SND_SOC_DAPM_SUPPLY("Vref2", RT5682_PWR_ANLG_1, RT5682_PWR_VREF2_BIT, 0,
1612− NULL, 0),
1612+ SND_SOC_DAPM_SUPPLY("Vref2", SND_SOC_NOPM, 0, 0, NULL, 0),
16131613 SND_SOC_DAPM_SUPPLY("MICBIAS", SND_SOC_NOPM, 0, 0, NULL, 0),
16141614
16151615 /* ASRC */
@@ -2492,6 +2492,15 @@ static int rt5682_wclk_prepare(struct clk_hw *hw) · 876 unmodified lines
24922492 snd_soc_dapm_force_enable_pin_unlocked(dapm, "MICBIAS");
24932493 snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
24942494 RT5682_PWR_MB, RT5682_PWR_MB);
2495+
2496+ snd_soc_dapm_force_enable_pin_unlocked(dapm, "Vref2");
2497+ snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
2498+ RT5682_PWR_VREF2 | RT5682_PWR_FV2,
2499+ RT5682_PWR_VREF2);
2500+ usleep_range(55000, 60000);
2501+ snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
2502+ RT5682_PWR_FV2, RT5682_PWR_FV2);
2503+
24952504 snd_soc_dapm_force_enable_pin_unlocked(dapm, "I2S1");
24962505 snd_soc_dapm_force_enable_pin_unlocked(dapm, "PLL2F");
24972506 snd_soc_dapm_force_enable_pin_unlocked(dapm, "PLL2B");
@@ -2517,9 +2526,12 @@ static void rt5682_wclk_unprepare(struct clk_hw *hw) · 19 unmodified lines
25172526 snd_soc_dapm_mutex_lock(dapm);
25182527
25192528 snd_soc_dapm_disable_pin_unlocked(dapm, "MICBIAS");
2529+ snd_soc_dapm_disable_pin_unlocked(dapm, "Vref2");
25202530 if (!rt5682->jack_type)
25212531 snd_soc_component_update_bits(component, RT5682_PWR_ANLG_1,
2532+ RT5682_PWR_VREF2 | RT5682_PWR_FV2 |
25222533 RT5682_PWR_MB, 0);
2534+
25232535 snd_soc_dapm_disable_pin_unlocked(dapm, "I2S1");
25242536 snd_soc_dapm_disable_pin_unlocked(dapm, "PLL2F");
25252537 snd_soc_dapm_disable_pin_unlocked(dapm, "PLL2B");
sound/soc/codecs/wm8974.c+5−1
@@ -186,7 +186,7 @@ SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0), · 185 unmodified lines
186186
187187 /* Boost mixer */
188188 static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
189−SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
189+SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 1),
190190 };
191191
192192 /* Input PGA */
@@ -474,6 +474,10 @@ static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai, · 281 unmodified lines
474474 iface |= 0x0008;
475475 break;
476476 case SND_SOC_DAIFMT_DSP_A:
477+ if ((fmt & SND_SOC_DAIFMT_INV_MASK) == SND_SOC_DAIFMT_IB_IF ||
478+ (fmt & SND_SOC_DAIFMT_INV_MASK) == SND_SOC_DAIFMT_NB_IF) {
479+ return -EINVAL;
480+ }
477481 iface |= 0x00018;
478482 break;
479483 default:
sound/soc/generic/audio-graph-card.c+2−2
@@ -317,8 +317,8 @@ static int graph_dai_link_of_dpcm(struct asoc_simple_priv *priv, · 316 unmodified lines
317317 if (ret < 0)
318318 goto out_put_node;
319319
320− dai_link->dpcm_playback = 1;
321− dai_link->dpcm_capture = 1;
320+ snd_soc_dai_link_set_capabilities(dai_link);
321+
322322 dai_link->ops = &graph_ops;
323323 dai_link->init = asoc_simple_dai_init;
324324
sound/soc/generic/simple-card.c+2−2
@@ -231,8 +231,8 @@ static int simple_dai_link_of_dpcm(struct asoc_simple_priv *priv, · 230 unmodified lines
231231 if (ret < 0)
232232 goto out_put_node;
233233
234− dai_link->dpcm_playback = 1;
235− dai_link->dpcm_capture = 1;
234+ snd_soc_dai_link_set_capabilities(dai_link);
235+
236236 dai_link->ops = &simple_ops;
237237 dai_link->init = asoc_simple_dai_init;
238238
sound/soc/intel/boards/bdw-rt5677.c+1−0
@@ -354,6 +354,7 @@ static struct snd_soc_dai_link bdw_rt5677_dais[] = { · 353 unmodified lines
354354 {
355355 .name = "Codec DSP",
356356 .stream_name = "Wake on Voice",
357+ .capture_only = 1,
357358 .ops = &bdw_rt5677_dsp_ops,
358359 SND_SOC_DAILINK_REG(dsp),
359360 },
sound/soc/intel/boards/bytcht_es8316.c+3−1
@@ -543,8 +543,10 @@ static int snd_byt_cht_es8316_mc_probe(struct platform_device *pdev) · 542 unmodified lines
543543
544544 if (cnt) {
545545 ret = device_add_properties(codec_dev, props);
546− if (ret)
546+ if (ret) {
547+ put_device(codec_dev);
547548 return ret;
549+ }
548550 }
549551
550552 devm_acpi_dev_add_driver_gpios(codec_dev, byt_cht_es8316_gpios);
sound/soc/intel/boards/cht_bsw_rt5672.c+11−12
@@ -253,21 +253,20 @@ static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, · 252 unmodified lines
253253 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
254254
255255 /*
256− * Default mode for SSP configuration is TDM 4 slot
256+ * Default mode for SSP configuration is TDM 4 slot. One board/design,
257+ * the Lenovo Miix 2 10 uses not 1 but 2 codecs connected to SSP2. The
258+ * second piggy-backed, output-only codec is inside the keyboard-dock
259+ * (which has extra speakers). Unlike the main rt5672 codec, we cannot
260+ * configure this codec, it is hard coded to use 2 channel 24 bit I2S.
261+ * Since we only support 2 channels anyways, there is no need for TDM
262+ * on any cht-bsw-rt5672 designs. So we simply use I2S 2ch everywhere.
257263 */
258− ret = snd_soc_dai_set_fmt(asoc_rtd_to_codec(rtd, 0),
259− SND_SOC_DAIFMT_DSP_B |
260− SND_SOC_DAIFMT_IB_NF |
264+ ret = snd_soc_dai_set_fmt(asoc_rtd_to_cpu(rtd, 0),
265+ SND_SOC_DAIFMT_I2S |
266+ SND_SOC_DAIFMT_NB_NF |
261267 SND_SOC_DAIFMT_CBS_CFS);
262268 if (ret < 0) {
263− dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
264− return ret;
265− }
266−
267− /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
268− ret = snd_soc_dai_set_tdm_slot(asoc_rtd_to_codec(rtd, 0), 0xF, 0xF, 4, 24);
269− if (ret < 0) {
270− dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
269+ dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret);
271270 return ret;
272271 }
273272
sound/soc/qcom/Kconfig+1−1
@@ -72,7 +72,7 @@ config SND_SOC_QDSP6_ASM_DAI · 71 unmodified lines
7272
7373 config SND_SOC_QDSP6
7474 tristate "SoC ALSA audio driver for QDSP6"
75− depends on QCOM_APR && HAS_DMA
75+ depends on QCOM_APR
7676 select SND_SOC_QDSP6_COMMON
7777 select SND_SOC_QDSP6_CORE
7878 select SND_SOC_QDSP6_AFE
sound/soc/rockchip/rk3399_gru_sound.c+13−0
@@ -219,19 +219,32 @@ static int rockchip_sound_dmic_hw_params(struct snd_pcm_substream *substream, · 218 unmodified lines
219219 return 0;
220220 }
221221
222+static int rockchip_sound_startup(struct snd_pcm_substream *substream)
223+{
224+ struct snd_pcm_runtime *runtime = substream->runtime;
225+
226+ runtime->hw.formats = SNDRV_PCM_FMTBIT_S16_LE;
227+ return snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_RATE,
228+ 8000, 96000);
229+}
230+
222231 static const struct snd_soc_ops rockchip_sound_max98357a_ops = {
232+ .startup = rockchip_sound_startup,
223233 .hw_params = rockchip_sound_max98357a_hw_params,
224234 };
225235
226236 static const struct snd_soc_ops rockchip_sound_rt5514_ops = {
237+ .startup = rockchip_sound_startup,
227238 .hw_params = rockchip_sound_rt5514_hw_params,
228239 };
229240
230241 static const struct snd_soc_ops rockchip_sound_da7219_ops = {
242+ .startup = rockchip_sound_startup,
231243 .hw_params = rockchip_sound_da7219_hw_params,
232244 };
233245
234246 static const struct snd_soc_ops rockchip_sound_dmic_ops = {
247+ .startup = rockchip_sound_startup,
235248 .hw_params = rockchip_sound_dmic_hw_params,
236249 };
237250
sound/soc/soc-core.c+27−0
@@ -2572,6 +2572,33 @@ int snd_soc_register_component(struct device *dev, · 2571 unmodified lines
25722572 }
25732573 EXPORT_SYMBOL_GPL(snd_soc_register_component);
25742574
2575+/**
2576+ * snd_soc_unregister_component_by_driver - Unregister component using a given driver
2577+ * from the ASoC core
2578+ *
2579+ * @dev: The device to unregister
2580+ * @component_driver: The component driver to unregister
2581+ */
2582+void snd_soc_unregister_component_by_driver(struct device *dev,
2583+ const struct snd_soc_component_driver *component_driver)
2584+{
2585+ struct snd_soc_component *component;
2586+
2587+ if (!component_driver)
2588+ return;
2589+
2590+ mutex_lock(&client_mutex);
2591+ component = snd_soc_lookup_component_nolocked(dev, component_driver->name);
2592+ if (!component)
2593+ goto out;
2594+
2595+ snd_soc_del_component_unlocked(component);
2596+
2597+out:
2598+ mutex_unlock(&client_mutex);
2599+}
2600+EXPORT_SYMBOL_GPL(snd_soc_unregister_component_by_driver);
2601+
25752602 /**
25762603 * snd_soc_unregister_component - Unregister all related component
25772604 * from the ASoC core
sound/soc/soc-dai.c+38−0
@@ -391,6 +391,44 @@ bool snd_soc_dai_stream_valid(struct snd_soc_dai *dai, int dir) · 390 unmodified lines
391391 return stream->channels_min;
392392 }
393393
394+/*
395+ * snd_soc_dai_link_set_capabilities() - set dai_link properties based on its DAIs
396+ */
397+void snd_soc_dai_link_set_capabilities(struct snd_soc_dai_link *dai_link)
398+{
399+ struct snd_soc_dai_link_component *cpu;
400+ struct snd_soc_dai_link_component *codec;
401+ struct snd_soc_dai *dai;
402+ bool supported[SNDRV_PCM_STREAM_LAST + 1];
403+ int direction;
404+ int i;
405+
406+ for_each_pcm_streams(direction) {
407+ supported[direction] = true;
408+
409+ for_each_link_cpus(dai_link, i, cpu) {
410+ dai = snd_soc_find_dai(cpu);
411+ if (!dai || !snd_soc_dai_stream_valid(dai, direction)) {
412+ supported[direction] = false;
413+ break;
414+ }
415+ }
416+ if (!supported[direction])
417+ continue;
418+ for_each_link_codecs(dai_link, i, codec) {
419+ dai = snd_soc_find_dai(codec);
420+ if (!dai || !snd_soc_dai_stream_valid(dai, direction)) {
421+ supported[direction] = false;
422+ break;
423+ }
424+ }
425+ }
426+
427+ dai_link->dpcm_playback = supported[SNDRV_PCM_STREAM_PLAYBACK];
428+ dai_link->dpcm_capture = supported[SNDRV_PCM_STREAM_CAPTURE];
429+}
430+EXPORT_SYMBOL_GPL(snd_soc_dai_link_set_capabilities);
431+
394432 void snd_soc_dai_action(struct snd_soc_dai *dai,
395433 int stream, int action)
396434 {
sound/soc/soc-devres.c+5−3
@@ -48,7 +48,9 @@ EXPORT_SYMBOL_GPL(devm_snd_soc_register_dai); · 47 unmodified lines
4848
4949 static void devm_component_release(struct device *dev, void *res)
5050 {
51− snd_soc_unregister_component(*(struct device **)res);
51+ const struct snd_soc_component_driver **cmpnt_drv = res;
52+
53+ snd_soc_unregister_component_by_driver(dev, *cmpnt_drv);
5254 }
5355
5456 /**
@@ -65,7 +67,7 @@ int devm_snd_soc_register_component(struct device *dev, · 10 unmodified lines
6567 const struct snd_soc_component_driver *cmpnt_drv,
6668 struct snd_soc_dai_driver *dai_drv, int num_dai)
6769 {
68− struct device **ptr;
70+ const struct snd_soc_component_driver **ptr;
6971 int ret;
7072
7173 ptr = devres_alloc(devm_component_release, sizeof(*ptr), GFP_KERNEL);
@@ -74,7 +76,7 @@ int devm_snd_soc_register_component(struct device *dev, · 2 unmodified lines
7476
7577 ret = snd_soc_register_component(dev, cmpnt_drv, dai_drv, num_dai);
7678 if (ret == 0) {
77− *ptr = dev;
79+ *ptr = cmpnt_drv;
7880 devres_add(dev, ptr);
7981 } else {
8082 devres_free(ptr);
sound/soc/soc-generic-dmaengine-pcm.c+1−1
@@ -478,7 +478,7 @@ void snd_dmaengine_pcm_unregister(struct device *dev) · 477 unmodified lines
478478
479479 pcm = soc_component_to_pcm(component);
480480
481− snd_soc_unregister_component(dev);
481+ snd_soc_unregister_component_by_driver(dev, component->driver);
482482 dmaengine_pcm_release_chan(pcm);
483483 kfree(pcm);
484484 }
sound/soc/soc-topology.c+18−6
@@ -1261,17 +1261,29 @@ static int soc_tplg_dapm_graph_elems_load(struct soc_tplg *tplg, · 1260 unmodified lines
12611261 list_add(&routes[i]->dobj.list, &tplg->comp->dobj_list);
12621262
12631263 ret = soc_tplg_add_route(tplg, routes[i]);
1264− if (ret < 0)
1264+ if (ret < 0) {
1265+ /*
1266+ * this route was added to the list, it will
1267+ * be freed in remove_route() so increment the
1268+ * counter to skip it in the error handling
1269+ * below.
1270+ */
1271+ i++;
12651272 break;
1273+ }
12661274
12671275 /* add route, but keep going if some fail */
12681276 snd_soc_dapm_add_routes(dapm, routes[i], 1);
12691277 }
12701278
1271− /* free memory allocated for all dapm routes in case of error */
1272− if (ret < 0)
1273− for (i = 0; i < count ; i++)
1274− kfree(routes[i]);
1279+ /*
1280+ * free memory allocated for all dapm routes not added to the
1281+ * list in case of error
1282+ */
1283+ if (ret < 0) {
1284+ while (i < count)
1285+ kfree(routes[i++]);
1286+ }
12751287
12761288 /*
12771289 * free pointer to array of dapm routes as this is no longer needed.
@@ -1359,7 +1371,6 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create( · 81 unmodified lines
13591371 if (err < 0) {
13601372 dev_err(tplg->dev, "ASoC: failed to init %s\n",
13611373 mc->hdr.name);
1362− soc_tplg_free_tlv(tplg, &kc[i]);
13631374 goto err_sm;
13641375 }
13651376 }
@@ -1367,6 +1378,7 @@ static struct snd_kcontrol_new *soc_tplg_dapm_widget_dmixer_create( · 1 unmodified line
13671378
13681379 err_sm:
13691380 for (; i >= 0; i--) {
1381+ soc_tplg_free_tlv(tplg, &kc[i]);
13701382 sm = (struct soc_mixer_control *)kc[i].private_value;
13711383 kfree(sm);
13721384 kfree(kc[i].name);
sound/soc/sof/core.c+5−5
@@ -345,15 +345,15 @@ int snd_sof_device_remove(struct device *dev) · 344 unmodified lines
345345 struct snd_sof_pdata *pdata = sdev->pdata;
346346 int ret;
347347
348− ret = snd_sof_dsp_power_down_notify(sdev);
349− if (ret < 0)
350− dev_warn(dev, "error: %d failed to prepare DSP for device removal",
351− ret);
352−
353348 if (IS_ENABLED(CONFIG_SND_SOC_SOF_PROBE_WORK_QUEUE))
354349 cancel_work_sync(&sdev->probe_work);
355350
356351 if (sdev->fw_state > SOF_FW_BOOT_NOT_STARTED) {
352+ ret = snd_sof_dsp_power_down_notify(sdev);
353+ if (ret < 0)
354+ dev_warn(dev, "error: %d failed to prepare DSP for device removal",
355+ ret);
356+
357357 snd_sof_fw_unload(sdev);
358358 snd_sof_ipc_free(sdev);
359359 snd_sof_free_debug(sdev);
sound/soc/sof/imx/imx8.c+8−0
@@ -375,6 +375,14 @@ static int imx8_ipc_pcm_params(struct snd_sof_dev *sdev, · 374 unmodified lines
375375 static struct snd_soc_dai_driver imx8_dai[] = {
376376 {
377377 .name = "esai-port",
378+ .playback = {
379+ .channels_min = 1,
380+ .channels_max = 8,
381+ },
382+ .capture = {
383+ .channels_min = 1,
384+ .channels_max = 8,
385+ },
378386 },
379387 };
380388
sound/soc/sof/imx/imx8m.c+8−0
@@ -240,6 +240,14 @@ static int imx8m_ipc_pcm_params(struct snd_sof_dev *sdev, · 239 unmodified lines
240240 static struct snd_soc_dai_driver imx8m_dai[] = {
241241 {
242242 .name = "sai-port",
243+ .playback = {
244+ .channels_min = 1,
245+ .channels_max = 32,
246+ },
247+ .capture = {
248+ .channels_min = 1,
249+ .channels_max = 32,
250+ },
243251 },
244252 };
245253
tools/perf/pmu-events/arch/s390/cf_z15/extended.json+1−1
@@ -380,7 +380,7 @@ · 379 unmodified lines
380380 {
381381 "Unit": "CPU-M-CF",
382382 "EventCode": "265",
383− "EventName": "DFLT_CCERROR",
383+ "EventName": "DFLT_CCFINISH",
384384 "BriefDescription": "Increments by one for every DEFLATE CONVERSION CALL instruction executed that ended in Condition Codes 0, 1 or 2",
385385 "PublicDescription": "Increments by one for every DEFLATE CONVERSION CALL instruction executed that ended in Condition Codes 0, 1 or 2"
386386 },
tools/testing/selftests/net/fib_nexthop_multiprefix.sh+1−1
@@ -144,7 +144,7 @@ setup() · 143 unmodified lines
144144
145145 cleanup()
146146 {
147− for n in h1 r1 h2 h3 h4
147+ for n in h0 r1 h1 h2 h3
148148 do
149149 ip netns del ${n} 2>/dev/null
150150 done
tools/testing/selftests/net/ip_defrag.sh+2−0
@@ -6,6 +6,8 @@ · 5 unmodified lines
66 set +x
77 set -e
88
9+modprobe -q nf_defrag_ipv6
10+
911 readonly NETNS="ns-$(mktemp -u XXXXXX)"
1012
1113 setup() {
tools/testing/selftests/net/txtimestamp.sh+1−1
@@ -75,7 +75,7 @@ main() { · 74 unmodified lines
7575 fi
7676 }
7777
78−if [[ "$(ip netns identify)" == "root" ]]; then
78+if [[ -z "$(ip netns identify)" ]]; then
7979 ./in_netns.sh $0 $@
8080 else
8181 main $@